Unified · Split
| @@ -113,7 +113,7 @@ CONFIG_IOSAPIC=y · 112 unmodified lines | ||
| 113 | 113 | CONFIG_IA64_SGI_SN_XP=m |
| 114 | 114 | CONFIG_FORCE_MAX_ZONEORDER=17 |
| 115 | 115 | CONFIG_SMP=y |
| 116 | −CONFIG_NR_CPUS=512 | |
| 116 | +CONFIG_NR_CPUS=1024 | |
| 117 | 117 | # CONFIG_HOTPLUG_CPU is not set |
| 118 | 118 | CONFIG_SCHED_SMT=y |
| 119 | 119 | CONFIG_PREEMPT=y |
| @@ -249,3 +249,32 @@ time_init (void) · 248 unmodified lines | ||
| 249 | 249 | */ |
| 250 | 250 | set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec); |
| 251 | 251 | } |
| 252 | + | |
| 253 | +#define SMALLUSECS 100 | |
| 254 | + | |
| 255 | +void | |
| 256 | +udelay (unsigned long usecs) | |
| 257 | +{ | |
| 258 | + unsigned long start; | |
| 259 | + unsigned long cycles; | |
| 260 | + unsigned long smallusecs; | |
| 261 | + | |
| 262 | + /* | |
| 263 | + * Execute the non-preemptible delay loop (because the ITC might | |
| 264 | + * not be synchronized between CPUS) in relatively short time | |
| 265 | + * chunks, allowing preemption between the chunks. | |
| 266 | + */ | |
| 267 | + while (usecs > 0) { | |
| 268 | + smallusecs = (usecs > SMALLUSECS) ? SMALLUSECS : usecs; | |
| 269 | + preempt_disable(); | |
| 270 | + cycles = smallusecs*local_cpu_data->cyc_per_usec; | |
| 271 | + start = ia64_get_itc(); | |
| 272 | + | |
| 273 | + while (ia64_get_itc() - start < cycles) | |
| 274 | + cpu_relax(); | |
| 275 | + | |
| 276 | + preempt_enable(); | |
| 277 | + usecs -= smallusecs; | |
| 278 | + } | |
| 279 | +} | |
| 280 | +EXPORT_SYMBOL(udelay); | |
| @@ -53,7 +53,7 @@ static void uncached_ipi_visibility(void *data) · 52 unmodified lines | ||
| 53 | 53 | if ((status != PAL_VISIBILITY_OK) && |
| 54 | 54 | (status != PAL_VISIBILITY_OK_REMOTE_NEEDED)) |
| 55 | 55 | printk(KERN_DEBUG "pal_prefetch_visibility() returns %i on " |
| 56 | − "CPU %i\n", status, get_cpu()); | |
| 56 | + "CPU %i\n", status, raw_smp_processor_id()); | |
| 57 | 57 | } |
| 58 | 58 | |
| 59 | 59 | |
| @@ -63,7 +63,7 @@ static void uncached_ipi_mc_drain(void *data) · 3 unmodified lines | ||
| 63 | 63 | status = ia64_pal_mc_drain(); |
| 64 | 64 | if (status) |
| 65 | 65 | printk(KERN_WARNING "ia64_pal_mc_drain() failed with %i on " |
| 66 | − "CPU %i\n", status, get_cpu()); | |
| 66 | + "CPU %i\n", status, raw_smp_processor_id()); | |
| 67 | 67 | } |
| 68 | 68 | |
| 69 | 69 | |
| @@ -105,7 +105,7 @@ uncached_get_new_chunk(struct gen_pool *poolp) · 35 unmodified lines | ||
| 105 | 105 | status = ia64_pal_prefetch_visibility(PAL_VISIBILITY_PHYSICAL); |
| 106 | 106 | |
| 107 | 107 | dprintk(KERN_INFO "pal_prefetch_visibility() returns %i on cpu %i\n", |
| 108 | − status, get_cpu()); | |
| 108 | + status, raw_smp_processor_id()); | |
| 109 | 109 | |
| 110 | 110 | if (!status) { |
| 111 | 111 | status = smp_call_function(uncached_ipi_visibility, NULL, 0, 1); |
| @@ -177,6 +177,9 @@ SECTIONS · 176 unmodified lines | ||
| 177 | 177 | } |
| 178 | 178 | . = ALIGN(PAGE_SIZE); /* make sure the gate page doesn't expose kernel data */ |
| 179 | 179 | |
| 180 | + .data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET) | |
| 181 | + { *(.data.read_mostly) } | |
| 182 | + | |
| 180 | 183 | .data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET) |
| 181 | 184 | { *(.data.cacheline_aligned) } |
| 182 | 185 | |
| @@ -202,7 +202,7 @@ sn2_global_tlb_purge(struct mm_struct *mm, unsigned long start, · 201 unmodified lines | ||
| 202 | 202 | unsigned long end, unsigned long nbits) |
| 203 | 203 | { |
| 204 | 204 | int i, opt, shub1, cnode, mynasid, cpu, lcpu = 0, nasid, flushed = 0; |
| 205 | − int mymm = (mm == current->active_mm); | |
| 205 | + int mymm = (mm == current->active_mm && current->mm); | |
| 206 | 206 | volatile unsigned long *ptc0, *ptc1; |
| 207 | 207 | unsigned long itc, itc2, flags, data0 = 0, data1 = 0, rr_value; |
| 208 | 208 | short nasids[MAX_NUMNODES], nix; |
| @@ -84,14 +84,6 @@ __delay (unsigned long loops) · 83 unmodified lines | ||
| 84 | 84 | ia64_delay_loop (loops - 1); |
| 85 | 85 | } |
| 86 | 86 | |
| 87 | −static __inline__ void | |
| 88 | −udelay (unsigned long usecs) | |
| 89 | −{ | |
| 90 | − unsigned long start = ia64_get_itc(); | |
| 91 | − unsigned long cycles = usecs*local_cpu_data->cyc_per_usec; | |
| 92 | − | |
| 93 | − while (ia64_get_itc() - start < cycles) | |
| 94 | − cpu_relax(); | |
| 95 | −} | |
| 87 | +extern void udelay (unsigned long usecs); | |
| 96 | 88 | |
| 97 | 89 | #endif /* _ASM_IA64_DELAY_H */ |
| @@ -13,7 +13,7 @@ · 12 unmodified lines | ||
| 13 | 13 | #define SMP_CACHE_BYTES L1_CACHE_BYTES |
| 14 | 14 | #endif |
| 15 | 15 | |
| 16 | −#if defined(CONFIG_X86) || defined(CONFIG_SPARC64) | |
| 16 | +#if defined(CONFIG_X86) || defined(CONFIG_SPARC64) || defined(CONFIG_IA64) | |
| 17 | 17 | #define __read_mostly __attribute__((__section__(".data.read_mostly"))) |
| 18 | 18 | #else |
| 19 | 19 | #define __read_mostly |