Pull networking updates from David Miller: "This is a re-do of the net-next pull request for the current merge window. The only difference from the one I made the other day is that this has Eliezer's interface renames and the timeout handling changes made based upon your feedback, as well as a few bug fixes that have trickeled in. Highlights: 1) Low latency device polling, eliminating the cost of interrupt handling and context switches. Allows direct polling of a network device from socket operations, such as recvmsg() and poll(). Currently ixgbe, mlx4, and bnx2x support this feature. Full high level description, performance numbers, and design in commit 0a4db187a999 ("Merge branch 'll_poll'") From Eliezer Tamir. 2) With the routing cache removed, ip_check_mc_rcu() gets exercised more than ever before in the case where we have lots of multicast addresses. Use a hash table instead of a simple linked list, from Eric Dumazet. 3) Add driver for Atheros CQA98xx 802.11ac wireless devices, from Bartosz Markowski, Janusz Dziedzic, Kalle Valo, Marek Kwaczynski, Marek Puzyniak, Michal Kazior, and Sujith Manoharan. 4) Support reporting the TUN device persist flag to userspace, from Pavel Emelyanov. 5) Allow controlling network device VF link state using netlink, from Rony Efraim. 6) Support GRE tunneling in openvswitch, from Pravin B Shelar. 7) Adjust SOCK_MIN_RCVBUF and SOCK_MIN_SNDBUF for modern times, from Daniel Borkmann and Eric Dumazet. 8) Allow controlling of TCP quickack behavior on a per-route basis, from Cong Wang. 9) Several bug fixes and improvements to vxlan from Stephen Hemminger, Pravin B Shelar, and Mike Rapoport. In particular, support receiving on multiple UDP ports. 10) Major cleanups, particular in the area of debugging and cookie lifetime handline, to the SCTP protocol code. From Daniel Borkmann. 11) Allow packets to cross network namespaces when traversing tunnel devices. From Nicolas Dichtel. 12) Allow monitoring netlink traffic via AF_PACKET sockets, in a manner akin to how we monitor real network traffic via ptype_all. From Daniel Borkmann. 13) Several bug fixes and improvements for the new alx device driver, from Johannes Berg. 14) Fix scalability issues in the netem packet scheduler's time queue, by using an rbtree. From Eric Dumazet. 15) Several bug fixes in TCP loss recovery handling, from Yuchung Cheng. 16) Add support for GSO segmentation of MPLS packets, from Simon Horman. 17) Make network notifiers have a real data type for the opaque pointer that's passed into them. Use this to properly handle network device flag changes in arp_netdev_event(). From Jiri Pirko and Timo Teräs. 18) Convert several drivers over to module_pci_driver(), from Peter Huewe. 19) tcp_fixup_rcvbuf() can loop 500 times over loopback, just use a O(1) calculation instead. From Eric Dumazet. 20) Support setting of explicit tunnel peer addresses in ipv6, just like ipv4. From Nicolas Dichtel. 21) Protect x86 BPF JIT against spraying attacks, from Eric Dumazet. 22) Prevent a single high rate flow from overruning an individual cpu during RX packet processing via selective flow shedding. From Willem de Bruijn. 23) Don't use spinlocks in TCP md5 signing fast paths, from Eric Dumazet. 24) Don't just drop GSO packets which are above the TBF scheduler's burst limit, chop them up so they are in-bounds instead. Also from Eric Dumazet. 25) VLAN offloads are missed when configured on top of a bridge, fix from Vlad Yasevich. 26) Support IPV6 in ping sockets. From Lorenzo Colitti. 27) Receive flow steering targets should be updated at poll() time too, from David Majnemer. 28) Fix several corner case regressions in PMTU/redirect handling due to the routing cache removal, from Timo Teräs. 29) We have to be mindful of ipv4 mapped ipv6 sockets in upd_v6_push_pending_frames(). From Hannes Frederic Sowa. 30) Fix L2TP sequence number handling bugs, from James Chapman." * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1214 commits) drivers/net: caif: fix wrong rtnl_is_locked() usage drivers/net: enic: release rtnl_lock on error-path vhost-net: fix use-after-free in vhost_net_flush net: mv643xx_eth: do not use port number as platform device id net: sctp: confirm route during forward progress virtio_net: fix race in RX VQ processing virtio: support unlocked queue poll net/cadence/macb: fix bug/typo in extracting gem_irq_read_clear bit Documentation: Fix references to defunct linux-net@vger.kernel.org net/fs: change busy poll time accounting net: rename low latency sockets functions to busy poll bridge: fix some kernel warning in multicast timer sfc: Fix memory leak when discarding scattered packets sit: fix tunnel update via netlink dt:net:stmmac: Add dt specific phy reset callback support. dt:net:stmmac: Add support to dwmac version 3.610 and 3.710 dt:net:stmmac: Allocate platform data only if its NULL. net:stmmac: fix memleak in the open method ipv6: rt6_check_neigh should successfully verify neigh if no NUD information are available net: ipv6: fix wrong ping_v6_sendmsg return value ...
Unified · Split
| @@ -127,14 +127,11 @@ · 126 unmodified lines | ||
| 127 | 127 | !Finclude/net/cfg80211.h cfg80211_ibss_params |
| 128 | 128 | !Finclude/net/cfg80211.h cfg80211_connect_params |
| 129 | 129 | !Finclude/net/cfg80211.h cfg80211_pmksa |
| 130 | −!Finclude/net/cfg80211.h cfg80211_send_rx_auth | |
| 131 | −!Finclude/net/cfg80211.h cfg80211_send_auth_timeout | |
| 132 | −!Finclude/net/cfg80211.h cfg80211_send_rx_assoc | |
| 133 | −!Finclude/net/cfg80211.h cfg80211_send_assoc_timeout | |
| 134 | −!Finclude/net/cfg80211.h cfg80211_send_deauth | |
| 135 | −!Finclude/net/cfg80211.h __cfg80211_send_deauth | |
| 136 | −!Finclude/net/cfg80211.h cfg80211_send_disassoc | |
| 137 | −!Finclude/net/cfg80211.h __cfg80211_send_disassoc | |
| 130 | +!Finclude/net/cfg80211.h cfg80211_rx_mlme_mgmt | |
| 131 | +!Finclude/net/cfg80211.h cfg80211_auth_timeout | |
| 132 | +!Finclude/net/cfg80211.h cfg80211_rx_assoc_resp | |
| 133 | +!Finclude/net/cfg80211.h cfg80211_assoc_timeout | |
| 134 | +!Finclude/net/cfg80211.h cfg80211_tx_mlme_mgmt | |
| 138 | 135 | !Finclude/net/cfg80211.h cfg80211_ibss_joined |
| 139 | 136 | !Finclude/net/cfg80211.h cfg80211_connect_result |
| 140 | 137 | !Finclude/net/cfg80211.h cfg80211_roamed |
| @@ -0,0 +1,22 @@ | ||
| 1 | +* Allwinner EMAC ethernet controller | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible: should be "allwinner,sun4i-emac". | |
| 5 | +- reg: address and length of the register set for the device. | |
| 6 | +- interrupts: interrupt for the device | |
| 7 | +- phy: A phandle to a phy node defining the PHY address (as the reg | |
| 8 | + property, a single integer). | |
| 9 | +- clocks: A phandle to the reference clock for this device | |
| 10 | + | |
| 11 | +Optional properties: | |
| 12 | +- (local-)mac-address: mac address to be used by this driver | |
| 13 | + | |
| 14 | +Example: | |
| 15 | + | |
| 16 | +emac: ethernet@01c0b000 { | |
| 17 | + compatible = "allwinner,sun4i-emac"; | |
| 18 | + reg = <0x01c0b000 0x1000>; | |
| 19 | + interrupts = <55>; | |
| 20 | + clocks = <&ahb_gates 17>; | |
| 21 | + phy = <&phy0>; | |
| 22 | +}; | |
| @@ -0,0 +1,26 @@ | ||
| 1 | +* Allwinner A10 MDIO Ethernet Controller interface | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible: should be "allwinner,sun4i-mdio". | |
| 5 | +- reg: address and length of the register set for the device. | |
| 6 | + | |
| 7 | +Optional properties: | |
| 8 | +- phy-supply: phandle to a regulator if the PHY needs one | |
| 9 | + | |
| 10 | +Example at the SoC level: | |
| 11 | +mdio@01c0b080 { | |
| 12 | + compatible = "allwinner,sun4i-mdio"; | |
| 13 | + reg = <0x01c0b080 0x14>; | |
| 14 | + #address-cells = <1>; | |
| 15 | + #size-cells = <0>; | |
| 16 | +}; | |
| 17 | + | |
| 18 | +And at the board level: | |
| 19 | + | |
| 20 | +mdio@01c0b080 { | |
| 21 | + phy-supply = <®_emac_3v3>; | |
| 22 | + | |
| 23 | + phy0: ethernet-phy@0 { | |
| 24 | + reg = <0>; | |
| 25 | + }; | |
| 26 | +}; | |
| @@ -0,0 +1,38 @@ | ||
| 1 | +* Synopsys ARC EMAC 10/100 Ethernet driver (EMAC) | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible: Should be "snps,arc-emac" | |
| 5 | +- reg: Address and length of the register set for the device | |
| 6 | +- interrupts: Should contain the EMAC interrupts | |
| 7 | +- clock-frequency: CPU frequency. It is needed to calculate and set polling | |
| 8 | +period of EMAC. | |
| 9 | +- max-speed: Maximum supported data-rate in Mbit/s. In some HW configurations | |
| 10 | +bandwidth of external memory controller might be a limiting factor. That's why | |
| 11 | +it's required to specify which data-rate is supported on current SoC or FPGA. | |
| 12 | +For example if only 10 Mbit/s is supported (10BASE-T) set "10". If 100 Mbit/s is | |
| 13 | +supported (100BASE-TX) set "100". | |
| 14 | +- phy: PHY device attached to the EMAC via MDIO bus | |
| 15 | + | |
| 16 | +Child nodes of the driver are the individual PHY devices connected to the | |
| 17 | +MDIO bus. They must have a "reg" property given the PHY address on the MDIO bus. | |
| 18 | + | |
| 19 | +Optional properties: | |
| 20 | +- mac-address: 6 bytes, mac address | |
| 21 | + | |
| 22 | +Examples: | |
| 23 | + | |
| 24 | + ethernet@c0fc2000 { | |
| 25 | + compatible = "snps,arc-emac"; | |
| 26 | + reg = <0xc0fc2000 0x3c>; | |
| 27 | + interrupts = <6>; | |
| 28 | + mac-address = [ 00 11 22 33 44 55 ]; | |
| 29 | + clock-frequency = <80000000>; | |
| 30 | + max-speed = <100>; | |
| 31 | + phy = <&phy0>; | |
| 32 | + | |
| 33 | + #address-cells = <1>; | |
| 34 | + #size-cells = <0>; | |
| 35 | + phy0: ethernet-phy@0 { | |
| 36 | + reg = <1>; | |
| 37 | + }; | |
| 38 | + }; | |
| @@ -16,6 +16,8 @@ Optional properties: · 15 unmodified lines | ||
| 16 | 16 | |
| 17 | 17 | - clock-frequency : The oscillator frequency driving the flexcan device |
| 18 | 18 | |
| 19 | +- xceiver-supply: Regulator that powers the CAN transceiver | |
| 20 | + | |
| 19 | 21 | Example: |
| 20 | 22 | |
| 21 | 23 | can@1c000 { |
| @@ -28,6 +28,8 @@ Optional properties: · 27 unmodified lines | ||
| 28 | 28 | Slave Properties: |
| 29 | 29 | Required properties: |
| 30 | 30 | - phy_id : Specifies slave phy id |
| 31 | +- phy-mode : The interface between the SoC and the PHY (a string | |
| 32 | + that of_get_phy_mode() can understand) | |
| 31 | 33 | - mac-address : Specifies slave MAC address |
| 32 | 34 | |
| 33 | 35 | Optional properties: |
| @@ -58,11 +60,13 @@ Examples: · 24 unmodified lines | ||
| 58 | 60 | cpts_clock_shift = <29>; |
| 59 | 61 | cpsw_emac0: slave@0 { |
| 60 | 62 | phy_id = <&davinci_mdio>, <0>; |
| 63 | + phy-mode = "rgmii-txid"; | |
| 61 | 64 | /* Filled in by U-Boot */ |
| 62 | 65 | mac-address = [ 00 00 00 00 00 00 ]; |
| 63 | 66 | }; |
| 64 | 67 | cpsw_emac1: slave@1 { |
| 65 | 68 | phy_id = <&davinci_mdio>, <1>; |
| 69 | + phy-mode = "rgmii-txid"; | |
| 66 | 70 | /* Filled in by U-Boot */ |
| 67 | 71 | mac-address = [ 00 00 00 00 00 00 ]; |
| 68 | 72 | }; |
| @@ -84,11 +88,13 @@ Examples: · 15 unmodified lines | ||
| 84 | 88 | cpts_clock_shift = <29>; |
| 85 | 89 | cpsw_emac0: slave@0 { |
| 86 | 90 | phy_id = <&davinci_mdio>, <0>; |
| 91 | + phy-mode = "rgmii-txid"; | |
| 87 | 92 | /* Filled in by U-Boot */ |
| 88 | 93 | mac-address = [ 00 00 00 00 00 00 ]; |
| 89 | 94 | }; |
| 90 | 95 | cpsw_emac1: slave@1 { |
| 91 | 96 | phy_id = <&davinci_mdio>, <1>; |
| 97 | + phy-mode = "rgmii-txid"; | |
| 92 | 98 | /* Filled in by U-Boot */ |
| 93 | 99 | mac-address = [ 00 00 00 00 00 00 ]; |
| 94 | 100 | }; |
| @@ -0,0 +1,26 @@ | ||
| 1 | +Davicom DM9000 Fast Ethernet controller | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible = "davicom,dm9000"; | |
| 5 | +- reg : physical addresses and sizes of registers, must contain 2 entries: | |
| 6 | + first entry : address register, | |
| 7 | + second entry : data register. | |
| 8 | +- interrupt-parent : interrupt controller to which the device is connected | |
| 9 | +- interrupts : interrupt specifier specific to interrupt controller | |
| 10 | + | |
| 11 | +Optional properties: | |
| 12 | +- local-mac-address : A bytestring of 6 bytes specifying Ethernet MAC address | |
| 13 | + to use (from firmware or bootloader) | |
| 14 | +- davicom,no-eeprom : Configuration EEPROM is not available | |
| 15 | +- davicom,ext-phy : Use external PHY | |
| 16 | + | |
| 17 | +Example: | |
| 18 | + | |
| 19 | + ethernet@18000000 { | |
| 20 | + compatible = "davicom,dm9000"; | |
| 21 | + reg = <0x18000000 0x2 0x18000004 0x2>; | |
| 22 | + interrupt-parent = <&gpn>; | |
| 23 | + interrupts = <7 4>; | |
| 24 | + local-mac-address = [00 00 de ad be ef]; | |
| 25 | + davicom,no-eeprom; | |
| 26 | + }; | |
| @@ -0,0 +1,85 @@ | ||
| 1 | +Marvell Orion/Discovery ethernet controller | |
| 2 | +============================================= | |
| 3 | + | |
| 4 | +The Marvell Discovery ethernet controller can be found on Marvell Orion SoCs | |
| 5 | +(Kirkwood, Dove, Orion5x, and Discovery Innovation) and as part of Marvell | |
| 6 | +Discovery system controller chips (mv64[345]60). | |
| 7 | + | |
| 8 | +The Discovery ethernet controller is described with two levels of nodes. The | |
| 9 | +first level describes the ethernet controller itself and the second level | |
| 10 | +describes up to 3 ethernet port nodes within that controller. The reason for | |
| 11 | +the multiple levels is that the port registers are interleaved within a single | |
| 12 | +set of controller registers. Each port node describes port-specific properties. | |
| 13 | + | |
| 14 | +Note: The above separation is only true for Discovery system controllers. | |
| 15 | +For Orion SoCs we stick to the separation, although there each controller has | |
| 16 | +only one port associated. Multiple ports are implemented as multiple single-port | |
| 17 | +controllers. As Kirkwood has some issues with proper initialization after reset, | |
| 18 | +an extra compatible string is added for it. | |
| 19 | + | |
| 20 | +* Ethernet controller node | |
| 21 | + | |
| 22 | +Required controller properties: | |
| 23 | + - #address-cells: shall be 1. | |
| 24 | + - #size-cells: shall be 0. | |
| 25 | + - compatible: shall be one of "marvell,orion-eth", "marvell,kirkwood-eth". | |
| 26 | + - reg: address and length of the controller registers. | |
| 27 | + | |
| 28 | +Optional controller properties: | |
| 29 | + - clocks: phandle reference to the controller clock. | |
| 30 | + - marvell,tx-checksum-limit: max tx packet size for hardware checksum. | |
| 31 | + | |
| 32 | +* Ethernet port node | |
| 33 | + | |
| 34 | +Required port properties: | |
| 35 | + - device_type: shall be "network". | |
| 36 | + - compatible: shall be one of "marvell,orion-eth-port", | |
| 37 | + "marvell,kirkwood-eth-port". | |
| 38 | + - reg: port number relative to ethernet controller, shall be 0, 1, or 2. | |
| 39 | + - interrupts: port interrupt. | |
| 40 | + - local-mac-address: 6 bytes MAC address. | |
| 41 | + | |
| 42 | +Optional port properties: | |
| 43 | + - marvell,tx-queue-size: size of the transmit ring buffer. | |
| 44 | + - marvell,tx-sram-addr: address of transmit descriptor buffer located in SRAM. | |
| 45 | + - marvell,tx-sram-size: size of transmit descriptor buffer located in SRAM. | |
| 46 | + - marvell,rx-queue-size: size of the receive ring buffer. | |
| 47 | + - marvell,rx-sram-addr: address of receive descriptor buffer located in SRAM. | |
| 48 | + - marvell,rx-sram-size: size of receive descriptor buffer located in SRAM. | |
| 49 | + | |
| 50 | +and | |
| 51 | + | |
| 52 | + - phy-handle: phandle reference to ethernet PHY. | |
| 53 | + | |
| 54 | +or | |
| 55 | + | |
| 56 | + - speed: port speed if no PHY connected. | |
| 57 | + - duplex: port mode if no PHY connected. | |
| 58 | + | |
| 59 | +* Node example: | |
| 60 | + | |
| 61 | +mdio-bus { | |
| 62 | + ... | |
| 63 | + ethphy: ethernet-phy@8 { | |
| 64 | + device_type = "ethernet-phy"; | |
| 65 | + ... | |
| 66 | + }; | |
| 67 | +}; | |
| 68 | + | |
| 69 | +eth: ethernet-controller@72000 { | |
| 70 | + compatible = "marvell,orion-eth"; | |
| 71 | + #address-cells = <1>; | |
| 72 | + #size-cells = <0>; | |
| 73 | + reg = <0x72000 0x2000>; | |
| 74 | + clocks = <&gate_clk 2>; | |
| 75 | + marvell,tx-checksum-limit = <1600>; | |
| 76 | + | |
| 77 | + ethernet@0 { | |
| 78 | + device_type = "network"; | |
| 79 | + compatible = "marvell,orion-eth-port"; | |
| 80 | + reg = <0>; | |
| 81 | + interrupts = <29>; | |
| 82 | + phy-handle = <ðphy>; | |
| 83 | + local-mac-address = [00 00 00 00 00 00]; | |
| 84 | + }; | |
| 85 | +}; | |
| @@ -0,0 +1,9 @@ | ||
| 1 | +Micrel KS8851 Ethernet mac | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible = "micrel,ks8851-ml" of parallel interface | |
| 5 | +- reg : 2 physical address and size of registers for data and command | |
| 6 | +- interrupts : interrupt connection | |
| 7 | + | |
| 8 | +Optional properties: | |
| 9 | +- local-mac-address : Ethernet mac address to use | |
| @@ -12,6 +12,16 @@ Required properties: · 11 unmodified lines | ||
| 12 | 12 | property |
| 13 | 13 | - phy-mode: String, operation mode of the PHY interface. |
| 14 | 14 | Supported values are: "mii", "rmii", "gmii", "rgmii". |
| 15 | +- snps,phy-addr phy address to connect to. | |
| 16 | +- snps,reset-gpio gpio number for phy reset. | |
| 17 | +- snps,reset-active-low boolean flag to indicate if phy reset is active low. | |
| 18 | +- snps,reset-delays-us is triplet of delays | |
| 19 | + The 1st cell is reset pre-delay in micro seconds. | |
| 20 | + The 2nd cell is reset pulse in micro seconds. | |
| 21 | + The 3rd cell is reset post-delay in micro seconds. | |
| 22 | +- snps,pbl Programmable Burst Length | |
| 23 | +- snps,fixed-burst Program the DMA to use the fixed burst mode | |
| 24 | +- snps,mixed-burst Program the DMA to use the mixed burst mode | |
| 15 | 25 | |
| 16 | 26 | Optional properties: |
| 17 | 27 | - mac-address: 6 bytes, mac address |
| @@ -0,0 +1,20 @@ | ||
| 1 | +* VIA Velocity 10/100/1000 Network Controller | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible : Should be "via,velocity-vt6110" | |
| 5 | +- reg : Address and length of the io space | |
| 6 | +- interrupts : Should contain the controller interrupt line | |
| 7 | + | |
| 8 | +Optional properties: | |
| 9 | +- no-eeprom : PCI network cards use an external EEPROM to store data. Embedded | |
| 10 | + devices quite often set this data in uboot and do not provide an eeprom. | |
| 11 | + Specify this option if you have no external eeprom. | |
| 12 | + | |
| 13 | +Examples: | |
| 14 | + | |
| 15 | +eth0@d8004000 { | |
| 16 | + compatible = "via,velocity-vt6110"; | |
| 17 | + reg = <0xd8004000 0x400>; | |
| 18 | + interrupts = <10>; | |
| 19 | + no-eeprom; | |
| 20 | +}; | |
| @@ -18,6 +18,7 @@ chrp Common Hardware Reference Platform · 17 unmodified lines | ||
| 18 | 18 | cirrus Cirrus Logic, Inc. |
| 19 | 19 | cortina Cortina Systems, Inc. |
| 20 | 20 | dallas Maxim Integrated Products (formerly Dallas Semiconductor) |
| 21 | +davicom DAVICOM Semiconductor, Inc. | |
| 21 | 22 | denx Denx Software Engineering |
| 22 | 23 | emmicro EM Microelectronic |
| 23 | 24 | epson Seiko Epson Corp. |
| @@ -1 +0,0 @@ | ||
| 1 | −ifenslave | |
| @@ -88,8 +88,6 @@ gianfar.txt · 87 unmodified lines | ||
| 88 | 88 | - Gianfar Ethernet Driver. |
| 89 | 89 | ieee802154.txt |
| 90 | 90 | - Linux IEEE 802.15.4 implementation, API and drivers |
| 91 | −ifenslave.c | |
| 92 | − - Configure network interfaces for parallel routing (bonding). | |
| 93 | 91 | igb.txt |
| 94 | 92 | - README for the Intel Gigabit Ethernet Driver (igb). |
| 95 | 93 | igbvf.txt |
| @@ -1,11 +1,6 @@ | ||
| 1 | 1 | # kbuild trick to avoid linker error. Can be omitted if a module is built. |
| 2 | 2 | obj- := dummy.o |
| 3 | 3 | |
| 4 | −# List of programs to build | |
| 5 | −hostprogs-y := ifenslave | |
| 6 | − | |
| 7 | −HOSTCFLAGS_ifenslave.o += -I$(objtree)/usr/include | |
| 8 | − | |
| 9 | 4 | # Tell kbuild to always build the programs |
| 10 | 5 | always := $(hostprogs-y) |
| 11 | 6 | |
| @@ -70,9 +70,10 @@ list, mail to linux-arcnet@tichy.ch.uj.edu.pl. · 69 unmodified lines | ||
| 70 | 70 | There are archives of the mailing list at: |
| 71 | 71 | http://epistolary.org/mailman/listinfo.cgi/arcnet |
| 72 | 72 | |
| 73 | −The people on linux-net@vger.kernel.org have also been known to be very | |
| 74 | −helpful, especially when we're talking about ALPHA Linux kernels that may or | |
| 75 | −may not work right in the first place. | |
| 73 | +The people on linux-net@vger.kernel.org (now defunct, replaced by | |
| 74 | +netdev@vger.kernel.org) have also been known to be very helpful, especially | |
| 75 | +when we're talking about ALPHA Linux kernels that may or may not work right | |
| 76 | +in the first place. | |
| 76 | 77 | |
| 77 | 78 | |
| 78 | 79 | Other Drivers and Info |
| @@ -104,8 +104,7 @@ Table of Contents · 103 unmodified lines | ||
| 104 | 104 | ============================== |
| 105 | 105 | |
| 106 | 106 | Most popular distro kernels ship with the bonding driver |
| 107 | −already available as a module and the ifenslave user level control | |
| 108 | −program installed and ready for use. If your distro does not, or you | |
| 107 | +already available as a module. If your distro does not, or you | |
| 109 | 108 | have need to compile bonding from source (e.g., configuring and |
| 110 | 109 | installing a mainline kernel from kernel.org), you'll need to perform |
| 111 | 110 | the following steps: |
| @@ -124,46 +123,13 @@ device support" section. It is recommended that you configure the · 12 unmodified lines | ||
| 124 | 123 | driver as module since it is currently the only way to pass parameters |
| 125 | 124 | to the driver or configure more than one bonding device. |
| 126 | 125 | |
| 127 | − Build and install the new kernel and modules, then continue | |
| 128 | −below to install ifenslave. | |
| 126 | + Build and install the new kernel and modules. | |
| 129 | 127 | |
| 130 | −1.2 Install ifenslave Control Utility | |
| 128 | +1.2 Bonding Control Utility | |
| 131 | 129 | ------------------------------------- |
| 132 | 130 | |
| 133 | − The ifenslave user level control program is included in the | |
| 134 | −kernel source tree, in the file Documentation/networking/ifenslave.c. | |
| 135 | −It is generally recommended that you use the ifenslave that | |
| 136 | −corresponds to the kernel that you are using (either from the same | |
| 137 | −source tree or supplied with the distro), however, ifenslave | |
| 138 | −executables from older kernels should function (but features newer | |
| 139 | −than the ifenslave release are not supported). Running an ifenslave | |
| 140 | −that is newer than the kernel is not supported, and may or may not | |
| 141 | −work. | |
| 142 | − | |
| 143 | − To install ifenslave, do the following: | |
| 144 | − | |
| 145 | −# gcc -Wall -O -I/usr/src/linux/include ifenslave.c -o ifenslave | |
| 146 | −# cp ifenslave /sbin/ifenslave | |
| 147 | − | |
| 148 | − If your kernel source is not in "/usr/src/linux," then replace | |
| 149 | −"/usr/src/linux/include" in the above with the location of your kernel | |
| 150 | −source include directory. | |
| 151 | − | |
| 152 | − You may wish to back up any existing /sbin/ifenslave, or, for | |
| 153 | −testing or informal use, tag the ifenslave to the kernel version | |
| 154 | −(e.g., name the ifenslave executable /sbin/ifenslave-2.6.10). | |
| 155 | − | |
| 156 | −IMPORTANT NOTE: | |
| 157 | − | |
| 158 | − If you omit the "-I" or specify an incorrect directory, you | |
| 159 | −may end up with an ifenslave that is incompatible with the kernel | |
| 160 | −you're trying to build it for. Some distros (e.g., Red Hat from 7.1 | |
| 161 | −onwards) do not have /usr/include/linux symbolically linked to the | |
| 162 | −default kernel source include directory. | |
| 163 | − | |
| 164 | −SECOND IMPORTANT NOTE: | |
| 165 | − If you plan to configure bonding using sysfs or using the | |
| 166 | −/etc/network/interfaces file, you do not need to use ifenslave. | |
| 131 | + It is recommended to configure bonding via iproute2 (netlink) | |
| 132 | +or sysfs, the old ifenslave control utility is obsolete. | |
| 167 | 133 | |
| 168 | 134 | 2. Bonding Driver Options |
| 169 | 135 | ========================= |
| @@ -337,6 +303,12 @@ arp_validate · 167 unmodified lines | ||
| 337 | 303 | such a situation, validation of backup slaves must be |
| 338 | 304 | disabled. |
| 339 | 305 | |
| 306 | + The validation of ARP requests on backup slaves is mainly | |
| 307 | + helping bonding to decide which slaves are more likely to | |
| 308 | + work in case of the active slave failure, it doesn't really | |
| 309 | + guarantee that the backup slave will work if it's selected | |
| 310 | + as the next active slave. | |
| 311 | + | |
| 340 | 312 | This option is useful in network configurations in which |
| 341 | 313 | multiple bonding hosts are concurrently issuing ARPs to one or |
| 342 | 314 | more targets beyond a common switch. Should the link between |
| @@ -349,6 +321,25 @@ arp_validate · 6 unmodified lines | ||
| 349 | 321 | |
| 350 | 322 | This option was added in bonding version 3.1.0. |
| 351 | 323 | |
| 324 | +arp_all_targets | |
| 325 | + | |
| 326 | + Specifies the quantity of arp_ip_targets that must be reachable | |
| 327 | + in order for the ARP monitor to consider a slave as being up. | |
| 328 | + This option affects only active-backup mode for slaves with | |
| 329 | + arp_validation enabled. | |
| 330 | + | |
| 331 | + Possible values are: | |
| 332 | + | |
| 333 | + any or 0 | |
| 334 | + | |
| 335 | + consider the slave up only when any of the arp_ip_targets | |
| 336 | + is reachable | |
| 337 | + | |
| 338 | + all or 1 | |
| 339 | + | |
| 340 | + consider the slave up only when all of the arp_ip_targets | |
| 341 | + are reachable | |
| 342 | + | |
| 352 | 343 | downdelay |
| 353 | 344 | |
| 354 | 345 | Specifies the time, in milliseconds, to wait before disabling |
| @@ -851,7 +842,7 @@ resend_igmp · 496 unmodified lines | ||
| 851 | 842 | ============================== |
| 852 | 843 | |
| 853 | 844 | You can configure bonding using either your distro's network |
| 854 | −initialization scripts, or manually using either ifenslave or the | |
| 845 | +initialization scripts, or manually using either iproute2 or the | |
| 855 | 846 | sysfs interface. Distros generally use one of three packages for the |
| 856 | 847 | network initialization scripts: initscripts, sysconfig or interfaces. |
| 857 | 848 | Recent versions of these packages have support for bonding, while older |
| @@ -1160,7 +1151,7 @@ not support this method for specifying multiple bonding interfaces; for · 302 unmodified lines | ||
| 1160 | 1151 | those instances, see the "Configuring Multiple Bonds Manually" section, |
| 1161 | 1152 | below. |
| 1162 | 1153 | |
| 1163 | −3.3 Configuring Bonding Manually with Ifenslave | |
| 1154 | +3.3 Configuring Bonding Manually with iproute2 | |
| 1164 | 1155 | ----------------------------------------------- |
| 1165 | 1156 | |
| 1166 | 1157 | This section applies to distros whose network initialization |
| @@ -1171,7 +1162,7 @@ version 8. · 4 unmodified lines | ||
| 1171 | 1162 | The general method for these systems is to place the bonding |
| 1172 | 1163 | module parameters into a config file in /etc/modprobe.d/ (as |
| 1173 | 1164 | appropriate for the installed distro), then add modprobe and/or |
| 1174 | −ifenslave commands to the system's global init script. The name of | |
| 1165 | +`ip link` commands to the system's global init script. The name of | |
| 1175 | 1166 | the global init script differs; for sysconfig, it is |
| 1176 | 1167 | /etc/init.d/boot.local and for initscripts it is /etc/rc.d/rc.local. |
| 1177 | 1168 | |
| @@ -1183,8 +1174,8 @@ reboots, edit the appropriate file (/etc/init.d/boot.local or · 5 unmodified lines | ||
| 1183 | 1174 | modprobe bonding mode=balance-alb miimon=100 |
| 1184 | 1175 | modprobe e100 |
| 1185 | 1176 | ifconfig bond0 192.168.1.1 netmask 255.255.255.0 up |
| 1186 | −ifenslave bond0 eth0 | |
| 1187 | −ifenslave bond0 eth1 | |
| 1177 | +ip link set eth0 master bond0 | |
| 1178 | +ip link set eth1 master bond0 | |
| 1188 | 1179 | |
| 1189 | 1180 | Replace the example bonding module parameters and bond0 |
| 1190 | 1181 | network configuration (IP address, netmask, etc) with the appropriate |
| @@ -1,1105 +0,0 @@ | ||
| 1 | −/* Mode: C; | |
| 2 | − * ifenslave.c: Configure network interfaces for parallel routing. | |
| 3 | − * | |
| 4 | − * This program controls the Linux implementation of running multiple | |
| 5 | − * network interfaces in parallel. | |
| 6 | − * | |
| 7 | − * Author: Donald Becker <becker@cesdis.gsfc.nasa.gov> | |
| 8 | − * Copyright 1994-1996 Donald Becker | |
| 9 | − * | |
| 10 | − * This program is free software; you can redistribute it | |
| 11 | − * and/or modify it under the terms of the GNU General Public | |
| 12 | − * License as published by the Free Software Foundation. | |
| 13 | − * | |
| 14 | − * The author may be reached as becker@CESDIS.gsfc.nasa.gov, or C/O | |
| 15 | − * Center of Excellence in Space Data and Information Sciences | |
| 16 | − * Code 930.5, Goddard Space Flight Center, Greenbelt MD 20771 | |
| 17 | − * | |
| 18 | − * Changes : | |
| 19 | − * - 2000/10/02 Willy Tarreau <willy at meta-x.org> : | |
| 20 | − * - few fixes. Master's MAC address is now correctly taken from | |
| 21 | − * the first device when not previously set ; | |
| 22 | − * - detach support : call BOND_RELEASE to detach an enslaved interface. | |
| 23 | − * - give a mini-howto from command-line help : # ifenslave -h | |
| 24 | − * | |
| 25 | − * - 2001/02/16 Chad N. Tindel <ctindel at ieee dot org> : | |
| 26 | − * - Master is now brought down before setting the MAC address. In | |
| 27 | − * the 2.4 kernel you can't change the MAC address while the device is | |
| 28 | − * up because you get EBUSY. | |
| 29 | − * | |
| 30 | − * - 2001/09/13 Takao Indoh <indou dot takao at jp dot fujitsu dot com> | |
| 31 | − * - Added the ability to change the active interface on a mode 1 bond | |
| 32 | − * at runtime. | |
| 33 | − * | |
| 34 | − * - 2001/10/23 Chad N. Tindel <ctindel at ieee dot org> : | |
| 35 | − * - No longer set the MAC address of the master. The bond device will | |
| 36 | − * take care of this itself | |
| 37 | − * - Try the SIOC*** versions of the bonding ioctls before using the | |
| 38 | − * old versions | |
| 39 | − * - 2002/02/18 Erik Habbinga <erik_habbinga @ hp dot com> : | |
| 40 | − * - ifr2.ifr_flags was not initialized in the hwaddr_notset case, | |
| 41 | − * SIOCGIFFLAGS now called before hwaddr_notset test | |
| 42 | − * | |
| 43 | − * - 2002/10/31 Tony Cureington <tony.cureington * hp_com> : | |
| 44 | − * - If the master does not have a hardware address when the first slave | |
| 45 | − * is enslaved, the master is assigned the hardware address of that | |
| 46 | − * slave - there is a comment in bonding.c stating "ifenslave takes | |
| 47 | − * care of this now." This corrects the problem of slaves having | |
| 48 | − * different hardware addresses in active-backup mode when | |
| 49 | − * multiple interfaces are specified on a single ifenslave command | |
| 50 | − * (ifenslave bond0 eth0 eth1). | |
| 51 | − * | |
| 52 | − * - 2003/03/18 - Tsippy Mendelson <tsippy.mendelson at intel dot com> and | |
| 53 | − * Shmulik Hen <shmulik.hen at intel dot com> | |
| 54 | − * - Moved setting the slave's mac address and openning it, from | |
| 55 | − * the application to the driver. This enables support of modes | |
| 56 | − * that need to use the unique mac address of each slave. | |
| 57 | − * The driver also takes care of closing the slave and restoring its | |
| 58 | − * original mac address upon release. | |
| 59 | − * In addition, block possibility of enslaving before the master is up. | |
| 60 | − * This prevents putting the system in an undefined state. | |
| 61 | − * | |
| 62 | − * - 2003/05/01 - Amir Noam <amir.noam at intel dot com> | |
| 63 | − * - Added ABI version control to restore compatibility between | |
| 64 | − * new/old ifenslave and new/old bonding. | |
| 65 | − * - Prevent adding an adapter that is already a slave. | |
| 66 | − * Fixes the problem of stalling the transmission and leaving | |
| 67 | − * the slave in a down state. | |
| 68 | − * | |
| 69 | − * - 2003/05/01 - Shmulik Hen <shmulik.hen at intel dot com> | |
| 70 | − * - Prevent enslaving if the bond device is down. | |
| 71 | − * Fixes the problem of leaving the system in unstable state and | |
| 72 | − * halting when trying to remove the module. | |
| 73 | − * - Close socket on all abnormal exists. | |
| 74 | − * - Add versioning scheme that follows that of the bonding driver. | |
| 75 | − * current version is 1.0.0 as a base line. | |
| 76 | − * | |
| 77 | − * - 2003/05/22 - Jay Vosburgh <fubar at us dot ibm dot com> | |
| 78 | − * - ifenslave -c was broken; it's now fixed | |
| 79 | − * - Fixed problem with routes vanishing from master during enslave | |
| 80 | − * processing. | |
| 81 | − * | |
| 82 | − * - 2003/05/27 - Amir Noam <amir.noam at intel dot com> | |
| 83 | − * - Fix backward compatibility issues: | |
| 84 | − * For drivers not using ABI versions, slave was set down while | |
| 85 | − * it should be left up before enslaving. | |
| 86 | − * Also, master was not set down and the default set_mac_address() | |
| 87 | − * would fail and generate an error message in the system log. | |
| 88 | − * - For opt_c: slave should not be set to the master's setting | |
| 89 | − * while it is running. It was already set during enslave. To | |
| 90 | − * simplify things, it is now handled separately. | |
| 91 | − * | |
| 92 | − * - 2003/12/01 - Shmulik Hen <shmulik.hen at intel dot com> | |
| 93 | − * - Code cleanup and style changes | |
| 94 | − * set version to 1.1.0 | |
| 95 | − */ | |
| 96 | − | |
| 97 | −#define APP_VERSION "1.1.0" | |
| 98 | −#define APP_RELDATE "December 1, 2003" | |
| 99 | −#define APP_NAME "ifenslave" | |
| 100 | − | |
| 101 | −static char *version = | |
| 102 | −APP_NAME ".c:v" APP_VERSION " (" APP_RELDATE ")\n" | |
| 103 | −"o Donald Becker (becker@cesdis.gsfc.nasa.gov).\n" | |
| 104 | −"o Detach support added on 2000/10/02 by Willy Tarreau (willy at meta-x.org).\n" | |
| 105 | −"o 2.4 kernel support added on 2001/02/16 by Chad N. Tindel\n" | |
| 106 | −" (ctindel at ieee dot org).\n"; | |
| 107 | − | |
| 108 | −static const char *usage_msg = | |
| 109 | −"Usage: ifenslave [-f] <master-if> <slave-if> [<slave-if>...]\n" | |
| 110 | −" ifenslave -d <master-if> <slave-if> [<slave-if>...]\n" | |
| 111 | −" ifenslave -c <master-if> <slave-if>\n" | |
| 112 | −" ifenslave --help\n"; | |
| 113 | − | |
| 114 | −static const char *help_msg = | |
| 115 | −"\n" | |
| 116 | −" To create a bond device, simply follow these three steps :\n" | |
| 117 | −" - ensure that the required drivers are properly loaded :\n" | |
| 118 | −" # modprobe bonding ; modprobe <3c59x|eepro100|pcnet32|tulip|...>\n" | |
| 119 | −" - assign an IP address to the bond device :\n" | |
| 120 | −" # ifconfig bond0 <addr> netmask <mask> broadcast <bcast>\n" | |
| 121 | −" - attach all the interfaces you need to the bond device :\n" | |
| 122 | −" # ifenslave [{-f|--force}] bond0 eth0 [eth1 [eth2]...]\n" | |
| 123 | −" If bond0 didn't have a MAC address, it will take eth0's. Then, all\n" | |
| 124 | −" interfaces attached AFTER this assignment will get the same MAC addr.\n" | |
| 125 | −" (except for ALB/TLB modes)\n" | |
| 126 | −"\n" | |
| 127 | −" To set the bond device down and automatically release all the slaves :\n" | |
| 128 | −" # ifconfig bond0 down\n" | |
| 129 | −"\n" | |
| 130 | −" To detach a dead interface without setting the bond device down :\n" | |
| 131 | −" # ifenslave {-d|--detach} bond0 eth0 [eth1 [eth2]...]\n" | |
| 132 | −"\n" | |
| 133 | −" To change active slave :\n" | |
| 134 | −" # ifenslave {-c|--change-active} bond0 eth0\n" | |
| 135 | −"\n" | |
| 136 | −" To show master interface info\n" | |
| 137 | −" # ifenslave bond0\n" | |
| 138 | −"\n" | |
| 139 | −" To show all interfaces info\n" | |
| 140 | −" # ifenslave {-a|--all-interfaces}\n" | |
| 141 | −"\n" | |
| 142 | −" To be more verbose\n" | |
| 143 | −" # ifenslave {-v|--verbose} ...\n" | |
| 144 | −"\n" | |
| 145 | −" # ifenslave {-u|--usage} Show usage\n" | |
| 146 | −" # ifenslave {-V|--version} Show version\n" | |
| 147 | −" # ifenslave {-h|--help} This message\n" | |
| 148 | −"\n"; | |
| 149 | − | |
| 150 | −#include <unistd.h> | |
| 151 | −#include <stdlib.h> | |
| 152 | −#include <stdio.h> | |
| 153 | −#include <ctype.h> | |
| 154 | −#include <string.h> | |
| 155 | −#include <errno.h> | |
| 156 | −#include <fcntl.h> | |
| 157 | −#include <getopt.h> | |
| 158 | −#include <sys/types.h> | |
| 159 | −#include <sys/socket.h> | |
| 160 | −#include <sys/ioctl.h> | |
| 161 | −#include <linux/if.h> | |
| 162 | −#include <net/if_arp.h> | |
| 163 | −#include <linux/if_ether.h> | |
| 164 | −#include <linux/if_bonding.h> | |
| 165 | −#include <linux/sockios.h> | |
| 166 | − | |
| 167 | −typedef unsigned long long u64; /* hack, so we may include kernel's ethtool.h */ | |
| 168 | −typedef __uint32_t u32; /* ditto */ | |
| 169 | −typedef __uint16_t u16; /* ditto */ | |
| 170 | −typedef __uint8_t u8; /* ditto */ | |
| 171 | −#include <linux/ethtool.h> | |
| 172 | − | |
| 173 | −struct option longopts[] = { | |
| 174 | − /* { name has_arg *flag val } */ | |
| 175 | − {"all-interfaces", 0, 0, 'a'}, /* Show all interfaces. */ | |
| 176 | − {"change-active", 0, 0, 'c'}, /* Change the active slave. */ | |
| 177 | − {"detach", 0, 0, 'd'}, /* Detach a slave interface. */ | |
| 178 | − {"force", 0, 0, 'f'}, /* Force the operation. */ | |
| 179 | − {"help", 0, 0, 'h'}, /* Give help */ | |
| 180 | − {"usage", 0, 0, 'u'}, /* Give usage */ | |
| 181 | − {"verbose", 0, 0, 'v'}, /* Report each action taken. */ | |
| 182 | − {"version", 0, 0, 'V'}, /* Emit version information. */ | |
| 183 | − { 0, 0, 0, 0} | |
| 184 | −}; | |
| 185 | − | |
| 186 | −/* Command-line flags. */ | |
| 187 | −unsigned int | |
| 188 | −opt_a = 0, /* Show-all-interfaces flag. */ | |
| 189 | −opt_c = 0, /* Change-active-slave flag. */ | |
| 190 | −opt_d = 0, /* Detach a slave interface. */ | |
| 191 | −opt_f = 0, /* Force the operation. */ | |
| 192 | −opt_h = 0, /* Help */ | |
| 193 | −opt_u = 0, /* Usage */ | |
| 194 | −opt_v = 0, /* Verbose flag. */ | |
| 195 | −opt_V = 0; /* Version */ | |
| 196 | − | |
| 197 | −int skfd = -1; /* AF_INET socket for ioctl() calls.*/ | |
| 198 | −int abi_ver = 0; /* userland - kernel ABI version */ | |
| 199 | −int hwaddr_set = 0; /* Master's hwaddr is set */ | |
| 200 | −int saved_errno; | |
| 201 | − | |
| 202 | −struct ifreq master_mtu, master_flags, master_hwaddr; | |
| 203 | −struct ifreq slave_mtu, slave_flags, slave_hwaddr; | |
| 204 | − | |
| 205 | −struct dev_ifr { | |
| 206 | − struct ifreq *req_ifr; | |
| 207 | − char *req_name; | |
| 208 | − int req_type; | |
| 209 | −}; | |
| 210 | − | |
| 211 | −struct dev_ifr master_ifra[] = { | |
| 212 | − {&master_mtu, "SIOCGIFMTU", SIOCGIFMTU}, | |
| 213 | − {&master_flags, "SIOCGIFFLAGS", SIOCGIFFLAGS}, | |
| 214 | − {&master_hwaddr, "SIOCGIFHWADDR", SIOCGIFHWADDR}, | |
| 215 | − {NULL, "", 0} | |
| 216 | −}; | |
| 217 | − | |
| 218 | −struct dev_ifr slave_ifra[] = { | |
| 219 | − {&slave_mtu, "SIOCGIFMTU", SIOCGIFMTU}, | |
| 220 | − {&slave_flags, "SIOCGIFFLAGS", SIOCGIFFLAGS}, | |
| 221 | − {&slave_hwaddr, "SIOCGIFHWADDR", SIOCGIFHWADDR}, | |
| 222 | − {NULL, "", 0} | |
| 223 | −}; | |
| 224 | − | |
| 225 | −static void if_print(char *ifname); | |
| 226 | −static int get_drv_info(char *master_ifname); | |
| 227 | −static int get_if_settings(char *ifname, struct dev_ifr ifra[]); | |
| 228 | −static int get_slave_flags(char *slave_ifname); | |
| 229 | −static int set_master_hwaddr(char *master_ifname, struct sockaddr *hwaddr); | |
| 230 | −static int set_slave_hwaddr(char *slave_ifname, struct sockaddr *hwaddr); | |
| 231 | −static int set_slave_mtu(char *slave_ifname, int mtu); | |
| 232 | −static int set_if_flags(char *ifname, short flags); | |
| 233 | −static int set_if_up(char *ifname, short flags); | |
| 234 | −static int set_if_down(char *ifname, short flags); | |
| 235 | −static int clear_if_addr(char *ifname); | |
| 236 | −static int set_if_addr(char *master_ifname, char *slave_ifname); | |
| 237 | −static int change_active(char *master_ifname, char *slave_ifname); | |
| 238 | −static int enslave(char *master_ifname, char *slave_ifname); | |
| 239 | −static int release(char *master_ifname, char *slave_ifname); | |
| 240 | −#define v_print(fmt, args...) \ | |
| 241 | − if (opt_v) \ | |
| 242 | − fprintf(stderr, fmt, ## args ) | |
| 243 | − | |
| 244 | −int main(int argc, char *argv[]) | |
| 245 | −{ | |
| 246 | − char **spp, *master_ifname, *slave_ifname; | |
| 247 | − int c, i, rv; | |
| 248 | − int res = 0; | |
| 249 | − int exclusive = 0; | |
| 250 | − | |
| 251 | − while ((c = getopt_long(argc, argv, "acdfhuvV", longopts, 0)) != EOF) { | |
| 252 | − switch (c) { | |
| 253 | − case 'a': opt_a++; exclusive++; break; | |
| 254 | − case 'c': opt_c++; exclusive++; break; | |
| 255 | − case 'd': opt_d++; exclusive++; break; | |
| 256 | − case 'f': opt_f++; exclusive++; break; | |
| 257 | − case 'h': opt_h++; exclusive++; break; | |
| 258 | − case 'u': opt_u++; exclusive++; break; | |
| 259 | − case 'v': opt_v++; break; | |
| 260 | − case 'V': opt_V++; exclusive++; break; | |
| 261 | − | |
| 262 | − case '?': | |
| 263 | − fprintf(stderr, "%s", usage_msg); | |
| 264 | − res = 2; | |
| 265 | − goto out; | |
| 266 | − } | |
| 267 | − } | |
| 268 | − | |
| 269 | − /* options check */ | |
| 270 | − if (exclusive > 1) { | |
| 271 | − fprintf(stderr, "%s", usage_msg); | |
| 272 | − res = 2; | |
| 273 | − goto out; | |
| 274 | − } | |
| 275 | − | |
| 276 | − if (opt_v || opt_V) { | |
| 277 | − printf("%s", version); | |
| 278 | − if (opt_V) { | |
| 279 | − res = 0; | |
| 280 | − goto out; | |
| 281 | − } | |
| 282 | − } | |
| 283 | − | |
| 284 | − if (opt_u) { | |
| 285 | − printf("%s", usage_msg); | |
| 286 | − res = 0; | |
| 287 | − goto out; | |
| 288 | − } | |
| 289 | − | |
| 290 | − if (opt_h) { | |
| 291 | − printf("%s", usage_msg); | |
| 292 | − printf("%s", help_msg); | |
| 293 | − res = 0; | |
| 294 | − goto out; | |
| 295 | − } | |
| 296 | − | |
| 297 | − /* Open a basic socket */ | |
| 298 | − if ((skfd = socket(AF_INET, SOCK_DGRAM, 0)) < 0) { | |
| 299 | − perror("socket"); | |
| 300 | − res = 1; | |
| 301 | − goto out; | |
| 302 | − } | |
| 303 | − | |
| 304 | − if (opt_a) { | |
| 305 | − if (optind == argc) { | |
| 306 | − /* No remaining args */ | |
| 307 | − /* show all interfaces */ | |
| 308 | − if_print((char *)NULL); | |
| 309 | − goto out; | |
| 310 | − } else { | |
| 311 | − /* Just show usage */ | |
| 312 | − fprintf(stderr, "%s", usage_msg); | |
| 313 | − res = 2; | |
| 314 | − goto out; | |
| 315 | − } | |
| 316 | − } | |
| 317 | − | |
| 318 | − /* Copy the interface name */ | |
| 319 | − spp = argv + optind; | |
| 320 | − master_ifname = *spp++; | |
| 321 | − | |
| 322 | − if (master_ifname == NULL) { | |
| 323 | − fprintf(stderr, "%s", usage_msg); | |
| 324 | − res = 2; | |
| 325 | − goto out; | |
| 326 | − } | |
| 327 | − | |
| 328 | − /* exchange abi version with bonding module */ | |
| 329 | − res = get_drv_info(master_ifname); | |
| 330 | − if (res) { | |
| 331 | − fprintf(stderr, | |
| 332 | − "Master '%s': Error: handshake with driver failed. " | |
| 333 | − "Aborting\n", | |
| 334 | − master_ifname); | |
| 335 | − goto out; | |
| 336 | − } | |
| 337 | − | |
| 338 | − slave_ifname = *spp++; | |
| 339 | − | |
| 340 | − if (slave_ifname == NULL) { | |
| 341 | − if (opt_d || opt_c) { | |
| 342 | − fprintf(stderr, "%s", usage_msg); | |
| 343 | − res = 2; | |
| 344 | − goto out; | |
| 345 | − } | |
| 346 | − | |
| 347 | − /* A single arg means show the | |
| 348 | − * configuration for this interface | |
| 349 | − */ | |
| 350 | − if_print(master_ifname); | |
| 351 | − goto out; | |
| 352 | − } | |
| 353 | − | |
| 354 | − res = get_if_settings(master_ifname, master_ifra); | |
| 355 | − if (res) { | |
| 356 | − /* Probably a good reason not to go on */ | |
| 357 | − fprintf(stderr, | |
| 358 | − "Master '%s': Error: get settings failed: %s. " | |
| 359 | − "Aborting\n", | |
| 360 | − master_ifname, strerror(res)); | |
| 361 | − goto out; | |
| 362 | − } | |
| 363 | − | |
| 364 | − /* check if master is indeed a master; | |
| 365 | − * if not then fail any operation | |
| 366 | − */ | |
| 367 | − if (!(master_flags.ifr_flags & IFF_MASTER)) { | |
| 368 | − fprintf(stderr, | |
| 369 | − "Illegal operation; the specified interface '%s' " | |
| 370 | − "is not a master. Aborting\n", | |
| 371 | − master_ifname); | |
| 372 | − res = 1; | |
| 373 | − goto out; | |
| 374 | − } | |
| 375 | − | |
| 376 | − /* check if master is up; if not then fail any operation */ | |
| 377 | − if (!(master_flags.ifr_flags & IFF_UP)) { | |
| 378 | − fprintf(stderr, | |
| 379 | − "Illegal operation; the specified master interface " | |
| 380 | − "'%s' is not up.\n", | |
| 381 | − master_ifname); | |
| 382 | − res = 1; | |
| 383 | − goto out; | |
| 384 | − } | |
| 385 | − | |
| 386 | − /* Only for enslaving */ | |
| 387 | − if (!opt_c && !opt_d) { | |
| 388 | − sa_family_t master_family = master_hwaddr.ifr_hwaddr.sa_family; | |
| 389 | − unsigned char *hwaddr = | |
| 390 | − (unsigned char *)master_hwaddr.ifr_hwaddr.sa_data; | |
| 391 | − | |
| 392 | − /* The family '1' is ARPHRD_ETHER for ethernet. */ | |
| 393 | − if (master_family != 1 && !opt_f) { | |
| 394 | − fprintf(stderr, | |
| 395 | − "Illegal operation: The specified master " | |
| 396 | − "interface '%s' is not ethernet-like.\n " | |
| 397 | − "This program is designed to work with " | |
| 398 | − "ethernet-like network interfaces.\n " | |
| 399 | − "Use the '-f' option to force the " | |
| 400 | − "operation.\n", | |
| 401 | − master_ifname); | |
| 402 | − res = 1; | |
| 403 | − goto out; | |
| 404 | − } | |
| 405 | − | |
| 406 | − /* Check master's hw addr */ | |
| 407 | − for (i = 0; i < 6; i++) { | |
| 408 | − if (hwaddr[i] != 0) { | |
| 409 | − hwaddr_set = 1; | |
| 410 | − break; | |
| 411 | − } | |
| 412 | − } | |
| 413 | − | |
| 414 | − if (hwaddr_set) { | |
| 415 | − v_print("current hardware address of master '%s' " | |
| 416 | − "is %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, " | |
| 417 | − "type %d\n", | |
| 418 | − master_ifname, | |
| 419 | − hwaddr[0], hwaddr[1], | |
| 420 | − hwaddr[2], hwaddr[3], | |
| 421 | − hwaddr[4], hwaddr[5], | |
| 422 | − master_family); | |
| 423 | − } | |
| 424 | − } | |
| 425 | − | |
| 426 | − /* Accepts only one slave */ | |
| 427 | − if (opt_c) { | |
| 428 | − /* change active slave */ | |
| 429 | − res = get_slave_flags(slave_ifname); | |
| 430 | − if (res) { | |
| 431 | − fprintf(stderr, | |
| 432 | − "Slave '%s': Error: get flags failed. " | |
| 433 | − "Aborting\n", | |
| 434 | − slave_ifname); | |
| 435 | − goto out; | |
| 436 | − } | |
| 437 | − res = change_active(master_ifname, slave_ifname); | |
| 438 | − if (res) { | |
| 439 | − fprintf(stderr, | |
| 440 | − "Master '%s', Slave '%s': Error: " | |
| 441 | − "Change active failed\n", | |
| 442 | − master_ifname, slave_ifname); | |
| 443 | − } | |
| 444 | − } else { | |
| 445 | − /* Accept multiple slaves */ | |
| 446 | − do { | |
| 447 | − if (opt_d) { | |
| 448 | − /* detach a slave interface from the master */ | |
| 449 | − rv = get_slave_flags(slave_ifname); | |
| 450 | − if (rv) { | |
| 451 | − /* Can't work with this slave. */ | |
| 452 | − /* remember the error and skip it*/ | |
| 453 | − fprintf(stderr, | |
| 454 | − "Slave '%s': Error: get flags " | |
| 455 | − "failed. Skipping\n", | |
| 456 | − slave_ifname); | |
| 457 | − res = rv; | |
| 458 | − continue; | |
| 459 | − } | |
| 460 | − rv = release(master_ifname, slave_ifname); | |
| 461 | − if (rv) { | |
| 462 | − fprintf(stderr, | |
| 463 | − "Master '%s', Slave '%s': Error: " | |
| 464 | − "Release failed\n", | |
| 465 | − master_ifname, slave_ifname); | |
| 466 | − res = rv; | |
| 467 | − } | |
| 468 | − } else { | |
| 469 | − /* attach a slave interface to the master */ | |
| 470 | − rv = get_if_settings(slave_ifname, slave_ifra); | |
| 471 | − if (rv) { | |
| 472 | − /* Can't work with this slave. */ | |
| 473 | − /* remember the error and skip it*/ | |
| 474 | − fprintf(stderr, | |
| 475 | − "Slave '%s': Error: get " | |
| 476 | − "settings failed: %s. " | |
| 477 | − "Skipping\n", | |
| 478 | − slave_ifname, strerror(rv)); | |
| 479 | − res = rv; | |
| 480 | − continue; | |
| 481 | − } | |
| 482 | − rv = enslave(master_ifname, slave_ifname); | |
| 483 | − if (rv) { | |
| 484 | − fprintf(stderr, | |
| 485 | − "Master '%s', Slave '%s': Error: " | |
| 486 | − "Enslave failed\n", | |
| 487 | − master_ifname, slave_ifname); | |
| 488 | − res = rv; | |
| 489 | − } | |
| 490 | − } | |
| 491 | − } while ((slave_ifname = *spp++) != NULL); | |
| 492 | − } | |
| 493 | − | |
| 494 | −out: | |
| 495 | − if (skfd >= 0) { | |
| 496 | − close(skfd); | |
| 497 | − } | |
| 498 | − | |
| 499 | − return res; | |
| 500 | −} | |
| 501 | − | |
| 502 | −static short mif_flags; | |
| 503 | − | |
| 504 | −/* Get the inteface configuration from the kernel. */ | |
| 505 | −static int if_getconfig(char *ifname) | |
| 506 | −{ | |
| 507 | − struct ifreq ifr; | |
| 508 | − int metric, mtu; /* Parameters of the master interface. */ | |
| 509 | − struct sockaddr dstaddr, broadaddr, netmask; | |
| 510 | − unsigned char *hwaddr; | |
| 511 | − | |
| 512 | − strcpy(ifr.ifr_name, ifname); | |
| 513 | − if (ioctl(skfd, SIOCGIFFLAGS, &ifr) < 0) | |
| 514 | − return -1; | |
| 515 | − mif_flags = ifr.ifr_flags; | |
| 516 | − printf("The result of SIOCGIFFLAGS on %s is %x.\n", | |
| 517 | − ifname, ifr.ifr_flags); | |
| 518 | − | |
| 519 | − strcpy(ifr.ifr_name, ifname); | |
| 520 | − if (ioctl(skfd, SIOCGIFADDR, &ifr) < 0) | |
| 521 | − return -1; | |
| 522 | − printf("The result of SIOCGIFADDR is %2.2x.%2.2x.%2.2x.%2.2x.\n", | |
| 523 | − ifr.ifr_addr.sa_data[0], ifr.ifr_addr.sa_data[1], | |
| 524 | − ifr.ifr_addr.sa_data[2], ifr.ifr_addr.sa_data[3]); | |
| 525 | − | |
| 526 | − strcpy(ifr.ifr_name, ifname); | |
| 527 | − if (ioctl(skfd, SIOCGIFHWADDR, &ifr) < 0) | |
| 528 | − return -1; | |
| 529 | − | |
| 530 | − /* Gotta convert from 'char' to unsigned for printf(). */ | |
| 531 | − hwaddr = (unsigned char *)ifr.ifr_hwaddr.sa_data; | |
| 532 | − printf("The result of SIOCGIFHWADDR is type %d " | |
| 533 | − "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x.\n", | |
| 534 | − ifr.ifr_hwaddr.sa_family, hwaddr[0], hwaddr[1], | |
| 535 | − hwaddr[2], hwaddr[3], hwaddr[4], hwaddr[5]); | |
| 536 | − | |
| 537 | − strcpy(ifr.ifr_name, ifname); | |
| 538 | − if (ioctl(skfd, SIOCGIFMETRIC, &ifr) < 0) { | |
| 539 | − metric = 0; | |
| 540 | − } else | |
| 541 | − metric = ifr.ifr_metric; | |
| 542 | − printf("The result of SIOCGIFMETRIC is %d\n", metric); | |
| 543 | − | |
| 544 | − strcpy(ifr.ifr_name, ifname); | |
| 545 | − if (ioctl(skfd, SIOCGIFMTU, &ifr) < 0) | |
| 546 | − mtu = 0; | |
| 547 | − else | |
| 548 | − mtu = ifr.ifr_mtu; | |
| 549 | − printf("The result of SIOCGIFMTU is %d\n", mtu); | |
| 550 | − | |
| 551 | − strcpy(ifr.ifr_name, ifname); | |
| 552 | − if (ioctl(skfd, SIOCGIFDSTADDR, &ifr) < 0) { | |
| 553 | − memset(&dstaddr, 0, sizeof(struct sockaddr)); | |
| 554 | − } else | |
| 555 | − dstaddr = ifr.ifr_dstaddr; | |
| 556 | − | |
| 557 | − strcpy(ifr.ifr_name, ifname); | |
| 558 | − if (ioctl(skfd, SIOCGIFBRDADDR, &ifr) < 0) { | |
| 559 | − memset(&broadaddr, 0, sizeof(struct sockaddr)); | |
| 560 | − } else | |
| 561 | − broadaddr = ifr.ifr_broadaddr; | |
| 562 | − | |
| 563 | − strcpy(ifr.ifr_name, ifname); | |
| 564 | − if (ioctl(skfd, SIOCGIFNETMASK, &ifr) < 0) { | |
| 565 | − memset(&netmask, 0, sizeof(struct sockaddr)); | |
| 566 | − } else | |
| 567 | − netmask = ifr.ifr_netmask; | |
| 568 | − | |
| 569 | − return 0; | |
| 570 | −} | |
| 571 | − | |
| 572 | −static void if_print(char *ifname) | |
| 573 | −{ | |
| 574 | − char buff[1024]; | |
| 575 | − struct ifconf ifc; | |
| 576 | − struct ifreq *ifr; | |
| 577 | − int i; | |
| 578 | − | |
| 579 | − if (ifname == (char *)NULL) { | |
| 580 | − ifc.ifc_len = sizeof(buff); | |
| 581 | − ifc.ifc_buf = buff; | |
| 582 | − if (ioctl(skfd, SIOCGIFCONF, &ifc) < 0) { | |
| 583 | − perror("SIOCGIFCONF failed"); | |
| 584 | − return; | |
| 585 | − } | |
| 586 | − | |
| 587 | − ifr = ifc.ifc_req; | |
| 588 | − for (i = ifc.ifc_len / sizeof(struct ifreq); --i >= 0; ifr++) { | |
| 589 | − if (if_getconfig(ifr->ifr_name) < 0) { | |
| 590 | − fprintf(stderr, | |
| 591 | − "%s: unknown interface.\n", | |
| 592 | − ifr->ifr_name); | |
| 593 | − continue; | |
| 594 | − } | |
| 595 | − | |
| 596 | − if (((mif_flags & IFF_UP) == 0) && !opt_a) continue; | |
| 597 | − /*ife_print(&ife);*/ | |
| 598 | − } | |
| 599 | − } else { | |
| 600 | − if (if_getconfig(ifname) < 0) { | |
| 601 | − fprintf(stderr, | |
| 602 | − "%s: unknown interface.\n", ifname); | |
| 603 | − } | |
| 604 | − } | |
| 605 | −} | |
| 606 | − | |
| 607 | −static int get_drv_info(char *master_ifname) | |
| 608 | −{ | |
| 609 | − struct ifreq ifr; | |
| 610 | − struct ethtool_drvinfo info; | |
| 611 | − char *endptr; | |
| 612 | − | |
| 613 | − memset(&ifr, 0, sizeof(ifr)); | |
| 614 | − strncpy(ifr.ifr_name, master_ifname, IFNAMSIZ); | |
| 615 | − ifr.ifr_data = (caddr_t)&info; | |
| 616 | − | |
| 617 | − info.cmd = ETHTOOL_GDRVINFO; | |
| 618 | − strncpy(info.driver, "ifenslave", 32); | |
| 619 | − snprintf(info.fw_version, 32, "%d", BOND_ABI_VERSION); | |
| 620 | − | |
| 621 | − if (ioctl(skfd, SIOCETHTOOL, &ifr) < 0) { | |
| 622 | − if (errno == EOPNOTSUPP) { | |
| 623 | − goto out; | |
| 624 | − } | |
| 625 | − | |
| 626 | − saved_errno = errno; | |
| 627 | − v_print("Master '%s': Error: get bonding info failed %s\n", | |
| 628 | − master_ifname, strerror(saved_errno)); | |
| 629 | − return 1; | |
| 630 | − } | |
| 631 | − | |
| 632 | − abi_ver = strtoul(info.fw_version, &endptr, 0); | |
| 633 | − if (*endptr) { | |
| 634 | − v_print("Master '%s': Error: got invalid string as an ABI " | |
| 635 | − "version from the bonding module\n", | |
| 636 | − master_ifname); | |
| 637 | − return 1; | |
| 638 | − } | |
| 639 | − | |
| 640 | −out: | |
| 641 | − v_print("ABI ver is %d\n", abi_ver); | |
| 642 | − | |
| 643 | − return 0; | |
| 644 | −} | |
| 645 | − | |
| 646 | −static int change_active(char *master_ifname, char *slave_ifname) | |
| 647 | −{ | |
| 648 | − struct ifreq ifr; | |
| 649 | − int res = 0; | |
| 650 | − | |
| 651 | − if (!(slave_flags.ifr_flags & IFF_SLAVE)) { | |
| 652 | − fprintf(stderr, | |
| 653 | − "Illegal operation: The specified slave interface " | |
| 654 | − "'%s' is not a slave\n", | |
| 655 | − slave_ifname); | |
| 656 | − return 1; | |
| 657 | − } | |
| 658 | − | |
| 659 | − strncpy(ifr.ifr_name, master_ifname, IFNAMSIZ); | |
| 660 | − strncpy(ifr.ifr_slave, slave_ifname, IFNAMSIZ); | |
| 661 | − if ((ioctl(skfd, SIOCBONDCHANGEACTIVE, &ifr) < 0) && | |
| 662 | − (ioctl(skfd, BOND_CHANGE_ACTIVE_OLD, &ifr) < 0)) { | |
| 663 | − saved_errno = errno; | |
| 664 | − v_print("Master '%s': Error: SIOCBONDCHANGEACTIVE failed: " | |
| 665 | − "%s\n", | |
| 666 | − master_ifname, strerror(saved_errno)); | |
| 667 | − res = 1; | |
| 668 | − } | |
| 669 | − | |
| 670 | − return res; | |
| 671 | −} | |
| 672 | − | |
| 673 | −static int enslave(char *master_ifname, char *slave_ifname) | |
| 674 | −{ | |
| 675 | − struct ifreq ifr; | |
| 676 | − int res = 0; | |
| 677 | − | |
| 678 | − if (slave_flags.ifr_flags & IFF_SLAVE) { | |
| 679 | − fprintf(stderr, | |
| 680 | − "Illegal operation: The specified slave interface " | |
| 681 | − "'%s' is already a slave\n", | |
| 682 | − slave_ifname); | |
| 683 | − return 1; | |
| 684 | − } | |
| 685 | − | |
| 686 | − res = set_if_down(slave_ifname, slave_flags.ifr_flags); | |
| 687 | − if (res) { | |
| 688 | − fprintf(stderr, | |
| 689 | − "Slave '%s': Error: bring interface down failed\n", | |
| 690 | − slave_ifname); | |
| 691 | − return res; | |
| 692 | − } | |
| 693 | − | |
| 694 | − if (abi_ver < 2) { | |
| 695 | − /* Older bonding versions would panic if the slave has no IP | |
| 696 | − * address, so get the IP setting from the master. | |
| 697 | − */ | |
| 698 | − set_if_addr(master_ifname, slave_ifname); | |
| 699 | − } else { | |
| 700 | − res = clear_if_addr(slave_ifname); | |
| 701 | − if (res) { | |
| 702 | − fprintf(stderr, | |
| 703 | − "Slave '%s': Error: clear address failed\n", | |
| 704 | − slave_ifname); | |
| 705 | − return res; | |
| 706 | − } | |
| 707 | − } | |
| 708 | − | |
| 709 | − if (master_mtu.ifr_mtu != slave_mtu.ifr_mtu) { | |
| 710 | − res = set_slave_mtu(slave_ifname, master_mtu.ifr_mtu); | |
| 711 | − if (res) { | |
| 712 | − fprintf(stderr, | |
| 713 | − "Slave '%s': Error: set MTU failed\n", | |
| 714 | − slave_ifname); | |
| 715 | − return res; | |
| 716 | − } | |
| 717 | − } | |
| 718 | − | |
| 719 | − if (hwaddr_set) { | |
| 720 | − /* Master already has an hwaddr | |
| 721 | − * so set it's hwaddr to the slave | |
| 722 | − */ | |
| 723 | − if (abi_ver < 1) { | |
| 724 | − /* The driver is using an old ABI, so | |
| 725 | − * the application sets the slave's | |
| 726 | − * hwaddr | |
| 727 | − */ | |
| 728 | − res = set_slave_hwaddr(slave_ifname, | |
| 729 | − &(master_hwaddr.ifr_hwaddr)); | |
| 730 | − if (res) { | |
| 731 | − fprintf(stderr, | |
| 732 | − "Slave '%s': Error: set hw address " | |
| 733 | − "failed\n", | |
| 734 | − slave_ifname); | |
| 735 | − goto undo_mtu; | |
| 736 | − } | |
| 737 | − | |
| 738 | − /* For old ABI the application needs to bring the | |
| 739 | − * slave back up | |
| 740 | − */ | |
| 741 | − res = set_if_up(slave_ifname, slave_flags.ifr_flags); | |
| 742 | − if (res) { | |
| 743 | − fprintf(stderr, | |
| 744 | − "Slave '%s': Error: bring interface " | |
| 745 | − "down failed\n", | |
| 746 | − slave_ifname); | |
| 747 | − goto undo_slave_mac; | |
| 748 | − } | |
| 749 | − } | |
| 750 | − /* The driver is using a new ABI, | |
| 751 | − * so the driver takes care of setting | |
| 752 | − * the slave's hwaddr and bringing | |
| 753 | − * it up again | |
| 754 | − */ | |
| 755 | − } else { | |
| 756 | − /* No hwaddr for master yet, so | |
| 757 | − * set the slave's hwaddr to it | |
| 758 | − */ | |
| 759 | − if (abi_ver < 1) { | |
| 760 | − /* For old ABI, the master needs to be | |
| 761 | − * down before setting its hwaddr | |
| 762 | − */ | |
| 763 | − res = set_if_down(master_ifname, master_flags.ifr_flags); | |
| 764 | − if (res) { | |
| 765 | − fprintf(stderr, | |
| 766 | − "Master '%s': Error: bring interface " | |
| 767 | − "down failed\n", | |
| 768 | − master_ifname); | |
| 769 | − goto undo_mtu; | |
| 770 | − } | |
| 771 | − } | |
| 772 | − | |
| 773 | − res = set_master_hwaddr(master_ifname, | |
| 774 | − &(slave_hwaddr.ifr_hwaddr)); | |
| 775 | − if (res) { | |
| 776 | − fprintf(stderr, | |
| 777 | − "Master '%s': Error: set hw address " | |
| 778 | − "failed\n", | |
| 779 | − master_ifname); | |
| 780 | − goto undo_mtu; | |
| 781 | − } | |
| 782 | − | |
| 783 | − if (abi_ver < 1) { | |
| 784 | − /* For old ABI, bring the master | |
| 785 | − * back up | |
| 786 | − */ | |
| 787 | − res = set_if_up(master_ifname, master_flags.ifr_flags); | |
| 788 | − if (res) { | |
| 789 | − fprintf(stderr, | |
| 790 | − "Master '%s': Error: bring interface " | |
| 791 | − "up failed\n", | |
| 792 | − master_ifname); | |
| 793 | − goto undo_master_mac; | |
| 794 | − } | |
| 795 | − } | |
| 796 | − | |
| 797 | − hwaddr_set = 1; | |
| 798 | − } | |
| 799 | − | |
| 800 | − /* Do the real thing */ | |
| 801 | − strncpy(ifr.ifr_name, master_ifname, IFNAMSIZ); | |
| 802 | − strncpy(ifr.ifr_slave, slave_ifname, IFNAMSIZ); | |
| 803 | − if ((ioctl(skfd, SIOCBONDENSLAVE, &ifr) < 0) && | |
| 804 | − (ioctl(skfd, BOND_ENSLAVE_OLD, &ifr) < 0)) { | |
| 805 | − saved_errno = errno; | |
| 806 | − v_print("Master '%s': Error: SIOCBONDENSLAVE failed: %s\n", | |
| 807 | − master_ifname, strerror(saved_errno)); | |
| 808 | − res = 1; | |
| 809 | − } | |
| 810 | − | |
| 811 | − if (res) { | |
| 812 | − goto undo_master_mac; | |
| 813 | − } | |
| 814 | − | |
| 815 | − return 0; | |
| 816 | − | |
| 817 | −/* rollback (best effort) */ | |
| 818 | −undo_master_mac: | |
| 819 | − set_master_hwaddr(master_ifname, &(master_hwaddr.ifr_hwaddr)); | |
| 820 | − hwaddr_set = 0; | |
| 821 | − goto undo_mtu; | |
| 822 | −undo_slave_mac: | |
| 823 | − set_slave_hwaddr(slave_ifname, &(slave_hwaddr.ifr_hwaddr)); | |
| 824 | −undo_mtu: | |
| 825 | − set_slave_mtu(slave_ifname, slave_mtu.ifr_mtu); | |
| 826 | − return res; | |
| 827 | −} | |
| 828 | − | |
| 829 | −static int release(char *master_ifname, char *slave_ifname) | |
| 830 | −{ | |
| 831 | − struct ifreq ifr; | |
| 832 | − int res = 0; | |
| 833 | − | |
| 834 | − if (!(slave_flags.ifr_flags & IFF_SLAVE)) { | |
| 835 | − fprintf(stderr, | |
| 836 | − "Illegal operation: The specified slave interface " | |
| 837 | − "'%s' is not a slave\n", | |
| 838 | − slave_ifname); | |
| 839 | − return 1; | |
| 840 | − } | |
| 841 | − | |
| 842 | − strncpy(ifr.ifr_name, master_ifname, IFNAMSIZ); | |
| 843 | − strncpy(ifr.ifr_slave, slave_ifname, IFNAMSIZ); | |
| 844 | − if ((ioctl(skfd, SIOCBONDRELEASE, &ifr) < 0) && | |
| 845 | − (ioctl(skfd, BOND_RELEASE_OLD, &ifr) < 0)) { | |
| 846 | − saved_errno = errno; | |
| 847 | − v_print("Master '%s': Error: SIOCBONDRELEASE failed: %s\n", | |
| 848 | − master_ifname, strerror(saved_errno)); | |
| 849 | − return 1; | |
| 850 | − } else if (abi_ver < 1) { | |
| 851 | − /* The driver is using an old ABI, so we'll set the interface | |
| 852 | − * down to avoid any conflicts due to same MAC/IP | |
| 853 | − */ | |
| 854 | − res = set_if_down(slave_ifname, slave_flags.ifr_flags); | |
| 855 | − if (res) { | |
| 856 | − fprintf(stderr, | |
| 857 | − "Slave '%s': Error: bring interface " | |
| 858 | − "down failed\n", | |
| 859 | − slave_ifname); | |
| 860 | − } | |
| 861 | − } | |
| 862 | − | |
| 863 | − /* set to default mtu */ | |
| 864 | − set_slave_mtu(slave_ifname, 1500); | |
| 865 | − | |
| 866 | − return res; | |
| 867 | −} | |
| 868 | − | |
| 869 | −static int get_if_settings(char *ifname, struct dev_ifr ifra[]) | |
| 870 | −{ | |
| 871 | − int i; | |
| 872 | − int res = 0; | |
| 873 | − | |
| 874 | − for (i = 0; ifra[i].req_ifr; i++) { | |
| 875 | − strncpy(ifra[i].req_ifr->ifr_name, ifname, IFNAMSIZ); | |
| 876 | − res = ioctl(skfd, ifra[i].req_type, ifra[i].req_ifr); | |
| 877 | − if (res < 0) { | |
| 878 | − saved_errno = errno; | |
| 879 | − v_print("Interface '%s': Error: %s failed: %s\n", | |
| 880 | − ifname, ifra[i].req_name, | |
| 881 | − strerror(saved_errno)); | |
| 882 | − | |
| 883 | − return saved_errno; | |
| 884 | − } | |
| 885 | − } | |
| 886 | − | |
| 887 | − return 0; | |
| 888 | −} | |
| 889 | − | |
| 890 | −static int get_slave_flags(char *slave_ifname) | |
| 891 | −{ | |
| 892 | − int res = 0; | |
| 893 | − | |
| 894 | − strncpy(slave_flags.ifr_name, slave_ifname, IFNAMSIZ); | |
| 895 | − res = ioctl(skfd, SIOCGIFFLAGS, &slave_flags); | |
| 896 | − if (res < 0) { | |
| 897 | − saved_errno = errno; | |
| 898 | − v_print("Slave '%s': Error: SIOCGIFFLAGS failed: %s\n", | |
| 899 | − slave_ifname, strerror(saved_errno)); | |
| 900 | − } else { | |
| 901 | − v_print("Slave %s: flags %04X.\n", | |
| 902 | − slave_ifname, slave_flags.ifr_flags); | |
| 903 | − } | |
| 904 | − | |
| 905 | − return res; | |
| 906 | −} | |
| 907 | − | |
| 908 | −static int set_master_hwaddr(char *master_ifname, struct sockaddr *hwaddr) | |
| 909 | −{ | |
| 910 | − unsigned char *addr = (unsigned char *)hwaddr->sa_data; | |
| 911 | − struct ifreq ifr; | |
| 912 | − int res = 0; | |
| 913 | − | |
| 914 | − strncpy(ifr.ifr_name, master_ifname, IFNAMSIZ); | |
| 915 | − memcpy(&(ifr.ifr_hwaddr), hwaddr, sizeof(struct sockaddr)); | |
| 916 | − res = ioctl(skfd, SIOCSIFHWADDR, &ifr); | |
| 917 | − if (res < 0) { | |
| 918 | − saved_errno = errno; | |
| 919 | − v_print("Master '%s': Error: SIOCSIFHWADDR failed: %s\n", | |
| 920 | − master_ifname, strerror(saved_errno)); | |
| 921 | − return res; | |
| 922 | − } else { | |
| 923 | − v_print("Master '%s': hardware address set to " | |
| 924 | − "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x.\n", | |
| 925 | − master_ifname, addr[0], addr[1], addr[2], | |
| 926 | − addr[3], addr[4], addr[5]); | |
| 927 | − } | |
| 928 | − | |
| 929 | − return res; | |
| 930 | −} | |
| 931 | − | |
| 932 | −static int set_slave_hwaddr(char *slave_ifname, struct sockaddr *hwaddr) | |
| 933 | −{ | |
| 934 | − unsigned char *addr = (unsigned char *)hwaddr->sa_data; | |
| 935 | − struct ifreq ifr; | |
| 936 | − int res = 0; | |
| 937 | − | |
| 938 | − strncpy(ifr.ifr_name, slave_ifname, IFNAMSIZ); | |
| 939 | − memcpy(&(ifr.ifr_hwaddr), hwaddr, sizeof(struct sockaddr)); | |
| 940 | − res = ioctl(skfd, SIOCSIFHWADDR, &ifr); | |
| 941 | − if (res < 0) { | |
| 942 | − saved_errno = errno; | |
| 943 | − | |
| 944 | − v_print("Slave '%s': Error: SIOCSIFHWADDR failed: %s\n", | |
| 945 | − slave_ifname, strerror(saved_errno)); | |
| 946 | − | |
| 947 | − if (saved_errno == EBUSY) { | |
| 948 | − v_print(" The device is busy: it must be idle " | |
| 949 | − "before running this command.\n"); | |
| 950 | − } else if (saved_errno == EOPNOTSUPP) { | |
| 951 | − v_print(" The device does not support setting " | |
| 952 | − "the MAC address.\n" | |
| 953 | − " Your kernel likely does not support slave " | |
| 954 | − "devices.\n"); | |
| 955 | − } else if (saved_errno == EINVAL) { | |
| 956 | − v_print(" The device's address type does not match " | |
| 957 | − "the master's address type.\n"); | |
| 958 | − } | |
| 959 | − return res; | |
| 960 | − } else { | |
| 961 | − v_print("Slave '%s': hardware address set to " | |
| 962 | − "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x.\n", | |
| 963 | − slave_ifname, addr[0], addr[1], addr[2], | |
| 964 | − addr[3], addr[4], addr[5]); | |
| 965 | − } | |
| 966 | − | |
| 967 | − return res; | |
| 968 | −} | |
| 969 | − | |
| 970 | −static int set_slave_mtu(char *slave_ifname, int mtu) | |
| 971 | −{ | |
| 972 | − struct ifreq ifr; | |
| 973 | − int res = 0; | |
| 974 | − | |
| 975 | − ifr.ifr_mtu = mtu; | |
| 976 | − strncpy(ifr.ifr_name, slave_ifname, IFNAMSIZ); | |
| 977 | − | |
| 978 | − res = ioctl(skfd, SIOCSIFMTU, &ifr); | |
| 979 | − if (res < 0) { | |
| 980 | − saved_errno = errno; | |
| 981 | − v_print("Slave '%s': Error: SIOCSIFMTU failed: %s\n", | |
| 982 | − slave_ifname, strerror(saved_errno)); | |
| 983 | − } else { | |
| 984 | − v_print("Slave '%s': MTU set to %d.\n", slave_ifname, mtu); | |
| 985 | − } | |
| 986 | − | |
| 987 | − return res; | |
| 988 | −} | |
| 989 | − | |
| 990 | −static int set_if_flags(char *ifname, short flags) | |
| 991 | −{ | |
| 992 | − struct ifreq ifr; | |
| 993 | − int res = 0; | |
| 994 | − | |
| 995 | − ifr.ifr_flags = flags; | |
| 996 | − strncpy(ifr.ifr_name, ifname, IFNAMSIZ); | |
| 997 | − | |
| 998 | − res = ioctl(skfd, SIOCSIFFLAGS, &ifr); | |
| 999 | − if (res < 0) { | |
| 1000 | − saved_errno = errno; | |
| 1001 | − v_print("Interface '%s': Error: SIOCSIFFLAGS failed: %s\n", | |
| 1002 | − ifname, strerror(saved_errno)); | |
| 1003 | − } else { | |
| 1004 | − v_print("Interface '%s': flags set to %04X.\n", ifname, flags); | |
| 1005 | − } | |
| 1006 | − | |
| 1007 | − return res; | |
| 1008 | −} | |
| 1009 | − | |
| 1010 | −static int set_if_up(char *ifname, short flags) | |
| 1011 | −{ | |
| 1012 | − return set_if_flags(ifname, flags | IFF_UP); | |
| 1013 | −} | |
| 1014 | − | |
| 1015 | −static int set_if_down(char *ifname, short flags) | |
| 1016 | −{ | |
| 1017 | − return set_if_flags(ifname, flags & ~IFF_UP); | |
| 1018 | −} | |
| 1019 | − | |
| 1020 | −static int clear_if_addr(char *ifname) | |
| 1021 | −{ | |
| 1022 | − struct ifreq ifr; | |
| 1023 | − int res = 0; | |
| 1024 | − | |
| 1025 | − strncpy(ifr.ifr_name, ifname, IFNAMSIZ); | |
| 1026 | − ifr.ifr_addr.sa_family = AF_INET; | |
| 1027 | − memset(ifr.ifr_addr.sa_data, 0, sizeof(ifr.ifr_addr.sa_data)); | |
| 1028 | − | |
| 1029 | − res = ioctl(skfd, SIOCSIFADDR, &ifr); | |
| 1030 | − if (res < 0) { | |
| 1031 | − saved_errno = errno; | |
| 1032 | − v_print("Interface '%s': Error: SIOCSIFADDR failed: %s\n", | |
| 1033 | − ifname, strerror(saved_errno)); | |
| 1034 | − } else { | |
| 1035 | − v_print("Interface '%s': address cleared\n", ifname); | |
| 1036 | − } | |
| 1037 | − | |
| 1038 | − return res; | |
| 1039 | −} | |
| 1040 | − | |
| 1041 | −static int set_if_addr(char *master_ifname, char *slave_ifname) | |
| 1042 | −{ | |
| 1043 | − struct ifreq ifr; | |
| 1044 | − int res; | |
| 1045 | − unsigned char *ipaddr; | |
| 1046 | − int i; | |
| 1047 | − struct { | |
| 1048 | − char *req_name; | |
| 1049 | − char *desc; | |
| 1050 | − int g_ioctl; | |
| 1051 | − int s_ioctl; | |
| 1052 | − } ifra[] = { | |
| 1053 | − {"IFADDR", "addr", SIOCGIFADDR, SIOCSIFADDR}, | |
| 1054 | − {"DSTADDR", "destination addr", SIOCGIFDSTADDR, SIOCSIFDSTADDR}, | |
| 1055 | − {"BRDADDR", "broadcast addr", SIOCGIFBRDADDR, SIOCSIFBRDADDR}, | |
| 1056 | − {"NETMASK", "netmask", SIOCGIFNETMASK, SIOCSIFNETMASK}, | |
| 1057 | − {NULL, NULL, 0, 0}, | |
| 1058 | − }; | |
| 1059 | − | |
| 1060 | − for (i = 0; ifra[i].req_name; i++) { | |
| 1061 | − strncpy(ifr.ifr_name, master_ifname, IFNAMSIZ); | |
| 1062 | − res = ioctl(skfd, ifra[i].g_ioctl, &ifr); | |
| 1063 | − if (res < 0) { | |
| 1064 | − int saved_errno = errno; | |
| 1065 | − | |
| 1066 | − v_print("Interface '%s': Error: SIOCG%s failed: %s\n", | |
| 1067 | − master_ifname, ifra[i].req_name, | |
| 1068 | − strerror(saved_errno)); | |
| 1069 | − | |
| 1070 | − ifr.ifr_addr.sa_family = AF_INET; | |
| 1071 | − memset(ifr.ifr_addr.sa_data, 0, | |
| 1072 | − sizeof(ifr.ifr_addr.sa_data)); | |
| 1073 | − } | |
| 1074 | − | |
| 1075 | − strncpy(ifr.ifr_name, slave_ifname, IFNAMSIZ); | |
| 1076 | − res = ioctl(skfd, ifra[i].s_ioctl, &ifr); | |
| 1077 | − if (res < 0) { | |
| 1078 | − int saved_errno = errno; | |
| 1079 | − | |
| 1080 | − v_print("Interface '%s': Error: SIOCS%s failed: %s\n", | |
| 1081 | − slave_ifname, ifra[i].req_name, | |
| 1082 | − strerror(saved_errno)); | |
| 1083 | − | |
| 1084 | − } | |
| 1085 | − | |
| 1086 | − ipaddr = (unsigned char *)ifr.ifr_addr.sa_data; | |
| 1087 | − v_print("Interface '%s': set IP %s to %d.%d.%d.%d\n", | |
| 1088 | − slave_ifname, ifra[i].desc, | |
| 1089 | − ipaddr[0], ipaddr[1], ipaddr[2], ipaddr[3]); | |
| 1090 | − } | |
| 1091 | − | |
| 1092 | − return 0; | |
| 1093 | −} | |
| 1094 | − | |
| 1095 | −/* | |
| 1096 | − * Local variables: | |
| 1097 | − * version-control: t | |
| 1098 | − * kept-new-versions: 5 | |
| 1099 | − * c-indent-level: 4 | |
| 1100 | − * c-basic-offset: 4 | |
| 1101 | − * tab-width: 4 | |
| 1102 | − * compile-command: "gcc -Wall -Wstrict-prototypes -O -I/usr/src/linux/include ifenslave.c -o ifenslave" | |
| 1103 | − * End: | |
| 1104 | − */ | |
| 1105 | − | |
| @@ -685,6 +685,15 @@ ip_dynaddr - BOOLEAN · 684 unmodified lines | ||
| 685 | 685 | occurs. |
| 686 | 686 | Default: 0 |
| 687 | 687 | |
| 688 | +ip_early_demux - BOOLEAN | |
| 689 | + Optimize input packet processing down to one demux for | |
| 690 | + certain kinds of local sockets. Currently we only do this | |
| 691 | + for established TCP sockets. | |
| 692 | + | |
| 693 | + It may add an additional cost for pure routing workloads that | |
| 694 | + reduces overall throughput, in such case you should disable it. | |
| 695 | + Default: 1 | |
| 696 | + | |
| 688 | 697 | icmp_echo_ignore_all - BOOLEAN |
| 689 | 698 | If set non-zero, then the kernel will ignore all ICMP ECHO |
| 690 | 699 | requests sent to it. |
| @@ -729,7 +738,7 @@ icmp_ignore_bogus_error_responses - BOOLEAN · 38 unmodified lines | ||
| 729 | 738 | frames. Such violations are normally logged via a kernel warning. |
| 730 | 739 | If this is set to TRUE, the kernel will not give such warnings, which |
| 731 | 740 | will avoid log file clutter. |
| 732 | − Default: FALSE | |
| 741 | + Default: 1 | |
| 733 | 742 | |
| 734 | 743 | icmp_errors_use_inbound_ifaddr - BOOLEAN |
| 735 | 744 | |
| @@ -181,6 +181,19 @@ snat_reroute - BOOLEAN · 180 unmodified lines | ||
| 181 | 181 | always be the same as the original route so it is an optimisation |
| 182 | 182 | to disable snat_reroute and avoid the recalculation. |
| 183 | 183 | |
| 184 | +sync_persist_mode - INTEGER | |
| 185 | + default 0 | |
| 186 | + | |
| 187 | + Controls the synchronisation of connections when using persistence | |
| 188 | + | |
| 189 | + 0: All types of connections are synchronised | |
| 190 | + 1: Attempt to reduce the synchronisation traffic depending on | |
| 191 | + the connection type. For persistent services avoid synchronisation | |
| 192 | + for normal connections, do it only for persistence templates. | |
| 193 | + In such case, for TCP and SCTP it may need enabling sloppy_tcp and | |
| 194 | + sloppy_sctp flags on backup servers. For non-persistent services | |
| 195 | + such optimization is not applied, mode 0 is assumed. | |
| 196 | + | |
| 184 | 197 | sync_version - INTEGER |
| 185 | 198 | default 1 |
| 186 | 199 | |
| @@ -114,7 +114,7 @@ Some parameters are constrained, specifically: · 113 unmodified lines | ||
| 114 | 114 | - nm_frame_nr must equal the actual number of frames as specified above. |
| 115 | 115 | |
| 116 | 116 | When the kernel can't allocate physically continuous memory for a ring block, |
| 117 | −it will fall back to use physically discontinous memory. This might affect | |
| 117 | +it will fall back to use physically discontinuous memory. This might affect | |
| 118 | 118 | performance negatively, in order to avoid this the nm_frame_size parameter |
| 119 | 119 | should be chosen to be as small as possible for the required frame size and |
| 120 | 120 | the number of blocks should be increased instead. |
| @@ -274,9 +274,9 @@ This example assumes some ring parameters of the ring setup are available. · 153 unmodified lines | ||
| 274 | 274 | /* Get next frame header */ |
| 275 | 275 | hdr = rx_ring + frame_offset; |
| 276 | 276 | |
| 277 | − if (hdr->nm_status == NL_MMAP_STATUS_VALID) | |
| 277 | + if (hdr->nm_status == NL_MMAP_STATUS_VALID) { | |
| 278 | 278 | /* Regular memory mapped frame */ |
| 279 | − nlh = (void *hdr) + NL_MMAP_HDRLEN; | |
| 279 | + nlh = (void *)hdr + NL_MMAP_HDRLEN; | |
| 280 | 280 | len = hdr->nm_len; |
| 281 | 281 | |
| 282 | 282 | /* Release empty message immediately. May happen |
| @@ -704,6 +704,12 @@ So it seems to be a good candidate to be used with packet fanout. · 703 unmodified lines | ||
| 704 | 704 | Minimal example code by Daniel Borkmann based on Chetan Loke's lolpcap (compile |
| 705 | 705 | it with gcc -Wall -O2 blob.c, and try things like "./a.out eth0", etc.): |
| 706 | 706 | |
| 707 | +/* Written from scratch, but kernel-to-user space API usage | |
| 708 | + * dissected from lolpcap: | |
| 709 | + * Copyright 2011, Chetan Loke <loke.chetan@gmail.com> | |
| 710 | + * License: GPL, version 2.0 | |
| 711 | + */ | |
| 712 | + | |
| 707 | 713 | #include <stdio.h> |
| 708 | 714 | #include <stdlib.h> |
| 709 | 715 | #include <stdint.h> |
| @@ -722,27 +728,6 @@ it with gcc -Wall -O2 blob.c, and try things like "./a.out eth0", etc.): · 12 unmodified lines | ||
| 722 | 728 | #include <linux/if_ether.h> |
| 723 | 729 | #include <linux/ip.h> |
| 724 | 730 | |
| 725 | −#define BLOCK_SIZE (1 << 22) | |
| 726 | −#define FRAME_SIZE 2048 | |
| 727 | − | |
| 728 | −#define NUM_BLOCKS 64 | |
| 729 | −#define NUM_FRAMES ((BLOCK_SIZE * NUM_BLOCKS) / FRAME_SIZE) | |
| 730 | − | |
| 731 | −#define BLOCK_RETIRE_TOV_IN_MS 64 | |
| 732 | −#define BLOCK_PRIV_AREA_SZ 13 | |
| 733 | − | |
| 734 | −#define ALIGN_8(x) (((x) + 8 - 1) & ~(8 - 1)) | |
| 735 | − | |
| 736 | −#define BLOCK_STATUS(x) ((x)->h1.block_status) | |
| 737 | −#define BLOCK_NUM_PKTS(x) ((x)->h1.num_pkts) | |
| 738 | −#define BLOCK_O2FP(x) ((x)->h1.offset_to_first_pkt) | |
| 739 | −#define BLOCK_LEN(x) ((x)->h1.blk_len) | |
| 740 | −#define BLOCK_SNUM(x) ((x)->h1.seq_num) | |
| 741 | −#define BLOCK_O2PRIV(x) ((x)->offset_to_priv) | |
| 742 | −#define BLOCK_PRIV(x) ((void *) ((uint8_t *) (x) + BLOCK_O2PRIV(x))) | |
| 743 | −#define BLOCK_HDR_LEN (ALIGN_8(sizeof(struct block_desc))) | |
| 744 | −#define BLOCK_PLUS_PRIV(sz_pri) (BLOCK_HDR_LEN + ALIGN_8((sz_pri))) | |
| 745 | − | |
| 746 | 731 | #ifndef likely |
| 747 | 732 | # define likely(x) __builtin_expect(!!(x), 1) |
| 748 | 733 | #endif |
| @@ -765,7 +750,7 @@ struct ring { · 16 unmodified lines | ||
| 765 | 750 | static unsigned long packets_total = 0, bytes_total = 0; |
| 766 | 751 | static sig_atomic_t sigint = 0; |
| 767 | 752 | |
| 768 | −void sighandler(int num) | |
| 753 | +static void sighandler(int num) | |
| 769 | 754 | { |
| 770 | 755 | sigint = 1; |
| 771 | 756 | } |
| @@ -774,6 +759,8 @@ static int setup_socket(struct ring *ring, char *netdev) · 2 unmodified lines | ||
| 774 | 759 | { |
| 775 | 760 | int err, i, fd, v = TPACKET_V3; |
| 776 | 761 | struct sockaddr_ll ll; |
| 762 | + unsigned int blocksiz = 1 << 22, framesiz = 1 << 11; | |
| 763 | + unsigned int blocknum = 64; | |
| 777 | 764 | |
| 778 | 765 | fd = socket(AF_PACKET, SOCK_RAW, htons(ETH_P_ALL)); |
| 779 | 766 | if (fd < 0) { |
| @@ -788,13 +775,12 @@ static int setup_socket(struct ring *ring, char *netdev) · 8 unmodified lines | ||
| 788 | 775 | } |
| 789 | 776 | |
| 790 | 777 | memset(&ring->req, 0, sizeof(ring->req)); |
| 791 | − ring->req.tp_block_size = BLOCK_SIZE; | |
| 792 | − ring->req.tp_frame_size = FRAME_SIZE; | |
| 793 | − ring->req.tp_block_nr = NUM_BLOCKS; | |
| 794 | − ring->req.tp_frame_nr = NUM_FRAMES; | |
| 795 | − ring->req.tp_retire_blk_tov = BLOCK_RETIRE_TOV_IN_MS; | |
| 796 | − ring->req.tp_sizeof_priv = BLOCK_PRIV_AREA_SZ; | |
| 797 | − ring->req.tp_feature_req_word |= TP_FT_REQ_FILL_RXHASH; | |
| 778 | + ring->req.tp_block_size = blocksiz; | |
| 779 | + ring->req.tp_frame_size = framesiz; | |
| 780 | + ring->req.tp_block_nr = blocknum; | |
| 781 | + ring->req.tp_frame_nr = (blocksiz * blocknum) / framesiz; | |
| 782 | + ring->req.tp_retire_blk_tov = 60; | |
| 783 | + ring->req.tp_feature_req_word = TP_FT_REQ_FILL_RXHASH; | |
| 798 | 784 | |
| 799 | 785 | err = setsockopt(fd, SOL_PACKET, PACKET_RX_RING, &ring->req, |
| 800 | 786 | sizeof(ring->req)); |
| @@ -804,8 +790,7 @@ static int setup_socket(struct ring *ring, char *netdev) · 3 unmodified lines | ||
| 804 | 790 | } |
| 805 | 791 | |
| 806 | 792 | ring->map = mmap(NULL, ring->req.tp_block_size * ring->req.tp_block_nr, |
| 807 | − PROT_READ | PROT_WRITE, MAP_SHARED | MAP_LOCKED, | |
| 808 | − fd, 0); | |
| 793 | + PROT_READ | PROT_WRITE, MAP_SHARED | MAP_LOCKED, fd, 0); | |
| 809 | 794 | if (ring->map == MAP_FAILED) { |
| 810 | 795 | perror("mmap"); |
| 811 | 796 | exit(1); |
| @@ -835,58 +820,6 @@ static int setup_socket(struct ring *ring, char *netdev) · 23 unmodified lines | ||
| 835 | 820 | return fd; |
| 836 | 821 | } |
| 837 | 822 | |
| 838 | −#ifdef __checked | |
| 839 | −static uint64_t prev_block_seq_num = 0; | |
| 840 | − | |
| 841 | −void assert_block_seq_num(struct block_desc *pbd) | |
| 842 | −{ | |
| 843 | − if (unlikely(prev_block_seq_num + 1 != BLOCK_SNUM(pbd))) { | |
| 844 | − printf("prev_block_seq_num:%"PRIu64", expected seq:%"PRIu64" != " | |
| 845 | − "actual seq:%"PRIu64"\n", prev_block_seq_num, | |
| 846 | − prev_block_seq_num + 1, (uint64_t) BLOCK_SNUM(pbd)); | |
| 847 | − exit(1); | |
| 848 | − } | |
| 849 | − | |
| 850 | − prev_block_seq_num = BLOCK_SNUM(pbd); | |
| 851 | −} | |
| 852 | − | |
| 853 | −static void assert_block_len(struct block_desc *pbd, uint32_t bytes, int block_num) | |
| 854 | −{ | |
| 855 | − if (BLOCK_NUM_PKTS(pbd)) { | |
| 856 | − if (unlikely(bytes != BLOCK_LEN(pbd))) { | |
| 857 | − printf("block:%u with %upackets, expected len:%u != actual len:%u\n", | |
| 858 | − block_num, BLOCK_NUM_PKTS(pbd), bytes, BLOCK_LEN(pbd)); | |
| 859 | − exit(1); | |
| 860 | − } | |
| 861 | − } else { | |
| 862 | − if (unlikely(BLOCK_LEN(pbd) != BLOCK_PLUS_PRIV(BLOCK_PRIV_AREA_SZ))) { | |
| 863 | − printf("block:%u, expected len:%lu != actual len:%u\n", | |
| 864 | − block_num, BLOCK_HDR_LEN, BLOCK_LEN(pbd)); | |
| 865 | − exit(1); | |
| 866 | − } | |
| 867 | − } | |
| 868 | −} | |
| 869 | − | |
| 870 | −static void assert_block_header(struct block_desc *pbd, const int block_num) | |
| 871 | −{ | |
| 872 | − uint32_t block_status = BLOCK_STATUS(pbd); | |
| 873 | − | |
| 874 | − if (unlikely((block_status & TP_STATUS_USER) == 0)) { | |
| 875 | − printf("block:%u, not in TP_STATUS_USER\n", block_num); | |
| 876 | − exit(1); | |
| 877 | − } | |
| 878 | − | |
| 879 | − assert_block_seq_num(pbd); | |
| 880 | −} | |
| 881 | −#else | |
| 882 | −static inline void assert_block_header(struct block_desc *pbd, const int block_num) | |
| 883 | −{ | |
| 884 | −} | |
| 885 | −static void assert_block_len(struct block_desc *pbd, uint32_t bytes, int block_num) | |
| 886 | −{ | |
| 887 | −} | |
| 888 | −#endif | |
| 889 | − | |
| 890 | 823 | static void display(struct tpacket3_hdr *ppd) |
| 891 | 824 | { |
| 892 | 825 | struct ethhdr *eth = (struct ethhdr *) ((uint8_t *) ppd + ppd->tp_mac); |
| @@ -916,37 +849,27 @@ static void display(struct tpacket3_hdr *ppd) · 23 unmodified lines | ||
| 916 | 849 | |
| 917 | 850 | static void walk_block(struct block_desc *pbd, const int block_num) |
| 918 | 851 | { |
| 919 | − int num_pkts = BLOCK_NUM_PKTS(pbd), i; | |
| 852 | + int num_pkts = pbd->h1.num_pkts, i; | |
| 920 | 853 | unsigned long bytes = 0; |
| 921 | − unsigned long bytes_with_padding = BLOCK_PLUS_PRIV(BLOCK_PRIV_AREA_SZ); | |
| 922 | 854 | struct tpacket3_hdr *ppd; |
| 923 | 855 | |
| 924 | − assert_block_header(pbd, block_num); | |
| 925 | − | |
| 926 | − ppd = (struct tpacket3_hdr *) ((uint8_t *) pbd + BLOCK_O2FP(pbd)); | |
| 856 | + ppd = (struct tpacket3_hdr *) ((uint8_t *) pbd + | |
| 857 | + pbd->h1.offset_to_first_pkt); | |
| 927 | 858 | for (i = 0; i < num_pkts; ++i) { |
| 928 | 859 | bytes += ppd->tp_snaplen; |
| 929 | − if (ppd->tp_next_offset) | |
| 930 | − bytes_with_padding += ppd->tp_next_offset; | |
| 931 | − else | |
| 932 | − bytes_with_padding += ALIGN_8(ppd->tp_snaplen + ppd->tp_mac); | |
| 933 | − | |
| 934 | 860 | display(ppd); |
| 935 | 861 | |
| 936 | − ppd = (struct tpacket3_hdr *) ((uint8_t *) ppd + ppd->tp_next_offset); | |
| 937 | − __sync_synchronize(); | |
| 862 | + ppd = (struct tpacket3_hdr *) ((uint8_t *) ppd + | |
| 863 | + ppd->tp_next_offset); | |
| 938 | 864 | } |
| 939 | 865 | |
| 940 | − assert_block_len(pbd, bytes_with_padding, block_num); | |
| 941 | − | |
| 942 | 866 | packets_total += num_pkts; |
| 943 | 867 | bytes_total += bytes; |
| 944 | 868 | } |
| 945 | 869 | |
| 946 | −void flush_block(struct block_desc *pbd) | |
| 870 | +static void flush_block(struct block_desc *pbd) | |
| 947 | 871 | { |
| 948 | − BLOCK_STATUS(pbd) = TP_STATUS_KERNEL; | |
| 949 | − __sync_synchronize(); | |
| 872 | + pbd->h1.block_status = TP_STATUS_KERNEL; | |
| 950 | 873 | } |
| 951 | 874 | |
| 952 | 875 | static void teardown_socket(struct ring *ring, int fd) |
| @@ -962,7 +885,7 @@ int main(int argc, char **argp) · 9 unmodified lines | ||
| 962 | 885 | socklen_t len; |
| 963 | 886 | struct ring ring; |
| 964 | 887 | struct pollfd pfd; |
| 965 | − unsigned int block_num = 0; | |
| 888 | + unsigned int block_num = 0, blocks = 64; | |
| 966 | 889 | struct block_desc *pbd; |
| 967 | 890 | struct tpacket_stats_v3 stats; |
| 968 | 891 | |
| @@ -984,15 +907,15 @@ int main(int argc, char **argp) · 15 unmodified lines | ||
| 984 | 907 | |
| 985 | 908 | while (likely(!sigint)) { |
| 986 | 909 | pbd = (struct block_desc *) ring.rd[block_num].iov_base; |
| 987 | −retry_block: | |
| 988 | − if ((BLOCK_STATUS(pbd) & TP_STATUS_USER) == 0) { | |
| 910 | + | |
| 911 | + if ((pbd->h1.block_status & TP_STATUS_USER) == 0) { | |
| 989 | 912 | poll(&pfd, 1, -1); |
| 990 | − goto retry_block; | |
| 913 | + continue; | |
| 991 | 914 | } |
| 992 | 915 | |
| 993 | 916 | walk_block(pbd, block_num); |
| 994 | 917 | flush_block(pbd); |
| 995 | − block_num = (block_num + 1) % NUM_BLOCKS; | |
| 918 | + block_num = (block_num + 1) % blocks; | |
| 996 | 919 | } |
| 997 | 920 | |
| 998 | 921 | len = sizeof(stats); |
| @@ -163,6 +163,64 @@ and unnecessary. If there are fewer hardware queues than CPUs, then · 162 unmodified lines | ||
| 163 | 163 | RPS might be beneficial if the rps_cpus for each queue are the ones that |
| 164 | 164 | share the same memory domain as the interrupting CPU for that queue. |
| 165 | 165 | |
| 166 | +==== RPS Flow Limit | |
| 167 | + | |
| 168 | +RPS scales kernel receive processing across CPUs without introducing | |
| 169 | +reordering. The trade-off to sending all packets from the same flow | |
| 170 | +to the same CPU is CPU load imbalance if flows vary in packet rate. | |
| 171 | +In the extreme case a single flow dominates traffic. Especially on | |
| 172 | +common server workloads with many concurrent connections, such | |
| 173 | +behavior indicates a problem such as a misconfiguration or spoofed | |
| 174 | +source Denial of Service attack. | |
| 175 | + | |
| 176 | +Flow Limit is an optional RPS feature that prioritizes small flows | |
| 177 | +during CPU contention by dropping packets from large flows slightly | |
| 178 | +ahead of those from small flows. It is active only when an RPS or RFS | |
| 179 | +destination CPU approaches saturation. Once a CPU's input packet | |
| 180 | +queue exceeds half the maximum queue length (as set by sysctl | |
| 181 | +net.core.netdev_max_backlog), the kernel starts a per-flow packet | |
| 182 | +count over the last 256 packets. If a flow exceeds a set ratio (by | |
| 183 | +default, half) of these packets when a new packet arrives, then the | |
| 184 | +new packet is dropped. Packets from other flows are still only | |
| 185 | +dropped once the input packet queue reaches netdev_max_backlog. | |
| 186 | +No packets are dropped when the input packet queue length is below | |
| 187 | +the threshold, so flow limit does not sever connections outright: | |
| 188 | +even large flows maintain connectivity. | |
| 189 | + | |
| 190 | +== Interface | |
| 191 | + | |
| 192 | +Flow limit is compiled in by default (CONFIG_NET_FLOW_LIMIT), but not | |
| 193 | +turned on. It is implemented for each CPU independently (to avoid lock | |
| 194 | +and cache contention) and toggled per CPU by setting the relevant bit | |
| 195 | +in sysctl net.core.flow_limit_cpu_bitmap. It exposes the same CPU | |
| 196 | +bitmap interface as rps_cpus (see above) when called from procfs: | |
| 197 | + | |
| 198 | + /proc/sys/net/core/flow_limit_cpu_bitmap | |
| 199 | + | |
| 200 | +Per-flow rate is calculated by hashing each packet into a hashtable | |
| 201 | +bucket and incrementing a per-bucket counter. The hash function is | |
| 202 | +the same that selects a CPU in RPS, but as the number of buckets can | |
| 203 | +be much larger than the number of CPUs, flow limit has finer-grained | |
| 204 | +identification of large flows and fewer false positives. The default | |
| 205 | +table has 4096 buckets. This value can be modified through sysctl | |
| 206 | + | |
| 207 | + net.core.flow_limit_table_len | |
| 208 | + | |
| 209 | +The value is only consulted when a new table is allocated. Modifying | |
| 210 | +it does not update active tables. | |
| 211 | + | |
| 212 | +== Suggested Configuration | |
| 213 | + | |
| 214 | +Flow limit is useful on systems with many concurrent connections, | |
| 215 | +where a single connection taking up 50% of a CPU indicates a problem. | |
| 216 | +In such environments, enable the feature on all CPUs that handle | |
| 217 | +network rx interrupts (as set in /proc/irq/N/smp_affinity). | |
| 218 | + | |
| 219 | +The feature depends on the input packet queue length to exceed | |
| 220 | +the flow limit threshold (50%) + the flow history length (256). | |
| 221 | +Setting net.core.netdev_max_backlog to either 1000 or 10000 | |
| 222 | +performed well in experiments. | |
| 223 | + | |
| 166 | 224 | |
| 167 | 225 | RFS: Receive Flow Steering |
| 168 | 226 | ========================== |
| @@ -359,7 +359,7 @@ steps you should take: · 358 unmodified lines | ||
| 359 | 359 | - OK, it's a driver problem. |
| 360 | 360 | |
| 361 | 361 | You need to generate a report. Typically this is an email to the |
| 362 | − maintainer and/or linux-net@vger.kernel.org. The maintainer's | |
| 362 | + maintainer and/or netdev@vger.kernel.org. The maintainer's | |
| 363 | 363 | email address will be in the driver source or in the MAINTAINERS file. |
| 364 | 364 | |
| 365 | 365 | - The contents of your report will vary a lot depending upon the |
| @@ -121,6 +121,38 @@ IPv6 addresses: · 120 unmodified lines | ||
| 121 | 121 | print a compressed IPv6 address as described by |
| 122 | 122 | http://tools.ietf.org/html/rfc5952 |
| 123 | 123 | |
| 124 | +IPv4/IPv6 addresses (generic, with port, flowinfo, scope): | |
| 125 | + | |
| 126 | + %pIS 1.2.3.4 or 0001:0002:0003:0004:0005:0006:0007:0008 | |
| 127 | + %piS 001.002.003.004 or 00010002000300040005000600070008 | |
| 128 | + %pISc 1.2.3.4 or 1:2:3:4:5:6:7:8 | |
| 129 | + %pISpc 1.2.3.4:12345 or [1:2:3:4:5:6:7:8]:12345 | |
| 130 | + %p[Ii]S[pfschnbl] | |
| 131 | + | |
| 132 | + For printing an IP address without the need to distinguish whether it's | |
| 133 | + of type AF_INET or AF_INET6, a pointer to a valid 'struct sockaddr', | |
| 134 | + specified through 'IS' or 'iS', can be passed to this format specifier. | |
| 135 | + | |
| 136 | + The additional 'p', 'f', and 's' specifiers are used to specify port | |
| 137 | + (IPv4, IPv6), flowinfo (IPv6) and scope (IPv6). Ports have a ':' prefix, | |
| 138 | + flowinfo a '/' and scope a '%', each followed by the actual value. | |
| 139 | + | |
| 140 | + In case of an IPv6 address the compressed IPv6 address as described by | |
| 141 | + http://tools.ietf.org/html/rfc5952 is being used if the additional | |
| 142 | + specifier 'c' is given. The IPv6 address is surrounded by '[', ']' in | |
| 143 | + case of additional specifiers 'p', 'f' or 's' as suggested by | |
| 144 | + https://tools.ietf.org/html/draft-ietf-6man-text-addr-representation-07 | |
| 145 | + | |
| 146 | + In case of IPv4 addresses, the additional 'h', 'n', 'b', and 'l' | |
| 147 | + specifiers can be used as well and are ignored in case of an IPv6 | |
| 148 | + address. | |
| 149 | + | |
| 150 | + Further examples: | |
| 151 | + | |
| 152 | + %pISfc 1.2.3.4 or [1:2:3:4:5:6:7:8]/123456789 | |
| 153 | + %pISsc 1.2.3.4 or [1:2:3:4:5:6:7:8]%1234567890 | |
| 154 | + %pISpfc 1.2.3.4:12345 or [1:2:3:4:5:6:7:8]:12345/123456789 | |
| 155 | + | |
| 124 | 156 | UUID/GUID addresses: |
| 125 | 157 | |
| 126 | 158 | %pUb 00010203-0405-0607-0809-0a0b0c0d0e0f |
| @@ -26,7 +26,7 @@ Table : Subdirectories in /proc/sys/net · 25 unmodified lines | ||
| 26 | 26 | ipv4 IP version 4 x25 X.25 protocol |
| 27 | 27 | ipx IPX token-ring IBM token ring |
| 28 | 28 | bridge Bridging decnet DEC net |
| 29 | − ipv6 IP version 6 | |
| 29 | + ipv6 IP version 6 tipc TIPC | |
| 30 | 30 | .............................................................................. |
| 31 | 31 | |
| 32 | 32 | 1. /proc/sys/net/core - Network core options |
| @@ -50,6 +50,29 @@ The maximum number of packets that kernel can handle on a NAPI interrupt, · 17 unmodified lines | ||
| 50 | 50 | it's a Per-CPU variable. |
| 51 | 51 | Default: 64 |
| 52 | 52 | |
| 53 | +low_latency_read | |
| 54 | +---------------- | |
| 55 | +Low latency busy poll timeout for socket reads. (needs CONFIG_NET_LL_RX_POLL) | |
| 56 | +Approximate time in us to busy loop waiting for packets on the device queue. | |
| 57 | +This sets the default value of the SO_LL socket option. | |
| 58 | +Can be set or overridden per socket by setting socket option SO_LL, which is | |
| 59 | +the preferred method of enabling. | |
| 60 | +If you need to enable the feature globally via sysctl, a value of 50 is recommended. | |
| 61 | +Will increase power usage. | |
| 62 | +Default: 0 (off) | |
| 63 | + | |
| 64 | +low_latency_poll | |
| 65 | +---------------- | |
| 66 | +Low latency busy poll timeout for poll and select. (needs CONFIG_NET_LL_RX_POLL) | |
| 67 | +Approximate time in us to busy loop waiting for events. | |
| 68 | +Recommended value depends on the number of sockets you poll on. | |
| 69 | +For several sockets 50, for several hundreds 100. | |
| 70 | +For more than that you probably want to use epoll. | |
| 71 | +Note that only sockets with SO_LL set will be busy polled, so you want to either | |
| 72 | +selectively set SO_LL on those sockets or set sysctl.net.low_latency_read globally. | |
| 73 | +Will increase power usage. | |
| 74 | +Default: 0 (off) | |
| 75 | + | |
| 53 | 76 | rmem_default |
| 54 | 77 | ------------ |
| 55 | 78 | |
| @@ -93,8 +116,7 @@ netdev_budget · 37 unmodified lines | ||
| 93 | 116 | |
| 94 | 117 | Maximum number of packets taken from all interfaces in one polling cycle (NAPI |
| 95 | 118 | poll). In one polling cycle interfaces which are registered to polling are |
| 96 | −probed in a round-robin manner. The limit of packets in one such probe can be | |
| 97 | −set per-device via sysfs class/net/<device>/weight . | |
| 119 | +probed in a round-robin manner. | |
| 98 | 120 | |
| 99 | 121 | netdev_max_backlog |
| 100 | 122 | ------------------ |
| @@ -201,3 +223,18 @@ IPX. · 100 unmodified lines | ||
| 201 | 223 | The /proc/net/ipx_route table holds a list of IPX routes. For each route it |
| 202 | 224 | gives the destination network, the router node (or Directly) and the network |
| 203 | 225 | address of the router (or Connected) for internal networks. |
| 226 | + | |
| 227 | +6. TIPC | |
| 228 | +------------------------------------------------------- | |
| 229 | + | |
| 230 | +The TIPC protocol now has a tunable for the receive memory, similar to the | |
| 231 | +tcp_rmem - i.e. a vector of 3 INTEGERs: (min, default, max) | |
| 232 | + | |
| 233 | + # cat /proc/sys/net/tipc/tipc_rmem | |
| 234 | + 4252725 34021800 68043600 | |
| 235 | + # | |
| 236 | + | |
| 237 | +The max value is set to CONN_OVERLOAD_LIMIT, and the default and min values | |
| 238 | +are scaled (shifted) versions of that same value. Note that the min value | |
| 239 | +is not at this point in time used in any meaningful way, but the triplet is | |
| 240 | +preserved in order to be consistent with things like tcp_rmem. | |
| @@ -2332,6 +2332,11 @@ M: Jaya Kumar <jayakumar.alsa@gmail.com> · 2331 unmodified lines | ||
| 2332 | 2332 | S: Maintained |
| 2333 | 2333 | F: sound/pci/cs5535audio/ |
| 2334 | 2334 | |
| 2335 | +CW1200 WLAN driver | |
| 2336 | +M: Solomon Peachy <pizza@shaftnet.org> | |
| 2337 | +S: Maintained | |
| 2338 | +F: drivers/net/wireless/cw1200/ | |
| 2339 | + | |
| 2335 | 2340 | CX18 VIDEO4LINUX DRIVER |
| 2336 | 2341 | M: Andy Walls <awalls@md.metrocast.net> |
| 2337 | 2342 | L: ivtv-devel@ivtvdriver.org (moderated for non-subscribers) |
| @@ -81,4 +81,6 @@ · 80 unmodified lines | ||
| 81 | 81 | |
| 82 | 82 | #define SO_SELECT_ERR_QUEUE 45 |
| 83 | 83 | |
| 84 | +#define SO_LL 46 | |
| 85 | + | |
| 84 | 86 | #endif /* _UAPI_ASM_SOCKET_H */ |
| @@ -214,10 +214,12 @@ · 213 unmodified lines | ||
| 214 | 214 | |
| 215 | 215 | &cpsw_emac0 { |
| 216 | 216 | phy_id = <&davinci_mdio>, <0>; |
| 217 | + phy-mode = "mii"; | |
| 217 | 218 | }; |
| 218 | 219 | |
| 219 | 220 | &cpsw_emac1 { |
| 220 | 221 | phy_id = <&davinci_mdio>, <1>; |
| 222 | + phy-mode = "mii"; | |
| 221 | 223 | }; |
| 222 | 224 | |
| 223 | 225 | &mac { |
| @@ -467,8 +467,10 @@ · 466 unmodified lines | ||
| 467 | 467 | |
| 468 | 468 | &cpsw_emac0 { |
| 469 | 469 | phy_id = <&davinci_mdio>, <0>; |
| 470 | + phy-mode = "rgmii-txid"; | |
| 470 | 471 | }; |
| 471 | 472 | |
| 472 | 473 | &cpsw_emac1 { |
| 473 | 474 | phy_id = <&davinci_mdio>, <1>; |
| 475 | + phy-mode = "rgmii-txid"; | |
| 474 | 476 | }; |
| @@ -392,3 +392,13 @@ · 391 unmodified lines | ||
| 392 | 392 | pinctrl-0 = <&davinci_mdio_default>; |
| 393 | 393 | pinctrl-1 = <&davinci_mdio_sleep>; |
| 394 | 394 | }; |
| 395 | + | |
| 396 | +&cpsw_emac0 { | |
| 397 | + phy_id = <&davinci_mdio>, <0>; | |
| 398 | + phy-mode = "rgmii-txid"; | |
| 399 | +}; | |
| 400 | + | |
| 401 | +&cpsw_emac1 { | |
| 402 | + phy_id = <&davinci_mdio>, <1>; | |
| 403 | + phy-mode = "rgmii-txid"; | |
| 404 | +}; | |
| @@ -155,12 +155,14 @@ · 154 unmodified lines | ||
| 155 | 155 | can0: can@80032000 { |
| 156 | 156 | pinctrl-names = "default"; |
| 157 | 157 | pinctrl-0 = <&can0_pins_a>; |
| 158 | + xceiver-supply = <®_can_3v3>; | |
| 158 | 159 | status = "okay"; |
| 159 | 160 | }; |
| 160 | 161 | |
| 161 | 162 | can1: can@80034000 { |
| 162 | 163 | pinctrl-names = "default"; |
| 163 | 164 | pinctrl-0 = <&can1_pins_a>; |
| 165 | + xceiver-supply = <®_can_3v3>; | |
| 164 | 166 | status = "okay"; |
| 165 | 167 | }; |
| 166 | 168 | }; |
| @@ -319,6 +321,16 @@ · 152 unmodified lines | ||
| 319 | 321 | gpio = <&gpio3 30 0>; |
| 320 | 322 | enable-active-high; |
| 321 | 323 | }; |
| 324 | + | |
| 325 | + reg_can_3v3: can-3v3 { | |
| 326 | + compatible = "regulator-fixed"; | |
| 327 | + regulator-name = "can-3v3"; | |
| 328 | + regulator-min-microvolt = <3300000>; | |
| 329 | + regulator-max-microvolt = <3300000>; | |
| 330 | + gpio = <&gpio2 13 0>; | |
| 331 | + enable-active-high; | |
| 332 | + }; | |
| 333 | + | |
| 322 | 334 | }; |
| 323 | 335 | |
| 324 | 336 | sound { |
| @@ -27,6 +27,21 @@ · 26 unmodified lines | ||
| 27 | 27 | }; |
| 28 | 28 | |
| 29 | 29 | soc@01c20000 { |
| 30 | + emac: ethernet@01c0b000 { | |
| 31 | + pinctrl-names = "default"; | |
| 32 | + pinctrl-0 = <&emac_pins_a>; | |
| 33 | + phy = <&phy1>; | |
| 34 | + status = "okay"; | |
| 35 | + }; | |
| 36 | + | |
| 37 | + mdio@01c0b080 { | |
| 38 | + status = "okay"; | |
| 39 | + | |
| 40 | + phy1: ethernet-phy@1 { | |
| 41 | + reg = <1>; | |
| 42 | + }; | |
| 43 | + }; | |
| 44 | + | |
| 30 | 45 | pinctrl@01c20800 { |
| 31 | 46 | led_pins_cubieboard: led_pins@0 { |
| 32 | 47 | allwinner,pins = "PH20", "PH21"; |
| @@ -23,10 +23,51 @@ · 22 unmodified lines | ||
| 23 | 23 | }; |
| 24 | 24 | |
| 25 | 25 | soc@01c20000 { |
| 26 | + emac: ethernet@01c0b000 { | |
| 27 | + pinctrl-names = "default"; | |
| 28 | + pinctrl-0 = <&emac_pins_a>; | |
| 29 | + phy = <&phy0>; | |
| 30 | + status = "okay"; | |
| 31 | + }; | |
| 32 | + | |
| 33 | + mdio@01c0b080 { | |
| 34 | + phy-supply = <®_emac_3v3>; | |
| 35 | + status = "okay"; | |
| 36 | + | |
| 37 | + phy0: ethernet-phy@0 { | |
| 38 | + reg = <0>; | |
| 39 | + }; | |
| 40 | + }; | |
| 41 | + | |
| 42 | + pio: pinctrl@01c20800 { | |
| 43 | + pinctrl-names = "default"; | |
| 44 | + pinctrl-0 = <&hackberry_hogs>; | |
| 45 | + | |
| 46 | + hackberry_hogs: hogs@0 { | |
| 47 | + allwinner,pins = "PH19"; | |
| 48 | + allwinner,function = "gpio_out"; | |
| 49 | + allwinner,drive = <0>; | |
| 50 | + allwinner,pull = <0>; | |
| 51 | + }; | |
| 52 | + }; | |
| 53 | + | |
| 26 | 54 | uart0: serial@01c28000 { |
| 27 | 55 | pinctrl-names = "default"; |
| 28 | 56 | pinctrl-0 = <&uart0_pins_a>; |
| 29 | 57 | status = "okay"; |
| 30 | 58 | }; |
| 31 | 59 | }; |
| 60 | + | |
| 61 | + regulators { | |
| 62 | + compatible = "simple-bus"; | |
| 63 | + | |
| 64 | + reg_emac_3v3: emac-3v3 { | |
| 65 | + compatible = "regulator-fixed"; | |
| 66 | + regulator-name = "emac-3v3"; | |
| 67 | + regulator-min-microvolt = <3300000>; | |
| 68 | + regulator-max-microvolt = <3300000>; | |
| 69 | + enable-active-high; | |
| 70 | + gpio = <&pio 7 19 0>; | |
| 71 | + }; | |
| 72 | + }; | |
| 32 | 73 | }; |
| @@ -167,6 +167,22 @@ · 166 unmodified lines | ||
| 167 | 167 | reg = <0x01c20000 0x300000>; |
| 168 | 168 | ranges; |
| 169 | 169 | |
| 170 | + emac: ethernet@01c0b000 { | |
| 171 | + compatible = "allwinner,sun4i-emac"; | |
| 172 | + reg = <0x01c0b000 0x1000>; | |
| 173 | + interrupts = <55>; | |
| 174 | + clocks = <&ahb_gates 17>; | |
| 175 | + status = "disabled"; | |
| 176 | + }; | |
| 177 | + | |
| 178 | + mdio@01c0b080 { | |
| 179 | + compatible = "allwinner,sun4i-mdio"; | |
| 180 | + reg = <0x01c0b080 0x14>; | |
| 181 | + status = "disabled"; | |
| 182 | + #address-cells = <1>; | |
| 183 | + #size-cells = <0>; | |
| 184 | + }; | |
| 185 | + | |
| 170 | 186 | intc: interrupt-controller@01c20400 { |
| 171 | 187 | compatible = "allwinner,sun4i-ic"; |
| 172 | 188 | reg = <0x01c20400 0x400>; |
| @@ -226,6 +242,17 @@ · 53 unmodified lines | ||
| 226 | 242 | allwinner,drive = <0>; |
| 227 | 243 | allwinner,pull = <0>; |
| 228 | 244 | }; |
| 245 | + | |
| 246 | + emac_pins_a: emac0@0 { | |
| 247 | + allwinner,pins = "PA0", "PA1", "PA2", | |
| 248 | + "PA3", "PA4", "PA5", "PA6", | |
| 249 | + "PA7", "PA8", "PA9", "PA10", | |
| 250 | + "PA11", "PA12", "PA13", "PA14", | |
| 251 | + "PA15", "PA16"; | |
| 252 | + allwinner,function = "emac"; | |
| 253 | + allwinner,drive = <0>; | |
| 254 | + allwinner,pull = <0>; | |
| 255 | + }; | |
| 229 | 256 | }; |
| 230 | 257 | |
| 231 | 258 | timer@01c20c00 { |
| @@ -286,3 +286,4 @@ CONFIG_SOC_OMAP5=y · 285 unmodified lines | ||
| 286 | 286 | CONFIG_TI_DAVINCI_MDIO=y |
| 287 | 287 | CONFIG_TI_DAVINCI_CPDMA=y |
| 288 | 288 | CONFIG_TI_CPSW=y |
| 289 | +CONFIG_AT803X_PHY=y | |
| @@ -108,7 +108,6 @@ config SOC_IMX25 · 107 unmodified lines | ||
| 108 | 108 | select ARCH_MXC_IOMUX_V3 |
| 109 | 109 | select COMMON_CLK |
| 110 | 110 | select CPU_ARM926T |
| 111 | − select HAVE_CAN_FLEXCAN if CAN | |
| 112 | 111 | select MXC_AVIC |
| 113 | 112 | |
| 114 | 113 | config SOC_IMX27 |
| @@ -134,7 +133,6 @@ config SOC_IMX35 · 19 unmodified lines | ||
| 134 | 133 | select ARCH_MXC_IOMUX_V3 |
| 135 | 134 | select COMMON_CLK |
| 136 | 135 | select CPU_V6K |
| 137 | − select HAVE_CAN_FLEXCAN if CAN | |
| 138 | 136 | select HAVE_EPIT |
| 139 | 137 | select MXC_AVIC |
| 140 | 138 | select SMP_ON_UP if SMP |
| @@ -774,7 +772,6 @@ comment "Device tree only" · 633 unmodified lines | ||
| 774 | 772 | |
| 775 | 773 | config SOC_IMX53 |
| 776 | 774 | bool "i.MX53 support" |
| 777 | − select HAVE_CAN_FLEXCAN if CAN | |
| 778 | 775 | select HAVE_IMX_SRC |
| 779 | 776 | select IMX_HAVE_PLATFORM_IMX2_WDT |
| 780 | 777 | select PINCTRL |
| @@ -797,7 +794,6 @@ config SOC_IMX6Q · 16 unmodified lines | ||
| 797 | 794 | select CPU_V7 |
| 798 | 795 | select HAVE_ARM_SCU if SMP |
| 799 | 796 | select HAVE_ARM_TWD if LOCAL_TIMERS |
| 800 | − select HAVE_CAN_FLEXCAN if CAN | |
| 801 | 797 | select HAVE_IMX_ANATOP |
| 802 | 798 | select HAVE_IMX_GPC |
| 803 | 799 | select HAVE_IMX_MMDC |
| @@ -13,10 +13,10 @@ extern const struct imx_fec_data imx25_fec_data; · 12 unmodified lines | ||
| 13 | 13 | imx_add_fec(&imx25_fec_data, pdata) |
| 14 | 14 | |
| 15 | 15 | extern const struct imx_flexcan_data imx25_flexcan_data[]; |
| 16 | −#define imx25_add_flexcan(id, pdata) \ | |
| 17 | − imx_add_flexcan(&imx25_flexcan_data[id], pdata) | |
| 18 | −#define imx25_add_flexcan0(pdata) imx25_add_flexcan(0, pdata) | |
| 19 | −#define imx25_add_flexcan1(pdata) imx25_add_flexcan(1, pdata) | |
| 16 | +#define imx25_add_flexcan(id) \ | |
| 17 | + imx_add_flexcan(&imx25_flexcan_data[id]) | |
| 18 | +#define imx25_add_flexcan0() imx25_add_flexcan(0) | |
| 19 | +#define imx25_add_flexcan1() imx25_add_flexcan(1) | |
| 20 | 20 | |
| 21 | 21 | extern const struct imx_fsl_usb2_udc_data imx25_fsl_usb2_udc_data; |
| 22 | 22 | #define imx25_add_fsl_usb2_udc(pdata) \ |
| @@ -17,10 +17,10 @@ extern const struct imx_fsl_usb2_udc_data imx35_fsl_usb2_udc_data; · 16 unmodified lines | ||
| 17 | 17 | imx_add_fsl_usb2_udc(&imx35_fsl_usb2_udc_data, pdata) |
| 18 | 18 | |
| 19 | 19 | extern const struct imx_flexcan_data imx35_flexcan_data[]; |
| 20 | −#define imx35_add_flexcan(id, pdata) \ | |
| 21 | − imx_add_flexcan(&imx35_flexcan_data[id], pdata) | |
| 22 | −#define imx35_add_flexcan0(pdata) imx35_add_flexcan(0, pdata) | |
| 23 | −#define imx35_add_flexcan1(pdata) imx35_add_flexcan(1, pdata) | |
| 20 | +#define imx35_add_flexcan(id) \ | |
| 21 | + imx_add_flexcan(&imx35_flexcan_data[id]) | |
| 22 | +#define imx35_add_flexcan0() imx35_add_flexcan(0) | |
| 23 | +#define imx35_add_flexcan1() imx35_add_flexcan(1) | |
| 24 | 24 | |
| 25 | 25 | extern const struct imx_imx2_wdt_data imx35_imx2_wdt_data; |
| 26 | 26 | #define imx35_add_imx2_wdt() \ |
| @@ -4,7 +4,6 @@ config IMX_HAVE_PLATFORM_FEC · 3 unmodified lines | ||
| 4 | 4 | |
| 5 | 5 | config IMX_HAVE_PLATFORM_FLEXCAN |
| 6 | 6 | bool |
| 7 | − select HAVE_CAN_FLEXCAN if CAN | |
| 8 | 7 | |
| 9 | 8 | config IMX_HAVE_PLATFORM_FSL_USB2_UDC |
| 10 | 9 | bool |
| @@ -50,7 +50,6 @@ struct platform_device *__init imx_add_fec( · 49 unmodified lines | ||
| 50 | 50 | const struct imx_fec_data *data, |
| 51 | 51 | const struct fec_platform_data *pdata); |
| 52 | 52 | |
| 53 | −#include <linux/can/platform/flexcan.h> | |
| 54 | 53 | struct imx_flexcan_data { |
| 55 | 54 | int id; |
| 56 | 55 | resource_size_t iobase; |
| @@ -58,8 +57,7 @@ struct imx_flexcan_data { · 1 unmodified line | ||
| 58 | 57 | resource_size_t irq; |
| 59 | 58 | }; |
| 60 | 59 | struct platform_device *__init imx_add_flexcan( |
| 61 | − const struct imx_flexcan_data *data, | |
| 62 | − const struct flexcan_platform_data *pdata); | |
| 60 | + const struct imx_flexcan_data *data); | |
| 63 | 61 | |
| 64 | 62 | #include <linux/fsl_devices.h> |
| 65 | 63 | struct imx_fsl_usb2_udc_data { |
| @@ -38,8 +38,7 @@ const struct imx_flexcan_data imx35_flexcan_data[] __initconst = { · 37 unmodified lines | ||
| 38 | 38 | #endif /* ifdef CONFIG_SOC_IMX35 */ |
| 39 | 39 | |
| 40 | 40 | struct platform_device *__init imx_add_flexcan( |
| 41 | − const struct imx_flexcan_data *data, | |
| 42 | − const struct flexcan_platform_data *pdata) | |
| 41 | + const struct imx_flexcan_data *data) | |
| 43 | 42 | { |
| 44 | 43 | struct resource res[] = { |
| 45 | 44 | { |
| @@ -54,5 +53,5 @@ struct platform_device *__init imx_add_flexcan( · 8 unmodified lines | ||
| 54 | 53 | }; |
| 55 | 54 | |
| 56 | 55 | return imx_add_platform_device("flexcan", data->id, |
| 57 | − res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); | |
| 56 | + res, ARRAY_SIZE(res), NULL, 0); | |
| 58 | 57 | } |
| @@ -279,7 +279,7 @@ void __init eukrea_mbimxsd25_baseboard_init(void) · 278 unmodified lines | ||
| 279 | 279 | imx25_add_imx_fb(&eukrea_mximxsd_fb_pdata); |
| 280 | 280 | imx25_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata); |
| 281 | 281 | |
| 282 | − imx25_add_flexcan1(NULL); | |
| 282 | + imx25_add_flexcan1(); | |
| 283 | 283 | imx25_add_sdhci_esdhc_imx(0, &sd1_pdata); |
| 284 | 284 | |
| 285 | 285 | gpio_request(GPIO_LED1, "LED1"); |
| @@ -287,7 +287,7 @@ void __init eukrea_mbimxsd35_baseboard_init(void) · 286 unmodified lines | ||
| 287 | 287 | |
| 288 | 288 | imx35_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata); |
| 289 | 289 | |
| 290 | − imx35_add_flexcan1(NULL); | |
| 290 | + imx35_add_flexcan1(); | |
| 291 | 291 | imx35_add_sdhci_esdhc_imx(0, &sd1_pdata); |
| 292 | 292 | |
| 293 | 293 | gpio_request(GPIO_LED1, "LED1"); |
| @@ -249,7 +249,7 @@ static void __init mx25pdk_init(void) · 248 unmodified lines | ||
| 249 | 249 | imx25_add_imx_i2c0(&mx25_3ds_i2c0_data); |
| 250 | 250 | |
| 251 | 251 | gpio_request_one(MX25PDK_CAN_PWDN, GPIOF_OUT_INIT_LOW, "can-pwdn"); |
| 252 | − imx25_add_flexcan0(NULL); | |
| 252 | + imx25_add_flexcan0(); | |
| 253 | 253 | } |
| 254 | 254 | |
| 255 | 255 | static void __init mx25pdk_timer_init(void) |
| @@ -385,7 +385,7 @@ static void __init pcm043_init(void) · 384 unmodified lines | ||
| 385 | 385 | if (!otg_mode_host) |
| 386 | 386 | imx35_add_fsl_usb2_udc(&otg_device_pdata); |
| 387 | 387 | |
| 388 | − imx35_add_flexcan1(NULL); | |
| 388 | + imx35_add_flexcan1(); | |
| 389 | 389 | imx35_add_sdhci_esdhc_imx(0, &sd1_pdata); |
| 390 | 390 | } |
| 391 | 391 | |
| @@ -10,7 +10,6 @@ config SOC_IMX28 · 9 unmodified lines | ||
| 10 | 10 | select ARM_AMBA |
| 11 | 11 | select ARM_CPU_SUSPEND if PM |
| 12 | 12 | select CPU_ARM926T |
| 13 | − select HAVE_CAN_FLEXCAN if CAN | |
| 14 | 13 | select PINCTRL_IMX28 |
| 15 | 14 | |
| 16 | 15 | config ARCH_MXS |
| @@ -14,7 +14,6 @@ · 13 unmodified lines | ||
| 14 | 14 | #include <linux/clk/mxs.h> |
| 15 | 15 | #include <linux/clkdev.h> |
| 16 | 16 | #include <linux/clocksource.h> |
| 17 | −#include <linux/can/platform/flexcan.h> | |
| 18 | 17 | #include <linux/delay.h> |
| 19 | 18 | #include <linux/err.h> |
| 20 | 19 | #include <linux/gpio.h> |
| @@ -77,41 +76,6 @@ static inline void __mxs_togl(u32 mask, void __iomem *reg) · 56 unmodified lines | ||
| 77 | 76 | __raw_writel(mask, reg + MXS_TOG_ADDR); |
| 78 | 77 | } |
| 79 | 78 | |
| 80 | −/* | |
| 81 | − * MX28EVK_FLEXCAN_SWITCH is shared between both flexcan controllers | |
| 82 | − */ | |
| 83 | −#define MX28EVK_FLEXCAN_SWITCH MXS_GPIO_NR(2, 13) | |
| 84 | − | |
| 85 | −static int flexcan0_en, flexcan1_en; | |
| 86 | − | |
| 87 | −static void mx28evk_flexcan_switch(void) | |
| 88 | −{ | |
| 89 | − if (flexcan0_en || flexcan1_en) | |
| 90 | − gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 1); | |
| 91 | − else | |
| 92 | − gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 0); | |
| 93 | −} | |
| 94 | − | |
| 95 | −static void mx28evk_flexcan0_switch(int enable) | |
| 96 | −{ | |
| 97 | − flexcan0_en = enable; | |
| 98 | − mx28evk_flexcan_switch(); | |
| 99 | −} | |
| 100 | − | |
| 101 | −static void mx28evk_flexcan1_switch(int enable) | |
| 102 | −{ | |
| 103 | − flexcan1_en = enable; | |
| 104 | − mx28evk_flexcan_switch(); | |
| 105 | −} | |
| 106 | − | |
| 107 | −static struct flexcan_platform_data flexcan_pdata[2]; | |
| 108 | − | |
| 109 | −static struct of_dev_auxdata mxs_auxdata_lookup[] __initdata = { | |
| 110 | − OF_DEV_AUXDATA("fsl,imx28-flexcan", 0x80032000, NULL, &flexcan_pdata[0]), | |
| 111 | − OF_DEV_AUXDATA("fsl,imx28-flexcan", 0x80034000, NULL, &flexcan_pdata[1]), | |
| 112 | − { /* sentinel */ } | |
| 113 | −}; | |
| 114 | − | |
| 115 | 79 | #define OCOTP_WORD_OFFSET 0x20 |
| 116 | 80 | #define OCOTP_WORD_COUNT 0x20 |
| 117 | 81 | |
| @@ -271,15 +235,6 @@ static void __init imx28_evk_init(void) · 153 unmodified lines | ||
| 271 | 235 | mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0); |
| 272 | 236 | } |
| 273 | 237 | |
| 274 | −static void __init imx28_evk_post_init(void) | |
| 275 | −{ | |
| 276 | − if (!gpio_request_one(MX28EVK_FLEXCAN_SWITCH, GPIOF_DIR_OUT, | |
| 277 | − "flexcan-switch")) { | |
| 278 | − flexcan_pdata[0].transceiver_switch = mx28evk_flexcan0_switch; | |
| 279 | − flexcan_pdata[1].transceiver_switch = mx28evk_flexcan1_switch; | |
| 280 | − } | |
| 281 | −} | |
| 282 | − | |
| 283 | 238 | static int apx4devkit_phy_fixup(struct phy_device *phy) |
| 284 | 239 | { |
| 285 | 240 | phy->dev_flags |= MICREL_PHY_50MHZ_CLK; |
| @@ -485,13 +440,10 @@ static void __init mxs_machine_init(void) · 199 unmodified lines | ||
| 485 | 440 | crystalfontz_init(); |
| 486 | 441 | |
| 487 | 442 | of_platform_populate(NULL, of_default_bus_match_table, |
| 488 | − mxs_auxdata_lookup, parent); | |
| 443 | + NULL, parent); | |
| 489 | 444 | |
| 490 | 445 | if (of_machine_is_compatible("karo,tx28")) |
| 491 | 446 | tx28_post_init(); |
| 492 | − | |
| 493 | − if (of_machine_is_compatible("fsl,imx28-evk")) | |
| 494 | − imx28_evk_post_init(); | |
| 495 | 447 | } |
| 496 | 448 | |
| 497 | 449 | #define MX23_CLKCTRL_RESET_OFFSET 0x120 |
| @@ -378,7 +378,7 @@ static struct resource sh_eth_resources[] = { · 377 unmodified lines | ||
| 378 | 378 | }; |
| 379 | 379 | |
| 380 | 380 | static struct platform_device sh_eth_device = { |
| 381 | − .name = "sh-eth", | |
| 381 | + .name = "r8a7740-gether", | |
| 382 | 382 | .id = -1, |
| 383 | 383 | .dev = { |
| 384 | 384 | .platform_data = &sh_eth_platdata, |
| @@ -594,7 +594,7 @@ static struct clk_lookup lookups[] = { · 593 unmodified lines | ||
| 594 | 594 | CLKDEV_DEV_ID("e6860000.sdhi", &mstp_clks[MSTP313]), |
| 595 | 595 | CLKDEV_DEV_ID("sh_mmcif", &mstp_clks[MSTP312]), |
| 596 | 596 | CLKDEV_DEV_ID("e6bd0000.mmcif", &mstp_clks[MSTP312]), |
| 597 | − CLKDEV_DEV_ID("sh-eth", &mstp_clks[MSTP309]), | |
| 597 | + CLKDEV_DEV_ID("r8a7740-gether", &mstp_clks[MSTP309]), | |
| 598 | 598 | CLKDEV_DEV_ID("e9a00000.sh-eth", &mstp_clks[MSTP309]), |
| 599 | 599 | CLKDEV_DEV_ID("renesas_tpu_pwm", &mstp_clks[MSTP304]), |
| 600 | 600 | |
| @@ -145,7 +145,7 @@ static struct clk_lookup lookups[] = { · 144 unmodified lines | ||
| 145 | 145 | CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */ |
| 146 | 146 | CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */ |
| 147 | 147 | CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */ |
| 148 | − CLKDEV_DEV_ID("sh-eth", &mstp_clks[MSTP114]), /* Ether */ | |
| 148 | + CLKDEV_DEV_ID("r8a777x-ether", &mstp_clks[MSTP114]), /* Ether */ | |
| 149 | 149 | CLKDEV_DEV_ID("ehci-platform", &mstp_clks[MSTP100]), /* USB EHCI port0/1 */ |
| 150 | 150 | CLKDEV_DEV_ID("ohci-platform", &mstp_clks[MSTP100]), /* USB OHCI port0/1 */ |
| 151 | 151 | CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */ |
| @@ -165,7 +165,7 @@ static struct clk_lookup lookups[] = { · 164 unmodified lines | ||
| 165 | 165 | CLKDEV_DEV_ID("rcar-pcie", &mstp_clks[MSTP116]), /* PCIe */ |
| 166 | 166 | CLKDEV_DEV_ID("sata_rcar", &mstp_clks[MSTP115]), /* SATA */ |
| 167 | 167 | CLKDEV_DEV_ID("fc600000.sata", &mstp_clks[MSTP115]), /* SATA w/DT */ |
| 168 | − CLKDEV_DEV_ID("sh-eth", &mstp_clks[MSTP114]), /* Ether */ | |
| 168 | + CLKDEV_DEV_ID("r8a777x-ether", &mstp_clks[MSTP114]), /* Ether */ | |
| 169 | 169 | CLKDEV_DEV_ID("ehci-platform.1", &mstp_clks[MSTP101]), /* USB EHCI port2 */ |
| 170 | 170 | CLKDEV_DEV_ID("ohci-platform.1", &mstp_clks[MSTP101]), /* USB OHCI port2 */ |
| 171 | 171 | CLKDEV_DEV_ID("ehci-platform.0", &mstp_clks[MSTP100]), /* USB EHCI port0/1 */ |
| @@ -900,8 +900,7 @@ void bpf_jit_compile(struct sk_filter *fp) · 899 unmodified lines | ||
| 900 | 900 | #endif |
| 901 | 901 | |
| 902 | 902 | alloc_size = 4 * ctx.idx; |
| 903 | − ctx.target = module_alloc(max(sizeof(struct work_struct), | |
| 904 | − alloc_size)); | |
| 903 | + ctx.target = module_alloc(alloc_size); | |
| 905 | 904 | if (unlikely(ctx.target == NULL)) |
| 906 | 905 | goto out; |
| 907 | 906 | |
| @@ -927,19 +926,8 @@ out: · 19 unmodified lines | ||
| 927 | 926 | return; |
| 928 | 927 | } |
| 929 | 928 | |
| 930 | −static void bpf_jit_free_worker(struct work_struct *work) | |
| 931 | −{ | |
| 932 | − module_free(NULL, work); | |
| 933 | −} | |
| 934 | − | |
| 935 | 929 | void bpf_jit_free(struct sk_filter *fp) |
| 936 | 930 | { |
| 937 | − struct work_struct *work; | |
| 938 | − | |
| 939 | − if (fp->bpf_func != sk_run_filter) { | |
| 940 | − work = (struct work_struct *)fp->bpf_func; | |
| 941 | − | |
| 942 | − INIT_WORK(work, bpf_jit_free_worker); | |
| 943 | − schedule_work(work); | |
| 944 | − } | |
| 931 | + if (fp->bpf_func != sk_run_filter) | |
| 932 | + module_free(NULL, fp->bpf_func); | |
| 945 | 933 | } |
| @@ -74,4 +74,6 @@ · 73 unmodified lines | ||
| 74 | 74 | |
| 75 | 75 | #define SO_SELECT_ERR_QUEUE 45 |
| 76 | 76 | |
| 77 | +#define SO_LL 46 | |
| 78 | + | |
| 77 | 79 | #endif /* __ASM_AVR32_SOCKET_H */ |
| @@ -2,9 +2,7 @@ if ETRAX_ARCH_V10 · 1 unmodified line | ||
| 2 | 2 | |
| 3 | 3 | config ETRAX_ETHERNET |
| 4 | 4 | bool "Ethernet support" |
| 5 | − depends on ETRAX_ARCH_V10 | |
| 6 | − select ETHERNET | |
| 7 | − select NET_CORE | |
| 5 | + depends on ETRAX_ARCH_V10 && NETDEVICES | |
| 8 | 6 | select MII |
| 9 | 7 | help |
| 10 | 8 | This option enables the ETRAX 100LX built-in 10/100Mbit Ethernet |
| @@ -2,9 +2,7 @@ if ETRAX_ARCH_V32 · 1 unmodified line | ||
| 2 | 2 | |
| 3 | 3 | config ETRAX_ETHERNET |
| 4 | 4 | bool "Ethernet support" |
| 5 | − depends on ETRAX_ARCH_V32 | |
| 6 | − select ETHERNET | |
| 7 | − select NET_CORE | |
| 5 | + depends on ETRAX_ARCH_V32 && NETDEVICES | |
| 8 | 6 | select MII |
| 9 | 7 | help |
| 10 | 8 | This option enables the ETRAX FS built-in 10/100Mbit Ethernet |
| @@ -76,6 +76,8 @@ · 75 unmodified lines | ||
| 76 | 76 | |
| 77 | 77 | #define SO_SELECT_ERR_QUEUE 45 |
| 78 | 78 | |
| 79 | +#define SO_LL 46 | |
| 80 | + | |
| 79 | 81 | #endif /* _ASM_SOCKET_H */ |
| 80 | 82 | |
| 81 | 83 | |
| @@ -74,5 +74,7 @@ · 73 unmodified lines | ||
| 74 | 74 | |
| 75 | 75 | #define SO_SELECT_ERR_QUEUE 45 |
| 76 | 76 | |
| 77 | +#define SO_LL 46 | |
| 78 | + | |
| 77 | 79 | #endif /* _ASM_SOCKET_H */ |
| 78 | 80 | |
| @@ -74,4 +74,6 @@ · 73 unmodified lines | ||
| 74 | 74 | |
| 75 | 75 | #define SO_SELECT_ERR_QUEUE 45 |
| 76 | 76 | |
| 77 | +#define SO_LL 46 | |
| 78 | + | |
| 77 | 79 | #endif /* _ASM_SOCKET_H */ |
| @@ -268,7 +268,7 @@ static __inline__ int dev_is_ethdev(struct net_device *dev) · 267 unmodified lines | ||
| 268 | 268 | static int |
| 269 | 269 | simeth_device_event(struct notifier_block *this,unsigned long event, void *ptr) |
| 270 | 270 | { |
| 271 | − struct net_device *dev = ptr; | |
| 271 | + struct net_device *dev = netdev_notifier_info_to_dev(ptr); | |
| 272 | 272 | struct simeth_local *local; |
| 273 | 273 | struct in_device *in_dev; |
| 274 | 274 | struct in_ifaddr **ifap = NULL; |
| @@ -83,4 +83,6 @@ · 82 unmodified lines | ||
| 83 | 83 | |
| 84 | 84 | #define SO_SELECT_ERR_QUEUE 45 |
| 85 | 85 | |
| 86 | +#define SO_LL 46 | |
| 87 | + | |
| 86 | 88 | #endif /* _ASM_IA64_SOCKET_H */ |
| @@ -74,4 +74,6 @@ · 73 unmodified lines | ||
| 74 | 74 | |
| 75 | 75 | #define SO_SELECT_ERR_QUEUE 45 |
| 76 | 76 | |
| 77 | +#define SO_LL 46 | |
| 78 | + | |
| 77 | 79 | #endif /* _ASM_M32R_SOCKET_H */ |
| @@ -845,6 +845,10 @@ int __init board_register_devices(void) · 844 unmodified lines | ||
| 845 | 845 | !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr)) |
| 846 | 846 | bcm63xx_enet_register(1, &board.enet1); |
| 847 | 847 | |
| 848 | + if (board.has_enetsw && | |
| 849 | + !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr)) | |
| 850 | + bcm63xx_enetsw_register(&board.enetsw); | |
| 851 | + | |
| 848 | 852 | if (board.has_usbd) |
| 849 | 853 | bcm63xx_usbd_register(&board.usbd); |
| 850 | 854 | |
| @@ -9,16 +9,60 @@ · 8 unmodified lines | ||
| 9 | 9 | #include <linux/init.h> |
| 10 | 10 | #include <linux/kernel.h> |
| 11 | 11 | #include <linux/platform_device.h> |
| 12 | +#include <linux/export.h> | |
| 12 | 13 | #include <bcm63xx_dev_enet.h> |
| 13 | 14 | #include <bcm63xx_io.h> |
| 14 | 15 | #include <bcm63xx_regs.h> |
| 15 | 16 | |
| 17 | +#ifdef BCMCPU_RUNTIME_DETECT | |
| 18 | +static const unsigned long bcm6348_regs_enetdmac[] = { | |
| 19 | + [ENETDMAC_CHANCFG] = ENETDMAC_CHANCFG_REG, | |
| 20 | + [ENETDMAC_IR] = ENETDMAC_IR_REG, | |
| 21 | + [ENETDMAC_IRMASK] = ENETDMAC_IRMASK_REG, | |
| 22 | + [ENETDMAC_MAXBURST] = ENETDMAC_MAXBURST_REG, | |
| 23 | +}; | |
| 24 | + | |
| 25 | +static const unsigned long bcm6345_regs_enetdmac[] = { | |
| 26 | + [ENETDMAC_CHANCFG] = ENETDMA_6345_CHANCFG_REG, | |
| 27 | + [ENETDMAC_IR] = ENETDMA_6345_IR_REG, | |
| 28 | + [ENETDMAC_IRMASK] = ENETDMA_6345_IRMASK_REG, | |
| 29 | + [ENETDMAC_MAXBURST] = ENETDMA_6345_MAXBURST_REG, | |
| 30 | + [ENETDMAC_BUFALLOC] = ENETDMA_6345_BUFALLOC_REG, | |
| 31 | + [ENETDMAC_RSTART] = ENETDMA_6345_RSTART_REG, | |
| 32 | + [ENETDMAC_FC] = ENETDMA_6345_FC_REG, | |
| 33 | + [ENETDMAC_LEN] = ENETDMA_6345_LEN_REG, | |
| 34 | +}; | |
| 35 | + | |
| 36 | +const unsigned long *bcm63xx_regs_enetdmac; | |
| 37 | +EXPORT_SYMBOL(bcm63xx_regs_enetdmac); | |
| 38 | + | |
| 39 | +static __init void bcm63xx_enetdmac_regs_init(void) | |
| 40 | +{ | |
| 41 | + if (BCMCPU_IS_6345()) | |
| 42 | + bcm63xx_regs_enetdmac = bcm6345_regs_enetdmac; | |
| 43 | + else | |
| 44 | + bcm63xx_regs_enetdmac = bcm6348_regs_enetdmac; | |
| 45 | +} | |
| 46 | +#else | |
| 47 | +static __init void bcm63xx_enetdmac_regs_init(void) { } | |
| 48 | +#endif | |
| 49 | + | |
| 16 | 50 | static struct resource shared_res[] = { |
| 17 | 51 | { |
| 18 | 52 | .start = -1, /* filled at runtime */ |
| 19 | 53 | .end = -1, /* filled at runtime */ |
| 20 | 54 | .flags = IORESOURCE_MEM, |
| 21 | 55 | }, |
| 56 | + { | |
| 57 | + .start = -1, /* filled at runtime */ | |
| 58 | + .end = -1, /* filled at runtime */ | |
| 59 | + .flags = IORESOURCE_MEM, | |
| 60 | + }, | |
| 61 | + { | |
| 62 | + .start = -1, /* filled at runtime */ | |
| 63 | + .end = -1, /* filled at runtime */ | |
| 64 | + .flags = IORESOURCE_MEM, | |
| 65 | + }, | |
| 22 | 66 | }; |
| 23 | 67 | |
| 24 | 68 | static struct platform_device bcm63xx_enet_shared_device = { |
| @@ -94,6 +138,71 @@ static struct platform_device bcm63xx_enet1_device = { · 69 unmodified lines | ||
| 94 | 138 | }, |
| 95 | 139 | }; |
| 96 | 140 | |
| 141 | +static struct resource enetsw_res[] = { | |
| 142 | + { | |
| 143 | + /* start & end filled at runtime */ | |
| 144 | + .flags = IORESOURCE_MEM, | |
| 145 | + }, | |
| 146 | + { | |
| 147 | + /* start filled at runtime */ | |
| 148 | + .flags = IORESOURCE_IRQ, | |
| 149 | + }, | |
| 150 | + { | |
| 151 | + /* start filled at runtime */ | |
| 152 | + .flags = IORESOURCE_IRQ, | |
| 153 | + }, | |
| 154 | +}; | |
| 155 | + | |
| 156 | +static struct bcm63xx_enetsw_platform_data enetsw_pd; | |
| 157 | + | |
| 158 | +static struct platform_device bcm63xx_enetsw_device = { | |
| 159 | + .name = "bcm63xx_enetsw", | |
| 160 | + .num_resources = ARRAY_SIZE(enetsw_res), | |
| 161 | + .resource = enetsw_res, | |
| 162 | + .dev = { | |
| 163 | + .platform_data = &enetsw_pd, | |
| 164 | + }, | |
| 165 | +}; | |
| 166 | + | |
| 167 | +static int __init register_shared(void) | |
| 168 | +{ | |
| 169 | + int ret, chan_count; | |
| 170 | + | |
| 171 | + if (shared_device_registered) | |
| 172 | + return 0; | |
| 173 | + | |
| 174 | + bcm63xx_enetdmac_regs_init(); | |
| 175 | + | |
| 176 | + shared_res[0].start = bcm63xx_regset_address(RSET_ENETDMA); | |
| 177 | + shared_res[0].end = shared_res[0].start; | |
| 178 | + if (BCMCPU_IS_6345()) | |
| 179 | + shared_res[0].end += (RSET_6345_ENETDMA_SIZE) - 1; | |
| 180 | + else | |
| 181 | + shared_res[0].end += (RSET_ENETDMA_SIZE) - 1; | |
| 182 | + | |
| 183 | + if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) | |
| 184 | + chan_count = 32; | |
| 185 | + else if (BCMCPU_IS_6345()) | |
| 186 | + chan_count = 8; | |
| 187 | + else | |
| 188 | + chan_count = 16; | |
| 189 | + | |
| 190 | + shared_res[1].start = bcm63xx_regset_address(RSET_ENETDMAC); | |
| 191 | + shared_res[1].end = shared_res[1].start; | |
| 192 | + shared_res[1].end += RSET_ENETDMAC_SIZE(chan_count) - 1; | |
| 193 | + | |
| 194 | + shared_res[2].start = bcm63xx_regset_address(RSET_ENETDMAS); | |
| 195 | + shared_res[2].end = shared_res[2].start; | |
| 196 | + shared_res[2].end += RSET_ENETDMAS_SIZE(chan_count) - 1; | |
| 197 | + | |
| 198 | + ret = platform_device_register(&bcm63xx_enet_shared_device); | |
| 199 | + if (ret) | |
| 200 | + return ret; | |
| 201 | + shared_device_registered = 1; | |
| 202 | + | |
| 203 | + return 0; | |
| 204 | +} | |
| 205 | + | |
| 97 | 206 | int __init bcm63xx_enet_register(int unit, |
| 98 | 207 | const struct bcm63xx_enet_platform_data *pd) |
| 99 | 208 | { |
| @@ -104,22 +213,12 @@ int __init bcm63xx_enet_register(int unit, · 4 unmodified lines | ||
| 104 | 213 | if (unit > 1) |
| 105 | 214 | return -ENODEV; |
| 106 | 215 | |
| 107 | − if (unit == 1 && BCMCPU_IS_6338()) | |
| 216 | + if (unit == 1 && (BCMCPU_IS_6338() || BCMCPU_IS_6345())) | |
| 108 | 217 | return -ENODEV; |
| 109 | 218 | |
| 110 | − if (!shared_device_registered) { | |
| 111 | − shared_res[0].start = bcm63xx_regset_address(RSET_ENETDMA); | |
| 112 | − shared_res[0].end = shared_res[0].start; | |
| 113 | − if (BCMCPU_IS_6338()) | |
| 114 | − shared_res[0].end += (RSET_ENETDMA_SIZE / 2) - 1; | |
| 115 | − else | |
| 116 | − shared_res[0].end += (RSET_ENETDMA_SIZE) - 1; | |
| 117 | − | |
| 118 | − ret = platform_device_register(&bcm63xx_enet_shared_device); | |
| 119 | − if (ret) | |
| 120 | − return ret; | |
| 121 | − shared_device_registered = 1; | |
| 122 | − } | |
| 219 | + ret = register_shared(); | |
| 220 | + if (ret) | |
| 221 | + return ret; | |
| 123 | 222 | |
| 124 | 223 | if (unit == 0) { |
| 125 | 224 | enet0_res[0].start = bcm63xx_regset_address(RSET_ENET0); |
| @@ -155,8 +254,62 @@ int __init bcm63xx_enet_register(int unit, · 29 unmodified lines | ||
| 155 | 254 | dpd->phy_interrupt = bcm63xx_get_irq_number(IRQ_ENET_PHY); |
| 156 | 255 | } |
| 157 | 256 | |
| 257 | + dpd->dma_chan_en_mask = ENETDMAC_CHANCFG_EN_MASK; | |
| 258 | + dpd->dma_chan_int_mask = ENETDMAC_IR_PKTDONE_MASK; | |
| 259 | + if (BCMCPU_IS_6345()) { | |
| 260 | + dpd->dma_chan_en_mask |= ENETDMAC_CHANCFG_CHAINING_MASK; | |
| 261 | + dpd->dma_chan_en_mask |= ENETDMAC_CHANCFG_WRAP_EN_MASK; | |
| 262 | + dpd->dma_chan_en_mask |= ENETDMAC_CHANCFG_FLOWC_EN_MASK; | |
| 263 | + dpd->dma_chan_int_mask |= ENETDMA_IR_BUFDONE_MASK; | |
| 264 | + dpd->dma_chan_int_mask |= ENETDMA_IR_NOTOWNER_MASK; | |
| 265 | + dpd->dma_chan_width = ENETDMA_6345_CHAN_WIDTH; | |
| 266 | + dpd->dma_desc_shift = ENETDMA_6345_DESC_SHIFT; | |
| 267 | + } else { | |
| 268 | + dpd->dma_has_sram = true; | |
| 269 | + dpd->dma_chan_width = ENETDMA_CHAN_WIDTH; | |
| 270 | + } | |
| 271 | + | |
| 158 | 272 | ret = platform_device_register(pdev); |
| 159 | 273 | if (ret) |
| 160 | 274 | return ret; |
| 161 | 275 | return 0; |
| 162 | 276 | } |
| 277 | + | |
| 278 | +int __init | |
| 279 | +bcm63xx_enetsw_register(const struct bcm63xx_enetsw_platform_data *pd) | |
| 280 | +{ | |
| 281 | + int ret; | |
| 282 | + | |
| 283 | + if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368()) | |
| 284 | + return -ENODEV; | |
| 285 | + | |
| 286 | + ret = register_shared(); | |
| 287 | + if (ret) | |
| 288 | + return ret; | |
| 289 | + | |
| 290 | + enetsw_res[0].start = bcm63xx_regset_address(RSET_ENETSW); | |
| 291 | + enetsw_res[0].end = enetsw_res[0].start; | |
| 292 | + enetsw_res[0].end += RSET_ENETSW_SIZE - 1; | |
| 293 | + enetsw_res[1].start = bcm63xx_get_irq_number(IRQ_ENETSW_RXDMA0); | |
| 294 | + enetsw_res[2].start = bcm63xx_get_irq_number(IRQ_ENETSW_TXDMA0); | |
| 295 | + if (!enetsw_res[2].start) | |
| 296 | + enetsw_res[2].start = -1; | |
| 297 | + | |
| 298 | + memcpy(bcm63xx_enetsw_device.dev.platform_data, pd, sizeof(*pd)); | |
| 299 | + | |
| 300 | + if (BCMCPU_IS_6328()) | |
| 301 | + enetsw_pd.num_ports = ENETSW_PORTS_6328; | |
| 302 | + else if (BCMCPU_IS_6362() || BCMCPU_IS_6368()) | |
| 303 | + enetsw_pd.num_ports = ENETSW_PORTS_6368; | |
| 304 | + | |
| 305 | + enetsw_pd.dma_has_sram = true; | |
| 306 | + enetsw_pd.dma_chan_width = ENETDMA_CHAN_WIDTH; | |
| 307 | + enetsw_pd.dma_chan_en_mask = ENETDMAC_CHANCFG_EN_MASK; | |
| 308 | + enetsw_pd.dma_chan_int_mask = ENETDMAC_IR_PKTDONE_MASK; | |
| 309 | + | |
| 310 | + ret = platform_device_register(&bcm63xx_enetsw_device); | |
| 311 | + if (ret) | |
| 312 | + return ret; | |
| 313 | + | |
| 314 | + return 0; | |
| 315 | +} | |
| @@ -173,7 +173,10 @@ enum bcm63xx_regs_set { · 172 unmodified lines | ||
| 173 | 173 | #define BCM_6358_RSET_SPI_SIZE 1804 |
| 174 | 174 | #define BCM_6368_RSET_SPI_SIZE 1804 |
| 175 | 175 | #define RSET_ENET_SIZE 2048 |
| 176 | −#define RSET_ENETDMA_SIZE 2048 | |
| 176 | +#define RSET_ENETDMA_SIZE 256 | |
| 177 | +#define RSET_6345_ENETDMA_SIZE 64 | |
| 178 | +#define RSET_ENETDMAC_SIZE(chans) (16 * (chans)) | |
| 179 | +#define RSET_ENETDMAS_SIZE(chans) (16 * (chans)) | |
| 177 | 180 | #define RSET_ENETSW_SIZE 65536 |
| 178 | 181 | #define RSET_UART_SIZE 24 |
| 179 | 182 | #define RSET_UDC_SIZE 256 |
| @@ -298,7 +301,7 @@ enum bcm63xx_regs_set { · 118 unmodified lines | ||
| 298 | 301 | #define BCM_6345_USBDMA_BASE (0xfffe2800) |
| 299 | 302 | #define BCM_6345_ENET0_BASE (0xfffe1800) |
| 300 | 303 | #define BCM_6345_ENETDMA_BASE (0xfffe2800) |
| 301 | −#define BCM_6345_ENETDMAC_BASE (0xfffe2900) | |
| 304 | +#define BCM_6345_ENETDMAC_BASE (0xfffe2840) | |
| 302 | 305 | #define BCM_6345_ENETDMAS_BASE (0xfffe2a00) |
| 303 | 306 | #define BCM_6345_ENETSW_BASE (0xdeadbeef) |
| 304 | 307 | #define BCM_6345_PCMCIA_BASE (0xfffe2028) |
| @@ -4,6 +4,8 @@ · 3 unmodified lines | ||
| 4 | 4 | #include <linux/if_ether.h> |
| 5 | 5 | #include <linux/init.h> |
| 6 | 6 | |
| 7 | +#include <bcm63xx_regs.h> | |
| 8 | + | |
| 7 | 9 | /* |
| 8 | 10 | * on board ethernet platform data |
| 9 | 11 | */ |
| @@ -37,9 +39,129 @@ struct bcm63xx_enet_platform_data { · 27 unmodified lines | ||
| 37 | 39 | int phy_id, int reg), |
| 38 | 40 | void (*mii_write)(struct net_device *dev, |
| 39 | 41 | int phy_id, int reg, int val)); |
| 42 | + | |
| 43 | + /* DMA channel enable mask */ | |
| 44 | + u32 dma_chan_en_mask; | |
| 45 | + | |
| 46 | + /* DMA channel interrupt mask */ | |
| 47 | + u32 dma_chan_int_mask; | |
| 48 | + | |
| 49 | + /* DMA engine has internal SRAM */ | |
| 50 | + bool dma_has_sram; | |
| 51 | + | |
| 52 | + /* DMA channel register width */ | |
| 53 | + unsigned int dma_chan_width; | |
| 54 | + | |
| 55 | + /* DMA descriptor shift */ | |
| 56 | + unsigned int dma_desc_shift; | |
| 57 | +}; | |
| 58 | + | |
| 59 | +/* | |
| 60 | + * on board ethernet switch platform data | |
| 61 | + */ | |
| 62 | +#define ENETSW_MAX_PORT 8 | |
| 63 | +#define ENETSW_PORTS_6328 5 /* 4 FE PHY + 1 RGMII */ | |
| 64 | +#define ENETSW_PORTS_6368 6 /* 4 FE PHY + 2 RGMII */ | |
| 65 | + | |
| 66 | +#define ENETSW_RGMII_PORT0 4 | |
| 67 | + | |
| 68 | +struct bcm63xx_enetsw_port { | |
| 69 | + int used; | |
| 70 | + int phy_id; | |
| 71 | + | |
| 72 | + int bypass_link; | |
| 73 | + int force_speed; | |
| 74 | + int force_duplex_full; | |
| 75 | + | |
| 76 | + const char *name; | |
| 77 | +}; | |
| 78 | + | |
| 79 | +struct bcm63xx_enetsw_platform_data { | |
| 80 | + char mac_addr[ETH_ALEN]; | |
| 81 | + int num_ports; | |
| 82 | + struct bcm63xx_enetsw_port used_ports[ENETSW_MAX_PORT]; | |
| 83 | + | |
| 84 | + /* DMA channel enable mask */ | |
| 85 | + u32 dma_chan_en_mask; | |
| 86 | + | |
| 87 | + /* DMA channel interrupt mask */ | |
| 88 | + u32 dma_chan_int_mask; | |
| 89 | + | |
| 90 | + /* DMA channel register width */ | |
| 91 | + unsigned int dma_chan_width; | |
| 92 | + | |
| 93 | + /* DMA engine has internal SRAM */ | |
| 94 | + bool dma_has_sram; | |
| 40 | 95 | }; |
| 41 | 96 | |
| 42 | 97 | int __init bcm63xx_enet_register(int unit, |
| 43 | 98 | const struct bcm63xx_enet_platform_data *pd); |
| 44 | 99 | |
| 100 | +int bcm63xx_enetsw_register(const struct bcm63xx_enetsw_platform_data *pd); | |
| 101 | + | |
| 102 | +enum bcm63xx_regs_enetdmac { | |
| 103 | + ENETDMAC_CHANCFG, | |
| 104 | + ENETDMAC_IR, | |
| 105 | + ENETDMAC_IRMASK, | |
| 106 | + ENETDMAC_MAXBURST, | |
| 107 | + ENETDMAC_BUFALLOC, | |
| 108 | + ENETDMAC_RSTART, | |
| 109 | + ENETDMAC_FC, | |
| 110 | + ENETDMAC_LEN, | |
| 111 | +}; | |
| 112 | + | |
| 113 | +static inline unsigned long bcm63xx_enetdmacreg(enum bcm63xx_regs_enetdmac reg) | |
| 114 | +{ | |
| 115 | +#ifdef BCMCPU_RUNTIME_DETECT | |
| 116 | + extern const unsigned long *bcm63xx_regs_enetdmac; | |
| 117 | + | |
| 118 | + return bcm63xx_regs_enetdmac[reg]; | |
| 119 | +#else | |
| 120 | +#ifdef CONFIG_BCM63XX_CPU_6345 | |
| 121 | + switch (reg) { | |
| 122 | + case ENETDMAC_CHANCFG: | |
| 123 | + return ENETDMA_6345_CHANCFG_REG; | |
| 124 | + case ENETDMAC_IR: | |
| 125 | + return ENETDMA_6345_IR_REG; | |
| 126 | + case ENETDMAC_IRMASK: | |
| 127 | + return ENETDMA_6345_IRMASK_REG; | |
| 128 | + case ENETDMAC_MAXBURST: | |
| 129 | + return ENETDMA_6345_MAXBURST_REG; | |
| 130 | + case ENETDMAC_BUFALLOC: | |
| 131 | + return ENETDMA_6345_BUFALLOC_REG; | |
| 132 | + case ENETDMAC_RSTART: | |
| 133 | + return ENETDMA_6345_RSTART_REG; | |
| 134 | + case ENETDMAC_FC: | |
| 135 | + return ENETDMA_6345_FC_REG; | |
| 136 | + case ENETDMAC_LEN: | |
| 137 | + return ENETDMA_6345_LEN_REG; | |
| 138 | + } | |
| 139 | +#endif | |
| 140 | +#if defined(CONFIG_BCM63XX_CPU_6328) || \ | |
| 141 | + defined(CONFIG_BCM63XX_CPU_6338) || \ | |
| 142 | + defined(CONFIG_BCM63XX_CPU_6348) || \ | |
| 143 | + defined(CONFIG_BCM63XX_CPU_6358) || \ | |
| 144 | + defined(CONFIG_BCM63XX_CPU_6362) || \ | |
| 145 | + defined(CONFIG_BCM63XX_CPU_6368) | |
| 146 | + switch (reg) { | |
| 147 | + case ENETDMAC_CHANCFG: | |
| 148 | + return ENETDMAC_CHANCFG_REG; | |
| 149 | + case ENETDMAC_IR: | |
| 150 | + return ENETDMAC_IR_REG; | |
| 151 | + case ENETDMAC_IRMASK: | |
| 152 | + return ENETDMAC_IRMASK_REG; | |
| 153 | + case ENETDMAC_MAXBURST: | |
| 154 | + return ENETDMAC_MAXBURST_REG; | |
| 155 | + case ENETDMAC_BUFALLOC: | |
| 156 | + case ENETDMAC_RSTART: | |
| 157 | + case ENETDMAC_FC: | |
| 158 | + case ENETDMAC_LEN: | |
| 159 | + return 0; | |
| 160 | + } | |
| 161 | +#endif | |
| 162 | +#endif | |
| 163 | + return 0; | |
| 164 | +} | |
| 165 | + | |
| 166 | + | |
| 45 | 167 | #endif /* ! BCM63XX_DEV_ENET_H_ */ |
| @@ -727,6 +727,8 @@ · 726 unmodified lines | ||
| 727 | 727 | /************************************************************************* |
| 728 | 728 | * _REG relative to RSET_ENETDMA |
| 729 | 729 | *************************************************************************/ |
| 730 | +#define ENETDMA_CHAN_WIDTH 0x10 | |
| 731 | +#define ENETDMA_6345_CHAN_WIDTH 0x40 | |
| 730 | 732 | |
| 731 | 733 | /* Controller Configuration Register */ |
| 732 | 734 | #define ENETDMA_CFG_REG (0x0) |
| @@ -782,31 +784,56 @@ · 49 unmodified lines | ||
| 782 | 784 | /* State Ram Word 4 */ |
| 783 | 785 | #define ENETDMA_SRAM4_REG(x) (0x20c + (x) * 0x10) |
| 784 | 786 | |
| 787 | +/* Broadcom 6345 ENET DMA definitions */ | |
| 788 | +#define ENETDMA_6345_CHANCFG_REG (0x00) | |
| 789 | + | |
| 790 | +#define ENETDMA_6345_MAXBURST_REG (0x40) | |
| 791 | + | |
| 792 | +#define ENETDMA_6345_RSTART_REG (0x08) | |
| 793 | + | |
| 794 | +#define ENETDMA_6345_LEN_REG (0x0C) | |
| 795 | + | |
| 796 | +#define ENETDMA_6345_IR_REG (0x14) | |
| 797 | + | |
| 798 | +#define ENETDMA_6345_IRMASK_REG (0x18) | |
| 799 | + | |
| 800 | +#define ENETDMA_6345_FC_REG (0x1C) | |
| 801 | + | |
| 802 | +#define ENETDMA_6345_BUFALLOC_REG (0x20) | |
| 803 | + | |
| 804 | +/* Shift down for EOP, SOP and WRAP bits */ | |
| 805 | +#define ENETDMA_6345_DESC_SHIFT (3) | |
| 785 | 806 | |
| 786 | 807 | /************************************************************************* |
| 787 | 808 | * _REG relative to RSET_ENETDMAC |
| 788 | 809 | *************************************************************************/ |
| 789 | 810 | |
| 790 | 811 | /* Channel Configuration register */ |
| 791 | −#define ENETDMAC_CHANCFG_REG(x) ((x) * 0x10) | |
| 812 | +#define ENETDMAC_CHANCFG_REG (0x0) | |
| 792 | 813 | #define ENETDMAC_CHANCFG_EN_SHIFT 0 |
| 793 | 814 | #define ENETDMAC_CHANCFG_EN_MASK (1 << ENETDMAC_CHANCFG_EN_SHIFT) |
| 794 | 815 | #define ENETDMAC_CHANCFG_PKTHALT_SHIFT 1 |
| 795 | 816 | #define ENETDMAC_CHANCFG_PKTHALT_MASK (1 << ENETDMAC_CHANCFG_PKTHALT_SHIFT) |
| 796 | 817 | #define ENETDMAC_CHANCFG_BUFHALT_SHIFT 2 |
| 797 | 818 | #define ENETDMAC_CHANCFG_BUFHALT_MASK (1 << ENETDMAC_CHANCFG_BUFHALT_SHIFT) |
| 819 | +#define ENETDMAC_CHANCFG_CHAINING_SHIFT 2 | |
| 820 | +#define ENETDMAC_CHANCFG_CHAINING_MASK (1 << ENETDMAC_CHANCFG_CHAINING_SHIFT) | |
| 821 | +#define ENETDMAC_CHANCFG_WRAP_EN_SHIFT 3 | |
| 822 | +#define ENETDMAC_CHANCFG_WRAP_EN_MASK (1 << ENETDMAC_CHANCFG_WRAP_EN_SHIFT) | |
| 823 | +#define ENETDMAC_CHANCFG_FLOWC_EN_SHIFT 4 | |
| 824 | +#define ENETDMAC_CHANCFG_FLOWC_EN_MASK (1 << ENETDMAC_CHANCFG_FLOWC_EN_SHIFT) | |
| 798 | 825 | |
| 799 | 826 | /* Interrupt Control/Status register */ |
| 800 | −#define ENETDMAC_IR_REG(x) (0x4 + (x) * 0x10) | |
| 827 | +#define ENETDMAC_IR_REG (0x4) | |
| 801 | 828 | #define ENETDMAC_IR_BUFDONE_MASK (1 << 0) |
| 802 | 829 | #define ENETDMAC_IR_PKTDONE_MASK (1 << 1) |
| 803 | 830 | #define ENETDMAC_IR_NOTOWNER_MASK (1 << 2) |
| 804 | 831 | |
| 805 | 832 | /* Interrupt Mask register */ |
| 806 | −#define ENETDMAC_IRMASK_REG(x) (0x8 + (x) * 0x10) | |
| 833 | +#define ENETDMAC_IRMASK_REG (0x8) | |
| 807 | 834 | |
| 808 | 835 | /* Maximum Burst Length */ |
| 809 | −#define ENETDMAC_MAXBURST_REG(x) (0xc + (x) * 0x10) | |
| 836 | +#define ENETDMAC_MAXBURST_REG (0xc) | |
| 810 | 837 | |
| 811 | 838 | |
| 812 | 839 | /************************************************************************* |
| @@ -814,26 +841,76 @@ · 1 unmodified line | ||
| 814 | 841 | *************************************************************************/ |
| 815 | 842 | |
| 816 | 843 | /* Ring Start Address register */ |
| 817 | −#define ENETDMAS_RSTART_REG(x) ((x) * 0x10) | |
| 844 | +#define ENETDMAS_RSTART_REG (0x0) | |
| 818 | 845 | |
| 819 | 846 | /* State Ram Word 2 */ |
| 820 | −#define ENETDMAS_SRAM2_REG(x) (0x4 + (x) * 0x10) | |
| 847 | +#define ENETDMAS_SRAM2_REG (0x4) | |
| 821 | 848 | |
| 822 | 849 | /* State Ram Word 3 */ |
| 823 | −#define ENETDMAS_SRAM3_REG(x) (0x8 + (x) * 0x10) | |
| 850 | +#define ENETDMAS_SRAM3_REG (0x8) | |
| 824 | 851 | |
| 825 | 852 | /* State Ram Word 4 */ |
| 826 | −#define ENETDMAS_SRAM4_REG(x) (0xc + (x) * 0x10) | |
| 853 | +#define ENETDMAS_SRAM4_REG (0xc) | |
| 827 | 854 | |
| 828 | 855 | |
| 829 | 856 | /************************************************************************* |
| 830 | 857 | * _REG relative to RSET_ENETSW |
| 831 | 858 | *************************************************************************/ |
| 832 | 859 | |
| 860 | +/* Port traffic control */ | |
| 861 | +#define ENETSW_PTCTRL_REG(x) (0x0 + (x)) | |
| 862 | +#define ENETSW_PTCTRL_RXDIS_MASK (1 << 0) | |
| 863 | +#define ENETSW_PTCTRL_TXDIS_MASK (1 << 1) | |
| 864 | + | |
| 865 | +/* Switch mode register */ | |
| 866 | +#define ENETSW_SWMODE_REG (0xb) | |
| 867 | +#define ENETSW_SWMODE_FWD_EN_MASK (1 << 1) | |
| 868 | + | |
| 869 | +/* IMP override Register */ | |
| 870 | +#define ENETSW_IMPOV_REG (0xe) | |
| 871 | +#define ENETSW_IMPOV_FORCE_MASK (1 << 7) | |
| 872 | +#define ENETSW_IMPOV_TXFLOW_MASK (1 << 5) | |
| 873 | +#define ENETSW_IMPOV_RXFLOW_MASK (1 << 4) | |
| 874 | +#define ENETSW_IMPOV_1000_MASK (1 << 3) | |
| 875 | +#define ENETSW_IMPOV_100_MASK (1 << 2) | |
| 876 | +#define ENETSW_IMPOV_FDX_MASK (1 << 1) | |
| 877 | +#define ENETSW_IMPOV_LINKUP_MASK (1 << 0) | |
| 878 | + | |
| 879 | +/* Port override Register */ | |
| 880 | +#define ENETSW_PORTOV_REG(x) (0x58 + (x)) | |
| 881 | +#define ENETSW_PORTOV_ENABLE_MASK (1 << 6) | |
| 882 | +#define ENETSW_PORTOV_TXFLOW_MASK (1 << 5) | |
| 883 | +#define ENETSW_PORTOV_RXFLOW_MASK (1 << 4) | |
| 884 | +#define ENETSW_PORTOV_1000_MASK (1 << 3) | |
| 885 | +#define ENETSW_PORTOV_100_MASK (1 << 2) | |
| 886 | +#define ENETSW_PORTOV_FDX_MASK (1 << 1) | |
| 887 | +#define ENETSW_PORTOV_LINKUP_MASK (1 << 0) | |
| 888 | + | |
| 889 | +/* MDIO control register */ | |
| 890 | +#define ENETSW_MDIOC_REG (0xb0) | |
| 891 | +#define ENETSW_MDIOC_EXT_MASK (1 << 16) | |
| 892 | +#define ENETSW_MDIOC_REG_SHIFT 20 | |
| 893 | +#define ENETSW_MDIOC_PHYID_SHIFT 25 | |
| 894 | +#define ENETSW_MDIOC_RD_MASK (1 << 30) | |
| 895 | +#define ENETSW_MDIOC_WR_MASK (1 << 31) | |
| 896 | + | |
| 897 | +/* MDIO data register */ | |
| 898 | +#define ENETSW_MDIOD_REG (0xb4) | |
| 899 | + | |
| 900 | +/* Global Management Configuration Register */ | |
| 901 | +#define ENETSW_GMCR_REG (0x200) | |
| 902 | +#define ENETSW_GMCR_RST_MIB_MASK (1 << 0) | |
| 903 | + | |
| 833 | 904 | /* MIB register */ |
| 834 | 905 | #define ENETSW_MIB_REG(x) (0x2800 + (x) * 4) |
| 835 | 906 | #define ENETSW_MIB_REG_COUNT 47 |
| 836 | 907 | |
| 908 | +/* Jumbo control register port mask register */ | |
| 909 | +#define ENETSW_JMBCTL_PORT_REG (0x4004) | |
| 910 | + | |
| 911 | +/* Jumbo control mib good frame register */ | |
| 912 | +#define ENETSW_JMBCTL_MAXSIZE_REG (0x4008) | |
| 913 | + | |
| 837 | 914 | |
| 838 | 915 | /************************************************************************* |
| 839 | 916 | * _REG relative to RSET_OHCI_PRIV |
| @@ -24,6 +24,7 @@ struct board_info { · 23 unmodified lines | ||
| 24 | 24 | /* enabled feature/device */ |
| 25 | 25 | unsigned int has_enet0:1; |
| 26 | 26 | unsigned int has_enet1:1; |
| 27 | + unsigned int has_enetsw:1; | |
| 27 | 28 | unsigned int has_pci:1; |
| 28 | 29 | unsigned int has_pccard:1; |
| 29 | 30 | unsigned int has_ohci0:1; |
| @@ -36,6 +37,7 @@ struct board_info { · 6 unmodified lines | ||
| 36 | 37 | /* ethernet config */ |
| 37 | 38 | struct bcm63xx_enet_platform_data enet0; |
| 38 | 39 | struct bcm63xx_enet_platform_data enet1; |
| 40 | + struct bcm63xx_enetsw_platform_data enetsw; | |
| 39 | 41 | |
| 40 | 42 | /* USB config */ |
| 41 | 43 | struct bcm63xx_usbd_platform_data usbd; |
| @@ -92,4 +92,6 @@ · 91 unmodified lines | ||
| 92 | 92 | |
| 93 | 93 | #define SO_SELECT_ERR_QUEUE 45 |
| 94 | 94 | |
| 95 | +#define SO_LL 46 | |
| 96 | + | |
| 95 | 97 | #endif /* _UAPI_ASM_SOCKET_H */ |
| @@ -331,7 +331,8 @@ static int tx4939_netdev_event(struct notifier_block *this, · 330 unmodified lines | ||
| 331 | 331 | unsigned long event, |
| 332 | 332 | void *ptr) |
| 333 | 333 | { |
| 334 | − struct net_device *dev = ptr; | |
| 334 | + struct net_device *dev = netdev_notifier_info_to_dev(ptr); | |
| 335 | + | |
| 335 | 336 | if (event == NETDEV_CHANGE && netif_carrier_ok(dev)) { |
| 336 | 337 | __u64 bit = 0; |
| 337 | 338 | if (dev->irq == TXX9_IRQ_BASE + TX4939_IR_ETH(0)) |
| @@ -74,4 +74,6 @@ · 73 unmodified lines | ||
| 74 | 74 | |
| 75 | 75 | #define SO_SELECT_ERR_QUEUE 45 |
| 76 | 76 | |
| 77 | +#define SO_LL 46 | |
| 78 | + | |
| 77 | 79 | #endif /* _ASM_SOCKET_H */ |
| @@ -73,6 +73,8 @@ · 72 unmodified lines | ||
| 73 | 73 | |
| 74 | 74 | #define SO_SELECT_ERR_QUEUE 0x4026 |
| 75 | 75 | |
| 76 | +#define SO_LL 0x4027 | |
| 77 | + | |
| 76 | 78 | /* O_NONBLOCK clashes with the bits used for socket types. Therefore we |
| 77 | 79 | * have to define SOCK_NONBLOCK to a different value here. |
| 78 | 80 | */ |
| @@ -668,7 +668,6 @@ config SBUS · 667 unmodified lines | ||
| 668 | 668 | |
| 669 | 669 | config FSL_SOC |
| 670 | 670 | bool |
| 671 | − select HAVE_CAN_FLEXCAN if NET && CAN | |
| 672 | 671 | |
| 673 | 672 | config FSL_PCI |
| 674 | 673 | bool |
| @@ -81,4 +81,6 @@ · 80 unmodified lines | ||
| 81 | 81 | |
| 82 | 82 | #define SO_SELECT_ERR_QUEUE 45 |
| 83 | 83 | |
| 84 | +#define SO_LL 46 | |
| 85 | + | |
| 84 | 86 | #endif /* _ASM_POWERPC_SOCKET_H */ |
| @@ -650,8 +650,7 @@ void bpf_jit_compile(struct sk_filter *fp) · 649 unmodified lines | ||
| 650 | 650 | |
| 651 | 651 | proglen = cgctx.idx * 4; |
| 652 | 652 | alloclen = proglen + FUNCTION_DESCR_SIZE; |
| 653 | − image = module_alloc(max_t(unsigned int, alloclen, | |
| 654 | − sizeof(struct work_struct))); | |
| 653 | + image = module_alloc(alloclen); | |
| 655 | 654 | if (!image) |
| 656 | 655 | goto out; |
| 657 | 656 | |
| @@ -688,20 +687,8 @@ out: · 30 unmodified lines | ||
| 688 | 687 | return; |
| 689 | 688 | } |
| 690 | 689 | |
| 691 | −static void jit_free_defer(struct work_struct *arg) | |
| 692 | −{ | |
| 693 | − module_free(NULL, arg); | |
| 694 | −} | |
| 695 | − | |
| 696 | −/* run from softirq, we must use a work_struct to call | |
| 697 | − * module_free() from process context | |
| 698 | − */ | |
| 699 | 690 | void bpf_jit_free(struct sk_filter *fp) |
| 700 | 691 | { |
| 701 | − if (fp->bpf_func != sk_run_filter) { | |
| 702 | − struct work_struct *work = (struct work_struct *)fp->bpf_func; | |
| 703 | − | |
| 704 | − INIT_WORK(work, jit_free_defer); | |
| 705 | − schedule_work(work); | |
| 706 | − } | |
| 692 | + if (fp->bpf_func != sk_run_filter) | |
| 693 | + module_free(NULL, fp->bpf_func); | |
| 707 | 694 | } |
| @@ -80,4 +80,6 @@ · 79 unmodified lines | ||
| 80 | 80 | |
| 81 | 81 | #define SO_SELECT_ERR_QUEUE 45 |
| 82 | 82 | |
| 83 | +#define SO_LL 46 | |
| 84 | + | |
| 83 | 85 | #endif /* _ASM_SOCKET_H */ |
| @@ -85,7 +85,7 @@ static struct sh_eth_plat_data sh7763_eth_pdata = { · 84 unmodified lines | ||
| 85 | 85 | }; |
| 86 | 86 | |
| 87 | 87 | static struct platform_device espt_eth_device = { |
| 88 | − .name = "sh-eth", | |
| 88 | + .name = "sh7763-gether", | |
| 89 | 89 | .resource = sh_eth_resources, |
| 90 | 90 | .num_resources = ARRAY_SIZE(sh_eth_resources), |
| 91 | 91 | .dev = { |
| @@ -82,7 +82,7 @@ static struct sh_eth_plat_data sh7757_eth0_pdata = { · 81 unmodified lines | ||
| 82 | 82 | }; |
| 83 | 83 | |
| 84 | 84 | static struct platform_device sh7757_eth0_device = { |
| 85 | − .name = "sh-eth", | |
| 85 | + .name = "sh7757-ether", | |
| 86 | 86 | .resource = sh_eth0_resources, |
| 87 | 87 | .id = 0, |
| 88 | 88 | .num_resources = ARRAY_SIZE(sh_eth0_resources), |
| @@ -111,7 +111,7 @@ static struct sh_eth_plat_data sh7757_eth1_pdata = { · 22 unmodified lines | ||
| 111 | 111 | }; |
| 112 | 112 | |
| 113 | 113 | static struct platform_device sh7757_eth1_device = { |
| 114 | − .name = "sh-eth", | |
| 114 | + .name = "sh7757-ether", | |
| 115 | 115 | .resource = sh_eth1_resources, |
| 116 | 116 | .id = 1, |
| 117 | 117 | .num_resources = ARRAY_SIZE(sh_eth1_resources), |
| @@ -157,7 +157,7 @@ static struct sh_eth_plat_data sh7757_eth_giga0_pdata = { · 39 unmodified lines | ||
| 157 | 157 | }; |
| 158 | 158 | |
| 159 | 159 | static struct platform_device sh7757_eth_giga0_device = { |
| 160 | − .name = "sh-eth", | |
| 160 | + .name = "sh7757-gether", | |
| 161 | 161 | .resource = sh_eth_giga0_resources, |
| 162 | 162 | .id = 2, |
| 163 | 163 | .num_resources = ARRAY_SIZE(sh_eth_giga0_resources), |
| @@ -192,7 +192,7 @@ static struct sh_eth_plat_data sh7757_eth_giga1_pdata = { · 28 unmodified lines | ||
| 192 | 192 | }; |
| 193 | 193 | |
| 194 | 194 | static struct platform_device sh7757_eth_giga1_device = { |
| 195 | − .name = "sh-eth", | |
| 195 | + .name = "sh7757-gether", | |
| 196 | 196 | .resource = sh_eth_giga1_resources, |
| 197 | 197 | .id = 3, |
| 198 | 198 | .num_resources = ARRAY_SIZE(sh_eth_giga1_resources), |
| @@ -165,8 +165,8 @@ static struct sh_eth_plat_data sh_eth_plat = { · 164 unmodified lines | ||
| 165 | 165 | }; |
| 166 | 166 | |
| 167 | 167 | static struct platform_device sh_eth_device = { |
| 168 | − .name = "sh-eth", | |
| 169 | − .id = 0, | |
| 168 | + .name = "sh7724-ether", | |
| 169 | + .id = 0, | |
| 170 | 170 | .dev = { |
| 171 | 171 | .platform_data = &sh_eth_plat, |
| 172 | 172 | }, |
| @@ -128,8 +128,8 @@ static struct resource sh_eth0_resources[] = { · 127 unmodified lines | ||
| 128 | 128 | }; |
| 129 | 129 | |
| 130 | 130 | static struct platform_device sh_eth0_device = { |
| 131 | − .name = "sh-eth", | |
| 132 | − .id = 0, | |
| 131 | + .name = "sh771x-ether", | |
| 132 | + .id = 0, | |
| 133 | 133 | .dev = { |
| 134 | 134 | .platform_data = PHY_ID, |
| 135 | 135 | }, |
| @@ -151,8 +151,8 @@ static struct resource sh_eth1_resources[] = { · 15 unmodified lines | ||
| 151 | 151 | }; |
| 152 | 152 | |
| 153 | 153 | static struct platform_device sh_eth1_device = { |
| 154 | − .name = "sh-eth", | |
| 155 | − .id = 1, | |
| 154 | + .name = "sh771x-ether", | |
| 155 | + .id = 1, | |
| 156 | 156 | .dev = { |
| 157 | 157 | .platform_data = PHY_ID, |
| 158 | 158 | }, |
| @@ -380,8 +380,8 @@ static struct sh_eth_plat_data sh_eth_plat = { · 379 unmodified lines | ||
| 380 | 380 | }; |
| 381 | 381 | |
| 382 | 382 | static struct platform_device sh_eth_device = { |
| 383 | − .name = "sh-eth", | |
| 384 | − .id = 0, | |
| 383 | + .name = "sh7724-ether", | |
| 384 | + .id = 0, | |
| 385 | 385 | .dev = { |
| 386 | 386 | .platform_data = &sh_eth_plat, |
| 387 | 387 | }, |
| @@ -93,7 +93,7 @@ static struct sh_eth_plat_data sh7763_eth_pdata = { · 92 unmodified lines | ||
| 93 | 93 | }; |
| 94 | 94 | |
| 95 | 95 | static struct platform_device sh7763rdp_eth_device = { |
| 96 | − .name = "sh-eth", | |
| 96 | + .name = "sh7763-gether", | |
| 97 | 97 | .resource = sh_eth_resources, |
| 98 | 98 | .num_resources = ARRAY_SIZE(sh_eth_resources), |
| 99 | 99 | .dev = { |
| @@ -124,8 +124,8 @@ static struct resource eth_resources[] = { · 123 unmodified lines | ||
| 124 | 124 | }; |
| 125 | 125 | |
| 126 | 126 | static struct platform_device eth_device = { |
| 127 | − .name = "sh-eth", | |
| 128 | − .id = -1, | |
| 127 | + .name = "sh7619-ether", | |
| 128 | + .id = -1, | |
| 129 | 129 | .dev = { |
| 130 | 130 | .platform_data = (void *)1, |
| 131 | 131 | }, |
| @@ -329,7 +329,7 @@ static struct clk_lookup lookups[] = { · 328 unmodified lines | ||
| 329 | 329 | CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[HWBLK_IIC0]), |
| 330 | 330 | CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[HWBLK_IIC1]), |
| 331 | 331 | CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[HWBLK_MMC]), |
| 332 | − CLKDEV_DEV_ID("sh-eth.0", &mstp_clks[HWBLK_ETHER]), | |
| 332 | + CLKDEV_DEV_ID("sh7724-ether.0", &mstp_clks[HWBLK_ETHER]), | |
| 333 | 333 | CLKDEV_CON_ID("atapi0", &mstp_clks[HWBLK_ATAPI]), |
| 334 | 334 | CLKDEV_CON_ID("tpu0", &mstp_clks[HWBLK_TPU]), |
| 335 | 335 | CLKDEV_CON_ID("irda0", &mstp_clks[HWBLK_IRDA]), |
| @@ -238,7 +238,7 @@ static struct clk_lookup lookups[] = { · 237 unmodified lines | ||
| 238 | 238 | CLKDEV_CON_ID("adc0", &mstp_clks[MSTP313]), |
| 239 | 239 | CLKDEV_CON_ID("mtu0", &mstp_clks[MSTP312]), |
| 240 | 240 | CLKDEV_CON_ID("iebus0", &mstp_clks[MSTP304]), |
| 241 | − CLKDEV_DEV_ID("sh-eth.0", &mstp_clks[MSTP114]), | |
| 241 | + CLKDEV_DEV_ID("sh7734-gether.0", &mstp_clks[MSTP114]), | |
| 242 | 242 | CLKDEV_CON_ID("rtc0", &mstp_clks[MSTP303]), |
| 243 | 243 | CLKDEV_CON_ID("hif0", &mstp_clks[MSTP302]), |
| 244 | 244 | CLKDEV_CON_ID("stif0", &mstp_clks[MSTP301]), |
| @@ -70,6 +70,8 @@ · 69 unmodified lines | ||
| 70 | 70 | |
| 71 | 71 | #define SO_SELECT_ERR_QUEUE 0x0029 |
| 72 | 72 | |
| 73 | +#define SO_LL 0x0030 | |
| 74 | + | |
| 73 | 75 | /* Security levels - as per NRL IPv6 - don't actually do anything */ |
| 74 | 76 | #define SO_SECURITY_AUTHENTICATION 0x5001 |
| 75 | 77 | #define SO_SECURITY_ENCRYPTION_TRANSPORT 0x5002 |
| @@ -785,9 +785,7 @@ cond_branch: f_offset = addrs[i + filter[i].jf]; · 784 unmodified lines | ||
| 785 | 785 | break; |
| 786 | 786 | } |
| 787 | 787 | if (proglen == oldproglen) { |
| 788 | − image = module_alloc(max_t(unsigned int, | |
| 789 | − proglen, | |
| 790 | − sizeof(struct work_struct))); | |
| 788 | + image = module_alloc(proglen); | |
| 791 | 789 | if (!image) |
| 792 | 790 | goto out; |
| 793 | 791 | } |
| @@ -806,20 +804,8 @@ out: · 12 unmodified lines | ||
| 806 | 804 | return; |
| 807 | 805 | } |
| 808 | 806 | |
| 809 | −static void jit_free_defer(struct work_struct *arg) | |
| 810 | −{ | |
| 811 | − module_free(NULL, arg); | |
| 812 | −} | |
| 813 | − | |
| 814 | −/* run from softirq, we must use a work_struct to call | |
| 815 | − * module_free() from process context | |
| 816 | − */ | |
| 817 | 807 | void bpf_jit_free(struct sk_filter *fp) |
| 818 | 808 | { |
| 819 | − if (fp->bpf_func != sk_run_filter) { | |
| 820 | − struct work_struct *work = (struct work_struct *)fp->bpf_func; | |
| 821 | − | |
| 822 | − INIT_WORK(work, jit_free_defer); | |
| 823 | − schedule_work(work); | |
| 824 | − } | |
| 809 | + if (fp->bpf_func != sk_run_filter) | |
| 810 | + module_free(NULL, fp->bpf_func); | |
| 825 | 811 | } |
| @@ -12,6 +12,7 @@ · 11 unmodified lines | ||
| 12 | 12 | #include <linux/netdevice.h> |
| 13 | 13 | #include <linux/filter.h> |
| 14 | 14 | #include <linux/if_vlan.h> |
| 15 | +#include <linux/random.h> | |
| 15 | 16 | |
| 16 | 17 | /* |
| 17 | 18 | * Conventions : |
| @@ -144,6 +145,39 @@ static int pkt_type_offset(void) · 126 unmodified lines | ||
| 144 | 145 | return -1; |
| 145 | 146 | } |
| 146 | 147 | |
| 148 | +struct bpf_binary_header { | |
| 149 | + unsigned int pages; | |
| 150 | + /* Note : for security reasons, bpf code will follow a randomly | |
| 151 | + * sized amount of int3 instructions | |
| 152 | + */ | |
| 153 | + u8 image[]; | |
| 154 | +}; | |
| 155 | + | |
| 156 | +static struct bpf_binary_header *bpf_alloc_binary(unsigned int proglen, | |
| 157 | + u8 **image_ptr) | |
| 158 | +{ | |
| 159 | + unsigned int sz, hole; | |
| 160 | + struct bpf_binary_header *header; | |
| 161 | + | |
| 162 | + /* Most of BPF filters are really small, | |
| 163 | + * but if some of them fill a page, allow at least | |
| 164 | + * 128 extra bytes to insert a random section of int3 | |
| 165 | + */ | |
| 166 | + sz = round_up(proglen + sizeof(*header) + 128, PAGE_SIZE); | |
| 167 | + header = module_alloc(sz); | |
| 168 | + if (!header) | |
| 169 | + return NULL; | |
| 170 | + | |
| 171 | + memset(header, 0xcc, sz); /* fill whole space with int3 instructions */ | |
| 172 | + | |
| 173 | + header->pages = sz / PAGE_SIZE; | |
| 174 | + hole = sz - (proglen + sizeof(*header)); | |
| 175 | + | |
| 176 | + /* insert a random number of int3 instructions before BPF code */ | |
| 177 | + *image_ptr = &header->image[prandom_u32() % hole]; | |
| 178 | + return header; | |
| 179 | +} | |
| 180 | + | |
| 147 | 181 | void bpf_jit_compile(struct sk_filter *fp) |
| 148 | 182 | { |
| 149 | 183 | u8 temp[64]; |
| @@ -153,6 +187,7 @@ void bpf_jit_compile(struct sk_filter *fp) · 3 unmodified lines | ||
| 153 | 187 | int t_offset, f_offset; |
| 154 | 188 | u8 t_op, f_op, seen = 0, pass; |
| 155 | 189 | u8 *image = NULL; |
| 190 | + struct bpf_binary_header *header = NULL; | |
| 156 | 191 | u8 *func; |
| 157 | 192 | int pc_ret0 = -1; /* bpf index of first RET #0 instruction (if any) */ |
| 158 | 193 | unsigned int cleanup_addr; /* epilogue code offset */ |
| @@ -693,7 +728,7 @@ cond_branch: f_offset = addrs[i + filter[i].jf] - addrs[i]; · 534 unmodified lines | ||
| 693 | 728 | if (unlikely(proglen + ilen > oldproglen)) { |
| 694 | 729 | pr_err("bpb_jit_compile fatal error\n"); |
| 695 | 730 | kfree(addrs); |
| 696 | − module_free(NULL, image); | |
| 731 | + module_free(NULL, header); | |
| 697 | 732 | return; |
| 698 | 733 | } |
| 699 | 734 | memcpy(image + proglen, temp, ilen); |
| @@ -717,10 +752,8 @@ cond_branch: f_offset = addrs[i + filter[i].jf] - addrs[i]; · 17 unmodified lines | ||
| 717 | 752 | break; |
| 718 | 753 | } |
| 719 | 754 | if (proglen == oldproglen) { |
| 720 | − image = module_alloc(max_t(unsigned int, | |
| 721 | − proglen, | |
| 722 | − sizeof(struct work_struct))); | |
| 723 | − if (!image) | |
| 755 | + header = bpf_alloc_binary(proglen, &image); | |
| 756 | + if (!header) | |
| 724 | 757 | goto out; |
| 725 | 758 | } |
| 726 | 759 | oldproglen = proglen; |
| @@ -730,7 +763,8 @@ cond_branch: f_offset = addrs[i + filter[i].jf] - addrs[i]; · 3 unmodified lines | ||
| 730 | 763 | bpf_jit_dump(flen, proglen, pass, image); |
| 731 | 764 | |
| 732 | 765 | if (image) { |
| 733 | − bpf_flush_icache(image, image + proglen); | |
| 766 | + bpf_flush_icache(header, image + proglen); | |
| 767 | + set_memory_ro((unsigned long)header, header->pages); | |
| 734 | 768 | fp->bpf_func = (void *)image; |
| 735 | 769 | } |
| 736 | 770 | out: |
| @@ -738,20 +772,13 @@ out: · 1 unmodified line | ||
| 738 | 772 | return; |
| 739 | 773 | } |
| 740 | 774 | |
| 741 | −static void jit_free_defer(struct work_struct *arg) | |
| 742 | −{ | |
| 743 | − module_free(NULL, arg); | |
| 744 | −} | |
| 745 | − | |
| 746 | −/* run from softirq, we must use a work_struct to call | |
| 747 | − * module_free() from process context | |
| 748 | − */ | |
| 749 | 775 | void bpf_jit_free(struct sk_filter *fp) |
| 750 | 776 | { |
| 751 | 777 | if (fp->bpf_func != sk_run_filter) { |
| 752 | − struct work_struct *work = (struct work_struct *)fp->bpf_func; | |
| 778 | + unsigned long addr = (unsigned long)fp->bpf_func & PAGE_MASK; | |
| 779 | + struct bpf_binary_header *header = (void *)addr; | |
| 753 | 780 | |
| 754 | − INIT_WORK(work, jit_free_defer); | |
| 755 | − schedule_work(work); | |
| 781 | + set_memory_rw(addr, header->pages); | |
| 782 | + module_free(NULL, header); | |
| 756 | 783 | } |
| 757 | 784 | } |
| @@ -85,4 +85,6 @@ · 84 unmodified lines | ||
| 85 | 85 | |
| 86 | 86 | #define SO_SELECT_ERR_QUEUE 45 |
| 87 | 87 | |
| 88 | +#define SO_LL 46 | |
| 89 | + | |
| 88 | 90 | #endif /* _XTENSA_SOCKET_H */ |
| @@ -1403,7 +1403,7 @@ static void amb_free_rx_skb (struct atm_vcc * atm_vcc, struct sk_buff * skb) { · 1402 unmodified lines | ||
| 1403 | 1403 | rx.host_address = cpu_to_be32 (virt_to_bus (skb->data)); |
| 1404 | 1404 | |
| 1405 | 1405 | skb->data = skb->head; |
| 1406 | − skb->tail = skb->head; | |
| 1406 | + skb_reset_tail_pointer(skb); | |
| 1407 | 1407 | skb->len = 0; |
| 1408 | 1408 | |
| 1409 | 1409 | if (!rx_give (dev, &rx, pool)) { |
| @@ -26,6 +26,7 @@ config BCMA_HOST_PCI_POSSIBLE · 25 unmodified lines | ||
| 26 | 26 | config BCMA_HOST_PCI |
| 27 | 27 | bool "Support for BCMA on PCI-host bus" |
| 28 | 28 | depends on BCMA_HOST_PCI_POSSIBLE |
| 29 | + default y | |
| 29 | 30 | |
| 30 | 31 | config BCMA_DRIVER_PCI_HOSTMODE |
| 31 | 32 | bool "Driver for PCI core working in hostmode" |
| @@ -22,6 +22,8 @@ · 21 unmodified lines | ||
| 22 | 22 | struct bcma_bus; |
| 23 | 23 | |
| 24 | 24 | /* main.c */ |
| 25 | +bool bcma_wait_value(struct bcma_device *core, u16 reg, u32 mask, u32 value, | |
| 26 | + int timeout); | |
| 25 | 27 | int bcma_bus_register(struct bcma_bus *bus); |
| 26 | 28 | void bcma_bus_unregister(struct bcma_bus *bus); |
| 27 | 29 | int __init bcma_bus_early_register(struct bcma_bus *bus, |
| @@ -9,6 +9,25 @@ · 8 unmodified lines | ||
| 9 | 9 | #include <linux/export.h> |
| 10 | 10 | #include <linux/bcma/bcma.h> |
| 11 | 11 | |
| 12 | +static bool bcma_core_wait_value(struct bcma_device *core, u16 reg, u32 mask, | |
| 13 | + u32 value, int timeout) | |
| 14 | +{ | |
| 15 | + unsigned long deadline = jiffies + timeout; | |
| 16 | + u32 val; | |
| 17 | + | |
| 18 | + do { | |
| 19 | + val = bcma_aread32(core, reg); | |
| 20 | + if ((val & mask) == value) | |
| 21 | + return true; | |
| 22 | + cpu_relax(); | |
| 23 | + udelay(10); | |
| 24 | + } while (!time_after_eq(jiffies, deadline)); | |
| 25 | + | |
| 26 | + bcma_warn(core->bus, "Timeout waiting for register 0x%04X!\n", reg); | |
| 27 | + | |
| 28 | + return false; | |
| 29 | +} | |
| 30 | + | |
| 12 | 31 | bool bcma_core_is_enabled(struct bcma_device *core) |
| 13 | 32 | { |
| 14 | 33 | if ((bcma_aread32(core, BCMA_IOCTL) & (BCMA_IOCTL_CLK | BCMA_IOCTL_FGC)) |
| @@ -25,13 +44,15 @@ void bcma_core_disable(struct bcma_device *core, u32 flags) · 10 unmodified lines | ||
| 25 | 44 | if (bcma_aread32(core, BCMA_RESET_CTL) & BCMA_RESET_CTL_RESET) |
| 26 | 45 | return; |
| 27 | 46 | |
| 28 | − bcma_awrite32(core, BCMA_IOCTL, flags); | |
| 29 | − bcma_aread32(core, BCMA_IOCTL); | |
| 30 | − udelay(10); | |
| 47 | + bcma_core_wait_value(core, BCMA_RESET_ST, ~0, 0, 300); | |
| 31 | 48 | |
| 32 | 49 | bcma_awrite32(core, BCMA_RESET_CTL, BCMA_RESET_CTL_RESET); |
| 33 | 50 | bcma_aread32(core, BCMA_RESET_CTL); |
| 34 | 51 | udelay(1); |
| 52 | + | |
| 53 | + bcma_awrite32(core, BCMA_IOCTL, flags); | |
| 54 | + bcma_aread32(core, BCMA_IOCTL); | |
| 55 | + udelay(10); | |
| 35 | 56 | } |
| 36 | 57 | EXPORT_SYMBOL_GPL(bcma_core_disable); |
| 37 | 58 | |
| @@ -43,6 +64,7 @@ int bcma_core_enable(struct bcma_device *core, u32 flags) · 5 unmodified lines | ||
| 43 | 64 | bcma_aread32(core, BCMA_IOCTL); |
| 44 | 65 | |
| 45 | 66 | bcma_awrite32(core, BCMA_RESET_CTL, 0); |
| 67 | + bcma_aread32(core, BCMA_RESET_CTL); | |
| 46 | 68 | udelay(1); |
| 47 | 69 | |
| 48 | 70 | bcma_awrite32(core, BCMA_IOCTL, (BCMA_IOCTL_CLK | flags)); |
| @@ -140,8 +140,15 @@ void bcma_core_chipcommon_init(struct bcma_drv_cc *cc) · 139 unmodified lines | ||
| 140 | 140 | bcma_core_chipcommon_early_init(cc); |
| 141 | 141 | |
| 142 | 142 | if (cc->core->id.rev >= 20) { |
| 143 | − bcma_cc_write32(cc, BCMA_CC_GPIOPULLUP, 0); | |
| 144 | − bcma_cc_write32(cc, BCMA_CC_GPIOPULLDOWN, 0); | |
| 143 | + u32 pullup = 0, pulldown = 0; | |
| 144 | + | |
| 145 | + if (cc->core->bus->chipinfo.id == BCMA_CHIP_ID_BCM43142) { | |
| 146 | + pullup = 0x402e0; | |
| 147 | + pulldown = 0x20500; | |
| 148 | + } | |
| 149 | + | |
| 150 | + bcma_cc_write32(cc, BCMA_CC_GPIOPULLUP, pullup); | |
| 151 | + bcma_cc_write32(cc, BCMA_CC_GPIOPULLDOWN, pulldown); | |
| 145 | 152 | } |
| 146 | 153 | |
| 147 | 154 | if (cc->capabilities & BCMA_CC_CAP_PMU) |
| @@ -56,6 +56,109 @@ void bcma_chipco_regctl_maskset(struct bcma_drv_cc *cc, u32 offset, u32 mask, · 55 unmodified lines | ||
| 56 | 56 | } |
| 57 | 57 | EXPORT_SYMBOL_GPL(bcma_chipco_regctl_maskset); |
| 58 | 58 | |
| 59 | +static u32 bcma_pmu_xtalfreq(struct bcma_drv_cc *cc) | |
| 60 | +{ | |
| 61 | + u32 ilp_ctl, alp_hz; | |
| 62 | + | |
| 63 | + if (!(bcma_cc_read32(cc, BCMA_CC_PMU_STAT) & | |
| 64 | + BCMA_CC_PMU_STAT_EXT_LPO_AVAIL)) | |
| 65 | + return 0; | |
| 66 | + | |
| 67 | + bcma_cc_write32(cc, BCMA_CC_PMU_XTAL_FREQ, | |
| 68 | + BIT(BCMA_CC_PMU_XTAL_FREQ_MEASURE_SHIFT)); | |
| 69 | + usleep_range(1000, 2000); | |
| 70 | + | |
| 71 | + ilp_ctl = bcma_cc_read32(cc, BCMA_CC_PMU_XTAL_FREQ); | |
| 72 | + ilp_ctl &= BCMA_CC_PMU_XTAL_FREQ_ILPCTL_MASK; | |
| 73 | + | |
| 74 | + bcma_cc_write32(cc, BCMA_CC_PMU_XTAL_FREQ, 0); | |
| 75 | + | |
| 76 | + alp_hz = ilp_ctl * 32768 / 4; | |
| 77 | + return (alp_hz + 50000) / 100000 * 100; | |
| 78 | +} | |
| 79 | + | |
| 80 | +static void bcma_pmu2_pll_init0(struct bcma_drv_cc *cc, u32 xtalfreq) | |
| 81 | +{ | |
| 82 | + struct bcma_bus *bus = cc->core->bus; | |
| 83 | + u32 freq_tgt_target = 0, freq_tgt_current; | |
| 84 | + u32 pll0, mask; | |
| 85 | + | |
| 86 | + switch (bus->chipinfo.id) { | |
| 87 | + case BCMA_CHIP_ID_BCM43142: | |
| 88 | + /* pmu2_xtaltab0_adfll_485 */ | |
| 89 | + switch (xtalfreq) { | |
| 90 | + case 12000: | |
| 91 | + freq_tgt_target = 0x50D52; | |
| 92 | + break; | |
| 93 | + case 20000: | |
| 94 | + freq_tgt_target = 0x307FE; | |
| 95 | + break; | |
| 96 | + case 26000: | |
| 97 | + freq_tgt_target = 0x254EA; | |
| 98 | + break; | |
| 99 | + case 37400: | |
| 100 | + freq_tgt_target = 0x19EF8; | |
| 101 | + break; | |
| 102 | + case 52000: | |
| 103 | + freq_tgt_target = 0x12A75; | |
| 104 | + break; | |
| 105 | + } | |
| 106 | + break; | |
| 107 | + } | |
| 108 | + | |
| 109 | + if (!freq_tgt_target) { | |
| 110 | + bcma_err(bus, "Unknown TGT frequency for xtalfreq %d\n", | |
| 111 | + xtalfreq); | |
| 112 | + return; | |
| 113 | + } | |
| 114 | + | |
| 115 | + pll0 = bcma_chipco_pll_read(cc, BCMA_CC_PMU15_PLL_PLLCTL0); | |
| 116 | + freq_tgt_current = (pll0 & BCMA_CC_PMU15_PLL_PC0_FREQTGT_MASK) >> | |
| 117 | + BCMA_CC_PMU15_PLL_PC0_FREQTGT_SHIFT; | |
| 118 | + | |
| 119 | + if (freq_tgt_current == freq_tgt_target) { | |
| 120 | + bcma_debug(bus, "Target TGT frequency already set\n"); | |
| 121 | + return; | |
| 122 | + } | |
| 123 | + | |
| 124 | + /* Turn off PLL */ | |
| 125 | + switch (bus->chipinfo.id) { | |
| 126 | + case BCMA_CHIP_ID_BCM43142: | |
| 127 | + mask = (u32)~(BCMA_RES_4314_HT_AVAIL | | |
| 128 | + BCMA_RES_4314_MACPHY_CLK_AVAIL); | |
| 129 | + | |
| 130 | + bcma_cc_mask32(cc, BCMA_CC_PMU_MINRES_MSK, mask); | |
| 131 | + bcma_cc_mask32(cc, BCMA_CC_PMU_MAXRES_MSK, mask); | |
| 132 | + bcma_wait_value(cc->core, BCMA_CLKCTLST, | |
| 133 | + BCMA_CLKCTLST_HAVEHT, 0, 20000); | |
| 134 | + break; | |
| 135 | + } | |
| 136 | + | |
| 137 | + pll0 &= ~BCMA_CC_PMU15_PLL_PC0_FREQTGT_MASK; | |
| 138 | + pll0 |= freq_tgt_target << BCMA_CC_PMU15_PLL_PC0_FREQTGT_SHIFT; | |
| 139 | + bcma_chipco_pll_write(cc, BCMA_CC_PMU15_PLL_PLLCTL0, pll0); | |
| 140 | + | |
| 141 | + /* Flush */ | |
| 142 | + if (cc->pmu.rev >= 2) | |
| 143 | + bcma_cc_set32(cc, BCMA_CC_PMU_CTL, BCMA_CC_PMU_CTL_PLL_UPD); | |
| 144 | + | |
| 145 | + /* TODO: Do we need to update OTP? */ | |
| 146 | +} | |
| 147 | + | |
| 148 | +static void bcma_pmu_pll_init(struct bcma_drv_cc *cc) | |
| 149 | +{ | |
| 150 | + struct bcma_bus *bus = cc->core->bus; | |
| 151 | + u32 xtalfreq = bcma_pmu_xtalfreq(cc); | |
| 152 | + | |
| 153 | + switch (bus->chipinfo.id) { | |
| 154 | + case BCMA_CHIP_ID_BCM43142: | |
| 155 | + if (xtalfreq == 0) | |
| 156 | + xtalfreq = 20000; | |
| 157 | + bcma_pmu2_pll_init0(cc, xtalfreq); | |
| 158 | + break; | |
| 159 | + } | |
| 160 | +} | |
| 161 | + | |
| 59 | 162 | static void bcma_pmu_resources_init(struct bcma_drv_cc *cc) |
| 60 | 163 | { |
| 61 | 164 | struct bcma_bus *bus = cc->core->bus; |
| @@ -66,6 +169,25 @@ static void bcma_pmu_resources_init(struct bcma_drv_cc *cc) · 4 unmodified lines | ||
| 66 | 169 | min_msk = 0x200D; |
| 67 | 170 | max_msk = 0xFFFF; |
| 68 | 171 | break; |
| 172 | + case BCMA_CHIP_ID_BCM43142: | |
| 173 | + min_msk = BCMA_RES_4314_LPLDO_PU | | |
| 174 | + BCMA_RES_4314_PMU_SLEEP_DIS | | |
| 175 | + BCMA_RES_4314_PMU_BG_PU | | |
| 176 | + BCMA_RES_4314_CBUCK_LPOM_PU | | |
| 177 | + BCMA_RES_4314_CBUCK_PFM_PU | | |
| 178 | + BCMA_RES_4314_CLDO_PU | | |
| 179 | + BCMA_RES_4314_LPLDO2_LVM | | |
| 180 | + BCMA_RES_4314_WL_PMU_PU | | |
| 181 | + BCMA_RES_4314_LDO3P3_PU | | |
| 182 | + BCMA_RES_4314_OTP_PU | | |
| 183 | + BCMA_RES_4314_WL_PWRSW_PU | | |
| 184 | + BCMA_RES_4314_LQ_AVAIL | | |
| 185 | + BCMA_RES_4314_LOGIC_RET | | |
| 186 | + BCMA_RES_4314_MEM_SLEEP | | |
| 187 | + BCMA_RES_4314_MACPHY_RET | | |
| 188 | + BCMA_RES_4314_WL_CORE_READY; | |
| 189 | + max_msk = 0x3FFFFFFF; | |
| 190 | + break; | |
| 69 | 191 | default: |
| 70 | 192 | bcma_debug(bus, "PMU resource config unknown or not needed for device 0x%04X\n", |
| 71 | 193 | bus->chipinfo.id); |
| @@ -165,6 +287,7 @@ void bcma_pmu_init(struct bcma_drv_cc *cc) · 93 unmodified lines | ||
| 165 | 287 | bcma_cc_set32(cc, BCMA_CC_PMU_CTL, |
| 166 | 288 | BCMA_CC_PMU_CTL_NOILPONW); |
| 167 | 289 | |
| 290 | + bcma_pmu_pll_init(cc); | |
| 168 | 291 | bcma_pmu_resources_init(cc); |
| 169 | 292 | bcma_pmu_workarounds(cc); |
| 170 | 293 | } |
| @@ -30,7 +30,7 @@ struct bcma_sflash_tbl_e { · 29 unmodified lines | ||
| 30 | 30 | u16 numblocks; |
| 31 | 31 | }; |
| 32 | 32 | |
| 33 | −static struct bcma_sflash_tbl_e bcma_sflash_st_tbl[] = { | |
| 33 | +static const struct bcma_sflash_tbl_e bcma_sflash_st_tbl[] = { | |
| 34 | 34 | { "M25P20", 0x11, 0x10000, 4, }, |
| 35 | 35 | { "M25P40", 0x12, 0x10000, 8, }, |
| 36 | 36 | |
| @@ -41,7 +41,7 @@ static struct bcma_sflash_tbl_e bcma_sflash_st_tbl[] = { · 4 unmodified lines | ||
| 41 | 41 | { 0 }, |
| 42 | 42 | }; |
| 43 | 43 | |
| 44 | −static struct bcma_sflash_tbl_e bcma_sflash_sst_tbl[] = { | |
| 44 | +static const struct bcma_sflash_tbl_e bcma_sflash_sst_tbl[] = { | |
| 45 | 45 | { "SST25WF512", 1, 0x1000, 16, }, |
| 46 | 46 | { "SST25VF512", 0x48, 0x1000, 16, }, |
| 47 | 47 | { "SST25WF010", 2, 0x1000, 32, }, |
| @@ -59,7 +59,7 @@ static struct bcma_sflash_tbl_e bcma_sflash_sst_tbl[] = { · 11 unmodified lines | ||
| 59 | 59 | { 0 }, |
| 60 | 60 | }; |
| 61 | 61 | |
| 62 | −static struct bcma_sflash_tbl_e bcma_sflash_at_tbl[] = { | |
| 62 | +static const struct bcma_sflash_tbl_e bcma_sflash_at_tbl[] = { | |
| 63 | 63 | { "AT45DB011", 0xc, 256, 512, }, |
| 64 | 64 | { "AT45DB021", 0x14, 256, 1024, }, |
| 65 | 65 | { "AT45DB041", 0x1c, 256, 2048, }, |
| @@ -89,7 +89,7 @@ int bcma_sflash_init(struct bcma_drv_cc *cc) · 23 unmodified lines | ||
| 89 | 89 | { |
| 90 | 90 | struct bcma_bus *bus = cc->core->bus; |
| 91 | 91 | struct bcma_sflash *sflash = &cc->sflash; |
| 92 | − struct bcma_sflash_tbl_e *e; | |
| 92 | + const struct bcma_sflash_tbl_e *e; | |
| 93 | 93 | u32 id, id2; |
| 94 | 94 | |
| 95 | 95 | switch (cc->capabilities & BCMA_CC_CAP_FLASHT) { |
| @@ -275,6 +275,7 @@ static DEFINE_PCI_DEVICE_TABLE(bcma_pci_bridge_tbl) = { · 274 unmodified lines | ||
| 275 | 275 | { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4357) }, |
| 276 | 276 | { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4358) }, |
| 277 | 277 | { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4359) }, |
| 278 | + { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4365) }, | |
| 278 | 279 | { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4727) }, |
| 279 | 280 | { 0, }, |
| 280 | 281 | }; |
| @@ -93,6 +93,25 @@ struct bcma_device *bcma_find_core_unit(struct bcma_bus *bus, u16 coreid, · 92 unmodified lines | ||
| 93 | 93 | return NULL; |
| 94 | 94 | } |
| 95 | 95 | |
| 96 | +bool bcma_wait_value(struct bcma_device *core, u16 reg, u32 mask, u32 value, | |
| 97 | + int timeout) | |
| 98 | +{ | |
| 99 | + unsigned long deadline = jiffies + timeout; | |
| 100 | + u32 val; | |
| 101 | + | |
| 102 | + do { | |
| 103 | + val = bcma_read32(core, reg); | |
| 104 | + if ((val & mask) == value) | |
| 105 | + return true; | |
| 106 | + cpu_relax(); | |
| 107 | + udelay(10); | |
| 108 | + } while (!time_after_eq(jiffies, deadline)); | |
| 109 | + | |
| 110 | + bcma_warn(core->bus, "Timeout waiting for register 0x%04X!\n", reg); | |
| 111 | + | |
| 112 | + return false; | |
| 113 | +} | |
| 114 | + | |
| 96 | 115 | static void bcma_release_core_dev(struct device *dev) |
| 97 | 116 | { |
| 98 | 117 | struct bcma_device *core = container_of(dev, struct bcma_device, dev); |
| @@ -72,12 +72,12 @@ fail: · 71 unmodified lines | ||
| 72 | 72 | * R/W ops. |
| 73 | 73 | **************************************************/ |
| 74 | 74 | |
| 75 | −static void bcma_sprom_read(struct bcma_bus *bus, u16 offset, u16 *sprom) | |
| 75 | +static void bcma_sprom_read(struct bcma_bus *bus, u16 offset, u16 *sprom, | |
| 76 | + size_t words) | |
| 76 | 77 | { |
| 77 | 78 | int i; |
| 78 | − for (i = 0; i < SSB_SPROMSIZE_WORDS_R4; i++) | |
| 79 | − sprom[i] = bcma_read16(bus->drv_cc.core, | |
| 80 | − offset + (i * 2)); | |
| 79 | + for (i = 0; i < words; i++) | |
| 80 | + sprom[i] = bcma_read16(bus->drv_cc.core, offset + (i * 2)); | |
| 81 | 81 | } |
| 82 | 82 | |
| 83 | 83 | /************************************************** |
| @@ -124,29 +124,29 @@ static inline u8 bcma_crc8(u8 crc, u8 data) · 40 unmodified lines | ||
| 124 | 124 | return t[crc ^ data]; |
| 125 | 125 | } |
| 126 | 126 | |
| 127 | −static u8 bcma_sprom_crc(const u16 *sprom) | |
| 127 | +static u8 bcma_sprom_crc(const u16 *sprom, size_t words) | |
| 128 | 128 | { |
| 129 | 129 | int word; |
| 130 | 130 | u8 crc = 0xFF; |
| 131 | 131 | |
| 132 | − for (word = 0; word < SSB_SPROMSIZE_WORDS_R4 - 1; word++) { | |
| 132 | + for (word = 0; word < words - 1; word++) { | |
| 133 | 133 | crc = bcma_crc8(crc, sprom[word] & 0x00FF); |
| 134 | 134 | crc = bcma_crc8(crc, (sprom[word] & 0xFF00) >> 8); |
| 135 | 135 | } |
| 136 | − crc = bcma_crc8(crc, sprom[SSB_SPROMSIZE_WORDS_R4 - 1] & 0x00FF); | |
| 136 | + crc = bcma_crc8(crc, sprom[words - 1] & 0x00FF); | |
| 137 | 137 | crc ^= 0xFF; |
| 138 | 138 | |
| 139 | 139 | return crc; |
| 140 | 140 | } |
| 141 | 141 | |
| 142 | −static int bcma_sprom_check_crc(const u16 *sprom) | |
| 142 | +static int bcma_sprom_check_crc(const u16 *sprom, size_t words) | |
| 143 | 143 | { |
| 144 | 144 | u8 crc; |
| 145 | 145 | u8 expected_crc; |
| 146 | 146 | u16 tmp; |
| 147 | 147 | |
| 148 | − crc = bcma_sprom_crc(sprom); | |
| 149 | − tmp = sprom[SSB_SPROMSIZE_WORDS_R4 - 1] & SSB_SPROM_REVISION_CRC; | |
| 148 | + crc = bcma_sprom_crc(sprom, words); | |
| 149 | + tmp = sprom[words - 1] & SSB_SPROM_REVISION_CRC; | |
| 150 | 150 | expected_crc = tmp >> SSB_SPROM_REVISION_CRC_SHIFT; |
| 151 | 151 | if (crc != expected_crc) |
| 152 | 152 | return -EPROTO; |
| @@ -154,21 +154,25 @@ static int bcma_sprom_check_crc(const u16 *sprom) · 1 unmodified line | ||
| 154 | 154 | return 0; |
| 155 | 155 | } |
| 156 | 156 | |
| 157 | −static int bcma_sprom_valid(const u16 *sprom) | |
| 157 | +static int bcma_sprom_valid(struct bcma_bus *bus, const u16 *sprom, | |
| 158 | + size_t words) | |
| 158 | 159 | { |
| 159 | 160 | u16 revision; |
| 160 | 161 | int err; |
| 161 | 162 | |
| 162 | − err = bcma_sprom_check_crc(sprom); | |
| 163 | + err = bcma_sprom_check_crc(sprom, words); | |
| 163 | 164 | if (err) |
| 164 | 165 | return err; |
| 165 | 166 | |
| 166 | − revision = sprom[SSB_SPROMSIZE_WORDS_R4 - 1] & SSB_SPROM_REVISION_REV; | |
| 167 | − if (revision != 8 && revision != 9) { | |
| 167 | + revision = sprom[words - 1] & SSB_SPROM_REVISION_REV; | |
| 168 | + if (revision != 8 && revision != 9 && revision != 10) { | |
| 168 | 169 | pr_err("Unsupported SPROM revision: %d\n", revision); |
| 169 | 170 | return -ENOENT; |
| 170 | 171 | } |
| 171 | 172 | |
| 173 | + bus->sprom.revision = revision; | |
| 174 | + bcma_debug(bus, "Found SPROM revision %d\n", revision); | |
| 175 | + | |
| 172 | 176 | return 0; |
| 173 | 177 | } |
| 174 | 178 | |
| @@ -208,9 +212,6 @@ static void bcma_sprom_extract_r8(struct bcma_bus *bus, const u16 *sprom) · 33 unmodified lines | ||
| 208 | 212 | BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) != |
| 209 | 213 | ARRAY_SIZE(bus->sprom.core_pwr_info)); |
| 210 | 214 | |
| 211 | − bus->sprom.revision = sprom[SSB_SPROMSIZE_WORDS_R4 - 1] & | |
| 212 | − SSB_SPROM_REVISION_REV; | |
| 213 | − | |
| 214 | 215 | for (i = 0; i < 3; i++) { |
| 215 | 216 | v = sprom[SPOFF(SSB_SPROM8_IL0MAC) + i]; |
| 216 | 217 | *(((__be16 *)bus->sprom.il0mac) + i) = cpu_to_be16(v); |
| @@ -502,7 +503,7 @@ static bool bcma_sprom_onchip_available(struct bcma_bus *bus) · 285 unmodified lines | ||
| 502 | 503 | case BCMA_CHIP_ID_BCM4331: |
| 503 | 504 | present = chip_status & BCMA_CC_CHIPST_4331_OTP_PRESENT; |
| 504 | 505 | break; |
| 505 | − | |
| 506 | + case BCMA_CHIP_ID_BCM43142: | |
| 506 | 507 | case BCMA_CHIP_ID_BCM43224: |
| 507 | 508 | case BCMA_CHIP_ID_BCM43225: |
| 508 | 509 | /* for these chips OTP is always available */ |
| @@ -550,7 +551,9 @@ int bcma_sprom_get(struct bcma_bus *bus) · 41 unmodified lines | ||
| 550 | 551 | { |
| 551 | 552 | u16 offset = BCMA_CC_SPROM; |
| 552 | 553 | u16 *sprom; |
| 553 | − int err = 0; | |
| 554 | + size_t sprom_sizes[] = { SSB_SPROMSIZE_WORDS_R4, | |
| 555 | + SSB_SPROMSIZE_WORDS_R10, }; | |
| 556 | + int i, err = 0; | |
| 554 | 557 | |
| 555 | 558 | if (!bus->drv_cc.core) |
| 556 | 559 | return -EOPNOTSUPP; |
| @@ -579,32 +582,37 @@ int bcma_sprom_get(struct bcma_bus *bus) · 22 unmodified lines | ||
| 579 | 582 | } |
| 580 | 583 | } |
| 581 | 584 | |
| 582 | − sprom = kcalloc(SSB_SPROMSIZE_WORDS_R4, sizeof(u16), | |
| 583 | − GFP_KERNEL); | |
| 584 | − if (!sprom) | |
| 585 | − return -ENOMEM; | |
| 586 | − | |
| 587 | 585 | if (bus->chipinfo.id == BCMA_CHIP_ID_BCM4331 || |
| 588 | 586 | bus->chipinfo.id == BCMA_CHIP_ID_BCM43431) |
| 589 | 587 | bcma_chipco_bcm4331_ext_pa_lines_ctl(&bus->drv_cc, false); |
| 590 | 588 | |
| 591 | 589 | bcma_debug(bus, "SPROM offset 0x%x\n", offset); |
| 592 | − bcma_sprom_read(bus, offset, sprom); | |
| 590 | + for (i = 0; i < ARRAY_SIZE(sprom_sizes); i++) { | |
| 591 | + size_t words = sprom_sizes[i]; | |
| 592 | + | |
| 593 | + sprom = kcalloc(words, sizeof(u16), GFP_KERNEL); | |
| 594 | + if (!sprom) | |
| 595 | + return -ENOMEM; | |
| 596 | + | |
| 597 | + bcma_sprom_read(bus, offset, sprom, words); | |
| 598 | + err = bcma_sprom_valid(bus, sprom, words); | |
| 599 | + if (!err) | |
| 600 | + break; | |
| 601 | + | |
| 602 | + kfree(sprom); | |
| 603 | + } | |
| 593 | 604 | |
| 594 | 605 | if (bus->chipinfo.id == BCMA_CHIP_ID_BCM4331 || |
| 595 | 606 | bus->chipinfo.id == BCMA_CHIP_ID_BCM43431) |
| 596 | 607 | bcma_chipco_bcm4331_ext_pa_lines_ctl(&bus->drv_cc, true); |
| 597 | 608 | |
| 598 | − err = bcma_sprom_valid(sprom); | |
| 599 | 609 | if (err) { |
| 600 | − bcma_warn(bus, "invalid sprom read from the PCIe card, try to use fallback sprom\n"); | |
| 610 | + bcma_warn(bus, "Invalid SPROM read from the PCIe card, trying to use fallback SPROM\n"); | |
| 601 | 611 | err = bcma_fill_sprom_with_fallback(bus, &bus->sprom); |
| 602 | − goto out; | |
| 612 | + } else { | |
| 613 | + bcma_sprom_extract_r8(bus, sprom); | |
| 614 | + kfree(sprom); | |
| 603 | 615 | } |
| 604 | 616 | |
| 605 | − bcma_sprom_extract_r8(bus, sprom); | |
| 606 | − | |
| 607 | −out: | |
| 608 | − kfree(sprom); | |
| 609 | 617 | return err; |
| 610 | 618 | } |
| @@ -554,6 +554,7 @@ static int btmrvl_sdio_card_to_host(struct btmrvl_private *priv) · 553 unmodified lines | ||
| 554 | 554 | skb = bt_skb_alloc(num_blocks * blksz + BTSDIO_DMA_ALIGN, GFP_ATOMIC); |
| 555 | 555 | if (skb == NULL) { |
| 556 | 556 | BT_ERR("No free skb"); |
| 557 | + ret = -ENOMEM; | |
| 557 | 558 | goto exit; |
| 558 | 559 | } |
| 559 | 560 | |
| @@ -57,6 +57,9 @@ static struct usb_device_id btusb_table[] = { · 56 unmodified lines | ||
| 57 | 57 | /* Apple-specific (Broadcom) devices */ |
| 58 | 58 | { USB_VENDOR_AND_INTERFACE_INFO(0x05ac, 0xff, 0x01, 0x01) }, |
| 59 | 59 | |
| 60 | + /* MediaTek MT76x0E */ | |
| 61 | + { USB_DEVICE(0x0e8d, 0x763f) }, | |
| 62 | + | |
| 60 | 63 | /* Broadcom SoftSailing reporting vendor specific */ |
| 61 | 64 | { USB_DEVICE(0x0a5c, 0x21e1) }, |
| 62 | 65 | |
| @@ -1616,6 +1619,7 @@ static struct usb_driver btusb_driver = { · 1553 unmodified lines | ||
| 1616 | 1619 | #ifdef CONFIG_PM |
| 1617 | 1620 | .suspend = btusb_suspend, |
| 1618 | 1621 | .resume = btusb_resume, |
| 1622 | + .reset_resume = btusb_resume, | |
| 1619 | 1623 | #endif |
| 1620 | 1624 | .id_table = btusb_table, |
| 1621 | 1625 | .supports_autosuspend = 1, |
| @@ -3269,9 +3269,9 @@ static int cma_netdev_change(struct net_device *ndev, struct rdma_id_private *id · 3268 unmodified lines | ||
| 3269 | 3269 | } |
| 3270 | 3270 | |
| 3271 | 3271 | static int cma_netdev_callback(struct notifier_block *self, unsigned long event, |
| 3272 | − void *ctx) | |
| 3272 | + void *ptr) | |
| 3273 | 3273 | { |
| 3274 | − struct net_device *ndev = (struct net_device *)ctx; | |
| 3274 | + struct net_device *ndev = netdev_notifier_info_to_dev(ptr); | |
| 3275 | 3275 | struct cma_device *cma_dev; |
| 3276 | 3276 | struct rdma_id_private *id_priv; |
| 3277 | 3277 | int ret = NOTIFY_DONE; |
| @@ -1161,7 +1161,7 @@ static void netdev_removed(struct mlx4_ib_dev *dev, int port) · 1160 unmodified lines | ||
| 1161 | 1161 | static int mlx4_ib_netdev_event(struct notifier_block *this, unsigned long event, |
| 1162 | 1162 | void *ptr) |
| 1163 | 1163 | { |
| 1164 | − struct net_device *dev = ptr; | |
| 1164 | + struct net_device *dev = netdev_notifier_info_to_dev(ptr); | |
| 1165 | 1165 | struct mlx4_ib_dev *ibdev; |
| 1166 | 1166 | struct net_device *oldnd; |
| 1167 | 1167 | struct mlx4_ib_iboe *iboe; |
| @@ -885,7 +885,7 @@ isdn_net_log_skb(struct sk_buff *skb, isdn_net_local *lp) · 884 unmodified lines | ||
| 885 | 885 | |
| 886 | 886 | addinfo[0] = '\0'; |
| 887 | 887 | /* This check stolen from 2.1.72 dev_queue_xmit_nit() */ |
| 888 | − if (p < skb->data || skb->network_header >= skb->tail) { | |
| 888 | + if (p < skb->data || skb_network_header(skb) >= skb_tail_pointer(skb)) { | |
| 889 | 889 | /* fall back to old isdn_net_log_packet method() */ |
| 890 | 890 | char *buf = skb->data; |
| 891 | 891 | |
| @@ -25,6 +25,9 @@ menuconfig NETDEVICES · 24 unmodified lines | ||
| 25 | 25 | # that for each of the symbols. |
| 26 | 26 | if NETDEVICES |
| 27 | 27 | |
| 28 | +config MII | |
| 29 | + tristate | |
| 30 | + | |
| 28 | 31 | config NET_CORE |
| 29 | 32 | default y |
| 30 | 33 | bool "Network core driver support" |
| @@ -100,13 +103,6 @@ config NET_FC · 69 unmodified lines | ||
| 100 | 103 | adaptor below. You also should have said Y to "SCSI support" and |
| 101 | 104 | "SCSI generic support". |
| 102 | 105 | |
| 103 | −config MII | |
| 104 | − tristate "Generic Media Independent Interface device support" | |
| 105 | − help | |
| 106 | − Most ethernet controllers have MII transceiver either as an external | |
| 107 | − or internal device. It is safe to say Y or M here even if your | |
| 108 | − ethernet card lacks MII. | |
| 109 | − | |
| 110 | 106 | config IFB |
| 111 | 107 | tristate "Intermediate Functional Block support" |
| 112 | 108 | depends on NET_CLS_ACT |
| @@ -244,6 +240,16 @@ config VIRTIO_NET · 131 unmodified lines | ||
| 244 | 240 | This is the virtual network driver for virtio. It can be used with |
| 245 | 241 | lguest or QEMU based VMMs (like KVM or Xen). Say Y or M. |
| 246 | 242 | |
| 243 | +config NLMON | |
| 244 | + tristate "Virtual netlink monitoring device" | |
| 245 | + ---help--- | |
| 246 | + This option enables a monitoring net device for netlink skbs. The | |
| 247 | + purpose of this is to analyze netlink messages with packet sockets. | |
| 248 | + Thus applications like tcpdump will be able to see local netlink | |
| 249 | + messages if they tap into the netlink device, record pcaps for further | |
| 250 | + diagnostics, etc. This is mostly intended for developers or support | |
| 251 | + to debug netlink issues. If unsure, say N. | |
| 252 | + | |
| 247 | 253 | endif # NET_CORE |
| 248 | 254 | |
| 249 | 255 | config SUNGEM_PHY |
| @@ -22,6 +22,7 @@ obj-$(CONFIG_TUN) += tun.o · 21 unmodified lines | ||
| 22 | 22 | obj-$(CONFIG_VETH) += veth.o |
| 23 | 23 | obj-$(CONFIG_VIRTIO_NET) += virtio_net.o |
| 24 | 24 | obj-$(CONFIG_VXLAN) += vxlan.o |
| 25 | +obj-$(CONFIG_NLMON) += nlmon.o | |
| 25 | 26 | |
| 26 | 27 | # |
| 27 | 28 | # Networking Drivers |
| @@ -1056,7 +1056,7 @@ static int alb_set_slave_mac_addr(struct slave *slave, u8 addr[]) · 1055 unmodified lines | ||
| 1056 | 1056 | * |
| 1057 | 1057 | */ |
| 1058 | 1058 | |
| 1059 | −static void alb_swap_mac_addr(struct bonding *bond, struct slave *slave1, struct slave *slave2) | |
| 1059 | +static void alb_swap_mac_addr(struct slave *slave1, struct slave *slave2) | |
| 1060 | 1060 | { |
| 1061 | 1061 | u8 tmp_mac_addr[ETH_ALEN]; |
| 1062 | 1062 | |
| @@ -1129,6 +1129,7 @@ static void alb_change_hw_addr_on_detach(struct bonding *bond, struct slave *sla · 66 unmodified lines | ||
| 1129 | 1129 | { |
| 1130 | 1130 | int perm_curr_diff; |
| 1131 | 1131 | int perm_bond_diff; |
| 1132 | + struct slave *found_slave; | |
| 1132 | 1133 | |
| 1133 | 1134 | perm_curr_diff = !ether_addr_equal_64bits(slave->perm_hwaddr, |
| 1134 | 1135 | slave->dev->dev_addr); |
| @@ -1136,21 +1137,12 @@ static void alb_change_hw_addr_on_detach(struct bonding *bond, struct slave *sla · 1 unmodified line | ||
| 1136 | 1137 | bond->dev->dev_addr); |
| 1137 | 1138 | |
| 1138 | 1139 | if (perm_curr_diff && perm_bond_diff) { |
| 1139 | − struct slave *tmp_slave; | |
| 1140 | − int i, found = 0; | |
| 1141 | − | |
| 1142 | − bond_for_each_slave(bond, tmp_slave, i) { | |
| 1143 | − if (ether_addr_equal_64bits(slave->perm_hwaddr, | |
| 1144 | − tmp_slave->dev->dev_addr)) { | |
| 1145 | − found = 1; | |
| 1146 | − break; | |
| 1147 | − } | |
| 1148 | − } | |
| 1140 | + found_slave = bond_slave_has_mac(bond, slave->perm_hwaddr); | |
| 1149 | 1141 | |
| 1150 | − if (found) { | |
| 1142 | + if (found_slave) { | |
| 1151 | 1143 | /* locking: needs RTNL and nothing else */ |
| 1152 | − alb_swap_mac_addr(bond, slave, tmp_slave); | |
| 1153 | − alb_fasten_mac_swap(bond, slave, tmp_slave); | |
| 1144 | + alb_swap_mac_addr(slave, found_slave); | |
| 1145 | + alb_fasten_mac_swap(bond, slave, found_slave); | |
| 1154 | 1146 | } |
| 1155 | 1147 | } |
| 1156 | 1148 | } |
| @@ -1175,16 +1167,13 @@ static void alb_change_hw_addr_on_detach(struct bonding *bond, struct slave *sla · 18 unmodified lines | ||
| 1175 | 1167 | * @slave. |
| 1176 | 1168 | * |
| 1177 | 1169 | * assumption: this function is called before @slave is attached to the |
| 1178 | − * bond slave list. | |
| 1179 | − * | |
| 1180 | − * caller must hold the bond lock for write since the mac addresses are compared | |
| 1181 | − * and may be swapped. | |
| 1170 | + * bond slave list. | |
| 1182 | 1171 | */ |
| 1183 | 1172 | static int alb_handle_addr_collision_on_attach(struct bonding *bond, struct slave *slave) |
| 1184 | 1173 | { |
| 1185 | − struct slave *tmp_slave1, *tmp_slave2, *free_mac_slave; | |
| 1174 | + struct slave *tmp_slave1, *free_mac_slave = NULL; | |
| 1186 | 1175 | struct slave *has_bond_addr = bond->curr_active_slave; |
| 1187 | − int i, j, found = 0; | |
| 1176 | + int i; | |
| 1188 | 1177 | |
| 1189 | 1178 | if (bond->slave_cnt == 0) { |
| 1190 | 1179 | /* this is the first slave */ |
| @@ -1196,15 +1185,7 @@ static int alb_handle_addr_collision_on_attach(struct bonding *bond, struct slav · 5 unmodified lines | ||
| 1196 | 1185 | * slaves in the bond. |
| 1197 | 1186 | */ |
| 1198 | 1187 | if (!ether_addr_equal_64bits(slave->perm_hwaddr, bond->dev->dev_addr)) { |
| 1199 | − bond_for_each_slave(bond, tmp_slave1, i) { | |
| 1200 | − if (ether_addr_equal_64bits(tmp_slave1->dev->dev_addr, | |
| 1201 | − slave->dev->dev_addr)) { | |
| 1202 | − found = 1; | |
| 1203 | − break; | |
| 1204 | − } | |
| 1205 | − } | |
| 1206 | − | |
| 1207 | − if (!found) | |
| 1188 | + if (!bond_slave_has_mac(bond, slave->dev->dev_addr)) | |
| 1208 | 1189 | return 0; |
| 1209 | 1190 | |
| 1210 | 1191 | /* Try setting slave mac to bond address and fall-through |
| @@ -1215,19 +1196,8 @@ static int alb_handle_addr_collision_on_attach(struct bonding *bond, struct slav · 4 unmodified lines | ||
| 1215 | 1196 | /* The slave's address is equal to the address of the bond. |
| 1216 | 1197 | * Search for a spare address in the bond for this slave. |
| 1217 | 1198 | */ |
| 1218 | − free_mac_slave = NULL; | |
| 1219 | − | |
| 1220 | 1199 | bond_for_each_slave(bond, tmp_slave1, i) { |
| 1221 | − found = 0; | |
| 1222 | − bond_for_each_slave(bond, tmp_slave2, j) { | |
| 1223 | − if (ether_addr_equal_64bits(tmp_slave1->perm_hwaddr, | |
| 1224 | − tmp_slave2->dev->dev_addr)) { | |
| 1225 | − found = 1; | |
| 1226 | − break; | |
| 1227 | − } | |
| 1228 | − } | |
| 1229 | − | |
| 1230 | − if (!found) { | |
| 1200 | + if (!bond_slave_has_mac(bond, tmp_slave1->perm_hwaddr)) { | |
| 1231 | 1201 | /* no slave has tmp_slave1's perm addr |
| 1232 | 1202 | * as its curr addr |
| 1233 | 1203 | */ |
| @@ -1607,15 +1577,7 @@ int bond_alb_init_slave(struct bonding *bond, struct slave *slave) · 373 unmodified lines | ||
| 1607 | 1577 | return res; |
| 1608 | 1578 | } |
| 1609 | 1579 | |
| 1610 | − /* caller must hold the bond lock for write since the mac addresses | |
| 1611 | − * are compared and may be swapped. | |
| 1612 | − */ | |
| 1613 | − read_lock(&bond->lock); | |
| 1614 | − | |
| 1615 | 1580 | res = alb_handle_addr_collision_on_attach(bond, slave); |
| 1616 | − | |
| 1617 | − read_unlock(&bond->lock); | |
| 1618 | − | |
| 1619 | 1581 | if (res) { |
| 1620 | 1582 | return res; |
| 1621 | 1583 | } |
| @@ -1698,7 +1660,6 @@ void bond_alb_handle_active_change(struct bonding *bond, struct slave *new_slave · 76 unmodified lines | ||
| 1698 | 1660 | __acquires(&bond->curr_slave_lock) |
| 1699 | 1661 | { |
| 1700 | 1662 | struct slave *swap_slave; |
| 1701 | − int i; | |
| 1702 | 1663 | |
| 1703 | 1664 | if (bond->curr_active_slave == new_slave) { |
| 1704 | 1665 | return; |
| @@ -1720,17 +1681,8 @@ void bond_alb_handle_active_change(struct bonding *bond, struct slave *new_slave · 15 unmodified lines | ||
| 1720 | 1681 | /* set the new curr_active_slave to the bonds mac address |
| 1721 | 1682 | * i.e. swap mac addresses of old curr_active_slave and new curr_active_slave |
| 1722 | 1683 | */ |
| 1723 | − if (!swap_slave) { | |
| 1724 | − struct slave *tmp_slave; | |
| 1725 | − /* find slave that is holding the bond's mac address */ | |
| 1726 | − bond_for_each_slave(bond, tmp_slave, i) { | |
| 1727 | − if (ether_addr_equal_64bits(tmp_slave->dev->dev_addr, | |
| 1728 | − bond->dev->dev_addr)) { | |
| 1729 | − swap_slave = tmp_slave; | |
| 1730 | − break; | |
| 1731 | − } | |
| 1732 | − } | |
| 1733 | − } | |
| 1684 | + if (!swap_slave) | |
| 1685 | + swap_slave = bond_slave_has_mac(bond, bond->dev->dev_addr); | |
| 1734 | 1686 | |
| 1735 | 1687 | /* |
| 1736 | 1688 | * Arrange for swap_slave and new_slave to temporarily be |
| @@ -1750,16 +1702,12 @@ void bond_alb_handle_active_change(struct bonding *bond, struct slave *new_slave · 13 unmodified lines | ||
| 1750 | 1702 | /* curr_active_slave must be set before calling alb_swap_mac_addr */ |
| 1751 | 1703 | if (swap_slave) { |
| 1752 | 1704 | /* swap mac address */ |
| 1753 | − alb_swap_mac_addr(bond, swap_slave, new_slave); | |
| 1754 | − } else { | |
| 1755 | − /* set the new_slave to the bond mac address */ | |
| 1756 | − alb_set_slave_mac_addr(new_slave, bond->dev->dev_addr); | |
| 1757 | − } | |
| 1758 | − | |
| 1759 | − if (swap_slave) { | |
| 1705 | + alb_swap_mac_addr(swap_slave, new_slave); | |
| 1760 | 1706 | alb_fasten_mac_swap(bond, swap_slave, new_slave); |
| 1761 | 1707 | read_lock(&bond->lock); |
| 1762 | 1708 | } else { |
| 1709 | + /* set the new_slave to the bond mac address */ | |
| 1710 | + alb_set_slave_mac_addr(new_slave, bond->dev->dev_addr); | |
| 1763 | 1711 | read_lock(&bond->lock); |
| 1764 | 1712 | alb_send_learning_packets(new_slave, bond->dev->dev_addr); |
| 1765 | 1713 | } |
| @@ -1776,9 +1724,8 @@ int bond_alb_set_mac_address(struct net_device *bond_dev, void *addr) · 10 unmodified lines | ||
| 1776 | 1724 | { |
| 1777 | 1725 | struct bonding *bond = netdev_priv(bond_dev); |
| 1778 | 1726 | struct sockaddr *sa = addr; |
| 1779 | − struct slave *slave, *swap_slave; | |
| 1727 | + struct slave *swap_slave; | |
| 1780 | 1728 | int res; |
| 1781 | − int i; | |
| 1782 | 1729 | |
| 1783 | 1730 | if (!is_valid_ether_addr(sa->sa_data)) { |
| 1784 | 1731 | return -EADDRNOTAVAIL; |
| @@ -1799,18 +1746,10 @@ int bond_alb_set_mac_address(struct net_device *bond_dev, void *addr) · 14 unmodified lines | ||
| 1799 | 1746 | return 0; |
| 1800 | 1747 | } |
| 1801 | 1748 | |
| 1802 | − swap_slave = NULL; | |
| 1803 | − | |
| 1804 | − bond_for_each_slave(bond, slave, i) { | |
| 1805 | − if (ether_addr_equal_64bits(slave->dev->dev_addr, | |
| 1806 | − bond_dev->dev_addr)) { | |
| 1807 | − swap_slave = slave; | |
| 1808 | − break; | |
| 1809 | − } | |
| 1810 | − } | |
| 1749 | + swap_slave = bond_slave_has_mac(bond, bond_dev->dev_addr); | |
| 1811 | 1750 | |
| 1812 | 1751 | if (swap_slave) { |
| 1813 | − alb_swap_mac_addr(bond, swap_slave, bond->curr_active_slave); | |
| 1752 | + alb_swap_mac_addr(swap_slave, bond->curr_active_slave); | |
| 1814 | 1753 | alb_fasten_mac_swap(bond, swap_slave, bond->curr_active_slave); |
| 1815 | 1754 | } else { |
| 1816 | 1755 | alb_set_slave_mac_addr(bond->curr_active_slave, bond_dev->dev_addr); |
| @@ -104,6 +104,7 @@ static char *xmit_hash_policy; · 103 unmodified lines | ||
| 104 | 104 | static int arp_interval = BOND_LINK_ARP_INTERV; |
| 105 | 105 | static char *arp_ip_target[BOND_MAX_ARP_TARGETS]; |
| 106 | 106 | static char *arp_validate; |
| 107 | +static char *arp_all_targets; | |
| 107 | 108 | static char *fail_over_mac; |
| 108 | 109 | static int all_slaves_active = 0; |
| 109 | 110 | static struct bond_params bonding_defaults; |
| @@ -166,6 +167,8 @@ module_param(arp_validate, charp, 0); · 56 unmodified lines | ||
| 166 | 167 | MODULE_PARM_DESC(arp_validate, "validate src/dst of ARP probes; " |
| 167 | 168 | "0 for none (default), 1 for active, " |
| 168 | 169 | "2 for backup, 3 for all"); |
| 170 | +module_param(arp_all_targets, charp, 0); | |
| 171 | +MODULE_PARM_DESC(arp_all_targets, "fail on any/all arp targets timeout; 0 for any (default), 1 for all"); | |
| 169 | 172 | module_param(fail_over_mac, charp, 0); |
| 170 | 173 | MODULE_PARM_DESC(fail_over_mac, "For active-backup, do not set all slaves to " |
| 171 | 174 | "the same MAC; 0 for none (default), " |
| @@ -216,6 +219,12 @@ const struct bond_parm_tbl xmit_hashtype_tbl[] = { · 44 unmodified lines | ||
| 216 | 219 | { NULL, -1}, |
| 217 | 220 | }; |
| 218 | 221 | |
| 222 | +const struct bond_parm_tbl arp_all_targets_tbl[] = { | |
| 223 | +{ "any", BOND_ARP_TARGETS_ANY}, | |
| 224 | +{ "all", BOND_ARP_TARGETS_ALL}, | |
| 225 | +{ NULL, -1}, | |
| 226 | +}; | |
| 227 | + | |
| 219 | 228 | const struct bond_parm_tbl arp_validate_tbl[] = { |
| 220 | 229 | { "none", BOND_ARP_VALIDATE_NONE}, |
| 221 | 230 | { "active", BOND_ARP_VALIDATE_ACTIVE}, |
| @@ -706,45 +715,6 @@ static int bond_set_allmulti(struct bonding *bond, int inc) · 484 unmodified lines | ||
| 706 | 715 | return err; |
| 707 | 716 | } |
| 708 | 717 | |
| 709 | −/* | |
| 710 | − * Add a Multicast address to slaves | |
| 711 | − * according to mode | |
| 712 | − */ | |
| 713 | −static void bond_mc_add(struct bonding *bond, void *addr) | |
| 714 | −{ | |
| 715 | − if (USES_PRIMARY(bond->params.mode)) { | |
| 716 | − /* write lock already acquired */ | |
| 717 | − if (bond->curr_active_slave) | |
| 718 | − dev_mc_add(bond->curr_active_slave->dev, addr); | |
| 719 | − } else { | |
| 720 | − struct slave *slave; | |
| 721 | − int i; | |
| 722 | − | |
| 723 | − bond_for_each_slave(bond, slave, i) | |
| 724 | − dev_mc_add(slave->dev, addr); | |
| 725 | − } | |
| 726 | −} | |
| 727 | − | |
| 728 | −/* | |
| 729 | − * Remove a multicast address from slave | |
| 730 | − * according to mode | |
| 731 | − */ | |
| 732 | −static void bond_mc_del(struct bonding *bond, void *addr) | |
| 733 | −{ | |
| 734 | − if (USES_PRIMARY(bond->params.mode)) { | |
| 735 | − /* write lock already acquired */ | |
| 736 | − if (bond->curr_active_slave) | |
| 737 | − dev_mc_del(bond->curr_active_slave->dev, addr); | |
| 738 | − } else { | |
| 739 | − struct slave *slave; | |
| 740 | − int i; | |
| 741 | − bond_for_each_slave(bond, slave, i) { | |
| 742 | − dev_mc_del(slave->dev, addr); | |
| 743 | − } | |
| 744 | − } | |
| 745 | −} | |
| 746 | − | |
| 747 | − | |
| 748 | 718 | static void __bond_resend_igmp_join_requests(struct net_device *dev) |
| 749 | 719 | { |
| 750 | 720 | struct in_device *in_dev; |
| @@ -810,17 +780,15 @@ static void bond_resend_igmp_join_requests_delayed(struct work_struct *work) · 59 unmodified lines | ||
| 810 | 780 | bond_resend_igmp_join_requests(bond); |
| 811 | 781 | } |
| 812 | 782 | |
| 813 | −/* | |
| 814 | − * flush all members of flush->mc_list from device dev->mc_list | |
| 783 | +/* Flush bond's hardware addresses from slave | |
| 815 | 784 | */ |
| 816 | −static void bond_mc_list_flush(struct net_device *bond_dev, | |
| 785 | +static void bond_hw_addr_flush(struct net_device *bond_dev, | |
| 817 | 786 | struct net_device *slave_dev) |
| 818 | 787 | { |
| 819 | 788 | struct bonding *bond = netdev_priv(bond_dev); |
| 820 | − struct netdev_hw_addr *ha; | |
| 821 | 789 | |
| 822 | − netdev_for_each_mc_addr(ha, bond_dev) | |
| 823 | − dev_mc_del(slave_dev, ha->addr); | |
| 790 | + dev_uc_unsync(slave_dev, bond_dev); | |
| 791 | + dev_mc_unsync(slave_dev, bond_dev); | |
| 824 | 792 | |
| 825 | 793 | if (bond->params.mode == BOND_MODE_8023AD) { |
| 826 | 794 | /* del lacpdu mc addr from mc list */ |
| @@ -832,22 +800,14 @@ static void bond_mc_list_flush(struct net_device *bond_dev, · 5 unmodified lines | ||
| 832 | 800 | |
| 833 | 801 | /*--------------------------- Active slave change ---------------------------*/ |
| 834 | 802 | |
| 835 | −/* | |
| 836 | − * Update the mc list and multicast-related flags for the new and | |
| 837 | − * old active slaves (if any) according to the multicast mode, and | |
| 838 | − * promiscuous flags unconditionally. | |
| 803 | +/* Update the hardware address list and promisc/allmulti for the new and | |
| 804 | + * old active slaves (if any). Modes that are !USES_PRIMARY keep all | |
| 805 | + * slaves up date at all times; only the USES_PRIMARY modes need to call | |
| 806 | + * this function to swap these settings during a failover. | |
| 839 | 807 | */ |
| 840 | −static void bond_mc_swap(struct bonding *bond, struct slave *new_active, | |
| 841 | − struct slave *old_active) | |
| 808 | +static void bond_hw_addr_swap(struct bonding *bond, struct slave *new_active, | |
| 809 | + struct slave *old_active) | |
| 842 | 810 | { |
| 843 | − struct netdev_hw_addr *ha; | |
| 844 | − | |
| 845 | − if (!USES_PRIMARY(bond->params.mode)) | |
| 846 | − /* nothing to do - mc list is already up-to-date on | |
| 847 | − * all slaves | |
| 848 | − */ | |
| 849 | − return; | |
| 850 | − | |
| 851 | 811 | if (old_active) { |
| 852 | 812 | if (bond->dev->flags & IFF_PROMISC) |
| 853 | 813 | dev_set_promiscuity(old_active->dev, -1); |
| @@ -855,10 +815,7 @@ static void bond_mc_swap(struct bonding *bond, struct slave *new_active, · 1 unmodified line | ||
| 855 | 815 | if (bond->dev->flags & IFF_ALLMULTI) |
| 856 | 816 | dev_set_allmulti(old_active->dev, -1); |
| 857 | 817 | |
| 858 | − netif_addr_lock_bh(bond->dev); | |
| 859 | − netdev_for_each_mc_addr(ha, bond->dev) | |
| 860 | − dev_mc_del(old_active->dev, ha->addr); | |
| 861 | − netif_addr_unlock_bh(bond->dev); | |
| 818 | + bond_hw_addr_flush(bond->dev, old_active->dev); | |
| 862 | 819 | } |
| 863 | 820 | |
| 864 | 821 | if (new_active) { |
| @@ -870,12 +827,29 @@ static void bond_mc_swap(struct bonding *bond, struct slave *new_active, · 5 unmodified lines | ||
| 870 | 827 | dev_set_allmulti(new_active->dev, 1); |
| 871 | 828 | |
| 872 | 829 | netif_addr_lock_bh(bond->dev); |
| 873 | − netdev_for_each_mc_addr(ha, bond->dev) | |
| 874 | − dev_mc_add(new_active->dev, ha->addr); | |
| 830 | + dev_uc_sync(new_active->dev, bond->dev); | |
| 831 | + dev_mc_sync(new_active->dev, bond->dev); | |
| 875 | 832 | netif_addr_unlock_bh(bond->dev); |
| 876 | 833 | } |
| 877 | 834 | } |
| 878 | 835 | |
| 836 | +/** | |
| 837 | + * bond_set_dev_addr - clone slave's address to bond | |
| 838 | + * @bond_dev: bond net device | |
| 839 | + * @slave_dev: slave net device | |
| 840 | + * | |
| 841 | + * Should be called with RTNL held. | |
| 842 | + */ | |
| 843 | +static void bond_set_dev_addr(struct net_device *bond_dev, | |
| 844 | + struct net_device *slave_dev) | |
| 845 | +{ | |
| 846 | + pr_debug("bond_dev=%p slave_dev=%p slave_dev->addr_len=%d\n", | |
| 847 | + bond_dev, slave_dev, slave_dev->addr_len); | |
| 848 | + memcpy(bond_dev->dev_addr, slave_dev->dev_addr, slave_dev->addr_len); | |
| 849 | + bond_dev->addr_assign_type = NET_ADDR_STOLEN; | |
| 850 | + call_netdevice_notifiers(NETDEV_CHANGEADDR, bond_dev); | |
| 851 | +} | |
| 852 | + | |
| 879 | 853 | /* |
| 880 | 854 | * bond_do_fail_over_mac |
| 881 | 855 | * |
| @@ -898,11 +872,9 @@ static void bond_do_fail_over_mac(struct bonding *bond, · 16 unmodified lines | ||
| 898 | 872 | switch (bond->params.fail_over_mac) { |
| 899 | 873 | case BOND_FOM_ACTIVE: |
| 900 | 874 | if (new_active) { |
| 901 | − memcpy(bond->dev->dev_addr, new_active->dev->dev_addr, | |
| 902 | − new_active->dev->addr_len); | |
| 903 | 875 | write_unlock_bh(&bond->curr_slave_lock); |
| 904 | 876 | read_unlock(&bond->lock); |
| 905 | − call_netdevice_notifiers(NETDEV_CHANGEADDR, bond->dev); | |
| 877 | + bond_set_dev_addr(bond->dev, new_active->dev); | |
| 906 | 878 | read_lock(&bond->lock); |
| 907 | 879 | write_lock_bh(&bond->curr_slave_lock); |
| 908 | 880 | } |
| @@ -1090,7 +1062,7 @@ void bond_change_active_slave(struct bonding *bond, struct slave *new_active) · 181 unmodified lines | ||
| 1090 | 1062 | } |
| 1091 | 1063 | |
| 1092 | 1064 | if (USES_PRIMARY(bond->params.mode)) |
| 1093 | − bond_mc_swap(bond, new_active, old_active); | |
| 1065 | + bond_hw_addr_swap(bond, new_active, old_active); | |
| 1094 | 1066 | |
| 1095 | 1067 | if (bond_is_lb(bond)) { |
| 1096 | 1068 | bond_alb_handle_active_change(bond, new_active); |
| @@ -1333,17 +1305,6 @@ static void bond_netpoll_cleanup(struct net_device *bond_dev) · 236 unmodified lines | ||
| 1333 | 1305 | |
| 1334 | 1306 | /*---------------------------------- IOCTL ----------------------------------*/ |
| 1335 | 1307 | |
| 1336 | −static void bond_set_dev_addr(struct net_device *bond_dev, | |
| 1337 | − struct net_device *slave_dev) | |
| 1338 | −{ | |
| 1339 | − pr_debug("bond_dev=%p\n", bond_dev); | |
| 1340 | − pr_debug("slave_dev=%p\n", slave_dev); | |
| 1341 | − pr_debug("slave_dev->addr_len=%d\n", slave_dev->addr_len); | |
| 1342 | − memcpy(bond_dev->dev_addr, slave_dev->dev_addr, slave_dev->addr_len); | |
| 1343 | − bond_dev->addr_assign_type = NET_ADDR_SET; | |
| 1344 | − call_netdevice_notifiers(NETDEV_CHANGEADDR, bond_dev); | |
| 1345 | −} | |
| 1346 | − | |
| 1347 | 1308 | static netdev_features_t bond_fix_features(struct net_device *dev, |
| 1348 | 1309 | netdev_features_t features) |
| 1349 | 1310 | { |
| @@ -1425,8 +1386,6 @@ done: · 75 unmodified lines | ||
| 1425 | 1386 | static void bond_setup_by_slave(struct net_device *bond_dev, |
| 1426 | 1387 | struct net_device *slave_dev) |
| 1427 | 1388 | { |
| 1428 | − struct bonding *bond = netdev_priv(bond_dev); | |
| 1429 | − | |
| 1430 | 1389 | bond_dev->header_ops = slave_dev->header_ops; |
| 1431 | 1390 | |
| 1432 | 1391 | bond_dev->type = slave_dev->type; |
| @@ -1435,7 +1394,6 @@ static void bond_setup_by_slave(struct net_device *bond_dev, · 2 unmodified lines | ||
| 1435 | 1394 | |
| 1436 | 1395 | memcpy(bond_dev->broadcast, slave_dev->broadcast, |
| 1437 | 1396 | slave_dev->addr_len); |
| 1438 | − bond->setup_by_slave = 1; | |
| 1439 | 1397 | } |
| 1440 | 1398 | |
| 1441 | 1399 | /* On bonding slaves other than the currently active slave, suppress |
| @@ -1533,10 +1491,9 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev) · 91 unmodified lines | ||
| 1533 | 1491 | struct bonding *bond = netdev_priv(bond_dev); |
| 1534 | 1492 | const struct net_device_ops *slave_ops = slave_dev->netdev_ops; |
| 1535 | 1493 | struct slave *new_slave = NULL; |
| 1536 | − struct netdev_hw_addr *ha; | |
| 1537 | 1494 | struct sockaddr addr; |
| 1538 | 1495 | int link_reporting; |
| 1539 | − int res = 0; | |
| 1496 | + int res = 0, i; | |
| 1540 | 1497 | |
| 1541 | 1498 | if (!bond->params.use_carrier && |
| 1542 | 1499 | slave_dev->ethtool_ops->get_link == NULL && |
| @@ -1643,7 +1600,7 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev) · 100 unmodified lines | ||
| 1643 | 1600 | |
| 1644 | 1601 | /* If this is the first slave, then we need to set the master's hardware |
| 1645 | 1602 | * address to be the same as the slave's. */ |
| 1646 | − if (bond->slave_cnt == 0 && bond->dev_addr_from_first) | |
| 1603 | + if (!bond->slave_cnt && bond->dev->addr_assign_type == NET_ADDR_RANDOM) | |
| 1647 | 1604 | bond_set_dev_addr(bond->dev, slave_dev); |
| 1648 | 1605 | |
| 1649 | 1606 | new_slave = kzalloc(sizeof(struct slave), GFP_KERNEL); |
| @@ -1713,10 +1670,8 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev) · 63 unmodified lines | ||
| 1713 | 1670 | goto err_close; |
| 1714 | 1671 | } |
| 1715 | 1672 | |
| 1716 | − /* If the mode USES_PRIMARY, then the new slave gets the | |
| 1717 | − * master's promisc (and mc) settings only if it becomes the | |
| 1718 | − * curr_active_slave, and that is taken care of later when calling | |
| 1719 | − * bond_change_active() | |
| 1673 | + /* If the mode USES_PRIMARY, then the following is handled by | |
| 1674 | + * bond_change_active_slave(). | |
| 1720 | 1675 | */ |
| 1721 | 1676 | if (!USES_PRIMARY(bond->params.mode)) { |
| 1722 | 1677 | /* set promiscuity level to new slave */ |
| @@ -1734,9 +1689,10 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev) · 11 unmodified lines | ||
| 1734 | 1689 | } |
| 1735 | 1690 | |
| 1736 | 1691 | netif_addr_lock_bh(bond_dev); |
| 1737 | − /* upload master's mc_list to new slave */ | |
| 1738 | − netdev_for_each_mc_addr(ha, bond_dev) | |
| 1739 | − dev_mc_add(slave_dev, ha->addr); | |
| 1692 | + | |
| 1693 | + dev_mc_sync_multiple(slave_dev, bond_dev); | |
| 1694 | + dev_uc_sync_multiple(slave_dev, bond_dev); | |
| 1695 | + | |
| 1740 | 1696 | netif_addr_unlock_bh(bond_dev); |
| 1741 | 1697 | } |
| 1742 | 1698 | |
| @@ -1766,6 +1722,8 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev) · 23 unmodified lines | ||
| 1766 | 1722 | |
| 1767 | 1723 | new_slave->last_arp_rx = jiffies - |
| 1768 | 1724 | (msecs_to_jiffies(bond->params.arp_interval) + 1); |
| 1725 | + for (i = 0; i < BOND_MAX_ARP_TARGETS; i++) | |
| 1726 | + new_slave->target_last_arp_rx[i] = new_slave->last_arp_rx; | |
| 1769 | 1727 | |
| 1770 | 1728 | if (bond->params.miimon && !bond->params.use_carrier) { |
| 1771 | 1729 | link_reporting = bond_check_dev_link(bond, slave_dev, 1); |
| @@ -1915,11 +1873,9 @@ err_dest_symlinks: · 143 unmodified lines | ||
| 1915 | 1873 | bond_destroy_slave_symlinks(bond_dev, slave_dev); |
| 1916 | 1874 | |
| 1917 | 1875 | err_detach: |
| 1918 | − if (!USES_PRIMARY(bond->params.mode)) { | |
| 1919 | − netif_addr_lock_bh(bond_dev); | |
| 1920 | − bond_mc_list_flush(bond_dev, slave_dev); | |
| 1921 | − netif_addr_unlock_bh(bond_dev); | |
| 1922 | − } | |
| 1876 | + if (!USES_PRIMARY(bond->params.mode)) | |
| 1877 | + bond_hw_addr_flush(bond_dev, slave_dev); | |
| 1878 | + | |
| 1923 | 1879 | bond_del_vlans_from_slave(bond, slave_dev); |
| 1924 | 1880 | write_lock_bh(&bond->lock); |
| 1925 | 1881 | bond_detach_slave(bond, new_slave); |
| @@ -2089,7 +2045,6 @@ static int __bond_release_one(struct net_device *bond_dev, · 163 unmodified lines | ||
| 2089 | 2045 | if (bond->slave_cnt == 0) { |
| 2090 | 2046 | bond_set_carrier(bond); |
| 2091 | 2047 | eth_hw_addr_random(bond_dev); |
| 2092 | − bond->dev_addr_from_first = true; | |
| 2093 | 2048 | |
| 2094 | 2049 | if (bond_vlan_used(bond)) { |
| 2095 | 2050 | pr_warning("%s: Warning: clearing HW address of %s while it still has VLANs.\n", |
| @@ -2118,9 +2073,8 @@ static int __bond_release_one(struct net_device *bond_dev, · 22 unmodified lines | ||
| 2118 | 2073 | |
| 2119 | 2074 | bond_del_vlans_from_slave(bond, slave_dev); |
| 2120 | 2075 | |
| 2121 | − /* If the mode USES_PRIMARY, then we should only remove its | |
| 2122 | − * promisc and mc settings if it was the curr_active_slave, but that was | |
| 2123 | − * already taken care of above when we detached the slave | |
| 2076 | + /* If the mode USES_PRIMARY, then this cases was handled above by | |
| 2077 | + * bond_change_active_slave(..., NULL) | |
| 2124 | 2078 | */ |
| 2125 | 2079 | if (!USES_PRIMARY(bond->params.mode)) { |
| 2126 | 2080 | /* unset promiscuity level from slave */ |
| @@ -2131,10 +2085,7 @@ static int __bond_release_one(struct net_device *bond_dev, · 4 unmodified lines | ||
| 2131 | 2085 | if (bond_dev->flags & IFF_ALLMULTI) |
| 2132 | 2086 | dev_set_allmulti(slave_dev, -1); |
| 2133 | 2087 | |
| 2134 | − /* flush master's mc_list from slave */ | |
| 2135 | − netif_addr_lock_bh(bond_dev); | |
| 2136 | − bond_mc_list_flush(bond_dev, slave_dev); | |
| 2137 | − netif_addr_unlock_bh(bond_dev); | |
| 2088 | + bond_hw_addr_flush(bond_dev, slave_dev); | |
| 2138 | 2089 | } |
| 2139 | 2090 | |
| 2140 | 2091 | bond_upper_dev_unlink(bond_dev, slave_dev); |
| @@ -2672,18 +2623,19 @@ static void bond_arp_send_all(struct bonding *bond, struct slave *slave) · 531 unmodified lines | ||
| 2672 | 2623 | static void bond_validate_arp(struct bonding *bond, struct slave *slave, __be32 sip, __be32 tip) |
| 2673 | 2624 | { |
| 2674 | 2625 | int i; |
| 2675 | − __be32 *targets = bond->params.arp_targets; | |
| 2676 | 2626 | |
| 2677 | − for (i = 0; (i < BOND_MAX_ARP_TARGETS) && targets[i]; i++) { | |
| 2678 | − pr_debug("bva: sip %pI4 tip %pI4 t[%d] %pI4 bhti(tip) %d\n", | |
| 2679 | − &sip, &tip, i, &targets[i], | |
| 2680 | − bond_has_this_ip(bond, tip)); | |
| 2681 | − if (sip == targets[i]) { | |
| 2682 | − if (bond_has_this_ip(bond, tip)) | |
| 2683 | − slave->last_arp_rx = jiffies; | |
| 2684 | − return; | |
| 2685 | − } | |
| 2627 | + if (!sip || !bond_has_this_ip(bond, tip)) { | |
| 2628 | + pr_debug("bva: sip %pI4 tip %pI4 not found\n", &sip, &tip); | |
| 2629 | + return; | |
| 2630 | + } | |
| 2631 | + | |
| 2632 | + i = bond_get_targets_ip(bond->params.arp_targets, sip); | |
| 2633 | + if (i == -1) { | |
| 2634 | + pr_debug("bva: sip %pI4 not found in targets\n", &sip); | |
| 2635 | + return; | |
| 2686 | 2636 | } |
| 2637 | + slave->last_arp_rx = jiffies; | |
| 2638 | + slave->target_last_arp_rx[i] = jiffies; | |
| 2687 | 2639 | } |
| 2688 | 2640 | |
| 2689 | 2641 | static int bond_arp_rcv(const struct sk_buff *skb, struct bonding *bond, |
| @@ -2698,6 +2650,10 @@ static int bond_arp_rcv(const struct sk_buff *skb, struct bonding *bond, · 8 unmodified lines | ||
| 2698 | 2650 | return RX_HANDLER_ANOTHER; |
| 2699 | 2651 | |
| 2700 | 2652 | read_lock(&bond->lock); |
| 2653 | + | |
| 2654 | + if (!slave_do_arp_validate(bond, slave)) | |
| 2655 | + goto out_unlock; | |
| 2656 | + | |
| 2701 | 2657 | alen = arp_hdr_len(bond->dev); |
| 2702 | 2658 | |
| 2703 | 2659 | pr_debug("bond_arp_rcv: bond %s skb->dev %s\n", |
| @@ -2737,10 +2693,17 @@ static int bond_arp_rcv(const struct sk_buff *skb, struct bonding *bond, · 33 unmodified lines | ||
| 2737 | 2693 | * configuration, the ARP probe will (hopefully) travel from |
| 2738 | 2694 | * the active, through one switch, the router, then the other |
| 2739 | 2695 | * switch before reaching the backup. |
| 2696 | + * | |
| 2697 | + * We 'trust' the arp requests if there is an active slave and | |
| 2698 | + * it received valid arp reply(s) after it became active. This | |
| 2699 | + * is done to avoid endless looping when we can't reach the | |
| 2700 | + * arp_ip_target and fool ourselves with our own arp requests. | |
| 2740 | 2701 | */ |
| 2741 | 2702 | if (bond_is_active_slave(slave)) |
| 2742 | 2703 | bond_validate_arp(bond, slave, sip, tip); |
| 2743 | − else | |
| 2704 | + else if (bond->curr_active_slave && | |
| 2705 | + time_after(slave_last_rx(bond, bond->curr_active_slave), | |
| 2706 | + bond->curr_active_slave->jiffies)) | |
| 2744 | 2707 | bond_validate_arp(bond, slave, tip, sip); |
| 2745 | 2708 | |
| 2746 | 2709 | out_unlock: |
| @@ -3225,7 +3188,7 @@ static int bond_slave_netdev_event(unsigned long event, · 478 unmodified lines | ||
| 3225 | 3188 | |
| 3226 | 3189 | switch (event) { |
| 3227 | 3190 | case NETDEV_UNREGISTER: |
| 3228 | − if (bond->setup_by_slave) | |
| 3191 | + if (bond_dev->type != ARPHRD_ETHER) | |
| 3229 | 3192 | bond_release_and_destroy(bond_dev, slave_dev); |
| 3230 | 3193 | else |
| 3231 | 3194 | bond_release(bond_dev, slave_dev); |
| @@ -3289,7 +3252,7 @@ static int bond_slave_netdev_event(unsigned long event, · 57 unmodified lines | ||
| 3289 | 3252 | static int bond_netdev_event(struct notifier_block *this, |
| 3290 | 3253 | unsigned long event, void *ptr) |
| 3291 | 3254 | { |
| 3292 | − struct net_device *event_dev = (struct net_device *)ptr; | |
| 3255 | + struct net_device *event_dev = netdev_notifier_info_to_dev(ptr); | |
| 3293 | 3256 | |
| 3294 | 3257 | pr_debug("event_dev: %s, event: %lx\n", |
| 3295 | 3258 | event_dev ? event_dev->name : "None", |
| @@ -3672,19 +3635,6 @@ static int bond_do_ioctl(struct net_device *bond_dev, struct ifreq *ifr, int cmd · 376 unmodified lines | ||
| 3672 | 3635 | return res; |
| 3673 | 3636 | } |
| 3674 | 3637 | |
| 3675 | −static bool bond_addr_in_mc_list(unsigned char *addr, | |
| 3676 | − struct netdev_hw_addr_list *list, | |
| 3677 | − int addrlen) | |
| 3678 | −{ | |
| 3679 | − struct netdev_hw_addr *ha; | |
| 3680 | − | |
| 3681 | − netdev_hw_addr_list_for_each(ha, list) | |
| 3682 | − if (!memcmp(ha->addr, addr, addrlen)) | |
| 3683 | − return true; | |
| 3684 | − | |
| 3685 | − return false; | |
| 3686 | −} | |
| 3687 | − | |
| 3688 | 3638 | static void bond_change_rx_flags(struct net_device *bond_dev, int change) |
| 3689 | 3639 | { |
| 3690 | 3640 | struct bonding *bond = netdev_priv(bond_dev); |
| @@ -3698,35 +3648,29 @@ static void bond_change_rx_flags(struct net_device *bond_dev, int change) · 7 unmodified lines | ||
| 3698 | 3648 | bond_dev->flags & IFF_ALLMULTI ? 1 : -1); |
| 3699 | 3649 | } |
| 3700 | 3650 | |
| 3701 | −static void bond_set_multicast_list(struct net_device *bond_dev) | |
| 3651 | +static void bond_set_rx_mode(struct net_device *bond_dev) | |
| 3702 | 3652 | { |
| 3703 | 3653 | struct bonding *bond = netdev_priv(bond_dev); |
| 3704 | − struct netdev_hw_addr *ha; | |
| 3705 | − bool found; | |
| 3654 | + struct slave *slave; | |
| 3655 | + int i; | |
| 3706 | 3656 | |
| 3707 | 3657 | read_lock(&bond->lock); |
| 3708 | 3658 | |
| 3709 | − /* looking for addresses to add to slaves' mc list */ | |
| 3710 | − netdev_for_each_mc_addr(ha, bond_dev) { | |
| 3711 | − found = bond_addr_in_mc_list(ha->addr, &bond->mc_list, | |
| 3712 | − bond_dev->addr_len); | |
| 3713 | − if (!found) | |
| 3714 | − bond_mc_add(bond, ha->addr); | |
| 3715 | − } | |
| 3716 | − | |
| 3717 | − /* looking for addresses to delete from slaves' list */ | |
| 3718 | − netdev_hw_addr_list_for_each(ha, &bond->mc_list) { | |
| 3719 | − found = bond_addr_in_mc_list(ha->addr, &bond_dev->mc, | |
| 3720 | − bond_dev->addr_len); | |
| 3721 | − if (!found) | |
| 3722 | − bond_mc_del(bond, ha->addr); | |
| 3659 | + if (USES_PRIMARY(bond->params.mode)) { | |
| 3660 | + read_lock(&bond->curr_slave_lock); | |
| 3661 | + slave = bond->curr_active_slave; | |
| 3662 | + if (slave) { | |
| 3663 | + dev_uc_sync(slave->dev, bond_dev); | |
| 3664 | + dev_mc_sync(slave->dev, bond_dev); | |
| 3665 | + } | |
| 3666 | + read_unlock(&bond->curr_slave_lock); | |
| 3667 | + } else { | |
| 3668 | + bond_for_each_slave(bond, slave, i) { | |
| 3669 | + dev_uc_sync_multiple(slave->dev, bond_dev); | |
| 3670 | + dev_mc_sync_multiple(slave->dev, bond_dev); | |
| 3671 | + } | |
| 3723 | 3672 | } |
| 3724 | 3673 | |
| 3725 | − /* save master's multicast list */ | |
| 3726 | − __hw_addr_flush(&bond->mc_list); | |
| 3727 | − __hw_addr_add_multiple(&bond->mc_list, &bond_dev->mc, | |
| 3728 | − bond_dev->addr_len, NETDEV_HW_ADDR_T_MULTICAST); | |
| 3729 | − | |
| 3730 | 3674 | read_unlock(&bond->lock); |
| 3731 | 3675 | } |
| 3732 | 3676 | |
| @@ -3871,11 +3815,10 @@ static int bond_set_mac_address(struct net_device *bond_dev, void *addr) · 138 unmodified lines | ||
| 3871 | 3815 | pr_debug("bond=%p, name=%s\n", |
| 3872 | 3816 | bond, bond_dev ? bond_dev->name : "None"); |
| 3873 | 3817 | |
| 3874 | − /* | |
| 3875 | − * If fail_over_mac is set to active, do nothing and return | |
| 3876 | − * success. Returning an error causes ifenslave to fail. | |
| 3818 | + /* If fail_over_mac is enabled, do nothing and return success. | |
| 3819 | + * Returning an error causes ifenslave to fail. | |
| 3877 | 3820 | */ |
| 3878 | − if (bond->params.fail_over_mac == BOND_FOM_ACTIVE) | |
| 3821 | + if (bond->params.fail_over_mac) | |
| 3879 | 3822 | return 0; |
| 3880 | 3823 | |
| 3881 | 3824 | if (!is_valid_ether_addr(sa->sa_data)) |
| @@ -4333,7 +4276,7 @@ static const struct net_device_ops bond_netdev_ops = { · 451 unmodified lines | ||
| 4333 | 4276 | .ndo_get_stats64 = bond_get_stats, |
| 4334 | 4277 | .ndo_do_ioctl = bond_do_ioctl, |
| 4335 | 4278 | .ndo_change_rx_flags = bond_change_rx_flags, |
| 4336 | − .ndo_set_rx_mode = bond_set_multicast_list, | |
| 4279 | + .ndo_set_rx_mode = bond_set_rx_mode, | |
| 4337 | 4280 | .ndo_change_mtu = bond_change_mtu, |
| 4338 | 4281 | .ndo_set_mac_address = bond_set_mac_address, |
| 4339 | 4282 | .ndo_neigh_setup = bond_neigh_setup, |
| @@ -4438,8 +4381,6 @@ static void bond_uninit(struct net_device *bond_dev) · 98 unmodified lines | ||
| 4438 | 4381 | |
| 4439 | 4382 | bond_debug_unregister(bond); |
| 4440 | 4383 | |
| 4441 | − __hw_addr_flush(&bond->mc_list); | |
| 4442 | − | |
| 4443 | 4384 | list_for_each_entry_safe(vlan, tmp, &bond->vlan_list, vlan_list) { |
| 4444 | 4385 | list_del(&vlan->vlan_list); |
| 4445 | 4386 | kfree(vlan); |
| @@ -4484,6 +4425,7 @@ int bond_parse_parm(const char *buf, const struct bond_parm_tbl *tbl) · 38 unmodified lines | ||
| 4484 | 4425 | static int bond_check_params(struct bond_params *params) |
| 4485 | 4426 | { |
| 4486 | 4427 | int arp_validate_value, fail_over_mac_value, primary_reselect_value, i; |
| 4428 | + int arp_all_targets_value; | |
| 4487 | 4429 | |
| 4488 | 4430 | /* |
| 4489 | 4431 | * Convert string parameters. |
| @@ -4674,7 +4616,11 @@ static int bond_check_params(struct bond_params *params) · 184 unmodified lines | ||
| 4674 | 4616 | arp_ip_target[i]); |
| 4675 | 4617 | arp_interval = 0; |
| 4676 | 4618 | } else { |
| 4677 | − arp_target[arp_ip_count++] = ip; | |
| 4619 | + if (bond_get_targets_ip(arp_target, ip) == -1) | |
| 4620 | + arp_target[arp_ip_count++] = ip; | |
| 4621 | + else | |
| 4622 | + pr_warning("Warning: duplicate address %pI4 in arp_ip_target, skipping\n", | |
| 4623 | + &ip); | |
| 4678 | 4624 | } |
| 4679 | 4625 | } |
| 4680 | 4626 | |
| @@ -4705,6 +4651,18 @@ static int bond_check_params(struct bond_params *params) · 24 unmodified lines | ||
| 4705 | 4651 | } else |
| 4706 | 4652 | arp_validate_value = 0; |
| 4707 | 4653 | |
| 4654 | + arp_all_targets_value = 0; | |
| 4655 | + if (arp_all_targets) { | |
| 4656 | + arp_all_targets_value = bond_parse_parm(arp_all_targets, | |
| 4657 | + arp_all_targets_tbl); | |
| 4658 | + | |
| 4659 | + if (arp_all_targets_value == -1) { | |
| 4660 | + pr_err("Error: invalid arp_all_targets_value \"%s\"\n", | |
| 4661 | + arp_all_targets); | |
| 4662 | + arp_all_targets_value = 0; | |
| 4663 | + } | |
| 4664 | + } | |
| 4665 | + | |
| 4708 | 4666 | if (miimon) { |
| 4709 | 4667 | pr_info("MII link monitoring set to %d ms\n", miimon); |
| 4710 | 4668 | } else if (arp_interval) { |
| @@ -4769,6 +4727,7 @@ static int bond_check_params(struct bond_params *params) · 58 unmodified lines | ||
| 4769 | 4727 | params->num_peer_notif = num_peer_notif; |
| 4770 | 4728 | params->arp_interval = arp_interval; |
| 4771 | 4729 | params->arp_validate = arp_validate_value; |
| 4730 | + params->arp_all_targets = arp_all_targets_value; | |
| 4772 | 4731 | params->updelay = updelay; |
| 4773 | 4732 | params->downdelay = downdelay; |
| 4774 | 4733 | params->use_carrier = use_carrier; |
| @@ -4845,12 +4804,9 @@ static int bond_init(struct net_device *bond_dev) · 70 unmodified lines | ||
| 4845 | 4804 | |
| 4846 | 4805 | /* Ensure valid dev_addr */ |
| 4847 | 4806 | if (is_zero_ether_addr(bond_dev->dev_addr) && |
| 4848 | − bond_dev->addr_assign_type == NET_ADDR_PERM) { | |
| 4807 | + bond_dev->addr_assign_type == NET_ADDR_PERM) | |
| 4849 | 4808 | eth_hw_addr_random(bond_dev); |
| 4850 | − bond->dev_addr_from_first = true; | |
| 4851 | − } | |
| 4852 | 4809 | |
| 4853 | − __hw_addr_init(&bond->mc_list); | |
| 4854 | 4810 | return 0; |
| 4855 | 4811 | } |
| 4856 | 4812 | |
| @@ -4923,7 +4879,7 @@ static int __net_init bond_net_init(struct net *net) · 66 unmodified lines | ||
| 4923 | 4879 | |
| 4924 | 4880 | bond_create_proc_dir(bn); |
| 4925 | 4881 | bond_create_sysfs(bn); |
| 4926 | − | |
| 4882 | + | |
| 4927 | 4883 | return 0; |
| 4928 | 4884 | } |
| 4929 | 4885 | |
| @@ -231,8 +231,7 @@ static ssize_t bonding_show_slaves(struct device *d, · 230 unmodified lines | ||
| 231 | 231 | } |
| 232 | 232 | |
| 233 | 233 | /* |
| 234 | − * Set the slaves in the current bond. The bond interface must be | |
| 235 | − * up for this to succeed. | |
| 234 | + * Set the slaves in the current bond. | |
| 236 | 235 | * This is supposed to be only thin wrapper for bond_enslave and bond_release. |
| 237 | 236 | * All hard work should be done there. |
| 238 | 237 | */ |
| @@ -363,7 +362,6 @@ static DEVICE_ATTR(mode, S_IRUGO | S_IWUSR, · 124 unmodified lines | ||
| 363 | 362 | |
| 364 | 363 | /* |
| 365 | 364 | * Show and set the bonding transmit hash method. |
| 366 | − * The bond interface must be down to change the xmit hash policy. | |
| 367 | 365 | */ |
| 368 | 366 | static ssize_t bonding_show_xmit_hash(struct device *d, |
| 369 | 367 | struct device_attribute *attr, |
| @@ -383,20 +381,12 @@ static ssize_t bonding_store_xmit_hash(struct device *d, · 13 unmodified lines | ||
| 383 | 381 | int new_value, ret = count; |
| 384 | 382 | struct bonding *bond = to_bond(d); |
| 385 | 383 | |
| 386 | − if (bond->dev->flags & IFF_UP) { | |
| 387 | − pr_err("%s: Interface is up. Unable to update xmit policy.\n", | |
| 388 | − bond->dev->name); | |
| 389 | − ret = -EPERM; | |
| 390 | − goto out; | |
| 391 | − } | |
| 392 | − | |
| 393 | 384 | new_value = bond_parse_parm(buf, xmit_hashtype_tbl); |
| 394 | 385 | if (new_value < 0) { |
| 395 | 386 | pr_err("%s: Ignoring invalid xmit hash policy value %.*s.\n", |
| 396 | 387 | bond->dev->name, |
| 397 | 388 | (int)strlen(buf) - 1, buf); |
| 398 | 389 | ret = -EINVAL; |
| 399 | − goto out; | |
| 400 | 390 | } else { |
| 401 | 391 | bond->params.xmit_policy = new_value; |
| 402 | 392 | bond_set_mode_ops(bond, bond->params.mode); |
| @@ -404,7 +394,7 @@ static ssize_t bonding_store_xmit_hash(struct device *d, · 1 unmodified line | ||
| 404 | 394 | bond->dev->name, |
| 405 | 395 | xmit_hashtype_tbl[new_value].modename, new_value); |
| 406 | 396 | } |
| 407 | −out: | |
| 397 | + | |
| 408 | 398 | return ret; |
| 409 | 399 | } |
| 410 | 400 | static DEVICE_ATTR(xmit_hash_policy, S_IRUGO | S_IWUSR, |
| @@ -453,6 +443,44 @@ static ssize_t bonding_store_arp_validate(struct device *d, · 42 unmodified lines | ||
| 453 | 443 | |
| 454 | 444 | static DEVICE_ATTR(arp_validate, S_IRUGO | S_IWUSR, bonding_show_arp_validate, |
| 455 | 445 | bonding_store_arp_validate); |
| 446 | +/* | |
| 447 | + * Show and set arp_all_targets. | |
| 448 | + */ | |
| 449 | +static ssize_t bonding_show_arp_all_targets(struct device *d, | |
| 450 | + struct device_attribute *attr, | |
| 451 | + char *buf) | |
| 452 | +{ | |
| 453 | + struct bonding *bond = to_bond(d); | |
| 454 | + int value = bond->params.arp_all_targets; | |
| 455 | + | |
| 456 | + return sprintf(buf, "%s %d\n", arp_all_targets_tbl[value].modename, | |
| 457 | + value); | |
| 458 | +} | |
| 459 | + | |
| 460 | +static ssize_t bonding_store_arp_all_targets(struct device *d, | |
| 461 | + struct device_attribute *attr, | |
| 462 | + const char *buf, size_t count) | |
| 463 | +{ | |
| 464 | + struct bonding *bond = to_bond(d); | |
| 465 | + int new_value; | |
| 466 | + | |
| 467 | + new_value = bond_parse_parm(buf, arp_all_targets_tbl); | |
| 468 | + if (new_value < 0) { | |
| 469 | + pr_err("%s: Ignoring invalid arp_all_targets value %s\n", | |
| 470 | + bond->dev->name, buf); | |
| 471 | + return -EINVAL; | |
| 472 | + } | |
| 473 | + pr_info("%s: setting arp_all_targets to %s (%d).\n", | |
| 474 | + bond->dev->name, arp_all_targets_tbl[new_value].modename, | |
| 475 | + new_value); | |
| 476 | + | |
| 477 | + bond->params.arp_all_targets = new_value; | |
| 478 | + | |
| 479 | + return count; | |
| 480 | +} | |
| 481 | + | |
| 482 | +static DEVICE_ATTR(arp_all_targets, S_IRUGO | S_IWUSR, | |
| 483 | + bonding_show_arp_all_targets, bonding_store_arp_all_targets); | |
| 456 | 484 | |
| 457 | 485 | /* |
| 458 | 486 | * Show and store fail_over_mac. User only allowed to change the |
| @@ -600,10 +628,11 @@ static ssize_t bonding_store_arp_targets(struct device *d, · 141 unmodified lines | ||
| 600 | 628 | struct device_attribute *attr, |
| 601 | 629 | const char *buf, size_t count) |
| 602 | 630 | { |
| 603 | − __be32 newtarget; | |
| 604 | − int i = 0, done = 0, ret = count; | |
| 605 | 631 | struct bonding *bond = to_bond(d); |
| 606 | − __be32 *targets; | |
| 632 | + struct slave *slave; | |
| 633 | + __be32 newtarget, *targets; | |
| 634 | + unsigned long *targets_rx; | |
| 635 | + int ind, i, j, ret = -EINVAL; | |
| 607 | 636 | |
| 608 | 637 | targets = bond->params.arp_targets; |
| 609 | 638 | newtarget = in_aton(buf + 1); |
| @@ -612,57 +641,63 @@ static ssize_t bonding_store_arp_targets(struct device *d, · 2 unmodified lines | ||
| 612 | 641 | if ((newtarget == 0) || (newtarget == htonl(INADDR_BROADCAST))) { |
| 613 | 642 | pr_err("%s: invalid ARP target %pI4 specified for addition\n", |
| 614 | 643 | bond->dev->name, &newtarget); |
| 615 | − ret = -EINVAL; | |
| 616 | 644 | goto out; |
| 617 | 645 | } |
| 618 | − /* look for an empty slot to put the target in, and check for dupes */ | |
| 619 | − for (i = 0; (i < BOND_MAX_ARP_TARGETS) && !done; i++) { | |
| 620 | − if (targets[i] == newtarget) { /* duplicate */ | |
| 621 | − pr_err("%s: ARP target %pI4 is already present\n", | |
| 622 | − bond->dev->name, &newtarget); | |
| 623 | − ret = -EINVAL; | |
| 624 | − goto out; | |
| 625 | − } | |
| 626 | − if (targets[i] == 0) { | |
| 627 | − pr_info("%s: adding ARP target %pI4.\n", | |
| 628 | − bond->dev->name, &newtarget); | |
| 629 | − done = 1; | |
| 630 | − targets[i] = newtarget; | |
| 631 | − } | |
| 646 | + | |
| 647 | + if (bond_get_targets_ip(targets, newtarget) != -1) { /* dup */ | |
| 648 | + pr_err("%s: ARP target %pI4 is already present\n", | |
| 649 | + bond->dev->name, &newtarget); | |
| 650 | + goto out; | |
| 632 | 651 | } |
| 633 | − if (!done) { | |
| 652 | + | |
| 653 | + ind = bond_get_targets_ip(targets, 0); /* first free slot */ | |
| 654 | + if (ind == -1) { | |
| 634 | 655 | pr_err("%s: ARP target table is full!\n", |
| 635 | 656 | bond->dev->name); |
| 636 | − ret = -EINVAL; | |
| 637 | 657 | goto out; |
| 638 | 658 | } |
| 639 | 659 | |
| 660 | + pr_info("%s: adding ARP target %pI4.\n", bond->dev->name, | |
| 661 | + &newtarget); | |
| 662 | + /* not to race with bond_arp_rcv */ | |
| 663 | + write_lock_bh(&bond->lock); | |
| 664 | + bond_for_each_slave(bond, slave, i) | |
| 665 | + slave->target_last_arp_rx[ind] = jiffies; | |
| 666 | + targets[ind] = newtarget; | |
| 667 | + write_unlock_bh(&bond->lock); | |
| 640 | 668 | } else if (buf[0] == '-') { |
| 641 | 669 | if ((newtarget == 0) || (newtarget == htonl(INADDR_BROADCAST))) { |
| 642 | 670 | pr_err("%s: invalid ARP target %pI4 specified for removal\n", |
| 643 | 671 | bond->dev->name, &newtarget); |
| 644 | − ret = -EINVAL; | |
| 645 | 672 | goto out; |
| 646 | 673 | } |
| 647 | 674 | |
| 648 | − for (i = 0; (i < BOND_MAX_ARP_TARGETS) && !done; i++) { | |
| 649 | − if (targets[i] == newtarget) { | |
| 650 | − int j; | |
| 651 | − pr_info("%s: removing ARP target %pI4.\n", | |
| 652 | − bond->dev->name, &newtarget); | |
| 653 | − for (j = i; (j < (BOND_MAX_ARP_TARGETS-1)) && targets[j+1]; j++) | |
| 654 | − targets[j] = targets[j+1]; | |
| 655 | − | |
| 656 | − targets[j] = 0; | |
| 657 | − done = 1; | |
| 658 | − } | |
| 659 | − } | |
| 660 | − if (!done) { | |
| 661 | − pr_info("%s: unable to remove nonexistent ARP target %pI4.\n", | |
| 675 | + ind = bond_get_targets_ip(targets, newtarget); | |
| 676 | + if (ind == -1) { | |
| 677 | + pr_err("%s: unable to remove nonexistent ARP target %pI4.\n", | |
| 662 | 678 | bond->dev->name, &newtarget); |
| 663 | − ret = -EINVAL; | |
| 664 | 679 | goto out; |
| 665 | 680 | } |
| 681 | + | |
| 682 | + if (ind == 0 && !targets[1] && bond->params.arp_interval) | |
| 683 | + pr_warn("%s: removing last arp target with arp_interval on\n", | |
| 684 | + bond->dev->name); | |
| 685 | + | |
| 686 | + pr_info("%s: removing ARP target %pI4.\n", bond->dev->name, | |
| 687 | + &newtarget); | |
| 688 | + | |
| 689 | + write_lock_bh(&bond->lock); | |
| 690 | + bond_for_each_slave(bond, slave, i) { | |
| 691 | + targets_rx = slave->target_last_arp_rx; | |
| 692 | + j = ind; | |
| 693 | + for (; (j < BOND_MAX_ARP_TARGETS-1) && targets[j+1]; j++) | |
| 694 | + targets_rx[j] = targets_rx[j+1]; | |
| 695 | + targets_rx[j] = 0; | |
| 696 | + } | |
| 697 | + for (i = ind; (i < BOND_MAX_ARP_TARGETS-1) && targets[i+1]; i++) | |
| 698 | + targets[i] = targets[i+1]; | |
| 699 | + targets[i] = 0; | |
| 700 | + write_unlock_bh(&bond->lock); | |
| 666 | 701 | } else { |
| 667 | 702 | pr_err("no command found in arp_ip_targets file for bond %s. Use +<addr> or -<addr>.\n", |
| 668 | 703 | bond->dev->name); |
| @@ -670,6 +705,7 @@ static ssize_t bonding_store_arp_targets(struct device *d, · 1 unmodified line | ||
| 670 | 705 | goto out; |
| 671 | 706 | } |
| 672 | 707 | |
| 708 | + ret = count; | |
| 673 | 709 | out: |
| 674 | 710 | return ret; |
| 675 | 711 | } |
| @@ -1645,6 +1681,7 @@ static struct attribute *per_bond_attrs[] = { · 969 unmodified lines | ||
| 1645 | 1681 | &dev_attr_mode.attr, |
| 1646 | 1682 | &dev_attr_fail_over_mac.attr, |
| 1647 | 1683 | &dev_attr_arp_validate.attr, |
| 1684 | + &dev_attr_arp_all_targets.attr, | |
| 1648 | 1685 | &dev_attr_arp_interval.attr, |
| 1649 | 1686 | &dev_attr_arp_ip_target.attr, |
| 1650 | 1687 | &dev_attr_downdelay.attr, |
| @@ -144,6 +144,7 @@ struct bond_params { · 143 unmodified lines | ||
| 144 | 144 | u8 num_peer_notif; |
| 145 | 145 | int arp_interval; |
| 146 | 146 | int arp_validate; |
| 147 | + int arp_all_targets; | |
| 147 | 148 | int use_carrier; |
| 148 | 149 | int fail_over_mac; |
| 149 | 150 | int updelay; |
| @@ -179,6 +180,7 @@ struct slave { · 29 unmodified lines | ||
| 179 | 180 | int delay; |
| 180 | 181 | unsigned long jiffies; |
| 181 | 182 | unsigned long last_arp_rx; |
| 183 | + unsigned long target_last_arp_rx[BOND_MAX_ARP_TARGETS]; | |
| 182 | 184 | s8 link; /* one of BOND_LINK_XXXX */ |
| 183 | 185 | s8 new_link; |
| 184 | 186 | u8 backup:1, /* indicates backup slave. Value corresponds with |
| @@ -224,14 +226,12 @@ struct bonding { · 39 unmodified lines | ||
| 224 | 226 | rwlock_t lock; |
| 225 | 227 | rwlock_t curr_slave_lock; |
| 226 | 228 | u8 send_peer_notif; |
| 227 | − s8 setup_by_slave; | |
| 228 | 229 | u8 igmp_retrans; |
| 229 | 230 | #ifdef CONFIG_PROC_FS |
| 230 | 231 | struct proc_dir_entry *proc_entry; |
| 231 | 232 | char proc_file_name[IFNAMSIZ]; |
| 232 | 233 | #endif /* CONFIG_PROC_FS */ |
| 233 | 234 | struct list_head bond_list; |
| 234 | − struct netdev_hw_addr_list mc_list; | |
| 235 | 235 | int (*xmit_hash_policy)(struct sk_buff *, int); |
| 236 | 236 | u16 rr_tx_counter; |
| 237 | 237 | struct ad_bond_info ad_info; |
| @@ -248,7 +248,6 @@ struct bonding { · 10 unmodified lines | ||
| 248 | 248 | /* debugging support via debugfs */ |
| 249 | 249 | struct dentry *debug_dir; |
| 250 | 250 | #endif /* CONFIG_DEBUG_FS */ |
| 251 | − bool dev_addr_from_first; | |
| 252 | 251 | }; |
| 253 | 252 | |
| 254 | 253 | static inline bool bond_vlan_used(struct bonding *bond) |
| @@ -323,6 +322,9 @@ static inline bool bond_is_active_slave(struct slave *slave) · 68 unmodified lines | ||
| 323 | 322 | #define BOND_FOM_ACTIVE 1 |
| 324 | 323 | #define BOND_FOM_FOLLOW 2 |
| 325 | 324 | |
| 325 | +#define BOND_ARP_TARGETS_ANY 0 | |
| 326 | +#define BOND_ARP_TARGETS_ALL 1 | |
| 327 | + | |
| 326 | 328 | #define BOND_ARP_VALIDATE_NONE 0 |
| 327 | 329 | #define BOND_ARP_VALIDATE_ACTIVE (1 << BOND_STATE_ACTIVE) |
| 328 | 330 | #define BOND_ARP_VALIDATE_BACKUP (1 << BOND_STATE_BACKUP) |
| @@ -335,11 +337,31 @@ static inline int slave_do_arp_validate(struct bonding *bond, · 6 unmodified lines | ||
| 335 | 337 | return bond->params.arp_validate & (1 << bond_slave_state(slave)); |
| 336 | 338 | } |
| 337 | 339 | |
| 340 | +/* Get the oldest arp which we've received on this slave for bond's | |
| 341 | + * arp_targets. | |
| 342 | + */ | |
| 343 | +static inline unsigned long slave_oldest_target_arp_rx(struct bonding *bond, | |
| 344 | + struct slave *slave) | |
| 345 | +{ | |
| 346 | + int i = 1; | |
| 347 | + unsigned long ret = slave->target_last_arp_rx[0]; | |
| 348 | + | |
| 349 | + for (; (i < BOND_MAX_ARP_TARGETS) && bond->params.arp_targets[i]; i++) | |
| 350 | + if (time_before(slave->target_last_arp_rx[i], ret)) | |
| 351 | + ret = slave->target_last_arp_rx[i]; | |
| 352 | + | |
| 353 | + return ret; | |
| 354 | +} | |
| 355 | + | |
| 338 | 356 | static inline unsigned long slave_last_rx(struct bonding *bond, |
| 339 | 357 | struct slave *slave) |
| 340 | 358 | { |
| 341 | − if (slave_do_arp_validate(bond, slave)) | |
| 342 | − return slave->last_arp_rx; | |
| 359 | + if (slave_do_arp_validate(bond, slave)) { | |
| 360 | + if (bond->params.arp_all_targets == BOND_ARP_TARGETS_ALL) | |
| 361 | + return slave_oldest_target_arp_rx(bond, slave); | |
| 362 | + else | |
| 363 | + return slave->last_arp_rx; | |
| 364 | + } | |
| 343 | 365 | |
| 344 | 366 | return slave->dev->last_rx; |
| 345 | 367 | } |
| @@ -465,12 +487,29 @@ static inline struct slave *bond_slave_has_mac(struct bonding *bond, · 119 unmodified lines | ||
| 465 | 487 | return NULL; |
| 466 | 488 | } |
| 467 | 489 | |
| 490 | +/* Check if the ip is present in arp ip list, or first free slot if ip == 0 | |
| 491 | + * Returns -1 if not found, index if found | |
| 492 | + */ | |
| 493 | +static inline int bond_get_targets_ip(__be32 *targets, __be32 ip) | |
| 494 | +{ | |
| 495 | + int i; | |
| 496 | + | |
| 497 | + for (i = 0; i < BOND_MAX_ARP_TARGETS; i++) | |
| 498 | + if (targets[i] == ip) | |
| 499 | + return i; | |
| 500 | + else if (targets[i] == 0) | |
| 501 | + break; | |
| 502 | + | |
| 503 | + return -1; | |
| 504 | +} | |
| 505 | + | |
| 468 | 506 | /* exported from bond_main.c */ |
| 469 | 507 | extern int bond_net_id; |
| 470 | 508 | extern const struct bond_parm_tbl bond_lacp_tbl[]; |
| 471 | 509 | extern const struct bond_parm_tbl bond_mode_tbl[]; |
| 472 | 510 | extern const struct bond_parm_tbl xmit_hashtype_tbl[]; |
| 473 | 511 | extern const struct bond_parm_tbl arp_validate_tbl[]; |
| 512 | +extern const struct bond_parm_tbl arp_all_targets_tbl[]; | |
| 474 | 513 | extern const struct bond_parm_tbl fail_over_mac_tbl[]; |
| 475 | 514 | extern const struct bond_parm_tbl pri_reselect_tbl[]; |
| 476 | 515 | extern struct bond_parm_tbl ad_select_tbl[]; |
| @@ -35,8 +35,9 @@ MODULE_ALIAS_LDISC(N_CAIF); · 34 unmodified lines | ||
| 35 | 35 | #define OFF 0 |
| 36 | 36 | #define CAIF_MAX_MTU 4096 |
| 37 | 37 | |
| 38 | −/*This list is protected by the rtnl lock. */ | |
| 38 | +static DEFINE_SPINLOCK(ser_lock); | |
| 39 | 39 | static LIST_HEAD(ser_list); |
| 40 | +static LIST_HEAD(ser_release_list); | |
| 40 | 41 | |
| 41 | 42 | static bool ser_loop; |
| 42 | 43 | module_param(ser_loop, bool, S_IRUGO); |
| @@ -308,6 +309,28 @@ static void ldisc_tx_wakeup(struct tty_struct *tty) · 265 unmodified lines | ||
| 308 | 309 | } |
| 309 | 310 | |
| 310 | 311 | |
| 312 | +static void ser_release(struct work_struct *work) | |
| 313 | +{ | |
| 314 | + struct list_head list; | |
| 315 | + struct ser_device *ser, *tmp; | |
| 316 | + | |
| 317 | + spin_lock(&ser_lock); | |
| 318 | + list_replace_init(&ser_release_list, &list); | |
| 319 | + spin_unlock(&ser_lock); | |
| 320 | + | |
| 321 | + if (!list_empty(&list)) { | |
| 322 | + rtnl_lock(); | |
| 323 | + list_for_each_entry_safe(ser, tmp, &list, node) { | |
| 324 | + dev_close(ser->dev); | |
| 325 | + unregister_netdevice(ser->dev); | |
| 326 | + debugfs_deinit(ser); | |
| 327 | + } | |
| 328 | + rtnl_unlock(); | |
| 329 | + } | |
| 330 | +} | |
| 331 | + | |
| 332 | +static DECLARE_WORK(ser_release_work, ser_release); | |
| 333 | + | |
| 311 | 334 | static int ldisc_open(struct tty_struct *tty) |
| 312 | 335 | { |
| 313 | 336 | struct ser_device *ser; |
| @@ -321,6 +344,9 @@ static int ldisc_open(struct tty_struct *tty) · 7 unmodified lines | ||
| 321 | 344 | if (!capable(CAP_SYS_ADMIN) && !capable(CAP_SYS_TTY_CONFIG)) |
| 322 | 345 | return -EPERM; |
| 323 | 346 | |
| 347 | + /* release devices to avoid name collision */ | |
| 348 | + ser_release(NULL); | |
| 349 | + | |
| 324 | 350 | sprintf(name, "cf%s", tty->name); |
| 325 | 351 | dev = alloc_netdev(sizeof(*ser), name, caifdev_setup); |
| 326 | 352 | if (!dev) |
| @@ -341,7 +367,9 @@ static int ldisc_open(struct tty_struct *tty) · 14 unmodified lines | ||
| 341 | 367 | return -ENODEV; |
| 342 | 368 | } |
| 343 | 369 | |
| 370 | + spin_lock(&ser_lock); | |
| 344 | 371 | list_add(&ser->node, &ser_list); |
| 372 | + spin_unlock(&ser_lock); | |
| 345 | 373 | rtnl_unlock(); |
| 346 | 374 | netif_stop_queue(dev); |
| 347 | 375 | update_tty_status(ser); |
| @@ -351,19 +379,13 @@ static int ldisc_open(struct tty_struct *tty) · 3 unmodified lines | ||
| 351 | 379 | static void ldisc_close(struct tty_struct *tty) |
| 352 | 380 | { |
| 353 | 381 | struct ser_device *ser = tty->disc_data; |
| 354 | − /* Remove may be called inside or outside of rtnl_lock */ | |
| 355 | − int islocked = rtnl_is_locked(); | |
| 356 | 382 | |
| 357 | − if (!islocked) | |
| 358 | − rtnl_lock(); | |
| 359 | − /* device is freed automagically by net-sysfs */ | |
| 360 | − dev_close(ser->dev); | |
| 361 | − unregister_netdevice(ser->dev); | |
| 362 | − list_del(&ser->node); | |
| 363 | − debugfs_deinit(ser); | |
| 364 | 383 | tty_kref_put(ser->tty); |
| 365 | − if (!islocked) | |
| 366 | − rtnl_unlock(); | |
| 384 | + | |
| 385 | + spin_lock(&ser_lock); | |
| 386 | + list_move(&ser->node, &ser_release_list); | |
| 387 | + spin_unlock(&ser_lock); | |
| 388 | + schedule_work(&ser_release_work); | |
| 367 | 389 | } |
| 368 | 390 | |
| 369 | 391 | /* The line discipline structure. */ |
| @@ -438,16 +460,11 @@ static int __init caif_ser_init(void) · 68 unmodified lines | ||
| 438 | 460 | |
| 439 | 461 | static void __exit caif_ser_exit(void) |
| 440 | 462 | { |
| 441 | − struct ser_device *ser = NULL; | |
| 442 | − struct list_head *node; | |
| 443 | − struct list_head *_tmp; | |
| 444 | − | |
| 445 | − list_for_each_safe(node, _tmp, &ser_list) { | |
| 446 | − ser = list_entry(node, struct ser_device, node); | |
| 447 | − dev_close(ser->dev); | |
| 448 | − unregister_netdevice(ser->dev); | |
| 449 | − list_del(node); | |
| 450 | − } | |
| 463 | + spin_lock(&ser_lock); | |
| 464 | + list_splice(&ser_list, &ser_release_list); | |
| 465 | + spin_unlock(&ser_lock); | |
| 466 | + ser_release(NULL); | |
| 467 | + cancel_work_sync(&ser_release_work); | |
| 451 | 468 | tty_unregister_ldisc(N_CAIF); |
| 452 | 469 | debugfs_remove_recursive(debugfsdir); |
| 453 | 470 | } |
| @@ -102,12 +102,9 @@ config CAN_JANZ_ICAN3 · 101 unmodified lines | ||
| 102 | 102 | This driver can also be built as a module. If so, the module will be |
| 103 | 103 | called janz-ican3.ko. |
| 104 | 104 | |
| 105 | −config HAVE_CAN_FLEXCAN | |
| 106 | − bool | |
| 107 | − | |
| 108 | 105 | config CAN_FLEXCAN |
| 109 | 106 | tristate "Support for Freescale FLEXCAN based chips" |
| 110 | − depends on HAVE_CAN_FLEXCAN | |
| 107 | + depends on ARM || PPC | |
| 111 | 108 | ---help--- |
| 112 | 109 | Say Y here if you want to support for Freescale FlexCAN. |
| 113 | 110 | |
| @@ -1220,7 +1220,7 @@ static ssize_t at91_sysfs_set_mb0_id(struct device *dev, · 1219 unmodified lines | ||
| 1220 | 1220 | goto out; |
| 1221 | 1221 | } |
| 1222 | 1222 | |
| 1223 | − err = strict_strtoul(buf, 0, &can_id); | |
| 1223 | + err = kstrtoul(buf, 0, &can_id); | |
| 1224 | 1224 | if (err) { |
| 1225 | 1225 | ret = err; |
| 1226 | 1226 | goto out; |
| @@ -1264,8 +1264,6 @@ static const struct of_device_id at91_can_dt_ids[] = { · 37 unmodified lines | ||
| 1264 | 1264 | } |
| 1265 | 1265 | }; |
| 1266 | 1266 | MODULE_DEVICE_TABLE(of, at91_can_dt_ids); |
| 1267 | −#else | |
| 1268 | −#define at91_can_dt_ids NULL | |
| 1269 | 1267 | #endif |
| 1270 | 1268 | |
| 1271 | 1269 | static const struct at91_devtype_data *at91_can_get_driver_data(struct platform_device *pdev) |
| @@ -1393,8 +1391,6 @@ static int at91_can_remove(struct platform_device *pdev) · 121 unmodified lines | ||
| 1393 | 1391 | |
| 1394 | 1392 | unregister_netdev(dev); |
| 1395 | 1393 | |
| 1396 | − platform_set_drvdata(pdev, NULL); | |
| 1397 | − | |
| 1398 | 1394 | iounmap(priv->reg_base); |
| 1399 | 1395 | |
| 1400 | 1396 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| @@ -1426,7 +1422,7 @@ static struct platform_driver at91_can_driver = { · 25 unmodified lines | ||
| 1426 | 1422 | .driver = { |
| 1427 | 1423 | .name = KBUILD_MODNAME, |
| 1428 | 1424 | .owner = THIS_MODULE, |
| 1429 | − .of_match_table = at91_can_dt_ids, | |
| 1425 | + .of_match_table = of_match_ptr(at91_can_dt_ids), | |
| 1430 | 1426 | }, |
| 1431 | 1427 | .id_table = at91_can_id_table, |
| 1432 | 1428 | }; |
| @@ -580,7 +580,7 @@ static int bfin_can_probe(struct platform_device *pdev) · 579 unmodified lines | ||
| 580 | 580 | priv->pin_list = pdata; |
| 581 | 581 | priv->can.clock.freq = get_sclk(); |
| 582 | 582 | |
| 583 | − dev_set_drvdata(&pdev->dev, dev); | |
| 583 | + platform_set_drvdata(pdev, dev); | |
| 584 | 584 | SET_NETDEV_DEV(dev, &pdev->dev); |
| 585 | 585 | |
| 586 | 586 | dev->flags |= IFF_ECHO; /* we support local echo */ |
| @@ -613,7 +613,7 @@ exit: · 26 unmodified lines | ||
| 613 | 613 | |
| 614 | 614 | static int bfin_can_remove(struct platform_device *pdev) |
| 615 | 615 | { |
| 616 | − struct net_device *dev = dev_get_drvdata(&pdev->dev); | |
| 616 | + struct net_device *dev = platform_get_drvdata(pdev); | |
| 617 | 617 | struct bfin_can_priv *priv = netdev_priv(dev); |
| 618 | 618 | struct resource *res; |
| 619 | 619 | |
| @@ -621,8 +621,6 @@ static int bfin_can_remove(struct platform_device *pdev) · 1 unmodified line | ||
| 621 | 621 | |
| 622 | 622 | unregister_candev(dev); |
| 623 | 623 | |
| 624 | − dev_set_drvdata(&pdev->dev, NULL); | |
| 625 | − | |
| 626 | 624 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 627 | 625 | release_mem_region(res->start, resource_size(res)); |
| 628 | 626 | |
| @@ -635,7 +633,7 @@ static int bfin_can_remove(struct platform_device *pdev) · 6 unmodified lines | ||
| 635 | 633 | #ifdef CONFIG_PM |
| 636 | 634 | static int bfin_can_suspend(struct platform_device *pdev, pm_message_t mesg) |
| 637 | 635 | { |
| 638 | − struct net_device *dev = dev_get_drvdata(&pdev->dev); | |
| 636 | + struct net_device *dev = platform_get_drvdata(pdev); | |
| 639 | 637 | struct bfin_can_priv *priv = netdev_priv(dev); |
| 640 | 638 | struct bfin_can_regs __iomem *reg = priv->membase; |
| 641 | 639 | int timeout = BFIN_CAN_TIMEOUT; |
| @@ -658,7 +656,7 @@ static int bfin_can_suspend(struct platform_device *pdev, pm_message_t mesg) · 16 unmodified lines | ||
| 658 | 656 | |
| 659 | 657 | static int bfin_can_resume(struct platform_device *pdev) |
| 660 | 658 | { |
| 661 | − struct net_device *dev = dev_get_drvdata(&pdev->dev); | |
| 659 | + struct net_device *dev = platform_get_drvdata(pdev); | |
| 662 | 660 | struct bfin_can_priv *priv = netdev_priv(dev); |
| 663 | 661 | struct bfin_can_regs __iomem *reg = priv->membase; |
| 664 | 662 | |
| @@ -201,8 +201,8 @@ static int c_can_plat_probe(struct platform_device *pdev) · 200 unmodified lines | ||
| 201 | 201 | priv->instance = pdev->id; |
| 202 | 202 | |
| 203 | 203 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
| 204 | − priv->raminit_ctrlreg = devm_request_and_ioremap(&pdev->dev, res); | |
| 205 | − if (!priv->raminit_ctrlreg || priv->instance < 0) | |
| 204 | + priv->raminit_ctrlreg = devm_ioremap_resource(&pdev->dev, res); | |
| 205 | + if (IS_ERR(priv->raminit_ctrlreg) || priv->instance < 0) | |
| 206 | 206 | dev_info(&pdev->dev, "control memory is not used for raminit\n"); |
| 207 | 207 | else |
| 208 | 208 | priv->raminit = c_can_hw_raminit; |
| @@ -234,7 +234,6 @@ static int c_can_plat_probe(struct platform_device *pdev) · 25 unmodified lines | ||
| 234 | 234 | return 0; |
| 235 | 235 | |
| 236 | 236 | exit_free_device: |
| 237 | − platform_set_drvdata(pdev, NULL); | |
| 238 | 237 | free_c_can_dev(dev); |
| 239 | 238 | exit_iounmap: |
| 240 | 239 | iounmap(addr); |
| @@ -255,7 +254,6 @@ static int c_can_plat_remove(struct platform_device *pdev) · 14 unmodified lines | ||
| 255 | 254 | struct resource *mem; |
| 256 | 255 | |
| 257 | 256 | unregister_c_can_dev(dev); |
| 258 | − platform_set_drvdata(pdev, NULL); | |
| 259 | 257 | |
| 260 | 258 | free_c_can_dev(dev); |
| 261 | 259 | iounmap(priv->base); |
| @@ -265,7 +265,7 @@ static int cc770_isa_probe(struct platform_device *pdev) · 264 unmodified lines | ||
| 265 | 265 | else |
| 266 | 266 | priv->clkout = COR_DEFAULT; |
| 267 | 267 | |
| 268 | − dev_set_drvdata(&pdev->dev, dev); | |
| 268 | + platform_set_drvdata(pdev, dev); | |
| 269 | 269 | SET_NETDEV_DEV(dev, &pdev->dev); |
| 270 | 270 | |
| 271 | 271 | err = register_cc770dev(dev); |
| @@ -293,12 +293,11 @@ static int cc770_isa_probe(struct platform_device *pdev) · 21 unmodified lines | ||
| 293 | 293 | |
| 294 | 294 | static int cc770_isa_remove(struct platform_device *pdev) |
| 295 | 295 | { |
| 296 | − struct net_device *dev = dev_get_drvdata(&pdev->dev); | |
| 296 | + struct net_device *dev = platform_get_drvdata(pdev); | |
| 297 | 297 | struct cc770_priv *priv = netdev_priv(dev); |
| 298 | 298 | int idx = pdev->id; |
| 299 | 299 | |
| 300 | 300 | unregister_cc770dev(dev); |
| 301 | − dev_set_drvdata(&pdev->dev, NULL); | |
| 302 | 301 | |
| 303 | 302 | if (mem[idx]) { |
| 304 | 303 | iounmap(priv->reg_base); |
| @@ -216,7 +216,7 @@ static int cc770_platform_probe(struct platform_device *pdev) · 215 unmodified lines | ||
| 216 | 216 | priv->reg_base, dev->irq, priv->can.clock.freq, |
| 217 | 217 | priv->cpu_interface, priv->bus_config, priv->clkout); |
| 218 | 218 | |
| 219 | − dev_set_drvdata(&pdev->dev, dev); | |
| 219 | + platform_set_drvdata(pdev, dev); | |
| 220 | 220 | SET_NETDEV_DEV(dev, &pdev->dev); |
| 221 | 221 | |
| 222 | 222 | err = register_cc770dev(dev); |
| @@ -240,7 +240,7 @@ exit_release_mem: · 17 unmodified lines | ||
| 240 | 240 | |
| 241 | 241 | static int cc770_platform_remove(struct platform_device *pdev) |
| 242 | 242 | { |
| 243 | − struct net_device *dev = dev_get_drvdata(&pdev->dev); | |
| 243 | + struct net_device *dev = platform_get_drvdata(pdev); | |
| 244 | 244 | struct cc770_priv *priv = netdev_priv(dev); |
| 245 | 245 | struct resource *mem; |
| 246 | 246 | |
| @@ -24,7 +24,6 @@ · 23 unmodified lines | ||
| 24 | 24 | #include <linux/can/dev.h> |
| 25 | 25 | #include <linux/can/error.h> |
| 26 | 26 | #include <linux/can/led.h> |
| 27 | −#include <linux/can/platform/flexcan.h> | |
| 28 | 27 | #include <linux/clk.h> |
| 29 | 28 | #include <linux/delay.h> |
| 30 | 29 | #include <linux/if_arp.h> |
| @@ -37,7 +36,7 @@ · 6 unmodified lines | ||
| 37 | 36 | #include <linux/of.h> |
| 38 | 37 | #include <linux/of_device.h> |
| 39 | 38 | #include <linux/platform_device.h> |
| 40 | −#include <linux/pinctrl/consumer.h> | |
| 39 | +#include <linux/regulator/consumer.h> | |
| 41 | 40 | |
| 42 | 41 | #define DRV_NAME "flexcan" |
| 43 | 42 | |
| @@ -212,6 +211,7 @@ struct flexcan_priv { · 168 unmodified lines | ||
| 212 | 211 | struct clk *clk_per; |
| 213 | 212 | struct flexcan_platform_data *pdata; |
| 214 | 213 | const struct flexcan_devtype_data *devtype_data; |
| 214 | + struct regulator *reg_xceiver; | |
| 215 | 215 | }; |
| 216 | 216 | |
| 217 | 217 | static struct flexcan_devtype_data fsl_p1010_devtype_data = { |
| @@ -259,15 +259,6 @@ static inline void flexcan_write(u32 val, void __iomem *addr) · 41 unmodified lines | ||
| 259 | 259 | } |
| 260 | 260 | #endif |
| 261 | 261 | |
| 262 | −/* | |
| 263 | − * Swtich transceiver on or off | |
| 264 | − */ | |
| 265 | −static void flexcan_transceiver_switch(const struct flexcan_priv *priv, int on) | |
| 266 | −{ | |
| 267 | − if (priv->pdata && priv->pdata->transceiver_switch) | |
| 268 | − priv->pdata->transceiver_switch(on); | |
| 269 | −} | |
| 270 | − | |
| 271 | 262 | static inline int flexcan_has_and_handle_berr(const struct flexcan_priv *priv, |
| 272 | 263 | u32 reg_esr) |
| 273 | 264 | { |
| @@ -800,7 +791,11 @@ static int flexcan_chip_start(struct net_device *dev) · 526 unmodified lines | ||
| 800 | 791 | if (priv->devtype_data->features & FLEXCAN_HAS_V10_FEATURES) |
| 801 | 792 | flexcan_write(0x0, ®s->rxfgmask); |
| 802 | 793 | |
| 803 | − flexcan_transceiver_switch(priv, 1); | |
| 794 | + if (priv->reg_xceiver) { | |
| 795 | + err = regulator_enable(priv->reg_xceiver); | |
| 796 | + if (err) | |
| 797 | + goto out; | |
| 798 | + } | |
| 804 | 799 | |
| 805 | 800 | /* synchronize with the can bus */ |
| 806 | 801 | reg_mcr = flexcan_read(®s->mcr); |
| @@ -843,7 +838,8 @@ static void flexcan_chip_stop(struct net_device *dev) · 36 unmodified lines | ||
| 843 | 838 | reg |= FLEXCAN_MCR_MDIS | FLEXCAN_MCR_HALT; |
| 844 | 839 | flexcan_write(reg, ®s->mcr); |
| 845 | 840 | |
| 846 | − flexcan_transceiver_switch(priv, 0); | |
| 841 | + if (priv->reg_xceiver) | |
| 842 | + regulator_disable(priv->reg_xceiver); | |
| 847 | 843 | priv->can.state = CAN_STATE_STOPPED; |
| 848 | 844 | |
| 849 | 845 | return; |
| @@ -1004,16 +1000,11 @@ static int flexcan_probe(struct platform_device *pdev) · 154 unmodified lines | ||
| 1004 | 1000 | struct flexcan_priv *priv; |
| 1005 | 1001 | struct resource *mem; |
| 1006 | 1002 | struct clk *clk_ipg = NULL, *clk_per = NULL; |
| 1007 | − struct pinctrl *pinctrl; | |
| 1008 | 1003 | void __iomem *base; |
| 1009 | 1004 | resource_size_t mem_size; |
| 1010 | 1005 | int err, irq; |
| 1011 | 1006 | u32 clock_freq = 0; |
| 1012 | 1007 | |
| 1013 | − pinctrl = devm_pinctrl_get_select_default(&pdev->dev); | |
| 1014 | − if (IS_ERR(pinctrl)) | |
| 1015 | − return PTR_ERR(pinctrl); | |
| 1016 | − | |
| 1017 | 1008 | if (pdev->dev.of_node) |
| 1018 | 1009 | of_property_read_u32(pdev->dev.of_node, |
| 1019 | 1010 | "clock-frequency", &clock_freq); |
| @@ -1090,6 +1081,10 @@ static int flexcan_probe(struct platform_device *pdev) · 70 unmodified lines | ||
| 1090 | 1081 | priv->pdata = pdev->dev.platform_data; |
| 1091 | 1082 | priv->devtype_data = devtype_data; |
| 1092 | 1083 | |
| 1084 | + priv->reg_xceiver = devm_regulator_get(&pdev->dev, "xceiver"); | |
| 1085 | + if (IS_ERR(priv->reg_xceiver)) | |
| 1086 | + priv->reg_xceiver = NULL; | |
| 1087 | + | |
| 1093 | 1088 | netif_napi_add(dev, &priv->napi, flexcan_poll, FLEXCAN_NAPI_WEIGHT); |
| 1094 | 1089 | |
| 1095 | 1090 | dev_set_drvdata(&pdev->dev, dev); |
| @@ -1127,7 +1122,6 @@ static int flexcan_remove(struct platform_device *pdev) · 31 unmodified lines | ||
| 1127 | 1122 | struct resource *mem; |
| 1128 | 1123 | |
| 1129 | 1124 | unregister_flexcandev(dev); |
| 1130 | − platform_set_drvdata(pdev, NULL); | |
| 1131 | 1125 | iounmap(priv->base); |
| 1132 | 1126 | |
| 1133 | 1127 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| @@ -1138,10 +1132,10 @@ static int flexcan_remove(struct platform_device *pdev) · 4 unmodified lines | ||
| 1138 | 1132 | return 0; |
| 1139 | 1133 | } |
| 1140 | 1134 | |
| 1141 | −#ifdef CONFIG_PM | |
| 1142 | −static int flexcan_suspend(struct platform_device *pdev, pm_message_t state) | |
| 1135 | +#ifdef CONFIG_PM_SLEEP | |
| 1136 | +static int flexcan_suspend(struct device *device) | |
| 1143 | 1137 | { |
| 1144 | − struct net_device *dev = platform_get_drvdata(pdev); | |
| 1138 | + struct net_device *dev = dev_get_drvdata(device); | |
| 1145 | 1139 | struct flexcan_priv *priv = netdev_priv(dev); |
| 1146 | 1140 | |
| 1147 | 1141 | flexcan_chip_disable(priv); |
| @@ -1155,9 +1149,9 @@ static int flexcan_suspend(struct platform_device *pdev, pm_message_t state) · 7 unmodified lines | ||
| 1155 | 1149 | return 0; |
| 1156 | 1150 | } |
| 1157 | 1151 | |
| 1158 | −static int flexcan_resume(struct platform_device *pdev) | |
| 1152 | +static int flexcan_resume(struct device *device) | |
| 1159 | 1153 | { |
| 1160 | − struct net_device *dev = platform_get_drvdata(pdev); | |
| 1154 | + struct net_device *dev = dev_get_drvdata(device); | |
| 1161 | 1155 | struct flexcan_priv *priv = netdev_priv(dev); |
| 1162 | 1156 | |
| 1163 | 1157 | priv->can.state = CAN_STATE_ERROR_ACTIVE; |
| @@ -1169,21 +1163,19 @@ static int flexcan_resume(struct platform_device *pdev) · 5 unmodified lines | ||
| 1169 | 1163 | |
| 1170 | 1164 | return 0; |
| 1171 | 1165 | } |
| 1172 | −#else | |
| 1173 | −#define flexcan_suspend NULL | |
| 1174 | −#define flexcan_resume NULL | |
| 1175 | −#endif | |
| 1166 | +#endif /* CONFIG_PM_SLEEP */ | |
| 1167 | + | |
| 1168 | +static SIMPLE_DEV_PM_OPS(flexcan_pm_ops, flexcan_suspend, flexcan_resume); | |
| 1176 | 1169 | |
| 1177 | 1170 | static struct platform_driver flexcan_driver = { |
| 1178 | 1171 | .driver = { |
| 1179 | 1172 | .name = DRV_NAME, |
| 1180 | 1173 | .owner = THIS_MODULE, |
| 1174 | + .pm = &flexcan_pm_ops, | |
| 1181 | 1175 | .of_match_table = flexcan_of_match, |
| 1182 | 1176 | }, |
| 1183 | 1177 | .probe = flexcan_probe, |
| 1184 | 1178 | .remove = flexcan_remove, |
| 1185 | − .suspend = flexcan_suspend, | |
| 1186 | − .resume = flexcan_resume, | |
| 1187 | 1179 | .id_table = flexcan_id_table, |
| 1188 | 1180 | }; |
| 1189 | 1181 | |
| @@ -1646,7 +1646,7 @@ static int grcan_setup_netdev(struct platform_device *ofdev, · 1645 unmodified lines | ||
| 1646 | 1646 | if (err) |
| 1647 | 1647 | goto exit_free_candev; |
| 1648 | 1648 | |
| 1649 | − dev_set_drvdata(&ofdev->dev, dev); | |
| 1649 | + platform_set_drvdata(ofdev, dev); | |
| 1650 | 1650 | |
| 1651 | 1651 | /* Reset device to allow bit-timing to be set. No need to call |
| 1652 | 1652 | * grcan_reset at this stage. That is done in grcan_open. |
| @@ -1683,10 +1683,9 @@ static int grcan_probe(struct platform_device *ofdev) · 30 unmodified lines | ||
| 1683 | 1683 | } |
| 1684 | 1684 | |
| 1685 | 1685 | res = platform_get_resource(ofdev, IORESOURCE_MEM, 0); |
| 1686 | − base = devm_request_and_ioremap(&ofdev->dev, res); | |
| 1687 | − if (!base) { | |
| 1688 | − dev_err(&ofdev->dev, "couldn't map IO resource\n"); | |
| 1689 | − err = -EADDRNOTAVAIL; | |
| 1686 | + base = devm_ioremap_resource(&ofdev->dev, res); | |
| 1687 | + if (IS_ERR(base)) { | |
| 1688 | + err = PTR_ERR(base); | |
| 1690 | 1689 | goto exit_error; |
| 1691 | 1690 | } |
| 1692 | 1691 | |
| @@ -1716,13 +1715,12 @@ exit_error: · 23 unmodified lines | ||
| 1716 | 1715 | |
| 1717 | 1716 | static int grcan_remove(struct platform_device *ofdev) |
| 1718 | 1717 | { |
| 1719 | − struct net_device *dev = dev_get_drvdata(&ofdev->dev); | |
| 1718 | + struct net_device *dev = platform_get_drvdata(ofdev); | |
| 1720 | 1719 | struct grcan_priv *priv = netdev_priv(dev); |
| 1721 | 1720 | |
| 1722 | 1721 | unregister_candev(dev); /* Will in turn call grcan_close */ |
| 1723 | 1722 | |
| 1724 | 1723 | irq_dispose_mapping(dev->irq); |
| 1725 | − dev_set_drvdata(&ofdev->dev, NULL); | |
| 1726 | 1724 | netif_napi_del(&priv->napi); |
| 1727 | 1725 | free_candev(dev); |
| 1728 | 1726 | |
| @@ -1734,7 +1734,7 @@ static ssize_t ican3_sysfs_set_term(struct device *dev, · 1733 unmodified lines | ||
| 1734 | 1734 | unsigned long enable; |
| 1735 | 1735 | int ret; |
| 1736 | 1736 | |
| 1737 | − if (strict_strtoul(buf, 0, &enable)) | |
| 1737 | + if (kstrtoul(buf, 0, &enable)) | |
| 1738 | 1738 | return -EINVAL; |
| 1739 | 1739 | |
| 1740 | 1740 | ret = ican3_set_termination(mod, enable); |
| @@ -88,9 +88,9 @@ EXPORT_SYMBOL_GPL(devm_can_led_init); · 87 unmodified lines | ||
| 88 | 88 | |
| 89 | 89 | /* NETDEV rename notifier to rename the associated led triggers too */ |
| 90 | 90 | static int can_led_notifier(struct notifier_block *nb, unsigned long msg, |
| 91 | − void *data) | |
| 91 | + void *ptr) | |
| 92 | 92 | { |
| 93 | − struct net_device *netdev = data; | |
| 93 | + struct net_device *netdev = netdev_notifier_info_to_dev(ptr); | |
| 94 | 94 | struct can_priv *priv = safe_candev_priv(netdev); |
| 95 | 95 | char name[CAN_LED_NAME_SZ]; |
| 96 | 96 | |
| @@ -302,7 +302,7 @@ static int mpc5xxx_can_probe(struct platform_device *ofdev) · 301 unmodified lines | ||
| 302 | 302 | goto exit_free_mscan; |
| 303 | 303 | } |
| 304 | 304 | |
| 305 | − dev_set_drvdata(&ofdev->dev, dev); | |
| 305 | + platform_set_drvdata(ofdev, dev); | |
| 306 | 306 | |
| 307 | 307 | dev_info(&ofdev->dev, "MSCAN at 0x%p, irq %d, clock %d Hz\n", |
| 308 | 308 | priv->reg_base, dev->irq, priv->can.clock.freq); |
| @@ -321,11 +321,9 @@ exit_unmap_mem: · 12 unmodified lines | ||
| 321 | 321 | |
| 322 | 322 | static int mpc5xxx_can_remove(struct platform_device *ofdev) |
| 323 | 323 | { |
| 324 | − struct net_device *dev = dev_get_drvdata(&ofdev->dev); | |
| 324 | + struct net_device *dev = platform_get_drvdata(ofdev); | |
| 325 | 325 | struct mscan_priv *priv = netdev_priv(dev); |
| 326 | 326 | |
| 327 | − dev_set_drvdata(&ofdev->dev, NULL); | |
| 328 | − | |
| 329 | 327 | unregister_mscandev(dev); |
| 330 | 328 | iounmap(priv->reg_base); |
| 331 | 329 | irq_dispose_mapping(dev->irq); |
| @@ -338,7 +336,7 @@ static int mpc5xxx_can_remove(struct platform_device *ofdev) · 6 unmodified lines | ||
| 338 | 336 | static struct mscan_regs saved_regs; |
| 339 | 337 | static int mpc5xxx_can_suspend(struct platform_device *ofdev, pm_message_t state) |
| 340 | 338 | { |
| 341 | − struct net_device *dev = dev_get_drvdata(&ofdev->dev); | |
| 339 | + struct net_device *dev = platform_get_drvdata(ofdev); | |
| 342 | 340 | struct mscan_priv *priv = netdev_priv(dev); |
| 343 | 341 | struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; |
| 344 | 342 | |
| @@ -349,7 +347,7 @@ static int mpc5xxx_can_suspend(struct platform_device *ofdev, pm_message_t state · 4 unmodified lines | ||
| 349 | 347 | |
| 350 | 348 | static int mpc5xxx_can_resume(struct platform_device *ofdev) |
| 351 | 349 | { |
| 352 | − struct net_device *dev = dev_get_drvdata(&ofdev->dev); | |
| 350 | + struct net_device *dev = platform_get_drvdata(ofdev); | |
| 353 | 351 | struct mscan_priv *priv = netdev_priv(dev); |
| 354 | 352 | struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; |
| 355 | 353 | |
| @@ -197,7 +197,7 @@ static int sja1000_isa_probe(struct platform_device *pdev) · 196 unmodified lines | ||
| 197 | 197 | else |
| 198 | 198 | priv->cdr = CDR_DEFAULT; |
| 199 | 199 | |
| 200 | − dev_set_drvdata(&pdev->dev, dev); | |
| 200 | + platform_set_drvdata(pdev, dev); | |
| 201 | 201 | SET_NETDEV_DEV(dev, &pdev->dev); |
| 202 | 202 | |
| 203 | 203 | err = register_sja1000dev(dev); |
| @@ -225,12 +225,11 @@ static int sja1000_isa_probe(struct platform_device *pdev) · 21 unmodified lines | ||
| 225 | 225 | |
| 226 | 226 | static int sja1000_isa_remove(struct platform_device *pdev) |
| 227 | 227 | { |
| 228 | − struct net_device *dev = dev_get_drvdata(&pdev->dev); | |
| 228 | + struct net_device *dev = platform_get_drvdata(pdev); | |
| 229 | 229 | struct sja1000_priv *priv = netdev_priv(dev); |
| 230 | 230 | int idx = pdev->id; |
| 231 | 231 | |
| 232 | 232 | unregister_sja1000dev(dev); |
| 233 | − dev_set_drvdata(&pdev->dev, NULL); | |
| 234 | 233 | |
| 235 | 234 | if (mem[idx]) { |
| 236 | 235 | iounmap(priv->reg_base); |
| @@ -72,13 +72,11 @@ static void sja1000_ofp_write_reg(const struct sja1000_priv *priv, · 71 unmodified lines | ||
| 72 | 72 | |
| 73 | 73 | static int sja1000_ofp_remove(struct platform_device *ofdev) |
| 74 | 74 | { |
| 75 | − struct net_device *dev = dev_get_drvdata(&ofdev->dev); | |
| 75 | + struct net_device *dev = platform_get_drvdata(ofdev); | |
| 76 | 76 | struct sja1000_priv *priv = netdev_priv(dev); |
| 77 | 77 | struct device_node *np = ofdev->dev.of_node; |
| 78 | 78 | struct resource res; |
| 79 | 79 | |
| 80 | − dev_set_drvdata(&ofdev->dev, NULL); | |
| 81 | − | |
| 82 | 80 | unregister_sja1000dev(dev); |
| 83 | 81 | free_sja1000dev(dev); |
| 84 | 82 | iounmap(priv->reg_base); |
| @@ -181,7 +179,7 @@ static int sja1000_ofp_probe(struct platform_device *ofdev) · 96 unmodified lines | ||
| 181 | 179 | priv->reg_base, dev->irq, priv->can.clock.freq, |
| 182 | 180 | priv->ocr, priv->cdr); |
| 183 | 181 | |
| 184 | − dev_set_drvdata(&ofdev->dev, dev); | |
| 182 | + platform_set_drvdata(ofdev, dev); | |
| 185 | 183 | SET_NETDEV_DEV(dev, &ofdev->dev); |
| 186 | 184 | |
| 187 | 185 | err = register_sja1000dev(dev); |
| @@ -135,7 +135,7 @@ static int sp_probe(struct platform_device *pdev) · 134 unmodified lines | ||
| 135 | 135 | break; |
| 136 | 136 | } |
| 137 | 137 | |
| 138 | − dev_set_drvdata(&pdev->dev, dev); | |
| 138 | + platform_set_drvdata(pdev, dev); | |
| 139 | 139 | SET_NETDEV_DEV(dev, &pdev->dev); |
| 140 | 140 | |
| 141 | 141 | err = register_sja1000dev(dev); |
| @@ -161,12 +161,11 @@ static int sp_probe(struct platform_device *pdev) · 19 unmodified lines | ||
| 161 | 161 | |
| 162 | 162 | static int sp_remove(struct platform_device *pdev) |
| 163 | 163 | { |
| 164 | − struct net_device *dev = dev_get_drvdata(&pdev->dev); | |
| 164 | + struct net_device *dev = platform_get_drvdata(pdev); | |
| 165 | 165 | struct sja1000_priv *priv = netdev_priv(dev); |
| 166 | 166 | struct resource *res; |
| 167 | 167 | |
| 168 | 168 | unregister_sja1000dev(dev); |
| 169 | − dev_set_drvdata(&pdev->dev, NULL); | |
| 170 | 169 | |
| 171 | 170 | if (priv->reg_base) |
| 172 | 171 | iounmap(priv->reg_base); |
| @@ -161,7 +161,7 @@ static void slc_bump(struct slcan *sl) · 160 unmodified lines | ||
| 161 | 161 | |
| 162 | 162 | sl->rbuff[dlc_pos] = 0; /* terminate can_id string */ |
| 163 | 163 | |
| 164 | − if (strict_strtoul(sl->rbuff+1, 16, &ultmp)) | |
| 164 | + if (kstrtoul(sl->rbuff+1, 16, &ultmp)) | |
| 165 | 165 | return; |
| 166 | 166 | |
| 167 | 167 | cf.can_id = ultmp; |
| @@ -594,7 +594,7 @@ static ssize_t store_output(struct device *dev, struct device_attribute *attr, · 593 unmodified lines | ||
| 594 | 594 | unsigned long val; |
| 595 | 595 | int ret; |
| 596 | 596 | |
| 597 | − ret = strict_strtoul(buf, 0, &val); | |
| 597 | + ret = kstrtoul(buf, 0, &val); | |
| 598 | 598 | if (ret < 0) |
| 599 | 599 | return ret; |
| 600 | 600 | val &= 0xFF; |
| @@ -1001,7 +1001,6 @@ static int ti_hecc_remove(struct platform_device *pdev) · 1000 unmodified lines | ||
| 1001 | 1001 | iounmap(priv->base); |
| 1002 | 1002 | release_mem_region(res->start, resource_size(res)); |
| 1003 | 1003 | free_candev(ndev); |
| 1004 | − platform_set_drvdata(pdev, NULL); | |
| 1005 | 1004 | |
| 1006 | 1005 | return 0; |
| 1007 | 1006 | } |
| @@ -723,25 +723,6 @@ el3_start_xmit(struct sk_buff *skb, struct net_device *dev) · 722 unmodified lines | ||
| 723 | 723 | pr_debug("%s: el3_start_xmit(length = %u) called, status %4.4x.\n", |
| 724 | 724 | dev->name, skb->len, inw(ioaddr + EL3_STATUS)); |
| 725 | 725 | } |
| 726 | −#if 0 | |
| 727 | −#ifndef final_version | |
| 728 | − { /* Error-checking code, delete someday. */ | |
| 729 | − ushort status = inw(ioaddr + EL3_STATUS); | |
| 730 | − if (status & 0x0001 && /* IRQ line active, missed one. */ | |
| 731 | − inw(ioaddr + EL3_STATUS) & 1) { /* Make sure. */ | |
| 732 | − pr_debug("%s: Missed interrupt, status then %04x now %04x" | |
| 733 | − " Tx %2.2x Rx %4.4x.\n", dev->name, status, | |
| 734 | − inw(ioaddr + EL3_STATUS), inb(ioaddr + TX_STATUS), | |
| 735 | − inw(ioaddr + RX_STATUS)); | |
| 736 | − /* Fake interrupt trigger by masking, acknowledge interrupts. */ | |
| 737 | − outw(SetStatusEnb | 0x00, ioaddr + EL3_CMD); | |
| 738 | − outw(AckIntr | IntLatch | TxAvailable | RxEarly | IntReq, | |
| 739 | − ioaddr + EL3_CMD); | |
| 740 | − outw(SetStatusEnb | 0xff, ioaddr + EL3_CMD); | |
| 741 | − } | |
| 742 | − } | |
| 743 | −#endif | |
| 744 | −#endif | |
| 745 | 726 | /* |
| 746 | 727 | * We lock the driver against other processors. Note |
| 747 | 728 | * we don't need to lock versus the IRQ as we suspended |
| @@ -1012,10 +1012,8 @@ static int vortex_init_one(struct pci_dev *pdev, · 1011 unmodified lines | ||
| 1012 | 1012 | goto out; |
| 1013 | 1013 | |
| 1014 | 1014 | rc = pci_request_regions(pdev, DRV_NAME); |
| 1015 | − if (rc < 0) { | |
| 1016 | − pci_disable_device(pdev); | |
| 1017 | − goto out; | |
| 1018 | − } | |
| 1015 | + if (rc < 0) | |
| 1016 | + goto out_disable; | |
| 1019 | 1017 | |
| 1020 | 1018 | unit = vortex_cards_found; |
| 1021 | 1019 | |
| @@ -1032,23 +1030,24 @@ static int vortex_init_one(struct pci_dev *pdev, · 10 unmodified lines | ||
| 1032 | 1030 | if (!ioaddr) /* If mapping fails, fall-back to BAR 0... */ |
| 1033 | 1031 | ioaddr = pci_iomap(pdev, 0, 0); |
| 1034 | 1032 | if (!ioaddr) { |
| 1035 | − pci_release_regions(pdev); | |
| 1036 | − pci_disable_device(pdev); | |
| 1037 | 1033 | rc = -ENOMEM; |
| 1038 | − goto out; | |
| 1034 | + goto out_release; | |
| 1039 | 1035 | } |
| 1040 | 1036 | |
| 1041 | 1037 | rc = vortex_probe1(&pdev->dev, ioaddr, pdev->irq, |
| 1042 | 1038 | ent->driver_data, unit); |
| 1043 | − if (rc < 0) { | |
| 1044 | − pci_iounmap(pdev, ioaddr); | |
| 1045 | − pci_release_regions(pdev); | |
| 1046 | − pci_disable_device(pdev); | |
| 1047 | − goto out; | |
| 1048 | − } | |
| 1039 | + if (rc < 0) | |
| 1040 | + goto out_iounmap; | |
| 1049 | 1041 | |
| 1050 | 1042 | vortex_cards_found++; |
| 1043 | + goto out; | |
| 1051 | 1044 | |
| 1045 | +out_iounmap: | |
| 1046 | + pci_iounmap(pdev, ioaddr); | |
| 1047 | +out_release: | |
| 1048 | + pci_release_regions(pdev); | |
| 1049 | +out_disable: | |
| 1050 | + pci_disable_device(pdev); | |
| 1052 | 1051 | out: |
| 1053 | 1052 | return rc; |
| 1054 | 1053 | } |
| @@ -1473,7 +1472,7 @@ static int vortex_probe1(struct device *gendev, void __iomem *ioaddr, int irq, · 418 unmodified lines | ||
| 1473 | 1472 | |
| 1474 | 1473 | if (pdev) { |
| 1475 | 1474 | vp->pm_state_valid = 1; |
| 1476 | − pci_save_state(VORTEX_PCI(vp)); | |
| 1475 | + pci_save_state(pdev); | |
| 1477 | 1476 | acpi_set_WOL(dev); |
| 1478 | 1477 | } |
| 1479 | 1478 | retval = register_netdev(dev); |
| @@ -3233,21 +3232,20 @@ static void vortex_remove_one(struct pci_dev *pdev) · 1753 unmodified lines | ||
| 3233 | 3232 | vp = netdev_priv(dev); |
| 3234 | 3233 | |
| 3235 | 3234 | if (vp->cb_fn_base) |
| 3236 | − pci_iounmap(VORTEX_PCI(vp), vp->cb_fn_base); | |
| 3235 | + pci_iounmap(pdev, vp->cb_fn_base); | |
| 3237 | 3236 | |
| 3238 | 3237 | unregister_netdev(dev); |
| 3239 | 3238 | |
| 3240 | − if (VORTEX_PCI(vp)) { | |
| 3241 | − pci_set_power_state(VORTEX_PCI(vp), PCI_D0); /* Go active */ | |
| 3242 | − if (vp->pm_state_valid) | |
| 3243 | − pci_restore_state(VORTEX_PCI(vp)); | |
| 3244 | − pci_disable_device(VORTEX_PCI(vp)); | |
| 3245 | − } | |
| 3239 | + pci_set_power_state(pdev, PCI_D0); /* Go active */ | |
| 3240 | + if (vp->pm_state_valid) | |
| 3241 | + pci_restore_state(pdev); | |
| 3242 | + pci_disable_device(pdev); | |
| 3243 | + | |
| 3246 | 3244 | /* Should really use issue_and_wait() here */ |
| 3247 | 3245 | iowrite16(TotalReset | ((vp->drv_flags & EEPROM_RESET) ? 0x04 : 0x14), |
| 3248 | 3246 | vp->ioaddr + EL3_CMD); |
| 3249 | 3247 | |
| 3250 | − pci_iounmap(VORTEX_PCI(vp), vp->ioaddr); | |
| 3248 | + pci_iounmap(pdev, vp->ioaddr); | |
| 3251 | 3249 | |
| 3252 | 3250 | pci_free_consistent(pdev, |
| 3253 | 3251 | sizeof(struct boom_rx_desc) * RX_RING_SIZE |
| @@ -67,7 +67,6 @@ config PCMCIA_3C589 · 66 unmodified lines | ||
| 67 | 67 | config VORTEX |
| 68 | 68 | tristate "3c590/3c900 series (592/595/597) \"Vortex/Boomerang\" support" |
| 69 | 69 | depends on (PCI || EISA) && HAS_IOPORT |
| 70 | − select NET_CORE | |
| 71 | 70 | select MII |
| 72 | 71 | ---help--- |
| 73 | 72 | This option enables driver support for a large number of 10Mbps and |
| @@ -849,7 +849,6 @@ static int ne_drv_remove(struct platform_device *pdev) · 848 unmodified lines | ||
| 849 | 849 | free_irq(dev->irq, dev); |
| 850 | 850 | release_region(dev->base_addr, NE_IO_EXTENT); |
| 851 | 851 | free_netdev(dev); |
| 852 | − platform_set_drvdata(pdev, NULL); | |
| 853 | 852 | } |
| 854 | 853 | return 0; |
| 855 | 854 | } |
| @@ -676,7 +676,7 @@ static int ne2k_pci_resume (struct pci_dev *pdev) · 675 unmodified lines | ||
| 676 | 676 | struct net_device *dev = pci_get_drvdata (pdev); |
| 677 | 677 | int rc; |
| 678 | 678 | |
| 679 | − pci_set_power_state(pdev, 0); | |
| 679 | + pci_set_power_state(pdev, PCI_D0); | |
| 680 | 680 | pci_restore_state(pdev); |
| 681 | 681 | |
| 682 | 682 | rc = pci_enable_device(pdev); |
| @@ -20,9 +20,11 @@ config SUNGEM_PHY · 19 unmodified lines | ||
| 20 | 20 | source "drivers/net/ethernet/3com/Kconfig" |
| 21 | 21 | source "drivers/net/ethernet/adaptec/Kconfig" |
| 22 | 22 | source "drivers/net/ethernet/aeroflex/Kconfig" |
| 23 | +source "drivers/net/ethernet/allwinner/Kconfig" | |
| 23 | 24 | source "drivers/net/ethernet/alteon/Kconfig" |
| 24 | 25 | source "drivers/net/ethernet/amd/Kconfig" |
| 25 | 26 | source "drivers/net/ethernet/apple/Kconfig" |
| 27 | +source "drivers/net/ethernet/arc/Kconfig" | |
| 26 | 28 | source "drivers/net/ethernet/atheros/Kconfig" |
| 27 | 29 | source "drivers/net/ethernet/cadence/Kconfig" |
| 28 | 30 | source "drivers/net/ethernet/adi/Kconfig" |
| @@ -63,7 +65,6 @@ config JME · 34 unmodified lines | ||
| 63 | 65 | tristate "JMicron(R) PCI-Express Gigabit Ethernet support" |
| 64 | 66 | depends on PCI |
| 65 | 67 | select CRC32 |
| 66 | − select NET_CORE | |
| 67 | 68 | select MII |
| 68 | 69 | ---help--- |
| 69 | 70 | This driver supports the PCI-Express gigabit ethernet adapters |
| @@ -95,7 +96,6 @@ config FEALNX · 25 unmodified lines | ||
| 95 | 96 | tristate "Myson MTD-8xx PCI Ethernet support" |
| 96 | 97 | depends on PCI |
| 97 | 98 | select CRC32 |
| 98 | − select NET_CORE | |
| 99 | 99 | select MII |
| 100 | 100 | ---help--- |
| 101 | 101 | Say Y here to support the Myson MTD-800 family of PCI-based Ethernet |
| @@ -106,7 +106,6 @@ source "drivers/net/ethernet/8390/Kconfig" · 4 unmodified lines | ||
| 106 | 106 | |
| 107 | 107 | config NET_NETX |
| 108 | 108 | tristate "NetX Ethernet support" |
| 109 | − select NET_CORE | |
| 110 | 109 | select MII |
| 111 | 110 | depends on ARCH_NETX |
| 112 | 111 | ---help--- |
| @@ -124,7 +123,6 @@ source "drivers/net/ethernet/oki-semi/Kconfig" · 11 unmodified lines | ||
| 124 | 123 | config ETHOC |
| 125 | 124 | tristate "OpenCores 10/100 Mbps Ethernet MAC support" |
| 126 | 125 | depends on HAS_IOMEM && HAS_DMA |
| 127 | − select NET_CORE | |
| 128 | 126 | select MII |
| 129 | 127 | select PHYLIB |
| 130 | 128 | select CRC32 |
| @@ -6,9 +6,11 @@ obj-$(CONFIG_NET_VENDOR_3COM) += 3com/ · 5 unmodified lines | ||
| 6 | 6 | obj-$(CONFIG_NET_VENDOR_8390) += 8390/ |
| 7 | 7 | obj-$(CONFIG_NET_VENDOR_ADAPTEC) += adaptec/ |
| 8 | 8 | obj-$(CONFIG_GRETH) += aeroflex/ |
| 9 | +obj-$(CONFIG_NET_VENDOR_ALLWINNER) += allwinner/ | |
| 9 | 10 | obj-$(CONFIG_NET_VENDOR_ALTEON) += alteon/ |
| 10 | 11 | obj-$(CONFIG_NET_VENDOR_AMD) += amd/ |
| 11 | 12 | obj-$(CONFIG_NET_VENDOR_APPLE) += apple/ |
| 13 | +obj-$(CONFIG_NET_VENDOR_ARC) += arc/ | |
| 12 | 14 | obj-$(CONFIG_NET_VENDOR_ATHEROS) += atheros/ |
| 13 | 15 | obj-$(CONFIG_NET_CADENCE) += cadence/ |
| 14 | 16 | obj-$(CONFIG_NET_BFIN) += adi/ |
| @@ -22,7 +22,6 @@ config ADAPTEC_STARFIRE · 21 unmodified lines | ||
| 22 | 22 | tristate "Adaptec Starfire/DuraLAN support" |
| 23 | 23 | depends on PCI |
| 24 | 24 | select CRC32 |
| 25 | − select NET_CORE | |
| 26 | 25 | select MII |
| 27 | 26 | ---help--- |
| 28 | 27 | Say Y here if you have an Adaptec Starfire (or DuraLAN) PCI network |
| @@ -23,7 +23,6 @@ config BFIN_MAC · 22 unmodified lines | ||
| 23 | 23 | tristate "Blackfin on-chip MAC support" |
| 24 | 24 | depends on (BF516 || BF518 || BF526 || BF527 || BF536 || BF537) |
| 25 | 25 | select CRC32 |
| 26 | − select NET_CORE | |
| 27 | 26 | select MII |
| 28 | 27 | select PHYLIB |
| 29 | 28 | select BFIN_MAC_USE_L1 if DMA_UNCACHED_NONE |
| @@ -1719,7 +1719,6 @@ out_err_mii_probe: · 1718 unmodified lines | ||
| 1719 | 1719 | mdiobus_unregister(lp->mii_bus); |
| 1720 | 1720 | mdiobus_free(lp->mii_bus); |
| 1721 | 1721 | out_err_probe_mac: |
| 1722 | − platform_set_drvdata(pdev, NULL); | |
| 1723 | 1722 | free_netdev(ndev); |
| 1724 | 1723 | |
| 1725 | 1724 | return rc; |
| @@ -1732,8 +1731,6 @@ static int bfin_mac_remove(struct platform_device *pdev) · 6 unmodified lines | ||
| 1732 | 1731 | |
| 1733 | 1732 | bfin_phc_release(lp); |
| 1734 | 1733 | |
| 1735 | − platform_set_drvdata(pdev, NULL); | |
| 1736 | − | |
| 1737 | 1734 | lp->mii_bus->priv = NULL; |
| 1738 | 1735 | |
| 1739 | 1736 | unregister_netdev(ndev); |
| @@ -1868,7 +1865,6 @@ static int bfin_mii_bus_remove(struct platform_device *pdev) · 128 unmodified lines | ||
| 1868 | 1865 | struct bfin_mii_bus_platform_data *mii_bus_pd = |
| 1869 | 1866 | dev_get_platdata(&pdev->dev); |
| 1870 | 1867 | |
| 1871 | − platform_set_drvdata(pdev, NULL); | |
| 1872 | 1868 | mdiobus_unregister(miibus); |
| 1873 | 1869 | kfree(miibus->irq); |
| 1874 | 1870 | mdiobus_free(miibus); |
| @@ -1565,7 +1565,7 @@ error1: · 1564 unmodified lines | ||
| 1565 | 1565 | |
| 1566 | 1566 | static int greth_of_remove(struct platform_device *of_dev) |
| 1567 | 1567 | { |
| 1568 | − struct net_device *ndev = dev_get_drvdata(&of_dev->dev); | |
| 1568 | + struct net_device *ndev = platform_get_drvdata(of_dev); | |
| 1569 | 1569 | struct greth_private *greth = netdev_priv(ndev); |
| 1570 | 1570 | |
| 1571 | 1571 | /* Free descriptor areas */ |
| @@ -1573,8 +1573,6 @@ static int greth_of_remove(struct platform_device *of_dev) · 1 unmodified line | ||
| 1573 | 1573 | |
| 1574 | 1574 | dma_free_coherent(&of_dev->dev, 1024, greth->tx_bd_base, greth->tx_bd_base_phys); |
| 1575 | 1575 | |
| 1576 | − dev_set_drvdata(&of_dev->dev, NULL); | |
| 1577 | − | |
| 1578 | 1576 | if (greth->phy) |
| 1579 | 1577 | phy_stop(greth->phy); |
| 1580 | 1578 | mdiobus_unregister(greth->mdio); |
| @@ -0,0 +1,35 @@ | ||
| 1 | +# | |
| 2 | +# Allwinner device configuration | |
| 3 | +# | |
| 4 | + | |
| 5 | +config NET_VENDOR_ALLWINNER | |
| 6 | + bool "Allwinner devices" | |
| 7 | + default y | |
| 8 | + depends on ARCH_SUNXI | |
| 9 | + ---help--- | |
| 10 | + If you have a network (Ethernet) card belonging to this | |
| 11 | + class, say Y and read the Ethernet-HOWTO, available from | |
| 12 | + <http://www.tldp.org/docs.html#howto>. | |
| 13 | + | |
| 14 | + Note that the answer to this question doesn't directly | |
| 15 | + affect the kernel: saying N will just cause the configurator | |
| 16 | + to skip all the questions about Allwinner cards. If you say Y, | |
| 17 | + you will be asked for your specific card in the following | |
| 18 | + questions. | |
| 19 | + | |
| 20 | +if NET_VENDOR_ALLWINNER | |
| 21 | + | |
| 22 | +config SUN4I_EMAC | |
| 23 | + tristate "Allwinner A10 EMAC support" | |
| 24 | + depends on ARCH_SUNXI | |
| 25 | + depends on OF | |
| 26 | + select CRC32 | |
| 27 | + select MII | |
| 28 | + select PHYLIB | |
| 29 | + ---help--- | |
| 30 | + Support for Allwinner A10 EMAC ethernet driver. | |
| 31 | + | |
| 32 | + To compile this driver as a module, choose M here. The module | |
| 33 | + will be called sun4i-emac. | |
| 34 | + | |
| 35 | +endif # NET_VENDOR_ALLWINNER | |
| @@ -0,0 +1,5 @@ | ||
| 1 | +# | |
| 2 | +# Makefile for the Allwinner device drivers. | |
| 3 | +# | |
| 4 | + | |
| 5 | +obj-$(CONFIG_SUN4I_EMAC) += sun4i-emac.o | |
| @@ -0,0 +1,954 @@ | ||
| 1 | +/* | |
| 2 | + * Allwinner EMAC Fast Ethernet driver for Linux. | |
| 3 | + * | |
| 4 | + * Copyright 2012-2013 Stefan Roese <sr@denx.de> | |
| 5 | + * Copyright 2013 Maxime Ripard <maxime.ripard@free-electrons.com> | |
| 6 | + * | |
| 7 | + * Based on the Linux driver provided by Allwinner: | |
| 8 | + * Copyright (C) 1997 Sten Wang | |
| 9 | + * | |
| 10 | + * This file is licensed under the terms of the GNU General Public | |
| 11 | + * License version 2. This program is licensed "as is" without any | |
| 12 | + * warranty of any kind, whether express or implied. | |
| 13 | + */ | |
| 14 | + | |
| 15 | +#include <linux/clk.h> | |
| 16 | +#include <linux/etherdevice.h> | |
| 17 | +#include <linux/ethtool.h> | |
| 18 | +#include <linux/gpio.h> | |
| 19 | +#include <linux/init.h> | |
| 20 | +#include <linux/interrupt.h> | |
| 21 | +#include <linux/irq.h> | |
| 22 | +#include <linux/mii.h> | |
| 23 | +#include <linux/module.h> | |
| 24 | +#include <linux/netdevice.h> | |
| 25 | +#include <linux/of_address.h> | |
| 26 | +#include <linux/of_irq.h> | |
| 27 | +#include <linux/of_mdio.h> | |
| 28 | +#include <linux/of_net.h> | |
| 29 | +#include <linux/of_platform.h> | |
| 30 | +#include <linux/platform_device.h> | |
| 31 | +#include <linux/phy.h> | |
| 32 | + | |
| 33 | +#include "sun4i-emac.h" | |
| 34 | + | |
| 35 | +#define DRV_NAME "sun4i-emac" | |
| 36 | +#define DRV_VERSION "1.02" | |
| 37 | + | |
| 38 | +#define EMAC_MAX_FRAME_LEN 0x0600 | |
| 39 | + | |
| 40 | +/* Transmit timeout, default 5 seconds. */ | |
| 41 | +static int watchdog = 5000; | |
| 42 | +module_param(watchdog, int, 0400); | |
| 43 | +MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds"); | |
| 44 | + | |
| 45 | +/* EMAC register address locking. | |
| 46 | + * | |
| 47 | + * The EMAC uses an address register to control where data written | |
| 48 | + * to the data register goes. This means that the address register | |
| 49 | + * must be preserved over interrupts or similar calls. | |
| 50 | + * | |
| 51 | + * During interrupt and other critical calls, a spinlock is used to | |
| 52 | + * protect the system, but the calls themselves save the address | |
| 53 | + * in the address register in case they are interrupting another | |
| 54 | + * access to the device. | |
| 55 | + * | |
| 56 | + * For general accesses a lock is provided so that calls which are | |
| 57 | + * allowed to sleep are serialised so that the address register does | |
| 58 | + * not need to be saved. This lock also serves to serialise access | |
| 59 | + * to the EEPROM and PHY access registers which are shared between | |
| 60 | + * these two devices. | |
| 61 | + */ | |
| 62 | + | |
| 63 | +/* The driver supports the original EMACE, and now the two newer | |
| 64 | + * devices, EMACA and EMACB. | |
| 65 | + */ | |
| 66 | + | |
| 67 | +struct emac_board_info { | |
| 68 | + struct clk *clk; | |
| 69 | + struct device *dev; | |
| 70 | + struct platform_device *pdev; | |
| 71 | + spinlock_t lock; | |
| 72 | + void __iomem *membase; | |
| 73 | + u32 msg_enable; | |
| 74 | + struct net_device *ndev; | |
| 75 | + struct sk_buff *skb_last; | |
| 76 | + u16 tx_fifo_stat; | |
| 77 | + | |
| 78 | + int emacrx_completed_flag; | |
| 79 | + | |
| 80 | + struct phy_device *phy_dev; | |
| 81 | + struct device_node *phy_node; | |
| 82 | + unsigned int link; | |
| 83 | + unsigned int speed; | |
| 84 | + unsigned int duplex; | |
| 85 | + | |
| 86 | + phy_interface_t phy_interface; | |
| 87 | +}; | |
| 88 | + | |
| 89 | +static void emac_update_speed(struct net_device *dev) | |
| 90 | +{ | |
| 91 | + struct emac_board_info *db = netdev_priv(dev); | |
| 92 | + unsigned int reg_val; | |
| 93 | + | |
| 94 | + /* set EMAC SPEED, depend on PHY */ | |
| 95 | + reg_val = readl(db->membase + EMAC_MAC_SUPP_REG); | |
| 96 | + reg_val &= ~(0x1 << 8); | |
| 97 | + if (db->speed == SPEED_100) | |
| 98 | + reg_val |= 1 << 8; | |
| 99 | + writel(reg_val, db->membase + EMAC_MAC_SUPP_REG); | |
| 100 | +} | |
| 101 | + | |
| 102 | +static void emac_update_duplex(struct net_device *dev) | |
| 103 | +{ | |
| 104 | + struct emac_board_info *db = netdev_priv(dev); | |
| 105 | + unsigned int reg_val; | |
| 106 | + | |
| 107 | + /* set duplex depend on phy */ | |
| 108 | + reg_val = readl(db->membase + EMAC_MAC_CTL1_REG); | |
| 109 | + reg_val &= ~EMAC_MAC_CTL1_DUPLEX_EN; | |
| 110 | + if (db->duplex) | |
| 111 | + reg_val |= EMAC_MAC_CTL1_DUPLEX_EN; | |
| 112 | + writel(reg_val, db->membase + EMAC_MAC_CTL1_REG); | |
| 113 | +} | |
| 114 | + | |
| 115 | +static void emac_handle_link_change(struct net_device *dev) | |
| 116 | +{ | |
| 117 | + struct emac_board_info *db = netdev_priv(dev); | |
| 118 | + struct phy_device *phydev = db->phy_dev; | |
| 119 | + unsigned long flags; | |
| 120 | + int status_change = 0; | |
| 121 | + | |
| 122 | + if (phydev->link) { | |
| 123 | + if (db->speed != phydev->speed) { | |
| 124 | + spin_lock_irqsave(&db->lock, flags); | |
| 125 | + db->speed = phydev->speed; | |
| 126 | + emac_update_speed(dev); | |
| 127 | + spin_unlock_irqrestore(&db->lock, flags); | |
| 128 | + status_change = 1; | |
| 129 | + } | |
| 130 | + | |
| 131 | + if (db->duplex != phydev->duplex) { | |
| 132 | + spin_lock_irqsave(&db->lock, flags); | |
| 133 | + db->duplex = phydev->duplex; | |
| 134 | + emac_update_duplex(dev); | |
| 135 | + spin_unlock_irqrestore(&db->lock, flags); | |
| 136 | + status_change = 1; | |
| 137 | + } | |
| 138 | + } | |
| 139 | + | |
| 140 | + if (phydev->link != db->link) { | |
| 141 | + if (!phydev->link) { | |
| 142 | + db->speed = 0; | |
| 143 | + db->duplex = -1; | |
| 144 | + } | |
| 145 | + db->link = phydev->link; | |
| 146 | + | |
| 147 | + status_change = 1; | |
| 148 | + } | |
| 149 | + | |
| 150 | + if (status_change) | |
| 151 | + phy_print_status(phydev); | |
| 152 | +} | |
| 153 | + | |
| 154 | +static int emac_mdio_probe(struct net_device *dev) | |
| 155 | +{ | |
| 156 | + struct emac_board_info *db = netdev_priv(dev); | |
| 157 | + | |
| 158 | + /* to-do: PHY interrupts are currently not supported */ | |
| 159 | + | |
| 160 | + /* attach the mac to the phy */ | |
| 161 | + db->phy_dev = of_phy_connect(db->ndev, db->phy_node, | |
| 162 | + &emac_handle_link_change, 0, | |
| 163 | + db->phy_interface); | |
| 164 | + if (!db->phy_dev) { | |
| 165 | + netdev_err(db->ndev, "could not find the PHY\n"); | |
| 166 | + return -ENODEV; | |
| 167 | + } | |
| 168 | + | |
| 169 | + /* mask with MAC supported features */ | |
| 170 | + db->phy_dev->supported &= PHY_BASIC_FEATURES; | |
| 171 | + db->phy_dev->advertising = db->phy_dev->supported; | |
| 172 | + | |
| 173 | + db->link = 0; | |
| 174 | + db->speed = 0; | |
| 175 | + db->duplex = -1; | |
| 176 | + | |
| 177 | + return 0; | |
| 178 | +} | |
| 179 | + | |
| 180 | +static void emac_mdio_remove(struct net_device *dev) | |
| 181 | +{ | |
| 182 | + struct emac_board_info *db = netdev_priv(dev); | |
| 183 | + | |
| 184 | + phy_disconnect(db->phy_dev); | |
| 185 | + db->phy_dev = NULL; | |
| 186 | +} | |
| 187 | + | |
| 188 | +static void emac_reset(struct emac_board_info *db) | |
| 189 | +{ | |
| 190 | + dev_dbg(db->dev, "resetting device\n"); | |
| 191 | + | |
| 192 | + /* RESET device */ | |
| 193 | + writel(0, db->membase + EMAC_CTL_REG); | |
| 194 | + udelay(200); | |
| 195 | + writel(EMAC_CTL_RESET, db->membase + EMAC_CTL_REG); | |
| 196 | + udelay(200); | |
| 197 | +} | |
| 198 | + | |
| 199 | +static void emac_outblk_32bit(void __iomem *reg, void *data, int count) | |
| 200 | +{ | |
| 201 | + writesl(reg, data, round_up(count, 4) / 4); | |
| 202 | +} | |
| 203 | + | |
| 204 | +static void emac_inblk_32bit(void __iomem *reg, void *data, int count) | |
| 205 | +{ | |
| 206 | + readsl(reg, data, round_up(count, 4) / 4); | |
| 207 | +} | |
| 208 | + | |
| 209 | +static int emac_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |
| 210 | +{ | |
| 211 | + struct emac_board_info *dm = netdev_priv(dev); | |
| 212 | + struct phy_device *phydev = dm->phy_dev; | |
| 213 | + | |
| 214 | + if (!netif_running(dev)) | |
| 215 | + return -EINVAL; | |
| 216 | + | |
| 217 | + if (!phydev) | |
| 218 | + return -ENODEV; | |
| 219 | + | |
| 220 | + return phy_mii_ioctl(phydev, rq, cmd); | |
| 221 | +} | |
| 222 | + | |
| 223 | +/* ethtool ops */ | |
| 224 | +static void emac_get_drvinfo(struct net_device *dev, | |
| 225 | + struct ethtool_drvinfo *info) | |
| 226 | +{ | |
| 227 | + strlcpy(info->driver, DRV_NAME, sizeof(DRV_NAME)); | |
| 228 | + strlcpy(info->version, DRV_VERSION, sizeof(DRV_VERSION)); | |
| 229 | + strlcpy(info->bus_info, dev_name(&dev->dev), sizeof(info->bus_info)); | |
| 230 | +} | |
| 231 | + | |
| 232 | +static int emac_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |
| 233 | +{ | |
| 234 | + struct emac_board_info *dm = netdev_priv(dev); | |
| 235 | + struct phy_device *phydev = dm->phy_dev; | |
| 236 | + | |
| 237 | + if (!phydev) | |
| 238 | + return -ENODEV; | |
| 239 | + | |
| 240 | + return phy_ethtool_gset(phydev, cmd); | |
| 241 | +} | |
| 242 | + | |
| 243 | +static int emac_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |
| 244 | +{ | |
| 245 | + struct emac_board_info *dm = netdev_priv(dev); | |
| 246 | + struct phy_device *phydev = dm->phy_dev; | |
| 247 | + | |
| 248 | + if (!phydev) | |
| 249 | + return -ENODEV; | |
| 250 | + | |
| 251 | + return phy_ethtool_sset(phydev, cmd); | |
| 252 | +} | |
| 253 | + | |
| 254 | +static const struct ethtool_ops emac_ethtool_ops = { | |
| 255 | + .get_drvinfo = emac_get_drvinfo, | |
| 256 | + .get_settings = emac_get_settings, | |
| 257 | + .set_settings = emac_set_settings, | |
| 258 | + .get_link = ethtool_op_get_link, | |
| 259 | +}; | |
| 260 | + | |
| 261 | +static unsigned int emac_setup(struct net_device *ndev) | |
| 262 | +{ | |
| 263 | + struct emac_board_info *db = netdev_priv(ndev); | |
| 264 | + unsigned int reg_val; | |
| 265 | + | |
| 266 | + /* set up TX */ | |
| 267 | + reg_val = readl(db->membase + EMAC_TX_MODE_REG); | |
| 268 | + | |
| 269 | + writel(reg_val | EMAC_TX_MODE_ABORTED_FRAME_EN, | |
| 270 | + db->membase + EMAC_TX_MODE_REG); | |
| 271 | + | |
| 272 | + /* set up RX */ | |
| 273 | + reg_val = readl(db->membase + EMAC_RX_CTL_REG); | |
| 274 | + | |
| 275 | + writel(reg_val | EMAC_RX_CTL_PASS_LEN_OOR_EN | | |
| 276 | + EMAC_RX_CTL_ACCEPT_UNICAST_EN | EMAC_RX_CTL_DA_FILTER_EN | | |
| 277 | + EMAC_RX_CTL_ACCEPT_MULTICAST_EN | | |
| 278 | + EMAC_RX_CTL_ACCEPT_BROADCAST_EN, | |
| 279 | + db->membase + EMAC_RX_CTL_REG); | |
| 280 | + | |
| 281 | + /* set MAC */ | |
| 282 | + /* set MAC CTL0 */ | |
| 283 | + reg_val = readl(db->membase + EMAC_MAC_CTL0_REG); | |
| 284 | + writel(reg_val | EMAC_MAC_CTL0_RX_FLOW_CTL_EN | | |
| 285 | + EMAC_MAC_CTL0_TX_FLOW_CTL_EN, | |
| 286 | + db->membase + EMAC_MAC_CTL0_REG); | |
| 287 | + | |
| 288 | + /* set MAC CTL1 */ | |
| 289 | + reg_val = readl(db->membase + EMAC_MAC_CTL1_REG); | |
| 290 | + reg_val |= EMAC_MAC_CTL1_LEN_CHECK_EN; | |
| 291 | + reg_val |= EMAC_MAC_CTL1_CRC_EN; | |
| 292 | + reg_val |= EMAC_MAC_CTL1_PAD_EN; | |
| 293 | + writel(reg_val, db->membase + EMAC_MAC_CTL1_REG); | |
| 294 | + | |
| 295 | + /* set up IPGT */ | |
| 296 | + writel(EMAC_MAC_IPGT_FULL_DUPLEX, db->membase + EMAC_MAC_IPGT_REG); | |
| 297 | + | |
| 298 | + /* set up IPGR */ | |
| 299 | + writel((EMAC_MAC_IPGR_IPG1 << 8) | EMAC_MAC_IPGR_IPG2, | |
| 300 | + db->membase + EMAC_MAC_IPGR_REG); | |
| 301 | + | |
| 302 | + /* set up Collison window */ | |
| 303 | + writel((EMAC_MAC_CLRT_COLLISION_WINDOW << 8) | EMAC_MAC_CLRT_RM, | |
| 304 | + db->membase + EMAC_MAC_CLRT_REG); | |
| 305 | + | |
| 306 | + /* set up Max Frame Length */ | |
| 307 | + writel(EMAC_MAX_FRAME_LEN, | |
| 308 | + db->membase + EMAC_MAC_MAXF_REG); | |
| 309 | + | |
| 310 | + return 0; | |
| 311 | +} | |
| 312 | + | |
| 313 | +static unsigned int emac_powerup(struct net_device *ndev) | |
| 314 | +{ | |
| 315 | + struct emac_board_info *db = netdev_priv(ndev); | |
| 316 | + unsigned int reg_val; | |
| 317 | + | |
| 318 | + /* initial EMAC */ | |
| 319 | + /* flush RX FIFO */ | |
| 320 | + reg_val = readl(db->membase + EMAC_RX_CTL_REG); | |
| 321 | + reg_val |= 0x8; | |
| 322 | + writel(reg_val, db->membase + EMAC_RX_CTL_REG); | |
| 323 | + udelay(1); | |
| 324 | + | |
| 325 | + /* initial MAC */ | |
| 326 | + /* soft reset MAC */ | |
| 327 | + reg_val = readl(db->membase + EMAC_MAC_CTL0_REG); | |
| 328 | + reg_val &= ~EMAC_MAC_CTL0_SOFT_RESET; | |
| 329 | + writel(reg_val, db->membase + EMAC_MAC_CTL0_REG); | |
| 330 | + | |
| 331 | + /* set MII clock */ | |
| 332 | + reg_val = readl(db->membase + EMAC_MAC_MCFG_REG); | |
| 333 | + reg_val &= (~(0xf << 2)); | |
| 334 | + reg_val |= (0xD << 2); | |
| 335 | + writel(reg_val, db->membase + EMAC_MAC_MCFG_REG); | |
| 336 | + | |
| 337 | + /* clear RX counter */ | |
| 338 | + writel(0x0, db->membase + EMAC_RX_FBC_REG); | |
| 339 | + | |
| 340 | + /* disable all interrupt and clear interrupt status */ | |
| 341 | + writel(0, db->membase + EMAC_INT_CTL_REG); | |
| 342 | + reg_val = readl(db->membase + EMAC_INT_STA_REG); | |
| 343 | + writel(reg_val, db->membase + EMAC_INT_STA_REG); | |
| 344 | + | |
| 345 | + udelay(1); | |
| 346 | + | |
| 347 | + /* set up EMAC */ | |
| 348 | + emac_setup(ndev); | |
| 349 | + | |
| 350 | + /* set mac_address to chip */ | |
| 351 | + writel(ndev->dev_addr[0] << 16 | ndev->dev_addr[1] << 8 | ndev-> | |
| 352 | + dev_addr[2], db->membase + EMAC_MAC_A1_REG); | |
| 353 | + writel(ndev->dev_addr[3] << 16 | ndev->dev_addr[4] << 8 | ndev-> | |
| 354 | + dev_addr[5], db->membase + EMAC_MAC_A0_REG); | |
| 355 | + | |
| 356 | + mdelay(1); | |
| 357 | + | |
| 358 | + return 0; | |
| 359 | +} | |
| 360 | + | |
| 361 | +static int emac_set_mac_address(struct net_device *dev, void *p) | |
| 362 | +{ | |
| 363 | + struct sockaddr *addr = p; | |
| 364 | + struct emac_board_info *db = netdev_priv(dev); | |
| 365 | + | |
| 366 | + if (netif_running(dev)) | |
| 367 | + return -EBUSY; | |
| 368 | + | |
| 369 | + memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN); | |
| 370 | + | |
| 371 | + writel(dev->dev_addr[0] << 16 | dev->dev_addr[1] << 8 | dev-> | |
| 372 | + dev_addr[2], db->membase + EMAC_MAC_A1_REG); | |
| 373 | + writel(dev->dev_addr[3] << 16 | dev->dev_addr[4] << 8 | dev-> | |
| 374 | + dev_addr[5], db->membase + EMAC_MAC_A0_REG); | |
| 375 | + | |
| 376 | + return 0; | |
| 377 | +} | |
| 378 | + | |
| 379 | +/* Initialize emac board */ | |
| 380 | +static void emac_init_device(struct net_device *dev) | |
| 381 | +{ | |
| 382 | + struct emac_board_info *db = netdev_priv(dev); | |
| 383 | + unsigned long flags; | |
| 384 | + unsigned int reg_val; | |
| 385 | + | |
| 386 | + spin_lock_irqsave(&db->lock, flags); | |
| 387 | + | |
| 388 | + emac_update_speed(dev); | |
| 389 | + emac_update_duplex(dev); | |
| 390 | + | |
| 391 | + /* enable RX/TX */ | |
| 392 | + reg_val = readl(db->membase + EMAC_CTL_REG); | |
| 393 | + writel(reg_val | EMAC_CTL_RESET | EMAC_CTL_TX_EN | EMAC_CTL_RX_EN, | |
| 394 | + db->membase + EMAC_CTL_REG); | |
| 395 | + | |
| 396 | + /* enable RX/TX0/RX Hlevel interrup */ | |
| 397 | + reg_val = readl(db->membase + EMAC_INT_CTL_REG); | |
| 398 | + reg_val |= (0xf << 0) | (0x01 << 8); | |
| 399 | + writel(reg_val, db->membase + EMAC_INT_CTL_REG); | |
| 400 | + | |
| 401 | + spin_unlock_irqrestore(&db->lock, flags); | |
| 402 | +} | |
| 403 | + | |
| 404 | +/* Our watchdog timed out. Called by the networking layer */ | |
| 405 | +static void emac_timeout(struct net_device *dev) | |
| 406 | +{ | |
| 407 | + struct emac_board_info *db = netdev_priv(dev); | |
| 408 | + unsigned long flags; | |
| 409 | + | |
| 410 | + if (netif_msg_timer(db)) | |
| 411 | + dev_err(db->dev, "tx time out.\n"); | |
| 412 | + | |
| 413 | + /* Save previous register address */ | |
| 414 | + spin_lock_irqsave(&db->lock, flags); | |
| 415 | + | |
| 416 | + netif_stop_queue(dev); | |
| 417 | + emac_reset(db); | |
| 418 | + emac_init_device(dev); | |
| 419 | + /* We can accept TX packets again */ | |
| 420 | + dev->trans_start = jiffies; | |
| 421 | + netif_wake_queue(dev); | |
| 422 | + | |
| 423 | + /* Restore previous register address */ | |
| 424 | + spin_unlock_irqrestore(&db->lock, flags); | |
| 425 | +} | |
| 426 | + | |
| 427 | +/* Hardware start transmission. | |
| 428 | + * Send a packet to media from the upper layer. | |
| 429 | + */ | |
| 430 | +static int emac_start_xmit(struct sk_buff *skb, struct net_device *dev) | |
| 431 | +{ | |
| 432 | + struct emac_board_info *db = netdev_priv(dev); | |
| 433 | + unsigned long channel; | |
| 434 | + unsigned long flags; | |
| 435 | + | |
| 436 | + channel = db->tx_fifo_stat & 3; | |
| 437 | + if (channel == 3) | |
| 438 | + return 1; | |
| 439 | + | |
| 440 | + channel = (channel == 1 ? 1 : 0); | |
| 441 | + | |
| 442 | + spin_lock_irqsave(&db->lock, flags); | |
| 443 | + | |
| 444 | + writel(channel, db->membase + EMAC_TX_INS_REG); | |
| 445 | + | |
| 446 | + emac_outblk_32bit(db->membase + EMAC_TX_IO_DATA_REG, | |
| 447 | + skb->data, skb->len); | |
| 448 | + dev->stats.tx_bytes += skb->len; | |
| 449 | + | |
| 450 | + db->tx_fifo_stat |= 1 << channel; | |
| 451 | + /* TX control: First packet immediately send, second packet queue */ | |
| 452 | + if (channel == 0) { | |
| 453 | + /* set TX len */ | |
| 454 | + writel(skb->len, db->membase + EMAC_TX_PL0_REG); | |
| 455 | + /* start translate from fifo to phy */ | |
| 456 | + writel(readl(db->membase + EMAC_TX_CTL0_REG) | 1, | |
| 457 | + db->membase + EMAC_TX_CTL0_REG); | |
| 458 | + | |
| 459 | + /* save the time stamp */ | |
| 460 | + dev->trans_start = jiffies; | |
| 461 | + } else if (channel == 1) { | |
| 462 | + /* set TX len */ | |
| 463 | + writel(skb->len, db->membase + EMAC_TX_PL1_REG); | |
| 464 | + /* start translate from fifo to phy */ | |
| 465 | + writel(readl(db->membase + EMAC_TX_CTL1_REG) | 1, | |
| 466 | + db->membase + EMAC_TX_CTL1_REG); | |
| 467 | + | |
| 468 | + /* save the time stamp */ | |
| 469 | + dev->trans_start = jiffies; | |
| 470 | + } | |
| 471 | + | |
| 472 | + if ((db->tx_fifo_stat & 3) == 3) { | |
| 473 | + /* Second packet */ | |
| 474 | + netif_stop_queue(dev); | |
| 475 | + } | |
| 476 | + | |
| 477 | + spin_unlock_irqrestore(&db->lock, flags); | |
| 478 | + | |
| 479 | + /* free this SKB */ | |
| 480 | + dev_kfree_skb(skb); | |
| 481 | + | |
| 482 | + return NETDEV_TX_OK; | |
| 483 | +} | |
| 484 | + | |
| 485 | +/* EMAC interrupt handler | |
| 486 | + * receive the packet to upper layer, free the transmitted packet | |
| 487 | + */ | |
| 488 | +static void emac_tx_done(struct net_device *dev, struct emac_board_info *db, | |
| 489 | + unsigned int tx_status) | |
| 490 | +{ | |
| 491 | + /* One packet sent complete */ | |
| 492 | + db->tx_fifo_stat &= ~(tx_status & 3); | |
| 493 | + if (3 == (tx_status & 3)) | |
| 494 | + dev->stats.tx_packets += 2; | |
| 495 | + else | |
| 496 | + dev->stats.tx_packets++; | |
| 497 | + | |
| 498 | + if (netif_msg_tx_done(db)) | |
| 499 | + dev_dbg(db->dev, "tx done, NSR %02x\n", tx_status); | |
| 500 | + | |
| 501 | + netif_wake_queue(dev); | |
| 502 | +} | |
| 503 | + | |
| 504 | +/* Received a packet and pass to upper layer | |
| 505 | + */ | |
| 506 | +static void emac_rx(struct net_device *dev) | |
| 507 | +{ | |
| 508 | + struct emac_board_info *db = netdev_priv(dev); | |
| 509 | + struct sk_buff *skb; | |
| 510 | + u8 *rdptr; | |
| 511 | + bool good_packet; | |
| 512 | + static int rxlen_last; | |
| 513 | + unsigned int reg_val; | |
| 514 | + u32 rxhdr, rxstatus, rxcount, rxlen; | |
| 515 | + | |
| 516 | + /* Check packet ready or not */ | |
| 517 | + while (1) { | |
| 518 | + /* race warning: the first packet might arrive with | |
| 519 | + * the interrupts disabled, but the second will fix | |
| 520 | + * it | |
| 521 | + */ | |
| 522 | + rxcount = readl(db->membase + EMAC_RX_FBC_REG); | |
| 523 | + | |
| 524 | + if (netif_msg_rx_status(db)) | |
| 525 | + dev_dbg(db->dev, "RXCount: %x\n", rxcount); | |
| 526 | + | |
| 527 | + if ((db->skb_last != NULL) && (rxlen_last > 0)) { | |
| 528 | + dev->stats.rx_bytes += rxlen_last; | |
| 529 | + | |
| 530 | + /* Pass to upper layer */ | |
| 531 | + db->skb_last->protocol = eth_type_trans(db->skb_last, | |
| 532 | + dev); | |
| 533 | + netif_rx(db->skb_last); | |
| 534 | + dev->stats.rx_packets++; | |
| 535 | + db->skb_last = NULL; | |
| 536 | + rxlen_last = 0; | |
| 537 | + | |
| 538 | + reg_val = readl(db->membase + EMAC_RX_CTL_REG); | |
| 539 | + reg_val &= ~EMAC_RX_CTL_DMA_EN; | |
| 540 | + writel(reg_val, db->membase + EMAC_RX_CTL_REG); | |
| 541 | + } | |
| 542 | + | |
| 543 | + if (!rxcount) { | |
| 544 | + db->emacrx_completed_flag = 1; | |
| 545 | + reg_val = readl(db->membase + EMAC_INT_CTL_REG); | |
| 546 | + reg_val |= (0xf << 0) | (0x01 << 8); | |
| 547 | + writel(reg_val, db->membase + EMAC_INT_CTL_REG); | |
| 548 | + | |
| 549 | + /* had one stuck? */ | |
| 550 | + rxcount = readl(db->membase + EMAC_RX_FBC_REG); | |
| 551 | + if (!rxcount) | |
| 552 | + return; | |
| 553 | + } | |
| 554 | + | |
| 555 | + reg_val = readl(db->membase + EMAC_RX_IO_DATA_REG); | |
| 556 | + if (netif_msg_rx_status(db)) | |
| 557 | + dev_dbg(db->dev, "receive header: %x\n", reg_val); | |
| 558 | + if (reg_val != EMAC_UNDOCUMENTED_MAGIC) { | |
| 559 | + /* disable RX */ | |
| 560 | + reg_val = readl(db->membase + EMAC_CTL_REG); | |
| 561 | + writel(reg_val & ~EMAC_CTL_RX_EN, | |
| 562 | + db->membase + EMAC_CTL_REG); | |
| 563 | + | |
| 564 | + /* Flush RX FIFO */ | |
| 565 | + reg_val = readl(db->membase + EMAC_RX_CTL_REG); | |
| 566 | + writel(reg_val | (1 << 3), | |
| 567 | + db->membase + EMAC_RX_CTL_REG); | |
| 568 | + | |
| 569 | + do { | |
| 570 | + reg_val = readl(db->membase + EMAC_RX_CTL_REG); | |
| 571 | + } while (reg_val & (1 << 3)); | |
| 572 | + | |
| 573 | + /* enable RX */ | |
| 574 | + reg_val = readl(db->membase + EMAC_CTL_REG); | |
| 575 | + writel(reg_val | EMAC_CTL_RX_EN, | |
| 576 | + db->membase + EMAC_CTL_REG); | |
| 577 | + reg_val = readl(db->membase + EMAC_INT_CTL_REG); | |
| 578 | + reg_val |= (0xf << 0) | (0x01 << 8); | |
| 579 | + writel(reg_val, db->membase + EMAC_INT_CTL_REG); | |
| 580 | + | |
| 581 | + db->emacrx_completed_flag = 1; | |
| 582 | + | |
| 583 | + return; | |
| 584 | + } | |
| 585 | + | |
| 586 | + /* A packet ready now & Get status/length */ | |
| 587 | + good_packet = true; | |
| 588 | + | |
| 589 | + emac_inblk_32bit(db->membase + EMAC_RX_IO_DATA_REG, | |
| 590 | + &rxhdr, sizeof(rxhdr)); | |
| 591 | + | |
| 592 | + if (netif_msg_rx_status(db)) | |
| 593 | + dev_dbg(db->dev, "rxhdr: %x\n", *((int *)(&rxhdr))); | |
| 594 | + | |
| 595 | + rxlen = EMAC_RX_IO_DATA_LEN(rxhdr); | |
| 596 | + rxstatus = EMAC_RX_IO_DATA_STATUS(rxhdr); | |
| 597 | + | |
| 598 | + if (netif_msg_rx_status(db)) | |
| 599 | + dev_dbg(db->dev, "RX: status %02x, length %04x\n", | |
| 600 | + rxstatus, rxlen); | |
| 601 | + | |
| 602 | + /* Packet Status check */ | |
| 603 | + if (rxlen < 0x40) { | |
| 604 | + good_packet = false; | |
| 605 | + if (netif_msg_rx_err(db)) | |
| 606 | + dev_dbg(db->dev, "RX: Bad Packet (runt)\n"); | |
| 607 | + } | |
| 608 | + | |
| 609 | + if (unlikely(!(rxstatus & EMAC_RX_IO_DATA_STATUS_OK))) { | |
| 610 | + good_packet = false; | |
| 611 | + | |
| 612 | + if (rxstatus & EMAC_RX_IO_DATA_STATUS_CRC_ERR) { | |
| 613 | + if (netif_msg_rx_err(db)) | |
| 614 | + dev_dbg(db->dev, "crc error\n"); | |
| 615 | + dev->stats.rx_crc_errors++; | |
| 616 | + } | |
| 617 | + | |
| 618 | + if (rxstatus & EMAC_RX_IO_DATA_STATUS_LEN_ERR) { | |
| 619 | + if (netif_msg_rx_err(db)) | |
| 620 | + dev_dbg(db->dev, "length error\n"); | |
| 621 | + dev->stats.rx_length_errors++; | |
| 622 | + } | |
| 623 | + } | |
| 624 | + | |
| 625 | + /* Move data from EMAC */ | |
| 626 | + skb = dev_alloc_skb(rxlen + 4); | |
| 627 | + if (good_packet && skb) { | |
| 628 | + skb_reserve(skb, 2); | |
| 629 | + rdptr = (u8 *) skb_put(skb, rxlen - 4); | |
| 630 | + | |
| 631 | + /* Read received packet from RX SRAM */ | |
| 632 | + if (netif_msg_rx_status(db)) | |
| 633 | + dev_dbg(db->dev, "RxLen %x\n", rxlen); | |
| 634 | + | |
| 635 | + emac_inblk_32bit(db->membase + EMAC_RX_IO_DATA_REG, | |
| 636 | + rdptr, rxlen); | |
| 637 | + dev->stats.rx_bytes += rxlen; | |
| 638 | + | |
| 639 | + /* Pass to upper layer */ | |
| 640 | + skb->protocol = eth_type_trans(skb, dev); | |
| 641 | + netif_rx(skb); | |
| 642 | + dev->stats.rx_packets++; | |
| 643 | + } | |
| 644 | + } | |
| 645 | +} | |
| 646 | + | |
| 647 | +static irqreturn_t emac_interrupt(int irq, void *dev_id) | |
| 648 | +{ | |
| 649 | + struct net_device *dev = dev_id; | |
| 650 | + struct emac_board_info *db = netdev_priv(dev); | |
| 651 | + int int_status; | |
| 652 | + unsigned long flags; | |
| 653 | + unsigned int reg_val; | |
| 654 | + | |
| 655 | + /* A real interrupt coming */ | |
| 656 | + | |
| 657 | + /* holders of db->lock must always block IRQs */ | |
| 658 | + spin_lock_irqsave(&db->lock, flags); | |
| 659 | + | |
| 660 | + /* Disable all interrupts */ | |
| 661 | + writel(0, db->membase + EMAC_INT_CTL_REG); | |
| 662 | + | |
| 663 | + /* Got EMAC interrupt status */ | |
| 664 | + /* Got ISR */ | |
| 665 | + int_status = readl(db->membase + EMAC_INT_STA_REG); | |
| 666 | + /* Clear ISR status */ | |
| 667 | + writel(int_status, db->membase + EMAC_INT_STA_REG); | |
| 668 | + | |
| 669 | + if (netif_msg_intr(db)) | |
| 670 | + dev_dbg(db->dev, "emac interrupt %02x\n", int_status); | |
| 671 | + | |
| 672 | + /* Received the coming packet */ | |
| 673 | + if ((int_status & 0x100) && (db->emacrx_completed_flag == 1)) { | |
| 674 | + /* carrier lost */ | |
| 675 | + db->emacrx_completed_flag = 0; | |
| 676 | + emac_rx(dev); | |
| 677 | + } | |
| 678 | + | |
| 679 | + /* Transmit Interrupt check */ | |
| 680 | + if (int_status & (0x01 | 0x02)) | |
| 681 | + emac_tx_done(dev, db, int_status); | |
| 682 | + | |
| 683 | + if (int_status & (0x04 | 0x08)) | |
| 684 | + netdev_info(dev, " ab : %x\n", int_status); | |
| 685 | + | |
| 686 | + /* Re-enable interrupt mask */ | |
| 687 | + if (db->emacrx_completed_flag == 1) { | |
| 688 | + reg_val = readl(db->membase + EMAC_INT_CTL_REG); | |
| 689 | + reg_val |= (0xf << 0) | (0x01 << 8); | |
| 690 | + writel(reg_val, db->membase + EMAC_INT_CTL_REG); | |
| 691 | + } | |
| 692 | + spin_unlock_irqrestore(&db->lock, flags); | |
| 693 | + | |
| 694 | + return IRQ_HANDLED; | |
| 695 | +} | |
| 696 | + | |
| 697 | +#ifdef CONFIG_NET_POLL_CONTROLLER | |
| 698 | +/* | |
| 699 | + * Used by netconsole | |
| 700 | + */ | |
| 701 | +static void emac_poll_controller(struct net_device *dev) | |
| 702 | +{ | |
| 703 | + disable_irq(dev->irq); | |
| 704 | + emac_interrupt(dev->irq, dev); | |
| 705 | + enable_irq(dev->irq); | |
| 706 | +} | |
| 707 | +#endif | |
| 708 | + | |
| 709 | +/* Open the interface. | |
| 710 | + * The interface is opened whenever "ifconfig" actives it. | |
| 711 | + */ | |
| 712 | +static int emac_open(struct net_device *dev) | |
| 713 | +{ | |
| 714 | + struct emac_board_info *db = netdev_priv(dev); | |
| 715 | + int ret; | |
| 716 | + | |
| 717 | + if (netif_msg_ifup(db)) | |
| 718 | + dev_dbg(db->dev, "enabling %s\n", dev->name); | |
| 719 | + | |
| 720 | + if (devm_request_irq(db->dev, dev->irq, &emac_interrupt, | |
| 721 | + 0, dev->name, dev)) | |
| 722 | + return -EAGAIN; | |
| 723 | + | |
| 724 | + /* Initialize EMAC board */ | |
| 725 | + emac_reset(db); | |
| 726 | + emac_init_device(dev); | |
| 727 | + | |
| 728 | + ret = emac_mdio_probe(dev); | |
| 729 | + if (ret < 0) { | |
| 730 | + netdev_err(dev, "cannot probe MDIO bus\n"); | |
| 731 | + return ret; | |
| 732 | + } | |
| 733 | + | |
| 734 | + phy_start(db->phy_dev); | |
| 735 | + netif_start_queue(dev); | |
| 736 | + | |
| 737 | + return 0; | |
| 738 | +} | |
| 739 | + | |
| 740 | +static void emac_shutdown(struct net_device *dev) | |
| 741 | +{ | |
| 742 | + unsigned int reg_val; | |
| 743 | + struct emac_board_info *db = netdev_priv(dev); | |
| 744 | + | |
| 745 | + /* Disable all interrupt */ | |
| 746 | + writel(0, db->membase + EMAC_INT_CTL_REG); | |
| 747 | + | |
| 748 | + /* clear interupt status */ | |
| 749 | + reg_val = readl(db->membase + EMAC_INT_STA_REG); | |
| 750 | + writel(reg_val, db->membase + EMAC_INT_STA_REG); | |
| 751 | + | |
| 752 | + /* Disable RX/TX */ | |
| 753 | + reg_val = readl(db->membase + EMAC_CTL_REG); | |
| 754 | + reg_val &= ~(EMAC_CTL_TX_EN | EMAC_CTL_RX_EN | EMAC_CTL_RESET); | |
| 755 | + writel(reg_val, db->membase + EMAC_CTL_REG); | |
| 756 | +} | |
| 757 | + | |
| 758 | +/* Stop the interface. | |
| 759 | + * The interface is stopped when it is brought. | |
| 760 | + */ | |
| 761 | +static int emac_stop(struct net_device *ndev) | |
| 762 | +{ | |
| 763 | + struct emac_board_info *db = netdev_priv(ndev); | |
| 764 | + | |
| 765 | + if (netif_msg_ifdown(db)) | |
| 766 | + dev_dbg(db->dev, "shutting down %s\n", ndev->name); | |
| 767 | + | |
| 768 | + netif_stop_queue(ndev); | |
| 769 | + netif_carrier_off(ndev); | |
| 770 | + | |
| 771 | + phy_stop(db->phy_dev); | |
| 772 | + | |
| 773 | + emac_mdio_remove(ndev); | |
| 774 | + | |
| 775 | + emac_shutdown(ndev); | |
| 776 | + | |
| 777 | + return 0; | |
| 778 | +} | |
| 779 | + | |
| 780 | +static const struct net_device_ops emac_netdev_ops = { | |
| 781 | + .ndo_open = emac_open, | |
| 782 | + .ndo_stop = emac_stop, | |
| 783 | + .ndo_start_xmit = emac_start_xmit, | |
| 784 | + .ndo_tx_timeout = emac_timeout, | |
| 785 | + .ndo_do_ioctl = emac_ioctl, | |
| 786 | + .ndo_change_mtu = eth_change_mtu, | |
| 787 | + .ndo_validate_addr = eth_validate_addr, | |
| 788 | + .ndo_set_mac_address = emac_set_mac_address, | |
| 789 | +#ifdef CONFIG_NET_POLL_CONTROLLER | |
| 790 | + .ndo_poll_controller = emac_poll_controller, | |
| 791 | +#endif | |
| 792 | +}; | |
| 793 | + | |
| 794 | +/* Search EMAC board, allocate space and register it | |
| 795 | + */ | |
| 796 | +static int emac_probe(struct platform_device *pdev) | |
| 797 | +{ | |
| 798 | + struct device_node *np = pdev->dev.of_node; | |
| 799 | + struct emac_board_info *db; | |
| 800 | + struct net_device *ndev; | |
| 801 | + int ret = 0; | |
| 802 | + const char *mac_addr; | |
| 803 | + | |
| 804 | + ndev = alloc_etherdev(sizeof(struct emac_board_info)); | |
| 805 | + if (!ndev) { | |
| 806 | + dev_err(&pdev->dev, "could not allocate device.\n"); | |
| 807 | + return -ENOMEM; | |
| 808 | + } | |
| 809 | + | |
| 810 | + SET_NETDEV_DEV(ndev, &pdev->dev); | |
| 811 | + | |
| 812 | + db = netdev_priv(ndev); | |
| 813 | + memset(db, 0, sizeof(*db)); | |
| 814 | + | |
| 815 | + db->dev = &pdev->dev; | |
| 816 | + db->ndev = ndev; | |
| 817 | + db->pdev = pdev; | |
| 818 | + | |
| 819 | + spin_lock_init(&db->lock); | |
| 820 | + | |
| 821 | + db->membase = of_iomap(np, 0); | |
| 822 | + if (!db->membase) { | |
| 823 | + dev_err(&pdev->dev, "failed to remap registers\n"); | |
| 824 | + ret = -ENOMEM; | |
| 825 | + goto out; | |
| 826 | + } | |
| 827 | + | |
| 828 | + /* fill in parameters for net-dev structure */ | |
| 829 | + ndev->base_addr = (unsigned long)db->membase; | |
| 830 | + ndev->irq = irq_of_parse_and_map(np, 0); | |
| 831 | + if (ndev->irq == -ENXIO) { | |
| 832 | + netdev_err(ndev, "No irq resource\n"); | |
| 833 | + ret = ndev->irq; | |
| 834 | + goto out; | |
| 835 | + } | |
| 836 | + | |
| 837 | + db->clk = devm_clk_get(&pdev->dev, NULL); | |
| 838 | + if (IS_ERR(db->clk)) | |
| 839 | + goto out; | |
| 840 | + | |
| 841 | + clk_prepare_enable(db->clk); | |
| 842 | + | |
| 843 | + db->phy_node = of_parse_phandle(np, "phy", 0); | |
| 844 | + if (!db->phy_node) { | |
| 845 | + dev_err(&pdev->dev, "no associated PHY\n"); | |
| 846 | + ret = -ENODEV; | |
| 847 | + goto out; | |
| 848 | + } | |
| 849 | + | |
| 850 | + /* Read MAC-address from DT */ | |
| 851 | + mac_addr = of_get_mac_address(np); | |
| 852 | + if (mac_addr) | |
| 853 | + memcpy(ndev->dev_addr, mac_addr, ETH_ALEN); | |
| 854 | + | |
| 855 | + /* Check if the MAC address is valid, if not get a random one */ | |
| 856 | + if (!is_valid_ether_addr(ndev->dev_addr)) { | |
| 857 | + eth_hw_addr_random(ndev); | |
| 858 | + dev_warn(&pdev->dev, "using random MAC address %pM\n", | |
| 859 | + ndev->dev_addr); | |
| 860 | + } | |
| 861 | + | |
| 862 | + db->emacrx_completed_flag = 1; | |
| 863 | + emac_powerup(ndev); | |
| 864 | + emac_reset(db); | |
| 865 | + | |
| 866 | + ether_setup(ndev); | |
| 867 | + | |
| 868 | + ndev->netdev_ops = &emac_netdev_ops; | |
| 869 | + ndev->watchdog_timeo = msecs_to_jiffies(watchdog); | |
| 870 | + ndev->ethtool_ops = &emac_ethtool_ops; | |
| 871 | + | |
| 872 | + platform_set_drvdata(pdev, ndev); | |
| 873 | + | |
| 874 | + /* Carrier starts down, phylib will bring it up */ | |
| 875 | + netif_carrier_off(ndev); | |
| 876 | + | |
| 877 | + ret = register_netdev(ndev); | |
| 878 | + if (ret) { | |
| 879 | + dev_err(&pdev->dev, "Registering netdev failed!\n"); | |
| 880 | + ret = -ENODEV; | |
| 881 | + goto out; | |
| 882 | + } | |
| 883 | + | |
| 884 | + dev_info(&pdev->dev, "%s: at %p, IRQ %d MAC: %pM\n", | |
| 885 | + ndev->name, db->membase, ndev->irq, ndev->dev_addr); | |
| 886 | + | |
| 887 | + return 0; | |
| 888 | + | |
| 889 | +out: | |
| 890 | + dev_err(db->dev, "not found (%d).\n", ret); | |
| 891 | + | |
| 892 | + free_netdev(ndev); | |
| 893 | + | |
| 894 | + return ret; | |
| 895 | +} | |
| 896 | + | |
| 897 | +static int emac_remove(struct platform_device *pdev) | |
| 898 | +{ | |
| 899 | + struct net_device *ndev = platform_get_drvdata(pdev); | |
| 900 | + | |
| 901 | + unregister_netdev(ndev); | |
| 902 | + free_netdev(ndev); | |
| 903 | + | |
| 904 | + dev_dbg(&pdev->dev, "released and freed device\n"); | |
| 905 | + return 0; | |
| 906 | +} | |
| 907 | + | |
| 908 | +static int emac_suspend(struct platform_device *dev, pm_message_t state) | |
| 909 | +{ | |
| 910 | + struct net_device *ndev = platform_get_drvdata(dev); | |
| 911 | + | |
| 912 | + netif_carrier_off(ndev); | |
| 913 | + netif_device_detach(ndev); | |
| 914 | + emac_shutdown(ndev); | |
| 915 | + | |
| 916 | + return 0; | |
| 917 | +} | |
| 918 | + | |
| 919 | +static int emac_resume(struct platform_device *dev) | |
| 920 | +{ | |
| 921 | + struct net_device *ndev = platform_get_drvdata(dev); | |
| 922 | + struct emac_board_info *db = netdev_priv(ndev); | |
| 923 | + | |
| 924 | + emac_reset(db); | |
| 925 | + emac_init_device(ndev); | |
| 926 | + netif_device_attach(ndev); | |
| 927 | + | |
| 928 | + return 0; | |
| 929 | +} | |
| 930 | + | |
| 931 | +static const struct of_device_id emac_of_match[] = { | |
| 932 | + {.compatible = "allwinner,sun4i-emac",}, | |
| 933 | + {}, | |
| 934 | +}; | |
| 935 | + | |
| 936 | +MODULE_DEVICE_TABLE(of, emac_of_match); | |
| 937 | + | |
| 938 | +static struct platform_driver emac_driver = { | |
| 939 | + .driver = { | |
| 940 | + .name = "sun4i-emac", | |
| 941 | + .of_match_table = emac_of_match, | |
| 942 | + }, | |
| 943 | + .probe = emac_probe, | |
| 944 | + .remove = emac_remove, | |
| 945 | + .suspend = emac_suspend, | |
| 946 | + .resume = emac_resume, | |
| 947 | +}; | |
| 948 | + | |
| 949 | +module_platform_driver(emac_driver); | |
| 950 | + | |
| 951 | +MODULE_AUTHOR("Stefan Roese <sr@denx.de>"); | |
| 952 | +MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>"); | |
| 953 | +MODULE_DESCRIPTION("Allwinner A10 emac network driver"); | |
| 954 | +MODULE_LICENSE("GPL"); | |
| @@ -0,0 +1,108 @@ | ||
| 1 | +/* | |
| 2 | + * Allwinner EMAC Fast Ethernet driver for Linux. | |
| 3 | + * | |
| 4 | + * Copyright 2012 Stefan Roese <sr@denx.de> | |
| 5 | + * Copyright 2013 Maxime Ripard <maxime.ripard@free-electrons.com> | |
| 6 | + * | |
| 7 | + * Based on the Linux driver provided by Allwinner: | |
| 8 | + * Copyright (C) 1997 Sten Wang | |
| 9 | + * | |
| 10 | + * This file is licensed under the terms of the GNU General Public | |
| 11 | + * License version 2. This program is licensed "as is" without any | |
| 12 | + * warranty of any kind, whether express or implied. | |
| 13 | + */ | |
| 14 | + | |
| 15 | +#ifndef _SUN4I_EMAC_H_ | |
| 16 | +#define _SUN4I_EMAC_H_ | |
| 17 | + | |
| 18 | +#define EMAC_CTL_REG (0x00) | |
| 19 | +#define EMAC_CTL_RESET (1 << 0) | |
| 20 | +#define EMAC_CTL_TX_EN (1 << 1) | |
| 21 | +#define EMAC_CTL_RX_EN (1 << 2) | |
| 22 | +#define EMAC_TX_MODE_REG (0x04) | |
| 23 | +#define EMAC_TX_MODE_ABORTED_FRAME_EN (1 << 0) | |
| 24 | +#define EMAC_TX_MODE_DMA_EN (1 << 1) | |
| 25 | +#define EMAC_TX_FLOW_REG (0x08) | |
| 26 | +#define EMAC_TX_CTL0_REG (0x0c) | |
| 27 | +#define EMAC_TX_CTL1_REG (0x10) | |
| 28 | +#define EMAC_TX_INS_REG (0x14) | |
| 29 | +#define EMAC_TX_PL0_REG (0x18) | |
| 30 | +#define EMAC_TX_PL1_REG (0x1c) | |
| 31 | +#define EMAC_TX_STA_REG (0x20) | |
| 32 | +#define EMAC_TX_IO_DATA_REG (0x24) | |
| 33 | +#define EMAC_TX_IO_DATA1_REG (0x28) | |
| 34 | +#define EMAC_TX_TSVL0_REG (0x2c) | |
| 35 | +#define EMAC_TX_TSVH0_REG (0x30) | |
| 36 | +#define EMAC_TX_TSVL1_REG (0x34) | |
| 37 | +#define EMAC_TX_TSVH1_REG (0x38) | |
| 38 | +#define EMAC_RX_CTL_REG (0x3c) | |
| 39 | +#define EMAC_RX_CTL_AUTO_DRQ_EN (1 << 1) | |
| 40 | +#define EMAC_RX_CTL_DMA_EN (1 << 2) | |
| 41 | +#define EMAC_RX_CTL_PASS_ALL_EN (1 << 4) | |
| 42 | +#define EMAC_RX_CTL_PASS_CTL_EN (1 << 5) | |
| 43 | +#define EMAC_RX_CTL_PASS_CRC_ERR_EN (1 << 6) | |
| 44 | +#define EMAC_RX_CTL_PASS_LEN_ERR_EN (1 << 7) | |
| 45 | +#define EMAC_RX_CTL_PASS_LEN_OOR_EN (1 << 8) | |
| 46 | +#define EMAC_RX_CTL_ACCEPT_UNICAST_EN (1 << 16) | |
| 47 | +#define EMAC_RX_CTL_DA_FILTER_EN (1 << 17) | |
| 48 | +#define EMAC_RX_CTL_ACCEPT_MULTICAST_EN (1 << 20) | |
| 49 | +#define EMAC_RX_CTL_HASH_FILTER_EN (1 << 21) | |
| 50 | +#define EMAC_RX_CTL_ACCEPT_BROADCAST_EN (1 << 22) | |
| 51 | +#define EMAC_RX_CTL_SA_FILTER_EN (1 << 24) | |
| 52 | +#define EMAC_RX_CTL_SA_FILTER_INVERT_EN (1 << 25) | |
| 53 | +#define EMAC_RX_HASH0_REG (0x40) | |
| 54 | +#define EMAC_RX_HASH1_REG (0x44) | |
| 55 | +#define EMAC_RX_STA_REG (0x48) | |
| 56 | +#define EMAC_RX_IO_DATA_REG (0x4c) | |
| 57 | +#define EMAC_RX_IO_DATA_LEN(x) (x & 0xffff) | |
| 58 | +#define EMAC_RX_IO_DATA_STATUS(x) ((x >> 16) & 0xffff) | |
| 59 | +#define EMAC_RX_IO_DATA_STATUS_CRC_ERR (1 << 4) | |
| 60 | +#define EMAC_RX_IO_DATA_STATUS_LEN_ERR (3 << 5) | |
| 61 | +#define EMAC_RX_IO_DATA_STATUS_OK (1 << 7) | |
| 62 | +#define EMAC_RX_FBC_REG (0x50) | |
| 63 | +#define EMAC_INT_CTL_REG (0x54) | |
| 64 | +#define EMAC_INT_STA_REG (0x58) | |
| 65 | +#define EMAC_MAC_CTL0_REG (0x5c) | |
| 66 | +#define EMAC_MAC_CTL0_RX_FLOW_CTL_EN (1 << 2) | |
| 67 | +#define EMAC_MAC_CTL0_TX_FLOW_CTL_EN (1 << 3) | |
| 68 | +#define EMAC_MAC_CTL0_SOFT_RESET (1 << 15) | |
| 69 | +#define EMAC_MAC_CTL1_REG (0x60) | |
| 70 | +#define EMAC_MAC_CTL1_DUPLEX_EN (1 << 0) | |
| 71 | +#define EMAC_MAC_CTL1_LEN_CHECK_EN (1 << 1) | |
| 72 | +#define EMAC_MAC_CTL1_HUGE_FRAME_EN (1 << 2) | |
| 73 | +#define EMAC_MAC_CTL1_DELAYED_CRC_EN (1 << 3) | |
| 74 | +#define EMAC_MAC_CTL1_CRC_EN (1 << 4) | |
| 75 | +#define EMAC_MAC_CTL1_PAD_EN (1 << 5) | |
| 76 | +#define EMAC_MAC_CTL1_PAD_CRC_EN (1 << 6) | |
| 77 | +#define EMAC_MAC_CTL1_AD_SHORT_FRAME_EN (1 << 7) | |
| 78 | +#define EMAC_MAC_CTL1_BACKOFF_DIS (1 << 12) | |
| 79 | +#define EMAC_MAC_IPGT_REG (0x64) | |
| 80 | +#define EMAC_MAC_IPGT_HALF_DUPLEX (0x12) | |
| 81 | +#define EMAC_MAC_IPGT_FULL_DUPLEX (0x15) | |
| 82 | +#define EMAC_MAC_IPGR_REG (0x68) | |
| 83 | +#define EMAC_MAC_IPGR_IPG1 (0x0c) | |
| 84 | +#define EMAC_MAC_IPGR_IPG2 (0x12) | |
| 85 | +#define EMAC_MAC_CLRT_REG (0x6c) | |
| 86 | +#define EMAC_MAC_CLRT_COLLISION_WINDOW (0x37) | |
| 87 | +#define EMAC_MAC_CLRT_RM (0x0f) | |
| 88 | +#define EMAC_MAC_MAXF_REG (0x70) | |
| 89 | +#define EMAC_MAC_SUPP_REG (0x74) | |
| 90 | +#define EMAC_MAC_TEST_REG (0x78) | |
| 91 | +#define EMAC_MAC_MCFG_REG (0x7c) | |
| 92 | +#define EMAC_MAC_A0_REG (0x98) | |
| 93 | +#define EMAC_MAC_A1_REG (0x9c) | |
| 94 | +#define EMAC_MAC_A2_REG (0xa0) | |
| 95 | +#define EMAC_SAFX_L_REG0 (0xa4) | |
| 96 | +#define EMAC_SAFX_H_REG0 (0xa8) | |
| 97 | +#define EMAC_SAFX_L_REG1 (0xac) | |
| 98 | +#define EMAC_SAFX_H_REG1 (0xb0) | |
| 99 | +#define EMAC_SAFX_L_REG2 (0xb4) | |
| 100 | +#define EMAC_SAFX_H_REG2 (0xb8) | |
| 101 | +#define EMAC_SAFX_L_REG3 (0xbc) | |
| 102 | +#define EMAC_SAFX_H_REG3 (0xc0) | |
| 103 | + | |
| 104 | +#define EMAC_PHY_DUPLEX (1 << 8) | |
| 105 | + | |
| 106 | +#define EMAC_EEPROM_MAGIC (0x444d394b) | |
| 107 | +#define EMAC_UNDOCUMENTED_MAGIC (0x0143414d) | |
| 108 | +#endif /* _SUN4I_EMAC_H_ */ | |
| @@ -702,19 +702,6 @@ static struct pci_driver acenic_pci_driver = { · 701 unmodified lines | ||
| 702 | 702 | .remove = acenic_remove_one, |
| 703 | 703 | }; |
| 704 | 704 | |
| 705 | −static int __init acenic_init(void) | |
| 706 | −{ | |
| 707 | − return pci_register_driver(&acenic_pci_driver); | |
| 708 | −} | |
| 709 | − | |
| 710 | −static void __exit acenic_exit(void) | |
| 711 | −{ | |
| 712 | − pci_unregister_driver(&acenic_pci_driver); | |
| 713 | −} | |
| 714 | − | |
| 715 | −module_init(acenic_init); | |
| 716 | −module_exit(acenic_exit); | |
| 717 | − | |
| 718 | 705 | static void ace_free_descriptors(struct net_device *dev) |
| 719 | 706 | { |
| 720 | 707 | struct ace_private *ap = netdev_priv(dev); |
| @@ -3199,3 +3186,5 @@ static int read_eeprom_byte(struct net_device *dev, unsigned long offset) · 2478 unmodified lines | ||
| 3199 | 3186 | ap->name, offset); |
| 3200 | 3187 | goto out; |
| 3201 | 3188 | } |
| 3189 | + | |
| 3190 | +module_pci_driver(acenic_pci_driver); | |
| @@ -34,7 +34,6 @@ config AMD8111_ETH · 33 unmodified lines | ||
| 34 | 34 | tristate "AMD 8111 (new PCI LANCE) support" |
| 35 | 35 | depends on PCI |
| 36 | 36 | select CRC32 |
| 37 | − select NET_CORE | |
| 38 | 37 | select MII |
| 39 | 38 | ---help--- |
| 40 | 39 | If you have an AMD 8111-based PCI LANCE ethernet card, |
| @@ -60,7 +59,6 @@ config PCNET32 · 19 unmodified lines | ||
| 60 | 59 | tristate "AMD PCnet32 PCI support" |
| 61 | 60 | depends on PCI |
| 62 | 61 | select CRC32 |
| 63 | − select NET_CORE | |
| 64 | 62 | select MII |
| 65 | 63 | ---help--- |
| 66 | 64 | If you have a PCnet32 or PCnetPCI based network (Ethernet) card, |
| @@ -1813,7 +1813,7 @@ static const struct net_device_ops amd8111e_netdev_ops = { · 1812 unmodified lines | ||
| 1813 | 1813 | static int amd8111e_probe_one(struct pci_dev *pdev, |
| 1814 | 1814 | const struct pci_device_id *ent) |
| 1815 | 1815 | { |
| 1816 | − int err,i,pm_cap; | |
| 1816 | + int err, i; | |
| 1817 | 1817 | unsigned long reg_addr,reg_len; |
| 1818 | 1818 | struct amd8111e_priv* lp; |
| 1819 | 1819 | struct net_device* dev; |
| @@ -1842,7 +1842,7 @@ static int amd8111e_probe_one(struct pci_dev *pdev, · 22 unmodified lines | ||
| 1842 | 1842 | pci_set_master(pdev); |
| 1843 | 1843 | |
| 1844 | 1844 | /* Find power-management capability. */ |
| 1845 | − if((pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM))==0){ | |
| 1845 | + if (!pdev->pm_cap) { | |
| 1846 | 1846 | printk(KERN_ERR "amd8111e: No Power Management capability, " |
| 1847 | 1847 | "exiting.\n"); |
| 1848 | 1848 | err = -ENODEV; |
| @@ -1875,7 +1875,7 @@ static int amd8111e_probe_one(struct pci_dev *pdev, · 26 unmodified lines | ||
| 1875 | 1875 | lp = netdev_priv(dev); |
| 1876 | 1876 | lp->pci_dev = pdev; |
| 1877 | 1877 | lp->amd8111e_net_dev = dev; |
| 1878 | − lp->pm_cap = pm_cap; | |
| 1878 | + lp->pm_cap = pdev->pm_cap; | |
| 1879 | 1879 | |
| 1880 | 1880 | spin_lock_init(&lp->lock); |
| 1881 | 1881 | |
| @@ -1981,15 +1981,4 @@ static struct pci_driver amd8111e_driver = { · 99 unmodified lines | ||
| 1981 | 1981 | .resume = amd8111e_resume |
| 1982 | 1982 | }; |
| 1983 | 1983 | |
| 1984 | −static int __init amd8111e_init(void) | |
| 1985 | −{ | |
| 1986 | − return pci_register_driver(&amd8111e_driver); | |
| 1987 | −} | |
| 1988 | − | |
| 1989 | −static void __exit amd8111e_cleanup(void) | |
| 1990 | −{ | |
| 1991 | − pci_unregister_driver(&amd8111e_driver); | |
| 1992 | −} | |
| 1993 | − | |
| 1994 | −module_init(amd8111e_init); | |
| 1995 | −module_exit(amd8111e_cleanup); | |
| 1984 | +module_pci_driver(amd8111e_driver); | |
| @@ -1301,8 +1301,6 @@ static int au1000_remove(struct platform_device *pdev) · 1300 unmodified lines | ||
| 1301 | 1301 | int i; |
| 1302 | 1302 | struct resource *base, *macen; |
| 1303 | 1303 | |
| 1304 | − platform_set_drvdata(pdev, NULL); | |
| 1305 | − | |
| 1306 | 1304 | unregister_netdev(dev); |
| 1307 | 1305 | mdiobus_unregister(aup->mii_bus); |
| 1308 | 1306 | mdiobus_free(aup->mii_bus); |
| @@ -1470,7 +1470,7 @@ no_link_test: · 1469 unmodified lines | ||
| 1470 | 1470 | goto fail; |
| 1471 | 1471 | } |
| 1472 | 1472 | |
| 1473 | − dev_set_drvdata(&op->dev, lp); | |
| 1473 | + platform_set_drvdata(op, lp); | |
| 1474 | 1474 | |
| 1475 | 1475 | printk(KERN_INFO "%s: LANCE %pM\n", |
| 1476 | 1476 | dev->name, dev->dev_addr); |
| @@ -1501,7 +1501,7 @@ static int sunlance_sbus_probe(struct platform_device *op) · 24 unmodified lines | ||
| 1501 | 1501 | |
| 1502 | 1502 | static int sunlance_sbus_remove(struct platform_device *op) |
| 1503 | 1503 | { |
| 1504 | − struct lance_private *lp = dev_get_drvdata(&op->dev); | |
| 1504 | + struct lance_private *lp = platform_get_drvdata(op); | |
| 1505 | 1505 | struct net_device *net_dev = lp->dev; |
| 1506 | 1506 | |
| 1507 | 1507 | unregister_netdev(net_dev); |
| @@ -1510,8 +1510,6 @@ static int sunlance_sbus_remove(struct platform_device *op) · 2 unmodified lines | ||
| 1510 | 1510 | |
| 1511 | 1511 | free_netdev(net_dev); |
| 1512 | 1512 | |
| 1513 | − dev_set_drvdata(&op->dev, NULL); | |
| 1514 | − | |
| 1515 | 1513 | return 0; |
| 1516 | 1514 | } |
| 1517 | 1515 | |
| @@ -1016,7 +1016,6 @@ static void bmac_set_multicast(struct net_device *dev) · 1015 unmodified lines | ||
| 1016 | 1016 | static void bmac_set_multicast(struct net_device *dev) |
| 1017 | 1017 | { |
| 1018 | 1018 | struct netdev_hw_addr *ha; |
| 1019 | − int i; | |
| 1020 | 1019 | unsigned short rx_cfg; |
| 1021 | 1020 | u32 crc; |
| 1022 | 1021 | |
| @@ -1030,14 +1029,12 @@ static void bmac_set_multicast(struct net_device *dev) · 7 unmodified lines | ||
| 1030 | 1029 | rx_cfg |= RxPromiscEnable; |
| 1031 | 1030 | bmwrite(dev, RXCFG, rx_cfg); |
| 1032 | 1031 | } else { |
| 1033 | − u16 hash_table[4]; | |
| 1032 | + u16 hash_table[4] = { 0 }; | |
| 1034 | 1033 | |
| 1035 | 1034 | rx_cfg = bmread(dev, RXCFG); |
| 1036 | 1035 | rx_cfg &= ~RxPromiscEnable; |
| 1037 | 1036 | bmwrite(dev, RXCFG, rx_cfg); |
| 1038 | 1037 | |
| 1039 | − for(i = 0; i < 4; i++) hash_table[i] = 0; | |
| 1040 | − | |
| 1041 | 1038 | netdev_for_each_mc_addr(ha, dev) { |
| 1042 | 1039 | crc = ether_crc_le(6, ha->addr); |
| 1043 | 1040 | crc >>= 26; |
| @@ -0,0 +1,31 @@ | ||
| 1 | +# | |
| 2 | +# ARC EMAC network device configuration | |
| 3 | +# | |
| 4 | + | |
| 5 | +config NET_VENDOR_ARC | |
| 6 | + bool "ARC devices" | |
| 7 | + default y | |
| 8 | + ---help--- | |
| 9 | + If you have a network (Ethernet) card belonging to this class, say Y | |
| 10 | + and read the Ethernet-HOWTO, available from | |
| 11 | + <http://www.tldp.org/docs.html#howto>. | |
| 12 | + | |
| 13 | + Note that the answer to this question doesn't directly affect the | |
| 14 | + kernel: saying N will just cause the configurator to skip all | |
| 15 | + the questions about ARC cards. If you say Y, you will be asked for | |
| 16 | + your specific card in the following questions. | |
| 17 | + | |
| 18 | +if NET_VENDOR_ARC | |
| 19 | + | |
| 20 | +config ARC_EMAC | |
| 21 | + tristate "ARC EMAC support" | |
| 22 | + select MII | |
| 23 | + select PHYLIB | |
| 24 | + depends on OF_IRQ | |
| 25 | + depends on OF_NET | |
| 26 | + ---help--- | |
| 27 | + On some legacy ARC (Synopsys) FPGA boards such as ARCAngel4/ML50x | |
| 28 | + non-standard on-chip ethernet device ARC EMAC 10/100 is used. | |
| 29 | + Say Y here if you have such a board. If unsure, say N. | |
| 30 | + | |
| 31 | +endif # NET_VENDOR_ARC | |
| @@ -0,0 +1,6 @@ | ||
| 1 | +# | |
| 2 | +# Makefile for the ARC network device drivers. | |
| 3 | +# | |
| 4 | + | |
| 5 | +arc_emac-objs := emac_main.o emac_mdio.o | |
| 6 | +obj-$(CONFIG_ARC_EMAC) += arc_emac.o | |
| @@ -0,0 +1,214 @@ | ||
| 1 | +/* | |
| 2 | + * Copyright (C) 2004-2013 Synopsys, Inc. (www.synopsys.com) | |
| 3 | + * | |
| 4 | + * Registers and bits definitions of ARC EMAC | |
| 5 | + */ | |
| 6 | + | |
| 7 | +#ifndef ARC_EMAC_H | |
| 8 | +#define ARC_EMAC_H | |
| 9 | + | |
| 10 | +#include <linux/device.h> | |
| 11 | +#include <linux/dma-mapping.h> | |
| 12 | +#include <linux/netdevice.h> | |
| 13 | +#include <linux/phy.h> | |
| 14 | + | |
| 15 | +/* STATUS and ENABLE Register bit masks */ | |
| 16 | +#define TXINT_MASK (1<<0) /* Transmit interrupt */ | |
| 17 | +#define RXINT_MASK (1<<1) /* Receive interrupt */ | |
| 18 | +#define ERR_MASK (1<<2) /* Error interrupt */ | |
| 19 | +#define TXCH_MASK (1<<3) /* Transmit chaining error interrupt */ | |
| 20 | +#define MSER_MASK (1<<4) /* Missed packet counter error */ | |
| 21 | +#define RXCR_MASK (1<<8) /* RXCRCERR counter rolled over */ | |
| 22 | +#define RXFR_MASK (1<<9) /* RXFRAMEERR counter rolled over */ | |
| 23 | +#define RXFL_MASK (1<<10) /* RXOFLOWERR counter rolled over */ | |
| 24 | +#define MDIO_MASK (1<<12) /* MDIO complete interrupt */ | |
| 25 | +#define TXPL_MASK (1<<31) /* Force polling of BD by EMAC */ | |
| 26 | + | |
| 27 | +/* CONTROL Register bit masks */ | |
| 28 | +#define EN_MASK (1<<0) /* VMAC enable */ | |
| 29 | +#define TXRN_MASK (1<<3) /* TX enable */ | |
| 30 | +#define RXRN_MASK (1<<4) /* RX enable */ | |
| 31 | +#define DSBC_MASK (1<<8) /* Disable receive broadcast */ | |
| 32 | +#define ENFL_MASK (1<<10) /* Enable Full-duplex */ | |
| 33 | +#define PROM_MASK (1<<11) /* Promiscuous mode */ | |
| 34 | + | |
| 35 | +/* Buffer descriptor INFO bit masks */ | |
| 36 | +#define OWN_MASK (1<<31) /* 0-CPU owns buffer, 1-EMAC owns buffer */ | |
| 37 | +#define FIRST_MASK (1<<16) /* First buffer in chain */ | |
| 38 | +#define LAST_MASK (1<<17) /* Last buffer in chain */ | |
| 39 | +#define LEN_MASK 0x000007FF /* last 11 bits */ | |
| 40 | +#define CRLS (1<<21) | |
| 41 | +#define DEFR (1<<22) | |
| 42 | +#define DROP (1<<23) | |
| 43 | +#define RTRY (1<<24) | |
| 44 | +#define LTCL (1<<28) | |
| 45 | +#define UFLO (1<<29) | |
| 46 | + | |
| 47 | +#define FOR_EMAC OWN_MASK | |
| 48 | +#define FOR_CPU 0 | |
| 49 | + | |
| 50 | +/* ARC EMAC register set combines entries for MAC and MDIO */ | |
| 51 | +enum { | |
| 52 | + R_ID = 0, | |
| 53 | + R_STATUS, | |
| 54 | + R_ENABLE, | |
| 55 | + R_CTRL, | |
| 56 | + R_POLLRATE, | |
| 57 | + R_RXERR, | |
| 58 | + R_MISS, | |
| 59 | + R_TX_RING, | |
| 60 | + R_RX_RING, | |
| 61 | + R_ADDRL, | |
| 62 | + R_ADDRH, | |
| 63 | + R_LAFL, | |
| 64 | + R_LAFH, | |
| 65 | + R_MDIO, | |
| 66 | +}; | |
| 67 | + | |
| 68 | +#define TX_TIMEOUT (400*HZ/1000) /* Transmission timeout */ | |
| 69 | + | |
| 70 | +#define ARC_EMAC_NAPI_WEIGHT 40 /* Workload for NAPI */ | |
| 71 | + | |
| 72 | +#define EMAC_BUFFER_SIZE 1536 /* EMAC buffer size */ | |
| 73 | + | |
| 74 | +/** | |
| 75 | + * struct arc_emac_bd - EMAC buffer descriptor (BD). | |
| 76 | + * | |
| 77 | + * @info: Contains status information on the buffer itself. | |
| 78 | + * @data: 32-bit byte addressable pointer to the packet data. | |
| 79 | + */ | |
| 80 | +struct arc_emac_bd { | |
| 81 | + __le32 info; | |
| 82 | + dma_addr_t data; | |
| 83 | +}; | |
| 84 | + | |
| 85 | +/* Number of Rx/Tx BD's */ | |
| 86 | +#define RX_BD_NUM 128 | |
| 87 | +#define TX_BD_NUM 128 | |
| 88 | + | |
| 89 | +#define RX_RING_SZ (RX_BD_NUM * sizeof(struct arc_emac_bd)) | |
| 90 | +#define TX_RING_SZ (TX_BD_NUM * sizeof(struct arc_emac_bd)) | |
| 91 | + | |
| 92 | +/** | |
| 93 | + * struct buffer_state - Stores Rx/Tx buffer state. | |
| 94 | + * @sk_buff: Pointer to socket buffer. | |
| 95 | + * @addr: Start address of DMA-mapped memory region. | |
| 96 | + * @len: Length of DMA-mapped memory region. | |
| 97 | + */ | |
| 98 | +struct buffer_state { | |
| 99 | + struct sk_buff *skb; | |
| 100 | + DEFINE_DMA_UNMAP_ADDR(addr); | |
| 101 | + DEFINE_DMA_UNMAP_LEN(len); | |
| 102 | +}; | |
| 103 | + | |
| 104 | +/** | |
| 105 | + * struct arc_emac_priv - Storage of EMAC's private information. | |
| 106 | + * @dev: Pointer to the current device. | |
| 107 | + * @ndev: Pointer to the current network device. | |
| 108 | + * @phy_dev: Pointer to attached PHY device. | |
| 109 | + * @bus: Pointer to the current MII bus. | |
| 110 | + * @regs: Base address of EMAC memory-mapped control registers. | |
| 111 | + * @napi: Structure for NAPI. | |
| 112 | + * @stats: Network device statistics. | |
| 113 | + * @rxbd: Pointer to Rx BD ring. | |
| 114 | + * @txbd: Pointer to Tx BD ring. | |
| 115 | + * @rxbd_dma: DMA handle for Rx BD ring. | |
| 116 | + * @txbd_dma: DMA handle for Tx BD ring. | |
| 117 | + * @rx_buff: Storage for Rx buffers states. | |
| 118 | + * @tx_buff: Storage for Tx buffers states. | |
| 119 | + * @txbd_curr: Index of Tx BD to use on the next "ndo_start_xmit". | |
| 120 | + * @txbd_dirty: Index of Tx BD to free on the next Tx interrupt. | |
| 121 | + * @last_rx_bd: Index of the last Rx BD we've got from EMAC. | |
| 122 | + * @link: PHY's last seen link state. | |
| 123 | + * @duplex: PHY's last set duplex mode. | |
| 124 | + * @speed: PHY's last set speed. | |
| 125 | + * @max_speed: Maximum supported by current system network data-rate. | |
| 126 | + */ | |
| 127 | +struct arc_emac_priv { | |
| 128 | + /* Devices */ | |
| 129 | + struct device *dev; | |
| 130 | + struct net_device *ndev; | |
| 131 | + struct phy_device *phy_dev; | |
| 132 | + struct mii_bus *bus; | |
| 133 | + | |
| 134 | + void __iomem *regs; | |
| 135 | + | |
| 136 | + struct napi_struct napi; | |
| 137 | + struct net_device_stats stats; | |
| 138 | + | |
| 139 | + struct arc_emac_bd *rxbd; | |
| 140 | + struct arc_emac_bd *txbd; | |
| 141 | + | |
| 142 | + dma_addr_t rxbd_dma; | |
| 143 | + dma_addr_t txbd_dma; | |
| 144 | + | |
| 145 | + struct buffer_state rx_buff[RX_BD_NUM]; | |
| 146 | + struct buffer_state tx_buff[TX_BD_NUM]; | |
| 147 | + unsigned int txbd_curr; | |
| 148 | + unsigned int txbd_dirty; | |
| 149 | + | |
| 150 | + unsigned int last_rx_bd; | |
| 151 | + | |
| 152 | + unsigned int link; | |
| 153 | + unsigned int duplex; | |
| 154 | + unsigned int speed; | |
| 155 | + unsigned int max_speed; | |
| 156 | +}; | |
| 157 | + | |
| 158 | +/** | |
| 159 | + * arc_reg_set - Sets EMAC register with provided value. | |
| 160 | + * @priv: Pointer to ARC EMAC private data structure. | |
| 161 | + * @reg: Register offset from base address. | |
| 162 | + * @value: Value to set in register. | |
| 163 | + */ | |
| 164 | +static inline void arc_reg_set(struct arc_emac_priv *priv, int reg, int value) | |
| 165 | +{ | |
| 166 | + iowrite32(value, priv->regs + reg * sizeof(int)); | |
| 167 | +} | |
| 168 | + | |
| 169 | +/** | |
| 170 | + * arc_reg_get - Gets value of specified EMAC register. | |
| 171 | + * @priv: Pointer to ARC EMAC private data structure. | |
| 172 | + * @reg: Register offset from base address. | |
| 173 | + * | |
| 174 | + * returns: Value of requested register. | |
| 175 | + */ | |
| 176 | +static inline unsigned int arc_reg_get(struct arc_emac_priv *priv, int reg) | |
| 177 | +{ | |
| 178 | + return ioread32(priv->regs + reg * sizeof(int)); | |
| 179 | +} | |
| 180 | + | |
| 181 | +/** | |
| 182 | + * arc_reg_or - Applies mask to specified EMAC register - ("reg" | "mask"). | |
| 183 | + * @priv: Pointer to ARC EMAC private data structure. | |
| 184 | + * @reg: Register offset from base address. | |
| 185 | + * @mask: Mask to apply to specified register. | |
| 186 | + * | |
| 187 | + * This function reads initial register value, then applies provided mask | |
| 188 | + * to it and then writes register back. | |
| 189 | + */ | |
| 190 | +static inline void arc_reg_or(struct arc_emac_priv *priv, int reg, int mask) | |
| 191 | +{ | |
| 192 | + unsigned int value = arc_reg_get(priv, reg); | |
| 193 | + arc_reg_set(priv, reg, value | mask); | |
| 194 | +} | |
| 195 | + | |
| 196 | +/** | |
| 197 | + * arc_reg_clr - Applies mask to specified EMAC register - ("reg" & ~"mask"). | |
| 198 | + * @priv: Pointer to ARC EMAC private data structure. | |
| 199 | + * @reg: Register offset from base address. | |
| 200 | + * @mask: Mask to apply to specified register. | |
| 201 | + * | |
| 202 | + * This function reads initial register value, then applies provided mask | |
| 203 | + * to it and then writes register back. | |
| 204 | + */ | |
| 205 | +static inline void arc_reg_clr(struct arc_emac_priv *priv, int reg, int mask) | |
| 206 | +{ | |
| 207 | + unsigned int value = arc_reg_get(priv, reg); | |
| 208 | + arc_reg_set(priv, reg, value & ~mask); | |
| 209 | +} | |
| 210 | + | |
| 211 | +int arc_mdio_probe(struct platform_device *pdev, struct arc_emac_priv *priv); | |
| 212 | +int arc_mdio_remove(struct arc_emac_priv *priv); | |
| 213 | + | |
| 214 | +#endif /* ARC_EMAC_H */ | |
| @@ -0,0 +1,819 @@ | ||
| 1 | +/* | |
| 2 | + * Copyright (C) 2004-2013 Synopsys, Inc. (www.synopsys.com) | |
| 3 | + * | |
| 4 | + * This program is free software; you can redistribute it and/or modify | |
| 5 | + * it under the terms of the GNU General Public License version 2 as | |
| 6 | + * published by the Free Software Foundation. | |
| 7 | + * | |
| 8 | + * Driver for the ARC EMAC 10100 (hardware revision 5) | |
| 9 | + * | |
| 10 | + * Contributors: | |
| 11 | + * Amit Bhor | |
| 12 | + * Sameer Dhavale | |
| 13 | + * Vineet Gupta | |
| 14 | + */ | |
| 15 | + | |
| 16 | +#include <linux/etherdevice.h> | |
| 17 | +#include <linux/interrupt.h> | |
| 18 | +#include <linux/io.h> | |
| 19 | +#include <linux/module.h> | |
| 20 | +#include <linux/of_address.h> | |
| 21 | +#include <linux/of_irq.h> | |
| 22 | +#include <linux/of_mdio.h> | |
| 23 | +#include <linux/of_net.h> | |
| 24 | +#include <linux/of_platform.h> | |
| 25 | + | |
| 26 | +#include "emac.h" | |
| 27 | + | |
| 28 | +#define DRV_NAME "arc_emac" | |
| 29 | +#define DRV_VERSION "1.0" | |
| 30 | + | |
| 31 | +/** | |
| 32 | + * arc_emac_adjust_link - Adjust the PHY link duplex. | |
| 33 | + * @ndev: Pointer to the net_device structure. | |
| 34 | + * | |
| 35 | + * This function is called to change the duplex setting after auto negotiation | |
| 36 | + * is done by the PHY. | |
| 37 | + */ | |
| 38 | +static void arc_emac_adjust_link(struct net_device *ndev) | |
| 39 | +{ | |
| 40 | + struct arc_emac_priv *priv = netdev_priv(ndev); | |
| 41 | + struct phy_device *phy_dev = priv->phy_dev; | |
| 42 | + unsigned int reg, state_changed = 0; | |
| 43 | + | |
| 44 | + if (priv->link != phy_dev->link) { | |
| 45 | + priv->link = phy_dev->link; | |
| 46 | + state_changed = 1; | |
| 47 | + } | |
| 48 | + | |
| 49 | + if (priv->speed != phy_dev->speed) { | |
| 50 | + priv->speed = phy_dev->speed; | |
| 51 | + state_changed = 1; | |
| 52 | + } | |
| 53 | + | |
| 54 | + if (priv->duplex != phy_dev->duplex) { | |
| 55 | + reg = arc_reg_get(priv, R_CTRL); | |
| 56 | + | |
| 57 | + if (DUPLEX_FULL == phy_dev->duplex) | |
| 58 | + reg |= ENFL_MASK; | |
| 59 | + else | |
| 60 | + reg &= ~ENFL_MASK; | |
| 61 | + | |
| 62 | + arc_reg_set(priv, R_CTRL, reg); | |
| 63 | + priv->duplex = phy_dev->duplex; | |
| 64 | + state_changed = 1; | |
| 65 | + } | |
| 66 | + | |
| 67 | + if (state_changed) | |
| 68 | + phy_print_status(phy_dev); | |
| 69 | +} | |
| 70 | + | |
| 71 | +/** | |
| 72 | + * arc_emac_get_settings - Get PHY settings. | |
| 73 | + * @ndev: Pointer to net_device structure. | |
| 74 | + * @cmd: Pointer to ethtool_cmd structure. | |
| 75 | + * | |
| 76 | + * This implements ethtool command for getting PHY settings. If PHY could | |
| 77 | + * not be found, the function returns -ENODEV. This function calls the | |
| 78 | + * relevant PHY ethtool API to get the PHY settings. | |
| 79 | + * Issue "ethtool ethX" under linux prompt to execute this function. | |
| 80 | + */ | |
| 81 | +static int arc_emac_get_settings(struct net_device *ndev, | |
| 82 | + struct ethtool_cmd *cmd) | |
| 83 | +{ | |
| 84 | + struct arc_emac_priv *priv = netdev_priv(ndev); | |
| 85 | + | |
| 86 | + return phy_ethtool_gset(priv->phy_dev, cmd); | |
| 87 | +} | |
| 88 | + | |
| 89 | +/** | |
| 90 | + * arc_emac_set_settings - Set PHY settings as passed in the argument. | |
| 91 | + * @ndev: Pointer to net_device structure. | |
| 92 | + * @cmd: Pointer to ethtool_cmd structure. | |
| 93 | + * | |
| 94 | + * This implements ethtool command for setting various PHY settings. If PHY | |
| 95 | + * could not be found, the function returns -ENODEV. This function calls the | |
| 96 | + * relevant PHY ethtool API to set the PHY. | |
| 97 | + * Issue e.g. "ethtool -s ethX speed 1000" under linux prompt to execute this | |
| 98 | + * function. | |
| 99 | + */ | |
| 100 | +static int arc_emac_set_settings(struct net_device *ndev, | |
| 101 | + struct ethtool_cmd *cmd) | |
| 102 | +{ | |
| 103 | + struct arc_emac_priv *priv = netdev_priv(ndev); | |
| 104 | + | |
| 105 | + if (!capable(CAP_NET_ADMIN)) | |
| 106 | + return -EPERM; | |
| 107 | + | |
| 108 | + return phy_ethtool_sset(priv->phy_dev, cmd); | |
| 109 | +} | |
| 110 | + | |
| 111 | +/** | |
| 112 | + * arc_emac_get_drvinfo - Get EMAC driver information. | |
| 113 | + * @ndev: Pointer to net_device structure. | |
| 114 | + * @info: Pointer to ethtool_drvinfo structure. | |
| 115 | + * | |
| 116 | + * This implements ethtool command for getting the driver information. | |
| 117 | + * Issue "ethtool -i ethX" under linux prompt to execute this function. | |
| 118 | + */ | |
| 119 | +static void arc_emac_get_drvinfo(struct net_device *ndev, | |
| 120 | + struct ethtool_drvinfo *info) | |
| 121 | +{ | |
| 122 | + strlcpy(info->driver, DRV_NAME, sizeof(info->driver)); | |
| 123 | + strlcpy(info->version, DRV_VERSION, sizeof(info->version)); | |
| 124 | +} | |
| 125 | + | |
| 126 | +static const struct ethtool_ops arc_emac_ethtool_ops = { | |
| 127 | + .get_settings = arc_emac_get_settings, | |
| 128 | + .set_settings = arc_emac_set_settings, | |
| 129 | + .get_drvinfo = arc_emac_get_drvinfo, | |
| 130 | + .get_link = ethtool_op_get_link, | |
| 131 | +}; | |
| 132 | + | |
| 133 | +#define FIRST_OR_LAST_MASK (FIRST_MASK | LAST_MASK) | |
| 134 | + | |
| 135 | +/** | |
| 136 | + * arc_emac_tx_clean - clears processed by EMAC Tx BDs. | |
| 137 | + * @ndev: Pointer to the network device. | |
| 138 | + */ | |
| 139 | +static void arc_emac_tx_clean(struct net_device *ndev) | |
| 140 | +{ | |
| 141 | + struct arc_emac_priv *priv = netdev_priv(ndev); | |
| 142 | + struct net_device_stats *stats = &priv->stats; | |
| 143 | + unsigned int i; | |
| 144 | + | |
| 145 | + for (i = 0; i < TX_BD_NUM; i++) { | |
| 146 | + unsigned int *txbd_dirty = &priv->txbd_dirty; | |
| 147 | + struct arc_emac_bd *txbd = &priv->txbd[*txbd_dirty]; | |
| 148 | + struct buffer_state *tx_buff = &priv->tx_buff[*txbd_dirty]; | |
| 149 | + struct sk_buff *skb = tx_buff->skb; | |
| 150 | + unsigned int info = le32_to_cpu(txbd->info); | |
| 151 | + | |
| 152 | + *txbd_dirty = (*txbd_dirty + 1) % TX_BD_NUM; | |
| 153 | + | |
| 154 | + if ((info & FOR_EMAC) || !txbd->data) | |
| 155 | + break; | |
| 156 | + | |
| 157 | + if (unlikely(info & (DROP | DEFR | LTCL | UFLO))) { | |
| 158 | + stats->tx_errors++; | |
| 159 | + stats->tx_dropped++; | |
| 160 | + | |
| 161 | + if (info & DEFR) | |
| 162 | + stats->tx_carrier_errors++; | |
| 163 | + | |
| 164 | + if (info & LTCL) | |
| 165 | + stats->collisions++; | |
| 166 | + | |
| 167 | + if (info & UFLO) | |
| 168 | + stats->tx_fifo_errors++; | |
| 169 | + } else if (likely(info & FIRST_OR_LAST_MASK)) { | |
| 170 | + stats->tx_packets++; | |
| 171 | + stats->tx_bytes += skb->len; | |
| 172 | + } | |
| 173 | + | |
| 174 | + dma_unmap_single(&ndev->dev, dma_unmap_addr(tx_buff, addr), | |
| 175 | + dma_unmap_len(tx_buff, len), DMA_TO_DEVICE); | |
| 176 | + | |
| 177 | + /* return the sk_buff to system */ | |
| 178 | + dev_kfree_skb_irq(skb); | |
| 179 | + | |
| 180 | + txbd->data = 0; | |
| 181 | + txbd->info = 0; | |
| 182 | + | |
| 183 | + if (netif_queue_stopped(ndev)) | |
| 184 | + netif_wake_queue(ndev); | |
| 185 | + } | |
| 186 | +} | |
| 187 | + | |
| 188 | +/** | |
| 189 | + * arc_emac_rx - processing of Rx packets. | |
| 190 | + * @ndev: Pointer to the network device. | |
| 191 | + * @budget: How many BDs to process on 1 call. | |
| 192 | + * | |
| 193 | + * returns: Number of processed BDs | |
| 194 | + * | |
| 195 | + * Iterate through Rx BDs and deliver received packages to upper layer. | |
| 196 | + */ | |
| 197 | +static int arc_emac_rx(struct net_device *ndev, int budget) | |
| 198 | +{ | |
| 199 | + struct arc_emac_priv *priv = netdev_priv(ndev); | |
| 200 | + unsigned int work_done; | |
| 201 | + | |
| 202 | + for (work_done = 0; work_done <= budget; work_done++) { | |
| 203 | + unsigned int *last_rx_bd = &priv->last_rx_bd; | |
| 204 | + struct net_device_stats *stats = &priv->stats; | |
| 205 | + struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd]; | |
| 206 | + struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd]; | |
| 207 | + unsigned int pktlen, info = le32_to_cpu(rxbd->info); | |
| 208 | + struct sk_buff *skb; | |
| 209 | + dma_addr_t addr; | |
| 210 | + | |
| 211 | + if (unlikely((info & OWN_MASK) == FOR_EMAC)) | |
| 212 | + break; | |
| 213 | + | |
| 214 | + /* Make a note that we saw a packet at this BD. | |
| 215 | + * So next time, driver starts from this + 1 | |
| 216 | + */ | |
| 217 | + *last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM; | |
| 218 | + | |
| 219 | + if (unlikely((info & FIRST_OR_LAST_MASK) != | |
| 220 | + FIRST_OR_LAST_MASK)) { | |
| 221 | + /* We pre-allocate buffers of MTU size so incoming | |
| 222 | + * packets won't be split/chained. | |
| 223 | + */ | |
| 224 | + if (net_ratelimit()) | |
| 225 | + netdev_err(ndev, "incomplete packet received\n"); | |
| 226 | + | |
| 227 | + /* Return ownership to EMAC */ | |
| 228 | + rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE); | |
| 229 | + stats->rx_errors++; | |
| 230 | + stats->rx_length_errors++; | |
| 231 | + continue; | |
| 232 | + } | |
| 233 | + | |
| 234 | + pktlen = info & LEN_MASK; | |
| 235 | + stats->rx_packets++; | |
| 236 | + stats->rx_bytes += pktlen; | |
| 237 | + skb = rx_buff->skb; | |
| 238 | + skb_put(skb, pktlen); | |
| 239 | + skb->dev = ndev; | |
| 240 | + skb->protocol = eth_type_trans(skb, ndev); | |
| 241 | + | |
| 242 | + dma_unmap_single(&ndev->dev, dma_unmap_addr(rx_buff, addr), | |
| 243 | + dma_unmap_len(rx_buff, len), DMA_FROM_DEVICE); | |
| 244 | + | |
| 245 | + /* Prepare the BD for next cycle */ | |
| 246 | + rx_buff->skb = netdev_alloc_skb_ip_align(ndev, | |
| 247 | + EMAC_BUFFER_SIZE); | |
| 248 | + if (unlikely(!rx_buff->skb)) { | |
| 249 | + stats->rx_errors++; | |
| 250 | + /* Because receive_skb is below, increment rx_dropped */ | |
| 251 | + stats->rx_dropped++; | |
| 252 | + continue; | |
| 253 | + } | |
| 254 | + | |
| 255 | + /* receive_skb only if new skb was allocated to avoid holes */ | |
| 256 | + netif_receive_skb(skb); | |
| 257 | + | |
| 258 | + addr = dma_map_single(&ndev->dev, (void *)rx_buff->skb->data, | |
| 259 | + EMAC_BUFFER_SIZE, DMA_FROM_DEVICE); | |
| 260 | + if (dma_mapping_error(&ndev->dev, addr)) { | |
| 261 | + if (net_ratelimit()) | |
| 262 | + netdev_err(ndev, "cannot dma map\n"); | |
| 263 | + dev_kfree_skb(rx_buff->skb); | |
| 264 | + stats->rx_errors++; | |
| 265 | + continue; | |
| 266 | + } | |
| 267 | + dma_unmap_addr_set(rx_buff, addr, addr); | |
| 268 | + dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE); | |
| 269 | + | |
| 270 | + rxbd->data = cpu_to_le32(addr); | |
| 271 | + | |
| 272 | + /* Make sure pointer to data buffer is set */ | |
| 273 | + wmb(); | |
| 274 | + | |
| 275 | + /* Return ownership to EMAC */ | |
| 276 | + rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE); | |
| 277 | + } | |
| 278 | + | |
| 279 | + return work_done; | |
| 280 | +} | |
| 281 | + | |
| 282 | +/** | |
| 283 | + * arc_emac_poll - NAPI poll handler. | |
| 284 | + * @napi: Pointer to napi_struct structure. | |
| 285 | + * @budget: How many BDs to process on 1 call. | |
| 286 | + * | |
| 287 | + * returns: Number of processed BDs | |
| 288 | + */ | |
| 289 | +static int arc_emac_poll(struct napi_struct *napi, int budget) | |
| 290 | +{ | |
| 291 | + struct net_device *ndev = napi->dev; | |
| 292 | + struct arc_emac_priv *priv = netdev_priv(ndev); | |
| 293 | + unsigned int work_done; | |
| 294 | + | |
| 295 | + arc_emac_tx_clean(ndev); | |
| 296 | + | |
| 297 | + work_done = arc_emac_rx(ndev, budget); | |
| 298 | + if (work_done < budget) { | |
| 299 | + napi_complete(napi); | |
| 300 | + arc_reg_or(priv, R_ENABLE, RXINT_MASK); | |
| 301 | + } | |
| 302 | + | |
| 303 | + return work_done; | |
| 304 | +} | |
| 305 | + | |
| 306 | +/** | |
| 307 | + * arc_emac_intr - Global interrupt handler for EMAC. | |
| 308 | + * @irq: irq number. | |
| 309 | + * @dev_instance: device instance. | |
| 310 | + * | |
| 311 | + * returns: IRQ_HANDLED for all cases. | |
| 312 | + * | |
| 313 | + * ARC EMAC has only 1 interrupt line, and depending on bits raised in | |
| 314 | + * STATUS register we may tell what is a reason for interrupt to fire. | |
| 315 | + */ | |
| 316 | +static irqreturn_t arc_emac_intr(int irq, void *dev_instance) | |
| 317 | +{ | |
| 318 | + struct net_device *ndev = dev_instance; | |
| 319 | + struct arc_emac_priv *priv = netdev_priv(ndev); | |
| 320 | + struct net_device_stats *stats = &priv->stats; | |
| 321 | + unsigned int status; | |
| 322 | + | |
| 323 | + status = arc_reg_get(priv, R_STATUS); | |
| 324 | + status &= ~MDIO_MASK; | |
| 325 | + | |
| 326 | + /* Reset all flags except "MDIO complete" */ | |
| 327 | + arc_reg_set(priv, R_STATUS, status); | |
| 328 | + | |
| 329 | + if (status & RXINT_MASK) { | |
| 330 | + if (likely(napi_schedule_prep(&priv->napi))) { | |
| 331 | + arc_reg_clr(priv, R_ENABLE, RXINT_MASK); | |
| 332 | + __napi_schedule(&priv->napi); | |
| 333 | + } | |
| 334 | + } | |
| 335 | + | |
| 336 | + if (status & ERR_MASK) { | |
| 337 | + /* MSER/RXCR/RXFR/RXFL interrupt fires on corresponding | |
| 338 | + * 8-bit error counter overrun. | |
| 339 | + */ | |
| 340 | + | |
| 341 | + if (status & MSER_MASK) { | |
| 342 | + stats->rx_missed_errors += 0x100; | |
| 343 | + stats->rx_errors += 0x100; | |
| 344 | + } | |
| 345 | + | |
| 346 | + if (status & RXCR_MASK) { | |
| 347 | + stats->rx_crc_errors += 0x100; | |
| 348 | + stats->rx_errors += 0x100; | |
| 349 | + } | |
| 350 | + | |
| 351 | + if (status & RXFR_MASK) { | |
| 352 | + stats->rx_frame_errors += 0x100; | |
| 353 | + stats->rx_errors += 0x100; | |
| 354 | + } | |
| 355 | + | |
| 356 | + if (status & RXFL_MASK) { | |
| 357 | + stats->rx_over_errors += 0x100; | |
| 358 | + stats->rx_errors += 0x100; | |
| 359 | + } | |
| 360 | + } | |
| 361 | + | |
| 362 | + return IRQ_HANDLED; | |
| 363 | +} | |
| 364 | + | |
| 365 | +/** | |
| 366 | + * arc_emac_open - Open the network device. | |
| 367 | + * @ndev: Pointer to the network device. | |
| 368 | + * | |
| 369 | + * returns: 0, on success or non-zero error value on failure. | |
| 370 | + * | |
| 371 | + * This function sets the MAC address, requests and enables an IRQ | |
| 372 | + * for the EMAC device and starts the Tx queue. | |
| 373 | + * It also connects to the phy device. | |
| 374 | + */ | |
| 375 | +static int arc_emac_open(struct net_device *ndev) | |
| 376 | +{ | |
| 377 | + struct arc_emac_priv *priv = netdev_priv(ndev); | |
| 378 | + struct phy_device *phy_dev = priv->phy_dev; | |
| 379 | + int i; | |
| 380 | + | |
| 381 | + phy_dev->autoneg = AUTONEG_ENABLE; | |
| 382 | + phy_dev->speed = 0; | |
| 383 | + phy_dev->duplex = 0; | |
| 384 | + phy_dev->advertising = phy_dev->supported; | |
| 385 | + | |
| 386 | + if (priv->max_speed > 100) { | |
| 387 | + phy_dev->advertising &= PHY_GBIT_FEATURES; | |
| 388 | + } else if (priv->max_speed <= 100) { | |
| 389 | + phy_dev->advertising &= PHY_BASIC_FEATURES; | |
| 390 | + if (priv->max_speed <= 10) { | |
| 391 | + phy_dev->advertising &= ~SUPPORTED_100baseT_Half; | |
| 392 | + phy_dev->advertising &= ~SUPPORTED_100baseT_Full; | |
| 393 | + } | |
| 394 | + } | |
| 395 | + | |
| 396 | + priv->last_rx_bd = 0; | |
| 397 | + | |
| 398 | + /* Allocate and set buffers for Rx BD's */ | |
| 399 | + for (i = 0; i < RX_BD_NUM; i++) { | |
| 400 | + dma_addr_t addr; | |
| 401 | + unsigned int *last_rx_bd = &priv->last_rx_bd; | |
| 402 | + struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd]; | |
| 403 | + struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd]; | |
| 404 | + | |
| 405 | + rx_buff->skb = netdev_alloc_skb_ip_align(ndev, | |
| 406 | + EMAC_BUFFER_SIZE); | |
| 407 | + if (unlikely(!rx_buff->skb)) | |
| 408 | + return -ENOMEM; | |
| 409 | + | |
| 410 | + addr = dma_map_single(&ndev->dev, (void *)rx_buff->skb->data, | |
| 411 | + EMAC_BUFFER_SIZE, DMA_FROM_DEVICE); | |
| 412 | + if (dma_mapping_error(&ndev->dev, addr)) { | |
| 413 | + netdev_err(ndev, "cannot dma map\n"); | |
| 414 | + dev_kfree_skb(rx_buff->skb); | |
| 415 | + return -ENOMEM; | |
| 416 | + } | |
| 417 | + dma_unmap_addr_set(rx_buff, addr, addr); | |
| 418 | + dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE); | |
| 419 | + | |
| 420 | + rxbd->data = cpu_to_le32(addr); | |
| 421 | + | |
| 422 | + /* Make sure pointer to data buffer is set */ | |
| 423 | + wmb(); | |
| 424 | + | |
| 425 | + /* Return ownership to EMAC */ | |
| 426 | + rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE); | |
| 427 | + | |
| 428 | + *last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM; | |
| 429 | + } | |
| 430 | + | |
| 431 | + /* Clean Tx BD's */ | |
| 432 | + memset(priv->txbd, 0, TX_RING_SZ); | |
| 433 | + | |
| 434 | + /* Initialize logical address filter */ | |
| 435 | + arc_reg_set(priv, R_LAFL, 0); | |
| 436 | + arc_reg_set(priv, R_LAFH, 0); | |
| 437 | + | |
| 438 | + /* Set BD ring pointers for device side */ | |
| 439 | + arc_reg_set(priv, R_RX_RING, (unsigned int)priv->rxbd_dma); | |
| 440 | + arc_reg_set(priv, R_TX_RING, (unsigned int)priv->txbd_dma); | |
| 441 | + | |
| 442 | + /* Enable interrupts */ | |
| 443 | + arc_reg_set(priv, R_ENABLE, RXINT_MASK | ERR_MASK); | |
| 444 | + | |
| 445 | + /* Set CONTROL */ | |
| 446 | + arc_reg_set(priv, R_CTRL, | |
| 447 | + (RX_BD_NUM << 24) | /* RX BD table length */ | |
| 448 | + (TX_BD_NUM << 16) | /* TX BD table length */ | |
| 449 | + TXRN_MASK | RXRN_MASK); | |
| 450 | + | |
| 451 | + napi_enable(&priv->napi); | |
| 452 | + | |
| 453 | + /* Enable EMAC */ | |
| 454 | + arc_reg_or(priv, R_CTRL, EN_MASK); | |
| 455 | + | |
| 456 | + phy_start_aneg(priv->phy_dev); | |
| 457 | + | |
| 458 | + netif_start_queue(ndev); | |
| 459 | + | |
| 460 | + return 0; | |
| 461 | +} | |
| 462 | + | |
| 463 | +/** | |
| 464 | + * arc_emac_stop - Close the network device. | |
| 465 | + * @ndev: Pointer to the network device. | |
| 466 | + * | |
| 467 | + * This function stops the Tx queue, disables interrupts and frees the IRQ for | |
| 468 | + * the EMAC device. | |
| 469 | + * It also disconnects the PHY device associated with the EMAC device. | |
| 470 | + */ | |
| 471 | +static int arc_emac_stop(struct net_device *ndev) | |
| 472 | +{ | |
| 473 | + struct arc_emac_priv *priv = netdev_priv(ndev); | |
| 474 | + | |
| 475 | + napi_disable(&priv->napi); | |
| 476 | + netif_stop_queue(ndev); | |
| 477 | + | |
| 478 | + /* Disable interrupts */ | |
| 479 | + arc_reg_clr(priv, R_ENABLE, RXINT_MASK | ERR_MASK); | |
| 480 | + | |
| 481 | + /* Disable EMAC */ | |
| 482 | + arc_reg_clr(priv, R_CTRL, EN_MASK); | |
| 483 | + | |
| 484 | + return 0; | |
| 485 | +} | |
| 486 | + | |
| 487 | +/** | |
| 488 | + * arc_emac_stats - Get system network statistics. | |
| 489 | + * @ndev: Pointer to net_device structure. | |
| 490 | + * | |
| 491 | + * Returns the address of the device statistics structure. | |
| 492 | + * Statistics are updated in interrupt handler. | |
| 493 | + */ | |
| 494 | +static struct net_device_stats *arc_emac_stats(struct net_device *ndev) | |
| 495 | +{ | |
| 496 | + struct arc_emac_priv *priv = netdev_priv(ndev); | |
| 497 | + struct net_device_stats *stats = &priv->stats; | |
| 498 | + unsigned long miss, rxerr; | |
| 499 | + u8 rxcrc, rxfram, rxoflow; | |
| 500 | + | |
| 501 | + rxerr = arc_reg_get(priv, R_RXERR); | |
| 502 | + miss = arc_reg_get(priv, R_MISS); | |
| 503 | + | |
| 504 | + rxcrc = rxerr; | |
| 505 | + rxfram = rxerr >> 8; | |
| 506 | + rxoflow = rxerr >> 16; | |
| 507 | + | |
| 508 | + stats->rx_errors += miss; | |
| 509 | + stats->rx_errors += rxcrc + rxfram + rxoflow; | |
| 510 | + | |
| 511 | + stats->rx_over_errors += rxoflow; | |
| 512 | + stats->rx_frame_errors += rxfram; | |
| 513 | + stats->rx_crc_errors += rxcrc; | |
| 514 | + stats->rx_missed_errors += miss; | |
| 515 | + | |
| 516 | + return stats; | |
| 517 | +} | |
| 518 | + | |
| 519 | +/** | |
| 520 | + * arc_emac_tx - Starts the data transmission. | |
| 521 | + * @skb: sk_buff pointer that contains data to be Transmitted. | |
| 522 | + * @ndev: Pointer to net_device structure. | |
| 523 | + * | |
| 524 | + * returns: NETDEV_TX_OK, on success | |
| 525 | + * NETDEV_TX_BUSY, if any of the descriptors are not free. | |
| 526 | + * | |
| 527 | + * This function is invoked from upper layers to initiate transmission. | |
| 528 | + */ | |
| 529 | +static int arc_emac_tx(struct sk_buff *skb, struct net_device *ndev) | |
| 530 | +{ | |
| 531 | + struct arc_emac_priv *priv = netdev_priv(ndev); | |
| 532 | + unsigned int len, *txbd_curr = &priv->txbd_curr; | |
| 533 | + struct net_device_stats *stats = &priv->stats; | |
| 534 | + __le32 *info = &priv->txbd[*txbd_curr].info; | |
| 535 | + dma_addr_t addr; | |
| 536 | + | |
| 537 | + if (skb_padto(skb, ETH_ZLEN)) | |
| 538 | + return NETDEV_TX_OK; | |
| 539 | + | |
| 540 | + len = max_t(unsigned int, ETH_ZLEN, skb->len); | |
| 541 | + | |
| 542 | + /* EMAC still holds this buffer in its possession. | |
| 543 | + * CPU must not modify this buffer descriptor | |
| 544 | + */ | |
| 545 | + if (unlikely((le32_to_cpu(*info) & OWN_MASK) == FOR_EMAC)) { | |
| 546 | + netif_stop_queue(ndev); | |
| 547 | + return NETDEV_TX_BUSY; | |
| 548 | + } | |
| 549 | + | |
| 550 | + addr = dma_map_single(&ndev->dev, (void *)skb->data, len, | |
| 551 | + DMA_TO_DEVICE); | |
| 552 | + | |
| 553 | + if (unlikely(dma_mapping_error(&ndev->dev, addr))) { | |
| 554 | + stats->tx_dropped++; | |
| 555 | + stats->tx_errors++; | |
| 556 | + dev_kfree_skb(skb); | |
| 557 | + return NETDEV_TX_OK; | |
| 558 | + } | |
| 559 | + dma_unmap_addr_set(&priv->tx_buff[*txbd_curr], addr, addr); | |
| 560 | + dma_unmap_len_set(&priv->tx_buff[*txbd_curr], len, len); | |
| 561 | + | |
| 562 | + priv->tx_buff[*txbd_curr].skb = skb; | |
| 563 | + priv->txbd[*txbd_curr].data = cpu_to_le32(addr); | |
| 564 | + | |
| 565 | + /* Make sure pointer to data buffer is set */ | |
| 566 | + wmb(); | |
| 567 | + | |
| 568 | + *info = cpu_to_le32(FOR_EMAC | FIRST_OR_LAST_MASK | len); | |
| 569 | + | |
| 570 | + /* Increment index to point to the next BD */ | |
| 571 | + *txbd_curr = (*txbd_curr + 1) % TX_BD_NUM; | |
| 572 | + | |
| 573 | + /* Get "info" of the next BD */ | |
| 574 | + info = &priv->txbd[*txbd_curr].info; | |
| 575 | + | |
| 576 | + /* Check if if Tx BD ring is full - next BD is still owned by EMAC */ | |
| 577 | + if (unlikely((le32_to_cpu(*info) & OWN_MASK) == FOR_EMAC)) | |
| 578 | + netif_stop_queue(ndev); | |
| 579 | + | |
| 580 | + arc_reg_set(priv, R_STATUS, TXPL_MASK); | |
| 581 | + | |
| 582 | + skb_tx_timestamp(skb); | |
| 583 | + | |
| 584 | + return NETDEV_TX_OK; | |
| 585 | +} | |
| 586 | + | |
| 587 | +/** | |
| 588 | + * arc_emac_set_address - Set the MAC address for this device. | |
| 589 | + * @ndev: Pointer to net_device structure. | |
| 590 | + * @p: 6 byte Address to be written as MAC address. | |
| 591 | + * | |
| 592 | + * This function copies the HW address from the sockaddr structure to the | |
| 593 | + * net_device structure and updates the address in HW. | |
| 594 | + * | |
| 595 | + * returns: -EBUSY if the net device is busy or 0 if the address is set | |
| 596 | + * successfully. | |
| 597 | + */ | |
| 598 | +static int arc_emac_set_address(struct net_device *ndev, void *p) | |
| 599 | +{ | |
| 600 | + struct arc_emac_priv *priv = netdev_priv(ndev); | |
| 601 | + struct sockaddr *addr = p; | |
| 602 | + unsigned int addr_low, addr_hi; | |
| 603 | + | |
| 604 | + if (netif_running(ndev)) | |
| 605 | + return -EBUSY; | |
| 606 | + | |
| 607 | + if (!is_valid_ether_addr(addr->sa_data)) | |
| 608 | + return -EADDRNOTAVAIL; | |
| 609 | + | |
| 610 | + memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len); | |
| 611 | + | |
| 612 | + addr_low = le32_to_cpu(*(__le32 *) &ndev->dev_addr[0]); | |
| 613 | + addr_hi = le16_to_cpu(*(__le16 *) &ndev->dev_addr[4]); | |
| 614 | + | |
| 615 | + arc_reg_set(priv, R_ADDRL, addr_low); | |
| 616 | + arc_reg_set(priv, R_ADDRH, addr_hi); | |
| 617 | + | |
| 618 | + return 0; | |
| 619 | +} | |
| 620 | + | |
| 621 | +static const struct net_device_ops arc_emac_netdev_ops = { | |
| 622 | + .ndo_open = arc_emac_open, | |
| 623 | + .ndo_stop = arc_emac_stop, | |
| 624 | + .ndo_start_xmit = arc_emac_tx, | |
| 625 | + .ndo_set_mac_address = arc_emac_set_address, | |
| 626 | + .ndo_get_stats = arc_emac_stats, | |
| 627 | +}; | |
| 628 | + | |
| 629 | +static int arc_emac_probe(struct platform_device *pdev) | |
| 630 | +{ | |
| 631 | + struct resource res_regs, res_irq; | |
| 632 | + struct device_node *phy_node; | |
| 633 | + struct arc_emac_priv *priv; | |
| 634 | + struct net_device *ndev; | |
| 635 | + const char *mac_addr; | |
| 636 | + unsigned int id, clock_frequency; | |
| 637 | + int err; | |
| 638 | + | |
| 639 | + if (!pdev->dev.of_node) | |
| 640 | + return -ENODEV; | |
| 641 | + | |
| 642 | + /* Get PHY from device tree */ | |
| 643 | + phy_node = of_parse_phandle(pdev->dev.of_node, "phy", 0); | |
| 644 | + if (!phy_node) { | |
| 645 | + dev_err(&pdev->dev, "failed to retrieve phy description from device tree\n"); | |
| 646 | + return -ENODEV; | |
| 647 | + } | |
| 648 | + | |
| 649 | + /* Get EMAC registers base address from device tree */ | |
| 650 | + err = of_address_to_resource(pdev->dev.of_node, 0, &res_regs); | |
| 651 | + if (err) { | |
| 652 | + dev_err(&pdev->dev, "failed to retrieve registers base from device tree\n"); | |
| 653 | + return -ENODEV; | |
| 654 | + } | |
| 655 | + | |
| 656 | + /* Get CPU clock frequency from device tree */ | |
| 657 | + if (of_property_read_u32(pdev->dev.of_node, "clock-frequency", | |
| 658 | + &clock_frequency)) { | |
| 659 | + dev_err(&pdev->dev, "failed to retrieve <clock-frequency> from device tree\n"); | |
| 660 | + return -EINVAL; | |
| 661 | + } | |
| 662 | + | |
| 663 | + /* Get IRQ from device tree */ | |
| 664 | + err = of_irq_to_resource(pdev->dev.of_node, 0, &res_irq); | |
| 665 | + if (!err) { | |
| 666 | + dev_err(&pdev->dev, "failed to retrieve <irq> value from device tree\n"); | |
| 667 | + return -ENODEV; | |
| 668 | + } | |
| 669 | + | |
| 670 | + ndev = alloc_etherdev(sizeof(struct arc_emac_priv)); | |
| 671 | + if (!ndev) | |
| 672 | + return -ENOMEM; | |
| 673 | + | |
| 674 | + SET_NETDEV_DEV(ndev, &pdev->dev); | |
| 675 | + | |
| 676 | + ndev->netdev_ops = &arc_emac_netdev_ops; | |
| 677 | + ndev->ethtool_ops = &arc_emac_ethtool_ops; | |
| 678 | + ndev->watchdog_timeo = TX_TIMEOUT; | |
| 679 | + /* FIXME :: no multicast support yet */ | |
| 680 | + ndev->flags &= ~IFF_MULTICAST; | |
| 681 | + | |
| 682 | + priv = netdev_priv(ndev); | |
| 683 | + priv->dev = &pdev->dev; | |
| 684 | + priv->ndev = ndev; | |
| 685 | + | |
| 686 | + priv->regs = devm_ioremap_resource(&pdev->dev, &res_regs); | |
| 687 | + if (IS_ERR(priv->regs)) { | |
| 688 | + err = PTR_ERR(priv->regs); | |
| 689 | + goto out; | |
| 690 | + } | |
| 691 | + dev_dbg(&pdev->dev, "Registers base address is 0x%p\n", priv->regs); | |
| 692 | + | |
| 693 | + id = arc_reg_get(priv, R_ID); | |
| 694 | + | |
| 695 | + /* Check for EMAC revision 5 or 7, magic number */ | |
| 696 | + if (!(id == 0x0005fd02 || id == 0x0007fd02)) { | |
| 697 | + dev_err(&pdev->dev, "ARC EMAC not detected, id=0x%x\n", id); | |
| 698 | + err = -ENODEV; | |
| 699 | + goto out; | |
| 700 | + } | |
| 701 | + dev_info(&pdev->dev, "ARC EMAC detected with id: 0x%x\n", id); | |
| 702 | + | |
| 703 | + /* Set poll rate so that it polls every 1 ms */ | |
| 704 | + arc_reg_set(priv, R_POLLRATE, clock_frequency / 1000000); | |
| 705 | + | |
| 706 | + /* Get max speed of operation from device tree */ | |
| 707 | + if (of_property_read_u32(pdev->dev.of_node, "max-speed", | |
| 708 | + &priv->max_speed)) { | |
| 709 | + dev_err(&pdev->dev, "failed to retrieve <max-speed> from device tree\n"); | |
| 710 | + err = -EINVAL; | |
| 711 | + goto out; | |
| 712 | + } | |
| 713 | + | |
| 714 | + ndev->irq = res_irq.start; | |
| 715 | + dev_info(&pdev->dev, "IRQ is %d\n", ndev->irq); | |
| 716 | + | |
| 717 | + /* Register interrupt handler for device */ | |
| 718 | + err = devm_request_irq(&pdev->dev, ndev->irq, arc_emac_intr, 0, | |
| 719 | + ndev->name, ndev); | |
| 720 | + if (err) { | |
| 721 | + dev_err(&pdev->dev, "could not allocate IRQ\n"); | |
| 722 | + goto out; | |
| 723 | + } | |
| 724 | + | |
| 725 | + /* Get MAC address from device tree */ | |
| 726 | + mac_addr = of_get_mac_address(pdev->dev.of_node); | |
| 727 | + | |
| 728 | + if (!mac_addr || !is_valid_ether_addr(mac_addr)) | |
| 729 | + eth_hw_addr_random(ndev); | |
| 730 | + else | |
| 731 | + memcpy(ndev->dev_addr, mac_addr, ETH_ALEN); | |
| 732 | + | |
| 733 | + dev_info(&pdev->dev, "MAC address is now %pM\n", ndev->dev_addr); | |
| 734 | + | |
| 735 | + /* Do 1 allocation instead of 2 separate ones for Rx and Tx BD rings */ | |
| 736 | + priv->rxbd = dmam_alloc_coherent(&pdev->dev, RX_RING_SZ + TX_RING_SZ, | |
| 737 | + &priv->rxbd_dma, GFP_KERNEL); | |
| 738 | + | |
| 739 | + if (!priv->rxbd) { | |
| 740 | + dev_err(&pdev->dev, "failed to allocate data buffers\n"); | |
| 741 | + err = -ENOMEM; | |
| 742 | + goto out; | |
| 743 | + } | |
| 744 | + | |
| 745 | + priv->txbd = priv->rxbd + RX_BD_NUM; | |
| 746 | + | |
| 747 | + priv->txbd_dma = priv->rxbd_dma + RX_RING_SZ; | |
| 748 | + dev_dbg(&pdev->dev, "EMAC Device addr: Rx Ring [0x%x], Tx Ring[%x]\n", | |
| 749 | + (unsigned int)priv->rxbd_dma, (unsigned int)priv->txbd_dma); | |
| 750 | + | |
| 751 | + err = arc_mdio_probe(pdev, priv); | |
| 752 | + if (err) { | |
| 753 | + dev_err(&pdev->dev, "failed to probe MII bus\n"); | |
| 754 | + goto out; | |
| 755 | + } | |
| 756 | + | |
| 757 | + priv->phy_dev = of_phy_connect(ndev, phy_node, arc_emac_adjust_link, 0, | |
| 758 | + PHY_INTERFACE_MODE_MII); | |
| 759 | + if (!priv->phy_dev) { | |
| 760 | + dev_err(&pdev->dev, "of_phy_connect() failed\n"); | |
| 761 | + err = -ENODEV; | |
| 762 | + goto out; | |
| 763 | + } | |
| 764 | + | |
| 765 | + dev_info(&pdev->dev, "connected to %s phy with id 0x%x\n", | |
| 766 | + priv->phy_dev->drv->name, priv->phy_dev->phy_id); | |
| 767 | + | |
| 768 | + netif_napi_add(ndev, &priv->napi, arc_emac_poll, ARC_EMAC_NAPI_WEIGHT); | |
| 769 | + | |
| 770 | + err = register_netdev(ndev); | |
| 771 | + if (err) { | |
| 772 | + netif_napi_del(&priv->napi); | |
| 773 | + dev_err(&pdev->dev, "failed to register network device\n"); | |
| 774 | + goto out; | |
| 775 | + } | |
| 776 | + | |
| 777 | + return 0; | |
| 778 | + | |
| 779 | +out: | |
| 780 | + free_netdev(ndev); | |
| 781 | + return err; | |
| 782 | +} | |
| 783 | + | |
| 784 | +static int arc_emac_remove(struct platform_device *pdev) | |
| 785 | +{ | |
| 786 | + struct net_device *ndev = platform_get_drvdata(pdev); | |
| 787 | + struct arc_emac_priv *priv = netdev_priv(ndev); | |
| 788 | + | |
| 789 | + phy_disconnect(priv->phy_dev); | |
| 790 | + priv->phy_dev = NULL; | |
| 791 | + arc_mdio_remove(priv); | |
| 792 | + unregister_netdev(ndev); | |
| 793 | + netif_napi_del(&priv->napi); | |
| 794 | + free_netdev(ndev); | |
| 795 | + | |
| 796 | + return 0; | |
| 797 | +} | |
| 798 | + | |
| 799 | +static const struct of_device_id arc_emac_dt_ids[] = { | |
| 800 | + { .compatible = "snps,arc-emac" }, | |
| 801 | + { /* Sentinel */ } | |
| 802 | +}; | |
| 803 | +MODULE_DEVICE_TABLE(of, arc_emac_dt_ids); | |
| 804 | + | |
| 805 | +static struct platform_driver arc_emac_driver = { | |
| 806 | + .probe = arc_emac_probe, | |
| 807 | + .remove = arc_emac_remove, | |
| 808 | + .driver = { | |
| 809 | + .name = DRV_NAME, | |
| 810 | + .owner = THIS_MODULE, | |
| 811 | + .of_match_table = arc_emac_dt_ids, | |
| 812 | + }, | |
| 813 | +}; | |
| 814 | + | |
| 815 | +module_platform_driver(arc_emac_driver); | |
| 816 | + | |
| 817 | +MODULE_AUTHOR("Alexey Brodkin <abrodkin@synopsys.com>"); | |
| 818 | +MODULE_DESCRIPTION("ARC EMAC driver"); | |
| 819 | +MODULE_LICENSE("GPL"); | |
| @@ -0,0 +1,152 @@ | ||
| 1 | +/* | |
| 2 | + * Copyright (C) 2004-2013 Synopsys, Inc. (www.synopsys.com) | |
| 3 | + * | |
| 4 | + * MDIO implementation for ARC EMAC | |
| 5 | + */ | |
| 6 | + | |
| 7 | +#include <linux/delay.h> | |
| 8 | +#include <linux/of_mdio.h> | |
| 9 | +#include <linux/platform_device.h> | |
| 10 | + | |
| 11 | +#include "emac.h" | |
| 12 | + | |
| 13 | +/* Number of seconds we wait for "MDIO complete" flag to appear */ | |
| 14 | +#define ARC_MDIO_COMPLETE_POLL_COUNT 1 | |
| 15 | + | |
| 16 | +/** | |
| 17 | + * arc_mdio_complete_wait - Waits until MDIO transaction is completed. | |
| 18 | + * @priv: Pointer to ARC EMAC private data structure. | |
| 19 | + * | |
| 20 | + * returns: 0 on success, -ETIMEDOUT on a timeout. | |
| 21 | + */ | |
| 22 | +static int arc_mdio_complete_wait(struct arc_emac_priv *priv) | |
| 23 | +{ | |
| 24 | + unsigned int i; | |
| 25 | + | |
| 26 | + for (i = 0; i < ARC_MDIO_COMPLETE_POLL_COUNT * 40; i++) { | |
| 27 | + unsigned int status = arc_reg_get(priv, R_STATUS); | |
| 28 | + | |
| 29 | + status &= MDIO_MASK; | |
| 30 | + | |
| 31 | + if (status) { | |
| 32 | + /* Reset "MDIO complete" flag */ | |
| 33 | + arc_reg_set(priv, R_STATUS, status); | |
| 34 | + return 0; | |
| 35 | + } | |
| 36 | + | |
| 37 | + msleep(25); | |
| 38 | + } | |
| 39 | + | |
| 40 | + return -ETIMEDOUT; | |
| 41 | +} | |
| 42 | + | |
| 43 | +/** | |
| 44 | + * arc_mdio_read - MDIO interface read function. | |
| 45 | + * @bus: Pointer to MII bus structure. | |
| 46 | + * @phy_addr: Address of the PHY device. | |
| 47 | + * @reg_num: PHY register to read. | |
| 48 | + * | |
| 49 | + * returns: The register contents on success, -ETIMEDOUT on a timeout. | |
| 50 | + * | |
| 51 | + * Reads the contents of the requested register from the requested PHY | |
| 52 | + * address. | |
| 53 | + */ | |
| 54 | +static int arc_mdio_read(struct mii_bus *bus, int phy_addr, int reg_num) | |
| 55 | +{ | |
| 56 | + struct arc_emac_priv *priv = bus->priv; | |
| 57 | + unsigned int value; | |
| 58 | + int error; | |
| 59 | + | |
| 60 | + arc_reg_set(priv, R_MDIO, | |
| 61 | + 0x60020000 | (phy_addr << 23) | (reg_num << 18)); | |
| 62 | + | |
| 63 | + error = arc_mdio_complete_wait(priv); | |
| 64 | + if (error < 0) | |
| 65 | + return error; | |
| 66 | + | |
| 67 | + value = arc_reg_get(priv, R_MDIO) & 0xffff; | |
| 68 | + | |
| 69 | + dev_dbg(priv->dev, "arc_mdio_read(phy_addr=%i, reg_num=%x) = %x\n", | |
| 70 | + phy_addr, reg_num, value); | |
| 71 | + | |
| 72 | + return value; | |
| 73 | +} | |
| 74 | + | |
| 75 | +/** | |
| 76 | + * arc_mdio_write - MDIO interface write function. | |
| 77 | + * @bus: Pointer to MII bus structure. | |
| 78 | + * @phy_addr: Address of the PHY device. | |
| 79 | + * @reg_num: PHY register to write to. | |
| 80 | + * @value: Value to be written into the register. | |
| 81 | + * | |
| 82 | + * returns: 0 on success, -ETIMEDOUT on a timeout. | |
| 83 | + * | |
| 84 | + * Writes the value to the requested register. | |
| 85 | + */ | |
| 86 | +static int arc_mdio_write(struct mii_bus *bus, int phy_addr, | |
| 87 | + int reg_num, u16 value) | |
| 88 | +{ | |
| 89 | + struct arc_emac_priv *priv = bus->priv; | |
| 90 | + | |
| 91 | + dev_dbg(priv->dev, | |
| 92 | + "arc_mdio_write(phy_addr=%i, reg_num=%x, value=%x)\n", | |
| 93 | + phy_addr, reg_num, value); | |
| 94 | + | |
| 95 | + arc_reg_set(priv, R_MDIO, | |
| 96 | + 0x50020000 | (phy_addr << 23) | (reg_num << 18) | value); | |
| 97 | + | |
| 98 | + return arc_mdio_complete_wait(priv); | |
| 99 | +} | |
| 100 | + | |
| 101 | +/** | |
| 102 | + * arc_mdio_probe - MDIO probe function. | |
| 103 | + * @pdev: Pointer to platform device. | |
| 104 | + * @priv: Pointer to ARC EMAC private data structure. | |
| 105 | + * | |
| 106 | + * returns: 0 on success, -ENOMEM when mdiobus_alloc | |
| 107 | + * (to allocate memory for MII bus structure) fails. | |
| 108 | + * | |
| 109 | + * Sets up and registers the MDIO interface. | |
| 110 | + */ | |
| 111 | +int arc_mdio_probe(struct platform_device *pdev, struct arc_emac_priv *priv) | |
| 112 | +{ | |
| 113 | + struct mii_bus *bus; | |
| 114 | + int error; | |
| 115 | + | |
| 116 | + bus = mdiobus_alloc(); | |
| 117 | + if (!bus) | |
| 118 | + return -ENOMEM; | |
| 119 | + | |
| 120 | + priv->bus = bus; | |
| 121 | + bus->priv = priv; | |
| 122 | + bus->parent = priv->dev; | |
| 123 | + bus->name = "Synopsys MII Bus", | |
| 124 | + bus->read = &arc_mdio_read; | |
| 125 | + bus->write = &arc_mdio_write; | |
| 126 | + | |
| 127 | + snprintf(bus->id, MII_BUS_ID_SIZE, "%s", pdev->name); | |
| 128 | + | |
| 129 | + error = of_mdiobus_register(bus, pdev->dev.of_node); | |
| 130 | + if (error) { | |
| 131 | + dev_err(priv->dev, "cannot register MDIO bus %s\n", bus->name); | |
| 132 | + mdiobus_free(bus); | |
| 133 | + return error; | |
| 134 | + } | |
| 135 | + | |
| 136 | + return 0; | |
| 137 | +} | |
| 138 | + | |
| 139 | +/** | |
| 140 | + * arc_mdio_remove - MDIO remove function. | |
| 141 | + * @priv: Pointer to ARC EMAC private data structure. | |
| 142 | + * | |
| 143 | + * Unregisters the MDIO and frees any associate memory for MII bus. | |
| 144 | + */ | |
| 145 | +int arc_mdio_remove(struct arc_emac_priv *priv) | |
| 146 | +{ | |
| 147 | + mdiobus_unregister(priv->bus); | |
| 148 | + mdiobus_free(priv->bus); | |
| 149 | + priv->bus = NULL; | |
| 150 | + | |
| 151 | + return 0; | |
| 152 | +} | |
| @@ -22,7 +22,6 @@ config ATL2 · 21 unmodified lines | ||
| 22 | 22 | tristate "Atheros L2 Fast Ethernet support" |
| 23 | 23 | depends on PCI |
| 24 | 24 | select CRC32 |
| 25 | − select NET_CORE | |
| 26 | 25 | select MII |
| 27 | 26 | ---help--- |
| 28 | 27 | This driver supports the Atheros L2 fast ethernet adapter. |
| @@ -34,7 +33,6 @@ config ATL1 · 5 unmodified lines | ||
| 34 | 33 | tristate "Atheros/Attansic L1 Gigabit Ethernet support" |
| 35 | 34 | depends on PCI |
| 36 | 35 | select CRC32 |
| 37 | − select NET_CORE | |
| 38 | 36 | select MII |
| 39 | 37 | ---help--- |
| 40 | 38 | This driver supports the Atheros/Attansic L1 gigabit ethernet |
| @@ -47,7 +45,6 @@ config ATL1E · 6 unmodified lines | ||
| 47 | 45 | tristate "Atheros L1E Gigabit Ethernet support" |
| 48 | 46 | depends on PCI |
| 49 | 47 | select CRC32 |
| 50 | − select NET_CORE | |
| 51 | 48 | select MII |
| 52 | 49 | ---help--- |
| 53 | 50 | This driver supports the Atheros L1E gigabit ethernet adapter. |
| @@ -59,7 +56,6 @@ config ATL1C · 5 unmodified lines | ||
| 59 | 56 | tristate "Atheros L1C Gigabit Ethernet support" |
| 60 | 57 | depends on PCI |
| 61 | 58 | select CRC32 |
| 62 | − select NET_CORE | |
| 63 | 59 | select MII |
| 64 | 60 | ---help--- |
| 65 | 61 | This driver supports the Atheros L1C gigabit ethernet adapter. |
| @@ -71,7 +67,6 @@ config ALX · 5 unmodified lines | ||
| 71 | 67 | tristate "Qualcomm Atheros AR816x/AR817x support" |
| 72 | 68 | depends on PCI |
| 73 | 69 | select CRC32 |
| 74 | − select NET_CORE | |
| 75 | 70 | select MDIO |
| 76 | 71 | help |
| 77 | 72 | This driver supports the Qualcomm Atheros L1F ethernet adapter, |
| @@ -85,16 +85,16 @@ struct alx_priv { · 84 unmodified lines | ||
| 85 | 85 | struct { |
| 86 | 86 | dma_addr_t dma; |
| 87 | 87 | void *virt; |
| 88 | − int size; | |
| 88 | + unsigned int size; | |
| 89 | 89 | } descmem; |
| 90 | 90 | |
| 91 | 91 | /* protect int_mask updates */ |
| 92 | 92 | spinlock_t irq_lock; |
| 93 | 93 | u32 int_mask; |
| 94 | 94 | |
| 95 | − int tx_ringsz; | |
| 96 | − int rx_ringsz; | |
| 97 | − int rxbuf_size; | |
| 95 | + unsigned int tx_ringsz; | |
| 96 | + unsigned int rx_ringsz; | |
| 97 | + unsigned int rxbuf_size; | |
| 98 | 98 | |
| 99 | 99 | struct napi_struct napi; |
| 100 | 100 | struct alx_tx_queue txq; |
| @@ -46,21 +46,37 @@ · 45 unmodified lines | ||
| 46 | 46 | #include "reg.h" |
| 47 | 47 | #include "hw.h" |
| 48 | 48 | |
| 49 | +static u32 alx_get_supported_speeds(struct alx_hw *hw) | |
| 50 | +{ | |
| 51 | + u32 supported = SUPPORTED_10baseT_Half | | |
| 52 | + SUPPORTED_10baseT_Full | | |
| 53 | + SUPPORTED_100baseT_Half | | |
| 54 | + SUPPORTED_100baseT_Full; | |
| 55 | + | |
| 56 | + if (alx_hw_giga(hw)) | |
| 57 | + supported |= SUPPORTED_1000baseT_Full; | |
| 58 | + | |
| 59 | + BUILD_BUG_ON(SUPPORTED_10baseT_Half != ADVERTISED_10baseT_Half); | |
| 60 | + BUILD_BUG_ON(SUPPORTED_10baseT_Full != ADVERTISED_10baseT_Full); | |
| 61 | + BUILD_BUG_ON(SUPPORTED_100baseT_Half != ADVERTISED_100baseT_Half); | |
| 62 | + BUILD_BUG_ON(SUPPORTED_100baseT_Full != ADVERTISED_100baseT_Full); | |
| 63 | + BUILD_BUG_ON(SUPPORTED_1000baseT_Full != ADVERTISED_1000baseT_Full); | |
| 64 | + | |
| 65 | + return supported; | |
| 66 | +} | |
| 49 | 67 | |
| 50 | 68 | static int alx_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) |
| 51 | 69 | { |
| 52 | 70 | struct alx_priv *alx = netdev_priv(netdev); |
| 53 | 71 | struct alx_hw *hw = &alx->hw; |
| 54 | 72 | |
| 55 | − ecmd->supported = SUPPORTED_10baseT_Half | | |
| 56 | − SUPPORTED_10baseT_Full | | |
| 57 | − SUPPORTED_100baseT_Half | | |
| 58 | − SUPPORTED_100baseT_Full | | |
| 59 | − SUPPORTED_Autoneg | | |
| 73 | + ecmd->supported = SUPPORTED_Autoneg | | |
| 60 | 74 | SUPPORTED_TP | |
| 61 | − SUPPORTED_Pause; | |
| 75 | + SUPPORTED_Pause | | |
| 76 | + SUPPORTED_Asym_Pause; | |
| 62 | 77 | if (alx_hw_giga(hw)) |
| 63 | 78 | ecmd->supported |= SUPPORTED_1000baseT_Full; |
| 79 | + ecmd->supported |= alx_get_supported_speeds(hw); | |
| 64 | 80 | |
| 65 | 81 | ecmd->advertising = ADVERTISED_TP; |
| 66 | 82 | if (hw->adv_cfg & ADVERTISED_Autoneg) |
| @@ -68,6 +84,7 @@ static int alx_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) · 1 unmodified line | ||
| 68 | 84 | |
| 69 | 85 | ecmd->port = PORT_TP; |
| 70 | 86 | ecmd->phy_address = 0; |
| 87 | + | |
| 71 | 88 | if (hw->adv_cfg & ADVERTISED_Autoneg) |
| 72 | 89 | ecmd->autoneg = AUTONEG_ENABLE; |
| 73 | 90 | else |
| @@ -85,14 +102,8 @@ static int alx_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) · 11 unmodified lines | ||
| 85 | 102 | } |
| 86 | 103 | } |
| 87 | 104 | |
| 88 | − if (hw->link_speed != SPEED_UNKNOWN) { | |
| 89 | − ethtool_cmd_speed_set(ecmd, | |
| 90 | − hw->link_speed - hw->link_speed % 10); | |
| 91 | − ecmd->duplex = hw->link_speed % 10; | |
| 92 | − } else { | |
| 93 | − ethtool_cmd_speed_set(ecmd, SPEED_UNKNOWN); | |
| 94 | − ecmd->duplex = DUPLEX_UNKNOWN; | |
| 95 | − } | |
| 105 | + ethtool_cmd_speed_set(ecmd, hw->link_speed); | |
| 106 | + ecmd->duplex = hw->duplex; | |
| 96 | 107 | |
| 97 | 108 | return 0; |
| 98 | 109 | } |
| @@ -106,28 +117,15 @@ static int alx_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) · 7 unmodified lines | ||
| 106 | 117 | ASSERT_RTNL(); |
| 107 | 118 | |
| 108 | 119 | if (ecmd->autoneg == AUTONEG_ENABLE) { |
| 109 | − if (ecmd->advertising & ADVERTISED_1000baseT_Half) | |
| 120 | + if (ecmd->advertising & ~alx_get_supported_speeds(hw)) | |
| 110 | 121 | return -EINVAL; |
| 111 | 122 | adv_cfg = ecmd->advertising | ADVERTISED_Autoneg; |
| 112 | 123 | } else { |
| 113 | − int speed = ethtool_cmd_speed(ecmd); | |
| 114 | − | |
| 115 | − switch (speed + ecmd->duplex) { | |
| 116 | − case SPEED_10 + DUPLEX_HALF: | |
| 117 | − adv_cfg = ADVERTISED_10baseT_Half; | |
| 118 | − break; | |
| 119 | − case SPEED_10 + DUPLEX_FULL: | |
| 120 | − adv_cfg = ADVERTISED_10baseT_Full; | |
| 121 | − break; | |
| 122 | − case SPEED_100 + DUPLEX_HALF: | |
| 123 | − adv_cfg = ADVERTISED_100baseT_Half; | |
| 124 | − break; | |
| 125 | − case SPEED_100 + DUPLEX_FULL: | |
| 126 | − adv_cfg = ADVERTISED_100baseT_Full; | |
| 127 | − break; | |
| 128 | − default: | |
| 124 | + adv_cfg = alx_speed_to_ethadv(ethtool_cmd_speed(ecmd), | |
| 125 | + ecmd->duplex); | |
| 126 | + | |
| 127 | + if (!adv_cfg || adv_cfg == ADVERTISED_1000baseT_Full) | |
| 129 | 128 | return -EINVAL; |
| 130 | − } | |
| 131 | 129 | } |
| 132 | 130 | |
| 133 | 131 | hw->adv_cfg = adv_cfg; |
| @@ -140,21 +138,10 @@ static void alx_get_pauseparam(struct net_device *netdev, · 6 unmodified lines | ||
| 140 | 138 | struct alx_priv *alx = netdev_priv(netdev); |
| 141 | 139 | struct alx_hw *hw = &alx->hw; |
| 142 | 140 | |
| 143 | − if (hw->flowctrl & ALX_FC_ANEG && | |
| 144 | − hw->adv_cfg & ADVERTISED_Autoneg) | |
| 145 | − pause->autoneg = AUTONEG_ENABLE; | |
| 146 | − else | |
| 147 | − pause->autoneg = AUTONEG_DISABLE; | |
| 148 | − | |
| 149 | − if (hw->flowctrl & ALX_FC_TX) | |
| 150 | − pause->tx_pause = 1; | |
| 151 | − else | |
| 152 | − pause->tx_pause = 0; | |
| 153 | − | |
| 154 | − if (hw->flowctrl & ALX_FC_RX) | |
| 155 | − pause->rx_pause = 1; | |
| 156 | − else | |
| 157 | − pause->rx_pause = 0; | |
| 141 | + pause->autoneg = !!(hw->flowctrl & ALX_FC_ANEG && | |
| 142 | + hw->adv_cfg & ADVERTISED_Autoneg); | |
| 143 | + pause->tx_pause = !!(hw->flowctrl & ALX_FC_TX); | |
| 144 | + pause->rx_pause = !!(hw->flowctrl & ALX_FC_RX); | |
| 158 | 145 | } |
| 159 | 146 | |
| 160 | 147 | |
| @@ -187,7 +174,8 @@ static int alx_set_pauseparam(struct net_device *netdev, · 26 unmodified lines | ||
| 187 | 174 | |
| 188 | 175 | if (reconfig_phy) { |
| 189 | 176 | err = alx_setup_speed_duplex(hw, hw->adv_cfg, fc); |
| 190 | − return err; | |
| 177 | + if (err) | |
| 178 | + return err; | |
| 191 | 179 | } |
| 192 | 180 | |
| 193 | 181 | /* flow control on mac */ |
| @@ -213,60 +201,12 @@ static void alx_set_msglevel(struct net_device *netdev, u32 data) · 19 unmodified lines | ||
| 213 | 201 | alx->msg_enable = data; |
| 214 | 202 | } |
| 215 | 203 | |
| 216 | −static void alx_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) | |
| 217 | −{ | |
| 218 | − struct alx_priv *alx = netdev_priv(netdev); | |
| 219 | − struct alx_hw *hw = &alx->hw; | |
| 220 | − | |
| 221 | − wol->supported = WAKE_MAGIC | WAKE_PHY; | |
| 222 | − wol->wolopts = 0; | |
| 223 | − | |
| 224 | − if (hw->sleep_ctrl & ALX_SLEEP_WOL_MAGIC) | |
| 225 | − wol->wolopts |= WAKE_MAGIC; | |
| 226 | − if (hw->sleep_ctrl & ALX_SLEEP_WOL_PHY) | |
| 227 | − wol->wolopts |= WAKE_PHY; | |
| 228 | −} | |
| 229 | − | |
| 230 | −static int alx_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) | |
| 231 | −{ | |
| 232 | − struct alx_priv *alx = netdev_priv(netdev); | |
| 233 | − struct alx_hw *hw = &alx->hw; | |
| 234 | − | |
| 235 | − if (wol->wolopts & (WAKE_ARP | WAKE_MAGICSECURE | | |
| 236 | − WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)) | |
| 237 | − return -EOPNOTSUPP; | |
| 238 | − | |
| 239 | − hw->sleep_ctrl = 0; | |
| 240 | − | |
| 241 | − if (wol->wolopts & WAKE_MAGIC) | |
| 242 | − hw->sleep_ctrl |= ALX_SLEEP_WOL_MAGIC; | |
| 243 | − if (wol->wolopts & WAKE_PHY) | |
| 244 | − hw->sleep_ctrl |= ALX_SLEEP_WOL_PHY; | |
| 245 | − | |
| 246 | − device_set_wakeup_enable(&alx->hw.pdev->dev, hw->sleep_ctrl); | |
| 247 | − | |
| 248 | − return 0; | |
| 249 | −} | |
| 250 | − | |
| 251 | −static void alx_get_drvinfo(struct net_device *netdev, | |
| 252 | − struct ethtool_drvinfo *drvinfo) | |
| 253 | −{ | |
| 254 | − struct alx_priv *alx = netdev_priv(netdev); | |
| 255 | − | |
| 256 | − strlcpy(drvinfo->driver, alx_drv_name, sizeof(drvinfo->driver)); | |
| 257 | − strlcpy(drvinfo->bus_info, pci_name(alx->hw.pdev), | |
| 258 | − sizeof(drvinfo->bus_info)); | |
| 259 | −} | |
| 260 | − | |
| 261 | 204 | const struct ethtool_ops alx_ethtool_ops = { |
| 262 | 205 | .get_settings = alx_get_settings, |
| 263 | 206 | .set_settings = alx_set_settings, |
| 264 | 207 | .get_pauseparam = alx_get_pauseparam, |
| 265 | 208 | .set_pauseparam = alx_set_pauseparam, |
| 266 | − .get_drvinfo = alx_get_drvinfo, | |
| 267 | 209 | .get_msglevel = alx_get_msglevel, |
| 268 | 210 | .set_msglevel = alx_set_msglevel, |
| 269 | − .get_wol = alx_get_wol, | |
| 270 | − .set_wol = alx_set_wol, | |
| 271 | 211 | .get_link = ethtool_op_get_link, |
| 272 | 212 | }; |
| @@ -282,8 +282,8 @@ static bool alx_read_macaddr(struct alx_hw *hw, u8 *addr) · 281 unmodified lines | ||
| 282 | 282 | mac1 = alx_read_mem32(hw, ALX_STAD1); |
| 283 | 283 | |
| 284 | 284 | /* addr should be big-endian */ |
| 285 | − *(__be32 *)(addr + 2) = cpu_to_be32(mac0); | |
| 286 | − *(__be16 *)addr = cpu_to_be16(mac1); | |
| 285 | + put_unaligned(cpu_to_be32(mac0), (__be32 *)(addr + 2)); | |
| 286 | + put_unaligned(cpu_to_be16(mac1), (__be16 *)addr); | |
| 287 | 287 | |
| 288 | 288 | return is_valid_ether_addr(addr); |
| 289 | 289 | } |
| @@ -326,22 +326,12 @@ void alx_set_macaddr(struct alx_hw *hw, const u8 *addr) · 36 unmodified lines | ||
| 326 | 326 | u32 val; |
| 327 | 327 | |
| 328 | 328 | /* for example: 00-0B-6A-F6-00-DC * STAD0=6AF600DC, STAD1=000B */ |
| 329 | − val = be32_to_cpu(*(__be32 *)(addr + 2)); | |
| 329 | + val = be32_to_cpu(get_unaligned((__be32 *)(addr + 2))); | |
| 330 | 330 | alx_write_mem32(hw, ALX_STAD0, val); |
| 331 | − val = be16_to_cpu(*(__be16 *)addr); | |
| 331 | + val = be16_to_cpu(get_unaligned((__be16 *)addr)); | |
| 332 | 332 | alx_write_mem32(hw, ALX_STAD1, val); |
| 333 | 333 | } |
| 334 | 334 | |
| 335 | −static void alx_enable_osc(struct alx_hw *hw) | |
| 336 | −{ | |
| 337 | − u32 val; | |
| 338 | − | |
| 339 | − /* rising edge */ | |
| 340 | − val = alx_read_mem32(hw, ALX_MISC); | |
| 341 | − alx_write_mem32(hw, ALX_MISC, val & ~ALX_MISC_INTNLOSC_OPEN); | |
| 342 | − alx_write_mem32(hw, ALX_MISC, val | ALX_MISC_INTNLOSC_OPEN); | |
| 343 | −} | |
| 344 | − | |
| 345 | 335 | static void alx_reset_osc(struct alx_hw *hw, u8 rev) |
| 346 | 336 | { |
| 347 | 337 | u32 val, val2; |
| @@ -624,12 +614,12 @@ void alx_start_mac(struct alx_hw *hw) · 276 unmodified lines | ||
| 624 | 614 | alx_write_mem32(hw, ALX_TXQ0, txq | ALX_TXQ0_EN); |
| 625 | 615 | |
| 626 | 616 | mac = hw->rx_ctrl; |
| 627 | − if (hw->link_speed % 10 == DUPLEX_FULL) | |
| 617 | + if (hw->duplex == DUPLEX_FULL) | |
| 628 | 618 | mac |= ALX_MAC_CTRL_FULLD; |
| 629 | 619 | else |
| 630 | 620 | mac &= ~ALX_MAC_CTRL_FULLD; |
| 631 | 621 | ALX_SET_FIELD(mac, ALX_MAC_CTRL_SPEED, |
| 632 | − hw->link_speed >= SPEED_1000 ? ALX_MAC_CTRL_SPEED_1000 : | |
| 622 | + hw->link_speed == SPEED_1000 ? ALX_MAC_CTRL_SPEED_1000 : | |
| 633 | 623 | ALX_MAC_CTRL_SPEED_10_100); |
| 634 | 624 | mac |= ALX_MAC_CTRL_TX_EN | ALX_MAC_CTRL_RX_EN; |
| 635 | 625 | hw->rx_ctrl = mac; |
| @@ -790,28 +780,22 @@ void alx_post_phy_link(struct alx_hw *hw) · 154 unmodified lines | ||
| 790 | 780 | u16 phy_val, len, agc; |
| 791 | 781 | u8 revid = alx_hw_revision(hw); |
| 792 | 782 | bool adj_th = revid == ALX_REV_B0; |
| 793 | − int speed; | |
| 794 | − | |
| 795 | − if (hw->link_speed == SPEED_UNKNOWN) | |
| 796 | − speed = SPEED_UNKNOWN; | |
| 797 | − else | |
| 798 | − speed = hw->link_speed - hw->link_speed % 10; | |
| 799 | 783 | |
| 800 | 784 | if (revid != ALX_REV_B0 && !alx_is_rev_a(revid)) |
| 801 | 785 | return; |
| 802 | 786 | |
| 803 | 787 | /* 1000BT/AZ, wrong cable length */ |
| 804 | − if (speed != SPEED_UNKNOWN) { | |
| 788 | + if (hw->link_speed != SPEED_UNKNOWN) { | |
| 805 | 789 | alx_read_phy_ext(hw, ALX_MIIEXT_PCS, ALX_MIIEXT_CLDCTRL6, |
| 806 | 790 | &phy_val); |
| 807 | 791 | len = ALX_GET_FIELD(phy_val, ALX_CLDCTRL6_CAB_LEN); |
| 808 | 792 | alx_read_phy_dbg(hw, ALX_MIIDBG_AGC, &phy_val); |
| 809 | 793 | agc = ALX_GET_FIELD(phy_val, ALX_AGC_2_VGA); |
| 810 | 794 | |
| 811 | − if ((speed == SPEED_1000 && | |
| 795 | + if ((hw->link_speed == SPEED_1000 && | |
| 812 | 796 | (len > ALX_CLDCTRL6_CAB_LEN_SHORT1G || |
| 813 | 797 | (len == 0 && agc > ALX_AGC_LONG1G_LIMT))) || |
| 814 | − (speed == SPEED_100 && | |
| 798 | + (hw->link_speed == SPEED_100 && | |
| 815 | 799 | (len > ALX_CLDCTRL6_CAB_LEN_SHORT100M || |
| 816 | 800 | (len == 0 && agc > ALX_AGC_LONG100M_LIMT)))) { |
| 817 | 801 | alx_write_phy_dbg(hw, ALX_MIIDBG_AZ_ANADECT, |
| @@ -831,10 +815,10 @@ void alx_post_phy_link(struct alx_hw *hw) · 13 unmodified lines | ||
| 831 | 815 | |
| 832 | 816 | /* threshold adjust */ |
| 833 | 817 | if (adj_th && hw->lnk_patch) { |
| 834 | − if (speed == SPEED_100) { | |
| 818 | + if (hw->link_speed == SPEED_100) { | |
| 835 | 819 | alx_write_phy_dbg(hw, ALX_MIIDBG_MSE16DB, |
| 836 | 820 | ALX_MSE16DB_UP); |
| 837 | − } else if (speed == SPEED_1000) { | |
| 821 | + } else if (hw->link_speed == SPEED_1000) { | |
| 838 | 822 | /* |
| 839 | 823 | * Giga link threshold, raise the tolerance of |
| 840 | 824 | * noise 50% |
| @@ -864,66 +848,6 @@ void alx_post_phy_link(struct alx_hw *hw) · 23 unmodified lines | ||
| 864 | 848 | } |
| 865 | 849 | } |
| 866 | 850 | |
| 867 | − | |
| 868 | −/* NOTE: | |
| 869 | − * 1. phy link must be established before calling this function | |
| 870 | − * 2. wol option (pattern,magic,link,etc.) is configed before call it. | |
| 871 | − */ | |
| 872 | −int alx_pre_suspend(struct alx_hw *hw, int speed) | |
| 873 | −{ | |
| 874 | − u32 master, mac, phy, val; | |
| 875 | − int err = 0; | |
| 876 | − | |
| 877 | − master = alx_read_mem32(hw, ALX_MASTER); | |
| 878 | − master &= ~ALX_MASTER_PCLKSEL_SRDS; | |
| 879 | − mac = hw->rx_ctrl; | |
| 880 | − /* 10/100 half */ | |
| 881 | − ALX_SET_FIELD(mac, ALX_MAC_CTRL_SPEED, ALX_MAC_CTRL_SPEED_10_100); | |
| 882 | − mac &= ~(ALX_MAC_CTRL_FULLD | ALX_MAC_CTRL_RX_EN | ALX_MAC_CTRL_TX_EN); | |
| 883 | − | |
| 884 | − phy = alx_read_mem32(hw, ALX_PHY_CTRL); | |
| 885 | − phy &= ~(ALX_PHY_CTRL_DSPRST_OUT | ALX_PHY_CTRL_CLS); | |
| 886 | − phy |= ALX_PHY_CTRL_RST_ANALOG | ALX_PHY_CTRL_HIB_PULSE | | |
| 887 | − ALX_PHY_CTRL_HIB_EN; | |
| 888 | − | |
| 889 | − /* without any activity */ | |
| 890 | − if (!(hw->sleep_ctrl & ALX_SLEEP_ACTIVE)) { | |
| 891 | − err = alx_write_phy_reg(hw, ALX_MII_IER, 0); | |
| 892 | − if (err) | |
| 893 | − return err; | |
| 894 | − phy |= ALX_PHY_CTRL_IDDQ | ALX_PHY_CTRL_POWER_DOWN; | |
| 895 | − } else { | |
| 896 | − if (hw->sleep_ctrl & (ALX_SLEEP_WOL_MAGIC | ALX_SLEEP_CIFS)) | |
| 897 | − mac |= ALX_MAC_CTRL_RX_EN | ALX_MAC_CTRL_BRD_EN; | |
| 898 | − if (hw->sleep_ctrl & ALX_SLEEP_CIFS) | |
| 899 | − mac |= ALX_MAC_CTRL_TX_EN; | |
| 900 | − if (speed % 10 == DUPLEX_FULL) | |
| 901 | − mac |= ALX_MAC_CTRL_FULLD; | |
| 902 | − if (speed >= SPEED_1000) | |
| 903 | − ALX_SET_FIELD(mac, ALX_MAC_CTRL_SPEED, | |
| 904 | − ALX_MAC_CTRL_SPEED_1000); | |
| 905 | − phy |= ALX_PHY_CTRL_DSPRST_OUT; | |
| 906 | − err = alx_write_phy_ext(hw, ALX_MIIEXT_ANEG, | |
| 907 | − ALX_MIIEXT_S3DIG10, | |
| 908 | − ALX_MIIEXT_S3DIG10_SL); | |
| 909 | − if (err) | |
| 910 | − return err; | |
| 911 | − } | |
| 912 | − | |
| 913 | − alx_enable_osc(hw); | |
| 914 | − hw->rx_ctrl = mac; | |
| 915 | − alx_write_mem32(hw, ALX_MASTER, master); | |
| 916 | − alx_write_mem32(hw, ALX_MAC_CTRL, mac); | |
| 917 | − alx_write_mem32(hw, ALX_PHY_CTRL, phy); | |
| 918 | − | |
| 919 | − /* set val of PDLL D3PLLOFF */ | |
| 920 | − val = alx_read_mem32(hw, ALX_PDLL_TRNS1); | |
| 921 | − val |= ALX_PDLL_TRNS1_D3PLLOFF_EN; | |
| 922 | − alx_write_mem32(hw, ALX_PDLL_TRNS1, val); | |
| 923 | − | |
| 924 | − return 0; | |
| 925 | −} | |
| 926 | − | |
| 927 | 851 | bool alx_phy_configured(struct alx_hw *hw) |
| 928 | 852 | { |
| 929 | 853 | u32 cfg, hw_cfg; |
| @@ -938,7 +862,7 @@ bool alx_phy_configured(struct alx_hw *hw) · 8 unmodified lines | ||
| 938 | 862 | return cfg == hw_cfg; |
| 939 | 863 | } |
| 940 | 864 | |
| 941 | −int alx_get_phy_link(struct alx_hw *hw, int *speed) | |
| 865 | +int alx_read_phy_link(struct alx_hw *hw) | |
| 942 | 866 | { |
| 943 | 867 | struct pci_dev *pdev = hw->pdev; |
| 944 | 868 | u16 bmsr, giga; |
| @@ -953,7 +877,8 @@ int alx_get_phy_link(struct alx_hw *hw, int *speed) · 8 unmodified lines | ||
| 953 | 877 | return err; |
| 954 | 878 | |
| 955 | 879 | if (!(bmsr & BMSR_LSTATUS)) { |
| 956 | − *speed = SPEED_UNKNOWN; | |
| 880 | + hw->link_speed = SPEED_UNKNOWN; | |
| 881 | + hw->duplex = DUPLEX_UNKNOWN; | |
| 957 | 882 | return 0; |
| 958 | 883 | } |
| 959 | 884 | |
| @@ -967,20 +892,20 @@ int alx_get_phy_link(struct alx_hw *hw, int *speed) · 7 unmodified lines | ||
| 967 | 892 | |
| 968 | 893 | switch (giga & ALX_GIGA_PSSR_SPEED) { |
| 969 | 894 | case ALX_GIGA_PSSR_1000MBS: |
| 970 | − *speed = SPEED_1000; | |
| 895 | + hw->link_speed = SPEED_1000; | |
| 971 | 896 | break; |
| 972 | 897 | case ALX_GIGA_PSSR_100MBS: |
| 973 | − *speed = SPEED_100; | |
| 898 | + hw->link_speed = SPEED_100; | |
| 974 | 899 | break; |
| 975 | 900 | case ALX_GIGA_PSSR_10MBS: |
| 976 | − *speed = SPEED_10; | |
| 901 | + hw->link_speed = SPEED_10; | |
| 977 | 902 | break; |
| 978 | 903 | default: |
| 979 | 904 | goto wrong_speed; |
| 980 | 905 | } |
| 981 | 906 | |
| 982 | − *speed += (giga & ALX_GIGA_PSSR_DPLX) ? DUPLEX_FULL : DUPLEX_HALF; | |
| 983 | − return 1; | |
| 907 | + hw->duplex = (giga & ALX_GIGA_PSSR_DPLX) ? DUPLEX_FULL : DUPLEX_HALF; | |
| 908 | + return 0; | |
| 984 | 909 | |
| 985 | 910 | wrong_speed: |
| 986 | 911 | dev_err(&pdev->dev, "invalid PHY speed/duplex: 0x%x\n", giga); |
| @@ -995,26 +920,6 @@ int alx_clear_phy_intr(struct alx_hw *hw) · 8 unmodified lines | ||
| 995 | 920 | return alx_read_phy_reg(hw, ALX_MII_ISR, &isr); |
| 996 | 921 | } |
| 997 | 922 | |
| 998 | −int alx_config_wol(struct alx_hw *hw) | |
| 999 | −{ | |
| 1000 | − u32 wol = 0; | |
| 1001 | − int err = 0; | |
| 1002 | − | |
| 1003 | − /* turn on magic packet event */ | |
| 1004 | − if (hw->sleep_ctrl & ALX_SLEEP_WOL_MAGIC) | |
| 1005 | − wol |= ALX_WOL0_MAGIC_EN | ALX_WOL0_PME_MAGIC_EN; | |
| 1006 | − | |
| 1007 | − /* turn on link up event */ | |
| 1008 | − if (hw->sleep_ctrl & ALX_SLEEP_WOL_PHY) { | |
| 1009 | − wol |= ALX_WOL0_LINK_EN | ALX_WOL0_PME_LINK; | |
| 1010 | − /* only link up can wake up */ | |
| 1011 | − err = alx_write_phy_reg(hw, ALX_MII_IER, ALX_IER_LINK_UP); | |
| 1012 | − } | |
| 1013 | − alx_write_mem32(hw, ALX_WOL0, wol); | |
| 1014 | − | |
| 1015 | − return err; | |
| 1016 | −} | |
| 1017 | − | |
| 1018 | 923 | void alx_disable_rss(struct alx_hw *hw) |
| 1019 | 924 | { |
| 1020 | 925 | u32 ctrl = alx_read_mem32(hw, ALX_RXQ0); |
| @@ -1126,85 +1031,6 @@ void alx_configure_basic(struct alx_hw *hw) · 105 unmodified lines | ||
| 1126 | 1031 | alx_write_mem32(hw, ALX_WRR, val); |
| 1127 | 1032 | } |
| 1128 | 1033 | |
| 1129 | −static inline u32 alx_speed_to_ethadv(int speed) | |
| 1130 | −{ | |
| 1131 | − switch (speed) { | |
| 1132 | − case SPEED_1000 + DUPLEX_FULL: | |
| 1133 | − return ADVERTISED_1000baseT_Full; | |
| 1134 | − case SPEED_100 + DUPLEX_FULL: | |
| 1135 | − return ADVERTISED_100baseT_Full; | |
| 1136 | − case SPEED_100 + DUPLEX_HALF: | |
| 1137 | − return ADVERTISED_10baseT_Half; | |
| 1138 | − case SPEED_10 + DUPLEX_FULL: | |
| 1139 | − return ADVERTISED_10baseT_Full; | |
| 1140 | − case SPEED_10 + DUPLEX_HALF: | |
| 1141 | − return ADVERTISED_10baseT_Half; | |
| 1142 | − default: | |
| 1143 | − return 0; | |
| 1144 | − } | |
| 1145 | −} | |
| 1146 | − | |
| 1147 | −int alx_select_powersaving_speed(struct alx_hw *hw, int *speed) | |
| 1148 | −{ | |
| 1149 | − int i, err, spd; | |
| 1150 | − u16 lpa; | |
| 1151 | − | |
| 1152 | − err = alx_get_phy_link(hw, &spd); | |
| 1153 | − if (err < 0) | |
| 1154 | − return err; | |
| 1155 | − | |
| 1156 | − if (spd == SPEED_UNKNOWN) | |
| 1157 | − return 0; | |
| 1158 | − | |
| 1159 | − err = alx_read_phy_reg(hw, MII_LPA, &lpa); | |
| 1160 | − if (err) | |
| 1161 | − return err; | |
| 1162 | − | |
| 1163 | − if (!(lpa & LPA_LPACK)) { | |
| 1164 | − *speed = spd; | |
| 1165 | − return 0; | |
| 1166 | − } | |
| 1167 | − | |
| 1168 | − if (lpa & LPA_10FULL) | |
| 1169 | − *speed = SPEED_10 + DUPLEX_FULL; | |
| 1170 | − else if (lpa & LPA_10HALF) | |
| 1171 | − *speed = SPEED_10 + DUPLEX_HALF; | |
| 1172 | − else if (lpa & LPA_100FULL) | |
| 1173 | − *speed = SPEED_100 + DUPLEX_FULL; | |
| 1174 | − else | |
| 1175 | − *speed = SPEED_100 + DUPLEX_HALF; | |
| 1176 | − | |
| 1177 | − if (*speed != spd) { | |
| 1178 | − err = alx_write_phy_reg(hw, ALX_MII_IER, 0); | |
| 1179 | − if (err) | |
| 1180 | − return err; | |
| 1181 | − err = alx_setup_speed_duplex(hw, | |
| 1182 | − alx_speed_to_ethadv(*speed) | | |
| 1183 | − ADVERTISED_Autoneg, | |
| 1184 | − ALX_FC_ANEG | ALX_FC_RX | | |
| 1185 | − ALX_FC_TX); | |
| 1186 | − if (err) | |
| 1187 | − return err; | |
| 1188 | − | |
| 1189 | − /* wait for linkup */ | |
| 1190 | − for (i = 0; i < ALX_MAX_SETUP_LNK_CYCLE; i++) { | |
| 1191 | − int speed2; | |
| 1192 | − | |
| 1193 | − msleep(100); | |
| 1194 | − | |
| 1195 | − err = alx_get_phy_link(hw, &speed2); | |
| 1196 | − if (err < 0) | |
| 1197 | − return err; | |
| 1198 | − if (speed2 != SPEED_UNKNOWN) | |
| 1199 | − break; | |
| 1200 | − } | |
| 1201 | − if (i == ALX_MAX_SETUP_LNK_CYCLE) | |
| 1202 | − return -ETIMEDOUT; | |
| 1203 | − } | |
| 1204 | − | |
| 1205 | − return 0; | |
| 1206 | −} | |
| 1207 | − | |
| 1208 | 1034 | bool alx_get_phy_info(struct alx_hw *hw) |
| 1209 | 1035 | { |
| 1210 | 1036 | u16 devs1, devs2; |
| @@ -412,12 +412,11 @@ struct alx_hw { · 411 unmodified lines | ||
| 412 | 412 | u32 smb_timer; |
| 413 | 413 | /* SPEED_* + DUPLEX_*, SPEED_UNKNOWN if link is down */ |
| 414 | 414 | int link_speed; |
| 415 | + u8 duplex; | |
| 415 | 416 | |
| 416 | 417 | /* auto-neg advertisement or force mode config */ |
| 417 | − u32 adv_cfg; | |
| 418 | 418 | u8 flowctrl; |
| 419 | − | |
| 420 | − u32 sleep_ctrl; | |
| 419 | + u32 adv_cfg; | |
| 421 | 420 | |
| 422 | 421 | spinlock_t mdio_lock; |
| 423 | 422 | struct mdio_if_info mdio; |
| @@ -478,14 +477,12 @@ void alx_reset_pcie(struct alx_hw *hw); · 54 unmodified lines | ||
| 478 | 477 | void alx_enable_aspm(struct alx_hw *hw, bool l0s_en, bool l1_en); |
| 479 | 478 | int alx_setup_speed_duplex(struct alx_hw *hw, u32 ethadv, u8 flowctrl); |
| 480 | 479 | void alx_post_phy_link(struct alx_hw *hw); |
| 481 | −int alx_pre_suspend(struct alx_hw *hw, int speed); | |
| 482 | 480 | int alx_read_phy_reg(struct alx_hw *hw, u16 reg, u16 *phy_data); |
| 483 | 481 | int alx_write_phy_reg(struct alx_hw *hw, u16 reg, u16 phy_data); |
| 484 | 482 | int alx_read_phy_ext(struct alx_hw *hw, u8 dev, u16 reg, u16 *pdata); |
| 485 | 483 | int alx_write_phy_ext(struct alx_hw *hw, u8 dev, u16 reg, u16 data); |
| 486 | −int alx_get_phy_link(struct alx_hw *hw, int *speed); | |
| 484 | +int alx_read_phy_link(struct alx_hw *hw); | |
| 487 | 485 | int alx_clear_phy_intr(struct alx_hw *hw); |
| 488 | −int alx_config_wol(struct alx_hw *hw); | |
| 489 | 486 | void alx_cfg_mac_flowcontrol(struct alx_hw *hw, u8 fc); |
| 490 | 487 | void alx_start_mac(struct alx_hw *hw); |
| 491 | 488 | int alx_reset_mac(struct alx_hw *hw); |
| @@ -493,7 +490,21 @@ void alx_set_macaddr(struct alx_hw *hw, const u8 *addr); · 1 unmodified line | ||
| 493 | 490 | bool alx_phy_configured(struct alx_hw *hw); |
| 494 | 491 | void alx_configure_basic(struct alx_hw *hw); |
| 495 | 492 | void alx_disable_rss(struct alx_hw *hw); |
| 496 | −int alx_select_powersaving_speed(struct alx_hw *hw, int *speed); | |
| 497 | 493 | bool alx_get_phy_info(struct alx_hw *hw); |
| 498 | 494 | |
| 495 | +static inline u32 alx_speed_to_ethadv(int speed, u8 duplex) | |
| 496 | +{ | |
| 497 | + if (speed == SPEED_1000 && duplex == DUPLEX_FULL) | |
| 498 | + return ADVERTISED_1000baseT_Full; | |
| 499 | + if (speed == SPEED_100 && duplex == DUPLEX_FULL) | |
| 500 | + return ADVERTISED_100baseT_Full; | |
| 501 | + if (speed == SPEED_100 && duplex== DUPLEX_HALF) | |
| 502 | + return ADVERTISED_100baseT_Half; | |
| 503 | + if (speed == SPEED_10 && duplex == DUPLEX_FULL) | |
| 504 | + return ADVERTISED_10baseT_Full; | |
| 505 | + if (speed == SPEED_10 && duplex == DUPLEX_HALF) | |
| 506 | + return ADVERTISED_10baseT_Half; | |
| 507 | + return 0; | |
| 508 | +} | |
| 509 | + | |
| 499 | 510 | #endif |
| @@ -706,12 +706,12 @@ static int alx_init_sw(struct alx_priv *alx) · 705 unmodified lines | ||
| 706 | 706 | alx->rxbuf_size = ALIGN(ALX_RAW_MTU(hw->mtu), 8); |
| 707 | 707 | alx->tx_ringsz = 256; |
| 708 | 708 | alx->rx_ringsz = 512; |
| 709 | − hw->sleep_ctrl = ALX_SLEEP_WOL_MAGIC | ALX_SLEEP_WOL_PHY; | |
| 710 | 709 | hw->imt = 200; |
| 711 | 710 | alx->int_mask = ALX_ISR_MISC; |
| 712 | 711 | hw->dma_chnl = hw->max_dma_chnl; |
| 713 | 712 | hw->ith_tpd = alx->tx_ringsz / 3; |
| 714 | 713 | hw->link_speed = SPEED_UNKNOWN; |
| 714 | + hw->duplex = DUPLEX_UNKNOWN; | |
| 715 | 715 | hw->adv_cfg = ADVERTISED_Autoneg | |
| 716 | 716 | ADVERTISED_10baseT_Half | |
| 717 | 717 | ADVERTISED_10baseT_Full | |
| @@ -758,6 +758,7 @@ static void alx_halt(struct alx_priv *alx) · 40 unmodified lines | ||
| 758 | 758 | |
| 759 | 759 | alx_netif_stop(alx); |
| 760 | 760 | hw->link_speed = SPEED_UNKNOWN; |
| 761 | + hw->duplex = DUPLEX_UNKNOWN; | |
| 761 | 762 | |
| 762 | 763 | alx_reset_mac(hw); |
| 763 | 764 | |
| @@ -869,18 +870,18 @@ static void __alx_stop(struct alx_priv *alx) · 105 unmodified lines | ||
| 869 | 870 | alx_free_rings(alx); |
| 870 | 871 | } |
| 871 | 872 | |
| 872 | −static const char *alx_speed_desc(u16 speed) | |
| 873 | +static const char *alx_speed_desc(struct alx_hw *hw) | |
| 873 | 874 | { |
| 874 | − switch (speed) { | |
| 875 | − case SPEED_1000 + DUPLEX_FULL: | |
| 875 | + switch (alx_speed_to_ethadv(hw->link_speed, hw->duplex)) { | |
| 876 | + case ADVERTISED_1000baseT_Full: | |
| 876 | 877 | return "1 Gbps Full"; |
| 877 | − case SPEED_100 + DUPLEX_FULL: | |
| 878 | + case ADVERTISED_100baseT_Full: | |
| 878 | 879 | return "100 Mbps Full"; |
| 879 | − case SPEED_100 + DUPLEX_HALF: | |
| 880 | + case ADVERTISED_100baseT_Half: | |
| 880 | 881 | return "100 Mbps Half"; |
| 881 | − case SPEED_10 + DUPLEX_FULL: | |
| 882 | + case ADVERTISED_10baseT_Full: | |
| 882 | 883 | return "10 Mbps Full"; |
| 883 | − case SPEED_10 + DUPLEX_HALF: | |
| 884 | + case ADVERTISED_10baseT_Half: | |
| 884 | 885 | return "10 Mbps Half"; |
| 885 | 886 | default: |
| 886 | 887 | return "Unknown speed"; |
| @@ -891,7 +892,8 @@ static void alx_check_link(struct alx_priv *alx) · 4 unmodified lines | ||
| 891 | 892 | { |
| 892 | 893 | struct alx_hw *hw = &alx->hw; |
| 893 | 894 | unsigned long flags; |
| 894 | − int speed, old_speed; | |
| 895 | + int old_speed; | |
| 896 | + u8 old_duplex; | |
| 895 | 897 | int err; |
| 896 | 898 | |
| 897 | 899 | /* clear PHY internal interrupt status, otherwise the main |
| @@ -899,7 +901,9 @@ static void alx_check_link(struct alx_priv *alx) · 1 unmodified line | ||
| 899 | 901 | */ |
| 900 | 902 | alx_clear_phy_intr(hw); |
| 901 | 903 | |
| 902 | − err = alx_get_phy_link(hw, &speed); | |
| 904 | + old_speed = hw->link_speed; | |
| 905 | + old_duplex = hw->duplex; | |
| 906 | + err = alx_read_phy_link(hw); | |
| 903 | 907 | if (err < 0) |
| 904 | 908 | goto reset; |
| 905 | 909 | |
| @@ -908,15 +912,12 @@ static void alx_check_link(struct alx_priv *alx) · 2 unmodified lines | ||
| 908 | 912 | alx_write_mem32(hw, ALX_IMR, alx->int_mask); |
| 909 | 913 | spin_unlock_irqrestore(&alx->irq_lock, flags); |
| 910 | 914 | |
| 911 | − old_speed = hw->link_speed; | |
| 912 | − | |
| 913 | − if (old_speed == speed) | |
| 915 | + if (old_speed == hw->link_speed) | |
| 914 | 916 | return; |
| 915 | − hw->link_speed = speed; | |
| 916 | 917 | |
| 917 | − if (speed != SPEED_UNKNOWN) { | |
| 918 | + if (hw->link_speed != SPEED_UNKNOWN) { | |
| 918 | 919 | netif_info(alx, link, alx->dev, |
| 919 | − "NIC Up: %s\n", alx_speed_desc(speed)); | |
| 920 | + "NIC Up: %s\n", alx_speed_desc(hw)); | |
| 920 | 921 | alx_post_phy_link(hw); |
| 921 | 922 | alx_enable_aspm(hw, true, true); |
| 922 | 923 | alx_start_mac(hw); |
| @@ -959,65 +960,6 @@ static int alx_stop(struct net_device *netdev) · 36 unmodified lines | ||
| 959 | 960 | return 0; |
| 960 | 961 | } |
| 961 | 962 | |
| 962 | −static int __alx_shutdown(struct pci_dev *pdev, bool *wol_en) | |
| 963 | −{ | |
| 964 | − struct alx_priv *alx = pci_get_drvdata(pdev); | |
| 965 | − struct net_device *netdev = alx->dev; | |
| 966 | − struct alx_hw *hw = &alx->hw; | |
| 967 | − int err, speed; | |
| 968 | − | |
| 969 | − netif_device_detach(netdev); | |
| 970 | − | |
| 971 | − if (netif_running(netdev)) | |
| 972 | − __alx_stop(alx); | |
| 973 | − | |
| 974 | −#ifdef CONFIG_PM_SLEEP | |
| 975 | − err = pci_save_state(pdev); | |
| 976 | − if (err) | |
| 977 | − return err; | |
| 978 | −#endif | |
| 979 | − | |
| 980 | − err = alx_select_powersaving_speed(hw, &speed); | |
| 981 | − if (err) | |
| 982 | − return err; | |
| 983 | − err = alx_clear_phy_intr(hw); | |
| 984 | − if (err) | |
| 985 | − return err; | |
| 986 | − err = alx_pre_suspend(hw, speed); | |
| 987 | − if (err) | |
| 988 | − return err; | |
| 989 | − err = alx_config_wol(hw); | |
| 990 | − if (err) | |
| 991 | − return err; | |
| 992 | − | |
| 993 | − *wol_en = false; | |
| 994 | − if (hw->sleep_ctrl & ALX_SLEEP_ACTIVE) { | |
| 995 | − netif_info(alx, wol, netdev, | |
| 996 | − "wol: ctrl=%X, speed=%X\n", | |
| 997 | − hw->sleep_ctrl, speed); | |
| 998 | − device_set_wakeup_enable(&pdev->dev, true); | |
| 999 | − *wol_en = true; | |
| 1000 | − } | |
| 1001 | − | |
| 1002 | − pci_disable_device(pdev); | |
| 1003 | − | |
| 1004 | − return 0; | |
| 1005 | −} | |
| 1006 | − | |
| 1007 | −static void alx_shutdown(struct pci_dev *pdev) | |
| 1008 | −{ | |
| 1009 | − int err; | |
| 1010 | − bool wol_en; | |
| 1011 | − | |
| 1012 | − err = __alx_shutdown(pdev, &wol_en); | |
| 1013 | − if (!err) { | |
| 1014 | − pci_wake_from_d3(pdev, wol_en); | |
| 1015 | − pci_set_power_state(pdev, PCI_D3hot); | |
| 1016 | − } else { | |
| 1017 | − dev_err(&pdev->dev, "shutdown fail %d\n", err); | |
| 1018 | − } | |
| 1019 | −} | |
| 1020 | − | |
| 1021 | 963 | static void alx_link_check(struct work_struct *work) |
| 1022 | 964 | { |
| 1023 | 965 | struct alx_priv *alx; |
| @@ -1396,8 +1338,6 @@ static int alx_probe(struct pci_dev *pdev, const struct pci_device_id *ent) · 372 unmodified lines | ||
| 1396 | 1338 | goto out_unmap; |
| 1397 | 1339 | } |
| 1398 | 1340 | |
| 1399 | − device_set_wakeup_enable(&pdev->dev, hw->sleep_ctrl); | |
| 1400 | − | |
| 1401 | 1341 | netdev_info(netdev, |
| 1402 | 1342 | "Qualcomm Atheros AR816x/AR817x Ethernet [%pM]\n", |
| 1403 | 1343 | netdev->dev_addr); |
| @@ -1442,22 +1382,12 @@ static void alx_remove(struct pci_dev *pdev) · 38 unmodified lines | ||
| 1442 | 1382 | static int alx_suspend(struct device *dev) |
| 1443 | 1383 | { |
| 1444 | 1384 | struct pci_dev *pdev = to_pci_dev(dev); |
| 1445 | − int err; | |
| 1446 | − bool wol_en; | |
| 1447 | − | |
| 1448 | − err = __alx_shutdown(pdev, &wol_en); | |
| 1449 | − if (err) { | |
| 1450 | − dev_err(&pdev->dev, "shutdown fail in suspend %d\n", err); | |
| 1451 | − return err; | |
| 1452 | − } | |
| 1453 | − | |
| 1454 | − if (wol_en) { | |
| 1455 | − pci_prepare_to_sleep(pdev); | |
| 1456 | − } else { | |
| 1457 | − pci_wake_from_d3(pdev, false); | |
| 1458 | − pci_set_power_state(pdev, PCI_D3hot); | |
| 1459 | − } | |
| 1385 | + struct alx_priv *alx = pci_get_drvdata(pdev); | |
| 1460 | 1386 | |
| 1387 | + if (!netif_running(alx->dev)) | |
| 1388 | + return 0; | |
| 1389 | + netif_device_detach(alx->dev); | |
| 1390 | + __alx_stop(alx); | |
| 1461 | 1391 | return 0; |
| 1462 | 1392 | } |
| 1463 | 1393 | |
| @@ -1465,49 +1395,20 @@ static int alx_resume(struct device *dev) · 1 unmodified line | ||
| 1465 | 1395 | { |
| 1466 | 1396 | struct pci_dev *pdev = to_pci_dev(dev); |
| 1467 | 1397 | struct alx_priv *alx = pci_get_drvdata(pdev); |
| 1468 | − struct net_device *netdev = alx->dev; | |
| 1469 | − struct alx_hw *hw = &alx->hw; | |
| 1470 | − int err; | |
| 1471 | − | |
| 1472 | − pci_set_power_state(pdev, PCI_D0); | |
| 1473 | − pci_restore_state(pdev); | |
| 1474 | − pci_save_state(pdev); | |
| 1475 | − | |
| 1476 | − pci_enable_wake(pdev, PCI_D3hot, 0); | |
| 1477 | − pci_enable_wake(pdev, PCI_D3cold, 0); | |
| 1478 | 1398 | |
| 1479 | − hw->link_speed = SPEED_UNKNOWN; | |
| 1480 | − alx->int_mask = ALX_ISR_MISC; | |
| 1481 | − | |
| 1482 | − alx_reset_pcie(hw); | |
| 1483 | − alx_reset_phy(hw); | |
| 1484 | − | |
| 1485 | − err = alx_reset_mac(hw); | |
| 1486 | − if (err) { | |
| 1487 | − netif_err(alx, hw, alx->dev, | |
| 1488 | − "resume:reset_mac fail %d\n", err); | |
| 1489 | − return -EIO; | |
| 1490 | − } | |
| 1491 | − | |
| 1492 | − err = alx_setup_speed_duplex(hw, hw->adv_cfg, hw->flowctrl); | |
| 1493 | − if (err) { | |
| 1494 | − netif_err(alx, hw, alx->dev, | |
| 1495 | − "resume:setup_speed_duplex fail %d\n", err); | |
| 1496 | − return -EIO; | |
| 1497 | − } | |
| 1498 | − | |
| 1499 | − if (netif_running(netdev)) { | |
| 1500 | − err = __alx_open(alx, true); | |
| 1501 | − if (err) | |
| 1502 | − return err; | |
| 1503 | − } | |
| 1504 | − | |
| 1505 | − netif_device_attach(netdev); | |
| 1506 | − | |
| 1507 | − return err; | |
| 1399 | + if (!netif_running(alx->dev)) | |
| 1400 | + return 0; | |
| 1401 | + netif_device_attach(alx->dev); | |
| 1402 | + return __alx_open(alx, true); | |
| 1508 | 1403 | } |
| 1404 | + | |
| 1405 | +static SIMPLE_DEV_PM_OPS(alx_pm_ops, alx_suspend, alx_resume); | |
| 1406 | +#define ALX_PM_OPS (&alx_pm_ops) | |
| 1407 | +#else | |
| 1408 | +#define ALX_PM_OPS NULL | |
| 1509 | 1409 | #endif |
| 1510 | 1410 | |
| 1411 | + | |
| 1511 | 1412 | static pci_ers_result_t alx_pci_error_detected(struct pci_dev *pdev, |
| 1512 | 1413 | pci_channel_state_t state) |
| 1513 | 1414 | { |
| @@ -1550,8 +1451,6 @@ static pci_ers_result_t alx_pci_error_slot_reset(struct pci_dev *pdev) · 36 unmodified lines | ||
| 1550 | 1451 | } |
| 1551 | 1452 | |
| 1552 | 1453 | pci_set_master(pdev); |
| 1553 | − pci_enable_wake(pdev, PCI_D3hot, 0); | |
| 1554 | − pci_enable_wake(pdev, PCI_D3cold, 0); | |
| 1555 | 1454 | |
| 1556 | 1455 | alx_reset_pcie(hw); |
| 1557 | 1456 | if (!alx_reset_mac(hw)) |
| @@ -1587,13 +1486,6 @@ static const struct pci_error_handlers alx_err_handlers = { · 29 unmodified lines | ||
| 1587 | 1486 | .resume = alx_pci_error_resume, |
| 1588 | 1487 | }; |
| 1589 | 1488 | |
| 1590 | −#ifdef CONFIG_PM_SLEEP | |
| 1591 | −static SIMPLE_DEV_PM_OPS(alx_pm_ops, alx_suspend, alx_resume); | |
| 1592 | −#define ALX_PM_OPS (&alx_pm_ops) | |
| 1593 | −#else | |
| 1594 | −#define ALX_PM_OPS NULL | |
| 1595 | −#endif | |
| 1596 | − | |
| 1597 | 1489 | static DEFINE_PCI_DEVICE_TABLE(alx_pci_tbl) = { |
| 1598 | 1490 | { PCI_VDEVICE(ATTANSIC, ALX_DEV_ID_AR8161), |
| 1599 | 1491 | .driver_data = ALX_DEV_QUIRK_MSI_INTX_DISABLE_BUG }, |
| @@ -1611,7 +1503,6 @@ static struct pci_driver alx_driver = { · 11 unmodified lines | ||
| 1611 | 1503 | .id_table = alx_pci_tbl, |
| 1612 | 1504 | .probe = alx_probe, |
| 1613 | 1505 | .remove = alx_remove, |
| 1614 | − .shutdown = alx_shutdown, | |
| 1615 | 1506 | .err_handler = &alx_err_handlers, |
| 1616 | 1507 | .driver.pm = ALX_PM_OPS, |
| 1617 | 1508 | }; |
| @@ -2755,27 +2755,4 @@ static struct pci_driver atl1c_driver = { · 2754 unmodified lines | ||
| 2755 | 2755 | .driver.pm = &atl1c_pm_ops, |
| 2756 | 2756 | }; |
| 2757 | 2757 | |
| 2758 | −/** | |
| 2759 | − * atl1c_init_module - Driver Registration Routine | |
| 2760 | − * | |
| 2761 | − * atl1c_init_module is the first routine called when the driver is | |
| 2762 | − * loaded. All it does is register with the PCI subsystem. | |
| 2763 | − */ | |
| 2764 | −static int __init atl1c_init_module(void) | |
| 2765 | −{ | |
| 2766 | − return pci_register_driver(&atl1c_driver); | |
| 2767 | −} | |
| 2768 | − | |
| 2769 | −/** | |
| 2770 | − * atl1c_exit_module - Driver Exit Cleanup Routine | |
| 2771 | − * | |
| 2772 | − * atl1c_exit_module is called just before the driver is removed | |
| 2773 | − * from memory. | |
| 2774 | − */ | |
| 2775 | −static void __exit atl1c_exit_module(void) | |
| 2776 | −{ | |
| 2777 | − pci_unregister_driver(&atl1c_driver); | |
| 2778 | −} | |
| 2779 | − | |
| 2780 | −module_init(atl1c_init_module); | |
| 2781 | −module_exit(atl1c_exit_module); | |
| 2758 | +module_pci_driver(atl1c_driver); | |
| @@ -2489,27 +2489,4 @@ static struct pci_driver atl1e_driver = { · 2488 unmodified lines | ||
| 2489 | 2489 | .err_handler = &atl1e_err_handler |
| 2490 | 2490 | }; |
| 2491 | 2491 | |
| 2492 | −/** | |
| 2493 | − * atl1e_init_module - Driver Registration Routine | |
| 2494 | − * | |
| 2495 | − * atl1e_init_module is the first routine called when the driver is | |
| 2496 | − * loaded. All it does is register with the PCI subsystem. | |
| 2497 | − */ | |
| 2498 | −static int __init atl1e_init_module(void) | |
| 2499 | −{ | |
| 2500 | − return pci_register_driver(&atl1e_driver); | |
| 2501 | −} | |
| 2502 | − | |
| 2503 | −/** | |
| 2504 | − * atl1e_exit_module - Driver Exit Cleanup Routine | |
| 2505 | − * | |
| 2506 | − * atl1e_exit_module is called just before the driver is removed | |
| 2507 | − * from memory. | |
| 2508 | − */ | |
| 2509 | −static void __exit atl1e_exit_module(void) | |
| 2510 | −{ | |
| 2511 | − pci_unregister_driver(&atl1e_driver); | |
| 2512 | −} | |
| 2513 | − | |
| 2514 | −module_init(atl1e_init_module); | |
| 2515 | −module_exit(atl1e_exit_module); | |
| 2492 | +module_pci_driver(atl1e_driver); | |
| @@ -3145,31 +3145,6 @@ static struct pci_driver atl1_driver = { · 3144 unmodified lines | ||
| 3145 | 3145 | .driver.pm = &atl1_pm_ops, |
| 3146 | 3146 | }; |
| 3147 | 3147 | |
| 3148 | −/** | |
| 3149 | − * atl1_exit_module - Driver Exit Cleanup Routine | |
| 3150 | − * | |
| 3151 | − * atl1_exit_module is called just before the driver is removed | |
| 3152 | − * from memory. | |
| 3153 | − */ | |
| 3154 | −static void __exit atl1_exit_module(void) | |
| 3155 | −{ | |
| 3156 | − pci_unregister_driver(&atl1_driver); | |
| 3157 | −} | |
| 3158 | − | |
| 3159 | −/** | |
| 3160 | − * atl1_init_module - Driver Registration Routine | |
| 3161 | − * | |
| 3162 | − * atl1_init_module is the first routine called when the driver is | |
| 3163 | − * loaded. All it does is register with the PCI subsystem. | |
| 3164 | − */ | |
| 3165 | −static int __init atl1_init_module(void) | |
| 3166 | −{ | |
| 3167 | − return pci_register_driver(&atl1_driver); | |
| 3168 | −} | |
| 3169 | − | |
| 3170 | −module_init(atl1_init_module); | |
| 3171 | −module_exit(atl1_exit_module); | |
| 3172 | − | |
| 3173 | 3148 | struct atl1_stats { |
| 3174 | 3149 | char stat_string[ETH_GSTRING_LEN]; |
| 3175 | 3150 | int sizeof_stat; |
| @@ -3705,3 +3680,5 @@ static const struct ethtool_ops atl1_ethtool_ops = { · 529 unmodified lines | ||
| 3705 | 3680 | .get_ethtool_stats = atl1_get_ethtool_stats, |
| 3706 | 3681 | .get_sset_count = atl1_get_sset_count, |
| 3707 | 3682 | }; |
| 3683 | + | |
| 3684 | +module_pci_driver(atl1_driver); | |
| @@ -22,7 +22,6 @@ config B44 · 21 unmodified lines | ||
| 22 | 22 | tristate "Broadcom 440x/47xx ethernet support" |
| 23 | 23 | depends on SSB_POSSIBLE && HAS_DMA |
| 24 | 24 | select SSB |
| 25 | − select NET_CORE | |
| 26 | 25 | select MII |
| 27 | 26 | ---help--- |
| 28 | 27 | If you have a network (Ethernet) controller of this type, say Y |
| @@ -54,7 +53,6 @@ config B44_PCI · 25 unmodified lines | ||
| 54 | 53 | config BCM63XX_ENET |
| 55 | 54 | tristate "Broadcom 63xx internal mac support" |
| 56 | 55 | depends on BCM63XX |
| 57 | − select NET_CORE | |
| 58 | 56 | select MII |
| 59 | 57 | select PHYLIB |
| 60 | 58 | help |
| @@ -41,8 +41,8 @@ static int copybreak __read_mostly = 128; · 40 unmodified lines | ||
| 41 | 41 | module_param(copybreak, int, 0); |
| 42 | 42 | MODULE_PARM_DESC(copybreak, "Receive copy threshold"); |
| 43 | 43 | |
| 44 | −/* io memory shared between all devices */ | |
| 45 | −static void __iomem *bcm_enet_shared_base; | |
| 44 | +/* io registers memory shared between all devices */ | |
| 45 | +static void __iomem *bcm_enet_shared_base[3]; | |
| 46 | 46 | |
| 47 | 47 | /* |
| 48 | 48 | * io helpers to access mac registers |
| @@ -59,17 +59,76 @@ static inline void enet_writel(struct bcm_enet_priv *priv, · 10 unmodified lines | ||
| 59 | 59 | } |
| 60 | 60 | |
| 61 | 61 | /* |
| 62 | − * io helpers to access shared registers | |
| 62 | + * io helpers to access switch registers | |
| 63 | 63 | */ |
| 64 | +static inline u32 enetsw_readl(struct bcm_enet_priv *priv, u32 off) | |
| 65 | +{ | |
| 66 | + return bcm_readl(priv->base + off); | |
| 67 | +} | |
| 68 | + | |
| 69 | +static inline void enetsw_writel(struct bcm_enet_priv *priv, | |
| 70 | + u32 val, u32 off) | |
| 71 | +{ | |
| 72 | + bcm_writel(val, priv->base + off); | |
| 73 | +} | |
| 74 | + | |
| 75 | +static inline u16 enetsw_readw(struct bcm_enet_priv *priv, u32 off) | |
| 76 | +{ | |
| 77 | + return bcm_readw(priv->base + off); | |
| 78 | +} | |
| 79 | + | |
| 80 | +static inline void enetsw_writew(struct bcm_enet_priv *priv, | |
| 81 | + u16 val, u32 off) | |
| 82 | +{ | |
| 83 | + bcm_writew(val, priv->base + off); | |
| 84 | +} | |
| 85 | + | |
| 86 | +static inline u8 enetsw_readb(struct bcm_enet_priv *priv, u32 off) | |
| 87 | +{ | |
| 88 | + return bcm_readb(priv->base + off); | |
| 89 | +} | |
| 90 | + | |
| 91 | +static inline void enetsw_writeb(struct bcm_enet_priv *priv, | |
| 92 | + u8 val, u32 off) | |
| 93 | +{ | |
| 94 | + bcm_writeb(val, priv->base + off); | |
| 95 | +} | |
| 96 | + | |
| 97 | + | |
| 98 | +/* io helpers to access shared registers */ | |
| 64 | 99 | static inline u32 enet_dma_readl(struct bcm_enet_priv *priv, u32 off) |
| 65 | 100 | { |
| 66 | − return bcm_readl(bcm_enet_shared_base + off); | |
| 101 | + return bcm_readl(bcm_enet_shared_base[0] + off); | |
| 67 | 102 | } |
| 68 | 103 | |
| 69 | 104 | static inline void enet_dma_writel(struct bcm_enet_priv *priv, |
| 70 | 105 | u32 val, u32 off) |
| 71 | 106 | { |
| 72 | − bcm_writel(val, bcm_enet_shared_base + off); | |
| 107 | + bcm_writel(val, bcm_enet_shared_base[0] + off); | |
| 108 | +} | |
| 109 | + | |
| 110 | +static inline u32 enet_dmac_readl(struct bcm_enet_priv *priv, u32 off, int chan) | |
| 111 | +{ | |
| 112 | + return bcm_readl(bcm_enet_shared_base[1] + | |
| 113 | + bcm63xx_enetdmacreg(off) + chan * priv->dma_chan_width); | |
| 114 | +} | |
| 115 | + | |
| 116 | +static inline void enet_dmac_writel(struct bcm_enet_priv *priv, | |
| 117 | + u32 val, u32 off, int chan) | |
| 118 | +{ | |
| 119 | + bcm_writel(val, bcm_enet_shared_base[1] + | |
| 120 | + bcm63xx_enetdmacreg(off) + chan * priv->dma_chan_width); | |
| 121 | +} | |
| 122 | + | |
| 123 | +static inline u32 enet_dmas_readl(struct bcm_enet_priv *priv, u32 off, int chan) | |
| 124 | +{ | |
| 125 | + return bcm_readl(bcm_enet_shared_base[2] + off + chan * priv->dma_chan_width); | |
| 126 | +} | |
| 127 | + | |
| 128 | +static inline void enet_dmas_writel(struct bcm_enet_priv *priv, | |
| 129 | + u32 val, u32 off, int chan) | |
| 130 | +{ | |
| 131 | + bcm_writel(val, bcm_enet_shared_base[2] + off + chan * priv->dma_chan_width); | |
| 73 | 132 | } |
| 74 | 133 | |
| 75 | 134 | /* |
| @@ -196,7 +255,6 @@ static int bcm_enet_refill_rx(struct net_device *dev) · 120 unmodified lines | ||
| 196 | 255 | if (!skb) |
| 197 | 256 | break; |
| 198 | 257 | priv->rx_skb[desc_idx] = skb; |
| 199 | − | |
| 200 | 258 | p = dma_map_single(&priv->pdev->dev, skb->data, |
| 201 | 259 | priv->rx_skb_size, |
| 202 | 260 | DMA_FROM_DEVICE); |
| @@ -206,7 +264,7 @@ static int bcm_enet_refill_rx(struct net_device *dev) · 3 unmodified lines | ||
| 206 | 264 | len_stat = priv->rx_skb_size << DMADESC_LENGTH_SHIFT; |
| 207 | 265 | len_stat |= DMADESC_OWNER_MASK; |
| 208 | 266 | if (priv->rx_dirty_desc == priv->rx_ring_size - 1) { |
| 209 | − len_stat |= DMADESC_WRAP_MASK; | |
| 267 | + len_stat |= (DMADESC_WRAP_MASK >> priv->dma_desc_shift); | |
| 210 | 268 | priv->rx_dirty_desc = 0; |
| 211 | 269 | } else { |
| 212 | 270 | priv->rx_dirty_desc++; |
| @@ -217,7 +275,10 @@ static int bcm_enet_refill_rx(struct net_device *dev) · 4 unmodified lines | ||
| 217 | 275 | priv->rx_desc_count++; |
| 218 | 276 | |
| 219 | 277 | /* tell dma engine we allocated one buffer */ |
| 220 | − enet_dma_writel(priv, 1, ENETDMA_BUFALLOC_REG(priv->rx_chan)); | |
| 278 | + if (priv->dma_has_sram) | |
| 279 | + enet_dma_writel(priv, 1, ENETDMA_BUFALLOC_REG(priv->rx_chan)); | |
| 280 | + else | |
| 281 | + enet_dmac_writel(priv, 1, ENETDMAC_BUFALLOC, priv->rx_chan); | |
| 221 | 282 | } |
| 222 | 283 | |
| 223 | 284 | /* If rx ring is still empty, set a timer to try allocating |
| @@ -293,13 +354,15 @@ static int bcm_enet_receive_queue(struct net_device *dev, int budget) · 69 unmodified lines | ||
| 293 | 354 | |
| 294 | 355 | /* if the packet does not have start of packet _and_ |
| 295 | 356 | * end of packet flag set, then just recycle it */ |
| 296 | − if ((len_stat & DMADESC_ESOP_MASK) != DMADESC_ESOP_MASK) { | |
| 357 | + if ((len_stat & (DMADESC_ESOP_MASK >> priv->dma_desc_shift)) != | |
| 358 | + (DMADESC_ESOP_MASK >> priv->dma_desc_shift)) { | |
| 297 | 359 | dev->stats.rx_dropped++; |
| 298 | 360 | continue; |
| 299 | 361 | } |
| 300 | 362 | |
| 301 | 363 | /* recycle packet if it's marked as bad */ |
| 302 | − if (unlikely(len_stat & DMADESC_ERR_MASK)) { | |
| 364 | + if (!priv->enet_is_sw && | |
| 365 | + unlikely(len_stat & DMADESC_ERR_MASK)) { | |
| 303 | 366 | dev->stats.rx_errors++; |
| 304 | 367 | |
| 305 | 368 | if (len_stat & DMADESC_OVSIZE_MASK) |
| @@ -353,8 +416,8 @@ static int bcm_enet_receive_queue(struct net_device *dev, int budget) · 47 unmodified lines | ||
| 353 | 416 | bcm_enet_refill_rx(dev); |
| 354 | 417 | |
| 355 | 418 | /* kick rx dma */ |
| 356 | − enet_dma_writel(priv, ENETDMA_CHANCFG_EN_MASK, | |
| 357 | − ENETDMA_CHANCFG_REG(priv->rx_chan)); | |
| 419 | + enet_dmac_writel(priv, priv->dma_chan_en_mask, | |
| 420 | + ENETDMAC_CHANCFG, priv->rx_chan); | |
| 358 | 421 | } |
| 359 | 422 | |
| 360 | 423 | return processed; |
| @@ -429,10 +492,10 @@ static int bcm_enet_poll(struct napi_struct *napi, int budget) · 68 unmodified lines | ||
| 429 | 492 | dev = priv->net_dev; |
| 430 | 493 | |
| 431 | 494 | /* ack interrupts */ |
| 432 | − enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK, | |
| 433 | − ENETDMA_IR_REG(priv->rx_chan)); | |
| 434 | − enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK, | |
| 435 | − ENETDMA_IR_REG(priv->tx_chan)); | |
| 495 | + enet_dmac_writel(priv, priv->dma_chan_int_mask, | |
| 496 | + ENETDMAC_IR, priv->rx_chan); | |
| 497 | + enet_dmac_writel(priv, priv->dma_chan_int_mask, | |
| 498 | + ENETDMAC_IR, priv->tx_chan); | |
| 436 | 499 | |
| 437 | 500 | /* reclaim sent skb */ |
| 438 | 501 | tx_work_done = bcm_enet_tx_reclaim(dev, 0); |
| @@ -451,10 +514,10 @@ static int bcm_enet_poll(struct napi_struct *napi, int budget) · 12 unmodified lines | ||
| 451 | 514 | napi_complete(napi); |
| 452 | 515 | |
| 453 | 516 | /* restore rx/tx interrupt */ |
| 454 | − enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK, | |
| 455 | − ENETDMA_IRMASK_REG(priv->rx_chan)); | |
| 456 | − enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK, | |
| 457 | − ENETDMA_IRMASK_REG(priv->tx_chan)); | |
| 517 | + enet_dmac_writel(priv, priv->dma_chan_int_mask, | |
| 518 | + ENETDMAC_IRMASK, priv->rx_chan); | |
| 519 | + enet_dmac_writel(priv, priv->dma_chan_int_mask, | |
| 520 | + ENETDMAC_IRMASK, priv->tx_chan); | |
| 458 | 521 | |
| 459 | 522 | return rx_work_done; |
| 460 | 523 | } |
| @@ -497,8 +560,8 @@ static irqreturn_t bcm_enet_isr_dma(int irq, void *dev_id) · 36 unmodified lines | ||
| 497 | 560 | priv = netdev_priv(dev); |
| 498 | 561 | |
| 499 | 562 | /* mask rx/tx interrupts */ |
| 500 | − enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan)); | |
| 501 | − enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->tx_chan)); | |
| 563 | + enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->rx_chan); | |
| 564 | + enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->tx_chan); | |
| 502 | 565 | |
| 503 | 566 | napi_schedule(&priv->napi); |
| 504 | 567 | |
| @@ -530,6 +593,26 @@ static int bcm_enet_start_xmit(struct sk_buff *skb, struct net_device *dev) · 25 unmodified lines | ||
| 530 | 593 | goto out_unlock; |
| 531 | 594 | } |
| 532 | 595 | |
| 596 | + /* pad small packets sent on a switch device */ | |
| 597 | + if (priv->enet_is_sw && skb->len < 64) { | |
| 598 | + int needed = 64 - skb->len; | |
| 599 | + char *data; | |
| 600 | + | |
| 601 | + if (unlikely(skb_tailroom(skb) < needed)) { | |
| 602 | + struct sk_buff *nskb; | |
| 603 | + | |
| 604 | + nskb = skb_copy_expand(skb, 0, needed, GFP_ATOMIC); | |
| 605 | + if (!nskb) { | |
| 606 | + ret = NETDEV_TX_BUSY; | |
| 607 | + goto out_unlock; | |
| 608 | + } | |
| 609 | + dev_kfree_skb(skb); | |
| 610 | + skb = nskb; | |
| 611 | + } | |
| 612 | + data = skb_put(skb, needed); | |
| 613 | + memset(data, 0, needed); | |
| 614 | + } | |
| 615 | + | |
| 533 | 616 | /* point to the next available desc */ |
| 534 | 617 | desc = &priv->tx_desc_cpu[priv->tx_curr_desc]; |
| 535 | 618 | priv->tx_skb[priv->tx_curr_desc] = skb; |
| @@ -539,14 +622,14 @@ static int bcm_enet_start_xmit(struct sk_buff *skb, struct net_device *dev) · 3 unmodified lines | ||
| 539 | 622 | DMA_TO_DEVICE); |
| 540 | 623 | |
| 541 | 624 | len_stat = (skb->len << DMADESC_LENGTH_SHIFT) & DMADESC_LENGTH_MASK; |
| 542 | − len_stat |= DMADESC_ESOP_MASK | | |
| 625 | + len_stat |= (DMADESC_ESOP_MASK >> priv->dma_desc_shift) | | |
| 543 | 626 | DMADESC_APPEND_CRC | |
| 544 | 627 | DMADESC_OWNER_MASK; |
| 545 | 628 | |
| 546 | 629 | priv->tx_curr_desc++; |
| 547 | 630 | if (priv->tx_curr_desc == priv->tx_ring_size) { |
| 548 | 631 | priv->tx_curr_desc = 0; |
| 549 | − len_stat |= DMADESC_WRAP_MASK; | |
| 632 | + len_stat |= (DMADESC_WRAP_MASK >> priv->dma_desc_shift); | |
| 550 | 633 | } |
| 551 | 634 | priv->tx_desc_count--; |
| 552 | 635 | |
| @@ -557,8 +640,8 @@ static int bcm_enet_start_xmit(struct sk_buff *skb, struct net_device *dev) · 4 unmodified lines | ||
| 557 | 640 | wmb(); |
| 558 | 641 | |
| 559 | 642 | /* kick tx dma */ |
| 560 | − enet_dma_writel(priv, ENETDMA_CHANCFG_EN_MASK, | |
| 561 | − ENETDMA_CHANCFG_REG(priv->tx_chan)); | |
| 643 | + enet_dmac_writel(priv, priv->dma_chan_en_mask, | |
| 644 | + ENETDMAC_CHANCFG, priv->tx_chan); | |
| 562 | 645 | |
| 563 | 646 | /* stop queue if no more desc available */ |
| 564 | 647 | if (!priv->tx_desc_count) |
| @@ -686,6 +769,9 @@ static void bcm_enet_set_flow(struct bcm_enet_priv *priv, int rx_en, int tx_en) · 121 unmodified lines | ||
| 686 | 769 | val &= ~ENET_RXCFG_ENFLOW_MASK; |
| 687 | 770 | enet_writel(priv, val, ENET_RXCFG_REG); |
| 688 | 771 | |
| 772 | + if (!priv->dma_has_sram) | |
| 773 | + return; | |
| 774 | + | |
| 689 | 775 | /* tx flow control (pause frame generation) */ |
| 690 | 776 | val = enet_dma_readl(priv, ENETDMA_CFG_REG); |
| 691 | 777 | if (tx_en) |
| @@ -833,8 +919,8 @@ static int bcm_enet_open(struct net_device *dev) · 141 unmodified lines | ||
| 833 | 919 | |
| 834 | 920 | /* mask all interrupts and request them */ |
| 835 | 921 | enet_writel(priv, 0, ENET_IRMASK_REG); |
| 836 | − enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan)); | |
| 837 | − enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->tx_chan)); | |
| 922 | + enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->rx_chan); | |
| 923 | + enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->tx_chan); | |
| 838 | 924 | |
| 839 | 925 | ret = request_irq(dev->irq, bcm_enet_isr_mac, 0, dev->name, dev); |
| 840 | 926 | if (ret) |
| @@ -909,8 +995,12 @@ static int bcm_enet_open(struct net_device *dev) · 68 unmodified lines | ||
| 909 | 995 | priv->rx_curr_desc = 0; |
| 910 | 996 | |
| 911 | 997 | /* initialize flow control buffer allocation */ |
| 912 | − enet_dma_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0, | |
| 913 | − ENETDMA_BUFALLOC_REG(priv->rx_chan)); | |
| 998 | + if (priv->dma_has_sram) | |
| 999 | + enet_dma_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0, | |
| 1000 | + ENETDMA_BUFALLOC_REG(priv->rx_chan)); | |
| 1001 | + else | |
| 1002 | + enet_dmac_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0, | |
| 1003 | + ENETDMAC_BUFALLOC, priv->rx_chan); | |
| 914 | 1004 | |
| 915 | 1005 | if (bcm_enet_refill_rx(dev)) { |
| 916 | 1006 | dev_err(kdev, "cannot allocate rx skb queue\n"); |
| @@ -919,37 +1009,55 @@ static int bcm_enet_open(struct net_device *dev) · 2 unmodified lines | ||
| 919 | 1009 | } |
| 920 | 1010 | |
| 921 | 1011 | /* write rx & tx ring addresses */ |
| 922 | − enet_dma_writel(priv, priv->rx_desc_dma, | |
| 923 | − ENETDMA_RSTART_REG(priv->rx_chan)); | |
| 924 | − enet_dma_writel(priv, priv->tx_desc_dma, | |
| 925 | − ENETDMA_RSTART_REG(priv->tx_chan)); | |
| 1012 | + if (priv->dma_has_sram) { | |
| 1013 | + enet_dmas_writel(priv, priv->rx_desc_dma, | |
| 1014 | + ENETDMAS_RSTART_REG, priv->rx_chan); | |
| 1015 | + enet_dmas_writel(priv, priv->tx_desc_dma, | |
| 1016 | + ENETDMAS_RSTART_REG, priv->tx_chan); | |
| 1017 | + } else { | |
| 1018 | + enet_dmac_writel(priv, priv->rx_desc_dma, | |
| 1019 | + ENETDMAC_RSTART, priv->rx_chan); | |
| 1020 | + enet_dmac_writel(priv, priv->tx_desc_dma, | |
| 1021 | + ENETDMAC_RSTART, priv->tx_chan); | |
| 1022 | + } | |
| 926 | 1023 | |
| 927 | 1024 | /* clear remaining state ram for rx & tx channel */ |
| 928 | − enet_dma_writel(priv, 0, ENETDMA_SRAM2_REG(priv->rx_chan)); | |
| 929 | − enet_dma_writel(priv, 0, ENETDMA_SRAM2_REG(priv->tx_chan)); | |
| 930 | − enet_dma_writel(priv, 0, ENETDMA_SRAM3_REG(priv->rx_chan)); | |
| 931 | − enet_dma_writel(priv, 0, ENETDMA_SRAM3_REG(priv->tx_chan)); | |
| 932 | − enet_dma_writel(priv, 0, ENETDMA_SRAM4_REG(priv->rx_chan)); | |
| 933 | − enet_dma_writel(priv, 0, ENETDMA_SRAM4_REG(priv->tx_chan)); | |
| 1025 | + if (priv->dma_has_sram) { | |
| 1026 | + enet_dmas_writel(priv, 0, ENETDMAS_SRAM2_REG, priv->rx_chan); | |
| 1027 | + enet_dmas_writel(priv, 0, ENETDMAS_SRAM2_REG, priv->tx_chan); | |
| 1028 | + enet_dmas_writel(priv, 0, ENETDMAS_SRAM3_REG, priv->rx_chan); | |
| 1029 | + enet_dmas_writel(priv, 0, ENETDMAS_SRAM3_REG, priv->tx_chan); | |
| 1030 | + enet_dmas_writel(priv, 0, ENETDMAS_SRAM4_REG, priv->rx_chan); | |
| 1031 | + enet_dmas_writel(priv, 0, ENETDMAS_SRAM4_REG, priv->tx_chan); | |
| 1032 | + } else { | |
| 1033 | + enet_dmac_writel(priv, 0, ENETDMAC_FC, priv->rx_chan); | |
| 1034 | + enet_dmac_writel(priv, 0, ENETDMAC_FC, priv->tx_chan); | |
| 1035 | + } | |
| 934 | 1036 | |
| 935 | 1037 | /* set max rx/tx length */ |
| 936 | 1038 | enet_writel(priv, priv->hw_mtu, ENET_RXMAXLEN_REG); |
| 937 | 1039 | enet_writel(priv, priv->hw_mtu, ENET_TXMAXLEN_REG); |
| 938 | 1040 | |
| 939 | 1041 | /* set dma maximum burst len */ |
| 940 | − enet_dma_writel(priv, BCMENET_DMA_MAXBURST, | |
| 941 | − ENETDMA_MAXBURST_REG(priv->rx_chan)); | |
| 942 | − enet_dma_writel(priv, BCMENET_DMA_MAXBURST, | |
| 943 | − ENETDMA_MAXBURST_REG(priv->tx_chan)); | |
| 1042 | + enet_dmac_writel(priv, priv->dma_maxburst, | |
| 1043 | + ENETDMAC_MAXBURST, priv->rx_chan); | |
| 1044 | + enet_dmac_writel(priv, priv->dma_maxburst, | |
| 1045 | + ENETDMAC_MAXBURST, priv->tx_chan); | |
| 944 | 1046 | |
| 945 | 1047 | /* set correct transmit fifo watermark */ |
| 946 | 1048 | enet_writel(priv, BCMENET_TX_FIFO_TRESH, ENET_TXWMARK_REG); |
| 947 | 1049 | |
| 948 | 1050 | /* set flow control low/high threshold to 1/3 / 2/3 */ |
| 949 | − val = priv->rx_ring_size / 3; | |
| 950 | − enet_dma_writel(priv, val, ENETDMA_FLOWCL_REG(priv->rx_chan)); | |
| 951 | − val = (priv->rx_ring_size * 2) / 3; | |
| 952 | − enet_dma_writel(priv, val, ENETDMA_FLOWCH_REG(priv->rx_chan)); | |
| 1051 | + if (priv->dma_has_sram) { | |
| 1052 | + val = priv->rx_ring_size / 3; | |
| 1053 | + enet_dma_writel(priv, val, ENETDMA_FLOWCL_REG(priv->rx_chan)); | |
| 1054 | + val = (priv->rx_ring_size * 2) / 3; | |
| 1055 | + enet_dma_writel(priv, val, ENETDMA_FLOWCH_REG(priv->rx_chan)); | |
| 1056 | + } else { | |
| 1057 | + enet_dmac_writel(priv, 5, ENETDMAC_FC, priv->rx_chan); | |
| 1058 | + enet_dmac_writel(priv, priv->rx_ring_size, ENETDMAC_LEN, priv->rx_chan); | |
| 1059 | + enet_dmac_writel(priv, priv->tx_ring_size, ENETDMAC_LEN, priv->tx_chan); | |
| 1060 | + } | |
| 953 | 1061 | |
| 954 | 1062 | /* all set, enable mac and interrupts, start dma engine and |
| 955 | 1063 | * kick rx dma channel */ |
| @@ -958,26 +1066,26 @@ static int bcm_enet_open(struct net_device *dev) · 2 unmodified lines | ||
| 958 | 1066 | val |= ENET_CTL_ENABLE_MASK; |
| 959 | 1067 | enet_writel(priv, val, ENET_CTL_REG); |
| 960 | 1068 | enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG); |
| 961 | − enet_dma_writel(priv, ENETDMA_CHANCFG_EN_MASK, | |
| 962 | − ENETDMA_CHANCFG_REG(priv->rx_chan)); | |
| 1069 | + enet_dmac_writel(priv, priv->dma_chan_en_mask, | |
| 1070 | + ENETDMAC_CHANCFG, priv->rx_chan); | |
| 963 | 1071 | |
| 964 | 1072 | /* watch "mib counters about to overflow" interrupt */ |
| 965 | 1073 | enet_writel(priv, ENET_IR_MIB, ENET_IR_REG); |
| 966 | 1074 | enet_writel(priv, ENET_IR_MIB, ENET_IRMASK_REG); |
| 967 | 1075 | |
| 968 | 1076 | /* watch "packet transferred" interrupt in rx and tx */ |
| 969 | − enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK, | |
| 970 | − ENETDMA_IR_REG(priv->rx_chan)); | |
| 971 | − enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK, | |
| 972 | − ENETDMA_IR_REG(priv->tx_chan)); | |
| 1077 | + enet_dmac_writel(priv, priv->dma_chan_int_mask, | |
| 1078 | + ENETDMAC_IR, priv->rx_chan); | |
| 1079 | + enet_dmac_writel(priv, priv->dma_chan_int_mask, | |
| 1080 | + ENETDMAC_IR, priv->tx_chan); | |
| 973 | 1081 | |
| 974 | 1082 | /* make sure we enable napi before rx interrupt */ |
| 975 | 1083 | napi_enable(&priv->napi); |
| 976 | 1084 | |
| 977 | − enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK, | |
| 978 | − ENETDMA_IRMASK_REG(priv->rx_chan)); | |
| 979 | − enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK, | |
| 980 | − ENETDMA_IRMASK_REG(priv->tx_chan)); | |
| 1085 | + enet_dmac_writel(priv, priv->dma_chan_int_mask, | |
| 1086 | + ENETDMAC_IRMASK, priv->rx_chan); | |
| 1087 | + enet_dmac_writel(priv, priv->dma_chan_int_mask, | |
| 1088 | + ENETDMAC_IRMASK, priv->tx_chan); | |
| 981 | 1089 | |
| 982 | 1090 | if (priv->has_phy) |
| 983 | 1091 | phy_start(priv->phydev); |
| @@ -1057,14 +1165,14 @@ static void bcm_enet_disable_dma(struct bcm_enet_priv *priv, int chan) · 73 unmodified lines | ||
| 1057 | 1165 | { |
| 1058 | 1166 | int limit; |
| 1059 | 1167 | |
| 1060 | − enet_dma_writel(priv, 0, ENETDMA_CHANCFG_REG(chan)); | |
| 1168 | + enet_dmac_writel(priv, 0, ENETDMAC_CHANCFG, chan); | |
| 1061 | 1169 | |
| 1062 | 1170 | limit = 1000; |
| 1063 | 1171 | do { |
| 1064 | 1172 | u32 val; |
| 1065 | 1173 | |
| 1066 | − val = enet_dma_readl(priv, ENETDMA_CHANCFG_REG(chan)); | |
| 1067 | − if (!(val & ENETDMA_CHANCFG_EN_MASK)) | |
| 1174 | + val = enet_dmac_readl(priv, ENETDMAC_CHANCFG, chan); | |
| 1175 | + if (!(val & ENETDMAC_CHANCFG_EN_MASK)) | |
| 1068 | 1176 | break; |
| 1069 | 1177 | udelay(1); |
| 1070 | 1178 | } while (limit--); |
| @@ -1090,8 +1198,8 @@ static int bcm_enet_stop(struct net_device *dev) · 19 unmodified lines | ||
| 1090 | 1198 | |
| 1091 | 1199 | /* mask all interrupts */ |
| 1092 | 1200 | enet_writel(priv, 0, ENET_IRMASK_REG); |
| 1093 | − enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan)); | |
| 1094 | − enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->tx_chan)); | |
| 1201 | + enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->rx_chan); | |
| 1202 | + enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->tx_chan); | |
| 1095 | 1203 | |
| 1096 | 1204 | /* make sure no mib update is scheduled */ |
| 1097 | 1205 | cancel_work_sync(&priv->mib_update_task); |
| @@ -1328,6 +1436,20 @@ static void bcm_enet_get_ethtool_stats(struct net_device *netdev, · 230 unmodified lines | ||
| 1328 | 1436 | mutex_unlock(&priv->mib_update_lock); |
| 1329 | 1437 | } |
| 1330 | 1438 | |
| 1439 | +static int bcm_enet_nway_reset(struct net_device *dev) | |
| 1440 | +{ | |
| 1441 | + struct bcm_enet_priv *priv; | |
| 1442 | + | |
| 1443 | + priv = netdev_priv(dev); | |
| 1444 | + if (priv->has_phy) { | |
| 1445 | + if (!priv->phydev) | |
| 1446 | + return -ENODEV; | |
| 1447 | + return genphy_restart_aneg(priv->phydev); | |
| 1448 | + } | |
| 1449 | + | |
| 1450 | + return -EOPNOTSUPP; | |
| 1451 | +} | |
| 1452 | + | |
| 1331 | 1453 | static int bcm_enet_get_settings(struct net_device *dev, |
| 1332 | 1454 | struct ethtool_cmd *cmd) |
| 1333 | 1455 | { |
| @@ -1470,6 +1592,7 @@ static const struct ethtool_ops bcm_enet_ethtool_ops = { · 136 unmodified lines | ||
| 1470 | 1592 | .get_strings = bcm_enet_get_strings, |
| 1471 | 1593 | .get_sset_count = bcm_enet_get_sset_count, |
| 1472 | 1594 | .get_ethtool_stats = bcm_enet_get_ethtool_stats, |
| 1595 | + .nway_reset = bcm_enet_nway_reset, | |
| 1473 | 1596 | .get_settings = bcm_enet_get_settings, |
| 1474 | 1597 | .set_settings = bcm_enet_set_settings, |
| 1475 | 1598 | .get_drvinfo = bcm_enet_get_drvinfo, |
| @@ -1530,7 +1653,7 @@ static int compute_hw_mtu(struct bcm_enet_priv *priv, int mtu) · 54 unmodified lines | ||
| 1530 | 1653 | * it's appended |
| 1531 | 1654 | */ |
| 1532 | 1655 | priv->rx_skb_size = ALIGN(actual_mtu + ETH_FCS_LEN, |
| 1533 | − BCMENET_DMA_MAXBURST * 4); | |
| 1656 | + priv->dma_maxburst * 4); | |
| 1534 | 1657 | return 0; |
| 1535 | 1658 | } |
| 1536 | 1659 | |
| @@ -1621,7 +1744,7 @@ static int bcm_enet_probe(struct platform_device *pdev) · 84 unmodified lines | ||
| 1621 | 1744 | |
| 1622 | 1745 | /* stop if shared driver failed, assume driver->probe will be |
| 1623 | 1746 | * called in the same order we register devices (correct ?) */ |
| 1624 | − if (!bcm_enet_shared_base) | |
| 1747 | + if (!bcm_enet_shared_base[0]) | |
| 1625 | 1748 | return -ENODEV; |
| 1626 | 1749 | |
| 1627 | 1750 | res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| @@ -1637,6 +1760,9 @@ static int bcm_enet_probe(struct platform_device *pdev) · 9 unmodified lines | ||
| 1637 | 1760 | return -ENOMEM; |
| 1638 | 1761 | priv = netdev_priv(dev); |
| 1639 | 1762 | |
| 1763 | + priv->enet_is_sw = false; | |
| 1764 | + priv->dma_maxburst = BCMENET_DMA_MAXBURST; | |
| 1765 | + | |
| 1640 | 1766 | ret = compute_hw_mtu(priv, dev->mtu); |
| 1641 | 1767 | if (ret) |
| 1642 | 1768 | goto out; |
| @@ -1687,6 +1813,11 @@ static int bcm_enet_probe(struct platform_device *pdev) · 44 unmodified lines | ||
| 1687 | 1813 | priv->pause_tx = pd->pause_tx; |
| 1688 | 1814 | priv->force_duplex_full = pd->force_duplex_full; |
| 1689 | 1815 | priv->force_speed_100 = pd->force_speed_100; |
| 1816 | + priv->dma_chan_en_mask = pd->dma_chan_en_mask; | |
| 1817 | + priv->dma_chan_int_mask = pd->dma_chan_int_mask; | |
| 1818 | + priv->dma_chan_width = pd->dma_chan_width; | |
| 1819 | + priv->dma_has_sram = pd->dma_has_sram; | |
| 1820 | + priv->dma_desc_shift = pd->dma_desc_shift; | |
| 1690 | 1821 | } |
| 1691 | 1822 | |
| 1692 | 1823 | if (priv->mac_id == 0 && priv->has_phy && !priv->use_external_mii) { |
| @@ -1847,7 +1978,6 @@ static int bcm_enet_remove(struct platform_device *pdev) · 154 unmodified lines | ||
| 1847 | 1978 | clk_disable_unprepare(priv->mac_clk); |
| 1848 | 1979 | clk_put(priv->mac_clk); |
| 1849 | 1980 | |
| 1850 | − platform_set_drvdata(pdev, NULL); | |
| 1851 | 1981 | free_netdev(dev); |
| 1852 | 1982 | return 0; |
| 1853 | 1983 | } |
| @@ -1862,55 +1992,920 @@ struct platform_driver bcm63xx_enet_driver = { · 8 unmodified lines | ||
| 1862 | 1992 | }; |
| 1863 | 1993 | |
| 1864 | 1994 | /* |
| 1865 | − * reserve & remap memory space shared between all macs | |
| 1995 | + * switch mii access callbacks | |
| 1866 | 1996 | */ |
| 1867 | −static int bcm_enet_shared_probe(struct platform_device *pdev) | |
| 1997 | +static int bcmenet_sw_mdio_read(struct bcm_enet_priv *priv, | |
| 1998 | + int ext, int phy_id, int location) | |
| 1868 | 1999 | { |
| 1869 | − struct resource *res; | |
| 2000 | + u32 reg; | |
| 2001 | + int ret; | |
| 1870 | 2002 | |
| 1871 | − res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
| 1872 | − if (!res) | |
| 1873 | − return -ENODEV; | |
| 2003 | + spin_lock_bh(&priv->enetsw_mdio_lock); | |
| 2004 | + enetsw_writel(priv, 0, ENETSW_MDIOC_REG); | |
| 1874 | 2005 | |
| 1875 | − bcm_enet_shared_base = devm_request_and_ioremap(&pdev->dev, res); | |
| 1876 | − if (!bcm_enet_shared_base) | |
| 1877 | − return -ENOMEM; | |
| 2006 | + reg = ENETSW_MDIOC_RD_MASK | | |
| 2007 | + (phy_id << ENETSW_MDIOC_PHYID_SHIFT) | | |
| 2008 | + (location << ENETSW_MDIOC_REG_SHIFT); | |
| 1878 | 2009 | |
| 1879 | − return 0; | |
| 2010 | + if (ext) | |
| 2011 | + reg |= ENETSW_MDIOC_EXT_MASK; | |
| 2012 | + | |
| 2013 | + enetsw_writel(priv, reg, ENETSW_MDIOC_REG); | |
| 2014 | + udelay(50); | |
| 2015 | + ret = enetsw_readw(priv, ENETSW_MDIOD_REG); | |
| 2016 | + spin_unlock_bh(&priv->enetsw_mdio_lock); | |
| 2017 | + return ret; | |
| 1880 | 2018 | } |
| 1881 | 2019 | |
| 1882 | −static int bcm_enet_shared_remove(struct platform_device *pdev) | |
| 2020 | +static void bcmenet_sw_mdio_write(struct bcm_enet_priv *priv, | |
| 2021 | + int ext, int phy_id, int location, | |
| 2022 | + uint16_t data) | |
| 1883 | 2023 | { |
| 1884 | − return 0; | |
| 2024 | + u32 reg; | |
| 2025 | + | |
| 2026 | + spin_lock_bh(&priv->enetsw_mdio_lock); | |
| 2027 | + enetsw_writel(priv, 0, ENETSW_MDIOC_REG); | |
| 2028 | + | |
| 2029 | + reg = ENETSW_MDIOC_WR_MASK | | |
| 2030 | + (phy_id << ENETSW_MDIOC_PHYID_SHIFT) | | |
| 2031 | + (location << ENETSW_MDIOC_REG_SHIFT); | |
| 2032 | + | |
| 2033 | + if (ext) | |
| 2034 | + reg |= ENETSW_MDIOC_EXT_MASK; | |
| 2035 | + | |
| 2036 | + reg |= data; | |
| 2037 | + | |
| 2038 | + enetsw_writel(priv, reg, ENETSW_MDIOC_REG); | |
| 2039 | + udelay(50); | |
| 2040 | + spin_unlock_bh(&priv->enetsw_mdio_lock); | |
| 2041 | +} | |
| 2042 | + | |
| 2043 | +static inline int bcm_enet_port_is_rgmii(int portid) | |
| 2044 | +{ | |
| 2045 | + return portid >= ENETSW_RGMII_PORT0; | |
| 1885 | 2046 | } |
| 1886 | 2047 | |
| 1887 | 2048 | /* |
| 1888 | − * this "shared" driver is needed because both macs share a single | |
| 1889 | − * address space | |
| 2049 | + * enet sw PHY polling | |
| 1890 | 2050 | */ |
| 1891 | −struct platform_driver bcm63xx_enet_shared_driver = { | |
| 1892 | − .probe = bcm_enet_shared_probe, | |
| 1893 | − .remove = bcm_enet_shared_remove, | |
| 1894 | − .driver = { | |
| 1895 | − .name = "bcm63xx_enet_shared", | |
| 1896 | − .owner = THIS_MODULE, | |
| 1897 | − }, | |
| 1898 | −}; | |
| 2051 | +static void swphy_poll_timer(unsigned long data) | |
| 2052 | +{ | |
| 2053 | + struct bcm_enet_priv *priv = (struct bcm_enet_priv *)data; | |
| 2054 | + unsigned int i; | |
| 2055 | + | |
| 2056 | + for (i = 0; i < priv->num_ports; i++) { | |
| 2057 | + struct bcm63xx_enetsw_port *port; | |
| 2058 | + int val, j, up, advertise, lpa, lpa2, speed, duplex, media; | |
| 2059 | + int external_phy = bcm_enet_port_is_rgmii(i); | |
| 2060 | + u8 override; | |
| 2061 | + | |
| 2062 | + port = &priv->used_ports[i]; | |
| 2063 | + if (!port->used) | |
| 2064 | + continue; | |
| 2065 | + | |
| 2066 | + if (port->bypass_link) | |
| 2067 | + continue; | |
| 2068 | + | |
| 2069 | + /* dummy read to clear */ | |
| 2070 | + for (j = 0; j < 2; j++) | |
| 2071 | + val = bcmenet_sw_mdio_read(priv, external_phy, | |
| 2072 | + port->phy_id, MII_BMSR); | |
| 2073 | + | |
| 2074 | + if (val == 0xffff) | |
| 2075 | + continue; | |
| 2076 | + | |
| 2077 | + up = (val & BMSR_LSTATUS) ? 1 : 0; | |
| 2078 | + if (!(up ^ priv->sw_port_link[i])) | |
| 2079 | + continue; | |
| 2080 | + | |
| 2081 | + priv->sw_port_link[i] = up; | |
| 2082 | + | |
| 2083 | + /* link changed */ | |
| 2084 | + if (!up) { | |
| 2085 | + dev_info(&priv->pdev->dev, "link DOWN on %s\n", | |
| 2086 | + port->name); | |
| 2087 | + enetsw_writeb(priv, ENETSW_PORTOV_ENABLE_MASK, | |
| 2088 | + ENETSW_PORTOV_REG(i)); | |
| 2089 | + enetsw_writeb(priv, ENETSW_PTCTRL_RXDIS_MASK | | |
| 2090 | + ENETSW_PTCTRL_TXDIS_MASK, | |
| 2091 | + ENETSW_PTCTRL_REG(i)); | |
| 2092 | + continue; | |
| 2093 | + } | |
| 2094 | + | |
| 2095 | + advertise = bcmenet_sw_mdio_read(priv, external_phy, | |
| 2096 | + port->phy_id, MII_ADVERTISE); | |
| 2097 | + | |
| 2098 | + lpa = bcmenet_sw_mdio_read(priv, external_phy, port->phy_id, | |
| 2099 | + MII_LPA); | |
| 2100 | + | |
| 2101 | + lpa2 = bcmenet_sw_mdio_read(priv, external_phy, port->phy_id, | |
| 2102 | + MII_STAT1000); | |
| 2103 | + | |
| 2104 | + /* figure out media and duplex from advertise and LPA values */ | |
| 2105 | + media = mii_nway_result(lpa & advertise); | |
| 2106 | + duplex = (media & ADVERTISE_FULL) ? 1 : 0; | |
| 2107 | + if (lpa2 & LPA_1000FULL) | |
| 2108 | + duplex = 1; | |
| 2109 | + | |
| 2110 | + if (lpa2 & (LPA_1000FULL | LPA_1000HALF)) | |
| 2111 | + speed = 1000; | |
| 2112 | + else { | |
| 2113 | + if (media & (ADVERTISE_100FULL | ADVERTISE_100HALF)) | |
| 2114 | + speed = 100; | |
| 2115 | + else | |
| 2116 | + speed = 10; | |
| 2117 | + } | |
| 2118 | + | |
| 2119 | + dev_info(&priv->pdev->dev, | |
| 2120 | + "link UP on %s, %dMbps, %s-duplex\n", | |
| 2121 | + port->name, speed, duplex ? "full" : "half"); | |
| 2122 | + | |
| 2123 | + override = ENETSW_PORTOV_ENABLE_MASK | | |
| 2124 | + ENETSW_PORTOV_LINKUP_MASK; | |
| 2125 | + | |
| 2126 | + if (speed == 1000) | |
| 2127 | + override |= ENETSW_IMPOV_1000_MASK; | |
| 2128 | + else if (speed == 100) | |
| 2129 | + override |= ENETSW_IMPOV_100_MASK; | |
| 2130 | + if (duplex) | |
| 2131 | + override |= ENETSW_IMPOV_FDX_MASK; | |
| 2132 | + | |
| 2133 | + enetsw_writeb(priv, override, ENETSW_PORTOV_REG(i)); | |
| 2134 | + enetsw_writeb(priv, 0, ENETSW_PTCTRL_REG(i)); | |
| 2135 | + } | |
| 2136 | + | |
| 2137 | + priv->swphy_poll.expires = jiffies + HZ; | |
| 2138 | + add_timer(&priv->swphy_poll); | |
| 2139 | +} | |
| 1899 | 2140 | |
| 1900 | 2141 | /* |
| 1901 | − * entry point | |
| 2142 | + * open callback, allocate dma rings & buffers and start rx operation | |
| 1902 | 2143 | */ |
| 1903 | −static int __init bcm_enet_init(void) | |
| 2144 | +static int bcm_enetsw_open(struct net_device *dev) | |
| 1904 | 2145 | { |
| 1905 | − int ret; | |
| 2146 | + struct bcm_enet_priv *priv; | |
| 2147 | + struct device *kdev; | |
| 2148 | + int i, ret; | |
| 2149 | + unsigned int size; | |
| 2150 | + void *p; | |
| 2151 | + u32 val; | |
| 1906 | 2152 | |
| 1907 | − ret = platform_driver_register(&bcm63xx_enet_shared_driver); | |
| 1908 | − if (ret) | |
| 1909 | − return ret; | |
| 2153 | + priv = netdev_priv(dev); | |
| 2154 | + kdev = &priv->pdev->dev; | |
| 1910 | 2155 | |
| 1911 | − ret = platform_driver_register(&bcm63xx_enet_driver); | |
| 2156 | + /* mask all interrupts and request them */ | |
| 2157 | + enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->rx_chan); | |
| 2158 | + enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->tx_chan); | |
| 2159 | + | |
| 2160 | + ret = request_irq(priv->irq_rx, bcm_enet_isr_dma, | |
| 2161 | + IRQF_DISABLED, dev->name, dev); | |
| 1912 | 2162 | if (ret) |
| 1913 | − platform_driver_unregister(&bcm63xx_enet_shared_driver); | |
| 2163 | + goto out_freeirq; | |
| 2164 | + | |
| 2165 | + if (priv->irq_tx != -1) { | |
| 2166 | + ret = request_irq(priv->irq_tx, bcm_enet_isr_dma, | |
| 2167 | + IRQF_DISABLED, dev->name, dev); | |
| 2168 | + if (ret) | |
| 2169 | + goto out_freeirq_rx; | |
| 2170 | + } | |
| 2171 | + | |
| 2172 | + /* allocate rx dma ring */ | |
| 2173 | + size = priv->rx_ring_size * sizeof(struct bcm_enet_desc); | |
| 2174 | + p = dma_alloc_coherent(kdev, size, &priv->rx_desc_dma, GFP_KERNEL); | |
| 2175 | + if (!p) { | |
| 2176 | + dev_err(kdev, "cannot allocate rx ring %u\n", size); | |
| 2177 | + ret = -ENOMEM; | |
| 2178 | + goto out_freeirq_tx; | |
| 2179 | + } | |
| 2180 | + | |
| 2181 | + memset(p, 0, size); | |
| 2182 | + priv->rx_desc_alloc_size = size; | |
| 2183 | + priv->rx_desc_cpu = p; | |
| 2184 | + | |
| 2185 | + /* allocate tx dma ring */ | |
| 2186 | + size = priv->tx_ring_size * sizeof(struct bcm_enet_desc); | |
| 2187 | + p = dma_alloc_coherent(kdev, size, &priv->tx_desc_dma, GFP_KERNEL); | |
| 2188 | + if (!p) { | |
| 2189 | + dev_err(kdev, "cannot allocate tx ring\n"); | |
| 2190 | + ret = -ENOMEM; | |
| 2191 | + goto out_free_rx_ring; | |
| 2192 | + } | |
| 2193 | + | |
| 2194 | + memset(p, 0, size); | |
| 2195 | + priv->tx_desc_alloc_size = size; | |
| 2196 | + priv->tx_desc_cpu = p; | |
| 2197 | + | |
| 2198 | + priv->tx_skb = kzalloc(sizeof(struct sk_buff *) * priv->tx_ring_size, | |
| 2199 | + GFP_KERNEL); | |
| 2200 | + if (!priv->tx_skb) { | |
| 2201 | + dev_err(kdev, "cannot allocate rx skb queue\n"); | |
| 2202 | + ret = -ENOMEM; | |
| 2203 | + goto out_free_tx_ring; | |
| 2204 | + } | |
| 2205 | + | |
| 2206 | + priv->tx_desc_count = priv->tx_ring_size; | |
| 2207 | + priv->tx_dirty_desc = 0; | |
| 2208 | + priv->tx_curr_desc = 0; | |
| 2209 | + spin_lock_init(&priv->tx_lock); | |
| 2210 | + | |
| 2211 | + /* init & fill rx ring with skbs */ | |
| 2212 | + priv->rx_skb = kzalloc(sizeof(struct sk_buff *) * priv->rx_ring_size, | |
| 2213 | + GFP_KERNEL); | |
| 2214 | + if (!priv->rx_skb) { | |
| 2215 | + dev_err(kdev, "cannot allocate rx skb queue\n"); | |
| 2216 | + ret = -ENOMEM; | |
| 2217 | + goto out_free_tx_skb; | |
| 2218 | + } | |
| 2219 | + | |
| 2220 | + priv->rx_desc_count = 0; | |
| 2221 | + priv->rx_dirty_desc = 0; | |
| 2222 | + priv->rx_curr_desc = 0; | |
| 2223 | + | |
| 2224 | + /* disable all ports */ | |
| 2225 | + for (i = 0; i < priv->num_ports; i++) { | |
| 2226 | + enetsw_writeb(priv, ENETSW_PORTOV_ENABLE_MASK, | |
| 2227 | + ENETSW_PORTOV_REG(i)); | |
| 2228 | + enetsw_writeb(priv, ENETSW_PTCTRL_RXDIS_MASK | | |
| 2229 | + ENETSW_PTCTRL_TXDIS_MASK, | |
| 2230 | + ENETSW_PTCTRL_REG(i)); | |
| 2231 | + | |
| 2232 | + priv->sw_port_link[i] = 0; | |
| 2233 | + } | |
| 2234 | + | |
| 2235 | + /* reset mib */ | |
| 2236 | + val = enetsw_readb(priv, ENETSW_GMCR_REG); | |
| 2237 | + val |= ENETSW_GMCR_RST_MIB_MASK; | |
| 2238 | + enetsw_writeb(priv, val, ENETSW_GMCR_REG); | |
| 2239 | + mdelay(1); | |
| 2240 | + val &= ~ENETSW_GMCR_RST_MIB_MASK; | |
| 2241 | + enetsw_writeb(priv, val, ENETSW_GMCR_REG); | |
| 2242 | + mdelay(1); | |
| 2243 | + | |
| 2244 | + /* force CPU port state */ | |
| 2245 | + val = enetsw_readb(priv, ENETSW_IMPOV_REG); | |
| 2246 | + val |= ENETSW_IMPOV_FORCE_MASK | ENETSW_IMPOV_LINKUP_MASK; | |
| 2247 | + enetsw_writeb(priv, val, ENETSW_IMPOV_REG); | |
| 2248 | + | |
| 2249 | + /* enable switch forward engine */ | |
| 2250 | + val = enetsw_readb(priv, ENETSW_SWMODE_REG); | |
| 2251 | + val |= ENETSW_SWMODE_FWD_EN_MASK; | |
| 2252 | + enetsw_writeb(priv, val, ENETSW_SWMODE_REG); | |
| 2253 | + | |
| 2254 | + /* enable jumbo on all ports */ | |
| 2255 | + enetsw_writel(priv, 0x1ff, ENETSW_JMBCTL_PORT_REG); | |
| 2256 | + enetsw_writew(priv, 9728, ENETSW_JMBCTL_MAXSIZE_REG); | |
| 2257 | + | |
| 2258 | + /* initialize flow control buffer allocation */ | |
| 2259 | + enet_dma_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0, | |
| 2260 | + ENETDMA_BUFALLOC_REG(priv->rx_chan)); | |
| 2261 | + | |
| 2262 | + if (bcm_enet_refill_rx(dev)) { | |
| 2263 | + dev_err(kdev, "cannot allocate rx skb queue\n"); | |
| 2264 | + ret = -ENOMEM; | |
| 2265 | + goto out; | |
| 2266 | + } | |
| 2267 | + | |
| 2268 | + /* write rx & tx ring addresses */ | |
| 2269 | + enet_dmas_writel(priv, priv->rx_desc_dma, | |
| 2270 | + ENETDMAS_RSTART_REG, priv->rx_chan); | |
| 2271 | + enet_dmas_writel(priv, priv->tx_desc_dma, | |
| 2272 | + ENETDMAS_RSTART_REG, priv->tx_chan); | |
| 2273 | + | |
| 2274 | + /* clear remaining state ram for rx & tx channel */ | |
| 2275 | + enet_dmas_writel(priv, 0, ENETDMAS_SRAM2_REG, priv->rx_chan); | |
| 2276 | + enet_dmas_writel(priv, 0, ENETDMAS_SRAM2_REG, priv->tx_chan); | |
| 2277 | + enet_dmas_writel(priv, 0, ENETDMAS_SRAM3_REG, priv->rx_chan); | |
| 2278 | + enet_dmas_writel(priv, 0, ENETDMAS_SRAM3_REG, priv->tx_chan); | |
| 2279 | + enet_dmas_writel(priv, 0, ENETDMAS_SRAM4_REG, priv->rx_chan); | |
| 2280 | + enet_dmas_writel(priv, 0, ENETDMAS_SRAM4_REG, priv->tx_chan); | |
| 2281 | + | |
| 2282 | + /* set dma maximum burst len */ | |
| 2283 | + enet_dmac_writel(priv, priv->dma_maxburst, | |
| 2284 | + ENETDMAC_MAXBURST, priv->rx_chan); | |
| 2285 | + enet_dmac_writel(priv, priv->dma_maxburst, | |
| 2286 | + ENETDMAC_MAXBURST, priv->tx_chan); | |
| 2287 | + | |
| 2288 | + /* set flow control low/high threshold to 1/3 / 2/3 */ | |
| 2289 | + val = priv->rx_ring_size / 3; | |
| 2290 | + enet_dma_writel(priv, val, ENETDMA_FLOWCL_REG(priv->rx_chan)); | |
| 2291 | + val = (priv->rx_ring_size * 2) / 3; | |
| 2292 | + enet_dma_writel(priv, val, ENETDMA_FLOWCH_REG(priv->rx_chan)); | |
| 2293 | + | |
| 2294 | + /* all set, enable mac and interrupts, start dma engine and | |
| 2295 | + * kick rx dma channel | |
| 2296 | + */ | |
| 2297 | + wmb(); | |
| 2298 | + enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG); | |
| 2299 | + enet_dmac_writel(priv, ENETDMAC_CHANCFG_EN_MASK, | |
| 2300 | + ENETDMAC_CHANCFG, priv->rx_chan); | |
| 2301 | + | |
| 2302 | + /* watch "packet transferred" interrupt in rx and tx */ | |
| 2303 | + enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK, | |
| 2304 | + ENETDMAC_IR, priv->rx_chan); | |
| 2305 | + enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK, | |
| 2306 | + ENETDMAC_IR, priv->tx_chan); | |
| 2307 | + | |
| 2308 | + /* make sure we enable napi before rx interrupt */ | |
| 2309 | + napi_enable(&priv->napi); | |
| 2310 | + | |
| 2311 | + enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK, | |
| 2312 | + ENETDMAC_IRMASK, priv->rx_chan); | |
| 2313 | + enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK, | |
| 2314 | + ENETDMAC_IRMASK, priv->tx_chan); | |
| 2315 | + | |
| 2316 | + netif_carrier_on(dev); | |
| 2317 | + netif_start_queue(dev); | |
| 2318 | + | |
| 2319 | + /* apply override config for bypass_link ports here. */ | |
| 2320 | + for (i = 0; i < priv->num_ports; i++) { | |
| 2321 | + struct bcm63xx_enetsw_port *port; | |
| 2322 | + u8 override; | |
| 2323 | + port = &priv->used_ports[i]; | |
| 2324 | + if (!port->used) | |
| 2325 | + continue; | |
| 2326 | + | |
| 2327 | + if (!port->bypass_link) | |
| 2328 | + continue; | |
| 2329 | + | |
| 2330 | + override = ENETSW_PORTOV_ENABLE_MASK | | |
| 2331 | + ENETSW_PORTOV_LINKUP_MASK; | |
| 2332 | + | |
| 2333 | + switch (port->force_speed) { | |
| 2334 | + case 1000: | |
| 2335 | + override |= ENETSW_IMPOV_1000_MASK; | |
| 2336 | + break; | |
| 2337 | + case 100: | |
| 2338 | + override |= ENETSW_IMPOV_100_MASK; | |
| 2339 | + break; | |
| 2340 | + case 10: | |
| 2341 | + break; | |
| 2342 | + default: | |
| 2343 | + pr_warn("invalid forced speed on port %s: assume 10\n", | |
| 2344 | + port->name); | |
| 2345 | + break; | |
| 2346 | + } | |
| 2347 | + | |
| 2348 | + if (port->force_duplex_full) | |
| 2349 | + override |= ENETSW_IMPOV_FDX_MASK; | |
| 2350 | + | |
| 2351 | + | |
| 2352 | + enetsw_writeb(priv, override, ENETSW_PORTOV_REG(i)); | |
| 2353 | + enetsw_writeb(priv, 0, ENETSW_PTCTRL_REG(i)); | |
| 2354 | + } | |
| 2355 | + | |
| 2356 | + /* start phy polling timer */ | |
| 2357 | + init_timer(&priv->swphy_poll); | |
| 2358 | + priv->swphy_poll.function = swphy_poll_timer; | |
| 2359 | + priv->swphy_poll.data = (unsigned long)priv; | |
| 2360 | + priv->swphy_poll.expires = jiffies; | |
| 2361 | + add_timer(&priv->swphy_poll); | |
| 2362 | + return 0; | |
| 2363 | + | |
| 2364 | +out: | |
| 2365 | + for (i = 0; i < priv->rx_ring_size; i++) { | |
| 2366 | + struct bcm_enet_desc *desc; | |
| 2367 | + | |
| 2368 | + if (!priv->rx_skb[i]) | |
| 2369 | + continue; | |
| 2370 | + | |
| 2371 | + desc = &priv->rx_desc_cpu[i]; | |
| 2372 | + dma_unmap_single(kdev, desc->address, priv->rx_skb_size, | |
| 2373 | + DMA_FROM_DEVICE); | |
| 2374 | + kfree_skb(priv->rx_skb[i]); | |
| 2375 | + } | |
| 2376 | + kfree(priv->rx_skb); | |
| 2377 | + | |
| 2378 | +out_free_tx_skb: | |
| 2379 | + kfree(priv->tx_skb); | |
| 2380 | + | |
| 2381 | +out_free_tx_ring: | |
| 2382 | + dma_free_coherent(kdev, priv->tx_desc_alloc_size, | |
| 2383 | + priv->tx_desc_cpu, priv->tx_desc_dma); | |
| 2384 | + | |
| 2385 | +out_free_rx_ring: | |
| 2386 | + dma_free_coherent(kdev, priv->rx_desc_alloc_size, | |
| 2387 | + priv->rx_desc_cpu, priv->rx_desc_dma); | |
| 2388 | + | |
| 2389 | +out_freeirq_tx: | |
| 2390 | + if (priv->irq_tx != -1) | |
| 2391 | + free_irq(priv->irq_tx, dev); | |
| 2392 | + | |
| 2393 | +out_freeirq_rx: | |
| 2394 | + free_irq(priv->irq_rx, dev); | |
| 2395 | + | |
| 2396 | +out_freeirq: | |
| 2397 | + return ret; | |
| 2398 | +} | |
| 2399 | + | |
| 2400 | +/* stop callback */ | |
| 2401 | +static int bcm_enetsw_stop(struct net_device *dev) | |
| 2402 | +{ | |
| 2403 | + struct bcm_enet_priv *priv; | |
| 2404 | + struct device *kdev; | |
| 2405 | + int i; | |
| 2406 | + | |
| 2407 | + priv = netdev_priv(dev); | |
| 2408 | + kdev = &priv->pdev->dev; | |
| 2409 | + | |
| 2410 | + del_timer_sync(&priv->swphy_poll); | |
| 2411 | + netif_stop_queue(dev); | |
| 2412 | + napi_disable(&priv->napi); | |
| 2413 | + del_timer_sync(&priv->rx_timeout); | |
| 2414 | + | |
| 2415 | + /* mask all interrupts */ | |
| 2416 | + enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->rx_chan); | |
| 2417 | + enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv->tx_chan); | |
| 2418 | + | |
| 2419 | + /* disable dma & mac */ | |
| 2420 | + bcm_enet_disable_dma(priv, priv->tx_chan); | |
| 2421 | + bcm_enet_disable_dma(priv, priv->rx_chan); | |
| 2422 | + | |
| 2423 | + /* force reclaim of all tx buffers */ | |
| 2424 | + bcm_enet_tx_reclaim(dev, 1); | |
| 2425 | + | |
| 2426 | + /* free the rx skb ring */ | |
| 2427 | + for (i = 0; i < priv->rx_ring_size; i++) { | |
| 2428 | + struct bcm_enet_desc *desc; | |
| 2429 | + | |
| 2430 | + if (!priv->rx_skb[i]) | |
| 2431 | + continue; | |
| 2432 | + | |
| 2433 | + desc = &priv->rx_desc_cpu[i]; | |
| 2434 | + dma_unmap_single(kdev, desc->address, priv->rx_skb_size, | |
| 2435 | + DMA_FROM_DEVICE); | |
| 2436 | + kfree_skb(priv->rx_skb[i]); | |
| 2437 | + } | |
| 2438 | + | |
| 2439 | + /* free remaining allocated memory */ | |
| 2440 | + kfree(priv->rx_skb); | |
| 2441 | + kfree(priv->tx_skb); | |
| 2442 | + dma_free_coherent(kdev, priv->rx_desc_alloc_size, | |
| 2443 | + priv->rx_desc_cpu, priv->rx_desc_dma); | |
| 2444 | + dma_free_coherent(kdev, priv->tx_desc_alloc_size, | |
| 2445 | + priv->tx_desc_cpu, priv->tx_desc_dma); | |
| 2446 | + if (priv->irq_tx != -1) | |
| 2447 | + free_irq(priv->irq_tx, dev); | |
| 2448 | + free_irq(priv->irq_rx, dev); | |
| 2449 | + | |
| 2450 | + return 0; | |
| 2451 | +} | |
| 2452 | + | |
| 2453 | +/* try to sort out phy external status by walking the used_port field | |
| 2454 | + * in the bcm_enet_priv structure. in case the phy address is not | |
| 2455 | + * assigned to any physical port on the switch, assume it is external | |
| 2456 | + * (and yell at the user). | |
| 2457 | + */ | |
| 2458 | +static int bcm_enetsw_phy_is_external(struct bcm_enet_priv *priv, int phy_id) | |
| 2459 | +{ | |
| 2460 | + int i; | |
| 2461 | + | |
| 2462 | + for (i = 0; i < priv->num_ports; ++i) { | |
| 2463 | + if (!priv->used_ports[i].used) | |
| 2464 | + continue; | |
| 2465 | + if (priv->used_ports[i].phy_id == phy_id) | |
| 2466 | + return bcm_enet_port_is_rgmii(i); | |
| 2467 | + } | |
| 2468 | + | |
| 2469 | + printk_once(KERN_WARNING "bcm63xx_enet: could not find a used port with phy_id %i, assuming phy is external\n", | |
| 2470 | + phy_id); | |
| 2471 | + return 1; | |
| 2472 | +} | |
| 2473 | + | |
| 2474 | +/* can't use bcmenet_sw_mdio_read directly as we need to sort out | |
| 2475 | + * external/internal status of the given phy_id first. | |
| 2476 | + */ | |
| 2477 | +static int bcm_enetsw_mii_mdio_read(struct net_device *dev, int phy_id, | |
| 2478 | + int location) | |
| 2479 | +{ | |
| 2480 | + struct bcm_enet_priv *priv; | |
| 2481 | + | |
| 2482 | + priv = netdev_priv(dev); | |
| 2483 | + return bcmenet_sw_mdio_read(priv, | |
| 2484 | + bcm_enetsw_phy_is_external(priv, phy_id), | |
| 2485 | + phy_id, location); | |
| 2486 | +} | |
| 2487 | + | |
| 2488 | +/* can't use bcmenet_sw_mdio_write directly as we need to sort out | |
| 2489 | + * external/internal status of the given phy_id first. | |
| 2490 | + */ | |
| 2491 | +static void bcm_enetsw_mii_mdio_write(struct net_device *dev, int phy_id, | |
| 2492 | + int location, | |
| 2493 | + int val) | |
| 2494 | +{ | |
| 2495 | + struct bcm_enet_priv *priv; | |
| 2496 | + | |
| 2497 | + priv = netdev_priv(dev); | |
| 2498 | + bcmenet_sw_mdio_write(priv, bcm_enetsw_phy_is_external(priv, phy_id), | |
| 2499 | + phy_id, location, val); | |
| 2500 | +} | |
| 2501 | + | |
| 2502 | +static int bcm_enetsw_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |
| 2503 | +{ | |
| 2504 | + struct mii_if_info mii; | |
| 2505 | + | |
| 2506 | + mii.dev = dev; | |
| 2507 | + mii.mdio_read = bcm_enetsw_mii_mdio_read; | |
| 2508 | + mii.mdio_write = bcm_enetsw_mii_mdio_write; | |
| 2509 | + mii.phy_id = 0; | |
| 2510 | + mii.phy_id_mask = 0x3f; | |
| 2511 | + mii.reg_num_mask = 0x1f; | |
| 2512 | + return generic_mii_ioctl(&mii, if_mii(rq), cmd, NULL); | |
| 2513 | + | |
| 2514 | +} | |
| 2515 | + | |
| 2516 | +static const struct net_device_ops bcm_enetsw_ops = { | |
| 2517 | + .ndo_open = bcm_enetsw_open, | |
| 2518 | + .ndo_stop = bcm_enetsw_stop, | |
| 2519 | + .ndo_start_xmit = bcm_enet_start_xmit, | |
| 2520 | + .ndo_change_mtu = bcm_enet_change_mtu, | |
| 2521 | + .ndo_do_ioctl = bcm_enetsw_ioctl, | |
| 2522 | +}; | |
| 2523 | + | |
| 2524 | + | |
| 2525 | +static const struct bcm_enet_stats bcm_enetsw_gstrings_stats[] = { | |
| 2526 | + { "rx_packets", DEV_STAT(rx_packets), -1 }, | |
| 2527 | + { "tx_packets", DEV_STAT(tx_packets), -1 }, | |
| 2528 | + { "rx_bytes", DEV_STAT(rx_bytes), -1 }, | |
| 2529 | + { "tx_bytes", DEV_STAT(tx_bytes), -1 }, | |
| 2530 | + { "rx_errors", DEV_STAT(rx_errors), -1 }, | |
| 2531 | + { "tx_errors", DEV_STAT(tx_errors), -1 }, | |
| 2532 | + { "rx_dropped", DEV_STAT(rx_dropped), -1 }, | |
| 2533 | + { "tx_dropped", DEV_STAT(tx_dropped), -1 }, | |
| 2534 | + | |
| 2535 | + { "tx_good_octets", GEN_STAT(mib.tx_gd_octets), ETHSW_MIB_RX_GD_OCT }, | |
| 2536 | + { "tx_unicast", GEN_STAT(mib.tx_unicast), ETHSW_MIB_RX_BRDCAST }, | |
| 2537 | + { "tx_broadcast", GEN_STAT(mib.tx_brdcast), ETHSW_MIB_RX_BRDCAST }, | |
| 2538 | + { "tx_multicast", GEN_STAT(mib.tx_mult), ETHSW_MIB_RX_MULT }, | |
| 2539 | + { "tx_64_octets", GEN_STAT(mib.tx_64), ETHSW_MIB_RX_64 }, | |
| 2540 | + { "tx_65_127_oct", GEN_STAT(mib.tx_65_127), ETHSW_MIB_RX_65_127 }, | |
| 2541 | + { "tx_128_255_oct", GEN_STAT(mib.tx_128_255), ETHSW_MIB_RX_128_255 }, | |
| 2542 | + { "tx_256_511_oct", GEN_STAT(mib.tx_256_511), ETHSW_MIB_RX_256_511 }, | |
| 2543 | + { "tx_512_1023_oct", GEN_STAT(mib.tx_512_1023), ETHSW_MIB_RX_512_1023}, | |
| 2544 | + { "tx_1024_1522_oct", GEN_STAT(mib.tx_1024_max), | |
| 2545 | + ETHSW_MIB_RX_1024_1522 }, | |
| 2546 | + { "tx_1523_2047_oct", GEN_STAT(mib.tx_1523_2047), | |
| 2547 | + ETHSW_MIB_RX_1523_2047 }, | |
| 2548 | + { "tx_2048_4095_oct", GEN_STAT(mib.tx_2048_4095), | |
| 2549 | + ETHSW_MIB_RX_2048_4095 }, | |
| 2550 | + { "tx_4096_8191_oct", GEN_STAT(mib.tx_4096_8191), | |
| 2551 | + ETHSW_MIB_RX_4096_8191 }, | |
| 2552 | + { "tx_8192_9728_oct", GEN_STAT(mib.tx_8192_9728), | |
| 2553 | + ETHSW_MIB_RX_8192_9728 }, | |
| 2554 | + { "tx_oversize", GEN_STAT(mib.tx_ovr), ETHSW_MIB_RX_OVR }, | |
| 2555 | + { "tx_oversize_drop", GEN_STAT(mib.tx_ovr), ETHSW_MIB_RX_OVR_DISC }, | |
| 2556 | + { "tx_dropped", GEN_STAT(mib.tx_drop), ETHSW_MIB_RX_DROP }, | |
| 2557 | + { "tx_undersize", GEN_STAT(mib.tx_underrun), ETHSW_MIB_RX_UND }, | |
| 2558 | + { "tx_pause", GEN_STAT(mib.tx_pause), ETHSW_MIB_RX_PAUSE }, | |
| 2559 | + | |
| 2560 | + { "rx_good_octets", GEN_STAT(mib.rx_gd_octets), ETHSW_MIB_TX_ALL_OCT }, | |
| 2561 | + { "rx_broadcast", GEN_STAT(mib.rx_brdcast), ETHSW_MIB_TX_BRDCAST }, | |
| 2562 | + { "rx_multicast", GEN_STAT(mib.rx_mult), ETHSW_MIB_TX_MULT }, | |
| 2563 | + { "rx_unicast", GEN_STAT(mib.rx_unicast), ETHSW_MIB_TX_MULT }, | |
| 2564 | + { "rx_pause", GEN_STAT(mib.rx_pause), ETHSW_MIB_TX_PAUSE }, | |
| 2565 | + { "rx_dropped", GEN_STAT(mib.rx_drop), ETHSW_MIB_TX_DROP_PKTS }, | |
| 2566 | + | |
| 2567 | +}; | |
| 2568 | + | |
| 2569 | +#define BCM_ENETSW_STATS_LEN \ | |
| 2570 | + (sizeof(bcm_enetsw_gstrings_stats) / sizeof(struct bcm_enet_stats)) | |
| 2571 | + | |
| 2572 | +static void bcm_enetsw_get_strings(struct net_device *netdev, | |
| 2573 | + u32 stringset, u8 *data) | |
| 2574 | +{ | |
| 2575 | + int i; | |
| 2576 | + | |
| 2577 | + switch (stringset) { | |
| 2578 | + case ETH_SS_STATS: | |
| 2579 | + for (i = 0; i < BCM_ENETSW_STATS_LEN; i++) { | |
| 2580 | + memcpy(data + i * ETH_GSTRING_LEN, | |
| 2581 | + bcm_enetsw_gstrings_stats[i].stat_string, | |
| 2582 | + ETH_GSTRING_LEN); | |
| 2583 | + } | |
| 2584 | + break; | |
| 2585 | + } | |
| 2586 | +} | |
| 2587 | + | |
| 2588 | +static int bcm_enetsw_get_sset_count(struct net_device *netdev, | |
| 2589 | + int string_set) | |
| 2590 | +{ | |
| 2591 | + switch (string_set) { | |
| 2592 | + case ETH_SS_STATS: | |
| 2593 | + return BCM_ENETSW_STATS_LEN; | |
| 2594 | + default: | |
| 2595 | + return -EINVAL; | |
| 2596 | + } | |
| 2597 | +} | |
| 2598 | + | |
| 2599 | +static void bcm_enetsw_get_drvinfo(struct net_device *netdev, | |
| 2600 | + struct ethtool_drvinfo *drvinfo) | |
| 2601 | +{ | |
| 2602 | + strncpy(drvinfo->driver, bcm_enet_driver_name, 32); | |
| 2603 | + strncpy(drvinfo->version, bcm_enet_driver_version, 32); | |
| 2604 | + strncpy(drvinfo->fw_version, "N/A", 32); | |
| 2605 | + strncpy(drvinfo->bus_info, "bcm63xx", 32); | |
| 2606 | + drvinfo->n_stats = BCM_ENETSW_STATS_LEN; | |
| 2607 | +} | |
| 2608 | + | |
| 2609 | +static void bcm_enetsw_get_ethtool_stats(struct net_device *netdev, | |
| 2610 | + struct ethtool_stats *stats, | |
| 2611 | + u64 *data) | |
| 2612 | +{ | |
| 2613 | + struct bcm_enet_priv *priv; | |
| 2614 | + int i; | |
| 2615 | + | |
| 2616 | + priv = netdev_priv(netdev); | |
| 2617 | + | |
| 2618 | + for (i = 0; i < BCM_ENETSW_STATS_LEN; i++) { | |
| 2619 | + const struct bcm_enet_stats *s; | |
| 2620 | + u32 lo, hi; | |
| 2621 | + char *p; | |
| 2622 | + int reg; | |
| 2623 | + | |
| 2624 | + s = &bcm_enetsw_gstrings_stats[i]; | |
| 2625 | + | |
| 2626 | + reg = s->mib_reg; | |
| 2627 | + if (reg == -1) | |
| 2628 | + continue; | |
| 2629 | + | |
| 2630 | + lo = enetsw_readl(priv, ENETSW_MIB_REG(reg)); | |
| 2631 | + p = (char *)priv + s->stat_offset; | |
| 2632 | + | |
| 2633 | + if (s->sizeof_stat == sizeof(u64)) { | |
| 2634 | + hi = enetsw_readl(priv, ENETSW_MIB_REG(reg + 1)); | |
| 2635 | + *(u64 *)p = ((u64)hi << 32 | lo); | |
| 2636 | + } else { | |
| 2637 | + *(u32 *)p = lo; | |
| 2638 | + } | |
| 2639 | + } | |
| 2640 | + | |
| 2641 | + for (i = 0; i < BCM_ENETSW_STATS_LEN; i++) { | |
| 2642 | + const struct bcm_enet_stats *s; | |
| 2643 | + char *p; | |
| 2644 | + | |
| 2645 | + s = &bcm_enetsw_gstrings_stats[i]; | |
| 2646 | + | |
| 2647 | + if (s->mib_reg == -1) | |
| 2648 | + p = (char *)&netdev->stats + s->stat_offset; | |
| 2649 | + else | |
| 2650 | + p = (char *)priv + s->stat_offset; | |
| 2651 | + | |
| 2652 | + data[i] = (s->sizeof_stat == sizeof(u64)) ? | |
| 2653 | + *(u64 *)p : *(u32 *)p; | |
| 2654 | + } | |
| 2655 | +} | |
| 2656 | + | |
| 2657 | +static void bcm_enetsw_get_ringparam(struct net_device *dev, | |
| 2658 | + struct ethtool_ringparam *ering) | |
| 2659 | +{ | |
| 2660 | + struct bcm_enet_priv *priv; | |
| 2661 | + | |
| 2662 | + priv = netdev_priv(dev); | |
| 2663 | + | |
| 2664 | + /* rx/tx ring is actually only limited by memory */ | |
| 2665 | + ering->rx_max_pending = 8192; | |
| 2666 | + ering->tx_max_pending = 8192; | |
| 2667 | + ering->rx_mini_max_pending = 0; | |
| 2668 | + ering->rx_jumbo_max_pending = 0; | |
| 2669 | + ering->rx_pending = priv->rx_ring_size; | |
| 2670 | + ering->tx_pending = priv->tx_ring_size; | |
| 2671 | +} | |
| 2672 | + | |
| 2673 | +static int bcm_enetsw_set_ringparam(struct net_device *dev, | |
| 2674 | + struct ethtool_ringparam *ering) | |
| 2675 | +{ | |
| 2676 | + struct bcm_enet_priv *priv; | |
| 2677 | + int was_running; | |
| 2678 | + | |
| 2679 | + priv = netdev_priv(dev); | |
| 2680 | + | |
| 2681 | + was_running = 0; | |
| 2682 | + if (netif_running(dev)) { | |
| 2683 | + bcm_enetsw_stop(dev); | |
| 2684 | + was_running = 1; | |
| 2685 | + } | |
| 2686 | + | |
| 2687 | + priv->rx_ring_size = ering->rx_pending; | |
| 2688 | + priv->tx_ring_size = ering->tx_pending; | |
| 2689 | + | |
| 2690 | + if (was_running) { | |
| 2691 | + int err; | |
| 2692 | + | |
| 2693 | + err = bcm_enetsw_open(dev); | |
| 2694 | + if (err) | |
| 2695 | + dev_close(dev); | |
| 2696 | + } | |
| 2697 | + return 0; | |
| 2698 | +} | |
| 2699 | + | |
| 2700 | +static struct ethtool_ops bcm_enetsw_ethtool_ops = { | |
| 2701 | + .get_strings = bcm_enetsw_get_strings, | |
| 2702 | + .get_sset_count = bcm_enetsw_get_sset_count, | |
| 2703 | + .get_ethtool_stats = bcm_enetsw_get_ethtool_stats, | |
| 2704 | + .get_drvinfo = bcm_enetsw_get_drvinfo, | |
| 2705 | + .get_ringparam = bcm_enetsw_get_ringparam, | |
| 2706 | + .set_ringparam = bcm_enetsw_set_ringparam, | |
| 2707 | +}; | |
| 2708 | + | |
| 2709 | +/* allocate netdevice, request register memory and register device. */ | |
| 2710 | +static int bcm_enetsw_probe(struct platform_device *pdev) | |
| 2711 | +{ | |
| 2712 | + struct bcm_enet_priv *priv; | |
| 2713 | + struct net_device *dev; | |
| 2714 | + struct bcm63xx_enetsw_platform_data *pd; | |
| 2715 | + struct resource *res_mem; | |
| 2716 | + int ret, irq_rx, irq_tx; | |
| 2717 | + | |
| 2718 | + /* stop if shared driver failed, assume driver->probe will be | |
| 2719 | + * called in the same order we register devices (correct ?) | |
| 2720 | + */ | |
| 2721 | + if (!bcm_enet_shared_base[0]) | |
| 2722 | + return -ENODEV; | |
| 2723 | + | |
| 2724 | + res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
| 2725 | + irq_rx = platform_get_irq(pdev, 0); | |
| 2726 | + irq_tx = platform_get_irq(pdev, 1); | |
| 2727 | + if (!res_mem || irq_rx < 0) | |
| 2728 | + return -ENODEV; | |
| 2729 | + | |
| 2730 | + ret = 0; | |
| 2731 | + dev = alloc_etherdev(sizeof(*priv)); | |
| 2732 | + if (!dev) | |
| 2733 | + return -ENOMEM; | |
| 2734 | + priv = netdev_priv(dev); | |
| 2735 | + memset(priv, 0, sizeof(*priv)); | |
| 2736 | + | |
| 2737 | + /* initialize default and fetch platform data */ | |
| 2738 | + priv->enet_is_sw = true; | |
| 2739 | + priv->irq_rx = irq_rx; | |
| 2740 | + priv->irq_tx = irq_tx; | |
| 2741 | + priv->rx_ring_size = BCMENET_DEF_RX_DESC; | |
| 2742 | + priv->tx_ring_size = BCMENET_DEF_TX_DESC; | |
| 2743 | + priv->dma_maxburst = BCMENETSW_DMA_MAXBURST; | |
| 2744 | + | |
| 2745 | + pd = pdev->dev.platform_data; | |
| 2746 | + if (pd) { | |
| 2747 | + memcpy(dev->dev_addr, pd->mac_addr, ETH_ALEN); | |
| 2748 | + memcpy(priv->used_ports, pd->used_ports, | |
| 2749 | + sizeof(pd->used_ports)); | |
| 2750 | + priv->num_ports = pd->num_ports; | |
| 2751 | + priv->dma_has_sram = pd->dma_has_sram; | |
| 2752 | + priv->dma_chan_en_mask = pd->dma_chan_en_mask; | |
| 2753 | + priv->dma_chan_int_mask = pd->dma_chan_int_mask; | |
| 2754 | + priv->dma_chan_width = pd->dma_chan_width; | |
| 2755 | + } | |
| 2756 | + | |
| 2757 | + ret = compute_hw_mtu(priv, dev->mtu); | |
| 2758 | + if (ret) | |
| 2759 | + goto out; | |
| 2760 | + | |
| 2761 | + if (!request_mem_region(res_mem->start, resource_size(res_mem), | |
| 2762 | + "bcm63xx_enetsw")) { | |
| 2763 | + ret = -EBUSY; | |
| 2764 | + goto out; | |
| 2765 | + } | |
| 2766 | + | |
| 2767 | + priv->base = ioremap(res_mem->start, resource_size(res_mem)); | |
| 2768 | + if (priv->base == NULL) { | |
| 2769 | + ret = -ENOMEM; | |
| 2770 | + goto out_release_mem; | |
| 2771 | + } | |
| 2772 | + | |
| 2773 | + priv->mac_clk = clk_get(&pdev->dev, "enetsw"); | |
| 2774 | + if (IS_ERR(priv->mac_clk)) { | |
| 2775 | + ret = PTR_ERR(priv->mac_clk); | |
| 2776 | + goto out_unmap; | |
| 2777 | + } | |
| 2778 | + clk_enable(priv->mac_clk); | |
| 2779 | + | |
| 2780 | + priv->rx_chan = 0; | |
| 2781 | + priv->tx_chan = 1; | |
| 2782 | + spin_lock_init(&priv->rx_lock); | |
| 2783 | + | |
| 2784 | + /* init rx timeout (used for oom) */ | |
| 2785 | + init_timer(&priv->rx_timeout); | |
| 2786 | + priv->rx_timeout.function = bcm_enet_refill_rx_timer; | |
| 2787 | + priv->rx_timeout.data = (unsigned long)dev; | |
| 2788 | + | |
| 2789 | + /* register netdevice */ | |
| 2790 | + dev->netdev_ops = &bcm_enetsw_ops; | |
| 2791 | + netif_napi_add(dev, &priv->napi, bcm_enet_poll, 16); | |
| 2792 | + SET_ETHTOOL_OPS(dev, &bcm_enetsw_ethtool_ops); | |
| 2793 | + SET_NETDEV_DEV(dev, &pdev->dev); | |
| 2794 | + | |
| 2795 | + spin_lock_init(&priv->enetsw_mdio_lock); | |
| 2796 | + | |
| 2797 | + ret = register_netdev(dev); | |
| 2798 | + if (ret) | |
| 2799 | + goto out_put_clk; | |
| 2800 | + | |
| 2801 | + netif_carrier_off(dev); | |
| 2802 | + platform_set_drvdata(pdev, dev); | |
| 2803 | + priv->pdev = pdev; | |
| 2804 | + priv->net_dev = dev; | |
| 2805 | + | |
| 2806 | + return 0; | |
| 2807 | + | |
| 2808 | +out_put_clk: | |
| 2809 | + clk_put(priv->mac_clk); | |
| 2810 | + | |
| 2811 | +out_unmap: | |
| 2812 | + iounmap(priv->base); | |
| 2813 | + | |
| 2814 | +out_release_mem: | |
| 2815 | + release_mem_region(res_mem->start, resource_size(res_mem)); | |
| 2816 | +out: | |
| 2817 | + free_netdev(dev); | |
| 2818 | + return ret; | |
| 2819 | +} | |
| 2820 | + | |
| 2821 | + | |
| 2822 | +/* exit func, stops hardware and unregisters netdevice */ | |
| 2823 | +static int bcm_enetsw_remove(struct platform_device *pdev) | |
| 2824 | +{ | |
| 2825 | + struct bcm_enet_priv *priv; | |
| 2826 | + struct net_device *dev; | |
| 2827 | + struct resource *res; | |
| 2828 | + | |
| 2829 | + /* stop netdevice */ | |
| 2830 | + dev = platform_get_drvdata(pdev); | |
| 2831 | + priv = netdev_priv(dev); | |
| 2832 | + unregister_netdev(dev); | |
| 2833 | + | |
| 2834 | + /* release device resources */ | |
| 2835 | + iounmap(priv->base); | |
| 2836 | + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
| 2837 | + release_mem_region(res->start, resource_size(res)); | |
| 2838 | + | |
| 2839 | + platform_set_drvdata(pdev, NULL); | |
| 2840 | + free_netdev(dev); | |
| 2841 | + return 0; | |
| 2842 | +} | |
| 2843 | + | |
| 2844 | +struct platform_driver bcm63xx_enetsw_driver = { | |
| 2845 | + .probe = bcm_enetsw_probe, | |
| 2846 | + .remove = bcm_enetsw_remove, | |
| 2847 | + .driver = { | |
| 2848 | + .name = "bcm63xx_enetsw", | |
| 2849 | + .owner = THIS_MODULE, | |
| 2850 | + }, | |
| 2851 | +}; | |
| 2852 | + | |
| 2853 | +/* reserve & remap memory space shared between all macs */ | |
| 2854 | +static int bcm_enet_shared_probe(struct platform_device *pdev) | |
| 2855 | +{ | |
| 2856 | + struct resource *res; | |
| 2857 | + void __iomem *p[3]; | |
| 2858 | + unsigned int i; | |
| 2859 | + | |
| 2860 | + memset(bcm_enet_shared_base, 0, sizeof(bcm_enet_shared_base)); | |
| 2861 | + | |
| 2862 | + for (i = 0; i < 3; i++) { | |
| 2863 | + res = platform_get_resource(pdev, IORESOURCE_MEM, i); | |
| 2864 | + p[i] = devm_ioremap_resource(&pdev->dev, res); | |
| 2865 | + if (IS_ERR(p[i])) | |
| 2866 | + return PTR_ERR(p[i]); | |
| 2867 | + } | |
| 2868 | + | |
| 2869 | + memcpy(bcm_enet_shared_base, p, sizeof(bcm_enet_shared_base)); | |
| 2870 | + | |
| 2871 | + return 0; | |
| 2872 | +} | |
| 2873 | + | |
| 2874 | +static int bcm_enet_shared_remove(struct platform_device *pdev) | |
| 2875 | +{ | |
| 2876 | + return 0; | |
| 2877 | +} | |
| 2878 | + | |
| 2879 | +/* this "shared" driver is needed because both macs share a single | |
| 2880 | + * address space | |
| 2881 | + */ | |
| 2882 | +struct platform_driver bcm63xx_enet_shared_driver = { | |
| 2883 | + .probe = bcm_enet_shared_probe, | |
| 2884 | + .remove = bcm_enet_shared_remove, | |
| 2885 | + .driver = { | |
| 2886 | + .name = "bcm63xx_enet_shared", | |
| 2887 | + .owner = THIS_MODULE, | |
| 2888 | + }, | |
| 2889 | +}; | |
| 2890 | + | |
| 2891 | +/* entry point */ | |
| 2892 | +static int __init bcm_enet_init(void) | |
| 2893 | +{ | |
| 2894 | + int ret; | |
| 2895 | + | |
| 2896 | + ret = platform_driver_register(&bcm63xx_enet_shared_driver); | |
| 2897 | + if (ret) | |
| 2898 | + return ret; | |
| 2899 | + | |
| 2900 | + ret = platform_driver_register(&bcm63xx_enet_driver); | |
| 2901 | + if (ret) | |
| 2902 | + platform_driver_unregister(&bcm63xx_enet_shared_driver); | |
| 2903 | + | |
| 2904 | + ret = platform_driver_register(&bcm63xx_enetsw_driver); | |
| 2905 | + if (ret) { | |
| 2906 | + platform_driver_unregister(&bcm63xx_enet_driver); | |
| 2907 | + platform_driver_unregister(&bcm63xx_enet_shared_driver); | |
| 2908 | + } | |
| 1914 | 2909 | |
| 1915 | 2910 | return ret; |
| 1916 | 2911 | } |
| @@ -1918,6 +2913,7 @@ static int __init bcm_enet_init(void) · 1 unmodified line | ||
| 1918 | 2913 | static void __exit bcm_enet_exit(void) |
| 1919 | 2914 | { |
| 1920 | 2915 | platform_driver_unregister(&bcm63xx_enet_driver); |
| 2916 | + platform_driver_unregister(&bcm63xx_enetsw_driver); | |
| 1921 | 2917 | platform_driver_unregister(&bcm63xx_enet_shared_driver); |
| 1922 | 2918 | } |
| 1923 | 2919 | |
| @@ -18,6 +18,7 @@ · 17 unmodified lines | ||
| 18 | 18 | |
| 19 | 19 | /* maximum burst len for dma (4 bytes unit) */ |
| 20 | 20 | #define BCMENET_DMA_MAXBURST 16 |
| 21 | +#define BCMENETSW_DMA_MAXBURST 8 | |
| 21 | 22 | |
| 22 | 23 | /* tx transmit threshold (4 bytes unit), fifo is 256 bytes, the value |
| 23 | 24 | * must be low enough so that a DMA transfer of above burst length can |
| @@ -84,11 +85,60 @@ · 60 unmodified lines | ||
| 84 | 85 | #define ETH_MIB_RX_CNTRL 54 |
| 85 | 86 | |
| 86 | 87 | |
| 88 | +/* | |
| 89 | + * SW MIB Counters register definitions | |
| 90 | +*/ | |
| 91 | +#define ETHSW_MIB_TX_ALL_OCT 0 | |
| 92 | +#define ETHSW_MIB_TX_DROP_PKTS 2 | |
| 93 | +#define ETHSW_MIB_TX_QOS_PKTS 3 | |
| 94 | +#define ETHSW_MIB_TX_BRDCAST 4 | |
| 95 | +#define ETHSW_MIB_TX_MULT 5 | |
| 96 | +#define ETHSW_MIB_TX_UNI 6 | |
| 97 | +#define ETHSW_MIB_TX_COL 7 | |
| 98 | +#define ETHSW_MIB_TX_1_COL 8 | |
| 99 | +#define ETHSW_MIB_TX_M_COL 9 | |
| 100 | +#define ETHSW_MIB_TX_DEF 10 | |
| 101 | +#define ETHSW_MIB_TX_LATE 11 | |
| 102 | +#define ETHSW_MIB_TX_EX_COL 12 | |
| 103 | +#define ETHSW_MIB_TX_PAUSE 14 | |
| 104 | +#define ETHSW_MIB_TX_QOS_OCT 15 | |
| 105 | + | |
| 106 | +#define ETHSW_MIB_RX_ALL_OCT 17 | |
| 107 | +#define ETHSW_MIB_RX_UND 19 | |
| 108 | +#define ETHSW_MIB_RX_PAUSE 20 | |
| 109 | +#define ETHSW_MIB_RX_64 21 | |
| 110 | +#define ETHSW_MIB_RX_65_127 22 | |
| 111 | +#define ETHSW_MIB_RX_128_255 23 | |
| 112 | +#define ETHSW_MIB_RX_256_511 24 | |
| 113 | +#define ETHSW_MIB_RX_512_1023 25 | |
| 114 | +#define ETHSW_MIB_RX_1024_1522 26 | |
| 115 | +#define ETHSW_MIB_RX_OVR 27 | |
| 116 | +#define ETHSW_MIB_RX_JAB 28 | |
| 117 | +#define ETHSW_MIB_RX_ALIGN 29 | |
| 118 | +#define ETHSW_MIB_RX_CRC 30 | |
| 119 | +#define ETHSW_MIB_RX_GD_OCT 31 | |
| 120 | +#define ETHSW_MIB_RX_DROP 33 | |
| 121 | +#define ETHSW_MIB_RX_UNI 34 | |
| 122 | +#define ETHSW_MIB_RX_MULT 35 | |
| 123 | +#define ETHSW_MIB_RX_BRDCAST 36 | |
| 124 | +#define ETHSW_MIB_RX_SA_CHANGE 37 | |
| 125 | +#define ETHSW_MIB_RX_FRAG 38 | |
| 126 | +#define ETHSW_MIB_RX_OVR_DISC 39 | |
| 127 | +#define ETHSW_MIB_RX_SYM 40 | |
| 128 | +#define ETHSW_MIB_RX_QOS_PKTS 41 | |
| 129 | +#define ETHSW_MIB_RX_QOS_OCT 42 | |
| 130 | +#define ETHSW_MIB_RX_1523_2047 44 | |
| 131 | +#define ETHSW_MIB_RX_2048_4095 45 | |
| 132 | +#define ETHSW_MIB_RX_4096_8191 46 | |
| 133 | +#define ETHSW_MIB_RX_8192_9728 47 | |
| 134 | + | |
| 135 | + | |
| 87 | 136 | struct bcm_enet_mib_counters { |
| 88 | 137 | u64 tx_gd_octets; |
| 89 | 138 | u32 tx_gd_pkts; |
| 90 | 139 | u32 tx_all_octets; |
| 91 | 140 | u32 tx_all_pkts; |
| 141 | + u32 tx_unicast; | |
| 92 | 142 | u32 tx_brdcast; |
| 93 | 143 | u32 tx_mult; |
| 94 | 144 | u32 tx_64; |
| @@ -97,7 +147,12 @@ struct bcm_enet_mib_counters { · 2 unmodified lines | ||
| 97 | 147 | u32 tx_256_511; |
| 98 | 148 | u32 tx_512_1023; |
| 99 | 149 | u32 tx_1024_max; |
| 150 | + u32 tx_1523_2047; | |
| 151 | + u32 tx_2048_4095; | |
| 152 | + u32 tx_4096_8191; | |
| 153 | + u32 tx_8192_9728; | |
| 100 | 154 | u32 tx_jab; |
| 155 | + u32 tx_drop; | |
| 101 | 156 | u32 tx_ovr; |
| 102 | 157 | u32 tx_frag; |
| 103 | 158 | u32 tx_underrun; |
| @@ -114,6 +169,7 @@ struct bcm_enet_mib_counters { · 10 unmodified lines | ||
| 114 | 169 | u32 rx_all_octets; |
| 115 | 170 | u32 rx_all_pkts; |
| 116 | 171 | u32 rx_brdcast; |
| 172 | + u32 rx_unicast; | |
| 117 | 173 | u32 rx_mult; |
| 118 | 174 | u32 rx_64; |
| 119 | 175 | u32 rx_65_127; |
| @@ -197,6 +253,9 @@ struct bcm_enet_priv { · 77 unmodified lines | ||
| 197 | 253 | /* number of dma desc in tx ring */ |
| 198 | 254 | int tx_ring_size; |
| 199 | 255 | |
| 256 | + /* maximum dma burst size */ | |
| 257 | + int dma_maxburst; | |
| 258 | + | |
| 200 | 259 | /* cpu view of rx dma ring */ |
| 201 | 260 | struct bcm_enet_desc *tx_desc_cpu; |
| 202 | 261 | |
| @@ -269,6 +328,33 @@ struct bcm_enet_priv { · 66 unmodified lines | ||
| 269 | 328 | |
| 270 | 329 | /* maximum hardware transmit/receive size */ |
| 271 | 330 | unsigned int hw_mtu; |
| 331 | + | |
| 332 | + bool enet_is_sw; | |
| 333 | + | |
| 334 | + /* port mapping for switch devices */ | |
| 335 | + int num_ports; | |
| 336 | + struct bcm63xx_enetsw_port used_ports[ENETSW_MAX_PORT]; | |
| 337 | + int sw_port_link[ENETSW_MAX_PORT]; | |
| 338 | + | |
| 339 | + /* used to poll switch port state */ | |
| 340 | + struct timer_list swphy_poll; | |
| 341 | + spinlock_t enetsw_mdio_lock; | |
| 342 | + | |
| 343 | + /* dma channel enable mask */ | |
| 344 | + u32 dma_chan_en_mask; | |
| 345 | + | |
| 346 | + /* dma channel interrupt mask */ | |
| 347 | + u32 dma_chan_int_mask; | |
| 348 | + | |
| 349 | + /* DMA engine has internal SRAM */ | |
| 350 | + bool dma_has_sram; | |
| 351 | + | |
| 352 | + /* dma channel width */ | |
| 353 | + unsigned int dma_chan_width; | |
| 354 | + | |
| 355 | + /* dma descriptor shift value */ | |
| 356 | + unsigned int dma_desc_shift; | |
| 272 | 357 | }; |
| 273 | 358 | |
| 359 | + | |
| 274 | 360 | #endif /* ! BCM63XX_ENET_H_ */ |
| @@ -8104,7 +8104,7 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev) · 8103 unmodified lines | ||
| 8104 | 8104 | |
| 8105 | 8105 | pci_set_master(pdev); |
| 8106 | 8106 | |
| 8107 | − bp->pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM); | |
| 8107 | + bp->pm_cap = pdev->pm_cap; | |
| 8108 | 8108 | if (bp->pm_cap == 0) { |
| 8109 | 8109 | dev_err(&pdev->dev, |
| 8110 | 8110 | "Cannot find power management capability, aborting\n"); |
| @@ -8764,18 +8764,4 @@ static struct pci_driver bnx2_pci_driver = { · 653 unmodified lines | ||
| 8764 | 8764 | .err_handler = &bnx2_err_handler, |
| 8765 | 8765 | }; |
| 8766 | 8766 | |
| 8767 | −static int __init bnx2_init(void) | |
| 8768 | −{ | |
| 8769 | − return pci_register_driver(&bnx2_pci_driver); | |
| 8770 | −} | |
| 8771 | − | |
| 8772 | −static void __exit bnx2_cleanup(void) | |
| 8773 | −{ | |
| 8774 | − pci_unregister_driver(&bnx2_pci_driver); | |
| 8775 | −} | |
| 8776 | − | |
| 8777 | −module_init(bnx2_init); | |
| 8778 | −module_exit(bnx2_cleanup); | |
| 8779 | − | |
| 8780 | − | |
| 8781 | − | |
| 8767 | +module_pci_driver(bnx2_pci_driver); | |
| @@ -34,12 +34,10 @@ · 33 unmodified lines | ||
| 34 | 34 | #define BCM_DCBNL |
| 35 | 35 | #endif |
| 36 | 36 | |
| 37 | − | |
| 38 | 37 | #include "bnx2x_hsi.h" |
| 39 | 38 | |
| 40 | 39 | #include "../cnic_if.h" |
| 41 | 40 | |
| 42 | − | |
| 43 | 41 | #define BNX2X_MIN_MSIX_VEC_CNT(bp) ((bp)->min_msix_vec_cnt) |
| 44 | 42 | |
| 45 | 43 | #include <linux/mdio.h> |
| @@ -114,7 +112,6 @@ do { \ · 68 unmodified lines | ||
| 114 | 112 | #define BNX2X_ERROR(fmt, ...) \ |
| 115 | 113 | pr_err("[%s:%d]" fmt, __func__, __LINE__, ##__VA_ARGS__) |
| 116 | 114 | |
| 117 | − | |
| 118 | 115 | /* before we have a dev->name use dev_info() */ |
| 119 | 116 | #define BNX2X_DEV_INFO(fmt, ...) \ |
| 120 | 117 | do { \ |
| @@ -147,7 +144,6 @@ do { \ · 26 unmodified lines | ||
| 147 | 144 | #define U64_HI(x) ((u32)(((u64)(x)) >> 32)) |
| 148 | 145 | #define HILO_U64(hi, lo) ((((u64)(hi)) << 32) + (lo)) |
| 149 | 146 | |
| 150 | − | |
| 151 | 147 | #define REG_ADDR(bp, offset) ((bp->regview) + (offset)) |
| 152 | 148 | |
| 153 | 149 | #define REG_RD(bp, offset) readl(REG_ADDR(bp, offset)) |
| @@ -366,7 +362,7 @@ union db_prod { · 212 unmodified lines | ||
| 366 | 362 | /* |
| 367 | 363 | * Number of required SGEs is the sum of two: |
| 368 | 364 | * 1. Number of possible opened aggregations (next packet for |
| 369 | − * these aggregations will probably consume SGE immidiatelly) | |
| 365 | + * these aggregations will probably consume SGE immediately) | |
| 370 | 366 | * 2. Rest of BRB blocks divided by 2 (block will consume new SGE only |
| 371 | 367 | * after placement on BD for new TPA aggregation) |
| 372 | 368 | * |
| @@ -387,7 +383,6 @@ union db_prod { · 14 unmodified lines | ||
| 387 | 383 | #define BIT_VEC64_ELEM_SHIFT 6 |
| 388 | 384 | #define BIT_VEC64_ELEM_MASK ((u64)BIT_VEC64_ELEM_SZ - 1) |
| 389 | 385 | |
| 390 | − | |
| 391 | 386 | #define __BIT_VEC64_SET_BIT(el, bit) \ |
| 392 | 387 | do { \ |
| 393 | 388 | el = ((el) | ((u64)0x1 << (bit))); \ |
| @@ -398,7 +393,6 @@ union db_prod { · 4 unmodified lines | ||
| 398 | 393 | el = ((el) & (~((u64)0x1 << (bit)))); \ |
| 399 | 394 | } while (0) |
| 400 | 395 | |
| 401 | − | |
| 402 | 396 | #define BIT_VEC64_SET_BIT(vec64, idx) \ |
| 403 | 397 | __BIT_VEC64_SET_BIT((vec64)[(idx) >> BIT_VEC64_ELEM_SHIFT], \ |
| 404 | 398 | (idx) & BIT_VEC64_ELEM_MASK) |
| @@ -419,8 +413,6 @@ union db_prod { · 14 unmodified lines | ||
| 419 | 413 | |
| 420 | 414 | /*******************************************************/ |
| 421 | 415 | |
| 422 | − | |
| 423 | − | |
| 424 | 416 | /* Number of u64 elements in SGE mask array */ |
| 425 | 417 | #define RX_SGE_MASK_LEN (NUM_RX_SGE / BIT_VEC64_ELEM_SZ) |
| 426 | 418 | #define RX_SGE_MASK_LEN_MASK (RX_SGE_MASK_LEN - 1) |
| @@ -493,11 +485,26 @@ struct bnx2x_fastpath { · 66 unmodified lines | ||
| 493 | 485 | struct bnx2x *bp; /* parent */ |
| 494 | 486 | |
| 495 | 487 | struct napi_struct napi; |
| 488 | + | |
| 489 | +#ifdef CONFIG_NET_LL_RX_POLL | |
| 490 | + unsigned int state; | |
| 491 | +#define BNX2X_FP_STATE_IDLE 0 | |
| 492 | +#define BNX2X_FP_STATE_NAPI (1 << 0) /* NAPI owns this FP */ | |
| 493 | +#define BNX2X_FP_STATE_POLL (1 << 1) /* poll owns this FP */ | |
| 494 | +#define BNX2X_FP_STATE_NAPI_YIELD (1 << 2) /* NAPI yielded this FP */ | |
| 495 | +#define BNX2X_FP_STATE_POLL_YIELD (1 << 3) /* poll yielded this FP */ | |
| 496 | +#define BNX2X_FP_YIELD (BNX2X_FP_STATE_NAPI_YIELD | BNX2X_FP_STATE_POLL_YIELD) | |
| 497 | +#define BNX2X_FP_LOCKED (BNX2X_FP_STATE_NAPI | BNX2X_FP_STATE_POLL) | |
| 498 | +#define BNX2X_FP_USER_PEND (BNX2X_FP_STATE_POLL | BNX2X_FP_STATE_POLL_YIELD) | |
| 499 | + /* protect state */ | |
| 500 | + spinlock_t lock; | |
| 501 | +#endif /* CONFIG_NET_LL_RX_POLL */ | |
| 502 | + | |
| 496 | 503 | union host_hc_status_block status_blk; |
| 497 | − /* chip independed shortcuts into sb structure */ | |
| 504 | + /* chip independent shortcuts into sb structure */ | |
| 498 | 505 | __le16 *sb_index_values; |
| 499 | 506 | __le16 *sb_running_index; |
| 500 | − /* chip independed shortcut into rx_prods_offset memory */ | |
| 507 | + /* chip independent shortcut into rx_prods_offset memory */ | |
| 501 | 508 | u32 ustorm_rx_prods_offset; |
| 502 | 509 | |
| 503 | 510 | u32 rx_buf_size; |
| @@ -565,6 +572,116 @@ struct bnx2x_fastpath { · 61 unmodified lines | ||
| 565 | 572 | #define bnx2x_fp_stats(bp, fp) (&((bp)->fp_stats[(fp)->index])) |
| 566 | 573 | #define bnx2x_fp_qstats(bp, fp) (&((bp)->fp_stats[(fp)->index].eth_q_stats)) |
| 567 | 574 | |
| 575 | +#ifdef CONFIG_NET_LL_RX_POLL | |
| 576 | +static inline void bnx2x_fp_init_lock(struct bnx2x_fastpath *fp) | |
| 577 | +{ | |
| 578 | + spin_lock_init(&fp->lock); | |
| 579 | + fp->state = BNX2X_FP_STATE_IDLE; | |
| 580 | +} | |
| 581 | + | |
| 582 | +/* called from the device poll routine to get ownership of a FP */ | |
| 583 | +static inline bool bnx2x_fp_lock_napi(struct bnx2x_fastpath *fp) | |
| 584 | +{ | |
| 585 | + bool rc = true; | |
| 586 | + | |
| 587 | + spin_lock(&fp->lock); | |
| 588 | + if (fp->state & BNX2X_FP_LOCKED) { | |
| 589 | + WARN_ON(fp->state & BNX2X_FP_STATE_NAPI); | |
| 590 | + fp->state |= BNX2X_FP_STATE_NAPI_YIELD; | |
| 591 | + rc = false; | |
| 592 | + } else { | |
| 593 | + /* we don't care if someone yielded */ | |
| 594 | + fp->state = BNX2X_FP_STATE_NAPI; | |
| 595 | + } | |
| 596 | + spin_unlock(&fp->lock); | |
| 597 | + return rc; | |
| 598 | +} | |
| 599 | + | |
| 600 | +/* returns true is someone tried to get the FP while napi had it */ | |
| 601 | +static inline bool bnx2x_fp_unlock_napi(struct bnx2x_fastpath *fp) | |
| 602 | +{ | |
| 603 | + bool rc = false; | |
| 604 | + | |
| 605 | + spin_lock(&fp->lock); | |
| 606 | + WARN_ON(fp->state & | |
| 607 | + (BNX2X_FP_STATE_POLL | BNX2X_FP_STATE_NAPI_YIELD)); | |
| 608 | + | |
| 609 | + if (fp->state & BNX2X_FP_STATE_POLL_YIELD) | |
| 610 | + rc = true; | |
| 611 | + fp->state = BNX2X_FP_STATE_IDLE; | |
| 612 | + spin_unlock(&fp->lock); | |
| 613 | + return rc; | |
| 614 | +} | |
| 615 | + | |
| 616 | +/* called from bnx2x_low_latency_poll() */ | |
| 617 | +static inline bool bnx2x_fp_lock_poll(struct bnx2x_fastpath *fp) | |
| 618 | +{ | |
| 619 | + bool rc = true; | |
| 620 | + | |
| 621 | + spin_lock_bh(&fp->lock); | |
| 622 | + if ((fp->state & BNX2X_FP_LOCKED)) { | |
| 623 | + fp->state |= BNX2X_FP_STATE_POLL_YIELD; | |
| 624 | + rc = false; | |
| 625 | + } else { | |
| 626 | + /* preserve yield marks */ | |
| 627 | + fp->state |= BNX2X_FP_STATE_POLL; | |
| 628 | + } | |
| 629 | + spin_unlock_bh(&fp->lock); | |
| 630 | + return rc; | |
| 631 | +} | |
| 632 | + | |
| 633 | +/* returns true if someone tried to get the FP while it was locked */ | |
| 634 | +static inline bool bnx2x_fp_unlock_poll(struct bnx2x_fastpath *fp) | |
| 635 | +{ | |
| 636 | + bool rc = false; | |
| 637 | + | |
| 638 | + spin_lock_bh(&fp->lock); | |
| 639 | + WARN_ON(fp->state & BNX2X_FP_STATE_NAPI); | |
| 640 | + | |
| 641 | + if (fp->state & BNX2X_FP_STATE_POLL_YIELD) | |
| 642 | + rc = true; | |
| 643 | + fp->state = BNX2X_FP_STATE_IDLE; | |
| 644 | + spin_unlock_bh(&fp->lock); | |
| 645 | + return rc; | |
| 646 | +} | |
| 647 | + | |
| 648 | +/* true if a socket is polling, even if it did not get the lock */ | |
| 649 | +static inline bool bnx2x_fp_ll_polling(struct bnx2x_fastpath *fp) | |
| 650 | +{ | |
| 651 | + WARN_ON(!(fp->state & BNX2X_FP_LOCKED)); | |
| 652 | + return fp->state & BNX2X_FP_USER_PEND; | |
| 653 | +} | |
| 654 | +#else | |
| 655 | +static inline void bnx2x_fp_init_lock(struct bnx2x_fastpath *fp) | |
| 656 | +{ | |
| 657 | +} | |
| 658 | + | |
| 659 | +static inline bool bnx2x_fp_lock_napi(struct bnx2x_fastpath *fp) | |
| 660 | +{ | |
| 661 | + return true; | |
| 662 | +} | |
| 663 | + | |
| 664 | +static inline bool bnx2x_fp_unlock_napi(struct bnx2x_fastpath *fp) | |
| 665 | +{ | |
| 666 | + return false; | |
| 667 | +} | |
| 668 | + | |
| 669 | +static inline bool bnx2x_fp_lock_poll(struct bnx2x_fastpath *fp) | |
| 670 | +{ | |
| 671 | + return false; | |
| 672 | +} | |
| 673 | + | |
| 674 | +static inline bool bnx2x_fp_unlock_poll(struct bnx2x_fastpath *fp) | |
| 675 | +{ | |
| 676 | + return false; | |
| 677 | +} | |
| 678 | + | |
| 679 | +static inline bool bnx2x_fp_ll_polling(struct bnx2x_fastpath *fp) | |
| 680 | +{ | |
| 681 | + return false; | |
| 682 | +} | |
| 683 | +#endif /* CONFIG_NET_LL_RX_POLL */ | |
| 684 | + | |
| 568 | 685 | /* Use 2500 as a mini-jumbo MTU for FCoE */ |
| 569 | 686 | #define BNX2X_FCOE_MINI_JUMBO_MTU 2500 |
| 570 | 687 | |
| @@ -580,12 +697,10 @@ struct bnx2x_fastpath { · 9 unmodified lines | ||
| 580 | 697 | txdata_ptr[FIRST_TX_COS_INDEX] \ |
| 581 | 698 | ->var) |
| 582 | 699 | |
| 583 | − | |
| 584 | 700 | #define IS_ETH_FP(fp) ((fp)->index < BNX2X_NUM_ETH_QUEUES((fp)->bp)) |
| 585 | 701 | #define IS_FCOE_FP(fp) ((fp)->index == FCOE_IDX((fp)->bp)) |
| 586 | 702 | #define IS_FCOE_IDX(idx) ((idx) == FCOE_IDX(bp)) |
| 587 | 703 | |
| 588 | − | |
| 589 | 704 | /* MC hsi */ |
| 590 | 705 | #define MAX_FETCH_BD 13 /* HW max BDs per packet */ |
| 591 | 706 | #define RX_COPY_THRESH 92 |
| @@ -613,7 +728,7 @@ struct bnx2x_fastpath { · 21 unmodified lines | ||
| 613 | 728 | * START_BD(splitted) - includes unpaged data segment for GSO |
| 614 | 729 | * PARSING_BD - for TSO and CSUM data |
| 615 | 730 | * PARSING_BD2 - for encapsulation data |
| 616 | − * Frag BDs - decribes pages for frags | |
| 731 | + * Frag BDs - describes pages for frags | |
| 617 | 732 | */ |
| 618 | 733 | #define BDS_PER_TX_PKT 4 |
| 619 | 734 | #define MAX_BDS_PER_TX_PKT (MAX_SKB_FRAGS + BDS_PER_TX_PKT) |
| @@ -693,12 +808,10 @@ struct bnx2x_fastpath { · 73 unmodified lines | ||
| 693 | 808 | FW_DROP_LEVEL(bp)) |
| 694 | 809 | #define RCQ_TH_HI(bp) (RCQ_TH_LO(bp) + DROPLESS_FC_HEADROOM) |
| 695 | 810 | |
| 696 | − | |
| 697 | 811 | /* This is needed for determining of last_max */ |
| 698 | 812 | #define SUB_S16(a, b) (s16)((s16)(a) - (s16)(b)) |
| 699 | 813 | #define SUB_S32(a, b) (s32)((s32)(a) - (s32)(b)) |
| 700 | 814 | |
| 701 | − | |
| 702 | 815 | #define BNX2X_SWCID_SHIFT 17 |
| 703 | 816 | #define BNX2X_SWCID_MASK ((0x1 << BNX2X_SWCID_SHIFT) - 1) |
| 704 | 817 | |
| @@ -723,7 +836,6 @@ struct bnx2x_fastpath { · 18 unmodified lines | ||
| 723 | 836 | DPM_TRIGER_TYPE); \ |
| 724 | 837 | } while (0) |
| 725 | 838 | |
| 726 | − | |
| 727 | 839 | /* TX CSUM helpers */ |
| 728 | 840 | #define SKB_CS_OFF(skb) (offsetof(struct tcphdr, check) - \ |
| 729 | 841 | skb->csum_offset) |
| @@ -766,7 +878,6 @@ struct bnx2x_fastpath { · 36 unmodified lines | ||
| 766 | 878 | #define BNX2X_RX_SUM_FIX(cqe) \ |
| 767 | 879 | BNX2X_PRS_FLAG_OVERETH_IPV4(cqe->fast_path_cqe.pars_flags.flags) |
| 768 | 880 | |
| 769 | − | |
| 770 | 881 | #define FP_USB_FUNC_OFF \ |
| 771 | 882 | offsetof(struct cstorm_status_block_u, func) |
| 772 | 883 | #define FP_CSB_FUNC_OFF \ |
| @@ -900,14 +1011,14 @@ struct bnx2x_common { · 127 unmodified lines | ||
| 900 | 1011 | #define CHIP_IS_E3A0(bp) (CHIP_IS_E3(bp) && \ |
| 901 | 1012 | (CHIP_REV(bp) == CHIP_REV_Ax)) |
| 902 | 1013 | /* This define is used in two main places: |
| 903 | − * 1. In the early stages of nic_load, to know if to configrue Parser / Searcher | |
| 1014 | + * 1. In the early stages of nic_load, to know if to configure Parser / Searcher | |
| 904 | 1015 | * to nic-only mode or to offload mode. Offload mode is configured if either the |
| 905 | 1016 | * chip is E1x (where MIC_MODE register is not applicable), or if cnic already |
| 906 | 1017 | * registered for this port (which means that the user wants storage services). |
| 907 | 1018 | * 2. During cnic-related load, to know if offload mode is already configured in |
| 908 | − * the HW or needs to be configrued. | |
| 1019 | + * the HW or needs to be configured. | |
| 909 | 1020 | * Since the transition from nic-mode to offload-mode in HW causes traffic |
| 910 | − * coruption, nic-mode is configured only in ports on which storage services | |
| 1021 | + * corruption, nic-mode is configured only in ports on which storage services | |
| 911 | 1022 | * where never requested. |
| 912 | 1023 | */ |
| 913 | 1024 | #define CONFIGURE_NIC_MODE(bp) (!CHIP_IS_E1x(bp) && !CNIC_ENABLED(bp)) |
| @@ -1008,14 +1119,14 @@ extern struct workqueue_struct *bnx2x_wq; · 94 unmodified lines | ||
| 1008 | 1119 | * If the maximum number of FP-SB available is X then: |
| 1009 | 1120 | * a. If CNIC is supported it consumes 1 FP-SB thus the max number of |
| 1010 | 1121 | * regular L2 queues is Y=X-1 |
| 1011 | − * b. in MF mode the actual number of L2 queues is Y= (X-1/MF_factor) | |
| 1122 | + * b. In MF mode the actual number of L2 queues is Y= (X-1/MF_factor) | |
| 1012 | 1123 | * c. If the FCoE L2 queue is supported the actual number of L2 queues |
| 1013 | 1124 | * is Y+1 |
| 1014 | 1125 | * d. The number of irqs (MSIX vectors) is either Y+1 (one extra for |
| 1015 | 1126 | * slow-path interrupts) or Y+2 if CNIC is supported (one additional |
| 1016 | 1127 | * FP interrupt context for the CNIC). |
| 1017 | 1128 | * e. The number of HW context (CID count) is always X or X+1 if FCoE |
| 1018 | − * L2 queue is supported. the cid for the FCoE L2 queue is always X. | |
| 1129 | + * L2 queue is supported. The cid for the FCoE L2 queue is always X. | |
| 1019 | 1130 | */ |
| 1020 | 1131 | |
| 1021 | 1132 | /* fast-path interrupt contexts E1x */ |
| @@ -1068,7 +1179,6 @@ struct bnx2x_slowpath { · 46 unmodified lines | ||
| 1068 | 1179 | struct eth_classify_rules_ramrod_data e2; |
| 1069 | 1180 | } mac_rdata; |
| 1070 | 1181 | |
| 1071 | − | |
| 1072 | 1182 | union { |
| 1073 | 1183 | struct tstorm_eth_mac_filter_config e1x; |
| 1074 | 1184 | struct eth_filter_rules_ramrod_data e2; |
| @@ -1119,7 +1229,6 @@ struct bnx2x_slowpath { · 44 unmodified lines | ||
| 1119 | 1229 | #define bnx2x_sp_mapping(bp, var) \ |
| 1120 | 1230 | (bp->slowpath_mapping + offsetof(struct bnx2x_slowpath, var)) |
| 1121 | 1231 | |
| 1122 | − | |
| 1123 | 1232 | /* attn group wiring */ |
| 1124 | 1233 | #define MAX_DYNAMIC_ATTN_GRPS 8 |
| 1125 | 1234 | |
| @@ -1221,11 +1330,11 @@ enum { · 95 unmodified lines | ||
| 1221 | 1330 | BNX2X_SP_RTNL_AFEX_F_UPDATE, |
| 1222 | 1331 | BNX2X_SP_RTNL_ENABLE_SRIOV, |
| 1223 | 1332 | BNX2X_SP_RTNL_VFPF_MCAST, |
| 1333 | + BNX2X_SP_RTNL_VFPF_CHANNEL_DOWN, | |
| 1224 | 1334 | BNX2X_SP_RTNL_VFPF_STORM_RX_MODE, |
| 1225 | 1335 | BNX2X_SP_RTNL_HYPERVISOR_VLAN, |
| 1226 | 1336 | }; |
| 1227 | 1337 | |
| 1228 | − | |
| 1229 | 1338 | struct bnx2x_prev_path_list { |
| 1230 | 1339 | struct list_head list; |
| 1231 | 1340 | u8 bus; |
| @@ -1392,6 +1501,7 @@ struct bnx2x { · 160 unmodified lines | ||
| 1392 | 1501 | #define USING_SINGLE_MSIX_FLAG (1 << 20) |
| 1393 | 1502 | #define BC_SUPPORTS_DCBX_MSG_NON_PMF (1 << 21) |
| 1394 | 1503 | #define IS_VF_FLAG (1 << 22) |
| 1504 | +#define INTERRUPTS_ENABLED_FLAG (1 << 23) | |
| 1395 | 1505 | |
| 1396 | 1506 | #define BP_NOMCP(bp) ((bp)->flags & NO_MCP_FLAG) |
| 1397 | 1507 | |
| @@ -1585,7 +1695,7 @@ struct bnx2x { · 187 unmodified lines | ||
| 1585 | 1695 | struct mutex cnic_mutex; |
| 1586 | 1696 | struct bnx2x_vlan_mac_obj iscsi_l2_mac_obj; |
| 1587 | 1697 | |
| 1588 | − /* Start index of the "special" (CNIC related) L2 cleints */ | |
| 1698 | + /* Start index of the "special" (CNIC related) L2 clients */ | |
| 1589 | 1699 | u8 cnic_base_cl_id; |
| 1590 | 1700 | |
| 1591 | 1701 | int dmae_ready; |
| @@ -1699,7 +1809,7 @@ struct bnx2x { · 107 unmodified lines | ||
| 1699 | 1809 | /* operation indication for the sp_rtnl task */ |
| 1700 | 1810 | unsigned long sp_rtnl_state; |
| 1701 | 1811 | |
| 1702 | − /* DCBX Negotation results */ | |
| 1812 | + /* DCBX Negotiation results */ | |
| 1703 | 1813 | struct dcbx_features dcbx_local_feat; |
| 1704 | 1814 | u32 dcbx_error; |
| 1705 | 1815 | |
| @@ -1755,7 +1865,6 @@ extern int num_queues; · 49 unmodified lines | ||
| 1755 | 1865 | #define FUNC_FLG_SPQ 0x0010 |
| 1756 | 1866 | #define FUNC_FLG_LEADING 0x0020 /* PF only */ |
| 1757 | 1867 | |
| 1758 | − | |
| 1759 | 1868 | struct bnx2x_func_init_params { |
| 1760 | 1869 | /* dma */ |
| 1761 | 1870 | dma_addr_t fw_stat_map; /* valid iff FUNC_FLG_STATS */ |
| @@ -1853,9 +1962,6 @@ struct bnx2x_func_init_params { · 91 unmodified lines | ||
| 1853 | 1962 | |
| 1854 | 1963 | #define skip_queue(bp, idx) (NO_FCOE(bp) && IS_FCOE_IDX(idx)) |
| 1855 | 1964 | |
| 1856 | − | |
| 1857 | − | |
| 1858 | − | |
| 1859 | 1965 | /** |
| 1860 | 1966 | * bnx2x_set_mac_one - configure a single MAC address |
| 1861 | 1967 | * |
| @@ -1921,7 +2027,6 @@ u32 bnx2x_dmae_opcode(struct bnx2x *bp, u8 src_type, u8 dst_type, · 59 unmodified lines | ||
| 1921 | 2027 | void bnx2x_prep_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae, |
| 1922 | 2028 | u8 src_type, u8 dst_type); |
| 1923 | 2029 | int bnx2x_issue_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae); |
| 1924 | −void bnx2x_dp_dmae(struct bnx2x *bp, struct dmae_command *dmae, int msglvl); | |
| 1925 | 2030 | |
| 1926 | 2031 | /* FLR related routines */ |
| 1927 | 2032 | u32 bnx2x_flr_clnup_poll_count(struct bnx2x *bp); |
| @@ -1937,6 +2042,8 @@ int bnx2x_sp_post(struct bnx2x *bp, int command, int cid, · 9 unmodified lines | ||
| 1937 | 2042 | void bnx2x_update_coalesce(struct bnx2x *bp); |
| 1938 | 2043 | int bnx2x_get_cur_phy_idx(struct bnx2x *bp); |
| 1939 | 2044 | |
| 2045 | +bool bnx2x_port_after_undi(struct bnx2x *bp); | |
| 2046 | + | |
| 1940 | 2047 | static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, |
| 1941 | 2048 | int wait) |
| 1942 | 2049 | { |
| @@ -1998,7 +2105,6 @@ void bnx2x_igu_clear_sb_gen(struct bnx2x *bp, u8 func, u8 idu_sb_id, · 55 unmodified lines | ||
| 1998 | 2105 | #define UNLOAD_CLOSE 1 |
| 1999 | 2106 | #define UNLOAD_RECOVERY 2 |
| 2000 | 2107 | |
| 2001 | − | |
| 2002 | 2108 | /* DMAE command defines */ |
| 2003 | 2109 | #define DMAE_TIMEOUT -1 |
| 2004 | 2110 | #define DMAE_PCI_ERROR -2 /* E2 and onward */ |
| @@ -2062,7 +2168,8 @@ void bnx2x_igu_clear_sb_gen(struct bnx2x *bp, u8 func, u8 idu_sb_id, · 57 unmodified lines | ||
| 2062 | 2168 | #define DMAE_LEN32_WR_MAX(bp) (CHIP_IS_E1(bp) ? 0x400 : 0x2000) |
| 2063 | 2169 | |
| 2064 | 2170 | #define DMAE_COMP_VAL 0x60d0d0ae /* E2 and on - upper bit |
| 2065 | − indicates eror */ | |
| 2171 | + * indicates error | |
| 2172 | + */ | |
| 2066 | 2173 | |
| 2067 | 2174 | #define MAX_DMAE_C_PER_PORT 8 |
| 2068 | 2175 | #define INIT_DMAE_C(bp) (BP_PORT(bp) * MAX_DMAE_C_PER_PORT + \ |
| @@ -2100,7 +2207,6 @@ void bnx2x_igu_clear_sb_gen(struct bnx2x *bp, u8 func, u8 idu_sb_id, · 31 unmodified lines | ||
| 2100 | 2207 | #define SP_DESC_CNT (BCM_PAGE_SIZE / sizeof(struct eth_spe)) |
| 2101 | 2208 | #define MAX_SP_DESC_CNT (SP_DESC_CNT - 1) |
| 2102 | 2209 | |
| 2103 | − | |
| 2104 | 2210 | #define BNX2X_BTR 4 |
| 2105 | 2211 | #define MAX_SPQ_PENDING 8 |
| 2106 | 2212 | |
| @@ -2137,6 +2243,8 @@ void bnx2x_igu_clear_sb_gen(struct bnx2x *bp, u8 func, u8 idu_sb_id, · 30 unmodified lines | ||
| 2137 | 2243 | #define ATTN_HARD_WIRED_MASK 0xff00 |
| 2138 | 2244 | #define ATTENTION_ID 4 |
| 2139 | 2245 | |
| 2246 | +#define IS_MF_STORAGE_ONLY(bp) (IS_MF_STORAGE_SD(bp) || \ | |
| 2247 | + IS_MF_FCOE_AFEX(bp)) | |
| 2140 | 2248 | |
| 2141 | 2249 | /* stuff added to make the code fit 80Col */ |
| 2142 | 2250 | |
| @@ -2338,4 +2446,9 @@ enum { · 195 unmodified lines | ||
| 2338 | 2446 | |
| 2339 | 2447 | #define NUM_MACS 8 |
| 2340 | 2448 | |
| 2449 | +enum bnx2x_pci_bus_speed { | |
| 2450 | + BNX2X_PCI_LINK_SPEED_2500 = 2500, | |
| 2451 | + BNX2X_PCI_LINK_SPEED_5000 = 5000, | |
| 2452 | + BNX2X_PCI_LINK_SPEED_8000 = 8000 | |
| 2453 | +}; | |
| 2341 | 2454 | #endif /* bnx2x.h */ |
| @@ -24,6 +24,7 @@ · 23 unmodified lines | ||
| 24 | 24 | #include <net/tcp.h> |
| 25 | 25 | #include <net/ipv6.h> |
| 26 | 26 | #include <net/ip6_checksum.h> |
| 27 | +#include <net/ll_poll.h> | |
| 27 | 28 | #include <linux/prefetch.h> |
| 28 | 29 | #include "bnx2x_cmn.h" |
| 29 | 30 | #include "bnx2x_init.h" |
| @@ -124,7 +125,7 @@ static void bnx2x_shrink_eth_fp(struct bnx2x *bp, int delta) · 94 unmodified lines | ||
| 124 | 125 | int i, cos, old_eth_num = BNX2X_NUM_ETH_QUEUES(bp); |
| 125 | 126 | |
| 126 | 127 | /* Queue pointer cannot be re-set on an fp-basis, as moving pointer |
| 127 | − * backward along the array could cause memory to be overriden | |
| 128 | + * backward along the array could cause memory to be overridden | |
| 128 | 129 | */ |
| 129 | 130 | for (cos = 1; cos < bp->max_cos; cos++) { |
| 130 | 131 | for (i = 0; i < old_eth_num - delta; i++) { |
| @@ -165,7 +166,6 @@ static u16 bnx2x_free_tx_pkt(struct bnx2x *bp, struct bnx2x_fp_txdata *txdata, · 34 unmodified lines | ||
| 165 | 166 | dma_unmap_single(&bp->pdev->dev, BD_UNMAP_ADDR(tx_start_bd), |
| 166 | 167 | BD_UNMAP_LEN(tx_start_bd), DMA_TO_DEVICE); |
| 167 | 168 | |
| 168 | − | |
| 169 | 169 | nbd = le16_to_cpu(tx_start_bd->nbd) - 1; |
| 170 | 170 | #ifdef BNX2X_STOP_ON_ERROR |
| 171 | 171 | if ((nbd - 1) > (MAX_SKB_FRAGS + 2)) { |
| @@ -259,7 +259,7 @@ int bnx2x_tx_int(struct bnx2x *bp, struct bnx2x_fp_txdata *txdata) · 87 unmodified lines | ||
| 259 | 259 | smp_mb(); |
| 260 | 260 | |
| 261 | 261 | if (unlikely(netif_tx_queue_stopped(txq))) { |
| 262 | − /* Taking tx_lock() is needed to prevent reenabling the queue | |
| 262 | + /* Taking tx_lock() is needed to prevent re-enabling the queue | |
| 263 | 263 | * while it's empty. This could have happen if rx_action() gets |
| 264 | 264 | * suspended in bnx2x_tx_int() after the condition before |
| 265 | 265 | * netif_tx_wake_queue(), while tx_action (bnx2x_start_xmit()): |
| @@ -572,7 +572,7 @@ static int bnx2x_fill_frag_skb(struct bnx2x *bp, struct bnx2x_fastpath *fp, · 306 unmodified lines | ||
| 572 | 572 | return err; |
| 573 | 573 | } |
| 574 | 574 | |
| 575 | − /* Unmap the page as we r going to pass it to the stack */ | |
| 575 | + /* Unmap the page as we're going to pass it to the stack */ | |
| 576 | 576 | dma_unmap_page(&bp->pdev->dev, |
| 577 | 577 | dma_unmap_addr(&old_rx_pg, mapping), |
| 578 | 578 | SGE_PAGES, DMA_FROM_DEVICE); |
| @@ -733,7 +733,6 @@ static void bnx2x_tpa_stop(struct bnx2x *bp, struct bnx2x_fastpath *fp, · 154 unmodified lines | ||
| 733 | 733 | dev_kfree_skb_any(skb); |
| 734 | 734 | } |
| 735 | 735 | |
| 736 | − | |
| 737 | 736 | /* put new data in bin */ |
| 738 | 737 | rx_buf->data = new_data; |
| 739 | 738 | |
| @@ -805,40 +804,32 @@ int bnx2x_rx_int(struct bnx2x_fastpath *fp, int budget) · 65 unmodified lines | ||
| 805 | 804 | { |
| 806 | 805 | struct bnx2x *bp = fp->bp; |
| 807 | 806 | u16 bd_cons, bd_prod, bd_prod_fw, comp_ring_cons; |
| 808 | − u16 hw_comp_cons, sw_comp_cons, sw_comp_prod; | |
| 807 | + u16 sw_comp_cons, sw_comp_prod; | |
| 809 | 808 | int rx_pkt = 0; |
| 809 | + union eth_rx_cqe *cqe; | |
| 810 | + struct eth_fast_path_rx_cqe *cqe_fp; | |
| 810 | 811 | |
| 811 | 812 | #ifdef BNX2X_STOP_ON_ERROR |
| 812 | 813 | if (unlikely(bp->panic)) |
| 813 | 814 | return 0; |
| 814 | 815 | #endif |
| 815 | 816 | |
| 816 | − /* CQ "next element" is of the size of the regular element, | |
| 817 | − that's why it's ok here */ | |
| 818 | − hw_comp_cons = le16_to_cpu(*fp->rx_cons_sb); | |
| 819 | − if ((hw_comp_cons & MAX_RCQ_DESC_CNT) == MAX_RCQ_DESC_CNT) | |
| 820 | − hw_comp_cons++; | |
| 821 | − | |
| 822 | 817 | bd_cons = fp->rx_bd_cons; |
| 823 | 818 | bd_prod = fp->rx_bd_prod; |
| 824 | 819 | bd_prod_fw = bd_prod; |
| 825 | 820 | sw_comp_cons = fp->rx_comp_cons; |
| 826 | 821 | sw_comp_prod = fp->rx_comp_prod; |
| 827 | 822 | |
| 828 | − /* Memory barrier necessary as speculative reads of the rx | |
| 829 | − * buffer can be ahead of the index in the status block | |
| 830 | − */ | |
| 831 | − rmb(); | |
| 823 | + comp_ring_cons = RCQ_BD(sw_comp_cons); | |
| 824 | + cqe = &fp->rx_comp_ring[comp_ring_cons]; | |
| 825 | + cqe_fp = &cqe->fast_path_cqe; | |
| 832 | 826 | |
| 833 | 827 | DP(NETIF_MSG_RX_STATUS, |
| 834 | − "queue[%d]: hw_comp_cons %u sw_comp_cons %u\n", | |
| 835 | − fp->index, hw_comp_cons, sw_comp_cons); | |
| 828 | + "queue[%d]: sw_comp_cons %u\n", fp->index, sw_comp_cons); | |
| 836 | 829 | |
| 837 | − while (sw_comp_cons != hw_comp_cons) { | |
| 830 | + while (BNX2X_IS_CQE_COMPLETED(cqe_fp)) { | |
| 838 | 831 | struct sw_rx_bd *rx_buf = NULL; |
| 839 | 832 | struct sk_buff *skb; |
| 840 | − union eth_rx_cqe *cqe; | |
| 841 | − struct eth_fast_path_rx_cqe *cqe_fp; | |
| 842 | 833 | u8 cqe_fp_flags; |
| 843 | 834 | enum eth_rx_cqe_type cqe_fp_type; |
| 844 | 835 | u16 len, pad, queue; |
| @@ -850,12 +841,9 @@ int bnx2x_rx_int(struct bnx2x_fastpath *fp, int budget) · 5 unmodified lines | ||
| 850 | 841 | return 0; |
| 851 | 842 | #endif |
| 852 | 843 | |
| 853 | − comp_ring_cons = RCQ_BD(sw_comp_cons); | |
| 854 | 844 | bd_prod = RX_BD(bd_prod); |
| 855 | 845 | bd_cons = RX_BD(bd_cons); |
| 856 | 846 | |
| 857 | − cqe = &fp->rx_comp_ring[comp_ring_cons]; | |
| 858 | − cqe_fp = &cqe->fast_path_cqe; | |
| 859 | 847 | cqe_fp_flags = cqe_fp->type_error_flags; |
| 860 | 848 | cqe_fp_type = cqe_fp_flags & ETH_FAST_PATH_RX_CQE_TYPE; |
| 861 | 849 | |
| @@ -899,7 +887,6 @@ int bnx2x_rx_int(struct bnx2x_fastpath *fp, int budget) · 37 unmodified lines | ||
| 899 | 887 | cqe_fp); |
| 900 | 888 | |
| 901 | 889 | goto next_rx; |
| 902 | − | |
| 903 | 890 | } |
| 904 | 891 | queue = cqe->end_agg_cqe.queue_index; |
| 905 | 892 | tpa_info = &fp->tpa_info[queue]; |
| @@ -1002,9 +989,13 @@ reuse_rx: · 96 unmodified lines | ||
| 1002 | 989 | PARSING_FLAGS_VLAN) |
| 1003 | 990 | __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), |
| 1004 | 991 | le16_to_cpu(cqe_fp->vlan_tag)); |
| 1005 | − napi_gro_receive(&fp->napi, skb); | |
| 1006 | 992 | |
| 993 | + skb_mark_ll(skb, &fp->napi); | |
| 1007 | 994 | |
| 995 | + if (bnx2x_fp_ll_polling(fp)) | |
| 996 | + netif_receive_skb(skb); | |
| 997 | + else | |
| 998 | + napi_gro_receive(&fp->napi, skb); | |
| 1008 | 999 | next_rx: |
| 1009 | 1000 | rx_buf->data = NULL; |
| 1010 | 1001 | |
| @@ -1016,8 +1007,15 @@ next_cqe: · 5 unmodified lines | ||
| 1016 | 1007 | sw_comp_prod = NEXT_RCQ_IDX(sw_comp_prod); |
| 1017 | 1008 | sw_comp_cons = NEXT_RCQ_IDX(sw_comp_cons); |
| 1018 | 1009 | |
| 1010 | + /* mark CQE as free */ | |
| 1011 | + BNX2X_SEED_CQE(cqe_fp); | |
| 1012 | + | |
| 1019 | 1013 | if (rx_pkt == budget) |
| 1020 | 1014 | break; |
| 1015 | + | |
| 1016 | + comp_ring_cons = RCQ_BD(sw_comp_cons); | |
| 1017 | + cqe = &fp->rx_comp_ring[comp_ring_cons]; | |
| 1018 | + cqe_fp = &cqe->fast_path_cqe; | |
| 1021 | 1019 | } /* while */ |
| 1022 | 1020 | |
| 1023 | 1021 | fp->rx_bd_cons = bd_cons; |
| @@ -1053,8 +1051,6 @@ static irqreturn_t bnx2x_msix_fp_int(int irq, void *fp_cookie) · 29 unmodified lines | ||
| 1053 | 1051 | #endif |
| 1054 | 1052 | |
| 1055 | 1053 | /* Handle Rx and Tx according to MSI-X vector */ |
| 1056 | − prefetch(fp->rx_cons_sb); | |
| 1057 | − | |
| 1058 | 1054 | for_each_cos_in_tx_queue(fp, cos) |
| 1059 | 1055 | prefetch(fp->txdata_ptr[cos]->tx_cons_sb); |
| 1060 | 1056 | |
| @@ -1118,7 +1114,7 @@ static void bnx2x_fill_report_data(struct bnx2x *bp, · 57 unmodified lines | ||
| 1118 | 1114 | |
| 1119 | 1115 | memset(data, 0, sizeof(*data)); |
| 1120 | 1116 | |
| 1121 | − /* Fill the report data: efective line speed */ | |
| 1117 | + /* Fill the report data: effective line speed */ | |
| 1122 | 1118 | data->line_speed = line_speed; |
| 1123 | 1119 | |
| 1124 | 1120 | /* Link is down */ |
| @@ -1161,7 +1157,7 @@ void bnx2x_link_report(struct bnx2x *bp) · 36 unmodified lines | ||
| 1161 | 1157 | * |
| 1162 | 1158 | * @bp: driver handle |
| 1163 | 1159 | * |
| 1164 | − * None atomic inmlementation. | |
| 1160 | + * None atomic implementation. | |
| 1165 | 1161 | * Should be called under the phy_lock. |
| 1166 | 1162 | */ |
| 1167 | 1163 | void __bnx2x_link_report(struct bnx2x *bp) |
| @@ -1304,7 +1300,7 @@ void bnx2x_init_rx_rings(struct bnx2x *bp) · 136 unmodified lines | ||
| 1304 | 1300 | "mtu %d rx_buf_size %d\n", bp->dev->mtu, fp->rx_buf_size); |
| 1305 | 1301 | |
| 1306 | 1302 | if (!fp->disable_tpa) { |
| 1307 | − /* Fill the per-aggregtion pool */ | |
| 1303 | + /* Fill the per-aggregation pool */ | |
| 1308 | 1304 | for (i = 0; i < MAX_AGG_QS(bp); i++) { |
| 1309 | 1305 | struct bnx2x_agg_info *tpa_info = |
| 1310 | 1306 | &fp->tpa_info[i]; |
| @@ -1726,7 +1722,7 @@ static int bnx2x_req_irq(struct bnx2x *bp) · 415 unmodified lines | ||
| 1726 | 1722 | return request_irq(irq, bnx2x_interrupt, flags, bp->dev->name, bp->dev); |
| 1727 | 1723 | } |
| 1728 | 1724 | |
| 1729 | −int bnx2x_setup_irqs(struct bnx2x *bp) | |
| 1725 | +static int bnx2x_setup_irqs(struct bnx2x *bp) | |
| 1730 | 1726 | { |
| 1731 | 1727 | int rc = 0; |
| 1732 | 1728 | if (bp->flags & USING_MSIX_FLAG && |
| @@ -1759,32 +1755,46 @@ static void bnx2x_napi_enable_cnic(struct bnx2x *bp) · 26 unmodified lines | ||
| 1759 | 1755 | { |
| 1760 | 1756 | int i; |
| 1761 | 1757 | |
| 1762 | − for_each_rx_queue_cnic(bp, i) | |
| 1758 | + for_each_rx_queue_cnic(bp, i) { | |
| 1759 | + bnx2x_fp_init_lock(&bp->fp[i]); | |
| 1763 | 1760 | napi_enable(&bnx2x_fp(bp, i, napi)); |
| 1761 | + } | |
| 1764 | 1762 | } |
| 1765 | 1763 | |
| 1766 | 1764 | static void bnx2x_napi_enable(struct bnx2x *bp) |
| 1767 | 1765 | { |
| 1768 | 1766 | int i; |
| 1769 | 1767 | |
| 1770 | − for_each_eth_queue(bp, i) | |
| 1768 | + for_each_eth_queue(bp, i) { | |
| 1769 | + bnx2x_fp_init_lock(&bp->fp[i]); | |
| 1771 | 1770 | napi_enable(&bnx2x_fp(bp, i, napi)); |
| 1771 | + } | |
| 1772 | 1772 | } |
| 1773 | 1773 | |
| 1774 | 1774 | static void bnx2x_napi_disable_cnic(struct bnx2x *bp) |
| 1775 | 1775 | { |
| 1776 | 1776 | int i; |
| 1777 | 1777 | |
| 1778 | − for_each_rx_queue_cnic(bp, i) | |
| 1778 | + local_bh_disable(); | |
| 1779 | + for_each_rx_queue_cnic(bp, i) { | |
| 1779 | 1780 | napi_disable(&bnx2x_fp(bp, i, napi)); |
| 1781 | + while (!bnx2x_fp_lock_napi(&bp->fp[i])) | |
| 1782 | + mdelay(1); | |
| 1783 | + } | |
| 1784 | + local_bh_enable(); | |
| 1780 | 1785 | } |
| 1781 | 1786 | |
| 1782 | 1787 | static void bnx2x_napi_disable(struct bnx2x *bp) |
| 1783 | 1788 | { |
| 1784 | 1789 | int i; |
| 1785 | 1790 | |
| 1786 | − for_each_eth_queue(bp, i) | |
| 1791 | + local_bh_disable(); | |
| 1792 | + for_each_eth_queue(bp, i) { | |
| 1787 | 1793 | napi_disable(&bnx2x_fp(bp, i, napi)); |
| 1794 | + while (!bnx2x_fp_lock_napi(&bp->fp[i])) | |
| 1795 | + mdelay(1); | |
| 1796 | + } | |
| 1797 | + local_bh_enable(); | |
| 1788 | 1798 | } |
| 1789 | 1799 | |
| 1790 | 1800 | void bnx2x_netif_start(struct bnx2x *bp) |
| @@ -1829,7 +1839,7 @@ u16 bnx2x_select_queue(struct net_device *dev, struct sk_buff *skb) · 38 unmodified lines | ||
| 1829 | 1839 | } |
| 1830 | 1840 | |
| 1831 | 1841 | /* select a non-FCoE queue */ |
| 1832 | − return __skb_tx_hash(dev, skb, BNX2X_NUM_ETH_QUEUES(bp)); | |
| 1842 | + return __netdev_pick_tx(dev, skb) % BNX2X_NUM_ETH_QUEUES(bp); | |
| 1833 | 1843 | } |
| 1834 | 1844 | |
| 1835 | 1845 | void bnx2x_set_num_queues(struct bnx2x *bp) |
| @@ -1862,7 +1872,7 @@ void bnx2x_set_num_queues(struct bnx2x *bp) · 26 unmodified lines | ||
| 1862 | 1872 | * |
| 1863 | 1873 | * If the actual number of Tx queues (for each CoS) is less than 16 then there |
| 1864 | 1874 | * will be the holes at the end of each group of 16 ETh L2 indices (0..15, |
| 1865 | − * 16..31,...) with indicies that are not coupled with any real Tx queue. | |
| 1875 | + * 16..31,...) with indices that are not coupled with any real Tx queue. | |
| 1866 | 1876 | * |
| 1867 | 1877 | * The proper configuration of skb->queue_mapping is handled by |
| 1868 | 1878 | * bnx2x_select_queue() and __skb_tx_hash(). |
| @@ -1924,7 +1934,7 @@ static void bnx2x_set_rx_buf_size(struct bnx2x *bp) · 55 unmodified lines | ||
| 1924 | 1934 | ETH_OVREHEAD + |
| 1925 | 1935 | mtu + |
| 1926 | 1936 | BNX2X_FW_RX_ALIGN_END; |
| 1927 | − /* Note : rx_buf_size doesnt take into account NET_SKB_PAD */ | |
| 1937 | + /* Note : rx_buf_size doesn't take into account NET_SKB_PAD */ | |
| 1928 | 1938 | if (fp->rx_buf_size + NET_SKB_PAD <= PAGE_SIZE) |
| 1929 | 1939 | fp->rx_frag_size = fp->rx_buf_size + NET_SKB_PAD; |
| 1930 | 1940 | else |
| @@ -1937,7 +1947,7 @@ static int bnx2x_init_rss_pf(struct bnx2x *bp) · 6 unmodified lines | ||
| 1937 | 1947 | int i; |
| 1938 | 1948 | u8 num_eth_queues = BNX2X_NUM_ETH_QUEUES(bp); |
| 1939 | 1949 | |
| 1940 | − /* Prepare the initial contents fo the indirection table if RSS is | |
| 1950 | + /* Prepare the initial contents for the indirection table if RSS is | |
| 1941 | 1951 | * enabled |
| 1942 | 1952 | */ |
| 1943 | 1953 | for (i = 0; i < sizeof(bp->rss_conf_obj.ind_table); i++) |
| @@ -2015,7 +2025,7 @@ static int bnx2x_init_hw(struct bnx2x *bp, u32 load_code) · 71 unmodified lines | ||
| 2015 | 2025 | |
| 2016 | 2026 | /* |
| 2017 | 2027 | * Cleans the object that have internal lists without sending |
| 2018 | − * ramrods. Should be run when interrutps are disabled. | |
| 2028 | + * ramrods. Should be run when interrupts are disabled. | |
| 2019 | 2029 | */ |
| 2020 | 2030 | void bnx2x_squeeze_objects(struct bnx2x *bp) |
| 2021 | 2031 | { |
| @@ -2166,10 +2176,10 @@ static int bnx2x_alloc_fw_stats_mem(struct bnx2x *bp) · 144 unmodified lines | ||
| 2166 | 2176 | bp->fw_stats_data_mapping = bp->fw_stats_mapping + |
| 2167 | 2177 | bp->fw_stats_req_sz; |
| 2168 | 2178 | |
| 2169 | − DP(BNX2X_MSG_SP, "statistics request base address set to %x %x", | |
| 2179 | + DP(BNX2X_MSG_SP, "statistics request base address set to %x %x\n", | |
| 2170 | 2180 | U64_HI(bp->fw_stats_req_mapping), |
| 2171 | 2181 | U64_LO(bp->fw_stats_req_mapping)); |
| 2172 | − DP(BNX2X_MSG_SP, "statistics data base address set to %x %x", | |
| 2182 | + DP(BNX2X_MSG_SP, "statistics data base address set to %x %x\n", | |
| 2173 | 2183 | U64_HI(bp->fw_stats_data_mapping), |
| 2174 | 2184 | U64_LO(bp->fw_stats_data_mapping)); |
| 2175 | 2185 | return 0; |
| @@ -2183,6 +2193,8 @@ alloc_mem_err: · 7 unmodified lines | ||
| 2183 | 2193 | /* send load request to mcp and analyze response */ |
| 2184 | 2194 | static int bnx2x_nic_load_request(struct bnx2x *bp, u32 *load_code) |
| 2185 | 2195 | { |
| 2196 | + u32 param; | |
| 2197 | + | |
| 2186 | 2198 | /* init fw_seq */ |
| 2187 | 2199 | bp->fw_seq = |
| 2188 | 2200 | (SHMEM_RD(bp, func_mb[BP_FW_MB_IDX(bp)].drv_mb_header) & |
| @@ -2195,9 +2207,13 @@ static int bnx2x_nic_load_request(struct bnx2x *bp, u32 *load_code) · 6 unmodified lines | ||
| 2195 | 2207 | DRV_PULSE_SEQ_MASK); |
| 2196 | 2208 | BNX2X_DEV_INFO("drv_pulse 0x%x\n", bp->fw_drv_pulse_wr_seq); |
| 2197 | 2209 | |
| 2210 | + param = DRV_MSG_CODE_LOAD_REQ_WITH_LFA; | |
| 2211 | + | |
| 2212 | + if (IS_MF_SD(bp) && bnx2x_port_after_undi(bp)) | |
| 2213 | + param |= DRV_MSG_CODE_LOAD_REQ_FORCE_LFA; | |
| 2214 | + | |
| 2198 | 2215 | /* load request */ |
| 2199 | − (*load_code) = bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_REQ, | |
| 2200 | − DRV_MSG_CODE_LOAD_REQ_WITH_LFA); | |
| 2216 | + (*load_code) = bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_REQ, param); | |
| 2201 | 2217 | |
| 2202 | 2218 | /* if mcp fails to respond we must abort */ |
| 2203 | 2219 | if (!(*load_code)) { |
| @@ -2238,7 +2254,7 @@ int bnx2x_nic_load_analyze_req(struct bnx2x *bp, u32 load_code) · 34 unmodified lines | ||
| 2238 | 2254 | |
| 2239 | 2255 | /* abort nic load if version mismatch */ |
| 2240 | 2256 | if (my_fw != loaded_fw) { |
| 2241 | − BNX2X_ERR("bnx2x with FW %x was already loaded which mismatches my %x FW. aborting\n", | |
| 2257 | + BNX2X_ERR("bnx2x with FW %x was already loaded which mismatches my %x FW. Aborting\n", | |
| 2242 | 2258 | loaded_fw, my_fw); |
| 2243 | 2259 | return -EBUSY; |
| 2244 | 2260 | } |
| @@ -2316,10 +2332,10 @@ static void bnx2x_nic_load_afex_dcc(struct bnx2x *bp, int load_code) · 71 unmodified lines | ||
| 2316 | 2332 | static void bnx2x_bz_fp(struct bnx2x *bp, int index) |
| 2317 | 2333 | { |
| 2318 | 2334 | struct bnx2x_fastpath *fp = &bp->fp[index]; |
| 2319 | − | |
| 2320 | 2335 | int cos; |
| 2321 | 2336 | struct napi_struct orig_napi = fp->napi; |
| 2322 | 2337 | struct bnx2x_agg_info *orig_tpa_info = fp->tpa_info; |
| 2338 | + | |
| 2323 | 2339 | /* bzero bnx2x_fastpath contents */ |
| 2324 | 2340 | if (fp->tpa_info) |
| 2325 | 2341 | memset(fp->tpa_info, 0, ETH_MAX_AGGREGATION_QUEUES_E1H_E2 * |
| @@ -2345,8 +2361,7 @@ static void bnx2x_bz_fp(struct bnx2x *bp, int index) · 19 unmodified lines | ||
| 2345 | 2361 | fp->txdata_ptr[cos] = &bp->bnx2x_txq[cos * |
| 2346 | 2362 | BNX2X_NUM_ETH_QUEUES(bp) + index]; |
| 2347 | 2363 | |
| 2348 | − /* | |
| 2349 | − * set the tpa flag for each queue. The tpa flag determines the queue | |
| 2364 | + /* set the tpa flag for each queue. The tpa flag determines the queue | |
| 2350 | 2365 | * minimal size so it must be set prior to queue memory allocation |
| 2351 | 2366 | */ |
| 2352 | 2367 | fp->disable_tpa = !(bp->flags & TPA_ENABLE_FLAG || |
| @@ -2429,7 +2444,6 @@ int bnx2x_load_cnic(struct bnx2x *bp) · 76 unmodified lines | ||
| 2429 | 2444 | if (bp->state == BNX2X_STATE_OPEN) |
| 2430 | 2445 | bnx2x_cnic_notify(bp, CNIC_CTL_START_CMD); |
| 2431 | 2446 | |
| 2432 | − | |
| 2433 | 2447 | DP(NETIF_MSG_IFUP, "Ending successfully CNIC-related load\n"); |
| 2434 | 2448 | |
| 2435 | 2449 | return 0; |
| @@ -2472,6 +2486,7 @@ int bnx2x_nic_load(struct bnx2x *bp, int load_mode) · 36 unmodified lines | ||
| 2472 | 2486 | |
| 2473 | 2487 | bp->state = BNX2X_STATE_OPENING_WAIT4_LOAD; |
| 2474 | 2488 | |
| 2489 | + /* zero the structure w/o any lock, before SP handler is initialized */ | |
| 2475 | 2490 | memset(&bp->last_reported_link, 0, sizeof(bp->last_reported_link)); |
| 2476 | 2491 | __set_bit(BNX2X_LINK_REPORT_LINK_DOWN, |
| 2477 | 2492 | &bp->last_reported_link.link_report_flags); |
| @@ -2536,8 +2551,8 @@ int bnx2x_nic_load(struct bnx2x *bp, int load_mode) · 58 unmodified lines | ||
| 2536 | 2551 | } |
| 2537 | 2552 | |
| 2538 | 2553 | /* configure multi cos mappings in kernel. |
| 2539 | − * this configuration may be overriden by a multi class queue discipline | |
| 2540 | − * or by a dcbx negotiation result. | |
| 2554 | + * this configuration may be overridden by a multi class queue | |
| 2555 | + * discipline or by a dcbx negotiation result. | |
| 2541 | 2556 | */ |
| 2542 | 2557 | bnx2x_setup_tc(bp->dev, bp->max_cos); |
| 2543 | 2558 | |
| @@ -2696,7 +2711,7 @@ int bnx2x_nic_load(struct bnx2x *bp, int load_mode) · 152 unmodified lines | ||
| 2696 | 2711 | /* Start the Tx */ |
| 2697 | 2712 | switch (load_mode) { |
| 2698 | 2713 | case LOAD_NORMAL: |
| 2699 | − /* Tx queue should be only reenabled */ | |
| 2714 | + /* Tx queue should be only re-enabled */ | |
| 2700 | 2715 | netif_tx_wake_all_queues(bp->dev); |
| 2701 | 2716 | break; |
| 2702 | 2717 | |
| @@ -2841,7 +2856,7 @@ int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode, bool keep_link) · 138 unmodified lines | ||
| 2841 | 2856 | } |
| 2842 | 2857 | |
| 2843 | 2858 | /* Nothing to do during unload if previous bnx2x_nic_load() |
| 2844 | − * have not completed succesfully - all resourses are released. | |
| 2859 | + * have not completed successfully - all resources are released. | |
| 2845 | 2860 | * |
| 2846 | 2861 | * we can get here only after unsuccessful ndo_* callback, during which |
| 2847 | 2862 | * dev->IFF_UP flag is still on. |
| @@ -2856,6 +2871,9 @@ int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode, bool keep_link) · 8 unmodified lines | ||
| 2856 | 2871 | bp->state = BNX2X_STATE_CLOSING_WAIT4_HALT; |
| 2857 | 2872 | smp_mb(); |
| 2858 | 2873 | |
| 2874 | + /* indicate to VFs that the PF is going down */ | |
| 2875 | + bnx2x_iov_channel_down(bp); | |
| 2876 | + | |
| 2859 | 2877 | if (CNIC_LOADED(bp)) |
| 2860 | 2878 | bnx2x_cnic_notify(bp, CNIC_CTL_STOP_CMD); |
| 2861 | 2879 | |
| @@ -2890,10 +2908,9 @@ int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode, bool keep_link) · 28 unmodified lines | ||
| 2890 | 2908 | /* Send the UNLOAD_REQUEST to the MCP */ |
| 2891 | 2909 | bnx2x_send_unload_req(bp, unload_mode); |
| 2892 | 2910 | |
| 2893 | − /* | |
| 2894 | − * Prevent transactions to host from the functions on the | |
| 2911 | + /* Prevent transactions to host from the functions on the | |
| 2895 | 2912 | * engine that doesn't reset global blocks in case of global |
| 2896 | − * attention once gloabl blocks are reset and gates are opened | |
| 2913 | + * attention once global blocks are reset and gates are opened | |
| 2897 | 2914 | * (the engine which leader will perform the recovery |
| 2898 | 2915 | * last). |
| 2899 | 2916 | */ |
| @@ -2914,7 +2931,7 @@ int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode, bool keep_link) · 14 unmodified lines | ||
| 2914 | 2931 | } |
| 2915 | 2932 | |
| 2916 | 2933 | /* |
| 2917 | − * At this stage no more interrupts will arrive so we may safly clean | |
| 2934 | + * At this stage no more interrupts will arrive so we may safely clean | |
| 2918 | 2935 | * the queueable objects here in case they failed to get cleaned so far. |
| 2919 | 2936 | */ |
| 2920 | 2937 | if (IS_PF(bp)) |
| @@ -2955,7 +2972,6 @@ int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode, bool keep_link) · 34 unmodified lines | ||
| 2955 | 2972 | bnx2x_set_reset_global(bp); |
| 2956 | 2973 | } |
| 2957 | 2974 | |
| 2958 | − | |
| 2959 | 2975 | /* The last driver must disable a "close the gate" if there is no |
| 2960 | 2976 | * parity attention or "process kill" pending. |
| 2961 | 2977 | */ |
| @@ -3040,6 +3056,8 @@ int bnx2x_poll(struct napi_struct *napi, int budget) · 78 unmodified lines | ||
| 3040 | 3056 | return 0; |
| 3041 | 3057 | } |
| 3042 | 3058 | #endif |
| 3059 | + if (!bnx2x_fp_lock_napi(fp)) | |
| 3060 | + return work_done; | |
| 3043 | 3061 | |
| 3044 | 3062 | for_each_cos_in_tx_queue(fp, cos) |
| 3045 | 3063 | if (bnx2x_tx_queue_has_work(fp->txdata_ptr[cos])) |
| @@ -3049,12 +3067,15 @@ int bnx2x_poll(struct napi_struct *napi, int budget) · 3 unmodified lines | ||
| 3049 | 3067 | work_done += bnx2x_rx_int(fp, budget - work_done); |
| 3050 | 3068 | |
| 3051 | 3069 | /* must not complete if we consumed full budget */ |
| 3052 | − if (work_done >= budget) | |
| 3070 | + if (work_done >= budget) { | |
| 3071 | + bnx2x_fp_unlock_napi(fp); | |
| 3053 | 3072 | break; |
| 3073 | + } | |
| 3054 | 3074 | } |
| 3055 | 3075 | |
| 3056 | 3076 | /* Fall out from the NAPI loop if needed */ |
| 3057 | − if (!(bnx2x_has_rx_work(fp) || bnx2x_has_tx_work(fp))) { | |
| 3077 | + if (!bnx2x_fp_unlock_napi(fp) && | |
| 3078 | + !(bnx2x_has_rx_work(fp) || bnx2x_has_tx_work(fp))) { | |
| 3058 | 3079 | |
| 3059 | 3080 | /* No need to update SB for FCoE L2 ring as long as |
| 3060 | 3081 | * it's connected to the default SB and the SB |
| @@ -3096,6 +3117,32 @@ int bnx2x_poll(struct napi_struct *napi, int budget) · 35 unmodified lines | ||
| 3096 | 3117 | return work_done; |
| 3097 | 3118 | } |
| 3098 | 3119 | |
| 3120 | +#ifdef CONFIG_NET_LL_RX_POLL | |
| 3121 | +/* must be called with local_bh_disable()d */ | |
| 3122 | +int bnx2x_low_latency_recv(struct napi_struct *napi) | |
| 3123 | +{ | |
| 3124 | + struct bnx2x_fastpath *fp = container_of(napi, struct bnx2x_fastpath, | |
| 3125 | + napi); | |
| 3126 | + struct bnx2x *bp = fp->bp; | |
| 3127 | + int found = 0; | |
| 3128 | + | |
| 3129 | + if ((bp->state == BNX2X_STATE_CLOSED) || | |
| 3130 | + (bp->state == BNX2X_STATE_ERROR) || | |
| 3131 | + (bp->flags & (TPA_ENABLE_FLAG | GRO_ENABLE_FLAG))) | |
| 3132 | + return LL_FLUSH_FAILED; | |
| 3133 | + | |
| 3134 | + if (!bnx2x_fp_lock_poll(fp)) | |
| 3135 | + return LL_FLUSH_BUSY; | |
| 3136 | + | |
| 3137 | + if (bnx2x_has_rx_work(fp)) | |
| 3138 | + found = bnx2x_rx_int(fp, 4); | |
| 3139 | + | |
| 3140 | + bnx2x_fp_unlock_poll(fp); | |
| 3141 | + | |
| 3142 | + return found; | |
| 3143 | +} | |
| 3144 | +#endif | |
| 3145 | + | |
| 3099 | 3146 | /* we split the first BD into headers and data BDs |
| 3100 | 3147 | * to ease the pain of our fellow microcode engineers |
| 3101 | 3148 | * we use one mapping for both BDs |
| @@ -3496,9 +3543,12 @@ static void bnx2x_update_pbds_gso_enc(struct sk_buff *skb, · 394 unmodified lines | ||
| 3496 | 3543 | /* outer IP header info */ |
| 3497 | 3544 | if (xmit_type & XMIT_CSUM_V4) { |
| 3498 | 3545 | struct iphdr *iph = ip_hdr(skb); |
| 3546 | + u16 csum = (__force u16)(~iph->check) - | |
| 3547 | + (__force u16)iph->tot_len - | |
| 3548 | + (__force u16)iph->frag_off; | |
| 3549 | + | |
| 3499 | 3550 | pbd2->fw_ip_csum_wo_len_flags_frag = |
| 3500 | − bswab16(csum_fold((~iph->check) - | |
| 3501 | − iph->tot_len - iph->frag_off)); | |
| 3551 | + bswab16(csum_fold((__force __wsum)csum)); | |
| 3502 | 3552 | } else { |
| 3503 | 3553 | pbd2->fw_ip_hdr_to_payload_w = |
| 3504 | 3554 | hlen_w - ((sizeof(struct ipv6hdr)) >> 1); |
| @@ -3586,7 +3636,7 @@ netdev_tx_t bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev) · 81 unmodified lines | ||
| 3586 | 3636 | DP(NETIF_MSG_TX_QUEUED, "indices: txq %d, fp %d, txdata %d\n", |
| 3587 | 3637 | txq_index, fp_index, txdata_index); */ |
| 3588 | 3638 | |
| 3589 | − /* enable this debug print to view the tranmission details | |
| 3639 | + /* enable this debug print to view the transmission details | |
| 3590 | 3640 | DP(NETIF_MSG_TX_QUEUED, |
| 3591 | 3641 | "transmitting packet cid %d fp index %d txdata_index %d tx_data ptr %p fp pointer %p\n", |
| 3592 | 3642 | txdata->cid, fp_index, txdata_index, txdata, fp); */ |
| @@ -3968,7 +4018,7 @@ int bnx2x_setup_tc(struct net_device *dev, u8 num_tc) · 375 unmodified lines | ||
| 3968 | 4018 | /* setup tc must be called under rtnl lock */ |
| 3969 | 4019 | ASSERT_RTNL(); |
| 3970 | 4020 | |
| 3971 | − /* no traffic classes requested. aborting */ | |
| 4021 | + /* no traffic classes requested. Aborting */ | |
| 3972 | 4022 | if (!num_tc) { |
| 3973 | 4023 | netdev_reset_tc(dev); |
| 3974 | 4024 | return 0; |
| @@ -3976,7 +4026,7 @@ int bnx2x_setup_tc(struct net_device *dev, u8 num_tc) · 1 unmodified line | ||
| 3976 | 4026 | |
| 3977 | 4027 | /* requested to support too many traffic classes */ |
| 3978 | 4028 | if (num_tc > bp->max_cos) { |
| 3979 | − BNX2X_ERR("support for too many traffic classes requested: %d. max supported is %d\n", | |
| 4029 | + BNX2X_ERR("support for too many traffic classes requested: %d. Max supported is %d\n", | |
| 3980 | 4030 | num_tc, bp->max_cos); |
| 3981 | 4031 | return -EINVAL; |
| 3982 | 4032 | } |
| @@ -3995,8 +4045,7 @@ int bnx2x_setup_tc(struct net_device *dev, u8 num_tc) · 12 unmodified lines | ||
| 3995 | 4045 | prio, bp->prio_to_cos[prio]); |
| 3996 | 4046 | } |
| 3997 | 4047 | |
| 3998 | − | |
| 3999 | − /* Use this configuration to diffrentiate tc0 from other COSes | |
| 4048 | + /* Use this configuration to differentiate tc0 from other COSes | |
| 4000 | 4049 | This can be used for ets or pfc, and save the effort of setting |
| 4001 | 4050 | up a multio class queue disc or negotiating DCBX with a switch |
| 4002 | 4051 | netdev_set_prio_tc_map(dev, 0, 0); |
| @@ -4288,10 +4337,11 @@ static int bnx2x_alloc_fp_mem_at(struct bnx2x *bp, int index) · 285 unmodified lines | ||
| 4288 | 4337 | &bnx2x_fp(bp, index, rx_desc_mapping), |
| 4289 | 4338 | sizeof(struct eth_rx_bd) * NUM_RX_BD); |
| 4290 | 4339 | |
| 4291 | − BNX2X_PCI_ALLOC(bnx2x_fp(bp, index, rx_comp_ring), | |
| 4292 | − &bnx2x_fp(bp, index, rx_comp_mapping), | |
| 4293 | − sizeof(struct eth_fast_path_rx_cqe) * | |
| 4294 | − NUM_RCQ_BD); | |
| 4340 | + /* Seed all CQEs by 1s */ | |
| 4341 | + BNX2X_PCI_FALLOC(bnx2x_fp(bp, index, rx_comp_ring), | |
| 4342 | + &bnx2x_fp(bp, index, rx_comp_mapping), | |
| 4343 | + sizeof(struct eth_fast_path_rx_cqe) * | |
| 4344 | + NUM_RCQ_BD); | |
| 4295 | 4345 | |
| 4296 | 4346 | /* SGE ring */ |
| 4297 | 4347 | BNX2X_ALLOC(bnx2x_fp(bp, index, rx_page_ring), |
| @@ -4472,7 +4522,6 @@ int bnx2x_alloc_mem_bp(struct bnx2x *bp) · 174 unmodified lines | ||
| 4472 | 4522 | alloc_err: |
| 4473 | 4523 | bnx2x_free_mem_bp(bp); |
| 4474 | 4524 | return -ENOMEM; |
| 4475 | − | |
| 4476 | 4525 | } |
| 4477 | 4526 | |
| 4478 | 4527 | int bnx2x_reload_if_running(struct net_device *dev) |
| @@ -4514,7 +4563,6 @@ int bnx2x_get_cur_phy_idx(struct bnx2x *bp) · 35 unmodified lines | ||
| 4514 | 4563 | } |
| 4515 | 4564 | |
| 4516 | 4565 | return sel_phy_idx; |
| 4517 | − | |
| 4518 | 4566 | } |
| 4519 | 4567 | int bnx2x_get_link_cfg_idx(struct bnx2x *bp) |
| 4520 | 4568 | { |
| @@ -4602,6 +4650,7 @@ int bnx2x_set_features(struct net_device *dev, netdev_features_t features) · 81 unmodified lines | ||
| 4602 | 4650 | { |
| 4603 | 4651 | struct bnx2x *bp = netdev_priv(dev); |
| 4604 | 4652 | u32 flags = bp->flags; |
| 4653 | + u32 changes; | |
| 4605 | 4654 | bool bnx2x_reload = false; |
| 4606 | 4655 | |
| 4607 | 4656 | if (features & NETIF_F_LRO) |
| @@ -4626,10 +4675,16 @@ int bnx2x_set_features(struct net_device *dev, netdev_features_t features) · 18 unmodified lines | ||
| 4626 | 4675 | } |
| 4627 | 4676 | } |
| 4628 | 4677 | |
| 4629 | − if (flags ^ bp->flags) { | |
| 4630 | − bp->flags = flags; | |
| 4678 | + changes = flags ^ bp->flags; | |
| 4679 | + | |
| 4680 | + /* if GRO is changed while LRO is enabled, don't force a reload */ | |
| 4681 | + if ((changes & GRO_ENABLE_FLAG) && (flags & TPA_ENABLE_FLAG)) | |
| 4682 | + changes &= ~GRO_ENABLE_FLAG; | |
| 4683 | + | |
| 4684 | + if (changes) | |
| 4631 | 4685 | bnx2x_reload = true; |
| 4632 | − } | |
| 4686 | + | |
| 4687 | + bp->flags = flags; | |
| 4633 | 4688 | |
| 4634 | 4689 | if (bnx2x_reload) { |
| 4635 | 4690 | if (bp->recovery_state == BNX2X_RECOVERY_DONE) |
| @@ -4724,7 +4779,6 @@ int bnx2x_resume(struct pci_dev *pdev) · 88 unmodified lines | ||
| 4724 | 4779 | return rc; |
| 4725 | 4780 | } |
| 4726 | 4781 | |
| 4727 | − | |
| 4728 | 4782 | void bnx2x_set_ctx_validation(struct bnx2x *bp, struct eth_context *cxt, |
| 4729 | 4783 | u32 cid) |
| 4730 | 4784 | { |
| @@ -4742,7 +4796,6 @@ static void storm_memset_hc_timeout(struct bnx2x *bp, u8 port, · 11 unmodified lines | ||
| 4742 | 4796 | u8 fw_sb_id, u8 sb_index, |
| 4743 | 4797 | u8 ticks) |
| 4744 | 4798 | { |
| 4745 | − | |
| 4746 | 4799 | u32 addr = BAR_CSTRORM_INTMEM + |
| 4747 | 4800 | CSTORM_STATUS_BLOCK_DATA_TIMEOUT_OFFSET(fw_sb_id, sb_index); |
| 4748 | 4801 | REG_WR8(bp, addr, ticks); |
| @@ -22,7 +22,6 @@ · 21 unmodified lines | ||
| 22 | 22 | #include <linux/netdevice.h> |
| 23 | 23 | #include <linux/etherdevice.h> |
| 24 | 24 | |
| 25 | − | |
| 26 | 25 | #include "bnx2x.h" |
| 27 | 26 | #include "bnx2x_sriov.h" |
| 28 | 27 | |
| @@ -50,13 +49,25 @@ extern int int_mode; · 21 unmodified lines | ||
| 50 | 49 | } \ |
| 51 | 50 | } while (0) |
| 52 | 51 | |
| 53 | −#define BNX2X_PCI_ALLOC(x, y, size) \ | |
| 54 | −do { \ | |
| 55 | − x = dma_alloc_coherent(&bp->pdev->dev, size, y, \ | |
| 56 | − GFP_KERNEL | __GFP_ZERO); \ | |
| 57 | − if (x == NULL) \ | |
| 58 | − goto alloc_mem_err; \ | |
| 59 | −} while (0) | |
| 52 | +#define BNX2X_PCI_ALLOC(x, y, size) \ | |
| 53 | + do { \ | |
| 54 | + x = dma_alloc_coherent(&bp->pdev->dev, size, y, \ | |
| 55 | + GFP_KERNEL | __GFP_ZERO); \ | |
| 56 | + if (x == NULL) \ | |
| 57 | + goto alloc_mem_err; \ | |
| 58 | + DP(NETIF_MSG_HW, "BNX2X_PCI_ALLOC: Physical %Lx Virtual %p\n", \ | |
| 59 | + (unsigned long long)(*y), x); \ | |
| 60 | + } while (0) | |
| 61 | + | |
| 62 | +#define BNX2X_PCI_FALLOC(x, y, size) \ | |
| 63 | + do { \ | |
| 64 | + x = dma_alloc_coherent(&bp->pdev->dev, size, y, GFP_KERNEL); \ | |
| 65 | + if (x == NULL) \ | |
| 66 | + goto alloc_mem_err; \ | |
| 67 | + memset((void *)x, 0xFFFFFFFF, size); \ | |
| 68 | + DP(NETIF_MSG_HW, "BNX2X_PCI_FALLOC: Physical %Lx Virtual %p\n",\ | |
| 69 | + (unsigned long long)(*y), x); \ | |
| 70 | + } while (0) | |
| 60 | 71 | |
| 61 | 72 | #define BNX2X_ALLOC(x, size) \ |
| 62 | 73 | do { \ |
| @@ -494,9 +505,6 @@ void bnx2x_update_max_mf_config(struct bnx2x *bp, u32 value); · 431 unmodified lines | ||
| 494 | 505 | /* Error handling */ |
| 495 | 506 | void bnx2x_fw_dump_lvl(struct bnx2x *bp, const char *lvl); |
| 496 | 507 | |
| 497 | −/* validate currect fw is loaded */ | |
| 498 | −bool bnx2x_test_firmware_version(struct bnx2x *bp, bool is_err); | |
| 499 | − | |
| 500 | 508 | /* dev_close main block */ |
| 501 | 509 | int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode, bool keep_link); |
| 502 | 510 | |
| @@ -606,6 +614,13 @@ int bnx2x_enable_msi(struct bnx2x *bp); · 103 unmodified lines | ||
| 606 | 614 | */ |
| 607 | 615 | int bnx2x_poll(struct napi_struct *napi, int budget); |
| 608 | 616 | |
| 617 | +/** | |
| 618 | + * bnx2x_low_latency_recv - LL callback | |
| 619 | + * | |
| 620 | + * @napi: napi structure | |
| 621 | + */ | |
| 622 | +int bnx2x_low_latency_recv(struct napi_struct *napi); | |
| 623 | + | |
| 609 | 624 | /** |
| 610 | 625 | * bnx2x_alloc_mem_bp - allocate memories outsize main driver structure |
| 611 | 626 | * |
| @@ -800,16 +815,18 @@ static inline bool bnx2x_has_tx_work(struct bnx2x_fastpath *fp) · 188 unmodified lines | ||
| 800 | 815 | return false; |
| 801 | 816 | } |
| 802 | 817 | |
| 818 | +#define BNX2X_IS_CQE_COMPLETED(cqe_fp) (cqe_fp->marker == 0x0) | |
| 819 | +#define BNX2X_SEED_CQE(cqe_fp) (cqe_fp->marker = 0xFFFFFFFF) | |
| 803 | 820 | static inline int bnx2x_has_rx_work(struct bnx2x_fastpath *fp) |
| 804 | 821 | { |
| 805 | − u16 rx_cons_sb; | |
| 822 | + u16 cons; | |
| 823 | + union eth_rx_cqe *cqe; | |
| 824 | + struct eth_fast_path_rx_cqe *cqe_fp; | |
| 806 | 825 | |
| 807 | − /* Tell compiler that status block fields can change */ | |
| 808 | − barrier(); | |
| 809 | − rx_cons_sb = le16_to_cpu(*fp->rx_cons_sb); | |
| 810 | − if ((rx_cons_sb & MAX_RCQ_DESC_CNT) == MAX_RCQ_DESC_CNT) | |
| 811 | − rx_cons_sb++; | |
| 812 | − return (fp->rx_comp_cons != rx_cons_sb); | |
| 826 | + cons = RCQ_BD(fp->rx_comp_cons); | |
| 827 | + cqe = &fp->rx_comp_ring[cons]; | |
| 828 | + cqe_fp = &cqe->fast_path_cqe; | |
| 829 | + return BNX2X_IS_CQE_COMPLETED(cqe_fp); | |
| 813 | 830 | } |
| 814 | 831 | |
| 815 | 832 | /** |
| @@ -848,9 +865,11 @@ static inline void bnx2x_add_all_napi_cnic(struct bnx2x *bp) · 32 unmodified lines | ||
| 848 | 865 | int i; |
| 849 | 866 | |
| 850 | 867 | /* Add NAPI objects */ |
| 851 | − for_each_rx_queue_cnic(bp, i) | |
| 868 | + for_each_rx_queue_cnic(bp, i) { | |
| 852 | 869 | netif_napi_add(bp->dev, &bnx2x_fp(bp, i, napi), |
| 853 | 870 | bnx2x_poll, NAPI_POLL_WEIGHT); |
| 871 | + napi_hash_add(&bnx2x_fp(bp, i, napi)); | |
| 872 | + } | |
| 854 | 873 | } |
| 855 | 874 | |
| 856 | 875 | static inline void bnx2x_add_all_napi(struct bnx2x *bp) |
| @@ -858,25 +877,31 @@ static inline void bnx2x_add_all_napi(struct bnx2x *bp) · 1 unmodified line | ||
| 858 | 877 | int i; |
| 859 | 878 | |
| 860 | 879 | /* Add NAPI objects */ |
| 861 | − for_each_eth_queue(bp, i) | |
| 880 | + for_each_eth_queue(bp, i) { | |
| 862 | 881 | netif_napi_add(bp->dev, &bnx2x_fp(bp, i, napi), |
| 863 | 882 | bnx2x_poll, NAPI_POLL_WEIGHT); |
| 883 | + napi_hash_add(&bnx2x_fp(bp, i, napi)); | |
| 884 | + } | |
| 864 | 885 | } |
| 865 | 886 | |
| 866 | 887 | static inline void bnx2x_del_all_napi_cnic(struct bnx2x *bp) |
| 867 | 888 | { |
| 868 | 889 | int i; |
| 869 | 890 | |
| 870 | − for_each_rx_queue_cnic(bp, i) | |
| 891 | + for_each_rx_queue_cnic(bp, i) { | |
| 892 | + napi_hash_del(&bnx2x_fp(bp, i, napi)); | |
| 871 | 893 | netif_napi_del(&bnx2x_fp(bp, i, napi)); |
| 894 | + } | |
| 872 | 895 | } |
| 873 | 896 | |
| 874 | 897 | static inline void bnx2x_del_all_napi(struct bnx2x *bp) |
| 875 | 898 | { |
| 876 | 899 | int i; |
| 877 | 900 | |
| 878 | − for_each_eth_queue(bp, i) | |
| 901 | + for_each_eth_queue(bp, i) { | |
| 902 | + napi_hash_del(&bnx2x_fp(bp, i, napi)); | |
| 879 | 903 | netif_napi_del(&bnx2x_fp(bp, i, napi)); |
| 904 | + } | |
| 880 | 905 | } |
| 881 | 906 | |
| 882 | 907 | int bnx2x_set_int_mode(struct bnx2x *bp); |
| @@ -1171,7 +1196,6 @@ static inline u8 bnx2x_cnic_eth_cl_id(struct bnx2x *bp, u8 cl_idx) · 288 unmodified lines | ||
| 1171 | 1196 | |
| 1172 | 1197 | static inline u8 bnx2x_cnic_fw_sb_id(struct bnx2x *bp) |
| 1173 | 1198 | { |
| 1174 | − | |
| 1175 | 1199 | /* the 'first' id is allocated for the cnic */ |
| 1176 | 1200 | return bp->base_fw_ndsb; |
| 1177 | 1201 | } |
| @@ -1181,7 +1205,6 @@ static inline u8 bnx2x_cnic_igu_sb_id(struct bnx2x *bp) · 3 unmodified lines | ||
| 1181 | 1205 | return bp->igu_base_sb; |
| 1182 | 1206 | } |
| 1183 | 1207 | |
| 1184 | − | |
| 1185 | 1208 | static inline void bnx2x_init_fcoe_fp(struct bnx2x *bp) |
| 1186 | 1209 | { |
| 1187 | 1210 | struct bnx2x_fastpath *fp = bnx2x_fcoe_fp(bp); |
| @@ -1334,8 +1357,8 @@ static inline bool bnx2x_mtu_allows_gro(int mtu) · 146 unmodified lines | ||
| 1334 | 1357 | int fpp = SGE_PAGE_SIZE / (mtu - ETH_MAX_TPA_HEADER_SIZE); |
| 1335 | 1358 | |
| 1336 | 1359 | /* |
| 1337 | − * 1. number of frags should not grow above MAX_SKB_FRAGS | |
| 1338 | − * 2. frag must fit the page | |
| 1360 | + * 1. Number of frags should not grow above MAX_SKB_FRAGS | |
| 1361 | + * 2. Frag must fit the page | |
| 1339 | 1362 | */ |
| 1340 | 1363 | return mtu <= SGE_PAGE_SIZE && (U_ETH_SGL_SIZE * fpp) <= MAX_SKB_FRAGS; |
| 1341 | 1364 | } |
| @@ -253,7 +253,6 @@ static void bnx2x_dcbx_get_ets_feature(struct bnx2x *bp, · 252 unmodified lines | ||
| 253 | 253 | |
| 254 | 254 | memset(&pg_help_data, 0, sizeof(struct pg_help_data)); |
| 255 | 255 | |
| 256 | − | |
| 257 | 256 | if (GET_FLAGS(error, DCBX_LOCAL_ETS_ERROR)) |
| 258 | 257 | DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_ERROR\n"); |
| 259 | 258 | |
| @@ -298,7 +297,6 @@ static void bnx2x_dcbx_get_ets_feature(struct bnx2x *bp, · 38 unmodified lines | ||
| 298 | 297 | static void bnx2x_dcbx_get_pfc_feature(struct bnx2x *bp, |
| 299 | 298 | struct dcbx_pfc_feature *pfc, u32 error) |
| 300 | 299 | { |
| 301 | − | |
| 302 | 300 | if (GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR)) |
| 303 | 301 | DP(BNX2X_MSG_DCB, "DCBX_LOCAL_PFC_ERROR\n"); |
| 304 | 302 | |
| @@ -367,7 +365,6 @@ static int bnx2x_dcbx_read_mib(struct bnx2x *bp, · 62 unmodified lines | ||
| 367 | 365 | struct lldp_remote_mib *remote_mib ; |
| 368 | 366 | struct lldp_local_mib *local_mib; |
| 369 | 367 | |
| 370 | − | |
| 371 | 368 | switch (read_mib_type) { |
| 372 | 369 | case DCBX_READ_LOCAL_MIB: |
| 373 | 370 | mib_size = sizeof(struct lldp_local_mib); |
| @@ -629,7 +626,6 @@ static int bnx2x_dcbx_read_shmem_neg_results(struct bnx2x *bp) · 255 unmodified lines | ||
| 629 | 626 | return 0; |
| 630 | 627 | } |
| 631 | 628 | |
| 632 | − | |
| 633 | 629 | #ifdef BCM_DCBNL |
| 634 | 630 | static inline |
| 635 | 631 | u8 bnx2x_dcbx_dcbnl_app_up(struct dcbx_app_priority_entry *ent) |
| @@ -691,7 +687,7 @@ static inline void bnx2x_dcbx_update_tc_mapping(struct bnx2x *bp) · 55 unmodified lines | ||
| 691 | 687 | } |
| 692 | 688 | |
| 693 | 689 | /* setup tc must be called under rtnl lock, but we can't take it here |
| 694 | − * as we are handling an attetntion on a work queue which must be | |
| 690 | + * as we are handling an attention on a work queue which must be | |
| 695 | 691 | * flushed at some rtnl-locked contexts (e.g. if down) |
| 696 | 692 | */ |
| 697 | 693 | if (!test_and_set_bit(BNX2X_SP_RTNL_SETUP_TC, &bp->sp_rtnl_state)) |
| @@ -711,7 +707,7 @@ void bnx2x_dcbx_set_params(struct bnx2x *bp, u32 state) · 13 unmodified lines | ||
| 711 | 707 | */ |
| 712 | 708 | bnx2x_dcbnl_update_applist(bp, true); |
| 713 | 709 | |
| 714 | − /* Read rmeote mib if dcbx is in the FW */ | |
| 710 | + /* Read remote mib if dcbx is in the FW */ | |
| 715 | 711 | if (bnx2x_dcbx_read_shmem_remote_mib(bp)) |
| 716 | 712 | return; |
| 717 | 713 | #endif |
| @@ -742,7 +738,7 @@ void bnx2x_dcbx_set_params(struct bnx2x *bp, u32 state) · 24 unmodified lines | ||
| 742 | 738 | bnx2x_dcbx_update_tc_mapping(bp); |
| 743 | 739 | |
| 744 | 740 | /* |
| 745 | − * allow other funtions to update their netdevices | |
| 741 | + * allow other functions to update their netdevices | |
| 746 | 742 | * accordingly |
| 747 | 743 | */ |
| 748 | 744 | if (IS_MF(bp)) |
| @@ -864,7 +860,7 @@ static void bnx2x_dcbx_admin_mib_updated_params(struct bnx2x *bp, · 115 unmodified lines | ||
| 864 | 860 | i, DCBX_PRI_PG_GET(af->ets.pri_pg_tbl, i)); |
| 865 | 861 | } |
| 866 | 862 | |
| 867 | − /*For IEEE admin_recommendation_bw_precentage | |
| 863 | + /*For IEEE admin_recommendation_bw_percentage | |
| 868 | 864 | *For IEEE admin_recommendation_ets_pg */ |
| 869 | 865 | af->pfc.pri_en_bitmap = (u8)dp->admin_pfc_bitmap; |
| 870 | 866 | for (i = 0; i < DCBX_CONFIG_MAX_APP_PROTOCOL; i++) { |
| @@ -896,13 +892,11 @@ static void bnx2x_dcbx_admin_mib_updated_params(struct bnx2x *bp, · 25 unmodified lines | ||
| 896 | 892 | } |
| 897 | 893 | |
| 898 | 894 | af->app.default_pri = (u8)dp->admin_default_priority; |
| 899 | − | |
| 900 | 895 | } |
| 901 | 896 | |
| 902 | 897 | /* Write the data. */ |
| 903 | 898 | bnx2x_write_data(bp, (u32 *)&admin_mib, offset, |
| 904 | 899 | sizeof(struct lldp_admin_mib)); |
| 905 | − | |
| 906 | 900 | } |
| 907 | 901 | |
| 908 | 902 | void bnx2x_dcbx_set_state(struct bnx2x *bp, bool dcb_on, u32 dcbx_enabled) |
| @@ -1076,7 +1070,7 @@ static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp, · 167 unmodified lines | ||
| 1076 | 1070 | bool pg_found = false; |
| 1077 | 1071 | u32 i, traf_type, add_traf_type, add_pg; |
| 1078 | 1072 | u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority; |
| 1079 | − struct pg_entry_help_data *data = help_data->data; /*shotcut*/ | |
| 1073 | + struct pg_entry_help_data *data = help_data->data; /*shortcut*/ | |
| 1080 | 1074 | |
| 1081 | 1075 | /* Set to invalid */ |
| 1082 | 1076 | for (i = 0; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) |
| @@ -1172,7 +1166,8 @@ static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp, · 89 unmodified lines | ||
| 1172 | 1166 | DCBX_PG_BW_GET(ets->pg_bw_tbl, pg_entry)); |
| 1173 | 1167 | else |
| 1174 | 1168 | /* If we join a group and one is strict |
| 1175 | − * than the bw rulls */ | |
| 1169 | + * than the bw rules | |
| 1170 | + */ | |
| 1176 | 1171 | cos_data->data[entry].strict = |
| 1177 | 1172 | BNX2X_DCBX_STRICT_COS_HIGHEST; |
| 1178 | 1173 | } |
| @@ -1181,7 +1176,6 @@ static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp, · 2 unmodified lines | ||
| 1181 | 1176 | BNX2X_ERR("dcbx error: Both groups must have priorities\n"); |
| 1182 | 1177 | } |
| 1183 | 1178 | |
| 1184 | − | |
| 1185 | 1179 | #ifndef POWER_OF_2 |
| 1186 | 1180 | #define POWER_OF_2(x) ((0 != x) && (0 == (x & (x-1)))) |
| 1187 | 1181 | #endif |
| @@ -1284,7 +1278,7 @@ static void bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params(struct bnx2x *bp, · 96 unmodified lines | ||
| 1284 | 1278 | } else { |
| 1285 | 1279 | /* If there are only pauseable priorities or |
| 1286 | 1280 | * only non-pauseable,* the lower priorities go |
| 1287 | − * to the first queue and the higherpriorities go | |
| 1281 | + * to the first queue and the higher priorities go | |
| 1288 | 1282 | * to the second queue. |
| 1289 | 1283 | */ |
| 1290 | 1284 | cos_data->data[0].pausable = |
| @@ -1484,7 +1478,7 @@ static void bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params( · 193 unmodified lines | ||
| 1484 | 1478 | * queue and one priority goes to the second queue. |
| 1485 | 1479 | * |
| 1486 | 1480 | * We will join this two cases: |
| 1487 | − * if one is BW limited it will go to the secoend queue | |
| 1481 | + * if one is BW limited it will go to the second queue | |
| 1488 | 1482 | * otherwise the last priority will get it |
| 1489 | 1483 | */ |
| 1490 | 1484 | |
| @@ -1504,7 +1498,8 @@ static void bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params( · 13 unmodified lines | ||
| 1504 | 1498 | false == b_found_strict) |
| 1505 | 1499 | /* last entry will be handled separately |
| 1506 | 1500 | * If no priority is strict than last |
| 1507 | − * enty goes to last queue.*/ | |
| 1501 | + * entry goes to last queue. | |
| 1502 | + */ | |
| 1508 | 1503 | entry = 1; |
| 1509 | 1504 | cos_data->data[entry].pri_join_mask |= |
| 1510 | 1505 | pri_tested; |
| @@ -1516,7 +1511,8 @@ static void bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params( · 5 unmodified lines | ||
| 1516 | 1511 | b_found_strict = true; |
| 1517 | 1512 | cos_data->data[1].pri_join_mask |= pri_tested; |
| 1518 | 1513 | /* If we join a group and one is strict |
| 1519 | − * than the bw rulls */ | |
| 1514 | + * than the bw rules | |
| 1515 | + */ | |
| 1520 | 1516 | cos_data->data[1].strict = |
| 1521 | 1517 | BNX2X_DCBX_STRICT_COS_HIGHEST; |
| 1522 | 1518 | } |
| @@ -1524,7 +1520,6 @@ static void bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params( · 1 unmodified line | ||
| 1524 | 1520 | } |
| 1525 | 1521 | } |
| 1526 | 1522 | |
| 1527 | − | |
| 1528 | 1523 | static void bnx2x_dcbx_2cos_limit_cee_fill_cos_params(struct bnx2x *bp, |
| 1529 | 1524 | struct pg_help_data *help_data, |
| 1530 | 1525 | struct dcbx_ets_feature *ets, |
| @@ -1533,7 +1528,6 @@ static void bnx2x_dcbx_2cos_limit_cee_fill_cos_params(struct bnx2x *bp, · 2 unmodified lines | ||
| 1533 | 1528 | u32 pri_join_mask, |
| 1534 | 1529 | u8 num_of_dif_pri) |
| 1535 | 1530 | { |
| 1536 | − | |
| 1537 | 1531 | /* default E2 settings */ |
| 1538 | 1532 | cos_data->num_of_cos = DCBX_COS_MAX_NUM_E2; |
| 1539 | 1533 | |
| @@ -1629,7 +1623,6 @@ static u8 bnx2x_dcbx_cee_fill_strict_pri(struct bnx2x *bp, · 89 unmodified lines | ||
| 1629 | 1623 | u8 num_spread_of_entries, |
| 1630 | 1624 | u8 strict_app_pris) |
| 1631 | 1625 | { |
| 1632 | − | |
| 1633 | 1626 | if (bnx2x_dcbx_spread_strict_pri(bp, cos_data, entry, |
| 1634 | 1627 | num_spread_of_entries, |
| 1635 | 1628 | strict_app_pris)) { |
| @@ -1848,7 +1841,7 @@ static void bnx2x_dcbx_fw_struct(struct bnx2x *bp, · 212 unmodified lines | ||
| 1848 | 1841 | |
| 1849 | 1842 | void bnx2x_dcbx_pmf_update(struct bnx2x *bp) |
| 1850 | 1843 | { |
| 1851 | − /* if we need to syncronize DCBX result from prev PMF | |
| 1844 | + /* if we need to synchronize DCBX result from prev PMF | |
| 1852 | 1845 | * read it from shmem and update bp and netdev accordingly |
| 1853 | 1846 | */ |
| 1854 | 1847 | if (SHMEM2_HAS(bp, drv_flags) && |
| @@ -1876,7 +1869,6 @@ void bnx2x_dcbx_pmf_update(struct bnx2x *bp) · 21 unmodified lines | ||
| 1876 | 1869 | * dcbx negotiation. |
| 1877 | 1870 | */ |
| 1878 | 1871 | bnx2x_dcbx_update_tc_mapping(bp); |
| 1879 | − | |
| 1880 | 1872 | } |
| 1881 | 1873 | } |
| 1882 | 1874 | |
| @@ -1943,14 +1935,14 @@ static void bnx2x_dcbnl_set_pg_tccfg_tx(struct net_device *netdev, int prio, · 60 unmodified lines | ||
| 1943 | 1935 | return; |
| 1944 | 1936 | |
| 1945 | 1937 | /** |
| 1946 | − * bw_pct ingnored - band-width percentage devision between user | |
| 1938 | + * bw_pct ignored - band-width percentage devision between user | |
| 1947 | 1939 | * priorities within the same group is not |
| 1948 | 1940 | * standard and hence not supported |
| 1949 | 1941 | * |
| 1950 | − * prio_type igonred - priority levels within the same group are not | |
| 1942 | + * prio_type ignored - priority levels within the same group are not | |
| 1951 | 1943 | * standard and hence are not supported. According |
| 1952 | 1944 | * to the standard pgid 15 is dedicated to strict |
| 1953 | − * prioirty traffic (on the port level). | |
| 1945 | + * priority traffic (on the port level). | |
| 1954 | 1946 | * |
| 1955 | 1947 | * up_map ignored |
| 1956 | 1948 | */ |
| @@ -1995,14 +1987,14 @@ static void bnx2x_dcbnl_get_pg_tccfg_tx(struct net_device *netdev, int prio, · 38 unmodified lines | ||
| 1995 | 1987 | DP(BNX2X_MSG_DCB, "prio = %d\n", prio); |
| 1996 | 1988 | |
| 1997 | 1989 | /** |
| 1998 | − * bw_pct ingnored - band-width percentage devision between user | |
| 1990 | + * bw_pct ignored - band-width percentage devision between user | |
| 1999 | 1991 | * priorities within the same group is not |
| 2000 | 1992 | * standard and hence not supported |
| 2001 | 1993 | * |
| 2002 | − * prio_type igonred - priority levels within the same group are not | |
| 1994 | + * prio_type ignored - priority levels within the same group are not | |
| 2003 | 1995 | * standard and hence are not supported. According |
| 2004 | 1996 | * to the standard pgid 15 is dedicated to strict |
| 2005 | − * prioirty traffic (on the port level). | |
| 1997 | + * priority traffic (on the port level). | |
| 2006 | 1998 | * |
| 2007 | 1999 | * up_map ignored |
| 2008 | 2000 | */ |
| @@ -2389,7 +2381,7 @@ static u8 bnx2x_dcbnl_get_featcfg(struct net_device *netdev, int featid, · 380 unmodified lines | ||
| 2389 | 2381 | *flags |= DCB_FEATCFG_ERROR; |
| 2390 | 2382 | break; |
| 2391 | 2383 | default: |
| 2392 | − BNX2X_ERR("Non valid featrue-ID\n"); | |
| 2384 | + BNX2X_ERR("Non valid feature-ID\n"); | |
| 2393 | 2385 | rval = 1; |
| 2394 | 2386 | break; |
| 2395 | 2387 | } |
| @@ -2430,7 +2422,7 @@ static u8 bnx2x_dcbnl_set_featcfg(struct net_device *netdev, int featid, · 34 unmodified lines | ||
| 2430 | 2422 | flags & DCB_FEATCFG_WILLING ? 1 : 0; |
| 2431 | 2423 | break; |
| 2432 | 2424 | default: |
| 2433 | − BNX2X_ERR("Non valid featrue-ID\n"); | |
| 2425 | + BNX2X_ERR("Non valid feature-ID\n"); | |
| 2434 | 2426 | rval = 1; |
| 2435 | 2427 | break; |
| 2436 | 2428 | } |
| @@ -134,8 +134,6 @@ enum { · 133 unmodified lines | ||
| 134 | 134 | #define PFC_BRB1_REG_HIGH_LLFC_LOW_THRESHOLD 130 |
| 135 | 135 | #define PFC_BRB1_REG_HIGH_LLFC_HIGH_THRESHOLD 170 |
| 136 | 136 | |
| 137 | − | |
| 138 | − | |
| 139 | 137 | struct cos_entry_help_data { |
| 140 | 138 | u32 pri_join_mask; |
| 141 | 139 | u32 cos_bw; |
| @@ -170,7 +168,6 @@ struct cos_help_data { · 28 unmodified lines | ||
| 170 | 168 | (!(IS_DCBX_PFC_PRI_ONLY_NON_PAUSE((bp), (pg_pri)) || \ |
| 171 | 169 | IS_DCBX_PFC_PRI_ONLY_PAUSE((bp), (pg_pri)))) |
| 172 | 170 | |
| 173 | − | |
| 174 | 171 | struct pg_entry_help_data { |
| 175 | 172 | u8 num_of_dif_pri; |
| 176 | 173 | u8 pg; |
| @@ -13,12 +13,6 @@ · 12 unmodified lines | ||
| 13 | 13 | * consent. |
| 14 | 14 | */ |
| 15 | 15 | |
| 16 | − | |
| 17 | −/* This struct holds a signature to ensure the dump returned from the driver | |
| 18 | − * match the meta data file inserted to grc_dump.tcl | |
| 19 | − * The signature is time stamp, diag version and grc_dump version | |
| 20 | − */ | |
| 21 | − | |
| 22 | 16 | #ifndef BNX2X_DUMP_H |
| 23 | 17 | #define BNX2X_DUMP_H |
| 24 | 18 | |
| @@ -28,7 +22,6 @@ · 3 unmodified lines | ||
| 28 | 22 | #define DRV_DUMP_USTORM_WAITP_ADDRESS 0x338a80 |
| 29 | 23 | #define DRV_DUMP_CSTORM_WAITP_ADDRESS 0x238a80 |
| 30 | 24 | |
| 31 | − | |
| 32 | 25 | /* Possible Chips */ |
| 33 | 26 | #define DUMP_CHIP_E1 1 |
| 34 | 27 | #define DUMP_CHIP_E1H 2 |
| @@ -320,7 +320,7 @@ static int bnx2x_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) · 319 unmodified lines | ||
| 320 | 320 | |
| 321 | 321 | speed = ethtool_cmd_speed(cmd); |
| 322 | 322 | |
| 323 | − /* If recieved a request for an unknown duplex, assume full*/ | |
| 323 | + /* If received a request for an unknown duplex, assume full*/ | |
| 324 | 324 | if (cmd->duplex == DUPLEX_UNKNOWN) |
| 325 | 325 | cmd->duplex = DUPLEX_FULL; |
| 326 | 326 | |
| @@ -733,7 +733,6 @@ static bool bnx2x_is_reg_in_chip(struct bnx2x *bp, · 406 unmodified lines | ||
| 733 | 733 | return false; |
| 734 | 734 | } |
| 735 | 735 | |
| 736 | − | |
| 737 | 736 | static bool bnx2x_is_wreg_in_chip(struct bnx2x *bp, |
| 738 | 737 | const struct wreg_addr *wreg_info) |
| 739 | 738 | { |
| @@ -850,7 +849,7 @@ static int __bnx2x_get_preset_regs(struct bnx2x *bp, u32 *p, u32 preset) · 110 unmodified lines | ||
| 850 | 849 | |
| 851 | 850 | /* Paged registers are supported in E2 & E3 only */ |
| 852 | 851 | if (CHIP_IS_E2(bp) || CHIP_IS_E3(bp)) { |
| 853 | − /* Read "paged" registes */ | |
| 852 | + /* Read "paged" registers */ | |
| 854 | 853 | bnx2x_read_pages_regs(bp, p, preset); |
| 855 | 854 | } |
| 856 | 855 | |
| @@ -960,6 +959,9 @@ static int bnx2x_set_dump(struct net_device *dev, struct ethtool_dump *val) · 103 unmodified lines | ||
| 960 | 959 | struct bnx2x *bp = netdev_priv(dev); |
| 961 | 960 | |
| 962 | 961 | /* Use the ethtool_dump "flag" field as the dump preset index */ |
| 962 | + if (val->flag < 1 || val->flag > DUMP_MAX_PRESETS) | |
| 963 | + return -EINVAL; | |
| 964 | + | |
| 963 | 965 | bp->dump_preset_idx = val->flag; |
| 964 | 966 | return 0; |
| 965 | 967 | } |
| @@ -969,12 +971,12 @@ static int bnx2x_get_dump_flag(struct net_device *dev, · 3 unmodified lines | ||
| 969 | 971 | { |
| 970 | 972 | struct bnx2x *bp = netdev_priv(dev); |
| 971 | 973 | |
| 974 | + dump->version = BNX2X_DUMP_VERSION; | |
| 975 | + dump->flag = bp->dump_preset_idx; | |
| 972 | 976 | /* Calculate the requested preset idx length */ |
| 973 | 977 | dump->len = bnx2x_get_preset_regs_len(dev, bp->dump_preset_idx); |
| 974 | 978 | DP(BNX2X_MSG_ETHTOOL, "Get dump preset %d length=%d\n", |
| 975 | 979 | bp->dump_preset_idx, dump->len); |
| 976 | − | |
| 977 | − dump->flag = ETHTOOL_GET_DUMP_DATA; | |
| 978 | 980 | return 0; |
| 979 | 981 | } |
| 980 | 982 | |
| @@ -986,8 +988,6 @@ static int bnx2x_get_dump_data(struct net_device *dev, · 5 unmodified lines | ||
| 986 | 988 | struct bnx2x *bp = netdev_priv(dev); |
| 987 | 989 | struct dump_header dump_hdr = {0}; |
| 988 | 990 | |
| 989 | − memset(p, 0, dump->len); | |
| 990 | − | |
| 991 | 991 | /* Disable parity attentions as long as following dump may |
| 992 | 992 | * cause false alarms by reading never written registers. We |
| 993 | 993 | * will re-enable parity attentions right after the dump. |
| @@ -1155,8 +1155,8 @@ static int bnx2x_get_eeprom_len(struct net_device *dev) · 161 unmodified lines | ||
| 1155 | 1155 | return bp->common.flash_size; |
| 1156 | 1156 | } |
| 1157 | 1157 | |
| 1158 | −/* Per pf misc lock must be aquired before the per port mcp lock. Otherwise, had | |
| 1159 | − * we done things the other way around, if two pfs from the same port would | |
| 1158 | +/* Per pf misc lock must be acquired before the per port mcp lock. Otherwise, | |
| 1159 | + * had we done things the other way around, if two pfs from the same port would | |
| 1160 | 1160 | * attempt to access nvram at the same time, we could run into a scenario such |
| 1161 | 1161 | * as: |
| 1162 | 1162 | * pf A takes the port lock. |
| @@ -1381,12 +1381,29 @@ static int bnx2x_nvram_read32(struct bnx2x *bp, u32 offset, u32 *buf, · 218 unmodified lines | ||
| 1381 | 1381 | return rc; |
| 1382 | 1382 | } |
| 1383 | 1383 | |
| 1384 | +static bool bnx2x_is_nvm_accessible(struct bnx2x *bp) | |
| 1385 | +{ | |
| 1386 | + int rc = 1; | |
| 1387 | + u16 pm = 0; | |
| 1388 | + struct net_device *dev = pci_get_drvdata(bp->pdev); | |
| 1389 | + | |
| 1390 | + if (bp->pm_cap) | |
| 1391 | + rc = pci_read_config_word(bp->pdev, | |
| 1392 | + bp->pm_cap + PCI_PM_CTRL, &pm); | |
| 1393 | + | |
| 1394 | + if ((rc && !netif_running(dev)) || | |
| 1395 | + (!rc && ((pm & PCI_PM_CTRL_STATE_MASK) != (__force u16)PCI_D0))) | |
| 1396 | + return false; | |
| 1397 | + | |
| 1398 | + return true; | |
| 1399 | +} | |
| 1400 | + | |
| 1384 | 1401 | static int bnx2x_get_eeprom(struct net_device *dev, |
| 1385 | 1402 | struct ethtool_eeprom *eeprom, u8 *eebuf) |
| 1386 | 1403 | { |
| 1387 | 1404 | struct bnx2x *bp = netdev_priv(dev); |
| 1388 | 1405 | |
| 1389 | − if (!netif_running(dev)) { | |
| 1406 | + if (!bnx2x_is_nvm_accessible(bp)) { | |
| 1390 | 1407 | DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM, |
| 1391 | 1408 | "cannot access eeprom when the interface is down\n"); |
| 1392 | 1409 | return -EAGAIN; |
| @@ -1411,7 +1428,7 @@ static int bnx2x_get_module_eeprom(struct net_device *dev, · 18 unmodified lines | ||
| 1411 | 1428 | u8 *user_data = data; |
| 1412 | 1429 | unsigned int start_addr = ee->offset, xfer_size = 0; |
| 1413 | 1430 | |
| 1414 | − if (!netif_running(dev)) { | |
| 1431 | + if (!bnx2x_is_nvm_accessible(bp)) { | |
| 1415 | 1432 | DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM, |
| 1416 | 1433 | "cannot access eeprom when the interface is down\n"); |
| 1417 | 1434 | return -EAGAIN; |
| @@ -1474,7 +1491,7 @@ static int bnx2x_get_module_info(struct net_device *dev, · 56 unmodified lines | ||
| 1474 | 1491 | int phy_idx, rc; |
| 1475 | 1492 | u8 sff8472_comp, diag_type; |
| 1476 | 1493 | |
| 1477 | − if (!netif_running(dev)) { | |
| 1494 | + if (!bnx2x_is_nvm_accessible(bp)) { | |
| 1478 | 1495 | DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM, |
| 1479 | 1496 | "cannot access eeprom when the interface is down\n"); |
| 1480 | 1497 | return -EAGAIN; |
| @@ -1594,8 +1611,10 @@ static int bnx2x_nvram_write1(struct bnx2x *bp, u32 offset, u8 *data_buf, · 113 unmodified lines | ||
| 1594 | 1611 | */ |
| 1595 | 1612 | val = be32_to_cpu(val_be); |
| 1596 | 1613 | |
| 1597 | − val &= ~le32_to_cpu(0xff << BYTE_OFFSET(offset)); | |
| 1598 | − val |= le32_to_cpu(*data_buf << BYTE_OFFSET(offset)); | |
| 1614 | + val &= ~le32_to_cpu((__force __le32) | |
| 1615 | + (0xff << BYTE_OFFSET(offset))); | |
| 1616 | + val |= le32_to_cpu((__force __le32) | |
| 1617 | + (*data_buf << BYTE_OFFSET(offset))); | |
| 1599 | 1618 | |
| 1600 | 1619 | rc = bnx2x_nvram_write_dword(bp, align_offset, val, |
| 1601 | 1620 | cmd_flags); |
| @@ -1676,7 +1695,8 @@ static int bnx2x_set_eeprom(struct net_device *dev, · 74 unmodified lines | ||
| 1676 | 1695 | int port = BP_PORT(bp); |
| 1677 | 1696 | int rc = 0; |
| 1678 | 1697 | u32 ext_phy_config; |
| 1679 | − if (!netif_running(dev)) { | |
| 1698 | + | |
| 1699 | + if (!bnx2x_is_nvm_accessible(bp)) { | |
| 1680 | 1700 | DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM, |
| 1681 | 1701 | "cannot access eeprom when the interface is down\n"); |
| 1682 | 1702 | return -EAGAIN; |
| @@ -1921,6 +1941,19 @@ static const char bnx2x_tests_str_arr[BNX2X_NUM_TESTS_SF][ETH_GSTRING_LEN] = { · 238 unmodified lines | ||
| 1921 | 1941 | "link_test (online) " |
| 1922 | 1942 | }; |
| 1923 | 1943 | |
| 1944 | +enum { | |
| 1945 | + BNX2X_PRI_FLAG_ISCSI, | |
| 1946 | + BNX2X_PRI_FLAG_FCOE, | |
| 1947 | + BNX2X_PRI_FLAG_STORAGE, | |
| 1948 | + BNX2X_PRI_FLAG_LEN, | |
| 1949 | +}; | |
| 1950 | + | |
| 1951 | +static const char bnx2x_private_arr[BNX2X_PRI_FLAG_LEN][ETH_GSTRING_LEN] = { | |
| 1952 | + "iSCSI offload support", | |
| 1953 | + "FCoE offload support", | |
| 1954 | + "Storage only interface" | |
| 1955 | +}; | |
| 1956 | + | |
| 1924 | 1957 | static u32 bnx2x_eee_to_adv(u32 eee_adv) |
| 1925 | 1958 | { |
| 1926 | 1959 | u32 modes = 0; |
| @@ -2041,7 +2074,7 @@ static int bnx2x_set_eee(struct net_device *dev, struct ethtool_eee *edata) · 114 unmodified lines | ||
| 2041 | 2074 | EEE_MODE_OVERRIDE_NVRAM | |
| 2042 | 2075 | EEE_MODE_OUTPUT_TIME; |
| 2043 | 2076 | |
| 2044 | − /* Restart link to propogate changes */ | |
| 2077 | + /* Restart link to propagate changes */ | |
| 2045 | 2078 | if (netif_running(dev)) { |
| 2046 | 2079 | bnx2x_stats_handle(bp, STATS_EVENT_STOP); |
| 2047 | 2080 | bnx2x_force_link_reset(bp); |
| @@ -2160,7 +2193,7 @@ static int bnx2x_test_registers(struct bnx2x *bp) · 112 unmodified lines | ||
| 2160 | 2193 | { BNX2X_CHIP_MASK_ALL, 0xffffffff, 0, 0x00000000 } |
| 2161 | 2194 | }; |
| 2162 | 2195 | |
| 2163 | − if (!netif_running(bp->dev)) { | |
| 2196 | + if (!bnx2x_is_nvm_accessible(bp)) { | |
| 2164 | 2197 | DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM, |
| 2165 | 2198 | "cannot access eeprom when the interface is down\n"); |
| 2166 | 2199 | return rc; |
| @@ -2264,7 +2297,7 @@ static int bnx2x_test_memory(struct bnx2x *bp) · 97 unmodified lines | ||
| 2264 | 2297 | { NULL, 0xffffffff, {0, 0, 0, 0} } |
| 2265 | 2298 | }; |
| 2266 | 2299 | |
| 2267 | − if (!netif_running(bp->dev)) { | |
| 2300 | + if (!bnx2x_is_nvm_accessible(bp)) { | |
| 2268 | 2301 | DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM, |
| 2269 | 2302 | "cannot access eeprom when the interface is down\n"); |
| 2270 | 2303 | return rc; |
| @@ -2978,32 +3011,47 @@ static int bnx2x_num_stat_queues(struct bnx2x *bp) · 707 unmodified lines | ||
| 2978 | 3011 | static int bnx2x_get_sset_count(struct net_device *dev, int stringset) |
| 2979 | 3012 | { |
| 2980 | 3013 | struct bnx2x *bp = netdev_priv(dev); |
| 2981 | − int i, num_stats; | |
| 3014 | + int i, num_strings = 0; | |
| 2982 | 3015 | |
| 2983 | 3016 | switch (stringset) { |
| 2984 | 3017 | case ETH_SS_STATS: |
| 2985 | 3018 | if (is_multi(bp)) { |
| 2986 | − num_stats = bnx2x_num_stat_queues(bp) * | |
| 2987 | − BNX2X_NUM_Q_STATS; | |
| 3019 | + num_strings = bnx2x_num_stat_queues(bp) * | |
| 3020 | + BNX2X_NUM_Q_STATS; | |
| 2988 | 3021 | } else |
| 2989 | − num_stats = 0; | |
| 3022 | + num_strings = 0; | |
| 2990 | 3023 | if (IS_MF_MODE_STAT(bp)) { |
| 2991 | 3024 | for (i = 0; i < BNX2X_NUM_STATS; i++) |
| 2992 | 3025 | if (IS_FUNC_STAT(i)) |
| 2993 | − num_stats++; | |
| 3026 | + num_strings++; | |
| 2994 | 3027 | } else |
| 2995 | − num_stats += BNX2X_NUM_STATS; | |
| 3028 | + num_strings += BNX2X_NUM_STATS; | |
| 2996 | 3029 | |
| 2997 | − return num_stats; | |
| 3030 | + return num_strings; | |
| 2998 | 3031 | |
| 2999 | 3032 | case ETH_SS_TEST: |
| 3000 | 3033 | return BNX2X_NUM_TESTS(bp); |
| 3001 | 3034 | |
| 3035 | + case ETH_SS_PRIV_FLAGS: | |
| 3036 | + return BNX2X_PRI_FLAG_LEN; | |
| 3037 | + | |
| 3002 | 3038 | default: |
| 3003 | 3039 | return -EINVAL; |
| 3004 | 3040 | } |
| 3005 | 3041 | } |
| 3006 | 3042 | |
| 3043 | +static u32 bnx2x_get_private_flags(struct net_device *dev) | |
| 3044 | +{ | |
| 3045 | + struct bnx2x *bp = netdev_priv(dev); | |
| 3046 | + u32 flags = 0; | |
| 3047 | + | |
| 3048 | + flags |= (!(bp->flags & NO_ISCSI_FLAG) ? 1 : 0) << BNX2X_PRI_FLAG_ISCSI; | |
| 3049 | + flags |= (!(bp->flags & NO_FCOE_FLAG) ? 1 : 0) << BNX2X_PRI_FLAG_FCOE; | |
| 3050 | + flags |= (!!IS_MF_STORAGE_ONLY(bp)) << BNX2X_PRI_FLAG_STORAGE; | |
| 3051 | + | |
| 3052 | + return flags; | |
| 3053 | +} | |
| 3054 | + | |
| 3007 | 3055 | static void bnx2x_get_strings(struct net_device *dev, u32 stringset, u8 *buf) |
| 3008 | 3056 | { |
| 3009 | 3057 | struct bnx2x *bp = netdev_priv(dev); |
| @@ -3026,7 +3074,6 @@ static void bnx2x_get_strings(struct net_device *dev, u32 stringset, u8 *buf) · 16 unmodified lines | ||
| 3026 | 3074 | } |
| 3027 | 3075 | } |
| 3028 | 3076 | |
| 3029 | − | |
| 3030 | 3077 | for (i = 0, j = 0; i < BNX2X_NUM_STATS; i++) { |
| 3031 | 3078 | if (IS_MF_MODE_STAT(bp) && IS_PORT_STAT(i)) |
| 3032 | 3079 | continue; |
| @@ -3045,6 +3092,12 @@ static void bnx2x_get_strings(struct net_device *dev, u32 stringset, u8 *buf) · 12 unmodified lines | ||
| 3045 | 3092 | start = 4; |
| 3046 | 3093 | memcpy(buf, bnx2x_tests_str_arr + start, |
| 3047 | 3094 | ETH_GSTRING_LEN * BNX2X_NUM_TESTS(bp)); |
| 3095 | + break; | |
| 3096 | + | |
| 3097 | + case ETH_SS_PRIV_FLAGS: | |
| 3098 | + memcpy(buf, bnx2x_private_arr, | |
| 3099 | + ETH_GSTRING_LEN * BNX2X_PRI_FLAG_LEN); | |
| 3100 | + break; | |
| 3048 | 3101 | } |
| 3049 | 3102 | } |
| 3050 | 3103 | |
| @@ -3106,17 +3159,12 @@ static int bnx2x_set_phys_id(struct net_device *dev, · 55 unmodified lines | ||
| 3106 | 3159 | { |
| 3107 | 3160 | struct bnx2x *bp = netdev_priv(dev); |
| 3108 | 3161 | |
| 3109 | − if (!netif_running(dev)) { | |
| 3162 | + if (!bnx2x_is_nvm_accessible(bp)) { | |
| 3110 | 3163 | DP(BNX2X_MSG_ETHTOOL | BNX2X_MSG_NVM, |
| 3111 | 3164 | "cannot access eeprom when the interface is down\n"); |
| 3112 | 3165 | return -EAGAIN; |
| 3113 | 3166 | } |
| 3114 | 3167 | |
| 3115 | − if (!bp->port.pmf) { | |
| 3116 | − DP(BNX2X_MSG_ETHTOOL, "Interface is not pmf\n"); | |
| 3117 | − return -EOPNOTSUPP; | |
| 3118 | − } | |
| 3119 | − | |
| 3120 | 3168 | switch (state) { |
| 3121 | 3169 | case ETHTOOL_ID_ACTIVE: |
| 3122 | 3170 | return 1; /* cycle on/off once per second */ |
| @@ -3148,7 +3196,6 @@ static int bnx2x_set_phys_id(struct net_device *dev, · 25 unmodified lines | ||
| 3148 | 3196 | |
| 3149 | 3197 | static int bnx2x_get_rss_flags(struct bnx2x *bp, struct ethtool_rxnfc *info) |
| 3150 | 3198 | { |
| 3151 | − | |
| 3152 | 3199 | switch (info->flow_type) { |
| 3153 | 3200 | case TCP_V4_FLOW: |
| 3154 | 3201 | case TCP_V6_FLOW: |
| @@ -3384,7 +3431,6 @@ static int bnx2x_set_channels(struct net_device *dev, · 229 unmodified lines | ||
| 3384 | 3431 | { |
| 3385 | 3432 | struct bnx2x *bp = netdev_priv(dev); |
| 3386 | 3433 | |
| 3387 | − | |
| 3388 | 3434 | DP(BNX2X_MSG_ETHTOOL, |
| 3389 | 3435 | "set-channels command parameters: rx = %d, tx = %d, other = %d, combined = %d\n", |
| 3390 | 3436 | channels->rx_count, channels->tx_count, channels->other_count, |
| @@ -3445,6 +3491,7 @@ static const struct ethtool_ops bnx2x_ethtool_ops = { · 54 unmodified lines | ||
| 3445 | 3491 | .set_pauseparam = bnx2x_set_pauseparam, |
| 3446 | 3492 | .self_test = bnx2x_self_test, |
| 3447 | 3493 | .get_sset_count = bnx2x_get_sset_count, |
| 3494 | + .get_priv_flags = bnx2x_get_private_flags, | |
| 3448 | 3495 | .get_strings = bnx2x_get_strings, |
| 3449 | 3496 | .set_phys_id = bnx2x_set_phys_id, |
| 3450 | 3497 | .get_ethtool_stats = bnx2x_get_ethtool_stats, |
| @@ -1323,6 +1323,8 @@ struct drv_func_mb { · 1322 unmodified lines | ||
| 1323 | 1323 | #define DRV_MSG_CODE_UNLOAD_SKIP_LINK_RESET 0x00000002 |
| 1324 | 1324 | |
| 1325 | 1325 | #define DRV_MSG_CODE_LOAD_REQ_WITH_LFA 0x0000100a |
| 1326 | + #define DRV_MSG_CODE_LOAD_REQ_FORCE_LFA 0x00002000 | |
| 1327 | + | |
| 1326 | 1328 | u32 fw_mb_header; |
| 1327 | 1329 | #define FW_MSG_CODE_MASK 0xffff0000 |
| 1328 | 1330 | #define FW_MSG_CODE_DRV_LOAD_COMMON 0x10100000 |
| @@ -3816,7 +3818,8 @@ struct eth_fast_path_rx_cqe { · 2487 unmodified lines | ||
| 3816 | 3818 | __le16 len_on_bd; |
| 3817 | 3819 | struct parsing_flags pars_flags; |
| 3818 | 3820 | union eth_sgl_or_raw_data sgl_or_raw_data; |
| 3819 | − __le32 reserved1[8]; | |
| 3821 | + __le32 reserved1[7]; | |
| 3822 | + u32 marker; | |
| 3820 | 3823 | }; |
| 3821 | 3824 | |
| 3822 | 3825 | |
| @@ -93,7 +93,6 @@ MODULE_FIRMWARE(FW_FILE_NAME_E1); · 92 unmodified lines | ||
| 93 | 93 | MODULE_FIRMWARE(FW_FILE_NAME_E1H); |
| 94 | 94 | MODULE_FIRMWARE(FW_FILE_NAME_E2); |
| 95 | 95 | |
| 96 | − | |
| 97 | 96 | int num_queues; |
| 98 | 97 | module_param(num_queues, int, 0); |
| 99 | 98 | MODULE_PARM_DESC(num_queues, |
| @@ -103,8 +102,6 @@ static int disable_tpa; · 3 unmodified lines | ||
| 103 | 102 | module_param(disable_tpa, int, 0); |
| 104 | 103 | MODULE_PARM_DESC(disable_tpa, " Disable the TPA (LRO) feature"); |
| 105 | 104 | |
| 106 | −#define INT_MODE_INTx 1 | |
| 107 | −#define INT_MODE_MSI 2 | |
| 108 | 105 | int int_mode; |
| 109 | 106 | module_param(int_mode, int, 0); |
| 110 | 107 | MODULE_PARM_DESC(int_mode, " Force interrupt mode other than MSI-X " |
| @@ -122,8 +119,6 @@ static int debug; · 11 unmodified lines | ||
| 122 | 119 | module_param(debug, int, 0); |
| 123 | 120 | MODULE_PARM_DESC(debug, " Default debug msglevel"); |
| 124 | 121 | |
| 125 | − | |
| 126 | − | |
| 127 | 122 | struct workqueue_struct *bnx2x_wq; |
| 128 | 123 | |
| 129 | 124 | struct bnx2x_mac_vals { |
| @@ -376,9 +371,11 @@ static u32 bnx2x_reg_rd_ind(struct bnx2x *bp, u32 addr) · 246 unmodified lines | ||
| 376 | 371 | #define DMAE_DP_DST_PCI "pci dst_addr [%x:%08x]" |
| 377 | 372 | #define DMAE_DP_DST_NONE "dst_addr [none]" |
| 378 | 373 | |
| 379 | −void bnx2x_dp_dmae(struct bnx2x *bp, struct dmae_command *dmae, int msglvl) | |
| 374 | +static void bnx2x_dp_dmae(struct bnx2x *bp, | |
| 375 | + struct dmae_command *dmae, int msglvl) | |
| 380 | 376 | { |
| 381 | 377 | u32 src_type = dmae->opcode & DMAE_COMMAND_SRC; |
| 378 | + int i; | |
| 382 | 379 | |
| 383 | 380 | switch (dmae->opcode & DMAE_COMMAND_DST) { |
| 384 | 381 | case DMAE_CMD_DST_PCI: |
| @@ -434,6 +431,10 @@ void bnx2x_dp_dmae(struct bnx2x *bp, struct dmae_command *dmae, int msglvl) · 49 unmodified lines | ||
| 434 | 431 | dmae->comp_val); |
| 435 | 432 | break; |
| 436 | 433 | } |
| 434 | + | |
| 435 | + for (i = 0; i < (sizeof(struct dmae_command)/4); i++) | |
| 436 | + DP(msglvl, "DMAE RAW [%02d]: 0x%08x\n", | |
| 437 | + i, *(((u32 *)dmae) + i)); | |
| 437 | 438 | } |
| 438 | 439 | |
| 439 | 440 | /* copy command into DMAE command memory and set DMAE command go */ |
| @@ -508,8 +509,9 @@ int bnx2x_issue_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae) · 68 unmodified lines | ||
| 508 | 509 | int cnt = CHIP_REV_IS_SLOW(bp) ? (400000) : 4000; |
| 509 | 510 | int rc = 0; |
| 510 | 511 | |
| 511 | − /* | |
| 512 | − * Lock the dmae channel. Disable BHs to prevent a dead-lock | |
| 512 | + bnx2x_dp_dmae(bp, dmae, BNX2X_MSG_DMAE); | |
| 513 | + | |
| 514 | + /* Lock the dmae channel. Disable BHs to prevent a dead-lock | |
| 513 | 515 | * as long as this code is called both from syscall context and |
| 514 | 516 | * from ndo_set_rx_mode() flow that may be called from BH. |
| 515 | 517 | */ |
| @@ -548,6 +550,7 @@ unlock: · 32 unmodified lines | ||
| 548 | 550 | void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr, |
| 549 | 551 | u32 len32) |
| 550 | 552 | { |
| 553 | + int rc; | |
| 551 | 554 | struct dmae_command dmae; |
| 552 | 555 | |
| 553 | 556 | if (!bp->dmae_ready) { |
| @@ -571,11 +574,16 @@ void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr, · 17 unmodified lines | ||
| 571 | 574 | dmae.len = len32; |
| 572 | 575 | |
| 573 | 576 | /* issue the command and wait for completion */ |
| 574 | − bnx2x_issue_dmae_with_comp(bp, &dmae); | |
| 577 | + rc = bnx2x_issue_dmae_with_comp(bp, &dmae); | |
| 578 | + if (rc) { | |
| 579 | + BNX2X_ERR("DMAE returned failure %d\n", rc); | |
| 580 | + bnx2x_panic(); | |
| 581 | + } | |
| 575 | 582 | } |
| 576 | 583 | |
| 577 | 584 | void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32) |
| 578 | 585 | { |
| 586 | + int rc; | |
| 579 | 587 | struct dmae_command dmae; |
| 580 | 588 | |
| 581 | 589 | if (!bp->dmae_ready) { |
| @@ -603,7 +611,11 @@ void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32) · 21 unmodified lines | ||
| 603 | 611 | dmae.len = len32; |
| 604 | 612 | |
| 605 | 613 | /* issue the command and wait for completion */ |
| 606 | − bnx2x_issue_dmae_with_comp(bp, &dmae); | |
| 614 | + rc = bnx2x_issue_dmae_with_comp(bp, &dmae); | |
| 615 | + if (rc) { | |
| 616 | + BNX2X_ERR("DMAE returned failure %d\n", rc); | |
| 617 | + bnx2x_panic(); | |
| 618 | + } | |
| 607 | 619 | } |
| 608 | 620 | |
| 609 | 621 | static void bnx2x_write_dmae_phys_len(struct bnx2x *bp, dma_addr_t phys_addr, |
| @@ -811,8 +823,8 @@ static void bnx2x_hc_int_disable(struct bnx2x *bp) · 201 unmodified lines | ||
| 811 | 823 | u32 val = REG_RD(bp, addr); |
| 812 | 824 | |
| 813 | 825 | /* in E1 we must use only PCI configuration space to disable |
| 814 | − * MSI/MSIX capablility | |
| 815 | − * It's forbitten to disable IGU_PF_CONF_MSI_MSIX_EN in HC block | |
| 826 | + * MSI/MSIX capability | |
| 827 | + * It's forbidden to disable IGU_PF_CONF_MSI_MSIX_EN in HC block | |
| 816 | 828 | */ |
| 817 | 829 | if (CHIP_IS_E1(bp)) { |
| 818 | 830 | /* Since IGU_PF_CONF_MSI_MSIX_EN still always on |
| @@ -839,7 +851,7 @@ static void bnx2x_hc_int_disable(struct bnx2x *bp) · 20 unmodified lines | ||
| 839 | 851 | |
| 840 | 852 | REG_WR(bp, addr, val); |
| 841 | 853 | if (REG_RD(bp, addr) != val) |
| 842 | − BNX2X_ERR("BUG! proper val not read from IGU!\n"); | |
| 854 | + BNX2X_ERR("BUG! Proper val not read from IGU!\n"); | |
| 843 | 855 | } |
| 844 | 856 | |
| 845 | 857 | static void bnx2x_igu_int_disable(struct bnx2x *bp) |
| @@ -857,7 +869,7 @@ static void bnx2x_igu_int_disable(struct bnx2x *bp) · 11 unmodified lines | ||
| 857 | 869 | |
| 858 | 870 | REG_WR(bp, IGU_REG_PF_CONFIGURATION, val); |
| 859 | 871 | if (REG_RD(bp, IGU_REG_PF_CONFIGURATION) != val) |
| 860 | − BNX2X_ERR("BUG! proper val not read from IGU!\n"); | |
| 872 | + BNX2X_ERR("BUG! Proper val not read from IGU!\n"); | |
| 861 | 873 | } |
| 862 | 874 | |
| 863 | 875 | static void bnx2x_int_disable(struct bnx2x *bp) |
| @@ -917,7 +929,6 @@ void bnx2x_panic_dump(struct bnx2x *bp, bool disable_int) · 53 unmodified lines | ||
| 917 | 929 | sp_sb_data.p_func.vf_valid, |
| 918 | 930 | sp_sb_data.state); |
| 919 | 931 | |
| 920 | − | |
| 921 | 932 | for_each_eth_queue(bp, i) { |
| 922 | 933 | struct bnx2x_fastpath *fp = &bp->fp[i]; |
| 923 | 934 | int loop; |
| @@ -1016,7 +1027,7 @@ void bnx2x_panic_dump(struct bnx2x *bp, bool disable_int) · 92 unmodified lines | ||
| 1016 | 1027 | hc_sm_p[j].timer_value); |
| 1017 | 1028 | } |
| 1018 | 1029 | |
| 1019 | − /* Indecies data */ | |
| 1030 | + /* Indices data */ | |
| 1020 | 1031 | for (j = 0; j < loop; j++) { |
| 1021 | 1032 | pr_cont("INDEX[%d] flags (0x%x) timeout (0x%x)\n", j, |
| 1022 | 1033 | hc_index_p[j].flags, |
| @@ -1027,6 +1038,7 @@ void bnx2x_panic_dump(struct bnx2x *bp, bool disable_int) · 4 unmodified lines | ||
| 1027 | 1038 | #ifdef BNX2X_STOP_ON_ERROR |
| 1028 | 1039 | |
| 1029 | 1040 | /* event queue */ |
| 1041 | + BNX2X_ERR("eq cons %x prod %x\n", bp->eq_cons, bp->eq_prod); | |
| 1030 | 1042 | for (i = 0; i < NUM_EQ_DESC; i++) { |
| 1031 | 1043 | u32 *data = (u32 *)&bp->eq_ring[i].message.data; |
| 1032 | 1044 | |
| @@ -1111,7 +1123,7 @@ void bnx2x_panic_dump(struct bnx2x *bp, bool disable_int) · 78 unmodified lines | ||
| 1111 | 1123 | * bnx2x_pf_flr_clnup() is called during nic_load in the per function HW |
| 1112 | 1124 | * initialization. |
| 1113 | 1125 | */ |
| 1114 | −#define FLR_WAIT_USEC 10000 /* 10 miliseconds */ | |
| 1126 | +#define FLR_WAIT_USEC 10000 /* 10 milliseconds */ | |
| 1115 | 1127 | #define FLR_WAIT_INTERVAL 50 /* usec */ |
| 1116 | 1128 | #define FLR_POLL_CNT (FLR_WAIT_USEC/FLR_WAIT_INTERVAL) /* 200 */ |
| 1117 | 1129 | |
| @@ -1290,7 +1302,6 @@ void bnx2x_tx_hw_flushed(struct bnx2x *bp, u32 poll_count) · 172 unmodified lines | ||
| 1290 | 1302 | for (i = 0; i < ARRAY_SIZE(cmd_regs); i++) |
| 1291 | 1303 | bnx2x_pbf_pN_cmd_flushed(bp, &cmd_regs[i], poll_count); |
| 1292 | 1304 | |
| 1293 | − | |
| 1294 | 1305 | /* Verify the transmission buffers are flushed P0, P1, P4 */ |
| 1295 | 1306 | for (i = 0; i < ARRAY_SIZE(buf_regs); i++) |
| 1296 | 1307 | bnx2x_pbf_pN_buf_flushed(bp, &buf_regs[i], poll_count); |
| @@ -1305,11 +1316,9 @@ void bnx2x_tx_hw_flushed(struct bnx2x *bp, u32 poll_count) · 8 unmodified lines | ||
| 1305 | 1316 | #define OP_GEN_AGG_VECT(index) \ |
| 1306 | 1317 | (((index) << SDM_OP_GEN_AGG_VECT_IDX_SHIFT) & SDM_OP_GEN_AGG_VECT_IDX) |
| 1307 | 1318 | |
| 1308 | − | |
| 1309 | 1319 | int bnx2x_send_final_clnup(struct bnx2x *bp, u8 clnup_func, u32 poll_cnt) |
| 1310 | 1320 | { |
| 1311 | 1321 | u32 op_gen_command = 0; |
| 1312 | − | |
| 1313 | 1322 | u32 comp_addr = BAR_CSTRORM_INTMEM + |
| 1314 | 1323 | CSTORM_FINAL_CLEANUP_COMPLETE_OFFSET(clnup_func); |
| 1315 | 1324 | int ret = 0; |
| @@ -1334,7 +1343,7 @@ int bnx2x_send_final_clnup(struct bnx2x *bp, u8 clnup_func, u32 poll_cnt) · 18 unmodified lines | ||
| 1334 | 1343 | bnx2x_panic(); |
| 1335 | 1344 | return 1; |
| 1336 | 1345 | } |
| 1337 | − /* Zero completion for nxt FLR */ | |
| 1346 | + /* Zero completion for next FLR */ | |
| 1338 | 1347 | REG_WR(bp, comp_addr, 0); |
| 1339 | 1348 | |
| 1340 | 1349 | return ret; |
| @@ -1352,7 +1361,6 @@ u8 bnx2x_is_pcie_pending(struct pci_dev *dev) · 11 unmodified lines | ||
| 1352 | 1361 | */ |
| 1353 | 1362 | static int bnx2x_poll_hw_usage_counters(struct bnx2x *bp, u32 poll_cnt) |
| 1354 | 1363 | { |
| 1355 | − | |
| 1356 | 1364 | /* wait for CFC PF usage-counter to zero (includes all the VFs) */ |
| 1357 | 1365 | if (bnx2x_flr_clnup_poll_hw_counter(bp, |
| 1358 | 1366 | CFC_REG_NUM_LCIDS_INSIDE_PF, |
| @@ -1360,7 +1368,6 @@ static int bnx2x_poll_hw_usage_counters(struct bnx2x *bp, u32 poll_cnt) · 1 unmodified line | ||
| 1360 | 1368 | poll_cnt)) |
| 1361 | 1369 | return 1; |
| 1362 | 1370 | |
| 1363 | − | |
| 1364 | 1371 | /* Wait for DQ PF usage-counter to zero (until DQ cleanup) */ |
| 1365 | 1372 | if (bnx2x_flr_clnup_poll_hw_counter(bp, |
| 1366 | 1373 | DORQ_REG_PF_USAGE_CNT, |
| @@ -1390,7 +1397,7 @@ static int bnx2x_poll_hw_usage_counters(struct bnx2x *bp, u32 poll_cnt) · 23 unmodified lines | ||
| 1390 | 1397 | /* Wait DMAE PF usage counter to zero */ |
| 1391 | 1398 | if (bnx2x_flr_clnup_poll_hw_counter(bp, |
| 1392 | 1399 | dmae_reg_go_c[INIT_DMAE_C(bp)], |
| 1393 | − "DMAE dommand register timed out", | |
| 1400 | + "DMAE command register timed out", | |
| 1394 | 1401 | poll_cnt)) |
| 1395 | 1402 | return 1; |
| 1396 | 1403 | |
| @@ -1770,7 +1777,7 @@ void bnx2x_sp_event(struct bnx2x_fastpath *fp, union eth_rx_cqe *rr_cqe) · 373 unmodified lines | ||
| 1770 | 1777 | break; |
| 1771 | 1778 | |
| 1772 | 1779 | case (RAMROD_CMD_ID_ETH_TERMINATE): |
| 1773 | − DP(BNX2X_MSG_SP, "got MULTI[%d] teminate ramrod\n", cid); | |
| 1780 | + DP(BNX2X_MSG_SP, "got MULTI[%d] terminate ramrod\n", cid); | |
| 1774 | 1781 | drv_cmd = BNX2X_Q_CMD_TERMINATE; |
| 1775 | 1782 | break; |
| 1776 | 1783 | |
| @@ -1859,7 +1866,6 @@ irqreturn_t bnx2x_interrupt(int irq, void *dev_instance) · 82 unmodified lines | ||
| 1859 | 1866 | mask = 0x2 << (fp->index + CNIC_SUPPORT(bp)); |
| 1860 | 1867 | if (status & mask) { |
| 1861 | 1868 | /* Handle Rx or Tx according to SB id */ |
| 1862 | − prefetch(fp->rx_cons_sb); | |
| 1863 | 1869 | for_each_cos_in_tx_queue(fp, cos) |
| 1864 | 1870 | prefetch(fp->txdata_ptr[cos]->tx_cons_sb); |
| 1865 | 1871 | prefetch(&fp->sb_running_index[SM_RX_ID]); |
| @@ -1947,7 +1953,7 @@ int bnx2x_acquire_hw_lock(struct bnx2x *bp, u32 resource) · 81 unmodified lines | ||
| 1947 | 1953 | if (lock_status & resource_bit) |
| 1948 | 1954 | return 0; |
| 1949 | 1955 | |
| 1950 | − msleep(5); | |
| 1956 | + usleep_range(5000, 10000); | |
| 1951 | 1957 | } |
| 1952 | 1958 | BNX2X_ERR("Timeout\n"); |
| 1953 | 1959 | return -EAGAIN; |
| @@ -1982,8 +1988,8 @@ int bnx2x_release_hw_lock(struct bnx2x *bp, u32 resource) · 28 unmodified lines | ||
| 1982 | 1988 | /* Validating that the resource is currently taken */ |
| 1983 | 1989 | lock_status = REG_RD(bp, hw_lock_control_reg); |
| 1984 | 1990 | if (!(lock_status & resource_bit)) { |
| 1985 | − BNX2X_ERR("lock_status 0x%x resource_bit 0x%x. unlock was called but lock wasn't taken!\n", | |
| 1986 | − lock_status, resource_bit); | |
| 1991 | + BNX2X_ERR("lock_status 0x%x resource_bit 0x%x. Unlock was called but lock wasn't taken!\n", | |
| 1992 | + lock_status, resource_bit); | |
| 1987 | 1993 | return -EFAULT; |
| 1988 | 1994 | } |
| 1989 | 1995 | |
| @@ -1991,7 +1997,6 @@ int bnx2x_release_hw_lock(struct bnx2x *bp, u32 resource) · 1 unmodified line | ||
| 1991 | 1997 | return 0; |
| 1992 | 1998 | } |
| 1993 | 1999 | |
| 1994 | − | |
| 1995 | 2000 | int bnx2x_get_gpio(struct bnx2x *bp, int gpio_num, u8 port) |
| 1996 | 2001 | { |
| 1997 | 2002 | /* The GPIO should be swapped if swap register is set and active */ |
| @@ -2347,14 +2352,13 @@ u8 bnx2x_link_test(struct bnx2x *bp, u8 is_serdes) · 349 unmodified lines | ||
| 2347 | 2352 | return rc; |
| 2348 | 2353 | } |
| 2349 | 2354 | |
| 2350 | − | |
| 2351 | 2355 | /* Calculates the sum of vn_min_rates. |
| 2352 | 2356 | It's needed for further normalizing of the min_rates. |
| 2353 | 2357 | Returns: |
| 2354 | 2358 | sum of vn_min_rates. |
| 2355 | 2359 | or |
| 2356 | 2360 | 0 - if all the min_rates are 0. |
| 2357 | − In the later case fainess algorithm should be deactivated. | |
| 2361 | + In the later case fairness algorithm should be deactivated. | |
| 2358 | 2362 | If not all min_rates are zero then those that are zeroes will be set to 1. |
| 2359 | 2363 | */ |
| 2360 | 2364 | static void bnx2x_calc_vn_min(struct bnx2x *bp, |
| @@ -2419,7 +2423,6 @@ static void bnx2x_calc_vn_max(struct bnx2x *bp, int vn, · 58 unmodified lines | ||
| 2419 | 2423 | input->vnic_max_rate[vn] = vn_max_rate; |
| 2420 | 2424 | } |
| 2421 | 2425 | |
| 2422 | − | |
| 2423 | 2426 | static int bnx2x_get_cmng_fns_mode(struct bnx2x *bp) |
| 2424 | 2427 | { |
| 2425 | 2428 | if (CHIP_REV_IS_SLOW(bp)) |
| @@ -2435,7 +2438,7 @@ void bnx2x_read_mf_cfg(struct bnx2x *bp) · 9 unmodified lines | ||
| 2435 | 2438 | int vn, n = (CHIP_MODE_IS_4_PORT(bp) ? 2 : 1); |
| 2436 | 2439 | |
| 2437 | 2440 | if (BP_NOMCP(bp)) |
| 2438 | − return; /* what should be the default bvalue in this case */ | |
| 2441 | + return; /* what should be the default value in this case */ | |
| 2439 | 2442 | |
| 2440 | 2443 | /* For 2 port configuration the absolute function number formula |
| 2441 | 2444 | * is: |
| @@ -2901,7 +2904,6 @@ u32 bnx2x_fw_command(struct bnx2x *bp, u32 command, u32 param) · 459 unmodified lines | ||
| 2901 | 2904 | return rc; |
| 2902 | 2905 | } |
| 2903 | 2906 | |
| 2904 | − | |
| 2905 | 2907 | static void storm_memset_func_cfg(struct bnx2x *bp, |
| 2906 | 2908 | struct tstorm_eth_function_common_config *tcfg, |
| 2907 | 2909 | u16 abs_fid) |
| @@ -2935,7 +2937,7 @@ void bnx2x_func_init(struct bnx2x *bp, struct bnx2x_func_init_params *p) · 27 unmodified lines | ||
| 2935 | 2937 | } |
| 2936 | 2938 | |
| 2937 | 2939 | /** |
| 2938 | − * bnx2x_get_tx_only_flags - Return common flags | |
| 2940 | + * bnx2x_get_common_flags - Return common flags | |
| 2939 | 2941 | * |
| 2940 | 2942 | * @bp device handle |
| 2941 | 2943 | * @fp queue handle |
| @@ -3006,7 +3008,6 @@ static unsigned long bnx2x_get_q_flags(struct bnx2x *bp, · 64 unmodified lines | ||
| 3006 | 3008 | if (IS_MF_AFEX(bp)) |
| 3007 | 3009 | __set_bit(BNX2X_Q_FLG_SILENT_VLAN_REM, &flags); |
| 3008 | 3010 | |
| 3009 | − | |
| 3010 | 3011 | return flags | bnx2x_get_common_flags(bp, fp, true); |
| 3011 | 3012 | } |
| 3012 | 3013 | |
| @@ -3082,7 +3083,7 @@ static void bnx2x_pf_rx_q_prep(struct bnx2x *bp, · 69 unmodified lines | ||
| 3082 | 3083 | * placed on the BD (not including paddings). |
| 3083 | 3084 | */ |
| 3084 | 3085 | rxq_init->buf_sz = fp->rx_buf_size - BNX2X_FW_RX_ALIGN_START - |
| 3085 | − BNX2X_FW_RX_ALIGN_END - IP_HEADER_ALIGNMENT_PADDING; | |
| 3086 | + BNX2X_FW_RX_ALIGN_END - IP_HEADER_ALIGNMENT_PADDING; | |
| 3086 | 3087 | |
| 3087 | 3088 | rxq_init->cl_qzone_id = fp->cl_qzone_id; |
| 3088 | 3089 | rxq_init->tpa_agg_sz = tpa_agg_size; |
| @@ -3124,7 +3125,7 @@ static void bnx2x_pf_tx_q_prep(struct bnx2x *bp, · 35 unmodified lines | ||
| 3124 | 3125 | txq_init->fw_sb_id = fp->fw_sb_id; |
| 3125 | 3126 | |
| 3126 | 3127 | /* |
| 3127 | − * set the tss leading client id for TX classfication == | |
| 3128 | + * set the tss leading client id for TX classification == | |
| 3128 | 3129 | * leading RSS client id |
| 3129 | 3130 | */ |
| 3130 | 3131 | txq_init->tss_leading_cl_id = bnx2x_fp(bp, 0, cl_id); |
| @@ -3196,7 +3197,6 @@ static void bnx2x_pf_init(struct bnx2x *bp) · 65 unmodified lines | ||
| 3196 | 3197 | storm_memset_eq_data(bp, &eq_data, BP_FUNC(bp)); |
| 3197 | 3198 | } |
| 3198 | 3199 | |
| 3199 | − | |
| 3200 | 3200 | static void bnx2x_e1h_disable(struct bnx2x *bp) |
| 3201 | 3201 | { |
| 3202 | 3202 | int port = BP_PORT(bp); |
| @@ -3212,7 +3212,7 @@ static void bnx2x_e1h_enable(struct bnx2x *bp) · 9 unmodified lines | ||
| 3212 | 3212 | |
| 3213 | 3213 | REG_WR(bp, NIG_REG_LLH0_FUNC_EN + port*8, 1); |
| 3214 | 3214 | |
| 3215 | − /* Tx queue should be only reenabled */ | |
| 3215 | + /* Tx queue should be only re-enabled */ | |
| 3216 | 3216 | netif_tx_wake_all_queues(bp->dev); |
| 3217 | 3217 | |
| 3218 | 3218 | /* |
| @@ -3540,10 +3540,8 @@ static bool bnx2x_is_contextless_ramrod(int cmd, int cmd_type) · 321 unmodified lines | ||
| 3540 | 3540 | return true; |
| 3541 | 3541 | else |
| 3542 | 3542 | return false; |
| 3543 | − | |
| 3544 | 3543 | } |
| 3545 | 3544 | |
| 3546 | − | |
| 3547 | 3545 | /** |
| 3548 | 3546 | * bnx2x_sp_post - place a single command on an SP ring |
| 3549 | 3547 | * |
| @@ -3608,14 +3606,13 @@ int bnx2x_sp_post(struct bnx2x *bp, int command, int cid, · 58 unmodified lines | ||
| 3608 | 3606 | /* |
| 3609 | 3607 | * It's ok if the actual decrement is issued towards the memory |
| 3610 | 3608 | * somewhere between the spin_lock and spin_unlock. Thus no |
| 3611 | − * more explict memory barrier is needed. | |
| 3609 | + * more explicit memory barrier is needed. | |
| 3612 | 3610 | */ |
| 3613 | 3611 | if (common) |
| 3614 | 3612 | atomic_dec(&bp->eq_spq_left); |
| 3615 | 3613 | else |
| 3616 | 3614 | atomic_dec(&bp->cq_spq_left); |
| 3617 | 3615 | |
| 3618 | − | |
| 3619 | 3616 | DP(BNX2X_MSG_SP, |
| 3620 | 3617 | "SPQE[%x] (%x:%x) (cmd, common?) (%d,%d) hw_cid %x data (%x:%x) type(0x%x) left (CQ, EQ) (%x,%x)\n", |
| 3621 | 3618 | bp->spq_prod_idx, (u32)U64_HI(bp->spq_mapping), |
| @@ -3637,15 +3634,14 @@ static int bnx2x_acquire_alr(struct bnx2x *bp) · 15 unmodified lines | ||
| 3637 | 3634 | |
| 3638 | 3635 | might_sleep(); |
| 3639 | 3636 | for (j = 0; j < 1000; j++) { |
| 3640 | − val = (1UL << 31); | |
| 3641 | − REG_WR(bp, GRCBASE_MCP + 0x9c, val); | |
| 3642 | − val = REG_RD(bp, GRCBASE_MCP + 0x9c); | |
| 3643 | − if (val & (1L << 31)) | |
| 3637 | + REG_WR(bp, MCP_REG_MCPR_ACCESS_LOCK, MCPR_ACCESS_LOCK_LOCK); | |
| 3638 | + val = REG_RD(bp, MCP_REG_MCPR_ACCESS_LOCK); | |
| 3639 | + if (val & MCPR_ACCESS_LOCK_LOCK) | |
| 3644 | 3640 | break; |
| 3645 | 3641 | |
| 3646 | − msleep(5); | |
| 3642 | + usleep_range(5000, 10000); | |
| 3647 | 3643 | } |
| 3648 | − if (!(val & (1L << 31))) { | |
| 3644 | + if (!(val & MCPR_ACCESS_LOCK_LOCK)) { | |
| 3649 | 3645 | BNX2X_ERR("Cannot acquire MCP access lock register\n"); |
| 3650 | 3646 | rc = -EBUSY; |
| 3651 | 3647 | } |
| @@ -3656,7 +3652,7 @@ static int bnx2x_acquire_alr(struct bnx2x *bp) · 4 unmodified lines | ||
| 3656 | 3652 | /* release split MCP access lock register */ |
| 3657 | 3653 | static void bnx2x_release_alr(struct bnx2x *bp) |
| 3658 | 3654 | { |
| 3659 | − REG_WR(bp, GRCBASE_MCP + 0x9c, 0); | |
| 3655 | + REG_WR(bp, MCP_REG_MCPR_ACCESS_LOCK, 0); | |
| 3660 | 3656 | } |
| 3661 | 3657 | |
| 3662 | 3658 | #define BNX2X_DEF_SB_ATT_IDX 0x0001 |
| @@ -3678,7 +3674,7 @@ static u16 bnx2x_update_dsb_idx(struct bnx2x *bp) · 15 unmodified lines | ||
| 3678 | 3674 | rc |= BNX2X_DEF_SB_IDX; |
| 3679 | 3675 | } |
| 3680 | 3676 | |
| 3681 | − /* Do not reorder: indecies reading should complete before handling */ | |
| 3677 | + /* Do not reorder: indices reading should complete before handling */ | |
| 3682 | 3678 | barrier(); |
| 3683 | 3679 | return rc; |
| 3684 | 3680 | } |
| @@ -3827,8 +3823,7 @@ static void bnx2x_fan_failure(struct bnx2x *bp) · 142 unmodified lines | ||
| 3827 | 3823 | netdev_err(bp->dev, "Fan Failure on Network Controller has caused the driver to shutdown the card to prevent permanent damage.\n" |
| 3828 | 3824 | "Please contact OEM Support for assistance\n"); |
| 3829 | 3825 | |
| 3830 | − /* | |
| 3831 | − * Schedule device reset (unload) | |
| 3826 | + /* Schedule device reset (unload) | |
| 3832 | 3827 | * This is due to some boards consuming sufficient power when driver is |
| 3833 | 3828 | * up to overheat if fan fails. |
| 3834 | 3829 | */ |
| @@ -3836,7 +3831,6 @@ static void bnx2x_fan_failure(struct bnx2x *bp) · 1 unmodified line | ||
| 3836 | 3831 | set_bit(BNX2X_SP_RTNL_FAN_FAILURE, &bp->sp_rtnl_state); |
| 3837 | 3832 | smp_mb__after_clear_bit(); |
| 3838 | 3833 | schedule_delayed_work(&bp->sp_rtnl_task, 0); |
| 3839 | − | |
| 3840 | 3834 | } |
| 3841 | 3835 | |
| 3842 | 3836 | static void bnx2x_attn_int_deasserted0(struct bnx2x *bp, u32 attn) |
| @@ -4106,7 +4100,7 @@ static void bnx2x_clear_reset_global(struct bnx2x *bp) · 263 unmodified lines | ||
| 4106 | 4100 | */ |
| 4107 | 4101 | static bool bnx2x_reset_is_global(struct bnx2x *bp) |
| 4108 | 4102 | { |
| 4109 | − u32 val = REG_RD(bp, BNX2X_RECOVERY_GLOB_REG); | |
| 4103 | + u32 val = REG_RD(bp, BNX2X_RECOVERY_GLOB_REG); | |
| 4110 | 4104 | |
| 4111 | 4105 | DP(NETIF_MSG_HW, "GEN_REG_VAL=0x%08x\n", val); |
| 4112 | 4106 | return (val & BNX2X_GLOBAL_RESET_BIT) ? true : false; |
| @@ -4157,7 +4151,7 @@ void bnx2x_set_reset_in_progress(struct bnx2x *bp) · 44 unmodified lines | ||
| 4157 | 4151 | */ |
| 4158 | 4152 | bool bnx2x_reset_is_done(struct bnx2x *bp, int engine) |
| 4159 | 4153 | { |
| 4160 | − u32 val = REG_RD(bp, BNX2X_RECOVERY_GLOB_REG); | |
| 4154 | + u32 val = REG_RD(bp, BNX2X_RECOVERY_GLOB_REG); | |
| 4161 | 4155 | u32 bit = engine ? |
| 4162 | 4156 | BNX2X_PATH1_RST_IN_PROG_BIT : BNX2X_PATH0_RST_IN_PROG_BIT; |
| 4163 | 4157 | |
| @@ -4260,13 +4254,18 @@ static bool bnx2x_get_load_status(struct bnx2x *bp, int engine) · 96 unmodified lines | ||
| 4260 | 4254 | return val != 0; |
| 4261 | 4255 | } |
| 4262 | 4256 | |
| 4257 | +static void _print_parity(struct bnx2x *bp, u32 reg) | |
| 4258 | +{ | |
| 4259 | + pr_cont(" [0x%08x] ", REG_RD(bp, reg)); | |
| 4260 | +} | |
| 4261 | + | |
| 4263 | 4262 | static void _print_next_block(int idx, const char *blk) |
| 4264 | 4263 | { |
| 4265 | 4264 | pr_cont("%s%s", idx ? ", " : "", blk); |
| 4266 | 4265 | } |
| 4267 | 4266 | |
| 4268 | −static int bnx2x_check_blocks_with_parity0(u32 sig, int par_num, | |
| 4269 | − bool print) | |
| 4267 | +static int bnx2x_check_blocks_with_parity0(struct bnx2x *bp, u32 sig, | |
| 4268 | + int par_num, bool print) | |
| 4270 | 4269 | { |
| 4271 | 4270 | int i = 0; |
| 4272 | 4271 | u32 cur_bit = 0; |
| @@ -4275,33 +4274,54 @@ static int bnx2x_check_blocks_with_parity0(u32 sig, int par_num, · 2 unmodified lines | ||
| 4275 | 4274 | if (sig & cur_bit) { |
| 4276 | 4275 | switch (cur_bit) { |
| 4277 | 4276 | case AEU_INPUTS_ATTN_BITS_BRB_PARITY_ERROR: |
| 4278 | − if (print) | |
| 4277 | + if (print) { | |
| 4279 | 4278 | _print_next_block(par_num++, "BRB"); |
| 4279 | + _print_parity(bp, | |
| 4280 | + BRB1_REG_BRB1_PRTY_STS); | |
| 4281 | + } | |
| 4280 | 4282 | break; |
| 4281 | 4283 | case AEU_INPUTS_ATTN_BITS_PARSER_PARITY_ERROR: |
| 4282 | − if (print) | |
| 4284 | + if (print) { | |
| 4283 | 4285 | _print_next_block(par_num++, "PARSER"); |
| 4286 | + _print_parity(bp, PRS_REG_PRS_PRTY_STS); | |
| 4287 | + } | |
| 4284 | 4288 | break; |
| 4285 | 4289 | case AEU_INPUTS_ATTN_BITS_TSDM_PARITY_ERROR: |
| 4286 | − if (print) | |
| 4290 | + if (print) { | |
| 4287 | 4291 | _print_next_block(par_num++, "TSDM"); |
| 4292 | + _print_parity(bp, | |
| 4293 | + TSDM_REG_TSDM_PRTY_STS); | |
| 4294 | + } | |
| 4288 | 4295 | break; |
| 4289 | 4296 | case AEU_INPUTS_ATTN_BITS_SEARCHER_PARITY_ERROR: |
| 4290 | − if (print) | |
| 4297 | + if (print) { | |
| 4291 | 4298 | _print_next_block(par_num++, |
| 4292 | 4299 | "SEARCHER"); |
| 4300 | + _print_parity(bp, SRC_REG_SRC_PRTY_STS); | |
| 4301 | + } | |
| 4293 | 4302 | break; |
| 4294 | 4303 | case AEU_INPUTS_ATTN_BITS_TCM_PARITY_ERROR: |
| 4295 | − if (print) | |
| 4304 | + if (print) { | |
| 4296 | 4305 | _print_next_block(par_num++, "TCM"); |
| 4306 | + _print_parity(bp, | |
| 4307 | + TCM_REG_TCM_PRTY_STS); | |
| 4308 | + } | |
| 4297 | 4309 | break; |
| 4298 | 4310 | case AEU_INPUTS_ATTN_BITS_TSEMI_PARITY_ERROR: |
| 4299 | − if (print) | |
| 4311 | + if (print) { | |
| 4300 | 4312 | _print_next_block(par_num++, "TSEMI"); |
| 4313 | + _print_parity(bp, | |
| 4314 | + TSEM_REG_TSEM_PRTY_STS_0); | |
| 4315 | + _print_parity(bp, | |
| 4316 | + TSEM_REG_TSEM_PRTY_STS_1); | |
| 4317 | + } | |
| 4301 | 4318 | break; |
| 4302 | 4319 | case AEU_INPUTS_ATTN_BITS_PBCLIENT_PARITY_ERROR: |
| 4303 | − if (print) | |
| 4320 | + if (print) { | |
| 4304 | 4321 | _print_next_block(par_num++, "XPB"); |
| 4322 | + _print_parity(bp, GRCBASE_XPB + | |
| 4323 | + PB_REG_PB_PRTY_STS); | |
| 4324 | + } | |
| 4305 | 4325 | break; |
| 4306 | 4326 | } |
| 4307 | 4327 | |
| @@ -4313,8 +4333,9 @@ static int bnx2x_check_blocks_with_parity0(u32 sig, int par_num, · 5 unmodified lines | ||
| 4313 | 4333 | return par_num; |
| 4314 | 4334 | } |
| 4315 | 4335 | |
| 4316 | −static int bnx2x_check_blocks_with_parity1(u32 sig, int par_num, | |
| 4317 | − bool *global, bool print) | |
| 4336 | +static int bnx2x_check_blocks_with_parity1(struct bnx2x *bp, u32 sig, | |
| 4337 | + int par_num, bool *global, | |
| 4338 | + bool print) | |
| 4318 | 4339 | { |
| 4319 | 4340 | int i = 0; |
| 4320 | 4341 | u32 cur_bit = 0; |
| @@ -4323,37 +4344,66 @@ static int bnx2x_check_blocks_with_parity1(u32 sig, int par_num, · 2 unmodified lines | ||
| 4323 | 4344 | if (sig & cur_bit) { |
| 4324 | 4345 | switch (cur_bit) { |
| 4325 | 4346 | case AEU_INPUTS_ATTN_BITS_PBF_PARITY_ERROR: |
| 4326 | − if (print) | |
| 4347 | + if (print) { | |
| 4327 | 4348 | _print_next_block(par_num++, "PBF"); |
| 4349 | + _print_parity(bp, PBF_REG_PBF_PRTY_STS); | |
| 4350 | + } | |
| 4328 | 4351 | break; |
| 4329 | 4352 | case AEU_INPUTS_ATTN_BITS_QM_PARITY_ERROR: |
| 4330 | − if (print) | |
| 4353 | + if (print) { | |
| 4331 | 4354 | _print_next_block(par_num++, "QM"); |
| 4355 | + _print_parity(bp, QM_REG_QM_PRTY_STS); | |
| 4356 | + } | |
| 4332 | 4357 | break; |
| 4333 | 4358 | case AEU_INPUTS_ATTN_BITS_TIMERS_PARITY_ERROR: |
| 4334 | − if (print) | |
| 4359 | + if (print) { | |
| 4335 | 4360 | _print_next_block(par_num++, "TM"); |
| 4361 | + _print_parity(bp, TM_REG_TM_PRTY_STS); | |
| 4362 | + } | |
| 4336 | 4363 | break; |
| 4337 | 4364 | case AEU_INPUTS_ATTN_BITS_XSDM_PARITY_ERROR: |
| 4338 | − if (print) | |
| 4365 | + if (print) { | |
| 4339 | 4366 | _print_next_block(par_num++, "XSDM"); |
| 4367 | + _print_parity(bp, | |
| 4368 | + XSDM_REG_XSDM_PRTY_STS); | |
| 4369 | + } | |
| 4340 | 4370 | break; |
| 4341 | 4371 | case AEU_INPUTS_ATTN_BITS_XCM_PARITY_ERROR: |
| 4342 | − if (print) | |
| 4372 | + if (print) { | |
| 4343 | 4373 | _print_next_block(par_num++, "XCM"); |
| 4374 | + _print_parity(bp, XCM_REG_XCM_PRTY_STS); | |
| 4375 | + } | |
| 4344 | 4376 | break; |
| 4345 | 4377 | case AEU_INPUTS_ATTN_BITS_XSEMI_PARITY_ERROR: |
| 4346 | − if (print) | |
| 4378 | + if (print) { | |
| 4347 | 4379 | _print_next_block(par_num++, "XSEMI"); |
| 4380 | + _print_parity(bp, | |
| 4381 | + XSEM_REG_XSEM_PRTY_STS_0); | |
| 4382 | + _print_parity(bp, | |
| 4383 | + XSEM_REG_XSEM_PRTY_STS_1); | |
| 4384 | + } | |
| 4348 | 4385 | break; |
| 4349 | 4386 | case AEU_INPUTS_ATTN_BITS_DOORBELLQ_PARITY_ERROR: |
| 4350 | − if (print) | |
| 4387 | + if (print) { | |
| 4351 | 4388 | _print_next_block(par_num++, |
| 4352 | 4389 | "DOORBELLQ"); |
| 4390 | + _print_parity(bp, | |
| 4391 | + DORQ_REG_DORQ_PRTY_STS); | |
| 4392 | + } | |
| 4353 | 4393 | break; |
| 4354 | 4394 | case AEU_INPUTS_ATTN_BITS_NIG_PARITY_ERROR: |
| 4355 | − if (print) | |
| 4395 | + if (print) { | |
| 4356 | 4396 | _print_next_block(par_num++, "NIG"); |
| 4397 | + if (CHIP_IS_E1x(bp)) { | |
| 4398 | + _print_parity(bp, | |
| 4399 | + NIG_REG_NIG_PRTY_STS); | |
| 4400 | + } else { | |
| 4401 | + _print_parity(bp, | |
| 4402 | + NIG_REG_NIG_PRTY_STS_0); | |
| 4403 | + _print_parity(bp, | |
| 4404 | + NIG_REG_NIG_PRTY_STS_1); | |
| 4405 | + } | |
| 4406 | + } | |
| 4357 | 4407 | break; |
| 4358 | 4408 | case AEU_INPUTS_ATTN_BITS_VAUX_PCI_CORE_PARITY_ERROR: |
| 4359 | 4409 | if (print) |
| @@ -4362,32 +4412,52 @@ static int bnx2x_check_blocks_with_parity1(u32 sig, int par_num, · 2 unmodified lines | ||
| 4362 | 4412 | *global = true; |
| 4363 | 4413 | break; |
| 4364 | 4414 | case AEU_INPUTS_ATTN_BITS_DEBUG_PARITY_ERROR: |
| 4365 | − if (print) | |
| 4415 | + if (print) { | |
| 4366 | 4416 | _print_next_block(par_num++, "DEBUG"); |
| 4417 | + _print_parity(bp, DBG_REG_DBG_PRTY_STS); | |
| 4418 | + } | |
| 4367 | 4419 | break; |
| 4368 | 4420 | case AEU_INPUTS_ATTN_BITS_USDM_PARITY_ERROR: |
| 4369 | − if (print) | |
| 4421 | + if (print) { | |
| 4370 | 4422 | _print_next_block(par_num++, "USDM"); |
| 4423 | + _print_parity(bp, | |
| 4424 | + USDM_REG_USDM_PRTY_STS); | |
| 4425 | + } | |
| 4371 | 4426 | break; |
| 4372 | 4427 | case AEU_INPUTS_ATTN_BITS_UCM_PARITY_ERROR: |
| 4373 | − if (print) | |
| 4428 | + if (print) { | |
| 4374 | 4429 | _print_next_block(par_num++, "UCM"); |
| 4430 | + _print_parity(bp, UCM_REG_UCM_PRTY_STS); | |
| 4431 | + } | |
| 4375 | 4432 | break; |
| 4376 | 4433 | case AEU_INPUTS_ATTN_BITS_USEMI_PARITY_ERROR: |
| 4377 | − if (print) | |
| 4434 | + if (print) { | |
| 4378 | 4435 | _print_next_block(par_num++, "USEMI"); |
| 4436 | + _print_parity(bp, | |
| 4437 | + USEM_REG_USEM_PRTY_STS_0); | |
| 4438 | + _print_parity(bp, | |
| 4439 | + USEM_REG_USEM_PRTY_STS_1); | |
| 4440 | + } | |
| 4379 | 4441 | break; |
| 4380 | 4442 | case AEU_INPUTS_ATTN_BITS_UPB_PARITY_ERROR: |
| 4381 | − if (print) | |
| 4443 | + if (print) { | |
| 4382 | 4444 | _print_next_block(par_num++, "UPB"); |
| 4445 | + _print_parity(bp, GRCBASE_UPB + | |
| 4446 | + PB_REG_PB_PRTY_STS); | |
| 4447 | + } | |
| 4383 | 4448 | break; |
| 4384 | 4449 | case AEU_INPUTS_ATTN_BITS_CSDM_PARITY_ERROR: |
| 4385 | − if (print) | |
| 4450 | + if (print) { | |
| 4386 | 4451 | _print_next_block(par_num++, "CSDM"); |
| 4452 | + _print_parity(bp, | |
| 4453 | + CSDM_REG_CSDM_PRTY_STS); | |
| 4454 | + } | |
| 4387 | 4455 | break; |
| 4388 | 4456 | case AEU_INPUTS_ATTN_BITS_CCM_PARITY_ERROR: |
| 4389 | − if (print) | |
| 4457 | + if (print) { | |
| 4390 | 4458 | _print_next_block(par_num++, "CCM"); |
| 4459 | + _print_parity(bp, CCM_REG_CCM_PRTY_STS); | |
| 4460 | + } | |
| 4391 | 4461 | break; |
| 4392 | 4462 | } |
| 4393 | 4463 | |
| @@ -4399,8 +4469,8 @@ static int bnx2x_check_blocks_with_parity1(u32 sig, int par_num, · 5 unmodified lines | ||
| 4399 | 4469 | return par_num; |
| 4400 | 4470 | } |
| 4401 | 4471 | |
| 4402 | −static int bnx2x_check_blocks_with_parity2(u32 sig, int par_num, | |
| 4403 | − bool print) | |
| 4472 | +static int bnx2x_check_blocks_with_parity2(struct bnx2x *bp, u32 sig, | |
| 4473 | + int par_num, bool print) | |
| 4404 | 4474 | { |
| 4405 | 4475 | int i = 0; |
| 4406 | 4476 | u32 cur_bit = 0; |
| @@ -4409,12 +4479,23 @@ static int bnx2x_check_blocks_with_parity2(u32 sig, int par_num, · 2 unmodified lines | ||
| 4409 | 4479 | if (sig & cur_bit) { |
| 4410 | 4480 | switch (cur_bit) { |
| 4411 | 4481 | case AEU_INPUTS_ATTN_BITS_CSEMI_PARITY_ERROR: |
| 4412 | − if (print) | |
| 4482 | + if (print) { | |
| 4413 | 4483 | _print_next_block(par_num++, "CSEMI"); |
| 4484 | + _print_parity(bp, | |
| 4485 | + CSEM_REG_CSEM_PRTY_STS_0); | |
| 4486 | + _print_parity(bp, | |
| 4487 | + CSEM_REG_CSEM_PRTY_STS_1); | |
| 4488 | + } | |
| 4414 | 4489 | break; |
| 4415 | 4490 | case AEU_INPUTS_ATTN_BITS_PXP_PARITY_ERROR: |
| 4416 | − if (print) | |
| 4491 | + if (print) { | |
| 4417 | 4492 | _print_next_block(par_num++, "PXP"); |
| 4493 | + _print_parity(bp, PXP_REG_PXP_PRTY_STS); | |
| 4494 | + _print_parity(bp, | |
| 4495 | + PXP2_REG_PXP2_PRTY_STS_0); | |
| 4496 | + _print_parity(bp, | |
| 4497 | + PXP2_REG_PXP2_PRTY_STS_1); | |
| 4498 | + } | |
| 4418 | 4499 | break; |
| 4419 | 4500 | case AEU_IN_ATTN_BITS_PXPPCICLOCKCLIENT_PARITY_ERROR: |
| 4420 | 4501 | if (print) |
| @@ -4422,24 +4503,42 @@ static int bnx2x_check_blocks_with_parity2(u32 sig, int par_num, · 1 unmodified line | ||
| 4422 | 4503 | "PXPPCICLOCKCLIENT"); |
| 4423 | 4504 | break; |
| 4424 | 4505 | case AEU_INPUTS_ATTN_BITS_CFC_PARITY_ERROR: |
| 4425 | − if (print) | |
| 4506 | + if (print) { | |
| 4426 | 4507 | _print_next_block(par_num++, "CFC"); |
| 4508 | + _print_parity(bp, | |
| 4509 | + CFC_REG_CFC_PRTY_STS); | |
| 4510 | + } | |
| 4427 | 4511 | break; |
| 4428 | 4512 | case AEU_INPUTS_ATTN_BITS_CDU_PARITY_ERROR: |
| 4429 | − if (print) | |
| 4513 | + if (print) { | |
| 4430 | 4514 | _print_next_block(par_num++, "CDU"); |
| 4515 | + _print_parity(bp, CDU_REG_CDU_PRTY_STS); | |
| 4516 | + } | |
| 4431 | 4517 | break; |
| 4432 | 4518 | case AEU_INPUTS_ATTN_BITS_DMAE_PARITY_ERROR: |
| 4433 | − if (print) | |
| 4519 | + if (print) { | |
| 4434 | 4520 | _print_next_block(par_num++, "DMAE"); |
| 4521 | + _print_parity(bp, | |
| 4522 | + DMAE_REG_DMAE_PRTY_STS); | |
| 4523 | + } | |
| 4435 | 4524 | break; |
| 4436 | 4525 | case AEU_INPUTS_ATTN_BITS_IGU_PARITY_ERROR: |
| 4437 | − if (print) | |
| 4526 | + if (print) { | |
| 4438 | 4527 | _print_next_block(par_num++, "IGU"); |
| 4528 | + if (CHIP_IS_E1x(bp)) | |
| 4529 | + _print_parity(bp, | |
| 4530 | + HC_REG_HC_PRTY_STS); | |
| 4531 | + else | |
| 4532 | + _print_parity(bp, | |
| 4533 | + IGU_REG_IGU_PRTY_STS); | |
| 4534 | + } | |
| 4439 | 4535 | break; |
| 4440 | 4536 | case AEU_INPUTS_ATTN_BITS_MISC_PARITY_ERROR: |
| 4441 | − if (print) | |
| 4537 | + if (print) { | |
| 4442 | 4538 | _print_next_block(par_num++, "MISC"); |
| 4539 | + _print_parity(bp, | |
| 4540 | + MISC_REG_MISC_PRTY_STS); | |
| 4541 | + } | |
| 4443 | 4542 | break; |
| 4444 | 4543 | } |
| 4445 | 4544 | |
| @@ -4493,8 +4592,8 @@ static int bnx2x_check_blocks_with_parity3(u32 sig, int par_num, · 47 unmodified lines | ||
| 4493 | 4592 | return par_num; |
| 4494 | 4593 | } |
| 4495 | 4594 | |
| 4496 | −static int bnx2x_check_blocks_with_parity4(u32 sig, int par_num, | |
| 4497 | − bool print) | |
| 4595 | +static int bnx2x_check_blocks_with_parity4(struct bnx2x *bp, u32 sig, | |
| 4596 | + int par_num, bool print) | |
| 4498 | 4597 | { |
| 4499 | 4598 | int i = 0; |
| 4500 | 4599 | u32 cur_bit = 0; |
| @@ -4503,12 +4602,18 @@ static int bnx2x_check_blocks_with_parity4(u32 sig, int par_num, · 2 unmodified lines | ||
| 4503 | 4602 | if (sig & cur_bit) { |
| 4504 | 4603 | switch (cur_bit) { |
| 4505 | 4604 | case AEU_INPUTS_ATTN_BITS_PGLUE_PARITY_ERROR: |
| 4506 | − if (print) | |
| 4605 | + if (print) { | |
| 4507 | 4606 | _print_next_block(par_num++, "PGLUE_B"); |
| 4607 | + _print_parity(bp, | |
| 4608 | + PGLUE_B_REG_PGLUE_B_PRTY_STS); | |
| 4609 | + } | |
| 4508 | 4610 | break; |
| 4509 | 4611 | case AEU_INPUTS_ATTN_BITS_ATC_PARITY_ERROR: |
| 4510 | − if (print) | |
| 4612 | + if (print) { | |
| 4511 | 4613 | _print_next_block(par_num++, "ATC"); |
| 4614 | + _print_parity(bp, | |
| 4615 | + ATC_REG_ATC_PRTY_STS); | |
| 4616 | + } | |
| 4512 | 4617 | break; |
| 4513 | 4618 | } |
| 4514 | 4619 | |
| @@ -4539,15 +4644,15 @@ static bool bnx2x_parity_attn(struct bnx2x *bp, bool *global, bool print, · 24 unmodified lines | ||
| 4539 | 4644 | if (print) |
| 4540 | 4645 | netdev_err(bp->dev, |
| 4541 | 4646 | "Parity errors detected in blocks: "); |
| 4542 | − par_num = bnx2x_check_blocks_with_parity0( | |
| 4647 | + par_num = bnx2x_check_blocks_with_parity0(bp, | |
| 4543 | 4648 | sig[0] & HW_PRTY_ASSERT_SET_0, par_num, print); |
| 4544 | − par_num = bnx2x_check_blocks_with_parity1( | |
| 4649 | + par_num = bnx2x_check_blocks_with_parity1(bp, | |
| 4545 | 4650 | sig[1] & HW_PRTY_ASSERT_SET_1, par_num, global, print); |
| 4546 | − par_num = bnx2x_check_blocks_with_parity2( | |
| 4651 | + par_num = bnx2x_check_blocks_with_parity2(bp, | |
| 4547 | 4652 | sig[2] & HW_PRTY_ASSERT_SET_2, par_num, print); |
| 4548 | 4653 | par_num = bnx2x_check_blocks_with_parity3( |
| 4549 | 4654 | sig[3] & HW_PRTY_ASSERT_SET_3, par_num, global, print); |
| 4550 | − par_num = bnx2x_check_blocks_with_parity4( | |
| 4655 | + par_num = bnx2x_check_blocks_with_parity4(bp, | |
| 4551 | 4656 | sig[4] & HW_PRTY_ASSERT_SET_4, par_num, print); |
| 4552 | 4657 | |
| 4553 | 4658 | if (print) |
| @@ -4591,7 +4696,6 @@ bool bnx2x_chk_parity_attn(struct bnx2x *bp, bool *global, bool print) · 37 unmodified lines | ||
| 4591 | 4696 | return bnx2x_parity_attn(bp, global, print, attn.sig); |
| 4592 | 4697 | } |
| 4593 | 4698 | |
| 4594 | − | |
| 4595 | 4699 | static void bnx2x_attn_int_deasserted4(struct bnx2x *bp, u32 attn) |
| 4596 | 4700 | { |
| 4597 | 4701 | u32 val; |
| @@ -4643,7 +4747,6 @@ static void bnx2x_attn_int_deasserted4(struct bnx2x *bp, u32 attn) · 45 unmodified lines | ||
| 4643 | 4747 | (u32)(attn & (AEU_INPUTS_ATTN_BITS_PGLUE_PARITY_ERROR | |
| 4644 | 4748 | AEU_INPUTS_ATTN_BITS_ATC_PARITY_ERROR))); |
| 4645 | 4749 | } |
| 4646 | − | |
| 4647 | 4750 | } |
| 4648 | 4751 | |
| 4649 | 4752 | static void bnx2x_attn_int_deasserted(struct bnx2x *bp, u32 deasserted) |
| @@ -4878,7 +4981,6 @@ static void bnx2x_handle_classification_eqe(struct bnx2x *bp, · 228 unmodified lines | ||
| 4878 | 4981 | BNX2X_ERR("Failed to schedule new commands: %d\n", rc); |
| 4879 | 4982 | else if (rc > 0) |
| 4880 | 4983 | DP(BNX2X_MSG_SP, "Scheduled next pending commands...\n"); |
| 4881 | − | |
| 4882 | 4984 | } |
| 4883 | 4985 | |
| 4884 | 4986 | static void bnx2x_set_iscsi_eth_rx_mode(struct bnx2x *bp, bool start); |
| @@ -5009,7 +5111,7 @@ static void bnx2x_eq_int(struct bnx2x *bp) · 124 unmodified lines | ||
| 5009 | 5111 | hw_cons = le16_to_cpu(*bp->eq_cons_sb); |
| 5010 | 5112 | |
| 5011 | 5113 | /* The hw_cos range is 1-255, 257 - the sw_cons range is 0-254, 256. |
| 5012 | − * when we get the the next-page we nned to adjust so the loop | |
| 5114 | + * when we get the next-page we need to adjust so the loop | |
| 5013 | 5115 | * condition below will be met. The next element is the size of a |
| 5014 | 5116 | * regular element and hence incrementing by 1 |
| 5015 | 5117 | */ |
| @@ -5075,8 +5177,6 @@ static void bnx2x_eq_int(struct bnx2x *bp) · 59 unmodified lines | ||
| 5075 | 5177 | if (q_obj->complete_cmd(bp, q_obj, BNX2X_Q_CMD_CFC_DEL)) |
| 5076 | 5178 | break; |
| 5077 | 5179 | |
| 5078 | − | |
| 5079 | − | |
| 5080 | 5180 | goto next_spqe; |
| 5081 | 5181 | |
| 5082 | 5182 | case EVENT_RING_OPCODE_STOP_TRAFFIC: |
| @@ -5218,7 +5318,7 @@ static void bnx2x_sp_task(struct work_struct *work) · 135 unmodified lines | ||
| 5218 | 5318 | |
| 5219 | 5319 | DP(BNX2X_MSG_SP, "sp task invoked\n"); |
| 5220 | 5320 | |
| 5221 | − /* make sure the atomic interupt_occurred has been written */ | |
| 5321 | + /* make sure the atomic interrupt_occurred has been written */ | |
| 5222 | 5322 | smp_rmb(); |
| 5223 | 5323 | if (atomic_read(&bp->interrupt_occurred)) { |
| 5224 | 5324 | |
| @@ -5265,7 +5365,6 @@ static void bnx2x_sp_task(struct work_struct *work) · 40 unmodified lines | ||
| 5265 | 5365 | /* ack status block only if something was actually handled */ |
| 5266 | 5366 | bnx2x_ack_sb(bp, bp->igu_dsb_id, ATTENTION_ID, |
| 5267 | 5367 | le16_to_cpu(bp->def_att_idx), IGU_INT_ENABLE, 1); |
| 5268 | − | |
| 5269 | 5368 | } |
| 5270 | 5369 | |
| 5271 | 5370 | /* must be called after the EQ processing (since eq leads to sriov |
| @@ -5316,7 +5415,6 @@ irqreturn_t bnx2x_msix_sp_int(int irq, void *dev_instance) · 44 unmodified lines | ||
| 5316 | 5415 | |
| 5317 | 5416 | /* end of slow path */ |
| 5318 | 5417 | |
| 5319 | − | |
| 5320 | 5418 | void bnx2x_drv_pulse(struct bnx2x *bp) |
| 5321 | 5419 | { |
| 5322 | 5420 | SHMEM_WR(bp, func_mb[BP_FW_MB_IDX(bp)].drv_pulse_mb, |
| @@ -5360,7 +5458,7 @@ static void bnx2x_timer(unsigned long data) · 37 unmodified lines | ||
| 5360 | 5458 | |
| 5361 | 5459 | /* sample pf vf bulletin board for new posts from pf */ |
| 5362 | 5460 | if (IS_VF(bp)) |
| 5363 | − bnx2x_sample_bulletin(bp); | |
| 5461 | + bnx2x_timer_sriov(bp); | |
| 5364 | 5462 | |
| 5365 | 5463 | mod_timer(&bp->timer, jiffies + bp->current_interval); |
| 5366 | 5464 | } |
| @@ -5382,7 +5480,6 @@ static void bnx2x_fill(struct bnx2x *bp, u32 addr, int fill, u32 len) · 15 unmodified lines | ||
| 5382 | 5480 | else |
| 5383 | 5481 | for (i = 0; i < len; i++) |
| 5384 | 5482 | REG_WR8(bp, addr + i, fill); |
| 5385 | − | |
| 5386 | 5483 | } |
| 5387 | 5484 | |
| 5388 | 5485 | /* helper: writes FP SP data to FW - data_size in dwords */ |
| @@ -5461,10 +5558,8 @@ static void bnx2x_zero_sp_sb(struct bnx2x *bp) · 72 unmodified lines | ||
| 5461 | 5558 | bnx2x_fill(bp, BAR_CSTRORM_INTMEM + |
| 5462 | 5559 | CSTORM_SP_SYNC_BLOCK_OFFSET(func), 0, |
| 5463 | 5560 | CSTORM_SP_SYNC_BLOCK_SIZE); |
| 5464 | − | |
| 5465 | 5561 | } |
| 5466 | 5562 | |
| 5467 | − | |
| 5468 | 5563 | static void bnx2x_setup_ndsb_state_machine(struct hc_status_block_sm *hc_sm, |
| 5469 | 5564 | int igu_sb_id, int igu_seg_id) |
| 5470 | 5565 | { |
| @@ -5474,7 +5569,6 @@ static void bnx2x_setup_ndsb_state_machine(struct hc_status_block_sm *hc_sm, · 3 unmodified lines | ||
| 5474 | 5569 | hc_sm->time_to_expire = 0xFFFFFFFF; |
| 5475 | 5570 | } |
| 5476 | 5571 | |
| 5477 | − | |
| 5478 | 5572 | /* allocates state machine ids. */ |
| 5479 | 5573 | static void bnx2x_map_sb_state_machines(struct hc_index_data *index_data) |
| 5480 | 5574 | { |
| @@ -5700,7 +5794,7 @@ static void bnx2x_init_eq_ring(struct bnx2x *bp) · 219 unmodified lines | ||
| 5700 | 5794 | bp->eq_cons = 0; |
| 5701 | 5795 | bp->eq_prod = NUM_EQ_DESC; |
| 5702 | 5796 | bp->eq_cons_sb = BNX2X_EQ_INDEX; |
| 5703 | − /* we want a warning message before it gets rought... */ | |
| 5797 | + /* we want a warning message before it gets wrought... */ | |
| 5704 | 5798 | atomic_set(&bp->eq_spq_left, |
| 5705 | 5799 | min_t(int, MAX_SP_DESC_CNT - MAX_SPQ_PENDING, NUM_EQ_DESC) - 1); |
| 5706 | 5800 | } |
| @@ -5784,7 +5878,7 @@ static int bnx2x_fill_accept_flags(struct bnx2x *bp, u32 rx_mode, · 77 unmodified lines | ||
| 5784 | 5878 | |
| 5785 | 5879 | break; |
| 5786 | 5880 | case BNX2X_RX_MODE_PROMISC: |
| 5787 | − /* According to deffinition of SI mode, iface in promisc mode | |
| 5881 | + /* According to definition of SI mode, iface in promisc mode | |
| 5788 | 5882 | * should receive matched and unmatched (in resolution of port) |
| 5789 | 5883 | * unicast packets. |
| 5790 | 5884 | */ |
| @@ -5927,7 +6021,7 @@ static void bnx2x_init_eth_fp(struct bnx2x *bp, int fp_idx) · 136 unmodified lines | ||
| 5927 | 6021 | /* init shortcut */ |
| 5928 | 6022 | fp->ustorm_rx_prods_offset = bnx2x_rx_ustorm_prods_offset(fp); |
| 5929 | 6023 | |
| 5930 | − /* Setup SB indicies */ | |
| 6024 | + /* Setup SB indices */ | |
| 5931 | 6025 | fp->rx_cons_sb = BNX2X_RX_SB_INDEX; |
| 5932 | 6026 | |
| 5933 | 6027 | /* Configure Queue State object */ |
| @@ -5983,6 +6077,8 @@ static void bnx2x_init_tx_ring_one(struct bnx2x_fp_txdata *txdata) · 49 unmodified lines | ||
| 5983 | 6077 | BCM_PAGE_SIZE*(i % NUM_TX_RINGS))); |
| 5984 | 6078 | } |
| 5985 | 6079 | |
| 6080 | + *txdata->tx_cons_sb = cpu_to_le16(0); | |
| 6081 | + | |
| 5986 | 6082 | SET_FLAG(txdata->tx_db.data.header.header, DOORBELL_HDR_DB_TYPE, 1); |
| 5987 | 6083 | txdata->tx_db.data.zero_fill1 = 0; |
| 5988 | 6084 | txdata->tx_db.data.prod = 0; |
| @@ -6001,6 +6097,7 @@ static void bnx2x_init_tx_rings_cnic(struct bnx2x *bp) · 12 unmodified lines | ||
| 6001 | 6097 | for_each_tx_queue_cnic(bp, i) |
| 6002 | 6098 | bnx2x_init_tx_ring_one(bp->fp[i].txdata_ptr[0]); |
| 6003 | 6099 | } |
| 6100 | + | |
| 6004 | 6101 | static void bnx2x_init_tx_rings(struct bnx2x *bp) |
| 6005 | 6102 | { |
| 6006 | 6103 | int i; |
| @@ -6043,11 +6140,6 @@ void bnx2x_pre_irq_nic_init(struct bnx2x *bp) · 36 unmodified lines | ||
| 6043 | 6140 | bnx2x_init_rx_rings(bp); |
| 6044 | 6141 | bnx2x_init_tx_rings(bp); |
| 6045 | 6142 | |
| 6046 | − if (IS_VF(bp)) { | |
| 6047 | − bnx2x_memset_stats(bp); | |
| 6048 | − return; | |
| 6049 | − } | |
| 6050 | − | |
| 6051 | 6143 | if (IS_PF(bp)) { |
| 6052 | 6144 | /* Initialize MOD_ABS interrupts */ |
| 6053 | 6145 | bnx2x_init_mod_abs_int(bp, &bp->link_vars, bp->common.chip_id, |
| @@ -6058,6 +6150,8 @@ void bnx2x_pre_irq_nic_init(struct bnx2x *bp) · 4 unmodified lines | ||
| 6058 | 6150 | bnx2x_init_def_sb(bp); |
| 6059 | 6151 | bnx2x_update_dsb_idx(bp); |
| 6060 | 6152 | bnx2x_init_sp_ring(bp); |
| 6153 | + } else { | |
| 6154 | + bnx2x_memset_stats(bp); | |
| 6061 | 6155 | } |
| 6062 | 6156 | } |
| 6063 | 6157 | |
| @@ -6236,7 +6330,7 @@ static int bnx2x_int_mem_test(struct bnx2x *bp) · 172 unmodified lines | ||
| 6236 | 6330 | if (val == 0x10) |
| 6237 | 6331 | break; |
| 6238 | 6332 | |
| 6239 | − msleep(10); | |
| 6333 | + usleep_range(10000, 20000); | |
| 6240 | 6334 | count--; |
| 6241 | 6335 | } |
| 6242 | 6336 | if (val != 0x10) { |
| @@ -6251,7 +6345,7 @@ static int bnx2x_int_mem_test(struct bnx2x *bp) · 8 unmodified lines | ||
| 6251 | 6345 | if (val == 1) |
| 6252 | 6346 | break; |
| 6253 | 6347 | |
| 6254 | − msleep(10); | |
| 6348 | + usleep_range(10000, 20000); | |
| 6255 | 6349 | count--; |
| 6256 | 6350 | } |
| 6257 | 6351 | if (val != 0x1) { |
| @@ -6292,7 +6386,7 @@ static int bnx2x_int_mem_test(struct bnx2x *bp) · 34 unmodified lines | ||
| 6292 | 6386 | if (val == 0xb0) |
| 6293 | 6387 | break; |
| 6294 | 6388 | |
| 6295 | − msleep(10); | |
| 6389 | + usleep_range(10000, 20000); | |
| 6296 | 6390 | count--; |
| 6297 | 6391 | } |
| 6298 | 6392 | if (val != 0xb0) { |
| @@ -6681,7 +6775,7 @@ static int bnx2x_init_hw_common(struct bnx2x *bp) · 382 unmodified lines | ||
| 6681 | 6775 | * stay set) |
| 6682 | 6776 | * f. If this is VNIC 3 of a port then also init |
| 6683 | 6777 | * first_timers_ilt_entry to zero and last_timers_ilt_entry |
| 6684 | − * to the last enrty in the ILT. | |
| 6778 | + * to the last entry in the ILT. | |
| 6685 | 6779 | * |
| 6686 | 6780 | * Notes: |
| 6687 | 6781 | * Currently the PF error in the PGLC is non recoverable. |
| @@ -6772,7 +6866,6 @@ static int bnx2x_init_hw_common(struct bnx2x *bp) · 84 unmodified lines | ||
| 6772 | 6866 | |
| 6773 | 6867 | bnx2x_init_block(bp, BLOCK_QM, PHASE_COMMON); |
| 6774 | 6868 | |
| 6775 | − | |
| 6776 | 6869 | /* QM queues pointers table */ |
| 6777 | 6870 | bnx2x_qm_init_ptr_table(bp, bp->qm_cid_count, INITOP_SET); |
| 6778 | 6871 | |
| @@ -7013,7 +7106,6 @@ static int bnx2x_init_hw_port(struct bnx2x *bp) · 234 unmodified lines | ||
| 7013 | 7106 | u32 low, high; |
| 7014 | 7107 | u32 val; |
| 7015 | 7108 | |
| 7016 | − | |
| 7017 | 7109 | DP(NETIF_MSG_HW, "starting port init port %d\n", port); |
| 7018 | 7110 | |
| 7019 | 7111 | REG_WR(bp, NIG_REG_MASK_INTERRUPT_PORT0 + port*4, 0); |
| @@ -7078,7 +7170,6 @@ static int bnx2x_init_hw_port(struct bnx2x *bp) · 58 unmodified lines | ||
| 7078 | 7170 | BRB1_REG_MAC_GUARANTIED_1 : |
| 7079 | 7171 | BRB1_REG_MAC_GUARANTIED_0), 40); |
| 7080 | 7172 | |
| 7081 | − | |
| 7082 | 7173 | bnx2x_init_block(bp, BLOCK_PRS, init_phase); |
| 7083 | 7174 | if (CHIP_IS_E3B0(bp)) { |
| 7084 | 7175 | if (IS_MF_AFEX(bp)) { |
| @@ -7150,8 +7241,8 @@ static int bnx2x_init_hw_port(struct bnx2x *bp) · 65 unmodified lines | ||
| 7150 | 7241 | |
| 7151 | 7242 | bnx2x_init_block(bp, BLOCK_MISC_AEU, init_phase); |
| 7152 | 7243 | /* init aeu_mask_attn_func_0/1: |
| 7153 | − * - SF mode: bits 3-7 are masked. only bits 0-2 are in use | |
| 7154 | − * - MF mode: bit 3 is masked. bits 0-2 are in use as in SF | |
| 7244 | + * - SF mode: bits 3-7 are masked. Only bits 0-2 are in use | |
| 7245 | + * - MF mode: bit 3 is masked. Bits 0-2 are in use as in SF | |
| 7155 | 7246 | * bits 4-7 are used for "per vn group attention" */ |
| 7156 | 7247 | val = IS_MF(bp) ? 0xF7 : 0x7; |
| 7157 | 7248 | /* Enable DCBX attention for all but E1 */ |
| @@ -7275,7 +7366,6 @@ void bnx2x_igu_clear_sb_gen(struct bnx2x *bp, u8 func, u8 idu_sb_id, bool is_pf) · 117 unmodified lines | ||
| 7275 | 7366 | while (!(REG_RD(bp, igu_addr_ack) & sb_bit) && --cnt) |
| 7276 | 7367 | msleep(20); |
| 7277 | 7368 | |
| 7278 | − | |
| 7279 | 7369 | if (!(REG_RD(bp, igu_addr_ack) & sb_bit)) { |
| 7280 | 7370 | DP(NETIF_MSG_HW, |
| 7281 | 7371 | "Unable to finish IGU cleanup: idu_sb_id %d offset %d bit %d (cnt %d)\n", |
| @@ -7295,7 +7385,6 @@ static void bnx2x_clear_func_ilt(struct bnx2x *bp, u32 func) · 13 unmodified lines | ||
| 7295 | 7385 | bnx2x_ilt_wr(bp, i, 0); |
| 7296 | 7386 | } |
| 7297 | 7387 | |
| 7298 | − | |
| 7299 | 7388 | static void bnx2x_init_searcher(struct bnx2x *bp) |
| 7300 | 7389 | { |
| 7301 | 7390 | int port = BP_PORT(bp); |
| @@ -7331,7 +7420,6 @@ static int bnx2x_reset_nic_mode(struct bnx2x *bp) · 29 unmodified lines | ||
| 7331 | 7420 | int rc, i, port = BP_PORT(bp); |
| 7332 | 7421 | int vlan_en = 0, mac_en[NUM_MACS]; |
| 7333 | 7422 | |
| 7334 | − | |
| 7335 | 7423 | /* Close input from network */ |
| 7336 | 7424 | if (bp->mf_mode == SINGLE_FUNCTION) { |
| 7337 | 7425 | bnx2x_set_rx_filter(&bp->link_params, 0); |
| @@ -7406,7 +7494,7 @@ int bnx2x_init_hw_func_cnic(struct bnx2x *bp) · 68 unmodified lines | ||
| 7406 | 7494 | bnx2x_ilt_init_op_cnic(bp, INITOP_SET); |
| 7407 | 7495 | |
| 7408 | 7496 | if (CONFIGURE_NIC_MODE(bp)) { |
| 7409 | − /* Configrue searcher as part of function hw init */ | |
| 7497 | + /* Configure searcher as part of function hw init */ | |
| 7410 | 7498 | bnx2x_init_searcher(bp); |
| 7411 | 7499 | |
| 7412 | 7500 | /* Reset NIC mode */ |
| @@ -7479,8 +7567,7 @@ static int bnx2x_init_hw_func(struct bnx2x *bp) · 66 unmodified lines | ||
| 7479 | 7567 | } else { |
| 7480 | 7568 | /* Set NIC mode */ |
| 7481 | 7569 | REG_WR(bp, PRS_REG_NIC_MODE, 1); |
| 7482 | − DP(NETIF_MSG_IFUP, "NIC MODE configrued\n"); | |
| 7483 | − | |
| 7570 | + DP(NETIF_MSG_IFUP, "NIC MODE configured\n"); | |
| 7484 | 7571 | } |
| 7485 | 7572 | |
| 7486 | 7573 | if (!CHIP_IS_E1x(bp)) { |
| @@ -7677,7 +7764,7 @@ static int bnx2x_init_hw_func(struct bnx2x *bp) · 190 unmodified lines | ||
| 7677 | 7764 | } |
| 7678 | 7765 | bnx2x_igu_clear_sb(bp, bp->igu_dsb_id); |
| 7679 | 7766 | |
| 7680 | − /* !!! these should become driver const once | |
| 7767 | + /* !!! These should become driver const once | |
| 7681 | 7768 | rf-tool supports split-68 const */ |
| 7682 | 7769 | REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_LSB, 0); |
| 7683 | 7770 | REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_MSB, 0); |
| @@ -7734,7 +7821,6 @@ static int bnx2x_init_hw_func(struct bnx2x *bp) · 50 unmodified lines | ||
| 7734 | 7821 | return 0; |
| 7735 | 7822 | } |
| 7736 | 7823 | |
| 7737 | − | |
| 7738 | 7824 | void bnx2x_free_mem_cnic(struct bnx2x *bp) |
| 7739 | 7825 | { |
| 7740 | 7826 | bnx2x_ilt_mem_op_cnic(bp, ILT_MEMOP_FREE); |
| @@ -7779,7 +7865,6 @@ void bnx2x_free_mem(struct bnx2x *bp) · 38 unmodified lines | ||
| 7779 | 7865 | bnx2x_iov_free_mem(bp); |
| 7780 | 7866 | } |
| 7781 | 7867 | |
| 7782 | − | |
| 7783 | 7868 | int bnx2x_alloc_mem_cnic(struct bnx2x *bp) |
| 7784 | 7869 | { |
| 7785 | 7870 | if (!CHIP_IS_E1x(bp)) |
| @@ -7793,7 +7878,7 @@ int bnx2x_alloc_mem_cnic(struct bnx2x *bp) · 7 unmodified lines | ||
| 7793 | 7878 | host_hc_status_block_e1x)); |
| 7794 | 7879 | |
| 7795 | 7880 | if (CONFIGURE_NIC_MODE(bp) && !bp->t2) |
| 7796 | − /* allocate searcher T2 table, as it wan't allocated before */ | |
| 7881 | + /* allocate searcher T2 table, as it wasn't allocated before */ | |
| 7797 | 7882 | BNX2X_PCI_ALLOC(bp->t2, &bp->t2_mapping, SRC_T2_SZ); |
| 7798 | 7883 | |
| 7799 | 7884 | /* write address to which L5 should insert its values */ |
| @@ -8068,7 +8153,6 @@ void bnx2x_ilt_set_info(struct bnx2x *bp) · 268 unmodified lines | ||
| 8068 | 8153 | ilt_client->page_size, |
| 8069 | 8154 | ilt_client->flags, |
| 8070 | 8155 | ilog2(ilt_client->page_size >> 12)); |
| 8071 | − | |
| 8072 | 8156 | } |
| 8073 | 8157 | |
| 8074 | 8158 | if (CNIC_SUPPORT(bp)) { |
| @@ -8124,7 +8208,6 @@ void bnx2x_ilt_set_info(struct bnx2x *bp) · 49 unmodified lines | ||
| 8124 | 8208 | static void bnx2x_pf_q_prep_init(struct bnx2x *bp, |
| 8125 | 8209 | struct bnx2x_fastpath *fp, struct bnx2x_queue_init_params *init_params) |
| 8126 | 8210 | { |
| 8127 | − | |
| 8128 | 8211 | u8 cos; |
| 8129 | 8212 | int cxt_index, cxt_offset; |
| 8130 | 8213 | |
| @@ -8133,7 +8216,7 @@ static void bnx2x_pf_q_prep_init(struct bnx2x *bp, · 2 unmodified lines | ||
| 8133 | 8216 | __set_bit(BNX2X_Q_FLG_HC, &init_params->rx.flags); |
| 8134 | 8217 | __set_bit(BNX2X_Q_FLG_HC, &init_params->tx.flags); |
| 8135 | 8218 | |
| 8136 | − /* If HC is supporterd, enable host coalescing in the transition | |
| 8219 | + /* If HC is supported, enable host coalescing in the transition | |
| 8137 | 8220 | * to INIT state. |
| 8138 | 8221 | */ |
| 8139 | 8222 | __set_bit(BNX2X_Q_FLG_HC_EN, &init_params->rx.flags); |
| @@ -8205,7 +8288,6 @@ static int bnx2x_setup_tx_only(struct bnx2x *bp, struct bnx2x_fastpath *fp, · 65 unmodified lines | ||
| 8205 | 8288 | return bnx2x_queue_state_change(bp, q_params); |
| 8206 | 8289 | } |
| 8207 | 8290 | |
| 8208 | − | |
| 8209 | 8291 | /** |
| 8210 | 8292 | * bnx2x_setup_queue - setup queue |
| 8211 | 8293 | * |
| @@ -8254,7 +8336,6 @@ int bnx2x_setup_queue(struct bnx2x *bp, struct bnx2x_fastpath *fp, · 42 unmodified lines | ||
| 8254 | 8336 | |
| 8255 | 8337 | DP(NETIF_MSG_IFUP, "init complete\n"); |
| 8256 | 8338 | |
| 8257 | − | |
| 8258 | 8339 | /* Now move the Queue to the SETUP state... */ |
| 8259 | 8340 | memset(setup_params, 0, sizeof(*setup_params)); |
| 8260 | 8341 | |
| @@ -8315,7 +8396,6 @@ static int bnx2x_stop_queue(struct bnx2x *bp, int index) · 54 unmodified lines | ||
| 8315 | 8396 | /* We want to wait for completion in this context */ |
| 8316 | 8397 | __set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags); |
| 8317 | 8398 | |
| 8318 | − | |
| 8319 | 8399 | /* close tx-only connections */ |
| 8320 | 8400 | for (tx_index = FIRST_TX_ONLY_COS_INDEX; |
| 8321 | 8401 | tx_index < fp->max_cos; |
| @@ -8369,7 +8449,6 @@ static int bnx2x_stop_queue(struct bnx2x *bp, int index) · 47 unmodified lines | ||
| 8369 | 8449 | return bnx2x_queue_state_change(bp, &q_params); |
| 8370 | 8450 | } |
| 8371 | 8451 | |
| 8372 | − | |
| 8373 | 8452 | static void bnx2x_reset_func(struct bnx2x *bp) |
| 8374 | 8453 | { |
| 8375 | 8454 | int port = BP_PORT(bp); |
| @@ -8422,7 +8501,7 @@ static void bnx2x_reset_func(struct bnx2x *bp) · 46 unmodified lines | ||
| 8422 | 8501 | * scan to complete |
| 8423 | 8502 | */ |
| 8424 | 8503 | for (i = 0; i < 200; i++) { |
| 8425 | − msleep(10); | |
| 8504 | + usleep_range(10000, 20000); | |
| 8426 | 8505 | if (!REG_RD(bp, TM_REG_LIN0_SCAN_ON + port*4)) |
| 8427 | 8506 | break; |
| 8428 | 8507 | } |
| @@ -8623,14 +8702,14 @@ static int bnx2x_func_wait_started(struct bnx2x *bp) · 194 unmodified lines | ||
| 8623 | 8702 | |
| 8624 | 8703 | /* |
| 8625 | 8704 | * (assumption: No Attention from MCP at this stage) |
| 8626 | − * PMF probably in the middle of TXdisable/enable transaction | |
| 8705 | + * PMF probably in the middle of TX disable/enable transaction | |
| 8627 | 8706 | * 1. Sync IRS for default SB |
| 8628 | − * 2. Sync SP queue - this guarantes us that attention handling started | |
| 8629 | − * 3. Wait, that TXdisable/enable transaction completes | |
| 8707 | + * 2. Sync SP queue - this guarantees us that attention handling started | |
| 8708 | + * 3. Wait, that TX disable/enable transaction completes | |
| 8630 | 8709 | * |
| 8631 | − * 1+2 guranty that if DCBx attention was scheduled it already changed | |
| 8632 | − * pending bit of transaction from STARTED-->TX_STOPPED, if we alredy | |
| 8633 | − * received complettion for the transaction the state is TX_STOPPED. | |
| 8710 | + * 1+2 guarantee that if DCBx attention was scheduled it already changed | |
| 8711 | + * pending bit of transaction from STARTED-->TX_STOPPED, if we already | |
| 8712 | + * received completion for the transaction the state is TX_STOPPED. | |
| 8634 | 8713 | * State will return to STARTED after completion of TX_STOPPED-->STARTED |
| 8635 | 8714 | * transaction. |
| 8636 | 8715 | */ |
| @@ -8660,7 +8739,7 @@ static int bnx2x_func_wait_started(struct bnx2x *bp) · 23 unmodified lines | ||
| 8660 | 8739 | struct bnx2x_func_state_params func_params = {NULL}; |
| 8661 | 8740 | |
| 8662 | 8741 | DP(NETIF_MSG_IFDOWN, |
| 8663 | − "Hmmm... unexpected function state! Forcing STARTED-->TX_ST0PPED-->STARTED\n"); | |
| 8742 | + "Hmmm... Unexpected function state! Forcing STARTED-->TX_ST0PPED-->STARTED\n"); | |
| 8664 | 8743 | |
| 8665 | 8744 | func_params.f_obj = &bp->func_obj; |
| 8666 | 8745 | __set_bit(RAMROD_DRV_CLR_ONLY, |
| @@ -8740,7 +8819,6 @@ void bnx2x_chip_cleanup(struct bnx2x *bp, int unload_mode, bool keep_link) · 73 unmodified lines | ||
| 8740 | 8819 | |
| 8741 | 8820 | bnx2x_iov_chip_cleanup(bp); |
| 8742 | 8821 | |
| 8743 | − | |
| 8744 | 8822 | /* |
| 8745 | 8823 | * Send the UNLOAD_REQUEST to the MCP. This will return if |
| 8746 | 8824 | * this function should perform FUNC, PORT or COMMON HW |
| @@ -8750,7 +8828,7 @@ void bnx2x_chip_cleanup(struct bnx2x *bp, int unload_mode, bool keep_link) · 3 unmodified lines | ||
| 8750 | 8828 | |
| 8751 | 8829 | /* |
| 8752 | 8830 | * (assumption: No Attention from MCP at this stage) |
| 8753 | − * PMF probably in the middle of TXdisable/enable transaction | |
| 8831 | + * PMF probably in the middle of TX disable/enable transaction | |
| 8754 | 8832 | */ |
| 8755 | 8833 | rc = bnx2x_func_wait_started(bp); |
| 8756 | 8834 | if (rc) { |
| @@ -8813,7 +8891,6 @@ unload_error: · 56 unmodified lines | ||
| 8813 | 8891 | if (rc) |
| 8814 | 8892 | BNX2X_ERR("HW_RESET failed\n"); |
| 8815 | 8893 | |
| 8816 | − | |
| 8817 | 8894 | /* Report UNLOAD_DONE to MCP */ |
| 8818 | 8895 | bnx2x_send_unload_done(bp, keep_link); |
| 8819 | 8896 | } |
| @@ -9179,7 +9256,6 @@ static int bnx2x_process_kill(struct bnx2x *bp, bool global) · 359 unmodified lines | ||
| 9179 | 9256 | if (!CHIP_IS_E1x(bp) && bnx2x_er_poll_igu_vq(bp)) |
| 9180 | 9257 | return -EAGAIN; |
| 9181 | 9258 | |
| 9182 | − | |
| 9183 | 9259 | /* TBD: Indicate that "process kill" is in progress to MCP */ |
| 9184 | 9260 | |
| 9185 | 9261 | /* Clear "unprepared" bit */ |
| @@ -9367,7 +9443,7 @@ static void bnx2x_parity_recover(struct bnx2x *bp) · 181 unmodified lines | ||
| 9367 | 9443 | * the first leader that performs a |
| 9368 | 9444 | * leader_reset() reset the global blocks in |
| 9369 | 9445 | * order to clear global attentions. Otherwise |
| 9370 | − * the the gates will remain closed for that | |
| 9446 | + * the gates will remain closed for that | |
| 9371 | 9447 | * engine. |
| 9372 | 9448 | */ |
| 9373 | 9449 | if (load_status || |
| @@ -9480,14 +9556,12 @@ static void bnx2x_sp_rtnl_task(struct work_struct *work) · 106 unmodified lines | ||
| 9480 | 9556 | return; |
| 9481 | 9557 | } |
| 9482 | 9558 | |
| 9483 | − /* if stop on error is defined no recovery flows should be executed */ | |
| 9559 | + if (unlikely(bp->recovery_state != BNX2X_RECOVERY_DONE)) { | |
| 9484 | 9560 | #ifdef BNX2X_STOP_ON_ERROR |
| 9485 | − BNX2X_ERR("recovery flow called but STOP_ON_ERROR defined so reset not done to allow debug dump,\n" | |
| 9486 | − "you will need to reboot when done\n"); | |
| 9487 | − goto sp_rtnl_not_reset; | |
| 9561 | + BNX2X_ERR("recovery flow called but STOP_ON_ERROR defined so reset not done to allow debug dump,\n" | |
| 9562 | + "you will need to reboot when done\n"); | |
| 9563 | + goto sp_rtnl_not_reset; | |
| 9488 | 9564 | #endif |
| 9489 | − | |
| 9490 | − if (unlikely(bp->recovery_state != BNX2X_RECOVERY_DONE)) { | |
| 9491 | 9565 | /* |
| 9492 | 9566 | * Clear all pending SP commands as we are going to reset the |
| 9493 | 9567 | * function anyway. |
| @@ -9502,6 +9576,12 @@ static void bnx2x_sp_rtnl_task(struct work_struct *work) · 8 unmodified lines | ||
| 9502 | 9576 | } |
| 9503 | 9577 | |
| 9504 | 9578 | if (test_and_clear_bit(BNX2X_SP_RTNL_TX_TIMEOUT, &bp->sp_rtnl_state)) { |
| 9579 | +#ifdef BNX2X_STOP_ON_ERROR | |
| 9580 | + BNX2X_ERR("recovery flow called but STOP_ON_ERROR defined so reset not done to allow debug dump,\n" | |
| 9581 | + "you will need to reboot when done\n"); | |
| 9582 | + goto sp_rtnl_not_reset; | |
| 9583 | +#endif | |
| 9584 | + | |
| 9505 | 9585 | /* |
| 9506 | 9586 | * Clear all pending SP commands as we are going to reset the |
| 9507 | 9587 | * function anyway. |
| @@ -9540,6 +9620,13 @@ sp_rtnl_not_reset: · 32 unmodified lines | ||
| 9540 | 9620 | "sending set mcast vf pf channel message from rtnl sp-task\n"); |
| 9541 | 9621 | bnx2x_vfpf_set_mcast(bp->dev); |
| 9542 | 9622 | } |
| 9623 | + if (test_and_clear_bit(BNX2X_SP_RTNL_VFPF_CHANNEL_DOWN, | |
| 9624 | + &bp->sp_rtnl_state)){ | |
| 9625 | + if (!test_bit(__LINK_STATE_NOCARRIER, &bp->dev->state)) { | |
| 9626 | + bnx2x_tx_disable(bp); | |
| 9627 | + BNX2X_ERR("PF indicated channel is not servicable anymore. This means this VF device is no longer operational\n"); | |
| 9628 | + } | |
| 9629 | + } | |
| 9543 | 9630 | |
| 9544 | 9631 | if (test_and_clear_bit(BNX2X_SP_RTNL_VFPF_STORM_RX_MODE, |
| 9545 | 9632 | &bp->sp_rtnl_state)) { |
| @@ -9647,7 +9734,6 @@ static void bnx2x_prev_unload_close_mac(struct bnx2x *bp, · 101 unmodified lines | ||
| 9647 | 9734 | wb_data[0] &= ~BMAC_CONTROL_RX_ENABLE; |
| 9648 | 9735 | REG_WR(bp, vals->bmac_addr, wb_data[0]); |
| 9649 | 9736 | REG_WR(bp, vals->bmac_addr + 0x4, wb_data[1]); |
| 9650 | − | |
| 9651 | 9737 | } |
| 9652 | 9738 | BNX2X_DEV_INFO("Disable emac Rx\n"); |
| 9653 | 9739 | vals->emac_addr = NIG_REG_NIG_EMAC0_EN + BP_PORT(bp)*4; |
| @@ -9681,7 +9767,6 @@ static void bnx2x_prev_unload_close_mac(struct bnx2x *bp, · 27 unmodified lines | ||
| 9681 | 9767 | |
| 9682 | 9768 | if (mac_stopped) |
| 9683 | 9769 | msleep(20); |
| 9684 | − | |
| 9685 | 9770 | } |
| 9686 | 9771 | |
| 9687 | 9772 | #define BNX2X_PREV_UNDI_PROD_ADDR(p) (BAR_TSTRORM_INTMEM + 0x1508 + ((p) << 4)) |
| @@ -9780,6 +9865,21 @@ static bool bnx2x_prev_is_path_marked(struct bnx2x *bp) · 92 unmodified lines | ||
| 9780 | 9865 | return rc; |
| 9781 | 9866 | } |
| 9782 | 9867 | |
| 9868 | +bool bnx2x_port_after_undi(struct bnx2x *bp) | |
| 9869 | +{ | |
| 9870 | + struct bnx2x_prev_path_list *entry; | |
| 9871 | + bool val; | |
| 9872 | + | |
| 9873 | + down(&bnx2x_prev_sem); | |
| 9874 | + | |
| 9875 | + entry = bnx2x_prev_path_get_entry(bp); | |
| 9876 | + val = !!(entry && (entry->undi & (1 << BP_PORT(bp)))); | |
| 9877 | + | |
| 9878 | + up(&bnx2x_prev_sem); | |
| 9879 | + | |
| 9880 | + return val; | |
| 9881 | +} | |
| 9882 | + | |
| 9783 | 9883 | static int bnx2x_prev_mark_path(struct bnx2x *bp, bool after_undi) |
| 9784 | 9884 | { |
| 9785 | 9885 | struct bnx2x_prev_path_list *tmp_list; |
| @@ -9839,7 +9939,6 @@ static int bnx2x_do_flr(struct bnx2x *bp) · 53 unmodified lines | ||
| 9839 | 9939 | u16 status; |
| 9840 | 9940 | struct pci_dev *dev = bp->pdev; |
| 9841 | 9941 | |
| 9842 | − | |
| 9843 | 9942 | if (CHIP_IS_E1x(bp)) { |
| 9844 | 9943 | BNX2X_DEV_INFO("FLR not supported in E1/E1H\n"); |
| 9845 | 9944 | return -EINVAL; |
| @@ -9986,7 +10085,6 @@ static int bnx2x_prev_unload_common(struct bnx2x *bp) · 140 unmodified lines | ||
| 9986 | 10085 | |
| 9987 | 10086 | if (!timer_count) |
| 9988 | 10087 | BNX2X_ERR("Failed to empty BRB, hope for the best\n"); |
| 9989 | − | |
| 9990 | 10088 | } |
| 9991 | 10089 | |
| 9992 | 10090 | /* No packets are in the pipeline, path is ready for reset */ |
| @@ -10036,7 +10134,6 @@ static int bnx2x_prev_unload(struct bnx2x *bp) · 43 unmodified lines | ||
| 10036 | 10134 | { |
| 10037 | 10135 | int time_counter = 10; |
| 10038 | 10136 | u32 rc, fw, hw_lock_reg, hw_lock_val; |
| 10039 | − struct bnx2x_prev_path_list *prev_list; | |
| 10040 | 10137 | BNX2X_DEV_INFO("Entering Previous Unload Flow\n"); |
| 10041 | 10138 | |
| 10042 | 10139 | /* clear hw from errors which may have resulted from an interrupted |
| @@ -10049,7 +10146,7 @@ static int bnx2x_prev_unload(struct bnx2x *bp) · 6 unmodified lines | ||
| 10049 | 10146 | (MISC_REG_DRIVER_CONTROL_1 + BP_FUNC(bp) * 8) : |
| 10050 | 10147 | (MISC_REG_DRIVER_CONTROL_7 + (BP_FUNC(bp) - 6) * 8); |
| 10051 | 10148 | |
| 10052 | − hw_lock_val = (REG_RD(bp, hw_lock_reg)); | |
| 10149 | + hw_lock_val = REG_RD(bp, hw_lock_reg); | |
| 10053 | 10150 | if (hw_lock_val) { |
| 10054 | 10151 | if (hw_lock_val & HW_LOCK_RESOURCE_NVRAM) { |
| 10055 | 10152 | BNX2X_DEV_INFO("Release Previously held NVRAM lock\n"); |
| @@ -10064,7 +10161,7 @@ static int bnx2x_prev_unload(struct bnx2x *bp) · 8 unmodified lines | ||
| 10064 | 10161 | |
| 10065 | 10162 | if (MCPR_ACCESS_LOCK_LOCK & REG_RD(bp, MCP_REG_MCPR_ACCESS_LOCK)) { |
| 10066 | 10163 | BNX2X_DEV_INFO("Release previously held alr\n"); |
| 10067 | − REG_WR(bp, MCP_REG_MCPR_ACCESS_LOCK, 0); | |
| 10164 | + bnx2x_release_alr(bp); | |
| 10068 | 10165 | } |
| 10069 | 10166 | |
| 10070 | 10167 | do { |
| @@ -10093,7 +10190,7 @@ static int bnx2x_prev_unload(struct bnx2x *bp) · 22 unmodified lines | ||
| 10093 | 10190 | break; |
| 10094 | 10191 | } |
| 10095 | 10192 | |
| 10096 | − /* non-common reply from MCP night require looping */ | |
| 10193 | + /* non-common reply from MCP might require looping */ | |
| 10097 | 10194 | rc = bnx2x_prev_unload_uncommon(bp); |
| 10098 | 10195 | if (rc != BNX2X_PREV_WAIT_NEEDED) |
| 10099 | 10196 | break; |
| @@ -10107,8 +10204,7 @@ static int bnx2x_prev_unload(struct bnx2x *bp) · 7 unmodified lines | ||
| 10107 | 10204 | } |
| 10108 | 10205 | |
| 10109 | 10206 | /* Mark function if its port was used to boot from SAN */ |
| 10110 | − prev_list = bnx2x_prev_path_get_entry(bp); | |
| 10111 | − if (prev_list && (prev_list->undi & (1 << BP_PORT(bp)))) | |
| 10207 | + if (bnx2x_port_after_undi(bp)) | |
| 10112 | 10208 | bp->link_params.feature_config_flags |= |
| 10113 | 10209 | FEATURE_CONFIG_BOOT_FROM_SAN; |
| 10114 | 10210 | |
| @@ -10192,8 +10288,6 @@ static void bnx2x_get_common_hwinfo(struct bnx2x *bp) · 77 unmodified lines | ||
| 10192 | 10288 | |
| 10193 | 10289 | bnx2x_init_shmem(bp); |
| 10194 | 10290 | |
| 10195 | − | |
| 10196 | − | |
| 10197 | 10291 | bp->common.shmem2_base = REG_RD(bp, (BP_PATH(bp) ? |
| 10198 | 10292 | MISC_REG_GENERIC_CR_1 : |
| 10199 | 10293 | MISC_REG_GENERIC_CR_0)); |
| @@ -10455,6 +10549,9 @@ static void bnx2x_link_settings_supported(struct bnx2x *bp, u32 switch_cfg) · 255 unmodified lines | ||
| 10455 | 10549 | PORT_HW_CFG_SPEED_CAPABILITY_D0_10G)) |
| 10456 | 10550 | bp->port.supported[idx] &= ~SUPPORTED_10000baseT_Full; |
| 10457 | 10551 | |
| 10552 | + if (!(bp->link_params.speed_cap_mask[idx] & | |
| 10553 | + PORT_HW_CFG_SPEED_CAPABILITY_D0_20G)) | |
| 10554 | + bp->port.supported[idx] &= ~SUPPORTED_20000baseKR2_Full; | |
| 10458 | 10555 | } |
| 10459 | 10556 | |
| 10460 | 10557 | BNX2X_DEV_INFO("supported 0x%x 0x%x\n", bp->port.supported[0], |
| @@ -10765,7 +10862,6 @@ void bnx2x_get_iscsi_info(struct bnx2x *bp) · 304 unmodified lines | ||
| 10765 | 10862 | */ |
| 10766 | 10863 | if (!bp->cnic_eth_dev.max_iscsi_conn) |
| 10767 | 10864 | bp->flags |= no_flags; |
| 10768 | − | |
| 10769 | 10865 | } |
| 10770 | 10866 | |
| 10771 | 10867 | static void bnx2x_get_ext_wwn_info(struct bnx2x *bp, int func) |
| @@ -10782,12 +10878,56 @@ static void bnx2x_get_ext_wwn_info(struct bnx2x *bp, int func) · 10 unmodified lines | ||
| 10782 | 10878 | bp->cnic_eth_dev.fcoe_wwn_node_name_lo = |
| 10783 | 10879 | MF_CFG_RD(bp, func_ext_config[func].fcoe_wwn_node_name_lower); |
| 10784 | 10880 | } |
| 10881 | + | |
| 10882 | +static int bnx2x_shared_fcoe_funcs(struct bnx2x *bp) | |
| 10883 | +{ | |
| 10884 | + u8 count = 0; | |
| 10885 | + | |
| 10886 | + if (IS_MF(bp)) { | |
| 10887 | + u8 fid; | |
| 10888 | + | |
| 10889 | + /* iterate over absolute function ids for this path: */ | |
| 10890 | + for (fid = BP_PATH(bp); fid < E2_FUNC_MAX * 2; fid += 2) { | |
| 10891 | + if (IS_MF_SD(bp)) { | |
| 10892 | + u32 cfg = MF_CFG_RD(bp, | |
| 10893 | + func_mf_config[fid].config); | |
| 10894 | + | |
| 10895 | + if (!(cfg & FUNC_MF_CFG_FUNC_HIDE) && | |
| 10896 | + ((cfg & FUNC_MF_CFG_PROTOCOL_MASK) == | |
| 10897 | + FUNC_MF_CFG_PROTOCOL_FCOE)) | |
| 10898 | + count++; | |
| 10899 | + } else { | |
| 10900 | + u32 cfg = MF_CFG_RD(bp, | |
| 10901 | + func_ext_config[fid]. | |
| 10902 | + func_cfg); | |
| 10903 | + | |
| 10904 | + if ((cfg & MACP_FUNC_CFG_FLAGS_ENABLED) && | |
| 10905 | + (cfg & MACP_FUNC_CFG_FLAGS_FCOE_OFFLOAD)) | |
| 10906 | + count++; | |
| 10907 | + } | |
| 10908 | + } | |
| 10909 | + } else { /* SF */ | |
| 10910 | + int port, port_cnt = CHIP_MODE_IS_4_PORT(bp) ? 2 : 1; | |
| 10911 | + | |
| 10912 | + for (port = 0; port < port_cnt; port++) { | |
| 10913 | + u32 lic = SHMEM_RD(bp, | |
| 10914 | + drv_lic_key[port].max_fcoe_conn) ^ | |
| 10915 | + FW_ENCODE_32BIT_PATTERN; | |
| 10916 | + if (lic) | |
| 10917 | + count++; | |
| 10918 | + } | |
| 10919 | + } | |
| 10920 | + | |
| 10921 | + return count; | |
| 10922 | +} | |
| 10923 | + | |
| 10785 | 10924 | static void bnx2x_get_fcoe_info(struct bnx2x *bp) |
| 10786 | 10925 | { |
| 10787 | 10926 | int port = BP_PORT(bp); |
| 10788 | 10927 | int func = BP_ABS_FUNC(bp); |
| 10789 | 10928 | u32 max_fcoe_conn = FW_ENCODE_32BIT_PATTERN ^ SHMEM_RD(bp, |
| 10790 | 10929 | drv_lic_key[port].max_fcoe_conn); |
| 10930 | + u8 num_fcoe_func = bnx2x_shared_fcoe_funcs(bp); | |
| 10791 | 10931 | |
| 10792 | 10932 | if (!CNIC_SUPPORT(bp)) { |
| 10793 | 10933 | bp->flags |= NO_FCOE_FLAG; |
| @@ -10801,9 +10941,10 @@ static void bnx2x_get_fcoe_info(struct bnx2x *bp) · 7 unmodified lines | ||
| 10801 | 10941 | |
| 10802 | 10942 | /* Calculate the number of maximum allowed FCoE tasks */ |
| 10803 | 10943 | bp->cnic_eth_dev.max_fcoe_exchanges = MAX_NUM_FCOE_TASKS_PER_ENGINE; |
| 10804 | − if (IS_MF(bp) || CHIP_MODE_IS_4_PORT(bp)) | |
| 10805 | − bp->cnic_eth_dev.max_fcoe_exchanges /= | |
| 10806 | − MAX_FCOE_FUNCS_PER_ENGINE; | |
| 10944 | + | |
| 10945 | + /* check if FCoE resources must be shared between different functions */ | |
| 10946 | + if (num_fcoe_func) | |
| 10947 | + bp->cnic_eth_dev.max_fcoe_exchanges /= num_fcoe_func; | |
| 10807 | 10948 | |
| 10808 | 10949 | /* Read the WWN: */ |
| 10809 | 10950 | if (!IS_MF(bp)) { |
| @@ -11031,7 +11172,7 @@ static int bnx2x_get_hwinfo(struct bnx2x *bp) · 221 unmodified lines | ||
| 11031 | 11172 | } else { |
| 11032 | 11173 | bp->common.int_block = INT_BLOCK_IGU; |
| 11033 | 11174 | |
| 11034 | − /* do not allow device reset during IGU info preocessing */ | |
| 11175 | + /* do not allow device reset during IGU info processing */ | |
| 11035 | 11176 | bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_RESET); |
| 11036 | 11177 | |
| 11037 | 11178 | val = REG_RD(bp, IGU_REG_BLOCK_CONFIGURATION); |
| @@ -11110,7 +11251,7 @@ static int bnx2x_get_hwinfo(struct bnx2x *bp) · 72 unmodified lines | ||
| 11110 | 11251 | E1H_FUNC_MAX * sizeof(struct drv_func_mb); |
| 11111 | 11252 | /* |
| 11112 | 11253 | * get mf configuration: |
| 11113 | − * 1. existence of MF configuration | |
| 11254 | + * 1. Existence of MF configuration | |
| 11114 | 11255 | * 2. MAC address must be legal (check only upper bytes) |
| 11115 | 11256 | * for Switch-Independent mode; |
| 11116 | 11257 | * OVLAN must be legal for Switch-Dependent mode |
| @@ -11384,7 +11525,6 @@ static int bnx2x_init_bp(struct bnx2x *bp) · 267 unmodified lines | ||
| 11384 | 11525 | mutex_init(&bp->fw_mb_mutex); |
| 11385 | 11526 | spin_lock_init(&bp->stats_lock); |
| 11386 | 11527 | |
| 11387 | − | |
| 11388 | 11528 | INIT_DELAYED_WORK(&bp->sp_task, bnx2x_sp_task); |
| 11389 | 11529 | INIT_DELAYED_WORK(&bp->sp_rtnl_task, bnx2x_sp_rtnl_task); |
| 11390 | 11530 | INIT_DELAYED_WORK(&bp->period_task, bnx2x_period_task); |
| @@ -11393,7 +11533,7 @@ static int bnx2x_init_bp(struct bnx2x *bp) · 2 unmodified lines | ||
| 11393 | 11533 | if (rc) |
| 11394 | 11534 | return rc; |
| 11395 | 11535 | } else { |
| 11396 | − random_ether_addr(bp->dev->dev_addr); | |
| 11536 | + eth_zero_addr(bp->dev->dev_addr); | |
| 11397 | 11537 | } |
| 11398 | 11538 | |
| 11399 | 11539 | bnx2x_set_modes_bitmap(bp); |
| @@ -11417,7 +11557,6 @@ static int bnx2x_init_bp(struct bnx2x *bp) · 17 unmodified lines | ||
| 11417 | 11557 | bnx2x_prev_unload(bp); |
| 11418 | 11558 | } |
| 11419 | 11559 | |
| 11420 | − | |
| 11421 | 11560 | if (CHIP_REV_IS_FPGA(bp)) |
| 11422 | 11561 | dev_err(&bp->pdev->dev, "FPGA detected\n"); |
| 11423 | 11562 | |
| @@ -11489,7 +11628,7 @@ static int bnx2x_init_bp(struct bnx2x *bp) · 65 unmodified lines | ||
| 11489 | 11628 | |
| 11490 | 11629 | /* We need at least one default status block for slow-path events, |
| 11491 | 11630 | * second status block for the L2 queue, and a third status block for |
| 11492 | − * CNIC if supproted. | |
| 11631 | + * CNIC if supported. | |
| 11493 | 11632 | */ |
| 11494 | 11633 | if (CNIC_SUPPORT(bp)) |
| 11495 | 11634 | bp->min_msix_vec_cnt = 3; |
| @@ -11497,10 +11636,11 @@ static int bnx2x_init_bp(struct bnx2x *bp) · 1 unmodified line | ||
| 11497 | 11636 | bp->min_msix_vec_cnt = 2; |
| 11498 | 11637 | BNX2X_DEV_INFO("bp->min_msix_vec_cnt %d", bp->min_msix_vec_cnt); |
| 11499 | 11638 | |
| 11639 | + bp->dump_preset_idx = 1; | |
| 11640 | + | |
| 11500 | 11641 | return rc; |
| 11501 | 11642 | } |
| 11502 | 11643 | |
| 11503 | − | |
| 11504 | 11644 | /**************************************************************************** |
| 11505 | 11645 | * General service functions |
| 11506 | 11646 | ****************************************************************************/ |
| @@ -11585,9 +11725,6 @@ static int bnx2x_close(struct net_device *dev) · 78 unmodified lines | ||
| 11585 | 11725 | /* Unload the driver, release IRQs */ |
| 11586 | 11726 | bnx2x_nic_unload(bp, UNLOAD_CLOSE, false); |
| 11587 | 11727 | |
| 11588 | − /* Power off */ | |
| 11589 | − bnx2x_set_power_state(bp, PCI_D3hot); | |
| 11590 | − | |
| 11591 | 11728 | return 0; |
| 11592 | 11729 | } |
| 11593 | 11730 | |
| @@ -11852,6 +11989,10 @@ static int bnx2x_validate_addr(struct net_device *dev) · 258 unmodified lines | ||
| 11852 | 11989 | { |
| 11853 | 11990 | struct bnx2x *bp = netdev_priv(dev); |
| 11854 | 11991 | |
| 11992 | + /* query the bulletin board for mac address configured by the PF */ | |
| 11993 | + if (IS_VF(bp)) | |
| 11994 | + bnx2x_sample_bulletin(bp); | |
| 11995 | + | |
| 11855 | 11996 | if (!bnx2x_is_valid_ether_addr(bp, dev->dev_addr)) { |
| 11856 | 11997 | BNX2X_ERR("Non-valid Ethernet address\n"); |
| 11857 | 11998 | return -EADDRNOTAVAIL; |
| @@ -11878,12 +12019,16 @@ static const struct net_device_ops bnx2x_netdev_ops = { · 20 unmodified lines | ||
| 11878 | 12019 | .ndo_setup_tc = bnx2x_setup_tc, |
| 11879 | 12020 | #ifdef CONFIG_BNX2X_SRIOV |
| 11880 | 12021 | .ndo_set_vf_mac = bnx2x_set_vf_mac, |
| 11881 | − .ndo_set_vf_vlan = bnx2x_set_vf_vlan, | |
| 12022 | + .ndo_set_vf_vlan = bnx2x_set_vf_vlan, | |
| 11882 | 12023 | .ndo_get_vf_config = bnx2x_get_vf_config, |
| 11883 | 12024 | #endif |
| 11884 | 12025 | #ifdef NETDEV_FCOE_WWNN |
| 11885 | 12026 | .ndo_fcoe_get_wwn = bnx2x_fcoe_get_wwn, |
| 11886 | 12027 | #endif |
| 12028 | + | |
| 12029 | +#ifdef CONFIG_NET_LL_RX_POLL | |
| 12030 | + .ndo_ll_poll = bnx2x_low_latency_recv, | |
| 12031 | +#endif | |
| 11887 | 12032 | }; |
| 11888 | 12033 | |
| 11889 | 12034 | static int bnx2x_set_coherency_mask(struct bnx2x *bp) |
| @@ -11959,7 +12104,7 @@ static int bnx2x_init_dev(struct bnx2x *bp, struct pci_dev *pdev, · 69 unmodified lines | ||
| 11959 | 12104 | } |
| 11960 | 12105 | |
| 11961 | 12106 | if (IS_PF(bp)) { |
| 11962 | − bp->pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM); | |
| 12107 | + bp->pm_cap = pdev->pm_cap; | |
| 11963 | 12108 | if (bp->pm_cap == 0) { |
| 11964 | 12109 | dev_err(&bp->pdev->dev, |
| 11965 | 12110 | "Cannot find power management capability, aborting\n"); |
| @@ -12008,8 +12153,6 @@ static int bnx2x_init_dev(struct bnx2x *bp, struct pci_dev *pdev, · 42 unmodified lines | ||
| 12008 | 12153 | } |
| 12009 | 12154 | BNX2X_DEV_INFO("me reg PF num: %d\n", bp->pf_num); |
| 12010 | 12155 | |
| 12011 | − bnx2x_set_power_state(bp, PCI_D0); | |
| 12012 | − | |
| 12013 | 12156 | /* clean indirect addresses */ |
| 12014 | 12157 | pci_write_config_dword(bp->pdev, PCICFG_GRC_ADDRESS, |
| 12015 | 12158 | PCICFG_VENDOR_ID_OFFSET); |
| @@ -12094,15 +12237,26 @@ err_out: · 78 unmodified lines | ||
| 12094 | 12237 | return rc; |
| 12095 | 12238 | } |
| 12096 | 12239 | |
| 12097 | −static void bnx2x_get_pcie_width_speed(struct bnx2x *bp, int *width, int *speed) | |
| 12240 | +static void bnx2x_get_pcie_width_speed(struct bnx2x *bp, int *width, | |
| 12241 | + enum bnx2x_pci_bus_speed *speed) | |
| 12098 | 12242 | { |
| 12099 | − u32 val = 0; | |
| 12243 | + u32 link_speed, val = 0; | |
| 12100 | 12244 | |
| 12101 | 12245 | pci_read_config_dword(bp->pdev, PCICFG_LINK_CONTROL, &val); |
| 12102 | 12246 | *width = (val & PCICFG_LINK_WIDTH) >> PCICFG_LINK_WIDTH_SHIFT; |
| 12103 | 12247 | |
| 12104 | − /* return value of 1=2.5GHz 2=5GHz */ | |
| 12105 | − *speed = (val & PCICFG_LINK_SPEED) >> PCICFG_LINK_SPEED_SHIFT; | |
| 12248 | + link_speed = (val & PCICFG_LINK_SPEED) >> PCICFG_LINK_SPEED_SHIFT; | |
| 12249 | + | |
| 12250 | + switch (link_speed) { | |
| 12251 | + case 3: | |
| 12252 | + *speed = BNX2X_PCI_LINK_SPEED_8000; | |
| 12253 | + break; | |
| 12254 | + case 2: | |
| 12255 | + *speed = BNX2X_PCI_LINK_SPEED_5000; | |
| 12256 | + break; | |
| 12257 | + default: | |
| 12258 | + *speed = BNX2X_PCI_LINK_SPEED_2500; | |
| 12259 | + } | |
| 12106 | 12260 | } |
| 12107 | 12261 | |
| 12108 | 12262 | static int bnx2x_check_firmware(struct bnx2x *bp) |
| @@ -12327,7 +12481,6 @@ static void bnx2x_release_firmware(struct bnx2x *bp) · 218 unmodified lines | ||
| 12327 | 12481 | bp->firmware = NULL; |
| 12328 | 12482 | } |
| 12329 | 12483 | |
| 12330 | − | |
| 12331 | 12484 | static struct bnx2x_func_sp_drv_ops bnx2x_func_sp_drv = { |
| 12332 | 12485 | .init_hw_cmn_chip = bnx2x_init_hw_common_chip, |
| 12333 | 12486 | .init_hw_cmn = bnx2x_init_hw_common, |
| @@ -12465,7 +12618,8 @@ static int bnx2x_init_one(struct pci_dev *pdev, · 131 unmodified lines | ||
| 12465 | 12618 | { |
| 12466 | 12619 | struct net_device *dev = NULL; |
| 12467 | 12620 | struct bnx2x *bp; |
| 12468 | − int pcie_width, pcie_speed; | |
| 12621 | + int pcie_width; | |
| 12622 | + enum bnx2x_pci_bus_speed pcie_speed; | |
| 12469 | 12623 | int rc, max_non_def_sbs; |
| 12470 | 12624 | int rx_count, tx_count, rss_count, doorbell_size; |
| 12471 | 12625 | int max_cos_est; |
| @@ -12605,7 +12759,6 @@ static int bnx2x_init_one(struct pci_dev *pdev, · 133 unmodified lines | ||
| 12605 | 12759 | } |
| 12606 | 12760 | BNX2X_DEV_INFO("device name after netdev register %s\n", dev->name); |
| 12607 | 12761 | |
| 12608 | − | |
| 12609 | 12762 | if (!NO_FCOE(bp)) { |
| 12610 | 12763 | /* Add storage MAC address */ |
| 12611 | 12764 | rtnl_lock(); |
| @@ -12617,15 +12770,15 @@ static int bnx2x_init_one(struct pci_dev *pdev, · 5 unmodified lines | ||
| 12617 | 12770 | BNX2X_DEV_INFO("got pcie width %d and speed %d\n", |
| 12618 | 12771 | pcie_width, pcie_speed); |
| 12619 | 12772 | |
| 12620 | − BNX2X_DEV_INFO( | |
| 12621 | − "%s (%c%d) PCI-E x%d %s found at mem %lx, IRQ %d, node addr %pM\n", | |
| 12622 | − board_info[ent->driver_data].name, | |
| 12623 | − (CHIP_REV(bp) >> 12) + 'A', (CHIP_METAL(bp) >> 4), | |
| 12624 | − pcie_width, | |
| 12625 | − ((!CHIP_IS_E2(bp) && pcie_speed == 2) || | |
| 12626 | − (CHIP_IS_E2(bp) && pcie_speed == 1)) ? | |
| 12627 | − "5GHz (Gen2)" : "2.5GHz", | |
| 12628 | − dev->base_addr, bp->pdev->irq, dev->dev_addr); | |
| 12773 | + BNX2X_DEV_INFO("%s (%c%d) PCI-E x%d %s found at mem %lx, IRQ %d, node addr %pM\n", | |
| 12774 | + board_info[ent->driver_data].name, | |
| 12775 | + (CHIP_REV(bp) >> 12) + 'A', (CHIP_METAL(bp) >> 4), | |
| 12776 | + pcie_width, | |
| 12777 | + pcie_speed == BNX2X_PCI_LINK_SPEED_2500 ? "2.5GHz" : | |
| 12778 | + pcie_speed == BNX2X_PCI_LINK_SPEED_5000 ? "5.0GHz" : | |
| 12779 | + pcie_speed == BNX2X_PCI_LINK_SPEED_8000 ? "8.0GHz" : | |
| 12780 | + "Unknown", | |
| 12781 | + dev->base_addr, bp->pdev->irq, dev->dev_addr); | |
| 12629 | 12782 | |
| 12630 | 12783 | return 0; |
| 12631 | 12784 | |
| @@ -12647,17 +12800,11 @@ init_one_exit: · 15 unmodified lines | ||
| 12647 | 12800 | return rc; |
| 12648 | 12801 | } |
| 12649 | 12802 | |
| 12650 | −static void bnx2x_remove_one(struct pci_dev *pdev) | |
| 12803 | +static void __bnx2x_remove(struct pci_dev *pdev, | |
| 12804 | + struct net_device *dev, | |
| 12805 | + struct bnx2x *bp, | |
| 12806 | + bool remove_netdev) | |
| 12651 | 12807 | { |
| 12652 | − struct net_device *dev = pci_get_drvdata(pdev); | |
| 12653 | − struct bnx2x *bp; | |
| 12654 | − | |
| 12655 | − if (!dev) { | |
| 12656 | − dev_err(&pdev->dev, "BAD net device from bnx2x_init_one\n"); | |
| 12657 | − return; | |
| 12658 | − } | |
| 12659 | − bp = netdev_priv(dev); | |
| 12660 | − | |
| 12661 | 12808 | /* Delete storage MAC address */ |
| 12662 | 12809 | if (!NO_FCOE(bp)) { |
| 12663 | 12810 | rtnl_lock(); |
| @@ -12670,7 +12817,17 @@ static void bnx2x_remove_one(struct pci_dev *pdev) · 6 unmodified lines | ||
| 12670 | 12817 | bnx2x_dcbnl_update_applist(bp, true); |
| 12671 | 12818 | #endif |
| 12672 | 12819 | |
| 12673 | − unregister_netdev(dev); | |
| 12820 | + /* Close the interface - either directly or implicitly */ | |
| 12821 | + if (remove_netdev) { | |
| 12822 | + unregister_netdev(dev); | |
| 12823 | + } else { | |
| 12824 | + rtnl_lock(); | |
| 12825 | + if (netif_running(dev)) | |
| 12826 | + bnx2x_close(dev); | |
| 12827 | + rtnl_unlock(); | |
| 12828 | + } | |
| 12829 | + | |
| 12830 | + bnx2x_iov_remove_one(bp); | |
| 12674 | 12831 | |
| 12675 | 12832 | /* Power on: we can't let PCI layer write to us while we are in D3 */ |
| 12676 | 12833 | if (IS_PF(bp)) |
| @@ -12686,12 +12843,16 @@ static void bnx2x_remove_one(struct pci_dev *pdev) · 9 unmodified lines | ||
| 12686 | 12843 | /* Make sure RESET task is not scheduled before continuing */ |
| 12687 | 12844 | cancel_delayed_work_sync(&bp->sp_rtnl_task); |
| 12688 | 12845 | |
| 12689 | − bnx2x_iov_remove_one(bp); | |
| 12690 | − | |
| 12691 | 12846 | /* send message via vfpf channel to release the resources of this vf */ |
| 12692 | 12847 | if (IS_VF(bp)) |
| 12693 | 12848 | bnx2x_vfpf_release(bp); |
| 12694 | 12849 | |
| 12850 | + /* Assumes no further PCIe PM changes will occur */ | |
| 12851 | + if (system_state == SYSTEM_POWER_OFF) { | |
| 12852 | + pci_wake_from_d3(pdev, bp->wol); | |
| 12853 | + pci_set_power_state(pdev, PCI_D3hot); | |
| 12854 | + } | |
| 12855 | + | |
| 12695 | 12856 | if (bp->regview) |
| 12696 | 12857 | iounmap(bp->regview); |
| 12697 | 12858 | |
| @@ -12706,7 +12867,8 @@ static void bnx2x_remove_one(struct pci_dev *pdev) · 8 unmodified lines | ||
| 12706 | 12867 | } |
| 12707 | 12868 | bnx2x_free_mem_bp(bp); |
| 12708 | 12869 | |
| 12709 | − free_netdev(dev); | |
| 12870 | + if (remove_netdev) | |
| 12871 | + free_netdev(dev); | |
| 12710 | 12872 | |
| 12711 | 12873 | if (atomic_read(&pdev->enable_cnt) == 1) |
| 12712 | 12874 | pci_release_regions(pdev); |
| @@ -12715,6 +12877,20 @@ static void bnx2x_remove_one(struct pci_dev *pdev) · 2 unmodified lines | ||
| 12715 | 12877 | pci_set_drvdata(pdev, NULL); |
| 12716 | 12878 | } |
| 12717 | 12879 | |
| 12880 | +static void bnx2x_remove_one(struct pci_dev *pdev) | |
| 12881 | +{ | |
| 12882 | + struct net_device *dev = pci_get_drvdata(pdev); | |
| 12883 | + struct bnx2x *bp; | |
| 12884 | + | |
| 12885 | + if (!dev) { | |
| 12886 | + dev_err(&pdev->dev, "BAD net device from bnx2x_init_one\n"); | |
| 12887 | + return; | |
| 12888 | + } | |
| 12889 | + bp = netdev_priv(dev); | |
| 12890 | + | |
| 12891 | + __bnx2x_remove(pdev, dev, bp, true); | |
| 12892 | +} | |
| 12893 | + | |
| 12718 | 12894 | static int bnx2x_eeh_nic_unload(struct bnx2x *bp) |
| 12719 | 12895 | { |
| 12720 | 12896 | bp->state = BNX2X_STATE_CLOSING_WAIT4_HALT; |
| @@ -12747,19 +12923,6 @@ static int bnx2x_eeh_nic_unload(struct bnx2x *bp) · 26 unmodified lines | ||
| 12747 | 12923 | return 0; |
| 12748 | 12924 | } |
| 12749 | 12925 | |
| 12750 | −static void bnx2x_eeh_recover(struct bnx2x *bp) | |
| 12751 | −{ | |
| 12752 | − u32 val; | |
| 12753 | − | |
| 12754 | − mutex_init(&bp->port.phy_mutex); | |
| 12755 | − | |
| 12756 | − | |
| 12757 | − val = SHMEM_RD(bp, validity_map[BP_PORT(bp)]); | |
| 12758 | − if ((val & (SHR_MEM_VALIDITY_DEV_INFO | SHR_MEM_VALIDITY_MB)) | |
| 12759 | − != (SHR_MEM_VALIDITY_DEV_INFO | SHR_MEM_VALIDITY_MB)) | |
| 12760 | − BNX2X_ERR("BAD MCP validity signature\n"); | |
| 12761 | −} | |
| 12762 | − | |
| 12763 | 12926 | /** |
| 12764 | 12927 | * bnx2x_io_error_detected - called when PCI error is detected |
| 12765 | 12928 | * @pdev: Pointer to PCI device |
| @@ -12828,6 +12991,10 @@ static pci_ers_result_t bnx2x_io_slot_reset(struct pci_dev *pdev) · 62 unmodified lines | ||
| 12828 | 12991 | |
| 12829 | 12992 | if (netif_running(dev)) { |
| 12830 | 12993 | BNX2X_ERR("IO slot reset --> driver unload\n"); |
| 12994 | + | |
| 12995 | + /* MCP should have been reset; Need to wait for validity */ | |
| 12996 | + bnx2x_init_shmem(bp); | |
| 12997 | + | |
| 12831 | 12998 | if (IS_PF(bp) && SHMEM2_HAS(bp, drv_capabilities_flag)) { |
| 12832 | 12999 | u32 v; |
| 12833 | 13000 | |
| @@ -12849,7 +13016,7 @@ static pci_ers_result_t bnx2x_io_slot_reset(struct pci_dev *pdev) · 15 unmodified lines | ||
| 12849 | 13016 | |
| 12850 | 13017 | bnx2x_prev_unload(bp); |
| 12851 | 13018 | |
| 12852 | − /* We should have resetted the engine, so It's fair to | |
| 13019 | + /* We should have reseted the engine, so It's fair to | |
| 12853 | 13020 | * assume the FW will no longer write to the bnx2x driver. |
| 12854 | 13021 | */ |
| 12855 | 13022 | bnx2x_squeeze_objects(bp); |
| @@ -12886,8 +13053,6 @@ static void bnx2x_io_resume(struct pci_dev *pdev) · 30 unmodified lines | ||
| 12886 | 13053 | |
| 12887 | 13054 | rtnl_lock(); |
| 12888 | 13055 | |
| 12889 | − bnx2x_eeh_recover(bp); | |
| 12890 | − | |
| 12891 | 13056 | bp->fw_seq = SHMEM_RD(bp, func_mb[BP_FW_MB_IDX(bp)].drv_mb_header) & |
| 12892 | 13057 | DRV_MSG_SEQ_NUMBER_MASK; |
| 12893 | 13058 | |
| @@ -12905,6 +13070,29 @@ static const struct pci_error_handlers bnx2x_err_handler = { · 11 unmodified lines | ||
| 12905 | 13070 | .resume = bnx2x_io_resume, |
| 12906 | 13071 | }; |
| 12907 | 13072 | |
| 13073 | +static void bnx2x_shutdown(struct pci_dev *pdev) | |
| 13074 | +{ | |
| 13075 | + struct net_device *dev = pci_get_drvdata(pdev); | |
| 13076 | + struct bnx2x *bp; | |
| 13077 | + | |
| 13078 | + if (!dev) | |
| 13079 | + return; | |
| 13080 | + | |
| 13081 | + bp = netdev_priv(dev); | |
| 13082 | + if (!bp) | |
| 13083 | + return; | |
| 13084 | + | |
| 13085 | + rtnl_lock(); | |
| 13086 | + netif_device_detach(dev); | |
| 13087 | + rtnl_unlock(); | |
| 13088 | + | |
| 13089 | + /* Don't remove the netdevice, as there are scenarios which will cause | |
| 13090 | + * the kernel to hang, e.g., when trying to remove bnx2i while the | |
| 13091 | + * rootfs is mounted from SAN. | |
| 13092 | + */ | |
| 13093 | + __bnx2x_remove(pdev, dev, bp, false); | |
| 13094 | +} | |
| 13095 | + | |
| 12908 | 13096 | static struct pci_driver bnx2x_pci_driver = { |
| 12909 | 13097 | .name = DRV_MODULE_NAME, |
| 12910 | 13098 | .id_table = bnx2x_pci_tbl, |
| @@ -12916,6 +13104,7 @@ static struct pci_driver bnx2x_pci_driver = { · 5 unmodified lines | ||
| 12916 | 13104 | #ifdef CONFIG_BNX2X_SRIOV |
| 12917 | 13105 | .sriov_configure = bnx2x_sriov_configure, |
| 12918 | 13106 | #endif |
| 13107 | + .shutdown = bnx2x_shutdown, | |
| 12919 | 13108 | }; |
| 12920 | 13109 | |
| 12921 | 13110 | static int __init bnx2x_init(void) |
| @@ -12941,11 +13130,12 @@ static int __init bnx2x_init(void) · 19 unmodified lines | ||
| 12941 | 13130 | static void __exit bnx2x_cleanup(void) |
| 12942 | 13131 | { |
| 12943 | 13132 | struct list_head *pos, *q; |
| 13133 | + | |
| 12944 | 13134 | pci_unregister_driver(&bnx2x_pci_driver); |
| 12945 | 13135 | |
| 12946 | 13136 | destroy_workqueue(bnx2x_wq); |
| 12947 | 13137 | |
| 12948 | − /* Free globablly allocated resources */ | |
| 13138 | + /* Free globally allocated resources */ | |
| 12949 | 13139 | list_for_each_safe(pos, q, &bnx2x_prev_list) { |
| 12950 | 13140 | struct bnx2x_prev_path_list *tmp = |
| 12951 | 13141 | list_entry(pos, struct bnx2x_prev_path_list, list); |
| @@ -12968,7 +13158,7 @@ module_exit(bnx2x_cleanup); · 16 unmodified lines | ||
| 12968 | 13158 | * @bp: driver handle |
| 12969 | 13159 | * @set: set or clear the CAM entry |
| 12970 | 13160 | * |
| 12971 | − * This function will wait until the ramdord completion returns. | |
| 13161 | + * This function will wait until the ramrod completion returns. | |
| 12972 | 13162 | * Return 0 if success, -ENODEV if ramrod doesn't return. |
| 12973 | 13163 | */ |
| 12974 | 13164 | static int bnx2x_set_iscsi_eth_mac_addr(struct bnx2x *bp) |
| @@ -12996,7 +13186,6 @@ static void bnx2x_cnic_sp_post(struct bnx2x *bp, int count) · 21 unmodified lines | ||
| 12996 | 13186 | BUG_ON(bp->cnic_spq_pending < count); |
| 12997 | 13187 | bp->cnic_spq_pending -= count; |
| 12998 | 13188 | |
| 12999 | − | |
| 13000 | 13189 | for (; bp->cnic_kwq_pending; bp->cnic_kwq_pending--) { |
| 13001 | 13190 | u16 type = (le16_to_cpu(bp->cnic_kwq_cons->hdr.type) |
| 13002 | 13191 | & SPE_HDR_CONN_TYPE) >> |
| @@ -13169,7 +13358,6 @@ static void bnx2x_cnic_cfc_comp(struct bnx2x *bp, int cid, u8 err) · 166 unmodified lines | ||
| 13169 | 13358 | bnx2x_cnic_sp_post(bp, 0); |
| 13170 | 13359 | } |
| 13171 | 13360 | |
| 13172 | − | |
| 13173 | 13361 | /* Called with netif_addr_lock_bh() taken. |
| 13174 | 13362 | * Sets an rx_mode config for an iSCSI ETH client. |
| 13175 | 13363 | * Doesn't block. |
| @@ -13210,7 +13398,6 @@ static void bnx2x_set_iscsi_eth_rx_mode(struct bnx2x *bp, bool start) · 34 unmodified lines | ||
| 13210 | 13398 | } |
| 13211 | 13399 | } |
| 13212 | 13400 | |
| 13213 | − | |
| 13214 | 13401 | static int bnx2x_drv_ctl(struct net_device *dev, struct drv_ctl_info *ctl) |
| 13215 | 13402 | { |
| 13216 | 13403 | struct bnx2x *bp = netdev_priv(dev); |
| @@ -13398,7 +13585,6 @@ void bnx2x_setup_cnic_info(struct bnx2x *bp) · 181 unmodified lines | ||
| 13398 | 13585 | { |
| 13399 | 13586 | struct cnic_eth_dev *cp = &bp->cnic_eth_dev; |
| 13400 | 13587 | |
| 13401 | − | |
| 13402 | 13588 | cp->ctx_tbl_offset = FUNC_ILT_BASE(BP_FUNC(bp)) + |
| 13403 | 13589 | bnx2x_cid_ilt_lines(bp); |
| 13404 | 13590 | cp->starting_cid = bnx2x_cid_ilt_lines(bp) * ILT_PAGE_CIDS; |
| @@ -13434,7 +13620,6 @@ static int bnx2x_register_cnic(struct net_device *dev, struct cnic_ops *ops, · 29 unmodified lines | ||
| 13434 | 13620 | BNX2X_ERR("CNIC-related load failed\n"); |
| 13435 | 13621 | return rc; |
| 13436 | 13622 | } |
| 13437 | − | |
| 13438 | 13623 | } |
| 13439 | 13624 | |
| 13440 | 13625 | bp->cnic_enabled = true; |
| @@ -35,6 +35,8 @@ · 34 unmodified lines | ||
| 35 | 35 | #define ATC_REG_ATC_INT_STS_CLR 0x1101c0 |
| 36 | 36 | /* [RW 5] Parity mask register #0 read/write */ |
| 37 | 37 | #define ATC_REG_ATC_PRTY_MASK 0x1101d8 |
| 38 | +/* [R 5] Parity register #0 read */ | |
| 39 | +#define ATC_REG_ATC_PRTY_STS 0x1101cc | |
| 38 | 40 | /* [RC 5] Parity register #0 read clear */ |
| 39 | 41 | #define ATC_REG_ATC_PRTY_STS_CLR 0x1101d0 |
| 40 | 42 | /* [RW 19] Interrupt mask register #0 read/write */ |
| @@ -2750,6 +2752,8 @@ · 2709 unmodified lines | ||
| 2750 | 2752 | #define PBF_REG_PBF_INT_STS 0x1401c8 |
| 2751 | 2753 | /* [RW 20] Parity mask register #0 read/write */ |
| 2752 | 2754 | #define PBF_REG_PBF_PRTY_MASK 0x1401e4 |
| 2755 | +/* [R 28] Parity register #0 read */ | |
| 2756 | +#define PBF_REG_PBF_PRTY_STS 0x1401d8 | |
| 2753 | 2757 | /* [RC 20] Parity register #0 read clear */ |
| 2754 | 2758 | #define PBF_REG_PBF_PRTY_STS_CLR 0x1401dc |
| 2755 | 2759 | /* [RW 16] The Ethernet type value for L2 tag 0 */ |
| @@ -4517,6 +4521,8 @@ · 1761 unmodified lines | ||
| 4517 | 4521 | #define TM_REG_TM_INT_STS 0x1640f0 |
| 4518 | 4522 | /* [RW 7] Parity mask register #0 read/write */ |
| 4519 | 4523 | #define TM_REG_TM_PRTY_MASK 0x16410c |
| 4524 | +/* [R 7] Parity register #0 read */ | |
| 4525 | +#define TM_REG_TM_PRTY_STS 0x164100 | |
| 4520 | 4526 | /* [RC 7] Parity register #0 read clear */ |
| 4521 | 4527 | #define TM_REG_TM_PRTY_STS_CLR 0x164104 |
| 4522 | 4528 | /* [RW 8] The event id for aggregated interrupt 0 */ |
| @@ -35,9 +35,9 @@ · 34 unmodified lines | ||
| 35 | 35 | /** |
| 36 | 36 | * bnx2x_exe_queue_init - init the Exe Queue object |
| 37 | 37 | * |
| 38 | − * @o: poiter to the object | |
| 38 | + * @o: pointer to the object | |
| 39 | 39 | * @exe_len: length |
| 40 | − * @owner: poiter to the owner | |
| 40 | + * @owner: pointer to the owner | |
| 41 | 41 | * @validate: validate function pointer |
| 42 | 42 | * @optimize: optimize function pointer |
| 43 | 43 | * @exec: execute function pointer |
| @@ -142,7 +142,6 @@ free_and_exit: · 98 unmodified lines | ||
| 142 | 142 | spin_unlock_bh(&o->lock); |
| 143 | 143 | |
| 144 | 144 | return rc; |
| 145 | − | |
| 146 | 145 | } |
| 147 | 146 | |
| 148 | 147 | static inline void __bnx2x_exe_queue_reset_pending( |
| @@ -163,13 +162,11 @@ static inline void __bnx2x_exe_queue_reset_pending( · 14 unmodified lines | ||
| 163 | 162 | static inline void bnx2x_exe_queue_reset_pending(struct bnx2x *bp, |
| 164 | 163 | struct bnx2x_exe_queue_obj *o) |
| 165 | 164 | { |
| 166 | − | |
| 167 | 165 | spin_lock_bh(&o->lock); |
| 168 | 166 | |
| 169 | 167 | __bnx2x_exe_queue_reset_pending(bp, o); |
| 170 | 168 | |
| 171 | 169 | spin_unlock_bh(&o->lock); |
| 172 | − | |
| 173 | 170 | } |
| 174 | 171 | |
| 175 | 172 | /** |
| @@ -179,7 +176,7 @@ static inline void bnx2x_exe_queue_reset_pending(struct bnx2x *bp, · 3 unmodified lines | ||
| 179 | 176 | * @o: queue |
| 180 | 177 | * @ramrod_flags: flags |
| 181 | 178 | * |
| 182 | − * (Atomicy is ensured using the exe_queue->lock). | |
| 179 | + * (Atomicity is ensured using the exe_queue->lock). | |
| 183 | 180 | */ |
| 184 | 181 | static inline int bnx2x_exe_queue_step(struct bnx2x *bp, |
| 185 | 182 | struct bnx2x_exe_queue_obj *o, |
| @@ -192,8 +189,7 @@ static inline int bnx2x_exe_queue_step(struct bnx2x *bp, · 6 unmodified lines | ||
| 192 | 189 | |
| 193 | 190 | spin_lock_bh(&o->lock); |
| 194 | 191 | |
| 195 | − /* | |
| 196 | − * Next step should not be performed until the current is finished, | |
| 192 | + /* Next step should not be performed until the current is finished, | |
| 197 | 193 | * unless a DRV_CLEAR_ONLY bit is set. In this case we just want to |
| 198 | 194 | * properly clear object internals without sending any command to the FW |
| 199 | 195 | * which also implies there won't be any completion to clear the |
| @@ -209,8 +205,7 @@ static inline int bnx2x_exe_queue_step(struct bnx2x *bp, · 9 unmodified lines | ||
| 209 | 205 | } |
| 210 | 206 | } |
| 211 | 207 | |
| 212 | − /* | |
| 213 | − * Run through the pending commands list and create a next | |
| 208 | + /* Run through the pending commands list and create a next | |
| 214 | 209 | * execution chunk. |
| 215 | 210 | */ |
| 216 | 211 | while (!list_empty(&o->exe_queue)) { |
| @@ -220,8 +215,7 @@ static inline int bnx2x_exe_queue_step(struct bnx2x *bp, · 3 unmodified lines | ||
| 220 | 215 | |
| 221 | 216 | if (cur_len + elem->cmd_len <= o->exe_chunk_len) { |
| 222 | 217 | cur_len += elem->cmd_len; |
| 223 | − /* | |
| 224 | − * Prevent from both lists being empty when moving an | |
| 218 | + /* Prevent from both lists being empty when moving an | |
| 225 | 219 | * element. This will allow the call of |
| 226 | 220 | * bnx2x_exe_queue_empty() without locking. |
| 227 | 221 | */ |
| @@ -241,14 +235,12 @@ static inline int bnx2x_exe_queue_step(struct bnx2x *bp, · 13 unmodified lines | ||
| 241 | 235 | |
| 242 | 236 | rc = o->execute(bp, o->owner, &o->pending_comp, ramrod_flags); |
| 243 | 237 | if (rc < 0) |
| 244 | − /* | |
| 245 | − * In case of an error return the commands back to the queue | |
| 246 | − * and reset the pending_comp. | |
| 238 | + /* In case of an error return the commands back to the queue | |
| 239 | + * and reset the pending_comp. | |
| 247 | 240 | */ |
| 248 | 241 | list_splice_init(&o->pending_comp, &o->exe_queue); |
| 249 | 242 | else if (!rc) |
| 250 | − /* | |
| 251 | − * If zero is returned, means there are no outstanding pending | |
| 243 | + /* If zero is returned, means there are no outstanding pending | |
| 252 | 244 | * completions and we may dismiss the pending list. |
| 253 | 245 | */ |
| 254 | 246 | __bnx2x_exe_queue_reset_pending(bp, o); |
| @@ -308,7 +300,6 @@ static inline int bnx2x_state_wait(struct bnx2x *bp, int state, · 53 unmodified lines | ||
| 308 | 300 | /* can take a while if any port is running */ |
| 309 | 301 | int cnt = 5000; |
| 310 | 302 | |
| 311 | − | |
| 312 | 303 | if (CHIP_REV_IS_EMUL(bp)) |
| 313 | 304 | cnt *= 20; |
| 314 | 305 | |
| @@ -456,7 +447,6 @@ static int bnx2x_get_n_elements(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o, · 141 unmodified lines | ||
| 456 | 447 | DP(BNX2X_MSG_SP, "copied element number %d to address %p element was:\n", |
| 457 | 448 | counter, next); |
| 458 | 449 | next += stride + size; |
| 459 | − | |
| 460 | 450 | } |
| 461 | 451 | } |
| 462 | 452 | return counter * ETH_ALEN; |
| @@ -518,7 +508,6 @@ static int bnx2x_check_vlan_mac_add(struct bnx2x *bp, · 55 unmodified lines | ||
| 518 | 508 | return 0; |
| 519 | 509 | } |
| 520 | 510 | |
| 521 | − | |
| 522 | 511 | /* check_del() callbacks */ |
| 523 | 512 | static struct bnx2x_vlan_mac_registry_elem * |
| 524 | 513 | bnx2x_check_mac_del(struct bnx2x *bp, |
| @@ -609,7 +598,6 @@ static bool bnx2x_check_move_always_err( · 84 unmodified lines | ||
| 609 | 598 | return false; |
| 610 | 599 | } |
| 611 | 600 | |
| 612 | − | |
| 613 | 601 | static inline u8 bnx2x_vlan_mac_get_rx_tx_flag(struct bnx2x_vlan_mac_obj *o) |
| 614 | 602 | { |
| 615 | 603 | struct bnx2x_raw_obj *raw = &o->raw; |
| @@ -626,7 +614,6 @@ static inline u8 bnx2x_vlan_mac_get_rx_tx_flag(struct bnx2x_vlan_mac_obj *o) · 10 unmodified lines | ||
| 626 | 614 | return rx_tx_flag; |
| 627 | 615 | } |
| 628 | 616 | |
| 629 | − | |
| 630 | 617 | void bnx2x_set_mac_in_nig(struct bnx2x *bp, |
| 631 | 618 | bool add, unsigned char *dev_addr, int index) |
| 632 | 619 | { |
| @@ -693,7 +680,7 @@ static inline void bnx2x_vlan_mac_set_cmd_hdr_e2(struct bnx2x *bp, · 60 unmodified lines | ||
| 693 | 680 | * |
| 694 | 681 | * @cid: connection id |
| 695 | 682 | * @type: BNX2X_FILTER_XXX_PENDING |
| 696 | − * @hdr: poiter to header to setup | |
| 683 | + * @hdr: pointer to header to setup | |
| 697 | 684 | * @rule_cnt: |
| 698 | 685 | * |
| 699 | 686 | * currently we always configure one rule and echo field to contain a CID and an |
| @@ -707,7 +694,6 @@ static inline void bnx2x_vlan_mac_set_rdata_hdr_e2(u32 cid, int type, · 7 unmodified lines | ||
| 707 | 694 | hdr->rule_cnt = (u8)rule_cnt; |
| 708 | 695 | } |
| 709 | 696 | |
| 710 | − | |
| 711 | 697 | /* hw_config() callbacks */ |
| 712 | 698 | static void bnx2x_set_one_mac_e2(struct bnx2x *bp, |
| 713 | 699 | struct bnx2x_vlan_mac_obj *o, |
| @@ -723,8 +709,7 @@ static void bnx2x_set_one_mac_e2(struct bnx2x *bp, · 9 unmodified lines | ||
| 723 | 709 | unsigned long *vlan_mac_flags = &elem->cmd_data.vlan_mac.vlan_mac_flags; |
| 724 | 710 | u8 *mac = elem->cmd_data.vlan_mac.u.mac.mac; |
| 725 | 711 | |
| 726 | − /* | |
| 727 | − * Set LLH CAM entry: currently only iSCSI and ETH macs are | |
| 712 | + /* Set LLH CAM entry: currently only iSCSI and ETH macs are | |
| 728 | 713 | * relevant. In addition, current implementation is tuned for a |
| 729 | 714 | * single ETH MAC. |
| 730 | 715 | * |
| @@ -879,8 +864,7 @@ static void bnx2x_set_one_mac_e1x(struct bnx2x *bp, · 148 unmodified lines | ||
| 879 | 864 | struct bnx2x_raw_obj *raw = &o->raw; |
| 880 | 865 | struct mac_configuration_cmd *config = |
| 881 | 866 | (struct mac_configuration_cmd *)(raw->rdata); |
| 882 | − /* | |
| 883 | − * 57710 and 57711 do not support MOVE command, | |
| 867 | + /* 57710 and 57711 do not support MOVE command, | |
| 884 | 868 | * so it's either ADD or DEL |
| 885 | 869 | */ |
| 886 | 870 | bool add = (elem->cmd_data.vlan_mac.cmd == BNX2X_VLAN_MAC_ADD) ? |
| @@ -960,7 +944,6 @@ static void bnx2x_set_one_vlan_mac_e2(struct bnx2x *bp, · 73 unmodified lines | ||
| 960 | 944 | u16 vlan = elem->cmd_data.vlan_mac.u.vlan_mac.vlan; |
| 961 | 945 | u8 *mac = elem->cmd_data.vlan_mac.u.vlan_mac.mac; |
| 962 | 946 | |
| 963 | − | |
| 964 | 947 | /* Reset the ramrod data buffer for the first rule */ |
| 965 | 948 | if (rule_idx == 0) |
| 966 | 949 | memset(data, 0, sizeof(*data)); |
| @@ -969,7 +952,7 @@ static void bnx2x_set_one_vlan_mac_e2(struct bnx2x *bp, · 2 unmodified lines | ||
| 969 | 952 | bnx2x_vlan_mac_set_cmd_hdr_e2(bp, o, add, CLASSIFY_RULE_OPCODE_PAIR, |
| 970 | 953 | &rule_entry->pair.header); |
| 971 | 954 | |
| 972 | − /* Set VLAN and MAC themselvs */ | |
| 955 | + /* Set VLAN and MAC themselves */ | |
| 973 | 956 | rule_entry->pair.vlan = cpu_to_le16(vlan); |
| 974 | 957 | bnx2x_set_fw_mac_addr(&rule_entry->pair.mac_msb, |
| 975 | 958 | &rule_entry->pair.mac_mid, |
| @@ -1021,8 +1004,7 @@ static void bnx2x_set_one_vlan_mac_e1h(struct bnx2x *bp, · 45 unmodified lines | ||
| 1021 | 1004 | struct bnx2x_raw_obj *raw = &o->raw; |
| 1022 | 1005 | struct mac_configuration_cmd *config = |
| 1023 | 1006 | (struct mac_configuration_cmd *)(raw->rdata); |
| 1024 | − /* | |
| 1025 | − * 57710 and 57711 do not support MOVE command, | |
| 1007 | + /* 57710 and 57711 do not support MOVE command, | |
| 1026 | 1008 | * so it's either ADD or DEL |
| 1027 | 1009 | */ |
| 1028 | 1010 | bool add = (elem->cmd_data.vlan_mac.cmd == BNX2X_VLAN_MAC_ADD) ? |
| @@ -1046,7 +1028,7 @@ static void bnx2x_set_one_vlan_mac_e1h(struct bnx2x *bp, · 17 unmodified lines | ||
| 1046 | 1028 | * |
| 1047 | 1029 | * @bp: device handle |
| 1048 | 1030 | * @p: command parameters |
| 1049 | − * @ppos: pointer to the cooky | |
| 1031 | + * @ppos: pointer to the cookie | |
| 1050 | 1032 | * |
| 1051 | 1033 | * reconfigure next MAC/VLAN/VLAN-MAC element from the |
| 1052 | 1034 | * previously configured elements list. |
| @@ -1054,7 +1036,7 @@ static void bnx2x_set_one_vlan_mac_e1h(struct bnx2x *bp, · 1 unmodified line | ||
| 1054 | 1036 | * from command parameters only RAMROD_COMP_WAIT bit in ramrod_flags is taken |
| 1055 | 1037 | * into an account |
| 1056 | 1038 | * |
| 1057 | − * pointer to the cooky - that should be given back in the next call to make | |
| 1039 | + * pointer to the cookie - that should be given back in the next call to make | |
| 1058 | 1040 | * function handle the next element. If *ppos is set to NULL it will restart the |
| 1059 | 1041 | * iterator. If returned *ppos == NULL this means that the last element has been |
| 1060 | 1042 | * handled. |
| @@ -1102,8 +1084,7 @@ static int bnx2x_vlan_mac_restore(struct bnx2x *bp, · 41 unmodified lines | ||
| 1102 | 1084 | return bnx2x_config_vlan_mac(bp, p); |
| 1103 | 1085 | } |
| 1104 | 1086 | |
| 1105 | −/* | |
| 1106 | − * bnx2x_exeq_get_mac/bnx2x_exeq_get_vlan/bnx2x_exeq_get_vlan_mac return a | |
| 1087 | +/* bnx2x_exeq_get_mac/bnx2x_exeq_get_vlan/bnx2x_exeq_get_vlan_mac return a | |
| 1107 | 1088 | * pointer to an element with a specific criteria and NULL if such an element |
| 1108 | 1089 | * hasn't been found. |
| 1109 | 1090 | */ |
| @@ -1187,8 +1168,7 @@ static inline int bnx2x_validate_vlan_mac_add(struct bnx2x *bp, · 77 unmodified lines | ||
| 1187 | 1168 | return rc; |
| 1188 | 1169 | } |
| 1189 | 1170 | |
| 1190 | − /* | |
| 1191 | − * Check if there is a pending ADD command for this | |
| 1171 | + /* Check if there is a pending ADD command for this | |
| 1192 | 1172 | * MAC/VLAN/VLAN-MAC. Return an error if there is. |
| 1193 | 1173 | */ |
| 1194 | 1174 | if (exeq->get(exeq, elem)) { |
| @@ -1196,8 +1176,7 @@ static inline int bnx2x_validate_vlan_mac_add(struct bnx2x *bp, · 1 unmodified line | ||
| 1196 | 1176 | return -EEXIST; |
| 1197 | 1177 | } |
| 1198 | 1178 | |
| 1199 | − /* | |
| 1200 | − * TODO: Check the pending MOVE from other objects where this | |
| 1179 | + /* TODO: Check the pending MOVE from other objects where this | |
| 1201 | 1180 | * object is a destination object. |
| 1202 | 1181 | */ |
| 1203 | 1182 | |
| @@ -1240,8 +1219,7 @@ static inline int bnx2x_validate_vlan_mac_del(struct bnx2x *bp, · 36 unmodified lines | ||
| 1240 | 1219 | return -EEXIST; |
| 1241 | 1220 | } |
| 1242 | 1221 | |
| 1243 | − /* | |
| 1244 | − * Check if there are pending DEL or MOVE commands for this | |
| 1222 | + /* Check if there are pending DEL or MOVE commands for this | |
| 1245 | 1223 | * MAC/VLAN/VLAN-MAC. Return an error if so. |
| 1246 | 1224 | */ |
| 1247 | 1225 | memcpy(&query_elem, elem, sizeof(query_elem)); |
| @@ -1292,8 +1270,7 @@ static inline int bnx2x_validate_vlan_mac_move(struct bnx2x *bp, · 44 unmodified lines | ||
| 1292 | 1270 | struct bnx2x_exe_queue_obj *src_exeq = &src_o->exe_queue; |
| 1293 | 1271 | struct bnx2x_exe_queue_obj *dest_exeq = &dest_o->exe_queue; |
| 1294 | 1272 | |
| 1295 | − /* | |
| 1296 | − * Check if we can perform this operation based on the current registry | |
| 1273 | + /* Check if we can perform this operation based on the current registry | |
| 1297 | 1274 | * state. |
| 1298 | 1275 | */ |
| 1299 | 1276 | if (!src_o->check_move(bp, src_o, dest_o, |
| @@ -1302,8 +1279,7 @@ static inline int bnx2x_validate_vlan_mac_move(struct bnx2x *bp, · 2 unmodified lines | ||
| 1302 | 1279 | return -EINVAL; |
| 1303 | 1280 | } |
| 1304 | 1281 | |
| 1305 | − /* | |
| 1306 | − * Check if there is an already pending DEL or MOVE command for the | |
| 1282 | + /* Check if there is an already pending DEL or MOVE command for the | |
| 1307 | 1283 | * source object or ADD command for a destination object. Return an |
| 1308 | 1284 | * error if so. |
| 1309 | 1285 | */ |
| @@ -1392,7 +1368,7 @@ static int bnx2x_remove_vlan_mac(struct bnx2x *bp, · 82 unmodified lines | ||
| 1392 | 1368 | } |
| 1393 | 1369 | |
| 1394 | 1370 | /** |
| 1395 | − * bnx2x_wait_vlan_mac - passivly wait for 5 seconds until all work completes. | |
| 1371 | + * bnx2x_wait_vlan_mac - passively wait for 5 seconds until all work completes. | |
| 1396 | 1372 | * |
| 1397 | 1373 | * @bp: device handle |
| 1398 | 1374 | * @o: bnx2x_vlan_mac_obj |
| @@ -1550,9 +1526,8 @@ static inline int bnx2x_vlan_mac_get_registry_elem( · 151 unmodified lines | ||
| 1550 | 1526 | |
| 1551 | 1527 | /* Get a new CAM offset */ |
| 1552 | 1528 | if (!o->get_cam_offset(o, ®_elem->cam_offset)) { |
| 1553 | − /* | |
| 1554 | − * This shell never happen, because we have checked the | |
| 1555 | − * CAM availiability in the 'validate'. | |
| 1529 | + /* This shall never happen, because we have checked the | |
| 1530 | + * CAM availability in the 'validate'. | |
| 1556 | 1531 | */ |
| 1557 | 1532 | WARN_ON(1); |
| 1558 | 1533 | kfree(reg_elem); |
| @@ -1599,8 +1574,7 @@ static int bnx2x_execute_vlan_mac(struct bnx2x *bp, · 40 unmodified lines | ||
| 1599 | 1574 | struct bnx2x_vlan_mac_registry_elem *reg_elem; |
| 1600 | 1575 | enum bnx2x_vlan_mac_cmd cmd; |
| 1601 | 1576 | |
| 1602 | − /* | |
| 1603 | − * If DRIVER_ONLY execution is requested, cleanup a registry | |
| 1577 | + /* If DRIVER_ONLY execution is requested, cleanup a registry | |
| 1604 | 1578 | * and exit. Otherwise send a ramrod to FW. |
| 1605 | 1579 | */ |
| 1606 | 1580 | if (!drv_only) { |
| @@ -1609,11 +1583,10 @@ static int bnx2x_execute_vlan_mac(struct bnx2x *bp, · 2 unmodified lines | ||
| 1609 | 1583 | /* Set pending */ |
| 1610 | 1584 | r->set_pending(r); |
| 1611 | 1585 | |
| 1612 | − /* Fill tha ramrod data */ | |
| 1586 | + /* Fill the ramrod data */ | |
| 1613 | 1587 | list_for_each_entry(elem, exe_chunk, link) { |
| 1614 | 1588 | cmd = elem->cmd_data.vlan_mac.cmd; |
| 1615 | − /* | |
| 1616 | − * We will add to the target object in MOVE command, so | |
| 1589 | + /* We will add to the target object in MOVE command, so | |
| 1617 | 1590 | * change the object for a CAM search. |
| 1618 | 1591 | */ |
| 1619 | 1592 | if (cmd == BNX2X_VLAN_MAC_MOVE) |
| @@ -1646,12 +1619,11 @@ static int bnx2x_execute_vlan_mac(struct bnx2x *bp, · 26 unmodified lines | ||
| 1646 | 1619 | idx++; |
| 1647 | 1620 | } |
| 1648 | 1621 | |
| 1649 | − /* | |
| 1650 | − * No need for an explicit memory barrier here as long we would | |
| 1651 | − * need to ensure the ordering of writing to the SPQ element | |
| 1652 | − * and updating of the SPQ producer which involves a memory | |
| 1653 | − * read and we will have to put a full memory barrier there | |
| 1654 | − * (inside bnx2x_sp_post()). | |
| 1622 | + /* No need for an explicit memory barrier here as long we would | |
| 1623 | + * need to ensure the ordering of writing to the SPQ element | |
| 1624 | + * and updating of the SPQ producer which involves a memory | |
| 1625 | + * read and we will have to put a full memory barrier there | |
| 1626 | + * (inside bnx2x_sp_post()). | |
| 1655 | 1627 | */ |
| 1656 | 1628 | |
| 1657 | 1629 | rc = bnx2x_sp_post(bp, o->ramrod_cmd, r->cid, |
| @@ -1766,8 +1738,7 @@ int bnx2x_config_vlan_mac( · 108 unmodified lines | ||
| 1766 | 1738 | return rc; |
| 1767 | 1739 | } |
| 1768 | 1740 | |
| 1769 | − /* | |
| 1770 | − * If nothing will be executed further in this iteration we want to | |
| 1741 | + /* If nothing will be executed further in this iteration we want to | |
| 1771 | 1742 | * return PENDING if there are pending commands |
| 1772 | 1743 | */ |
| 1773 | 1744 | if (!bnx2x_exe_queue_empty(&o->exe_queue)) |
| @@ -1786,13 +1757,11 @@ int bnx2x_config_vlan_mac( · 12 unmodified lines | ||
| 1786 | 1757 | return rc; |
| 1787 | 1758 | } |
| 1788 | 1759 | |
| 1789 | − /* | |
| 1790 | − * RAMROD_COMP_WAIT is a superset of RAMROD_EXEC. If it was set | |
| 1760 | + /* RAMROD_COMP_WAIT is a superset of RAMROD_EXEC. If it was set | |
| 1791 | 1761 | * then user want to wait until the last command is done. |
| 1792 | 1762 | */ |
| 1793 | 1763 | if (test_bit(RAMROD_COMP_WAIT, &p->ramrod_flags)) { |
| 1794 | − /* | |
| 1795 | − * Wait maximum for the current exe_queue length iterations plus | |
| 1764 | + /* Wait maximum for the current exe_queue length iterations plus | |
| 1796 | 1765 | * one (for the current pending command). |
| 1797 | 1766 | */ |
| 1798 | 1767 | int max_iterations = bnx2x_exe_queue_length(&o->exe_queue) + 1; |
| @@ -1818,8 +1787,6 @@ int bnx2x_config_vlan_mac( · 19 unmodified lines | ||
| 1818 | 1787 | return rc; |
| 1819 | 1788 | } |
| 1820 | 1789 | |
| 1821 | − | |
| 1822 | − | |
| 1823 | 1790 | /** |
| 1824 | 1791 | * bnx2x_vlan_mac_del_all - delete elements with given vlan_mac_flags spec |
| 1825 | 1792 | * |
| @@ -1829,7 +1796,7 @@ int bnx2x_config_vlan_mac( · 3 unmodified lines | ||
| 1829 | 1796 | * @ramrod_flags: execution flags to be used for this deletion |
| 1830 | 1797 | * |
| 1831 | 1798 | * if the last operation has completed successfully and there are no |
| 1832 | − * moreelements left, positive value if the last operation has completed | |
| 1799 | + * more elements left, positive value if the last operation has completed | |
| 1833 | 1800 | * successfully and there are more previously configured elements, negative |
| 1834 | 1801 | * value is current operation has failed. |
| 1835 | 1802 | */ |
| @@ -1870,8 +1837,7 @@ static int bnx2x_vlan_mac_del_all(struct bnx2x *bp, · 34 unmodified lines | ||
| 1870 | 1837 | p.ramrod_flags = *ramrod_flags; |
| 1871 | 1838 | p.user_req.cmd = BNX2X_VLAN_MAC_DEL; |
| 1872 | 1839 | |
| 1873 | − /* | |
| 1874 | − * Add all but the last VLAN-MAC to the execution queue without actually | |
| 1840 | + /* Add all but the last VLAN-MAC to the execution queue without actually | |
| 1875 | 1841 | * execution anything. |
| 1876 | 1842 | */ |
| 1877 | 1843 | __clear_bit(RAMROD_COMP_WAIT, &p.ramrod_flags); |
| @@ -1934,7 +1900,6 @@ static inline void bnx2x_init_vlan_mac_common(struct bnx2x_vlan_mac_obj *o, · 56 unmodified lines | ||
| 1934 | 1900 | state, pstate, type); |
| 1935 | 1901 | } |
| 1936 | 1902 | |
| 1937 | − | |
| 1938 | 1903 | void bnx2x_init_mac_obj(struct bnx2x *bp, |
| 1939 | 1904 | struct bnx2x_vlan_mac_obj *mac_obj, |
| 1940 | 1905 | u8 cl_id, u32 cid, u8 func_id, void *rdata, |
| @@ -2048,8 +2013,7 @@ void bnx2x_init_vlan_mac_obj(struct bnx2x *bp, · 107 unmodified lines | ||
| 2048 | 2013 | /* CAM pool handling */ |
| 2049 | 2014 | vlan_mac_obj->get_credit = bnx2x_get_credit_vlan_mac; |
| 2050 | 2015 | vlan_mac_obj->put_credit = bnx2x_put_credit_vlan_mac; |
| 2051 | − /* | |
| 2052 | − * CAM offset is relevant for 57710 and 57711 chips only which have a | |
| 2016 | + /* CAM offset is relevant for 57710 and 57711 chips only which have a | |
| 2053 | 2017 | * single CAM for both MACs and VLAN-MAC pairs. So the offset |
| 2054 | 2018 | * will be taken from MACs' pool object only. |
| 2055 | 2019 | */ |
| @@ -2092,7 +2056,6 @@ void bnx2x_init_vlan_mac_obj(struct bnx2x *bp, · 36 unmodified lines | ||
| 2092 | 2056 | bnx2x_execute_vlan_mac, |
| 2093 | 2057 | bnx2x_exeq_get_vlan_mac); |
| 2094 | 2058 | } |
| 2095 | − | |
| 2096 | 2059 | } |
| 2097 | 2060 | |
| 2098 | 2061 | /* RX_MODE verbs: DROP_ALL/ACCEPT_ALL/ACCEPT_ALL_MULTI/ACCEPT_ALL_VLAN/NORMAL */ |
| @@ -2117,12 +2080,12 @@ static int bnx2x_set_rx_mode_e1x(struct bnx2x *bp, · 18 unmodified lines | ||
| 2117 | 2080 | struct tstorm_eth_mac_filter_config *mac_filters = |
| 2118 | 2081 | (struct tstorm_eth_mac_filter_config *)p->rdata; |
| 2119 | 2082 | |
| 2120 | − /* initial seeting is drop-all */ | |
| 2083 | + /* initial setting is drop-all */ | |
| 2121 | 2084 | u8 drop_all_ucast = 1, drop_all_mcast = 1; |
| 2122 | 2085 | u8 accp_all_ucast = 0, accp_all_bcast = 0, accp_all_mcast = 0; |
| 2123 | 2086 | u8 unmatched_unicast = 0; |
| 2124 | 2087 | |
| 2125 | − /* In e1x there we only take into account rx acceot flag since tx switching | |
| 2088 | + /* In e1x there we only take into account rx accept flag since tx switching | |
| 2126 | 2089 | * isn't enabled. */ |
| 2127 | 2090 | if (test_bit(BNX2X_ACCEPT_UNICAST, &p->rx_accept_flags)) |
| 2128 | 2091 | /* accept matched ucast */ |
| @@ -2245,7 +2208,6 @@ static inline void bnx2x_rx_mode_set_cmd_state_e2(struct bnx2x *bp, · 116 unmodified lines | ||
| 2245 | 2208 | } |
| 2246 | 2209 | |
| 2247 | 2210 | cmd->state = cpu_to_le16(state); |
| 2248 | − | |
| 2249 | 2211 | } |
| 2250 | 2212 | |
| 2251 | 2213 | static int bnx2x_set_rx_mode_e2(struct bnx2x *bp, |
| @@ -2286,9 +2248,7 @@ static int bnx2x_set_rx_mode_e2(struct bnx2x *bp, · 34 unmodified lines | ||
| 2286 | 2248 | false); |
| 2287 | 2249 | } |
| 2288 | 2250 | |
| 2289 | − | |
| 2290 | − /* | |
| 2291 | − * If FCoE Queue configuration has been requested configure the Rx and | |
| 2251 | + /* If FCoE Queue configuration has been requested configure the Rx and | |
| 2292 | 2252 | * internal switching modes for this queue in separate rules. |
| 2293 | 2253 | * |
| 2294 | 2254 | * FCoE queue shell never be set to ACCEPT_ALL packets of any sort: |
| @@ -2324,8 +2284,7 @@ static int bnx2x_set_rx_mode_e2(struct bnx2x *bp, · 29 unmodified lines | ||
| 2324 | 2284 | } |
| 2325 | 2285 | } |
| 2326 | 2286 | |
| 2327 | − /* | |
| 2328 | − * Set the ramrod header (most importantly - number of rules to | |
| 2287 | + /* Set the ramrod header (most importantly - number of rules to | |
| 2329 | 2288 | * configure). |
| 2330 | 2289 | */ |
| 2331 | 2290 | bnx2x_rx_mode_set_rdata_hdr_e2(p->cid, &data->header, rule_idx); |
| @@ -2334,12 +2293,11 @@ static int bnx2x_set_rx_mode_e2(struct bnx2x *bp, · 2 unmodified lines | ||
| 2334 | 2293 | data->header.rule_cnt, p->rx_accept_flags, |
| 2335 | 2294 | p->tx_accept_flags); |
| 2336 | 2295 | |
| 2337 | − /* | |
| 2338 | − * No need for an explicit memory barrier here as long we would | |
| 2339 | − * need to ensure the ordering of writing to the SPQ element | |
| 2340 | − * and updating of the SPQ producer which involves a memory | |
| 2341 | − * read and we will have to put a full memory barrier there | |
| 2342 | − * (inside bnx2x_sp_post()). | |
| 2296 | + /* No need for an explicit memory barrier here as long we would | |
| 2297 | + * need to ensure the ordering of writing to the SPQ element | |
| 2298 | + * and updating of the SPQ producer which involves a memory | |
| 2299 | + * read and we will have to put a full memory barrier there | |
| 2300 | + * (inside bnx2x_sp_post()). | |
| 2343 | 2301 | */ |
| 2344 | 2302 | |
| 2345 | 2303 | /* Send a ramrod */ |
| @@ -2476,7 +2434,7 @@ static int bnx2x_mcast_enqueue_cmd(struct bnx2x *bp, · 130 unmodified lines | ||
| 2476 | 2434 | cur_mac = (struct bnx2x_mcast_mac_elem *) |
| 2477 | 2435 | ((u8 *)new_cmd + sizeof(*new_cmd)); |
| 2478 | 2436 | |
| 2479 | − /* Push the MACs of the current command into the pendig command | |
| 2437 | + /* Push the MACs of the current command into the pending command | |
| 2480 | 2438 | * MACs list: FIFO |
| 2481 | 2439 | */ |
| 2482 | 2440 | list_for_each_entry(pos, &p->mcast_list, link) { |
| @@ -2909,7 +2867,6 @@ static int bnx2x_mcast_validate_e2(struct bnx2x *bp, · 426 unmodified lines | ||
| 2909 | 2867 | default: |
| 2910 | 2868 | BNX2X_ERR("Unknown command: %d\n", cmd); |
| 2911 | 2869 | return -EINVAL; |
| 2912 | − | |
| 2913 | 2870 | } |
| 2914 | 2871 | |
| 2915 | 2872 | /* Increase the total number of MACs pending to be configured */ |
| @@ -3034,20 +2991,18 @@ static int bnx2x_mcast_setup_e2(struct bnx2x *bp, · 118 unmodified lines | ||
| 3034 | 2991 | if (!o->total_pending_num) |
| 3035 | 2992 | bnx2x_mcast_refresh_registry_e2(bp, o); |
| 3036 | 2993 | |
| 3037 | − /* | |
| 3038 | − * If CLEAR_ONLY was requested - don't send a ramrod and clear | |
| 2994 | + /* If CLEAR_ONLY was requested - don't send a ramrod and clear | |
| 3039 | 2995 | * RAMROD_PENDING status immediately. |
| 3040 | 2996 | */ |
| 3041 | 2997 | if (test_bit(RAMROD_DRV_CLR_ONLY, &p->ramrod_flags)) { |
| 3042 | 2998 | raw->clear_pending(raw); |
| 3043 | 2999 | return 0; |
| 3044 | 3000 | } else { |
| 3045 | − /* | |
| 3046 | − * No need for an explicit memory barrier here as long we would | |
| 3047 | − * need to ensure the ordering of writing to the SPQ element | |
| 3048 | − * and updating of the SPQ producer which involves a memory | |
| 3049 | − * read and we will have to put a full memory barrier there | |
| 3050 | − * (inside bnx2x_sp_post()). | |
| 3001 | + /* No need for an explicit memory barrier here as long we would | |
| 3002 | + * need to ensure the ordering of writing to the SPQ element | |
| 3003 | + * and updating of the SPQ producer which involves a memory | |
| 3004 | + * read and we will have to put a full memory barrier there | |
| 3005 | + * (inside bnx2x_sp_post()). | |
| 3051 | 3006 | */ |
| 3052 | 3007 | |
| 3053 | 3008 | /* Send a ramrod */ |
| @@ -3121,7 +3076,7 @@ static inline void bnx2x_mcast_hdl_restore_e1h(struct bnx2x *bp, · 67 unmodified lines | ||
| 3121 | 3076 | } |
| 3122 | 3077 | } |
| 3123 | 3078 | |
| 3124 | −/* On 57711 we write the multicast MACs' aproximate match | |
| 3079 | +/* On 57711 we write the multicast MACs' approximate match | |
| 3125 | 3080 | * table by directly into the TSTORM's internal RAM. So we don't |
| 3126 | 3081 | * really need to handle any tricks to make it work. |
| 3127 | 3082 | */ |
| @@ -3223,7 +3178,6 @@ static int bnx2x_mcast_validate_e1(struct bnx2x *bp, · 95 unmodified lines | ||
| 3223 | 3178 | default: |
| 3224 | 3179 | BNX2X_ERR("Unknown command: %d\n", cmd); |
| 3225 | 3180 | return -EINVAL; |
| 3226 | − | |
| 3227 | 3181 | } |
| 3228 | 3182 | |
| 3229 | 3183 | /* We want to ensure that commands are executed one by one for 57710. |
| @@ -3245,7 +3199,7 @@ static void bnx2x_mcast_revert_e1(struct bnx2x *bp, · 15 unmodified lines | ||
| 3245 | 3199 | |
| 3246 | 3200 | /* If current command hasn't been handled yet and we are |
| 3247 | 3201 | * here means that it's meant to be dropped and we have to |
| 3248 | − * update the number of outstandling MACs accordingly. | |
| 3202 | + * update the number of outstanding MACs accordingly. | |
| 3249 | 3203 | */ |
| 3250 | 3204 | if (p->mcast_list_len) |
| 3251 | 3205 | o->total_pending_num -= o->max_cmd_len; |
| @@ -3342,7 +3296,6 @@ static inline int bnx2x_mcast_handle_restore_cmd_e1( · 90 unmodified lines | ||
| 3342 | 3296 | return -1; |
| 3343 | 3297 | } |
| 3344 | 3298 | |
| 3345 | − | |
| 3346 | 3299 | static inline int bnx2x_mcast_handle_pending_cmds_e1( |
| 3347 | 3300 | struct bnx2x *bp, struct bnx2x_mcast_ramrod_params *p) |
| 3348 | 3301 | { |
| @@ -3352,7 +3305,6 @@ static inline int bnx2x_mcast_handle_pending_cmds_e1( · 3 unmodified lines | ||
| 3352 | 3305 | union bnx2x_mcast_config_data cfg_data = {NULL}; |
| 3353 | 3306 | int cnt = 0; |
| 3354 | 3307 | |
| 3355 | − | |
| 3356 | 3308 | /* If nothing to be done - return */ |
| 3357 | 3309 | if (list_empty(&o->pending_cmds_head)) |
| 3358 | 3310 | return 0; |
| @@ -3523,20 +3475,18 @@ static int bnx2x_mcast_setup_e1(struct bnx2x *bp, · 164 unmodified lines | ||
| 3523 | 3475 | if (rc) |
| 3524 | 3476 | return rc; |
| 3525 | 3477 | |
| 3526 | − /* | |
| 3527 | − * If CLEAR_ONLY was requested - don't send a ramrod and clear | |
| 3478 | + /* If CLEAR_ONLY was requested - don't send a ramrod and clear | |
| 3528 | 3479 | * RAMROD_PENDING status immediately. |
| 3529 | 3480 | */ |
| 3530 | 3481 | if (test_bit(RAMROD_DRV_CLR_ONLY, &p->ramrod_flags)) { |
| 3531 | 3482 | raw->clear_pending(raw); |
| 3532 | 3483 | return 0; |
| 3533 | 3484 | } else { |
| 3534 | − /* | |
| 3535 | − * No need for an explicit memory barrier here as long we would | |
| 3536 | − * need to ensure the ordering of writing to the SPQ element | |
| 3537 | − * and updating of the SPQ producer which involves a memory | |
| 3538 | − * read and we will have to put a full memory barrier there | |
| 3539 | − * (inside bnx2x_sp_post()). | |
| 3485 | + /* No need for an explicit memory barrier here as long we would | |
| 3486 | + * need to ensure the ordering of writing to the SPQ element | |
| 3487 | + * and updating of the SPQ producer which involves a memory | |
| 3488 | + * read and we will have to put a full memory barrier there | |
| 3489 | + * (inside bnx2x_sp_post()). | |
| 3540 | 3490 | */ |
| 3541 | 3491 | |
| 3542 | 3492 | /* Send a ramrod */ |
| @@ -3550,7 +3500,6 @@ static int bnx2x_mcast_setup_e1(struct bnx2x *bp, · 7 unmodified lines | ||
| 3550 | 3500 | /* Ramrod completion is pending */ |
| 3551 | 3501 | return 1; |
| 3552 | 3502 | } |
| 3553 | − | |
| 3554 | 3503 | } |
| 3555 | 3504 | |
| 3556 | 3505 | static int bnx2x_mcast_get_registry_size_exact(struct bnx2x_mcast_obj *o) |
| @@ -3848,7 +3797,6 @@ static bool bnx2x_credit_pool_always_true(struct bnx2x_credit_pool_obj *o, · 291 unmodified lines | ||
| 3848 | 3797 | return true; |
| 3849 | 3798 | } |
| 3850 | 3799 | |
| 3851 | − | |
| 3852 | 3800 | static bool bnx2x_credit_pool_get_entry( |
| 3853 | 3801 | struct bnx2x_credit_pool_obj *o, |
| 3854 | 3802 | int *offset) |
| @@ -3999,8 +3947,7 @@ void bnx2x_init_mac_credit_pool(struct bnx2x *bp, · 144 unmodified lines | ||
| 3999 | 3947 | |
| 4000 | 3948 | } else { |
| 4001 | 3949 | |
| 4002 | − /* | |
| 4003 | − * CAM credit is equaly divided between all active functions | |
| 3950 | + /* CAM credit is equaly divided between all active functions | |
| 4004 | 3951 | * on the PATH. |
| 4005 | 3952 | */ |
| 4006 | 3953 | if ((func_num > 0)) { |
| @@ -4009,8 +3956,7 @@ void bnx2x_init_mac_credit_pool(struct bnx2x *bp, · 2 unmodified lines | ||
| 4009 | 3956 | else |
| 4010 | 3957 | cam_sz = BNX2X_CAM_SIZE_EMUL; |
| 4011 | 3958 | |
| 4012 | − /* | |
| 4013 | − * No need for CAM entries handling for 57712 and | |
| 3959 | + /* No need for CAM entries handling for 57712 and | |
| 4014 | 3960 | * newer. |
| 4015 | 3961 | */ |
| 4016 | 3962 | bnx2x_init_credit_pool(p, -1, cam_sz); |
| @@ -4018,7 +3964,6 @@ void bnx2x_init_mac_credit_pool(struct bnx2x *bp, · 1 unmodified line | ||
| 4018 | 3964 | /* this should never happen! Block MAC operations. */ |
| 4019 | 3965 | bnx2x_init_credit_pool(p, 0, 0); |
| 4020 | 3966 | } |
| 4021 | − | |
| 4022 | 3967 | } |
| 4023 | 3968 | } |
| 4024 | 3969 | |
| @@ -4028,14 +3973,12 @@ void bnx2x_init_vlan_credit_pool(struct bnx2x *bp, · 3 unmodified lines | ||
| 4028 | 3973 | u8 func_num) |
| 4029 | 3974 | { |
| 4030 | 3975 | if (CHIP_IS_E1x(bp)) { |
| 4031 | − /* | |
| 4032 | − * There is no VLAN credit in HW on 57710 and 57711 only | |
| 3976 | + /* There is no VLAN credit in HW on 57710 and 57711 only | |
| 4033 | 3977 | * MAC / MAC-VLAN can be set |
| 4034 | 3978 | */ |
| 4035 | 3979 | bnx2x_init_credit_pool(p, 0, -1); |
| 4036 | 3980 | } else { |
| 4037 | − /* | |
| 4038 | − * CAM credit is equaly divided between all active functions | |
| 3981 | + /* CAM credit is equally divided between all active functions | |
| 4039 | 3982 | * on the PATH. |
| 4040 | 3983 | */ |
| 4041 | 3984 | if (func_num > 0) { |
| @@ -4051,7 +3994,7 @@ void bnx2x_init_vlan_credit_pool(struct bnx2x *bp, · 9 unmodified lines | ||
| 4051 | 3994 | /** |
| 4052 | 3995 | * bnx2x_debug_print_ind_table - prints the indirection table configuration. |
| 4053 | 3996 | * |
| 4054 | − * @bp: driver hanlde | |
| 3997 | + * @bp: driver handle | |
| 4055 | 3998 | * @p: pointer to rss configuration |
| 4056 | 3999 | * |
| 4057 | 4000 | * Prints it when NETIF_MSG_IFUP debug level is configured. |
| @@ -4164,12 +4107,11 @@ static int bnx2x_setup_rss(struct bnx2x *bp, · 106 unmodified lines | ||
| 4164 | 4107 | data->capabilities |= ETH_RSS_UPDATE_RAMROD_DATA_UPDATE_RSS_KEY; |
| 4165 | 4108 | } |
| 4166 | 4109 | |
| 4167 | − /* | |
| 4168 | − * No need for an explicit memory barrier here as long we would | |
| 4169 | − * need to ensure the ordering of writing to the SPQ element | |
| 4170 | − * and updating of the SPQ producer which involves a memory | |
| 4171 | − * read and we will have to put a full memory barrier there | |
| 4172 | − * (inside bnx2x_sp_post()). | |
| 4110 | + /* No need for an explicit memory barrier here as long we would | |
| 4111 | + * need to ensure the ordering of writing to the SPQ element | |
| 4112 | + * and updating of the SPQ producer which involves a memory | |
| 4113 | + * read and we will have to put a full memory barrier there | |
| 4114 | + * (inside bnx2x_sp_post()). | |
| 4173 | 4115 | */ |
| 4174 | 4116 | |
| 4175 | 4117 | /* Send a ramrod */ |
| @@ -4215,7 +4157,6 @@ int bnx2x_config_rss(struct bnx2x *bp, · 39 unmodified lines | ||
| 4215 | 4157 | return rc; |
| 4216 | 4158 | } |
| 4217 | 4159 | |
| 4218 | − | |
| 4219 | 4160 | void bnx2x_init_rss_config_obj(struct bnx2x *bp, |
| 4220 | 4161 | struct bnx2x_rss_config_obj *rss_obj, |
| 4221 | 4162 | u8 cl_id, u32 cid, u8 func_id, u8 engine_id, |
| @@ -4288,7 +4229,6 @@ int bnx2x_queue_state_change(struct bnx2x *bp, · 66 unmodified lines | ||
| 4288 | 4229 | return !!test_bit(pending_bit, pending); |
| 4289 | 4230 | } |
| 4290 | 4231 | |
| 4291 | − | |
| 4292 | 4232 | static int bnx2x_queue_set_pending(struct bnx2x_queue_sp_obj *obj, |
| 4293 | 4233 | struct bnx2x_queue_state_params *params) |
| 4294 | 4234 | { |
| @@ -4337,7 +4277,7 @@ static int bnx2x_queue_comp_cmd(struct bnx2x *bp, · 42 unmodified lines | ||
| 4337 | 4277 | } |
| 4338 | 4278 | |
| 4339 | 4279 | if (o->next_tx_only >= o->max_cos) |
| 4340 | − /* >= becuase tx only must always be smaller than cos since the | |
| 4280 | + /* >= because tx only must always be smaller than cos since the | |
| 4341 | 4281 | * primary connection supports COS 0 |
| 4342 | 4282 | */ |
| 4343 | 4283 | BNX2X_ERR("illegal value for next tx_only: %d. max cos was %d", |
| @@ -4403,7 +4343,6 @@ static void bnx2x_q_fill_init_general_data(struct bnx2x *bp, · 59 unmodified lines | ||
| 4403 | 4343 | gen_data->mtu = cpu_to_le16(params->mtu); |
| 4404 | 4344 | gen_data->func_id = o->func_id; |
| 4405 | 4345 | |
| 4406 | − | |
| 4407 | 4346 | gen_data->cos = params->cos; |
| 4408 | 4347 | |
| 4409 | 4348 | gen_data->traffic_type = |
| @@ -4530,7 +4469,6 @@ static void bnx2x_q_fill_init_rx_data(struct bnx2x_queue_sp_obj *o, · 120 unmodified lines | ||
| 4530 | 4469 | cpu_to_le16(params->silent_removal_value); |
| 4531 | 4470 | rx_data->silent_vlan_mask = |
| 4532 | 4471 | cpu_to_le16(params->silent_removal_mask); |
| 4533 | − | |
| 4534 | 4472 | } |
| 4535 | 4473 | |
| 4536 | 4474 | /* initialize the general, tx and rx parts of a queue object */ |
| @@ -4652,12 +4590,11 @@ static inline int bnx2x_q_send_setup_e1x(struct bnx2x *bp, · 115 unmodified lines | ||
| 4652 | 4590 | /* Fill the ramrod data */ |
| 4653 | 4591 | bnx2x_q_fill_setup_data_cmn(bp, params, rdata); |
| 4654 | 4592 | |
| 4655 | − /* | |
| 4656 | − * No need for an explicit memory barrier here as long we would | |
| 4657 | − * need to ensure the ordering of writing to the SPQ element | |
| 4658 | − * and updating of the SPQ producer which involves a memory | |
| 4659 | − * read and we will have to put a full memory barrier there | |
| 4660 | − * (inside bnx2x_sp_post()). | |
| 4593 | + /* No need for an explicit memory barrier here as long we would | |
| 4594 | + * need to ensure the ordering of writing to the SPQ element | |
| 4595 | + * and updating of the SPQ producer which involves a memory | |
| 4596 | + * read and we will have to put a full memory barrier there | |
| 4597 | + * (inside bnx2x_sp_post()). | |
| 4661 | 4598 | */ |
| 4662 | 4599 | |
| 4663 | 4600 | return bnx2x_sp_post(bp, ramrod, o->cids[BNX2X_PRIMARY_CID_INDEX], |
| @@ -4681,12 +4618,11 @@ static inline int bnx2x_q_send_setup_e2(struct bnx2x *bp, · 17 unmodified lines | ||
| 4681 | 4618 | bnx2x_q_fill_setup_data_cmn(bp, params, rdata); |
| 4682 | 4619 | bnx2x_q_fill_setup_data_e2(bp, params, rdata); |
| 4683 | 4620 | |
| 4684 | − /* | |
| 4685 | − * No need for an explicit memory barrier here as long we would | |
| 4686 | − * need to ensure the ordering of writing to the SPQ element | |
| 4687 | − * and updating of the SPQ producer which involves a memory | |
| 4688 | − * read and we will have to put a full memory barrier there | |
| 4689 | − * (inside bnx2x_sp_post()). | |
| 4621 | + /* No need for an explicit memory barrier here as long we would | |
| 4622 | + * need to ensure the ordering of writing to the SPQ element | |
| 4623 | + * and updating of the SPQ producer which involves a memory | |
| 4624 | + * read and we will have to put a full memory barrier there | |
| 4625 | + * (inside bnx2x_sp_post()). | |
| 4690 | 4626 | */ |
| 4691 | 4627 | |
| 4692 | 4628 | return bnx2x_sp_post(bp, ramrod, o->cids[BNX2X_PRIMARY_CID_INDEX], |
| @@ -4706,7 +4642,6 @@ static inline int bnx2x_q_send_setup_tx_only(struct bnx2x *bp, · 13 unmodified lines | ||
| 4706 | 4642 | ¶ms->params.tx_only; |
| 4707 | 4643 | u8 cid_index = tx_only_params->cid_index; |
| 4708 | 4644 | |
| 4709 | − | |
| 4710 | 4645 | if (cid_index >= o->max_cos) { |
| 4711 | 4646 | BNX2X_ERR("queue[%d]: cid_index (%d) is out of range\n", |
| 4712 | 4647 | o->cl_id, cid_index); |
| @@ -4727,12 +4662,11 @@ static inline int bnx2x_q_send_setup_tx_only(struct bnx2x *bp, · 14 unmodified lines | ||
| 4727 | 4662 | o->cids[cid_index], rdata->general.client_id, |
| 4728 | 4663 | rdata->general.sp_client_id, rdata->general.cos); |
| 4729 | 4664 | |
| 4730 | − /* | |
| 4731 | − * No need for an explicit memory barrier here as long we would | |
| 4732 | − * need to ensure the ordering of writing to the SPQ element | |
| 4733 | − * and updating of the SPQ producer which involves a memory | |
| 4734 | − * read and we will have to put a full memory barrier there | |
| 4735 | − * (inside bnx2x_sp_post()). | |
| 4665 | + /* No need for an explicit memory barrier here as long we would | |
| 4666 | + * need to ensure the ordering of writing to the SPQ element | |
| 4667 | + * and updating of the SPQ producer which involves a memory | |
| 4668 | + * read and we will have to put a full memory barrier there | |
| 4669 | + * (inside bnx2x_sp_post()). | |
| 4736 | 4670 | */ |
| 4737 | 4671 | |
| 4738 | 4672 | return bnx2x_sp_post(bp, ramrod, o->cids[cid_index], |
| @@ -4761,7 +4695,7 @@ static void bnx2x_q_fill_update_data(struct bnx2x *bp, · 22 unmodified lines | ||
| 4761 | 4695 | test_bit(BNX2X_Q_UPDATE_IN_VLAN_REM_CHNG, |
| 4762 | 4696 | ¶ms->update_flags); |
| 4763 | 4697 | |
| 4764 | − /* Outer VLAN sripping */ | |
| 4698 | + /* Outer VLAN stripping */ | |
| 4765 | 4699 | data->outer_vlan_removal_enable_flg = |
| 4766 | 4700 | test_bit(BNX2X_Q_UPDATE_OUT_VLAN_REM, ¶ms->update_flags); |
| 4767 | 4701 | data->outer_vlan_removal_change_flg = |
| @@ -4816,19 +4750,17 @@ static inline int bnx2x_q_send_update(struct bnx2x *bp, · 48 unmodified lines | ||
| 4816 | 4750 | return -EINVAL; |
| 4817 | 4751 | } |
| 4818 | 4752 | |
| 4819 | − | |
| 4820 | 4753 | /* Clear the ramrod data */ |
| 4821 | 4754 | memset(rdata, 0, sizeof(*rdata)); |
| 4822 | 4755 | |
| 4823 | 4756 | /* Fill the ramrod data */ |
| 4824 | 4757 | bnx2x_q_fill_update_data(bp, o, update_params, rdata); |
| 4825 | 4758 | |
| 4826 | − /* | |
| 4827 | − * No need for an explicit memory barrier here as long we would | |
| 4828 | − * need to ensure the ordering of writing to the SPQ element | |
| 4829 | − * and updating of the SPQ producer which involves a memory | |
| 4830 | − * read and we will have to put a full memory barrier there | |
| 4831 | − * (inside bnx2x_sp_post()). | |
| 4759 | + /* No need for an explicit memory barrier here as long we would | |
| 4760 | + * need to ensure the ordering of writing to the SPQ element | |
| 4761 | + * and updating of the SPQ producer which involves a memory | |
| 4762 | + * read and we will have to put a full memory barrier there | |
| 4763 | + * (inside bnx2x_sp_post()). | |
| 4832 | 4764 | */ |
| 4833 | 4765 | |
| 4834 | 4766 | return bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_CLIENT_UPDATE, |
| @@ -5038,8 +4970,7 @@ static int bnx2x_queue_chk_transition(struct bnx2x *bp, · 203 unmodified lines | ||
| 5038 | 4970 | ¶ms->params.update; |
| 5039 | 4971 | u8 next_tx_only = o->num_tx_only; |
| 5040 | 4972 | |
| 5041 | − /* | |
| 5042 | − * Forget all pending for completion commands if a driver only state | |
| 4973 | + /* Forget all pending for completion commands if a driver only state | |
| 5043 | 4974 | * transition has been requested. |
| 5044 | 4975 | */ |
| 5045 | 4976 | if (test_bit(RAMROD_DRV_CLR_ONLY, ¶ms->ramrod_flags)) { |
| @@ -5047,8 +4978,7 @@ static int bnx2x_queue_chk_transition(struct bnx2x *bp, · 1 unmodified line | ||
| 5047 | 4978 | o->next_state = BNX2X_Q_STATE_MAX; |
| 5048 | 4979 | } |
| 5049 | 4980 | |
| 5050 | − /* | |
| 5051 | − * Don't allow a next state transition if we are in the middle of | |
| 4981 | + /* Don't allow a next state transition if we are in the middle of | |
| 5052 | 4982 | * the previous one. |
| 5053 | 4983 | */ |
| 5054 | 4984 | if (o->pending) { |
| @@ -5257,8 +5187,7 @@ enum bnx2x_func_state bnx2x_func_get_state(struct bnx2x *bp, · 202 unmodified lines | ||
| 5257 | 5187 | if (o->pending) |
| 5258 | 5188 | return BNX2X_F_STATE_MAX; |
| 5259 | 5189 | |
| 5260 | − /* | |
| 5261 | − * unsure the order of reading of o->pending and o->state | |
| 5190 | + /* unsure the order of reading of o->pending and o->state | |
| 5262 | 5191 | * o->pending should be read first |
| 5263 | 5192 | */ |
| 5264 | 5193 | rmb(); |
| @@ -5356,8 +5285,7 @@ static int bnx2x_func_chk_transition(struct bnx2x *bp, · 91 unmodified lines | ||
| 5356 | 5285 | enum bnx2x_func_state state = o->state, next_state = BNX2X_F_STATE_MAX; |
| 5357 | 5286 | enum bnx2x_func_cmd cmd = params->cmd; |
| 5358 | 5287 | |
| 5359 | − /* | |
| 5360 | − * Forget all pending for completion commands if a driver only state | |
| 5288 | + /* Forget all pending for completion commands if a driver only state | |
| 5361 | 5289 | * transition has been requested. |
| 5362 | 5290 | */ |
| 5363 | 5291 | if (test_bit(RAMROD_DRV_CLR_ONLY, ¶ms->ramrod_flags)) { |
| @@ -5365,8 +5293,7 @@ static int bnx2x_func_chk_transition(struct bnx2x *bp, · 1 unmodified line | ||
| 5365 | 5293 | o->next_state = BNX2X_F_STATE_MAX; |
| 5366 | 5294 | } |
| 5367 | 5295 | |
| 5368 | − /* | |
| 5369 | − * Don't allow a next state transition if we are in the middle of | |
| 5296 | + /* Don't allow a next state transition if we are in the middle of | |
| 5370 | 5297 | * the previous one. |
| 5371 | 5298 | */ |
| 5372 | 5299 | if (o->pending) |
| @@ -5539,7 +5466,7 @@ static int bnx2x_func_hw_init(struct bnx2x *bp, · 166 unmodified lines | ||
| 5539 | 5466 | goto init_err; |
| 5540 | 5467 | } |
| 5541 | 5468 | |
| 5542 | − /* Handle the beginning of COMMON_XXX pases separatelly... */ | |
| 5469 | + /* Handle the beginning of COMMON_XXX pases separately... */ | |
| 5543 | 5470 | switch (load_code) { |
| 5544 | 5471 | case FW_MSG_CODE_DRV_LOAD_COMMON_CHIP: |
| 5545 | 5472 | rc = bnx2x_func_init_cmn_chip(bp, drv); |
| @@ -5573,7 +5500,7 @@ static int bnx2x_func_hw_init(struct bnx2x *bp, · 27 unmodified lines | ||
| 5573 | 5500 | init_err: |
| 5574 | 5501 | drv->gunzip_end(bp); |
| 5575 | 5502 | |
| 5576 | − /* In case of success, complete the comand immediatelly: no ramrods | |
| 5503 | + /* In case of success, complete the command immediately: no ramrods | |
| 5577 | 5504 | * have been sent. |
| 5578 | 5505 | */ |
| 5579 | 5506 | if (!rc) |
| @@ -5598,7 +5525,7 @@ static inline void bnx2x_func_reset_func(struct bnx2x *bp, · 18 unmodified lines | ||
| 5598 | 5525 | } |
| 5599 | 5526 | |
| 5600 | 5527 | /** |
| 5601 | − * bnx2x_func_reset_port - reser HW at port stage | |
| 5528 | + * bnx2x_func_reset_port - reset HW at port stage | |
| 5602 | 5529 | * |
| 5603 | 5530 | * @bp: device handle |
| 5604 | 5531 | * @drv: |
| @@ -5620,7 +5547,7 @@ static inline void bnx2x_func_reset_port(struct bnx2x *bp, · 15 unmodified lines | ||
| 5620 | 5547 | } |
| 5621 | 5548 | |
| 5622 | 5549 | /** |
| 5623 | − * bnx2x_func_reset_cmn - reser HW at common stage | |
| 5550 | + * bnx2x_func_reset_cmn - reset HW at common stage | |
| 5624 | 5551 | * |
| 5625 | 5552 | * @bp: device handle |
| 5626 | 5553 | * @drv: |
| @@ -5636,7 +5563,6 @@ static inline void bnx2x_func_reset_cmn(struct bnx2x *bp, · 9 unmodified lines | ||
| 5636 | 5563 | drv->reset_hw_cmn(bp); |
| 5637 | 5564 | } |
| 5638 | 5565 | |
| 5639 | − | |
| 5640 | 5566 | static inline int bnx2x_func_hw_reset(struct bnx2x *bp, |
| 5641 | 5567 | struct bnx2x_func_state_params *params) |
| 5642 | 5568 | { |
| @@ -5663,7 +5589,7 @@ static inline int bnx2x_func_hw_reset(struct bnx2x *bp, · 20 unmodified lines | ||
| 5663 | 5589 | break; |
| 5664 | 5590 | } |
| 5665 | 5591 | |
| 5666 | − /* Complete the comand immediatelly: no ramrods have been sent. */ | |
| 5592 | + /* Complete the command immediately: no ramrods have been sent. */ | |
| 5667 | 5593 | o->complete_cmd(bp, o, BNX2X_F_CMD_HW_RESET); |
| 5668 | 5594 | |
| 5669 | 5595 | return 0; |
| @@ -34,8 +34,7 @@ enum { · 33 unmodified lines | ||
| 34 | 34 | RAMROD_RESTORE, |
| 35 | 35 | /* Execute the next command now */ |
| 36 | 36 | RAMROD_EXEC, |
| 37 | − /* | |
| 38 | − * Don't add a new command and continue execution of posponed | |
| 37 | + /* Don't add a new command and continue execution of postponed | |
| 39 | 38 | * commands. If not set a new command will be added to the |
| 40 | 39 | * pending commands list. |
| 41 | 40 | */ |
| @@ -129,8 +128,7 @@ enum bnx2x_vlan_mac_cmd { · 87 unmodified lines | ||
| 129 | 128 | struct bnx2x_vlan_mac_data { |
| 130 | 129 | /* Requested command: BNX2X_VLAN_MAC_XX */ |
| 131 | 130 | enum bnx2x_vlan_mac_cmd cmd; |
| 132 | − /* | |
| 133 | − * used to contain the data related vlan_mac_flags bits from | |
| 131 | + /* used to contain the data related vlan_mac_flags bits from | |
| 134 | 132 | * ramrod parameters. |
| 135 | 133 | */ |
| 136 | 134 | unsigned long vlan_mac_flags; |
| @@ -190,14 +188,10 @@ typedef struct bnx2x_exeq_elem * · 53 unmodified lines | ||
| 190 | 188 | struct bnx2x_exeq_elem *elem); |
| 191 | 189 | |
| 192 | 190 | struct bnx2x_exe_queue_obj { |
| 193 | − /* | |
| 194 | − * Commands pending for an execution. | |
| 195 | − */ | |
| 191 | + /* Commands pending for an execution. */ | |
| 196 | 192 | struct list_head exe_queue; |
| 197 | 193 | |
| 198 | − /* | |
| 199 | − * Commands pending for an completion. | |
| 200 | − */ | |
| 194 | + /* Commands pending for an completion. */ | |
| 201 | 195 | struct list_head pending_comp; |
| 202 | 196 | |
| 203 | 197 | spinlock_t lock; |
| @@ -245,14 +239,13 @@ struct bnx2x_exe_queue_obj { · 41 unmodified lines | ||
| 245 | 239 | }; |
| 246 | 240 | /***************** Classification verbs: Set/Del MAC/VLAN/VLAN-MAC ************/ |
| 247 | 241 | /* |
| 248 | − * Element in the VLAN_MAC registry list having all currenty configured | |
| 242 | + * Element in the VLAN_MAC registry list having all currently configured | |
| 249 | 243 | * rules. |
| 250 | 244 | */ |
| 251 | 245 | struct bnx2x_vlan_mac_registry_elem { |
| 252 | 246 | struct list_head link; |
| 253 | 247 | |
| 254 | − /* | |
| 255 | − * Used to store the cam offset used for the mac/vlan/vlan-mac. | |
| 248 | + /* Used to store the cam offset used for the mac/vlan/vlan-mac. | |
| 256 | 249 | * Relevant for 57710 and 57711 only. VLANs and MACs share the |
| 257 | 250 | * same CAM for these chips. |
| 258 | 251 | */ |
| @@ -310,7 +303,7 @@ struct bnx2x_vlan_mac_obj { · 51 unmodified lines | ||
| 310 | 303 | * @param n number of elements to get |
| 311 | 304 | * @param buf buffer preallocated by caller into which elements |
| 312 | 305 | * will be copied. Note elements are 4-byte aligned |
| 313 | − * so buffer size must be able to accomodate the | |
| 306 | + * so buffer size must be able to accommodate the | |
| 314 | 307 | * aligned elements. |
| 315 | 308 | * |
| 316 | 309 | * @return number of copied bytes |
| @@ -395,7 +388,7 @@ struct bnx2x_vlan_mac_obj { · 78 unmodified lines | ||
| 395 | 388 | * @param bp |
| 396 | 389 | * @param p Command parameters (RAMROD_COMP_WAIT bit in |
| 397 | 390 | * ramrod_flags is only taken into an account) |
| 398 | − * @param ppos a pointer to the cooky that should be given back in the | |
| 391 | + * @param ppos a pointer to the cookie that should be given back in the | |
| 399 | 392 | * next call to make function handle the next element. If |
| 400 | 393 | * *ppos is set to NULL it will restart the iterator. |
| 401 | 394 | * If returned *ppos == NULL this means that the last |
| @@ -408,7 +401,7 @@ struct bnx2x_vlan_mac_obj { · 6 unmodified lines | ||
| 408 | 401 | struct bnx2x_vlan_mac_registry_elem **ppos); |
| 409 | 402 | |
| 410 | 403 | /** |
| 411 | − * Should be called on a completion arival. | |
| 404 | + * Should be called on a completion arrival. | |
| 412 | 405 | * |
| 413 | 406 | * @param bp |
| 414 | 407 | * @param o |
| @@ -447,7 +440,7 @@ void bnx2x_set_mac_in_nig(struct bnx2x *bp, · 32 unmodified lines | ||
| 447 | 440 | |
| 448 | 441 | /** RX_MODE verbs:DROP_ALL/ACCEPT_ALL/ACCEPT_ALL_MULTI/ACCEPT_ALL_VLAN/NORMAL */ |
| 449 | 442 | |
| 450 | −/* RX_MODE ramrod spesial flags: set in rx_mode_flags field in | |
| 443 | +/* RX_MODE ramrod special flags: set in rx_mode_flags field in | |
| 451 | 444 | * a bnx2x_rx_mode_ramrod_params. |
| 452 | 445 | */ |
| 453 | 446 | enum { |
| @@ -475,8 +468,7 @@ struct bnx2x_rx_mode_ramrod_params { · 21 unmodified lines | ||
| 475 | 468 | unsigned long ramrod_flags; |
| 476 | 469 | unsigned long rx_mode_flags; |
| 477 | 470 | |
| 478 | − /* | |
| 479 | − * rdata is either a pointer to eth_filter_rules_ramrod_data(e2) or to | |
| 471 | + /* rdata is either a pointer to eth_filter_rules_ramrod_data(e2) or to | |
| 480 | 472 | * a tstorm_eth_mac_filter_config (e1x). |
| 481 | 473 | */ |
| 482 | 474 | void *rdata; |
| @@ -646,12 +638,11 @@ struct bnx2x_credit_pool_obj { · 163 unmodified lines | ||
| 646 | 638 | /* Maximum allowed credit. put() will check against it. */ |
| 647 | 639 | int pool_sz; |
| 648 | 640 | |
| 649 | − /* | |
| 650 | − * Allocate a pool table statically. | |
| 641 | + /* Allocate a pool table statically. | |
| 651 | 642 | * |
| 652 | − * Currently the mamimum allowed size is MAX_MAC_CREDIT_E2(272) | |
| 643 | + * Currently the maximum allowed size is MAX_MAC_CREDIT_E2(272) | |
| 653 | 644 | * |
| 654 | − * The set bit in the table will mean that the entry is available. | |
| 645 | + * The set bit in the table will mean that the entry is available. | |
| 655 | 646 | */ |
| 656 | 647 | #define BNX2X_POOL_VEC_SIZE (MAX_MAC_CREDIT_E2 / 64) |
| 657 | 648 | u64 pool_mirror[BNX2X_POOL_VEC_SIZE]; |
| @@ -832,7 +823,7 @@ enum { · 174 unmodified lines | ||
| 832 | 823 | BNX2X_Q_FLG_TUN_INC_INNER_IP_ID |
| 833 | 824 | }; |
| 834 | 825 | |
| 835 | −/* Queue type options: queue type may be a compination of below. */ | |
| 826 | +/* Queue type options: queue type may be a combination of below. */ | |
| 836 | 827 | enum bnx2x_q_type { |
| 837 | 828 | /** TODO: Consider moving both these flags into the init() |
| 838 | 829 | * ramrod params. |
| @@ -1002,10 +993,9 @@ struct bnx2x_queue_sp_obj { · 163 unmodified lines | ||
| 1002 | 993 | u8 cl_id; |
| 1003 | 994 | u8 func_id; |
| 1004 | 995 | |
| 1005 | − /* | |
| 1006 | − * number of traffic classes supported by queue. | |
| 1007 | − * The primary connection of the queue suppotrs the first traffic | |
| 1008 | − * class. Any further traffic class is suppoted by a tx-only | |
| 996 | + /* number of traffic classes supported by queue. | |
| 997 | + * The primary connection of the queue supports the first traffic | |
| 998 | + * class. Any further traffic class is supported by a tx-only | |
| 1009 | 999 | * connection. |
| 1010 | 1000 | * |
| 1011 | 1001 | * Therefore max_cos is also a number of valid entries in the cids |
| @@ -1021,7 +1011,7 @@ struct bnx2x_queue_sp_obj { · 9 unmodified lines | ||
| 1021 | 1011 | |
| 1022 | 1012 | /* BNX2X_Q_CMD_XX bits. This object implements "one |
| 1023 | 1013 | * pending" paradigm but for debug and tracing purposes it's |
| 1024 | − * more convinient to have different bits for different | |
| 1014 | + * more convenient to have different bits for different | |
| 1025 | 1015 | * commands. |
| 1026 | 1016 | */ |
| 1027 | 1017 | unsigned long pending; |
| @@ -1210,7 +1200,7 @@ struct bnx2x_func_sp_obj { · 182 unmodified lines | ||
| 1210 | 1200 | |
| 1211 | 1201 | /* BNX2X_FUNC_CMD_XX bits. This object implements "one |
| 1212 | 1202 | * pending" paradigm but for debug and tracing purposes it's |
| 1213 | − * more convinient to have different bits for different | |
| 1203 | + * more convenient to have different bits for different | |
| 1214 | 1204 | * commands. |
| 1215 | 1205 | */ |
| 1216 | 1206 | unsigned long pending; |
| @@ -1329,7 +1319,7 @@ void bnx2x_init_rx_mode_obj(struct bnx2x *bp, · 112 unmodified lines | ||
| 1329 | 1319 | * |
| 1330 | 1320 | * @p: Command parameters |
| 1331 | 1321 | * |
| 1332 | − * Return: 0 - if operation was successfull and there is no pending completions, | |
| 1322 | + * Return: 0 - if operation was successful and there is no pending completions, | |
| 1333 | 1323 | * positive number - if there are pending completions, |
| 1334 | 1324 | * negative - if there were errors |
| 1335 | 1325 | */ |
| @@ -1361,7 +1351,7 @@ void bnx2x_init_mcast_obj(struct bnx2x *bp, · 25 unmodified lines | ||
| 1361 | 1351 | * the current command will be enqueued to the tail of the |
| 1362 | 1352 | * pending commands list. |
| 1363 | 1353 | * |
| 1364 | − * Return: 0 is operation was successfull and there are no pending completions, | |
| 1354 | + * Return: 0 is operation was successful and there are no pending completions, | |
| 1365 | 1355 | * negative if there were errors, positive if there are pending |
| 1366 | 1356 | * completions. |
| 1367 | 1357 | */ |
| @@ -1377,7 +1367,6 @@ void bnx2x_init_vlan_credit_pool(struct bnx2x *bp, · 9 unmodified lines | ||
| 1377 | 1367 | struct bnx2x_credit_pool_obj *p, u8 func_id, |
| 1378 | 1368 | u8 func_num); |
| 1379 | 1369 | |
| 1380 | − | |
| 1381 | 1370 | /****************** RSS CONFIGURATION ****************/ |
| 1382 | 1371 | void bnx2x_init_rss_config_obj(struct bnx2x *bp, |
| 1383 | 1372 | struct bnx2x_rss_config_obj *rss_obj, |
| @@ -1341,7 +1341,7 @@ int bnx2x_vfop_qdown_cmd(struct bnx2x *bp, · 1340 unmodified lines | ||
| 1341 | 1341 | */ |
| 1342 | 1342 | |
| 1343 | 1343 | /* internal vf enable - until vf is enabled internally all transactions |
| 1344 | − * are blocked. this routine should always be called last with pretend. | |
| 1344 | + * are blocked. This routine should always be called last with pretend. | |
| 1345 | 1345 | */ |
| 1346 | 1346 | static void bnx2x_vf_enable_internal(struct bnx2x *bp, u8 enable) |
| 1347 | 1347 | { |
| @@ -1459,21 +1459,16 @@ static u8 bnx2x_vf_is_pcie_pending(struct bnx2x *bp, u8 abs_vfid) · 111 unmodified lines | ||
| 1459 | 1459 | struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid); |
| 1460 | 1460 | |
| 1461 | 1461 | if (!vf) |
| 1462 | − goto unknown_dev; | |
| 1462 | + return false; | |
| 1463 | 1463 | |
| 1464 | 1464 | dev = pci_get_bus_and_slot(vf->bus, vf->devfn); |
| 1465 | 1465 | if (dev) |
| 1466 | 1466 | return bnx2x_is_pcie_pending(dev); |
| 1467 | − | |
| 1468 | −unknown_dev: | |
| 1469 | 1467 | return false; |
| 1470 | 1468 | } |
| 1471 | 1469 | |
| 1472 | 1470 | int bnx2x_vf_flr_clnup_epilog(struct bnx2x *bp, u8 abs_vfid) |
| 1473 | 1471 | { |
| 1474 | − /* Wait 100ms */ | |
| 1475 | − msleep(100); | |
| 1476 | − | |
| 1477 | 1472 | /* Verify no pending pci transactions */ |
| 1478 | 1473 | if (bnx2x_vf_is_pcie_pending(bp, abs_vfid)) |
| 1479 | 1474 | BNX2X_ERR("PCIE Transactions still pending\n"); |
| @@ -1620,7 +1615,7 @@ next_vf_to_clean: · 140 unmodified lines | ||
| 1620 | 1615 | i++) |
| 1621 | 1616 | ; |
| 1622 | 1617 | |
| 1623 | − DP(BNX2X_MSG_IOV, "next vf to cleanup: %d. num of vfs: %d\n", i, | |
| 1618 | + DP(BNX2X_MSG_IOV, "next vf to cleanup: %d. Num of vfs: %d\n", i, | |
| 1624 | 1619 | BNX2X_NR_VIRTFN(bp)); |
| 1625 | 1620 | |
| 1626 | 1621 | if (i < BNX2X_NR_VIRTFN(bp)) { |
| @@ -1743,7 +1738,7 @@ void bnx2x_iov_init_dq(struct bnx2x *bp) · 116 unmodified lines | ||
| 1743 | 1738 | REG_WR(bp, DORQ_REG_VF_TYPE_MIN_MCID_0, 0); |
| 1744 | 1739 | REG_WR(bp, DORQ_REG_VF_TYPE_MAX_MCID_0, 0x1ffff); |
| 1745 | 1740 | |
| 1746 | − /* set the number of VF alllowed doorbells to the full DQ range */ | |
| 1741 | + /* set the number of VF allowed doorbells to the full DQ range */ | |
| 1747 | 1742 | REG_WR(bp, DORQ_REG_VF_NORM_MAX_CID_COUNT, 0x20000); |
| 1748 | 1743 | |
| 1749 | 1744 | /* set the VF doorbell threshold */ |
| @@ -2176,6 +2171,9 @@ int bnx2x_iov_nic_init(struct bnx2x *bp) · 426 unmodified lines | ||
| 2176 | 2171 | |
| 2177 | 2172 | DP(BNX2X_MSG_IOV, "num of vfs: %d\n", (bp)->vfdb->sriov.nr_virtfn); |
| 2178 | 2173 | |
| 2174 | + /* let FLR complete ... */ | |
| 2175 | + msleep(100); | |
| 2176 | + | |
| 2179 | 2177 | /* initialize vf database */ |
| 2180 | 2178 | for_each_vf(bp, vfid) { |
| 2181 | 2179 | struct bnx2x_virtf *vf = BP_VF(bp, vfid); |
| @@ -2403,7 +2401,7 @@ int bnx2x_iov_eq_sp_event(struct bnx2x *bp, union event_ring_elem *elem) · 221 unmodified lines | ||
| 2403 | 2401 | |
| 2404 | 2402 | /* extract vf and rxq index from vf_cid - relies on the following: |
| 2405 | 2403 | * 1. vfid on cid reflects the true abs_vfid |
| 2406 | − * 2. the max number of VFs (per path) is 64 | |
| 2404 | + * 2. The max number of VFs (per path) is 64 | |
| 2407 | 2405 | */ |
| 2408 | 2406 | qidx = cid & ((1 << BNX2X_VF_CID_WND)-1); |
| 2409 | 2407 | abs_vfid = (cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1); |
| @@ -2461,7 +2459,7 @@ static struct bnx2x_virtf *bnx2x_vf_by_cid(struct bnx2x *bp, int vf_cid) · 51 unmodified lines | ||
| 2461 | 2459 | { |
| 2462 | 2460 | /* extract the vf from vf_cid - relies on the following: |
| 2463 | 2461 | * 1. vfid on cid reflects the true abs_vfid |
| 2464 | − * 2. the max number of VFs (per path) is 64 | |
| 2462 | + * 2. The max number of VFs (per path) is 64 | |
| 2465 | 2463 | */ |
| 2466 | 2464 | int abs_vfid = (vf_cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1); |
| 2467 | 2465 | return bnx2x_vf_by_abs_fid(bp, abs_vfid); |
| @@ -2480,7 +2478,7 @@ void bnx2x_iov_set_queue_sp_obj(struct bnx2x *bp, int vf_cid, · 12 unmodified lines | ||
| 2480 | 2478 | if (vf) { |
| 2481 | 2479 | /* extract queue index from vf_cid - relies on the following: |
| 2482 | 2480 | * 1. vfid on cid reflects the true abs_vfid |
| 2483 | − * 2. the max number of VFs (per path) is 64 | |
| 2481 | + * 2. The max number of VFs (per path) is 64 | |
| 2484 | 2482 | */ |
| 2485 | 2483 | int q_index = vf_cid & ((1 << BNX2X_VF_CID_WND)-1); |
| 2486 | 2484 | *q_obj = &bnx2x_vfq(vf, q_index, sp_obj); |
| @@ -2705,7 +2703,7 @@ int bnx2x_vf_acquire(struct bnx2x *bp, struct bnx2x_virtf *vf, · 218 unmodified lines | ||
| 2705 | 2703 | } |
| 2706 | 2704 | |
| 2707 | 2705 | /* static allocation: |
| 2708 | − * the global maximum number are fixed per VF. fail the request if | |
| 2706 | + * the global maximum number are fixed per VF. Fail the request if | |
| 2709 | 2707 | * requested number exceed these globals |
| 2710 | 2708 | */ |
| 2711 | 2709 | if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) { |
| @@ -2777,6 +2775,10 @@ int bnx2x_vf_init(struct bnx2x *bp, struct bnx2x_virtf *vf, dma_addr_t *sb_map) · 65 unmodified lines | ||
| 2777 | 2775 | vf->abs_vfid, vf->state); |
| 2778 | 2776 | return -EINVAL; |
| 2779 | 2777 | } |
| 2778 | + | |
| 2779 | + /* let FLR complete ... */ | |
| 2780 | + msleep(100); | |
| 2781 | + | |
| 2780 | 2782 | /* FLR cleanup epilogue */ |
| 2781 | 2783 | if (bnx2x_vf_flr_clnup_epilog(bp, vf->abs_vfid)) |
| 2782 | 2784 | return -EBUSY; |
| @@ -2890,7 +2892,7 @@ int bnx2x_vfop_close_cmd(struct bnx2x *bp, · 107 unmodified lines | ||
| 2890 | 2892 | return -ENOMEM; |
| 2891 | 2893 | } |
| 2892 | 2894 | |
| 2893 | −/* VF release can be called either: 1. the VF was acquired but | |
| 2895 | +/* VF release can be called either: 1. The VF was acquired but | |
| 2894 | 2896 | * not enabled 2. the vf was enabled or in the process of being |
| 2895 | 2897 | * enabled |
| 2896 | 2898 | */ |
| @@ -3024,7 +3026,6 @@ void bnx2x_unlock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf, · 127 unmodified lines | ||
| 3024 | 3026 | |
| 3025 | 3027 | int bnx2x_sriov_configure(struct pci_dev *dev, int num_vfs_param) |
| 3026 | 3028 | { |
| 3027 | − | |
| 3028 | 3029 | struct bnx2x *bp = netdev_priv(pci_get_drvdata(dev)); |
| 3029 | 3030 | |
| 3030 | 3031 | DP(BNX2X_MSG_IOV, "bnx2x_sriov_configure called with %d, BNX2X_NR_VIRTFN(bp) was %d\n", |
| @@ -3032,7 +3033,7 @@ int bnx2x_sriov_configure(struct pci_dev *dev, int num_vfs_param) · 1 unmodified line | ||
| 3032 | 3033 | |
| 3033 | 3034 | /* HW channel is only operational when PF is up */ |
| 3034 | 3035 | if (bp->state != BNX2X_STATE_OPEN) { |
| 3035 | − BNX2X_ERR("VF num configurtion via sysfs not supported while PF is down"); | |
| 3036 | + BNX2X_ERR("VF num configuration via sysfs not supported while PF is down\n"); | |
| 3036 | 3037 | return -EINVAL; |
| 3037 | 3038 | } |
| 3038 | 3039 | |
| @@ -3086,6 +3087,11 @@ void bnx2x_disable_sriov(struct bnx2x *bp) · 47 unmodified lines | ||
| 3086 | 3087 | static int bnx2x_vf_ndo_sanity(struct bnx2x *bp, int vfidx, |
| 3087 | 3088 | struct bnx2x_virtf *vf) |
| 3088 | 3089 | { |
| 3090 | + if (bp->state != BNX2X_STATE_OPEN) { | |
| 3091 | + BNX2X_ERR("vf ndo called though PF is down\n"); | |
| 3092 | + return -EINVAL; | |
| 3093 | + } | |
| 3094 | + | |
| 3089 | 3095 | if (!IS_SRIOV(bp)) { |
| 3090 | 3096 | BNX2X_ERR("vf ndo called though sriov is disabled\n"); |
| 3091 | 3097 | return -EINVAL; |
| @@ -3141,7 +3147,7 @@ int bnx2x_get_vf_config(struct net_device *dev, int vfidx, · 49 unmodified lines | ||
| 3141 | 3147 | /* mac configured by ndo so its in bulletin board */ |
| 3142 | 3148 | memcpy(&ivi->mac, bulletin->mac, ETH_ALEN); |
| 3143 | 3149 | else |
| 3144 | − /* funtion has not been loaded yet. Show mac as 0s */ | |
| 3150 | + /* function has not been loaded yet. Show mac as 0s */ | |
| 3145 | 3151 | memset(&ivi->mac, 0, ETH_ALEN); |
| 3146 | 3152 | |
| 3147 | 3153 | /* vlan */ |
| @@ -3149,7 +3155,7 @@ int bnx2x_get_vf_config(struct net_device *dev, int vfidx, · 1 unmodified line | ||
| 3149 | 3155 | /* vlan configured by ndo so its in bulletin board */ |
| 3150 | 3156 | memcpy(&ivi->vlan, &bulletin->vlan, VLAN_HLEN); |
| 3151 | 3157 | else |
| 3152 | − /* funtion has not been loaded yet. Show vlans as 0s */ | |
| 3158 | + /* function has not been loaded yet. Show vlans as 0s */ | |
| 3153 | 3159 | memset(&ivi->vlan, 0, VLAN_HLEN); |
| 3154 | 3160 | } |
| 3155 | 3161 | |
| @@ -3189,7 +3195,7 @@ int bnx2x_set_vf_mac(struct net_device *dev, int vfidx, u8 *mac) · 33 unmodified lines | ||
| 3189 | 3195 | return -EINVAL; |
| 3190 | 3196 | } |
| 3191 | 3197 | |
| 3192 | − /* update PF's copy of the VF's bulletin. will no longer accept mac | |
| 3198 | + /* update PF's copy of the VF's bulletin. Will no longer accept mac | |
| 3193 | 3199 | * configuration requests from vf unless match this mac |
| 3194 | 3200 | */ |
| 3195 | 3201 | bulletin->valid_bitmap |= 1 << MAC_ADDR_VALID; |
| @@ -3358,8 +3364,11 @@ int bnx2x_set_vf_vlan(struct net_device *dev, int vfidx, u16 vlan, u8 qos) · 162 unmodified lines | ||
| 3358 | 3364 | return 0; |
| 3359 | 3365 | } |
| 3360 | 3366 | |
| 3361 | −/* crc is the first field in the bulletin board. compute the crc over the | |
| 3362 | − * entire bulletin board excluding the crc field itself | |
| 3367 | +/* crc is the first field in the bulletin board. Compute the crc over the | |
| 3368 | + * entire bulletin board excluding the crc field itself. Use the length field | |
| 3369 | + * as the Bulletin Board was posted by a PF with possibly a different version | |
| 3370 | + * from the vf which will sample it. Therefore, the length is computed by the | |
| 3371 | + * PF and the used blindly by the VF. | |
| 3363 | 3372 | */ |
| 3364 | 3373 | u32 bnx2x_crc_vf_bulletin(struct bnx2x *bp, |
| 3365 | 3374 | struct pf_vf_bulletin_content *bulletin) |
| @@ -3389,7 +3398,7 @@ enum sample_bulletin_result bnx2x_sample_bulletin(struct bnx2x *bp) · 23 unmodified lines | ||
| 3389 | 3398 | if (bulletin.crc == bnx2x_crc_vf_bulletin(bp, |
| 3390 | 3399 | &bulletin)) |
| 3391 | 3400 | break; |
| 3392 | − BNX2X_ERR("bad crc on bulletin board. contained %x computed %x\n", | |
| 3401 | + BNX2X_ERR("bad crc on bulletin board. Contained %x computed %x\n", | |
| 3393 | 3402 | bulletin.crc, |
| 3394 | 3403 | bnx2x_crc_vf_bulletin(bp, &bulletin)); |
| 3395 | 3404 | } |
| @@ -3417,6 +3426,20 @@ enum sample_bulletin_result bnx2x_sample_bulletin(struct bnx2x *bp) · 21 unmodified lines | ||
| 3417 | 3426 | return PFVF_BULLETIN_UPDATED; |
| 3418 | 3427 | } |
| 3419 | 3428 | |
| 3429 | +void bnx2x_timer_sriov(struct bnx2x *bp) | |
| 3430 | +{ | |
| 3431 | + bnx2x_sample_bulletin(bp); | |
| 3432 | + | |
| 3433 | + /* if channel is down we need to self destruct */ | |
| 3434 | + if (bp->old_bulletin.valid_bitmap & 1 << CHANNEL_DOWN) { | |
| 3435 | + smp_mb__before_clear_bit(); | |
| 3436 | + set_bit(BNX2X_SP_RTNL_VFPF_CHANNEL_DOWN, | |
| 3437 | + &bp->sp_rtnl_state); | |
| 3438 | + smp_mb__after_clear_bit(); | |
| 3439 | + schedule_delayed_work(&bp->sp_rtnl_task, 0); | |
| 3440 | + } | |
| 3441 | +} | |
| 3442 | + | |
| 3420 | 3443 | void __iomem *bnx2x_vf_doorbells(struct bnx2x *bp) |
| 3421 | 3444 | { |
| 3422 | 3445 | /* vf doorbells are embedded within the regview */ |
| @@ -3452,7 +3475,7 @@ int bnx2x_open_epilog(struct bnx2x *bp) · 29 unmodified lines | ||
| 3452 | 3475 | * register_netdevice which must have rtnl lock taken. As we are holding |
| 3453 | 3476 | * the lock right now, that could only work if the probe would not take |
| 3454 | 3477 | * the lock. However, as the probe of the vf may be called from other |
| 3455 | − * contexts as well (such as passthrough to vm failes) it can't assume | |
| 3478 | + * contexts as well (such as passthrough to vm fails) it can't assume | |
| 3456 | 3479 | * the lock is being held for it. Using delayed work here allows the |
| 3457 | 3480 | * probe code to simply take the lock (i.e. wait for it to be released |
| 3458 | 3481 | * if it is being held). We only want to do this if the number of VFs |
| @@ -3467,3 +3490,23 @@ int bnx2x_open_epilog(struct bnx2x *bp) · 8 unmodified lines | ||
| 3467 | 3490 | |
| 3468 | 3491 | return 0; |
| 3469 | 3492 | } |
| 3493 | + | |
| 3494 | +void bnx2x_iov_channel_down(struct bnx2x *bp) | |
| 3495 | +{ | |
| 3496 | + int vf_idx; | |
| 3497 | + struct pf_vf_bulletin_content *bulletin; | |
| 3498 | + | |
| 3499 | + if (!IS_SRIOV(bp)) | |
| 3500 | + return; | |
| 3501 | + | |
| 3502 | + for_each_vf(bp, vf_idx) { | |
| 3503 | + /* locate this VFs bulletin board and update the channel down | |
| 3504 | + * bit | |
| 3505 | + */ | |
| 3506 | + bulletin = BP_VF_BULLETIN(bp, vf_idx); | |
| 3507 | + bulletin->valid_bitmap |= 1 << CHANNEL_DOWN; | |
| 3508 | + | |
| 3509 | + /* update vf bulletin board */ | |
| 3510 | + bnx2x_post_vf_bulletin(bp, vf_idx); | |
| 3511 | + } | |
| 3512 | +} | |
| @@ -197,7 +197,7 @@ struct bnx2x_virtf { · 196 unmodified lines | ||
| 197 | 197 | |
| 198 | 198 | u8 state; |
| 199 | 199 | #define VF_FREE 0 /* VF ready to be acquired holds no resc */ |
| 200 | −#define VF_ACQUIRED 1 /* VF aquired, but not initalized */ | |
| 200 | +#define VF_ACQUIRED 1 /* VF acquired, but not initialized */ | |
| 201 | 201 | #define VF_ENABLED 2 /* VF Enabled */ |
| 202 | 202 | #define VF_RESET 3 /* VF FLR'd, pending cleanup */ |
| 203 | 203 | |
| @@ -496,7 +496,7 @@ enum { · 292 unmodified lines | ||
| 496 | 496 | else if ((next) == VFOP_VERIFY_PEND) \ |
| 497 | 497 | BNX2X_ERR("expected pending\n"); \ |
| 498 | 498 | else { \ |
| 499 | − DP(BNX2X_MSG_IOV, "no ramrod. scheduling\n"); \ | |
| 499 | + DP(BNX2X_MSG_IOV, "no ramrod. Scheduling\n"); \ | |
| 500 | 500 | atomic_set(&vf->op_in_progress, 1); \ |
| 501 | 501 | queue_delayed_work(bnx2x_wq, &bp->sp_task, 0); \ |
| 502 | 502 | return; \ |
| @@ -722,7 +722,6 @@ u32 bnx2x_crc_vf_bulletin(struct bnx2x *bp, · 219 unmodified lines | ||
| 722 | 722 | struct pf_vf_bulletin_content *bulletin); |
| 723 | 723 | int bnx2x_post_vf_bulletin(struct bnx2x *bp, int vf); |
| 724 | 724 | |
| 725 | − | |
| 726 | 725 | enum sample_bulletin_result bnx2x_sample_bulletin(struct bnx2x *bp); |
| 727 | 726 | |
| 728 | 727 | /* VF side vfpf channel functions */ |
| @@ -752,6 +751,7 @@ static inline int bnx2x_vf_ustorm_prods_offset(struct bnx2x *bp, · 23 unmodified lines | ||
| 752 | 751 | } |
| 753 | 752 | |
| 754 | 753 | enum sample_bulletin_result bnx2x_sample_bulletin(struct bnx2x *bp); |
| 754 | +void bnx2x_timer_sriov(struct bnx2x *bp); | |
| 755 | 755 | void __iomem *bnx2x_vf_doorbells(struct bnx2x *bp); |
| 756 | 756 | int bnx2x_vf_pci_alloc(struct bnx2x *bp); |
| 757 | 757 | int bnx2x_enable_sriov(struct bnx2x *bp); |
| @@ -762,6 +762,7 @@ static inline int bnx2x_vf_headroom(struct bnx2x *bp) · 4 unmodified lines | ||
| 762 | 762 | } |
| 763 | 763 | void bnx2x_pf_set_vfs_vlan(struct bnx2x *bp); |
| 764 | 764 | int bnx2x_sriov_configure(struct pci_dev *dev, int num_vfs); |
| 765 | +void bnx2x_iov_channel_down(struct bnx2x *bp); | |
| 765 | 766 | int bnx2x_open_epilog(struct bnx2x *bp); |
| 766 | 767 | |
| 767 | 768 | #else /* CONFIG_BNX2X_SRIOV */ |
| @@ -809,6 +810,7 @@ static inline enum sample_bulletin_result bnx2x_sample_bulletin(struct bnx2x *bp · 41 unmodified lines | ||
| 809 | 810 | { |
| 810 | 811 | return PFVF_BULLETIN_UNCHANGED; |
| 811 | 812 | } |
| 813 | +static inline void bnx2x_timer_sriov(struct bnx2x *bp) {} | |
| 812 | 814 | |
| 813 | 815 | static inline void __iomem *bnx2x_vf_doorbells(struct bnx2x *bp) |
| 814 | 816 | { |
| @@ -818,6 +820,7 @@ static inline void __iomem *bnx2x_vf_doorbells(struct bnx2x *bp) · 3 unmodified lines | ||
| 818 | 820 | static inline int bnx2x_vf_pci_alloc(struct bnx2x *bp) {return 0; } |
| 819 | 821 | static inline void bnx2x_pf_set_vfs_vlan(struct bnx2x *bp) {} |
| 820 | 822 | static inline int bnx2x_sriov_configure(struct pci_dev *dev, int num_vfs) {return 0; } |
| 823 | +static inline void bnx2x_iov_channel_down(struct bnx2x *bp) {} | |
| 821 | 824 | static inline int bnx2x_open_epilog(struct bnx2x *bp) {return 0; } |
| 822 | 825 | |
| 823 | 826 | #endif /* CONFIG_BNX2X_SRIOV */ |
| @@ -1002,7 +1002,6 @@ static int bnx2x_storm_stats_update(struct bnx2x *bp) · 1001 unmodified lines | ||
| 1002 | 1002 | qstats->valid_bytes_received_lo = |
| 1003 | 1003 | qstats->total_bytes_received_lo; |
| 1004 | 1004 | |
| 1005 | − | |
| 1006 | 1005 | UPDATE_EXTEND_TSTAT(rcv_ucast_pkts, |
| 1007 | 1006 | total_unicast_packets_received); |
| 1008 | 1007 | UPDATE_EXTEND_TSTAT(rcv_mcast_pkts, |
| @@ -40,7 +40,6 @@ struct nig_stats { · 39 unmodified lines | ||
| 40 | 40 | u32 egress_mac_pkt1_hi; |
| 41 | 41 | }; |
| 42 | 42 | |
| 43 | − | |
| 44 | 43 | enum bnx2x_stats_event { |
| 45 | 44 | STATS_EVENT_PMF = 0, |
| 46 | 45 | STATS_EVENT_LINK_UP, |
| @@ -208,7 +207,6 @@ struct bnx2x_eth_stats { · 161 unmodified lines | ||
| 208 | 207 | u32 eee_tx_lpi; |
| 209 | 208 | }; |
| 210 | 209 | |
| 211 | − | |
| 212 | 210 | struct bnx2x_eth_q_stats { |
| 213 | 211 | u32 total_unicast_bytes_received_hi; |
| 214 | 212 | u32 total_unicast_bytes_received_lo; |
| @@ -331,7 +329,6 @@ struct bnx2x_fw_port_stats_old { · 116 unmodified lines | ||
| 331 | 329 | u32 mac_discard; |
| 332 | 330 | }; |
| 333 | 331 | |
| 334 | − | |
| 335 | 332 | /**************************************************************************** |
| 336 | 333 | * Macros |
| 337 | 334 | ****************************************************************************/ |
| @@ -536,7 +533,6 @@ struct bnx2x_fw_port_stats_old { · 198 unmodified lines | ||
| 536 | 533 | SUB_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \ |
| 537 | 534 | } while (0) |
| 538 | 535 | |
| 539 | − | |
| 540 | 536 | /* forward */ |
| 541 | 537 | struct bnx2x; |
| 542 | 538 | |
| @@ -113,7 +113,7 @@ static int bnx2x_send_msg2pf(struct bnx2x *bp, u8 *done, dma_addr_t msg_mapping) · 112 unmodified lines | ||
| 113 | 113 | { |
| 114 | 114 | struct cstorm_vf_zone_data __iomem *zone_data = |
| 115 | 115 | REG_ADDR(bp, PXP_VF_ADDR_CSDM_GLOBAL_START); |
| 116 | − int tout = 600, interval = 100; /* wait for 60 seconds */ | |
| 116 | + int tout = 100, interval = 100; /* wait for 10 seconds */ | |
| 117 | 117 | |
| 118 | 118 | if (*done) { |
| 119 | 119 | BNX2X_ERR("done was non zero before message to pf was sent\n"); |
| @@ -121,6 +121,16 @@ static int bnx2x_send_msg2pf(struct bnx2x *bp, u8 *done, dma_addr_t msg_mapping) · 1 unmodified line | ||
| 121 | 121 | return -EINVAL; |
| 122 | 122 | } |
| 123 | 123 | |
| 124 | + /* if PF indicated channel is down avoid sending message. Return success | |
| 125 | + * so calling flow can continue | |
| 126 | + */ | |
| 127 | + bnx2x_sample_bulletin(bp); | |
| 128 | + if (bp->old_bulletin.valid_bitmap & 1 << CHANNEL_DOWN) { | |
| 129 | + DP(BNX2X_MSG_IOV, "detecting channel down. Aborting message\n"); | |
| 130 | + *done = PFVF_STATUS_SUCCESS; | |
| 131 | + return 0; | |
| 132 | + } | |
| 133 | + | |
| 124 | 134 | /* Write message address */ |
| 125 | 135 | writel(U64_LO(msg_mapping), |
| 126 | 136 | &zone_data->non_trigger.vf_pf_channel.msg_addr_lo); |
| @@ -233,7 +243,7 @@ int bnx2x_vfpf_acquire(struct bnx2x *bp, u8 tx_count, u8 rx_count) · 106 unmodified lines | ||
| 233 | 243 | |
| 234 | 244 | attempts++; |
| 235 | 245 | |
| 236 | − /* test whether the PF accepted our request. If not, humble the | |
| 246 | + /* test whether the PF accepted our request. If not, humble | |
| 237 | 247 | * the request and try again. |
| 238 | 248 | */ |
| 239 | 249 | if (bp->acquire_resp.hdr.status == PFVF_STATUS_SUCCESS) { |
| @@ -333,7 +343,7 @@ int bnx2x_vfpf_release(struct bnx2x *bp) · 93 unmodified lines | ||
| 333 | 343 | DP(BNX2X_MSG_SP, "vf released\n"); |
| 334 | 344 | } else { |
| 335 | 345 | /* PF reports error */ |
| 336 | − BNX2X_ERR("PF failed our release request - are we out of sync? response status: %d\n", | |
| 346 | + BNX2X_ERR("PF failed our release request - are we out of sync? Response status: %d\n", | |
| 337 | 347 | resp->hdr.status); |
| 338 | 348 | rc = -EAGAIN; |
| 339 | 349 | goto out; |
| @@ -787,7 +797,7 @@ static inline void bnx2x_set_vf_mbxs_valid(struct bnx2x *bp) · 447 unmodified lines | ||
| 787 | 797 | storm_memset_vf_mbx_valid(bp, bnx2x_vf(bp, i, abs_vfid)); |
| 788 | 798 | } |
| 789 | 799 | |
| 790 | −/* enable vf_pf mailbox (aka vf-pf-chanell) */ | |
| 800 | +/* enable vf_pf mailbox (aka vf-pf-channel) */ | |
| 791 | 801 | void bnx2x_vf_enable_mbx(struct bnx2x *bp, u8 abs_vfid) |
| 792 | 802 | { |
| 793 | 803 | bnx2x_vf_flr_clnup_epilog(bp, abs_vfid); |
| @@ -844,7 +854,6 @@ static int bnx2x_copy32_vf_dmae(struct bnx2x *bp, u8 from_vf, · 50 unmodified lines | ||
| 844 | 854 | dmae.dst_addr_hi = vf_addr_hi; |
| 845 | 855 | } |
| 846 | 856 | dmae.len = len32; |
| 847 | − bnx2x_dp_dmae(bp, &dmae, BNX2X_MSG_DMAE); | |
| 848 | 857 | |
| 849 | 858 | /* issue the command and wait for completion */ |
| 850 | 859 | return bnx2x_issue_dmae_with_comp(bp, &dmae); |
| @@ -1072,7 +1081,7 @@ static void bnx2x_vf_mbx_set_q_flags(struct bnx2x *bp, u32 mbx_q_flags, · 221 unmodified lines | ||
| 1072 | 1081 | if (mbx_q_flags & VFPF_QUEUE_FLG_DHC) |
| 1073 | 1082 | __set_bit(BNX2X_Q_FLG_DHC, sp_q_flags); |
| 1074 | 1083 | |
| 1075 | − /* outer vlan removal is set according to the PF's multi fuction mode */ | |
| 1084 | + /* outer vlan removal is set according to PF's multi function mode */ | |
| 1076 | 1085 | if (IS_MF_SD(bp)) |
| 1077 | 1086 | __set_bit(BNX2X_Q_FLG_OV, sp_q_flags); |
| 1078 | 1087 | } |
| @@ -1104,7 +1113,7 @@ static void bnx2x_vf_mbx_setup_q(struct bnx2x *bp, struct bnx2x_virtf *vf, · 25 unmodified lines | ||
| 1104 | 1113 | struct bnx2x_queue_init_params *init_p; |
| 1105 | 1114 | struct bnx2x_queue_setup_params *setup_p; |
| 1106 | 1115 | |
| 1107 | − /* reinit the VF operation context */ | |
| 1116 | + /* re-init the VF operation context */ | |
| 1108 | 1117 | memset(&vf->op_params.qctor, 0 , sizeof(vf->op_params.qctor)); |
| 1109 | 1118 | setup_p = &vf->op_params.qctor.prep_qsetup; |
| 1110 | 1119 | init_p = &vf->op_params.qctor.qstate.params.init; |
| @@ -1588,8 +1597,9 @@ static void bnx2x_vf_mbx_request(struct bnx2x *bp, struct bnx2x_virtf *vf, · 477 unmodified lines | ||
| 1588 | 1597 | * support them. Or this may be because someone wrote a crappy |
| 1589 | 1598 | * VF driver and is sending garbage over the channel. |
| 1590 | 1599 | */ |
| 1591 | − BNX2X_ERR("unknown TLV. type %d length %d. first 20 bytes of mailbox buffer:\n", | |
| 1592 | − mbx->first_tlv.tl.type, mbx->first_tlv.tl.length); | |
| 1600 | + BNX2X_ERR("unknown TLV. type %d length %d vf->state was %d. first 20 bytes of mailbox buffer:\n", | |
| 1601 | + mbx->first_tlv.tl.type, mbx->first_tlv.tl.length, | |
| 1602 | + vf->state); | |
| 1593 | 1603 | for (i = 0; i < 20; i++) |
| 1594 | 1604 | DP_CONT(BNX2X_MSG_IOV, "%x ", |
| 1595 | 1605 | mbx->msg->req.tlv_buf_size.tlv_buffer[i]); |
| @@ -1605,8 +1615,11 @@ static void bnx2x_vf_mbx_request(struct bnx2x *bp, struct bnx2x_virtf *vf, · 9 unmodified lines | ||
| 1605 | 1615 | bnx2x_vf_mbx_resp(bp, vf); |
| 1606 | 1616 | } else { |
| 1607 | 1617 | /* can't send a response since this VF is unknown to us |
| 1608 | − * just unlock the channel and be done with. | |
| 1618 | + * just ack the FW to release the mailbox and unlock | |
| 1619 | + * the channel. | |
| 1609 | 1620 | */ |
| 1621 | + storm_memset_vf_mbx_ack(bp, vf->abs_vfid); | |
| 1622 | + mmiowb(); | |
| 1610 | 1623 | bnx2x_unlock_vf_pf_channel(bp, vf, |
| 1611 | 1624 | mbx->first_tlv.tl.type); |
| 1612 | 1625 | } |
| @@ -331,7 +331,10 @@ struct pf_vf_bulletin_content { · 330 unmodified lines | ||
| 331 | 331 | #define VLAN_VALID 1 /* when set, the vf should not access |
| 332 | 332 | * the vfpf channel |
| 333 | 333 | */ |
| 334 | − | |
| 334 | +#define CHANNEL_DOWN 2 /* vfpf channel is disabled. VFs are not | |
| 335 | + * to attempt to send messages on the | |
| 336 | + * channel after this bit is set | |
| 337 | + */ | |
| 335 | 338 | u8 mac[ETH_ALEN]; |
| 336 | 339 | u8 mac_padding[2]; |
| 337 | 340 | |
| @@ -5622,7 +5622,7 @@ static void cnic_rcv_netevent(struct cnic_local *cp, unsigned long event, · 5621 unmodified lines | ||
| 5622 | 5622 | static int cnic_netdev_event(struct notifier_block *this, unsigned long event, |
| 5623 | 5623 | void *ptr) |
| 5624 | 5624 | { |
| 5625 | − struct net_device *netdev = ptr; | |
| 5625 | + struct net_device *netdev = netdev_notifier_info_to_dev(ptr); | |
| 5626 | 5626 | struct cnic_dev *dev; |
| 5627 | 5627 | int new_dev = 0; |
| 5628 | 5628 | |
| @@ -2197,7 +2197,7 @@ static const struct net_device_ops sbmac_netdev_ops = { · 2196 unmodified lines | ||
| 2197 | 2197 | |
| 2198 | 2198 | static int sbmac_init(struct platform_device *pldev, long long base) |
| 2199 | 2199 | { |
| 2200 | − struct net_device *dev = dev_get_drvdata(&pldev->dev); | |
| 2200 | + struct net_device *dev = platform_get_drvdata(pldev); | |
| 2201 | 2201 | int idx = pldev->id; |
| 2202 | 2202 | struct sbmac_softc *sc = netdev_priv(dev); |
| 2203 | 2203 | unsigned char *eaddr; |
| @@ -2275,7 +2275,7 @@ static int sbmac_init(struct platform_device *pldev, long long base) · 71 unmodified lines | ||
| 2275 | 2275 | dev->name); |
| 2276 | 2276 | goto free_mdio; |
| 2277 | 2277 | } |
| 2278 | − dev_set_drvdata(&pldev->dev, sc->mii_bus); | |
| 2278 | + platform_set_drvdata(pldev, sc->mii_bus); | |
| 2279 | 2279 | |
| 2280 | 2280 | err = register_netdev(dev); |
| 2281 | 2281 | if (err) { |
| @@ -2300,7 +2300,6 @@ static int sbmac_init(struct platform_device *pldev, long long base) · 18 unmodified lines | ||
| 2300 | 2300 | return 0; |
| 2301 | 2301 | unreg_mdio: |
| 2302 | 2302 | mdiobus_unregister(sc->mii_bus); |
| 2303 | − dev_set_drvdata(&pldev->dev, NULL); | |
| 2304 | 2303 | free_mdio: |
| 2305 | 2304 | mdiobus_free(sc->mii_bus); |
| 2306 | 2305 | uninit_ctx: |
| @@ -2624,7 +2623,7 @@ static int sbmac_probe(struct platform_device *pldev) · 317 unmodified lines | ||
| 2624 | 2623 | goto out_unmap; |
| 2625 | 2624 | } |
| 2626 | 2625 | |
| 2627 | − dev_set_drvdata(&pldev->dev, dev); | |
| 2626 | + platform_set_drvdata(pldev, dev); | |
| 2628 | 2627 | SET_NETDEV_DEV(dev, &pldev->dev); |
| 2629 | 2628 | |
| 2630 | 2629 | sc = netdev_priv(dev); |
| @@ -2649,7 +2648,7 @@ out_out: · 18 unmodified lines | ||
| 2649 | 2648 | |
| 2650 | 2649 | static int __exit sbmac_remove(struct platform_device *pldev) |
| 2651 | 2650 | { |
| 2652 | − struct net_device *dev = dev_get_drvdata(&pldev->dev); | |
| 2651 | + struct net_device *dev = platform_get_drvdata(pldev); | |
| 2653 | 2652 | struct sbmac_softc *sc = netdev_priv(dev); |
| 2654 | 2653 | |
| 2655 | 2654 | unregister_netdev(dev); |
| @@ -968,9 +968,6 @@ static void tg3_ape_driver_state_change(struct tg3 *tp, int kind) · 967 unmodified lines | ||
| 968 | 968 | |
| 969 | 969 | event = APE_EVENT_STATUS_STATE_UNLOAD; |
| 970 | 970 | break; |
| 971 | − case RESET_KIND_SUSPEND: | |
| 972 | − event = APE_EVENT_STATUS_STATE_SUSPEND; | |
| 973 | − break; | |
| 974 | 971 | default: |
| 975 | 972 | return; |
| 976 | 973 | } |
| @@ -1317,8 +1314,8 @@ static int tg3_phy_toggle_auxctl_smdsp(struct tg3 *tp, bool enable) · 340 unmodified lines | ||
| 1317 | 1314 | |
| 1318 | 1315 | if (err) |
| 1319 | 1316 | return err; |
| 1320 | − if (enable) | |
| 1321 | 1317 | |
| 1318 | + if (enable) | |
| 1322 | 1319 | val |= MII_TG3_AUXCTL_ACTL_SMDSP_ENA; |
| 1323 | 1320 | else |
| 1324 | 1321 | val &= ~MII_TG3_AUXCTL_ACTL_SMDSP_ENA; |
| @@ -1745,10 +1742,6 @@ static void tg3_write_sig_pre_reset(struct tg3 *tp, int kind) · 420 unmodified lines | ||
| 1745 | 1742 | break; |
| 1746 | 1743 | } |
| 1747 | 1744 | } |
| 1748 | − | |
| 1749 | − if (kind == RESET_KIND_INIT || | |
| 1750 | − kind == RESET_KIND_SUSPEND) | |
| 1751 | − tg3_ape_driver_state_change(tp, kind); | |
| 1752 | 1745 | } |
| 1753 | 1746 | |
| 1754 | 1747 | /* tp->lock is held. */ |
| @@ -1770,9 +1763,6 @@ static void tg3_write_sig_post_reset(struct tg3 *tp, int kind) · 15 unmodified lines | ||
| 1770 | 1763 | break; |
| 1771 | 1764 | } |
| 1772 | 1765 | } |
| 1773 | − | |
| 1774 | − if (kind == RESET_KIND_SHUTDOWN) | |
| 1775 | − tg3_ape_driver_state_change(tp, kind); | |
| 1776 | 1766 | } |
| 1777 | 1767 | |
| 1778 | 1768 | /* tp->lock is held. */ |
| @@ -2341,6 +2331,46 @@ static void tg3_phy_apply_otp(struct tg3 *tp) · 562 unmodified lines | ||
| 2341 | 2331 | tg3_phy_toggle_auxctl_smdsp(tp, false); |
| 2342 | 2332 | } |
| 2343 | 2333 | |
| 2334 | +static void tg3_eee_pull_config(struct tg3 *tp, struct ethtool_eee *eee) | |
| 2335 | +{ | |
| 2336 | + u32 val; | |
| 2337 | + struct ethtool_eee *dest = &tp->eee; | |
| 2338 | + | |
| 2339 | + if (!(tp->phy_flags & TG3_PHYFLG_EEE_CAP)) | |
| 2340 | + return; | |
| 2341 | + | |
| 2342 | + if (eee) | |
| 2343 | + dest = eee; | |
| 2344 | + | |
| 2345 | + if (tg3_phy_cl45_read(tp, MDIO_MMD_AN, TG3_CL45_D7_EEERES_STAT, &val)) | |
| 2346 | + return; | |
| 2347 | + | |
| 2348 | + /* Pull eee_active */ | |
| 2349 | + if (val == TG3_CL45_D7_EEERES_STAT_LP_1000T || | |
| 2350 | + val == TG3_CL45_D7_EEERES_STAT_LP_100TX) { | |
| 2351 | + dest->eee_active = 1; | |
| 2352 | + } else | |
| 2353 | + dest->eee_active = 0; | |
| 2354 | + | |
| 2355 | + /* Pull lp advertised settings */ | |
| 2356 | + if (tg3_phy_cl45_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE, &val)) | |
| 2357 | + return; | |
| 2358 | + dest->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val); | |
| 2359 | + | |
| 2360 | + /* Pull advertised and eee_enabled settings */ | |
| 2361 | + if (tg3_phy_cl45_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, &val)) | |
| 2362 | + return; | |
| 2363 | + dest->eee_enabled = !!val; | |
| 2364 | + dest->advertised = mmd_eee_adv_to_ethtool_adv_t(val); | |
| 2365 | + | |
| 2366 | + /* Pull tx_lpi_enabled */ | |
| 2367 | + val = tr32(TG3_CPMU_EEE_MODE); | |
| 2368 | + dest->tx_lpi_enabled = !!(val & TG3_CPMU_EEEMD_LPI_IN_TX); | |
| 2369 | + | |
| 2370 | + /* Pull lpi timer value */ | |
| 2371 | + dest->tx_lpi_timer = tr32(TG3_CPMU_EEE_DBTMR1) & 0xffff; | |
| 2372 | +} | |
| 2373 | + | |
| 2344 | 2374 | static void tg3_phy_eee_adjust(struct tg3 *tp, bool current_link_up) |
| 2345 | 2375 | { |
| 2346 | 2376 | u32 val; |
| @@ -2364,11 +2394,8 @@ static void tg3_phy_eee_adjust(struct tg3 *tp, bool current_link_up) · 17 unmodified lines | ||
| 2364 | 2394 | |
| 2365 | 2395 | tw32(TG3_CPMU_EEE_CTRL, eeectl); |
| 2366 | 2396 | |
| 2367 | − tg3_phy_cl45_read(tp, MDIO_MMD_AN, | |
| 2368 | − TG3_CL45_D7_EEERES_STAT, &val); | |
| 2369 | − | |
| 2370 | − if (val == TG3_CL45_D7_EEERES_STAT_LP_1000T || | |
| 2371 | − val == TG3_CL45_D7_EEERES_STAT_LP_100TX) | |
| 2397 | + tg3_eee_pull_config(tp, NULL); | |
| 2398 | + if (tp->eee.eee_active) | |
| 2372 | 2399 | tp->setlpicnt = 2; |
| 2373 | 2400 | } |
| 2374 | 2401 | |
| @@ -4192,6 +4219,8 @@ static int tg3_power_down_prepare(struct tg3 *tp) · 1817 unmodified lines | ||
| 4192 | 4219 | |
| 4193 | 4220 | tg3_write_sig_post_reset(tp, RESET_KIND_SHUTDOWN); |
| 4194 | 4221 | |
| 4222 | + tg3_ape_driver_state_change(tp, RESET_KIND_SHUTDOWN); | |
| 4223 | + | |
| 4195 | 4224 | return 0; |
| 4196 | 4225 | } |
| 4197 | 4226 | |
| @@ -4292,6 +4321,16 @@ static int tg3_phy_autoneg_cfg(struct tg3 *tp, u32 advertise, u32 flowctrl) · 94 unmodified lines | ||
| 4292 | 4321 | /* Advertise 1000-BaseT EEE ability */ |
| 4293 | 4322 | if (advertise & ADVERTISED_1000baseT_Full) |
| 4294 | 4323 | val |= MDIO_AN_EEE_ADV_1000T; |
| 4324 | + | |
| 4325 | + if (!tp->eee.eee_enabled) { | |
| 4326 | + val = 0; | |
| 4327 | + tp->eee.advertised = 0; | |
| 4328 | + } else { | |
| 4329 | + tp->eee.advertised = advertise & | |
| 4330 | + (ADVERTISED_100baseT_Full | | |
| 4331 | + ADVERTISED_1000baseT_Full); | |
| 4332 | + } | |
| 4333 | + | |
| 4295 | 4334 | err = tg3_phy_cl45_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val); |
| 4296 | 4335 | if (err) |
| 4297 | 4336 | val = 0; |
| @@ -4536,26 +4575,23 @@ static int tg3_init_5401phy_dsp(struct tg3 *tp) · 238 unmodified lines | ||
| 4536 | 4575 | |
| 4537 | 4576 | static bool tg3_phy_eee_config_ok(struct tg3 *tp) |
| 4538 | 4577 | { |
| 4539 | − u32 val; | |
| 4540 | − u32 tgtadv = 0; | |
| 4541 | − u32 advertising = tp->link_config.advertising; | |
| 4578 | + struct ethtool_eee eee; | |
| 4542 | 4579 | |
| 4543 | 4580 | if (!(tp->phy_flags & TG3_PHYFLG_EEE_CAP)) |
| 4544 | 4581 | return true; |
| 4545 | 4582 | |
| 4546 | − if (tg3_phy_cl45_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, &val)) | |
| 4547 | − return false; | |
| 4548 | − | |
| 4549 | − val &= (MDIO_AN_EEE_ADV_100TX | MDIO_AN_EEE_ADV_1000T); | |
| 4550 | − | |
| 4551 | − | |
| 4552 | − if (advertising & ADVERTISED_100baseT_Full) | |
| 4553 | − tgtadv |= MDIO_AN_EEE_ADV_100TX; | |
| 4554 | − if (advertising & ADVERTISED_1000baseT_Full) | |
| 4555 | − tgtadv |= MDIO_AN_EEE_ADV_1000T; | |
| 4583 | + tg3_eee_pull_config(tp, &eee); | |
| 4556 | 4584 | |
| 4557 | − if (val != tgtadv) | |
| 4558 | − return false; | |
| 4585 | + if (tp->eee.eee_enabled) { | |
| 4586 | + if (tp->eee.advertised != eee.advertised || | |
| 4587 | + tp->eee.tx_lpi_timer != eee.tx_lpi_timer || | |
| 4588 | + tp->eee.tx_lpi_enabled != eee.tx_lpi_enabled) | |
| 4589 | + return false; | |
| 4590 | + } else { | |
| 4591 | + /* EEE is disabled but we're advertising */ | |
| 4592 | + if (eee.advertised) | |
| 4593 | + return false; | |
| 4594 | + } | |
| 4559 | 4595 | |
| 4560 | 4596 | return true; |
| 4561 | 4597 | } |
| @@ -4656,6 +4692,42 @@ static void tg3_clear_mac_status(struct tg3 *tp) · 94 unmodified lines | ||
| 4656 | 4692 | udelay(40); |
| 4657 | 4693 | } |
| 4658 | 4694 | |
| 4695 | +static void tg3_setup_eee(struct tg3 *tp) | |
| 4696 | +{ | |
| 4697 | + u32 val; | |
| 4698 | + | |
| 4699 | + val = TG3_CPMU_EEE_LNKIDL_PCIE_NL0 | | |
| 4700 | + TG3_CPMU_EEE_LNKIDL_UART_IDL; | |
| 4701 | + if (tg3_chip_rev_id(tp) == CHIPREV_ID_57765_A0) | |
| 4702 | + val |= TG3_CPMU_EEE_LNKIDL_APE_TX_MT; | |
| 4703 | + | |
| 4704 | + tw32_f(TG3_CPMU_EEE_LNKIDL_CTRL, val); | |
| 4705 | + | |
| 4706 | + tw32_f(TG3_CPMU_EEE_CTRL, | |
| 4707 | + TG3_CPMU_EEE_CTRL_EXIT_20_1_US); | |
| 4708 | + | |
| 4709 | + val = TG3_CPMU_EEEMD_ERLY_L1_XIT_DET | | |
| 4710 | + (tp->eee.tx_lpi_enabled ? TG3_CPMU_EEEMD_LPI_IN_TX : 0) | | |
| 4711 | + TG3_CPMU_EEEMD_LPI_IN_RX | | |
| 4712 | + TG3_CPMU_EEEMD_EEE_ENABLE; | |
| 4713 | + | |
| 4714 | + if (tg3_asic_rev(tp) != ASIC_REV_5717) | |
| 4715 | + val |= TG3_CPMU_EEEMD_SND_IDX_DET_EN; | |
| 4716 | + | |
| 4717 | + if (tg3_flag(tp, ENABLE_APE)) | |
| 4718 | + val |= TG3_CPMU_EEEMD_APE_TX_DET_EN; | |
| 4719 | + | |
| 4720 | + tw32_f(TG3_CPMU_EEE_MODE, tp->eee.eee_enabled ? val : 0); | |
| 4721 | + | |
| 4722 | + tw32_f(TG3_CPMU_EEE_DBTMR1, | |
| 4723 | + TG3_CPMU_DBTMR1_PCIEXIT_2047US | | |
| 4724 | + (tp->eee.tx_lpi_timer & 0xffff)); | |
| 4725 | + | |
| 4726 | + tw32_f(TG3_CPMU_EEE_DBTMR2, | |
| 4727 | + TG3_CPMU_DBTMR2_APE_TX_2047US | | |
| 4728 | + TG3_CPMU_DBTMR2_TXIDXEQ_2047US); | |
| 4729 | +} | |
| 4730 | + | |
| 4659 | 4731 | static int tg3_setup_copper_phy(struct tg3 *tp, bool force_reset) |
| 4660 | 4732 | { |
| 4661 | 4733 | bool current_link_up; |
| @@ -4822,8 +4894,10 @@ static int tg3_setup_copper_phy(struct tg3 *tp, bool force_reset) · 160 unmodified lines | ||
| 4822 | 4894 | */ |
| 4823 | 4895 | if (!eee_config_ok && |
| 4824 | 4896 | (tp->phy_flags & TG3_PHYFLG_KEEP_LINK_ON_PWRDN) && |
| 4825 | − !force_reset) | |
| 4897 | + !force_reset) { | |
| 4898 | + tg3_setup_eee(tp); | |
| 4826 | 4899 | tg3_phy_reset(tp); |
| 4900 | + } | |
| 4827 | 4901 | } else { |
| 4828 | 4902 | if (!(bmcr & BMCR_ANENABLE) && |
| 4829 | 4903 | tp->link_config.speed == current_speed && |
| @@ -6335,9 +6409,7 @@ static void tg3_tx_recover(struct tg3 *tp) · 1505 unmodified lines | ||
| 6335 | 6409 | "Please report the problem to the driver maintainer " |
| 6336 | 6410 | "and include system chipset information.\n"); |
| 6337 | 6411 | |
| 6338 | − spin_lock(&tp->lock); | |
| 6339 | 6412 | tg3_flag_set(tp, TX_RECOVERY_PENDING); |
| 6340 | − spin_unlock(&tp->lock); | |
| 6341 | 6413 | } |
| 6342 | 6414 | |
| 6343 | 6415 | static inline u32 tg3_tx_avail(struct tg3_napi *tnapi) |
| @@ -9205,11 +9277,9 @@ static void __tg3_set_coalesce(struct tg3 *tp, struct ethtool_coalesce *ec) · 2861 unmodified lines | ||
| 9205 | 9277 | } |
| 9206 | 9278 | |
| 9207 | 9279 | /* tp->lock is held. */ |
| 9208 | −static void tg3_rings_reset(struct tg3 *tp) | |
| 9280 | +static void tg3_tx_rcbs_disable(struct tg3 *tp) | |
| 9209 | 9281 | { |
| 9210 | − int i; | |
| 9211 | − u32 stblk, txrcb, rxrcb, limit; | |
| 9212 | − struct tg3_napi *tnapi = &tp->napi[0]; | |
| 9282 | + u32 txrcb, limit; | |
| 9213 | 9283 | |
| 9214 | 9284 | /* Disable all transmit rings but the first. */ |
| 9215 | 9285 | if (!tg3_flag(tp, 5705_PLUS)) |
| @@ -9226,7 +9296,33 @@ static void tg3_rings_reset(struct tg3 *tp) · 10 unmodified lines | ||
| 9226 | 9296 | txrcb < limit; txrcb += TG3_BDINFO_SIZE) |
| 9227 | 9297 | tg3_write_mem(tp, txrcb + TG3_BDINFO_MAXLEN_FLAGS, |
| 9228 | 9298 | BDINFO_FLAGS_DISABLED); |
| 9299 | +} | |
| 9300 | + | |
| 9301 | +/* tp->lock is held. */ | |
| 9302 | +static void tg3_tx_rcbs_init(struct tg3 *tp) | |
| 9303 | +{ | |
| 9304 | + int i = 0; | |
| 9305 | + u32 txrcb = NIC_SRAM_SEND_RCB; | |
| 9306 | + | |
| 9307 | + if (tg3_flag(tp, ENABLE_TSS)) | |
| 9308 | + i++; | |
| 9309 | + | |
| 9310 | + for (; i < tp->irq_max; i++, txrcb += TG3_BDINFO_SIZE) { | |
| 9311 | + struct tg3_napi *tnapi = &tp->napi[i]; | |
| 9312 | + | |
| 9313 | + if (!tnapi->tx_ring) | |
| 9314 | + continue; | |
| 9315 | + | |
| 9316 | + tg3_set_bdinfo(tp, txrcb, tnapi->tx_desc_mapping, | |
| 9317 | + (TG3_TX_RING_SIZE << BDINFO_FLAGS_MAXLEN_SHIFT), | |
| 9318 | + NIC_SRAM_TX_BUFFER_DESC); | |
| 9319 | + } | |
| 9320 | +} | |
| 9229 | 9321 | |
| 9322 | +/* tp->lock is held. */ | |
| 9323 | +static void tg3_rx_ret_rcbs_disable(struct tg3 *tp) | |
| 9324 | +{ | |
| 9325 | + u32 rxrcb, limit; | |
| 9230 | 9326 | |
| 9231 | 9327 | /* Disable all receive return rings but the first. */ |
| 9232 | 9328 | if (tg3_flag(tp, 5717_PLUS)) |
| @@ -9244,6 +9340,39 @@ static void tg3_rings_reset(struct tg3 *tp) · 11 unmodified lines | ||
| 9244 | 9340 | rxrcb < limit; rxrcb += TG3_BDINFO_SIZE) |
| 9245 | 9341 | tg3_write_mem(tp, rxrcb + TG3_BDINFO_MAXLEN_FLAGS, |
| 9246 | 9342 | BDINFO_FLAGS_DISABLED); |
| 9343 | +} | |
| 9344 | + | |
| 9345 | +/* tp->lock is held. */ | |
| 9346 | +static void tg3_rx_ret_rcbs_init(struct tg3 *tp) | |
| 9347 | +{ | |
| 9348 | + int i = 0; | |
| 9349 | + u32 rxrcb = NIC_SRAM_RCV_RET_RCB; | |
| 9350 | + | |
| 9351 | + if (tg3_flag(tp, ENABLE_RSS)) | |
| 9352 | + i++; | |
| 9353 | + | |
| 9354 | + for (; i < tp->irq_max; i++, rxrcb += TG3_BDINFO_SIZE) { | |
| 9355 | + struct tg3_napi *tnapi = &tp->napi[i]; | |
| 9356 | + | |
| 9357 | + if (!tnapi->rx_rcb) | |
| 9358 | + continue; | |
| 9359 | + | |
| 9360 | + tg3_set_bdinfo(tp, rxrcb, tnapi->rx_rcb_mapping, | |
| 9361 | + (tp->rx_ret_ring_mask + 1) << | |
| 9362 | + BDINFO_FLAGS_MAXLEN_SHIFT, 0); | |
| 9363 | + } | |
| 9364 | +} | |
| 9365 | + | |
| 9366 | +/* tp->lock is held. */ | |
| 9367 | +static void tg3_rings_reset(struct tg3 *tp) | |
| 9368 | +{ | |
| 9369 | + int i; | |
| 9370 | + u32 stblk; | |
| 9371 | + struct tg3_napi *tnapi = &tp->napi[0]; | |
| 9372 | + | |
| 9373 | + tg3_tx_rcbs_disable(tp); | |
| 9374 | + | |
| 9375 | + tg3_rx_ret_rcbs_disable(tp); | |
| 9247 | 9376 | |
| 9248 | 9377 | /* Disable interrupts */ |
| 9249 | 9378 | tw32_mailbox_f(tp->napi[0].int_mbox, 1); |
| @@ -9280,9 +9409,6 @@ static void tg3_rings_reset(struct tg3 *tp) · 30 unmodified lines | ||
| 9280 | 9409 | tw32_tx_mbox(mbox + i * 8, 0); |
| 9281 | 9410 | } |
| 9282 | 9411 | |
| 9283 | − txrcb = NIC_SRAM_SEND_RCB; | |
| 9284 | − rxrcb = NIC_SRAM_RCV_RET_RCB; | |
| 9285 | − | |
| 9286 | 9412 | /* Clear status block in ram. */ |
| 9287 | 9413 | memset(tnapi->hw_status, 0, TG3_HW_STATUS_SIZE); |
| 9288 | 9414 | |
| @@ -9292,46 +9418,20 @@ static void tg3_rings_reset(struct tg3 *tp) · 3 unmodified lines | ||
| 9292 | 9418 | tw32(HOSTCC_STATUS_BLK_HOST_ADDR + TG3_64BIT_REG_LOW, |
| 9293 | 9419 | ((u64) tnapi->status_mapping & 0xffffffff)); |
| 9294 | 9420 | |
| 9295 | − if (tnapi->tx_ring) { | |
| 9296 | − tg3_set_bdinfo(tp, txrcb, tnapi->tx_desc_mapping, | |
| 9297 | − (TG3_TX_RING_SIZE << | |
| 9298 | − BDINFO_FLAGS_MAXLEN_SHIFT), | |
| 9299 | − NIC_SRAM_TX_BUFFER_DESC); | |
| 9300 | − txrcb += TG3_BDINFO_SIZE; | |
| 9301 | − } | |
| 9302 | − | |
| 9303 | − if (tnapi->rx_rcb) { | |
| 9304 | − tg3_set_bdinfo(tp, rxrcb, tnapi->rx_rcb_mapping, | |
| 9305 | − (tp->rx_ret_ring_mask + 1) << | |
| 9306 | − BDINFO_FLAGS_MAXLEN_SHIFT, 0); | |
| 9307 | − rxrcb += TG3_BDINFO_SIZE; | |
| 9308 | − } | |
| 9309 | − | |
| 9310 | 9421 | stblk = HOSTCC_STATBLCK_RING1; |
| 9311 | 9422 | |
| 9312 | 9423 | for (i = 1, tnapi++; i < tp->irq_cnt; i++, tnapi++) { |
| 9313 | 9424 | u64 mapping = (u64)tnapi->status_mapping; |
| 9314 | 9425 | tw32(stblk + TG3_64BIT_REG_HIGH, mapping >> 32); |
| 9315 | 9426 | tw32(stblk + TG3_64BIT_REG_LOW, mapping & 0xffffffff); |
| 9427 | + stblk += 8; | |
| 9316 | 9428 | |
| 9317 | 9429 | /* Clear status block in ram. */ |
| 9318 | 9430 | memset(tnapi->hw_status, 0, TG3_HW_STATUS_SIZE); |
| 9319 | − | |
| 9320 | − if (tnapi->tx_ring) { | |
| 9321 | − tg3_set_bdinfo(tp, txrcb, tnapi->tx_desc_mapping, | |
| 9322 | − (TG3_TX_RING_SIZE << | |
| 9323 | − BDINFO_FLAGS_MAXLEN_SHIFT), | |
| 9324 | − NIC_SRAM_TX_BUFFER_DESC); | |
| 9325 | − txrcb += TG3_BDINFO_SIZE; | |
| 9326 | − } | |
| 9327 | − | |
| 9328 | − tg3_set_bdinfo(tp, rxrcb, tnapi->rx_rcb_mapping, | |
| 9329 | − ((tp->rx_ret_ring_mask + 1) << | |
| 9330 | − BDINFO_FLAGS_MAXLEN_SHIFT), 0); | |
| 9331 | − | |
| 9332 | − stblk += 8; | |
| 9333 | − rxrcb += TG3_BDINFO_SIZE; | |
| 9334 | 9431 | } |
| 9432 | + | |
| 9433 | + tg3_tx_rcbs_init(tp); | |
| 9434 | + tg3_rx_ret_rcbs_init(tp); | |
| 9335 | 9435 | } |
| 9336 | 9436 | |
| 9337 | 9437 | static void tg3_setup_rxbd_thresholds(struct tg3 *tp) |
| @@ -9531,46 +9631,17 @@ static int tg3_reset_hw(struct tg3 *tp, bool reset_phy) · 193 unmodified lines | ||
| 9531 | 9631 | if (tg3_flag(tp, INIT_COMPLETE)) |
| 9532 | 9632 | tg3_abort_hw(tp, 1); |
| 9533 | 9633 | |
| 9534 | − /* Enable MAC control of LPI */ | |
| 9535 | − if (tp->phy_flags & TG3_PHYFLG_EEE_CAP) { | |
| 9536 | − val = TG3_CPMU_EEE_LNKIDL_PCIE_NL0 | | |
| 9537 | − TG3_CPMU_EEE_LNKIDL_UART_IDL; | |
| 9538 | − if (tg3_chip_rev_id(tp) == CHIPREV_ID_57765_A0) | |
| 9539 | − val |= TG3_CPMU_EEE_LNKIDL_APE_TX_MT; | |
| 9540 | − | |
| 9541 | − tw32_f(TG3_CPMU_EEE_LNKIDL_CTRL, val); | |
| 9542 | − | |
| 9543 | − tw32_f(TG3_CPMU_EEE_CTRL, | |
| 9544 | − TG3_CPMU_EEE_CTRL_EXIT_20_1_US); | |
| 9545 | − | |
| 9546 | − val = TG3_CPMU_EEEMD_ERLY_L1_XIT_DET | | |
| 9547 | − TG3_CPMU_EEEMD_LPI_IN_TX | | |
| 9548 | − TG3_CPMU_EEEMD_LPI_IN_RX | | |
| 9549 | − TG3_CPMU_EEEMD_EEE_ENABLE; | |
| 9550 | − | |
| 9551 | − if (tg3_asic_rev(tp) != ASIC_REV_5717) | |
| 9552 | − val |= TG3_CPMU_EEEMD_SND_IDX_DET_EN; | |
| 9553 | − | |
| 9554 | − if (tg3_flag(tp, ENABLE_APE)) | |
| 9555 | − val |= TG3_CPMU_EEEMD_APE_TX_DET_EN; | |
| 9556 | − | |
| 9557 | − tw32_f(TG3_CPMU_EEE_MODE, val); | |
| 9558 | − | |
| 9559 | − tw32_f(TG3_CPMU_EEE_DBTMR1, | |
| 9560 | − TG3_CPMU_DBTMR1_PCIEXIT_2047US | | |
| 9561 | − TG3_CPMU_DBTMR1_LNKIDLE_2047US); | |
| 9562 | − | |
| 9563 | − tw32_f(TG3_CPMU_EEE_DBTMR2, | |
| 9564 | − TG3_CPMU_DBTMR2_APE_TX_2047US | | |
| 9565 | − TG3_CPMU_DBTMR2_TXIDXEQ_2047US); | |
| 9566 | − } | |
| 9567 | − | |
| 9568 | 9634 | if ((tp->phy_flags & TG3_PHYFLG_KEEP_LINK_ON_PWRDN) && |
| 9569 | 9635 | !(tp->phy_flags & TG3_PHYFLG_USER_CONFIGURED)) { |
| 9570 | 9636 | tg3_phy_pull_config(tp); |
| 9637 | + tg3_eee_pull_config(tp, NULL); | |
| 9571 | 9638 | tp->phy_flags |= TG3_PHYFLG_USER_CONFIGURED; |
| 9572 | 9639 | } |
| 9573 | 9640 | |
| 9641 | + /* Enable MAC control of LPI */ | |
| 9642 | + if (tp->phy_flags & TG3_PHYFLG_EEE_CAP) | |
| 9643 | + tg3_setup_eee(tp); | |
| 9644 | + | |
| 9574 | 9645 | if (reset_phy) |
| 9575 | 9646 | tg3_phy_reset(tp); |
| 9576 | 9647 | |
| @@ -11226,7 +11297,7 @@ static int tg3_start(struct tg3 *tp, bool reset_phy, bool test_irq, · 1649 unmodified lines | ||
| 11226 | 11297 | */ |
| 11227 | 11298 | err = tg3_alloc_consistent(tp); |
| 11228 | 11299 | if (err) |
| 11229 | − goto err_out1; | |
| 11300 | + goto out_ints_fini; | |
| 11230 | 11301 | |
| 11231 | 11302 | tg3_napi_init(tp); |
| 11232 | 11303 | |
| @@ -11240,12 +11311,15 @@ static int tg3_start(struct tg3 *tp, bool reset_phy, bool test_irq, · 7 unmodified lines | ||
| 11240 | 11311 | tnapi = &tp->napi[i]; |
| 11241 | 11312 | free_irq(tnapi->irq_vec, tnapi); |
| 11242 | 11313 | } |
| 11243 | − goto err_out2; | |
| 11314 | + goto out_napi_fini; | |
| 11244 | 11315 | } |
| 11245 | 11316 | } |
| 11246 | 11317 | |
| 11247 | 11318 | tg3_full_lock(tp, 0); |
| 11248 | 11319 | |
| 11320 | + if (init) | |
| 11321 | + tg3_ape_driver_state_change(tp, RESET_KIND_INIT); | |
| 11322 | + | |
| 11249 | 11323 | err = tg3_init_hw(tp, reset_phy); |
| 11250 | 11324 | if (err) { |
| 11251 | 11325 | tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); |
| @@ -11255,7 +11329,7 @@ static int tg3_start(struct tg3 *tp, bool reset_phy, bool test_irq, · 3 unmodified lines | ||
| 11255 | 11329 | tg3_full_unlock(tp); |
| 11256 | 11330 | |
| 11257 | 11331 | if (err) |
| 11258 | − goto err_out3; | |
| 11332 | + goto out_free_irq; | |
| 11259 | 11333 | |
| 11260 | 11334 | if (test_irq && tg3_flag(tp, USING_MSI)) { |
| 11261 | 11335 | err = tg3_test_msi(tp); |
| @@ -11266,7 +11340,7 @@ static int tg3_start(struct tg3 *tp, bool reset_phy, bool test_irq, · 4 unmodified lines | ||
| 11266 | 11340 | tg3_free_rings(tp); |
| 11267 | 11341 | tg3_full_unlock(tp); |
| 11268 | 11342 | |
| 11269 | − goto err_out2; | |
| 11343 | + goto out_napi_fini; | |
| 11270 | 11344 | } |
| 11271 | 11345 | |
| 11272 | 11346 | if (!tg3_flag(tp, 57765_PLUS) && tg3_flag(tp, USING_MSI)) { |
| @@ -11306,18 +11380,18 @@ static int tg3_start(struct tg3 *tp, bool reset_phy, bool test_irq, · 33 unmodified lines | ||
| 11306 | 11380 | |
| 11307 | 11381 | return 0; |
| 11308 | 11382 | |
| 11309 | −err_out3: | |
| 11383 | +out_free_irq: | |
| 11310 | 11384 | for (i = tp->irq_cnt - 1; i >= 0; i--) { |
| 11311 | 11385 | struct tg3_napi *tnapi = &tp->napi[i]; |
| 11312 | 11386 | free_irq(tnapi->irq_vec, tnapi); |
| 11313 | 11387 | } |
| 11314 | 11388 | |
| 11315 | −err_out2: | |
| 11389 | +out_napi_fini: | |
| 11316 | 11390 | tg3_napi_disable(tp); |
| 11317 | 11391 | tg3_napi_fini(tp); |
| 11318 | 11392 | tg3_free_consistent(tp); |
| 11319 | 11393 | |
| 11320 | −err_out1: | |
| 11394 | +out_ints_fini: | |
| 11321 | 11395 | tg3_ints_fini(tp); |
| 11322 | 11396 | |
| 11323 | 11397 | return err; |
| @@ -13362,11 +13436,13 @@ static void tg3_self_test(struct net_device *dev, struct ethtool_test *etest, · 2038 unmodified lines | ||
| 13362 | 13436 | struct tg3 *tp = netdev_priv(dev); |
| 13363 | 13437 | bool doextlpbk = etest->flags & ETH_TEST_FL_EXTERNAL_LB; |
| 13364 | 13438 | |
| 13365 | − if ((tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER) && | |
| 13366 | − tg3_power_up(tp)) { | |
| 13367 | − etest->flags |= ETH_TEST_FL_FAILED; | |
| 13368 | − memset(data, 1, sizeof(u64) * TG3_NUM_TEST); | |
| 13369 | − return; | |
| 13439 | + if (tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER) { | |
| 13440 | + if (tg3_power_up(tp)) { | |
| 13441 | + etest->flags |= ETH_TEST_FL_FAILED; | |
| 13442 | + memset(data, 1, sizeof(u64) * TG3_NUM_TEST); | |
| 13443 | + return; | |
| 13444 | + } | |
| 13445 | + tg3_ape_driver_state_change(tp, RESET_KIND_INIT); | |
| 13370 | 13446 | } |
| 13371 | 13447 | |
| 13372 | 13448 | memset(data, 0, sizeof(u64) * TG3_NUM_TEST); |
| @@ -13657,6 +13733,57 @@ static int tg3_set_coalesce(struct net_device *dev, struct ethtool_coalesce *ec) · 284 unmodified lines | ||
| 13657 | 13733 | return 0; |
| 13658 | 13734 | } |
| 13659 | 13735 | |
| 13736 | +static int tg3_set_eee(struct net_device *dev, struct ethtool_eee *edata) | |
| 13737 | +{ | |
| 13738 | + struct tg3 *tp = netdev_priv(dev); | |
| 13739 | + | |
| 13740 | + if (!(tp->phy_flags & TG3_PHYFLG_EEE_CAP)) { | |
| 13741 | + netdev_warn(tp->dev, "Board does not support EEE!\n"); | |
| 13742 | + return -EOPNOTSUPP; | |
| 13743 | + } | |
| 13744 | + | |
| 13745 | + if (edata->advertised != tp->eee.advertised) { | |
| 13746 | + netdev_warn(tp->dev, | |
| 13747 | + "Direct manipulation of EEE advertisement is not supported\n"); | |
| 13748 | + return -EINVAL; | |
| 13749 | + } | |
| 13750 | + | |
| 13751 | + if (edata->tx_lpi_timer > TG3_CPMU_DBTMR1_LNKIDLE_MAX) { | |
| 13752 | + netdev_warn(tp->dev, | |
| 13753 | + "Maximal Tx Lpi timer supported is %#x(u)\n", | |
| 13754 | + TG3_CPMU_DBTMR1_LNKIDLE_MAX); | |
| 13755 | + return -EINVAL; | |
| 13756 | + } | |
| 13757 | + | |
| 13758 | + tp->eee = *edata; | |
| 13759 | + | |
| 13760 | + tp->phy_flags |= TG3_PHYFLG_USER_CONFIGURED; | |
| 13761 | + tg3_warn_mgmt_link_flap(tp); | |
| 13762 | + | |
| 13763 | + if (netif_running(tp->dev)) { | |
| 13764 | + tg3_full_lock(tp, 0); | |
| 13765 | + tg3_setup_eee(tp); | |
| 13766 | + tg3_phy_reset(tp); | |
| 13767 | + tg3_full_unlock(tp); | |
| 13768 | + } | |
| 13769 | + | |
| 13770 | + return 0; | |
| 13771 | +} | |
| 13772 | + | |
| 13773 | +static int tg3_get_eee(struct net_device *dev, struct ethtool_eee *edata) | |
| 13774 | +{ | |
| 13775 | + struct tg3 *tp = netdev_priv(dev); | |
| 13776 | + | |
| 13777 | + if (!(tp->phy_flags & TG3_PHYFLG_EEE_CAP)) { | |
| 13778 | + netdev_warn(tp->dev, | |
| 13779 | + "Board does not support EEE!\n"); | |
| 13780 | + return -EOPNOTSUPP; | |
| 13781 | + } | |
| 13782 | + | |
| 13783 | + *edata = tp->eee; | |
| 13784 | + return 0; | |
| 13785 | +} | |
| 13786 | + | |
| 13660 | 13787 | static const struct ethtool_ops tg3_ethtool_ops = { |
| 13661 | 13788 | .get_settings = tg3_get_settings, |
| 13662 | 13789 | .set_settings = tg3_set_settings, |
| @@ -13690,6 +13817,8 @@ static const struct ethtool_ops tg3_ethtool_ops = { · 27 unmodified lines | ||
| 13690 | 13817 | .get_channels = tg3_get_channels, |
| 13691 | 13818 | .set_channels = tg3_set_channels, |
| 13692 | 13819 | .get_ts_info = tg3_get_ts_info, |
| 13820 | + .get_eee = tg3_get_eee, | |
| 13821 | + .set_eee = tg3_set_eee, | |
| 13693 | 13822 | }; |
| 13694 | 13823 | |
| 13695 | 13824 | static struct rtnl_link_stats64 *tg3_get_stats64(struct net_device *dev, |
| @@ -15038,9 +15167,18 @@ static int tg3_phy_probe(struct tg3 *tp) · 1342 unmodified lines | ||
| 15038 | 15167 | (tg3_asic_rev(tp) == ASIC_REV_5717 && |
| 15039 | 15168 | tg3_chip_rev_id(tp) != CHIPREV_ID_5717_A0) || |
| 15040 | 15169 | (tg3_asic_rev(tp) == ASIC_REV_57765 && |
| 15041 | − tg3_chip_rev_id(tp) != CHIPREV_ID_57765_A0))) | |
| 15170 | + tg3_chip_rev_id(tp) != CHIPREV_ID_57765_A0))) { | |
| 15042 | 15171 | tp->phy_flags |= TG3_PHYFLG_EEE_CAP; |
| 15043 | 15172 | |
| 15173 | + tp->eee.supported = SUPPORTED_100baseT_Full | | |
| 15174 | + SUPPORTED_1000baseT_Full; | |
| 15175 | + tp->eee.advertised = ADVERTISED_100baseT_Full | | |
| 15176 | + ADVERTISED_1000baseT_Full; | |
| 15177 | + tp->eee.eee_enabled = 1; | |
| 15178 | + tp->eee.tx_lpi_enabled = 1; | |
| 15179 | + tp->eee.tx_lpi_timer = TG3_CPMU_DBTMR1_LNKIDLE_2047US; | |
| 15180 | + } | |
| 15181 | + | |
| 15044 | 15182 | tg3_phy_init_link_config(tp); |
| 15045 | 15183 | |
| 15046 | 15184 | if (!(tp->phy_flags & TG3_PHYFLG_KEEP_LINK_ON_PWRDN) && |
| @@ -17112,7 +17250,7 @@ static int tg3_init_one(struct pci_dev *pdev, · 2065 unmodified lines | ||
| 17112 | 17250 | { |
| 17113 | 17251 | struct net_device *dev; |
| 17114 | 17252 | struct tg3 *tp; |
| 17115 | − int i, err, pm_cap; | |
| 17253 | + int i, err; | |
| 17116 | 17254 | u32 sndmbx, rcvmbx, intmbx; |
| 17117 | 17255 | char str[40]; |
| 17118 | 17256 | u64 dma_mask, persist_dma_mask; |
| @@ -17134,25 +17272,10 @@ static int tg3_init_one(struct pci_dev *pdev, · 15 unmodified lines | ||
| 17134 | 17272 | |
| 17135 | 17273 | pci_set_master(pdev); |
| 17136 | 17274 | |
| 17137 | − /* Find power-management capability. */ | |
| 17138 | − pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM); | |
| 17139 | − if (pm_cap == 0) { | |
| 17140 | − dev_err(&pdev->dev, | |
| 17141 | − "Cannot find Power Management capability, aborting\n"); | |
| 17142 | − err = -EIO; | |
| 17143 | − goto err_out_free_res; | |
| 17144 | − } | |
| 17145 | − | |
| 17146 | − err = pci_set_power_state(pdev, PCI_D0); | |
| 17147 | − if (err) { | |
| 17148 | − dev_err(&pdev->dev, "Transition to D0 failed, aborting\n"); | |
| 17149 | − goto err_out_free_res; | |
| 17150 | − } | |
| 17151 | − | |
| 17152 | 17275 | dev = alloc_etherdev_mq(sizeof(*tp), TG3_IRQ_MAX_VECS); |
| 17153 | 17276 | if (!dev) { |
| 17154 | 17277 | err = -ENOMEM; |
| 17155 | − goto err_out_power_down; | |
| 17278 | + goto err_out_free_res; | |
| 17156 | 17279 | } |
| 17157 | 17280 | |
| 17158 | 17281 | SET_NETDEV_DEV(dev, &pdev->dev); |
| @@ -17160,7 +17283,7 @@ static int tg3_init_one(struct pci_dev *pdev, · 1 unmodified line | ||
| 17160 | 17283 | tp = netdev_priv(dev); |
| 17161 | 17284 | tp->pdev = pdev; |
| 17162 | 17285 | tp->dev = dev; |
| 17163 | − tp->pm_cap = pm_cap; | |
| 17286 | + tp->pm_cap = pdev->pm_cap; | |
| 17164 | 17287 | tp->rx_mode = TG3_DEF_RX_MODE; |
| 17165 | 17288 | tp->tx_mode = TG3_DEF_TX_MODE; |
| 17166 | 17289 | tp->irq_sync = 1; |
| @@ -17498,9 +17621,6 @@ err_out_iounmap: · 331 unmodified lines | ||
| 17498 | 17621 | err_out_free_dev: |
| 17499 | 17622 | free_netdev(dev); |
| 17500 | 17623 | |
| 17501 | −err_out_power_down: | |
| 17502 | − pci_set_power_state(pdev, PCI_D3hot); | |
| 17503 | − | |
| 17504 | 17624 | err_out_free_res: |
| 17505 | 17625 | pci_release_regions(pdev); |
| 17506 | 17626 | |
| @@ -17610,6 +17730,8 @@ static int tg3_resume(struct device *device) · 103 unmodified lines | ||
| 17610 | 17730 | |
| 17611 | 17731 | tg3_full_lock(tp, 0); |
| 17612 | 17732 | |
| 17733 | + tg3_ape_driver_state_change(tp, RESET_KIND_INIT); | |
| 17734 | + | |
| 17613 | 17735 | tg3_flag_set(tp, INIT_COMPLETE); |
| 17614 | 17736 | err = tg3_restart_hw(tp, |
| 17615 | 17737 | !(tp->phy_flags & TG3_PHYFLG_KEEP_LINK_ON_PWRDN)); |
| @@ -17671,10 +17793,13 @@ static pci_ers_result_t tg3_io_error_detected(struct pci_dev *pdev, · 55 unmodified lines | ||
| 17671 | 17793 | tg3_full_unlock(tp); |
| 17672 | 17794 | |
| 17673 | 17795 | done: |
| 17674 | − if (state == pci_channel_io_perm_failure) | |
| 17796 | + if (state == pci_channel_io_perm_failure) { | |
| 17797 | + tg3_napi_enable(tp); | |
| 17798 | + dev_close(netdev); | |
| 17675 | 17799 | err = PCI_ERS_RESULT_DISCONNECT; |
| 17676 | − else | |
| 17800 | + } else { | |
| 17677 | 17801 | pci_disable_device(pdev); |
| 17802 | + } | |
| 17678 | 17803 | |
| 17679 | 17804 | rtnl_unlock(); |
| 17680 | 17805 | |
| @@ -17720,6 +17845,10 @@ static pci_ers_result_t tg3_io_slot_reset(struct pci_dev *pdev) · 39 unmodified lines | ||
| 17720 | 17845 | rc = PCI_ERS_RESULT_RECOVERED; |
| 17721 | 17846 | |
| 17722 | 17847 | done: |
| 17848 | + if (rc != PCI_ERS_RESULT_RECOVERED && netif_running(netdev)) { | |
| 17849 | + tg3_napi_enable(tp); | |
| 17850 | + dev_close(netdev); | |
| 17851 | + } | |
| 17723 | 17852 | rtnl_unlock(); |
| 17724 | 17853 | |
| 17725 | 17854 | return rc; |
| @@ -17744,6 +17873,7 @@ static void tg3_io_resume(struct pci_dev *pdev) · 18 unmodified lines | ||
| 17744 | 17873 | goto done; |
| 17745 | 17874 | |
| 17746 | 17875 | tg3_full_lock(tp, 0); |
| 17876 | + tg3_ape_driver_state_change(tp, RESET_KIND_INIT); | |
| 17747 | 17877 | tg3_flag_set(tp, INIT_COMPLETE); |
| 17748 | 17878 | err = tg3_restart_hw(tp, true); |
| 17749 | 17879 | if (err) { |
| @@ -17781,15 +17911,4 @@ static struct pci_driver tg3_driver = { · 31 unmodified lines | ||
| 17781 | 17911 | .driver.pm = &tg3_pm_ops, |
| 17782 | 17912 | }; |
| 17783 | 17913 | |
| 17784 | −static int __init tg3_init(void) | |
| 17785 | −{ | |
| 17786 | − return pci_register_driver(&tg3_driver); | |
| 17787 | −} | |
| 17788 | − | |
| 17789 | −static void __exit tg3_cleanup(void) | |
| 17790 | −{ | |
| 17791 | − pci_unregister_driver(&tg3_driver); | |
| 17792 | −} | |
| 17793 | − | |
| 17794 | −module_init(tg3_init); | |
| 17795 | −module_exit(tg3_cleanup); | |
| 17914 | +module_pci_driver(tg3_driver); | |
| @@ -1175,6 +1175,7 @@ · 1174 unmodified lines | ||
| 1175 | 1175 | #define TG3_CPMU_EEE_DBTMR1 0x000036b4 |
| 1176 | 1176 | #define TG3_CPMU_DBTMR1_PCIEXIT_2047US 0x07ff0000 |
| 1177 | 1177 | #define TG3_CPMU_DBTMR1_LNKIDLE_2047US 0x000007ff |
| 1178 | +#define TG3_CPMU_DBTMR1_LNKIDLE_MAX 0x0000ffff | |
| 1178 | 1179 | #define TG3_CPMU_EEE_DBTMR2 0x000036b8 |
| 1179 | 1180 | #define TG3_CPMU_DBTMR2_APE_TX_2047US 0x07ff0000 |
| 1180 | 1181 | #define TG3_CPMU_DBTMR2_TXIDXEQ_2047US 0x000007ff |
| @@ -3372,6 +3373,7 @@ struct tg3 { · 2191 unmodified lines | ||
| 3372 | 3373 | unsigned int irq_cnt; |
| 3373 | 3374 | |
| 3374 | 3375 | struct ethtool_coalesce coal; |
| 3376 | + struct ethtool_eee eee; | |
| 3375 | 3377 | |
| 3376 | 3378 | /* firmware info */ |
| 3377 | 3379 | const char *fw_needed; |
| @@ -164,7 +164,8 @@ struct bfa_ioc_attr { · 163 unmodified lines | ||
| 164 | 164 | u8 port_mode; /*!< enum bfa_mode */ |
| 165 | 165 | u8 cap_bm; /*!< capability */ |
| 166 | 166 | u8 port_mode_cfg; /*!< enum bfa_mode */ |
| 167 | − u8 rsvd[4]; /*!< 64bit align */ | |
| 167 | + u8 def_fn; /*!< 1 if default fn */ | |
| 168 | + u8 rsvd[3]; /*!< 64bit align */ | |
| 168 | 169 | }; |
| 169 | 170 | |
| 170 | 171 | /* Adapter capability mask definition */ |
| @@ -2371,7 +2371,7 @@ bfa_nw_ioc_get_attr(struct bfa_ioc *ioc, struct bfa_ioc_attr *ioc_attr) · 2370 unmodified lines | ||
| 2371 | 2371 | memset((void *)ioc_attr, 0, sizeof(struct bfa_ioc_attr)); |
| 2372 | 2372 | |
| 2373 | 2373 | ioc_attr->state = bfa_ioc_get_state(ioc); |
| 2374 | − ioc_attr->port_id = ioc->port_id; | |
| 2374 | + ioc_attr->port_id = bfa_ioc_portid(ioc); | |
| 2375 | 2375 | ioc_attr->port_mode = ioc->port_mode; |
| 2376 | 2376 | |
| 2377 | 2377 | ioc_attr->port_mode_cfg = ioc->port_mode_cfg; |
| @@ -2381,8 +2381,9 @@ bfa_nw_ioc_get_attr(struct bfa_ioc *ioc, struct bfa_ioc_attr *ioc_attr) · 3 unmodified lines | ||
| 2381 | 2381 | |
| 2382 | 2382 | bfa_ioc_get_adapter_attr(ioc, &ioc_attr->adapter_attr); |
| 2383 | 2383 | |
| 2384 | − ioc_attr->pci_attr.device_id = ioc->pcidev.device_id; | |
| 2385 | − ioc_attr->pci_attr.pcifn = ioc->pcidev.pci_func; | |
| 2384 | + ioc_attr->pci_attr.device_id = bfa_ioc_devid(ioc); | |
| 2385 | + ioc_attr->pci_attr.pcifn = bfa_ioc_pcifn(ioc); | |
| 2386 | + ioc_attr->def_fn = bfa_ioc_is_default(ioc); | |
| 2386 | 2387 | bfa_ioc_get_pci_chip_rev(ioc, ioc_attr->pci_attr.chip_rev); |
| 2387 | 2388 | } |
| 2388 | 2389 | |
| @@ -222,6 +222,8 @@ struct bfa_ioc_hwif { · 221 unmodified lines | ||
| 222 | 222 | #define bfa_ioc_bar0(__ioc) ((__ioc)->pcidev.pci_bar_kva) |
| 223 | 223 | #define bfa_ioc_portid(__ioc) ((__ioc)->port_id) |
| 224 | 224 | #define bfa_ioc_asic_gen(__ioc) ((__ioc)->asic_gen) |
| 225 | +#define bfa_ioc_is_default(__ioc) \ | |
| 226 | + (bfa_ioc_pcifn(__ioc) == bfa_ioc_portid(__ioc)) | |
| 225 | 227 | #define bfa_ioc_fetch_stats(__ioc, __stats) \ |
| 226 | 228 | (((__stats)->drv_stats) = (__ioc)->stats) |
| 227 | 229 | #define bfa_ioc_clr_stats(__ioc) \ |
| @@ -455,6 +455,8 @@ void bna_bfi_rx_enet_stop_rsp(struct bna_rx *rx, · 454 unmodified lines | ||
| 455 | 455 | void bna_bfi_rxf_cfg_rsp(struct bna_rxf *rxf, struct bfi_msgq_mhdr *msghdr); |
| 456 | 456 | void bna_bfi_rxf_mcast_add_rsp(struct bna_rxf *rxf, |
| 457 | 457 | struct bfi_msgq_mhdr *msghdr); |
| 458 | +void bna_bfi_rxf_ucast_set_rsp(struct bna_rxf *rxf, | |
| 459 | + struct bfi_msgq_mhdr *msghdr); | |
| 458 | 460 | |
| 459 | 461 | /* APIs for BNA */ |
| 460 | 462 | void bna_rx_mod_init(struct bna_rx_mod *rx_mod, struct bna *bna, |
| @@ -298,7 +298,6 @@ bna_msgq_rsp_handler(void *arg, struct bfi_msgq_mhdr *msghdr) · 297 unmodified lines | ||
| 298 | 298 | case BFI_ENET_I2H_RSS_ENABLE_RSP: |
| 299 | 299 | case BFI_ENET_I2H_RX_PROMISCUOUS_RSP: |
| 300 | 300 | case BFI_ENET_I2H_RX_DEFAULT_RSP: |
| 301 | − case BFI_ENET_I2H_MAC_UCAST_SET_RSP: | |
| 302 | 301 | case BFI_ENET_I2H_MAC_UCAST_CLR_RSP: |
| 303 | 302 | case BFI_ENET_I2H_MAC_UCAST_ADD_RSP: |
| 304 | 303 | case BFI_ENET_I2H_MAC_UCAST_DEL_RSP: |
| @@ -311,6 +310,12 @@ bna_msgq_rsp_handler(void *arg, struct bfi_msgq_mhdr *msghdr) · 6 unmodified lines | ||
| 311 | 310 | bna_bfi_rxf_cfg_rsp(&rx->rxf, msghdr); |
| 312 | 311 | break; |
| 313 | 312 | |
| 313 | + case BFI_ENET_I2H_MAC_UCAST_SET_RSP: | |
| 314 | + bna_rx_from_rid(bna, msghdr->enet_id, rx); | |
| 315 | + if (rx) | |
| 316 | + bna_bfi_rxf_ucast_set_rsp(&rx->rxf, msghdr); | |
| 317 | + break; | |
| 318 | + | |
| 314 | 319 | case BFI_ENET_I2H_MAC_MCAST_ADD_RSP: |
| 315 | 320 | bna_rx_from_rid(bna, msghdr->enet_id, rx); |
| 316 | 321 | if (rx) |
| @@ -710,6 +710,21 @@ bna_bfi_rxf_cfg_rsp(struct bna_rxf *rxf, struct bfi_msgq_mhdr *msghdr) · 709 unmodified lines | ||
| 710 | 710 | bfa_fsm_send_event(rxf, RXF_E_FW_RESP); |
| 711 | 711 | } |
| 712 | 712 | |
| 713 | +void | |
| 714 | +bna_bfi_rxf_ucast_set_rsp(struct bna_rxf *rxf, | |
| 715 | + struct bfi_msgq_mhdr *msghdr) | |
| 716 | +{ | |
| 717 | + struct bfi_enet_rsp *rsp = | |
| 718 | + (struct bfi_enet_rsp *)msghdr; | |
| 719 | + | |
| 720 | + if (rsp->error) { | |
| 721 | + /* Clear ucast from cache */ | |
| 722 | + rxf->ucast_active_set = 0; | |
| 723 | + } | |
| 724 | + | |
| 725 | + bfa_fsm_send_event(rxf, RXF_E_FW_RESP); | |
| 726 | +} | |
| 727 | + | |
| 713 | 728 | void |
| 714 | 729 | bna_bfi_rxf_mcast_add_rsp(struct bna_rxf *rxf, |
| 715 | 730 | struct bfi_msgq_mhdr *msghdr) |
| @@ -2624,6 +2624,9 @@ bnad_stop(struct net_device *netdev) · 2623 unmodified lines | ||
| 2624 | 2624 | bnad_destroy_tx(bnad, 0); |
| 2625 | 2625 | bnad_destroy_rx(bnad, 0); |
| 2626 | 2626 | |
| 2627 | + /* These config flags are cleared in the hardware */ | |
| 2628 | + bnad->cfg_flags &= ~(BNAD_CF_ALLMULTI | BNAD_CF_PROMISC); | |
| 2629 | + | |
| 2627 | 2630 | /* Synchronize mailbox IRQ */ |
| 2628 | 2631 | bnad_mbox_irq_sync(bnad); |
| 2629 | 2632 | |
| @@ -71,7 +71,7 @@ struct bnad_rx_ctrl { · 70 unmodified lines | ||
| 71 | 71 | #define BNAD_NAME "bna" |
| 72 | 72 | #define BNAD_NAME_LEN 64 |
| 73 | 73 | |
| 74 | −#define BNAD_VERSION "3.1.2.1" | |
| 74 | +#define BNAD_VERSION "3.2.21.1" | |
| 75 | 75 | |
| 76 | 76 | #define BNAD_MAILBOX_MSIX_INDEX 0 |
| 77 | 77 | #define BNAD_MAILBOX_MSIX_VECTORS 1 |
| @@ -37,8 +37,8 @@ · 36 unmodified lines | ||
| 37 | 37 | |
| 38 | 38 | extern char bfa_version[]; |
| 39 | 39 | |
| 40 | −#define CNA_FW_FILE_CT "ctfw-3.1.0.0.bin" | |
| 41 | −#define CNA_FW_FILE_CT2 "ct2fw-3.1.0.0.bin" | |
| 40 | +#define CNA_FW_FILE_CT "ctfw-3.2.1.0.bin" | |
| 41 | +#define CNA_FW_FILE_CT2 "ct2fw-3.2.1.0.bin" | |
| 42 | 42 | #define FC_SYMNAME_MAX 256 /*!< max name server symbolic name size */ |
| 43 | 43 | |
| 44 | 44 | #pragma pack(1) |
| @@ -23,7 +23,6 @@ if NET_CADENCE · 22 unmodified lines | ||
| 23 | 23 | config ARM_AT91_ETHER |
| 24 | 24 | tristate "AT91RM9200 Ethernet support" |
| 25 | 25 | depends on GENERIC_HARDIRQS && HAS_DMA |
| 26 | − select NET_CORE | |
| 27 | 26 | select MACB |
| 28 | 27 | ---help--- |
| 29 | 28 | If you wish to compile a kernel for the AT91RM9200 and enable |
| @@ -435,7 +435,6 @@ static int at91ether_remove(struct platform_device *pdev) · 434 unmodified lines | ||
| 435 | 435 | unregister_netdev(dev); |
| 436 | 436 | clk_disable(lp->pclk); |
| 437 | 437 | free_netdev(dev); |
| 438 | − platform_set_drvdata(pdev, NULL); | |
| 439 | 438 | |
| 440 | 439 | return 0; |
| 441 | 440 | } |
| @@ -32,7 +32,8 @@ · 31 unmodified lines | ||
| 32 | 32 | |
| 33 | 33 | #include "macb.h" |
| 34 | 34 | |
| 35 | −#define RX_BUFFER_SIZE 128 | |
| 35 | +#define MACB_RX_BUFFER_SIZE 128 | |
| 36 | +#define RX_BUFFER_MULTIPLE 64 /* bytes */ | |
| 36 | 37 | #define RX_RING_SIZE 512 /* must be power of 2 */ |
| 37 | 38 | #define RX_RING_BYTES (sizeof(struct macb_dma_desc) * RX_RING_SIZE) |
| 38 | 39 | |
| @@ -92,7 +93,7 @@ static struct macb_dma_desc *macb_rx_desc(struct macb *bp, unsigned int index) · 53 unmodified lines | ||
| 92 | 93 | |
| 93 | 94 | static void *macb_rx_buffer(struct macb *bp, unsigned int index) |
| 94 | 95 | { |
| 95 | − return bp->rx_buffers + RX_BUFFER_SIZE * macb_rx_ring_wrap(index); | |
| 96 | + return bp->rx_buffers + bp->rx_buffer_size * macb_rx_ring_wrap(index); | |
| 96 | 97 | } |
| 97 | 98 | |
| 98 | 99 | void macb_set_hwaddr(struct macb *bp) |
| @@ -528,6 +529,155 @@ static void macb_tx_interrupt(struct macb *bp) · 429 unmodified lines | ||
| 528 | 529 | netif_wake_queue(bp->dev); |
| 529 | 530 | } |
| 530 | 531 | |
| 532 | +static void gem_rx_refill(struct macb *bp) | |
| 533 | +{ | |
| 534 | + unsigned int entry; | |
| 535 | + struct sk_buff *skb; | |
| 536 | + struct macb_dma_desc *desc; | |
| 537 | + dma_addr_t paddr; | |
| 538 | + | |
| 539 | + while (CIRC_SPACE(bp->rx_prepared_head, bp->rx_tail, RX_RING_SIZE) > 0) { | |
| 540 | + u32 addr, ctrl; | |
| 541 | + | |
| 542 | + entry = macb_rx_ring_wrap(bp->rx_prepared_head); | |
| 543 | + desc = &bp->rx_ring[entry]; | |
| 544 | + | |
| 545 | + /* Make hw descriptor updates visible to CPU */ | |
| 546 | + rmb(); | |
| 547 | + | |
| 548 | + addr = desc->addr; | |
| 549 | + ctrl = desc->ctrl; | |
| 550 | + bp->rx_prepared_head++; | |
| 551 | + | |
| 552 | + if ((addr & MACB_BIT(RX_USED))) | |
| 553 | + continue; | |
| 554 | + | |
| 555 | + if (bp->rx_skbuff[entry] == NULL) { | |
| 556 | + /* allocate sk_buff for this free entry in ring */ | |
| 557 | + skb = netdev_alloc_skb(bp->dev, bp->rx_buffer_size); | |
| 558 | + if (unlikely(skb == NULL)) { | |
| 559 | + netdev_err(bp->dev, | |
| 560 | + "Unable to allocate sk_buff\n"); | |
| 561 | + break; | |
| 562 | + } | |
| 563 | + bp->rx_skbuff[entry] = skb; | |
| 564 | + | |
| 565 | + /* now fill corresponding descriptor entry */ | |
| 566 | + paddr = dma_map_single(&bp->pdev->dev, skb->data, | |
| 567 | + bp->rx_buffer_size, DMA_FROM_DEVICE); | |
| 568 | + | |
| 569 | + if (entry == RX_RING_SIZE - 1) | |
| 570 | + paddr |= MACB_BIT(RX_WRAP); | |
| 571 | + bp->rx_ring[entry].addr = paddr; | |
| 572 | + bp->rx_ring[entry].ctrl = 0; | |
| 573 | + | |
| 574 | + /* properly align Ethernet header */ | |
| 575 | + skb_reserve(skb, NET_IP_ALIGN); | |
| 576 | + } | |
| 577 | + } | |
| 578 | + | |
| 579 | + /* Make descriptor updates visible to hardware */ | |
| 580 | + wmb(); | |
| 581 | + | |
| 582 | + netdev_vdbg(bp->dev, "rx ring: prepared head %d, tail %d\n", | |
| 583 | + bp->rx_prepared_head, bp->rx_tail); | |
| 584 | +} | |
| 585 | + | |
| 586 | +/* Mark DMA descriptors from begin up to and not including end as unused */ | |
| 587 | +static void discard_partial_frame(struct macb *bp, unsigned int begin, | |
| 588 | + unsigned int end) | |
| 589 | +{ | |
| 590 | + unsigned int frag; | |
| 591 | + | |
| 592 | + for (frag = begin; frag != end; frag++) { | |
| 593 | + struct macb_dma_desc *desc = macb_rx_desc(bp, frag); | |
| 594 | + desc->addr &= ~MACB_BIT(RX_USED); | |
| 595 | + } | |
| 596 | + | |
| 597 | + /* Make descriptor updates visible to hardware */ | |
| 598 | + wmb(); | |
| 599 | + | |
| 600 | + /* | |
| 601 | + * When this happens, the hardware stats registers for | |
| 602 | + * whatever caused this is updated, so we don't have to record | |
| 603 | + * anything. | |
| 604 | + */ | |
| 605 | +} | |
| 606 | + | |
| 607 | +static int gem_rx(struct macb *bp, int budget) | |
| 608 | +{ | |
| 609 | + unsigned int len; | |
| 610 | + unsigned int entry; | |
| 611 | + struct sk_buff *skb; | |
| 612 | + struct macb_dma_desc *desc; | |
| 613 | + int count = 0; | |
| 614 | + | |
| 615 | + while (count < budget) { | |
| 616 | + u32 addr, ctrl; | |
| 617 | + | |
| 618 | + entry = macb_rx_ring_wrap(bp->rx_tail); | |
| 619 | + desc = &bp->rx_ring[entry]; | |
| 620 | + | |
| 621 | + /* Make hw descriptor updates visible to CPU */ | |
| 622 | + rmb(); | |
| 623 | + | |
| 624 | + addr = desc->addr; | |
| 625 | + ctrl = desc->ctrl; | |
| 626 | + | |
| 627 | + if (!(addr & MACB_BIT(RX_USED))) | |
| 628 | + break; | |
| 629 | + | |
| 630 | + desc->addr &= ~MACB_BIT(RX_USED); | |
| 631 | + bp->rx_tail++; | |
| 632 | + count++; | |
| 633 | + | |
| 634 | + if (!(ctrl & MACB_BIT(RX_SOF) && ctrl & MACB_BIT(RX_EOF))) { | |
| 635 | + netdev_err(bp->dev, | |
| 636 | + "not whole frame pointed by descriptor\n"); | |
| 637 | + bp->stats.rx_dropped++; | |
| 638 | + break; | |
| 639 | + } | |
| 640 | + skb = bp->rx_skbuff[entry]; | |
| 641 | + if (unlikely(!skb)) { | |
| 642 | + netdev_err(bp->dev, | |
| 643 | + "inconsistent Rx descriptor chain\n"); | |
| 644 | + bp->stats.rx_dropped++; | |
| 645 | + break; | |
| 646 | + } | |
| 647 | + /* now everything is ready for receiving packet */ | |
| 648 | + bp->rx_skbuff[entry] = NULL; | |
| 649 | + len = MACB_BFEXT(RX_FRMLEN, ctrl); | |
| 650 | + | |
| 651 | + netdev_vdbg(bp->dev, "gem_rx %u (len %u)\n", entry, len); | |
| 652 | + | |
| 653 | + skb_put(skb, len); | |
| 654 | + addr = MACB_BF(RX_WADDR, MACB_BFEXT(RX_WADDR, addr)); | |
| 655 | + dma_unmap_single(&bp->pdev->dev, addr, | |
| 656 | + len, DMA_FROM_DEVICE); | |
| 657 | + | |
| 658 | + skb->protocol = eth_type_trans(skb, bp->dev); | |
| 659 | + skb_checksum_none_assert(skb); | |
| 660 | + | |
| 661 | + bp->stats.rx_packets++; | |
| 662 | + bp->stats.rx_bytes += skb->len; | |
| 663 | + | |
| 664 | +#if defined(DEBUG) && defined(VERBOSE_DEBUG) | |
| 665 | + netdev_vdbg(bp->dev, "received skb of length %u, csum: %08x\n", | |
| 666 | + skb->len, skb->csum); | |
| 667 | + print_hex_dump(KERN_DEBUG, " mac: ", DUMP_PREFIX_ADDRESS, 16, 1, | |
| 668 | + skb->mac_header, 16, true); | |
| 669 | + print_hex_dump(KERN_DEBUG, "data: ", DUMP_PREFIX_ADDRESS, 16, 1, | |
| 670 | + skb->data, 32, true); | |
| 671 | +#endif | |
| 672 | + | |
| 673 | + netif_receive_skb(skb); | |
| 674 | + } | |
| 675 | + | |
| 676 | + gem_rx_refill(bp); | |
| 677 | + | |
| 678 | + return count; | |
| 679 | +} | |
| 680 | + | |
| 531 | 681 | static int macb_rx_frame(struct macb *bp, unsigned int first_frag, |
| 532 | 682 | unsigned int last_frag) |
| 533 | 683 | { |
| @@ -575,7 +725,7 @@ static int macb_rx_frame(struct macb *bp, unsigned int first_frag, · 41 unmodified lines | ||
| 575 | 725 | skb_put(skb, len); |
| 576 | 726 | |
| 577 | 727 | for (frag = first_frag; ; frag++) { |
| 578 | − unsigned int frag_len = RX_BUFFER_SIZE; | |
| 728 | + unsigned int frag_len = bp->rx_buffer_size; | |
| 579 | 729 | |
| 580 | 730 | if (offset + frag_len > len) { |
| 581 | 731 | BUG_ON(frag != last_frag); |
| @@ -583,7 +733,7 @@ static int macb_rx_frame(struct macb *bp, unsigned int first_frag, · 1 unmodified line | ||
| 583 | 733 | } |
| 584 | 734 | skb_copy_to_linear_data_offset(skb, offset, |
| 585 | 735 | macb_rx_buffer(bp, frag), frag_len); |
| 586 | − offset += RX_BUFFER_SIZE; | |
| 736 | + offset += bp->rx_buffer_size; | |
| 587 | 737 | desc = macb_rx_desc(bp, frag); |
| 588 | 738 | desc->addr &= ~MACB_BIT(RX_USED); |
| 589 | 739 | |
| @@ -606,27 +756,6 @@ static int macb_rx_frame(struct macb *bp, unsigned int first_frag, · 16 unmodified lines | ||
| 606 | 756 | return 0; |
| 607 | 757 | } |
| 608 | 758 | |
| 609 | −/* Mark DMA descriptors from begin up to and not including end as unused */ | |
| 610 | −static void discard_partial_frame(struct macb *bp, unsigned int begin, | |
| 611 | − unsigned int end) | |
| 612 | −{ | |
| 613 | − unsigned int frag; | |
| 614 | − | |
| 615 | − for (frag = begin; frag != end; frag++) { | |
| 616 | − struct macb_dma_desc *desc = macb_rx_desc(bp, frag); | |
| 617 | − desc->addr &= ~MACB_BIT(RX_USED); | |
| 618 | − } | |
| 619 | − | |
| 620 | − /* Make descriptor updates visible to hardware */ | |
| 621 | − wmb(); | |
| 622 | − | |
| 623 | − /* | |
| 624 | − * When this happens, the hardware stats registers for | |
| 625 | − * whatever caused this is updated, so we don't have to record | |
| 626 | − * anything. | |
| 627 | − */ | |
| 628 | −} | |
| 629 | − | |
| 630 | 759 | static int macb_rx(struct macb *bp, int budget) |
| 631 | 760 | { |
| 632 | 761 | int received = 0; |
| @@ -687,7 +816,7 @@ static int macb_poll(struct napi_struct *napi, int budget) · 54 unmodified lines | ||
| 687 | 816 | netdev_vdbg(bp->dev, "poll: status = %08lx, budget = %d\n", |
| 688 | 817 | (unsigned long)status, budget); |
| 689 | 818 | |
| 690 | − work_done = macb_rx(bp, budget); | |
| 819 | + work_done = bp->macbgem_ops.mog_rx(bp, budget); | |
| 691 | 820 | if (work_done < budget) { |
| 692 | 821 | napi_complete(napi); |
| 693 | 822 | |
| @@ -870,12 +999,71 @@ static int macb_start_xmit(struct sk_buff *skb, struct net_device *dev) · 176 unmodified lines | ||
| 870 | 999 | return NETDEV_TX_OK; |
| 871 | 1000 | } |
| 872 | 1001 | |
| 1002 | +static void macb_init_rx_buffer_size(struct macb *bp, size_t size) | |
| 1003 | +{ | |
| 1004 | + if (!macb_is_gem(bp)) { | |
| 1005 | + bp->rx_buffer_size = MACB_RX_BUFFER_SIZE; | |
| 1006 | + } else { | |
| 1007 | + bp->rx_buffer_size = size; | |
| 1008 | + | |
| 1009 | + if (bp->rx_buffer_size % RX_BUFFER_MULTIPLE) { | |
| 1010 | + netdev_dbg(bp->dev, | |
| 1011 | + "RX buffer must be multiple of %d bytes, expanding\n", | |
| 1012 | + RX_BUFFER_MULTIPLE); | |
| 1013 | + bp->rx_buffer_size = | |
| 1014 | + roundup(bp->rx_buffer_size, RX_BUFFER_MULTIPLE); | |
| 1015 | + } | |
| 1016 | + } | |
| 1017 | + | |
| 1018 | + netdev_dbg(bp->dev, "mtu [%u] rx_buffer_size [%Zu]\n", | |
| 1019 | + bp->dev->mtu, bp->rx_buffer_size); | |
| 1020 | +} | |
| 1021 | + | |
| 1022 | +static void gem_free_rx_buffers(struct macb *bp) | |
| 1023 | +{ | |
| 1024 | + struct sk_buff *skb; | |
| 1025 | + struct macb_dma_desc *desc; | |
| 1026 | + dma_addr_t addr; | |
| 1027 | + int i; | |
| 1028 | + | |
| 1029 | + if (!bp->rx_skbuff) | |
| 1030 | + return; | |
| 1031 | + | |
| 1032 | + for (i = 0; i < RX_RING_SIZE; i++) { | |
| 1033 | + skb = bp->rx_skbuff[i]; | |
| 1034 | + | |
| 1035 | + if (skb == NULL) | |
| 1036 | + continue; | |
| 1037 | + | |
| 1038 | + desc = &bp->rx_ring[i]; | |
| 1039 | + addr = MACB_BF(RX_WADDR, MACB_BFEXT(RX_WADDR, desc->addr)); | |
| 1040 | + dma_unmap_single(&bp->pdev->dev, addr, skb->len, | |
| 1041 | + DMA_FROM_DEVICE); | |
| 1042 | + dev_kfree_skb_any(skb); | |
| 1043 | + skb = NULL; | |
| 1044 | + } | |
| 1045 | + | |
| 1046 | + kfree(bp->rx_skbuff); | |
| 1047 | + bp->rx_skbuff = NULL; | |
| 1048 | +} | |
| 1049 | + | |
| 1050 | +static void macb_free_rx_buffers(struct macb *bp) | |
| 1051 | +{ | |
| 1052 | + if (bp->rx_buffers) { | |
| 1053 | + dma_free_coherent(&bp->pdev->dev, | |
| 1054 | + RX_RING_SIZE * bp->rx_buffer_size, | |
| 1055 | + bp->rx_buffers, bp->rx_buffers_dma); | |
| 1056 | + bp->rx_buffers = NULL; | |
| 1057 | + } | |
| 1058 | +} | |
| 1059 | + | |
| 873 | 1060 | static void macb_free_consistent(struct macb *bp) |
| 874 | 1061 | { |
| 875 | 1062 | if (bp->tx_skb) { |
| 876 | 1063 | kfree(bp->tx_skb); |
| 877 | 1064 | bp->tx_skb = NULL; |
| 878 | 1065 | } |
| 1066 | + bp->macbgem_ops.mog_free_rx_buffers(bp); | |
| 879 | 1067 | if (bp->rx_ring) { |
| 880 | 1068 | dma_free_coherent(&bp->pdev->dev, RX_RING_BYTES, |
| 881 | 1069 | bp->rx_ring, bp->rx_ring_dma); |
| @@ -886,12 +1074,37 @@ static void macb_free_consistent(struct macb *bp) · 4 unmodified lines | ||
| 886 | 1074 | bp->tx_ring, bp->tx_ring_dma); |
| 887 | 1075 | bp->tx_ring = NULL; |
| 888 | 1076 | } |
| 889 | − if (bp->rx_buffers) { | |
| 890 | − dma_free_coherent(&bp->pdev->dev, | |
| 891 | − RX_RING_SIZE * RX_BUFFER_SIZE, | |
| 892 | − bp->rx_buffers, bp->rx_buffers_dma); | |
| 893 | − bp->rx_buffers = NULL; | |
| 894 | − } | |
| 1077 | +} | |
| 1078 | + | |
| 1079 | +static int gem_alloc_rx_buffers(struct macb *bp) | |
| 1080 | +{ | |
| 1081 | + int size; | |
| 1082 | + | |
| 1083 | + size = RX_RING_SIZE * sizeof(struct sk_buff *); | |
| 1084 | + bp->rx_skbuff = kzalloc(size, GFP_KERNEL); | |
| 1085 | + if (!bp->rx_skbuff) | |
| 1086 | + return -ENOMEM; | |
| 1087 | + else | |
| 1088 | + netdev_dbg(bp->dev, | |
| 1089 | + "Allocated %d RX struct sk_buff entries at %p\n", | |
| 1090 | + RX_RING_SIZE, bp->rx_skbuff); | |
| 1091 | + return 0; | |
| 1092 | +} | |
| 1093 | + | |
| 1094 | +static int macb_alloc_rx_buffers(struct macb *bp) | |
| 1095 | +{ | |
| 1096 | + int size; | |
| 1097 | + | |
| 1098 | + size = RX_RING_SIZE * bp->rx_buffer_size; | |
| 1099 | + bp->rx_buffers = dma_alloc_coherent(&bp->pdev->dev, size, | |
| 1100 | + &bp->rx_buffers_dma, GFP_KERNEL); | |
| 1101 | + if (!bp->rx_buffers) | |
| 1102 | + return -ENOMEM; | |
| 1103 | + else | |
| 1104 | + netdev_dbg(bp->dev, | |
| 1105 | + "Allocated RX buffers of %d bytes at %08lx (mapped %p)\n", | |
| 1106 | + size, (unsigned long)bp->rx_buffers_dma, bp->rx_buffers); | |
| 1107 | + return 0; | |
| 895 | 1108 | } |
| 896 | 1109 | |
| 897 | 1110 | static int macb_alloc_consistent(struct macb *bp) |
| @@ -921,14 +1134,8 @@ static int macb_alloc_consistent(struct macb *bp) · 23 unmodified lines | ||
| 921 | 1134 | "Allocated TX ring of %d bytes at %08lx (mapped %p)\n", |
| 922 | 1135 | size, (unsigned long)bp->tx_ring_dma, bp->tx_ring); |
| 923 | 1136 | |
| 924 | − size = RX_RING_SIZE * RX_BUFFER_SIZE; | |
| 925 | − bp->rx_buffers = dma_alloc_coherent(&bp->pdev->dev, size, | |
| 926 | − &bp->rx_buffers_dma, GFP_KERNEL); | |
| 927 | − if (!bp->rx_buffers) | |
| 1137 | + if (bp->macbgem_ops.mog_alloc_rx_buffers(bp)) | |
| 928 | 1138 | goto out_err; |
| 929 | − netdev_dbg(bp->dev, | |
| 930 | − "Allocated RX buffers of %d bytes at %08lx (mapped %p)\n", | |
| 931 | − size, (unsigned long)bp->rx_buffers_dma, bp->rx_buffers); | |
| 932 | 1139 | |
| 933 | 1140 | return 0; |
| 934 | 1141 | |
| @@ -937,6 +1144,21 @@ out_err: · 2 unmodified lines | ||
| 937 | 1144 | return -ENOMEM; |
| 938 | 1145 | } |
| 939 | 1146 | |
| 1147 | +static void gem_init_rings(struct macb *bp) | |
| 1148 | +{ | |
| 1149 | + int i; | |
| 1150 | + | |
| 1151 | + for (i = 0; i < TX_RING_SIZE; i++) { | |
| 1152 | + bp->tx_ring[i].addr = 0; | |
| 1153 | + bp->tx_ring[i].ctrl = MACB_BIT(TX_USED); | |
| 1154 | + } | |
| 1155 | + bp->tx_ring[TX_RING_SIZE - 1].ctrl |= MACB_BIT(TX_WRAP); | |
| 1156 | + | |
| 1157 | + bp->rx_tail = bp->rx_prepared_head = bp->tx_head = bp->tx_tail = 0; | |
| 1158 | + | |
| 1159 | + gem_rx_refill(bp); | |
| 1160 | +} | |
| 1161 | + | |
| 940 | 1162 | static void macb_init_rings(struct macb *bp) |
| 941 | 1163 | { |
| 942 | 1164 | int i; |
| @@ -946,7 +1168,7 @@ static void macb_init_rings(struct macb *bp) · 3 unmodified lines | ||
| 946 | 1168 | for (i = 0; i < RX_RING_SIZE; i++) { |
| 947 | 1169 | bp->rx_ring[i].addr = addr; |
| 948 | 1170 | bp->rx_ring[i].ctrl = 0; |
| 949 | − addr += RX_BUFFER_SIZE; | |
| 1171 | + addr += bp->rx_buffer_size; | |
| 950 | 1172 | } |
| 951 | 1173 | bp->rx_ring[RX_RING_SIZE - 1].addr |= MACB_BIT(RX_WRAP); |
| 952 | 1174 | |
| @@ -1056,7 +1278,7 @@ static void macb_configure_dma(struct macb *bp) · 103 unmodified lines | ||
| 1056 | 1278 | |
| 1057 | 1279 | if (macb_is_gem(bp)) { |
| 1058 | 1280 | dmacfg = gem_readl(bp, DMACFG) & ~GEM_BF(RXBS, -1L); |
| 1059 | − dmacfg |= GEM_BF(RXBS, RX_BUFFER_SIZE / 64); | |
| 1281 | + dmacfg |= GEM_BF(RXBS, bp->rx_buffer_size / RX_BUFFER_MULTIPLE); | |
| 1060 | 1282 | dmacfg |= GEM_BF(FBLDO, 16); |
| 1061 | 1283 | dmacfg |= GEM_BIT(TXPBMS) | GEM_BF(RXBMS, -1L); |
| 1062 | 1284 | dmacfg &= ~GEM_BIT(ENDIA); |
| @@ -1070,7 +1292,7 @@ static void macb_configure_dma(struct macb *bp) · 7 unmodified lines | ||
| 1070 | 1292 | static void macb_configure_caps(struct macb *bp) |
| 1071 | 1293 | { |
| 1072 | 1294 | if (macb_is_gem(bp)) { |
| 1073 | − if (GEM_BF(IRQCOR, gem_readl(bp, DCFG1)) == 0) | |
| 1295 | + if (GEM_BFEXT(IRQCOR, gem_readl(bp, DCFG1)) == 0) | |
| 1074 | 1296 | bp->caps |= MACB_CAPS_ISR_CLEAR_ON_WRITE; |
| 1075 | 1297 | } |
| 1076 | 1298 | } |
| @@ -1233,6 +1455,7 @@ EXPORT_SYMBOL_GPL(macb_set_rx_mode); · 156 unmodified lines | ||
| 1233 | 1455 | static int macb_open(struct net_device *dev) |
| 1234 | 1456 | { |
| 1235 | 1457 | struct macb *bp = netdev_priv(dev); |
| 1458 | + size_t bufsz = dev->mtu + ETH_HLEN + ETH_FCS_LEN + NET_IP_ALIGN; | |
| 1236 | 1459 | int err; |
| 1237 | 1460 | |
| 1238 | 1461 | netdev_dbg(bp->dev, "open\n"); |
| @@ -1244,6 +1467,9 @@ static int macb_open(struct net_device *dev) · 5 unmodified lines | ||
| 1244 | 1467 | if (!bp->phy_dev) |
| 1245 | 1468 | return -EAGAIN; |
| 1246 | 1469 | |
| 1470 | + /* RX buffers initialization */ | |
| 1471 | + macb_init_rx_buffer_size(bp, bufsz); | |
| 1472 | + | |
| 1247 | 1473 | err = macb_alloc_consistent(bp); |
| 1248 | 1474 | if (err) { |
| 1249 | 1475 | netdev_err(dev, "Unable to allocate DMA memory (error %d)\n", |
| @@ -1253,7 +1479,7 @@ static int macb_open(struct net_device *dev) · 3 unmodified lines | ||
| 1253 | 1479 | |
| 1254 | 1480 | napi_enable(&bp->napi); |
| 1255 | 1481 | |
| 1256 | − macb_init_rings(bp); | |
| 1482 | + bp->macbgem_ops.mog_init_rings(bp); | |
| 1257 | 1483 | macb_init_hw(bp); |
| 1258 | 1484 | |
| 1259 | 1485 | /* schedule a link state check */ |
| @@ -1572,6 +1798,19 @@ static int __init macb_probe(struct platform_device *pdev) · 312 unmodified lines | ||
| 1572 | 1798 | |
| 1573 | 1799 | dev->base_addr = regs->start; |
| 1574 | 1800 | |
| 1801 | + /* setup appropriated routines according to adapter type */ | |
| 1802 | + if (macb_is_gem(bp)) { | |
| 1803 | + bp->macbgem_ops.mog_alloc_rx_buffers = gem_alloc_rx_buffers; | |
| 1804 | + bp->macbgem_ops.mog_free_rx_buffers = gem_free_rx_buffers; | |
| 1805 | + bp->macbgem_ops.mog_init_rings = gem_init_rings; | |
| 1806 | + bp->macbgem_ops.mog_rx = gem_rx; | |
| 1807 | + } else { | |
| 1808 | + bp->macbgem_ops.mog_alloc_rx_buffers = macb_alloc_rx_buffers; | |
| 1809 | + bp->macbgem_ops.mog_free_rx_buffers = macb_free_rx_buffers; | |
| 1810 | + bp->macbgem_ops.mog_init_rings = macb_init_rings; | |
| 1811 | + bp->macbgem_ops.mog_rx = macb_rx; | |
| 1812 | + } | |
| 1813 | + | |
| 1575 | 1814 | /* Set MII management clock divider */ |
| 1576 | 1815 | config = macb_mdc_clk_div(bp); |
| 1577 | 1816 | config |= macb_dbw(bp); |
| @@ -1649,7 +1888,6 @@ err_out_put_pclk: · 71 unmodified lines | ||
| 1649 | 1888 | err_out_free_dev: |
| 1650 | 1889 | free_netdev(dev); |
| 1651 | 1890 | err_out: |
| 1652 | − platform_set_drvdata(pdev, NULL); | |
| 1653 | 1891 | return err; |
| 1654 | 1892 | } |
| 1655 | 1893 | |
| @@ -1675,7 +1913,6 @@ static int __exit macb_remove(struct platform_device *pdev) · 19 unmodified lines | ||
| 1675 | 1913 | clk_disable_unprepare(bp->pclk); |
| 1676 | 1914 | clk_put(bp->pclk); |
| 1677 | 1915 | free_netdev(dev); |
| 1678 | − platform_set_drvdata(pdev, NULL); | |
| 1679 | 1916 | } |
| 1680 | 1917 | |
| 1681 | 1918 | return 0; |
| @@ -545,12 +545,24 @@ struct gem_stats { · 544 unmodified lines | ||
| 545 | 545 | u32 rx_udp_checksum_errors; |
| 546 | 546 | }; |
| 547 | 547 | |
| 548 | +struct macb; | |
| 549 | + | |
| 550 | +struct macb_or_gem_ops { | |
| 551 | + int (*mog_alloc_rx_buffers)(struct macb *bp); | |
| 552 | + void (*mog_free_rx_buffers)(struct macb *bp); | |
| 553 | + void (*mog_init_rings)(struct macb *bp); | |
| 554 | + int (*mog_rx)(struct macb *bp, int budget); | |
| 555 | +}; | |
| 556 | + | |
| 548 | 557 | struct macb { |
| 549 | 558 | void __iomem *regs; |
| 550 | 559 | |
| 551 | 560 | unsigned int rx_tail; |
| 561 | + unsigned int rx_prepared_head; | |
| 552 | 562 | struct macb_dma_desc *rx_ring; |
| 563 | + struct sk_buff **rx_skbuff; | |
| 553 | 564 | void *rx_buffers; |
| 565 | + size_t rx_buffer_size; | |
| 554 | 566 | |
| 555 | 567 | unsigned int tx_head, tx_tail; |
| 556 | 568 | struct macb_dma_desc *tx_ring; |
| @@ -573,6 +585,8 @@ struct macb { · 16 unmodified lines | ||
| 573 | 585 | dma_addr_t tx_ring_dma; |
| 574 | 586 | dma_addr_t rx_buffers_dma; |
| 575 | 587 | |
| 588 | + struct macb_or_gem_ops macbgem_ops; | |
| 589 | + | |
| 576 | 590 | struct mii_bus *mii_bus; |
| 577 | 591 | struct phy_device *phy_dev; |
| 578 | 592 | unsigned int link; |
| @@ -1790,7 +1790,6 @@ err_io: · 1789 unmodified lines | ||
| 1790 | 1790 | free_netdev(ndev); |
| 1791 | 1791 | err_alloc: |
| 1792 | 1792 | release_mem_region(res->start, resource_size(res)); |
| 1793 | − platform_set_drvdata(pdev, NULL); | |
| 1794 | 1793 | return ret; |
| 1795 | 1794 | } |
| 1796 | 1795 | |
| @@ -1813,7 +1812,6 @@ static int xgmac_remove(struct platform_device *pdev) · 16 unmodified lines | ||
| 1813 | 1812 | free_irq(ndev->irq, ndev); |
| 1814 | 1813 | free_irq(priv->pmt_irq, ndev); |
| 1815 | 1814 | |
| 1816 | − platform_set_drvdata(pdev, NULL); | |
| 1817 | 1815 | unregister_netdev(ndev); |
| 1818 | 1816 | netif_napi_del(&priv->napi); |
| 1819 | 1817 | |
| @@ -1351,22 +1351,11 @@ static void remove_one(struct pci_dev *pdev) · 1350 unmodified lines | ||
| 1351 | 1351 | t1_sw_reset(pdev); |
| 1352 | 1352 | } |
| 1353 | 1353 | |
| 1354 | −static struct pci_driver driver = { | |
| 1354 | +static struct pci_driver cxgb_pci_driver = { | |
| 1355 | 1355 | .name = DRV_NAME, |
| 1356 | 1356 | .id_table = t1_pci_tbl, |
| 1357 | 1357 | .probe = init_one, |
| 1358 | 1358 | .remove = remove_one, |
| 1359 | 1359 | }; |
| 1360 | 1360 | |
| 1361 | −static int __init t1_init_module(void) | |
| 1362 | −{ | |
| 1363 | − return pci_register_driver(&driver); | |
| 1364 | −} | |
| 1365 | − | |
| 1366 | −static void __exit t1_cleanup_module(void) | |
| 1367 | −{ | |
| 1368 | − pci_unregister_driver(&driver); | |
| 1369 | −} | |
| 1370 | − | |
| 1371 | −module_init(t1_init_module); | |
| 1372 | −module_exit(t1_cleanup_module); | |
| 1361 | +module_pci_driver(cxgb_pci_driver); | |
| @@ -3037,7 +3037,9 @@ static void t3_io_resume(struct pci_dev *pdev) · 3036 unmodified lines | ||
| 3037 | 3037 | CH_ALERT(adapter, "adapter recovering, PEX ERR 0x%x\n", |
| 3038 | 3038 | t3_read_reg(adapter, A_PCIE_PEX_ERR)); |
| 3039 | 3039 | |
| 3040 | + rtnl_lock(); | |
| 3040 | 3041 | t3_resume_ports(adapter); |
| 3042 | + rtnl_unlock(); | |
| 3041 | 3043 | } |
| 3042 | 3044 | |
| 3043 | 3045 | static const struct pci_error_handlers t3_err_handler = { |
| @@ -1246,6 +1246,7 @@ int cxgb3_offload_activate(struct adapter *adapter) · 1245 unmodified lines | ||
| 1246 | 1246 | struct tid_range stid_range, tid_range; |
| 1247 | 1247 | struct mtutab mtutab; |
| 1248 | 1248 | unsigned int l2t_capacity; |
| 1249 | + struct l2t_data *l2td; | |
| 1249 | 1250 | |
| 1250 | 1251 | t = kzalloc(sizeof(*t), GFP_KERNEL); |
| 1251 | 1252 | if (!t) |
| @@ -1261,8 +1262,8 @@ int cxgb3_offload_activate(struct adapter *adapter) · 9 unmodified lines | ||
| 1261 | 1262 | goto out_free; |
| 1262 | 1263 | |
| 1263 | 1264 | err = -ENOMEM; |
| 1264 | − RCU_INIT_POINTER(dev->l2opt, t3_init_l2t(l2t_capacity)); | |
| 1265 | − if (!L2DATA(dev)) | |
| 1265 | + l2td = t3_init_l2t(l2t_capacity); | |
| 1266 | + if (!l2td) | |
| 1266 | 1267 | goto out_free; |
| 1267 | 1268 | |
| 1268 | 1269 | natids = min(tid_range.num / 2, MAX_ATIDS); |
| @@ -1279,6 +1280,7 @@ int cxgb3_offload_activate(struct adapter *adapter) · 10 unmodified lines | ||
| 1279 | 1280 | INIT_LIST_HEAD(&t->list_node); |
| 1280 | 1281 | t->dev = dev; |
| 1281 | 1282 | |
| 1283 | + RCU_INIT_POINTER(dev->l2opt, l2td); | |
| 1282 | 1284 | T3C_DATA(dev) = t; |
| 1283 | 1285 | dev->recv = process_rx; |
| 1284 | 1286 | dev->neigh_update = t3_l2t_update; |
| @@ -1294,8 +1296,7 @@ int cxgb3_offload_activate(struct adapter *adapter) · 9 unmodified lines | ||
| 1294 | 1296 | return 0; |
| 1295 | 1297 | |
| 1296 | 1298 | out_free_l2t: |
| 1297 | − t3_free_l2t(L2DATA(dev)); | |
| 1298 | − RCU_INIT_POINTER(dev->l2opt, NULL); | |
| 1299 | + t3_free_l2t(l2td); | |
| 1299 | 1300 | out_free: |
| 1300 | 1301 | kfree(t); |
| 1301 | 1302 | return err; |
| @@ -455,6 +455,11 @@ static int alloc_pg_chunk(struct adapter *adapter, struct sge_fl *q, · 454 unmodified lines | ||
| 455 | 455 | q->pg_chunk.offset = 0; |
| 456 | 456 | mapping = pci_map_page(adapter->pdev, q->pg_chunk.page, |
| 457 | 457 | 0, q->alloc_size, PCI_DMA_FROMDEVICE); |
| 458 | + if (unlikely(pci_dma_mapping_error(adapter->pdev, mapping))) { | |
| 459 | + __free_pages(q->pg_chunk.page, order); | |
| 460 | + q->pg_chunk.page = NULL; | |
| 461 | + return -EIO; | |
| 462 | + } | |
| 458 | 463 | q->pg_chunk.mapping = mapping; |
| 459 | 464 | } |
| 460 | 465 | sd->pg_chunk = q->pg_chunk; |
| @@ -949,40 +954,75 @@ static inline unsigned int calc_tx_descs(const struct sk_buff *skb) · 488 unmodified lines | ||
| 949 | 954 | return flits_to_desc(flits); |
| 950 | 955 | } |
| 951 | 956 | |
| 957 | + | |
| 958 | +/* map_skb - map a packet main body and its page fragments | |
| 959 | + * @pdev: the PCI device | |
| 960 | + * @skb: the packet | |
| 961 | + * @addr: placeholder to save the mapped addresses | |
| 962 | + * | |
| 963 | + * map the main body of an sk_buff and its page fragments, if any. | |
| 964 | + */ | |
| 965 | +static int map_skb(struct pci_dev *pdev, const struct sk_buff *skb, | |
| 966 | + dma_addr_t *addr) | |
| 967 | +{ | |
| 968 | + const skb_frag_t *fp, *end; | |
| 969 | + const struct skb_shared_info *si; | |
| 970 | + | |
| 971 | + *addr = pci_map_single(pdev, skb->data, skb_headlen(skb), | |
| 972 | + PCI_DMA_TODEVICE); | |
| 973 | + if (pci_dma_mapping_error(pdev, *addr)) | |
| 974 | + goto out_err; | |
| 975 | + | |
| 976 | + si = skb_shinfo(skb); | |
| 977 | + end = &si->frags[si->nr_frags]; | |
| 978 | + | |
| 979 | + for (fp = si->frags; fp < end; fp++) { | |
| 980 | + *++addr = skb_frag_dma_map(&pdev->dev, fp, 0, skb_frag_size(fp), | |
| 981 | + DMA_TO_DEVICE); | |
| 982 | + if (pci_dma_mapping_error(pdev, *addr)) | |
| 983 | + goto unwind; | |
| 984 | + } | |
| 985 | + return 0; | |
| 986 | + | |
| 987 | +unwind: | |
| 988 | + while (fp-- > si->frags) | |
| 989 | + dma_unmap_page(&pdev->dev, *--addr, skb_frag_size(fp), | |
| 990 | + DMA_TO_DEVICE); | |
| 991 | + | |
| 992 | + pci_unmap_single(pdev, addr[-1], skb_headlen(skb), PCI_DMA_TODEVICE); | |
| 993 | +out_err: | |
| 994 | + return -ENOMEM; | |
| 995 | +} | |
| 996 | + | |
| 952 | 997 | /** |
| 953 | − * make_sgl - populate a scatter/gather list for a packet | |
| 998 | + * write_sgl - populate a scatter/gather list for a packet | |
| 954 | 999 | * @skb: the packet |
| 955 | 1000 | * @sgp: the SGL to populate |
| 956 | 1001 | * @start: start address of skb main body data to include in the SGL |
| 957 | 1002 | * @len: length of skb main body data to include in the SGL |
| 958 | − * @pdev: the PCI device | |
| 1003 | + * @addr: the list of the mapped addresses | |
| 959 | 1004 | * |
| 960 | − * Generates a scatter/gather list for the buffers that make up a packet | |
| 1005 | + * Copies the scatter/gather list for the buffers that make up a packet | |
| 961 | 1006 | * and returns the SGL size in 8-byte words. The caller must size the SGL |
| 962 | 1007 | * appropriately. |
| 963 | 1008 | */ |
| 964 | −static inline unsigned int make_sgl(const struct sk_buff *skb, | |
| 1009 | +static inline unsigned int write_sgl(const struct sk_buff *skb, | |
| 965 | 1010 | struct sg_ent *sgp, unsigned char *start, |
| 966 | − unsigned int len, struct pci_dev *pdev) | |
| 1011 | + unsigned int len, const dma_addr_t *addr) | |
| 967 | 1012 | { |
| 968 | − dma_addr_t mapping; | |
| 969 | − unsigned int i, j = 0, nfrags; | |
| 1013 | + unsigned int i, j = 0, k = 0, nfrags; | |
| 970 | 1014 | |
| 971 | 1015 | if (len) { |
| 972 | − mapping = pci_map_single(pdev, start, len, PCI_DMA_TODEVICE); | |
| 973 | 1016 | sgp->len[0] = cpu_to_be32(len); |
| 974 | − sgp->addr[0] = cpu_to_be64(mapping); | |
| 975 | − j = 1; | |
| 1017 | + sgp->addr[j++] = cpu_to_be64(addr[k++]); | |
| 976 | 1018 | } |
| 977 | 1019 | |
| 978 | 1020 | nfrags = skb_shinfo(skb)->nr_frags; |
| 979 | 1021 | for (i = 0; i < nfrags; i++) { |
| 980 | 1022 | const skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; |
| 981 | 1023 | |
| 982 | − mapping = skb_frag_dma_map(&pdev->dev, frag, 0, skb_frag_size(frag), | |
| 983 | − DMA_TO_DEVICE); | |
| 984 | 1024 | sgp->len[j] = cpu_to_be32(skb_frag_size(frag)); |
| 985 | − sgp->addr[j] = cpu_to_be64(mapping); | |
| 1025 | + sgp->addr[j] = cpu_to_be64(addr[k++]); | |
| 986 | 1026 | j ^= 1; |
| 987 | 1027 | if (j == 0) |
| 988 | 1028 | ++sgp; |
| @@ -1138,7 +1178,7 @@ static void write_tx_pkt_wr(struct adapter *adap, struct sk_buff *skb, · 149 unmodified lines | ||
| 1138 | 1178 | const struct port_info *pi, |
| 1139 | 1179 | unsigned int pidx, unsigned int gen, |
| 1140 | 1180 | struct sge_txq *q, unsigned int ndesc, |
| 1141 | − unsigned int compl) | |
| 1181 | + unsigned int compl, const dma_addr_t *addr) | |
| 1142 | 1182 | { |
| 1143 | 1183 | unsigned int flits, sgl_flits, cntrl, tso_info; |
| 1144 | 1184 | struct sg_ent *sgp, sgl[MAX_SKB_FRAGS / 2 + 1]; |
| @@ -1196,7 +1236,7 @@ static void write_tx_pkt_wr(struct adapter *adap, struct sk_buff *skb, · 51 unmodified lines | ||
| 1196 | 1236 | } |
| 1197 | 1237 | |
| 1198 | 1238 | sgp = ndesc == 1 ? (struct sg_ent *)&d->flit[flits] : sgl; |
| 1199 | − sgl_flits = make_sgl(skb, sgp, skb->data, skb_headlen(skb), adap->pdev); | |
| 1239 | + sgl_flits = write_sgl(skb, sgp, skb->data, skb_headlen(skb), addr); | |
| 1200 | 1240 | |
| 1201 | 1241 | write_wr_hdr_sgl(ndesc, skb, d, pidx, q, sgl, flits, sgl_flits, gen, |
| 1202 | 1242 | htonl(V_WR_OP(FW_WROPCODE_TUNNEL_TX_PKT) | compl), |
| @@ -1227,6 +1267,7 @@ netdev_tx_t t3_eth_xmit(struct sk_buff *skb, struct net_device *dev) · 24 unmodified lines | ||
| 1227 | 1267 | struct netdev_queue *txq; |
| 1228 | 1268 | struct sge_qset *qs; |
| 1229 | 1269 | struct sge_txq *q; |
| 1270 | + dma_addr_t addr[MAX_SKB_FRAGS + 1]; | |
| 1230 | 1271 | |
| 1231 | 1272 | /* |
| 1232 | 1273 | * The chip min packet length is 9 octets but play safe and reject |
| @@ -1255,6 +1296,11 @@ netdev_tx_t t3_eth_xmit(struct sk_buff *skb, struct net_device *dev) · 22 unmodified lines | ||
| 1255 | 1296 | return NETDEV_TX_BUSY; |
| 1256 | 1297 | } |
| 1257 | 1298 | |
| 1299 | + if (unlikely(map_skb(adap->pdev, skb, addr) < 0)) { | |
| 1300 | + dev_kfree_skb(skb); | |
| 1301 | + return NETDEV_TX_OK; | |
| 1302 | + } | |
| 1303 | + | |
| 1258 | 1304 | q->in_use += ndesc; |
| 1259 | 1305 | if (unlikely(credits - ndesc < q->stop_thres)) { |
| 1260 | 1306 | t3_stop_tx_queue(txq, qs, q); |
| @@ -1312,7 +1358,7 @@ netdev_tx_t t3_eth_xmit(struct sk_buff *skb, struct net_device *dev) · 51 unmodified lines | ||
| 1312 | 1358 | if (likely(!skb_shared(skb))) |
| 1313 | 1359 | skb_orphan(skb); |
| 1314 | 1360 | |
| 1315 | − write_tx_pkt_wr(adap, skb, pi, pidx, gen, q, ndesc, compl); | |
| 1361 | + write_tx_pkt_wr(adap, skb, pi, pidx, gen, q, ndesc, compl, addr); | |
| 1316 | 1362 | check_ring_tx_db(adap, q); |
| 1317 | 1363 | return NETDEV_TX_OK; |
| 1318 | 1364 | } |
| @@ -1537,10 +1583,9 @@ static void deferred_unmap_destructor(struct sk_buff *skb) · 218 unmodified lines | ||
| 1537 | 1583 | dui = (struct deferred_unmap_info *)skb->head; |
| 1538 | 1584 | p = dui->addr; |
| 1539 | 1585 | |
| 1540 | − if (skb->tail - skb->transport_header) | |
| 1541 | − pci_unmap_single(dui->pdev, *p++, | |
| 1542 | − skb->tail - skb->transport_header, | |
| 1543 | − PCI_DMA_TODEVICE); | |
| 1586 | + if (skb_tail_pointer(skb) - skb_transport_header(skb)) | |
| 1587 | + pci_unmap_single(dui->pdev, *p++, skb_tail_pointer(skb) - | |
| 1588 | + skb_transport_header(skb), PCI_DMA_TODEVICE); | |
| 1544 | 1589 | |
| 1545 | 1590 | si = skb_shinfo(skb); |
| 1546 | 1591 | for (i = 0; i < si->nr_frags; i++) |
| @@ -1578,7 +1623,8 @@ static void setup_deferred_unmapping(struct sk_buff *skb, struct pci_dev *pdev, · 31 unmodified lines | ||
| 1578 | 1623 | */ |
| 1579 | 1624 | static void write_ofld_wr(struct adapter *adap, struct sk_buff *skb, |
| 1580 | 1625 | struct sge_txq *q, unsigned int pidx, |
| 1581 | − unsigned int gen, unsigned int ndesc) | |
| 1626 | + unsigned int gen, unsigned int ndesc, | |
| 1627 | + const dma_addr_t *addr) | |
| 1582 | 1628 | { |
| 1583 | 1629 | unsigned int sgl_flits, flits; |
| 1584 | 1630 | struct work_request_hdr *from; |
| @@ -1599,9 +1645,9 @@ static void write_ofld_wr(struct adapter *adap, struct sk_buff *skb, · 14 unmodified lines | ||
| 1599 | 1645 | |
| 1600 | 1646 | flits = skb_transport_offset(skb) / 8; |
| 1601 | 1647 | sgp = ndesc == 1 ? (struct sg_ent *)&d->flit[flits] : sgl; |
| 1602 | − sgl_flits = make_sgl(skb, sgp, skb_transport_header(skb), | |
| 1603 | − skb->tail - skb->transport_header, | |
| 1604 | − adap->pdev); | |
| 1648 | + sgl_flits = write_sgl(skb, sgp, skb_transport_header(skb), | |
| 1649 | + skb_tail_pointer(skb) - | |
| 1650 | + skb_transport_header(skb), addr); | |
| 1605 | 1651 | if (need_skb_unmap()) { |
| 1606 | 1652 | setup_deferred_unmapping(skb, adap->pdev, sgp, sgl_flits); |
| 1607 | 1653 | skb->destructor = deferred_unmap_destructor; |
| @@ -1627,7 +1673,7 @@ static inline unsigned int calc_tx_descs_ofld(const struct sk_buff *skb) · 19 unmodified lines | ||
| 1627 | 1673 | |
| 1628 | 1674 | flits = skb_transport_offset(skb) / 8; /* headers */ |
| 1629 | 1675 | cnt = skb_shinfo(skb)->nr_frags; |
| 1630 | − if (skb->tail != skb->transport_header) | |
| 1676 | + if (skb_tail_pointer(skb) != skb_transport_header(skb)) | |
| 1631 | 1677 | cnt++; |
| 1632 | 1678 | return flits_to_desc(flits + sgl_len(cnt)); |
| 1633 | 1679 | } |
| @@ -1659,6 +1705,11 @@ again: reclaim_completed_tx(adap, q, TX_RECLAIM_CHUNK); · 25 unmodified lines | ||
| 1659 | 1705 | goto again; |
| 1660 | 1706 | } |
| 1661 | 1707 | |
| 1708 | + if (map_skb(adap->pdev, skb, (dma_addr_t *)skb->head)) { | |
| 1709 | + spin_unlock(&q->lock); | |
| 1710 | + return NET_XMIT_SUCCESS; | |
| 1711 | + } | |
| 1712 | + | |
| 1662 | 1713 | gen = q->gen; |
| 1663 | 1714 | q->in_use += ndesc; |
| 1664 | 1715 | pidx = q->pidx; |
| @@ -1669,7 +1720,7 @@ again: reclaim_completed_tx(adap, q, TX_RECLAIM_CHUNK); · 4 unmodified lines | ||
| 1669 | 1720 | } |
| 1670 | 1721 | spin_unlock(&q->lock); |
| 1671 | 1722 | |
| 1672 | − write_ofld_wr(adap, skb, q, pidx, gen, ndesc); | |
| 1723 | + write_ofld_wr(adap, skb, q, pidx, gen, ndesc, (dma_addr_t *)skb->head); | |
| 1673 | 1724 | check_ring_tx_db(adap, q); |
| 1674 | 1725 | return NET_XMIT_SUCCESS; |
| 1675 | 1726 | } |
| @@ -1687,6 +1738,7 @@ static void restart_offloadq(unsigned long data) · 11 unmodified lines | ||
| 1687 | 1738 | struct sge_txq *q = &qs->txq[TXQ_OFLD]; |
| 1688 | 1739 | const struct port_info *pi = netdev_priv(qs->netdev); |
| 1689 | 1740 | struct adapter *adap = pi->adapter; |
| 1741 | + unsigned int written = 0; | |
| 1690 | 1742 | |
| 1691 | 1743 | spin_lock(&q->lock); |
| 1692 | 1744 | again: reclaim_completed_tx(adap, q, TX_RECLAIM_CHUNK); |
| @@ -1706,10 +1758,14 @@ again: reclaim_completed_tx(adap, q, TX_RECLAIM_CHUNK); · 13 unmodified lines | ||
| 1706 | 1758 | break; |
| 1707 | 1759 | } |
| 1708 | 1760 | |
| 1761 | + if (map_skb(adap->pdev, skb, (dma_addr_t *)skb->head)) | |
| 1762 | + break; | |
| 1763 | + | |
| 1709 | 1764 | gen = q->gen; |
| 1710 | 1765 | q->in_use += ndesc; |
| 1711 | 1766 | pidx = q->pidx; |
| 1712 | 1767 | q->pidx += ndesc; |
| 1768 | + written += ndesc; | |
| 1713 | 1769 | if (q->pidx >= q->size) { |
| 1714 | 1770 | q->pidx -= q->size; |
| 1715 | 1771 | q->gen ^= 1; |
| @@ -1717,7 +1773,8 @@ again: reclaim_completed_tx(adap, q, TX_RECLAIM_CHUNK); · 1 unmodified line | ||
| 1717 | 1773 | __skb_unlink(skb, &q->sendq); |
| 1718 | 1774 | spin_unlock(&q->lock); |
| 1719 | 1775 | |
| 1720 | − write_ofld_wr(adap, skb, q, pidx, gen, ndesc); | |
| 1776 | + write_ofld_wr(adap, skb, q, pidx, gen, ndesc, | |
| 1777 | + (dma_addr_t *)skb->head); | |
| 1721 | 1778 | spin_lock(&q->lock); |
| 1722 | 1779 | } |
| 1723 | 1780 | spin_unlock(&q->lock); |
| @@ -1727,8 +1784,9 @@ again: reclaim_completed_tx(adap, q, TX_RECLAIM_CHUNK); · 3 unmodified lines | ||
| 1727 | 1784 | set_bit(TXQ_LAST_PKT_DB, &q->flags); |
| 1728 | 1785 | #endif |
| 1729 | 1786 | wmb(); |
| 1730 | − t3_write_reg(adap, A_SG_KDOORBELL, | |
| 1731 | − F_SELEGRCNTX | V_EGRCNTX(q->cntxt_id)); | |
| 1787 | + if (likely(written)) | |
| 1788 | + t3_write_reg(adap, A_SG_KDOORBELL, | |
| 1789 | + F_SELEGRCNTX | V_EGRCNTX(q->cntxt_id)); | |
| 1732 | 1790 | } |
| 1733 | 1791 | |
| 1734 | 1792 | /** |
| @@ -51,7 +51,7 @@ · 50 unmodified lines | ||
| 51 | 51 | #include "t4_hw.h" |
| 52 | 52 | |
| 53 | 53 | #define FW_VERSION_MAJOR 1 |
| 54 | −#define FW_VERSION_MINOR 1 | |
| 54 | +#define FW_VERSION_MINOR 4 | |
| 55 | 55 | #define FW_VERSION_MICRO 0 |
| 56 | 56 | |
| 57 | 57 | #define FW_VERSION_MAJOR_T5 0 |
| @@ -4842,8 +4842,17 @@ static int adap_init0(struct adapter *adap) · 4841 unmodified lines | ||
| 4842 | 4842 | * is excessively mismatched relative to the driver.) |
| 4843 | 4843 | */ |
| 4844 | 4844 | ret = t4_check_fw_version(adap); |
| 4845 | + | |
| 4846 | + /* The error code -EFAULT is returned by t4_check_fw_version() if | |
| 4847 | + * firmware on adapter < supported firmware. If firmware on adapter | |
| 4848 | + * is too old (not supported by driver) and we're the MASTER_PF set | |
| 4849 | + * adapter state to DEV_STATE_UNINIT to force firmware upgrade | |
| 4850 | + * and reinitialization. | |
| 4851 | + */ | |
| 4852 | + if ((adap->flags & MASTER_PF) && ret == -EFAULT) | |
| 4853 | + state = DEV_STATE_UNINIT; | |
| 4845 | 4854 | if ((adap->flags & MASTER_PF) && state != DEV_STATE_INIT) { |
| 4846 | − if (ret == -EINVAL || ret > 0) { | |
| 4855 | + if (ret == -EINVAL || ret == -EFAULT || ret > 0) { | |
| 4847 | 4856 | if (upgrade_fw(adap) >= 0) { |
| 4848 | 4857 | /* |
| 4849 | 4858 | * Note that the chip was reset as part of the |
| @@ -4852,7 +4861,21 @@ static int adap_init0(struct adapter *adap) · 2 unmodified lines | ||
| 4852 | 4861 | */ |
| 4853 | 4862 | reset = 0; |
| 4854 | 4863 | ret = t4_check_fw_version(adap); |
| 4855 | − } | |
| 4864 | + } else | |
| 4865 | + if (ret == -EFAULT) { | |
| 4866 | + /* | |
| 4867 | + * Firmware is old but still might | |
| 4868 | + * work if we force reinitialization | |
| 4869 | + * of the adapter. Ignoring FW upgrade | |
| 4870 | + * failure. | |
| 4871 | + */ | |
| 4872 | + dev_warn(adap->pdev_dev, | |
| 4873 | + "Ignoring firmware upgrade " | |
| 4874 | + "failure, and forcing driver " | |
| 4875 | + "to reinitialize the " | |
| 4876 | + "adapter.\n"); | |
| 4877 | + ret = 0; | |
| 4878 | + } | |
| 4856 | 4879 | } |
| 4857 | 4880 | if (ret < 0) |
| 4858 | 4881 | return ret; |
| @@ -1294,7 +1294,7 @@ static inline unsigned int calc_tx_flits_ofld(const struct sk_buff *skb) · 1293 unmodified lines | ||
| 1294 | 1294 | |
| 1295 | 1295 | flits = skb_transport_offset(skb) / 8U; /* headers */ |
| 1296 | 1296 | cnt = skb_shinfo(skb)->nr_frags; |
| 1297 | − if (skb->tail != skb->transport_header) | |
| 1297 | + if (skb_tail_pointer(skb) != skb_transport_header(skb)) | |
| 1298 | 1298 | cnt++; |
| 1299 | 1299 | return flits + sgl_len(cnt); |
| 1300 | 1300 | } |
| @@ -938,6 +938,15 @@ int t4_check_fw_version(struct adapter *adapter) · 937 unmodified lines | ||
| 938 | 938 | memcpy(adapter->params.api_vers, api_vers, |
| 939 | 939 | sizeof(adapter->params.api_vers)); |
| 940 | 940 | |
| 941 | + if (major < exp_major || (major == exp_major && minor < exp_minor) || | |
| 942 | + (major == exp_major && minor == exp_minor && micro < exp_micro)) { | |
| 943 | + dev_err(adapter->pdev_dev, | |
| 944 | + "Card has firmware version %u.%u.%u, minimum " | |
| 945 | + "supported firmware is %u.%u.%u.\n", major, minor, | |
| 946 | + micro, exp_major, exp_minor, exp_micro); | |
| 947 | + return -EFAULT; | |
| 948 | + } | |
| 949 | + | |
| 941 | 950 | if (major != exp_major) { /* major mismatch - fail */ |
| 942 | 951 | dev_err(adapter->pdev_dev, |
| 943 | 952 | "card FW has major version %u, driver wants %u\n", |
| @@ -3773,7 +3782,6 @@ int t4_port_init(struct adapter *adap, int mbox, int pf, int vf) · 2829 unmodified lines | ||
| 3773 | 3782 | p->lport = j; |
| 3774 | 3783 | p->rss_size = rss_size; |
| 3775 | 3784 | memcpy(adap->port[i]->dev_addr, addr, ETH_ALEN); |
| 3776 | − adap->port[i]->dev_id = j; | |
| 3777 | 3785 | |
| 3778 | 3786 | ret = ntohl(c.u.info.lstatus_to_modtype); |
| 3779 | 3787 | p->mdio_addr = (ret & FW_PORT_CMD_MDIOCAP) ? |
| @@ -44,7 +44,6 @@ config CS89x0_PLATFORM · 43 unmodified lines | ||
| 44 | 44 | config EP93XX_ETH |
| 45 | 45 | tristate "EP93xx Ethernet support" |
| 46 | 46 | depends on ARM && ARCH_EP93XX |
| 47 | − select NET_CORE | |
| 48 | 47 | select MII |
| 49 | 48 | help |
| 50 | 49 | This is a driver for the ethernet hardware included in EP93xx CPUs. |
| @@ -783,7 +783,6 @@ static int ep93xx_eth_remove(struct platform_device *pdev) · 782 unmodified lines | ||
| 783 | 783 | dev = platform_get_drvdata(pdev); |
| 784 | 784 | if (dev == NULL) |
| 785 | 785 | return 0; |
| 786 | − platform_set_drvdata(pdev, NULL); | |
| 787 | 786 | |
| 788 | 787 | ep = netdev_priv(dev); |
| 789 | 788 | |
| @@ -1761,6 +1761,7 @@ static void enic_change_mtu_work(struct work_struct *work) · 1760 unmodified lines | ||
| 1761 | 1761 | enic_synchronize_irqs(enic); |
| 1762 | 1762 | err = vnic_rq_disable(&enic->rq[0]); |
| 1763 | 1763 | if (err) { |
| 1764 | + rtnl_unlock(); | |
| 1764 | 1765 | netdev_err(netdev, "Unable to disable RQ.\n"); |
| 1765 | 1766 | return; |
| 1766 | 1767 | } |
| @@ -1773,6 +1774,7 @@ static void enic_change_mtu_work(struct work_struct *work) · 6 unmodified lines | ||
| 1773 | 1774 | vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf); |
| 1774 | 1775 | /* Need at least one buffer on ring to get going */ |
| 1775 | 1776 | if (vnic_rq_desc_used(&enic->rq[0]) == 0) { |
| 1777 | + rtnl_unlock(); | |
| 1776 | 1778 | netdev_err(netdev, "Unable to alloc receive buffers.\n"); |
| 1777 | 1779 | return; |
| 1778 | 1780 | } |
| @@ -6,7 +6,6 @@ config DM9000 · 5 unmodified lines | ||
| 6 | 6 | tristate "DM9000 support" |
| 7 | 7 | depends on ARM || BLACKFIN || MIPS || COLDFIRE |
| 8 | 8 | select CRC32 |
| 9 | − select NET_CORE | |
| 10 | 9 | select MII |
| 11 | 10 | ---help--- |
| 12 | 11 | Support for DM9000 chipset. |
| @@ -29,6 +29,8 @@ · 28 unmodified lines | ||
| 29 | 29 | #include <linux/spinlock.h> |
| 30 | 30 | #include <linux/crc32.h> |
| 31 | 31 | #include <linux/mii.h> |
| 32 | +#include <linux/of.h> | |
| 33 | +#include <linux/of_net.h> | |
| 32 | 34 | #include <linux/ethtool.h> |
| 33 | 35 | #include <linux/dm9000.h> |
| 34 | 36 | #include <linux/delay.h> |
| @@ -827,7 +829,7 @@ dm9000_hash_table_unlocked(struct net_device *dev) · 792 unmodified lines | ||
| 827 | 829 | struct netdev_hw_addr *ha; |
| 828 | 830 | int i, oft; |
| 829 | 831 | u32 hash_val; |
| 830 | − u16 hash_table[4]; | |
| 832 | + u16 hash_table[4] = { 0, 0, 0, 0x8000 }; /* broadcast address */ | |
| 831 | 833 | u8 rcr = RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN; |
| 832 | 834 | |
| 833 | 835 | dm9000_dbg(db, 1, "entering %s\n", __func__); |
| @@ -835,13 +837,6 @@ dm9000_hash_table_unlocked(struct net_device *dev) · 1 unmodified line | ||
| 835 | 837 | for (i = 0, oft = DM9000_PAR; i < 6; i++, oft++) |
| 836 | 838 | iow(db, oft, dev->dev_addr[i]); |
| 837 | 839 | |
| 838 | − /* Clear Hash Table */ | |
| 839 | − for (i = 0; i < 4; i++) | |
| 840 | − hash_table[i] = 0x0; | |
| 841 | − | |
| 842 | − /* broadcast address */ | |
| 843 | − hash_table[3] = 0x8000; | |
| 844 | − | |
| 845 | 840 | if (dev->flags & IFF_PROMISC) |
| 846 | 841 | rcr |= RCR_PRMSC; |
| 847 | 842 | |
| @@ -1358,6 +1353,31 @@ static const struct net_device_ops dm9000_netdev_ops = { · 510 unmodified lines | ||
| 1358 | 1353 | #endif |
| 1359 | 1354 | }; |
| 1360 | 1355 | |
| 1356 | +static struct dm9000_plat_data *dm9000_parse_dt(struct device *dev) | |
| 1357 | +{ | |
| 1358 | + struct dm9000_plat_data *pdata; | |
| 1359 | + struct device_node *np = dev->of_node; | |
| 1360 | + const void *mac_addr; | |
| 1361 | + | |
| 1362 | + if (!IS_ENABLED(CONFIG_OF) || !np) | |
| 1363 | + return NULL; | |
| 1364 | + | |
| 1365 | + pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); | |
| 1366 | + if (!pdata) | |
| 1367 | + return ERR_PTR(-ENOMEM); | |
| 1368 | + | |
| 1369 | + if (of_find_property(np, "davicom,ext-phy", NULL)) | |
| 1370 | + pdata->flags |= DM9000_PLATF_EXT_PHY; | |
| 1371 | + if (of_find_property(np, "davicom,no-eeprom", NULL)) | |
| 1372 | + pdata->flags |= DM9000_PLATF_NO_EEPROM; | |
| 1373 | + | |
| 1374 | + mac_addr = of_get_mac_address(np); | |
| 1375 | + if (mac_addr) | |
| 1376 | + memcpy(pdata->dev_addr, mac_addr, sizeof(pdata->dev_addr)); | |
| 1377 | + | |
| 1378 | + return pdata; | |
| 1379 | +} | |
| 1380 | + | |
| 1361 | 1381 | /* |
| 1362 | 1382 | * Search DM9000 board, allocate space and register it |
| 1363 | 1383 | */ |
| @@ -1373,6 +1393,12 @@ dm9000_probe(struct platform_device *pdev) · 9 unmodified lines | ||
| 1373 | 1393 | int i; |
| 1374 | 1394 | u32 id_val; |
| 1375 | 1395 | |
| 1396 | + if (!pdata) { | |
| 1397 | + pdata = dm9000_parse_dt(&pdev->dev); | |
| 1398 | + if (IS_ERR(pdata)) | |
| 1399 | + return PTR_ERR(pdata); | |
| 1400 | + } | |
| 1401 | + | |
| 1376 | 1402 | /* Init network device */ |
| 1377 | 1403 | ndev = alloc_etherdev(sizeof(struct board_info)); |
| 1378 | 1404 | if (!ndev) |
| @@ -1673,8 +1699,6 @@ dm9000_drv_remove(struct platform_device *pdev) · 294 unmodified lines | ||
| 1673 | 1699 | { |
| 1674 | 1700 | struct net_device *ndev = platform_get_drvdata(pdev); |
| 1675 | 1701 | |
| 1676 | − platform_set_drvdata(pdev, NULL); | |
| 1677 | − | |
| 1678 | 1702 | unregister_netdev(ndev); |
| 1679 | 1703 | dm9000_release_board(pdev, netdev_priv(ndev)); |
| 1680 | 1704 | free_netdev(ndev); /* free device structure */ |
| @@ -1683,11 +1707,20 @@ dm9000_drv_remove(struct platform_device *pdev) · 2 unmodified lines | ||
| 1683 | 1707 | return 0; |
| 1684 | 1708 | } |
| 1685 | 1709 | |
| 1710 | +#ifdef CONFIG_OF | |
| 1711 | +static const struct of_device_id dm9000_of_matches[] = { | |
| 1712 | + { .compatible = "davicom,dm9000", }, | |
| 1713 | + { /* sentinel */ } | |
| 1714 | +}; | |
| 1715 | +MODULE_DEVICE_TABLE(of, dm9000_of_matches); | |
| 1716 | +#endif | |
| 1717 | + | |
| 1686 | 1718 | static struct platform_driver dm9000_driver = { |
| 1687 | 1719 | .driver = { |
| 1688 | 1720 | .name = "dm9000", |
| 1689 | 1721 | .owner = THIS_MODULE, |
| 1690 | 1722 | .pm = &dm9000_drv_pm_ops, |
| 1723 | + .of_match_table = of_match_ptr(dm9000_of_matches), | |
| 1691 | 1724 | }, |
| 1692 | 1725 | .probe = dm9000_probe, |
| 1693 | 1726 | .remove = dm9000_drv_remove, |
| @@ -126,7 +126,6 @@ config WINBOND_840 · 125 unmodified lines | ||
| 126 | 126 | tristate "Winbond W89c840 Ethernet support" |
| 127 | 127 | depends on PCI |
| 128 | 128 | select CRC32 |
| 129 | − select NET_CORE | |
| 130 | 129 | select MII |
| 131 | 130 | ---help--- |
| 132 | 131 | This driver is for the Winbond W89c840 chip. It also works with |
| @@ -1410,12 +1410,6 @@ static int tulip_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) · 1409 unmodified lines | ||
| 1410 | 1410 | return i; |
| 1411 | 1411 | } |
| 1412 | 1412 | |
| 1413 | − /* The chip will fail to enter a low-power state later unless | |
| 1414 | − * first explicitly commanded into D0 */ | |
| 1415 | − if (pci_set_power_state(pdev, PCI_D0)) { | |
| 1416 | − pr_notice("Failed to set power state to D0\n"); | |
| 1417 | − } | |
| 1418 | − | |
| 1419 | 1413 | irq = pdev->irq; |
| 1420 | 1414 | |
| 1421 | 1415 | /* alloc_etherdev ensures aligned and zeroed private structures */ |
| @@ -1171,16 +1171,4 @@ investigate_write_descriptor(struct net_device *dev, · 1170 unmodified lines | ||
| 1171 | 1171 | } |
| 1172 | 1172 | } |
| 1173 | 1173 | |
| 1174 | −static int __init xircom_init(void) | |
| 1175 | −{ | |
| 1176 | − return pci_register_driver(&xircom_ops); | |
| 1177 | −} | |
| 1178 | − | |
| 1179 | −static void __exit xircom_exit(void) | |
| 1180 | −{ | |
| 1181 | − pci_unregister_driver(&xircom_ops); | |
| 1182 | −} | |
| 1183 | − | |
| 1184 | −module_init(xircom_init) | |
| 1185 | −module_exit(xircom_exit) | |
| 1186 | − | |
| 1174 | +module_pci_driver(xircom_ops); | |
| @@ -36,7 +36,6 @@ config SUNDANCE · 35 unmodified lines | ||
| 36 | 36 | tristate "Sundance Alta support" |
| 37 | 37 | depends on PCI |
| 38 | 38 | select CRC32 |
| 39 | − select NET_CORE | |
| 40 | 39 | select MII |
| 41 | 40 | ---help--- |
| 42 | 41 | This driver is for the Sundance "Alta" chip. |
| @@ -333,6 +333,9 @@ enum vf_state { · 332 unmodified lines | ||
| 333 | 333 | #define BE_VF_UC_PMAC_COUNT 2 |
| 334 | 334 | #define BE_FLAGS_QNQ_ASYNC_EVT_RCVD (1 << 11) |
| 335 | 335 | |
| 336 | +/* Ethtool set_dump flags */ | |
| 337 | +#define LANCER_INITIATE_FW_DUMP 0x1 | |
| 338 | + | |
| 336 | 339 | struct phy_info { |
| 337 | 340 | u8 transceiver; |
| 338 | 341 | u8 autoneg; |
| @@ -398,6 +401,7 @@ struct be_adapter { · 59 unmodified lines | ||
| 398 | 401 | u32 cmd_privileges; |
| 399 | 402 | /* Ethtool knobs and info */ |
| 400 | 403 | char fw_ver[FW_VER_LEN]; |
| 404 | + char fw_on_flash[FW_VER_LEN]; | |
| 401 | 405 | int if_handle; /* Used to configure filtering */ |
| 402 | 406 | u32 *pmac_id; /* MAC addr handle used by BE card */ |
| 403 | 407 | u32 beacon_state; /* for set_phys_id */ |
| @@ -3255,6 +3255,72 @@ err: · 3254 unmodified lines | ||
| 3255 | 3255 | return status; |
| 3256 | 3256 | } |
| 3257 | 3257 | |
| 3258 | +static int lancer_wait_idle(struct be_adapter *adapter) | |
| 3259 | +{ | |
| 3260 | +#define SLIPORT_IDLE_TIMEOUT 30 | |
| 3261 | + u32 reg_val; | |
| 3262 | + int status = 0, i; | |
| 3263 | + | |
| 3264 | + for (i = 0; i < SLIPORT_IDLE_TIMEOUT; i++) { | |
| 3265 | + reg_val = ioread32(adapter->db + PHYSDEV_CONTROL_OFFSET); | |
| 3266 | + if ((reg_val & PHYSDEV_CONTROL_INP_MASK) == 0) | |
| 3267 | + break; | |
| 3268 | + | |
| 3269 | + ssleep(1); | |
| 3270 | + } | |
| 3271 | + | |
| 3272 | + if (i == SLIPORT_IDLE_TIMEOUT) | |
| 3273 | + status = -1; | |
| 3274 | + | |
| 3275 | + return status; | |
| 3276 | +} | |
| 3277 | + | |
| 3278 | +int lancer_physdev_ctrl(struct be_adapter *adapter, u32 mask) | |
| 3279 | +{ | |
| 3280 | + int status = 0; | |
| 3281 | + | |
| 3282 | + status = lancer_wait_idle(adapter); | |
| 3283 | + if (status) | |
| 3284 | + return status; | |
| 3285 | + | |
| 3286 | + iowrite32(mask, adapter->db + PHYSDEV_CONTROL_OFFSET); | |
| 3287 | + | |
| 3288 | + return status; | |
| 3289 | +} | |
| 3290 | + | |
| 3291 | +/* Routine to check whether dump image is present or not */ | |
| 3292 | +bool dump_present(struct be_adapter *adapter) | |
| 3293 | +{ | |
| 3294 | + u32 sliport_status = 0; | |
| 3295 | + | |
| 3296 | + sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); | |
| 3297 | + return !!(sliport_status & SLIPORT_STATUS_DIP_MASK); | |
| 3298 | +} | |
| 3299 | + | |
| 3300 | +int lancer_initiate_dump(struct be_adapter *adapter) | |
| 3301 | +{ | |
| 3302 | + int status; | |
| 3303 | + | |
| 3304 | + /* give firmware reset and diagnostic dump */ | |
| 3305 | + status = lancer_physdev_ctrl(adapter, PHYSDEV_CONTROL_FW_RESET_MASK | | |
| 3306 | + PHYSDEV_CONTROL_DD_MASK); | |
| 3307 | + if (status < 0) { | |
| 3308 | + dev_err(&adapter->pdev->dev, "Firmware reset failed\n"); | |
| 3309 | + return status; | |
| 3310 | + } | |
| 3311 | + | |
| 3312 | + status = lancer_wait_idle(adapter); | |
| 3313 | + if (status) | |
| 3314 | + return status; | |
| 3315 | + | |
| 3316 | + if (!dump_present(adapter)) { | |
| 3317 | + dev_err(&adapter->pdev->dev, "Dump image not present\n"); | |
| 3318 | + return -1; | |
| 3319 | + } | |
| 3320 | + | |
| 3321 | + return 0; | |
| 3322 | +} | |
| 3323 | + | |
| 3258 | 3324 | /* Uses sync mcc */ |
| 3259 | 3325 | int be_cmd_enable_vf(struct be_adapter *adapter, u8 domain) |
| 3260 | 3326 | { |
| @@ -1937,6 +1937,9 @@ extern int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter, · 1936 unmodified lines | ||
| 1937 | 1937 | struct be_dma_mem *cmd, |
| 1938 | 1938 | struct be_fat_conf_params *cfgs); |
| 1939 | 1939 | extern int lancer_wait_ready(struct be_adapter *adapter); |
| 1940 | +extern int lancer_physdev_ctrl(struct be_adapter *adapter, u32 mask); | |
| 1941 | +extern int lancer_initiate_dump(struct be_adapter *adapter); | |
| 1942 | +extern bool dump_present(struct be_adapter *adapter); | |
| 1940 | 1943 | extern int lancer_test_and_set_rdy_state(struct be_adapter *adapter); |
| 1941 | 1944 | extern int be_cmd_query_port_name(struct be_adapter *adapter, u8 *port_name); |
| 1942 | 1945 | extern int be_cmd_get_func_config(struct be_adapter *adapter); |
| @@ -177,19 +177,15 @@ static void be_get_drvinfo(struct net_device *netdev, · 176 unmodified lines | ||
| 177 | 177 | struct ethtool_drvinfo *drvinfo) |
| 178 | 178 | { |
| 179 | 179 | struct be_adapter *adapter = netdev_priv(netdev); |
| 180 | − char fw_on_flash[FW_VER_LEN]; | |
| 181 | − | |
| 182 | − memset(fw_on_flash, 0 , sizeof(fw_on_flash)); | |
| 183 | − be_cmd_get_fw_ver(adapter, adapter->fw_ver, fw_on_flash); | |
| 184 | 180 | |
| 185 | 181 | strlcpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver)); |
| 186 | 182 | strlcpy(drvinfo->version, DRV_VER, sizeof(drvinfo->version)); |
| 187 | − if (!memcmp(adapter->fw_ver, fw_on_flash, FW_VER_LEN)) | |
| 183 | + if (!memcmp(adapter->fw_ver, adapter->fw_on_flash, FW_VER_LEN)) | |
| 188 | 184 | strlcpy(drvinfo->fw_version, adapter->fw_ver, |
| 189 | 185 | sizeof(drvinfo->fw_version)); |
| 190 | 186 | else |
| 191 | 187 | snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version), |
| 192 | − "%s [%s]", adapter->fw_ver, fw_on_flash); | |
| 188 | + "%s [%s]", adapter->fw_ver, adapter->fw_on_flash); | |
| 193 | 189 | |
| 194 | 190 | strlcpy(drvinfo->bus_info, pci_name(adapter->pdev), |
| 195 | 191 | sizeof(drvinfo->bus_info)); |
| @@ -673,6 +669,34 @@ be_set_phys_id(struct net_device *netdev, · 477 unmodified lines | ||
| 673 | 669 | return 0; |
| 674 | 670 | } |
| 675 | 671 | |
| 672 | +static int be_set_dump(struct net_device *netdev, struct ethtool_dump *dump) | |
| 673 | +{ | |
| 674 | + struct be_adapter *adapter = netdev_priv(netdev); | |
| 675 | + struct device *dev = &adapter->pdev->dev; | |
| 676 | + int status; | |
| 677 | + | |
| 678 | + if (!lancer_chip(adapter)) { | |
| 679 | + dev_err(dev, "FW dump not supported\n"); | |
| 680 | + return -EOPNOTSUPP; | |
| 681 | + } | |
| 682 | + | |
| 683 | + if (dump_present(adapter)) { | |
| 684 | + dev_err(dev, "Previous dump not cleared, not forcing dump\n"); | |
| 685 | + return 0; | |
| 686 | + } | |
| 687 | + | |
| 688 | + switch (dump->flag) { | |
| 689 | + case LANCER_INITIATE_FW_DUMP: | |
| 690 | + status = lancer_initiate_dump(adapter); | |
| 691 | + if (!status) | |
| 692 | + dev_info(dev, "F/w dump initiated successfully\n"); | |
| 693 | + break; | |
| 694 | + default: | |
| 695 | + dev_err(dev, "Invalid dump level: 0x%x\n", dump->flag); | |
| 696 | + return -EINVAL; | |
| 697 | + } | |
| 698 | + return status; | |
| 699 | +} | |
| 676 | 700 | |
| 677 | 701 | static void |
| 678 | 702 | be_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) |
| @@ -1110,6 +1134,7 @@ const struct ethtool_ops be_ethtool_ops = { · 431 unmodified lines | ||
| 1110 | 1134 | .set_pauseparam = be_set_pauseparam, |
| 1111 | 1135 | .get_strings = be_get_stat_strings, |
| 1112 | 1136 | .set_phys_id = be_set_phys_id, |
| 1137 | + .set_dump = be_set_dump, | |
| 1113 | 1138 | .get_msglevel = be_get_msg_level, |
| 1114 | 1139 | .set_msglevel = be_set_msg_level, |
| 1115 | 1140 | .get_sset_count = be_get_sset_count, |
| @@ -53,10 +53,12 @@ · 52 unmodified lines | ||
| 53 | 53 | #define PHYSDEV_CONTROL_OFFSET 0x414 |
| 54 | 54 | |
| 55 | 55 | #define SLIPORT_STATUS_ERR_MASK 0x80000000 |
| 56 | +#define SLIPORT_STATUS_DIP_MASK 0x02000000 | |
| 56 | 57 | #define SLIPORT_STATUS_RN_MASK 0x01000000 |
| 57 | 58 | #define SLIPORT_STATUS_RDY_MASK 0x00800000 |
| 58 | 59 | #define SLI_PORT_CONTROL_IP_MASK 0x08000000 |
| 59 | 60 | #define PHYSDEV_CONTROL_FW_RESET_MASK 0x00000002 |
| 61 | +#define PHYSDEV_CONTROL_DD_MASK 0x00000004 | |
| 60 | 62 | #define PHYSDEV_CONTROL_INP_MASK 0x40000000 |
| 61 | 63 | |
| 62 | 64 | #define SLIPORT_ERROR_NO_RESOURCE1 0x2 |
| @@ -834,32 +834,39 @@ static int be_vlan_tag_tx_chk(struct be_adapter *adapter, struct sk_buff *skb) · 833 unmodified lines | ||
| 834 | 834 | return vlan_tx_tag_present(skb) || adapter->pvid || adapter->qnq_vid; |
| 835 | 835 | } |
| 836 | 836 | |
| 837 | −static int be_ipv6_tx_stall_chk(struct be_adapter *adapter, struct sk_buff *skb) | |
| 837 | +static int be_ipv6_tx_stall_chk(struct be_adapter *adapter, | |
| 838 | + struct sk_buff *skb) | |
| 838 | 839 | { |
| 839 | − return BE3_chip(adapter) && | |
| 840 | − be_ipv6_exthdr_check(skb); | |
| 840 | + return BE3_chip(adapter) && be_ipv6_exthdr_check(skb); | |
| 841 | 841 | } |
| 842 | 842 | |
| 843 | −static netdev_tx_t be_xmit(struct sk_buff *skb, | |
| 844 | − struct net_device *netdev) | |
| 843 | +static struct sk_buff *be_xmit_workarounds(struct be_adapter *adapter, | |
| 844 | + struct sk_buff *skb, | |
| 845 | + bool *skip_hw_vlan) | |
| 845 | 846 | { |
| 846 | − struct be_adapter *adapter = netdev_priv(netdev); | |
| 847 | − struct be_tx_obj *txo = &adapter->tx_obj[skb_get_queue_mapping(skb)]; | |
| 848 | − struct be_queue_info *txq = &txo->q; | |
| 849 | − struct iphdr *ip = NULL; | |
| 850 | − u32 wrb_cnt = 0, copied = 0; | |
| 851 | − u32 start = txq->head, eth_hdr_len; | |
| 852 | − bool dummy_wrb, stopped = false; | |
| 853 | − bool skip_hw_vlan = false; | |
| 854 | 847 | struct vlan_ethhdr *veh = (struct vlan_ethhdr *)skb->data; |
| 848 | + unsigned int eth_hdr_len; | |
| 849 | + struct iphdr *ip; | |
| 855 | 850 | |
| 856 | − eth_hdr_len = ntohs(skb->protocol) == ETH_P_8021Q ? | |
| 857 | − VLAN_ETH_HLEN : ETH_HLEN; | |
| 851 | + /* Lancer ASIC has a bug wherein packets that are 32 bytes or less | |
| 852 | + * may cause a transmit stall on that port. So the work-around is to | |
| 853 | + * pad such packets to a 36-byte length. | |
| 854 | + */ | |
| 855 | + if (unlikely(lancer_chip(adapter) && skb->len <= 32)) { | |
| 856 | + if (skb_padto(skb, 36)) | |
| 857 | + goto tx_drop; | |
| 858 | + skb->len = 36; | |
| 859 | + } | |
| 858 | 860 | |
| 859 | 861 | /* For padded packets, BE HW modifies tot_len field in IP header |
| 860 | 862 | * incorrecly when VLAN tag is inserted by HW. |
| 863 | + * For padded packets, Lancer computes incorrect checksum. | |
| 861 | 864 | */ |
| 862 | − if (skb->len <= 60 && vlan_tx_tag_present(skb) && is_ipv4_pkt(skb)) { | |
| 865 | + eth_hdr_len = ntohs(skb->protocol) == ETH_P_8021Q ? | |
| 866 | + VLAN_ETH_HLEN : ETH_HLEN; | |
| 867 | + if (skb->len <= 60 && | |
| 868 | + (lancer_chip(adapter) || vlan_tx_tag_present(skb)) && | |
| 869 | + is_ipv4_pkt(skb)) { | |
| 863 | 870 | ip = (struct iphdr *)ip_hdr(skb); |
| 864 | 871 | pskb_trim(skb, eth_hdr_len + ntohs(ip->tot_len)); |
| 865 | 872 | } |
| @@ -869,15 +876,15 @@ static netdev_tx_t be_xmit(struct sk_buff *skb, · 3 unmodified lines | ||
| 869 | 876 | */ |
| 870 | 877 | if ((adapter->function_mode & UMC_ENABLED) && |
| 871 | 878 | veh->h_vlan_proto == htons(ETH_P_8021Q)) |
| 872 | − skip_hw_vlan = true; | |
| 879 | + *skip_hw_vlan = true; | |
| 873 | 880 | |
| 874 | 881 | /* HW has a bug wherein it will calculate CSUM for VLAN |
| 875 | 882 | * pkts even though it is disabled. |
| 876 | 883 | * Manually insert VLAN in pkt. |
| 877 | 884 | */ |
| 878 | 885 | if (skb->ip_summed != CHECKSUM_PARTIAL && |
| 879 | − vlan_tx_tag_present(skb)) { | |
| 880 | − skb = be_insert_vlan_in_pkt(adapter, skb, &skip_hw_vlan); | |
| 886 | + vlan_tx_tag_present(skb)) { | |
| 887 | + skb = be_insert_vlan_in_pkt(adapter, skb, skip_hw_vlan); | |
| 881 | 888 | if (unlikely(!skb)) |
| 882 | 889 | goto tx_drop; |
| 883 | 890 | } |
| @@ -887,8 +894,8 @@ static netdev_tx_t be_xmit(struct sk_buff *skb, · 3 unmodified lines | ||
| 887 | 894 | * skip HW tagging is not enabled by FW. |
| 888 | 895 | */ |
| 889 | 896 | if (unlikely(be_ipv6_tx_stall_chk(adapter, skb) && |
| 890 | − (adapter->pvid || adapter->qnq_vid) && | |
| 891 | − !qnq_async_evt_rcvd(adapter))) | |
| 897 | + (adapter->pvid || adapter->qnq_vid) && | |
| 898 | + !qnq_async_evt_rcvd(adapter))) | |
| 892 | 899 | goto tx_drop; |
| 893 | 900 | |
| 894 | 901 | /* Manual VLAN tag insertion to prevent: |
| @@ -899,11 +906,31 @@ static netdev_tx_t be_xmit(struct sk_buff *skb, · 4 unmodified lines | ||
| 899 | 906 | */ |
| 900 | 907 | if (be_ipv6_tx_stall_chk(adapter, skb) && |
| 901 | 908 | be_vlan_tag_tx_chk(adapter, skb)) { |
| 902 | − skb = be_insert_vlan_in_pkt(adapter, skb, &skip_hw_vlan); | |
| 909 | + skb = be_insert_vlan_in_pkt(adapter, skb, skip_hw_vlan); | |
| 903 | 910 | if (unlikely(!skb)) |
| 904 | 911 | goto tx_drop; |
| 905 | 912 | } |
| 906 | 913 | |
| 914 | + return skb; | |
| 915 | +tx_drop: | |
| 916 | + dev_kfree_skb_any(skb); | |
| 917 | + return NULL; | |
| 918 | +} | |
| 919 | + | |
| 920 | +static netdev_tx_t be_xmit(struct sk_buff *skb, struct net_device *netdev) | |
| 921 | +{ | |
| 922 | + struct be_adapter *adapter = netdev_priv(netdev); | |
| 923 | + struct be_tx_obj *txo = &adapter->tx_obj[skb_get_queue_mapping(skb)]; | |
| 924 | + struct be_queue_info *txq = &txo->q; | |
| 925 | + bool dummy_wrb, stopped = false; | |
| 926 | + u32 wrb_cnt = 0, copied = 0; | |
| 927 | + bool skip_hw_vlan = false; | |
| 928 | + u32 start = txq->head; | |
| 929 | + | |
| 930 | + skb = be_xmit_workarounds(adapter, skb, &skip_hw_vlan); | |
| 931 | + if (!skb) | |
| 932 | + return NETDEV_TX_OK; | |
| 933 | + | |
| 907 | 934 | wrb_cnt = wrb_cnt_for_skb(adapter, skb, &dummy_wrb); |
| 908 | 935 | |
| 909 | 936 | copied = make_tx_wrbs(adapter, txq, skb, wrb_cnt, dummy_wrb, |
| @@ -933,7 +960,6 @@ static netdev_tx_t be_xmit(struct sk_buff *skb, · 23 unmodified lines | ||
| 933 | 960 | txq->head = start; |
| 934 | 961 | dev_kfree_skb_any(skb); |
| 935 | 962 | } |
| 936 | −tx_drop: | |
| 937 | 963 | return NETDEV_TX_OK; |
| 938 | 964 | } |
| 939 | 965 | |
| @@ -1236,30 +1262,6 @@ static int be_set_vf_tx_rate(struct net_device *netdev, · 296 unmodified lines | ||
| 1236 | 1262 | return status; |
| 1237 | 1263 | } |
| 1238 | 1264 | |
| 1239 | −static int be_find_vfs(struct be_adapter *adapter, int vf_state) | |
| 1240 | −{ | |
| 1241 | − struct pci_dev *dev, *pdev = adapter->pdev; | |
| 1242 | − int vfs = 0, assigned_vfs = 0, pos; | |
| 1243 | − u16 offset, stride; | |
| 1244 | − | |
| 1245 | − pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV); | |
| 1246 | − if (!pos) | |
| 1247 | − return 0; | |
| 1248 | − pci_read_config_word(pdev, pos + PCI_SRIOV_VF_OFFSET, &offset); | |
| 1249 | − pci_read_config_word(pdev, pos + PCI_SRIOV_VF_STRIDE, &stride); | |
| 1250 | − | |
| 1251 | − dev = pci_get_device(pdev->vendor, PCI_ANY_ID, NULL); | |
| 1252 | − while (dev) { | |
| 1253 | − if (dev->is_virtfn && pci_physfn(dev) == pdev) { | |
| 1254 | − vfs++; | |
| 1255 | − if (dev->dev_flags & PCI_DEV_FLAGS_ASSIGNED) | |
| 1256 | − assigned_vfs++; | |
| 1257 | − } | |
| 1258 | − dev = pci_get_device(pdev->vendor, PCI_ANY_ID, dev); | |
| 1259 | − } | |
| 1260 | − return (vf_state == ASSIGNED) ? assigned_vfs : vfs; | |
| 1261 | −} | |
| 1262 | − | |
| 1263 | 1265 | static void be_eqd_update(struct be_adapter *adapter, struct be_eq_obj *eqo) |
| 1264 | 1266 | { |
| 1265 | 1267 | struct be_rx_stats *stats = rx_stats(&adapter->rx_obj[eqo->idx]); |
| @@ -2771,7 +2773,7 @@ static void be_vf_clear(struct be_adapter *adapter) · 1505 unmodified lines | ||
| 2771 | 2773 | struct be_vf_cfg *vf_cfg; |
| 2772 | 2774 | u32 vf; |
| 2773 | 2775 | |
| 2774 | − if (be_find_vfs(adapter, ASSIGNED)) { | |
| 2776 | + if (pci_vfs_assigned(adapter->pdev)) { | |
| 2775 | 2777 | dev_warn(&adapter->pdev->dev, |
| 2776 | 2778 | "VFs are assigned to VMs: not disabling VFs\n"); |
| 2777 | 2779 | goto done; |
| @@ -2873,7 +2875,7 @@ static int be_vf_setup(struct be_adapter *adapter) · 95 unmodified lines | ||
| 2873 | 2875 | int status, old_vfs, vf; |
| 2874 | 2876 | struct device *dev = &adapter->pdev->dev; |
| 2875 | 2877 | |
| 2876 | − old_vfs = be_find_vfs(adapter, ENABLED); | |
| 2878 | + old_vfs = pci_num_vf(adapter->pdev); | |
| 2877 | 2879 | if (old_vfs) { |
| 2878 | 2880 | dev_info(dev, "%d VFs are already enabled\n", old_vfs); |
| 2879 | 2881 | if (old_vfs != num_vfs) |
| @@ -3184,7 +3186,7 @@ static int be_setup(struct be_adapter *adapter) · 304 unmodified lines | ||
| 3184 | 3186 | if (status) |
| 3185 | 3187 | goto err; |
| 3186 | 3188 | |
| 3187 | − be_cmd_get_fw_ver(adapter, adapter->fw_ver, NULL); | |
| 3189 | + be_cmd_get_fw_ver(adapter, adapter->fw_ver, adapter->fw_on_flash); | |
| 3188 | 3190 | |
| 3189 | 3191 | if (adapter->vlans_added) |
| 3190 | 3192 | be_vid_config(adapter); |
| @@ -3530,40 +3532,6 @@ static int be_flash_skyhawk(struct be_adapter *adapter, · 339 unmodified lines | ||
| 3530 | 3532 | return 0; |
| 3531 | 3533 | } |
| 3532 | 3534 | |
| 3533 | −static int lancer_wait_idle(struct be_adapter *adapter) | |
| 3534 | −{ | |
| 3535 | −#define SLIPORT_IDLE_TIMEOUT 30 | |
| 3536 | − u32 reg_val; | |
| 3537 | − int status = 0, i; | |
| 3538 | − | |
| 3539 | − for (i = 0; i < SLIPORT_IDLE_TIMEOUT; i++) { | |
| 3540 | − reg_val = ioread32(adapter->db + PHYSDEV_CONTROL_OFFSET); | |
| 3541 | − if ((reg_val & PHYSDEV_CONTROL_INP_MASK) == 0) | |
| 3542 | − break; | |
| 3543 | − | |
| 3544 | − ssleep(1); | |
| 3545 | − } | |
| 3546 | − | |
| 3547 | − if (i == SLIPORT_IDLE_TIMEOUT) | |
| 3548 | − status = -1; | |
| 3549 | − | |
| 3550 | − return status; | |
| 3551 | −} | |
| 3552 | − | |
| 3553 | −static int lancer_fw_reset(struct be_adapter *adapter) | |
| 3554 | −{ | |
| 3555 | − int status = 0; | |
| 3556 | − | |
| 3557 | − status = lancer_wait_idle(adapter); | |
| 3558 | − if (status) | |
| 3559 | − return status; | |
| 3560 | − | |
| 3561 | − iowrite32(PHYSDEV_CONTROL_FW_RESET_MASK, adapter->db + | |
| 3562 | − PHYSDEV_CONTROL_OFFSET); | |
| 3563 | − | |
| 3564 | − return status; | |
| 3565 | −} | |
| 3566 | − | |
| 3567 | 3535 | static int lancer_fw_download(struct be_adapter *adapter, |
| 3568 | 3536 | const struct firmware *fw) |
| 3569 | 3537 | { |
| @@ -3641,7 +3609,8 @@ static int lancer_fw_download(struct be_adapter *adapter, · 71 unmodified lines | ||
| 3641 | 3609 | } |
| 3642 | 3610 | |
| 3643 | 3611 | if (change_status == LANCER_FW_RESET_NEEDED) { |
| 3644 | − status = lancer_fw_reset(adapter); | |
| 3612 | + status = lancer_physdev_ctrl(adapter, | |
| 3613 | + PHYSDEV_CONTROL_FW_RESET_MASK); | |
| 3645 | 3614 | if (status) { |
| 3646 | 3615 | dev_err(&adapter->pdev->dev, |
| 3647 | 3616 | "Adapter busy for FW reset.\n" |
| @@ -3776,6 +3745,10 @@ int be_load_fw(struct be_adapter *adapter, u8 *fw_file) · 128 unmodified lines | ||
| 3776 | 3745 | else |
| 3777 | 3746 | status = be_fw_download(adapter, fw); |
| 3778 | 3747 | |
| 3748 | + if (!status) | |
| 3749 | + be_cmd_get_fw_ver(adapter, adapter->fw_ver, | |
| 3750 | + adapter->fw_on_flash); | |
| 3751 | + | |
| 3779 | 3752 | fw_exit: |
| 3780 | 3753 | release_firmware(fw); |
| 3781 | 3754 | return status; |
| @@ -4203,9 +4176,10 @@ reschedule: · 421 unmodified lines | ||
| 4203 | 4176 | schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000)); |
| 4204 | 4177 | } |
| 4205 | 4178 | |
| 4179 | +/* If any VFs are already enabled don't FLR the PF */ | |
| 4206 | 4180 | static bool be_reset_required(struct be_adapter *adapter) |
| 4207 | 4181 | { |
| 4208 | − return be_find_vfs(adapter, ENABLED) > 0 ? false : true; | |
| 4182 | + return pci_num_vf(adapter->pdev) ? false : true; | |
| 4209 | 4183 | } |
| 4210 | 4184 | |
| 4211 | 4185 | static char *mc_name(struct be_adapter *adapter) |
| @@ -4390,7 +4364,7 @@ static int be_resume(struct pci_dev *pdev) · 178 unmodified lines | ||
| 4390 | 4364 | if (status) |
| 4391 | 4365 | return status; |
| 4392 | 4366 | |
| 4393 | − pci_set_power_state(pdev, 0); | |
| 4367 | + pci_set_power_state(pdev, PCI_D0); | |
| 4394 | 4368 | pci_restore_state(pdev); |
| 4395 | 4369 | |
| 4396 | 4370 | /* tell fw we're ready to fire cmds */ |
| @@ -4486,7 +4460,7 @@ static pci_ers_result_t be_eeh_reset(struct pci_dev *pdev) · 89 unmodified lines | ||
| 4486 | 4460 | return PCI_ERS_RESULT_DISCONNECT; |
| 4487 | 4461 | |
| 4488 | 4462 | pci_set_master(pdev); |
| 4489 | − pci_set_power_state(pdev, 0); | |
| 4463 | + pci_set_power_state(pdev, PCI_D0); | |
| 4490 | 4464 | pci_restore_state(pdev); |
| 4491 | 4465 | |
| 4492 | 4466 | /* Check if card is ok and fw is ready */ |
| @@ -1147,8 +1147,6 @@ static int ethoc_remove(struct platform_device *pdev) · 1146 unmodified lines | ||
| 1147 | 1147 | struct net_device *netdev = platform_get_drvdata(pdev); |
| 1148 | 1148 | struct ethoc *priv = netdev_priv(netdev); |
| 1149 | 1149 | |
| 1150 | − platform_set_drvdata(pdev, NULL); | |
| 1151 | − | |
| 1152 | 1150 | if (netdev) { |
| 1153 | 1151 | netif_napi_del(&priv->napi); |
| 1154 | 1152 | phy_disconnect(priv->phy); |
| @@ -21,7 +21,6 @@ if NET_VENDOR_FARADAY · 20 unmodified lines | ||
| 21 | 21 | config FTMAC100 |
| 22 | 22 | tristate "Faraday FTMAC100 10/100 Ethernet support" |
| 23 | 23 | depends on ARM |
| 24 | − select NET_CORE | |
| 25 | 24 | select MII |
| 26 | 25 | ---help--- |
| 27 | 26 | This driver supports the FTMAC100 10/100 Ethernet controller |
| @@ -1311,7 +1311,6 @@ err_ioremap: · 1310 unmodified lines | ||
| 1311 | 1311 | release_resource(priv->res); |
| 1312 | 1312 | err_req_mem: |
| 1313 | 1313 | netif_napi_del(&priv->napi); |
| 1314 | − platform_set_drvdata(pdev, NULL); | |
| 1315 | 1314 | free_netdev(netdev); |
| 1316 | 1315 | err_alloc_etherdev: |
| 1317 | 1316 | return err; |
| @@ -1335,7 +1334,6 @@ static int __exit ftgmac100_remove(struct platform_device *pdev) · 17 unmodified lines | ||
| 1335 | 1334 | release_resource(priv->res); |
| 1336 | 1335 | |
| 1337 | 1336 | netif_napi_del(&priv->napi); |
| 1338 | − platform_set_drvdata(pdev, NULL); | |
| 1339 | 1337 | free_netdev(netdev); |
| 1340 | 1338 | return 0; |
| 1341 | 1339 | } |
| @@ -1149,7 +1149,6 @@ err_ioremap: · 1148 unmodified lines | ||
| 1149 | 1149 | release_resource(priv->res); |
| 1150 | 1150 | err_req_mem: |
| 1151 | 1151 | netif_napi_del(&priv->napi); |
| 1152 | − platform_set_drvdata(pdev, NULL); | |
| 1153 | 1152 | free_netdev(netdev); |
| 1154 | 1153 | err_alloc_etherdev: |
| 1155 | 1154 | return err; |
| @@ -1169,7 +1168,6 @@ static int __exit ftmac100_remove(struct platform_device *pdev) · 13 unmodified lines | ||
| 1169 | 1168 | release_resource(priv->res); |
| 1170 | 1169 | |
| 1171 | 1170 | netif_napi_del(&priv->napi); |
| 1172 | − platform_set_drvdata(pdev, NULL); | |
| 1173 | 1171 | free_netdev(netdev); |
| 1174 | 1172 | return 0; |
| 1175 | 1173 | } |
| @@ -60,6 +60,61 @@ · 59 unmodified lines | ||
| 60 | 60 | #define BM_MIIGSK_CFGR_RMII 0x01 |
| 61 | 61 | #define BM_MIIGSK_CFGR_FRCONT_10M 0x40 |
| 62 | 62 | |
| 63 | +#define RMON_T_DROP 0x200 /* Count of frames not cntd correctly */ | |
| 64 | +#define RMON_T_PACKETS 0x204 /* RMON TX packet count */ | |
| 65 | +#define RMON_T_BC_PKT 0x208 /* RMON TX broadcast pkts */ | |
| 66 | +#define RMON_T_MC_PKT 0x20C /* RMON TX multicast pkts */ | |
| 67 | +#define RMON_T_CRC_ALIGN 0x210 /* RMON TX pkts with CRC align err */ | |
| 68 | +#define RMON_T_UNDERSIZE 0x214 /* RMON TX pkts < 64 bytes, good CRC */ | |
| 69 | +#define RMON_T_OVERSIZE 0x218 /* RMON TX pkts > MAX_FL bytes good CRC */ | |
| 70 | +#define RMON_T_FRAG 0x21C /* RMON TX pkts < 64 bytes, bad CRC */ | |
| 71 | +#define RMON_T_JAB 0x220 /* RMON TX pkts > MAX_FL bytes, bad CRC */ | |
| 72 | +#define RMON_T_COL 0x224 /* RMON TX collision count */ | |
| 73 | +#define RMON_T_P64 0x228 /* RMON TX 64 byte pkts */ | |
| 74 | +#define RMON_T_P65TO127 0x22C /* RMON TX 65 to 127 byte pkts */ | |
| 75 | +#define RMON_T_P128TO255 0x230 /* RMON TX 128 to 255 byte pkts */ | |
| 76 | +#define RMON_T_P256TO511 0x234 /* RMON TX 256 to 511 byte pkts */ | |
| 77 | +#define RMON_T_P512TO1023 0x238 /* RMON TX 512 to 1023 byte pkts */ | |
| 78 | +#define RMON_T_P1024TO2047 0x23C /* RMON TX 1024 to 2047 byte pkts */ | |
| 79 | +#define RMON_T_P_GTE2048 0x240 /* RMON TX pkts > 2048 bytes */ | |
| 80 | +#define RMON_T_OCTETS 0x244 /* RMON TX octets */ | |
| 81 | +#define IEEE_T_DROP 0x248 /* Count of frames not counted crtly */ | |
| 82 | +#define IEEE_T_FRAME_OK 0x24C /* Frames tx'd OK */ | |
| 83 | +#define IEEE_T_1COL 0x250 /* Frames tx'd with single collision */ | |
| 84 | +#define IEEE_T_MCOL 0x254 /* Frames tx'd with multiple collision */ | |
| 85 | +#define IEEE_T_DEF 0x258 /* Frames tx'd after deferral delay */ | |
| 86 | +#define IEEE_T_LCOL 0x25C /* Frames tx'd with late collision */ | |
| 87 | +#define IEEE_T_EXCOL 0x260 /* Frames tx'd with excesv collisions */ | |
| 88 | +#define IEEE_T_MACERR 0x264 /* Frames tx'd with TX FIFO underrun */ | |
| 89 | +#define IEEE_T_CSERR 0x268 /* Frames tx'd with carrier sense err */ | |
| 90 | +#define IEEE_T_SQE 0x26C /* Frames tx'd with SQE err */ | |
| 91 | +#define IEEE_T_FDXFC 0x270 /* Flow control pause frames tx'd */ | |
| 92 | +#define IEEE_T_OCTETS_OK 0x274 /* Octet count for frames tx'd w/o err */ | |
| 93 | +#define RMON_R_PACKETS 0x284 /* RMON RX packet count */ | |
| 94 | +#define RMON_R_BC_PKT 0x288 /* RMON RX broadcast pkts */ | |
| 95 | +#define RMON_R_MC_PKT 0x28C /* RMON RX multicast pkts */ | |
| 96 | +#define RMON_R_CRC_ALIGN 0x290 /* RMON RX pkts with CRC alignment err */ | |
| 97 | +#define RMON_R_UNDERSIZE 0x294 /* RMON RX pkts < 64 bytes, good CRC */ | |
| 98 | +#define RMON_R_OVERSIZE 0x298 /* RMON RX pkts > MAX_FL bytes good CRC */ | |
| 99 | +#define RMON_R_FRAG 0x29C /* RMON RX pkts < 64 bytes, bad CRC */ | |
| 100 | +#define RMON_R_JAB 0x2A0 /* RMON RX pkts > MAX_FL bytes, bad CRC */ | |
| 101 | +#define RMON_R_RESVD_O 0x2A4 /* Reserved */ | |
| 102 | +#define RMON_R_P64 0x2A8 /* RMON RX 64 byte pkts */ | |
| 103 | +#define RMON_R_P65TO127 0x2AC /* RMON RX 65 to 127 byte pkts */ | |
| 104 | +#define RMON_R_P128TO255 0x2B0 /* RMON RX 128 to 255 byte pkts */ | |
| 105 | +#define RMON_R_P256TO511 0x2B4 /* RMON RX 256 to 511 byte pkts */ | |
| 106 | +#define RMON_R_P512TO1023 0x2B8 /* RMON RX 512 to 1023 byte pkts */ | |
| 107 | +#define RMON_R_P1024TO2047 0x2BC /* RMON RX 1024 to 2047 byte pkts */ | |
| 108 | +#define RMON_R_P_GTE2048 0x2C0 /* RMON RX pkts > 2048 bytes */ | |
| 109 | +#define RMON_R_OCTETS 0x2C4 /* RMON RX octets */ | |
| 110 | +#define IEEE_R_DROP 0x2C8 /* Count frames not counted correctly */ | |
| 111 | +#define IEEE_R_FRAME_OK 0x2CC /* Frames rx'd OK */ | |
| 112 | +#define IEEE_R_CRC 0x2D0 /* Frames rx'd with CRC err */ | |
| 113 | +#define IEEE_R_ALIGN 0x2D4 /* Frames rx'd with alignment err */ | |
| 114 | +#define IEEE_R_MACERR 0x2D8 /* Receive FIFO overflow count */ | |
| 115 | +#define IEEE_R_FDXFC 0x2DC /* Flow control pause frames rx'd */ | |
| 116 | +#define IEEE_R_OCTETS_OK 0x2E0 /* Octet cnt for frames rx'd w/o err */ | |
| 117 | + | |
| 63 | 118 | #else |
| 64 | 119 | |
| 65 | 120 | #define FEC_ECNTRL 0x000 /* Ethernet control reg */ |
| @@ -148,6 +203,9 @@ struct bufdesc_ex { · 82 unmodified lines | ||
| 148 | 203 | #define BD_ENET_RX_CL ((ushort)0x0001) |
| 149 | 204 | #define BD_ENET_RX_STATS ((ushort)0x013f) /* All status bits */ |
| 150 | 205 | |
| 206 | +/* Enhanced buffer descriptor control/status used by Ethernet receive */ | |
| 207 | +#define BD_ENET_RX_VLAN 0x00000004 | |
| 208 | + | |
| 151 | 209 | /* Buffer descriptor control/status used by Ethernet transmit. |
| 152 | 210 | */ |
| 153 | 211 | #define BD_ENET_TX_READY ((ushort)0x8000) |
| @@ -272,9 +330,10 @@ struct fec_enet_private { · 118 unmodified lines | ||
| 272 | 330 | int hwts_tx_en; |
| 273 | 331 | struct timer_list time_keep; |
| 274 | 332 | struct fec_enet_delayed_work delay_work; |
| 333 | + struct regulator *reg_phy; | |
| 275 | 334 | }; |
| 276 | 335 | |
| 277 | −void fec_ptp_init(struct net_device *ndev, struct platform_device *pdev); | |
| 336 | +void fec_ptp_init(struct platform_device *pdev); | |
| 278 | 337 | void fec_ptp_start_cyclecounter(struct net_device *ndev); |
| 279 | 338 | int fec_ptp_ioctl(struct net_device *ndev, struct ifreq *ifr, int cmd); |
| 280 | 339 | |
| @@ -53,13 +53,15 @@ · 52 unmodified lines | ||
| 53 | 53 | #include <linux/of_device.h> |
| 54 | 54 | #include <linux/of_gpio.h> |
| 55 | 55 | #include <linux/of_net.h> |
| 56 | −#include <linux/pinctrl/consumer.h> | |
| 57 | 56 | #include <linux/regulator/consumer.h> |
| 57 | +#include <linux/if_vlan.h> | |
| 58 | 58 | |
| 59 | 59 | #include <asm/cacheflush.h> |
| 60 | 60 | |
| 61 | 61 | #include "fec.h" |
| 62 | 62 | |
| 63 | +static void set_multicast_list(struct net_device *ndev); | |
| 64 | + | |
| 63 | 65 | #if defined(CONFIG_ARM) |
| 64 | 66 | #define FEC_ALIGNMENT 0xf |
| 65 | 67 | #else |
| @@ -89,6 +91,8 @@ · 23 unmodified lines | ||
| 89 | 91 | #define FEC_QUIRK_HAS_BUFDESC_EX (1 << 4) |
| 90 | 92 | /* Controller has hardware checksum support */ |
| 91 | 93 | #define FEC_QUIRK_HAS_CSUM (1 << 5) |
| 94 | +/* Controller has hardware vlan support */ | |
| 95 | +#define FEC_QUIRK_HAS_VLAN (1 << 6) | |
| 92 | 96 | |
| 93 | 97 | static struct platform_device_id fec_devtype[] = { |
| 94 | 98 | { |
| @@ -107,7 +111,8 @@ static struct platform_device_id fec_devtype[] = { · 12 unmodified lines | ||
| 107 | 111 | }, { |
| 108 | 112 | .name = "imx6q-fec", |
| 109 | 113 | .driver_data = FEC_QUIRK_ENET_MAC | FEC_QUIRK_HAS_GBIT | |
| 110 | − FEC_QUIRK_HAS_BUFDESC_EX | FEC_QUIRK_HAS_CSUM, | |
| 114 | + FEC_QUIRK_HAS_BUFDESC_EX | FEC_QUIRK_HAS_CSUM | | |
| 115 | + FEC_QUIRK_HAS_VLAN, | |
| 111 | 116 | }, { |
| 112 | 117 | .name = "mvf600-fec", |
| 113 | 118 | .driver_data = FEC_QUIRK_ENET_MAC, |
| @@ -178,11 +183,11 @@ MODULE_PARM_DESC(macaddr, "FEC Ethernet MAC address"); · 64 unmodified lines | ||
| 178 | 183 | #define FEC_DEFAULT_IMASK (FEC_ENET_TXF | FEC_ENET_RXF | FEC_ENET_MII) |
| 179 | 184 | #define FEC_RX_DISABLED_IMASK (FEC_DEFAULT_IMASK & (~FEC_ENET_RXF)) |
| 180 | 185 | |
| 181 | −/* The FEC stores dest/src/type, data, and checksum for receive packets. | |
| 186 | +/* The FEC stores dest/src/type/vlan, data, and checksum for receive packets. | |
| 182 | 187 | */ |
| 183 | −#define PKT_MAXBUF_SIZE 1518 | |
| 188 | +#define PKT_MAXBUF_SIZE 1522 | |
| 184 | 189 | #define PKT_MINBUF_SIZE 64 |
| 185 | −#define PKT_MAXBLR_SIZE 1520 | |
| 190 | +#define PKT_MAXBLR_SIZE 1536 | |
| 186 | 191 | |
| 187 | 192 | /* FEC receive acceleration */ |
| 188 | 193 | #define FEC_RACC_IPDIS (1 << 1) |
| @@ -243,7 +248,7 @@ static void *swap_buffer(void *bufaddr, int len) · 54 unmodified lines | ||
| 243 | 248 | int i; |
| 244 | 249 | unsigned int *buf = bufaddr; |
| 245 | 250 | |
| 246 | − for (i = 0; i < (len + 3) / 4; i++, buf++) | |
| 251 | + for (i = 0; i < DIV_ROUND_UP(len, 4); i++, buf++) | |
| 247 | 252 | *buf = cpu_to_be32(*buf); |
| 248 | 253 | |
| 249 | 254 | return bufaddr; |
| @@ -471,9 +476,8 @@ fec_restart(struct net_device *ndev, int duplex) · 221 unmodified lines | ||
| 471 | 476 | /* Clear any outstanding interrupt. */ |
| 472 | 477 | writel(0xffc00000, fep->hwp + FEC_IEVENT); |
| 473 | 478 | |
| 474 | − /* Reset all multicast. */ | |
| 475 | − writel(0, fep->hwp + FEC_GRP_HASH_TABLE_HIGH); | |
| 476 | − writel(0, fep->hwp + FEC_GRP_HASH_TABLE_LOW); | |
| 479 | + /* Setup multicast filter. */ | |
| 480 | + set_multicast_list(ndev); | |
| 477 | 481 | #ifndef CONFIG_M5272 |
| 478 | 482 | writel(0, fep->hwp + FEC_HASH_TABLE_HIGH); |
| 479 | 483 | writel(0, fep->hwp + FEC_HASH_TABLE_LOW); |
| @@ -609,6 +613,11 @@ fec_restart(struct net_device *ndev, int duplex) · 129 unmodified lines | ||
| 609 | 613 | if (fep->bufdesc_ex) |
| 610 | 614 | ecntl |= (1 << 4); |
| 611 | 615 | |
| 616 | +#ifndef CONFIG_M5272 | |
| 617 | + /* Enable the MIB statistic event counters */ | |
| 618 | + writel(0 << 31, fep->hwp + FEC_MIB_CTRLSTAT); | |
| 619 | +#endif | |
| 620 | + | |
| 612 | 621 | /* And last, enable the transmit and receive processing */ |
| 613 | 622 | writel(ecntl, fep->hwp + FEC_ECNTRL); |
| 614 | 623 | writel(0, fep->hwp + FEC_R_DES_ACTIVE); |
| @@ -735,6 +744,7 @@ fec_enet_tx(struct net_device *ndev) · 120 unmodified lines | ||
| 735 | 744 | ndev->stats.tx_carrier_errors++; |
| 736 | 745 | } else { |
| 737 | 746 | ndev->stats.tx_packets++; |
| 747 | + ndev->stats.tx_bytes += bdp->cbd_datlen; | |
| 738 | 748 | } |
| 739 | 749 | |
| 740 | 750 | if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS) && |
| @@ -800,6 +810,9 @@ fec_enet_rx(struct net_device *ndev, int budget) · 59 unmodified lines | ||
| 800 | 810 | ushort pkt_len; |
| 801 | 811 | __u8 *data; |
| 802 | 812 | int pkt_received = 0; |
| 813 | + struct bufdesc_ex *ebdp = NULL; | |
| 814 | + bool vlan_packet_rcvd = false; | |
| 815 | + u16 vlan_tag; | |
| 803 | 816 | |
| 804 | 817 | #ifdef CONFIG_M532x |
| 805 | 818 | flush_cache_all(); |
| @@ -863,6 +876,24 @@ fec_enet_rx(struct net_device *ndev, int budget) · 57 unmodified lines | ||
| 863 | 876 | if (id_entry->driver_data & FEC_QUIRK_SWAP_FRAME) |
| 864 | 877 | swap_buffer(data, pkt_len); |
| 865 | 878 | |
| 879 | + /* Extract the enhanced buffer descriptor */ | |
| 880 | + ebdp = NULL; | |
| 881 | + if (fep->bufdesc_ex) | |
| 882 | + ebdp = (struct bufdesc_ex *)bdp; | |
| 883 | + | |
| 884 | + /* If this is a VLAN packet remove the VLAN Tag */ | |
| 885 | + vlan_packet_rcvd = false; | |
| 886 | + if ((ndev->features & NETIF_F_HW_VLAN_CTAG_RX) && | |
| 887 | + fep->bufdesc_ex && (ebdp->cbd_esc & BD_ENET_RX_VLAN)) { | |
| 888 | + /* Push and remove the vlan tag */ | |
| 889 | + struct vlan_hdr *vlan_header = | |
| 890 | + (struct vlan_hdr *) (data + ETH_HLEN); | |
| 891 | + vlan_tag = ntohs(vlan_header->h_vlan_TCI); | |
| 892 | + pkt_len -= VLAN_HLEN; | |
| 893 | + | |
| 894 | + vlan_packet_rcvd = true; | |
| 895 | + } | |
| 896 | + | |
| 866 | 897 | /* This does 16 byte alignment, exactly what we need. |
| 867 | 898 | * The packet length includes FCS, but we don't want to |
| 868 | 899 | * include that when passing upstream as it messes up |
| @@ -873,9 +904,18 @@ fec_enet_rx(struct net_device *ndev, int budget) · 4 unmodified lines | ||
| 873 | 904 | if (unlikely(!skb)) { |
| 874 | 905 | ndev->stats.rx_dropped++; |
| 875 | 906 | } else { |
| 907 | + int payload_offset = (2 * ETH_ALEN); | |
| 876 | 908 | skb_reserve(skb, NET_IP_ALIGN); |
| 877 | 909 | skb_put(skb, pkt_len - 4); /* Make room */ |
| 878 | − skb_copy_to_linear_data(skb, data, pkt_len - 4); | |
| 910 | + | |
| 911 | + /* Extract the frame data without the VLAN header. */ | |
| 912 | + skb_copy_to_linear_data(skb, data, (2 * ETH_ALEN)); | |
| 913 | + if (vlan_packet_rcvd) | |
| 914 | + payload_offset = (2 * ETH_ALEN) + VLAN_HLEN; | |
| 915 | + skb_copy_to_linear_data_offset(skb, (2 * ETH_ALEN), | |
| 916 | + data + payload_offset, | |
| 917 | + pkt_len - 4 - (2 * ETH_ALEN)); | |
| 918 | + | |
| 879 | 919 | skb->protocol = eth_type_trans(skb, ndev); |
| 880 | 920 | |
| 881 | 921 | /* Get receive timestamp from the skb */ |
| @@ -883,8 +923,6 @@ fec_enet_rx(struct net_device *ndev, int budget) · 1 unmodified line | ||
| 883 | 923 | struct skb_shared_hwtstamps *shhwtstamps = |
| 884 | 924 | skb_hwtstamps(skb); |
| 885 | 925 | unsigned long flags; |
| 886 | − struct bufdesc_ex *ebdp = | |
| 887 | − (struct bufdesc_ex *)bdp; | |
| 888 | 926 | |
| 889 | 927 | memset(shhwtstamps, 0, sizeof(*shhwtstamps)); |
| 890 | 928 | |
| @@ -895,9 +933,7 @@ fec_enet_rx(struct net_device *ndev, int budget) · 4 unmodified lines | ||
| 895 | 933 | } |
| 896 | 934 | |
| 897 | 935 | if (fep->bufdesc_ex && |
| 898 | − (fep->csum_flags & FLAG_RX_CSUM_ENABLED)) { | |
| 899 | − struct bufdesc_ex *ebdp = | |
| 900 | − (struct bufdesc_ex *)bdp; | |
| 936 | + (fep->csum_flags & FLAG_RX_CSUM_ENABLED)) { | |
| 901 | 937 | if (!(ebdp->cbd_esc & FLAG_RX_CSUM_ERROR)) { |
| 902 | 938 | /* don't check it */ |
| 903 | 939 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
| @@ -906,6 +942,12 @@ fec_enet_rx(struct net_device *ndev, int budget) · 2 unmodified lines | ||
| 906 | 942 | } |
| 907 | 943 | } |
| 908 | 944 | |
| 945 | + /* Handle received VLAN packets */ | |
| 946 | + if (vlan_packet_rcvd) | |
| 947 | + __vlan_hwaccel_put_tag(skb, | |
| 948 | + htons(ETH_P_8021Q), | |
| 949 | + vlan_tag); | |
| 950 | + | |
| 909 | 951 | if (!skb_defer_rx_timestamp(skb)) |
| 910 | 952 | napi_gro_receive(&fep->napi, skb); |
| 911 | 953 | } |
| @@ -1444,8 +1486,117 @@ static int fec_enet_set_pauseparam(struct net_device *ndev, · 532 unmodified lines | ||
| 1444 | 1486 | return 0; |
| 1445 | 1487 | } |
| 1446 | 1488 | |
| 1489 | +static const struct fec_stat { | |
| 1490 | + char name[ETH_GSTRING_LEN]; | |
| 1491 | + u16 offset; | |
| 1492 | +} fec_stats[] = { | |
| 1493 | + /* RMON TX */ | |
| 1494 | + { "tx_dropped", RMON_T_DROP }, | |
| 1495 | + { "tx_packets", RMON_T_PACKETS }, | |
| 1496 | + { "tx_broadcast", RMON_T_BC_PKT }, | |
| 1497 | + { "tx_multicast", RMON_T_MC_PKT }, | |
| 1498 | + { "tx_crc_errors", RMON_T_CRC_ALIGN }, | |
| 1499 | + { "tx_undersize", RMON_T_UNDERSIZE }, | |
| 1500 | + { "tx_oversize", RMON_T_OVERSIZE }, | |
| 1501 | + { "tx_fragment", RMON_T_FRAG }, | |
| 1502 | + { "tx_jabber", RMON_T_JAB }, | |
| 1503 | + { "tx_collision", RMON_T_COL }, | |
| 1504 | + { "tx_64byte", RMON_T_P64 }, | |
| 1505 | + { "tx_65to127byte", RMON_T_P65TO127 }, | |
| 1506 | + { "tx_128to255byte", RMON_T_P128TO255 }, | |
| 1507 | + { "tx_256to511byte", RMON_T_P256TO511 }, | |
| 1508 | + { "tx_512to1023byte", RMON_T_P512TO1023 }, | |
| 1509 | + { "tx_1024to2047byte", RMON_T_P1024TO2047 }, | |
| 1510 | + { "tx_GTE2048byte", RMON_T_P_GTE2048 }, | |
| 1511 | + { "tx_octets", RMON_T_OCTETS }, | |
| 1512 | + | |
| 1513 | + /* IEEE TX */ | |
| 1514 | + { "IEEE_tx_drop", IEEE_T_DROP }, | |
| 1515 | + { "IEEE_tx_frame_ok", IEEE_T_FRAME_OK }, | |
| 1516 | + { "IEEE_tx_1col", IEEE_T_1COL }, | |
| 1517 | + { "IEEE_tx_mcol", IEEE_T_MCOL }, | |
| 1518 | + { "IEEE_tx_def", IEEE_T_DEF }, | |
| 1519 | + { "IEEE_tx_lcol", IEEE_T_LCOL }, | |
| 1520 | + { "IEEE_tx_excol", IEEE_T_EXCOL }, | |
| 1521 | + { "IEEE_tx_macerr", IEEE_T_MACERR }, | |
| 1522 | + { "IEEE_tx_cserr", IEEE_T_CSERR }, | |
| 1523 | + { "IEEE_tx_sqe", IEEE_T_SQE }, | |
| 1524 | + { "IEEE_tx_fdxfc", IEEE_T_FDXFC }, | |
| 1525 | + { "IEEE_tx_octets_ok", IEEE_T_OCTETS_OK }, | |
| 1526 | + | |
| 1527 | + /* RMON RX */ | |
| 1528 | + { "rx_packets", RMON_R_PACKETS }, | |
| 1529 | + { "rx_broadcast", RMON_R_BC_PKT }, | |
| 1530 | + { "rx_multicast", RMON_R_MC_PKT }, | |
| 1531 | + { "rx_crc_errors", RMON_R_CRC_ALIGN }, | |
| 1532 | + { "rx_undersize", RMON_R_UNDERSIZE }, | |
| 1533 | + { "rx_oversize", RMON_R_OVERSIZE }, | |
| 1534 | + { "rx_fragment", RMON_R_FRAG }, | |
| 1535 | + { "rx_jabber", RMON_R_JAB }, | |
| 1536 | + { "rx_64byte", RMON_R_P64 }, | |
| 1537 | + { "rx_65to127byte", RMON_R_P65TO127 }, | |
| 1538 | + { "rx_128to255byte", RMON_R_P128TO255 }, | |
| 1539 | + { "rx_256to511byte", RMON_R_P256TO511 }, | |
| 1540 | + { "rx_512to1023byte", RMON_R_P512TO1023 }, | |
| 1541 | + { "rx_1024to2047byte", RMON_R_P1024TO2047 }, | |
| 1542 | + { "rx_GTE2048byte", RMON_R_P_GTE2048 }, | |
| 1543 | + { "rx_octets", RMON_R_OCTETS }, | |
| 1544 | + | |
| 1545 | + /* IEEE RX */ | |
| 1546 | + { "IEEE_rx_drop", IEEE_R_DROP }, | |
| 1547 | + { "IEEE_rx_frame_ok", IEEE_R_FRAME_OK }, | |
| 1548 | + { "IEEE_rx_crc", IEEE_R_CRC }, | |
| 1549 | + { "IEEE_rx_align", IEEE_R_ALIGN }, | |
| 1550 | + { "IEEE_rx_macerr", IEEE_R_MACERR }, | |
| 1551 | + { "IEEE_rx_fdxfc", IEEE_R_FDXFC }, | |
| 1552 | + { "IEEE_rx_octets_ok", IEEE_R_OCTETS_OK }, | |
| 1553 | +}; | |
| 1554 | + | |
| 1555 | +static void fec_enet_get_ethtool_stats(struct net_device *dev, | |
| 1556 | + struct ethtool_stats *stats, u64 *data) | |
| 1557 | +{ | |
| 1558 | + struct fec_enet_private *fep = netdev_priv(dev); | |
| 1559 | + int i; | |
| 1560 | + | |
| 1561 | + for (i = 0; i < ARRAY_SIZE(fec_stats); i++) | |
| 1562 | + data[i] = readl(fep->hwp + fec_stats[i].offset); | |
| 1563 | +} | |
| 1564 | + | |
| 1565 | +static void fec_enet_get_strings(struct net_device *netdev, | |
| 1566 | + u32 stringset, u8 *data) | |
| 1567 | +{ | |
| 1568 | + int i; | |
| 1569 | + switch (stringset) { | |
| 1570 | + case ETH_SS_STATS: | |
| 1571 | + for (i = 0; i < ARRAY_SIZE(fec_stats); i++) | |
| 1572 | + memcpy(data + i * ETH_GSTRING_LEN, | |
| 1573 | + fec_stats[i].name, ETH_GSTRING_LEN); | |
| 1574 | + break; | |
| 1575 | + } | |
| 1576 | +} | |
| 1577 | + | |
| 1578 | +static int fec_enet_get_sset_count(struct net_device *dev, int sset) | |
| 1579 | +{ | |
| 1580 | + switch (sset) { | |
| 1581 | + case ETH_SS_STATS: | |
| 1582 | + return ARRAY_SIZE(fec_stats); | |
| 1583 | + default: | |
| 1584 | + return -EOPNOTSUPP; | |
| 1585 | + } | |
| 1586 | +} | |
| 1447 | 1587 | #endif /* !defined(CONFIG_M5272) */ |
| 1448 | 1588 | |
| 1589 | +static int fec_enet_nway_reset(struct net_device *dev) | |
| 1590 | +{ | |
| 1591 | + struct fec_enet_private *fep = netdev_priv(dev); | |
| 1592 | + struct phy_device *phydev = fep->phy_dev; | |
| 1593 | + | |
| 1594 | + if (!phydev) | |
| 1595 | + return -ENODEV; | |
| 1596 | + | |
| 1597 | + return genphy_restart_aneg(phydev); | |
| 1598 | +} | |
| 1599 | + | |
| 1449 | 1600 | static const struct ethtool_ops fec_enet_ethtool_ops = { |
| 1450 | 1601 | #if !defined(CONFIG_M5272) |
| 1451 | 1602 | .get_pauseparam = fec_enet_get_pauseparam, |
| @@ -1456,6 +1607,12 @@ static const struct ethtool_ops fec_enet_ethtool_ops = { · 4 unmodified lines | ||
| 1456 | 1607 | .get_drvinfo = fec_enet_get_drvinfo, |
| 1457 | 1608 | .get_link = ethtool_op_get_link, |
| 1458 | 1609 | .get_ts_info = fec_enet_get_ts_info, |
| 1610 | + .nway_reset = fec_enet_nway_reset, | |
| 1611 | +#ifndef CONFIG_M5272 | |
| 1612 | + .get_ethtool_stats = fec_enet_get_ethtool_stats, | |
| 1613 | + .get_strings = fec_enet_get_strings, | |
| 1614 | + .get_sset_count = fec_enet_get_sset_count, | |
| 1615 | +#endif | |
| 1459 | 1616 | }; |
| 1460 | 1617 | |
| 1461 | 1618 | static int fec_enet_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd) |
| @@ -1803,6 +1960,12 @@ static int fec_enet_init(struct net_device *ndev) · 341 unmodified lines | ||
| 1803 | 1960 | writel(FEC_RX_DISABLED_IMASK, fep->hwp + FEC_IMASK); |
| 1804 | 1961 | netif_napi_add(ndev, &fep->napi, fec_enet_rx_napi, FEC_NAPI_WEIGHT); |
| 1805 | 1962 | |
| 1963 | + if (id_entry->driver_data & FEC_QUIRK_HAS_VLAN) { | |
| 1964 | + /* enable hw VLAN support */ | |
| 1965 | + ndev->features |= NETIF_F_HW_VLAN_CTAG_RX; | |
| 1966 | + ndev->hw_features |= NETIF_F_HW_VLAN_CTAG_RX; | |
| 1967 | + } | |
| 1968 | + | |
| 1806 | 1969 | if (id_entry->driver_data & FEC_QUIRK_HAS_CSUM) { |
| 1807 | 1970 | /* enable hw accelerator */ |
| 1808 | 1971 | ndev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
| @@ -1865,8 +2028,6 @@ fec_probe(struct platform_device *pdev) · 56 unmodified lines | ||
| 1865 | 2028 | struct resource *r; |
| 1866 | 2029 | const struct of_device_id *of_id; |
| 1867 | 2030 | static int dev_id; |
| 1868 | − struct pinctrl *pinctrl; | |
| 1869 | − struct regulator *reg_phy; | |
| 1870 | 2031 | |
| 1871 | 2032 | of_id = of_match_device(fec_dt_ids, &pdev->dev); |
| 1872 | 2033 | if (of_id) |
| @@ -1893,17 +2054,17 @@ fec_probe(struct platform_device *pdev) · 20 unmodified lines | ||
| 1893 | 2054 | fep->pause_flag |= FEC_PAUSE_FLAG_AUTONEG; |
| 1894 | 2055 | #endif |
| 1895 | 2056 | |
| 1896 | − fep->hwp = devm_request_and_ioremap(&pdev->dev, r); | |
| 2057 | + fep->hwp = devm_ioremap_resource(&pdev->dev, r); | |
| 2058 | + if (IS_ERR(fep->hwp)) { | |
| 2059 | + ret = PTR_ERR(fep->hwp); | |
| 2060 | + goto failed_ioremap; | |
| 2061 | + } | |
| 2062 | + | |
| 1897 | 2063 | fep->pdev = pdev; |
| 1898 | 2064 | fep->dev_id = dev_id++; |
| 1899 | 2065 | |
| 1900 | 2066 | fep->bufdesc_ex = 0; |
| 1901 | 2067 | |
| 1902 | − if (!fep->hwp) { | |
| 1903 | − ret = -ENOMEM; | |
| 1904 | − goto failed_ioremap; | |
| 1905 | − } | |
| 1906 | − | |
| 1907 | 2068 | platform_set_drvdata(pdev, ndev); |
| 1908 | 2069 | |
| 1909 | 2070 | ret = of_get_phy_mode(pdev->dev.of_node); |
| @@ -1917,12 +2078,6 @@ fec_probe(struct platform_device *pdev) · 7 unmodified lines | ||
| 1917 | 2078 | fep->phy_interface = ret; |
| 1918 | 2079 | } |
| 1919 | 2080 | |
| 1920 | − pinctrl = devm_pinctrl_get_select_default(&pdev->dev); | |
| 1921 | − if (IS_ERR(pinctrl)) { | |
| 1922 | − ret = PTR_ERR(pinctrl); | |
| 1923 | − goto failed_pin; | |
| 1924 | − } | |
| 1925 | − | |
| 1926 | 2081 | fep->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); |
| 1927 | 2082 | if (IS_ERR(fep->clk_ipg)) { |
| 1928 | 2083 | ret = PTR_ERR(fep->clk_ipg); |
| @@ -1953,20 +2108,22 @@ fec_probe(struct platform_device *pdev) · 24 unmodified lines | ||
| 1953 | 2108 | clk_prepare_enable(fep->clk_enet_out); |
| 1954 | 2109 | clk_prepare_enable(fep->clk_ptp); |
| 1955 | 2110 | |
| 1956 | − reg_phy = devm_regulator_get(&pdev->dev, "phy"); | |
| 1957 | − if (!IS_ERR(reg_phy)) { | |
| 1958 | − ret = regulator_enable(reg_phy); | |
| 2111 | + fep->reg_phy = devm_regulator_get(&pdev->dev, "phy"); | |
| 2112 | + if (!IS_ERR(fep->reg_phy)) { | |
| 2113 | + ret = regulator_enable(fep->reg_phy); | |
| 1959 | 2114 | if (ret) { |
| 1960 | 2115 | dev_err(&pdev->dev, |
| 1961 | 2116 | "Failed to enable phy regulator: %d\n", ret); |
| 1962 | 2117 | goto failed_regulator; |
| 1963 | 2118 | } |
| 2119 | + } else { | |
| 2120 | + fep->reg_phy = NULL; | |
| 1964 | 2121 | } |
| 1965 | 2122 | |
| 1966 | 2123 | fec_reset_phy(pdev); |
| 1967 | 2124 | |
| 1968 | 2125 | if (fep->bufdesc_ex) |
| 1969 | − fec_ptp_init(ndev, pdev); | |
| 2126 | + fec_ptp_init(pdev); | |
| 1970 | 2127 | |
| 1971 | 2128 | ret = fec_enet_init(ndev); |
| 1972 | 2129 | if (ret) |
| @@ -2010,19 +2167,20 @@ fec_probe(struct platform_device *pdev) · 37 unmodified lines | ||
| 2010 | 2167 | failed_register: |
| 2011 | 2168 | fec_enet_mii_remove(fep); |
| 2012 | 2169 | failed_mii_init: |
| 2013 | −failed_init: | |
| 2170 | +failed_irq: | |
| 2014 | 2171 | for (i = 0; i < FEC_IRQ_NUM; i++) { |
| 2015 | 2172 | irq = platform_get_irq(pdev, i); |
| 2016 | 2173 | if (irq > 0) |
| 2017 | 2174 | free_irq(irq, ndev); |
| 2018 | 2175 | } |
| 2019 | −failed_irq: | |
| 2176 | +failed_init: | |
| 2177 | + if (fep->reg_phy) | |
| 2178 | + regulator_disable(fep->reg_phy); | |
| 2020 | 2179 | failed_regulator: |
| 2021 | 2180 | clk_disable_unprepare(fep->clk_ahb); |
| 2022 | 2181 | clk_disable_unprepare(fep->clk_ipg); |
| 2023 | 2182 | clk_disable_unprepare(fep->clk_enet_out); |
| 2024 | 2183 | clk_disable_unprepare(fep->clk_ptp); |
| 2025 | −failed_pin: | |
| 2026 | 2184 | failed_clk: |
| 2027 | 2185 | failed_ioremap: |
| 2028 | 2186 | free_netdev(ndev); |
| @@ -2041,21 +2199,21 @@ fec_drv_remove(struct platform_device *pdev) · 12 unmodified lines | ||
| 2041 | 2199 | unregister_netdev(ndev); |
| 2042 | 2200 | fec_enet_mii_remove(fep); |
| 2043 | 2201 | del_timer_sync(&fep->time_keep); |
| 2202 | + for (i = 0; i < FEC_IRQ_NUM; i++) { | |
| 2203 | + int irq = platform_get_irq(pdev, i); | |
| 2204 | + if (irq > 0) | |
| 2205 | + free_irq(irq, ndev); | |
| 2206 | + } | |
| 2207 | + if (fep->reg_phy) | |
| 2208 | + regulator_disable(fep->reg_phy); | |
| 2044 | 2209 | clk_disable_unprepare(fep->clk_ptp); |
| 2045 | 2210 | if (fep->ptp_clock) |
| 2046 | 2211 | ptp_clock_unregister(fep->ptp_clock); |
| 2047 | 2212 | clk_disable_unprepare(fep->clk_enet_out); |
| 2048 | 2213 | clk_disable_unprepare(fep->clk_ahb); |
| 2049 | 2214 | clk_disable_unprepare(fep->clk_ipg); |
| 2050 | − for (i = 0; i < FEC_IRQ_NUM; i++) { | |
| 2051 | − int irq = platform_get_irq(pdev, i); | |
| 2052 | − if (irq > 0) | |
| 2053 | − free_irq(irq, ndev); | |
| 2054 | − } | |
| 2055 | 2215 | free_netdev(ndev); |
| 2056 | 2216 | |
| 2057 | − platform_set_drvdata(pdev, NULL); | |
| 2058 | − | |
| 2059 | 2217 | return 0; |
| 2060 | 2218 | } |
| 2061 | 2219 | |
| @@ -2074,6 +2232,9 @@ fec_suspend(struct device *dev) · 12 unmodified lines | ||
| 2074 | 2232 | clk_disable_unprepare(fep->clk_ahb); |
| 2075 | 2233 | clk_disable_unprepare(fep->clk_ipg); |
| 2076 | 2234 | |
| 2235 | + if (fep->reg_phy) | |
| 2236 | + regulator_disable(fep->reg_phy); | |
| 2237 | + | |
| 2077 | 2238 | return 0; |
| 2078 | 2239 | } |
| 2079 | 2240 | |
| @@ -2082,6 +2243,13 @@ fec_resume(struct device *dev) · 2 unmodified lines | ||
| 2082 | 2243 | { |
| 2083 | 2244 | struct net_device *ndev = dev_get_drvdata(dev); |
| 2084 | 2245 | struct fec_enet_private *fep = netdev_priv(ndev); |
| 2246 | + int ret; | |
| 2247 | + | |
| 2248 | + if (fep->reg_phy) { | |
| 2249 | + ret = regulator_enable(fep->reg_phy); | |
| 2250 | + if (ret) | |
| 2251 | + return ret; | |
| 2252 | + } | |
| 2085 | 2253 | |
| 2086 | 2254 | clk_prepare_enable(fep->clk_enet_out); |
| 2087 | 2255 | clk_prepare_enable(fep->clk_ahb); |
| @@ -981,7 +981,7 @@ static int mpc52xx_fec_probe(struct platform_device *op) · 980 unmodified lines | ||
| 981 | 981 | goto err_node; |
| 982 | 982 | |
| 983 | 983 | /* We're done ! */ |
| 984 | − dev_set_drvdata(&op->dev, ndev); | |
| 984 | + platform_set_drvdata(op, ndev); | |
| 985 | 985 | netdev_info(ndev, "%s MAC %pM\n", |
| 986 | 986 | op->dev.of_node->full_name, ndev->dev_addr); |
| 987 | 987 | |
| @@ -1010,7 +1010,7 @@ mpc52xx_fec_remove(struct platform_device *op) · 22 unmodified lines | ||
| 1010 | 1010 | struct net_device *ndev; |
| 1011 | 1011 | struct mpc52xx_fec_priv *priv; |
| 1012 | 1012 | |
| 1013 | − ndev = dev_get_drvdata(&op->dev); | |
| 1013 | + ndev = platform_get_drvdata(op); | |
| 1014 | 1014 | priv = netdev_priv(ndev); |
| 1015 | 1015 | |
| 1016 | 1016 | unregister_netdev(ndev); |
| @@ -1030,14 +1030,13 @@ mpc52xx_fec_remove(struct platform_device *op) · 13 unmodified lines | ||
| 1030 | 1030 | |
| 1031 | 1031 | free_netdev(ndev); |
| 1032 | 1032 | |
| 1033 | − dev_set_drvdata(&op->dev, NULL); | |
| 1034 | 1033 | return 0; |
| 1035 | 1034 | } |
| 1036 | 1035 | |
| 1037 | 1036 | #ifdef CONFIG_PM |
| 1038 | 1037 | static int mpc52xx_fec_of_suspend(struct platform_device *op, pm_message_t state) |
| 1039 | 1038 | { |
| 1040 | − struct net_device *dev = dev_get_drvdata(&op->dev); | |
| 1039 | + struct net_device *dev = platform_get_drvdata(op); | |
| 1041 | 1040 | |
| 1042 | 1041 | if (netif_running(dev)) |
| 1043 | 1042 | mpc52xx_fec_close(dev); |
| @@ -1047,7 +1046,7 @@ static int mpc52xx_fec_of_suspend(struct platform_device *op, pm_message_t state · 3 unmodified lines | ||
| 1047 | 1046 | |
| 1048 | 1047 | static int mpc52xx_fec_of_resume(struct platform_device *op) |
| 1049 | 1048 | { |
| 1050 | − struct net_device *dev = dev_get_drvdata(&op->dev); | |
| 1049 | + struct net_device *dev = platform_get_drvdata(op); | |
| 1051 | 1050 | |
| 1052 | 1051 | mpc52xx_fec_hw_init(dev); |
| 1053 | 1052 | mpc52xx_fec_reset_stats(dev); |
| @@ -347,8 +347,9 @@ static void fec_time_keep(unsigned long _data) · 346 unmodified lines | ||
| 347 | 347 | * cyclecounter init routine and exits. |
| 348 | 348 | */ |
| 349 | 349 | |
| 350 | −void fec_ptp_init(struct net_device *ndev, struct platform_device *pdev) | |
| 350 | +void fec_ptp_init(struct platform_device *pdev) | |
| 351 | 351 | { |
| 352 | + struct net_device *ndev = platform_get_drvdata(pdev); | |
| 352 | 353 | struct fec_enet_private *fep = netdev_priv(ndev); |
| 353 | 354 | |
| 354 | 355 | fep->ptp_caps.owner = THIS_MODULE; |
| @@ -1,7 +1,6 @@ | ||
| 1 | 1 | config FS_ENET |
| 2 | 2 | tristate "Freescale Ethernet Driver" |
| 3 | 3 | depends on NET_VENDOR_FREESCALE && (CPM1 || CPM2 || PPC_MPC512x) |
| 4 | − select NET_CORE | |
| 5 | 4 | select MII |
| 6 | 5 | select PHYLIB |
| 7 | 6 | |
| @@ -1048,7 +1048,7 @@ static int fs_enet_probe(struct platform_device *ofdev) · 1047 unmodified lines | ||
| 1048 | 1048 | } |
| 1049 | 1049 | |
| 1050 | 1050 | SET_NETDEV_DEV(ndev, &ofdev->dev); |
| 1051 | − dev_set_drvdata(&ofdev->dev, ndev); | |
| 1051 | + platform_set_drvdata(ofdev, ndev); | |
| 1052 | 1052 | |
| 1053 | 1053 | fep = netdev_priv(ndev); |
| 1054 | 1054 | fep->dev = &ofdev->dev; |
| @@ -1106,7 +1106,6 @@ out_cleanup_data: · 51 unmodified lines | ||
| 1106 | 1106 | fep->ops->cleanup_data(ndev); |
| 1107 | 1107 | out_free_dev: |
| 1108 | 1108 | free_netdev(ndev); |
| 1109 | − dev_set_drvdata(&ofdev->dev, NULL); | |
| 1110 | 1109 | out_put: |
| 1111 | 1110 | of_node_put(fpi->phy_node); |
| 1112 | 1111 | out_free_fpi: |
| @@ -1116,7 +1115,7 @@ out_free_fpi: · 3 unmodified lines | ||
| 1116 | 1115 | |
| 1117 | 1116 | static int fs_enet_remove(struct platform_device *ofdev) |
| 1118 | 1117 | { |
| 1119 | − struct net_device *ndev = dev_get_drvdata(&ofdev->dev); | |
| 1118 | + struct net_device *ndev = platform_get_drvdata(ofdev); | |
| 1120 | 1119 | struct fs_enet_private *fep = netdev_priv(ndev); |
| 1121 | 1120 | |
| 1122 | 1121 | unregister_netdev(ndev); |
| @@ -179,7 +179,7 @@ static int fs_enet_mdio_probe(struct platform_device *ofdev) · 178 unmodified lines | ||
| 179 | 179 | } |
| 180 | 180 | |
| 181 | 181 | new_bus->parent = &ofdev->dev; |
| 182 | − dev_set_drvdata(&ofdev->dev, new_bus); | |
| 182 | + platform_set_drvdata(ofdev, new_bus); | |
| 183 | 183 | |
| 184 | 184 | ret = of_mdiobus_register(new_bus, ofdev->dev.of_node); |
| 185 | 185 | if (ret) |
| @@ -188,7 +188,6 @@ static int fs_enet_mdio_probe(struct platform_device *ofdev) · 2 unmodified lines | ||
| 188 | 188 | return 0; |
| 189 | 189 | |
| 190 | 190 | out_free_irqs: |
| 191 | − dev_set_drvdata(&ofdev->dev, NULL); | |
| 192 | 191 | kfree(new_bus->irq); |
| 193 | 192 | out_unmap_regs: |
| 194 | 193 | iounmap(bitbang->dir); |
| @@ -202,11 +201,10 @@ out: · 7 unmodified lines | ||
| 202 | 201 | |
| 203 | 202 | static int fs_enet_mdio_remove(struct platform_device *ofdev) |
| 204 | 203 | { |
| 205 | − struct mii_bus *bus = dev_get_drvdata(&ofdev->dev); | |
| 204 | + struct mii_bus *bus = platform_get_drvdata(ofdev); | |
| 206 | 205 | struct bb_info *bitbang = bus->priv; |
| 207 | 206 | |
| 208 | 207 | mdiobus_unregister(bus); |
| 209 | − dev_set_drvdata(&ofdev->dev, NULL); | |
| 210 | 208 | kfree(bus->irq); |
| 211 | 209 | free_mdio_bitbang(bus); |
| 212 | 210 | iounmap(bitbang->dir); |
| @@ -180,7 +180,7 @@ static int fs_enet_mdio_probe(struct platform_device *ofdev) · 179 unmodified lines | ||
| 180 | 180 | } |
| 181 | 181 | |
| 182 | 182 | new_bus->parent = &ofdev->dev; |
| 183 | − dev_set_drvdata(&ofdev->dev, new_bus); | |
| 183 | + platform_set_drvdata(ofdev, new_bus); | |
| 184 | 184 | |
| 185 | 185 | ret = of_mdiobus_register(new_bus, ofdev->dev.of_node); |
| 186 | 186 | if (ret) |
| @@ -189,7 +189,6 @@ static int fs_enet_mdio_probe(struct platform_device *ofdev) · 2 unmodified lines | ||
| 189 | 189 | return 0; |
| 190 | 190 | |
| 191 | 191 | out_free_irqs: |
| 192 | − dev_set_drvdata(&ofdev->dev, NULL); | |
| 193 | 192 | kfree(new_bus->irq); |
| 194 | 193 | out_unmap_regs: |
| 195 | 194 | iounmap(fec->fecp); |
| @@ -204,11 +203,10 @@ out: · 8 unmodified lines | ||
| 204 | 203 | |
| 205 | 204 | static int fs_enet_mdio_remove(struct platform_device *ofdev) |
| 206 | 205 | { |
| 207 | − struct mii_bus *bus = dev_get_drvdata(&ofdev->dev); | |
| 206 | + struct mii_bus *bus = platform_get_drvdata(ofdev); | |
| 208 | 207 | struct fec_info *fec = bus->priv; |
| 209 | 208 | |
| 210 | 209 | mdiobus_unregister(bus); |
| 211 | − dev_set_drvdata(&ofdev->dev, NULL); | |
| 212 | 210 | kfree(bus->irq); |
| 213 | 211 | iounmap(fec->fecp); |
| 214 | 212 | kfree(fec); |
| @@ -128,6 +128,7 @@ static void gfar_set_multi(struct net_device *dev); · 127 unmodified lines | ||
| 128 | 128 | static void gfar_set_hash_for_addr(struct net_device *dev, u8 *addr); |
| 129 | 129 | static void gfar_configure_serdes(struct net_device *dev); |
| 130 | 130 | static int gfar_poll(struct napi_struct *napi, int budget); |
| 131 | +static int gfar_poll_sq(struct napi_struct *napi, int budget); | |
| 131 | 132 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| 132 | 133 | static void gfar_netpoll(struct net_device *dev); |
| 133 | 134 | #endif |
| @@ -1000,7 +1001,7 @@ static int gfar_probe(struct platform_device *ofdev) · 866 unmodified lines | ||
| 1000 | 1001 | spin_lock_init(&priv->bflock); |
| 1001 | 1002 | INIT_WORK(&priv->reset_task, gfar_reset_task); |
| 1002 | 1003 | |
| 1003 | − dev_set_drvdata(&ofdev->dev, priv); | |
| 1004 | + platform_set_drvdata(ofdev, priv); | |
| 1004 | 1005 | regs = priv->gfargrp[0].regs; |
| 1005 | 1006 | |
| 1006 | 1007 | gfar_detect_errata(priv); |
| @@ -1038,9 +1039,13 @@ static int gfar_probe(struct platform_device *ofdev) · 31 unmodified lines | ||
| 1038 | 1039 | dev->ethtool_ops = &gfar_ethtool_ops; |
| 1039 | 1040 | |
| 1040 | 1041 | /* Register for napi ...We are registering NAPI for each grp */ |
| 1041 | − for (i = 0; i < priv->num_grps; i++) | |
| 1042 | − netif_napi_add(dev, &priv->gfargrp[i].napi, gfar_poll, | |
| 1042 | + if (priv->mode == SQ_SG_MODE) | |
| 1043 | + netif_napi_add(dev, &priv->gfargrp[0].napi, gfar_poll_sq, | |
| 1043 | 1044 | GFAR_DEV_WEIGHT); |
| 1045 | + else | |
| 1046 | + for (i = 0; i < priv->num_grps; i++) | |
| 1047 | + netif_napi_add(dev, &priv->gfargrp[i].napi, gfar_poll, | |
| 1048 | + GFAR_DEV_WEIGHT); | |
| 1044 | 1049 | |
| 1045 | 1050 | if (priv->device_flags & FSL_GIANFAR_DEV_HAS_CSUM) { |
| 1046 | 1051 | dev->hw_features = NETIF_F_IP_CSUM | NETIF_F_SG | |
| @@ -1240,15 +1245,13 @@ register_fail: · 193 unmodified lines | ||
| 1240 | 1245 | |
| 1241 | 1246 | static int gfar_remove(struct platform_device *ofdev) |
| 1242 | 1247 | { |
| 1243 | − struct gfar_private *priv = dev_get_drvdata(&ofdev->dev); | |
| 1248 | + struct gfar_private *priv = platform_get_drvdata(ofdev); | |
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