Pull drm updates from Dave Airlie: "Core: - shared fencing staging removal - drop transactional atomic helpers and move helpers to new location - DP/MST atomic cleanup - Leasing cleanups and drop EXPORT_SYMBOL - Convert drivers to atomic helpers and generic fbdev. - removed deprecated obj_ref/unref in favour of get/put - Improve dumb callback documentation - MODESET_LOCK_BEGIN/END helpers panels: - CDTech panels, Banana Pi Panel, DLC1010GIG, - Olimex LCD-O-LinuXino, Samsung S6D16D0, Truly NT35597 WQXGA, - Himax HX8357D, simulated RTSM AEMv8. - GPD Win2 panel - AUO G101EVN010 vgem: - render node support ttm: - move global init out of drivers - fix LRU handling for ghost objects - Support for simultaneous submissions to multiple engines scheduler: - timeout/fault handling changes to help GPU recovery - helpers for hw with preemption support i915: - Scaler/Watermark fixes - DP MST + powerwell fixes - PSR fixes - Break long get/put shmemfs pages - Icelake fixes - Icelake DSI video mode enablement - Engine workaround improvements amdgpu: - freesync support - GPU reset enabled on CI, VI, SOC15 dGPUs - ABM support in DC - KFD support for vega12/polaris12 - SDMA paging queue on vega - More amdkfd code sharing - DCC scanout on GFX9 - DC kerneldoc - Updated SMU firmware for GFX8 chips - XGMI PSP + hive reset support - GPU reset - DC trace support - Powerplay updates for newer Polaris - Cursor plane update fast path - kfd dma-buf support virtio-gpu: - add EDID support vmwgfx: - pageflip with damage support nouveau: - Initial Turing TU104/TU106 modesetting support msm: - a2xx gpu support for apq8060 and imx5 - a2xx gpummu support - mdp4 display support for apq8060 - DPU fixes and cleanups - enhanced profiling support - debug object naming interface - get_iova/page pinning decoupling tegra: - Tegra194 host1x, VIC and display support enabled - Audio over HDMI for Tegra186 and Tegra194 exynos: - DMA/IOMMU refactoring - plane alpha + blend mode support - Color format fixes for mixer driver rcar-du: - R8A7744 and R8A77470 support - R8A77965 LVDS support imx: - fbdev emulation fix - multi-tiled scalling fixes - SPDX identifiers rockchip - dw_hdmi support - dw-mipi-dsi + dual dsi support - mailbox read size fix qxl: - fix cursor pinning vc4: - YUV support (scaling + cursor) v3d: - enable TFU (Texture Formatting Unit) mali-dp: - add support for linear tiled formats sun4i: - Display Engine 3 support - H6 DE3 mixer 0 support - H6 display engine support - dw-hdmi support - H6 HDMI phy support - implicit fence waiting - BGRX8888 support meson: - Overlay plane support - implicit fence waiting - HDMI 1.4 4k modes bridge: - i2c fixes for sii902x" * tag 'drm-next-2018-12-14' of git://anongit.freedesktop.org/drm/drm: (1403 commits) drm/amd/display: Add fast path for cursor plane updates drm/amdgpu: Enable GPU recovery by default for CI drm/amd/display: Fix duplicating scaling/underscan connector state drm/amd/display: Fix unintialized max_bpc state values Revert "drm/amd/display: Set RMX_ASPECT as default" drm/amdgpu: Fix stub function name drm/msm/dpu: Fix clock issue after bind failure drm/msm/dpu: Clean up dpu_media_info.h static inline functions drm/msm/dpu: Further cleanups for static inline functions drm/msm/dpu: Cleanup the debugfs functions drm/msm/dpu: Remove dpu_irq and unused functions drm/msm: Make irq_postinstall optional drm/msm/dpu: Cleanup callers of dpu_hw_blk_init drm/msm/dpu: Remove unused functions drm/msm/dpu: Remove dpu_crtc_is_enabled() drm/msm/dpu: Remove dpu_crtc_get_mixer_height drm/msm/dpu: Remove dpu_dbg drm/msm: dpu: Remove crtc_lock drm/msm: dpu: Remove vblank_requested flag from dpu_crtc drm/msm: dpu: Separate crtc assignment from vblank enable ...
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| @@ -398,6 +398,24 @@ struct kfd_ioctl_unmap_memory_from_gpu_args { · 397 unmodified lines | |||
| 398 | __u32 n_success; /* to/from KFD */ | 398 | __u32 n_success; /* to/from KFD */ |
| 399 | }; | 399 | }; |
| 400 | 400 | ||
| 401 | struct kfd_ioctl_get_dmabuf_info_args { | ||
| 402 | __u64 size; /* from KFD */ | ||
| 403 | __u64 metadata_ptr; /* to KFD */ | ||
| 404 | __u32 metadata_size; /* to KFD (space allocated by user) | ||
| 405 | * from KFD (actual metadata size) | ||
| 406 | */ | ||
| 407 | __u32 gpu_id; /* from KFD */ | ||
| 408 | __u32 flags; /* from KFD (KFD_IOC_ALLOC_MEM_FLAGS) */ | ||
| 409 | __u32 dmabuf_fd; /* to KFD */ | ||
| 410 | }; | ||
| 411 | |||
| 412 | struct kfd_ioctl_import_dmabuf_args { | ||
| 413 | __u64 va_addr; /* to KFD */ | ||
| 414 | __u64 handle; /* from KFD */ | ||
| 415 | __u32 gpu_id; /* to KFD */ | ||
| 416 | __u32 dmabuf_fd; /* to KFD */ | ||
| 417 | }; | ||
| 418 | |||
| 401 | #define AMDKFD_IOCTL_BASE 'K' | 419 | #define AMDKFD_IOCTL_BASE 'K' |
| 402 | #define AMDKFD_IO(nr) _IO(AMDKFD_IOCTL_BASE, nr) | 420 | #define AMDKFD_IO(nr) _IO(AMDKFD_IOCTL_BASE, nr) |
| 403 | #define AMDKFD_IOR(nr, type) _IOR(AMDKFD_IOCTL_BASE, nr, type) | 421 | #define AMDKFD_IOR(nr, type) _IOR(AMDKFD_IOCTL_BASE, nr, type) |
| @@ -486,7 +504,13 @@ struct kfd_ioctl_unmap_memory_from_gpu_args { · 82 unmodified lines | |||
| 486 | #define AMDKFD_IOC_GET_QUEUE_WAVE_STATE \ | 504 | #define AMDKFD_IOC_GET_QUEUE_WAVE_STATE \ |
| 487 | AMDKFD_IOWR(0x1B, struct kfd_ioctl_get_queue_wave_state_args) | 505 | AMDKFD_IOWR(0x1B, struct kfd_ioctl_get_queue_wave_state_args) |
| 488 | 506 | ||
| 507 | #define AMDKFD_IOC_GET_DMABUF_INFO \ | ||
| 508 | AMDKFD_IOWR(0x1C, struct kfd_ioctl_get_dmabuf_info_args) | ||
| 509 | |||
| 510 | #define AMDKFD_IOC_IMPORT_DMABUF \ | ||
| 511 | AMDKFD_IOWR(0x1D, struct kfd_ioctl_import_dmabuf_args) | ||
| 512 | |||
| 489 | #define AMDKFD_COMMAND_START 0x01 | 513 | #define AMDKFD_COMMAND_START 0x01 |
| 490 | #define AMDKFD_COMMAND_END 0x1C | 514 | #define AMDKFD_COMMAND_END 0x1E |
| 491 | 515 | ||
| 492 | #endif | 516 | #endif |
| @@ -41,6 +41,7 @@ · 40 unmodified lines | |||
| 41 | #include <linux/types.h> | 41 | #include <linux/types.h> |
| 42 | 42 | ||
| 43 | #define VIRTIO_GPU_F_VIRGL 0 | 43 | #define VIRTIO_GPU_F_VIRGL 0 |
| 44 | #define VIRTIO_GPU_F_EDID 1 | ||
| 44 | 45 | ||
| 45 | enum virtio_gpu_ctrl_type { | 46 | enum virtio_gpu_ctrl_type { |
| 46 | VIRTIO_GPU_UNDEFINED = 0, | 47 | VIRTIO_GPU_UNDEFINED = 0, |
| @@ -56,6 +57,7 @@ enum virtio_gpu_ctrl_type { · 9 unmodified lines | |||
| 56 | VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING, | 57 | VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING, |
| 57 | VIRTIO_GPU_CMD_GET_CAPSET_INFO, | 58 | VIRTIO_GPU_CMD_GET_CAPSET_INFO, |
| 58 | VIRTIO_GPU_CMD_GET_CAPSET, | 59 | VIRTIO_GPU_CMD_GET_CAPSET, |
| 60 | VIRTIO_GPU_CMD_GET_EDID, | ||
| 59 | 61 | ||
| 60 | /* 3d commands */ | 62 | /* 3d commands */ |
| 61 | VIRTIO_GPU_CMD_CTX_CREATE = 0x0200, | 63 | VIRTIO_GPU_CMD_CTX_CREATE = 0x0200, |
| @@ -76,6 +78,7 @@ enum virtio_gpu_ctrl_type { · 14 unmodified lines | |||
| 76 | VIRTIO_GPU_RESP_OK_DISPLAY_INFO, | 78 | VIRTIO_GPU_RESP_OK_DISPLAY_INFO, |
| 77 | VIRTIO_GPU_RESP_OK_CAPSET_INFO, | 79 | VIRTIO_GPU_RESP_OK_CAPSET_INFO, |
| 78 | VIRTIO_GPU_RESP_OK_CAPSET, | 80 | VIRTIO_GPU_RESP_OK_CAPSET, |
| 81 | VIRTIO_GPU_RESP_OK_EDID, | ||
| 79 | 82 | ||
| 80 | /* error responses */ | 83 | /* error responses */ |
| 81 | VIRTIO_GPU_RESP_ERR_UNSPEC = 0x1200, | 84 | VIRTIO_GPU_RESP_ERR_UNSPEC = 0x1200, |
| @@ -291,6 +294,21 @@ struct virtio_gpu_resp_capset { · 209 unmodified lines | |||
| 291 | __u8 capset_data[]; | 294 | __u8 capset_data[]; |
| 292 | }; | 295 | }; |
| 293 | 296 | ||
| 297 | /* VIRTIO_GPU_CMD_GET_EDID */ | ||
| 298 | struct virtio_gpu_cmd_get_edid { | ||
| 299 | struct virtio_gpu_ctrl_hdr hdr; | ||
| 300 | __le32 scanout; | ||
| 301 | __le32 padding; | ||
| 302 | }; | ||
| 303 | |||
| 304 | /* VIRTIO_GPU_RESP_OK_EDID */ | ||
| 305 | struct virtio_gpu_resp_edid { | ||
| 306 | struct virtio_gpu_ctrl_hdr hdr; | ||
| 307 | __le32 size; | ||
| 308 | __le32 padding; | ||
| 309 | __u8 edid[1024]; | ||
| 310 | }; | ||
| 311 | |||
| 294 | #define VIRTIO_GPU_EVENT_DISPLAY (1 << 0) | 312 | #define VIRTIO_GPU_EVENT_DISPLAY (1 << 0) |
| 295 | 313 | ||
| 296 | struct virtio_gpu_config { | 314 | struct virtio_gpu_config { |