History

Merge tag 'drm-next-2026-06-17' of https://gitlab.freedesktop.org/drm/kernel

Pull drm updates from Dave Airlie: "Highlights: - xe: add initial CRI platform support - amdgpu: initial HDMI 2.1 FRL support - rust: add some new type concepts for device lifetimes - scheduler: moves to a fair algorithm and lots of cleanups But it's mostly the usual mountain of changes across the board. core: - add docbook for DRM_IOCTL_SYNCOBJ_EVENTFD - change signature of drm_connector_attach_hdr_output_metadata_property - dedup counter and timestamp retrieval in vblank code - parse AMD VSDB v3 in CTA extension blocks - add P230, Y7, XYYY2101010, T430, XVUY210101010 formats - don't call drop master on file close if not master - use drm_printf_indent in atomic / bridge - fix 32b format descriptions - docs: fix toctree - hdmi: add common TMDS character rates - fix drm_syncobj_find_fence leak rust: - introduce Higher-Ranked lifetime types - replace drvdata with scoped registration data - add GPUVM immediate mode abstraction for rust GPU drivers - introduce DeviceContext type state for drm::Device bridge: - clarify drm_bridge_get/put - create drm_get_bridge_by_endpoint and use it - analogix_dp: add panel probing - ite-it6211 - use drm audio hdmi helpers buddy: - add lockdep annotations dp: - add PR and VRR updates - mst: fix buffer overflows - add Adaptive Sync SDP decoding support - fix OOB reads in dp-mst ttm: - bump fpfn/lpfn to 64-bit scheduler: - change default to fair scheduler - map runqueue 1:1 with scheduler dma-buf: - port selftests to kunit - convert dma-buf system/heap allocators to module - add separate DMABUF_HEAPS_SYSTEM_CC_SHARED Kconfig udmabuf: - revert hugetlb support - fix error with CONFIG_DMA_API_DEBUG dma-fence: - fix tracepoints lifetime - remove unused signal on any support ras: - add clear error counter netlink command to drm ras gpusvm: - reject VMAs with VM_IO or VM_PFNMAP when creating SVM ranges - use IOVA allocations pagemap: - use IOVA allocations panels: - update to use ref counts - add support for CSW PNB601LS1-2, LGD LP116WHA-SPB1 - add support for waveshare panels - CMN N116BCN-EA1, CMN N140HCA-EEK, IVO M140NWFQ R5, - IVO, R140NWFW R0, BOE NT140*, BOE NV133FHM-N4F, - AUO B140*, AUO B133HAN06.6 and AUO B116XTN02.3 eDP panels - Surface Pro 12 Panel xe: - add CRI PCI-IDs - debugfs add multi-lrc info - engine init cleanup - PF fair scheduling auto provisioning - system controller support for CRI/Xe3p - PXP state machine fixes - Reset/wedge/unload corner case fixes - Wedge path memory allocation fixes - PAT type cleanups - Reject unsafe PAT for CPU cached memory - OA improvements for CRI device memory - kernel doc syntax in xe headers - xe_drm.h documentation fixes - include guard cleanups - VF CCS memory pool - i915/xe step unification - Xe3p GT tuning fixes - forcewake cleanup in GT and GuC - admin-only PF mode - enable hwmon energy attributes for CRI - enable GT_MI_USER_INTERRUPT - refactor emit functions - oa workarounds - multi_queue: allow QUEUE_TIMESTAMP register - convert stolen memory to ttm range manager - use xe2 style blitter as a feature flag - make drm_driver const - add/use IRQ page to HW engine definition - fix oops when display disabled i915: - enable PIPEDMC_ERROR interrupt - more common display code refactoring - restructure DP/HDMI sink format handling - eliminate FB usage from lowlevel pinning code - panel replay bw optimization - integrate sharpness filter into the scaler - new fb_pin abstraction for xe/i915 fb transparent handling - skip inactive MST connectors on HDCP - start switching to display specific registers - use polling when irq unavailable - Adaptive-sync SDP prep amdgpu: - use drm_display_info for AMD VSDB data - Initial HDMI 2.1 FRL support - Initial DCN 4.2.1 support - GART fixes for non-4k pages - GC 11.5.6/SDMA 6.4.0/and other new IPs - GFX9/DCE6/Hawaii/SDMA4/GART/Userq fixes - Finish support for using multiple SDMA queues for TTM operations - SWSMU updates - GC 12.1 updates - SMU 15.0.8 updates - DCN 4.2 updates - DC type conversion fixes - Enable DC power module - Replay/PSR updates - SMU 13.x updates - Compute queue quantum MQD updates - ASPM fix - Align VKMS with common implementation - DC analog support fixes - UVD 3 fixes - TCC harvesting fixes for SI - GC 11 APU module reload fix - NBIO 6.3.2 support - IH 7.1 updates - DC cursor fixes - VCN/JPEG user fence fixes - DC support for connectors without DDC - Prefer ROM BAR for default VGA device - DC bandwidth fixes - Add PTL support for profiler - Introduce dc_plane_cm and migrate surface update color path - Add FRL registers for HDMI 2.1 - Restructure VM state machine - Auxless ALPM support - GEM_OP locking/warning fixes - switch to system_dfl_wq amdkfd: - GPUVM TLB flush fix - Hotplug fix - Boundary check fixes - SVM fixes - CRIU fixes - add profiler API - MES 12.1 updates msm: - core: - fix shrinker documentation - IFPC enabled for gen8 - PERFCNTR_CONFIG ioctl support - GPU: - reworked UBWC handling - a810 support - MDSS: - add support for Milos platform - reworked UBWC handling - DisplayPort: - reworked HPD handling as prep for MST - DPU: - Milos platform support - reworked UBWC handling - DSI: - Milos platform support nova: - Hopper/Blackwell enablement (GH100/GB100/GB202) - FSP support - 32-bit firmware support - HAL functions - refactor GSP boot/unload - GA100 support - VBIOS hardening/refactoring - Adopt higher order lifetime types tyr: - define register blocks - add shmem backed GEM objects - adopt higher order lifetime types - move clock cleanup into Drop radeon: - Hawaii SMU fixes - CS parser fix - use struct drm_edid instead of edid amdxdna: - export per-client BO memory via fdinfo - AIE4 device support - support medium/lower power modes - expandable device heap support - revert read-only user-pointer BO mappings ivpu: - support frequency limiting panthor: - enable GEM shrinker support - add eviction and reclaim info to fdinfo v3d: - enable runtime PM mgag200: - support XRGB1555 + C8 ast: - support XRGB1555 + C8 - use constants for lots of registers - fix register handling imagination: - fence handling refactoring nouveau: - fix sched double call - expose VBIOS on GSP-RM systems - add GA100 support virtio: - add VIRTIO_GPU_F_BLOB_ALIGNMENT flag - add deferred mapping support gud: - add RCade Display Adapter hibmc: - fix no connectors usage mediatek: - hdmi: convert error handling - simplify mtk_crtc allocation exynos: - move fbdev emulation to drm client buffers - use drm format helpers for geometry/size - adopt core DMA tracking - fix framebuffer offset handling renesas: - add RZ/T2H SOC support versilicon: - add cursor plane support tegra: - use drm client for framebuffer" * tag 'drm-next-2026-06-17' of https://gitlab.freedesktop.org/drm/kernel: (1731 commits) dma-buf: move system_cc_shared heap under separate Kconfig accel/amdxdna: Clear sva pointer after unbind agp/amd64: Fix broken error propagation in agp_amd64_probe() accel/amdxdna: Require carveout when PASID and force_iova are disabled drm/amdkfd: always resume_all after suspend_all drm/amdgpu/gfx: move fault and EOP IRQ get/put to hw_init/hw_fini drm/amd/display: Consult MCCS FreeSync cap only if requested & supported drm/amd/pm: Use strscpy in profile mode parsing drm/amdkfd: Fix infinite loop parsing CRAT with zero subtype length drm/amdkfd: fix sysfs topology prop length on buffer truncation drm/amdgpu: drop retry loop in amdgpu_hmm_range_get_pages drm/amd/pm: bound OD parameter parsing to stack array size drm/amd/pm: Stop pp_od_clk_voltage emit at PAGE_SIZE drm/amdkfd: Unwind debug trap enable on copy_to_user failure drm/amdgpu: validate the mes firmware version for gfx12.1 drm/amdgpu: validate the mes firmware version for gfx12 drm/amdgpu: compare MES firmware version ucode for gfx11 drm/amdkfd: Add bounds check for AMDKFD_IOC_WAIT_EVENTS drm/amdgpu: restart the CS if some parts of the VM are still invalidated drm/amd/display: use unsigned types for local pipe and REG_GET counters ...

Linus Torvalds committed 5 months ago

Commit 4b999902 parents 9c87e61 52d4ab11976 files · +245268 −30143Browse files

Showing the changes to include/uapi (12 of 1976 files). Show all

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12 files
  1. include/uapi/drm/amdxdna_accel.h +25 −2
  2. include/uapi/drm/drm.h +8 −19
  3. include/uapi/drm/drm_fourcc.h +32 −22
  4. include/uapi/drm/drm_mode.h +1 −18
  5. include/uapi/drm/drm_ras.h +1 −0
  6. include/uapi/drm/drm_sarea.h +1 −19
  7. include/uapi/drm/msm_drm.h +48 −0
  8. include/uapi/drm/tegra_drm.h +16 −0
  9. include/uapi/drm/virtgpu_drm.h +5 −0
  10. include/uapi/drm/xe_drm.h +103 −103
  11. include/uapi/linux/kfd_ioctl.h +36 −2
  12. include/uapi/linux/virtio_gpu.h +9 −0
include/uapi/drm/amdxdna_accel.h+25−2
@@ -18,6 +18,7 @@ extern "C" { · 17 unmodified lines
18#define AMDXDNA_INVALID_CTX_HANDLE 018#define AMDXDNA_INVALID_CTX_HANDLE 0
19#define AMDXDNA_INVALID_BO_HANDLE 019#define AMDXDNA_INVALID_BO_HANDLE 0
20#define AMDXDNA_INVALID_FENCE_HANDLE 020#define AMDXDNA_INVALID_FENCE_HANDLE 0
21#define AMDXDNA_INVALID_DOORBELL_OFFSET (~0U)
21 22
22/*23/*
23 * Define hardware context priority24 * Define hardware context priority
@@ -29,7 +30,9 @@ extern "C" { · 5 unmodified lines
29 30
30enum amdxdna_device_type {31enum amdxdna_device_type {
31 AMDXDNA_DEV_TYPE_UNKNOWN = -1,32 AMDXDNA_DEV_TYPE_UNKNOWN = -1,
32 AMDXDNA_DEV_TYPE_KMQ,33 AMDXDNA_DEV_TYPE_KMQ = 0,
34 AMDXDNA_DEV_TYPE_UMQ = 1,
35 AMDXDNA_DEV_TYPE_PF = 2,
33};36};
34 37
35enum amdxdna_drm_ioctl_id {38enum amdxdna_drm_ioctl_id {
@@ -42,7 +45,8 @@ enum amdxdna_drm_ioctl_id { · 6 unmodified lines
42 DRM_AMDXDNA_EXEC_CMD,45 DRM_AMDXDNA_EXEC_CMD,
43 DRM_AMDXDNA_GET_INFO,46 DRM_AMDXDNA_GET_INFO,
44 DRM_AMDXDNA_SET_STATE,47 DRM_AMDXDNA_SET_STATE,
45 DRM_AMDXDNA_GET_ARRAY = 10,48 DRM_AMDXDNA_WAIT_CMD,
49 DRM_AMDXDNA_GET_ARRAY,
46};50};
47 51
48/**52/**
@@ -271,6 +275,21 @@ struct amdxdna_drm_exec_cmd { · 222 unmodified lines
271 __u64 seq;275 __u64 seq;
272};276};
273 277
278/**
279 * struct amdxdna_drm_wait_cmd - Wait execution command.
280 *
281 * @hwctx: Context handle.
282 * @timeout: timeout in ms, 0 implies infinite wait.
283 * @seq: sequence number of the command returned by execute command.
284 *
285 * Wait a command specified by seq to be completed.
286 */
287struct amdxdna_drm_wait_cmd {
288 __u32 hwctx;
289 __u32 timeout;
290 __u64 seq;
291};
292
274/**293/**
275 * struct amdxdna_drm_query_aie_status - Query the status of the AIE hardware294 * struct amdxdna_drm_query_aie_status - Query the status of the AIE hardware
276 * @buffer: The user space buffer that will return the AIE status.295 * @buffer: The user space buffer that will return the AIE status.
@@ -736,6 +755,10 @@ struct amdxdna_drm_set_power_mode { · 459 unmodified lines
736 DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDXDNA_GET_ARRAY, \755 DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDXDNA_GET_ARRAY, \
737 struct amdxdna_drm_get_array)756 struct amdxdna_drm_get_array)
738 757
758#define DRM_IOCTL_AMDXDNA_WAIT_CMD \
759 DRM_IOW(DRM_COMMAND_BASE + DRM_AMDXDNA_WAIT_CMD, \
760 struct amdxdna_drm_wait_cmd)
761
739#if defined(__cplusplus)762#if defined(__cplusplus)
740} /* extern c end */763} /* extern c end */
741#endif764#endif
include/uapi/drm/drm.h+8−19
@@ -1,3 +1,4 @@
1/* SPDX-License-Identifier: MIT */
1/*2/*
2 * Header for the Direct Rendering Manager3 * Header for the Direct Rendering Manager
3 *4 *
@@ -11,25 +12,6 @@ · 7 unmodified lines
11 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.12 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
12 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.13 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
13 * All rights reserved.14 * All rights reserved.
14 *
15 * Permission is hereby granted, free of charge, to any person obtaining a
16 * copy of this software and associated documentation files (the "Software"),
17 * to deal in the Software without restriction, including without limitation
18 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
19 * and/or sell copies of the Software, and to permit persons to whom the
20 * Software is furnished to do so, subject to the following conditions:
21 *
22 * The above copyright notice and this permission notice (including the next
23 * paragraph) shall be included in all copies or substantial portions of the
24 * Software.
25 *
26 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
27 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
28 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
29 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
30 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
31 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
32 * OTHER DEALINGS IN THE SOFTWARE.
33 */15 */
34 16
35#ifndef _DRM_H_17#ifndef _DRM_H_
@@ -1323,6 +1305,13 @@ extern "C" { · 1287 unmodified lines
1323 */1305 */
1324#define DRM_IOCTL_MODE_GETFB2 DRM_IOWR(0xCE, struct drm_mode_fb_cmd2)1306#define DRM_IOCTL_MODE_GETFB2 DRM_IOWR(0xCE, struct drm_mode_fb_cmd2)
1325 1307
1308/**
1309 * DRM_IOCTL_SYNCOBJ_EVENTFD - Register an eventfd to be signalled by a syncobj.
1310 *
1311 * This can be used to integrate a syncobj in an event loop.
1312 *
1313 * The IOCTL argument is a struct drm_syncobj_eventfd.
1314 */
1326#define DRM_IOCTL_SYNCOBJ_EVENTFD DRM_IOWR(0xCF, struct drm_syncobj_eventfd)1315#define DRM_IOCTL_SYNCOBJ_EVENTFD DRM_IOWR(0xCF, struct drm_syncobj_eventfd)
1327 1316
1328/**1317/**
include/uapi/drm/drm_fourcc.h+32−22
@@ -1,24 +1,6 @@
1/* SPDX-License-Identifier: MIT */
1/*2/*
2 * Copyright 2011 Intel Corporation3 * Copyright 2011 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 */4 */
23 5
24#ifndef DRM_FOURCC_H6#ifndef DRM_FOURCC_H
@@ -242,9 +224,9 @@ extern "C" { · 217 unmodified lines
242 * [31:0] sign:exponent:mantissa 1:8:23224 * [31:0] sign:exponent:mantissa 1:8:23
243 */225 */
244#define DRM_FORMAT_R32F fourcc_code('R', ' ', ' ', 'F') /* [31:0] R 32 little endian */226#define DRM_FORMAT_R32F fourcc_code('R', ' ', ' ', 'F') /* [31:0] R 32 little endian */
245#define DRM_FORMAT_GR3232F fourcc_code('G', 'R', ' ', 'F') /* [63:0] R:G 32:32 little endian */227#define DRM_FORMAT_GR3232F fourcc_code('G', 'R', ' ', 'F') /* [63:0] G:R 32:32 little endian */
246#define DRM_FORMAT_BGR323232F fourcc_code('B', 'G', 'R', 'F') /* [95:0] R:G:B 32:32:32 little endian */228#define DRM_FORMAT_BGR323232F fourcc_code('B', 'G', 'R', 'F') /* [95:0] B:G:R 32:32:32 little endian */
247#define DRM_FORMAT_ABGR32323232F fourcc_code('A', 'B', '8', 'F') /* [127:0] R:G:B:A 32:32:32:32 little endian */229#define DRM_FORMAT_ABGR32323232F fourcc_code('A', 'B', '8', 'F') /* [127:0] A:B:G:R 32:32:32:32 little endian */
248 230
249/*231/*
250 * RGBA format with 10-bit components packed in 64-bit per pixel, with 6 bits232 * RGBA format with 10-bit components packed in 64-bit per pixel, with 6 bits
@@ -264,6 +246,7 @@ extern "C" { · 13 unmodified lines
264#define DRM_FORMAT_XVUY8888 fourcc_code('X', 'V', 'U', 'Y') /* [31:0] X:Cr:Cb:Y 8:8:8:8 little endian */246#define DRM_FORMAT_XVUY8888 fourcc_code('X', 'V', 'U', 'Y') /* [31:0] X:Cr:Cb:Y 8:8:8:8 little endian */
265#define DRM_FORMAT_VUY888 fourcc_code('V', 'U', '2', '4') /* [23:0] Cr:Cb:Y 8:8:8 little endian */247#define DRM_FORMAT_VUY888 fourcc_code('V', 'U', '2', '4') /* [23:0] Cr:Cb:Y 8:8:8 little endian */
266#define DRM_FORMAT_VUY101010 fourcc_code('V', 'U', '3', '0') /* Y followed by U then V, 10:10:10. Non-linear modifier only */248#define DRM_FORMAT_VUY101010 fourcc_code('V', 'U', '3', '0') /* Y followed by U then V, 10:10:10. Non-linear modifier only */
249#define DRM_FORMAT_XVUY2101010 fourcc_code('X', 'Y', '3', '0') /* [31:0] x:Cr:Cb:Y 2:10:10:10 little endian */
267 250
268/*251/*
269 * packed Y2xx indicate for each component, xx valid data occupy msb252 * packed Y2xx indicate for each component, xx valid data occupy msb
@@ -379,6 +362,14 @@ extern "C" { · 109 unmodified lines
379 */362 */
380#define DRM_FORMAT_P030 fourcc_code('P', '0', '3', '0') /* 2x2 subsampled Cr:Cb plane 10 bits per channel packed */363#define DRM_FORMAT_P030 fourcc_code('P', '0', '3', '0') /* 2x2 subsampled Cr:Cb plane 10 bits per channel packed */
381 364
365/*
366 * 2 plane YCbCr422.
367 * 3 10 bit components and 2 padding bits packed into 4 bytes.
368 * index 0 = Y plane, [31:0] x:Y2:Y1:Y0 2:10:10:10 little endian
369 * index 1 = Cr:Cb plane, [63:0] x:Cr2:Cb2:Cr1:x:Cb1:Cr0:Cb0 [2:10:10:10:2:10:10:10] little endian
370 */
371#define DRM_FORMAT_P230 fourcc_code('P', '2', '3', '0') /* 2x1 subsampled Cr:Cb plane 10 bits per channel packed */
372
382/* 3 plane non-subsampled (444) YCbCr373/* 3 plane non-subsampled (444) YCbCr
383 * 16 bits per component, but only 10 bits are used and 6 bits are padded374 * 16 bits per component, but only 10 bits are used and 6 bits are padded
384 * index 0: Y plane, [15:0] Y:x [10:6] little endian375 * index 0: Y plane, [15:0] Y:x [10:6] little endian
@@ -395,6 +386,15 @@ extern "C" { · 10 unmodified lines
395 */386 */
396#define DRM_FORMAT_Q401 fourcc_code('Q', '4', '0', '1')387#define DRM_FORMAT_Q401 fourcc_code('Q', '4', '0', '1')
397 388
389/*
390 * 3 plane non-subsampled (444) YCbCr LSB aligned
391 * 10 bpc, 30 bits per sample image data in a single contiguous buffer.
392 * index 0: Y plane, [31:0] x:Y2:Y1:Y0 [2:10:10:10] little endian
393 * index 1: Cb plane, [31:0] x:Cb2:Cb1:Cb0 [2:10:10:10] little endian
394 * index 2: Cr plane, [31:0] x:Cr2:Cr1:Cr0 [2:10:10:10] little endian
395 */
396#define DRM_FORMAT_T430 fourcc_code('T', '4', '3', '0')
397
398/*398/*
399 * 3 plane YCbCr LSB aligned399 * 3 plane YCbCr LSB aligned
400 * In order to use these formats in a similar fashion to MSB aligned ones400 * In order to use these formats in a similar fashion to MSB aligned ones
@@ -451,6 +451,16 @@ extern "C" { · 50 unmodified lines
451#define DRM_FORMAT_YUV444 fourcc_code('Y', 'U', '2', '4') /* non-subsampled Cb (1) and Cr (2) planes */451#define DRM_FORMAT_YUV444 fourcc_code('Y', 'U', '2', '4') /* non-subsampled Cb (1) and Cr (2) planes */
452#define DRM_FORMAT_YVU444 fourcc_code('Y', 'V', '2', '4') /* non-subsampled Cr (1) and Cb (2) planes */452#define DRM_FORMAT_YVU444 fourcc_code('Y', 'V', '2', '4') /* non-subsampled Cr (1) and Cb (2) planes */
453 453
454/*
455 * Y-only (greyscale) formats
456 *
457 * The Y-only formats are handled similarly to the YCbCr formats in the display
458 * pipeline, with the Cb and Cr implicitly neutral (0.0 in nominal values). This
459 * also means that COLOR_RANGE property applies to the Y-only formats.
460 */
461
462#define DRM_FORMAT_Y8 fourcc_code('G', 'R', 'E', 'Y') /* 8-bit Y-only */
463#define DRM_FORMAT_XYYY2101010 fourcc_code('Y', 'P', 'A', '4') /* [31:0] x:Y2:Y1:Y0 2:10:10:10 little endian */
454 464
455/*465/*
456 * Format Modifiers:466 * Format Modifiers:
include/uapi/drm/drm_mode.h+1−18
@@ -1,27 +1,10 @@
1/* SPDX-License-Identifier: MIT */
1/*2/*
2 * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>3 * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
3 * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>4 * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
4 * Copyright (c) 2008 Red Hat Inc.5 * Copyright (c) 2008 Red Hat Inc.
5 * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA6 * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
6 * Copyright (c) 2007-2008 Intel Corporation7 * Copyright (c) 2007-2008 Intel Corporation
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * IN THE SOFTWARE.
25 */8 */
26 9
27#ifndef _DRM_MODE_H10#ifndef _DRM_MODE_H
include/uapi/drm/drm_ras.h+1−0
@@ -41,6 +41,7 @@ enum { · 40 unmodified lines
41enum {41enum {
42 DRM_RAS_CMD_LIST_NODES = 1,42 DRM_RAS_CMD_LIST_NODES = 1,
43 DRM_RAS_CMD_GET_ERROR_COUNTER,43 DRM_RAS_CMD_GET_ERROR_COUNTER,
44 DRM_RAS_CMD_CLEAR_ERROR_COUNTER,
44 45
45 __DRM_RAS_CMD_MAX,46 __DRM_RAS_CMD_MAX,
46 DRM_RAS_CMD_MAX = (__DRM_RAS_CMD_MAX - 1)47 DRM_RAS_CMD_MAX = (__DRM_RAS_CMD_MAX - 1)
include/uapi/drm/drm_sarea.h+1−19
@@ -1,3 +1,4 @@
1/* SPDX-License-Identifier: MIT */
1/**2/**
2 * \file drm_sarea.h3 * \file drm_sarea.h
3 * \brief SAREA definitions4 * \brief SAREA definitions
@@ -8,25 +9,6 @@ · 4 unmodified lines
8/*9/*
9 * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas.10 * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas.
10 * All Rights Reserved.11 * All Rights Reserved.
11 *
12 * Permission is hereby granted, free of charge, to any person obtaining a
13 * copy of this software and associated documentation files (the "Software"),
14 * to deal in the Software without restriction, including without limitation
15 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16 * and/or sell copies of the Software, and to permit persons to whom the
17 * Software is furnished to do so, subject to the following conditions:
18 *
19 * The above copyright notice and this permission notice (including the next
20 * paragraph) shall be included in all copies or substantial portions of the
21 * Software.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
26 * TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29 * OTHER DEALINGS IN THE SOFTWARE.
30 */12 */
31 13
32#ifndef _DRM_SAREA_H_14#ifndef _DRM_SAREA_H_
include/uapi/drm/msm_drm.h+48−0
@@ -491,6 +491,52 @@ struct drm_msm_submitqueue_query { · 490 unmodified lines
491 __u32 pad;491 __u32 pad;
492};492};
493 493
494#define MSM_PERFCNTR_STREAM 0x00000001
495#define MSM_PERFCNTR_UPDATE 0x00000002
496#define MSM_PERFCNTR_FLAGS ( \
497 MSM_PERFCNTR_STREAM | \
498 MSM_PERFCNTR_UPDATE | \
499 0)
500
501struct drm_msm_perfcntr_group {
502 char group_name[16];
503 __u32 nr_countables;
504 __u32 pad; /* mbz */
505 __u64 countables; /* pointer to an array of nr_countables u32 */
506};
507
508/*
509 * Note, for MSM_PERFCNTR_STREAM, the ioctl returns an fd to read recorded
510 * counters. This only works because the ioctl is DRM_IOW(), if we returned
511 * a out param in the ioctl struct the copy_to_user() (in drm_ioctl())
512 * could fault, causing us to leak the fd.
513 *
514 * If the ioctl returns with error E2BIG, that means more counters/countables
515 * are requested than are currently available. If MSM_PERFCNTR_UPDATE flag
516 * is set, drm_msm_perfcntr_group::nr_countables will be updated to return
517 * the actual # of counters available.
518 *
519 * The data read from the has the following format for each sampling period:
520 *
521 * uint64_t timestamp; // CP_ALWAYS_ON_COUNTER captured at sample time
522 * uint32_t seqno; // increments by 1 each period, reset to 0 on discontinuity
523 * uint32_t mbz; // pad out counters to 64b
524 * struct {
525 * uint64_t counter[nr_countables];
526 * } groups[nr_groups];
527 *
528 * The ordering of groups and counters matches the order in PERFCNTR_CONFIG
529 * ioctl.
530 */
531struct drm_msm_perfcntr_config {
532 __u32 flags; /* bitmask of MSM_PERFCNTR_x */
533 __u32 nr_groups; /* # of entries in groups array */
534 __u64 groups; /* pointer to array of drm_msm_perfcntr_group */
535 __u64 period; /* sampling period in ns */
536 __u32 bufsz_shift; /* sample buffer size in bytes is 1<<bufsz_shift */
537 __u32 group_stride; /* sizeof(struct drm_msm_perfcntr_group) */
538};
539
494#define DRM_MSM_GET_PARAM 0x00540#define DRM_MSM_GET_PARAM 0x00
495#define DRM_MSM_SET_PARAM 0x01541#define DRM_MSM_SET_PARAM 0x01
496#define DRM_MSM_GEM_NEW 0x02542#define DRM_MSM_GEM_NEW 0x02
@@ -507,6 +553,7 @@ struct drm_msm_submitqueue_query { · 10 unmodified lines
507#define DRM_MSM_SUBMITQUEUE_CLOSE 0x0B553#define DRM_MSM_SUBMITQUEUE_CLOSE 0x0B
508#define DRM_MSM_SUBMITQUEUE_QUERY 0x0C554#define DRM_MSM_SUBMITQUEUE_QUERY 0x0C
509#define DRM_MSM_VM_BIND 0x0D555#define DRM_MSM_VM_BIND 0x0D
556#define DRM_MSM_PERFCNTR_CONFIG 0x0E
510 557
511#define DRM_IOCTL_MSM_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GET_PARAM, struct drm_msm_param)558#define DRM_IOCTL_MSM_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GET_PARAM, struct drm_msm_param)
512#define DRM_IOCTL_MSM_SET_PARAM DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_SET_PARAM, struct drm_msm_param)559#define DRM_IOCTL_MSM_SET_PARAM DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_SET_PARAM, struct drm_msm_param)
@@ -521,6 +568,7 @@ struct drm_msm_submitqueue_query { · 8 unmodified lines
521#define DRM_IOCTL_MSM_SUBMITQUEUE_CLOSE DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_SUBMITQUEUE_CLOSE, __u32)568#define DRM_IOCTL_MSM_SUBMITQUEUE_CLOSE DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_SUBMITQUEUE_CLOSE, __u32)
522#define DRM_IOCTL_MSM_SUBMITQUEUE_QUERY DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_SUBMITQUEUE_QUERY, struct drm_msm_submitqueue_query)569#define DRM_IOCTL_MSM_SUBMITQUEUE_QUERY DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_SUBMITQUEUE_QUERY, struct drm_msm_submitqueue_query)
523#define DRM_IOCTL_MSM_VM_BIND DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_VM_BIND, struct drm_msm_vm_bind)570#define DRM_IOCTL_MSM_VM_BIND DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_VM_BIND, struct drm_msm_vm_bind)
571#define DRM_IOCTL_MSM_PERFCNTR_CONFIG DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_PERFCNTR_CONFIG, struct drm_msm_perfcntr_config)
524 572
525#if defined(__cplusplus)573#if defined(__cplusplus)
526}574}
include/uapi/drm/tegra_drm.h+16−0
@@ -304,6 +304,7 @@ struct drm_tegra_cmdbuf { · 303 unmodified lines
304 * struct drm_tegra_reloc - GEM object relocation structure304 * struct drm_tegra_reloc - GEM object relocation structure
305 */305 */
306struct drm_tegra_reloc {306struct drm_tegra_reloc {
307 /** @cmdbuf: cmd information */
307 struct {308 struct {
308 /**309 /**
309 * @cmdbuf.handle:310 * @cmdbuf.handle:
@@ -321,6 +322,7 @@ struct drm_tegra_reloc { · 11 unmodified lines
321 */322 */
322 __u32 offset;323 __u32 offset;
323 } cmdbuf;324 } cmdbuf;
325 /** @target: relocate target information */
324 struct {326 struct {
325 /**327 /**
326 * @target.handle:328 * @target.handle:
@@ -778,6 +780,9 @@ struct drm_tegra_channel_unmap { · 451 unmodified lines
778/* Submission */780/* Submission */
779 781
780/**782/**
783 * define DRM_TEGRA_SUBMIT_RELOC_SECTOR_LAYOUT - \
784 * Select sector layout swizzling for in-memory buffers.
785 *
781 * Specify that bit 39 of the patched-in address should be set to switch786 * Specify that bit 39 of the patched-in address should be set to switch
782 * swizzling between Tegra and non-Tegra sector layout on systems that store787 * swizzling between Tegra and non-Tegra sector layout on systems that store
783 * surfaces in system memory in non-Tegra sector layout.788 * surfaces in system memory in non-Tegra sector layout.
@@ -830,16 +835,27 @@ struct drm_tegra_submit_buf { · 46 unmodified lines
830};835};
831 836
832/**837/**
838 * define DRM_TEGRA_SUBMIT_CMD_GATHER_UPTR - \
839 * Execute Host1x opcodes from user pointer.
840 *
833 * Execute `words` words of Host1x opcodes specified in the `gather_data_ptr`841 * Execute `words` words of Host1x opcodes specified in the `gather_data_ptr`
834 * buffer. Each GATHER_UPTR command uses successive words from the buffer.842 * buffer. Each GATHER_UPTR command uses successive words from the buffer.
835 */843 */
836#define DRM_TEGRA_SUBMIT_CMD_GATHER_UPTR 0844#define DRM_TEGRA_SUBMIT_CMD_GATHER_UPTR 0
845
837/**846/**
847 * define DRM_TEGRA_SUBMIT_CMD_WAIT_SYNCPT - \
848 * Wait for syncpoint (absolute).
849 *
838 * Wait for a syncpoint to reach a value before continuing with further850 * Wait for a syncpoint to reach a value before continuing with further
839 * commands.851 * commands.
840 */852 */
841#define DRM_TEGRA_SUBMIT_CMD_WAIT_SYNCPT 1853#define DRM_TEGRA_SUBMIT_CMD_WAIT_SYNCPT 1
854
842/**855/**
856 * define DRM_TEGRA_SUBMIT_CMD_WAIT_SYNCPT_RELATIVE - \
857 * Wait for syncpoint (relative).
858 *
843 * Wait for a syncpoint to reach a value before continuing with further859 * Wait for a syncpoint to reach a value before continuing with further
844 * commands. The threshold is calculated relative to the start of the job.860 * commands. The threshold is calculated relative to the start of the job.
845 */861 */
include/uapi/drm/virtgpu_drm.h+5−0
@@ -98,6 +98,7 @@ struct drm_virtgpu_execbuffer { · 97 unmodified lines
98#define VIRTGPU_PARAM_CONTEXT_INIT 6 /* DRM_VIRTGPU_CONTEXT_INIT */98#define VIRTGPU_PARAM_CONTEXT_INIT 6 /* DRM_VIRTGPU_CONTEXT_INIT */
99#define VIRTGPU_PARAM_SUPPORTED_CAPSET_IDs 7 /* Bitmask of supported capability set ids */99#define VIRTGPU_PARAM_SUPPORTED_CAPSET_IDs 7 /* Bitmask of supported capability set ids */
100#define VIRTGPU_PARAM_EXPLICIT_DEBUG_NAME 8 /* Ability to set debug name from userspace */100#define VIRTGPU_PARAM_EXPLICIT_DEBUG_NAME 8 /* Ability to set debug name from userspace */
101#define VIRTGPU_PARAM_BLOB_ALIGNMENT 9 /* Device alignment requirements for blobs */
101 102
102struct drm_virtgpu_getparam {103struct drm_virtgpu_getparam {
103 __u64 param;104 __u64 param;
@@ -200,6 +201,10 @@ struct drm_virtgpu_resource_create_blob { · 96 unmodified lines
200 __u32 cmd_size;201 __u32 cmd_size;
201 __u64 cmd;202 __u64 cmd;
202 __u64 blob_id;203 __u64 blob_id;
204
205#define DRM_VIRTGPU_BLOB_FLAG_HINT_DEFER_MAPPING 0x0001
206 __u32 blob_hints;
207 __u32 pad2;
203};208};
204 209
205#define VIRTGPU_CONTEXT_PARAM_CAPSET_ID 0x0001210#define VIRTGPU_CONTEXT_PARAM_CAPSET_ID 0x0001
include/uapi/drm/xe_drm.h+103−103
@@ -83,6 +83,7 @@ extern "C" { · 82 unmodified lines
83 * - &DRM_IOCTL_XE_OBSERVATION83 * - &DRM_IOCTL_XE_OBSERVATION
84 * - &DRM_IOCTL_XE_MADVISE84 * - &DRM_IOCTL_XE_MADVISE
85 * - &DRM_IOCTL_XE_VM_QUERY_MEM_RANGE_ATTRS85 * - &DRM_IOCTL_XE_VM_QUERY_MEM_RANGE_ATTRS
86 * - &DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY
86 * - &DRM_IOCTL_XE_VM_GET_PROPERTY87 * - &DRM_IOCTL_XE_VM_GET_PROPERTY
87 */88 */
88 89
@@ -167,7 +168,7 @@ extern "C" { · 78 unmodified lines
167 * Typically the struct drm_xe_user_extension would be embedded in some uAPI168 * Typically the struct drm_xe_user_extension would be embedded in some uAPI
168 * struct, and in this case we would feed it the head of the chain(i.e ext1),169 * struct, and in this case we would feed it the head of the chain(i.e ext1),
169 * which would then apply all of the above extensions.170 * which would then apply all of the above extensions.
170*/171 */
171 172
172/**173/**
173 * struct drm_xe_user_extension - Base class for defining a chain of extensions174 * struct drm_xe_user_extension - Base class for defining a chain of extensions
@@ -229,9 +230,9 @@ struct drm_xe_ext_set_property { · 55 unmodified lines
229/**230/**
230 * struct drm_xe_engine_class_instance - instance of an engine class231 * struct drm_xe_engine_class_instance - instance of an engine class
231 *232 *
232 * It is returned as part of the @drm_xe_engine, but it also is used as233 * It is returned as part of the &struct drm_xe_engine, but it also is used as
233 * the input of engine selection for both @drm_xe_exec_queue_create and234 * the input of engine selection for both &struct drm_xe_exec_queue_create and
234 * @drm_xe_query_engine_cycles235 * &struct drm_xe_query_engine_cycles
235 *236 *
236 * The @engine_class can be:237 * The @engine_class can be:
237 * - %DRM_XE_ENGINE_CLASS_RENDER238 * - %DRM_XE_ENGINE_CLASS_RENDER
@@ -264,7 +265,7 @@ struct drm_xe_engine_class_instance { · 26 unmodified lines
264 * struct drm_xe_engine - describe hardware engine265 * struct drm_xe_engine - describe hardware engine
265 */266 */
266struct drm_xe_engine {267struct drm_xe_engine {
267 /** @instance: The @drm_xe_engine_class_instance */268 /** @instance: The &struct drm_xe_engine_class_instance */
268 struct drm_xe_engine_class_instance instance;269 struct drm_xe_engine_class_instance instance;
269 270
270 /** @reserved: Reserved */271 /** @reserved: Reserved */
@@ -274,9 +275,9 @@ struct drm_xe_engine { · 3 unmodified lines
274/**275/**
275 * struct drm_xe_query_engines - describe engines276 * struct drm_xe_query_engines - describe engines
276 *277 *
277 * If a query is made with a struct @drm_xe_device_query where .query278 * If a query is made with a &struct drm_xe_device_query where .query
278 * is equal to %DRM_XE_DEVICE_QUERY_ENGINES, then the reply uses an array of279 * is equal to %DRM_XE_DEVICE_QUERY_ENGINES, then the reply uses an array of
279 * struct @drm_xe_query_engines in .data.280 * &struct drm_xe_query_engines in .data.
280 */281 */
281struct drm_xe_query_engines {282struct drm_xe_query_engines {
282 /** @num_engines: number of engines returned in @engines */283 /** @num_engines: number of engines returned in @engines */
@@ -349,7 +350,7 @@ struct drm_xe_mem_region { · 66 unmodified lines
349 * is smaller than @total_size then this is referred to as a350 * is smaller than @total_size then this is referred to as a
350 * small BAR system.351 * small BAR system.
351 *352 *
352 * On systems without small BAR (full BAR), the probed_size will353 * On systems without small BAR (full BAR), the @cpu_visible_size will
353 * always equal the @total_size, since all of it will be CPU354 * always equal the @total_size, since all of it will be CPU
354 * accessible.355 * accessible.
355 *356 *
@@ -410,7 +411,7 @@ struct drm_xe_query_mem_regions { · 54 unmodified lines
410 * device supports the userspace hint %DRM_XE_GEM_CREATE_FLAG_NO_COMPRESSION.411 * device supports the userspace hint %DRM_XE_GEM_CREATE_FLAG_NO_COMPRESSION.
411 * This is exposed only on Xe2+.412 * This is exposed only on Xe2+.
412 * - %DRM_XE_QUERY_CONFIG_FLAG_HAS_DISABLE_STATE_CACHE_PERF_FIX - Flag is set413 * - %DRM_XE_QUERY_CONFIG_FLAG_HAS_DISABLE_STATE_CACHE_PERF_FIX - Flag is set
413 * if a queue can be creaed with414 * if a queue can be created with
414 * %DRM_XE_EXEC_QUEUE_SET_DISABLE_STATE_CACHE_PERF_FIX415 * %DRM_XE_EXEC_QUEUE_SET_DISABLE_STATE_CACHE_PERF_FIX
415 * - %DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT - Minimal memory alignment416 * - %DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT - Minimal memory alignment
416 * required by this device, typically SZ_4K or SZ_64K417 * required by this device, typically SZ_4K or SZ_64K
@@ -705,7 +706,10 @@ struct drm_xe_query_pxp_status { · 288 unmodified lines
705 * attributes.706 * attributes.
706 * - %DRM_XE_DEVICE_QUERY_GT_TOPOLOGY707 * - %DRM_XE_DEVICE_QUERY_GT_TOPOLOGY
707 * - %DRM_XE_DEVICE_QUERY_ENGINE_CYCLES708 * - %DRM_XE_DEVICE_QUERY_ENGINE_CYCLES
709 * - %DRM_XE_DEVICE_QUERY_UC_FW_VERSION
710 * - %DRM_XE_DEVICE_QUERY_OA_UNITS
708 * - %DRM_XE_DEVICE_QUERY_PXP_STATUS711 * - %DRM_XE_DEVICE_QUERY_PXP_STATUS
712 * - %DRM_XE_DEVICE_QUERY_EU_STALL
709 *713 *
710 * If size is set to 0, the driver fills it with the required size for714 * If size is set to 0, the driver fills it with the required size for
711 * the requested type of data to query. If size is equal to the required715 * the requested type of data to query. If size is equal to the required
@@ -825,7 +829,7 @@ struct drm_xe_device_query { · 113 unmodified lines
825 *829 *
826 * This ioctl supports setting the following properties via the830 * This ioctl supports setting the following properties via the
827 * %DRM_XE_GEM_CREATE_EXTENSION_SET_PROPERTY extension, which uses the831 * %DRM_XE_GEM_CREATE_EXTENSION_SET_PROPERTY extension, which uses the
828 * generic @drm_xe_ext_set_property struct:832 * generic &struct drm_xe_ext_set_property:
829 *833 *
830 * - %DRM_XE_GEM_CREATE_SET_PROPERTY_PXP_TYPE - set the type of PXP session834 * - %DRM_XE_GEM_CREATE_SET_PROPERTY_PXP_TYPE - set the type of PXP session
831 * this object will be used with. Valid values are listed in enum835 * this object will be used with. Valid values are listed in enum
@@ -862,8 +866,7 @@ struct drm_xe_gem_create { · 30 unmodified lines
862#define DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM (1 << 2)866#define DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM (1 << 2)
863#define DRM_XE_GEM_CREATE_FLAG_NO_COMPRESSION (1 << 3)867#define DRM_XE_GEM_CREATE_FLAG_NO_COMPRESSION (1 << 3)
864 /**868 /**
865 * @flags: Flags, currently a mask of memory instances of where BO can869 * @flags: Flags for the GEM object, see DRM_XE_GEM_CREATE_FLAG_*
866 * be placed
867 */870 */
868 __u32 flags;871 __u32 flags;
869 872
@@ -888,7 +891,7 @@ struct drm_xe_gem_create { · 18 unmodified lines
888#define DRM_XE_GEM_CPU_CACHING_WC 2891#define DRM_XE_GEM_CPU_CACHING_WC 2
889 /**892 /**
890 * @cpu_caching: The CPU caching mode to select for this object. If893 * @cpu_caching: The CPU caching mode to select for this object. If
891 * mmaping the object the mode selected here will also be used. The894 * mmapping the object the mode selected here will also be used. The
892 * exception is when mapping system memory (including data evicted895 * exception is when mapping system memory (including data evicted
893 * to system) on discrete GPUs. The caching mode selected will896 * to system) on discrete GPUs. The caching mode selected will
894 * then be overridden to DRM_XE_GEM_CPU_CACHING_WB, and coherency897 * then be overridden to DRM_XE_GEM_CPU_CACHING_WB, and coherency
@@ -931,7 +934,7 @@ struct drm_xe_gem_create { · 36 unmodified lines
931 *934 *
932 * err = ioctl(fd, DRM_IOCTL_XE_GEM_MMAP_OFFSET, &mmo);935 * err = ioctl(fd, DRM_IOCTL_XE_GEM_MMAP_OFFSET, &mmo);
933 * map = mmap(NULL, size, PROT_WRITE, MAP_SHARED, fd, mmo.offset);936 * map = mmap(NULL, size, PROT_WRITE, MAP_SHARED, fd, mmo.offset);
934 * map[i] = 0xdeadbeaf; // issue barrier937 * map[i] = 0xdeadbeef; // issue barrier
935 */938 */
936struct drm_xe_gem_mmap_offset {939struct drm_xe_gem_mmap_offset {
937 /** @extensions: Pointer to the first extension struct, if any */940 /** @extensions: Pointer to the first extension struct, if any */
@@ -958,8 +961,8 @@ struct drm_xe_gem_mmap_offset { · 20 unmodified lines
958 * - %DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE - Map the whole virtual address961 * - %DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE - Map the whole virtual address
959 * space of the VM to scratch page. A vm_bind would overwrite the scratch962 * space of the VM to scratch page. A vm_bind would overwrite the scratch
960 * page mapping. This flag is mutually exclusive with the963 * page mapping. This flag is mutually exclusive with the
961 * %DRM_XE_VM_CREATE_FLAG_FAULT_MODE flag, with an exception of on x2 and964 * %DRM_XE_VM_CREATE_FLAG_FAULT_MODE flag, with an exception on Xe2 and
962 * xe3 platform.965 * Xe3 platforms.
963 * - %DRM_XE_VM_CREATE_FLAG_LR_MODE - An LR, or Long Running VM accepts966 * - %DRM_XE_VM_CREATE_FLAG_LR_MODE - An LR, or Long Running VM accepts
964 * exec submissions to its exec_queues that don't have an upper time967 * exec submissions to its exec_queues that don't have an upper time
965 * limit on the job execution time. But exec submissions to these968 * limit on the job execution time. But exec submissions to these
@@ -1045,7 +1048,7 @@ struct drm_xe_vm_destroy { · 79 unmodified lines
1045 * set, no mappings are created rather the range is reserved for CPU address1048 * set, no mappings are created rather the range is reserved for CPU address
1046 * mirroring which will be populated on GPU page faults or prefetches. Only1049 * mirroring which will be populated on GPU page faults or prefetches. Only
1047 * valid on VMs with DRM_XE_VM_CREATE_FLAG_FAULT_MODE set. The CPU address1050 * valid on VMs with DRM_XE_VM_CREATE_FLAG_FAULT_MODE set. The CPU address
1048 * mirror flag are only valid for DRM_XE_VM_BIND_OP_MAP operations, the BO1051 * mirror flag is only valid for DRM_XE_VM_BIND_OP_MAP operations, the BO
1049 * handle MBZ, and the BO offset MBZ.1052 * handle MBZ, and the BO offset MBZ.
1050 * - %DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET - Can be used in combination with1053 * - %DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET - Can be used in combination with
1051 * %DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR to reset madvises when the underlying1054 * %DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR to reset madvises when the underlying
@@ -1061,6 +1064,7 @@ struct drm_xe_vm_destroy { · 9 unmodified lines
1061 * not invoke autoreset. Neither will stack variables going out of scope.1064 * not invoke autoreset. Neither will stack variables going out of scope.
1062 * Therefore it's recommended to always explicitly reset the madvises when1065 * Therefore it's recommended to always explicitly reset the madvises when
1063 * freeing the memory backing a region used in a &DRM_IOCTL_XE_MADVISE call.1066 * freeing the memory backing a region used in a &DRM_IOCTL_XE_MADVISE call.
1067 *
1064 * - %DRM_XE_VM_BIND_FLAG_DECOMPRESS - Request on-device decompression for a MAP.1068 * - %DRM_XE_VM_BIND_FLAG_DECOMPRESS - Request on-device decompression for a MAP.
1065 * When set on a MAP bind operation, request the driver schedule an on-device1069 * When set on a MAP bind operation, request the driver schedule an on-device
1066 * in-place decompression (via the migrate/resolve path) for the GPU mapping1070 * in-place decompression (via the migrate/resolve path) for the GPU mapping
@@ -1109,7 +1113,7 @@ struct drm_xe_vm_bind_op { · 42 unmodified lines
1109 * ppGTT WT -> COH_NONE1113 * ppGTT WT -> COH_NONE
1110 * ppGTT WB -> COH_AT_LEAST_1WAY1114 * ppGTT WB -> COH_AT_LEAST_1WAY
1111 *1115 *
1112 * In practice UC/WC/WT should only ever used for scanout surfaces on1116 * In practice UC/WC/WT should only ever be used for scanout surfaces on
1113 * such platforms (or perhaps in general for dma-buf if shared with1117 * such platforms (or perhaps in general for dma-buf if shared with
1114 * another device) since it is only the display engine that is actually1118 * another device) since it is only the display engine that is actually
1115 * incoherent. Everything else should typically use WB given that we1119 * incoherent. Everything else should typically use WB given that we
@@ -1199,10 +1203,10 @@ struct drm_xe_vm_bind_op { · 83 unmodified lines
1199/**1203/**
1200 * struct drm_xe_vm_bind - Input of &DRM_IOCTL_XE_VM_BIND1204 * struct drm_xe_vm_bind - Input of &DRM_IOCTL_XE_VM_BIND
1201 *1205 *
1202 * Below is an example of a minimal use of @drm_xe_vm_bind to1206 * Below is an example of a minimal use of &struct drm_xe_vm_bind to
1203 * asynchronously bind the buffer `data` at address `BIND_ADDRESS` to1207 * asynchronously bind the buffer `data` at address `BIND_ADDRESS` to
1204 * illustrate `userptr`. It can be synchronized by using the example1208 * illustrate `userptr`. It can be synchronized by using the example
1205 * provided for @drm_xe_sync.1209 * provided for &struct drm_xe_sync.
1206 *1210 *
1207 * .. code-block:: C1211 * .. code-block:: C
1208 *1212 *
@@ -1355,7 +1359,7 @@ struct drm_xe_vm_get_property { · 146 unmodified lines
1355 *1359 *
1356 * This ioctl supports setting the following properties via the1360 * This ioctl supports setting the following properties via the
1357 * %DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY extension, which uses the1361 * %DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY extension, which uses the
1358 * generic @drm_xe_ext_set_property struct:1362 * generic &struct drm_xe_ext_set_property:
1359 *1363 *
1360 * - %DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY - set the queue priority.1364 * - %DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY - set the queue priority.
1361 * CAP_SYS_NICE is required to set a value above normal.1365 * CAP_SYS_NICE is required to set a value above normal.
@@ -1366,7 +1370,7 @@ struct drm_xe_vm_get_property { · 4 unmodified lines
1366 * drm_xe_pxp_session_type. %DRM_XE_PXP_TYPE_NONE is the default behavior, so1370 * drm_xe_pxp_session_type. %DRM_XE_PXP_TYPE_NONE is the default behavior, so
1367 * there is no need to explicitly set that. When a queue of type1371 * there is no need to explicitly set that. When a queue of type
1368 * %DRM_XE_PXP_TYPE_HWDRM is created, the PXP default HWDRM session1372 * %DRM_XE_PXP_TYPE_HWDRM is created, the PXP default HWDRM session
1369 * (%XE_PXP_HWDRM_DEFAULT_SESSION) will be started, if isn't already running.1373 * (%DRM_XE_PXP_HWDRM_DEFAULT_SESSION) will be started, if it isn't already running.
1370 * The user is expected to query the PXP status via the query ioctl (see1374 * The user is expected to query the PXP status via the query ioctl (see
1371 * %DRM_XE_DEVICE_QUERY_PXP_STATUS) and to wait for PXP to be ready before1375 * %DRM_XE_DEVICE_QUERY_PXP_STATUS) and to wait for PXP to be ready before
1372 * attempting to create a queue with this property. When a queue is created1376 * attempting to create a queue with this property. When a queue is created
@@ -1390,9 +1394,9 @@ struct drm_xe_vm_get_property { · 17 unmodified lines
1390 * enable render color cache keying on BTP+BTI instead of just BTI1394 * enable render color cache keying on BTP+BTI instead of just BTI
1391 * (only valid for render queues).1395 * (only valid for render queues).
1392 *1396 *
1393 * The example below shows how to use @drm_xe_exec_queue_create to create1397 * The example below shows how to use &struct drm_xe_exec_queue_create to create
1394 * a simple exec_queue (no parallel submission) of class1398 * a simple exec_queue (no parallel submission) of class
1395 * &DRM_XE_ENGINE_CLASS_RENDER.1399 * %DRM_XE_ENGINE_CLASS_RENDER.
1396 *1400 *
1397 * .. code-block:: C1401 * .. code-block:: C
1398 *1402 *
@@ -1402,23 +1406,25 @@ struct drm_xe_vm_get_property { · 3 unmodified lines
1402 * struct drm_xe_exec_queue_create exec_queue_create = {1406 * struct drm_xe_exec_queue_create exec_queue_create = {
1403 * .extensions = 0,1407 * .extensions = 0,
1404 * .vm_id = vm,1408 * .vm_id = vm,
1405 * .num_bb_per_exec = 1,1409 * .width = 1,
1406 * .num_eng_per_bb = 1,1410 * .num_placements = 1,
1407 * .instances = to_user_pointer(&instance),1411 * .instances = to_user_pointer(&instance),
1408 * };1412 * };
1409 * ioctl(fd, DRM_IOCTL_XE_EXEC_QUEUE_CREATE, &exec_queue_create);1413 * ioctl(fd, DRM_IOCTL_XE_EXEC_QUEUE_CREATE, &exec_queue_create);
1410 *1414 *
1411 * Allow users to provide a hint to kernel for cases demanding low latency1415 * Allow users to provide a hint to kernel for cases demanding low latency
1412 * profile. Please note it will have impact on power consumption. User can1416 * profile. Please note it will have impact on power consumption. User can
1413 * indicate low latency hint with flag while creating exec queue as1417 * indicate low latency hint with flag while creating exec queue as
1414 * mentioned below,1418 * mentioned below:
1419 *
1420 * .. code-block:: C
1415 *1421 *
1416 * struct drm_xe_exec_queue_create exec_queue_create = {1422 * struct drm_xe_exec_queue_create exec_queue_create = {
1417 * .flags = DRM_XE_EXEC_QUEUE_LOW_LATENCY_HINT,1423 * .flags = DRM_XE_EXEC_QUEUE_LOW_LATENCY_HINT,
1418 * .extensions = 0,1424 * .extensions = 0,
1419 * .vm_id = vm,1425 * .vm_id = vm,
1420 * .num_bb_per_exec = 1,1426 * .width = 1,
1421 * .num_eng_per_bb = 1,1427 * .num_placements = 1,
1422 * .instances = to_user_pointer(&instance),1428 * .instances = to_user_pointer(&instance),
1423 * };1429 * };
1424 * ioctl(fd, DRM_IOCTL_XE_EXEC_QUEUE_CREATE, &exec_queue_create);1430 * ioctl(fd, DRM_IOCTL_XE_EXEC_QUEUE_CREATE, &exec_queue_create);
@@ -1515,7 +1521,7 @@ struct drm_xe_exec_queue_get_property { · 90 unmodified lines
1515 * and the @flags can be:1521 * and the @flags can be:
1516 * - %DRM_XE_SYNC_FLAG_SIGNAL1522 * - %DRM_XE_SYNC_FLAG_SIGNAL
1517 *1523 *
1518 * A minimal use of @drm_xe_sync looks like this:1524 * A minimal use of &struct drm_xe_sync looks like this:
1519 *1525 *
1520 * .. code-block:: C1526 * .. code-block:: C
1521 *1527 *
@@ -1546,7 +1552,7 @@ struct drm_xe_sync { · 24 unmodified lines
1546#define DRM_XE_SYNC_TYPE_SYNCOBJ 0x01552#define DRM_XE_SYNC_TYPE_SYNCOBJ 0x0
1547#define DRM_XE_SYNC_TYPE_TIMELINE_SYNCOBJ 0x11553#define DRM_XE_SYNC_TYPE_TIMELINE_SYNCOBJ 0x1
1548#define DRM_XE_SYNC_TYPE_USER_FENCE 0x21554#define DRM_XE_SYNC_TYPE_USER_FENCE 0x2
1549 /** @type: Type of the this sync object */1555 /** @type: Type of this sync object */
1550 __u32 type;1556 __u32 type;
1551 1557
1552#define DRM_XE_SYNC_FLAG_SIGNAL (1 << 0)1558#define DRM_XE_SYNC_FLAG_SIGNAL (1 << 0)
@@ -1559,9 +1565,9 @@ struct drm_xe_sync { · 6 unmodified lines
1559 1565
1560 /**1566 /**
1561 * @addr: Address of user fence. When sync is passed in via exec1567 * @addr: Address of user fence. When sync is passed in via exec
1562 * IOCTL this is a GPU address in the VM. When sync passed in via1568 * IOCTL this is a GPU address in the VM. When sync is passed in via
1563 * VM bind IOCTL this is a user pointer. In either case, it is1569 * VM bind IOCTL this is a user pointer. In either case, it is
1564 * the users responsibility that this address is present and1570 * the user's responsibility that this address is present and
1565 * mapped when the user fence is signalled. Must be qword1571 * mapped when the user fence is signalled. Must be qword
1566 * aligned.1572 * aligned.
1567 */1573 */
@@ -1581,10 +1587,10 @@ struct drm_xe_sync { · 13 unmodified lines
1581/**1587/**
1582 * struct drm_xe_exec - Input of &DRM_IOCTL_XE_EXEC1588 * struct drm_xe_exec - Input of &DRM_IOCTL_XE_EXEC
1583 *1589 *
1584 * This is an example to use @drm_xe_exec for execution of the object1590 * This is an example to use &struct drm_xe_exec for execution of the object
1585 * at BIND_ADDRESS (see example in @drm_xe_vm_bind) by an exec_queue1591 * at BIND_ADDRESS (see example in &struct drm_xe_vm_bind) by an exec_queue
1586 * (see example in @drm_xe_exec_queue_create). It can be synchronized1592 * (see example in &struct drm_xe_exec_queue_create). It can be synchronized
1587 * by using the example provided for @drm_xe_sync.1593 * by using the example provided for &struct drm_xe_sync.
1588 *1594 *
1589 * .. code-block:: C1595 * .. code-block:: C
1590 *1596 *
@@ -1651,7 +1657,6 @@ struct drm_xe_exec { · 60 unmodified lines
1651 *1657 *
1652 * and the @flags can be:1658 * and the @flags can be:
1653 * - %DRM_XE_UFENCE_WAIT_FLAG_ABSTIME1659 * - %DRM_XE_UFENCE_WAIT_FLAG_ABSTIME
1654 * - %DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP
1655 *1660 *
1656 * The @mask values can be for example:1661 * The @mask values can be for example:
1657 * - 0xffu for u81662 * - 0xffu for u8
@@ -1664,7 +1669,7 @@ struct drm_xe_wait_user_fence { · 6 unmodified lines
1664 __u64 extensions;1669 __u64 extensions;
1665 1670
1666 /**1671 /**
1667 * @addr: user pointer address to wait on, must qword aligned1672 * @addr: user pointer address to wait on, must be qword aligned
1668 */1673 */
1669 __u64 addr;1674 __u64 addr;
1670 1675
@@ -1695,9 +1700,9 @@ struct drm_xe_wait_user_fence { · 24 unmodified lines
1695 * Without DRM_XE_UFENCE_WAIT_FLAG_ABSTIME flag set (relative timeout)1700 * Without DRM_XE_UFENCE_WAIT_FLAG_ABSTIME flag set (relative timeout)
1696 * it contains timeout expressed in nanoseconds to wait (fence will1701 * it contains timeout expressed in nanoseconds to wait (fence will
1697 * expire at now() + timeout).1702 * expire at now() + timeout).
1698 * When DRM_XE_UFENCE_WAIT_FLAG_ABSTIME flat is set (absolute timeout) wait1703 * When DRM_XE_UFENCE_WAIT_FLAG_ABSTIME flag is set (absolute timeout) wait
1699 * will end at timeout (uses system MONOTONIC_CLOCK).1704 * will end at timeout (uses system CLOCK_MONOTONIC).
1700 * Passing negative timeout leads to neverending wait.1705 * Passing negative timeout leads to never ending wait.
1701 *1706 *
1702 * On relative timeout this value is updated with timeout left1707 * On relative timeout this value is updated with timeout left
1703 * (for restarting the call in case of signal delivery).1708 * (for restarting the call in case of signal delivery).
@@ -1741,7 +1746,7 @@ enum drm_xe_observation_op { · 37 unmodified lines
1741};1746};
1742 1747
1743/**1748/**
1744 * struct drm_xe_observation_param - Input of &DRM_XE_OBSERVATION1749 * struct drm_xe_observation_param - Input of &DRM_IOCTL_XE_OBSERVATION
1745 *1750 *
1746 * The observation layer enables multiplexing observation streams of1751 * The observation layer enables multiplexing observation streams of
1747 * multiple types. The actual params for a particular stream operation are1752 * multiple types. The actual params for a particular stream operation are
@@ -1751,25 +1756,25 @@ enum drm_xe_observation_op { · 3 unmodified lines
1751struct drm_xe_observation_param {1756struct drm_xe_observation_param {
1752 /** @extensions: Pointer to the first extension struct, if any */1757 /** @extensions: Pointer to the first extension struct, if any */
1753 __u64 extensions;1758 __u64 extensions;
1754 /** @observation_type: observation stream type, of enum @drm_xe_observation_type */1759 /** @observation_type: observation stream type, of &enum drm_xe_observation_type */
1755 __u64 observation_type;1760 __u64 observation_type;
1756 /** @observation_op: observation stream op, of enum @drm_xe_observation_op */1761 /** @observation_op: observation stream op, of &enum drm_xe_observation_op */
1757 __u64 observation_op;1762 __u64 observation_op;
1758 /** @param: Pointer to actual stream params */1763 /** @param: Pointer to actual stream params */
1759 __u64 param;1764 __u64 param;
1760};1765};
1761 1766
1762/**1767/**
1763 * enum drm_xe_observation_ioctls - Observation stream fd ioctl's1768 * enum drm_xe_observation_ioctls - Observation stream fd ioctls
1764 *1769 *
1765 * Information exchanged between userspace and kernel for observation fd1770 * Information exchanged between userspace and kernel for observation fd
1766 * ioctl's is stream type specific1771 * ioctls is stream type specific
1767 */1772 */
1768enum drm_xe_observation_ioctls {1773enum drm_xe_observation_ioctls {
1769 /** @DRM_XE_OBSERVATION_IOCTL_ENABLE: Enable data capture for an observation stream */1774 /** @DRM_XE_OBSERVATION_IOCTL_ENABLE: Enable data capture for an observation stream */
1770 DRM_XE_OBSERVATION_IOCTL_ENABLE = _IO('i', 0x0),1775 DRM_XE_OBSERVATION_IOCTL_ENABLE = _IO('i', 0x0),
1771 1776
1772 /** @DRM_XE_OBSERVATION_IOCTL_DISABLE: Disable data capture for a observation stream */1777 /** @DRM_XE_OBSERVATION_IOCTL_DISABLE: Disable data capture for an observation stream */
1773 DRM_XE_OBSERVATION_IOCTL_DISABLE = _IO('i', 0x1),1778 DRM_XE_OBSERVATION_IOCTL_DISABLE = _IO('i', 0x1),
1774 1779
1775 /** @DRM_XE_OBSERVATION_IOCTL_CONFIG: Change observation stream configuration */1780 /** @DRM_XE_OBSERVATION_IOCTL_CONFIG: Change observation stream configuration */
@@ -1812,7 +1817,7 @@ struct drm_xe_oa_unit { · 36 unmodified lines
1812 /** @oa_unit_id: OA unit ID */1817 /** @oa_unit_id: OA unit ID */
1813 __u32 oa_unit_id;1818 __u32 oa_unit_id;
1814 1819
1815 /** @oa_unit_type: OA unit type of @drm_xe_oa_unit_type */1820 /** @oa_unit_type: OA unit type of &enum drm_xe_oa_unit_type */
1816 __u32 oa_unit_type;1821 __u32 oa_unit_type;
1817 1822
1818 /** @capabilities: OA capabilities bit-mask */1823 /** @capabilities: OA capabilities bit-mask */
@@ -1875,7 +1880,7 @@ struct drm_xe_query_oa_units { · 56 unmodified lines
1875 /** @pad: MBZ */1880 /** @pad: MBZ */
1876 __u32 pad;1881 __u32 pad;
1877 /**1882 /**
1878 * @oa_units: struct @drm_xe_oa_unit array returned for this device.1883 * @oa_units: &struct drm_xe_oa_unit array returned for this device.
1879 * Written below as a u64 array to avoid problems with nested flexible1884 * Written below as a u64 array to avoid problems with nested flexible
1880 * arrays with some compilers1885 * arrays with some compilers
1881 */1886 */
@@ -1902,24 +1907,24 @@ enum drm_xe_oa_format_type { · 20 unmodified lines
1902};1907};
1903 1908
1904/**1909/**
1905 * enum drm_xe_oa_property_id - OA stream property id's1910 * enum drm_xe_oa_property_id - OA stream property IDs
1906 *1911 *
1907 * Stream params are specified as a chain of @drm_xe_ext_set_property1912 * Stream params are specified as a chain of &struct drm_xe_ext_set_property
1908 * struct's, with @property values from enum @drm_xe_oa_property_id and1913 * structs, with property values from &enum drm_xe_oa_property_id and
1909 * @drm_xe_user_extension base.name set to @DRM_XE_OA_EXTENSION_SET_PROPERTY.1914 * &struct drm_xe_user_extension base.name set to %DRM_XE_OA_EXTENSION_SET_PROPERTY.
1910 * @param field in struct @drm_xe_observation_param points to the first1915 * The param field in &struct drm_xe_observation_param points to the first
1911 * @drm_xe_ext_set_property struct.1916 * &struct drm_xe_ext_set_property struct.
1912 *1917 *
1913 * Exactly the same mechanism is also used for stream reconfiguration using the1918 * Exactly the same mechanism is also used for stream reconfiguration using the
1914 * @DRM_XE_OBSERVATION_IOCTL_CONFIG observation stream fd ioctl, though only a1919 * %DRM_XE_OBSERVATION_IOCTL_CONFIG observation stream fd ioctl, though only a
1915 * subset of properties below can be specified for stream reconfiguration.1920 * subset of properties below can be specified for stream reconfiguration.
1916 */1921 */
1917enum drm_xe_oa_property_id {1922enum drm_xe_oa_property_id {
1918#define DRM_XE_OA_EXTENSION_SET_PROPERTY 01923#define DRM_XE_OA_EXTENSION_SET_PROPERTY 0
1919 /**1924 /**
1920 * @DRM_XE_OA_PROPERTY_OA_UNIT_ID: ID of the OA unit on which to open1925 * @DRM_XE_OA_PROPERTY_OA_UNIT_ID: ID of the OA unit on which to open
1921 * the OA stream, see @oa_unit_id in 'struct1926 * the OA stream, see oa_unit_id in &struct drm_xe_oa_unit.
1922 * drm_xe_query_oa_units'. Defaults to 0 if not provided.1927 * Defaults to 0 if not provided.
1923 */1928 */
1924 DRM_XE_OA_PROPERTY_OA_UNIT_ID = 1,1929 DRM_XE_OA_PROPERTY_OA_UNIT_ID = 1,
1925 1930
@@ -1932,7 +1937,7 @@ enum drm_xe_oa_property_id { · 6 unmodified lines
1932 1937
1933 /**1938 /**
1934 * @DRM_XE_OA_PROPERTY_OA_METRIC_SET: OA metrics defining contents of OA1939 * @DRM_XE_OA_PROPERTY_OA_METRIC_SET: OA metrics defining contents of OA
1935 * reports, previously added via @DRM_XE_OBSERVATION_OP_ADD_CONFIG.1940 * reports, previously added via %DRM_XE_OBSERVATION_OP_ADD_CONFIG.
1936 */1941 */
1937 DRM_XE_OA_PROPERTY_OA_METRIC_SET,1942 DRM_XE_OA_PROPERTY_OA_METRIC_SET,
1938 1943
@@ -1940,7 +1945,7 @@ enum drm_xe_oa_property_id { · 1 unmodified line
1940 DRM_XE_OA_PROPERTY_OA_FORMAT,1945 DRM_XE_OA_PROPERTY_OA_FORMAT,
1941 /*1946 /*
1942 * OA_FORMAT's are specified the same way as in PRM/Bspec 52198/60942,1947 * OA_FORMAT's are specified the same way as in PRM/Bspec 52198/60942,
1943 * in terms of the following quantities: a. enum @drm_xe_oa_format_type1948 * in terms of the following quantities: a. &enum drm_xe_oa_format_type
1944 * b. Counter select c. Counter size and d. BC report. Also refer to the1949 * b. Counter select c. Counter size and d. BC report. Also refer to the
1945 * oa_formats array in drivers/gpu/drm/xe/xe_oa.c.1950 * oa_formats array in drivers/gpu/drm/xe/xe_oa.c.
1946 */1951 */
@@ -1957,19 +1962,19 @@ enum drm_xe_oa_property_id { · 10 unmodified lines
1957 1962
1958 /**1963 /**
1959 * @DRM_XE_OA_PROPERTY_OA_DISABLED: A value of 1 will open the OA1964 * @DRM_XE_OA_PROPERTY_OA_DISABLED: A value of 1 will open the OA
1960 * stream in a DISABLED state (see @DRM_XE_OBSERVATION_IOCTL_ENABLE).1965 * stream in a DISABLED state (see %DRM_XE_OBSERVATION_IOCTL_ENABLE).
1961 */1966 */
1962 DRM_XE_OA_PROPERTY_OA_DISABLED,1967 DRM_XE_OA_PROPERTY_OA_DISABLED,
1963 1968
1964 /**1969 /**
1965 * @DRM_XE_OA_PROPERTY_EXEC_QUEUE_ID: Open the stream for a specific1970 * @DRM_XE_OA_PROPERTY_EXEC_QUEUE_ID: Open the stream for a specific
1966 * @exec_queue_id. OA queries can be executed on this exec queue.1971 * exec_queue_id. OA queries can be executed on this exec queue.
1967 */1972 */
1968 DRM_XE_OA_PROPERTY_EXEC_QUEUE_ID,1973 DRM_XE_OA_PROPERTY_EXEC_QUEUE_ID,
1969 1974
1970 /**1975 /**
1971 * @DRM_XE_OA_PROPERTY_OA_ENGINE_INSTANCE: Optional engine instance to1976 * @DRM_XE_OA_PROPERTY_OA_ENGINE_INSTANCE: Optional engine instance to
1972 * pass along with @DRM_XE_OA_PROPERTY_EXEC_QUEUE_ID or will default to 0.1977 * pass along with %DRM_XE_OA_PROPERTY_EXEC_QUEUE_ID or will default to 0.
1973 */1978 */
1974 DRM_XE_OA_PROPERTY_OA_ENGINE_INSTANCE,1979 DRM_XE_OA_PROPERTY_OA_ENGINE_INSTANCE,
1975 1980
@@ -1981,16 +1986,16 @@ enum drm_xe_oa_property_id { · 5 unmodified lines
1981 1986
1982 /**1987 /**
1983 * @DRM_XE_OA_PROPERTY_NUM_SYNCS: Number of syncs in the sync array1988 * @DRM_XE_OA_PROPERTY_NUM_SYNCS: Number of syncs in the sync array
1984 * specified in @DRM_XE_OA_PROPERTY_SYNCS1989 * specified in %DRM_XE_OA_PROPERTY_SYNCS
1985 */1990 */
1986 DRM_XE_OA_PROPERTY_NUM_SYNCS,1991 DRM_XE_OA_PROPERTY_NUM_SYNCS,
1987 1992
1988 /**1993 /**
1989 * @DRM_XE_OA_PROPERTY_SYNCS: Pointer to struct @drm_xe_sync array1994 * @DRM_XE_OA_PROPERTY_SYNCS: Pointer to &struct drm_xe_sync array
1990 * with array size specified via @DRM_XE_OA_PROPERTY_NUM_SYNCS. OA1995 * with array size specified via %DRM_XE_OA_PROPERTY_NUM_SYNCS. OA
1991 * configuration will wait till input fences signal. Output fences1996 * configuration will wait till input fences signal. Output fences
1992 * will signal after the new OA configuration takes effect. For1997 * will signal after the new OA configuration takes effect. For
1993 * @DRM_XE_SYNC_TYPE_USER_FENCE, @addr is a user pointer, similar1998 * %DRM_XE_SYNC_TYPE_USER_FENCE, addr is a user pointer, similar
1994 * to the VM bind case.1999 * to the VM bind case.
1995 */2000 */
1996 DRM_XE_OA_PROPERTY_SYNCS,2001 DRM_XE_OA_PROPERTY_SYNCS,
@@ -2013,15 +2018,15 @@ enum drm_xe_oa_property_id { · 16 unmodified lines
2013/**2018/**
2014 * struct drm_xe_oa_config - OA metric configuration2019 * struct drm_xe_oa_config - OA metric configuration
2015 *2020 *
2016 * Multiple OA configs can be added using @DRM_XE_OBSERVATION_OP_ADD_CONFIG. A2021 * Multiple OA configs can be added using %DRM_XE_OBSERVATION_OP_ADD_CONFIG. A
2017 * particular config can be specified when opening an OA stream using2022 * particular config can be specified when opening an OA stream using
2018 * @DRM_XE_OA_PROPERTY_OA_METRIC_SET property.2023 * %DRM_XE_OA_PROPERTY_OA_METRIC_SET property.
2019 */2024 */
2020struct drm_xe_oa_config {2025struct drm_xe_oa_config {
2021 /** @extensions: Pointer to the first extension struct, if any */2026 /** @extensions: Pointer to the first extension struct, if any */
2022 __u64 extensions;2027 __u64 extensions;
2023 2028
2024 /** @uuid: String formatted like "%\08x-%\04x-%\04x-%\04x-%\012x" */2029 /** @uuid: String formatted like "%08x-%04x-%04x-%04x-%012x" */
2025 char uuid[36];2030 char uuid[36];
2026 2031
2027 /** @n_regs: Number of regs in @regs_ptr */2032 /** @n_regs: Number of regs in @regs_ptr */
@@ -2036,7 +2041,7 @@ struct drm_xe_oa_config { · 8 unmodified lines
2036 2041
2037/**2042/**
2038 * struct drm_xe_oa_stream_status - OA stream status returned from2043 * struct drm_xe_oa_stream_status - OA stream status returned from
2039 * @DRM_XE_OBSERVATION_IOCTL_STATUS observation stream fd ioctl. Userspace can2044 * %DRM_XE_OBSERVATION_IOCTL_STATUS observation stream fd ioctl. Userspace can
2040 * call the ioctl to query stream status in response to EIO errno from2045 * call the ioctl to query stream status in response to EIO errno from
2041 * observation fd read().2046 * observation fd read().
2042 */2047 */
@@ -2057,7 +2062,7 @@ struct drm_xe_oa_stream_status { · 14 unmodified lines
2057 2062
2058/**2063/**
2059 * struct drm_xe_oa_stream_info - OA stream info returned from2064 * struct drm_xe_oa_stream_info - OA stream info returned from
2060 * @DRM_XE_OBSERVATION_IOCTL_INFO observation stream fd ioctl2065 * %DRM_XE_OBSERVATION_IOCTL_INFO observation stream fd ioctl
2061 */2066 */
2062struct drm_xe_oa_stream_info {2067struct drm_xe_oa_stream_info {
2063 /** @extensions: Pointer to the first extension struct, if any */2068 /** @extensions: Pointer to the first extension struct, if any */
@@ -2094,27 +2099,27 @@ enum drm_xe_pxp_session_type { · 30 unmodified lines
2094 * enum drm_xe_eu_stall_property_id - EU stall sampling input property ids.2099 * enum drm_xe_eu_stall_property_id - EU stall sampling input property ids.
2095 *2100 *
2096 * These properties are passed to the driver at open as a chain of2101 * These properties are passed to the driver at open as a chain of
2097 * @drm_xe_ext_set_property structures with @property set to these2102 * &struct drm_xe_ext_set_property structures with property set to these
2098 * properties' enums and @value set to the corresponding values of these2103 * properties' enums and value set to the corresponding values of these
2099 * properties. @drm_xe_user_extension base.name should be set to2104 * properties. &struct drm_xe_user_extension base.name should be set to
2100 * @DRM_XE_EU_STALL_EXTENSION_SET_PROPERTY.2105 * %DRM_XE_EU_STALL_EXTENSION_SET_PROPERTY.
2101 *2106 *
2102 * With the file descriptor obtained from open, user space must enable2107 * With the file descriptor obtained from open, user space must enable
2103 * the EU stall stream fd with @DRM_XE_OBSERVATION_IOCTL_ENABLE before2108 * the EU stall stream fd with %DRM_XE_OBSERVATION_IOCTL_ENABLE before
2104 * calling read(). EIO errno from read() indicates HW dropped data2109 * calling read(). EIO errno from read() indicates HW dropped data
2105 * due to full buffer.2110 * due to full buffer.
2106 */2111 */
2107enum drm_xe_eu_stall_property_id {2112enum drm_xe_eu_stall_property_id {
2108#define DRM_XE_EU_STALL_EXTENSION_SET_PROPERTY 02113#define DRM_XE_EU_STALL_EXTENSION_SET_PROPERTY 0
2109 /**2114 /**
2110 * @DRM_XE_EU_STALL_PROP_GT_ID: @gt_id of the GT on which2115 * @DRM_XE_EU_STALL_PROP_GT_ID: gt_id of the GT on which
2111 * EU stall data will be captured.2116 * EU stall data will be captured.
2112 */2117 */
2113 DRM_XE_EU_STALL_PROP_GT_ID = 1,2118 DRM_XE_EU_STALL_PROP_GT_ID = 1,
2114 2119
2115 /**2120 /**
2116 * @DRM_XE_EU_STALL_PROP_SAMPLE_RATE: Sampling rate in2121 * @DRM_XE_EU_STALL_PROP_SAMPLE_RATE: Sampling rate in
2117 * GPU cycles from @sampling_rates in struct @drm_xe_query_eu_stall2122 * GPU cycles from sampling_rates in &struct drm_xe_query_eu_stall
2118 */2123 */
2119 DRM_XE_EU_STALL_PROP_SAMPLE_RATE,2124 DRM_XE_EU_STALL_PROP_SAMPLE_RATE,
2120 2125
@@ -2129,9 +2134,9 @@ enum drm_xe_eu_stall_property_id { · 8 unmodified lines
2129/**2134/**
2130 * struct drm_xe_query_eu_stall - Information about EU stall sampling.2135 * struct drm_xe_query_eu_stall - Information about EU stall sampling.
2131 *2136 *
2132 * If a query is made with a struct @drm_xe_device_query where .query2137 * If a query is made with a &struct drm_xe_device_query where .query
2133 * is equal to @DRM_XE_DEVICE_QUERY_EU_STALL, then the reply uses2138 * is equal to %DRM_XE_DEVICE_QUERY_EU_STALL, then the reply uses
2134 * struct @drm_xe_query_eu_stall in .data.2139 * &struct drm_xe_query_eu_stall in .data.
2135 */2140 */
2136struct drm_xe_query_eu_stall {2141struct drm_xe_query_eu_stall {
2137 /** @extensions: Pointer to the first extension struct, if any */2142 /** @extensions: Pointer to the first extension struct, if any */
@@ -2183,7 +2188,7 @@ struct drm_xe_query_eu_stall { · 45 unmodified lines
2183 * .start = 0x100000,2188 * .start = 0x100000,
2184 * .range = 0x2000,2189 * .range = 0x2000,
2185 * .type = DRM_XE_MEM_RANGE_ATTR_ATOMIC,2190 * .type = DRM_XE_MEM_RANGE_ATTR_ATOMIC,
2186 * .atomic_val = DRM_XE_ATOMIC_DEVICE,2191 * .atomic.val = DRM_XE_ATOMIC_DEVICE,
2187 * };2192 * };
2188 *2193 *
2189 * ioctl(fd, DRM_IOCTL_XE_MADVISE, &madvise);2194 * ioctl(fd, DRM_IOCTL_XE_MADVISE, &madvise);
@@ -2242,7 +2247,7 @@ struct drm_xe_madvise { · 52 unmodified lines
2242 2247
2243 /**2248 /**
2244 * @preferred_mem_loc.region_instance : Region instance.2249 * @preferred_mem_loc.region_instance : Region instance.
2245 * MBZ if @devmem_fd <= &DRM_XE_PREFERRED_LOC_DEFAULT_DEVICE.2250 * MBZ if @devmem_fd <= %DRM_XE_PREFERRED_LOC_DEFAULT_DEVICE.
2246 * Otherwise should point to the desired device2251 * Otherwise should point to the desired device
2247 * VRAM instance of the device indicated by2252 * VRAM instance of the device indicated by
2248 * @preferred_mem_loc.devmem_fd.2253 * @preferred_mem_loc.devmem_fd.
@@ -2369,24 +2374,19 @@ struct drm_xe_madvise { · 120 unmodified lines
2369};2374};
2370 2375
2371/**2376/**
2372 * struct drm_xe_mem_range_attr - Output of &DRM_IOCTL_XE_VM_QUERY_MEM_RANGES_ATTRS2377 * struct drm_xe_mem_range_attr - Output of &DRM_IOCTL_XE_VM_QUERY_MEM_RANGE_ATTRS
2373 *2378 *
2374 * This structure is provided by userspace and filled by KMD in response to the2379 * This structure is provided by userspace and filled by KMD in response to the
2375 * DRM_IOCTL_XE_VM_QUERY_MEM_RANGES_ATTRS ioctl. It describes memory attributes of2380 * DRM_IOCTL_XE_VM_QUERY_MEM_RANGE_ATTRS ioctl. It describes memory attributes of
2376 * a memory ranges within a user specified address range in a VM.2381 * memory ranges within a user specified address range in a VM.
2377 *2382 *
2378 * The structure includes information such as atomic access policy,2383 * The structure includes information such as atomic access policy,
2379 * page attribute table (PAT) index, and preferred memory location.2384 * page attribute table (PAT) index, and preferred memory location.
2380 * Userspace allocates an array of these structures and passes a pointer to the2385 * Userspace allocates an array of these structures and passes a pointer to the
2381 * ioctl to retrieve attributes for each memory ranges2386 * ioctl to retrieve attributes for each memory range.
2382 *
2383 * @extensions: Pointer to the first extension struct, if any
2384 * @start: Start address of the memory range
2385 * @end: End address of the virtual memory range
2386 *
2387 */2387 */
2388struct drm_xe_mem_range_attr {2388struct drm_xe_mem_range_attr {
2389 /** @extensions: Pointer to the first extension struct, if any */2389 /** @extensions: Pointer to the first extension struct, if any */
2390 __u64 extensions;2390 __u64 extensions;
2391 2391
2392 /** @start: start of the memory range */2392 /** @start: start of the memory range */
@@ -2413,7 +2413,7 @@ struct drm_xe_mem_range_attr { · 20 unmodified lines
2413 __u32 reserved;2413 __u32 reserved;
2414 } atomic;2414 } atomic;
2415 2415
2416 /** @pat_index: Page attribute table index */2416 /** @pat_index: Page attribute table index */
2417 struct {2417 struct {
2418 /** @pat_index.val: PAT index */2418 /** @pat_index.val: PAT index */
2419 __u32 val;2419 __u32 val;
@@ -2427,7 +2427,7 @@ struct drm_xe_mem_range_attr { · 7 unmodified lines
2427};2427};
2428 2428
2429/**2429/**
2430 * struct drm_xe_vm_query_mem_range_attr - Input of &DRM_IOCTL_XE_VM_QUERY_MEM_ATTRIBUTES2430 * struct drm_xe_vm_query_mem_range_attr - Input of &DRM_IOCTL_XE_VM_QUERY_MEM_RANGE_ATTRS
2431 *2431 *
2432 * This structure is used to query memory attributes of memory regions2432 * This structure is used to query memory attributes of memory regions
2433 * within a user specified address range in a VM. It provides detailed2433 * within a user specified address range in a VM. It provides detailed
@@ -2435,15 +2435,15 @@ struct drm_xe_mem_range_attr { · 1 unmodified line
2435 * page attribute table (PAT) index, and preferred memory location.2435 * page attribute table (PAT) index, and preferred memory location.
2436 *2436 *
2437 * Userspace first calls the ioctl with @num_mem_ranges = 0,2437 * Userspace first calls the ioctl with @num_mem_ranges = 0,
2438 * @sizeof_mem_ranges_attr = 0 and @vector_of_vma_mem_attr = NULL to retrieve2438 * @sizeof_mem_range_attr = 0 and @vector_of_mem_attr = NULL to retrieve
2439 * the number of memory regions and size of each memory range attribute.2439 * the number of memory regions and size of each memory range attribute.
2440 * Then, it allocates a buffer of that size and calls the ioctl again to fill2440 * Then, it allocates a buffer of that size and calls the ioctl again to fill
2441 * the buffer with memory range attributes.2441 * the buffer with memory range attributes.
2442 *2442 *
2443 * If second call fails with -ENOSPC, it means memory ranges changed between2443 * If second call fails with -ENOSPC, it means memory ranges changed between
2444 * first call and now, retry IOCTL again with @num_mem_ranges = 0,2444 * first call and now, retry IOCTL again with @num_mem_ranges = 0,
2445 * @sizeof_mem_ranges_attr = 0 and @vector_of_vma_mem_attr = NULL followed by2445 * @sizeof_mem_range_attr = 0 and @vector_of_mem_attr = NULL followed by
2446 * Second ioctl call.2446 * second ioctl call.
2447 *2447 *
2448 * Example:2448 * Example:
2449 *2449 *
include/uapi/linux/kfd_ioctl.h+36−2
@@ -48,9 +48,10 @@ · 47 unmodified lines
48 * - 1.20 - Trap handler support for expert scheduling mode available48 * - 1.20 - Trap handler support for expert scheduling mode available
49 * - 1.21 - Debugger support to subscribe to LDS out-of-address exceptions49 * - 1.21 - Debugger support to subscribe to LDS out-of-address exceptions
50 * - 1.22 - Add queue creation with metadata ring base address50 * - 1.22 - Add queue creation with metadata ring base address
51 * - 1.23 - Add profiler control ioctl to enable/disable profiler on a process
51 */52 */
52#define KFD_IOCTL_MAJOR_VERSION 153#define KFD_IOCTL_MAJOR_VERSION 1
53#define KFD_IOCTL_MINOR_VERSION 2254#define KFD_IOCTL_MINOR_VERSION 23
54 55
55struct kfd_ioctl_get_version_args {56struct kfd_ioctl_get_version_args {
56 __u32 major_version; /* from KFD */57 __u32 major_version; /* from KFD */
@@ -1558,6 +1559,36 @@ struct kfd_ioctl_dbg_trap_args { · 1501 unmodified lines
1558 };1559 };
1559};1560};
1560 1561
1562#define KFD_IOC_PROFILER_VERSION_NUM 1
1563enum kfd_profiler_ops {
1564 KFD_IOC_PROFILER_PMC = 0,
1565 KFD_IOC_PROFILER_VERSION = 2,
1566 KFD_IOC_PROFILER_PTL_CONTROL = 3,
1567};
1568
1569/**
1570 * Enables/Disables GPU Specific profiler settings
1571 */
1572struct kfd_ioctl_pmc_settings {
1573 __u32 gpu_id; /* This is the user_gpu_id */
1574 __u32 lock; /* Lock GPU for Profiling */
1575 __u32 perfcount_enable; /* Force Perfcount Enable for queues on GPU */
1576};
1577
1578struct kfd_ioctl_ptl_control {
1579 __u32 gpu_id; /* user_gpu_id */
1580 __u32 enable; /* set 1 to enable PTL, set 0 to disable PTL */
1581};
1582
1583struct kfd_ioctl_profiler_args {
1584 __u32 op; /* kfd_profiler_op */
1585 union {
1586 struct kfd_ioctl_pmc_settings pmc;
1587 struct kfd_ioctl_ptl_control ptl;
1588 __u32 version; /* KFD_IOC_PROFILER_VERSION_NUM */
1589 };
1590};
1591
1561#define AMDKFD_IOCTL_BASE 'K'1592#define AMDKFD_IOCTL_BASE 'K'
1562#define AMDKFD_IO(nr) _IO(AMDKFD_IOCTL_BASE, nr)1593#define AMDKFD_IO(nr) _IO(AMDKFD_IOCTL_BASE, nr)
1563#define AMDKFD_IOR(nr, type) _IOR(AMDKFD_IOCTL_BASE, nr, type)1594#define AMDKFD_IOR(nr, type) _IOR(AMDKFD_IOCTL_BASE, nr, type)
@@ -1681,7 +1712,10 @@ struct kfd_ioctl_dbg_trap_args { · 117 unmodified lines
1681#define AMDKFD_IOC_CREATE_PROCESS \1712#define AMDKFD_IOC_CREATE_PROCESS \
1682 AMDKFD_IO(0x27)1713 AMDKFD_IO(0x27)
1683 1714
1715#define AMDKFD_IOC_PROFILER \
1716 AMDKFD_IOWR(0x28, struct kfd_ioctl_profiler_args)
1717
1684#define AMDKFD_COMMAND_START 0x011718#define AMDKFD_COMMAND_START 0x01
1685#define AMDKFD_COMMAND_END 0x281719#define AMDKFD_COMMAND_END 0x29
1686 1720
1687#endif1721#endif
include/uapi/linux/virtio_gpu.h+9−0
@@ -64,6 +64,14 @@ · 63 unmodified lines
64 * context_init and multiple timelines64 * context_init and multiple timelines
65 */65 */
66#define VIRTIO_GPU_F_CONTEXT_INIT 466#define VIRTIO_GPU_F_CONTEXT_INIT 4
67/*
68 * The device provides a valid blob_alignment
69 * field in its configuration and both
70 * VIRTIO_GPU_CMD_RESOURCE_CREATE_BLOB and
71 * VIRTIO_GPU_CMD_RESOURCE_MAP_BLOB requests
72 * must be aligned to that value.
73 */
74#define VIRTIO_GPU_F_BLOB_ALIGNMENT 5
67 75
68enum virtio_gpu_ctrl_type {76enum virtio_gpu_ctrl_type {
69 VIRTIO_GPU_UNDEFINED = 0,77 VIRTIO_GPU_UNDEFINED = 0,
@@ -365,6 +373,7 @@ struct virtio_gpu_config { · 295 unmodified lines
365 __le32 events_clear;373 __le32 events_clear;
366 __le32 num_scanouts;374 __le32 num_scanouts;
367 __le32 num_capsets;375 __le32 num_capsets;
376 __le32 blob_alignment;
368};377};
369 378
370/* simple formats for fbcon/X use */379/* simple formats for fbcon/X use */