ioremap has provided non-cached semantics by default since the Linux 2.6 days, so remove the additional ioremap_nocache interface.
Unified · Split
| @@ -313,7 +313,6 @@ IOMAP · 312 unmodified lines | ||
| 313 | 313 | devm_ioport_map() |
| 314 | 314 | devm_ioport_unmap() |
| 315 | 315 | devm_ioremap() |
| 316 | − devm_ioremap_nocache() | |
| 317 | 316 | devm_ioremap_uc() |
| 318 | 317 | devm_ioremap_wc() |
| 319 | 318 | devm_ioremap_resource() : checks resource, requests memory region, ioremaps |
| @@ -1058,7 +1058,7 @@ and the allocation would be like below: · 1057 unmodified lines | ||
| 1058 | 1058 | return err; |
| 1059 | 1059 | } |
| 1060 | 1060 | chip->iobase_phys = pci_resource_start(pci, 0); |
| 1061 | − chip->iobase_virt = ioremap_nocache(chip->iobase_phys, | |
| 1061 | + chip->iobase_virt = ioremap(chip->iobase_phys, | |
| 1062 | 1062 | pci_resource_len(pci, 0)); |
| 1063 | 1063 | |
| 1064 | 1064 | and the corresponding destructor would be: |
| @@ -44,8 +44,6 @@ address range to avoid any aliasing. · 43 unmodified lines | ||
| 44 | 44 | +------------------------+----------+--------------+------------------+ |
| 45 | 45 | | ioremap_uc | -- | UC | UC | |
| 46 | 46 | +------------------------+----------+--------------+------------------+ |
| 47 | −| ioremap_nocache | -- | UC- | UC- | | |
| 48 | −+------------------------+----------+--------------+------------------+ | |
| 49 | 47 | | ioremap_wc | -- | -- | WC | |
| 50 | 48 | +------------------------+----------+--------------+------------------+ |
| 51 | 49 | | ioremap_wt | -- | -- | WT | |
| @@ -283,14 +283,8 @@ static inline void __iomem *ioremap(unsigned long port, unsigned long size) · 282 unmodified lines | ||
| 283 | 283 | return IO_CONCAT(__IO_PREFIX,ioremap) (port, size); |
| 284 | 284 | } |
| 285 | 285 | |
| 286 | −static inline void __iomem * ioremap_nocache(unsigned long offset, | |
| 287 | − unsigned long size) | |
| 288 | −{ | |
| 289 | − return ioremap(offset, size); | |
| 290 | −} | |
| 291 | − | |
| 292 | −#define ioremap_wc ioremap_nocache | |
| 293 | −#define ioremap_uc ioremap_nocache | |
| 286 | +#define ioremap_wc ioremap | |
| 287 | +#define ioremap_uc ioremap | |
| 294 | 288 | |
| 295 | 289 | static inline void iounmap(volatile void __iomem *addr) |
| 296 | 290 | { |
| @@ -356,7 +356,6 @@ static inline void memcpy_toio(volatile void __iomem *to, const void *from, · 355 unmodified lines | ||
| 356 | 356 | * |
| 357 | 357 | * Function Memory type Cacheability Cache hint |
| 358 | 358 | * ioremap() Device n/a n/a |
| 359 | − * ioremap_nocache() Device n/a n/a | |
| 360 | 359 | * ioremap_cache() Normal Writeback Read allocate |
| 361 | 360 | * ioremap_wc() Normal Non-cacheable n/a |
| 362 | 361 | * ioremap_wt() Normal Non-cacheable n/a |
| @@ -368,13 +367,6 @@ static inline void memcpy_toio(volatile void __iomem *to, const void *from, · 5 unmodified lines | ||
| 368 | 367 | * - unaligned accesses are "unpredictable" |
| 369 | 368 | * - writes may be delayed before they hit the endpoint device |
| 370 | 369 | * |
| 371 | − * ioremap_nocache() is the same as ioremap() as there are too many device | |
| 372 | − * drivers using this for device registers, and documentation which tells | |
| 373 | − * people to use it for such for this to be any different. This is not a | |
| 374 | − * safe fallback for memory-like mappings, or memory regions where the | |
| 375 | − * compiler may generate unaligned accesses - eg, via inlining its own | |
| 376 | − * memcpy. | |
| 377 | − * | |
| 378 | 370 | * All normal memory mappings have the following properties: |
| 379 | 371 | * - reads can be repeated with no side effects |
| 380 | 372 | * - repeated reads return the last value written |
| @@ -105,7 +105,7 @@ static int nsp_write_lut(unsigned int cpu) · 104 unmodified lines | ||
| 105 | 105 | if (!secondary_boot_addr) |
| 106 | 106 | return -EINVAL; |
| 107 | 107 | |
| 108 | − sku_rom_lut = ioremap_nocache((phys_addr_t)secondary_boot_addr, | |
| 108 | + sku_rom_lut = ioremap((phys_addr_t)secondary_boot_addr, | |
| 109 | 109 | sizeof(phys_addr_t)); |
| 110 | 110 | if (!sku_rom_lut) { |
| 111 | 111 | pr_warn("unable to ioremap SKU-ROM LUT register for cpu %u\n", cpu); |
| @@ -174,7 +174,7 @@ static int kona_boot_secondary(unsigned int cpu, struct task_struct *idle) · 62 unmodified lines | ||
| 174 | 174 | if (!secondary_boot_addr) |
| 175 | 175 | return -EINVAL; |
| 176 | 176 | |
| 177 | − boot_reg = ioremap_nocache((phys_addr_t)secondary_boot_addr, | |
| 177 | + boot_reg = ioremap((phys_addr_t)secondary_boot_addr, | |
| 178 | 178 | sizeof(phys_addr_t)); |
| 179 | 179 | if (!boot_reg) { |
| 180 | 180 | pr_err("unable to map boot register for cpu %u\n", cpu_id); |
| @@ -34,7 +34,7 @@ void __iomem *davinci_sysmod_base; · 33 unmodified lines | ||
| 34 | 34 | |
| 35 | 35 | void davinci_map_sysmod(void) |
| 36 | 36 | { |
| 37 | − davinci_sysmod_base = ioremap_nocache(DAVINCI_SYSTEM_MODULE_BASE, | |
| 37 | + davinci_sysmod_base = ioremap(DAVINCI_SYSTEM_MODULE_BASE, | |
| 38 | 38 | 0x800); |
| 39 | 39 | /* |
| 40 | 40 | * Throw a bug since a lot of board initialization code depends |
| @@ -1008,7 +1008,7 @@ static void __init magician_init(void) · 1007 unmodified lines | ||
| 1008 | 1008 | pxa_set_udc_info(&magician_udc_info); |
| 1009 | 1009 | |
| 1010 | 1010 | /* Check LCD type we have */ |
| 1011 | − cpld = ioremap_nocache(PXA_CS3_PHYS, 0x1000); | |
| 1011 | + cpld = ioremap(PXA_CS3_PHYS, 0x1000); | |
| 1012 | 1012 | if (cpld) { |
| 1013 | 1013 | u8 board_id = __raw_readb(cpld + 0x14); |
| 1014 | 1014 | |
| @@ -189,7 +189,7 @@ static void apmu_init_cpu(struct resource *res, int cpu, int bit) · 188 unmodified lines | ||
| 189 | 189 | if ((cpu >= ARRAY_SIZE(apmu_cpus)) || apmu_cpus[cpu].iomem) |
| 190 | 190 | return; |
| 191 | 191 | |
| 192 | − apmu_cpus[cpu].iomem = ioremap_nocache(res->start, resource_size(res)); | |
| 192 | + apmu_cpus[cpu].iomem = ioremap(res->start, resource_size(res)); | |
| 193 | 193 | apmu_cpus[cpu].bit = bit; |
| 194 | 194 | |
| 195 | 195 | pr_debug("apmu ioremap %d %d %pr\n", cpu, bit, res); |
| @@ -103,7 +103,7 @@ map: · 102 unmodified lines | ||
| 103 | 103 | iounmap(p); |
| 104 | 104 | |
| 105 | 105 | /* setup reset vectors */ |
| 106 | − p = ioremap_nocache(RST, 0x63); | |
| 106 | + p = ioremap(RST, 0x63); | |
| 107 | 107 | bar = phys_to_sbar(res.start); |
| 108 | 108 | if (has_a15) { |
| 109 | 109 | writel_relaxed(bar, p + CA15BAR); |
| @@ -28,7 +28,7 @@ static void __init r8a7740_meram_workaround(void) · 27 unmodified lines | ||
| 28 | 28 | { |
| 29 | 29 | void __iomem *reg; |
| 30 | 30 | |
| 31 | − reg = ioremap_nocache(MEBUFCNTR, 4); | |
| 31 | + reg = ioremap(MEBUFCNTR, 4); | |
| 32 | 32 | if (reg) { |
| 33 | 33 | iowrite32(0x01600164, reg); |
| 34 | 34 | iounmap(reg); |
| @@ -37,9 +37,9 @@ static void __init r8a7740_meram_workaround(void) · 2 unmodified lines | ||
| 37 | 37 | |
| 38 | 38 | static void __init r8a7740_init_irq_of(void) |
| 39 | 39 | { |
| 40 | − void __iomem *intc_prio_base = ioremap_nocache(0xe6900010, 0x10); | |
| 41 | − void __iomem *intc_msk_base = ioremap_nocache(0xe6900040, 0x10); | |
| 42 | − void __iomem *pfc_inta_ctrl = ioremap_nocache(0xe605807c, 0x4); | |
| 40 | + void __iomem *intc_prio_base = ioremap(0xe6900010, 0x10); | |
| 41 | + void __iomem *intc_msk_base = ioremap(0xe6900040, 0x10); | |
| 42 | + void __iomem *pfc_inta_ctrl = ioremap(0xe605807c, 0x4); | |
| 43 | 43 | |
| 44 | 44 | irqchip_init(); |
| 45 | 45 | |
| @@ -22,7 +22,7 @@ · 21 unmodified lines | ||
| 22 | 22 | |
| 23 | 23 | static void __init r8a7778_init_irq_dt(void) |
| 24 | 24 | { |
| 25 | − void __iomem *base = ioremap_nocache(0xfe700000, 0x00100000); | |
| 25 | + void __iomem *base = ioremap(0xfe700000, 0x00100000); | |
| 26 | 26 | |
| 27 | 27 | BUG_ON(!base); |
| 28 | 28 | |
| @@ -172,7 +172,6 @@ static inline void writel(u32 data, volatile void __iomem *addr) · 171 unmodified lines | ||
| 172 | 172 | #define writel_relaxed __raw_writel |
| 173 | 173 | |
| 174 | 174 | void __iomem *ioremap(unsigned long phys_addr, unsigned long size); |
| 175 | −#define ioremap_nocache ioremap | |
| 176 | 175 | #define ioremap_uc(X, Y) ioremap((X), (Y)) |
| 177 | 176 | |
| 178 | 177 | |
| @@ -18,7 +18,7 @@ · 17 unmodified lines | ||
| 18 | 18 | extern unsigned long vga_console_iobase; |
| 19 | 19 | extern unsigned long vga_console_membase; |
| 20 | 20 | |
| 21 | −#define VGA_MAP_MEM(x,s) ((unsigned long) ioremap_nocache(vga_console_membase + (x), s)) | |
| 21 | +#define VGA_MAP_MEM(x,s) ((unsigned long) ioremap(vga_console_membase + (x), s)) | |
| 22 | 22 | |
| 23 | 23 | #define vga_readb(x) (*(x)) |
| 24 | 24 | #define vga_writeb(x,y) (*(y) = (x)) |
| @@ -50,7 +50,7 @@ int __init init_cyclone_clock(void) · 49 unmodified lines | ||
| 50 | 50 | |
| 51 | 51 | /* find base address */ |
| 52 | 52 | offset = (CYCLONE_CBAR_ADDR); |
| 53 | − reg = ioremap_nocache(offset, sizeof(u64)); | |
| 53 | + reg = ioremap(offset, sizeof(u64)); | |
| 54 | 54 | if(!reg){ |
| 55 | 55 | printk(KERN_ERR "Summit chipset: Could not find valid CBAR" |
| 56 | 56 | " register.\n"); |
| @@ -68,7 +68,7 @@ int __init init_cyclone_clock(void) · 11 unmodified lines | ||
| 68 | 68 | |
| 69 | 69 | /* setup PMCC */ |
| 70 | 70 | offset = (base + CYCLONE_PMCC_OFFSET); |
| 71 | − reg = ioremap_nocache(offset, sizeof(u64)); | |
| 71 | + reg = ioremap(offset, sizeof(u64)); | |
| 72 | 72 | if(!reg){ |
| 73 | 73 | printk(KERN_ERR "Summit chipset: Could not find valid PMCC" |
| 74 | 74 | " register.\n"); |
| @@ -80,7 +80,7 @@ int __init init_cyclone_clock(void) · 5 unmodified lines | ||
| 80 | 80 | |
| 81 | 81 | /* setup MPCS */ |
| 82 | 82 | offset = (base + CYCLONE_MPCS_OFFSET); |
| 83 | − reg = ioremap_nocache(offset, sizeof(u64)); | |
| 83 | + reg = ioremap(offset, sizeof(u64)); | |
| 84 | 84 | if(!reg){ |
| 85 | 85 | printk(KERN_ERR "Summit chipset: Could not find valid MPCS" |
| 86 | 86 | " register.\n"); |
| @@ -92,7 +92,7 @@ int __init init_cyclone_clock(void) · 5 unmodified lines | ||
| 92 | 92 | |
| 93 | 93 | /* map in cyclone_timer */ |
| 94 | 94 | offset = (base + CYCLONE_MPMC_OFFSET); |
| 95 | − cyclone_timer = ioremap_nocache(offset, sizeof(u32)); | |
| 95 | + cyclone_timer = ioremap(offset, sizeof(u32)); | |
| 96 | 96 | if(!cyclone_timer){ |
| 97 | 97 | printk(KERN_ERR "Summit chipset: Could not find valid MPMC" |
| 98 | 98 | " register.\n"); |
| @@ -27,7 +27,6 @@ static inline void __iomem *ioremap(unsigned long physaddr, unsigned long size) · 26 unmodified lines | ||
| 27 | 27 | return __ioremap(physaddr, size, IOMAP_NOCACHE_SER); |
| 28 | 28 | } |
| 29 | 29 | |
| 30 | −#define ioremap_nocache ioremap | |
| 31 | 30 | #define ioremap_uc ioremap |
| 32 | 31 | #define ioremap_wt ioremap_wt |
| 33 | 32 | static inline void __iomem *ioremap_wt(unsigned long physaddr, |
| @@ -236,9 +236,9 @@ static void tnetd7300_set_clock(u32 shift, struct tnetd7300_clock *clock, · 235 unmodified lines | ||
| 236 | 236 | |
| 237 | 237 | static void __init tnetd7300_init_clocks(void) |
| 238 | 238 | { |
| 239 | − u32 *bootcr = (u32 *)ioremap_nocache(AR7_REGS_DCL, 4); | |
| 239 | + u32 *bootcr = (u32 *)ioremap(AR7_REGS_DCL, 4); | |
| 240 | 240 | struct tnetd7300_clocks *clocks = |
| 241 | − ioremap_nocache(UR8_REGS_CLOCKS, | |
| 241 | + ioremap(UR8_REGS_CLOCKS, | |
| 242 | 242 | sizeof(struct tnetd7300_clocks)); |
| 243 | 243 | |
| 244 | 244 | bus_clk.rate = tnetd7300_get_clock(BUS_PLL_SOURCE_SHIFT, |
| @@ -320,9 +320,9 @@ static int tnetd7200_get_clock_base(int clock_id, u32 *bootcr) · 75 unmodified lines | ||
| 320 | 320 | |
| 321 | 321 | static void __init tnetd7200_init_clocks(void) |
| 322 | 322 | { |
| 323 | − u32 *bootcr = (u32 *)ioremap_nocache(AR7_REGS_DCL, 4); | |
| 323 | + u32 *bootcr = (u32 *)ioremap(AR7_REGS_DCL, 4); | |
| 324 | 324 | struct tnetd7200_clocks *clocks = |
| 325 | − ioremap_nocache(AR7_REGS_CLOCKS, | |
| 325 | + ioremap(AR7_REGS_CLOCKS, | |
| 326 | 326 | sizeof(struct tnetd7200_clocks)); |
| 327 | 327 | int cpu_base, cpu_mul, cpu_prediv, cpu_postdiv; |
| 328 | 328 | int dsp_base, dsp_mul, dsp_prediv, dsp_postdiv; |
| @@ -308,7 +308,7 @@ int __init ar7_gpio_init(void) · 307 unmodified lines | ||
| 308 | 308 | size = 0x1f; |
| 309 | 309 | } |
| 310 | 310 | |
| 311 | − gpch->regs = ioremap_nocache(AR7_REGS_GPIO, size); | |
| 311 | + gpch->regs = ioremap(AR7_REGS_GPIO, size); | |
| 312 | 312 | if (!gpch->regs) { |
| 313 | 313 | printk(KERN_ERR "%s: failed to ioremap regs\n", |
| 314 | 314 | gpch->chip.label); |
| @@ -702,7 +702,7 @@ static int __init ar7_register_devices(void) · 701 unmodified lines | ||
| 702 | 702 | pr_warn("unable to register usb slave: %d\n", res); |
| 703 | 703 | |
| 704 | 704 | /* Register watchdog only if enabled in hardware */ |
| 705 | − bootcr = ioremap_nocache(AR7_REGS_DCL, 4); | |
| 705 | + bootcr = ioremap(AR7_REGS_DCL, 4); | |
| 706 | 706 | val = readl(bootcr); |
| 707 | 707 | iounmap(bootcr); |
| 708 | 708 | if (val & AR7_WDT_HW_ENA) { |
| @@ -262,7 +262,7 @@ void __init ar2315_plat_mem_setup(void) · 261 unmodified lines | ||
| 262 | 262 | u32 config; |
| 263 | 263 | |
| 264 | 264 | /* Detect memory size */ |
| 265 | − sdram_base = ioremap_nocache(AR2315_SDRAMCTL_BASE, | |
| 265 | + sdram_base = ioremap(AR2315_SDRAMCTL_BASE, | |
| 266 | 266 | AR2315_SDRAMCTL_SIZE); |
| 267 | 267 | memcfg = __raw_readl(sdram_base + AR2315_MEM_CFG); |
| 268 | 268 | memsize = 1 + ATH25_REG_MS(memcfg, AR2315_MEM_CFG_DATA_WIDTH); |
| @@ -272,7 +272,7 @@ void __init ar2315_plat_mem_setup(void) · 3 unmodified lines | ||
| 272 | 272 | add_memory_region(0, memsize, BOOT_MEM_RAM); |
| 273 | 273 | iounmap(sdram_base); |
| 274 | 274 | |
| 275 | − ar2315_rst_base = ioremap_nocache(AR2315_RST_BASE, AR2315_RST_SIZE); | |
| 275 | + ar2315_rst_base = ioremap(AR2315_RST_BASE, AR2315_RST_SIZE); | |
| 276 | 276 | |
| 277 | 277 | /* Detect the hardware based on the device ID */ |
| 278 | 278 | devid = ar2315_rst_reg_read(AR2315_SREV) & AR2315_REV_CHIP; |
| @@ -185,7 +185,7 @@ static void __init ar5312_flash_init(void) · 184 unmodified lines | ||
| 185 | 185 | void __iomem *flashctl_base; |
| 186 | 186 | u32 ctl; |
| 187 | 187 | |
| 188 | − flashctl_base = ioremap_nocache(AR5312_FLASHCTL_BASE, | |
| 188 | + flashctl_base = ioremap(AR5312_FLASHCTL_BASE, | |
| 189 | 189 | AR5312_FLASHCTL_SIZE); |
| 190 | 190 | |
| 191 | 191 | ctl = __raw_readl(flashctl_base + AR5312_FLASHCTL0); |
| @@ -358,7 +358,7 @@ void __init ar5312_plat_mem_setup(void) · 166 unmodified lines | ||
| 358 | 358 | u32 devid; |
| 359 | 359 | |
| 360 | 360 | /* Detect memory size */ |
| 361 | − sdram_base = ioremap_nocache(AR5312_SDRAMCTL_BASE, | |
| 361 | + sdram_base = ioremap(AR5312_SDRAMCTL_BASE, | |
| 362 | 362 | AR5312_SDRAMCTL_SIZE); |
| 363 | 363 | memcfg = __raw_readl(sdram_base + AR5312_MEM_CFG1); |
| 364 | 364 | bank0_ac = ATH25_REG_MS(memcfg, AR5312_MEM_CFG1_AC0); |
| @@ -369,7 +369,7 @@ void __init ar5312_plat_mem_setup(void) · 4 unmodified lines | ||
| 369 | 369 | add_memory_region(0, memsize, BOOT_MEM_RAM); |
| 370 | 370 | iounmap(sdram_base); |
| 371 | 371 | |
| 372 | − ar5312_rst_base = ioremap_nocache(AR5312_RST_BASE, AR5312_RST_SIZE); | |
| 372 | + ar5312_rst_base = ioremap(AR5312_RST_BASE, AR5312_RST_SIZE); | |
| 373 | 373 | |
| 374 | 374 | devid = ar5312_rst_reg_read(AR5312_REV); |
| 375 | 375 | devid >>= AR5312_REV_WMAC_MIN_S; |
| @@ -111,7 +111,7 @@ int __init ath25_find_config(phys_addr_t base, unsigned long size) · 110 unmodified lines | ||
| 111 | 111 | u8 *mac_addr; |
| 112 | 112 | u32 offset; |
| 113 | 113 | |
| 114 | − flash_base = ioremap_nocache(base, size); | |
| 114 | + flash_base = ioremap(base, size); | |
| 115 | 115 | flash_limit = flash_base + size; |
| 116 | 116 | |
| 117 | 117 | ath25_board.config = NULL; |
| @@ -41,7 +41,7 @@ static void __iomem *ath79_ddr_pci_win_base; · 40 unmodified lines | ||
| 41 | 41 | |
| 42 | 42 | void ath79_ddr_ctrl_init(void) |
| 43 | 43 | { |
| 44 | − ath79_ddr_base = ioremap_nocache(AR71XX_DDR_CTRL_BASE, | |
| 44 | + ath79_ddr_base = ioremap(AR71XX_DDR_CTRL_BASE, | |
| 45 | 45 | AR71XX_DDR_CTRL_SIZE); |
| 46 | 46 | if (soc_is_ar913x() || soc_is_ar724x() || soc_is_ar933x()) { |
| 47 | 47 | ath79_ddr_wb_flush_base = ath79_ddr_base + 0x7c; |
| @@ -226,9 +226,9 @@ void __init plat_mem_setup(void) · 225 unmodified lines | ||
| 226 | 226 | else if (fw_passed_dtb) |
| 227 | 227 | __dt_setup_arch((void *)KSEG0ADDR(fw_passed_dtb)); |
| 228 | 228 | |
| 229 | − ath79_reset_base = ioremap_nocache(AR71XX_RESET_BASE, | |
| 229 | + ath79_reset_base = ioremap(AR71XX_RESET_BASE, | |
| 230 | 230 | AR71XX_RESET_SIZE); |
| 231 | − ath79_pll_base = ioremap_nocache(AR71XX_PLL_BASE, | |
| 231 | + ath79_pll_base = ioremap(AR71XX_PLL_BASE, | |
| 232 | 232 | AR71XX_PLL_SIZE); |
| 233 | 233 | ath79_detect_sys_type(); |
| 234 | 234 | ath79_ddr_ctrl_init(); |
| @@ -357,7 +357,7 @@ static void octeon_write_lcd(const char *s) · 356 unmodified lines | ||
| 357 | 357 | { |
| 358 | 358 | if (octeon_bootinfo->led_display_base_addr) { |
| 359 | 359 | void __iomem *lcd_address = |
| 360 | − ioremap_nocache(octeon_bootinfo->led_display_base_addr, | |
| 360 | + ioremap(octeon_bootinfo->led_display_base_addr, | |
| 361 | 361 | 8); |
| 362 | 362 | int i; |
| 363 | 363 | for (i = 0; i < 8; i++, s++) { |
| @@ -51,7 +51,7 @@ static void __init ocelot_earlyprintk_init(void) · 50 unmodified lines | ||
| 51 | 51 | { |
| 52 | 52 | void __iomem *uart_base; |
| 53 | 53 | |
| 54 | − uart_base = ioremap_nocache(UART_UART, 0x20); | |
| 54 | + uart_base = ioremap(UART_UART, 0x20); | |
| 55 | 55 | setup_8250_early_printk_port((unsigned long)uart_base, 2, 50000); |
| 56 | 56 | } |
| 57 | 57 | |
| @@ -227,7 +227,6 @@ static inline void __iomem *ioremap_prot(phys_addr_t offset, · 226 unmodified lines | ||
| 227 | 227 | */ |
| 228 | 228 | #define ioremap(offset, size) \ |
| 229 | 229 | __ioremap_mode((offset), (size), _CACHE_UNCACHED) |
| 230 | −#define ioremap_nocache ioremap | |
| 231 | 230 | #define ioremap_uc ioremap |
| 232 | 231 | |
| 233 | 232 | /* |
| @@ -194,7 +194,7 @@ static void mips_cm_probe_l2sync(void) · 193 unmodified lines | ||
| 194 | 194 | write_gcr_l2_only_sync_base(addr | CM_GCR_L2_ONLY_SYNC_BASE_SYNCEN); |
| 195 | 195 | |
| 196 | 196 | /* Map the region */ |
| 197 | − mips_cm_l2sync_base = ioremap_nocache(addr, MIPS_CM_L2SYNC_SIZE); | |
| 197 | + mips_cm_l2sync_base = ioremap(addr, MIPS_CM_L2SYNC_SIZE); | |
| 198 | 198 | } |
| 199 | 199 | |
| 200 | 200 | int mips_cm_probe(void) |
| @@ -215,7 +215,7 @@ int mips_cm_probe(void) · 14 unmodified lines | ||
| 215 | 215 | if (!addr) |
| 216 | 216 | return -ENODEV; |
| 217 | 217 | |
| 218 | − mips_gcr_base = ioremap_nocache(addr, MIPS_CM_GCR_SIZE); | |
| 218 | + mips_gcr_base = ioremap(addr, MIPS_CM_GCR_SIZE); | |
| 219 | 219 | if (!mips_gcr_base) |
| 220 | 220 | return -ENXIO; |
| 221 | 221 | |
| @@ -78,7 +78,7 @@ int mips_cpc_probe(void) · 77 unmodified lines | ||
| 78 | 78 | if (!addr) |
| 79 | 79 | return -ENODEV; |
| 80 | 80 | |
| 81 | − mips_cpc_base = ioremap_nocache(addr, 0x8000); | |
| 81 | + mips_cpc_base = ioremap(addr, 0x8000); | |
| 82 | 82 | if (!mips_cpc_base) |
| 83 | 83 | return -ENXIO; |
| 84 | 84 | |
| @@ -221,16 +221,16 @@ void __init ltq_soc_init(void) · 220 unmodified lines | ||
| 221 | 221 | res_sys[2].name) < 0)) |
| 222 | 222 | pr_err("Failed to request core resources"); |
| 223 | 223 | |
| 224 | − status_membase = ioremap_nocache(res_status.start, | |
| 224 | + status_membase = ioremap(res_status.start, | |
| 225 | 225 | resource_size(&res_status)); |
| 226 | − ltq_ebu_membase = ioremap_nocache(res_ebu.start, | |
| 226 | + ltq_ebu_membase = ioremap(res_ebu.start, | |
| 227 | 227 | resource_size(&res_ebu)); |
| 228 | 228 | |
| 229 | 229 | if (!status_membase || !ltq_ebu_membase) |
| 230 | 230 | panic("Failed to remap core resources"); |
| 231 | 231 | |
| 232 | 232 | for (i = 0; i < 3; i++) { |
| 233 | − sysctl_membase[i] = ioremap_nocache(res_sys[i].start, | |
| 233 | + sysctl_membase[i] = ioremap(res_sys[i].start, | |
| 234 | 234 | resource_size(&res_sys[i])); |
| 235 | 235 | if (!sysctl_membase[i]) |
| 236 | 236 | panic("Failed to remap sysctrl resources"); |
| @@ -349,7 +349,7 @@ int __init icu_of_init(struct device_node *node, struct device_node *parent) · 348 unmodified lines | ||
| 349 | 349 | res.name)) |
| 350 | 350 | pr_err("Failed to request icu%i memory\n", vpe); |
| 351 | 351 | |
| 352 | − ltq_icu_membase[vpe] = ioremap_nocache(res.start, | |
| 352 | + ltq_icu_membase[vpe] = ioremap(res.start, | |
| 353 | 353 | resource_size(&res)); |
| 354 | 354 | |
| 355 | 355 | if (!ltq_icu_membase[vpe]) |
| @@ -402,7 +402,7 @@ int __init icu_of_init(struct device_node *node, struct device_node *parent) · 46 unmodified lines | ||
| 402 | 402 | res.name)) |
| 403 | 403 | pr_err("Failed to request eiu memory"); |
| 404 | 404 | |
| 405 | − ltq_eiu_membase = ioremap_nocache(res.start, | |
| 405 | + ltq_eiu_membase = ioremap(res.start, | |
| 406 | 406 | resource_size(&res)); |
| 407 | 407 | if (!ltq_eiu_membase) |
| 408 | 408 | panic("Failed to remap eiu memory"); |
| @@ -431,10 +431,10 @@ void __init ltq_soc_init(void) · 430 unmodified lines | ||
| 431 | 431 | res_ebu.name)) |
| 432 | 432 | pr_err("Failed to request core resources"); |
| 433 | 433 | |
| 434 | − pmu_membase = ioremap_nocache(res_pmu.start, resource_size(&res_pmu)); | |
| 435 | − ltq_cgu_membase = ioremap_nocache(res_cgu.start, | |
| 434 | + pmu_membase = ioremap(res_pmu.start, resource_size(&res_pmu)); | |
| 435 | + ltq_cgu_membase = ioremap(res_cgu.start, | |
| 436 | 436 | resource_size(&res_cgu)); |
| 437 | − ltq_ebu_membase = ioremap_nocache(res_ebu.start, | |
| 437 | + ltq_ebu_membase = ioremap(res_ebu.start, | |
| 438 | 438 | resource_size(&res_ebu)); |
| 439 | 439 | if (!pmu_membase || !ltq_cgu_membase || !ltq_ebu_membase) |
| 440 | 440 | panic("Failed to remap core resources"); |
| @@ -17,11 +17,11 @@ · 16 unmodified lines | ||
| 17 | 17 | static inline void loongson_reboot(void) |
| 18 | 18 | { |
| 19 | 19 | #ifndef CONFIG_CPU_JUMP_WORKAROUNDS |
| 20 | − ((void (*)(void))ioremap_nocache(LOONGSON_BOOT_BASE, 4)) (); | |
| 20 | + ((void (*)(void))ioremap(LOONGSON_BOOT_BASE, 4)) (); | |
| 21 | 21 | #else |
| 22 | 22 | void (*func)(void); |
| 23 | 23 | |
| 24 | − func = (void *)ioremap_nocache(LOONGSON_BOOT_BASE, 4); | |
| 24 | + func = (void *)ioremap(LOONGSON_BOOT_BASE, 4); | |
| 25 | 25 | |
| 26 | 26 | __asm__ __volatile__( |
| 27 | 27 | " .set noat \n" |
| @@ -26,13 +26,13 @@ void __init prom_init(void) · 25 unmodified lines | ||
| 26 | 26 | memsize = DEFAULT_MEMSIZE; |
| 27 | 27 | |
| 28 | 28 | if (strstr(arcs_cmdline, "console=ttyS3")) |
| 29 | − uart_base = ioremap_nocache(LS1X_UART3_BASE, 0x0f); | |
| 29 | + uart_base = ioremap(LS1X_UART3_BASE, 0x0f); | |
| 30 | 30 | else if (strstr(arcs_cmdline, "console=ttyS2")) |
| 31 | − uart_base = ioremap_nocache(LS1X_UART2_BASE, 0x0f); | |
| 31 | + uart_base = ioremap(LS1X_UART2_BASE, 0x0f); | |
| 32 | 32 | else if (strstr(arcs_cmdline, "console=ttyS1")) |
| 33 | − uart_base = ioremap_nocache(LS1X_UART1_BASE, 0x0f); | |
| 33 | + uart_base = ioremap(LS1X_UART1_BASE, 0x0f); | |
| 34 | 34 | else |
| 35 | − uart_base = ioremap_nocache(LS1X_UART0_BASE, 0x0f); | |
| 35 | + uart_base = ioremap(LS1X_UART0_BASE, 0x0f); | |
| 36 | 36 | setup_8250_early_printk_port((unsigned long)uart_base, 0, 0); |
| 37 | 37 | } |
| 38 | 38 | |
| @@ -37,7 +37,7 @@ static void ls1x_power_off(void) · 36 unmodified lines | ||
| 37 | 37 | |
| 38 | 38 | static int __init ls1x_reboot_setup(void) |
| 39 | 39 | { |
| 40 | − wdt_reg_base = ioremap_nocache(LS1X_WDT_BASE, (SZ_4 + SZ_8)); | |
| 40 | + wdt_reg_base = ioremap(LS1X_WDT_BASE, (SZ_4 + SZ_8)); | |
| 41 | 41 | if (!wdt_reg_base) |
| 42 | 42 | panic("Failed to remap watchdog registers"); |
| 43 | 43 | |
| @@ -49,7 +49,7 @@ static inline void ls1x_pwmtimer_restart(void) · 48 unmodified lines | ||
| 49 | 49 | |
| 50 | 50 | void __init ls1x_pwmtimer_init(void) |
| 51 | 51 | { |
| 52 | − timer_reg_base = ioremap_nocache(LS1X_TIMER_BASE, SZ_16); | |
| 52 | + timer_reg_base = ioremap(LS1X_TIMER_BASE, SZ_16); | |
| 53 | 53 | if (!timer_reg_base) |
| 54 | 54 | panic("Failed to remap timer registers"); |
| 55 | 55 | |
| @@ -17,7 +17,7 @@ · 16 unmodified lines | ||
| 17 | 17 | |
| 18 | 18 | static inline void loongson_reboot(void) |
| 19 | 19 | { |
| 20 | − ((void (*)(void))ioremap_nocache(LOONGSON_BOOT_BASE, 4)) (); | |
| 20 | + ((void (*)(void))ioremap(LOONGSON_BOOT_BASE, 4)) (); | |
| 21 | 21 | } |
| 22 | 22 | |
| 23 | 23 | static void loongson_restart(char *command) |
| @@ -240,7 +240,7 @@ static void __init remove_gic(void *fdt) · 239 unmodified lines | ||
| 240 | 240 | * On systems using the RocIT system controller a GIC may be |
| 241 | 241 | * present without a CM. Detect whether that is the case. |
| 242 | 242 | */ |
| 243 | − biu_base = ioremap_nocache(MSC01_BIU_REG_BASE, | |
| 243 | + biu_base = ioremap(MSC01_BIU_REG_BASE, | |
| 244 | 244 | MSC01_BIU_ADDRSPACE_SZ); |
| 245 | 245 | sc_cfg = __raw_readl(biu_base + MSC01_SC_CFG_OFS); |
| 246 | 246 | if (sc_cfg & MSC01_SC_CFG_GICPRES_MSK) { |
| @@ -409,7 +409,7 @@ static int alchemy_pci_probe(struct platform_device *pdev) · 408 unmodified lines | ||
| 409 | 409 | goto out6; |
| 410 | 410 | } |
| 411 | 411 | |
| 412 | − ctx->regs = ioremap_nocache(r->start, resource_size(r)); | |
| 412 | + ctx->regs = ioremap(r->start, resource_size(r)); | |
| 413 | 413 | if (!ctx->regs) { |
| 414 | 414 | dev_err(&pdev->dev, "cannot map pci regs\n"); |
| 415 | 415 | ret = -ENODEV; |
| @@ -441,7 +441,7 @@ static int ar2315_pci_probe(struct platform_device *pdev) · 440 unmodified lines | ||
| 441 | 441 | apc->mem_res.flags = IORESOURCE_MEM; |
| 442 | 442 | |
| 443 | 443 | /* Remap PCI config space */ |
| 444 | − apc->cfg_mem = devm_ioremap_nocache(dev, res->start, | |
| 444 | + apc->cfg_mem = devm_ioremap(dev, res->start, | |
| 445 | 445 | AR2315_PCI_CFG_SIZE); |
| 446 | 446 | if (!apc->cfg_mem) { |
| 447 | 447 | dev_err(dev, "failed to remap PCI config space\n"); |
| @@ -221,7 +221,7 @@ static int __init bcm63xx_register_pci(void) · 220 unmodified lines | ||
| 221 | 221 | * a spinlock for each io access, so this is currently kind of |
| 222 | 222 | * broken on SMP. |
| 223 | 223 | */ |
| 224 | − pci_iospace_start = ioremap_nocache(BCM_PCI_IO_BASE_PA, 4); | |
| 224 | + pci_iospace_start = ioremap(BCM_PCI_IO_BASE_PA, 4); | |
| 225 | 225 | if (!pci_iospace_start) |
| 226 | 226 | return -ENOMEM; |
| 227 | 227 | |
| @@ -218,7 +218,7 @@ static int rt288x_pci_probe(struct platform_device *pdev) · 217 unmodified lines | ||
| 218 | 218 | { |
| 219 | 219 | void __iomem *io_map_base; |
| 220 | 220 | |
| 221 | − rt2880_pci_base = ioremap_nocache(RT2880_PCI_BASE, PAGE_SIZE); | |
| 221 | + rt2880_pci_base = ioremap(RT2880_PCI_BASE, PAGE_SIZE); | |
| 222 | 222 | |
| 223 | 223 | io_map_base = ioremap(RT2880_PCI_IO_BASE, RT2880_PCI_IO_SIZE); |
| 224 | 224 | rt2880_pci_controller.io_map_base = (unsigned long) io_map_base; |
| @@ -135,7 +135,7 @@ void __init fw_init_early_console(char port) · 134 unmodified lines | ||
| 135 | 135 | char *arch_cmdline = pic32_getcmdline(); |
| 136 | 136 | int baud = -1; |
| 137 | 137 | |
| 138 | − uart_base = ioremap_nocache(PIC32_BASE_UART, 0xc00); | |
| 138 | + uart_base = ioremap(PIC32_BASE_UART, 0xc00); | |
| 139 | 139 | |
| 140 | 140 | baud = get_baud_from_cmdline(arch_cmdline); |
| 141 | 141 | if (port == -1) |
| @@ -122,7 +122,7 @@ static const struct · 121 unmodified lines | ||
| 122 | 122 | |
| 123 | 123 | void pic32_pps_input(int function, int pin) |
| 124 | 124 | { |
| 125 | − void __iomem *pps_base = ioremap_nocache(PPS_BASE, 0xF4); | |
| 125 | + void __iomem *pps_base = ioremap(PPS_BASE, 0xF4); | |
| 126 | 126 | int i; |
| 127 | 127 | |
| 128 | 128 | for (i = 0; i < ARRAY_SIZE(input_pin_reg); i++) { |
| @@ -252,7 +252,7 @@ static const struct · 123 unmodified lines | ||
| 252 | 252 | |
| 253 | 253 | void pic32_pps_output(int function, int pin) |
| 254 | 254 | { |
| 255 | − void __iomem *pps_base = ioremap_nocache(PPS_BASE, 0x170); | |
| 255 | + void __iomem *pps_base = ioremap(PPS_BASE, 0x170); | |
| 256 | 256 | int i; |
| 257 | 257 | |
| 258 | 258 | for (i = 0; i < ARRAY_SIZE(output_pin_reg); i++) { |
| @@ -105,7 +105,7 @@ void __init msp_serial_setup(void) · 104 unmodified lines | ||
| 105 | 105 | |
| 106 | 106 | /* Initialize first serial port */ |
| 107 | 107 | up.mapbase = MSP_UART0_BASE; |
| 108 | − up.membase = ioremap_nocache(up.mapbase, MSP_UART_REG_LEN); | |
| 108 | + up.membase = ioremap(up.mapbase, MSP_UART_REG_LEN); | |
| 109 | 109 | up.irq = MSP_INT_UART0; |
| 110 | 110 | up.uartclk = uartclk; |
| 111 | 111 | up.regshift = 2; |
| @@ -143,7 +143,7 @@ void __init msp_serial_setup(void) · 31 unmodified lines | ||
| 143 | 143 | } |
| 144 | 144 | |
| 145 | 145 | up.mapbase = MSP_UART1_BASE; |
| 146 | − up.membase = ioremap_nocache(up.mapbase, MSP_UART_REG_LEN); | |
| 146 | + up.membase = ioremap(up.mapbase, MSP_UART_REG_LEN); | |
| 147 | 147 | up.irq = MSP_INT_UART1; |
| 148 | 148 | up.line = 1; |
| 149 | 149 | up.private_data = (void*)UART1_STATUS_REG; |
| @@ -165,7 +165,7 @@ static int __init intc_of_init(struct device_node *node, · 164 unmodified lines | ||
| 165 | 165 | res.name)) |
| 166 | 166 | pr_err("Failed to request intc memory"); |
| 167 | 167 | |
| 168 | − rt_intc_membase = ioremap_nocache(res.start, | |
| 168 | + rt_intc_membase = ioremap(res.start, | |
| 169 | 169 | resource_size(&res)); |
| 170 | 170 | if (!rt_intc_membase) |
| 171 | 171 | panic("Failed to remap intc memory"); |
| @@ -43,7 +43,7 @@ __iomem void *plat_of_remap_node(const char *node) · 42 unmodified lines | ||
| 43 | 43 | res.name)) |
| 44 | 44 | panic("Failed to request resources for %s", node); |
| 45 | 45 | |
| 46 | − return ioremap_nocache(res.start, resource_size(&res)); | |
| 46 | + return ioremap(res.start, resource_size(&res)); | |
| 47 | 47 | } |
| 48 | 48 | |
| 49 | 49 | void __init device_tree_init(void) |
| @@ -286,7 +286,7 @@ static int __init plat_setup_devices(void) · 285 unmodified lines | ||
| 286 | 286 | nand_slot0_res[0].end = nand_slot0_res[0].start + 0x1000; |
| 287 | 287 | |
| 288 | 288 | /* Read and map device controller 3 */ |
| 289 | − dev3.base = ioremap_nocache(readl(IDT434_REG_BASE + DEV3BASE), 1); | |
| 289 | + dev3.base = ioremap(readl(IDT434_REG_BASE + DEV3BASE), 1); | |
| 290 | 290 | |
| 291 | 291 | if (!dev3.base) { |
| 292 | 292 | printk(KERN_ERR "rb532: cannot remap device controller 3\n"); |
| @@ -192,7 +192,7 @@ int __init rb532_gpio_init(void) · 191 unmodified lines | ||
| 192 | 192 | struct resource *r; |
| 193 | 193 | |
| 194 | 194 | r = rb532_gpio_reg0_res; |
| 195 | − rb532_gpio_chip->regbase = ioremap_nocache(r->start, resource_size(r)); | |
| 195 | + rb532_gpio_chip->regbase = ioremap(r->start, resource_size(r)); | |
| 196 | 196 | |
| 197 | 197 | if (!rb532_gpio_chip->regbase) { |
| 198 | 198 | printk(KERN_ERR "rb532: cannot remap GPIO register 0\n"); |
| @@ -110,7 +110,7 @@ void __init prom_init(void) · 109 unmodified lines | ||
| 110 | 110 | phys_addr_t memsize; |
| 111 | 111 | phys_addr_t ddrbase; |
| 112 | 112 | |
| 113 | − ddr = ioremap_nocache(ddr_reg[0].start, | |
| 113 | + ddr = ioremap(ddr_reg[0].start, | |
| 114 | 114 | ddr_reg[0].end - ddr_reg[0].start); |
| 115 | 115 | |
| 116 | 116 | if (!ddr) { |
| @@ -49,7 +49,7 @@ void __init plat_mem_setup(void) · 48 unmodified lines | ||
| 49 | 49 | |
| 50 | 50 | set_io_port_base(KSEG1); |
| 51 | 51 | |
| 52 | − pci_reg = ioremap_nocache(pci0_res[0].start, | |
| 52 | + pci_reg = ioremap(pci0_res[0].start, | |
| 53 | 53 | pci0_res[0].end - pci0_res[0].start); |
| 54 | 54 | if (!pci_reg) { |
| 55 | 55 | printk(KERN_ERR "Could not remap PCI registers\n"); |
| @@ -399,10 +399,10 @@ void __init sni_rm200_i8259_irqs(void) · 398 unmodified lines | ||
| 399 | 399 | { |
| 400 | 400 | int i; |
| 401 | 401 | |
| 402 | − rm200_pic_master = ioremap_nocache(0x16000020, 4); | |
| 402 | + rm200_pic_master = ioremap(0x16000020, 4); | |
| 403 | 403 | if (!rm200_pic_master) |
| 404 | 404 | return; |
| 405 | − rm200_pic_slave = ioremap_nocache(0x160000a0, 4); | |
| 405 | + rm200_pic_slave = ioremap(0x160000a0, 4); | |
| 406 | 406 | if (!rm200_pic_slave) { |
| 407 | 407 | iounmap(rm200_pic_master); |
| 408 | 408 | return; |
| @@ -128,9 +128,8 @@ static inline void gsc_writeq(unsigned long long val, unsigned long addr) · 127 unmodified lines | ||
| 128 | 128 | * The standard PCI ioremap interfaces |
| 129 | 129 | */ |
| 130 | 130 | void __iomem *ioremap(unsigned long offset, unsigned long size); |
| 131 | −#define ioremap_nocache(off, sz) ioremap((off), (sz)) | |
| 132 | −#define ioremap_wc ioremap_nocache | |
| 133 | −#define ioremap_uc ioremap_nocache | |
| 131 | +#define ioremap_wc ioremap | |
| 132 | +#define ioremap_uc ioremap | |
| 134 | 133 | |
| 135 | 134 | extern void iounmap(const volatile void __iomem *addr); |
| 136 | 135 | |
| @@ -792,7 +792,7 @@ static int perf_write_image(uint64_t *memaddr) · 791 unmodified lines | ||
| 792 | 792 | return -1; |
| 793 | 793 | } |
| 794 | 794 | |
| 795 | − runway = ioremap_nocache(cpu_device->hpa.start, 4096); | |
| 795 | + runway = ioremap(cpu_device->hpa.start, 4096); | |
| 796 | 796 | if (!runway) { |
| 797 | 797 | pr_err("perf_write_image: ioremap failed!\n"); |
| 798 | 798 | return -ENOMEM; |
| @@ -691,8 +691,6 @@ static inline void iosync(void) · 690 unmodified lines | ||
| 691 | 691 | * * ioremap_prot allows to specify the page flags as an argument and can |
| 692 | 692 | * also be hooked by the platform via ppc_md. |
| 693 | 693 | * |
| 694 | − * * ioremap_nocache is identical to ioremap | |
| 695 | − * | |
| 696 | 694 | * * ioremap_wc enables write combining |
| 697 | 695 | * |
| 698 | 696 | * * ioremap_wt enables write through |
| @@ -715,7 +713,6 @@ extern void __iomem *ioremap_prot(phys_addr_t address, unsigned long size, · 16 unmodified lines | ||
| 715 | 713 | extern void __iomem *ioremap_wc(phys_addr_t address, unsigned long size); |
| 716 | 714 | void __iomem *ioremap_wt(phys_addr_t address, unsigned long size); |
| 717 | 715 | void __iomem *ioremap_coherent(phys_addr_t address, unsigned long size); |
| 718 | −#define ioremap_nocache(addr, size) ioremap((addr), (size)) | |
| 719 | 716 | #define ioremap_uc(addr, size) ioremap((addr), (size)) |
| 720 | 717 | #define ioremap_cache(addr, size) \ |
| 721 | 718 | ioremap_prot((addr), (size), pgprot_val(PAGE_KERNEL)) |
| @@ -341,7 +341,7 @@ static void __init sh7785lcr_setup(char **cmdline_p) · 340 unmodified lines | ||
| 341 | 341 | pm_power_off = sh7785lcr_power_off; |
| 342 | 342 | |
| 343 | 343 | /* sm501 DRAM configuration */ |
| 344 | − sm501_reg = ioremap_nocache(SM107_REG_ADDR, SM501_DRAM_CONTROL); | |
| 344 | + sm501_reg = ioremap(SM107_REG_ADDR, SM501_DRAM_CONTROL); | |
| 345 | 345 | if (!sm501_reg) { |
| 346 | 346 | printk(KERN_ERR "%s: ioremap error.\n", __func__); |
| 347 | 347 | return; |
| @@ -137,7 +137,7 @@ void init_cayman_irq(void) · 136 unmodified lines | ||
| 137 | 137 | { |
| 138 | 138 | int i; |
| 139 | 139 | |
| 140 | − epld_virt = (unsigned long)ioremap_nocache(EPLD_BASE, 1024); | |
| 140 | + epld_virt = (unsigned long)ioremap(EPLD_BASE, 1024); | |
| 141 | 141 | if (!epld_virt) { |
| 142 | 142 | printk(KERN_ERR "Cayman IRQ: Unable to remap EPLD\n"); |
| 143 | 143 | return; |
| @@ -99,7 +99,7 @@ static int __init smsc_superio_setup(void) · 98 unmodified lines | ||
| 99 | 99 | { |
| 100 | 100 | unsigned char devid, devrev; |
| 101 | 101 | |
| 102 | − smsc_superio_virt = (unsigned long)ioremap_nocache(SMSC_SUPERIO_BASE, 1024); | |
| 102 | + smsc_superio_virt = (unsigned long)ioremap(SMSC_SUPERIO_BASE, 1024); | |
| 103 | 103 | if (!smsc_superio_virt) { |
| 104 | 104 | panic("Unable to remap SMSC SuperIO\n"); |
| 105 | 105 | } |
| @@ -32,7 +32,7 @@ static void __iomem *sdk7786_fpga_probe(void) · 31 unmodified lines | ||
| 32 | 32 | * is reserved. |
| 33 | 33 | */ |
| 34 | 34 | for (area = PA_AREA0; area < PA_AREA7; area += SZ_64M) { |
| 35 | − base = ioremap_nocache(area + FPGA_REGS_OFFSET, FPGA_REGS_SIZE); | |
| 35 | + base = ioremap(area + FPGA_REGS_OFFSET, FPGA_REGS_SIZE); | |
| 36 | 36 | if (!base) { |
| 37 | 37 | /* Failed to remap this area, move along. */ |
| 38 | 38 | continue; |
| @@ -96,7 +96,7 @@ static int heartbeat_drv_probe(struct platform_device *pdev) · 95 unmodified lines | ||
| 96 | 96 | return -ENOMEM; |
| 97 | 97 | } |
| 98 | 98 | |
| 99 | − hd->base = ioremap_nocache(res->start, resource_size(res)); | |
| 99 | + hd->base = ioremap(res->start, resource_size(res)); | |
| 100 | 100 | if (unlikely(!hd->base)) { |
| 101 | 101 | dev_err(&pdev->dev, "ioremap failed\n"); |
| 102 | 102 | |
| @@ -115,12 +115,12 @@ static int __init sh5pci_init(void) · 114 unmodified lines | ||
| 115 | 115 | return -EINVAL; |
| 116 | 116 | } |
| 117 | 117 | |
| 118 | − pcicr_virt = (unsigned long)ioremap_nocache(SH5PCI_ICR_BASE, 1024); | |
| 118 | + pcicr_virt = (unsigned long)ioremap(SH5PCI_ICR_BASE, 1024); | |
| 119 | 119 | if (!pcicr_virt) { |
| 120 | 120 | panic("Unable to remap PCICR\n"); |
| 121 | 121 | } |
| 122 | 122 | |
| 123 | − PCI_IO_AREA = (unsigned long)ioremap_nocache(SH5PCI_IO_BASE, 0x10000); | |
| 123 | + PCI_IO_AREA = (unsigned long)ioremap(SH5PCI_IO_BASE, 0x10000); | |
| 124 | 124 | if (!PCI_IO_AREA) { |
| 125 | 125 | panic("Unable to remap PCIIO\n"); |
| 126 | 126 | } |
| @@ -367,7 +367,6 @@ static inline void ioremap_fixed_init(void) { } · 366 unmodified lines | ||
| 367 | 367 | static inline int iounmap_fixed(void __iomem *addr) { return -EINVAL; } |
| 368 | 368 | #endif |
| 369 | 369 | |
| 370 | −#define ioremap_nocache ioremap | |
| 371 | 370 | #define ioremap_uc ioremap |
| 372 | 371 | |
| 373 | 372 | /* |
| @@ -124,7 +124,7 @@ void __init plat_irq_setup(void) · 123 unmodified lines | ||
| 124 | 124 | unsigned long reg; |
| 125 | 125 | int i; |
| 126 | 126 | |
| 127 | − intc_virt = (unsigned long)ioremap_nocache(INTC_BASE, 1024); | |
| 127 | + intc_virt = (unsigned long)ioremap(INTC_BASE, 1024); | |
| 128 | 128 | if (!intc_virt) { |
| 129 | 129 | panic("Unable to remap INTC\n"); |
| 130 | 130 | } |
| @@ -88,8 +88,8 @@ static void j2_start_cpu(unsigned int cpu, unsigned long entry_point) · 87 unmodified lines | ||
| 88 | 88 | if (!np) return; |
| 89 | 89 | |
| 90 | 90 | if (of_property_read_u32_array(np, "cpu-release-addr", regs, 2)) return; |
| 91 | − release = ioremap_nocache(regs[0], sizeof(u32)); | |
| 92 | − initpc = ioremap_nocache(regs[1], sizeof(u32)); | |
| 91 | + release = ioremap(regs[0], sizeof(u32)); | |
| 92 | + initpc = ioremap(regs[1], sizeof(u32)); | |
| 93 | 93 | |
| 94 | 94 | __raw_writel(entry_point, initpc); |
| 95 | 95 | __raw_writel(1, release); |
| @@ -68,7 +68,7 @@ static struct sh_clk_ops *sh5_clk_ops[] = { · 67 unmodified lines | ||
| 68 | 68 | |
| 69 | 69 | void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) |
| 70 | 70 | { |
| 71 | − cprc_base = (unsigned long)ioremap_nocache(CPRC_BASE, 1024); | |
| 71 | + cprc_base = (unsigned long)ioremap(CPRC_BASE, 1024); | |
| 72 | 72 | BUG_ON(!cprc_base); |
| 73 | 73 | |
| 74 | 74 | if (idx < ARRAY_SIZE(sh5_clk_ops)) |
| @@ -28,7 +28,7 @@ void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle, · 27 unmodified lines | ||
| 28 | 28 | arch_sync_dma_for_device(virt_to_phys(ret), size, |
| 29 | 29 | DMA_BIDIRECTIONAL); |
| 30 | 30 | |
| 31 | − ret_nocache = (void __force *)ioremap_nocache(virt_to_phys(ret), size); | |
| 31 | + ret_nocache = (void __force *)ioremap(virt_to_phys(ret), size); | |
| 32 | 32 | if (!ret_nocache) { |
| 33 | 33 | free_pages((unsigned long)ret, order); |
| 34 | 34 | return NULL; |
| @@ -406,7 +406,6 @@ static inline void __iomem *ioremap(unsigned long offset, unsigned long size) · 405 unmodified lines | ||
| 406 | 406 | return (void __iomem *)offset; |
| 407 | 407 | } |
| 408 | 408 | |
| 409 | −#define ioremap_nocache(X,Y) ioremap((X),(Y)) | |
| 410 | 409 | #define ioremap_uc(X,Y) ioremap((X),(Y)) |
| 411 | 410 | #define ioremap_wc(X,Y) ioremap((X),(Y)) |
| 412 | 411 | #define ioremap_wt(X,Y) ioremap((X),(Y)) |
| @@ -31,7 +31,6 @@ extern void __uc32_iounmap(volatile void __iomem *addr); · 30 unmodified lines | ||
| 31 | 31 | * |
| 32 | 32 | */ |
| 33 | 33 | #define ioremap(cookie, size) __uc32_ioremap(cookie, size) |
| 34 | −#define ioremap_nocache(cookie, size) __uc32_ioremap(cookie, size) | |
| 35 | 34 | #define iounmap(cookie) __uc32_iounmap(cookie) |
| 36 | 35 | |
| 37 | 36 | #define readb_relaxed readb |
| @@ -95,7 +95,7 @@ static inline void apbt_set_mapping(void) · 94 unmodified lines | ||
| 95 | 95 | printk(KERN_WARNING "No timer base from SFI, use default\n"); |
| 96 | 96 | apbt_address = APBT_DEFAULT_BASE; |
| 97 | 97 | } |
| 98 | − apbt_virt_address = ioremap_nocache(apbt_address, APBT_MMAP_SIZE); | |
| 98 | + apbt_virt_address = ioremap(apbt_address, APBT_MMAP_SIZE); | |
| 99 | 99 | if (!apbt_virt_address) { |
| 100 | 100 | pr_debug("Failed mapping APBT phy address at %lu\n",\ |
| 101 | 101 | (unsigned long)apbt_address); |
| @@ -84,7 +84,7 @@ static inline void hpet_writel(unsigned int d, unsigned int a) · 83 unmodified lines | ||
| 84 | 84 | |
| 85 | 85 | static inline void hpet_set_mapping(void) |
| 86 | 86 | { |
| 87 | − hpet_virt_address = ioremap_nocache(hpet_address, HPET_MMAP_SIZE); | |
| 87 | + hpet_virt_address = ioremap(hpet_address, HPET_MMAP_SIZE); | |
| 88 | 88 | } |
| 89 | 89 | |
| 90 | 90 | static inline void hpet_clear_mapping(void) |
| @@ -110,7 +110,7 @@ static void ich_force_enable_hpet(struct pci_dev *dev) · 109 unmodified lines | ||
| 110 | 110 | } |
| 111 | 111 | |
| 112 | 112 | /* use bits 31:14, 16 kB aligned */ |
| 113 | − rcba_base = ioremap_nocache(rcba, 0x4000); | |
| 113 | + rcba_base = ioremap(rcba, 0x4000); | |
| 114 | 114 | if (rcba_base == NULL) { |
| 115 | 115 | dev_printk(KERN_DEBUG, &dev->dev, "ioremap failed; " |
| 116 | 116 | "cannot force enable HPET\n"); |
| @@ -354,7 +354,7 @@ static ssize_t tboot_log_read(struct file *file, char __user *user_buf, size_t c · 353 unmodified lines | ||
| 354 | 354 | void *kbuf; |
| 355 | 355 | int ret = -EFAULT; |
| 356 | 356 | |
| 357 | − log_base = ioremap_nocache(TBOOT_SERIAL_LOG_ADDR, TBOOT_SERIAL_LOG_SIZE); | |
| 357 | + log_base = ioremap(TBOOT_SERIAL_LOG_ADDR, TBOOT_SERIAL_LOG_SIZE); | |
| 358 | 358 | if (!log_base) |
| 359 | 359 | return ret; |
| 360 | 360 | |
| @@ -79,7 +79,7 @@ static void do_read_far_test(void __iomem *p) · 78 unmodified lines | ||
| 79 | 79 | |
| 80 | 80 | static void do_test(unsigned long size) |
| 81 | 81 | { |
| 82 | − void __iomem *p = ioremap_nocache(mmio_address, size); | |
| 82 | + void __iomem *p = ioremap(mmio_address, size); | |
| 83 | 83 | if (!p) { |
| 84 | 84 | pr_err("could not ioremap, aborting.\n"); |
| 85 | 85 | return; |
| @@ -104,7 +104,7 @@ static void do_test_bulk_ioremapping(void) · 18 unmodified lines | ||
| 104 | 104 | int i; |
| 105 | 105 | |
| 106 | 106 | for (i = 0; i < 10; ++i) { |
| 107 | − p = ioremap_nocache(mmio_address, PAGE_SIZE); | |
| 107 | + p = ioremap(mmio_address, PAGE_SIZE); | |
| 108 | 108 | if (p) |
| 109 | 109 | iounmap(p); |
| 110 | 110 | } |
| @@ -105,7 +105,7 @@ static void __iomem *mcfg_ioremap(struct pci_mmcfg_region *cfg) · 104 unmodified lines | ||
| 105 | 105 | start = cfg->address + PCI_MMCFG_BUS_OFFSET(cfg->start_bus); |
| 106 | 106 | num_buses = cfg->end_bus - cfg->start_bus + 1; |
| 107 | 107 | size = PCI_MMCFG_BUS_OFFSET(num_buses); |
| 108 | − addr = ioremap_nocache(start, size); | |
| 108 | + addr = ioremap(start, size); | |
| 109 | 109 | if (addr) |
| 110 | 110 | addr -= PCI_MMCFG_BUS_OFFSET(cfg->start_bus); |
| 111 | 111 | return addr; |
| @@ -104,7 +104,7 @@ static void lpit_update_residency(struct lpit_residency_info *info, · 103 unmodified lines | ||
| 104 | 104 | |
| 105 | 105 | info->gaddr = lpit_native->residency_counter; |
| 106 | 106 | if (info->gaddr.space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) { |
| 107 | − info->iomem_addr = ioremap_nocache(info->gaddr.address, | |
| 107 | + info->iomem_addr = ioremap(info->gaddr.address, | |
| 108 | 108 | info->gaddr.bit_width / 8); |
| 109 | 109 | if (!info->iomem_addr) |
| 110 | 110 | return; |
| @@ -824,7 +824,7 @@ static int arasan_cf_probe(struct platform_device *pdev) · 823 unmodified lines | ||
| 824 | 824 | quirk |= CF_BROKEN_MWDMA | CF_BROKEN_UDMA; |
| 825 | 825 | |
| 826 | 826 | acdev->pbase = res->start; |
| 827 | − acdev->vbase = devm_ioremap_nocache(&pdev->dev, res->start, | |
| 827 | + acdev->vbase = devm_ioremap(&pdev->dev, res->start, | |
| 828 | 828 | resource_size(res)); |
| 829 | 829 | if (!acdev->vbase) { |
| 830 | 830 | dev_warn(&pdev->dev, "ioremap fail\n"); |
| @@ -891,7 +891,7 @@ static int octeon_cf_probe(struct platform_device *pdev) · 890 unmodified lines | ||
| 891 | 891 | of_node_put(dma_node); |
| 892 | 892 | return -EINVAL; |
| 893 | 893 | } |
| 894 | − cf_port->dma_base = (u64)devm_ioremap_nocache(&pdev->dev, res_dma->start, | |
| 894 | + cf_port->dma_base = (u64)devm_ioremap(&pdev->dev, res_dma->start, | |
| 895 | 895 | resource_size(res_dma)); |
| 896 | 896 | if (!cf_port->dma_base) { |
| 897 | 897 | of_node_put(dma_node); |
| @@ -909,7 +909,7 @@ static int octeon_cf_probe(struct platform_device *pdev) · 11 unmodified lines | ||
| 909 | 909 | if (!res_cs1) |
| 910 | 910 | return -EINVAL; |
| 911 | 911 | |
| 912 | − cs1 = devm_ioremap_nocache(&pdev->dev, res_cs1->start, | |
| 912 | + cs1 = devm_ioremap(&pdev->dev, res_cs1->start, | |
| 913 | 913 | resource_size(res_cs1)); |
| 914 | 914 | if (!cs1) |
| 915 | 915 | return rv; |
| @@ -925,7 +925,7 @@ static int octeon_cf_probe(struct platform_device *pdev) · 9 unmodified lines | ||
| 925 | 925 | if (!res_cs0) |
| 926 | 926 | return -EINVAL; |
| 927 | 927 | |
| 928 | − cs0 = devm_ioremap_nocache(&pdev->dev, res_cs0->start, | |
| 928 | + cs0 = devm_ioremap(&pdev->dev, res_cs0->start, | |
| 929 | 929 | resource_size(res_cs0)); |
| 930 | 930 | if (!cs0) |
| 931 | 931 | return rv; |
| @@ -140,7 +140,7 @@ static int rb532_pata_driver_probe(struct platform_device *pdev) · 139 unmodified lines | ||
| 140 | 140 | info->gpio_line = gpiod; |
| 141 | 141 | info->irq = irq; |
| 142 | 142 | |
| 143 | − info->iobase = devm_ioremap_nocache(&pdev->dev, res->start, | |
| 143 | + info->iobase = devm_ioremap(&pdev->dev, res->start, | |
| 144 | 144 | resource_size(res)); |
| 145 | 145 | if (!info->iobase) |
| 146 | 146 | return -ENOMEM; |
| @@ -31,12 +31,6 @@ · 30 unmodified lines | ||
| 31 | 31 | #include "suni.h" |
| 32 | 32 | #include "eni.h" |
| 33 | 33 | |
| 34 | −#if !defined(__i386__) && !defined(__x86_64__) | |
| 35 | −#ifndef ioremap_nocache | |
| 36 | −#define ioremap_nocache(X,Y) ioremap(X,Y) | |
| 37 | −#endif | |
| 38 | −#endif | |
| 39 | − | |
| 40 | 34 | /* |
| 41 | 35 | * TODO: |
| 42 | 36 | * |
| @@ -1725,7 +1719,7 @@ static int eni_do_init(struct atm_dev *dev) · 1682 unmodified lines | ||
| 1725 | 1719 | } |
| 1726 | 1720 | printk(KERN_NOTICE DEV_LABEL "(itf %d): rev.%d,base=0x%lx,irq=%d,", |
| 1727 | 1721 | dev->number,pci_dev->revision,real_base,eni_dev->irq); |
| 1728 | − if (!(base = ioremap_nocache(real_base,MAP_MAX_SIZE))) { | |
| 1722 | + if (!(base = ioremap(real_base,MAP_MAX_SIZE))) { | |
| 1729 | 1723 | printk("\n"); |
| 1730 | 1724 | printk(KERN_ERR DEV_LABEL "(itf %d): can't set up page " |
| 1731 | 1725 | "mapping\n",dev->number); |
| @@ -48,7 +48,7 @@ int bcma_core_chipcommon_b_init(struct bcma_drv_cc_b *ccb) · 47 unmodified lines | ||
| 48 | 48 | return 0; |
| 49 | 49 | |
| 50 | 50 | ccb->setup_done = 1; |
| 51 | − ccb->mii = ioremap_nocache(ccb->core->addr_s[1], BCMA_CORE_SIZE); | |
| 51 | + ccb->mii = ioremap(ccb->core->addr_s[1], BCMA_CORE_SIZE); | |
| 52 | 52 | if (!ccb->mii) |
| 53 | 53 | return -ENOMEM; |
| 54 | 54 | |
| @@ -115,7 +115,7 @@ static int bcma_extpci_read_config(struct bcma_drv_pci *pc, unsigned int dev, · 114 unmodified lines | ||
| 115 | 115 | if (unlikely(!addr)) |
| 116 | 116 | goto out; |
| 117 | 117 | err = -ENOMEM; |
| 118 | − mmio = ioremap_nocache(addr, sizeof(val)); | |
| 118 | + mmio = ioremap(addr, sizeof(val)); | |
| 119 | 119 | if (!mmio) |
| 120 | 120 | goto out; |
| 121 | 121 | |
| @@ -180,7 +180,7 @@ static int bcma_extpci_write_config(struct bcma_drv_pci *pc, unsigned int dev, · 58 unmodified lines | ||
| 180 | 180 | if (unlikely(!addr)) |
| 181 | 181 | goto out; |
| 182 | 182 | err = -ENOMEM; |
| 183 | − mmio = ioremap_nocache(addr, sizeof(val)); | |
| 183 | + mmio = ioremap(addr, sizeof(val)); | |
| 184 | 184 | if (!mmio) |
| 185 | 185 | goto out; |
| 186 | 186 | |
| @@ -515,7 +515,7 @@ void bcma_core_pci_hostmode_init(struct bcma_drv_pci *pc) · 328 unmodified lines | ||
| 515 | 515 | /* Ok, ready to run, register it to the system. |
| 516 | 516 | * The following needs change, if we want to port hostmode |
| 517 | 517 | * to non-MIPS platform. */ |
| 518 | − io_map_base = (unsigned long)ioremap_nocache(pc_host->mem_resource.start, | |
| 518 | + io_map_base = (unsigned long)ioremap(pc_host->mem_resource.start, | |
| 519 | 519 | resource_size(&pc_host->mem_resource)); |
| 520 | 520 | pc_host->pci_controller.io_map_base = io_map_base; |
| 521 | 521 | set_io_port_base(pc_host->pci_controller.io_map_base); |
| @@ -172,7 +172,7 @@ int __init bcma_host_soc_register(struct bcma_soc *soc) · 171 unmodified lines | ||
| 172 | 172 | /* iomap only first core. We have to read some register on this core |
| 173 | 173 | * to scan the bus. |
| 174 | 174 | */ |
| 175 | − bus->mmio = ioremap_nocache(BCMA_ADDR_BASE, BCMA_CORE_SIZE * 1); | |
| 175 | + bus->mmio = ioremap(BCMA_ADDR_BASE, BCMA_CORE_SIZE * 1); | |
| 176 | 176 | if (!bus->mmio) |
| 177 | 177 | return -ENOMEM; |
| 178 | 178 | |
| @@ -425,11 +425,11 @@ static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr, · 424 unmodified lines | ||
| 425 | 425 | } |
| 426 | 426 | } |
| 427 | 427 | if (bus->hosttype == BCMA_HOSTTYPE_SOC) { |
| 428 | − core->io_addr = ioremap_nocache(core->addr, BCMA_CORE_SIZE); | |
| 428 | + core->io_addr = ioremap(core->addr, BCMA_CORE_SIZE); | |
| 429 | 429 | if (!core->io_addr) |
| 430 | 430 | return -ENOMEM; |
| 431 | 431 | if (core->wrap) { |
| 432 | − core->io_wrap = ioremap_nocache(core->wrap, | |
| 432 | + core->io_wrap = ioremap(core->wrap, | |
| 433 | 433 | BCMA_CORE_SIZE); |
| 434 | 434 | if (!core->io_wrap) { |
| 435 | 435 | iounmap(core->io_addr); |
| @@ -472,7 +472,7 @@ int bcma_bus_scan(struct bcma_bus *bus) · 36 unmodified lines | ||
| 472 | 472 | |
| 473 | 473 | erombase = bcma_scan_read32(bus, 0, BCMA_CC_EROM); |
| 474 | 474 | if (bus->hosttype == BCMA_HOSTTYPE_SOC) { |
| 475 | − eromptr = ioremap_nocache(erombase, BCMA_CORE_SIZE); | |
| 475 | + eromptr = ioremap(erombase, BCMA_CORE_SIZE); | |
| 476 | 476 | if (!eromptr) |
| 477 | 477 | return -ENOMEM; |
| 478 | 478 | } else { |
| @@ -827,7 +827,7 @@ static int mm_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) · 826 unmodified lines | ||
| 827 | 827 | goto failed_req_csr; |
| 828 | 828 | } |
| 829 | 829 | |
| 830 | − card->csr_remap = ioremap_nocache(csr_base, csr_len); | |
| 830 | + card->csr_remap = ioremap(csr_base, csr_len); | |
| 831 | 831 | if (!card->csr_remap) { |
| 832 | 832 | dev_printk(KERN_ERR, &card->dev->dev, |
| 833 | 833 | "Unable to remap memory region\n"); |
| @@ -97,12 +97,12 @@ int __must_check fsl_create_mc_io(struct device *dev, · 96 unmodified lines | ||
| 97 | 97 | return -EBUSY; |
| 98 | 98 | } |
| 99 | 99 | |
| 100 | − mc_portal_virt_addr = devm_ioremap_nocache(dev, | |
| 100 | + mc_portal_virt_addr = devm_ioremap(dev, | |
| 101 | 101 | mc_portal_phys_addr, |
| 102 | 102 | mc_portal_size); |
| 103 | 103 | if (!mc_portal_virt_addr) { |
| 104 | 104 | dev_err(dev, |
| 105 | − "devm_ioremap_nocache failed for MC portal %pa\n", | |
| 105 | + "devm_ioremap failed for MC portal %pa\n", | |
| 106 | 106 | &mc_portal_phys_addr); |
| 107 | 107 | return -ENXIO; |
| 108 | 108 | } |
| @@ -941,7 +941,7 @@ int agp_generic_create_gatt_table(struct agp_bridge_data *bridge) · 940 unmodified lines | ||
| 941 | 941 | |
| 942 | 942 | bridge->gatt_table = (u32 __iomem *)table; |
| 943 | 943 | #else |
| 944 | − bridge->gatt_table = ioremap_nocache(virt_to_phys(table), | |
| 944 | + bridge->gatt_table = ioremap(virt_to_phys(table), | |
| 945 | 945 | (PAGE_SIZE * (1 << page_order))); |
| 946 | 946 | bridge->driver->cache_flush(); |
| 947 | 947 | #endif |
| @@ -1087,7 +1087,7 @@ static void intel_i9xx_setup_flush(void) · 1086 unmodified lines | ||
| 1087 | 1087 | } |
| 1088 | 1088 | |
| 1089 | 1089 | if (intel_private.ifp_resource.start) |
| 1090 | − intel_private.i9xx_flush_page = ioremap_nocache(intel_private.ifp_resource.start, PAGE_SIZE); | |
| 1090 | + intel_private.i9xx_flush_page = ioremap(intel_private.ifp_resource.start, PAGE_SIZE); | |
| 1091 | 1091 | if (!intel_private.i9xx_flush_page) |
| 1092 | 1092 | dev_err(&intel_private.pcidev->dev, |
| 1093 | 1093 | "can't ioremap flush page - no chipset flushing\n"); |
| @@ -204,7 +204,7 @@ static int __init applicom_init(void) · 203 unmodified lines | ||
| 204 | 204 | if (pci_enable_device(dev)) |
| 205 | 205 | return -EIO; |
| 206 | 206 | |
| 207 | − RamIO = ioremap_nocache(pci_resource_start(dev, 0), LEN_RAM_IO); | |
| 207 | + RamIO = ioremap(pci_resource_start(dev, 0), LEN_RAM_IO); | |
| 208 | 208 | |
| 209 | 209 | if (!RamIO) { |
| 210 | 210 | printk(KERN_INFO "ac.o: Failed to ioremap PCI memory " |
| @@ -259,7 +259,7 @@ static int __init applicom_init(void) · 48 unmodified lines | ||
| 259 | 259 | /* Now try the specified ISA cards */ |
| 260 | 260 | |
| 261 | 261 | for (i = 0; i < MAX_ISA_BOARD; i++) { |
| 262 | − RamIO = ioremap_nocache(mem + (LEN_RAM_IO * i), LEN_RAM_IO); | |
| 262 | + RamIO = ioremap(mem + (LEN_RAM_IO * i), LEN_RAM_IO); | |
| 263 | 263 | |
| 264 | 264 | if (!RamIO) { |
| 265 | 265 | printk(KERN_INFO "ac.o: Failed to ioremap the ISA card's memory space (slot #%d)\n", i + 1); |
| @@ -317,7 +317,7 @@ PFX "RNG, try using the 'no_fwh_detect' option.\n"; · 316 unmodified lines | ||
| 317 | 317 | return -EBUSY; |
| 318 | 318 | } |
| 319 | 319 | |
| 320 | − intel_rng_hw->mem = ioremap_nocache(INTEL_FWH_ADDR, INTEL_FWH_ADDR_LEN); | |
| 320 | + intel_rng_hw->mem = ioremap(INTEL_FWH_ADDR, INTEL_FWH_ADDR_LEN); | |
| 321 | 321 | if (intel_rng_hw->mem == NULL) |
| 322 | 322 | return -EBUSY; |
| 323 | 323 | |
| @@ -81,13 +81,13 @@ static int octeon_rng_probe(struct platform_device *pdev) · 80 unmodified lines | ||
| 81 | 81 | return -ENOENT; |
| 82 | 82 | |
| 83 | 83 | |
| 84 | − rng->control_status = devm_ioremap_nocache(&pdev->dev, | |
| 84 | + rng->control_status = devm_ioremap(&pdev->dev, | |
| 85 | 85 | res_ports->start, |
| 86 | 86 | sizeof(u64)); |
| 87 | 87 | if (!rng->control_status) |
| 88 | 88 | return -ENOENT; |
| 89 | 89 | |
| 90 | − rng->result = devm_ioremap_nocache(&pdev->dev, | |
| 90 | + rng->result = devm_ioremap(&pdev->dev, | |
| 91 | 91 | res_result->start, |
| 92 | 92 | sizeof(u64)); |
| 93 | 93 | if (!rng->result) |
| @@ -37,8 +37,8 @@ static u16 __init rz_cpg_read_mode_pins(void) · 36 unmodified lines | ||
| 37 | 37 | void __iomem *ppr0, *pibc0; |
| 38 | 38 | u16 modes; |
| 39 | 39 | |
| 40 | − ppr0 = ioremap_nocache(PPR0, 2); | |
| 41 | − pibc0 = ioremap_nocache(PIBC0, 2); | |
| 40 | + ppr0 = ioremap(PPR0, 2); | |
| 41 | + pibc0 = ioremap(PIBC0, 2); | |
| 42 | 42 | BUG_ON(!ppr0 || !pibc0); |
| 43 | 43 | iowrite16(4, pibc0); /* enable input buffer */ |
| 44 | 44 | modes = ioread16(ppr0); |
| @@ -905,7 +905,7 @@ static int sh_cmt_map_memory(struct sh_cmt_device *cmt) · 904 unmodified lines | ||
| 905 | 905 | return -ENXIO; |
| 906 | 906 | } |
| 907 | 907 | |
| 908 | − cmt->mapbase = ioremap_nocache(mem->start, resource_size(mem)); | |
| 908 | + cmt->mapbase = ioremap(mem->start, resource_size(mem)); | |
| 909 | 909 | if (cmt->mapbase == NULL) { |
| 910 | 910 | dev_err(&cmt->pdev->dev, "failed to remap I/O memory\n"); |
| 911 | 911 | return -ENXIO; |
| @@ -377,7 +377,7 @@ static int sh_mtu2_map_memory(struct sh_mtu2_device *mtu) · 376 unmodified lines | ||
| 377 | 377 | return -ENXIO; |
| 378 | 378 | } |
| 379 | 379 | |
| 380 | − mtu->mapbase = ioremap_nocache(res->start, resource_size(res)); | |
| 380 | + mtu->mapbase = ioremap(res->start, resource_size(res)); | |
| 381 | 381 | if (mtu->mapbase == NULL) |
| 382 | 382 | return -ENXIO; |
| 383 | 383 | |
| @@ -486,7 +486,7 @@ static int sh_tmu_map_memory(struct sh_tmu_device *tmu) · 485 unmodified lines | ||
| 486 | 486 | return -ENXIO; |
| 487 | 487 | } |
| 488 | 488 | |
| 489 | − tmu->mapbase = ioremap_nocache(res->start, resource_size(res)); | |
| 489 | + tmu->mapbase = ioremap(res->start, resource_size(res)); | |
| 490 | 490 | if (tmu->mapbase == NULL) |
| 491 | 491 | return -ENXIO; |
| 492 | 492 | |
| @@ -445,7 +445,7 @@ static int __init pcc_cpufreq_probe(void) · 444 unmodified lines | ||
| 445 | 445 | goto out_free; |
| 446 | 446 | } |
| 447 | 447 | |
| 448 | − pcch_virt_addr = ioremap_nocache(mem_resource->minimum, | |
| 448 | + pcch_virt_addr = ioremap(mem_resource->minimum, | |
| 449 | 449 | mem_resource->address_length); |
| 450 | 450 | if (pcch_virt_addr == NULL) { |
| 451 | 451 | pr_debug("probe: could not map shared mem region\n"); |
| @@ -2507,7 +2507,7 @@ static int hifn_probe(struct pci_dev *pdev, const struct pci_device_id *id) · 2506 unmodified lines | ||
| 2507 | 2507 | addr = pci_resource_start(pdev, i); |
| 2508 | 2508 | size = pci_resource_len(pdev, i); |
| 2509 | 2509 | |
| 2510 | − dev->bar[i] = ioremap_nocache(addr, size); | |
| 2510 | + dev->bar[i] = ioremap(addr, size); | |
| 2511 | 2511 | if (!dev->bar[i]) { |
| 2512 | 2512 | err = -ENOMEM; |
| 2513 | 2513 | goto err_out_unmap_bars; |
| @@ -772,10 +772,10 @@ static int request_and_map(struct platform_device *pdev, const char *name, · 771 unmodified lines | ||
| 772 | 772 | return -EBUSY; |
| 773 | 773 | } |
| 774 | 774 | |
| 775 | − *ptr = devm_ioremap_nocache(device, region->start, | |
| 775 | + *ptr = devm_ioremap(device, region->start, | |
| 776 | 776 | resource_size(region)); |
| 777 | 777 | if (*ptr == NULL) { |
| 778 | − dev_err(device, "ioremap_nocache of %s failed!", name); | |
| 778 | + dev_err(device, "ioremap of %s failed!", name); | |
| 779 | 779 | return -ENOMEM; |
| 780 | 780 | } |
| 781 | 781 | |
| @@ -324,7 +324,7 @@ static int i3000_probe1(struct pci_dev *pdev, int dev_idx) · 323 unmodified lines | ||
| 324 | 324 | |
| 325 | 325 | pci_read_config_dword(pdev, I3000_MCHBAR, (u32 *) & mchbar); |
| 326 | 326 | mchbar &= I3000_MCHBAR_MASK; |
| 327 | − window = ioremap_nocache(mchbar, I3000_MMR_WINDOW_SIZE); | |
| 327 | + window = ioremap(mchbar, I3000_MMR_WINDOW_SIZE); | |
| 328 | 328 | if (!window) { |
| 329 | 329 | printk(KERN_ERR "i3000: cannot map mmio space at 0x%lx\n", |
| 330 | 330 | mchbar); |
| @@ -280,7 +280,7 @@ static void __iomem *i3200_map_mchbar(struct pci_dev *pdev) · 279 unmodified lines | ||
| 280 | 280 | return NULL; |
| 281 | 281 | } |
| 282 | 282 | |
| 283 | − window = ioremap_nocache(u.mchbar, I3200_MMR_WINDOW_SIZE); | |
| 283 | + window = ioremap(u.mchbar, I3200_MMR_WINDOW_SIZE); | |
| 284 | 284 | if (!window) |
| 285 | 285 | printk(KERN_ERR "i3200: cannot map mmio space at 0x%llx\n", |
| 286 | 286 | (unsigned long long)u.mchbar); |
| @@ -485,7 +485,7 @@ static int i82975x_probe1(struct pci_dev *pdev, int dev_idx) · 484 unmodified lines | ||
| 485 | 485 | goto fail0; |
| 486 | 486 | } |
| 487 | 487 | mchbar &= 0xffffc000; /* bits 31:14 used for 16K window */ |
| 488 | − mch_window = ioremap_nocache(mchbar, 0x1000); | |
| 488 | + mch_window = ioremap(mchbar, 0x1000); | |
| 489 | 489 | if (!mch_window) { |
| 490 | 490 | edac_dbg(3, "error ioremapping MCHBAR!\n"); |
| 491 | 491 | goto fail0; |
| @@ -357,7 +357,7 @@ static void __iomem *ie31200_map_mchbar(struct pci_dev *pdev) · 356 unmodified lines | ||
| 357 | 357 | return NULL; |
| 358 | 358 | } |
| 359 | 359 | |
| 360 | − window = ioremap_nocache(u.mchbar, IE31200_MMR_WINDOW_SIZE); | |
| 360 | + window = ioremap(u.mchbar, IE31200_MMR_WINDOW_SIZE); | |
| 361 | 361 | if (!window) |
| 362 | 362 | ie31200_printk(KERN_ERR, "Cannot map mmio space at 0x%llx\n", |
| 363 | 363 | (unsigned long long)u.mchbar); |
| @@ -266,7 +266,7 @@ static void __iomem *x38_map_mchbar(struct pci_dev *pdev) · 265 unmodified lines | ||
| 266 | 266 | return NULL; |
| 267 | 267 | } |
| 268 | 268 | |
| 269 | − window = ioremap_nocache(u.mchbar, X38_MMR_WINDOW_SIZE); | |
| 269 | + window = ioremap(u.mchbar, X38_MMR_WINDOW_SIZE); | |
| 270 | 270 | if (!window) |
| 271 | 271 | printk(KERN_ERR "x38: cannot map mmio space at 0x%llx\n", |
| 272 | 272 | (unsigned long long)u.mchbar); |
| @@ -551,7 +551,7 @@ add_card(struct pci_dev *dev, const struct pci_device_id *unused) · 550 unmodified lines | ||
| 551 | 551 | INIT_LIST_HEAD(&lynx->client_list); |
| 552 | 552 | kref_init(&lynx->kref); |
| 553 | 553 | |
| 554 | − lynx->registers = ioremap_nocache(pci_resource_start(dev, 0), | |
| 554 | + lynx->registers = ioremap(pci_resource_start(dev, 0), | |
| 555 | 555 | PCILYNX_MAX_REGISTER); |
| 556 | 556 | if (lynx->registers == NULL) { |
| 557 | 557 | dev_err(&dev->dev, "Failed to map registers\n"); |
| @@ -120,7 +120,7 @@ int bcm47xx_nvram_init_from_mem(u32 base, u32 lim) · 119 unmodified lines | ||
| 120 | 120 | void __iomem *iobase; |
| 121 | 121 | int err; |
| 122 | 122 | |
| 123 | − iobase = ioremap_nocache(base, lim); | |
| 123 | + iobase = ioremap(base, lim); | |
| 124 | 124 | if (!iobase) |
| 125 | 125 | return -ENOMEM; |
| 126 | 126 | |
| @@ -503,7 +503,7 @@ int psb_gtt_init(struct drm_device *dev, int resume) · 502 unmodified lines | ||
| 503 | 503 | * Map the GTT and the stolen memory area |
| 504 | 504 | */ |
| 505 | 505 | if (!resume) |
| 506 | − dev_priv->gtt_map = ioremap_nocache(pg->gtt_phys_start, | |
| 506 | + dev_priv->gtt_map = ioremap(pg->gtt_phys_start, | |
| 507 | 507 | gtt_pages << PAGE_SHIFT); |
| 508 | 508 | if (!dev_priv->gtt_map) { |
| 509 | 509 | dev_err(dev->dev, "Failure to map gtt.\n"); |
| @@ -256,7 +256,7 @@ static int psb_driver_load(struct drm_device *dev, unsigned long flags) · 255 unmodified lines | ||
| 256 | 256 | PSB_AUX_RESOURCE); |
| 257 | 257 | resource_len = pci_resource_len(dev_priv->aux_pdev, |
| 258 | 258 | PSB_AUX_RESOURCE); |
| 259 | − dev_priv->aux_reg = ioremap_nocache(resource_start, | |
| 259 | + dev_priv->aux_reg = ioremap(resource_start, | |
| 260 | 260 | resource_len); |
| 261 | 261 | if (!dev_priv->aux_reg) |
| 262 | 262 | goto out_err; |
| @@ -211,7 +211,7 @@ static int hibmc_hw_map(struct hibmc_drm_private *priv) · 210 unmodified lines | ||
| 211 | 211 | |
| 212 | 212 | ioaddr = pci_resource_start(pdev, 1); |
| 213 | 213 | iosize = pci_resource_len(pdev, 1); |
| 214 | − priv->mmio = devm_ioremap_nocache(dev->dev, ioaddr, iosize); | |
| 214 | + priv->mmio = devm_ioremap(dev->dev, ioaddr, iosize); | |
| 215 | 215 | if (!priv->mmio) { |
| 216 | 216 | DRM_ERROR("Cannot map mmio region\n"); |
| 217 | 217 | return -ENOMEM; |
| @@ -2847,7 +2847,7 @@ static int ggtt_probe_common(struct i915_ggtt *ggtt, u64 size) · 2846 unmodified lines | ||
| 2847 | 2847 | * readback check when writing GTT PTE entries. |
| 2848 | 2848 | */ |
| 2849 | 2849 | if (IS_GEN9_LP(dev_priv) || INTEL_GEN(dev_priv) >= 10) |
| 2850 | − ggtt->gsm = ioremap_nocache(phys_addr, size); | |
| 2850 | + ggtt->gsm = ioremap(phys_addr, size); | |
| 2851 | 2851 | else |
| 2852 | 2852 | ggtt->gsm = ioremap_wc(phys_addr, size); |
| 2853 | 2853 | if (!ggtt->gsm) { |
| @@ -138,7 +138,7 @@ void __iomem *msm_ioremap(struct platform_device *pdev, const char *name, · 137 unmodified lines | ||
| 138 | 138 | |
| 139 | 139 | size = resource_size(res); |
| 140 | 140 | |
| 141 | − ptr = devm_ioremap_nocache(&pdev->dev, res->start, size); | |
| 141 | + ptr = devm_ioremap(&pdev->dev, res->start, size); | |
| 142 | 142 | if (!ptr) { |
| 143 | 143 | DRM_DEV_ERROR(&pdev->dev, "failed to ioremap: %s\n", name); |
| 144 | 144 | return ERR_PTR(-ENOMEM); |
| @@ -443,7 +443,7 @@ static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_ · 442 unmodified lines | ||
| 443 | 443 | mem->bus.size); |
| 444 | 444 | else |
| 445 | 445 | mem->bus.addr = |
| 446 | − ioremap_nocache(mem->bus.base + mem->bus.offset, | |
| 446 | + ioremap(mem->bus.base + mem->bus.offset, | |
| 447 | 447 | mem->bus.size); |
| 448 | 448 | if (!mem->bus.addr) |
| 449 | 449 | return -ENOMEM; |
| @@ -534,7 +534,7 @@ static int sti_dvo_probe(struct platform_device *pdev) · 533 unmodified lines | ||
| 534 | 534 | DRM_ERROR("Invalid dvo resource\n"); |
| 535 | 535 | return -ENOMEM; |
| 536 | 536 | } |
| 537 | − dvo->regs = devm_ioremap_nocache(dev, res->start, | |
| 537 | + dvo->regs = devm_ioremap(dev, res->start, | |
| 538 | 538 | resource_size(res)); |
| 539 | 539 | if (!dvo->regs) |
| 540 | 540 | return -ENOMEM; |
| @@ -759,14 +759,14 @@ static int sti_hda_probe(struct platform_device *pdev) · 758 unmodified lines | ||
| 759 | 759 | DRM_ERROR("Invalid hda resource\n"); |
| 760 | 760 | return -ENOMEM; |
| 761 | 761 | } |
| 762 | − hda->regs = devm_ioremap_nocache(dev, res->start, resource_size(res)); | |
| 762 | + hda->regs = devm_ioremap(dev, res->start, resource_size(res)); | |
| 763 | 763 | if (!hda->regs) |
| 764 | 764 | return -ENOMEM; |
| 765 | 765 | |
| 766 | 766 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, |
| 767 | 767 | "video-dacs-ctrl"); |
| 768 | 768 | if (res) { |
| 769 | − hda->video_dacs_ctrl = devm_ioremap_nocache(dev, res->start, | |
| 769 | + hda->video_dacs_ctrl = devm_ioremap(dev, res->start, | |
| 770 | 770 | resource_size(res)); |
| 771 | 771 | if (!hda->video_dacs_ctrl) |
| 772 | 772 | return -ENOMEM; |
| @@ -1393,7 +1393,7 @@ static int sti_hdmi_probe(struct platform_device *pdev) · 1392 unmodified lines | ||
| 1393 | 1393 | ret = -ENOMEM; |
| 1394 | 1394 | goto release_adapter; |
| 1395 | 1395 | } |
| 1396 | − hdmi->regs = devm_ioremap_nocache(dev, res->start, resource_size(res)); | |
| 1396 | + hdmi->regs = devm_ioremap(dev, res->start, resource_size(res)); | |
| 1397 | 1397 | if (!hdmi->regs) { |
| 1398 | 1398 | ret = -ENOMEM; |
| 1399 | 1399 | goto release_adapter; |
| @@ -860,7 +860,7 @@ static int sti_tvout_probe(struct platform_device *pdev) · 859 unmodified lines | ||
| 860 | 860 | DRM_ERROR("Invalid glue resource\n"); |
| 861 | 861 | return -ENOMEM; |
| 862 | 862 | } |
| 863 | − tvout->regs = devm_ioremap_nocache(dev, res->start, resource_size(res)); | |
| 863 | + tvout->regs = devm_ioremap(dev, res->start, resource_size(res)); | |
| 864 | 864 | if (!tvout->regs) |
| 865 | 865 | return -ENOMEM; |
| 866 | 866 | |
| @@ -393,7 +393,7 @@ static int vtg_probe(struct platform_device *pdev) · 392 unmodified lines | ||
| 393 | 393 | DRM_ERROR("Get memory resource failed\n"); |
| 394 | 394 | return -ENOMEM; |
| 395 | 395 | } |
| 396 | − vtg->regs = devm_ioremap_nocache(dev, res->start, resource_size(res)); | |
| 396 | + vtg->regs = devm_ioremap(dev, res->start, resource_size(res)); | |
| 397 | 397 | if (!vtg->regs) { |
| 398 | 398 | DRM_ERROR("failed to remap I/O memory\n"); |
| 399 | 399 | return -ENOMEM; |
| @@ -256,7 +256,7 @@ static int tilcdc_init(struct drm_driver *ddrv, struct device *dev) · 255 unmodified lines | ||
| 256 | 256 | goto init_failed; |
| 257 | 257 | } |
| 258 | 258 | |
| 259 | − priv->mmio = ioremap_nocache(res->start, resource_size(res)); | |
| 259 | + priv->mmio = ioremap(res->start, resource_size(res)); | |
| 260 | 260 | if (!priv->mmio) { |
| 261 | 261 | dev_err(dev, "failed to ioremap\n"); |
| 262 | 262 | ret = -ENOMEM; |
| @@ -218,7 +218,7 @@ static int ttm_mem_reg_ioremap(struct ttm_bo_device *bdev, struct ttm_mem_reg *m · 217 unmodified lines | ||
| 218 | 218 | if (mem->placement & TTM_PL_FLAG_WC) |
| 219 | 219 | addr = ioremap_wc(mem->bus.base + mem->bus.offset, mem->bus.size); |
| 220 | 220 | else |
| 221 | − addr = ioremap_nocache(mem->bus.base + mem->bus.offset, mem->bus.size); | |
| 221 | + addr = ioremap(mem->bus.base + mem->bus.offset, mem->bus.size); | |
| 222 | 222 | if (!addr) { |
| 223 | 223 | (void) ttm_mem_io_lock(man, false); |
| 224 | 224 | ttm_mem_io_free(bdev, mem); |
| @@ -565,7 +565,7 @@ static int ttm_bo_ioremap(struct ttm_buffer_object *bo, · 340 unmodified lines | ||
| 565 | 565 | map->virtual = ioremap_wc(bo->mem.bus.base + bo->mem.bus.offset + offset, |
| 566 | 566 | size); |
| 567 | 567 | else |
| 568 | − map->virtual = ioremap_nocache(bo->mem.bus.base + bo->mem.bus.offset + offset, | |
| 568 | + map->virtual = ioremap(bo->mem.bus.base + bo->mem.bus.offset + offset, | |
| 569 | 569 | size); |
| 570 | 570 | } |
| 571 | 571 | return (!map->virtual) ? -ENOMEM : 0; |
| @@ -528,7 +528,7 @@ static int i5k_amb_probe(struct platform_device *pdev) · 527 unmodified lines | ||
| 528 | 528 | goto err; |
| 529 | 529 | } |
| 530 | 530 | |
| 531 | − data->amb_mmio = ioremap_nocache(data->amb_base, data->amb_len); | |
| 531 | + data->amb_mmio = ioremap(data->amb_base, data->amb_len); | |
| 532 | 532 | if (!data->amb_mmio) { |
| 533 | 533 | res = -EBUSY; |
| 534 | 534 | goto err_map_failed; |
| @@ -369,7 +369,7 @@ static int highlander_i2c_probe(struct platform_device *pdev) · 368 unmodified lines | ||
| 369 | 369 | if (unlikely(!dev)) |
| 370 | 370 | return -ENOMEM; |
| 371 | 371 | |
| 372 | − dev->base = ioremap_nocache(res->start, resource_size(res)); | |
| 372 | + dev->base = ioremap(res->start, resource_size(res)); | |
| 373 | 373 | if (unlikely(!dev->base)) { |
| 374 | 374 | ret = -ENXIO; |
| 375 | 375 | goto err; |
| @@ -281,7 +281,7 @@ static int pmcmsptwi_probe(struct platform_device *pldev) · 280 unmodified lines | ||
| 281 | 281 | } |
| 282 | 282 | |
| 283 | 283 | /* remap the memory */ |
| 284 | − pmcmsptwi_data.iobase = ioremap_nocache(res->start, | |
| 284 | + pmcmsptwi_data.iobase = ioremap(res->start, | |
| 285 | 285 | resource_size(res)); |
| 286 | 286 | if (!pmcmsptwi_data.iobase) { |
| 287 | 287 | dev_err(&pldev->dev, |
| @@ -442,7 +442,7 @@ int bnxt_qplib_enable_nq(struct pci_dev *pdev, struct bnxt_qplib_nq *nq, · 441 unmodified lines | ||
| 442 | 442 | goto fail; |
| 443 | 443 | } |
| 444 | 444 | /* Unconditionally map 8 bytes to support 57500 series */ |
| 445 | − nq->bar_reg_iomem = ioremap_nocache(nq_base + nq->bar_reg_off, 8); | |
| 445 | + nq->bar_reg_iomem = ioremap(nq_base + nq->bar_reg_off, 8); | |
| 446 | 446 | if (!nq->bar_reg_iomem) { |
| 447 | 447 | rc = -ENOMEM; |
| 448 | 448 | goto fail; |
| @@ -717,7 +717,7 @@ int bnxt_qplib_enable_rcfw_channel(struct pci_dev *pdev, · 716 unmodified lines | ||
| 717 | 717 | if (!res_base) |
| 718 | 718 | return -ENOMEM; |
| 719 | 719 | |
| 720 | − rcfw->cmdq_bar_reg_iomem = ioremap_nocache(res_base + | |
| 720 | + rcfw->cmdq_bar_reg_iomem = ioremap(res_base + | |
| 721 | 721 | RCFW_COMM_BASE_OFFSET, |
| 722 | 722 | RCFW_COMM_SIZE); |
| 723 | 723 | if (!rcfw->cmdq_bar_reg_iomem) { |
| @@ -739,7 +739,7 @@ int bnxt_qplib_enable_rcfw_channel(struct pci_dev *pdev, · 15 unmodified lines | ||
| 739 | 739 | "CREQ BAR region %d resc start is 0!\n", |
| 740 | 740 | rcfw->creq_bar_reg); |
| 741 | 741 | /* Unconditionally map 8 bytes to support 57500 series */ |
| 742 | − rcfw->creq_bar_reg_iomem = ioremap_nocache(res_base + cp_bar_reg_off, | |
| 742 | + rcfw->creq_bar_reg_iomem = ioremap(res_base + cp_bar_reg_off, | |
| 743 | 743 | 8); |
| 744 | 744 | if (!rcfw->creq_bar_reg_iomem) { |
| 745 | 745 | dev_err(&rcfw->pdev->dev, "CREQ BAR region %d mapping failed\n", |
| @@ -704,7 +704,7 @@ static int bnxt_qplib_alloc_dpi_tbl(struct bnxt_qplib_res *res, · 703 unmodified lines | ||
| 704 | 704 | return -ENOMEM; |
| 705 | 705 | } |
| 706 | 706 | |
| 707 | − dpit->dbr_bar_reg_iomem = ioremap_nocache(bar_reg_base + dbr_offset, | |
| 707 | + dpit->dbr_bar_reg_iomem = ioremap(bar_reg_base + dbr_offset, | |
| 708 | 708 | dbr_len); |
| 709 | 709 | if (!dpit->dbr_bar_reg_iomem) { |
| 710 | 710 | dev_err(&res->pdev->dev, |
| @@ -161,7 +161,7 @@ int hfi1_pcie_ddinit(struct hfi1_devdata *dd, struct pci_dev *pdev) · 160 unmodified lines | ||
| 161 | 161 | return -EINVAL; |
| 162 | 162 | } |
| 163 | 163 | |
| 164 | − dd->kregbase1 = ioremap_nocache(addr, RCV_ARRAY); | |
| 164 | + dd->kregbase1 = ioremap(addr, RCV_ARRAY); | |
| 165 | 165 | if (!dd->kregbase1) { |
| 166 | 166 | dd_dev_err(dd, "UC mapping of kregbase1 failed\n"); |
| 167 | 167 | return -ENOMEM; |
| @@ -179,7 +179,7 @@ int hfi1_pcie_ddinit(struct hfi1_devdata *dd, struct pci_dev *pdev) · 11 unmodified lines | ||
| 179 | 179 | dd_dev_info(dd, "RcvArray count: %u\n", rcv_array_count); |
| 180 | 180 | dd->base2_start = RCV_ARRAY + rcv_array_count * 8; |
| 181 | 181 | |
| 182 | − dd->kregbase2 = ioremap_nocache( | |
| 182 | + dd->kregbase2 = ioremap( | |
| 183 | 183 | addr + dd->base2_start, |
| 184 | 184 | TXE_PIO_SEND - dd->base2_start); |
| 185 | 185 | if (!dd->kregbase2) { |
| @@ -6630,7 +6630,7 @@ static int qib_init_7322_variables(struct qib_devdata *dd) · 6629 unmodified lines | ||
| 6630 | 6630 | /* vl15 buffers start just after the 4k buffers */ |
| 6631 | 6631 | vl15off = dd->physaddr + (dd->piobufbase >> 32) + |
| 6632 | 6632 | dd->piobcnt4k * dd->align4k; |
| 6633 | − dd->piovl15base = ioremap_nocache(vl15off, | |
| 6633 | + dd->piovl15base = ioremap(vl15off, | |
| 6634 | 6634 | NUM_VL15_BUFS * dd->align4k); |
| 6635 | 6635 | if (!dd->piovl15base) { |
| 6636 | 6636 | ret = -ENOMEM; |
| @@ -1759,7 +1759,7 @@ int init_chip_wc_pat(struct qib_devdata *dd, u32 vl15buflen) · 1758 unmodified lines | ||
| 1759 | 1759 | qib_userlen = dd->ureg_align * dd->cfgctxts; |
| 1760 | 1760 | |
| 1761 | 1761 | /* Sanity checks passed, now create the new mappings */ |
| 1762 | − qib_kregbase = ioremap_nocache(qib_physaddr, qib_kreglen); | |
| 1762 | + qib_kregbase = ioremap(qib_physaddr, qib_kreglen); | |
| 1763 | 1763 | if (!qib_kregbase) |
| 1764 | 1764 | goto bail; |
| 1765 | 1765 | |
| @@ -1768,7 +1768,7 @@ int init_chip_wc_pat(struct qib_devdata *dd, u32 vl15buflen) · 2 unmodified lines | ||
| 1768 | 1768 | goto bail_kregbase; |
| 1769 | 1769 | |
| 1770 | 1770 | if (qib_userlen) { |
| 1771 | − qib_userbase = ioremap_nocache(qib_physaddr + dd->uregbase, | |
| 1771 | + qib_userbase = ioremap(qib_physaddr + dd->uregbase, | |
| 1772 | 1772 | qib_userlen); |
| 1773 | 1773 | if (!qib_userbase) |
| 1774 | 1774 | goto bail_piobase; |
| @@ -145,7 +145,7 @@ int qib_pcie_ddinit(struct qib_devdata *dd, struct pci_dev *pdev, · 144 unmodified lines | ||
| 145 | 145 | addr = pci_resource_start(pdev, 0); |
| 146 | 146 | len = pci_resource_len(pdev, 0); |
| 147 | 147 | |
| 148 | − dd->kregbase = ioremap_nocache(addr, len); | |
| 148 | + dd->kregbase = ioremap(addr, len); | |
| 149 | 149 | if (!dd->kregbase) |
| 150 | 150 | return -ENOMEM; |
| 151 | 151 | |
| @@ -107,7 +107,7 @@ static int pxa930_rotary_probe(struct platform_device *pdev) · 106 unmodified lines | ||
| 107 | 107 | if (!r) |
| 108 | 108 | return -ENOMEM; |
| 109 | 109 | |
| 110 | − r->mmio_base = ioremap_nocache(res->start, resource_size(res)); | |
| 110 | + r->mmio_base = ioremap(res->start, resource_size(res)); | |
| 111 | 111 | if (r->mmio_base == NULL) { |
| 112 | 112 | dev_err(&pdev->dev, "failed to remap IO memory\n"); |
| 113 | 113 | err = -ENXIO; |
| @@ -195,7 +195,7 @@ static int sh_keysc_probe(struct platform_device *pdev) · 194 unmodified lines | ||
| 195 | 195 | memcpy(&priv->pdata, dev_get_platdata(&pdev->dev), sizeof(priv->pdata)); |
| 196 | 196 | pdata = &priv->pdata; |
| 197 | 197 | |
| 198 | − priv->iomem_base = ioremap_nocache(res->start, resource_size(res)); | |
| 198 | + priv->iomem_base = ioremap(res->start, resource_size(res)); | |
| 199 | 199 | if (priv->iomem_base == NULL) { |
| 200 | 200 | dev_err(&pdev->dev, "failed to remap I/O memory\n"); |
| 201 | 201 | error = -ENXIO; |
| @@ -167,7 +167,7 @@ static int pxa930_trkball_probe(struct platform_device *pdev) · 166 unmodified lines | ||
| 167 | 167 | goto failed; |
| 168 | 168 | } |
| 169 | 169 | |
| 170 | − trkball->mmio_base = ioremap_nocache(res->start, resource_size(res)); | |
| 170 | + trkball->mmio_base = ioremap(res->start, resource_size(res)); | |
| 171 | 171 | if (!trkball->mmio_base) { |
| 172 | 172 | dev_err(&pdev->dev, "failed to ioremap registers\n"); |
| 173 | 173 | error = -ENXIO; |
| @@ -349,7 +349,7 @@ static int __init gscps2_probe(struct parisc_device *dev) · 348 unmodified lines | ||
| 349 | 349 | |
| 350 | 350 | ps2port->port = serio; |
| 351 | 351 | ps2port->padev = dev; |
| 352 | − ps2port->addr = ioremap_nocache(hpa, GSC_STATUS + 4); | |
| 352 | + ps2port->addr = ioremap(hpa, GSC_STATUS + 4); | |
| 353 | 353 | spin_lock_init(&ps2port->lock); |
| 354 | 354 | |
| 355 | 355 | gscps2_reset(ps2port); |
| @@ -440,7 +440,7 @@ static u8 __iomem * __init iommu_map_mmio_space(u64 address, u64 end) · 439 unmodified lines | ||
| 440 | 440 | return NULL; |
| 441 | 441 | } |
| 442 | 442 | |
| 443 | − return (u8 __iomem *)ioremap_nocache(address, end); | |
| 443 | + return (u8 __iomem *)ioremap(address, end); | |
| 444 | 444 | } |
| 445 | 445 | |
| 446 | 446 | static void __init iommu_unmap_mmio_space(struct amd_iommu *iommu) |
| @@ -298,7 +298,7 @@ static int tpci200_register(struct tpci200_board *tpci200) · 297 unmodified lines | ||
| 298 | 298 | |
| 299 | 299 | /* Map internal tpci200 driver user space */ |
| 300 | 300 | tpci200->info->interface_regs = |
| 301 | − ioremap_nocache(pci_resource_start(tpci200->info->pdev, | |
| 301 | + ioremap(pci_resource_start(tpci200->info->pdev, | |
| 302 | 302 | TPCI200_IP_INTERFACE_BAR), |
| 303 | 303 | TPCI200_IFACE_SIZE); |
| 304 | 304 | if (!tpci200->info->interface_regs) { |
| @@ -541,7 +541,7 @@ static int tpci200_pci_probe(struct pci_dev *pdev, · 236 unmodified lines | ||
| 541 | 541 | ret = -EBUSY; |
| 542 | 542 | goto out_err_pci_request; |
| 543 | 543 | } |
| 544 | − tpci200->info->cfg_regs = ioremap_nocache( | |
| 544 | + tpci200->info->cfg_regs = ioremap( | |
| 545 | 545 | pci_resource_start(pdev, TPCI200_CFG_MEM_BAR), |
| 546 | 546 | pci_resource_len(pdev, TPCI200_CFG_MEM_BAR)); |
| 547 | 547 | if (!tpci200->info->cfg_regs) { |
| @@ -276,7 +276,7 @@ static int ipoctal_inst_slot(struct ipoctal *ipoctal, unsigned int bus_nr, · 275 unmodified lines | ||
| 276 | 276 | ipoctal->board_id = ipoctal->dev->id_device; |
| 277 | 277 | |
| 278 | 278 | region = &ipoctal->dev->region[IPACK_IO_SPACE]; |
| 279 | − addr = devm_ioremap_nocache(&ipoctal->dev->dev, | |
| 279 | + addr = devm_ioremap(&ipoctal->dev->dev, | |
| 280 | 280 | region->start, region->size); |
| 281 | 281 | if (!addr) { |
| 282 | 282 | dev_err(&ipoctal->dev->dev, |
| @@ -292,7 +292,7 @@ static int ipoctal_inst_slot(struct ipoctal *ipoctal, unsigned int bus_nr, · 9 unmodified lines | ||
| 292 | 292 | |
| 293 | 293 | region = &ipoctal->dev->region[IPACK_INT_SPACE]; |
| 294 | 294 | ipoctal->int_space = |
| 295 | − devm_ioremap_nocache(&ipoctal->dev->dev, | |
| 295 | + devm_ioremap(&ipoctal->dev->dev, | |
| 296 | 296 | region->start, region->size); |
| 297 | 297 | if (!ipoctal->int_space) { |
| 298 | 298 | dev_err(&ipoctal->dev->dev, |
| @@ -303,7 +303,7 @@ static int ipoctal_inst_slot(struct ipoctal *ipoctal, unsigned int bus_nr, · 4 unmodified lines | ||
| 303 | 303 | |
| 304 | 304 | region = &ipoctal->dev->region[IPACK_MEM8_SPACE]; |
| 305 | 305 | ipoctal->mem8_space = |
| 306 | − devm_ioremap_nocache(&ipoctal->dev->dev, | |
| 306 | + devm_ioremap(&ipoctal->dev->dev, | |
| 307 | 307 | region->start, 0x8000); |
| 308 | 308 | if (!ipoctal->mem8_space) { |
| 309 | 309 | dev_err(&ipoctal->dev->dev, |
| @@ -716,7 +716,7 @@ static int __init gic_of_init(struct device_node *node, · 715 unmodified lines | ||
| 716 | 716 | __sync(); |
| 717 | 717 | } |
| 718 | 718 | |
| 719 | − mips_gic_base = ioremap_nocache(gic_base, gic_len); | |
| 719 | + mips_gic_base = ioremap(gic_base, gic_len); | |
| 720 | 720 | |
| 721 | 721 | gicconfig = read_gic_config(); |
| 722 | 722 | gic_shared_intrs = gicconfig & GIC_CONFIG_NUMINTERRUPTS; |
| @@ -460,7 +460,7 @@ static int intc_irqpin_probe(struct platform_device *pdev) · 459 unmodified lines | ||
| 460 | 460 | goto err0; |
| 461 | 461 | } |
| 462 | 462 | |
| 463 | − i->iomem = devm_ioremap_nocache(dev, io[k]->start, | |
| 463 | + i->iomem = devm_ioremap(dev, io[k]->start, | |
| 464 | 464 | resource_size(io[k])); |
| 465 | 465 | if (!i->iomem) { |
| 466 | 466 | dev_err(dev, "failed to remap IOMEM\n"); |
| @@ -105,7 +105,7 @@ static void *vb2_vmalloc_get_userptr(struct device *dev, unsigned long vaddr, · 104 unmodified lines | ||
| 105 | 105 | if (nums[i-1] + 1 != nums[i]) |
| 106 | 106 | goto fail_map; |
| 107 | 107 | buf->vaddr = (__force void *) |
| 108 | − ioremap_nocache(__pfn_to_phys(nums[0]), size + offset); | |
| 108 | + ioremap(__pfn_to_phys(nums[0]), size + offset); | |
| 109 | 109 | } else { |
| 110 | 110 | buf->vaddr = vm_map_ram(frame_vector_pages(vec), n_pages, -1, |
| 111 | 111 | PAGE_KERNEL); |
| @@ -938,7 +938,7 @@ static int cx18_probe(struct pci_dev *pci_dev, · 937 unmodified lines | ||
| 938 | 938 | /* map io memory */ |
| 939 | 939 | CX18_DEBUG_INFO("attempting ioremap at 0x%llx len 0x%08x\n", |
| 940 | 940 | (u64)cx->base_addr + CX18_MEM_OFFSET, CX18_MEM_SIZE); |
| 941 | − cx->enc_mem = ioremap_nocache(cx->base_addr + CX18_MEM_OFFSET, | |
| 941 | + cx->enc_mem = ioremap(cx->base_addr + CX18_MEM_OFFSET, | |
| 942 | 942 | CX18_MEM_SIZE); |
| 943 | 943 | if (!cx->enc_mem) { |
| 944 | 944 | CX18_ERR("ioremap failed. Can't get a window into CX23418 memory and register space\n"); |
| @@ -1042,7 +1042,7 @@ static int ivtv_probe(struct pci_dev *pdev, const struct pci_device_id *pci_id) · 1041 unmodified lines | ||
| 1042 | 1042 | /* map io memory */ |
| 1043 | 1043 | IVTV_DEBUG_INFO("attempting ioremap at 0x%llx len 0x%08x\n", |
| 1044 | 1044 | (u64)itv->base_addr + IVTV_ENCODER_OFFSET, IVTV_ENCODER_SIZE); |
| 1045 | − itv->enc_mem = ioremap_nocache(itv->base_addr + IVTV_ENCODER_OFFSET, | |
| 1045 | + itv->enc_mem = ioremap(itv->base_addr + IVTV_ENCODER_OFFSET, | |
| 1046 | 1046 | IVTV_ENCODER_SIZE); |
| 1047 | 1047 | if (!itv->enc_mem) { |
| 1048 | 1048 | IVTV_ERR("ioremap failed. Can't get a window into CX23415/6 encoder memory\n"); |
| @@ -1056,7 +1056,7 @@ static int ivtv_probe(struct pci_dev *pdev, const struct pci_device_id *pci_id) · 7 unmodified lines | ||
| 1056 | 1056 | if (itv->has_cx23415) { |
| 1057 | 1057 | IVTV_DEBUG_INFO("attempting ioremap at 0x%llx len 0x%08x\n", |
| 1058 | 1058 | (u64)itv->base_addr + IVTV_DECODER_OFFSET, IVTV_DECODER_SIZE); |
| 1059 | − itv->dec_mem = ioremap_nocache(itv->base_addr + IVTV_DECODER_OFFSET, | |
| 1059 | + itv->dec_mem = ioremap(itv->base_addr + IVTV_DECODER_OFFSET, | |
| 1060 | 1060 | IVTV_DECODER_SIZE); |
| 1061 | 1061 | if (!itv->dec_mem) { |
| 1062 | 1062 | IVTV_ERR("ioremap failed. Can't get a window into CX23415 decoder memory\n"); |
| @@ -1075,7 +1075,7 @@ static int ivtv_probe(struct pci_dev *pdev, const struct pci_device_id *pci_id) · 12 unmodified lines | ||
| 1075 | 1075 | IVTV_DEBUG_INFO("attempting ioremap at 0x%llx len 0x%08x\n", |
| 1076 | 1076 | (u64)itv->base_addr + IVTV_REG_OFFSET, IVTV_REG_SIZE); |
| 1077 | 1077 | itv->reg_mem = |
| 1078 | − ioremap_nocache(itv->base_addr + IVTV_REG_OFFSET, IVTV_REG_SIZE); | |
| 1078 | + ioremap(itv->base_addr + IVTV_REG_OFFSET, IVTV_REG_SIZE); | |
| 1079 | 1079 | if (!itv->reg_mem) { |
| 1080 | 1080 | IVTV_ERR("ioremap failed. Can't get a window into CX23415/6 register space\n"); |
| 1081 | 1081 | IVTV_ERR("Each capture card with a CX23415/6 needs 64 kB of vmalloc address space for this window\n"); |
| @@ -883,7 +883,7 @@ static int dm355_ccdc_probe(struct platform_device *pdev) · 882 unmodified lines | ||
| 883 | 883 | goto fail_nores; |
| 884 | 884 | } |
| 885 | 885 | |
| 886 | − ccdc_cfg.base_addr = ioremap_nocache(res->start, resource_size(res)); | |
| 886 | + ccdc_cfg.base_addr = ioremap(res->start, resource_size(res)); | |
| 887 | 887 | if (!ccdc_cfg.base_addr) { |
| 888 | 888 | status = -ENOMEM; |
| 889 | 889 | goto fail_nomem; |
| @@ -817,7 +817,7 @@ static int dm644x_ccdc_probe(struct platform_device *pdev) · 816 unmodified lines | ||
| 817 | 817 | goto fail_nores; |
| 818 | 818 | } |
| 819 | 819 | |
| 820 | − ccdc_cfg.base_addr = ioremap_nocache(res->start, resource_size(res)); | |
| 820 | + ccdc_cfg.base_addr = ioremap(res->start, resource_size(res)); | |
| 821 | 821 | if (!ccdc_cfg.base_addr) { |
| 822 | 822 | status = -ENOMEM; |
| 823 | 823 | goto fail_nomem; |
| @@ -1045,7 +1045,7 @@ static int isif_probe(struct platform_device *pdev) · 1044 unmodified lines | ||
| 1045 | 1045 | status = -EBUSY; |
| 1046 | 1046 | goto fail_nobase_res; |
| 1047 | 1047 | } |
| 1048 | − addr = ioremap_nocache(res->start, resource_size(res)); | |
| 1048 | + addr = ioremap(res->start, resource_size(res)); | |
| 1049 | 1049 | if (!addr) { |
| 1050 | 1050 | status = -ENOMEM; |
| 1051 | 1051 | goto fail_base_iomap; |
| @@ -351,7 +351,7 @@ static int tegra_cec_probe(struct platform_device *pdev) · 350 unmodified lines | ||
| 351 | 351 | if (cec->tegra_cec_irq <= 0) |
| 352 | 352 | return -EBUSY; |
| 353 | 353 | |
| 354 | − cec->cec_base = devm_ioremap_nocache(&pdev->dev, res->start, | |
| 354 | + cec->cec_base = devm_ioremap(&pdev->dev, res->start, | |
| 355 | 355 | resource_size(res)); |
| 356 | 356 | |
| 357 | 357 | if (!cec->cec_base) { |
| @@ -1512,7 +1512,7 @@ static int rtsx_pci_probe(struct pci_dev *pcidev, · 1511 unmodified lines | ||
| 1512 | 1512 | bar = 1; |
| 1513 | 1513 | len = pci_resource_len(pcidev, bar); |
| 1514 | 1514 | base = pci_resource_start(pcidev, bar); |
| 1515 | − pcr->remap_addr = ioremap_nocache(base, len); | |
| 1515 | + pcr->remap_addr = ioremap(base, len); | |
| 1516 | 1516 | if (!pcr->remap_addr) { |
| 1517 | 1517 | ret = -ENOMEM; |
| 1518 | 1518 | goto free_handle; |
| @@ -788,7 +788,7 @@ scif_node_add(struct scif_dev *scifdev, struct scifmsg *msg) · 787 unmodified lines | ||
| 788 | 788 | "failed to setup interrupts for %d\n", msg->src.node); |
| 789 | 789 | goto interrupt_setup_error; |
| 790 | 790 | } |
| 791 | − newdev->mmio.va = ioremap_nocache(msg->payload[1], sdev->mmio->len); | |
| 791 | + newdev->mmio.va = ioremap(msg->payload[1], sdev->mmio->len); | |
| 792 | 792 | if (!newdev->mmio.va) { |
| 793 | 793 | dev_err(&scifdev->sdev->dev, |
| 794 | 794 | "failed to map mmio for %d\n", msg->src.node); |
| @@ -834,7 +834,7 @@ static int pti_pci_probe(struct pci_dev *pdev, · 833 unmodified lines | ||
| 834 | 834 | } |
| 835 | 835 | drv_data->aperture_base = drv_data->pti_addr+APERTURE_14; |
| 836 | 836 | drv_data->pti_ioaddr = |
| 837 | − ioremap_nocache((u32)drv_data->aperture_base, | |
| 837 | + ioremap((u32)drv_data->aperture_base, | |
| 838 | 838 | APERTURE_LEN); |
| 839 | 839 | if (!drv_data->pti_ioaddr) { |
| 840 | 840 | retval = -ENOMEM; |
| @@ -719,7 +719,7 @@ static int sdhci_acpi_probe(struct platform_device *pdev) · 718 unmodified lines | ||
| 719 | 719 | goto err_free; |
| 720 | 720 | } |
| 721 | 721 | |
| 722 | − host->ioaddr = devm_ioremap_nocache(dev, iomem->start, | |
| 722 | + host->ioaddr = devm_ioremap(dev, iomem->start, | |
| 723 | 723 | resource_size(iomem)); |
| 724 | 724 | if (host->ioaddr == NULL) { |
| 725 | 725 | err = -ENOMEM; |
| @@ -1106,7 +1106,7 @@ static int via_sd_probe(struct pci_dev *pcidev, · 1105 unmodified lines | ||
| 1106 | 1106 | |
| 1107 | 1107 | len = pci_resource_len(pcidev, 0); |
| 1108 | 1108 | base = pci_resource_start(pcidev, 0); |
| 1109 | − sdhost->mmiobase = ioremap_nocache(base, len); | |
| 1109 | + sdhost->mmiobase = ioremap(base, len); | |
| 1110 | 1110 | if (!sdhost->mmiobase) { |
| 1111 | 1111 | ret = -ENOMEM; |
| 1112 | 1112 | goto free_mmc_host; |
| @@ -320,7 +320,7 @@ static int bcm47xxsflash_bcma_probe(struct platform_device *pdev) · 319 unmodified lines | ||
| 320 | 320 | * ChipCommon revision. |
| 321 | 321 | */ |
| 322 | 322 | if (b47s->bcma_cc->core->id.rev == 54) |
| 323 | − b47s->window = ioremap_nocache(res->start, resource_size(res)); | |
| 323 | + b47s->window = ioremap(res->start, resource_size(res)); | |
| 324 | 324 | else |
| 325 | 325 | b47s->window = ioremap_cache(res->start, resource_size(res)); |
| 326 | 326 | if (!b47s->window) { |
| @@ -163,7 +163,7 @@ static int amd76xrom_init_one(struct pci_dev *pdev, · 162 unmodified lines | ||
| 163 | 163 | /* FIXME handle registers 0x80 - 0x8C the bios region locks */ |
| 164 | 164 | |
| 165 | 165 | /* For write accesses caches are useless */ |
| 166 | − window->virt = ioremap_nocache(window->phys, window->size); | |
| 166 | + window->virt = ioremap(window->phys, window->size); | |
| 167 | 167 | if (!window->virt) { |
| 168 | 168 | printk(KERN_ERR MOD_NAME ": ioremap(%08lx, %08lx) failed\n", |
| 169 | 169 | window->phys, window->size); |
| @@ -191,7 +191,7 @@ static int __init ck804xrom_init_one(struct pci_dev *pdev, · 190 unmodified lines | ||
| 191 | 191 | /* FIXME handle registers 0x80 - 0x8C the bios region locks */ |
| 192 | 192 | |
| 193 | 193 | /* For write accesses caches are useless */ |
| 194 | − window->virt = ioremap_nocache(window->phys, window->size); | |
| 194 | + window->virt = ioremap(window->phys, window->size); | |
| 195 | 195 | if (!window->virt) { |
| 196 | 196 | printk(KERN_ERR MOD_NAME ": ioremap(%08lx, %08lx) failed\n", |
| 197 | 197 | window->phys, window->size); |
| @@ -249,7 +249,7 @@ static int __init esb2rom_init_one(struct pci_dev *pdev, · 248 unmodified lines | ||
| 249 | 249 | } |
| 250 | 250 | |
| 251 | 251 | /* Map the firmware hub into my address space. */ |
| 252 | − window->virt = ioremap_nocache(window->phys, window->size); | |
| 252 | + window->virt = ioremap(window->phys, window->size); | |
| 253 | 253 | if (!window->virt) { |
| 254 | 254 | printk(KERN_ERR MOD_NAME ": ioremap(%08lx, %08lx) failed\n", |
| 255 | 255 | window->phys, window->size); |
| @@ -184,7 +184,7 @@ static int __init ichxrom_init_one(struct pci_dev *pdev, · 183 unmodified lines | ||
| 184 | 184 | } |
| 185 | 185 | |
| 186 | 186 | /* Map the firmware hub into my address space. */ |
| 187 | − window->virt = ioremap_nocache(window->phys, window->size); | |
| 187 | + window->virt = ioremap(window->phys, window->size); | |
| 188 | 188 | if (!window->virt) { |
| 189 | 189 | printk(KERN_ERR MOD_NAME ": ioremap(%08lx, %08lx) failed\n", |
| 190 | 190 | window->phys, window->size); |
| @@ -133,7 +133,7 @@ static int vr_nor_init_maps(struct vr_nor_mtd *p) · 132 unmodified lines | ||
| 133 | 133 | if (win_len < (CS0_START + CS0_SIZE)) |
| 134 | 134 | return -ENXIO; |
| 135 | 135 | |
| 136 | − p->csr_base = ioremap_nocache(csr_phys, csr_len); | |
| 136 | + p->csr_base = ioremap(csr_phys, csr_len); | |
| 137 | 137 | if (!p->csr_base) |
| 138 | 138 | return -ENOMEM; |
| 139 | 139 | |
| @@ -152,7 +152,7 @@ static int vr_nor_init_maps(struct vr_nor_mtd *p) · 12 unmodified lines | ||
| 152 | 152 | p->map.bankwidth = (exp_timing_cs0 & TIMING_BYTE_EN) ? 1 : 2; |
| 153 | 153 | p->map.phys = win_phys + CS0_START; |
| 154 | 154 | p->map.size = CS0_SIZE; |
| 155 | − p->map.virt = ioremap_nocache(p->map.phys, p->map.size); | |
| 155 | + p->map.virt = ioremap(p->map.phys, p->map.size); | |
| 156 | 156 | if (!p->map.virt) { |
| 157 | 157 | err = -ENOMEM; |
| 158 | 158 | goto release; |
| @@ -78,7 +78,7 @@ static int __init init_l440gx(void) · 77 unmodified lines | ||
| 78 | 78 | return -ENODEV; |
| 79 | 79 | } |
| 80 | 80 | |
| 81 | − l440gx_map.virt = ioremap_nocache(WINDOW_ADDR, WINDOW_SIZE); | |
| 81 | + l440gx_map.virt = ioremap(WINDOW_ADDR, WINDOW_SIZE); | |
| 82 | 82 | |
| 83 | 83 | if (!l440gx_map.virt) { |
| 84 | 84 | printk(KERN_WARNING "Failed to ioremap L440GX flash region\n"); |
| @@ -82,10 +82,10 @@ static int __init init_netsc520(void) · 81 unmodified lines | ||
| 82 | 82 | printk(KERN_NOTICE "NetSc520 flash device: 0x%Lx at 0x%Lx\n", |
| 83 | 83 | (unsigned long long)netsc520_map.size, |
| 84 | 84 | (unsigned long long)netsc520_map.phys); |
| 85 | − netsc520_map.virt = ioremap_nocache(netsc520_map.phys, netsc520_map.size); | |
| 85 | + netsc520_map.virt = ioremap(netsc520_map.phys, netsc520_map.size); | |
| 86 | 86 | |
| 87 | 87 | if (!netsc520_map.virt) { |
| 88 | − printk("Failed to ioremap_nocache\n"); | |
| 88 | + printk("Failed to ioremap\n"); | |
| 89 | 89 | return -EIO; |
| 90 | 90 | } |
| 91 | 91 | |
| @@ -176,7 +176,7 @@ static int __init nettel_init(void) · 175 unmodified lines | ||
| 176 | 176 | #endif |
| 177 | 177 | int rc = 0; |
| 178 | 178 | |
| 179 | − nettel_mmcrp = (void *) ioremap_nocache(0xfffef000, 4096); | |
| 179 | + nettel_mmcrp = (void *) ioremap(0xfffef000, 4096); | |
| 180 | 180 | if (nettel_mmcrp == NULL) { |
| 181 | 181 | printk("SNAPGEAR: failed to disable MMCR cache??\n"); |
| 182 | 182 | return(-EIO); |
| @@ -217,7 +217,7 @@ static int __init nettel_init(void) · 34 unmodified lines | ||
| 217 | 217 | __asm__ ("wbinvd"); |
| 218 | 218 | |
| 219 | 219 | nettel_amd_map.phys = amdaddr; |
| 220 | − nettel_amd_map.virt = ioremap_nocache(amdaddr, maxsize); | |
| 220 | + nettel_amd_map.virt = ioremap(amdaddr, maxsize); | |
| 221 | 221 | if (!nettel_amd_map.virt) { |
| 222 | 222 | printk("SNAPGEAR: failed to ioremap() BOOTCS\n"); |
| 223 | 223 | iounmap(nettel_mmcrp); |
| @@ -303,7 +303,7 @@ static int __init nettel_init(void) · 79 unmodified lines | ||
| 303 | 303 | /* Probe for the size of the first Intel flash */ |
| 304 | 304 | nettel_intel_map.size = maxsize; |
| 305 | 305 | nettel_intel_map.phys = intel0addr; |
| 306 | − nettel_intel_map.virt = ioremap_nocache(intel0addr, maxsize); | |
| 306 | + nettel_intel_map.virt = ioremap(intel0addr, maxsize); | |
| 307 | 307 | if (!nettel_intel_map.virt) { |
| 308 | 308 | printk("SNAPGEAR: failed to ioremap() ROMCS1\n"); |
| 309 | 309 | rc = -EIO; |
| @@ -337,7 +337,7 @@ static int __init nettel_init(void) · 27 unmodified lines | ||
| 337 | 337 | iounmap(nettel_intel_map.virt); |
| 338 | 338 | |
| 339 | 339 | nettel_intel_map.size = maxsize; |
| 340 | − nettel_intel_map.virt = ioremap_nocache(intel0addr, maxsize); | |
| 340 | + nettel_intel_map.virt = ioremap(intel0addr, maxsize); | |
| 341 | 341 | if (!nettel_intel_map.virt) { |
| 342 | 342 | printk("SNAPGEAR: failed to ioremap() ROMCS1/2\n"); |
| 343 | 343 | rc = -EIO; |
| @@ -94,7 +94,7 @@ intel_iq80310_init(struct pci_dev *dev, struct map_pci_info *map) · 93 unmodified lines | ||
| 94 | 94 | map->map.write = mtd_pci_write8, |
| 95 | 95 | |
| 96 | 96 | map->map.size = 0x00800000; |
| 97 | − map->base = ioremap_nocache(pci_resource_start(dev, 0), | |
| 97 | + map->base = ioremap(pci_resource_start(dev, 0), | |
| 98 | 98 | pci_resource_len(dev, 0)); |
| 99 | 99 | |
| 100 | 100 | if (!map->base) |
| @@ -188,7 +188,7 @@ intel_dc21285_init(struct pci_dev *dev, struct map_pci_info *map) · 87 unmodified lines | ||
| 188 | 188 | map->map.read = mtd_pci_read32, |
| 189 | 189 | map->map.write = mtd_pci_write32, |
| 190 | 190 | map->map.size = len; |
| 191 | − map->base = ioremap_nocache(base, len); | |
| 191 | + map->base = ioremap(base, len); | |
| 192 | 192 | |
| 193 | 193 | if (!map->base) |
| 194 | 194 | return -ENOMEM; |
| @@ -174,8 +174,8 @@ static void sc520cdp_setup_par(void) · 173 unmodified lines | ||
| 174 | 174 | int i, j; |
| 175 | 175 | |
| 176 | 176 | /* map in SC520's MMCR area */ |
| 177 | − mmcr = ioremap_nocache(SC520_MMCR_BASE, SC520_MMCR_EXTENT); | |
| 178 | − if(!mmcr) { /* ioremap_nocache failed: skip the PAR reprogramming */ | |
| 177 | + mmcr = ioremap(SC520_MMCR_BASE, SC520_MMCR_EXTENT); | |
| 178 | + if(!mmcr) { /* ioremap failed: skip the PAR reprogramming */ | |
| 179 | 179 | /* force physical address fields to BIOS defaults: */ |
| 180 | 180 | for(i = 0; i < NUM_FLASH_BANKS; i++) |
| 181 | 181 | sc520cdp_map[i].phys = par_table[i].default_address; |
| @@ -225,10 +225,10 @@ static int __init init_sc520cdp(void) · 43 unmodified lines | ||
| 225 | 225 | (unsigned long long)sc520cdp_map[i].size, |
| 226 | 226 | (unsigned long long)sc520cdp_map[i].phys); |
| 227 | 227 | |
| 228 | − sc520cdp_map[i].virt = ioremap_nocache(sc520cdp_map[i].phys, sc520cdp_map[i].size); | |
| 228 | + sc520cdp_map[i].virt = ioremap(sc520cdp_map[i].phys, sc520cdp_map[i].size); | |
| 229 | 229 | |
| 230 | 230 | if (!sc520cdp_map[i].virt) { |
| 231 | − printk("Failed to ioremap_nocache\n"); | |
| 231 | + printk("Failed to ioremap\n"); | |
| 232 | 232 | for (j = 0; j < i; j++) { |
| 233 | 233 | if (mymtd[j]) { |
| 234 | 234 | map_destroy(mymtd[j]); |
| @@ -152,7 +152,7 @@ static int scb2_flash_probe(struct pci_dev *dev, · 151 unmodified lines | ||
| 152 | 152 | } |
| 153 | 153 | |
| 154 | 154 | /* remap the IO window (w/o caching) */ |
| 155 | − scb2_ioaddr = ioremap_nocache(SCB2_ADDR, SCB2_WINDOW); | |
| 155 | + scb2_ioaddr = ioremap(SCB2_ADDR, SCB2_WINDOW); | |
| 156 | 156 | if (!scb2_ioaddr) { |
| 157 | 157 | printk(KERN_ERR MODNAME ": Failed to ioremap window!\n"); |
| 158 | 158 | if (!region_fail) |
| @@ -56,10 +56,10 @@ static int __init init_ts5500_map(void) · 55 unmodified lines | ||
| 56 | 56 | { |
| 57 | 57 | int rc = 0; |
| 58 | 58 | |
| 59 | − ts5500_map.virt = ioremap_nocache(ts5500_map.phys, ts5500_map.size); | |
| 59 | + ts5500_map.virt = ioremap(ts5500_map.phys, ts5500_map.size); | |
| 60 | 60 | |
| 61 | 61 | if (!ts5500_map.virt) { |
| 62 | − printk(KERN_ERR "Failed to ioremap_nocache\n"); | |
| 62 | + printk(KERN_ERR "Failed to ioremap\n"); | |
| 63 | 63 | rc = -EIO; |
| 64 | 64 | goto err2; |
| 65 | 65 | } |
| @@ -404,7 +404,7 @@ static int au1550nd_probe(struct platform_device *pdev) · 403 unmodified lines | ||
| 404 | 404 | goto out1; |
| 405 | 405 | } |
| 406 | 406 | |
| 407 | − ctx->base = ioremap_nocache(r->start, 0x1000); | |
| 407 | + ctx->base = ioremap(r->start, 0x1000); | |
| 408 | 408 | if (!ctx->base) { |
| 409 | 409 | dev_err(&pdev->dev, "cannot remap NAND memory area\n"); |
| 410 | 410 | ret = -ENODEV; |
| @@ -74,15 +74,15 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) · 73 unmodified lines | ||
| 74 | 74 | return ret; |
| 75 | 75 | } |
| 76 | 76 | |
| 77 | − denali->reg = ioremap_nocache(csr_base, csr_len); | |
| 77 | + denali->reg = ioremap(csr_base, csr_len); | |
| 78 | 78 | if (!denali->reg) { |
| 79 | 79 | dev_err(&dev->dev, "Spectra: Unable to remap memory region\n"); |
| 80 | 80 | return -ENOMEM; |
| 81 | 81 | } |
| 82 | 82 | |
| 83 | − denali->host = ioremap_nocache(mem_base, mem_len); | |
| 83 | + denali->host = ioremap(mem_base, mem_len); | |
| 84 | 84 | if (!denali->host) { |
| 85 | − dev_err(&dev->dev, "Spectra: ioremap_nocache failed!"); | |
| 85 | + dev_err(&dev->dev, "Spectra: ioremap failed!"); | |
| 86 | 86 | ret = -ENOMEM; |
| 87 | 87 | goto out_unmap_reg; |
| 88 | 88 | } |
| @@ -285,7 +285,7 @@ static int fun_probe(struct platform_device *ofdev) · 284 unmodified lines | ||
| 285 | 285 | fun->wait_flags = FSL_UPM_WAIT_RUN_PATTERN | |
| 286 | 286 | FSL_UPM_WAIT_WRITE_BYTE; |
| 287 | 287 | |
| 288 | − fun->io_base = devm_ioremap_nocache(&ofdev->dev, io_res.start, | |
| 288 | + fun->io_base = devm_ioremap(&ofdev->dev, io_res.start, | |
| 289 | 289 | resource_size(&io_res)); |
| 290 | 290 | if (!fun->io_base) { |
| 291 | 291 | ret = -ENOMEM; |
| @@ -1302,7 +1302,7 @@ static int at91_can_probe(struct platform_device *pdev) · 1301 unmodified lines | ||
| 1302 | 1302 | goto exit_put; |
| 1303 | 1303 | } |
| 1304 | 1304 | |
| 1305 | − addr = ioremap_nocache(res->start, resource_size(res)); | |
| 1305 | + addr = ioremap(res->start, resource_size(res)); | |
| 1306 | 1306 | if (!addr) { |
| 1307 | 1307 | err = -ENOMEM; |
| 1308 | 1308 | goto exit_release; |
| @@ -175,7 +175,7 @@ static int cc770_isa_probe(struct platform_device *pdev) · 174 unmodified lines | ||
| 175 | 175 | err = -EBUSY; |
| 176 | 176 | goto exit; |
| 177 | 177 | } |
| 178 | − base = ioremap_nocache(mem[idx], iosize); | |
| 178 | + base = ioremap(mem[idx], iosize); | |
| 179 | 179 | if (!base) { |
| 180 | 180 | err = -ENOMEM; |
| 181 | 181 | goto exit_release; |
| @@ -130,7 +130,7 @@ static int sja1000_isa_probe(struct platform_device *pdev) · 129 unmodified lines | ||
| 130 | 130 | err = -EBUSY; |
| 131 | 131 | goto exit; |
| 132 | 132 | } |
| 133 | − base = ioremap_nocache(mem[idx], iosize); | |
| 133 | + base = ioremap(mem[idx], iosize); | |
| 134 | 134 | if (!base) { |
| 135 | 135 | err = -ENOMEM; |
| 136 | 136 | goto exit_release; |
| @@ -229,7 +229,7 @@ static int sp_probe(struct platform_device *pdev) · 228 unmodified lines | ||
| 229 | 229 | resource_size(res_mem), DRV_NAME)) |
| 230 | 230 | return -EBUSY; |
| 231 | 231 | |
| 232 | − addr = devm_ioremap_nocache(&pdev->dev, res_mem->start, | |
| 232 | + addr = devm_ioremap(&pdev->dev, res_mem->start, | |
| 233 | 233 | resource_size(res_mem)); |
| 234 | 234 | if (!addr) |
| 235 | 235 | return -ENOMEM; |
| @@ -777,7 +777,7 @@ static int softing_pdev_probe(struct platform_device *pdev) · 776 unmodified lines | ||
| 777 | 777 | goto platform_resource_failed; |
| 778 | 778 | card->dpram_phys = pres->start; |
| 779 | 779 | card->dpram_size = resource_size(pres); |
| 780 | − card->dpram = ioremap_nocache(card->dpram_phys, card->dpram_size); | |
| 780 | + card->dpram = ioremap(card->dpram_phys, card->dpram_size); | |
| 781 | 781 | if (!card->dpram) { |
| 782 | 782 | dev_alert(&card->pdev->dev, "dpram ioremap failed\n"); |
| 783 | 783 | goto ioremap_failed; |
| @@ -1791,7 +1791,7 @@ static int slic_probe(struct pci_dev *pdev, const struct pci_device_id *ent) · 1790 unmodified lines | ||
| 1791 | 1791 | sdev->is_fiber = slic_is_fiber(pdev->subsystem_device); |
| 1792 | 1792 | sdev->pdev = pdev; |
| 1793 | 1793 | sdev->netdev = dev; |
| 1794 | − sdev->regs = ioremap_nocache(pci_resource_start(pdev, 0), | |
| 1794 | + sdev->regs = ioremap(pci_resource_start(pdev, 0), | |
| 1795 | 1795 | pci_resource_len(pdev, 0)); |
| 1796 | 1796 | if (!sdev->regs) { |
| 1797 | 1797 | dev_err(&pdev->dev, "failed to map registers\n"); |
| @@ -1332,10 +1332,10 @@ static int request_and_map(struct platform_device *pdev, const char *name, · 1331 unmodified lines | ||
| 1332 | 1332 | return -EBUSY; |
| 1333 | 1333 | } |
| 1334 | 1334 | |
| 1335 | − *ptr = devm_ioremap_nocache(device, region->start, | |
| 1335 | + *ptr = devm_ioremap(device, region->start, | |
| 1336 | 1336 | resource_size(region)); |
| 1337 | 1337 | if (*ptr == NULL) { |
| 1338 | − dev_err(device, "ioremap_nocache of %s failed!", name); | |
| 1338 | + dev_err(device, "ioremap of %s failed!", name); | |
| 1339 | 1339 | return -ENOMEM; |
| 1340 | 1340 | } |
| 1341 | 1341 | |
| @@ -1161,7 +1161,7 @@ static int au1000_probe(struct platform_device *pdev) · 1160 unmodified lines | ||
| 1161 | 1161 | |
| 1162 | 1162 | /* aup->mac is the base address of the MAC's registers */ |
| 1163 | 1163 | aup->mac = (struct mac_reg *) |
| 1164 | − ioremap_nocache(base->start, resource_size(base)); | |
| 1164 | + ioremap(base->start, resource_size(base)); | |
| 1165 | 1165 | if (!aup->mac) { |
| 1166 | 1166 | dev_err(&pdev->dev, "failed to ioremap MAC registers\n"); |
| 1167 | 1167 | err = -ENXIO; |
| @@ -1169,7 +1169,7 @@ static int au1000_probe(struct platform_device *pdev) · 1 unmodified line | ||
| 1169 | 1169 | } |
| 1170 | 1170 | |
| 1171 | 1171 | /* Setup some variables for quick register address access */ |
| 1172 | − aup->enable = (u32 *)ioremap_nocache(macen->start, | |
| 1172 | + aup->enable = (u32 *)ioremap(macen->start, | |
| 1173 | 1173 | resource_size(macen)); |
| 1174 | 1174 | if (!aup->enable) { |
| 1175 | 1175 | dev_err(&pdev->dev, "failed to ioremap MAC enable register\n"); |
| @@ -1178,7 +1178,7 @@ static int au1000_probe(struct platform_device *pdev) · 2 unmodified lines | ||
| 1178 | 1178 | } |
| 1179 | 1179 | aup->mac_id = pdev->id; |
| 1180 | 1180 | |
| 1181 | − aup->macdma = ioremap_nocache(macdma->start, resource_size(macdma)); | |
| 1181 | + aup->macdma = ioremap(macdma->start, resource_size(macdma)); | |
| 1182 | 1182 | if (!aup->macdma) { |
| 1183 | 1183 | dev_err(&pdev->dev, "failed to ioremap MACDMA registers\n"); |
| 1184 | 1184 | err = -ENXIO; |
| @@ -253,7 +253,7 @@ static int aq_pci_probe(struct pci_dev *pdev, · 252 unmodified lines | ||
| 253 | 253 | goto err_free_aq_hw; |
| 254 | 254 | } |
| 255 | 255 | |
| 256 | − self->aq_hw->mmio = ioremap_nocache(mmio_pa, reg_sz); | |
| 256 | + self->aq_hw->mmio = ioremap(mmio_pa, reg_sz); | |
| 257 | 257 | if (!self->aq_hw->mmio) { |
| 258 | 258 | err = -EIO; |
| 259 | 259 | goto err_free_aq_hw; |
| @@ -1687,8 +1687,7 @@ static int ag71xx_probe(struct platform_device *pdev) · 1686 unmodified lines | ||
| 1687 | 1687 | goto err_free; |
| 1688 | 1688 | } |
| 1689 | 1689 | |
| 1690 | − ag->mac_base = devm_ioremap_nocache(&pdev->dev, res->start, | |
| 1691 | − resource_size(res)); | |
| 1690 | + ag->mac_base = devm_ioremap(&pdev->dev, res->start, resource_size(res)); | |
| 1692 | 1691 | if (!ag->mac_base) { |
| 1693 | 1692 | err = -ENOMEM; |
| 1694 | 1693 | goto err_free; |
| @@ -14053,7 +14053,7 @@ static int bnx2x_init_one(struct pci_dev *pdev, · 14052 unmodified lines | ||
| 14053 | 14053 | rc = -ENOMEM; |
| 14054 | 14054 | goto init_one_freemem; |
| 14055 | 14055 | } |
| 14056 | − bp->doorbells = ioremap_nocache(pci_resource_start(pdev, 2), | |
| 14056 | + bp->doorbells = ioremap(pci_resource_start(pdev, 2), | |
| 14057 | 14057 | doorbell_size); |
| 14058 | 14058 | } |
| 14059 | 14059 | if (!bp->doorbells) { |
| @@ -2537,7 +2537,7 @@ static int sbmac_probe(struct platform_device *pldev) · 2536 unmodified lines | ||
| 2537 | 2537 | |
| 2538 | 2538 | res = platform_get_resource(pldev, IORESOURCE_MEM, 0); |
| 2539 | 2539 | BUG_ON(!res); |
| 2540 | − sbm_base = ioremap_nocache(res->start, resource_size(res)); | |
| 2540 | + sbm_base = ioremap(res->start, resource_size(res)); | |
| 2541 | 2541 | if (!sbm_base) { |
| 2542 | 2542 | printk(KERN_ERR "%s: unable to map device registers\n", |
| 2543 | 2543 | dev_name(&pldev->dev)); |
| @@ -3477,7 +3477,7 @@ bnad_init(struct bnad *bnad, · 3476 unmodified lines | ||
| 3477 | 3477 | bnad->pcidev = pdev; |
| 3478 | 3478 | bnad->mmio_start = pci_resource_start(pdev, 0); |
| 3479 | 3479 | bnad->mmio_len = pci_resource_len(pdev, 0); |
| 3480 | − bnad->bar0 = ioremap_nocache(bnad->mmio_start, bnad->mmio_len); | |
| 3480 | + bnad->bar0 = ioremap(bnad->mmio_start, bnad->mmio_len); | |
| 3481 | 3481 | if (!bnad->bar0) { |
| 3482 | 3482 | dev_err(&pdev->dev, "ioremap for bar0 failed\n"); |
| 3483 | 3483 | return -ENOMEM; |
| @@ -3265,7 +3265,7 @@ static int init_one(struct pci_dev *pdev, const struct pci_device_id *ent) · 3264 unmodified lines | ||
| 3265 | 3265 | goto out_free_adapter; |
| 3266 | 3266 | } |
| 3267 | 3267 | |
| 3268 | − adapter->regs = ioremap_nocache(mmio_start, mmio_len); | |
| 3268 | + adapter->regs = ioremap(mmio_start, mmio_len); | |
| 3269 | 3269 | if (!adapter->regs) { |
| 3270 | 3270 | dev_err(&pdev->dev, "cannot map device registers\n"); |
| 3271 | 3271 | err = -ENOMEM; |
| @@ -2039,7 +2039,7 @@ static int de_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) · 2038 unmodified lines | ||
| 2039 | 2039 | } |
| 2040 | 2040 | |
| 2041 | 2041 | /* remap CSR registers */ |
| 2042 | − regs = ioremap_nocache(pciaddr, DE_REGS_SIZE); | |
| 2042 | + regs = ioremap(pciaddr, DE_REGS_SIZE); | |
| 2043 | 2043 | if (!regs) { |
| 2044 | 2044 | rc = -EIO; |
| 2045 | 2045 | pr_err("Cannot map PCI MMIO (%llx@%lx) on pci dev %s\n", |
| @@ -1087,7 +1087,7 @@ static int ethoc_probe(struct platform_device *pdev) · 1086 unmodified lines | ||
| 1087 | 1087 | priv = netdev_priv(netdev); |
| 1088 | 1088 | priv->netdev = netdev; |
| 1089 | 1089 | |
| 1090 | − priv->iobase = devm_ioremap_nocache(&pdev->dev, netdev->base_addr, | |
| 1090 | + priv->iobase = devm_ioremap(&pdev->dev, netdev->base_addr, | |
| 1091 | 1091 | resource_size(mmio)); |
| 1092 | 1092 | if (!priv->iobase) { |
| 1093 | 1093 | dev_err(&pdev->dev, "cannot remap I/O memory space\n"); |
| @@ -1096,7 +1096,7 @@ static int ethoc_probe(struct platform_device *pdev) · 2 unmodified lines | ||
| 1096 | 1096 | } |
| 1097 | 1097 | |
| 1098 | 1098 | if (netdev->mem_end) { |
| 1099 | − priv->membase = devm_ioremap_nocache(&pdev->dev, | |
| 1099 | + priv->membase = devm_ioremap(&pdev->dev, | |
| 1100 | 1100 | netdev->mem_start, resource_size(mem)); |
| 1101 | 1101 | if (!priv->membase) { |
| 1102 | 1102 | dev_err(&pdev->dev, "cannot remap memory space\n"); |
| @@ -91,10 +91,10 @@ static int sni_82596_probe(struct platform_device *dev) · 90 unmodified lines | ||
| 91 | 91 | idprom = platform_get_resource(dev, IORESOURCE_MEM, 2); |
| 92 | 92 | if (!res || !ca || !options || !idprom) |
| 93 | 93 | return -ENODEV; |
| 94 | − mpu_addr = ioremap_nocache(res->start, 4); | |
| 94 | + mpu_addr = ioremap(res->start, 4); | |
| 95 | 95 | if (!mpu_addr) |
| 96 | 96 | return -ENOMEM; |
| 97 | − ca_addr = ioremap_nocache(ca->start, 4); | |
| 97 | + ca_addr = ioremap(ca->start, 4); | |
| 98 | 98 | if (!ca_addr) |
| 99 | 99 | goto probe_failed_free_mpu; |
| 100 | 100 | |
| @@ -110,7 +110,7 @@ static int sni_82596_probe(struct platform_device *dev) · 9 unmodified lines | ||
| 110 | 110 | netdevice->base_addr = res->start; |
| 111 | 111 | netdevice->irq = platform_get_irq(dev, 0); |
| 112 | 112 | |
| 113 | − eth_addr = ioremap_nocache(idprom->start, 0x10); | |
| 113 | + eth_addr = ioremap(idprom->start, 0x10); | |
| 114 | 114 | if (!eth_addr) |
| 115 | 115 | goto probe_failed; |
| 116 | 116 | |
| @@ -1043,7 +1043,7 @@ static int korina_probe(struct platform_device *pdev) · 1042 unmodified lines | ||
| 1043 | 1043 | |
| 1044 | 1044 | r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "korina_regs"); |
| 1045 | 1045 | dev->base_addr = r->start; |
| 1046 | − lp->eth_regs = ioremap_nocache(r->start, resource_size(r)); | |
| 1046 | + lp->eth_regs = ioremap(r->start, resource_size(r)); | |
| 1047 | 1047 | if (!lp->eth_regs) { |
| 1048 | 1048 | printk(KERN_ERR DRV_NAME ": cannot remap registers\n"); |
| 1049 | 1049 | rc = -ENXIO; |
| @@ -1051,7 +1051,7 @@ static int korina_probe(struct platform_device *pdev) · 1 unmodified line | ||
| 1051 | 1051 | } |
| 1052 | 1052 | |
| 1053 | 1053 | r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "korina_dma_rx"); |
| 1054 | − lp->rx_dma_regs = ioremap_nocache(r->start, resource_size(r)); | |
| 1054 | + lp->rx_dma_regs = ioremap(r->start, resource_size(r)); | |
| 1055 | 1055 | if (!lp->rx_dma_regs) { |
| 1056 | 1056 | printk(KERN_ERR DRV_NAME ": cannot remap Rx DMA registers\n"); |
| 1057 | 1057 | rc = -ENXIO; |
| @@ -1059,7 +1059,7 @@ static int korina_probe(struct platform_device *pdev) · 1 unmodified line | ||
| 1059 | 1059 | } |
| 1060 | 1060 | |
| 1061 | 1061 | r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "korina_dma_tx"); |
| 1062 | − lp->tx_dma_regs = ioremap_nocache(r->start, resource_size(r)); | |
| 1062 | + lp->tx_dma_regs = ioremap(r->start, resource_size(r)); | |
| 1063 | 1063 | if (!lp->tx_dma_regs) { |
| 1064 | 1064 | printk(KERN_ERR DRV_NAME ": cannot remap Tx DMA registers\n"); |
| 1065 | 1065 | rc = -ENXIO; |
| @@ -649,7 +649,7 @@ ltq_etop_probe(struct platform_device *pdev) · 648 unmodified lines | ||
| 649 | 649 | goto err_out; |
| 650 | 650 | } |
| 651 | 651 | |
| 652 | − ltq_etop_membase = devm_ioremap_nocache(&pdev->dev, | |
| 652 | + ltq_etop_membase = devm_ioremap(&pdev->dev, | |
| 653 | 653 | res->start, resource_size(res)); |
| 654 | 654 | if (!ltq_etop_membase) { |
| 655 | 655 | dev_err(&pdev->dev, "failed to remap etop engine %d\n", |
| @@ -3932,7 +3932,7 @@ static int skge_probe(struct pci_dev *pdev, const struct pci_device_id *ent) · 3931 unmodified lines | ||
| 3932 | 3932 | spin_lock_init(&hw->phy_lock); |
| 3933 | 3933 | tasklet_init(&hw->phy_task, skge_extirq, (unsigned long) hw); |
| 3934 | 3934 | |
| 3935 | − hw->regs = ioremap_nocache(pci_resource_start(pdev, 0), 0x4000); | |
| 3935 | + hw->regs = ioremap(pci_resource_start(pdev, 0), 0x4000); | |
| 3936 | 3936 | if (!hw->regs) { |
| 3937 | 3937 | dev_err(&pdev->dev, "cannot map device registers\n"); |
| 3938 | 3938 | goto err_out_free_hw; |
| @@ -5022,7 +5022,7 @@ static int sky2_probe(struct pci_dev *pdev, const struct pci_device_id *ent) · 5021 unmodified lines | ||
| 5022 | 5022 | hw->pdev = pdev; |
| 5023 | 5023 | sprintf(hw->irq_name, DRV_NAME "@pci:%s", pci_name(pdev)); |
| 5024 | 5024 | |
| 5025 | − hw->regs = ioremap_nocache(pci_resource_start(pdev, 0), 0x4000); | |
| 5025 | + hw->regs = ioremap(pci_resource_start(pdev, 0), 0x4000); | |
| 5026 | 5026 | if (!hw->regs) { |
| 5027 | 5027 | dev_err(&pdev->dev, "cannot map device registers\n"); |
| 5028 | 5028 | goto err_out_free_hw; |
| @@ -1937,7 +1937,7 @@ static int ns83820_init_one(struct pci_dev *pci_dev, · 1936 unmodified lines | ||
| 1937 | 1937 | |
| 1938 | 1938 | pci_set_master(pci_dev); |
| 1939 | 1939 | addr = pci_resource_start(pci_dev, 1); |
| 1940 | − dev->base = ioremap_nocache(addr, PAGE_SIZE); | |
| 1940 | + dev->base = ioremap(addr, PAGE_SIZE); | |
| 1941 | 1941 | dev->tx_descs = pci_alloc_consistent(pci_dev, |
| 1942 | 1942 | 4 * DESC_SIZE * NR_TX_DESC, &dev->tx_phy_descs); |
| 1943 | 1943 | dev->rx_info.descs = pci_alloc_consistent(pci_dev, |
| @@ -106,7 +106,7 @@ static int nfp_netvf_pci_probe(struct pci_dev *pdev, · 105 unmodified lines | ||
| 106 | 106 | * first NFP_NET_CFG_BAR_SZ of the BAR. This keeps the code |
| 107 | 107 | * the identical for PF and VF drivers. |
| 108 | 108 | */ |
| 109 | − ctrl_bar = ioremap_nocache(pci_resource_start(pdev, NFP_NET_CTRL_BAR), | |
| 109 | + ctrl_bar = ioremap(pci_resource_start(pdev, NFP_NET_CTRL_BAR), | |
| 110 | 110 | NFP_NET_CFG_BAR_SZ); |
| 111 | 111 | if (!ctrl_bar) { |
| 112 | 112 | dev_err(&pdev->dev, |
| @@ -200,7 +200,7 @@ static int nfp_netvf_pci_probe(struct pci_dev *pdev, · 87 unmodified lines | ||
| 200 | 200 | bar_sz = (rx_bar_off + rx_bar_sz) - bar_off; |
| 201 | 201 | |
| 202 | 202 | map_addr = pci_resource_start(pdev, tx_bar_no) + bar_off; |
| 203 | − vf->q_bar = ioremap_nocache(map_addr, bar_sz); | |
| 203 | + vf->q_bar = ioremap(map_addr, bar_sz); | |
| 204 | 204 | if (!vf->q_bar) { |
| 205 | 205 | nn_err(nn, "Failed to map resource %d\n", tx_bar_no); |
| 206 | 206 | err = -EIO; |
| @@ -216,7 +216,7 @@ static int nfp_netvf_pci_probe(struct pci_dev *pdev, · 9 unmodified lines | ||
| 216 | 216 | |
| 217 | 217 | /* TX queues */ |
| 218 | 218 | map_addr = pci_resource_start(pdev, tx_bar_no) + tx_bar_off; |
| 219 | − nn->tx_bar = ioremap_nocache(map_addr, tx_bar_sz); | |
| 219 | + nn->tx_bar = ioremap(map_addr, tx_bar_sz); | |
| 220 | 220 | if (!nn->tx_bar) { |
| 221 | 221 | nn_err(nn, "Failed to map resource %d\n", tx_bar_no); |
| 222 | 222 | err = -EIO; |
| @@ -225,7 +225,7 @@ static int nfp_netvf_pci_probe(struct pci_dev *pdev, · 2 unmodified lines | ||
| 225 | 225 | |
| 226 | 226 | /* RX queues */ |
| 227 | 227 | map_addr = pci_resource_start(pdev, rx_bar_no) + rx_bar_off; |
| 228 | − nn->rx_bar = ioremap_nocache(map_addr, rx_bar_sz); | |
| 228 | + nn->rx_bar = ioremap(map_addr, rx_bar_sz); | |
| 229 | 229 | if (!nn->rx_bar) { |
| 230 | 230 | nn_err(nn, "Failed to map resource %d\n", rx_bar_no); |
| 231 | 231 | err = -EIO; |
| @@ -611,7 +611,7 @@ static int enable_bars(struct nfp6000_pcie *nfp, u16 interface) · 610 unmodified lines | ||
| 611 | 611 | /* Configure, and lock, BAR0.0 for General Target use (MSI-X SRAM) */ |
| 612 | 612 | bar = &nfp->bar[0]; |
| 613 | 613 | if (nfp_bar_resource_len(bar) >= NFP_PCI_MIN_MAP_SIZE) |
| 614 | − bar->iomem = ioremap_nocache(nfp_bar_resource_start(bar), | |
| 614 | + bar->iomem = ioremap(nfp_bar_resource_start(bar), | |
| 615 | 615 | nfp_bar_resource_len(bar)); |
| 616 | 616 | if (bar->iomem) { |
| 617 | 617 | int pf; |
| @@ -677,7 +677,7 @@ static int enable_bars(struct nfp6000_pcie *nfp, u16 interface) · 59 unmodified lines | ||
| 677 | 677 | } |
| 678 | 678 | |
| 679 | 679 | bar = &nfp->bar[4 + i]; |
| 680 | − bar->iomem = ioremap_nocache(nfp_bar_resource_start(bar), | |
| 680 | + bar->iomem = ioremap(nfp_bar_resource_start(bar), | |
| 681 | 681 | nfp_bar_resource_len(bar)); |
| 682 | 682 | if (bar->iomem) { |
| 683 | 683 | msg += snprintf(msg, end - msg, |
| @@ -858,7 +858,7 @@ static int nfp6000_area_acquire(struct nfp_cpp_area *area) · 174 unmodified lines | ||
| 858 | 858 | priv->iomem = priv->bar->iomem + priv->bar_offset; |
| 859 | 859 | else |
| 860 | 860 | /* Must have been too big. Sub-allocate. */ |
| 861 | − priv->iomem = ioremap_nocache(priv->phys, priv->size); | |
| 861 | + priv->iomem = ioremap(priv->phys, priv->size); | |
| 862 | 862 | |
| 863 | 863 | if (IS_ERR_OR_NULL(priv->iomem)) { |
| 864 | 864 | dev_err(nfp->dev, "Can't ioremap() a %d byte region of BAR %d\n", |
| @@ -1401,7 +1401,7 @@ static int efx_ef10_dimension_resources(struct efx_nic *efx) · 1400 unmodified lines | ||
| 1401 | 1401 | } |
| 1402 | 1402 | |
| 1403 | 1403 | /* Shrink the original UC mapping of the memory BAR */ |
| 1404 | − membase = ioremap_nocache(efx->membase_phys, uc_mem_map_size); | |
| 1404 | + membase = ioremap(efx->membase_phys, uc_mem_map_size); | |
| 1405 | 1405 | if (!membase) { |
| 1406 | 1406 | netif_err(efx, probe, efx->net_dev, |
| 1407 | 1407 | "could not shrink memory BAR to %x\n", |
| @@ -1338,7 +1338,7 @@ static int efx_init_io(struct efx_nic *efx) · 1337 unmodified lines | ||
| 1338 | 1338 | rc = -EIO; |
| 1339 | 1339 | goto fail3; |
| 1340 | 1340 | } |
| 1341 | − efx->membase = ioremap_nocache(efx->membase_phys, mem_map_size); | |
| 1341 | + efx->membase = ioremap(efx->membase_phys, mem_map_size); | |
| 1342 | 1342 | if (!efx->membase) { |
| 1343 | 1343 | netif_err(efx, probe, efx->net_dev, |
| 1344 | 1344 | "could not map memory BAR at %llx+%x\n", |
| @@ -1265,7 +1265,7 @@ static int ef4_init_io(struct ef4_nic *efx) · 1264 unmodified lines | ||
| 1265 | 1265 | rc = -EIO; |
| 1266 | 1266 | goto fail3; |
| 1267 | 1267 | } |
| 1268 | − efx->membase = ioremap_nocache(efx->membase_phys, mem_map_size); | |
| 1268 | + efx->membase = ioremap(efx->membase_phys, mem_map_size); | |
| 1269 | 1269 | if (!efx->membase) { |
| 1270 | 1270 | netif_err(efx, probe, efx->net_dev, |
| 1271 | 1271 | "could not map memory BAR at %llx+%x\n", |
| @@ -2454,7 +2454,7 @@ static int smsc911x_drv_probe(struct platform_device *pdev) · 2453 unmodified lines | ||
| 2454 | 2454 | |
| 2455 | 2455 | pdata = netdev_priv(dev); |
| 2456 | 2456 | dev->irq = irq; |
| 2457 | − pdata->ioaddr = ioremap_nocache(res->start, res_size); | |
| 2457 | + pdata->ioaddr = ioremap(res->start, res_size); | |
| 2458 | 2458 | if (!pdata->ioaddr) { |
| 2459 | 2459 | retval = -ENOMEM; |
| 2460 | 2460 | goto out_ioremap_fail; |
| @@ -2019,7 +2019,7 @@ static int netcp_create_interface(struct netcp_device *netcp_device, · 2018 unmodified lines | ||
| 2019 | 2019 | goto quit; |
| 2020 | 2020 | } |
| 2021 | 2021 | |
| 2022 | − efuse = devm_ioremap_nocache(dev, res.start, size); | |
| 2022 | + efuse = devm_ioremap(dev, res.start, size); | |
| 2023 | 2023 | if (!efuse) { |
| 2024 | 2024 | dev_err(dev, "could not map resource\n"); |
| 2025 | 2025 | devm_release_mem_region(dev, res.start, size); |
| @@ -1202,7 +1202,7 @@ static int temac_probe(struct platform_device *pdev) · 1201 unmodified lines | ||
| 1202 | 1202 | |
| 1203 | 1203 | /* map device registers */ |
| 1204 | 1204 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 1205 | − lp->regs = devm_ioremap_nocache(&pdev->dev, res->start, | |
| 1205 | + lp->regs = devm_ioremap(&pdev->dev, res->start, | |
| 1206 | 1206 | resource_size(res)); |
| 1207 | 1207 | if (IS_ERR(lp->regs)) { |
| 1208 | 1208 | dev_err(&pdev->dev, "could not map TEMAC registers\n"); |
| @@ -1296,7 +1296,7 @@ static int temac_probe(struct platform_device *pdev) · 87 unmodified lines | ||
| 1296 | 1296 | } else if (pdata) { |
| 1297 | 1297 | /* 2nd memory resource specifies DMA registers */ |
| 1298 | 1298 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
| 1299 | − lp->sdma_regs = devm_ioremap_nocache(&pdev->dev, res->start, | |
| 1299 | + lp->sdma_regs = devm_ioremap(&pdev->dev, res->start, | |
| 1300 | 1300 | resource_size(res)); |
| 1301 | 1301 | if (IS_ERR(lp->sdma_regs)) { |
| 1302 | 1302 | dev_err(&pdev->dev, |
| @@ -614,7 +614,7 @@ static int dfx_register(struct device *bdev) · 613 unmodified lines | ||
| 614 | 614 | |
| 615 | 615 | /* Set up I/O base address. */ |
| 616 | 616 | if (dfx_use_mmio) { |
| 617 | − bp->base.mem = ioremap_nocache(bar_start[0], bar_len[0]); | |
| 617 | + bp->base.mem = ioremap(bar_start[0], bar_len[0]); | |
| 618 | 618 | if (!bp->base.mem) { |
| 619 | 619 | printk(KERN_ERR "%s: Cannot map MMIO\n", print_name); |
| 620 | 620 | err = -ENOMEM; |
| @@ -1318,7 +1318,7 @@ static int fza_probe(struct device *bdev) · 1317 unmodified lines | ||
| 1318 | 1318 | } |
| 1319 | 1319 | |
| 1320 | 1320 | /* MMIO mapping setup. */ |
| 1321 | − mmio = ioremap_nocache(start, len); | |
| 1321 | + mmio = ioremap(start, len); | |
| 1322 | 1322 | if (!mmio) { |
| 1323 | 1323 | pr_err("%s: cannot map MMIO\n", fp->name); |
| 1324 | 1324 | ret = -ENOMEM; |
| @@ -40,7 +40,7 @@ static u8 *fjes_hw_iomap(struct fjes_hw *hw) · 39 unmodified lines | ||
| 40 | 40 | return NULL; |
| 41 | 41 | } |
| 42 | 42 | |
| 43 | − base = (u8 *)ioremap_nocache(hw->hw_res.start, hw->hw_res.size); | |
| 43 | + base = (u8 *)ioremap(hw->hw_res.start, hw->hw_res.size); | |
| 44 | 44 | |
| 45 | 45 | return base; |
| 46 | 46 | } |
| @@ -635,7 +635,7 @@ static int wanxl_pci_init_one(struct pci_dev *pdev, · 634 unmodified lines | ||
| 635 | 635 | /* set up PLX mapping */ |
| 636 | 636 | plx_phy = pci_resource_start(pdev, 0); |
| 637 | 637 | |
| 638 | − card->plx = ioremap_nocache(plx_phy, 0x70); | |
| 638 | + card->plx = ioremap(plx_phy, 0x70); | |
| 639 | 639 | if (!card->plx) { |
| 640 | 640 | pr_err("ioremap() failed\n"); |
| 641 | 641 | wanxl_pci_remove_one(pdev); |
| @@ -704,7 +704,7 @@ static int wanxl_pci_init_one(struct pci_dev *pdev, · 62 unmodified lines | ||
| 704 | 704 | PCI_DMA_FROMDEVICE); |
| 705 | 705 | } |
| 706 | 706 | |
| 707 | − mem = ioremap_nocache(mem_phy, PDM_OFFSET + sizeof(firmware)); | |
| 707 | + mem = ioremap(mem_phy, PDM_OFFSET + sizeof(firmware)); | |
| 708 | 708 | if (!mem) { |
| 709 | 709 | pr_err("ioremap() failed\n"); |
| 710 | 710 | wanxl_pci_remove_one(pdev); |
| @@ -458,7 +458,7 @@ static int ath10k_ahb_resource_init(struct ath10k *ar) · 457 unmodified lines | ||
| 458 | 458 | |
| 459 | 459 | ar_ahb->mem_len = resource_size(res); |
| 460 | 460 | |
| 461 | − ar_ahb->gcc_mem = ioremap_nocache(ATH10K_GCC_REG_BASE, | |
| 461 | + ar_ahb->gcc_mem = ioremap(ATH10K_GCC_REG_BASE, | |
| 462 | 462 | ATH10K_GCC_REG_SIZE); |
| 463 | 463 | if (!ar_ahb->gcc_mem) { |
| 464 | 464 | ath10k_err(ar, "gcc mem ioremap error\n"); |
| @@ -466,7 +466,7 @@ static int ath10k_ahb_resource_init(struct ath10k *ar) · 1 unmodified line | ||
| 466 | 466 | goto err_mem_unmap; |
| 467 | 467 | } |
| 468 | 468 | |
| 469 | − ar_ahb->tcsr_mem = ioremap_nocache(ATH10K_TCSR_REG_BASE, | |
| 469 | + ar_ahb->tcsr_mem = ioremap(ATH10K_TCSR_REG_BASE, | |
| 470 | 470 | ATH10K_TCSR_REG_SIZE); |
| 471 | 471 | if (!ar_ahb->tcsr_mem) { |
| 472 | 472 | ath10k_err(ar, "tcsr mem ioremap error\n"); |
| @@ -106,7 +106,7 @@ static int ath_ahb_probe(struct platform_device *pdev) · 105 unmodified lines | ||
| 106 | 106 | goto err_out; |
| 107 | 107 | } |
| 108 | 108 | |
| 109 | − mem = ioremap_nocache(res->start, resource_size(res)); | |
| 109 | + mem = ioremap(res->start, resource_size(res)); | |
| 110 | 110 | if (mem == NULL) { |
| 111 | 111 | dev_err(&pdev->dev, "ioremap failed\n"); |
| 112 | 112 | ret = -ENOMEM; |
| @@ -92,7 +92,7 @@ static int ath_ahb_probe(struct platform_device *pdev) · 91 unmodified lines | ||
| 92 | 92 | return -ENXIO; |
| 93 | 93 | } |
| 94 | 94 | |
| 95 | − mem = devm_ioremap_nocache(&pdev->dev, res->start, resource_size(res)); | |
| 95 | + mem = devm_ioremap(&pdev->dev, res->start, resource_size(res)); | |
| 96 | 96 | if (mem == NULL) { |
| 97 | 97 | dev_err(&pdev->dev, "ioremap failed\n"); |
| 98 | 98 | return -ENOMEM; |
| @@ -1643,8 +1643,8 @@ static int brcmf_pcie_get_resource(struct brcmf_pciedev_info *devinfo) · 1642 unmodified lines | ||
| 1643 | 1643 | return -EINVAL; |
| 1644 | 1644 | } |
| 1645 | 1645 | |
| 1646 | − devinfo->regs = ioremap_nocache(bar0_addr, BRCMF_PCIE_REG_MAP_SIZE); | |
| 1647 | − devinfo->tcm = ioremap_nocache(bar1_addr, bar1_size); | |
| 1646 | + devinfo->regs = ioremap(bar0_addr, BRCMF_PCIE_REG_MAP_SIZE); | |
| 1647 | + devinfo->tcm = ioremap(bar1_addr, bar1_size); | |
| 1648 | 1648 | |
| 1649 | 1649 | if (!devinfo->regs || !devinfo->tcm) { |
| 1650 | 1650 | brcmf_err(bus, "ioremap() failed (%p,%p)\n", devinfo->regs, |
| @@ -6167,7 +6167,7 @@ static int ipw2100_pci_init_one(struct pci_dev *pci_dev, · 6166 unmodified lines | ||
| 6167 | 6167 | ioaddr = pci_iomap(pci_dev, 0, 0); |
| 6168 | 6168 | if (!ioaddr) { |
| 6169 | 6169 | printk(KERN_WARNING DRV_NAME |
| 6170 | − "Error calling ioremap_nocache.\n"); | |
| 6170 | + "Error calling ioremap.\n"); | |
| 6171 | 6171 | err = -EIO; |
| 6172 | 6172 | goto fail; |
| 6173 | 6173 | } |
| @@ -90,7 +90,7 @@ static int _store_optimized_voltages(struct device *dev, · 89 unmodified lines | ||
| 90 | 90 | goto out_map; |
| 91 | 91 | } |
| 92 | 92 | |
| 93 | − base = ioremap_nocache(res->start, resource_size(res)); | |
| 93 | + base = ioremap(res->start, resource_size(res)); | |
| 94 | 94 | if (!base) { |
| 95 | 95 | dev_err(dev, "Unable to map Efuse registers\n"); |
| 96 | 96 | ret = -ENOMEM; |
| @@ -1534,7 +1534,7 @@ static int __init ccio_probe(struct parisc_device *dev) · 1533 unmodified lines | ||
| 1534 | 1534 | *ioc_p = ioc; |
| 1535 | 1535 | |
| 1536 | 1536 | ioc->hw_path = dev->hw_path; |
| 1537 | − ioc->ioc_regs = ioremap_nocache(dev->hpa.start, 4096); | |
| 1537 | + ioc->ioc_regs = ioremap(dev->hpa.start, 4096); | |
| 1538 | 1538 | if (!ioc->ioc_regs) { |
| 1539 | 1539 | kfree(ioc); |
| 1540 | 1540 | return -ENOMEM; |
| @@ -974,7 +974,7 @@ static int __init dino_probe(struct parisc_device *dev) · 973 unmodified lines | ||
| 974 | 974 | } |
| 975 | 975 | |
| 976 | 976 | dino_dev->hba.dev = dev; |
| 977 | − dino_dev->hba.base_addr = ioremap_nocache(hpa, 4096); | |
| 977 | + dino_dev->hba.base_addr = ioremap(hpa, 4096); | |
| 978 | 978 | dino_dev->hba.lmmio_space_offset = PCI_F_EXTEND; |
| 979 | 979 | spin_lock_init(&dino_dev->dinosaur_pen); |
| 980 | 980 | dino_dev->hba.iommu = ccio_get_iommu(dev); |
| @@ -354,10 +354,10 @@ static int __init eisa_probe(struct parisc_device *dev) · 353 unmodified lines | ||
| 354 | 354 | eisa_dev.eeprom_addr = MIRAGE_EEPROM_BASE_ADDR; |
| 355 | 355 | } |
| 356 | 356 | } |
| 357 | − eisa_eeprom_addr = ioremap_nocache(eisa_dev.eeprom_addr, HPEE_MAX_LENGTH); | |
| 357 | + eisa_eeprom_addr = ioremap(eisa_dev.eeprom_addr, HPEE_MAX_LENGTH); | |
| 358 | 358 | if (!eisa_eeprom_addr) { |
| 359 | 359 | result = -ENOMEM; |
| 360 | − printk(KERN_ERR "EISA: ioremap_nocache failed!\n"); | |
| 360 | + printk(KERN_ERR "EISA: ioremap failed!\n"); | |
| 361 | 361 | goto error_free_irq; |
| 362 | 362 | } |
| 363 | 363 | result = eisa_enumerator(eisa_dev.eeprom_addr, &eisa_dev.hba.io_space, |
| @@ -927,7 +927,7 @@ void *iosapic_register(unsigned long hpa) · 926 unmodified lines | ||
| 927 | 927 | return NULL; |
| 928 | 928 | } |
| 929 | 929 | |
| 930 | − isi->addr = ioremap_nocache(hpa, 4096); | |
| 930 | + isi->addr = ioremap(hpa, 4096); | |
| 931 | 931 | isi->isi_hpa = hpa; |
| 932 | 932 | isi->isi_version = iosapic_rd_version(isi); |
| 933 | 933 | isi->isi_num_vectors = IOSAPIC_IRDT_MAX_ENTRY(isi->isi_version) + 1; |
| @@ -1134,7 +1134,7 @@ lba_pat_resources(struct parisc_device *pa_dev, struct lba_device *lba_dev) · 1133 unmodified lines | ||
| 1134 | 1134 | ** Postable I/O port space is per PCI host adapter. |
| 1135 | 1135 | ** base of 64MB PIOP region |
| 1136 | 1136 | */ |
| 1137 | − lba_dev->iop_base = ioremap_nocache(p->start, 64 * 1024 * 1024); | |
| 1137 | + lba_dev->iop_base = ioremap(p->start, 64 * 1024 * 1024); | |
| 1138 | 1138 | |
| 1139 | 1139 | sprintf(lba_dev->hba.io_name, "PCI%02x Ports", |
| 1140 | 1140 | (int)lba_dev->hba.bus_num.start); |
| @@ -1476,7 +1476,7 @@ lba_driver_probe(struct parisc_device *dev) · 335 unmodified lines | ||
| 1476 | 1476 | u32 func_class; |
| 1477 | 1477 | void *tmp_obj; |
| 1478 | 1478 | char *version; |
| 1479 | − void __iomem *addr = ioremap_nocache(dev->hpa.start, 4096); | |
| 1479 | + void __iomem *addr = ioremap(dev->hpa.start, 4096); | |
| 1480 | 1480 | int max; |
| 1481 | 1481 | |
| 1482 | 1482 | /* Read HW Rev First */ |
| @@ -1575,7 +1575,7 @@ lba_driver_probe(struct parisc_device *dev) · 92 unmodified lines | ||
| 1575 | 1575 | } else { |
| 1576 | 1576 | if (!astro_iop_base) { |
| 1577 | 1577 | /* Sprockets PDC uses NPIOP region */ |
| 1578 | − astro_iop_base = ioremap_nocache(LBA_PORT_BASE, 64 * 1024); | |
| 1578 | + astro_iop_base = ioremap(LBA_PORT_BASE, 64 * 1024); | |
| 1579 | 1579 | pci_port = &lba_astro_port_ops; |
| 1580 | 1580 | } |
| 1581 | 1581 | |
| @@ -1693,7 +1693,7 @@ void __init lba_init(void) · 111 unmodified lines | ||
| 1693 | 1693 | */ |
| 1694 | 1694 | void lba_set_iregs(struct parisc_device *lba, u32 ibase, u32 imask) |
| 1695 | 1695 | { |
| 1696 | − void __iomem * base_addr = ioremap_nocache(lba->hpa.start, 4096); | |
| 1696 | + void __iomem * base_addr = ioremap(lba->hpa.start, 4096); | |
| 1697 | 1697 | |
| 1698 | 1698 | imask <<= 2; /* adjust for hints - 2 more bits */ |
| 1699 | 1699 | |
| @@ -1513,7 +1513,7 @@ sba_ioc_init(struct parisc_device *sba, struct ioc *ioc, int ioc_num) · 1512 unmodified lines | ||
| 1513 | 1513 | |
| 1514 | 1514 | static void __iomem *ioc_remap(struct sba_device *sba_dev, unsigned int offset) |
| 1515 | 1515 | { |
| 1516 | − return ioremap_nocache(sba_dev->dev->hpa.start + offset, SBA_FUNC_SIZE); | |
| 1516 | + return ioremap(sba_dev->dev->hpa.start + offset, SBA_FUNC_SIZE); | |
| 1517 | 1517 | } |
| 1518 | 1518 | |
| 1519 | 1519 | static void sba_hw_init(struct sba_device *sba_dev) |
| @@ -1883,7 +1883,7 @@ static int __init sba_driver_callback(struct parisc_device *dev) · 363 unmodified lines | ||
| 1883 | 1883 | u32 func_class; |
| 1884 | 1884 | int i; |
| 1885 | 1885 | char *version; |
| 1886 | − void __iomem *sba_addr = ioremap_nocache(dev->hpa.start, SBA_FUNC_SIZE); | |
| 1886 | + void __iomem *sba_addr = ioremap(dev->hpa.start, SBA_FUNC_SIZE); | |
| 1887 | 1887 | #ifdef CONFIG_PROC_FS |
| 1888 | 1888 | struct proc_dir_entry *root; |
| 1889 | 1889 | #endif |
| @@ -719,7 +719,7 @@ static int __init dra7xx_pcie_probe(struct platform_device *pdev) · 718 unmodified lines | ||
| 719 | 719 | } |
| 720 | 720 | |
| 721 | 721 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ti_conf"); |
| 722 | − base = devm_ioremap_nocache(dev, res->start, resource_size(res)); | |
| 722 | + base = devm_ioremap(dev, res->start, resource_size(res)); | |
| 723 | 723 | if (!base) |
| 724 | 724 | return -ENOMEM; |
| 725 | 725 | |
| @@ -434,7 +434,7 @@ int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no, · 433 unmodified lines | ||
| 434 | 434 | tbl_addr += (tbl_offset + ((interrupt_num - 1) * PCI_MSIX_ENTRY_SIZE)); |
| 435 | 435 | tbl_addr &= PCI_BASE_ADDRESS_MEM_MASK; |
| 436 | 436 | |
| 437 | − msix_tbl = ioremap_nocache(ep->phys_base + tbl_addr, | |
| 437 | + msix_tbl = ioremap(ep->phys_base + tbl_addr, | |
| 438 | 438 | PCI_MSIX_ENTRY_SIZE); |
| 439 | 439 | if (!msix_tbl) |
| 440 | 440 | return -EINVAL; |
| @@ -688,7 +688,7 @@ static void __iomem *msix_map_region(struct pci_dev *dev, unsigned nr_entries) · 687 unmodified lines | ||
| 688 | 688 | table_offset &= PCI_MSIX_TABLE_OFFSET; |
| 689 | 689 | phys_addr = pci_resource_start(dev, bir) + table_offset; |
| 690 | 690 | |
| 691 | − return ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE); | |
| 691 | + return ioremap(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE); | |
| 692 | 692 | } |
| 693 | 693 | |
| 694 | 694 | static int msix_setup_entries(struct pci_dev *dev, void __iomem *base, |
| @@ -184,7 +184,7 @@ void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar) · 183 unmodified lines | ||
| 184 | 184 | pci_warn(pdev, "can't ioremap BAR %d: %pR\n", bar, res); |
| 185 | 185 | return NULL; |
| 186 | 186 | } |
| 187 | − return ioremap_nocache(res->start, resource_size(res)); | |
| 187 | + return ioremap(res->start, resource_size(res)); | |
| 188 | 188 | } |
| 189 | 189 | EXPORT_SYMBOL_GPL(pci_ioremap_bar); |
| 190 | 190 | |
| @@ -1571,7 +1571,7 @@ static void asus_hides_smbus_lpc_ich6_suspend(struct pci_dev *dev) · 1570 unmodified lines | ||
| 1571 | 1571 | |
| 1572 | 1572 | pci_read_config_dword(dev, 0xF0, &rcba); |
| 1573 | 1573 | /* use bits 31:14, 16 kB aligned */ |
| 1574 | − asus_rcba_base = ioremap_nocache(rcba & 0xFFFFC000, 0x4000); | |
| 1574 | + asus_rcba_base = ioremap(rcba & 0xFFFFC000, 0x4000); | |
| 1575 | 1575 | if (asus_rcba_base == NULL) |
| 1576 | 1576 | return; |
| 1577 | 1577 | } |
| @@ -4784,7 +4784,7 @@ static int pci_quirk_enable_intel_lpc_acs(struct pci_dev *dev) · 3206 unmodified lines | ||
| 4784 | 4784 | if (!(rcba & INTEL_LPC_RCBA_ENABLE)) |
| 4785 | 4785 | return -EINVAL; |
| 4786 | 4786 | |
| 4787 | − rcba_mem = ioremap_nocache(rcba & INTEL_LPC_RCBA_MASK, | |
| 4787 | + rcba_mem = ioremap(rcba & INTEL_LPC_RCBA_MASK, | |
| 4788 | 4788 | PAGE_ALIGN(INTEL_UPDCR_REG)); |
| 4789 | 4789 | if (!rcba_mem) |
| 4790 | 4790 | return -ENOMEM; |
| @@ -1049,7 +1049,7 @@ static int ns2_pinmux_probe(struct platform_device *pdev) · 1048 unmodified lines | ||
| 1049 | 1049 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
| 1050 | 1050 | if (!res) |
| 1051 | 1051 | return -EINVAL; |
| 1052 | − pinctrl->base1 = devm_ioremap_nocache(&pdev->dev, res->start, | |
| 1052 | + pinctrl->base1 = devm_ioremap(&pdev->dev, res->start, | |
| 1053 | 1053 | resource_size(res)); |
| 1054 | 1054 | if (!pinctrl->base1) { |
| 1055 | 1055 | dev_err(&pdev->dev, "unable to map I/O space\n"); |
| @@ -578,7 +578,7 @@ static int nsp_pinmux_probe(struct platform_device *pdev) · 577 unmodified lines | ||
| 578 | 578 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
| 579 | 579 | if (!res) |
| 580 | 580 | return -EINVAL; |
| 581 | − pinctrl->base1 = devm_ioremap_nocache(&pdev->dev, res->start, | |
| 581 | + pinctrl->base1 = devm_ioremap(&pdev->dev, res->start, | |
| 582 | 582 | resource_size(res)); |
| 583 | 583 | if (!pinctrl->base1) { |
| 584 | 584 | dev_err(&pdev->dev, "unable to map I/O space\n"); |
| @@ -611,7 +611,7 @@ int imx1_pinctrl_core_probe(struct platform_device *pdev, · 610 unmodified lines | ||
| 611 | 611 | if (!res) |
| 612 | 612 | return -ENOENT; |
| 613 | 613 | |
| 614 | − ipctl->base = devm_ioremap_nocache(&pdev->dev, res->start, | |
| 614 | + ipctl->base = devm_ioremap(&pdev->dev, res->start, | |
| 615 | 615 | resource_size(res)); |
| 616 | 616 | if (!ipctl->base) |
| 617 | 617 | return -ENOMEM; |
| @@ -866,7 +866,7 @@ static int amd_gpio_probe(struct platform_device *pdev) · 865 unmodified lines | ||
| 866 | 866 | return -EINVAL; |
| 867 | 867 | } |
| 868 | 868 | |
| 869 | − gpio_dev->base = devm_ioremap_nocache(&pdev->dev, res->start, | |
| 869 | + gpio_dev->base = devm_ioremap(&pdev->dev, res->start, | |
| 870 | 870 | resource_size(res)); |
| 871 | 871 | if (!gpio_dev->base) |
| 872 | 872 | return -ENOMEM; |
| @@ -652,7 +652,7 @@ static int ipc_probe(struct pci_dev *pdev, const struct pci_device_id *id) · 651 unmodified lines | ||
| 652 | 652 | |
| 653 | 653 | scu->ipc_base = pcim_iomap_table(pdev)[0]; |
| 654 | 654 | |
| 655 | − scu->i2c_base = ioremap_nocache(pdata->i2c_base, pdata->i2c_len); | |
| 655 | + scu->i2c_base = ioremap(pdata->i2c_base, pdata->i2c_len); | |
| 656 | 656 | if (!scu->i2c_base) |
| 657 | 657 | return -ENOMEM; |
| 658 | 658 | |
| @@ -1156,7 +1156,7 @@ static int telemetry_pltdrv_probe(struct platform_device *pdev) · 1155 unmodified lines | ||
| 1156 | 1156 | telm_conf->ioss_config.ssram_base_addr = res1->start; |
| 1157 | 1157 | telm_conf->ioss_config.ssram_size = size; |
| 1158 | 1158 | |
| 1159 | − telm_conf->pss_config.regmap = ioremap_nocache( | |
| 1159 | + telm_conf->pss_config.regmap = ioremap( | |
| 1160 | 1160 | telm_conf->pss_config.ssram_base_addr, |
| 1161 | 1161 | telm_conf->pss_config.ssram_size); |
| 1162 | 1162 | if (!telm_conf->pss_config.regmap) { |
| @@ -1164,7 +1164,7 @@ static int telemetry_pltdrv_probe(struct platform_device *pdev) · 1 unmodified line | ||
| 1164 | 1164 | goto out; |
| 1165 | 1165 | } |
| 1166 | 1166 | |
| 1167 | − telm_conf->ioss_config.regmap = ioremap_nocache( | |
| 1167 | + telm_conf->ioss_config.regmap = ioremap( | |
| 1168 | 1168 | telm_conf->ioss_config.ssram_base_addr, |
| 1169 | 1169 | telm_conf->ioss_config.ssram_size); |
| 1170 | 1170 | if (!telm_conf->ioss_config.regmap) { |
| @@ -489,7 +489,7 @@ static int pmc_setup_dev(struct pci_dev *pdev, const struct pci_device_id *ent) · 488 unmodified lines | ||
| 489 | 489 | pci_read_config_dword(pdev, PMC_BASE_ADDR_OFFSET, &pmc->base_addr); |
| 490 | 490 | pmc->base_addr &= PMC_BASE_ADDR_MASK; |
| 491 | 491 | |
| 492 | − pmc->regmap = ioremap_nocache(pmc->base_addr, PMC_MMIO_REG_LEN); | |
| 492 | + pmc->regmap = ioremap(pmc->base_addr, PMC_MMIO_REG_LEN); | |
| 493 | 493 | if (!pmc->regmap) { |
| 494 | 494 | dev_err(&pdev->dev, "error: ioremap failed\n"); |
| 495 | 495 | return -ENOMEM; |
| @@ -1394,7 +1394,7 @@ static int __init samsung_sabi_init(struct samsung_laptop *samsung) · 1393 unmodified lines | ||
| 1394 | 1394 | int ret = 0; |
| 1395 | 1395 | int i; |
| 1396 | 1396 | |
| 1397 | − samsung->f0000_segment = ioremap_nocache(0xf0000, 0xffff); | |
| 1397 | + samsung->f0000_segment = ioremap(0xf0000, 0xffff); | |
| 1398 | 1398 | if (!samsung->f0000_segment) { |
| 1399 | 1399 | if (debug || force) |
| 1400 | 1400 | pr_err("Can't map the segment at 0xf0000\n"); |
| @@ -1434,7 +1434,7 @@ static int __init samsung_sabi_init(struct samsung_laptop *samsung) · 33 unmodified lines | ||
| 1434 | 1434 | if (debug) |
| 1435 | 1435 | samsung_sabi_infos(samsung, loca, ifaceP); |
| 1436 | 1436 | |
| 1437 | − samsung->sabi_iface = ioremap_nocache(ifaceP, 16); | |
| 1437 | + samsung->sabi_iface = ioremap(ifaceP, 16); | |
| 1438 | 1438 | if (!samsung->sabi_iface) { |
| 1439 | 1439 | pr_err("Can't remap %x\n", ifaceP); |
| 1440 | 1440 | ret = -EINVAL; |
| @@ -748,7 +748,7 @@ static int ti_abb_probe(struct platform_device *pdev) · 747 unmodified lines | ||
| 748 | 748 | * We may have shared interrupt register offsets which are |
| 749 | 749 | * write-1-to-clear between domains ensuring exclusivity. |
| 750 | 750 | */ |
| 751 | − abb->int_base = devm_ioremap_nocache(dev, res->start, | |
| 751 | + abb->int_base = devm_ioremap(dev, res->start, | |
| 752 | 752 | resource_size(res)); |
| 753 | 753 | if (!abb->int_base) { |
| 754 | 754 | dev_err(dev, "Unable to map '%s'\n", pname); |
| @@ -768,7 +768,7 @@ static int ti_abb_probe(struct platform_device *pdev) · 13 unmodified lines | ||
| 768 | 768 | * We may have shared efuse register offsets which are read-only |
| 769 | 769 | * between domains |
| 770 | 770 | */ |
| 771 | − abb->efuse_base = devm_ioremap_nocache(dev, res->start, | |
| 771 | + abb->efuse_base = devm_ioremap(dev, res->start, | |
| 772 | 772 | resource_size(res)); |
| 773 | 773 | if (!abb->efuse_base) { |
| 774 | 774 | dev_err(dev, "Unable to map '%s'\n", pname); |
| @@ -504,7 +504,7 @@ static int __init sh_rtc_probe(struct platform_device *pdev) · 503 unmodified lines | ||
| 504 | 504 | if (unlikely(!rtc->res)) |
| 505 | 505 | return -EBUSY; |
| 506 | 506 | |
| 507 | − rtc->regbase = devm_ioremap_nocache(&pdev->dev, rtc->res->start, | |
| 507 | + rtc->regbase = devm_ioremap(&pdev->dev, rtc->res->start, | |
| 508 | 508 | rtc->regsize); |
| 509 | 509 | if (unlikely(!rtc->regbase)) |
| 510 | 510 | return -EINVAL; |
| @@ -293,7 +293,7 @@ ahd_linux_pci_reserve_mem_region(struct ahd_softc *ahd, · 292 unmodified lines | ||
| 293 | 293 | if (!request_mem_region(start, 0x1000, "aic79xx")) |
| 294 | 294 | error = ENOMEM; |
| 295 | 295 | if (!error) { |
| 296 | − *maddr = ioremap_nocache(base_page, base_offset + 512); | |
| 296 | + *maddr = ioremap(base_page, base_offset + 512); | |
| 297 | 297 | if (*maddr == NULL) { |
| 298 | 298 | error = ENOMEM; |
| 299 | 299 | release_mem_region(start, 0x1000); |
| @@ -372,7 +372,7 @@ ahc_linux_pci_reserve_mem_region(struct ahc_softc *ahc, · 371 unmodified lines | ||
| 372 | 372 | if (!request_mem_region(start, 0x1000, "aic7xxx")) |
| 373 | 373 | error = ENOMEM; |
| 374 | 374 | if (error == 0) { |
| 375 | − *maddr = ioremap_nocache(start, 256); | |
| 375 | + *maddr = ioremap(start, 256); | |
| 376 | 376 | if (*maddr == NULL) { |
| 377 | 377 | error = ENOMEM; |
| 378 | 378 | release_mem_region(start, 0x1000); |
| @@ -270,7 +270,7 @@ static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb) · 269 unmodified lines | ||
| 270 | 270 | break; |
| 271 | 271 | } |
| 272 | 272 | case ACB_ADAPTER_TYPE_C:{ |
| 273 | − acb->pmuC = ioremap_nocache(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1)); | |
| 273 | + acb->pmuC = ioremap(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1)); | |
| 274 | 274 | if (!acb->pmuC) { |
| 275 | 275 | printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); |
| 276 | 276 | return false; |
| @@ -453,14 +453,14 @@ static int beiscsi_map_pci_bars(struct beiscsi_hba *phba, · 452 unmodified lines | ||
| 453 | 453 | u8 __iomem *addr; |
| 454 | 454 | int pcicfg_reg; |
| 455 | 455 | |
| 456 | − addr = ioremap_nocache(pci_resource_start(pcidev, 2), | |
| 456 | + addr = ioremap(pci_resource_start(pcidev, 2), | |
| 457 | 457 | pci_resource_len(pcidev, 2)); |
| 458 | 458 | if (addr == NULL) |
| 459 | 459 | return -ENOMEM; |
| 460 | 460 | phba->ctrl.csr = addr; |
| 461 | 461 | phba->csr_va = addr; |
| 462 | 462 | |
| 463 | − addr = ioremap_nocache(pci_resource_start(pcidev, 4), 128 * 1024); | |
| 463 | + addr = ioremap(pci_resource_start(pcidev, 4), 128 * 1024); | |
| 464 | 464 | if (addr == NULL) |
| 465 | 465 | goto pci_map_err; |
| 466 | 466 | phba->ctrl.db = addr; |
| @@ -471,7 +471,7 @@ static int beiscsi_map_pci_bars(struct beiscsi_hba *phba, · 4 unmodified lines | ||
| 471 | 471 | else |
| 472 | 472 | pcicfg_reg = 0; |
| 473 | 473 | |
| 474 | − addr = ioremap_nocache(pci_resource_start(pcidev, pcicfg_reg), | |
| 474 | + addr = ioremap(pci_resource_start(pcidev, pcicfg_reg), | |
| 475 | 475 | pci_resource_len(pcidev, pcicfg_reg)); |
| 476 | 476 | |
| 477 | 477 | if (addr == NULL) |
| @@ -1414,7 +1414,7 @@ int bnx2fc_map_doorbell(struct bnx2fc_rport *tgt) · 1413 unmodified lines | ||
| 1414 | 1414 | reg_base = pci_resource_start(hba->pcidev, |
| 1415 | 1415 | BNX2X_DOORBELL_PCI_BAR); |
| 1416 | 1416 | reg_off = (1 << BNX2X_DB_SHIFT) * (context_id & 0x1FFFF); |
| 1417 | − tgt->ctx_base = ioremap_nocache(reg_base + reg_off, 4); | |
| 1417 | + tgt->ctx_base = ioremap(reg_base + reg_off, 4); | |
| 1418 | 1418 | if (!tgt->ctx_base) |
| 1419 | 1419 | return -ENOMEM; |
| 1420 | 1420 | return 0; |
| @@ -2715,7 +2715,7 @@ int bnx2i_map_ep_dbell_regs(struct bnx2i_endpoint *ep) · 2714 unmodified lines | ||
| 2715 | 2715 | reg_base = pci_resource_start(ep->hba->pcidev, |
| 2716 | 2716 | BNX2X_DOORBELL_PCI_BAR); |
| 2717 | 2717 | reg_off = (1 << BNX2X_DB_SHIFT) * (cid_num & 0x1FFFF); |
| 2718 | − ep->qp.ctx_base = ioremap_nocache(reg_base + reg_off, 4); | |
| 2718 | + ep->qp.ctx_base = ioremap(reg_base + reg_off, 4); | |
| 2719 | 2719 | if (!ep->qp.ctx_base) |
| 2720 | 2720 | return -ENOMEM; |
| 2721 | 2721 | goto arm_cq; |
| @@ -2736,7 +2736,7 @@ int bnx2i_map_ep_dbell_regs(struct bnx2i_endpoint *ep) · 14 unmodified lines | ||
| 2736 | 2736 | /* 5709 device in normal node and 5706/5708 devices */ |
| 2737 | 2737 | reg_off = CTX_OFFSET + (MB_KERNEL_CTX_SIZE * cid_num); |
| 2738 | 2738 | |
| 2739 | − ep->qp.ctx_base = ioremap_nocache(ep->hba->reg_base + reg_off, | |
| 2739 | + ep->qp.ctx_base = ioremap(ep->hba->reg_base + reg_off, | |
| 2740 | 2740 | MB_KERNEL_CTX_SIZE); |
| 2741 | 2741 | if (!ep->qp.ctx_base) |
| 2742 | 2742 | return -ENOMEM; |
| @@ -529,7 +529,7 @@ static struct csio_hw *csio_hw_alloc(struct pci_dev *pdev) · 528 unmodified lines | ||
| 529 | 529 | goto err_free_hw; |
| 530 | 530 | |
| 531 | 531 | /* Get the start address of registers from BAR 0 */ |
| 532 | − hw->regstart = ioremap_nocache(pci_resource_start(pdev, 0), | |
| 532 | + hw->regstart = ioremap(pci_resource_start(pdev, 0), | |
| 533 | 533 | pci_resource_len(pdev, 0)); |
| 534 | 534 | if (!hw->regstart) { |
| 535 | 535 | csio_err(hw, "Could not map BAR 0, regstart = %p\n", |
| @@ -6876,7 +6876,7 @@ static void __iomem *remap_pci_mem(ulong base, ulong size) · 6875 unmodified lines | ||
| 6876 | 6876 | { |
| 6877 | 6877 | ulong page_base = ((ulong) base) & PAGE_MASK; |
| 6878 | 6878 | ulong page_offs = ((ulong) base) - page_base; |
| 6879 | − void __iomem *page_remapped = ioremap_nocache(page_base, | |
| 6879 | + void __iomem *page_remapped = ioremap(page_base, | |
| 6880 | 6880 | page_offs + size); |
| 6881 | 6881 | |
| 6882 | 6882 | return page_remapped ? (page_remapped + page_offs) : NULL; |
| @@ -98,7 +98,7 @@ lasi700_probe(struct parisc_device *dev) · 97 unmodified lines | ||
| 98 | 98 | |
| 99 | 99 | hostdata->dev = &dev->dev; |
| 100 | 100 | dma_set_mask(&dev->dev, DMA_BIT_MASK(32)); |
| 101 | − hostdata->base = ioremap_nocache(base, 0x100); | |
| 101 | + hostdata->base = ioremap(base, 0x100); | |
| 102 | 102 | hostdata->differential = 0; |
| 103 | 103 | |
| 104 | 104 | if (dev->id.sversion == LASI_700_SVERSION) { |
| @@ -731,7 +731,7 @@ megaraid_init_mbox(adapter_t *adapter) · 730 unmodified lines | ||
| 731 | 731 | goto out_free_raid_dev; |
| 732 | 732 | } |
| 733 | 733 | |
| 734 | − raid_dev->baseaddr = ioremap_nocache(raid_dev->baseport, 128); | |
| 734 | + raid_dev->baseaddr = ioremap(raid_dev->baseport, 128); | |
| 735 | 735 | |
| 736 | 736 | if (!raid_dev->baseaddr) { |
| 737 | 737 | |
| @@ -5875,7 +5875,7 @@ static int megasas_init_fw(struct megasas_instance *instance) · 5874 unmodified lines | ||
| 5875 | 5875 | } |
| 5876 | 5876 | |
| 5877 | 5877 | base_addr = pci_resource_start(instance->pdev, instance->bar); |
| 5878 | − instance->reg_set = ioremap_nocache(base_addr, 8192); | |
| 5878 | + instance->reg_set = ioremap(base_addr, 8192); | |
| 5879 | 5879 | |
| 5880 | 5880 | if (!instance->reg_set) { |
| 5881 | 5881 | dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to map IO mem\n"); |
| @@ -3531,7 +3531,7 @@ static struct myrb_hba *myrb_detect(struct pci_dev *pdev, · 3530 unmodified lines | ||
| 3531 | 3531 | spin_lock_init(&cb->queue_lock); |
| 3532 | 3532 | if (mmio_size < PAGE_SIZE) |
| 3533 | 3533 | mmio_size = PAGE_SIZE; |
| 3534 | − cb->mmio_base = ioremap_nocache(cb->pci_addr & PAGE_MASK, mmio_size); | |
| 3534 | + cb->mmio_base = ioremap(cb->pci_addr & PAGE_MASK, mmio_size); | |
| 3535 | 3535 | if (cb->mmio_base == NULL) { |
| 3536 | 3536 | dev_err(&pdev->dev, |
| 3537 | 3537 | "Unable to map Controller Register Window\n"); |
| @@ -2311,7 +2311,7 @@ static struct myrs_hba *myrs_detect(struct pci_dev *pdev, · 2310 unmodified lines | ||
| 2311 | 2311 | /* Map the Controller Register Window. */ |
| 2312 | 2312 | if (mmio_size < PAGE_SIZE) |
| 2313 | 2313 | mmio_size = PAGE_SIZE; |
| 2314 | − cs->mmio_base = ioremap_nocache(cs->pci_addr & PAGE_MASK, mmio_size); | |
| 2314 | + cs->mmio_base = ioremap(cs->pci_addr & PAGE_MASK, mmio_size); | |
| 2315 | 2315 | if (cs->mmio_base == NULL) { |
| 2316 | 2316 | dev_err(&pdev->dev, |
| 2317 | 2317 | "Unable to map Controller Register Window\n"); |
| @@ -1560,7 +1560,7 @@ static int nsp_cs_config_check(struct pcmcia_device *p_dev, void *priv_data) · 1559 unmodified lines | ||
| 1560 | 1560 | goto next_entry; |
| 1561 | 1561 | |
| 1562 | 1562 | data->MmioAddress = (unsigned long) |
| 1563 | − ioremap_nocache(p_dev->resource[2]->start, | |
| 1563 | + ioremap(p_dev->resource[2]->start, | |
| 1564 | 1564 | resource_size(p_dev->resource[2])); |
| 1565 | 1565 | data->MmioLength = resource_size(p_dev->resource[2]); |
| 1566 | 1566 | } |
| @@ -789,7 +789,7 @@ qlafx00_iospace_config(struct qla_hw_data *ha) · 788 unmodified lines | ||
| 789 | 789 | } |
| 790 | 790 | |
| 791 | 791 | ha->cregbase = |
| 792 | − ioremap_nocache(pci_resource_start(ha->pdev, 0), BAR0_LEN_FX00); | |
| 792 | + ioremap(pci_resource_start(ha->pdev, 0), BAR0_LEN_FX00); | |
| 793 | 793 | if (!ha->cregbase) { |
| 794 | 794 | ql_log_pci(ql_log_fatal, ha->pdev, 0x0128, |
| 795 | 795 | "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev)); |
| @@ -810,7 +810,7 @@ qlafx00_iospace_config(struct qla_hw_data *ha) · 14 unmodified lines | ||
| 810 | 810 | } |
| 811 | 811 | |
| 812 | 812 | ha->iobase = |
| 813 | − ioremap_nocache(pci_resource_start(ha->pdev, 2), BAR2_LEN_FX00); | |
| 813 | + ioremap(pci_resource_start(ha->pdev, 2), BAR2_LEN_FX00); | |
| 814 | 814 | if (!ha->iobase) { |
| 815 | 815 | ql_log_pci(ql_log_fatal, ha->pdev, 0x012b, |
| 816 | 816 | "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev)); |
| @@ -7457,7 +7457,7 @@ static int pqi_pci_init(struct pqi_ctrl_info *ctrl_info) · 7456 unmodified lines | ||
| 7457 | 7457 | goto disable_device; |
| 7458 | 7458 | } |
| 7459 | 7459 | |
| 7460 | − ctrl_info->iomem_base = ioremap_nocache(pci_resource_start( | |
| 7460 | + ctrl_info->iomem_base = ioremap(pci_resource_start( | |
| 7461 | 7461 | ctrl_info->pci_dev, 0), |
| 7462 | 7462 | sizeof(struct pqi_ctrl_registers)); |
| 7463 | 7463 | if (!ctrl_info->iomem_base) { |
| @@ -71,7 +71,7 @@ static int snirm710_probe(struct platform_device *dev) · 70 unmodified lines | ||
| 71 | 71 | |
| 72 | 72 | hostdata->dev = &dev->dev; |
| 73 | 73 | dma_set_mask(&dev->dev, DMA_BIT_MASK(32)); |
| 74 | − hostdata->base = ioremap_nocache(base, 0x100); | |
| 74 | + hostdata->base = ioremap(base, 0x100); | |
| 75 | 75 | hostdata->differential = 0; |
| 76 | 76 | |
| 77 | 77 | hostdata->clock = SNIRM710_CLOCK; |
| @@ -190,7 +190,7 @@ static int esp_sun3x_probe(struct platform_device *dev) · 189 unmodified lines | ||
| 190 | 190 | if (!res || !res->start) |
| 191 | 191 | goto fail_unlink; |
| 192 | 192 | |
| 193 | − esp->regs = ioremap_nocache(res->start, 0x20); | |
| 193 | + esp->regs = ioremap(res->start, 0x20); | |
| 194 | 194 | if (!esp->regs) |
| 195 | 195 | goto fail_unmap_regs; |
| 196 | 196 | |
| @@ -198,7 +198,7 @@ static int esp_sun3x_probe(struct platform_device *dev) · 1 unmodified line | ||
| 198 | 198 | if (!res || !res->start) |
| 199 | 199 | goto fail_unmap_regs; |
| 200 | 200 | |
| 201 | − esp->dma_regs = ioremap_nocache(res->start, 0x10); | |
| 201 | + esp->dma_regs = ioremap(res->start, 0x10); | |
| 202 | 202 | |
| 203 | 203 | esp->command_block = dma_alloc_coherent(esp->dev, 16, |
| 204 | 204 | &esp->command_block_dma, |
| @@ -89,7 +89,7 @@ zalon_probe(struct parisc_device *dev) · 88 unmodified lines | ||
| 89 | 89 | struct gsc_irq gsc_irq; |
| 90 | 90 | u32 zalon_vers; |
| 91 | 91 | int error = -ENODEV; |
| 92 | − void __iomem *zalon = ioremap_nocache(dev->hpa.start, 4096); | |
| 92 | + void __iomem *zalon = ioremap(dev->hpa.start, 4096); | |
| 93 | 93 | void __iomem *io_port = zalon + GSC_SCSI_ZALON_OFFSET; |
| 94 | 94 | static int unit = 0; |
| 95 | 95 | struct Scsi_Host *host; |
| @@ -801,7 +801,7 @@ static int zorro_esp_probe(struct zorro_dev *z, · 800 unmodified lines | ||
| 801 | 801 | /* additional setup required for Fastlane */ |
| 802 | 802 | if (zep->zorro3 && ent->driver_data == ZORRO_BLZ1230II) { |
| 803 | 803 | /* map full address space up to ESP base for DMA */ |
| 804 | − zep->board_base = ioremap_nocache(board, | |
| 804 | + zep->board_base = ioremap(board, | |
| 805 | 805 | FASTLANE_ESP_ADDR-1); |
| 806 | 806 | if (!zep->board_base) { |
| 807 | 807 | pr_err("Cannot allocate board address space\n"); |
| @@ -816,7 +816,7 @@ static int zorro_esp_probe(struct zorro_dev *z, · 8 unmodified lines | ||
| 816 | 816 | esp->ops = zdd->esp_ops; |
| 817 | 817 | |
| 818 | 818 | if (ioaddr > 0xffffff) |
| 819 | − esp->regs = ioremap_nocache(ioaddr, 0x20); | |
| 819 | + esp->regs = ioremap(ioaddr, 0x20); | |
| 820 | 820 | else |
| 821 | 821 | /* ZorroII address space remapped nocache by early startup */ |
| 822 | 822 | esp->regs = ZTWO_VADDR(ioaddr); |
| @@ -842,7 +842,7 @@ static int zorro_esp_probe(struct zorro_dev *z, · 19 unmodified lines | ||
| 842 | 842 | * Only Fastlane Z3 for now - add switch for correct struct |
| 843 | 843 | * dma_registers size if adding any more |
| 844 | 844 | */ |
| 845 | − esp->dma_regs = ioremap_nocache(dmaaddr, | |
| 845 | + esp->dma_regs = ioremap(dmaaddr, | |
| 846 | 846 | sizeof(struct fastlane_dma_registers)); |
| 847 | 847 | } else |
| 848 | 848 | /* ZorroII address space remapped nocache by early startup */ |
| @@ -368,7 +368,7 @@ static int clk_establish_mapping(struct clk *clk) · 367 unmodified lines | ||
| 368 | 368 | if (!mapping->base && mapping->phys) { |
| 369 | 369 | kref_init(&mapping->ref); |
| 370 | 370 | |
| 371 | − mapping->base = ioremap_nocache(mapping->phys, mapping->len); | |
| 371 | + mapping->base = ioremap(mapping->phys, mapping->len); | |
| 372 | 372 | if (unlikely(!mapping->base)) |
| 373 | 373 | return -ENXIO; |
| 374 | 374 | } else if (mapping->base) { |
| @@ -213,7 +213,7 @@ int __init register_intc_controller(struct intc_desc *desc) · 212 unmodified lines | ||
| 213 | 213 | WARN_ON(resource_type(res) != IORESOURCE_MEM); |
| 214 | 214 | d->window[k].phys = res->start; |
| 215 | 215 | d->window[k].size = resource_size(res); |
| 216 | − d->window[k].virt = ioremap_nocache(res->start, | |
| 216 | + d->window[k].virt = ioremap(res->start, | |
| 217 | 217 | resource_size(res)); |
| 218 | 218 | if (!d->window[k].virt) |
| 219 | 219 | goto err2; |
| @@ -73,7 +73,7 @@ int register_intc_userimask(unsigned long addr) · 72 unmodified lines | ||
| 73 | 73 | if (unlikely(uimask)) |
| 74 | 74 | return -EBUSY; |
| 75 | 75 | |
| 76 | − uimask = ioremap_nocache(addr, SZ_4K); | |
| 76 | + uimask = ioremap(addr, SZ_4K); | |
| 77 | 77 | if (unlikely(!uimask)) |
| 78 | 78 | return -ENOMEM; |
| 79 | 79 | |
| @@ -219,7 +219,7 @@ static int __init tegra_flowctrl_init(void) · 218 unmodified lines | ||
| 219 | 219 | return 0; |
| 220 | 220 | } |
| 221 | 221 | |
| 222 | − tegra_flowctrl_base = ioremap_nocache(res.start, resource_size(&res)); | |
| 222 | + tegra_flowctrl_base = ioremap(res.start, resource_size(&res)); | |
| 223 | 223 | if (!tegra_flowctrl_base) |
| 224 | 224 | return -ENXIO; |
| 225 | 225 | |
| @@ -408,7 +408,7 @@ static int __init tegra_init_fuse(void) · 407 unmodified lines | ||
| 408 | 408 | } |
| 409 | 409 | } |
| 410 | 410 | |
| 411 | − fuse->base = ioremap_nocache(regs.start, resource_size(®s)); | |
| 411 | + fuse->base = ioremap(regs.start, resource_size(®s)); | |
| 412 | 412 | if (!fuse->base) { |
| 413 | 413 | pr_err("failed to map FUSE registers\n"); |
| 414 | 414 | return -ENXIO; |
| @@ -159,11 +159,11 @@ void __init tegra_init_apbmisc(void) · 158 unmodified lines | ||
| 159 | 159 | } |
| 160 | 160 | } |
| 161 | 161 | |
| 162 | − apbmisc_base = ioremap_nocache(apbmisc.start, resource_size(&apbmisc)); | |
| 162 | + apbmisc_base = ioremap(apbmisc.start, resource_size(&apbmisc)); | |
| 163 | 163 | if (!apbmisc_base) |
| 164 | 164 | pr_err("failed to map APBMISC registers\n"); |
| 165 | 165 | |
| 166 | − strapping_base = ioremap_nocache(straps.start, resource_size(&straps)); | |
| 166 | + strapping_base = ioremap(straps.start, resource_size(&straps)); | |
| 167 | 167 | if (!strapping_base) |
| 168 | 168 | pr_err("failed to map strapping options registers\n"); |
| 169 | 169 | |
| @@ -2826,7 +2826,7 @@ static void tegra186_pmc_setup_irq_polarity(struct tegra_pmc *pmc, · 2825 unmodified lines | ||
| 2826 | 2826 | |
| 2827 | 2827 | of_address_to_resource(np, index, ®s); |
| 2828 | 2828 | |
| 2829 | − wake = ioremap_nocache(regs.start, resource_size(®s)); | |
| 2829 | + wake = ioremap(regs.start, resource_size(®s)); | |
| 2830 | 2830 | if (!wake) { |
| 2831 | 2831 | dev_err(pmc->dev, "failed to map PMC wake registers\n"); |
| 2832 | 2832 | return; |
| @@ -3097,7 +3097,7 @@ static int __init tegra_pmc_early_init(void) · 264 unmodified lines | ||
| 3097 | 3097 | } |
| 3098 | 3098 | } |
| 3099 | 3099 | |
| 3100 | − pmc->base = ioremap_nocache(regs.start, resource_size(®s)); | |
| 3100 | + pmc->base = ioremap(regs.start, resource_size(®s)); | |
| 3101 | 3101 | if (!pmc->base) { |
| 3102 | 3102 | pr_err("failed to map PMC registers\n"); |
| 3103 | 3103 | of_node_put(np); |
| @@ -511,7 +511,7 @@ static int xvcu_probe(struct platform_device *pdev) · 510 unmodified lines | ||
| 511 | 511 | return -ENODEV; |
| 512 | 512 | } |
| 513 | 513 | |
| 514 | − xvcu->vcu_slcr_ba = devm_ioremap_nocache(&pdev->dev, res->start, | |
| 514 | + xvcu->vcu_slcr_ba = devm_ioremap(&pdev->dev, res->start, | |
| 515 | 515 | resource_size(res)); |
| 516 | 516 | if (!xvcu->vcu_slcr_ba) { |
| 517 | 517 | dev_err(&pdev->dev, "vcu_slcr register mapping failed.\n"); |
| @@ -524,7 +524,7 @@ static int xvcu_probe(struct platform_device *pdev) · 6 unmodified lines | ||
| 524 | 524 | return -ENODEV; |
| 525 | 525 | } |
| 526 | 526 | |
| 527 | − xvcu->logicore_reg_ba = devm_ioremap_nocache(&pdev->dev, res->start, | |
| 527 | + xvcu->logicore_reg_ba = devm_ioremap(&pdev->dev, res->start, | |
| 528 | 528 | resource_size(res)); |
| 529 | 529 | if (!xvcu->logicore_reg_ba) { |
| 530 | 530 | dev_err(&pdev->dev, "logicore register mapping failed.\n"); |
| @@ -301,7 +301,7 @@ int dw_spi_mid_init(struct dw_spi *dws) · 300 unmodified lines | ||
| 301 | 301 | void __iomem *clk_reg; |
| 302 | 302 | u32 clk_cdiv; |
| 303 | 303 | |
| 304 | − clk_reg = ioremap_nocache(MRST_CLK_SPI_REG, 16); | |
| 304 | + clk_reg = ioremap(MRST_CLK_SPI_REG, 16); | |
| 305 | 305 | if (!clk_reg) |
| 306 | 306 | return -ENOMEM; |
| 307 | 307 | |
| @@ -170,7 +170,7 @@ static int jcore_spi_probe(struct platform_device *pdev) · 169 unmodified lines | ||
| 170 | 170 | if (!devm_request_mem_region(&pdev->dev, res->start, |
| 171 | 171 | resource_size(res), pdev->name)) |
| 172 | 172 | goto exit_busy; |
| 173 | − hw->base = devm_ioremap_nocache(&pdev->dev, res->start, | |
| 173 | + hw->base = devm_ioremap(&pdev->dev, res->start, | |
| 174 | 174 | resource_size(res)); |
| 175 | 175 | if (!hw->base) |
| 176 | 176 | goto exit_busy; |
| @@ -603,7 +603,7 @@ static int npcm_fiu_dirmap_create(struct spi_mem_dirmap_desc *desc) · 602 unmodified lines | ||
| 603 | 603 | |
| 604 | 604 | if (!chip->flash_region_mapped_ptr) { |
| 605 | 605 | chip->flash_region_mapped_ptr = |
| 606 | − devm_ioremap_nocache(fiu->dev, (fiu->res_mem->start + | |
| 606 | + devm_ioremap(fiu->dev, (fiu->res_mem->start + | |
| 607 | 607 | (fiu->info->max_map_size * |
| 608 | 608 | desc->mem->spi->chip_select)), |
| 609 | 609 | (u32)desc->info.length); |
| @@ -63,7 +63,7 @@ int ssb_extif_serial_init(struct ssb_extif *extif, struct ssb_serial_port *ports · 62 unmodified lines | ||
| 63 | 63 | for (i = 0; i < 2; i++) { |
| 64 | 64 | void __iomem *uart_regs; |
| 65 | 65 | |
| 66 | − uart_regs = ioremap_nocache(SSB_EUART, 16); | |
| 66 | + uart_regs = ioremap(SSB_EUART, 16); | |
| 67 | 67 | if (uart_regs) { |
| 68 | 68 | uart_regs += (i * 8); |
| 69 | 69 | |
| @@ -122,7 +122,7 @@ static int ssb_extpci_read_config(struct ssb_pcicore *pc, · 121 unmodified lines | ||
| 122 | 122 | if (unlikely(!addr)) |
| 123 | 123 | goto out; |
| 124 | 124 | err = -ENOMEM; |
| 125 | − mmio = ioremap_nocache(addr, len); | |
| 125 | + mmio = ioremap(addr, len); | |
| 126 | 126 | if (!mmio) |
| 127 | 127 | goto out; |
| 128 | 128 | |
| @@ -168,7 +168,7 @@ static int ssb_extpci_write_config(struct ssb_pcicore *pc, · 39 unmodified lines | ||
| 168 | 168 | if (unlikely(!addr)) |
| 169 | 169 | goto out; |
| 170 | 170 | err = -ENOMEM; |
| 171 | − mmio = ioremap_nocache(addr, len); | |
| 171 | + mmio = ioremap(addr, len); | |
| 172 | 172 | if (!mmio) |
| 173 | 173 | goto out; |
| 174 | 174 | |
| @@ -382,7 +382,7 @@ static void ssb_pcicore_init_hostmode(struct ssb_pcicore *pc) · 207 unmodified lines | ||
| 382 | 382 | /* Ok, ready to run, register it to the system. |
| 383 | 383 | * The following needs change, if we want to port hostmode |
| 384 | 384 | * to non-MIPS platform. */ |
| 385 | − ssb_pcicore_controller.io_map_base = (unsigned long)ioremap_nocache(SSB_PCI_MEM, 0x04000000); | |
| 385 | + ssb_pcicore_controller.io_map_base = (unsigned long)ioremap(SSB_PCI_MEM, 0x04000000); | |
| 386 | 386 | set_io_port_base(ssb_pcicore_controller.io_map_base); |
| 387 | 387 | /* Give some time to the PCI controller to configure itself with the new |
| 388 | 388 | * values. Not waiting at this point causes crashes of the machine. */ |
| @@ -303,7 +303,7 @@ static int gasket_map_pci_bar(struct gasket_dev *gasket_dev, int bar_num) · 302 unmodified lines | ||
| 303 | 303 | } |
| 304 | 304 | |
| 305 | 305 | gasket_dev->bar_data[bar_num].virt_base = |
| 306 | − ioremap_nocache(gasket_dev->bar_data[bar_num].phys_base, | |
| 306 | + ioremap(gasket_dev->bar_data[bar_num].phys_base, | |
| 307 | 307 | gasket_dev->bar_data[bar_num].length_bytes); |
| 308 | 308 | if (!gasket_dev->bar_data[bar_num].virt_base) { |
| 309 | 309 | dev_err(gasket_dev->dev, |
| @@ -338,7 +338,7 @@ static int kp2000_pcie_probe(struct pci_dev *pdev, · 337 unmodified lines | ||
| 338 | 338 | reg_bar_phys_addr = pci_resource_start(pcard->pdev, REG_BAR); |
| 339 | 339 | reg_bar_phys_len = pci_resource_len(pcard->pdev, REG_BAR); |
| 340 | 340 | |
| 341 | − pcard->regs_bar_base = ioremap_nocache(reg_bar_phys_addr, PAGE_SIZE); | |
| 341 | + pcard->regs_bar_base = ioremap(reg_bar_phys_addr, PAGE_SIZE); | |
| 342 | 342 | if (!pcard->regs_bar_base) { |
| 343 | 343 | dev_err(&pcard->pdev->dev, |
| 344 | 344 | "probe: REG_BAR could not remap memory to virtual space\n"); |
| @@ -367,7 +367,7 @@ static int kp2000_pcie_probe(struct pci_dev *pdev, · 22 unmodified lines | ||
| 367 | 367 | dma_bar_phys_addr = pci_resource_start(pcard->pdev, DMA_BAR); |
| 368 | 368 | dma_bar_phys_len = pci_resource_len(pcard->pdev, DMA_BAR); |
| 369 | 369 | |
| 370 | − pcard->dma_bar_base = ioremap_nocache(dma_bar_phys_addr, | |
| 370 | + pcard->dma_bar_base = ioremap(dma_bar_phys_addr, | |
| 371 | 371 | dma_bar_phys_len); |
| 372 | 372 | if (!pcard->dma_bar_base) { |
| 373 | 373 | dev_err(&pcard->pdev->dev, |
| @@ -659,7 +659,7 @@ static int pi2c_probe(struct platform_device *pldev) · 658 unmodified lines | ||
| 659 | 659 | if (!res) |
| 660 | 660 | return -ENXIO; |
| 661 | 661 | |
| 662 | − priv->smba = (unsigned long)devm_ioremap_nocache(&pldev->dev, | |
| 662 | + priv->smba = (unsigned long)devm_ioremap(&pldev->dev, | |
| 663 | 663 | res->start, |
| 664 | 664 | resource_size(res)); |
| 665 | 665 | if (!priv->smba) |
| @@ -464,7 +464,7 @@ kp_spi_probe(struct platform_device *pldev) · 463 unmodified lines | ||
| 464 | 464 | goto free_master; |
| 465 | 465 | } |
| 466 | 466 | |
| 467 | − kpspi->base = devm_ioremap_nocache(&pldev->dev, r->start, | |
| 467 | + kpspi->base = devm_ioremap(&pldev->dev, r->start, | |
| 468 | 468 | resource_size(r)); |
| 469 | 469 | |
| 470 | 470 | status = spi_register_master(master); |
| @@ -122,7 +122,7 @@ int kpc_dma_probe(struct platform_device *pldev) · 121 unmodified lines | ||
| 122 | 122 | rv = -ENXIO; |
| 123 | 123 | goto err_kfree; |
| 124 | 124 | } |
| 125 | − ldev->eng_regs = ioremap_nocache(r->start, resource_size(r)); | |
| 125 | + ldev->eng_regs = ioremap(r->start, resource_size(r)); | |
| 126 | 126 | if (!ldev->eng_regs) { |
| 127 | 127 | dev_err(&ldev->pldev->dev, "%s: failed to ioremap engine regs!\n", __func__); |
| 128 | 128 | rv = -ENXIO; |
| @@ -2914,7 +2914,7 @@ static int allegro_probe(struct platform_device *pdev) · 2913 unmodified lines | ||
| 2914 | 2914 | "regs resource missing from device tree\n"); |
| 2915 | 2915 | return -EINVAL; |
| 2916 | 2916 | } |
| 2917 | − regs = devm_ioremap_nocache(&pdev->dev, res->start, resource_size(res)); | |
| 2917 | + regs = devm_ioremap(&pdev->dev, res->start, resource_size(res)); | |
| 2918 | 2918 | if (IS_ERR(regs)) { |
| 2919 | 2919 | dev_err(&pdev->dev, "failed to map registers\n"); |
| 2920 | 2920 | return PTR_ERR(regs); |
| @@ -2932,7 +2932,7 @@ static int allegro_probe(struct platform_device *pdev) · 11 unmodified lines | ||
| 2932 | 2932 | "sram resource missing from device tree\n"); |
| 2933 | 2933 | return -EINVAL; |
| 2934 | 2934 | } |
| 2935 | − sram_regs = devm_ioremap_nocache(&pdev->dev, | |
| 2935 | + sram_regs = devm_ioremap(&pdev->dev, | |
| 2936 | 2936 | sram_res->start, |
| 2937 | 2937 | resource_size(sram_res)); |
| 2938 | 2938 | if (IS_ERR(sram_regs)) { |
| @@ -4455,7 +4455,7 @@ static int ql_init_device(struct pci_dev *pdev, struct net_device *ndev, · 4454 unmodified lines | ||
| 4455 | 4455 | pdev->needs_freset = 1; |
| 4456 | 4456 | pci_save_state(pdev); |
| 4457 | 4457 | qdev->reg_base = |
| 4458 | − ioremap_nocache(pci_resource_start(pdev, 1), | |
| 4458 | + ioremap(pci_resource_start(pdev, 1), | |
| 4459 | 4459 | pci_resource_len(pdev, 1)); |
| 4460 | 4460 | if (!qdev->reg_base) { |
| 4461 | 4461 | dev_err(&pdev->dev, "Register mapping failed.\n"); |
| @@ -4465,7 +4465,7 @@ static int ql_init_device(struct pci_dev *pdev, struct net_device *ndev, · 3 unmodified lines | ||
| 4465 | 4465 | |
| 4466 | 4466 | qdev->doorbell_area_size = pci_resource_len(pdev, 3); |
| 4467 | 4467 | qdev->doorbell_area = |
| 4468 | − ioremap_nocache(pci_resource_start(pdev, 3), | |
| 4468 | + ioremap(pci_resource_start(pdev, 3), | |
| 4469 | 4469 | pci_resource_len(pdev, 3)); |
| 4470 | 4470 | if (!qdev->doorbell_area) { |
| 4471 | 4471 | dev_err(&pdev->dev, "Doorbell register mapping failed.\n"); |
| @@ -2463,7 +2463,7 @@ static int _rtl92e_pci_probe(struct pci_dev *pdev, · 2462 unmodified lines | ||
| 2463 | 2463 | } |
| 2464 | 2464 | |
| 2465 | 2465 | |
| 2466 | − ioaddr = (unsigned long)ioremap_nocache(pmem_start, pmem_len); | |
| 2466 | + ioaddr = (unsigned long)ioremap(pmem_start, pmem_len); | |
| 2467 | 2467 | if (ioaddr == (unsigned long)NULL) { |
| 2468 | 2468 | netdev_err(dev, "ioremap failed!"); |
| 2469 | 2469 | goto err_rel_mem; |
| @@ -858,7 +858,7 @@ static int rtsx_probe(struct pci_dev *pci, · 857 unmodified lines | ||
| 858 | 858 | dev_info(&pci->dev, "Resource length: 0x%x\n", |
| 859 | 859 | (unsigned int)pci_resource_len(pci, 0)); |
| 860 | 860 | dev->addr = pci_resource_start(pci, 0); |
| 861 | − dev->remap_addr = ioremap_nocache(dev->addr, pci_resource_len(pci, 0)); | |
| 861 | + dev->remap_addr = ioremap(dev->addr, pci_resource_len(pci, 0)); | |
| 862 | 862 | if (!dev->remap_addr) { |
| 863 | 863 | dev_err(&pci->dev, "ioremap error\n"); |
| 864 | 864 | err = -ENXIO; |
| @@ -50,7 +50,7 @@ int hw_sm750_map(struct sm750_dev *sm750_dev, struct pci_dev *pdev) · 49 unmodified lines | ||
| 50 | 50 | } |
| 51 | 51 | |
| 52 | 52 | /* now map mmio and vidmem */ |
| 53 | − sm750_dev->pvReg = ioremap_nocache(sm750_dev->vidreg_start, | |
| 53 | + sm750_dev->pvReg = ioremap(sm750_dev->vidreg_start, | |
| 54 | 54 | sm750_dev->vidreg_size); |
| 55 | 55 | if (!sm750_dev->pvReg) { |
| 56 | 56 | pr_err("mmio failed\n"); |
| @@ -216,11 +216,11 @@ int whcrc_setup_rc_umc(struct whcrc *whcrc) · 215 unmodified lines | ||
| 216 | 216 | goto error_request_region; |
| 217 | 217 | } |
| 218 | 218 | |
| 219 | − whcrc->rc_base = ioremap_nocache(whcrc->area, whcrc->rc_len); | |
| 219 | + whcrc->rc_base = ioremap(whcrc->area, whcrc->rc_len); | |
| 220 | 220 | if (whcrc->rc_base == NULL) { |
| 221 | 221 | dev_err(dev, "can't ioremap registers (%zu bytes @ 0x%lx): %d\n", |
| 222 | 222 | whcrc->rc_len, whcrc->area, result); |
| 223 | − goto error_ioremap_nocache; | |
| 223 | + goto error_ioremap; | |
| 224 | 224 | } |
| 225 | 225 | |
| 226 | 226 | result = request_irq(umc_dev->irq, whcrc_irq_cb, IRQF_SHARED, |
| @@ -254,7 +254,7 @@ error_cmd_buffer: · 27 unmodified lines | ||
| 254 | 254 | free_irq(umc_dev->irq, whcrc); |
| 255 | 255 | error_request_irq: |
| 256 | 256 | iounmap(whcrc->rc_base); |
| 257 | −error_ioremap_nocache: | |
| 257 | +error_ioremap: | |
| 258 | 258 | release_mem_region(whcrc->area, whcrc->rc_len); |
| 259 | 259 | error_request_region: |
| 260 | 260 | return result; |
| @@ -47,7 +47,7 @@ static void __init tc_bus_add_devices(struct tc_bus *tbus) · 46 unmodified lines | ||
| 47 | 47 | for (slot = 0; slot < tbus->num_tcslots; slot++) { |
| 48 | 48 | slotaddr = tbus->slot_base + slot * slotsize; |
| 49 | 49 | extslotaddr = tbus->ext_slot_base + slot * extslotsize; |
| 50 | − module = ioremap_nocache(slotaddr, slotsize); | |
| 50 | + module = ioremap(slotaddr, slotsize); | |
| 51 | 51 | BUG_ON(!module); |
| 52 | 52 | |
| 53 | 53 | offset = TC_OLDCARD; |
| @@ -3256,7 +3256,7 @@ static int __init cy_detect_isa(void) · 3255 unmodified lines | ||
| 3256 | 3256 | return nboard; |
| 3257 | 3257 | |
| 3258 | 3258 | /* probe for CD1400... */ |
| 3259 | − cy_isa_address = ioremap_nocache(isa_address, CyISA_Ywin); | |
| 3259 | + cy_isa_address = ioremap(isa_address, CyISA_Ywin); | |
| 3260 | 3260 | if (cy_isa_address == NULL) { |
| 3261 | 3261 | printk(KERN_ERR "Cyclom-Y/ISA: can't remap base " |
| 3262 | 3262 | "address\n"); |
| @@ -3690,13 +3690,13 @@ static int cy_pci_probe(struct pci_dev *pdev, · 427 unmodified lines | ||
| 3690 | 3690 | device_id == PCI_DEVICE_ID_CYCLOM_Y_Hi) { |
| 3691 | 3691 | card_name = "Cyclom-Y"; |
| 3692 | 3692 | |
| 3693 | − addr0 = ioremap_nocache(pci_resource_start(pdev, 0), | |
| 3693 | + addr0 = ioremap(pci_resource_start(pdev, 0), | |
| 3694 | 3694 | CyPCI_Yctl); |
| 3695 | 3695 | if (addr0 == NULL) { |
| 3696 | 3696 | dev_err(&pdev->dev, "can't remap ctl region\n"); |
| 3697 | 3697 | goto err_reg; |
| 3698 | 3698 | } |
| 3699 | − addr2 = ioremap_nocache(pci_resource_start(pdev, 2), | |
| 3699 | + addr2 = ioremap(pci_resource_start(pdev, 2), | |
| 3700 | 3700 | CyPCI_Ywin); |
| 3701 | 3701 | if (addr2 == NULL) { |
| 3702 | 3702 | dev_err(&pdev->dev, "can't remap base region\n"); |
| @@ -3712,7 +3712,7 @@ static int cy_pci_probe(struct pci_dev *pdev, · 9 unmodified lines | ||
| 3712 | 3712 | } else if (device_id == PCI_DEVICE_ID_CYCLOM_Z_Hi) { |
| 3713 | 3713 | struct RUNTIME_9060 __iomem *ctl_addr; |
| 3714 | 3714 | |
| 3715 | − ctl_addr = addr0 = ioremap_nocache(pci_resource_start(pdev, 0), | |
| 3715 | + ctl_addr = addr0 = ioremap(pci_resource_start(pdev, 0), | |
| 3716 | 3716 | CyPCI_Zctl); |
| 3717 | 3717 | if (addr0 == NULL) { |
| 3718 | 3718 | dev_err(&pdev->dev, "can't remap ctl region\n"); |
| @@ -3727,7 +3727,7 @@ static int cy_pci_probe(struct pci_dev *pdev, · 8 unmodified lines | ||
| 3727 | 3727 | |
| 3728 | 3728 | mailbox = readl(&ctl_addr->mail_box_0); |
| 3729 | 3729 | |
| 3730 | − addr2 = ioremap_nocache(pci_resource_start(pdev, 2), | |
| 3730 | + addr2 = ioremap(pci_resource_start(pdev, 2), | |
| 3731 | 3731 | mailbox == ZE_V1 ? CyPCI_Ze_win : CyPCI_Zwin); |
| 3732 | 3732 | if (addr2 == NULL) { |
| 3733 | 3733 | dev_err(&pdev->dev, "can't remap base region\n"); |
| @@ -898,7 +898,7 @@ static int mips_ejtag_fdc_tty_probe(struct mips_cdmm_device *dev) · 897 unmodified lines | ||
| 898 | 898 | atomic_set(&priv->xmit_total, 0); |
| 899 | 899 | raw_spin_lock_init(&priv->lock); |
| 900 | 900 | |
| 901 | − priv->reg = devm_ioremap_nocache(priv->dev, dev->res.start, | |
| 901 | + priv->reg = devm_ioremap(priv->dev, dev->res.start, | |
| 902 | 902 | resource_size(&dev->res)); |
| 903 | 903 | if (!priv->reg) { |
| 904 | 904 | dev_err(priv->dev, "ioremap failed for resource %pR\n", |
| @@ -961,7 +961,7 @@ static int moxa_pci_probe(struct pci_dev *pdev, · 960 unmodified lines | ||
| 961 | 961 | goto err; |
| 962 | 962 | } |
| 963 | 963 | |
| 964 | − board->basemem = ioremap_nocache(pci_resource_start(pdev, 2), 0x4000); | |
| 964 | + board->basemem = ioremap(pci_resource_start(pdev, 2), 0x4000); | |
| 965 | 965 | if (board->basemem == NULL) { |
| 966 | 966 | dev_err(&pdev->dev, "can't remap io space 2\n"); |
| 967 | 967 | retval = -ENOMEM; |
| @@ -1071,7 +1071,7 @@ static int __init moxa_init(void) · 103 unmodified lines | ||
| 1071 | 1071 | brd->numPorts = type[i] == MOXA_BOARD_C218_ISA ? 8 : |
| 1072 | 1072 | numports[i]; |
| 1073 | 1073 | brd->busType = MOXA_BUS_TYPE_ISA; |
| 1074 | − brd->basemem = ioremap_nocache(baseaddr[i], 0x4000); | |
| 1074 | + brd->basemem = ioremap(baseaddr[i], 0x4000); | |
| 1075 | 1075 | if (!brd->basemem) { |
| 1076 | 1076 | printk(KERN_ERR "MOXA: can't remap %lx\n", |
| 1077 | 1077 | baseaddr[i]); |
| @@ -55,7 +55,7 @@ static int __init serial_init_chip(struct parisc_device *dev) · 54 unmodified lines | ||
| 55 | 55 | uart.port.uartclk = (dev->id.sversion != 0xad) ? |
| 56 | 56 | 7272727 : 1843200; |
| 57 | 57 | uart.port.mapbase = address; |
| 58 | − uart.port.membase = ioremap_nocache(address, 16); | |
| 58 | + uart.port.membase = ioremap(address, 16); | |
| 59 | 59 | if (!uart.port.membase) { |
| 60 | 60 | dev_warn(&dev->dev, "Failed to map memory\n"); |
| 61 | 61 | return -ENOMEM; |
| @@ -1147,7 +1147,7 @@ static int omap8250_probe(struct platform_device *pdev) · 1146 unmodified lines | ||
| 1147 | 1147 | if (!priv) |
| 1148 | 1148 | return -ENOMEM; |
| 1149 | 1149 | |
| 1150 | − membase = devm_ioremap_nocache(&pdev->dev, regs->start, | |
| 1150 | + membase = devm_ioremap(&pdev->dev, regs->start, | |
| 1151 | 1151 | resource_size(regs)); |
| 1152 | 1152 | if (!membase) |
| 1153 | 1153 | return -ENODEV; |
| @@ -275,7 +275,7 @@ static int pci_plx9050_init(struct pci_dev *dev) · 274 unmodified lines | ||
| 275 | 275 | /* |
| 276 | 276 | * enable/disable interrupts |
| 277 | 277 | */ |
| 278 | − p = ioremap_nocache(pci_resource_start(dev, 0), 0x80); | |
| 278 | + p = ioremap(pci_resource_start(dev, 0), 0x80); | |
| 279 | 279 | if (p == NULL) |
| 280 | 280 | return -ENOMEM; |
| 281 | 281 | writel(irq_config, p + 0x4c); |
| @@ -299,7 +299,7 @@ static void pci_plx9050_exit(struct pci_dev *dev) · 17 unmodified lines | ||
| 299 | 299 | /* |
| 300 | 300 | * disable interrupts |
| 301 | 301 | */ |
| 302 | − p = ioremap_nocache(pci_resource_start(dev, 0), 0x80); | |
| 302 | + p = ioremap(pci_resource_start(dev, 0), 0x80); | |
| 303 | 303 | if (p != NULL) { |
| 304 | 304 | writel(0, p + 0x4c); |
| 305 | 305 | |
| @@ -475,7 +475,7 @@ static int pci_siig10x_init(struct pci_dev *dev) · 169 unmodified lines | ||
| 475 | 475 | break; |
| 476 | 476 | } |
| 477 | 477 | |
| 478 | − p = ioremap_nocache(pci_resource_start(dev, 0), 0x80); | |
| 478 | + p = ioremap(pci_resource_start(dev, 0), 0x80); | |
| 479 | 479 | if (p == NULL) |
| 480 | 480 | return -ENOMEM; |
| 481 | 481 | |
| @@ -2766,7 +2766,7 @@ static int serial8250_request_std_resource(struct uart_8250_port *up) · 2765 unmodified lines | ||
| 2766 | 2766 | } |
| 2767 | 2767 | |
| 2768 | 2768 | if (port->flags & UPF_IOREMAP) { |
| 2769 | − port->membase = ioremap_nocache(port->mapbase, size); | |
| 2769 | + port->membase = ioremap(port->mapbase, size); | |
| 2770 | 2770 | if (!port->membase) { |
| 2771 | 2771 | release_mem_region(port->mapbase, size); |
| 2772 | 2772 | ret = -ENOMEM; |
| @@ -677,7 +677,7 @@ static void dz_release_port(struct uart_port *uport) · 676 unmodified lines | ||
| 677 | 677 | static int dz_map_port(struct uart_port *uport) |
| 678 | 678 | { |
| 679 | 679 | if (!uport->membase) |
| 680 | − uport->membase = ioremap_nocache(uport->mapbase, | |
| 680 | + uport->membase = ioremap(uport->mapbase, | |
| 681 | 681 | dec_kn_slot_size); |
| 682 | 682 | if (!uport->membase) { |
| 683 | 683 | printk(KERN_ERR "dz: Cannot map MMIO\n"); |
| @@ -549,7 +549,7 @@ lqasc_request_port(struct uart_port *port) · 548 unmodified lines | ||
| 549 | 549 | } |
| 550 | 550 | |
| 551 | 551 | if (port->flags & UPF_IOREMAP) { |
| 552 | − port->membase = devm_ioremap_nocache(&pdev->dev, | |
| 552 | + port->membase = devm_ioremap(&pdev->dev, | |
| 553 | 553 | port->mapbase, size); |
| 554 | 554 | if (port->membase == NULL) |
| 555 | 555 | return -ENOMEM; |
| @@ -411,7 +411,7 @@ static int meson_uart_request_port(struct uart_port *port) · 410 unmodified lines | ||
| 411 | 411 | return -EBUSY; |
| 412 | 412 | } |
| 413 | 413 | |
| 414 | − port->membase = devm_ioremap_nocache(port->dev, port->mapbase, | |
| 414 | + port->membase = devm_ioremap(port->dev, port->mapbase, | |
| 415 | 415 | port->mapsize); |
| 416 | 416 | if (!port->membase) |
| 417 | 417 | return -ENOMEM; |
| @@ -474,7 +474,7 @@ static int __init mux_probe(struct parisc_device *dev) · 473 unmodified lines | ||
| 474 | 474 | port->iobase = 0; |
| 475 | 475 | port->mapbase = dev->hpa.start + MUX_OFFSET + |
| 476 | 476 | (i * MUX_LINE_OFFSET); |
| 477 | − port->membase = ioremap_nocache(port->mapbase, MUX_LINE_OFFSET); | |
| 477 | + port->membase = ioremap(port->mapbase, MUX_LINE_OFFSET); | |
| 478 | 478 | port->iotype = UPIO_MEM; |
| 479 | 479 | port->type = PORT_MUX; |
| 480 | 480 | port->irq = 0; |
| @@ -427,7 +427,7 @@ static int owl_uart_request_port(struct uart_port *port) · 426 unmodified lines | ||
| 427 | 427 | return -EBUSY; |
| 428 | 428 | |
| 429 | 429 | if (port->flags & UPF_IOREMAP) { |
| 430 | − port->membase = devm_ioremap_nocache(port->dev, port->mapbase, | |
| 430 | + port->membase = devm_ioremap(port->dev, port->mapbase, | |
| 431 | 431 | resource_size(res)); |
| 432 | 432 | if (!port->membase) |
| 433 | 433 | return -EBUSY; |
| @@ -618,7 +618,7 @@ static int pic32_uart_request_port(struct uart_port *port) · 617 unmodified lines | ||
| 618 | 618 | "pic32_uart_mem")) |
| 619 | 619 | return -EBUSY; |
| 620 | 620 | |
| 621 | − port->membase = devm_ioremap_nocache(port->dev, port->mapbase, | |
| 621 | + port->membase = devm_ioremap(port->dev, port->mapbase, | |
| 622 | 622 | resource_size(res_mem)); |
| 623 | 623 | if (!port->membase) { |
| 624 | 624 | dev_err(port->dev, "Unable to map registers\n"); |
| @@ -498,7 +498,7 @@ static int rda_uart_request_port(struct uart_port *port) · 497 unmodified lines | ||
| 498 | 498 | return -EBUSY; |
| 499 | 499 | |
| 500 | 500 | if (port->flags & UPF_IOREMAP) { |
| 501 | − port->membase = devm_ioremap_nocache(port->dev, port->mapbase, | |
| 501 | + port->membase = devm_ioremap(port->dev, port->mapbase, | |
| 502 | 502 | resource_size(res)); |
| 503 | 503 | if (!port->membase) |
| 504 | 504 | return -EBUSY; |
| @@ -668,7 +668,7 @@ static int sbd_map_port(struct uart_port *uport) · 667 unmodified lines | ||
| 668 | 668 | struct sbd_duart *duart = sport->duart; |
| 669 | 669 | |
| 670 | 670 | if (!uport->membase) |
| 671 | − uport->membase = ioremap_nocache(uport->mapbase, | |
| 671 | + uport->membase = ioremap(uport->mapbase, | |
| 672 | 672 | DUART_CHANREG_SPACING); |
| 673 | 673 | if (!uport->membase) { |
| 674 | 674 | printk(err); |
| @@ -676,7 +676,7 @@ static int sbd_map_port(struct uart_port *uport) · 1 unmodified line | ||
| 676 | 676 | } |
| 677 | 677 | |
| 678 | 678 | if (!sport->memctrl) |
| 679 | − sport->memctrl = ioremap_nocache(duart->mapctrl, | |
| 679 | + sport->memctrl = ioremap(duart->mapctrl, | |
| 680 | 680 | DUART_CHANREG_SPACING); |
| 681 | 681 | if (!sport->memctrl) { |
| 682 | 682 | printk(err); |
| @@ -2680,7 +2680,7 @@ static int sci_remap_port(struct uart_port *port) · 2679 unmodified lines | ||
| 2680 | 2680 | return 0; |
| 2681 | 2681 | |
| 2682 | 2682 | if (port->dev->of_node || (port->flags & UPF_IOREMAP)) { |
| 2683 | − port->membase = ioremap_nocache(port->mapbase, sport->reg_size); | |
| 2683 | + port->membase = ioremap(port->mapbase, sport->reg_size); | |
| 2684 | 2684 | if (unlikely(!port->membase)) { |
| 2685 | 2685 | dev_err(port->dev, "can't remap port#%d\n", port->line); |
| 2686 | 2686 | return -ENXIO; |
| @@ -992,7 +992,7 @@ static void zs_release_port(struct uart_port *uport) · 991 unmodified lines | ||
| 992 | 992 | static int zs_map_port(struct uart_port *uport) |
| 993 | 993 | { |
| 994 | 994 | if (!uport->membase) |
| 995 | − uport->membase = ioremap_nocache(uport->mapbase, | |
| 995 | + uport->membase = ioremap(uport->mapbase, | |
| 996 | 996 | ZS_CHAN_IO_SIZE); |
| 997 | 997 | if (!uport->membase) { |
| 998 | 998 | printk(KERN_ERR "zs: Cannot map MMIO\n"); |
| @@ -4054,7 +4054,7 @@ static int mgsl_claim_resources(struct mgsl_struct *info) · 4053 unmodified lines | ||
| 4054 | 4054 | } |
| 4055 | 4055 | info->lcr_mem_requested = true; |
| 4056 | 4056 | |
| 4057 | − info->memory_base = ioremap_nocache(info->phys_memory_base, | |
| 4057 | + info->memory_base = ioremap(info->phys_memory_base, | |
| 4058 | 4058 | 0x40000); |
| 4059 | 4059 | if (!info->memory_base) { |
| 4060 | 4060 | printk( "%s(%d):Can't map shared memory on device %s MemAddr=%08X\n", |
| @@ -4068,7 +4068,7 @@ static int mgsl_claim_resources(struct mgsl_struct *info) · 7 unmodified lines | ||
| 4068 | 4068 | goto errout; |
| 4069 | 4069 | } |
| 4070 | 4070 | |
| 4071 | − info->lcr_base = ioremap_nocache(info->phys_lcr_base, | |
| 4071 | + info->lcr_base = ioremap(info->phys_lcr_base, | |
| 4072 | 4072 | PAGE_SIZE); |
| 4073 | 4073 | if (!info->lcr_base) { |
| 4074 | 4074 | printk( "%s(%d):Can't map LCR memory on device %s MemAddr=%08X\n", |
| @@ -3450,7 +3450,7 @@ static int claim_resources(struct slgt_info *info) · 3449 unmodified lines | ||
| 3450 | 3450 | else |
| 3451 | 3451 | info->reg_addr_requested = true; |
| 3452 | 3452 | |
| 3453 | − info->reg_addr = ioremap_nocache(info->phys_reg_addr, SLGT_REG_SIZE); | |
| 3453 | + info->reg_addr = ioremap(info->phys_reg_addr, SLGT_REG_SIZE); | |
| 3454 | 3454 | if (!info->reg_addr) { |
| 3455 | 3455 | DBGERR(("%s can't map device registers, addr=%08X\n", |
| 3456 | 3456 | info->device_name, info->phys_reg_addr)); |
| @@ -3559,7 +3559,7 @@ static int claim_resources(SLMP_INFO *info) · 3558 unmodified lines | ||
| 3559 | 3559 | else |
| 3560 | 3560 | info->sca_statctrl_requested = true; |
| 3561 | 3561 | |
| 3562 | − info->memory_base = ioremap_nocache(info->phys_memory_base, | |
| 3562 | + info->memory_base = ioremap(info->phys_memory_base, | |
| 3563 | 3563 | SCA_MEM_SIZE); |
| 3564 | 3564 | if (!info->memory_base) { |
| 3565 | 3565 | printk( "%s(%d):%s Can't map shared memory, MemAddr=%08X\n", |
| @@ -3568,7 +3568,7 @@ static int claim_resources(SLMP_INFO *info) · 2 unmodified lines | ||
| 3568 | 3568 | goto errout; |
| 3569 | 3569 | } |
| 3570 | 3570 | |
| 3571 | − info->lcr_base = ioremap_nocache(info->phys_lcr_base, PAGE_SIZE); | |
| 3571 | + info->lcr_base = ioremap(info->phys_lcr_base, PAGE_SIZE); | |
| 3572 | 3572 | if (!info->lcr_base) { |
| 3573 | 3573 | printk( "%s(%d):%s Can't map LCR memory, MemAddr=%08X\n", |
| 3574 | 3574 | __FILE__,__LINE__,info->device_name, info->phys_lcr_base ); |
| @@ -3577,7 +3577,7 @@ static int claim_resources(SLMP_INFO *info) · 2 unmodified lines | ||
| 3577 | 3577 | } |
| 3578 | 3578 | info->lcr_base += info->lcr_offset; |
| 3579 | 3579 | |
| 3580 | − info->sca_base = ioremap_nocache(info->phys_sca_base, PAGE_SIZE); | |
| 3580 | + info->sca_base = ioremap(info->phys_sca_base, PAGE_SIZE); | |
| 3581 | 3581 | if (!info->sca_base) { |
| 3582 | 3582 | printk( "%s(%d):%s Can't map SCA memory, MemAddr=%08X\n", |
| 3583 | 3583 | __FILE__,__LINE__,info->device_name, info->phys_sca_base ); |
| @@ -3586,7 +3586,7 @@ static int claim_resources(SLMP_INFO *info) · 2 unmodified lines | ||
| 3586 | 3586 | } |
| 3587 | 3587 | info->sca_base += info->sca_offset; |
| 3588 | 3588 | |
| 3589 | − info->statctrl_base = ioremap_nocache(info->phys_statctrl_base, | |
| 3589 | + info->statctrl_base = ioremap(info->phys_statctrl_base, | |
| 3590 | 3590 | PAGE_SIZE); |
| 3591 | 3591 | if (!info->statctrl_base) { |
| 3592 | 3592 | printk( "%s(%d):%s Can't map SCA Status/Control memory, MemAddr=%08X\n", |
| @@ -222,7 +222,7 @@ int usb_hcd_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) · 221 unmodified lines | ||
| 222 | 222 | retval = -EBUSY; |
| 223 | 223 | goto put_hcd; |
| 224 | 224 | } |
| 225 | − hcd->regs = devm_ioremap_nocache(&dev->dev, hcd->rsrc_start, | |
| 225 | + hcd->regs = devm_ioremap(&dev->dev, hcd->rsrc_start, | |
| 226 | 226 | hcd->rsrc_len); |
| 227 | 227 | if (hcd->regs == NULL) { |
| 228 | 228 | dev_dbg(&dev->dev, "error mapping memory\n"); |
| @@ -971,7 +971,7 @@ static int __init xdbc_init(void) · 970 unmodified lines | ||
| 971 | 971 | goto free_and_quit; |
| 972 | 972 | } |
| 973 | 973 | |
| 974 | − base = ioremap_nocache(xdbc.xhci_start, xdbc.xhci_length); | |
| 974 | + base = ioremap(xdbc.xhci_start, xdbc.xhci_length); | |
| 975 | 975 | if (!base) { |
| 976 | 976 | xdbc_trace("failed to remap the io address\n"); |
| 977 | 977 | ret = -ENOMEM; |
| @@ -116,7 +116,7 @@ static int udc_pci_probe( · 115 unmodified lines | ||
| 116 | 116 | goto err_memreg; |
| 117 | 117 | } |
| 118 | 118 | |
| 119 | − dev->virt_addr = ioremap_nocache(resource, len); | |
| 119 | + dev->virt_addr = ioremap(resource, len); | |
| 120 | 120 | if (!dev->virt_addr) { |
| 121 | 121 | dev_dbg(&pdev->dev, "start address cannot be mapped\n"); |
| 122 | 122 | retval = -EFAULT; |
| @@ -1782,7 +1782,7 @@ static int goku_probe(struct pci_dev *pdev, const struct pci_device_id *id) · 1781 unmodified lines | ||
| 1782 | 1782 | } |
| 1783 | 1783 | dev->got_region = 1; |
| 1784 | 1784 | |
| 1785 | − base = ioremap_nocache(resource, len); | |
| 1785 | + base = ioremap(resource, len); | |
| 1786 | 1786 | if (base == NULL) { |
| 1787 | 1787 | DBG(dev, "can't map memory\n"); |
| 1788 | 1788 | retval = -EFAULT; |
| @@ -2323,7 +2323,7 @@ net2272_rdk1_probe(struct pci_dev *pdev, struct net2272 *dev) · 2322 unmodified lines | ||
| 2323 | 2323 | goto err; |
| 2324 | 2324 | } |
| 2325 | 2325 | |
| 2326 | − mem_mapped_addr[i] = ioremap_nocache(resource, len); | |
| 2326 | + mem_mapped_addr[i] = ioremap(resource, len); | |
| 2327 | 2327 | if (mem_mapped_addr[i] == NULL) { |
| 2328 | 2328 | release_mem_region(resource, len); |
| 2329 | 2329 | dev_dbg(dev->dev, "can't map memory\n"); |
| @@ -2401,7 +2401,7 @@ net2272_rdk2_probe(struct pci_dev *pdev, struct net2272 *dev) · 71 unmodified lines | ||
| 2401 | 2401 | goto err; |
| 2402 | 2402 | } |
| 2403 | 2403 | |
| 2404 | − mem_mapped_addr[i] = ioremap_nocache(resource, len); | |
| 2404 | + mem_mapped_addr[i] = ioremap(resource, len); | |
| 2405 | 2405 | if (mem_mapped_addr[i] == NULL) { |
| 2406 | 2406 | release_mem_region(resource, len); |
| 2407 | 2407 | dev_dbg(dev->dev, "can't map memory\n"); |
| @@ -2625,7 +2625,7 @@ net2272_plat_probe(struct platform_device *pdev) · 217 unmodified lines | ||
| 2625 | 2625 | ret = -EBUSY; |
| 2626 | 2626 | goto err; |
| 2627 | 2627 | } |
| 2628 | − dev->base_addr = ioremap_nocache(base, len); | |
| 2628 | + dev->base_addr = ioremap(base, len); | |
| 2629 | 2629 | if (!dev->base_addr) { |
| 2630 | 2630 | dev_dbg(dev->dev, "can't map memory\n"); |
| 2631 | 2631 | ret = -EFAULT; |
| @@ -3659,7 +3659,7 @@ static int net2280_probe(struct pci_dev *pdev, const struct pci_device_id *id) · 3658 unmodified lines | ||
| 3659 | 3659 | * 8051 code into the chip, e.g. to turn on PCI PM. |
| 3660 | 3660 | */ |
| 3661 | 3661 | |
| 3662 | − base = ioremap_nocache(resource, len); | |
| 3662 | + base = ioremap(resource, len); | |
| 3663 | 3663 | if (base == NULL) { |
| 3664 | 3664 | ep_dbg(dev, "can't map memory\n"); |
| 3665 | 3665 | retval = -EFAULT; |
| @@ -107,7 +107,7 @@ static int usb_hcd_msp_map_regs(struct mspusb_device *dev) · 106 unmodified lines | ||
| 107 | 107 | if (!request_mem_region(res->start, res_len, "mab regs")) |
| 108 | 108 | return -EBUSY; |
| 109 | 109 | |
| 110 | − dev->mab_regs = ioremap_nocache(res->start, res_len); | |
| 110 | + dev->mab_regs = ioremap(res->start, res_len); | |
| 111 | 111 | if (dev->mab_regs == NULL) { |
| 112 | 112 | retval = -ENOMEM; |
| 113 | 113 | goto err1; |
| @@ -124,7 +124,7 @@ static int usb_hcd_msp_map_regs(struct mspusb_device *dev) · 10 unmodified lines | ||
| 124 | 124 | retval = -EBUSY; |
| 125 | 125 | goto err2; |
| 126 | 126 | } |
| 127 | − dev->usbid_regs = ioremap_nocache(res->start, res_len); | |
| 127 | + dev->usbid_regs = ioremap(res->start, res_len); | |
| 128 | 128 | if (dev->usbid_regs == NULL) { |
| 129 | 129 | retval = -ENOMEM; |
| 130 | 130 | goto err3; |
| @@ -178,7 +178,7 @@ int usb_hcd_msp_probe(const struct hc_driver *driver, · 47 unmodified lines | ||
| 178 | 178 | retval = -EBUSY; |
| 179 | 179 | goto err1; |
| 180 | 180 | } |
| 181 | − hcd->regs = ioremap_nocache(hcd->rsrc_start, hcd->rsrc_len); | |
| 181 | + hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); | |
| 182 | 182 | if (!hcd->regs) { |
| 183 | 183 | pr_debug("ioremap failed"); |
| 184 | 184 | retval = -ENOMEM; |
| @@ -1150,7 +1150,7 @@ static void quirk_usb_handoff_xhci(struct pci_dev *pdev) · 1149 unmodified lines | ||
| 1150 | 1150 | if (!mmio_resource_enabled(pdev, 0)) |
| 1151 | 1151 | return; |
| 1152 | 1152 | |
| 1153 | − base = ioremap_nocache(pci_resource_start(pdev, 0), len); | |
| 1153 | + base = ioremap(pci_resource_start(pdev, 0), len); | |
| 1154 | 1154 | if (base == NULL) |
| 1155 | 1155 | return; |
| 1156 | 1156 | |
| @@ -50,7 +50,7 @@ static int isp1761_pci_init(struct pci_dev *dev) · 49 unmodified lines | ||
| 50 | 50 | } |
| 51 | 51 | |
| 52 | 52 | /* map available memory */ |
| 53 | − iobase = ioremap_nocache(mem_start, mem_length); | |
| 53 | + iobase = ioremap(mem_start, mem_length); | |
| 54 | 54 | if (!iobase) { |
| 55 | 55 | printk(KERN_ERR "Error ioremap failed\n"); |
| 56 | 56 | release_mem_region(mem_start, mem_length); |
| @@ -101,7 +101,7 @@ static int isp1761_pci_init(struct pci_dev *dev) · 44 unmodified lines | ||
| 101 | 101 | return -EBUSY; |
| 102 | 102 | } |
| 103 | 103 | |
| 104 | − iobase = ioremap_nocache(mem_start, mem_length); | |
| 104 | + iobase = ioremap(mem_start, mem_length); | |
| 105 | 105 | if (!iobase) { |
| 106 | 106 | printk(KERN_ERR "ioremap #1\n"); |
| 107 | 107 | release_mem_region(mem_start, mem_length); |
| @@ -161,7 +161,7 @@ static int intel_xhci_usb_probe(struct platform_device *pdev) · 160 unmodified lines | ||
| 161 | 161 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 162 | 162 | if (!res) |
| 163 | 163 | return -EINVAL; |
| 164 | − data->base = devm_ioremap_nocache(dev, res->start, resource_size(res)); | |
| 164 | + data->base = devm_ioremap(dev, res->start, resource_size(res)); | |
| 165 | 165 | if (!data->base) |
| 166 | 166 | return -ENOMEM; |
| 167 | 167 | |
| @@ -127,7 +127,7 @@ static int ucsi_acpi_probe(struct platform_device *pdev) · 126 unmodified lines | ||
| 127 | 127 | return -ENODEV; |
| 128 | 128 | } |
| 129 | 129 | |
| 130 | − /* This will make sure we can use ioremap_nocache() */ | |
| 130 | + /* This will make sure we can use ioremap() */ | |
| 131 | 131 | status = acpi_release_memory(ACPI_HANDLE(&pdev->dev), res, 1); |
| 132 | 132 | if (ACPI_FAILURE(status)) |
| 133 | 133 | return -ENOMEM; |
| @@ -230,7 +230,7 @@ ssize_t vfio_pci_vga_rw(struct vfio_pci_device *vdev, char __user *buf, · 229 unmodified lines | ||
| 230 | 230 | switch ((u32)pos) { |
| 231 | 231 | case 0xa0000 ... 0xbffff: |
| 232 | 232 | count = min(count, (size_t)(0xc0000 - pos)); |
| 233 | − iomem = ioremap_nocache(0xa0000, 0xbffff - 0xa0000 + 1); | |
| 233 | + iomem = ioremap(0xa0000, 0xbffff - 0xa0000 + 1); | |
| 234 | 234 | off = pos - 0xa0000; |
| 235 | 235 | rsrc = VGA_RSRC_LEGACY_MEM; |
| 236 | 236 | is_ioport = false; |
| @@ -54,13 +54,13 @@ static int vfio_platform_amdxgbe_reset(struct vfio_platform_device *vdev) · 53 unmodified lines | ||
| 54 | 54 | |
| 55 | 55 | if (!xgmac_regs->ioaddr) { |
| 56 | 56 | xgmac_regs->ioaddr = |
| 57 | − ioremap_nocache(xgmac_regs->addr, xgmac_regs->size); | |
| 57 | + ioremap(xgmac_regs->addr, xgmac_regs->size); | |
| 58 | 58 | if (!xgmac_regs->ioaddr) |
| 59 | 59 | return -ENOMEM; |
| 60 | 60 | } |
| 61 | 61 | if (!xpcs_regs->ioaddr) { |
| 62 | 62 | xpcs_regs->ioaddr = |
| 63 | − ioremap_nocache(xpcs_regs->addr, xpcs_regs->size); | |
| 63 | + ioremap(xpcs_regs->addr, xpcs_regs->size); | |
| 64 | 64 | if (!xpcs_regs->ioaddr) |
| 65 | 65 | return -ENOMEM; |
| 66 | 66 | } |
| @@ -82,7 +82,7 @@ static int vfio_platform_bcmflexrm_reset(struct vfio_platform_device *vdev) · 81 unmodified lines | ||
| 82 | 82 | |
| 83 | 83 | /* Map FlexRM ring registers if not mapped */ |
| 84 | 84 | if (!reg->ioaddr) { |
| 85 | − reg->ioaddr = ioremap_nocache(reg->addr, reg->size); | |
| 85 | + reg->ioaddr = ioremap(reg->addr, reg->size); | |
| 86 | 86 | if (!reg->ioaddr) |
| 87 | 87 | return -ENOMEM; |
| 88 | 88 | } |
| @@ -52,7 +52,7 @@ static int vfio_platform_calxedaxgmac_reset(struct vfio_platform_device *vdev) · 51 unmodified lines | ||
| 52 | 52 | |
| 53 | 53 | if (!reg->ioaddr) { |
| 54 | 54 | reg->ioaddr = |
| 55 | − ioremap_nocache(reg->addr, reg->size); | |
| 55 | + ioremap(reg->addr, reg->size); | |
| 56 | 56 | if (!reg->ioaddr) |
| 57 | 57 | return -ENOMEM; |
| 58 | 58 | } |
| @@ -409,7 +409,7 @@ static ssize_t vfio_platform_read_mmio(struct vfio_platform_region *reg, · 408 unmodified lines | ||
| 409 | 409 | |
| 410 | 410 | if (!reg->ioaddr) { |
| 411 | 411 | reg->ioaddr = |
| 412 | − ioremap_nocache(reg->addr, reg->size); | |
| 412 | + ioremap(reg->addr, reg->size); | |
| 413 | 413 | |
| 414 | 414 | if (!reg->ioaddr) |
| 415 | 415 | return -ENOMEM; |
| @@ -486,7 +486,7 @@ static ssize_t vfio_platform_write_mmio(struct vfio_platform_region *reg, · 70 unmodified lines | ||
| 486 | 486 | |
| 487 | 487 | if (!reg->ioaddr) { |
| 488 | 488 | reg->ioaddr = |
| 489 | − ioremap_nocache(reg->addr, reg->size); | |
| 489 | + ioremap(reg->addr, reg->size); | |
| 490 | 490 | |
| 491 | 491 | if (!reg->ioaddr) |
| 492 | 492 | return -ENOMEM; |
| @@ -633,7 +633,7 @@ static int carminefb_probe(struct pci_dev *dev, const struct pci_device_id *ent) · 632 unmodified lines | ||
| 633 | 633 | ret = -EBUSY; |
| 634 | 634 | goto err_free_hw; |
| 635 | 635 | } |
| 636 | − hw->v_regs = ioremap_nocache(carminefb_fix.mmio_start, | |
| 636 | + hw->v_regs = ioremap(carminefb_fix.mmio_start, | |
| 637 | 637 | carminefb_fix.mmio_len); |
| 638 | 638 | if (!hw->v_regs) { |
| 639 | 639 | printk(KERN_ERR "carminefb: Can't remap %s register.\n", |
| @@ -664,7 +664,7 @@ static int carminefb_probe(struct pci_dev *dev, const struct pci_device_id *ent) · 24 unmodified lines | ||
| 664 | 664 | goto err_unmap_vregs; |
| 665 | 665 | } |
| 666 | 666 | |
| 667 | − hw->screen_mem = ioremap_nocache(carminefb_fix.smem_start, | |
| 667 | + hw->screen_mem = ioremap(carminefb_fix.smem_start, | |
| 668 | 668 | carminefb_fix.smem_len); |
| 669 | 669 | if (!hw->screen_mem) { |
| 670 | 670 | printk(KERN_ERR "carmine: Can't ioremap smem area.\n"); |
| @@ -1883,7 +1883,7 @@ static int i810_allocate_pci_resource(struct i810fb_par *par, · 1882 unmodified lines | ||
| 1883 | 1883 | } |
| 1884 | 1884 | par->res_flags |= MMIO_REQ; |
| 1885 | 1885 | |
| 1886 | − par->mmio_start_virtual = ioremap_nocache(par->mmio_start_phys, | |
| 1886 | + par->mmio_start_virtual = ioremap(par->mmio_start_phys, | |
| 1887 | 1887 | MMIO_SIZE); |
| 1888 | 1888 | if (!par->mmio_start_virtual) { |
| 1889 | 1889 | printk("i810fb_init: cannot remap mmio region\n"); |
| @@ -654,7 +654,7 @@ static int intelfb_pci_register(struct pci_dev *pdev, · 653 unmodified lines | ||
| 654 | 654 | } |
| 655 | 655 | |
| 656 | 656 | dinfo->mmio_base = |
| 657 | − (u8 __iomem *)ioremap_nocache(dinfo->mmio_base_phys, | |
| 657 | + (u8 __iomem *)ioremap(dinfo->mmio_base_phys, | |
| 658 | 658 | INTEL_REG_SIZE); |
| 659 | 659 | if (!dinfo->mmio_base) { |
| 660 | 660 | ERR_MSG("Cannot remap MMIO region.\n"); |
| @@ -683,7 +683,7 @@ static int kyrofb_probe(struct pci_dev *pdev, const struct pci_device_id *ent) · 682 unmodified lines | ||
| 683 | 683 | kyro_fix.mmio_len = pci_resource_len(pdev, 1); |
| 684 | 684 | |
| 685 | 685 | currentpar->regbase = deviceInfo.pSTGReg = |
| 686 | − ioremap_nocache(kyro_fix.mmio_start, kyro_fix.mmio_len); | |
| 686 | + ioremap(kyro_fix.mmio_start, kyro_fix.mmio_len); | |
| 687 | 687 | if (!currentpar->regbase) |
| 688 | 688 | goto out_free_fb; |
| 689 | 689 | |
| @@ -1710,7 +1710,7 @@ static int initMatrox2(struct matrox_fb_info *minfo, struct board *b) · 1709 unmodified lines | ||
| 1710 | 1710 | memsize = mem; |
| 1711 | 1711 | err = -ENOMEM; |
| 1712 | 1712 | |
| 1713 | − minfo->mmio.vbase.vaddr = ioremap_nocache(ctrlptr_phys, 16384); | |
| 1713 | + minfo->mmio.vbase.vaddr = ioremap(ctrlptr_phys, 16384); | |
| 1714 | 1714 | if (!minfo->mmio.vbase.vaddr) { |
| 1715 | 1715 | printk(KERN_ERR "matroxfb: cannot ioremap(%lX, 16384), matroxfb disabled\n", ctrlptr_phys); |
| 1716 | 1716 | goto failVideoMR; |
| @@ -938,7 +938,7 @@ static int mbxfb_probe(struct platform_device *dev) · 937 unmodified lines | ||
| 938 | 938 | } |
| 939 | 939 | mfbi->reg_phys_addr = mfbi->reg_res->start; |
| 940 | 940 | |
| 941 | − mfbi->reg_virt_addr = devm_ioremap_nocache(&dev->dev, | |
| 941 | + mfbi->reg_virt_addr = devm_ioremap(&dev->dev, | |
| 942 | 942 | mfbi->reg_phys_addr, |
| 943 | 943 | res_size(mfbi->reg_req)); |
| 944 | 944 | if (!mfbi->reg_virt_addr) { |
| @@ -948,7 +948,7 @@ static int mbxfb_probe(struct platform_device *dev) · 3 unmodified lines | ||
| 948 | 948 | } |
| 949 | 949 | virt_base_2700 = mfbi->reg_virt_addr; |
| 950 | 950 | |
| 951 | − mfbi->fb_virt_addr = devm_ioremap_nocache(&dev->dev, mfbi->fb_phys_addr, | |
| 951 | + mfbi->fb_virt_addr = devm_ioremap(&dev->dev, mfbi->fb_phys_addr, | |
| 952 | 952 | res_size(mfbi->fb_req)); |
| 953 | 953 | if (!mfbi->fb_virt_addr) { |
| 954 | 954 | dev_err(&dev->dev, "failed to ioremap frame buffer\n"); |
| @@ -485,7 +485,7 @@ static int mmphw_probe(struct platform_device *pdev) · 484 unmodified lines | ||
| 485 | 485 | goto failed; |
| 486 | 486 | } |
| 487 | 487 | |
| 488 | − ctrl->reg_base = devm_ioremap_nocache(ctrl->dev, | |
| 488 | + ctrl->reg_base = devm_ioremap(ctrl->dev, | |
| 489 | 489 | res->start, resource_size(res)); |
| 490 | 490 | if (ctrl->reg_base == NULL) { |
| 491 | 491 | dev_err(ctrl->dev, "%s: res %pR map failed\n", __func__, res); |
| @@ -1563,7 +1563,7 @@ static int pm2fb_probe(struct pci_dev *pdev, const struct pci_device_id *id) · 1562 unmodified lines | ||
| 1563 | 1563 | goto err_exit_neither; |
| 1564 | 1564 | } |
| 1565 | 1565 | default_par->v_regs = |
| 1566 | − ioremap_nocache(pm2fb_fix.mmio_start, pm2fb_fix.mmio_len); | |
| 1566 | + ioremap(pm2fb_fix.mmio_start, pm2fb_fix.mmio_len); | |
| 1567 | 1567 | if (!default_par->v_regs) { |
| 1568 | 1568 | printk(KERN_WARNING "pm2fb: Can't remap %s register area.\n", |
| 1569 | 1569 | pm2fb_fix.id); |
| @@ -1236,7 +1236,7 @@ static unsigned long pm3fb_size_memory(struct pm3_par *par) · 1235 unmodified lines | ||
| 1236 | 1236 | return 0; |
| 1237 | 1237 | } |
| 1238 | 1238 | screen_mem = |
| 1239 | − ioremap_nocache(pm3fb_fix.smem_start, pm3fb_fix.smem_len); | |
| 1239 | + ioremap(pm3fb_fix.smem_start, pm3fb_fix.smem_len); | |
| 1240 | 1240 | if (!screen_mem) { |
| 1241 | 1241 | printk(KERN_WARNING "pm3fb: Can't ioremap smem area.\n"); |
| 1242 | 1242 | release_mem_region(pm3fb_fix.smem_start, pm3fb_fix.smem_len); |
| @@ -1347,7 +1347,7 @@ static int pm3fb_probe(struct pci_dev *dev, const struct pci_device_id *ent) · 104 unmodified lines | ||
| 1347 | 1347 | goto err_exit_neither; |
| 1348 | 1348 | } |
| 1349 | 1349 | par->v_regs = |
| 1350 | − ioremap_nocache(pm3fb_fix.mmio_start, pm3fb_fix.mmio_len); | |
| 1350 | + ioremap(pm3fb_fix.mmio_start, pm3fb_fix.mmio_len); | |
| 1351 | 1351 | if (!par->v_regs) { |
| 1352 | 1352 | printk(KERN_WARNING "pm3fb: Can't remap %s register area.\n", |
| 1353 | 1353 | pm3fb_fix.id); |
| @@ -188,7 +188,7 @@ static int pmagaafb_probe(struct device *dev) · 187 unmodified lines | ||
| 188 | 188 | |
| 189 | 189 | /* MMIO mapping setup. */ |
| 190 | 190 | info->fix.mmio_start = start + PMAG_AA_BT455_OFFSET; |
| 191 | − par->mmio = ioremap_nocache(info->fix.mmio_start, info->fix.mmio_len); | |
| 191 | + par->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len); | |
| 192 | 192 | if (!par->mmio) { |
| 193 | 193 | printk(KERN_ERR "%s: Cannot map MMIO\n", dev_name(dev)); |
| 194 | 194 | err = -ENOMEM; |
| @@ -199,7 +199,7 @@ static int pmagaafb_probe(struct device *dev) · 4 unmodified lines | ||
| 199 | 199 | |
| 200 | 200 | /* Frame buffer mapping setup. */ |
| 201 | 201 | info->fix.smem_start = start + PMAG_AA_ONBOARD_FBMEM_OFFSET; |
| 202 | − info->screen_base = ioremap_nocache(info->fix.smem_start, | |
| 202 | + info->screen_base = ioremap(info->fix.smem_start, | |
| 203 | 203 | info->fix.smem_len); |
| 204 | 204 | if (!info->screen_base) { |
| 205 | 205 | printk(KERN_ERR "%s: Cannot map FB\n", dev_name(dev)); |
| @@ -180,7 +180,7 @@ static int pmagbafb_probe(struct device *dev) · 179 unmodified lines | ||
| 180 | 180 | |
| 181 | 181 | /* MMIO mapping setup. */ |
| 182 | 182 | info->fix.mmio_start = start; |
| 183 | − par->mmio = ioremap_nocache(info->fix.mmio_start, info->fix.mmio_len); | |
| 183 | + par->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len); | |
| 184 | 184 | if (!par->mmio) { |
| 185 | 185 | printk(KERN_ERR "%s: Cannot map MMIO\n", dev_name(dev)); |
| 186 | 186 | err = -ENOMEM; |
| @@ -190,7 +190,7 @@ static int pmagbafb_probe(struct device *dev) · 3 unmodified lines | ||
| 190 | 190 | |
| 191 | 191 | /* Frame buffer mapping setup. */ |
| 192 | 192 | info->fix.smem_start = start + PMAG_BA_FBMEM; |
| 193 | − info->screen_base = ioremap_nocache(info->fix.smem_start, | |
| 193 | + info->screen_base = ioremap(info->fix.smem_start, | |
| 194 | 194 | info->fix.smem_len); |
| 195 | 195 | if (!info->screen_base) { |
| 196 | 196 | printk(KERN_ERR "%s: Cannot map FB\n", dev_name(dev)); |
| @@ -287,7 +287,7 @@ static int pmagbbfb_probe(struct device *dev) · 286 unmodified lines | ||
| 287 | 287 | |
| 288 | 288 | /* MMIO mapping setup. */ |
| 289 | 289 | info->fix.mmio_start = start; |
| 290 | − par->mmio = ioremap_nocache(info->fix.mmio_start, info->fix.mmio_len); | |
| 290 | + par->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len); | |
| 291 | 291 | if (!par->mmio) { |
| 292 | 292 | printk(KERN_ERR "%s: Cannot map MMIO\n", dev_name(dev)); |
| 293 | 293 | err = -ENOMEM; |
| @@ -298,7 +298,7 @@ static int pmagbbfb_probe(struct device *dev) · 4 unmodified lines | ||
| 298 | 298 | |
| 299 | 299 | /* Frame buffer mapping setup. */ |
| 300 | 300 | info->fix.smem_start = start + PMAGB_B_FBMEM; |
| 301 | − par->smem = ioremap_nocache(info->fix.smem_start, info->fix.smem_len); | |
| 301 | + par->smem = ioremap(info->fix.smem_start, info->fix.smem_len); | |
| 302 | 302 | if (!par->smem) { |
| 303 | 303 | printk(KERN_ERR "%s: Cannot map FB\n", dev_name(dev)); |
| 304 | 304 | err = -ENOMEM; |
| @@ -770,7 +770,7 @@ static int __maybe_unused pvr2fb_common_init(void) · 769 unmodified lines | ||
| 770 | 770 | struct pvr2fb_par *par = currentpar; |
| 771 | 771 | unsigned long modememused, rev; |
| 772 | 772 | |
| 773 | − fb_info->screen_base = ioremap_nocache(pvr2_fix.smem_start, | |
| 773 | + fb_info->screen_base = ioremap(pvr2_fix.smem_start, | |
| 774 | 774 | pvr2_fix.smem_len); |
| 775 | 775 | |
| 776 | 776 | if (!fb_info->screen_base) { |
| @@ -778,7 +778,7 @@ static int __maybe_unused pvr2fb_common_init(void) · 1 unmodified line | ||
| 778 | 778 | goto out_err; |
| 779 | 779 | } |
| 780 | 780 | |
| 781 | − par->mmio_base = ioremap_nocache(pvr2_fix.mmio_start, | |
| 781 | + par->mmio_base = ioremap(pvr2_fix.mmio_start, | |
| 782 | 782 | pvr2_fix.mmio_len); |
| 783 | 783 | if (!par->mmio_base) { |
| 784 | 784 | printk(KERN_ERR "pvr2fb: Failed to remap mmio space\n"); |
| @@ -665,7 +665,7 @@ static int pxa168fb_probe(struct platform_device *pdev) · 664 unmodified lines | ||
| 665 | 665 | /* |
| 666 | 666 | * Map LCD controller registers. |
| 667 | 667 | */ |
| 668 | − fbi->reg_base = devm_ioremap_nocache(&pdev->dev, res->start, | |
| 668 | + fbi->reg_base = devm_ioremap(&pdev->dev, res->start, | |
| 669 | 669 | resource_size(res)); |
| 670 | 670 | if (fbi->reg_base == NULL) { |
| 671 | 671 | ret = -ENOMEM; |
| @@ -809,7 +809,7 @@ static int s1d13xxxfb_probe(struct platform_device *pdev) · 808 unmodified lines | ||
| 809 | 809 | |
| 810 | 810 | platform_set_drvdata(pdev, info); |
| 811 | 811 | default_par = info->par; |
| 812 | − default_par->regs = ioremap_nocache(pdev->resource[1].start, | |
| 812 | + default_par->regs = ioremap(pdev->resource[1].start, | |
| 813 | 813 | pdev->resource[1].end - pdev->resource[1].start +1); |
| 814 | 814 | if (!default_par->regs) { |
| 815 | 815 | printk(KERN_ERR PFX "unable to map registers\n"); |
| @@ -818,7 +818,7 @@ static int s1d13xxxfb_probe(struct platform_device *pdev) · 2 unmodified lines | ||
| 818 | 818 | } |
| 819 | 819 | info->pseudo_palette = default_par->pseudo_palette; |
| 820 | 820 | |
| 821 | − info->screen_base = ioremap_nocache(pdev->resource[0].start, | |
| 821 | + info->screen_base = ioremap(pdev->resource[0].start, | |
| 822 | 822 | pdev->resource[0].end - pdev->resource[0].start +1); |
| 823 | 823 | |
| 824 | 824 | if (!info->screen_base) { |
| @@ -463,7 +463,7 @@ static int sh7760fb_probe(struct platform_device *pdev) · 462 unmodified lines | ||
| 463 | 463 | goto out_fb; |
| 464 | 464 | } |
| 465 | 465 | |
| 466 | − par->base = ioremap_nocache(res->start, resource_size(res)); | |
| 466 | + par->base = ioremap(res->start, resource_size(res)); | |
| 467 | 467 | if (!par->base) { |
| 468 | 468 | dev_err(&pdev->dev, "cannot remap\n"); |
| 469 | 469 | ret = -ENODEV; |
| @@ -2588,7 +2588,7 @@ static int sh_mobile_lcdc_probe(struct platform_device *pdev) · 2587 unmodified lines | ||
| 2588 | 2588 | if (num_channels == 2) |
| 2589 | 2589 | priv->forced_fourcc = pdata->ch[0].fourcc; |
| 2590 | 2590 | |
| 2591 | − priv->base = ioremap_nocache(res->start, resource_size(res)); | |
| 2591 | + priv->base = ioremap(res->start, resource_size(res)); | |
| 2592 | 2592 | if (!priv->base) { |
| 2593 | 2593 | error = -ENOMEM; |
| 2594 | 2594 | goto err1; |
| @@ -1363,14 +1363,14 @@ static int sstfb_probe(struct pci_dev *pdev, const struct pci_device_id *id) · 1362 unmodified lines | ||
| 1363 | 1363 | goto fail_fb_mem; |
| 1364 | 1364 | } |
| 1365 | 1365 | |
| 1366 | − par->mmio_vbase = ioremap_nocache(fix->mmio_start, | |
| 1366 | + par->mmio_vbase = ioremap(fix->mmio_start, | |
| 1367 | 1367 | fix->mmio_len); |
| 1368 | 1368 | if (!par->mmio_vbase) { |
| 1369 | 1369 | printk(KERN_ERR "sstfb: cannot remap register area %#lx\n", |
| 1370 | 1370 | fix->mmio_start); |
| 1371 | 1371 | goto fail_mmio_remap; |
| 1372 | 1372 | } |
| 1373 | − info->screen_base = ioremap_nocache(fix->smem_start, 0x400000); | |
| 1373 | + info->screen_base = ioremap(fix->smem_start, 0x400000); | |
| 1374 | 1374 | if (!info->screen_base) { |
| 1375 | 1375 | printk(KERN_ERR "sstfb: cannot remap framebuffer %#lx\n", |
| 1376 | 1376 | fix->smem_start); |
| @@ -1198,7 +1198,7 @@ static int __init stifb_init_fb(struct sti_struct *sti, int bpp_pref) · 1197 unmodified lines | ||
| 1198 | 1198 | case S9000_ID_TOMCAT: /* Dual CRX, behaves else like a CRX */ |
| 1199 | 1199 | /* FIXME: TomCat supports two heads: |
| 1200 | 1200 | * fb.iobase = REGION_BASE(fb_info,3); |
| 1201 | − * fb.screen_base = ioremap_nocache(REGION_BASE(fb_info,2),xxx); | |
| 1201 | + * fb.screen_base = ioremap(REGION_BASE(fb_info,2),xxx); | |
| 1202 | 1202 | * for now we only support the left one ! */ |
| 1203 | 1203 | xres = fb->ngle_rom.x_size_visible; |
| 1204 | 1204 | yres = fb->ngle_rom.y_size_visible; |
| @@ -1291,7 +1291,7 @@ static int __init stifb_init_fb(struct sti_struct *sti, int bpp_pref) · 86 unmodified lines | ||
| 1291 | 1291 | |
| 1292 | 1292 | strcpy(fix->id, "stifb"); |
| 1293 | 1293 | info->fbops = &stifb_ops; |
| 1294 | − info->screen_base = ioremap_nocache(REGION_BASE(fb,1), fix->smem_len); | |
| 1294 | + info->screen_base = ioremap(REGION_BASE(fb,1), fix->smem_len); | |
| 1295 | 1295 | if (!info->screen_base) { |
| 1296 | 1296 | printk(KERN_ERR "stifb: failed to map memory\n"); |
| 1297 | 1297 | goto out_err0; |
| @@ -1417,7 +1417,7 @@ static int tdfxfb_probe(struct pci_dev *pdev, const struct pci_device_id *id) · 1416 unmodified lines | ||
| 1417 | 1417 | } |
| 1418 | 1418 | |
| 1419 | 1419 | default_par->regbase_virt = |
| 1420 | − ioremap_nocache(info->fix.mmio_start, info->fix.mmio_len); | |
| 1420 | + ioremap(info->fix.mmio_start, info->fix.mmio_len); | |
| 1421 | 1421 | if (!default_par->regbase_virt) { |
| 1422 | 1422 | printk(KERN_ERR "fb: Can't remap %s register area.\n", |
| 1423 | 1423 | info->fix.id); |
| @@ -1438,7 +1438,7 @@ static int tgafb_register(struct device *dev) · 1437 unmodified lines | ||
| 1438 | 1438 | } |
| 1439 | 1439 | |
| 1440 | 1440 | /* Map the framebuffer. */ |
| 1441 | − mem_base = ioremap_nocache(bar0_start, bar0_len); | |
| 1441 | + mem_base = ioremap(bar0_start, bar0_len); | |
| 1442 | 1442 | if (!mem_base) { |
| 1443 | 1443 | printk(KERN_ERR "tgafb: Cannot map MMIO\n"); |
| 1444 | 1444 | goto err1; |
| @@ -1556,7 +1556,7 @@ static int trident_pci_probe(struct pci_dev *dev, · 1555 unmodified lines | ||
| 1556 | 1556 | return -1; |
| 1557 | 1557 | } |
| 1558 | 1558 | |
| 1559 | − default_par->io_virt = ioremap_nocache(tridentfb_fix.mmio_start, | |
| 1559 | + default_par->io_virt = ioremap(tridentfb_fix.mmio_start, | |
| 1560 | 1560 | tridentfb_fix.mmio_len); |
| 1561 | 1561 | |
| 1562 | 1562 | if (!default_par->io_virt) { |
| @@ -1579,7 +1579,7 @@ static int trident_pci_probe(struct pci_dev *dev, · 16 unmodified lines | ||
| 1579 | 1579 | goto out_unmap1; |
| 1580 | 1580 | } |
| 1581 | 1581 | |
| 1582 | − info->screen_base = ioremap_nocache(tridentfb_fix.smem_start, | |
| 1582 | + info->screen_base = ioremap(tridentfb_fix.smem_start, | |
| 1583 | 1583 | tridentfb_fix.smem_len); |
| 1584 | 1584 | |
| 1585 | 1585 | if (!info->screen_base) { |
| @@ -356,7 +356,7 @@ int __init valkyriefb_init(void) · 355 unmodified lines | ||
| 356 | 356 | p->total_vram = 0x100000; |
| 357 | 357 | p->frame_buffer_phys = frame_buffer_phys; |
| 358 | 358 | #ifdef CONFIG_MAC |
| 359 | − p->frame_buffer = ioremap_nocache(frame_buffer_phys, p->total_vram); | |
| 359 | + p->frame_buffer = ioremap(frame_buffer_phys, p->total_vram); | |
| 360 | 360 | #else |
| 361 | 361 | p->frame_buffer = ioremap_wt(frame_buffer_phys, p->total_vram); |
| 362 | 362 | #endif |
| @@ -159,7 +159,7 @@ static int __init cr_pll_init(void) · 158 unmodified lines | ||
| 159 | 159 | pci_read_config_dword(mch_dev, CRVML_REG_MCHBAR, |
| 160 | 160 | &mch_bar); |
| 161 | 161 | mch_regs_base = |
| 162 | − ioremap_nocache(mch_bar, CRVML_MCHMAP_SIZE); | |
| 162 | + ioremap(mch_bar, CRVML_MCHMAP_SIZE); | |
| 163 | 163 | if (!mch_regs_base) { |
| 164 | 164 | printk(KERN_ERR |
| 165 | 165 | "Carillo Ranch MCH device was not enabled.\n"); |
| @@ -317,7 +317,7 @@ static int vmlfb_enable_mmio(struct vml_par *par) · 316 unmodified lines | ||
| 317 | 317 | ": Could not claim display controller MMIO.\n"); |
| 318 | 318 | return -EBUSY; |
| 319 | 319 | } |
| 320 | − par->vdc_mem = ioremap_nocache(par->vdc_mem_base, par->vdc_mem_size); | |
| 320 | + par->vdc_mem = ioremap(par->vdc_mem_base, par->vdc_mem_size); | |
| 321 | 321 | if (par->vdc_mem == NULL) { |
| 322 | 322 | printk(KERN_ERR MODULE_NAME |
| 323 | 323 | ": Could not map display controller MMIO.\n"); |
| @@ -332,7 +332,7 @@ static int vmlfb_enable_mmio(struct vml_par *par) · 8 unmodified lines | ||
| 332 | 332 | err = -EBUSY; |
| 333 | 333 | goto out_err_1; |
| 334 | 334 | } |
| 335 | − par->gpu_mem = ioremap_nocache(par->gpu_mem_base, par->gpu_mem_size); | |
| 335 | + par->gpu_mem = ioremap(par->gpu_mem_base, par->gpu_mem_size); | |
| 336 | 336 | if (par->gpu_mem == NULL) { |
| 337 | 337 | printk(KERN_ERR MODULE_NAME ": Could not map GPU MMIO.\n"); |
| 338 | 338 | err = -ENOMEM; |
| @@ -442,7 +442,7 @@ static int via_pci_setup_mmio(struct viafb_dev *vdev) · 441 unmodified lines | ||
| 442 | 442 | */ |
| 443 | 443 | vdev->engine_start = pci_resource_start(vdev->pdev, 1); |
| 444 | 444 | vdev->engine_len = pci_resource_len(vdev->pdev, 1); |
| 445 | − vdev->engine_mmio = ioremap_nocache(vdev->engine_start, | |
| 445 | + vdev->engine_mmio = ioremap(vdev->engine_start, | |
| 446 | 446 | vdev->engine_len); |
| 447 | 447 | if (vdev->engine_mmio == NULL) |
| 448 | 448 | dev_err(&vdev->pdev->dev, |
| @@ -648,12 +648,12 @@ int w100fb_probe(struct platform_device *pdev) · 647 unmodified lines | ||
| 648 | 648 | return -EINVAL; |
| 649 | 649 | |
| 650 | 650 | /* Remap the chip base address */ |
| 651 | − remapped_base = ioremap_nocache(mem->start+W100_CFG_BASE, W100_CFG_LEN); | |
| 651 | + remapped_base = ioremap(mem->start+W100_CFG_BASE, W100_CFG_LEN); | |
| 652 | 652 | if (remapped_base == NULL) |
| 653 | 653 | goto out; |
| 654 | 654 | |
| 655 | 655 | /* Map the register space */ |
| 656 | − remapped_regs = ioremap_nocache(mem->start+W100_REG_BASE, W100_REG_LEN); | |
| 656 | + remapped_regs = ioremap(mem->start+W100_REG_BASE, W100_REG_LEN); | |
| 657 | 657 | if (remapped_regs == NULL) |
| 658 | 658 | goto out; |
| 659 | 659 | |
| @@ -672,7 +672,7 @@ int w100fb_probe(struct platform_device *pdev) · 12 unmodified lines | ||
| 672 | 672 | printk(" at 0x%08lx.\n", (unsigned long) mem->start+W100_CFG_BASE); |
| 673 | 673 | |
| 674 | 674 | /* Remap the framebuffer */ |
| 675 | − remapped_fbuf = ioremap_nocache(mem->start+MEM_WINDOW_BASE, MEM_WINDOW_SIZE); | |
| 675 | + remapped_fbuf = ioremap(mem->start+MEM_WINDOW_BASE, MEM_WINDOW_SIZE); | |
| 676 | 676 | if (remapped_fbuf == NULL) |
| 677 | 677 | goto out; |
| 678 | 678 | |
| @@ -55,7 +55,7 @@ static int vmic_probe(struct pci_dev *pdev, const struct pci_device_id *id) · 54 unmodified lines | ||
| 55 | 55 | } |
| 56 | 56 | |
| 57 | 57 | /* Map registers in BAR 0 */ |
| 58 | − vmic_base = ioremap_nocache(pci_resource_start(pdev, 0), 16); | |
| 58 | + vmic_base = ioremap(pci_resource_start(pdev, 0), 16); | |
| 59 | 59 | if (!vmic_base) { |
| 60 | 60 | dev_err(&pdev->dev, "Unable to remap CRG region\n"); |
| 61 | 61 | retval = -EIO; |
| @@ -554,7 +554,7 @@ static int ca91cx42_alloc_resource(struct vme_master_resource *image, · 553 unmodified lines | ||
| 554 | 554 | goto err_resource; |
| 555 | 555 | } |
| 556 | 556 | |
| 557 | − image->kern_base = ioremap_nocache( | |
| 557 | + image->kern_base = ioremap( | |
| 558 | 558 | image->bus_resource.start, size); |
| 559 | 559 | if (!image->kern_base) { |
| 560 | 560 | dev_err(ca91cx42_bridge->parent, "Failed to remap resource\n"); |
| @@ -1638,7 +1638,7 @@ static int ca91cx42_probe(struct pci_dev *pdev, const struct pci_device_id *id) · 1077 unmodified lines | ||
| 1638 | 1638 | } |
| 1639 | 1639 | |
| 1640 | 1640 | /* map registers in BAR 0 */ |
| 1641 | − ca91cx42_device->base = ioremap_nocache(pci_resource_start(pdev, 0), | |
| 1641 | + ca91cx42_device->base = ioremap(pci_resource_start(pdev, 0), | |
| 1642 | 1642 | 4096); |
| 1643 | 1643 | if (!ca91cx42_device->base) { |
| 1644 | 1644 | dev_err(&pdev->dev, "Unable to remap CRG region\n"); |
| @@ -770,7 +770,7 @@ static int tsi148_alloc_resource(struct vme_master_resource *image, · 769 unmodified lines | ||
| 770 | 770 | goto err_resource; |
| 771 | 771 | } |
| 772 | 772 | |
| 773 | − image->kern_base = ioremap_nocache( | |
| 773 | + image->kern_base = ioremap( | |
| 774 | 774 | image->bus_resource.start, size); |
| 775 | 775 | if (!image->kern_base) { |
| 776 | 776 | dev_err(tsi148_bridge->parent, "Failed to remap resource\n"); |
| @@ -2317,7 +2317,7 @@ static int tsi148_probe(struct pci_dev *pdev, const struct pci_device_id *id) · 1540 unmodified lines | ||
| 2317 | 2317 | } |
| 2318 | 2318 | |
| 2319 | 2319 | /* map registers in BAR 0 */ |
| 2320 | − tsi148_device->base = ioremap_nocache(pci_resource_start(pdev, 0), | |
| 2320 | + tsi148_device->base = ioremap(pci_resource_start(pdev, 0), | |
| 2321 | 2321 | 4096); |
| 2322 | 2322 | if (!tsi148_device->base) { |
| 2323 | 2323 | dev_err(&pdev->dev, "Unable to remap CRG region\n"); |
| @@ -139,7 +139,7 @@ static int matrox_w1_probe(struct pci_dev *pdev, const struct pci_device_id *ent · 138 unmodified lines | ||
| 139 | 139 | |
| 140 | 140 | dev->phys_addr = pci_resource_start(pdev, 1); |
| 141 | 141 | |
| 142 | − dev->virt_addr = ioremap_nocache(dev->phys_addr, 16384); | |
| 142 | + dev->virt_addr = ioremap(dev->phys_addr, 16384); | |
| 143 | 143 | if (!dev->virt_addr) { |
| 144 | 144 | dev_err(&pdev->dev, "%s: failed to ioremap(0x%lx, %d).\n", |
| 145 | 145 | __func__, dev->phys_addr, 16384); |
| @@ -246,7 +246,7 @@ static int bcm63xx_wdt_probe(struct platform_device *pdev) · 245 unmodified lines | ||
| 246 | 246 | return -ENODEV; |
| 247 | 247 | } |
| 248 | 248 | |
| 249 | − bcm63xx_wdt_device.regs = devm_ioremap_nocache(&pdev->dev, r->start, | |
| 249 | + bcm63xx_wdt_device.regs = devm_ioremap(&pdev->dev, r->start, | |
| 250 | 250 | resource_size(r)); |
| 251 | 251 | if (!bcm63xx_wdt_device.regs) { |
| 252 | 252 | dev_err(&pdev->dev, "failed to remap I/O resources\n"); |
| @@ -463,7 +463,7 @@ static int __init intel_scu_watchdog_init(void) · 462 unmodified lines | ||
| 463 | 463 | return -ENODEV; |
| 464 | 464 | } |
| 465 | 465 | |
| 466 | − tmp_addr = ioremap_nocache(watchdog_device.timer_tbl_ptr->phys_addr, | |
| 466 | + tmp_addr = ioremap(watchdog_device.timer_tbl_ptr->phys_addr, | |
| 467 | 467 | 20); |
| 468 | 468 | |
| 469 | 469 | if (tmp_addr == NULL) { |
| @@ -26,7 +26,7 @@ · 25 unmodified lines | ||
| 26 | 26 | #include <linux/platform_device.h> /* For platform_driver framework */ |
| 27 | 27 | #include <linux/spinlock.h> /* For spin_lock/spin_unlock/... */ |
| 28 | 28 | #include <linux/uaccess.h> /* For copy_to_user/put_user/... */ |
| 29 | −#include <linux/io.h> /* For devm_ioremap_nocache */ | |
| 29 | +#include <linux/io.h> /* For devm_ioremap */ | |
| 30 | 30 | |
| 31 | 31 | #include <asm/mach-rc32434/integ.h> /* For the Watchdog registers */ |
| 32 | 32 | |
| @@ -267,7 +267,7 @@ static int rc32434_wdt_probe(struct platform_device *pdev) · 234 unmodified lines | ||
| 267 | 267 | return -ENODEV; |
| 268 | 268 | } |
| 269 | 269 | |
| 270 | − wdt_reg = devm_ioremap_nocache(&pdev->dev, r->start, resource_size(r)); | |
| 270 | + wdt_reg = devm_ioremap(&pdev->dev, r->start, resource_size(r)); | |
| 271 | 271 | if (!wdt_reg) { |
| 272 | 272 | pr_err("failed to remap I/O resources\n"); |
| 273 | 273 | return -ENXIO; |
| @@ -960,10 +960,6 @@ static inline void __iomem *ioremap(phys_addr_t addr, size_t size) · 959 unmodified lines | ||
| 960 | 960 | } |
| 961 | 961 | #endif /* !CONFIG_MMU || CONFIG_GENERIC_IOREMAP */ |
| 962 | 962 | |
| 963 | −#ifndef ioremap_nocache | |
| 964 | −#define ioremap_nocache ioremap | |
| 965 | −#endif | |
| 966 | − | |
| 967 | 963 | #ifndef ioremap_wc |
| 968 | 964 | #define ioremap_wc ioremap |
| 969 | 965 | #endif |
| @@ -94,11 +94,11 @@ extern void ioport_unmap(void __iomem *); · 93 unmodified lines | ||
| 94 | 94 | #endif |
| 95 | 95 | |
| 96 | 96 | #ifndef ARCH_HAS_IOREMAP_WC |
| 97 | −#define ioremap_wc ioremap_nocache | |
| 97 | +#define ioremap_wc ioremap | |
| 98 | 98 | #endif |
| 99 | 99 | |
| 100 | 100 | #ifndef ARCH_HAS_IOREMAP_WT |
| 101 | −#define ioremap_wt ioremap_nocache | |
| 101 | +#define ioremap_wt ioremap | |
| 102 | 102 | #endif |
| 103 | 103 | |
| 104 | 104 | #ifdef CONFIG_PCI |
| @@ -66,8 +66,6 @@ void __iomem *devm_ioremap(struct device *dev, resource_size_t offset, · 65 unmodified lines | ||
| 66 | 66 | resource_size_t size); |
| 67 | 67 | void __iomem *devm_ioremap_uc(struct device *dev, resource_size_t offset, |
| 68 | 68 | resource_size_t size); |
| 69 | −void __iomem *devm_ioremap_nocache(struct device *dev, resource_size_t offset, | |
| 70 | − resource_size_t size); | |
| 71 | 69 | void __iomem *devm_ioremap_wc(struct device *dev, resource_size_t offset, |
| 72 | 70 | resource_size_t size); |
| 73 | 71 | void devm_iounmap(struct device *dev, void __iomem *addr); |
| @@ -87,7 +85,7 @@ void *__devm_memremap_pages(struct device *dev, struct resource *res); · 13 unmodified lines | ||
| 87 | 85 | * Posting") mandate non-posted configuration transactions. There is |
| 88 | 86 | * no ioremap API in the kernel that can guarantee non-posted write |
| 89 | 87 | * semantics across arches so provide a default implementation for |
| 90 | − * mapping PCI config space that defaults to ioremap_nocache(); arches | |
| 88 | + * mapping PCI config space that defaults to ioremap(); arches | |
| 91 | 89 | * should override it if they have memory mapping implementations that |
| 92 | 90 | * guarantee non-posted writes semantics to make the memory mapping |
| 93 | 91 | * compliant with the PCI specification. |
| @@ -97,7 +95,7 @@ void *__devm_memremap_pages(struct device *dev, struct resource *res); · 3 unmodified lines | ||
| 97 | 95 | static inline void __iomem *pci_remap_cfgspace(phys_addr_t offset, |
| 98 | 96 | size_t size) |
| 99 | 97 | { |
| 100 | − return ioremap_nocache(offset, size); | |
| 98 | + return ioremap(offset, size); | |
| 101 | 99 | } |
| 102 | 100 | #endif |
| 103 | 101 | #endif |
| @@ -8,7 +8,6 @@ · 7 unmodified lines | ||
| 8 | 8 | |
| 9 | 9 | enum devm_ioremap_type { |
| 10 | 10 | DEVM_IOREMAP = 0, |
| 11 | − DEVM_IOREMAP_NC, | |
| 12 | 11 | DEVM_IOREMAP_UC, |
| 13 | 12 | DEVM_IOREMAP_WC, |
| 14 | 13 | }; |
| @@ -37,9 +36,6 @@ static void __iomem *__devm_ioremap(struct device *dev, resource_size_t offset, · 22 unmodified lines | ||
| 37 | 36 | case DEVM_IOREMAP: |
| 38 | 37 | addr = ioremap(offset, size); |
| 39 | 38 | break; |
| 40 | − case DEVM_IOREMAP_NC: | |
| 41 | − addr = ioremap_nocache(offset, size); | |
| 42 | − break; | |
| 43 | 39 | case DEVM_IOREMAP_UC: |
| 44 | 40 | addr = ioremap_uc(offset, size); |
| 45 | 41 | break; |
| @@ -87,22 +83,6 @@ void __iomem *devm_ioremap_uc(struct device *dev, resource_size_t offset, · 41 unmodified lines | ||
| 87 | 83 | } |
| 88 | 84 | EXPORT_SYMBOL_GPL(devm_ioremap_uc); |
| 89 | 85 | |
| 90 | −/** | |
| 91 | − * devm_ioremap_nocache - Managed ioremap_nocache() | |
| 92 | − * @dev: Generic device to remap IO address for | |
| 93 | − * @offset: Resource address to map | |
| 94 | − * @size: Size of map | |
| 95 | − * | |
| 96 | − * Managed ioremap_nocache(). Map is automatically unmapped on driver | |
| 97 | − * detach. | |
| 98 | − */ | |
| 99 | −void __iomem *devm_ioremap_nocache(struct device *dev, resource_size_t offset, | |
| 100 | − resource_size_t size) | |
| 101 | −{ | |
| 102 | − return __devm_ioremap(dev, offset, size, DEVM_IOREMAP_NC); | |
| 103 | −} | |
| 104 | −EXPORT_SYMBOL(devm_ioremap_nocache); | |
| 105 | − | |
| 106 | 86 | /** |
| 107 | 87 | * devm_ioremap_wc - Managed ioremap_wc() |
| 108 | 88 | * @dev: Generic device to remap IO address for |
| @@ -51,8 +51,6 @@ expression x; · 50 unmodified lines | ||
| 51 | 51 | x = devm_request_irq(...) |
| 52 | 52 | | |
| 53 | 53 | x = devm_ioremap(...) |
| 54 | −| | |
| 55 | − x = devm_ioremap_nocache(...) | |
| 56 | 54 | | |
| 57 | 55 | x = devm_ioport_map(...) |
| 58 | 56 | ) |
| @@ -84,8 +82,6 @@ position p; · 25 unmodified lines | ||
| 84 | 82 | x = request_irq(...) |
| 85 | 83 | | |
| 86 | 84 | x = ioremap(...) |
| 87 | −| | |
| 88 | − x = ioremap_nocache(...) | |
| 89 | 85 | | |
| 90 | 86 | x = ioport_map(...) |
| 91 | 87 | ) |
| @@ -23,7 +23,7 @@ int ret; · 22 unmodified lines | ||
| 23 | 23 | position p1,p2,p3; |
| 24 | 24 | @@ |
| 25 | 25 | |
| 26 | −e = \(ioremap@p1\|ioremap_nocache@p1\)(...) | |
| 26 | +e = \(ioremap@p1\)(...) | |
| 27 | 27 | ... when != iounmap(e) |
| 28 | 28 | if (<+...e...+>) S |
| 29 | 29 | ... when any |
| @@ -1123,7 +1123,7 @@ snd_ml403_ac97cr_create(struct snd_card *card, struct platform_device *pfdev, · 1122 unmodified lines | ||
| 1123 | 1123 | PDEBUG(INIT_INFO, "Trying to reserve resources now ...\n"); |
| 1124 | 1124 | resource = platform_get_resource(pfdev, IORESOURCE_MEM, 0); |
| 1125 | 1125 | /* get "port" */ |
| 1126 | − ml403_ac97cr->port = ioremap_nocache(resource->start, | |
| 1126 | + ml403_ac97cr->port = ioremap(resource->start, | |
| 1127 | 1127 | (resource->end) - |
| 1128 | 1128 | (resource->start) + 1); |
| 1129 | 1129 | if (ml403_ac97cr->port == NULL) { |
| @@ -551,7 +551,7 @@ static int snd_msnd_attach(struct snd_card *card) · 550 unmodified lines | ||
| 551 | 551 | free_irq(chip->irq, chip); |
| 552 | 552 | return -EBUSY; |
| 553 | 553 | } |
| 554 | − chip->mappedbase = ioremap_nocache(chip->base, 0x8000); | |
| 554 | + chip->mappedbase = ioremap(chip->base, 0x8000); | |
| 555 | 555 | if (!chip->mappedbase) { |
| 556 | 556 | printk(KERN_ERR LOGNAME |
| 557 | 557 | ": unable to map memory region 0x%lx-0x%lx\n", |
| @@ -907,7 +907,7 @@ snd_harmony_create(struct snd_card *card, · 906 unmodified lines | ||
| 907 | 907 | h->card = card; |
| 908 | 908 | h->dev = padev; |
| 909 | 909 | h->irq = -1; |
| 910 | − h->iobase = ioremap_nocache(padev->hpa.start, HARMONY_SIZE); | |
| 910 | + h->iobase = ioremap(padev->hpa.start, HARMONY_SIZE); | |
| 911 | 911 | if (h->iobase == NULL) { |
| 912 | 912 | printk(KERN_ERR PFX "unable to remap hpa 0x%lx\n", |
| 913 | 913 | (unsigned long)padev->hpa.start); |
| @@ -271,7 +271,7 @@ static int snd_aw2_create(struct snd_card *card, · 270 unmodified lines | ||
| 271 | 271 | } |
| 272 | 272 | chip->iobase_phys = pci_resource_start(pci, 0); |
| 273 | 273 | chip->iobase_virt = |
| 274 | − ioremap_nocache(chip->iobase_phys, | |
| 274 | + ioremap(chip->iobase_phys, | |
| 275 | 275 | pci_resource_len(pci, 0)); |
| 276 | 276 | |
| 277 | 277 | if (chip->iobase_virt == NULL) { |
| @@ -3983,7 +3983,7 @@ int snd_cs46xx_create(struct snd_card *card, · 3982 unmodified lines | ||
| 3983 | 3983 | snd_cs46xx_free(chip); |
| 3984 | 3984 | return -EBUSY; |
| 3985 | 3985 | } |
| 3986 | − region->remap_addr = ioremap_nocache(region->base, region->size); | |
| 3986 | + region->remap_addr = ioremap(region->base, region->size); | |
| 3987 | 3987 | if (region->remap_addr == NULL) { |
| 3988 | 3988 | dev_err(chip->card->dev, |
| 3989 | 3989 | "%s ioremap problem\n", region->name); |
| @@ -1929,7 +1929,7 @@ static int snd_echo_create(struct snd_card *card, · 1928 unmodified lines | ||
| 1929 | 1929 | return -EBUSY; |
| 1930 | 1930 | } |
| 1931 | 1931 | chip->dsp_registers = (volatile u32 __iomem *) |
| 1932 | − ioremap_nocache(chip->dsp_registers_phys, sz); | |
| 1932 | + ioremap(chip->dsp_registers_phys, sz); | |
| 1933 | 1933 | if (!chip->dsp_registers) { |
| 1934 | 1934 | dev_err(chip->card->dev, "ioremap failed\n"); |
| 1935 | 1935 | snd_echo_free(chip); |
| @@ -1353,7 +1353,7 @@ snd_nm256_peek_for_sig(struct nm256 *chip) · 1352 unmodified lines | ||
| 1353 | 1353 | unsigned long pointer_found = chip->buffer_end - 0x1400; |
| 1354 | 1354 | u32 sig; |
| 1355 | 1355 | |
| 1356 | − temp = ioremap_nocache(chip->buffer_addr + chip->buffer_end - 0x400, 16); | |
| 1356 | + temp = ioremap(chip->buffer_addr + chip->buffer_end - 0x400, 16); | |
| 1357 | 1357 | if (temp == NULL) { |
| 1358 | 1358 | dev_err(chip->card->dev, |
| 1359 | 1359 | "Unable to scan for card signature in video RAM\n"); |
| @@ -1518,7 +1518,7 @@ snd_nm256_create(struct snd_card *card, struct pci_dev *pci, · 158 unmodified lines | ||
| 1518 | 1518 | err = -EBUSY; |
| 1519 | 1519 | goto __error; |
| 1520 | 1520 | } |
| 1521 | − chip->cport = ioremap_nocache(chip->cport_addr, NM_PORT2_SIZE); | |
| 1521 | + chip->cport = ioremap(chip->cport_addr, NM_PORT2_SIZE); | |
| 1522 | 1522 | if (chip->cport == NULL) { |
| 1523 | 1523 | dev_err(card->dev, "unable to map control port %lx\n", |
| 1524 | 1524 | chip->cport_addr); |
| @@ -1589,7 +1589,7 @@ snd_nm256_create(struct snd_card *card, struct pci_dev *pci, · 64 unmodified lines | ||
| 1589 | 1589 | err = -EBUSY; |
| 1590 | 1590 | goto __error; |
| 1591 | 1591 | } |
| 1592 | − chip->buffer = ioremap_nocache(chip->buffer_addr, chip->buffer_size); | |
| 1592 | + chip->buffer = ioremap(chip->buffer_addr, chip->buffer_size); | |
| 1593 | 1593 | if (chip->buffer == NULL) { |
| 1594 | 1594 | err = -ENOMEM; |
| 1595 | 1595 | dev_err(card->dev, "unable to map ring buffer at %lx\n", |
| @@ -1344,7 +1344,7 @@ static int snd_rme32_create(struct rme32 *rme32) · 1343 unmodified lines | ||
| 1344 | 1344 | return err; |
| 1345 | 1345 | rme32->port = pci_resource_start(rme32->pci, 0); |
| 1346 | 1346 | |
| 1347 | − rme32->iobase = ioremap_nocache(rme32->port, RME32_IO_SIZE); | |
| 1347 | + rme32->iobase = ioremap(rme32->port, RME32_IO_SIZE); | |
| 1348 | 1348 | if (!rme32->iobase) { |
| 1349 | 1349 | dev_err(rme32->card->dev, |
| 1350 | 1350 | "unable to remap memory region 0x%lx-0x%lx\n", |
| @@ -1619,7 +1619,7 @@ snd_rme96_create(struct rme96 *rme96) · 1618 unmodified lines | ||
| 1619 | 1619 | return err; |
| 1620 | 1620 | rme96->port = pci_resource_start(rme96->pci, 0); |
| 1621 | 1621 | |
| 1622 | − rme96->iobase = ioremap_nocache(rme96->port, RME96_IO_SIZE); | |
| 1622 | + rme96->iobase = ioremap(rme96->port, RME96_IO_SIZE); | |
| 1623 | 1623 | if (!rme96->iobase) { |
| 1624 | 1624 | dev_err(rme96->card->dev, |
| 1625 | 1625 | "unable to remap memory region 0x%lx-0x%lx\n", |
| @@ -5220,7 +5220,7 @@ static int snd_hdsp_create(struct snd_card *card, · 5219 unmodified lines | ||
| 5220 | 5220 | if ((err = pci_request_regions(pci, "hdsp")) < 0) |
| 5221 | 5221 | return err; |
| 5222 | 5222 | hdsp->port = pci_resource_start(pci, 0); |
| 5223 | − if ((hdsp->iobase = ioremap_nocache(hdsp->port, HDSP_IO_EXTENT)) == NULL) { | |
| 5223 | + if ((hdsp->iobase = ioremap(hdsp->port, HDSP_IO_EXTENT)) == NULL) { | |
| 5224 | 5224 | dev_err(hdsp->card->dev, "unable to remap region 0x%lx-0x%lx\n", |
| 5225 | 5225 | hdsp->port, hdsp->port + HDSP_IO_EXTENT - 1); |
| 5226 | 5226 | return -EBUSY; |
| @@ -6594,7 +6594,7 @@ static int snd_hdspm_create(struct snd_card *card, · 6593 unmodified lines | ||
| 6594 | 6594 | dev_dbg(card->dev, "grabbed memory region 0x%lx-0x%lx\n", |
| 6595 | 6595 | hdspm->port, hdspm->port + io_extent - 1); |
| 6596 | 6596 | |
| 6597 | − hdspm->iobase = ioremap_nocache(hdspm->port, io_extent); | |
| 6597 | + hdspm->iobase = ioremap(hdspm->port, io_extent); | |
| 6598 | 6598 | if (!hdspm->iobase) { |
| 6599 | 6599 | dev_err(card->dev, "unable to remap region 0x%lx-0x%lx\n", |
| 6600 | 6600 | hdspm->port, hdspm->port + io_extent - 1); |
| @@ -2466,7 +2466,7 @@ static int snd_rme9652_create(struct snd_card *card, · 2465 unmodified lines | ||
| 2466 | 2466 | if ((err = pci_request_regions(pci, "rme9652")) < 0) |
| 2467 | 2467 | return err; |
| 2468 | 2468 | rme9652->port = pci_resource_start(pci, 0); |
| 2469 | − rme9652->iobase = ioremap_nocache(rme9652->port, RME9652_IO_EXTENT); | |
| 2469 | + rme9652->iobase = ioremap(rme9652->port, RME9652_IO_EXTENT); | |
| 2470 | 2470 | if (rme9652->iobase == NULL) { |
| 2471 | 2471 | dev_err(card->dev, "unable to remap region 0x%lx-0x%lx\n", |
| 2472 | 2472 | rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1); |
| @@ -1334,7 +1334,7 @@ static int sis_chip_create(struct snd_card *card, · 1333 unmodified lines | ||
| 1334 | 1334 | } |
| 1335 | 1335 | |
| 1336 | 1336 | rc = -EIO; |
| 1337 | − sis->ioaddr = ioremap_nocache(pci_resource_start(pci, 1), 0x4000); | |
| 1337 | + sis->ioaddr = ioremap(pci_resource_start(pci, 1), 0x4000); | |
| 1338 | 1338 | if (!sis->ioaddr) { |
| 1339 | 1339 | dev_err(&pci->dev, "unable to remap MMIO, aborting\n"); |
| 1340 | 1340 | goto error_out_cleanup; |
| @@ -2373,7 +2373,7 @@ int snd_ymfpci_create(struct snd_card *card, · 2372 unmodified lines | ||
| 2373 | 2373 | chip->device_id = pci->device; |
| 2374 | 2374 | chip->rev = pci->revision; |
| 2375 | 2375 | chip->reg_area_phys = pci_resource_start(pci, 0); |
| 2376 | − chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000); | |
| 2376 | + chip->reg_area_virt = ioremap(chip->reg_area_phys, 0x8000); | |
| 2377 | 2377 | pci_set_master(pci); |
| 2378 | 2378 | chip->src441_used = -1; |
| 2379 | 2379 | |
| @@ -248,7 +248,7 @@ static int au1xac97c_drvprobe(struct platform_device *pdev) · 247 unmodified lines | ||
| 248 | 248 | pdev->name)) |
| 249 | 249 | return -EBUSY; |
| 250 | 250 | |
| 251 | − ctx->mmio = devm_ioremap_nocache(&pdev->dev, iores->start, | |
| 251 | + ctx->mmio = devm_ioremap(&pdev->dev, iores->start, | |
| 252 | 252 | resource_size(iores)); |
| 253 | 253 | if (!ctx->mmio) |
| 254 | 254 | return -EBUSY; |
| @@ -248,7 +248,7 @@ static int au1xi2s_drvprobe(struct platform_device *pdev) · 247 unmodified lines | ||
| 248 | 248 | pdev->name)) |
| 249 | 249 | return -EBUSY; |
| 250 | 250 | |
| 251 | − ctx->mmio = devm_ioremap_nocache(&pdev->dev, iores->start, | |
| 251 | + ctx->mmio = devm_ioremap(&pdev->dev, iores->start, | |
| 252 | 252 | resource_size(iores)); |
| 253 | 253 | if (!ctx->mmio) |
| 254 | 254 | return -EBUSY; |
| @@ -165,7 +165,7 @@ static int sst_platform_get_resources(struct intel_sst_drv *ctx) · 164 unmodified lines | ||
| 165 | 165 | ctx->iram_base = rsrc->start + ctx->pdata->res_info->iram_offset; |
| 166 | 166 | ctx->iram_end = ctx->iram_base + ctx->pdata->res_info->iram_size - 1; |
| 167 | 167 | dev_info(ctx->dev, "IRAM base: %#x", ctx->iram_base); |
| 168 | − ctx->iram = devm_ioremap_nocache(ctx->dev, ctx->iram_base, | |
| 168 | + ctx->iram = devm_ioremap(ctx->dev, ctx->iram_base, | |
| 169 | 169 | ctx->pdata->res_info->iram_size); |
| 170 | 170 | if (!ctx->iram) { |
| 171 | 171 | dev_err(ctx->dev, "unable to map IRAM\n"); |
| @@ -175,7 +175,7 @@ static int sst_platform_get_resources(struct intel_sst_drv *ctx) · 3 unmodified lines | ||
| 175 | 175 | ctx->dram_base = rsrc->start + ctx->pdata->res_info->dram_offset; |
| 176 | 176 | ctx->dram_end = ctx->dram_base + ctx->pdata->res_info->dram_size - 1; |
| 177 | 177 | dev_info(ctx->dev, "DRAM base: %#x", ctx->dram_base); |
| 178 | − ctx->dram = devm_ioremap_nocache(ctx->dev, ctx->dram_base, | |
| 178 | + ctx->dram = devm_ioremap(ctx->dev, ctx->dram_base, | |
| 179 | 179 | ctx->pdata->res_info->dram_size); |
| 180 | 180 | if (!ctx->dram) { |
| 181 | 181 | dev_err(ctx->dev, "unable to map DRAM\n"); |
| @@ -184,7 +184,7 @@ static int sst_platform_get_resources(struct intel_sst_drv *ctx) · 2 unmodified lines | ||
| 184 | 184 | |
| 185 | 185 | ctx->shim_phy_add = rsrc->start + ctx->pdata->res_info->shim_offset; |
| 186 | 186 | dev_info(ctx->dev, "SHIM base: %#x", ctx->shim_phy_add); |
| 187 | − ctx->shim = devm_ioremap_nocache(ctx->dev, ctx->shim_phy_add, | |
| 187 | + ctx->shim = devm_ioremap(ctx->dev, ctx->shim_phy_add, | |
| 188 | 188 | ctx->pdata->res_info->shim_size); |
| 189 | 189 | if (!ctx->shim) { |
| 190 | 190 | dev_err(ctx->dev, "unable to map SHIM\n"); |
| @@ -197,7 +197,7 @@ static int sst_platform_get_resources(struct intel_sst_drv *ctx) · 6 unmodified lines | ||
| 197 | 197 | /* Get mailbox addr */ |
| 198 | 198 | ctx->mailbox_add = rsrc->start + ctx->pdata->res_info->mbox_offset; |
| 199 | 199 | dev_info(ctx->dev, "Mailbox base: %#x", ctx->mailbox_add); |
| 200 | − ctx->mailbox = devm_ioremap_nocache(ctx->dev, ctx->mailbox_add, | |
| 200 | + ctx->mailbox = devm_ioremap(ctx->dev, ctx->mailbox_add, | |
| 201 | 201 | ctx->pdata->res_info->mbox_size); |
| 202 | 202 | if (!ctx->mailbox) { |
| 203 | 203 | dev_err(ctx->dev, "unable to map mailbox\n"); |
| @@ -216,7 +216,7 @@ static int sst_platform_get_resources(struct intel_sst_drv *ctx) · 12 unmodified lines | ||
| 216 | 216 | ctx->ddr_base = rsrc->start; |
| 217 | 217 | ctx->ddr_end = rsrc->end; |
| 218 | 218 | dev_info(ctx->dev, "DDR base: %#x", ctx->ddr_base); |
| 219 | − ctx->ddr = devm_ioremap_nocache(ctx->dev, ctx->ddr_base, | |
| 219 | + ctx->ddr = devm_ioremap(ctx->dev, ctx->ddr_base, | |
| 220 | 220 | resource_size(rsrc)); |
| 221 | 221 | if (!ctx->ddr) { |
| 222 | 222 | dev_err(ctx->dev, "unable to map DDR\n"); |
| @@ -1955,7 +1955,7 @@ static int fsi_probe(struct platform_device *pdev) · 1954 unmodified lines | ||
| 1955 | 1955 | if (!master) |
| 1956 | 1956 | return -ENOMEM; |
| 1957 | 1957 | |
| 1958 | − master->base = devm_ioremap_nocache(&pdev->dev, | |
| 1958 | + master->base = devm_ioremap(&pdev->dev, | |
| 1959 | 1959 | res->start, resource_size(res)); |
| 1960 | 1960 | if (!master->base) { |
| 1961 | 1961 | dev_err(&pdev->dev, "Unable to ioremap FSI registers.\n"); |
| @@ -1755,7 +1755,7 @@ static int hdmi_lpe_audio_probe(struct platform_device *pdev) · 1754 unmodified lines | ||
| 1755 | 1755 | __func__, (unsigned int)res_mmio->start, |
| 1756 | 1756 | (unsigned int)res_mmio->end); |
| 1757 | 1757 | |
| 1758 | − card_ctx->mmio_start = ioremap_nocache(res_mmio->start, | |
| 1758 | + card_ctx->mmio_start = ioremap(res_mmio->start, | |
| 1759 | 1759 | (size_t)(resource_size(res_mmio))); |
| 1760 | 1760 | if (!card_ctx->mmio_start) { |
| 1761 | 1761 | dev_err(&pdev->dev, "Could not get ioremap\n"); |
| @@ -1,10 +1,9 @@ | ||
| 1 | 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | 2 | ldflags-y += --wrap=ioremap_wc |
| 3 | 3 | ldflags-y += --wrap=memremap |
| 4 | −ldflags-y += --wrap=devm_ioremap_nocache | |
| 4 | +ldflags-y += --wrap=devm_ioremap | |
| 5 | 5 | ldflags-y += --wrap=devm_memremap |
| 6 | 6 | ldflags-y += --wrap=devm_memunmap |
| 7 | −ldflags-y += --wrap=ioremap_nocache | |
| 8 | 7 | ldflags-y += --wrap=ioremap |
| 9 | 8 | ldflags-y += --wrap=iounmap |
| 10 | 9 | ldflags-y += --wrap=memunmap |
| @@ -73,7 +73,7 @@ void __iomem *__nfit_test_ioremap(resource_size_t offset, unsigned long size, · 72 unmodified lines | ||
| 73 | 73 | return fallback_fn(offset, size); |
| 74 | 74 | } |
| 75 | 75 | |
| 76 | −void __iomem *__wrap_devm_ioremap_nocache(struct device *dev, | |
| 76 | +void __iomem *__wrap_devm_ioremap(struct device *dev, | |
| 77 | 77 | resource_size_t offset, unsigned long size) |
| 78 | 78 | { |
| 79 | 79 | struct nfit_test_resource *nfit_res = get_nfit_res(offset); |
| @@ -81,9 +81,9 @@ void __iomem *__wrap_devm_ioremap_nocache(struct device *dev, · 1 unmodified line | ||
| 81 | 81 | if (nfit_res) |
| 82 | 82 | return (void __iomem *) nfit_res->buf + offset |
| 83 | 83 | - nfit_res->res.start; |
| 84 | − return devm_ioremap_nocache(dev, offset, size); | |
| 84 | + return devm_ioremap(dev, offset, size); | |
| 85 | 85 | } |
| 86 | −EXPORT_SYMBOL(__wrap_devm_ioremap_nocache); | |
| 86 | +EXPORT_SYMBOL(__wrap_devm_ioremap); | |
| 87 | 87 | |
| 88 | 88 | void *__wrap_devm_memremap(struct device *dev, resource_size_t offset, |
| 89 | 89 | size_t size, unsigned long flags) |
| @@ -187,12 +187,6 @@ void __wrap_devm_memunmap(struct device *dev, void *addr) · 97 unmodified lines | ||
| 187 | 187 | } |
| 188 | 188 | EXPORT_SYMBOL(__wrap_devm_memunmap); |
| 189 | 189 | |
| 190 | −void __iomem *__wrap_ioremap_nocache(resource_size_t offset, unsigned long size) | |
| 191 | −{ | |
| 192 | − return __nfit_test_ioremap(offset, size, ioremap_nocache); | |
| 193 | −} | |
| 194 | −EXPORT_SYMBOL(__wrap_ioremap_nocache); | |
| 195 | − | |
| 196 | 190 | void __iomem *__wrap_ioremap(resource_size_t offset, unsigned long size) |
| 197 | 191 | { |
| 198 | 192 | return __nfit_test_ioremap(offset, size, ioremap); |
| @@ -207,8 +207,6 @@ typedef struct nfit_test_resource *(*nfit_test_lookup_fn)(resource_size_t); · 206 unmodified lines | ||
| 207 | 207 | typedef union acpi_object *(*nfit_test_evaluate_dsm_fn)(acpi_handle handle, |
| 208 | 208 | const guid_t *guid, u64 rev, u64 func, |
| 209 | 209 | union acpi_object *argv4); |
| 210 | −void __iomem *__wrap_ioremap_nocache(resource_size_t offset, | |
| 211 | − unsigned long size); | |
| 212 | 210 | void __wrap_iounmap(volatile void __iomem *addr); |
| 213 | 211 | void nfit_test_setup(nfit_test_lookup_fn lookup, |
| 214 | 212 | nfit_test_evaluate_dsm_fn evaluate); |