History

Merge drm/drm-next into drm-misc-next

Kickstart 6.9 development cycle.

Maxime Ripard committed 2 years ago

Commit 4db102d2 parents aeb262c 661347611106 files · +524830 −240489Browse files

Unified · Split

3542 files
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  290. Documentation/devicetree/bindings/iio/pressure/honeywell,mprls0025pa.yaml +0 −2
  291. Documentation/devicetree/bindings/iio/temperature/melexis,mlx90632.yaml +17 −2
  292. Documentation/devicetree/bindings/iio/temperature/microchip,mcp9600.yaml +70 −0
  293. Documentation/devicetree/bindings/index.rst +1 −0
  294. Documentation/devicetree/bindings/input/adafruit,seesaw-gamepad.yaml +63 −0
  295. Documentation/devicetree/bindings/input/elan,ekth6915.yaml +3 −2
  296. Documentation/devicetree/bindings/input/gpio-keys.yaml +40 −1
  297. Documentation/devicetree/bindings/input/gpio-mouse.txt +0 −32
  298. Documentation/devicetree/bindings/input/gpio-mouse.yaml +68 −0
  299. Documentation/devicetree/bindings/input/iqs269a.yaml +97 −1
  300. Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml +1 −23
  301. Documentation/devicetree/bindings/input/microchip,cap11xx.yaml +77 −3
  302. Documentation/devicetree/bindings/input/sprd,sc27xx-vibrator.yaml +1 −18
  303. Documentation/devicetree/bindings/input/ti,drv2665.txt +0 −17
  304. Documentation/devicetree/bindings/input/ti,drv2667.txt +0 −17
  305. Documentation/devicetree/bindings/input/ti,drv266x.yaml +50 −0
  306. Documentation/devicetree/bindings/input/touchscreen/neonode,zforce.yaml +72 −0
  307. Documentation/devicetree/bindings/input/touchscreen/samsung,s6sy761.txt +0 −32
  308. Documentation/devicetree/bindings/input/touchscreen/samsung,s6sy761.yaml +54 −0
  309. Documentation/devicetree/bindings/input/touchscreen/zforce_ts.txt +0 −34
  310. Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml +4 −0
  311. Documentation/devicetree/bindings/interconnect/qcom,sm6115.yaml +152 −0
  312. Documentation/devicetree/bindings/interconnect/qcom,sm8650-rpmh.yaml +136 −0
  313. Documentation/devicetree/bindings/interconnect/qcom,x1e80100-rpmh.yaml +83 −0
  314. Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml +12 −6
  315. Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml +39 −17
  316. Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml +4 −0
  317. Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml +4 −1
  318. Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml +1 −0
  319. Documentation/devicetree/bindings/interrupt-controller/st,stih407-irq-syscfg.yaml +2 −2
  320. Documentation/devicetree/bindings/iommu/apple,dart.yaml +1 −0
  321. Documentation/devicetree/bindings/iommu/arm,smmu.yaml +74 −3
  322. Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml +8 −3
  323. Documentation/devicetree/bindings/leds/allwinner,sun50i-a100-ledc.yaml +137 −0
  324. Documentation/devicetree/bindings/leds/awinic,aw200xx.yaml +71 −24
  325. Documentation/devicetree/bindings/leds/backlight/mps,mp3309c.yaml +4 −6
  326. Documentation/devicetree/bindings/leds/common.yaml +1 −1
  327. Documentation/devicetree/bindings/leds/qcom,spmi-flash-led.yaml +3 −1
  328. Documentation/devicetree/bindings/loongarch/cpus.yaml +61 −0
  329. Documentation/devicetree/bindings/loongarch/loongson.yaml +34 −0
  330. Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml +43 −19
  331. Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml +1 −0
  332. Documentation/devicetree/bindings/mailbox/xlnx,zynqmp-ipi-mailbox.yaml +119 −13
  333. Documentation/devicetree/bindings/media/cnm,wave521c.yaml +61 −0
  334. Documentation/devicetree/bindings/media/i2c/alliedvision,alvium-csi2.yaml +81 −0
  335. Documentation/devicetree/bindings/media/i2c/asahi-kasei,ak7375.yaml +3 −1
  336. Documentation/devicetree/bindings/media/i2c/galaxycore,gc0308.yaml +108 −0
  337. Documentation/devicetree/bindings/media/i2c/galaxycore,gc2145.yaml +113 −0
  338. Documentation/devicetree/bindings/media/i2c/ov8856.yaml +11 −13
  339. Documentation/devicetree/bindings/media/i2c/ovti,ov64a40.yaml +103 −0
  340. Documentation/devicetree/bindings/media/i2c/sony,imx335.yaml +13 −0
  341. Documentation/devicetree/bindings/media/i2c/techwell,tw9900.yaml +137 −0
  342. Documentation/devicetree/bindings/media/i2c/thine,thp7312.yaml +224 −0
  343. Documentation/devicetree/bindings/media/mediatek,mdp3-fg.yaml +61 −0
  344. Documentation/devicetree/bindings/media/mediatek,mdp3-hdr.yaml +61 −0
  345. Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml +88 −16
  346. Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml +5 −1
  347. Documentation/devicetree/bindings/media/mediatek,mdp3-stitch.yaml +61 −0
  348. Documentation/devicetree/bindings/media/mediatek,mdp3-tcc.yaml +62 −0
  349. Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml +61 −0
  350. Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml +19 −10
  351. Documentation/devicetree/bindings/media/rockchip-isp1.yaml +6 −5
  352. Documentation/devicetree/bindings/media/samsung,s5p-mfc.yaml +29 −18
  353. Documentation/devicetree/bindings/media/st,stm32-dcmipp.yaml +89 −0
  354. Documentation/devicetree/bindings/media/starfive,jh7110-camss.yaml +180 −0
  355. Documentation/devicetree/bindings/mfd/ams,as3711.yaml +223 −0
  356. Documentation/devicetree/bindings/mfd/as3711.txt +0 −73
  357. Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml +68 −72
  358. Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml +4 −2
  359. Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml +7 −0
  360. Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml +2 −0
  361. Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.yaml +1 −1
  362. Documentation/devicetree/bindings/mfd/sprd,ums512-glbreg.yaml +3 −1
  363. Documentation/devicetree/bindings/mfd/ti,am3359-tscadc.yaml +0 −2
  364. Documentation/devicetree/bindings/misc/fsl,dpaa2-console.yaml +1 −1
  365. Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml +4 −4
  366. Documentation/devicetree/bindings/mmc/arm,pl18x.yaml +1 −1
  367. Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml +1 −3
  368. Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml +3 −1
  369. Documentation/devicetree/bindings/mmc/mtk-sd.yaml +9 −0
  370. Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml +1 −1
  371. Documentation/devicetree/bindings/mmc/samsung,exynos-dw-mshc.yaml +16 −9
  372. Documentation/devicetree/bindings/mmc/sdhci-msm.yaml +2 −0
  373. Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml +2 −2
  374. Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml +1 −0
  375. Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml +4 −0
  376. Documentation/devicetree/bindings/mtd/partitions/u-boot.yaml +1 −1
  377. Documentation/devicetree/bindings/net/dsa/dsa.yaml +6 −0
  378. Documentation/devicetree/bindings/net/dsa/marvell,mv88e6060.yaml +88 −0
  379. Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml +337 −0
  380. Documentation/devicetree/bindings/net/dsa/marvell.txt +0 −109
  381. Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml +33 −1
  382. Documentation/devicetree/bindings/net/ethernet-switch.yaml +20 −3
  383. Documentation/devicetree/bindings/net/lantiq,pef2256.yaml +213 −0
  384. Documentation/devicetree/bindings/net/marvell,aquantia.yaml +116 −0
  385. Documentation/devicetree/bindings/net/marvell,mvusb.yaml +5 −2
  386. Documentation/devicetree/bindings/net/marvell,orion-mdio.yaml +0 −22
  387. Documentation/devicetree/bindings/net/pcs/mediatek,sgmiisys.yaml +56 −9
  388. Documentation/devicetree/bindings/net/qcom,ipa.yaml +15 −9
  389. Documentation/devicetree/bindings/net/renesas,etheravb.yaml +2 −1
  390. Documentation/devicetree/bindings/net/renesas,ethertsn.yaml +133 −0
  391. Documentation/devicetree/bindings/net/sff,sfp.yaml +1 −1
  392. Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml +16 −0
  393. Documentation/devicetree/bindings/nvmem/mxs-ocotp.yaml +6 −4
  394. Documentation/devicetree/bindings/nvmem/st,stm32-romem.yaml +1 −0
  395. Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml +18 −0
  396. Documentation/devicetree/bindings/pci/qcom,pcie.yaml +60 −3
  397. Documentation/devicetree/bindings/pci/rcar-pci-host.yaml +11 −0
  398. Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml +2 −0
  399. Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml +36 −3
  400. Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml +36 −3
  401. Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml +1 −1
  402. Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml +3 −0
  403. Documentation/devicetree/bindings/perf/riscv,pmu.yaml +1 −1
  404. Documentation/devicetree/bindings/phy/amlogic,g12a-mipi-dphy-analog.yaml +0 −12
  405. Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml +0 −17
  406. Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml +1 −0
  407. Documentation/devicetree/bindings/phy/mediatek,tphy.yaml +9 −0
  408. Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml +5 −0
  409. Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml +2 −0
  410. Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml +3 −0
  411. Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml +6 −2
  412. Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml +2 −0
  413. Documentation/devicetree/bindings/pinctrl/nxp,s32g2-siul2-pinctrl.yaml +1 −1
  414. Documentation/devicetree/bindings/pinctrl/pinctrl-single.yaml +1 −0
  415. Documentation/devicetree/bindings/pinctrl/qcom,ipq5018-tlmm.yaml +4 −8
  416. Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-tlmm.yaml +1 −8
  417. Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml +1 −7
  418. Documentation/devicetree/bindings/pinctrl/qcom,ipq8074-pinctrl.yaml +1 −8
  419. Documentation/devicetree/bindings/pinctrl/qcom,ipq9574-tlmm.yaml +1 −8
  420. Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-common.yaml +75 −0
  421. Documentation/devicetree/bindings/pinctrl/qcom,mdm9607-tlmm.yaml +6 −12
  422. Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.yaml +6 −12
  423. Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml +1 −7
  424. Documentation/devicetree/bindings/pinctrl/qcom,msm8660-pinctrl.yaml +1 −8
  425. Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml +6 −12
  426. Documentation/devicetree/bindings/pinctrl/qcom,msm8916-pinctrl.yaml +1 −8
  427. Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml +1 −6
  428. Documentation/devicetree/bindings/pinctrl/qcom,msm8960-pinctrl.yaml +1 −8
  429. Documentation/devicetree/bindings/pinctrl/qcom,msm8974-pinctrl.yaml +1 −8
  430. Documentation/devicetree/bindings/pinctrl/qcom,msm8976-pinctrl.yaml +1 −8
  431. Documentation/devicetree/bindings/pinctrl/qcom,msm8994-pinctrl.yaml +1 −8
  432. Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.yaml +1 −8
  433. Documentation/devicetree/bindings/pinctrl/qcom,msm8998-pinctrl.yaml +1 −8
  434. Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.yaml +34 −28
  435. Documentation/devicetree/bindings/pinctrl/qcom,qcm2290-tlmm.yaml +1 −8
  436. Documentation/devicetree/bindings/pinctrl/qcom,qcs404-pinctrl.yaml +1 −8
  437. Documentation/devicetree/bindings/pinctrl/qcom,qdu1000-tlmm.yaml +3 −9
  438. Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-tlmm.yaml +8 −13
  439. Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml +1 −8
  440. Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml +6 −43
  441. Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml +2 −28
  442. Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-tlmm.yaml +7 −13
  443. Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml +4 −45
  444. Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-tlmm.yaml +6 −12
  445. Documentation/devicetree/bindings/pinctrl/qcom,sdm630-pinctrl.yaml +1 −9
  446. Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml +6 −13
  447. Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml +1 −9
  448. Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml +1 −7
  449. Documentation/devicetree/bindings/pinctrl/qcom,sdx65-tlmm.yaml +1 −7
  450. Documentation/devicetree/bindings/pinctrl/qcom,sdx75-tlmm.yaml +3 −9
  451. Documentation/devicetree/bindings/pinctrl/qcom,sm4450-tlmm.yaml +151 −0
  452. Documentation/devicetree/bindings/pinctrl/qcom,sm6115-lpass-lpi-pinctrl.yaml +4 −44
  453. Documentation/devicetree/bindings/pinctrl/qcom,sm6115-tlmm.yaml +1 −7
  454. Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml +7 −13
  455. Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml +6 −14
  456. Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml +6 −12
  457. Documentation/devicetree/bindings/pinctrl/qcom,sm7150-tlmm.yaml +1 −8
  458. Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml +1 −8
  459. Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml +4 −45
  460. Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml +1 −8
  461. Documentation/devicetree/bindings/pinctrl/qcom,sm8350-lpass-lpi-pinctrl.yaml +4 −45
  462. Documentation/devicetree/bindings/pinctrl/qcom,sm8350-tlmm.yaml +6 −14
  463. Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml +4 −45
  464. Documentation/devicetree/bindings/pinctrl/qcom,sm8450-tlmm.yaml +6 −14
  465. Documentation/devicetree/bindings/pinctrl/qcom,sm8550-lpass-lpi-pinctrl.yaml +9 −46
  466. Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml +3 −9
  467. Documentation/devicetree/bindings/pinctrl/qcom,sm8650-lpass-lpi-pinctrl.yaml +107 −0
  468. Documentation/devicetree/bindings/pinctrl/qcom,sm8650-tlmm.yaml +141 −0
  469. Documentation/devicetree/bindings/pinctrl/qcom,x1e80100-tlmm.yaml +137 −0
  470. Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml +1 −1
  471. Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml +3 −3
  472. Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml +30 −15
  473. Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml +4 −1
  474. Documentation/devicetree/bindings/pinctrl/xlnx,zynq-pinctrl.yaml +1 −1
  475. Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml +1 −1
  476. Documentation/devicetree/bindings/power/fsl,scu-pd.yaml +1 −0
  477. Documentation/devicetree/bindings/power/qcom,rpmpd.yaml +1 −1
  478. Documentation/devicetree/bindings/power/reset/nvmem-reboot-mode.yaml +3 −5
  479. Documentation/devicetree/bindings/power/reset/qcom,pon.yaml +8 −5
  480. Documentation/devicetree/bindings/power/reset/syscon-reboot-mode.yaml +3 −5
  481. Documentation/devicetree/bindings/power/reset/xlnx,zynqmp-power.yaml +2 −2
  482. Documentation/devicetree/bindings/power/supply/bq24190.yaml +1 −0
  483. Documentation/devicetree/bindings/power/supply/richtek,rt9455.yaml +4 −4
  484. Documentation/devicetree/bindings/power/wakeup-source.txt +11 −7
  485. Documentation/devicetree/bindings/pwm/imx-pwm.yaml +4 −6
  486. Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml +0 −1
  487. Documentation/devicetree/bindings/pwm/pwm-omap-dmtimer.txt +0 −22
  488. Documentation/devicetree/bindings/pwm/pwm-samsung.yaml +4 −0
  489. Documentation/devicetree/bindings/pwm/ti,omap-dmtimer-pwm.yaml +59 −0
  490. Documentation/devicetree/bindings/regulator/fixed-regulator.yaml +2 −0
  491. Documentation/devicetree/bindings/regulator/mps,mp5416.yaml +2 −2
  492. Documentation/devicetree/bindings/regulator/mps,mpq7920.yaml +2 −2
  493. Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml +14 −0
  494. Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml +4 −0
  495. Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.yaml +19 −0
  496. Documentation/devicetree/bindings/regulator/qcom,usb-vbus-regulator.yaml +3 −2
  497. Documentation/devicetree/bindings/regulator/regulator.yaml +13 −0
  498. Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml +4 −4
  499. Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml +21 −0
  500. Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml +1 −0
  501. Documentation/devicetree/bindings/reset/fsl,imx-src.yaml +10 −21
  502. Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.yaml +1 −24
  503. Documentation/devicetree/bindings/reset/qcom,aoss-reset.yaml +5 −5
  504. Documentation/devicetree/bindings/reset/qcom,pdc-global.yaml +4 −4
  505. Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml +1 −1
  506. Documentation/devicetree/bindings/riscv/cpus.yaml +8 −2
  507. Documentation/devicetree/bindings/riscv/extensions.yaml +220 −1
  508. Documentation/devicetree/bindings/riscv/sophgo.yaml +4 −0
  509. Documentation/devicetree/bindings/rng/starfive,jh7110-trng.yaml +5 −1
  510. Documentation/devicetree/bindings/rtc/adi,max31335.yaml +70 −0
  511. Documentation/devicetree/bindings/rtc/epson,rx8900.yaml +2 −0
  512. Documentation/devicetree/bindings/rtc/nuvoton,ma35d1-rtc.yaml +48 −0
  513. Documentation/devicetree/bindings/rtc/qcom-pm8xxx-rtc.yaml +18 −18
  514. Documentation/devicetree/bindings/rtc/s3c-rtc.yaml +5 −0
  515. Documentation/devicetree/bindings/security/tpm/google,cr50.txt +0 −19
  516. Documentation/devicetree/bindings/security/tpm/ibmvtpm.txt +0 −41
  517. Documentation/devicetree/bindings/security/tpm/st33zp24-i2c.txt +0 −34
  518. Documentation/devicetree/bindings/security/tpm/st33zp24-spi.txt +0 −32
  519. Documentation/devicetree/bindings/security/tpm/tpm-i2c.txt +0 −26
  520. Documentation/devicetree/bindings/security/tpm/tpm_tis_mmio.txt +0 −25
  521. Documentation/devicetree/bindings/security/tpm/tpm_tis_spi.txt +0 −23
  522. Documentation/devicetree/bindings/serial/arm,dcc.yaml +30 −0
  523. Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.yaml +1 −1
  524. Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml +24 −5
  525. Documentation/devicetree/bindings/serial/qcom,msm-uartdm.yaml +13 −0
  526. Documentation/devicetree/bindings/serial/renesas,sci.yaml +1 −1
  527. Documentation/devicetree/bindings/serial/samsung_uart.yaml +25 −3
  528. Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml +1 −0
  529. Documentation/devicetree/bindings/serial/sprd-uart.yaml +1 −0
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  844. Documentation/translations/zh_TW/filesystems/virtiofs.rst +1 −1
  845. Documentation/translations/zh_TW/gpio.txt +4 −4
  846. Documentation/translations/zh_TW/index.rst +1 −1
  847. Documentation/translations/zh_TW/io_ordering.txt +4 −4
  848. Documentation/translations/zh_TW/process/1.Intro.rst +1 −1
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  850. Documentation/translations/zh_TW/process/3.Early-stage.rst +1 −1
  851. Documentation/translations/zh_TW/process/4.Coding.rst +1 −1
  852. Documentation/translations/zh_TW/process/5.Posting.rst +1 −1
  853. Documentation/translations/zh_TW/process/6.Followthrough.rst +1 −1
  854. Documentation/translations/zh_TW/process/7.AdvancedTopics.rst +1 −1
  855. Documentation/translations/zh_TW/process/8.Conclusion.rst +1 −1
  856. Documentation/translations/zh_TW/process/code-of-conduct-interpretation.rst +1 −1
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  858. Documentation/translations/zh_TW/process/coding-style.rst +1 −1
  859. Documentation/translations/zh_TW/process/development-process.rst +3 −3
  860. Documentation/translations/zh_TW/process/email-clients.rst +1 −1
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  862. Documentation/translations/zh_TW/process/howto.rst +1 −1
  863. Documentation/translations/zh_TW/process/index.rst +1 −1
  864. Documentation/translations/zh_TW/process/kernel-driver-statement.rst +1 −1
  865. Documentation/translations/zh_TW/process/kernel-enforcement-statement.rst +1 −1
  866. Documentation/translations/zh_TW/process/license-rules.rst +1 −1
  867. Documentation/translations/zh_TW/process/magic-number.rst +1 −1
  868. Documentation/translations/zh_TW/process/management-style.rst +1 −1
  869. Documentation/translations/zh_TW/process/programming-language.rst +1 −1
  870. Documentation/translations/zh_TW/process/stable-api-nonsense.rst +1 −1
  871. Documentation/translations/zh_TW/process/stable-kernel-rules.rst +1 −1
  872. Documentation/translations/zh_TW/process/submit-checklist.rst +2 −3
  873. Documentation/translations/zh_TW/process/submitting-patches.rst +1 −1
  874. Documentation/translations/zh_TW/process/volatile-considered-harmful.rst +1 −1
  875. Documentation/usb/gadget-testing.rst +11 −9
  876. Documentation/usb/raw-gadget.rst +0 −3
  877. Documentation/userspace-api/dcdbas.rst +0 −0
  878. Documentation/userspace-api/index.rst +5 −4
  879. Documentation/userspace-api/ioctl/ioctl-number.rst +4 −1
  880. Documentation/userspace-api/isapnp.rst +4 −4
  881. Documentation/userspace-api/lsm.rst +73 −0
  882. Documentation/userspace-api/media/cec/cec-api.rst +1 −6
  883. Documentation/userspace-api/media/drivers/index.rst +2 −6
  884. Documentation/userspace-api/media/drivers/thp7312.rst +39 −0
  885. Documentation/userspace-api/media/dvb/dvbapi.rst +1 −6
  886. Documentation/userspace-api/media/index.rst +1 −6
  887. Documentation/userspace-api/media/mediactl/media-controller.rst +1 −6
  888. Documentation/userspace-api/media/rc/remote_controllers.rst +1 −6
  889. Documentation/userspace-api/media/v4l/v4l2.rst +1 −6
  890. Documentation/userspace-api/media/v4l/vidioc-create-bufs.rst +6 −2
  891. Documentation/userspace-api/media/v4l/vidioc-g-ext-ctrls.rst +8 −0
  892. Documentation/userspace-api/media/v4l/vidioc-reqbufs.rst +1 −0
  893. Documentation/userspace-api/media/v4l/vidioc-subdev-enum-frame-interval.rst +4 −5
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  896. Documentation/userspace-api/media/v4l/vidioc-subdev-g-client-cap.rst +5 −0
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  899. Documentation/userspace-api/media/v4l/vidioc-subdev-g-frame-interval.rst +12 −8
  900. Documentation/userspace-api/media/v4l/vidioc-subdev-g-routing.rst +4 −3
  901. Documentation/userspace-api/media/v4l/vidioc-subdev-g-selection.rst +3 −4
  902. Documentation/userspace-api/netlink/index.rst +3 −1
  903. Documentation/userspace-api/netlink/intro.rst +4 −0
  904. Documentation/userspace-api/netlink/netlink-raw.rst +95 −1
  905. Documentation/userspace-api/netlink/specs.rst +1 −1
  906. Documentation/userspace-api/tee.rst +39 −0
  907. Documentation/virt/kvm/api.rst +207 −12
  908. Documentation/virt/kvm/locking.rst +3 −4
  909. MAINTAINERS +558 −380
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  911. arch/Kconfig +11 −11
  912. arch/alpha/include/asm/io.h +0 −7
  913. arch/alpha/include/asm/mmu_context.h +2 −0
  914. arch/alpha/kernel/asm-offsets.c +1 −1
  915. arch/alpha/kernel/rtc.c +1 −1
  916. arch/alpha/kernel/srmcons.c +15 −19
  917. arch/alpha/kernel/syscalls/syscall.tbl +5 −0
  918. arch/alpha/kernel/traps.c +1 −0
  919. arch/alpha/lib/Makefile +0 −1
  920. arch/alpha/mm/Makefile +0 −2
  921. arch/arc/Kconfig +0 −5
  922. arch/arc/include/asm/cacheflush.h +1 −43
  923. arch/arc/include/asm/entry-arcv2.h +32 −0
  924. arch/arc/include/asm/entry-compact.h +86 −1
  925. arch/arc/include/asm/entry.h +4 −106
  926. arch/arc/include/asm/hugepage.h +7 −0
  927. arch/arc/include/asm/page.h +12 −9
  928. arch/arc/include/asm/pgtable-levels.h +1 −1
  929. arch/arc/include/asm/ptrace.h +8 −6
  930. arch/arc/kernel/setup.c +1 −3
  931. arch/arc/kernel/signal.c +3 −3
  932. arch/arc/mm/cache.c +6 −130
  933. arch/arc/mm/dma.c +1 −1
  934. arch/arc/mm/mmap.c +3 −18
  935. arch/arc/mm/tlb.c +5 −11
  936. arch/arm/Kconfig +3 −90
  937. arch/arm/Kconfig.debug +2 −9
  938. arch/arm/Kconfig.platforms +183 −0
  939. arch/arm/Makefile +0 −4
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  941. arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi +5 −0
  942. arch/arm/boot/dts/broadcom/bcm2711.dtsi +14 −0
  943. arch/arm/boot/dts/broadcom/bcm63138.dtsi +6 −0
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  945. arch/arm/boot/dts/intel/socfpga/socfpga.dtsi +1 −1
  946. arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi +1 −1
  947. arch/arm/boot/dts/intel/socfpga/socfpga_arria10_socdk_qspi.dts +0 −2
  948. arch/arm/boot/dts/intel/socfpga/socfpga_arria5_socdk.dts +0 −2
  949. arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_socdk.dts +0 −2
  950. arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_sockit.dts +0 −2
  951. arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_sodia.dts +0 −2
  952. arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_vining_fpga.dts +0 −4
  953. arch/arm/boot/dts/marvell/armada-370-rd.dts +12 −14
  954. arch/arm/boot/dts/marvell/armada-370-seagate-nas-2bay.dts +4 −4
  955. arch/arm/boot/dts/marvell/armada-370-seagate-nas-4bay.dts +4 −4
  956. arch/arm/boot/dts/marvell/armada-370-synology-ds213j.dts +8 −8
  957. arch/arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts +21 −23
  958. arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts +19 −19
  959. arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts +11 −11
  960. arch/arm/boot/dts/marvell/armada-385-linksys.dtsi +8 −10
  961. arch/arm/boot/dts/marvell/armada-385-synology-ds116.dts +8 −8
  962. arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts +9 −11
  963. arch/arm/boot/dts/marvell/armada-388-clearfog.dts +9 −11
  964. arch/arm/boot/dts/marvell/armada-388-gp.dts +2 −2
  965. arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts +8 −10
  966. arch/arm/boot/dts/marvell/kirkwood-dnskw.dtsi +3 −3
  967. arch/arm/boot/dts/marvell/kirkwood-linkstation-6282.dtsi +5 −4
  968. arch/arm/boot/dts/marvell/kirkwood-linkstation-lswxl.dts +5 −4
  969. arch/arm/boot/dts/marvell/kirkwood-lsxl.dtsi +5 −4
  970. arch/arm/boot/dts/marvell/kirkwood-ns2max.dts +9 −9
  971. arch/arm/boot/dts/marvell/kirkwood-ns2mini.dts +9 −9
  972. arch/arm/boot/dts/marvell/kirkwood-synology.dtsi +54 −48
  973. arch/arm/boot/dts/marvell/mvebu-linkstation-fan.dtsi +4 −4
  974. arch/arm/boot/dts/microchip/at91-sam9x60_curiosity.dts +3 −0
  975. arch/arm/boot/dts/microchip/at91-sam9x60ek.dts +3 −0
  976. arch/arm/boot/dts/microchip/at91-sama5d27_som1_ek.dts +0 −1
  977. arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1_ek.dts +0 −1
  978. arch/arm/boot/dts/nvidia/tegra20-colibri.dtsi +1 −1
  979. arch/arm/boot/dts/nxp/imx/imx1-ads.dts +1 −1
  980. arch/arm/boot/dts/nxp/imx/imx1-apf9328.dts +1 −1
  981. arch/arm/boot/dts/nxp/imx/imx1.dtsi +6 −3
  982. arch/arm/boot/dts/nxp/imx/imx25-eukrea-cpuimx25.dtsi +1 −1
  983. arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts +1 −1
  984. arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-dvi-svga.dts +1 −1
  985. arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-dvi-vga.dts +1 −1
  986. arch/arm/boot/dts/nxp/imx/imx25-pdk.dts +2 −1
  987. arch/arm/boot/dts/nxp/imx/imx25.dtsi +15 −26
  988. arch/arm/boot/dts/nxp/imx/imx27-apf27dev.dts +2 −2
  989. arch/arm/boot/dts/nxp/imx/imx27-eukrea-cpuimx27.dtsi +2 −2
  990. arch/arm/boot/dts/nxp/imx/imx27-eukrea-mbimxsd27-baseboard.dts +1 −1
  991. arch/arm/boot/dts/nxp/imx/imx27-pdk.dts +6 −12
  992. arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-rdk.dts +1 −1
  993. arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-rdk.dts +7 −10
  994. arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-som.dtsi +11 −17
  995. arch/arm/boot/dts/nxp/imx/imx27.dtsi +5 −2
  996. arch/arm/boot/dts/nxp/imx/imx53-cx9020.dts +1 −1
  997. arch/arm/boot/dts/nxp/imx/imx6dl-b105pv2.dts +1 −1
  998. arch/arm/boot/dts/nxp/imx/imx6dl-b105v2.dts +1 −1
  999. arch/arm/boot/dts/nxp/imx/imx6dl-b125pv2.dts +1 −1
  1000. arch/arm/boot/dts/nxp/imx/imx6dl-b125v2.dts +1 −1
  1001. arch/arm/boot/dts/nxp/imx/imx6dl-b155v2.dts +1 −1
  1002. arch/arm/boot/dts/nxp/imx/imx6q-apalis-ixora-v1.2.dts +2 −0
  1003. arch/arm/boot/dts/nxp/imx/imx6q-skov-reve-mi1010ait-1cp1.dts +2 −2
  1004. arch/arm/boot/dts/nxp/imx/imx6q-var-mx6customboard.dts +2 −2
  1005. arch/arm/boot/dts/nxp/imx/imx6qdl-apalis.dtsi +8 −1
  1006. arch/arm/boot/dts/nxp/imx/imx6qdl-colibri.dtsi +7 −0
  1007. arch/arm/boot/dts/nxp/imx/imx6qdl-emcon-avari.dtsi +1 −1
  1008. arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi +3 −3
  1009. arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu-revc.dtsi +1 −1
  1010. arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi +1 −1
  1011. arch/arm/boot/dts/nxp/imx/imx6sx.dtsi +4 −4
  1012. arch/arm/boot/dts/nxp/imx/imx6ul-pico.dtsi +2 −0
  1013. arch/arm/boot/dts/nxp/imx/imx6ul.dtsi +1 −1
  1014. arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi +7 −2
  1015. arch/arm/boot/dts/nxp/imx/imx7d-colibri-emmc.dtsi +4 −0
  1016. arch/arm/boot/dts/nxp/imx/imx7d-meerkat96.dts +1 −1
  1017. arch/arm/boot/dts/nxp/imx/imx7d-pico.dtsi +8 −0
  1018. arch/arm/boot/dts/nxp/imx/imx7d-smegw01.dts +1 −1
  1019. arch/arm/boot/dts/nxp/imx/imx7d.dtsi +0 −3
  1020. arch/arm/boot/dts/nxp/imx/imx7s.dtsi +75 −7
  1021. arch/arm/boot/dts/nxp/imx/mba6ulx.dtsi +1 −1
  1022. arch/arm/boot/dts/nxp/lpc/lpc18xx.dtsi +1 −1
  1023. arch/arm/boot/dts/nxp/ls/ls1021a.dtsi +1 −1
  1024. arch/arm/boot/dts/nxp/mxs/imx23-sansa.dts +4 −8
  1025. arch/arm/boot/dts/nxp/mxs/imx23.dtsi +5 −5
  1026. arch/arm/boot/dts/nxp/mxs/imx28-lwe.dtsi +1 −0
  1027. arch/arm/boot/dts/nxp/mxs/imx28-tx28.dts +1 −0
  1028. arch/arm/boot/dts/nxp/mxs/imx28-xea.dts +1 −0
  1029. arch/arm/boot/dts/nxp/mxs/imx28.dtsi +7 −7
  1030. arch/arm/boot/dts/nxp/vf/vf-colibri-eval-v3.dtsi +1 −1
  1031. arch/arm/boot/dts/nxp/vf/vf610-bk4.dts +2 −2
  1032. arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts +7 −7
  1033. arch/arm/boot/dts/nxp/vf/vf610-zii-dev-rev-b.dts +3 −3
  1034. arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts +35 −35
  1035. arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts +9 −9
  1036. arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts +10 −10
  1037. arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts +9 −9
  1038. arch/arm/boot/dts/qcom/Makefile +7 −0
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  1040. arch/arm/boot/dts/qcom/pm8058.dtsi +159 −0
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  1042. arch/arm/boot/dts/qcom/pm8821.dtsi +22 −0
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  1044. arch/arm/boot/dts/qcom/pm8921.dtsi +137 −0
  1045. arch/arm/boot/dts/qcom/pm8941.dtsi +2 −0
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  1050. arch/arm/boot/dts/qcom/qcom-apq8026-huawei-sturgeon.dts +3 −1
  1051. arch/arm/boot/dts/qcom/qcom-apq8026-lg-lenok.dts +3 −1
  1052. arch/arm/boot/dts/qcom/qcom-apq8026-samsung-matisse-wifi.dts +1 −1
  1053. arch/arm/boot/dts/qcom/qcom-apq8060-dragonboard.dts +108 −56
  1054. arch/arm/boot/dts/qcom/qcom-apq8064-asus-nexus7-flo.dts +43 −27
  1055. arch/arm/boot/dts/qcom/qcom-apq8064-cm-qs600.dts +23 −12
  1056. arch/arm/boot/dts/qcom/qcom-apq8064-ifc6410.dts +29 −13
  1057. arch/arm/boot/dts/qcom/qcom-apq8064-sony-xperia-lagan-yuga.dts +69 −42
  1058. arch/arm/boot/dts/qcom/qcom-apq8064.dtsi +3 −200
  1059. arch/arm/boot/dts/qcom/qcom-apq8074-dragonboard.dts +33 −2
  1060. arch/arm/boot/dts/qcom/qcom-apq8084-ifc6540.dts +1 −1
  1061. arch/arm/boot/dts/qcom/qcom-apq8084-mtp.dts +1 −1
  1062. arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk04.1.dtsi +1 −1
  1063. arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi +2 −2
  1064. arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi +4 −4
  1065. arch/arm/boot/dts/qcom/qcom-mdm9615-wp8548-mangoh-green.dts +2 −2
  1066. arch/arm/boot/dts/qcom/qcom-mdm9615-wp8548.dtsi +142 −1
  1067. arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi +1 −182
  1068. arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-common.dtsi +327 −0
  1069. arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-dempsey.dts +17 −0
  1070. arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-makepeace.dts +17 −0
  1071. arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-moneypenny.dts +23 −0
  1072. arch/arm/boot/dts/qcom/qcom-msm8226.dtsi +44 −4
  1073. arch/arm/boot/dts/qcom/qcom-msm8660-surf.dts +37 −24
  1074. arch/arm/boot/dts/qcom/qcom-msm8660.dtsi +1 −216
  1075. arch/arm/boot/dts/qcom/qcom-msm8926-htc-memul.dts +372 −0
  1076. arch/arm/boot/dts/qcom/qcom-msm8926-microsoft-superman-lte.dts +53 −0
  1077. arch/arm/boot/dts/qcom/qcom-msm8926-microsoft-tesla.dts +67 −0
  1078. arch/arm/boot/dts/qcom/qcom-msm8926-motorola-peregrine.dts +291 −0
  1079. arch/arm/boot/dts/qcom/qcom-msm8960-cdp.dts +16 −11
  1080. arch/arm/boot/dts/qcom/qcom-msm8960-samsung-expressatt.dts +6 −1
  1081. arch/arm/boot/dts/qcom/qcom-msm8960.dtsi +1 −44
  1082. arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts +31 −2
  1083. arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine.dtsi +33 −2
  1084. arch/arm/boot/dts/qcom/qcom-msm8974.dtsi +48 −74
  1085. arch/arm/boot/dts/qcom/qcom-msm8974pro-fairphone-fp2.dts +31 −2
  1086. arch/arm/boot/dts/qcom/qcom-msm8974pro-oneplus-bacon.dts +33 −2
  1087. arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-klte.dts +10 −3
  1088. arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-castor.dts +33 −2
  1089. arch/arm/boot/dts/qcom/qcom-sdx55-mtp.dts +1 −1
  1090. arch/arm/boot/dts/qcom/qcom-sdx55-t55.dts +1 −1
  1091. arch/arm/boot/dts/qcom/qcom-sdx55-telit-fn980-tlb.dts +1 −1
  1092. arch/arm/boot/dts/qcom/qcom-sdx55.dtsi +25 −30
  1093. arch/arm/boot/dts/qcom/qcom-sdx65-mtp.dts +1 −1
  1094. arch/arm/boot/dts/qcom/qcom-sdx65.dtsi +27 −24
  1095. arch/arm/boot/dts/renesas/iwg20d-q7-dbcm-ca.dtsi +15 −0
  1096. arch/arm/boot/dts/renesas/r8a7740-armadillo800eva.dts +26 −2
  1097. arch/arm/boot/dts/renesas/r8a7740.dtsi +65 −0
  1098. arch/arm/boot/dts/renesas/r8a7745-iwg22d-sodimm-dbhd-ca.dts +15 −0
  1099. arch/arm/boot/dts/renesas/r8a7745-iwg22d-sodimm.dts +2 −2
  1100. arch/arm/boot/dts/renesas/r8a7779-marzen.dts +41 −7
  1101. arch/arm/boot/dts/renesas/r8a7790-lager.dts +19 −4
  1102. arch/arm/boot/dts/renesas/r8a7790-stout.dts +15 −0
  1103. arch/arm/boot/dts/renesas/r8a7791-koelsch.dts +27 −3
  1104. arch/arm/boot/dts/renesas/r8a7791-porter.dts +25 −1
  1105. arch/arm/boot/dts/renesas/r8a7792-blanche.dts +49 −0
  1106. arch/arm/boot/dts/renesas/r8a7792-wheat.dts +21 −0
  1107. arch/arm/boot/dts/renesas/r8a7793-gose.dts +26 −2
  1108. arch/arm/boot/dts/renesas/r8a7794-alt.dts +2 −2
  1109. arch/arm/boot/dts/renesas/r8a7794-silk.dts +16 −1
  1110. arch/arm/boot/dts/renesas/r9a06g032.dtsi +1 −1
  1111. arch/arm/boot/dts/rockchip/Makefile +3 −0
  1112. arch/arm/boot/dts/rockchip/rk3036-kylin.dts +21 −0
  1113. arch/arm/boot/dts/rockchip/rk3036.dtsi +14 −4
  1114. arch/arm/boot/dts/rockchip/rk3066a.dtsi +5 −0
  1115. arch/arm/boot/dts/rockchip/rk3128-evb.dts +0 −5
  1116. arch/arm/boot/dts/rockchip/rk3128-xpi-3128.dts +425 −0
  1117. arch/arm/boot/dts/rockchip/rk3128.dtsi +186 −1
  1118. arch/arm/boot/dts/rockchip/rk322x.dtsi +7 −3
  1119. arch/arm/boot/dts/rockchip/rk3288.dtsi +9 −0
  1120. arch/arm/boot/dts/rockchip/rk3xxx.dtsi +4 −0
  1121. arch/arm/boot/dts/rockchip/rv1109-sonoff-ihost.dts +21 −0
  1122. arch/arm/boot/dts/rockchip/rv1109.dtsi +23 −0
  1123. arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2-io.dts +1 −1
  1124. arch/arm/boot/dts/rockchip/rv1126-pinctrl.dtsi +59 −13
  1125. arch/arm/boot/dts/rockchip/rv1126-sonoff-ihost.dts +29 −0
  1126. arch/arm/boot/dts/rockchip/rv1126-sonoff-ihost.dtsi +404 −0
  1127. arch/arm/boot/dts/rockchip/rv1126.dtsi +21 −0
  1128. arch/arm/boot/dts/samsung/exynos4.dtsi +13 −13
  1129. arch/arm/boot/dts/samsung/exynos4210-i9100.dts +47 −1
  1130. arch/arm/boot/dts/samsung/exynos4x12.dtsi +10 −12
  1131. arch/arm/boot/dts/samsung/s5pv210.dtsi +9 −9
  1132. arch/arm/boot/dts/st/ste-dbx5x0.dtsi +9 −9
  1133. arch/arm/boot/dts/st/ste-href-ab8500.dtsi +48 −0
  1134. arch/arm/boot/dts/st/ste-href-ab8505.dtsi +490 −0
  1135. arch/arm/boot/dts/st/ste-href.dtsi +0 −55
  1136. arch/arm/boot/dts/st/ste-href520-tvk.dts +1 −0
  1137. arch/arm/boot/dts/st/ste-hrefprev60-stuib.dts +1 −0
  1138. arch/arm/boot/dts/st/ste-hrefprev60-tvk.dts +1 −0
  1139. arch/arm/boot/dts/st/ste-hrefprev60.dtsi +1 −1
  1140. arch/arm/boot/dts/st/ste-hrefv60plus-stuib.dts +1 −0
  1141. arch/arm/boot/dts/st/ste-hrefv60plus-tvk.dts +1 −0
  1142. arch/arm/boot/dts/st/ste-hrefv60plus.dtsi +1 −2
  1143. arch/arm/boot/dts/st/ste-nomadik-stn8815.dtsi +4 −4
  1144. arch/arm/boot/dts/st/ste-snowball.dts +1 −1
  1145. arch/arm/boot/dts/st/ste-ux500-samsung-codina-tmo.dts +1 −1
  1146. arch/arm/boot/dts/st/ste-ux500-samsung-codina.dts +1 −1
  1147. arch/arm/boot/dts/st/ste-ux500-samsung-gavini.dts +1 −1
  1148. arch/arm/boot/dts/st/ste-ux500-samsung-janice.dts +1 −1
  1149. arch/arm/boot/dts/st/ste-ux500-samsung-kyle.dts +1 −1
  1150. arch/arm/boot/dts/st/stm32f469-disco.dts +4 −11
  1151. arch/arm/boot/dts/st/stm32f746.dtsi +61 −0
  1152. arch/arm/boot/dts/st/stm32mp135.dtsi +11 −0
  1153. arch/arm/boot/dts/st/stm32mp151.dtsi +4 −0
  1154. arch/arm/boot/dts/st/stm32mp151a-prtt1l.dtsi +0 −2
  1155. arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts +2 −2
  1156. arch/arm/boot/dts/st/stm32mp157a-stinger96.dtsi +0 −2
  1157. arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts +2 −2
  1158. arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts +2 −2
  1159. arch/arm/boot/dts/st/stm32mp157c-emstamp-argon.dtsi +0 −4
  1160. arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts +2 −3
  1161. arch/arm/boot/dts/st/stm32mp157c-ev1.dts +0 −1
  1162. arch/arm/boot/dts/st/stm32mp157c-osd32mp1-red.dts +0 −4
  1163. arch/arm/boot/dts/st/stm32mp157c-phycore-stm32mp15-som.dtsi +0 −4
  1164. arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi +0 −3
  1165. arch/arm/boot/dts/st/stm32mp15xx-dhcom-drc02.dtsi +0 −1
  1166. arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi +0 −1
  1167. arch/arm/boot/dts/st/stm32mp15xx-dhcom-picoitx.dtsi +0 −2
  1168. arch/arm/boot/dts/st/stm32mp15xx-dhcor-avenger96.dtsi +0 −2
  1169. arch/arm/boot/dts/st/stm32mp15xx-dhcor-drc-compact.dtsi +0 −2
  1170. arch/arm/boot/dts/st/stm32mp15xx-dhcor-testbench.dtsi +0 −2
  1171. arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi +0 −1
  1172. arch/arm/boot/dts/ti/keystone/keystone-k2e-netcp.dtsi +3 −3
  1173. arch/arm/boot/dts/ti/keystone/keystone-k2g-evm.dts +1 −1
  1174. arch/arm/boot/dts/ti/keystone/keystone-k2g-netcp.dtsi +3 −3
  1175. arch/arm/boot/dts/ti/keystone/keystone-k2hk-evm.dts +1 −1
  1176. arch/arm/boot/dts/ti/keystone/keystone-k2hk-netcp.dtsi +3 −3
  1177. arch/arm/boot/dts/ti/keystone/keystone-k2l-netcp.dtsi +3 −3
  1178. arch/arm/boot/dts/ti/omap/Makefile +13 −1
  1179. arch/arm/boot/dts/ti/omap/am33xx.dtsi +1 −0
  1180. arch/arm/boot/dts/ti/omap/am571x-idk.dts +2 −2
  1181. arch/arm/boot/dts/ti/omap/am5729-beagleboneai.dts +1 −1
  1182. arch/arm/boot/dts/ti/omap/am572x-idk-common.dtsi +2 −2
  1183. arch/arm/boot/dts/ti/omap/dra7-evm-common.dtsi +2 −2
  1184. arch/arm/boot/dts/ti/omap/dra7.dtsi +1 −1
  1185. arch/arm/boot/dts/ti/omap/dra71-evm.dts +2 −2
  1186. arch/arm/boot/dts/ti/omap/dra72-evm-common.dtsi +2 −2
  1187. arch/arm/boot/dts/ti/omap/dra76-evm.dts +2 −2
  1188. arch/arm/boot/dts/ti/omap/logicpd-torpedo-37xx-devkit.dts +1 −1
  1189. arch/arm/boot/dts/ti/omap/motorola-mapphone-common.dtsi +0 −298
  1190. arch/arm/boot/dts/ti/omap/motorola-mapphone-handset.dtsi +234 −0
  1191. arch/arm/boot/dts/ti/omap/motorola-mapphone-mz607-mz617.dtsi +21 −0
  1192. arch/arm/boot/dts/ti/omap/motorola-mapphone-xt8xx.dtsi +75 −0
  1193. arch/arm/boot/dts/ti/omap/omap4-droid-bionic-xt875.dts +10 −1
  1194. arch/arm/boot/dts/ti/omap/omap4-droid4-xt894.dts +13 −6
  1195. arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts +14 −4
  1196. arch/arm/boot/dts/ti/omap/omap4-xyboard-mz609.dts +46 −0
  1197. arch/arm/boot/dts/ti/omap/omap4-xyboard-mz617.dts +17 −0
  1198. arch/arm/common/locomo.c +3 −1
  1199. arch/arm/configs/am200epdkit_defconfig +0 −2
  1200. arch/arm/configs/aspeed_g4_defconfig +2 −2
  1201. arch/arm/configs/aspeed_g5_defconfig +2 −2
  1202. arch/arm/configs/assabet_defconfig +0 −1
  1203. arch/arm/configs/at91_dt_defconfig +2 −2
  1204. arch/arm/configs/bcm2835_defconfig +2 −2
  1205. arch/arm/configs/clps711x_defconfig +0 −7
  1206. arch/arm/configs/collie_defconfig +1 −2
  1207. arch/arm/configs/davinci_all_defconfig +1 −1
  1208. arch/arm/configs/dove_defconfig +0 −2
  1209. arch/arm/configs/ep93xx_defconfig +1 −1
  1210. arch/arm/configs/footbridge_defconfig +0 −1
  1211. arch/arm/configs/gemini_defconfig +1 −1
  1212. arch/arm/configs/imx_v4_v5_defconfig +0 −5
  1213. arch/arm/configs/jornada720_defconfig +0 −2
  1214. arch/arm/configs/lpc32xx_defconfig +0 −2
  1215. arch/arm/configs/mmp2_defconfig +0 −2
  1216. arch/arm/configs/moxart_defconfig +2 −2
  1217. arch/arm/configs/multi_v4t_defconfig +1 −2
  1218. arch/arm/configs/multi_v5_defconfig +1 −1
  1219. arch/arm/configs/multi_v7_defconfig +18 −12
  1220. arch/arm/configs/mv78xx0_defconfig +0 −2
  1221. arch/arm/configs/mxs_defconfig +2 −1
  1222. arch/arm/configs/neponset_defconfig +0 −1
  1223. arch/arm/configs/netwinder_defconfig +0 −1
  1224. arch/arm/configs/omap1_defconfig +2 −4
  1225. arch/arm/configs/omap2plus_defconfig +5 −0
  1226. arch/arm/configs/pxa168_defconfig +0 −2
  1227. arch/arm/configs/pxa3xx_defconfig +0 −2
  1228. arch/arm/configs/pxa910_defconfig +0 −2
  1229. arch/arm/configs/pxa_defconfig +4 −5
  1230. arch/arm/configs/qcom_defconfig +5 −5
  1231. arch/arm/configs/realview_defconfig +2 −4
  1232. arch/arm/configs/rpc_defconfig +2 −3
  1233. arch/arm/configs/s3c6400_defconfig +0 −2
  1234. arch/arm/configs/s5pv210_defconfig +0 −2
  1235. arch/arm/configs/sama5_defconfig +1 −1
  1236. arch/arm/configs/sama7_defconfig +1 −3
  1237. arch/arm/configs/shmobile_defconfig +4 −2
  1238. arch/arm/configs/spitz_defconfig +0 −2
  1239. arch/arm/configs/stm32_defconfig +1 −1
  1240. arch/arm/configs/tegra_defconfig +2 −2
  1241. arch/arm/configs/vf610m4_defconfig +1 −1
  1242. arch/arm/include/asm/cacheflush.h +2 −0
  1243. arch/arm/include/asm/hardware/locomo.h +0 −2
  1244. arch/arm/include/asm/io.h +0 −6
  1245. arch/arm/include/asm/irq_work.h +0 −2
  1246. arch/arm/include/asm/kexec.h +0 −4
  1247. arch/arm/include/asm/pgtable.h +2 −0
  1248. arch/arm/include/asm/topology.h +1 −0
  1249. arch/arm/include/asm/vdso.h +0 −5
  1250. arch/arm/kernel/Makefile +1 −1
  1251. arch/arm/kernel/atags_proc.c +2 −2
  1252. arch/arm/kernel/perf_event_v6.c +4 −146
  1253. arch/arm/kernel/perf_event_v7.c +4 −46
  1254. arch/arm/kernel/perf_event_xscale.c +8 −36
  1255. arch/arm/mach-airoha/airoha.c +0 −16
  1256. arch/arm/mach-asm9260/Kconfig +0 −9
  1257. arch/arm/mach-at91/pm.c +3 −0
  1258. arch/arm/mach-davinci/Kconfig +2 −0
  1259. arch/arm/mach-ep93xx/edb93xx.c +28 −4
  1260. arch/arm/mach-ep93xx/vision_ep9307.c +11 −1
  1261. arch/arm/mach-imx/mmdc.c +10 −6
  1262. arch/arm/mach-moxart/Kconfig +0 −28
  1263. arch/arm/mach-moxart/Makefile +0 −4
  1264. arch/arm/mach-moxart/moxart.c +0 −6
  1265. arch/arm/mach-mxs/mach-mxs.c +3 −1
  1266. arch/arm/mach-nspire/Kconfig +0 −15
  1267. arch/arm/mach-nspire/nspire.c +0 −18
  1268. arch/arm/mach-omap2/id.c +5 −0
  1269. arch/arm/mach-rda/Kconfig +0 −8
  1270. arch/arm/mach-s3c/mach-crag6410-module.c +48 −12
  1271. arch/arm/mach-s3c/mach-crag6410.c +12 −12
  1272. arch/arm/mach-sunplus/Kconfig +0 −27
  1273. arch/arm/mach-sunplus/Makefile +0 −8
  1274. arch/arm/mach-sunplus/sp7021.c +0 −16
  1275. arch/arm/mach-sunxi/mc_smp.c +4 −4
  1276. arch/arm/mach-uniphier/Kconfig +0 −15
  1277. arch/arm/mach-versatile/Kconfig +0 −17
  1278. arch/arm/mach-versatile/platsmp-realview.c +5 −1
  1279. arch/arm/mach-versatile/realview.c +0 −1
  1280. arch/arm/mm/Kconfig +0 −18
  1281. arch/arm/mm/cache-v6.S +0 −31
  1282. arch/arm/mm/dma-mapping-nommu.c +1 −1
  1283. arch/arm/mm/dma-mapping.c +6 −9
  1284. arch/arm/mm/fault.c +30 −0
  1285. arch/arm/mm/kasan_init.c +7 −1
  1286. arch/arm/tools/syscall.tbl +5 −0
  1287. arch/arm/vdso/vgettimeofday.c +1 −0
  1288. arch/arm/vfp/vfpmodule.c +18 −0
  1289. arch/arm64/Kconfig +32 −12
  1290. arch/arm64/Makefile +1 −1
  1291. arch/arm64/boot/Makefile +1 −1
  1292. arch/arm64/boot/dts/allwinner/Makefile +1 −0
  1293. arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi +0 −3
  1294. arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts +3 −0
  1295. arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts +176 −0
  1296. arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts +2 −0
  1297. arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts +161 −0
  1298. arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +21 −20
  1299. arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts +3 −5
  1300. arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts +2 −4
  1301. arch/arm64/boot/dts/altera/socfpga_stratix10_swvp.dts +0 −2
  1302. arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi +6 −0
  1303. arch/arm64/boot/dts/amlogic/meson-axg-jethome-jethub-j110-rev-2.dts +13 −1
  1304. arch/arm64/boot/dts/amlogic/meson-axg-jethome-jethub-j110-rev-3.dts +12 −0
  1305. arch/arm64/boot/dts/amlogic/meson-axg-s400.dts +0 −5
  1306. arch/arm64/boot/dts/amlogic/meson-axg.dtsi +23 −0
  1307. arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts +0 −1
  1308. arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts +0 −1
  1309. arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi +1 −1
  1310. arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi +1 −1
  1311. arch/arm64/boot/dts/amlogic/meson-g12b-gtking.dts +0 −1
  1312. arch/arm64/boot/dts/amlogic/meson-g12b-ugoos-am6.dts +0 −1
  1313. arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi +0 −1
  1314. arch/arm64/boot/dts/amlogic/meson-gxbb-kii-pro.dts +0 −1
  1315. arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts +0 −1
  1316. arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi +0 −1
  1317. arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts +0 −1
  1318. arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts +0 −1
  1319. arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts +0 −1
  1320. arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts +58 −2
  1321. arch/arm64/boot/dts/amlogic/meson-s4.dtsi +357 −3
  1322. arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts +0 −1
  1323. arch/arm64/boot/dts/arm/juno-base.dtsi +6 −6
  1324. arch/arm64/boot/dts/arm/juno-scmi.dtsi +6 −6
  1325. arch/arm64/boot/dts/exynos/Makefile +4 −1
  1326. arch/arm64/boot/dts/exynos/exynos5433.dtsi +39 −21
  1327. arch/arm64/boot/dts/exynos/exynos7.dtsi +10 −8
  1328. arch/arm64/boot/dts/exynos/exynos7885.dtsi +30 −15
  1329. arch/arm64/boot/dts/exynos/exynos850.dtsi +24 −16
  1330. arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts +51 −0
  1331. arch/arm64/boot/dts/exynos/exynosautov9.dtsi +7 −3
  1332. arch/arm64/boot/dts/exynos/exynosautov920-pinctrl.dtsi +1266 −0
  1333. arch/arm64/boot/dts/exynos/exynosautov920-sadk.dts +88 −0
  1334. arch/arm64/boot/dts/exynos/exynosautov920.dtsi +312 −0
  1335. arch/arm64/boot/dts/exynos/google/Makefile +4 −0
  1336. arch/arm64/boot/dts/exynos/google/gs101-oriole.dts +105 −0
  1337. arch/arm64/boot/dts/exynos/google/gs101-pinctrl.dtsi +1249 −0
  1338. arch/arm64/boot/dts/exynos/google/gs101-pinctrl.h +33 −0
  1339. arch/arm64/boot/dts/exynos/google/gs101.dtsi +473 −0
  1340. arch/arm64/boot/dts/freescale/Makefile +38 −0
  1341. arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi +40 −40
  1342. arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi +44 −43
  1343. arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi +41 −40
  1344. arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +37 −37
  1345. arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +37 −37
  1346. arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi +37 −36
  1347. arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a.dts +338 −0
  1348. arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a_12_x_x.dtso +29 −0
  1349. arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a_14_x_x.dtso +17 −0
  1350. arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a_x_11_x.dtso +49 −0
  1351. arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a_x_7_x.dtso +55 −0
  1352. arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a_x_8_x.dtso +47 −0
  1353. arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a.dtsi +97 −0
  1354. arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi +2 −2
  1355. arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi +2 −0
  1356. arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi +1 −4
  1357. arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi +0 −2
  1358. arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi +1 −1
  1359. arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi +4 −4
  1360. arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi +8 −8
  1361. arch/arm64/boot/dts/freescale/imx8dxl-ss-ddr.dtsi +1 −1
  1362. arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi +2 −0
  1363. arch/arm64/boot/dts/freescale/imx8mm-emcon-avari.dtsi +1 −1
  1364. arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi +6 −6
  1365. arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts +1 −1
  1366. arch/arm64/boot/dts/freescale/imx8mm-overdrive.dtsi +29 −0
  1367. arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts +1 −0
  1368. arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi +27 −12
  1369. arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi +18 −11
  1370. arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts +8 −5
  1371. arch/arm64/boot/dts/freescale/imx8mm-verdin-mallow.dtsi +173 −0
  1372. arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-mallow.dts +18 −0
  1373. arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-mallow.dts +18 −0
  1374. arch/arm64/boot/dts/freescale/imx8mm.dtsi +7 −11
  1375. arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi +2 −0
  1376. arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi +1 −0
  1377. arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-display.dtsi +121 −0
  1378. arch/arm64/boot/dts/freescale/imx8mn-dimonoff-gateway-evk.dts +160 −0
  1379. arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi +6 −6
  1380. arch/arm64/boot/dts/freescale/imx8mn-overdrive.dtsi +18 −0
  1381. arch/arm64/boot/dts/freescale/imx8mn-rve-gateway.dts +285 −0
  1382. arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx.dts +1 −0
  1383. arch/arm64/boot/dts/freescale/imx8mn-var-som-symphony.dts +18 −3
  1384. arch/arm64/boot/dts/freescale/imx8mn-var-som.dtsi +9 −0
  1385. arch/arm64/boot/dts/freescale/imx8mn.dtsi +2 −0
  1386. arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts +92 −0
  1387. arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts +1 −1
  1388. arch/arm64/boot/dts/freescale/imx8mp-debix-som-a-bmb-08.dts +56 −0
  1389. arch/arm64/boot/dts/freescale/imx8mp-debix-som-a.dtsi +22 −0
  1390. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts +8 −4
  1391. arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi +12 −0
  1392. arch/arm64/boot/dts/freescale/imx8mp-evk.dts +22 −0
  1393. arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s-ep1.dts +2 −2
  1394. arch/arm64/boot/dts/freescale/imx8mp-skov-reva.dtsi +711 −0
  1395. arch/arm64/boot/dts/freescale/imx8mp-skov-revb-hdmi.dts +20 −0
  1396. arch/arm64/boot/dts/freescale/imx8mp-skov-revb-lt6.dts +101 −0
  1397. arch/arm64/boot/dts/freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts +100 −0
  1398. arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl-lvds-g133han01.dtso +77 −0
  1399. arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts +20 −8
  1400. arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi +19 −7
  1401. arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi +28 −8
  1402. arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi +19 −7
  1403. arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts +19 −9
  1404. arch/arm64/boot/dts/freescale/imx8mp-verdin-mallow.dtsi +199 −0
  1405. arch/arm64/boot/dts/freescale/imx8mp-verdin-nonwifi-mallow.dts +18 −0
  1406. arch/arm64/boot/dts/freescale/imx8mp-verdin-wifi-mallow.dts +18 −0
  1407. arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi +21 −9
  1408. arch/arm64/boot/dts/freescale/imx8mp.dtsi +28 −2
  1409. arch/arm64/boot/dts/freescale/imx8mq-phanbell.dts +1 −1
  1410. arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dts +1 −0
  1411. arch/arm64/boot/dts/freescale/imx8mq.dtsi +2 −0
  1412. arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi +15 −0
  1413. arch/arm64/boot/dts/freescale/imx8qxp-mek.dts +14 −7
  1414. arch/arm64/boot/dts/freescale/imx8qxp-ss-vpu.dtsi +17 −0
  1415. arch/arm64/boot/dts/freescale/imx8qxp.dtsi +2 −1
  1416. arch/arm64/boot/dts/freescale/imx8ulp.dtsi +3 −3
  1417. arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts +17 −14
  1418. arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxca.dts +709 −0
  1419. arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla.dts +2 −1
  1420. arch/arm64/boot/dts/freescale/imx93.dtsi +125 −12
  1421. arch/arm64/boot/dts/hisilicon/hikey970-pmic.dtsi +1 −5
  1422. arch/arm64/boot/dts/intel/socfpga_agilex.dtsi +21 −21
  1423. arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi +2 −2
  1424. arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dts +1 −1
  1425. arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts +0 −2
  1426. arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts +1 −4
  1427. arch/arm64/boot/dts/marvell/Makefile +1 −0
  1428. arch/arm64/boot/dts/marvell/ac5x-rd-carrier-cn9131.dts +44 −0
  1429. arch/arm64/boot/dts/marvell/ac5x-rd-carrier.dtsi +34 −0
  1430. arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts +7 −7
  1431. arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi +9 −11
  1432. arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts +9 −11
  1433. arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts +55 −44
  1434. arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts +11 −13
  1435. arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts +11 −11
  1436. arch/arm64/boot/dts/marvell/cn9130-crb.dtsi +20 −22
  1437. arch/arm64/boot/dts/marvell/cn9130-db-comexpress.dtsi +96 −0
  1438. arch/arm64/boot/dts/marvell/cn9131-db-comexpress.dtsi +108 −0
  1439. arch/arm64/boot/dts/mediatek/Makefile +7 −0
  1440. arch/arm64/boot/dts/mediatek/mt6358.dtsi +2 −24
  1441. arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts +2 −3
  1442. arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts +1 −1
  1443. arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts +8 −7
  1444. arch/arm64/boot/dts/mediatek/mt7986a.dtsi +20 −4
  1445. arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dtsi +3 −6
  1446. arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi +8 −16
  1447. arch/arm64/boot/dts/mediatek/mt8173-evb.dts +3 −4
  1448. arch/arm64/boot/dts/mediatek/mt8173.dtsi +5 −3
  1449. arch/arm64/boot/dts/mediatek/mt8183-evb.dts +6 −2
  1450. arch/arm64/boot/dts/mediatek/mt8183-kukui-audio-da7219.dtsi +1 −2
  1451. arch/arm64/boot/dts/mediatek/mt8183-kukui-audio-ts3a227e.dtsi +1 −2
  1452. arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-damu.dts +1 −2
  1453. arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel-sku1.dts +1 −2
  1454. arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel-sku6.dts +1 −2
  1455. arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-fennel-sku7.dts +1 −2
  1456. arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku0.dts +24 −0
  1457. arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku1.dts +24 −0
  1458. arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-pico.dts +35 −0
  1459. arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-pico6.dts +110 −0
  1460. arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi +5 −4
  1461. arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu-sku22.dts +18 −0
  1462. arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dts +18 −0
  1463. arch/arm64/boot/dts/mediatek/mt8183-kukui-kakadu.dtsi +1 −14
  1464. arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku32.dts +36 −0
  1465. arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku38.dts +40 −0
  1466. arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi +1 −2
  1467. arch/arm64/boot/dts/mediatek/mt8183-kukui-krane.dtsi +1 −2
  1468. arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi +54 −52
  1469. arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts +4 −0
  1470. arch/arm64/boot/dts/mediatek/mt8183.dtsi +166 −134
  1471. arch/arm64/boot/dts/mediatek/mt8186.dtsi +31 −19
  1472. arch/arm64/boot/dts/mediatek/mt8188-evb.dts +387 −0
  1473. arch/arm64/boot/dts/mediatek/mt8188.dtsi +956 −0
  1474. arch/arm64/boot/dts/mediatek/mt8192.dtsi +466 −0
  1475. arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +116 −3
  1476. arch/arm64/boot/dts/mediatek/mt8195.dtsi +478 −11
  1477. arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts +3 −4
  1478. arch/arm64/boot/dts/qcom/Makefile +8 −0
  1479. arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts +12 −0
  1480. arch/arm64/boot/dts/qcom/ipq5018.dtsi +142 −0
  1481. arch/arm64/boot/dts/qcom/ipq5332-rdp-common.dtsi +3 −0
  1482. arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts +1 −1
  1483. arch/arm64/boot/dts/qcom/ipq5332-rdp442.dts +1 −1
  1484. arch/arm64/boot/dts/qcom/ipq5332-rdp474.dts +1 −1
  1485. arch/arm64/boot/dts/qcom/ipq5332.dtsi +18 −5
  1486. arch/arm64/boot/dts/qcom/ipq6018.dtsi +96 −25
  1487. arch/arm64/boot/dts/qcom/ipq8074.dtsi +59 −51
  1488. arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi +169 −0
  1489. arch/arm64/boot/dts/qcom/ipq9574-rdp418.dts +1 −62
  1490. arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts +1 −90
  1491. arch/arm64/boot/dts/qcom/ipq9574-rdp449.dts +1 −64
  1492. arch/arm64/boot/dts/qcom/ipq9574-rdp453.dts +1 −64
  1493. arch/arm64/boot/dts/qcom/ipq9574-rdp454.dts +1 −65
  1494. arch/arm64/boot/dts/qcom/ipq9574.dtsi +22 −3
  1495. arch/arm64/boot/dts/qcom/msm8916-acer-a1-724.dts +24 −0
  1496. arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dts +172 −1
  1497. arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dts +21 −0
  1498. arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts +66 −9
  1499. arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dts +103 −0
  1500. arch/arm64/boot/dts/qcom/msm8916-modem-qdsp6.dtsi +148 −0
  1501. arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi +71 −0
  1502. arch/arm64/boot/dts/qcom/msm8916-samsung-a3u-eur.dts +5 −5
  1503. arch/arm64/boot/dts/qcom/msm8916-samsung-e2015-common.dtsi +4 −0
  1504. arch/arm64/boot/dts/qcom/msm8916-samsung-grandmax.dts +4 −0
  1505. arch/arm64/boot/dts/qcom/msm8916-samsung-gt5-common.dtsi +73 −19
  1506. arch/arm64/boot/dts/qcom/msm8916-samsung-gt510.dts +26 −0
  1507. arch/arm64/boot/dts/qcom/msm8916-samsung-gt58.dts +46 −0
  1508. arch/arm64/boot/dts/qcom/msm8916-samsung-j5-common.dtsi +14 −0
  1509. arch/arm64/boot/dts/qcom/msm8916-samsung-j5.dts +4 −0
  1510. arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dts +13 −0
  1511. arch/arm64/boot/dts/qcom/msm8916-thwc-uf896.dts +4 −4
  1512. arch/arm64/boot/dts/qcom/msm8916-thwc-ufi001c.dts +4 −4
  1513. arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dts +75 −0
  1514. arch/arm64/boot/dts/qcom/msm8916-yiming-uz801v3.dts +4 −4
  1515. arch/arm64/boot/dts/qcom/msm8916.dtsi +50 −9
  1516. arch/arm64/boot/dts/qcom/msm8939-huawei-kiwi.dts +242 −0
  1517. arch/arm64/boot/dts/qcom/msm8939-longcheer-l9100.dts +56 −0
  1518. arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts +70 −0
  1519. arch/arm64/boot/dts/qcom/msm8939.dtsi +82 −12
  1520. arch/arm64/boot/dts/qcom/msm8953-xiaomi-mido.dts +1 −0
  1521. arch/arm64/boot/dts/qcom/msm8953-xiaomi-tissot.dts +1 −0
  1522. arch/arm64/boot/dts/qcom/msm8953-xiaomi-vince.dts +1 −0
  1523. arch/arm64/boot/dts/qcom/msm8953.dtsi +106 −4
  1524. arch/arm64/boot/dts/qcom/msm8996.dtsi +94 −74
  1525. arch/arm64/boot/dts/qcom/msm8998.dtsi +41 −51
  1526. arch/arm64/boot/dts/qcom/pm7250b.dtsi +1 −1
  1527. arch/arm64/boot/dts/qcom/pm8550.dtsi +0 −3
  1528. arch/arm64/boot/dts/qcom/pm8550ve.dtsi +3 −3
  1529. arch/arm64/boot/dts/qcom/pm8916.dtsi +48 −0
  1530. arch/arm64/boot/dts/qcom/pmk8350.dtsi +1 −1
  1531. arch/arm64/boot/dts/qcom/qcm2290.dtsi +497 −7
  1532. arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts +271 −17
  1533. arch/arm64/boot/dts/qcom/qcm6490-idp.dts +468 −0
  1534. arch/arm64/boot/dts/qcom/qcs404.dtsi +1 −10
  1535. arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts +455 −0
  1536. arch/arm64/boot/dts/qcom/qdu1000.dtsi +17 −6
  1537. arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +113 −0
  1538. arch/arm64/boot/dts/qcom/qrb4210-rb2.dts +106 −6
  1539. arch/arm64/boot/dts/qcom/qrb5165-rb5-vision-mezzanine.dts +1 −1
  1540. arch/arm64/boot/dts/qcom/qrb5165-rb5.dts +31 −2
  1541. arch/arm64/boot/dts/qcom/sa8775p-ride.dts +5 −0
  1542. arch/arm64/boot/dts/qcom/sa8775p.dtsi +1115 −9
  1543. arch/arm64/boot/dts/qcom/sc7180-acer-aspire1.dts +172 −2
  1544. arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi +1 −1
  1545. arch/arm64/boot/dts/qcom/sc7180.dtsi +9 −5
  1546. arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi +26 −11
  1547. arch/arm64/boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi +2 −5
  1548. arch/arm64/boot/dts/qcom/sc7280-herobrine-wifi-sku.dtsi +1 −0
  1549. arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +19 −0
  1550. arch/arm64/boot/dts/qcom/sc7280.dtsi +538 −43
  1551. arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts +2 −2
  1552. arch/arm64/boot/dts/qcom/sc8180x-primus.dts +9 −3
  1553. arch/arm64/boot/dts/qcom/sc8180x.dtsi +37 −24
  1554. arch/arm64/boot/dts/qcom/sc8280xp-crd.dts +2 −0
  1555. arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +12 −0
  1556. arch/arm64/boot/dts/qcom/sc8280xp.dtsi +20 −4
  1557. arch/arm64/boot/dts/qcom/sdm630.dtsi +12 −41
  1558. arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts +19 −0
  1559. arch/arm64/boot/dts/qcom/sdm670.dtsi +297 −5
  1560. arch/arm64/boot/dts/qcom/sdm845-db845c.dts +2 −2
  1561. arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi +23 −0
  1562. arch/arm64/boot/dts/qcom/sdm845-wcd9340.dtsi +1 −1
  1563. arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi +22 −0
  1564. arch/arm64/boot/dts/qcom/sdm845.dtsi +66 −61
  1565. arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts +7 −1
  1566. arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts +1 −1
  1567. arch/arm64/boot/dts/qcom/sdx75-idp.dts +29 −0
  1568. arch/arm64/boot/dts/qcom/sdx75.dtsi +170 −0
  1569. arch/arm64/boot/dts/qcom/sm4450-qrd.dts +16 −2
  1570. arch/arm64/boot/dts/qcom/sm4450.dtsi +107 −0
  1571. arch/arm64/boot/dts/qcom/sm6115.dtsi +321 −21
  1572. arch/arm64/boot/dts/qcom/sm6125.dtsi +4 −0
  1573. arch/arm64/boot/dts/qcom/sm6350.dtsi +5 −15
  1574. arch/arm64/boot/dts/qcom/sm6375-sony-xperia-murray-pdx225.dts +35 −8
  1575. arch/arm64/boot/dts/qcom/sm6375.dtsi +77 −7
  1576. arch/arm64/boot/dts/qcom/sm8150-hdk.dts +254 −10
  1577. arch/arm64/boot/dts/qcom/sm8150.dtsi +169 −54
  1578. arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-common.dtsi +44 −3
  1579. arch/arm64/boot/dts/qcom/sm8250-xiaomi-pipa.dts +623 −0
  1580. arch/arm64/boot/dts/qcom/sm8250.dtsi +71 −72
  1581. arch/arm64/boot/dts/qcom/sm8350.dtsi +69 −78
  1582. arch/arm64/boot/dts/qcom/sm8450-hdk.dts +8 −0
  1583. arch/arm64/boot/dts/qcom/sm8450.dtsi +236 −49
  1584. arch/arm64/boot/dts/qcom/sm8550-mtp.dts +129 −0
  1585. arch/arm64/boot/dts/qcom/sm8550-qrd.dts +136 −0
  1586. arch/arm64/boot/dts/qcom/sm8550.dtsi +264 −53
  1587. arch/arm64/boot/dts/qcom/sm8650-mtp.dts +727 −0
  1588. arch/arm64/boot/dts/qcom/sm8650-qrd.dts +811 −0
  1589. arch/arm64/boot/dts/qcom/sm8650.dtsi +6013 −0
  1590. arch/arm64/boot/dts/qcom/x1e80100-crd.dts +424 −0
  1591. arch/arm64/boot/dts/qcom/x1e80100-qcp.dts +399 −0
  1592. arch/arm64/boot/dts/qcom/x1e80100.dtsi +3527 −0
  1593. arch/arm64/boot/dts/renesas/draak.dtsi +18 −14
  1594. arch/arm64/boot/dts/renesas/ebisu.dtsi +6 −0
  1595. arch/arm64/boot/dts/renesas/r8a77970-eagle.dts +15 −0
  1596. arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi +3 −0
  1597. arch/arm64/boot/dts/renesas/r9a08g045.dtsi +106 −0
  1598. arch/arm64/boot/dts/renesas/r9a09g011.dtsi +1 −1
  1599. arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi +1 −0
  1600. arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi +1 −0
  1601. arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi +203 −7
  1602. arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi +65 −0
  1603. arch/arm64/boot/dts/rockchip/Makefile +6 −0
  1604. arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi +1 −0
  1605. arch/arm64/boot/dts/rockchip/px30-evb.dts +1 −0
  1606. arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts +2 −1
  1607. arch/arm64/boot/dts/rockchip/px30.dtsi +0 −1
  1608. arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts +62 −0
  1609. arch/arm64/boot/dts/rockchip/rk3308.dtsi +5 −0
  1610. arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts +1 −0
  1611. arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dts +2 −16
  1612. arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dtsi +478 −0
  1613. arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351v.dts +44 −0
  1614. arch/arm64/boot/dts/rockchip/rk3328-a1.dts +1 −0
  1615. arch/arm64/boot/dts/rockchip/rk3328-evb.dts +1 −0
  1616. arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts +1 −0
  1617. arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts +3 −1
  1618. arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts +1 −0
  1619. arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts +1 −0
  1620. arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts +55 −0
  1621. arch/arm64/boot/dts/rockchip/rk3328-rock64.dts +1 −0
  1622. arch/arm64/boot/dts/rockchip/rk3328.dtsi +9 −3
  1623. arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi +1 −0
  1624. arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts +1 −0
  1625. arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi +1 −0
  1626. arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts +1 −0
  1627. arch/arm64/boot/dts/rockchip/rk3368-r88.dts +1 −0
  1628. arch/arm64/boot/dts/rockchip/rk3368.dtsi +4 −1
  1629. arch/arm64/boot/dts/rockchip/rk3399-eaidk-610.dts +1 −0
  1630. arch/arm64/boot/dts/rockchip/rk3399-evb.dts +1 −0
  1631. arch/arm64/boot/dts/rockchip/rk3399-ficus.dts +4 −0
  1632. arch/arm64/boot/dts/rockchip/rk3399-firefly.dts +1 −0
  1633. arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi +1 −2
  1634. arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet-dumo.dts +2 −2
  1635. arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi +1 −0
  1636. arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts +1 −0
  1637. arch/arm64/boot/dts/rockchip/rk3399-khadas-edge-captain.dts +4 −0
  1638. arch/arm64/boot/dts/rockchip/rk3399-khadas-edge-v.dts +4 −0
  1639. arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts +1 −0
  1640. arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts +1 −0
  1641. arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi +1 −0
  1642. arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts +1 −0
  1643. arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts +36 −6
  1644. arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi +15 −0
  1645. arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi +1 −0
  1646. arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts +1 −0
  1647. arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi +1 −0
  1648. arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi +1 −0
  1649. arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi +2 −1
  1650. arch/arm64/boot/dts/rockchip/rk3399.dtsi +10 −3
  1651. arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi +1 −0
  1652. arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts +1 −1
  1653. arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rgb30.dts +16 −138
  1654. arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rk2023.dts +38 −0
  1655. arch/arm64/boot/dts/rockchip/rk3566-powkiddy-rk2023.dtsi +875 −0
  1656. arch/arm64/boot/dts/rockchip/rk3566-powkiddy-x55.dts +926 −0
  1657. arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts +3 −2
  1658. arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3-io.dts +1 −0
  1659. arch/arm64/boot/dts/rockchip/rk3566-roc-pc.dts +1 −0
  1660. arch/arm64/boot/dts/rockchip/rk3566-soquartz-blade.dts +4 −0
  1661. arch/arm64/boot/dts/rockchip/rk3566-soquartz-cm4.dts +4 −0
  1662. arch/arm64/boot/dts/rockchip/rk3566-soquartz-model-a.dts +4 −0
  1663. arch/arm64/boot/dts/rockchip/rk3566-soquartz.dtsi +0 −1
  1664. arch/arm64/boot/dts/rockchip/rk356x.dtsi +1 −1
  1665. arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-evb.dts +214 −0
  1666. arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi +650 −0
  1667. arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dts +0 −4
  1668. arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6b-io.dts +1 −5
  1669. arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts +98 −1
  1670. arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts +803 −0
  1671. arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts +5 −5
  1672. arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts +0 −1
  1673. arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts +1 −1
  1674. arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts +11 −2
  1675. arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi +2 −4
  1676. arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts +812 −0
  1677. arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts +0 −1
  1678. arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +0 −1
  1679. arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts +7 −2
  1680. arch/arm64/boot/dts/rockchip/rk3588s-pinctrl.dtsi +1 −1
  1681. arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts +9 −1
  1682. arch/arm64/boot/dts/rockchip/rk3588s.dtsi +116 −1
  1683. arch/arm64/boot/dts/sprd/Makefile +2 −1
  1684. arch/arm64/boot/dts/sprd/ums512.dtsi +20 −19
  1685. arch/arm64/boot/dts/sprd/ums9620-2h10.dts +38 −0
  1686. arch/arm64/boot/dts/sprd/ums9620.dtsi +245 −0
  1687. arch/arm64/boot/dts/st/stm32mp251.dtsi +16 −0
  1688. arch/arm64/boot/dts/tesla/fsd.dtsi +37 −16
  1689. arch/arm64/boot/dts/ti/Makefile +58 −12
  1690. arch/arm64/boot/dts/ti/k3-am62-main.dtsi +92 −4
  1691. arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi +1 −2
  1692. arch/arm64/boot/dts/ti/k3-am62-verdin-dev.dtsi +1 −2
  1693. arch/arm64/boot/dts/ti/k3-am62-verdin-mallow.dtsi +188 −0
  1694. arch/arm64/boot/dts/ti/k3-am62-verdin-yavia.dtsi +1 −2
  1695. arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi +15 −2
  1696. arch/arm64/boot/dts/ti/k3-am625-beagleplay-csi2-ov5640.dtso +77 −0
  1697. arch/arm64/boot/dts/ti/k3-am625-beagleplay-csi2-tevi-ov5640.dtso +77 −0
  1698. arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts +2 −2
  1699. arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts +96 −2
  1700. arch/arm64/boot/dts/ti/k3-am625-verdin-nonwifi-mallow.dts +22 −0
  1701. arch/arm64/boot/dts/ti/k3-am625-verdin-wifi-mallow.dts +22 −0
  1702. arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +115 −6
  1703. arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +39 −0
  1704. arch/arm64/boot/dts/ti/k3-am62p-main.dtsi +14 −4
  1705. arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +9 −0
  1706. arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi +16 −0
  1707. arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso +84 −0
  1708. arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-ov5640.dtso +82 −0
  1709. arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-tevi-ov5640.dtso +82 −0
  1710. arch/arm64/boot/dts/ti/k3-am64-main.dtsi +17 −5
  1711. arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi +102 −1
  1712. arch/arm64/boot/dts/ti/k3-am642-evm.dts +9 −3
  1713. arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts +1 −0
  1714. arch/arm64/boot/dts/ti/k3-am642-sk.dts +8 −2
  1715. arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts +0 −1
  1716. arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi +1 −0
  1717. arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi +9 −1
  1718. arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi +3 −1
  1719. arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +777 −49
  1720. arch/arm64/boot/dts/ti/k3-am65-main.dtsi +11 −5
  1721. arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi +6 −2
  1722. arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi +10 −3
  1723. arch/arm64/boot/dts/ti/k3-am652.dtsi +74 −0
  1724. arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-common.dtsi +1 −15
  1725. arch/arm64/boot/dts/ti/k3-am654-base-board.dts +2 −0
  1726. arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-common.dtsi +2 −0
  1727. arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts +2 −10
  1728. arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts +1 −0
  1729. arch/arm64/boot/dts/ti/k3-am69-sk.dts +95 −1
  1730. arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +7 −2
  1731. arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi +16 −5
  1732. arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi +153 −0
  1733. arch/arm64/boot/dts/ti/k3-j721e-evm-pcie0-ep.dtso +53 −0
  1734. arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +6 −2
  1735. arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi +16 −5
  1736. arch/arm64/boot/dts/ti/k3-j721e-sk.dts +151 −0
  1737. arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi +160 −0
  1738. arch/arm64/boot/dts/ti/k3-j721s2-evm-pcie1-ep.dtso +53 −0
  1739. arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi +7 −2
  1740. arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi +16 −5
  1741. arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi +193 −0
  1742. arch/arm64/boot/dts/ti/k3-j784s4-evm.dts +102 −0
  1743. arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi +7 −2
  1744. arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi +17 −5
  1745. arch/arm64/boot/dts/xilinx/Makefile +4 −5
  1746. arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso +20 −20
  1747. arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso +21 −21
  1748. arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts +3 −5
  1749. arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts +6 −2
  1750. arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts +10 −6
  1751. arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts +6 −2
  1752. arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts +15 −11
  1753. arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm019-dc5.dts +6 −2
  1754. arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts +2 −2
  1755. arch/arm64/boot/dts/xilinx/zynqmp.dtsi +4 −11
  1756. arch/arm64/boot/install.sh +2 −1
  1757. arch/arm64/configs/defconfig +99 −56
  1758. arch/arm64/crypto/Kconfig +2 −4
  1759. arch/arm64/crypto/sm4-ce-core.S +0 −158
  1760. arch/arm64/crypto/sm4-ce-glue.c +1 −107
  1761. arch/arm64/crypto/sm4-ce.h +0 −3
  1762. arch/arm64/crypto/sm4-neon-core.S +0 −113
  1763. arch/arm64/crypto/sm4-neon-glue.c +1 −104
  1764. arch/arm64/include/asm/assembler.h +10 −17
  1765. arch/arm64/include/asm/cache.h +0 −6
  1766. arch/arm64/include/asm/cpu.h +0 −1
  1767. arch/arm64/include/asm/cpufeature.h +6 −0
  1768. arch/arm64/include/asm/esr.h +15 −0
  1769. arch/arm64/include/asm/fpsimdmacros.h +0 −8
  1770. arch/arm64/include/asm/irq.h +2 −0
  1771. arch/arm64/include/asm/irq_work.h +0 −2
  1772. arch/arm64/include/asm/kasan.h +1 −21
  1773. arch/arm64/include/asm/kernel-pgtable.h +6 −21
  1774. arch/arm64/include/asm/kvm_arm.h +38 −25
  1775. arch/arm64/include/asm/kvm_emulate.h +18 −16
  1776. arch/arm64/include/asm/kvm_host.h +92 −48
  1777. arch/arm64/include/asm/kvm_mmu.h +0 −7
  1778. arch/arm64/include/asm/kvm_nested.h +50 −6
  1779. arch/arm64/include/asm/kvm_pgtable.h +54 −26
  1780. arch/arm64/include/asm/kvm_pkvm.h +3 −2
  1781. arch/arm64/include/asm/memory.h +34 −11
  1782. arch/arm64/include/asm/pgtable-prot.h +2 −0
  1783. arch/arm64/include/asm/pgtable.h +6 −0
  1784. arch/arm64/include/asm/processor.h +3 −0
  1785. arch/arm64/include/asm/simd.h +1 −10
  1786. arch/arm64/include/asm/sparsemem.h +1 −1
  1787. arch/arm64/include/asm/spectre.h +2 −2
  1788. arch/arm64/include/asm/stacktrace/common.h +1 −18
  1789. arch/arm64/include/asm/stacktrace/nvhe.h +1 −1
  1790. arch/arm64/include/asm/syscall_wrapper.h +0 −4
  1791. arch/arm64/include/asm/sysreg.h +25 −0
  1792. arch/arm64/include/asm/thread_info.h +1 −0
  1793. arch/arm64/include/asm/tlb.h +10 −5
  1794. arch/arm64/include/asm/tlbflush.h +63 −37
  1795. arch/arm64/include/asm/topology.h +1 −0
  1796. arch/arm64/include/asm/unistd.h +1 −1
  1797. arch/arm64/include/asm/unistd32.h +10 −0
  1798. arch/arm64/include/asm/vncr_mapping.h +103 −0
  1799. arch/arm64/kernel/Makefile +7 −1
  1800. arch/arm64/kernel/asm-offsets.c +0 −2
  1801. arch/arm64/kernel/cpu_errata.c +17 −4
  1802. arch/arm64/kernel/cpufeature.c +101 −63
  1803. arch/arm64/kernel/cpuinfo.c +0 −5
  1804. arch/arm64/kernel/entry.S +14 −11
  1805. arch/arm64/kernel/fpsimd.c +114 −67
  1806. arch/arm64/kernel/head.S +1 −1
  1807. arch/arm64/kernel/idreg-override.c +95 −58
  1808. arch/arm64/kernel/irq.c +4 −3
  1809. arch/arm64/kernel/kaslr.c +7 −0
  1810. arch/arm64/kernel/kexec_image.c +3 −3
  1811. arch/arm64/kernel/machine_kexec.c +6 −20
  1812. arch/arm64/kernel/machine_kexec_file.c +6 −6
  1813. arch/arm64/kernel/pi/Makefile +1 −0
  1814. arch/arm64/kernel/ptrace.c +8 −6
  1815. arch/arm64/kernel/setup.c +2 −11
  1816. arch/arm64/kernel/smp.c +3 −9
  1817. arch/arm64/kernel/stacktrace.c +102 −44
  1818. arch/arm64/kernel/topology.c +13 −13
  1819. arch/arm64/kernel/vdso32/Makefile +4 −4
  1820. arch/arm64/kernel/vdso32/vgettimeofday.c +2 −0
  1821. arch/arm64/kvm/Kconfig +2 −5
  1822. arch/arm64/kvm/arch_timer.c +1 −2
  1823. arch/arm64/kvm/arm.c +12 −2
  1824. arch/arm64/kvm/emulate-nested.c +63 −0
  1825. arch/arm64/kvm/hyp/include/hyp/fault.h +1 −1
  1826. arch/arm64/kvm/hyp/include/hyp/switch.h +62 −31
  1827. arch/arm64/kvm/hyp/include/nvhe/fixed_config.h +18 −4
  1828. arch/arm64/kvm/hyp/include/nvhe/gfp.h +1 −1
  1829. arch/arm64/kvm/hyp/nvhe/hyp-init.S +2 −4
  1830. arch/arm64/kvm/hyp/nvhe/mem_protect.c +3 −3
  1831. arch/arm64/kvm/hyp/nvhe/mm.c +2 −2
  1832. arch/arm64/kvm/hyp/nvhe/page_alloc.c +2 −1
  1833. arch/arm64/kvm/hyp/nvhe/pkvm.c +5 −1
  1834. arch/arm64/kvm/hyp/nvhe/setup.c +1 −1
  1835. arch/arm64/kvm/hyp/nvhe/tlb.c +0 −61
  1836. arch/arm64/kvm/hyp/pgtable.c +57 −33
  1837. arch/arm64/kvm/hyp/vhe/tlb.c +0 −13
  1838. arch/arm64/kvm/mmu.c +25 −24
  1839. arch/arm64/kvm/nested.c +15 −7
  1840. arch/arm64/kvm/pmu-emul.c +3 −5
  1841. arch/arm64/kvm/reset.c +4 −5
  1842. arch/arm64/kvm/sys_regs.c +189 −50
  1843. arch/arm64/kvm/vgic/vgic-init.c +29 −18
  1844. arch/arm64/kvm/vgic/vgic-its.c +5 −0
  1845. arch/arm64/kvm/vgic/vgic-mmio-v3.c +8 −24
  1846. arch/arm64/kvm/vgic/vgic-mmio.c +43 −58
  1847. arch/arm64/kvm/vgic/vgic-v4.c +4 −0
  1848. arch/arm64/kvm/vgic/vgic.h +1 −0
  1849. arch/arm64/lib/copy_page.S +0 −11
  1850. arch/arm64/mm/dma-mapping.c +2 −2
  1851. arch/arm64/mm/fault.c +2 −0
  1852. arch/arm64/mm/hugetlbpage.c +1 −1
  1853. arch/arm64/mm/kasan_init.c +5 −0
  1854. arch/arm64/mm/mmu.c +3 −3
  1855. arch/arm64/net/bpf_jit_comp.c +37 −18
  1856. arch/arm64/tools/cpucaps +2 −2
  1857. arch/arm64/tools/sysreg +312 −13
  1858. arch/csky/abiv1/inc/abi/cacheflush.h +1 −0
  1859. arch/csky/abiv2/inc/abi/cacheflush.h +1 −0
  1860. arch/csky/configs/defconfig +2 −1
  1861. arch/csky/include/asm/ftrace.h +4 −0
  1862. arch/csky/include/asm/irq_work.h +1 −1
  1863. arch/csky/include/asm/jump_label.h +5 −0
  1864. arch/csky/include/asm/traps.h +1 −1
  1865. arch/csky/kernel/traps.c +1 −0
  1866. arch/csky/kernel/vdso/vgettimeofday.c +1 −10
  1867. arch/hexagon/include/asm/io.h +0 −9
  1868. arch/hexagon/include/asm/irq.h +3 −0
  1869. arch/hexagon/include/asm/page.h +13 −2
  1870. arch/hexagon/include/uapi/asm/user.h +1 −6
  1871. arch/hexagon/kernel/process.c +2 −0
  1872. arch/hexagon/kernel/ptrace.c +5 −2
  1873. arch/hexagon/kernel/reset.c +1 −0
  1874. arch/hexagon/kernel/signal.c +1 −1
  1875. arch/hexagon/kernel/smp.c +2 −2
  1876. arch/hexagon/kernel/time.c +3 −1
  1877. arch/hexagon/kernel/traps.c +4 −7
  1878. arch/hexagon/kernel/vdso.c +1 −0
  1879. arch/hexagon/kernel/vm_events.c +0 −7
  1880. arch/hexagon/mm/init.c +2 −1
  1881. arch/hexagon/mm/uaccess.c +0 −8
  1882. arch/hexagon/mm/vm_fault.c +2 −1
  1883. arch/hexagon/mm/vm_tlb.c +1 −0
  1884. arch/loongarch/Kbuild +1 −0
  1885. arch/loongarch/Kconfig +24 −0
  1886. arch/loongarch/Makefile +6 −2
  1887. arch/loongarch/boot/dts/Makefile +3 −2
  1888. arch/loongarch/boot/dts/loongson-2k0500-ref.dts +88 −0
  1889. arch/loongarch/boot/dts/loongson-2k0500.dtsi +266 −0
  1890. arch/loongarch/boot/dts/loongson-2k1000-ref.dts +183 −0
  1891. arch/loongarch/boot/dts/loongson-2k1000.dtsi +492 −0
  1892. arch/loongarch/boot/dts/loongson-2k2000-ref.dts +72 −0
  1893. arch/loongarch/boot/dts/loongson-2k2000.dtsi +300 −0
  1894. arch/loongarch/configs/loongson3_defconfig +47 −10
  1895. arch/loongarch/include/asm/bootinfo.h +4 −2
  1896. arch/loongarch/include/asm/crash_core.h +12 −0
  1897. arch/loongarch/include/asm/efi.h +0 −2
  1898. arch/loongarch/include/asm/elf.h +1 −6
  1899. arch/loongarch/include/asm/ftrace.h +1 −1
  1900. arch/loongarch/include/asm/kvm_host.h +22 −3
  1901. arch/loongarch/include/asm/kvm_vcpu.h +20 −1
  1902. arch/loongarch/include/asm/loongarch.h +2 −3
  1903. arch/loongarch/include/asm/pgtable.h +1 −0
  1904. arch/loongarch/include/asm/shmparam.h +0 −12
  1905. arch/loongarch/include/uapi/asm/kvm.h +1 −0
  1906. arch/loongarch/kernel/Makefile +1 −1
  1907. arch/loongarch/kernel/acpi.c +1 −1
  1908. arch/loongarch/kernel/asm-offsets.c +13 −13
  1909. arch/loongarch/kernel/efi.c +2 −0
  1910. arch/loongarch/kernel/elf.c +0 −5
  1911. arch/loongarch/kernel/env.c +33 −1
  1912. arch/loongarch/kernel/fpu.S +2 −0
  1913. arch/loongarch/kernel/head.S +10 −1
  1914. arch/loongarch/kernel/image-vars.h +0 −1
  1915. arch/loongarch/kernel/numa.c +1 −27
  1916. arch/loongarch/kernel/process.c +1 −0
  1917. arch/loongarch/kernel/setup.c +19 −37
  1918. arch/loongarch/kernel/signal.c +1 −0
  1919. arch/loongarch/kernel/smp.c +4 −1
  1920. arch/loongarch/kernel/stacktrace.c +1 −1
  1921. arch/loongarch/kernel/topology.c +2 −40
  1922. arch/loongarch/kernel/unwind.c +0 −1
  1923. arch/loongarch/kernel/unwind_prologue.c +1 −1
  1924. arch/loongarch/kernel/vmlinux.lds.S +0 −1
  1925. arch/loongarch/kvm/Kconfig +2 −3
  1926. arch/loongarch/kvm/exit.c +39 −11
  1927. arch/loongarch/kvm/main.c +0 −1
  1928. arch/loongarch/kvm/mmu.c +83 −41
  1929. arch/loongarch/kvm/switch.S +31 −0
  1930. arch/loongarch/kvm/timer.c +76 −53
  1931. arch/loongarch/kvm/trace.h +5 −1
  1932. arch/loongarch/kvm/vcpu.c +272 −35
  1933. arch/loongarch/net/bpf_jit.c +15 −13
  1934. arch/loongarch/vdso/vgettimeofday.c +1 −6
  1935. arch/m68k/Kconfig.cpu +1 −1
  1936. arch/m68k/coldfire/vectors.c +1 −2
  1937. arch/m68k/coldfire/vectors.h +0 −3
  1938. arch/m68k/configs/amiga_defconfig +1 −1
  1939. arch/m68k/configs/apollo_defconfig +1 −1
  1940. arch/m68k/configs/atari_defconfig +1 −1
  1941. arch/m68k/configs/bvme6000_defconfig +1 −1
  1942. arch/m68k/configs/hp300_defconfig +1 −1
  1943. arch/m68k/configs/mac_defconfig +1 −4
  1944. arch/m68k/configs/multi_defconfig +1 −4
  1945. arch/m68k/configs/mvme147_defconfig +1 −1
  1946. arch/m68k/configs/mvme16x_defconfig +1 −1
  1947. arch/m68k/configs/q40_defconfig +1 −1
  1948. arch/m68k/configs/sun3_defconfig +1 −1
  1949. arch/m68k/configs/sun3x_defconfig +1 −1
  1950. arch/m68k/emu/nfcon.c +2 −2
  1951. arch/m68k/include/asm/cacheflush_mm.h +1 −0
  1952. arch/m68k/include/asm/io_mm.h +0 −6
  1953. arch/m68k/include/asm/kexec.h +2 −2
  1954. arch/m68k/include/asm/kmap.h +0 −1
  1955. arch/m68k/include/asm/processor.h +1 −0
  1956. arch/m68k/kernel/Makefile +1 −1
  1957. arch/m68k/kernel/syscalls/syscall.tbl +5 −0
  1958. arch/microblaze/configs/mmu_defconfig +7 −6
  1959. arch/microblaze/include/asm/ftrace.h +1 −0
  1960. arch/microblaze/include/asm/pgtable.h +1 −0
  1961. arch/microblaze/kernel/syscalls/syscall.tbl +5 −0
  1962. arch/microblaze/kernel/traps.c +1 −0
  1963. arch/mips/Kbuild +0 −6
  1964. arch/mips/Kconfig +2 −0
  1965. arch/mips/alchemy/devboards/db1200.c +1 −1
  1966. arch/mips/alchemy/devboards/db1550.c +1 −1
  1967. arch/mips/bcm47xx/buttons.c +3 −3
  1968. arch/mips/bcm63xx/clk.c +2 −2
  1969. arch/mips/boot/compressed/dbg.c +3 −1
  1970. arch/mips/boot/compressed/decompress.c +2 −14
  1971. arch/mips/boot/compressed/decompress.h +24 −0
  1972. arch/mips/boot/compressed/head.S +2 −2
  1973. arch/mips/boot/compressed/string.c +1 −0
  1974. arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi +1 −2
  1975. arch/mips/boot/dts/loongson/ls7a-pch.dtsi +1 −2
  1976. arch/mips/boot/elf2ecoff.c +1 −1
  1977. arch/mips/cavium-octeon/csrc-octeon.c +1 −1
  1978. arch/mips/cavium-octeon/executive/cvmx-boot-vector.c +1 −1
  1979. arch/mips/cavium-octeon/executive/cvmx-bootmem.c +1 −1
  1980. arch/mips/cavium-octeon/executive/cvmx-cmd-queue.c +2 −2
  1981. arch/mips/cavium-octeon/executive/cvmx-helper-jtag.c +1 −1
  1982. arch/mips/cavium-octeon/executive/cvmx-pko.c +1 −1
  1983. arch/mips/cavium-octeon/octeon-platform.c +1 −1
  1984. arch/mips/cavium-octeon/smp.c +2 −2
  1985. arch/mips/configs/ip22_defconfig +0 −1
  1986. arch/mips/configs/ip27_defconfig +2 −1
  1987. arch/mips/configs/lemote2f_defconfig +2 −1
  1988. arch/mips/configs/loongson3_defconfig +2 −1
  1989. arch/mips/configs/malta_defconfig +0 −1
  1990. arch/mips/configs/malta_kvm_defconfig +0 −1
  1991. arch/mips/configs/maltaup_xpa_defconfig +0 −1
  1992. arch/mips/configs/pic32mzda_defconfig +2 −1
  1993. arch/mips/configs/rb532_defconfig +0 −1
  1994. arch/mips/fw/arc/promlib.c +3 −3
  1995. arch/mips/include/asm/cache.h +6 −0
  1996. arch/mips/include/asm/cacheflush.h +2 −0
  1997. arch/mips/include/asm/debug.h +1 −1
  1998. arch/mips/include/asm/dmi.h +1 −1
  1999. arch/mips/include/asm/ftrace.h +4 −0
  2000. arch/mips/include/asm/io.h +71 −61
  2001. arch/mips/include/asm/jump_label.h +3 −0
  2002. arch/mips/include/asm/kexec.h +1 −1
  2003. arch/mips/include/asm/kvm_host.h +0 −2
  2004. arch/mips/include/asm/mach-au1x00/au1000_dma.h +1 −1
  2005. arch/mips/include/asm/mach-au1x00/gpio-au1000.h +1 −1
  2006. arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h +1 −1
  2007. arch/mips/include/asm/mach-loongson64/boot_param.h +7 −2
  2008. arch/mips/include/asm/mach-loongson64/loongson_hwmon.h +1 −1
  2009. arch/mips/include/asm/mach-loongson64/loongson_regs.h +1 −1
  2010. arch/mips/include/asm/mach-loongson64/mmzone.h +0 −1
  2011. arch/mips/include/asm/mach-malta/spaces.h +2 −2
  2012. arch/mips/include/asm/mips-boards/bonito64.h +1 −1
  2013. arch/mips/include/asm/mips-cpc.h +1 −1
  2014. arch/mips/include/asm/mipsregs.h +2 −2
  2015. arch/mips/include/asm/mmiowb.h +2 −2
  2016. arch/mips/include/asm/mmzone.h +2 −0
  2017. arch/mips/include/asm/octeon/cvmx-bootinfo.h +1 −1
  2018. arch/mips/include/asm/octeon/cvmx-cmd-queue.h +3 −3
  2019. arch/mips/include/asm/octeon/cvmx-pko.h +1 −1
  2020. arch/mips/include/asm/octeon/cvmx-pow.h +2 −2
  2021. arch/mips/include/asm/octeon/octeon-model.h +2 −2
  2022. arch/mips/include/asm/page.h +1 −1
  2023. arch/mips/include/asm/pci.h +1 −1
  2024. arch/mips/include/asm/pgtable-bits.h +1 −1
  2025. arch/mips/include/asm/pgtable.h +1 −0
  2026. arch/mips/include/asm/processor.h +2 −0
  2027. arch/mips/include/asm/r4kcache.h +4 −0
  2028. arch/mips/include/asm/setup.h +1 −0
  2029. arch/mips/include/asm/sgi/mc.h +1 −1
  2030. arch/mips/include/asm/signal.h +1 −0
  2031. arch/mips/include/asm/smp-ops.h +1 −3
  2032. arch/mips/include/asm/smp.h +4 −4
  2033. arch/mips/include/asm/sn/klconfig.h +1 −1
  2034. arch/mips/include/asm/spram.h +1 −1
  2035. arch/mips/include/asm/sync.h +1 −1
  2036. arch/mips/include/asm/syscalls.h +33 −0
  2037. arch/mips/include/asm/thread_info.h +1 −1
  2038. arch/mips/include/asm/timex.h +1 −1
  2039. arch/mips/include/asm/tlbex.h +1 −0
  2040. arch/mips/include/asm/traps.h +26 −0
  2041. arch/mips/include/asm/uasm.h +0 −2
  2042. arch/mips/include/asm/vdso/vdso.h +1 −1
  2043. arch/mips/include/uapi/asm/mman.h +1 −1
  2044. arch/mips/include/uapi/asm/msgbuf.h +1 −1
  2045. arch/mips/kernel/Makefile +1 −1
  2046. arch/mips/kernel/cpu-probe.c +1 −2
  2047. arch/mips/kernel/cpu-r3k-probe.c +0 −1
  2048. arch/mips/kernel/genex.S +4 −4
  2049. arch/mips/kernel/kprobes.c +1 −1
  2050. arch/mips/kernel/linux32.c +1 −0
  2051. arch/mips/kernel/machine_kexec.c +1 −0
  2052. arch/mips/kernel/mips-cm.c +1 −1
  2053. arch/mips/kernel/mips-mt-fpaff.c +1 −0
  2054. arch/mips/kernel/mips-mt.c +1 −0
  2055. arch/mips/kernel/module.c +1 −2
  2056. arch/mips/kernel/process.c +13 −12
  2057. arch/mips/kernel/prom.c +2 −0
  2058. arch/mips/kernel/r4k-bugs64.c +1 −0
  2059. arch/mips/kernel/relocate.c +1 −1
  2060. arch/mips/kernel/relocate_kernel.S +1 −1
  2061. arch/mips/kernel/setup.c +4 −3
  2062. arch/mips/kernel/signal-common.h +3 −0
  2063. arch/mips/kernel/signal.c +2 −1
  2064. arch/mips/kernel/signal32.c +1 −0
  2065. arch/mips/kernel/signal_n32.c +1 −3
  2066. arch/mips/kernel/signal_o32.c +1 −0
  2067. arch/mips/kernel/smp-bmips.c +2 −2
  2068. arch/mips/kernel/smp-cps.c +5 −5
  2069. arch/mips/kernel/smp.c +5 −2
  2070. arch/mips/kernel/spram.c +1 −0
  2071. arch/mips/kernel/syscall.c +1 −0
  2072. arch/mips/kernel/syscalls/syscall_n32.tbl +5 −0
  2073. arch/mips/kernel/syscalls/syscall_n64.tbl +5 −0
  2074. arch/mips/kernel/syscalls/syscall_o32.tbl +5 −0
  2075. arch/mips/kernel/traps.c +28 −67
  2076. arch/mips/kernel/unaligned.c +1 −0
  2077. arch/mips/kernel/vpe.c +2 −2
  2078. arch/mips/kvm/Kconfig +2 −4
  2079. arch/mips/kvm/emulate.c +1 −1
  2080. arch/mips/loongson2ef/common/platform.c +1 −1
  2081. arch/mips/loongson64/env.c +9 −1
  2082. arch/mips/loongson64/init.c +31 −16
  2083. arch/mips/loongson64/reset.c +2 −2
  2084. arch/mips/loongson64/smp.c +2 −2
  2085. arch/mips/mm/c-r4k.c +2 −6
  2086. arch/mips/mm/cache.c +3 −12
  2087. arch/mips/mm/cex-gen.S +1 −1
  2088. arch/mips/mm/dma-noncoherent.c +1 −1
  2089. arch/mips/mm/fault.c +1 −0
  2090. arch/mips/mm/init.c +10 −7
  2091. arch/mips/mm/ioremap.c +4 −0
  2092. arch/mips/mm/pgtable-64.c +2 −0
  2093. arch/mips/mm/tlb-r3k.c +3 −3
  2094. arch/mips/mm/tlb-r4k.c +5 −3
  2095. arch/mips/mm/tlbex.c +2 −2
  2096. arch/mips/net/bpf_jit_comp32.c +1 −1
  2097. arch/mips/pci/ops-loongson2.c +1 −1
  2098. arch/mips/pci/pci-alchemy.c +1 −1
  2099. arch/mips/pci/pci-ar2315.c +1 −1
  2100. arch/mips/pci/pci-ip27.c +3 −0
  2101. arch/mips/pci/pci-lantiq.c +1 −1
  2102. arch/mips/pci/pci-octeon.c +1 −1
  2103. arch/mips/pci/pci-xtalk-bridge.c +1 −1
  2104. arch/mips/pci/pcie-octeon.c +1 −1
  2105. arch/mips/power/cpu.c +1 −0
  2106. arch/mips/power/hibernate.c +1 −0
  2107. arch/mips/ralink/mt7621.c +1 −1
  2108. arch/mips/sgi-ip27/ip27-hubio.c +1 −1
  2109. arch/mips/txx9/generic/pci.c +1 −1
  2110. arch/mips/vdso/vgettimeofday.c +1 −0
  2111. arch/nios2/Kconfig +1 −1
  2112. arch/nios2/include/asm/cacheflush.h +1 −0
  2113. arch/nios2/include/asm/traps.h +2 −0
  2114. arch/parisc/include/asm/bug.h +1 −1
  2115. arch/parisc/include/asm/cacheflush.h +1 −0
  2116. arch/parisc/include/asm/io.h +0 −8
  2117. arch/parisc/kernel/firmware.c +2 −2
  2118. arch/parisc/kernel/kexec_file.c +4 −4
  2119. arch/parisc/kernel/syscalls/syscall.tbl +5 −0
  2120. arch/parisc/mm/init.c +1 −0
  2121. arch/parisc/video/fbdev.c +1 −1
  2122. arch/powerpc/Kconfig +5 −3
  2123. arch/powerpc/Kconfig.debug +0 −1
  2124. arch/powerpc/Makefile +18 −7
  2125. arch/powerpc/boot/dts/fsl/t1023si-post.dtsi +40 −39
  2126. arch/powerpc/boot/dts/fsl/t1040si-post.dtsi +36 −35
  2127. arch/powerpc/configs/ppc64_defconfig +1 −0
  2128. arch/powerpc/configs/ppc6xx_defconfig +0 −1
  2129. arch/powerpc/configs/ps3_defconfig +1 −0
  2130. arch/powerpc/configs/skiroot_defconfig +0 −1
  2131. arch/powerpc/crypto/aes-gcm-p10-glue.c +1 −1
  2132. arch/powerpc/include/asm/book3s/64/pgtable.h +2 −8
  2133. arch/powerpc/include/asm/book3s/64/tlbflush.h +2 −7
  2134. arch/powerpc/include/asm/ftrace.h +1 −1
  2135. arch/powerpc/include/asm/hvcall.h +10 −10
  2136. arch/powerpc/include/asm/hvconsole.h +2 −2
  2137. arch/powerpc/include/asm/hvsi.h +10 −8
  2138. arch/powerpc/include/asm/io.h +0 −7
  2139. arch/powerpc/include/asm/irq_work.h +0 −1
  2140. arch/powerpc/include/asm/kvm_book3s.h +7 −3
  2141. arch/powerpc/include/asm/kvm_book3s_64.h +1 −0
  2142. arch/powerpc/include/asm/kvm_host.h +0 −2
  2143. arch/powerpc/include/asm/linkage.h +0 −3
  2144. arch/powerpc/include/asm/mmu.h +4 −0
  2145. arch/powerpc/include/asm/mmzone.h +0 −8
  2146. arch/powerpc/include/asm/opal.h +5 −3
  2147. arch/powerpc/include/asm/papr-sysparm.h +11 −6
  2148. arch/powerpc/include/asm/paravirt.h +25 −8
  2149. arch/powerpc/include/asm/ppc-pci.h +3 −2
  2150. arch/powerpc/include/asm/ps3.h +6 −0
  2151. arch/powerpc/include/asm/reg.h +1 −0
  2152. arch/powerpc/include/asm/reg_a2.h +0 −154
  2153. arch/powerpc/include/asm/rtas.h +51 −40
  2154. arch/powerpc/include/uapi/asm/papr-miscdev.h +9 −0
  2155. arch/powerpc/include/uapi/asm/papr-sysparm.h +58 −0
  2156. arch/powerpc/include/uapi/asm/papr-vpd.h +22 −0
  2157. arch/powerpc/kernel/cpu_specs_book3s_64.h +15 −0
  2158. arch/powerpc/kernel/cputable.c +2 −2
  2159. arch/powerpc/kernel/exceptions-64e.S +0 −1
  2160. arch/powerpc/kernel/firmware.c +2 −0
  2161. arch/powerpc/kernel/fpu.S +13 −0
  2162. arch/powerpc/kernel/interrupt.c +1 −0
  2163. arch/powerpc/kernel/process.c +3 −3
  2164. arch/powerpc/kernel/rtas.c +158 −49
  2165. arch/powerpc/kernel/rtas_pci.c +4 −4
  2166. arch/powerpc/kernel/smp.c +70 −54
  2167. arch/powerpc/kernel/swsusp_64.c +2 −0
  2168. arch/powerpc/kernel/syscalls/syscall.tbl +5 −0
  2169. arch/powerpc/kernel/trace/ftrace_entry.S +2 −4
  2170. arch/powerpc/kernel/traps.c +2 −0
  2171. arch/powerpc/kernel/udbg_16550.c +0 −1
  2172. arch/powerpc/kernel/vdso/Makefile +1 −1
  2173. arch/powerpc/kernel/vector.S +2 −0
  2174. arch/powerpc/kexec/core.c +1 −0
  2175. arch/powerpc/kexec/core_64.c +1 −2
  2176. arch/powerpc/kexec/elf_64.c +4 −4
  2177. arch/powerpc/kexec/file_load_64.c +9 −9
  2178. arch/powerpc/kvm/Kconfig +5 −9
  2179. arch/powerpc/kvm/book3s.c +2 −2
  2180. arch/powerpc/kvm/book3s_64_mmu_radix.c +6 −1
  2181. arch/powerpc/kvm/book3s_64_vio.c +1 −0
  2182. arch/powerpc/kvm/book3s_hv.c +52 −22
  2183. arch/powerpc/kvm/book3s_hv_nested.c +1 −1
  2184. arch/powerpc/kvm/book3s_hv_nestedv2.c +29 −0
  2185. arch/powerpc/kvm/book3s_pr.c +1 −0
  2186. arch/powerpc/kvm/emulate_loadstore.c +10 −11
  2187. arch/powerpc/kvm/powerpc.c +2 −8
  2188. arch/powerpc/lib/Makefile +1 −1
  2189. arch/powerpc/lib/sstep.c +12 −2
  2190. arch/powerpc/mm/book3s64/hash_utils.c +7 −0
  2191. arch/powerpc/mm/book3s64/iommu_api.c +1 −1
  2192. arch/powerpc/mm/book3s64/pgtable.c +2 −0
  2193. arch/powerpc/mm/book3s64/pkeys.c +2 −1
  2194. arch/powerpc/mm/fault.c +2 −0
  2195. arch/powerpc/mm/hugetlbpage.c +1 −1
  2196. arch/powerpc/mm/init-common.c +3 −2
  2197. arch/powerpc/mm/mmu_decl.h +5 −0
  2198. arch/powerpc/perf/core-book3s.c +1 −1
  2199. arch/powerpc/perf/hv-gpci.c +3 −0
  2200. arch/powerpc/perf/imc-pmu.c +6 −0
  2201. arch/powerpc/platforms/44x/Kconfig +1 −0
  2202. arch/powerpc/platforms/44x/idle.c +1 −1
  2203. arch/powerpc/platforms/512x/mpc5121_ads_cpld.c +2 −0
  2204. arch/powerpc/platforms/512x/pdm360ng.c +1 −1
  2205. arch/powerpc/platforms/83xx/suspend.c +3 −2
  2206. arch/powerpc/platforms/85xx/mpc85xx_rdb.c +1 −1
  2207. arch/powerpc/platforms/86xx/Kconfig +0 −7
  2208. arch/powerpc/platforms/cell/spufs/inode.c +3 −2
  2209. arch/powerpc/platforms/pasemi/setup.c +1 −1
  2210. arch/powerpc/platforms/powermac/smp.c +2 −2
  2211. arch/powerpc/platforms/powernv/opal-irqchip.c +2 −0
  2212. arch/powerpc/platforms/powernv/opal-powercap.c +6 −0
  2213. arch/powerpc/platforms/powernv/opal-prd.c +2 −0
  2214. arch/powerpc/platforms/powernv/opal-xscom.c +5 −0
  2215. arch/powerpc/platforms/powernv/opal.c +8 −6
  2216. arch/powerpc/platforms/powernv/pci-ioda.c +1 −1
  2217. arch/powerpc/platforms/powernv/subcore.c +2 −1
  2218. arch/powerpc/platforms/ps3/Kconfig +0 −12
  2219. arch/powerpc/platforms/ps3/Makefile +1 −1
  2220. arch/powerpc/platforms/ps3/device-init.c +1 −0
  2221. arch/powerpc/platforms/ps3/gelic_udbg.c +1 −0
  2222. arch/powerpc/platforms/pseries/Makefile +1 −0
  2223. arch/powerpc/platforms/pseries/eeh_pseries.c +9 −9
  2224. arch/powerpc/platforms/pseries/hotplug-memory.c +11 −5
  2225. arch/powerpc/platforms/pseries/hvconsole.c +2 −2
  2226. arch/powerpc/platforms/pseries/papr-sysparm.c +203 −2
  2227. arch/powerpc/platforms/pseries/papr-vpd.c +541 −0
  2228. arch/powerpc/platforms/pseries/pseries.h +1 −0
  2229. arch/powerpc/platforms/pseries/suspend.c +1 −0
  2230. arch/powerpc/platforms/pseries/vas.c +44 −7
  2231. arch/powerpc/platforms/pseries/vas.h +2 −0
  2232. arch/powerpc/sysdev/fsl_pci.c +2 −2
  2233. arch/powerpc/sysdev/grackle.c +0 −19
  2234. arch/powerpc/sysdev/xics/icp-native.c +2 −0
  2235. arch/riscv/Kconfig +85 −9
  2236. arch/riscv/Kconfig.errata +20 −0
  2237. arch/riscv/Makefile +5 −3
  2238. arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts +21 −7
  2239. arch/riscv/boot/dts/microchip/mpfs-m100pfsevp.dts +0 −7
  2240. arch/riscv/boot/dts/microchip/mpfs-polarberry.dts +0 −7
  2241. arch/riscv/boot/dts/microchip/mpfs-sev-kit.dts +0 −7
  2242. arch/riscv/boot/dts/microchip/mpfs-tysom-m.dts +0 −7
  2243. arch/riscv/boot/dts/microchip/mpfs.dtsi +18 −0
  2244. arch/riscv/boot/dts/renesas/r9a07g043f.dtsi +4 −0
  2245. arch/riscv/boot/dts/sophgo/Makefile +1 −0
  2246. arch/riscv/boot/dts/sophgo/cv1800b.dtsi +7 −112
  2247. arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts +48 −0
  2248. arch/riscv/boot/dts/sophgo/cv1812h.dtsi +24 −0
  2249. arch/riscv/boot/dts/sophgo/cv18xx.dtsi +192 −0
  2250. arch/riscv/boot/dts/starfive/jh7100-common.dtsi +131 −0
  2251. arch/riscv/boot/dts/starfive/jh7100.dtsi +44 −4
  2252. arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts +20 −0
  2253. arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi +20 −0
  2254. arch/riscv/boot/dts/thead/th1520.dtsi +34 −0
  2255. arch/riscv/configs/defconfig +1 −0
  2256. arch/riscv/configs/rv32_defconfig +0 −139
  2257. arch/riscv/errata/andes/errata.c +13 −7
  2258. arch/riscv/errata/thead/errata.c +67 −2
  2259. arch/riscv/include/asm/arch_hweight.h +78 −0
  2260. arch/riscv/include/asm/archrandom.h +72 −0
  2261. arch/riscv/include/asm/asm-extable.h +15 −0
  2262. arch/riscv/include/asm/asm-prototypes.h +27 −0
  2263. arch/riscv/include/asm/bitops.h +3 −1
  2264. arch/riscv/include/asm/cacheflush.h +2 −1
  2265. arch/riscv/include/asm/cfi.h +2 −1
  2266. arch/riscv/include/asm/checksum.h +93 −0
  2267. arch/riscv/include/asm/cpu_ops.h +2 −12
  2268. arch/riscv/include/asm/cpufeature.h +5 −1
  2269. arch/riscv/include/asm/csr.h +9 −0
  2270. arch/riscv/include/asm/entry-common.h +17 −0
  2271. arch/riscv/include/asm/errata_list.h +6 −44
  2272. arch/riscv/include/asm/ftrace.h +17 −1
  2273. arch/riscv/include/asm/hwcap.h +31 −7
  2274. arch/riscv/include/asm/hwprobe.h +24 −0
  2275. arch/riscv/include/asm/irq_work.h +1 −1
  2276. arch/riscv/include/asm/kfence.h +2 −2
  2277. arch/riscv/include/asm/kvm_host.h +10 −2
  2278. arch/riscv/include/asm/kvm_vcpu_sbi.h +16 −4
  2279. arch/riscv/include/asm/paravirt.h +28 −0
  2280. arch/riscv/include/asm/paravirt_api_clock.h +1 −0
  2281. arch/riscv/include/asm/pgtable-64.h +5 −17
  2282. arch/riscv/include/asm/pgtable.h +11 −27
  2283. arch/riscv/include/asm/processor.h +41 −2
  2284. arch/riscv/include/asm/sbi.h +36 −0
  2285. arch/riscv/include/asm/sections.h +1 −0
  2286. arch/riscv/include/asm/simd.h +64 −0
  2287. arch/riscv/include/asm/switch_to.h +1 −2
  2288. arch/riscv/include/asm/syscall_wrapper.h +0 −5
  2289. arch/riscv/include/asm/thread_info.h +2 −1
  2290. arch/riscv/include/asm/tlbbatch.h +15 −0
  2291. arch/riscv/include/asm/tlbflush.h +9 −0
  2292. arch/riscv/include/asm/topology.h +1 −0
  2293. arch/riscv/include/asm/vector.h +79 −11
  2294. arch/riscv/include/asm/word-at-a-time.h +27 −0
  2295. arch/riscv/include/asm/xip_fixup.h +1 −1
  2296. arch/riscv/include/asm/xor.h +68 −0
  2297. arch/riscv/include/uapi/asm/hwprobe.h +32 −0
  2298. arch/riscv/include/uapi/asm/kvm.h +13 −0
  2299. arch/riscv/kernel/Makefile +4 −1
  2300. arch/riscv/kernel/cfi.c +1 −1
  2301. arch/riscv/kernel/cpu-hotplug.c +6 −13
  2302. arch/riscv/kernel/cpu_ops.c +5 −9
  2303. arch/riscv/kernel/cpu_ops_sbi.c +0 −19
  2304. arch/riscv/kernel/cpu_ops_spinwait.c +0 −11
  2305. arch/riscv/kernel/cpufeature.c +255 −30
  2306. arch/riscv/kernel/crash_core.c +3 −1
  2307. arch/riscv/kernel/efi.c +1 −1
  2308. arch/riscv/kernel/elf_kexec.c +6 −5
  2309. arch/riscv/kernel/entry.S +8 −0
  2310. arch/riscv/kernel/ftrace.c +13 −17
  2311. arch/riscv/kernel/head.S +5 −3
  2312. arch/riscv/kernel/kernel_mode_vector.c +247 −0
  2313. arch/riscv/kernel/machine_kexec.c +0 −26
  2314. arch/riscv/kernel/mcount-dyn.S +162 −38
  2315. arch/riscv/kernel/mcount.S +1 −1
  2316. arch/riscv/kernel/module.c +106 −35
  2317. arch/riscv/kernel/paravirt.c +135 −0
  2318. arch/riscv/kernel/patch.c +10 −1
  2319. arch/riscv/kernel/pi/cmdline_early.c +1 −2
  2320. arch/riscv/kernel/process.c +12 −1
  2321. arch/riscv/kernel/ptrace.c +5 −2
  2322. arch/riscv/kernel/sbi.c +66 −0
  2323. arch/riscv/kernel/setup.c +2 −17
  2324. arch/riscv/kernel/signal.c +6 −3
  2325. arch/riscv/kernel/smp.c +1 −1
  2326. arch/riscv/kernel/smpboot.c +10 −28
  2327. arch/riscv/kernel/suspend.c +44 −0
  2328. arch/riscv/kernel/sys_hwprobe.c +411 −0
  2329. arch/riscv/kernel/sys_riscv.c +0 −285
  2330. arch/riscv/kernel/tests/module_test/test_uleb128.S +4 −4
  2331. arch/riscv/kernel/time.c +3 −0
  2332. arch/riscv/kernel/traps_misaligned.c +5 −7
  2333. arch/riscv/kernel/vdso/hwprobe.c +75 −11
  2334. arch/riscv/kernel/vdso/vgettimeofday.c +1 −6
  2335. arch/riscv/kernel/vector.c +45 −8
  2336. arch/riscv/kernel/vmlinux-xip.lds.S +2 −0
  2337. arch/riscv/kernel/vmlinux.lds.S +2 −0
  2338. arch/riscv/kvm/Kconfig +3 −4
  2339. arch/riscv/kvm/Makefile +1 −0
  2340. arch/riscv/kvm/aia_imsic.c +13 −0
  2341. arch/riscv/kvm/mmu.c +11 −11
  2342. arch/riscv/kvm/vcpu.c +8 −2
  2343. arch/riscv/kvm/vcpu_onereg.c +104 −31
  2344. arch/riscv/kvm/vcpu_sbi.c +110 −32
  2345. arch/riscv/kvm/vcpu_sbi_replace.c +1 −1
  2346. arch/riscv/kvm/vcpu_sbi_sta.c +208 −0
  2347. arch/riscv/kvm/vcpu_switch.S +14 −18
  2348. arch/riscv/kvm/vcpu_vector.c +16 −0
  2349. arch/riscv/kvm/vm.c +0 −1
  2350. arch/riscv/lib/Makefile +6 −0
  2351. arch/riscv/lib/clear_page.S +1 −1
  2352. arch/riscv/lib/csum.c +328 −0
  2353. arch/riscv/lib/riscv_v_helpers.c +45 −0
  2354. arch/riscv/lib/tishift.S +1 −1
  2355. arch/riscv/lib/uaccess.S +11 −1
  2356. arch/riscv/lib/uaccess_vector.S +53 −0
  2357. arch/riscv/lib/xor.S +81 −0
  2358. arch/riscv/mm/Makefile +1 −2
  2359. arch/riscv/mm/dma-noncoherent.c +1 −1
  2360. arch/riscv/mm/extable.c +31 −0
  2361. arch/riscv/mm/fault.c +10 −8
  2362. arch/riscv/mm/hugetlbpage.c +6 −6
  2363. arch/riscv/mm/init.c +30 −3
  2364. arch/riscv/mm/kasan_init.c +32 −21
  2365. arch/riscv/mm/pageattr.c +30 −25
  2366. arch/riscv/mm/pgtable.c +46 −5
  2367. arch/riscv/mm/tlbflush.c +54 −20
  2368. arch/riscv/net/bpf_jit_comp64.c +15 −10
  2369. arch/s390/Kconfig +7 −7
  2370. arch/s390/boot/ipl_parm.c +1 −1
  2371. arch/s390/boot/startup.c +2 −1
  2372. arch/s390/configs/debug_defconfig +8 −7
  2373. arch/s390/configs/defconfig +8 −6
  2374. arch/s390/configs/zfcpdump_defconfig +1 −3
  2375. arch/s390/crypto/aes_s390.c +3 −1
  2376. arch/s390/crypto/chacha-glue.c +1 −1
  2377. arch/s390/crypto/paes_s390.c +3 −1
  2378. arch/s390/include/asm/ap.h +12 −9
  2379. arch/s390/include/asm/ctlreg.h +14 −10
  2380. arch/s390/include/asm/facility.h +6 −0
  2381. arch/s390/include/asm/fpu/api.h +22 −15
  2382. arch/s390/include/asm/fpu/internal.h +8 −2
  2383. arch/s390/include/asm/irq_work.h +0 −2
  2384. arch/s390/include/asm/kvm_host.h +1 −1
  2385. arch/s390/include/asm/pci_io.h +18 −14
  2386. arch/s390/include/asm/pgtable.h +1 −0
  2387. arch/s390/include/asm/processor.h +26 −8
  2388. arch/s390/include/asm/setup.h +0 −2
  2389. arch/s390/include/asm/syscall_wrapper.h +1 −12
  2390. arch/s390/include/asm/sysinfo.h +4 −0
  2391. arch/s390/kernel/Makefile +1 −1
  2392. arch/s390/kernel/compat_signal.c +7 −9
  2393. arch/s390/kernel/crash_dump.c +3 −2
  2394. arch/s390/kernel/early.c +1 −11
  2395. arch/s390/kernel/facility.c +21 −0
  2396. arch/s390/kernel/fpu.c +6 −7
  2397. arch/s390/kernel/machine_kexec.c +1 −1
  2398. arch/s390/kernel/nmi.c +6 −4
  2399. arch/s390/kernel/perf_pai_crypto.c +43 −37
  2400. arch/s390/kernel/perf_pai_ext.c +43 −36
  2401. arch/s390/kernel/perf_regs.c +4 −2
  2402. arch/s390/kernel/process.c +1 −1
  2403. arch/s390/kernel/processor.c +2 −5
  2404. arch/s390/kernel/ptrace.c +13 −16
  2405. arch/s390/kernel/setup.c +4 −21
  2406. arch/s390/kernel/signal.c +5 −8
  2407. arch/s390/kernel/smp.c +3 −3
  2408. arch/s390/kernel/syscalls/syscall.tbl +5 −0
  2409. arch/s390/kernel/sysinfo.c +10 −0
  2410. arch/s390/kernel/traps.c +14 −1
  2411. arch/s390/kernel/vmlinux.lds.S +1 −0
  2412. arch/s390/kvm/Kconfig +1 −4
  2413. arch/s390/kvm/guestdbg.c +2 −2
  2414. arch/s390/kvm/interrupt.c +1 −1
  2415. arch/s390/kvm/kvm-s390.c +8 −19
  2416. arch/s390/kvm/vsie.c +17 −6
  2417. arch/s390/lib/test_unwind.c +3 −3
  2418. arch/s390/mm/fault.c +4 −3
  2419. arch/s390/mm/pgtable.c +11 −20
  2420. arch/s390/net/bpf_jit_comp.c +37 −24
  2421. arch/s390/pci/pci_mmio.c +6 −6
  2422. arch/s390/tools/gen_facilities.c +1 −0
  2423. arch/sh/boards/mach-ecovec24/setup.c +1 −1
  2424. arch/sh/configs/sdk7786_defconfig +2 −1
  2425. arch/sh/configs/titan_defconfig +0 −1
  2426. arch/sh/include/asm/cacheflush.h +1 −0
  2427. arch/sh/include/asm/io.h +0 −9
  2428. arch/sh/include/asm/kexec.h +2 −2
  2429. arch/sh/include/asm/traps_32.h +3 −0
  2430. arch/sh/kernel/Makefile +1 −1
  2431. arch/sh/kernel/reboot.c +2 −2
  2432. arch/sh/kernel/setup.c +1 −1
  2433. arch/sh/kernel/syscalls/syscall.tbl +5 −0
  2434. arch/sh/kernel/vsyscall/Makefile +2 −3
  2435. arch/sh/mm/Kconfig +1 −1
  2436. arch/sparc/Kconfig +1 −1
  2437. arch/sparc/boot/Makefile +5 −5
  2438. arch/sparc/include/asm/cacheflush_32.h +1 −0
  2439. arch/sparc/include/asm/cacheflush_64.h +1 −0
  2440. arch/sparc/include/asm/io_64.h +0 −7
  2441. arch/sparc/include/asm/pgtable_64.h +1 −0
  2442. arch/sparc/kernel/Makefile +0 −1
  2443. arch/sparc/kernel/asm-offsets.c +3 −3
  2444. arch/sparc/kernel/pci_sabre.c +5 −4
  2445. arch/sparc/kernel/pci_schizo.c +7 −6
  2446. arch/sparc/kernel/pci_sun4v.c +1 −1
  2447. arch/sparc/kernel/syscalls/syscall.tbl +5 −0
  2448. arch/sparc/kernel/traps_32.c +1 −0
  2449. arch/sparc/kernel/traps_64.c +2 −1
  2450. arch/sparc/lib/Makefile +0 −1
  2451. arch/sparc/mm/Makefile +0 −1
  2452. arch/sparc/mm/tsb.c +2 −2
  2453. arch/sparc/prom/Makefile +0 −1
  2454. arch/sparc/vdso/Makefile +4 −14
  2455. arch/um/Makefile-skas +5 −0
  2456. arch/um/drivers/chan.h +1 −1
  2457. arch/um/drivers/chan_kern.c +4 −5
  2458. arch/um/drivers/chan_user.c +26 −20
  2459. arch/um/drivers/chan_user.h +5 −4
  2460. arch/um/drivers/line.c +9 −6
  2461. arch/um/drivers/line.h +3 −3
  2462. arch/um/drivers/net_kern.c +1 −1
  2463. arch/um/drivers/null.c +1 −1
  2464. arch/um/drivers/ubd_kern.c +0 −1
  2465. arch/um/drivers/virt-pci.c +1 −1
  2466. arch/um/include/asm/mmu.h +0 −1
  2467. arch/um/include/asm/processor-generic.h +0 −1
  2468. arch/um/include/shared/kern_util.h +2 −3
  2469. arch/um/include/shared/os.h +0 −3
  2470. arch/um/include/shared/ptrace_user.h +0 −41
  2471. arch/um/include/shared/registers.h +0 −2
  2472. arch/um/kernel/process.c +3 −11
  2473. arch/um/kernel/ptrace.c +0 −2
  2474. arch/um/kernel/signal.c +0 −12
  2475. arch/um/kernel/skas/uaccess.c +3 −1
  2476. arch/um/kernel/time.c +27 −5
  2477. arch/um/kernel/um_arch.c +2 −2
  2478. arch/um/os-Linux/helper.c +3 −3
  2479. arch/um/os-Linux/registers.c +0 −20
  2480. arch/um/os-Linux/skas/process.c +36 −81
  2481. arch/um/os-Linux/start_up.c +18 −93
  2482. arch/um/os-Linux/util.c +17 −2
  2483. arch/x86/Kconfig +14 −9
  2484. arch/x86/Kconfig.cpu +5 −1
  2485. arch/x86/boot/compressed/Makefile +1 −1
  2486. arch/x86/boot/compressed/acpi.c +1 −1
  2487. arch/x86/boot/compressed/ident_map_64.c +5 −0
  2488. arch/x86/boot/compressed/idt_64.c +1 −0
  2489. arch/x86/boot/compressed/idt_handlers_64.S +1 −0
  2490. arch/x86/boot/compressed/mem.c +1 −1
  2491. arch/x86/boot/compressed/misc.h +1 −0
  2492. arch/x86/boot/pm.c +4 −3
  2493. arch/x86/boot/string.c +1 −1
  2494. arch/x86/coco/tdx/tdx-shared.c +3 −3
  2495. arch/x86/coco/tdx/tdx.c +2 −1
  2496. arch/x86/crypto/Kconfig +4 −4
  2497. arch/x86/crypto/aesni-intel_asm.S +1 −1
  2498. arch/x86/crypto/aesni-intel_avx-x86_64.S +1 −1
  2499. arch/x86/crypto/crc32c-pcl-intel-asm_64.S +1 −1
  2500. arch/x86/crypto/sha1_ssse3_glue.c +5 −2
  2501. arch/x86/crypto/sha256_ssse3_glue.c +5 −2
  2502. arch/x86/crypto/sha512-avx-asm.S +1 −1
  2503. arch/x86/crypto/sha512-ssse3-asm.S +1 −1
  2504. arch/x86/crypto/sm4-aesni-avx-asm_64.S +0 −52
  2505. arch/x86/crypto/sm4-aesni-avx2-asm_64.S +0 −55
  2506. arch/x86/crypto/sm4-avx.h +0 −4
  2507. arch/x86/crypto/sm4_aesni_avx2_glue.c +0 −26
  2508. arch/x86/crypto/sm4_aesni_avx_glue.c +0 −130
  2509. arch/x86/entry/calling.h +9 −3
  2510. arch/x86/entry/common.c +92 −1
  2511. arch/x86/entry/entry_64.S +22 −11
  2512. arch/x86/entry/entry_64_compat.S +0 −77
  2513. arch/x86/entry/syscalls/syscall_32.tbl +5 −0
  2514. arch/x86/entry/syscalls/syscall_64.tbl +5 −0
  2515. arch/x86/entry/vdso/vclock_gettime.c +1 −9
  2516. arch/x86/events/amd/brs.c +1 −1
  2517. arch/x86/events/amd/core.c +2 −2
  2518. arch/x86/events/amd/ibs.c +3 −0
  2519. arch/x86/events/core.c +2 −2
  2520. arch/x86/events/intel/core.c +129 −25
  2521. arch/x86/events/intel/cstate.c +125 −33
  2522. arch/x86/events/intel/ds.c +2 −2
  2523. arch/x86/events/intel/lbr.c +84 −1
  2524. arch/x86/events/intel/uncore.c +12 −0
  2525. arch/x86/events/intel/uncore.h +7 −3
  2526. arch/x86/events/intel/uncore_discovery.c +3 −2
  2527. arch/x86/events/intel/uncore_discovery.h +1 −1
  2528. arch/x86/events/intel/uncore_nhmex.c +1 −1
  2529. arch/x86/events/intel/uncore_snbep.c +163 −45
  2530. arch/x86/events/perf_event.h +12 −0
  2531. arch/x86/events/perf_event_flags.h +2 −0
  2532. arch/x86/hyperv/hv_apic.c +1 −1
  2533. arch/x86/hyperv/irqdomain.c +1 −1
  2534. arch/x86/hyperv/ivm.c +1 −1
  2535. arch/x86/include/asm/alternative.h +28 −2
  2536. arch/x86/include/asm/amd_nb.h +1 −1
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  2540. arch/x86/include/asm/cfi.h +125 −1
  2541. arch/x86/include/asm/cpu.h +0 −4
  2542. arch/x86/include/asm/cpufeatures.h +8 −2
  2543. arch/x86/include/asm/current.h +1 −0
  2544. arch/x86/include/asm/debugreg.h +1 −0
  2545. arch/x86/include/asm/desc_defs.h +65 −13
  2546. arch/x86/include/asm/elf.h +1 −1
  2547. arch/x86/include/asm/extable_fixup_types.h +1 −1
  2548. arch/x86/include/asm/fpu/types.h +3 −1
  2549. arch/x86/include/asm/ia32.h +17 −1
  2550. arch/x86/include/asm/idtentry.h +4 −0
  2551. arch/x86/include/asm/io.h +4 −4
  2552. arch/x86/include/asm/iosf_mbi.h +1 −1
  2553. arch/x86/include/asm/irq_work.h +0 −1
  2554. arch/x86/include/asm/kvm-x86-ops.h +3 −0
  2555. arch/x86/include/asm/kvm-x86-pmu-ops.h +1 −1
  2556. arch/x86/include/asm/kvm_host.h +64 −13
  2557. arch/x86/include/asm/mce.h +3 −1
  2558. arch/x86/include/asm/msr-index.h +8 −0
  2559. arch/x86/include/asm/mwait.h +18 −2
  2560. arch/x86/include/asm/nospec-branch.h +2 −2
  2561. arch/x86/include/asm/paravirt.h +27 −56
  2562. arch/x86/include/asm/paravirt_types.h +27 −61
  2563. arch/x86/include/asm/percpu.h +1 −1
  2564. arch/x86/include/asm/perf_event.h +4 −0
  2565. arch/x86/include/asm/pgtable.h +1 −6
  2566. arch/x86/include/asm/pgtable_64.h +1 −1
  2567. arch/x86/include/asm/preempt.h +0 −1
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  2569. arch/x86/include/asm/proto.h +0 −4
  2570. arch/x86/include/asm/qspinlock_paravirt.h +2 −2
  2571. arch/x86/include/asm/setup.h +0 −2
  2572. arch/x86/include/asm/shared/tdx.h +6 −0
  2573. arch/x86/include/asm/syscall_wrapper.h +4 −30
  2574. arch/x86/include/asm/tdx.h +38 −0
  2575. arch/x86/include/asm/text-patching.h +0 −12
  2576. arch/x86/include/asm/traps.h +0 −1
  2577. arch/x86/include/asm/uv/uv_hub.h +1 −1
  2578. arch/x86/include/asm/vdso/gettimeofday.h +1 −3
  2579. arch/x86/include/asm/xen/interface_64.h +1 −1
  2580. arch/x86/include/uapi/asm/amd_hsmp.h +1 −1
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  2812. drivers/accel/qaic/qaic_data.c +3 −5
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  2816. drivers/acpi/acpi_lpit.c +1 −1
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  3530. drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c +1 −1
  3531. drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c +80 −14
  3532. drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.h +11 −0
  3533. drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c +5 −5
  3534. drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c +1 −1
  3535. drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c +92 −16
  3536. drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c +91 −100
  3537. drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.c +35 −11
  3538. drivers/gpu/drm/amd/display/dc/core/dc.c +158 −240
  3539. drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c +120 −67
  3540. drivers/gpu/drm/amd/display/dc/core/dc_link_exports.c +8 −1
  3541. drivers/gpu/drm/amd/display/dc/core/dc_resource.c +105 −382
  3542. drivers/gpu/drm/amd/display/dc/core/dc_state.c +867 −0
.clang-format+73−19
@@ -82,11 +82,16 @@ ForEachMacros: · 81 unmodified lines
8282 - '__for_each_thread'
8383 - '__hlist_for_each_rcu'
8484 - '__map__for_each_symbol_by_name'
85+ - '__pci_bus_for_each_res0'
86+ - '__pci_bus_for_each_res1'
87+ - '__pci_dev_for_each_res0'
88+ - '__pci_dev_for_each_res1'
8589 - '__perf_evlist__for_each_entry'
8690 - '__perf_evlist__for_each_entry_reverse'
8791 - '__perf_evlist__for_each_entry_safe'
8892 - '__rq_for_each_bio'
8993 - '__shost_for_each_device'
94+ - '__sym_for_each'
9095 - 'apei_estatus_for_each_section'
9196 - 'ata_for_each_dev'
9297 - 'ata_for_each_link'
@@ -105,13 +110,12 @@ ForEachMacros: · 12 unmodified lines
105110 - 'bip_for_each_vec'
106111 - 'bond_for_each_slave'
107112 - 'bond_for_each_slave_rcu'
108− - 'bpf__perf_for_each_map'
109− - 'bpf__perf_for_each_map_named'
113+ - 'bpf_for_each'
114+ - 'bpf_for_each_reg_in_vstate'
115+ - 'bpf_for_each_reg_in_vstate_mask'
110116 - 'bpf_for_each_spilled_reg'
111117 - 'bpf_object__for_each_map'
112118 - 'bpf_object__for_each_program'
113− - 'bpf_object__for_each_safe'
114− - 'bpf_perf_object__for_each'
115119 - 'btree_for_each_safe128'
116120 - 'btree_for_each_safe32'
117121 - 'btree_for_each_safe64'
@@ -119,6 +123,7 @@ ForEachMacros: · 1 unmodified line
119123 - 'card_for_each_dev'
120124 - 'cgroup_taskset_for_each'
121125 - 'cgroup_taskset_for_each_leader'
126+ - 'cpu_aggr_map__for_each_idx'
122127 - 'cpufreq_for_each_efficient_entry_idx'
123128 - 'cpufreq_for_each_entry'
124129 - 'cpufreq_for_each_entry_idx'
@@ -128,11 +133,14 @@ ForEachMacros: · 3 unmodified lines
128133 - 'css_for_each_descendant_post'
129134 - 'css_for_each_descendant_pre'
130135 - 'damon_for_each_region'
136+ - 'damon_for_each_region_from'
131137 - 'damon_for_each_region_safe'
132138 - 'damon_for_each_scheme'
133139 - 'damon_for_each_scheme_safe'
134140 - 'damon_for_each_target'
135141 - 'damon_for_each_target_safe'
142+ - 'damos_for_each_filter'
143+ - 'damos_for_each_filter_safe'
136144 - 'data__for_each_file'
137145 - 'data__for_each_file_new'
138146 - 'data__for_each_file_start'
@@ -151,6 +159,8 @@ ForEachMacros: · 12 unmodified lines
151159 - 'drm_client_for_each_connector_iter'
152160 - 'drm_client_for_each_modeset'
153161 - 'drm_connector_for_each_possible_encoder'
162+ - 'drm_exec_for_each_locked_object'
163+ - 'drm_exec_for_each_locked_object_reverse'
154164 - 'drm_for_each_bridge_in_chain'
155165 - 'drm_for_each_connector_iter'
156166 - 'drm_for_each_crtc'
@@ -162,22 +172,32 @@ ForEachMacros: · 5 unmodified lines
162172 - 'drm_for_each_plane'
163173 - 'drm_for_each_plane_mask'
164174 - 'drm_for_each_privobj'
175+ - 'drm_gem_for_each_gpuva'
176+ - 'drm_gem_for_each_gpuva_safe'
177+ - 'drm_gpuva_for_each_op'
178+ - 'drm_gpuva_for_each_op_from_reverse'
179+ - 'drm_gpuva_for_each_op_safe'
180+ - 'drm_gpuvm_for_each_va'
181+ - 'drm_gpuvm_for_each_va_range'
182+ - 'drm_gpuvm_for_each_va_range_safe'
183+ - 'drm_gpuvm_for_each_va_safe'
165184 - 'drm_mm_for_each_hole'
166185 - 'drm_mm_for_each_node'
167186 - 'drm_mm_for_each_node_in_range'
168187 - 'drm_mm_for_each_node_safe'
169188 - 'dsa_switch_for_each_available_port'
170189 - 'dsa_switch_for_each_cpu_port'
190+ - 'dsa_switch_for_each_cpu_port_continue_reverse'
171191 - 'dsa_switch_for_each_port'
172192 - 'dsa_switch_for_each_port_continue_reverse'
173193 - 'dsa_switch_for_each_port_safe'
174194 - 'dsa_switch_for_each_user_port'
195+ - 'dsa_tree_for_each_cpu_port'
175196 - 'dsa_tree_for_each_user_port'
197+ - 'dsa_tree_for_each_user_port_continue_reverse'
176198 - 'dso__for_each_symbol'
177199 - 'dsos__for_each_with_build_id'
178200 - 'elf_hash_for_each_possible'
179− - 'elf_section__for_each_rel'
180− - 'elf_section__for_each_rela'
181201 - 'elf_symtab__for_each_symbol'
182202 - 'evlist__for_each_cpu'
183203 - 'evlist__for_each_entry'
@@ -186,12 +206,15 @@ ForEachMacros: · 2 unmodified lines
186206 - 'evlist__for_each_entry_reverse'
187207 - 'evlist__for_each_entry_safe'
188208 - 'flow_action_for_each'
209+ - 'for_each_acpi_consumer_dev'
189210 - 'for_each_acpi_dev_match'
190211 - 'for_each_active_dev_scope'
191212 - 'for_each_active_drhd_unit'
192213 - 'for_each_active_iommu'
193214 - 'for_each_active_route'
194215 - 'for_each_aggr_pgid'
216+ - 'for_each_and_bit'
217+ - 'for_each_andnot_bit'
195218 - 'for_each_available_child_of_node'
196219 - 'for_each_bench'
197220 - 'for_each_bio'
@@ -222,10 +245,13 @@ ForEachMacros: · 24 unmodified lines
222245 - 'for_each_compatible_node'
223246 - 'for_each_component_dais'
224247 - 'for_each_component_dais_safe'
248+ - 'for_each_conduit'
225249 - 'for_each_console'
226250 - 'for_each_console_srcu'
227251 - 'for_each_cpu'
228252 - 'for_each_cpu_and'
253+ - 'for_each_cpu_andnot'
254+ - 'for_each_cpu_or'
229255 - 'for_each_cpu_wrap'
230256 - 'for_each_dapm_widgets'
231257 - 'for_each_dedup_cand'
@@ -254,9 +280,11 @@ ForEachMacros: · 22 unmodified lines
254280 - 'for_each_free_mem_range'
255281 - 'for_each_free_mem_range_reverse'
256282 - 'for_each_func_rsrc'
257− - 'for_each_group_device'
283+ - 'for_each_gpiochip_node'
258284 - 'for_each_group_evsel'
285+ - 'for_each_group_evsel_head'
259286 - 'for_each_group_member'
287+ - 'for_each_group_member_head'
260288 - 'for_each_hstate'
261289 - 'for_each_if'
262290 - 'for_each_inject_fn'
@@ -273,6 +301,7 @@ ForEachMacros: · 10 unmodified lines
273301 - 'for_each_lru'
274302 - 'for_each_matching_node'
275303 - 'for_each_matching_node_and_match'
304+ - 'for_each_media_entity_data_link'
276305 - 'for_each_mem_pfn_range'
277306 - 'for_each_mem_range'
278307 - 'for_each_mem_range_rev'
@@ -281,6 +310,8 @@ ForEachMacros: · 2 unmodified lines
281310 - 'for_each_memory'
282311 - 'for_each_migratetype_order'
283312 - 'for_each_missing_reg'
313+ - 'for_each_mle_subelement'
314+ - 'for_each_mod_mem_type'
284315 - 'for_each_net'
285316 - 'for_each_net_continue_reverse'
286317 - 'for_each_net_rcu'
@@ -288,6 +319,7 @@ ForEachMacros: · 1 unmodified line
288319 - 'for_each_netdev_continue'
289320 - 'for_each_netdev_continue_rcu'
290321 - 'for_each_netdev_continue_reverse'
322+ - 'for_each_netdev_dump'
291323 - 'for_each_netdev_feature'
292324 - 'for_each_netdev_in_bond_rcu'
293325 - 'for_each_netdev_rcu'
@@ -308,6 +340,7 @@ ForEachMacros: · 14 unmodified lines
308340 - 'for_each_node_with_cpus'
309341 - 'for_each_node_with_property'
310342 - 'for_each_nonreserved_multicast_dest_pgid'
343+ - 'for_each_numa_hop_mask'
311344 - 'for_each_of_allnodes'
312345 - 'for_each_of_allnodes_from'
313346 - 'for_each_of_cpu_node'
@@ -326,6 +359,7 @@ ForEachMacros: · 12 unmodified lines
326359 - 'for_each_online_cpu'
327360 - 'for_each_online_node'
328361 - 'for_each_online_pgdat'
362+ - 'for_each_or_bit'
329363 - 'for_each_path'
330364 - 'for_each_pci_bridge'
331365 - 'for_each_pci_dev'
@@ -333,6 +367,7 @@ ForEachMacros: · 1 unmodified line
333367 - 'for_each_physmem_range'
334368 - 'for_each_populated_zone'
335369 - 'for_each_possible_cpu'
370+ - 'for_each_present_blessed_reg'
336371 - 'for_each_present_cpu'
337372 - 'for_each_prime_number'
338373 - 'for_each_prime_number_from'
@@ -348,7 +383,8 @@ ForEachMacros: · 9 unmodified lines
348383 - 'for_each_property_of_node'
349384 - 'for_each_reg'
350385 - 'for_each_reg_filtered'
351− - 'for_each_registered_fb'
386+ - 'for_each_reloc'
387+ - 'for_each_reloc_from'
352388 - 'for_each_requested_gpio'
353389 - 'for_each_requested_gpio_in_range'
354390 - 'for_each_reserved_mem_range'
@@ -357,10 +393,12 @@ ForEachMacros: · 2 unmodified lines
357393 - 'for_each_rtd_components'
358394 - 'for_each_rtd_cpu_dais'
359395 - 'for_each_rtd_dais'
396+ - 'for_each_sband_iftype_data'
360397 - 'for_each_script'
361398 - 'for_each_sec'
362399 - 'for_each_set_bit'
363400 - 'for_each_set_bit_from'
401+ - 'for_each_set_bit_wrap'
364402 - 'for_each_set_bitrange'
365403 - 'for_each_set_bitrange_from'
366404 - 'for_each_set_clump8'
@@ -371,8 +409,8 @@ ForEachMacros: · 4 unmodified lines
371409 - 'for_each_sgtable_dma_sg'
372410 - 'for_each_sgtable_page'
373411 - 'for_each_sgtable_sg'
374− - 'for_each_shell_test'
375412 - 'for_each_sibling_event'
413+ - 'for_each_sta_active_link'
376414 - 'for_each_subelement'
377415 - 'for_each_subelement_extid'
378416 - 'for_each_subelement_id'
@@ -380,10 +418,15 @@ ForEachMacros: · 1 unmodified line
380418 - 'for_each_subsystem'
381419 - 'for_each_supported_activate_fn'
382420 - 'for_each_supported_inject_fn'
421+ - 'for_each_sym'
383422 - 'for_each_test'
384423 - 'for_each_thread'
385424 - 'for_each_token'
386425 - 'for_each_unicast_dest_pgid'
426+ - 'for_each_valid_link'
427+ - 'for_each_vif_active_link'
428+ - 'for_each_vma'
429+ - 'for_each_vma_range'
387430 - 'for_each_vsi'
388431 - 'for_each_wakeup_source'
389432 - 'for_each_zone'
@@ -392,10 +435,12 @@ ForEachMacros: · 2 unmodified lines
392435 - 'func_for_each_insn'
393436 - 'fwnode_for_each_available_child_node'
394437 - 'fwnode_for_each_child_node'
438+ - 'fwnode_for_each_parent_node'
395439 - 'fwnode_graph_for_each_endpoint'
396440 - 'gadget_for_each_ep'
397441 - 'genradix_for_each'
398442 - 'genradix_for_each_from'
443+ - 'genradix_for_each_reverse'
399444 - 'hash_for_each'
400445 - 'hash_for_each_possible'
401446 - 'hash_for_each_possible_rcu'
@@ -439,14 +484,9 @@ ForEachMacros: · 37 unmodified lines
439484 - 'in_dev_for_each_ifa_rcu'
440485 - 'in_dev_for_each_ifa_rtnl'
441486 - 'inet_bind_bucket_for_each'
442− - 'inet_lhash2_for_each_icsk'
443− - 'inet_lhash2_for_each_icsk_continue'
444− - 'inet_lhash2_for_each_icsk_rcu'
445− - 'interval_tree_for_each_double_span'
446487 - 'interval_tree_for_each_span'
447488 - 'intlist__for_each_entry'
448489 - 'intlist__for_each_entry_safe'
449− - 'iopt_for_each_contig_area'
450490 - 'kcore_copy__for_each_phdr'
451491 - 'key_for_each'
452492 - 'key_for_each_safe'
@@ -483,28 +523,38 @@ ForEachMacros: · 30 unmodified lines
483523 - 'list_for_each_from'
484524 - 'list_for_each_prev'
485525 - 'list_for_each_prev_safe'
526+ - 'list_for_each_rcu'
527+ - 'list_for_each_reverse'
486528 - 'list_for_each_safe'
487529 - 'llist_for_each'
488530 - 'llist_for_each_entry'
489531 - 'llist_for_each_entry_safe'
490532 - 'llist_for_each_safe'
533+ - 'lwq_for_each_safe'
491534 - 'map__for_each_symbol'
492535 - 'map__for_each_symbol_by_name'
493− - 'map_for_each_event'
494− - 'map_for_each_metric'
495536 - 'maps__for_each_entry'
496537 - 'maps__for_each_entry_safe'
538+ - 'mas_for_each'
497539 - 'mci_for_each_dimm'
498540 - 'media_device_for_each_entity'
499541 - 'media_device_for_each_intf'
500542 - 'media_device_for_each_link'
501543 - 'media_device_for_each_pad'
544+ - 'media_entity_for_each_pad'
545+ - 'media_pipeline_for_each_entity'
546+ - 'media_pipeline_for_each_pad'
547+ - 'mlx5_lag_for_each_peer_mdev'
548+ - 'msi_domain_for_each_desc'
502549 - 'msi_for_each_desc'
550+ - 'mt_for_each'
503551 - 'nanddev_io_for_each_page'
504552 - 'netdev_for_each_lower_dev'
505553 - 'netdev_for_each_lower_private'
506554 - 'netdev_for_each_lower_private_rcu'
507555 - 'netdev_for_each_mc_addr'
556+ - 'netdev_for_each_synced_mc_addr'
557+ - 'netdev_for_each_synced_uc_addr'
508558 - 'netdev_for_each_uc_addr'
509559 - 'netdev_for_each_upper_dev_rcu'
510560 - 'netdev_hw_addr_list_for_each'
@@ -529,6 +579,7 @@ ForEachMacros: · 18 unmodified lines
529579 - 'perf_config_sections__for_each_entry'
530580 - 'perf_config_set__for_each_entry'
531581 - 'perf_cpu_map__for_each_cpu'
582+ - 'perf_cpu_map__for_each_idx'
532583 - 'perf_evlist__for_each_entry'
533584 - 'perf_evlist__for_each_entry_reverse'
534585 - 'perf_evlist__for_each_entry_safe'
@@ -538,9 +589,7 @@ ForEachMacros: · 3 unmodified lines
538589 - 'perf_hpp_list__for_each_format_safe'
539590 - 'perf_hpp_list__for_each_sort_list'
540591 - 'perf_hpp_list__for_each_sort_list_safe'
541− - 'perf_pmu__for_each_hybrid_pmu'
542− - 'ping_portaddr_for_each_entry'
543− - 'ping_portaddr_for_each_entry_rcu'
592+ - 'perf_tool_event__for_each_event'
544593 - 'plist_for_each'
545594 - 'plist_for_each_continue'
546595 - 'plist_for_each_entry'
@@ -577,6 +626,7 @@ ForEachMacros: · 30 unmodified lines
577626 - 'rq_for_each_segment'
578627 - 'rq_list_for_each'
579628 - 'rq_list_for_each_safe'
629+ - 'sample_read_group__for_each'
580630 - 'scsi_for_each_prot_sg'
581631 - 'scsi_for_each_sg'
582632 - 'sctp_for_each_hentry'
@@ -584,10 +634,12 @@ ForEachMacros: · 1 unmodified line
584634 - 'sec_for_each_insn'
585635 - 'sec_for_each_insn_continue'
586636 - 'sec_for_each_insn_from'
637+ - 'sec_for_each_sym'
587638 - 'shdma_for_each_chan'
588639 - 'shost_for_each_device'
589640 - 'sk_for_each'
590641 - 'sk_for_each_bound'
642+ - 'sk_for_each_bound_bhash2'
591643 - 'sk_for_each_entry_offset_rcu'
592644 - 'sk_for_each_from'
593645 - 'sk_for_each_rcu'
@@ -609,6 +661,8 @@ ForEachMacros: · 15 unmodified lines
609661 - 'tb_property_for_each'
610662 - 'tcf_act_for_each_action'
611663 - 'tcf_exts_for_each_action'
664+ - 'ttm_resource_manager_for_each_res'
665+ - 'twsk_for_each_bound_bhash2'
612666 - 'udp_portaddr_for_each_entry'
613667 - 'udp_portaddr_for_each_entry_rcu'
614668 - 'usb_hub_for_each_child'
.editorconfig+32−0
@@ -0,0 +1,32 @@
1+# SPDX-License-Identifier: GPL-2.0-only
2+
3+root = true
4+
5+[{*.{awk,c,dts,dtsi,dtso,h,mk,s,S},Kconfig,Makefile,Makefile.*}]
6+charset = utf-8
7+end_of_line = lf
8+trim_trailing_whitespace = true
9+insert_final_newline = true
10+indent_style = tab
11+indent_size = 8
12+
13+[*.{json,py,rs}]
14+charset = utf-8
15+end_of_line = lf
16+trim_trailing_whitespace = true
17+insert_final_newline = true
18+indent_style = space
19+indent_size = 4
20+
21+# this must be below the general *.py to overwrite it
22+[tools/{perf,power,rcu,testing/kunit}/**.py,]
23+indent_style = tab
24+indent_size = 8
25+
26+[*.yaml]
27+charset = utf-8
28+end_of_line = lf
29+trim_trailing_whitespace = unset
30+insert_final_newline = true
31+indent_style = space
32+indent_size = 2
.gitignore+1−0
@@ -96,6 +96,7 @@ modules.order · 95 unmodified lines
9696 #
9797 !.clang-format
9898 !.cocciconfig
99+!.editorconfig
99100 !.get_maintainer.ignore
100101 !.gitattributes
101102 !.gitignore
.mailmap+26−5
@@ -117,6 +117,7 @@ Changbin Du <changbin.du@intel.com> <changbin.du@gmail.com> · 116 unmodified lines
117117 Changbin Du <changbin.du@intel.com> <changbin.du@intel.com>
118118 Chao Yu <chao@kernel.org> <chao2.yu@samsung.com>
119119 Chao Yu <chao@kernel.org> <yuchao0@huawei.com>
120+Chester Lin <chester62515@gmail.com> <clin@suse.com>
120121 Chris Chiu <chris.chiu@canonical.com> <chiu@endlessm.com>
121122 Chris Chiu <chris.chiu@canonical.com> <chiu@endlessos.org>
122123 Chris Lew <quic_clew@quicinc.com> <clew@codeaurora.org>
@@ -190,6 +191,10 @@ Gao Xiang <xiang@kernel.org> <gaoxiang25@huawei.com> · 67 unmodified lines
190191 Gao Xiang <xiang@kernel.org> <hsiangkao@aol.com>
191192 Gao Xiang <xiang@kernel.org> <hsiangkao@linux.alibaba.com>
192193 Gao Xiang <xiang@kernel.org> <hsiangkao@redhat.com>
194+Geliang Tang <geliang.tang@linux.dev> <geliang.tang@suse.com>
195+Geliang Tang <geliang.tang@linux.dev> <geliangtang@xiaomi.com>
196+Geliang Tang <geliang.tang@linux.dev> <geliangtang@gmail.com>
197+Geliang Tang <geliang.tang@linux.dev> <geliangtang@163.com>
193198 Georgi Djakov <djakov@kernel.org> <georgi.djakov@linaro.org>
194199 Gerald Schaefer <gerald.schaefer@linux.ibm.com> <geraldsc@de.ibm.com>
195200 Gerald Schaefer <gerald.schaefer@linux.ibm.com> <gerald.schaefer@de.ibm.com>
@@ -265,6 +270,9 @@ Jens Osterkamp <Jens.Osterkamp@de.ibm.com> · 69 unmodified lines
265270 Jernej Skrabec <jernej.skrabec@gmail.com> <jernej.skrabec@siol.net>
266271 Jessica Zhang <quic_jesszhan@quicinc.com> <jesszhan@codeaurora.org>
267272 Jilai Wang <quic_jilaiw@quicinc.com> <jilaiw@codeaurora.org>
273+Jiri Kosina <jikos@kernel.org> <jikos@jikos.cz>
274+Jiri Kosina <jikos@kernel.org> <jkosina@suse.cz>
275+Jiri Kosina <jikos@kernel.org> <jkosina@suse.com>
268276 Jiri Pirko <jiri@resnulli.us> <jiri@nvidia.com>
269277 Jiri Pirko <jiri@resnulli.us> <jiri@mellanox.com>
270278 Jiri Pirko <jiri@resnulli.us> <jpirko@redhat.com>
@@ -355,7 +363,6 @@ Maheshwar Ajja <quic_majja@quicinc.com> <majja@codeaurora.org> · 84 unmodified lines
355363 Malathi Gottam <quic_mgottam@quicinc.com> <mgottam@codeaurora.org>
356364 Manikanta Pubbisetty <quic_mpubbise@quicinc.com> <mpubbise@codeaurora.org>
357365 Manivannan Sadhasivam <mani@kernel.org> <manivannanece23@gmail.com>
358−Manivannan Sadhasivam <mani@kernel.org> <manivannan.sadhasivam@linaro.org>
359366 Manoj Basapathi <quic_manojbm@quicinc.com> <manojbm@codeaurora.org>
360367 Marcin Nowakowski <marcin.nowakowski@mips.com> <marcin.nowakowski@imgtec.com>
361368 Marc Zyngier <maz@kernel.org> <marc.zyngier@arm.com>
@@ -369,7 +376,7 @@ Martin Kepplinger <martink@posteo.de> <martin.kepplinger@ginzinger.com> · 7 unmodified lines
369376 Martin Kepplinger <martink@posteo.de> <martin.kepplinger@puri.sm>
370377 Martin Kepplinger <martink@posteo.de> <martin.kepplinger@theobroma-systems.com>
371378 Martyna Szapar-Mudlaw <martyna.szapar-mudlaw@linux.intel.com> <martyna.szapar-mudlaw@intel.com>
372−Mathieu Othacehe <m.othacehe@gmail.com>
379+Mathieu Othacehe <m.othacehe@gmail.com> <othacehe@gnu.org>
373380 Mat Martineau <martineau@kernel.org> <mathew.j.martineau@linux.intel.com>
374381 Mat Martineau <martineau@kernel.org> <mathewm@codeaurora.org>
375382 Matthew Wilcox <willy@infradead.org> <matthew.r.wilcox@intel.com>
@@ -383,9 +390,10 @@ Matthias Fuchs <socketcan@esd.eu> <matthias.fuchs@esd.eu> · 7 unmodified lines
383390 Matthieu Baerts <matttbe@kernel.org> <matthieu.baerts@tessares.net>
384391 Matthieu CASTET <castet.matthieu@free.fr>
385392 Matti Vaittinen <mazziesaccount@gmail.com> <matti.vaittinen@fi.rohmeurope.com>
386−Matt Ranostay <matt.ranostay@konsulko.com> <matt@ranostay.consulting>
387−Matt Ranostay <mranostay@gmail.com> Matthew Ranostay <mranostay@embeddedalley.com>
388−Matt Ranostay <mranostay@gmail.com> <matt.ranostay@intel.com>
393+Matt Ranostay <matt@ranostay.sg> <matt.ranostay@konsulko.com>
394+Matt Ranostay <matt@ranostay.sg> <matt@ranostay.consulting>
395+Matt Ranostay <matt@ranostay.sg> Matthew Ranostay <mranostay@embeddedalley.com>
396+Matt Ranostay <matt@ranostay.sg> <matt.ranostay@intel.com>
389397 Matt Redfearn <matt.redfearn@mips.com> <matt.redfearn@imgtec.com>
390398 Maulik Shah <quic_mkshah@quicinc.com> <mkshah@codeaurora.org>
391399 Mauro Carvalho Chehab <mchehab@kernel.org> <maurochehab@gmail.com>
@@ -428,6 +436,7 @@ Muna Sinada <quic_msinada@quicinc.com> <msinada@codeaurora.org> · 36 unmodified lines
428436 Murali Nalajala <quic_mnalajal@quicinc.com> <mnalajal@codeaurora.org>
429437 Mythri P K <mythripk@ti.com>
430438 Nadia Yvette Chambers <nyc@holomorphy.com> William Lee Irwin III <wli@holomorphy.com>
439+Naoya Horiguchi <naoya.horiguchi@nec.com> <n-horiguchi@ah.jp.nec.com>
431440 Nathan Chancellor <nathan@kernel.org> <natechancellor@gmail.com>
432441 Neeraj Upadhyay <quic_neeraju@quicinc.com> <neeraju@codeaurora.org>
433442 Neil Armstrong <neil.armstrong@linaro.org> <narmstrong@baylibre.com>
@@ -469,6 +478,8 @@ Paul E. McKenney <paulmck@kernel.org> <paulmck@linux.vnet.ibm.com> · 35 unmodified lines
469478 Paul E. McKenney <paulmck@kernel.org> <paulmck@us.ibm.com>
470479 Paul Mackerras <paulus@ozlabs.org> <paulus@samba.org>
471480 Paul Mackerras <paulus@ozlabs.org> <paulus@au1.ibm.com>
481+Paul Moore <paul@paul-moore.com> <paul.moore@hp.com>
482+Paul Moore <paul@paul-moore.com> <pmoore@redhat.com>
472483 Pavankumar Kondeti <quic_pkondeti@quicinc.com> <pkondeti@codeaurora.org>
473484 Peter A Jonsson <pj@ludd.ltu.se>
474485 Peter Oruba <peter.oruba@amd.com>
@@ -493,6 +504,9 @@ Ralf Baechle <ralf@linux-mips.org> · 18 unmodified lines
493504 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
494505 Ram Chandra Jangir <quic_rjangir@quicinc.com> <rjangir@codeaurora.org>
495506 Randy Dunlap <rdunlap@infradead.org> <rdunlap@xenotime.net>
507+Randy Dunlap <rdunlap@infradead.org> <randy.dunlap@oracle.com>
508+Randy Dunlap <rdunlap@infradead.org> <rddunlap@osdl.org>
509+Randy Dunlap <rdunlap@infradead.org> <randy.dunlap@intel.com>
496510 Ravi Kumar Bokka <quic_rbokka@quicinc.com> <rbokka@codeaurora.org>
497511 Ravi Kumar Siddojigari <quic_rsiddoji@quicinc.com> <rsiddoji@codeaurora.org>
498512 Rémi Denis-Courmont <rdenis@simphalempin.com>
@@ -533,6 +547,8 @@ Sebastian Reichel <sre@kernel.org> <sebastian.reichel@collabora.co.uk> · 34 unmodified lines
533547 Sebastian Reichel <sre@kernel.org> <sre@debian.org>
534548 Sedat Dilek <sedat.dilek@gmail.com> <sedat.dilek@credativ.de>
535549 Senthilkumar N L <quic_snlakshm@quicinc.com> <snlakshm@codeaurora.org>
550+Serge Hallyn <sergeh@kernel.org> <serge.hallyn@canonical.com>
551+Serge Hallyn <sergeh@kernel.org> <serue@us.ibm.com>
536552 Seth Forshee <sforshee@kernel.org> <seth.forshee@canonical.com>
537553 Shannon Nelson <shannon.nelson@amd.com> <snelson@pensando.io>
538554 Shannon Nelson <shannon.nelson@amd.com> <shannon.nelson@intel.com>
@@ -569,6 +585,7 @@ Surabhi Vishnoi <quic_svishnoi@quicinc.com> <svishnoi@codeaurora.org> · 30 unmodified lines
569585 Takashi YOSHII <takashi.yoshii.zj@renesas.com>
570586 Tamizh Chelvam Raja <quic_tamizhr@quicinc.com> <tamizhr@codeaurora.org>
571587 Taniya Das <quic_tdas@quicinc.com> <tdas@codeaurora.org>
588+Tanzir Hasan <tanzhasanwork@gmail.com> <tanzirh@google.com>
572589 Tejun Heo <htejun@gmail.com>
573590 Tomeu Vizoso <tomeu@tomeuvizoso.net> <tomeu.vizoso@collabora.com>
574591 Thomas Graf <tgraf@suug.ch>
@@ -595,6 +612,9 @@ Uwe Kleine-König <u.kleine-koenig@pengutronix.de> · 20 unmodified lines
595612 Uwe Kleine-König <ukleinek@strlen.de>
596613 Uwe Kleine-König <ukl@pengutronix.de>
597614 Uwe Kleine-König <Uwe.Kleine-Koenig@digi.com>
615+Vadim Fedorenko <vadim.fedorenko@linux.dev> <vadfed@fb.com>
616+Vadim Fedorenko <vadim.fedorenko@linux.dev> <vadfed@meta.com>
617+Vadim Fedorenko <vadim.fedorenko@linux.dev> <vfedorenko@novek.ru>
598618 Valdis Kletnieks <Valdis.Kletnieks@vt.edu>
599619 Vara Reddy <quic_varar@quicinc.com> <varar@codeaurora.org>
600620 Varadarajan Narayanan <quic_varada@quicinc.com> <varada@codeaurora.org>
@@ -629,4 +649,5 @@ Wolfram Sang <wsa@kernel.org> <w.sang@pengutronix.de> · 28 unmodified lines
629649 Wolfram Sang <wsa@kernel.org> <wsa@the-dreams.de>
630650 Yakir Yang <kuankuan.y@gmail.com> <ykk@rock-chips.com>
631651 Yusuke Goda <goda.yusuke@renesas.com>
652+Zack Rusin <zack.rusin@broadcom.com> <zackr@vmware.com>
632653 Zhu Yanjun <zyjzyj2000@gmail.com> <yanjunz@nvidia.com>
CREDITS+63−4
@@ -9,10 +9,6 @@ · 8 unmodified lines
99 Linus
1010 ----------
1111
12−N: Matt Mackal
13−E: mpm@selenic.com
14−D: SLOB slab allocator
15−
1612 N: Matti Aarnio
1713 E: mea@nic.funet.fi
1814 D: Alpha systems hacking, IPv6 and other network related stuff
@@ -183,6 +179,7 @@ E: ralf@gnu.org · 164 unmodified lines
183179 P: 1024/AF7B30C1 CF 97 C2 CC 6D AE A7 FE C8 BA 9C FC 88 DE 32 C3
184180 D: Linux/MIPS port
185181 D: Linux/68k hacker
182+D: AX25 maintainer
186183 S: Hauptstrasse 19
187184 S: 79837 St. Blasien
188185 S: Germany
@@ -323,6 +320,9 @@ N: Ohad Ben Cohen · 134 unmodified lines
323320 E: ohad@wizery.com
324321 D: Remote Processor (remoteproc) subsystem
325322 D: Remote Processor Messaging (rpmsg) subsystem
323+D: Hardware spinlock (hwspinlock) subsystem
324+D: OMAP hwspinlock driver
325+D: OMAP remoteproc driver
326326
327327 N: Krzysztof Benedyczak
328328 E: golbi@mat.uni.torun.pl
@@ -678,6 +678,10 @@ D: Media subsystem (V4L/DVB) drivers and core · 349 unmodified lines
678678 D: EDAC drivers and EDAC 3.0 core rework
679679 S: Brazil
680680
681+N: Landen Chao
682+E: Landen.Chao@mediatek.com
683+D: MT7531 Ethernet switch support
684+
681685 N: Raymond Chen
682686 E: raymondc@microsoft.com
683687 D: Author of Configure script
@@ -815,6 +819,10 @@ D: Support for Xircom PGSDB9 (firmware and host driver) · 131 unmodified lines
815819 S: Bucharest
816820 S: Romania
817821
822+N: John Crispin
823+E: john@phrozen.org
824+D: MediaTek MT7623 Gigabit ethernet support
825+
818826 N: Laurence Culhane
819827 E: loz@holmes.demon.co.uk
820828 D: Wrote the initial alpha SLIP code
@@ -1425,6 +1433,10 @@ S: University of Stellenbosch · 604 unmodified lines
14251433 S: Stellenbosch, Western Cape
14261434 S: South Africa
14271435
1436+N: Andy Gross
1437+E: agross@kernel.org
1438+D: Qualcomm SoC subsystem and drivers
1439+
14281440 N: Grant Grundler
14291441 E: grantgrundler@gmail.com
14301442 W: http://obmouse.sourceforge.net/
@@ -1535,6 +1547,10 @@ N: Andrew Haylett · 104 unmodified lines
15351547 E: ajh@primag.co.uk
15361548 D: Selection mechanism
15371549
1550+N: Johan Hedberg
1551+E: johan.hedberg@gmail.com
1552+D: Bluetooth subsystem maintainer
1553+
15381554 N: Andre Hedrick
15391555 E: andre@linux-ide.org
15401556 E: andre@linuxdiskcert.org
@@ -1572,6 +1588,10 @@ S: Ampferstr. 50 / 4 · 31 unmodified lines
15721588 S: 6020 Innsbruck
15731589 S: Austria
15741590
1591+N: Mark Hemment
1592+E: markhe@nextd.demon.co.uk
1593+D: SLAB allocator implementation
1594+
15751595 N: Richard Henderson
15761596 E: rth@twiddle.net
15771597 E: rth@cygnus.com
@@ -1828,6 +1848,13 @@ S: K osmidomkum 723 · 250 unmodified lines
18281848 S: 160 00 Praha 6
18291849 S: Czech Republic
18301850
1851+N: Michael Kerrisk
1852+E: mtk.manpages@gmail.com
1853+W: https://man7.org/
1854+P: 4096R/3A35CE5E E522 595B 52ED A4E6 BFCC CB5E 8561 9911 3A35 CE5E
1855+D: Maintainer of the Linux man-pages project
1856+D: Linux man pages online, at <https://man7.org/linux/man-pages/>
1857+
18311858 N: Niels Kristian Bech Jensen
18321859 E: nkbj1970@hotmail.com
18331860 D: Miscellaneous kernel updates and fixes.
@@ -1855,6 +1882,10 @@ D: Fedora kernel maintenance (2003-2014). · 21 unmodified lines
18551882 D: 'Trinity' and similar fuzz testing work.
18561883 D: Misc/Other.
18571884
1885+N: Tom Joseph
1886+E: tjoseph@cadence.com
1887+D: Cadence PCIe driver
1888+
18581889 N: Martin Josfsson
18591890 E: gandalf@wlug.westbo.se
18601891 P: 1024D/F6B6D3B1 7610 7CED 5C34 4AA6 DBA2 8BE1 5A6D AF95 F6B6 D3B1
@@ -2126,6 +2157,10 @@ S: 2213 La Terrace Circle · 265 unmodified lines
21262157 S: San Jose, CA 95123
21272158 S: USA
21282159
2160+N: Mike Kravetz
2161+E: mike.kravetz@oracle.com
2162+D: Maintenance and development of the hugetlb subsystem
2163+
21292164 N: Andreas S. Krebs
21302165 E: akrebs@altavista.net
21312166 D: CYPRESS CY82C693 chipset IDE, Digital's PC-Alpha 164SX boards
@@ -2437,6 +2472,10 @@ D: work on suspend-to-ram/disk, killing duplicates from ioctl32, · 305 unmodified lines
24372472 D: Altera SoCFPGA and Nokia N900 support.
24382473 S: Czech Republic
24392474
2475+N: Olivia Mackall
2476+E: olivia@selenic.com
2477+D: SLOB slab allocator
2478+
24402479 N: Paul Mackerras
24412480 E: paulus@samba.org
24422481 D: PPP driver
@@ -2944,6 +2983,14 @@ D: IPX development and support · 501 unmodified lines
29442983 N: Venkatesh Pallipadi (Venki)
29452984 D: x86/HPET
29462985
2986+N: Antti Palosaari
2987+E: crope@iki.fi
2988+D: Various DVB drivers
2989+W: https://palosaari.fi/linux/
2990+S: Yliopistokatu 1 D 513
2991+S: FI-90570 Oulu
2992+S: FINLAND
2993+
29472994 N: Kyungmin Park
29482995 E: kyungmin.park@samsung.com
29492996 D: Samsung S5Pv210 and Exynos4210 mobile platforms
@@ -3018,6 +3065,10 @@ S: Demonstratsii 8-382 · 68 unmodified lines
30183065 S: Tula 300000
30193066 S: Russia
30203067
3068+N: Thomas Petazzoni
3069+E: thomas.petazzoni@bootlin.com
3070+D: Driver for the Marvell Armada 370/XP network unit.
3071+
30213072 N: Gordon Peters
30223073 E: GordPeters@smarttech.com
30233074 D: Isochronous receive for IEEE 1394 driver (OHCI module).
@@ -3916,6 +3967,10 @@ S: 21513 Conradia Ct · 892 unmodified lines
39163967 S: Cupertino, CA 95014
39173968 S: USA
39183969
3970+N: Manohar Vanga
3971+E: manohar.vanga@gmail.com
3972+D: VME subsystem maintainer
3973+
39193974 N: Thibaut Varène
39203975 E: hacks+kernel@slashdirt.org
39213976 W: http://hacks.slashdirt.org/
@@ -4016,6 +4071,10 @@ D: Fixes for the NE/2-driver · 94 unmodified lines
40164071 D: Miscellaneous MCA-support
40174072 D: Cleanup of the Config-files
40184073
4074+N: Martyn Welch
4075+E: martyn@welchs.me.uk
4076+D: VME subsystem maintainer
4077+
40194078 N: Matt Welsh
40204079 E: mdw@metalab.unc.edu
40214080 W: http://www.cs.berkeley.edu/~mdw
Documentation/ABI/testing/debugfs-driver-habanalabs+36−36
@@ -1,4 +1,4 @@
1−What: /sys/kernel/debug/accel/<n>/addr
1+What: /sys/kernel/debug/accel/<parent_device>/addr
22 Date: Jan 2019
33 KernelVersion: 5.1
44 Contact: ogabbay@kernel.org
@@ -8,34 +8,34 @@ Description: Sets the device address to be used for read or write through · 3 unmodified lines
88 only when the IOMMU is disabled.
99 The acceptable value is a string that starts with "0x"
1010
11−What: /sys/kernel/debug/accel/<n>/clk_gate
11+What: /sys/kernel/debug/accel/<parent_device>/clk_gate
1212 Date: May 2020
1313 KernelVersion: 5.8
1414 Contact: ogabbay@kernel.org
1515 Description: This setting is now deprecated as clock gating is handled solely by the f/w
1616
17−What: /sys/kernel/debug/accel/<n>/command_buffers
17+What: /sys/kernel/debug/accel/<parent_device>/command_buffers
1818 Date: Jan 2019
1919 KernelVersion: 5.1
2020 Contact: ogabbay@kernel.org
2121 Description: Displays a list with information about the currently allocated
2222 command buffers
2323
24−What: /sys/kernel/debug/accel/<n>/command_submission
24+What: /sys/kernel/debug/accel/<parent_device>/command_submission
2525 Date: Jan 2019
2626 KernelVersion: 5.1
2727 Contact: ogabbay@kernel.org
2828 Description: Displays a list with information about the currently active
2929 command submissions
3030
31−What: /sys/kernel/debug/accel/<n>/command_submission_jobs
31+What: /sys/kernel/debug/accel/<parent_device>/command_submission_jobs
3232 Date: Jan 2019
3333 KernelVersion: 5.1
3434 Contact: ogabbay@kernel.org
3535 Description: Displays a list with detailed information about each JOB (CB) of
3636 each active command submission
3737
38−What: /sys/kernel/debug/accel/<n>/data32
38+What: /sys/kernel/debug/accel/<parent_device>/data32
3939 Date: Jan 2019
4040 KernelVersion: 5.1
4141 Contact: ogabbay@kernel.org
@@ -50,7 +50,7 @@ Description: Allows the root user to read or write directly through the · 8 unmodified lines
5050 If the IOMMU is disabled, it also allows the root user to read
5151 or write from the host a device VA of a host mapped memory
5252
53−What: /sys/kernel/debug/accel/<n>/data64
53+What: /sys/kernel/debug/accel/<parent_device>/data64
5454 Date: Jan 2020
5555 KernelVersion: 5.6
5656 Contact: ogabbay@kernel.org
@@ -65,7 +65,7 @@ Description: Allows the root user to read or write 64 bit data directly · 8 unmodified lines
6565 If the IOMMU is disabled, it also allows the root user to read
6666 or write from the host a device VA of a host mapped memory
6767
68−What: /sys/kernel/debug/accel/<n>/data_dma
68+What: /sys/kernel/debug/accel/<parent_device>/data_dma
6969 Date: Apr 2021
7070 KernelVersion: 5.13
7171 Contact: ogabbay@kernel.org
@@ -83,7 +83,7 @@ Description: Allows the root user to read from the device's internal · 11 unmodified lines
8383 workloads.
8484 Only supported on GAUDI at this stage.
8585
86−What: /sys/kernel/debug/accel/<n>/device
86+What: /sys/kernel/debug/accel/<parent_device>/device
8787 Date: Jan 2019
8888 KernelVersion: 5.1
8989 Contact: ogabbay@kernel.org
@@ -91,14 +91,14 @@ Description: Enables the root user to set the device to specific state. · 1 unmodified line
9191 Valid values are "disable", "enable", "suspend", "resume".
9292 User can read this property to see the valid values
9393
94−What: /sys/kernel/debug/accel/<n>/device_release_watchdog_timeout
94+What: /sys/kernel/debug/accel/<parent_device>/device_release_watchdog_timeout
9595 Date: Oct 2022
9696 KernelVersion: 6.2
9797 Contact: ttayar@habana.ai
9898 Description: The watchdog timeout value in seconds for a device release upon
9999 certain error cases, after which the device is reset.
100100
101−What: /sys/kernel/debug/accel/<n>/dma_size
101+What: /sys/kernel/debug/accel/<parent_device>/dma_size
102102 Date: Apr 2021
103103 KernelVersion: 5.13
104104 Contact: ogabbay@kernel.org
@@ -108,7 +108,7 @@ Description: Specify the size of the DMA transaction when using DMA to read · 3 unmodified lines
108108 When the write is finished, the user can read the "data_dma"
109109 blob
110110
111−What: /sys/kernel/debug/accel/<n>/dump_razwi_events
111+What: /sys/kernel/debug/accel/<parent_device>/dump_razwi_events
112112 Date: Aug 2022
113113 KernelVersion: 5.20
114114 Contact: fkassabri@habana.ai
@@ -117,7 +117,7 @@ Description: Dumps all razwi events to dmesg if exist. · 2 unmodified lines
117117 the routine will clear the status register.
118118 Usage: cat dump_razwi_events
119119
120−What: /sys/kernel/debug/accel/<n>/dump_security_violations
120+What: /sys/kernel/debug/accel/<parent_device>/dump_security_violations
121121 Date: Jan 2021
122122 KernelVersion: 5.12
123123 Contact: ogabbay@kernel.org
@@ -125,14 +125,14 @@ Description: Dumps all security violations to dmesg. This will also ack · 1 unmodified line
125125 all security violations meanings those violations will not be
126126 dumped next time user calls this API
127127
128−What: /sys/kernel/debug/accel/<n>/engines
128+What: /sys/kernel/debug/accel/<parent_device>/engines
129129 Date: Jul 2019
130130 KernelVersion: 5.3
131131 Contact: ogabbay@kernel.org
132132 Description: Displays the status registers values of the device engines and
133133 their derived idle status
134134
135−What: /sys/kernel/debug/accel/<n>/i2c_addr
135+What: /sys/kernel/debug/accel/<parent_device>/i2c_addr
136136 Date: Jan 2019
137137 KernelVersion: 5.1
138138 Contact: ogabbay@kernel.org
@@ -140,7 +140,7 @@ Description: Sets I2C device address for I2C transaction that is generated · 1 unmodified line
140140 by the device's CPU, Not available when device is loaded with secured
141141 firmware
142142
143−What: /sys/kernel/debug/accel/<n>/i2c_bus
143+What: /sys/kernel/debug/accel/<parent_device>/i2c_bus
144144 Date: Jan 2019
145145 KernelVersion: 5.1
146146 Contact: ogabbay@kernel.org
@@ -148,7 +148,7 @@ Description: Sets I2C bus address for I2C transaction that is generated by · 1 unmodified line
148148 the device's CPU, Not available when device is loaded with secured
149149 firmware
150150
151−What: /sys/kernel/debug/accel/<n>/i2c_data
151+What: /sys/kernel/debug/accel/<parent_device>/i2c_data
152152 Date: Jan 2019
153153 KernelVersion: 5.1
154154 Contact: ogabbay@kernel.org
@@ -157,7 +157,7 @@ Description: Triggers an I2C transaction that is generated by the device's · 2 unmodified lines
157157 reading from the file generates a read transaction, Not available
158158 when device is loaded with secured firmware
159159
160−What: /sys/kernel/debug/accel/<n>/i2c_len
160+What: /sys/kernel/debug/accel/<parent_device>/i2c_len
161161 Date: Dec 2021
162162 KernelVersion: 5.17
163163 Contact: obitton@habana.ai
@@ -165,7 +165,7 @@ Description: Sets I2C length in bytes for I2C transaction that is generated b · 1 unmodified line
165165 the device's CPU, Not available when device is loaded with secured
166166 firmware
167167
168−What: /sys/kernel/debug/accel/<n>/i2c_reg
168+What: /sys/kernel/debug/accel/<parent_device>/i2c_reg
169169 Date: Jan 2019
170170 KernelVersion: 5.1
171171 Contact: ogabbay@kernel.org
@@ -173,35 +173,35 @@ Description: Sets I2C register id for I2C transaction that is generated by · 1 unmodified line
173173 the device's CPU, Not available when device is loaded with secured
174174 firmware
175175
176−What: /sys/kernel/debug/accel/<n>/led0
176+What: /sys/kernel/debug/accel/<parent_device>/led0
177177 Date: Jan 2019
178178 KernelVersion: 5.1
179179 Contact: ogabbay@kernel.org
180180 Description: Sets the state of the first S/W led on the device, Not available
181181 when device is loaded with secured firmware
182182
183−What: /sys/kernel/debug/accel/<n>/led1
183+What: /sys/kernel/debug/accel/<parent_device>/led1
184184 Date: Jan 2019
185185 KernelVersion: 5.1
186186 Contact: ogabbay@kernel.org
187187 Description: Sets the state of the second S/W led on the device, Not available
188188 when device is loaded with secured firmware
189189
190−What: /sys/kernel/debug/accel/<n>/led2
190+What: /sys/kernel/debug/accel/<parent_device>/led2
191191 Date: Jan 2019
192192 KernelVersion: 5.1
193193 Contact: ogabbay@kernel.org
194194 Description: Sets the state of the third S/W led on the device, Not available
195195 when device is loaded with secured firmware
196196
197−What: /sys/kernel/debug/accel/<n>/memory_scrub
197+What: /sys/kernel/debug/accel/<parent_device>/memory_scrub
198198 Date: May 2022
199199 KernelVersion: 5.19
200200 Contact: dhirschfeld@habana.ai
201201 Description: Allows the root user to scrub the dram memory. The scrubbing
202202 value can be set using the debugfs file memory_scrub_val.
203203
204−What: /sys/kernel/debug/accel/<n>/memory_scrub_val
204+What: /sys/kernel/debug/accel/<parent_device>/memory_scrub_val
205205 Date: May 2022
206206 KernelVersion: 5.19
207207 Contact: dhirschfeld@habana.ai
@@ -209,7 +209,7 @@ Description: The value to which the dram will be set to when the user · 1 unmodified line
209209 scrubs the dram using 'memory_scrub' debugfs file and
210210 the scrubbing value when using module param 'memory_scrub'
211211
212−What: /sys/kernel/debug/accel/<n>/mmu
212+What: /sys/kernel/debug/accel/<parent_device>/mmu
213213 Date: Jan 2019
214214 KernelVersion: 5.1
215215 Contact: ogabbay@kernel.org
@@ -219,7 +219,7 @@ Description: Displays the hop values and physical address for a given ASID · 3 unmodified lines
219219 e.g. to display info about VA 0x1000 for ASID 1 you need to do:
220220 echo "1 0x1000" > /sys/kernel/debug/accel/0/mmu
221221
222−What: /sys/kernel/debug/accel/<n>/mmu_error
222+What: /sys/kernel/debug/accel/<parent_device>/mmu_error
223223 Date: Mar 2021
224224 KernelVersion: 5.12
225225 Contact: fkassabri@habana.ai
@@ -229,7 +229,7 @@ Description: Check and display page fault or access violation mmu errors for · 3 unmodified lines
229229 echo "0x200" > /sys/kernel/debug/accel/0/mmu_error
230230 cat /sys/kernel/debug/accel/0/mmu_error
231231
232−What: /sys/kernel/debug/accel/<n>/monitor_dump
232+What: /sys/kernel/debug/accel/<parent_device>/monitor_dump
233233 Date: Mar 2022
234234 KernelVersion: 5.19
235235 Contact: osharabi@habana.ai
@@ -243,7 +243,7 @@ Description: Allows the root user to dump monitors status from the device's · 7 unmodified lines
243243 This interface doesn't support concurrency in the same device.
244244 Only supported on GAUDI.
245245
246−What: /sys/kernel/debug/accel/<n>/monitor_dump_trig
246+What: /sys/kernel/debug/accel/<parent_device>/monitor_dump_trig
247247 Date: Mar 2022
248248 KernelVersion: 5.19
249249 Contact: osharabi@habana.ai
@@ -253,14 +253,14 @@ Description: Triggers dump of monitor data. The value to trigger the operatio · 3 unmodified lines
253253 When the write is finished, the user can read the "monitor_dump"
254254 blob
255255
256−What: /sys/kernel/debug/accel/<n>/set_power_state
256+What: /sys/kernel/debug/accel/<parent_device>/set_power_state
257257 Date: Jan 2019
258258 KernelVersion: 5.1
259259 Contact: ogabbay@kernel.org
260260 Description: Sets the PCI power state. Valid values are "1" for D0 and "2"
261261 for D3Hot
262262
263−What: /sys/kernel/debug/accel/<n>/skip_reset_on_timeout
263+What: /sys/kernel/debug/accel/<parent_device>/skip_reset_on_timeout
264264 Date: Jun 2021
265265 KernelVersion: 5.13
266266 Contact: ynudelman@habana.ai
@@ -268,7 +268,7 @@ Description: Sets the skip reset on timeout option for the device. Value of · 1 unmodified line
268268 "0" means device will be reset in case some CS has timed out,
269269 otherwise it will not be reset.
270270
271−What: /sys/kernel/debug/accel/<n>/state_dump
271+What: /sys/kernel/debug/accel/<parent_device>/state_dump
272272 Date: Oct 2021
273273 KernelVersion: 5.15
274274 Contact: ynudelman@habana.ai
@@ -279,7 +279,7 @@ Description: Gets the state dump occurring on a CS timeout or failure. · 4 unmodified lines
279279 Writing an integer X discards X state dumps, so that the
280280 next read would return X+1-st newest state dump.
281281
282−What: /sys/kernel/debug/accel/<n>/stop_on_err
282+What: /sys/kernel/debug/accel/<parent_device>/stop_on_err
283283 Date: Mar 2020
284284 KernelVersion: 5.6
285285 Contact: ogabbay@kernel.org
@@ -287,13 +287,13 @@ Description: Sets the stop-on_error option for the device engines. Value of · 1 unmodified line
287287 "0" is for disable, otherwise enable.
288288 Relevant only for GOYA and GAUDI.
289289
290−What: /sys/kernel/debug/accel/<n>/timeout_locked
290+What: /sys/kernel/debug/accel/<parent_device>/timeout_locked
291291 Date: Sep 2021
292292 KernelVersion: 5.16
293293 Contact: obitton@habana.ai
294294 Description: Sets the command submission timeout value in seconds.
295295
296−What: /sys/kernel/debug/accel/<n>/userptr
296+What: /sys/kernel/debug/accel/<parent_device>/userptr
297297 Date: Jan 2019
298298 KernelVersion: 5.1
299299 Contact: ogabbay@kernel.org
@@ -301,7 +301,7 @@ Description: Displays a list with information about the current user · 1 unmodified line
301301 pointers (user virtual addresses) that are pinned and mapped
302302 to DMA addresses
303303
304−What: /sys/kernel/debug/accel/<n>/userptr_lookup
304+What: /sys/kernel/debug/accel/<parent_device>/userptr_lookup
305305 Date: Oct 2021
306306 KernelVersion: 5.15
307307 Contact: ogabbay@kernel.org
@@ -309,7 +309,7 @@ Description: Allows to search for specific user pointers (user virtual · 1 unmodified line
309309 addresses) that are pinned and mapped to DMA addresses, and see
310310 their resolution to the specific dma address.
311311
312−What: /sys/kernel/debug/accel/<n>/vm
312+What: /sys/kernel/debug/accel/<parent_device>/vm
313313 Date: Jan 2019
314314 KernelVersion: 5.1
315315 Contact: ogabbay@kernel.org
Documentation/ABI/testing/debugfs-driver-qat_telemetry+228−0
@@ -0,0 +1,228 @@
1+What: /sys/kernel/debug/qat_<device>_<BDF>/telemetry/control
2+Date: March 2024
3+KernelVersion: 6.8
4+Contact: qat-linux@intel.com
5+Description: (RW) Enables/disables the reporting of telemetry metrics.
6+
7+ Allowed values to write:
8+ ========================
9+ * 0: disable telemetry
10+ * 1: enable telemetry
11+ * 2, 3, 4: enable telemetry and calculate minimum, maximum
12+ and average for each counter over 2, 3 or 4 samples
13+
14+ Returned values:
15+ ================
16+ * 1-4: telemetry is enabled and running
17+ * 0: telemetry is disabled
18+
19+ Example.
20+
21+ Writing '3' to this file starts the collection of
22+ telemetry metrics. Samples are collected every second and
23+ stored in a circular buffer of size 3. These values are then
24+ used to calculate the minimum, maximum and average for each
25+ counter. After enabling, counters can be retrieved through
26+ the ``device_data`` file::
27+
28+ echo 3 > /sys/kernel/debug/qat_4xxx_0000:6b:00.0/telemetry/control
29+
30+ Writing '0' to this file stops the collection of telemetry
31+ metrics::
32+
33+ echo 0 > /sys/kernel/debug/qat_4xxx_0000:6b:00.0/telemetry/control
34+
35+ This attribute is only available for qat_4xxx devices.
36+
37+What: /sys/kernel/debug/qat_<device>_<BDF>/telemetry/device_data
38+Date: March 2024
39+KernelVersion: 6.8
40+Contact: qat-linux@intel.com
41+Description: (RO) Reports device telemetry counters.
42+ Reads report metrics about performance and utilization of
43+ a QAT device:
44+
45+ ======================= ========================================
46+ Field Description
47+ ======================= ========================================
48+ sample_cnt number of acquisitions of telemetry data
49+ from the device. Reads are performed
50+ every 1000 ms.
51+ pci_trans_cnt number of PCIe partial transactions
52+ max_rd_lat maximum logged read latency [ns] (could
53+ be any read operation)
54+ rd_lat_acc_avg average read latency [ns]
55+ max_gp_lat max get to put latency [ns] (only takes
56+ samples for AE0)
57+ gp_lat_acc_avg average get to put latency [ns]
58+ bw_in PCIe, write bandwidth [Mbps]
59+ bw_out PCIe, read bandwidth [Mbps]
60+ at_page_req_lat_avg Address Translator(AT), average page
61+ request latency [ns]
62+ at_trans_lat_avg AT, average page translation latency [ns]
63+ at_max_tlb_used AT, maximum uTLB used
64+ util_cpr<N> utilization of Compression slice N [%]
65+ exec_cpr<N> execution count of Compression slice N
66+ util_xlt<N> utilization of Translator slice N [%]
67+ exec_xlt<N> execution count of Translator slice N
68+ util_dcpr<N> utilization of Decompression slice N [%]
69+ exec_dcpr<N> execution count of Decompression slice N
70+ util_pke<N> utilization of PKE N [%]
71+ exec_pke<N> execution count of PKE N
72+ util_ucs<N> utilization of UCS slice N [%]
73+ exec_ucs<N> execution count of UCS slice N
74+ util_wat<N> utilization of Wireless Authentication
75+ slice N [%]
76+ exec_wat<N> execution count of Wireless Authentication
77+ slice N
78+ util_wcp<N> utilization of Wireless Cipher slice N [%]
79+ exec_wcp<N> execution count of Wireless Cipher slice N
80+ util_cph<N> utilization of Cipher slice N [%]
81+ exec_cph<N> execution count of Cipher slice N
82+ util_ath<N> utilization of Authentication slice N [%]
83+ exec_ath<N> execution count of Authentication slice N
84+ ======================= ========================================
85+
86+ The telemetry report file can be read with the following command::
87+
88+ cat /sys/kernel/debug/qat_4xxx_0000:6b:00.0/telemetry/device_data
89+
90+ If ``control`` is set to 1, only the current values of the
91+ counters are displayed::
92+
93+ <counter_name> <current>
94+
95+ If ``control`` is 2, 3 or 4, counters are displayed in the
96+ following format::
97+
98+ <counter_name> <current> <min> <max> <avg>
99+
100+ If a device lacks of a specific accelerator, the corresponding
101+ attribute is not reported.
102+
103+ This attribute is only available for qat_4xxx devices.
104+
105+What: /sys/kernel/debug/qat_<device>_<BDF>/telemetry/rp_<A/B/C/D>_data
106+Date: March 2024
107+KernelVersion: 6.8
108+Contact: qat-linux@intel.com
109+Description: (RW) Selects up to 4 Ring Pairs (RP) to monitor, one per file,
110+ and report telemetry counters related to each.
111+
112+ Allowed values to write:
113+ ========================
114+ * 0 to ``<num_rps - 1>``:
115+ Ring pair to be monitored. The value of ``num_rps`` can be
116+ retrieved through ``/sys/bus/pci/devices/<BDF>/qat/num_rps``.
117+ See Documentation/ABI/testing/sysfs-driver-qat.
118+
119+ Reads report metrics about performance and utilization of
120+ the selected RP:
121+
122+ ======================= ========================================
123+ Field Description
124+ ======================= ========================================
125+ sample_cnt number of acquisitions of telemetry data
126+ from the device. Reads are performed
127+ every 1000 ms
128+ rp_num RP number associated with slot <A/B/C/D>
129+ service_type service associated to the RP
130+ pci_trans_cnt number of PCIe partial transactions
131+ gp_lat_acc_avg average get to put latency [ns]
132+ bw_in PCIe, write bandwidth [Mbps]
133+ bw_out PCIe, read bandwidth [Mbps]
134+ at_glob_devtlb_hit Message descriptor DevTLB hit rate
135+ at_glob_devtlb_miss Message descriptor DevTLB miss rate
136+ tl_at_payld_devtlb_hit Payload DevTLB hit rate
137+ tl_at_payld_devtlb_miss Payload DevTLB miss rate
138+ ======================= ========================================
139+
140+ Example.
141+
142+ Writing the value '32' to the file ``rp_C_data`` starts the
143+ collection of telemetry metrics for ring pair 32::
144+
145+ echo 32 > /sys/kernel/debug/qat_4xxx_0000:6b:00.0/telemetry/rp_C_data
146+
147+ Once a ring pair is selected, statistics can be read accessing
148+ the file::
149+
150+ cat /sys/kernel/debug/qat_4xxx_0000:6b:00.0/telemetry/rp_C_data
151+
152+ If ``control`` is set to 1, only the current values of the
153+ counters are displayed::
154+
155+ <counter_name> <current>
156+
157+ If ``control`` is 2, 3 or 4, counters are displayed in the
158+ following format::
159+
160+ <counter_name> <current> <min> <max> <avg>
161+
162+
163+ On QAT GEN4 devices there are 64 RPs on a PF, so the allowed
164+ values are 0..63. This number is absolute to the device.
165+ If Virtual Functions (VF) are used, the ring pair number can
166+ be derived from the Bus, Device, Function of the VF:
167+
168+ ============ ====== ====== ====== ======
169+ PCI BDF/VF RP0 RP1 RP2 RP3
170+ ============ ====== ====== ====== ======
171+ 0000:6b:0.1 RP 0 RP 1 RP 2 RP 3
172+ 0000:6b:0.2 RP 4 RP 5 RP 6 RP 7
173+ 0000:6b:0.3 RP 8 RP 9 RP 10 RP 11
174+ 0000:6b:0.4 RP 12 RP 13 RP 14 RP 15
175+ 0000:6b:0.5 RP 16 RP 17 RP 18 RP 19
176+ 0000:6b:0.6 RP 20 RP 21 RP 22 RP 23
177+ 0000:6b:0.7 RP 24 RP 25 RP 26 RP 27
178+ 0000:6b:1.0 RP 28 RP 29 RP 30 RP 31
179+ 0000:6b:1.1 RP 32 RP 33 RP 34 RP 35
180+ 0000:6b:1.2 RP 36 RP 37 RP 38 RP 39
181+ 0000:6b:1.3 RP 40 RP 41 RP 42 RP 43
182+ 0000:6b:1.4 RP 44 RP 45 RP 46 RP 47
183+ 0000:6b:1.5 RP 48 RP 49 RP 50 RP 51
184+ 0000:6b:1.6 RP 52 RP 53 RP 54 RP 55
185+ 0000:6b:1.7 RP 56 RP 57 RP 58 RP 59
186+ 0000:6b:2.0 RP 60 RP 61 RP 62 RP 63
187+ ============ ====== ====== ====== ======
188+
189+ The mapping is only valid for the BDFs of VFs on the host.
190+
191+
192+ The service provided on a ring-pair varies depending on the
193+ configuration. The configuration for a given device can be
194+ queried and set using ``cfg_services``.
195+ See Documentation/ABI/testing/sysfs-driver-qat for details.
196+
197+ The following table reports how ring pairs are mapped to VFs
198+ on the PF 0000:6b:0.0 configured for `sym;asym` or `asym;sym`:
199+
200+ =========== ============ =========== ============ ===========
201+ PCI BDF/VF RP0/service RP1/service RP2/service RP3/service
202+ =========== ============ =========== ============ ===========
203+ 0000:6b:0.1 RP 0 asym RP 1 sym RP 2 asym RP 3 sym
204+ 0000:6b:0.2 RP 4 asym RP 5 sym RP 6 asym RP 7 sym
205+ 0000:6b:0.3 RP 8 asym RP 9 sym RP10 asym RP11 sym
206+ ... ... ... ... ...
207+ =========== ============ =========== ============ ===========
208+
209+ All VFs follow the same pattern.
210+
211+
212+ The following table reports how ring pairs are mapped to VFs on
213+ the PF 0000:6b:0.0 configured for `dc`:
214+
215+ =========== ============ =========== ============ ===========
216+ PCI BDF/VF RP0/service RP1/service RP2/service RP3/service
217+ =========== ============ =========== ============ ===========
218+ 0000:6b:0.1 RP 0 dc RP 1 dc RP 2 dc RP 3 dc
219+ 0000:6b:0.2 RP 4 dc RP 5 dc RP 6 dc RP 7 dc
220+ 0000:6b:0.3 RP 8 dc RP 9 dc RP10 dc RP11 dc
221+ ... ... ... ... ...
222+ =========== ============ =========== ============ ===========
223+
224+ The mapping of a RP to a service can be retrieved using
225+ ``rp2srv`` from sysfs.
226+ See Documentation/ABI/testing/sysfs-driver-qat for details.
227+
228+ This attribute is only available for qat_4xxx devices.
Documentation/ABI/testing/debugfs-hisi-hpre+1−1
@@ -101,7 +101,7 @@ What: /sys/kernel/debug/hisi_hpre/<bdf>/qm/status · 100 unmodified lines
101101 Date: Apr 2020
102102 Contact: linux-crypto@vger.kernel.org
103103 Description: Dump the status of the QM.
104− Four states: initiated, started, stopped and closed.
104+ Two states: work, stop.
105105 Available for both PF and VF, and take no other effect on HPRE.
106106
107107 What: /sys/kernel/debug/hisi_hpre/<bdf>/qm/diff_regs
Documentation/ABI/testing/debugfs-hisi-sec+1−1
@@ -81,7 +81,7 @@ What: /sys/kernel/debug/hisi_sec2/<bdf>/qm/status · 80 unmodified lines
8181 Date: Apr 2020
8282 Contact: linux-crypto@vger.kernel.org
8383 Description: Dump the status of the QM.
84− Four states: initiated, started, stopped and closed.
84+ Two states: work, stop.
8585 Available for both PF and VF, and take no other effect on SEC.
8686
8787 What: /sys/kernel/debug/hisi_sec2/<bdf>/qm/diff_regs
Documentation/ABI/testing/debugfs-hisi-zip+1−1
@@ -94,7 +94,7 @@ What: /sys/kernel/debug/hisi_zip/<bdf>/qm/status · 93 unmodified lines
9494 Date: Apr 2020
9595 Contact: linux-crypto@vger.kernel.org
9696 Description: Dump the status of the QM.
97− Four states: initiated, started, stopped and closed.
97+ Two states: work, stop.
9898 Available for both PF and VF, and take no other effect on ZIP.
9999
100100 What: /sys/kernel/debug/hisi_zip/<bdf>/qm/diff_regs
Documentation/ABI/testing/debugfs-vfio+25−0
@@ -0,0 +1,25 @@
1+What: /sys/kernel/debug/vfio
2+Date: December 2023
3+KernelVersion: 6.8
4+Contact: Longfang Liu <liulongfang@huawei.com>
5+Description: This debugfs file directory is used for debugging
6+ of vfio devices, it's a common directory for all vfio devices.
7+ Vfio core will create a device subdirectory under this
8+ directory.
9+
10+What: /sys/kernel/debug/vfio/<device>/migration
11+Date: December 2023
12+KernelVersion: 6.8
13+Contact: Longfang Liu <liulongfang@huawei.com>
14+Description: This debugfs file directory is used for debugging
15+ of vfio devices that support live migration.
16+ The debugfs of each vfio device that supports live migration
17+ could be created under this directory.
18+
19+What: /sys/kernel/debug/vfio/<device>/migration/state
20+Date: December 2023
21+KernelVersion: 6.8
22+Contact: Longfang Liu <liulongfang@huawei.com>
23+Description: Read the live migration status of the vfio device.
24+ The contents of the state file reflects the migration state
25+ relative to those defined in the vfio_device_mig_state enum
Documentation/ABI/testing/sysfs-bus-cdx+7−0
@@ -98,6 +98,13 @@ Description: · 97 unmodified lines
9898
9999 # echo 1 > /sys/bus/cdx/devices/.../remove
100100
101+What: /sys/bus/cdx/devices/.../resource<N>
102+Date: July 2023
103+Contact: puneet.gupta@amd.com
104+Description:
105+ The resource binary file contains the content of the memory
106+ regions. These files can be m'maped from userspace.
107+
101108 What: /sys/bus/cdx/devices/.../modalias
102109 Date: July 2023
103110 Contact: nipun.gupta@amd.com
Documentation/ABI/testing/sysfs-bus-coresight-devices-tmc+16−0
@@ -91,3 +91,19 @@ Contact: Mathieu Poirier <mathieu.poirier@linaro.org> · 90 unmodified lines
9191 Description: (RW) Size of the trace buffer for TMC-ETR when used in SYSFS
9292 mode. Writable only for TMC-ETR configurations. The value
9393 should be aligned to the kernel pagesize.
94+
95+What: /sys/bus/coresight/devices/<memory_map>.tmc/buf_modes_available
96+Date: August 2023
97+KernelVersion: 6.7
98+Contact: Anshuman Khandual <anshuman.khandual@arm.com>
99+Description: (Read) Shows all supported Coresight TMC-ETR buffer modes available
100+ for the users to configure explicitly. This file is avaialble only
101+ for TMC ETR devices.
102+
103+What: /sys/bus/coresight/devices/<memory_map>.tmc/buf_mode_preferred
104+Date: August 2023
105+KernelVersion: 6.7
106+Contact: Anshuman Khandual <anshuman.khandual@arm.com>
107+Description: (RW) Current Coresight TMC-ETR buffer mode selected. But user could
108+ only provide a mode which is supported for a given ETR device. This
109+ file is available only for TMC ETR devices.
Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm+159−0
@@ -11,3 +11,162 @@ Description: · 10 unmodified lines
1111 Accepts only one of the 2 values - 1 or 2.
1212 1 : Generate 64 bits data
1313 2 : Generate 32 bits data
14+
15+What: /sys/bus/coresight/devices/<tpdm-name>/reset_dataset
16+Date: March 2023
17+KernelVersion 6.7
18+Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
19+Description:
20+ (Write) Reset the dataset of the tpdm.
21+
22+ Accepts only one value - 1.
23+ 1 : Reset the dataset of the tpdm
24+
25+What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_type
26+Date: March 2023
27+KernelVersion 6.7
28+Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
29+Description:
30+ (RW) Set/Get the trigger type of the DSB for tpdm.
31+
32+ Accepts only one of the 2 values - 0 or 1.
33+ 0 : Set the DSB trigger type to false
34+ 1 : Set the DSB trigger type to true
35+
36+What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_ts
37+Date: March 2023
38+KernelVersion 6.7
39+Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
40+Description:
41+ (RW) Set/Get the trigger timestamp of the DSB for tpdm.
42+
43+ Accepts only one of the 2 values - 0 or 1.
44+ 0 : Set the DSB trigger type to false
45+ 1 : Set the DSB trigger type to true
46+
47+What: /sys/bus/coresight/devices/<tpdm-name>/dsb_mode
48+Date: March 2023
49+KernelVersion 6.7
50+Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
51+Description:
52+ (RW) Set/Get the programming mode of the DSB for tpdm.
53+
54+ Accepts the value needs to be greater than 0. What data
55+ bits do is listed below.
56+ Bit[0:1] : Test mode control bit for choosing the inputs.
57+ Bit[3] : Set to 0 for low performance mode. Set to 1 for high
58+ performance mode.
59+ Bit[4:8] : Select byte lane for high performance mode.
60+
61+What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_idx
62+Date: March 2023
63+KernelVersion 6.7
64+Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
65+Description:
66+ (RW) Set/Get the index number of the edge detection for the DSB
67+ subunit TPDM. Since there are at most 256 edge detections, this
68+ value ranges from 0 to 255.
69+
70+What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_val
71+Date: March 2023
72+KernelVersion 6.7
73+Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
74+Description:
75+ Write a data to control the edge detection corresponding to
76+ the index number. Before writing data to this sysfs file,
77+ "ctrl_idx" should be written first to configure the index
78+ number of the edge detection which needs to be controlled.
79+
80+ Accepts only one of the following values.
81+ 0 - Rising edge detection
82+ 1 - Falling edge detection
83+ 2 - Rising and falling edge detection (toggle detection)
84+
85+
86+What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_mask
87+Date: March 2023
88+KernelVersion 6.7
89+Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
90+Description:
91+ Write a data to mask the edge detection corresponding to the index
92+ number. Before writing data to this sysfs file, "ctrl_idx" should
93+ be written first to configure the index number of the edge detection
94+ which needs to be masked.
95+
96+ Accepts only one of the 2 values - 0 or 1.
97+
98+What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/edcr[0:15]
99+Date: March 2023
100+KernelVersion 6.7
101+Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
102+Description:
103+ Read a set of the edge control value of the DSB in TPDM.
104+
105+What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/edcmr[0:7]
106+Date: March 2023
107+KernelVersion 6.7
108+Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
109+Description:
110+ Read a set of the edge control mask of the DSB in TPDM.
111+
112+What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_patt/xpr[0:7]
113+Date: March 2023
114+KernelVersion 6.7
115+Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
116+Description:
117+ (RW) Set/Get the value of the trigger pattern for the DSB
118+ subunit TPDM.
119+
120+What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_patt/xpmr[0:7]
121+Date: March 2023
122+KernelVersion 6.7
123+Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
124+Description:
125+ (RW) Set/Get the mask of the trigger pattern for the DSB
126+ subunit TPDM.
127+
128+What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpr[0:7]
129+Date: March 2023
130+KernelVersion 6.7
131+Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
132+Description:
133+ (RW) Set/Get the value of the pattern for the DSB subunit TPDM.
134+
135+What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpmr[0:7]
136+Date: March 2023
137+KernelVersion 6.7
138+Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
139+Description:
140+ (RW) Set/Get the mask of the pattern for the DSB subunit TPDM.
141+
142+What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/enable_ts
143+Date: March 2023
144+KernelVersion 6.7
145+Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
146+Description:
147+ (Write) Set the pattern timestamp of DSB tpdm. Read
148+ the pattern timestamp of DSB tpdm.
149+
150+ Accepts only one of the 2 values - 0 or 1.
151+ 0 : Disable DSB pattern timestamp.
152+ 1 : Enable DSB pattern timestamp.
153+
154+What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/set_type
155+Date: March 2023
156+KernelVersion 6.7
157+Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
158+Description:
159+ (Write) Set the pattern type of DSB tpdm. Read
160+ the pattern type of DSB tpdm.
161+
162+ Accepts only one of the 2 values - 0 or 1.
163+ 0 : Set the DSB pattern type to value.
164+ 1 : Set the DSB pattern type to toggle.
165+
166+What: /sys/bus/coresight/devices/<tpdm-name>/dsb_msr/msr[0:31]
167+Date: March 2023
168+KernelVersion 6.7
169+Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
170+Description:
171+ (RW) Set/Get the MSR(mux select register) for the DSB subunit
172+ TPDM.
Documentation/ABI/testing/sysfs-bus-cxl+34−0
@@ -28,6 +28,23 @@ Description: · 27 unmodified lines
2828 Payload in the CXL-2.0 specification.
2929
3030
31+What: /sys/bus/cxl/devices/memX/ram/qos_class
32+Date: May, 2023
33+KernelVersion: v6.8
34+Contact: linux-cxl@vger.kernel.org
35+Description:
36+ (RO) For CXL host platforms that support "QoS Telemmetry"
37+ this attribute conveys a comma delimited list of platform
38+ specific cookies that identifies a QoS performance class
39+ for the volatile partition of the CXL mem device. These
40+ class-ids can be compared against a similar "qos_class"
41+ published for a root decoder. While it is not required
42+ that the endpoints map their local memory-class to a
43+ matching platform class, mismatches are not recommended
44+ and there are platform specific performance related
45+ side-effects that may result. First class-id is displayed.
46+
47+
3148 What: /sys/bus/cxl/devices/memX/pmem/size
3249 Date: December, 2020
3350 KernelVersion: v5.12
@@ -38,6 +55,23 @@ Description: · 4 unmodified lines
3855 Payload in the CXL-2.0 specification.
3956
4057
58+What: /sys/bus/cxl/devices/memX/pmem/qos_class
59+Date: May, 2023
60+KernelVersion: v6.8
61+Contact: linux-cxl@vger.kernel.org
62+Description:
63+ (RO) For CXL host platforms that support "QoS Telemmetry"
64+ this attribute conveys a comma delimited list of platform
65+ specific cookies that identifies a QoS performance class
66+ for the persistent partition of the CXL mem device. These
67+ class-ids can be compared against a similar "qos_class"
68+ published for a root decoder. While it is not required
69+ that the endpoints map their local memory-class to a
70+ matching platform class, mismatches are not recommended
71+ and there are platform specific performance related
72+ side-effects that may result. First class-id is displayed.
73+
74+
4175 What: /sys/bus/cxl/devices/memX/serial
4276 Date: January, 2022
4377 KernelVersion: v5.18
Documentation/ABI/testing/sysfs-bus-event_source-devices-caps+6−0
@@ -16,3 +16,9 @@ Description: · 15 unmodified lines
1616 Example output in powerpc:
1717 grep . /sys/bus/event_source/devices/cpu/caps/*
1818 /sys/bus/event_source/devices/cpu/caps/pmu_name:POWER9
19+
20+ The "branch_counter_nr" in the supported platform exposes the
21+ maximum number of counters which can be shown in the u64 counters
22+ of PERF_SAMPLE_BRANCH_COUNTERS, while the "branch_counter_width"
23+ exposes the width of each counter. Both of them can be used by
24+ the perf tool to parse the logged counters in each branch.
Documentation/ABI/testing/sysfs-bus-i3c+15−0
@@ -88,6 +88,21 @@ Description: · 87 unmodified lines
8888 This entry describes the HDRCAP of the master controller
8989 driving the bus.
9090
91+What: /sys/bus/i3c/devices/i3c-<bus-id>/hotjoin
92+KernelVersion: 6.8
93+Contact: linux-i3c@vger.kernel.org
94+Description:
95+ I3C’s Hot-Join mechanism allows an I3C Device to inform the
96+ Active Controller that a newly-joined Target is present on the
97+ I3C Bus and is ready to receive a Dynamic Address, in order to
98+ become fully functional on the Bus. Hot-Join is used when the
99+ Target is mounted on the same I3C bus and remains depowered
100+ until needed or until the Target is physically inserted into the
101+ I3C bus
102+
103+ This entry allows to enable or disable Hot-join of the Current
104+ Controller driving the bus.
105+
91106 What: /sys/bus/i3c/devices/i3c-<bus-id>/<bus-id>-<device-pid>
92107 KernelVersion: 5.0
93108 Contact: linux-i3c@vger.kernel.org
Documentation/ABI/testing/sysfs-bus-iio+38−4
@@ -362,10 +362,21 @@ Description: · 361 unmodified lines
362362 What: /sys/bus/iio/devices/iio:deviceX/in_accel_x_peak_raw
363363 What: /sys/bus/iio/devices/iio:deviceX/in_accel_y_peak_raw
364364 What: /sys/bus/iio/devices/iio:deviceX/in_accel_z_peak_raw
365+What: /sys/bus/iio/devices/iio:deviceX/in_humidityrelative_peak_raw
366+What: /sys/bus/iio/devices/iio:deviceX/in_temp_peak_raw
365367 KernelVersion: 2.6.36
366368 Contact: linux-iio@vger.kernel.org
367369 Description:
368− Highest value since some reset condition. These
370+ Highest value since some reset condition. These
371+ attributes allow access to this and are otherwise
372+ the direct equivalent of the <type>Y[_name]_raw attributes.
373+
374+What: /sys/bus/iio/devices/iio:deviceX/in_humidityrelative_trough_raw
375+What: /sys/bus/iio/devices/iio:deviceX/in_temp_trough_raw
376+KernelVersion: 6.7
377+Contact: linux-iio@vger.kernel.org
378+Description:
379+ Lowest value since some reset condition. These
369380 attributes allow access to this and are otherwise
370381 the direct equivalent of the <type>Y[_name]_raw attributes.
371382
@@ -618,7 +629,9 @@ KernelVersion: 2.6.35 · 246 unmodified lines
618629 Contact: linux-iio@vger.kernel.org
619630 Description:
620631 If a discrete set of scale values is available, they
621− are listed in this attribute.
632+ are listed in this attribute. Unlike illumination,
633+ multiplying intensity by intensity_scale does not
634+ yield value with any standardized unit.
622635
623636 What: /sys/bus/iio/devices/iio:deviceX/out_voltageY_hardwaregain
624637 What: /sys/bus/iio/devices/iio:deviceX/in_intensity_hardwaregain
@@ -1574,6 +1587,8 @@ What: /sys/.../iio:deviceX/in_intensityY_raw · 949 unmodified lines
15741587 What: /sys/.../iio:deviceX/in_intensityY_ir_raw
15751588 What: /sys/.../iio:deviceX/in_intensityY_both_raw
15761589 What: /sys/.../iio:deviceX/in_intensityY_uv_raw
1590+What: /sys/.../iio:deviceX/in_intensityY_uva_raw
1591+What: /sys/.../iio:deviceX/in_intensityY_uvb_raw
15771592 What: /sys/.../iio:deviceX/in_intensityY_duv_raw
15781593 KernelVersion: 3.4
15791594 Contact: linux-iio@vger.kernel.org
@@ -1582,8 +1597,9 @@ Description: · 2 unmodified lines
15821597 that measurements contain visible and infrared light
15831598 components or just infrared light, respectively. Modifier
15841599 uv indicates that measurements contain ultraviolet light
1585− components. Modifier duv indicates that measurements
1586− contain deep ultraviolet light components.
1600+ components. Modifiers uva, uvb and duv indicate that
1601+ measurements contain A, B or deep (C) ultraviolet light
1602+ components respectively.
15871603
15881604 What: /sys/.../iio:deviceX/in_uvindex_input
15891605 KernelVersion: 4.6
@@ -2254,3 +2270,21 @@ Description: · 664 unmodified lines
22542270 If a label is defined for this event add that to the event
22552271 specific attributes. This is useful for userspace to be able to
22562272 better identify an individual event.
2273+
2274+What: /sys/.../events/in_accel_gesture_tap_wait_timeout
2275+KernelVersion: 6.7
2276+Contact: linux-iio@vger.kernel.org
2277+Description:
2278+ Enable tap gesture confirmation with timeout.
2279+
2280+What: /sys/.../events/in_accel_gesture_tap_wait_dur
2281+KernelVersion: 6.7
2282+Contact: linux-iio@vger.kernel.org
2283+Description:
2284+ Timeout value in seconds for tap gesture confirmation.
2285+
2286+What: /sys/.../events/in_accel_gesture_tap_wait_dur_available
2287+KernelVersion: 6.7
2288+Contact: linux-iio@vger.kernel.org
2289+Description:
2290+ List of available timeout value for tap gesture confirmation.
Documentation/ABI/testing/sysfs-bus-optee-devices+9−0
@@ -6,3 +6,12 @@ Description: · 5 unmodified lines
66 OP-TEE bus provides reference to registered drivers under this directory. The <uuid>
77 matches Trusted Application (TA) driver and corresponding TA in secure OS. Drivers
88 are free to create needed API under optee-ta-<uuid> directory.
9+
10+What: /sys/bus/tee/devices/optee-ta-<uuid>/need_supplicant
11+Date: November 2023
12+KernelVersion: 6.7
13+Contact: op-tee@lists.trustedfirmware.org
14+Description:
15+ Allows to distinguish whether an OP-TEE based TA/device requires user-space
16+ tee-supplicant to function properly or not. This attribute will be present for
17+ devices which depend on tee-supplicant to be running.
Documentation/ABI/testing/sysfs-bus-spi-devices-spi-nor+3−0
@@ -25,6 +25,9 @@ KernelVersion: 5.14 · 24 unmodified lines
2525 Contact: linux-mtd@lists.infradead.org
2626 Description: (RO) Part name of the SPI NOR flash.
2727
28+ The attribute is optional. User space should not rely on
29+ it to be present or even correct. Instead, user space
30+ should read the jedec_id attribute.
2831
2932 What: /sys/bus/spi/devices/.../spi-nor/sfdp
3033 Date: April 2021
Documentation/ABI/testing/sysfs-class-devfreq+3−0
@@ -52,6 +52,9 @@ Description: · 51 unmodified lines
5252
5353 echo 0 > /sys/class/devfreq/.../trans_stat
5454
55+ If the transition table is bigger than PAGE_SIZE, reading
56+ this will return an -EFBIG error.
57+
5558 What: /sys/class/devfreq/.../available_frequencies
5659 Date: October 2012
5760 Contact: Nishanth Menon <nm@ti.com>
Documentation/ABI/testing/sysfs-class-hwmon+100−10
@@ -381,6 +381,15 @@ Description: · 380 unmodified lines
381381
382382 RW
383383
384+What: /sys/class/hwmon/hwmonX/tempY_max_alarm
385+Description:
386+ Maximum temperature alarm flag.
387+
388+ - 0: OK
389+ - 1: temperature has reached tempY_max
390+
391+ RO
392+
384393 What: /sys/class/hwmon/hwmonX/tempY_min
385394 Description:
386395 Temperature min value.
@@ -389,6 +398,15 @@ Description: · 2 unmodified lines
389398
390399 RW
391400
401+What: /sys/class/hwmon/hwmonX/tempY_min_alarm
402+Description:
403+ Minimum temperature alarm flag.
404+
405+ - 0: OK
406+ - 1: temperature has reached tempY_min
407+
408+ RO
409+
392410 What: /sys/class/hwmon/hwmonX/tempY_max_hyst
393411 Description:
394412 Temperature hysteresis value for max limit.
@@ -434,12 +452,7 @@ Description: · 39 unmodified lines
434452 - 0: OK
435453 - 1: temperature has reached tempY_crit
436454
437− RW
438−
439− Contrary to regular alarm flags which clear themselves
440− automatically when read, this one sticks until cleared by
441− the user. This is done by writing 0 to the file. Writing
442− other values is unsupported.
455+ RO
443456
444457 What: /sys/class/hwmon/hwmonX/tempY_crit_hyst
445458 Description:
@@ -462,6 +475,15 @@ Description: · 16 unmodified lines
462475
463476 RW
464477
478+What: /sys/class/hwmon/hwmonX/tempY_emergency_alarm
479+Description:
480+ Emergency high temperature alarm flag.
481+
482+ - 0: OK
483+ - 1: temperature has reached tempY_emergency
484+
485+ RO
486+
465487 What: /sys/class/hwmon/hwmonX/tempY_emergency_hyst
466488 Description:
467489 Temperature hysteresis value for emergency limit.
@@ -887,15 +909,15 @@ Description: · 419 unmodified lines
887909
888910 RW
889911
890−What: /sys/class/hwmon/hwmonX/humidityY_input
912+What: /sys/class/hwmon/hwmonX/humidityY_alarm
891913 Description:
892− Humidity
914+ Humidity limit detection
893915
894− Unit: milli-percent (per cent mille, pcm)
916+ - 0: OK
917+ - 1: Humidity limit has been reached
895918
896919 RO
897920
898−
899921 What: /sys/class/hwmon/hwmonX/humidityY_enable
900922 Description:
901923 Enable or disable the sensors
@@ -908,6 +930,74 @@ Description: · 6 unmodified lines
908930
909931 RW
910932
933+What: /sys/class/hwmon/hwmonX/humidityY_fault
934+Description:
935+ Reports a humidity sensor failure.
936+
937+ - 1: Failed
938+ - 0: Ok
939+
940+ RO
941+
942+What: /sys/class/hwmon/hwmonX/humidityY_input
943+Description:
944+ Humidity
945+
946+ Unit: milli-percent (per cent mille, pcm)
947+
948+ RO
949+
950+What: /sys/class/hwmon/hwmonX/humidityY_label
951+Description:
952+ Suggested humidity channel label.
953+
954+ Text string
955+
956+ Should only be created if the driver has hints about what
957+ this humidity channel is being used for, and user-space
958+ doesn't. In all other cases, the label is provided by
959+ user-space.
960+
961+ RO
962+
963+What: /sys/class/hwmon/hwmonX/humidityY_max
964+Description:
965+ Humidity max value.
966+
967+ Unit: milli-percent (per cent mille, pcm)
968+
969+ RW
970+
971+What: /sys/class/hwmon/hwmonX/humidityY_max_hyst
972+Description:
973+ Humidity hysteresis value for max limit.
974+
975+ Unit: milli-percent (per cent mille, pcm)
976+
977+ Must be reported as an absolute humidity, NOT a delta
978+ from the max value.
979+
980+ RW
981+
982+What: /sys/class/hwmon/hwmonX/humidityY_min
983+Description:
984+ Humidity min value.
985+
986+ Unit: milli-percent (per cent mille, pcm)
987+
988+ RW
989+
990+What: /sys/class/hwmon/hwmonX/humidityY_min_hyst
991+Description:
992+ Humidity hysteresis value for min limit.
993+
994+ Unit: milli-percent (per cent mille, pcm)
995+
996+ Must be reported as an absolute humidity, NOT a delta
997+ from the min value.
998+
999+ RW
1000+
9111001 What: /sys/class/hwmon/hwmonX/humidityY_rated_min
9121002 Description:
9131003 Minimum rated humidity.
Documentation/ABI/testing/sysfs-class-led+0−9
@@ -59,15 +59,6 @@ Description: · 58 unmodified lines
5959 brightness. Reading this file when no hw brightness change
6060 event has happened will return an ENODATA error.
6161
62−What: /sys/class/leds/<led>/color
63−Date: June 2023
64−KernelVersion: 6.5
65−Description:
66− Color of the LED.
67−
68− This is a read-only file. Reading this file returns the color
69− of the LED as a string (e.g: "red", "green", "multicolor").
70−
7162 What: /sys/class/leds/<led>/trigger
7263 Date: March 2006
7364 KernelVersion: 2.6.17
Documentation/ABI/testing/sysfs-class-led-trigger-netdev+39−0
@@ -114,6 +114,45 @@ Description: · 113 unmodified lines
114114 speed of 1000Mbps of the named network device.
115115 Setting this value also immediately changes the LED state.
116116
117+What: /sys/class/leds/<led>/link_2500
118+Date: Nov 2023
119+KernelVersion: 6.8
120+Contact: linux-leds@vger.kernel.org
121+Description:
122+ Signal the link speed state of 2500Mbps of the named network device.
123+
124+ If set to 0 (default), the LED's normal state is off.
125+
126+ If set to 1, the LED's normal state reflects the link state
127+ speed of 2500Mbps of the named network device.
128+ Setting this value also immediately changes the LED state.
129+
130+What: /sys/class/leds/<led>/link_5000
131+Date: Nov 2023
132+KernelVersion: 6.8
133+Contact: linux-leds@vger.kernel.org
134+Description:
135+ Signal the link speed state of 5000Mbps of the named network device.
136+
137+ If set to 0 (default), the LED's normal state is off.
138+
139+ If set to 1, the LED's normal state reflects the link state
140+ speed of 5000Mbps of the named network device.
141+ Setting this value also immediately changes the LED state.
142+
143+What: /sys/class/leds/<led>/link_10000
144+Date: Nov 2023
145+KernelVersion: 6.8
146+Contact: linux-leds@vger.kernel.org
147+Description:
148+ Signal the link speed state of 10000Mbps of the named network device.
149+
150+ If set to 0 (default), the LED's normal state is off.
151+
152+ If set to 1, the LED's normal state reflects the link state
153+ speed of 10000Mbps of the named network device.
154+ Setting this value also immediately changes the LED state.
155+
117156 What: /sys/class/leds/<led>/half_duplex
118157 Date: Jun 2023
119158 KernelVersion: 6.5
Documentation/ABI/testing/sysfs-class-led-trigger-tty+56−0
@@ -4,3 +4,59 @@ KernelVersion: 5.10 · 3 unmodified lines
44 Contact: linux-leds@vger.kernel.org
55 Description:
66 Specifies the tty device name of the triggering tty
7+
8+What: /sys/class/leds/<led>/rx
9+Date: February 2024
10+KernelVersion: 6.8
11+Description:
12+ Signal reception (rx) of data on the named tty device.
13+ If set to 0, the LED will not blink on reception.
14+ If set to 1 (default), the LED will blink on reception.
15+
16+What: /sys/class/leds/<led>/tx
17+Date: February 2024
18+KernelVersion: 6.8
19+Description:
20+ Signal transmission (tx) of data on the named tty device.
21+ If set to 0, the LED will not blink on transmission.
22+ If set to 1 (default), the LED will blink on transmission.
23+
24+What: /sys/class/leds/<led>/cts
25+Date: February 2024
26+KernelVersion: 6.8
27+Description:
28+ CTS = Clear To Send
29+ DCE is ready to accept data from the DTE.
30+ If the line state is detected, the LED is switched on.
31+ If set to 0 (default), the LED will not evaluate CTS.
32+ If set to 1, the LED will evaluate CTS.
33+
34+What: /sys/class/leds/<led>/dsr
35+Date: February 2024
36+KernelVersion: 6.8
37+Description:
38+ DSR = Data Set Ready
39+ DCE is ready to receive and send data.
40+ If the line state is detected, the LED is switched on.
41+ If set to 0 (default), the LED will not evaluate DSR.
42+ If set to 1, the LED will evaluate DSR.
43+
44+What: /sys/class/leds/<led>/dcd
45+Date: February 2024
46+KernelVersion: 6.8
47+Description:
48+ DCD = Data Carrier Detect
49+ DTE is receiving a carrier from the DCE.
50+ If the line state is detected, the LED is switched on.
51+ If set to 0 (default), the LED will not evaluate CAR (DCD).
52+ If set to 1, the LED will evaluate CAR (DCD).
53+
54+What: /sys/class/leds/<led>/rng
55+Date: February 2024
56+KernelVersion: 6.8
57+Description:
58+ RNG = Ring Indicator
59+ DCE has detected an incoming ring signal on the telephone
60+ line. If the line state is detected, the LED is switched on.
61+ If set to 0 (default), the LED will not evaluate RNG.
62+ If set to 1, the LED will evaluate RNG.
Documentation/ABI/testing/sysfs-devices-platform-kunpeng_hccs+3−3
@@ -3,7 +3,7 @@ What: /sys/devices/platform/HISI04Bx:00/chipX/linked_full_lane · 2 unmodified lines
33 What: /sys/devices/platform/HISI04Bx:00/chipX/crc_err_cnt
44 Date: November 2023
55 KernelVersion: 6.6
6−Contact: Huisong Li <lihuisong@huawei.org>
6+Contact: Huisong Li <lihuisong@huawei.com>
77 Description:
88 The /sys/devices/platform/HISI04Bx:00/chipX/ directory
99 contains read-only attributes exposing some summarization
@@ -26,7 +26,7 @@ What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/linked_full_lane · 16 unmodified lines
2626 What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/crc_err_cnt
2727 Date: November 2023
2828 KernelVersion: 6.6
29−Contact: Huisong Li <lihuisong@huawei.org>
29+Contact: Huisong Li <lihuisong@huawei.com>
3030 Description:
3131 The /sys/devices/platform/HISI04Bx:00/chipX/dieY/ directory
3232 contains read-only attributes exposing some summarization
@@ -54,7 +54,7 @@ What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/lane_mask · 21 unmodified lines
5454 What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/crc_err_cnt
5555 Date: November 2023
5656 KernelVersion: 6.6
57−Contact: Huisong Li <lihuisong@huawei.org>
57+Contact: Huisong Li <lihuisong@huawei.com>
5858 Description:
5959 The /sys/devices/platform/HISI04Bx/chipX/dieX/hccsN/ directory
6060 contains read-only attributes exposing information about
Documentation/ABI/testing/sysfs-driver-habanalabs+12−0
@@ -149,6 +149,18 @@ Contact: ogabbay@kernel.org · 148 unmodified lines
149149 Description: Displays the current clock frequency, in Hz, of the MME compute
150150 engine. This property is valid only for the Goya ASIC family
151151
152+What: /sys/class/accel/accel<n>/device/module_id
153+Date: Nov 2023
154+KernelVersion: not yet upstreamed
155+Contact: ogabbay@kernel.org
156+Description: Displays the device's module id
157+
158+What: /sys/class/accel/accel<n>/device/parent_device
159+Date: Nov 2023
160+KernelVersion: 6.8
161+Contact: ttayar@habana.ai
162+Description: Displays the name of the parent device of the accel device
163+
152164 What: /sys/class/accel/accel<n>/device/pci_addr
153165 Date: Jan 2019
154166 KernelVersion: 5.1
Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon+70−0
@@ -0,0 +1,70 @@
1+What: /sys/devices/.../hwmon/hwmon<i>/power1_max
2+Date: September 2023
3+KernelVersion: 6.5
4+Contact: intel-xe@lists.freedesktop.org
5+Description: RW. Card reactive sustained (PL1) power limit in microwatts.
6+
7+ The power controller will throttle the operating frequency
8+ if the power averaged over a window (typically seconds)
9+ exceeds this limit. A read value of 0 means that the PL1
10+ power limit is disabled, writing 0 disables the
11+ limit. Writing values > 0 and <= TDP will enable the power limit.
12+
13+ Only supported for particular Intel xe graphics platforms.
14+
15+What: /sys/devices/.../hwmon/hwmon<i>/power1_rated_max
16+Date: September 2023
17+KernelVersion: 6.5
18+Contact: intel-xe@lists.freedesktop.org
19+Description: RO. Card default power limit (default TDP setting).
20+
21+ Only supported for particular Intel xe graphics platforms.
22+
23+What: /sys/devices/.../hwmon/hwmon<i>/power1_crit
24+Date: September 2023
25+KernelVersion: 6.5
26+Contact: intel-xe@lists.freedesktop.org
27+Description: RW. Card reactive critical (I1) power limit in microwatts.
28+
29+ Card reactive critical (I1) power limit in microwatts is exposed
30+ for client products. The power controller will throttle the
31+ operating frequency if the power averaged over a window exceeds
32+ this limit.
33+
34+ Only supported for particular Intel xe graphics platforms.
35+
36+What: /sys/devices/.../hwmon/hwmon<i>/curr1_crit
37+Date: September 2023
38+KernelVersion: 6.5
39+Contact: intel-xe@lists.freedesktop.org
40+Description: RW. Card reactive critical (I1) power limit in milliamperes.
41+
42+ Card reactive critical (I1) power limit in milliamperes is
43+ exposed for server products. The power controller will throttle
44+ the operating frequency if the power averaged over a window
45+ exceeds this limit.
46+
47+What: /sys/devices/.../hwmon/hwmon<i>/in0_input
48+Date: September 2023
49+KernelVersion: 6.5
50+Contact: intel-xe@lists.freedesktop.org
51+Description: RO. Current Voltage in millivolt.
52+
53+ Only supported for particular Intel xe graphics platforms.
54+
55+What: /sys/devices/.../hwmon/hwmon<i>/energy1_input
56+Date: September 2023
57+KernelVersion: 6.5
58+Contact: intel-xe@lists.freedesktop.org
59+Description: RO. Energy input of device in microjoules.
60+
61+ Only supported for particular Intel xe graphics platforms.
62+
63+What: /sys/devices/.../hwmon/hwmon<i>/power1_max_interval
64+Date: October 2023
65+KernelVersion: 6.6
66+Contact: intel-xe@lists.freedesktop.org
67+Description: RW. Sustained power limit interval (Tau in PL1/Tau) in
68+ milliseconds over which sustained power is averaged.
69+
70+ Only supported for particular Intel xe graphics platforms.
Documentation/ABI/testing/sysfs-driver-ufs+56−0
@@ -1223,6 +1223,55 @@ Description: This file shows the total latency (in micro seconds) of write · 1222 unmodified lines
12231223
12241224 The file is read only.
12251225
1226+What: /sys/bus/platform/drivers/ufshcd/*/power_info/lane
1227+What: /sys/bus/platform/devices/*.ufs/power_info/lane
1228+Date: September 2023
1229+Contact: Can Guo <quic_cang@quicinc.com>
1230+Description: This file shows how many lanes are enabled on the UFS link,
1231+ i.e., an output 2 means UFS link is operating with 2 lanes.
1232+
1233+ The file is read only.
1234+
1235+What: /sys/bus/platform/drivers/ufshcd/*/power_info/mode
1236+What: /sys/bus/platform/devices/*.ufs/power_info/mode
1237+Date: September 2023
1238+Contact: Can Guo <quic_cang@quicinc.com>
1239+Description: This file shows the PA power mode of UFS.
1240+
1241+ The file is read only.
1242+
1243+What: /sys/bus/platform/drivers/ufshcd/*/power_info/rate
1244+What: /sys/bus/platform/devices/*.ufs/power_info/rate
1245+Date: September 2023
1246+Contact: Can Guo <quic_cang@quicinc.com>
1247+Description: This file shows the speed rate of UFS link.
1248+
1249+ The file is read only.
1250+
1251+What: /sys/bus/platform/drivers/ufshcd/*/power_info/gear
1252+What: /sys/bus/platform/devices/*.ufs/power_info/gear
1253+Date: September 2023
1254+Contact: Can Guo <quic_cang@quicinc.com>
1255+Description: This file shows the gear of UFS link.
1256+
1257+ The file is read only.
1258+
1259+What: /sys/bus/platform/drivers/ufshcd/*/power_info/dev_pm
1260+What: /sys/bus/platform/devices/*.ufs/power_info/dev_pm
1261+Date: September 2023
1262+Contact: Can Guo <quic_cang@quicinc.com>
1263+Description: This file shows the UFS device power mode.
1264+
1265+ The file is read only.
1266+
1267+What: /sys/bus/platform/drivers/ufshcd/*/power_info/link_state
1268+What: /sys/bus/platform/devices/*.ufs/power_info/link_state
1269+Date: September 2023
1270+Contact: Can Guo <quic_cang@quicinc.com>
1271+Description: This file shows the state of UFS link.
1272+
1273+ The file is read only.
1274+
12261275 What: /sys/bus/platform/drivers/ufshcd/*/device_descriptor/wb_presv_us_en
12271276 What: /sys/bus/platform/devices/*.ufs/device_descriptor/wb_presv_us_en
12281277 Date: June 2020
@@ -1474,3 +1523,10 @@ Description: Indicates status of Write Booster. · 245 unmodified lines
14741523
14751524 The file is read only.
14761525
1526+What: /sys/bus/platform/drivers/ufshcd/*/rtc_update_ms
1527+What: /sys/bus/platform/devices/*.ufs/rtc_update_ms
1528+Date: November 2023
1529+Contact: Bean Huo <beanhuo@micron.com>
1530+Description:
1531+ rtc_update_ms indicates how often the host should synchronize or update the
1532+ UFS RTC. If set to 0, this will disable UFS RTC periodic update.
Documentation/ABI/testing/sysfs-firmware-initrd+8−0
@@ -0,0 +1,8 @@
1+What: /sys/firmware/initrd
2+Date: December 2023
3+Contact: Alexander Graf <graf@amazon.com>
4+Description:
5+ When the kernel was booted with an initrd and the
6+ "retain_initrd" option is set on the kernel command
7+ line, /sys/firmware/initrd contains the contents of the
8+ initrd that the kernel was booted with.
Documentation/ABI/testing/sysfs-fs-f2fs+21−0
@@ -498,6 +498,21 @@ Description: Show status of f2fs checkpoint in real time. · 497 unmodified lines
498498 CP_RESIZEFS_FLAG 0x00004000
499499 =============================== ==============================
500500
501+What: /sys/fs/f2fs/<disk>/stat/issued_discard
502+Date: December 2023
503+Contact: "Zhiguo Niu" <zhiguo.niu@unisoc.com>
504+Description: Shows the number of issued discard.
505+
506+What: /sys/fs/f2fs/<disk>/stat/queued_discard
507+Date: December 2023
508+Contact: "Zhiguo Niu" <zhiguo.niu@unisoc.com>
509+Description: Shows the number of queued discard.
510+
511+What: /sys/fs/f2fs/<disk>/stat/undiscard_blks
512+Date: December 2023
513+Contact: "Zhiguo Niu" <zhiguo.niu@unisoc.com>
514+Description: Shows the total number of undiscard blocks.
515+
501516 What: /sys/fs/f2fs/<disk>/ckpt_thread_ioprio
502517 Date: January 2021
503518 Contact: "Daeho Jeong" <daehojeong@google.com>
@@ -740,3 +755,9 @@ Description: When compress cache is on, it controls cached page · 236 unmodified lines
740755 If cached page percent exceed threshold, then deny caching compress page.
741756 The value should be in range of (0, 100], by default it was initialized
742757 as 20(%).
758+
759+What: /sys/fs/f2fs/<disk>/discard_io_aware
760+Date: November 2023
761+Contact: "Chao Yu" <chao@kernel.org>
762+Description: It controls to enable/disable IO aware feature for background discard.
763+ By default, the value is 1 which indicates IO aware is on.
Documentation/ABI/testing/sysfs-kernel-mm-damon+27−6
@@ -25,12 +25,14 @@ Description: Writing 'on' or 'off' to this file makes the kdamond starts or · 24 unmodified lines
2525 stops, respectively. Reading the file returns the keywords
2626 based on the current status. Writing 'commit' to this file
2727 makes the kdamond reads the user inputs in the sysfs files
28− except 'state' again. Writing 'update_schemes_stats' to the
29− file updates contents of schemes stats files of the kdamond.
30− Writing 'update_schemes_tried_regions' to the file updates
31− contents of 'tried_regions' directory of every scheme directory
32− of this kdamond. Writing 'update_schemes_tried_bytes' to the
33− file updates only '.../tried_regions/total_bytes' files of this
28+ except 'state' again. Writing 'commit_schemes_quota_goals' to
29+ this file makes the kdamond reads the quota goal files again.
30+ Writing 'update_schemes_stats' to the file updates contents of
31+ schemes stats files of the kdamond. Writing
32+ 'update_schemes_tried_regions' to the file updates contents of
33+ 'tried_regions' directory of every scheme directory of this
34+ kdamond. Writing 'update_schemes_tried_bytes' to the file
35+ updates only '.../tried_regions/total_bytes' files of this
3436 kdamond. Writing 'clear_schemes_tried_regions' to the file
3537 removes contents of the 'tried_regions' directory.
3638
@@ -212,6 +214,25 @@ Contact: SeongJae Park <sj@kernel.org> · 175 unmodified lines
212214 Description: Writing to and reading from this file sets and gets the quotas
213215 charge reset interval of the scheme in milliseconds.
214216
217+What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/quotas/goals/nr_goals
218+Date: Nov 2023
219+Contact: SeongJae Park <sj@kernel.org>
220+Description: Writing a number 'N' to this file creates the number of
221+ directories for setting automatic tuning of the scheme's
222+ aggressiveness named '0' to 'N-1' under the goals/ directory.
223+
224+What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/quotas/goals/<G>/target_value
225+Date: Nov 2023
226+Contact: SeongJae Park <sj@kernel.org>
227+Description: Writing to and reading from this file sets and gets the target
228+ value of the goal metric.
229+
230+What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/quotas/goals/<G>/current_value
231+Date: Nov 2023
232+Contact: SeongJae Park <sj@kernel.org>
233+Description: Writing to and reading from this file sets and gets the current
234+ value of the goal metric.
235+
215236 What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/quotas/weights/sz_permil
216237 Date: Mar 2022
217238 Contact: SeongJae Park <sj@kernel.org>
Documentation/ABI/testing/sysfs-nvmem-cells+21−0
@@ -0,0 +1,21 @@
1+What: /sys/bus/nvmem/devices/.../cells/<cell-name>
2+Date: May 2023
3+KernelVersion: 6.5
4+Contact: Miquel Raynal <miquel.raynal@bootlin.com>
5+Description:
6+ The "cells" folder contains one file per cell exposed by the
7+ NVMEM device. The name of the file is: <name>@<where>, with
8+ <name> being the cell name and <where> its location in the NVMEM
9+ device, in hexadecimal (without the '0x' prefix, to mimic device
10+ tree node names). The length of the file is the size of the cell
11+ (when known). The content of the file is the binary content of
12+ the cell (may sometimes be ASCII, likely without trailing
13+ character).
14+ Note: This file is only present if CONFIG_NVMEM_SYSFS
15+ is enabled.
16+
17+ Example::
18+
19+ hexdump -C /sys/bus/nvmem/devices/1-00563/cells/product-name@d
20+ 00000000 54 4e 34 38 4d 2d 50 2d 44 4e |TN48M-P-DN|
21+ 0000000a
Documentation/ABI/testing/sysfs-platform-silicom+29−0
@@ -0,0 +1,29 @@
1+What: /sys/devices/platform/silicom-platform/uc_version
2+Date: November 2023
3+KernelVersion: 6.7
4+Contact: Henry Shi <henrys@silicom-usa.com>
5+Description:
6+ This file allows to read microcontroller firmware
7+ version of current platform.
8+
9+What: /sys/devices/platform/silicom-platform/power_cycle
10+Date: November 2023
11+KernelVersion: 6.7
12+Contact: Henry Shi <henrys@silicom-usa.com>
13+ This file allow user to power cycle the platform.
14+ Default value is 0; when set to 1, it powers down
15+ the platform, waits 5 seconds, then powers on the
16+ device. It returns to default value after power cycle.
17+
18+ 0 - default value.
19+
20+What: /sys/devices/platform/silicom-platform/efuse_status
21+Date: November 2023
22+KernelVersion: 6.7
23+Contact: Henry Shi <henrys@silicom-usa.com>
24+Description:
25+ This file is read only. It returns the current
26+ OTP status:
27+
28+ 0 - not programmed.
29+ 1 - programmed.
Documentation/Makefile+15−1
@@ -97,7 +97,21 @@ quiet_cmd_sphinx = SPHINX $@ --> file://$(abspath $(BUILDDIR)/$3/$4) · 96 unmodified lines
9797 cp $(if $(patsubst /%,,$(DOCS_CSS)),$(abspath $(srctree)/$(DOCS_CSS)),$(DOCS_CSS)) $(BUILDDIR)/$3/_static/; \
9898 fi
9999
100−htmldocs:
100+YNL_INDEX:=$(srctree)/Documentation/networking/netlink_spec/index.rst
101+YNL_RST_DIR:=$(srctree)/Documentation/networking/netlink_spec
102+YNL_YAML_DIR:=$(srctree)/Documentation/netlink/specs
103+YNL_TOOL:=$(srctree)/tools/net/ynl/ynl-gen-rst.py
104+
105+YNL_RST_FILES_TMP := $(patsubst %.yaml,%.rst,$(wildcard $(YNL_YAML_DIR)/*.yaml))
106+YNL_RST_FILES := $(patsubst $(YNL_YAML_DIR)%,$(YNL_RST_DIR)%, $(YNL_RST_FILES_TMP))
107+
108+$(YNL_INDEX): $(YNL_RST_FILES)
109+ $(Q)$(YNL_TOOL) -o $@ -x
110+
111+$(YNL_RST_DIR)/%.rst: $(YNL_YAML_DIR)/%.yaml $(YNL_TOOL)
112+ $(Q)$(YNL_TOOL) -i $< -o $@
113+
114+htmldocs: $(YNL_INDEX)
101115 @$(srctree)/scripts/sphinx-pre-install --version-check
102116 @+$(foreach var,$(SPHINXDIRS),$(call loop_cmd,sphinx,html,$(var),,$(var)))
103117
Documentation/PCI/boot-interrupts.rst+1−1
@@ -61,7 +61,7 @@ Conditions · 60 unmodified lines
6161 ==========
6262
6363 The use of threaded interrupts is the most likely condition to trigger
64−this problem today. Threaded interrupts may not be reenabled after the IRQ
64+this problem today. Threaded interrupts may not be re-enabled after the IRQ
6565 handler wakes. These "one shot" conditions mean that the threaded interrupt
6666 needs to keep the interrupt line masked until the threaded handler has run.
6767 Especially when dealing with high data rate interrupts, the thread needs to
Documentation/PCI/msi-howto.rst+1−1
@@ -236,7 +236,7 @@ including a full 'lspci -v' so we can add the quirks to the kernel. · 235 unmodified lines
236236 Disabling MSIs below a bridge
237237 -----------------------------
238238
239−Some PCI bridges are not able to route MSIs between busses properly.
239+Some PCI bridges are not able to route MSIs between buses properly.
240240 In this case, MSIs must be disabled on all devices behind the bridge.
241241
242242 Some bridges allow you to enable MSIs by changing some bits in their
Documentation/RAS/ras.rst+26−0
@@ -0,0 +1,26 @@
1+.. SPDX-License-Identifier: GPL-2.0
2+
3+Reliability, Availability and Serviceability features
4+=====================================================
5+
6+This documents different aspects of the RAS functionality present in the
7+kernel.
8+
9+Error decoding
10+---------------
11+
12+* x86
13+
14+Error decoding on AMD systems should be done using the rasdaemon tool:
15+https://github.com/mchehab/rasdaemon/
16+
17+While the daemon is running, it would automatically log and decode
18+errors. If not, one can still decode such errors by supplying the
19+hardware information from the error::
20+
21+ $ rasdaemon -p --status <STATUS> --ipid <IPID> --smca
22+
23+Also, the user can pass particular family and model to decode the error
24+string::
25+
26+ $ rasdaemon -p --status <STATUS> --ipid <IPID> --smca --family <CPU Family> --model <CPU Model> --bank <BANK_NUM>
Documentation/RCU/checklist.rst+16−9
@@ -241,15 +241,22 @@ over a rather long period of time, but improvements are always welcome! · 240 unmodified lines
241241 srcu_struct. The rules for the expedited RCU grace-period-wait
242242 primitives are the same as for their non-expedited counterparts.
243243
244− If the updater uses call_rcu_tasks() or synchronize_rcu_tasks(),
245− then the readers must refrain from executing voluntary
246− context switches, that is, from blocking. If the updater uses
247− call_rcu_tasks_trace() or synchronize_rcu_tasks_trace(), then
248− the corresponding readers must use rcu_read_lock_trace() and
249− rcu_read_unlock_trace(). If an updater uses call_rcu_tasks_rude()
250− or synchronize_rcu_tasks_rude(), then the corresponding readers
251− must use anything that disables preemption, for example,
252− preempt_disable() and preempt_enable().
244+ Similarly, it is necessary to correctly use the RCU Tasks flavors:
245+
246+ a. If the updater uses synchronize_rcu_tasks() or
247+ call_rcu_tasks(), then the readers must refrain from
248+ executing voluntary context switches, that is, from
249+ blocking.
250+
251+ b. If the updater uses call_rcu_tasks_trace()
252+ or synchronize_rcu_tasks_trace(), then the
253+ corresponding readers must use rcu_read_lock_trace()
254+ and rcu_read_unlock_trace().
255+
256+ c. If an updater uses call_rcu_tasks_rude() or
257+ synchronize_rcu_tasks_rude(), then the corresponding
258+ readers must use anything that disables preemption,
259+ for example, preempt_disable() and preempt_enable().
253260
254261 Mixing things up will result in confusion and broken kernels, and
255262 has even resulted in an exploitable security issue. Therefore,
Documentation/RCU/rcu_dereference.rst+20−7
@@ -3,13 +3,26 @@ · 2 unmodified lines
33 PROPER CARE AND FEEDING OF RETURN VALUES FROM rcu_dereference()
44 ===============================================================
55
6−Most of the time, you can use values from rcu_dereference() or one of
7−the similar primitives without worries. Dereferencing (prefix "*"),
8−field selection ("->"), assignment ("="), address-of ("&"), addition and
9−subtraction of constants, and casts all work quite naturally and safely.
10−
11−It is nevertheless possible to get into trouble with other operations.
12−Follow these rules to keep your RCU code working properly:
6+Proper care and feeding of address and data dependencies is critically
7+important to correct use of things like RCU. To this end, the pointers
8+returned from the rcu_dereference() family of primitives carry address and
9+data dependencies. These dependencies extend from the rcu_dereference()
10+macro's load of the pointer to the later use of that pointer to compute
11+either the address of a later memory access (representing an address
12+dependency) or the value written by a later memory access (representing
13+a data dependency).
14+
15+Most of the time, these dependencies are preserved, permitting you to
16+freely use values from rcu_dereference(). For example, dereferencing
17+(prefix "*"), field selection ("->"), assignment ("="), address-of
18+("&"), casts, and addition or subtraction of constants all work quite
19+naturally and safely. However, because current compilers do not take
20+either address or data dependencies into account it is still possible
21+to get into trouble.
22+
23+Follow these rules to preserve the address and data dependencies emanating
24+from your calls to rcu_dereference() and friends, thus keeping your RCU
25+readers working properly:
1326
1427 - You must use one of the rcu_dereference() family of primitives
1528 to load an RCU-protected pointer, otherwise CONFIG_PROVE_RCU
Documentation/RCU/torture.rst+1−1
@@ -185,7 +185,7 @@ argument. · 184 unmodified lines
185185 Not all changes require that all scenarios be run. For example, a change
186186 to Tree SRCU might run only the SRCU-N and SRCU-P scenarios using the
187187 --configs argument to kvm.sh as follows: "--configs 'SRCU-N SRCU-P'".
188−Large systems can run multiple copies of of the full set of scenarios,
188+Large systems can run multiple copies of the full set of scenarios,
189189 for example, a system with 448 hardware threads can run five instances
190190 of the full set concurrently. To make this happen::
191191
Documentation/admin-guide/abi-obsolete.rst+1−1
@@ -7,5 +7,5 @@ marked to be removed at some later point in time. · 6 unmodified lines
77 The description of the interface will document the reason why it is
88 obsolete and when it can be expected to be removed.
99
10−.. kernel-abi:: $srctree/Documentation/ABI/obsolete
10+.. kernel-abi:: ABI/obsolete
1111 :rst:
Documentation/admin-guide/abi-removed.rst+1−1
@@ -1,5 +1,5 @@
11 ABI removed symbols
22 ===================
33
4−.. kernel-abi:: $srctree/Documentation/ABI/removed
4+.. kernel-abi:: ABI/removed
55 :rst:
Documentation/admin-guide/abi-stable.rst+1−1
@@ -10,5 +10,5 @@ for at least 2 years. · 9 unmodified lines
1010 Most interfaces (like syscalls) are expected to never change and always
1111 be available.
1212
13−.. kernel-abi:: $srctree/Documentation/ABI/stable
13+.. kernel-abi:: ABI/stable
1414 :rst:
Documentation/admin-guide/abi-testing.rst+1−1
@@ -16,5 +16,5 @@ Programs that use these interfaces are strongly encouraged to add their · 15 unmodified lines
1616 name to the description of these interfaces, so that the kernel
1717 developers can easily notify them if any changes occur.
1818
19−.. kernel-abi:: $srctree/Documentation/ABI/testing
19+.. kernel-abi:: ABI/testing
2020 :rst:
Documentation/admin-guide/acpi/cppc_sysfs.rst+1−1
@@ -75,4 +75,4 @@ taking two different snapshots of feedback counters at time T1 and T2. · 74 unmodified lines
7575 delivered_counter_delta = fbc_t2[del] - fbc_t1[del]
7676 reference_counter_delta = fbc_t2[ref] - fbc_t1[ref]
7777
78− delivered_perf = (refernce_perf x delivered_counter_delta) / reference_counter_delta
78+ delivered_perf = (reference_perf x delivered_counter_delta) / reference_counter_delta
Documentation/admin-guide/blockdev/zram.rst+1−1
@@ -328,7 +328,7 @@ as idle:: · 327 unmodified lines
328328 From now on, any pages on zram are idle pages. The idle mark
329329 will be removed until someone requests access of the block.
330330 IOW, unless there is access request, those pages are still idle pages.
331−Additionally, when CONFIG_ZRAM_MEMORY_TRACKING is enabled pages can be
331+Additionally, when CONFIG_ZRAM_TRACK_ENTRY_ACTIME is enabled pages can be
332332 marked as idle based on how long (in seconds) it's been since they were
333333 last accessed::
334334
Documentation/admin-guide/cgroup-v2.rst+42−6
@@ -1093,7 +1093,11 @@ All time durations are in microseconds. · 1092 unmodified lines
10931093 A read-write single value file which exists on non-root
10941094 cgroups. The default is "100".
10951095
1096− The weight in the range [1, 10000].
1096+ For non idle groups (cpu.idle = 0), the weight is in the
1097+ range [1, 10000].
1098+
1099+ If the cgroup has been configured to be SCHED_IDLE (cpu.idle = 1),
1100+ then the weight will show as a 0.
10971101
10981102 cpu.weight.nice
10991103 A read-write single value file which exists on non-root
@@ -1157,6 +1161,16 @@ All time durations are in microseconds. · 57 unmodified lines
11571161 values similar to the sched_setattr(2). This maximum utilization
11581162 value is used to clamp the task specific maximum utilization clamp.
11591163
1164+ cpu.idle
1165+ A read-write single value file which exists on non-root cgroups.
1166+ The default is 0.
1167+
1168+ This is the cgroup analog of the per-task SCHED_IDLE sched policy.
1169+ Setting this value to a 1 will make the scheduling policy of the
1170+ cgroup SCHED_IDLE. The threads inside the cgroup will retain their
1171+ own relative priorities, but the cgroup itself will be treated as
1172+ very low priority relative to its peers.
1173+
11601174
11611175
11621176 Memory
@@ -1679,6 +1693,21 @@ PAGE_SIZE multiple when read back. · 516 unmodified lines
16791693 limit, it will refuse to take any more stores before existing
16801694 entries fault back in or are written out to disk.
16811695
1696+ memory.zswap.writeback
1697+ A read-write single value file. The default value is "1". The
1698+ initial value of the root cgroup is 1, and when a new cgroup is
1699+ created, it inherits the current value of its parent.
1700+
1701+ When this is set to 0, all swapping attempts to swapping devices
1702+ are disabled. This included both zswap writebacks, and swapping due
1703+ to zswap store failures. If the zswap store failures are recurring
1704+ (for e.g if the pages are incompressible), users can observe
1705+ reclaim inefficiency after disabling writeback (because the same
1706+ pages might be rejected again and again).
1707+
1708+ Note that this is subtly different from setting memory.swap.max to
1709+ 0, as it still allows for pages to be written to the zswap pool.
1710+
16821711 memory.pressure
16831712 A read-only nested-keyed file.
16841713
@@ -2316,6 +2345,13 @@ Cpuset Interface Files · 631 unmodified lines
23162345 treated to have an implicit value of "cpuset.cpus" in the
23172346 formation of local partition.
23182347
2348+ cpuset.cpus.isolated
2349+ A read-only and root cgroup only multiple values file.
2350+
2351+ This file shows the set of all isolated CPUs used in existing
2352+ isolated partitions. It will be empty if no isolated partition
2353+ is created.
2354+
23192355 cpuset.cpus.partition
23202356 A read-write single value file which exists on non-root
23212357 cpuset-enabled cgroups. This flag is owned by the parent cgroup
@@ -2358,11 +2394,11 @@ Cpuset Interface Files · 36 unmodified lines
23582394 partition or scheduling domain. The set of exclusive CPUs is
23592395 determined by the value of its "cpuset.cpus.exclusive.effective".
23602396
2361− When set to "isolated", the CPUs in that partition will
2362− be in an isolated state without any load balancing from the
2363− scheduler. Tasks placed in such a partition with multiple
2364− CPUs should be carefully distributed and bound to each of the
2365− individual CPUs for optimal performance.
2397+ When set to "isolated", the CPUs in that partition will be in
2398+ an isolated state without any load balancing from the scheduler
2399+ and excluded from the unbound workqueues. Tasks placed in such
2400+ a partition with multiple CPUs should be carefully distributed
2401+ and bound to each of the individual CPUs for optimal performance.
23662402
23672403 A partition root ("root" or "isolated") can be in one of the
23682404 two possible states - valid or invalid. An invalid partition
Documentation/admin-guide/cifs/todo.rst+21−23
@@ -2,7 +2,8 @@ · 1 unmodified line
22 TODO
33 ====
44
5−Version 2.14 December 21, 2018
5+As of 6.7 kernel. See https://wiki.samba.org/index.php/LinuxCIFSKernel
6+for list of features added by release
67
78 A Partial List of Missing Features
89 ==================================
@@ -12,22 +13,22 @@ for visible, important contributions to this module. Here · 3 unmodified lines
1213 is a partial list of the known problems and missing features:
1314
1415 a) SMB3 (and SMB3.1.1) missing optional features:
16+ multichannel performance optimizations, algorithmic channel selection,
17+ directory leases optimizations,
18+ support for faster packet signing (GMAC),
19+ support for compression over the network,
20+ T10 copy offload ie "ODX" (copy chunk, and "Duplicate Extents" ioctl
21+ are currently the only two server side copy mechanisms supported)
1522
16− - multichannel (partially integrated), integration of multichannel with RDMA
17− - directory leases (improved metadata caching). Currently only implemented for root dir
18− - T10 copy offload ie "ODX" (copy chunk, and "Duplicate Extents" ioctl
19− currently the only two server side copy mechanisms supported)
23+b) Better optimized compounding and error handling for sparse file support,
24+ perhaps addition of new optional SMB3.1.1 fsctls to make collapse range
25+ and insert range more atomic
2026
21−b) improved sparse file support (fiemap and SEEK_HOLE are implemented
22− but additional features would be supportable by the protocol such
23− as FALLOC_FL_COLLAPSE_RANGE and FALLOC_FL_INSERT_RANGE)
24−
25−c) Directory entry caching relies on a 1 second timer, rather than
26− using Directory Leases, currently only the root file handle is cached longer
27− by leveraging Directory Leases
27+c) Support for SMB3.1.1 over QUIC (and perhaps other socket based protocols
28+ like SCTP)
2829
2930 d) quota support (needs minor kernel change since quota calls otherwise
30− won't make it to network filesystems or deviceless filesystems).
31+ won't make it to network filesystems or deviceless filesystems).
3132
3233 e) Additional use cases can be optimized to use "compounding" (e.g.
3334 open/query/close and open/setinfo/close) to reduce the number of
@@ -92,23 +93,20 @@ t) split cifs and smb3 support into separate modules so legacy (and less · 58 unmodified lines
9293
9394 v) Additional testing of POSIX Extensions for SMB3.1.1
9495
95−w) Add support for additional strong encryption types, and additional spnego
96− authentication mechanisms (see MS-SMB2). GCM-256 is now partially implemented.
96+w) Support for the Mac SMB3.1.1 extensions to improve interop with Apple servers
97+
98+x) Support for additional authentication options (e.g. IAKERB, peer-to-peer
99+ Kerberos, SCRAM and others supported by existing servers)
97100
98−x) Finish support for SMB3.1.1 compression
101+y) Improved tracing, more eBPF trace points, better scripts for performance
102+ analysis
99103
100104 Known Bugs
101105 ==========
102106
103107 See https://bugzilla.samba.org - search on product "CifsVFS" for
104108 current bug list. Also check http://bugzilla.kernel.org (Product = File System, Component = CIFS)
105−
106−1) existing symbolic links (Windows reparse points) are recognized but
107− can not be created remotely. They are implemented for Samba and those that
108− support the CIFS Unix extensions, although earlier versions of Samba
109− overly restrict the pathnames.
110−2) follow_link and readdir code does not follow dfs junctions
111− but recognizes them
109+and xfstest results e.g. https://wiki.samba.org/index.php/Xfstest-results-smb3
112110
113111 Misc testing to do
114112 ==================
Documentation/admin-guide/cifs/usage.rst+7−1
@@ -81,7 +81,7 @@ much older and less secure than the default dialect SMB3 which includes · 80 unmodified lines
8181 many advanced security features such as downgrade attack detection
8282 and encrypted shares and stronger signing and authentication algorithms.
8383 There are additional mount options that may be helpful for SMB3 to get
84−improved POSIX behavior (NB: can use vers=3.0 to force only SMB3, never 2.1):
84+improved POSIX behavior (NB: can use vers=3 to force SMB3 or later, never 2.1):
8585
8686 ``mfsymlinks`` and either ``cifsacl`` or ``modefromsid`` (usually with ``idsfromsid``)
8787
@@ -715,6 +715,7 @@ DebugData Displays information about active CIFS sessions and · 627 unmodified lines
715715 Stats Lists summary resource usage information as well as per
716716 share statistics.
717717 open_files List all the open file handles on all active SMB sessions.
718+mount_params List of all mount parameters available for the module
718719 ======================= =======================================================
719720
720721 Configuration pseudo-files:
@@ -864,6 +865,11 @@ i.e.:: · 143 unmodified lines
864865
865866 echo "value" > /sys/module/cifs/parameters/<param>
866867
868+More detailed descriptions of the available module parameters and their values
869+can be seen by doing:
870+
871+ modinfo cifs (or modinfo smb3)
872+
867873 ================= ==========================================================
868874 1. enable_oplocks Enable or disable oplocks. Oplocks are enabled by default.
869875 [Y/y/1]. To disable use any of [N/n/0].
Documentation/admin-guide/devices.txt+3−0
@@ -2704,6 +2704,9 @@ · 2703 unmodified lines
27042704 ...
27052705 185 = /dev/ttyNX15 Hilscher netX serial port 15
27062706 186 = /dev/ttyJ0 JTAG1 DCC protocol based serial port emulation
2707+
2708+ If maximum number of uartlite serial ports is more than 4, then the driver
2709+ uses dynamic allocation instead of static allocation for major number.
27072710 187 = /dev/ttyUL0 Xilinx uartlite - port 0
27082711 ...
27092712 190 = /dev/ttyUL3 Xilinx uartlite - port 3
Documentation/admin-guide/dynamic-debug-howto.rst+3−3
@@ -321,13 +321,13 @@ Examples · 320 unmodified lines
321321 :#> ddcmd 'format "nfsd: READ" +p'
322322
323323 // enable messages in files of which the paths include string "usb"
324− :#> ddcmd 'file *usb* +p' > /proc/dynamic_debug/control
324+ :#> ddcmd 'file *usb* +p'
325325
326326 // enable all messages
327− :#> ddcmd '+p' > /proc/dynamic_debug/control
327+ :#> ddcmd '+p'
328328
329329 // add module, function to all enabled messages
330− :#> ddcmd '+mf' > /proc/dynamic_debug/control
330+ :#> ddcmd '+mf'
331331
332332 // boot-args example, with newlines and comments for readability
333333 Kernel command line: ...
Documentation/admin-guide/features.rst+1−1
@@ -1,3 +1,3 @@
11 .. SPDX-License-Identifier: GPL-2.0
22
3−.. kernel-feat:: $srctree/Documentation/features
3+.. kernel-feat:: features
Documentation/admin-guide/hw_random.rst+2−3
@@ -14,10 +14,9 @@ into that core. · 13 unmodified lines
1414
1515 To make the most effective use of these mechanisms, you
1616 should download the support software as well. Download the
17−latest version of the "rng-tools" package from the
18−hw_random driver's official Web site:
17+latest version of the "rng-tools" package from:
1918
20− http://sourceforge.net/projects/gkernel/
19+ https://github.com/nhorman/rng-tools
2120
2221 Those tools use /dev/hwrng to fill the kernel entropy pool,
2322 which is used internally and exported by the /dev/urandom and
Documentation/admin-guide/index.rst+1−0
@@ -119,6 +119,7 @@ configure specific aspects of kernel behavior to your liking. · 118 unmodified lines
119119 parport
120120 perf-security
121121 pm/index
122+ pmf
122123 pnp
123124 rapidio
124125 ras
Documentation/admin-guide/kdump/vmcoreinfo.rst+4−4
@@ -172,7 +172,7 @@ variables. · 171 unmodified lines
172172 Offset of the free_list's member. This value is used to compute the number
173173 of free pages.
174174
175−Each zone has a free_area structure array called free_area[MAX_ORDER + 1].
175+Each zone has a free_area structure array called free_area[NR_PAGE_ORDERS].
176176 The free_list represents a linked list of free page blocks.
177177
178178 (list_head, next|prev)
@@ -189,11 +189,11 @@ Offsets of the vmap_area's members. They carry vmalloc-specific · 10 unmodified lines
189189 information. Makedumpfile gets the start address of the vmalloc region
190190 from this.
191191
192−(zone.free_area, MAX_ORDER + 1)
193−-------------------------------
192+(zone.free_area, NR_PAGE_ORDERS)
193+--------------------------------
194194
195195 Free areas descriptor. User-space tools use this value to iterate the
196−free_area ranges. MAX_ORDER is used by the zone buddy allocator.
196+free_area ranges. NR_PAGE_ORDERS is used by the zone buddy allocator.
197197
198198 prb
199199 ---
Documentation/admin-guide/kernel-parameters.txt+58−28
@@ -1,3 +1,14 @@
1+ accept_memory= [MM]
2+ Format: { eager | lazy }
3+ default: lazy
4+ By default, unaccepted memory is accepted lazily to
5+ avoid prolonged boot times. The lazy option will add
6+ some runtime overhead until all memory is eventually
7+ accepted. In most cases the overhead is negligible.
8+ For some workloads or for debugging purposes
9+ accept_memory=eager can be used to accept all memory
10+ at once during boot.
11+
112 acpi= [HW,ACPI,X86,ARM64,RISCV64]
213 Advanced Configuration and Power Interface
314 Format: { force | on | off | strict | noirq | rsdt |
@@ -877,9 +888,9 @@ · 873 unmodified lines
877888 memory region [offset, offset + size] for that kernel
878889 image. If '@offset' is omitted, then a suitable offset
879890 is selected automatically.
880− [KNL, X86-64, ARM64, RISCV] Select a region under 4G first, and
881− fall back to reserve region above 4G when '@offset'
882− hasn't been specified.
891+ [KNL, X86-64, ARM64, RISCV, LoongArch] Select a region
892+ under 4G first, and fall back to reserve region above
893+ 4G when '@offset' hasn't been specified.
883894 See Documentation/admin-guide/kdump/kdump.rst for further details.
884895
885896 crashkernel=range1:size1[,range2:size2,...][@offset]
@@ -890,25 +901,27 @@ · 4 unmodified lines
890901 Documentation/admin-guide/kdump/kdump.rst for an example.
891902
892903 crashkernel=size[KMG],high
893− [KNL, X86-64, ARM64, RISCV] range could be above 4G.
904+ [KNL, X86-64, ARM64, RISCV, LoongArch] range could be
905+ above 4G.
894906 Allow kernel to allocate physical memory region from top,
895907 so could be above 4G if system have more than 4G ram
896908 installed. Otherwise memory region will be allocated
897909 below 4G, if available.
898910 It will be ignored if crashkernel=X is specified.
899911 crashkernel=size[KMG],low
900− [KNL, X86-64, ARM64, RISCV] range under 4G. When crashkernel=X,high
901− is passed, kernel could allocate physical memory region
902− above 4G, that cause second kernel crash on system
903− that require some amount of low memory, e.g. swiotlb
904− requires at least 64M+32K low memory, also enough extra
905− low memory is needed to make sure DMA buffers for 32-bit
906− devices won't run out. Kernel would try to allocate
912+ [KNL, X86-64, ARM64, RISCV, LoongArch] range under 4G.
913+ When crashkernel=X,high is passed, kernel could allocate
914+ physical memory region above 4G, that cause second kernel
915+ crash on system that require some amount of low memory,
916+ e.g. swiotlb requires at least 64M+32K low memory, also
917+ enough extra low memory is needed to make sure DMA buffers
918+ for 32-bit devices won't run out. Kernel would try to allocate
907919 default size of memory below 4G automatically. The default
908920 size is platform dependent.
909921 --> x86: max(swiotlb_size_or_default() + 8MiB, 256MiB)
910922 --> arm64: 128MiB
911923 --> riscv: 128MiB
924+ --> loongarch: 128MiB
912925 This one lets the user specify own low range under 4G
913926 for second kernel instead.
914927 0: to disable low allocation.
@@ -970,17 +983,17 @@ · 55 unmodified lines
970983 buddy allocator. Bigger value increase the probability
971984 of catching random memory corruption, but reduce the
972985 amount of memory for normal system use. The maximum
973− possible value is MAX_ORDER/2. Setting this parameter
974− to 1 or 2 should be enough to identify most random
975− memory corruption problems caused by bugs in kernel or
976− driver code when a CPU writes to (or reads from) a
977− random memory location. Note that there exists a class
978− of memory corruptions problems caused by buggy H/W or
979− F/W or by drivers badly programming DMA (basically when
980− memory is written at bus level and the CPU MMU is
981− bypassed) which are not detectable by
982− CONFIG_DEBUG_PAGEALLOC, hence this option will not help
983− tracking down these problems.
986+ possible value is MAX_PAGE_ORDER/2. Setting this
987+ parameter to 1 or 2 should be enough to identify most
988+ random memory corruption problems caused by bugs in
989+ kernel or driver code when a CPU writes to (or reads
990+ from) a random memory location. Note that there exists
991+ a class of memory corruptions problems caused by buggy
992+ H/W or F/W or by drivers badly programming DMA
993+ (basically when memory is written at bus level and the
994+ CPU MMU is bypassed) which are not detectable by
995+ CONFIG_DEBUG_PAGEALLOC, hence this option will not
996+ help tracking down these problems.
984997
985998 debug_pagealloc=
986999 [KNL] When CONFIG_DEBUG_PAGEALLOC is set, this parameter
@@ -2438,7 +2451,7 @@ · 1451 unmodified lines
24382451 between unregistering the boot console and initializing
24392452 the real console.
24402453
2441− keepinitrd [HW,ARM]
2454+ keepinitrd [HW,ARM] See retain_initrd.
24422455
24432456 kernelcore= [KNL,X86,IA-64,PPC]
24442457 Format: nn[KMGTPE] | nn% | "mirror"
@@ -3985,9 +3998,9 @@ · 1540 unmodified lines
39853998 vulnerability. System may allow data leaks with this
39863999 option.
39874000
3988− no-steal-acc [X86,PV_OPS,ARM64,PPC/PSERIES] Disable paravirtualized
3989− steal time accounting. steal time is computed, but
3990− won't influence scheduler behaviour
4001+ no-steal-acc [X86,PV_OPS,ARM64,PPC/PSERIES,RISCV] Disable
4002+ paravirtualized steal time accounting. steal time is
4003+ computed, but won't influence scheduler behaviour
39914004
39924005 nosync [HW,M68K] Disables sync negotiation for all devices.
39934006
@@ -4136,7 +4149,7 @@ · 142 unmodified lines
41364149 [KNL] Minimal page reporting order
41374150 Format: <integer>
41384151 Adjust the minimal page reporting order. The page
4139− reporting is disabled when it exceeds MAX_ORDER.
4152+ reporting is disabled when it exceeds MAX_PAGE_ORDER.
41404153
41414154 panic= [KNL] Kernel behaviour on panic: delay <timeout>
41424155 timeout > 0: seconds before rebooting
@@ -5302,6 +5315,12 @@ · 1159 unmodified lines
53025315 Dump ftrace buffer after reporting RCU CPU
53035316 stall warning.
53045317
5318+ rcupdate.rcu_cpu_stall_notifiers= [KNL]
5319+ Provide RCU CPU stall notifiers, but see the
5320+ warnings in the RCU_CPU_STALL_NOTIFIER Kconfig
5321+ option's help text. TL;DR: You almost certainly
5322+ do not want rcupdate.rcu_cpu_stall_notifiers.
5323+
53055324 rcupdate.rcu_cpu_stall_suppress= [KNL]
53065325 Suppress RCU CPU stall warning messages.
53075326
@@ -5544,6 +5563,13 @@ · 236 unmodified lines
55445563 print every Nth verbose statement, where N is the value
55455564 specified.
55465565
5566+ regulator_ignore_unused
5567+ [REGULATOR]
5568+ Prevents regulator framework from disabling regulators
5569+ that are unused, due no driver claiming them. This may
5570+ be useful for debug and development, but should not be
5571+ needed on a platform with proper driver support.
5572+
55475573 relax_domain_level=
55485574 [KNL, SMP] Set scheduler's default relax_domain_level.
55495575 See Documentation/admin-guide/cgroup-v1/cpusets.rst.
@@ -5580,7 +5606,8 @@ · 30 unmodified lines
55805606 Useful for devices that are detected asynchronously
55815607 (e.g. USB and MMC devices).
55825608
5583− retain_initrd [RAM] Keep initrd memory after extraction
5609+ retain_initrd [RAM] Keep initrd memory after extraction. After boot, it will
5610+ be accessible via /sys/firmware/initrd.
55845611
55855612 retbleed= [X86] Control mitigation of RETBleed (Arbitrary
55865613 Speculative Code Execution with Return Instructions)
@@ -6908,6 +6935,9 @@ · 1321 unmodified lines
69086935 pause after every control message);
69096936 o = USB_QUIRK_HUB_SLOW_RESET (Hub needs extra
69106937 delay after resetting its port);
6938+ p = USB_QUIRK_SHORT_SET_ADDRESS_REQ_TIMEOUT
6939+ (Reduce timeout of the SET_ADDRESS
6940+ request from 5000 ms to 500 ms);
69116941 Example: quirks=0781:5580:bk,0a5c:5834:gij
69126942
69136943 usbhid.mousepoll=
Documentation/admin-guide/media/index.rst+1−9
@@ -20,16 +20,8 @@ Documentation/driver-api/media/index.rst · 19 unmodified lines
2020 - for driver development information and Kernel APIs used by
2121 media devices;
2222
23−The media subsystem
24−===================
25−
26−.. only:: html
27−
28− .. class:: toc-title
29−
30− Table of Contents
31−
3223 .. toctree::
24+ :caption: Table of Contents
3325 :maxdepth: 2
3426 :numbered:
3527
Documentation/admin-guide/media/starfive_camss.rst+72−0
@@ -0,0 +1,72 @@
1+.. SPDX-License-Identifier: GPL-2.0
2+
3+.. include:: <isonum.txt>
4+
5+================================
6+Starfive Camera Subsystem driver
7+================================
8+
9+Introduction
10+------------
11+
12+This file documents the driver for the Starfive Camera Subsystem found on
13+Starfive JH7110 SoC. The driver is located under drivers/staging/media/starfive/
14+camss.
15+
16+The driver implements V4L2, Media controller and v4l2_subdev interfaces. Camera
17+sensor using V4L2 subdev interface in the kernel is supported.
18+
19+The driver has been successfully used on the Gstreamer 1.18.5 with v4l2src
20+plugin.
21+
22+
23+Starfive Camera Subsystem hardware
24+----------------------------------
25+
26+The Starfive Camera Subsystem hardware consists of::
27+
28+ |\ +---------------+ +-----------+
29+ +----------+ | \ | | | |
30+ | | | | | | | |
31+ | MIPI |----->| |----->| ISP |----->| |
32+ | | | | | | | |
33+ +----------+ | | | | | Memory |
34+ |MUX| +---------------+ | Interface |
35+ +----------+ | | | |
36+ | | | |---------------------------->| |
37+ | Parallel |----->| | | |
38+ | | | | | |
39+ +----------+ | / | |
40+ |/ +-----------+
41+
42+- MIPI: The MIPI interface, receiving data from a MIPI CSI-2 camera sensor.
43+
44+- Parallel: The parallel interface, receiving data from a parallel sensor.
45+
46+- ISP: The ISP, processing raw Bayer data from an image sensor and producing
47+ YUV frames.
48+
49+
50+Topology
51+--------
52+
53+The media controller pipeline graph is as follows:
54+
55+.. _starfive_camss_graph:
56+
57+.. kernel-figure:: starfive_camss_graph.dot
58+ :alt: starfive_camss_graph.dot
59+ :align: center
60+
61+The driver has 2 video devices:
62+
63+- capture_raw: The capture device, capturing image data directly from a sensor.
64+- capture_yuv: The capture device, capturing YUV frame data processed by the
65+ ISP module
66+
67+The driver has 3 subdevices:
68+
69+- stf_isp: is responsible for all the isp operations, outputs YUV frames.
70+- cdns_csi2rx: a CSI-2 bridge supporting up to 4 CSI lanes in input, and 4
71+ different pixel streams in output.
72+- imx219: an image sensor, image data is sent through MIPI CSI-2.
Documentation/admin-guide/media/starfive_camss_graph.dot+12−0
@@ -0,0 +1,12 @@
1+digraph board {
2+ rankdir=TB
3+ n00000001 [label="{{<port0> 0} | stf_isp\n/dev/v4l-subdev0 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
4+ n00000001:port1 -> n00000008 [style=dashed]
5+ n00000004 [label="capture_raw\n/dev/video0", shape=box, style=filled, fillcolor=yellow]
6+ n00000008 [label="capture_yuv\n/dev/video1", shape=box, style=filled, fillcolor=yellow]
7+ n0000000e [label="{{<port0> 0} | cdns_csi2rx.19800000.csi-bridge\n | {<port1> 1 | <port2> 2 | <port3> 3 | <port4> 4}}", shape=Mrecord, style=filled, fillcolor=green]
8+ n0000000e:port1 -> n00000001:port0 [style=dashed]
9+ n0000000e:port1 -> n00000004 [style=dashed]
10+ n00000018 [label="{{} | imx219 6-0010\n/dev/v4l-subdev1 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
11+ n00000018:port0 -> n0000000e:port0 [style=bold]
12+}
Documentation/admin-guide/media/v4l-drivers.rst+1−0
@@ -28,6 +28,7 @@ Video4Linux (V4L) driver-specific documentation · 27 unmodified lines
2828 si470x
2929 si4713
3030 si476x
31+ starfive_camss
3132 vimc
3233 visl
3334 vivid
Documentation/admin-guide/media/visl.rst+2−0
@@ -71,6 +71,7 @@ The following codecs are supported: · 70 unmodified lines
7171 - VP9
7272 - H.264
7373 - HEVC
74+- AV1
7475
7576 visl trace events
7677 -----------------
@@ -79,6 +80,7 @@ The trace events are defined on a per-codec basis, e.g.: · 2 unmodified lines
7980 .. code-block:: bash
8081
8182 $ ls /sys/kernel/tracing/events/ | grep visl
83+ visl_av1_controls
8284 visl_fwht_controls
8385 visl_h264_controls
8486 visl_hevc_controls
Documentation/admin-guide/mm/damon/usage.rst+104−43
@@ -59,41 +59,47 @@ Files Hierarchy · 58 unmodified lines
5959 The files hierarchy of DAMON sysfs interface is shown below. In the below
6060 figure, parents-children relations are represented with indentations, each
6161 directory is having ``/`` suffix, and files in each directory are separated by
62−comma (","). ::
63−
64− /sys/kernel/mm/damon/admin
65− │ kdamonds/nr_kdamonds
66− │ │ 0/state,pid
67− │ │ │ contexts/nr_contexts
68− │ │ │ │ 0/avail_operations,operations
69− │ │ │ │ │ monitoring_attrs/
62+comma (",").
63+
64+.. parsed-literal::
65+
66+ :ref:`/sys/kernel/mm/damon <sysfs_root>`/admin
67+ │ :ref:`kdamonds <sysfs_kdamonds>`/nr_kdamonds
68+ │ │ :ref:`0 <sysfs_kdamond>`/state,pid
69+ │ │ │ :ref:`contexts <sysfs_contexts>`/nr_contexts
70+ │ │ │ │ :ref:`0 <sysfs_context>`/avail_operations,operations
71+ │ │ │ │ │ :ref:`monitoring_attrs <sysfs_monitoring_attrs>`/
7072 │ │ │ │ │ │ intervals/sample_us,aggr_us,update_us
7173 │ │ │ │ │ │ nr_regions/min,max
72− │ │ │ │ │ targets/nr_targets
73− │ │ │ │ │ │ 0/pid_target
74− │ │ │ │ │ │ │ regions/nr_regions
75− │ │ │ │ │ │ │ │ 0/start,end
74+ │ │ │ │ │ :ref:`targets <sysfs_targets>`/nr_targets
75+ │ │ │ │ │ │ :ref:`0 <sysfs_target>`/pid_target
76+ │ │ │ │ │ │ │ :ref:`regions <sysfs_regions>`/nr_regions
77+ │ │ │ │ │ │ │ │ :ref:`0 <sysfs_region>`/start,end
7678 │ │ │ │ │ │ │ │ ...
7779 │ │ │ │ │ │ ...
78− │ │ │ │ │ schemes/nr_schemes
79− │ │ │ │ │ │ 0/action,apply_interval_us
80− │ │ │ │ │ │ │ access_pattern/
80+ │ │ │ │ │ :ref:`schemes <sysfs_schemes>`/nr_schemes
81+ │ │ │ │ │ │ :ref:`0 <sysfs_scheme>`/action,apply_interval_us
82+ │ │ │ │ │ │ │ :ref:`access_pattern <sysfs_access_pattern>`/
8183 │ │ │ │ │ │ │ │ sz/min,max
8284 │ │ │ │ │ │ │ │ nr_accesses/min,max
8385 │ │ │ │ │ │ │ │ age/min,max
84− │ │ │ │ │ │ │ quotas/ms,bytes,reset_interval_ms
86+ │ │ │ │ │ │ │ :ref:`quotas <sysfs_quotas>`/ms,bytes,reset_interval_ms
8587 │ │ │ │ │ │ │ │ weights/sz_permil,nr_accesses_permil,age_permil
86− │ │ │ │ │ │ │ watermarks/metric,interval_us,high,mid,low
87− │ │ │ │ │ │ │ filters/nr_filters
88+ │ │ │ │ │ │ │ │ :ref:`goals <sysfs_schemes_quota_goals>`/nr_goals
89+ │ │ │ │ │ │ │ │ │ 0/target_value,current_value
90+ │ │ │ │ │ │ │ :ref:`watermarks <sysfs_watermarks>`/metric,interval_us,high,mid,low
91+ │ │ │ │ │ │ │ :ref:`filters <sysfs_filters>`/nr_filters
8892 │ │ │ │ │ │ │ │ 0/type,matching,memcg_id
89− │ │ │ │ │ │ │ stats/nr_tried,sz_tried,nr_applied,sz_applied,qt_exceeds
90− │ │ │ │ │ │ │ tried_regions/total_bytes
93+ │ │ │ │ │ │ │ :ref:`stats <sysfs_schemes_stats>`/nr_tried,sz_tried,nr_applied,sz_applied,qt_exceeds
94+ │ │ │ │ │ │ │ :ref:`tried_regions <sysfs_schemes_tried_regions>`/total_bytes
9195 │ │ │ │ │ │ │ │ 0/start,end,nr_accesses,age
9296 │ │ │ │ │ │ │ │ ...
9397 │ │ │ │ │ │ ...
9498 │ │ │ │ ...
9599 │ │ ...
96100
101+.. _sysfs_root:
102+
97103 Root
98104 ----
99105
@@ -102,6 +108,8 @@ has one directory named ``admin``. The directory contains the files for · 2 unmodified lines
102108 privileged user space programs' control of DAMON. User space tools or daemons
103109 having the root permission could use this directory.
104110
111+.. _sysfs_kdamonds:
112+
105113 kdamonds/
106114 ---------
107115
@@ -113,6 +121,8 @@ details) exists. In the beginning, this directory has only one file, · 5 unmodified lines
113121 child directories named ``0`` to ``N-1``. Each directory represents each
114122 kdamond.
115123
124+.. _sysfs_kdamond:
125+
116126 kdamonds/<N>/
117127 -------------
118128
@@ -120,29 +130,37 @@ In each kdamond directory, two files (``state`` and ``pid``) and one directory · 1 unmodified line
120130 (``contexts``) exist.
121131
122132 Reading ``state`` returns ``on`` if the kdamond is currently running, or
123−``off`` if it is not running. Writing ``on`` or ``off`` makes the kdamond be
124−in the state. Writing ``commit`` to the ``state`` file makes kdamond reads the
125−user inputs in the sysfs files except ``state`` file again. Writing
126−``update_schemes_stats`` to ``state`` file updates the contents of stats files
127−for each DAMON-based operation scheme of the kdamond. For details of the
128−stats, please refer to :ref:`stats section <sysfs_schemes_stats>`.
129−
130−Writing ``update_schemes_tried_regions`` to ``state`` file updates the
131−DAMON-based operation scheme action tried regions directory for each
132−DAMON-based operation scheme of the kdamond. Writing
133−``update_schemes_tried_bytes`` to ``state`` file updates only
134−``.../tried_regions/total_bytes`` files. Writing
135−``clear_schemes_tried_regions`` to ``state`` file clears the DAMON-based
136−operating scheme action tried regions directory for each DAMON-based operation
137−scheme of the kdamond. For details of the DAMON-based operation scheme action
138−tried regions directory, please refer to :ref:`tried_regions section
139−<sysfs_schemes_tried_regions>`.
133+``off`` if it is not running.
134+
135+Users can write below commands for the kdamond to the ``state`` file.
136+
137+- ``on``: Start running.
138+- ``off``: Stop running.
139+- ``commit``: Read the user inputs in the sysfs files except ``state`` file
140+ again.
141+- ``commit_schemes_quota_goals``: Read the DAMON-based operation schemes'
142+ :ref:`quota goals <sysfs_schemes_quota_goals>`.
143+- ``update_schemes_stats``: Update the contents of stats files for each
144+ DAMON-based operation scheme of the kdamond. For details of the stats,
145+ please refer to :ref:`stats section <sysfs_schemes_stats>`.
146+- ``update_schemes_tried_regions``: Update the DAMON-based operation scheme
147+ action tried regions directory for each DAMON-based operation scheme of the
148+ kdamond. For details of the DAMON-based operation scheme action tried
149+ regions directory, please refer to
150+ :ref:`tried_regions section <sysfs_schemes_tried_regions>`.
151+- ``update_schemes_tried_bytes``: Update only ``.../tried_regions/total_bytes``
152+ files.
153+- ``clear_schemes_tried_regions``: Clear the DAMON-based operating scheme
154+ action tried regions directory for each DAMON-based operation scheme of the
155+ kdamond.
140156
141157 If the state is ``on``, reading ``pid`` shows the pid of the kdamond thread.
142158
143159 ``contexts`` directory contains files for controlling the monitoring contexts
144160 that this kdamond will execute.
145161
162+.. _sysfs_contexts:
163+
146164 kdamonds/<N>/contexts/
147165 ----------------------
148166
@@ -153,7 +171,7 @@ number (``N``) to the file creates the number of child directories named as · 4 unmodified lines
153171 details). At the moment, only one context per kdamond is supported, so only
154172 ``0`` or ``1`` can be written to the file.
155173
156−.. _sysfs_contexts:
174+.. _sysfs_context:
157175
158176 contexts/<N>/
159177 -------------
@@ -203,6 +221,8 @@ writing to and rading from the files. · 43 unmodified lines
203221 For more details about the intervals and monitoring regions range, please refer
204222 to the Design document (:doc:`/mm/damon/design`).
205223
224+.. _sysfs_targets:
225+
206226 contexts/<N>/targets/
207227 ---------------------
208228
@@ -210,6 +230,8 @@ In the beginning, this directory has only one file, ``nr_targets``. Writing a · 1 unmodified line
210230 number (``N``) to the file creates the number of child directories named ``0``
211231 to ``N-1``. Each directory represents each monitoring target.
212232
233+.. _sysfs_target:
234+
213235 targets/<N>/
214236 ------------
215237
@@ -244,6 +266,8 @@ In the beginning, this directory has only one file, ``nr_regions``. Writing a · 28 unmodified lines
244266 number (``N``) to the file creates the number of child directories named ``0``
245267 to ``N-1``. Each directory represents each initial monitoring target region.
246268
269+.. _sysfs_region:
270+
247271 regions/<N>/
248272 ------------
249273
@@ -254,6 +278,8 @@ region by writing to and reading from the files, respectively. · 4 unmodified lines
254278 Each region should not overlap with others. ``end`` of directory ``N`` should
255279 be equal or smaller than ``start`` of directory ``N+1``.
256280
281+.. _sysfs_schemes:
282+
257283 contexts/<N>/schemes/
258284 ---------------------
259285
@@ -265,6 +291,8 @@ In the beginning, this directory has only one file, ``nr_schemes``. Writing a · 5 unmodified lines
265291 number (``N``) to the file creates the number of child directories named ``0``
266292 to ``N-1``. Each directory represents each DAMON-based operation scheme.
267293
294+.. _sysfs_scheme:
295+
268296 schemes/<N>/
269297 ------------
270298
@@ -277,7 +305,7 @@ The ``action`` file is for setting and getting the scheme's :ref:`action · 6 unmodified lines
277305 from the file and their meaning are as below.
278306
279307 Note that support of each action depends on the running DAMON operations set
280−:ref:`implementation <sysfs_contexts>`.
308+:ref:`implementation <sysfs_context>`.
281309
282310 - ``willneed``: Call ``madvise()`` for the region with ``MADV_WILLNEED``.
283311 Supported by ``vaddr`` and ``fvaddr`` operations set.
@@ -299,6 +327,8 @@ Note that support of each action depends on the running DAMON operations set · 15 unmodified lines
299327 The ``apply_interval_us`` file is for setting and getting the scheme's
300328 :ref:`apply_interval <damon_design_damos>` in microseconds.
301329
330+.. _sysfs_access_pattern:
331+
302332 schemes/<N>/access_pattern/
303333 ---------------------------
304334
@@ -312,6 +342,8 @@ to and reading from the ``min`` and ``max`` files under ``sz``, · 7 unmodified lines
312342 ``nr_accesses``, and ``age`` directories, respectively. Note that the ``min``
313343 and the ``max`` form a closed interval.
314344
345+.. _sysfs_quotas:
346+
315347 schemes/<N>/quotas/
316348 -------------------
317349
@@ -319,8 +351,7 @@ The directory for the :ref:`quotas <damon_design_damos_quotas>` of the given · 1 unmodified line
319351 DAMON-based operation scheme.
320352
321353 Under ``quotas`` directory, three files (``ms``, ``bytes``,
322−``reset_interval_ms``) and one directory (``weights``) having three files
323−(``sz_permil``, ``nr_accesses_permil``, and ``age_permil``) in it exist.
354+``reset_interval_ms``) and two directores (``weights`` and ``goals``) exist.
324355
325356 You can set the ``time quota`` in milliseconds, ``size quota`` in bytes, and
326357 ``reset interval`` in milliseconds by writing the values to the three files,
@@ -330,11 +361,37 @@ apply the action to only up to ``bytes`` bytes of memory regions within the · 3 unmodified lines
330361 ``reset_interval_ms``. Setting both ``ms`` and ``bytes`` zero disables the
331362 quota limits.
332363
333−You can also set the :ref:`prioritization weights
364+Under ``weights`` directory, three files (``sz_permil``,
365+``nr_accesses_permil``, and ``age_permil``) exist.
366+You can set the :ref:`prioritization weights
334367 <damon_design_damos_quotas_prioritization>` for size, access frequency, and age
335368 in per-thousand unit by writing the values to the three files under the
336369 ``weights`` directory.
337370
371+.. _sysfs_schemes_quota_goals:
372+
373+schemes/<N>/quotas/goals/
374+-------------------------
375+
376+The directory for the :ref:`automatic quota tuning goals
377+<damon_design_damos_quotas_auto_tuning>` of the given DAMON-based operation
378+scheme.
379+
380+In the beginning, this directory has only one file, ``nr_goals``. Writing a
381+number (``N``) to the file creates the number of child directories named ``0``
382+to ``N-1``. Each directory represents each goal and current achievement.
383+Among the multiple feedback, the best one is used.
384+
385+Each goal directory contains two files, namely ``target_value`` and
386+``current_value``. Users can set and get any number to those files to set the
387+feedback. User space main workload's latency or throughput, system metrics
388+like free memory ratio or memory pressure stall time (PSI) could be example
389+metrics for the values. Note that users should write
390+``commit_schemes_quota_goals`` to the ``state`` file of the :ref:`kdamond
391+directory <sysfs_kdamond>` to pass the feedback to DAMON.
392+
393+.. _sysfs_watermarks:
394+
338395 schemes/<N>/watermarks/
339396 -----------------------
340397
@@ -354,6 +411,8 @@ as below. · 13 unmodified lines
354411
355412 The ``interval`` should written in microseconds unit.
356413
414+.. _sysfs_filters:
415+
357416 schemes/<N>/filters/
358417 --------------------
359418
@@ -394,7 +453,7 @@ pages of all memory cgroups except ``/having_care_already``.:: · 34 unmodified lines
394453 echo N > 1/matching
395454
396455 Note that ``anon`` and ``memcg`` filters are currently supported only when
397−``paddr`` :ref:`implementation <sysfs_contexts>` is being used.
456+``paddr`` :ref:`implementation <sysfs_context>` is being used.
398457
399458 Also, memory regions that are filtered out by ``addr`` or ``target`` filters
400459 are not counted as the scheme has tried to those, while regions that filtered
@@ -449,6 +508,8 @@ and query-like efficient data access monitoring results retrievals. For the · 48 unmodified lines
449508 latter use case, in particular, users can set the ``action`` as ``stat`` and
450509 set the ``access pattern`` as their interested pattern that they want to query.
451510
511+.. _sysfs_schemes_tried_region:
512+
452513 tried_regions/<N>/
453514 ------------------
454515
Documentation/admin-guide/mm/ksm.rst+55−0
@@ -80,6 +80,9 @@ pages_to_scan · 79 unmodified lines
8080 how many pages to scan before ksmd goes to sleep
8181 e.g. ``echo 100 > /sys/kernel/mm/ksm/pages_to_scan``.
8282
83+ The pages_to_scan value cannot be changed if ``advisor_mode`` has
84+ been set to scan-time.
85+
8386 Default: 100 (chosen for demonstration purposes)
8487
8588 sleep_millisecs
@@ -164,6 +167,29 @@ smart_scan · 78 unmodified lines
164167 optimization is enabled. The ``pages_skipped`` metric shows how
165168 effective the setting is.
166169
170+advisor_mode
171+ The ``advisor_mode`` selects the current advisor. Two modes are
172+ supported: none and scan-time. The default is none. By setting
173+ ``advisor_mode`` to scan-time, the scan time advisor is enabled.
174+ The section about ``advisor`` explains in detail how the scan time
175+ advisor works.
176+
177+adivsor_max_cpu
178+ specifies the upper limit of the cpu percent usage of the ksmd
179+ background thread. The default is 70.
180+
181+advisor_target_scan_time
182+ specifies the target scan time in seconds to scan all the candidate
183+ pages. The default value is 200 seconds.
184+
185+advisor_min_pages_to_scan
186+ specifies the lower limit of the ``pages_to_scan`` parameter of the
187+ scan time advisor. The default is 500.
188+
189+adivsor_max_pages_to_scan
190+ specifies the upper limit of the ``pages_to_scan`` parameter of the
191+ scan time advisor. The default is 30000.
192+
167193 The effectiveness of KSM and MADV_MERGEABLE is shown in ``/sys/kernel/mm/ksm/``:
168194
169195 general_profit
@@ -263,6 +289,35 @@ ksm_swpin_copy · 93 unmodified lines
263289 note that KSM page might be copied when swapping in because do_swap_page()
264290 cannot do all the locking needed to reconstitute a cross-anon_vma KSM page.
265291
292+Advisor
293+=======
294+
295+The number of candidate pages for KSM is dynamic. It can be often observed
296+that during the startup of an application more candidate pages need to be
297+processed. Without an advisor the ``pages_to_scan`` parameter needs to be
298+sized for the maximum number of candidate pages. The scan time advisor can
299+changes the ``pages_to_scan`` parameter based on demand.
300+
301+The advisor can be enabled, so KSM can automatically adapt to changes in the
302+number of candidate pages to scan. Two advisors are implemented: none and
303+scan-time. With none, no advisor is enabled. The default is none.
304+
305+The scan time advisor changes the ``pages_to_scan`` parameter based on the
306+observed scan times. The possible values for the ``pages_to_scan`` parameter is
307+limited by the ``advisor_max_cpu`` parameter. In addition there is also the
308+``advisor_target_scan_time`` parameter. This parameter sets the target time to
309+scan all the KSM candidate pages. The parameter ``advisor_target_scan_time``
310+decides how aggressive the scan time advisor scans candidate pages. Lower
311+values make the scan time advisor to scan more aggresively. This is the most
312+important parameter for the configuration of the scan time advisor.
313+
314+The initial value and the maximum value can be changed with
315+``advisor_min_pages_to_scan`` and ``advisor_max_pages_to_scan``. The default
316+values are sufficient for most workloads and use cases.
317+
318+The ``pages_to_scan`` parameter is re-calculated after a scan has been completed.
319+
320+
266321 --
267322 Izik Eidus,
268323 Hugh Dickins, 17 Nov 2009
Documentation/admin-guide/mm/pagemap.rst+1−0
@@ -253,6 +253,7 @@ Following flags about pages are currently supported: · 252 unmodified lines
253253 - ``PAGE_IS_SWAPPED`` - Page is in swapped
254254 - ``PAGE_IS_PFNZERO`` - Page has zero PFN
255255 - ``PAGE_IS_HUGE`` - Page is THP or Hugetlb backed
256+- ``PAGE_IS_SOFT_DIRTY`` - Page is soft-dirty
256257
257258 The ``struct pm_scan_arg`` is used as the argument of the IOCTL.
258259
Documentation/admin-guide/mm/transhuge.rst+78−19
@@ -45,10 +45,25 @@ components: · 44 unmodified lines
4545 the two is using hugepages just because of the fact the TLB miss is
4646 going to run faster.
4747
48+Modern kernels support "multi-size THP" (mTHP), which introduces the
49+ability to allocate memory in blocks that are bigger than a base page
50+but smaller than traditional PMD-size (as described above), in
51+increments of a power-of-2 number of pages. mTHP can back anonymous
52+memory (for example 16K, 32K, 64K, etc). These THPs continue to be
53+PTE-mapped, but in many cases can still provide similar benefits to
54+those outlined above: Page faults are significantly reduced (by a
55+factor of e.g. 4, 8, 16, etc), but latency spikes are much less
56+prominent because the size of each page isn't as huge as the PMD-sized
57+variant and there is less memory to clear in each page fault. Some
58+architectures also employ TLB compression mechanisms to squeeze more
59+entries in when a set of PTEs are virtually and physically contiguous
60+and approporiately aligned. In this case, TLB misses will occur less
61+often.
62+
4863 THP can be enabled system wide or restricted to certain tasks or even
4964 memory ranges inside task's address space. Unless THP is completely
5065 disabled, there is ``khugepaged`` daemon that scans memory and
51−collapses sequences of basic pages into huge pages.
66+collapses sequences of basic pages into PMD-sized huge pages.
5267
5368 The THP behaviour is controlled via :ref:`sysfs <thp_sysfs>`
5469 interface and using madvise(2) and prctl(2) system calls.
@@ -95,12 +110,40 @@ Global THP controls · 40 unmodified lines
95110 Transparent Hugepage Support for anonymous memory can be entirely disabled
96111 (mostly for debugging purposes) or only enabled inside MADV_HUGEPAGE
97112 regions (to avoid the risk of consuming more memory resources) or enabled
98−system wide. This can be achieved with one of::
113+system wide. This can be achieved per-supported-THP-size with one of::
114+
115+ echo always >/sys/kernel/mm/transparent_hugepage/hugepages-<size>kB/enabled
116+ echo madvise >/sys/kernel/mm/transparent_hugepage/hugepages-<size>kB/enabled
117+ echo never >/sys/kernel/mm/transparent_hugepage/hugepages-<size>kB/enabled
118+
119+where <size> is the hugepage size being addressed, the available sizes
120+for which vary by system.
121+
122+For example::
123+
124+ echo always >/sys/kernel/mm/transparent_hugepage/hugepages-2048kB/enabled
125+
126+Alternatively it is possible to specify that a given hugepage size
127+will inherit the top-level "enabled" value::
128+
129+ echo inherit >/sys/kernel/mm/transparent_hugepage/hugepages-<size>kB/enabled
130+
131+For example::
132+
133+ echo inherit >/sys/kernel/mm/transparent_hugepage/hugepages-2048kB/enabled
134+
135+The top-level setting (for use with "inherit") can be set by issuing
136+one of the following commands::
99137
100138 echo always >/sys/kernel/mm/transparent_hugepage/enabled
101139 echo madvise >/sys/kernel/mm/transparent_hugepage/enabled
102140 echo never >/sys/kernel/mm/transparent_hugepage/enabled
103141
142+By default, PMD-sized hugepages have enabled="inherit" and all other
143+hugepage sizes have enabled="never". If enabling multiple hugepage
144+sizes, the kernel will select the most appropriate enabled size for a
145+given allocation.
146+
104147 It's also possible to limit defrag efforts in the VM to generate
105148 anonymous hugepages in case they're not immediately free to madvise
106149 regions or to never try to defrag memory and simply fallback to regular
@@ -146,25 +189,34 @@ madvise · 39 unmodified lines
146189 never
147190 should be self-explanatory.
148191
149−By default kernel tries to use huge zero page on read page fault to
150−anonymous mapping. It's possible to disable huge zero page by writing 0
151−or enable it back by writing 1::
192+By default kernel tries to use huge, PMD-mappable zero page on read
193+page fault to anonymous mapping. It's possible to disable huge zero
194+page by writing 0 or enable it back by writing 1::
152195
153196 echo 0 >/sys/kernel/mm/transparent_hugepage/use_zero_page
154197 echo 1 >/sys/kernel/mm/transparent_hugepage/use_zero_page
155198
156−Some userspace (such as a test program, or an optimized memory allocation
157−library) may want to know the size (in bytes) of a transparent hugepage::
199+Some userspace (such as a test program, or an optimized memory
200+allocation library) may want to know the size (in bytes) of a
201+PMD-mappable transparent hugepage::
158202
159203 cat /sys/kernel/mm/transparent_hugepage/hpage_pmd_size
160204
161−khugepaged will be automatically started when
162−transparent_hugepage/enabled is set to "always" or "madvise, and it'll
163−be automatically shutdown if it's set to "never".
205+khugepaged will be automatically started when one or more hugepage
206+sizes are enabled (either by directly setting "always" or "madvise",
207+or by setting "inherit" while the top-level enabled is set to "always"
208+or "madvise"), and it'll be automatically shutdown when the last
209+hugepage size is disabled (either by directly setting "never", or by
210+setting "inherit" while the top-level enabled is set to "never").
164211
165212 Khugepaged controls
166213 -------------------
167214
215+.. note::
216+ khugepaged currently only searches for opportunities to collapse to
217+ PMD-sized THP and no attempt is made to collapse to other THP
218+ sizes.
219+
168220 khugepaged runs usually at low frequency so while one may not want to
169221 invoke defrag algorithms synchronously during the page faults, it
170222 should be worth invoking defrag at least in khugepaged. However it's
@@ -282,19 +334,26 @@ force · 111 unmodified lines
282334 Need of application restart
283335 ===========================
284336
285−The transparent_hugepage/enabled values and tmpfs mount option only affect
286−future behavior. So to make them effective you need to restart any
287−application that could have been using hugepages. This also applies to the
288−regions registered in khugepaged.
337+The transparent_hugepage/enabled and
338+transparent_hugepage/hugepages-<size>kB/enabled values and tmpfs mount
339+option only affect future behavior. So to make them effective you need
340+to restart any application that could have been using hugepages. This
341+also applies to the regions registered in khugepaged.
289342
290343 Monitoring usage
291344 ================
292345
293−The number of anonymous transparent huge pages currently used by the
346+.. note::
347+ Currently the below counters only record events relating to
348+ PMD-sized THP. Events relating to other THP sizes are not included.
349+
350+The number of PMD-sized anonymous transparent huge pages currently used by the
294351 system is available by reading the AnonHugePages field in ``/proc/meminfo``.
295−To identify what applications are using anonymous transparent huge pages,
296−it is necessary to read ``/proc/PID/smaps`` and count the AnonHugePages fields
297−for each mapping.
352+To identify what applications are using PMD-sized anonymous transparent huge
353+pages, it is necessary to read ``/proc/PID/smaps`` and count the AnonHugePages
354+fields for each mapping. (Note that AnonHugePages only applies to traditional
355+PMD-sized THP for historical reasons and should have been called
356+AnonHugePmdMapped).
298357
299358 The number of file transparent huge pages mapped to userspace is available
300359 by reading ShmemPmdMapped and ShmemHugePages fields in ``/proc/meminfo``.
@@ -413,7 +472,7 @@ for huge pages. · 112 unmodified lines
413472 Optimizing the applications
414473 ===========================
415474
416−To be guaranteed that the kernel will map a 2M page immediately in any
475+To be guaranteed that the kernel will map a THP immediately in any
417476 memory region, the mmap region has to be hugepage naturally
418477 aligned. posix_memalign() can provide that guarantee.
419478
Documentation/admin-guide/mm/userfaultfd.rst+3−0
@@ -113,6 +113,9 @@ events, except page fault notifications, may be generated: · 112 unmodified lines
113113 areas. ``UFFD_FEATURE_MINOR_SHMEM`` is the analogous feature indicating
114114 support for shmem virtual memory areas.
115115
116+- ``UFFD_FEATURE_MOVE`` indicates that the kernel supports moving an
117+ existing page contents from userspace.
118+
116119 The userland application should set the feature flags it intends to use
117120 when invoking the ``UFFDIO_API`` ioctl, to request that those features be
118121 enabled if supported.
Documentation/admin-guide/mm/zswap.rst+20−0
@@ -153,6 +153,26 @@ attribute, e. g.:: · 152 unmodified lines
153153
154154 Setting this parameter to 100 will disable the hysteresis.
155155
156+Some users cannot tolerate the swapping that comes with zswap store failures
157+and zswap writebacks. Swapping can be disabled entirely (without disabling
158+zswap itself) on a cgroup-basis as follows:
159+
160+ echo 0 > /sys/fs/cgroup/<cgroup-name>/memory.zswap.writeback
161+
162+Note that if the store failures are recurring (for e.g if the pages are
163+incompressible), users can observe reclaim inefficiency after disabling
164+writeback (because the same pages might be rejected again and again).
165+
166+When there is a sizable amount of cold memory residing in the zswap pool, it
167+can be advantageous to proactively write these cold pages to swap and reclaim
168+the memory for other use cases. By default, the zswap shrinker is disabled.
169+User can enable it as follows:
170+
171+ echo Y > /sys/module/zswap/parameters/shrinker_enabled
172+
173+This can be enabled at the boot time if ``CONFIG_ZSWAP_SHRINKER_DEFAULT_ON`` is
174+selected.
175+
156176 A debugfs interface is provided for various statistic about pool size, number
157177 of pages stored, same-value filled pages and various counters for the reasons
158178 pages are rejected.
Documentation/admin-guide/perf/dwc_pcie_pmu.rst+94−0
@@ -0,0 +1,94 @@
1+======================================================================
2+Synopsys DesignWare Cores (DWC) PCIe Performance Monitoring Unit (PMU)
3+======================================================================
4+
5+DesignWare Cores (DWC) PCIe PMU
6+===============================
7+
8+The PMU is a PCIe configuration space register block provided by each PCIe Root
9+Port in a Vendor-Specific Extended Capability named RAS D.E.S (Debug, Error
10+injection, and Statistics).
11+
12+As the name indicates, the RAS DES capability supports system level
13+debugging, AER error injection, and collection of statistics. To facilitate
14+collection of statistics, Synopsys DesignWare Cores PCIe controller
15+provides the following two features:
16+
17+- one 64-bit counter for Time Based Analysis (RX/TX data throughput and
18+ time spent in each low-power LTSSM state) and
19+- one 32-bit counter for Event Counting (error and non-error events for
20+ a specified lane)
21+
22+Note: There is no interrupt for counter overflow.
23+
24+Time Based Analysis
25+-------------------
26+
27+Using this feature you can obtain information regarding RX/TX data
28+throughput and time spent in each low-power LTSSM state by the controller.
29+The PMU measures data in two categories:
30+
31+- Group#0: Percentage of time the controller stays in LTSSM states.
32+- Group#1: Amount of data processed (Units of 16 bytes).
33+
34+Lane Event counters
35+-------------------
36+
37+Using this feature you can obtain Error and Non-Error information in
38+specific lane by the controller. The PMU event is selected by all of:
39+
40+- Group i
41+- Event j within the Group i
42+- Lane k
43+
44+Some of the events only exist for specific configurations.
45+
46+DesignWare Cores (DWC) PCIe PMU Driver
47+=======================================
48+
49+This driver adds PMU devices for each PCIe Root Port named based on the BDF of
50+the Root Port. For example,
51+
52+ 30:03.0 PCI bridge: Device 1ded:8000 (rev 01)
53+
54+the PMU device name for this Root Port is dwc_rootport_3018.
55+
56+The DWC PCIe PMU driver registers a perf PMU driver, which provides
57+description of available events and configuration options in sysfs, see
58+/sys/bus/event_source/devices/dwc_rootport_{bdf}.
59+
60+The "format" directory describes format of the config fields of the
61+perf_event_attr structure. The "events" directory provides configuration
62+templates for all documented events. For example,
63+"Rx_PCIe_TLP_Data_Payload" is an equivalent of "eventid=0x22,type=0x1".
64+
65+The "perf list" command shall list the available events from sysfs, e.g.::
66+
67+ $# perf list | grep dwc_rootport
68+ <...>
69+ dwc_rootport_3018/Rx_PCIe_TLP_Data_Payload/ [Kernel PMU event]
70+ <...>
71+ dwc_rootport_3018/rx_memory_read,lane=?/ [Kernel PMU event]
72+
73+Time Based Analysis Event Usage
74+-------------------------------
75+
76+Example usage of counting PCIe RX TLP data payload (Units of bytes)::
77+
78+ $# perf stat -a -e dwc_rootport_3018/Rx_PCIe_TLP_Data_Payload/
79+
80+The average RX/TX bandwidth can be calculated using the following formula:
81+
82+ PCIe RX Bandwidth = Rx_PCIe_TLP_Data_Payload / Measure_Time_Window
83+ PCIe TX Bandwidth = Tx_PCIe_TLP_Data_Payload / Measure_Time_Window
84+
85+Lane Event Usage
86+-------------------------------
87+
88+Each lane has the same event set and to avoid generating a list of hundreds
89+of events, the user need to specify the lane ID explicitly, e.g.::
90+
91+ $# perf stat -a -e dwc_rootport_3018/rx_memory_read,lane=4/
92+
93+The driver does not support sampling, therefore "perf record" will not
94+work. Per-task (without "-a") perf sessions are not supported.
Documentation/admin-guide/perf/imx-ddr.rst+37−8
@@ -13,8 +13,8 @@ is one register for each counter. Counter 0 is special in that it always counts · 12 unmodified lines
1313 interrupt is raised. If any other counter overflows, it continues counting, and
1414 no interrupt is raised.
1515
16−The "format" directory describes format of the config (event ID) and config1
17−(AXI filtering) fields of the perf_event_attr structure, see /sys/bus/event_source/
16+The "format" directory describes format of the config (event ID) and config1/2
17+(AXI filter setting) fields of the perf_event_attr structure, see /sys/bus/event_source/
1818 devices/imx8_ddr0/format/. The "events" directory describes the events types
1919 hardware supported that can be used with perf tool, see /sys/bus/event_source/
2020 devices/imx8_ddr0/events/. The "caps" directory describes filter features implemented
@@ -28,12 +28,11 @@ in DDR PMU, see /sys/bus/events_source/devices/imx8_ddr0/caps/. · 7 unmodified lines
2828 AXI filtering is only used by CSV modes 0x41 (axid-read) and 0x42 (axid-write)
2929 to count reading or writing matches filter setting. Filter setting is various
3030 from different DRAM controller implementations, which is distinguished by quirks
31−in the driver. You also can dump info from userspace, filter in "caps" directory
32−indicates whether PMU supports AXI ID filter or not; enhanced_filter indicates
33−whether PMU supports enhanced AXI ID filter or not. Value 0 for un-supported, and
34−value 1 for supported.
31+in the driver. You also can dump info from userspace, "caps" directory show the
32+type of AXI filter (filter, enhanced_filter and super_filter). Value 0 for
33+un-supported, and value 1 for supported.
3534
36−* With DDR_CAP_AXI_ID_FILTER quirk(filter: 1, enhanced_filter: 0).
35+* With DDR_CAP_AXI_ID_FILTER quirk(filter: 1, enhanced_filter: 0, super_filter: 0).
3736 Filter is defined with two configuration parts:
3837 --AXI_ID defines AxID matching value.
3938 --AXI_MASKING defines which bits of AxID are meaningful for the matching.
@@ -65,7 +64,37 @@ value 1 for supported. · 25 unmodified lines
6564
6665 perf stat -a -e imx8_ddr0/axid-read,axi_id=0x12/ cmd, which will monitor ARID=0x12
6766
68−* With DDR_CAP_AXI_ID_FILTER_ENHANCED quirk(filter: 1, enhanced_filter: 1).
67+* With DDR_CAP_AXI_ID_FILTER_ENHANCED quirk(filter: 1, enhanced_filter: 1, super_filter: 0).
6968 This is an extension to the DDR_CAP_AXI_ID_FILTER quirk which permits
7069 counting the number of bytes (as opposed to the number of bursts) from DDR
7170 read and write transactions concurrently with another set of data counters.
71+
72+* With DDR_CAP_AXI_ID_PORT_CHANNEL_FILTER quirk(filter: 0, enhanced_filter: 0, super_filter: 1).
73+ There is a limitation in previous AXI filter, it cannot filter different IDs
74+ at the same time as the filter is shared between counters. This quirk is the
75+ extension of AXI ID filter. One improvement is that counter 1-3 has their own
76+ filter, means that it supports concurrently filter various IDs. Another
77+ improvement is that counter 1-3 supports AXI PORT and CHANNEL selection. Support
78+ selecting address channel or data channel.
79+
80+ Filter is defined with 2 configuration registers per counter 1-3.
81+ --Counter N MASK COMP register - including AXI_ID and AXI_MASKING.
82+ --Counter N MUX CNTL register - including AXI CHANNEL and AXI PORT.
83+
84+ - 0: address channel
85+ - 1: data channel
86+
87+ PMU in DDR subsystem, only one single port0 exists, so axi_port is reserved
88+ which should be 0.
89+
90+ .. code-block:: bash
91+
92+ perf stat -a -e imx8_ddr0/axid-read,axi_mask=0xMMMM,axi_id=0xDDDD,axi_channel=0xH/ cmd
93+ perf stat -a -e imx8_ddr0/axid-write,axi_mask=0xMMMM,axi_id=0xDDDD,axi_channel=0xH/ cmd
94+
95+ .. note::
96+
97+ axi_channel is inverted in userspace, and it will be reverted in driver
98+ automatically. So that users do not need specify axi_channel if want to
99+ monitor data channel from DDR transactions, since data channel is more
100+ meaningful.
Documentation/admin-guide/perf/index.rst+1−0
@@ -19,6 +19,7 @@ Performance monitor support · 18 unmodified lines
1919 arm_dsu_pmu
2020 thunderx2-pmu
2121 alibaba_pmu
22+ dwc_pcie_pmu
2223 nvidia-pmu
2324 meson-ddr-pmu
2425 cxl
Documentation/admin-guide/pm/amd-pstate.rst+1−1
@@ -361,7 +361,7 @@ Global Attributes · 360 unmodified lines
361361
362362 ``amd-pstate`` exposes several global attributes (files) in ``sysfs`` to
363363 control its functionality at the system level. They are located in the
364−``/sys/devices/system/cpu/amd-pstate/`` directory and affect all CPUs.
364+``/sys/devices/system/cpu/amd_pstate/`` directory and affect all CPUs.
365365
366366 ``status``
367367 Operation mode of the driver: "active", "passive" or "disable".
Documentation/admin-guide/pmf.rst+24−0
@@ -0,0 +1,24 @@
1+.. SPDX-License-Identifier: GPL-2.0
2+
3+Set udev rules for PMF Smart PC Builder
4+---------------------------------------
5+
6+AMD PMF(Platform Management Framework) Smart PC Solution builder has to set the system states
7+like S0i3, Screen lock, hibernate etc, based on the output actions provided by the PMF
8+TA (Trusted Application).
9+
10+In order for this to work the PMF driver generates a uevent for userspace to react to. Below are
11+sample udev rules that can facilitate this experience when a machine has PMF Smart PC solution builder
12+enabled.
13+
14+Please add the following line(s) to
15+``/etc/udev/rules.d/99-local.rules``::
16+
17+ DRIVERS=="amd-pmf", ACTION=="change", ENV{EVENT_ID}=="0", RUN+="/usr/bin/systemctl suspend"
18+ DRIVERS=="amd-pmf", ACTION=="change", ENV{EVENT_ID}=="1", RUN+="/usr/bin/systemctl hibernate"
19+ DRIVERS=="amd-pmf", ACTION=="change", ENV{EVENT_ID}=="2", RUN+="/bin/loginctl lock-sessions"
20+
21+EVENT_ID values:
22+0= Put the system to S0i3/S2Idle
23+1= Put the system to hibernate
24+2= Lock the screen
Documentation/admin-guide/sysctl/net.rst+4−1
@@ -345,7 +345,10 @@ optmem_max · 344 unmodified lines
345345 ----------
346346
347347 Maximum ancillary buffer size allowed per socket. Ancillary data is a sequence
348−of struct cmsghdr structures with appended data.
348+of struct cmsghdr structures with appended data. TCP tx zerocopy also uses
349+optmem_max as a limit for its internal structures.
350+
351+Default : 128 KB
349352
350353 fb_tunnels_only_for_init_net
351354 ----------------------------
Documentation/admin-guide/sysrq.rst+10−1
@@ -75,10 +75,19 @@ On other · 74 unmodified lines
7575 submit a patch to be included in this section.
7676
7777 On all
78− Write a character to /proc/sysrq-trigger. e.g.::
78+ Write a single character to /proc/sysrq-trigger.
79+ Only the first character is processed, the rest of the string is
80+ ignored. However, it is not recommended to write any extra characters
81+ as the behavior is undefined and might change in the future versions.
82+ E.g.::
7983
8084 echo t > /proc/sysrq-trigger
8185
86+ Alternatively, write multiple characters prepended by underscore.
87+ This way, all characters will be processed. E.g.::
88+
89+ echo _reisub > /proc/sysrq-trigger
90+
8291 The :kbd:`<command key>` is case sensitive.
8392
8493 What are the 'command' keys?
Documentation/arch/arc/features.rst+1−1
@@ -1,3 +1,3 @@
11 .. SPDX-License-Identifier: GPL-2.0
22
3−.. kernel-feat:: $srctree/Documentation/features arc
3+.. kernel-feat:: features arc
Documentation/arch/arm/features.rst+1−1
@@ -1,3 +1,3 @@
11 .. SPDX-License-Identifier: GPL-2.0
22
3−.. kernel-feat:: $srctree/Documentation/features arm
3+.. kernel-feat:: features arm
Documentation/arch/arm64/arm-acpi.rst+1−1
@@ -130,7 +130,7 @@ When an Arm system boots, it can either have DT information, ACPI tables, · 129 unmodified lines
130130 or in some very unusual cases, both. If no command line parameters are used,
131131 the kernel will try to use DT for device enumeration; if there is no DT
132132 present, the kernel will try to use ACPI tables, but only if they are present.
133−In neither is available, the kernel will not boot. If acpi=force is used
133+If neither is available, the kernel will not boot. If acpi=force is used
134134 on the command line, the kernel will attempt to use ACPI tables first, but
135135 fall back to DT if there are no ACPI tables present. The basic idea is that
136136 the kernel will not fail to boot unless it absolutely has no other choice.
Documentation/arch/arm64/features.rst+1−1
@@ -1,3 +1,3 @@
11 .. SPDX-License-Identifier: GPL-2.0
22
3−.. kernel-feat:: $srctree/Documentation/features arm64
3+.. kernel-feat:: features arm64
Documentation/arch/arm64/perf.rst+72−0
@@ -164,3 +164,75 @@ and should be used to mask the upper bits as needed. · 163 unmodified lines
164164 https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/tools/perf/arch/arm64/tests/user-events.c
165165 .. _tools/lib/perf/tests/test-evsel.c:
166166 https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/tools/lib/perf/tests/test-evsel.c
167+
168+Event Counting Threshold
169+==========================================
170+
171+Overview
172+--------
173+
174+FEAT_PMUv3_TH (Armv8.8) permits a PMU counter to increment only on
175+events whose count meets a specified threshold condition. For example if
176+threshold_compare is set to 2 ('Greater than or equal'), and the
177+threshold is set to 2, then the PMU counter will now only increment by
178+when an event would have previously incremented the PMU counter by 2 or
179+more on a single processor cycle.
180+
181+To increment by 1 after passing the threshold condition instead of the
182+number of events on that cycle, add the 'threshold_count' option to the
183+commandline.
184+
185+How-to
186+------
187+
188+These are the parameters for controlling the feature:
189+
190+.. list-table::
191+ :header-rows: 1
192+
193+ * - Parameter
194+ - Description
195+ * - threshold
196+ - Value to threshold the event by. A value of 0 means that
197+ thresholding is disabled and the other parameters have no effect.
198+ * - threshold_compare
199+ - | Comparison function to use, with the following values supported:
200+ |
201+ | 0: Not-equal
202+ | 1: Equals
203+ | 2: Greater-than-or-equal
204+ | 3: Less-than
205+ * - threshold_count
206+ - If this is set, count by 1 after passing the threshold condition
207+ instead of the value of the event on this cycle.
208+
209+The threshold, threshold_compare and threshold_count values can be
210+provided per event, for example:
211+
212+.. code-block:: sh
213+
214+ perf stat -e stall_slot/threshold=2,threshold_compare=2/ \
215+ -e dtlb_walk/threshold=10,threshold_compare=3,threshold_count/
216+
217+In this example the stall_slot event will count by 2 or more on every
218+cycle where 2 or more stalls happen. And dtlb_walk will count by 1 on
219+every cycle where the number of dtlb walks were less than 10.
220+
221+The maximum supported threshold value can be read from the caps of each
222+PMU, for example:
223+
224+.. code-block:: sh
225+
226+ cat /sys/bus/event_source/devices/armv8_pmuv3/caps/threshold_max
227+
228+ 0x000000ff
229+
230+If a value higher than this is given, then opening the event will result
231+in an error. The highest possible maximum is 4095, as the config field
232+for threshold is limited to 12 bits, and the Perf tool will refuse to
233+parse higher values.
234+
235+If the PMU doesn't support FEAT_PMUv3_TH, then threshold_max will read
236+0, and attempting to set a threshold value will also result in an error.
237+threshold_max will also read as 0 on aarch32 guests, even if the host
238+is running on hardware with the feature.
Documentation/arch/arm64/silicon-errata.rst+12−2
@@ -71,6 +71,8 @@ stable kernels. · 70 unmodified lines
7171 +----------------+-----------------+-----------------+-----------------------------+
7272 | ARM | Cortex-A510 | #2658417 | ARM64_ERRATUM_2658417 |
7373 +----------------+-----------------+-----------------+-----------------------------+
74+| ARM | Cortex-A510 | #3117295 | ARM64_ERRATUM_3117295 |
75++----------------+-----------------+-----------------+-----------------------------+
7476 | ARM | Cortex-A520 | #2966298 | ARM64_ERRATUM_2966298 |
7577 +----------------+-----------------+-----------------+-----------------------------+
7678 | ARM | Cortex-A53 | #826319 | ARM64_ERRATUM_826319 |
@@ -117,6 +119,10 @@ stable kernels. · 40 unmodified lines
117119 +----------------+-----------------+-----------------+-----------------------------+
118120 | ARM | Cortex-A76 | #1463225 | ARM64_ERRATUM_1463225 |
119121 +----------------+-----------------+-----------------+-----------------------------+
122+| ARM | Cortex-A76 | #1490853 | N/A |
123++----------------+-----------------+-----------------+-----------------------------+
124+| ARM | Cortex-A77 | #1491015 | N/A |
125++----------------+-----------------+-----------------+-----------------------------+
120126 | ARM | Cortex-A77 | #1508412 | ARM64_ERRATUM_1508412 |
121127 +----------------+-----------------+-----------------+-----------------------------+
122128 | ARM | Cortex-A710 | #2119858 | ARM64_ERRATUM_2119858 |
@@ -127,6 +133,8 @@ stable kernels. · 4 unmodified lines
127133 +----------------+-----------------+-----------------+-----------------------------+
128134 | ARM | Cortex-A715 | #2645198 | ARM64_ERRATUM_2645198 |
129135 +----------------+-----------------+-----------------+-----------------------------+
136+| ARM | Cortex-X1 | #1502854 | N/A |
137++----------------+-----------------+-----------------+-----------------------------+
130138 | ARM | Cortex-X2 | #2119858 | ARM64_ERRATUM_2119858 |
131139 +----------------+-----------------+-----------------+-----------------------------+
132140 | ARM | Cortex-X2 | #2224489 | ARM64_ERRATUM_2224489 |
@@ -135,6 +143,8 @@ stable kernels. · 2 unmodified lines
135143 +----------------+-----------------+-----------------+-----------------------------+
136144 | ARM | Neoverse-N1 | #1349291 | N/A |
137145 +----------------+-----------------+-----------------+-----------------------------+
146+| ARM | Neoverse-N1 | #1490853 | N/A |
147++----------------+-----------------+-----------------+-----------------------------+
138148 | ARM | Neoverse-N1 | #1542419 | ARM64_ERRATUM_1542419 |
139149 +----------------+-----------------+-----------------+-----------------------------+
140150 | ARM | Neoverse-N2 | #2139208 | ARM64_ERRATUM_2139208 |
@@ -143,6 +153,8 @@ stable kernels. · 2 unmodified lines
143153 +----------------+-----------------+-----------------+-----------------------------+
144154 | ARM | Neoverse-N2 | #2253138 | ARM64_ERRATUM_2253138 |
145155 +----------------+-----------------+-----------------+-----------------------------+
156+| ARM | Neoverse-V1 | #1619801 | N/A |
157++----------------+-----------------+-----------------+-----------------------------+
146158 | ARM | MMU-500 | #841119,826419 | N/A |
147159 +----------------+-----------------+-----------------+-----------------------------+
148160 | ARM | MMU-600 | #1076982,1209401| N/A |
@@ -225,11 +237,9 @@ stable kernels. · 76 unmodified lines
225237 +----------------+-----------------+-----------------+-----------------------------+
226238 | Rockchip | RK3588 | #3588001 | ROCKCHIP_ERRATUM_3588001 |
227239 +----------------+-----------------+-----------------+-----------------------------+
228−
229240 +----------------+-----------------+-----------------+-----------------------------+
230241 | Fujitsu | A64FX | E#010001 | FUJITSU_ERRATUM_010001 |
231242 +----------------+-----------------+-----------------+-----------------------------+
232−
233243 +----------------+-----------------+-----------------+-----------------------------+
234244 | ASR | ASR8601 | #8601001 | N/A |
235245 +----------------+-----------------+-----------------+-----------------------------+
Documentation/arch/loongarch/features.rst+1−1
@@ -1,3 +1,3 @@
11 .. SPDX-License-Identifier: GPL-2.0
22
3−.. kernel-feat:: $srctree/Documentation/features loongarch
3+.. kernel-feat:: features loongarch
Documentation/arch/m68k/features.rst+1−1
@@ -1,3 +1,3 @@
11 .. SPDX-License-Identifier: GPL-2.0
22
3−.. kernel-feat:: $srctree/Documentation/features m68k
3+.. kernel-feat:: features m68k
Documentation/arch/mips/features.rst+1−1
@@ -1,3 +1,3 @@
11 .. SPDX-License-Identifier: GPL-2.0
22
3−.. kernel-feat:: $srctree/Documentation/features mips
3+.. kernel-feat:: features mips
Documentation/arch/nios2/features.rst+1−1
@@ -1,3 +1,3 @@
11 .. SPDX-License-Identifier: GPL-2.0
22
3−.. kernel-feat:: $srctree/Documentation/features nios2
3+.. kernel-feat:: features nios2
Documentation/arch/openrisc/features.rst+1−1
@@ -1,3 +1,3 @@
11 .. SPDX-License-Identifier: GPL-2.0
22
3−.. kernel-feat:: $srctree/Documentation/features openrisc
3+.. kernel-feat:: features openrisc
Documentation/arch/parisc/features.rst+1−1
@@ -1,3 +1,3 @@
11 .. SPDX-License-Identifier: GPL-2.0
22
3−.. kernel-feat:: $srctree/Documentation/features parisc
3+.. kernel-feat:: features parisc
Documentation/arch/powerpc/features.rst+1−1
@@ -1,3 +1,3 @@
11 .. SPDX-License-Identifier: GPL-2.0
22
3−.. kernel-feat:: $srctree/Documentation/features powerpc
3+.. kernel-feat:: features powerpc
Documentation/arch/riscv/features.rst+1−1
@@ -1,3 +1,3 @@
11 .. SPDX-License-Identifier: GPL-2.0
22
3−.. kernel-feat:: $srctree/Documentation/features riscv
3+.. kernel-feat:: features riscv
Documentation/arch/riscv/hwprobe.rst+115−7
@@ -12,7 +12,7 @@ is defined in <asm/hwprobe.h>:: · 11 unmodified lines
1212 };
1313
1414 long sys_riscv_hwprobe(struct riscv_hwprobe *pairs, size_t pair_count,
15− size_t cpu_count, cpu_set_t *cpus,
15+ size_t cpusetsize, cpu_set_t *cpus,
1616 unsigned int flags);
1717
1818 The arguments are split into three groups: an array of key-value pairs, a CPU
@@ -20,12 +20,26 @@ set, and some flags. The key-value pairs are supplied with a count. Userspace · 1 unmodified line
2020 must prepopulate the key field for each element, and the kernel will fill in the
2121 value if the key is recognized. If a key is unknown to the kernel, its key field
2222 will be cleared to -1, and its value set to 0. The CPU set is defined by
23−CPU_SET(3). For value-like keys (eg. vendor/arch/impl), the returned value will
24−be only be valid if all CPUs in the given set have the same value. Otherwise -1
25−will be returned. For boolean-like keys, the value returned will be a logical
26−AND of the values for the specified CPUs. Usermode can supply NULL for cpus and
27−0 for cpu_count as a shortcut for all online CPUs. There are currently no flags,
28−this value must be zero for future compatibility.
23+CPU_SET(3) with size ``cpusetsize`` bytes. For value-like keys (eg. vendor,
24+arch, impl), the returned value will only be valid if all CPUs in the given set
25+have the same value. Otherwise -1 will be returned. For boolean-like keys, the
26+value returned will be a logical AND of the values for the specified CPUs.
27+Usermode can supply NULL for ``cpus`` and 0 for ``cpusetsize`` as a shortcut for
28+all online CPUs. The currently supported flags are:
29+
30+* :c:macro:`RISCV_HWPROBE_WHICH_CPUS`: This flag basically reverses the behavior
31+ of sys_riscv_hwprobe(). Instead of populating the values of keys for a given
32+ set of CPUs, the values of each key are given and the set of CPUs is reduced
33+ by sys_riscv_hwprobe() to only those which match each of the key-value pairs.
34+ How matching is done depends on the key type. For value-like keys, matching
35+ means to be the exact same as the value. For boolean-like keys, matching
36+ means the result of a logical AND of the pair's value with the CPU's value is
37+ exactly the same as the pair's value. Additionally, when ``cpus`` is an empty
38+ set, then it is initialized to all online CPUs which fit within it, i.e. the
39+ CPU set returned is the reduction of all the online CPUs which can be
40+ represented with a CPU set of size ``cpusetsize``.
41+
42+All other flags are reserved for future compatibility and must be zero.
2943
3044 On success 0 is returned, on failure a negative error code is returned.
3145
@@ -80,6 +94,100 @@ The following keys are defined: · 48 unmodified lines
8094 * :c:macro:`RISCV_HWPROBE_EXT_ZICBOZ`: The Zicboz extension is supported, as
8195 ratified in commit 3dd606f ("Create cmobase-v1.0.pdf") of riscv-CMOs.
8296
97+ * :c:macro:`RISCV_HWPROBE_EXT_ZBC` The Zbc extension is supported, as defined
98+ in version 1.0 of the Bit-Manipulation ISA extensions.
99+
100+ * :c:macro:`RISCV_HWPROBE_EXT_ZBKB` The Zbkb extension is supported, as
101+ defined in version 1.0 of the Scalar Crypto ISA extensions.
102+
103+ * :c:macro:`RISCV_HWPROBE_EXT_ZBKC` The Zbkc extension is supported, as
104+ defined in version 1.0 of the Scalar Crypto ISA extensions.
105+
106+ * :c:macro:`RISCV_HWPROBE_EXT_ZBKX` The Zbkx extension is supported, as
107+ defined in version 1.0 of the Scalar Crypto ISA extensions.
108+
109+ * :c:macro:`RISCV_HWPROBE_EXT_ZKND` The Zknd extension is supported, as
110+ defined in version 1.0 of the Scalar Crypto ISA extensions.
111+
112+ * :c:macro:`RISCV_HWPROBE_EXT_ZKNE` The Zkne extension is supported, as
113+ defined in version 1.0 of the Scalar Crypto ISA extensions.
114+
115+ * :c:macro:`RISCV_HWPROBE_EXT_ZKNH` The Zknh extension is supported, as
116+ defined in version 1.0 of the Scalar Crypto ISA extensions.
117+
118+ * :c:macro:`RISCV_HWPROBE_EXT_ZKSED` The Zksed extension is supported, as
119+ defined in version 1.0 of the Scalar Crypto ISA extensions.
120+
121+ * :c:macro:`RISCV_HWPROBE_EXT_ZKSH` The Zksh extension is supported, as
122+ defined in version 1.0 of the Scalar Crypto ISA extensions.
123+
124+ * :c:macro:`RISCV_HWPROBE_EXT_ZKT` The Zkt extension is supported, as defined
125+ in version 1.0 of the Scalar Crypto ISA extensions.
126+
127+ * :c:macro:`RISCV_HWPROBE_EXT_ZVBB`: The Zvbb extension is supported as
128+ defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
129+
130+ * :c:macro:`RISCV_HWPROBE_EXT_ZVBC`: The Zvbc extension is supported as
131+ defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
132+
133+ * :c:macro:`RISCV_HWPROBE_EXT_ZVKB`: The Zvkb extension is supported as
134+ defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
135+
136+ * :c:macro:`RISCV_HWPROBE_EXT_ZVKG`: The Zvkg extension is supported as
137+ defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
138+
139+ * :c:macro:`RISCV_HWPROBE_EXT_ZVKNED`: The Zvkned extension is supported as
140+ defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
141+
142+ * :c:macro:`RISCV_HWPROBE_EXT_ZVKNHA`: The Zvknha extension is supported as
143+ defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
144+
145+ * :c:macro:`RISCV_HWPROBE_EXT_ZVKNHB`: The Zvknhb extension is supported as
146+ defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
147+
148+ * :c:macro:`RISCV_HWPROBE_EXT_ZVKSED`: The Zvksed extension is supported as
149+ defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
150+
151+ * :c:macro:`RISCV_HWPROBE_EXT_ZVKSH`: The Zvksh extension is supported as
152+ defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
153+
154+ * :c:macro:`RISCV_HWPROBE_EXT_ZVKT`: The Zvkt extension is supported as
155+ defined in version 1.0 of the RISC-V Cryptography Extensions Volume II.
156+
157+ * :c:macro:`RISCV_HWPROBE_EXT_ZFH`: The Zfh extension version 1.0 is supported
158+ as defined in the RISC-V ISA manual.
159+
160+ * :c:macro:`RISCV_HWPROBE_EXT_ZFHMIN`: The Zfhmin extension version 1.0 is
161+ supported as defined in the RISC-V ISA manual.
162+
163+ * :c:macro:`RISCV_HWPROBE_EXT_ZIHINTNTL`: The Zihintntl extension version 1.0
164+ is supported as defined in the RISC-V ISA manual.
165+
166+ * :c:macro:`RISCV_HWPROBE_EXT_ZVFH`: The Zvfh extension is supported as
167+ defined in the RISC-V Vector manual starting from commit e2ccd0548d6c
168+ ("Remove draft warnings from Zvfh[min]").
169+
170+ * :c:macro:`RISCV_HWPROBE_EXT_ZVFHMIN`: The Zvfhmin extension is supported as
171+ defined in the RISC-V Vector manual starting from commit e2ccd0548d6c
172+ ("Remove draft warnings from Zvfh[min]").
173+
174+ * :c:macro:`RISCV_HWPROBE_EXT_ZFA`: The Zfa extension is supported as
175+ defined in the RISC-V ISA manual starting from commit 056b6ff467c7
176+ ("Zfa is ratified").
177+
178+ * :c:macro:`RISCV_HWPROBE_EXT_ZTSO`: The Ztso extension is supported as
179+ defined in the RISC-V ISA manual starting from commit 5618fb5a216b
180+ ("Ztso is now ratified.")
181+
182+ * :c:macro:`RISCV_HWPROBE_EXT_ZACAS`: The Zacas extension is supported as
183+ defined in the Atomic Compare-and-Swap (CAS) instructions manual starting
184+ from commit 5059e0ca641c ("update to ratified").
185+
186+ * :c:macro:`RISCV_HWPROBE_EXT_ZICOND`: The Zicond extension is supported as
187+ defined in the RISC-V Integer Conditional (Zicond) operations extension
188+ manual starting from commit 95cf1f9 ("Add changes requested by Ved
189+ during signoff")
190+
83191 * :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: A bitmask that contains performance
84192 information about the selected set of processors.
85193
Documentation/arch/s390/features.rst+1−1
@@ -1,3 +1,3 @@
11 .. SPDX-License-Identifier: GPL-2.0
22
3−.. kernel-feat:: $srctree/Documentation/features s390
3+.. kernel-feat:: features s390
Documentation/arch/sh/features.rst+1−1
@@ -1,3 +1,3 @@
11 .. SPDX-License-Identifier: GPL-2.0
22
3−.. kernel-feat:: $srctree/Documentation/features sh
3+.. kernel-feat:: features sh
Documentation/arch/sparc/features.rst+1−1
@@ -1,3 +1,3 @@
11 .. SPDX-License-Identifier: GPL-2.0
22
3−.. kernel-feat:: $srctree/Documentation/features sparc
3+.. kernel-feat:: features sparc
Documentation/arch/x86/boot.rst+1−1
@@ -71,7 +71,7 @@ Protocol 2.13 (Kernel 3.14) Support 32- and 64-bit flags being set in · 70 unmodified lines
7171
7272 Protocol 2.14 BURNT BY INCORRECT COMMIT
7373 ae7e1238e68f2a472a125673ab506d49158c1889
74− (x86/boot: Add ACPI RSDP address to setup_header)
74+ ("x86/boot: Add ACPI RSDP address to setup_header")
7575 DO NOT USE!!! ASSUME SAME AS 2.13.
7676
7777 Protocol 2.15 (Kernel 5.5) Added the kernel_info and kernel_info.setup_type_max.
Documentation/arch/x86/cpuinfo.rst+68−21
@@ -7,27 +7,74 @@ x86 Feature Flags · 6 unmodified lines
77 Introduction
88 ============
99
10−On x86, flags appearing in /proc/cpuinfo have an X86_FEATURE definition
11−in arch/x86/include/asm/cpufeatures.h. If the kernel cares about a feature
12−or KVM want to expose the feature to a KVM guest, it can and should have
13−an X86_FEATURE_* defined. These flags represent hardware features as
14−well as software features.
15−
16−If users want to know if a feature is available on a given system, they
17−try to find the flag in /proc/cpuinfo. If a given flag is present, it
18−means that the kernel supports it and is currently making it available.
19−If such flag represents a hardware feature, it also means that the
20−hardware supports it.
21−
22−If the expected flag does not appear in /proc/cpuinfo, things are murkier.
23−Users need to find out the reason why the flag is missing and find the way
24−how to enable it, which is not always easy. There are several factors that
25−can explain missing flags: the expected feature failed to enable, the feature
26−is missing in hardware, platform firmware did not enable it, the feature is
27−disabled at build or run time, an old kernel is in use, or the kernel does
28−not support the feature and thus has not enabled it. In general, /proc/cpuinfo
29−shows features which the kernel supports. For a full list of CPUID flags
30−which the CPU supports, use tools/arch/x86/kcpuid.
10+The list of feature flags in /proc/cpuinfo is not complete and
11+represents an ill-fated attempt from long time ago to put feature flags
12+in an easy to find place for userspace.
13+
14+However, the amount of feature flags is growing by the CPU generation,
15+leading to unparseable and unwieldy /proc/cpuinfo.
16+
17+What is more, those feature flags do not even need to be in that file
18+because userspace doesn't care about them - glibc et al already use
19+CPUID to find out what the target machine supports and what not.
20+
21+And even if it doesn't show a particular feature flag - although the CPU
22+still does have support for the respective hardware functionality and
23+said CPU supports CPUID faulting - userspace can simply probe for the
24+feature and figure out if it is supported or not, regardless of whether
25+it is being advertised somewhere.
26+
27+Furthermore, those flag strings become an ABI the moment they appear
28+there and maintaining them forever when nothing even uses them is a lot
29+of wasted effort.
30+
31+So, the current use of /proc/cpuinfo is to show features which the
32+kernel has *enabled* and *supports*. As in: the CPUID feature flag is
33+there, there's an additional setup which the kernel has done while
34+booting and the functionality is ready to use. A perfect example for
35+that is "user_shstk" where additional code enablement is present in the
36+kernel to support shadow stack for user programs.
37+
38+So, if users want to know if a feature is available on a given system,
39+they try to find the flag in /proc/cpuinfo. If a given flag is present,
40+it means that
41+
42+* the kernel knows about the feature enough to have an X86_FEATURE bit
43+
44+* the kernel supports it and is currently making it available either to
45+ userspace or some other part of the kernel
46+
47+* if the flag represents a hardware feature the hardware supports it.
48+
49+The absence of a flag in /proc/cpuinfo by itself means almost nothing to
50+an end user.
51+
52+On the one hand, a feature like "vaes" might be fully available to user
53+applications on a kernel that has not defined X86_FEATURE_VAES and thus
54+there is no "vaes" in /proc/cpuinfo.
55+
56+On the other hand, a new kernel running on non-VAES hardware would also
57+have no "vaes" in /proc/cpuinfo. There's no way for an application or
58+user to tell the difference.
59+
60+The end result is that the flags field in /proc/cpuinfo is marginally
61+useful for kernel debugging, but not really for anything else.
62+Applications should instead use things like the glibc facilities for
63+querying CPU support. Users should rely on tools like
64+tools/arch/x86/kcpuid and cpuid(1).
65+
66+Regarding implementation, flags appearing in /proc/cpuinfo have an
67+X86_FEATURE definition in arch/x86/include/asm/cpufeatures.h. These flags
68+represent hardware features as well as software features.
69+
70+If the kernel cares about a feature or KVM want to expose the feature to
71+a KVM guest, it should only then expose it to the guest when the guest
72+needs to parse /proc/cpuinfo. Which, as mentioned above, is highly
73+unlikely. KVM can synthesize the CPUID bit and the KVM guest can simply
74+query CPUID and figure out what the hypervisor supports and what not. As
75+already stated, /proc/cpuinfo is not a dumping ground for useless
76+feature flags.
77+
3178
3279 How are feature flags created?
3380 ==============================
Documentation/arch/x86/features.rst+1−1
@@ -1,3 +1,3 @@
11 .. SPDX-License-Identifier: GPL-2.0
22
3−.. kernel-feat:: $srctree/Documentation/features x86
3+.. kernel-feat:: features x86
Documentation/arch/x86/pti.rst+4−6
@@ -81,11 +81,9 @@ this protection comes at a cost: · 80 unmodified lines
8181 and exit (it can be skipped when the kernel is interrupted,
8282 though.) Moves to CR3 are on the order of a hundred
8383 cycles, and are required at every entry and exit.
84− b. A "trampoline" must be used for SYSCALL entry. This
85− trampoline depends on a smaller set of resources than the
86− non-PTI SYSCALL entry code, so requires mapping fewer
87− things into the userspace page tables. The downside is
88− that stacks must be switched at entry time.
84+ b. Percpu TSS is mapped into the user page tables to allow SYSCALL64 path
85+ to work under PTI. This doesn't have a direct runtime cost but it can
86+ be argued it opens certain timing attack scenarios.
8987 c. Global pages are disabled for all kernel structures not
9088 mapped into both kernel and userspace page tables. This
9189 feature of the MMU allows different processes to share TLB
@@ -167,7 +165,7 @@ that are worth noting here. · 75 unmodified lines
167165 * Failures of the selftests/x86 code. Usually a bug in one of the
168166 more obscure corners of entry_64.S
169167 * Crashes in early boot, especially around CPU bringup. Bugs
170− in the trampoline code or mappings cause these.
168+ in the mappings cause these.
171169 * Crashes at the first interrupt. Caused by bugs in entry_64.S,
172170 like screwing up a page table switch. Also caused by
173171 incorrectly mapping the IRQ handler entry code.
Documentation/arch/x86/tdx.rst+196−11
@@ -10,6 +10,191 @@ encrypting the guest memory. In TDX, a special module running in a special · 9 unmodified lines
1010 mode sits between the host and the guest and manages the guest/host
1111 separation.
1212
13+TDX Host Kernel Support
14+=======================
15+
16+TDX introduces a new CPU mode called Secure Arbitration Mode (SEAM) and
17+a new isolated range pointed by the SEAM Ranger Register (SEAMRR). A
18+CPU-attested software module called 'the TDX module' runs inside the new
19+isolated range to provide the functionalities to manage and run protected
20+VMs.
21+
22+TDX also leverages Intel Multi-Key Total Memory Encryption (MKTME) to
23+provide crypto-protection to the VMs. TDX reserves part of MKTME KeyIDs
24+as TDX private KeyIDs, which are only accessible within the SEAM mode.
25+BIOS is responsible for partitioning legacy MKTME KeyIDs and TDX KeyIDs.
26+
27+Before the TDX module can be used to create and run protected VMs, it
28+must be loaded into the isolated range and properly initialized. The TDX
29+architecture doesn't require the BIOS to load the TDX module, but the
30+kernel assumes it is loaded by the BIOS.
31+
32+TDX boot-time detection
33+-----------------------
34+
35+The kernel detects TDX by detecting TDX private KeyIDs during kernel
36+boot. Below dmesg shows when TDX is enabled by BIOS::
37+
38+ [..] virt/tdx: BIOS enabled: private KeyID range: [16, 64)
39+
40+TDX module initialization
41+---------------------------------------
42+
43+The kernel talks to the TDX module via the new SEAMCALL instruction. The
44+TDX module implements SEAMCALL leaf functions to allow the kernel to
45+initialize it.
46+
47+If the TDX module isn't loaded, the SEAMCALL instruction fails with a
48+special error. In this case the kernel fails the module initialization
49+and reports the module isn't loaded::
50+
51+ [..] virt/tdx: module not loaded
52+
53+Initializing the TDX module consumes roughly ~1/256th system RAM size to
54+use it as 'metadata' for the TDX memory. It also takes additional CPU
55+time to initialize those metadata along with the TDX module itself. Both
56+are not trivial. The kernel initializes the TDX module at runtime on
57+demand.
58+
59+Besides initializing the TDX module, a per-cpu initialization SEAMCALL
60+must be done on one cpu before any other SEAMCALLs can be made on that
61+cpu.
62+
63+The kernel provides two functions, tdx_enable() and tdx_cpu_enable() to
64+allow the user of TDX to enable the TDX module and enable TDX on local
65+cpu respectively.
66+
67+Making SEAMCALL requires VMXON has been done on that CPU. Currently only
68+KVM implements VMXON. For now both tdx_enable() and tdx_cpu_enable()
69+don't do VMXON internally (not trivial), but depends on the caller to
70+guarantee that.
71+
72+To enable TDX, the caller of TDX should: 1) temporarily disable CPU
73+hotplug; 2) do VMXON and tdx_enable_cpu() on all online cpus; 3) call
74+tdx_enable(). For example::
75+
76+ cpus_read_lock();
77+ on_each_cpu(vmxon_and_tdx_cpu_enable());
78+ ret = tdx_enable();
79+ cpus_read_unlock();
80+ if (ret)
81+ goto no_tdx;
82+ // TDX is ready to use
83+
84+And the caller of TDX must guarantee the tdx_cpu_enable() has been
85+successfully done on any cpu before it wants to run any other SEAMCALL.
86+A typical usage is do both VMXON and tdx_cpu_enable() in CPU hotplug
87+online callback, and refuse to online if tdx_cpu_enable() fails.
88+
89+User can consult dmesg to see whether the TDX module has been initialized.
90+
91+If the TDX module is initialized successfully, dmesg shows something
92+like below::
93+
94+ [..] virt/tdx: 262668 KBs allocated for PAMT
95+ [..] virt/tdx: module initialized
96+
97+If the TDX module failed to initialize, dmesg also shows it failed to
98+initialize::
99+
100+ [..] virt/tdx: module initialization failed ...
101+
102+TDX Interaction to Other Kernel Components
103+------------------------------------------
104+
105+TDX Memory Policy
106+~~~~~~~~~~~~~~~~~
107+
108+TDX reports a list of "Convertible Memory Region" (CMR) to tell the
109+kernel which memory is TDX compatible. The kernel needs to build a list
110+of memory regions (out of CMRs) as "TDX-usable" memory and pass those
111+regions to the TDX module. Once this is done, those "TDX-usable" memory
112+regions are fixed during module's lifetime.
113+
114+To keep things simple, currently the kernel simply guarantees all pages
115+in the page allocator are TDX memory. Specifically, the kernel uses all
116+system memory in the core-mm "at the time of TDX module initialization"
117+as TDX memory, and in the meantime, refuses to online any non-TDX-memory
118+in the memory hotplug.
119+
120+Physical Memory Hotplug
121+~~~~~~~~~~~~~~~~~~~~~~~
122+
123+Note TDX assumes convertible memory is always physically present during
124+machine's runtime. A non-buggy BIOS should never support hot-removal of
125+any convertible memory. This implementation doesn't handle ACPI memory
126+removal but depends on the BIOS to behave correctly.
127+
128+CPU Hotplug
129+~~~~~~~~~~~
130+
131+TDX module requires the per-cpu initialization SEAMCALL must be done on
132+one cpu before any other SEAMCALLs can be made on that cpu. The kernel
133+provides tdx_cpu_enable() to let the user of TDX to do it when the user
134+wants to use a new cpu for TDX task.
135+
136+TDX doesn't support physical (ACPI) CPU hotplug. During machine boot,
137+TDX verifies all boot-time present logical CPUs are TDX compatible before
138+enabling TDX. A non-buggy BIOS should never support hot-add/removal of
139+physical CPU. Currently the kernel doesn't handle physical CPU hotplug,
140+but depends on the BIOS to behave correctly.
141+
142+Note TDX works with CPU logical online/offline, thus the kernel still
143+allows to offline logical CPU and online it again.
144+
145+Kexec()
146+~~~~~~~
147+
148+TDX host support currently lacks the ability to handle kexec. For
149+simplicity only one of them can be enabled in the Kconfig. This will be
150+fixed in the future.
151+
152+Erratum
153+~~~~~~~
154+
155+The first few generations of TDX hardware have an erratum. A partial
156+write to a TDX private memory cacheline will silently "poison" the
157+line. Subsequent reads will consume the poison and generate a machine
158+check.
159+
160+A partial write is a memory write where a write transaction of less than
161+cacheline lands at the memory controller. The CPU does these via
162+non-temporal write instructions (like MOVNTI), or through UC/WC memory
163+mappings. Devices can also do partial writes via DMA.
164+
165+Theoretically, a kernel bug could do partial write to TDX private memory
166+and trigger unexpected machine check. What's more, the machine check
167+code will present these as "Hardware error" when they were, in fact, a
168+software-triggered issue. But in the end, this issue is hard to trigger.
169+
170+If the platform has such erratum, the kernel prints additional message in
171+machine check handler to tell user the machine check may be caused by
172+kernel bug on TDX private memory.
173+
174+Interaction vs S3 and deeper states
175+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
176+
177+TDX cannot survive from S3 and deeper states. The hardware resets and
178+disables TDX completely when platform goes to S3 and deeper. Both TDX
179+guests and the TDX module get destroyed permanently.
180+
181+The kernel uses S3 for suspend-to-ram, and use S4 and deeper states for
182+hibernation. Currently, for simplicity, the kernel chooses to make TDX
183+mutually exclusive with S3 and hibernation.
184+
185+The kernel disables TDX during early boot when hibernation support is
186+available::
187+
188+ [..] virt/tdx: initialization failed: Hibernation support is enabled
189+
190+Add 'nohibernate' kernel command line to disable hibernation in order to
191+use TDX.
192+
193+ACPI S3 is disabled during kernel early boot if TDX is enabled. The user
194+needs to turn off TDX in the BIOS in order to use S3.
195+
196+TDX Guest Support
197+=================
13198 Since the host cannot directly access guest registers or memory, much
14199 normal functionality of a hypervisor must be moved into the guest. This is
15200 implemented using a Virtualization Exception (#VE) that is handled by the
@@ -20,7 +205,7 @@ TDX includes new hypercall-like mechanisms for communicating from the · 4 unmodified lines
20205 guest to the hypervisor or the TDX module.
21206
22207 New TDX Exceptions
23−==================
208+------------------
24209
25210 TDX guests behave differently from bare-metal and traditional VMX guests.
26211 In TDX guests, otherwise normal instructions or memory accesses can cause
@@ -30,7 +215,7 @@ Instructions marked with an '*' conditionally cause exceptions. The · 3 unmodified lines
30215 details for these instructions are discussed below.
31216
32217 Instruction-based #VE
33−---------------------
218+~~~~~~~~~~~~~~~~~~~~~
34219
35220 - Port I/O (INS, OUTS, IN, OUT)
36221 - HLT
@@ -41,7 +226,7 @@ Instruction-based #VE · 4 unmodified lines
41226 - CPUID*
42227
43228 Instruction-based #GP
44−---------------------
229+~~~~~~~~~~~~~~~~~~~~~
45230
46231 - All VMX instructions: INVEPT, INVVPID, VMCLEAR, VMFUNC, VMLAUNCH,
47232 VMPTRLD, VMPTRST, VMREAD, VMRESUME, VMWRITE, VMXOFF, VMXON
@@ -52,7 +237,7 @@ Instruction-based #GP · 4 unmodified lines
52237 - RDMSR*,WRMSR*
53238
54239 RDMSR/WRMSR Behavior
55−--------------------
240+~~~~~~~~~~~~~~~~~~~~
56241
57242 MSR access behavior falls into three categories:
58243
@@ -73,7 +258,7 @@ trapping and handling in the TDX module. Other than possibly being slow, · 14 unmodified lines
73258 these MSRs appear to function just as they would on bare metal.
74259
75260 CPUID Behavior
76−--------------
261+~~~~~~~~~~~~~~
77262
78263 For some CPUID leaves and sub-leaves, the virtualized bit fields of CPUID
79264 return values (in guest EAX/EBX/ECX/EDX) are configurable by the
@@ -93,7 +278,7 @@ not know how to handle. The guest kernel may ask the hypervisor for the · 13 unmodified lines
93278 value with a hypercall.
94279
95280 #VE on Memory Accesses
96−======================
281+----------------------
97282
98283 There are essentially two classes of TDX memory: private and shared.
99284 Private memory receives full TDX protections. Its content is protected
@@ -107,7 +292,7 @@ entries. This helps ensure that a guest does not place sensitive · 7 unmodified lines
107292 information in shared memory, exposing it to the untrusted hypervisor.
108293
109294 #VE on Shared Memory
110−--------------------
295+~~~~~~~~~~~~~~~~~~~~
111296
112297 Access to shared mappings can cause a #VE. The hypervisor ultimately
113298 controls whether a shared memory access causes a #VE, so the guest must be
@@ -127,7 +312,7 @@ be careful not to access device MMIO regions unless it is also prepared to · 13 unmodified lines
127312 handle a #VE.
128313
129314 #VE on Private Pages
130−--------------------
315+~~~~~~~~~~~~~~~~~~~~
131316
132317 An access to private mappings can also cause a #VE. Since all kernel
133318 memory is also private memory, the kernel might theoretically need to
@@ -145,7 +330,7 @@ The hypervisor is permitted to unilaterally move accepted pages to a · 11 unmodified lines
145330 to handle the exception.
146331
147332 Linux #VE handler
148−=================
333+-----------------
149334
150335 Just like page faults or #GP's, #VE exceptions can be either handled or be
151336 fatal. Typically, an unhandled userspace #VE results in a SIGSEGV.
@@ -167,7 +352,7 @@ While the block is in place, any #VE is elevated to a double fault (#DF) · 15 unmodified lines
167352 which is not recoverable.
168353
169354 MMIO handling
170−=============
355+-------------
171356
172357 In non-TDX VMs, MMIO is usually implemented by giving a guest access to a
173358 mapping which will cause a VMEXIT on access, and then the hypervisor
@@ -189,7 +374,7 @@ MMIO access via other means (like structure overlays) may result in an · 15 unmodified lines
189374 oops.
190375
191376 Shared Memory Conversions
192−=========================
377+-------------------------
193378
194379 All TDX guest memory starts out as private at boot. This memory can not
195380 be accessed by the hypervisor. However, some kernel users like device
Documentation/arch/xtensa/features.rst+1−1
@@ -1,3 +1,3 @@
11 .. SPDX-License-Identifier: GPL-2.0
22
3−.. kernel-feat:: $srctree/Documentation/features xtensa
3+.. kernel-feat:: features xtensa
Documentation/block/ioprio.rst+6−7
@@ -6,17 +6,16 @@ Block io priorities · 5 unmodified lines
66 Intro
77 -----
88
9−With the introduction of cfq v3 (aka cfq-ts or time sliced cfq), basic io
10−priorities are supported for reads on files. This enables users to io nice
11−processes or process groups, similar to what has been possible with cpu
12−scheduling for ages. This document mainly details the current possibilities
13−with cfq; other io schedulers do not support io priorities thus far.
9+The io priority feature enables users to io nice processes or process groups,
10+similar to what has been possible with cpu scheduling for ages. Support for io
11+priorities is io scheduler dependent and currently supported by bfq and
12+mq-deadline.
1413
1514 Scheduling classes
1615 ------------------
1716
18−CFQ implements three generic scheduling classes that determine how io is
19−served for a process.
17+Three generic scheduling classes are implemented for io priorities that
18+determine how io is served for a process.
2019
2120 IOPRIO_CLASS_RT: This is the realtime io class. This scheduling class is given
2221 higher priority than any other in the system, processes from this class are
Documentation/bpf/btf.rst+2−4
@@ -272,10 +272,8 @@ In this case, if the base type is an int type, it must be a regular int type: · 271 unmodified lines
272272 * ``BTF_INT_OFFSET()`` must be 0.
273273 * ``BTF_INT_BITS()`` must be equal to ``{1,2,4,8,16} * 8``.
274274
275−The following kernel patch introduced ``kind_flag`` and explained why both
276−modes exist:
277−
278− https://github.com/torvalds/linux/commit/9d5f9f701b1891466fb3dbb1806ad97716f95cc3#diff-fa650a64fdd3968396883d2fe8215ff3
275+Commit 9d5f9f701b18 introduced ``kind_flag`` and explains why both modes
276+exist.
279277
280278 2.2.6 BTF_KIND_ENUM
281279 ~~~~~~~~~~~~~~~~~~~
Documentation/bpf/cpumasks.rst+1−1
@@ -352,7 +352,7 @@ can be used to query the contents of cpumasks. · 351 unmodified lines
352352
353353 .. kernel-doc:: kernel/bpf/cpumask.c
354354 :identifiers: bpf_cpumask_first bpf_cpumask_first_zero bpf_cpumask_first_and
355− bpf_cpumask_test_cpu
355+ bpf_cpumask_test_cpu bpf_cpumask_weight
356356
357357 .. kernel-doc:: kernel/bpf/cpumask.c
358358 :identifiers: bpf_cpumask_equal bpf_cpumask_intersects bpf_cpumask_subset
Documentation/bpf/fs_kfuncs.rst+21−0
@@ -0,0 +1,21 @@
1+.. SPDX-License-Identifier: GPL-2.0
2+
3+.. _fs_kfuncs-header-label:
4+
5+=====================
6+BPF filesystem kfuncs
7+=====================
8+
9+BPF LSM programs need to access filesystem data from LSM hooks. The following
10+BPF kfuncs can be used to get these data.
11+
12+ * ``bpf_get_file_xattr()``
13+
14+ * ``bpf_get_fsverity_digest()``
15+
16+To avoid recursions, these kfuncs follow the following rules:
17+
18+1. These kfuncs are only permitted from BPF LSM function.
19+2. These kfuncs should not call into other LSM hooks, i.e. security_*(). For
20+ example, ``bpf_get_file_xattr()`` does not use ``vfs_getxattr()``, because
21+ the latter calls LSM hook ``security_inode_getxattr``.
Documentation/bpf/index.rst+1−0
@@ -21,6 +21,7 @@ that goes into great technical depth about the BPF Architecture. · 20 unmodified lines
2121 helpers
2222 kfuncs
2323 cpumasks
24+ fs_kfuncs
2425 programs
2526 maps
2627 bpf_prog_run
Documentation/bpf/kfuncs.rst+24−0
@@ -135,6 +135,30 @@ Either way, the returned buffer is either NULL, or of size buffer_szk. Without t · 134 unmodified lines
135135 annotation, the verifier will reject the program if a null pointer is passed in with
136136 a nonzero size.
137137
138+2.2.5 __str Annotation
139+----------------------------
140+This annotation is used to indicate that the argument is a constant string.
141+
142+An example is given below::
143+
144+ __bpf_kfunc bpf_get_file_xattr(..., const char *name__str, ...)
145+ {
146+ ...
147+ }
148+
149+In this case, ``bpf_get_file_xattr()`` can be called as::
150+
151+ bpf_get_file_xattr(..., "xattr_name", ...);
152+
153+Or::
154+
155+ const char name[] = "xattr_name"; /* This need to be global */
156+ int BPF_PROG(...)
157+ {
158+ ...
159+ bpf_get_file_xattr(..., name, ...);
160+ ...
161+ }
138162
139163 .. _BPF_kfunc_nodef:
140164
Documentation/conf.py+7−2
@@ -47,7 +47,7 @@ from load_config import loadConfig · 46 unmodified lines
4747 # -- General configuration ------------------------------------------------
4848
4949 # If your documentation needs a minimal Sphinx version, state it here.
50−needs_sphinx = '1.7'
50+needs_sphinx = '2.4.4'
5151
5252 # Add any Sphinx extension module names here, as strings. They can be
5353 # extensions coming with Sphinx (named 'sphinx.ext.*') or your custom
@@ -55,7 +55,7 @@ needs_sphinx = '1.7' · 1 unmodified line
5555 extensions = ['kerneldoc', 'rstFlatTable', 'kernel_include',
5656 'kfigure', 'sphinx.ext.ifconfig', 'automarkup',
5757 'maintainers_include', 'sphinx.ext.autosectionlabel',
58− 'kernel_abi', 'kernel_feat']
58+ 'kernel_abi', 'kernel_feat', 'translations']
5959
6060 if major >= 3:
6161 if (major > 3) or (minor > 0 or patch >= 2):
@@ -106,6 +106,7 @@ if major >= 3: · 44 unmodified lines
106106 "__weak",
107107 "noinline",
108108 "__fix_address",
109+ "__counted_by",
109110
110111 # include/linux/memblock.h:
111112 "__init_memblock",
@@ -357,6 +358,10 @@ html_sidebars = { '**': ['searchbox.html', 'kernel-toc.html', 'sourcelink.html'] · 245 unmodified lines
357358 if html_theme == 'alabaster':
358359 html_sidebars['**'].insert(0, 'about.html')
359360
361+# The name of an image file (relative to this directory) to place at the top
362+# of the sidebar.
363+html_logo = 'images/logo.svg'
364+
360365 # Output file base name for HTML help builder.
361366 htmlhelp_basename = 'TheLinuxKerneldoc'
362367
Documentation/core-api/dma-api-howto.rst+1−1
@@ -8,7 +8,7 @@ Dynamic DMA mapping Guide · 7 unmodified lines
88
99 This is a guide to device driver writers on how to use the DMA API
1010 with example pseudo-code. For a concise description of the API, see
11−DMA-API.txt.
11+Documentation/core-api/dma-api.rst.
1212
1313 CPU and DMA addresses
1414 =====================
Documentation/core-api/dma-api.rst+1−1
@@ -448,7 +448,7 @@ DMA address entries returned. · 447 unmodified lines
448448
449449 Synchronise a single contiguous or scatter/gather mapping for the CPU
450450 and device. With the sync_sg API, all the parameters must be the same
451−as those passed into the single mapping API. With the sync_single API,
451+as those passed into the sg mapping API. With the sync_single API,
452452 you can use dma_handle and size parameters that aren't identical to
453453 those passed into the single mapping API to do a partial sync.
454454
Documentation/core-api/maple_tree.rst+4−0
@@ -81,6 +81,9 @@ section. · 80 unmodified lines
8181 Sometimes it is necessary to ensure the next call to store to a maple tree does
8282 not allocate memory, please see :ref:`maple-tree-advanced-api` for this use case.
8383
84+You can use mtree_dup() to duplicate an entire maple tree. It is a more
85+efficient way than inserting all elements one by one into a new tree.
86+
8487 Finally, you can remove all entries from a maple tree by calling
8588 mtree_destroy(). If the maple tree entries are pointers, you may wish to free
8689 the entries first.
@@ -112,6 +115,7 @@ Takes ma_lock internally: · 25 unmodified lines
112115 * mtree_insert()
113116 * mtree_insert_range()
114117 * mtree_erase()
118+ * mtree_dup()
115119 * mtree_destroy()
116120 * mt_set_in_rcu()
117121 * mt_clear_in_rcu()
Documentation/core-api/mm-api.rst+1−1
@@ -37,7 +37,7 @@ The Slab Cache · 36 unmodified lines
3737 .. kernel-doc:: include/linux/slab.h
3838 :internal:
3939
40−.. kernel-doc:: mm/slab.c
40+.. kernel-doc:: mm/slub.c
4141 :export:
4242
4343 .. kernel-doc:: mm/slab_common.c
Documentation/core-api/workqueue.rst+2−2
@@ -379,7 +379,7 @@ Workqueue currently supports the following affinity scopes. · 378 unmodified lines
379379 cases. This is the default affinity scope.
380380
381381 ``numa``
382− CPUs are grouped according to NUMA bounaries.
382+ CPUs are grouped according to NUMA boundaries.
383383
384384 ``system``
385385 All CPUs are put in the same group. Workqueue makes no effort to process a
@@ -446,7 +446,7 @@ The command used: :: · 60 unmodified lines
446446
447447 There are 24 issuers, each issuing 64 IOs concurrently. ``--verify=sha512``
448448 makes ``fio`` generate and read back the content each time which makes
449−execution locality matter between the issuer and ``kcryptd``. The followings
449+execution locality matter between the issuer and ``kcryptd``. The following
450450 are the read bandwidths and CPU utilizations depending on different affinity
451451 scope settings on ``kcryptd`` measured over five runs. Bandwidths are in
452452 MiBps, and CPU util in percents.
Documentation/crypto/api.rst+1−4
@@ -1,11 +1,8 @@
11 Programming Interface
22 =====================
33
4−.. class:: toc-title
5−
6− Table of contents
7−
84 .. toctree::
5+ :caption: Table of contents
96 :maxdepth: 2
107
118 api-skcipher
Documentation/crypto/device_drivers/index.rst+9−0
@@ -0,0 +1,9 @@
1+.. SPDX-License-Identifier: GPL-2.0
2+
3+Hardware Device Driver Specific Documentation
4+---------------------------------------------
5+
6+.. toctree::
7+ :maxdepth: 1
8+
9+ octeontx2
Documentation/crypto/device_drivers/octeontx2.rst+25−0
@@ -0,0 +1,25 @@
1+.. SPDX-License-Identifier: GPL-2.0
2+
3+=========================
4+octeontx2 devlink support
5+=========================
6+
7+This document describes the devlink features implemented by the ``octeontx2 CPT``
8+device drivers.
9+
10+Parameters
11+==========
12+
13+The ``octeontx2`` driver implements the following driver-specific parameters.
14+
15+.. list-table:: Driver-specific parameters implemented
16+ :widths: 5 5 5 85
17+
18+ * - Name
19+ - Type
20+ - Mode
21+ - Description
22+ * - ``t106_mode``
23+ - u8
24+ - runtime
25+ - Used to configure CN10KA B0/CN10KB CPT to work as CN10KA A0/A1.
Documentation/crypto/index.rst+2−4
@@ -9,11 +9,8 @@ This documentation outlines the Linux kernel crypto API with its · 8 unmodified lines
99 concepts, details about developing cipher implementations, employment of the API
1010 for cryptographic use cases, as well as programming examples.
1111
12−.. class:: toc-title
13−
14− Table of contents
15−
1612 .. toctree::
13+ :caption: Table of contents
1714 :maxdepth: 2
1815
1916 intro
@@ -28,3 +25,4 @@ for cryptographic use cases, as well as programming examples. · 8 unmodified lines
2825 api
2926 api-samples
3027 descore-readme
28+ device_drivers/index
Documentation/dev-tools/checkuapi.rst+477−0
@@ -0,0 +1,477 @@
1+.. SPDX-License-Identifier: GPL-2.0-only
2+
3+============
4+UAPI Checker
5+============
6+
7+The UAPI checker (``scripts/check-uapi.sh``) is a shell script which
8+checks UAPI header files for userspace backwards-compatibility across
9+the git tree.
10+
11+Options
12+=======
13+
14+This section will describe the options with which ``check-uapi.sh``
15+can be run.
16+
17+Usage::
18+
19+ check-uapi.sh [-b BASE_REF] [-p PAST_REF] [-j N] [-l ERROR_LOG] [-i] [-q] [-v]
20+
21+Available options::
22+
23+ -b BASE_REF Base git reference to use for comparison. If unspecified or empty,
24+ will use any dirty changes in tree to UAPI files. If there are no
25+ dirty changes, HEAD will be used.
26+ -p PAST_REF Compare BASE_REF to PAST_REF (e.g. -p v6.1). If unspecified or empty,
27+ will use BASE_REF^1. Must be an ancestor of BASE_REF. Only headers
28+ that exist on PAST_REF will be checked for compatibility.
29+ -j JOBS Number of checks to run in parallel (default: number of CPU cores).
30+ -l ERROR_LOG Write error log to file (default: no error log is generated).
31+ -i Ignore ambiguous changes that may or may not break UAPI compatibility.
32+ -q Quiet operation.
33+ -v Verbose operation (print more information about each header being checked).
34+
35+Environmental args::
36+
37+ ABIDIFF Custom path to abidiff binary
38+ CC C compiler (default is "gcc")
39+ ARCH Target architecture of C compiler (default is host arch)
40+
41+Exit codes::
42+
43+ 0) Success
44+ 1) ABI difference detected
45+ 2) Prerequisite not met
46+
47+Examples
48+========
49+
50+Basic Usage
51+-----------
52+
53+First, let's try making a change to a UAPI header file that obviously
54+won't break userspace::
55+
56+ cat << 'EOF' | patch -l -p1
57+ --- a/include/uapi/linux/acct.h
58+ +++ b/include/uapi/linux/acct.h
59+ @@ -21,7 +21,9 @@
60+ #include <asm/param.h>
61+ #include <asm/byteorder.h>
62+
63+ -/*
64+ +#define FOO
65+ +
66+ +/*
67+ * comp_t is a 16-bit "floating" point number with a 3-bit base 8
68+ * exponent and a 13-bit fraction.
69+ * comp2_t is 24-bit with 5-bit base 2 exponent and 20 bit fraction
70+ diff --git a/include/uapi/linux/bpf.h b/include/uapi/linux/bpf.h
71+ EOF
72+
73+Now, let's use the script to validate::
74+
75+ % ./scripts/check-uapi.sh
76+ Installing user-facing UAPI headers from dirty tree... OK
77+ Installing user-facing UAPI headers from HEAD... OK
78+ Checking changes to UAPI headers between HEAD and dirty tree...
79+ All 912 UAPI headers compatible with x86 appear to be backwards compatible
80+
81+Let's add another change that *might* break userspace::
82+
83+ cat << 'EOF' | patch -l -p1
84+ --- a/include/uapi/linux/bpf.h
85+ +++ b/include/uapi/linux/bpf.h
86+ @@ -74,7 +74,7 @@ struct bpf_insn {
87+ __u8 dst_reg:4; /* dest register */
88+ __u8 src_reg:4; /* source register */
89+ __s16 off; /* signed offset */
90+ - __s32 imm; /* signed immediate constant */
91+ + __u32 imm; /* unsigned immediate constant */
92+ };
93+
94+ /* Key of an a BPF_MAP_TYPE_LPM_TRIE entry */
95+ EOF
96+
97+The script will catch this::
98+
99+ % ./scripts/check-uapi.sh
100+ Installing user-facing UAPI headers from dirty tree... OK
101+ Installing user-facing UAPI headers from HEAD... OK
102+ Checking changes to UAPI headers between HEAD and dirty tree...
103+ ==== ABI differences detected in include/linux/bpf.h from HEAD -> dirty tree ====
104+ [C] 'struct bpf_insn' changed:
105+ type size hasn't changed
106+ 1 data member change:
107+ type of '__s32 imm' changed:
108+ typedef name changed from __s32 to __u32 at int-ll64.h:27:1
109+ underlying type 'int' changed:
110+ type name changed from 'int' to 'unsigned int'
111+ type size hasn't changed
112+ ==================================================================================
113+
114+ error - 1/912 UAPI headers compatible with x86 appear _not_ to be backwards compatible
115+
116+In this case, the script is reporting the type change because it could
117+break a userspace program that passes in a negative number. Now, let's
118+say you know that no userspace program could possibly be using a negative
119+value in ``imm``, so changing to an unsigned type there shouldn't hurt
120+anything. You can pass the ``-i`` flag to the script to ignore changes
121+in which the userspace backwards compatibility is ambiguous::
122+
123+ % ./scripts/check-uapi.sh -i
124+ Installing user-facing UAPI headers from dirty tree... OK
125+ Installing user-facing UAPI headers from HEAD... OK
126+ Checking changes to UAPI headers between HEAD and dirty tree...
127+ All 912 UAPI headers compatible with x86 appear to be backwards compatible
128+
129+Now, let's make a similar change that *will* break userspace::
130+
131+ cat << 'EOF' | patch -l -p1
132+ --- a/include/uapi/linux/bpf.h
133+ +++ b/include/uapi/linux/bpf.h
134+ @@ -71,8 +71,8 @@ enum {
135+
136+ struct bpf_insn {
137+ __u8 code; /* opcode */
138+ - __u8 dst_reg:4; /* dest register */
139+ __u8 src_reg:4; /* source register */
140+ + __u8 dst_reg:4; /* dest register */
141+ __s16 off; /* signed offset */
142+ __s32 imm; /* signed immediate constant */
143+ };
144+ EOF
145+
146+Since we're re-ordering an existing struct member, there's no ambiguity,
147+and the script will report the breakage even if you pass ``-i``::
148+
149+ % ./scripts/check-uapi.sh -i
150+ Installing user-facing UAPI headers from dirty tree... OK
151+ Installing user-facing UAPI headers from HEAD... OK
152+ Checking changes to UAPI headers between HEAD and dirty tree...
153+ ==== ABI differences detected in include/linux/bpf.h from HEAD -> dirty tree ====
154+ [C] 'struct bpf_insn' changed:
155+ type size hasn't changed
156+ 2 data member changes:
157+ '__u8 dst_reg' offset changed from 8 to 12 (in bits) (by +4 bits)
158+ '__u8 src_reg' offset changed from 12 to 8 (in bits) (by -4 bits)
159+ ==================================================================================
160+
161+ error - 1/912 UAPI headers compatible with x86 appear _not_ to be backwards compatible
162+
163+Let's commit the breaking change, then commit the innocuous change::
164+
165+ % git commit -m 'Breaking UAPI change' include/uapi/linux/bpf.h
166+ [detached HEAD f758e574663a] Breaking UAPI change
167+ 1 file changed, 1 insertion(+), 1 deletion(-)
168+ % git commit -m 'Innocuous UAPI change' include/uapi/linux/acct.h
169+ [detached HEAD 2e87df769081] Innocuous UAPI change
170+ 1 file changed, 3 insertions(+), 1 deletion(-)
171+
172+Now, let's run the script again with no arguments::
173+
174+ % ./scripts/check-uapi.sh
175+ Installing user-facing UAPI headers from HEAD... OK
176+ Installing user-facing UAPI headers from HEAD^1... OK
177+ Checking changes to UAPI headers between HEAD^1 and HEAD...
178+ All 912 UAPI headers compatible with x86 appear to be backwards compatible
179+
180+It doesn't catch any breaking change because, by default, it only
181+compares ``HEAD`` to ``HEAD^1``. The breaking change was committed on
182+``HEAD~2``. If we wanted the search scope to go back further, we'd have to
183+use the ``-p`` option to pass a different past reference. In this case,
184+let's pass ``-p HEAD~2`` to the script so it checks UAPI changes between
185+``HEAD~2`` and ``HEAD``::
186+
187+ % ./scripts/check-uapi.sh -p HEAD~2
188+ Installing user-facing UAPI headers from HEAD... OK
189+ Installing user-facing UAPI headers from HEAD~2... OK
190+ Checking changes to UAPI headers between HEAD~2 and HEAD...
191+ ==== ABI differences detected in include/linux/bpf.h from HEAD~2 -> HEAD ====
192+ [C] 'struct bpf_insn' changed:
193+ type size hasn't changed
194+ 2 data member changes:
195+ '__u8 dst_reg' offset changed from 8 to 12 (in bits) (by +4 bits)
196+ '__u8 src_reg' offset changed from 12 to 8 (in bits) (by -4 bits)
197+ ==============================================================================
198+
199+ error - 1/912 UAPI headers compatible with x86 appear _not_ to be backwards compatible
200+
201+Alternatively, we could have also run with ``-b HEAD~``. This would set the
202+base reference to ``HEAD~`` so then the script would compare it to ``HEAD~^1``.
203+
204+Architecture-specific Headers
205+-----------------------------
206+
207+Consider this change::
208+
209+ cat << 'EOF' | patch -l -p1
210+ --- a/arch/arm64/include/uapi/asm/sigcontext.h
211+ +++ b/arch/arm64/include/uapi/asm/sigcontext.h
212+ @@ -70,6 +70,7 @@ struct sigcontext {
213+ struct _aarch64_ctx {
214+ __u32 magic;
215+ __u32 size;
216+ + __u32 new_var;
217+ };
218+
219+ #define FPSIMD_MAGIC 0x46508001
220+ EOF
221+
222+This is a change to an arm64-specific UAPI header file. In this example, I'm
223+running the script from an x86 machine with an x86 compiler, so, by default,
224+the script only checks x86-compatible UAPI header files::
225+
226+ % ./scripts/check-uapi.sh
227+ Installing user-facing UAPI headers from dirty tree... OK
228+ Installing user-facing UAPI headers from HEAD... OK
229+ No changes to UAPI headers were applied between HEAD and dirty tree
230+
231+With an x86 compiler, we can't check header files in ``arch/arm64``, so the
232+script doesn't even try.
233+
234+If we want to check the header file, we'll have to use an arm64 compiler and
235+set ``ARCH`` accordingly::
236+
237+ % CC=aarch64-linux-gnu-gcc ARCH=arm64 ./scripts/check-uapi.sh
238+ Installing user-facing UAPI headers from dirty tree... OK
239+ Installing user-facing UAPI headers from HEAD... OK
240+ Checking changes to UAPI headers between HEAD and dirty tree...
241+ ==== ABI differences detected in include/asm/sigcontext.h from HEAD -> dirty tree ====
242+ [C] 'struct _aarch64_ctx' changed:
243+ type size changed from 64 to 96 (in bits)
244+ 1 data member insertion:
245+ '__u32 new_var', at offset 64 (in bits) at sigcontext.h:73:1
246+ -- snip --
247+ [C] 'struct zt_context' changed:
248+ type size changed from 128 to 160 (in bits)
249+ 2 data member changes (1 filtered):
250+ '__u16 nregs' offset changed from 64 to 96 (in bits) (by +32 bits)
251+ '__u16 __reserved[3]' offset changed from 80 to 112 (in bits) (by +32 bits)
252+ =======================================================================================
253+
254+ error - 1/884 UAPI headers compatible with arm64 appear _not_ to be backwards compatible
255+
256+We can see with ``ARCH`` and ``CC`` set properly for the file, the ABI
257+change is reported properly. Also notice that the total number of UAPI
258+header files checked by the script changes. This is because the number
259+of headers installed for arm64 platforms is different than x86.
260+
261+Cross-Dependency Breakages
262+--------------------------
263+
264+Consider this change::
265+
266+ cat << 'EOF' | patch -l -p1
267+ --- a/include/uapi/linux/types.h
268+ +++ b/include/uapi/linux/types.h
269+ @@ -52,7 +52,7 @@ typedef __u32 __bitwise __wsum;
270+ #define __aligned_be64 __be64 __attribute__((aligned(8)))
271+ #define __aligned_le64 __le64 __attribute__((aligned(8)))
272+
273+ -typedef unsigned __bitwise __poll_t;
274+ +typedef unsigned short __bitwise __poll_t;
275+
276+ #endif /* __ASSEMBLY__ */
277+ #endif /* _UAPI_LINUX_TYPES_H */
278+ EOF
279+
280+Here, we're changing a ``typedef`` in ``types.h``. This doesn't break
281+a UAPI in ``types.h``, but other UAPIs in the tree may break due to
282+this change::
283+
284+ % ./scripts/check-uapi.sh
285+ Installing user-facing UAPI headers from dirty tree... OK
286+ Installing user-facing UAPI headers from HEAD... OK
287+ Checking changes to UAPI headers between HEAD and dirty tree...
288+ ==== ABI differences detected in include/linux/eventpoll.h from HEAD -> dirty tree ====
289+ [C] 'struct epoll_event' changed:
290+ type size changed from 96 to 80 (in bits)
291+ 2 data member changes:
292+ type of '__poll_t events' changed:
293+ underlying type 'unsigned int' changed:
294+ type name changed from 'unsigned int' to 'unsigned short int'
295+ type size changed from 32 to 16 (in bits)
296+ '__u64 data' offset changed from 32 to 16 (in bits) (by -16 bits)
297+ ========================================================================================
298+ include/linux/eventpoll.h did not change between HEAD and dirty tree...
299+ It's possible a change to one of the headers it includes caused this error:
300+ #include <linux/fcntl.h>
301+ #include <linux/types.h>
302+
303+Note that the script noticed the failing header file did not change,
304+so it assumes one of its includes must have caused the breakage. Indeed,
305+we can see ``linux/types.h`` is used from ``eventpoll.h``.
306+
307+UAPI Header Removals
308+--------------------
309+
310+Consider this change::
311+
312+ cat << 'EOF' | patch -l -p1
313+ diff --git a/include/uapi/asm-generic/Kbuild b/include/uapi/asm-generic/Kbuild
314+ index ebb180aac74e..a9c88b0a8b3b 100644
315+ --- a/include/uapi/asm-generic/Kbuild
316+ +++ b/include/uapi/asm-generic/Kbuild
317+ @@ -31,6 +31,6 @@ mandatory-y += stat.h
318+ mandatory-y += statfs.h
319+ mandatory-y += swab.h
320+ mandatory-y += termbits.h
321+ -mandatory-y += termios.h
322+ +#mandatory-y += termios.h
323+ mandatory-y += types.h
324+ mandatory-y += unistd.h
325+ EOF
326+
327+This script removes a UAPI header file from the install list. Let's run
328+the script::
329+
330+ % ./scripts/check-uapi.sh
331+ Installing user-facing UAPI headers from dirty tree... OK
332+ Installing user-facing UAPI headers from HEAD... OK
333+ Checking changes to UAPI headers between HEAD and dirty tree...
334+ ==== UAPI header include/asm/termios.h was removed between HEAD and dirty tree ====
335+
336+ error - 1/912 UAPI headers compatible with x86 appear _not_ to be backwards compatible
337+
338+Removing a UAPI header is considered a breaking change, and the script
339+will flag it as such.
340+
341+Checking Historic UAPI Compatibility
342+------------------------------------
343+
344+You can use the ``-b`` and ``-p`` options to examine different chunks of your
345+git tree. For example, to check all changed UAPI header files between tags
346+v6.0 and v6.1, you'd run::
347+
348+ % ./scripts/check-uapi.sh -b v6.1 -p v6.0
349+ Installing user-facing UAPI headers from v6.1... OK
350+ Installing user-facing UAPI headers from v6.0... OK
351+ Checking changes to UAPI headers between v6.0 and v6.1...
352+
353+ --- snip ---
354+ error - 37/907 UAPI headers compatible with x86 appear _not_ to be backwards compatible
355+
356+Note: Before v5.3, a header file needed by the script is not present,
357+so the script is unable to check changes before then.
358+
359+You'll notice that the script detected many UAPI changes that are not
360+backwards compatible. Knowing that kernel UAPIs are supposed to be stable
361+forever, this is an alarming result. This brings us to the next section:
362+caveats.
363+
364+Caveats
365+=======
366+
367+The UAPI checker makes no assumptions about the author's intention, so some
368+types of changes may be flagged even though they intentionally break UAPI.
369+
370+Removals For Refactoring or Deprecation
371+---------------------------------------
372+
373+Sometimes drivers for very old hardware are removed, such as in this example::
374+
375+ % ./scripts/check-uapi.sh -b ba47652ba655
376+ Installing user-facing UAPI headers from ba47652ba655... OK
377+ Installing user-facing UAPI headers from ba47652ba655^1... OK
378+ Checking changes to UAPI headers between ba47652ba655^1 and ba47652ba655...
379+ ==== UAPI header include/linux/meye.h was removed between ba47652ba655^1 and ba47652ba655 ====
380+
381+ error - 1/910 UAPI headers compatible with x86 appear _not_ to be backwards compatible
382+
383+The script will always flag removals (even if they're intentional).
384+
385+Struct Expansions
386+-----------------
387+
388+Depending on how a structure is handled in kernelspace, a change which
389+expands a struct could be non-breaking.
390+
391+If a struct is used as the argument to an ioctl, then the kernel driver
392+must be able to handle ioctl commands of any size. Beyond that, you need
393+to be careful when copying data from the user. Say, for example, that
394+``struct foo`` is changed like this::
395+
396+ struct foo {
397+ __u64 a; /* added in version 1 */
398+ + __u32 b; /* added in version 2 */
399+ + __u32 c; /* added in version 2 */
400+ }
401+
402+By default, the script will flag this kind of change for further review::
403+
404+ [C] 'struct foo' changed:
405+ type size changed from 64 to 128 (in bits)
406+ 2 data member insertions:
407+ '__u32 b', at offset 64 (in bits)
408+ '__u32 c', at offset 96 (in bits)
409+
410+However, it is possible that this change was made safely.
411+
412+If a userspace program was built with version 1, it will think
413+``sizeof(struct foo)`` is 8. That size will be encoded in the
414+ioctl value that gets sent to the kernel. If the kernel is built
415+with version 2, it will think the ``sizeof(struct foo)`` is 16.
416+
417+The kernel can use the ``_IOC_SIZE`` macro to get the size encoded
418+in the ioctl code that the user passed in and then use
419+``copy_struct_from_user()`` to safely copy the value::
420+
421+ int handle_ioctl(unsigned long cmd, unsigned long arg)
422+ {
423+ switch _IOC_NR(cmd) {
424+ 0x01: {
425+ struct foo my_cmd; /* size 16 in the kernel */
426+
427+ ret = copy_struct_from_user(&my_cmd, arg, sizeof(struct foo), _IOC_SIZE(cmd));
428+ ...
429+
430+``copy_struct_from_user`` will zero the struct in the kernel and then copy
431+only the bytes passed in from the user (leaving new members zeroized).
432+If the user passed in a larger struct, the extra members are ignored.
433+
434+If you know this situation is accounted for in the kernel code, you can
435+pass ``-i`` to the script, and struct expansions like this will be ignored.
436+
437+Flex Array Migration
438+--------------------
439+
440+While the script handles expansion into an existing flex array, it does
441+still flag initial migration to flex arrays from 1-element fake flex
442+arrays. For example::
443+
444+ struct foo {
445+ __u32 x;
446+ - __u32 flex[1]; /* fake flex */
447+ + __u32 flex[]; /* real flex */
448+ };
449+
450+This change would be flagged by the script::
451+
452+ [C] 'struct foo' changed:
453+ type size changed from 64 to 32 (in bits)
454+ 1 data member change:
455+ type of '__u32 flex[1]' changed:
456+ type name changed from '__u32[1]' to '__u32[]'
457+ array type size changed from 32 to 'unknown'
458+ array type subrange 1 changed length from 1 to 'unknown'
459+
460+At this time, there's no way to filter these types of changes, so be
461+aware of this possible false positive.
462+
463+Summary
464+-------
465+
466+While many types of false positives are filtered out by the script,
467+it's possible there are some cases where the script flags a change
468+which does not break UAPI. It's also possible a change which *does*
469+break userspace would not be flagged by this script. While the script
470+has been run on much of the kernel history, there could still be corner
471+cases that are not accounted for.
472+
473+The intention is for this script to be used as a quick check for
474+maintainers or automated tooling, not as the end-all authority on
475+patch compatibility. It's best to remember: use your best judgment
476+(and ideally a unit test in userspace) to make sure your UAPI changes
477+are backwards-compatible!
Documentation/dev-tools/index.rst+2−4
@@ -10,11 +10,8 @@ whole; patches welcome! · 9 unmodified lines
1010 A brief overview of testing-specific tools can be found in
1111 Documentation/dev-tools/testing-overview.rst
1212
13−.. class:: toc-title
14−
15− Table of contents
16−
1713 .. toctree::
14+ :caption: Table of contents
1815 :maxdepth: 2
1916
2017 testing-overview
@@ -34,6 +31,7 @@ Documentation/dev-tools/testing-overview.rst · 13 unmodified lines
3431 kselftest
3532 kunit/index
3633 ktap
34+ checkuapi
3735
3836
3937 .. only:: subproject and html
Documentation/dev-tools/kunit/api/resource.rst+9−0
@@ -11,3 +11,12 @@ state on a per-test basis, register custom cleanup actions, and more. · 10 unmodified lines
1111
1212 .. kernel-doc:: include/kunit/resource.h
1313 :internal:
14+
15+Managed Devices
16+---------------
17+
18+Functions for using KUnit-managed struct device and struct device_driver.
19+Include ``kunit/device.h`` to use these.
20+
21+.. kernel-doc:: include/kunit/device.h
22+ :internal:
Documentation/dev-tools/kunit/run_manual.rst+47−4
@@ -49,9 +49,52 @@ loaded. · 48 unmodified lines
4949
5050 The results will appear in TAP format in ``dmesg``.
5151
52+debugfs
53+=======
54+
55+KUnit can be accessed from userspace via the debugfs filesystem (See more
56+information about debugfs at Documentation/filesystems/debugfs.rst).
57+
58+If ``CONFIG_KUNIT_DEBUGFS`` is enabled, the KUnit debugfs filesystem is
59+mounted at /sys/kernel/debug/kunit. You can use this filesystem to perform
60+the following actions.
61+
62+Retrieve Test Results
63+=====================
64+
65+You can use debugfs to retrieve KUnit test results. The test results are
66+accessible from the debugfs filesystem in the following read-only file:
67+
68+.. code-block :: bash
69+
70+ /sys/kernel/debug/kunit/<test_suite>/results
71+
72+The test results are printed in a KTAP document. Note this document is separate
73+to the kernel log and thus, may have different test suite numbering.
74+
75+Run Tests After Kernel Has Booted
76+=================================
77+
78+You can use the debugfs filesystem to trigger built-in tests to run after
79+boot. To run the test suite, you can use the following command to write to
80+the ``/sys/kernel/debug/kunit/<test_suite>/run`` file:
81+
82+.. code-block :: bash
83+
84+ echo "any string" > /sys/kernel/debugfs/kunit/<test_suite>/run
85+
86+As a result, the test suite runs and the results are printed to the kernel
87+log.
88+
89+However, this feature is not available with KUnit suites that use init data,
90+because init data may have been discarded after the kernel boots. KUnit
91+suites that use init data should be defined using the
92+kunit_test_init_section_suites() macro.
93+
94+Also, you cannot use this feature to run tests concurrently. Instead a test
95+will wait to run until other tests have completed or failed.
96+
5297 .. note ::
5398
54− If ``CONFIG_KUNIT_DEBUGFS`` is enabled, KUnit test results will
55− be accessible from the ``debugfs`` filesystem (if mounted).
56− They will be in ``/sys/kernel/debug/kunit/<test_suite>/results``, in
57− TAP format.
99+ For test authors, to use this feature, tests will need to correctly initialise
100+ and/or clean up any data, so the test runs correctly a second time.
Documentation/dev-tools/kunit/running_tips.rst+18−0
@@ -139,6 +139,17 @@ If your installed version of gcc doesn't work, you can tweak the steps: · 138 unmodified lines
139139 $ ./tools/testing/kunit/kunit.py run --make_options=CC=/usr/bin/gcc-6
140140 $ lcov -t "my_kunit_tests" -o coverage.info -c -d .kunit/ --gcov-tool=/usr/bin/gcov-6
141141
142+Alternatively, LLVM-based toolchains can also be used:
143+
144+.. code-block:: bash
145+
146+ # Build with LLVM and append coverage options to the current config
147+ $ ./tools/testing/kunit/kunit.py run --make_options LLVM=1 --kunitconfig=.kunit/ --kunitconfig=tools/testing/kunit/configs/coverage_uml.config
148+ $ llvm-profdata merge -sparse default.profraw -o default.profdata
149+ $ llvm-cov export --format=lcov .kunit/vmlinux -instr-profile default.profdata > coverage.info
150+ # The coverage.info file is in lcov-compatible format and it can be used to e.g. generate HTML report
151+ $ genhtml -o /tmp/coverage_html coverage.info
152+
142153
143154 Running tests manually
144155 ======================
@@ -428,3 +439,10 @@ This attribute indicates the name of the module associated with the test. · 283 unmodified lines
428439
429440 This attribute is automatically saved as a string and is printed for each suite.
430441 Tests can also be filtered using this attribute.
442+
443+``is_init``
444+
445+This attribute indicates whether the test uses init data or functions.
446+
447+This attribute is automatically saved as a boolean and tests can also be
448+filtered using this attribute.
Documentation/dev-tools/kunit/usage.rst+61−11
@@ -566,13 +566,9 @@ By reusing the same ``cases`` array from above, we can write the test as a · 565 unmodified lines
566566 },
567567 };
568568
569− // Need a helper function to generate a name for each test case.
570− static void case_to_desc(const struct sha1_test_case *t, char *desc)
571− {
572− strcpy(desc, t->str);
573− }
574− // Creates `sha1_gen_params()` to iterate over `cases`.
575− KUNIT_ARRAY_PARAM(sha1, cases, case_to_desc);
569+ // Creates `sha1_gen_params()` to iterate over `cases` while using
570+ // the struct member `str` for the case description.
571+ KUNIT_ARRAY_PARAM_DESC(sha1, cases, str);
576572
577573 // Looks no different from a normal test.
578574 static void sha1_test(struct kunit *test)
@@ -588,7 +584,7 @@ By reusing the same ``cases`` array from above, we can write the test as a · 9 unmodified lines
588584 }
589585
590586 // Instead of KUNIT_CASE, we use KUNIT_CASE_PARAM and pass in the
591− // function declared by KUNIT_ARRAY_PARAM.
587+ // function declared by KUNIT_ARRAY_PARAM or KUNIT_ARRAY_PARAM_DESC.
592588 static struct kunit_case sha1_test_cases[] = {
593589 KUNIT_CASE_PARAM(sha1_test, sha1_gen_params),
594590 {}
@@ -651,12 +647,16 @@ For example: · 56 unmodified lines
651647 }
652648
653649 Note that, for functions like device_unregister which only accept a single
654−pointer-sized argument, it's possible to directly cast that function to
655−a ``kunit_action_t`` rather than writing a wrapper function, for example:
650+pointer-sized argument, it's possible to automatically generate a wrapper
651+with the ``KUNIT_DEFINE_ACTION_WRAPPER()`` macro, for example:
656652
657653 .. code-block:: C
658654
659− kunit_add_action(test, (kunit_action_t *)&device_unregister, &dev);
655+ KUNIT_DEFINE_ACTION_WRAPPER(device_unregister, device_unregister_wrapper, struct device *);
656+ kunit_add_action(test, &device_unregister_wrapper, &dev);
657+
658+You should do this in preference to manually casting to the ``kunit_action_t`` type,
659+as casting function pointers will break Control Flow Integrity (CFI).
660660
661661 ``kunit_add_action`` can fail if, for example, the system is out of memory.
662662 You can use ``kunit_add_action_or_reset`` instead which runs the action
@@ -793,3 +793,53 @@ structures as shown below: · 130 unmodified lines
793793 KUnit is not enabled, or if no test is running in the current task, it will do
794794 nothing. This compiles down to either a no-op or a static key check, so will
795795 have a negligible performance impact when no test is running.
796+
797+Managing Fake Devices and Drivers
798+---------------------------------
799+
800+When testing drivers or code which interacts with drivers, many functions will
801+require a ``struct device`` or ``struct device_driver``. In many cases, setting
802+up a real device is not required to test any given function, so a fake device
803+can be used instead.
804+
805+KUnit provides helper functions to create and manage these fake devices, which
806+are internally of type ``struct kunit_device``, and are attached to a special
807+``kunit_bus``. These devices support managed device resources (devres), as
808+described in Documentation/driver-api/driver-model/devres.rst
809+
810+To create a KUnit-managed ``struct device_driver``, use ``kunit_driver_create()``,
811+which will create a driver with the given name, on the ``kunit_bus``. This driver
812+will automatically be destroyed when the corresponding test finishes, but can also
813+be manually destroyed with ``driver_unregister()``.
814+
815+To create a fake device, use the ``kunit_device_register()``, which will create
816+and register a device, using a new KUnit-managed driver created with ``kunit_driver_create()``.
817+To provide a specific, non-KUnit-managed driver, use ``kunit_device_register_with_driver()``
818+instead. Like with managed drivers, KUnit-managed fake devices are automatically
819+cleaned up when the test finishes, but can be manually cleaned up early with
820+``kunit_device_unregister()``.
821+
822+The KUnit devices should be used in preference to ``root_device_register()``, and
823+instead of ``platform_device_register()`` in cases where the device is not otherwise
824+a platform device.
825+
826+For example:
827+
828+.. code-block:: c
829+
830+ #include <kunit/device.h>
831+
832+ static void test_my_device(struct kunit *test)
833+ {
834+ struct device *fake_device;
835+ const char *dev_managed_string;
836+
837+ // Create a fake device.
838+ fake_device = kunit_device_register(test, "my_device");
839+ KUNIT_ASSERT_NOT_ERR_OR_NULL(test, fake_device)
840+
841+ // Pass it to functions which need a device.
842+ dev_managed_string = devm_kstrdup(fake_device, "Hello, World!");
843+
844+ // Everything is cleaned up automatically when the test ends.
845+ }
Documentation/devicetree/bindings/Makefile+1−1
@@ -28,7 +28,7 @@ $(obj)/%.example.dts: $(src)/%.yaml check_dtschema_version FORCE · 27 unmodified lines
2828 find_all_cmd = find $(srctree)/$(src) \( -name '*.yaml' ! \
2929 -name 'processed-schema*' \)
3030
31−find_cmd = $(find_all_cmd) | grep -F -e "$(subst :," -e ",$(DT_SCHEMA_FILES))"
31+find_cmd = $(find_all_cmd) | sed 's|^$(srctree)/$(src)/||' | grep -F -e "$(subst :," -e ",$(DT_SCHEMA_FILES))" | sed 's|^|$(srctree)/$(src)/|'
3232 CHK_DT_DOCS := $(shell $(find_cmd))
3333
3434 quiet_cmd_yamllint = LINT $(src)
Documentation/devicetree/bindings/arm/calxeda/l2ecc.yaml+1−1
@@ -16,7 +16,7 @@ maintainers: · 15 unmodified lines
1616
1717 properties:
1818 compatible:
19− const: "calxeda,hb-sregs-l2-ecc"
19+ const: calxeda,hb-sregs-l2-ecc
2020
2121 reg:
2222 maxItems: 1
Documentation/devicetree/bindings/arm/cpus.yaml+1−0
@@ -198,6 +198,7 @@ properties: · 197 unmodified lines
198198 - qcom,kryo660
199199 - qcom,kryo685
200200 - qcom,kryo780
201+ - qcom,oryon
201202 - qcom,scorpion
202203
203204 enable-method:
Documentation/devicetree/bindings/arm/fsl.yaml+21−1
@@ -967,6 +967,7 @@ properties: · 966 unmodified lines
967967 - menlo,mx8menlo # Verdin iMX8M Mini Module on i.MX8MM Menlo board
968968 - toradex,verdin-imx8mm-nonwifi-dahlia # Verdin iMX8M Mini Module on Dahlia
969969 - toradex,verdin-imx8mm-nonwifi-dev # Verdin iMX8M Mini Module on Verdin Development Board
970+ - toradex,verdin-imx8mm-nonwifi-mallow # Verdin iMX8M Mini Module on Mallow
970971 - toradex,verdin-imx8mm-nonwifi-yavia # Verdin iMX8M Mini Module on Yavia
971972 - const: toradex,verdin-imx8mm-nonwifi # Verdin iMX8M Mini Module without Wi-Fi / BT
972973 - const: toradex,verdin-imx8mm # Verdin iMX8M Mini Module
@@ -977,6 +978,7 @@ properties: · 4 unmodified lines
977978 - enum:
978979 - toradex,verdin-imx8mm-wifi-dahlia # Verdin iMX8M Mini Wi-Fi / BT Module on Dahlia
979980 - toradex,verdin-imx8mm-wifi-dev # Verdin iMX8M Mini Wi-Fi / BT M. on Verdin Development B.
981+ - toradex,verdin-imx8mm-wifi-mallow # Verdin iMX8M Mini Wi-Fi / BT Module on Mallow
980982 - toradex,verdin-imx8mm-wifi-yavia # Verdin iMX8M Mini Wi-Fi / BT Module on Yavia
981983 - const: toradex,verdin-imx8mm-wifi # Verdin iMX8M Mini Wi-Fi / BT Module
982984 - const: toradex,verdin-imx8mm # Verdin iMX8M Mini Module
@@ -1022,7 +1024,10 @@ properties: · 39 unmodified lines
10221024
10231025 - description: Variscite VAR-SOM-MX8MN based boards
10241026 items:
1025− - const: variscite,var-som-mx8mn-symphony
1027+ - enum:
1028+ - dimonoff,gateway-evk # i.MX8MN Dimonoff Gateway EVK Board
1029+ - rve,rve-gateway # i.MX8MN RVE Gateway Board
1030+ - variscite,var-som-mx8mn-symphony
10261031 - const: variscite,var-som-mx8mn
10271032 - const: fsl,imx8mn
10281033
@@ -1048,6 +1053,9 @@ properties: · 19 unmodified lines
10481053 - gateworks,imx8mp-gw73xx-2x # i.MX8MP Gateworks Board
10491054 - gateworks,imx8mp-gw74xx # i.MX8MP Gateworks Board
10501055 - gateworks,imx8mp-gw7905-2x # i.MX8MP Gateworks Board
1056+ - skov,imx8mp-skov-revb-hdmi # SKOV i.MX8MP climate control without panel
1057+ - skov,imx8mp-skov-revb-lt6 # SKOV i.MX8MP climate control with 7” panel
1058+ - skov,imx8mp-skov-revb-mi1010ait-1cp1 # SKOV i.MX8MP climate control with 10.1" panel
10511059 - toradex,verdin-imx8mp # Verdin iMX8M Plus Modules
10521060 - toradex,verdin-imx8mp-nonwifi # Verdin iMX8M Plus Modules without Wi-Fi / BT
10531061 - toradex,verdin-imx8mp-wifi # Verdin iMX8M Plus Wi-Fi / BT Modules
@@ -1100,6 +1108,7 @@ properties: · 46 unmodified lines
11001108 - enum:
11011109 - toradex,verdin-imx8mp-nonwifi-dahlia # Verdin iMX8M Plus Module on Dahlia
11021110 - toradex,verdin-imx8mp-nonwifi-dev # Verdin iMX8M Plus Module on Verdin Development Board
1111+ - toradex,verdin-imx8mp-nonwifi-mallow # Verdin iMX8M Plus Module on Mallow
11031112 - toradex,verdin-imx8mp-nonwifi-yavia # Verdin iMX8M Plus Module on Yavia
11041113 - const: toradex,verdin-imx8mp-nonwifi # Verdin iMX8M Plus Module without Wi-Fi / BT
11051114 - const: toradex,verdin-imx8mp # Verdin iMX8M Plus Module
@@ -1110,6 +1119,7 @@ properties: · 4 unmodified lines
11101119 - enum:
11111120 - toradex,verdin-imx8mp-wifi-dahlia # Verdin iMX8M Plus Wi-Fi / BT Module on Dahlia
11121121 - toradex,verdin-imx8mp-wifi-dev # Verdin iMX8M Plus Wi-Fi / BT M. on Verdin Development B.
1122+ - toradex,verdin-imx8mp-wifi-mallow # Verdin iMX8M Plus Wi-Fi / BT Module on Mallow
11131123 - toradex,verdin-imx8mp-wifi-yavia # Verdin iMX8M Plus Wi-Fi / BT Module on Yavia
11141124 - const: toradex,verdin-imx8mp-wifi # Verdin iMX8M Plus Wi-Fi / BT Module
11151125 - const: toradex,verdin-imx8mp # Verdin iMX8M Plus Module
@@ -1476,6 +1486,16 @@ properties: · 360 unmodified lines
14761486 - const: solidrun,lx2162a-som
14771487 - const: fsl,lx2160a
14781488
1489+ - description:
1490+ TQ-Systems TQMLX2160A is a series of socketable SOM featuring
1491+ LX2160A system-on-chip variants. MBLX2160A mainboard can be used a
1492+ starterkit.
1493+ items:
1494+ - enum:
1495+ - tq,lx2160a-tqmlx2160a-mblx2160a
1496+ - const: tq,lx2160a-tqmlx2160a
1497+ - const: fsl,lx2160a
1498+
14791499 - description: S32G2 based Boards
14801500 items:
14811501 - enum:
Documentation/devicetree/bindings/arm/google.yaml+53−0
@@ -0,0 +1,53 @@
1+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/arm/google.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Google Tensor platforms
8+
9+maintainers:
10+ - Peter Griffin <peter.griffin@linaro.org>
11+
12+description: |
13+ ARM platforms using SoCs designed by Google branded "Tensor" used in Pixel
14+ devices.
15+
16+ Currently upstream this is devices using "gs101" SoC which is found in Pixel
17+ 6, Pixel 6 Pro and Pixel 6a.
18+
19+ Google have a few different names for the SoC:
20+ - Marketing name ("Tensor")
21+ - Codename ("Whitechapel")
22+ - SoC ID ("gs101")
23+ - Die ID ("S5P9845")
24+
25+ Likewise there are a couple of names for the actual device
26+ - Marketing name ("Pixel 6")
27+ - Codename ("Oriole")
28+
29+ Devicetrees should use the lowercased SoC ID and lowercased board codename,
30+ e.g. gs101 and gs101-oriole.
31+
32+properties:
33+ $nodename:
34+ const: '/'
35+ compatible:
36+ oneOf:
37+ - description: Google Pixel 6 / Oriole
38+ items:
39+ - enum:
40+ - google,gs101-oriole
41+ - const: google,gs101
42+
43+ # Bootloader requires empty ect node to be present
44+ ect:
45+ type: object
46+ additionalProperties: false
47+
48+required:
49+ - ect
50+
51+additionalProperties: true
52+
53+...
Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml+17−0
@@ -82,6 +82,23 @@ properties: · 81 unmodified lines
8282
8383 ranges: true
8484
85+patternProperties:
86+ '^clock@':
87+ type: object
88+ additionalProperties: false
89+
90+ properties:
91+ compatible:
92+ enum:
93+ - hisilicon,hi3620-clock
94+ - hisilicon,hi3620-mmc-clock
95+
96+ reg:
97+ maxItems: 1
98+
99+ '#clock-cells':
100+ const: 1
101+
85102 required:
86103 - compatible
87104 - reg
Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml+22−0
@@ -60,4 +60,26 @@ properties: · 59 unmodified lines
6060 - const: marvell,armada-ap807-quad
6161 - const: marvell,armada-ap807
6262
63+ - description:
64+ Alleycat5X (98DX35xx) Reference Design as COM Express Carrier plus
65+ Armada CN9130 COM Express CPU module
66+ items:
67+ - const: marvell,cn9130-ac5x-carrier
68+ - const: marvell,rd-ac5x-carrier
69+ - const: marvell,cn9130-cpu-module
70+ - const: marvell,cn9130
71+ - const: marvell,armada-ap807-quad
72+ - const: marvell,armada-ap807
73+
74+ - description:
75+ Alleycat5X (98DX35xx) Reference Design as COM Express Carrier plus
76+ Armada CN9131 COM Express CPU module
77+ items:
78+ - const: marvell,cn9131-ac5x-carrier
79+ - const: marvell,rd-ac5x-carrier
80+ - const: marvell,cn9131-cpu-module
81+ - const: marvell,cn9131
82+ - const: marvell,armada-ap807-quad
83+ - const: marvell,armada-ap807
84+
6385 additionalProperties: true
Documentation/devicetree/bindings/arm/mediatek.yaml+25−0
@@ -174,6 +174,10 @@ properties: · 173 unmodified lines
174174 - enum:
175175 - mediatek,mt8186-evb
176176 - const: mediatek,mt8186
177+ - items:
178+ - enum:
179+ - mediatek,mt8188-evb
180+ - const: mediatek,mt8188
177181 - items:
178182 - enum:
179183 - mediatek,mt8192-evb
@@ -235,6 +239,13 @@ properties: · 55 unmodified lines
235239 items:
236240 - const: google,kappa
237241 - const: mediatek,mt8183
242+ - description: Google Katsu (ASUS Chromebook Detachable CZ1)
243+ items:
244+ - enum:
245+ - google,katsu-sku32
246+ - google,katsu-sku38
247+ - const: google,katsu
248+ - const: mediatek,mt8183
238249 - description: Google Kodama (Lenovo 10e Chromebook Tablet)
239250 items:
240251 - enum:
@@ -244,6 +255,20 @@ properties: · 3 unmodified lines
244255 - google,kodama-sku32
245256 - const: google,kodama
246257 - const: mediatek,mt8183
258+ - description: Google Makomo (Lenovo 100e Chromebook 2nd Gen MTK 2)
259+ items:
260+ - enum:
261+ - google,makomo-sku0
262+ - google,makomo-sku1
263+ - const: google,makomo
264+ - const: mediatek,mt8183
265+ - description: Google Pico (Acer Chromebook Spin 311)
266+ items:
267+ - enum:
268+ - google,pico-sku1
269+ - google,pico-sku2
270+ - const: google,pico
271+ - const: mediatek,mt8183
247272 - description: Google Willow (Acer Chromebook 311 C722/C722T)
248273 items:
249274 - enum:
Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt+0−39
@@ -1,39 +0,0 @@
1−MediaTek AUDSYS controller
2−============================
3−
4−The MediaTek AUDSYS controller provides various clocks to the system.
5−
6−Required Properties:
7−
8−- compatible: Should be one of:
9− - "mediatek,mt2701-audsys", "syscon"
10− - "mediatek,mt6765-audsys", "syscon"
11− - "mediatek,mt6779-audio", "syscon"
12− - "mediatek,mt7622-audsys", "syscon"
13− - "mediatek,mt7623-audsys", "mediatek,mt2701-audsys", "syscon"
14− - "mediatek,mt8167-audiosys", "syscon"
15− - "mediatek,mt8183-audiosys", "syscon"
16− - "mediatek,mt8192-audsys", "syscon"
17− - "mediatek,mt8516-audsys", "syscon"
18−- #clock-cells: Must be 1
19−
20−The AUDSYS controller uses the common clk binding from
21−Documentation/devicetree/bindings/clock/clock-bindings.txt
22−The available clocks are defined in dt-bindings/clock/mt*-clk.h.
23−
24−Required sub-nodes:
25−-------
26−For common binding part and usage, refer to
27−../sonud/mt2701-afe-pcm.txt.
28−
29−Example:
30−
31− audsys: clock-controller@11220000 {
32− compatible = "mediatek,mt7622-audsys", "syscon";
33− reg = <0 0x11220000 0 0x2000>;
34− #clock-cells = <1>;
35−
36− afe: audio-controller {
37− ...
38− };
39− };
Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.yaml+153−0
@@ -0,0 +1,153 @@
1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/arm/mediatek/mediatek,audsys.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: MediaTek AUDSYS controller
8+
9+maintainers:
10+ - Eugen Hristev <eugen.hristev@collabora.com>
11+
12+description:
13+ The MediaTek AUDSYS controller provides various clocks to the system.
14+
15+properties:
16+ compatible:
17+ oneOf:
18+ - items:
19+ - enum:
20+ - mediatek,mt2701-audsys
21+ - mediatek,mt6765-audsys
22+ - mediatek,mt6779-audsys
23+ - mediatek,mt7622-audsys
24+ - mediatek,mt8167-audsys
25+ - mediatek,mt8173-audsys
26+ - mediatek,mt8183-audsys
27+ - mediatek,mt8186-audsys
28+ - mediatek,mt8192-audsys
29+ - mediatek,mt8516-audsys
30+ - const: syscon
31+ - items:
32+ # Special case for mt7623 for backward compatibility
33+ - const: mediatek,mt7623-audsys
34+ - const: mediatek,mt2701-audsys
35+ - const: syscon
36+
37+ reg:
38+ maxItems: 1
39+
40+ '#clock-cells':
41+ const: 1
42+
43+ audio-controller:
44+ $ref: /schemas/sound/mediatek,mt2701-audio.yaml#
45+ type: object
46+
47+required:
48+ - compatible
49+ - '#clock-cells'
50+
51+additionalProperties: false
52+
53+examples:
54+ - |
55+ #include <dt-bindings/interrupt-controller/arm-gic.h>
56+ #include <dt-bindings/interrupt-controller/irq.h>
57+ #include <dt-bindings/power/mt2701-power.h>
58+ #include <dt-bindings/clock/mt2701-clk.h>
59+ soc {
60+ #address-cells = <2>;
61+ #size-cells = <2>;
62+ audsys: clock-controller@11220000 {
63+ compatible = "mediatek,mt7622-audsys", "syscon";
64+ reg = <0 0x11220000 0 0x2000>;
65+ #clock-cells = <1>;
66+
67+ afe: audio-controller {
68+ compatible = "mediatek,mt2701-audio";
69+ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>,
70+ <GIC_SPI 132 IRQ_TYPE_LEVEL_LOW>;
71+ interrupt-names = "afe", "asys";
72+ power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
73+
74+ clocks = <&infracfg CLK_INFRA_AUDIO>,
75+ <&topckgen CLK_TOP_AUD_MUX1_SEL>,
76+ <&topckgen CLK_TOP_AUD_MUX2_SEL>,
77+ <&topckgen CLK_TOP_AUD_48K_TIMING>,
78+ <&topckgen CLK_TOP_AUD_44K_TIMING>,
79+ <&topckgen CLK_TOP_AUD_K1_SRC_SEL>,
80+ <&topckgen CLK_TOP_AUD_K2_SRC_SEL>,
81+ <&topckgen CLK_TOP_AUD_K3_SRC_SEL>,
82+ <&topckgen CLK_TOP_AUD_K4_SRC_SEL>,
83+ <&topckgen CLK_TOP_AUD_K1_SRC_DIV>,
84+ <&topckgen CLK_TOP_AUD_K2_SRC_DIV>,
85+ <&topckgen CLK_TOP_AUD_K3_SRC_DIV>,
86+ <&topckgen CLK_TOP_AUD_K4_SRC_DIV>,
87+ <&topckgen CLK_TOP_AUD_I2S1_MCLK>,
88+ <&topckgen CLK_TOP_AUD_I2S2_MCLK>,
89+ <&topckgen CLK_TOP_AUD_I2S3_MCLK>,
90+ <&topckgen CLK_TOP_AUD_I2S4_MCLK>,
91+ <&audsys CLK_AUD_I2SO1>,
92+ <&audsys CLK_AUD_I2SO2>,
93+ <&audsys CLK_AUD_I2SO3>,
94+ <&audsys CLK_AUD_I2SO4>,
95+ <&audsys CLK_AUD_I2SIN1>,
96+ <&audsys CLK_AUD_I2SIN2>,
97+ <&audsys CLK_AUD_I2SIN3>,
98+ <&audsys CLK_AUD_I2SIN4>,
99+ <&audsys CLK_AUD_ASRCO1>,
100+ <&audsys CLK_AUD_ASRCO2>,
101+ <&audsys CLK_AUD_ASRCO3>,
102+ <&audsys CLK_AUD_ASRCO4>,
103+ <&audsys CLK_AUD_AFE>,
104+ <&audsys CLK_AUD_AFE_CONN>,
105+ <&audsys CLK_AUD_A1SYS>,
106+ <&audsys CLK_AUD_A2SYS>,
107+ <&audsys CLK_AUD_AFE_MRGIF>;
108+
109+ clock-names = "infra_sys_audio_clk",
110+ "top_audio_mux1_sel",
111+ "top_audio_mux2_sel",
112+ "top_audio_a1sys_hp",
113+ "top_audio_a2sys_hp",
114+ "i2s0_src_sel",
115+ "i2s1_src_sel",
116+ "i2s2_src_sel",
117+ "i2s3_src_sel",
118+ "i2s0_src_div",
119+ "i2s1_src_div",
120+ "i2s2_src_div",
121+ "i2s3_src_div",
122+ "i2s0_mclk_en",
123+ "i2s1_mclk_en",
124+ "i2s2_mclk_en",
125+ "i2s3_mclk_en",
126+ "i2so0_hop_ck",
127+ "i2so1_hop_ck",
128+ "i2so2_hop_ck",
129+ "i2so3_hop_ck",
130+ "i2si0_hop_ck",
131+ "i2si1_hop_ck",
132+ "i2si2_hop_ck",
133+ "i2si3_hop_ck",
134+ "asrc0_out_ck",
135+ "asrc1_out_ck",
136+ "asrc2_out_ck",
137+ "asrc3_out_ck",
138+ "audio_afe_pd",
139+ "audio_afe_conn_pd",
140+ "audio_a1sys_pd",
141+ "audio_a2sys_pd",
142+ "audio_mrgif_pd";
143+
144+ assigned-clocks = <&topckgen CLK_TOP_AUD_MUX1_SEL>,
145+ <&topckgen CLK_TOP_AUD_MUX2_SEL>,
146+ <&topckgen CLK_TOP_AUD_MUX1_DIV>,
147+ <&topckgen CLK_TOP_AUD_MUX2_DIV>;
148+ assigned-clock-parents = <&topckgen CLK_TOP_AUD1PLL_98M>,
149+ <&topckgen CLK_TOP_AUD2PLL_90M>;
150+ assigned-clock-rates = <0>, <0>, <49152000>, <45158400>;
151+ };
152+ };
153+ };
Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt+0−29
@@ -1,29 +0,0 @@
1−Mediatek ethsys controller
2−============================
3−
4−The Mediatek ethsys controller provides various clocks to the system.
5−
6−Required Properties:
7−
8−- compatible: Should be:
9− - "mediatek,mt2701-ethsys", "syscon"
10− - "mediatek,mt7622-ethsys", "syscon"
11− - "mediatek,mt7623-ethsys", "mediatek,mt2701-ethsys", "syscon"
12− - "mediatek,mt7629-ethsys", "syscon"
13− - "mediatek,mt7981-ethsys", "syscon"
14− - "mediatek,mt7986-ethsys", "syscon"
15−- #clock-cells: Must be 1
16−- #reset-cells: Must be 1
17−
18−The ethsys controller uses the common clk binding from
19−Documentation/devicetree/bindings/clock/clock-bindings.txt
20−The available clocks are defined in dt-bindings/clock/mt*-clk.h.
21−
22−Example:
23−
24−ethsys: clock-controller@1b000000 {
25− compatible = "mediatek,mt2701-ethsys", "syscon";
26− reg = <0 0x1b000000 0 0x1000>;
27− #clock-cells = <1>;
28− #reset-cells = <1>;
29−};
Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml+1−0
@@ -30,6 +30,7 @@ properties: · 29 unmodified lines
3030 - mediatek,mt7629-infracfg
3131 - mediatek,mt7981-infracfg
3232 - mediatek,mt7986-infracfg
33+ - mediatek,mt7988-infracfg
3334 - mediatek,mt8135-infracfg
3435 - mediatek,mt8167-infracfg
3536 - mediatek,mt8173-infracfg
Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml+3−0
@@ -32,6 +32,9 @@ properties: · 31 unmodified lines
3232 - mediatek,mt8183-mmsys
3333 - mediatek,mt8186-mmsys
3434 - mediatek,mt8188-vdosys0
35+ - mediatek,mt8188-vdosys1
36+ - mediatek,mt8188-vppsys0
37+ - mediatek,mt8188-vppsys1
3538 - mediatek,mt8192-mmsys
3639 - mediatek,mt8195-vdosys1
3740 - mediatek,mt8195-vppsys0
Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml+1−0
@@ -28,6 +28,7 @@ properties: · 27 unmodified lines
2828 - mediatek,mt8173-pericfg
2929 - mediatek,mt8183-pericfg
3030 - mediatek,mt8186-pericfg
31+ - mediatek,mt8188-pericfg
3132 - mediatek,mt8195-pericfg
3233 - mediatek,mt8516-pericfg
3334 - const: syscon
Documentation/devicetree/bindings/arm/msm/qcom,idle-state.txt+0−84
@@ -1,84 +0,0 @@
1−QCOM Idle States for cpuidle driver
2−
3−ARM provides idle-state node to define the cpuidle states, as defined in [1].
4−cpuidle-qcom is the cpuidle driver for Qualcomm SoCs and uses these idle
5−states. Idle states have different enter/exit latency and residency values.
6−The idle states supported by the QCOM SoC are defined as -
7−
8− * Standby
9− * Retention
10− * Standalone Power Collapse (Standalone PC or SPC)
11− * Power Collapse (PC)
12−
13−Standby: Standby does a little more in addition to architectural clock gating.
14−When the WFI instruction is executed the ARM core would gate its internal
15−clocks. In addition to gating the clocks, QCOM cpus use this instruction as a
16−trigger to execute the SPM state machine. The SPM state machine waits for the
17−interrupt to trigger the core back in to active. This triggers the cache
18−hierarchy to enter standby states, when all cpus are idle. An interrupt brings
19−the SPM state machine out of its wait, the next step is to ensure that the
20−cache hierarchy is also out of standby, and then the cpu is allowed to resume
21−execution. This state is defined as a generic ARM WFI state by the ARM cpuidle
22−driver and is not defined in the DT. The SPM state machine should be
23−configured to execute this state by default and after executing every other
24−state below.
25−
26−Retention: Retention is a low power state where the core is clock gated and
27−the memory and the registers associated with the core are retained. The
28−voltage may be reduced to the minimum value needed to keep the processor
29−registers active. The SPM should be configured to execute the retention
30−sequence and would wait for interrupt, before restoring the cpu to execution
31−state. Retention may have a slightly higher latency than Standby.
32−
33−Standalone PC: A cpu can power down and warmboot if there is a sufficient time
34−between the time it enters idle and the next known wake up. SPC mode is used
35−to indicate a core entering a power down state without consulting any other
36−cpu or the system resources. This helps save power only on that core. The SPM
37−sequence for this idle state is programmed to power down the supply to the
38−core, wait for the interrupt, restore power to the core, and ensure the
39−system state including cache hierarchy is ready before allowing core to
40−resume. Applying power and resetting the core causes the core to warmboot
41−back into Elevation Level (EL) which trampolines the control back to the
42−kernel. Entering a power down state for the cpu, needs to be done by trapping
43−into a EL. Failing to do so, would result in a crash enforced by the warm boot
44−code in the EL for the SoC. On SoCs with write-back L1 cache, the cache has to
45−be flushed in s/w, before powering down the core.
46−
47−Power Collapse: This state is similar to the SPC mode, but distinguishes
48−itself in that the cpu acknowledges and permits the SoC to enter deeper sleep
49−modes. In a hierarchical power domain SoC, this means L2 and other caches can
50−be flushed, system bus, clocks - lowered, and SoC main XO clock gated and
51−voltages reduced, provided all cpus enter this state. Since the span of low
52−power modes possible at this state is vast, the exit latency and the residency
53−of this low power mode would be considered high even though at a cpu level,
54−this essentially is cpu power down. The SPM in this state also may handshake
55−with the Resource power manager (RPM) processor in the SoC to indicate a
56−complete application processor subsystem shut down.
57−
58−The idle-state for QCOM SoCs are distinguished by the compatible property of
59−the idle-states device node.
60−
61−The devicetree representation of the idle state should be -
62−
63−Required properties:
64−
65−- compatible: Must be one of -
66− "qcom,idle-state-ret",
67− "qcom,idle-state-spc",
68− "qcom,idle-state-pc",
69− and "arm,idle-state".
70−
71−Other required and optional properties are specified in [1].
72−
73−Example:
74−
75− idle-states {
76− CPU_SPC: spc {
77− compatible = "qcom,idle-state-spc", "arm,idle-state";
78− entry-latency-us = <150>;
79− exit-latency-us = <200>;
80− min-residency-us = <2000>;
81− };
82− };
83−
84−[1]. Documentation/devicetree/bindings/cpu/idle-states.yaml
Documentation/devicetree/bindings/arm/qcom,coresight-remote-etm.yaml+51−0
@@ -0,0 +1,51 @@
1+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/arm/qcom,coresight-remote-etm.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Qualcomm Coresight Remote ETM(Embedded Trace Macrocell)
8+
9+maintainers:
10+ - Jinlong Mao <quic_jinlmao@quicinc.com>
11+ - Tao Zhang <quic_taozha@quicinc.com>
12+
13+description:
14+ Support for ETM trace collection on remote processor using coresight
15+ framework. Enabling this will allow turning on ETM tracing on remote
16+ processor like modem processor via sysfs and collecting the trace
17+ via coresight TMC sinks.
18+
19+properties:
20+ compatible:
21+ const: qcom,coresight-remote-etm
22+
23+ out-ports:
24+ $ref: /schemas/graph.yaml#/properties/ports
25+ additionalProperties: false
26+
27+ properties:
28+ port:
29+ description: Output connection to the CoreSight Trace bus.
30+ $ref: /schemas/graph.yaml#/properties/port
31+
32+required:
33+ - compatible
34+ - out-ports
35+
36+additionalProperties: false
37+
38+examples:
39+ - |
40+ etm {
41+ compatible = "qcom,coresight-remote-etm";
42+
43+ out-ports {
44+ port {
45+ modem_etm0_out_funnel_modem: endpoint {
46+ remote-endpoint = <&funnel_modem_in_modem_etm0>;
47+ };
48+ };
49+ };
50+ };
51+...
Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml+20−0
@@ -44,6 +44,23 @@ properties: · 43 unmodified lines
4444 minItems: 1
4545 maxItems: 2
4646
47+ qcom,dsb-element-size:
48+ description:
49+ Specifies the DSB(Discrete Single Bit) element size supported by
50+ the monitor. The associated aggregator will read this size before it
51+ is enabled. DSB element size currently only supports 32-bit and 64-bit.
52+ $ref: /schemas/types.yaml#/definitions/uint8
53+ enum: [32, 64]
54+
55+ qcom,dsb-msrs-num:
56+ description:
57+ Specifies the number of DSB(Discrete Single Bit) MSR(mux select register)
58+ registers supported by the monitor. If this property is not configured
59+ or set to 0, it means this DSB TPDM doesn't support MSR.
60+ $ref: /schemas/types.yaml#/definitions/uint32
61+ minimum: 0
62+ maximum: 32
63+
4764 clocks:
4865 maxItems: 1
4966
@@ -77,6 +94,9 @@ examples: · 27 unmodified lines
7794 compatible = "qcom,coresight-tpdm", "arm,primecell";
7895 reg = <0x0684c000 0x1000>;
7996
97+ qcom,dsb-element-size = /bits/ 8 <32>;
98+ qcom,dsb-msrs-num = <16>;
99+
80100 clocks = <&aoss_qmp>;
81101 clock-names = "apb_pclk";
82102
Documentation/devicetree/bindings/arm/qcom-soc.yaml+8−8
@@ -23,7 +23,7 @@ description: | · 22 unmodified lines
2323 select:
2424 properties:
2525 compatible:
26− pattern: "^qcom,.*(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$"
26+ pattern: "^qcom,.*(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm|x1e)[0-9]+.*$"
2727 required:
2828 - compatible
2929
@@ -31,17 +31,17 @@ properties: · 1 unmodified line
3131 compatible:
3232 oneOf:
3333 # Preferred naming style for compatibles of SoC components:
34− - pattern: "^qcom,(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+(pro)?-.*$"
34+ - pattern: "^qcom,(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm|x1e)[0-9]+(pro)?-.*$"
3535 - pattern: "^qcom,(sa|sc)8[0-9]+[a-z][a-z]?-.*$"
3636
3737 # Legacy namings - variations of existing patterns/compatibles are OK,
3838 # but do not add completely new entries to these:
39− - pattern: "^qcom,[ak]pss-wdt-(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$"
40− - pattern: "^qcom,gcc-(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$"
41− - pattern: "^qcom,mmcc-(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$"
42− - pattern: "^qcom,pcie-(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$"
43− - pattern: "^qcom,rpm-(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$"
44− - pattern: "^qcom,scm-(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$"
39+ - pattern: "^qcom,[ak]pss-wdt-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$"
40+ - pattern: "^qcom,gcc-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$"
41+ - pattern: "^qcom,mmcc-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$"
42+ - pattern: "^qcom,pcie-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm|x1e)[0-9]+.*$"
43+ - pattern: "^qcom,rpm-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm)[0-9]+.*$"
44+ - pattern: "^qcom,scm-(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm|x1e)[0-9]+.*$"
4545 - enum:
4646 - qcom,dsi-ctrl-6g-qcm2290
4747 - qcom,gpucc-sdm630
Documentation/devicetree/bindings/arm/qcom.yaml+32−15
@@ -87,29 +87,18 @@ description: | · 86 unmodified lines
8787 sm8350
8888 sm8450
8989 sm8550
90+ sm8650
91+ x1e80100
9092
9193 The 'board' element must be one of the following strings:
9294
9395 adp
94− ap-al02-c2
95− ap-al02-c6
96− ap-al02-c7
97− ap-al02-c8
98− ap-al02-c9
99− ap-mi01.2
100− ap-mi01.3
101− ap-mi01.6
102− ap-mi01.9
10396 cdp
104− cp01-c1
10597 dragonboard
106− hk01
107− hk10-c1
108− hk10-c2
10998 idp
11099 liquid
111− rdp432-c2
112100 mtp
101+ qcp
113102 qrd
114103 rb2
115104 ride
@@ -138,7 +127,7 @@ description: | · 22 unmodified lines
138127 There are many devices in the list below that run the standard ChromeOS
139128 bootloader setup and use the open source depthcharge bootloader to boot the
140129 OS. These devices do not use the scheme described above. For details, see:
141− https://docs.kernel.org/arm/google/chromebook-boot-flow.html
130+ https://docs.kernel.org/arch/arm/google/chromebook-boot-flow.html
142131
143132 properties:
144133 $nodename:
@@ -186,11 +175,24 @@ properties: · 41 unmodified lines
186175
187176 - items:
188177 - enum:
178+ - microsoft,dempsey
179+ - microsoft,makepeace
180+ - microsoft,moneypenny
189181 - samsung,s3ve3g
190182 - const: qcom,msm8226
191183
192184 - items:
193185 - enum:
186+ - htc,memul
187+ - microsoft,superman-lte
188+ - microsoft,tesla
189+ - motorola,peregrine
190+ - const: qcom,msm8926
191+ - const: qcom,msm8226
192+
193+ - items:
194+ - enum:
195+ - huawei,kiwi
194196 - longcheer,l9100
195197 - samsung,a7
196198 - sony,kanuti-tulip
@@ -397,6 +399,8 @@ properties: · 200 unmodified lines
397399 - items:
398400 - enum:
399401 - fairphone,fp5
402+ - qcom,qcm6490-idp
403+ - qcom,qcs6490-rb3gen2
400404 - const: qcom,qcm6490
401405
402406 - description: Qualcomm Technologies, Inc. Distributed Unit 1000 platform
@@ -1009,6 +1013,7 @@ properties: · 606 unmodified lines
10091013 - sony,pdx203-generic
10101014 - sony,pdx206-generic
10111015 - xiaomi,elish
1016+ - xiaomi,pipa
10121017 - const: qcom,sm8250
10131018
10141019 - items:
@@ -1034,6 +1039,18 @@ properties: · 19 unmodified lines
10341039 - qcom,sm8550-qrd
10351040 - const: qcom,sm8550
10361041
1042+ - items:
1043+ - enum:
1044+ - qcom,sm8650-mtp
1045+ - qcom,sm8650-qrd
1046+ - const: qcom,sm8650
1047+
1048+ - items:
1049+ - enum:
1050+ - qcom,x1e80100-crd
1051+ - qcom,x1e80100-qcp
1052+ - const: qcom,x1e80100
1053+
10371054 # Board compatibles go above
10381055
10391056 qcom,msm-id:
Documentation/devicetree/bindings/arm/rockchip.yaml+43−13
@@ -30,9 +30,11 @@ properties: · 29 unmodified lines
3030 - const: amarula,vyasa-rk3288
3131 - const: rockchip,rk3288
3232
33− - description: Anbernic RG351M
33+ - description: Anbernic RK3326 Handheld Gaming Console
3434 items:
35− - const: anbernic,rg351m
35+ - enum:
36+ - anbernic,rg351m
37+ - anbernic,rg351v
3638 - const: rockchip,rk3326
3739
3840 - description: Anbernic RG353P
@@ -95,22 +97,30 @@ properties: · 56 unmodified lines
9597 - const: chipspark,rayeager-px2
9698 - const: rockchip,rk3066a
9799
100+ - description: Cool Pi Compute Module 5(CM5) EVB
101+ items:
102+ - enum:
103+ - coolpi,pi-cm5-evb
104+ - const: coolpi,pi-cm5
105+ - const: rockchip,rk3588
106+
107+ - description: Cool Pi 4 Model B
108+ items:
109+ - const: coolpi,pi-4b
110+ - const: rockchip,rk3588s
111+
98112 - description: Edgeble Neural Compute Module 2(Neu2) SoM based boards
99113 items:
100114 - const: edgeble,neural-compute-module-2-io # Edgeble Neural Compute Module 2 IO Board
101115 - const: edgeble,neural-compute-module-2 # Edgeble Neural Compute Module 2 SoM
102116 - const: rockchip,rv1126
103117
104− - description: Edgeble Neural Compute Module 6(Neu6) Model A SoM based boards
105− items:
106− - const: edgeble,neural-compute-module-6a-io # Edgeble Neural Compute Module 6A IO Board
107− - const: edgeble,neural-compute-module-6a # Edgeble Neural Compute Module 6A SoM
108− - const: rockchip,rk3588
109−
110− - description: Edgeble Neural Compute Module 6(Neu6) Model B SoM based boards
118+ - description: Edgeble Neural Compute Module 6(Neu6) SoM based boards
111119 items:
112− - const: edgeble,neural-compute-module-6b-io # Edgeble Neural Compute Module 6B IO Board
113− - const: edgeble,neural-compute-module-6b # Edgeble Neural Compute Module 6B SoM
120+ - const: edgeble,neural-compute-module-6a-io # Edgeble NCM6A-IO Board
121+ - enum:
122+ - edgeble,neural-compute-module-6a # Edgeble Neural Compute Module 6A SoM
123+ - edgeble,neural-compute-module-6b # Edgeble Neural Compute Module 6B SoM
114124 - const: rockchip,rk3588
115125
116126 - description: Elgin RV1108 R1
@@ -237,6 +247,11 @@ properties: · 120 unmodified lines
237247 - const: geekbuying,geekbox
238248 - const: rockchip,rk3368
239249
250+ - description: Geniatech XPI-3128
251+ items:
252+ - const: geniatech,xpi-3128
253+ - const: rockchip,rk3128
254+
240255 - description: Google Bob (Asus Chromebook Flip C101PA)
241256 items:
242257 - const: google,bob-rev13
@@ -674,9 +689,12 @@ properties: · 431 unmodified lines
674689 - const: pine64,soquartz
675690 - const: rockchip,rk3566
676691
677− - description: Powkiddy RGB30
692+ - description: Powkiddy RK3566 Handheld Gaming Console
678693 items:
679− - const: powkiddy,rgb30
694+ - enum:
695+ - powkiddy,rgb30
696+ - powkiddy,rk2023
697+ - powkiddy,x55
680698 - const: rockchip,rk3566
681699
682700 - description: Radxa Compute Module 3(CM3)
@@ -875,6 +893,11 @@ properties: · 192 unmodified lines
875893 - const: tsd,rk3399-puma-haikou
876894 - const: rockchip,rk3399
877895
896+ - description: Theobroma Systems RK3588-SBC Jaguar
897+ items:
898+ - const: tsd,rk3588-jaguar
899+ - const: rockchip,rk3588
900+
878901 - description: Tronsmart Orion R68 Meta
879902 items:
880903 - const: tronsmart,orion-r68-meta
@@ -922,6 +945,13 @@ properties: · 41 unmodified lines
922945 - const: rockchip,rk3568-bpi-r2pro
923946 - const: rockchip,rk3568
924947
948+ - description: Sonoff iHost Smart Home Hub
949+ items:
950+ - const: itead,sonoff-ihost
951+ - enum:
952+ - rockchip,rv1126
953+ - rockchip,rv1109
954+
925955 additionalProperties: true
926956
927957 ...
Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml+6−0
@@ -230,6 +230,12 @@ properties: · 229 unmodified lines
230230 - samsung,exynosautov9-sadk # Samsung Exynos Auto v9 SADK
231231 - const: samsung,exynosautov9
232232
233+ - description: Exynos Auto v920 based boards
234+ items:
235+ - enum:
236+ - samsung,exynosautov920-sadk # Samsung Exynos Auto v920 SADK
237+ - const: samsung,exynosautov920
238+
233239 required:
234240 - compatible
235241
Documentation/devicetree/bindings/arm/sprd/sprd.yaml+5−0
@@ -35,6 +35,11 @@ properties: · 34 unmodified lines
3535 - sprd,ums512-1h10
3636 - const: sprd,ums512
3737
38+ - items:
39+ - enum:
40+ - sprd,ums9620-2h10
41+ - const: sprd,ums9620
42+
3843 additionalProperties: true
3944
4045 ...
Documentation/devicetree/bindings/arm/stm32/stm32.yaml+3−13
@@ -82,29 +82,19 @@ properties: · 81 unmodified lines
8282 - shiratech,stm32mp157a-iot-box # IoT Box
8383 - shiratech,stm32mp157a-stinger96 # Stinger96
8484 - st,stm32mp157c-ed1
85+ - st,stm32mp157c-ed1-scmi
8586 - st,stm32mp157a-dk1
87+ - st,stm32mp157a-dk1-scmi
8688 - st,stm32mp157c-dk2
89+ - st,stm32mp157c-dk2-scmi
8790 - const: st,stm32mp157
8891
89− - items:
90− - const: st,stm32mp157a-dk1-scmi
91− - const: st,stm32mp157a-dk1
92− - const: st,stm32mp157
93− - items:
94− - const: st,stm32mp157c-dk2-scmi
95− - const: st,stm32mp157c-dk2
96− - const: st,stm32mp157
97− - items:
98− - const: st,stm32mp157c-ed1-scmi
99− - const: st,stm32mp157c-ed1
100− - const: st,stm32mp157
10192 - items:
10293 - const: st,stm32mp157c-ev1
10394 - const: st,stm32mp157c-ed1
10495 - const: st,stm32mp157
10596 - items:
10697 - const: st,stm32mp157c-ev1-scmi
107− - const: st,stm32mp157c-ev1
10898 - const: st,stm32mp157c-ed1
10999 - const: st,stm32mp157
110100
Documentation/devicetree/bindings/arm/sunxi.yaml+10−0
@@ -868,6 +868,11 @@ properties: · 867 unmodified lines
868868 - const: topwise,a721
869869 - const: allwinner,sun4i-a10
870870
871+ - description: Transpeed 8K618-T
872+ items:
873+ - const: transpeed,8k618-t
874+ - const: allwinner,sun50i-h618
875+
871876 - description: Utoo P66
872877 items:
873878 - const: utoo,p66
@@ -1013,6 +1018,11 @@ properties: · 139 unmodified lines
10131018 - const: xunlong,orangepi-zero2
10141019 - const: allwinner,sun50i-h616
10151020
1021+ - description: Xunlong OrangePi Zero 2W
1022+ items:
1023+ - const: xunlong,orangepi-zero2w
1024+ - const: allwinner,sun50i-h618
1025+
10161026 - description: Xunlong OrangePi Zero 3
10171027 items:
10181028 - const: xunlong,orangepi-zero3
Documentation/devicetree/bindings/arm/ti/k3.yaml+2−0
@@ -50,6 +50,7 @@ properties: · 49 unmodified lines
5050 - enum:
5151 - toradex,verdin-am62-nonwifi-dahlia # Verdin AM62 Module on Dahlia
5252 - toradex,verdin-am62-nonwifi-dev # Verdin AM62 Module on Verdin Development Board
53+ - toradex,verdin-am62-nonwifi-mallow # Verdin AM62 Module on Mallow
5354 - toradex,verdin-am62-nonwifi-yavia # Verdin AM62 Module on Yavia
5455 - const: toradex,verdin-am62-nonwifi # Verdin AM62 Module without Wi-Fi / BT
5556 - const: toradex,verdin-am62 # Verdin AM62 Module
@@ -60,6 +61,7 @@ properties: · 4 unmodified lines
6061 - enum:
6162 - toradex,verdin-am62-wifi-dahlia # Verdin AM62 Wi-Fi / BT Module on Dahlia
6263 - toradex,verdin-am62-wifi-dev # Verdin AM62 Wi-Fi / BT M. on Verdin Development B.
64+ - toradex,verdin-am62-wifi-mallow # Verdin AM62 Wi-Fi / BT Module on Mallow
6365 - toradex,verdin-am62-wifi-yavia # Verdin AM62 Wi-Fi / BT Module on Yavia
6466 - const: toradex,verdin-am62-wifi # Verdin AM62 Wi-Fi / BT Module
6567 - const: toradex,verdin-am62 # Verdin AM62 Module
Documentation/devicetree/bindings/arm/ti/omap.yaml+2−0
@@ -134,6 +134,8 @@ properties: · 133 unmodified lines
134134 - amazon,omap4-kc1 # Amazon Kindle Fire (first generation)
135135 - motorola,droid4 # Motorola Droid 4 XT894
136136 - motorola,droid-bionic # Motorola Droid Bionic XT875
137+ - motorola,xyboard-mz609
138+ - motorola,xyboard-mz617
137139 - ti,omap4-panda
138140 - ti,omap4-sdp
139141 - const: ti,omap4430
Documentation/devicetree/bindings/auxdisplay/hit,hd44780.yaml+1−1
@@ -113,7 +113,7 @@ examples: · 112 unmodified lines
113113 hd44780 {
114114 compatible = "hit,hd44780";
115115 display-height-chars = <2>;
116− display-width-chars = <16>;
116+ display-width-chars = <16>;
117117 data-gpios = <&pcf8574 4 0>,
118118 <&pcf8574 5 0>,
119119 <&pcf8574 6 0>,
Documentation/devicetree/bindings/cache/qcom,llcc.yaml+4−1
@@ -33,6 +33,8 @@ properties: · 32 unmodified lines
3333 - qcom,sm8350-llcc
3434 - qcom,sm8450-llcc
3535 - qcom,sm8550-llcc
36+ - qcom,sm8650-llcc
37+ - qcom,x1e80100-llcc
3638
3739 reg:
3840 minItems: 2
@@ -64,6 +66,7 @@ allOf: · 25 unmodified lines
6466 compatible:
6567 contains:
6668 enum:
69+ - qcom,qdu1000-llcc
6770 - qcom,sc7180-llcc
6871 - qcom,sm6350-llcc
6972 then:
@@ -101,9 +104,9 @@ allOf: · 31 unmodified lines
101104 compatible:
102105 contains:
103106 enum:
104− - qcom,qdu1000-llcc
105107 - qcom,sc8180x-llcc
106108 - qcom,sc8280xp-llcc
109+ - qcom,x1e80100-llcc
107110 then:
108111 properties:
109112 reg:
Documentation/devicetree/bindings/cache/sifive,ccache0.yaml+5−1
@@ -38,7 +38,9 @@ properties: · 37 unmodified lines
3838 - sifive,fu740-c000-ccache
3939 - const: cache
4040 - items:
41− - const: starfive,jh7110-ccache
41+ - enum:
42+ - starfive,jh7100-ccache
43+ - starfive,jh7110-ccache
4244 - const: sifive,ccache0
4345 - const: cache
4446 - items:
@@ -88,6 +90,7 @@ allOf: · 43 unmodified lines
8890 contains:
8991 enum:
9092 - sifive,fu740-c000-ccache
93+ - starfive,jh7100-ccache
9194 - starfive,jh7110-ccache
9295 - microchip,mpfs-ccache
9396
@@ -111,6 +114,7 @@ allOf: · 17 unmodified lines
111114 contains:
112115 enum:
113116 - sifive,fu740-c000-ccache
117+ - starfive,jh7100-ccache
114118 - starfive,jh7110-ccache
115119
116120 then:
Documentation/devicetree/bindings/clock/baikal,bt1-ccu-pll.yaml+1−1
@@ -125,7 +125,7 @@ examples: · 124 unmodified lines
125125 clk25m: clock-oscillator-25m {
126126 compatible = "fixed-clock";
127127 #clock-cells = <0>;
128− clock-frequency = <25000000>;
128+ clock-frequency = <25000000>;
129129 clock-output-names = "clk25m";
130130 };
131131 ...
Documentation/devicetree/bindings/clock/brcm,kona-ccu.txt+0−138
@@ -1,138 +0,0 @@
1−Broadcom Kona Family Clocks
2−
3−This binding is associated with Broadcom SoCs having "Kona" style
4−clock control units (CCUs). A CCU is a clock provider that manages
5−a set of clock signals. Each CCU is represented by a node in the
6−device tree.
7−
8−This binding uses the common clock binding:
9− Documentation/devicetree/bindings/clock/clock-bindings.txt
10−
11−Required properties:
12−- compatible
13− Shall have a value of the form "brcm,<model>-<which>-ccu",
14− where <model> is a Broadcom SoC model number and <which> is
15− the name of a defined CCU. For example:
16− "brcm,bcm11351-root-ccu"
17− The compatible strings used for each supported SoC family
18− are defined below.
19−- reg
20− Shall define the base and range of the address space
21− containing clock control registers
22−- #clock-cells
23− Shall have value <1>. The permitted clock-specifier values
24− are defined below.
25−- clock-output-names
26− Shall be an ordered list of strings defining the names of
27− the clocks provided by the CCU.
28−
29−Device tree example:
30−
31− slave_ccu: slave_ccu {
32− compatible = "brcm,bcm11351-slave-ccu";
33− reg = <0x3e011000 0x0f00>;
34− #clock-cells = <1>;
35− clock-output-names = "uartb",
36− "uartb2",
37− "uartb3",
38− "uartb4";
39− };
40−
41− ref_crystal_clk: ref_crystal {
42− #clock-cells = <0>;
43− compatible = "fixed-clock";
44− clock-frequency = <26000000>;
45− };
46−
47− uart@3e002000 {
48− compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
49− reg = <0x3e002000 0x1000>;
50− clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB3>;
51− interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
52− reg-shift = <2>;
53− reg-io-width = <4>;
54− };
55−
56−BCM281XX family
57−---------------
58−CCU compatible string values for SoCs in the BCM281XX family are:
59− "brcm,bcm11351-root-ccu"
60− "brcm,bcm11351-aon-ccu"
61− "brcm,bcm11351-hub-ccu"
62− "brcm,bcm11351-master-ccu"
63− "brcm,bcm11351-slave-ccu"
64−
65−The following table defines the set of CCUs and clock specifiers for
66−BCM281XX family clocks. When a clock consumer references a clocks,
67−its symbolic specifier (rather than its numeric index value) should
68−be used. These specifiers are defined in:
69− "include/dt-bindings/clock/bcm281xx.h"
70−
71− CCU Clock Type Index Specifier
72− --- ----- ---- ----- ---------
73− root frac_1m peri 0 BCM281XX_ROOT_CCU_FRAC_1M
74−
75− aon hub_timer peri 0 BCM281XX_AON_CCU_HUB_TIMER
76− aon pmu_bsc peri 1 BCM281XX_AON_CCU_PMU_BSC
77− aon pmu_bsc_var peri 2 BCM281XX_AON_CCU_PMU_BSC_VAR
78−
79− hub tmon_1m peri 0 BCM281XX_HUB_CCU_TMON_1M
80−
81− master sdio1 peri 0 BCM281XX_MASTER_CCU_SDIO1
82− master sdio2 peri 1 BCM281XX_MASTER_CCU_SDIO2
83− master sdio3 peri 2 BCM281XX_MASTER_CCU_SDIO3
84− master sdio4 peri 3 BCM281XX_MASTER_CCU_SDIO4
85− master dmac peri 4 BCM281XX_MASTER_CCU_DMAC
86− master usb_ic peri 5 BCM281XX_MASTER_CCU_USB_IC
87− master hsic2_48m peri 6 BCM281XX_MASTER_CCU_HSIC_48M
88− master hsic2_12m peri 7 BCM281XX_MASTER_CCU_HSIC_12M
89−
90− slave uartb peri 0 BCM281XX_SLAVE_CCU_UARTB
91− slave uartb2 peri 1 BCM281XX_SLAVE_CCU_UARTB2
92− slave uartb3 peri 2 BCM281XX_SLAVE_CCU_UARTB3
93− slave uartb4 peri 3 BCM281XX_SLAVE_CCU_UARTB4
94− slave ssp0 peri 4 BCM281XX_SLAVE_CCU_SSP0
95− slave ssp2 peri 5 BCM281XX_SLAVE_CCU_SSP2
96− slave bsc1 peri 6 BCM281XX_SLAVE_CCU_BSC1
97− slave bsc2 peri 7 BCM281XX_SLAVE_CCU_BSC2
98− slave bsc3 peri 8 BCM281XX_SLAVE_CCU_BSC3
99− slave pwm peri 9 BCM281XX_SLAVE_CCU_PWM
100−
101−
102−BCM21664 family
103−---------------
104−CCU compatible string values for SoCs in the BCM21664 family are:
105− "brcm,bcm21664-root-ccu"
106− "brcm,bcm21664-aon-ccu"
107− "brcm,bcm21664-master-ccu"
108− "brcm,bcm21664-slave-ccu"
109−
110−The following table defines the set of CCUs and clock specifiers for
111−BCM21664 family clocks. When a clock consumer references a clocks,
112−its symbolic specifier (rather than its numeric index value) should
113−be used. These specifiers are defined in:
114− "include/dt-bindings/clock/bcm21664.h"
115−
116− CCU Clock Type Index Specifier
117− --- ----- ---- ----- ---------
118− root frac_1m peri 0 BCM21664_ROOT_CCU_FRAC_1M
119−
120− aon hub_timer peri 0 BCM21664_AON_CCU_HUB_TIMER
121−
122− master sdio1 peri 0 BCM21664_MASTER_CCU_SDIO1
123− master sdio2 peri 1 BCM21664_MASTER_CCU_SDIO2
124− master sdio3 peri 2 BCM21664_MASTER_CCU_SDIO3
125− master sdio4 peri 3 BCM21664_MASTER_CCU_SDIO4
126− master sdio1_sleep peri 4 BCM21664_MASTER_CCU_SDIO1_SLEEP
127− master sdio2_sleep peri 5 BCM21664_MASTER_CCU_SDIO2_SLEEP
128− master sdio3_sleep peri 6 BCM21664_MASTER_CCU_SDIO3_SLEEP
129− master sdio4_sleep peri 7 BCM21664_MASTER_CCU_SDIO4_SLEEP
130−
131− slave uartb peri 0 BCM21664_SLAVE_CCU_UARTB
132− slave uartb2 peri 1 BCM21664_SLAVE_CCU_UARTB2
133− slave uartb3 peri 2 BCM21664_SLAVE_CCU_UARTB3
134− slave uartb4 peri 3 BCM21664_SLAVE_CCU_UARTB4
135− slave bsc1 peri 4 BCM21664_SLAVE_CCU_BSC1
136− slave bsc2 peri 5 BCM21664_SLAVE_CCU_BSC2
137− slave bsc3 peri 6 BCM21664_SLAVE_CCU_BSC3
138− slave bsc4 peri 7 BCM21664_SLAVE_CCU_BSC4
Documentation/devicetree/bindings/clock/brcm,kona-ccu.yaml+181−0
@@ -0,0 +1,181 @@
1+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/clock/brcm,kona-ccu.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Broadcom Kona family clock control units (CCU)
8+
9+maintainers:
10+ - Florian Fainelli <florian.fainelli@broadcom.com>
11+ - Ray Jui <rjui@broadcom.com>
12+ - Scott Branden <sbranden@broadcom.com>
13+
14+description: |
15+ Broadcom "Kona" style clock control unit (CCU) is a clock provider that
16+ manages a set of clock signals.
17+
18+ All available clock IDs are defined in
19+ - include/dt-bindings/clock/bcm281xx.h for BCM281XX family
20+ - include/dt-bindings/clock/bcm21664.h for BCM21664 family
21+
22+properties:
23+ compatible:
24+ enum:
25+ - brcm,bcm11351-aon-ccu
26+ - brcm,bcm11351-hub-ccu
27+ - brcm,bcm11351-master-ccu
28+ - brcm,bcm11351-root-ccu
29+ - brcm,bcm11351-slave-ccu
30+ - brcm,bcm21664-aon-ccu
31+ - brcm,bcm21664-master-ccu
32+ - brcm,bcm21664-root-ccu
33+ - brcm,bcm21664-slave-ccu
34+
35+ reg:
36+ maxItems: 1
37+
38+ '#clock-cells':
39+ const: 1
40+
41+ clock-output-names:
42+ minItems: 1
43+ maxItems: 10
44+
45+required:
46+ - compatible
47+ - reg
48+ - '#clock-cells'
49+ - clock-output-names
50+
51+allOf:
52+ - if:
53+ properties:
54+ compatible:
55+ contains:
56+ const: brcm,bcm11351-aon-ccu
57+ then:
58+ properties:
59+ clock-output-names:
60+ items:
61+ - const: hub_timer
62+ - const: pmu_bsc
63+ - const: pmu_bsc_var
64+ - if:
65+ properties:
66+ compatible:
67+ contains:
68+ const: brcm,bcm11351-hub-ccu
69+ then:
70+ properties:
71+ clock-output-names:
72+ const: tmon_1m
73+ - if:
74+ properties:
75+ compatible:
76+ contains:
77+ const: brcm,bcm11351-master-ccu
78+ then:
79+ properties:
80+ clock-output-names:
81+ items:
82+ - const: sdio1
83+ - const: sdio2
84+ - const: sdio3
85+ - const: sdio4
86+ - const: usb_ic
87+ - const: hsic2_48m
88+ - const: hsic2_12m
89+ - if:
90+ properties:
91+ compatible:
92+ contains:
93+ enum:
94+ - brcm,bcm11351-root-ccu
95+ - brcm,bcm21664-root-ccu
96+ then:
97+ properties:
98+ clock-output-names:
99+ const: frac_1m
100+ - if:
101+ properties:
102+ compatible:
103+ contains:
104+ const: brcm,bcm11351-slave-ccu
105+ then:
106+ properties:
107+ clock-output-names:
108+ items:
109+ - const: uartb
110+ - const: uartb2
111+ - const: uartb3
112+ - const: uartb4
113+ - const: ssp0
114+ - const: ssp2
115+ - const: bsc1
116+ - const: bsc2
117+ - const: bsc3
118+ - const: pwm
119+ - if:
120+ properties:
121+ compatible:
122+ contains:
123+ const: brcm,bcm21664-aon-ccu
124+ then:
125+ properties:
126+ clock-output-names:
127+ const: hub_timer
128+ - if:
129+ properties:
130+ compatible:
131+ contains:
132+ const: brcm,bcm21664-master-ccu
133+ then:
134+ properties:
135+ clock-output-names:
136+ items:
137+ - const: sdio1
138+ - const: sdio2
139+ - const: sdio3
140+ - const: sdio4
141+ - const: sdio1_sleep
142+ - const: sdio2_sleep
143+ - const: sdio3_sleep
144+ - const: sdio4_sleep
145+ - if:
146+ properties:
147+ compatible:
148+ contains:
149+ const: brcm,bcm21664-slave-ccu
150+ then:
151+ properties:
152+ clock-output-names:
153+ items:
154+ - const: uartb
155+ - const: uartb2
156+ - const: uartb3
157+ - const: bsc1
158+ - const: bsc2
159+ - const: bsc3
160+ - const: bsc4
161+
162+additionalProperties: false
163+
164+examples:
165+ - |
166+ clock-controller@3e011000 {
167+ compatible = "brcm,bcm11351-slave-ccu";
168+ reg = <0x3e011000 0x0f00>;
169+ #clock-cells = <1>;
170+ clock-output-names = "uartb",
171+ "uartb2",
172+ "uartb3",
173+ "uartb4",
174+ "ssp0",
175+ "ssp2",
176+ "bsc1",
177+ "bsc2",
178+ "bsc3",
179+ "pwm";
180+ };
181+...
Documentation/devicetree/bindings/clock/fsl,imx93-anatop.yaml+42−0
@@ -0,0 +1,42 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/clock/fsl,imx93-anatop.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: NXP i.MX93 ANATOP Clock Module
8+
9+maintainers:
10+ - Peng Fan <peng.fan@nxp.com>
11+
12+description: |
13+ NXP i.MX93 ANATOP module which contains PLL and OSC to Clock Controller
14+ Module.
15+
16+properties:
17+ compatible:
18+ items:
19+ - const: fsl,imx93-anatop
20+
21+ reg:
22+ maxItems: 1
23+
24+ '#clock-cells':
25+ const: 1
26+
27+required:
28+ - compatible
29+ - reg
30+ - '#clock-cells'
31+
32+additionalProperties: false
33+
34+examples:
35+ - |
36+ clock-controller@44480000 {
37+ compatible = "fsl,imx93-anatop";
38+ reg = <0x44480000 0x2000>;
39+ #clock-cells = <1>;
40+ };
41+
42+...
Documentation/devicetree/bindings/clock/google,gs101-clock.yaml+106−0
@@ -0,0 +1,106 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/clock/google,gs101-clock.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Google GS101 SoC clock controller
8+
9+maintainers:
10+ - Peter Griffin <peter.griffin@linaro.org>
11+
12+description: |
13+ Google GS101 clock controller is comprised of several CMU units, generating
14+ clocks for different domains. Those CMU units are modeled as separate device
15+ tree nodes, and might depend on each other. The root clock in that clock tree
16+ is OSCCLK (24.576 MHz). That external clock must be defined as a fixed-rate
17+ clock in dts.
18+
19+ CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
20+ dividers; all other leaf clocks (other CMUs) are usually derived from CMU_TOP.
21+
22+ Each clock is assigned an identifier and client nodes can use this identifier
23+ to specify the clock which they consume. All clocks available for usage
24+ in clock consumer nodes are defined as preprocessor macros in
25+ 'dt-bindings/clock/gs101.h' header.
26+
27+properties:
28+ compatible:
29+ enum:
30+ - google,gs101-cmu-top
31+ - google,gs101-cmu-apm
32+ - google,gs101-cmu-misc
33+
34+ clocks:
35+ minItems: 1
36+ maxItems: 2
37+
38+ clock-names:
39+ minItems: 1
40+ maxItems: 2
41+
42+ "#clock-cells":
43+ const: 1
44+
45+ reg:
46+ maxItems: 1
47+
48+required:
49+ - compatible
50+ - "#clock-cells"
51+ - clocks
52+ - clock-names
53+ - reg
54+
55+allOf:
56+ - if:
57+ properties:
58+ compatible:
59+ contains:
60+ enum:
61+ - google,gs101-cmu-top
62+ - google,gs101-cmu-apm
63+ then:
64+ properties:
65+ clocks:
66+ items:
67+ - description: External reference clock (24.576 MHz)
68+
69+ clock-names:
70+ items:
71+ - const: oscclk
72+
73+ - if:
74+ properties:
75+ compatible:
76+ contains:
77+ const: google,gs101-cmu-misc
78+
79+ then:
80+ properties:
81+ clocks:
82+ items:
83+ - description: Misc bus clock (from CMU_TOP)
84+ - description: Misc sss clock (from CMU_TOP)
85+
86+ clock-names:
87+ items:
88+ - const: dout_cmu_misc_bus
89+ - const: dout_cmu_misc_sss
90+
91+additionalProperties: false
92+
93+examples:
94+ # Clock controller node for CMU_TOP
95+ - |
96+ #include <dt-bindings/clock/google,gs101.h>
97+
98+ cmu_top: clock-controller@1e080000 {
99+ compatible = "google,gs101-cmu-top";
100+ reg = <0x1e080000 0x8000>;
101+ #clock-cells = <1>;
102+ clocks = <&ext_24_5m>;
103+ clock-names = "oscclk";
104+ };
105+
106+...
Documentation/devicetree/bindings/clock/hi3620-clock.txt+0−20
@@ -1,20 +0,0 @@
1−* Hisilicon Hi3620 Clock Controller
2−
3−The Hi3620 clock controller generates and supplies clock to various
4−controllers within the Hi3620 SoC.
5−
6−Required Properties:
7−
8−- compatible: should be one of the following.
9− - "hisilicon,hi3620-clock" - controller compatible with Hi3620 SoC.
10− - "hisilicon,hi3620-mmc-clock" - controller specific for Hi3620 mmc.
11−
12−- reg: physical base address of the controller and length of memory mapped
13− region.
14−
15−- #clock-cells: should be 1.
16−
17−Each clock is assigned an identifier and client nodes use this identifier
18−to specify the clock which they consume.
19−
20−All these identifier could be found in <dt-bindings/clock/hi3620-clock.h>.
Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml+1−0
@@ -22,6 +22,7 @@ properties: · 21 unmodified lines
2222 - mediatek,mt7622-apmixedsys
2323 - mediatek,mt7981-apmixedsys
2424 - mediatek,mt7986-apmixedsys
25+ - mediatek,mt7988-apmixedsys
2526 - mediatek,mt8135-apmixedsys
2627 - mediatek,mt8173-apmixedsys
2728 - mediatek,mt8516-apmixedsys
Documentation/devicetree/bindings/clock/mediatek,ethsys.yaml+55−0
@@ -0,0 +1,55 @@
1+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/clock/mediatek,ethsys.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Mediatek ethsys controller
8+
9+description:
10+ The available clocks are defined in dt-bindings/clock/mt*-clk.h.
11+
12+maintainers:
13+ - James Liao <jamesjj.liao@mediatek.com>
14+
15+properties:
16+ compatible:
17+ oneOf:
18+ - items:
19+ - enum:
20+ - mediatek,mt2701-ethsys
21+ - mediatek,mt7622-ethsys
22+ - mediatek,mt7629-ethsys
23+ - mediatek,mt7981-ethsys
24+ - mediatek,mt7986-ethsys
25+ - mediatek,mt7988-ethsys
26+ - const: syscon
27+ - items:
28+ - const: mediatek,mt7623-ethsys
29+ - const: mediatek,mt2701-ethsys
30+ - const: syscon
31+
32+ reg:
33+ maxItems: 1
34+
35+ "#clock-cells":
36+ const: 1
37+
38+ "#reset-cells":
39+ const: 1
40+
41+required:
42+ - reg
43+ - "#clock-cells"
44+ - "#reset-cells"
45+
46+additionalProperties: false
47+
48+examples:
49+ - |
50+ clock-controller@1b000000 {
51+ compatible = "mediatek,mt2701-ethsys", "syscon";
52+ reg = <0x1b000000 0x1000>;
53+ #clock-cells = <1>;
54+ #reset-cells = <1>;
55+ };
Documentation/devicetree/bindings/clock/mediatek,mt7988-ethwarp.yaml+52−0
@@ -0,0 +1,52 @@
1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/clock/mediatek,mt7988-ethwarp.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: MediaTek MT7988 ethwarp Controller
8+
9+maintainers:
10+ - Daniel Golle <daniel@makrotopia.org>
11+
12+description:
13+ The Mediatek MT7988 ethwarp controller provides clocks and resets for the
14+ Ethernet related subsystems found the MT7988 SoC.
15+ The clock values can be found in <dt-bindings/clock/mt*-clk.h>.
16+
17+properties:
18+ compatible:
19+ items:
20+ - const: mediatek,mt7988-ethwarp
21+
22+ reg:
23+ maxItems: 1
24+
25+ '#clock-cells':
26+ const: 1
27+
28+ '#reset-cells':
29+ const: 1
30+
31+required:
32+ - compatible
33+ - reg
34+ - '#clock-cells'
35+ - '#reset-cells'
36+
37+additionalProperties: false
38+
39+examples:
40+ - |
41+ #include <dt-bindings/reset/ti-syscon.h>
42+ soc {
43+ #address-cells = <2>;
44+ #size-cells = <2>;
45+
46+ clock-controller@15031000 {
47+ compatible = "mediatek,mt7988-ethwarp";
48+ reg = <0 0x15031000 0 0x1000>;
49+ #clock-cells = <1>;
50+ #reset-cells = <1>;
51+ };
52+ };
Documentation/devicetree/bindings/clock/mediatek,mt7988-xfi-pll.yaml+48−0
@@ -0,0 +1,48 @@
1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/clock/mediatek,mt7988-xfi-pll.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: MediaTek MT7988 XFI PLL Clock Controller
8+
9+maintainers:
10+ - Daniel Golle <daniel@makrotopia.org>
11+
12+description:
13+ The MediaTek XFI PLL controller provides the 156.25MHz clock for the
14+ Ethernet SerDes PHY from the 40MHz top_xtal clock.
15+
16+properties:
17+ compatible:
18+ const: mediatek,mt7988-xfi-pll
19+
20+ reg:
21+ maxItems: 1
22+
23+ resets:
24+ maxItems: 1
25+
26+ '#clock-cells':
27+ const: 1
28+
29+required:
30+ - compatible
31+ - reg
32+ - resets
33+ - '#clock-cells'
34+
35+additionalProperties: false
36+
37+examples:
38+ - |
39+ soc {
40+ #address-cells = <2>;
41+ #size-cells = <2>;
42+ clock-controller@11f40000 {
43+ compatible = "mediatek,mt7988-xfi-pll";
44+ reg = <0 0x11f40000 0 0x1000>;
45+ resets = <&watchdog 16>;
46+ #clock-cells = <1>;
47+ };
48+ };
Documentation/devicetree/bindings/clock/mediatek,mt8188-clock.yaml+0−2
@@ -43,8 +43,6 @@ properties: · 42 unmodified lines
4343 - mediatek,mt8188-vdecsys
4444 - mediatek,mt8188-vdecsys-soc
4545 - mediatek,mt8188-vencsys
46− - mediatek,mt8188-vppsys0
47− - mediatek,mt8188-vppsys1
4846 - mediatek,mt8188-wpesys
4947 - mediatek,mt8188-wpesys-vpp0
5048
Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml+2−0
@@ -37,6 +37,8 @@ properties: · 36 unmodified lines
3737 - mediatek,mt7629-topckgen
3838 - mediatek,mt7981-topckgen
3939 - mediatek,mt7986-topckgen
40+ - mediatek,mt7988-mcusys
41+ - mediatek,mt7988-topckgen
4042 - mediatek,mt8167-topckgen
4143 - mediatek,mt8183-topckgen
4244 - const: syscon
Documentation/devicetree/bindings/clock/qcom,a53pll.yaml+1−0
@@ -16,6 +16,7 @@ description: · 15 unmodified lines
1616 properties:
1717 compatible:
1818 enum:
19+ - qcom,ipq5018-a53pll
1920 - qcom,ipq5332-a53pll
2021 - qcom,ipq6018-a53pll
2122 - qcom,ipq8074-a53pll
Documentation/devicetree/bindings/clock/qcom,camcc-sm8250.yaml+4−14
@@ -15,6 +15,9 @@ description: | · 14 unmodified lines
1515
1616 See also:: include/dt-bindings/clock/qcom,camcc-sm8250.h
1717
18+allOf:
19+ - $ref: qcom,gcc.yaml#
20+
1821 properties:
1922 compatible:
2023 const: qcom,sm8250-camcc
@@ -33,15 +36,6 @@ properties: · 12 unmodified lines
3336 - const: bi_tcxo_ao
3437 - const: sleep_clk
3538
36− '#clock-cells':
37− const: 1
38−
39− '#reset-cells':
40− const: 1
41−
42− '#power-domain-cells':
43− const: 1
44−
4539 power-domains:
4640 items:
4741 - description: MMCX power domain
@@ -56,14 +50,10 @@ properties: · 8 unmodified lines
5650
5751 required:
5852 - compatible
59− - reg
6053 - clocks
6154 - clock-names
62− - '#clock-cells'
63− - '#reset-cells'
64− - '#power-domain-cells'
6555
66−additionalProperties: false
56+unevaluatedProperties: false
6757
6858 examples:
6959 - |
Documentation/devicetree/bindings/clock/qcom,gcc-ipq6018.yaml+57−0
@@ -0,0 +1,57 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/clock/qcom,gcc-ipq6018.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Qualcomm Global Clock & Reset Controller on IPQ6018
8+
9+maintainers:
10+ - Stephen Boyd <sboyd@kernel.org>
11+ - Taniya Das <quic_tdas@quicinc.com>
12+ - Robert Marko <robimarko@gmail.com>
13+
14+description: |
15+ Qualcomm global clock control module provides the clocks, resets and power
16+ domains on IPQ6018.
17+
18+ See also::
19+ include/dt-bindings/clock/qcom,gcc-ipq6018.h
20+ include/dt-bindings/reset/qcom,gcc-ipq6018.h
21+
22+allOf:
23+ - $ref: qcom,gcc.yaml#
24+
25+properties:
26+ compatible:
27+ const: qcom,gcc-ipq6018
28+
29+ clocks:
30+ items:
31+ - description: board XO clock
32+ - description: sleep clock
33+
34+ clock-names:
35+ items:
36+ - const: xo
37+ - const: sleep_clk
38+
39+required:
40+ - compatible
41+ - clocks
42+ - clock-names
43+
44+unevaluatedProperties: false
45+
46+examples:
47+ - |
48+ clock-controller@1800000 {
49+ compatible = "qcom,gcc-ipq6018";
50+ reg = <0x01800000 0x80000>;
51+ clocks = <&xo>, <&sleep_clk>;
52+ clock-names = "xo", "sleep_clk";
53+ #clock-cells = <1>;
54+ #power-domain-cells = <1>;
55+ #reset-cells = <1>;
56+ };
57+...
Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml+4−0
@@ -27,11 +27,15 @@ properties: · 26 unmodified lines
2727 items:
2828 - description: board XO clock
2929 - description: sleep clock
30+ - description: Gen3 QMP PCIe PHY PIPE clock
31+ - description: Gen2 QMP PCIe PHY PIPE clock
3032
3133 clock-names:
3234 items:
3335 - const: xo
3436 - const: sleep_clk
37+ - const: pcie0_pipe
38+ - const: pcie1_pipe
3539
3640 required:
3741 - compatible
Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml+0−3
@@ -15,8 +15,6 @@ description: | · 14 unmodified lines
1515 domains.
1616
1717 See also::
18− include/dt-bindings/clock/qcom,gcc-ipq6018.h
19− include/dt-bindings/reset/qcom,gcc-ipq6018.h
2018 include/dt-bindings/clock/qcom,gcc-msm8953.h
2119 include/dt-bindings/clock/qcom,gcc-mdm9607.h
2220
@@ -26,7 +24,6 @@ allOf: · 3 unmodified lines
2624 properties:
2725 compatible:
2826 enum:
29− - qcom,gcc-ipq6018
3027 - qcom,gcc-mdm9607
3128
3229 required:
Documentation/devicetree/bindings/clock/qcom,qdu1000-ecpricc.yaml+68−0
@@ -0,0 +1,68 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/clock/qcom,qdu1000-ecpricc.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Qualcomm ECPRI Clock & Reset Controller for QDU1000 and QRU1000
8+
9+maintainers:
10+ - Taniya Das <quic_tdas@quicinc.com>
11+ - Imran Shaik <quic_imrashai@quicinc.com>
12+
13+description: |
14+ Qualcomm ECPRI Specification V2.0 Common Public Radio Interface clock control
15+ module which supports the clocks, resets on QDU1000 and QRU1000
16+
17+ See also:: include/dt-bindings/clock/qcom,qdu1000-ecpricc.h
18+
19+properties:
20+ compatible:
21+ enum:
22+ - qcom,qdu1000-ecpricc
23+
24+ reg:
25+ maxItems: 1
26+
27+ clocks:
28+ items:
29+ - description: Board XO source
30+ - description: GPLL0 source from GCC
31+ - description: GPLL1 source from GCC
32+ - description: GPLL2 source from GCC
33+ - description: GPLL3 source from GCC
34+ - description: GPLL4 source from GCC
35+ - description: GPLL5 source from GCC
36+
37+ '#clock-cells':
38+ const: 1
39+
40+ '#reset-cells':
41+ const: 1
42+
43+required:
44+ - compatible
45+ - reg
46+ - clocks
47+ - '#clock-cells'
48+ - '#reset-cells'
49+
50+additionalProperties: false
51+
52+examples:
53+ - |
54+ #include <dt-bindings/clock/qcom,qdu1000-gcc.h>
55+ #include <dt-bindings/clock/qcom,rpmh.h>
56+ clock-controller@280000 {
57+ compatible = "qcom,qdu1000-ecpricc";
58+ reg = <0x00280000 0x31c00>;
59+ clocks = <&rpmhcc RPMH_CXO_CLK>,
60+ <&gcc GCC_ECPRI_CC_GPLL0_CLK_SRC>,
61+ <&gcc GCC_ECPRI_CC_GPLL1_EVEN_CLK_SRC>,
62+ <&gcc GCC_ECPRI_CC_GPLL2_EVEN_CLK_SRC>,
63+ <&gcc GCC_ECPRI_CC_GPLL3_CLK_SRC>,
64+ <&gcc GCC_ECPRI_CC_GPLL4_CLK_SRC>,
65+ <&gcc GCC_ECPRI_CC_GPLL5_EVEN_CLK_SRC>;
66+ #clock-cells = <1>;
67+ #reset-cells = <1>;
68+ };
Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml+2−0
@@ -35,6 +35,8 @@ properties: · 34 unmodified lines
3535 - qcom,sm8350-rpmh-clk
3636 - qcom,sm8450-rpmh-clk
3737 - qcom,sm8550-rpmh-clk
38+ - qcom,sm8650-rpmh-clk
39+ - qcom,x1e80100-rpmh-clk
3840
3941 clocks:
4042 maxItems: 1
Documentation/devicetree/bindings/clock/qcom,sc7180-camcc.yaml+4−14
@@ -15,6 +15,9 @@ description: | · 14 unmodified lines
1515
1616 See also:: include/dt-bindings/clock/qcom,camcc-sc7180.h
1717
18+allOf:
19+ - $ref: qcom,gcc.yaml#
20+
1821 properties:
1922 compatible:
2023 const: qcom,sc7180-camcc
@@ -31,28 +34,15 @@ properties: · 10 unmodified lines
3134 - const: iface
3235 - const: xo
3336
34− '#clock-cells':
35− const: 1
36−
37− '#reset-cells':
38− const: 1
39−
40− '#power-domain-cells':
41− const: 1
42−
4337 reg:
4438 maxItems: 1
4539
4640 required:
4741 - compatible
48− - reg
4942 - clocks
5043 - clock-names
51− - '#clock-cells'
52− - '#reset-cells'
53− - '#power-domain-cells'
5444
55−additionalProperties: false
45+unevaluatedProperties: false
5646
5747 examples:
5848 - |
Documentation/devicetree/bindings/clock/qcom,sc7280-camcc.yaml+4−14
@@ -15,6 +15,9 @@ description: | · 14 unmodified lines
1515
1616 See also:: include/dt-bindings/clock/qcom,camcc-sc7280.h
1717
18+allOf:
19+ - $ref: qcom,gcc.yaml#
20+
1821 properties:
1922 compatible:
2023 const: qcom,sc7280-camcc
@@ -31,28 +34,15 @@ properties: · 10 unmodified lines
3134 - const: bi_tcxo_ao
3235 - const: sleep_clk
3336
34− '#clock-cells':
35− const: 1
36−
37− '#reset-cells':
38− const: 1
39−
40− '#power-domain-cells':
41− const: 1
42−
4337 reg:
4438 maxItems: 1
4539
4640 required:
4741 - compatible
48− - reg
4942 - clocks
5043 - clock-names
51− - '#clock-cells'
52− - '#reset-cells'
53− - '#power-domain-cells'
5444
55−additionalProperties: false
45+unevaluatedProperties: false
5646
5747 examples:
5848 - |
Documentation/devicetree/bindings/clock/qcom,sdm845-camcc.yaml+4−14
@@ -15,6 +15,9 @@ description: | · 14 unmodified lines
1515
1616 See also:: include/dt-bindings/clock/qcom,camcc-sm845.h
1717
18+allOf:
19+ - $ref: qcom,gcc.yaml#
20+
1821 properties:
1922 compatible:
2023 const: qcom,sdm845-camcc
@@ -27,28 +30,15 @@ properties: · 6 unmodified lines
2730 items:
2831 - const: bi_tcxo
2932
30− '#clock-cells':
31− const: 1
32−
33− '#reset-cells':
34− const: 1
35−
36− '#power-domain-cells':
37− const: 1
38−
3933 reg:
4034 maxItems: 1
4135
4236 required:
4337 - compatible
44− - reg
4538 - clocks
4639 - clock-names
47− - '#clock-cells'
48− - '#reset-cells'
49− - '#power-domain-cells'
5040
51−additionalProperties: false
41+unevaluatedProperties: false
5242
5343 examples:
5444 - |
Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml+6−14
@@ -16,10 +16,15 @@ description: | · 15 unmodified lines
1616 See also::
1717 include/dt-bindings/clock/qcom,sm8450-camcc.h
1818 include/dt-bindings/clock/qcom,sm8550-camcc.h
19+ include/dt-bindings/clock/qcom,sc8280xp-camcc.h
20+
21+allOf:
22+ - $ref: qcom,gcc.yaml#
1923
2024 properties:
2125 compatible:
2226 enum:
27+ - qcom,sc8280xp-camcc
2328 - qcom,sm8450-camcc
2429 - qcom,sm8550-camcc
2530
@@ -40,29 +45,16 @@ properties: · 14 unmodified lines
4045 description:
4146 A phandle to an OPP node describing required MMCX performance point.
4247
43− '#clock-cells':
44− const: 1
45−
46− '#reset-cells':
47− const: 1
48−
49− '#power-domain-cells':
50− const: 1
51−
5248 reg:
5349 maxItems: 1
5450
5551 required:
5652 - compatible
57− - reg
5853 - clocks
5954 - power-domains
6055 - required-opps
61− - '#clock-cells'
62− - '#reset-cells'
63− - '#power-domain-cells'
6456
65−additionalProperties: false
57+unevaluatedProperties: false
6658
6759 examples:
6860 - |
Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml+2−0
@@ -17,12 +17,14 @@ description: | · 16 unmodified lines
1717 include/dt-bindings/clock/qcom,sm8450-gpucc.h
1818 include/dt-bindings/clock/qcom,sm8550-gpucc.h
1919 include/dt-bindings/reset/qcom,sm8450-gpucc.h
20+ include/dt-bindings/reset/qcom,sm8650-gpucc.h
2021
2122 properties:
2223 compatible:
2324 enum:
2425 - qcom,sm8450-gpucc
2526 - qcom,sm8550-gpucc
27+ - qcom,sm8650-gpucc
2628
2729 clocks:
2830 items:
Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml+6−2
@@ -13,12 +13,16 @@ description: | · 12 unmodified lines
1313 Qualcomm TCSR clock control module provides the clocks, resets and
1414 power domains on SM8550
1515
16− See also:: include/dt-bindings/clock/qcom,sm8550-tcsr.h
16+ See also:
17+ - include/dt-bindings/clock/qcom,sm8550-tcsr.h
18+ - include/dt-bindings/clock/qcom,sm8650-tcsr.h
1719
1820 properties:
1921 compatible:
2022 items:
21− - const: qcom,sm8550-tcsr
23+ - enum:
24+ - qcom,sm8550-tcsr
25+ - qcom,sm8650-tcsr
2226 - const: syscon
2327
2428 clocks:
Documentation/devicetree/bindings/clock/qcom,sm8650-dispcc.yaml+106−0
@@ -0,0 +1,106 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/clock/qcom,sm8650-dispcc.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Qualcomm Display Clock & Reset Controller for SM8650
8+
9+maintainers:
10+ - Bjorn Andersson <andersson@kernel.org>
11+ - Neil Armstrong <neil.armstrong@linaro.org>
12+
13+description: |
14+ Qualcomm display clock control module provides the clocks, resets and power
15+ domains on SM8650.
16+
17+ See also:: include/dt-bindings/clock/qcom,sm8650-dispcc.h
18+
19+properties:
20+ compatible:
21+ enum:
22+ - qcom,sm8650-dispcc
23+
24+ clocks:
25+ items:
26+ - description: Board XO source
27+ - description: Board Always On XO source
28+ - description: Display's AHB clock
29+ - description: sleep clock
30+ - description: Byte clock from DSI PHY0
31+ - description: Pixel clock from DSI PHY0
32+ - description: Byte clock from DSI PHY1
33+ - description: Pixel clock from DSI PHY1
34+ - description: Link clock from DP PHY0
35+ - description: VCO DIV clock from DP PHY0
36+ - description: Link clock from DP PHY1
37+ - description: VCO DIV clock from DP PHY1
38+ - description: Link clock from DP PHY2
39+ - description: VCO DIV clock from DP PHY2
40+ - description: Link clock from DP PHY3
41+ - description: VCO DIV clock from DP PHY3
42+
43+ '#clock-cells':
44+ const: 1
45+
46+ '#reset-cells':
47+ const: 1
48+
49+ '#power-domain-cells':
50+ const: 1
51+
52+ reg:
53+ maxItems: 1
54+
55+ power-domains:
56+ description:
57+ A phandle and PM domain specifier for the MMCX power domain.
58+ maxItems: 1
59+
60+ required-opps:
61+ description:
62+ A phandle to an OPP node describing required MMCX performance point.
63+ maxItems: 1
64+
65+required:
66+ - compatible
67+ - reg
68+ - clocks
69+ - '#clock-cells'
70+ - '#reset-cells'
71+ - '#power-domain-cells'
72+
73+additionalProperties: false
74+
75+examples:
76+ - |
77+ #include <dt-bindings/clock/qcom,sm8650-gcc.h>
78+ #include <dt-bindings/clock/qcom,rpmh.h>
79+ #include <dt-bindings/power/qcom-rpmpd.h>
80+ #include <dt-bindings/power/qcom,rpmhpd.h>
81+ clock-controller@af00000 {
82+ compatible = "qcom,sm8650-dispcc";
83+ reg = <0x0af00000 0x10000>;
84+ clocks = <&rpmhcc RPMH_CXO_CLK>,
85+ <&rpmhcc RPMH_CXO_CLK_A>,
86+ <&gcc GCC_DISP_AHB_CLK>,
87+ <&sleep_clk>,
88+ <&dsi0_phy 0>,
89+ <&dsi0_phy 1>,
90+ <&dsi1_phy 0>,
91+ <&dsi1_phy 1>,
92+ <&dp0_phy 0>,
93+ <&dp0_phy 1>,
94+ <&dp1_phy 0>,
95+ <&dp1_phy 1>,
96+ <&dp2_phy 0>,
97+ <&dp2_phy 1>,
98+ <&dp3_phy 0>,
99+ <&dp3_phy 1>;
100+ #clock-cells = <1>;
101+ #reset-cells = <1>;
102+ #power-domain-cells = <1>;
103+ power-domains = <&rpmhpd RPMHPD_MMCX>;
104+ required-opps = <&rpmhpd_opp_low_svs>;
105+ };
106+...
Documentation/devicetree/bindings/clock/qcom,sm8650-gcc.yaml+65−0
@@ -0,0 +1,65 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/clock/qcom,sm8650-gcc.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Qualcomm Global Clock & Reset Controller on SM8650
8+
9+maintainers:
10+ - Bjorn Andersson <andersson@kernel.org>
11+
12+description: |
13+ Qualcomm global clock control module provides the clocks, resets and power
14+ domains on SM8650
15+
16+ See also:: include/dt-bindings/clock/qcom,sm8650-gcc.h
17+
18+properties:
19+ compatible:
20+ const: qcom,sm8650-gcc
21+
22+ clocks:
23+ items:
24+ - description: Board XO source
25+ - description: Board Always On XO source
26+ - description: Sleep clock source
27+ - description: PCIE 0 Pipe clock source
28+ - description: PCIE 1 Pipe clock source
29+ - description: PCIE 1 Phy Auxiliary clock source
30+ - description: UFS Phy Rx symbol 0 clock source
31+ - description: UFS Phy Rx symbol 1 clock source
32+ - description: UFS Phy Tx symbol 0 clock source
33+ - description: USB3 Phy wrapper pipe clock source
34+
35+required:
36+ - compatible
37+ - clocks
38+
39+allOf:
40+ - $ref: qcom,gcc.yaml#
41+
42+unevaluatedProperties: false
43+
44+examples:
45+ - |
46+ #include <dt-bindings/clock/qcom,rpmh.h>
47+ clock-controller@100000 {
48+ compatible = "qcom,sm8650-gcc";
49+ reg = <0x00100000 0x001f4200>;
50+ clocks = <&rpmhcc RPMH_CXO_CLK>,
51+ <&rpmhcc RPMH_CXO_CLK_A>,
52+ <&sleep_clk>,
53+ <&pcie0_phy>,
54+ <&pcie1_phy>,
55+ <&pcie_1_phy_aux_clk>,
56+ <&ufs_mem_phy 0>,
57+ <&ufs_mem_phy 1>,
58+ <&ufs_mem_phy 2>,
59+ <&usb_1_qmpphy>;
60+ #clock-cells = <1>;
61+ #reset-cells = <1>;
62+ #power-domain-cells = <1>;
63+ };
64+
65+...
Documentation/devicetree/bindings/clock/qcom,x1e80100-gcc.yaml+72−0
@@ -0,0 +1,72 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/clock/qcom,x1e80100-gcc.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Qualcomm Global Clock & Reset Controller on X1E80100
8+
9+maintainers:
10+ - Rajendra Nayak <quic_rjendra@quicinc.com>
11+
12+description: |
13+ Qualcomm global clock control module provides the clocks, resets and power
14+ domains on X1E80100
15+
16+ See also:: include/dt-bindings/clock/qcom,x1e80100-gcc.h
17+
18+properties:
19+ compatible:
20+ const: qcom,x1e80100-gcc
21+
22+ clocks:
23+ items:
24+ - description: Board XO source
25+ - description: Sleep clock source
26+ - description: PCIe 3 pipe clock
27+ - description: PCIe 4 pipe clock
28+ - description: PCIe 5 pipe clock
29+ - description: PCIe 6a pipe clock
30+ - description: PCIe 6b pipe clock
31+ - description: USB QMP Phy 0 clock source
32+ - description: USB QMP Phy 1 clock source
33+ - description: USB QMP Phy 2 clock source
34+
35+ power-domains:
36+ description:
37+ A phandle and PM domain specifier for the CX power domain.
38+ maxItems: 1
39+
40+required:
41+ - compatible
42+ - clocks
43+ - power-domains
44+
45+allOf:
46+ - $ref: qcom,gcc.yaml#
47+
48+unevaluatedProperties: false
49+
50+examples:
51+ - |
52+ #include <dt-bindings/power/qcom,rpmhpd.h>
53+ clock-controller@100000 {
54+ compatible = "qcom,x1e80100-gcc";
55+ reg = <0x00100000 0x200000>;
56+ clocks = <&bi_tcxo_div2>,
57+ <&sleep_clk>,
58+ <&pcie3_phy>,
59+ <&pcie4_phy>,
60+ <&pcie5_phy>,
61+ <&pcie6a_phy>,
62+ <&pcie6b_phy>,
63+ <&usb_1_ss0_qmpphy 0>,
64+ <&usb_1_ss1_qmpphy 1>,
65+ <&usb_1_ss2_qmpphy 2>;
66+ power-domains = <&rpmhpd RPMHPD_CX>;
67+ #clock-cells = <1>;
68+ #reset-cells = <1>;
69+ #power-domain-cells = <1>;
70+ };
71+
72+...
Documentation/devicetree/bindings/clock/renesas,9series.yaml+10−0
@@ -21,6 +21,15 @@ description: | · 20 unmodified lines
2121 1 -- DIF1
2222 2 -- DIF2
2323 3 -- DIF3
24+ - 9FGV0841:
25+ 0 -- DIF0
26+ 1 -- DIF1
27+ 2 -- DIF2
28+ 3 -- DIF3
29+ 4 -- DIF4
30+ 5 -- DIF5
31+ 6 -- DIF6
32+ 7 -- DIF7
2433
2534 maintainers:
2635 - Marek Vasut <marex@denx.de>
@@ -30,6 +39,7 @@ properties: · 3 unmodified lines
3039 enum:
3140 - renesas,9fgv0241
3241 - renesas,9fgv0441
42+ - renesas,9fgv0841
3343
3444 reg:
3545 description: I2C device address
Documentation/devicetree/bindings/clock/silabs,si5351.txt+0−126
@@ -1,126 +0,0 @@
1−Binding for Silicon Labs Si5351a/b/c programmable i2c clock generator.
2−
3−Reference
4−[1] Si5351A/B/C Data Sheet
5− https://www.skyworksinc.com/-/media/Skyworks/SL/documents/public/data-sheets/Si5351-B.pdf
6−
7−The Si5351a/b/c are programmable i2c clock generators with up to 8 output
8−clocks. Si5351a also has a reduced pin-count package (MSOP10) where only
9−3 output clocks are accessible. The internal structure of the clock
10−generators can be found in [1].
11−
12−==I2C device node==
13−
14−Required properties:
15−- compatible: shall be one of the following:
16− "silabs,si5351a" - Si5351a, QFN20 package
17− "silabs,si5351a-msop" - Si5351a, MSOP10 package
18− "silabs,si5351b" - Si5351b, QFN20 package
19− "silabs,si5351c" - Si5351c, QFN20 package
20−- reg: i2c device address, shall be 0x60 or 0x61.
21−- #clock-cells: from common clock binding; shall be set to 1.
22−- clocks: from common clock binding; list of parent clock
23− handles, shall be xtal reference clock or xtal and clkin for
24− si5351c only. Corresponding clock input names are "xtal" and
25− "clkin" respectively.
26−- #address-cells: shall be set to 1.
27−- #size-cells: shall be set to 0.
28−
29−Optional properties:
30−- silabs,pll-source: pair of (number, source) for each pll. Allows
31− to overwrite clock source of pll A (number=0) or B (number=1).
32−
33−==Child nodes==
34−
35−Each of the clock outputs can be overwritten individually by
36−using a child node to the I2C device node. If a child node for a clock
37−output is not set, the eeprom configuration is not overwritten.
38−
39−Required child node properties:
40−- reg: number of clock output.
41−
42−Optional child node properties:
43−- silabs,clock-source: source clock of the output divider stage N, shall be
44− 0 = multisynth N
45− 1 = multisynth 0 for output clocks 0-3, else multisynth4
46− 2 = xtal
47− 3 = clkin (si5351c only)
48−- silabs,drive-strength: output drive strength in mA, shall be one of {2,4,6,8}.
49−- silabs,multisynth-source: source pll A(0) or B(1) of corresponding multisynth
50− divider.
51−- silabs,pll-master: boolean, multisynth can change pll frequency.
52−- silabs,pll-reset: boolean, clock output can reset its pll.
53−- silabs,disable-state : clock output disable state, shall be
54− 0 = clock output is driven LOW when disabled
55− 1 = clock output is driven HIGH when disabled
56− 2 = clock output is FLOATING (HIGH-Z) when disabled
57− 3 = clock output is NEVER disabled
58−
59−==Example==
60−
61−/* 25MHz reference crystal */
62−ref25: ref25M {
63− compatible = "fixed-clock";
64− #clock-cells = <0>;
65− clock-frequency = <25000000>;
66−};
67−
68−i2c-master-node {
69−
70− /* Si5351a msop10 i2c clock generator */
71− si5351a: clock-generator@60 {
72− compatible = "silabs,si5351a-msop";
73− reg = <0x60>;
74− #address-cells = <1>;
75− #size-cells = <0>;
76− #clock-cells = <1>;
77−
78− /* connect xtal input to 25MHz reference */
79− clocks = <&ref25>;
80− clock-names = "xtal";
81−
82− /* connect xtal input as source of pll0 and pll1 */
83− silabs,pll-source = <0 0>, <1 0>;
84−
85− /*
86− * overwrite clkout0 configuration with:
87− * - 8mA output drive strength
88− * - pll0 as clock source of multisynth0
89− * - multisynth0 as clock source of output divider
90− * - multisynth0 can change pll0
91− * - set initial clock frequency of 74.25MHz
92− */
93− clkout0 {
94− reg = <0>;
95− silabs,drive-strength = <8>;
96− silabs,multisynth-source = <0>;
97− silabs,clock-source = <0>;
98− silabs,pll-master;
99− clock-frequency = <74250000>;
100− };
101−
102− /*
103− * overwrite clkout1 configuration with:
104− * - 4mA output drive strength
105− * - pll1 as clock source of multisynth1
106− * - multisynth1 as clock source of output divider
107− * - multisynth1 can change pll1
108− */
109− clkout1 {
110− reg = <1>;
111− silabs,drive-strength = <4>;
112− silabs,multisynth-source = <1>;
113− silabs,clock-source = <0>;
114− pll-master;
115− };
116−
117− /*
118− * overwrite clkout2 configuration with:
119− * - xtal as clock source of output divider
120− */
121− clkout2 {
122− reg = <2>;
123− silabs,clock-source = <2>;
124− };
125− };
126−};
Documentation/devicetree/bindings/clock/silabs,si5351.yaml+265−0
@@ -0,0 +1,265 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/clock/silabs,si5351.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Silicon Labs Si5351A/B/C programmable I2C clock generators
8+
9+description: |
10+ The Silicon Labs Si5351A/B/C are programmable I2C clock generators with up to
11+ 8 outputs. Si5351A also has a reduced pin-count package (10-MSOP) where only 3
12+ output clocks are accessible. The internal structure of the clock generators
13+ can be found in [1].
14+
15+ [1] Si5351A/B/C Data Sheet
16+ https://www.skyworksinc.com/-/media/Skyworks/SL/documents/public/data-sheets/Si5351-B.pdf
17+
18+maintainers:
19+ - Alvin Šipraga <alsi@bang-olufsen.dk>
20+
21+properties:
22+ compatible:
23+ enum:
24+ - silabs,si5351a # Si5351A, 20-QFN package
25+ - silabs,si5351a-msop # Si5351A, 10-MSOP package
26+ - silabs,si5351b # Si5351B, 20-QFN package
27+ - silabs,si5351c # Si5351C, 20-QFN package
28+
29+ reg:
30+ enum:
31+ - 0x60
32+ - 0x61
33+
34+ "#address-cells":
35+ const: 1
36+
37+ "#size-cells":
38+ const: 0
39+
40+ "#clock-cells":
41+ const: 1
42+
43+ clocks:
44+ minItems: 1
45+ maxItems: 2
46+
47+ clock-names:
48+ minItems: 1
49+ items:
50+ - const: xtal
51+ - const: clkin
52+
53+ silabs,pll-source:
54+ $ref: /schemas/types.yaml#/definitions/uint32-matrix
55+ description: |
56+ A list of cell pairs containing a PLL index and its source. Allows to
57+ overwrite clock source of the internal PLLs.
58+ items:
59+ items:
60+ - description: PLL A (0) or PLL B (1)
61+ enum: [ 0, 1 ]
62+ - description: PLL source, XTAL (0) or CLKIN (1, Si5351C only).
63+ enum: [ 0, 1 ]
64+
65+ silabs,pll-reset-mode:
66+ $ref: /schemas/types.yaml#/definitions/uint32-matrix
67+ minItems: 1
68+ maxItems: 2
69+ description: A list of cell pairs containing a PLL index and its reset mode.
70+ items:
71+ items:
72+ - description: PLL A (0) or PLL B (1)
73+ enum: [ 0, 1 ]
74+ - description: |
75+ Reset mode for the PLL. Mode can be one of:
76+
77+ 0 - reset whenever PLL rate is adjusted (default mode)
78+ 1 - do not reset when PLL rate is adjusted
79+
80+ In mode 1, the PLL is only reset if the silabs,pll-reset is
81+ specified in one of the clock output child nodes that also sources
82+ the PLL. This mode may be preferable if output clocks are expected
83+ to be adjusted without glitches.
84+ enum: [ 0, 1 ]
85+
86+patternProperties:
87+ "^clkout@[0-7]$":
88+ type: object
89+
90+ additionalProperties: false
91+
92+ properties:
93+ reg:
94+ description: Clock output number.
95+
96+ clock-frequency: true
97+
98+ silabs,clock-source:
99+ $ref: /schemas/types.yaml#/definitions/uint32
100+ description: |
101+ Source clock of the this output's divider stage.
102+
103+ 0 - use multisynth N for this output, where N is the output number
104+ 1 - use either multisynth 0 (if output number is 0-3) or multisynth 4
105+ (otherwise) for this output
106+ 2 - use XTAL for this output
107+ 3 - use CLKIN for this output (Si5351C only)
108+
109+ silabs,drive-strength:
110+ $ref: /schemas/types.yaml#/definitions/uint32
111+ enum: [ 2, 4, 6, 8 ]
112+ description: Output drive strength in mA.
113+
114+ silabs,multisynth-source:
115+ $ref: /schemas/types.yaml#/definitions/uint32
116+ enum: [ 0, 1 ]
117+ description:
118+ Source PLL A (0) or B (1) for the corresponding multisynth divider.
119+
120+ silabs,pll-master:
121+ type: boolean
122+ description: |
123+ The frequency of the source PLL is allowed to be changed by the
124+ multisynth when setting the rate of this clock output.
125+
126+ silabs,pll-reset:
127+ type: boolean
128+ description: Reset the source PLL when enabling this clock output.
129+
130+ silabs,disable-state:
131+ $ref: /schemas/types.yaml#/definitions/uint32
132+ enum: [ 0, 1, 2, 3 ]
133+ description: |
134+ Clock output disable state. The state can be one of:
135+
136+ 0 - clock output is driven LOW when disabled
137+ 1 - clock output is driven HIGH when disabled
138+ 2 - clock output is FLOATING (HIGH-Z) when disabled
139+ 3 - clock output is never disabled
140+
141+ allOf:
142+ - if:
143+ properties:
144+ compatible:
145+ contains:
146+ const: silabs,si5351a-msop
147+ then:
148+ properties:
149+ reg:
150+ maximum: 2
151+ else:
152+ properties:
153+ reg:
154+ maximum: 7
155+
156+ - if:
157+ properties:
158+ compatible:
159+ contains:
160+ const: silabs,si5351c
161+ then:
162+ properties:
163+ silabs,clock-source:
164+ enum: [ 0, 1, 2, 3 ]
165+ else:
166+ properties:
167+ silabs,clock-source:
168+ enum: [ 0, 1, 2 ]
169+
170+ required:
171+ - reg
172+
173+allOf:
174+ - if:
175+ properties:
176+ compatible:
177+ contains:
178+ enum:
179+ - silabs,si5351a
180+ - silabs,si5351a-msop
181+ - silabs,si5351b
182+ then:
183+ properties:
184+ clocks:
185+ maxItems: 1
186+ clock-names:
187+ maxItems: 1
188+
189+required:
190+ - reg
191+ - "#address-cells"
192+ - "#size-cells"
193+ - "#clock-cells"
194+ - clocks
195+ - clock-names
196+
197+unevaluatedProperties: false
198+
199+examples:
200+ - |
201+ i2c {
202+ #address-cells = <1>;
203+ #size-cells = <0>;
204+
205+ clock-generator@60 {
206+ compatible = "silabs,si5351a-msop";
207+ reg = <0x60>;
208+ #address-cells = <1>;
209+ #size-cells = <0>;
210+ #clock-cells = <1>;
211+
212+ /* Connect XTAL input to 25MHz reference */
213+ clocks = <&ref25>;
214+ clock-names = "xtal";
215+
216+ /* Use XTAL input as source of PLL0 and PLL1 */
217+ silabs,pll-source = <0 0>, <1 0>;
218+
219+ /* Don't reset PLL1 on rate adjustment */
220+ silabs,pll-reset-mode = <1 1>;
221+
222+ /*
223+ * Overwrite CLK0 configuration with:
224+ * - 8 mA output drive strength
225+ * - PLL0 as clock source of multisynth 0
226+ * - Multisynth 0 as clock source of output divider
227+ * - Multisynth 0 can change PLL0
228+ * - Set initial clock frequency of 74.25MHz
229+ */
230+ clkout@0 {
231+ reg = <0>;
232+ silabs,drive-strength = <8>;
233+ silabs,multisynth-source = <0>;
234+ silabs,clock-source = <0>;
235+ silabs,pll-master;
236+ clock-frequency = <74250000>;
237+ };
238+
239+ /*
240+ * Overwrite CLK1 configuration with:
241+ * - 4 mA output drive strength
242+ * - PLL1 as clock source of multisynth 1
243+ * - Multisynth 1 as clock source of output divider
244+ * - Multisynth 1 can change PLL1
245+ * - Reset PLL1 when enabling this clock output
246+ */
247+ clkout@1 {
248+ reg = <1>;
249+ silabs,drive-strength = <4>;
250+ silabs,multisynth-source = <1>;
251+ silabs,clock-source = <0>;
252+ silabs,pll-master;
253+ silabs,pll-reset;
254+ };
255+
256+ /*
257+ * Overwrite CLK2 configuration with:
258+ * - XTAL as clock source of output divider
259+ */
260+ clkout@2 {
261+ reg = <2>;
262+ silabs,clock-source = <2>;
263+ };
264+ };
265+ };
Documentation/devicetree/bindings/clock/sophgo,cv1800-clk.yaml+46−0
@@ -0,0 +1,46 @@
1+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/clock/sophgo,cv1800-clk.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Sophgo CV1800 Series Clock Controller
8+
9+maintainers:
10+ - Inochi Amaoto <inochiama@outlook.com>
11+
12+properties:
13+ compatible:
14+ enum:
15+ - sophgo,cv1800-clk
16+ - sophgo,cv1810-clk
17+
18+ reg:
19+ maxItems: 1
20+
21+ clocks:
22+ maxItems: 1
23+
24+ "#clock-cells":
25+ const: 1
26+ description:
27+ See <dt-bindings/clock/sophgo,cv1800.h> for valid indices.
28+
29+required:
30+ - compatible
31+ - reg
32+ - clocks
33+ - "#clock-cells"
34+
35+additionalProperties: false
36+
37+examples:
38+ - |
39+ clock-controller@3002000 {
40+ compatible = "sophgo,cv1800-clk";
41+ reg = <0x03002000 0x1000>;
42+ clocks = <&osc>;
43+ #clock-cells = <1>;
44+ };
45+
46+...
Documentation/devicetree/bindings/clock/st,stm32mp25-rcc.yaml+76−0
@@ -0,0 +1,76 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/clock/st,stm32mp25-rcc.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: STM32MP25 Reset Clock Controller
8+
9+maintainers:
10+ - Gabriel Fernandez <gabriel.fernandez@foss.st.com>
11+
12+description: |
13+ The RCC hardware block is both a reset and a clock controller.
14+ RCC makes also power management (resume/supend).
15+
16+ See also::
17+ include/dt-bindings/clock/st,stm32mp25-rcc.h
18+ include/dt-bindings/reset/st,stm32mp25-rcc.h
19+
20+properties:
21+ compatible:
22+ enum:
23+ - st,stm32mp25-rcc
24+
25+ reg:
26+ maxItems: 1
27+
28+ '#clock-cells':
29+ const: 1
30+
31+ '#reset-cells':
32+ const: 1
33+
34+ clocks:
35+ items:
36+ - description: CK_SCMI_HSE High Speed External oscillator (8 to 48 MHz)
37+ - description: CK_SCMI_HSI High Speed Internal oscillator (~ 64 MHz)
38+ - description: CK_SCMI_MSI Low Power Internal oscillator (~ 4 MHz or ~ 16 MHz)
39+ - description: CK_SCMI_LSE Low Speed External oscillator (32 KHz)
40+ - description: CK_SCMI_LSI Low Speed Internal oscillator (~ 32 KHz)
41+
42+ clock-names:
43+ items:
44+ - const: hse
45+ - const: hsi
46+ - const: msi
47+ - const: lse
48+ - const: lsi
49+
50+required:
51+ - compatible
52+ - reg
53+ - '#clock-cells'
54+ - '#reset-cells'
55+ - clocks
56+ - clock-names
57+
58+additionalProperties: false
59+
60+examples:
61+ - |
62+ #include <dt-bindings/clock/st,stm32mp25-rcc.h>
63+
64+ rcc: clock-controller@44200000 {
65+ compatible = "st,stm32mp25-rcc";
66+ reg = <0x44200000 0x10000>;
67+ #clock-cells = <1>;
68+ #reset-cells = <1>;
69+ clock-names = "hse", "hsi", "msi", "lse", "lsi";
70+ clocks = <&scmi_clk CK_SCMI_HSE>,
71+ <&scmi_clk CK_SCMI_HSI>,
72+ <&scmi_clk CK_SCMI_MSI>,
73+ <&scmi_clk CK_SCMI_LSE>,
74+ <&scmi_clk CK_SCMI_LSI>;
75+ };
76+...
Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml+1−0
@@ -20,6 +20,7 @@ properties: · 19 unmodified lines
2020 - xlnx,clocking-wizard
2121 - xlnx,clocking-wizard-v5.2
2222 - xlnx,clocking-wizard-v6.0
23+ - xlnx,versal-clk-wizard
2324
2425
2526 reg:
Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml+25−6
@@ -31,11 +31,11 @@ properties: · 30 unmodified lines
3131 clocks:
3232 description: List of clock specifiers which are external input
3333 clocks to the given clock controller.
34− minItems: 3
34+ minItems: 2
3535 maxItems: 8
3636
3737 clock-names:
38− minItems: 3
38+ minItems: 2
3939 maxItems: 8
4040
4141 required:
@@ -59,15 +59,34 @@ allOf: · 17 unmodified lines
5959 clocks:
6060 items:
6161 - description: reference clock
62− - description: alternate reference clock
6362 - description: alternate reference clock for programmable logic
6463
6564 clock-names:
6665 items:
6766 - const: ref
68− - const: alt_ref
6967 - const: pl_alt_ref
7068
69+ - if:
70+ properties:
71+ compatible:
72+ contains:
73+ enum:
74+ - xlnx,versal-net-clk
75+
76+ then:
77+ properties:
78+ clocks:
79+ items:
80+ - description: reference clock
81+ - description: alternate reference clock for programmable logic
82+ - description: alternate reference clock
83+
84+ clock-names:
85+ items:
86+ - const: ref
87+ - const: pl_alt_ref
88+ - const: alt_ref
89+
7190 - if:
7291 properties:
7392 compatible:
@@ -110,8 +129,8 @@ examples: · 36 unmodified lines
110129 versal_clk: clock-controller {
111130 #clock-cells = <1>;
112131 compatible = "xlnx,versal-clk";
113− clocks = <&ref>, <&alt_ref>, <&pl_alt_ref>;
114− clock-names = "ref", "alt_ref", "pl_alt_ref";
132+ clocks = <&ref>, <&pl_alt_ref>;
133+ clock-names = "ref", "pl_alt_ref";
115134 };
116135 };
117136 };
Documentation/devicetree/bindings/connector/usb-connector.yaml+94−30
@@ -66,7 +66,6 @@ properties: · 65 unmodified lines
6666 Particularly, if use an output GPIO to control a VBUS regulator, should
6767 model it as a regulator. See bindings/regulator/fixed-regulator.yaml
6868
69− # The following are optional properties for "usb-c-connector".
7069 power-role:
7170 description: Determines the power role that the Type C connector will
7271 support. "dual" refers to Dual Role Port (DRP).
@@ -119,30 +118,6 @@ properties: · 46 unmodified lines
119118
120119 # The following are optional properties for "usb-c-connector" with power
121120 # delivery support.
122− source-pdos:
123− description: An array of u32 with each entry providing supported power
124− source data object(PDO), the detailed bit definitions of PDO can be found
125− in "Universal Serial Bus Power Delivery Specification" chapter 6.4.1.2
126− Source_Capabilities Message, the order of each entry(PDO) should follow
127− the PD spec chapter 6.4.1. Required for power source and power dual role.
128− User can specify the source PDO array via PDO_FIXED/BATT/VAR/PPS_APDO()
129− defined in dt-bindings/usb/pd.h.
130− minItems: 1
131− maxItems: 7
132− $ref: /schemas/types.yaml#/definitions/uint32-array
133−
134− sink-pdos:
135− description: An array of u32 with each entry providing supported power sink
136− data object(PDO), the detailed bit definitions of PDO can be found in
137− "Universal Serial Bus Power Delivery Specification" chapter 6.4.1.3
138− Sink Capabilities Message, the order of each entry(PDO) should follow the
139− PD spec chapter 6.4.1. Required for power sink and power dual role. User
140− can specify the sink PDO array via PDO_FIXED/BATT/VAR/PPS_APDO() defined
141− in dt-bindings/usb/pd.h.
142− minItems: 1
143− maxItems: 7
144− $ref: /schemas/types.yaml#/definitions/uint32-array
145−
146121 sink-vdos:
147122 description: An array of u32 with each entry, a Vendor Defined Message Object (VDO),
148123 providing additional information corresponding to the product, the detailed bit
@@ -166,10 +141,43 @@ properties: · 17 unmodified lines
166141 maxItems: 6
167142 $ref: /schemas/types.yaml#/definitions/uint32-array
168143
169− op-sink-microwatt:
170− description: Sink required operating power in microwatt, if source can't
171− offer the power, Capability Mismatch is set. Required for power sink and
172− power dual role.
144+ accessory-mode-audio:
145+ type: boolean
146+ description: Whether the device supports Audio Adapter Accessory Mode. This
147+ is only necessary if there are no other means to discover supported
148+ alternative modes (e.g. through the UCSI firmware interface).
149+
150+ accessory-mode-debug:
151+ type: boolean
152+ description: Whether the device supports Debug Accessory Mode. This
153+ is only necessary if there are no other means to discover supported
154+ alternative modes (e.g. through the UCSI firmware interface).
155+
156+ altmodes:
157+ type: object
158+ description: List of Alternative Modes supported by the schematics on the
159+ particular device. This is only necessary if there are no other means to
160+ discover supported alternative modes (e.g. through the UCSI firmware
161+ interface).
162+
163+ additionalProperties: false
164+
165+ patternProperties:
166+ "^(displayport)$":
167+ type: object
168+ description:
169+ A single USB-C Alternative Mode as supported by the USB-C connector logic.
170+
171+ additionalProperties: false
172+
173+ properties:
174+ svid:
175+ $ref: /schemas/types.yaml#/definitions/uint16
176+ description: Unique value assigned by USB-IF to the Vendor / AltMode.
177+ enum: [ 0xff01 ]
178+ vdo:
179+ $ref: /schemas/types.yaml#/definitions/uint32
180+ description: VDO returned by Discover Modes USB PD command.
173181
174182 port:
175183 $ref: /schemas/graph.yaml#/properties/port
@@ -231,6 +239,20 @@ properties: · 55 unmodified lines
231239 SNK_READY for non-pd link.
232240 type: boolean
233241
242+ capabilities:
243+ description: A child node to contain all the selectable USB Power Delivery capabilities.
244+ type: object
245+
246+ patternProperties:
247+ "^caps-[0-9]+$":
248+ description: Child nodes under "capabilities" node. Each node contains a selectable USB
249+ Power Delivery capability.
250+ type: object
251+ $ref: "#/$defs/capabilities"
252+ unevaluatedProperties: false
253+
254+ additionalProperties: false
255+
234256 dependencies:
235257 sink-vdos-v1: [ sink-vdos ]
236258 sink-vdos: [ sink-vdos-v1 ]
@@ -238,7 +260,42 @@ dependencies: · 1 unmodified line
238260 required:
239261 - compatible
240262
263+$defs:
264+ capabilities:
265+ type: object
266+
267+ properties:
268+ source-pdos:
269+ description: An array of u32 with each entry providing supported power
270+ source data object(PDO), the detailed bit definitions of PDO can be found
271+ in "Universal Serial Bus Power Delivery Specification" chapter 6.4.1.2
272+ Source_Capabilities Message, the order of each entry(PDO) should follow
273+ the PD spec chapter 6.4.1. Required for power source and power dual role.
274+ User can specify the source PDO array via PDO_FIXED/BATT/VAR/PPS_APDO()
275+ defined in dt-bindings/usb/pd.h.
276+ minItems: 1
277+ maxItems: 7
278+ $ref: /schemas/types.yaml#/definitions/uint32-array
279+
280+ sink-pdos:
281+ description: An array of u32 with each entry providing supported power sink
282+ data object(PDO), the detailed bit definitions of PDO can be found in
283+ "Universal Serial Bus Power Delivery Specification" chapter 6.4.1.3
284+ Sink Capabilities Message, the order of each entry(PDO) should follow the
285+ PD spec chapter 6.4.1. Required for power sink and power dual role. User
286+ can specify the sink PDO array via PDO_FIXED/BATT/VAR/PPS_APDO() defined
287+ in dt-bindings/usb/pd.h.
288+ minItems: 1
289+ maxItems: 7
290+ $ref: /schemas/types.yaml#/definitions/uint32-array
291+
292+ op-sink-microwatt:
293+ description: Sink required operating power in microwatt, if source can't
294+ offer the power, Capability Mismatch is set. Required for power sink and
295+ power dual role.
296+
241297 allOf:
298+ - $ref: "#/$defs/capabilities"
242299 - if:
243300 properties:
244301 compatible:
@@ -267,7 +324,7 @@ anyOf: · 22 unmodified lines
267324 - typec-power-opmode
268325 - new-source-frs-typec-current
269326
270−additionalProperties: false
327+unevaluatedProperties: false
271328
272329 examples:
273330 # Micro-USB connector with HS lines routed via controller (MUIC).
@@ -289,6 +346,13 @@ examples: · 15 unmodified lines
289346 compatible = "usb-c-connector";
290347 label = "USB-C";
291348
349+ altmodes {
350+ displayport {
351+ svid = /bits/ 16 <0xff01>;
352+ vdo = <0x00001c46>;
353+ };
354+ };
355+
292356 ports {
293357 #address-cells = <1>;
294358 #size-cells = <0>;
Documentation/devicetree/bindings/cpu/idle-states.yaml+77−4
@@ -243,7 +243,64 @@ description: |+ · 242 unmodified lines
243243 just supports idle_standby, an idle-states node is not required.
244244
245245 ===========================================
246− 6 - References
246+ 6 - Qualcomm specific STATES
247+ ===========================================
248+
249+ Idle states have different enter/exit latency and residency values.
250+ The idle states supported by the QCOM SoC are defined as -
251+
252+ * Standby
253+ * Retention
254+ * Standalone Power Collapse (Standalone PC or SPC)
255+ * Power Collapse (PC)
256+
257+ Standby: Standby does a little more in addition to architectural clock gating.
258+ When the WFI instruction is executed the ARM core would gate its internal
259+ clocks. In addition to gating the clocks, QCOM cpus use this instruction as a
260+ trigger to execute the SPM state machine. The SPM state machine waits for the
261+ interrupt to trigger the core back in to active. This triggers the cache
262+ hierarchy to enter standby states, when all cpus are idle. An interrupt brings
263+ the SPM state machine out of its wait, the next step is to ensure that the
264+ cache hierarchy is also out of standby, and then the cpu is allowed to resume
265+ execution. This state is defined as a generic ARM WFI state by the ARM cpuidle
266+ driver and is not defined in the DT. The SPM state machine should be
267+ configured to execute this state by default and after executing every other
268+ state below.
269+
270+ Retention: Retention is a low power state where the core is clock gated and
271+ the memory and the registers associated with the core are retained. The
272+ voltage may be reduced to the minimum value needed to keep the processor
273+ registers active. The SPM should be configured to execute the retention
274+ sequence and would wait for interrupt, before restoring the cpu to execution
275+ state. Retention may have a slightly higher latency than Standby.
276+
277+ Standalone PC: A cpu can power down and warmboot if there is a sufficient time
278+ between the time it enters idle and the next known wake up. SPC mode is used
279+ to indicate a core entering a power down state without consulting any other
280+ cpu or the system resources. This helps save power only on that core. The SPM
281+ sequence for this idle state is programmed to power down the supply to the
282+ core, wait for the interrupt, restore power to the core, and ensure the
283+ system state including cache hierarchy is ready before allowing core to
284+ resume. Applying power and resetting the core causes the core to warmboot
285+ back into Elevation Level (EL) which trampolines the control back to the
286+ kernel. Entering a power down state for the cpu, needs to be done by trapping
287+ into a EL. Failing to do so, would result in a crash enforced by the warm boot
288+ code in the EL for the SoC. On SoCs with write-back L1 cache, the cache has to
289+ be flushed in s/w, before powering down the core.
290+
291+ Power Collapse: This state is similar to the SPC mode, but distinguishes
292+ itself in that the cpu acknowledges and permits the SoC to enter deeper sleep
293+ modes. In a hierarchical power domain SoC, this means L2 and other caches can
294+ be flushed, system bus, clocks - lowered, and SoC main XO clock gated and
295+ voltages reduced, provided all cpus enter this state. Since the span of low
296+ power modes possible at this state is vast, the exit latency and the residency
297+ of this low power mode would be considered high even though at a cpu level,
298+ this essentially is cpu power down. The SPM in this state also may handshake
299+ with the Resource power manager (RPM) processor in the SoC to indicate a
300+ complete application processor subsystem shut down.
301+
302+ ===========================================
303+ 7 - References
247304 ===========================================
248305
249306 [1] ARM Linux Kernel documentation - CPUs bindings
@@ -301,9 +358,16 @@ patternProperties: · 51 unmodified lines
301358
302359 properties:
303360 compatible:
304− enum:
305− - arm,idle-state
306− - riscv,idle-state
361+ oneOf:
362+ - items:
363+ - enum:
364+ - qcom,idle-state-ret
365+ - qcom,idle-state-spc
366+ - qcom,idle-state-pc
367+ - const: arm,idle-state
368+ - enum:
369+ - arm,idle-state
370+ - riscv,idle-state
307371
308372 arm,psci-suspend-param:
309373 $ref: /schemas/types.yaml#/definitions/uint32
@@ -852,4 +916,13 @@ examples: · 542 unmodified lines
852916 };
853917 };
854918
919+ // Example 4 - Qualcomm SPC
920+ idle-states {
921+ cpu_spc: cpu-spc {
922+ compatible = "qcom,idle-state-spc", "arm,idle-state";
923+ entry-latency-us = <150>;
924+ exit-latency-us = <200>;
925+ min-residency-us = <2000>;
926+ };
927+ };
855928 ...
Documentation/devicetree/bindings/crypto/inside-secure,safexcel.yaml+86−0
@@ -0,0 +1,86 @@
1+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Inside Secure SafeXcel cryptographic engine
8+
9+maintainers:
10+ - Antoine Tenart <atenart@kernel.org>
11+
12+properties:
13+ compatible:
14+ oneOf:
15+ - const: inside-secure,safexcel-eip197b
16+ - const: inside-secure,safexcel-eip197d
17+ - const: inside-secure,safexcel-eip97ies
18+ - const: inside-secure,safexcel-eip197
19+ description: Equivalent of inside-secure,safexcel-eip197b
20+ deprecated: true
21+ - const: inside-secure,safexcel-eip97
22+ description: Equivalent of inside-secure,safexcel-eip97ies
23+ deprecated: true
24+
25+ reg:
26+ maxItems: 1
27+
28+ interrupts:
29+ maxItems: 6
30+
31+ interrupt-names:
32+ items:
33+ - const: ring0
34+ - const: ring1
35+ - const: ring2
36+ - const: ring3
37+ - const: eip
38+ - const: mem
39+
40+ clocks:
41+ minItems: 1
42+ maxItems: 2
43+
44+ clock-names:
45+ minItems: 1
46+ items:
47+ - const: core
48+ - const: reg
49+
50+required:
51+ - reg
52+ - interrupts
53+ - interrupt-names
54+
55+allOf:
56+ - if:
57+ properties:
58+ clocks:
59+ minItems: 2
60+ then:
61+ properties:
62+ clock-names:
63+ minItems: 2
64+ required:
65+ - clock-names
66+
67+additionalProperties: false
68+
69+examples:
70+ - |
71+ #include <dt-bindings/interrupt-controller/arm-gic.h>
72+ #include <dt-bindings/interrupt-controller/irq.h>
73+
74+ crypto@800000 {
75+ compatible = "inside-secure,safexcel-eip197b";
76+ reg = <0x800000 0x200000>;
77+ interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
78+ <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
79+ <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
80+ <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
81+ <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
82+ <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
83+ interrupt-names = "ring0", "ring1", "ring2", "ring3", "eip", "mem";
84+ clocks = <&cpm_syscon0 1 26>;
85+ clock-names = "core";
86+ };
Documentation/devicetree/bindings/crypto/inside-secure-safexcel.txt+0−40
@@ -1,40 +0,0 @@
1−Inside Secure SafeXcel cryptographic engine
2−
3−Required properties:
4−- compatible: Should be "inside-secure,safexcel-eip197b",
5− "inside-secure,safexcel-eip197d" or
6− "inside-secure,safexcel-eip97ies".
7−- reg: Base physical address of the engine and length of memory mapped region.
8−- interrupts: Interrupt numbers for the rings and engine.
9−- interrupt-names: Should be "ring0", "ring1", "ring2", "ring3", "eip", "mem".
10−
11−Optional properties:
12−- clocks: Reference to the crypto engine clocks, the second clock is
13− needed for the Armada 7K/8K SoCs.
14−- clock-names: mandatory if there is a second clock, in this case the
15− name must be "core" for the first clock and "reg" for
16− the second one.
17−
18−Backward compatibility:
19−Two compatibles are kept for backward compatibility, but shouldn't be used for
20−new submissions:
21−- "inside-secure,safexcel-eip197" is equivalent to
22− "inside-secure,safexcel-eip197b".
23−- "inside-secure,safexcel-eip97" is equivalent to
24− "inside-secure,safexcel-eip97ies".
25−
26−Example:
27−
28− crypto: crypto@800000 {
29− compatible = "inside-secure,safexcel-eip197b";
30− reg = <0x800000 0x200000>;
31− interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
32− <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
33− <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
34− <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
35− <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
36− <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
37− interrupt-names = "mem", "ring0", "ring1", "ring2", "ring3",
38− "eip";
39− clocks = <&cpm_syscon0 1 26>;
40− };
Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml+1−0
@@ -16,6 +16,7 @@ properties: · 15 unmodified lines
1616 - qcom,sa8775p-inline-crypto-engine
1717 - qcom,sm8450-inline-crypto-engine
1818 - qcom,sm8550-inline-crypto-engine
19+ - qcom,sm8650-inline-crypto-engine
1920 - const: qcom,inline-crypto-engine
2021
2122 reg:
Documentation/devicetree/bindings/crypto/qcom,prng.yaml+1−0
@@ -21,6 +21,7 @@ properties: · 20 unmodified lines
2121 - qcom,sc7280-trng
2222 - qcom,sm8450-trng
2323 - qcom,sm8550-trng
24+ - qcom,sm8650-trng
2425 - const: qcom,trng
2526
2627 reg:
Documentation/devicetree/bindings/crypto/qcom-qce.yaml+14−0
@@ -44,10 +44,12 @@ properties: · 43 unmodified lines
4444
4545 - items:
4646 - enum:
47+ - qcom,sc7280-qce
4748 - qcom,sm8250-qce
4849 - qcom,sm8350-qce
4950 - qcom,sm8450-qce
5051 - qcom,sm8550-qce
52+ - qcom,sm8650-qce
5153 - const: qcom,sm8150-qce
5254 - const: qcom,qce
5355
@@ -96,6 +98,7 @@ allOf: · 42 unmodified lines
9698 - qcom,crypto-v5.4
9799 - qcom,ipq6018-qce
98100 - qcom,ipq8074-qce
101+ - qcom,ipq9574-qce
99102 - qcom,msm8996-qce
100103 - qcom,sdm845-qce
101104 then:
@@ -129,6 +132,17 @@ allOf: · 27 unmodified lines
129132 - clocks
130133 - clock-names
131134
135+ - if:
136+ properties:
137+ compatible:
138+ contains:
139+ enum:
140+ - qcom,sm8150-qce
141+ then:
142+ properties:
143+ clocks: false
144+ clock-names: false
145+
132146 required:
133147 - compatible
134148 - reg
Documentation/devicetree/bindings/display/bridge/adi,adv7533.yaml+6−0
@@ -9,6 +9,9 @@ title: Analog Devices ADV7533/35 HDMI Encoders · 8 unmodified lines
99 maintainers:
1010 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
1111
12+allOf:
13+ - $ref: /schemas/sound/dai-common.yaml#
14+
1215 description: |
1316 The ADV7533 and ADV7535 are HDMI audio and video transmitters
1417 compatible with HDMI 1.4 and DVI 1.0. They support color space
@@ -89,6 +92,9 @@ properties: · 74 unmodified lines
8992 $ref: /schemas/types.yaml#/definitions/uint32
9093 enum: [ 1, 2, 3, 4 ]
9194
95+ "#sound-dai-cells":
96+ const: 0
97+
9298 ports:
9399 description:
94100 The ADV7533/35 has two video ports and one audio port.
Documentation/devicetree/bindings/display/fsl,lcdif.yaml+19−1
@@ -51,7 +51,10 @@ properties: · 50 unmodified lines
5151 minItems: 1
5252
5353 interrupts:
54− maxItems: 1
54+ items:
55+ - description: LCDIF DMA interrupt
56+ - description: LCDIF Error interrupt
57+ minItems: 1
5558
5659 power-domains:
5760 maxItems: 1
@@ -131,6 +134,21 @@ allOf: · 73 unmodified lines
131134 then:
132135 required:
133136 - power-domains
137+ - if:
138+ properties:
139+ compatible:
140+ contains:
141+ enum:
142+ - fsl,imx23-lcdif
143+ then:
144+ properties:
145+ interrupts:
146+ minItems: 2
147+ maxItems: 2
148+ else:
149+ properties:
150+ interrupts:
151+ maxItems: 1
134152
135153 examples:
136154 - |
Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml+1−0
@@ -24,6 +24,7 @@ properties: · 23 unmodified lines
2424 - enum:
2525 - mediatek,mt8173-disp-aal
2626 - mediatek,mt8183-disp-aal
27+ - mediatek,mt8195-mdp3-aal
2728 - items:
2829 - enum:
2930 - mediatek,mt2712-disp-aal
Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml+1−0
@@ -26,6 +26,7 @@ properties: · 25 unmodified lines
2626 - mediatek,mt2701-disp-color
2727 - mediatek,mt8167-disp-color
2828 - mediatek,mt8173-disp-color
29+ - mediatek,mt8195-mdp3-color
2930 - items:
3031 - enum:
3132 - mediatek,mt7623-disp-color
Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml+4−1
@@ -10,7 +10,6 @@ maintainers: · 9 unmodified lines
1010 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
1111 - Philipp Zabel <p.zabel@pengutronix.de>
1212 - Jitao Shi <jitao.shi@mediatek.com>
13− - Xinlei Lee <xinlei.lee@mediatek.com>
1413
1514 description: |
1615 The MediaTek DSI function block is a sink of the display subsystem and can
@@ -35,6 +34,10 @@ properties: · 18 unmodified lines
3534 - enum:
3635 - mediatek,mt6795-dsi
3736 - const: mediatek,mt8173-dsi
37+ - items:
38+ - enum:
39+ - mediatek,mt8195-dsi
40+ - const: mediatek,mt8183-dsi
3841
3942 reg:
4043 maxItems: 1
Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml+5−1
@@ -23,7 +23,11 @@ description: · 22 unmodified lines
2323
2424 properties:
2525 compatible:
26− const: mediatek,mt8195-disp-ethdr
26+ oneOf:
27+ - const: mediatek,mt8195-disp-ethdr
28+ - items:
29+ - const: mediatek,mt8188-disp-ethdr
30+ - const: mediatek,mt8195-disp-ethdr
2731
2832 reg:
2933 maxItems: 7
Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml+0−88
@@ -1,88 +0,0 @@
1−# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2−%YAML 1.2
3−---
4−$id: http://devicetree.org/schemas/display/mediatek/mediatek,mdp-rdma.yaml#
5−$schema: http://devicetree.org/meta-schemas/core.yaml#
6−
7−title: MediaTek MDP RDMA
8−
9−maintainers:
10− - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11− - Philipp Zabel <p.zabel@pengutronix.de>
12−
13−description:
14− The MediaTek MDP RDMA stands for Read Direct Memory Access.
15− It provides real time data to the back-end panel driver, such as DSI,
16− DPI and DP_INTF.
17− It contains one line buffer to store the sufficient pixel data.
18− RDMA device node must be siblings to the central MMSYS_CONFIG node.
19− For a description of the MMSYS_CONFIG binding, see
20− Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml for details.
21−
22−properties:
23− compatible:
24− const: mediatek,mt8195-vdo1-rdma
25−
26− reg:
27− maxItems: 1
28−
29− interrupts:
30− maxItems: 1
31−
32− power-domains:
33− maxItems: 1
34−
35− clocks:
36− items:
37− - description: RDMA Clock
38−
39− iommus:
40− maxItems: 1
41−
42− mediatek,gce-client-reg:
43− description:
44− The register of display function block to be set by gce. There are 4 arguments,
45− such as gce node, subsys id, offset and register size. The subsys id that is
46− mapping to the register of display function blocks is defined in the gce header
47− include/dt-bindings/gce/<chip>-gce.h of each chips.
48− $ref: /schemas/types.yaml#/definitions/phandle-array
49− items:
50− items:
51− - description: phandle of GCE
52− - description: GCE subsys id
53− - description: register offset
54− - description: register size
55− maxItems: 1
56−
57−required:
58− - compatible
59− - reg
60− - power-domains
61− - clocks
62− - iommus
63− - mediatek,gce-client-reg
64−
65−additionalProperties: false
66−
67−examples:
68− - |
69− #include <dt-bindings/interrupt-controller/arm-gic.h>
70− #include <dt-bindings/clock/mt8195-clk.h>
71− #include <dt-bindings/power/mt8195-power.h>
72− #include <dt-bindings/gce/mt8195-gce.h>
73− #include <dt-bindings/memory/mt8195-memory-port.h>
74−
75− soc {
76− #address-cells = <2>;
77− #size-cells = <2>;
78−
79− rdma@1c104000 {
80− compatible = "mediatek,mt8195-vdo1-rdma";
81− reg = <0 0x1c104000 0 0x1000>;
82− interrupts = <GIC_SPI 495 IRQ_TYPE_LEVEL_HIGH 0>;
83− clocks = <&vdosys1 CLK_VDO1_MDP_RDMA0>;
84− power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;
85− iommus = <&iommu_vdo M4U_PORT_L2_MDP_RDMA0>;
86− mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x4000 0x1000>;
87− };
88− };
Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml+4−0
@@ -24,9 +24,13 @@ properties: · 23 unmodified lines
2424 - enum:
2525 - mediatek,mt8173-disp-merge
2626 - mediatek,mt8195-disp-merge
27+ - mediatek,mt8195-mdp3-merge
2728 - items:
2829 - const: mediatek,mt6795-disp-merge
2930 - const: mediatek,mt8173-disp-merge
31+ - items:
32+ - const: mediatek,mt8188-disp-merge
33+ - const: mediatek,mt8195-disp-merge
3034
3135 reg:
3236 maxItems: 1
Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml+1−0
@@ -26,6 +26,7 @@ properties: · 25 unmodified lines
2626 - mediatek,mt8173-disp-ovl
2727 - mediatek,mt8183-disp-ovl
2828 - mediatek,mt8192-disp-ovl
29+ - mediatek,mt8195-mdp3-ovl
2930 - items:
3031 - enum:
3132 - mediatek,mt7623-disp-ovl
Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml+83−0
@@ -0,0 +1,83 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/display/mediatek/mediatek,padding.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: MediaTek Display Padding
8+
9+maintainers:
10+ - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11+ - Philipp Zabel <p.zabel@pengutronix.de>
12+
13+description:
14+ Padding provides ability to add pixels to width and height of a layer with
15+ specified colors. Due to hardware design, Mixer in VDOSYS1 requires
16+ width of a layer to be 2-pixel-align, or 4-pixel-align when ETHDR is enabled,
17+ we need Padding to deal with odd width.
18+ Please notice that even if the Padding is in bypass mode, settings in
19+ register must be cleared to 0, or undefined behaviors could happen.
20+
21+properties:
22+ compatible:
23+ enum:
24+ - mediatek,mt8188-disp-padding
25+ - mediatek,mt8195-mdp3-padding
26+
27+ reg:
28+ maxItems: 1
29+
30+ power-domains:
31+ maxItems: 1
32+
33+ clocks:
34+ items:
35+ - description: Padding's clocks
36+
37+ mediatek,gce-client-reg:
38+ description:
39+ GCE (Global Command Engine) is a multi-core micro processor that helps
40+ its clients to execute commands without interrupting CPU. This property
41+ describes GCE client's information that is composed by 4 fields.
42+ 1. Phandle of the GCE (there may be several GCE processors)
43+ 2. Sub-system ID defined in the dt-binding like a user ID
44+ (Please refer to include/dt-bindings/gce/<chip>-gce.h)
45+ 3. Offset from base address of the subsys you are at
46+ 4. Size of the register the client needs
47+ $ref: /schemas/types.yaml#/definitions/phandle-array
48+ items:
49+ items:
50+ - description: Phandle of the GCE
51+ - description: Subsys ID defined in the dt-binding
52+ - description: Offset from base address of the subsys
53+ - description: Size of register
54+ maxItems: 1
55+
56+required:
57+ - compatible
58+ - reg
59+ - power-domains
60+ - clocks
61+ - mediatek,gce-client-reg
62+
63+additionalProperties: false
64+
65+examples:
66+ - |
67+ #include <dt-bindings/interrupt-controller/arm-gic.h>
68+ #include <dt-bindings/clock/mediatek,mt8188-clk.h>
69+ #include <dt-bindings/power/mediatek,mt8188-power.h>
70+ #include <dt-bindings/gce/mt8195-gce.h>
71+
72+ soc {
73+ #address-cells = <2>;
74+ #size-cells = <2>;
75+
76+ padding0: padding@1c11d000 {
77+ compatible = "mediatek,mt8188-disp-padding";
78+ reg = <0 0x1c11d000 0 0x1000>;
79+ clocks = <&vdosys1 CLK_VDO1_PADDING0>;
80+ power-domains = <&spm MT8188_POWER_DOMAIN_VDOSYS1>;
81+ mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0xd000 0x1000>;
82+ };
83+ };
Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml+27−0
@@ -23,6 +23,7 @@ properties: · 22 unmodified lines
2323 oneOf:
2424 - enum:
2525 - mediatek,mt8173-disp-split
26+ - mediatek,mt8195-mdp3-split
2627 - items:
2728 - const: mediatek,mt6795-disp-split
2829 - const: mediatek,mt8173-disp-split
@@ -38,6 +39,21 @@ properties: · 9 unmodified lines
3839 the power controller specified by phandle. See
3940 Documentation/devicetree/bindings/power/power-domain.yaml for details.
4041
42+ mediatek,gce-client-reg:
43+ description:
44+ The register of display function block to be set by gce. There are 4 arguments,
45+ such as gce node, subsys id, offset and register size. The subsys id that is
46+ mapping to the register of display function blocks is defined in the gce header
47+ include/dt-bindings/gce/<chip>-gce.h of each chips.
48+ $ref: /schemas/types.yaml#/definitions/phandle-array
49+ items:
50+ items:
51+ - description: phandle of GCE
52+ - description: GCE subsys id
53+ - description: register offset
54+ - description: register size
55+ maxItems: 1
56+
4157 clocks:
4258 items:
4359 - description: SPLIT Clock
@@ -48,6 +64,17 @@ required: · 4 unmodified lines
4864 - power-domains
4965 - clocks
5066
67+allOf:
68+ - if:
69+ properties:
70+ compatible:
71+ contains:
72+ const: mediatek,mt8195-mdp3-split
73+
74+ then:
75+ required:
76+ - mediatek,gce-client-reg
77+
5178 additionalProperties: false
5279
5380 examples:
Documentation/devicetree/bindings/display/msm/dp-controller.yaml+2−0
@@ -26,8 +26,10 @@ properties: · 25 unmodified lines
2626 - qcom,sc8280xp-edp
2727 - qcom,sdm845-dp
2828 - qcom,sm8350-dp
29+ - qcom,sm8650-dp
2930 - items:
3031 - enum:
32+ - qcom,sm8150-dp
3133 - qcom,sm8250-dp
3234 - qcom,sm8450-dp
3335 - qcom,sm8550-dp
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml+3−0
@@ -25,6 +25,7 @@ properties: · 24 unmodified lines
2525 - qcom,sc7180-dsi-ctrl
2626 - qcom,sc7280-dsi-ctrl
2727 - qcom,sdm660-dsi-ctrl
28+ - qcom,sdm670-dsi-ctrl
2829 - qcom,sdm845-dsi-ctrl
2930 - qcom,sm6115-dsi-ctrl
3031 - qcom,sm6125-dsi-ctrl
@@ -35,6 +36,7 @@ properties: · 4 unmodified lines
3536 - qcom,sm8350-dsi-ctrl
3637 - qcom,sm8450-dsi-ctrl
3738 - qcom,sm8550-dsi-ctrl
39+ - qcom,sm8650-dsi-ctrl
3840 - const: qcom,mdss-dsi-ctrl
3941 - enum:
4042 - qcom,dsi-ctrl-6g-qcm2290
@@ -333,6 +335,7 @@ allOf: · 292 unmodified lines
333335 - qcom,sm8350-dsi-ctrl
334336 - qcom,sm8450-dsi-ctrl
335337 - qcom,sm8550-dsi-ctrl
338+ - qcom,sm8650-dsi-ctrl
336339 then:
337340 properties:
338341 clocks:
Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml+1−0
@@ -22,6 +22,7 @@ properties: · 21 unmodified lines
2222 - qcom,sm8350-dsi-phy-5nm
2323 - qcom,sm8450-dsi-phy-5nm
2424 - qcom,sm8550-dsi-phy-4nm
25+ - qcom,sm8650-dsi-phy-4nm
2526
2627 reg:
2728 items:
Documentation/devicetree/bindings/display/msm/mdss-common.yaml+14−4
@@ -61,17 +61,27 @@ properties: · 60 unmodified lines
6161
6262 ranges: true
6363
64+ # This is not a perfect description, but it's impossible to discern and match
65+ # the entries like we do with interconnect-names
6466 interconnects:
6567 minItems: 1
6668 items:
6769 - description: Interconnect path from mdp0 (or a single mdp) port to the data bus
6870 - description: Interconnect path from mdp1 port to the data bus
71+ - description: Interconnect path from CPU to the reg bus
6972
7073 interconnect-names:
71− minItems: 1
72− items:
73− - const: mdp0-mem
74− - const: mdp1-mem
74+ oneOf:
75+ - minItems: 1
76+ items:
77+ - const: mdp0-mem
78+ - const: cpu-cfg
79+
80+ - minItems: 2
81+ items:
82+ - const: mdp0-mem
83+ - const: mdp1-mem
84+ - const: cpu-cfg
7585
7686 resets:
7787 items:
Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml+15−6
@@ -36,10 +36,14 @@ properties: · 35 unmodified lines
3636 maxItems: 2
3737
3838 interconnects:
39− maxItems: 1
39+ items:
40+ - description: Interconnect path from mdp0 port to the data bus
41+ - description: Interconnect path from CPU to the reg bus
4042
4143 interconnect-names:
42− maxItems: 1
44+ items:
45+ - const: mdp0-mem
46+ - const: cpu-cfg
4347
4448 patternProperties:
4549 "^display-controller@[0-9a-f]+$":
@@ -56,7 +60,9 @@ patternProperties: · 10 unmodified lines
5660
5761 properties:
5862 compatible:
59− const: qcom,dsi-ctrl-6g-qcm2290
63+ items:
64+ - const: qcom,qcm2290-dsi-ctrl
65+ - const: qcom,mdss-dsi-ctrl
6066
6167 "^phy@[0-9a-f]+$":
6268 type: object
@@ -96,8 +102,10 @@ examples: · 33 unmodified lines
96102 interrupt-controller;
97103 #interrupt-cells = <1>;
98104
99− interconnects = <&mmrt_virt MASTER_MDP0 &bimc SLAVE_EBI1>;
100− interconnect-names = "mdp0-mem";
105+ interconnects = <&mmrt_virt MASTER_MDP0 &bimc SLAVE_EBI1>,
106+ <&bimc MASTER_APPSS_PROC &config_noc SLAVE_DISPLAY_CFG>;
107+ interconnect-names = "mdp0-mem",
108+ "cpu-cfg";
101109
102110 iommus = <&apps_smmu 0x420 0x2>,
103111 <&apps_smmu 0x421 0x0>;
@@ -136,7 +144,8 @@ examples: · 32 unmodified lines
136144 };
137145
138146 dsi@5e94000 {
139− compatible = "qcom,dsi-ctrl-6g-qcm2290";
147+ compatible = "qcom,qcm2290-dsi-ctrl",
148+ "qcom,mdss-dsi-ctrl";
140149 reg = <0x05e94000 0x400>;
141150 reg-names = "dsi_ctrl";
142151
Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml+10−4
@@ -36,10 +36,14 @@ properties: · 35 unmodified lines
3636 maxItems: 1
3737
3838 interconnects:
39− maxItems: 1
39+ items:
40+ - description: Interconnect path from mdp0 port to the data bus
41+ - description: Interconnect path from CPU to the reg bus
4042
4143 interconnect-names:
42− maxItems: 1
44+ items:
45+ - const: mdp0-mem
46+ - const: cpu-cfg
4347
4448 patternProperties:
4549 "^display-controller@[0-9a-f]+$":
@@ -106,8 +110,10 @@ examples: · 60 unmodified lines
106110 interrupt-controller;
107111 #interrupt-cells = <1>;
108112
109− interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>;
110− interconnect-names = "mdp0-mem";
113+ interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>,
114+ <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_DISPLAY_CFG>;
115+ interconnect-names = "mdp0-mem",
116+ "cpu-cfg";
111117
112118 iommus = <&apps_smmu 0x800 0x2>;
113119 ranges;
Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml+10−4
@@ -36,10 +36,14 @@ properties: · 35 unmodified lines
3636 maxItems: 1
3737
3838 interconnects:
39− maxItems: 1
39+ items:
40+ - description: Interconnect path from mdp0 port to the data bus
41+ - description: Interconnect path from CPU to the reg bus
4042
4143 interconnect-names:
42− maxItems: 1
44+ items:
45+ - const: mdp0-mem
46+ - const: cpu-cfg
4347
4448 patternProperties:
4549 "^display-controller@[0-9a-f]+$":
@@ -118,8 +122,10 @@ examples: · 72 unmodified lines
118122 interrupt-controller;
119123 #interrupt-cells = <1>;
120124
121− interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>;
122− interconnect-names = "mdp0-mem";
125+ interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>,
126+ <&gem_noc MASTER_APPSS_PROC &cnoc2 SLAVE_DISPLAY_CFG>;
127+ interconnect-names = "mdp0-mem",
128+ "cpu-cfg";
123129
124130 iommus = <&apps_smmu 0x900 0x402>;
125131 ranges;
Documentation/devicetree/bindings/display/msm/qcom,sdm670-mdss.yaml+292−0
@@ -0,0 +1,292 @@
1+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/display/msm/qcom,sdm670-mdss.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Qualcomm SDM670 Display MDSS
8+
9+maintainers:
10+ - Richard Acayan <mailingradian@gmail.com>
11+
12+description:
13+ SDM670 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks
14+ like DPU display controller, DSI and DP interfaces etc.
15+
16+$ref: /schemas/display/msm/mdss-common.yaml#
17+
18+properties:
19+ compatible:
20+ const: qcom,sdm670-mdss
21+
22+ clocks:
23+ items:
24+ - description: Display AHB clock from gcc
25+ - description: Display core clock
26+
27+ clock-names:
28+ items:
29+ - const: iface
30+ - const: core
31+
32+ iommus:
33+ maxItems: 2
34+
35+ interconnects:
36+ maxItems: 2
37+
38+ interconnect-names:
39+ maxItems: 2
40+
41+patternProperties:
42+ "^display-controller@[0-9a-f]+$":
43+ type: object
44+ additionalProperties: true
45+
46+ properties:
47+ compatible:
48+ const: qcom,sdm670-dpu
49+
50+ "^displayport-controller@[0-9a-f]+$":
51+ type: object
52+ additionalProperties: true
53+
54+ properties:
55+ compatible:
56+ const: qcom,sdm670-dp
57+
58+ "^dsi@[0-9a-f]+$":
59+ type: object
60+ additionalProperties: true
61+
62+ properties:
63+ compatible:
64+ contains:
65+ const: qcom,sdm670-dsi-ctrl
66+
67+ "^phy@[0-9a-f]+$":
68+ type: object
69+ additionalProperties: true
70+
71+ properties:
72+ compatible:
73+ const: qcom,dsi-phy-10nm
74+
75+required:
76+ - compatible
77+
78+unevaluatedProperties: false
79+
80+examples:
81+ - |
82+ #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
83+ #include <dt-bindings/clock/qcom,gcc-sdm845.h>
84+ #include <dt-bindings/clock/qcom,rpmh.h>
85+ #include <dt-bindings/interconnect/qcom,sdm670-rpmh.h>
86+ #include <dt-bindings/interrupt-controller/arm-gic.h>
87+ #include <dt-bindings/power/qcom-rpmpd.h>
88+
89+ display-subsystem@ae00000 {
90+ compatible = "qcom,sdm670-mdss";
91+ reg = <0x0ae00000 0x1000>;
92+ reg-names = "mdss";
93+ power-domains = <&dispcc MDSS_GDSC>;
94+
95+ clocks = <&gcc GCC_DISP_AHB_CLK>,
96+ <&dispcc DISP_CC_MDSS_MDP_CLK>;
97+ clock-names = "iface", "core";
98+
99+ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
100+ interrupt-controller;
101+ #interrupt-cells = <1>;
102+
103+ interconnects = <&mmss_noc MASTER_MDP_PORT0 0 &mem_noc SLAVE_EBI_CH0 0>,
104+ <&mmss_noc MASTER_MDP_PORT1 0 &mem_noc SLAVE_EBI_CH0 0>;
105+ interconnect-names = "mdp0-mem", "mdp1-mem";
106+
107+ iommus = <&apps_smmu 0x880 0x8>,
108+ <&apps_smmu 0xc80 0x8>;
109+
110+ #address-cells = <1>;
111+ #size-cells = <1>;
112+ ranges;
113+
114+ display-controller@ae01000 {
115+ compatible = "qcom,sdm670-dpu";
116+ reg = <0x0ae01000 0x8f000>,
117+ <0x0aeb0000 0x2008>;
118+ reg-names = "mdp", "vbif";
119+
120+ clocks = <&gcc GCC_DISP_AXI_CLK>,
121+ <&dispcc DISP_CC_MDSS_AHB_CLK>,
122+ <&dispcc DISP_CC_MDSS_AXI_CLK>,
123+ <&dispcc DISP_CC_MDSS_MDP_CLK>,
124+ <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
125+ clock-names = "gcc-bus", "iface", "bus", "core", "vsync";
126+
127+ interrupt-parent = <&mdss>;
128+ interrupts = <0>;
129+ power-domains = <&rpmhpd SDM670_CX>;
130+ operating-points-v2 = <&mdp_opp_table>;
131+
132+ ports {
133+ #address-cells = <1>;
134+ #size-cells = <0>;
135+
136+ port@0 {
137+ reg = <0>;
138+ dpu_intf1_out: endpoint {
139+ remote-endpoint = <&mdss_dsi0_in>;
140+ };
141+ };
142+
143+ port@1 {
144+ reg = <1>;
145+ dpu_intf2_out: endpoint {
146+ remote-endpoint = <&mdss_dsi1_in>;
147+ };
148+ };
149+ };
150+ };
151+
152+ dsi@ae94000 {
153+ compatible = "qcom,sdm670-dsi-ctrl", "qcom,mdss-dsi-ctrl";
154+ reg = <0x0ae94000 0x400>;
155+ reg-names = "dsi_ctrl";
156+
157+ interrupt-parent = <&mdss>;
158+ interrupts = <4>;
159+
160+ clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
161+ <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
162+ <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
163+ <&dispcc DISP_CC_MDSS_ESC0_CLK>,
164+ <&dispcc DISP_CC_MDSS_AHB_CLK>,
165+ <&dispcc DISP_CC_MDSS_AXI_CLK>;
166+ clock-names = "byte",
167+ "byte_intf",
168+ "pixel",
169+ "core",
170+ "iface",
171+ "bus";
172+ assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>,
173+ <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
174+ assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
175+
176+ operating-points-v2 = <&dsi_opp_table>;
177+ power-domains = <&rpmhpd SDM670_CX>;
178+
179+ phys = <&mdss_dsi0_phy>;
180+ phy-names = "dsi";
181+
182+ #address-cells = <1>;
183+ #size-cells = <0>;
184+
185+ ports {
186+ #address-cells = <1>;
187+ #size-cells = <0>;
188+
189+ port@0 {
190+ reg = <0>;
191+ mdss_dsi0_in: endpoint {
192+ remote-endpoint = <&dpu_intf1_out>;
193+ };
194+ };
195+
196+ port@1 {
197+ reg = <1>;
198+ mdss_dsi0_out: endpoint {
199+ };
200+ };
201+ };
202+ };
203+
204+ mdss_dsi0_phy: phy@ae94400 {
205+ compatible = "qcom,dsi-phy-10nm";
206+ reg = <0x0ae94400 0x200>,
207+ <0x0ae94600 0x280>,
208+ <0x0ae94a00 0x1e0>;
209+ reg-names = "dsi_phy",
210+ "dsi_phy_lane",
211+ "dsi_pll";
212+
213+ #clock-cells = <1>;
214+ #phy-cells = <0>;
215+
216+ clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
217+ <&rpmhcc RPMH_CXO_CLK>;
218+ clock-names = "iface", "ref";
219+ vdds-supply = <&vreg_dsi_phy>;
220+ };
221+
222+ dsi@ae96000 {
223+ compatible = "qcom,sdm670-dsi-ctrl", "qcom,mdss-dsi-ctrl";
224+ reg = <0x0ae96000 0x400>;
225+ reg-names = "dsi_ctrl";
226+
227+ interrupt-parent = <&mdss>;
228+ interrupts = <5>;
229+
230+ clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
231+ <&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>,
232+ <&dispcc DISP_CC_MDSS_PCLK1_CLK>,
233+ <&dispcc DISP_CC_MDSS_ESC1_CLK>,
234+ <&dispcc DISP_CC_MDSS_AHB_CLK>,
235+ <&dispcc DISP_CC_MDSS_AXI_CLK>;
236+ clock-names = "byte",
237+ "byte_intf",
238+ "pixel",
239+ "core",
240+ "iface",
241+ "bus";
242+ assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>,
243+ <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
244+ assigned-clock-parents = <&dsi1_phy 0>, <&dsi1_phy 1>;
245+
246+ operating-points-v2 = <&dsi_opp_table>;
247+ power-domains = <&rpmhpd SDM670_CX>;
248+
249+ phys = <&dsi1_phy>;
250+ phy-names = "dsi";
251+
252+ #address-cells = <1>;
253+ #size-cells = <0>;
254+
255+ ports {
256+ #address-cells = <1>;
257+ #size-cells = <0>;
258+
259+ port@0 {
260+ reg = <0>;
261+ mdss_dsi1_in: endpoint {
262+ remote-endpoint = <&dpu_intf2_out>;
263+ };
264+ };
265+
266+ port@1 {
267+ reg = <1>;
268+ mdss_dsi1_out: endpoint {
269+ };
270+ };
271+ };
272+ };
273+
274+ mdss_dsi1_phy: phy@ae96400 {
275+ compatible = "qcom,dsi-phy-10nm";
276+ reg = <0x0ae96400 0x200>,
277+ <0x0ae96600 0x280>,
278+ <0x0ae96a00 0x10e>;
279+ reg-names = "dsi_phy",
280+ "dsi_phy_lane",
281+ "dsi_pll";
282+
283+ #clock-cells = <1>;
284+ #phy-cells = <0>;
285+
286+ clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
287+ <&rpmhcc RPMH_CXO_CLK>;
288+ clock-names = "iface", "ref";
289+ vdds-supply = <&vreg_dsi_phy>;
290+ };
291+ };
292+...
Documentation/devicetree/bindings/display/msm/qcom,sdm845-dpu.yaml+3−1
@@ -13,7 +13,9 @@ $ref: /schemas/display/msm/dpu-common.yaml# · 12 unmodified lines
1313
1414 properties:
1515 compatible:
16− const: qcom,sdm845-dpu
16+ enum:
17+ - qcom,sdm670-dpu
18+ - qcom,sdm845-dpu
1719
1820 reg:
1921 items:
Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml+10−0
@@ -29,6 +29,16 @@ properties: · 28 unmodified lines
2929 iommus:
3030 maxItems: 2
3131
32+ interconnects:
33+ items:
34+ - description: Interconnect path from mdp0 port to the data bus
35+ - description: Interconnect path from CPU to the reg bus
36+
37+ interconnect-names:
38+ items:
39+ - const: mdp0-mem
40+ - const: cpu-cfg
41+
3242 patternProperties:
3343 "^display-controller@[0-9a-f]+$":
3444 type: object
Documentation/devicetree/bindings/display/msm/qcom,sm6125-mdss.yaml+6−2
@@ -35,10 +35,14 @@ properties: · 34 unmodified lines
3535 maxItems: 1
3636
3737 interconnects:
38− maxItems: 2
38+ items:
39+ - description: Interconnect path from mdp0 port to the data bus
40+ - description: Interconnect path from CPU to the reg bus
3941
4042 interconnect-names:
41− maxItems: 2
43+ items:
44+ - const: mdp0-mem
45+ - const: cpu-cfg
4246
4347 patternProperties:
4448 "^display-controller@[0-9a-f]+$":
Documentation/devicetree/bindings/display/msm/qcom,sm6350-mdss.yaml+6−2
@@ -35,10 +35,14 @@ properties: · 34 unmodified lines
3535 maxItems: 1
3636
3737 interconnects:
38− maxItems: 2
38+ items:
39+ - description: Interconnect path from mdp0 port to the data bus
40+ - description: Interconnect path from CPU to the reg bus
3941
4042 interconnect-names:
41− maxItems: 2
43+ items:
44+ - const: mdp0-mem
45+ - const: cpu-cfg
4246
4347 patternProperties:
4448 "^display-controller@[0-9a-f]+$":
Documentation/devicetree/bindings/display/msm/qcom,sm6375-mdss.yaml+6−2
@@ -35,10 +35,14 @@ properties: · 34 unmodified lines
3535 maxItems: 1
3636
3737 interconnects:
38− maxItems: 2
38+ items:
39+ - description: Interconnect path from mdp0 port to the data bus
40+ - description: Interconnect path from CPU to the reg bus
3941
4042 interconnect-names:
41− maxItems: 2
43+ items:
44+ - const: mdp0-mem
45+ - const: cpu-cfg
4246
4347 patternProperties:
4448 "^display-controller@[0-9a-f]+$":
Documentation/devicetree/bindings/display/msm/qcom,sm8150-mdss.yaml+3−3
@@ -69,7 +69,7 @@ patternProperties: · 68 unmodified lines
6969
7070 properties:
7171 compatible:
72− const: qcom,dsi-phy-7nm
72+ const: qcom,dsi-phy-7nm-8150
7373
7474 unevaluatedProperties: false
7575
@@ -247,7 +247,7 @@ examples: · 171 unmodified lines
247247 };
248248
249249 dsi0_phy: phy@ae94400 {
250− compatible = "qcom,dsi-phy-7nm";
250+ compatible = "qcom,dsi-phy-7nm-8150";
251251 reg = <0x0ae94400 0x200>,
252252 <0x0ae94600 0x280>,
253253 <0x0ae94900 0x260>;
@@ -318,7 +318,7 @@ examples: · 64 unmodified lines
318318 };
319319
320320 dsi1_phy: phy@ae96400 {
321− compatible = "qcom,dsi-phy-7nm";
321+ compatible = "qcom,dsi-phy-7nm-8150";
322322 reg = <0x0ae96400 0x200>,
323323 <0x0ae96600 0x280>,
324324 <0x0ae96900 0x260>;
Documentation/devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml+10−0
@@ -52,6 +52,16 @@ patternProperties: · 51 unmodified lines
5252 compatible:
5353 const: qcom,sm8250-dpu
5454
55+ "^displayport-controller@[0-9a-f]+$":
56+ type: object
57+ additionalProperties: true
58+
59+ properties:
60+ compatible:
61+ items:
62+ - const: qcom,sm8250-dp
63+ - const: qcom,sm8350-dp
64+
5565 "^dsi@[0-9a-f]+$":
5666 type: object
5767 additionalProperties: true
Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml+8−5
@@ -30,10 +30,10 @@ properties: · 29 unmodified lines
3030 maxItems: 1
3131
3232 interconnects:
33− maxItems: 2
33+ maxItems: 3
3434
3535 interconnect-names:
36− maxItems: 2
36+ maxItems: 3
3737
3838 patternProperties:
3939 "^display-controller@[0-9a-f]+$":
@@ -91,9 +91,12 @@ examples: · 51 unmodified lines
9191 reg = <0x0ae00000 0x1000>;
9292 reg-names = "mdss";
9393
94− interconnects = <&mmss_noc MASTER_MDP_DISP 0 &mc_virt SLAVE_EBI1_DISP 0>,
95− <&mmss_noc MASTER_MDP_DISP 0 &mc_virt SLAVE_EBI1_DISP 0>;
96− interconnect-names = "mdp0-mem", "mdp1-mem";
94+ interconnects = <&mmss_noc MASTER_MDP_DISP &mc_virt SLAVE_EBI1_DISP>,
95+ <&mmss_noc MASTER_MDP_DISP &mc_virt SLAVE_EBI1_DISP>,
96+ <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_DISPLAY_CFG>;
97+ interconnect-names = "mdp0-mem",
98+ "mdp1-mem",
99+ "cpu-cfg";
97100
98101 resets = <&dispcc DISP_CC_MDSS_CORE_BCR>;
99102
Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml+127−0
@@ -0,0 +1,127 @@
1+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/display/msm/qcom,sm8650-dpu.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Qualcomm SM8650 Display DPU
8+
9+maintainers:
10+ - Neil Armstrong <neil.armstrong@linaro.org>
11+
12+$ref: /schemas/display/msm/dpu-common.yaml#
13+
14+properties:
15+ compatible:
16+ const: qcom,sm8650-dpu
17+
18+ reg:
19+ items:
20+ - description: Address offset and size for mdp register set
21+ - description: Address offset and size for vbif register set
22+
23+ reg-names:
24+ items:
25+ - const: mdp
26+ - const: vbif
27+
28+ clocks:
29+ items:
30+ - description: Display hf axi
31+ - description: Display MDSS ahb
32+ - description: Display lut
33+ - description: Display core
34+ - description: Display vsync
35+
36+ clock-names:
37+ items:
38+ - const: nrt_bus
39+ - const: iface
40+ - const: lut
41+ - const: core
42+ - const: vsync
43+
44+required:
45+ - compatible
46+ - reg
47+ - reg-names
48+ - clocks
49+ - clock-names
50+
51+unevaluatedProperties: false
52+
53+examples:
54+ - |
55+ #include <dt-bindings/interrupt-controller/arm-gic.h>
56+ #include <dt-bindings/power/qcom,rpmhpd.h>
57+
58+ display-controller@ae01000 {
59+ compatible = "qcom,sm8650-dpu";
60+ reg = <0x0ae01000 0x8f000>,
61+ <0x0aeb0000 0x2008>;
62+ reg-names = "mdp", "vbif";
63+
64+ clocks = <&gcc_axi_clk>,
65+ <&dispcc_ahb_clk>,
66+ <&dispcc_mdp_lut_clk>,
67+ <&dispcc_mdp_clk>,
68+ <&dispcc_vsync_clk>;
69+ clock-names = "nrt_bus",
70+ "iface",
71+ "lut",
72+ "core",
73+ "vsync";
74+
75+ assigned-clocks = <&dispcc_vsync_clk>;
76+ assigned-clock-rates = <19200000>;
77+
78+ operating-points-v2 = <&mdp_opp_table>;
79+ power-domains = <&rpmhpd RPMHPD_MMCX>;
80+
81+ interrupt-parent = <&mdss>;
82+ interrupts = <0>;
83+
84+ ports {
85+ #address-cells = <1>;
86+ #size-cells = <0>;
87+
88+ port@0 {
89+ reg = <0>;
90+ dpu_intf1_out: endpoint {
91+ remote-endpoint = <&dsi0_in>;
92+ };
93+ };
94+
95+ port@1 {
96+ reg = <1>;
97+ dpu_intf2_out: endpoint {
98+ remote-endpoint = <&dsi1_in>;
99+ };
100+ };
101+ };
102+
103+ mdp_opp_table: opp-table {
104+ compatible = "operating-points-v2";
105+
106+ opp-200000000 {
107+ opp-hz = /bits/ 64 <200000000>;
108+ required-opps = <&rpmhpd_opp_low_svs>;
109+ };
110+
111+ opp-325000000 {
112+ opp-hz = /bits/ 64 <325000000>;
113+ required-opps = <&rpmhpd_opp_svs>;
114+ };
115+
116+ opp-375000000 {
117+ opp-hz = /bits/ 64 <375000000>;
118+ required-opps = <&rpmhpd_opp_svs_l1>;
119+ };
120+
121+ opp-514000000 {
122+ opp-hz = /bits/ 64 <514000000>;
123+ required-opps = <&rpmhpd_opp_nom>;
124+ };
125+ };
126+ };
127+...
Documentation/devicetree/bindings/display/msm/qcom,sm8650-mdss.yaml+328−0
@@ -0,0 +1,328 @@
1+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/display/msm/qcom,sm8650-mdss.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Qualcomm SM8650 Display MDSS
8+
9+maintainers:
10+ - Neil Armstrong <neil.armstrong@linaro.org>
11+
12+description:
13+ SM8650 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like
14+ DPU display controller, DSI and DP interfaces etc.
15+
16+$ref: /schemas/display/msm/mdss-common.yaml#
17+
18+properties:
19+ compatible:
20+ const: qcom,sm8650-mdss
21+
22+ clocks:
23+ items:
24+ - description: Display AHB
25+ - description: Display hf AXI
26+ - description: Display core
27+
28+ iommus:
29+ maxItems: 1
30+
31+ interconnects:
32+ maxItems: 2
33+
34+ interconnect-names:
35+ maxItems: 2
36+
37+patternProperties:
38+ "^display-controller@[0-9a-f]+$":
39+ type: object
40+ properties:
41+ compatible:
42+ const: qcom,sm8650-dpu
43+
44+ "^displayport-controller@[0-9a-f]+$":
45+ type: object
46+ properties:
47+ compatible:
48+ const: qcom,sm8650-dp
49+
50+ "^dsi@[0-9a-f]+$":
51+ type: object
52+ properties:
53+ compatible:
54+ items:
55+ - const: qcom,sm8650-dsi-ctrl
56+ - const: qcom,mdss-dsi-ctrl
57+
58+ "^phy@[0-9a-f]+$":
59+ type: object
60+ properties:
61+ compatible:
62+ const: qcom,sm8650-dsi-phy-4nm
63+
64+required:
65+ - compatible
66+
67+unevaluatedProperties: false
68+
69+examples:
70+ - |
71+ #include <dt-bindings/clock/qcom,rpmh.h>
72+ #include <dt-bindings/interrupt-controller/arm-gic.h>
73+ #include <dt-bindings/power/qcom,rpmhpd.h>
74+
75+ display-subsystem@ae00000 {
76+ compatible = "qcom,sm8650-mdss";
77+ reg = <0x0ae00000 0x1000>;
78+ reg-names = "mdss";
79+
80+ resets = <&dispcc_core_bcr>;
81+
82+ power-domains = <&dispcc_gdsc>;
83+
84+ clocks = <&gcc_ahb_clk>,
85+ <&gcc_axi_clk>,
86+ <&dispcc_mdp_clk>;
87+ clock-names = "bus", "nrt_bus", "core";
88+
89+ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
90+ interrupt-controller;
91+ #interrupt-cells = <1>;
92+
93+ iommus = <&apps_smmu 0x1c00 0x2>;
94+
95+ #address-cells = <1>;
96+ #size-cells = <1>;
97+ ranges;
98+
99+ display-controller@ae01000 {
100+ compatible = "qcom,sm8650-dpu";
101+ reg = <0x0ae01000 0x8f000>,
102+ <0x0aeb0000 0x2008>;
103+ reg-names = "mdp", "vbif";
104+
105+ clocks = <&gcc_axi_clk>,
106+ <&dispcc_ahb_clk>,
107+ <&dispcc_mdp_lut_clk>,
108+ <&dispcc_mdp_clk>,
109+ <&dispcc_mdp_vsync_clk>;
110+ clock-names = "nrt_bus",
111+ "iface",
112+ "lut",
113+ "core",
114+ "vsync";
115+
116+ assigned-clocks = <&dispcc_mdp_vsync_clk>;
117+ assigned-clock-rates = <19200000>;
118+
119+ operating-points-v2 = <&mdp_opp_table>;
120+ power-domains = <&rpmhpd RPMHPD_MMCX>;
121+
122+ interrupt-parent = <&mdss>;
123+ interrupts = <0>;
124+
125+ ports {
126+ #address-cells = <1>;
127+ #size-cells = <0>;
128+
129+ port@0 {
130+ reg = <0>;
131+ dpu_intf1_out: endpoint {
132+ remote-endpoint = <&dsi0_in>;
133+ };
134+ };
135+
136+ port@1 {
137+ reg = <1>;
138+ dpu_intf2_out: endpoint {
139+ remote-endpoint = <&dsi1_in>;
140+ };
141+ };
142+ };
143+
144+ mdp_opp_table: opp-table {
145+ compatible = "operating-points-v2";
146+
147+ opp-200000000 {
148+ opp-hz = /bits/ 64 <200000000>;
149+ required-opps = <&rpmhpd_opp_low_svs>;
150+ };
151+
152+ opp-325000000 {
153+ opp-hz = /bits/ 64 <325000000>;
154+ required-opps = <&rpmhpd_opp_svs>;
155+ };
156+
157+ opp-375000000 {
158+ opp-hz = /bits/ 64 <375000000>;
159+ required-opps = <&rpmhpd_opp_svs_l1>;
160+ };
161+
162+ opp-514000000 {
163+ opp-hz = /bits/ 64 <514000000>;
164+ required-opps = <&rpmhpd_opp_nom>;
165+ };
166+ };
167+ };
168+
169+ dsi@ae94000 {
170+ compatible = "qcom,sm8650-dsi-ctrl", "qcom,mdss-dsi-ctrl";
171+ reg = <0x0ae94000 0x400>;
172+ reg-names = "dsi_ctrl";
173+
174+ interrupt-parent = <&mdss>;
175+ interrupts = <4>;
176+
177+ clocks = <&dispc_byte_clk>,
178+ <&dispcc_intf_clk>,
179+ <&dispcc_pclk>,
180+ <&dispcc_esc_clk>,
181+ <&dispcc_ahb_clk>,
182+ <&gcc_bus_clk>;
183+ clock-names = "byte",
184+ "byte_intf",
185+ "pixel",
186+ "core",
187+ "iface",
188+ "bus";
189+
190+ assigned-clocks = <&dispcc_byte_clk>,
191+ <&dispcc_pclk>;
192+ assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>;
193+
194+ operating-points-v2 = <&dsi_opp_table>;
195+ power-domains = <&rpmhpd RPMHPD_MMCX>;
196+
197+ phys = <&dsi0_phy>;
198+ phy-names = "dsi";
199+
200+ #address-cells = <1>;
201+ #size-cells = <0>;
202+
203+ ports {
204+ #address-cells = <1>;
205+ #size-cells = <0>;
206+
207+ port@0 {
208+ reg = <0>;
209+ dsi0_in: endpoint {
210+ remote-endpoint = <&dpu_intf1_out>;
211+ };
212+ };
213+
214+ port@1 {
215+ reg = <1>;
216+ dsi0_out: endpoint {
217+ };
218+ };
219+ };
220+
221+ dsi_opp_table: opp-table {
222+ compatible = "operating-points-v2";
223+
224+ opp-187500000 {
225+ opp-hz = /bits/ 64 <187500000>;
226+ required-opps = <&rpmhpd_opp_low_svs>;
227+ };
228+
229+ opp-300000000 {
230+ opp-hz = /bits/ 64 <300000000>;
231+ required-opps = <&rpmhpd_opp_svs>;
232+ };
233+
234+ opp-358000000 {
235+ opp-hz = /bits/ 64 <358000000>;
236+ required-opps = <&rpmhpd_opp_svs_l1>;
237+ };
238+ };
239+ };
240+
241+ dsi0_phy: phy@ae94400 {
242+ compatible = "qcom,sm8650-dsi-phy-4nm";
243+ reg = <0x0ae95000 0x200>,
244+ <0x0ae95200 0x280>,
245+ <0x0ae95500 0x400>;
246+ reg-names = "dsi_phy",
247+ "dsi_phy_lane",
248+ "dsi_pll";
249+
250+ #clock-cells = <1>;
251+ #phy-cells = <0>;
252+
253+ clocks = <&dispcc_iface_clk>,
254+ <&rpmhcc_ref_clk>;
255+ clock-names = "iface", "ref";
256+ };
257+
258+ dsi@ae96000 {
259+ compatible = "qcom,sm8650-dsi-ctrl", "qcom,mdss-dsi-ctrl";
260+ reg = <0x0ae96000 0x400>;
261+ reg-names = "dsi_ctrl";
262+
263+ interrupt-parent = <&mdss>;
264+ interrupts = <5>;
265+
266+ clocks = <&dispc_byte_clk>,
267+ <&dispcc_intf_clk>,
268+ <&dispcc_pclk>,
269+ <&dispcc_esc_clk>,
270+ <&dispcc_ahb_clk>,
271+ <&gcc_bus_clk>;
272+ clock-names = "byte",
273+ "byte_intf",
274+ "pixel",
275+ "core",
276+ "iface",
277+ "bus";
278+
279+ assigned-clocks = <&dispcc_byte_clk>,
280+ <&dispcc_pclk>;
281+ assigned-clock-parents = <&dsi1_phy 0>, <&dsi1_phy 1>;
282+
283+ operating-points-v2 = <&dsi_opp_table>;
284+ power-domains = <&rpmhpd RPMHPD_MMCX>;
285+
286+ phys = <&dsi1_phy>;
287+ phy-names = "dsi";
288+
289+ #address-cells = <1>;
290+ #size-cells = <0>;
291+
292+ ports {
293+ #address-cells = <1>;
294+ #size-cells = <0>;
295+
296+ port@0 {
297+ reg = <0>;
298+ dsi1_in: endpoint {
299+ remote-endpoint = <&dpu_intf2_out>;
300+ };
301+ };
302+
303+ port@1 {
304+ reg = <1>;
305+ dsi1_out: endpoint {
306+ };
307+ };
308+ };
309+ };
310+
311+ dsi1_phy: phy@ae96400 {
312+ compatible = "qcom,sm8650-dsi-phy-4nm";
313+ reg = <0x0ae97000 0x200>,
314+ <0x0ae97200 0x280>,
315+ <0x0ae97500 0x400>;
316+ reg-names = "dsi_phy",
317+ "dsi_phy_lane",
318+ "dsi_pll";
319+
320+ #clock-cells = <1>;
321+ #phy-cells = <0>;
322+
323+ clocks = <&dispcc_iface_clk>,
324+ <&rpmhcc_ref_clk>;
325+ clock-names = "iface", "ref";
326+ };
327+ };
328+...
Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml+2−0
@@ -42,6 +42,8 @@ properties: · 41 unmodified lines
4242 - lg,acx467akm-7
4343 # LG Corporation 7" WXGA TFT LCD panel
4444 - lg,ld070wx3-sl01
45+ # LG Corporation 5" HD TFT LCD panel
46+ - lg,lh500wx1-sd03
4547 # One Stop Displays OSD101T2587-53TS 10.1" 1920x1200 panel
4648 - osddisplays,osd101t2587-53ts
4749 # Panasonic 10" WUXGA TFT LCD panel
Documentation/devicetree/bindings/display/panel/panel-simple.yaml+0−2
@@ -214,8 +214,6 @@ properties: · 213 unmodified lines
214214 - lemaker,bl035-rgb-002
215215 # LG 7" (800x480 pixels) TFT LCD panel
216216 - lg,lb070wv8
217− # LG Corporation 5" HD TFT LCD panel
218− - lg,lh500wx1-sd03
219217 # LG LP079QX1-SP0V 7.9" (1536x2048 pixels) TFT LCD panel
220218 - lg,lp079qx1-sp0v
221219 # LG 9.7" (2048x1536 pixels) TFT LCD panel
Documentation/devicetree/bindings/display/panel/synaptics,r63353.yaml+61−0
@@ -0,0 +1,61 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/display/panel/synaptics,r63353.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Synaptics R63353 based MIPI-DSI panels
8+
9+maintainers:
10+ - Michael Trimarchi <michael@amarulasolutions.com>
11+
12+allOf:
13+ - $ref: panel-common.yaml#
14+
15+properties:
16+ compatible:
17+ items:
18+ - enum:
19+ - sharp,ls068b3sx02
20+ - const: syna,r63353
21+
22+ avdd-supply: true
23+ dvdd-supply: true
24+ reg: true
25+
26+required:
27+ - compatible
28+ - avdd-supply
29+ - dvdd-supply
30+ - reg
31+ - reset-gpios
32+ - port
33+ - backlight
34+
35+unevaluatedProperties: false
36+
37+examples:
38+ - |
39+ #include <dt-bindings/gpio/gpio.h>
40+
41+ dsi {
42+ #address-cells = <1>;
43+ #size-cells = <0>;
44+
45+ panel@0 {
46+ compatible = "sharp,ls068b3sx02", "syna,r63353";
47+ reg = <0>;
48+ avdd-supply = <&avdd_display>;
49+ dvdd-supply = <&dvdd_display>;
50+ reset-gpios = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL05 */
51+ backlight = <&backlight>;
52+
53+ port {
54+ panel_in: endpoint {
55+ remote-endpoint = <&mipi_dsi_out>;
56+ };
57+ };
58+ };
59+ };
60+
61+...
Documentation/devicetree/bindings/display/rockchip/inno_hdmi-rockchip.txt+0−49
@@ -1,49 +0,0 @@
1−Rockchip specific extensions to the Innosilicon HDMI
2−================================
3−
4−Required properties:
5−- compatible:
6− "rockchip,rk3036-inno-hdmi";
7−- reg:
8− Physical base address and length of the controller's registers.
9−- clocks, clock-names:
10− Phandle to hdmi controller clock, name should be "pclk"
11−- interrupts:
12− HDMI interrupt number
13−- ports:
14− Contain one port node with endpoint definitions as defined in
15− Documentation/devicetree/bindings/graph.txt.
16−- pinctrl-0, pinctrl-name:
17− Switch the iomux of HPD/CEC pins to HDMI function.
18−
19−Example:
20−hdmi: hdmi@20034000 {
21− compatible = "rockchip,rk3036-inno-hdmi";
22− reg = <0x20034000 0x4000>;
23− interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
24− clocks = <&cru PCLK_HDMI>;
25− clock-names = "pclk";
26− pinctrl-names = "default";
27− pinctrl-0 = <&hdmi_ctl>;
28−
29− hdmi_in: port {
30− #address-cells = <1>;
31− #size-cells = <0>;
32− hdmi_in_lcdc: endpoint@0 {
33− reg = <0>;
34− remote-endpoint = <&lcdc_out_hdmi>;
35− };
36− };
37−};
38−
39−&pinctrl {
40− hdmi {
41− hdmi_ctl: hdmi-ctl {
42− rockchip,pins = <1 8 RK_FUNC_1 &pcfg_pull_none>,
43− <1 9 RK_FUNC_1 &pcfg_pull_none>,
44− <1 10 RK_FUNC_1 &pcfg_pull_none>,
45− <1 11 RK_FUNC_1 &pcfg_pull_none>;
46− };
47− };
48−
49−};
Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml+139−0
@@ -0,0 +1,139 @@
1+# SPDX-License-Identifier: GPL-2.0
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/display/rockchip/rockchip,inno-hdmi.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Rockchip Innosilicon HDMI controller
8+
9+maintainers:
10+ - Sandy Huang <hjc@rock-chips.com>
11+ - Heiko Stuebner <heiko@sntech.de>
12+
13+properties:
14+ compatible:
15+ enum:
16+ - rockchip,rk3036-inno-hdmi
17+ - rockchip,rk3128-inno-hdmi
18+
19+ reg:
20+ maxItems: 1
21+
22+ interrupts:
23+ maxItems: 1
24+
25+ clocks:
26+ minItems: 1
27+ items:
28+ - description: The HDMI controller main clock
29+ - description: The HDMI PHY reference clock
30+
31+ clock-names:
32+ minItems: 1
33+ items:
34+ - const: pclk
35+ - const: ref
36+
37+ power-domains:
38+ maxItems: 1
39+
40+ ports:
41+ $ref: /schemas/graph.yaml#/properties/ports
42+
43+ properties:
44+ port@0:
45+ $ref: /schemas/graph.yaml#/properties/port
46+ description:
47+ Port node with one endpoint connected to a vop node.
48+
49+ port@1:
50+ $ref: /schemas/graph.yaml#/properties/port
51+ description:
52+ Port node with one endpoint connected to a hdmi-connector node.
53+
54+ required:
55+ - port@0
56+ - port@1
57+
58+required:
59+ - compatible
60+ - reg
61+ - interrupts
62+ - clocks
63+ - clock-names
64+ - pinctrl-0
65+ - pinctrl-names
66+ - ports
67+
68+allOf:
69+ - if:
70+ properties:
71+ compatible:
72+ contains:
73+ const: rockchip,rk3036-inno-hdmi
74+
75+ then:
76+ properties:
77+ power-domains: false
78+
79+ - if:
80+ properties:
81+ compatible:
82+ contains:
83+ const: rockchip,rk3128-inno-hdmi
84+
85+ then:
86+ properties:
87+ clocks:
88+ minItems: 2
89+ clock-names:
90+ minItems: 2
91+ required:
92+ - power-domains
93+
94+additionalProperties: false
95+
96+examples:
97+ - |
98+ #include <dt-bindings/clock/rk3036-cru.h>
99+ #include <dt-bindings/interrupt-controller/arm-gic.h>
100+ #include <dt-bindings/pinctrl/rockchip.h>
101+ hdmi: hdmi@20034000 {
102+ compatible = "rockchip,rk3036-inno-hdmi";
103+ reg = <0x20034000 0x4000>;
104+ interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
105+ clocks = <&cru PCLK_HDMI>;
106+ clock-names = "pclk";
107+ pinctrl-names = "default";
108+ pinctrl-0 = <&hdmi_ctl>;
109+
110+ ports {
111+ #address-cells = <1>;
112+ #size-cells = <0>;
113+
114+ hdmi_in: port@0 {
115+ reg = <0>;
116+ hdmi_in_vop: endpoint {
117+ remote-endpoint = <&vop_out_hdmi>;
118+ };
119+ };
120+
121+ hdmi_out: port@1 {
122+ reg = <1>;
123+ hdmi_out_con: endpoint {
124+ remote-endpoint = <&hdmi_con_in>;
125+ };
126+ };
127+ };
128+ };
129+
130+ pinctrl {
131+ hdmi {
132+ hdmi_ctl: hdmi-ctl {
133+ rockchip,pins = <1 RK_PB0 1 &pcfg_pull_none>,
134+ <1 RK_PB1 1 &pcfg_pull_none>,
135+ <1 RK_PB2 1 &pcfg_pull_none>,
136+ <1 RK_PB3 1 &pcfg_pull_none>;
137+ };
138+ };
139+ };
Documentation/devicetree/bindings/dma/dma-controller.yaml+0−15
@@ -19,19 +19,4 @@ properties: · 18 unmodified lines
1919
2020 additionalProperties: true
2121
22−examples:
23− - |
24− dma: dma-controller@48000000 {
25− compatible = "ti,omap-sdma";
26− reg = <0x48000000 0x1000>;
27− interrupts = <0 12 0x4>,
28− <0 13 0x4>,
29− <0 14 0x4>,
30− <0 15 0x4>;
31− #dma-cells = <1>;
32− dma-channels = <32>;
33− dma-requests = <127>;
34− dma-channel-mask = <0xfffe>;
35− };
36−
3722 ...
Documentation/devicetree/bindings/dma/dma-router.yaml+0−11
@@ -40,15 +40,4 @@ required: · 39 unmodified lines
4040
4141 additionalProperties: true
4242
43−examples:
44− - |
45− sdma_xbar: dma-router@4a002b78 {
46− compatible = "ti,dra7-dma-crossbar";
47− reg = <0x4a002b78 0xfc>;
48− #dma-cells = <1>;
49− dma-requests = <205>;
50− ti,dma-safe-map = <0>;
51− dma-masters = <&sdma>;
52− };
53−
5443 ...
Documentation/devicetree/bindings/dma/loongson,ls2x-apbdma.yaml+62−0
@@ -0,0 +1,62 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/dma/loongson,ls2x-apbdma.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Loongson LS2X APB DMA controller
8+
9+description:
10+ The Loongson LS2X APB DMA controller is used for transferring data
11+ between system memory and the peripherals on the APB bus.
12+
13+maintainers:
14+ - Binbin Zhou <zhoubinbin@loongson.cn>
15+
16+allOf:
17+ - $ref: dma-controller.yaml#
18+
19+properties:
20+ compatible:
21+ oneOf:
22+ - const: loongson,ls2k1000-apbdma
23+ - items:
24+ - const: loongson,ls2k0500-apbdma
25+ - const: loongson,ls2k1000-apbdma
26+
27+ reg:
28+ maxItems: 1
29+
30+ interrupts:
31+ maxItems: 1
32+
33+ clocks:
34+ maxItems: 1
35+
36+ '#dma-cells':
37+ const: 1
38+
39+required:
40+ - compatible
41+ - reg
42+ - interrupts
43+ - clocks
44+ - '#dma-cells'
45+
46+additionalProperties: false
47+
48+examples:
49+ - |
50+ #include <dt-bindings/interrupt-controller/irq.h>
51+ #include <dt-bindings/clock/loongson,ls2k-clk.h>
52+
53+ dma-controller@1fe00c00 {
54+ compatible = "loongson,ls2k1000-apbdma";
55+ reg = <0x1fe00c00 0x8>;
56+ interrupt-parent = <&liointc1>;
57+ interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
58+ clocks = <&clk LOONGSON2_APB_CLK>;
59+ #dma-cells = <1>;
60+ };
61+
62+...
Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml+3−0
@@ -53,6 +53,9 @@ properties: · 52 unmodified lines
5353 ADMA_CHn_CTRL register.
5454 const: 1
5555
56+ dma-channel-mask:
57+ maxItems: 1
58+
5659 required:
5760 - compatible
5861 - reg
Documentation/devicetree/bindings/dma/qcom,gpi.yaml+2−0
@@ -32,6 +32,8 @@ properties: · 31 unmodified lines
3232 - qcom,sm8350-gpi-dma
3333 - qcom,sm8450-gpi-dma
3434 - qcom,sm8550-gpi-dma
35+ - qcom,sm8650-gpi-dma
36+ - qcom,x1e80100-gpi-dma
3537 - const: qcom,sm6350-gpi-dma
3638 - items:
3739 - enum:
Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml+1−1
@@ -16,7 +16,7 @@ properties: · 15 unmodified lines
1616 compatible:
1717 items:
1818 - enum:
19− - renesas,r9a07g043-dmac # RZ/G2UL
19+ - renesas,r9a07g043-dmac # RZ/G2UL and RZ/Five
2020 - renesas,r9a07g044-dmac # RZ/G2{L,LC}
2121 - renesas,r9a07g054-dmac # RZ/V2L
2222 - const: renesas,rz-dmac
Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml+1−0
@@ -29,6 +29,7 @@ properties: · 28 unmodified lines
2929 compatible:
3030 items:
3131 - enum:
32+ - microchip,mpfs-pdma
3233 - sifive,fu540-c000-pdma
3334 - const: sifive,pdma0
3435 description:
Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml+33−6
@@ -37,11 +37,11 @@ properties: · 36 unmodified lines
3737
3838 reg:
3939 minItems: 3
40− maxItems: 5
40+ maxItems: 9
4141
4242 reg-names:
4343 minItems: 3
44− maxItems: 5
44+ maxItems: 9
4545
4646 "#dma-cells":
4747 const: 3
@@ -141,7 +141,10 @@ allOf: · 93 unmodified lines
141141 ti,sci-rm-range-tchan: false
142142
143143 reg:
144− maxItems: 3
144+ items:
145+ - description: BCDMA Control /Status Registers region
146+ - description: RX Channel Realtime Registers region
147+ - description: Ring Realtime Registers region
145148
146149 reg-names:
147150 items:
@@ -161,14 +164,29 @@ allOf: · 13 unmodified lines
161164 properties:
162165 reg:
163166 minItems: 5
167+ items:
168+ - description: BCDMA Control /Status Registers region
169+ - description: Block Copy Channel Realtime Registers region
170+ - description: RX Channel Realtime Registers region
171+ - description: TX Channel Realtime Registers region
172+ - description: Ring Realtime Registers region
173+ - description: Ring Configuration Registers region
174+ - description: TX Channel Configuration Registers region
175+ - description: RX Channel Configuration Registers region
176+ - description: Block Copy Channel Configuration Registers region
164177
165178 reg-names:
179+ minItems: 5
166180 items:
167181 - const: gcfg
168182 - const: bchanrt
169183 - const: rchanrt
170184 - const: tchanrt
171185 - const: ringrt
186+ - const: ring
187+ - const: tchan
188+ - const: rchan
189+ - const: bchan
172190
173191 required:
174192 - ti,sci-rm-range-bchan
@@ -184,7 +202,11 @@ allOf: · 9 unmodified lines
184202 ti,sci-rm-range-bchan: false
185203
186204 reg:
187− maxItems: 4
205+ items:
206+ - description: BCDMA Control /Status Registers region
207+ - description: RX Channel Realtime Registers region
208+ - description: TX Channel Realtime Registers region
209+ - description: Ring Realtime Registers region
188210
189211 reg-names:
190212 items:
@@ -220,8 +242,13 @@ examples: · 29 unmodified lines
220242 <0x0 0x4c000000 0x0 0x20000>,
221243 <0x0 0x4a820000 0x0 0x20000>,
222244 <0x0 0x4aa40000 0x0 0x20000>,
223− <0x0 0x4bc00000 0x0 0x100000>;
224− reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt";
245+ <0x0 0x4bc00000 0x0 0x100000>,
246+ <0x0 0x48600000 0x0 0x8000>,
247+ <0x0 0x484a4000 0x0 0x2000>,
248+ <0x0 0x484c2000 0x0 0x2000>,
249+ <0x0 0x48420000 0x0 0x2000>;
250+ reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt",
251+ "ring", "tchan", "rchan", "bchan";
225252 msi-parent = <&inta_main_dmss>;
226253 #dma-cells = <3>;
227254
Documentation/devicetree/bindings/dma/ti/k3-pktdma.yaml+23−3
@@ -45,14 +45,28 @@ properties: · 44 unmodified lines
4545 The second cell is the ASEL value for the channel
4646
4747 reg:
48− maxItems: 4
48+ minItems: 4
49+ items:
50+ - description: Packet DMA Control /Status Registers region
51+ - description: RX Channel Realtime Registers region
52+ - description: TX Channel Realtime Registers region
53+ - description: Ring Realtime Registers region
54+ - description: Ring Configuration Registers region
55+ - description: TX Configuration Registers region
56+ - description: RX Configuration Registers region
57+ - description: RX Flow Configuration Registers region
4958
5059 reg-names:
60+ minItems: 4
5161 items:
5262 - const: gcfg
5363 - const: rchanrt
5464 - const: tchanrt
5565 - const: ringrt
66+ - const: ring
67+ - const: tchan
68+ - const: rchan
69+ - const: rflow
5670
5771 msi-parent: true
5872
@@ -136,8 +150,14 @@ examples: · 77 unmodified lines
136150 reg = <0x0 0x485c0000 0x0 0x100>,
137151 <0x0 0x4a800000 0x0 0x20000>,
138152 <0x0 0x4aa00000 0x0 0x40000>,
139− <0x0 0x4b800000 0x0 0x400000>;
140− reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";
153+ <0x0 0x4b800000 0x0 0x400000>,
154+ <0x0 0x485e0000 0x0 0x20000>,
155+ <0x0 0x484a0000 0x0 0x4000>,
156+ <0x0 0x484c0000 0x0 0x2000>,
157+ <0x0 0x48430000 0x0 0x4000>;
158+ reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt",
159+ "ring", "tchan", "rchan", "rflow";
160+
141161 msi-parent = <&inta_main_dmss>;
142162 #dma-cells = <2>;
143163
Documentation/devicetree/bindings/dma/ti/k3-udma.yaml+17−3
@@ -69,13 +69,24 @@ properties: · 68 unmodified lines
6969 - ti,j721e-navss-mcu-udmap
7070
7171 reg:
72− maxItems: 3
72+ minItems: 3
73+ items:
74+ - description: UDMA-P Control /Status Registers region
75+ - description: RX Channel Realtime Registers region
76+ - description: TX Channel Realtime Registers region
77+ - description: TX Configuration Registers region
78+ - description: RX Configuration Registers region
79+ - description: RX Flow Configuration Registers region
7380
7481 reg-names:
82+ minItems: 3
7583 items:
7684 - const: gcfg
7785 - const: rchanrt
7886 - const: tchanrt
87+ - const: tchan
88+ - const: rchan
89+ - const: rflow
7990
8091 msi-parent: true
8192
@@ -158,8 +169,11 @@ examples: · 76 unmodified lines
158169 compatible = "ti,am654-navss-main-udmap";
159170 reg = <0x0 0x31150000 0x0 0x100>,
160171 <0x0 0x34000000 0x0 0x100000>,
161− <0x0 0x35000000 0x0 0x100000>;
162− reg-names = "gcfg", "rchanrt", "tchanrt";
172+ <0x0 0x35000000 0x0 0x100000>,
173+ <0x0 0x30b00000 0x0 0x20000>,
174+ <0x0 0x30c00000 0x0 0x8000>,
175+ <0x0 0x30d00000 0x0 0x4000>;
176+ reg-names = "gcfg", "rchanrt", "tchanrt", "tchan", "rchan", "rflow";
163177 #dma-cells = <1>;
164178
165179 ti,ringacc = <&ringacc>;
Documentation/devicetree/bindings/dts-coding-style.rst+196−0
@@ -0,0 +1,196 @@
1+.. SPDX-License-Identifier: GPL-2.0
2+
3+=====================================
4+Devicetree Sources (DTS) Coding Style
5+=====================================
6+
7+When writing Devicetree Sources (DTS) please observe below guidelines. They
8+should be considered complementary to any rules expressed already in
9+the Devicetree Specification and the dtc compiler (including W=1 and W=2
10+builds).
11+
12+Individual architectures and subarchitectures can define additional rules,
13+making the coding style stricter.
14+
15+Naming and Valid Characters
16+---------------------------
17+
18+The Devicetree Specification allows a broad range of characters in node
19+and property names, but this coding style narrows the range down to achieve
20+better code readability.
21+
22+1. Node and property names can use only the following characters:
23+
24+ * Lowercase characters: [a-z]
25+ * Digits: [0-9]
26+ * Dash: -
27+
28+2. Labels can use only the following characters:
29+
30+ * Lowercase characters: [a-z]
31+ * Digits: [0-9]
32+ * Underscore: _
33+
34+3. Unless a bus defines differently, unit addresses shall use lowercase
35+ hexadecimal digits, without leading zeros (padding).
36+
37+4. Hex values in properties, e.g. "reg", shall use lowercase hex. The address
38+ part can be padded with leading zeros.
39+
40+Example::
41+
42+ gpi_dma2: dma-controller@a00000 {
43+ compatible = "qcom,sm8550-gpi-dma", "qcom,sm6350-gpi-dma";
44+ reg = <0x0 0x00a00000 0x0 0x60000>;
45+ }
46+
47+Order of Nodes
48+--------------
49+
50+1. Nodes on any bus, thus using unit addresses for children, shall be
51+ ordered by unit address in ascending order.
52+ Alternatively for some subarchitectures, nodes of the same type can be
53+ grouped together, e.g. all I2C controllers one after another even if this
54+ breaks unit address ordering.
55+
56+2. Nodes without unit addresses shall be ordered alpha-numerically by the node
57+ name. For a few node types, they can be ordered by the main property, e.g.
58+ pin configuration states ordered by value of "pins" property.
59+
60+3. When extending nodes in the board DTS via &label, the entries shall be
61+ ordered either alpha-numerically or by keeping the order from DTSI, where
62+ the choice depends on the subarchitecture.
63+
64+The above-described ordering rules are easy to enforce during review, reduce
65+chances of conflicts for simultaneous additions of new nodes to a file and help
66+in navigating through the DTS source.
67+
68+Example::
69+
70+ /* SoC DTSI */
71+
72+ / {
73+ cpus {
74+ /* ... */
75+ };
76+
77+ psci {
78+ /* ... */
79+ };
80+
81+ soc@0 {
82+ dma: dma-controller@10000 {
83+ /* ... */
84+ };
85+
86+ clk: clock-controller@80000 {
87+ /* ... */
88+ };
89+ };
90+ };
91+
92+ /* Board DTS - alphabetical order */
93+
94+ &clk {
95+ /* ... */
96+ };
97+
98+ &dma {
99+ /* ... */
100+ };
101+
102+ /* Board DTS - alternative order, keep as DTSI */
103+
104+ &dma {
105+ /* ... */
106+ };
107+
108+ &clk {
109+ /* ... */
110+ };
111+
112+Order of Properties in Device Node
113+----------------------------------
114+
115+The following order of properties in device nodes is preferred:
116+
117+1. "compatible"
118+2. "reg"
119+3. "ranges"
120+4. Standard/common properties (defined by common bindings, e.g. without
121+ vendor-prefixes)
122+5. Vendor-specific properties
123+6. "status" (if applicable)
124+7. Child nodes, where each node is preceded with a blank line
125+
126+The "status" property is by default "okay", thus it can be omitted.
127+
128+The above-described ordering follows this approach:
129+
130+1. Most important properties start the node: compatible then bus addressing to
131+ match unit address.
132+2. Each node will have common properties in similar place.
133+3. Status is the last information to annotate that device node is or is not
134+ finished (board resources are needed).
135+
136+Example::
137+
138+ /* SoC DTSI */
139+
140+ device_node: device-class@6789abc {
141+ compatible = "vendor,device";
142+ reg = <0x0 0x06789abc 0x0 0xa123>;
143+ ranges = <0x0 0x0 0x06789abc 0x1000>;
144+ #dma-cells = <1>;
145+ clocks = <&clock_controller 0>, <&clock_controller 1>;
146+ clock-names = "bus", "host";
147+ vendor,custom-property = <2>;
148+ status = "disabled";
149+
150+ child_node: child-class@100 {
151+ reg = <0x100 0x200>;
152+ /* ... */
153+ };
154+ };
155+
156+ /* Board DTS */
157+
158+ &device_node {
159+ vdd-supply = <&board_vreg1>;
160+ status = "okay";
161+ }
162+
163+Indentation
164+-----------
165+
166+1. Use indentation according to Documentation/process/coding-style.rst.
167+2. Each entry in arrays with multiple cells, e.g. "reg" with two IO addresses,
168+ shall be enclosed in <>.
169+3. For arrays spanning across lines, it is preferred to align the continued
170+ entries with opening < from the first line.
171+
172+Example::
173+
174+ thermal-sensor@c271000 {
175+ compatible = "qcom,sm8550-tsens", "qcom,tsens-v2";
176+ reg = <0x0 0x0c271000 0x0 0x1000>,
177+ <0x0 0x0c222000 0x0 0x1000>;
178+ };
179+
180+Organizing DTSI and DTS
181+-----------------------
182+
183+The DTSI and DTS files shall be organized in a way representing the common,
184+reusable parts of hardware. Typically, this means organizing DTSI and DTS files
185+into several files:
186+
187+1. DTSI with contents of the entire SoC, without nodes for hardware not present
188+ on the SoC.
189+2. If applicable: DTSI with common or re-usable parts of the hardware, e.g.
190+ entire System-on-Module.
191+3. DTS representing the board.
192+
193+Hardware components that are present on the board shall be placed in the
194+board DTS, not in the SoC or SoM DTSI. A partial exception is a common
195+external reference SoC input clock, which could be coded as a fixed-clock in
196+the SoC DTSI with its frequency provided by each board DTS.
Documentation/devicetree/bindings/eeprom/at24.yaml+1−0
@@ -123,6 +123,7 @@ properties: · 122 unmodified lines
123123 - enum:
124124 - onnn,cat24c04
125125 - onnn,cat24c05
126+ - rohm,br24g04
126127 - const: atmel,24c04
127128 - items:
128129 - const: renesas,r1ex24016
Documentation/devicetree/bindings/firmware/qcom,scm.yaml+3−15
@@ -63,7 +63,9 @@ properties: · 62 unmodified lines
6363 - qcom,scm-sm8350
6464 - qcom,scm-sm8450
6565 - qcom,scm-sm8550
66+ - qcom,scm-sm8650
6667 - qcom,scm-qcs404
68+ - qcom,scm-x1e80100
6769 - const: qcom,scm
6870
6971 clocks:
@@ -178,21 +180,6 @@ allOf: · 108 unmodified lines
178180 minItems: 3
179181 maxItems: 3
180182
181− # Interconnects
182− - if:
183− not:
184− properties:
185− compatible:
186− contains:
187− enum:
188− - qcom,scm-qdu1000
189− - qcom,scm-sc8280xp
190− - qcom,scm-sm8450
191− - qcom,scm-sm8550
192− then:
193− properties:
194− interconnects: false
195−
196183 # Interrupts
197184 - if:
198185 not:
@@ -202,6 +189,7 @@ allOf: · 3 unmodified lines
202189 enum:
203190 - qcom,scm-sm8450
204191 - qcom,scm-sm8550
192+ - qcom,scm-sm8650
205193 then:
206194 properties:
207195 interrupts: false
Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml+2−2
@@ -95,8 +95,8 @@ examples: · 94 unmodified lines
9595 versal_clk: clock-controller {
9696 #clock-cells = <1>;
9797 compatible = "xlnx,versal-clk";
98− clocks = <&ref>, <&alt_ref>, <&pl_alt_ref>;
99− clock-names = "ref", "alt_ref", "pl_alt_ref";
98+ clocks = <&ref>, <&pl_alt_ref>;
99+ clock-names = "ref", "pl_alt_ref";
100100 };
101101 };
102102
Documentation/devicetree/bindings/fpga/altera-fpga2sdram-bridge.txt+0−13
@@ -1,13 +0,0 @@
1−Altera FPGA To SDRAM Bridge Driver
2−
3−Required properties:
4−- compatible : Should contain "altr,socfpga-fpga2sdram-bridge"
5−
6−See Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings.
7−
8−Example:
9− fpga_bridge3: fpga-bridge@ffc25080 {
10− compatible = "altr,socfpga-fpga2sdram-bridge";
11− reg = <0xffc25080 0x4>;
12− bridge-enable = <0>;
13− };
Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt+0−20
@@ -1,20 +0,0 @@
1−Altera Freeze Bridge Controller Driver
2−
3−The Altera Freeze Bridge Controller manages one or more freeze bridges.
4−The controller can freeze/disable the bridges which prevents signal
5−changes from passing through the bridge. The controller can also
6−unfreeze/enable the bridges which allows traffic to pass through the
7−bridge normally.
8−
9−Required properties:
10−- compatible : Should contain "altr,freeze-bridge-controller"
11−- regs : base address and size for freeze bridge module
12−
13−See Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings.
14−
15−Example:
16− freeze-controller@100000450 {
17− compatible = "altr,freeze-bridge-controller";
18− regs = <0x1000 0x10>;
19− bridge-enable = <0>;
20− };
Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt+0−36
@@ -1,36 +0,0 @@
1−Altera FPGA/HPS Bridge Driver
2−
3−Required properties:
4−- regs : base address and size for AXI bridge module
5−- compatible : Should contain one of:
6− "altr,socfpga-lwhps2fpga-bridge",
7− "altr,socfpga-hps2fpga-bridge", or
8− "altr,socfpga-fpga2hps-bridge"
9−- resets : Phandle and reset specifier for this bridge's reset
10−- clocks : Clocks used by this module.
11−
12−See Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings.
13−
14−Example:
15− fpga_bridge0: fpga-bridge@ff400000 {
16− compatible = "altr,socfpga-lwhps2fpga-bridge";
17− reg = <0xff400000 0x100000>;
18− resets = <&rst LWHPS2FPGA_RESET>;
19− clocks = <&l4_main_clk>;
20− bridge-enable = <0>;
21− };
22−
23− fpga_bridge1: fpga-bridge@ff500000 {
24− compatible = "altr,socfpga-hps2fpga-bridge";
25− reg = <0xff500000 0x10000>;
26− resets = <&rst HPS2FPGA_RESET>;
27− clocks = <&l4_main_clk>;
28− bridge-enable = <1>;
29− };
30−
31− fpga_bridge2: fpga-bridge@ff600000 {
32− compatible = "altr,socfpga-fpga2hps-bridge";
33− reg = <0xff600000 0x100000>;
34− resets = <&rst FPGA2HPS_RESET>;
35− clocks = <&l4_main_clk>;
36− };
Documentation/devicetree/bindings/fpga/altr,freeze-bridge-controller.yaml+41−0
@@ -0,0 +1,41 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/fpga/altr,freeze-bridge-controller.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Altera Freeze Bridge Controller
8+
9+description:
10+ The Altera Freeze Bridge Controller manages one or more freeze bridges.
11+ The controller can freeze/disable the bridges which prevents signal
12+ changes from passing through the bridge. The controller can also
13+ unfreeze/enable the bridges which allows traffic to pass through the bridge
14+ normally.
15+
16+maintainers:
17+ - Xu Yilun <yilun.xu@intel.com>
18+
19+allOf:
20+ - $ref: fpga-bridge.yaml#
21+
22+properties:
23+ compatible:
24+ const: altr,freeze-bridge-controller
25+
26+ reg:
27+ maxItems: 1
28+
29+required:
30+ - compatible
31+ - reg
32+
33+unevaluatedProperties: false
34+
35+examples:
36+ - |
37+ fpga-bridge@100000450 {
38+ compatible = "altr,freeze-bridge-controller";
39+ reg = <0x1000 0x10>;
40+ bridge-enable = <0>;
41+ };
Documentation/devicetree/bindings/fpga/altr,socfpga-fpga2sdram-bridge.yaml+33−0
@@ -0,0 +1,33 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/fpga/altr,socfpga-fpga2sdram-bridge.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Altera FPGA To SDRAM Bridge
8+
9+maintainers:
10+ - Xu Yilun <yilun.xu@intel.com>
11+
12+allOf:
13+ - $ref: fpga-bridge.yaml#
14+
15+properties:
16+ compatible:
17+ const: altr,socfpga-fpga2sdram-bridge
18+
19+ reg:
20+ maxItems: 1
21+
22+required:
23+ - compatible
24+
25+unevaluatedProperties: false
26+
27+examples:
28+ - |
29+ fpga-bridge@ffc25080 {
30+ compatible = "altr,socfpga-fpga2sdram-bridge";
31+ reg = <0xffc25080 0x4>;
32+ bridge-enable = <0>;
33+ };
Documentation/devicetree/bindings/fpga/altr,socfpga-hps2fpga-bridge.yaml+49−0
@@ -0,0 +1,49 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/fpga/altr,socfpga-hps2fpga-bridge.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Altera FPGA/HPS Bridge
8+
9+maintainers:
10+ - Xu Yilun <yilun.xu@intel.com>
11+
12+allOf:
13+ - $ref: fpga-bridge.yaml#
14+
15+properties:
16+ compatible:
17+ enum:
18+ - altr,socfpga-lwhps2fpga-bridge
19+ - altr,socfpga-hps2fpga-bridge
20+ - altr,socfpga-fpga2hps-bridge
21+
22+ reg:
23+ maxItems: 1
24+
25+ resets:
26+ maxItems: 1
27+
28+ clocks:
29+ maxItems: 1
30+
31+required:
32+ - compatible
33+ - reg
34+ - clocks
35+ - resets
36+
37+unevaluatedProperties: false
38+
39+examples:
40+ - |
41+ #include <dt-bindings/reset/altr,rst-mgr.h>
42+
43+ fpga-bridge@ff400000 {
44+ compatible = "altr,socfpga-lwhps2fpga-bridge";
45+ reg = <0xff400000 0x100000>;
46+ bridge-enable = <0>;
47+ clocks = <&l4_main_clk>;
48+ resets = <&rst LWHPS2FPGA_RESET>;
49+ };
Documentation/devicetree/bindings/fpga/fpga-bridge.txt+0−13
@@ -1,13 +0,0 @@
1−FPGA Bridge Device Tree Binding
2−
3−Optional properties:
4−- bridge-enable : 0 if driver should disable bridge at startup
5− 1 if driver should enable bridge at startup
6− Default is to leave bridge in current state.
7−
8−Example:
9− fpga_bridge3: fpga-bridge@ffc25080 {
10− compatible = "altr,socfpga-fpga2sdram-bridge";
11− reg = <0xffc25080 0x4>;
12− bridge-enable = <0>;
13− };
Documentation/devicetree/bindings/fpga/fpga-bridge.yaml+30−0
@@ -0,0 +1,30 @@
1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/fpga/fpga-bridge.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: FPGA Bridge
8+
9+maintainers:
10+ - Michal Simek <michal.simek@amd.com>
11+
12+properties:
13+ $nodename:
14+ pattern: "^fpga-bridge(@.*|-([0-9]|[1-9][0-9]+))?$"
15+
16+ bridge-enable:
17+ description: |
18+ 0 if driver should disable bridge at startup
19+ 1 if driver should enable bridge at startup
20+ Default is to leave bridge in current state.
21+ $ref: /schemas/types.yaml#/definitions/uint32
22+ enum: [ 0, 1 ]
23+
24+additionalProperties: true
25+
26+examples:
27+ - |
28+ fpga-bridge {
29+ bridge-enable = <0>;
30+ };
Documentation/devicetree/bindings/fpga/xlnx,pr-decoupler.yaml+4−1
@@ -9,6 +9,9 @@ title: Xilinx LogiCORE Partial Reconfig Decoupler/AXI shutdown manager Softcore · 8 unmodified lines
99 maintainers:
1010 - Nava kishore Manne <nava.kishore.manne@amd.com>
1111
12+allOf:
13+ - $ref: fpga-bridge.yaml#
14+
1215 description: |
1316 The Xilinx LogiCORE Partial Reconfig(PR) Decoupler manages one or more
1417 decouplers/fpga bridges. The controller can decouple/disable the bridges
@@ -51,7 +54,7 @@ required: · 36 unmodified lines
5154 - clocks
5255 - clock-names
5356
54−additionalProperties: false
57+unevaluatedProperties: false
5558
5659 examples:
5760 - |
Documentation/devicetree/bindings/gnss/u-blox,neo-6m.yaml+6−0
@@ -28,6 +28,9 @@ properties: · 27 unmodified lines
2828 port or the USB host-controller port to which this device is attached,
2929 depending on the bus used. Required for the DDC, SPI or USB busses.
3030
31+ reset-gpios:
32+ maxItems: 1
33+
3134 vcc-supply:
3235 description: >
3336 Main voltage regulator
@@ -49,10 +52,13 @@ unevaluatedProperties: false · 15 unmodified lines
4952
5053 examples:
5154 - |
55+ #include <dt-bindings/gpio/gpio.h>
56+
5257 serial {
5358 gnss {
5459 compatible = "u-blox,neo-8";
5560 v-bckp-supply = <&gnss_v_bckp_reg>;
5661 vcc-supply = <&gnss_vcc_reg>;
62+ reset-gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
5763 };
5864 };
Documentation/devicetree/bindings/gpio/brcm,brcmstb-gpio.yaml+1−1
@@ -72,7 +72,7 @@ required: · 71 unmodified lines
7272 - reg
7373 - gpio-controller
7474 - "#gpio-cells"
75− - "brcm,gpio-bank-widths"
75+ - brcm,gpio-bank-widths
7676
7777 additionalProperties: false
7878
Documentation/devicetree/bindings/gpio/nuvoton,sgpio.yaml+87−0
@@ -0,0 +1,87 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/gpio/nuvoton,sgpio.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Nuvoton SGPIO controller
8+
9+maintainers:
10+ - Jim LIU <JJLIU0@nuvoton.com>
11+
12+description: |
13+ This SGPIO controller is for NUVOTON NPCM7xx and NPCM8xx SoC and detailed
14+ information is in the NPCM7XX/8XX SERIAL I/O EXPANSION INTERFACE section.
15+ Nuvoton NPCM7xx SGPIO module is combines a serial to parallel IC (HC595)
16+ and a parallel to serial IC (HC165).
17+ Clock is a division of the APB3 clock.
18+ This interface has 4 pins (D_out , D_in, S_CLK, LDSH).
19+ NPCM7xx/NPCM8xx have two sgpio modules. Each module can support up
20+ to 64 output pins, and up to 64 input pins, the pin is only for GPI or GPO.
21+ GPIO pins can be programmed to support the following options
22+ - Support interrupt option for each input port and various interrupt
23+ sensitivity options (level-high, level-low, edge-high, edge-low)
24+ - ngpios is number of nuvoton,input-ngpios GPIO lines and nuvoton,output-ngpios GPIO lines.
25+ nuvoton,input-ngpios GPIO lines is only for GPI.
26+ nuvoton,output-ngpios GPIO lines is only for GPO.
27+
28+properties:
29+ compatible:
30+ enum:
31+ - nuvoton,npcm750-sgpio
32+ - nuvoton,npcm845-sgpio
33+
34+ reg:
35+ maxItems: 1
36+
37+ gpio-controller: true
38+
39+ '#gpio-cells':
40+ const: 2
41+
42+ interrupts:
43+ maxItems: 1
44+
45+ clocks:
46+ maxItems: 1
47+
48+ nuvoton,input-ngpios:
49+ $ref: /schemas/types.yaml#/definitions/uint32
50+ description:
51+ The numbers of GPIO's exposed. GPIO lines are only for GPI.
52+ minimum: 0
53+ maximum: 64
54+
55+ nuvoton,output-ngpios:
56+ $ref: /schemas/types.yaml#/definitions/uint32
57+ description:
58+ The numbers of GPIO's exposed. GPIO lines are only for GPO.
59+ minimum: 0
60+ maximum: 64
61+
62+required:
63+ - compatible
64+ - reg
65+ - gpio-controller
66+ - '#gpio-cells'
67+ - interrupts
68+ - nuvoton,input-ngpios
69+ - nuvoton,output-ngpios
70+ - clocks
71+
72+additionalProperties: false
73+
74+examples:
75+ - |
76+ #include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
77+ #include <dt-bindings/interrupt-controller/arm-gic.h>
78+ gpio8: gpio@101000 {
79+ compatible = "nuvoton,npcm750-sgpio";
80+ reg = <0x101000 0x200>;
81+ clocks = <&clk NPCM7XX_CLK_APB3>;
82+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
83+ gpio-controller;
84+ #gpio-cells = <2>;
85+ nuvoton,input-ngpios = <64>;
86+ nuvoton,output-ngpios = <64>;
87+ };
Documentation/devicetree/bindings/gpio/realtek,rtd-gpio.yaml+69−0
@@ -0,0 +1,69 @@
1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+# Copyright 2023 Realtek Semiconductor Corporation
3+%YAML 1.2
4+---
5+$id: http://devicetree.org/schemas/gpio/realtek,rtd-gpio.yaml#
6+$schema: http://devicetree.org/meta-schemas/core.yaml#
7+
8+title: Realtek DHC GPIO controller
9+
10+maintainers:
11+ - Tzuyi Chang <tychang@realtek.com>
12+
13+description:
14+ The GPIO controller is designed for the Realtek DHC (Digital Home Center)
15+ RTD series SoC family, which are high-definition media processor SoCs.
16+
17+properties:
18+ compatible:
19+ enum:
20+ - realtek,rtd1295-misc-gpio
21+ - realtek,rtd1295-iso-gpio
22+ - realtek,rtd1315e-iso-gpio
23+ - realtek,rtd1319-iso-gpio
24+ - realtek,rtd1319d-iso-gpio
25+ - realtek,rtd1395-iso-gpio
26+ - realtek,rtd1619-iso-gpio
27+ - realtek,rtd1619b-iso-gpio
28+
29+ reg:
30+ items:
31+ - description: GPIO controller registers
32+ - description: GPIO interrupt registers
33+
34+ interrupts:
35+ items:
36+ - description: Interrupt number of the assert GPIO interrupt, which is
37+ triggered when there is a rising edge.
38+ - description: Interrupt number of the deassert GPIO interrupt, which is
39+ triggered when there is a falling edge.
40+
41+ gpio-ranges: true
42+
43+ gpio-controller: true
44+
45+ "#gpio-cells":
46+ const: 2
47+
48+required:
49+ - compatible
50+ - reg
51+ - interrupts
52+ - gpio-ranges
53+ - gpio-controller
54+ - "#gpio-cells"
55+
56+additionalProperties: false
57+
58+examples:
59+ - |
60+ gpio@100 {
61+ compatible = "realtek,rtd1319d-iso-gpio";
62+ reg = <0x100 0x100>,
63+ <0x0 0xb0>;
64+ interrupt-parent = <&iso_irq_mux>;
65+ interrupts = <19>, <20>;
66+ gpio-ranges = <&pinctrl 0 0 82>;
67+ gpio-controller;
68+ #gpio-cells = <2>;
69+ };
Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml+7−0
@@ -41,6 +41,13 @@ properties: · 40 unmodified lines
4141 "#interrupt-cells":
4242 const: 2
4343
44+patternProperties:
45+ "^.+-hog(-[0-9]+)?$":
46+ type: object
47+
48+ required:
49+ - gpio-hog
50+
4451 required:
4552 - compatible
4653 - reg
Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml+2−0
@@ -65,6 +65,8 @@ patternProperties: · 64 unmodified lines
6565 minItems: 1
6666 maxItems: 32
6767
68+ gpio-ranges: true
69+
6870 ngpios:
6971 default: 32
7072 minimum: 1
Documentation/devicetree/bindings/gpio/xlnx,gpio-xilinx.yaml+1−1
@@ -126,7 +126,7 @@ examples: · 125 unmodified lines
126126 - |
127127 #include <dt-bindings/interrupt-controller/arm-gic.h>
128128
129− gpio@e000a000 {
129+ gpio@a0020000 {
130130 compatible = "xlnx,xps-gpio-1.00.a";
131131 reg = <0xa0020000 0x10000>;
132132 #gpio-cells = <2>;
Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml+3−0
@@ -23,6 +23,8 @@ properties: · 22 unmodified lines
2323 "#gpio-cells":
2424 const: 2
2525
26+ label: true
27+
2628 required:
2729 - compatible
2830 - gpio-controller
@@ -37,6 +39,7 @@ examples: · 8 unmodified lines
3739 compatible = "xlnx,zynqmp-gpio-modepin";
3840 gpio-controller;
3941 #gpio-cells = <2>;
42+ label = "modepin";
4043 };
4144 };
4245
Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml+5−0
@@ -40,6 +40,11 @@ properties: · 39 unmodified lines
4040 - rockchip,rk3288-mali
4141 - samsung,exynos5433-mali
4242 - const: arm,mali-t760
43+ - items:
44+ - enum:
45+ - samsung,exynos7-mali
46+ - const: samsung,exynos5433-mali
47+ - const: arm,mali-t760
4348 - items:
4449 - enum:
4550 - rockchip,rk3399-mali
Documentation/devicetree/bindings/gpu/samsung-g2d.yaml+41−30
@@ -22,36 +22,20 @@ properties: · 21 unmodified lines
2222 interrupts:
2323 maxItems: 1
2424
25− clocks: {}
26− clock-names: {}
27− iommus: {}
28− power-domains: {}
29−
30−if:
31− properties:
32− compatible:
33− contains:
34− const: samsung,exynos5250-g2d
35−
36−then:
37− properties:
38− clocks:
39− items:
40− - description: fimg2d clock
41− clock-names:
42− items:
43− - const: fimg2d
44−
45−else:
46− properties:
47− clocks:
48− items:
49− - description: sclk_fimg2d clock
50− - description: fimg2d clock
51− clock-names:
52− items:
53− - const: sclk_fimg2d
54− - const: fimg2d
25+ clocks:
26+ minItems: 1
27+ maxItems: 2
28+
29+ clock-names:
30+ minItems: 1
31+ maxItems: 2
32+
33+ iommus:
34+ minItems: 1
35+ maxItems: 2
36+
37+ power-domains:
38+ maxItems: 1
5539
5640 required:
5741 - compatible
@@ -60,6 +44,33 @@ required: · 2 unmodified lines
6044 - clocks
6145 - clock-names
6246
47+allOf:
48+ - if:
49+ properties:
50+ compatible:
51+ contains:
52+ const: samsung,exynos5250-g2d
53+
54+ then:
55+ properties:
56+ clocks:
57+ items:
58+ - description: fimg2d clock
59+ clock-names:
60+ items:
61+ - const: fimg2d
62+
63+ else:
64+ properties:
65+ clocks:
66+ items:
67+ - description: sclk_fimg2d clock
68+ - description: fimg2d clock
69+ clock-names:
70+ items:
71+ - const: sclk_fimg2d
72+ - const: fimg2d
73+
6374 additionalProperties: false
6475
6576 examples:
Documentation/devicetree/bindings/gpu/samsung-rotator.yaml+5−4
@@ -12,10 +12,11 @@ maintainers: · 11 unmodified lines
1212 properties:
1313 compatible:
1414 enum:
15− - "samsung,s5pv210-rotator"
16− - "samsung,exynos4210-rotator"
17− - "samsung,exynos4212-rotator"
18− - "samsung,exynos5250-rotator"
15+ - samsung,s5pv210-rotator
16+ - samsung,exynos4210-rotator
17+ - samsung,exynos4212-rotator
18+ - samsung,exynos5250-rotator
19+
1920 reg:
2021 maxItems: 1
2122
Documentation/devicetree/bindings/gpu/samsung-scaler.yaml+47−34
@@ -21,40 +21,20 @@ properties: · 20 unmodified lines
2121 interrupts:
2222 maxItems: 1
2323
24− clocks: {}
25− clock-names: {}
26− iommus: {}
27− power-domains: {}
28−
29−if:
30− properties:
31− compatible:
32− contains:
33− const: samsung,exynos5420-scaler
34−
35−then:
36− properties:
37− clocks:
38− items:
39− - description: mscl clock
40−
41− clock-names:
42− items:
43− - const: mscl
44−
45−else:
46− properties:
47− clocks:
48− items:
49− - description: pclk clock
50− - description: aclk clock
51− - description: aclk_xiu clock
52−
53− clock-names:
54− items:
55− - const: pclk
56− - const: aclk
57− - const: aclk_xiu
24+ clocks:
25+ minItems: 1
26+ maxItems: 3
27+
28+ clock-names:
29+ minItems: 1
30+ maxItems: 3
31+
32+ iommus:
33+ minItems: 1
34+ maxItems: 2
35+
36+ power-domains:
37+ maxItems: 1
5838
5939 required:
6040 - compatible
@@ -63,6 +43,39 @@ required: · 2 unmodified lines
6343 - clocks
6444 - clock-names
6545
46+allOf:
47+ - if:
48+ properties:
49+ compatible:
50+ contains:
51+ const: samsung,exynos5420-scaler
52+
53+ then:
54+ properties:
55+ clocks:
56+ items:
57+ - description: mscl clock
58+ clock-names:
59+ items:
60+ - const: mscl
61+ iommus:
62+ minItems: 2
63+
64+ else:
65+ properties:
66+ clocks:
67+ items:
68+ - description: pclk clock
69+ - description: aclk clock
70+ - description: aclk_xiu clock
71+ clock-names:
72+ items:
73+ - const: pclk
74+ - const: aclk
75+ - const: aclk_xiu
76+ iommus:
77+ maxItems: 1
78+
6679 additionalProperties: false
6780
6881 examples:
Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml+15−3
@@ -11,9 +11,21 @@ maintainers: · 10 unmodified lines
1111
1212 properties:
1313 compatible:
14− enum:
15− - samsung,exynos4210-chipid
16− - samsung,exynos850-chipid
14+ oneOf:
15+ - enum:
16+ - samsung,exynos4210-chipid
17+ - samsung,exynos850-chipid
18+ - items:
19+ - enum:
20+ - samsung,exynos5433-chipid
21+ - samsung,exynos7-chipid
22+ - const: samsung,exynos4210-chipid
23+ - items:
24+ - enum:
25+ - samsung,exynos7885-chipid
26+ - samsung,exynosautov9-chipid
27+ - samsung,exynosautov920-chipid
28+ - const: samsung,exynos850-chipid
1729
1830 reg:
1931 maxItems: 1
Documentation/devicetree/bindings/hwmon/gpio-fan.txt+0−41
@@ -1,41 +0,0 @@
1−Bindings for fan connected to GPIO lines
2−
3−Required properties:
4−- compatible : "gpio-fan"
5−
6−Optional properties:
7−- gpios: Specifies the pins that map to bits in the control value,
8− ordered MSB-->LSB.
9−- gpio-fan,speed-map: A mapping of possible fan RPM speeds and the
10− control value that should be set to achieve them. This array
11− must have the RPM values in ascending order.
12−- alarm-gpios: This pin going active indicates something is wrong with
13− the fan, and a udev event will be fired.
14−- #cooling-cells: If used as a cooling device, must be <2>
15− Also see:
16− Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml
17− min and max states are derived from the speed-map of the fan.
18−
19−Note: At least one the "gpios" or "alarm-gpios" properties must be set.
20−
21−Examples:
22−
23− gpio_fan {
24− compatible = "gpio-fan";
25− gpios = <&gpio1 14 1
26− &gpio1 13 1>;
27− gpio-fan,speed-map = <0 0
28− 3000 1
29− 6000 2>;
30− alarm-gpios = <&gpio1 15 1>;
31− };
32− gpio_fan_cool: gpio_fan {
33− compatible = "gpio-fan";
34− gpios = <&gpio2 14 1
35− &gpio2 13 1>;
36− gpio-fan,speed-map = <0 0>,
37− <3000 1>,
38− <6000 2>;
39− alarm-gpios = <&gpio2 15 1>;
40− #cooling-cells = <2>; /* min followed by max */
41− };
Documentation/devicetree/bindings/hwmon/gpio-fan.yaml+60−0
@@ -0,0 +1,60 @@
1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/hwmon/gpio-fan.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Fan connected to GPIO lines
8+
9+maintainers:
10+ - Rob Herring <robh@kernel.org>
11+
12+properties:
13+ compatible:
14+ const: gpio-fan
15+
16+ gpios:
17+ description: |
18+ Specifies the pins that map to bits in the control value,
19+ ordered MSB-->LSB.
20+ minItems: 1
21+ maxItems: 7
22+
23+ alarm-gpios:
24+ maxItems: 1
25+
26+ gpio-fan,speed-map:
27+ $ref: /schemas/types.yaml#/definitions/uint32-matrix
28+ minItems: 2
29+ maxItems: 127
30+ items:
31+ items:
32+ - description: fan speed in RPMs
33+ - description: control value
34+ description: |
35+ A mapping of possible fan RPM speeds and the
36+ control value that should be set to achieve them. This array
37+ must have the RPM values in ascending order.
38+
39+ '#cooling-cells':
40+ const: 2
41+
42+required:
43+ - compatible
44+ - gpios
45+ - gpio-fan,speed-map
46+
47+additionalProperties: false
48+
49+examples:
50+ - |
51+ gpio-fan {
52+ compatible = "gpio-fan";
53+ gpios = <&gpio2 14 1
54+ &gpio2 13 1>;
55+ gpio-fan,speed-map = < 0 0>,
56+ <3000 1>,
57+ <6000 2>;
58+ alarm-gpios = <&gpio2 15 1>;
59+ #cooling-cells = <2>; /* min followed by max */
60+ };
Documentation/devicetree/bindings/hwmon/iio-hwmon.yaml+1−1
@@ -19,7 +19,7 @@ properties: · 18 unmodified lines
1919
2020 io-channels:
2121 minItems: 1
22− maxItems: 8 # Should be enough
22+ maxItems: 51 # Should be enough
2323 description: >
2424 List of phandles to ADC channels to read the monitoring values
2525
Documentation/devicetree/bindings/hwmon/lltc,ltc4286.yaml+50−0
@@ -0,0 +1,50 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/hwmon/lltc,ltc4286.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: LTC4286 power monitors
8+
9+maintainers:
10+ - Delphine CC Chiu <Delphine_CC_Chiu@Wiwynn.com>
11+
12+properties:
13+ compatible:
14+ enum:
15+ - lltc,ltc4286
16+ - lltc,ltc4287
17+
18+ reg:
19+ maxItems: 1
20+
21+ adi,vrange-low-enable:
22+ description:
23+ This property is a bool parameter to represent the
24+ voltage range is 25.6 volts or 102.4 volts for this chip.
25+ The default is 102.4 volts.
26+ type: boolean
27+
28+ shunt-resistor-micro-ohms:
29+ description:
30+ Resistor value micro-ohms.
31+
32+required:
33+ - compatible
34+ - reg
35+
36+additionalProperties: false
37+
38+examples:
39+ - |
40+ i2c {
41+ #address-cells = <1>;
42+ #size-cells = <0>;
43+
44+ power-monitor@40 {
45+ compatible = "lltc,ltc4286";
46+ reg = <0x40>;
47+ adi,vrange-low-enable;
48+ shunt-resistor-micro-ohms = <300>;
49+ };
50+ };
Documentation/devicetree/bindings/hwmon/lm75.yaml+33−0
@@ -14,6 +14,7 @@ properties: · 13 unmodified lines
1414 compatible:
1515 enum:
1616 - adi,adt75
17+ - ams,as6200
1718 - atmel,at30ts74
1819 - dallas,ds1775
1920 - dallas,ds75
@@ -48,10 +49,28 @@ properties: · 28 unmodified lines
4849 vs-supply:
4950 description: phandle to the regulator that provides the +VS supply
5051
52+ interrupts:
53+ maxItems: 1
54+
5155 required:
5256 - compatible
5357 - reg
5458
59+allOf:
60+ - if:
61+ not:
62+ properties:
63+ compatible:
64+ contains:
65+ enum:
66+ - ams,as6200
67+ - ti,tmp100
68+ - ti,tmp101
69+ - ti,tmp112
70+ then:
71+ properties:
72+ interrupts: false
73+
5574 additionalProperties: false
5675
5776 examples:
@@ -66,3 +85,17 @@ examples: · 8 unmodified lines
6685 vs-supply = <&vs>;
6786 };
6887 };
88+ - |
89+ #include <dt-bindings/interrupt-controller/irq.h>
90+ i2c {
91+ #address-cells = <1>;
92+ #size-cells = <0>;
93+
94+ temperature-sensor@48 {
95+ compatible = "ams,as6200";
96+ reg = <0x48>;
97+ vs-supply = <&vs>;
98+ interrupt-parent = <&gpio1>;
99+ interrupts = <17 IRQ_TYPE_EDGE_BOTH>;
100+ };
101+ };
Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml+10−1
@@ -25,7 +25,16 @@ properties: · 24 unmodified lines
2525 - samsung,exynos5250-hsi2c # Exynos5250 and Exynos5420
2626 - samsung,exynos5260-hsi2c # Exynos5260
2727 - samsung,exynos7-hsi2c # Exynos7
28− - samsung,exynosautov9-hsi2c # ExynosAutoV9 and Exynos850
28+ - samsung,exynosautov9-hsi2c
29+ - items:
30+ - enum:
31+ - samsung,exynos5433-hsi2c
32+ - tesla,fsd-hsi2c
33+ - const: samsung,exynos7-hsi2c
34+ - items:
35+ - enum:
36+ - samsung,exynos850-hsi2c
37+ - const: samsung,exynosautov9-hsi2c
2938 - const: samsung,exynos5-hsi2c # Exynos5250 and Exynos5420
3039 deprecated: true
3140
Documentation/devicetree/bindings/i2c/samsung,s3c2410-i2c.yaml+14−8
@@ -11,14 +11,20 @@ maintainers: · 10 unmodified lines
1111
1212 properties:
1313 compatible:
14− enum:
15− - samsung,s3c2410-i2c
16− - samsung,s3c2440-i2c
17− # For s3c2440-like I2C used inside HDMIPHY block found on several SoCs:
18− - samsung,s3c2440-hdmiphy-i2c
19− # For s3c2440-like I2C used as a host to SATA PHY controller on an
20− # internal bus:
21− - samsung,exynos5-sata-phy-i2c
14+ oneOf:
15+ - enum:
16+ - samsung,s3c2410-i2c
17+ - samsung,s3c2440-i2c
18+ # For s3c2440-like I2C used inside HDMIPHY block found on several SoCs:
19+ - samsung,s3c2440-hdmiphy-i2c
20+ # For s3c2440-like I2C used as a host to SATA PHY controller on an
21+ # internal bus:
22+ - samsung,exynos5-sata-phy-i2c
23+ - items:
24+ - enum:
25+ - samsung,exynos7885-i2c
26+ - samsung,exynos850-i2c
27+ - const: samsung,s3c2440-i2c
2228
2329 '#address-cells':
2430 const: 1
Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml+28−0
@@ -19,6 +19,7 @@ allOf: · 18 unmodified lines
1919 - st,stm32f7-i2c
2020 - st,stm32mp13-i2c
2121 - st,stm32mp15-i2c
22+ - st,stm32mp25-i2c
2223 then:
2324 properties:
2425 i2c-scl-rising-time-ns:
@@ -41,6 +42,30 @@ allOf: · 16 unmodified lines
4142 clock-frequency:
4243 enum: [100000, 400000]
4344
45+ - if:
46+ properties:
47+ compatible:
48+ contains:
49+ enum:
50+ - st,stm32f4-i2c
51+ - st,stm32f7-i2c
52+ - st,stm32mp13-i2c
53+ - st,stm32mp15-i2c
54+ then:
55+ properties:
56+ interrupts:
57+ minItems: 2
58+
59+ interrupt-names:
60+ minItems: 2
61+ else:
62+ properties:
63+ interrupts:
64+ maxItems: 1
65+
66+ interrupt-names:
67+ maxItems: 1
68+
4469 properties:
4570 compatible:
4671 enum:
@@ -48,6 +73,7 @@ properties: · 1 unmodified line
4873 - st,stm32f7-i2c
4974 - st,stm32mp13-i2c
5075 - st,stm32mp15-i2c
76+ - st,stm32mp25-i2c
5177
5278 reg:
5379 maxItems: 1
@@ -56,11 +82,13 @@ properties: · 2 unmodified lines
5682 items:
5783 - description: interrupt ID for I2C event
5884 - description: interrupt ID for I2C error
85+ minItems: 1
5986
6087 interrupt-names:
6188 items:
6289 - const: event
6390 - const: error
91+ minItems: 1
6492
6593 resets:
6694 maxItems: 1
Documentation/devicetree/bindings/iio/adc/adi,ad7091r5.yaml+78−4
@@ -4,36 +4,92 @@ · 3 unmodified lines
44 $id: http://devicetree.org/schemas/iio/adc/adi,ad7091r5.yaml#
55 $schema: http://devicetree.org/meta-schemas/core.yaml#
66
7−title: Analog Devices AD7091R5 4-Channel 12-Bit ADC
7+title: Analog Devices AD7091R-2/-4/-5/-8 Multi-Channel 12-Bit ADCs
88
99 maintainers:
1010 - Michael Hennerich <michael.hennerich@analog.com>
11+ - Marcelo Schmitt <marcelo.schmitt@analog.com>
1112
1213 description: |
13− Analog Devices AD7091R5 4-Channel 12-Bit ADC
14+ Analog Devices AD7091R5 4-Channel 12-Bit ADC supporting I2C interface
1415 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7091r-5.pdf
16+ Analog Devices AD7091R-2/AD7091R-4/AD7091R-8 2-/4-/8-Channel 12-Bit ADCs
17+ supporting SPI interface
18+ https://www.analog.com/media/en/technical-documentation/data-sheets/AD7091R-2_7091R-4_7091R-8.pdf
1519
1620 properties:
1721 compatible:
1822 enum:
23+ - adi,ad7091r2
24+ - adi,ad7091r4
1925 - adi,ad7091r5
26+ - adi,ad7091r8
2027
2128 reg:
2229 maxItems: 1
2330
31+ vdd-supply:
32+ description:
33+ Provide VDD power to the sensor (VDD range is from 2.7V to 5.25V).
34+
35+ vdrive-supply:
36+ description:
37+ Determines the voltage level at which the interface logic will operate.
38+ The V_drive voltage range is from 1.8V to 5.25V and must not exceed VDD by
39+ more than 0.3V.
40+
2441 vref-supply:
2542 description:
2643 Phandle to the vref power supply
2744
28− interrupts:
45+ convst-gpios:
46+ description:
47+ GPIO connected to the CONVST pin.
48+ This logic input is used to initiate conversions on the analog
49+ input channels.
2950 maxItems: 1
3051
52+ reset-gpios:
53+ maxItems: 1
54+
55+ interrupts:
56+ description:
57+ Interrupt for signaling when conversion results exceed the high limit for
58+ ADC readings or fall below the low limit for them. Interrupt source must
59+ be attached to ALERT/BUSY/GPO0 pin.
60+ maxItems: 1
3161
3262 required:
3363 - compatible
3464 - reg
3565
36−additionalProperties: false
66+allOf:
67+ - $ref: /schemas/spi/spi-peripheral-props.yaml#
68+
69+ # AD7091R-2 does not have ALERT/BUSY/GPO pin
70+ - if:
71+ properties:
72+ compatible:
73+ contains:
74+ enum:
75+ - adi,ad7091r2
76+ then:
77+ properties:
78+ interrupts: false
79+
80+ - if:
81+ properties:
82+ compatible:
83+ contains:
84+ enum:
85+ - adi,ad7091r2
86+ - adi,ad7091r4
87+ - adi,ad7091r8
88+ then:
89+ required:
90+ - convst-gpios
91+
92+unevaluatedProperties: false
3793
3894 examples:
3995 - |
@@ -51,4 +107,22 @@ examples: · 11 unmodified lines
51107 interrupt-parent = <&gpio>;
52108 };
53109 };
110+ - |
111+ #include <dt-bindings/gpio/gpio.h>
112+ #include <dt-bindings/interrupt-controller/irq.h>
113+ spi {
114+ #address-cells = <1>;
115+ #size-cells = <0>;
116+
117+ adc@0 {
118+ compatible = "adi,ad7091r8";
119+ reg = <0x0>;
120+ spi-max-frequency = <1000000>;
121+ vref-supply = <&adc_vref>;
122+ convst-gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
123+ reset-gpios = <&gpio 27 GPIO_ACTIVE_LOW>;
124+ interrupts = <22 IRQ_TYPE_EDGE_FALLING>;
125+ interrupt-parent = <&gpio>;
126+ };
127+ };
54128 ...
Documentation/devicetree/bindings/iio/adc/adi,ad7780.yaml+3−3
@@ -80,9 +80,9 @@ examples: · 79 unmodified lines
8080 compatible = "adi,ad7780";
8181 reg = <0>;
8282
83− avdd-supply = <&vdd_supply>;
84− powerdown-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
85− adi,gain-gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
83+ avdd-supply = <&vdd_supply>;
84+ powerdown-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
85+ adi,gain-gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
8686 adi,filter-gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
8787 };
8888 };
Documentation/devicetree/bindings/iio/adc/maxim,max34408.yaml+139−0
@@ -0,0 +1,139 @@
1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/iio/adc/maxim,max34408.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Maxim MAX34408/MAX34409 current monitors with overcurrent control
8+
9+maintainers:
10+ - Ivan Mikhaylov <fr0st61te@gmail.com>
11+
12+description: |
13+ The MAX34408/MAX34409 are two- and four-channel current monitors that are
14+ configured and monitored with a standard I2C/SMBus serial interface. Each
15+ unidirectional current sensor offers precision high-side operation with a
16+ low full-scale sense voltage. The devices automatically sequence through
17+ two or four channels and collect the current-sense samples and average them
18+ to reduce the effect of impulse noise. The raw ADC samples are compared to
19+ user-programmable digital thresholds to indicate overcurrent conditions.
20+ Overcurrent conditions trigger a hardware output to provide an immediate
21+ indication to shut down any necessary external circuitry.
22+
23+ Specifications about the devices can be found at:
24+ https://www.analog.com/media/en/technical-documentation/data-sheets/MAX34408-MAX34409.pdf
25+
26+properties:
27+ compatible:
28+ enum:
29+ - maxim,max34408
30+ - maxim,max34409
31+
32+ "#address-cells":
33+ const: 1
34+
35+ "#size-cells":
36+ const: 0
37+
38+ reg:
39+ maxItems: 1
40+
41+ interrupts:
42+ maxItems: 1
43+
44+ powerdown-gpios:
45+ description:
46+ Shutdown Output. Open-drain output. This output transitions to high impedance
47+ when any of the digital comparator thresholds are exceeded as long as the ENA
48+ pin is high.
49+ maxItems: 1
50+
51+ powerdown-status-gpios:
52+ description:
53+ SHTDN Enable Input. CMOS digital input. Connect to GND to clear the latch and
54+ unconditionally deassert (force low) the SHTDN output and reset the shutdown
55+ delay. Connect to VDD to enable normal latch operation of the SHTDN output.
56+ maxItems: 1
57+
58+ vdd-supply: true
59+
60+patternProperties:
61+ "^channel@[0-3]$":
62+ $ref: adc.yaml
63+ type: object
64+ description:
65+ Represents the internal channels of the ADC.
66+
67+ properties:
68+ reg:
69+ items:
70+ - minimum: 0
71+ maximum: 3
72+
73+ maxim,rsense-val-micro-ohms:
74+ description:
75+ Adjust the Rsense value to monitor higher or lower current levels for
76+ input.
77+ enum: [250, 500, 1000, 5000, 10000, 50000, 100000, 200000, 500000]
78+ default: 1000
79+
80+ required:
81+ - reg
82+ - maxim,rsense-val-micro-ohms
83+
84+ unevaluatedProperties: false
85+
86+required:
87+ - compatible
88+ - reg
89+
90+allOf:
91+ - if:
92+ properties:
93+ compatible:
94+ contains:
95+ const: maxim,max34408
96+ then:
97+ patternProperties:
98+ "^channel@[2-3]$": false
99+ "^channel@[0-1]$":
100+ properties:
101+ reg:
102+ maximum: 1
103+ else:
104+ patternProperties:
105+ "^channel@[0-3]$":
106+ properties:
107+ reg:
108+ maximum: 3
109+
110+additionalProperties: false
111+
112+examples:
113+ - |
114+ #include <dt-bindings/gpio/gpio.h>
115+
116+ i2c {
117+ #address-cells = <1>;
118+ #size-cells = <0>;
119+
120+ adc@1e {
121+ compatible = "maxim,max34409";
122+ reg = <0x1e>;
123+ powerdown-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
124+ powerdown-status-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
125+
126+ #address-cells = <1>;
127+ #size-cells = <0>;
128+
129+ channel@0 {
130+ reg = <0x0>;
131+ maxim,rsense-val-micro-ohms = <5000>;
132+ };
133+
134+ channel@1 {
135+ reg = <0x1>;
136+ maxim,rsense-val-micro-ohms = <10000>;
137+ };
138+ };
139+ };
Documentation/devicetree/bindings/iio/adc/qcom,spmi-iadc.yaml+6−4
@@ -25,7 +25,7 @@ properties: · 24 unmodified lines
2525 - const: qcom,spmi-iadc
2626
2727 reg:
28− description: IADC base address and length in the SPMI PMIC register map
28+ description: IADC base address in the SPMI PMIC register map
2929 maxItems: 1
3030
3131 qcom,external-resistor-micro-ohms:
@@ -50,15 +50,17 @@ additionalProperties: false · 18 unmodified lines
5050 examples:
5151 - |
5252 #include <dt-bindings/interrupt-controller/irq.h>
53− spmi {
53+
54+ pmic {
5455 #address-cells = <1>;
5556 #size-cells = <0>;
56− pmic_iadc: adc@3600 {
57+
58+ adc@3600 {
5759 compatible = "qcom,pm8941-iadc", "qcom,spmi-iadc";
5860 reg = <0x3600>;
5961 interrupts = <0x0 0x36 0x0 IRQ_TYPE_EDGE_RISING>;
6062 qcom,external-resistor-micro-ohms = <10000>;
61− #io-channel-cells = <1>;
63+ #io-channel-cells = <1>;
6264 };
6365 };
6466 ...
Documentation/devicetree/bindings/iio/adc/qcom,spmi-rradc.yaml+2−2
@@ -43,9 +43,9 @@ examples: · 42 unmodified lines
4343 #address-cells = <1>;
4444 #size-cells = <0>;
4545
46− pmic_rradc: adc@4500 {
46+ adc@4500 {
4747 compatible = "qcom,pmi8998-rradc";
4848 reg = <0x4500>;
49− #io-channel-cells = <1>;
49+ #io-channel-cells = <1>;
5050 };
5151 };
Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml+5−4
@@ -236,11 +236,11 @@ additionalProperties: false · 235 unmodified lines
236236
237237 examples:
238238 - |
239− spmi {
239+ pmic {
240240 #address-cells = <1>;
241241 #size-cells = <0>;
242− /* VADC node */
243− pmic_vadc: adc@3100 {
242+
243+ adc@3100 {
244244 compatible = "qcom,spmi-vadc";
245245 reg = <0x3100>;
246246 interrupts = <0x0 0x31 0x0 0x1>;
@@ -281,9 +281,10 @@ examples: · 34 unmodified lines
281281 #include <dt-bindings/iio/qcom,spmi-adc7-pm8350.h>
282282 #include <dt-bindings/interrupt-controller/irq.h>
283283
284− spmi {
284+ pmic {
285285 #address-cells = <1>;
286286 #size-cells = <0>;
287+
287288 adc@3100 {
288289 reg = <0x3100>;
289290 compatible = "qcom,spmi-adc7";
Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml+17−12
@@ -11,18 +11,23 @@ maintainers: · 10 unmodified lines
1111
1212 properties:
1313 compatible:
14− enum:
15− - samsung,exynos-adc-v1 # Exynos5250
16− - samsung,exynos-adc-v2
17− - samsung,exynos3250-adc
18− - samsung,exynos4212-adc # Exynos4212 and Exynos4412
19− - samsung,exynos7-adc
20− - samsung,s3c2410-adc
21− - samsung,s3c2416-adc
22− - samsung,s3c2440-adc
23− - samsung,s3c2443-adc
24− - samsung,s3c6410-adc
25− - samsung,s5pv210-adc
14+ oneOf:
15+ - enum:
16+ - samsung,exynos-adc-v1 # Exynos5250
17+ - samsung,exynos-adc-v2
18+ - samsung,exynos3250-adc
19+ - samsung,exynos4212-adc # Exynos4212 and Exynos4412
20+ - samsung,exynos7-adc
21+ - samsung,s3c2410-adc
22+ - samsung,s3c2416-adc
23+ - samsung,s3c2440-adc
24+ - samsung,s3c2443-adc
25+ - samsung,s3c6410-adc
26+ - samsung,s5pv210-adc
27+ - items:
28+ - enum:
29+ - samsung,exynos5433-adc
30+ - const: samsung,exynos7-adc
2631
2732 reg:
2833 maxItems: 1
Documentation/devicetree/bindings/iio/adc/ti,palmas-gpadc.yaml+0−15
@@ -67,19 +67,4 @@ required: · 66 unmodified lines
6767 - compatible
6868 - "#io-channel-cells"
6969
70−examples:
71− - |
72− #include <dt-bindings/clock/mt8183-clk.h>
73− pmic {
74− compatible = "ti,twl6035-pmic", "ti,palmas-pmic";
75− adc {
76− compatible = "ti,palmas-gpadc";
77− interrupts = <18 0>,
78− <16 0>,
79− <17 0>;
80− #io-channel-cells = <1>;
81− ti,channel0-current-microamp = <5>;
82− ti,channel3-current-microamp = <10>;
83− };
84− };
8570 ...
Documentation/devicetree/bindings/iio/amplifiers/adi,hmc425a.yaml+4−0
@@ -12,6 +12,9 @@ maintainers: · 11 unmodified lines
1212 description: |
1313 Digital Step Attenuator IIO devices with gpio interface.
1414 Offer various frequency and attenuation ranges.
15+ ADRF5750 2 dB LSB, 4-Bit, Silicon Digital Attenuator, 10 MHz to 60 GHz
16+ https://www.analog.com/media/en/technical-documentation/data-sheets/adrf5740.pdf
17+
1518 HMC425A 0.5 dB LSB GaAs MMIC 6-BIT DIGITAL POSITIVE CONTROL ATTENUATOR, 2.2 - 8.0 GHz
1619 https://www.analog.com/media/en/technical-documentation/data-sheets/hmc425A.pdf
1720
@@ -22,6 +25,7 @@ description: | · 4 unmodified lines
2225 properties:
2326 compatible:
2427 enum:
28+ - adi,adrf5740
2529 - adi,hmc425a
2630 - adi,hmc540s
2731
Documentation/devicetree/bindings/iio/chemical/aosong,ags02ma.yaml+47−0
@@ -0,0 +1,47 @@
1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/iio/chemical/aosong,ags02ma.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Aosong AGS02MA VOC Sensor
8+
9+description: |
10+ AGS02MA is an TVOC (Total Volatile Organic Compounds) i2c sensor with default
11+ address of 0x1a.
12+
13+ Datasheet:
14+ https://asairsensors.com/wp-content/uploads/2021/09/AGS02MA.pdf
15+
16+maintainers:
17+ - Anshul Dalal <anshulusr@gmail.com>
18+
19+properties:
20+ compatible:
21+ enum:
22+ - aosong,ags02ma
23+
24+ reg:
25+ maxItems: 1
26+
27+ vdd-supply: true
28+
29+required:
30+ - compatible
31+ - reg
32+ - vdd-supply
33+
34+additionalProperties: false
35+
36+examples:
37+ - |
38+ i2c {
39+ #address-cells = <1>;
40+ #size-cells = <0>;
41+
42+ voc-sensor@1a {
43+ compatible = "aosong,ags02ma";
44+ reg = <0x1a>;
45+ vdd-supply = <&vdd_regulator>;
46+ };
47+ };
Documentation/devicetree/bindings/iio/dac/adi,ad5791.yaml+5−0
@@ -26,6 +26,11 @@ properties: · 25 unmodified lines
2626 vdd-supply: true
2727 vss-supply: true
2828
29+ adi,rbuf-gain2-en:
30+ description: Specify to allow an external amplifier to be connected in a
31+ gain of two configuration.
32+ type: boolean
33+
2934 required:
3035 - compatible
3136 - reg
Documentation/devicetree/bindings/iio/dac/microchip,mcp4821.yaml+86−0
@@ -0,0 +1,86 @@
1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/iio/dac/microchip,mcp4821.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Microchip MCP4821 and similar DACs
8+
9+description: |
10+ Supports MCP48x1 (single channel) and MCP48x2 (dual channel) series of DACs.
11+ Device supports simplex communication over SPI in Mode 0 and Mode 3.
12+
13+ +---------+--------------+-------------+
14+ | Device | Resolution | Channels |
15+ |---------|--------------|-------------|
16+ | MCP4801 | 8-bit | 1 |
17+ | MCP4802 | 8-bit | 2 |
18+ | MCP4811 | 10-bit | 1 |
19+ | MCP4812 | 10-bit | 2 |
20+ | MCP4821 | 12-bit | 1 |
21+ | MCP4822 | 12-bit | 2 |
22+ +---------+--------------+-------------+
23+
24+ Datasheet:
25+ MCP48x1: https://ww1.microchip.com/downloads/en/DeviceDoc/22244B.pdf
26+ MCP48x2: https://ww1.microchip.com/downloads/en/DeviceDoc/20002249B.pdf
27+
28+maintainers:
29+ - Anshul Dalal <anshulusr@gmail.com>
30+
31+allOf:
32+ - $ref: /schemas/spi/spi-peripheral-props.yaml#
33+
34+properties:
35+ compatible:
36+ enum:
37+ - microchip,mcp4801
38+ - microchip,mcp4802
39+ - microchip,mcp4811
40+ - microchip,mcp4812
41+ - microchip,mcp4821
42+ - microchip,mcp4822
43+
44+ reg:
45+ maxItems: 1
46+
47+ vdd-supply: true
48+
49+ ldac-gpios:
50+ description: |
51+ Active Low LDAC (Latch DAC Input) pin used to update the DAC output.
52+ maxItems: 1
53+
54+ powerdown-gpios:
55+ description: |
56+ Active Low SHDN pin used to enter the shutdown mode.
57+ maxItems: 1
58+
59+ spi-cpha: true
60+ spi-cpol: true
61+
62+required:
63+ - compatible
64+ - reg
65+ - vdd-supply
66+
67+additionalProperties: false
68+
69+examples:
70+ - |
71+ #include <dt-bindings/gpio/gpio.h>
72+
73+ spi {
74+ #address-cells = <1>;
75+ #size-cells = <0>;
76+
77+ dac@0 {
78+ compatible = "microchip,mcp4821";
79+ reg = <0>;
80+ vdd-supply = <&vdd_regulator>;
81+ ldac-gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
82+ powerdown-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
83+ spi-cpha;
84+ spi-cpol;
85+ };
86+ };
Documentation/devicetree/bindings/iio/humidity/ti,hdc3020.yaml+55−0
@@ -0,0 +1,55 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/iio/humidity/ti,hdc3020.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: HDC3020/HDC3021/HDC3022 humidity and temperature iio sensors
8+
9+maintainers:
10+ - Li peiyu <579lpy@gmail.com>
11+ - Javier Carrasco <javier.carrasco.cruz@gmail.com>
12+
13+description:
14+ https://www.ti.com/lit/ds/symlink/hdc3020.pdf
15+
16+ The HDC302x is an integrated capacitive based relative humidity (RH)
17+ and temperature sensor.
18+
19+properties:
20+ compatible:
21+ oneOf:
22+ - items:
23+ - enum:
24+ - ti,hdc3021
25+ - ti,hdc3022
26+ - const: ti,hdc3020
27+ - const: ti,hdc3020
28+
29+ interrupts:
30+ maxItems: 1
31+
32+ vdd-supply: true
33+
34+ reg:
35+ maxItems: 1
36+
37+required:
38+ - compatible
39+ - reg
40+ - vdd-supply
41+
42+additionalProperties: false
43+
44+examples:
45+ - |
46+ i2c {
47+ #address-cells = <1>;
48+ #size-cells = <0>;
49+
50+ humidity-sensor@47 {
51+ compatible = "ti,hdc3021", "ti,hdc3020";
52+ reg = <0x47>;
53+ vdd-supply = <&vcc_3v3>;
54+ };
55+ };
Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml+4−0
@@ -25,6 +25,10 @@ properties: · 24 unmodified lines
2525
2626 spi-cpol: true
2727
28+ spi-cs-inactive-delay-ns:
29+ minimum: 16000
30+ default: 16000
31+
2832 interrupts:
2933 maxItems: 1
3034
Documentation/devicetree/bindings/iio/imu/adi,adis16475.yaml+4−0
@@ -47,6 +47,10 @@ properties: · 46 unmodified lines
4747 spi-max-frequency:
4848 maximum: 2000000
4949
50+ spi-cs-inactive-delay-ns:
51+ minimum: 16000
52+ default: 16000
53+
5054 interrupts:
5155 maxItems: 1
5256
Documentation/devicetree/bindings/iio/imu/bosch,bmi323.yaml+77−0
@@ -0,0 +1,77 @@
1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/iio/imu/bosch,bmi323.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Bosch BMI323 6-Axis IMU
8+
9+maintainers:
10+ - Jagath Jog J <jagathjog1996@gmail.com>
11+
12+description:
13+ BMI323 is a 6-axis inertial measurement unit that supports acceleration and
14+ gyroscopic measurements with hardware fifo buffering. Sensor also provides
15+ events information such as motion, steps, orientation, single and double
16+ tap detection.
17+
18+properties:
19+ compatible:
20+ const: bosch,bmi323
21+
22+ reg:
23+ maxItems: 1
24+
25+ vdd-supply: true
26+ vddio-supply: true
27+
28+ interrupts:
29+ minItems: 1
30+ maxItems: 2
31+
32+ interrupt-names:
33+ minItems: 1
34+ maxItems: 2
35+ items:
36+ enum:
37+ - INT1
38+ - INT2
39+
40+ drive-open-drain:
41+ description:
42+ set if the specified interrupt pin should be configured as
43+ open drain. If not set, defaults to push-pull.
44+
45+ mount-matrix:
46+ description:
47+ an optional 3x3 mounting rotation matrix.
48+
49+required:
50+ - compatible
51+ - reg
52+ - vdd-supply
53+ - vddio-supply
54+
55+allOf:
56+ - $ref: /schemas/spi/spi-peripheral-props.yaml#
57+
58+unevaluatedProperties: false
59+
60+examples:
61+ - |
62+ // Example for I2C
63+ #include <dt-bindings/interrupt-controller/irq.h>
64+ i2c {
65+ #address-cells = <1>;
66+ #size-cells = <0>;
67+
68+ imu@68 {
69+ compatible = "bosch,bmi323";
70+ reg = <0x68>;
71+ vddio-supply = <&vddio>;
72+ vdd-supply = <&vdd>;
73+ interrupt-parent = <&gpio1>;
74+ interrupts = <29 IRQ_TYPE_EDGE_RISING>;
75+ interrupt-names = "INT1";
76+ };
77+ };
Documentation/devicetree/bindings/iio/light/liteon,ltr390.yaml+56−0
@@ -0,0 +1,56 @@
1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/iio/light/liteon,ltr390.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Lite-On LTR390 ALS and UV Sensor
8+
9+description: |
10+ The Lite-On LTR390 is an ALS (Ambient Light Sensor) and a UV sensor in a
11+ single package with i2c address of 0x53.
12+
13+ Datasheet:
14+ https://optoelectronics.liteon.com/upload/download/DS86-2015-0004/LTR-390UV_Final_%20DS_V1%201.pdf
15+
16+maintainers:
17+ - Anshul Dalal <anshulusr@gmail.com>
18+
19+properties:
20+ compatible:
21+ enum:
22+ - liteon,ltr390
23+
24+ reg:
25+ maxItems: 1
26+
27+ interrupts:
28+ maxItems: 1
29+ description: |
30+ Level interrupt pin with open drain output.
31+ The sensor pulls this pin low when the measured reading is greater than
32+ some configured threshold.
33+
34+ vdd-supply: true
35+
36+required:
37+ - compatible
38+ - reg
39+
40+additionalProperties: false
41+
42+examples:
43+ - |
44+ #include <dt-bindings/interrupt-controller/irq.h>
45+
46+ i2c {
47+ #address-cells = <1>;
48+ #size-cells = <0>;
49+
50+ light-sensor@53 {
51+ compatible = "liteon,ltr390";
52+ reg = <0x53>;
53+ interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
54+ vdd-supply = <&vdd_regulator>;
55+ };
56+ };
Documentation/devicetree/bindings/iio/light/vishay,veml6075.yaml+39−0
@@ -0,0 +1,39 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/iio/light/vishay,veml6075.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Vishay VEML6075 UVA and UVB sensor
8+
9+maintainers:
10+ - Javier Carrasco <javier.carrasco.cruz@gmail.com>
11+
12+properties:
13+ compatible:
14+ const: vishay,veml6075
15+
16+ reg:
17+ maxItems: 1
18+
19+ vdd-supply: true
20+
21+required:
22+ - compatible
23+ - reg
24+
25+additionalProperties: false
26+
27+examples:
28+ - |
29+ i2c {
30+ #address-cells = <1>;
31+ #size-cells = <0>;
32+
33+ uv-sensor@10 {
34+ compatible = "vishay,veml6075";
35+ reg = <0x10>;
36+ vdd-supply = <&vdd_reg>;
37+ };
38+ };
39+...
Documentation/devicetree/bindings/iio/pressure/honeywell,hsc030pa.yaml+142−0
@@ -0,0 +1,142 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/iio/pressure/honeywell,hsc030pa.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Honeywell TruStability HSC and SSC pressure sensor series
8+
9+description: |
10+ support for Honeywell TruStability HSC and SSC digital pressure sensor
11+ series.
12+
13+ These sensors have either an I2C, an SPI or an analog interface. Only the
14+ digital versions are supported by this driver.
15+
16+ There are 118 models with different pressure ranges available in each family.
17+ The vendor calls them "HSC series" and "SSC series". All of them have an
18+ identical programming model but differ in pressure range, unit and transfer
19+ function.
20+
21+ To support different models one needs to specify the pressure range as well
22+ as the transfer function. Pressure range can either be provided via
23+ pressure-triplet (directly extracted from the part number) or in case it's
24+ a custom chip via numerical range limits converted to pascals.
25+
26+ The transfer function defines the ranges of raw conversion values delivered
27+ by the sensor. pmin-pascal and pmax-pascal corespond to the minimum and
28+ maximum pressure that can be measured.
29+
30+ Please note that in case of an SPI-based sensor, the clock signal should not
31+ exceed 800kHz and the MOSI signal is not required.
32+
33+ Specifications about the devices can be found at:
34+ https://prod-edam.honeywell.com/content/dam/honeywell-edam/sps/siot/en-us/products/sensors/pressure-sensors/board-mount-pressure-sensors/trustability-hsc-series/documents/sps-siot-trustability-hsc-series-high-accuracy-board-mount-pressure-sensors-50099148-a-en-ciid-151133.pdf
35+ https://prod-edam.honeywell.com/content/dam/honeywell-edam/sps/siot/en-us/products/sensors/pressure-sensors/board-mount-pressure-sensors/trustability-ssc-series/documents/sps-siot-trustability-ssc-series-standard-accuracy-board-mount-pressure-sensors-50099533-a-en-ciid-151134.pdf
36+
37+maintainers:
38+ - Petre Rodan <petre.rodan@subdimension.ro>
39+
40+properties:
41+ compatible:
42+ const: honeywell,hsc030pa
43+
44+ reg:
45+ maxItems: 1
46+
47+ honeywell,transfer-function:
48+ description: |
49+ Transfer function which defines the range of valid values delivered by
50+ the sensor.
51+ 0 - A, 10% to 90% of 2^14
52+ 1 - B, 5% to 95% of 2^14
53+ 2 - C, 5% to 85% of 2^14
54+ 3 - F, 4% to 94% of 2^14
55+ enum: [0, 1, 2, 3]
56+ $ref: /schemas/types.yaml#/definitions/uint32
57+
58+ honeywell,pressure-triplet:
59+ description: |
60+ Case-sensitive five character string that defines pressure range, unit
61+ and type as part of the device nomenclature. In the unlikely case of a
62+ custom chip, set to "NA" and provide pmin-pascal and pmax-pascal.
63+ enum: [001BA, 1.6BA, 2.5BA, 004BA, 006BA, 010BA, 1.6MD, 2.5MD, 004MD,
64+ 006MD, 010MD, 016MD, 025MD, 040MD, 060MD, 100MD, 160MD, 250MD,
65+ 400MD, 600MD, 001BD, 1.6BD, 2.5BD, 004BD, 2.5MG, 004MG, 006MG,
66+ 010MG, 016MG, 025MG, 040MG, 060MG, 100MG, 160MG, 250MG, 400MG,
67+ 600MG, 001BG, 1.6BG, 2.5BG, 004BG, 006BG, 010BG, 100KA, 160KA,
68+ 250KA, 400KA, 600KA, 001GA, 160LD, 250LD, 400LD, 600LD, 001KD,
69+ 1.6KD, 2.5KD, 004KD, 006KD, 010KD, 016KD, 025KD, 040KD, 060KD,
70+ 100KD, 160KD, 250KD, 400KD, 250LG, 400LG, 600LG, 001KG, 1.6KG,
71+ 2.5KG, 004KG, 006KG, 010KG, 016KG, 025KG, 040KG, 060KG, 100KG,
72+ 160KG, 250KG, 400KG, 600KG, 001GG, 015PA, 030PA, 060PA, 100PA,
73+ 150PA, 0.5ND, 001ND, 002ND, 004ND, 005ND, 010ND, 020ND, 030ND,
74+ 001PD, 005PD, 015PD, 030PD, 060PD, 001NG, 002NG, 004NG, 005NG,
75+ 010NG, 020NG, 030NG, 001PG, 005PG, 015PG, 030PG, 060PG, 100PG,
76+ 150PG, NA]
77+ $ref: /schemas/types.yaml#/definitions/string
78+
79+ honeywell,pmin-pascal:
80+ description: |
81+ Minimum pressure value the sensor can measure in pascal.
82+ To be specified only if honeywell,pressure-triplet is set to "NA".
83+
84+ honeywell,pmax-pascal:
85+ description: |
86+ Maximum pressure value the sensor can measure in pascal.
87+ To be specified only if honeywell,pressure-triplet is set to "NA".
88+
89+ vdd-supply:
90+ description:
91+ Provide VDD power to the sensor (either 3.3V or 5V depending on the chip)
92+
93+ spi-max-frequency:
94+ maximum: 800000
95+
96+required:
97+ - compatible
98+ - reg
99+ - honeywell,transfer-function
100+ - honeywell,pressure-triplet
101+
102+additionalProperties: false
103+
104+dependentSchemas:
105+ honeywell,pmin-pascal:
106+ properties:
107+ honeywell,pressure-triplet:
108+ const: NA
109+ honeywell,pmax-pascal:
110+ properties:
111+ honeywell,pressure-triplet:
112+ const: NA
113+
114+examples:
115+ - |
116+ i2c {
117+ #address-cells = <1>;
118+ #size-cells = <0>;
119+
120+ pressure@28 {
121+ compatible = "honeywell,hsc030pa";
122+ reg = <0x28>;
123+ honeywell,transfer-function = <0>;
124+ honeywell,pressure-triplet = "030PA";
125+ };
126+ };
127+ - |
128+ spi {
129+ #address-cells = <1>;
130+ #size-cells = <0>;
131+
132+ pressure@0 {
133+ compatible = "honeywell,hsc030pa";
134+ reg = <0>;
135+ spi-max-frequency = <800000>;
136+ honeywell,transfer-function = <0>;
137+ honeywell,pressure-triplet = "NA";
138+ honeywell,pmin-pascal = <0>;
139+ honeywell,pmax-pascal = <200000>;
140+ };
141+ };
142+...
Documentation/devicetree/bindings/iio/pressure/honeywell,mprls0025pa.yaml+0−2
@@ -53,12 +53,10 @@ properties: · 52 unmodified lines
5353 honeywell,pmin-pascal:
5454 description:
5555 Minimum pressure value the sensor can measure in pascal.
56− $ref: /schemas/types.yaml#/definitions/uint32
5756
5857 honeywell,pmax-pascal:
5958 description:
6059 Maximum pressure value the sensor can measure in pascal.
61− $ref: /schemas/types.yaml#/definitions/uint32
6260
6361 honeywell,transfer-function:
6462 description: |
Documentation/devicetree/bindings/iio/temperature/melexis,mlx90632.yaml+17−2
@@ -4,7 +4,7 @@ · 3 unmodified lines
44 $id: http://devicetree.org/schemas/iio/temperature/melexis,mlx90632.yaml#
55 $schema: http://devicetree.org/meta-schemas/core.yaml#
66
7−title: Melexis MLX90632 contactless Infra Red temperature sensor
7+title: Melexis MLX90632 and MLX90635 contactless Infra Red temperature sensor
88
99 maintainers:
1010 - Crt Mori <cmo@melexis.com>
@@ -27,9 +27,24 @@ description: | · 16 unmodified lines
2727 Since measured object emissivity effects Infra Red energy emitted,
2828 emissivity should be set before requesting the object temperature.
2929
30+ https://www.melexis.com/en/documents/documentation/datasheets/datasheet-mlx90635
31+
32+ MLX90635 is most suitable for consumer applications where
33+ measured object temperature is in range between -20 to 100 degrees
34+ Celsius with relative error of measurement 2 degree Celsius in
35+ object temperature range for industrial applications, while just 0.2
36+ degree Celsius for human body measurement applications. Since it can
37+ operate and measure ambient temperature in range of -20 to 85 degrees
38+ Celsius it is suitable also for outdoor use.
39+
40+ Since measured object emissivity effects Infra Red energy emitted,
41+ emissivity should be set before requesting the object temperature.
42+
3043 properties:
3144 compatible:
32− const: melexis,mlx90632
45+ enum:
46+ - melexis,mlx90632
47+ - melexis,mlx90635
3348
3449 reg:
3550 maxItems: 1
Documentation/devicetree/bindings/iio/temperature/microchip,mcp9600.yaml+70−0
@@ -0,0 +1,70 @@
1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/iio/temperature/microchip,mcp9600.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Microchip MCP9600 thermocouple EMF converter
8+
9+maintainers:
10+ - Andrew Hepp <andrew.hepp@ahepp.dev>
11+
12+description:
13+ https://ww1.microchip.com/downloads/en/DeviceDoc/MCP960X-Data-Sheet-20005426.pdf
14+
15+properties:
16+ compatible:
17+ const: microchip,mcp9600
18+
19+ reg:
20+ maxItems: 1
21+
22+ interrupts:
23+ minItems: 1
24+ maxItems: 6
25+
26+ interrupt-names:
27+ minItems: 1
28+ maxItems: 6
29+ items:
30+ enum:
31+ - open-circuit
32+ - short-circuit
33+ - alert1
34+ - alert2
35+ - alert3
36+ - alert4
37+
38+ thermocouple-type:
39+ $ref: /schemas/types.yaml#/definitions/uint32
40+ description:
41+ Type of thermocouple (THERMOCOUPLE_TYPE_K if omitted).
42+ Use defines in dt-bindings/iio/temperature/thermocouple.h.
43+ Supported types are B, E, J, K, N, R, S, T.
44+
45+ vdd-supply: true
46+
47+required:
48+ - compatible
49+ - reg
50+
51+additionalProperties: false
52+
53+examples:
54+ - |
55+ #include <dt-bindings/iio/temperature/thermocouple.h>
56+ #include <dt-bindings/interrupt-controller/irq.h>
57+ i2c {
58+ #address-cells = <1>;
59+ #size-cells = <0>;
60+
61+ temperature-sensor@60 {
62+ compatible = "microchip,mcp9600";
63+ reg = <0x60>;
64+ interrupt-parent = <&gpio>;
65+ interrupts = <25 IRQ_TYPE_EDGE_RISING>;
66+ interrupt-names = "open-circuit";
67+ thermocouple-type = <THERMOCOUPLE_TYPE_K>;
68+ vdd-supply = <&vdd>;
69+ };
70+ };
Documentation/devicetree/bindings/index.rst+1−0
@@ -4,6 +4,7 @@ · 3 unmodified lines
44 :maxdepth: 1
55
66 ABI
7+ dts-coding-style
78 writing-bindings
89 writing-schema
910 submitting-patches
Documentation/devicetree/bindings/input/adafruit,seesaw-gamepad.yaml+63−0
@@ -0,0 +1,63 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/input/adafruit,seesaw-gamepad.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Adafruit Mini I2C Gamepad with seesaw
8+
9+maintainers:
10+ - Anshul Dalal <anshulusr@gmail.com>
11+
12+description: |
13+ Adafruit Mini I2C Gamepad
14+
15+ +-----------------------------+
16+ | ___ |
17+ | / \ (X) |
18+ | | S | __ __ (Y) (A) |
19+ | \___/ |ST| |SE| (B) |
20+ | |
21+ +-----------------------------+
22+
23+ S -> 10-bit precision bidirectional analog joystick
24+ ST -> Start
25+ SE -> Select
26+ X, A, B, Y -> Digital action buttons
27+
28+ Datasheet: https://cdn-learn.adafruit.com/downloads/pdf/gamepad-qt.pdf
29+ Product page: https://www.adafruit.com/product/5743
30+ Arduino Driver: https://github.com/adafruit/Adafruit_Seesaw
31+
32+properties:
33+ compatible:
34+ const: adafruit,seesaw-gamepad
35+
36+ reg:
37+ maxItems: 1
38+
39+ interrupts:
40+ maxItems: 1
41+ description:
42+ The gamepad's IRQ pin triggers a rising edge if interrupts are enabled.
43+
44+required:
45+ - compatible
46+ - reg
47+
48+additionalProperties: false
49+
50+examples:
51+ - |
52+ #include <dt-bindings/interrupt-controller/irq.h>
53+
54+ i2c {
55+ #address-cells = <1>;
56+ #size-cells = <0>;
57+
58+ joystick@50 {
59+ compatible = "adafruit,seesaw-gamepad";
60+ interrupts = <18 IRQ_TYPE_EDGE_RISING>;
61+ reg = <0x50>;
62+ };
63+ };
Documentation/devicetree/bindings/input/elan,ekth6915.yaml+3−2
@@ -18,8 +18,9 @@ allOf: · 17 unmodified lines
1818
1919 properties:
2020 compatible:
21− items:
22− - const: elan,ekth6915
21+ enum:
22+ - elan,ekth6915
23+ - ilitek,ili2901
2324
2425 reg:
2526 const: 0x10
Documentation/devicetree/bindings/input/gpio-keys.yaml+40−1
@@ -31,7 +31,23 @@ patternProperties: · 30 unmodified lines
3131 maxItems: 1
3232
3333 interrupts:
34− maxItems: 1
34+ oneOf:
35+ - items:
36+ - description: Optional key interrupt or wakeup interrupt
37+ - items:
38+ - description: Key interrupt
39+ - description: Wakeup interrupt
40+
41+ interrupt-names:
42+ description:
43+ Optional interrupt names, can be used to specify a separate dedicated
44+ wake-up interrupt in addition to the gpio irq
45+ oneOf:
46+ - items:
47+ - enum: [ irq, wakeup ]
48+ - items:
49+ - const: irq
50+ - const: wakeup
3551
3652 label:
3753 description: Descriptive name of the key.
@@ -97,6 +113,20 @@ patternProperties: · 59 unmodified lines
97113 - required:
98114 - gpios
99115
116+ allOf:
117+ - if:
118+ properties:
119+ interrupts:
120+ minItems: 2
121+ required:
122+ - interrupts
123+ then:
124+ properties:
125+ interrupt-names:
126+ minItems: 2
127+ required:
128+ - interrupt-names
129+
100130 dependencies:
101131 wakeup-event-action: [ wakeup-source ]
102132 linux,input-value: [ gpios ]
@@ -137,6 +167,15 @@ examples: · 34 unmodified lines
137167 linux,code = <108>;
138168 interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
139169 };
170+
171+ key-wakeup {
172+ label = "GPIO Key WAKEUP";
173+ linux,code = <143>;
174+ interrupts-extended = <&intc 2 IRQ_TYPE_EDGE_FALLING>,
175+ <&intc_wakeup 0 IRQ_TYPE_LEVEL_HIGH>;
176+ interrupt-names = "irq", "wakeup";
177+ wakeup-source;
178+ };
140179 };
141180
142181 ...
Documentation/devicetree/bindings/input/gpio-mouse.txt+0−32
@@ -1,32 +0,0 @@
1−Device-Tree bindings for GPIO attached mice
2−
3−This simply uses standard GPIO handles to define a simple mouse connected
4−to 5-7 GPIO lines.
5−
6−Required properties:
7− - compatible: must be "gpio-mouse"
8− - scan-interval-ms: The scanning interval in milliseconds
9− - up-gpios: GPIO line phandle to the line indicating "up"
10− - down-gpios: GPIO line phandle to the line indicating "down"
11− - left-gpios: GPIO line phandle to the line indicating "left"
12− - right-gpios: GPIO line phandle to the line indicating "right"
13−
14−Optional properties:
15− - button-left-gpios: GPIO line handle to the left mouse button
16− - button-middle-gpios: GPIO line handle to the middle mouse button
17− - button-right-gpios: GPIO line handle to the right mouse button
18−Example:
19−
20−#include <dt-bindings/gpio/gpio.h>
21−
22−gpio-mouse {
23− compatible = "gpio-mouse";
24− scan-interval-ms = <50>;
25− up-gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
26− down-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
27− left-gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
28− right-gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
29− button-left-gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
30− button-middle-gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
31− button-right-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
32−};
Documentation/devicetree/bindings/input/gpio-mouse.yaml+68−0
@@ -0,0 +1,68 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/input/gpio-mouse.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: GPIO attached mouse
8+
9+description: |
10+ This simply uses standard GPIO handles to define a simple mouse connected
11+ to 5-7 GPIO lines.
12+
13+maintainers:
14+ - Anshul Dalal <anshulusr@gmail.com>
15+
16+properties:
17+ compatible:
18+ const: gpio-mouse
19+
20+ scan-interval-ms:
21+ maxItems: 1
22+
23+ up-gpios:
24+ maxItems: 1
25+
26+ down-gpios:
27+ maxItems: 1
28+
29+ left-gpios:
30+ maxItems: 1
31+
32+ right-gpios:
33+ maxItems: 1
34+
35+ button-left-gpios:
36+ maxItems: 1
37+
38+ button-middle-gpios:
39+ maxItems: 1
40+
41+ button-right-gpios:
42+ maxItems: 1
43+
44+required:
45+ - compatible
46+ - scan-interval-ms
47+ - up-gpios
48+ - down-gpios
49+ - left-gpios
50+ - right-gpios
51+
52+additionalProperties: false
53+
54+examples:
55+ - |
56+ #include <dt-bindings/gpio/gpio.h>
57+
58+ gpio-mouse {
59+ compatible = "gpio-mouse";
60+ scan-interval-ms = <50>;
61+ up-gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
62+ down-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
63+ left-gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
64+ right-gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
65+ button-left-gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
66+ button-middle-gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
67+ button-right-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
68+ };
Documentation/devicetree/bindings/input/iqs269a.yaml+97−1
@@ -9,6 +9,9 @@ title: Azoteq IQS269A Capacitive Touch Controller · 8 unmodified lines
99 maintainers:
1010 - Jeff LaBundy <jeff@labundy.com>
1111
12+allOf:
13+ - $ref: input.yaml#
14+
1215 description: |
1316 The Azoteq IQS269A is an 8-channel capacitive touch controller that features
1417 additional Hall-effect and inductive sensing capabilities.
@@ -17,7 +20,10 @@ description: | · 2 unmodified lines
1720
1821 properties:
1922 compatible:
20− const: azoteq,iqs269a
23+ enum:
24+ - azoteq,iqs269a
25+ - azoteq,iqs269a-00
26+ - azoteq,iqs269a-d0
2127
2228 reg:
2329 maxItems: 1
@@ -204,6 +210,73 @@ properties: · 180 unmodified lines
204210 default: 1
205211 description: Specifies the slider coordinate filter strength.
206212
213+ azoteq,touch-hold-ms:
214+ multipleOf: 256
215+ minimum: 256
216+ maximum: 65280
217+ default: 5120
218+ description:
219+ Specifies the length of time (in ms) for which the channel selected by
220+ 'azoteq,gpio3-select' must be held in a state of touch in order for an
221+ approximately 60-ms pulse to be asserted on the GPIO4 pin.
222+
223+ linux,keycodes:
224+ minItems: 1
225+ maxItems: 8
226+ description: |
227+ Specifies the numeric keycodes associated with each available gesture in
228+ the following order (enter 0 for unused gestures):
229+ 0: Slider 0 tap
230+ 1: Slider 0 hold
231+ 2: Slider 0 positive flick or swipe
232+ 3: Slider 0 negative flick or swipe
233+ 4: Slider 1 tap
234+ 5: Slider 1 hold
235+ 6: Slider 1 positive flick or swipe
236+ 7: Slider 1 negative flick or swipe
237+
238+ azoteq,gesture-swipe:
239+ type: boolean
240+ description:
241+ Directs the device to interpret axial gestures as a swipe (finger remains
242+ on slider) instead of a flick (finger leaves slider).
243+
244+ azoteq,timeout-tap-ms:
245+ multipleOf: 16
246+ minimum: 0
247+ maximum: 4080
248+ default: 400
249+ description:
250+ Specifies the length of time (in ms) within which a slider touch must be
251+ released in order to be interpreted as a tap. Default and maximum values
252+ as well as step size are reduced by a factor of 4 with device version 2.
253+
254+ azoteq,timeout-swipe-ms:
255+ multipleOf: 16
256+ minimum: 0
257+ maximum: 4080
258+ default: 2000
259+ description:
260+ Specifies the length of time (in ms) within which an axial gesture must be
261+ completed in order to be interpreted as a flick or swipe. Default and max-
262+ imum values as well as step size are reduced by a factor of 4 with device
263+ version 2.
264+
265+ azoteq,thresh-swipe:
266+ $ref: /schemas/types.yaml#/definitions/uint32
267+ minimum: 0
268+ maximum: 255
269+ default: 128
270+ description:
271+ Specifies the number of points across which an axial gesture must travel
272+ in order to be interpreted as a flick or swipe.
273+
274+dependencies:
275+ azoteq,gesture-swipe: ["linux,keycodes"]
276+ azoteq,timeout-tap-ms: ["linux,keycodes"]
277+ azoteq,timeout-swipe-ms: ["linux,keycodes"]
278+ azoteq,thresh-swipe: ["linux,keycodes"]
279+
207280 patternProperties:
208281 "^channel@[0-7]$":
209282 type: object
@@ -454,6 +527,21 @@ patternProperties: · 244 unmodified lines
454527
455528 additionalProperties: false
456529
530+if:
531+ properties:
532+ compatible:
533+ contains:
534+ enum:
535+ - azoteq,iqs269a-d0
536+then:
537+ patternProperties:
538+ "^channel@[0-7]$":
539+ properties:
540+ azoteq,slider1-select: false
541+else:
542+ properties:
543+ azoteq,touch-hold-ms: false
544+
457545 required:
458546 - compatible
459547 - reg
@@ -484,6 +572,14 @@ examples: · 24 unmodified lines
484572 azoteq,hall-enable;
485573 azoteq,suspend-mode = <2>;
486574
575+ linux,keycodes = <KEY_PLAYPAUSE>,
576+ <KEY_STOPCD>,
577+ <KEY_NEXTSONG>,
578+ <KEY_PREVIOUSSONG>;
579+
580+ azoteq,timeout-tap-ms = <400>;
581+ azoteq,timeout-swipe-ms = <800>;
582+
487583 channel@0 {
488584 reg = <0x0>;
489585
Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml+1−23
@@ -90,26 +90,4 @@ required: · 89 unmodified lines
9090
9191 unevaluatedProperties: false
9292
93−examples:
94− - |
95− #include <dt-bindings/input/input.h>
96− #include <dt-bindings/interrupt-controller/arm-gic.h>
97−
98− pmic {
99− compatible = "mediatek,mt6397";
100−
101− keys {
102− compatible = "mediatek,mt6397-keys";
103− mediatek,long-press-mode = <1>;
104− power-off-time-sec = <0>;
105−
106− key-power {
107− linux,keycodes = <KEY_POWER>;
108− wakeup-source;
109− };
110−
111− key-home {
112− linux,keycodes = <KEY_VOLUMEDOWN>;
113− };
114− };
115− };
93+...
Documentation/devicetree/bindings/input/microchip,cap11xx.yaml+77−3
@@ -45,13 +45,13 @@ properties: · 44 unmodified lines
4545 Enables the Linux input system's autorepeat feature on the input device.
4646
4747 linux,keycodes:
48− minItems: 6
49− maxItems: 6
48+ minItems: 3
49+ maxItems: 8
5050 description: |
5151 Specifies an array of numeric keycode values to
5252 be used for the channels. If this property is
5353 omitted, KEY_A, KEY_B, etc are used as defaults.
54− The array must have exactly six entries.
54+ The number of entries must correspond to the number of channels.
5555
5656 microchip,sensor-gain:
5757 $ref: /schemas/types.yaml#/definitions/uint32
@@ -70,6 +70,59 @@ properties: · 12 unmodified lines
7070 open drain. This property allows using the active
7171 high push-pull output.
7272
73+ microchip,sensitivity-delta-sense:
74+ $ref: /schemas/types.yaml#/definitions/uint32
75+ default: 32
76+ enum: [1, 2, 4, 8, 16, 32, 64, 128]
77+ description:
78+ Controls the sensitivity multiplier of a touch detection.
79+ Higher value means more sensitive settings.
80+ At the more sensitive settings, touches are detected for a smaller delta
81+ capacitance corresponding to a "lighter" touch.
82+
83+ microchip,signal-guard:
84+ $ref: /schemas/types.yaml#/definitions/uint32-array
85+ minItems: 3
86+ maxItems: 8
87+ items:
88+ enum: [0, 1]
89+ description: |
90+ 0 - off
91+ 1 - on
92+ The signal guard isolates the signal from virtual grounds.
93+ If enabled then the behavior of the channel is changed to signal guard.
94+ The number of entries must correspond to the number of channels.
95+
96+ microchip,input-threshold:
97+ $ref: /schemas/types.yaml#/definitions/uint32-array
98+ minItems: 3
99+ maxItems: 8
100+ items:
101+ minimum: 0
102+ maximum: 127
103+ description:
104+ Specifies the delta threshold that is used to determine if a touch has
105+ been detected. A higher value means a larger difference in capacitance
106+ is required for a touch to be registered, making the touch sensor less
107+ sensitive.
108+ The number of entries must correspond to the number of channels.
109+
110+ microchip,calib-sensitivity:
111+ $ref: /schemas/types.yaml#/definitions/uint32-array
112+ minItems: 3
113+ maxItems: 8
114+ items:
115+ enum: [1, 2, 4]
116+ description: |
117+ Specifies an array of numeric values that controls the gain
118+ used by the calibration routine to enable sensor inputs
119+ to be more sensitive for proximity detection.
120+ Gain is based on touch pad capacitance range
121+ 1 - 5-50pF
122+ 2 - 0-25pF
123+ 4 - 0-12.5pF
124+ The number of entries must correspond to the number of channels.
125+
73126 patternProperties:
74127 "^led@[0-7]$":
75128 type: object
@@ -99,10 +152,29 @@ allOf: · 23 unmodified lines
99152 contains:
100153 enum:
101154 - microchip,cap1106
155+ - microchip,cap1203
156+ - microchip,cap1206
157+ - microchip,cap1293
158+ - microchip,cap1298
102159 then:
103160 patternProperties:
104161 "^led@[0-7]$": false
105162
163+ - if:
164+ properties:
165+ compatible:
166+ contains:
167+ enum:
168+ - microchip,cap1106
169+ - microchip,cap1126
170+ - microchip,cap1188
171+ - microchip,cap1203
172+ - microchip,cap1206
173+ then:
174+ properties:
175+ microchip,signal-guard: false
176+ microchip,calib-sensitivity: false
177+
106178 required:
107179 - compatible
108180 - interrupts
@@ -122,6 +194,8 @@ examples: · 13 unmodified lines
122194 reg = <0x28>;
123195 autorepeat;
124196 microchip,sensor-gain = <2>;
197+ microchip,sensitivity-delta-sense = <16>;
198+ microchip,input-threshold = <21>, <18>, <46>, <46>, <46>, <21>;
125199
126200 linux,keycodes = <103>, /* KEY_UP */
127201 <106>, /* KEY_RIGHT */
Documentation/devicetree/bindings/input/sprd,sc27xx-vibrator.yaml+1−18
@@ -28,21 +28,4 @@ required: · 27 unmodified lines
2828
2929 additionalProperties: false
3030
31−examples:
32− - |
33− #include <dt-bindings/interrupt-controller/arm-gic.h>
34− sc2731_pmic: pmic@0 {
35− compatible = "sprd,sc2731";
36− reg = <0 0>;
37− spi-max-frequency = <26000000>;
38− interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
39− interrupt-controller;
40− #interrupt-cells = <2>;
41− #address-cells = <1>;
42− #size-cells = <0>;
43−
44− vibrator@eb4 {
45− compatible = "sprd,sc2731-vibrator";
46− reg = <0xeb4>;
47− };
48− };
31+...
Documentation/devicetree/bindings/input/ti,drv2665.txt+0−17
@@ -1,17 +0,0 @@
1−* Texas Instruments - drv2665 Haptics driver
2−
3−Required properties:
4− - compatible - "ti,drv2665" - DRV2665
5− - reg - I2C slave address
6− - vbat-supply - Required supply regulator
7−
8−Example:
9−
10−haptics: haptics@59 {
11− compatible = "ti,drv2665";
12− reg = <0x59>;
13− vbat-supply = <&vbat>;
14−};
15−
16−For more product information please see the link below:
17−http://www.ti.com/product/drv2665
Documentation/devicetree/bindings/input/ti,drv2667.txt+0−17
@@ -1,17 +0,0 @@
1−* Texas Instruments - drv2667 Haptics driver
2−
3−Required properties:
4− - compatible - "ti,drv2667" - DRV2667
5− - reg - I2C slave address
6− - vbat-supply - Required supply regulator
7−
8−Example:
9−
10−haptics: haptics@59 {
11− compatible = "ti,drv2667";
12− reg = <0x59>;
13− vbat-supply = <&vbat>;
14−};
15−
16−For more product information please see the link below:
17−http://www.ti.com/product/drv2667
Documentation/devicetree/bindings/input/ti,drv266x.yaml+50−0
@@ -0,0 +1,50 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/input/ti,drv266x.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Texas Instruments - drv266x Haptics driver
8+
9+description: |
10+ Product Page:
11+ http://www.ti.com/product/drv2665
12+ http://www.ti.com/product/drv2667
13+
14+maintainers:
15+ - Anshul Dalal <anshulusr@gmail.com>
16+
17+properties:
18+ compatible:
19+ enum:
20+ - ti,drv2665
21+ - ti,drv2667
22+
23+ reg:
24+ maxItems: 1
25+
26+ vbat-supply:
27+ description: Required supply regulator
28+
29+required:
30+ - compatible
31+ - reg
32+ - vbat-supply
33+
34+additionalProperties: false
35+
36+examples:
37+ - |
38+ #include <dt-bindings/gpio/gpio.h>
39+
40+
41+ i2c {
42+ #address-cells = <1>;
43+ #size-cells = <0>;
44+
45+ haptics@59 {
46+ compatible = "ti,drv2667";
47+ reg = <0x59>;
48+ vbat-supply = <&vbat>;
49+ };
50+ };
Documentation/devicetree/bindings/input/touchscreen/neonode,zforce.yaml+72−0
@@ -0,0 +1,72 @@
1+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/input/touchscreen/neonode,zforce.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Neonode infrared touchscreen controller
8+
9+maintainers:
10+ - Heiko Stuebner <heiko@sntech.de>
11+
12+allOf:
13+ - $ref: touchscreen.yaml#
14+
15+properties:
16+ compatible:
17+ const: neonode,zforce
18+
19+ reg:
20+ maxItems: 1
21+
22+ interrupts:
23+ maxItems: 1
24+
25+ reset-gpios:
26+ maxItems: 1
27+
28+ irq-gpios:
29+ maxItems: 1
30+
31+ x-size:
32+ deprecated: true
33+ $ref: /schemas/types.yaml#/definitions/uint32
34+
35+ y-size:
36+ deprecated: true
37+ $ref: /schemas/types.yaml#/definitions/uint32
38+
39+ vdd-supply: true
40+
41+required:
42+ - compatible
43+ - reg
44+ - interrupts
45+ - reset-gpios
46+
47+unevaluatedProperties: false
48+
49+examples:
50+ - |
51+ #include <dt-bindings/interrupt-controller/irq.h>
52+
53+ i2c {
54+ #address-cells = <1>;
55+ #size-cells = <0>;
56+
57+ touchscreen@50 {
58+ compatible = "neonode,zforce";
59+ reg = <0x50>;
60+ interrupts = <2 0>;
61+ vdd-supply = <&reg_zforce_vdd>;
62+
63+ reset-gpios = <&gpio5 9 0>; /* RST */
64+ irq-gpios = <&gpio5 6 0>; /* IRQ, optional */
65+
66+ touchscreen-min-x = <0>;
67+ touchscreen-size-x = <800>;
68+ touchscreen-min-y = <0>;
69+ touchscreen-size-y = <600>;
70+ };
71+ };
72+...
Documentation/devicetree/bindings/input/touchscreen/samsung,s6sy761.txt+0−32
@@ -1,32 +0,0 @@
1−* Samsung S6SY761 touchscreen controller
2−
3−Required properties:
4−- compatible : must be "samsung,s6sy761"
5−- reg : I2C slave address, (e.g. 0x48)
6−- interrupts : interrupt specification
7−- avdd-supply : analogic power supply
8−- vdd-supply : power supply
9−
10−Optional properties:
11−- touchscreen-size-x : see touchscreen.txt. This property is embedded in the
12− device. If defined it forces a different x resolution.
13−- touchscreen-size-y : see touchscreen.txt. This property is embedded in the
14− device. If defined it forces a different y resolution.
15−
16−Example:
17−
18−i2c@00000000 {
19−
20− /* ... */
21−
22− touchscreen@48 {
23− compatible = "samsung,s6sy761";
24− reg = <0x48>;
25− interrupt-parent = <&gpa1>;
26− interrupts = <1 IRQ_TYPE_NONE>;
27− avdd-supply = <&ldo30_reg>;
28− vdd-supply = <&ldo31_reg>;
29− touchscreen-size-x = <4096>;
30− touchscreen-size-y = <4096>;
31− };
32−};
Documentation/devicetree/bindings/input/touchscreen/samsung,s6sy761.yaml+54−0
@@ -0,0 +1,54 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/input/touchscreen/samsung,s6sy761.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Samsung S6SY761 touchscreen controller
8+
9+maintainers:
10+ - Andi Shyti <andi.shyti@kernel.org>
11+
12+allOf:
13+ - $ref: touchscreen.yaml#
14+
15+properties:
16+ compatible:
17+ const: samsung,s6sy761
18+
19+ reg:
20+ maxItems: 1
21+
22+ interrupts:
23+ maxItems: 1
24+
25+ avdd-supply: true
26+ vdd-supply: true
27+
28+unevaluatedProperties: false
29+
30+required:
31+ - compatible
32+ - reg
33+ - interrupts
34+ - avdd-supply
35+ - vdd-supply
36+
37+examples:
38+ - |
39+ #include <dt-bindings/interrupt-controller/irq.h>
40+ i2c {
41+ #address-cells = <1>;
42+ #size-cells = <0>;
43+
44+ touchscreen@48 {
45+ compatible = "samsung,s6sy761";
46+ reg = <0x48>;
47+ interrupt-parent = <&gpa1>;
48+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
49+ avdd-supply = <&ldo30_reg>;
50+ vdd-supply = <&ldo31_reg>;
51+ touchscreen-size-x = <4096>;
52+ touchscreen-size-y = <4096>;
53+ };
54+ };
Documentation/devicetree/bindings/input/touchscreen/zforce_ts.txt+0−34
@@ -1,34 +0,0 @@
1−* Neonode infrared touchscreen controller
2−
3−Required properties:
4−- compatible: must be "neonode,zforce"
5−- reg: I2C address of the chip
6−- interrupts: interrupt to which the chip is connected
7−- reset-gpios: reset gpio the chip is connected to
8−- x-size: horizontal resolution of touchscreen
9−- y-size: vertical resolution of touchscreen
10−
11−Optional properties:
12−- irq-gpios : interrupt gpio the chip is connected to
13−- vdd-supply: Regulator controlling the controller supply
14−
15−Example:
16−
17− i2c@00000000 {
18− /* ... */
19−
20− zforce_ts@50 {
21− compatible = "neonode,zforce";
22− reg = <0x50>;
23− interrupts = <2 0>;
24− vdd-supply = <&reg_zforce_vdd>;
25−
26− reset-gpios = <&gpio5 9 0>; /* RST */
27− irq-gpios = <&gpio5 6 0>; /* IRQ, optional */
28−
29− x-size = <800>;
30− y-size = <600>;
31− };
32−
33− /* ... */
34− };
Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml+4−0
@@ -25,13 +25,16 @@ properties: · 24 unmodified lines
2525 - const: qcom,msm8998-bwmon # BWMON v4
2626 - items:
2727 - enum:
28+ - qcom,qcm2290-cpu-bwmon
2829 - qcom,sc7180-cpu-bwmon
2930 - qcom,sc7280-cpu-bwmon
3031 - qcom,sc8280xp-cpu-bwmon
3132 - qcom,sdm845-cpu-bwmon
33+ - qcom,sm6115-cpu-bwmon
3234 - qcom,sm6350-llcc-bwmon
3335 - qcom,sm8250-cpu-bwmon
3436 - qcom,sm8550-cpu-bwmon
37+ - qcom,sm8650-cpu-bwmon
3538 - const: qcom,sdm845-bwmon # BWMON v4, unified register space
3639 - items:
3740 - enum:
@@ -40,6 +43,7 @@ properties: · 2 unmodified lines
4043 - qcom,sm6350-cpu-bwmon
4144 - qcom,sm8250-llcc-bwmon
4245 - qcom,sm8550-llcc-bwmon
46+ - qcom,sm8650-llcc-bwmon
4347 - const: qcom,sc7280-llcc-bwmon
4448 - const: qcom,sc7280-llcc-bwmon # BWMON v5
4549 - const: qcom,sdm845-llcc-bwmon # BWMON v5
Documentation/devicetree/bindings/interconnect/qcom,sm6115.yaml+152−0
@@ -0,0 +1,152 @@
1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/interconnect/qcom,sm6115.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Qualcomm SM6115 Network-On-Chip interconnect
8+
9+maintainers:
10+ - Konrad Dybcio <konradybcio@kernel.org>
11+
12+description:
13+ The Qualcomm SM6115 interconnect providers support adjusting the
14+ bandwidth requirements between the various NoC fabrics.
15+
16+properties:
17+ compatible:
18+ enum:
19+ - qcom,sm6115-bimc
20+ - qcom,sm6115-cnoc
21+ - qcom,sm6115-snoc
22+
23+ reg:
24+ maxItems: 1
25+
26+ clocks:
27+ minItems: 1
28+ maxItems: 4
29+
30+ clock-names:
31+ minItems: 1
32+ maxItems: 4
33+
34+# Child node's properties
35+patternProperties:
36+ '^interconnect-[a-z0-9]+$':
37+ type: object
38+ description:
39+ The interconnect providers do not have a separate QoS register space,
40+ but share parent's space.
41+
42+ $ref: qcom,rpm-common.yaml#
43+
44+ properties:
45+ compatible:
46+ enum:
47+ - qcom,sm6115-clk-virt
48+ - qcom,sm6115-mmrt-virt
49+ - qcom,sm6115-mmnrt-virt
50+
51+ required:
52+ - compatible
53+
54+ unevaluatedProperties: false
55+
56+required:
57+ - compatible
58+ - reg
59+
60+allOf:
61+ - $ref: qcom,rpm-common.yaml#
62+ - if:
63+ properties:
64+ compatible:
65+ const: qcom,sm6115-cnoc
66+
67+ then:
68+ properties:
69+ clocks:
70+ items:
71+ - description: USB-NoC AXI clock
72+
73+ clock-names:
74+ items:
75+ - const: usb_axi
76+
77+ - if:
78+ properties:
79+ compatible:
80+ const: qcom,sm6115-snoc
81+
82+ then:
83+ properties:
84+ clocks:
85+ items:
86+ - description: CPU-NoC AXI clock.
87+ - description: UFS-NoC AXI clock.
88+ - description: USB-NoC AXI clock.
89+ - description: IPA clock.
90+
91+ clock-names:
92+ items:
93+ - const: cpu_axi
94+ - const: ufs_axi
95+ - const: usb_axi
96+ - const: ipa
97+
98+ - if:
99+ properties:
100+ compatible:
101+ enum:
102+ - qcom,sm6115-bimc
103+ - qcom,sm6115-clk-virt
104+ - qcom,sm6115-mmrt-virt
105+ - qcom,sm6115-mmnrt-virt
106+
107+ then:
108+ properties:
109+ clocks: false
110+ clock-names: false
111+
112+unevaluatedProperties: false
113+
114+examples:
115+ - |
116+ #include <dt-bindings/clock/qcom,gcc-sm6115.h>
117+ #include <dt-bindings/clock/qcom,rpmcc.h>
118+
119+ snoc: interconnect@1880000 {
120+ compatible = "qcom,sm6115-snoc";
121+ reg = <0x01880000 0x60200>;
122+ clocks = <&gcc GCC_SYS_NOC_CPUSS_AHB_CLK>,
123+ <&gcc GCC_SYS_NOC_UFS_PHY_AXI_CLK>,
124+ <&gcc GCC_SYS_NOC_USB3_PRIM_AXI_CLK>,
125+ <&rpmcc RPM_SMD_IPA_CLK>;
126+ clock-names = "cpu_axi",
127+ "ufs_axi",
128+ "usb_axi",
129+ "ipa";
130+ #interconnect-cells = <1>;
131+
132+ qup_virt: interconnect-clk {
133+ compatible = "qcom,sm6115-clk-virt";
134+ #interconnect-cells = <1>;
135+ };
136+
137+ mmnrt_virt: interconnect-mmnrt {
138+ compatible = "qcom,sm6115-mmnrt-virt";
139+ #interconnect-cells = <1>;
140+ };
141+
142+ mmrt_virt: interconnect-mmrt {
143+ compatible = "qcom,sm6115-mmrt-virt";
144+ #interconnect-cells = <1>;
145+ };
146+ };
147+
148+ cnoc: interconnect@1900000 {
149+ compatible = "qcom,sm6115-cnoc";
150+ reg = <0x01900000 0x8200>;
151+ #interconnect-cells = <1>;
152+ };
Documentation/devicetree/bindings/interconnect/qcom,sm8650-rpmh.yaml+136−0
@@ -0,0 +1,136 @@
1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/interconnect/qcom,sm8650-rpmh.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Qualcomm RPMh Network-On-Chip Interconnect on SM8650
8+
9+maintainers:
10+ - Abel Vesa <abel.vesa@linaro.org>
11+ - Neil Armstrong <neil.armstrong@linaro.org>
12+
13+description: |
14+ RPMh interconnect providers support system bandwidth requirements through
15+ RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
16+ able to communicate with the BCM through the Resource State Coordinator (RSC)
17+ associated with each execution environment. Provider nodes must point to at
18+ least one RPMh device child node pertaining to their RSC and each provider
19+ can map to multiple RPMh resources.
20+
21+ See also:: include/dt-bindings/interconnect/qcom,sm8650-rpmh.h
22+
23+properties:
24+ compatible:
25+ enum:
26+ - qcom,sm8650-aggre1-noc
27+ - qcom,sm8650-aggre2-noc
28+ - qcom,sm8650-clk-virt
29+ - qcom,sm8650-cnoc-main
30+ - qcom,sm8650-config-noc
31+ - qcom,sm8650-gem-noc
32+ - qcom,sm8650-lpass-ag-noc
33+ - qcom,sm8650-lpass-lpiaon-noc
34+ - qcom,sm8650-lpass-lpicx-noc
35+ - qcom,sm8650-mc-virt
36+ - qcom,sm8650-mmss-noc
37+ - qcom,sm8650-nsp-noc
38+ - qcom,sm8650-pcie-anoc
39+ - qcom,sm8650-system-noc
40+
41+ reg:
42+ maxItems: 1
43+
44+ clocks:
45+ minItems: 1
46+ maxItems: 2
47+
48+required:
49+ - compatible
50+
51+allOf:
52+ - $ref: qcom,rpmh-common.yaml#
53+ - if:
54+ properties:
55+ compatible:
56+ contains:
57+ enum:
58+ - qcom,sm8650-clk-virt
59+ - qcom,sm8650-mc-virt
60+ then:
61+ properties:
62+ reg: false
63+ else:
64+ required:
65+ - reg
66+
67+ - if:
68+ properties:
69+ compatible:
70+ contains:
71+ enum:
72+ - qcom,sm8650-pcie-anoc
73+ then:
74+ properties:
75+ clocks:
76+ items:
77+ - description: aggre-NOC PCIe AXI clock
78+ - description: cfg-NOC PCIe a-NOC AHB clock
79+
80+ - if:
81+ properties:
82+ compatible:
83+ contains:
84+ enum:
85+ - qcom,sm8650-aggre1-noc
86+ then:
87+ properties:
88+ clocks:
89+ items:
90+ - description: aggre UFS PHY AXI clock
91+ - description: aggre USB3 PRIM AXI clock
92+
93+ - if:
94+ properties:
95+ compatible:
96+ contains:
97+ enum:
98+ - qcom,sm8650-aggre2-noc
99+ then:
100+ properties:
101+ clocks:
102+ items:
103+ - description: RPMH CC IPA clock
104+
105+ - if:
106+ properties:
107+ compatible:
108+ contains:
109+ enum:
110+ - qcom,sm8650-aggre1-noc
111+ - qcom,sm8650-aggre2-noc
112+ - qcom,sm8650-pcie-anoc
113+ then:
114+ required:
115+ - clocks
116+ else:
117+ properties:
118+ clocks: false
119+
120+unevaluatedProperties: false
121+
122+examples:
123+ - |
124+ clk_virt: interconnect-0 {
125+ compatible = "qcom,sm8650-clk-virt";
126+ #interconnect-cells = <2>;
127+ qcom,bcm-voters = <&apps_bcm_voter>;
128+ };
129+
130+ aggre1_noc: interconnect@16e0000 {
131+ compatible = "qcom,sm8650-aggre1-noc";
132+ reg = <0x016e0000 0x14400>;
133+ #interconnect-cells = <2>;
134+ clocks = <&gcc_phy_axi_clk>, <&gcc_prim_axi_clk>;
135+ qcom,bcm-voters = <&apps_bcm_voter>;
136+ };
Documentation/devicetree/bindings/interconnect/qcom,x1e80100-rpmh.yaml+83−0
@@ -0,0 +1,83 @@
1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/interconnect/qcom,x1e80100-rpmh.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Qualcomm RPMh Network-On-Chip Interconnect on X1E80100
8+
9+maintainers:
10+ - Rajendra Nayak <quic_rjendra@quicinc.com>
11+ - Abel Vesa <abel.vesa@linaro.org>
12+
13+description: |
14+ RPMh interconnect providers support system bandwidth requirements through
15+ RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
16+ able to communicate with the BCM through the Resource State Coordinator (RSC)
17+ associated with each execution environment. Provider nodes must point to at
18+ least one RPMh device child node pertaining to their RSC and each provider
19+ can map to multiple RPMh resources.
20+
21+ See also:: include/dt-bindings/interconnect/qcom,x1e80100-rpmh.h
22+
23+properties:
24+ compatible:
25+ enum:
26+ - qcom,x1e80100-aggre1-noc
27+ - qcom,x1e80100-aggre2-noc
28+ - qcom,x1e80100-clk-virt
29+ - qcom,x1e80100-cnoc-cfg
30+ - qcom,x1e80100-cnoc-main
31+ - qcom,x1e80100-gem-noc
32+ - qcom,x1e80100-lpass-ag-noc
33+ - qcom,x1e80100-lpass-lpiaon-noc
34+ - qcom,x1e80100-lpass-lpicx-noc
35+ - qcom,x1e80100-mc-virt
36+ - qcom,x1e80100-mmss-noc
37+ - qcom,x1e80100-nsp-noc
38+ - qcom,x1e80100-pcie-center-anoc
39+ - qcom,x1e80100-pcie-north-anoc
40+ - qcom,x1e80100-pcie-south-anoc
41+ - qcom,x1e80100-system-noc
42+ - qcom,x1e80100-usb-center-anoc
43+ - qcom,x1e80100-usb-north-anoc
44+ - qcom,x1e80100-usb-south-anoc
45+
46+ reg:
47+ maxItems: 1
48+
49+required:
50+ - compatible
51+
52+allOf:
53+ - $ref: qcom,rpmh-common.yaml#
54+ - if:
55+ properties:
56+ compatible:
57+ contains:
58+ enum:
59+ - qcom,x1e80100-clk-virt
60+ - qcom,x1e80100-mc-virt
61+ then:
62+ properties:
63+ reg: false
64+ else:
65+ required:
66+ - reg
67+
68+unevaluatedProperties: false
69+
70+examples:
71+ - |
72+ clk_virt: interconnect-0 {
73+ compatible = "qcom,x1e80100-clk-virt";
74+ #interconnect-cells = <2>;
75+ qcom,bcm-voters = <&apps_bcm_voter>;
76+ };
77+
78+ aggre1_noc: interconnect@16e0000 {
79+ compatible = "qcom,x1e80100-aggre1-noc";
80+ reg = <0x016e0000 0x14400>;
81+ #interconnect-cells = <2>;
82+ qcom,bcm-voters = <&apps_bcm_voter>;
83+ };
Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml+12−6
@@ -11,8 +11,13 @@ maintainers: · 10 unmodified lines
1111
1212 description: |
1313 This interrupt controller is found in the Loongson-3 family of chips and
14− Loongson-2K1000 chip, as the primary package interrupt controller which
14+ Loongson-2K series chips, as the primary package interrupt controller which
1515 can route local I/O interrupt to interrupt lines of cores.
16+ Be aware of the following points.
17+ 1.The Loongson-2K0500 is a single core CPU;
18+ 2.The Loongson-2K0500/2K1000 has 64 device interrupt sources as inputs, so we
19+ need to define two nodes in dts{i} to describe the "0-31" and "32-61" interrupt
20+ sources respectively.
1621
1722 allOf:
1823 - $ref: /schemas/interrupt-controller.yaml#
@@ -33,6 +38,7 @@ properties: · 14 unmodified lines
3338 - const: main
3439 - const: isr0
3540 - const: isr1
41+ minItems: 2
3642
3743 interrupt-controller: true
3844
@@ -45,11 +51,9 @@ properties: · 6 unmodified lines
4551 interrupt-names:
4652 description: List of names for the parent interrupts.
4753 items:
48− - const: int0
49− - const: int1
50− - const: int2
51− - const: int3
54+ pattern: int[0-3]
5255 minItems: 1
56+ maxItems: 4
5357
5458 '#interrupt-cells':
5559 const: 2
@@ -69,6 +73,7 @@ required: · 13 unmodified lines
6973 - compatible
7074 - reg
7175 - interrupts
76+ - interrupt-names
7277 - interrupt-controller
7378 - '#interrupt-cells'
7479 - loongson,parent_int_map
@@ -86,7 +91,8 @@ if: · 11 unmodified lines
8691 then:
8792 properties:
8893 reg:
89− minItems: 3
94+ minItems: 2
95+ maxItems: 3
9096
9197 required:
9298 - reg-names
Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml+39−17
@@ -29,6 +29,12 @@ properties: · 28 unmodified lines
2929 maxItems: 1
3030 description:
3131 Specifies the base address and size of vMPM registers in RPM MSG RAM.
32+ deprecated: true
33+
34+ qcom,rpm-msg-ram:
35+ $ref: /schemas/types.yaml#/definitions/phandle
36+ description:
37+ Phandle to the APSS MPM slice of the RPM Message RAM
3238
3339 interrupts:
3440 maxItems: 1
@@ -62,35 +68,51 @@ properties: · 27 unmodified lines
6268 - description: MPM pin number
6369 - description: GIC SPI number for the MPM pin
6470
71+ '#power-domain-cells':
72+ const: 0
73+
6574 required:
6675 - compatible
67− - reg
6876 - interrupts
6977 - mboxes
7078 - interrupt-controller
7179 - '#interrupt-cells'
7280 - qcom,mpm-pin-count
7381 - qcom,mpm-pin-map
82+ - qcom,rpm-msg-ram
7483
7584 additionalProperties: false
7685
7786 examples:
7887 - |
7988 #include <dt-bindings/interrupt-controller/arm-gic.h>
80− mpm: interrupt-controller@45f01b8 {
81− compatible = "qcom,mpm";
82− interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
83− reg = <0x45f01b8 0x1000>;
84− mboxes = <&apcs_glb 1>;
85− interrupt-controller;
86− #interrupt-cells = <2>;
87− interrupt-parent = <&intc>;
88− qcom,mpm-pin-count = <96>;
89− qcom,mpm-pin-map = <2 275>,
90− <5 296>,
91− <12 422>,
92− <24 79>,
93− <86 183>,
94− <90 260>,
95− <91 260>;
89+
90+ remoteproc-rpm {
91+ compatible = "qcom,msm8998-rpm-proc", "qcom,rpm-proc";
92+
93+ glink-edge {
94+ compatible = "qcom,glink-rpm";
95+
96+ interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
97+ qcom,rpm-msg-ram = <&rpm_msg_ram>;
98+ mboxes = <&apcs_glb 0>;
99+ };
100+
101+ mpm: interrupt-controller {
102+ compatible = "qcom,mpm";
103+ qcom,rpm-msg-ram = <&apss_mpm>;
104+ interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
105+ mboxes = <&apcs_glb 1>;
106+ interrupt-controller;
107+ #interrupt-cells = <2>;
108+ interrupt-parent = <&intc>;
109+ qcom,mpm-pin-count = <96>;
110+ qcom,mpm-pin-map = <2 275>,
111+ <5 296>,
112+ <12 422>,
113+ <24 79>,
114+ <86 183>,
115+ <91 260>;
116+ #power-domain-cells = <0>;
117+ };
96118 };
Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml+4−0
@@ -35,12 +35,16 @@ properties: · 34 unmodified lines
3535 - qcom,sdm845-pdc
3636 - qcom,sdx55-pdc
3737 - qcom,sdx65-pdc
38+ - qcom,sdx75-pdc
3839 - qcom,sm4450-pdc
3940 - qcom,sm6350-pdc
4041 - qcom,sm8150-pdc
4142 - qcom,sm8250-pdc
4243 - qcom,sm8350-pdc
4344 - qcom,sm8450-pdc
45+ - qcom,sm8550-pdc
46+ - qcom,sm8650-pdc
47+ - qcom,x1e80100-pdc
4448 - const: qcom,pdc
4549
4650 reg:
Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml+4−1
@@ -26,6 +26,7 @@ properties: · 25 unmodified lines
2626 - renesas,r9a07g043u-irqc # RZ/G2UL
2727 - renesas,r9a07g044-irqc # RZ/G2{L,LC}
2828 - renesas,r9a07g054-irqc # RZ/V2L
29+ - renesas,r9a08g045-irqc # RZ/G3S
2930 - const: renesas,rzg2l-irqc
3031
3132 '#interrupt-cells':
@@ -167,7 +168,9 @@ allOf: · 135 unmodified lines
167168 properties:
168169 compatible:
169170 contains:
170− const: renesas,r9a07g043u-irqc
171+ enum:
172+ - renesas,r9a07g043u-irqc
173+ - renesas,r9a08g045-irqc
171174 then:
172175 properties:
173176 interrupts:
Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml+1−0
@@ -66,6 +66,7 @@ properties: · 65 unmodified lines
6666 - enum:
6767 - allwinner,sun20i-d1-plic
6868 - sophgo,cv1800b-plic
69+ - sophgo,cv1812h-plic
6970 - sophgo,sg2042-plic
7071 - thead,th1520-plic
7172 - const: thead,c900-plic
Documentation/devicetree/bindings/interrupt-controller/st,stih407-irq-syscfg.yaml+2−2
@@ -55,8 +55,8 @@ examples: · 54 unmodified lines
5555 - |
5656 #include <dt-bindings/interrupt-controller/irq-st.h>
5757 irq-syscfg {
58− compatible = "st,stih407-irq-syscfg";
59− st,syscfg = <&syscfg_cpu>;
58+ compatible = "st,stih407-irq-syscfg";
59+ st,syscfg = <&syscfg_cpu>;
6060 st,irq-device = <ST_IRQ_SYSCFG_PMU_0>,
6161 <ST_IRQ_SYSCFG_PMU_1>;
6262 st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>,
Documentation/devicetree/bindings/iommu/apple,dart.yaml+1−0
@@ -24,6 +24,7 @@ properties: · 23 unmodified lines
2424 compatible:
2525 enum:
2626 - apple,t8103-dart
27+ - apple,t8103-usb4-dart
2728 - apple,t8110-dart
2829 - apple,t6000-dart
2930
Documentation/devicetree/bindings/iommu/arm,smmu.yaml+74−3
@@ -56,6 +56,8 @@ properties: · 55 unmodified lines
5656 - qcom,sm8350-smmu-500
5757 - qcom,sm8450-smmu-500
5858 - qcom,sm8550-smmu-500
59+ - qcom,sm8650-smmu-500
60+ - qcom,x1e80100-smmu-500
5961 - const: qcom,smmu-500
6062 - const: arm,mmu-500
6163
@@ -89,6 +91,8 @@ properties: · 27 unmodified lines
8991 - qcom,sm8150-smmu-500
9092 - qcom,sm8250-smmu-500
9193 - qcom,sm8350-smmu-500
94+ - qcom,sm8450-smmu-500
95+ - qcom,sm8550-smmu-500
9296 - const: qcom,adreno-smmu
9397 - const: qcom,smmu-500
9498 - const: arm,mmu-500
@@ -429,6 +433,30 @@ allOf: · 334 unmodified lines
429433 - description: interface clock required to access smmu's registers
430434 through the TCU's programming interface.
431435
436+ - if:
437+ properties:
438+ compatible:
439+ items:
440+ - enum:
441+ - qcom,sm8350-smmu-500
442+ - const: qcom,adreno-smmu
443+ - const: qcom,smmu-500
444+ - const: arm,mmu-500
445+ then:
446+ properties:
447+ clock-names:
448+ items:
449+ - const: bus
450+ - const: iface
451+ - const: ahb
452+ - const: hlos1_vote_gpu_smmu
453+ - const: cx_gmu
454+ - const: hub_cx_int
455+ - const: hub_aon
456+ clocks:
457+ minItems: 7
458+ maxItems: 7
459+
432460 - if:
433461 properties:
434462 compatible:
@@ -453,6 +481,50 @@ allOf: · 18 unmodified lines
453481 - description: Voter clock required for HLOS SMMU access
454482 - description: Interface clock required for register access
455483
484+ - if:
485+ properties:
486+ compatible:
487+ const: qcom,sm8450-smmu-500
488+ then:
489+ properties:
490+ clock-names:
491+ items:
492+ - const: gmu
493+ - const: hub
494+ - const: hlos
495+ - const: bus
496+ - const: iface
497+ - const: ahb
498+
499+ clocks:
500+ items:
501+ - description: GMU clock
502+ - description: GPU HUB clock
503+ - description: HLOS vote clock
504+ - description: GPU memory bus clock
505+ - description: GPU SNoC bus clock
506+ - description: GPU AHB clock
507+
508+ - if:
509+ properties:
510+ compatible:
511+ const: qcom,sm8550-smmu-500
512+ then:
513+ properties:
514+ clock-names:
515+ items:
516+ - const: hlos
517+ - const: bus
518+ - const: iface
519+ - const: ahb
520+
521+ clocks:
522+ items:
523+ - description: HLOS vote clock
524+ - description: GPU memory bus clock
525+ - description: GPU SNoC bus clock
526+ - description: GPU AHB clock
527+
456528 # Disallow clocks for all other platforms with specific compatibles
457529 - if:
458530 properties:
@@ -472,9 +544,8 @@ allOf: · 13 unmodified lines
472544 - qcom,sdx65-smmu-500
473545 - qcom,sm6350-smmu-500
474546 - qcom,sm6375-smmu-500
475− - qcom,sm8350-smmu-500
476− - qcom,sm8450-smmu-500
477− - qcom,sm8550-smmu-500
547+ - qcom,sm8650-smmu-500
548+ - qcom,x1e80100-smmu-500
478549 then:
479550 properties:
480551 clock-names: false
Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml+8−3
@@ -19,9 +19,14 @@ description: |+ · 18 unmodified lines
1919
2020 properties:
2121 compatible:
22− enum:
23− - rockchip,iommu
24− - rockchip,rk3568-iommu
22+ oneOf:
23+ - enum:
24+ - rockchip,iommu
25+ - rockchip,rk3568-iommu
26+ - items:
27+ - enum:
28+ - rockchip,rk3588-iommu
29+ - const: rockchip,rk3568-iommu
2530
2631 reg:
2732 items:
Documentation/devicetree/bindings/leds/allwinner,sun50i-a100-ledc.yaml+137−0
@@ -0,0 +1,137 @@
1+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/leds/allwinner,sun50i-a100-ledc.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Allwinner A100 LED Controller
8+
9+maintainers:
10+ - Samuel Holland <samuel@sholland.org>
11+
12+description:
13+ The LED controller found in Allwinner sunxi SoCs uses a one-wire serial
14+ interface to drive up to 1024 RGB LEDs.
15+
16+properties:
17+ compatible:
18+ oneOf:
19+ - const: allwinner,sun50i-a100-ledc
20+ - items:
21+ - enum:
22+ - allwinner,sun20i-d1-ledc
23+ - allwinner,sun50i-r329-ledc
24+ - const: allwinner,sun50i-a100-ledc
25+
26+ reg:
27+ maxItems: 1
28+
29+ "#address-cells":
30+ const: 1
31+
32+ "#size-cells":
33+ const: 0
34+
35+ interrupts:
36+ maxItems: 1
37+
38+ clocks:
39+ items:
40+ - description: Bus clock
41+ - description: Module clock
42+
43+ clock-names:
44+ items:
45+ - const: bus
46+ - const: mod
47+
48+ resets:
49+ maxItems: 1
50+
51+ dmas:
52+ maxItems: 1
53+ description: TX DMA channel
54+
55+ dma-names:
56+ const: tx
57+
58+ allwinner,pixel-format:
59+ description: Pixel format (subpixel transmission order), default is "grb"
60+ enum:
61+ - bgr
62+ - brg
63+ - gbr
64+ - grb
65+ - rbg
66+ - rgb
67+
68+ allwinner,t0h-ns:
69+ default: 336
70+ description: Length of high pulse when transmitting a "0" bit
71+
72+ allwinner,t0l-ns:
73+ default: 840
74+ description: Length of low pulse when transmitting a "0" bit
75+
76+ allwinner,t1h-ns:
77+ default: 882
78+ description: Length of high pulse when transmitting a "1" bit
79+
80+ allwinner,t1l-ns:
81+ default: 294
82+ description: Length of low pulse when transmitting a "1" bit
83+
84+ allwinner,treset-ns:
85+ default: 300000
86+ description: Minimum delay between transmission frames
87+
88+patternProperties:
89+ "^multi-led@[0-9a-f]+$":
90+ type: object
91+ $ref: leds-class-multicolor.yaml#
92+ unevaluatedProperties: false
93+ properties:
94+ reg:
95+ minimum: 0
96+ maximum: 1023
97+ description: Index of the LED in the series (must be contiguous)
98+
99+ required:
100+ - reg
101+
102+required:
103+ - compatible
104+ - reg
105+ - interrupts
106+ - clocks
107+ - clock-names
108+ - resets
109+
110+additionalProperties: false
111+
112+examples:
113+ - |
114+ #include <dt-bindings/interrupt-controller/irq.h>
115+ #include <dt-bindings/leds/common.h>
116+
117+ ledc: led-controller@2008000 {
118+ compatible = "allwinner,sun20i-d1-ledc",
119+ "allwinner,sun50i-a100-ledc";
120+ reg = <0x2008000 0x400>;
121+ interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
122+ clocks = <&ccu 12>, <&ccu 34>;
123+ clock-names = "bus", "mod";
124+ resets = <&ccu 12>;
125+ dmas = <&dma 42>;
126+ dma-names = "tx";
127+ #address-cells = <1>;
128+ #size-cells = <0>;
129+
130+ multi-led@0 {
131+ reg = <0x0>;
132+ color = <LED_COLOR_ID_RGB>;
133+ function = LED_FUNCTION_INDICATOR;
134+ };
135+ };
136+
137+...
Documentation/devicetree/bindings/leds/awinic,aw200xx.yaml+71−24
@@ -10,15 +10,19 @@ maintainers: · 9 unmodified lines
1010 - Martin Kurbanov <mmkurbanov@sberdevices.ru>
1111
1212 description: |
13− This controller is present on AW20036/AW20054/AW20072.
14− It is a 3x12/6x9/6x12 matrix LED programmed via
15− an I2C interface, up to 36/54/72 LEDs or 12/18/24 RGBs,
16− 3 pattern controllers for auto breathing or group dimming control.
13+ It is a matrix LED driver programmed via an I2C interface. Devices have
14+ a set of individually controlled leds and support 3 pattern controllers
15+ for auto breathing or group dimming control. Supported devices:
16+ - AW20036 (3x12) 36 LEDs
17+ - AW20054 (6x9) 54 LEDs
18+ - AW20072 (6x12) 72 LEDs
19+ - AW20108 (9x12) 108 LEDs
1720
1821 For more product information please see the link below:
1922 aw20036 - https://www.awinic.com/en/productDetail/AW20036QNR#tech-docs
2023 aw20054 - https://www.awinic.com/en/productDetail/AW20054QNR#tech-docs
2124 aw20072 - https://www.awinic.com/en/productDetail/AW20072QNR#tech-docs
25+ aw20108 - https://www.awinic.com/en/productDetail/AW20108QNR#tech-docs
2226
2327 properties:
2428 compatible:
@@ -26,6 +30,7 @@ properties: · 1 unmodified line
2630 - awinic,aw20036
2731 - awinic,aw20054
2832 - awinic,aw20072
33+ - awinic,aw20108
2934
3035 reg:
3136 maxItems: 1
@@ -36,13 +41,11 @@ properties: · 4 unmodified lines
3641 "#size-cells":
3742 const: 0
3843
39− awinic,display-rows:
40− $ref: /schemas/types.yaml#/definitions/uint32
41− description:
42− Leds matrix size
44+ enable-gpios:
45+ maxItems: 1
4346
4447 patternProperties:
45− "^led@[0-9a-f]$":
48+ "^led@[0-9a-f]+$":
4649 type: object
4750 $ref: common.yaml#
4851 unevaluatedProperties: false
@@ -60,16 +63,11 @@ patternProperties: · 11 unmodified lines
6063 since the chip has a single global setting.
6164 The maximum output current of each LED is calculated by the
6265 following formula:
63− IMAXled = 160000 * (592 / 600.5) * (1 / display-rows)
66+ IMAXled = 160000 * (592 / 600.5) * (1 / max-current-switch-number)
6467 And the minimum output current formula:
65− IMINled = 3300 * (592 / 600.5) * (1 / display-rows)
66−
67−required:
68− - compatible
69− - reg
70− - "#address-cells"
71− - "#size-cells"
72− - awinic,display-rows
68+ IMINled = 3300 * (592 / 600.5) * (1 / max-current-switch-number)
69+ where max-current-switch-number is determinated by led configuration
70+ and depends on how leds are physically connected to the led driver.
7371
7472 allOf:
7573 - if:
@@ -78,18 +76,67 @@ allOf: · 2 unmodified lines
7876 contains:
7977 const: awinic,aw20036
8078 then:
79+ patternProperties:
80+ "^led@[0-9a-f]+$":
81+ properties:
82+ reg:
83+ items:
84+ minimum: 0
85+ maximum: 36
86+
87+ - if:
8188 properties:
82− awinic,display-rows:
83− enum: [1, 2, 3]
84− else:
89+ compatible:
90+ contains:
91+ const: awinic,aw20054
92+ then:
93+ patternProperties:
94+ "^led@[0-9a-f]+$":
95+ properties:
96+ reg:
97+ items:
98+ minimum: 0
99+ maximum: 54
100+
101+ - if:
85102 properties:
86− awinic,display-rows:
87− enum: [1, 2, 3, 4, 5, 6, 7]
103+ compatible:
104+ contains:
105+ const: awinic,aw20072
106+ then:
107+ patternProperties:
108+ "^led@[0-9a-f]+$":
109+ properties:
110+ reg:
111+ items:
112+ minimum: 0
113+ maximum: 72
114+
115+ - if:
116+ properties:
117+ compatible:
118+ contains:
119+ const: awinic,aw20108
120+ then:
121+ patternProperties:
122+ "^led@[0-9a-f]+$":
123+ properties:
124+ reg:
125+ items:
126+ minimum: 0
127+ maximum: 108
128+
129+required:
130+ - compatible
131+ - reg
132+ - "#address-cells"
133+ - "#size-cells"
88134
89135 additionalProperties: false
90136
91137 examples:
92138 - |
139+ #include <dt-bindings/gpio/gpio.h>
93140 #include <dt-bindings/leds/common.h>
94141
95142 i2c {
@@ -101,7 +148,7 @@ examples: · 5 unmodified lines
101148 reg = <0x3a>;
102149 #address-cells = <1>;
103150 #size-cells = <0>;
104− awinic,display-rows = <3>;
151+ enable-gpios = <&gpio 3 GPIO_ACTIVE_HIGH>;
105152
106153 led@0 {
107154 reg = <0x0>;
Documentation/devicetree/bindings/leds/backlight/mps,mp3309c.yaml+4−6
@@ -14,8 +14,8 @@ description: | · 13 unmodified lines
1414 programmable switching frequency to optimize efficiency.
1515 It supports two different dimming modes:
1616
17− - analog mode, via I2C commands (default)
18− - PWM controlled mode.
17+ - analog mode, via I2C commands, as default mode (32 dimming levels)
18+ - PWM controlled mode (optional)
1919
2020 The datasheet is available at:
2121 https://www.monolithicpower.com/en/mp3309c.html
@@ -50,8 +50,6 @@ properties: · 28 unmodified lines
5050 required:
5151 - compatible
5252 - reg
53− - max-brightness
54− - default-brightness
5553
5654 unevaluatedProperties: false
5755
@@ -66,8 +64,8 @@ examples: · 8 unmodified lines
6664 compatible = "mps,mp3309c";
6765 reg = <0x17>;
6866 pwms = <&pwm1 0 3333333 0>; /* 300 Hz --> (1/f) * 1*10^9 */
69− max-brightness = <100>;
70− default-brightness = <80>;
67+ brightness-levels = <0 4 8 16 32 64 128 255>;
68+ default-brightness = <6>;
7169 mps,overvoltage-protection-microvolt = <24000000>;
7270 };
7371 };
Documentation/devicetree/bindings/leds/common.yaml+1−1
@@ -167,7 +167,7 @@ properties: · 166 unmodified lines
167167 Note that this flag is mainly used for PWM-LEDs, where it is not possible
168168 to map brightness to current. Drivers for other controllers should use
169169 led-max-microamp.
170− $ref: /schemas/types.yaml#definitions/uint32
170+ $ref: /schemas/types.yaml#/definitions/uint32
171171
172172 panic-indicator:
173173 description:
Documentation/devicetree/bindings/leds/qcom,spmi-flash-led.yaml+3−1
@@ -89,9 +89,11 @@ additionalProperties: false · 88 unmodified lines
8989 examples:
9090 - |
9191 #include <dt-bindings/leds/common.h>
92− spmi {
92+
93+ pmic {
9394 #address-cells = <1>;
9495 #size-cells = <0>;
96+
9597 led-controller@ee00 {
9698 compatible = "qcom,pm8350c-flash-led", "qcom,spmi-flash-led";
9799 reg = <0xee00>;
Documentation/devicetree/bindings/loongarch/cpus.yaml+61−0
@@ -0,0 +1,61 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/loongarch/cpus.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: LoongArch CPUs
8+
9+maintainers:
10+ - Binbin Zhou <zhoubinbin@loongson.cn>
11+
12+description:
13+ This document describes the list of LoongArch CPU cores that support FDT,
14+ it describe the layout of CPUs in a system through the "cpus" node.
15+
16+allOf:
17+ - $ref: /schemas/cpu.yaml#
18+
19+properties:
20+ compatible:
21+ enum:
22+ - loongson,la264
23+ - loongson,la364
24+
25+ reg:
26+ maxItems: 1
27+
28+ clocks:
29+ maxItems: 1
30+
31+required:
32+ - compatible
33+ - reg
34+ - clocks
35+
36+unevaluatedProperties: false
37+
38+examples:
39+ - |
40+ #include <dt-bindings/clock/loongson,ls2k-clk.h>
41+
42+ cpus {
43+ #size-cells = <0>;
44+ #address-cells = <1>;
45+
46+ cpu@0 {
47+ compatible = "loongson,la264";
48+ device_type = "cpu";
49+ reg = <0>;
50+ clocks = <&clk LOONGSON2_NODE_CLK>;
51+ };
52+
53+ cpu@1 {
54+ compatible = "loongson,la264";
55+ device_type = "cpu";
56+ reg = <1>;
57+ clocks = <&clk LOONGSON2_NODE_CLK>;
58+ };
59+ };
60+
61+...
Documentation/devicetree/bindings/loongarch/loongson.yaml+34−0
@@ -0,0 +1,34 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/loongarch/loongson.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Loongson SoC-based boards
8+
9+maintainers:
10+ - Binbin Zhou <zhoubinbin@loongson.cn>
11+
12+properties:
13+ $nodename:
14+ const: '/'
15+ compatible:
16+ oneOf:
17+ - description: Loongson-2K0500 processor based boards
18+ items:
19+ - const: loongson,ls2k0500-ref
20+ - const: loongson,ls2k0500
21+
22+ - description: Loongson-2K1000 processor based boards
23+ items:
24+ - const: loongson,ls2k1000-ref
25+ - const: loongson,ls2k1000
26+
27+ - description: Loongson-2K2000 processor based boards
28+ items:
29+ - const: loongson,ls2k2000-ref
30+ - const: loongson,ls2k2000
31+
32+additionalProperties: true
33+
34+...
Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml+43−19
@@ -23,6 +23,24 @@ properties: · 22 unmodified lines
2323 - qcom,ipq8074-apcs-apps-global
2424 - qcom,ipq9574-apcs-apps-global
2525 - const: qcom,ipq6018-apcs-apps-global
26+ - items:
27+ - enum:
28+ - qcom,qcs404-apcs-apps-global
29+ - const: qcom,msm8916-apcs-kpss-global
30+ - const: syscon
31+ - items:
32+ - enum:
33+ - qcom,msm8976-apcs-kpss-global
34+ - const: qcom,msm8994-apcs-kpss-global
35+ - const: syscon
36+ - items:
37+ - enum:
38+ - qcom,msm8998-apcs-hmss-global
39+ - qcom,sdm660-apcs-hmss-global
40+ - qcom,sm4250-apcs-hmss-global
41+ - qcom,sm6115-apcs-hmss-global
42+ - qcom,sm6125-apcs-hmss-global
43+ - const: qcom,msm8994-apcs-kpss-global
2644 - items:
2745 - enum:
2846 - qcom,sc7180-apss-shared
@@ -34,22 +52,14 @@ properties: · 5 unmodified lines
3452 - qcom,msm8916-apcs-kpss-global
3553 - qcom,msm8939-apcs-kpss-global
3654 - qcom,msm8953-apcs-kpss-global
37− - qcom,msm8976-apcs-kpss-global
3855 - qcom,msm8994-apcs-kpss-global
39− - qcom,qcs404-apcs-apps-global
4056 - qcom,sdx55-apcs-gcc
4157 - const: syscon
4258 - enum:
4359 - qcom,ipq6018-apcs-apps-global
44− - qcom,ipq8074-apcs-apps-global
4560 - qcom,msm8996-apcs-hmss-global
46− - qcom,msm8998-apcs-hmss-global
4761 - qcom,qcm2290-apcs-hmss-global
48− - qcom,sdm660-apcs-hmss-global
4962 - qcom,sdm845-apss-shared
50− - qcom,sm4250-apcs-hmss-global
51− - qcom,sm6115-apcs-hmss-global
52− - qcom,sm6125-apcs-hmss-global
5363
5464 reg:
5565 maxItems: 1
@@ -80,20 +90,38 @@ allOf: · 24 unmodified lines
8090 - if:
8191 properties:
8292 compatible:
83− enum:
84− - qcom,msm8916-apcs-kpss-global
85− - qcom,msm8939-apcs-kpss-global
86− - qcom,qcs404-apcs-apps-global
93+ contains:
94+ enum:
95+ - qcom,msm8916-apcs-kpss-global
96+ then:
97+ properties:
98+ clocks:
99+ items:
100+ - description: primary pll parent of the clock driver
101+ - description: auxiliary parent
102+ clock-names:
103+ items:
104+ - const: pll
105+ - const: aux
106+
107+ - if:
108+ properties:
109+ compatible:
110+ contains:
111+ enum:
112+ - qcom,msm8939-apcs-kpss-global
87113 then:
88114 properties:
89115 clocks:
90116 items:
91117 - description: primary pll parent of the clock driver
92118 - description: auxiliary parent
119+ - description: reference clock
93120 clock-names:
94121 items:
95122 - const: pll
96123 - const: aux
124+ - const: ref
97125
98126 - if:
99127 properties:
@@ -113,6 +141,7 @@ allOf: · 13 unmodified lines
113141 - const: ref
114142 - const: pll
115143 - const: aux
144+
116145 - if:
117146 properties:
118147 compatible:
@@ -137,16 +166,10 @@ allOf: · 18 unmodified lines
137166 compatible:
138167 enum:
139168 - qcom,msm8953-apcs-kpss-global
140− - qcom,msm8976-apcs-kpss-global
141169 - qcom,msm8994-apcs-kpss-global
142170 - qcom,msm8996-apcs-hmss-global
143− - qcom,msm8998-apcs-hmss-global
144171 - qcom,qcm2290-apcs-hmss-global
145− - qcom,sdm660-apcs-hmss-global
146172 - qcom,sdm845-apss-shared
147− - qcom,sm4250-apcs-hmss-global
148− - qcom,sm6115-apcs-hmss-global
149− - qcom,sm6125-apcs-hmss-global
150173 then:
151174 properties:
152175 clocks: false
@@ -192,7 +215,8 @@ examples: · 39 unmodified lines
192215 #define GCC_APSS_AHB_CLK_SRC 1
193216 #define GCC_GPLL0_AO_OUT_MAIN 123
194217 apcs: mailbox@b011000 {
195− compatible = "qcom,qcs404-apcs-apps-global", "syscon";
218+ compatible = "qcom,qcs404-apcs-apps-global",
219+ "qcom,msm8916-apcs-kpss-global", "syscon";
196220 reg = <0x0b011000 0x1000>;
197221 #mbox-cells = <1>;
198222 clocks = <&apcs_hfpll>, <&gcc GCC_GPLL0_AO_OUT_MAIN>;
Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml+1−0
@@ -35,6 +35,7 @@ properties: · 34 unmodified lines
3535 - qcom,sm8450-ipcc
3636 - qcom,sm8550-ipcc
3737 - qcom,sm8650-ipcc
38+ - qcom,x1e80100-ipcc
3839 - const: qcom,ipcc
3940
4041 reg:
Documentation/devicetree/bindings/mailbox/xlnx,zynqmp-ipi-mailbox.yaml+119−13
@@ -37,7 +37,9 @@ maintainers: · 36 unmodified lines
3737
3838 properties:
3939 compatible:
40− const: xlnx,zynqmp-ipi-mailbox
40+ enum:
41+ - xlnx,zynqmp-ipi-mailbox
42+ - xlnx,versal-ipi-mailbox
4143
4244 method:
4345 description: |
@@ -58,6 +60,12 @@ properties: · 14 unmodified lines
5860 '#size-cells':
5961 const: 2
6062
63+ reg:
64+ maxItems: 2
65+
66+ reg-names:
67+ maxItems: 2
68+
6169 xlnx,ipi-id:
6270 description: |
6371 Remote Xilinx IPI agent ID of which the mailbox is connected to.
@@ -76,7 +84,17 @@ patternProperties: · 12 unmodified lines
7684 properties:
7785
7886 compatible:
79− const: xlnx,zynqmp-ipi-dest-mailbox
87+ enum:
88+ - xlnx,zynqmp-ipi-dest-mailbox
89+ - xlnx,versal-ipi-dest-mailbox
90+
91+ reg:
92+ minItems: 1
93+ maxItems: 4
94+
95+ reg-names:
96+ minItems: 1
97+ maxItems: 4
8098
8199 xlnx,ipi-id:
82100 description:
@@ -88,23 +106,44 @@ patternProperties: · 5 unmodified lines
88106 description:
89107 It contains tx(0) or rx(1) channel IPI id number.
90108
91− reg:
92− maxItems: 4
93−
94− reg-names:
95− items:
96− - const: local_request_region
97− - const: local_response_region
98− - const: remote_request_region
99− - const: remote_response_region
109+ allOf:
110+ - if:
111+ properties:
112+ compatible:
113+ contains:
114+ enum:
115+ - xlnx,zynqmp-ipi-dest-mailbox
116+ then:
117+ properties:
118+ reg:
119+ maxItems: 4
120+
121+ reg-names:
122+ items:
123+ - const: local_request_region
124+ - const: local_response_region
125+ - const: remote_request_region
126+ - const: remote_response_region
127+ else:
128+ properties:
129+ reg:
130+ minItems: 1
131+ items:
132+ - description: Remote IPI agent control register region
133+ - description: Remote IPI agent optional message buffers
134+
135+ reg-names:
136+ minItems: 1
137+ items:
138+ - const: ctrl
139+ - const: msg
100140
101141 required:
102142 - compatible
103143 - reg
104144 - reg-names
105145 - "#mbox-cells"
106−
107−additionalProperties: false
146+ - xlnx,ipi-id
108147
109148 required:
110149 - compatible
@@ -113,6 +152,36 @@ required: · 2 unmodified lines
113152 - '#size-cells'
114153 - xlnx,ipi-id
115154
155+allOf:
156+ - if:
157+ properties:
158+ compatible:
159+ contains:
160+ enum:
161+ - xlnx,zynqmp-ipi-mailbox
162+ then:
163+ properties:
164+ reg: false
165+ reg-names: false
166+
167+ else:
168+ properties:
169+ reg:
170+ items:
171+ - description: Host IPI agent control register region
172+ - description: Host IPI agent optional message buffers
173+
174+ reg-names:
175+ items:
176+ - const: ctrl
177+ - const: msg
178+
179+ required:
180+ - reg
181+ - reg-names
182+
183+additionalProperties: false
184+
116185 examples:
117186 - |
118187 #include<dt-bindings/interrupt-controller/arm-gic.h>
@@ -144,4 +213,41 @@ examples: · 25 unmodified lines
144213 };
145214 };
146215
216+ - |
217+ #include<dt-bindings/interrupt-controller/arm-gic.h>
218+
219+ bus {
220+ #address-cells = <2>;
221+ #size-cells = <2>;
222+ mailbox@ff300000 {
223+ compatible = "xlnx,versal-ipi-mailbox";
224+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
225+ #address-cells = <2>;
226+ #size-cells = <2>;
227+ reg = <0x0 0xff300000 0x0 0x1000>,
228+ <0x0 0xff990000 0x0 0x1ff>;
229+ reg-names = "ctrl", "msg";
230+ xlnx,ipi-id = <0>;
231+ ranges;
232+
233+ /* buffered IPI */
234+ mailbox@ff340000 {
235+ compatible = "xlnx,versal-ipi-dest-mailbox";
236+ reg = <0x0 0xff340000 0x0 0x1000>,
237+ <0x0 0xff990400 0x0 0x1ff>;
238+ reg-names = "ctrl", "msg";
239+ #mbox-cells = <1>;
240+ xlnx,ipi-id = <4>;
241+ };
242+
243+ /* bufferless IPI */
244+ mailbox@ff370000 {
245+ compatible = "xlnx,versal-ipi-dest-mailbox";
246+ reg = <0x0 0xff370000 0x0 0x1000>;
247+ reg-names = "ctrl";
248+ #mbox-cells = <1>;
249+ xlnx,ipi-id = <7>;
250+ };
251+ };
252+ };
147253 ...
Documentation/devicetree/bindings/media/cnm,wave521c.yaml+61−0
@@ -0,0 +1,61 @@
1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/media/cnm,wave521c.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Chips&Media Wave 5 Series multi-standard codec IP
8+
9+maintainers:
10+ - Nas Chung <nas.chung@chipsnmedia.com>
11+ - Jackson Lee <jackson.lee@chipsnmedia.com>
12+
13+description:
14+ The Chips&Media WAVE codec IP is a multi format video encoder/decoder
15+
16+properties:
17+ compatible:
18+ items:
19+ - enum:
20+ - ti,k3-j721s2-wave521c
21+ - const: cnm,wave521c
22+
23+ reg:
24+ maxItems: 1
25+
26+ clocks:
27+ items:
28+ - description: VCODEC clock
29+
30+ interrupts:
31+ maxItems: 1
32+
33+ power-domains:
34+ maxItems: 1
35+
36+ resets:
37+ maxItems: 1
38+
39+ sram:
40+ $ref: /schemas/types.yaml#/definitions/phandle
41+ description:
42+ The VPU uses the SRAM to store some of the reference data instead of
43+ storing it on DMA memory. It is mainly used for the purpose of reducing
44+ bandwidth.
45+
46+required:
47+ - compatible
48+ - reg
49+ - clocks
50+
51+additionalProperties: false
52+
53+examples:
54+ - |
55+ vpu: video-codec@12345678 {
56+ compatible = "ti,k3-j721s2-wave521c", "cnm,wave521c";
57+ reg = <0x12345678 0x1000>;
58+ clocks = <&clks 42>;
59+ interrupts = <42>;
60+ sram = <&sram>;
61+ };
Documentation/devicetree/bindings/media/i2c/alliedvision,alvium-csi2.yaml+81−0
@@ -0,0 +1,81 @@
1+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/media/i2c/alliedvision,alvium-csi2.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Allied Vision Alvium Camera
8+
9+maintainers:
10+ - Tommaso Merciai <tomm.merciai@gmail.com>
11+ - Martin Hecht <martin.hecht@avnet.eu>
12+
13+allOf:
14+ - $ref: /schemas/media/video-interface-devices.yaml#
15+
16+properties:
17+ compatible:
18+ const: alliedvision,alvium-csi2
19+
20+ reg:
21+ maxItems: 1
22+
23+ vcc-ext-in-supply:
24+ description: |
25+ The regulator that supplies power to the VCC_EXT_IN pins.
26+
27+ port:
28+ description: Digital Output Port
29+ $ref: /schemas/graph.yaml#/$defs/port-base
30+ additionalProperties: false
31+
32+ properties:
33+ endpoint:
34+ $ref: /schemas/media/video-interfaces.yaml#
35+ unevaluatedProperties: false
36+
37+ properties:
38+ link-frequencies: true
39+
40+ data-lanes:
41+ minItems: 1
42+ items:
43+ - const: 1
44+ - const: 2
45+ - const: 3
46+ - const: 4
47+
48+ required:
49+ - data-lanes
50+ - link-frequencies
51+
52+required:
53+ - compatible
54+ - reg
55+ - vcc-ext-in-supply
56+ - port
57+
58+additionalProperties: false
59+
60+examples:
61+ - |
62+ i2c {
63+ #address-cells = <1>;
64+ #size-cells = <0>;
65+
66+ alvium: camera@3c {
67+ compatible = "alliedvision,alvium-csi2";
68+ reg = <0x3c>;
69+ vcc-ext-in-supply = <&reg_vcc_ext_in>;
70+
71+ port {
72+ alvium_out: endpoint {
73+ remote-endpoint = <&mipi_csi_0_in>;
74+ data-lanes = <1 2 3 4>;
75+ link-frequencies = /bits/ 64 <681250000>;
76+ };
77+ };
78+ };
79+ };
80+
81+...
Documentation/devicetree/bindings/media/i2c/asahi-kasei,ak7375.yaml+3−1
@@ -15,7 +15,9 @@ description: · 14 unmodified lines
1515
1616 properties:
1717 compatible:
18− const: asahi-kasei,ak7375
18+ enum:
19+ - asahi-kasei,ak7345
20+ - asahi-kasei,ak7375
1921
2022 reg:
2123 maxItems: 1
Documentation/devicetree/bindings/media/i2c/galaxycore,gc0308.yaml+108−0
@@ -0,0 +1,108 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/media/i2c/galaxycore,gc0308.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Galaxycore GC0308 and GC0309 Image Sensors
8+
9+maintainers:
10+ - Sebastian Reichel <sre@kernel.org>
11+
12+description: |
13+ The GalaxyCore GC0308 (1/6.5") and GC0309 (1/9") are 640x480 VGA sensors
14+ programmable through an I2C interface and connected via parallel bus.
15+ They include an ISP capable of auto exposure and auto white balance.
16+
17+allOf:
18+ - $ref: ../video-interface-devices.yaml#
19+
20+properties:
21+ compatible:
22+ oneOf:
23+ - const: galaxycore,gc0308
24+ - items:
25+ - const: galaxycore,gc0309
26+ - const: galaxycore,gc0308
27+
28+ reg:
29+ const: 0x21
30+
31+ clocks:
32+ description: Reference to the xclk clock.
33+ maxItems: 1
34+
35+ reset-gpios:
36+ description: GPIO descriptor for the reset pin.
37+ maxItems: 1
38+
39+ powerdown-gpios:
40+ description: GPIO descriptor for the powerdown pin.
41+ maxItems: 1
42+
43+ vdd28-supply:
44+ description: 2.8V supply
45+
46+ port:
47+ $ref: /schemas/graph.yaml#/$defs/port-base
48+ description: |
49+ Video output port.
50+
51+ properties:
52+ endpoint:
53+ $ref: /schemas/media/video-interfaces.yaml#
54+ unevaluatedProperties: false
55+
56+ properties:
57+ bus-width: true
58+ data-shift: true
59+ hsync-active: true
60+ vsync-active: true
61+ data-active: true
62+ pclk-sample: true
63+
64+ required:
65+ - bus-width
66+
67+ additionalProperties: false
68+
69+required:
70+ - compatible
71+ - reg
72+ - clocks
73+ - powerdown-gpios
74+ - port
75+
76+additionalProperties: false
77+
78+examples:
79+ - |
80+ #include <dt-bindings/gpio/gpio.h>
81+
82+ i2c {
83+ #address-cells = <1>;
84+ #size-cells = <0>;
85+
86+ camera-sensor@21 {
87+ compatible = "galaxycore,gc0308";
88+ reg = <0x21>;
89+ clocks = <&camera_clk>;
90+ powerdown-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
91+ reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
92+ vdd28-supply = <&vdd28>;
93+
94+ port {
95+ gc0308_ep: endpoint {
96+ remote-endpoint = <&parallel_from_gc0308>;
97+ bus-width = <8>;
98+ data-shift = <2>; /* lines 9:2 are used */
99+ hsync-active = <1>; /* active high */
100+ vsync-active = <1>; /* active high */
101+ data-active = <1>; /* active high */
102+ pclk-sample = <1>; /* sample on rising edge */
103+ };
104+ };
105+ };
106+ };
107+
108+...
Documentation/devicetree/bindings/media/i2c/galaxycore,gc2145.yaml+113−0
@@ -0,0 +1,113 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/media/i2c/galaxycore,gc2145.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Galaxy Core 1/5'' UXGA CMOS Image Sensor
8+
9+maintainers:
10+ - Alain Volmat <alain.volmat@foss.st.com>
11+
12+description:
13+ The Galaxy Core GC2145 is a 2 Megapixel CMOS image sensor, for mobile
14+ phone camera applications and digital camera products. GC2145 incorporates a
15+ 1616V x 1232H active pixel array, on-chip 10-bit ADC, and image signal
16+ processor allowing AE/AWB/interpolation/de-noise/color-conversion and
17+ gamma correction. Bayer RGB, RGB565 and YCbCr 4:2:2 can be provided by the
18+ sensor. It is programmable through an I2C interface. Image data is sent
19+ either through a parallel interface or through MIPI CSI-2.
20+
21+allOf:
22+ - $ref: ../video-interface-devices.yaml#
23+
24+properties:
25+ compatible:
26+ const: galaxycore,gc2145
27+
28+ reg:
29+ const: 0x3c
30+
31+ clocks:
32+ maxItems: 1
33+
34+ powerdown-gpios:
35+ maxItems: 1
36+
37+ reset-gpios:
38+ maxItems: 1
39+
40+ iovdd-supply:
41+ description: Power Supply for I/O circuits (1.7 - 3V).
42+
43+ avdd-supply:
44+ description: Power for analog circuit/sensor array (2.7 - 3V).
45+
46+ dvdd-supply:
47+ description: Power for digital core (1.7 - 1.9V).
48+
49+ orientation: true
50+
51+ rotation: true
52+
53+ port:
54+ $ref: /schemas/graph.yaml#/$defs/port-base
55+
56+ properties:
57+ endpoint:
58+ $ref: /schemas/media/video-interfaces.yaml#
59+ unevaluatedProperties: false
60+
61+ properties:
62+ link-frequencies: true
63+
64+ required:
65+ - link-frequencies
66+
67+ required:
68+ - endpoint
69+
70+ additionalProperties: false
71+
72+required:
73+ - compatible
74+ - reg
75+ - clocks
76+ - powerdown-gpios
77+ - reset-gpios
78+ - iovdd-supply
79+ - avdd-supply
80+ - dvdd-supply
81+ - port
82+
83+additionalProperties: false
84+
85+examples:
86+ - |
87+ #include <dt-bindings/gpio/gpio.h>
88+
89+ i2c {
90+ #address-cells = <1>;
91+ #size-cells = <0>;
92+
93+ camera@3c {
94+ compatible = "galaxycore,gc2145";
95+ reg = <0x3c>;
96+ clocks = <&clk_ext_camera>;
97+ iovdd-supply = <&scmi_v3v3_sw>;
98+ avdd-supply = <&scmi_v3v3_sw>;
99+ dvdd-supply = <&scmi_v3v3_sw>;
100+ powerdown-gpios = <&mcp23017 3 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;
101+ reset-gpios = <&mcp23017 4 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;
102+
103+ port {
104+ endpoint {
105+ remote-endpoint = <&mipid02_0>;
106+ data-lanes = <1 2>;
107+ link-frequencies = /bits/ 64 <120000000 192000000 240000000>;
108+ };
109+ };
110+ };
111+ };
112+
113+...
Documentation/devicetree/bindings/media/i2c/ov8856.yaml+11−13
@@ -67,19 +67,17 @@ properties: · 66 unmodified lines
6767
6868 properties:
6969 data-lanes:
70− description: |-
71− The driver only supports four-lane operation.
72− items:
73− - const: 1
74− - const: 2
75− - const: 3
76− - const: 4
77−
78− link-frequencies:
79− description: Frequencies listed are driver, not h/w limitations.
80− maxItems: 2
81− items:
82− enum: [ 360000000, 180000000 ]
70+ oneOf:
71+ - items:
72+ - const: 1
73+ - items:
74+ - const: 1
75+ - const: 2
76+ - items:
77+ - const: 1
78+ - const: 2
79+ - const: 3
80+ - const: 4
8381
8482 required:
8583 - link-frequencies
Documentation/devicetree/bindings/media/i2c/ovti,ov64a40.yaml+103−0
@@ -0,0 +1,103 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/media/i2c/ovti,ov64a40.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: OmniVision OV64A40 Image Sensor
8+
9+maintainers:
10+ - Jacopo Mondi <jacopo.mondi@ideasonboard.com>
11+
12+allOf:
13+ - $ref: /schemas/media/video-interface-devices.yaml#
14+
15+properties:
16+ compatible:
17+ const: ovti,ov64a40
18+
19+ reg:
20+ maxItems: 1
21+
22+ clocks:
23+ maxItems: 1
24+
25+ avdd-supply:
26+ description: Analog voltage supply, 2.8 volts
27+
28+ dvdd-supply:
29+ description: Digital core voltage supply, 1.1 volts
30+
31+ dovdd-supply:
32+ description: Digital I/O voltage supply, 1.8 volts
33+
34+ powerdown-gpios:
35+ maxItems: 1
36+
37+ reset-gpios:
38+ maxItems: 1
39+
40+ port:
41+ $ref: /schemas/graph.yaml#/$defs/port-base
42+ additionalProperties: false
43+
44+ properties:
45+ endpoint:
46+ $ref: /schemas/media/video-interfaces.yaml#
47+ additionalProperties: false
48+
49+ properties:
50+ bus-type:
51+ enum:
52+ - 1 # MIPI CSI-2 C-PHY
53+ - 4 # MIPI CSI-2 D-PHY
54+ data-lanes: true
55+ link-frequencies: true
56+ clock-noncontinuous: true
57+ remote-endpoint: true
58+
59+ required:
60+ - bus-type
61+ - data-lanes
62+ - link-frequencies
63+
64+required:
65+ - compatible
66+ - reg
67+ - clocks
68+ - port
69+
70+unevaluatedProperties: false
71+
72+examples:
73+ - |
74+ #include <dt-bindings/gpio/gpio.h>
75+
76+ i2c {
77+ #address-cells = <1>;
78+ #size-cells = <0>;
79+
80+ camera@36 {
81+ compatible = "ovti,ov64a40";
82+ reg = <0x36>;
83+ clocks = <&camera_clk>;
84+ dovdd-supply = <&vgen4_reg>;
85+ avdd-supply = <&vgen3_reg>;
86+ dvdd-supply = <&vgen2_reg>;
87+ powerdown-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
88+ reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
89+ rotation = <180>;
90+ orientation = <2>;
91+
92+ port {
93+ endpoint {
94+ remote-endpoint = <&mipi_csi2_in>;
95+ bus-type = <4>;
96+ data-lanes = <1 2 3 4>;
97+ link-frequencies = /bits/ 64 <456000000>;
98+ };
99+ };
100+ };
101+ };
102+
103+...
Documentation/devicetree/bindings/media/i2c/sony,imx335.yaml+13−0
@@ -32,6 +32,15 @@ properties: · 31 unmodified lines
3232 description: Clock frequency from 6 to 27 MHz, 37.125MHz, 74.25MHz
3333 maxItems: 1
3434
35+ avdd-supply:
36+ description: Analog power supply (2.9V)
37+
38+ ovdd-supply:
39+ description: Interface power supply (1.8V)
40+
41+ dvdd-supply:
42+ description: Digital power supply (1.2V)
43+
3544 reset-gpios:
3645 description: Reference to the GPIO connected to the XCLR pin, if any.
3746 maxItems: 1
@@ -79,6 +88,10 @@ examples: · 41 unmodified lines
7988 assigned-clock-parents = <&imx335_clk_parent>;
8089 assigned-clock-rates = <24000000>;
8190
91+ avdd-supply = <&camera_vdda_2v9>;
92+ ovdd-supply = <&camera_vddo_1v8>;
93+ dvdd-supply = <&camera_vddd_1v2>;
94+
8295 port {
8396 imx335: endpoint {
8497 remote-endpoint = <&cam>;
Documentation/devicetree/bindings/media/i2c/techwell,tw9900.yaml+137−0
@@ -0,0 +1,137 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/media/i2c/techwell,tw9900.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Techwell TW9900 NTSC/PAL video decoder
8+
9+maintainers:
10+ - Mehdi Djait <mehdi.djait@bootlin.com>
11+
12+description:
13+ The tw9900 is a multi-standard video decoder, supporting NTSC, PAL standards
14+ with auto-detection features.
15+
16+properties:
17+ compatible:
18+ const: techwell,tw9900
19+
20+ reg:
21+ maxItems: 1
22+
23+ vdd-supply:
24+ description: VDD power supply
25+
26+ reset-gpios:
27+ description: GPIO descriptor for the RESET input pin
28+ maxItems: 1
29+
30+ powerdown-gpios:
31+ description: GPIO descriptor for the POWERDOWN input pin
32+ maxItems: 1
33+
34+ ports:
35+ $ref: /schemas/graph.yaml#/properties/ports
36+
37+ properties:
38+ port@0:
39+ $ref: /schemas/graph.yaml#/$defs/port-base
40+ description: Analog input port
41+
42+ properties:
43+ endpoint@0:
44+ $ref: /schemas/graph.yaml#/properties/endpoint
45+ description: CVBS over MUX0
46+
47+ endpoint@1:
48+ $ref: /schemas/graph.yaml#/properties/endpoint
49+ description: CVBS over MUX1
50+
51+ endpoint@2:
52+ $ref: /schemas/graph.yaml#/properties/endpoint
53+ description: Chroma over CIN0 and Y over MUX0
54+
55+ endpoint@3:
56+ $ref: /schemas/graph.yaml#/properties/endpoint
57+ description: Chroma over CIN0 and Y over MUX1
58+
59+ oneOf:
60+ - required:
61+ - endpoint@0
62+ - required:
63+ - endpoint@1
64+ - required:
65+ - endpoint@2
66+ - required:
67+ - endpoint@3
68+
69+ port@1:
70+ $ref: /schemas/graph.yaml#/properties/port
71+ description: Video port for the decoder output.
72+
73+
74+ required:
75+ - port@0
76+ - port@1
77+
78+required:
79+ - compatible
80+ - ports
81+ - reg
82+ - vdd-supply
83+
84+additionalProperties: false
85+
86+examples:
87+ - |
88+ #include <dt-bindings/display/sdtv-standards.h>
89+ #include <dt-bindings/gpio/gpio.h>
90+
91+ composite_connector {
92+ compatible = "composite-video-connector";
93+ label = "tv";
94+ sdtv-standards = <(SDTV_STD_PAL | SDTV_STD_NTSC)>;
95+
96+ port {
97+ composite_to_tw9900: endpoint {
98+ remote-endpoint = <&tw9900_to_composite>;
99+ };
100+ };
101+ };
102+
103+ i2c {
104+ #address-cells = <1>;
105+ #size-cells = <0>;
106+
107+ video-decoder@44 {
108+ compatible = "techwell,tw9900";
109+ reg = <0x44>;
110+
111+ vdd-supply = <&tw9900_supply>;
112+ reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
113+
114+ ports {
115+ #address-cells = <1>;
116+ #size-cells = <0>;
117+
118+ port@0 {
119+ #address-cells = <1>;
120+ #size-cells = <0>;
121+
122+ reg = <0>;
123+ tw9900_to_composite: endpoint@0 {
124+ reg = <0>;
125+ remote-endpoint = <&composite_to_tw9900>;
126+ };
127+ };
128+
129+ port@1 {
130+ reg = <1>;
131+ endpoint {
132+ remote-endpoint = <&cif_in>;
133+ };
134+ };
135+ };
136+ };
137+ };
Documentation/devicetree/bindings/media/i2c/thine,thp7312.yaml+224−0
@@ -0,0 +1,224 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+# Copyright (c) 2023 Ideas on Board
3+%YAML 1.2
4+---
5+$id: http://devicetree.org/schemas/media/i2c/thine,thp7312.yaml#
6+$schema: http://devicetree.org/meta-schemas/core.yaml#
7+
8+title: THine THP7312
9+
10+maintainers:
11+ - Paul Elder <paul.elder@@ideasonboard.com>
12+
13+description:
14+ The THP7312 is a standalone ISP controlled over i2c, and is capable of
15+ various image processing and correction functions, including 3A control. It
16+ can be connected to CMOS image sensors from various vendors, supporting both
17+ MIPI CSI-2 and parallel interfaces. It can also output on either MIPI CSI-2
18+ or parallel. The hardware is capable of transmitting and receiving MIPI
19+ interlaved data strams with data types or multiple virtual channel
20+ identifiers.
21+
22+allOf:
23+ - $ref: /schemas/media/video-interface-devices.yaml#
24+
25+properties:
26+ compatible:
27+ const: thine,thp7312
28+
29+ reg:
30+ maxItems: 1
31+
32+ clocks:
33+ maxItems: 1
34+ description: CLKI clock input
35+
36+ thine,boot-mode:
37+ $ref: /schemas/types.yaml#/definitions/uint32
38+ minimum: 0
39+ maximum: 1
40+ default: 1
41+ description:
42+ Boot mode of the THP7312, reflecting the value of the BOOT[0] pin strap.
43+ 0 is for the SPI/2-wire slave boot, 1 is for the SPI master boot (from
44+ external flash ROM).
45+
46+ reset-gpios:
47+ maxItems: 1
48+ description:
49+ Reference to the GPIO connected to the RESET_N pin, if any.
50+ Must be released (set high) after all supplies are applied.
51+
52+ vddcore-supply:
53+ description:
54+ 1.2V supply for core, PLL, MIPI rx and MIPI tx.
55+
56+ vhtermrx-supply:
57+ description:
58+ Supply for input (RX). 1.8V for MIPI, or 1.8/2.8/3.3V for parallel.
59+
60+ vddtx-supply:
61+ description:
62+ Supply for output (TX). 1.8V for MIPI, or 1.8/2.8/3.3V for parallel.
63+
64+ vddhost-supply:
65+ description:
66+ Supply for host interface. 1.8V, 2.8V, or 3.3V.
67+
68+ vddcmos-supply:
69+ description:
70+ Supply for sensor interface. 1.8V, 2.8V, or 3.3V.
71+
72+ vddgpio-0-supply:
73+ description:
74+ Supply for GPIO_0. 1.8V, 2.8V, or 3.3V.
75+
76+ vddgpio-1-supply:
77+ description:
78+ Supply for GPIO_1. 1.8V, 2.8V, or 3.3V.
79+
80+ orientation: true
81+ rotation: true
82+
83+ port:
84+ $ref: /schemas/graph.yaml#/$defs/port-base
85+ additionalProperties: false
86+
87+ properties:
88+ endpoint:
89+ $ref: /schemas/media/video-interfaces.yaml#
90+ unevaluatedProperties: false
91+
92+ properties:
93+ bus-type:
94+ const: 4 # CSI-2 D-PHY
95+
96+ data-lanes:
97+ description:
98+ This property is for lane reordering between the THP7312 and the
99+ SoC. The sensor supports either two-lane, or four-lane operation.
100+ If this property is omitted four-lane operation is assumed. For
101+ two-lane operation the property must be set to <1 2>.
102+ minItems: 2
103+ maxItems: 4
104+ items:
105+ maximum: 4
106+
107+ sensors:
108+ type: object
109+ description: List of connected sensors
110+
111+ properties:
112+ "#address-cells":
113+ const: 1
114+
115+ "#size-cells":
116+ const: 0
117+
118+ patternProperties:
119+ "^sensor@[01]$":
120+ type: object
121+ description:
122+ Sensors connected to the first and second input, with one node per
123+ sensor.
124+
125+ properties:
126+ thine,model:
127+ $ref: /schemas/types.yaml#/definitions/string
128+ description:
129+ Model of the connected sensors. Must be a valid compatible string.
130+
131+ reg:
132+ description: THP7312 input port number
133+ items:
134+ - maximum: 1
135+
136+ data-lanes:
137+ $ref: /schemas/media/video-interfaces.yaml#/properties/data-lanes
138+ items:
139+ maxItems: 4
140+ description:
141+ This property is for lane reordering between the THP7312 and the imaging
142+ sensor that it is connected to.
143+
144+ required:
145+ - reg
146+ - data-lanes
147+
148+ additionalProperties: false
149+
150+ required:
151+ - "#address-cells"
152+ - "#size-cells"
153+
154+ additionalProperties: false
155+
156+required:
157+ - compatible
158+ - reg
159+ - reset-gpios
160+ - clocks
161+ - vddcore-supply
162+ - vhtermrx-supply
163+ - vddtx-supply
164+ - vddhost-supply
165+ - vddcmos-supply
166+ - vddgpio-0-supply
167+ - vddgpio-1-supply
168+ - sensors
169+ - port
170+
171+additionalProperties: false
172+
173+examples:
174+ - |
175+ #include <dt-bindings/gpio/gpio.h>
176+ #include <dt-bindings/media/video-interfaces.h>
177+
178+ i2c {
179+ #address-cells = <1>;
180+ #size-cells = <0>;
181+
182+ camera@61 {
183+ compatible = "thine,thp7312";
184+ reg = <0x61>;
185+
186+ pinctrl-names = "default";
187+ pinctrl-0 = <&cam1_pins_default>;
188+
189+ reset-gpios = <&pio 119 GPIO_ACTIVE_LOW>;
190+ clocks = <&camera61_clk>;
191+
192+ vddcore-supply = <&vsys_v4p2>;
193+ vhtermrx-supply = <&vsys_v4p2>;
194+ vddtx-supply = <&vsys_v4p2>;
195+ vddhost-supply = <&vsys_v4p2>;
196+ vddcmos-supply = <&vsys_v4p2>;
197+ vddgpio-0-supply = <&vsys_v4p2>;
198+ vddgpio-1-supply = <&vsys_v4p2>;
199+
200+ orientation = <0>;
201+ rotation = <0>;
202+
203+ sensors {
204+ #address-cells = <1>;
205+ #size-cells = <0>;
206+
207+ sensor@0 {
208+ thine,model = "sony,imx258";
209+ reg = <0>;
210+
211+ data-lanes = <4 1 3 2>;
212+ };
213+ };
214+
215+ port {
216+ thp7312_2_endpoint: endpoint {
217+ remote-endpoint = <&mipi_thp7312_2>;
218+ bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>;
219+ data-lanes = <4 2 1 3>;
220+ };
221+ };
222+ };
223+ };
224+...
Documentation/devicetree/bindings/media/mediatek,mdp3-fg.yaml+61−0
@@ -0,0 +1,61 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/media/mediatek,mdp3-fg.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: MediaTek Media Data Path 3 Film Grain
8+
9+maintainers:
10+ - Matthias Brugger <matthias.bgg@gmail.com>
11+ - Moudy Ho <moudy.ho@mediatek.com>
12+
13+description:
14+ Film Grain (FG) is a Media Data Path 3 (MDP3) component used to add
15+ the film grain according to the AOMedia Video 1 (AV1) standard.
16+
17+properties:
18+ compatible:
19+ enum:
20+ - mediatek,mt8195-mdp3-fg
21+
22+ reg:
23+ maxItems: 1
24+
25+ mediatek,gce-client-reg:
26+ description:
27+ The register of display function block to be set by gce. There are 4 arguments,
28+ such as gce node, subsys id, offset and register size. The subsys id that is
29+ mapping to the register of display function blocks is defined in the gce header
30+ include/dt-bindings/gce/<chip>-gce.h of each chips.
31+ $ref: /schemas/types.yaml#/definitions/phandle-array
32+ items:
33+ items:
34+ - description: phandle of GCE
35+ - description: GCE subsys id
36+ - description: register offset
37+ - description: register size
38+ maxItems: 1
39+
40+ clocks:
41+ maxItems: 1
42+
43+required:
44+ - compatible
45+ - reg
46+ - mediatek,gce-client-reg
47+ - clocks
48+
49+additionalProperties: false
50+
51+examples:
52+ - |
53+ #include <dt-bindings/clock/mt8195-clk.h>
54+ #include <dt-bindings/gce/mt8195-gce.h>
55+
56+ display@14002000 {
57+ compatible = "mediatek,mt8195-mdp3-fg";
58+ reg = <0x14002000 0x1000>;
59+ mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x2000 0x1000>;
60+ clocks = <&vppsys0 CLK_VPP0_MDP_FG>;
61+ };
Documentation/devicetree/bindings/media/mediatek,mdp3-hdr.yaml+61−0
@@ -0,0 +1,61 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/media/mediatek,mdp3-hdr.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: MediaTek Media Data Path 3 HDR
8+
9+maintainers:
10+ - Matthias Brugger <matthias.bgg@gmail.com>
11+ - Moudy Ho <moudy.ho@mediatek.com>
12+
13+description:
14+ A Media Data Path 3 (MDP3) component used to perform conversion from
15+ High Dynamic Range (HDR) to Standard Dynamic Range (SDR).
16+
17+properties:
18+ compatible:
19+ enum:
20+ - mediatek,mt8195-mdp3-hdr
21+
22+ reg:
23+ maxItems: 1
24+
25+ mediatek,gce-client-reg:
26+ description:
27+ The register of display function block to be set by gce. There are 4 arguments,
28+ such as gce node, subsys id, offset and register size. The subsys id that is
29+ mapping to the register of display function blocks is defined in the gce header
30+ include/dt-bindings/gce/<chip>-gce.h of each chips.
31+ $ref: /schemas/types.yaml#/definitions/phandle-array
32+ items:
33+ items:
34+ - description: phandle of GCE
35+ - description: GCE subsys id
36+ - description: register offset
37+ - description: register size
38+ maxItems: 1
39+
40+ clocks:
41+ maxItems: 1
42+
43+required:
44+ - compatible
45+ - reg
46+ - mediatek,gce-client-reg
47+ - clocks
48+
49+additionalProperties: false
50+
51+examples:
52+ - |
53+ #include <dt-bindings/clock/mt8195-clk.h>
54+ #include <dt-bindings/gce/mt8195-gce.h>
55+
56+ display@14004000 {
57+ compatible = "mediatek,mt8195-mdp3-hdr";
58+ reg = <0x14004000 0x1000>;
59+ mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x4000 0x1000>;
60+ clocks = <&vppsys0 CLK_VPP0_MDP_HDR>;
61+ };
Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml+88−16
@@ -20,8 +20,14 @@ description: | · 19 unmodified lines
2020
2121 properties:
2222 compatible:
23− items:
24− - const: mediatek,mt8183-mdp3-rdma
23+ oneOf:
24+ - enum:
25+ - mediatek,mt8183-mdp3-rdma
26+ - mediatek,mt8195-mdp3-rdma
27+ - mediatek,mt8195-vdo1-rdma
28+ - items:
29+ - const: mediatek,mt8188-vdo1-rdma
30+ - const: mediatek,mt8195-vdo1-rdma
2531
2632 reg:
2733 maxItems: 1
@@ -45,6 +51,14 @@ properties: · 17 unmodified lines
4551 include/dt-bindings/gce/<chip>-gce.h of each chips.
4652 $ref: /schemas/types.yaml#/definitions/uint32-array
4753
54+ mediatek,scp:
55+ $ref: /schemas/types.yaml#/definitions/phandle
56+ description:
57+ Phandle to the System Control Processor (SCP) used for initializing
58+ and stopping the MDP3, for sending frame data locations to the MDP3's
59+ VPU and to install Inter-Processor Interrupt handlers to control
60+ processing states.
61+
4862 power-domains:
4963 maxItems: 1
5064
@@ -52,6 +66,7 @@ properties: · 1 unmodified line
5266 items:
5367 - description: RDMA clock
5468 - description: RSZ clock
69+ minItems: 1
5570
5671 iommus:
5772 maxItems: 1
@@ -60,16 +75,72 @@ properties: · 2 unmodified lines
6075 items:
6176 - description: used for 1st data pipe from RDMA
6277 - description: used for 2nd data pipe from RDMA
78+ - description: used for 3rd data pipe from RDMA
79+ - description: used for 4th data pipe from RDMA
80+ - description: used for the data pipe from SPLIT
81+ minItems: 1
82+
83+ interrupts:
84+ maxItems: 1
85+
86+ '#dma-cells':
87+ const: 1
6388
6489 required:
6590 - compatible
6691 - reg
6792 - mediatek,gce-client-reg
68− - mediatek,gce-events
6993 - power-domains
7094 - clocks
7195 - iommus
72− - mboxes
96+ - '#dma-cells'
97+
98+allOf:
99+ - if:
100+ properties:
101+ compatible:
102+ contains:
103+ const: mediatek,mt8183-mdp3-rdma
104+
105+ then:
106+ properties:
107+ clocks:
108+ minItems: 2
109+
110+ mboxes:
111+ minItems: 2
112+
113+ required:
114+ - mboxes
115+ - mediatek,gce-events
116+
117+ - if:
118+ properties:
119+ compatible:
120+ contains:
121+ const: mediatek,mt8195-mdp3-rdma
122+
123+ then:
124+ properties:
125+ clocks:
126+ maxItems: 1
127+
128+ mboxes:
129+ minItems: 5
130+
131+ required:
132+ - mediatek,gce-events
133+
134+ - if:
135+ properties:
136+ compatible:
137+ contains:
138+ const: mediatek,mt8195-vdo1-rdma
139+
140+ then:
141+ properties:
142+ clocks:
143+ maxItems: 1
73144
74145 additionalProperties: false
75146
@@ -80,16 +151,17 @@ examples: · 4 unmodified lines
80151 #include <dt-bindings/power/mt8183-power.h>
81152 #include <dt-bindings/memory/mt8183-larb-port.h>
82153
83− mdp3_rdma0: mdp3-rdma0@14001000 {
84− compatible = "mediatek,mt8183-mdp3-rdma";
85− reg = <0x14001000 0x1000>;
86− mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x1000 0x1000>;
87− mediatek,gce-events = <CMDQ_EVENT_MDP_RDMA0_SOF>,
88− <CMDQ_EVENT_MDP_RDMA0_EOF>;
89− power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
90− clocks = <&mmsys CLK_MM_MDP_RDMA0>,
91− <&mmsys CLK_MM_MDP_RSZ1>;
92− iommus = <&iommu>;
93− mboxes = <&gce 20 CMDQ_THR_PRIO_LOWEST>,
94− <&gce 21 CMDQ_THR_PRIO_LOWEST>;
154+ dma-controller@14001000 {
155+ compatible = "mediatek,mt8183-mdp3-rdma";
156+ reg = <0x14001000 0x1000>;
157+ mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x1000 0x1000>;
158+ mediatek,gce-events = <CMDQ_EVENT_MDP_RDMA0_SOF>,
159+ <CMDQ_EVENT_MDP_RDMA0_EOF>;
160+ power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
161+ clocks = <&mmsys CLK_MM_MDP_RDMA0>,
162+ <&mmsys CLK_MM_MDP_RSZ1>;
163+ iommus = <&iommu>;
164+ mboxes = <&gce 20 CMDQ_THR_PRIO_LOWEST>,
165+ <&gce 21 CMDQ_THR_PRIO_LOWEST>;
166+ #dma-cells = <1>;
95167 };
Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml+5−1
@@ -15,9 +15,13 @@ description: | · 14 unmodified lines
1515
1616 properties:
1717 compatible:
18− items:
18+ oneOf:
1919 - enum:
2020 - mediatek,mt8183-mdp3-rsz
21+ - items:
22+ - enum:
23+ - mediatek,mt8195-mdp3-rsz
24+ - const: mediatek,mt8183-mdp3-rsz
2125
2226 reg:
2327 maxItems: 1
Documentation/devicetree/bindings/media/mediatek,mdp3-stitch.yaml+61−0
@@ -0,0 +1,61 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/media/mediatek,mdp3-stitch.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: MediaTek Media Data Path 3 STITCH
8+
9+maintainers:
10+ - Matthias Brugger <matthias.bgg@gmail.com>
11+ - Moudy Ho <moudy.ho@mediatek.com>
12+
13+description:
14+ One of Media Data Path 3 (MDP3) components used to combine multiple video frame
15+ with overlapping fields of view to produce a segmented panorame.
16+
17+properties:
18+ compatible:
19+ enum:
20+ - mediatek,mt8195-mdp3-stitch
21+
22+ reg:
23+ maxItems: 1
24+
25+ mediatek,gce-client-reg:
26+ description:
27+ The register of display function block to be set by gce. There are 4 arguments,
28+ such as gce node, subsys id, offset and register size. The subsys id that is
29+ mapping to the register of display function blocks is defined in the gce header
30+ include/dt-bindings/gce/<chip>-gce.h of each chips.
31+ $ref: /schemas/types.yaml#/definitions/phandle-array
32+ items:
33+ items:
34+ - description: phandle of GCE
35+ - description: GCE subsys id
36+ - description: register offset
37+ - description: register size
38+ maxItems: 1
39+
40+ clocks:
41+ maxItems: 1
42+
43+required:
44+ - compatible
45+ - reg
46+ - mediatek,gce-client-reg
47+ - clocks
48+
49+additionalProperties: false
50+
51+examples:
52+ - |
53+ #include <dt-bindings/clock/mt8195-clk.h>
54+ #include <dt-bindings/gce/mt8195-gce.h>
55+
56+ display@14003000 {
57+ compatible = "mediatek,mt8195-mdp3-stitch";
58+ reg = <0x14003000 0x1000>;
59+ mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x3000 0x1000>;
60+ clocks = <&vppsys0 CLK_VPP0_STITCH>;
61+ };
Documentation/devicetree/bindings/media/mediatek,mdp3-tcc.yaml+62−0
@@ -0,0 +1,62 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/media/mediatek,mdp3-tcc.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: MediaTek Media Data Path 3 Tone Curve Conversion
8+
9+maintainers:
10+ - Matthias Brugger <matthias.bgg@gmail.com>
11+
12+description:
13+ Tone Curve Conversion (TCC) is one of Media Profile Path 3 (MDP3) components.
14+ It is used to handle the tone mapping of various gamma curves in order to
15+ achieve HDR10 effects. This helps adapt the content to the color and
16+ brightness range that standard display devices typically support.
17+
18+properties:
19+ compatible:
20+ enum:
21+ - mediatek,mt8195-mdp3-tcc
22+
23+ reg:
24+ maxItems: 1
25+
26+ mediatek,gce-client-reg:
27+ description:
28+ The register of display function block to be set by gce. There are 4 arguments,
29+ such as gce node, subsys id, offset and register size. The subsys id that is
30+ mapping to the register of display function blocks is defined in the gce header
31+ include/dt-bindings/gce/<chip>-gce.h of each chips.
32+ $ref: /schemas/types.yaml#/definitions/phandle-array
33+ items:
34+ items:
35+ - description: phandle of GCE
36+ - description: GCE subsys id
37+ - description: register offset
38+ - description: register size
39+ maxItems: 1
40+
41+ clocks:
42+ maxItems: 1
43+
44+required:
45+ - compatible
46+ - reg
47+ - mediatek,gce-client-reg
48+ - clocks
49+
50+additionalProperties: false
51+
52+examples:
53+ - |
54+ #include <dt-bindings/clock/mt8195-clk.h>
55+ #include <dt-bindings/gce/mt8195-gce.h>
56+
57+ display@1400b000 {
58+ compatible = "mediatek,mt8195-mdp3-tcc";
59+ reg = <0x1400b000 0x1000>;
60+ mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0xb000 0x1000>;
61+ clocks = <&vppsys0 CLK_VPP0_MDP_TCC>;
62+ };
Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml+61−0
@@ -0,0 +1,61 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/media/mediatek,mdp3-tdshp.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: MediaTek Media Data Path 3 Two-Dimensional Sharpness
8+
9+maintainers:
10+ - Matthias Brugger <matthias.bgg@gmail.com>
11+ - Moudy Ho <moudy.ho@mediatek.com>
12+
13+description:
14+ Two-Dimensional Sharpness (TDSHP) is a Media Profile Path 3 (MDP3) component
15+ used to perform image edge sharpening and enhance vividness and contrast.
16+
17+properties:
18+ compatible:
19+ enum:
20+ - mediatek,mt8195-mdp3-tdshp
21+
22+ reg:
23+ maxItems: 1
24+
25+ mediatek,gce-client-reg:
26+ description:
27+ The register of display function block to be set by gce. There are 4 arguments,
28+ such as gce node, subsys id, offset and register size. The subsys id that is
29+ mapping to the register of display function blocks is defined in the gce header
30+ include/dt-bindings/gce/<chip>-gce.h of each chips.
31+ $ref: /schemas/types.yaml#/definitions/phandle-array
32+ items:
33+ items:
34+ - description: phandle of GCE
35+ - description: GCE subsys id
36+ - description: register offset
37+ - description: register size
38+ maxItems: 1
39+
40+ clocks:
41+ maxItems: 1
42+
43+required:
44+ - compatible
45+ - reg
46+ - mediatek,gce-client-reg
47+ - clocks
48+
49+additionalProperties: false
50+
51+examples:
52+ - |
53+ #include <dt-bindings/clock/mt8195-clk.h>
54+ #include <dt-bindings/gce/mt8195-gce.h>
55+
56+ display@14007000 {
57+ compatible = "mediatek,mt8195-mdp3-tdshp";
58+ reg = <0x14007000 0x1000>;
59+ mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x7000 0x1000>;
60+ clocks = <&vppsys0 CLK_VPP0_MDP_TDSHP>;
61+ };
Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml+19−10
@@ -15,9 +15,13 @@ description: | · 14 unmodified lines
1515
1616 properties:
1717 compatible:
18− items:
18+ oneOf:
1919 - enum:
2020 - mediatek,mt8183-mdp3-wrot
21+ - items:
22+ - enum:
23+ - mediatek,mt8195-mdp3-wrot
24+ - const: mediatek,mt8183-mdp3-wrot
2125
2226 reg:
2327 maxItems: 1
@@ -50,6 +54,9 @@ properties: · 26 unmodified lines
5054 iommus:
5155 maxItems: 1
5256
57+ '#dma-cells':
58+ const: 1
59+
5360 required:
5461 - compatible
5562 - reg
@@ -58,6 +65,7 @@ required: · 2 unmodified lines
5865 - power-domains
5966 - clocks
6067 - iommus
68+ - '#dma-cells'
6169
6270 additionalProperties: false
6371
@@ -68,13 +76,14 @@ examples: · 4 unmodified lines
6876 #include <dt-bindings/power/mt8183-power.h>
6977 #include <dt-bindings/memory/mt8183-larb-port.h>
7078
71− mdp3_wrot0: mdp3-wrot0@14005000 {
72− compatible = "mediatek,mt8183-mdp3-wrot";
73− reg = <0x14005000 0x1000>;
74− mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x5000 0x1000>;
75− mediatek,gce-events = <CMDQ_EVENT_MDP_WROT0_SOF>,
76− <CMDQ_EVENT_MDP_WROT0_EOF>;
77− power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
78− clocks = <&mmsys CLK_MM_MDP_WROT0>;
79− iommus = <&iommu>;
79+ dma-controller@14005000 {
80+ compatible = "mediatek,mt8183-mdp3-wrot";
81+ reg = <0x14005000 0x1000>;
82+ mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x5000 0x1000>;
83+ mediatek,gce-events = <CMDQ_EVENT_MDP_WROT0_SOF>,
84+ <CMDQ_EVENT_MDP_WROT0_EOF>;
85+ power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
86+ clocks = <&mmsys CLK_MM_MDP_WROT0>;
87+ iommus = <&iommu>;
88+ #dma-cells = <1>;
8089 };
Documentation/devicetree/bindings/media/rockchip-isp1.yaml+6−5
@@ -90,15 +90,16 @@ properties: · 89 unmodified lines
9090 description: connection point for input on the parallel interface
9191
9292 properties:
93− bus-type:
94− enum: [5, 6]
95−
9693 endpoint:
9794 $ref: video-interfaces.yaml#
9895 unevaluatedProperties: false
9996
100− required:
101− - bus-type
97+ properties:
98+ bus-type:
99+ enum: [5, 6]
100+
101+ required:
102+ - bus-type
102103
103104 anyOf:
104105 - required:
Documentation/devicetree/bindings/media/samsung,s5p-mfc.yaml+29−18
@@ -24,6 +24,7 @@ properties: · 23 unmodified lines
2424 - samsung,mfc-v7 # Exynos5420
2525 - samsung,mfc-v8 # Exynos5800
2626 - samsung,mfc-v10 # Exynos7880
27+ - tesla,fsd-mfc # Tesla FSD
2728 - items:
2829 - enum:
2930 - samsung,exynos3250-mfc # Exynos3250
@@ -49,7 +50,9 @@ properties: · 19 unmodified lines
4950
5051 iommu-names:
5152 minItems: 1
52− maxItems: 2
53+ items:
54+ - const: left
55+ - const: right
5356
5457 power-domains:
5558 maxItems: 1
@@ -84,7 +87,7 @@ allOf: · 28 unmodified lines
8487 - const: sclk_mfc
8588 iommus:
8689 maxItems: 1
87− iommus-names: false
90+ iommu-names: false
8891
8992 - if:
9093 properties:
@@ -102,11 +105,9 @@ allOf: · 11 unmodified lines
102105 - const: aclk
103106 - const: aclk_xiu
104107 iommus:
105− maxItems: 2
106− iommus-names:
107− items:
108− - const: left
109− - const: right
108+ minItems: 2
109+ iommu-names:
110+ minItems: 2
110111
111112 - if:
112113 properties:
@@ -123,11 +124,9 @@ allOf: · 10 unmodified lines
123124 - const: mfc
124125 - const: sclk_mfc
125126 iommus:
126− maxItems: 2
127− iommus-names:
128− items:
129− - const: left
130− - const: right
127+ minItems: 2
128+ iommu-names:
129+ minItems: 2
131130
132131 - if:
133132 properties:
@@ -144,11 +143,9 @@ allOf: · 10 unmodified lines
144143 items:
145144 - const: mfc
146145 iommus:
147− maxItems: 2
148− iommus-names:
149− items:
150− - const: left
151− - const: right
146+ minItems: 2
147+ iommu-names:
148+ minItems: 2
152149
153150 - if:
154151 properties:
@@ -161,9 +158,23 @@ allOf: · 6 unmodified lines
161158 clocks:
162159 minItems: 1
163160 maxItems: 2
161+
162+ - if:
163+ properties:
164+ compatible:
165+ contains:
166+ enum:
167+ - tesla,fsd-mfc
168+ then:
169+ properties:
170+ clocks:
171+ maxItems: 1
172+ clock-names:
173+ items:
174+ - const: mfc
164175 iommus:
165− minItems: 1
166176 maxItems: 2
177+ iommus-names: false
167178
168179 examples:
169180 - |
Documentation/devicetree/bindings/media/st,stm32-dcmipp.yaml+89−0
@@ -0,0 +1,89 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/media/st,stm32-dcmipp.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: STMicroelectronics STM32 DCMIPP Digital Camera Memory Interface Pixel Processor
8+
9+maintainers:
10+ - Hugues Fruchet <hugues.fruchet@foss.st.com>
11+ - Alain Volmat <alain.volmat@foss.st.com>
12+
13+properties:
14+ compatible:
15+ const: st,stm32mp13-dcmipp
16+
17+ reg:
18+ maxItems: 1
19+
20+ interrupts:
21+ maxItems: 1
22+
23+ clocks:
24+ maxItems: 1
25+
26+ resets:
27+ maxItems: 1
28+
29+ port:
30+ $ref: /schemas/graph.yaml#/$defs/port-base
31+ unevaluatedProperties: false
32+ description:
33+ DCMIPP supports a single port node with parallel bus.
34+
35+ properties:
36+ endpoint:
37+ $ref: video-interfaces.yaml#
38+ unevaluatedProperties: false
39+
40+ properties:
41+ bus-type:
42+ enum: [5, 6]
43+ default: 5
44+
45+ bus-width:
46+ enum: [8, 10, 12, 14]
47+ default: 8
48+
49+ pclk-sample: true
50+ hsync-active: true
51+ vsync-active: true
52+
53+ required:
54+ - pclk-sample
55+
56+required:
57+ - compatible
58+ - reg
59+ - interrupts
60+ - clocks
61+ - resets
62+ - port
63+
64+additionalProperties: false
65+
66+examples:
67+ - |
68+ #include <dt-bindings/interrupt-controller/arm-gic.h>
69+ #include <dt-bindings/clock/stm32mp13-clks.h>
70+ #include <dt-bindings/reset/stm32mp13-resets.h>
71+ dcmipp@5a000000 {
72+ compatible = "st,stm32mp13-dcmipp";
73+ reg = <0x5a000000 0x400>;
74+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
75+ resets = <&rcc DCMIPP_R>;
76+ clocks = <&rcc DCMIPP_K>;
77+
78+ port {
79+ endpoint {
80+ remote-endpoint = <&mipid02_2>;
81+ bus-width = <8>;
82+ hsync-active = <0>;
83+ vsync-active = <0>;
84+ pclk-sample = <0>;
85+ };
86+ };
87+ };
88+
89+...
Documentation/devicetree/bindings/media/starfive,jh7110-camss.yaml+180−0
@@ -0,0 +1,180 @@
1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/media/starfive,jh7110-camss.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Starfive SoC CAMSS ISP
8+
9+maintainers:
10+ - Jack Zhu <jack.zhu@starfivetech.com>
11+ - Changhuang Liang <changhuang.liang@starfivetech.com>
12+
13+description:
14+ The Starfive CAMSS ISP is a Camera interface for Starfive JH7110 SoC. It
15+ consists of a VIN controller (Video In Controller, a top-level control unit)
16+ and an ISP.
17+
18+properties:
19+ compatible:
20+ const: starfive,jh7110-camss
21+
22+ reg:
23+ maxItems: 2
24+
25+ reg-names:
26+ items:
27+ - const: syscon
28+ - const: isp
29+
30+ clocks:
31+ maxItems: 7
32+
33+ clock-names:
34+ items:
35+ - const: apb_func
36+ - const: wrapper_clk_c
37+ - const: dvp_inv
38+ - const: axiwr
39+ - const: mipi_rx0_pxl
40+ - const: ispcore_2x
41+ - const: isp_axi
42+
43+ resets:
44+ maxItems: 6
45+
46+ reset-names:
47+ items:
48+ - const: wrapper_p
49+ - const: wrapper_c
50+ - const: axird
51+ - const: axiwr
52+ - const: isp_top_n
53+ - const: isp_top_axi
54+
55+ power-domains:
56+ items:
57+ - description: JH7110 ISP Power Domain Switch Controller.
58+
59+ interrupts:
60+ maxItems: 4
61+
62+ ports:
63+ $ref: /schemas/graph.yaml#/properties/ports
64+
65+ properties:
66+ port@0:
67+ $ref: /schemas/graph.yaml#/$defs/port-base
68+ unevaluatedProperties: false
69+ description: Input port for receiving DVP data.
70+
71+ properties:
72+ endpoint:
73+ $ref: video-interfaces.yaml#
74+ unevaluatedProperties: false
75+
76+ properties:
77+ bus-type:
78+ enum: [5, 6]
79+
80+ bus-width:
81+ enum: [8, 10, 12]
82+
83+ data-shift:
84+ enum: [0, 2]
85+ default: 0
86+
87+ hsync-active:
88+ enum: [0, 1]
89+ default: 1
90+
91+ vsync-active:
92+ enum: [0, 1]
93+ default: 1
94+
95+ required:
96+ - bus-type
97+ - bus-width
98+
99+ port@1:
100+ $ref: /schemas/graph.yaml#/properties/port
101+ description: Input port for receiving CSI data.
102+
103+ required:
104+ - port@0
105+ - port@1
106+
107+required:
108+ - compatible
109+ - reg
110+ - reg-names
111+ - clocks
112+ - clock-names
113+ - resets
114+ - reset-names
115+ - power-domains
116+ - interrupts
117+ - ports
118+
119+additionalProperties: false
120+
121+examples:
122+ - |
123+ isp@19840000 {
124+ compatible = "starfive,jh7110-camss";
125+ reg = <0x19840000 0x10000>,
126+ <0x19870000 0x30000>;
127+ reg-names = "syscon", "isp";
128+ clocks = <&ispcrg 0>,
129+ <&ispcrg 13>,
130+ <&ispcrg 2>,
131+ <&ispcrg 12>,
132+ <&ispcrg 1>,
133+ <&syscrg 51>,
134+ <&syscrg 52>;
135+ clock-names = "apb_func",
136+ "wrapper_clk_c",
137+ "dvp_inv",
138+ "axiwr",
139+ "mipi_rx0_pxl",
140+ "ispcore_2x",
141+ "isp_axi";
142+ resets = <&ispcrg 0>,
143+ <&ispcrg 1>,
144+ <&ispcrg 10>,
145+ <&ispcrg 11>,
146+ <&syscrg 41>,
147+ <&syscrg 42>;
148+ reset-names = "wrapper_p",
149+ "wrapper_c",
150+ "axird",
151+ "axiwr",
152+ "isp_top_n",
153+ "isp_top_axi";
154+ power-domains = <&pwrc 5>;
155+ interrupts = <92>, <87>, <88>, <90>;
156+
157+ ports {
158+ #address-cells = <1>;
159+ #size-cells = <0>;
160+ port@0 {
161+ reg = <0>;
162+ vin_from_sc2235: endpoint {
163+ remote-endpoint = <&sc2235_to_vin>;
164+ bus-type = <5>;
165+ bus-width = <8>;
166+ data-shift = <2>;
167+ hsync-active = <1>;
168+ vsync-active = <0>;
169+ pclk-sample = <1>;
170+ };
171+ };
172+
173+ port@1 {
174+ reg = <1>;
175+ vin_from_csi2rx: endpoint {
176+ remote-endpoint = <&csi2rx_to_vin>;
177+ };
178+ };
179+ };
180+ };
Documentation/devicetree/bindings/mfd/ams,as3711.yaml+223−0
@@ -0,0 +1,223 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/mfd/ams,as3711.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Austria MicroSystems AS3711 Quad Buck High Current PMIC with Charger
8+
9+maintainers:
10+ - Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
11+
12+description:
13+ AS3711 is an I2C PMIC from Austria MicroSystems with multiple DC/DC and LDO
14+ power supplies, a battery charger and an RTC. So far only bindings for the
15+ two step-up DC/DC converters are defined.
16+
17+properties:
18+ compatible:
19+ const: ams,as3711
20+
21+ reg:
22+ maxItems: 1
23+
24+ backlight:
25+ description:
26+ Step-up converter configuration, to be used as a backlight source
27+ type: object
28+ additionalProperties: false
29+ properties:
30+ compatible:
31+ const: ams,as3711-bl
32+
33+ su1-dev:
34+ description: Framebuffer phandle for the first step-up converter
35+ $ref: /schemas/types.yaml#/definitions/phandle
36+
37+ su1-max-uA:
38+ description: Maximum current for the first step-up converter
39+ $ref: /schemas/types.yaml#/definitions/uint32
40+
41+ su2-dev:
42+ description: Framebuffer phandle for the second step-up converter
43+ $ref: /schemas/types.yaml#/definitions/phandle
44+
45+ su2-max-uA:
46+ description: Maximum current for the second step-up converter
47+ $ref: /schemas/types.yaml#/definitions/uint32
48+
49+ su2-feedback-voltage:
50+ description: Second step-up converter uses voltage feedback
51+ type: boolean
52+
53+ su2-feedback-curr1:
54+ description:
55+ Second step-up converter uses CURR1 input for current feedback
56+ type: boolean
57+
58+ su2-feedback-curr2:
59+ description:
60+ Second step-up converter uses CURR2 input for current feedback
61+ type: boolean
62+
63+ su2-feedback-curr3:
64+ description:
65+ Second step-up converter uses CURR3 input for current feedback
66+ type: boolean
67+
68+ su2-feedback-curr-auto:
69+ description:
70+ Second step-up converter uses automatic current feedback selection
71+ type: boolean
72+
73+ su2-fbprot-lx-sd4:
74+ description:
75+ Second step-up converter uses LX_SD4 for over-voltage protection
76+ type: boolean
77+
78+ su2-fbprot-gpio2:
79+ description:
80+ Second step-up converter uses GPIO2 for over-voltage protection
81+ type: boolean
82+
83+ su2-fbprot-gpio3:
84+ description:
85+ Second step-up converter uses GPIO3 for over-voltage protection
86+ type: boolean
87+
88+ su2-fbprot-gpio4:
89+ description:
90+ Second step-up converter uses GPIO4 for over-voltage protection
91+ type: boolean
92+
93+ su2-auto-curr1:
94+ description:
95+ Second step-up converter uses CURR1 input for automatic current
96+ feedback
97+ type: boolean
98+
99+ su2-auto-curr2:
100+ description:
101+ Second step-up converter uses CURR2 input for automatic current
102+ feedback
103+ type: boolean
104+
105+ su2-auto-curr3:
106+ description:
107+ Second step-up converter uses CURR3 input for automatic current
108+ feedback
109+ type: boolean
110+
111+ required:
112+ - compatible
113+
114+ dependentRequired:
115+ # To use the SU1 converter as a backlight source the following two
116+ # properties must be provided:
117+ su1-dev: [ su1-max-uA ]
118+ su1-max-uA: [ su1-dev ]
119+
120+ # To use the SU2 converter as a backlight source the following two
121+ # properties must be provided:
122+ su2-dev: [ su2-max-uA ]
123+ su2-max-uA: [ su2-dev ]
124+
125+ su2-feedback-voltage: [ su2-dev ]
126+ su2-feedback-curr1: [ su2-dev ]
127+ su2-feedback-curr2: [ su2-dev ]
128+ su2-feedback-curr3: [ su2-dev ]
129+ su2-feedback-curr-auto: [ su2-dev ]
130+ su2-fbprot-lx-sd4: [ su2-dev ]
131+ su2-fbprot-gpio2: [ su2-dev ]
132+ su2-fbprot-gpio3: [ su2-dev ]
133+ su2-fbprot-gpio4: [ su2-dev ]
134+ su2-auto-curr1: [ su2-feedback-curr-auto ]
135+ su2-auto-curr2: [ su2-feedback-curr-auto ]
136+ su2-auto-curr3: [ su2-feedback-curr-auto ]
137+
138+ dependentSchemas:
139+ su2-dev:
140+ allOf:
141+ - oneOf:
142+ - required:
143+ - su2-feedback-voltage
144+ - required:
145+ - su2-feedback-curr1
146+ - required:
147+ - su2-feedback-curr2
148+ - required:
149+ - su2-feedback-curr3
150+ - required:
151+ - su2-feedback-curr-auto
152+ - oneOf:
153+ - required:
154+ - su2-fbprot-lx-sd4
155+ - required:
156+ - su2-fbprot-gpio2
157+ - required:
158+ - su2-fbprot-gpio3
159+ - required:
160+ - su2-fbprot-gpio4
161+
162+ su2-feedback-curr-auto:
163+ anyOf:
164+ - required:
165+ - su2-auto-curr1
166+ - required:
167+ - su2-auto-curr2
168+ - required:
169+ - su2-auto-curr3
170+
171+ regulators:
172+ description: Other DC/DC and LDO supplies
173+ type: object
174+ unevaluatedProperties: false
175+ patternProperties:
176+ "^(sd[1-4]|ldo[1-8])$":
177+ type: object
178+ $ref: /schemas/regulator/regulator.yaml#
179+ unevaluatedProperties: false
180+
181+required:
182+ - compatible
183+ - reg
184+
185+additionalProperties: false
186+
187+examples:
188+ - |
189+ i2c {
190+ #address-cells = <1>;
191+ #size-cells = <0>;
192+
193+ pmic@40 {
194+ compatible = "ams,as3711";
195+ reg = <0x40>;
196+
197+ regulators {
198+ sd4 {
199+ regulator-name = "1.215V";
200+ regulator-min-microvolt = <1215000>;
201+ regulator-max-microvolt = <1235000>;
202+ };
203+ ldo2 {
204+ regulator-name = "2.8V CPU";
205+ regulator-min-microvolt = <2800000>;
206+ regulator-max-microvolt = <2800000>;
207+ regulator-always-on;
208+ regulator-boot-on;
209+ };
210+ };
211+
212+ backlight {
213+ compatible = "ams,as3711-bl";
214+ su2-dev = <&lcdc>;
215+ su2-max-uA = <36000>;
216+ su2-feedback-curr-auto;
217+ su2-fbprot-gpio4;
218+ su2-auto-curr1;
219+ su2-auto-curr2;
220+ su2-auto-curr3;
221+ };
222+ };
223+ };
Documentation/devicetree/bindings/mfd/as3711.txt+0−73
@@ -1,73 +0,0 @@
1−AS3711 is an I2C PMIC from Austria MicroSystems with multiple DCDC and LDO power
2−supplies, a battery charger and an RTC. So far only bindings for the two stepup
3−DCDC converters are defined. Other DCDC and LDO supplies are configured, using
4−standard regulator properties, they must belong to a sub-node, called
5−"regulators" and be called "sd1" to "sd4" and "ldo1" to "ldo8." Stepup converter
6−configuration should be placed in a subnode, called "backlight."
7−
8−Compulsory properties:
9−- compatible : must be "ams,as3711"
10−- reg : specifies the I2C address
11−
12−To use the SU1 converter as a backlight source the following two properties must
13−be provided:
14−- su1-dev : framebuffer phandle
15−- su1-max-uA : maximum current
16−
17−To use the SU2 converter as a backlight source the following two properties must
18−be provided:
19−- su2-dev : framebuffer phandle
20−- su1-max-uA : maximum current
21−
22−Additionally one of these properties must be provided to select the type of
23−feedback used:
24−- su2-feedback-voltage : voltage feedback is used
25−- su2-feedback-curr1 : CURR1 input used for current feedback
26−- su2-feedback-curr2 : CURR2 input used for current feedback
27−- su2-feedback-curr3 : CURR3 input used for current feedback
28−- su2-feedback-curr-auto: automatic current feedback selection
29−
30−and one of these to select the over-voltage protection pin
31−- su2-fbprot-lx-sd4 : LX_SD4 is used for over-voltage protection
32−- su2-fbprot-gpio2 : GPIO2 is used for over-voltage protection
33−- su2-fbprot-gpio3 : GPIO3 is used for over-voltage protection
34−- su2-fbprot-gpio4 : GPIO4 is used for over-voltage protection
35−
36−If "su2-feedback-curr-auto" is selected, one or more of the following properties
37−have to be specified:
38−- su2-auto-curr1 : use CURR1 input for current feedback
39−- su2-auto-curr2 : use CURR2 input for current feedback
40−- su2-auto-curr3 : use CURR3 input for current feedback
41−
42−Example:
43−
44−as3711@40 {
45− compatible = "ams,as3711";
46− reg = <0x40>;
47−
48− regulators {
49− sd4 {
50− regulator-name = "1.215V";
51− regulator-min-microvolt = <1215000>;
52− regulator-max-microvolt = <1235000>;
53− };
54− ldo2 {
55− regulator-name = "2.8V CPU";
56− regulator-min-microvolt = <2800000>;
57− regulator-max-microvolt = <2800000>;
58− regulator-always-on;
59− regulator-boot-on;
60− };
61− };
62−
63− backlight {
64− compatible = "ams,as3711-bl";
65− su2-dev = <&lcdc>;
66− su2-max-uA = <36000>;
67− su2-feedback-curr-auto;
68− su2-fbprot-gpio4;
69− su2-auto-curr1;
70− su2-auto-curr2;
71− su2-auto-curr3;
72− };
73−};
Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml+68−72
@@ -17,7 +17,7 @@ description: | · 16 unmodified lines
1717 node.
1818
1919 The SPMI controller part is provided by
20− Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml
20+ Documentation/devicetree/bindings/spmi/hisilicon,hisi-spmi-controller.yaml
2121
2222 properties:
2323 $nodename:
@@ -42,13 +42,6 @@ properties: · 18 unmodified lines
4242
4343 additionalProperties: false
4444
45− properties:
46− '#address-cells':
47− const: 1
48−
49− '#size-cells':
50− const: 0
51−
5245 patternProperties:
5346 '^ldo[0-9]+$':
5447 type: object
@@ -66,72 +59,75 @@ additionalProperties: false · 11 unmodified lines
6659
6760 examples:
6861 - |
62+ #include <dt-bindings/spmi/spmi.h>
6963
70− pmic: pmic@0 {
71− compatible = "hisilicon,hi6421v600-spmi";
72− reg = <0 0>;
73−
74− #interrupt-cells = <2>;
75− interrupt-controller;
76− interrupt-parent = <&gpio28>;
77− interrupts = <0 0>;
78−
79− regulators {
80− #address-cells = <1>;
64+ spmi {
65+ #address-cells = <2>;
8166 #size-cells = <0>;
8267
83− ldo3: ldo3 {
84− regulator-name = "ldo3";
85− regulator-min-microvolt = <1500000>;
86− regulator-max-microvolt = <2000000>;
87− regulator-boot-on;
88− };
89−
90− ldo4: ldo4 {
91− regulator-name = "ldo4";
92− regulator-min-microvolt = <1725000>;
93− regulator-max-microvolt = <1900000>;
94− regulator-boot-on;
95− };
96−
97− ldo9: ldo9 {
98− regulator-name = "ldo9";
99− regulator-min-microvolt = <1750000>;
100− regulator-max-microvolt = <3300000>;
101− regulator-boot-on;
102− };
103−
104− ldo15: ldo15 {
105− regulator-name = "ldo15";
106− regulator-min-microvolt = <1800000>;
107− regulator-max-microvolt = <3000000>;
108− regulator-always-on;
109− };
110−
111− ldo16: ldo16 {
112− regulator-name = "ldo16";
113− regulator-min-microvolt = <1800000>;
114− regulator-max-microvolt = <3000000>;
115− regulator-boot-on;
116− };
117−
118− ldo17: ldo17 {
119− regulator-name = "ldo17";
120− regulator-min-microvolt = <2500000>;
121− regulator-max-microvolt = <3300000>;
122− };
123−
124− ldo33: ldo33 {
125− regulator-name = "ldo33";
126− regulator-min-microvolt = <2500000>;
127− regulator-max-microvolt = <3300000>;
128− regulator-boot-on;
129− };
130−
131− ldo34: ldo34 {
132− regulator-name = "ldo34";
133− regulator-min-microvolt = <2600000>;
134− regulator-max-microvolt = <3300000>;
68+ pmic@0 {
69+ compatible = "hisilicon,hi6421v600-spmi";
70+ reg = <0 SPMI_USID>;
71+
72+ #interrupt-cells = <2>;
73+ interrupt-controller;
74+ interrupt-parent = <&gpio28>;
75+ interrupts = <0 0>;
76+
77+ regulators {
78+ ldo3 {
79+ regulator-name = "ldo3";
80+ regulator-min-microvolt = <1500000>;
81+ regulator-max-microvolt = <2000000>;
82+ regulator-boot-on;
83+ };
84+
85+ ldo4 {
86+ regulator-name = "ldo4";
87+ regulator-min-microvolt = <1725000>;
88+ regulator-max-microvolt = <1900000>;
89+ regulator-boot-on;
90+ };
91+
92+ ldo9 {
93+ regulator-name = "ldo9";
94+ regulator-min-microvolt = <1750000>;
95+ regulator-max-microvolt = <3300000>;
96+ regulator-boot-on;
97+ };
98+
99+ ldo15 {
100+ regulator-name = "ldo15";
101+ regulator-min-microvolt = <1800000>;
102+ regulator-max-microvolt = <3000000>;
103+ regulator-always-on;
104+ };
105+
106+ ldo16 {
107+ regulator-name = "ldo16";
108+ regulator-min-microvolt = <1800000>;
109+ regulator-max-microvolt = <3000000>;
110+ regulator-boot-on;
111+ };
112+
113+ ldo17 {
114+ regulator-name = "ldo17";
115+ regulator-min-microvolt = <2500000>;
116+ regulator-max-microvolt = <3300000>;
117+ };
118+
119+ ldo33 {
120+ regulator-name = "ldo33";
121+ regulator-min-microvolt = <2500000>;
122+ regulator-max-microvolt = <3300000>;
123+ regulator-boot-on;
124+ };
125+
126+ ldo34 {
127+ regulator-name = "ldo34";
128+ regulator-min-microvolt = <2600000>;
129+ regulator-max-microvolt = <3300000>;
130+ };
131+ };
135132 };
136− };
137133 };
Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml+4−2
@@ -99,10 +99,12 @@ examples: · 98 unmodified lines
9999 - |
100100 #include <dt-bindings/mfd/qcom-pm8008.h>
101101 #include <dt-bindings/interrupt-controller/irq.h>
102− qupv3_se13_i2c {
102+
103+ i2c {
103104 #address-cells = <1>;
104105 #size-cells = <0>;
105− pm8008i@8 {
106+
107+ pmic@8 {
106108 compatible = "qcom,pm8008";
107109 reg = <0x8>;
108110 #address-cells = <1>;
Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml+7−0
@@ -66,6 +66,7 @@ properties: · 65 unmodified lines
6666 - qcom,pm8841
6767 - qcom,pm8909
6868 - qcom,pm8916
69+ - qcom,pm8937
6970 - qcom,pm8941
7071 - qcom,pm8950
7172 - qcom,pm8953
@@ -134,9 +135,15 @@ patternProperties: · 62 unmodified lines
134135 type: object
135136 $ref: /schemas/sound/qcom,pm8916-wcd-analog-codec.yaml#
136137
138+ "^battery@[0-9a-f]+$":
139+ type: object
140+ oneOf:
141+ - $ref: /schemas/power/supply/qcom,pm8916-bms-vm.yaml#
142+
137143 "^charger@[0-9a-f]+$":
138144 type: object
139145 oneOf:
146+ - $ref: /schemas/power/supply/qcom,pm8916-lbc.yaml#
140147 - $ref: /schemas/power/supply/qcom,pm8941-charger.yaml#
141148 - $ref: /schemas/power/supply/qcom,pm8941-coincell.yaml#
142149 - $ref: /schemas/power/supply/qcom,pmi8998-charger.yaml#
Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml+2−0
@@ -29,6 +29,8 @@ properties: · 28 unmodified lines
2929 - qcom,sdx65-tcsr
3030 - qcom,sm4450-tcsr
3131 - qcom,sm8150-tcsr
32+ - qcom,sm8250-tcsr
33+ - qcom,sm8350-tcsr
3234 - qcom,sm8450-tcsr
3335 - qcom,tcsr-apq8064
3436 - qcom,tcsr-apq8084
Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.yaml+1−1
@@ -85,7 +85,7 @@ examples: · 84 unmodified lines
8585 };
8686
8787 i2s@11440000 {
88− compatible = "samsung,exynos7-i2s";
88+ compatible = "samsung,exynos5433-i2s", "samsung,exynos7-i2s";
8989 reg = <0x11440000 0x100>;
9090 dmas = <&adma 0>, <&adma 2>;
9191 dma-names = "tx", "rx";
Documentation/devicetree/bindings/mfd/sprd,ums512-glbreg.yaml+3−1
@@ -19,7 +19,9 @@ description: · 18 unmodified lines
1919 properties:
2020 compatible:
2121 items:
22− - const: sprd,ums512-glbregs
22+ - enum:
23+ - sprd,ums512-glbregs
24+ - sprd,ums9620-glbregs
2325 - const: syscon
2426 - const: simple-mfd
2527
Documentation/devicetree/bindings/mfd/ti,am3359-tscadc.yaml+0−2
@@ -61,8 +61,6 @@ required: · 60 unmodified lines
6161 - interrupts
6262 - clocks
6363 - clock-names
64− - dmas
65− - dma-names
6664
6765 additionalProperties: false
6866
Documentation/devicetree/bindings/misc/fsl,dpaa2-console.yaml+1−1
@@ -12,7 +12,7 @@ maintainers: · 11 unmodified lines
1212
1313 properties:
1414 compatible:
15− const: "fsl,dpaa2-console"
15+ const: fsl,dpaa2-console
1616
1717 reg:
1818 maxItems: 1
Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml+4−4
@@ -226,8 +226,8 @@ examples: · 225 unmodified lines
226226 interrupt-parent = <&gic>;
227227 interrupts = <0 48 4>;
228228 reg = <0xff160000 0x1000>;
229− clocks = <&clk200>, <&clk200>;
230− clock-names = "clk_xin", "clk_ahb";
229+ clocks = <&clk200>, <&clk200>, <&clk1200>;
230+ clock-names = "clk_xin", "clk_ahb", "gate";
231231 clock-output-names = "clk_out_sd0", "clk_in_sd0";
232232 #clock-cells = <1>;
233233 clk-phase-sd-hs = <63>, <72>;
@@ -239,8 +239,8 @@ examples: · 5 unmodified lines
239239 interrupt-parent = <&gic>;
240240 interrupts = <0 126 4>;
241241 reg = <0xf1040000 0x10000>;
242− clocks = <&clk200>, <&clk200>;
243− clock-names = "clk_xin", "clk_ahb";
242+ clocks = <&clk200>, <&clk200>, <&clk1200>;
243+ clock-names = "clk_xin", "clk_ahb", "gate";
244244 clock-output-names = "clk_out_sd0", "clk_in_sd0";
245245 #clock-cells = <1>;
246246 clk-phase-sd-hs = <132>, <60>;
Documentation/devicetree/bindings/mmc/arm,pl18x.yaml+1−1
@@ -203,7 +203,7 @@ examples: · 202 unmodified lines
203203 bus-width = <4>;
204204 cap-sd-highspeed;
205205 cap-mmc-highspeed;
206− cd-gpios = <&gpio2 31 0x4>;
206+ cd-gpios = <&gpio2 31 0x4>;
207207 st,sig-dir-dat0;
208208 st,sig-dir-dat2;
209209 st,sig-dir-cmd;
Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml+1−3
@@ -20,10 +20,8 @@ properties: · 19 unmodified lines
2020 - const: brcm,sdhci-brcmstb
2121 - items:
2222 - enum:
23+ - brcm,bcm74165b0-sdhci
2324 - brcm,bcm7445-sdhci
24− - const: brcm,sdhci-brcmstb
25− - items:
26− - enum:
2725 - brcm,bcm7425-sdhci
2826 - const: brcm,sdhci-brcmstb
2927
Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml+3−1
@@ -27,7 +27,9 @@ properties: · 26 unmodified lines
2727 - marvell,armada-ap806-sdhci
2828
2929 - items:
30− - const: marvell,armada-ap807-sdhci
30+ - enum:
31+ - marvell,armada-ap807-sdhci
32+ - marvell,ac5-sdhci
3133 - const: marvell,armada-ap806-sdhci
3234
3335 - items:
Documentation/devicetree/bindings/mmc/mtk-sd.yaml+9−0
@@ -145,6 +145,15 @@ properties: · 144 unmodified lines
145145 minimum: 0
146146 maximum: 7
147147
148+ mediatek,tuning-step:
149+ $ref: /schemas/types.yaml#/definitions/uint32
150+ description:
151+ Some SoCs need extend tuning step for better delay value to avoid CRC issue.
152+ If not present, default tuning step is 32. For eMMC and SD, this can yield
153+ satisfactory calibration results in most cases.
154+ enum: [32, 64]
155+ default: 32
156+
148157 resets:
149158 maxItems: 1
150159
Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml+1−1
@@ -56,7 +56,7 @@ properties: · 55 unmodified lines
5656 - renesas,sdhi-r8a77980 # R-Car V3H
5757 - renesas,sdhi-r8a77990 # R-Car E3
5858 - renesas,sdhi-r8a77995 # R-Car D3
59− - renesas,sdhi-r9a07g043 # RZ/G2UL
59+ - renesas,sdhi-r9a07g043 # RZ/G2UL and RZ/Five
6060 - renesas,sdhi-r9a07g044 # RZ/G2{L,LC}
6161 - renesas,sdhi-r9a07g054 # RZ/V2L
6262 - renesas,sdhi-r9a08g045 # RZ/G3S
Documentation/devicetree/bindings/mmc/samsung,exynos-dw-mshc.yaml+16−9
@@ -14,15 +14,22 @@ maintainers: · 13 unmodified lines
1414
1515 properties:
1616 compatible:
17− enum:
18− - samsung,exynos4210-dw-mshc
19− - samsung,exynos4412-dw-mshc
20− - samsung,exynos5250-dw-mshc
21− - samsung,exynos5420-dw-mshc
22− - samsung,exynos5420-dw-mshc-smu
23− - samsung,exynos7-dw-mshc
24− - samsung,exynos7-dw-mshc-smu
25− - axis,artpec8-dw-mshc
17+ oneOf:
18+ - enum:
19+ - axis,artpec8-dw-mshc
20+ - samsung,exynos4210-dw-mshc
21+ - samsung,exynos4412-dw-mshc
22+ - samsung,exynos5250-dw-mshc
23+ - samsung,exynos5420-dw-mshc
24+ - samsung,exynos5420-dw-mshc-smu
25+ - samsung,exynos7-dw-mshc
26+ - samsung,exynos7-dw-mshc-smu
27+ - items:
28+ - enum:
29+ - samsung,exynos5433-dw-mshc-smu
30+ - samsung,exynos7885-dw-mshc-smu
31+ - samsung,exynos850-dw-mshc-smu
32+ - const: samsung,exynos7-dw-mshc-smu
2633
2734 reg:
2835 maxItems: 1
Documentation/devicetree/bindings/mmc/sdhci-msm.yaml+2−0
@@ -22,6 +22,8 @@ properties: · 21 unmodified lines
2222 - items:
2323 - enum:
2424 - qcom,apq8084-sdhci
25+ - qcom,ipq4019-sdhci
26+ - qcom,ipq8074-sdhci
2527 - qcom,msm8226-sdhci
2628 - qcom,msm8953-sdhci
2729 - qcom,msm8974-sdhci
Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml+2−2
@@ -18,7 +18,7 @@ allOf: · 17 unmodified lines
1818 const: marvell,armada-380-sdhci
1919 then:
2020 properties:
21− regs:
21+ reg:
2222 minItems: 3
2323 reg-names:
2424 minItems: 3
@@ -26,7 +26,7 @@ allOf: · 1 unmodified line
2626 - reg-names
2727 else:
2828 properties:
29− regs:
29+ reg:
3030 maxItems: 1
3131 reg-names:
3232 maxItems: 1
Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml+1−0
@@ -19,6 +19,7 @@ properties: · 18 unmodified lines
1919 - rockchip,rk3568-dwcmshc
2020 - rockchip,rk3588-dwcmshc
2121 - snps,dwcmshc-sdhci
22+ - thead,th1520-dwcmshc
2223
2324 reg:
2425 maxItems: 1
Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml+4−0
@@ -35,6 +35,9 @@ properties: · 34 unmodified lines
3535 - const: biu
3636 - const: ciu
3737
38+ iommus:
39+ maxItems: 1
40+
3841 altr,sysmgr-syscon:
3942 $ref: /schemas/types.yaml#/definitions/phandle-array
4043 items:
@@ -62,6 +65,7 @@ allOf: · 21 unmodified lines
6265 altr,sysmgr-syscon: true
6366 else:
6467 properties:
68+ iommus: false
6569 altr,sysmgr-syscon: false
6670
6771 required:
Documentation/devicetree/bindings/mtd/partitions/u-boot.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
77 title: U-Boot bootloader partition
88
99 description: |
10− U-Boot is a bootlodaer commonly used in embedded devices. It's almost always
10+ U-Boot is a bootloader commonly used in embedded devices. It's almost always
1111 located on some kind of flash device.
1212
1313 Device configuration is stored as a set of environment variables that are
Documentation/devicetree/bindings/net/dsa/dsa.yaml+6−0
@@ -46,4 +46,10 @@ $defs: · 45 unmodified lines
4646 $ref: dsa-port.yaml#
4747 unevaluatedProperties: false
4848
49+oneOf:
50+ - required:
51+ - ports
52+ - required:
53+ - ethernet-ports
54+
4955 ...
Documentation/devicetree/bindings/net/dsa/marvell,mv88e6060.yaml+88−0
@@ -0,0 +1,88 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/net/dsa/marvell,mv88e6060.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Marvell MV88E6060 DSA switch
8+
9+maintainers:
10+ - Andrew Lunn <andrew@lunn.ch>
11+
12+description:
13+ The Marvell MV88E6060 switch has been produced and sold by Marvell
14+ since at least 2008. The switch has one pin ADDR4 that controls the
15+ MDIO address of the switch to be 0x10 or 0x00, and on the MDIO bus
16+ connected to the switch, the PHYs inside the switch appear as
17+ independent devices on address 0x00-0x04 or 0x10-0x14, so in difference
18+ from many other DSA switches this switch does not have an internal
19+ MDIO bus for the PHY devices.
20+
21+properties:
22+ compatible:
23+ const: marvell,mv88e6060
24+ description:
25+ The MV88E6060 is the oldest Marvell DSA switch product, and
26+ as such a bit limited in features compared to later hardware.
27+
28+ reg:
29+ maxItems: 1
30+
31+ reset-gpios:
32+ description:
33+ GPIO to be used to reset the whole device
34+ maxItems: 1
35+
36+allOf:
37+ - $ref: dsa.yaml#/$defs/ethernet-ports
38+
39+required:
40+ - compatible
41+ - reg
42+
43+unevaluatedProperties: false
44+
45+examples:
46+ - |
47+ #include <dt-bindings/gpio/gpio.h>
48+ #include <dt-bindings/interrupt-controller/irq.h>
49+ mdio {
50+ #address-cells = <1>;
51+ #size-cells = <0>;
52+
53+ ethernet-switch@16 {
54+ compatible = "marvell,mv88e6060";
55+ reg = <16>;
56+
57+ ethernet-ports {
58+ #address-cells = <1>;
59+ #size-cells = <0>;
60+
61+ ethernet-port@0 {
62+ reg = <0>;
63+ label = "lan1";
64+ };
65+ ethernet-port@1 {
66+ reg = <1>;
67+ label = "lan2";
68+ };
69+ ethernet-port@2 {
70+ reg = <2>;
71+ label = "lan3";
72+ };
73+ ethernet-port@3 {
74+ reg = <3>;
75+ label = "lan4";
76+ };
77+ ethernet-port@5 {
78+ reg = <5>;
79+ phy-mode = "rev-mii";
80+ ethernet = <&ethc>;
81+ fixed-link {
82+ speed = <100>;
83+ full-duplex;
84+ };
85+ };
86+ };
87+ };
88+ };
Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml+337−0
@@ -0,0 +1,337 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/net/dsa/marvell,mv88e6xxx.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Marvell MV88E6xxx DSA switch family
8+
9+maintainers:
10+ - Andrew Lunn <andrew@lunn.ch>
11+
12+description:
13+ The Marvell MV88E6xxx switch series has been produced and sold
14+ by Marvell since at least 2008. The switch has a few compatibles which
15+ just indicate the base address of the switch, then operating systems
16+ can investigate switch ID registers to find out which actual version
17+ of the switch it is dealing with.
18+
19+properties:
20+ compatible:
21+ oneOf:
22+ - enum:
23+ - marvell,mv88e6085
24+ - marvell,mv88e6190
25+ - marvell,mv88e6250
26+ description: |
27+ marvell,mv88e6085: This switch uses base address 0x10.
28+ This switch and its siblings will be autodetected from
29+ ID registers found in the switch, so only "marvell,mv88e6085" should be
30+ specified. This includes the following list of MV88Exxxx switches:
31+ 6085, 6095, 6097, 6123, 6131, 6141, 6161, 6165, 6171, 6172, 6175, 6176,
32+ 6185, 6240, 6320, 6321, 6341, 6350, 6351, 6352
33+ marvell,mv88e6190: This switch uses base address 0x00.
34+ This switch and its siblings will be autodetected from
35+ ID registers found in the switch, so only "marvell,mv88e6190" should be
36+ specified. This includes the following list of MV88Exxxx switches:
37+ 6190, 6190X, 6191, 6290, 6361, 6390, 6390X
38+ marvell,mv88e6250: This switch uses base address 0x08 or 0x18.
39+ This switch and its siblings will be autodetected from
40+ ID registers found in the switch, so only "marvell,mv88e6250" should be
41+ specified. This includes the following list of MV88Exxxx switches:
42+ 6220, 6250
43+ - items:
44+ - const: marvell,turris-mox-mv88e6085
45+ - const: marvell,mv88e6085
46+ - items:
47+ - const: marvell,turris-mox-mv88e6190
48+ - const: marvell,mv88e6190
49+
50+ reg:
51+ maxItems: 1
52+
53+ eeprom-length:
54+ $ref: /schemas/types.yaml#/definitions/uint32
55+ description: Set to the length of an EEPROM connected to the switch. Must be
56+ set if the switch can not detect the presence and/or size of a connected
57+ EEPROM, otherwise optional.
58+
59+ reset-gpios:
60+ description:
61+ GPIO to be used to reset the whole device
62+ maxItems: 1
63+
64+ interrupts:
65+ description: The switch provides an external interrupt line, but it is
66+ not always used by target systems.
67+ maxItems: 1
68+
69+ interrupt-controller:
70+ description: The switch has an internal interrupt controller used by
71+ the different sub-blocks.
72+
73+ '#interrupt-cells':
74+ description: The internal interrupt controller only supports triggering
75+ on active high level interrupts so the second cell must alway be set to
76+ IRQ_TYPE_LEVEL_HIGH.
77+ const: 2
78+
79+ mdio:
80+ $ref: /schemas/net/mdio.yaml#
81+ unevaluatedProperties: false
82+ description: Marvell MV88E6xxx switches have an varying combination of
83+ internal and external MDIO buses, in some cases a combined bus that
84+ can be used both internally and externally. This node is for the
85+ primary bus, used internally and sometimes also externally.
86+
87+ mdio-external:
88+ $ref: /schemas/net/mdio.yaml#
89+ unevaluatedProperties: false
90+ description: Marvell MV88E6xxx switches that have a separate external
91+ MDIO bus use this port to access external components on the MDIO bus.
92+
93+ properties:
94+ compatible:
95+ const: marvell,mv88e6xxx-mdio-external
96+
97+ required:
98+ - compatible
99+
100+allOf:
101+ - $ref: dsa.yaml#/$defs/ethernet-ports
102+
103+required:
104+ - compatible
105+ - reg
106+
107+unevaluatedProperties: false
108+
109+examples:
110+ - |
111+ #include <dt-bindings/gpio/gpio.h>
112+ mdio {
113+ #address-cells = <1>;
114+ #size-cells = <0>;
115+
116+ ethernet-switch@0 {
117+ compatible = "marvell,mv88e6085";
118+ reg = <0>;
119+ reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
120+
121+ mdio {
122+ #address-cells = <1>;
123+ #size-cells = <0>;
124+
125+ sw_phy0: ethernet-phy@0 {
126+ reg = <0x0>;
127+ };
128+
129+ sw_phy1: ethernet-phy@1 {
130+ reg = <0x1>;
131+ };
132+
133+ sw_phy2: ethernet-phy@2 {
134+ reg = <0x2>;
135+ };
136+
137+ sw_phy3: ethernet-phy@3 {
138+ reg = <0x3>;
139+ };
140+ };
141+
142+ ethernet-ports {
143+ #address-cells = <1>;
144+ #size-cells = <0>;
145+
146+ ethernet-port@0 {
147+ reg = <0>;
148+ label = "lan4";
149+ phy-handle = <&sw_phy0>;
150+ phy-mode = "internal";
151+ };
152+
153+ ethernet-port@1 {
154+ reg = <1>;
155+ label = "lan3";
156+ phy-handle = <&sw_phy1>;
157+ phy-mode = "internal";
158+ };
159+
160+ ethernet-port@2 {
161+ reg = <2>;
162+ label = "lan2";
163+ phy-handle = <&sw_phy2>;
164+ phy-mode = "internal";
165+ };
166+
167+ ethernet-port@3 {
168+ reg = <3>;
169+ label = "lan1";
170+ phy-handle = <&sw_phy3>;
171+ phy-mode = "internal";
172+ };
173+
174+ ethernet-port@5 {
175+ reg = <5>;
176+ ethernet = <&fec>;
177+ phy-mode = "rgmii-id";
178+
179+ fixed-link {
180+ speed = <1000>;
181+ full-duplex;
182+ };
183+ };
184+ };
185+ };
186+ };
187+ - |
188+ #include <dt-bindings/interrupt-controller/irq.h>
189+ mdio {
190+ #address-cells = <1>;
191+ #size-cells = <0>;
192+
193+ ethernet-switch@0 {
194+ compatible = "marvell,mv88e6190";
195+ #interrupt-cells = <2>;
196+ interrupt-controller;
197+ interrupt-parent = <&gpio1>;
198+ interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
199+ pinctrl-0 = <&switch_interrupt_pins>;
200+ pinctrl-names = "default";
201+ reg = <0>;
202+
203+ mdio {
204+ #address-cells = <1>;
205+ #size-cells = <0>;
206+
207+ switch0phy1: ethernet-phy@1 {
208+ reg = <0x1>;
209+ };
210+
211+ switch0phy2: ethernet-phy@2 {
212+ reg = <0x2>;
213+ };
214+
215+ switch0phy3: ethernet-phy@3 {
216+ reg = <0x3>;
217+ };
218+
219+ switch0phy4: ethernet-phy@4 {
220+ reg = <0x4>;
221+ };
222+
223+ switch0phy5: ethernet-phy@5 {
224+ reg = <0x5>;
225+ };
226+
227+ switch0phy6: ethernet-phy@6 {
228+ reg = <0x6>;
229+ };
230+
231+ switch0phy7: ethernet-phy@7 {
232+ reg = <0x7>;
233+ };
234+
235+ switch0phy8: ethernet-phy@8 {
236+ reg = <0x8>;
237+ };
238+ };
239+
240+ mdio-external {
241+ compatible = "marvell,mv88e6xxx-mdio-external";
242+ #address-cells = <1>;
243+ #size-cells = <0>;
244+
245+ phy1: ethernet-phy@b {
246+ reg = <0xb>;
247+ compatible = "ethernet-phy-ieee802.3-c45";
248+ };
249+
250+ phy2: ethernet-phy@c {
251+ reg = <0xc>;
252+ compatible = "ethernet-phy-ieee802.3-c45";
253+ };
254+ };
255+
256+ ethernet-ports {
257+ #address-cells = <1>;
258+ #size-cells = <0>;
259+
260+ ethernet-port@0 {
261+ ethernet = <&eth0>;
262+ phy-mode = "rgmii";
263+ reg = <0>;
264+
265+ fixed-link {
266+ full-duplex;
267+ pause;
268+ speed = <1000>;
269+ };
270+ };
271+
272+ ethernet-port@1 {
273+ label = "lan1";
274+ phy-handle = <&switch0phy1>;
275+ reg = <1>;
276+ };
277+
278+ ethernet-port@2 {
279+ label = "lan2";
280+ phy-handle = <&switch0phy2>;
281+ reg = <2>;
282+ };
283+
284+ ethernet-port@3 {
285+ label = "lan3";
286+ phy-handle = <&switch0phy3>;
287+ reg = <3>;
288+ };
289+
290+ ethernet-port@4 {
291+ label = "lan4";
292+ phy-handle = <&switch0phy4>;
293+ reg = <4>;
294+ };
295+
296+ ethernet-port@5 {
297+ label = "lan5";
298+ phy-handle = <&switch0phy5>;
299+ reg = <5>;
300+ };
301+
302+ ethernet-port@6 {
303+ label = "lan6";
304+ phy-handle = <&switch0phy6>;
305+ reg = <6>;
306+ };
307+
308+ ethernet-port@7 {
309+ label = "lan7";
310+ phy-handle = <&switch0phy7>;
311+ reg = <7>;
312+ };
313+
314+ ethernet-port@8 {
315+ label = "lan8";
316+ phy-handle = <&switch0phy8>;
317+ reg = <8>;
318+ };
319+
320+ ethernet-port@9 {
321+ /* 88X3310P external phy */
322+ label = "lan9";
323+ phy-handle = <&phy1>;
324+ phy-mode = "xaui";
325+ reg = <9>;
326+ };
327+
328+ ethernet-port@a {
329+ /* 88X3310P external phy */
330+ label = "lan10";
331+ phy-handle = <&phy2>;
332+ phy-mode = "xaui";
333+ reg = <0xa>;
334+ };
335+ };
336+ };
337+ };
Documentation/devicetree/bindings/net/dsa/marvell.txt+0−109
@@ -1,109 +0,0 @@
1−Marvell DSA Switch Device Tree Bindings
2−---------------------------------------
3−
4−WARNING: This binding is currently unstable. Do not program it into a
5−FLASH never to be changed again. Once this binding is stable, this
6−warning will be removed.
7−
8−If you need a stable binding, use the old dsa.txt binding.
9−
10−Marvell Switches are MDIO devices. The following properties should be
11−placed as a child node of an mdio device.
12−
13−The properties described here are those specific to Marvell devices.
14−Additional required and optional properties can be found in dsa.txt.
15−
16−The compatibility string is used only to find an identification register,
17−which is at a different MDIO base address in different switch families.
18−- "marvell,mv88e6085" : Switch has base address 0x10. Use with models:
19− 6085, 6095, 6097, 6123, 6131, 6141, 6161, 6165,
20− 6171, 6172, 6175, 6176, 6185, 6240, 6320, 6321,
21− 6341, 6350, 6351, 6352
22−- "marvell,mv88e6190" : Switch has base address 0x00. Use with models:
23− 6190, 6190X, 6191, 6290, 6361, 6390, 6390X
24−- "marvell,mv88e6250" : Switch has base address 0x08 or 0x18. Use with model:
25− 6220, 6250
26−
27−Required properties:
28−- compatible : Should be one of "marvell,mv88e6085",
29− "marvell,mv88e6190" or "marvell,mv88e6250" as
30− indicated above
31−- reg : Address on the MII bus for the switch.
32−
33−Optional properties:
34−
35−- reset-gpios : Should be a gpio specifier for a reset line
36−- interrupts : Interrupt from the switch
37−- interrupt-controller : Indicates the switch is itself an interrupt
38− controller. This is used for the PHY interrupts.
39−#interrupt-cells = <2> : Controller uses two cells, number and flag
40−- eeprom-length : Set to the length of an EEPROM connected to the
41− switch. Must be set if the switch can not detect
42− the presence and/or size of a connected EEPROM,
43− otherwise optional.
44−- mdio : Container of PHY and devices on the switches MDIO
45− bus.
46−- mdio? : Container of PHYs and devices on the external MDIO
47− bus. The node must contains a compatible string of
48− "marvell,mv88e6xxx-mdio-external"
49−
50−Example:
51−
52− mdio {
53− #address-cells = <1>;
54− #size-cells = <0>;
55− interrupt-parent = <&gpio0>;
56− interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
57− interrupt-controller;
58− #interrupt-cells = <2>;
59−
60− switch0: switch@0 {
61− compatible = "marvell,mv88e6085";
62− reg = <0>;
63− reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
64−
65− mdio {
66− #address-cells = <1>;
67− #size-cells = <0>;
68− switch1phy0: switch1phy0@0 {
69− reg = <0>;
70− interrupt-parent = <&switch0>;
71− interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
72− };
73− };
74− };
75− };
76−
77− mdio {
78− #address-cells = <1>;
79− #size-cells = <0>;
80− interrupt-parent = <&gpio0>;
81− interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
82− interrupt-controller;
83− #interrupt-cells = <2>;
84−
85− switch0: switch@0 {
86− compatible = "marvell,mv88e6190";
87− reg = <0>;
88− reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
89−
90− mdio {
91− #address-cells = <1>;
92− #size-cells = <0>;
93− switch1phy0: switch1phy0@0 {
94− reg = <0>;
95− interrupt-parent = <&switch0>;
96− interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
97− };
98− };
99−
100− mdio1 {
101− compatible = "marvell,mv88e6xxx-mdio-external";
102− #address-cells = <1>;
103− #size-cells = <0>;
104− switch1phy9: switch1phy0@9 {
105− reg = <9>;
106− };
107− };
108− };
109− };
Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml+33−1
@@ -11,7 +11,6 @@ maintainers: · 10 unmodified lines
1111 - Woojung Huh <Woojung.Huh@microchip.com>
1212
1313 allOf:
14− - $ref: dsa.yaml#/$defs/ethernet-ports
1514 - $ref: /schemas/spi/spi-peripheral-props.yaml#
1615
1716 properties:
@@ -78,6 +77,39 @@ required: · 60 unmodified lines
7877 - compatible
7978 - reg
8079
80+if:
81+ not:
82+ properties:
83+ compatible:
84+ enum:
85+ - microchip,ksz8863
86+ - microchip,ksz8873
87+then:
88+ $ref: dsa.yaml#/$defs/ethernet-ports
89+else:
90+ patternProperties:
91+ "^(ethernet-)?ports$":
92+ patternProperties:
93+ "^(ethernet-)?port@[0-2]$":
94+ $ref: dsa-port.yaml#
95+ unevaluatedProperties: false
96+ properties:
97+ microchip,rmii-clk-internal:
98+ $ref: /schemas/types.yaml#/definitions/flag
99+ description:
100+ When ksz88x3 is acting as clock provier (via REFCLKO) it
101+ can select between internal and external RMII reference
102+ clock. Internal reference clock means that the clock for
103+ the RMII of ksz88x3 is provided by the ksz88x3 internally
104+ and the REFCLKI pin is unconnected. For the external
105+ reference clock, the clock needs to be fed back to ksz88x3
106+ via REFCLKI.
107+ If microchip,rmii-clk-internal is set, ksz88x3 will provide
108+ rmii reference clock internally, otherwise reference clock
109+ should be provided externally.
110+ dependencies:
111+ microchip,rmii-clk-internal: [ethernet]
112+
81113 unevaluatedProperties: false
82114
83115 examples:
Documentation/devicetree/bindings/net/ethernet-switch.yaml+20−3
@@ -20,9 +20,26 @@ description: · 19 unmodified lines
2020
2121 select: false
2222
23−properties:
24− $nodename:
25− pattern: "^(ethernet-)?switch(@.*)?$"
23+allOf:
24+ # This condition is here to satisfy the case where certain device
25+ # nodes have to preserve non-standard names because of
26+ # backward-compatibility with boot loaders inspecting certain
27+ # node names.
28+ - if:
29+ properties:
30+ compatible:
31+ contains:
32+ enum:
33+ - marvell,turris-mox-mv88e6085
34+ - marvell,turris-mox-mv88e6190
35+ then:
36+ properties:
37+ $nodename:
38+ pattern: "switch[0-3]@[0-3]+$"
39+ else:
40+ properties:
41+ $nodename:
42+ pattern: "^(ethernet-)?switch(@.*)?$"
2643
2744 patternProperties:
2845 "^(ethernet-)?ports$":
Documentation/devicetree/bindings/net/lantiq,pef2256.yaml+213−0
@@ -0,0 +1,213 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/net/lantiq,pef2256.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Lantiq PEF2256
8+
9+maintainers:
10+ - Herve Codina <herve.codina@bootlin.com>
11+
12+description:
13+ The Lantiq PEF2256, also known as Infineon PEF2256 or FALC56, is a framer and
14+ line interface component designed to fulfill all required interfacing between
15+ an analog E1/T1/J1 line and the digital PCM system highway/H.100 bus.
16+
17+properties:
18+ compatible:
19+ items:
20+ - const: lantiq,pef2256
21+
22+ reg:
23+ maxItems: 1
24+
25+ clocks:
26+ items:
27+ - description: Master Clock
28+ - description: System Clock Receive
29+ - description: System Clock Transmit
30+
31+ clock-names:
32+ items:
33+ - const: mclk
34+ - const: sclkr
35+ - const: sclkx
36+
37+ interrupts:
38+ maxItems: 1
39+
40+ reset-gpios:
41+ description:
42+ GPIO used to reset the device.
43+ maxItems: 1
44+
45+ pinctrl:
46+ $ref: /schemas/pinctrl/pinctrl.yaml#
47+ additionalProperties: false
48+
49+ patternProperties:
50+ '-pins$':
51+ type: object
52+ $ref: /schemas/pinctrl/pinmux-node.yaml#
53+ additionalProperties: false
54+
55+ properties:
56+ pins:
57+ enum: [ RPA, RPB, RPC, RPD, XPA, XPB, XPC, XPD ]
58+
59+ function:
60+ enum: [ SYPR, RFM, RFMB, RSIGM, RSIG, DLR, FREEZE, RFSP, LOS,
61+ SYPX, XFMS, XSIG, TCLK, XMFB, XSIGM, DLX, XCLK, XLT,
62+ GPI, GPOH, GPOL ]
63+
64+ required:
65+ - pins
66+ - function
67+
68+ lantiq,data-rate-bps:
69+ enum: [2048000, 4096000, 8192000, 16384000]
70+ default: 2048000
71+ description:
72+ Data rate (bit per seconds) on the system highway.
73+
74+ lantiq,clock-falling-edge:
75+ $ref: /schemas/types.yaml#/definitions/flag
76+ description:
77+ Data is sent on falling edge of the clock (and received on the rising
78+ edge). If 'clock-falling-edge' is not present, data is sent on the
79+ rising edge (and received on the falling edge).
80+
81+ lantiq,channel-phase:
82+ $ref: /schemas/types.yaml#/definitions/uint32
83+ enum: [0, 1, 2, 3, 4, 5, 6, 7]
84+ default: 0
85+ description: |
86+ The pef2256 delivers a full frame (32 8-bit time-slots in E1 and 24 8-bit
87+ time-slots 8 8-bit signaling in E1/J1) every 125us. This lead to a data
88+ rate of 2048000 bit/s. When lantiq,data-rate-bps is more than 2048000
89+ bit/s, the data (all 32 8-bit) present in the frame are interleave with
90+ unused time-slots. The lantiq,channel-phase property allows to set the
91+ correct alignment of the interleave mechanism.
92+ For instance, suppose lantiq,data-rate-bps = 8192000 (ie 4*2048000), and
93+ lantiq,channel-phase = 2, the interleave schema with unused time-slots
94+ (nu) and used time-slots (XX) for TSi is
95+ nu nu XX nu nu nu XX nu nu nu XX nu
96+ <-- TSi --> <- TSi+1 -> <- TSi+2 ->
97+ With lantiq,data-rate-bps = 8192000, and lantiq,channel-phase = 1, the
98+ interleave schema is
99+ nu XX nu nu nu XX nu nu nu XX nu nu
100+ <-- TSi --> <- TSi+1 -> <- TSi+2 ->
101+ With lantiq,data-rate-bps = 4096000 (ie 2*2048000), and
102+ lantiq,channel-phase = 1, the interleave schema is
103+ nu XX nu XX nu XX
104+ <-- TSi --> <- TSi+1 -> <- TSi+2 ->
105+
106+patternProperties:
107+ '^codec(-([0-9]|[1-2][0-9]|3[0-1]))?$':
108+ type: object
109+ $ref: /schemas/sound/dai-common.yaml
110+ unevaluatedProperties: false
111+ description:
112+ Codec provided by the pef2256. This codec allows to use some of the PCM
113+ system highway time-slots as audio channels to transport audio data over
114+ the E1/T1/J1 lines.
115+ The time-slots used by the codec must be set and so, the properties
116+ 'dai-tdm-slot-num', 'dai-tdm-slot-width', 'dai-tdm-slot-tx-mask' and
117+ 'dai-tdm-slot-rx-mask' must be present in the sound card node for
118+ sub-nodes that involve the codec. The codec uses 8-bit time-slots.
119+ 'dai-tdm-tdm-slot-with' must be set to 8.
120+ The tx and rx masks define the pef2256 time-slots assigned to the codec.
121+
122+ properties:
123+ compatible:
124+ const: lantiq,pef2256-codec
125+
126+ '#sound-dai-cells':
127+ const: 0
128+
129+ required:
130+ - compatible
131+ - '#sound-dai-cells'
132+
133+required:
134+ - compatible
135+ - reg
136+ - clocks
137+ - clock-names
138+ - interrupts
139+
140+additionalProperties: false
141+
142+examples:
143+ - |
144+ #include <dt-bindings/gpio/gpio.h>
145+ #include <dt-bindings/interrupt-controller/irq.h>
146+
147+ pef2256: framer@2000000 {
148+ compatible = "lantiq,pef2256";
149+ reg = <0x2000000 0x100>;
150+ interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
151+ interrupt-parent = <&intc>;
152+ clocks = <&clk_mclk>, <&clk_sclkr>, <&clk_sclkx>;
153+ clock-names = "mclk", "sclkr", "sclkx";
154+ reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
155+ lantiq,data-rate-bps = <4096000>;
156+
157+ pinctrl {
158+ pef2256_rpa_sypr: rpa-pins {
159+ pins = "RPA";
160+ function = "SYPR";
161+ };
162+ pef2256_xpa_sypx: xpa-pins {
163+ pins = "XPA";
164+ function = "SYPX";
165+ };
166+ };
167+
168+ pef2256_codec0: codec-0 {
169+ compatible = "lantiq,pef2256-codec";
170+ #sound-dai-cells = <0>;
171+ sound-name-prefix = "PEF2256_0";
172+ };
173+
174+ pef2256_codec1: codec-1 {
175+ compatible = "lantiq,pef2256-codec";
176+ #sound-dai-cells = <0>;
177+ sound-name-prefix = "PEF2256_1";
178+ };
179+ };
180+
181+ sound {
182+ compatible = "simple-audio-card";
183+ #address-cells = <1>;
184+ #size-cells = <0>;
185+ simple-audio-card,dai-link@0 { /* CPU DAI1 - pef2256 codec 1 */
186+ reg = <0>;
187+ cpu {
188+ sound-dai = <&cpu_dai1>;
189+ };
190+ codec {
191+ sound-dai = <&pef2256_codec0>;
192+ dai-tdm-slot-num = <4>;
193+ dai-tdm-slot-width = <8>;
194+ /* TS 1, 2, 3, 4 */
195+ dai-tdm-slot-tx-mask = <0 1 1 1 1>;
196+ dai-tdm-slot-rx-mask = <0 1 1 1 1>;
197+ };
198+ };
199+ simple-audio-card,dai-link@1 { /* CPU DAI2 - pef2256 codec 2 */
200+ reg = <1>;
201+ cpu {
202+ sound-dai = <&cpu_dai2>;
203+ };
204+ codec {
205+ sound-dai = <&pef2256_codec1>;
206+ dai-tdm-slot-num = <4>;
207+ dai-tdm-slot-width = <8>;
208+ /* TS 5, 6, 7, 8 */
209+ dai-tdm-slot-tx-mask = <0 0 0 0 0 1 1 1 1>;
210+ dai-tdm-slot-rx-mask = <0 0 0 0 0 1 1 1 1>;
211+ };
212+ };
213+ };
Documentation/devicetree/bindings/net/marvell,aquantia.yaml+116−0
@@ -0,0 +1,116 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/net/marvell,aquantia.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Marvell Aquantia Ethernet PHY
8+
9+maintainers:
10+ - Christian Marangi <ansuelsmth@gmail.com>
11+
12+description: |
13+ Marvell Aquantia Ethernet PHY require a firmware to be loaded to actually
14+ work.
15+
16+ This can be done and is implemented by OEM in 3 different way:
17+ - Attached SPI flash directly to the PHY with the firmware. The PHY
18+ will self load the firmware in the presence of this configuration.
19+ - Read from a dedicated partition on system NAND declared in an
20+ NVMEM cell, and loaded to the PHY using its mailbox interface.
21+ - Manually provided firmware loaded from a file in the filesystem.
22+
23+allOf:
24+ - $ref: ethernet-phy.yaml#
25+
26+select:
27+ properties:
28+ compatible:
29+ contains:
30+ enum:
31+ - ethernet-phy-id03a1.b445
32+ - ethernet-phy-id03a1.b460
33+ - ethernet-phy-id03a1.b4a2
34+ - ethernet-phy-id03a1.b4d0
35+ - ethernet-phy-id03a1.b4e0
36+ - ethernet-phy-id03a1.b5c2
37+ - ethernet-phy-id03a1.b4b0
38+ - ethernet-phy-id03a1.b662
39+ - ethernet-phy-id03a1.b712
40+ - ethernet-phy-id31c3.1c12
41+ required:
42+ - compatible
43+
44+properties:
45+ reg:
46+ maxItems: 1
47+
48+ firmware-name:
49+ description: specify the name of PHY firmware to load
50+
51+ nvmem-cells:
52+ description: phandle to the firmware nvmem cell
53+ maxItems: 1
54+
55+ nvmem-cell-names:
56+ const: firmware
57+
58+required:
59+ - compatible
60+ - reg
61+
62+unevaluatedProperties: false
63+
64+examples:
65+ - |
66+ mdio {
67+ #address-cells = <1>;
68+ #size-cells = <0>;
69+
70+ ethernet-phy@0 {
71+ compatible = "ethernet-phy-id31c3.1c12",
72+ "ethernet-phy-ieee802.3-c45";
73+
74+ reg = <0>;
75+ firmware-name = "AQR-G4_v5.4.C-AQR_CIG_WF-1945_0x8_ID44776_VER1630.cld";
76+ };
77+
78+ ethernet-phy@1 {
79+ compatible = "ethernet-phy-id31c3.1c12",
80+ "ethernet-phy-ieee802.3-c45";
81+
82+ reg = <1>;
83+ nvmem-cells = <&aqr_fw>;
84+ nvmem-cell-names = "firmware";
85+ };
86+ };
87+
88+ flash {
89+ compatible = "jedec,spi-nor";
90+ #address-cells = <1>;
91+ #size-cells = <1>;
92+
93+ partitions {
94+ compatible = "fixed-partitions";
95+ #address-cells = <1>;
96+ #size-cells = <1>;
97+
98+ /* ... */
99+
100+ partition@650000 {
101+ compatible = "nvmem-cells";
102+ label = "0:ethphyfw";
103+ reg = <0x650000 0x80000>;
104+ read-only;
105+ #address-cells = <1>;
106+ #size-cells = <1>;
107+
108+ aqr_fw: aqr_fw@0 {
109+ reg = <0x0 0x5f42a>;
110+ };
111+ };
112+
113+ /* ... */
114+
115+ };
116+ };
Documentation/devicetree/bindings/net/marvell,mvusb.yaml+5−2
@@ -50,11 +50,14 @@ examples: · 49 unmodified lines
5050 #address-cells = <1>;
5151 #size-cells = <0>;
5252
53− switch@0 {
53+ ethernet-switch@0 {
5454 compatible = "marvell,mv88e6190";
5555 reg = <0x0>;
5656
57− ports {
57+ ethernet-ports {
58+ #address-cells = <1>;
59+ #size-cells = <0>;
60+
5861 /* Port definitions */
5962 };
6063
Documentation/devicetree/bindings/net/marvell,orion-mdio.yaml+0−22
@@ -39,28 +39,6 @@ required: · 38 unmodified lines
3939 allOf:
4040 - $ref: mdio.yaml#
4141
42− - if:
43− required:
44− - interrupts
45−
46− then:
47− properties:
48− reg:
49− items:
50− - items:
51− - $ref: /schemas/types.yaml#/definitions/cell
52− - const: 0x84
53−
54− else:
55− properties:
56− reg:
57− items:
58− - items:
59− - $ref: /schemas/types.yaml#/definitions/cell
60− - enum:
61− - 0x4
62− - 0x10
63−
6442 unevaluatedProperties: false
6543
6644 examples:
Documentation/devicetree/bindings/net/pcs/mediatek,sgmiisys.yaml+56−9
@@ -15,15 +15,22 @@ description: · 14 unmodified lines
1515
1616 properties:
1717 compatible:
18− items:
19− - enum:
20− - mediatek,mt7622-sgmiisys
21− - mediatek,mt7629-sgmiisys
22− - mediatek,mt7981-sgmiisys_0
23− - mediatek,mt7981-sgmiisys_1
24− - mediatek,mt7986-sgmiisys_0
25− - mediatek,mt7986-sgmiisys_1
26− - const: syscon
18+ oneOf:
19+ - items:
20+ - enum:
21+ - mediatek,mt7622-sgmiisys
22+ - mediatek,mt7629-sgmiisys
23+ - mediatek,mt7981-sgmiisys_0
24+ - mediatek,mt7981-sgmiisys_1
25+ - mediatek,mt7986-sgmiisys_0
26+ - mediatek,mt7986-sgmiisys_1
27+ - const: syscon
28+ - items:
29+ - enum:
30+ - mediatek,mt7988-sgmiisys0
31+ - mediatek,mt7988-sgmiisys1
32+ - const: simple-mfd
33+ - const: syscon
2734
2835 reg:
2936 maxItems: 1
@@ -35,11 +42,51 @@ properties: · 5 unmodified lines
3542 description: Invert polarity of the SGMII data lanes
3643 type: boolean
3744
45+ pcs:
46+ type: object
47+ description: MediaTek LynxI HSGMII PCS
48+ properties:
49+ compatible:
50+ const: mediatek,mt7988-sgmii
51+
52+ clocks:
53+ maxItems: 3
54+
55+ clock-names:
56+ items:
57+ - const: sgmii_sel
58+ - const: sgmii_tx
59+ - const: sgmii_rx
60+
61+ required:
62+ - compatible
63+ - clocks
64+ - clock-names
65+
66+ additionalProperties: false
67+
3868 required:
3969 - compatible
4070 - reg
4171 - '#clock-cells'
4272
73+allOf:
74+ - if:
75+ properties:
76+ compatible:
77+ contains:
78+ enum:
79+ - mediatek,mt7988-sgmiisys0
80+ - mediatek,mt7988-sgmiisys1
81+
82+ then:
83+ required:
84+ - pcs
85+
86+ else:
87+ properties:
88+ pcs: false
89+
4390 additionalProperties: false
4491
4592 examples:
Documentation/devicetree/bindings/net/qcom,ipa.yaml+15−9
@@ -43,15 +43,21 @@ description: · 42 unmodified lines
4343
4444 properties:
4545 compatible:
46− enum:
47− - qcom,msm8998-ipa
48− - qcom,sc7180-ipa
49− - qcom,sc7280-ipa
50− - qcom,sdm845-ipa
51− - qcom,sdx55-ipa
52− - qcom,sdx65-ipa
53− - qcom,sm6350-ipa
54− - qcom,sm8350-ipa
46+ oneOf:
47+ - enum:
48+ - qcom,msm8998-ipa
49+ - qcom,sc7180-ipa
50+ - qcom,sc7280-ipa
51+ - qcom,sdm845-ipa
52+ - qcom,sdx55-ipa
53+ - qcom,sdx65-ipa
54+ - qcom,sm6350-ipa
55+ - qcom,sm8350-ipa
56+ - qcom,sm8550-ipa
57+ - items:
58+ - enum:
59+ - qcom,sm8650-ipa
60+ - const: qcom,sm8550-ipa
5561
5662 reg:
5763 items:
Documentation/devicetree/bindings/net/renesas,etheravb.yaml+2−1
@@ -55,9 +55,10 @@ properties: · 54 unmodified lines
5555
5656 - items:
5757 - enum:
58− - renesas,r9a07g043-gbeth # RZ/G2UL
58+ - renesas,r9a07g043-gbeth # RZ/G2UL and RZ/Five
5959 - renesas,r9a07g044-gbeth # RZ/G2{L,LC}
6060 - renesas,r9a07g054-gbeth # RZ/V2L
61+ - renesas,r9a08g045-gbeth # RZ/G3S
6162 - const: renesas,rzg2l-gbeth # RZ/{G2L,G2UL,V2L} family
6263
6364 reg: true
Documentation/devicetree/bindings/net/renesas,ethertsn.yaml+133−0
@@ -0,0 +1,133 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/net/renesas,ethertsn.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Renesas Ethernet TSN End-station
8+
9+maintainers:
10+ - Niklas Söderlund <niklas.soderlund@ragnatech.se>
11+
12+description:
13+ The RTSN device provides Ethernet network using a 10 Mbps, 100 Mbps, or 1
14+ Gbps full-duplex link via MII/GMII/RMII/RGMII. Depending on the connected PHY.
15+
16+allOf:
17+ - $ref: ethernet-controller.yaml#
18+
19+properties:
20+ compatible:
21+ items:
22+ - enum:
23+ - renesas,r8a779g0-ethertsn # R-Car V4H
24+ - const: renesas,rcar-gen4-ethertsn
25+
26+ reg:
27+ items:
28+ - description: TSN End Station target
29+ - description: generalized Precision Time Protocol target
30+
31+ reg-names:
32+ items:
33+ - const: tsnes
34+ - const: gptp
35+
36+ interrupts:
37+ items:
38+ - description: TX data interrupt
39+ - description: RX data interrupt
40+
41+ interrupt-names:
42+ items:
43+ - const: tx
44+ - const: rx
45+
46+ clocks:
47+ maxItems: 1
48+
49+ power-domains:
50+ maxItems: 1
51+
52+ resets:
53+ maxItems: 1
54+
55+ phy-mode:
56+ contains:
57+ enum:
58+ - mii
59+ - rgmii
60+
61+ phy-handle:
62+ $ref: /schemas/types.yaml#/definitions/phandle
63+ description:
64+ Specifies a reference to a node representing a PHY device.
65+
66+ rx-internal-delay-ps:
67+ enum: [0, 1800]
68+
69+ tx-internal-delay-ps:
70+ enum: [0, 2000]
71+
72+ '#address-cells':
73+ const: 1
74+
75+ '#size-cells':
76+ const: 0
77+
78+patternProperties:
79+ "^ethernet-phy@[0-9a-f]$":
80+ type: object
81+ $ref: ethernet-phy.yaml#
82+ unevaluatedProperties: false
83+
84+required:
85+ - compatible
86+ - reg
87+ - reg-names
88+ - interrupts
89+ - interrupt-names
90+ - clocks
91+ - power-domains
92+ - resets
93+ - phy-mode
94+ - phy-handle
95+ - '#address-cells'
96+ - '#size-cells'
97+
98+additionalProperties: false
99+
100+examples:
101+ - |
102+ #include <dt-bindings/clock/r8a779g0-cpg-mssr.h>
103+ #include <dt-bindings/interrupt-controller/arm-gic.h>
104+ #include <dt-bindings/power/r8a779g0-sysc.h>
105+ #include <dt-bindings/gpio/gpio.h>
106+
107+ tsn0: ethernet@e6460000 {
108+ compatible = "renesas,r8a779g0-ethertsn", "renesas,rcar-gen4-ethertsn";
109+ reg = <0xe6460000 0x7000>,
110+ <0xe6449000 0x500>;
111+ reg-names = "tsnes", "gptp";
112+ interrupts = <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
113+ <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>;
114+ interrupt-names = "tx", "rx";
115+ clocks = <&cpg CPG_MOD 2723>;
116+ power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
117+ resets = <&cpg 2723>;
118+
119+ phy-mode = "rgmii";
120+ tx-internal-delay-ps = <2000>;
121+ phy-handle = <&phy3>;
122+
123+ #address-cells = <1>;
124+ #size-cells = <0>;
125+
126+ phy3: ethernet-phy@3 {
127+ compatible = "ethernet-phy-ieee802.3-c45";
128+ reg = <0>;
129+ interrupt-parent = <&gpio4>;
130+ interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
131+ reset-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
132+ };
133+ };
Documentation/devicetree/bindings/net/sff,sfp.yaml+1−1
@@ -120,7 +120,7 @@ examples: · 119 unmodified lines
120120 pinctrl-names = "default";
121121 pinctrl-0 = <&cps_sfpp0_pins>;
122122 tx-disable-gpios = <&cps_gpio1 29 GPIO_ACTIVE_HIGH>;
123− tx-fault-gpios = <&cps_gpio1 26 GPIO_ACTIVE_HIGH>;
123+ tx-fault-gpios = <&cps_gpio1 26 GPIO_ACTIVE_HIGH>;
124124 };
125125
126126 mdio {
Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml+16−0
@@ -122,6 +122,20 @@ properties: · 121 unmodified lines
122122 and "phy-handle" should point to an external PHY if exists.
123123 maxItems: 1
124124
125+ dmas:
126+ minItems: 2
127+ maxItems: 32
128+ description: TX and RX DMA channel phandle
129+
130+ dma-names:
131+ items:
132+ pattern: "^[tr]x_chan([0-9]|1[0-5])$"
133+ description:
134+ Should be "tx_chan0", "tx_chan1" ... "tx_chan15" for DMA Tx channel
135+ Should be "rx_chan0", "rx_chan1" ... "rx_chan15" for DMA Rx channel
136+ minItems: 2
137+ maxItems: 32
138+
125139 required:
126140 - compatible
127141 - interrupts
@@ -143,6 +157,8 @@ examples: · 15 unmodified lines
143157 clocks = <&axi_clk>, <&axi_clk>, <&pl_enet_ref_clk>, <&mgt_clk>;
144158 phy-mode = "mii";
145159 reg = <0x40c00000 0x40000>,<0x50c00000 0x40000>;
160+ dmas = <&xilinx_dma 0>, <&xilinx_dma 1>;
161+ dma-names = "tx_chan0", "rx_chan0";
146162 xlnx,rxcsum = <0x2>;
147163 xlnx,rxmem = <0x800>;
148164 xlnx,txcsum = <0x2>;
Documentation/devicetree/bindings/nvmem/mxs-ocotp.yaml+6−4
@@ -15,9 +15,11 @@ allOf: · 14 unmodified lines
1515
1616 properties:
1717 compatible:
18− enum:
19− - fsl,imx23-ocotp
20− - fsl,imx28-ocotp
18+ items:
19+ - enum:
20+ - fsl,imx23-ocotp
21+ - fsl,imx28-ocotp
22+ - const: fsl,ocotp
2123
2224 reg:
2325 maxItems: 1
@@ -35,7 +37,7 @@ unevaluatedProperties: false · 11 unmodified lines
3537 examples:
3638 - |
3739 ocotp: efuse@8002c000 {
38− compatible = "fsl,imx28-ocotp";
40+ compatible = "fsl,imx28-ocotp", "fsl,ocotp";
3941 #address-cells = <1>;
4042 #size-cells = <1>;
4143 reg = <0x8002c000 0x2000>;
Documentation/devicetree/bindings/nvmem/st,stm32-romem.yaml+1−0
@@ -24,6 +24,7 @@ properties: · 23 unmodified lines
2424 - st,stm32f4-otp
2525 - st,stm32mp13-bsec
2626 - st,stm32mp15-bsec
27+ - st,stm32mp25-bsec
2728
2829 reg:
2930 maxItems: 1
Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml+18−0
@@ -64,6 +64,24 @@ properties: · 63 unmodified lines
6464
6565 aspm-no-l0s: true
6666
67+ brcm,clkreq-mode:
68+ description: A string that determines the operating
69+ clkreq mode of the PCIe RC HW with respect to controlling the refclk
70+ signal. There are three different modes -- "safe", which drives the
71+ refclk signal unconditionally and will work for all devices but does
72+ not provide any power savings; "no-l1ss" -- which provides Clock
73+ Power Management, L0s, and L1, but cannot provide L1 substate (L1SS)
74+ power savings. If the downstream device connected to the RC is L1SS
75+ capable AND the OS enables L1SS, all PCIe traffic may abruptly halt,
76+ potentially hanging the system; "default" -- which provides L0s, L1,
77+ and L1SS, but not compliant to provide Clock Power Management;
78+ specifically, may not be able to meet the T_CLRon max timing of 400ns
79+ as specified in "Dynamic Clock Control", section 3.2.5.2.2 PCI
80+ Express Mini CEM 2.1 specification. This situation is atypical and
81+ should happen only with older devices.
82+ $ref: /schemas/types.yaml#/definitions/string
83+ enum: [ safe, no-l1ss, default ]
84+
6785 brcm,scb-sizes:
6886 description: u64 giving the 64bit PCIe memory
6987 viewport size of a memory controller. There may be up to
Documentation/devicetree/bindings/pci/qcom,pcie.yaml+60−3
@@ -41,6 +41,10 @@ properties: · 40 unmodified lines
4141 - qcom,pcie-sm8450-pcie0
4242 - qcom,pcie-sm8450-pcie1
4343 - qcom,pcie-sm8550
44+ - items:
45+ - enum:
46+ - qcom,pcie-sm8650
47+ - const: qcom,pcie-sm8550
4448 - items:
4549 - const: qcom,pcie-msm8998
4650 - const: qcom,pcie-msm8996
@@ -62,7 +66,8 @@ properties: · 15 unmodified lines
6266 maxItems: 8
6367
6468 iommu-map:
65− maxItems: 2
69+ minItems: 1
70+ maxItems: 16
6671
6772 # Common definitions for clocks, clock-names and reset.
6873 # Platform constraints are described later.
@@ -88,7 +93,7 @@ properties: · 19 unmodified lines
8893 minItems: 1
8994 maxItems: 12
9095
91− resets-names:
96+ reset-names:
9297 minItems: 1
9398 maxItems: 12
9499
@@ -478,6 +483,33 @@ allOf: · 383 unmodified lines
478483 items:
479484 - const: pci # PCIe core reset
480485
486+ - if:
487+ properties:
488+ compatible:
489+ contains:
490+ enum:
491+ - qcom,pcie-sc8180x
492+ then:
493+ properties:
494+ clocks:
495+ minItems: 8
496+ maxItems: 8
497+ clock-names:
498+ items:
499+ - const: pipe # PIPE clock
500+ - const: aux # Auxiliary clock
501+ - const: cfg # Configuration clock
502+ - const: bus_master # Master AXI clock
503+ - const: bus_slave # Slave AXI clock
504+ - const: slave_q2a # Slave Q2A clock
505+ - const: ref # REFERENCE clock
506+ - const: tbu # PCIe TBU clock
507+ resets:
508+ maxItems: 1
509+ reset-names:
510+ items:
511+ - const: pci # PCIe core reset
512+
481513 - if:
482514 properties:
483515 compatible:
@@ -526,8 +558,33 @@ allOf: · 42 unmodified lines
526558 compatible:
527559 contains:
528560 enum:
529− - qcom,pcie-sc8180x
530561 - qcom,pcie-sm8150
562+ then:
563+ properties:
564+ clocks:
565+ minItems: 8
566+ maxItems: 8
567+ clock-names:
568+ items:
569+ - const: pipe # PIPE clock
570+ - const: aux # Auxiliary clock
571+ - const: cfg # Configuration clock
572+ - const: bus_master # Master AXI clock
573+ - const: bus_slave # Slave AXI clock
574+ - const: slave_q2a # Slave Q2A clock
575+ - const: tbu # PCIe TBU clock
576+ - const: ref # REFERENCE clock
577+ resets:
578+ maxItems: 1
579+ reset-names:
580+ items:
581+ - const: pci # PCIe core reset
582+
583+ - if:
584+ properties:
585+ compatible:
586+ contains:
587+ enum:
531588 - qcom,pcie-sm8250
532589 then:
533590 oneOf:
Documentation/devicetree/bindings/pci/rcar-pci-host.yaml+11−0
@@ -68,6 +68,15 @@ properties: · 67 unmodified lines
6868 phy-names:
6969 const: pcie
7070
71+ vpcie1v5-supply:
72+ description: The 1.5v regulator to use for PCIe.
73+
74+ vpcie3v3-supply:
75+ description: The 3.3v regulator to use for PCIe.
76+
77+ vpcie12v-supply:
78+ description: The 12v regulator to use for PCIe.
79+
7180 required:
7281 - compatible
7382 - reg
@@ -121,5 +130,7 @@ examples: · 47 unmodified lines
121130 clock-names = "pcie", "pcie_bus";
122131 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
123132 resets = <&cpg 319>;
133+ vpcie3v3-supply = <&pcie_3v3>;
134+ vpcie12v-supply = <&pcie_12v>;
124135 };
125136 };
Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml+2−0
@@ -49,6 +49,7 @@ properties: · 48 unmodified lines
4949 - description: APB clock for PCIe
5050 - description: Auxiliary clock for PCIe
5151 - description: PIPE clock
52+ - description: Reference clock for PCIe
5253
5354 clock-names:
5455 minItems: 5
@@ -59,6 +60,7 @@ properties: · 4 unmodified lines
5960 - const: pclk
6061 - const: aux
6162 - const: pipe
63+ - const: ref
6264
6365 interrupts:
6466 items:
Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml+36−3
@@ -10,13 +10,11 @@ title: TI J721E PCI EP (PCIe Wrapper) · 9 unmodified lines
1010 maintainers:
1111 - Kishon Vijay Abraham I <kishon@ti.com>
1212
13−allOf:
14− - $ref: cdns-pcie-ep.yaml#
15−
1613 properties:
1714 compatible:
1815 oneOf:
1916 - const: ti,j721e-pcie-ep
17+ - const: ti,j784s4-pcie-ep
2018 - description: PCIe EP controller in AM64
2119 items:
2220 - const: ti,am64-pcie-ep
@@ -65,6 +63,41 @@ properties: · 42 unmodified lines
6563 items:
6664 - const: link_state
6765
66+allOf:
67+ - $ref: cdns-pcie-ep.yaml#
68+ - if:
69+ properties:
70+ compatible:
71+ enum:
72+ - ti,am64-pcie-ep
73+ then:
74+ properties:
75+ num-lanes:
76+ const: 1
77+
78+ - if:
79+ properties:
80+ compatible:
81+ enum:
82+ - ti,j7200-pcie-ep
83+ - ti,j721e-pcie-ep
84+ then:
85+ properties:
86+ num-lanes:
87+ minimum: 1
88+ maximum: 2
89+
90+ - if:
91+ properties:
92+ compatible:
93+ enum:
94+ - ti,j784s4-pcie-ep
95+ then:
96+ properties:
97+ num-lanes:
98+ minimum: 1
99+ maximum: 4
100+
68101 required:
69102 - compatible
70103 - reg
Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml+36−3
@@ -10,13 +10,11 @@ title: TI J721E PCI Host (PCIe Wrapper) · 9 unmodified lines
1010 maintainers:
1111 - Kishon Vijay Abraham I <kishon@ti.com>
1212
13−allOf:
14− - $ref: cdns-pcie-host.yaml#
15−
1613 properties:
1714 compatible:
1815 oneOf:
1916 - const: ti,j721e-pcie-host
17+ - const: ti,j784s4-pcie-host
2018 - description: PCIe controller in AM64
2119 items:
2220 - const: ti,am64-pcie-host
@@ -94,6 +92,41 @@ properties: · 71 unmodified lines
9492 interrupts:
9593 maxItems: 1
9694
95+allOf:
96+ - $ref: cdns-pcie-host.yaml#
97+ - if:
98+ properties:
99+ compatible:
100+ enum:
101+ - ti,am64-pcie-host
102+ then:
103+ properties:
104+ num-lanes:
105+ const: 1
106+
107+ - if:
108+ properties:
109+ compatible:
110+ enum:
111+ - ti,j7200-pcie-host
112+ - ti,j721e-pcie-host
113+ then:
114+ properties:
115+ num-lanes:
116+ minimum: 1
117+ maximum: 2
118+
119+ - if:
120+ properties:
121+ compatible:
122+ enum:
123+ - ti,j784s4-pcie-host
124+ then:
125+ properties:
126+ num-lanes:
127+ minimum: 1
128+ maximum: 4
129+
97130 required:
98131 - compatible
99132 - reg
Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml+1−1
@@ -83,7 +83,7 @@ examples: · 82 unmodified lines
8383 <0x0 0x28050000 0x0 0x00010000>,
8484 <0x0 0x24200000 0x0 0x00002000>,
8585 <0x0 0x24162000 0x0 0x00001000>;
86− reg-names = "dbi", "config", "ulreg", "smu", "mpu";
86+ reg-names = "dbi", "config", "ulreg", "smu", "mpu";
8787 device_type = "pci";
8888 bus-range = <0x00 0xff>;
8989 num-lanes = <2>;
Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml+3−0
@@ -27,6 +27,9 @@ properties: · 26 unmodified lines
2727 - fsl,imx8mq-ddr-pmu
2828 - fsl,imx8mp-ddr-pmu
2929 - const: fsl,imx8m-ddr-pmu
30+ - items:
31+ - const: fsl,imx8dxl-ddr-pmu
32+ - const: fsl,imx8-ddr-pmu
3033
3134 reg:
3235 maxItems: 1
Documentation/devicetree/bindings/perf/riscv,pmu.yaml+1−1
@@ -90,7 +90,7 @@ properties: · 89 unmodified lines
9090 bitmap of all MHPMCOUNTERx that can monitor the range of events
9191
9292 dependencies:
93− "riscv,event-to-mhpmevent": [ "riscv,event-to-mhpmcounters" ]
93+ riscv,event-to-mhpmevent: [ "riscv,event-to-mhpmcounters" ]

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drivers/acpi/mipi-disco-img.c+725−0

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drivers/acpi/nfit/core.c+30−35

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drivers/acpi/numa/hmat.c+164−29

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drivers/acpi/thermal_lib.crenamed from drivers/thermal/thermal_acpi.c+65−15

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drivers/base/regmap/regmap-kunit.c+60−0

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drivers/base/soc.c+3−3

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drivers/base/swnode.c+7−4

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drivers/bcma/driver_pci_host.c+1−1

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drivers/block/aoe/aoeblk.c+2−1

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drivers/block/floppy.c+1−1

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drivers/block/null_blk/main.c+4−13

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drivers/block/null_blk/zoned.c+1−1

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drivers/block/rnbd/rnbd-clt.c+8−5

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drivers/block/rnbd/rnbd-proto.h+10−4

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drivers/block/rnbd/rnbd-srv.c+23−21

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drivers/block/ublk_drv.c+4−9

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drivers/block/xen-blkback/common.h+1−1

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drivers/block/zram/Kconfig+12−3

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drivers/block/zram/zram_drv.c+28−30

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drivers/block/zram/zram_drv.h+1−1

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drivers/bluetooth/btintel.c+5−0

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drivers/bluetooth/btintel.h+3−1

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drivers/bluetooth/btmtkuart.c+5−10

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drivers/bluetooth/btnxpuart.c+5−7

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drivers/bluetooth/btusb.c+8−4

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drivers/bluetooth/hci_qca.c+23−0

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drivers/bluetooth/hci_serdev.c+2−2

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drivers/bluetooth/hci_vhci.c+6−4

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drivers/bus/fsl-mc/fsl-mc-bus.c+3−13

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drivers/bus/hisi_lpc.c+2−4

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drivers/bus/imx-weim.c+5−4

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drivers/bus/mhi/ep/internal.h+4−0

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drivers/bus/mhi/ep/main.c+261−126

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drivers/bus/mhi/ep/ring.c+41−19

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drivers/bus/mhi/host/init.c+1−0

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drivers/bus/mhi/host/internal.h+1−1

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drivers/bus/mhi/host/main.c+22−12

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drivers/bus/mhi/host/pci_generic.c+22−0

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drivers/bus/mhi/host/pm.c+17−7

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drivers/bus/moxtet.c+9−2

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drivers/bus/omap-ocp2scp.c+2−4

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drivers/bus/omap_l3_smx.c+2−4

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drivers/bus/qcom-ssc-block-bus.c+2−4

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drivers/bus/simple-pm-bus.c+3−4

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drivers/bus/sun50i-de2.c+2−3

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drivers/bus/sunxi-rsb.c+2−4

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drivers/bus/tegra-aconnect.c+2−4

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drivers/bus/tegra-gmi.c+2−4

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drivers/bus/ti-pwmss.c+2−3

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drivers/bus/ti-sysc.c+16−8

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drivers/bus/ts-nbus.c+2−4

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drivers/cache/Kconfig+6−0

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drivers/cache/Makefile+2−1

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drivers/cache/sifive_ccache.crenamed from drivers/soc/sifive/sifive_ccache.c+60−2

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drivers/cdx/cdx.c+164−7

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drivers/char/hw_random/atmel-rng.c+2−4

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drivers/char/hw_random/exynos-trng.c+2−4

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drivers/char/hw_random/ingenic-rng.c+3−5

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drivers/char/hw_random/jh7110-trng.c+7−3

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drivers/char/hw_random/ks-sa-rng.c+2−4

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drivers/char/hw_random/mxc-rnga.c+2−4

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drivers/char/hw_random/stm32-rng.c+3−4

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drivers/char/hw_random/timeriomem-rng.c+2−4

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drivers/char/hw_random/virtio-rng.c+5−9

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drivers/char/hw_random/xgene-rng.c+2−4

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drivers/char/ipmi/ipmi_msghandler.c+2−2

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drivers/char/ipmi/ipmi_si_hardcode.c+1−1

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drivers/char/ipmi/ipmi_si_platform.c+4−8

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drivers/char/ppdev.c+3−3

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drivers/char/random.c+2−4

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drivers/char/tpm/tpm_i2c_nuvoton.c+4−11

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drivers/char/tpm/tpm_tis_i2c_cr50.c+1−2

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drivers/char/ttyprintk.c+3−3

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drivers/char/virtio_console.c+5−53

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drivers/clk/Kconfig+1−10

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drivers/clk/Makefile+0−1

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drivers/clk/clk-renesas-pcie.c+20−17

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drivers/clk/clk-si5341.c+1−3

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drivers/clk/clk-si5351.c+44−3

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drivers/clk/clk-sp7021.c+6−6

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drivers/clk/clk-versaclock3.c+40−48

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drivers/clk/hisilicon/clk-hi3620.c+3−1

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drivers/clk/imx/clk-imx8qxp.c+20−4

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drivers/clk/imx/clk-pll14xx.c+12−11

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drivers/clk/imx/clk-scu.c+3−1

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drivers/clk/mediatek/Kconfig+9−0

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drivers/clk/mediatek/Makefile+5−0

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drivers/clk/mediatek/clk-mt7988-apmixed.c+114−0

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drivers/clk/mediatek/clk-mt7988-eth.c+150−0

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drivers/clk/mediatek/clk-mt7988-infracfg.c+275−0

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drivers/clk/mediatek/clk-mt7988-topckgen.c+325−0

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drivers/clk/mediatek/clk-mt7988-xfipll.c+82−0

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drivers/clk/mediatek/clk-mt8188-topckgen.c+14−13

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drivers/clk/mediatek/clk-mt8195-topckgen.c+19−8

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drivers/clk/mediatek/clk-mux.c+14−0

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drivers/clk/mediatek/clk-mux.h+39−4

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drivers/clk/mediatek/clk-pll.c+3−2

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drivers/clk/mediatek/clk-pll.h+1−0

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drivers/clk/meson/g12a.c+115−0

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drivers/clk/meson/g12a.h+1−0

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drivers/clk/microchip/clk-mpfs-ccc.c+1−1

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drivers/clk/mmp/clk-of-pxa168.c+3−0

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drivers/clk/qcom/Kconfig+64−0

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drivers/clk/qcom/Makefile+7−0

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drivers/clk/qcom/apss-ipq-pll.c+21−0

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drivers/clk/qcom/camcc-sc8280xp.c+3045−0

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drivers/clk/qcom/clk-branch.c+38−0

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drivers/clk/qcom/clk-branch.h+21−0

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drivers/clk/qcom/clk-rpmh.c+58−0

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drivers/clk/qcom/dispcc-sm8550.c+10−2

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drivers/clk/qcom/dispcc-sm8650.c+1818−0

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drivers/clk/qcom/ecpricc-qdu1000.c+2456−0

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drivers/clk/qcom/gcc-msm8939.c+107−3

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drivers/clk/qcom/gcc-x1e80100.c+6808−0

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drivers/clk/qcom/gpucc-sm8150.c+2−2

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drivers/clk/qcom/gpucc-sm8550.c+3−3

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drivers/clk/qcom/gpucc-sm8650.c+663−0

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drivers/clk/qcom/tcsrcc-sm8650.c+182−0

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drivers/clk/qcom/videocc-sm8150.c+23−2

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drivers/clk/renesas/r8a779g0-cpg-mssr.c+3−0

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drivers/clk/renesas/r9a08g045-cpg.c+13−0

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drivers/clk/renesas/rzg2l-cpg.c+56−35

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drivers/clk/rockchip/clk-rk3128.c+9−15

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drivers/clk/rockchip/clk-rk3568.c+4−0

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drivers/clk/samsung/Makefile+1−0

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drivers/clk/samsung/clk-cpu.h+15−15

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drivers/clk/samsung/clk-gs101.c+2518−0

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drivers/clk/samsung/clk-pll.c+6−0

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drivers/clk/samsung/clk-pll.h+3−0

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drivers/clk/samsung/clk.h+86−71

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drivers/clk/starfive/clk-starfive-jh7100-audio.c+1−1

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drivers/clk/starfive/clk-starfive-jh7100.c+16−16

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drivers/clk/starfive/clk-starfive-jh7110-aon.c+3−3

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drivers/clk/starfive/clk-starfive-jh7110-isp.c+1−1

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drivers/clk/starfive/clk-starfive-jh7110-sys.c+13−13

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drivers/clk/starfive/clk-starfive-jh71x0.h+2−2

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drivers/clk/stm32/Kconfig+29−0

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drivers/clk/stm32/Makefile+1−0

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drivers/clk/stm32/clk-stm32-core.c+4−1

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drivers/clk/stm32/clk-stm32-core.h+1−4

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drivers/clk/stm32/clk-stm32mp1.crenamed from drivers/clk/clk-stm32mp1.c+16−111

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drivers/clk/stm32/clk-stm32mp13.c+8−1

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drivers/clk/stm32/reset-stm32.c+5−9

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drivers/clk/stm32/reset-stm32.h+7−1

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drivers/clk/sunxi-ng/ccu_nkm.c+2−3

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drivers/clk/xilinx/clk-xlnx-clock-wizard.c+536−92

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drivers/clk/zynqmp/clk-mux-zynqmp.c+1−1

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drivers/clk/zynqmp/divider.c+5−61

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drivers/clocksource/timer-cadence-ttc.c+16−6

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drivers/clocksource/timer-ep93xx.c+2−3

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drivers/clocksource/timer-riscv.c+7−0

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drivers/clocksource/timer-ti-dm.c+2−2

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drivers/comedi/comedi_fops.c+2−2

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drivers/connector/cn_proc.c+3−2

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drivers/connector/connector.c+2−3

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drivers/cpufreq/amd-pstate.c+56−15

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drivers/cpufreq/armada-8k-cpufreq.c+2−2

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drivers/cpufreq/cppc_cpufreq.c+17−122

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drivers/cpufreq/cpufreq.c+2−2

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drivers/cpufreq/imx6q-cpufreq.c+1−1

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drivers/cpufreq/intel_pstate.c+26−10

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drivers/cpufreq/qcom-cpufreq-nvmem.c+70−3

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drivers/cpufreq/scmi-cpufreq.c+5−2

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drivers/cpuidle/cpuidle-haltpoll.c+4−5

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drivers/crypto/Kconfig+1−0

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drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c+2−2

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drivers/crypto/allwinner/sun8i-ss/sun8i-ss-cipher.c+2−3

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drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c+4−21

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drivers/crypto/amcc/crypto4xx_alg.c+0−14

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drivers/crypto/amcc/crypto4xx_core.c+0−40

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drivers/crypto/amcc/crypto4xx_core.h+0−4

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drivers/crypto/amlogic/amlogic-gxl-cipher.c+2−2

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drivers/crypto/aspeed/Kconfig+1−3

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drivers/crypto/aspeed/aspeed-hace-crypto.c+0−230

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drivers/crypto/atmel-aes.c+2−212

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drivers/crypto/atmel-tdes.c+6−199

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drivers/crypto/axis/artpec6_crypto.c+8−4

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drivers/crypto/bcm/cipher.c+0−57

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drivers/crypto/cavium/cpt/cptvf_algs.c+0−24

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drivers/crypto/cavium/nitrox/nitrox_skcipher.c+0−19

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drivers/crypto/ccp/ccp-crypto-aes.c+0−18

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drivers/crypto/ccp/ccp-ops.c+4−1

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drivers/crypto/ccp/sev-dev.c+1−1

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drivers/crypto/ccree/cc_aead.c+7−3

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drivers/crypto/ccree/cc_cipher.c+7−38

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drivers/crypto/gemini/sl3516-ce-cipher.c+2−2

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drivers/crypto/hifn_795x.c+3−123

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drivers/crypto/hisilicon/debugfs.c+29−25

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drivers/crypto/hisilicon/hpre/hpre_main.c+67−55

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drivers/crypto/hisilicon/qm.c+130−134

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drivers/crypto/hisilicon/qm_common.h+0−4

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drivers/crypto/hisilicon/sec2/sec.h+7−0

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drivers/crypto/hisilicon/sec2/sec_crypto.c+13−30

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drivers/crypto/hisilicon/sec2/sec_crypto.h+0−2

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drivers/crypto/hisilicon/sec2/sec_main.c+38−34

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drivers/crypto/hisilicon/sgl.c+10−8

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drivers/crypto/hisilicon/zip/zip_main.c+154−75

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drivers/crypto/inside-secure/safexcel.c+0−4

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drivers/crypto/inside-secure/safexcel.h+0−4

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drivers/crypto/inside-secure/safexcel_cipher.c+11−160

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drivers/crypto/intel/Kconfig+1−0

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drivers/crypto/intel/Makefile+1−0

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drivers/crypto/intel/iaa/Kconfig+19−0

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drivers/crypto/intel/iaa/Makefile+12−0

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drivers/crypto/intel/iaa/iaa_crypto.h+173−0

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drivers/crypto/intel/iaa/iaa_crypto_comp_fixed.c+92−0

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drivers/crypto/intel/iaa/iaa_crypto_main.c+2193−0

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drivers/crypto/intel/iaa/iaa_crypto_stats.c+312−0

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drivers/firmware/arm_scmi/powercap.c+6−2

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drivers/firmware/arm_scmi/protocols.h+9−2

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drivers/firmware/arm_scmi/reset.c+7−2

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drivers/firmware/arm_scmi/sensors.c+6−2

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drivers/firmware/arm_scmi/system.c+5−1

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drivers/firmware/arm_scmi/voltage.c+6−2

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drivers/firmware/arm_scpi.c+2−4

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drivers/firmware/efi/Kconfig+15−0

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drivers/firmware/efi/Makefile+1−0

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drivers/firmware/efi/dev-path-parser.c+2−5

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drivers/firmware/efi/efi.c+18−0

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drivers/firmware/efi/libstub/Makefile.zboot+2−2

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drivers/firmware/efi/libstub/loongarch-stub.c+6−5

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drivers/firmware/efi/libstub/loongarch-stub.h+4−0

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drivers/firmware/efi/libstub/loongarch.c+5−3

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drivers/firmware/efi/libstub/x86-5lvl.c+2−2

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drivers/firmware/efi/libstub/x86-stub.c+26−7

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drivers/firmware/efi/memmap.c+5−3

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drivers/firmware/efi/stmm/mm_communication.h+236−0

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drivers/firmware/efi/stmm/tee_stmm_efi.c+616−0

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drivers/firmware/efi/unaccepted_memory.c+1−1

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drivers/firmware/efi/vars.c+8−0

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drivers/firmware/google/coreboot_table.c+2−3

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drivers/firmware/google/framebuffer-coreboot.c+3−0

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drivers/firmware/imx/imx-dsp.c+2−4

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drivers/firmware/meson/meson_sm.c+8−11

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drivers/firmware/microchip/Kconfig+12−0

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drivers/firmware/microchip/Makefile+3−0

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drivers/firmware/microchip/mpfs-auto-update.c+494−0

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drivers/firmware/mtk-adsp-ipc.c+2−4

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drivers/firmware/qcom/qcom_qseecom_uefisecapp.c+13−7

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drivers/firmware/qemu_fw_cfg.c+2−3

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drivers/firmware/raspberrypi.c+2−4

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drivers/firmware/stratix10-rsu.c+2−3

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drivers/firmware/stratix10-svc.c+2−4

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drivers/firmware/ti_sci.c+5−5

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drivers/firmware/turris-mox-rwtm.c+2−4

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drivers/firmware/xilinx/zynqmp.c+160−236

This diff is large: its 967 lines aren’t shown here.

drivers/fpga/altera-fpga2sdram.c+2−4

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drivers/fpga/altera-freeze-bridge.c+2−4

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drivers/fpga/altera-hps2fpga.c+2−4

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drivers/fpga/dfl-afu-main.c+2−4

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drivers/fpga/dfl-fme-br.c+2−4

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drivers/fpga/dfl-fme-main.c+2−4

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drivers/fpga/dfl-fme-region.c+2−4

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drivers/fpga/dfl.c+3−3

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drivers/fpga/intel-m10-bmc-sec-update.c+2−4

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drivers/fpga/of-fpga-region.c+2−4

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drivers/fpga/socfpga-a10.c+2−4

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drivers/fpga/stratix10-soc.c+2−4

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drivers/fpga/xilinx-pr-decoupler.c+2−4

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drivers/fpga/zynq-fpga.c+2−4

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drivers/gnss/serial.c+2−2

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drivers/gnss/sirf.c+2−2

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drivers/gnss/ubx.c+11−20

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drivers/gpio/Kconfig+20−0

This diff is large: its 34 lines aren’t shown here.

drivers/gpio/Makefile+2−0

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drivers/gpio/gpio-dwapb.c+17−8

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drivers/gpio/gpio-elkhartlake.c+1−13

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drivers/gpio/gpio-en7523.c+3−3

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drivers/gpio/gpio-ixp4xx.c+50−1

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drivers/gpio/gpio-max730x.c+1−1

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drivers/gpio/gpio-mlxbf3.c+2−0

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drivers/gpio/gpio-mmio.c+18−31

This diff is large: its 105 lines aren’t shown here.

drivers/gpio/gpio-mockup.c+1−2

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drivers/gpio/gpio-npcm-sgpio.c+619−0

This diff is large: its 620 lines aren’t shown here.

drivers/gpio/gpio-pmic-eic-sprd.c+10−9

This diff is large: its 58 lines aren’t shown here.

drivers/gpio/gpio-rtd.c+607−0

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drivers/gpio/gpio-sifive.c+0−1

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drivers/gpio/gpio-sim.c+23−1

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drivers/gpio/gpio-stmpe.c+5−1

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drivers/gpio/gpio-tangier.c+19−44

This diff is large: its 243 lines aren’t shown here.

drivers/gpio/gpio-tangier.h+2−2

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drivers/gpio/gpio-tps65219.c+9−9

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drivers/gpio/gpio-wm831x.c+9−5

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drivers/gpio/gpio-wm8994.c+8−5

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drivers/gpio/gpio-xilinx.c+0−1

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drivers/gpio/gpiolib-cdev.c+324−331

This diff is large: its 1160 lines aren’t shown here.

drivers/gpio/gpiolib-of.c+2−2

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drivers/gpio/gpiolib-sysfs.c+41−39

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drivers/gpio/gpiolib-sysfs.h+2−2

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drivers/gpio/gpiolib.c+77−68

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drivers/gpio/gpiolib.h+0−5

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drivers/gpu/drm/Kconfig+2−0

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drivers/gpu/drm/Makefile+1−0

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drivers/gpu/drm/amd/amdgpu/Makefile+1−1

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drivers/gpu/drm/amd/amdgpu/aldebaran.c+25−1

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drivers/gpu/drm/amd/amdgpu/amdgpu.h+39−0

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drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c+17−34

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drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h+10−11

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drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c+1−1

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drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c+1−1

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drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c+1−1

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drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c+2−2

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drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c+2−2

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drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c+2−2

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drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c+144−55

This diff is large: its 380 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c+42−27

This diff is large: its 125 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c+4−4

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drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c+2−2

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drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c+19−4

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drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.h+2−0

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drivers/gpu/drm/amd/amdgpu/amdgpu_device.c+121−51

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drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c+0−2

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drivers/gpu/drm/amd/amdgpu/amdgpu_display.c+3−6

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drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c+4−0

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drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c+29−35

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drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c+2−0

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drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c+2−2

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drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c+17−7

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drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.c+3−3

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drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c+0−1

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drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c+8−1

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drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c+17−8

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drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h+4−0

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drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c+94−2

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drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h+11−4

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drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h+96−1

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drivers/gpu/drm/amd/amdgpu/amdgpu_object.c+10−15

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drivers/gpu/drm/amd/amdgpu/amdgpu_object.h+1−3

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drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c+3−3

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drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c+64−24

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drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h+12−3

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drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c+6−0

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drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h+0−1

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drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c+6−4

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drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c+5−6

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drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.c+247−0

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drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.h+49−0

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drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c+2−1

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drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h+15−0

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drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c+4−5

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drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c+7−2

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drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c+2−2

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drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c+2−1

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drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c+1−0

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drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c+46−0

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drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h+6−1

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drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c+2−1

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drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c+243−0

This diff is large: its 308 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.h+12−0

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drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c+96−10

This diff is large: its 168 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c+414−0

This diff is large: its 425 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/athub_v3_0.c+8−0

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drivers/gpu/drm/amd/amdgpu/atom.c+0−1

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drivers/gpu/drm/amd/amdgpu/atombios_encoders.c+1−0

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drivers/gpu/drm/amd/amdgpu/dce_v10_0.c+1−0

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drivers/gpu/drm/amd/amdgpu/dce_v11_0.c+1−0

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drivers/gpu/drm/amd/amdgpu/dce_v6_0.c+1−0

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drivers/gpu/drm/amd/amdgpu/dce_v8_0.c+1−0

This diff is large: its 8 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c+8−10

This diff is large: its 33 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c+71−5

This diff is large: its 164 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c+2−2

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drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c+2−2

This diff is large: its 11 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c+4−160

This diff is large: its 199 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c+3−1

This diff is large: its 11 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c+9−5

This diff is large: its 28 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c+4−0

This diff is large: its 11 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c+5−0

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drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c+5−1

This diff is large: its 20 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c+5−0

This diff is large: its 12 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c+8−7

This diff is large: its 29 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c+2−0

This diff is large: its 9 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c+3−1

This diff is large: its 11 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c+2−2

This diff is large: its 11 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c+9−9

This diff is large: its 27 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c+1−2

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drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c+1−7

This diff is large: its 22 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c+8−4

This diff is large: its 39 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c+2−2

This diff is large: its 15 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c+28−0

This diff is large: its 42 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/soc15.c+16−5

This diff is large: its 52 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/soc15.h+4−0

This diff is large: its 18 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/umc_v12_0.c+73−7

This diff is large: its 142 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/umc_v12_0.h+6−2

This diff is large: its 15 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/umc_v6_7.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c+29−19

This diff is large: its 76 lines aren’t shown here.

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c+15−0

This diff is large: its 36 lines aren’t shown here.

drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h+332−332

This diff is large: its 732 lines aren’t shown here.

drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm+6−0

This diff is large: its 13 lines aren’t shown here.

drivers/gpu/drm/amd/amdkfd/kfd_chardev.c+6−13

This diff is large: its 59 lines aren’t shown here.

drivers/gpu/drm/amd/amdkfd/kfd_events.c+4−0

This diff is large: its 11 lines aren’t shown here.

drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c+13−13

This diff is large: its 52 lines aren’t shown here.

drivers/gpu/drm/amd/amdkfd/kfd_migrate.c+95−90

This diff is large: its 440 lines aren’t shown here.

drivers/gpu/drm/amd/amdkfd/kfd_migrate.h+4−0

This diff is large: its 14 lines aren’t shown here.

drivers/gpu/drm/amd/amdkfd/kfd_priv.h+11−5

This diff is large: its 51 lines aren’t shown here.

drivers/gpu/drm/amd/amdkfd/kfd_process.c+58−67

This diff is large: its 234 lines aren’t shown here.

drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c+35−21

This diff is large: its 82 lines aren’t shown here.

drivers/gpu/drm/amd/amdkfd/kfd_svm.c+121−130

This diff is large: its 536 lines aren’t shown here.

drivers/gpu/drm/amd/amdkfd/kfd_svm.h+5−4

This diff is large: its 37 lines aren’t shown here.

drivers/gpu/drm/amd/amdkfd/kfd_topology.c+25−20

This diff is large: its 70 lines aren’t shown here.

drivers/gpu/drm/amd/display/Makefile+3−0

This diff is large: its 10 lines aren’t shown here.

drivers/gpu/drm/amd/display/amdgpu_dm/Makefile+9−5

This diff is large: its 36 lines aren’t shown here.

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c+413−122

This diff is large: its 1251 lines aren’t shown here.

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h+117−1

This diff is large: its 173 lines aren’t shown here.

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c+763−66

This diff is large: its 966 lines aren’t shown here.

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c+3−0

This diff is large: its 10 lines aren’t shown here.

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c+73−8

This diff is large: its 130 lines aren’t shown here.

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c+87−1

This diff is large: its 114 lines aren’t shown here.

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c+44−20

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drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c+16−6

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drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c+32−22

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drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c+230−2

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drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c+3−0

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drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c+216−0

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drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.h+36−0

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drivers/gpu/drm/amd/display/dc/Makefile+2−7

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drivers/gpu/drm/amd/display/dc/basics/conversion.c+2−1

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drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c+46−41

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drivers/gpu/drm/amd/display/dc/bios/command_table2.c+12−12

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drivers/gpu/drm/amd/display/dc/bios/command_table2.h+1−1

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drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c+3−2

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drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c+1−1

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drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c+80−14

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drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.h+11−0

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drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c+5−5

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drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c+1−1

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drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c+92−16

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drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c+91−100

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drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.c+35−11

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drivers/gpu/drm/amd/display/dc/core/dc.c+158−240

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drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c+120−67

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drivers/gpu/drm/amd/display/dc/core/dc_link_exports.c+8−1

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drivers/gpu/drm/amd/display/dc/core/dc_resource.c+105−382

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drivers/gpu/drm/amd/display/dc/core/dc_state.c+867−0

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This diff is larger than a page shows: the files after these aren’t listed. Clone the repository to see all of it.

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