Merge tag 'drm-fixes-2019-04-26' of git://anongit.freedesktop.org/drm/drm

Pull drm fixes from Dave Airlie: "Regular drm fixes, nothing too outstanding, I'm guessing Easter was slowing people down. i915: - FEC enable fix - BXT display lanes fix ttm: - fix reinit for reloading drivers regression imx: - DP CSC fix sun4i: - module unload/load fix vc4: - memory leak fix - compile fix dw-hdmi: - rockchip scdc overflow fix sched: - docs fix vmwgfx: - dma api layering fix" * tag 'drm-fixes-2019-04-26' of git://anongit.freedesktop.org/drm/drm: drm/bridge: dw-hdmi: fix SCDC configuration for ddc-i2c-bus drm/vmwgfx: Fix dma API layer violation drm/vc4: Fix compilation error reported by kbuild test bot drm/sun4i: Unbind components before releasing DRM and memory drm/vc4: Fix memory leak during gpu reset. drm/sched: Fix description of drm_sched_stop drm/imx: don't skip DP channel disable for background plane gpu: ipu-v3: dp: fix CSC handling drm/ttm: fix re-init of global structures drm/sun4i: Fix component unbinding and component master deletion drm/sun4i: Set device driver data at bind time for use in unbind drm/sun4i: Add missing drm_atomic_helper_shutdown at driver unbind drm/i915: Restore correct bxt_ddi_phy_calc_lane_lat_optim_mask() calculation drm/i915: Do not enable FEC without DSC drm: bridge: dw-hdmi: Fix overflow workaround for Rockchip SoCs

Linus Torvalds committed 7 years ago

Commit 4e40f0f2 parents d0473f9 6db71be12 files · +53 −52Browse files

Unified · Split

12 files

drivers/gpu/drm/bridge/synopsys/dw-hdmi.c +12 −4
drivers/gpu/drm/i915/intel_ddi.c +4 −2
drivers/gpu/drm/i915/intel_dp.c +3 −3
drivers/gpu/drm/imx/ipuv3-crtc.c +1 −1
drivers/gpu/drm/scheduler/sched_main.c +1 −2
drivers/gpu/drm/sun4i/sun4i_drv.c +9 −0
drivers/gpu/drm/ttm/ttm_bo.c +5 −5
drivers/gpu/drm/ttm/ttm_memory.c +3 −2
drivers/gpu/drm/vc4/vc4_crtc.c +1 −1
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c +5 −28
drivers/gpu/ipu-v3/ipu-dp.c +9 −3
include/drm/ttm/ttm_bo_driver.h +0 −1

drivers/gpu/drm/bridge/synopsys/dw-hdmi.c+12−4

 	if (hdmi->version < 0x200a)
 		return false;
+	/* Disable if no DDC bus */
+	if (!hdmi->ddc)
+		return false;
 	/* Disable if SCDC is not supported, or if an HF-VSDB block is absent */
 	if (!display->hdmi.scdc.supported ||
 	    !display->hdmi.scdc.scrambling.supported)
 			 * Source Devices compliant shall set the
 			 * Source Version = 1.
 			 */
-			drm_scdc_readb(&hdmi->i2c->adap, SCDC_SINK_VERSION,
+			drm_scdc_readb(hdmi->ddc, SCDC_SINK_VERSION,
 				       &bytes);
-			drm_scdc_writeb(&hdmi->i2c->adap, SCDC_SOURCE_VERSION,
+			drm_scdc_writeb(hdmi->ddc, SCDC_SOURCE_VERSION,
 				min_t(u8, bytes, SCDC_MIN_SOURCE_VERSION));
 			/* Enabled Scrambling in the Sink */
-			drm_scdc_set_scrambling(&hdmi->i2c->adap, 1);
+			drm_scdc_set_scrambling(hdmi->ddc, 1);
 			/*
 			 * To activate the scrambler feature, you must ensure
 			hdmi_writeb(hdmi, 0, HDMI_FC_SCRAMBLER_CTRL);
 			hdmi_writeb(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ,
 				    HDMI_MC_SWRSTZ);
-			drm_scdc_set_scrambling(&hdmi->i2c->adap, 0);
+			drm_scdc_set_scrambling(hdmi->ddc, 0);
 		}
 	}
 	 * iteration for others.
 	 * The Amlogic Meson GX SoCs (v2.01a) have been identified as needing
 	 * the workaround with a single iteration.
+	 * The Rockchip RK3288 SoC (v2.00a) and RK3328/RK3399 SoCs (v2.11a) have
+	 * been identified as needing the workaround with a single iteration.
 	 */
 	switch (hdmi->version) {
 		break;
 	case 0x131a:
 	case 0x132a:
+	case 0x200a:
 	case 0x201a:
+	case 0x211a:
 	case 0x212a:
 		count = 1;
 		break;

drivers/gpu/drm/i915/intel_ddi.c+4−2

 		ret = intel_hdmi_compute_config(encoder, pipe_config, conn_state);
 	else
 		ret = intel_dp_compute_config(encoder, pipe_config, conn_state);
+	if (ret)
+		return ret;
-	if (IS_GEN9_LP(dev_priv) && ret)
+	if (IS_GEN9_LP(dev_priv))
 		pipe_config->lane_lat_optim_mask =
 			bxt_ddi_phy_calc_lane_lat_optim_mask(pipe_config->lane_count);
 	intel_ddi_compute_min_voltage_level(dev_priv, pipe_config);
-	return ret;
+	return 0;
 }

drivers/gpu/drm/i915/intel_dp.c+3−3

 	int pipe_bpp;
 	int ret;
+	pipe_config->fec_enable = !intel_dp_is_edp(intel_dp) &&
+		intel_dp_supports_fec(intel_dp, pipe_config);
 	if (!intel_dp_supports_dsc(intel_dp, pipe_config))
 		return -EINVAL;
 	if (adjusted_mode->flags & DRM_MODE_FLAG_DBLCLK)
 		return -EINVAL;
-	pipe_config->fec_enable = !intel_dp_is_edp(intel_dp) &&
-				  intel_dp_supports_fec(intel_dp, pipe_config);
 	ret = intel_dp_compute_link_config(encoder, pipe_config, conn_state);
 	if (ret < 0)
 		return ret;

drivers/gpu/drm/imx/ipuv3-crtc.c+1−1

@@ -71,7 +71,7 @@ static void ipu_crtc_disable_planes(struct ipu_crtc *ipu_crtc, · 70 unmodified lines
71	if (disable_partial)	71	if (disable_partial)
72	ipu_plane_disable(ipu_crtc->plane[1], true);	72	ipu_plane_disable(ipu_crtc->plane[1], true);
73	if (disable_full)	73	if (disable_full)
74	ipu_plane_disable(ipu_crtc->plane[0], false);	74	ipu_plane_disable(ipu_crtc->plane[0], true);
75	}	75	}
76		76
77	static void ipu_crtc_atomic_disable(struct drm_crtc *crtc,	77	static void ipu_crtc_atomic_disable(struct drm_crtc *crtc,

drivers/gpu/drm/scheduler/sched_main.c+1−2

 EXPORT_SYMBOL(drm_sched_increase_karma);
 /**
- * drm_sched_hw_job_reset - stop the scheduler if it contains the bad job
+ * drm_sched_stop - stop the scheduler
  *
  * @sched: scheduler instance
- * @bad: bad scheduler job
  *
  */
 void drm_sched_stop(struct drm_gpu_scheduler *sched)

drivers/gpu/drm/sun4i/sun4i_drv.c+9−0

 #include <linux/of_reserved_mem.h>
 #include <drm/drmP.h>
+#include <drm/drm_atomic_helper.h>
 #include <drm/drm_fb_cma_helper.h>
 #include <drm/drm_fb_helper.h>
 #include <drm/drm_gem_cma_helper.h>
 		ret = -ENOMEM;
 		goto free_drm;
 	}
+	dev_set_drvdata(dev, drm);
 	drm->dev_private = drv;
 	INIT_LIST_HEAD(&drv->frontend_list);
 	INIT_LIST_HEAD(&drv->engine_list);
 	drm_dev_unregister(drm);
 	drm_kms_helper_poll_fini(drm);
+	drm_atomic_helper_shutdown(drm);
 	drm_mode_config_cleanup(drm);
+	component_unbind_all(dev, NULL);
 	of_reserved_mem_device_release(dev);
 	drm_dev_put(drm);
 }
 static int sun4i_drv_remove(struct platform_device *pdev)
 {
+	component_master_del(&pdev->dev, &sun4i_drv_master_ops);
 	return 0;
 }

drivers/gpu/drm/ttm/ttm_bo.c+5−5

  * ttm_global_mutex - protecting the global BO state
  */
 DEFINE_MUTEX(ttm_global_mutex);
-struct ttm_bo_global ttm_bo_glob = {
+unsigned ttm_bo_glob_use_count;
-	.use_count = 0
+struct ttm_bo_global ttm_bo_glob;
-};
 static struct attribute ttm_bo_count = {
 	.name = "bo_count",
 	struct ttm_bo_global *glob = &ttm_bo_glob;
 	mutex_lock(&ttm_global_mutex);
-	if (--glob->use_count > 0)
+	if (--ttm_bo_glob_use_count > 0)
 		goto out;
 	kobject_del(&glob->kobj);
 	kobject_put(&glob->kobj);
 	ttm_mem_global_release(&ttm_mem_glob);
+	memset(glob, 0, sizeof(*glob));
 out:
 	mutex_unlock(&ttm_global_mutex);
 }
 	unsigned i;
 	mutex_lock(&ttm_global_mutex);
-	if (++glob->use_count > 1)
+	if (++ttm_bo_glob_use_count > 1)
 		goto out;
 	ret = ttm_mem_global_init(&ttm_mem_glob);

drivers/gpu/drm/ttm/ttm_memory.c+3−2

 void ttm_mem_global_release(struct ttm_mem_global *glob)
 {
-	unsigned int i;
 	struct ttm_mem_zone *zone;
+	unsigned int i;
 	/* let the page allocator first stop the shrink work. */
 	ttm_page_alloc_fini();
 		zone = glob->zones[i];
 		kobject_del(&zone->kobj);
 		kobject_put(&zone->kobj);
-			}
+	}
 	kobject_del(&glob->kobj);
 	kobject_put(&glob->kobj);
+	memset(glob, 0, sizeof(*glob));
 }
 static void ttm_check_swapping(struct ttm_mem_global *glob)

drivers/gpu/drm/vc4/vc4_crtc.c+1−1

@@ -1042,7 +1042,7 @@ static void · 1041 unmodified lines
1042	vc4_crtc_reset(struct drm_crtc *crtc)	1042	vc4_crtc_reset(struct drm_crtc *crtc)
1043	{	1043	{
1044	if (crtc->state)	1044	if (crtc->state)
1045	__drm_atomic_helper_crtc_destroy_state(crtc->state);	1045	vc4_crtc_destroy_state(crtc, crtc->state);
1046		1046
1047	crtc->state = kzalloc(sizeof(struct vc4_crtc_state), GFP_KERNEL);	1047	crtc->state = kzalloc(sizeof(struct vc4_crtc_state), GFP_KERNEL);
1048	if (crtc->state)	1048	if (crtc->state)

drivers/gpu/drm/vmwgfx/vmwgfx_drv.c+5−28

 	dev_priv->initial_height = height;
 }
-/**
- * vmw_assume_iommu - Figure out whether coherent dma-remapping might be
- * taking place.
- * @dev: Pointer to the struct drm_device.
- *
- * Return: true if iommu present, false otherwise.
- */
-static bool vmw_assume_iommu(struct drm_device *dev)
-{
-	const struct dma_map_ops *ops = get_dma_ops(dev->dev);
-	return !dma_is_direct(ops) && ops &&
-		ops->map_page != dma_direct_map_page;
-}
 /**
  * vmw_dma_select_mode - Determine how DMA mappings should be set up for this
  * system.
  *
  * @dev_priv: Pointer to a struct vmw_private
  *
- * This functions tries to determine the IOMMU setup and what actions
+ * This functions tries to determine what actions need to be taken by the
- * need to be taken by the driver to make system pages visible to the
+ * driver to make system pages visible to the device.
- * device.
  * If this function decides that DMA is not possible, it returns -EINVAL.
  * The driver may then try to disable features of the device that require
  * DMA.
 	static const char *names[vmw_dma_map_max] = {
 		[vmw_dma_phys] = "Using physical TTM page addresses.",
 		[vmw_dma_alloc_coherent] = "Using coherent TTM pages.",
-		[vmw_dma_map_populate] = "Keeping DMA mappings.",
+		[vmw_dma_map_populate] = "Caching DMA mappings.",
 		[vmw_dma_map_bind] = "Giving up DMA mappings early."};
 	if (vmw_force_coherent)
 		dev_priv->map_mode = vmw_dma_alloc_coherent;
-	else if (vmw_assume_iommu(dev_priv->dev))
+	else if (vmw_restrict_iommu)
-		dev_priv->map_mode = vmw_dma_map_populate;
+		dev_priv->map_mode = vmw_dma_map_bind;
-	else if (!vmw_force_iommu)
-		dev_priv->map_mode = vmw_dma_phys;
-	else if (IS_ENABLED(CONFIG_SWIOTLB) && swiotlb_nr_tbl())
-		dev_priv->map_mode = vmw_dma_alloc_coherent;
 	else
 		dev_priv->map_mode = vmw_dma_map_populate;
-	if (dev_priv->map_mode == vmw_dma_map_populate && vmw_restrict_iommu)
-		dev_priv->map_mode = vmw_dma_map_bind;
 	/* No TTM coherent page pool? FIXME: Ask TTM instead! */
         if (!(IS_ENABLED(CONFIG_SWIOTLB) || IS_ENABLED(CONFIG_INTEL_IOMMU)) &&
 	    (dev_priv->map_mode == vmw_dma_alloc_coherent))

drivers/gpu/ipu-v3/ipu-dp.c+9−3

 		ipu_dp_csc_init(flow, flow->foreground.in_cs, flow->out_cs,
 				DP_COM_CONF_CSC_DEF_BOTH);
 	} else {
-		if (flow->foreground.in_cs == flow->out_cs)
+		if (flow->foreground.in_cs == IPUV3_COLORSPACE_UNKNOWN ||
+		    flow->foreground.in_cs == flow->out_cs)
 			/*
 			 * foreground identical to output, apply color
 			 * conversion on background
 	struct ipu_dp_priv *priv = flow->priv;
 	u32 reg, csc;
+	dp->in_cs = IPUV3_COLORSPACE_UNKNOWN;
 	if (!dp->foreground)
 		return;
 	reg = readl(flow->base + DP_COM_CONF);
 	csc = reg & DP_COM_CONF_CSC_DEF_MASK;
-	if (csc == DP_COM_CONF_CSC_DEF_FG)
+	reg &= ~DP_COM_CONF_CSC_DEF_MASK;
-		reg &= ~DP_COM_CONF_CSC_DEF_MASK;
+	if (csc == DP_COM_CONF_CSC_DEF_BOTH || csc == DP_COM_CONF_CSC_DEF_BG)
+		reg |= DP_COM_CONF_CSC_DEF_BG;
 	reg &= ~DP_COM_CONF_FG_EN;
 	writel(reg, flow->base + DP_COM_CONF);
 	mutex_init(&priv->mutex);
 	for (i = 0; i < IPUV3_NUM_FLOWS; i++) {
+		priv->flow[i].background.in_cs = IPUV3_COLORSPACE_UNKNOWN;
+		priv->flow[i].foreground.in_cs = IPUV3_COLORSPACE_UNKNOWN;
 		priv->flow[i].foreground.foreground = true;
 		priv->flow[i].base = priv->base + ipu_dp_flow_base[i];
 		priv->flow[i].priv = priv;

include/drm/ttm/ttm_bo_driver.h+0−1

@@ -420,7 +420,6 @@ extern struct ttm_bo_global { · 419 unmodified lines
420	/**	420	/**
421	* Protected by ttm_global_mutex.	421	* Protected by ttm_global_mutex.
422	*/	422	*/
423	unsigned int use_count;
424	struct list_head device_list;	423	struct list_head device_list;
425		424
426	/**	425	/**

Merge tag 'drm-fixes-2019-04-26' of git://anongit.freedesktop.org/drm/drm

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