Align on same rule in the whole file: defines then doc then relevant field, with an empty line to separate fields. v2: - Rebase on drm-xe-next - Fix ordering of defines and fields in uAPI (Lucas De Marchi) v3: Remove useless empty lines (Lucas De Marchi) v4: Move changelog to commit v5: Rebase
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| @@ -60,6 +60,7 @@ struct xe_user_extension { · 59 unmodified lines | ||
| 60 | 60 | * Pointer to the next struct xe_user_extension, or zero if the end. |
| 61 | 61 | */ |
| 62 | 62 | __u64 next_extension; |
| 63 | + | |
| 63 | 64 | /** |
| 64 | 65 | * @name: Name of the extension. |
| 65 | 66 | * |
| @@ -70,6 +71,7 @@ struct xe_user_extension { · 4 unmodified lines | ||
| 70 | 71 | * of uAPI which has embedded the struct xe_user_extension. |
| 71 | 72 | */ |
| 72 | 73 | __u32 name; |
| 74 | + | |
| 73 | 75 | /** |
| 74 | 76 | * @pad: MBZ |
| 75 | 77 | * |
| @@ -218,11 +220,11 @@ struct drm_xe_query_topology_mask { · 142 unmodified lines | ||
| 218 | 220 | /** @gt_id: GT ID the mask is associated with */ |
| 219 | 221 | __u16 gt_id; |
| 220 | 222 | |
| 221 | − /** @type: type of mask */ | |
| 222 | − __u16 type; | |
| 223 | 223 | #define XE_TOPO_DSS_GEOMETRY (1 << 0) |
| 224 | 224 | #define XE_TOPO_DSS_COMPUTE (1 << 1) |
| 225 | 225 | #define XE_TOPO_EU_PER_DSS (1 << 2) |
| 226 | + /** @type: type of mask */ | |
| 227 | + __u16 type; | |
| 226 | 228 | |
| 227 | 229 | /** @num_bytes: number of bytes in requested mask */ |
| 228 | 230 | __u32 num_bytes; |
| @@ -270,15 +272,14 @@ struct drm_xe_device_query { · 41 unmodified lines | ||
| 270 | 272 | /** @extensions: Pointer to the first extension struct, if any */ |
| 271 | 273 | __u64 extensions; |
| 272 | 274 | |
| 273 | − /** @query: The type of data to query */ | |
| 274 | − __u32 query; | |
| 275 | − | |
| 276 | 275 | #define DRM_XE_DEVICE_QUERY_ENGINES 0 |
| 277 | 276 | #define DRM_XE_DEVICE_QUERY_MEM_USAGE 1 |
| 278 | 277 | #define DRM_XE_DEVICE_QUERY_CONFIG 2 |
| 279 | 278 | #define DRM_XE_DEVICE_QUERY_GTS 3 |
| 280 | 279 | #define DRM_XE_DEVICE_QUERY_HWCONFIG 4 |
| 281 | 280 | #define DRM_XE_DEVICE_QUERY_GT_TOPOLOGY 5 |
| 281 | + /** @query: The type of data to query */ | |
| 282 | + __u32 query; | |
| 282 | 283 | |
| 283 | 284 | /** @size: Size of the queried data */ |
| 284 | 285 | __u32 size; |
| @@ -301,12 +302,12 @@ struct drm_xe_gem_create { · 16 unmodified lines | ||
| 301 | 302 | */ |
| 302 | 303 | __u64 size; |
| 303 | 304 | |
| 305 | +#define XE_GEM_CREATE_FLAG_DEFER_BACKING (0x1 << 24) | |
| 306 | +#define XE_GEM_CREATE_FLAG_SCANOUT (0x1 << 25) | |
| 304 | 307 | /** |
| 305 | 308 | * @flags: Flags, currently a mask of memory instances of where BO can |
| 306 | 309 | * be placed |
| 307 | 310 | */ |
| 308 | −#define XE_GEM_CREATE_FLAG_DEFER_BACKING (0x1 << 24) | |
| 309 | −#define XE_GEM_CREATE_FLAG_SCANOUT (0x1 << 25) | |
| 310 | 311 | __u32 flags; |
| 311 | 312 | |
| 312 | 313 | /** |
| @@ -357,10 +358,13 @@ struct drm_xe_gem_mmap_offset { · 44 unmodified lines | ||
| 357 | 358 | struct drm_xe_vm_bind_op_error_capture { |
| 358 | 359 | /** @error: errno that occured */ |
| 359 | 360 | __s32 error; |
| 361 | + | |
| 360 | 362 | /** @op: operation that encounter an error */ |
| 361 | 363 | __u32 op; |
| 364 | + | |
| 362 | 365 | /** @addr: address of bind op */ |
| 363 | 366 | __u64 addr; |
| 367 | + | |
| 364 | 368 | /** @size: size of bind */ |
| 365 | 369 | __u64 size; |
| 366 | 370 | }; |
| @@ -370,8 +374,8 @@ struct drm_xe_ext_vm_set_property { · 3 unmodified lines | ||
| 370 | 374 | /** @base: base user extension */ |
| 371 | 375 | struct xe_user_extension base; |
| 372 | 376 | |
| 373 | − /** @property: property to set */ | |
| 374 | 377 | #define XE_VM_PROPERTY_BIND_OP_ERROR_CAPTURE_ADDRESS 0 |
| 378 | + /** @property: property to set */ | |
| 375 | 379 | __u32 property; |
| 376 | 380 | |
| 377 | 381 | /** @pad: MBZ */ |
| @@ -385,17 +389,16 @@ struct drm_xe_ext_vm_set_property { · 7 unmodified lines | ||
| 385 | 389 | }; |
| 386 | 390 | |
| 387 | 391 | struct drm_xe_vm_create { |
| 388 | − /** @extensions: Pointer to the first extension struct, if any */ | |
| 389 | 392 | #define XE_VM_EXTENSION_SET_PROPERTY 0 |
| 393 | + /** @extensions: Pointer to the first extension struct, if any */ | |
| 390 | 394 | __u64 extensions; |
| 391 | 395 | |
| 392 | − /** @flags: Flags */ | |
| 393 | − __u32 flags; | |
| 394 | − | |
| 395 | 396 | #define DRM_XE_VM_CREATE_SCRATCH_PAGE (0x1 << 0) |
| 396 | 397 | #define DRM_XE_VM_CREATE_COMPUTE_MODE (0x1 << 1) |
| 397 | 398 | #define DRM_XE_VM_CREATE_ASYNC_BIND_OPS (0x1 << 2) |
| 398 | 399 | #define DRM_XE_VM_CREATE_FAULT_MODE (0x1 << 3) |
| 400 | + /** @flags: Flags */ | |
| 401 | + __u32 flags; | |
| 399 | 402 | |
| 400 | 403 | /** @vm_id: Returned VM ID */ |
| 401 | 404 | __u32 vm_id; |
| @@ -430,6 +433,7 @@ struct drm_xe_vm_bind_op { · 28 unmodified lines | ||
| 430 | 433 | * ignored for unbind |
| 431 | 434 | */ |
| 432 | 435 | __u64 obj_offset; |
| 436 | + | |
| 433 | 437 | /** @userptr: user pointer to bind on */ |
| 434 | 438 | __u64 userptr; |
| 435 | 439 | }; |
| @@ -448,12 +452,6 @@ struct drm_xe_vm_bind_op { · 12 unmodified lines | ||
| 448 | 452 | */ |
| 449 | 453 | __u64 tile_mask; |
| 450 | 454 | |
| 451 | − /** @op: Operation to perform (lower 16 bits) and flags (upper 16 bits) */ | |
| 452 | − __u32 op; | |
| 453 | − | |
| 454 | − /** @mem_region: Memory region to prefetch VMA to, instance not a mask */ | |
| 455 | − __u32 region; | |
| 456 | − | |
| 457 | 455 | #define XE_VM_BIND_OP_MAP 0x0 |
| 458 | 456 | #define XE_VM_BIND_OP_UNMAP 0x1 |
| 459 | 457 | #define XE_VM_BIND_OP_MAP_USERPTR 0x2 |
| @@ -500,6 +498,11 @@ struct drm_xe_vm_bind_op { · 40 unmodified lines | ||
| 500 | 498 | * intended to implement VK sparse bindings. |
| 501 | 499 | */ |
| 502 | 500 | #define XE_VM_BIND_FLAG_NULL (0x1 << 19) |
| 501 | + /** @op: Operation to perform (lower 16 bits) and flags (upper 16 bits) */ | |
| 502 | + __u32 op; | |
| 503 | + | |
| 504 | + /** @mem_region: Memory region to prefetch VMA to, instance not a mask */ | |
| 505 | + __u32 region; | |
| 503 | 506 | |
| 504 | 507 | /** @reserved: Reserved */ |
| 505 | 508 | __u64 reserved[2]; |
| @@ -528,6 +531,7 @@ struct drm_xe_vm_bind { · 22 unmodified lines | ||
| 528 | 531 | union { |
| 529 | 532 | /** @bind: used if num_binds == 1 */ |
| 530 | 533 | struct drm_xe_vm_bind_op bind; |
| 534 | + | |
| 531 | 535 | /** |
| 532 | 536 | * @vector_of_binds: userptr to array of struct |
| 533 | 537 | * drm_xe_vm_bind_op if num_binds > 1 |
| @@ -575,7 +579,6 @@ struct drm_xe_engine_set_property { · 41 unmodified lines | ||
| 575 | 579 | /** @engine_id: Engine ID */ |
| 576 | 580 | __u32 engine_id; |
| 577 | 581 | |
| 578 | − /** @property: property to set */ | |
| 579 | 582 | #define XE_ENGINE_SET_PROPERTY_PRIORITY 0 |
| 580 | 583 | #define XE_ENGINE_SET_PROPERTY_TIMESLICE 1 |
| 581 | 584 | #define XE_ENGINE_SET_PROPERTY_PREEMPTION_TIMEOUT 2 |
| @@ -591,6 +594,7 @@ struct drm_xe_engine_set_property { · 9 unmodified lines | ||
| 591 | 594 | #define XE_ENGINE_SET_PROPERTY_ACC_TRIGGER 6 |
| 592 | 595 | #define XE_ENGINE_SET_PROPERTY_ACC_NOTIFY 7 |
| 593 | 596 | #define XE_ENGINE_SET_PROPERTY_ACC_GRANULARITY 8 |
| 597 | + /** @property: property to set */ | |
| 594 | 598 | __u32 property; |
| 595 | 599 | |
| 596 | 600 | /** @value: property value */ |
| @@ -602,8 +606,6 @@ struct drm_xe_engine_set_property { · 5 unmodified lines | ||
| 602 | 606 | |
| 603 | 607 | /** struct drm_xe_engine_class_instance - instance of an engine class */ |
| 604 | 608 | struct drm_xe_engine_class_instance { |
| 605 | − __u16 engine_class; | |
| 606 | − | |
| 607 | 609 | #define DRM_XE_ENGINE_CLASS_RENDER 0 |
| 608 | 610 | #define DRM_XE_ENGINE_CLASS_COPY 1 |
| 609 | 611 | #define DRM_XE_ENGINE_CLASS_VIDEO_DECODE 2 |
| @@ -614,14 +616,15 @@ struct drm_xe_engine_class_instance { · 4 unmodified lines | ||
| 614 | 616 | * creating ordered queues of VM bind operations. |
| 615 | 617 | */ |
| 616 | 618 | #define DRM_XE_ENGINE_CLASS_VM_BIND 5 |
| 619 | + __u16 engine_class; | |
| 617 | 620 | |
| 618 | 621 | __u16 engine_instance; |
| 619 | 622 | __u16 gt_id; |
| 620 | 623 | }; |
| 621 | 624 | |
| 622 | 625 | struct drm_xe_engine_create { |
| 623 | − /** @extensions: Pointer to the first extension struct, if any */ | |
| 624 | 626 | #define XE_ENGINE_EXTENSION_SET_PROPERTY 0 |
| 627 | + /** @extensions: Pointer to the first extension struct, if any */ | |
| 625 | 628 | __u64 extensions; |
| 626 | 629 | |
| 627 | 630 | /** @width: submission width (number BB per exec) for this engine */ |
| @@ -659,8 +662,8 @@ struct drm_xe_engine_get_property { · 31 unmodified lines | ||
| 659 | 662 | /** @engine_id: Engine ID */ |
| 660 | 663 | __u32 engine_id; |
| 661 | 664 | |
| 662 | − /** @property: property to get */ | |
| 663 | 665 | #define XE_ENGINE_GET_PROPERTY_BAN 0 |
| 666 | + /** @property: property to get */ | |
| 664 | 667 | __u32 property; |
| 665 | 668 | |
| 666 | 669 | /** @value: property value */ |
| @@ -685,19 +688,19 @@ struct drm_xe_sync { · 18 unmodified lines | ||
| 685 | 688 | /** @extensions: Pointer to the first extension struct, if any */ |
| 686 | 689 | __u64 extensions; |
| 687 | 690 | |
| 688 | − __u32 flags; | |
| 689 | − | |
| 690 | 691 | #define DRM_XE_SYNC_SYNCOBJ 0x0 |
| 691 | 692 | #define DRM_XE_SYNC_TIMELINE_SYNCOBJ 0x1 |
| 692 | 693 | #define DRM_XE_SYNC_DMA_BUF 0x2 |
| 693 | 694 | #define DRM_XE_SYNC_USER_FENCE 0x3 |
| 694 | 695 | #define DRM_XE_SYNC_SIGNAL 0x10 |
| 696 | + __u32 flags; | |
| 695 | 697 | |
| 696 | 698 | /** @pad: MBZ */ |
| 697 | 699 | __u32 pad; |
| 698 | 700 | |
| 699 | 701 | union { |
| 700 | 702 | __u32 handle; |
| 703 | + | |
| 701 | 704 | /** |
| 702 | 705 | * @addr: Address of user fence. When sync passed in via exec |
| 703 | 706 | * IOCTL this a GPU address in the VM. When sync passed in via |
| @@ -753,8 +756,6 @@ struct drm_xe_mmio { · 49 unmodified lines | ||
| 753 | 756 | |
| 754 | 757 | __u32 addr; |
| 755 | 758 | |
| 756 | − __u32 flags; | |
| 757 | − | |
| 758 | 759 | #define DRM_XE_MMIO_8BIT 0x0 |
| 759 | 760 | #define DRM_XE_MMIO_16BIT 0x1 |
| 760 | 761 | #define DRM_XE_MMIO_32BIT 0x2 |
| @@ -762,6 +763,7 @@ struct drm_xe_mmio { · 1 unmodified line | ||
| 762 | 763 | #define DRM_XE_MMIO_BITS_MASK 0x3 |
| 763 | 764 | #define DRM_XE_MMIO_READ 0x4 |
| 764 | 765 | #define DRM_XE_MMIO_WRITE 0x8 |
| 766 | + __u32 flags; | |
| 765 | 767 | |
| 766 | 768 | __u64 value; |
| 767 | 769 | |
| @@ -781,47 +783,57 @@ struct drm_xe_mmio { · 13 unmodified lines | ||
| 781 | 783 | struct drm_xe_wait_user_fence { |
| 782 | 784 | /** @extensions: Pointer to the first extension struct, if any */ |
| 783 | 785 | __u64 extensions; |
| 786 | + | |
| 784 | 787 | union { |
| 785 | 788 | /** |
| 786 | 789 | * @addr: user pointer address to wait on, must qword aligned |
| 787 | 790 | */ |
| 788 | 791 | __u64 addr; |
| 792 | + | |
| 789 | 793 | /** |
| 790 | 794 | * @vm_id: The ID of the VM which encounter an error used with |
| 791 | 795 | * DRM_XE_UFENCE_WAIT_VM_ERROR. Upper 32 bits must be clear. |
| 792 | 796 | */ |
| 793 | 797 | __u64 vm_id; |
| 794 | 798 | }; |
| 795 | − /** @op: wait operation (type of comparison) */ | |
| 799 | + | |
| 796 | 800 | #define DRM_XE_UFENCE_WAIT_EQ 0 |
| 797 | 801 | #define DRM_XE_UFENCE_WAIT_NEQ 1 |
| 798 | 802 | #define DRM_XE_UFENCE_WAIT_GT 2 |
| 799 | 803 | #define DRM_XE_UFENCE_WAIT_GTE 3 |
| 800 | 804 | #define DRM_XE_UFENCE_WAIT_LT 4 |
| 801 | 805 | #define DRM_XE_UFENCE_WAIT_LTE 5 |
| 806 | + /** @op: wait operation (type of comparison) */ | |
| 802 | 807 | __u16 op; |
| 803 | − /** @flags: wait flags */ | |
| 808 | + | |
| 804 | 809 | #define DRM_XE_UFENCE_WAIT_SOFT_OP (1 << 0) /* e.g. Wait on VM bind */ |
| 805 | 810 | #define DRM_XE_UFENCE_WAIT_ABSTIME (1 << 1) |
| 806 | 811 | #define DRM_XE_UFENCE_WAIT_VM_ERROR (1 << 2) |
| 812 | + /** @flags: wait flags */ | |
| 807 | 813 | __u16 flags; |
| 814 | + | |
| 808 | 815 | /** @pad: MBZ */ |
| 809 | 816 | __u32 pad; |
| 817 | + | |
| 810 | 818 | /** @value: compare value */ |
| 811 | 819 | __u64 value; |
| 812 | − /** @mask: comparison mask */ | |
| 820 | + | |
| 813 | 821 | #define DRM_XE_UFENCE_WAIT_U8 0xffu |
| 814 | 822 | #define DRM_XE_UFENCE_WAIT_U16 0xffffu |
| 815 | 823 | #define DRM_XE_UFENCE_WAIT_U32 0xffffffffu |
| 816 | 824 | #define DRM_XE_UFENCE_WAIT_U64 0xffffffffffffffffu |
| 825 | + /** @mask: comparison mask */ | |
| 817 | 826 | __u64 mask; |
| 827 | + | |
| 818 | 828 | /** @timeout: how long to wait before bailing, value in jiffies */ |
| 819 | 829 | __s64 timeout; |
| 830 | + | |
| 820 | 831 | /** |
| 821 | 832 | * @num_engines: number of engine instances to wait on, must be zero |
| 822 | 833 | * when DRM_XE_UFENCE_WAIT_SOFT_OP set |
| 823 | 834 | */ |
| 824 | 835 | __u64 num_engines; |
| 836 | + | |
| 825 | 837 | /** |
| 826 | 838 | * @instances: user pointer to array of drm_xe_engine_class_instance to |
| 827 | 839 | * wait on, must be NULL when DRM_XE_UFENCE_WAIT_SOFT_OP set |
| @@ -882,7 +894,6 @@ struct drm_xe_vm_madvise { · 54 unmodified lines | ||
| 882 | 894 | #define DRM_XE_VMA_PRIORITY_HIGH 2 /* Must be elevated user */ |
| 883 | 895 | /* Pin the VMA in memory, must be elevated user */ |
| 884 | 896 | #define DRM_XE_VM_MADVISE_PIN 6 |
| 885 | − | |
| 886 | 897 | /** @property: property to set */ |
| 887 | 898 | __u32 property; |
| 888 | 899 | |