- Fix the build error with clamp after WARN_ON on gcc 13.x+ (Guenter) - HDCP related fixes (Suraj) - PMU fix zero delta busyness issue (Umesh) - Fix page cleanup on DMA remap failure (Brian) - Drop 64bpp YUV formats from ICL+ SDR planes (Ville) - GuC log related fix (Daniele) - DisplayPort related fixes (Ankit, Jani) Signed-off-by: Dave Airlie <airlied@redhat.com>
Unified · Split
| @@ -41,8 +41,9 @@ static u32 scale(u32 source_val, · 40 unmodified lines | ||
| 41 | 41 | { |
| 42 | 42 | u64 target_val; |
| 43 | 43 | |
| 44 | − WARN_ON(source_min > source_max); | |
| 45 | − WARN_ON(target_min > target_max); | |
| 44 | + if (WARN_ON(source_min >= source_max) || | |
| 45 | + WARN_ON(target_min > target_max)) | |
| 46 | + return target_min; | |
| 46 | 47 | |
| 47 | 48 | /* defensive */ |
| 48 | 49 | source_val = clamp(source_val, source_min, source_max); |
| @@ -1791,7 +1791,7 @@ int intel_dp_dsc_max_src_input_bpc(struct intel_display *display) · 1790 unmodified lines | ||
| 1791 | 1791 | if (DISPLAY_VER(display) == 11) |
| 1792 | 1792 | return 10; |
| 1793 | 1793 | |
| 1794 | − return 0; | |
| 1794 | + return intel_dp_dsc_min_src_input_bpc(); | |
| 1795 | 1795 | } |
| 1796 | 1796 | |
| 1797 | 1797 | int intel_dp_dsc_compute_max_bpp(const struct intel_connector *connector, |
| @@ -2072,11 +2072,10 @@ icl_dsc_compute_link_config(struct intel_dp *intel_dp, · 274 unmodified lines | ||
| 2072 | 2072 | /* Compressed BPP should be less than the Input DSC bpp */ |
| 2073 | 2073 | dsc_max_bpp = min(dsc_max_bpp, pipe_bpp - 1); |
| 2074 | 2074 | |
| 2075 | − for (i = 0; i < ARRAY_SIZE(valid_dsc_bpp); i++) { | |
| 2076 | − if (valid_dsc_bpp[i] < dsc_min_bpp) | |
| 2075 | + for (i = ARRAY_SIZE(valid_dsc_bpp) - 1; i >= 0; i--) { | |
| 2076 | + if (valid_dsc_bpp[i] < dsc_min_bpp || | |
| 2077 | + valid_dsc_bpp[i] > dsc_max_bpp) | |
| 2077 | 2078 | continue; |
| 2078 | − if (valid_dsc_bpp[i] > dsc_max_bpp) | |
| 2079 | − break; | |
| 2080 | 2079 | |
| 2081 | 2080 | ret = dsc_compute_link_config(intel_dp, |
| 2082 | 2081 | pipe_config, |
| @@ -2829,7 +2828,6 @@ static void intel_dp_compute_as_sdp(struct intel_dp *intel_dp, · 746 unmodified lines | ||
| 2829 | 2828 | |
| 2830 | 2829 | crtc_state->infoframes.enable |= intel_hdmi_infoframe_enable(DP_SDP_ADAPTIVE_SYNC); |
| 2831 | 2830 | |
| 2832 | − /* Currently only DP_AS_SDP_AVT_FIXED_VTOTAL mode supported */ | |
| 2833 | 2831 | as_sdp->sdp_type = DP_SDP_ADAPTIVE_SYNC; |
| 2834 | 2832 | as_sdp->length = 0x9; |
| 2835 | 2833 | as_sdp->duration_incr_ms = 0; |
| @@ -2840,7 +2838,7 @@ static void intel_dp_compute_as_sdp(struct intel_dp *intel_dp, · 4 unmodified lines | ||
| 2840 | 2838 | as_sdp->target_rr = drm_mode_vrefresh(adjusted_mode); |
| 2841 | 2839 | as_sdp->target_rr_divider = true; |
| 2842 | 2840 | } else { |
| 2843 | − as_sdp->mode = DP_AS_SDP_AVT_FIXED_VTOTAL; | |
| 2841 | + as_sdp->mode = DP_AS_SDP_AVT_DYNAMIC_VTOTAL; | |
| 2844 | 2842 | as_sdp->vtotal = adjusted_mode->vtotal; |
| 2845 | 2843 | as_sdp->target_rr = 0; |
| 2846 | 2844 | } |
| @@ -341,6 +341,10 @@ int intel_dp_mtp_tu_compute_config(struct intel_dp *intel_dp, · 340 unmodified lines | ||
| 341 | 341 | |
| 342 | 342 | break; |
| 343 | 343 | } |
| 344 | + | |
| 345 | + /* Allow using zero step to indicate one try */ | |
| 346 | + if (!step) | |
| 347 | + break; | |
| 344 | 348 | } |
| 345 | 349 | |
| 346 | 350 | if (slots < 0) { |
| @@ -41,7 +41,7 @@ intel_hdcp_adjust_hdcp_line_rekeying(struct intel_encoder *encoder, · 40 unmodified lines | ||
| 41 | 41 | u32 rekey_bit = 0; |
| 42 | 42 | |
| 43 | 43 | /* Here we assume HDMI is in TMDS mode of operation */ |
| 44 | − if (encoder->type != INTEL_OUTPUT_HDMI) | |
| 44 | + if (!intel_encoder_is_hdmi(encoder)) | |
| 45 | 45 | return; |
| 46 | 46 | |
| 47 | 47 | if (DISPLAY_VER(display) >= 30) { |
| @@ -2188,6 +2188,19 @@ static int intel_hdcp2_check_link(struct intel_connector *connector) · 2140 unmodified lines | ||
| 2188 | 2188 | |
| 2189 | 2189 | drm_dbg_kms(display->drm, |
| 2190 | 2190 | "HDCP2.2 Downstream topology change\n"); |
| 2191 | + | |
| 2192 | + ret = hdcp2_authenticate_repeater_topology(connector); | |
| 2193 | + if (!ret) { | |
| 2194 | + intel_hdcp_update_value(connector, | |
| 2195 | + DRM_MODE_CONTENT_PROTECTION_ENABLED, | |
| 2196 | + true); | |
| 2197 | + goto out; | |
| 2198 | + } | |
| 2199 | + | |
| 2200 | + drm_dbg_kms(display->drm, | |
| 2201 | + "[CONNECTOR:%d:%s] Repeater topology auth failed.(%d)\n", | |
| 2202 | + connector->base.base.id, connector->base.name, | |
| 2203 | + ret); | |
| 2191 | 2204 | } else { |
| 2192 | 2205 | drm_dbg_kms(display->drm, |
| 2193 | 2206 | "[CONNECTOR:%d:%s] HDCP2.2 link failed, retrying auth\n", |
| @@ -106,8 +106,6 @@ static const u32 icl_sdr_y_plane_formats[] = { · 105 unmodified lines | ||
| 106 | 106 | DRM_FORMAT_Y216, |
| 107 | 107 | DRM_FORMAT_XYUV8888, |
| 108 | 108 | DRM_FORMAT_XVYU2101010, |
| 109 | − DRM_FORMAT_XVYU12_16161616, | |
| 110 | − DRM_FORMAT_XVYU16161616, | |
| 111 | 109 | }; |
| 112 | 110 | |
| 113 | 111 | static const u32 icl_sdr_uv_plane_formats[] = { |
| @@ -134,8 +132,6 @@ static const u32 icl_sdr_uv_plane_formats[] = { · 20 unmodified lines | ||
| 134 | 132 | DRM_FORMAT_Y216, |
| 135 | 133 | DRM_FORMAT_XYUV8888, |
| 136 | 134 | DRM_FORMAT_XVYU2101010, |
| 137 | − DRM_FORMAT_XVYU12_16161616, | |
| 138 | − DRM_FORMAT_XVYU16161616, | |
| 139 | 135 | }; |
| 140 | 136 | |
| 141 | 137 | static const u32 icl_hdr_plane_formats[] = { |
| @@ -209,8 +209,6 @@ static int shmem_get_pages(struct drm_i915_gem_object *obj) · 208 unmodified lines | ||
| 209 | 209 | struct address_space *mapping = obj->base.filp->f_mapping; |
| 210 | 210 | unsigned int max_segment = i915_sg_segment_size(i915->drm.dev); |
| 211 | 211 | struct sg_table *st; |
| 212 | − struct sgt_iter sgt_iter; | |
| 213 | − struct page *page; | |
| 214 | 212 | int ret; |
| 215 | 213 | |
| 216 | 214 | /* |
| @@ -239,9 +237,7 @@ rebuild_st: · 22 unmodified lines | ||
| 239 | 237 | * for PAGE_SIZE chunks instead may be helpful. |
| 240 | 238 | */ |
| 241 | 239 | if (max_segment > PAGE_SIZE) { |
| 242 | − for_each_sgt_page(page, sgt_iter, st) | |
| 243 | − put_page(page); | |
| 244 | − sg_free_table(st); | |
| 240 | + shmem_sg_free_table(st, mapping, false, false); | |
| 245 | 241 | kfree(st); |
| 246 | 242 | |
| 247 | 243 | max_segment = PAGE_SIZE; |
| @@ -1469,6 +1469,19 @@ static void __reset_guc_busyness_stats(struct intel_guc *guc) · 1468 unmodified lines | ||
| 1469 | 1469 | spin_unlock_irqrestore(&guc->timestamp.lock, flags); |
| 1470 | 1470 | } |
| 1471 | 1471 | |
| 1472 | +static void __update_guc_busyness_running_state(struct intel_guc *guc) | |
| 1473 | +{ | |
| 1474 | + struct intel_gt *gt = guc_to_gt(guc); | |
| 1475 | + struct intel_engine_cs *engine; | |
| 1476 | + enum intel_engine_id id; | |
| 1477 | + unsigned long flags; | |
| 1478 | + | |
| 1479 | + spin_lock_irqsave(&guc->timestamp.lock, flags); | |
| 1480 | + for_each_engine(engine, gt, id) | |
| 1481 | + engine->stats.guc.running = false; | |
| 1482 | + spin_unlock_irqrestore(&guc->timestamp.lock, flags); | |
| 1483 | +} | |
| 1484 | + | |
| 1472 | 1485 | static void __update_guc_busyness_stats(struct intel_guc *guc) |
| 1473 | 1486 | { |
| 1474 | 1487 | struct intel_gt *gt = guc_to_gt(guc); |
| @@ -1619,6 +1632,9 @@ void intel_guc_busyness_park(struct intel_gt *gt) · 144 unmodified lines | ||
| 1619 | 1632 | if (!guc_submission_initialized(guc)) |
| 1620 | 1633 | return; |
| 1621 | 1634 | |
| 1635 | + /* Assume no engines are running and set running state to false */ | |
| 1636 | + __update_guc_busyness_running_state(guc); | |
| 1637 | + | |
| 1622 | 1638 | /* |
| 1623 | 1639 | * There is a race with suspend flow where the worker runs after suspend |
| 1624 | 1640 | * and causes an unclaimed register access warning. Cancel the worker |
| @@ -5519,12 +5535,20 @@ static inline void guc_log_context(struct drm_printer *p, · 3894 unmodified lines | ||
| 5519 | 5535 | { |
| 5520 | 5536 | drm_printf(p, "GuC lrc descriptor %u:\n", ce->guc_id.id); |
| 5521 | 5537 | drm_printf(p, "\tHW Context Desc: 0x%08x\n", ce->lrc.lrca); |
| 5522 | − drm_printf(p, "\t\tLRC Head: Internal %u, Memory %u\n", | |
| 5523 | − ce->ring->head, | |
| 5524 | − ce->lrc_reg_state[CTX_RING_HEAD]); | |
| 5525 | − drm_printf(p, "\t\tLRC Tail: Internal %u, Memory %u\n", | |
| 5526 | − ce->ring->tail, | |
| 5527 | − ce->lrc_reg_state[CTX_RING_TAIL]); | |
| 5538 | + if (intel_context_pin_if_active(ce)) { | |
| 5539 | + drm_printf(p, "\t\tLRC Head: Internal %u, Memory %u\n", | |
| 5540 | + ce->ring->head, | |
| 5541 | + ce->lrc_reg_state[CTX_RING_HEAD]); | |
| 5542 | + drm_printf(p, "\t\tLRC Tail: Internal %u, Memory %u\n", | |
| 5543 | + ce->ring->tail, | |
| 5544 | + ce->lrc_reg_state[CTX_RING_TAIL]); | |
| 5545 | + intel_context_unpin(ce); | |
| 5546 | + } else { | |
| 5547 | + drm_printf(p, "\t\tLRC Head: Internal %u, Memory not pinned\n", | |
| 5548 | + ce->ring->head); | |
| 5549 | + drm_printf(p, "\t\tLRC Tail: Internal %u, Memory not pinned\n", | |
| 5550 | + ce->ring->tail); | |
| 5551 | + } | |
| 5528 | 5552 | drm_printf(p, "\t\tContext Pin Count: %u\n", |
| 5529 | 5553 | atomic_read(&ce->pin_count)); |
| 5530 | 5554 | drm_printf(p, "\t\tGuC ID Ref Count: %u\n", |