A few fixes for 4.19: - Add a new polaris pci id - KFD fixes for raven and gfx7
Unified · Split
| @@ -272,7 +272,7 @@ void amdgpu_amdkfd_gpu_reset(struct kgd_dev *kgd) · 271 unmodified lines | ||
| 272 | 272 | |
| 273 | 273 | int alloc_gtt_mem(struct kgd_dev *kgd, size_t size, |
| 274 | 274 | void **mem_obj, uint64_t *gpu_addr, |
| 275 | − void **cpu_ptr) | |
| 275 | + void **cpu_ptr, bool mqd_gfx9) | |
| 276 | 276 | { |
| 277 | 277 | struct amdgpu_device *adev = (struct amdgpu_device *)kgd; |
| 278 | 278 | struct amdgpu_bo *bo = NULL; |
| @@ -287,6 +287,10 @@ int alloc_gtt_mem(struct kgd_dev *kgd, size_t size, · 8 unmodified lines | ||
| 287 | 287 | bp.flags = AMDGPU_GEM_CREATE_CPU_GTT_USWC; |
| 288 | 288 | bp.type = ttm_bo_type_kernel; |
| 289 | 289 | bp.resv = NULL; |
| 290 | + | |
| 291 | + if (mqd_gfx9) | |
| 292 | + bp.flags |= AMDGPU_GEM_CREATE_MQD_GFX9; | |
| 293 | + | |
| 290 | 294 | r = amdgpu_bo_create(adev, &bp, &bo); |
| 291 | 295 | if (r) { |
| 292 | 296 | dev_err(adev->dev, |
| @@ -136,7 +136,7 @@ void amdgpu_amdkfd_gpu_reset(struct kgd_dev *kgd); · 135 unmodified lines | ||
| 136 | 136 | /* Shared API */ |
| 137 | 137 | int alloc_gtt_mem(struct kgd_dev *kgd, size_t size, |
| 138 | 138 | void **mem_obj, uint64_t *gpu_addr, |
| 139 | − void **cpu_ptr); | |
| 139 | + void **cpu_ptr, bool mqd_gfx9); | |
| 140 | 140 | void free_gtt_mem(struct kgd_dev *kgd, void *mem_obj); |
| 141 | 141 | void get_local_mem_info(struct kgd_dev *kgd, |
| 142 | 142 | struct kfd_local_mem_info *mem_info); |
| @@ -685,7 +685,7 @@ static int kgd_hqd_sdma_destroy(struct kgd_dev *kgd, void *mqd, · 684 unmodified lines | ||
| 685 | 685 | |
| 686 | 686 | while (true) { |
| 687 | 687 | temp = RREG32(sdma_base_addr + mmSDMA0_RLC0_CONTEXT_STATUS); |
| 688 | − if (temp & SDMA0_STATUS_REG__RB_CMD_IDLE__SHIFT) | |
| 688 | + if (temp & SDMA0_RLC0_CONTEXT_STATUS__IDLE_MASK) | |
| 689 | 689 | break; |
| 690 | 690 | if (time_after(jiffies, end_jiffies)) |
| 691 | 691 | return -ETIME; |
| @@ -367,12 +367,14 @@ static int amdgpu_cgs_get_firmware_info(struct cgs_device *cgs_device, · 366 unmodified lines | ||
| 367 | 367 | break; |
| 368 | 368 | case CHIP_POLARIS10: |
| 369 | 369 | if (type == CGS_UCODE_ID_SMU) { |
| 370 | − if ((adev->pdev->device == 0x67df) && | |
| 371 | − ((adev->pdev->revision == 0xe0) || | |
| 372 | − (adev->pdev->revision == 0xe3) || | |
| 373 | − (adev->pdev->revision == 0xe4) || | |
| 374 | − (adev->pdev->revision == 0xe5) || | |
| 375 | − (adev->pdev->revision == 0xe7) || | |
| 370 | + if (((adev->pdev->device == 0x67df) && | |
| 371 | + ((adev->pdev->revision == 0xe0) || | |
| 372 | + (adev->pdev->revision == 0xe3) || | |
| 373 | + (adev->pdev->revision == 0xe4) || | |
| 374 | + (adev->pdev->revision == 0xe5) || | |
| 375 | + (adev->pdev->revision == 0xe7) || | |
| 376 | + (adev->pdev->revision == 0xef))) || | |
| 377 | + ((adev->pdev->device == 0x6fdf) && | |
| 376 | 378 | (adev->pdev->revision == 0xef))) { |
| 377 | 379 | info->is_kicker = true; |
| 378 | 380 | strcpy(fw_name, "amdgpu/polaris10_k_smc.bin"); |
| @@ -740,6 +740,7 @@ static const struct pci_device_id pciidlist[] = { · 739 unmodified lines | ||
| 740 | 740 | {0x1002, 0x67CA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10}, |
| 741 | 741 | {0x1002, 0x67CC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10}, |
| 742 | 742 | {0x1002, 0x67CF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10}, |
| 743 | + {0x1002, 0x6FDF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10}, | |
| 743 | 744 | /* Polaris12 */ |
| 744 | 745 | {0x1002, 0x6980, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12}, |
| 745 | 746 | {0x1002, 0x6981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12}, |
| @@ -457,7 +457,8 @@ bool kgd2kfd_device_init(struct kfd_dev *kfd, · 456 unmodified lines | ||
| 457 | 457 | |
| 458 | 458 | if (kfd->kfd2kgd->init_gtt_mem_allocation( |
| 459 | 459 | kfd->kgd, size, &kfd->gtt_mem, |
| 460 | − &kfd->gtt_start_gpu_addr, &kfd->gtt_start_cpu_ptr)){ | |
| 460 | + &kfd->gtt_start_gpu_addr, &kfd->gtt_start_cpu_ptr, | |
| 461 | + false)) { | |
| 461 | 462 | dev_err(kfd_device, "Could not allocate %d bytes\n", size); |
| 462 | 463 | goto out; |
| 463 | 464 | } |
| @@ -62,9 +62,20 @@ int kfd_iommu_device_init(struct kfd_dev *kfd) · 61 unmodified lines | ||
| 62 | 62 | struct amd_iommu_device_info iommu_info; |
| 63 | 63 | unsigned int pasid_limit; |
| 64 | 64 | int err; |
| 65 | + struct kfd_topology_device *top_dev; | |
| 65 | 66 | |
| 66 | − if (!kfd->device_info->needs_iommu_device) | |
| 67 | + top_dev = kfd_topology_device_by_id(kfd->id); | |
| 68 | + | |
| 69 | + /* | |
| 70 | + * Overwrite ATS capability according to needs_iommu_device to fix | |
| 71 | + * potential missing corresponding bit in CRAT of BIOS. | |
| 72 | + */ | |
| 73 | + if (!kfd->device_info->needs_iommu_device) { | |
| 74 | + top_dev->node_props.capability &= ~HSA_CAP_ATS_PRESENT; | |
| 67 | 75 | return 0; |
| 76 | + } | |
| 77 | + | |
| 78 | + top_dev->node_props.capability |= HSA_CAP_ATS_PRESENT; | |
| 68 | 79 | |
| 69 | 80 | iommu_info.flags = 0; |
| 70 | 81 | err = amd_iommu_device_info(kfd->pdev, &iommu_info); |
| @@ -88,7 +88,7 @@ static int init_mqd(struct mqd_manager *mm, void **mqd, · 87 unmodified lines | ||
| 88 | 88 | ALIGN(sizeof(struct v9_mqd), PAGE_SIZE), |
| 89 | 89 | &((*mqd_mem_obj)->gtt_mem), |
| 90 | 90 | &((*mqd_mem_obj)->gpu_addr), |
| 91 | − (void *)&((*mqd_mem_obj)->cpu_ptr)); | |
| 91 | + (void *)&((*mqd_mem_obj)->cpu_ptr), true); | |
| 92 | 92 | } else |
| 93 | 93 | retval = kfd_gtt_sa_allocate(mm->dev, sizeof(struct v9_mqd), |
| 94 | 94 | mqd_mem_obj); |
| @@ -806,6 +806,7 @@ int kfd_topology_add_device(struct kfd_dev *gpu); · 805 unmodified lines | ||
| 806 | 806 | int kfd_topology_remove_device(struct kfd_dev *gpu); |
| 807 | 807 | struct kfd_topology_device *kfd_topology_device_by_proximity_domain( |
| 808 | 808 | uint32_t proximity_domain); |
| 809 | +struct kfd_topology_device *kfd_topology_device_by_id(uint32_t gpu_id); | |
| 809 | 810 | struct kfd_dev *kfd_device_by_id(uint32_t gpu_id); |
| 810 | 811 | struct kfd_dev *kfd_device_by_pci_dev(const struct pci_dev *pdev); |
| 811 | 812 | int kfd_topology_enum_kfd_devices(uint8_t idx, struct kfd_dev **kdev); |
| @@ -63,22 +63,33 @@ struct kfd_topology_device *kfd_topology_device_by_proximity_domain( · 62 unmodified lines | ||
| 63 | 63 | return device; |
| 64 | 64 | } |
| 65 | 65 | |
| 66 | −struct kfd_dev *kfd_device_by_id(uint32_t gpu_id) | |
| 66 | +struct kfd_topology_device *kfd_topology_device_by_id(uint32_t gpu_id) | |
| 67 | 67 | { |
| 68 | − struct kfd_topology_device *top_dev; | |
| 69 | − struct kfd_dev *device = NULL; | |
| 68 | + struct kfd_topology_device *top_dev = NULL; | |
| 69 | + struct kfd_topology_device *ret = NULL; | |
| 70 | 70 | |
| 71 | 71 | down_read(&topology_lock); |
| 72 | 72 | |
| 73 | 73 | list_for_each_entry(top_dev, &topology_device_list, list) |
| 74 | 74 | if (top_dev->gpu_id == gpu_id) { |
| 75 | − device = top_dev->gpu; | |
| 75 | + ret = top_dev; | |
| 76 | 76 | break; |
| 77 | 77 | } |
| 78 | 78 | |
| 79 | 79 | up_read(&topology_lock); |
| 80 | 80 | |
| 81 | − return device; | |
| 81 | + return ret; | |
| 82 | +} | |
| 83 | + | |
| 84 | +struct kfd_dev *kfd_device_by_id(uint32_t gpu_id) | |
| 85 | +{ | |
| 86 | + struct kfd_topology_device *top_dev; | |
| 87 | + | |
| 88 | + top_dev = kfd_topology_device_by_id(gpu_id); | |
| 89 | + if (!top_dev) | |
| 90 | + return NULL; | |
| 91 | + | |
| 92 | + return top_dev->gpu; | |
| 82 | 93 | } |
| 83 | 94 | |
| 84 | 95 | struct kfd_dev *kfd_device_by_pci_dev(const struct pci_dev *pdev) |
| @@ -292,7 +292,7 @@ struct tile_config { · 291 unmodified lines | ||
| 292 | 292 | struct kfd2kgd_calls { |
| 293 | 293 | int (*init_gtt_mem_allocation)(struct kgd_dev *kgd, size_t size, |
| 294 | 294 | void **mem_obj, uint64_t *gpu_addr, |
| 295 | − void **cpu_ptr); | |
| 295 | + void **cpu_ptr, bool mqd_gfx9); | |
| 296 | 296 | |
| 297 | 297 | void (*free_gtt_mem)(struct kgd_dev *kgd, void *mem_obj); |
| 298 | 298 | |