Merge tag 'timers-clocksource-2025-11-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull clocksource updates from Thomas Gleixner: "Updates for clocksource and clockevent drivers: - A new driver for the Realtel system timer - Prevent the unbinding of timers when the drivers do not support that - Expand the timer counter readout for the SPRD driver to 64 bit to allow IOT devices suspend times of more than 36 hours, which is the current limit of the 32-bi readout - The usual small cleanups, fixes and enhancements all over the place" * tag 'timers-clocksource-2025-11-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: clocksource/drivers: Add Realtek system timer driver dt-bindings: timer: Add Realtek SYSTIMER clocksource/drivers/stm32-lp: Drop unused module alias clocksource/drivers/rda: Add sched_clock_register for RDA8810PL SoC clocksource/drivers/nxp-stm: Prevent driver unbind clocksource/drivers/nxp-pit: Prevent driver unbind clocksource/drivers/arm_arch_timer_mmio: Prevent driver unbind clocksource/drivers/nxp-stm: Fix section mismatches clocksource/drivers/sh_cmt: Always leave device running after probe clocksource/drivers/stm: Fix double deregistration on probe failure clocksource/drivers/ralink: Fix resource leaks in init error path clocksource/drivers/timer-sp804: Fix read_current_timer() issue when clock source is not registered clocksource/drivers/sprd: Enable register for timer counter from 32 bit to 64 bit

Linus Torvalds committed 11 months ago

Commit 5028f422 parents 9ce62eb 2437f7914 files · +291 −56Browse files

Unified · Split

14 files

Documentation/devicetree/bindings/timer/realtek,rtd1625-systimer.yaml +47 −0
MAINTAINERS +5 −0
drivers/clocksource/Kconfig +11 −0
drivers/clocksource/Makefile +1 −0
drivers/clocksource/arm_arch_timer_mmio.c +2 −0
drivers/clocksource/sh_cmt.c +3 −33
drivers/clocksource/timer-nxp-pit.c +2 −1
drivers/clocksource/timer-nxp-stm.c +11 −12
drivers/clocksource/timer-ralink.c +9 −2
drivers/clocksource/timer-rda.c +8 −1
drivers/clocksource/timer-realtek.c +150 −0
drivers/clocksource/timer-sp804.c +24 −0
drivers/clocksource/timer-sprd.c +18 −6
drivers/clocksource/timer-stm32-lp.c +0 −1

Documentation/devicetree/bindings/timer/realtek,rtd1625-systimer.yaml+47−0

@@ -0,0 +1,47 @@
	1	# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/timer/realtek,rtd1625-systimer.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Realtek System Timer
	8
	9	maintainers:
	10	- Hao-Wen Ting <haowen.ting@realtek.com>
	11
	12	description:
	13	The Realtek SYSTIMER (System Timer) is a 64-bit global hardware counter operating
	14	at a fixed 1MHz frequency. Thanks to its compare match interrupt capability,
	15	the timer natively supports oneshot mode for tick broadcast functionality.
	16
	17	properties:
	18	compatible:
	19	oneOf:
	20	- const: realtek,rtd1625-systimer
	21	- items:
	22	- const: realtek,rtd1635-systimer
	23	- const: realtek,rtd1625-systimer
	24
	25	reg:
	26	maxItems: 1
	27
	28	interrupts:
	29	maxItems: 1
	30
	31	required:
	32	- compatible
	33	- reg
	34	- interrupts
	35
	36	additionalProperties: false
	37
	38	examples:
	39	- \|
	40	#include <dt-bindings/interrupt-controller/arm-gic.h>
	41
	42	timer@89420 {
	43	compatible = "realtek,rtd1635-systimer",
	44	"realtek,rtd1625-systimer";
	45	reg = <0x89420 0x18>;
	46	interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
	47	};

MAINTAINERS+5−0

 F:	Documentation/devicetree/bindings/spi/realtek,rtl9301-snand.yaml
 F:	drivers/spi/spi-realtek-rtl-snand.c
+REALTEK SYSTIMER DRIVER
+M:	Hao-Wen Ting <haowen.ting@realtek.com>
+S:	Maintained
+F:	drivers/clocksource/timer-realtek.c
 REALTEK WIRELESS DRIVER (rtlwifi family)
 M:	Ping-Ke Shih <pkshih@realtek.com>
 L:	linux-wireless@vger.kernel.org

drivers/clocksource/Kconfig+11−0

@@ -782,4 +782,15 @@ config NXP_STM_TIMER · 781 unmodified lines
782	Enables the support for NXP System Timer Module found in the	782	Enables the support for NXP System Timer Module found in the
783	s32g NXP platform series.	783	s32g NXP platform series.
784		784
		785	config RTK_SYSTIMER
		786	bool "Realtek SYSTIMER support"
		787	depends on ARM \|\| ARM64
		788	depends on ARCH_REALTEK \|\| COMPILE_TEST
		789	select TIMER_OF
		790	help
		791	This option enables the driver that registers the global 1 MHz hardware
		792	counter as a clock event device on Realtek SoCs. Make sure to enable
		793	this option only when building for a Realtek platform or for compilation
		794	testing.
		795
785	endmenu	796	endmenu

drivers/clocksource/Makefile+1−0

@@ -95,3 +95,4 @@ obj-$(CONFIG_CLKSRC_LOONGSON1_PWM) += timer-loongson1-pwm.o · 94 unmodified lines
95	obj-$(CONFIG_EP93XX_TIMER) += timer-ep93xx.o	95	obj-$(CONFIG_EP93XX_TIMER) += timer-ep93xx.o
96	obj-$(CONFIG_RALINK_TIMER) += timer-ralink.o	96	obj-$(CONFIG_RALINK_TIMER) += timer-ralink.o
97	obj-$(CONFIG_NXP_STM_TIMER) += timer-nxp-stm.o	97	obj-$(CONFIG_NXP_STM_TIMER) += timer-nxp-stm.o
		98	obj-$(CONFIG_RTK_SYSTIMER) += timer-realtek.o

drivers/clocksource/arm_arch_timer_mmio.c+2−0

 	.driver	= {
 		.name = "arch-timer-mmio",
 		.of_match_table	= arch_timer_mmio_of_table,
+		.suppress_bind_attrs = true,
 	},
 	.probe	= arch_timer_mmio_probe,
 };
 static struct platform_driver arch_timer_mmio_acpi_drv = {
 	.driver	= {
 		.name = "gtdt-arm-mmio-timer",
+		.suppress_bind_attrs = true,
 	},
 	.probe	= arch_timer_mmio_probe,
 };

drivers/clocksource/sh_cmt.c+3−33

 	dev_pm_syscore_device(&ch->cmt->pdev->dev, true);
-	/* enable clock */
-	ret = clk_enable(ch->cmt->clk);
-	if (ret) {
-		dev_err(&ch->cmt->pdev->dev, "ch%u: cannot enable clock\n",
-			ch->index);
-		goto err0;
-	}
 	/* make sure channel is disabled */
 	sh_cmt_start_stop_ch(ch, 0);
 	if (ret || sh_cmt_read_cmcnt(ch)) {
 		dev_err(&ch->cmt->pdev->dev, "ch%u: cannot clear CMCNT\n",
 			ch->index);
-		ret = -ETIMEDOUT;
+		return -ETIMEDOUT;
-		goto err1;
 	}
 	/* enable channel */
 	sh_cmt_start_stop_ch(ch, 1);
 	return 0;
- err1:
-	/* stop clock */
-	clk_disable(ch->cmt->clk);
- err0:
-	return ret;
 }
 static void sh_cmt_disable(struct sh_cmt_channel *ch)
 	/* disable interrupts in CMT block */
 	sh_cmt_write_cmcsr(ch, 0);
-	/* stop clock */
-	clk_disable(ch->cmt->clk);
 	dev_pm_syscore_device(&ch->cmt->pdev->dev, false);
 }
 	int ret = 0;
 	unsigned long flags;
-	pm_runtime_get_sync(&ch->cmt->pdev->dev);
 	raw_spin_lock_irqsave(&ch->lock, flags);
 	if (!(ch->flags & (FLAG_CLOCKEVENT | FLAG_CLOCKSOURCE)))
 		sh_cmt_disable(ch);
 	raw_spin_unlock_irqrestore(&ch->lock, flags);
-	pm_runtime_put(&ch->cmt->pdev->dev);
 }
 static int sh_cmt_start_clockevent(struct sh_cmt_channel *ch)
 	raw_spin_lock_irqsave(&ch->lock, flags);
-	if (!(ch->flags & (FLAG_CLOCKEVENT | FLAG_CLOCKSOURCE))) {
+	if (!(ch->flags & (FLAG_CLOCKEVENT | FLAG_CLOCKSOURCE)))
-		pm_runtime_get_sync(&ch->cmt->pdev->dev);
 		ret = sh_cmt_enable(ch);
-	}
 	if (ret)
 		goto out;
 	ch->flags &= ~FLAG_CLOCKEVENT;
-	if (f && !(ch->flags & (FLAG_CLOCKEVENT | FLAG_CLOCKSOURCE))) {
+	if (f && !(ch->flags & (FLAG_CLOCKEVENT | FLAG_CLOCKSOURCE)))
 		sh_cmt_disable(ch);
-		pm_runtime_put(&ch->cmt->pdev->dev);
-	}
 	/* adjust the timeout to maximum if only clocksource left */
 	if (ch->flags & FLAG_CLOCKSOURCE)
 		mask &= ~(1 << hwidx);
 	}
-	clk_disable(cmt->clk);
 	platform_set_drvdata(pdev, cmt);
 	return 0;
  out:
 	if (cmt->has_clockevent || cmt->has_clocksource)
 		pm_runtime_irq_safe(&pdev->dev);
-	else
-		pm_runtime_idle(&pdev->dev);
 	return 0;
 }

drivers/clocksource/timer-nxp-pit.c+2−1

 	.driver = {
 		.name = "nxp-pit",
 		.of_match_table = pit_timer_of_match,
+		.suppress_bind_attrs = true,
 	},
 	.probe = pit_timer_probe,
 };
-module_platform_driver(nxp_pit_driver);
+builtin_platform_driver(nxp_pit_driver);
 TIMER_OF_DECLARE(vf610, "fsl,vf610-pit", pit_timer_init);

drivers/clocksource/timer-nxp-stm.c+11−12

 	nxp_stm_clocksource_enable(cs);
 }
-static void __init devm_clocksource_unregister(void *data)
+static void devm_clocksource_unregister(void *data)
 {
 	struct stm_timer *stm_timer = data;
 	clocksource_unregister(&stm_timer->cs);
 }
-static int __init nxp_stm_clocksource_init(struct device *dev, struct stm_timer *stm_timer,
+static int nxp_stm_clocksource_init(struct device *dev, struct stm_timer *stm_timer,
-					   const char *name, void __iomem *base, struct clk *clk)
+				    const char *name, void __iomem *base, struct clk *clk)
 {
 	int ret;
 		return ret;
 	ret = devm_add_action_or_reset(dev, devm_clocksource_unregister, stm_timer);
-	if (ret) {
+	if (ret)
-		clocksource_unregister(&stm_timer->cs);
 		return ret;
-	}
 	stm_sched_clock = stm_timer;
 	nxp_stm_module_get(stm_timer);
 }
-static int __init nxp_stm_clockevent_per_cpu_init(struct device *dev, struct stm_timer *stm_timer,
+static int nxp_stm_clockevent_per_cpu_init(struct device *dev, struct stm_timer *stm_timer,
-						  const char *name, void __iomem *base, int irq,
+					   const char *name, void __iomem *base, int irq,
-						  struct clk *clk, int cpu)
+					   struct clk *clk, int cpu)
 {
 	stm_timer->base = base;
 	stm_timer->rate = clk_get_rate(clk);
 	return IRQ_HANDLED;
 }
-static int __init nxp_stm_timer_probe(struct platform_device *pdev)
+static int nxp_stm_timer_probe(struct platform_device *pdev)
 {
 	struct stm_timer *stm_timer;
 	struct device *dev = &pdev->dev;
 };
 MODULE_DEVICE_TABLE(of, nxp_stm_of_match);
-static struct platform_driver nxp_stm_probe = {
+static struct platform_driver nxp_stm_driver = {
 	.probe	= nxp_stm_timer_probe,
 	.driver	= {
 		.name		= "nxp-stm",
 		.of_match_table	= nxp_stm_of_match,
+		.suppress_bind_attrs = true,
 	},
 };
-module_platform_driver(nxp_stm_probe);
+builtin_platform_driver(nxp_stm_driver);
 MODULE_DESCRIPTION("NXP System Timer Module driver");
 MODULE_LICENSE("GPL");

drivers/clocksource/timer-ralink.c+9−2

 	systick.dev.irq = irq_of_parse_and_map(np, 0);
 	if (!systick.dev.irq) {
 		pr_err("%pOFn: request_irq failed", np);
-		return -EINVAL;
+		ret = -EINVAL;
+		goto err_iounmap;
 	}
 	ret = clocksource_mmio_init(systick.membase + SYSTICK_COUNT, np->name,
 				    SYSTICK_FREQ, 301, 16,
 				    clocksource_mmio_readl_up);
 	if (ret)
-		return ret;
+		goto err_free_irq;
 	clockevents_register_device(&systick.dev);
 			np, systick.dev.mult, systick.dev.shift);
 	return 0;
+err_free_irq:
+	irq_dispose_mapping(systick.dev.irq);
+err_iounmap:
+	iounmap(systick.membase);
+	return ret;
 }
 TIMER_OF_DECLARE(systick, "ralink,cevt-systick", ralink_systick_init);

drivers/clocksource/timer-rda.c+8−1

 #include <linux/init.h>
 #include <linux/interrupt.h>
+#include <linux/sched_clock.h>
 #include "timer-of.h"
 	},
 };
-static u64 rda_hwtimer_read(struct clocksource *cs)
+static u64 rda_hwtimer_clocksource_read(void)
 {
 	void __iomem *base = timer_of_base(&rda_ostimer_of);
 	u32 lo, hi;
 	return ((u64)hi << 32) | lo;
 }
+static u64 rda_hwtimer_read(struct clocksource *cs)
+{
+	return rda_hwtimer_clocksource_read();
+}
 static struct clocksource rda_hwtimer_clocksource = {
 	.name           = "rda-timer",
 	.rating         = 400,
 		return ret;
 	clocksource_register_hz(&rda_hwtimer_clocksource, rate);
+	sched_clock_register(rda_hwtimer_clocksource_read, 64, rate);
 	clockevents_config_and_register(&rda_ostimer_of.clkevt, rate,
 					0x2, UINT_MAX);

drivers/clocksource/timer-realtek.c+150−0

@@ -0,0 +1,150 @@
	1	// SPDX-License-Identifier: GPL-2.0-only
	2	/*
	3	* Copyright (c) 2025 Realtek Semiconductor Corp.
	4	*/
	5
	6	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
	7
	8	#include <linux/irqflags.h>
	9	#include <linux/interrupt.h>
	10	#include "timer-of.h"
	11
	12	#define ENBL 1
	13	#define DSBL 0
	14
	15	#define SYSTIMER_RATE 1000000
	16	#define SYSTIMER_MIN_DELTA 0x64
	17	#define SYSTIMER_MAX_DELTA ULONG_MAX
	18
	19	/* SYSTIMER Register Offset (RTK Internal Use) */
	20	#define TS_LW_OFST 0x0
	21	#define TS_HW_OFST 0x4
	22	#define TS_CMP_VAL_LW_OFST 0x8
	23	#define TS_CMP_VAL_HW_OFST 0xC
	24	#define TS_CMP_CTRL_OFST 0x10
	25	#define TS_CMP_STAT_OFST 0x14
	26
	27	/* SYSTIMER CMP CTRL REG Mask */
	28	#define TS_CMP_EN_MASK 0x1
	29	#define TS_WR_EN0_MASK 0x2
	30
	31	static void __iomem *systimer_base;
	32
	33	static u64 rtk_ts64_read(void)
	34	{
	35	u32 low, high;
	36	u64 ts;
	37
	38	/* Caution: Read LSB word (TS_LW_OFST) first then MSB (TS_HW_OFST) */
	39	low = readl(systimer_base + TS_LW_OFST);
	40	high = readl(systimer_base + TS_HW_OFST);
	41	ts = ((u64)high << 32) \| low;
	42
	43	return ts;
	44	}
	45
	46	static void rtk_cmp_value_write(u64 value)
	47	{
	48	u32 high, low;
	49
	50	low = value & 0xFFFFFFFF;
	51	high = value >> 32;
	52
	53	writel(high, systimer_base + TS_CMP_VAL_HW_OFST);
	54	writel(low, systimer_base + TS_CMP_VAL_LW_OFST);
	55	}
	56
	57	static inline void rtk_cmp_en_write(bool cmp_en)
	58	{
	59	u32 val;
	60
	61	val = TS_WR_EN0_MASK;
	62	if (cmp_en == ENBL)
	63	val \|= TS_CMP_EN_MASK;
	64
	65	writel(val, systimer_base + TS_CMP_CTRL_OFST);
	66	}
	67
	68	static int rtk_syst_clkevt_next_event(unsigned long cycles, struct clock_event_device *clkevt)
	69	{
	70	u64 cmp_val;
	71
	72	rtk_cmp_en_write(DSBL);
	73	cmp_val = rtk_ts64_read();
	74
	75	/* Set CMP value to current timestamp plus delta_us */
	76	rtk_cmp_value_write(cmp_val + cycles);
	77	rtk_cmp_en_write(ENBL);
	78	return 0;
	79	}
	80
	81	static irqreturn_t rtk_ts_match_intr_handler(int irq, void *dev_id)
	82	{
	83	struct clock_event_device *clkevt = dev_id;
	84	void __iomem *reg_base;
	85	u32 val;
	86
	87	/* Disable TS CMP Match */
	88	rtk_cmp_en_write(DSBL);
	89
	90	/* Clear TS CMP INTR */
	91	reg_base = systimer_base + TS_CMP_STAT_OFST;
	92	val = readl(reg_base) & TS_CMP_EN_MASK;
	93	writel(val \| TS_CMP_EN_MASK, reg_base);
	94	clkevt->event_handler(clkevt);
	95
	96	return IRQ_HANDLED;
	97	}
	98
	99	static int rtk_syst_shutdown(struct clock_event_device *clkevt)
	100	{
	101	void __iomem *reg_base;
	102	u64 cmp_val = 0;
	103
	104	/* Disable TS CMP Match */
	105	rtk_cmp_en_write(DSBL);
	106	/* Set compare value to 0 */
	107	rtk_cmp_value_write(cmp_val);
	108
	109	/* Clear TS CMP INTR */
	110	reg_base = systimer_base + TS_CMP_STAT_OFST;
	111	writel(TS_CMP_EN_MASK, reg_base);
	112	return 0;
	113	}
	114
	115	static struct timer_of rtk_timer_to = {
	116	.flags = TIMER_OF_IRQ \| TIMER_OF_BASE,
	117
	118	.clkevt = {
	119	.name = "rtk-clkevt",
	120	.rating = 300,
	121	.cpumask = cpu_possible_mask,
	122	.features = CLOCK_EVT_FEAT_DYNIRQ \|
	123	CLOCK_EVT_FEAT_ONESHOT,
	124	.set_next_event = rtk_syst_clkevt_next_event,
	125	.set_state_oneshot = rtk_syst_shutdown,
	126	.set_state_shutdown = rtk_syst_shutdown,
	127	},
	128
	129	.of_irq = {
	130	.flags = IRQF_TIMER \| IRQF_IRQPOLL,
	131	.handler = rtk_ts_match_intr_handler,
	132	},
	133	};
	134
	135	static int __init rtk_systimer_init(struct device_node *node)
	136	{
	137	int ret;
	138
	139	ret = timer_of_init(node, &rtk_timer_to);
	140	if (ret)
	141	return ret;
	142
	143	systimer_base = timer_of_base(&rtk_timer_to);
	144	clockevents_config_and_register(&rtk_timer_to.clkevt, SYSTIMER_RATE,
	145	SYSTIMER_MIN_DELTA, SYSTIMER_MAX_DELTA);
	146
	147	return 0;
	148	}
	149
	150	TIMER_OF_DECLARE(rtk_systimer, "realtek,rtd1625-systimer", rtk_systimer_init);

drivers/clocksource/timer-sp804.c+24−0

 #include <linux/of_irq.h>
 #include <linux/sched_clock.h>
+#ifdef CONFIG_ARM
+#include <linux/delay.h>
+#endif
 #include "timer-sp.h"
 /* Hisilicon 64-bit timer(a variant of ARM SP804) */
 	return ~readl_relaxed(sched_clkevt->value);
 }
+#ifdef CONFIG_ARM
+static struct delay_timer delay;
+static unsigned long sp804_read_delay_timer_read(void)
+{
+	return sp804_read();
+}
+static void sp804_register_delay_timer(int freq)
+{
+	delay.freq = freq;
+	delay.read_current_timer = sp804_read_delay_timer_read;
+	register_current_timer_delay(&delay);
+}
+#else
+static inline void sp804_register_delay_timer(int freq) {}
+#endif
 static int __init sp804_clocksource_and_sched_clock_init(void __iomem *base,
 							 const char *name,
 							 struct clk *clk,
 	if (rate < 0)
 		return -EINVAL;
+	sp804_register_delay_timer(rate);
 	clkevt = sp804_clkevt_get(base);
 	writel(0, clkevt->ctrl);
 		if (ret)
 			goto err;
 	}
 	initialized = true;
 	return 0;

drivers/clocksource/timer-sprd.c+18−6

@@ -30,6 +30,7 @@ · 29 unmodified lines
30	#define TIMER_VALUE_SHDW_HI 0x1c	30	#define TIMER_VALUE_SHDW_HI 0x1c
31		31
32	#define TIMER_VALUE_LO_MASK GENMASK(31, 0)	32	#define TIMER_VALUE_LO_MASK GENMASK(31, 0)
		33	#define TIMER_VALUE_HI_MASK GENMASK(31, 0)
33		34
34	static void sprd_timer_enable(void __iomem *base, u32 flag)	35	static void sprd_timer_enable(void __iomem *base, u32 flag)
35	{	36	{
@@ -162,15 +163,26 @@ static struct timer_of suspend_to = { · 126 unmodified lines
162		163
163	static u64 sprd_suspend_timer_read(struct clocksource *cs)	164	static u64 sprd_suspend_timer_read(struct clocksource *cs)
164	{	165	{
165	return ~(u64)readl_relaxed(timer_of_base(&suspend_to) +	166	u32 lo, hi;
166	TIMER_VALUE_SHDW_LO) & cs->mask;	167
		168	do {
		169	hi = readl_relaxed(timer_of_base(&suspend_to) +
		170	TIMER_VALUE_SHDW_HI);
		171	lo = readl_relaxed(timer_of_base(&suspend_to) +
		172	TIMER_VALUE_SHDW_LO);
		173	} while (hi != readl_relaxed(timer_of_base(&suspend_to) + TIMER_VALUE_SHDW_HI));
		174
		175	return ~(((u64)hi << 32) \| lo);
167	}	176	}
168		177
169	static int sprd_suspend_timer_enable(struct clocksource *cs)	178	static int sprd_suspend_timer_enable(struct clocksource *cs)
170	{	179	{
171	sprd_timer_update_counter(timer_of_base(&suspend_to),	180	writel_relaxed(TIMER_VALUE_LO_MASK,
172	TIMER_VALUE_LO_MASK);	181	timer_of_base(&suspend_to) + TIMER_LOAD_LO);
173	sprd_timer_enable(timer_of_base(&suspend_to), TIMER_CTL_PERIOD_MODE);	182	writel_relaxed(TIMER_VALUE_HI_MASK,
		183	timer_of_base(&suspend_to) + TIMER_LOAD_HI);
		184	sprd_timer_enable(timer_of_base(&suspend_to),
		185	TIMER_CTL_PERIOD_MODE\|TIMER_CTL_64BIT_WIDTH);
174		186
175	return 0;	187	return 0;
176	}	188	}
@@ -186,7 +198,7 @@ static struct clocksource suspend_clocksource = { · 9 unmodified lines
186	.read = sprd_suspend_timer_read,	198	.read = sprd_suspend_timer_read,
187	.enable = sprd_suspend_timer_enable,	199	.enable = sprd_suspend_timer_enable,
188	.disable = sprd_suspend_timer_disable,	200	.disable = sprd_suspend_timer_disable,
189	.mask = CLOCKSOURCE_MASK(32),	201	.mask = CLOCKSOURCE_MASK(64),
190	.flags = CLOCK_SOURCE_IS_CONTINUOUS \| CLOCK_SOURCE_SUSPEND_NONSTOP,	202	.flags = CLOCK_SOURCE_IS_CONTINUOUS \| CLOCK_SOURCE_SUSPEND_NONSTOP,
191	};	203	};
192		204

drivers/clocksource/timer-stm32-lp.c+0−1

@@ -289,5 +289,4 @@ static struct platform_driver stm32_clkevent_lp_driver = { · 288 unmodified lines
289	};	289	};
290	module_platform_driver(stm32_clkevent_lp_driver);	290	module_platform_driver(stm32_clkevent_lp_driver);
291		291
292	MODULE_ALIAS("platform:stm32-lptimer-timer");
293	MODULE_DESCRIPTION("STMicroelectronics STM32 clockevent low power driver");	292	MODULE_DESCRIPTION("STMicroelectronics STM32 clockevent low power driver");

Merge tag 'timers-clocksource-2025-11-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

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