Pull late ARM updates from Russell King: "Here is the late set of ARM updates for this merge window; in here is: - The ARM parts of the broadcast timer support, core parts merged through tglx's tree. This was left over from the previous merge to allow the dependency on tglx's tree to be resolved. - A fix to the VFP code which shows up on Raspberry Pi's, as well as fixing the fallout from a previous commit in this area. - A number of smaller fixes scattered throughout the ARM tree" * 'for-linus' of git://git.linaro.org/people/rmk/linux-arm: ARM: Fix broken commit 0cc41e4a21d43 corrupting kernel messages ARM: fix scheduling while atomic warning in alignment handling code ARM: VFP: fix emulation of second VFP instruction ARM: 7656/1: uImage: Error out on build of multiplatform without LOADADDR ARM: 7640/1: memory: tegra_ahb_enable_smmu() depends on TEGRA_IOMMU_SMMU ARM: 7654/1: Preserve L_PTE_VALID in pte_modify() ARM: 7653/2: do not scale loops_per_jiffy when using a constant delay clock ARM: 7651/1: remove unused smp_timer_broadcast #define
Unified · Split
| @@ -68,8 +68,8 @@ else · 67 unmodified lines | |||
| 68 | endif | 68 | endif |
| 69 | 69 | ||
| 70 | check_for_multiple_loadaddr = \ | 70 | check_for_multiple_loadaddr = \ |
| 71 | if [ $(words $(UIMAGE_LOADADDR)) -gt 1 ]; then \ | 71 | if [ $(words $(UIMAGE_LOADADDR)) -ne 1 ]; then \ |
| 72 | echo 'multiple load addresses: $(UIMAGE_LOADADDR)'; \ | 72 | echo 'multiple (or no) load addresses: $(UIMAGE_LOADADDR)'; \ |
| 73 | echo 'This is incompatible with uImages'; \ | 73 | echo 'This is incompatible with uImages'; \ |
| 74 | echo 'Specify LOADADDR on the commandline to build an uImage'; \ | 74 | echo 'Specify LOADADDR on the commandline to build an uImage'; \ |
| 75 | false; \ | 75 | false; \ |
| @@ -24,6 +24,7 @@ extern struct arm_delay_ops { · 23 unmodified lines | |||
| 24 | void (*delay)(unsigned long); | 24 | void (*delay)(unsigned long); |
| 25 | void (*const_udelay)(unsigned long); | 25 | void (*const_udelay)(unsigned long); |
| 26 | void (*udelay)(unsigned long); | 26 | void (*udelay)(unsigned long); |
| 27 | bool const_clock; | ||
| 27 | } arm_delay_ops; | 28 | } arm_delay_ops; |
| 28 | 29 | ||
| 29 | #define __delay(n) arm_delay_ops.delay(n) | 30 | #define __delay(n) arm_delay_ops.delay(n) |
| @@ -247,7 +247,8 @@ static inline pte_t pte_mkspecial(pte_t pte) { return pte; } · 246 unmodified lines | |||
| 247 | 247 | ||
| 248 | static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) | 248 | static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) |
| 249 | { | 249 | { |
| 250 | const pteval_t mask = L_PTE_XN | L_PTE_RDONLY | L_PTE_USER | L_PTE_NONE; | 250 | const pteval_t mask = L_PTE_XN | L_PTE_RDONLY | L_PTE_USER | |
| 251 | L_PTE_NONE | L_PTE_VALID; | ||
| 251 | pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask); | 252 | pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask); |
| 252 | return pte; | 253 | return pte; |
| 253 | } | 254 | } |
| @@ -466,8 +466,6 @@ void tick_broadcast(const struct cpumask *mask) · 465 unmodified lines | |||
| 466 | { | 466 | { |
| 467 | smp_cross_call(mask, IPI_TIMER); | 467 | smp_cross_call(mask, IPI_TIMER); |
| 468 | } | 468 | } |
| 469 | #else | ||
| 470 | #define smp_timer_broadcast NULL | ||
| 471 | #endif | 469 | #endif |
| 472 | 470 | ||
| 473 | static void broadcast_timer_set_mode(enum clock_event_mode mode, | 471 | static void broadcast_timer_set_mode(enum clock_event_mode mode, |
| @@ -674,6 +672,9 @@ static int cpufreq_callback(struct notifier_block *nb, · 200 unmodified lines | |||
| 674 | if (freq->flags & CPUFREQ_CONST_LOOPS) | 672 | if (freq->flags & CPUFREQ_CONST_LOOPS) |
| 675 | return NOTIFY_OK; | 673 | return NOTIFY_OK; |
| 676 | 674 | ||
| 675 | if (arm_delay_ops.const_clock) | ||
| 676 | return NOTIFY_OK; | ||
| 677 | |||
| 677 | if (!per_cpu(l_p_j_ref, cpu)) { | 678 | if (!per_cpu(l_p_j_ref, cpu)) { |
| 678 | per_cpu(l_p_j_ref, cpu) = | 679 | per_cpu(l_p_j_ref, cpu) = |
| 679 | per_cpu(cpu_data, cpu).loops_per_jiffy; | 680 | per_cpu(cpu_data, cpu).loops_per_jiffy; |
| @@ -77,6 +77,7 @@ void __init register_current_timer_delay(const struct delay_timer *timer) · 76 unmodified lines | |||
| 77 | arm_delay_ops.delay = __timer_delay; | 77 | arm_delay_ops.delay = __timer_delay; |
| 78 | arm_delay_ops.const_udelay = __timer_const_udelay; | 78 | arm_delay_ops.const_udelay = __timer_const_udelay; |
| 79 | arm_delay_ops.udelay = __timer_udelay; | 79 | arm_delay_ops.udelay = __timer_udelay; |
| 80 | arm_delay_ops.const_clock = true; | ||
| 80 | delay_calibrated = true; | 81 | delay_calibrated = true; |
| 81 | } else { | 82 | } else { |
| 82 | pr_info("Ignoring duplicate/late registration of read_current_timer delay\n"); | 83 | pr_info("Ignoring duplicate/late registration of read_current_timer delay\n"); |
| @@ -749,7 +749,6 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs) · 748 unmodified lines | |||
| 749 | unsigned long instr = 0, instrptr; | 749 | unsigned long instr = 0, instrptr; |
| 750 | int (*handler)(unsigned long addr, unsigned long instr, struct pt_regs *regs); | 750 | int (*handler)(unsigned long addr, unsigned long instr, struct pt_regs *regs); |
| 751 | unsigned int type; | 751 | unsigned int type; |
| 752 | mm_segment_t fs; | ||
| 753 | unsigned int fault; | 752 | unsigned int fault; |
| 754 | u16 tinstr = 0; | 753 | u16 tinstr = 0; |
| 755 | int isize = 4; | 754 | int isize = 4; |
| @@ -760,16 +759,15 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs) · 4 unmodified lines | |||
| 760 | 759 | ||
| 761 | instrptr = instruction_pointer(regs); | 760 | instrptr = instruction_pointer(regs); |
| 762 | 761 | ||
| 763 | fs = get_fs(); | ||
| 764 | set_fs(KERNEL_DS); | ||
| 765 | if (thumb_mode(regs)) { | 762 | if (thumb_mode(regs)) { |
| 766 | fault = __get_user(tinstr, (u16 *)(instrptr & ~1)); | 763 | u16 *ptr = (u16 *)(instrptr & ~1); |
| 764 | fault = probe_kernel_address(ptr, tinstr); | ||
| 767 | if (!fault) { | 765 | if (!fault) { |
| 768 | if (cpu_architecture() >= CPU_ARCH_ARMv7 && | 766 | if (cpu_architecture() >= CPU_ARCH_ARMv7 && |
| 769 | IS_T32(tinstr)) { | 767 | IS_T32(tinstr)) { |
| 770 | /* Thumb-2 32-bit */ | 768 | /* Thumb-2 32-bit */ |
| 771 | u16 tinst2 = 0; | 769 | u16 tinst2 = 0; |
| 772 | fault = __get_user(tinst2, (u16 *)(instrptr+2)); | 770 | fault = probe_kernel_address(ptr + 1, tinst2); |
| 773 | instr = (tinstr << 16) | tinst2; | 771 | instr = (tinstr << 16) | tinst2; |
| 774 | thumb2_32b = 1; | 772 | thumb2_32b = 1; |
| 775 | } else { | 773 | } else { |
| @@ -778,8 +776,7 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs) · 2 unmodified lines | |||
| 778 | } | 776 | } |
| 779 | } | 777 | } |
| 780 | } else | 778 | } else |
| 781 | fault = __get_user(instr, (u32 *)instrptr); | 779 | fault = probe_kernel_address(instrptr, instr); |
| 782 | set_fs(fs); | ||
| 783 | 780 | ||
| 784 | if (fault) { | 781 | if (fault) { |
| 785 | type = TYPE_FAULT; | 782 | type = TYPE_FAULT; |
| @@ -22,12 +22,14 @@ · 21 unmodified lines | |||
| 22 | .macro DBGSTR, str | 22 | .macro DBGSTR, str |
| 23 | #ifdef DEBUG | 23 | #ifdef DEBUG |
| 24 | stmfd sp!, {r0-r3, ip, lr} | 24 | stmfd sp!, {r0-r3, ip, lr} |
| 25 | add r0, pc, #4 | 25 | ldr r0, =1f |
| 26 | bl printk | 26 | bl printk |
| 27 | b 1f | 27 | ldmfd sp!, {r0-r3, ip, lr} |
| 28 | .asciz KERN_DEBUG "VFP: \str\n" | 28 | |
| 29 | .balign 4 | 29 | .pushsection .rodata, "a" |
| 30 | 1: ldmfd sp!, {r0-r3, ip, lr} | 30 | 1: .ascii KERN_DEBUG "VFP: \str\n" |
| 31 | .byte 0 | ||
| 32 | .previous | ||
| 31 | #endif | 33 | #endif |
| 32 | .endm | 34 | .endm |
| 33 | 35 | ||
| @@ -35,12 +37,14 @@ · 1 unmodified line | |||
| 35 | #ifdef DEBUG | 37 | #ifdef DEBUG |
| 36 | stmfd sp!, {r0-r3, ip, lr} | 38 | stmfd sp!, {r0-r3, ip, lr} |
| 37 | mov r1, \arg | 39 | mov r1, \arg |
| 38 | add r0, pc, #4 | 40 | ldr r0, =1f |
| 39 | bl printk | 41 | bl printk |
| 40 | b 1f | 42 | ldmfd sp!, {r0-r3, ip, lr} |
| 41 | .asciz KERN_DEBUG "VFP: \str\n" | 43 | |
| 42 | .balign 4 | 44 | .pushsection .rodata, "a" |
| 43 | 1: ldmfd sp!, {r0-r3, ip, lr} | 45 | 1: .ascii KERN_DEBUG "VFP: \str\n" |
| 46 | .byte 0 | ||
| 47 | .previous | ||
| 44 | #endif | 48 | #endif |
| 45 | .endm | 49 | .endm |
| 46 | 50 | ||
| @@ -50,12 +54,14 @@ · 3 unmodified lines | |||
| 50 | mov r3, \arg3 | 54 | mov r3, \arg3 |
| 51 | mov r2, \arg2 | 55 | mov r2, \arg2 |
| 52 | mov r1, \arg1 | 56 | mov r1, \arg1 |
| 53 | add r0, pc, #4 | 57 | ldr r0, =1f |
| 54 | bl printk | 58 | bl printk |
| 55 | b 1f | 59 | ldmfd sp!, {r0-r3, ip, lr} |
| 56 | .asciz KERN_DEBUG "VFP: \str\n" | 60 | |
| 57 | .balign 4 | 61 | .pushsection .rodata, "a" |
| 58 | 1: ldmfd sp!, {r0-r3, ip, lr} | 62 | 1: .ascii KERN_DEBUG "VFP: \str\n" |
| 63 | .byte 0 | ||
| 64 | .previous | ||
| 59 | #endif | 65 | #endif |
| 60 | .endm | 66 | .endm |
| 61 | 67 | ||
| @@ -413,7 +413,7 @@ void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs) · 412 unmodified lines | |||
| 413 | * If there isn't a second FP instruction, exit now. Note that | 413 | * If there isn't a second FP instruction, exit now. Note that |
| 414 | * the FPEXC.FP2V bit is valid only if FPEXC.EX is 1. | 414 | * the FPEXC.FP2V bit is valid only if FPEXC.EX is 1. |
| 415 | */ | 415 | */ |
| 416 | if (fpexc ^ (FPEXC_EX | FPEXC_FP2V)) | 416 | if ((fpexc & (FPEXC_EX | FPEXC_FP2V)) != (FPEXC_EX | FPEXC_FP2V)) |
| 417 | goto exit; | 417 | goto exit; |
| 418 | 418 | ||
| 419 | /* | 419 | /* |
| @@ -130,7 +130,7 @@ static inline void gizmo_writel(struct tegra_ahb *ahb, u32 value, u32 offset) · 129 unmodified lines | |||
| 130 | writel(value, ahb->regs + offset); | 130 | writel(value, ahb->regs + offset); |
| 131 | } | 131 | } |
| 132 | 132 | ||
| 133 | #ifdef CONFIG_ARCH_TEGRA_3x_SOC | 133 | #ifdef CONFIG_TEGRA_IOMMU_SMMU |
| 134 | static int tegra_ahb_match_by_smmu(struct device *dev, void *data) | 134 | static int tegra_ahb_match_by_smmu(struct device *dev, void *data) |
| 135 | { | 135 | { |
| 136 | struct tegra_ahb *ahb = dev_get_drvdata(dev); | 136 | struct tegra_ahb *ahb = dev_get_drvdata(dev); |