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Merge tag 'omap-for-v4.4/fixes-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes

Merge "Fixes for omaps for v4.4-rc cycle" from Tony Lindgren: - A series of audio changes for dra7 that missed the merge window but turned out to be necessary to fix a boot time imprecise external abort error and to getaudio working - Fix l4 related boot time errors for dm81xx - Use lockless cldm/pwrdm api in omap4_boot_secondary - Remove t410 custom abort handler that is no longer needed and may hide other critical errors - Mark cpuidle tracepoints as _rcuidle - Fix module alias for omap-ocp2scp * tag 'omap-for-v4.4/fixes-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP4+: SMP: use lockless clkdm/pwrdm api in omap4_boot_secondary arm: omap2+: add missing HWMOD_NO_IDLEST in 81xx hwmod data ARM: OMAP2+: remove custom abort handler for t410 ARM: OMAP: DRA7: hwmod: Add data for McASP3 ARM: OMAP2+: hwmod: Add hwmod flag for HWMOD_OPT_CLKS_NEEDED ARM: dts: dra7: Fix McASP3 node regarding to clocks bus: omap-ocp2scp: Fix module alias ARM: OMAP2+: PM: Denote the cpuidle tracepoints as _rcuidle()

Arnd Bergmann committed 10 years ago

Commit 5597afa2 parents e6b66df 918af9f9 files · +106 −67Browse files

Unified · Split

9 files
  1. arch/arm/boot/dts/dra7.dtsi +2 −2
  2. arch/arm/mach-omap2/omap-smp.c +3 −3
  3. arch/arm/mach-omap2/omap_hwmod.c +36 −30
  4. arch/arm/mach-omap2/omap_hwmod.h +3 −0
  5. arch/arm/mach-omap2/omap_hwmod_7xx_data.c +56 −0
  6. arch/arm/mach-omap2/omap_hwmod_81xx_data.c +3 −0
  7. arch/arm/mach-omap2/pdata-quirks.c +0 −29
  8. arch/arm/mach-omap2/pm34xx.c +2 −2
  9. drivers/bus/omap-ocp2scp.c +1 −1
arch/arm/boot/dts/dra7.dtsi+2−2
@@ -1459,8 +1459,8 @@ · 1458 unmodified lines
1459 interrupt-names = "tx", "rx";1459 interrupt-names = "tx", "rx";
1460 dmas = <&sdma_xbar 133>, <&sdma_xbar 132>;1460 dmas = <&sdma_xbar 133>, <&sdma_xbar 132>;
1461 dma-names = "tx", "rx";1461 dma-names = "tx", "rx";
1462 clocks = <&mcasp3_ahclkx_mux>;1462 clocks = <&mcasp3_aux_gfclk_mux>, <&mcasp3_ahclkx_mux>;
1463 clock-names = "fck";1463 clock-names = "fck", "ahclkx";
1464 status = "disabled";1464 status = "disabled";
1465 };1465 };
1466 1466
arch/arm/mach-omap2/omap-smp.c+3−3
@@ -143,9 +143,9 @@ static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle) · 142 unmodified lines
143 * Ensure that CPU power state is set to ON to avoid CPU143 * Ensure that CPU power state is set to ON to avoid CPU
144 * powerdomain transition on wfi144 * powerdomain transition on wfi
145 */145 */
146 clkdm_wakeup(cpu1_clkdm);146 clkdm_wakeup_nolock(cpu1_clkdm);
147 omap_set_pwrdm_state(cpu1_pwrdm, PWRDM_POWER_ON);147 pwrdm_set_next_pwrst(cpu1_pwrdm, PWRDM_POWER_ON);
148 clkdm_allow_idle(cpu1_clkdm);148 clkdm_allow_idle_nolock(cpu1_clkdm);
149 149
150 if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD)) {150 if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD)) {
151 while (gic_dist_disabled()) {151 while (gic_dist_disabled()) {
arch/arm/mach-omap2/omap_hwmod.c+36−30
@@ -890,6 +890,36 @@ static int _init_opt_clks(struct omap_hwmod *oh) · 889 unmodified lines
890 return ret;890 return ret;
891}891}
892 892
893static void _enable_optional_clocks(struct omap_hwmod *oh)
894{
895 struct omap_hwmod_opt_clk *oc;
896 int i;
897
898 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
899
900 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
901 if (oc->_clk) {
902 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
903 __clk_get_name(oc->_clk));
904 clk_enable(oc->_clk);
905 }
906}
907
908static void _disable_optional_clocks(struct omap_hwmod *oh)
909{
910 struct omap_hwmod_opt_clk *oc;
911 int i;
912
913 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
914
915 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
916 if (oc->_clk) {
917 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
918 __clk_get_name(oc->_clk));
919 clk_disable(oc->_clk);
920 }
921}
922
893/**923/**
894 * _enable_clocks - enable hwmod main clock and interface clocks924 * _enable_clocks - enable hwmod main clock and interface clocks
895 * @oh: struct omap_hwmod *925 * @oh: struct omap_hwmod *
@@ -917,6 +947,9 @@ static int _enable_clocks(struct omap_hwmod *oh) · 21 unmodified lines
917 clk_enable(os->_clk);947 clk_enable(os->_clk);
918 }948 }
919 949
950 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
951 _enable_optional_clocks(oh);
952
920 /* The opt clocks are controlled by the device driver. */953 /* The opt clocks are controlled by the device driver. */
921 954
922 return 0;955 return 0;
@@ -948,41 +981,14 @@ static int _disable_clocks(struct omap_hwmod *oh) · 25 unmodified lines
948 clk_disable(os->_clk);981 clk_disable(os->_clk);
949 }982 }
950 983
984 if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
985 _disable_optional_clocks(oh);
986
951 /* The opt clocks are controlled by the device driver. */987 /* The opt clocks are controlled by the device driver. */
952 988
953 return 0;989 return 0;
954}990}
955 991
956static void _enable_optional_clocks(struct omap_hwmod *oh)
957{
958 struct omap_hwmod_opt_clk *oc;
959 int i;
960
961 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
962
963 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
964 if (oc->_clk) {
965 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
966 __clk_get_name(oc->_clk));
967 clk_enable(oc->_clk);
968 }
969}
970
971static void _disable_optional_clocks(struct omap_hwmod *oh)
972{
973 struct omap_hwmod_opt_clk *oc;
974 int i;
975
976 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
977
978 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
979 if (oc->_clk) {
980 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
981 __clk_get_name(oc->_clk));
982 clk_disable(oc->_clk);
983 }
984}
985
986/**992/**
987 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4993 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
988 * @oh: struct omap_hwmod *994 * @oh: struct omap_hwmod *
arch/arm/mach-omap2/omap_hwmod.h+3−0
@@ -523,6 +523,8 @@ struct omap_hwmod_omap4_prcm { · 522 unmodified lines
523 * HWMOD_RECONFIG_IO_CHAIN: omap_hwmod code needs to reconfigure wake-up 523 * HWMOD_RECONFIG_IO_CHAIN: omap_hwmod code needs to reconfigure wake-up
524 * events by calling _reconfigure_io_chain() when a device is enabled524 * events by calling _reconfigure_io_chain() when a device is enabled
525 * or idled.525 * or idled.
526 * HWMOD_OPT_CLKS_NEEDED: The optional clocks are needed for the module to
527 * operate and they need to be handled at the same time as the main_clk.
526 */528 */
527#define HWMOD_SWSUP_SIDLE (1 << 0)529#define HWMOD_SWSUP_SIDLE (1 << 0)
528#define HWMOD_SWSUP_MSTANDBY (1 << 1)530#define HWMOD_SWSUP_MSTANDBY (1 << 1)
@@ -538,6 +540,7 @@ struct omap_hwmod_omap4_prcm { · 9 unmodified lines
538#define HWMOD_FORCE_MSTANDBY (1 << 11)540#define HWMOD_FORCE_MSTANDBY (1 << 11)
539#define HWMOD_SWSUP_SIDLE_ACT (1 << 12)541#define HWMOD_SWSUP_SIDLE_ACT (1 << 12)
540#define HWMOD_RECONFIG_IO_CHAIN (1 << 13)542#define HWMOD_RECONFIG_IO_CHAIN (1 << 13)
543#define HWMOD_OPT_CLKS_NEEDED (1 << 14)
541 544
542/*545/*
543 * omap_hwmod._int_flags definitions546 * omap_hwmod._int_flags definitions
arch/arm/mach-omap2/omap_hwmod_7xx_data.c+56−0
@@ -1297,6 +1297,44 @@ static struct omap_hwmod dra7xx_mcspi4_hwmod = { · 1296 unmodified lines
1297 .dev_attr = &mcspi4_dev_attr,1297 .dev_attr = &mcspi4_dev_attr,
1298};1298};
1299 1299
1300/*
1301 * 'mcasp' class
1302 *
1303 */
1304static struct omap_hwmod_class_sysconfig dra7xx_mcasp_sysc = {
1305 .sysc_offs = 0x0004,
1306 .sysc_flags = SYSC_HAS_SIDLEMODE,
1307 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
1308 .sysc_fields = &omap_hwmod_sysc_type3,
1309};
1310
1311static struct omap_hwmod_class dra7xx_mcasp_hwmod_class = {
1312 .name = "mcasp",
1313 .sysc = &dra7xx_mcasp_sysc,
1314};
1315
1316/* mcasp3 */
1317static struct omap_hwmod_opt_clk mcasp3_opt_clks[] = {
1318 { .role = "ahclkx", .clk = "mcasp3_ahclkx_mux" },
1319};
1320
1321static struct omap_hwmod dra7xx_mcasp3_hwmod = {
1322 .name = "mcasp3",
1323 .class = &dra7xx_mcasp_hwmod_class,
1324 .clkdm_name = "l4per2_clkdm",
1325 .main_clk = "mcasp3_aux_gfclk_mux",
1326 .flags = HWMOD_OPT_CLKS_NEEDED,
1327 .prcm = {
1328 .omap4 = {
1329 .clkctrl_offs = DRA7XX_CM_L4PER2_MCASP3_CLKCTRL_OFFSET,
1330 .context_offs = DRA7XX_RM_L4PER2_MCASP3_CONTEXT_OFFSET,
1331 .modulemode = MODULEMODE_SWCTRL,
1332 },
1333 },
1334 .opt_clks = mcasp3_opt_clks,
1335 .opt_clks_cnt = ARRAY_SIZE(mcasp3_opt_clks),
1336};
1337
1300/*1338/*
1301 * 'mmc' class1339 * 'mmc' class
1302 *1340 *
@@ -2566,6 +2604,22 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__hdmi = { · 1263 unmodified lines
2566 .user = OCP_USER_MPU | OCP_USER_SDMA,2604 .user = OCP_USER_MPU | OCP_USER_SDMA,
2567};2605};
2568 2606
2607/* l4_per2 -> mcasp3 */
2608static struct omap_hwmod_ocp_if dra7xx_l4_per2__mcasp3 = {
2609 .master = &dra7xx_l4_per2_hwmod,
2610 .slave = &dra7xx_mcasp3_hwmod,
2611 .clk = "l4_root_clk_div",
2612 .user = OCP_USER_MPU | OCP_USER_SDMA,
2613};
2614
2615/* l3_main_1 -> mcasp3 */
2616static struct omap_hwmod_ocp_if dra7xx_l3_main_1__mcasp3 = {
2617 .master = &dra7xx_l3_main_1_hwmod,
2618 .slave = &dra7xx_mcasp3_hwmod,
2619 .clk = "l3_iclk_div",
2620 .user = OCP_USER_MPU | OCP_USER_SDMA,
2621};
2622
2569/* l4_per1 -> elm */2623/* l4_per1 -> elm */
2570static struct omap_hwmod_ocp_if dra7xx_l4_per1__elm = {2624static struct omap_hwmod_ocp_if dra7xx_l4_per1__elm = {
2571 .master = &dra7xx_l4_per1_hwmod,2625 .master = &dra7xx_l4_per1_hwmod,
@@ -3308,6 +3362,8 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = { · 736 unmodified lines
3308 &dra7xx_l4_wkup__dcan1,3362 &dra7xx_l4_wkup__dcan1,
3309 &dra7xx_l4_per2__dcan2,3363 &dra7xx_l4_per2__dcan2,
3310 &dra7xx_l4_per2__cpgmac0,3364 &dra7xx_l4_per2__cpgmac0,
3365 &dra7xx_l4_per2__mcasp3,
3366 &dra7xx_l3_main_1__mcasp3,
3311 &dra7xx_gmac__mdio,3367 &dra7xx_gmac__mdio,
3312 &dra7xx_l4_cfg__dma_system,3368 &dra7xx_l4_cfg__dma_system,
3313 &dra7xx_l3_main_1__dss,3369 &dra7xx_l3_main_1__dss,
arch/arm/mach-omap2/omap_hwmod_81xx_data.c+3−0
@@ -144,6 +144,7 @@ static struct omap_hwmod dm81xx_l4_ls_hwmod = { · 143 unmodified lines
144 .name = "l4_ls",144 .name = "l4_ls",
145 .clkdm_name = "alwon_l3s_clkdm",145 .clkdm_name = "alwon_l3s_clkdm",
146 .class = &l4_hwmod_class,146 .class = &l4_hwmod_class,
147 .flags = HWMOD_NO_IDLEST,
147};148};
148 149
149/*150/*
@@ -155,6 +156,7 @@ static struct omap_hwmod dm81xx_l4_hs_hwmod = { · 5 unmodified lines
155 .name = "l4_hs",156 .name = "l4_hs",
156 .clkdm_name = "alwon_l3_med_clkdm",157 .clkdm_name = "alwon_l3_med_clkdm",
157 .class = &l4_hwmod_class,158 .class = &l4_hwmod_class,
159 .flags = HWMOD_NO_IDLEST,
158};160};
159 161
160/* L3 slow -> L4 ls peripheral interface running at 125MHz */162/* L3 slow -> L4 ls peripheral interface running at 125MHz */
@@ -850,6 +852,7 @@ static struct omap_hwmod dm816x_emac0_hwmod = { · 689 unmodified lines
850 .name = "emac0",852 .name = "emac0",
851 .clkdm_name = "alwon_ethernet_clkdm",853 .clkdm_name = "alwon_ethernet_clkdm",
852 .class = &dm816x_emac_hwmod_class,854 .class = &dm816x_emac_hwmod_class,
855 .flags = HWMOD_NO_IDLEST,
853};856};
854 857
855static struct omap_hwmod_ocp_if dm81xx_l4_hs__emac0 = {858static struct omap_hwmod_ocp_if dm81xx_l4_hs__emac0 = {
arch/arm/mach-omap2/pdata-quirks.c+0−29
@@ -24,9 +24,6 @@ · 23 unmodified lines
24#include <linux/platform_data/iommu-omap.h>24#include <linux/platform_data/iommu-omap.h>
25#include <linux/platform_data/wkup_m3.h>25#include <linux/platform_data/wkup_m3.h>
26 26
27#include <asm/siginfo.h>
28#include <asm/signal.h>
29
30#include "common.h"27#include "common.h"
31#include "common-board-devices.h"28#include "common-board-devices.h"
32#include "dss-common.h"29#include "dss-common.h"
@@ -385,29 +382,6 @@ static void __init omap3_pandora_legacy_init(void) · 352 unmodified lines
385}382}
386#endif /* CONFIG_ARCH_OMAP3 */383#endif /* CONFIG_ARCH_OMAP3 */
387 384
388#ifdef CONFIG_SOC_TI81XX
389static int fault_fixed_up;
390
391static int t410_abort_handler(unsigned long addr, unsigned int fsr,
392 struct pt_regs *regs)
393{
394 if ((fsr == 0x406 || fsr == 0xc06) && !fault_fixed_up) {
395 pr_warn("External imprecise Data abort at addr=%#lx, fsr=%#x ignored.\n",
396 addr, fsr);
397 fault_fixed_up = 1;
398 return 0;
399 }
400
401 return 1;
402}
403
404static void __init t410_abort_init(void)
405{
406 hook_fault_code(16 + 6, t410_abort_handler, SIGBUS, BUS_OBJERR,
407 "imprecise external abort");
408}
409#endif
410
411#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)385#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
412static struct iommu_platform_data omap4_iommu_pdata = {386static struct iommu_platform_data omap4_iommu_pdata = {
413 .reset_name = "mmu_cache",387 .reset_name = "mmu_cache",
@@ -536,9 +510,6 @@ static struct pdata_init pdata_quirks[] __initdata = { · 122 unmodified lines
536 { "openpandora,omap3-pandora-600mhz", omap3_pandora_legacy_init, },510 { "openpandora,omap3-pandora-600mhz", omap3_pandora_legacy_init, },
537 { "openpandora,omap3-pandora-1ghz", omap3_pandora_legacy_init, },511 { "openpandora,omap3-pandora-1ghz", omap3_pandora_legacy_init, },
538#endif512#endif
539#ifdef CONFIG_SOC_TI81XX
540 { "hp,t410", t410_abort_init, },
541#endif
542#ifdef CONFIG_SOC_OMAP5513#ifdef CONFIG_SOC_OMAP5
543 { "ti,omap5-uevm", omap5_uevm_legacy_init, },514 { "ti,omap5-uevm", omap5_uevm_legacy_init, },
544#endif515#endif
arch/arm/mach-omap2/pm34xx.c+2−2
@@ -301,11 +301,11 @@ static void omap3_pm_idle(void) · 300 unmodified lines
301 if (omap_irq_pending())301 if (omap_irq_pending())
302 return;302 return;
303 303
304 trace_cpu_idle(1, smp_processor_id());304 trace_cpu_idle_rcuidle(1, smp_processor_id());
305 305
306 omap_sram_idle();306 omap_sram_idle();
307 307
308 trace_cpu_idle(PWR_EVENT_EXIT, smp_processor_id());308 trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
309}309}
310 310
311#ifdef CONFIG_SUSPEND311#ifdef CONFIG_SUSPEND
drivers/bus/omap-ocp2scp.c+1−1
@@ -117,7 +117,7 @@ static struct platform_driver omap_ocp2scp_driver = { · 116 unmodified lines
117 117
118module_platform_driver(omap_ocp2scp_driver);118module_platform_driver(omap_ocp2scp_driver);
119 119
120MODULE_ALIAS("platform: omap-ocp2scp");120MODULE_ALIAS("platform:omap-ocp2scp");
121MODULE_AUTHOR("Texas Instruments Inc.");121MODULE_AUTHOR("Texas Instruments Inc.");
122MODULE_DESCRIPTION("OMAP OCP2SCP driver");122MODULE_DESCRIPTION("OMAP OCP2SCP driver");
123MODULE_LICENSE("GPL v2");123MODULE_LICENSE("GPL v2");

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