Merge tag 'samsung-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes

Merge "Samsung 2nd fixes for v4.1" from Kukjin Kim: - fix second S2R on exynos4412 based Trats2, Odroid U3 boards which happened after enabling L2$ and caused by commit 13cfa6c4f7fa ("ARM: EXYNOS: Fix CPU idle clock down after CPU off") And replace the soc_is_exynosxxx() macro with of_compatible_xxx - fix dereference of ERR_PTR of of_genpd_get_from_provider() - fix suspend problem on old DT machines to skip the initialization suspend and caused by commit 8b283c025443 ("ARM: exynos4/5: convert pmu wakeup to stacked domains") - add keep-power-in-suspend for Peach Boards to support S2R and has been missed in previous pull-request for fixes * tag 'samsung-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: Use of_machine_is_compatible instead of soc_is_exynos4 ARM: EXYNOS: Fix failed second suspend on Exynos4 ARM: EXYNOS: Fix dereference of ERR_PTR returned by of_genpd_get_from_provider ARM: EXYNOS: Don't try to initialize suspend on old DT ARM: dts: Add keep-power-in-suspend to WiFi SDIO node for Peach Boards

Arnd Bergmann committed 11 years ago

Commit 56523ee2 parents cc1c1b5 c1f0ecf7 files · +41 −40Browse files

Unified · Split

7 files

arch/arm/boot/dts/exynos5420-peach-pit.dts +1 −0
arch/arm/boot/dts/exynos5800-peach-pi.dts +1 −0
arch/arm/mach-exynos/common.h +2 −0
arch/arm/mach-exynos/exynos.c +27 −0
arch/arm/mach-exynos/platsmp.c +2 −37
arch/arm/mach-exynos/pm_domains.c +2 −2
arch/arm/mach-exynos/suspend.c +6 −1

arch/arm/boot/dts/exynos5420-peach-pit.dts+1−0

@@ -711,6 +711,7 @@ · 710 unmodified lines
711	711	num-slots = <1>;
712	712	broken-cd;
713	713	cap-sdio-irq;
	714	+ keep-power-in-suspend;
714	715	card-detect-delay = <200>;
715	716	clock-frequency = <400000000>;
716	717	samsung,dw-mshc-ciu-div = <1>;

arch/arm/boot/dts/exynos5800-peach-pi.dts+1−0

@@ -674,6 +674,7 @@ · 673 unmodified lines
674	674	num-slots = <1>;
675	675	broken-cd;
676	676	cap-sdio-irq;
	677	+ keep-power-in-suspend;
677	678	card-detect-delay = <200>;
678	679	clock-frequency = <400000000>;
679	680	samsung,dw-mshc-ciu-div = <1>;

arch/arm/mach-exynos/common.h+2−0

@@ -159,6 +159,8 @@ extern void exynos_enter_aftr(void); · 158 unmodified lines
159	159
160	160	extern struct cpuidle_exynos_data cpuidle_coupled_exynos_data;
161	161
	162	+extern void exynos_set_delayed_reset_assertion(bool enable);
	163	+
162	164	extern void s5p_init_cpu(void __iomem *cpuid_addr);
163	165	extern unsigned int samsung_rev(void);
164	166	extern void __iomem *cpu_boot_reg_base(void);

arch/arm/mach-exynos/exynos.c+27−0

@@ -166,6 +166,33 @@ static void __init exynos_init_io(void) · 165 unmodified lines
166	166	exynos_map_io();
167	167	}
168	168
	169	+/*
	170	+ * Set or clear the USE_DELAYED_RESET_ASSERTION option. Used by smp code
	171	+ * and suspend.
	172	+ *
	173	+ * This is necessary only on Exynos4 SoCs. When system is running
	174	+ * USE_DELAYED_RESET_ASSERTION should be set so the ARM CLK clock down
	175	+ * feature could properly detect global idle state when secondary CPU is
	176	+ * powered down.
	177	+ *
	178	+ * However this should not be set when such system is going into suspend.
	179	+ */
	180	+void exynos_set_delayed_reset_assertion(bool enable)
	181	+{
	182	+ if (of_machine_is_compatible("samsung,exynos4")) {
	183	+ unsigned int tmp, core_id;
	184	+
	185	+ for (core_id = 0; core_id < num_possible_cpus(); core_id++) {
	186	+ tmp = pmu_raw_readl(EXYNOS_ARM_CORE_OPTION(core_id));
	187	+ if (enable)
	188	+ tmp \|= S5P_USE_DELAYED_RESET_ASSERTION;
	189	+ else
	190	+ tmp &= ~(S5P_USE_DELAYED_RESET_ASSERTION);
	191	+ pmu_raw_writel(tmp, EXYNOS_ARM_CORE_OPTION(core_id));
	192	+ }
	193	+ }
	194	+}
	195	+
169	196	/*
170	197	* Apparently, these SoCs are not able to wake-up from suspend using
171	198	* the PMU. Too bad. Should they suddenly become capable of such a

arch/arm/mach-exynos/platsmp.c+2−37

@@ -34,30 +34,6 @@ · 33 unmodified lines
34	34
35	35	extern void exynos4_secondary_startup(void);
36	36
37		−/*
38		− * Set or clear the USE_DELAYED_RESET_ASSERTION option, set on Exynos4 SoCs
39		− * during hot-(un)plugging CPUx.
40		− *
41		− * The feature can be cleared safely during first boot of secondary CPU.
42		− *
43		− * Exynos4 SoCs require setting USE_DELAYED_RESET_ASSERTION during powering
44		− * down a CPU so the CPU idle clock down feature could properly detect global
45		− * idle state when CPUx is off.
46		− */
47		−static void exynos_set_delayed_reset_assertion(u32 core_id, bool enable)
48		−{
49		− if (soc_is_exynos4()) {
50		− unsigned int tmp;
51		−
52		− tmp = pmu_raw_readl(EXYNOS_ARM_CORE_OPTION(core_id));
53		− if (enable)
54		− tmp \|= S5P_USE_DELAYED_RESET_ASSERTION;
55		− else
56		− tmp &= ~(S5P_USE_DELAYED_RESET_ASSERTION);
57		− pmu_raw_writel(tmp, EXYNOS_ARM_CORE_OPTION(core_id));
58		− }
59		−}
60		−
61	37	#ifdef CONFIG_HOTPLUG_CPU
62	38	static inline void cpu_leave_lowpower(u32 core_id)
63	39	{
@@ -73,8 +49,6 @@ static inline void cpu_leave_lowpower(u32 core_id) · 9 unmodified lines
73	49	: "=&r" (v)
74	50	: "Ir" (CR_C), "Ir" (0x40)
75	51	: "cc");
76		−
77		− exynos_set_delayed_reset_assertion(core_id, false);
78	52	}
79	53
80	54	static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
@@ -87,14 +61,6 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious) · 6 unmodified lines
87	61	/* Turn the CPU off on next WFI instruction. */
88	62	exynos_cpu_power_down(core_id);
89	63
90		− /*
91		− * Exynos4 SoCs require setting
92		− * USE_DELAYED_RESET_ASSERTION so the CPU idle
93		− * clock down feature could properly detect
94		− * global idle state when CPUx is off.
95		− */
96		− exynos_set_delayed_reset_assertion(core_id, true);
97		−
98	64	wfi();
99	65
100	66	if (pen_release == core_id) {
@@ -371,9 +337,6 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle) · 270 unmodified lines
371	337	udelay(10);
372	338	}
373	339
374		− /* No harm if this is called during first boot of secondary CPU */
375		− exynos_set_delayed_reset_assertion(core_id, false);
376		−
377	340	/*
378	341	* now the secondary core is starting up let it run its
379	342	* calibrations, then wait for it to finish
@@ -420,6 +383,8 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus) · 40 unmodified lines
420	383
421	384	exynos_sysram_init();
422	385
	386	+ exynos_set_delayed_reset_assertion(true);
	387	+
423	388	if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9)
424	389	scu_enable(scu_base_addr());
425	390

arch/arm/mach-exynos/pm_domains.c+2−2

@@ -188,7 +188,7 @@ no_clk: · 187 unmodified lines
188	188	args.np = np;
189	189	args.args_count = 0;
190	190	child_domain = of_genpd_get_from_provider(&args);
191		− if (!child_domain)
	191	+ if (IS_ERR(child_domain))
192	192	continue;
193	193
194	194	if (of_parse_phandle_with_args(np, "power-domains",
@@ -196,7 +196,7 @@ no_clk: · 1 unmodified line
196	196	continue;
197	197
198	198	parent_domain = of_genpd_get_from_provider(&args);
199		− if (!parent_domain)
	199	+ if (IS_ERR(parent_domain))
200	200	continue;
201	201
202	202	if (pm_genpd_add_subdomain(parent_domain, child_domain))

arch/arm/mach-exynos/suspend.c+6−1

@@ -342,6 +342,8 @@ static void exynos_pm_enter_sleep_mode(void) · 341 unmodified lines
342	342
343	343	static void exynos_pm_prepare(void)
344	344	{
	345	+ exynos_set_delayed_reset_assertion(false);
	346	+
345	347	/* Set wake-up mask registers */
346	348	exynos_pm_set_wakeup_mask();
347	349
@@ -482,6 +484,7 @@ early_wakeup: · 134 unmodified lines
482	484
483	485	/* Clear SLEEP mode set in INFORM1 */
484	486	pmu_raw_writel(0x0, S5P_INFORM1);
	487	+ exynos_set_delayed_reset_assertion(true);
485	488	}
486	489
487	490	static void exynos3250_pm_resume(void)
@@ -723,8 +726,10 @@ void __init exynos_pm_init(void) · 235 unmodified lines
723	726	return;
724	727	}
725	728
726		− if (WARN_ON(!of_find_property(np, "interrupt-controller", NULL)))
	729	+ if (WARN_ON(!of_find_property(np, "interrupt-controller", NULL))) {
727	730	pr_warn("Outdated DT detected, suspend/resume will NOT work\n");
	731	+ return;
	732	+ }
728	733
729	734	pm_data = (const struct exynos_pm_data *) match->data;
730	735