Just two fixes for amdgpu: - fix pageflip interrupt issue - fix display clock handling on certain fiji boards * 'drm-fixes-4.3' of git://people.freedesktop.org/~agd5f/linux: drm/amdgpu: Keep the pflip interrupts always enabled v7 drm/amdgpu: adjust default dispclk (v2)
Unified · Split
| @@ -672,8 +672,12 @@ int amdgpu_atombios_get_clock_info(struct amdgpu_device *adev) · 671 unmodified lines | ||
| 672 | 672 | /* disp clock */ |
| 673 | 673 | adev->clock.default_dispclk = |
| 674 | 674 | le32_to_cpu(firmware_info->info_21.ulDefaultDispEngineClkFreq); |
| 675 | − if (adev->clock.default_dispclk == 0) | |
| 676 | − adev->clock.default_dispclk = 54000; /* 540 Mhz */ | |
| 675 | + /* set a reasonable default for DP */ | |
| 676 | + if (adev->clock.default_dispclk < 53900) { | |
| 677 | + DRM_INFO("Changing default dispclk from %dMhz to 600Mhz\n", | |
| 678 | + adev->clock.default_dispclk / 100); | |
| 679 | + adev->clock.default_dispclk = 60000; | |
| 680 | + } | |
| 677 | 681 | adev->clock.dp_extclk = |
| 678 | 682 | le16_to_cpu(firmware_info->info_21.usUniphyDPModeExtClkFreq); |
| 679 | 683 | adev->clock.current_dispclk = adev->clock.default_dispclk; |
| @@ -85,8 +85,6 @@ static void amdgpu_flip_work_func(struct work_struct *__work) · 84 unmodified lines | ||
| 85 | 85 | /* We borrow the event spin lock for protecting flip_status */ |
| 86 | 86 | spin_lock_irqsave(&crtc->dev->event_lock, flags); |
| 87 | 87 | |
| 88 | − /* set the proper interrupt */ | |
| 89 | − amdgpu_irq_get(adev, &adev->pageflip_irq, work->crtc_id); | |
| 90 | 88 | /* do the flip (mmio) */ |
| 91 | 89 | adev->mode_info.funcs->page_flip(adev, work->crtc_id, work->base); |
| 92 | 90 | /* set the flip status */ |
| @@ -255,6 +255,24 @@ static u32 dce_v10_0_vblank_get_counter(struct amdgpu_device *adev, int crtc) · 254 unmodified lines | ||
| 255 | 255 | return RREG32(mmCRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]); |
| 256 | 256 | } |
| 257 | 257 | |
| 258 | +static void dce_v10_0_pageflip_interrupt_init(struct amdgpu_device *adev) | |
| 259 | +{ | |
| 260 | + unsigned i; | |
| 261 | + | |
| 262 | + /* Enable pflip interrupts */ | |
| 263 | + for (i = 0; i < adev->mode_info.num_crtc; i++) | |
| 264 | + amdgpu_irq_get(adev, &adev->pageflip_irq, i); | |
| 265 | +} | |
| 266 | + | |
| 267 | +static void dce_v10_0_pageflip_interrupt_fini(struct amdgpu_device *adev) | |
| 268 | +{ | |
| 269 | + unsigned i; | |
| 270 | + | |
| 271 | + /* Disable pflip interrupts */ | |
| 272 | + for (i = 0; i < adev->mode_info.num_crtc; i++) | |
| 273 | + amdgpu_irq_put(adev, &adev->pageflip_irq, i); | |
| 274 | +} | |
| 275 | + | |
| 258 | 276 | /** |
| 259 | 277 | * dce_v10_0_page_flip - pageflip callback. |
| 260 | 278 | * |
| @@ -2663,9 +2681,10 @@ static void dce_v10_0_crtc_dpms(struct drm_crtc *crtc, int mode) · 2402 unmodified lines | ||
| 2663 | 2681 | dce_v10_0_vga_enable(crtc, true); |
| 2664 | 2682 | amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE); |
| 2665 | 2683 | dce_v10_0_vga_enable(crtc, false); |
| 2666 | − /* Make sure VBLANK interrupt is still enabled */ | |
| 2684 | + /* Make sure VBLANK and PFLIP interrupts are still enabled */ | |
| 2667 | 2685 | type = amdgpu_crtc_idx_to_irq_type(adev, amdgpu_crtc->crtc_id); |
| 2668 | 2686 | amdgpu_irq_update(adev, &adev->crtc_irq, type); |
| 2687 | + amdgpu_irq_update(adev, &adev->pageflip_irq, type); | |
| 2669 | 2688 | drm_vblank_post_modeset(dev, amdgpu_crtc->crtc_id); |
| 2670 | 2689 | dce_v10_0_crtc_load_lut(crtc); |
| 2671 | 2690 | break; |
| @@ -3025,6 +3044,8 @@ static int dce_v10_0_hw_init(void *handle) · 353 unmodified lines | ||
| 3025 | 3044 | dce_v10_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); |
| 3026 | 3045 | } |
| 3027 | 3046 | |
| 3047 | + dce_v10_0_pageflip_interrupt_init(adev); | |
| 3048 | + | |
| 3028 | 3049 | return 0; |
| 3029 | 3050 | } |
| 3030 | 3051 | |
| @@ -3039,6 +3060,8 @@ static int dce_v10_0_hw_fini(void *handle) · 8 unmodified lines | ||
| 3039 | 3060 | dce_v10_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); |
| 3040 | 3061 | } |
| 3041 | 3062 | |
| 3063 | + dce_v10_0_pageflip_interrupt_fini(adev); | |
| 3064 | + | |
| 3042 | 3065 | return 0; |
| 3043 | 3066 | } |
| 3044 | 3067 | |
| @@ -3050,6 +3073,8 @@ static int dce_v10_0_suspend(void *handle) · 5 unmodified lines | ||
| 3050 | 3073 | |
| 3051 | 3074 | dce_v10_0_hpd_fini(adev); |
| 3052 | 3075 | |
| 3076 | + dce_v10_0_pageflip_interrupt_fini(adev); | |
| 3077 | + | |
| 3053 | 3078 | return 0; |
| 3054 | 3079 | } |
| 3055 | 3080 | |
| @@ -3075,6 +3100,8 @@ static int dce_v10_0_resume(void *handle) · 19 unmodified lines | ||
| 3075 | 3100 | /* initialize hpd */ |
| 3076 | 3101 | dce_v10_0_hpd_init(adev); |
| 3077 | 3102 | |
| 3103 | + dce_v10_0_pageflip_interrupt_init(adev); | |
| 3104 | + | |
| 3078 | 3105 | return 0; |
| 3079 | 3106 | } |
| 3080 | 3107 | |
| @@ -3369,7 +3396,6 @@ static int dce_v10_0_pageflip_irq(struct amdgpu_device *adev, · 288 unmodified lines | ||
| 3369 | 3396 | spin_unlock_irqrestore(&adev->ddev->event_lock, flags); |
| 3370 | 3397 | |
| 3371 | 3398 | drm_vblank_put(adev->ddev, amdgpu_crtc->crtc_id); |
| 3372 | − amdgpu_irq_put(adev, &adev->pageflip_irq, crtc_id); | |
| 3373 | 3399 | queue_work(amdgpu_crtc->pflip_queue, &works->unpin_work); |
| 3374 | 3400 | |
| 3375 | 3401 | return 0; |
| @@ -233,6 +233,24 @@ static u32 dce_v11_0_vblank_get_counter(struct amdgpu_device *adev, int crtc) · 232 unmodified lines | ||
| 233 | 233 | return RREG32(mmCRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]); |
| 234 | 234 | } |
| 235 | 235 | |
| 236 | +static void dce_v11_0_pageflip_interrupt_init(struct amdgpu_device *adev) | |
| 237 | +{ | |
| 238 | + unsigned i; | |
| 239 | + | |
| 240 | + /* Enable pflip interrupts */ | |
| 241 | + for (i = 0; i < adev->mode_info.num_crtc; i++) | |
| 242 | + amdgpu_irq_get(adev, &adev->pageflip_irq, i); | |
| 243 | +} | |
| 244 | + | |
| 245 | +static void dce_v11_0_pageflip_interrupt_fini(struct amdgpu_device *adev) | |
| 246 | +{ | |
| 247 | + unsigned i; | |
| 248 | + | |
| 249 | + /* Disable pflip interrupts */ | |
| 250 | + for (i = 0; i < adev->mode_info.num_crtc; i++) | |
| 251 | + amdgpu_irq_put(adev, &adev->pageflip_irq, i); | |
| 252 | +} | |
| 253 | + | |
| 236 | 254 | /** |
| 237 | 255 | * dce_v11_0_page_flip - pageflip callback. |
| 238 | 256 | * |
| @@ -2640,9 +2658,10 @@ static void dce_v11_0_crtc_dpms(struct drm_crtc *crtc, int mode) · 2401 unmodified lines | ||
| 2640 | 2658 | dce_v11_0_vga_enable(crtc, true); |
| 2641 | 2659 | amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE); |
| 2642 | 2660 | dce_v11_0_vga_enable(crtc, false); |
| 2643 | − /* Make sure VBLANK interrupt is still enabled */ | |
| 2661 | + /* Make sure VBLANK and PFLIP interrupts are still enabled */ | |
| 2644 | 2662 | type = amdgpu_crtc_idx_to_irq_type(adev, amdgpu_crtc->crtc_id); |
| 2645 | 2663 | amdgpu_irq_update(adev, &adev->crtc_irq, type); |
| 2664 | + amdgpu_irq_update(adev, &adev->pageflip_irq, type); | |
| 2646 | 2665 | drm_vblank_post_modeset(dev, amdgpu_crtc->crtc_id); |
| 2647 | 2666 | dce_v11_0_crtc_load_lut(crtc); |
| 2648 | 2667 | break; |
| @@ -3000,6 +3019,8 @@ static int dce_v11_0_hw_init(void *handle) · 351 unmodified lines | ||
| 3000 | 3019 | dce_v11_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); |
| 3001 | 3020 | } |
| 3002 | 3021 | |
| 3022 | + dce_v11_0_pageflip_interrupt_init(adev); | |
| 3023 | + | |
| 3003 | 3024 | return 0; |
| 3004 | 3025 | } |
| 3005 | 3026 | |
| @@ -3014,6 +3035,8 @@ static int dce_v11_0_hw_fini(void *handle) · 8 unmodified lines | ||
| 3014 | 3035 | dce_v11_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); |
| 3015 | 3036 | } |
| 3016 | 3037 | |
| 3038 | + dce_v11_0_pageflip_interrupt_fini(adev); | |
| 3039 | + | |
| 3017 | 3040 | return 0; |
| 3018 | 3041 | } |
| 3019 | 3042 | |
| @@ -3025,6 +3048,8 @@ static int dce_v11_0_suspend(void *handle) · 5 unmodified lines | ||
| 3025 | 3048 | |
| 3026 | 3049 | dce_v11_0_hpd_fini(adev); |
| 3027 | 3050 | |
| 3051 | + dce_v11_0_pageflip_interrupt_fini(adev); | |
| 3052 | + | |
| 3028 | 3053 | return 0; |
| 3029 | 3054 | } |
| 3030 | 3055 | |
| @@ -3051,6 +3076,8 @@ static int dce_v11_0_resume(void *handle) · 20 unmodified lines | ||
| 3051 | 3076 | /* initialize hpd */ |
| 3052 | 3077 | dce_v11_0_hpd_init(adev); |
| 3053 | 3078 | |
| 3079 | + dce_v11_0_pageflip_interrupt_init(adev); | |
| 3080 | + | |
| 3054 | 3081 | return 0; |
| 3055 | 3082 | } |
| 3056 | 3083 | |
| @@ -3345,7 +3372,6 @@ static int dce_v11_0_pageflip_irq(struct amdgpu_device *adev, · 288 unmodified lines | ||
| 3345 | 3372 | spin_unlock_irqrestore(&adev->ddev->event_lock, flags); |
| 3346 | 3373 | |
| 3347 | 3374 | drm_vblank_put(adev->ddev, amdgpu_crtc->crtc_id); |
| 3348 | − amdgpu_irq_put(adev, &adev->pageflip_irq, crtc_id); | |
| 3349 | 3375 | queue_work(amdgpu_crtc->pflip_queue, &works->unpin_work); |
| 3350 | 3376 | |
| 3351 | 3377 | return 0; |
| @@ -204,6 +204,24 @@ static u32 dce_v8_0_vblank_get_counter(struct amdgpu_device *adev, int crtc) · 203 unmodified lines | ||
| 204 | 204 | return RREG32(mmCRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]); |
| 205 | 205 | } |
| 206 | 206 | |
| 207 | +static void dce_v8_0_pageflip_interrupt_init(struct amdgpu_device *adev) | |
| 208 | +{ | |
| 209 | + unsigned i; | |
| 210 | + | |
| 211 | + /* Enable pflip interrupts */ | |
| 212 | + for (i = 0; i < adev->mode_info.num_crtc; i++) | |
| 213 | + amdgpu_irq_get(adev, &adev->pageflip_irq, i); | |
| 214 | +} | |
| 215 | + | |
| 216 | +static void dce_v8_0_pageflip_interrupt_fini(struct amdgpu_device *adev) | |
| 217 | +{ | |
| 218 | + unsigned i; | |
| 219 | + | |
| 220 | + /* Disable pflip interrupts */ | |
| 221 | + for (i = 0; i < adev->mode_info.num_crtc; i++) | |
| 222 | + amdgpu_irq_put(adev, &adev->pageflip_irq, i); | |
| 223 | +} | |
| 224 | + | |
| 207 | 225 | /** |
| 208 | 226 | * dce_v8_0_page_flip - pageflip callback. |
| 209 | 227 | * |
| @@ -2575,9 +2593,10 @@ static void dce_v8_0_crtc_dpms(struct drm_crtc *crtc, int mode) · 2365 unmodified lines | ||
| 2575 | 2593 | dce_v8_0_vga_enable(crtc, true); |
| 2576 | 2594 | amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE); |
| 2577 | 2595 | dce_v8_0_vga_enable(crtc, false); |
| 2578 | − /* Make sure VBLANK interrupt is still enabled */ | |
| 2596 | + /* Make sure VBLANK and PFLIP interrupts are still enabled */ | |
| 2579 | 2597 | type = amdgpu_crtc_idx_to_irq_type(adev, amdgpu_crtc->crtc_id); |
| 2580 | 2598 | amdgpu_irq_update(adev, &adev->crtc_irq, type); |
| 2599 | + amdgpu_irq_update(adev, &adev->pageflip_irq, type); | |
| 2581 | 2600 | drm_vblank_post_modeset(dev, amdgpu_crtc->crtc_id); |
| 2582 | 2601 | dce_v8_0_crtc_load_lut(crtc); |
| 2583 | 2602 | break; |
| @@ -2933,6 +2952,8 @@ static int dce_v8_0_hw_init(void *handle) · 349 unmodified lines | ||
| 2933 | 2952 | dce_v8_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); |
| 2934 | 2953 | } |
| 2935 | 2954 | |
| 2955 | + dce_v8_0_pageflip_interrupt_init(adev); | |
| 2956 | + | |
| 2936 | 2957 | return 0; |
| 2937 | 2958 | } |
| 2938 | 2959 | |
| @@ -2947,6 +2968,8 @@ static int dce_v8_0_hw_fini(void *handle) · 8 unmodified lines | ||
| 2947 | 2968 | dce_v8_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); |
| 2948 | 2969 | } |
| 2949 | 2970 | |
| 2971 | + dce_v8_0_pageflip_interrupt_fini(adev); | |
| 2972 | + | |
| 2950 | 2973 | return 0; |
| 2951 | 2974 | } |
| 2952 | 2975 | |
| @@ -2958,6 +2981,8 @@ static int dce_v8_0_suspend(void *handle) · 5 unmodified lines | ||
| 2958 | 2981 | |
| 2959 | 2982 | dce_v8_0_hpd_fini(adev); |
| 2960 | 2983 | |
| 2984 | + dce_v8_0_pageflip_interrupt_fini(adev); | |
| 2985 | + | |
| 2961 | 2986 | return 0; |
| 2962 | 2987 | } |
| 2963 | 2988 | |
| @@ -2981,6 +3006,8 @@ static int dce_v8_0_resume(void *handle) · 17 unmodified lines | ||
| 2981 | 3006 | /* initialize hpd */ |
| 2982 | 3007 | dce_v8_0_hpd_init(adev); |
| 2983 | 3008 | |
| 3009 | + dce_v8_0_pageflip_interrupt_init(adev); | |
| 3010 | + | |
| 2984 | 3011 | return 0; |
| 2985 | 3012 | } |
| 2986 | 3013 | |
| @@ -3376,7 +3403,6 @@ static int dce_v8_0_pageflip_irq(struct amdgpu_device *adev, · 389 unmodified lines | ||
| 3376 | 3403 | spin_unlock_irqrestore(&adev->ddev->event_lock, flags); |
| 3377 | 3404 | |
| 3378 | 3405 | drm_vblank_put(adev->ddev, amdgpu_crtc->crtc_id); |
| 3379 | − amdgpu_irq_put(adev, &adev->pageflip_irq, crtc_id); | |
| 3380 | 3406 | queue_work(amdgpu_crtc->pflip_queue, &works->unpin_work); |
| 3381 | 3407 | |
| 3382 | 3408 | return 0; |