Currently, the if-else is used in the intel_pmu_disable/enable_event to check the type of an event. It works well, but with more and more types added later, e.g., perf metrics, compared to the switch statement, the if-else may impair the readability of the code. There is no harm to use the switch statement to replace the if-else here. Also, some optimizing compilers may compile a switch statement into a jump-table which is more efficient than if-else for a large number of cases. The performance gain may not be observed for now, because the number of cases is only 5, but the benefits may be observed with more and more types added in the future. Use switch to replace the if-else in the intel_pmu_disable/enable_event. If the idx is invalid, print a warning. For the case INTEL_PMC_IDX_FIXED_BTS in intel_pmu_disable_event, don't need to check the event->attr.precise_ip. Use return for the case.
Unified · Split
| @@ -2180,17 +2180,28 @@ static void intel_pmu_disable_event(struct perf_event *event) · 2179 unmodified lines | ||
| 2180 | 2180 | struct hw_perf_event *hwc = &event->hw; |
| 2181 | 2181 | int idx = hwc->idx; |
| 2182 | 2182 | |
| 2183 | − if (idx < INTEL_PMC_IDX_FIXED) { | |
| 2183 | + switch (idx) { | |
| 2184 | + case 0 ... INTEL_PMC_IDX_FIXED - 1: | |
| 2184 | 2185 | intel_clear_masks(event, idx); |
| 2185 | 2186 | x86_pmu_disable_event(event); |
| 2186 | − } else if (idx < INTEL_PMC_IDX_FIXED_BTS) { | |
| 2187 | + break; | |
| 2188 | + case INTEL_PMC_IDX_FIXED ... INTEL_PMC_IDX_FIXED_BTS - 1: | |
| 2187 | 2189 | intel_clear_masks(event, idx); |
| 2188 | 2190 | intel_pmu_disable_fixed(event); |
| 2189 | − } else if (idx == INTEL_PMC_IDX_FIXED_BTS) { | |
| 2191 | + break; | |
| 2192 | + case INTEL_PMC_IDX_FIXED_BTS: | |
| 2190 | 2193 | intel_pmu_disable_bts(); |
| 2191 | 2194 | intel_pmu_drain_bts_buffer(); |
| 2192 | − } else if (idx == INTEL_PMC_IDX_FIXED_VLBR) | |
| 2195 | + return; | |
| 2196 | + case INTEL_PMC_IDX_FIXED_VLBR: | |
| 2193 | 2197 | intel_clear_masks(event, idx); |
| 2198 | + break; | |
| 2199 | + default: | |
| 2200 | + intel_clear_masks(event, idx); | |
| 2201 | + pr_warn("Failed to disable the event with invalid index %d\n", | |
| 2202 | + idx); | |
| 2203 | + return; | |
| 2204 | + } | |
| 2194 | 2205 | |
| 2195 | 2206 | /* |
| 2196 | 2207 | * Needs to be called after x86_pmu_disable_event, |
| @@ -2262,18 +2273,27 @@ static void intel_pmu_enable_event(struct perf_event *event) · 65 unmodified lines | ||
| 2262 | 2273 | if (unlikely(event->attr.precise_ip)) |
| 2263 | 2274 | intel_pmu_pebs_enable(event); |
| 2264 | 2275 | |
| 2265 | − if (idx < INTEL_PMC_IDX_FIXED) { | |
| 2276 | + switch (idx) { | |
| 2277 | + case 0 ... INTEL_PMC_IDX_FIXED - 1: | |
| 2266 | 2278 | intel_set_masks(event, idx); |
| 2267 | 2279 | __x86_pmu_enable_event(hwc, ARCH_PERFMON_EVENTSEL_ENABLE); |
| 2268 | − } else if (idx < INTEL_PMC_IDX_FIXED_BTS) { | |
| 2280 | + break; | |
| 2281 | + case INTEL_PMC_IDX_FIXED ... INTEL_PMC_IDX_FIXED_BTS - 1: | |
| 2269 | 2282 | intel_set_masks(event, idx); |
| 2270 | 2283 | intel_pmu_enable_fixed(event); |
| 2271 | − } else if (idx == INTEL_PMC_IDX_FIXED_BTS) { | |
| 2284 | + break; | |
| 2285 | + case INTEL_PMC_IDX_FIXED_BTS: | |
| 2272 | 2286 | if (!__this_cpu_read(cpu_hw_events.enabled)) |
| 2273 | 2287 | return; |
| 2274 | 2288 | intel_pmu_enable_bts(hwc->config); |
| 2275 | − } else if (idx == INTEL_PMC_IDX_FIXED_VLBR) | |
| 2289 | + break; | |
| 2290 | + case INTEL_PMC_IDX_FIXED_VLBR: | |
| 2276 | 2291 | intel_set_masks(event, idx); |
| 2292 | + break; | |
| 2293 | + default: | |
| 2294 | + pr_warn("Failed to enable the event with invalid index %d\n", | |
| 2295 | + idx); | |
| 2296 | + } | |
| 2277 | 2297 | } |
| 2278 | 2298 | |
| 2279 | 2299 | static void intel_pmu_add_event(struct perf_event *event) |