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soc: qcom: geni: Support for ICC voting

Add necessary macros and structure variables to support ICC BW voting from individual SE drivers.

Akash Asthana committed 6 years ago

Commit 58ffbba1 parent be24c6a2 files · +120 −0Browse files

Showing the changes to include/linux (1 of 2 files). Show all

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include/linux/qcom-geni-se.h+38−0
@@ -6,6 +6,8 @@ · 5 unmodified lines
66 #ifndef _LINUX_QCOM_GENI_SE
77 #define _LINUX_QCOM_GENI_SE
88
9+#include <linux/interconnect.h>
10+
911 /* Transfer mode supported by GENI Serial Engines */
1012 enum geni_se_xfer_mode {
1113 GENI_SE_INVALID,
@@ -25,6 +27,17 @@ enum geni_se_protocol_type { · 13 unmodified lines
2527 struct geni_wrapper;
2628 struct clk;
2729
30+enum geni_icc_path_index {
31+ GENI_TO_CORE,
32+ CPU_TO_GENI,
33+ GENI_TO_DDR
34+};
35+
36+struct geni_icc_path {
37+ struct icc_path *path;
38+ unsigned int avg_bw;
39+};
40+
2841 /**
2942 * struct geni_se - GENI Serial Engine
3043 * @base: Base Address of the Serial Engine's register block
@@ -33,6 +46,7 @@ struct clk; · 2 unmodified lines
3346 * @clk: Handle to the core serial engine clock
3447 * @num_clk_levels: Number of valid clock levels in clk_perf_tbl
3548 * @clk_perf_tbl: Table of clock frequency input to serial engine clock
49+ * @icc_paths: Array of ICC paths for SE
3650 */
3751 struct geni_se {
3852 void __iomem *base;
@@ -41,6 +55,7 @@ struct geni_se { · 2 unmodified lines
4155 struct clk *clk;
4256 unsigned int num_clk_levels;
4357 unsigned long *clk_perf_tbl;
58+ struct geni_icc_path icc_paths[3];
4459 };
4560
4661 /* Common SE registers */
@@ -229,6 +244,21 @@ struct geni_se { · 182 unmodified lines
229244 #define GENI_SE_VERSION_MINOR(ver) ((ver & HW_VER_MINOR_MASK) >> HW_VER_MINOR_SHFT)
230245 #define GENI_SE_VERSION_STEP(ver) (ver & HW_VER_STEP_MASK)
231246
247+/*
248+ * Define bandwidth thresholds that cause the underlying Core 2X interconnect
249+ * clock to run at the named frequency. These baseline values are recommended
250+ * by the hardware team, and are not dynamically scaled with GENI bandwidth
251+ * beyond basic on/off.
252+ */
253+#define CORE_2X_19_2_MHZ 960
254+#define CORE_2X_50_MHZ 2500
255+#define CORE_2X_100_MHZ 5000
256+#define CORE_2X_150_MHZ 7500
257+#define CORE_2X_200_MHZ 10000
258+#define CORE_2X_236_MHZ 16383
259+
260+#define GENI_DEFAULT_BW Bps_to_icc(1000)
261+
232262 #if IS_ENABLED(CONFIG_QCOM_GENI_SE)
233263
234264 u32 geni_se_get_qup_hw_version(struct geni_se *se);
@@ -416,5 +446,13 @@ int geni_se_rx_dma_prep(struct geni_se *se, void *buf, size_t len, · 181 unmodified lines
416446 void geni_se_tx_dma_unprep(struct geni_se *se, dma_addr_t iova, size_t len);
417447
418448 void geni_se_rx_dma_unprep(struct geni_se *se, dma_addr_t iova, size_t len);
449+
450+int geni_icc_get(struct geni_se *se, const char *icc_ddr);
451+
452+int geni_icc_set_bw(struct geni_se *se);
453+
454+int geni_icc_enable(struct geni_se *se);
455+
456+int geni_icc_disable(struct geni_se *se);
419457 #endif
420458 #endif