lael-labs/linux

Documentation/dev-tools/kunit/running_tips.rst+1−13

@@ -86,19 +86,7 @@ Generating code coverage reports under UML · 85 unmodified lines
86	.. note::	86	.. note::
87	TODO(brendanhiggins@google.com): There are various issues with UML and	87	TODO(brendanhiggins@google.com): There are various issues with UML and
88	versions of gcc 7 and up. You're likely to run into missing ``.gcda``	88	versions of gcc 7 and up. You're likely to run into missing ``.gcda``
89	files or compile errors. We know one `faulty GCC commit	89	files or compile errors.
90	<https://github.com/gcc-mirror/gcc/commit/8c9434c2f9358b8b8bad2c1990edf10a21645f9d>`_
91	but not how we'd go about getting this fixed. The compile errors still
92	need some investigation.
93
94	.. note::
95	TODO(brendanhiggins@google.com): for recent versions of Linux
96	(5.10-5.12, maybe earlier), there's a bug with gcov counters not being
97	flushed in UML. This translates to very low (<1%) reported coverage. This is
98	related to the above issue and can be worked around by replacing the
99	one call to ``uml_abort()`` (it's in ``os_dump_core()``) with a plain
100	``exit()``.
101
102		90
103	This is different from the "normal" way of getting coverage information that is	91	This is different from the "normal" way of getting coverage information that is
104	documented in Documentation/dev-tools/gcov.rst.	92	documented in Documentation/dev-tools/gcov.rst.

Documentation/devicetree/bindings/clock/brcm,iproc-clocks.yaml+0−1

@@ -50,7 +50,6 @@ properties: · 49 unmodified lines
50		50
51	reg:	51	reg:
52	minItems: 1	52	minItems: 1
53	maxItems: 3
54	items:	53	items:
55	- description: base register	54	- description: base register
56	- description: power register	55	- description: power register

Documentation/devicetree/bindings/display/renesas,du.yaml+0−1

@@ -92,7 +92,6 @@ required: · 91 unmodified lines
92	- reg	92	- reg
93	- clocks	93	- clocks
94	- interrupts	94	- interrupts
95	- resets
96	- ports	95	- ports
97		96
98	allOf:	97	allOf:

Documentation/devicetree/bindings/hwmon/adt7475.yaml+11−11

   reg:
     maxItems: 1
-patternProperties:
+  adi,pwm-active-state:
-  "^adi,bypass-attenuator-in[0-4]$":
-    description: |
-      Configures bypassing the individual voltage input attenuator. If
-      set to 1 the attenuator is bypassed if set to 0 the attenuator is
-      not bypassed. If the property is absent then the attenuator
-      retains it's configuration from the bios/bootloader.
-    $ref: /schemas/types.yaml#/definitions/uint32
-    enum: [0, 1]
-  "^adi,pwm-active-state$":
     description: |
       Integer array, represents the active state of the pwm outputs If set to 0
       the pwm uses a logic low output for 100% duty cycle. If set to 1 the pwm
       enum: [0, 1]
       default: 1
+patternProperties:
+  "^adi,bypass-attenuator-in[0-4]$":
+    description: |
+      Configures bypassing the individual voltage input attenuator. If
+      set to 1 the attenuator is bypassed if set to 0 the attenuator is
+      not bypassed. If the property is absent then the attenuator
+      retains it's configuration from the bios/bootloader.
+    $ref: /schemas/types.yaml#/definitions/uint32
+    enum: [0, 1]
 required:
   - compatible
   - reg

Documentation/devicetree/bindings/iommu/arm,smmu.yaml+2−4

         items:
           - const: marvell,ap806-smmu-500
           - const: arm,mmu-500
-      - description: NVIDIA SoCs that program two ARM MMU-500s identically
-        items:
       - description: NVIDIA SoCs that require memory controller interaction
           and may program multiple ARM MMU-500s identically with the memory
           controller interleaving translations between multiple instances
           for improved performance.
         items:
           - enum:
-              - const: nvidia,tegra194-smmu
+              - nvidia,tegra194-smmu
-              - const: nvidia,tegra186-smmu
+              - nvidia,tegra186-smmu
           - const: nvidia,smmu-500
       - items:
           - const: arm,mmu-500

Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml+0−2

       - description: configuration registers for MMU instance 0
       - description: configuration registers for MMU instance 1
     minItems: 1
-    maxItems: 2
   interrupts:
     items:
       - description: interruption for MMU instance 0
       - description: interruption for MMU instance 1
     minItems: 1
-    maxItems: 2
   clocks:
     items:

Documentation/devicetree/bindings/memory-controllers/arm,pl353-smc.yaml+0−1

@@ -57,7 +57,6 @@ properties: · 56 unmodified lines
57		57
58	ranges:	58	ranges:
59	minItems: 1	59	minItems: 1
60	maxItems: 3
61	description: \|	60	description: \|
62	Memory bus areas for interacting with the devices. Reflects	61	Memory bus areas for interacting with the devices. Reflects
63	the memory layout with four integer values following:	62	the memory layout with four integer values following:

Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml+0−8

   interrupts:
     minItems: 1
-    maxItems: 3
     items:
       - description: NAND CTLRDY interrupt
       - description: FLASH_DMA_DONE if flash DMA is available
   interrupt-names:
     minItems: 1
-    maxItems: 3
     items:
       - const: nand_ctlrdy
       - const: flash_dma_done
     then:
       properties:
         reg-names:
-          minItems: 2
-          maxItems: 2
           items:
             - const: nand
             - const: nand-int-base
     then:
       properties:
         reg-names:
-          minItems: 3
-          maxItems: 3
           items:
             - const: nand
             - const: nand-int-base
     then:
       properties:
         reg-names:
-          minItems: 3
-          maxItems: 3
           items:
             - const: nand
             - const: iproc-idm

Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml+2−2

@@ -67,8 +67,8 @@ properties: · 66 unmodified lines
67	reg:	67	reg:
68	oneOf:	68	oneOf:
69	- enum:	69	- enum:
70	- 0	70	- 0
71	- 1	71	- 1
72		72
73	required:	73	required:
74	- compatible	74	- compatible

Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml+28−28

       Type-C spec states minimum CC pin debounce of 100 ms and maximum
       of 200 ms. However, some solutions might need more than 200 ms.
+  refclk-dig:
+    type: object
+    description: |
+      WIZ node should have subnode for refclk_dig to select the reference
+      clock source for the reference clock used in the PHY and PMA digital
+      logic.
+    properties:
+      clocks:
+        minItems: 2
+        maxItems: 4
+        description: Phandle to two (Torrent) or four (Sierra) clock nodes representing
+          the inputs to refclk_dig
+      "#clock-cells":
+        const: 0
+      assigned-clocks:
+        maxItems: 1
+      assigned-clock-parents:
+        maxItems: 1
+    required:
+      - clocks
+      - "#clock-cells"
+      - assigned-clocks
+      - assigned-clock-parents
 patternProperties:
   "^pll[0|1]-refclk$":
     type: object
       - clocks
       - "#clock-cells"
-  "^refclk-dig$":
-    type: object
-    description: |
-      WIZ node should have subnode for refclk_dig to select the reference
-      clock source for the reference clock used in the PHY and PMA digital
-      logic.
-    properties:
-      clocks:
-        minItems: 2
-        maxItems: 4
-        description: Phandle to two (Torrent) or four (Sierra) clock nodes representing
-          the inputs to refclk_dig
-      "#clock-cells":
-        const: 0
-      assigned-clocks:
-        maxItems: 1
-      assigned-clock-parents:
-        maxItems: 1
-    required:
-      - clocks
-      - "#clock-cells"
-      - assigned-clocks
-      - assigned-clock-parents
   "^serdes@[0-9a-f]+$":
     type: object
     description: |

Documentation/devicetree/bindings/regulator/fixed-regulator.yaml+2−0

     maxItems: 1
   power-domains:
+    deprecated: true
     description:
       Power domain to use for enable control. This binding is only
       available if the compatible is chosen to regulator-fixed-domain.
     maxItems: 1
   required-opps:
+    deprecated: true
     description:
       Performance state to use for enable control. This binding is only
       available if the compatible is chosen to regulator-fixed-domain. The

Documentation/devicetree/bindings/regulator/mps,mpq7920.yaml+3−3

           switching frequency must be one of following corresponding value
           1.1MHz, 1.65MHz, 2.2MHz, 2.75MHz
-    patternProperties:
+      ldortc:
-      "^ldo[1-4]$":
         type: object
         $ref: regulator.yaml#
-      "^ldortc$":
+    patternProperties:
+      "^ldo[1-4]$":
         type: object
         $ref: regulator.yaml#

Documentation/devicetree/bindings/regulator/nxp,pf8x00-regulator.yaml+2−1

@@ -83,7 +83,8 @@ properties: · 82 unmodified lines
83		83
84	unevaluatedProperties: false	84	unevaluatedProperties: false
85		85
86	"^vsnvs$":	86	properties:
		87	vsnvs:
87	type: object	88	type: object
88	$ref: regulator.yaml#	89	$ref: regulator.yaml#
89	description:	90	description:

Documentation/devicetree/bindings/rtc/faraday,ftrtc010.yaml+0−1

@@ -30,7 +30,6 @@ properties: · 29 unmodified lines
30	maxItems: 1	30	maxItems: 1
31		31
32	clocks:	32	clocks:
33	minItems: 2
34	items:	33	items:
35	- description: PCLK clocks	34	- description: PCLK clocks
36	- description: EXTCLK clocks. Faraday calls it CLK1HZ and says the clock	35	- description: EXTCLK clocks. Faraday calls it CLK1HZ and says the clock

Documentation/devicetree/bindings/spi/spi-controller.yaml+16−16

     description:
       The SPI controller acts as a slave, instead of a master.
-allOf:
+  slave:
-  - if:
-      not:
-        required:
-          - spi-slave
-    then:
-      properties:
-        "#address-cells":
-          const: 1
-    else:
-      properties:
-        "#address-cells":
-          const: 0
-patternProperties:
-  "^slave$":
     type: object
     properties:
     required:
       - compatible
+patternProperties:
   "^.*@[0-9a-f]+$":
     type: object
       - compatible
       - reg
+allOf:
+  - if:
+      not:
+        required:
+          - spi-slave
+    then:
+      properties:
+        "#address-cells":
+          const: 1
+    else:
+      properties:
+        "#address-cells":
+          const: 0
 additionalProperties: true
 examples:

Documentation/devicetree/bindings/usb/nxp,isp1760.yaml+0−2

   interrupts:
     minItems: 1
-    maxItems: 2
     items:
       - description: Host controller interrupt
       - description: Device controller interrupt in isp1761
   interrupt-names:
     minItems: 1
-    maxItems: 2
     items:
       - const: host
       - const: peripheral

Documentation/driver-api/early-userspace/early_userspace_support.rst+4−4

Documentation/features/core/thread-info-in-task/arch-support.txt+32−0

@@ -0,0 +1,32 @@
	1	#
	2	# Feature name: thread-info-in-task
	3	# Kconfig: THREAD_INFO_IN_TASK
	4	# description: arch makes use of the core kernel facility to embedd thread_info in task_struct
	5	#
	6	-----------------------
	7	\| arch \|status\|
	8	-----------------------
	9	\| alpha: \| TODO \|
	10	\| arc: \| TODO \|
	11	\| arm: \| TODO \|
	12	\| arm64: \| ok \|
	13	\| csky: \| TODO \|
	14	\| h8300: \| TODO \|
	15	\| hexagon: \| TODO \|
	16	\| ia64: \| TODO \|
	17	\| m68k: \| TODO \|
	18	\| microblaze: \| TODO \|
	19	\| mips: \| TODO \|
	20	\| nds32: \| ok \|
	21	\| nios2: \| TODO \|
	22	\| openrisc: \| TODO \|
	23	\| parisc: \| TODO \|
	24	\| powerpc: \| ok \|
	25	\| riscv: \| ok \|
	26	\| s390: \| ok \|
	27	\| sh: \| TODO \|
	28	\| sparc: \| TODO \|
	29	\| um: \| TODO \|
	30	\| x86: \| ok \|
	31	\| xtensa: \| TODO \|
	32	-----------------------

Documentation/features/time/arch-tick-broadcast/arch-support.txt+1−1

@@ -22,7 +22,7 @@ · 21 unmodified lines
22	\| openrisc: \| TODO \|	22	\| openrisc: \| TODO \|
23	\| parisc: \| TODO \|	23	\| parisc: \| TODO \|
24	\| powerpc: \| ok \|	24	\| powerpc: \| ok \|
25	\| riscv: \| TODO \|	25	\| riscv: \| ok \|
26	\| s390: \| TODO \|	26	\| s390: \| TODO \|
27	\| sh: \| ok \|	27	\| sh: \| ok \|
28	\| sparc: \| TODO \|	28	\| sparc: \| TODO \|

Documentation/filesystems/ramfs-rootfs-initramfs.rst+1−1

@@ -170,7 +170,7 @@ Documentation/driver-api/early-userspace/early_userspace_support.rst for more de · 169 unmodified lines
170	The kernel does not depend on external cpio tools. If you specify a	170	The kernel does not depend on external cpio tools. If you specify a
171	directory instead of a configuration file, the kernel's build infrastructure	171	directory instead of a configuration file, the kernel's build infrastructure
172	creates a configuration file from that directory (usr/Makefile calls	172	creates a configuration file from that directory (usr/Makefile calls
173	usr/gen_initramfs_list.sh), and proceeds to package up that directory	173	usr/gen_initramfs.sh), and proceeds to package up that directory
174	using the config file (by feeding it to usr/gen_init_cpio, which is created	174	using the config file (by feeding it to usr/gen_init_cpio, which is created
175	from usr/gen_init_cpio.c). The kernel's build-time cpio creation code is	175	from usr/gen_init_cpio.c). The kernel's build-time cpio creation code is
176	entirely self-contained, and the kernel's boot-time extractor is also	176	entirely self-contained, and the kernel's boot-time extractor is also

Documentation/networking/af_xdp.rst+3−3

@@ -243,8 +243,8 @@ Configuration Flags and Socket Options · 242 unmodified lines
243	These are the various configuration flags that can be used to control	243	These are the various configuration flags that can be used to control
244	and monitor the behavior of AF_XDP sockets.	244	and monitor the behavior of AF_XDP sockets.
245		245
246	XDP_COPY and XDP_ZERO_COPY bind flags	246	XDP_COPY and XDP_ZEROCOPY bind flags
247	-------------------------------------	247	------------------------------------
248		248
249	When you bind to a socket, the kernel will first try to use zero-copy	249	When you bind to a socket, the kernel will first try to use zero-copy
250	copy. If zero-copy is not supported, it will fall back on using copy	250	copy. If zero-copy is not supported, it will fall back on using copy
@@ -252,7 +252,7 @@ mode, i.e. copying all packets out to user space. But if you would · 1 unmodified line
252	like to force a certain mode, you can use the following flags. If you	252	like to force a certain mode, you can use the following flags. If you
253	pass the XDP_COPY flag to the bind call, the kernel will force the	253	pass the XDP_COPY flag to the bind call, the kernel will force the
254	socket into copy mode. If it cannot use copy mode, the bind call will	254	socket into copy mode. If it cannot use copy mode, the bind call will
255	fail with an error. Conversely, the XDP_ZERO_COPY flag will force the	255	fail with an error. Conversely, the XDP_ZEROCOPY flag will force the
256	socket into zero-copy mode or fail.	256	socket into zero-copy mode or fail.
257		257
258	XDP_SHARED_UMEM bind flag	258	XDP_SHARED_UMEM bind flag

Documentation/networking/ip-sysctl.rst+1−1

@@ -826,7 +826,7 @@ tcp_fastopen_blackhole_timeout_sec - INTEGER · 825 unmodified lines
826	initial value when the blackhole issue goes away.	826	initial value when the blackhole issue goes away.
827	0 to disable the blackhole detection.	827	0 to disable the blackhole detection.
828		828
829	By default, it is set to 1hr.	829	By default, it is set to 0 (feature is disabled).
830		830
831	tcp_fastopen_key - list of comma separated 32-digit hexadecimal INTEGERs	831	tcp_fastopen_key - list of comma separated 32-digit hexadecimal INTEGERs
832	The list consists of a primary key and an optional backup key. The	832	The list consists of a primary key and an optional backup key. The

Documentation/translations/zh_CN/process/2.Process.rst+2−2

@@ -47,7 +47,7 @@ · 46 unmodified lines
47	（顺便说一句，值得注意的是，合并窗口期间集成的更改并不是凭空产生的；它们是经	47	（顺便说一句，值得注意的是，合并窗口期间集成的更改并不是凭空产生的；它们是经
48	提前收集、测试和分级的。稍后将详细描述该过程的工作方式。）	48	提前收集、测试和分级的。稍后将详细描述该过程的工作方式。）
49		49
50	合并窗口持续大约两周。在这段时间结束时，LinusTorvalds将声明窗口已关闭，并	50	合并窗口持续大约两周。在这段时间结束时，Linus Torvalds将声明窗口已关闭，并
51	释放第一个“rc”内核。例如，对于目标为5.6的内核，在合并窗口结束时发生的释放	51	释放第一个“rc”内核。例如，对于目标为5.6的内核，在合并窗口结束时发生的释放
52	将被称为5.6-rc1。-rc1 版本是一个信号，表示合并新特性的时间已经过去，稳定下一	52	将被称为5.6-rc1。-rc1 版本是一个信号，表示合并新特性的时间已经过去，稳定下一
53	个内核的时间已经到来。	53	个内核的时间已经到来。
@@ -168,7 +168,7 @@ Greg Kroah-Hartman领导。稳定团队将使用5.x.y编号方案不定期地发 · 114 unmodified lines
168	补丁如何进入内核	168	补丁如何进入内核
169	----------------	169	----------------
170		170
171	只有一个人可以将补丁合并到主线内核存储库中：LinusTorvalds。但是，在进入	171	只有一个人可以将补丁合并到主线内核存储库中：Linus Torvalds。但是，在进入
172	2.6.38内核的9500多个补丁中，只有112个（大约1.3%）是由Linus自己直接选择的。	172	2.6.38内核的9500多个补丁中，只有112个（大约1.3%）是由Linus自己直接选择的。
173	内核项目已经发展到一个没有一个开发人员可以在没有支持的情况下检查和选择每个	173	内核项目已经发展到一个没有一个开发人员可以在没有支持的情况下检查和选择每个
174	补丁的规模。内核开发人员处理这种增长的方式是使用围绕信任链构建的助理系统。	174	补丁的规模。内核开发人员处理这种增长的方式是使用围绕信任链构建的助理系统。

LICENSES/dual/CC-BY-4.0+1−1

@@ -392,7 +392,7 @@ Section 8 -- Interpretation. · 391 unmodified lines
392	Creative Commons is not a party to its public	392	Creative Commons is not a party to its public
393	licenses. Notwithstanding, Creative Commons may elect to apply one of	393	licenses. Notwithstanding, Creative Commons may elect to apply one of
394	its public licenses to material it publishes and in those instances	394	its public licenses to material it publishes and in those instances
395	will be considered the “Licensor.” The text of the Creative Commons	395	will be considered the "Licensor." The text of the Creative Commons
396	public licenses is dedicated to the public domain under the CC0 Public	396	public licenses is dedicated to the public domain under the CC0 Public
397	Domain Dedication. Except for the limited purpose of indicating that	397	Domain Dedication. Except for the limited purpose of indicating that
398	material is shared under a Creative Commons public license or as	398	material is shared under a Creative Commons public license or as

MAINTAINERS+2−0

 AMD IOMMU (AMD-VI)
 M:	Joerg Roedel <joro@8bytes.org>
+R:	Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
 L:	iommu@lists.linux-foundation.org
 S:	Maintained
 T:	git git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git
 MEDIATEK SWITCH DRIVER
 M:	Sean Wang <sean.wang@mediatek.com>
 M:	Landen Chao <Landen.Chao@mediatek.com>
+M:	DENG Qingfang <dqfext@gmail.com>
 L:	netdev@vger.kernel.org
 S:	Maintained
 F:	drivers/net/dsa/mt7530.*

Makefile+7−6

@@ -2,7 +2,7 @@ · 1 unmodified line
2	VERSION = 5	2	VERSION = 5
3	PATCHLEVEL = 14	3	PATCHLEVEL = 14
4	SUBLEVEL = 0	4	SUBLEVEL = 0
5	EXTRAVERSION = -rc1	5	EXTRAVERSION = -rc2
6	NAME = Opossums on Parade	6	NAME = Opossums on Parade
7		7
8	# DOCUMENTATION	8	# DOCUMENTATION
@@ -728,11 +728,12 @@ $(KCONFIG_CONFIG): · 719 unmodified lines
728	# This exploits the 'multi-target pattern rule' trick.	728	# This exploits the 'multi-target pattern rule' trick.
729	# The syncconfig should be executed only once to make all the targets.	729	# The syncconfig should be executed only once to make all the targets.
730	# (Note: use the grouped target '&:' when we bump to GNU Make 4.3)	730	# (Note: use the grouped target '&:' when we bump to GNU Make 4.3)
731	quiet_cmd_syncconfig = SYNC $@	731	#
732	cmd_syncconfig = $(MAKE) -f $(srctree)/Makefile syncconfig	732	# Do not use $(call cmd,...) here. That would suppress prompts from syncconfig,
733		733	# so you cannot notice that Kconfig is waiting for the user input.
734	%/config/auto.conf %/config/auto.conf.cmd %/generated/autoconf.h: $(KCONFIG_CONFIG)	734	%/config/auto.conf %/config/auto.conf.cmd %/generated/autoconf.h: $(KCONFIG_CONFIG)
735	+$(call cmd,syncconfig)	735	$(Q)$(kecho) " SYNC $@"
		736	$(Q)$(MAKE) -f $(srctree)/Makefile syncconfig
736	else # !may-sync-config	737	else # !may-sync-config
737	# External modules and some install targets need include/generated/autoconf.h	738	# External modules and some install targets need include/generated/autoconf.h
738	# and include/config/auto.conf but do not care if they are up-to-date.	739	# and include/config/auto.conf but do not care if they are up-to-date.
@@ -802,7 +803,7 @@ else · 63 unmodified lines
802	# Warn about unmarked fall-throughs in switch statement.	803	# Warn about unmarked fall-throughs in switch statement.
803	# Disabled for clang while comment to attribute conversion happens and	804	# Disabled for clang while comment to attribute conversion happens and
804	# https://github.com/ClangBuiltLinux/linux/issues/636 is discussed.	805	# https://github.com/ClangBuiltLinux/linux/issues/636 is discussed.
805	KBUILD_CFLAGS += $(call cc-option,-Wimplicit-fallthrough,)	806	KBUILD_CFLAGS += $(call cc-option,-Wimplicit-fallthrough=5,)
806	endif	807	endif
807		808
808	# These warnings generated too much noise in a regular build.	809	# These warnings generated too much noise in a regular build.

arch/arm/Kconfig+1−1

@@ -395,7 +395,7 @@ config ARCH_IXP4XX · 394 unmodified lines
395	select IXP4XX_IRQ	395	select IXP4XX_IRQ
396	select IXP4XX_TIMER	396	select IXP4XX_TIMER
397	# With the new PCI driver this is not needed	397	# With the new PCI driver this is not needed
398	select NEED_MACH_IO_H if PCI_IXP4XX_LEGACY	398	select NEED_MACH_IO_H if IXP4XX_PCI_LEGACY
399	select USB_EHCI_BIG_ENDIAN_DESC	399	select USB_EHCI_BIG_ENDIAN_DESC
400	select USB_EHCI_BIG_ENDIAN_MMIO	400	select USB_EHCI_BIG_ENDIAN_MMIO
401	help	401	help

arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts+3−1

 #include "aspeed-g5.dtsi"
 #include <dt-bindings/gpio/aspeed-gpio.h>
 #include <dt-bindings/i2c/i2c.h>
+#include <dt-bindings/interrupt-controller/irq.h>
 /{
 	model = "ASRock E3C246D4I BMC";
 &vuart {
 	status = "okay";
-	aspeed,sirq-active-high;
+	aspeed,lpc-io-reg = <0x2f8>;
+	aspeed,lpc-interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
 };
 &mac0 {

arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts+5−4

 		reg = <0x69>;
 	};
-	power-supply@6a {
+	power-supply@6b {
 		compatible = "ibm,cffps";
-		reg = <0x6a>;
+		reg = <0x6b>;
 	};
-	power-supply@6b {
+	power-supply@6d {
 		compatible = "ibm,cffps";
-		reg = <0x6b>;
+		reg = <0x6d>;
 	};
 };
 &emmc {
 	status = "okay";
+	clk-phase-mmc-hs200 = <180>, <180>;
 };
 &fsim0 {

arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts+1−4

 	/*W0-W7*/	"","","","","","","","",
 	/*X0-X7*/	"","","","","","","","",
 	/*Y0-Y7*/	"","","","","","","","",
-	/*Z0-Z7*/	"","","","","","","","",
+	/*Z0-Z7*/	"","","","","","","","";
-	/*AA0-AA7*/	"","","","","","","","",
-	/*AB0-AB7*/	"","","","","","","","",
-	/*AC0-AC7*/	"","","","","","","","";
 	pin_mclr_vpp {
 		gpio-hog;

arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts+2−4

 	/*W0-W7*/	"","","","","","","","",
 	/*X0-X7*/	"","","","","","","","",
 	/*Y0-Y7*/	"","","","","","","","",
-	/*Z0-Z7*/	"","","","","","","","",
+	/*Z0-Z7*/	"","","","","","","","";
-	/*AA0-AA7*/	"","","","","","","","",
-	/*AB0-AB7*/	"","","","","","","","",
-	/*AC0-AC7*/	"","","","","","","","";
 };
 &fmc {
 &emmc {
 	status = "okay";
+	clk-phase-mmc-hs200 = <36>, <270>;
 };
 &fsim0 {

arch/arm/boot/dts/versatile-ab.dts+2−3

 		#size-cells = <1>;
 		ranges;
-		vic: intc@10140000 {
+		vic: interrupt-controller@10140000 {
 			compatible = "arm,versatile-vic";
 			interrupt-controller;
 			#interrupt-cells = <1>;
 			reg = <0x10140000 0x1000>;
-			clear-mask = <0xffffffff>;
 			valid-mask = <0xffffffff>;
 		};
-		sic: intc@10003000 {
+		sic: interrupt-controller@10003000 {
 			compatible = "arm,versatile-sic";
 			interrupt-controller;
 			#interrupt-cells = <1>;

arch/arm/boot/dts/versatile-pb.dts+1−1

@@ -7,7 +7,7 @@ · 6 unmodified lines
7		7
8	amba {	8	amba {
9	/* The Versatile PB is using more SIC IRQ lines than the AB */	9	/* The Versatile PB is using more SIC IRQ lines than the AB */
10	sic: intc@10003000 {	10	sic: interrupt-controller@10003000 {
11	clear-mask = <0xffffffff>;	11	clear-mask = <0xffffffff>;
12	/*	12	/*
13	* Valid interrupt lines mask according to	13	* Valid interrupt lines mask according to

arch/arm/configs/integrator_defconfig+1−4

 CONFIG_DRM_DISPLAY_CONNECTOR=y
 CONFIG_DRM_SIMPLE_BRIDGE=y
 CONFIG_DRM_PL111=y
-CONFIG_FB_MODE_HELPERS=y
+CONFIG_FB=y
-CONFIG_FB_MATROX=y
-CONFIG_FB_MATROX_MILLENIUM=y
-CONFIG_FB_MATROX_MYSTIQUE=y
 CONFIG_BACKLIGHT_CLASS_DEVICE=y
 # CONFIG_VGA_CONSOLE is not set
 CONFIG_LOGO=y

arch/arm/configs/multi_v7_defconfig+1−1

@@ -821,7 +821,7 @@ CONFIG_USB_ISP1760=y · 820 unmodified lines
821	CONFIG_USB_HSIC_USB3503=y	821	CONFIG_USB_HSIC_USB3503=y
822	CONFIG_AB8500_USB=y	822	CONFIG_AB8500_USB=y
823	CONFIG_KEYSTONE_USB_PHY=m	823	CONFIG_KEYSTONE_USB_PHY=m
824	CONFIG_NOP_USB_XCEIV=m	824	CONFIG_NOP_USB_XCEIV=y
825	CONFIG_AM335X_PHY_USB=m	825	CONFIG_AM335X_PHY_USB=m
826	CONFIG_TWL6030_USB=m	826	CONFIG_TWL6030_USB=m
827	CONFIG_USB_GPIO_VBUS=y	827	CONFIG_USB_GPIO_VBUS=y

arch/arm/configs/realview_defconfig+1−3

 CONFIG_DRM_DISPLAY_CONNECTOR=y
 CONFIG_DRM_SIMPLE_BRIDGE=y
 CONFIG_DRM_PL111=y
-CONFIG_FB_MODE_HELPERS=y
+CONFIG_FB=y
 CONFIG_BACKLIGHT_CLASS_DEVICE=y
 CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
 CONFIG_SOUND=y
 CONFIG_SND=y
 # CONFIG_SND_DRIVERS is not set

arch/arm/configs/shmobile_defconfig+1−0

@@ -135,6 +135,7 @@ CONFIG_DRM_SII902X=y · 134 unmodified lines
135	CONFIG_DRM_SIMPLE_BRIDGE=y	135	CONFIG_DRM_SIMPLE_BRIDGE=y
136	CONFIG_DRM_I2C_ADV7511=y	136	CONFIG_DRM_I2C_ADV7511=y
137	CONFIG_DRM_I2C_ADV7511_AUDIO=y	137	CONFIG_DRM_I2C_ADV7511_AUDIO=y
		138	CONFIG_FB=y
138	CONFIG_FB_SH_MOBILE_LCDC=y	139	CONFIG_FB_SH_MOBILE_LCDC=y
139	CONFIG_BACKLIGHT_PWM=y	140	CONFIG_BACKLIGHT_PWM=y
140	CONFIG_BACKLIGHT_AS3711=y	141	CONFIG_BACKLIGHT_AS3711=y

arch/arm/configs/u8500_defconfig+5−0

 CONFIG_TOUCHSCREEN_ATMEL_MXT=y
 CONFIG_TOUCHSCREEN_BU21013=y
 CONFIG_TOUCHSCREEN_CY8CTMA140=y
+CONFIG_TOUCHSCREEN_CYTTSP_CORE=y
+CONFIG_TOUCHSCREEN_CYTTSP_SPI=y
+CONFIG_TOUCHSCREEN_MMS114=y
+CONFIG_TOUCHSCREEN_ZINITIX=y
 CONFIG_INPUT_MISC=y
 CONFIG_INPUT_AB8500_PONKEY=y
 CONFIG_INPUT_GPIO_VIBRA=y
 CONFIG_DRM_PANEL_SONY_ACX424AKP=y
 CONFIG_DRM_LIMA=y
 CONFIG_DRM_MCDE=y
+CONFIG_FB=y
 CONFIG_BACKLIGHT_CLASS_DEVICE=y
 CONFIG_BACKLIGHT_KTD253=y
 CONFIG_BACKLIGHT_GPIO=y

arch/arm/configs/versatile_defconfig+1−3

 CONFIG_DRM_DISPLAY_CONNECTOR=y
 CONFIG_DRM_SIMPLE_BRIDGE=y
 CONFIG_DRM_PL111=y
-CONFIG_FB_MODE_HELPERS=y
+CONFIG_FB=y
 CONFIG_BACKLIGHT_CLASS_DEVICE=y
 CONFIG_LOGO=y
 CONFIG_SOUND=y
 CONFIG_NFSD_V3=y
 CONFIG_NLS_CODEPAGE_850=m
 CONFIG_NLS_ISO8859_1=m
-CONFIG_FONTS=y
-CONFIG_FONT_ACORN_8x8=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_FS=y
 CONFIG_DEBUG_KERNEL=y

arch/arm/configs/vexpress_defconfig+7−10

 # CONFIG_NET_NS is not set
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_PROFILING=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
 CONFIG_ARCH_VEXPRESS=y
 CONFIG_ARCH_VEXPRESS_DCSCB=y
 CONFIG_ARCH_VEXPRESS_TC2_PM=y
 CONFIG_VMSPLIT_2G=y
 CONFIG_NR_CPUS=8
 CONFIG_ARM_PSCI=y
-CONFIG_CMA=y
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_CMDLINE="console=ttyAMA0"
 CONFIG_CPU_IDLE=y
 CONFIG_VFP=y
 CONFIG_NEON=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
 # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_CMA=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
 CONFIG_NET_9P=y
 CONFIG_NET_9P_VIRTIO=y
 CONFIG_DEVTMPFS=y
-CONFIG_DMA_CMA=y
 CONFIG_MTD=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_BLOCK=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_SCSI_VIRTIO=y
 CONFIG_ATA=y
-# CONFIG_SATA_PMP is not set
 CONFIG_NETDEVICES=y
 CONFIG_VIRTIO_NET=y
 CONFIG_SMC91X=y
 CONFIG_DRM_PANEL_SIMPLE=y
 CONFIG_DRM_SII902X=y
 CONFIG_DRM_PL111=y
-CONFIG_FB_MODE_HELPERS=y
+CONFIG_FB=y
 CONFIG_BACKLIGHT_CLASS_DEVICE=y
 CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
 CONFIG_SOUND=y
 CONFIG_SND=y
 # CONFIG_SND_DRIVERS is not set
 CONFIG_9P_FS=y
 CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_ISO8859_1=y
+# CONFIG_CRYPTO_HW is not set
+CONFIG_DMA_CMA=y
 CONFIG_DEBUG_INFO=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_KERNEL=y
 CONFIG_DETECT_HUNG_TASK=y
 # CONFIG_SCHED_DEBUG is not set
 CONFIG_DEBUG_USER=y
-# CONFIG_CRYPTO_HW is not set

arch/arm64/Kconfig+2−1

 	depends on CC_HAS_BRANCH_PROT_PAC_RET_BTI
 	# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94697
 	depends on !CC_IS_GCC || GCC_VERSION >= 100100
-	depends on !(CC_IS_CLANG && GCOV_KERNEL)
+	# https://github.com/llvm/llvm-project/commit/a88c722e687e6780dcd6a58718350dc76fcc4cc9
+	depends on !CC_IS_CLANG || CLANG_VERSION >= 120000
 	depends on (!FUNCTION_GRAPH_TRACER || DYNAMIC_FTRACE_WITH_REGS)
 	help
 	  Build the kernel with Branch Target Identification annotations

arch/arm64/boot/dts/nvidia/tegra194.dtsi+13−0

 				 <&bpmp TEGRA194_CLK_XUSB_SS>,
 				 <&bpmp TEGRA194_CLK_XUSB_FS>;
 			clock-names = "dev", "ss", "ss_src", "fs_src";
+			interconnects = <&mc TEGRA194_MEMORY_CLIENT_XUSB_DEVR &emc>,
+					<&mc TEGRA194_MEMORY_CLIENT_XUSB_DEVW &emc>;
+			interconnect-names = "dma-mem", "write";
+			iommus = <&smmu TEGRA194_SID_XUSB_DEV>;
 			power-domains = <&bpmp TEGRA194_POWER_DOMAIN_XUSBB>,
 					<&bpmp TEGRA194_POWER_DOMAIN_XUSBA>;
 			power-domain-names = "dev", "ss";
 				      "xusb_ss", "xusb_ss_src", "xusb_hs_src",
 				      "xusb_fs_src", "pll_u_480m", "clk_m",
 				      "pll_e";
+			interconnects = <&mc TEGRA194_MEMORY_CLIENT_XUSB_HOSTR &emc>,
+					<&mc TEGRA194_MEMORY_CLIENT_XUSB_HOSTW &emc>;
+			interconnect-names = "dma-mem", "write";
+			iommus = <&smmu TEGRA194_SID_XUSB_HOST>;
 			power-domains = <&bpmp TEGRA194_POWER_DOMAIN_XUSBC>,
 					<&bpmp TEGRA194_POWER_DOMAIN_XUSBA>;
 		 * for 8x and 11.025x sample rate streams.
 		 */
 		assigned-clock-rates = <258000000>;
+		interconnects = <&mc TEGRA194_MEMORY_CLIENT_APEDMAR &emc>,
+				<&mc TEGRA194_MEMORY_CLIENT_APEDMAW &emc>;
+		interconnect-names = "dma-mem", "write";
+		iommus = <&smmu TEGRA194_SID_APE>;
 	};
 	tcu: tcu {

arch/arm64/boot/dts/renesas/r9a07g044.dtsi+2−2

@@ -82,10 +82,10 @@ · 81 unmodified lines
82	<GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>;	82	<GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>;
83	interrupt-names = "eri", "rxi", "txi",	83	interrupt-names = "eri", "rxi", "txi",
84	"bri", "dri", "tei";	84	"bri", "dri", "tei";
85	clocks = <&cpg CPG_MOD R9A07G044_CLK_SCIF0>;	85	clocks = <&cpg CPG_MOD R9A07G044_SCIF0_CLK_PCK>;
86	clock-names = "fck";	86	clock-names = "fck";
87	power-domains = <&cpg>;	87	power-domains = <&cpg>;
88	resets = <&cpg R9A07G044_CLK_SCIF0>;	88	resets = <&cpg R9A07G044_SCIF0_RST_SYSTEM_N>;
89	status = "disabled";	89	status = "disabled";
90	};	90	};
91		91

arch/arm64/include/asm/cache.h+1−1

@@ -47,7 +47,7 @@ · 46 unmodified lines
47	* cache before the transfer is done, causing old data to be seen by	47	* cache before the transfer is done, causing old data to be seen by
48	* the CPU.	48	* the CPU.
49	*/	49	*/
50	#define ARCH_DMA_MINALIGN L1_CACHE_BYTES	50	#define ARCH_DMA_MINALIGN (128)
51		51
52	#ifdef CONFIG_KASAN_SW_TAGS	52	#ifdef CONFIG_KASAN_SW_TAGS
53	#define ARCH_SLAB_MINALIGN (1ULL << KASAN_SHADOW_SCALE_SHIFT)	53	#define ARCH_SLAB_MINALIGN (1ULL << KASAN_SHADOW_SCALE_SHIFT)

arch/arm64/include/asm/smp_plat.h+1−0

@@ -10,6 +10,7 @@ · 9 unmodified lines
10		10
11	#include <linux/cpumask.h>	11	#include <linux/cpumask.h>
12		12
		13	#include <asm/smp.h>
13	#include <asm/types.h>	14	#include <asm/types.h>
14		15
15	struct mpidr_hash {	16	struct mpidr_hash {

arch/arm64/kernel/Makefile+1−1

@@ -17,7 +17,7 @@ CFLAGS_syscall.o += -fno-stack-protector · 16 unmodified lines
17	# It's not safe to invoke KCOV when portions of the kernel environment aren't	17	# It's not safe to invoke KCOV when portions of the kernel environment aren't
18	# available or are out-of-sync with HW state. Since `noinstr` doesn't always	18	# available or are out-of-sync with HW state. Since `noinstr` doesn't always
19	# inhibit KCOV instrumentation, disable it for the entire compilation unit.	19	# inhibit KCOV instrumentation, disable it for the entire compilation unit.
20	KCOV_INSTRUMENT_entry.o := n	20	KCOV_INSTRUMENT_entry-common.o := n
21	KCOV_INSTRUMENT_idle.o := n	21	KCOV_INSTRUMENT_idle.o := n
22		22
23	# Object file lists.	23	# Object file lists.

arch/arm64/kernel/cpufeature.c+1−0

@@ -81,6 +81,7 @@ · 80 unmodified lines
81	#include <asm/mmu_context.h>	81	#include <asm/mmu_context.h>
82	#include <asm/mte.h>	82	#include <asm/mte.h>
83	#include <asm/processor.h>	83	#include <asm/processor.h>
		84	#include <asm/smp.h>
84	#include <asm/sysreg.h>	85	#include <asm/sysreg.h>
85	#include <asm/traps.h>	86	#include <asm/traps.h>
86	#include <asm/virt.h>	87	#include <asm/virt.h>

arch/arm64/kernel/entry-common.c+1−1

@@ -604,7 +604,7 @@ asmlinkage void noinstr el0t_64_fiq_handler(struct pt_regs *regs) · 603 unmodified lines
604	__el0_fiq_handler_common(regs);	604	__el0_fiq_handler_common(regs);
605	}	605	}
606		606
607	static void __el0_error_handler_common(struct pt_regs *regs)	607	static void noinstr __el0_error_handler_common(struct pt_regs *regs)
608	{	608	{
609	unsigned long esr = read_sysreg(esr_el1);	609	unsigned long esr = read_sysreg(esr_el1);
610		610

arch/arm64/kernel/mte.c+2−13

 }
 #endif
-static void update_gcr_el1_excl(u64 excl)
-{
-	/*
-	 * Note that the mask controlled by the user via prctl() is an
-	 * include while GCR_EL1 accepts an exclude mask.
-	 * No need for ISB since this only affects EL0 currently, implicit
-	 * with ERET.
-	 */
-	sysreg_clear_set_s(SYS_GCR_EL1, SYS_GCR_EL1_EXCL_MASK, excl);
-}
 static void set_gcr_el1_excl(u64 excl)
 {
 	current->thread.gcr_user_excl = excl;
 	if (!system_supports_mte())
 		return;
-	update_gcr_el1_excl(gcr_kernel_excl);
+	sysreg_clear_set_s(SYS_GCR_EL1, SYS_GCR_EL1_EXCL_MASK, gcr_kernel_excl);
+	isb();
 }
 long set_mte_ctrl(struct task_struct *task, unsigned long arg)

arch/arm64/kernel/smccc-call.S+6−3

 EXPORT_SYMBOL(__arm_smccc_sve_check)
 	.macro SMCCC instr
+	stp     x29, x30, [sp, #-16]!
+	mov	x29, sp
 alternative_if ARM64_SVE
 	bl	__arm_smccc_sve_check
 alternative_else_nop_endif
 	\instr	#0
-	ldr	x4, [sp]
+	ldr	x4, [sp, #16]
 	stp	x0, x1, [x4, #ARM_SMCCC_RES_X0_OFFS]
 	stp	x2, x3, [x4, #ARM_SMCCC_RES_X2_OFFS]
-	ldr	x4, [sp, #8]
+	ldr	x4, [sp, #24]
 	cbz	x4, 1f /* no quirk structure */
 	ldr	x9, [x4, #ARM_SMCCC_QUIRK_ID_OFFS]
 	cmp	x9, #ARM_SMCCC_QUIRK_QCOM_A6
 	b.ne	1f
 	str	x6, [x4, ARM_SMCCC_QUIRK_STATE_OFFS]
-1:	ret
+1:	ldp     x29, x30, [sp], #16
+	ret
 	.endm
 /*

arch/arm64/lib/copy_from_user.S+10−3

 	.endm
 	.macro ldrh1 reg, ptr, val
-	user_ldst 9998f, ldtrh, \reg, \ptr, \val
+	user_ldst 9997f, ldtrh, \reg, \ptr, \val
 	.endm
 	.macro strh1 reg, ptr, val
 	.endm
 	.macro ldr1 reg, ptr, val
-	user_ldst 9998f, ldtr, \reg, \ptr, \val
+	user_ldst 9997f, ldtr, \reg, \ptr, \val
 	.endm
 	.macro str1 reg, ptr, val
 	.endm
 	.macro ldp1 reg1, reg2, ptr, val
-	user_ldp 9998f, \reg1, \reg2, \ptr, \val
+	user_ldp 9997f, \reg1, \reg2, \ptr, \val
 	.endm
 	.macro stp1 reg1, reg2, ptr, val
 	.endm
 end	.req	x5
+srcin	.req	x15
 SYM_FUNC_START(__arch_copy_from_user)
 	add	end, x0, x2
+	mov	srcin, x1
 #include "copy_template.S"
 	mov	x0, #0				// Nothing to copy
 	ret
 	.section .fixup,"ax"
 	.align	2
+9997:	cmp	dst, dstin
+	b.ne	9998f
+	// Before being absolutely sure we couldn't copy anything, try harder
+USER(9998f, ldtrb tmp1w, [srcin])
+	strb	tmp1w, [dst], #1
 9998:	sub	x0, end, dst			// bytes not copied
 	ret
 	.previous

arch/arm64/lib/copy_in_user.S+14−7

@@ -30,33 +30,34 @@ · 29 unmodified lines
30	.endm	30	.endm
31		31
32	.macro ldrh1 reg, ptr, val	32	.macro ldrh1 reg, ptr, val
33	user_ldst 9998f, ldtrh, \reg, \ptr, \val	33	user_ldst 9997f, ldtrh, \reg, \ptr, \val
34	.endm	34	.endm
35		35
36	.macro strh1 reg, ptr, val	36	.macro strh1 reg, ptr, val
37	user_ldst 9998f, sttrh, \reg, \ptr, \val	37	user_ldst 9997f, sttrh, \reg, \ptr, \val
38	.endm	38	.endm
39		39
40	.macro ldr1 reg, ptr, val	40	.macro ldr1 reg, ptr, val
41	user_ldst 9998f, ldtr, \reg, \ptr, \val	41	user_ldst 9997f, ldtr, \reg, \ptr, \val
42	.endm	42	.endm
43		43
44	.macro str1 reg, ptr, val	44	.macro str1 reg, ptr, val
45	user_ldst 9998f, sttr, \reg, \ptr, \val	45	user_ldst 9997f, sttr, \reg, \ptr, \val
46	.endm	46	.endm
47		47
48	.macro ldp1 reg1, reg2, ptr, val	48	.macro ldp1 reg1, reg2, ptr, val
49	user_ldp 9998f, \reg1, \reg2, \ptr, \val	49	user_ldp 9997f, \reg1, \reg2, \ptr, \val
50	.endm	50	.endm
51		51
52	.macro stp1 reg1, reg2, ptr, val	52	.macro stp1 reg1, reg2, ptr, val
53	user_stp 9998f, \reg1, \reg2, \ptr, \val	53	user_stp 9997f, \reg1, \reg2, \ptr, \val
54	.endm	54	.endm
55		55
56	end .req x5	56	end .req x5
57		57	srcin .req x15
58	SYM_FUNC_START(__arch_copy_in_user)	58	SYM_FUNC_START(__arch_copy_in_user)
59	add end, x0, x2	59	add end, x0, x2
		60	mov srcin, x1
60	#include "copy_template.S"	61	#include "copy_template.S"
61	mov x0, #0	62	mov x0, #0
62	ret	63	ret
@@ -65,6 +66,12 @@ EXPORT_SYMBOL(__arch_copy_in_user) · 2 unmodified lines
65		66
66	.section .fixup,"ax"	67	.section .fixup,"ax"
67	.align 2	68	.align 2
		69	9997: cmp dst, dstin
		70	b.ne 9998f
		71	// Before being absolutely sure we couldn't copy anything, try harder
		72	USER(9998f, ldtrb tmp1w, [srcin])
		73	USER(9998f, sttrb tmp1w, [dst])
		74	add dst, dst, #1
68	9998: sub x0, end, dst // bytes not copied	75	9998: sub x0, end, dst // bytes not copied
69	ret	76	ret
70	.previous	77	.previous

arch/arm64/lib/copy_to_user.S+11−3

 	.endm
 	.macro strh1 reg, ptr, val
-	user_ldst 9998f, sttrh, \reg, \ptr, \val
+	user_ldst 9997f, sttrh, \reg, \ptr, \val
 	.endm
 	.macro ldr1 reg, ptr, val
 	.endm
 	.macro str1 reg, ptr, val
-	user_ldst 9998f, sttr, \reg, \ptr, \val
+	user_ldst 9997f, sttr, \reg, \ptr, \val
 	.endm
 	.macro ldp1 reg1, reg2, ptr, val
 	.endm
 	.macro stp1 reg1, reg2, ptr, val
-	user_stp 9998f, \reg1, \reg2, \ptr, \val
+	user_stp 9997f, \reg1, \reg2, \ptr, \val
 	.endm
 end	.req	x5
+srcin	.req	x15
 SYM_FUNC_START(__arch_copy_to_user)
 	add	end, x0, x2
+	mov	srcin, x1
 #include "copy_template.S"
 	mov	x0, #0
 	ret
 	.section .fixup,"ax"
 	.align	2
+9997:	cmp	dst, dstin
+	b.ne	9998f
+	// Before being absolutely sure we couldn't copy anything, try harder
+	ldrb	tmp1w, [srcin]
+USER(9998f, sttrb tmp1w, [dst])
+	add	dst, dst, #1
 9998:	sub	x0, end, dst			// bytes not copied
 	ret
 	.previous

arch/arm64/lib/strlen.S+10−0

 #include <linux/linkage.h>
 #include <asm/assembler.h>
+#include <asm/mte-def.h>
 /* Assumptions:
  *
 #define REP8_7f 0x7f7f7f7f7f7f7f7f
 #define REP8_80 0x8080808080808080
+/*
+ * When KASAN_HW_TAGS is in use, memory is checked at MTE_GRANULE_SIZE
+ * (16-byte) granularity, and we must ensure that no access straddles this
+ * alignment boundary.
+ */
+#ifdef CONFIG_KASAN_HW_TAGS
+#define MIN_PAGE_SIZE MTE_GRANULE_SIZE
+#else
 #define MIN_PAGE_SIZE 4096
+#endif
 	/* Since strings are short on average, we check the first 16 bytes
 	   of the string for a NUL character.  In order to do an unaligned ldp

arch/arm64/mm/mmu.c+8−12

 	return dt_virt;
 }
-#if CONFIG_PGTABLE_LEVELS > 3
 int pud_set_huge(pud_t *pudp, phys_addr_t phys, pgprot_t prot)
 {
 	pud_t new_pud = pfn_pud(__phys_to_pfn(phys), mk_pud_sect_prot(prot));
 	return 1;
 }
-int pud_clear_huge(pud_t *pudp)
-{
-	if (!pud_sect(READ_ONCE(*pudp)))
-		return 0;
-	pud_clear(pudp);
-	return 1;
-}
-#endif
-#if CONFIG_PGTABLE_LEVELS > 2
 int pmd_set_huge(pmd_t *pmdp, phys_addr_t phys, pgprot_t prot)
 {
 	pmd_t new_pmd = pfn_pmd(__phys_to_pfn(phys), mk_pmd_sect_prot(prot));
 	return 1;
 }
+int pud_clear_huge(pud_t *pudp)
+{
+	if (!pud_sect(READ_ONCE(*pudp)))
+		return 0;
+	pud_clear(pudp);
+	return 1;
+}
 int pmd_clear_huge(pmd_t *pmdp)
 {
 	if (!pmd_sect(READ_ONCE(*pmdp)))
 	pmd_clear(pmdp);
 	return 1;
 }
-#endif
 int pmd_free_pte_page(pmd_t *pmdp, unsigned long addr)
 {

arch/mips/include/asm/fpu.h+1−1

@@ -76,7 +76,7 @@ static inline int __enable_fpu(enum fpu_mode mode) · 75 unmodified lines
76	/* we only have a 32-bit FPU */	76	/* we only have a 32-bit FPU */
77	return SIGFPE;	77	return SIGFPE;
78	#endif	78	#endif
79	fallthrough;	79	/* fallthrough */
80	case FPU_32BIT:	80	case FPU_32BIT:
81	if (cpu_has_fre) {	81	if (cpu_has_fre) {
82	/* clear FRE */	82	/* clear FRE */

arch/mips/mm/tlbex.c+2−0

 	switch (boot_cpu_type()) {
 	default:
 		if (sizeof(long) == 4) {
+		fallthrough;
 	case CPU_LOONGSON2EF:
 		/* Loongson2 ebase is different than r4k, we have more space */
 			if ((p - tlb_handler) > 64)
 		default:
 			if (cpu_has_mips_r2_exec_hazard) {
 				uasm_i_ehb(&p);
+			fallthrough;
 		case CPU_CAVIUM_OCTEON:
 		case CPU_CAVIUM_OCTEON_PLUS:

arch/powerpc/mm/nohash/8xx.c+10−0

@@ -240,3 +240,13 @@ void __init setup_kuap(bool disabled) · 239 unmodified lines
240	mtspr(SPRN_MD_AP, MD_APG_KUAP);	240	mtspr(SPRN_MD_AP, MD_APG_KUAP);
241	}	241	}
242	#endif	242	#endif
		243
		244	int pud_clear_huge(pud_t *pud)
		245	{
		246	return 0;
		247	}
		248
		249	int pmd_clear_huge(pmd_t *pmd)
		250	{
		251	return 0;
		252	}

arch/powerpc/platforms/powermac/smp.c+1−0

@@ -146,6 +146,7 @@ static inline void psurge_clr_ipi(int cpu) · 145 unmodified lines
146	switch(psurge_type) {	146	switch(psurge_type) {
147	case PSURGE_DUAL:	147	case PSURGE_DUAL:
148	out_8(psurge_sec_intr, ~0);	148	out_8(psurge_sec_intr, ~0);
		149	break;
149	case PSURGE_NONE:	150	case PSURGE_NONE:
150	break;	151	break;
151	default:	152	default:

arch/s390/boot/text_dma.S+4−15

 #include <asm/errno.h>
 #include <asm/sigp.h>
-#ifdef CC_USING_EXPOLINE
-	.pushsection .dma.text.__s390_indirect_jump_r14,"axG"
-__dma__s390_indirect_jump_r14:
-	larl	%r1,0f
-	ex	0,0(%r1)
-	j	.
-0:	br	%r14
-	.popsection
-#endif
 	.section .dma.text,"ax"
 /*
  * Simplified version of expoline thunk. The normal thunks can not be used here,
  * affects a few functions that are not performance-relevant.
  */
 	.macro BR_EX_DMA_r14
-#ifdef CC_USING_EXPOLINE
+	larl	%r1,0f
-	jg	__dma__s390_indirect_jump_r14
+	ex	0,0(%r1)
-#else
+	j	.
-	br	%r14
+0:	br	%r14
-#endif
 	.endm
 /*

arch/s390/configs/debug_defconfig+18−9

 CONFIG_AUDIT=y
 CONFIG_NO_HZ_IDLE=y
 CONFIG_HIGH_RES_TIMERS=y
+CONFIG_BPF_SYSCALL=y
+CONFIG_BPF_JIT=y
+CONFIG_BPF_JIT_ALWAYS_ON=y
+CONFIG_BPF_LSM=y
 CONFIG_PREEMPT=y
+CONFIG_SCHED_CORE=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_BSD_PROCESS_ACCT_V3=y
 CONFIG_TASKSTATS=y
 CONFIG_CGROUP_CPUACCT=y
 CONFIG_CGROUP_PERF=y
 CONFIG_CGROUP_BPF=y
+CONFIG_CGROUP_MISC=y
 CONFIG_NAMESPACES=y
 CONFIG_USER_NS=y
 CONFIG_CHECKPOINT_RESTORE=y
 CONFIG_SCHED_AUTOGROUP=y
 CONFIG_EXPERT=y
 # CONFIG_SYSFS_SYSCALL is not set
-CONFIG_BPF_LSM=y
-CONFIG_BPF_SYSCALL=y
 CONFIG_USERFAULTFD=y
 # CONFIG_COMPAT_BRK is not set
 CONFIG_PROFILING=y
 CONFIG_BLK_WBT=y
 CONFIG_BLK_CGROUP_IOLATENCY=y
 CONFIG_BLK_CGROUP_IOCOST=y
+CONFIG_BLK_CGROUP_IOPRIO=y
 CONFIG_BLK_INLINE_ENCRYPTION=y
 CONFIG_BLK_INLINE_ENCRYPTION_FALLBACK=y
 CONFIG_PARTITION_ADVANCED=y
 CONFIG_FRONTSWAP=y
 CONFIG_CMA_DEBUG=y
 CONFIG_CMA_DEBUGFS=y
+CONFIG_CMA_SYSFS=y
 CONFIG_CMA_AREAS=7
 CONFIG_MEM_SOFT_DIRTY=y
 CONFIG_ZSWAP=y
 CONFIG_MPTCP=y
 CONFIG_NETFILTER=y
 CONFIG_BRIDGE_NETFILTER=m
+CONFIG_NETFILTER_NETLINK_HOOK=m
 CONFIG_NF_CONNTRACK=m
 CONFIG_NF_CONNTRACK_SECMARK=y
 CONFIG_NF_CONNTRACK_EVENTS=y
 CONFIG_IP_VS_PE_SIP=m
 CONFIG_NFT_FIB_IPV4=m
 CONFIG_NF_TABLES_ARP=y
+CONFIG_NF_LOG_IPV4=m
 CONFIG_IP_NF_IPTABLES=m
 CONFIG_IP_NF_MATCH_AH=m
 CONFIG_IP_NF_MATCH_ECN=m
 CONFIG_VIRTIO_VSOCKETS=m
 CONFIG_NETLINK_DIAG=m
 CONFIG_CGROUP_NET_PRIO=y
-CONFIG_BPF_JIT=y
 CONFIG_NET_PKTGEN=m
 CONFIG_PCI=y
-CONFIG_PCI_IOV=y
 # CONFIG_PCIEASPM is not set
 CONFIG_PCI_DEBUG=y
+CONFIG_PCI_IOV=y
 CONFIG_HOTPLUG_PCI=y
 CONFIG_HOTPLUG_PCI_S390=y
 CONFIG_DEVTMPFS=y
 CONFIG_MD_FAULTY=m
 CONFIG_MD_CLUSTER=m
 CONFIG_BCACHE=m
-CONFIG_BLK_DEV_DM=m
+CONFIG_BLK_DEV_DM=y
 CONFIG_DM_UNSTRIPED=m
 CONFIG_DM_CRYPT=m
 CONFIG_DM_SNAPSHOT=m
 CONFIG_DM_MULTIPATH_HST=m
 CONFIG_DM_MULTIPATH_IOA=m
 CONFIG_DM_DELAY=m
+CONFIG_DM_INIT=y
 CONFIG_DM_UEVENT=y
 CONFIG_DM_FLAKEY=m
 CONFIG_DM_VERITY=m
 # CONFIG_NET_VENDOR_GOOGLE is not set
 # CONFIG_NET_VENDOR_HUAWEI is not set
 # CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MICROSOFT is not set
 # CONFIG_NET_VENDOR_MARVELL is not set
 CONFIG_MLX4_EN=m
 CONFIG_MLX5_CORE=m
 CONFIG_LEGACY_PTY_COUNT=0
 CONFIG_VIRTIO_CONSOLE=m
 CONFIG_HW_RANDOM_VIRTIO=m
-CONFIG_RAW_DRIVER=m
 CONFIG_HANGCHECK_TIMER=m
 CONFIG_TN3270_FS=y
 CONFIG_PPS=m
 CONFIG_VFIO=m
 CONFIG_VFIO_PCI=m
 CONFIG_VFIO_MDEV=m
-CONFIG_VFIO_MDEV_DEVICE=m
 CONFIG_VIRTIO_PCI=m
 CONFIG_VIRTIO_BALLOON=m
 CONFIG_VIRTIO_INPUT=y
 CONFIG_CUSE=m
 CONFIG_VIRTIO_FS=m
 CONFIG_OVERLAY_FS=m
+CONFIG_NETFS_STATS=y
 CONFIG_FSCACHE=m
 CONFIG_CACHEFILES=m
 CONFIG_ISO9660_FS=y
 CONFIG_NFSD_V4=y
 CONFIG_NFSD_V4_SECURITY_LABEL=y
 CONFIG_CIFS=m
-CONFIG_CIFS_STATS2=y
 CONFIG_CIFS_WEAK_PW_HASH=y
 CONFIG_CIFS_UPCALL=y
 CONFIG_CIFS_XATTR=y
 CONFIG_SECURITY_SELINUX_DISABLE=y
 CONFIG_SECURITY_LOCKDOWN_LSM=y
 CONFIG_SECURITY_LOCKDOWN_LSM_EARLY=y
+CONFIG_SECURITY_LANDLOCK=y
 CONFIG_INTEGRITY_SIGNATURE=y
 CONFIG_INTEGRITY_ASYMMETRIC_KEYS=y
 CONFIG_IMA=y
 CONFIG_CRYPTO_TEST=m
 CONFIG_CRYPTO_DH=m
 CONFIG_CRYPTO_ECDH=m
+CONFIG_CRYPTO_ECDSA=m
 CONFIG_CRYPTO_ECRDSA=m
 CONFIG_CRYPTO_SM2=m
 CONFIG_CRYPTO_CURVE25519=m
 CONFIG_FAIL_FUNCTION=y
 CONFIG_FAULT_INJECTION_STACKTRACE_FILTER=y
 CONFIG_LKDTM=m
-CONFIG_TEST_LIST_SORT=y
 CONFIG_TEST_MIN_HEAP=y
 CONFIG_TEST_SORT=y
 CONFIG_KPROBES_SANITY_TEST=y
 CONFIG_ATOMIC64_SELFTEST=y
 CONFIG_TEST_BITOPS=m
 CONFIG_TEST_BPF=m
+CONFIG_TEST_LIVEPATCH=m

arch/s390/configs/defconfig+19−8

 CONFIG_AUDIT=y
 CONFIG_NO_HZ_IDLE=y
 CONFIG_HIGH_RES_TIMERS=y
+CONFIG_BPF_SYSCALL=y
+CONFIG_BPF_JIT=y
+CONFIG_BPF_JIT_ALWAYS_ON=y
+CONFIG_BPF_LSM=y
+CONFIG_SCHED_CORE=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_BSD_PROCESS_ACCT_V3=y
 CONFIG_TASKSTATS=y
 CONFIG_CGROUP_CPUACCT=y
 CONFIG_CGROUP_PERF=y
 CONFIG_CGROUP_BPF=y
+CONFIG_CGROUP_MISC=y
 CONFIG_NAMESPACES=y
 CONFIG_USER_NS=y
 CONFIG_CHECKPOINT_RESTORE=y
 CONFIG_SCHED_AUTOGROUP=y
 CONFIG_EXPERT=y
 # CONFIG_SYSFS_SYSCALL is not set
-CONFIG_BPF_LSM=y
-CONFIG_BPF_SYSCALL=y
 CONFIG_USERFAULTFD=y
 # CONFIG_COMPAT_BRK is not set
 CONFIG_PROFILING=y
 CONFIG_BLK_WBT=y
 CONFIG_BLK_CGROUP_IOLATENCY=y
 CONFIG_BLK_CGROUP_IOCOST=y
+CONFIG_BLK_CGROUP_IOPRIO=y
 CONFIG_BLK_INLINE_ENCRYPTION=y
 CONFIG_BLK_INLINE_ENCRYPTION_FALLBACK=y
 CONFIG_PARTITION_ADVANCED=y
 CONFIG_TRANSPARENT_HUGEPAGE=y
 CONFIG_CLEANCACHE=y
 CONFIG_FRONTSWAP=y
+CONFIG_CMA_SYSFS=y
 CONFIG_CMA_AREAS=7
 CONFIG_MEM_SOFT_DIRTY=y
 CONFIG_ZSWAP=y
 CONFIG_MPTCP=y
 CONFIG_NETFILTER=y
 CONFIG_BRIDGE_NETFILTER=m
+CONFIG_NETFILTER_NETLINK_HOOK=m
 CONFIG_NF_CONNTRACK=m
 CONFIG_NF_CONNTRACK_SECMARK=y
 CONFIG_NF_CONNTRACK_EVENTS=y
 CONFIG_IP_VS_PE_SIP=m
 CONFIG_NFT_FIB_IPV4=m
 CONFIG_NF_TABLES_ARP=y
+CONFIG_NF_LOG_IPV4=m
 CONFIG_IP_NF_IPTABLES=m
 CONFIG_IP_NF_MATCH_AH=m
 CONFIG_IP_NF_MATCH_ECN=m
 CONFIG_VIRTIO_VSOCKETS=m
 CONFIG_NETLINK_DIAG=m
 CONFIG_CGROUP_NET_PRIO=y
-CONFIG_BPF_JIT=y
 CONFIG_NET_PKTGEN=m
 CONFIG_PCI=y
-CONFIG_PCI_IOV=y
 # CONFIG_PCIEASPM is not set
+CONFIG_PCI_IOV=y
 CONFIG_HOTPLUG_PCI=y
 CONFIG_HOTPLUG_PCI_S390=y
 CONFIG_UEVENT_HELPER=y
 CONFIG_MD_FAULTY=m
 CONFIG_MD_CLUSTER=m
 CONFIG_BCACHE=m
-CONFIG_BLK_DEV_DM=m
+CONFIG_BLK_DEV_DM=y
 CONFIG_DM_UNSTRIPED=m
 CONFIG_DM_CRYPT=m
 CONFIG_DM_SNAPSHOT=m
 CONFIG_DM_MULTIPATH_HST=m
 CONFIG_DM_MULTIPATH_IOA=m
 CONFIG_DM_DELAY=m
+CONFIG_DM_INIT=y
 CONFIG_DM_UEVENT=y
 CONFIG_DM_FLAKEY=m
 CONFIG_DM_VERITY=m
 # CONFIG_NET_VENDOR_GOOGLE is not set
 # CONFIG_NET_VENDOR_HUAWEI is not set
 # CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MICROSOFT is not set
 # CONFIG_NET_VENDOR_MARVELL is not set
 CONFIG_MLX4_EN=m
 CONFIG_MLX5_CORE=m
 CONFIG_LEGACY_PTY_COUNT=0
 CONFIG_VIRTIO_CONSOLE=m
 CONFIG_HW_RANDOM_VIRTIO=m
-CONFIG_RAW_DRIVER=m
 CONFIG_HANGCHECK_TIMER=m
 CONFIG_TN3270_FS=y
 # CONFIG_PTP_1588_CLOCK is not set
 CONFIG_VFIO=m
 CONFIG_VFIO_PCI=m
 CONFIG_VFIO_MDEV=m
-CONFIG_VFIO_MDEV_DEVICE=m
 CONFIG_VIRTIO_PCI=m
 CONFIG_VIRTIO_BALLOON=m
 CONFIG_VIRTIO_INPUT=y
 CONFIG_CUSE=m
 CONFIG_VIRTIO_FS=m
 CONFIG_OVERLAY_FS=m
+CONFIG_NETFS_STATS=y
 CONFIG_FSCACHE=m
 CONFIG_CACHEFILES=m
 CONFIG_ISO9660_FS=y
 CONFIG_NFSD_V4=y
 CONFIG_NFSD_V4_SECURITY_LABEL=y
 CONFIG_CIFS=m
-CONFIG_CIFS_STATS2=y
 CONFIG_CIFS_WEAK_PW_HASH=y
 CONFIG_CIFS_UPCALL=y
 CONFIG_CIFS_XATTR=y
 CONFIG_SECURITY_SELINUX_DISABLE=y
 CONFIG_SECURITY_LOCKDOWN_LSM=y
 CONFIG_SECURITY_LOCKDOWN_LSM_EARLY=y
+CONFIG_SECURITY_LANDLOCK=y
 CONFIG_INTEGRITY_SIGNATURE=y
 CONFIG_INTEGRITY_ASYMMETRIC_KEYS=y
 CONFIG_IMA=y
 CONFIG_CRYPTO_TEST=m
 CONFIG_CRYPTO_DH=m
 CONFIG_CRYPTO_ECDH=m
+CONFIG_CRYPTO_ECDSA=m
 CONFIG_CRYPTO_ECRDSA=m
 CONFIG_CRYPTO_SM2=m
 CONFIG_CRYPTO_CURVE25519=m
 CONFIG_DMA_CMA=y
 CONFIG_CMA_SIZE_MBYTES=0
 CONFIG_PRINTK_TIME=y
+CONFIG_DYNAMIC_DEBUG=y
 CONFIG_DEBUG_INFO=y
 CONFIG_DEBUG_INFO_DWARF4=y
 CONFIG_GDB_SCRIPTS=y
 CONFIG_PERCPU_TEST=m
 CONFIG_ATOMIC64_SELFTEST=y
 CONFIG_TEST_BPF=m
+CONFIG_TEST_LIVEPATCH=m

arch/s390/configs/zfcpdump_defconfig+1−2

 # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
 # CONFIG_COMPACTION is not set
 # CONFIG_MIGRATION is not set
-# CONFIG_BOUNCE is not set
 CONFIG_NET=y
 # CONFIG_IUCV is not set
+# CONFIG_PCPU_DEV_REFCNT is not set
 # CONFIG_ETHTOOL_NETLINK is not set
 CONFIG_DEVTMPFS=y
 CONFIG_BLK_DEV_RAM=y
 # CONFIG_SERIO is not set
 # CONFIG_HVC_IUCV is not set
 # CONFIG_HW_RANDOM_S390 is not set
-CONFIG_RAW_DRIVER=y
 # CONFIG_HMC_DRV is not set
 # CONFIG_S390_TAPE is not set
 # CONFIG_VMCP is not set

arch/s390/include/asm/ftrace.h+1−0

@@ -19,6 +19,7 @@ void ftrace_caller(void); · 18 unmodified lines
19		19
20	extern char ftrace_graph_caller_end;	20	extern char ftrace_graph_caller_end;
21	extern unsigned long ftrace_plt;	21	extern unsigned long ftrace_plt;
		22	extern void *ftrace_func;
22		23
23	struct dyn_arch_ftrace { };	24	struct dyn_arch_ftrace { };
24		25

arch/s390/kernel/ftrace.c+2−0

  * trampoline (ftrace_plt), which clobbers also r1.
  */
+void *ftrace_func __read_mostly = ftrace_stub;
 unsigned long ftrace_plt;
 int ftrace_modify_call(struct dyn_ftrace *rec, unsigned long old_addr,
 int ftrace_update_ftrace_func(ftrace_func_t func)
 {
+	ftrace_func = func;
 	return 0;
 }

arch/s390/kernel/mcount.S+2−2

@@ -59,13 +59,13 @@ ENTRY(ftrace_caller) · 58 unmodified lines
59	#ifdef CONFIG_HAVE_MARCH_Z196_FEATURES	59	#ifdef CONFIG_HAVE_MARCH_Z196_FEATURES
60	aghik %r2,%r0,-MCOUNT_INSN_SIZE	60	aghik %r2,%r0,-MCOUNT_INSN_SIZE
61	lgrl %r4,function_trace_op	61	lgrl %r4,function_trace_op
62	lgrl %r1,ftrace_trace_function	62	lgrl %r1,ftrace_func
63	#else	63	#else
64	lgr %r2,%r0	64	lgr %r2,%r0
65	aghi %r2,-MCOUNT_INSN_SIZE	65	aghi %r2,-MCOUNT_INSN_SIZE
66	larl %r4,function_trace_op	66	larl %r4,function_trace_op
67	lg %r4,0(%r4)	67	lg %r4,0(%r4)
68	larl %r1,ftrace_trace_function	68	larl %r1,ftrace_func
69	lg %r1,0(%r1)	69	lg %r1,0(%r1)
70	#endif	70	#endif
71	lgr %r3,%r14	71	lgr %r3,%r14

arch/s390/kernel/perf_cpum_cf.c+1−1

@@ -745,7 +745,7 @@ static int __init cpumf_pmu_init(void) · 744 unmodified lines
745	if (!cf_dbg) {	745	if (!cf_dbg) {
746	pr_err("Registration of s390dbf(cpum_cf) failed\n");	746	pr_err("Registration of s390dbf(cpum_cf) failed\n");
747	return -ENOMEM;	747	return -ENOMEM;
748	};	748	}
749	debug_register_view(cf_dbg, &debug_sprintf_view);	749	debug_register_view(cf_dbg, &debug_sprintf_view);
750		750
751	cpumf_pmu.attr_groups = cpumf_cf_event_group();	751	cpumf_pmu.attr_groups = cpumf_cf_event_group();

arch/s390/kernel/uprobes.c+1−0

@@ -126,6 +126,7 @@ int arch_uprobe_exception_notify(struct notifier_block *self, unsigned long val, · 125 unmodified lines
126	case DIE_SSTEP:	126	case DIE_SSTEP:
127	if (uprobe_post_sstep_notifier(regs))	127	if (uprobe_post_sstep_notifier(regs))
128	return NOTIFY_STOP;	128	return NOTIFY_STOP;
		129	break;
129	default:	130	default:
130	break;	131	break;
131	}	132	}

arch/s390/kernel/vdso32/Makefile+1−0

@@ -29,6 +29,7 @@ $(targets:%=$(obj)/%.dbg): KBUILD_CFLAGS = $(KBUILD_CFLAGS_32) · 28 unmodified lines
29	$(targets:%=$(obj)/%.dbg): KBUILD_AFLAGS = $(KBUILD_AFLAGS_32)	29	$(targets:%=$(obj)/%.dbg): KBUILD_AFLAGS = $(KBUILD_AFLAGS_32)
30		30
31	obj-y += vdso32_wrapper.o	31	obj-y += vdso32_wrapper.o
		32	targets += vdso32.lds
32	CPPFLAGS_vdso32.lds += -P -C -U$(ARCH)	33	CPPFLAGS_vdso32.lds += -P -C -U$(ARCH)
33		34
34	# Disable gcov profiling, ubsan and kasan for VDSO code	35	# Disable gcov profiling, ubsan and kasan for VDSO code

arch/s390/net/bpf_jit_comp.c+1−1

@@ -112,7 +112,7 @@ static inline void reg_set_seen(struct bpf_jit *jit, u32 b1) · 111 unmodified lines
112	{	112	{
113	u32 r1 = reg2hex[b1];	113	u32 r1 = reg2hex[b1];
114		114
115	if (!jit->seen_reg[r1] && r1 >= 6 && r1 <= 15)	115	if (r1 >= 6 && r1 <= 15 && !jit->seen_reg[r1])
116	jit->seen_reg[r1] = 1;	116	jit->seen_reg[r1] = 1;
117	}	117	}
118		118

arch/x86/kernel/cpu/mshyperv.c+1−1

@@ -237,7 +237,7 @@ static void __init hv_smp_prepare_cpus(unsigned int max_cpus) · 236 unmodified lines
237	for_each_present_cpu(i) {	237	for_each_present_cpu(i) {
238	if (i == 0)	238	if (i == 0)
239	continue;	239	continue;
240	ret = hv_call_add_logical_proc(numa_cpu_node(i), i, i);	240	ret = hv_call_add_logical_proc(numa_cpu_node(i), i, cpu_physical_id(i));
241	BUG_ON(ret);	241	BUG_ON(ret);
242	}	242	}
243		243

arch/x86/kvm/cpuid.c+25−5

 		edx.split.num_counters_fixed = min(cap.num_counters_fixed, MAX_FIXED_COUNTERS);
 		edx.split.bit_width_fixed = cap.bit_width_fixed;
-		edx.split.anythread_deprecated = 1;
+		if (cap.version)
+			edx.split.anythread_deprecated = 1;
 		edx.split.reserved1 = 0;
 		edx.split.reserved2 = 0;
 		unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
 		unsigned phys_as = entry->eax & 0xff;
-		if (!g_phys_as)
+		/*
+		 * If TDP (NPT) is disabled use the adjusted host MAXPHYADDR as
+		 * the guest operates in the same PA space as the host, i.e.
+		 * reductions in MAXPHYADDR for memory encryption affect shadow
+		 * paging, too.
+		 *
+		 * If TDP is enabled but an explicit guest MAXPHYADDR is not
+		 * provided, use the raw bare metal MAXPHYADDR as reductions to
+		 * the HPAs do not affect GPAs.
+		 */
+		if (!tdp_enabled)
+			g_phys_as = boot_cpu_data.x86_phys_bits;
+		else if (!g_phys_as)
 			g_phys_as = phys_as;
 		entry->eax = g_phys_as | (virt_as << 8);
 		entry->edx = 0;
 		cpuid_entry_override(entry, CPUID_8000_0008_EBX);
 	case 0x8000001a:
 	case 0x8000001e:
 		break;
-	/* Support memory encryption cpuid if host supports it */
 	case 0x8000001F:
-		if (!kvm_cpu_cap_has(X86_FEATURE_SEV))
+		if (!kvm_cpu_cap_has(X86_FEATURE_SEV)) {
 			entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
-		else
+		} else {
 			cpuid_entry_override(entry, CPUID_8000_001F_EAX);
+			/*
+			 * Enumerate '0' for "PA bits reduction", the adjusted
+			 * MAXPHYADDR is enumerated directly (see 0x80000008).
+			 */
+			entry->ebx &= ~GENMASK(11, 6);
+		}
 		break;
 	/*Add support for Centaur's CPUID instruction*/
 	case 0xC0000000:

arch/x86/kvm/mmu/mmu.c+2−0

@@ -53,6 +53,8 @@ · 52 unmodified lines
53	#include <asm/kvm_page_track.h>	53	#include <asm/kvm_page_track.h>
54	#include "trace.h"	54	#include "trace.h"
55		55
		56	#include "paging.h"
		57
56	extern bool itlb_multihit_kvm_mitigation;	58	extern bool itlb_multihit_kvm_mitigation;
57		59
58	int __read_mostly nx_huge_pages = -1;	60	int __read_mostly nx_huge_pages = -1;

arch/x86/kvm/mmu/paging.h+14−0

@@ -0,0 +1,14 @@
	1	/* SPDX-License-Identifier: GPL-2.0-only */
	2	/* Shadow paging constants/helpers that don't need to be #undef'd. */
	3	#ifndef __KVM_X86_PAGING_H
	4	#define __KVM_X86_PAGING_H
	5
	6	#define GUEST_PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
	7	#define PT64_LVL_ADDR_MASK(level) \
	8	(GUEST_PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
	9	* PT64_LEVEL_BITS))) - 1))
	10	#define PT64_LVL_OFFSET_MASK(level) \
	11	(GUEST_PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
	12	* PT64_LEVEL_BITS))) - 1))
	13	#endif /* __KVM_X86_PAGING_H */
	14

arch/x86/kvm/mmu/paging_tmpl.h+2−2

arch/x86/kvm/mmu/spte.h+0−6

 #else
 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
 #endif
-#define PT64_LVL_ADDR_MASK(level) \
-	(PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
-						* PT64_LEVEL_BITS))) - 1))
-#define PT64_LVL_OFFSET_MASK(level) \
-	(PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
-						* PT64_LEVEL_BITS))) - 1))
 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | shadow_user_mask \
 			| shadow_x_mask | shadow_nx_mask | shadow_me_mask)

arch/x86/kvm/svm/nested.c+33−20

 	for (i = 0; i < MAX_INTERCEPT; i++)
 		c->intercepts[i] |= g->intercepts[i];
+	/* If SMI is not intercepted, ignore guest SMI intercept as well  */
+	if (!intercept_smi)
+		vmcb_clr_intercept(c, INTERCEPT_SMI);
 }
 static void copy_vmcb_control_area(struct vmcb_control_area *dst,
 	return true;
 }
-static void nested_load_control_from_vmcb12(struct vcpu_svm *svm,
+void nested_load_control_from_vmcb12(struct vcpu_svm *svm,
-					    struct vmcb_control_area *control)
+				     struct vmcb_control_area *control)
 {
 	copy_vmcb_control_area(&svm->nested.ctl, control);
 	struct kvm_host_map map;
 	u64 vmcb12_gpa;
+	if (!svm->nested.hsave_msr) {
+		kvm_inject_gp(vcpu, 0);
+		return 1;
+	}
 	if (is_smm(vcpu)) {
 		kvm_queue_exception(vcpu, UD_VECTOR);
 		return 1;
 	return ret;
 }
+/* Copy state save area fields which are handled by VMRUN */
+void svm_copy_vmrun_state(struct vmcb_save_area *from_save,
+			  struct vmcb_save_area *to_save)
+{
+	to_save->es = from_save->es;
+	to_save->cs = from_save->cs;
+	to_save->ss = from_save->ss;
+	to_save->ds = from_save->ds;
+	to_save->gdtr = from_save->gdtr;
+	to_save->idtr = from_save->idtr;
+	to_save->rflags = from_save->rflags | X86_EFLAGS_FIXED;
+	to_save->efer = from_save->efer;
+	to_save->cr0 = from_save->cr0;
+	to_save->cr3 = from_save->cr3;
+	to_save->cr4 = from_save->cr4;
+	to_save->rax = from_save->rax;
+	to_save->rsp = from_save->rsp;
+	to_save->rip = from_save->rip;
+	to_save->cpl = 0;
+}
 void nested_svm_vmloadsave(struct vmcb *from_vmcb, struct vmcb *to_vmcb)
 {
 	to_vmcb->save.fs = from_vmcb->save.fs;
 	svm->nested.vmcb12_gpa = kvm_state->hdr.svm.vmcb_pa;
-	svm->vmcb01.ptr->save.es = save->es;
+	svm_copy_vmrun_state(save, &svm->vmcb01.ptr->save);
-	svm->vmcb01.ptr->save.cs = save->cs;
-	svm->vmcb01.ptr->save.ss = save->ss;
-	svm->vmcb01.ptr->save.ds = save->ds;
-	svm->vmcb01.ptr->save.gdtr = save->gdtr;
-	svm->vmcb01.ptr->save.idtr = save->idtr;
-	svm->vmcb01.ptr->save.rflags = save->rflags | X86_EFLAGS_FIXED;
-	svm->vmcb01.ptr->save.efer = save->efer;
-	svm->vmcb01.ptr->save.cr0 = save->cr0;
-	svm->vmcb01.ptr->save.cr3 = save->cr3;
-	svm->vmcb01.ptr->save.cr4 = save->cr4;
-	svm->vmcb01.ptr->save.rax = save->rax;
-	svm->vmcb01.ptr->save.rsp = save->rsp;
-	svm->vmcb01.ptr->save.rip = save->rip;
-	svm->vmcb01.ptr->save.cpl = 0;
 	nested_load_control_from_vmcb12(svm, ctl);
 	svm_switch_vmcb(svm, &svm->nested.vmcb02);
 	nested_vmcb02_prepare_control(svm);
 	kvm_make_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu);
 	ret = 0;
 out_free:

arch/x86/kvm/svm/sev.c+8−6

 	/* Pin guest memory */
 	guest_page = sev_pin_memory(kvm, params.guest_uaddr & PAGE_MASK,
 				    PAGE_SIZE, &n, 0);
-	if (!guest_page)
+	if (IS_ERR(guest_page))
-		return -EFAULT;
+		return PTR_ERR(guest_page);
 	/* allocate memory for header and transport buffer */
 	ret = -ENOMEM;
 	}
 	/* Copy packet header to userspace. */
-	ret = copy_to_user((void __user *)(uintptr_t)params.hdr_uaddr, hdr,
+	if (copy_to_user((void __user *)(uintptr_t)params.hdr_uaddr, hdr,
-				params.hdr_len);
+			 params.hdr_len))
+		ret = -EFAULT;
 e_free_trans_data:
 	kfree(trans_data);
 	data.trans_len = params.trans_len;
 	/* Pin guest memory */
-	ret = -EFAULT;
 	guest_page = sev_pin_memory(kvm, params.guest_uaddr & PAGE_MASK,
 				    PAGE_SIZE, &n, 0);
-	if (!guest_page)
+	if (IS_ERR(guest_page)) {
+		ret = PTR_ERR(guest_page);
 		goto e_free_trans;
+	}
 	/* The RECEIVE_UPDATE_DATA command requires C-bit to be always set. */
 	data.guest_address = (page_to_pfn(guest_page[0]) << PAGE_SHIFT) + offset;

arch/x86/kvm/svm/svm.c+70−7

@@ -198,6 +198,11 @@ module_param(avic, bool, 0444); · 197 unmodified lines
198	bool __read_mostly dump_invalid_vmcb;	198	bool __read_mostly dump_invalid_vmcb;
199	module_param(dump_invalid_vmcb, bool, 0644);	199	module_param(dump_invalid_vmcb, bool, 0644);
200		200
		201
		202	bool intercept_smi = true;
		203	module_param(intercept_smi, bool, 0444);
		204
		205
201	static bool svm_gp_erratum_intercept = true;	206	static bool svm_gp_erratum_intercept = true;
202		207
203	static u8 rsm_ins_bytes[] = "\x0f\xaa";	208	static u8 rsm_ins_bytes[] = "\x0f\xaa";
@@ -1185,7 +1190,10 @@ static void init_vmcb(struct kvm_vcpu *vcpu) · 981 unmodified lines
1185		1190
1186	svm_set_intercept(svm, INTERCEPT_INTR);	1191	svm_set_intercept(svm, INTERCEPT_INTR);
1187	svm_set_intercept(svm, INTERCEPT_NMI);	1192	svm_set_intercept(svm, INTERCEPT_NMI);
1188	svm_set_intercept(svm, INTERCEPT_SMI);	1193
		1194	if (intercept_smi)
		1195	svm_set_intercept(svm, INTERCEPT_SMI);
		1196
1189	svm_set_intercept(svm, INTERCEPT_SELECTIVE_CR0);	1197	svm_set_intercept(svm, INTERCEPT_SELECTIVE_CR0);
1190	svm_set_intercept(svm, INTERCEPT_RDPMC);	1198	svm_set_intercept(svm, INTERCEPT_RDPMC);
1191	svm_set_intercept(svm, INTERCEPT_CPUID);	1199	svm_set_intercept(svm, INTERCEPT_CPUID);
@@ -1923,7 +1931,7 @@ static int npf_interception(struct kvm_vcpu *vcpu) · 731 unmodified lines
1923	{	1931	{
1924	struct vcpu_svm *svm = to_svm(vcpu);	1932	struct vcpu_svm *svm = to_svm(vcpu);
1925		1933
1926	u64 fault_address = __sme_clr(svm->vmcb->control.exit_info_2);	1934	u64 fault_address = svm->vmcb->control.exit_info_2;
1927	u64 error_code = svm->vmcb->control.exit_info_1;	1935	u64 error_code = svm->vmcb->control.exit_info_1;
1928		1936
1929	trace_kvm_page_fault(fault_address, error_code);	1937	trace_kvm_page_fault(fault_address, error_code);
@@ -2106,6 +2114,11 @@ static int nmi_interception(struct kvm_vcpu *vcpu) · 176 unmodified lines
2106	return 1;	2114	return 1;
2107	}	2115	}
2108		2116
		2117	static int smi_interception(struct kvm_vcpu *vcpu)
		2118	{
		2119	return 1;
		2120	}
		2121
2109	static int intr_interception(struct kvm_vcpu *vcpu)	2122	static int intr_interception(struct kvm_vcpu *vcpu)
2110	{	2123	{
2111	++vcpu->stat.irq_exits;	2124	++vcpu->stat.irq_exits;
@@ -2941,7 +2954,16 @@ static int svm_set_msr(struct kvm_vcpu vcpu, struct msr_data msr) · 829 unmodified lines
2941	svm_disable_lbrv(vcpu);	2954	svm_disable_lbrv(vcpu);
2942	break;	2955	break;
2943	case MSR_VM_HSAVE_PA:	2956	case MSR_VM_HSAVE_PA:
2944	svm->nested.hsave_msr = data;	2957	/*
		2958	* Old kernels did not validate the value written to
		2959	* MSR_VM_HSAVE_PA. Allow KVM_SET_MSR to set an invalid
		2960	* value to allow live migrating buggy or malicious guests
		2961	* originating from those kernels.
		2962	*/
		2963	if (!msr->host_initiated && !page_address_valid(vcpu, data))
		2964	return 1;
		2965
		2966	svm->nested.hsave_msr = data & PAGE_MASK;
2945	break;	2967	break;
2946	case MSR_VM_CR:	2968	case MSR_VM_CR:
2947	return svm_set_vm_cr(vcpu, data);	2969	return svm_set_vm_cr(vcpu, data);
@@ -3080,8 +3102,7 @@ static int (const svm_exit_handlers[])(struct kvm_vcpu vcpu) = { · 132 unmodified lines
3080	[SVM_EXIT_EXCP_BASE + GP_VECTOR] = gp_interception,	3102	[SVM_EXIT_EXCP_BASE + GP_VECTOR] = gp_interception,
3081	[SVM_EXIT_INTR] = intr_interception,	3103	[SVM_EXIT_INTR] = intr_interception,
3082	[SVM_EXIT_NMI] = nmi_interception,	3104	[SVM_EXIT_NMI] = nmi_interception,
3083	[SVM_EXIT_SMI] = kvm_emulate_as_nop,	3105	[SVM_EXIT_SMI] = smi_interception,
3084	[SVM_EXIT_INIT] = kvm_emulate_as_nop,
3085	[SVM_EXIT_VINTR] = interrupt_window_interception,	3106	[SVM_EXIT_VINTR] = interrupt_window_interception,
3086	[SVM_EXIT_RDPMC] = kvm_emulate_rdpmc,	3107	[SVM_EXIT_RDPMC] = kvm_emulate_rdpmc,
3087	[SVM_EXIT_CPUID] = kvm_emulate_cpuid,	3108	[SVM_EXIT_CPUID] = kvm_emulate_cpuid,
@@ -4288,6 +4309,7 @@ static int svm_smi_allowed(struct kvm_vcpu *vcpu, bool for_injection) · 1200 unmodified lines
4288	static int svm_enter_smm(struct kvm_vcpu vcpu, char smstate)	4309	static int svm_enter_smm(struct kvm_vcpu vcpu, char smstate)
4289	{	4310	{
4290	struct vcpu_svm *svm = to_svm(vcpu);	4311	struct vcpu_svm *svm = to_svm(vcpu);
		4312	struct kvm_host_map map_save;
4291	int ret;	4313	int ret;
4292		4314
4293	if (is_guest_mode(vcpu)) {	4315	if (is_guest_mode(vcpu)) {
@@ -4303,6 +4325,29 @@ static int svm_enter_smm(struct kvm_vcpu vcpu, char smstate) · 9 unmodified lines
4303	ret = nested_svm_vmexit(svm);	4325	ret = nested_svm_vmexit(svm);
4304	if (ret)	4326	if (ret)
4305	return ret;	4327	return ret;
		4328
		4329	/*
		4330	* KVM uses VMCB01 to store L1 host state while L2 runs but
		4331	* VMCB01 is going to be used during SMM and thus the state will
		4332	* be lost. Temporary save non-VMLOAD/VMSAVE state to the host save
		4333	* area pointed to by MSR_VM_HSAVE_PA. APM guarantees that the
		4334	* format of the area is identical to guest save area offsetted
		4335	* by 0x400 (matches the offset of 'struct vmcb_save_area'
		4336	* within 'struct vmcb'). Note: HSAVE area may also be used by
		4337	* L1 hypervisor to save additional host context (e.g. KVM does
		4338	* that, see svm_prepare_guest_switch()) which must be
		4339	* preserved.
		4340	*/
		4341	if (kvm_vcpu_map(vcpu, gpa_to_gfn(svm->nested.hsave_msr),
		4342	&map_save) == -EINVAL)
		4343	return 1;
		4344
		4345	BUILD_BUG_ON(offsetof(struct vmcb, save) != 0x400);
		4346
		4347	svm_copy_vmrun_state(&svm->vmcb01.ptr->save,
		4348	map_save.hva + 0x400);
		4349
		4350	kvm_vcpu_unmap(vcpu, &map_save, true);
4306	}	4351	}
4307	return 0;	4352	return 0;
4308	}	4353	}
@@ -4310,13 +4355,14 @@ static int svm_enter_smm(struct kvm_vcpu vcpu, char smstate) · 1 unmodified line
4310	static int svm_leave_smm(struct kvm_vcpu vcpu, const char smstate)	4355	static int svm_leave_smm(struct kvm_vcpu vcpu, const char smstate)
4311	{	4356	{
4312	struct vcpu_svm *svm = to_svm(vcpu);	4357	struct vcpu_svm *svm = to_svm(vcpu);
4313	struct kvm_host_map map;	4358	struct kvm_host_map map, map_save;
4314	int ret = 0;	4359	int ret = 0;
4315		4360
4316	if (guest_cpuid_has(vcpu, X86_FEATURE_LM)) {	4361	if (guest_cpuid_has(vcpu, X86_FEATURE_LM)) {
4317	u64 saved_efer = GET_SMSTATE(u64, smstate, 0x7ed0);	4362	u64 saved_efer = GET_SMSTATE(u64, smstate, 0x7ed0);
4318	u64 guest = GET_SMSTATE(u64, smstate, 0x7ed8);	4363	u64 guest = GET_SMSTATE(u64, smstate, 0x7ed8);
4319	u64 vmcb12_gpa = GET_SMSTATE(u64, smstate, 0x7ee0);	4364	u64 vmcb12_gpa = GET_SMSTATE(u64, smstate, 0x7ee0);
		4365	struct vmcb *vmcb12;
4320		4366
4321	if (guest) {	4367	if (guest) {
4322	if (!guest_cpuid_has(vcpu, X86_FEATURE_SVM))	4368	if (!guest_cpuid_has(vcpu, X86_FEATURE_SVM))
@@ -4332,8 +4378,25 @@ static int svm_leave_smm(struct kvm_vcpu vcpu, const char smstate) · 9 unmodified lines
4332	if (svm_allocate_nested(svm))	4378	if (svm_allocate_nested(svm))
4333	return 1;	4379	return 1;
4334		4380
4335	ret = enter_svm_guest_mode(vcpu, vmcb12_gpa, map.hva);	4381	vmcb12 = map.hva;
		4382
		4383	nested_load_control_from_vmcb12(svm, &vmcb12->control);
		4384
		4385	ret = enter_svm_guest_mode(vcpu, vmcb12_gpa, vmcb12);
4336	kvm_vcpu_unmap(vcpu, &map, true);	4386	kvm_vcpu_unmap(vcpu, &map, true);
		4387
		4388	/*
		4389	* Restore L1 host state from L1 HSAVE area as VMCB01 was
		4390	* used during SMM (see svm_enter_smm())
		4391	*/
		4392	if (kvm_vcpu_map(vcpu, gpa_to_gfn(svm->nested.hsave_msr),
		4393	&map_save) == -EINVAL)
		4394	return 1;
		4395
		4396	svm_copy_vmrun_state(map_save.hva + 0x400,
		4397	&svm->vmcb01.ptr->save);
		4398
		4399	kvm_vcpu_unmap(vcpu, &map_save, true);
4337	}	4400	}
4338	}	4401	}
4339		4402

arch/x86/kvm/svm/svm.h+5−0

 #define MSRPM_OFFSETS	16
 extern u32 msrpm_offsets[MSRPM_OFFSETS] __read_mostly;
 extern bool npt_enabled;
+extern bool intercept_smi;
 /*
  * Clean bits in VMCB.
 void svm_free_nested(struct vcpu_svm *svm);
 int svm_allocate_nested(struct vcpu_svm *svm);
 int nested_svm_vmrun(struct kvm_vcpu *vcpu);
+void svm_copy_vmrun_state(struct vmcb_save_area *from_save,
+			  struct vmcb_save_area *to_save);
 void nested_svm_vmloadsave(struct vmcb *from_vmcb, struct vmcb *to_vmcb);
 int nested_svm_vmexit(struct vcpu_svm *svm);
 int nested_svm_check_exception(struct vcpu_svm *svm, unsigned nr,
 			       bool has_error_code, u32 error_code);
 int nested_svm_exit_special(struct vcpu_svm *svm);
+void nested_load_control_from_vmcb12(struct vcpu_svm *svm,
+				     struct vmcb_control_area *control);
 void nested_sync_control_from_vmcb02(struct vcpu_svm *svm);
 void nested_vmcb02_compute_g_pat(struct vcpu_svm *svm);
 void svm_switch_vmcb(struct vcpu_svm *svm, struct kvm_vmcb_info *target_vmcb);

arch/x86/kvm/vmx/vmx.h+0−2

@@ -14,8 +14,6 @@ · 13 unmodified lines
14	#include "vmx_ops.h"	14	#include "vmx_ops.h"
15	#include "cpuid.h"	15	#include "cpuid.h"
16		16
17	extern const u32 vmx_msr_index[];
18
19	#define MSR_TYPE_R 1	17	#define MSR_TYPE_R 1
20	#define MSR_TYPE_W 2	18	#define MSR_TYPE_W 2
21	#define MSR_TYPE_RW 3	19	#define MSR_TYPE_RW 3

arch/x86/kvm/x86.c+2−3

 		set_debugreg(vcpu->arch.eff_db[3], 3);
 		set_debugreg(vcpu->arch.dr6, 6);
 		vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
+	} else if (unlikely(hw_breakpoint_active())) {
+		set_debugreg(0, 7);
 	}
 	for (;;) {
 	int r;
 	rdmsrl_safe(MSR_EFER, &host_efer);
-	if (WARN_ON_ONCE(boot_cpu_has(X86_FEATURE_NX) &&
-			 !(host_efer & EFER_NX)))
-		return -EIO;
 	if (boot_cpu_has(X86_FEATURE_XSAVES))
 		rdmsrl(MSR_IA32_XSS, host_xss);

arch/x86/mm/pgtable.c+15−19

 }
 #endif
-#if CONFIG_PGTABLE_LEVELS > 3
 /**
  * pud_set_huge - setup kernel PUD mapping
  *
 	return 1;
 }
-/**
- * pud_clear_huge - clear kernel PUD mapping when it is set
- *
- * Returns 1 on success and 0 on failure (no PUD map is found).
- */
-int pud_clear_huge(pud_t *pud)
-{
-	if (pud_large(*pud)) {
-		pud_clear(pud);
-		return 1;
-	}
-	return 0;
-}
-#endif
-#if CONFIG_PGTABLE_LEVELS > 2
 /**
  * pmd_set_huge - setup kernel PMD mapping
  *
 	return 1;
 }
+/**
+ * pud_clear_huge - clear kernel PUD mapping when it is set
+ *
+ * Returns 1 on success and 0 on failure (no PUD map is found).
+ */
+int pud_clear_huge(pud_t *pud)
+{
+	if (pud_large(*pud)) {
+		pud_clear(pud);
+		return 1;
+	}
+	return 0;
+}
 /**
  * pmd_clear_huge - clear kernel PMD mapping when it is set
  *
 	return 0;
 }
-#endif
 #ifdef CONFIG_X86_64
 /**

drivers/block/nbd.c+1−1

@@ -239,8 +239,8 @@ static void nbd_dev_remove(struct nbd_device *nbd) · 238 unmodified lines
239		239
240	if (disk) {	240	if (disk) {
241	del_gendisk(disk);	241	del_gendisk(disk);
242	blk_mq_free_tag_set(&nbd->tag_set);
243	blk_cleanup_disk(disk);	242	blk_cleanup_disk(disk);
		243	blk_mq_free_tag_set(&nbd->tag_set);
244	}	244	}
245		245
246	/*	246	/*

drivers/block/paride/pd.c+1−1

 		if (p) {
 			disk->gd = NULL;
 			del_gendisk(p);
-			blk_mq_free_tag_set(&disk->tag_set);
 			blk_cleanup_disk(p);
+			blk_mq_free_tag_set(&disk->tag_set);
 			pi_release(disk->pi);
 		}
 	}

drivers/block/xen-blkfront.c+26−198

@@ -502,34 +502,21 @@ static int blkif_getgeo(struct block_device bd, struct hd_geometry hg) · 501 unmodified lines
502	static int blkif_ioctl(struct block_device *bdev, fmode_t mode,	502	static int blkif_ioctl(struct block_device *bdev, fmode_t mode,
503	unsigned command, unsigned long argument)	503	unsigned command, unsigned long argument)
504	{	504	{
505	struct blkfront_info *info = bdev->bd_disk->private_data;
506	int i;	505	int i;
507		506
508	dev_dbg(&info->xbdev->dev, "command: 0x%x, argument: 0x%lx\n",
509	command, (long)argument);
510
511	switch (command) {	507	switch (command) {
512	case CDROMMULTISESSION:	508	case CDROMMULTISESSION:
513	dev_dbg(&info->xbdev->dev, "FIXME: support multisession CDs later\n");
514	for (i = 0; i < sizeof(struct cdrom_multisession); i++)	509	for (i = 0; i < sizeof(struct cdrom_multisession); i++)
515	if (put_user(0, (char __user *)(argument + i)))	510	if (put_user(0, (char __user *)(argument + i)))
516	return -EFAULT;	511	return -EFAULT;
517	return 0;	512	return 0;
518		513	case CDROM_GET_CAPABILITY:
519	case CDROM_GET_CAPABILITY: {	514	if (bdev->bd_disk->flags & GENHD_FL_CD)
520	struct gendisk *gd = info->gd;
521	if (gd->flags & GENHD_FL_CD)
522	return 0;	515	return 0;
523	return -EINVAL;	516	return -EINVAL;
524	}
525
526	default:	517	default:
527	/*printk(KERN_ALERT "ioctl %08x not supported by Xen blkdev\n",	518	return -EINVAL;
528	command);*/
529	return -EINVAL; /* same return as native Linux */
530	}	519	}
531
532	return 0;
533	}	520	}
534		521
535	static unsigned long blkif_ring_get_request(struct blkfront_ring_info *rinfo,	522	static unsigned long blkif_ring_get_request(struct blkfront_ring_info *rinfo,
@@ -1177,36 +1164,6 @@ out_release_minors: · 641 unmodified lines
1177	return err;	1164	return err;
1178	}	1165	}
1179		1166
1180	static void xlvbd_release_gendisk(struct blkfront_info *info)
1181	{
1182	unsigned int minor, nr_minors, i;
1183	struct blkfront_ring_info *rinfo;
1184
1185	if (info->rq == NULL)
1186	return;
1187
1188	/* No more blkif_request(). */
1189	blk_mq_stop_hw_queues(info->rq);
1190
1191	for_each_rinfo(info, rinfo, i) {
1192	/* No more gnttab callback work. */
1193	gnttab_cancel_free_callback(&rinfo->callback);
1194
1195	/* Flush gnttab callback work. Must be done with no locks held. */
1196	flush_work(&rinfo->work);
1197	}
1198
1199	del_gendisk(info->gd);
1200
1201	minor = info->gd->first_minor;
1202	nr_minors = info->gd->minors;
1203	xlbd_release_minors(minor, nr_minors);
1204
1205	blk_cleanup_disk(info->gd);
1206	info->gd = NULL;
1207	blk_mq_free_tag_set(&info->tag_set);
1208	}
1209
1210	/* Already hold rinfo->ring_lock. */	1167	/* Already hold rinfo->ring_lock. */
1211	static inline void kick_pending_request_queues_locked(struct blkfront_ring_info *rinfo)	1168	static inline void kick_pending_request_queues_locked(struct blkfront_ring_info *rinfo)
1212	{	1169	{
@@ -1756,12 +1713,6 @@ abort_transaction: · 543 unmodified lines
1756	return err;	1713	return err;
1757	}	1714	}
1758		1715
1759	static void free_info(struct blkfront_info *info)
1760	{
1761	list_del(&info->info_list);
1762	kfree(info);
1763	}
1764
1765	/* Common code used when first setting up, and when resuming. */	1716	/* Common code used when first setting up, and when resuming. */
1766	static int talk_to_blkback(struct xenbus_device *dev,	1717	static int talk_to_blkback(struct xenbus_device *dev,
1767	struct blkfront_info *info)	1718	struct blkfront_info *info)
@@ -1880,13 +1831,6 @@ again: · 112 unmodified lines
1880	xenbus_dev_fatal(dev, err, "%s", message);	1831	xenbus_dev_fatal(dev, err, "%s", message);
1881	destroy_blkring:	1832	destroy_blkring:
1882	blkif_free(info, 0);	1833	blkif_free(info, 0);
1883
1884	mutex_lock(&blkfront_mutex);
1885	free_info(info);
1886	mutex_unlock(&blkfront_mutex);
1887
1888	dev_set_drvdata(&dev->dev, NULL);
1889
1890	return err;	1834	return err;
1891	}	1835	}
1892		1836
@@ -2126,38 +2070,26 @@ static int blkfront_resume(struct xenbus_device *dev) · 233 unmodified lines
2126	static void blkfront_closing(struct blkfront_info *info)	2070	static void blkfront_closing(struct blkfront_info *info)
2127	{	2071	{
2128	struct xenbus_device *xbdev = info->xbdev;	2072	struct xenbus_device *xbdev = info->xbdev;
2129	struct block_device *bdev = NULL;	2073	struct blkfront_ring_info *rinfo;
2130		2074	unsigned int i;
2131	mutex_lock(&info->mutex);
2132		2075
2133	if (xbdev->state == XenbusStateClosing) {	2076	if (xbdev->state == XenbusStateClosing)
2134	mutex_unlock(&info->mutex);
2135	return;	2077	return;
2136	}
2137		2078
2138	if (info->gd)	2079	/* No more blkif_request(). */
2139	bdev = bdgrab(info->gd->part0);	2080	blk_mq_stop_hw_queues(info->rq);
2140		2081	blk_set_queue_dying(info->rq);
2141	mutex_unlock(&info->mutex);	2082	set_capacity(info->gd, 0);
2142
2143	if (!bdev) {
2144	xenbus_frontend_closed(xbdev);
2145	return;
2146	}
2147		2083
2148	mutex_lock(&bdev->bd_disk->open_mutex);	2084	for_each_rinfo(info, rinfo, i) {
		2085	/* No more gnttab callback work. */
		2086	gnttab_cancel_free_callback(&rinfo->callback);
2149		2087
2150	if (bdev->bd_openers) {	2088	/* Flush gnttab callback work. Must be done with no locks held. */
2151	xenbus_dev_error(xbdev, -EBUSY,	2089	flush_work(&rinfo->work);
2152	"Device in use; refusing to close");
2153	xenbus_switch_state(xbdev, XenbusStateClosing);
2154	} else {
2155	xlvbd_release_gendisk(info);
2156	xenbus_frontend_closed(xbdev);
2157	}	2090	}
2158		2091
2159	mutex_unlock(&bdev->bd_disk->open_mutex);	2092	xenbus_frontend_closed(xbdev);
2160	bdput(bdev);
2161	}	2093	}
2162		2094
2163	static void blkfront_setup_discard(struct blkfront_info *info)	2095	static void blkfront_setup_discard(struct blkfront_info *info)
@@ -2472,8 +2404,7 @@ static void blkback_changed(struct xenbus_device *dev, · 308 unmodified lines
2472	break;	2404	break;
2473	fallthrough;	2405	fallthrough;
2474	case XenbusStateClosing:	2406	case XenbusStateClosing:
2475	if (info)	2407	blkfront_closing(info);
2476	blkfront_closing(info);
2477	break;	2408	break;
2478	}	2409	}
2479	}	2410	}
@@ -2481,56 +2412,21 @@ static void blkback_changed(struct xenbus_device *dev, · 1 unmodified line
2481	static int blkfront_remove(struct xenbus_device *xbdev)	2412	static int blkfront_remove(struct xenbus_device *xbdev)
2482	{	2413	{
2483	struct blkfront_info *info = dev_get_drvdata(&xbdev->dev);	2414	struct blkfront_info *info = dev_get_drvdata(&xbdev->dev);
2484	struct block_device *bdev = NULL;
2485	struct gendisk *disk;
2486		2415
2487	dev_dbg(&xbdev->dev, "%s removed", xbdev->nodename);	2416	dev_dbg(&xbdev->dev, "%s removed", xbdev->nodename);
2488		2417
2489	if (!info)	2418	del_gendisk(info->gd);
2490	return 0;
2491
2492	blkif_free(info, 0);
2493
2494	mutex_lock(&info->mutex);
2495
2496	disk = info->gd;
2497	if (disk)
2498	bdev = bdgrab(disk->part0);
2499
2500	info->xbdev = NULL;
2501	mutex_unlock(&info->mutex);
2502
2503	if (!bdev) {
2504	mutex_lock(&blkfront_mutex);
2505	free_info(info);
2506	mutex_unlock(&blkfront_mutex);
2507	return 0;
2508	}
2509
2510	/*
2511	* The xbdev was removed before we reached the Closed
2512	* state. See if it's safe to remove the disk. If the bdev
2513	* isn't closed yet, we let release take care of it.
2514	*/
2515
2516	mutex_lock(&disk->open_mutex);
2517	info = disk->private_data;
2518
2519	dev_warn(disk_to_dev(disk),
2520	"%s was hot-unplugged, %d stale handles\n",
2521	xbdev->nodename, bdev->bd_openers);
2522		2419
2523	if (info && !bdev->bd_openers) {	2420	mutex_lock(&blkfront_mutex);
2524	xlvbd_release_gendisk(info);	2421	list_del(&info->info_list);
2525	disk->private_data = NULL;	2422	mutex_unlock(&blkfront_mutex);
2526	mutex_lock(&blkfront_mutex);
2527	free_info(info);
2528	mutex_unlock(&blkfront_mutex);
2529	}
2530		2423
2531	mutex_unlock(&disk->open_mutex);	2424	blkif_free(info, 0);
2532	bdput(bdev);	2425	xlbd_release_minors(info->gd->first_minor, info->gd->minors);
		2426	blk_cleanup_disk(info->gd);
		2427	blk_mq_free_tag_set(&info->tag_set);
2533		2428
		2429	kfree(info);
2534	return 0;	2430	return 0;
2535	}	2431	}
2536		2432
@@ -2541,77 +2437,9 @@ static int blkfront_is_ready(struct xenbus_device *dev) · 4 unmodified lines
2541	return info->is_ready && info->xbdev;	2437	return info->is_ready && info->xbdev;
2542	}	2438	}
2543		2439
2544	static int blkif_open(struct block_device *bdev, fmode_t mode)
2545	{
2546	struct gendisk *disk = bdev->bd_disk;
2547	struct blkfront_info *info;
2548	int err = 0;
2549
2550	mutex_lock(&blkfront_mutex);
2551
2552	info = disk->private_data;
2553	if (!info) {
2554	/* xbdev gone */
2555	err = -ERESTARTSYS;
2556	goto out;
2557	}
2558
2559	mutex_lock(&info->mutex);
2560
2561	if (!info->gd)
2562	/* xbdev is closed */
2563	err = -ERESTARTSYS;
2564
2565	mutex_unlock(&info->mutex);
2566
2567	out:
2568	mutex_unlock(&blkfront_mutex);
2569	return err;
2570	}
2571
2572	static void blkif_release(struct gendisk *disk, fmode_t mode)
2573	{
2574	struct blkfront_info *info = disk->private_data;
2575	struct xenbus_device *xbdev;
2576
2577	mutex_lock(&blkfront_mutex);
2578	if (disk->part0->bd_openers)
2579	goto out_mutex;
2580
2581	/*
2582	* Check if we have been instructed to close. We will have
2583	* deferred this request, because the bdev was still open.
2584	*/
2585
2586	mutex_lock(&info->mutex);
2587	xbdev = info->xbdev;
2588
2589	if (xbdev && xbdev->state == XenbusStateClosing) {
2590	/* pending switch to state closed */
2591	dev_info(disk_to_dev(disk), "releasing disk\n");
2592	xlvbd_release_gendisk(info);
2593	xenbus_frontend_closed(info->xbdev);
2594	}
2595
2596	mutex_unlock(&info->mutex);
2597
2598	if (!xbdev) {
2599	/* sudden device removal */
2600	dev_info(disk_to_dev(disk), "releasing disk\n");
2601	xlvbd_release_gendisk(info);
2602	disk->private_data = NULL;
2603	free_info(info);
2604	}
2605
2606	out_mutex:
2607	mutex_unlock(&blkfront_mutex);
2608	}
2609
2610	static const struct block_device_operations xlvbd_block_fops =	2440	static const struct block_device_operations xlvbd_block_fops =
2611	{	2441	{
2612	.owner = THIS_MODULE,	2442	.owner = THIS_MODULE,
2613	.open = blkif_open,
2614	.release = blkif_release,
2615	.getgeo = blkif_getgeo,	2443	.getgeo = blkif_getgeo,
2616	.ioctl = blkif_ioctl,	2444	.ioctl = blkif_ioctl,
2617	.compat_ioctl = blkdev_compat_ptr_ioctl,	2445	.compat_ioctl = blkdev_compat_ptr_ioctl,

drivers/char/powernv-op-panel.c+1−0

@@ -75,6 +75,7 @@ static int __op_panel_update_display(void) · 74 unmodified lines
75	rc);	75	rc);
76	break;	76	break;
77	}	77	}
		78	break;
78	case OPAL_SUCCESS:	79	case OPAL_SUCCESS:
79	break;	80	break;
80	default:	81	default:

drivers/clk/renesas/r9a07g044-cpg.c+47−32

@@ -30,8 +30,9 @@ enum clk_ids { · 29 unmodified lines
30	CLK_PLL2_DIV20,	30	CLK_PLL2_DIV20,
31	CLK_PLL3,	31	CLK_PLL3,
32	CLK_PLL3_DIV2,	32	CLK_PLL3_DIV2,
		33	CLK_PLL3_DIV2_4,
		34	CLK_PLL3_DIV2_4_2,
33	CLK_PLL3_DIV4,	35	CLK_PLL3_DIV4,
34	CLK_PLL3_DIV8,
35	CLK_PLL4,	36	CLK_PLL4,
36	CLK_PLL5,	37	CLK_PLL5,
37	CLK_PLL5_DIV2,	38	CLK_PLL5_DIV2,
@@ -42,12 +43,13 @@ enum clk_ids { · 4 unmodified lines
42	};	43	};
43		44
44	/* Divider tables */	45	/* Divider tables */
45	static const struct clk_div_table dtable_3b[] = {	46	static const struct clk_div_table dtable_1_32[] = {
46	{0, 1},	47	{0, 1},
47	{1, 2},	48	{1, 2},
48	{2, 4},	49	{2, 4},
49	{3, 8},	50	{3, 8},
50	{4, 32},	51	{4, 32},
		52	{0, 0},
51	};	53	};
52		54
53	static const struct cpg_core_clk r9a07g044_core_clks[] __initconst = {	55	static const struct cpg_core_clk r9a07g044_core_clks[] __initconst = {
@@ -66,47 +68,56 @@ static const struct cpg_core_clk r9a07g044_core_clks[] __initconst = { · 12 unmodified lines
66	DEF_FIXED(".pll2_div20", CLK_PLL2_DIV20, CLK_PLL2, 1, 20),	68	DEF_FIXED(".pll2_div20", CLK_PLL2_DIV20, CLK_PLL2, 1, 20),
67		69
68	DEF_FIXED(".pll3_div2", CLK_PLL3_DIV2, CLK_PLL3, 1, 2),	70	DEF_FIXED(".pll3_div2", CLK_PLL3_DIV2, CLK_PLL3, 1, 2),
		71	DEF_FIXED(".pll3_div2_4", CLK_PLL3_DIV2_4, CLK_PLL3_DIV2, 1, 4),
		72	DEF_FIXED(".pll3_div2_4_2", CLK_PLL3_DIV2_4_2, CLK_PLL3_DIV2_4, 1, 2),
69	DEF_FIXED(".pll3_div4", CLK_PLL3_DIV4, CLK_PLL3, 1, 4),	73	DEF_FIXED(".pll3_div4", CLK_PLL3_DIV4, CLK_PLL3, 1, 4),
70	DEF_FIXED(".pll3_div8", CLK_PLL3_DIV8, CLK_PLL3, 1, 8),
71		74
72	/* Core output clk */	75	/* Core output clk */
73	DEF_FIXED("I", R9A07G044_CLK_I, CLK_PLL1, 1, 1),	76	DEF_FIXED("I", R9A07G044_CLK_I, CLK_PLL1, 1, 1),
74	DEF_DIV("P0", R9A07G044_CLK_P0, CLK_PLL2_DIV16, DIVPL2A,	77	DEF_DIV("P0", R9A07G044_CLK_P0, CLK_PLL2_DIV16, DIVPL2A,
75	dtable_3b, CLK_DIVIDER_HIWORD_MASK),	78	dtable_1_32, CLK_DIVIDER_HIWORD_MASK),
76	DEF_FIXED("TSU", R9A07G044_CLK_TSU, CLK_PLL2_DIV20, 1, 1),	79	DEF_FIXED("TSU", R9A07G044_CLK_TSU, CLK_PLL2_DIV20, 1, 1),
77	DEF_DIV("P1", R9A07G044_CLK_P1, CLK_PLL3_DIV8,	80	DEF_DIV("P1", R9A07G044_CLK_P1, CLK_PLL3_DIV2_4,
78	DIVPL3B, dtable_3b, CLK_DIVIDER_HIWORD_MASK),	81	DIVPL3B, dtable_1_32, CLK_DIVIDER_HIWORD_MASK),
		82	DEF_DIV("P2", R9A07G044_CLK_P2, CLK_PLL3_DIV2_4_2,
		83	DIVPL3A, dtable_1_32, CLK_DIVIDER_HIWORD_MASK),
79	};	84	};
80		85
81	static struct rzg2l_mod_clk r9a07g044_mod_clks[] = {	86	static struct rzg2l_mod_clk r9a07g044_mod_clks[] = {
82	DEF_MOD("gic", R9A07G044_CLK_GIC600,	87	DEF_MOD("gic", R9A07G044_GIC600_GICCLK, R9A07G044_CLK_P1,
83	R9A07G044_CLK_P1,	88	0x514, 0),
84	0x514, BIT(0), (BIT(0) \| BIT(1))),	89	DEF_MOD("ia55_pclk", R9A07G044_IA55_PCLK, R9A07G044_CLK_P2,
85	DEF_MOD("ia55", R9A07G044_CLK_IA55,	90	0x518, 0),
86	R9A07G044_CLK_P1,	91	DEF_MOD("ia55_clk", R9A07G044_IA55_CLK, R9A07G044_CLK_P1,
87	0x518, (BIT(0) \| BIT(1)), BIT(0)),	92	0x518, 1),
88	DEF_MOD("scif0", R9A07G044_CLK_SCIF0,	93	DEF_MOD("scif0", R9A07G044_SCIF0_CLK_PCK, R9A07G044_CLK_P0,
89	R9A07G044_CLK_P0,	94	0x584, 0),
90	0x584, BIT(0), BIT(0)),	95	DEF_MOD("scif1", R9A07G044_SCIF1_CLK_PCK, R9A07G044_CLK_P0,
91	DEF_MOD("scif1", R9A07G044_CLK_SCIF1,	96	0x584, 1),
92	R9A07G044_CLK_P0,	97	DEF_MOD("scif2", R9A07G044_SCIF2_CLK_PCK, R9A07G044_CLK_P0,
93	0x584, BIT(1), BIT(1)),	98	0x584, 2),
94	DEF_MOD("scif2", R9A07G044_CLK_SCIF2,	99	DEF_MOD("scif3", R9A07G044_SCIF3_CLK_PCK, R9A07G044_CLK_P0,
95	R9A07G044_CLK_P0,	100	0x584, 3),
96	0x584, BIT(2), BIT(2)),	101	DEF_MOD("scif4", R9A07G044_SCIF4_CLK_PCK, R9A07G044_CLK_P0,
97	DEF_MOD("scif3", R9A07G044_CLK_SCIF3,	102	0x584, 4),
98	R9A07G044_CLK_P0,	103	DEF_MOD("sci0", R9A07G044_SCI0_CLKP, R9A07G044_CLK_P0,
99	0x584, BIT(3), BIT(3)),	104	0x588, 0),
100	DEF_MOD("scif4", R9A07G044_CLK_SCIF4,	105	};
101	R9A07G044_CLK_P0,	106
102	0x584, BIT(4), BIT(4)),	107	static struct rzg2l_reset r9a07g044_resets[] = {
103	DEF_MOD("sci0", R9A07G044_CLK_SCI0,	108	DEF_RST(R9A07G044_GIC600_GICRESET_N, 0x814, 0),
104	R9A07G044_CLK_P0,	109	DEF_RST(R9A07G044_GIC600_DBG_GICRESET_N, 0x814, 1),
105	0x588, BIT(0), BIT(0)),	110	DEF_RST(R9A07G044_IA55_RESETN, 0x818, 0),
		111	DEF_RST(R9A07G044_SCIF0_RST_SYSTEM_N, 0x884, 0),
		112	DEF_RST(R9A07G044_SCIF1_RST_SYSTEM_N, 0x884, 1),
		113	DEF_RST(R9A07G044_SCIF2_RST_SYSTEM_N, 0x884, 2),
		114	DEF_RST(R9A07G044_SCIF3_RST_SYSTEM_N, 0x884, 3),
		115	DEF_RST(R9A07G044_SCIF4_RST_SYSTEM_N, 0x884, 4),
		116	DEF_RST(R9A07G044_SCI0_RST, 0x888, 0),
106	};	117	};
107		118
108	static const unsigned int r9a07g044_crit_mod_clks[] __initconst = {	119	static const unsigned int r9a07g044_crit_mod_clks[] __initconst = {
109	MOD_CLK_BASE + R9A07G044_CLK_GIC600,	120	MOD_CLK_BASE + R9A07G044_GIC600_GICCLK,
110	};	121	};
111		122
112	const struct rzg2l_cpg_info r9a07g044_cpg_info = {	123	const struct rzg2l_cpg_info r9a07g044_cpg_info = {
@@ -123,5 +134,9 @@ const struct rzg2l_cpg_info r9a07g044_cpg_info = { · 10 unmodified lines
123	/* Module Clocks */	134	/* Module Clocks */
124	.mod_clks = r9a07g044_mod_clks,	135	.mod_clks = r9a07g044_mod_clks,
125	.num_mod_clks = ARRAY_SIZE(r9a07g044_mod_clks),	136	.num_mod_clks = ARRAY_SIZE(r9a07g044_mod_clks),
126	.num_hw_mod_clks = R9A07G044_CLK_MIPI_DSI_PIN + 1,	137	.num_hw_mod_clks = R9A07G044_TSU_PCLK + 1,
		138
		139	/* Resets */
		140	.resets = r9a07g044_resets,
		141	.num_resets = ARRAY_SIZE(r9a07g044_resets),
127	};	142	};

drivers/clk/renesas/renesas-rzg2l-cpg.c+59−51

@@ -47,9 +47,9 @@ · 46 unmodified lines
47	#define SDIV(val) DIV_RSMASK(val, 0, 0x7)	47	#define SDIV(val) DIV_RSMASK(val, 0, 0x7)
48		48
49	#define CLK_ON_R(reg) (reg)	49	#define CLK_ON_R(reg) (reg)
50	#define CLK_MON_R(reg) (0x680 - 0x500 + (reg))	50	#define CLK_MON_R(reg) (0x180 + (reg))
51	#define CLK_RST_R(reg) (0x800 - 0x500 + (reg))	51	#define CLK_RST_R(reg) (reg)
52	#define CLK_MRST_R(reg) (0x980 - 0x500 + (reg))	52	#define CLK_MRST_R(reg) (0x180 + (reg))
53		53
54	#define GET_REG_OFFSET(val) ((val >> 20) & 0xfff)	54	#define GET_REG_OFFSET(val) ((val >> 20) & 0xfff)
55	#define GET_REG_SAMPLL_CLK1(val) ((val >> 22) & 0xfff)	55	#define GET_REG_SAMPLL_CLK1(val) ((val >> 22) & 0xfff)
@@ -78,6 +78,7 @@ struct rzg2l_cpg_priv { · 22 unmodified lines
78	struct clk **clks;	78	struct clk **clks;
79	unsigned int num_core_clks;	79	unsigned int num_core_clks;
80	unsigned int num_mod_clks;	80	unsigned int num_mod_clks;
		81	unsigned int num_resets;
81	unsigned int last_dt_core_clk;	82	unsigned int last_dt_core_clk;
82		83
83	struct raw_notifier_head notifiers;	84	struct raw_notifier_head notifiers;
@@ -315,15 +316,13 @@ fail: · 231 unmodified lines
315	*	316	*
316	* @hw: handle between common and hardware-specific interfaces	317	* @hw: handle between common and hardware-specific interfaces
317	* @off: register offset	318	* @off: register offset
318	* @onoff: ON/MON bits	319	* @bit: ON/MON bit
319	* @reset: reset bits
320	* @priv: CPG/MSTP private data	320	* @priv: CPG/MSTP private data
321	*/	321	*/
322	struct mstp_clock {	322	struct mstp_clock {
323	struct clk_hw hw;	323	struct clk_hw hw;
324	u16 off;	324	u16 off;
325	u8 onoff;	325	u8 bit;
326	u8 reset;
327	struct rzg2l_cpg_priv *priv;	326	struct rzg2l_cpg_priv *priv;
328	};	327	};
329		328
@@ -337,6 +336,7 @@ static int rzg2l_mod_clock_endisable(struct clk_hw *hw, bool enable) · 7 unmodified lines
337	struct device *dev = priv->dev;	336	struct device *dev = priv->dev;
338	unsigned long flags;	337	unsigned long flags;
339	unsigned int i;	338	unsigned int i;
		339	u32 bitmask = BIT(clock->bit);
340	u32 value;	340	u32 value;
341		341
342	if (!clock->off) {	342	if (!clock->off) {
@@ -349,9 +349,9 @@ static int rzg2l_mod_clock_endisable(struct clk_hw *hw, bool enable) · 6 unmodified lines
349	spin_lock_irqsave(&priv->rmw_lock, flags);	349	spin_lock_irqsave(&priv->rmw_lock, flags);
350		350
351	if (enable)	351	if (enable)
352	value = (clock->onoff << 16) \| clock->onoff;	352	value = (bitmask << 16) \| bitmask;
353	else	353	else
354	value = clock->onoff << 16;	354	value = bitmask << 16;
355	writel(value, priv->base + CLK_ON_R(reg));	355	writel(value, priv->base + CLK_ON_R(reg));
356		356
357	spin_unlock_irqrestore(&priv->rmw_lock, flags);	357	spin_unlock_irqrestore(&priv->rmw_lock, flags);
@@ -360,7 +360,7 @@ static int rzg2l_mod_clock_endisable(struct clk_hw *hw, bool enable) · 2 unmodified lines
360	return 0;	360	return 0;
361		361
362	for (i = 1000; i > 0; --i) {	362	for (i = 1000; i > 0; --i) {
363	if (((readl(priv->base + CLK_MON_R(reg))) & clock->onoff))	363	if (((readl(priv->base + CLK_MON_R(reg))) & bitmask))
364	break;	364	break;
365	cpu_relax();	365	cpu_relax();
366	}	366	}
@@ -388,6 +388,7 @@ static int rzg2l_mod_clock_is_enabled(struct clk_hw *hw) · 21 unmodified lines
388	{	388	{
389	struct mstp_clock *clock = to_mod_clock(hw);	389	struct mstp_clock *clock = to_mod_clock(hw);
390	struct rzg2l_cpg_priv *priv = clock->priv;	390	struct rzg2l_cpg_priv *priv = clock->priv;
		391	u32 bitmask = BIT(clock->bit);
391	u32 value;	392	u32 value;
392		393
393	if (!clock->off) {	394	if (!clock->off) {
@@ -397,7 +398,7 @@ static int rzg2l_mod_clock_is_enabled(struct clk_hw *hw) · 3 unmodified lines
397		398
398	value = readl(priv->base + CLK_MON_R(clock->off));	399	value = readl(priv->base + CLK_MON_R(clock->off));
399		400
400	return !(value & clock->onoff);	401	return !(value & bitmask);
401	}	402	}
402		403
403	static const struct clk_ops rzg2l_mod_clock_ops = {	404	static const struct clk_ops rzg2l_mod_clock_ops = {
@@ -457,8 +458,7 @@ rzg2l_cpg_register_mod_clk(const struct rzg2l_mod_clk *mod, · 53 unmodified lines
457	init.num_parents = 1;	458	init.num_parents = 1;
458		459
459	clock->off = mod->off;	460	clock->off = mod->off;
460	clock->onoff = mod->onoff;	461	clock->bit = mod->bit;
461	clock->reset = mod->reset;
462	clock->priv = priv;	462	clock->priv = priv;
463	clock->hw.init = &init;	463	clock->hw.init = &init;
464		464
@@ -483,12 +483,11 @@ static int rzg2l_cpg_reset(struct reset_controller_dev *rcdev, · 18 unmodified lines
483	{	483	{
484	struct rzg2l_cpg_priv *priv = rcdev_to_priv(rcdev);	484	struct rzg2l_cpg_priv *priv = rcdev_to_priv(rcdev);
485	const struct rzg2l_cpg_info *info = priv->info;	485	const struct rzg2l_cpg_info *info = priv->info;
486	unsigned int reg = info->mod_clks[id].off;	486	unsigned int reg = info->resets[id].off;
487	u32 dis = info->mod_clks[id].reset;	487	u32 dis = BIT(info->resets[id].bit);
488	u32 we = dis << 16;	488	u32 we = dis << 16;
489		489
490	dev_dbg(rcdev->dev, "reset name:%s id:%ld offset:0x%x\n",	490	dev_dbg(rcdev->dev, "reset id:%ld offset:0x%x\n", id, CLK_RST_R(reg));
491	info->mod_clks[id].name, id, CLK_RST_R(reg));
492		491
493	/* Reset module */	492	/* Reset module */
494	writel(we, priv->base + CLK_RST_R(reg));	493	writel(we, priv->base + CLK_RST_R(reg));
@@ -507,11 +506,10 @@ static int rzg2l_cpg_assert(struct reset_controller_dev *rcdev, · 12 unmodified lines
507	{	506	{
508	struct rzg2l_cpg_priv *priv = rcdev_to_priv(rcdev);	507	struct rzg2l_cpg_priv *priv = rcdev_to_priv(rcdev);
509	const struct rzg2l_cpg_info *info = priv->info;	508	const struct rzg2l_cpg_info *info = priv->info;
510	unsigned int reg = info->mod_clks[id].off;	509	unsigned int reg = info->resets[id].off;
511	u32 value = info->mod_clks[id].reset << 16;	510	u32 value = BIT(info->resets[id].bit) << 16;
512		511
513	dev_dbg(rcdev->dev, "assert name:%s id:%ld offset:0x%x\n",	512	dev_dbg(rcdev->dev, "assert id:%ld offset:0x%x\n", id, CLK_RST_R(reg));
514	info->mod_clks[id].name, id, CLK_RST_R(reg));
515		513
516	writel(value, priv->base + CLK_RST_R(reg));	514	writel(value, priv->base + CLK_RST_R(reg));
517	return 0;	515	return 0;
@@ -522,12 +520,12 @@ static int rzg2l_cpg_deassert(struct reset_controller_dev *rcdev, · 4 unmodified lines
522	{	520	{
523	struct rzg2l_cpg_priv *priv = rcdev_to_priv(rcdev);	521	struct rzg2l_cpg_priv *priv = rcdev_to_priv(rcdev);
524	const struct rzg2l_cpg_info *info = priv->info;	522	const struct rzg2l_cpg_info *info = priv->info;
525	unsigned int reg = info->mod_clks[id].off;	523	unsigned int reg = info->resets[id].off;
526	u32 dis = info->mod_clks[id].reset;	524	u32 dis = BIT(info->resets[id].bit);
527	u32 value = (dis << 16) \| dis;	525	u32 value = (dis << 16) \| dis;
528		526
529	dev_dbg(rcdev->dev, "deassert name:%s id:%ld offset:0x%x\n",	527	dev_dbg(rcdev->dev, "deassert id:%ld offset:0x%x\n", id,
530	info->mod_clks[id].name, id, CLK_RST_R(reg));	528	CLK_RST_R(reg));
531		529
532	writel(value, priv->base + CLK_RST_R(reg));	530	writel(value, priv->base + CLK_RST_R(reg));
533	return 0;	531	return 0;
@@ -538,8 +536,8 @@ static int rzg2l_cpg_status(struct reset_controller_dev *rcdev, · 4 unmodified lines
538	{	536	{
539	struct rzg2l_cpg_priv *priv = rcdev_to_priv(rcdev);	537	struct rzg2l_cpg_priv *priv = rcdev_to_priv(rcdev);
540	const struct rzg2l_cpg_info *info = priv->info;	538	const struct rzg2l_cpg_info *info = priv->info;
541	unsigned int reg = info->mod_clks[id].off;	539	unsigned int reg = info->resets[id].off;
542	u32 bitmask = info->mod_clks[id].reset;	540	u32 bitmask = BIT(info->resets[id].bit);
543		541
544	return !(readl(priv->base + CLK_MRST_R(reg)) & bitmask);	542	return !(readl(priv->base + CLK_MRST_R(reg)) & bitmask);
545	}	543	}
@@ -554,9 +552,11 @@ static const struct reset_control_ops rzg2l_cpg_reset_ops = { · 8 unmodified lines
554	static int rzg2l_cpg_reset_xlate(struct reset_controller_dev *rcdev,	552	static int rzg2l_cpg_reset_xlate(struct reset_controller_dev *rcdev,
555	const struct of_phandle_args *reset_spec)	553	const struct of_phandle_args *reset_spec)
556	{	554	{
		555	struct rzg2l_cpg_priv *priv = rcdev_to_priv(rcdev);
		556	const struct rzg2l_cpg_info *info = priv->info;
557	unsigned int id = reset_spec->args[0];	557	unsigned int id = reset_spec->args[0];
558		558
559	if (id >= rcdev->nr_resets) {	559	if (id >= rcdev->nr_resets \|\| !info->resets[id].off) {
560	dev_err(rcdev->dev, "Invalid reset index %u\n", id);	560	dev_err(rcdev->dev, "Invalid reset index %u\n", id);
561	return -EINVAL;	561	return -EINVAL;
562	}	562	}
@@ -571,7 +571,7 @@ static int rzg2l_cpg_reset_controller_register(struct rzg2l_cpg_priv *priv) · 8 unmodified lines
571	priv->rcdev.dev = priv->dev;	571	priv->rcdev.dev = priv->dev;
572	priv->rcdev.of_reset_n_cells = 1;	572	priv->rcdev.of_reset_n_cells = 1;
573	priv->rcdev.of_xlate = rzg2l_cpg_reset_xlate;	573	priv->rcdev.of_xlate = rzg2l_cpg_reset_xlate;
574	priv->rcdev.nr_resets = priv->num_mod_clks;	574	priv->rcdev.nr_resets = priv->num_resets;
575		575
576	return devm_reset_controller_register(priv->dev, &priv->rcdev);	576	return devm_reset_controller_register(priv->dev, &priv->rcdev);
577	}	577	}
@@ -594,42 +594,49 @@ static int rzg2l_cpg_attach_dev(struct generic_pm_domain *unused, struct device · 16 unmodified lines
594	{	594	{
595	struct device_node *np = dev->of_node;	595	struct device_node *np = dev->of_node;
596	struct of_phandle_args clkspec;	596	struct of_phandle_args clkspec;
		597	bool once = true;
597	struct clk *clk;	598	struct clk *clk;
598	int error;	599	int error;
599	int i = 0;	600	int i = 0;
600		601
601	while (!of_parse_phandle_with_args(np, "clocks", "#clock-cells", i,	602	while (!of_parse_phandle_with_args(np, "clocks", "#clock-cells", i,
602	&clkspec)) {	603	&clkspec)) {
603	if (rzg2l_cpg_is_pm_clk(&clkspec))	604	if (rzg2l_cpg_is_pm_clk(&clkspec)) {
604	goto found;	605	if (once) {
605		606	once = false;
606	of_node_put(clkspec.np);	607	error = pm_clk_create(dev);
		608	if (error) {
		609	of_node_put(clkspec.np);
		610	goto err;
		611	}
		612	}
		613	clk = of_clk_get_from_provider(&clkspec);
		614	of_node_put(clkspec.np);
		615	if (IS_ERR(clk)) {
		616	error = PTR_ERR(clk);
		617	goto fail_destroy;
		618	}
		619
		620	error = pm_clk_add_clk(dev, clk);
		621	if (error) {
		622	dev_err(dev, "pm_clk_add_clk failed %d\n",
		623	error);
		624	goto fail_put;
		625	}
		626	} else {
		627	of_node_put(clkspec.np);
		628	}
607	i++;	629	i++;
608	}	630	}
609		631
610	return 0;	632	return 0;
611		633
612	found:	634	fail_put:
613	clk = of_clk_get_from_provider(&clkspec);	635	clk_put(clk);
614	of_node_put(clkspec.np);
615
616	if (IS_ERR(clk))
617	return PTR_ERR(clk);
618
619	error = pm_clk_create(dev);
620	if (error)
621	goto fail_put;
622
623	error = pm_clk_add_clk(dev, clk);
624	if (error)
625	goto fail_destroy;
626
627	return 0;
628		636
629	fail_destroy:	637	fail_destroy:
630	pm_clk_destroy(dev);	638	pm_clk_destroy(dev);
631	fail_put:	639	err:
632	clk_put(clk);
633	return error;	640	return error;
634	}	641	}
635		642
@@ -692,6 +699,7 @@ static int __init rzg2l_cpg_probe(struct platform_device *pdev) · 56 unmodified lines
692	priv->clks = clks;	699	priv->clks = clks;
693	priv->num_core_clks = info->num_total_core_clks;	700	priv->num_core_clks = info->num_total_core_clks;
694	priv->num_mod_clks = info->num_hw_mod_clks;	701	priv->num_mod_clks = info->num_hw_mod_clks;
		702	priv->num_resets = info->num_resets;
695	priv->last_dt_core_clk = info->last_dt_core_clk;	703	priv->last_dt_core_clk = info->last_dt_core_clk;
696		704
697	for (i = 0; i < nclks; i++)	705	for (i = 0; i < nclks; i++)

drivers/clk/renesas/renesas-rzg2l-cpg.h+28−9

 #define DDIV_PACK(offset, bitpos, size) \
 		(((offset) << 20) | ((bitpos) << 12) | ((size) << 8))
 #define DIVPL2A		DDIV_PACK(CPG_PL2_DDIV, 0, 3)
+#define DIVPL3A		DDIV_PACK(CPG_PL3A_DDIV, 0, 3)
 #define DIVPL3B		DDIV_PACK(CPG_PL3A_DDIV, 4, 3)
 /**
  * @id: clock index in array containing all Core and Module Clocks
  * @parent: id of parent clock
  * @off: register offset
- * @onoff: ON/MON bits
+ * @bit: ON/MON bit
- * @reset: reset bits
  */
 struct rzg2l_mod_clk {
 	const char *name;
 	unsigned int id;
 	unsigned int parent;
 	u16 off;
-	u8 onoff;
+	u8 bit;
-	u8 reset;
 };
-#define DEF_MOD(_name, _id, _parent, _off, _onoff, _reset)	\
+#define DEF_MOD(_name, _id, _parent, _off, _bit)	\
-	[_id] = { \
+	{ \
 		.name = _name, \
-		.id = MOD_CLK_BASE + _id, \
+		.id = MOD_CLK_BASE + (_id), \
 		.parent = (_parent), \
 		.off = (_off), \
-		.onoff = (_onoff), \
+		.bit = (_bit), \
-		.reset = (_reset) \
+	}
+/**
+ * struct rzg2l_reset - Reset definitions
+ *
+ * @off: register offset
+ * @bit: reset bit
+ */
+struct rzg2l_reset {
+	u16 off;
+	u8 bit;
+};
+#define DEF_RST(_id, _off, _bit)	\
+	[_id] = { \
+		.off = (_off), \
+		.bit = (_bit) \
 	}
 /**
 	unsigned int num_mod_clks;
 	unsigned int num_hw_mod_clks;
+	/* Resets */
+	const struct rzg2l_reset *resets;
+	unsigned int num_resets;
 	/* Critical Module Clocks that should not be disabled */
 	const unsigned int *crit_mod_clks;
 	unsigned int num_crit_mod_clks;

drivers/cpufreq/longhaul.c+0−2

@@ -942,8 +942,6 @@ static int __init longhaul_init(void) · 941 unmodified lines
942	return cpufreq_register_driver(&longhaul_driver);	942	return cpufreq_register_driver(&longhaul_driver);
943	case 10:	943	case 10:
944	pr_err("Use acpi-cpufreq driver for VIA C7\n");	944	pr_err("Use acpi-cpufreq driver for VIA C7\n");
945	default:
946	;
947	}	945	}
948		946
949	return -ENODEV;	947	return -ENODEV;

drivers/dma-buf/sync_file.c+7−6

 					 struct sync_file *b)
 {
 	struct sync_file *sync_file;
-	struct dma_fence **fences, **nfences, **a_fences, **b_fences;
+	struct dma_fence **fences = NULL, **nfences, **a_fences, **b_fences;
-	int i, i_a, i_b, num_fences, a_num_fences, b_num_fences;
+	int i = 0, i_a, i_b, num_fences, a_num_fences, b_num_fences;
 	sync_file = sync_file_alloc();
 	if (!sync_file)
 	 * If a sync_file can only be created with sync_file_merge
 	 * and sync_file_create, this is a reasonable assumption.
 	 */
-	for (i = i_a = i_b = 0; i_a < a_num_fences && i_b < b_num_fences; ) {
+	for (i_a = i_b = 0; i_a < a_num_fences && i_b < b_num_fences; ) {
 		struct dma_fence *pt_a = a_fences[i_a];
 		struct dma_fence *pt_b = b_fences[i_b];
 		fences = nfences;
 	}
-	if (sync_file_set_fence(sync_file, fences, i) < 0) {
+	if (sync_file_set_fence(sync_file, fences, i) < 0)
-		kfree(fences);
 		goto err;
-	}
 	strlcpy(sync_file->user_name, name, sizeof(sync_file->user_name));
 	return sync_file;
 err:
+	while (i)
+		dma_fence_put(fences[--i]);
+	kfree(fences);
 	fput(sync_file->file);
 	return NULL;

drivers/dma/ipu/ipu_idmac.c+2−0

 	case IDMAC_SDC_1:
 	case IDMAC_IC_7:
 		ipu_channel_set_priority(ipu, channel, true);
+		break;
 	default:
 		break;
 	}
 	case IDMAC_SDC_0:
 	case IDMAC_SDC_1:
 		n_desc = 4;
+		break;
 	default:
 		break;
 	}

drivers/dma/mpc512x_dma.c+1−0

@@ -813,6 +813,7 @@ inline bool is_buswidth_valid(u8 buswidth, bool is_mpc8308) · 812 unmodified lines
813	case 16:	813	case 16:
814	if (is_mpc8308)	814	if (is_mpc8308)
815	return false;	815	return false;
		816	break;
816	case 1:	817	case 1:
817	case 2:	818	case 2:
818	case 4:	819	case 4:

drivers/dma/ti/k3-udma.c+1−0

@@ -4948,6 +4948,7 @@ static int setup_resources(struct udma_dev *ud) · 4947 unmodified lines
4948	ud->tchan_cnt),	4948	ud->tchan_cnt),
4949	ud->rchan_cnt - bitmap_weight(ud->rchan_map,	4949	ud->rchan_cnt - bitmap_weight(ud->rchan_map,
4950	ud->rchan_cnt));	4950	ud->rchan_cnt));
		4951	break;
4951	default:	4952	default:
4952	break;	4953	break;
4953	}	4954	}

drivers/edac/Kconfig+1−1

@@ -271,7 +271,7 @@ config EDAC_PND2 · 270 unmodified lines
271	config EDAC_IGEN6	271	config EDAC_IGEN6
272	tristate "Intel client SoC Integrated MC"	272	tristate "Intel client SoC Integrated MC"
273	depends on PCI && PCI_MMCONFIG && ARCH_HAVE_NMI_SAFE_CMPXCHG	273	depends on PCI && PCI_MMCONFIG && ARCH_HAVE_NMI_SAFE_CMPXCHG
274	depends on X64_64 && X86_MCE_INTEL	274	depends on X86_64 && X86_MCE_INTEL
275	help	275	help
276	Support for error detection and correction on the Intel	276	Support for error detection and correction on the Intel
277	client SoC Integrated Memory Controller using In-Band ECC IP.	277	client SoC Integrated Memory Controller using In-Band ECC IP.

drivers/firmware/arm_ffa/bus.c+3−3

 	struct ffa_driver *ffa_drv = to_ffa_driver(dev->driver);
 	struct ffa_device *ffa_dev = to_ffa_dev(dev);
-	if (!ffa_device_match(dev, dev->driver))
-		return -ENODEV;
 	return ffa_drv->probe(ffa_dev);
 }
 {
 	int ret;
+	if (!driver->probe)
+		return -EINVAL;
 	driver->driver.bus = &ffa_bus_type;
 	driver->driver.name = driver->name;
 	driver->driver.owner = owner;

drivers/firmware/arm_ffa/driver.c+5−3

@@ -120,7 +120,7 @@ · 119 unmodified lines
120	#define PACK_TARGET_INFO(s, r) \	120	#define PACK_TARGET_INFO(s, r) \
121	(FIELD_PREP(SENDER_ID_MASK, (s)) \| FIELD_PREP(RECEIVER_ID_MASK, (r)))	121	(FIELD_PREP(SENDER_ID_MASK, (s)) \| FIELD_PREP(RECEIVER_ID_MASK, (r)))
122		122
123	/**	123	/*
124	* FF-A specification mentions explicitly about '4K pages'. This should	124	* FF-A specification mentions explicitly about '4K pages'. This should
125	* not be confused with the kernel PAGE_SIZE, which is the translation	125	* not be confused with the kernel PAGE_SIZE, which is the translation
126	* granule kernel is configured and may be one among 4K, 16K and 64K.	126	* granule kernel is configured and may be one among 4K, 16K and 64K.
@@ -149,8 +149,10 @@ static const int ffa_linux_errmap[] = { · 22 unmodified lines
149		149
150	static inline int ffa_to_linux_errno(int errno)	150	static inline int ffa_to_linux_errno(int errno)
151	{	151	{
152	if (errno < FFA_RET_SUCCESS && errno >= -ARRAY_SIZE(ffa_linux_errmap))	152	int err_idx = -errno;
153	return ffa_linux_errmap[-errno];	153
		154	if (err_idx >= 0 && err_idx < ARRAY_SIZE(ffa_linux_errmap))
		155	return ffa_linux_errmap[err_idx];
154	return -EINVAL;	156	return -EINVAL;
155	}	157	}
156		158

drivers/firmware/arm_scmi/bus.c+3−5

 {
 	struct scmi_driver *scmi_drv = to_scmi_driver(dev->driver);
 	struct scmi_device *scmi_dev = to_scmi_dev(dev);
-	const struct scmi_device_id *id;
-	id = scmi_dev_match_id(scmi_dev, scmi_drv);
-	if (!id)
-		return -ENODEV;
 	if (!scmi_dev->handle)
 		return -EPROBE_DEFER;
 {
 	int retval;
+	if (!driver->probe)
+		return -EINVAL;
 	retval = scmi_protocol_device_request(driver->id_table);
 	if (retval)
 		return retval;

drivers/firmware/arm_scmi/driver.c+9−5

@@ -47,7 +47,6 @@ enum scmi_error_codes { · 46 unmodified lines
47	SCMI_ERR_GENERIC = -8, /* Generic Error */	47	SCMI_ERR_GENERIC = -8, /* Generic Error */
48	SCMI_ERR_HARDWARE = -9, /* Hardware Error */	48	SCMI_ERR_HARDWARE = -9, /* Hardware Error */
49	SCMI_ERR_PROTOCOL = -10,/* Protocol Error */	49	SCMI_ERR_PROTOCOL = -10,/* Protocol Error */
50	SCMI_ERR_MAX
51	};	50	};
52		51
53	/* List of all SCMI devices active in system */	52	/* List of all SCMI devices active in system */
@@ -166,8 +165,10 @@ static const int scmi_linux_errmap[] = { · 112 unmodified lines
166		165
167	static inline int scmi_to_linux_errno(int errno)	166	static inline int scmi_to_linux_errno(int errno)
168	{	167	{
169	if (errno < SCMI_SUCCESS && errno > SCMI_ERR_MAX)	168	int err_idx = -errno;
170	return scmi_linux_errmap[-errno];	169
		170	if (err_idx >= SCMI_SUCCESS && err_idx < ARRAY_SIZE(scmi_linux_errmap))
		171	return scmi_linux_errmap[err_idx];
171	return -EIO;	172	return -EIO;
172	}	173	}
173		174
@@ -1025,8 +1026,9 @@ static int __scmi_xfer_info_init(struct scmi_info *sinfo, · 851 unmodified lines
1025	const struct scmi_desc *desc = sinfo->desc;	1026	const struct scmi_desc *desc = sinfo->desc;
1026		1027
1027	/* Pre-allocated messages, no more than what hdr.seq can support */	1028	/* Pre-allocated messages, no more than what hdr.seq can support */
1028	if (WARN_ON(desc->max_msg >= MSG_TOKEN_MAX)) {	1029	if (WARN_ON(!desc->max_msg \|\| desc->max_msg > MSG_TOKEN_MAX)) {
1029	dev_err(dev, "Maximum message of %d exceeds supported %ld\n",	1030	dev_err(dev,
		1031	"Invalid maximum messages %d, not in range [1 - %lu]\n",
1030	desc->max_msg, MSG_TOKEN_MAX);	1032	desc->max_msg, MSG_TOKEN_MAX);
1031	return -EINVAL;	1033	return -EINVAL;
1032	}	1034	}
@@ -1137,6 +1139,8 @@ scmi_txrx_setup(struct scmi_info info, struct device dev, int prot_id) · 104 unmodified lines
1137	* @proto_id and @name: if device was still not existent it is created as a	1139	* @proto_id and @name: if device was still not existent it is created as a
1138	* child of the specified SCMI instance @info and its transport properly	1140	* child of the specified SCMI instance @info and its transport properly
1139	* initialized as usual.	1141	* initialized as usual.
		1142	*
		1143	* Return: A properly initialized scmi device, NULL otherwise.
1140	*/	1144	*/
1141	static inline struct scmi_device *	1145	static inline struct scmi_device *
1142	scmi_get_protocol_device(struct device_node np, struct scmi_info info,	1146	scmi_get_protocol_device(struct device_node np, struct scmi_info info,

drivers/firmware/arm_scmi/notify.c+4−0

  *
  * Generic devres managed helper to register a notifier_block against a
  * protocol event.
+ *
+ * Return: 0 on Success
  */
 static int scmi_devm_notifier_register(struct scmi_device *sdev,
 				       u8 proto_id, u8 evt_id,
  * Generic devres managed helper to explicitly un-register a notifier_block
  * against a protocol event, which was previously registered using the above
  * @scmi_devm_notifier_register.
+ *
+ * Return: 0 on Success
  */
 static int scmi_devm_notifier_unregister(struct scmi_device *sdev,
 					 u8 proto_id, u8 evt_id,

drivers/firmware/arm_scmi/sensors.c+4−2

 struct scmi_resp_sensor_reading_complete {
 	__le32 id;
-	__le64 readings;
+	__le32 readings_low;
+	__le32 readings_high;
 };
 struct scmi_sensor_reading_resp {
 			resp = t->rx.buf;
 			if (le32_to_cpu(resp->id) == sensor_id)
-				*value = get_unaligned_le64(&resp->readings);
+				*value =
+					get_unaligned_le64(&resp->readings_low);
 			else
 				ret = -EPROTO;
 		}

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h+1−1

@@ -269,7 +269,7 @@ int amdgpu_amdkfd_gpuvm_free_memory_of_gpu( · 268 unmodified lines
269	struct kgd_dev kgd, struct kgd_mem mem, void *drm_priv,	269	struct kgd_dev kgd, struct kgd_mem mem, void *drm_priv,
270	uint64_t *size);	270	uint64_t *size);
271	int amdgpu_amdkfd_gpuvm_map_memory_to_gpu(	271	int amdgpu_amdkfd_gpuvm_map_memory_to_gpu(
272	struct kgd_dev kgd, struct kgd_mem mem, void drm_priv, bool table_freed);	272	struct kgd_dev kgd, struct kgd_mem mem, void *drm_priv);
273	int amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu(	273	int amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu(
274	struct kgd_dev kgd, struct kgd_mem mem, void *drm_priv);	274	struct kgd_dev kgd, struct kgd_mem mem, void *drm_priv);
275	int amdgpu_amdkfd_gpuvm_sync_memory(	275	int amdgpu_amdkfd_gpuvm_sync_memory(

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c+9−13

 static int update_gpuvm_pte(struct kgd_mem *mem,
 			    struct kfd_mem_attachment *entry,
-			    struct amdgpu_sync *sync,
+			    struct amdgpu_sync *sync)
-			    bool *table_freed)
 {
 	struct amdgpu_bo_va *bo_va = entry->bo_va;
 	struct amdgpu_device *adev = entry->adev;
 		return ret;
 	/* Update the page tables  */
-	ret = amdgpu_vm_bo_update(adev, bo_va, false, table_freed);
+	ret = amdgpu_vm_bo_update(adev, bo_va, false);
 	if (ret) {
 		pr_err("amdgpu_vm_bo_update failed\n");
 		return ret;
 static int map_bo_to_gpuvm(struct kgd_mem *mem,
 			   struct kfd_mem_attachment *entry,
 			   struct amdgpu_sync *sync,
-			   bool no_update_pte,
+			   bool no_update_pte)
-			   bool *table_freed)
 {
 	int ret;
 	if (no_update_pte)
 		return 0;
-	ret = update_gpuvm_pte(mem, entry, sync, table_freed);
+	ret = update_gpuvm_pte(mem, entry, sync);
 	if (ret) {
 		pr_err("update_gpuvm_pte() failed\n");
 		goto update_gpuvm_pte_failed;
 		domain = alloc_domain = AMDGPU_GEM_DOMAIN_VRAM;
 		alloc_flags = AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE;
 		alloc_flags |= (flags & KFD_IOC_ALLOC_MEM_FLAGS_PUBLIC) ?
-			AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED :
+			AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED : 0;
-			AMDGPU_GEM_CREATE_NO_CPU_ACCESS;
 	} else if (flags & KFD_IOC_ALLOC_MEM_FLAGS_GTT) {
 		domain = alloc_domain = AMDGPU_GEM_DOMAIN_GTT;
 		alloc_flags = 0;
 }
 int amdgpu_amdkfd_gpuvm_map_memory_to_gpu(
-		struct kgd_dev *kgd, struct kgd_mem *mem,
+		struct kgd_dev *kgd, struct kgd_mem *mem, void *drm_priv)
-		void *drm_priv, bool *table_freed)
 {
 	struct amdgpu_device *adev = get_amdgpu_device(kgd);
 	struct amdgpu_vm *avm = drm_priv_to_vm(drm_priv);
 			 entry->va, entry->va + bo_size, entry);
 		ret = map_bo_to_gpuvm(mem, entry, ctx.sync,
-				      is_invalid_userptr, table_freed);
+				      is_invalid_userptr);
 		if (ret) {
 			pr_err("Failed to map bo to gpuvm\n");
 			goto out_unreserve;
 				continue;
 			kfd_mem_dmaunmap_attachment(mem, attachment);
-			ret = update_gpuvm_pte(mem, attachment, &sync, NULL);
+			ret = update_gpuvm_pte(mem, attachment, &sync);
 			if (ret) {
 				pr_err("%s: update PTE failed\n", __func__);
 				/* make sure this gets validated again */
 				continue;
 			kfd_mem_dmaunmap_attachment(mem, attachment);
-			ret = update_gpuvm_pte(mem, attachment, &sync_obj, NULL);
+			ret = update_gpuvm_pte(mem, attachment, &sync_obj);
 			if (ret) {
 				pr_debug("Memory eviction: update PTE failed. Try again\n");
 				goto validate_map_fail;

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c+3−3

@@ -781,7 +781,7 @@ static int amdgpu_cs_vm_handling(struct amdgpu_cs_parser *p) · 780 unmodified lines
781	if (r)	781	if (r)
782	return r;	782	return r;
783		783
784	r = amdgpu_vm_bo_update(adev, fpriv->prt_va, false, NULL);	784	r = amdgpu_vm_bo_update(adev, fpriv->prt_va, false);
785	if (r)	785	if (r)
786	return r;	786	return r;
787		787
@@ -792,7 +792,7 @@ static int amdgpu_cs_vm_handling(struct amdgpu_cs_parser *p) · 4 unmodified lines
792	if (amdgpu_mcbp \|\| amdgpu_sriov_vf(adev)) {	792	if (amdgpu_mcbp \|\| amdgpu_sriov_vf(adev)) {
793	bo_va = fpriv->csa_va;	793	bo_va = fpriv->csa_va;
794	BUG_ON(!bo_va);	794	BUG_ON(!bo_va);
795	r = amdgpu_vm_bo_update(adev, bo_va, false, NULL);	795	r = amdgpu_vm_bo_update(adev, bo_va, false);
796	if (r)	796	if (r)
797	return r;	797	return r;
798		798
@@ -811,7 +811,7 @@ static int amdgpu_cs_vm_handling(struct amdgpu_cs_parser *p) · 12 unmodified lines
811	if (bo_va == NULL)	811	if (bo_va == NULL)
812	continue;	812	continue;
813		813
814	r = amdgpu_vm_bo_update(adev, bo_va, false, NULL);	814	r = amdgpu_vm_bo_update(adev, bo_va, false);
815	if (r)	815	if (r)
816	return r;	816	return r;
817		817

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c+1−0

@@ -1168,6 +1168,7 @@ static const struct pci_device_id pciidlist[] = { · 1167 unmodified lines
1168	{0x1002, 0x734F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI14},	1168	{0x1002, 0x734F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI14},
1169		1169
1170	/* Renoir */	1170	/* Renoir */
		1171	{0x1002, 0x15E7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RENOIR\|AMD_IS_APU},
1171	{0x1002, 0x1636, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RENOIR\|AMD_IS_APU},	1172	{0x1002, 0x1636, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RENOIR\|AMD_IS_APU},
1172	{0x1002, 0x1638, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RENOIR\|AMD_IS_APU},	1173	{0x1002, 0x1638, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RENOIR\|AMD_IS_APU},
1173	{0x1002, 0x164C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RENOIR\|AMD_IS_APU},	1174	{0x1002, 0x164C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RENOIR\|AMD_IS_APU},

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c+1−1

@@ -612,7 +612,7 @@ static void amdgpu_gem_va_update_vm(struct amdgpu_device *adev, · 611 unmodified lines
612		612
613	if (operation == AMDGPU_VA_OP_MAP \|\|	613	if (operation == AMDGPU_VA_OP_MAP \|\|
614	operation == AMDGPU_VA_OP_REPLACE) {	614	operation == AMDGPU_VA_OP_REPLACE) {
615	r = amdgpu_vm_bo_update(adev, bo_va, false, NULL);	615	r = amdgpu_vm_bo_update(adev, bo_va, false);
616	if (r)	616	if (r)
617	goto error;	617	goto error;
618	}	618	}

drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c+18−0

@@ -278,6 +278,21 @@ static bool amdgpu_msi_ok(struct amdgpu_device *adev) · 277 unmodified lines
278	return true;	278	return true;
279	}	279	}
280		280
		281	static void amdgpu_restore_msix(struct amdgpu_device *adev)
		282	{
		283	u16 ctrl;
		284
		285	pci_read_config_word(adev->pdev, adev->pdev->msix_cap + PCI_MSIX_FLAGS, &ctrl);
		286	if (!(ctrl & PCI_MSIX_FLAGS_ENABLE))
		287	return;
		288
		289	/* VF FLR */
		290	ctrl &= ~PCI_MSIX_FLAGS_ENABLE;
		291	pci_write_config_word(adev->pdev, adev->pdev->msix_cap + PCI_MSIX_FLAGS, ctrl);
		292	ctrl \|= PCI_MSIX_FLAGS_ENABLE;
		293	pci_write_config_word(adev->pdev, adev->pdev->msix_cap + PCI_MSIX_FLAGS, ctrl);
		294	}
		295
281	/**	296	/**
282	* amdgpu_irq_init - initialize interrupt handling	297	* amdgpu_irq_init - initialize interrupt handling
283	*	298	*
@@ -569,6 +584,9 @@ void amdgpu_irq_gpu_reset_resume_helper(struct amdgpu_device *adev) · 285 unmodified lines
569	{	584	{
570	int i, j, k;	585	int i, j, k;
571		586
		587	if (amdgpu_sriov_vf(adev))
		588	amdgpu_restore_msix(adev);
		589
572	for (i = 0; i < AMDGPU_IRQ_CLIENTID_MAX; ++i) {	590	for (i = 0; i < AMDGPU_IRQ_CLIENTID_MAX; ++i) {
573	if (!adev->irq.client[i].sources)	591	if (!adev->irq.client[i].sources)
574	continue;	592	continue;

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c+35−14

 /* query/inject/cure begin */
 int amdgpu_ras_query_error_status(struct amdgpu_device *adev,
-	struct ras_query_if *info)
+				  struct ras_query_if *info)
 {
 	struct ras_manager *obj = amdgpu_ras_find_obj(adev, &info->head);
 	struct ras_err_data err_data = {0, 0, 0, NULL};
 	return ret;
 }
-/* get the total error counts on all IPs */
+/**
-void amdgpu_ras_query_error_count(struct amdgpu_device *adev,
+ * amdgpu_ras_query_error_count -- Get error counts of all IPs
-				  unsigned long *ce_count,
+ * adev: pointer to AMD GPU device
-				  unsigned long *ue_count)
+ * ce_count: pointer to an integer to be set to the count of correctible errors.
+ * ue_count: pointer to an integer to be set to the count of uncorrectible
+ * errors.
+ *
+ * If set, @ce_count or @ue_count, count and return the corresponding
+ * error counts in those integer pointers. Return 0 if the device
+ * supports RAS. Return -EOPNOTSUPP if the device doesn't support RAS.
+ */
+int amdgpu_ras_query_error_count(struct amdgpu_device *adev,
+				 unsigned long *ce_count,
+				 unsigned long *ue_count)
 {
 	struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
 	struct ras_manager *obj;
 	unsigned long ce, ue;
 	if (!adev->ras_enabled || !con)
-		return;
+		return -EOPNOTSUPP;
+	/* Don't count since no reporting.
+	 */
+	if (!ce_count && !ue_count)
+		return 0;
 	ce = 0;
 	ue = 0;
 		struct ras_query_if info = {
 			.head = obj->head,
 		};
+		int res;
-		if (amdgpu_ras_query_error_status(adev, &info))
+		res = amdgpu_ras_query_error_status(adev, &info);
-			return;
+		if (res)
+			return res;
 		ce += info.ce_count;
 		ue += info.ue_count;
 	if (ue_count)
 		*ue_count = ue;
+	return 0;
 }
 /* query/inject/cure end */
 	/* Cache new values.
 	 */
-	amdgpu_ras_query_error_count(adev, &ce_count, &ue_count);
+	if (amdgpu_ras_query_error_count(adev, &ce_count, &ue_count) == 0) {
-	atomic_set(&con->ras_ce_count, ce_count);
+		atomic_set(&con->ras_ce_count, ce_count);
-	atomic_set(&con->ras_ue_count, ue_count);
+		atomic_set(&con->ras_ue_count, ue_count);
+	}
 	pm_runtime_mark_last_busy(dev->dev);
 Out:
 	/* Those are the cached values at init.
 	 */
-	amdgpu_ras_query_error_count(adev, &ce_count, &ue_count);
+	if (amdgpu_ras_query_error_count(adev, &ce_count, &ue_count) == 0) {
-	atomic_set(&con->ras_ce_count, ce_count);
+		atomic_set(&con->ras_ce_count, ce_count);
-	atomic_set(&con->ras_ue_count, ue_count);
+		atomic_set(&con->ras_ue_count, ue_count);
+	}
 	return 0;
 cleanup:

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h+3−3

@@ -490,9 +490,9 @@ int amdgpu_ras_request_reset_on_boot(struct amdgpu_device *adev, · 489 unmodified lines
490	void amdgpu_ras_resume(struct amdgpu_device *adev);	490	void amdgpu_ras_resume(struct amdgpu_device *adev);
491	void amdgpu_ras_suspend(struct amdgpu_device *adev);	491	void amdgpu_ras_suspend(struct amdgpu_device *adev);
492		492
493	void amdgpu_ras_query_error_count(struct amdgpu_device *adev,	493	int amdgpu_ras_query_error_count(struct amdgpu_device *adev,
494	unsigned long *ce_count,	494	unsigned long *ce_count,
495	unsigned long *ue_count);	495	unsigned long *ue_count);
496		496
497	/* error handling functions */	497	/* error handling functions */
498	int amdgpu_ras_add_bad_pages(struct amdgpu_device *adev,	498	int amdgpu_ras_add_bad_pages(struct amdgpu_device *adev,

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c+5−6

 	r = vm->update_funcs->commit(&params, fence);
 	if (table_freed)
-		*table_freed = *table_freed || params.table_freed;
+		*table_freed = params.table_freed;
 error_unlock:
 	amdgpu_vm_eviction_unlock(vm);
  * @adev: amdgpu_device pointer
  * @bo_va: requested BO and VM object
  * @clear: if true clear the entries
- * @table_freed: return true if page table is freed
  *
  * Fill in the page table entries for @bo_va.
  *
  * 0 for success, -EINVAL for failure.
  */
 int amdgpu_vm_bo_update(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va,
-			bool clear, bool *table_freed)
+			bool clear)
 {
 	struct amdgpu_bo *bo = bo_va->base.bo;
 	struct amdgpu_vm *vm = bo_va->base.vm;
 						resv, mapping->start,
 						mapping->last, update_flags,
 						mapping->offset, mem,
-						pages_addr, last_update, table_freed);
+						pages_addr, last_update, NULL);
 		if (r)
 			return r;
 	}
 	list_for_each_entry_safe(bo_va, tmp, &vm->moved, base.vm_status) {
 		/* Per VM BOs never need to bo cleared in the page tables */
-		r = amdgpu_vm_bo_update(adev, bo_va, false, NULL);
+		r = amdgpu_vm_bo_update(adev, bo_va, false);
 		if (r)
 			return r;
 	}
 		else
 			clear = true;
-		r = amdgpu_vm_bo_update(adev, bo_va, clear, NULL);
+		r = amdgpu_vm_bo_update(adev, bo_va, clear);
 		if (r)
 			return r;

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h+1−1

@@ -406,7 +406,7 @@ int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev, · 405 unmodified lines
406	struct dma_fence *fence, bool free_table);	406	struct dma_fence *fence, bool free_table);
407	int amdgpu_vm_bo_update(struct amdgpu_device *adev,	407	int amdgpu_vm_bo_update(struct amdgpu_device *adev,
408	struct amdgpu_bo_va *bo_va,	408	struct amdgpu_bo_va *bo_va,
409	bool clear, bool *table_freed);	409	bool clear);
410	bool amdgpu_vm_evictable(struct amdgpu_bo *bo);	410	bool amdgpu_vm_evictable(struct amdgpu_bo *bo);
411	void amdgpu_vm_bo_invalidate(struct amdgpu_device *adev,	411	void amdgpu_vm_bo_invalidate(struct amdgpu_device *adev,
412	struct amdgpu_bo *bo, bool evicted);	412	struct amdgpu_bo *bo, bool evicted);

drivers/gpu/drm/amd/amdgpu/dce_virtual.c+1−1

@@ -766,7 +766,7 @@ static const struct amdgpu_irq_src_funcs dce_virtual_crtc_irq_funcs = { · 765 unmodified lines
766		766
767	static void dce_virtual_set_irq_funcs(struct amdgpu_device *adev)	767	static void dce_virtual_set_irq_funcs(struct amdgpu_device *adev)
768	{	768	{
769	adev->crtc_irq.num_types = AMDGPU_CRTC_IRQ_VBLANK6 + 1;	769	adev->crtc_irq.num_types = adev->mode_info.num_crtc;
770	adev->crtc_irq.funcs = &dce_virtual_crtc_irq_funcs;	770	adev->crtc_irq.funcs = &dce_virtual_crtc_irq_funcs;
771	}	771	}
772		772

drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c+2−2

@@ -252,7 +252,7 @@ static void xgpu_ai_mailbox_flr_work(struct work_struct *work) · 251 unmodified lines
252	* otherwise the mailbox msg will be ruined/reseted by	252	* otherwise the mailbox msg will be ruined/reseted by
253	* the VF FLR.	253	* the VF FLR.
254	*/	254	*/
255	if (!down_read_trylock(&adev->reset_sem))	255	if (!down_write_trylock(&adev->reset_sem))
256	return;	256	return;
257		257
258	amdgpu_virt_fini_data_exchange(adev);	258	amdgpu_virt_fini_data_exchange(adev);
@@ -268,7 +268,7 @@ static void xgpu_ai_mailbox_flr_work(struct work_struct *work) · 9 unmodified lines
268		268
269	flr_done:	269	flr_done:
270	atomic_set(&adev->in_gpu_reset, 0);	270	atomic_set(&adev->in_gpu_reset, 0);
271	up_read(&adev->reset_sem);	271	up_write(&adev->reset_sem);
272		272
273	/* Trigger recovery for world switch failure if no TDR */	273	/* Trigger recovery for world switch failure if no TDR */
274	if (amdgpu_device_should_recover_gpu(adev)	274	if (amdgpu_device_should_recover_gpu(adev)

drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c+2−2

@@ -273,7 +273,7 @@ static void xgpu_nv_mailbox_flr_work(struct work_struct *work) · 272 unmodified lines
273	* otherwise the mailbox msg will be ruined/reseted by	273	* otherwise the mailbox msg will be ruined/reseted by
274	* the VF FLR.	274	* the VF FLR.
275	*/	275	*/
276	if (!down_read_trylock(&adev->reset_sem))	276	if (!down_write_trylock(&adev->reset_sem))
277	return;	277	return;
278		278
279	amdgpu_virt_fini_data_exchange(adev);	279	amdgpu_virt_fini_data_exchange(adev);
@@ -289,7 +289,7 @@ static void xgpu_nv_mailbox_flr_work(struct work_struct *work) · 9 unmodified lines
289		289
290	flr_done:	290	flr_done:
291	atomic_set(&adev->in_gpu_reset, 0);	291	atomic_set(&adev->in_gpu_reset, 0);
292	up_read(&adev->reset_sem);	292	up_write(&adev->reset_sem);
293		293
294	/* Trigger recovery for world switch failure if no TDR */	294	/* Trigger recovery for world switch failure if no TDR */
295	if (amdgpu_device_should_recover_gpu(adev)	295	if (amdgpu_device_should_recover_gpu(adev)

drivers/gpu/drm/amd/amdkfd/kfd_chardev.c+12−33

 	long err = 0;
 	int i;
 	uint32_t *devices_arr = NULL;
-	bool table_freed = false;
 	dev = kfd_device_by_id(GET_GPU_ID(args->handle));
 	if (!dev)
 			goto get_mem_obj_from_handle_failed;
 		}
 		err = amdgpu_amdkfd_gpuvm_map_memory_to_gpu(
-			peer->kgd, (struct kgd_mem *)mem,
+			peer->kgd, (struct kgd_mem *)mem, peer_pdd->drm_priv);
-			peer_pdd->drm_priv, &table_freed);
 		if (err) {
 			pr_err("Failed to map to gpu %d/%d\n",
 			       i, args->n_devices);
 	}
 	/* Flush TLBs after waiting for the page table updates to complete */
-	if (table_freed) {
+	for (i = 0; i < args->n_devices; i++) {
-		for (i = 0; i < args->n_devices; i++) {
+		peer = kfd_device_by_id(devices_arr[i]);
-			peer = kfd_device_by_id(devices_arr[i]);
+		if (WARN_ON_ONCE(!peer))
-			if (WARN_ON_ONCE(!peer))
+			continue;
-				continue;
+		peer_pdd = kfd_get_process_device_data(peer, p);
-			peer_pdd = kfd_get_process_device_data(peer, p);
+		if (WARN_ON_ONCE(!peer_pdd))
-			if (WARN_ON_ONCE(!peer_pdd))
+			continue;
-				continue;
+		kfd_flush_tlb(peer_pdd, TLB_FLUSH_LEGACY);
-			kfd_flush_tlb(peer_pdd, TLB_FLUSH_LEGACY);
-		}
 	}
 	kfree(devices_arr);
 	return err;
 		}
 		args->n_success = i+1;
 	}
-	mutex_unlock(&p->mutex);
-	err = amdgpu_amdkfd_gpuvm_sync_memory(dev->kgd, (struct kgd_mem *) mem, true);
-	if (err) {
-		pr_debug("Sync memory failed, wait interrupted by user signal\n");
-		goto sync_memory_failed;
-	}
-	/* Flush TLBs after waiting for the page table updates to complete */
-	for (i = 0; i < args->n_devices; i++) {
-		peer = kfd_device_by_id(devices_arr[i]);
-		if (WARN_ON_ONCE(!peer))
-			continue;
-		peer_pdd = kfd_get_process_device_data(peer, p);
-		if (WARN_ON_ONCE(!peer_pdd))
-			continue;
-		kfd_flush_tlb(peer_pdd, TLB_FLUSH_HEAVYWEIGHT);
-	}
 	kfree(devices_arr);
+	mutex_unlock(&p->mutex);
 	return 0;
 bind_process_to_device_failed:
 unmap_memory_from_gpu_failed:
 	mutex_unlock(&p->mutex);
 copy_from_user_failed:
-sync_memory_failed:
 	kfree(devices_arr);
 	return err;
 }

drivers/gpu/drm/amd/amdkfd/kfd_process.c+1−2

@@ -714,8 +714,7 @@ static int kfd_process_alloc_gpuvm(struct kfd_process_device *pdd, · 713 unmodified lines
714	if (err)	714	if (err)
715	goto err_alloc_mem;	715	goto err_alloc_mem;
716		716
717	err = amdgpu_amdkfd_gpuvm_map_memory_to_gpu(kdev->kgd, mem,	717	err = amdgpu_amdkfd_gpuvm_map_memory_to_gpu(kdev->kgd, mem, pdd->drm_priv);
718	pdd->drm_priv, NULL);
719	if (err)	718	if (err)
720	goto err_map_mem;	719	goto err_map_mem;
721		720

drivers/gpu/drm/amd/amdkfd/kfd_svm.c+18−12

 static void
 svm_range_count_fault(struct amdgpu_device *adev, struct kfd_process *p,
-		      struct svm_range *prange, int32_t gpuidx)
+		      int32_t gpuidx)
 {
 	struct kfd_process_device *pdd;
-	if (gpuidx == MAX_GPU_INSTANCE)
+	/* fault is on different page of same range
-		/* fault is on different page of same range
+	 * or fault is skipped to recover later
-		 * or fault is skipped to recover later
+	 * or fault is on invalid virtual address
-		 */
+	 */
-		pdd = svm_range_get_pdd_by_adev(prange, adev);
+	if (gpuidx == MAX_GPU_INSTANCE) {
-	else
+		uint32_t gpuid;
-		/* fault recovered
+		int r;
-		 * or fault cannot recover because GPU no access on the range
-		 */
-		pdd = kfd_process_device_from_gpuidx(p, gpuidx);
+		r = kfd_process_gpuid_from_kgd(p, adev, &gpuid, &gpuidx);
+		if (r < 0)
+			return;
+	}
+	/* fault is recovered
+	 * or fault cannot recover because GPU no access on the range
+	 */
+	pdd = kfd_process_device_from_gpuidx(p, gpuidx);
 	if (pdd)
 		WRITE_ONCE(pdd->faults, pdd->faults + 1);
 }
 	mutex_unlock(&svms->lock);
 	mmap_read_unlock(mm);
-	svm_range_count_fault(adev, p, prange, gpuidx);
+	svm_range_count_fault(adev, p, gpuidx);
 	mmput(mm);
 out:

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c+1−1

@@ -9191,7 +9191,7 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state) · 9190 unmodified lines
9191	#if defined(CONFIG_BACKLIGHT_CLASS_DEVICE) \|\| \	9191	#if defined(CONFIG_BACKLIGHT_CLASS_DEVICE) \|\| \
9192	defined(CONFIG_BACKLIGHT_CLASS_DEVICE_MODULE)	9192	defined(CONFIG_BACKLIGHT_CLASS_DEVICE_MODULE)
9193	/* restore the backlight level */	9193	/* restore the backlight level */
9194	if (dm->backlight_dev)	9194	if (dm->backlight_dev && (amdgpu_dm_backlight_get_level(dm) != dm->brightness[0]))
9195	amdgpu_dm_backlight_set_level(dm, dm->brightness[0]);	9195	amdgpu_dm_backlight_set_level(dm, dm->brightness[0]);
9196	#endif	9196	#endif
9197	/*	9197	/*

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.c+2−2

@@ -31,8 +31,8 @@ · 30 unmodified lines
31	#include "dcn31_smu.h"	31	#include "dcn31_smu.h"
32		32
33	#include "yellow_carp_offset.h"	33	#include "yellow_carp_offset.h"
34	#include "mp/mp_13_0_1_offset.h"	34	#include "mp/mp_13_0_2_offset.h"
35	#include "mp/mp_13_0_1_sh_mask.h"	35	#include "mp/mp_13_0_2_sh_mask.h"
36		36
37	#define REG(reg_name) \	37	#define REG(reg_name) \
38	(MP0_BASE.instance[0].segment[reg ## reg_name ## _BASE_IDX] + reg ## reg_name)	38	(MP0_BASE.instance[0].segment[reg ## reg_name ## _BASE_IDX] + reg ## reg_name)

drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c+4−4

 {
 	enum dc_status status = DC_OK;
-	if (lt_settings->lttpr_mode == LTTPR_MODE_NON_TRANSPARENT)
+	if (lt_settings->lttpr_mode == LTTPR_MODE_TRANSPARENT)
-		status = configure_lttpr_mode_non_transparent(link, lt_settings);
-	else
 		status = configure_lttpr_mode_transparent(link);
+	else if (lt_settings->lttpr_mode == LTTPR_MODE_NON_TRANSPARENT)
+		status = configure_lttpr_mode_non_transparent(link, lt_settings);
 	return status;
 }
 		link_enc = stream->link_enc;
 	else
 		link_enc = link->link_enc;
-	ASSERT(link_enc);
 	/* We need to do this before the link training to ensure the idle pattern in SST
 	 * mode will be sent right after the link training

drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hwseq.c+1−1

@@ -390,7 +390,7 @@ void dcn31_update_info_frame(struct pipe_ctx *pipe_ctx) · 389 unmodified lines
390	is_hdmi_tmds = dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal);	390	is_hdmi_tmds = dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal);
391	is_dp = dc_is_dp_signal(pipe_ctx->stream->signal);	391	is_dp = dc_is_dp_signal(pipe_ctx->stream->signal);
392		392
393	if (!is_hdmi_tmds)	393	if (!is_hdmi_tmds && !is_dp)
394	return;	394	return;
395		395
396	if (is_hdmi_tmds)	396	if (is_hdmi_tmds)

drivers/gpu/drm/amd/include/asic_reg/mp/mp_13_0_1_offset.h+0−355

@@ -1,355 +0,0 @@
1	/*
2	* Copyright 2020 Advanced Micro Devices, Inc.
3	*
4	* Permission is hereby granted, free of charge, to any person obtaining a
5	* copy of this software and associated documentation files (the "Software"),
6	* to deal in the Software without restriction, including without limitation
7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8	* and/or sell copies of the Software, and to permit persons to whom the
9	* Software is furnished to do so, subject to the following conditions:
10	*
11	* The above copyright notice and this permission notice shall be included in
12	* all copies or substantial portions of the Software.
13	*
14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20	* OTHER DEALINGS IN THE SOFTWARE.
21	*
22	*
23	*/
24	#ifndef _mp_13_0_1_OFFSET_HEADER
25	#define _mp_13_0_1_OFFSET_HEADER
26
27
28
29	// addressBlock: mp_SmuMp0_SmnDec
30	// base address: 0x0
31	#define regMP0_SMN_C2PMSG_32 0x0060
32	#define regMP0_SMN_C2PMSG_32_BASE_IDX 0
33	#define regMP0_SMN_C2PMSG_33 0x0061
34	#define regMP0_SMN_C2PMSG_33_BASE_IDX 0
35	#define regMP0_SMN_C2PMSG_34 0x0062
36	#define regMP0_SMN_C2PMSG_34_BASE_IDX 0
37	#define regMP0_SMN_C2PMSG_35 0x0063
38	#define regMP0_SMN_C2PMSG_35_BASE_IDX 0
39	#define regMP0_SMN_C2PMSG_36 0x0064
40	#define regMP0_SMN_C2PMSG_36_BASE_IDX 0
41	#define regMP0_SMN_C2PMSG_37 0x0065
42	#define regMP0_SMN_C2PMSG_37_BASE_IDX 0
43	#define regMP0_SMN_C2PMSG_38 0x0066
44	#define regMP0_SMN_C2PMSG_38_BASE_IDX 0
45	#define regMP0_SMN_C2PMSG_39 0x0067
46	#define regMP0_SMN_C2PMSG_39_BASE_IDX 0
47	#define regMP0_SMN_C2PMSG_40 0x0068
48	#define regMP0_SMN_C2PMSG_40_BASE_IDX 0
49	#define regMP0_SMN_C2PMSG_41 0x0069
50	#define regMP0_SMN_C2PMSG_41_BASE_IDX 0
51	#define regMP0_SMN_C2PMSG_42 0x006a
52	#define regMP0_SMN_C2PMSG_42_BASE_IDX 0
53	#define regMP0_SMN_C2PMSG_43 0x006b
54	#define regMP0_SMN_C2PMSG_43_BASE_IDX 0
55	#define regMP0_SMN_C2PMSG_44 0x006c
56	#define regMP0_SMN_C2PMSG_44_BASE_IDX 0
57	#define regMP0_SMN_C2PMSG_45 0x006d
58	#define regMP0_SMN_C2PMSG_45_BASE_IDX 0
59	#define regMP0_SMN_C2PMSG_46 0x006e
60	#define regMP0_SMN_C2PMSG_46_BASE_IDX 0
61	#define regMP0_SMN_C2PMSG_47 0x006f
62	#define regMP0_SMN_C2PMSG_47_BASE_IDX 0
63	#define regMP0_SMN_C2PMSG_48 0x0070
64	#define regMP0_SMN_C2PMSG_48_BASE_IDX 0
65	#define regMP0_SMN_C2PMSG_49 0x0071
66	#define regMP0_SMN_C2PMSG_49_BASE_IDX 0
67	#define regMP0_SMN_C2PMSG_50 0x0072
68	#define regMP0_SMN_C2PMSG_50_BASE_IDX 0
69	#define regMP0_SMN_C2PMSG_51 0x0073
70	#define regMP0_SMN_C2PMSG_51_BASE_IDX 0
71	#define regMP0_SMN_C2PMSG_52 0x0074
72	#define regMP0_SMN_C2PMSG_52_BASE_IDX 0
73	#define regMP0_SMN_C2PMSG_53 0x0075
74	#define regMP0_SMN_C2PMSG_53_BASE_IDX 0
75	#define regMP0_SMN_C2PMSG_54 0x0076
76	#define regMP0_SMN_C2PMSG_54_BASE_IDX 0
77	#define regMP0_SMN_C2PMSG_55 0x0077
78	#define regMP0_SMN_C2PMSG_55_BASE_IDX 0
79	#define regMP0_SMN_C2PMSG_56 0x0078
80	#define regMP0_SMN_C2PMSG_56_BASE_IDX 0
81	#define regMP0_SMN_C2PMSG_57 0x0079
82	#define regMP0_SMN_C2PMSG_57_BASE_IDX 0
83	#define regMP0_SMN_C2PMSG_58 0x007a
84	#define regMP0_SMN_C2PMSG_58_BASE_IDX 0
85	#define regMP0_SMN_C2PMSG_59 0x007b
86	#define regMP0_SMN_C2PMSG_59_BASE_IDX 0
87	#define regMP0_SMN_C2PMSG_60 0x007c
88	#define regMP0_SMN_C2PMSG_60_BASE_IDX 0
89	#define regMP0_SMN_C2PMSG_61 0x007d
90	#define regMP0_SMN_C2PMSG_61_BASE_IDX 0
91	#define regMP0_SMN_C2PMSG_62 0x007e
92	#define regMP0_SMN_C2PMSG_62_BASE_IDX 0
93	#define regMP0_SMN_C2PMSG_63 0x007f
94	#define regMP0_SMN_C2PMSG_63_BASE_IDX 0
95	#define regMP0_SMN_C2PMSG_64 0x0080
96	#define regMP0_SMN_C2PMSG_64_BASE_IDX 0
97	#define regMP0_SMN_C2PMSG_65 0x0081
98	#define regMP0_SMN_C2PMSG_65_BASE_IDX 0
99	#define regMP0_SMN_C2PMSG_66 0x0082
100	#define regMP0_SMN_C2PMSG_66_BASE_IDX 0
101	#define regMP0_SMN_C2PMSG_67 0x0083
102	#define regMP0_SMN_C2PMSG_67_BASE_IDX 0
103	#define regMP0_SMN_C2PMSG_68 0x0084
104	#define regMP0_SMN_C2PMSG_68_BASE_IDX 0
105	#define regMP0_SMN_C2PMSG_69 0x0085
106	#define regMP0_SMN_C2PMSG_69_BASE_IDX 0
107	#define regMP0_SMN_C2PMSG_70 0x0086
108	#define regMP0_SMN_C2PMSG_70_BASE_IDX 0
109	#define regMP0_SMN_C2PMSG_71 0x0087
110	#define regMP0_SMN_C2PMSG_71_BASE_IDX 0
111	#define regMP0_SMN_C2PMSG_72 0x0088
112	#define regMP0_SMN_C2PMSG_72_BASE_IDX 0
113	#define regMP0_SMN_C2PMSG_73 0x0089
114	#define regMP0_SMN_C2PMSG_73_BASE_IDX 0
115	#define regMP0_SMN_C2PMSG_74 0x008a
116	#define regMP0_SMN_C2PMSG_74_BASE_IDX 0
117	#define regMP0_SMN_C2PMSG_75 0x008b
118	#define regMP0_SMN_C2PMSG_75_BASE_IDX 0
119	#define regMP0_SMN_C2PMSG_76 0x008c
120	#define regMP0_SMN_C2PMSG_76_BASE_IDX 0
121	#define regMP0_SMN_C2PMSG_77 0x008d
122	#define regMP0_SMN_C2PMSG_77_BASE_IDX 0
123	#define regMP0_SMN_C2PMSG_78 0x008e
124	#define regMP0_SMN_C2PMSG_78_BASE_IDX 0
125	#define regMP0_SMN_C2PMSG_79 0x008f
126	#define regMP0_SMN_C2PMSG_79_BASE_IDX 0
127	#define regMP0_SMN_C2PMSG_80 0x0090
128	#define regMP0_SMN_C2PMSG_80_BASE_IDX 0
129	#define regMP0_SMN_C2PMSG_81 0x0091
130	#define regMP0_SMN_C2PMSG_81_BASE_IDX 0
131	#define regMP0_SMN_C2PMSG_82 0x0092
132	#define regMP0_SMN_C2PMSG_82_BASE_IDX 0
133	#define regMP0_SMN_C2PMSG_83 0x0093
134	#define regMP0_SMN_C2PMSG_83_BASE_IDX 0
135	#define regMP0_SMN_C2PMSG_84 0x0094
136	#define regMP0_SMN_C2PMSG_84_BASE_IDX 0
137	#define regMP0_SMN_C2PMSG_85 0x0095
138	#define regMP0_SMN_C2PMSG_85_BASE_IDX 0
139	#define regMP0_SMN_C2PMSG_86 0x0096
140	#define regMP0_SMN_C2PMSG_86_BASE_IDX 0
141	#define regMP0_SMN_C2PMSG_87 0x0097
142	#define regMP0_SMN_C2PMSG_87_BASE_IDX 0
143	#define regMP0_SMN_C2PMSG_88 0x0098
144	#define regMP0_SMN_C2PMSG_88_BASE_IDX 0
145	#define regMP0_SMN_C2PMSG_89 0x0099
146	#define regMP0_SMN_C2PMSG_89_BASE_IDX 0
147	#define regMP0_SMN_C2PMSG_90 0x009a
148	#define regMP0_SMN_C2PMSG_90_BASE_IDX 0
149	#define regMP0_SMN_C2PMSG_91 0x009b
150	#define regMP0_SMN_C2PMSG_91_BASE_IDX 0
151	#define regMP0_SMN_C2PMSG_92 0x009c
152	#define regMP0_SMN_C2PMSG_92_BASE_IDX 0
153	#define regMP0_SMN_C2PMSG_93 0x009d
154	#define regMP0_SMN_C2PMSG_93_BASE_IDX 0
155	#define regMP0_SMN_C2PMSG_94 0x009e
156	#define regMP0_SMN_C2PMSG_94_BASE_IDX 0
157	#define regMP0_SMN_C2PMSG_95 0x009f
158	#define regMP0_SMN_C2PMSG_95_BASE_IDX 0
159	#define regMP0_SMN_C2PMSG_96 0x00a0
160	#define regMP0_SMN_C2PMSG_96_BASE_IDX 0
161	#define regMP0_SMN_C2PMSG_97 0x00a1
162	#define regMP0_SMN_C2PMSG_97_BASE_IDX 0
163	#define regMP0_SMN_C2PMSG_98 0x00a2
164	#define regMP0_SMN_C2PMSG_98_BASE_IDX 0
165	#define regMP0_SMN_C2PMSG_99 0x00a3
166	#define regMP0_SMN_C2PMSG_99_BASE_IDX 0
167	#define regMP0_SMN_C2PMSG_100 0x00a4
168	#define regMP0_SMN_C2PMSG_100_BASE_IDX 0
169	#define regMP0_SMN_C2PMSG_101 0x00a5
170	#define regMP0_SMN_C2PMSG_101_BASE_IDX 0
171	#define regMP0_SMN_C2PMSG_102 0x00a6
172	#define regMP0_SMN_C2PMSG_102_BASE_IDX 0
173	#define regMP0_SMN_C2PMSG_103 0x00a7
174	#define regMP0_SMN_C2PMSG_103_BASE_IDX 0
175	#define regMP0_SMN_IH_CREDIT 0x00c1
176	#define regMP0_SMN_IH_CREDIT_BASE_IDX 0
177	#define regMP0_SMN_IH_SW_INT 0x00c2
178	#define regMP0_SMN_IH_SW_INT_BASE_IDX 0
179	#define regMP0_SMN_IH_SW_INT_CTRL 0x00c3
180	#define regMP0_SMN_IH_SW_INT_CTRL_BASE_IDX 0
181
182
183	// addressBlock: mp_SmuMp1_SmnDec
184	// base address: 0x0
185	#define regMP1_SMN_C2PMSG_32 0x0260
186	#define regMP1_SMN_C2PMSG_32_BASE_IDX 0
187	#define regMP1_SMN_C2PMSG_33 0x0261
188	#define regMP1_SMN_C2PMSG_33_BASE_IDX 0
189	#define regMP1_SMN_C2PMSG_34 0x0262
190	#define regMP1_SMN_C2PMSG_34_BASE_IDX 0
191	#define regMP1_SMN_C2PMSG_35 0x0263
192	#define regMP1_SMN_C2PMSG_35_BASE_IDX 0
193	#define regMP1_SMN_C2PMSG_36 0x0264
194	#define regMP1_SMN_C2PMSG_36_BASE_IDX 0
195	#define regMP1_SMN_C2PMSG_37 0x0265
196	#define regMP1_SMN_C2PMSG_37_BASE_IDX 0
197	#define regMP1_SMN_C2PMSG_38 0x0266
198	#define regMP1_SMN_C2PMSG_38_BASE_IDX 0
199	#define regMP1_SMN_C2PMSG_39 0x0267
200	#define regMP1_SMN_C2PMSG_39_BASE_IDX 0
201	#define regMP1_SMN_C2PMSG_40 0x0268
202	#define regMP1_SMN_C2PMSG_40_BASE_IDX 0
203	#define regMP1_SMN_C2PMSG_41 0x0269
204	#define regMP1_SMN_C2PMSG_41_BASE_IDX 0
205	#define regMP1_SMN_C2PMSG_42 0x026a
206	#define regMP1_SMN_C2PMSG_42_BASE_IDX 0
207	#define regMP1_SMN_C2PMSG_43 0x026b
208	#define regMP1_SMN_C2PMSG_43_BASE_IDX 0
209	#define regMP1_SMN_C2PMSG_44 0x026c
210	#define regMP1_SMN_C2PMSG_44_BASE_IDX 0
211	#define regMP1_SMN_C2PMSG_45 0x026d
212	#define regMP1_SMN_C2PMSG_45_BASE_IDX 0
213	#define regMP1_SMN_C2PMSG_46 0x026e
214	#define regMP1_SMN_C2PMSG_46_BASE_IDX 0
215	#define regMP1_SMN_C2PMSG_47 0x026f
216	#define regMP1_SMN_C2PMSG_47_BASE_IDX 0
217	#define regMP1_SMN_C2PMSG_48 0x0270
218	#define regMP1_SMN_C2PMSG_48_BASE_IDX 0
219	#define regMP1_SMN_C2PMSG_49 0x0271
220	#define regMP1_SMN_C2PMSG_49_BASE_IDX 0
221	#define regMP1_SMN_C2PMSG_50 0x0272
222	#define regMP1_SMN_C2PMSG_50_BASE_IDX 0
223	#define regMP1_SMN_C2PMSG_51 0x0273
224	#define regMP1_SMN_C2PMSG_51_BASE_IDX 0
225	#define regMP1_SMN_C2PMSG_52 0x0274
226	#define regMP1_SMN_C2PMSG_52_BASE_IDX 0
227	#define regMP1_SMN_C2PMSG_53 0x0275
228	#define regMP1_SMN_C2PMSG_53_BASE_IDX 0
229	#define regMP1_SMN_C2PMSG_54 0x0276
230	#define regMP1_SMN_C2PMSG_54_BASE_IDX 0
231	#define regMP1_SMN_C2PMSG_55 0x0277
232	#define regMP1_SMN_C2PMSG_55_BASE_IDX 0
233	#define regMP1_SMN_C2PMSG_56 0x0278
234	#define regMP1_SMN_C2PMSG_56_BASE_IDX 0
235	#define regMP1_SMN_C2PMSG_57 0x0279
236	#define regMP1_SMN_C2PMSG_57_BASE_IDX 0
237	#define regMP1_SMN_C2PMSG_58 0x027a
238	#define regMP1_SMN_C2PMSG_58_BASE_IDX 0
239	#define regMP1_SMN_C2PMSG_59 0x027b
240	#define regMP1_SMN_C2PMSG_59_BASE_IDX 0
241	#define regMP1_SMN_C2PMSG_60 0x027c
242	#define regMP1_SMN_C2PMSG_60_BASE_IDX 0
243	#define regMP1_SMN_C2PMSG_61 0x027d
244	#define regMP1_SMN_C2PMSG_61_BASE_IDX 0
245	#define regMP1_SMN_C2PMSG_62 0x027e
246	#define regMP1_SMN_C2PMSG_62_BASE_IDX 0
247	#define regMP1_SMN_C2PMSG_63 0x027f
248	#define regMP1_SMN_C2PMSG_63_BASE_IDX 0
249	#define regMP1_SMN_C2PMSG_64 0x0280
250	#define regMP1_SMN_C2PMSG_64_BASE_IDX 0
251	#define regMP1_SMN_C2PMSG_65 0x0281
252	#define regMP1_SMN_C2PMSG_65_BASE_IDX 0
253	#define regMP1_SMN_C2PMSG_66 0x0282
254	#define regMP1_SMN_C2PMSG_66_BASE_IDX 0
255	#define regMP1_SMN_C2PMSG_67 0x0283
256	#define regMP1_SMN_C2PMSG_67_BASE_IDX 0
257	#define regMP1_SMN_C2PMSG_68 0x0284
258	#define regMP1_SMN_C2PMSG_68_BASE_IDX 0
259	#define regMP1_SMN_C2PMSG_69 0x0285
260	#define regMP1_SMN_C2PMSG_69_BASE_IDX 0
261	#define regMP1_SMN_C2PMSG_70 0x0286
262	#define regMP1_SMN_C2PMSG_70_BASE_IDX 0
263	#define regMP1_SMN_C2PMSG_71 0x0287
264	#define regMP1_SMN_C2PMSG_71_BASE_IDX 0
265	#define regMP1_SMN_C2PMSG_72 0x0288
266	#define regMP1_SMN_C2PMSG_72_BASE_IDX 0
267	#define regMP1_SMN_C2PMSG_73 0x0289
268	#define regMP1_SMN_C2PMSG_73_BASE_IDX 0
269	#define regMP1_SMN_C2PMSG_74 0x028a
270	#define regMP1_SMN_C2PMSG_74_BASE_IDX 0
271	#define regMP1_SMN_C2PMSG_75 0x028b
272	#define regMP1_SMN_C2PMSG_75_BASE_IDX 0
273	#define regMP1_SMN_C2PMSG_76 0x028c
274	#define regMP1_SMN_C2PMSG_76_BASE_IDX 0
275	#define regMP1_SMN_C2PMSG_77 0x028d
276	#define regMP1_SMN_C2PMSG_77_BASE_IDX 0
277	#define regMP1_SMN_C2PMSG_78 0x028e
278	#define regMP1_SMN_C2PMSG_78_BASE_IDX 0
279	#define regMP1_SMN_C2PMSG_79 0x028f
280	#define regMP1_SMN_C2PMSG_79_BASE_IDX 0
281	#define regMP1_SMN_C2PMSG_80 0x0290
282	#define regMP1_SMN_C2PMSG_80_BASE_IDX 0
283	#define regMP1_SMN_C2PMSG_81 0x0291
284	#define regMP1_SMN_C2PMSG_81_BASE_IDX 0
285	#define regMP1_SMN_C2PMSG_82 0x0292
286	#define regMP1_SMN_C2PMSG_82_BASE_IDX 0
287	#define regMP1_SMN_C2PMSG_83 0x0293
288	#define regMP1_SMN_C2PMSG_83_BASE_IDX 0
289	#define regMP1_SMN_C2PMSG_84 0x0294
290	#define regMP1_SMN_C2PMSG_84_BASE_IDX 0
291	#define regMP1_SMN_C2PMSG_85 0x0295
292	#define regMP1_SMN_C2PMSG_85_BASE_IDX 0
293	#define regMP1_SMN_C2PMSG_86 0x0296
294	#define regMP1_SMN_C2PMSG_86_BASE_IDX 0
295	#define regMP1_SMN_C2PMSG_87 0x0297
296	#define regMP1_SMN_C2PMSG_87_BASE_IDX 0
297	#define regMP1_SMN_C2PMSG_88 0x0298
298	#define regMP1_SMN_C2PMSG_88_BASE_IDX 0
299	#define regMP1_SMN_C2PMSG_89 0x0299
300	#define regMP1_SMN_C2PMSG_89_BASE_IDX 0
301	#define regMP1_SMN_C2PMSG_90 0x029a
302	#define regMP1_SMN_C2PMSG_90_BASE_IDX 0
303	#define regMP1_SMN_C2PMSG_91 0x029b
304	#define regMP1_SMN_C2PMSG_91_BASE_IDX 0
305	#define regMP1_SMN_C2PMSG_92 0x029c
306	#define regMP1_SMN_C2PMSG_92_BASE_IDX 0
307	#define regMP1_SMN_C2PMSG_93 0x029d
308	#define regMP1_SMN_C2PMSG_93_BASE_IDX 0
309	#define regMP1_SMN_C2PMSG_94 0x029e
310	#define regMP1_SMN_C2PMSG_94_BASE_IDX 0
311	#define regMP1_SMN_C2PMSG_95 0x029f
312	#define regMP1_SMN_C2PMSG_95_BASE_IDX 0
313	#define regMP1_SMN_C2PMSG_96 0x02a0
314	#define regMP1_SMN_C2PMSG_96_BASE_IDX 0
315	#define regMP1_SMN_C2PMSG_97 0x02a1
316	#define regMP1_SMN_C2PMSG_97_BASE_IDX 0
317	#define regMP1_SMN_C2PMSG_98 0x02a2
318	#define regMP1_SMN_C2PMSG_98_BASE_IDX 0
319	#define regMP1_SMN_C2PMSG_99 0x02a3
320	#define regMP1_SMN_C2PMSG_99_BASE_IDX 0
321	#define regMP1_SMN_C2PMSG_100 0x02a4
322	#define regMP1_SMN_C2PMSG_100_BASE_IDX 0
323	#define regMP1_SMN_C2PMSG_101 0x02a5
324	#define regMP1_SMN_C2PMSG_101_BASE_IDX 0
325	#define regMP1_SMN_C2PMSG_102 0x02a6
326	#define regMP1_SMN_C2PMSG_102_BASE_IDX 0
327	#define regMP1_SMN_C2PMSG_103 0x02a7
328	#define regMP1_SMN_C2PMSG_103_BASE_IDX 0
329	#define regMP1_SMN_IH_CREDIT 0x02c1
330	#define regMP1_SMN_IH_CREDIT_BASE_IDX 0
331	#define regMP1_SMN_IH_SW_INT 0x02c2
332	#define regMP1_SMN_IH_SW_INT_BASE_IDX 0
333	#define regMP1_SMN_IH_SW_INT_CTRL 0x02c3
334	#define regMP1_SMN_IH_SW_INT_CTRL_BASE_IDX 0
335	#define regMP1_SMN_FPS_CNT 0x02c4
336	#define regMP1_SMN_FPS_CNT_BASE_IDX 0
337	#define regMP1_SMN_EXT_SCRATCH0 0x0340
338	#define regMP1_SMN_EXT_SCRATCH0_BASE_IDX 0
339	#define regMP1_SMN_EXT_SCRATCH1 0x0341
340	#define regMP1_SMN_EXT_SCRATCH1_BASE_IDX 0
341	#define regMP1_SMN_EXT_SCRATCH2 0x0342
342	#define regMP1_SMN_EXT_SCRATCH2_BASE_IDX 0
343	#define regMP1_SMN_EXT_SCRATCH3 0x0343
344	#define regMP1_SMN_EXT_SCRATCH3_BASE_IDX 0
345	#define regMP1_SMN_EXT_SCRATCH4 0x0344
346	#define regMP1_SMN_EXT_SCRATCH4_BASE_IDX 0
347	#define regMP1_SMN_EXT_SCRATCH5 0x0345
348	#define regMP1_SMN_EXT_SCRATCH5_BASE_IDX 0
349	#define regMP1_SMN_EXT_SCRATCH6 0x0346
350	#define regMP1_SMN_EXT_SCRATCH6_BASE_IDX 0
351	#define regMP1_SMN_EXT_SCRATCH7 0x0347
352	#define regMP1_SMN_EXT_SCRATCH7_BASE_IDX 0
353
354
355	#endif

drivers/gpu/drm/amd/include/asic_reg/mp/mp_13_0_1_sh_mask.h+0−531

@@ -1,531 +0,0 @@
1	/*
2	* Copyright 2020 Advanced Micro Devices, Inc.
3	*
4	* Permission is hereby granted, free of charge, to any person obtaining a
5	* copy of this software and associated documentation files (the "Software"),
6	* to deal in the Software without restriction, including without limitation
7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8	* and/or sell copies of the Software, and to permit persons to whom the
9	* Software is furnished to do so, subject to the following conditions:
10	*
11	* The above copyright notice and this permission notice shall be included in
12	* all copies or substantial portions of the Software.
13	*
14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20	* OTHER DEALINGS IN THE SOFTWARE.
21	*
22	*
23	*/
24	#ifndef _mp_13_0_1_SH_MASK_HEADER
25	#define _mp_13_0_1_SH_MASK_HEADER
26
27
28	// addressBlock: mp_SmuMp0_SmnDec
29	//MP0_SMN_C2PMSG_32
30	#define MP0_SMN_C2PMSG_32__CONTENT__SHIFT 0x0
31	#define MP0_SMN_C2PMSG_32__CONTENT_MASK 0xFFFFFFFFL
32	//MP0_SMN_C2PMSG_33
33	#define MP0_SMN_C2PMSG_33__CONTENT__SHIFT 0x0
34	#define MP0_SMN_C2PMSG_33__CONTENT_MASK 0xFFFFFFFFL
35	//MP0_SMN_C2PMSG_34
36	#define MP0_SMN_C2PMSG_34__CONTENT__SHIFT 0x0
37	#define MP0_SMN_C2PMSG_34__CONTENT_MASK 0xFFFFFFFFL
38	//MP0_SMN_C2PMSG_35
39	#define MP0_SMN_C2PMSG_35__CONTENT__SHIFT 0x0
40	#define MP0_SMN_C2PMSG_35__CONTENT_MASK 0xFFFFFFFFL
41	//MP0_SMN_C2PMSG_36
42	#define MP0_SMN_C2PMSG_36__CONTENT__SHIFT 0x0
43	#define MP0_SMN_C2PMSG_36__CONTENT_MASK 0xFFFFFFFFL
44	//MP0_SMN_C2PMSG_37
45	#define MP0_SMN_C2PMSG_37__CONTENT__SHIFT 0x0
46	#define MP0_SMN_C2PMSG_37__CONTENT_MASK 0xFFFFFFFFL
47	//MP0_SMN_C2PMSG_38
48	#define MP0_SMN_C2PMSG_38__CONTENT__SHIFT 0x0
49	#define MP0_SMN_C2PMSG_38__CONTENT_MASK 0xFFFFFFFFL
50	//MP0_SMN_C2PMSG_39
51	#define MP0_SMN_C2PMSG_39__CONTENT__SHIFT 0x0
52	#define MP0_SMN_C2PMSG_39__CONTENT_MASK 0xFFFFFFFFL
53	//MP0_SMN_C2PMSG_40
54	#define MP0_SMN_C2PMSG_40__CONTENT__SHIFT 0x0
55	#define MP0_SMN_C2PMSG_40__CONTENT_MASK 0xFFFFFFFFL
56	//MP0_SMN_C2PMSG_41
57	#define MP0_SMN_C2PMSG_41__CONTENT__SHIFT 0x0
58	#define MP0_SMN_C2PMSG_41__CONTENT_MASK 0xFFFFFFFFL
59	//MP0_SMN_C2PMSG_42
60	#define MP0_SMN_C2PMSG_42__CONTENT__SHIFT 0x0
61	#define MP0_SMN_C2PMSG_42__CONTENT_MASK 0xFFFFFFFFL
62	//MP0_SMN_C2PMSG_43
63	#define MP0_SMN_C2PMSG_43__CONTENT__SHIFT 0x0
64	#define MP0_SMN_C2PMSG_43__CONTENT_MASK 0xFFFFFFFFL
65	//MP0_SMN_C2PMSG_44
66	#define MP0_SMN_C2PMSG_44__CONTENT__SHIFT 0x0
67	#define MP0_SMN_C2PMSG_44__CONTENT_MASK 0xFFFFFFFFL
68	//MP0_SMN_C2PMSG_45
69	#define MP0_SMN_C2PMSG_45__CONTENT__SHIFT 0x0
70	#define MP0_SMN_C2PMSG_45__CONTENT_MASK 0xFFFFFFFFL
71	//MP0_SMN_C2PMSG_46
72	#define MP0_SMN_C2PMSG_46__CONTENT__SHIFT 0x0
73	#define MP0_SMN_C2PMSG_46__CONTENT_MASK 0xFFFFFFFFL
74	//MP0_SMN_C2PMSG_47
75	#define MP0_SMN_C2PMSG_47__CONTENT__SHIFT 0x0
76	#define MP0_SMN_C2PMSG_47__CONTENT_MASK 0xFFFFFFFFL
77	//MP0_SMN_C2PMSG_48
78	#define MP0_SMN_C2PMSG_48__CONTENT__SHIFT 0x0
79	#define MP0_SMN_C2PMSG_48__CONTENT_MASK 0xFFFFFFFFL
80	//MP0_SMN_C2PMSG_49
81	#define MP0_SMN_C2PMSG_49__CONTENT__SHIFT 0x0
82	#define MP0_SMN_C2PMSG_49__CONTENT_MASK 0xFFFFFFFFL
83	//MP0_SMN_C2PMSG_50
84	#define MP0_SMN_C2PMSG_50__CONTENT__SHIFT 0x0
85	#define MP0_SMN_C2PMSG_50__CONTENT_MASK 0xFFFFFFFFL
86	//MP0_SMN_C2PMSG_51
87	#define MP0_SMN_C2PMSG_51__CONTENT__SHIFT 0x0
88	#define MP0_SMN_C2PMSG_51__CONTENT_MASK 0xFFFFFFFFL
89	//MP0_SMN_C2PMSG_52
90	#define MP0_SMN_C2PMSG_52__CONTENT__SHIFT 0x0
91	#define MP0_SMN_C2PMSG_52__CONTENT_MASK 0xFFFFFFFFL
92	//MP0_SMN_C2PMSG_53
93	#define MP0_SMN_C2PMSG_53__CONTENT__SHIFT 0x0
94	#define MP0_SMN_C2PMSG_53__CONTENT_MASK 0xFFFFFFFFL
95	//MP0_SMN_C2PMSG_54
96	#define MP0_SMN_C2PMSG_54__CONTENT__SHIFT 0x0
97	#define MP0_SMN_C2PMSG_54__CONTENT_MASK 0xFFFFFFFFL
98	//MP0_SMN_C2PMSG_55
99	#define MP0_SMN_C2PMSG_55__CONTENT__SHIFT 0x0
100	#define MP0_SMN_C2PMSG_55__CONTENT_MASK 0xFFFFFFFFL
101	//MP0_SMN_C2PMSG_56
102	#define MP0_SMN_C2PMSG_56__CONTENT__SHIFT 0x0
103	#define MP0_SMN_C2PMSG_56__CONTENT_MASK 0xFFFFFFFFL
104	//MP0_SMN_C2PMSG_57
105	#define MP0_SMN_C2PMSG_57__CONTENT__SHIFT 0x0
106	#define MP0_SMN_C2PMSG_57__CONTENT_MASK 0xFFFFFFFFL
107	//MP0_SMN_C2PMSG_58
108	#define MP0_SMN_C2PMSG_58__CONTENT__SHIFT 0x0
109	#define MP0_SMN_C2PMSG_58__CONTENT_MASK 0xFFFFFFFFL
110	//MP0_SMN_C2PMSG_59
111	#define MP0_SMN_C2PMSG_59__CONTENT__SHIFT 0x0
112	#define MP0_SMN_C2PMSG_59__CONTENT_MASK 0xFFFFFFFFL
113	//MP0_SMN_C2PMSG_60
114	#define MP0_SMN_C2PMSG_60__CONTENT__SHIFT 0x0
115	#define MP0_SMN_C2PMSG_60__CONTENT_MASK 0xFFFFFFFFL
116	//MP0_SMN_C2PMSG_61
117	#define MP0_SMN_C2PMSG_61__CONTENT__SHIFT 0x0
118	#define MP0_SMN_C2PMSG_61__CONTENT_MASK 0xFFFFFFFFL
119	//MP0_SMN_C2PMSG_62
120	#define MP0_SMN_C2PMSG_62__CONTENT__SHIFT 0x0
121	#define MP0_SMN_C2PMSG_62__CONTENT_MASK 0xFFFFFFFFL
122	//MP0_SMN_C2PMSG_63
123	#define MP0_SMN_C2PMSG_63__CONTENT__SHIFT 0x0
124	#define MP0_SMN_C2PMSG_63__CONTENT_MASK 0xFFFFFFFFL
125	//MP0_SMN_C2PMSG_64
126	#define MP0_SMN_C2PMSG_64__CONTENT__SHIFT 0x0
127	#define MP0_SMN_C2PMSG_64__CONTENT_MASK 0xFFFFFFFFL
128	//MP0_SMN_C2PMSG_65
129	#define MP0_SMN_C2PMSG_65__CONTENT__SHIFT 0x0
130	#define MP0_SMN_C2PMSG_65__CONTENT_MASK 0xFFFFFFFFL
131	//MP0_SMN_C2PMSG_66
132	#define MP0_SMN_C2PMSG_66__CONTENT__SHIFT 0x0
133	#define MP0_SMN_C2PMSG_66__CONTENT_MASK 0xFFFFFFFFL
134	//MP0_SMN_C2PMSG_67
135	#define MP0_SMN_C2PMSG_67__CONTENT__SHIFT 0x0
136	#define MP0_SMN_C2PMSG_67__CONTENT_MASK 0xFFFFFFFFL
137	//MP0_SMN_C2PMSG_68
138	#define MP0_SMN_C2PMSG_68__CONTENT__SHIFT 0x0
139	#define MP0_SMN_C2PMSG_68__CONTENT_MASK 0xFFFFFFFFL
140	//MP0_SMN_C2PMSG_69
141	#define MP0_SMN_C2PMSG_69__CONTENT__SHIFT 0x0
142	#define MP0_SMN_C2PMSG_69__CONTENT_MASK 0xFFFFFFFFL
143	//MP0_SMN_C2PMSG_70
144	#define MP0_SMN_C2PMSG_70__CONTENT__SHIFT 0x0
145	#define MP0_SMN_C2PMSG_70__CONTENT_MASK 0xFFFFFFFFL
146	//MP0_SMN_C2PMSG_71
147	#define MP0_SMN_C2PMSG_71__CONTENT__SHIFT 0x0
148	#define MP0_SMN_C2PMSG_71__CONTENT_MASK 0xFFFFFFFFL
149	//MP0_SMN_C2PMSG_72
150	#define MP0_SMN_C2PMSG_72__CONTENT__SHIFT 0x0
151	#define MP0_SMN_C2PMSG_72__CONTENT_MASK 0xFFFFFFFFL
152	//MP0_SMN_C2PMSG_73
153	#define MP0_SMN_C2PMSG_73__CONTENT__SHIFT 0x0
154	#define MP0_SMN_C2PMSG_73__CONTENT_MASK 0xFFFFFFFFL
155	//MP0_SMN_C2PMSG_74
156	#define MP0_SMN_C2PMSG_74__CONTENT__SHIFT 0x0
157	#define MP0_SMN_C2PMSG_74__CONTENT_MASK 0xFFFFFFFFL
158	//MP0_SMN_C2PMSG_75
159	#define MP0_SMN_C2PMSG_75__CONTENT__SHIFT 0x0
160	#define MP0_SMN_C2PMSG_75__CONTENT_MASK 0xFFFFFFFFL
161	//MP0_SMN_C2PMSG_76
162	#define MP0_SMN_C2PMSG_76__CONTENT__SHIFT 0x0
163	#define MP0_SMN_C2PMSG_76__CONTENT_MASK 0xFFFFFFFFL
164	//MP0_SMN_C2PMSG_77
165	#define MP0_SMN_C2PMSG_77__CONTENT__SHIFT 0x0
166	#define MP0_SMN_C2PMSG_77__CONTENT_MASK 0xFFFFFFFFL
167	//MP0_SMN_C2PMSG_78
168	#define MP0_SMN_C2PMSG_78__CONTENT__SHIFT 0x0
169	#define MP0_SMN_C2PMSG_78__CONTENT_MASK 0xFFFFFFFFL
170	//MP0_SMN_C2PMSG_79
171	#define MP0_SMN_C2PMSG_79__CONTENT__SHIFT 0x0
172	#define MP0_SMN_C2PMSG_79__CONTENT_MASK 0xFFFFFFFFL
173	//MP0_SMN_C2PMSG_80
174	#define MP0_SMN_C2PMSG_80__CONTENT__SHIFT 0x0
175	#define MP0_SMN_C2PMSG_80__CONTENT_MASK 0xFFFFFFFFL
176	//MP0_SMN_C2PMSG_81
177	#define MP0_SMN_C2PMSG_81__CONTENT__SHIFT 0x0
178	#define MP0_SMN_C2PMSG_81__CONTENT_MASK 0xFFFFFFFFL
179	//MP0_SMN_C2PMSG_82
180	#define MP0_SMN_C2PMSG_82__CONTENT__SHIFT 0x0
181	#define MP0_SMN_C2PMSG_82__CONTENT_MASK 0xFFFFFFFFL
182	//MP0_SMN_C2PMSG_83
183	#define MP0_SMN_C2PMSG_83__CONTENT__SHIFT 0x0
184	#define MP0_SMN_C2PMSG_83__CONTENT_MASK 0xFFFFFFFFL
185	//MP0_SMN_C2PMSG_84
186	#define MP0_SMN_C2PMSG_84__CONTENT__SHIFT 0x0
187	#define MP0_SMN_C2PMSG_84__CONTENT_MASK 0xFFFFFFFFL
188	//MP0_SMN_C2PMSG_85
189	#define MP0_SMN_C2PMSG_85__CONTENT__SHIFT 0x0
190	#define MP0_SMN_C2PMSG_85__CONTENT_MASK 0xFFFFFFFFL
191	//MP0_SMN_C2PMSG_86
192	#define MP0_SMN_C2PMSG_86__CONTENT__SHIFT 0x0
193	#define MP0_SMN_C2PMSG_86__CONTENT_MASK 0xFFFFFFFFL
194	//MP0_SMN_C2PMSG_87
195	#define MP0_SMN_C2PMSG_87__CONTENT__SHIFT 0x0
196	#define MP0_SMN_C2PMSG_87__CONTENT_MASK 0xFFFFFFFFL
197	//MP0_SMN_C2PMSG_88
198	#define MP0_SMN_C2PMSG_88__CONTENT__SHIFT 0x0
199	#define MP0_SMN_C2PMSG_88__CONTENT_MASK 0xFFFFFFFFL
200	//MP0_SMN_C2PMSG_89
201	#define MP0_SMN_C2PMSG_89__CONTENT__SHIFT 0x0
202	#define MP0_SMN_C2PMSG_89__CONTENT_MASK 0xFFFFFFFFL
203	//MP0_SMN_C2PMSG_90
204	#define MP0_SMN_C2PMSG_90__CONTENT__SHIFT 0x0
205	#define MP0_SMN_C2PMSG_90__CONTENT_MASK 0xFFFFFFFFL
206	//MP0_SMN_C2PMSG_91
207	#define MP0_SMN_C2PMSG_91__CONTENT__SHIFT 0x0
208	#define MP0_SMN_C2PMSG_91__CONTENT_MASK 0xFFFFFFFFL
209	//MP0_SMN_C2PMSG_92
210	#define MP0_SMN_C2PMSG_92__CONTENT__SHIFT 0x0
211	#define MP0_SMN_C2PMSG_92__CONTENT_MASK 0xFFFFFFFFL
212	//MP0_SMN_C2PMSG_93
213	#define MP0_SMN_C2PMSG_93__CONTENT__SHIFT 0x0
214	#define MP0_SMN_C2PMSG_93__CONTENT_MASK 0xFFFFFFFFL
215	//MP0_SMN_C2PMSG_94
216	#define MP0_SMN_C2PMSG_94__CONTENT__SHIFT 0x0
217	#define MP0_SMN_C2PMSG_94__CONTENT_MASK 0xFFFFFFFFL
218	//MP0_SMN_C2PMSG_95
219	#define MP0_SMN_C2PMSG_95__CONTENT__SHIFT 0x0
220	#define MP0_SMN_C2PMSG_95__CONTENT_MASK 0xFFFFFFFFL
221	//MP0_SMN_C2PMSG_96
222	#define MP0_SMN_C2PMSG_96__CONTENT__SHIFT 0x0
223	#define MP0_SMN_C2PMSG_96__CONTENT_MASK 0xFFFFFFFFL
224	//MP0_SMN_C2PMSG_97
225	#define MP0_SMN_C2PMSG_97__CONTENT__SHIFT 0x0
226	#define MP0_SMN_C2PMSG_97__CONTENT_MASK 0xFFFFFFFFL
227	//MP0_SMN_C2PMSG_98
228	#define MP0_SMN_C2PMSG_98__CONTENT__SHIFT 0x0
229	#define MP0_SMN_C2PMSG_98__CONTENT_MASK 0xFFFFFFFFL
230	//MP0_SMN_C2PMSG_99
231	#define MP0_SMN_C2PMSG_99__CONTENT__SHIFT 0x0
232	#define MP0_SMN_C2PMSG_99__CONTENT_MASK 0xFFFFFFFFL
233	//MP0_SMN_C2PMSG_100
234	#define MP0_SMN_C2PMSG_100__CONTENT__SHIFT 0x0
235	#define MP0_SMN_C2PMSG_100__CONTENT_MASK 0xFFFFFFFFL
236	//MP0_SMN_C2PMSG_101
237	#define MP0_SMN_C2PMSG_101__CONTENT__SHIFT 0x0
238	#define MP0_SMN_C2PMSG_101__CONTENT_MASK 0xFFFFFFFFL
239	//MP0_SMN_C2PMSG_102
240	#define MP0_SMN_C2PMSG_102__CONTENT__SHIFT 0x0
241	#define MP0_SMN_C2PMSG_102__CONTENT_MASK 0xFFFFFFFFL
242	//MP0_SMN_C2PMSG_103
243	#define MP0_SMN_C2PMSG_103__CONTENT__SHIFT 0x0
244	#define MP0_SMN_C2PMSG_103__CONTENT_MASK 0xFFFFFFFFL
245	//MP0_SMN_IH_CREDIT
246	#define MP0_SMN_IH_CREDIT__CREDIT_VALUE__SHIFT 0x0
247	#define MP0_SMN_IH_CREDIT__CLIENT_ID__SHIFT 0x10
248	#define MP0_SMN_IH_CREDIT__CREDIT_VALUE_MASK 0x00000003L
249	#define MP0_SMN_IH_CREDIT__CLIENT_ID_MASK 0x00FF0000L
250	//MP0_SMN_IH_SW_INT
251	#define MP0_SMN_IH_SW_INT__ID__SHIFT 0x0
252	#define MP0_SMN_IH_SW_INT__VALID__SHIFT 0x8
253	#define MP0_SMN_IH_SW_INT__ID_MASK 0x000000FFL
254	#define MP0_SMN_IH_SW_INT__VALID_MASK 0x00000100L
255	//MP0_SMN_IH_SW_INT_CTRL
256	#define MP0_SMN_IH_SW_INT_CTRL__INT_MASK__SHIFT 0x0
257	#define MP0_SMN_IH_SW_INT_CTRL__INT_ACK__SHIFT 0x8
258	#define MP0_SMN_IH_SW_INT_CTRL__INT_MASK_MASK 0x00000001L
259	#define MP0_SMN_IH_SW_INT_CTRL__INT_ACK_MASK 0x00000100L
260
261
262	// addressBlock: mp_SmuMp1Pub_CruDec
263	//MP1_FIRMWARE_FLAGS
264	#define MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED__SHIFT 0x0
265	#define MP1_FIRMWARE_FLAGS__RESERVED__SHIFT 0x1
266	#define MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK 0x00000001L
267	#define MP1_FIRMWARE_FLAGS__RESERVED_MASK 0xFFFFFFFEL
268
269
270	// addressBlock: mp_SmuMp1_SmnDec
271	//MP1_SMN_C2PMSG_32
272	#define MP1_SMN_C2PMSG_32__CONTENT__SHIFT 0x0
273	#define MP1_SMN_C2PMSG_32__CONTENT_MASK 0xFFFFFFFFL
274	//MP1_SMN_C2PMSG_33
275	#define MP1_SMN_C2PMSG_33__CONTENT__SHIFT 0x0
276	#define MP1_SMN_C2PMSG_33__CONTENT_MASK 0xFFFFFFFFL
277	//MP1_SMN_C2PMSG_34
278	#define MP1_SMN_C2PMSG_34__CONTENT__SHIFT 0x0
279	#define MP1_SMN_C2PMSG_34__CONTENT_MASK 0xFFFFFFFFL
280	//MP1_SMN_C2PMSG_35
281	#define MP1_SMN_C2PMSG_35__CONTENT__SHIFT 0x0
282	#define MP1_SMN_C2PMSG_35__CONTENT_MASK 0xFFFFFFFFL
283	//MP1_SMN_C2PMSG_36
284	#define MP1_SMN_C2PMSG_36__CONTENT__SHIFT 0x0
285	#define MP1_SMN_C2PMSG_36__CONTENT_MASK 0xFFFFFFFFL
286	//MP1_SMN_C2PMSG_37
287	#define MP1_SMN_C2PMSG_37__CONTENT__SHIFT 0x0
288	#define MP1_SMN_C2PMSG_37__CONTENT_MASK 0xFFFFFFFFL
289	//MP1_SMN_C2PMSG_38
290	#define MP1_SMN_C2PMSG_38__CONTENT__SHIFT 0x0
291	#define MP1_SMN_C2PMSG_38__CONTENT_MASK 0xFFFFFFFFL
292	//MP1_SMN_C2PMSG_39
293	#define MP1_SMN_C2PMSG_39__CONTENT__SHIFT 0x0
294	#define MP1_SMN_C2PMSG_39__CONTENT_MASK 0xFFFFFFFFL
295	//MP1_SMN_C2PMSG_40
296	#define MP1_SMN_C2PMSG_40__CONTENT__SHIFT 0x0
297	#define MP1_SMN_C2PMSG_40__CONTENT_MASK 0xFFFFFFFFL
298	//MP1_SMN_C2PMSG_41
299	#define MP1_SMN_C2PMSG_41__CONTENT__SHIFT 0x0
300	#define MP1_SMN_C2PMSG_41__CONTENT_MASK 0xFFFFFFFFL
301	//MP1_SMN_C2PMSG_42
302	#define MP1_SMN_C2PMSG_42__CONTENT__SHIFT 0x0
303	#define MP1_SMN_C2PMSG_42__CONTENT_MASK 0xFFFFFFFFL
304	//MP1_SMN_C2PMSG_43
305	#define MP1_SMN_C2PMSG_43__CONTENT__SHIFT 0x0
306	#define MP1_SMN_C2PMSG_43__CONTENT_MASK 0xFFFFFFFFL
307	//MP1_SMN_C2PMSG_44
308	#define MP1_SMN_C2PMSG_44__CONTENT__SHIFT 0x0
309	#define MP1_SMN_C2PMSG_44__CONTENT_MASK 0xFFFFFFFFL
310	//MP1_SMN_C2PMSG_45
311	#define MP1_SMN_C2PMSG_45__CONTENT__SHIFT 0x0
312	#define MP1_SMN_C2PMSG_45__CONTENT_MASK 0xFFFFFFFFL
313	//MP1_SMN_C2PMSG_46
314	#define MP1_SMN_C2PMSG_46__CONTENT__SHIFT 0x0
315	#define MP1_SMN_C2PMSG_46__CONTENT_MASK 0xFFFFFFFFL
316	//MP1_SMN_C2PMSG_47
317	#define MP1_SMN_C2PMSG_47__CONTENT__SHIFT 0x0
318	#define MP1_SMN_C2PMSG_47__CONTENT_MASK 0xFFFFFFFFL
319	//MP1_SMN_C2PMSG_48
320	#define MP1_SMN_C2PMSG_48__CONTENT__SHIFT 0x0
321	#define MP1_SMN_C2PMSG_48__CONTENT_MASK 0xFFFFFFFFL
322	//MP1_SMN_C2PMSG_49
323	#define MP1_SMN_C2PMSG_49__CONTENT__SHIFT 0x0
324	#define MP1_SMN_C2PMSG_49__CONTENT_MASK 0xFFFFFFFFL
325	//MP1_SMN_C2PMSG_50
326	#define MP1_SMN_C2PMSG_50__CONTENT__SHIFT 0x0
327	#define MP1_SMN_C2PMSG_50__CONTENT_MASK 0xFFFFFFFFL
328	//MP1_SMN_C2PMSG_51
329	#define MP1_SMN_C2PMSG_51__CONTENT__SHIFT 0x0
330	#define MP1_SMN_C2PMSG_51__CONTENT_MASK 0xFFFFFFFFL
331	//MP1_SMN_C2PMSG_52
332	#define MP1_SMN_C2PMSG_52__CONTENT__SHIFT 0x0
333	#define MP1_SMN_C2PMSG_52__CONTENT_MASK 0xFFFFFFFFL
334	//MP1_SMN_C2PMSG_53
335	#define MP1_SMN_C2PMSG_53__CONTENT__SHIFT 0x0
336	#define MP1_SMN_C2PMSG_53__CONTENT_MASK 0xFFFFFFFFL
337	//MP1_SMN_C2PMSG_54
338	#define MP1_SMN_C2PMSG_54__CONTENT__SHIFT 0x0
339	#define MP1_SMN_C2PMSG_54__CONTENT_MASK 0xFFFFFFFFL
340	//MP1_SMN_C2PMSG_55
341	#define MP1_SMN_C2PMSG_55__CONTENT__SHIFT 0x0
342	#define MP1_SMN_C2PMSG_55__CONTENT_MASK 0xFFFFFFFFL
343	//MP1_SMN_C2PMSG_56
344	#define MP1_SMN_C2PMSG_56__CONTENT__SHIFT 0x0
345	#define MP1_SMN_C2PMSG_56__CONTENT_MASK 0xFFFFFFFFL
346	//MP1_SMN_C2PMSG_57
347	#define MP1_SMN_C2PMSG_57__CONTENT__SHIFT 0x0
348	#define MP1_SMN_C2PMSG_57__CONTENT_MASK 0xFFFFFFFFL
349	//MP1_SMN_C2PMSG_58
350	#define MP1_SMN_C2PMSG_58__CONTENT__SHIFT 0x0
351	#define MP1_SMN_C2PMSG_58__CONTENT_MASK 0xFFFFFFFFL
352	//MP1_SMN_C2PMSG_59
353	#define MP1_SMN_C2PMSG_59__CONTENT__SHIFT 0x0
354	#define MP1_SMN_C2PMSG_59__CONTENT_MASK 0xFFFFFFFFL
355	//MP1_SMN_C2PMSG_60
356	#define MP1_SMN_C2PMSG_60__CONTENT__SHIFT 0x0
357	#define MP1_SMN_C2PMSG_60__CONTENT_MASK 0xFFFFFFFFL
358	//MP1_SMN_C2PMSG_61
359	#define MP1_SMN_C2PMSG_61__CONTENT__SHIFT 0x0
360	#define MP1_SMN_C2PMSG_61__CONTENT_MASK 0xFFFFFFFFL
361	//MP1_SMN_C2PMSG_62
362	#define MP1_SMN_C2PMSG_62__CONTENT__SHIFT 0x0
363	#define MP1_SMN_C2PMSG_62__CONTENT_MASK 0xFFFFFFFFL
364	//MP1_SMN_C2PMSG_63
365	#define MP1_SMN_C2PMSG_63__CONTENT__SHIFT 0x0
366	#define MP1_SMN_C2PMSG_63__CONTENT_MASK 0xFFFFFFFFL
367	//MP1_SMN_C2PMSG_64
368	#define MP1_SMN_C2PMSG_64__CONTENT__SHIFT 0x0
369	#define MP1_SMN_C2PMSG_64__CONTENT_MASK 0xFFFFFFFFL
370	//MP1_SMN_C2PMSG_65
371	#define MP1_SMN_C2PMSG_65__CONTENT__SHIFT 0x0
372	#define MP1_SMN_C2PMSG_65__CONTENT_MASK 0xFFFFFFFFL
373	//MP1_SMN_C2PMSG_66
374	#define MP1_SMN_C2PMSG_66__CONTENT__SHIFT 0x0
375	#define MP1_SMN_C2PMSG_66__CONTENT_MASK 0xFFFFFFFFL
376	//MP1_SMN_C2PMSG_67
377	#define MP1_SMN_C2PMSG_67__CONTENT__SHIFT 0x0
378	#define MP1_SMN_C2PMSG_67__CONTENT_MASK 0xFFFFFFFFL
379	//MP1_SMN_C2PMSG_68
380	#define MP1_SMN_C2PMSG_68__CONTENT__SHIFT 0x0
381	#define MP1_SMN_C2PMSG_68__CONTENT_MASK 0xFFFFFFFFL
382	//MP1_SMN_C2PMSG_69
383	#define MP1_SMN_C2PMSG_69__CONTENT__SHIFT 0x0
384	#define MP1_SMN_C2PMSG_69__CONTENT_MASK 0xFFFFFFFFL
385	//MP1_SMN_C2PMSG_70
386	#define MP1_SMN_C2PMSG_70__CONTENT__SHIFT 0x0
387	#define MP1_SMN_C2PMSG_70__CONTENT_MASK 0xFFFFFFFFL
388	//MP1_SMN_C2PMSG_71
389	#define MP1_SMN_C2PMSG_71__CONTENT__SHIFT 0x0
390	#define MP1_SMN_C2PMSG_71__CONTENT_MASK 0xFFFFFFFFL
391	//MP1_SMN_C2PMSG_72
392	#define MP1_SMN_C2PMSG_72__CONTENT__SHIFT 0x0
393	#define MP1_SMN_C2PMSG_72__CONTENT_MASK 0xFFFFFFFFL
394	//MP1_SMN_C2PMSG_73
395	#define MP1_SMN_C2PMSG_73__CONTENT__SHIFT 0x0
396	#define MP1_SMN_C2PMSG_73__CONTENT_MASK 0xFFFFFFFFL
397	//MP1_SMN_C2PMSG_74
398	#define MP1_SMN_C2PMSG_74__CONTENT__SHIFT 0x0
399	#define MP1_SMN_C2PMSG_74__CONTENT_MASK 0xFFFFFFFFL
400	//MP1_SMN_C2PMSG_75
401	#define MP1_SMN_C2PMSG_75__CONTENT__SHIFT 0x0
402	#define MP1_SMN_C2PMSG_75__CONTENT_MASK 0xFFFFFFFFL
403	//MP1_SMN_C2PMSG_76
404	#define MP1_SMN_C2PMSG_76__CONTENT__SHIFT 0x0
405	#define MP1_SMN_C2PMSG_76__CONTENT_MASK 0xFFFFFFFFL
406	//MP1_SMN_C2PMSG_77
407	#define MP1_SMN_C2PMSG_77__CONTENT__SHIFT 0x0
408	#define MP1_SMN_C2PMSG_77__CONTENT_MASK 0xFFFFFFFFL
409	//MP1_SMN_C2PMSG_78
410	#define MP1_SMN_C2PMSG_78__CONTENT__SHIFT 0x0
411	#define MP1_SMN_C2PMSG_78__CONTENT_MASK 0xFFFFFFFFL
412	//MP1_SMN_C2PMSG_79
413	#define MP1_SMN_C2PMSG_79__CONTENT__SHIFT 0x0
414	#define MP1_SMN_C2PMSG_79__CONTENT_MASK 0xFFFFFFFFL
415	//MP1_SMN_C2PMSG_80
416	#define MP1_SMN_C2PMSG_80__CONTENT__SHIFT 0x0
417	#define MP1_SMN_C2PMSG_80__CONTENT_MASK 0xFFFFFFFFL
418	//MP1_SMN_C2PMSG_81
419	#define MP1_SMN_C2PMSG_81__CONTENT__SHIFT 0x0
420	#define MP1_SMN_C2PMSG_81__CONTENT_MASK 0xFFFFFFFFL
421	//MP1_SMN_C2PMSG_82
422	#define MP1_SMN_C2PMSG_82__CONTENT__SHIFT 0x0
423	#define MP1_SMN_C2PMSG_82__CONTENT_MASK 0xFFFFFFFFL
424	//MP1_SMN_C2PMSG_83
425	#define MP1_SMN_C2PMSG_83__CONTENT__SHIFT 0x0
426	#define MP1_SMN_C2PMSG_83__CONTENT_MASK 0xFFFFFFFFL
427	//MP1_SMN_C2PMSG_84
428	#define MP1_SMN_C2PMSG_84__CONTENT__SHIFT 0x0
429	#define MP1_SMN_C2PMSG_84__CONTENT_MASK 0xFFFFFFFFL
430	//MP1_SMN_C2PMSG_85
431	#define MP1_SMN_C2PMSG_85__CONTENT__SHIFT 0x0
432	#define MP1_SMN_C2PMSG_85__CONTENT_MASK 0xFFFFFFFFL
433	//MP1_SMN_C2PMSG_86
434	#define MP1_SMN_C2PMSG_86__CONTENT__SHIFT 0x0
435	#define MP1_SMN_C2PMSG_86__CONTENT_MASK 0xFFFFFFFFL
436	//MP1_SMN_C2PMSG_87
437	#define MP1_SMN_C2PMSG_87__CONTENT__SHIFT 0x0
438	#define MP1_SMN_C2PMSG_87__CONTENT_MASK 0xFFFFFFFFL
439	//MP1_SMN_C2PMSG_88
440	#define MP1_SMN_C2PMSG_88__CONTENT__SHIFT 0x0
441	#define MP1_SMN_C2PMSG_88__CONTENT_MASK 0xFFFFFFFFL
442	//MP1_SMN_C2PMSG_89
443	#define MP1_SMN_C2PMSG_89__CONTENT__SHIFT 0x0
444	#define MP1_SMN_C2PMSG_89__CONTENT_MASK 0xFFFFFFFFL
445	//MP1_SMN_C2PMSG_90
446	#define MP1_SMN_C2PMSG_90__CONTENT__SHIFT 0x0
447	#define MP1_SMN_C2PMSG_90__CONTENT_MASK 0xFFFFFFFFL
448	//MP1_SMN_C2PMSG_91
449	#define MP1_SMN_C2PMSG_91__CONTENT__SHIFT 0x0
450	#define MP1_SMN_C2PMSG_91__CONTENT_MASK 0xFFFFFFFFL
451	//MP1_SMN_C2PMSG_92
452	#define MP1_SMN_C2PMSG_92__CONTENT__SHIFT 0x0
453	#define MP1_SMN_C2PMSG_92__CONTENT_MASK 0xFFFFFFFFL
454	//MP1_SMN_C2PMSG_93
455	#define MP1_SMN_C2PMSG_93__CONTENT__SHIFT 0x0
456	#define MP1_SMN_C2PMSG_93__CONTENT_MASK 0xFFFFFFFFL
457	//MP1_SMN_C2PMSG_94
458	#define MP1_SMN_C2PMSG_94__CONTENT__SHIFT 0x0
459	#define MP1_SMN_C2PMSG_94__CONTENT_MASK 0xFFFFFFFFL
460	//MP1_SMN_C2PMSG_95
461	#define MP1_SMN_C2PMSG_95__CONTENT__SHIFT 0x0
462	#define MP1_SMN_C2PMSG_95__CONTENT_MASK 0xFFFFFFFFL
463	//MP1_SMN_C2PMSG_96
464	#define MP1_SMN_C2PMSG_96__CONTENT__SHIFT 0x0
465	#define MP1_SMN_C2PMSG_96__CONTENT_MASK 0xFFFFFFFFL
466	//MP1_SMN_C2PMSG_97
467	#define MP1_SMN_C2PMSG_97__CONTENT__SHIFT 0x0
468	#define MP1_SMN_C2PMSG_97__CONTENT_MASK 0xFFFFFFFFL
469	//MP1_SMN_C2PMSG_98
470	#define MP1_SMN_C2PMSG_98__CONTENT__SHIFT 0x0
471	#define MP1_SMN_C2PMSG_98__CONTENT_MASK 0xFFFFFFFFL
472	//MP1_SMN_C2PMSG_99
473	#define MP1_SMN_C2PMSG_99__CONTENT__SHIFT 0x0
474	#define MP1_SMN_C2PMSG_99__CONTENT_MASK 0xFFFFFFFFL
475	//MP1_SMN_C2PMSG_100
476	#define MP1_SMN_C2PMSG_100__CONTENT__SHIFT 0x0
477	#define MP1_SMN_C2PMSG_100__CONTENT_MASK 0xFFFFFFFFL
478	//MP1_SMN_C2PMSG_101
479	#define MP1_SMN_C2PMSG_101__CONTENT__SHIFT 0x0
480	#define MP1_SMN_C2PMSG_101__CONTENT_MASK 0xFFFFFFFFL
481	//MP1_SMN_C2PMSG_102
482	#define MP1_SMN_C2PMSG_102__CONTENT__SHIFT 0x0
483	#define MP1_SMN_C2PMSG_102__CONTENT_MASK 0xFFFFFFFFL
484	//MP1_SMN_C2PMSG_103
485	#define MP1_SMN_C2PMSG_103__CONTENT__SHIFT 0x0
486	#define MP1_SMN_C2PMSG_103__CONTENT_MASK 0xFFFFFFFFL
487	//MP1_SMN_IH_CREDIT
488	#define MP1_SMN_IH_CREDIT__CREDIT_VALUE__SHIFT 0x0
489	#define MP1_SMN_IH_CREDIT__CLIENT_ID__SHIFT 0x10
490	#define MP1_SMN_IH_CREDIT__CREDIT_VALUE_MASK 0x00000003L
491	#define MP1_SMN_IH_CREDIT__CLIENT_ID_MASK 0x00FF0000L
492	//MP1_SMN_IH_SW_INT
493	#define MP1_SMN_IH_SW_INT__ID__SHIFT 0x0
494	#define MP1_SMN_IH_SW_INT__VALID__SHIFT 0x8
495	#define MP1_SMN_IH_SW_INT__ID_MASK 0x000000FFL
496	#define MP1_SMN_IH_SW_INT__VALID_MASK 0x00000100L
497	//MP1_SMN_IH_SW_INT_CTRL
498	#define MP1_SMN_IH_SW_INT_CTRL__INT_MASK__SHIFT 0x0
499	#define MP1_SMN_IH_SW_INT_CTRL__INT_ACK__SHIFT 0x8
500	#define MP1_SMN_IH_SW_INT_CTRL__INT_MASK_MASK 0x00000001L
501	#define MP1_SMN_IH_SW_INT_CTRL__INT_ACK_MASK 0x00000100L
502	//MP1_SMN_FPS_CNT
503	#define MP1_SMN_FPS_CNT__COUNT__SHIFT 0x0
504	#define MP1_SMN_FPS_CNT__COUNT_MASK 0xFFFFFFFFL
505	//MP1_SMN_EXT_SCRATCH0
506	#define MP1_SMN_EXT_SCRATCH0__DATA__SHIFT 0x0
507	#define MP1_SMN_EXT_SCRATCH0__DATA_MASK 0xFFFFFFFFL
508	//MP1_SMN_EXT_SCRATCH1
509	#define MP1_SMN_EXT_SCRATCH1__DATA__SHIFT 0x0
510	#define MP1_SMN_EXT_SCRATCH1__DATA_MASK 0xFFFFFFFFL
511	//MP1_SMN_EXT_SCRATCH2
512	#define MP1_SMN_EXT_SCRATCH2__DATA__SHIFT 0x0
513	#define MP1_SMN_EXT_SCRATCH2__DATA_MASK 0xFFFFFFFFL
514	//MP1_SMN_EXT_SCRATCH3
515	#define MP1_SMN_EXT_SCRATCH3__DATA__SHIFT 0x0
516	#define MP1_SMN_EXT_SCRATCH3__DATA_MASK 0xFFFFFFFFL
517	//MP1_SMN_EXT_SCRATCH4
518	#define MP1_SMN_EXT_SCRATCH4__DATA__SHIFT 0x0
519	#define MP1_SMN_EXT_SCRATCH4__DATA_MASK 0xFFFFFFFFL
520	//MP1_SMN_EXT_SCRATCH5
521	#define MP1_SMN_EXT_SCRATCH5__DATA__SHIFT 0x0
522	#define MP1_SMN_EXT_SCRATCH5__DATA_MASK 0xFFFFFFFFL
523	//MP1_SMN_EXT_SCRATCH6
524	#define MP1_SMN_EXT_SCRATCH6__DATA__SHIFT 0x0
525	#define MP1_SMN_EXT_SCRATCH6__DATA_MASK 0xFFFFFFFFL
526	//MP1_SMN_EXT_SCRATCH7
527	#define MP1_SMN_EXT_SCRATCH7__DATA__SHIFT 0x0
528	#define MP1_SMN_EXT_SCRATCH7__DATA_MASK 0xFFFFFFFFL
529
530
531	#endif

drivers/gpu/drm/amd/pm/inc/smu_v13_0.h+1−0

@@ -26,6 +26,7 @@ · 25 unmodified lines
26	#include "amdgpu_smu.h"	26	#include "amdgpu_smu.h"
27		27
28	#define SMU13_DRIVER_IF_VERSION_INV 0xFFFFFFFF	28	#define SMU13_DRIVER_IF_VERSION_INV 0xFFFFFFFF
		29	#define SMU13_DRIVER_IF_VERSION_YELLOW_CARP 0x03
29	#define SMU13_DRIVER_IF_VERSION_ALDE 0x07	30	#define SMU13_DRIVER_IF_VERSION_ALDE 0x07
30		31
31	/* MP Apertures */	32	/* MP Apertures */

drivers/gpu/drm/amd/pm/inc/smu_v13_0_1.h+0−57

@@ -1,57 +0,0 @@
1	/*
2	* Copyright 2020 Advanced Micro Devices, Inc.
3	*
4	* Permission is hereby granted, free of charge, to any person obtaining a
5	* copy of this software and associated documentation files (the "Software"),
6	* to deal in the Software without restriction, including without limitation
7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8	* and/or sell copies of the Software, and to permit persons to whom the
9	* Software is furnished to do so, subject to the following conditions:
10	*
11	* The above copyright notice and this permission notice shall be included in
12	* all copies or substantial portions of the Software.
13	*
14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20	* OTHER DEALINGS IN THE SOFTWARE.
21	*
22	*/
23	#ifndef __SMU_V13_0_1_H__
24	#define __SMU_V13_0_1_H__
25
26	#include "amdgpu_smu.h"
27
28	#define SMU13_0_1_DRIVER_IF_VERSION_INV 0xFFFFFFFF
29	#define SMU13_0_1_DRIVER_IF_VERSION_YELLOW_CARP 0x3
30
31	/* MP Apertures */
32	#define MP0_Public 0x03800000
33	#define MP0_SRAM 0x03900000
34	#define MP1_Public 0x03b00000
35	#define MP1_SRAM 0x03c00004
36
37	/* address block */
38	#define smnMP1_FIRMWARE_FLAGS 0x3010024
39
40
41	#if defined(SWSMU_CODE_LAYER_L2) \|\| defined(SWSMU_CODE_LAYER_L3)
42
43	int smu_v13_0_1_check_fw_status(struct smu_context *smu);
44
45	int smu_v13_0_1_check_fw_version(struct smu_context *smu);
46
47	int smu_v13_0_1_fini_smc_tables(struct smu_context *smu);
48
49	int smu_v13_0_1_get_vbios_bootup_values(struct smu_context *smu);
50
51	int smu_v13_0_1_set_default_dpm_tables(struct smu_context *smu);
52
53	int smu_v13_0_1_set_driver_table_location(struct smu_context *smu);
54
55	int smu_v13_0_1_gfx_off_control(struct smu_context *smu, bool enable);
56	#endif
57	#endif

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c+1−0

@@ -1528,6 +1528,7 @@ int smu_v11_0_baco_set_state(struct smu_context *smu, enum smu_baco_state state) · 1527 unmodified lines
1528	case CHIP_SIENNA_CICHLID:	1528	case CHIP_SIENNA_CICHLID:
1529	case CHIP_NAVY_FLOUNDER:	1529	case CHIP_NAVY_FLOUNDER:
1530	case CHIP_DIMGREY_CAVEFISH:	1530	case CHIP_DIMGREY_CAVEFISH:
		1531	case CHIP_BEIGE_GOBY:
1531	if (amdgpu_runtime_pm == 2)	1532	if (amdgpu_runtime_pm == 2)
1532	ret = smu_cmn_send_smc_msg_with_param(smu,	1533	ret = smu_cmn_send_smc_msg_with_param(smu,
1533	SMU_MSG_EnterBaco,	1534	SMU_MSG_EnterBaco,

drivers/gpu/drm/amd/pm/swsmu/smu13/Makefile+1−1

@@ -23,7 +23,7 @@ · 22 unmodified lines
23	# Makefile for the 'smu manager' sub-component of powerplay.	23	# Makefile for the 'smu manager' sub-component of powerplay.
24	# It provides the smu management services for the driver.	24	# It provides the smu management services for the driver.
25		25
26	SMU13_MGR = smu_v13_0.o aldebaran_ppt.o smu_v13_0_1.o yellow_carp_ppt.o	26	SMU13_MGR = smu_v13_0.o aldebaran_ppt.o yellow_carp_ppt.o
27		27
28	AMD_SWSMU_SMU13MGR = $(addprefix $(AMD_SWSMU_PATH)/smu13/,$(SMU13_MGR))	28	AMD_SWSMU_SMU13MGR = $(addprefix $(AMD_SWSMU_PATH)/smu13/,$(SMU13_MGR))
29		29

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c+24−0

@@ -210,6 +210,9 @@ int smu_v13_0_check_fw_version(struct smu_context *smu) · 209 unmodified lines
210	case CHIP_ALDEBARAN:	210	case CHIP_ALDEBARAN:
211	smu->smc_driver_if_version = SMU13_DRIVER_IF_VERSION_ALDE;	211	smu->smc_driver_if_version = SMU13_DRIVER_IF_VERSION_ALDE;
212	break;	212	break;
		213	case CHIP_YELLOW_CARP:
		214	smu->smc_driver_if_version = SMU13_DRIVER_IF_VERSION_YELLOW_CARP;
		215	break;
213	default:	216	default:
214	dev_err(smu->adev->dev, "smu unsupported asic type:%d.\n", smu->adev->asic_type);	217	dev_err(smu->adev->dev, "smu unsupported asic type:%d.\n", smu->adev->asic_type);
215	smu->smc_driver_if_version = SMU13_DRIVER_IF_VERSION_INV;	218	smu->smc_driver_if_version = SMU13_DRIVER_IF_VERSION_INV;
@@ -694,6 +697,27 @@ failed: · 478 unmodified lines
694	return ret;	697	return ret;
695	}	698	}
696		699
		700	int smu_v13_0_gfx_off_control(struct smu_context *smu, bool enable)
		701	{
		702	int ret = 0;
		703	struct amdgpu_device *adev = smu->adev;
		704
		705	switch (adev->asic_type) {
		706	case CHIP_YELLOW_CARP:
		707	if (!(adev->pm.pp_feature & PP_GFXOFF_MASK))
		708	return 0;
		709	if (enable)
		710	ret = smu_cmn_send_smc_msg(smu, SMU_MSG_AllowGfxOff, NULL);
		711	else
		712	ret = smu_cmn_send_smc_msg(smu, SMU_MSG_DisallowGfxOff, NULL);
		713	break;
		714	default:
		715	break;
		716	}
		717
		718	return ret;
		719	}
		720
697	int smu_v13_0_system_features_control(struct smu_context *smu,	721	int smu_v13_0_system_features_control(struct smu_context *smu,
698	bool en)	722	bool en)
699	{	723	{

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_1.c+0−311

@@ -1,311 +0,0 @@
1	/*
2	* Copyright 2020 Advanced Micro Devices, Inc.
3	*
4	* Permission is hereby granted, free of charge, to any person obtaining a
5	* copy of this software and associated documentation files (the "Software"),
6	* to deal in the Software without restriction, including without limitation
7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8	* and/or sell copies of the Software, and to permit persons to whom the
9	* Software is furnished to do so, subject to the following conditions:
10	*
11	* The above copyright notice and this permission notice shall be included in
12	* all copies or substantial portions of the Software.
13	*
14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20	* OTHER DEALINGS IN THE SOFTWARE.
21	*/
22
23	//#include <linux/reboot.h>
24
25	#define SWSMU_CODE_LAYER_L3
26
27	#include "amdgpu.h"
28	#include "amdgpu_smu.h"
29	#include "smu_v13_0_1.h"
30	#include "soc15_common.h"
31	#include "smu_cmn.h"
32	#include "atomfirmware.h"
33	#include "amdgpu_atomfirmware.h"
34	#include "amdgpu_atombios.h"
35	#include "atom.h"
36
37	#include "asic_reg/mp/mp_13_0_1_offset.h"
38	#include "asic_reg/mp/mp_13_0_1_sh_mask.h"
39
40	/*
41	* DO NOT use these for err/warn/info/debug messages.
42	* Use dev_err, dev_warn, dev_info and dev_dbg instead.
43	* They are more MGPU friendly.
44	*/
45	#undef pr_err
46	#undef pr_warn
47	#undef pr_info
48	#undef pr_debug
49
50	int smu_v13_0_1_check_fw_status(struct smu_context *smu)
51	{
52	struct amdgpu_device *adev = smu->adev;
53	uint32_t mp1_fw_flags;
54
55	mp1_fw_flags = RREG32_PCIE(MP1_Public \|
56	(smnMP1_FIRMWARE_FLAGS & 0xffffffff));
57
58	if ((mp1_fw_flags & MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK) >>
59	MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED__SHIFT)
60	return 0;
61
62	return -EIO;
63	}
64
65	int smu_v13_0_1_check_fw_version(struct smu_context *smu)
66	{
67	uint32_t if_version = 0xff, smu_version = 0xff;
68	uint16_t smu_major;
69	uint8_t smu_minor, smu_debug;
70	int ret = 0;
71
72	ret = smu_cmn_get_smc_version(smu, &if_version, &smu_version);
73	if (ret)
74	return ret;
75
76	smu_major = (smu_version >> 16) & 0xffff;
77	smu_minor = (smu_version >> 8) & 0xff;
78	smu_debug = (smu_version >> 0) & 0xff;
79
80	switch (smu->adev->asic_type) {
81	case CHIP_YELLOW_CARP:
82	smu->smc_driver_if_version = SMU13_0_1_DRIVER_IF_VERSION_YELLOW_CARP;
83	break;
84
85	default:
86	dev_err(smu->adev->dev, "smu unsupported asic type:%d.\n", smu->adev->asic_type);
87	smu->smc_driver_if_version = SMU13_0_1_DRIVER_IF_VERSION_INV;
88	break;
89	}
90
91	dev_info(smu->adev->dev, "smu fw reported version = 0x%08x (%d.%d.%d)\n",
92	smu_version, smu_major, smu_minor, smu_debug);
93
94	/*
95	* 1. if_version mismatch is not critical as our fw is designed
96	* to be backward compatible.
97	* 2. New fw usually brings some optimizations. But that's visible
98	* only on the paired driver.
99	* Considering above, we just leave user a warning message instead
100	* of halt driver loading.
101	*/
102	if (if_version != smu->smc_driver_if_version) {
103	dev_info(smu->adev->dev, "smu driver if version = 0x%08x, smu fw if version = 0x%08x, "
104	"smu fw version = 0x%08x (%d.%d.%d)\n",
105	smu->smc_driver_if_version, if_version,
106	smu_version, smu_major, smu_minor, smu_debug);
107	dev_warn(smu->adev->dev, "SMU driver if version not matched\n");
108	}
109
110	return ret;
111	}
112
113	int smu_v13_0_1_fini_smc_tables(struct smu_context *smu)
114	{
115	struct smu_table_context *smu_table = &smu->smu_table;
116
117	kfree(smu_table->clocks_table);
118	smu_table->clocks_table = NULL;
119
120	kfree(smu_table->metrics_table);
121	smu_table->metrics_table = NULL;
122
123	kfree(smu_table->watermarks_table);
124	smu_table->watermarks_table = NULL;
125
126	return 0;
127	}
128
129	static int smu_v13_0_1_atom_get_smu_clockinfo(struct amdgpu_device *adev,
130	uint8_t clk_id,
131	uint8_t syspll_id,
132	uint32_t *clk_freq)
133	{
134	struct atom_get_smu_clock_info_parameters_v3_1 input = {0};
135	struct atom_get_smu_clock_info_output_parameters_v3_1 *output;
136	int ret, index;
137
138	input.clk_id = clk_id;
139	input.syspll_id = syspll_id;
140	input.command = GET_SMU_CLOCK_INFO_V3_1_GET_CLOCK_FREQ;
141	index = get_index_into_master_table(atom_master_list_of_command_functions_v2_1,
142	getsmuclockinfo);
143
144	ret = amdgpu_atom_execute_table(adev->mode_info.atom_context, index,
145	(uint32_t *)&input);
146	if (ret)
147	return -EINVAL;
148
149	output = (struct atom_get_smu_clock_info_output_parameters_v3_1 *)&input;
150	*clk_freq = le32_to_cpu(output->atom_smu_outputclkfreq.smu_clock_freq_hz) / 10000;
151
152	return 0;
153	}
154
155	int smu_v13_0_1_get_vbios_bootup_values(struct smu_context *smu)
156	{
157	int ret, index;
158	uint16_t size;
159	uint8_t frev, crev;
160	struct atom_common_table_header *header;
161	struct atom_firmware_info_v3_4 *v_3_4;
162	struct atom_firmware_info_v3_3 *v_3_3;
163	struct atom_firmware_info_v3_1 *v_3_1;
164
165	index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
166	firmwareinfo);
167
168	ret = amdgpu_atombios_get_data_table(smu->adev, index, &size, &frev, &crev,
169	(uint8_t **)&header);
170	if (ret)
171	return ret;
172
173	if (header->format_revision != 3) {
174	dev_err(smu->adev->dev, "unknown atom_firmware_info version! for smu13\n");
175	return -EINVAL;
176	}
177
178	switch (header->content_revision) {
179	case 0:
180	case 1:
181	case 2:
182	v_3_1 = (struct atom_firmware_info_v3_1 *)header;
183	smu->smu_table.boot_values.revision = v_3_1->firmware_revision;
184	smu->smu_table.boot_values.gfxclk = v_3_1->bootup_sclk_in10khz;
185	smu->smu_table.boot_values.uclk = v_3_1->bootup_mclk_in10khz;
186	smu->smu_table.boot_values.socclk = 0;
187	smu->smu_table.boot_values.dcefclk = 0;
188	smu->smu_table.boot_values.vddc = v_3_1->bootup_vddc_mv;
189	smu->smu_table.boot_values.vddci = v_3_1->bootup_vddci_mv;
190	smu->smu_table.boot_values.mvddc = v_3_1->bootup_mvddc_mv;
191	smu->smu_table.boot_values.vdd_gfx = v_3_1->bootup_vddgfx_mv;
192	smu->smu_table.boot_values.cooling_id = v_3_1->coolingsolution_id;
193	break;
194	case 3:
195	v_3_3 = (struct atom_firmware_info_v3_3 *)header;
196	smu->smu_table.boot_values.revision = v_3_3->firmware_revision;
197	smu->smu_table.boot_values.gfxclk = v_3_3->bootup_sclk_in10khz;
198	smu->smu_table.boot_values.uclk = v_3_3->bootup_mclk_in10khz;
199	smu->smu_table.boot_values.socclk = 0;
200	smu->smu_table.boot_values.dcefclk = 0;
201	smu->smu_table.boot_values.vddc = v_3_3->bootup_vddc_mv;
202	smu->smu_table.boot_values.vddci = v_3_3->bootup_vddci_mv;
203	smu->smu_table.boot_values.mvddc = v_3_3->bootup_mvddc_mv;
204	smu->smu_table.boot_values.vdd_gfx = v_3_3->bootup_vddgfx_mv;
205	smu->smu_table.boot_values.cooling_id = v_3_3->coolingsolution_id;
206	break;
207	case 4:
208	default:
209	v_3_4 = (struct atom_firmware_info_v3_4 *)header;
210	smu->smu_table.boot_values.revision = v_3_4->firmware_revision;
211	smu->smu_table.boot_values.gfxclk = v_3_4->bootup_sclk_in10khz;
212	smu->smu_table.boot_values.uclk = v_3_4->bootup_mclk_in10khz;
213	smu->smu_table.boot_values.socclk = 0;
214	smu->smu_table.boot_values.dcefclk = 0;
215	smu->smu_table.boot_values.vddc = v_3_4->bootup_vddc_mv;
216	smu->smu_table.boot_values.vddci = v_3_4->bootup_vddci_mv;
217	smu->smu_table.boot_values.mvddc = v_3_4->bootup_mvddc_mv;
218	smu->smu_table.boot_values.vdd_gfx = v_3_4->bootup_vddgfx_mv;
219	smu->smu_table.boot_values.cooling_id = v_3_4->coolingsolution_id;
220	break;
221	}
222
223	smu->smu_table.boot_values.format_revision = header->format_revision;
224	smu->smu_table.boot_values.content_revision = header->content_revision;
225
226	smu_v13_0_1_atom_get_smu_clockinfo(smu->adev,
227	(uint8_t)SMU11_SYSPLL0_SOCCLK_ID,
228	(uint8_t)0,
229	&smu->smu_table.boot_values.socclk);
230
231	smu_v13_0_1_atom_get_smu_clockinfo(smu->adev,
232	(uint8_t)SMU11_SYSPLL0_DCEFCLK_ID,
233	(uint8_t)0,
234	&smu->smu_table.boot_values.dcefclk);
235
236	smu_v13_0_1_atom_get_smu_clockinfo(smu->adev,
237	(uint8_t)SMU11_SYSPLL0_ECLK_ID,
238	(uint8_t)0,
239	&smu->smu_table.boot_values.eclk);
240
241	smu_v13_0_1_atom_get_smu_clockinfo(smu->adev,
242	(uint8_t)SMU11_SYSPLL0_VCLK_ID,
243	(uint8_t)0,
244	&smu->smu_table.boot_values.vclk);
245
246	smu_v13_0_1_atom_get_smu_clockinfo(smu->adev,
247	(uint8_t)SMU11_SYSPLL0_DCLK_ID,
248	(uint8_t)0,
249	&smu->smu_table.boot_values.dclk);
250
251	if ((smu->smu_table.boot_values.format_revision == 3) &&
252	(smu->smu_table.boot_values.content_revision >= 2))
253	smu_v13_0_1_atom_get_smu_clockinfo(smu->adev,
254	(uint8_t)SMU11_SYSPLL1_0_FCLK_ID,
255	(uint8_t)SMU11_SYSPLL1_2_ID,
256	&smu->smu_table.boot_values.fclk);
257
258	return 0;
259	}
260
261	int smu_v13_0_1_set_default_dpm_tables(struct smu_context *smu)
262	{
263	struct smu_table_context *smu_table = &smu->smu_table;
264
265	return smu_cmn_update_table(smu, SMU_TABLE_DPMCLOCKS, 0, smu_table->clocks_table, false);
266	}
267
268	int smu_v13_0_1_set_driver_table_location(struct smu_context *smu)
269	{
270	struct smu_table *driver_table = &smu->smu_table.driver_table;
271	int ret = 0;
272
273	if (!driver_table->mc_address)
274	return 0;
275
276	ret = smu_cmn_send_smc_msg_with_param(smu,
277	SMU_MSG_SetDriverDramAddrHigh,
278	upper_32_bits(driver_table->mc_address),
279	NULL);
280
281	if (ret)
282	return ret;
283
284	ret = smu_cmn_send_smc_msg_with_param(smu,
285	SMU_MSG_SetDriverDramAddrLow,
286	lower_32_bits(driver_table->mc_address),
287	NULL);
288
289	return ret;
290	}
291
292	int smu_v13_0_1_gfx_off_control(struct smu_context *smu, bool enable)
293	{
294	int ret = 0;
295	struct amdgpu_device *adev = smu->adev;
296
297	switch (adev->asic_type) {
298	case CHIP_YELLOW_CARP:
299	if (!(adev->pm.pp_feature & PP_GFXOFF_MASK))
300	return 0;
301	if (enable)
302	ret = smu_cmn_send_smc_msg(smu, SMU_MSG_AllowGfxOff, NULL);
303	else
304	ret = smu_cmn_send_smc_msg(smu, SMU_MSG_DisallowGfxOff, NULL);
305	break;
306	default:
307	break;
308	}
309
310	return ret;
311	}

drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c+34−15

@@ -25,7 +25,7 @@ · 24 unmodified lines
25		25
26	#include "amdgpu.h"	26	#include "amdgpu.h"
27	#include "amdgpu_smu.h"	27	#include "amdgpu_smu.h"
28	#include "smu_v13_0_1.h"	28	#include "smu_v13_0.h"
29	#include "smu13_driver_if_yellow_carp.h"	29	#include "smu13_driver_if_yellow_carp.h"
30	#include "yellow_carp_ppt.h"	30	#include "yellow_carp_ppt.h"
31	#include "smu_v13_0_1_ppsmc.h"	31	#include "smu_v13_0_1_ppsmc.h"
@@ -186,6 +186,22 @@ err0_out: · 154 unmodified lines
186	return -ENOMEM;	186	return -ENOMEM;
187	}	187	}
188		188
		189	static int yellow_carp_fini_smc_tables(struct smu_context *smu)
		190	{
		191	struct smu_table_context *smu_table = &smu->smu_table;
		192
		193	kfree(smu_table->clocks_table);
		194	smu_table->clocks_table = NULL;
		195
		196	kfree(smu_table->metrics_table);
		197	smu_table->metrics_table = NULL;
		198
		199	kfree(smu_table->watermarks_table);
		200	smu_table->watermarks_table = NULL;
		201
		202	return 0;
		203	}
		204
189	static int yellow_carp_system_features_control(struct smu_context *smu, bool en)	205	static int yellow_carp_system_features_control(struct smu_context *smu, bool en)
190	{	206	{
191	struct smu_feature *feature = &smu->smu_feature;	207	struct smu_feature *feature = &smu->smu_feature;
@@ -282,13 +298,9 @@ static int yellow_carp_mode_reset(struct smu_context *smu, int type) · 90 unmodified lines
282	if (index < 0)	298	if (index < 0)
283	return index == -EACCES ? 0 : index;	299	return index == -EACCES ? 0 : index;
284		300
285	mutex_lock(&smu->message_lock);	301	ret = smu_cmn_send_smc_msg_with_param(smu, (uint16_t)index, type, NULL);
286		302	if (ret)
287	ret = smu_cmn_send_msg_without_waiting(smu, (uint16_t)index, type);	303	dev_err(smu->adev->dev, "Failed to mode reset!\n");
288
289	mutex_unlock(&smu->message_lock);
290
291	mdelay(10);
292		304
293	return ret;	305	return ret;
294	}	306	}
@@ -659,6 +671,13 @@ static ssize_t yellow_carp_get_gpu_metrics(struct smu_context *smu, · 364 unmodified lines
659	return sizeof(struct gpu_metrics_v2_1);	671	return sizeof(struct gpu_metrics_v2_1);
660	}	672	}
661		673
		674	static int yellow_carp_set_default_dpm_tables(struct smu_context *smu)
		675	{
		676	struct smu_table_context *smu_table = &smu->smu_table;
		677
		678	return smu_cmn_update_table(smu, SMU_TABLE_DPMCLOCKS, 0, smu_table->clocks_table, false);
		679	}
		680
662	static int yellow_carp_od_edit_dpm_table(struct smu_context *smu, enum PP_OD_DPM_TABLE_COMMAND type,	681	static int yellow_carp_od_edit_dpm_table(struct smu_context *smu, enum PP_OD_DPM_TABLE_COMMAND type,
663	long input[], uint32_t size)	682	long input[], uint32_t size)
664	{	683	{
@@ -1203,17 +1222,17 @@ static int yellow_carp_set_fine_grain_gfx_freq_parameters(struct smu_context *sm · 538 unmodified lines
1203	}	1222	}
1204		1223
1205	static const struct pptable_funcs yellow_carp_ppt_funcs = {	1224	static const struct pptable_funcs yellow_carp_ppt_funcs = {
1206	.check_fw_status = smu_v13_0_1_check_fw_status,	1225	.check_fw_status = smu_v13_0_check_fw_status,
1207	.check_fw_version = smu_v13_0_1_check_fw_version,	1226	.check_fw_version = smu_v13_0_check_fw_version,
1208	.init_smc_tables = yellow_carp_init_smc_tables,	1227	.init_smc_tables = yellow_carp_init_smc_tables,
1209	.fini_smc_tables = smu_v13_0_1_fini_smc_tables,	1228	.fini_smc_tables = yellow_carp_fini_smc_tables,
1210	.get_vbios_bootup_values = smu_v13_0_1_get_vbios_bootup_values,	1229	.get_vbios_bootup_values = smu_v13_0_get_vbios_bootup_values,
1211	.system_features_control = yellow_carp_system_features_control,	1230	.system_features_control = yellow_carp_system_features_control,
1212	.send_smc_msg_with_param = smu_cmn_send_smc_msg_with_param,	1231	.send_smc_msg_with_param = smu_cmn_send_smc_msg_with_param,
1213	.send_smc_msg = smu_cmn_send_smc_msg,	1232	.send_smc_msg = smu_cmn_send_smc_msg,
1214	.dpm_set_vcn_enable = yellow_carp_dpm_set_vcn_enable,	1233	.dpm_set_vcn_enable = yellow_carp_dpm_set_vcn_enable,
1215	.dpm_set_jpeg_enable = yellow_carp_dpm_set_jpeg_enable,	1234	.dpm_set_jpeg_enable = yellow_carp_dpm_set_jpeg_enable,
1216	.set_default_dpm_table = smu_v13_0_1_set_default_dpm_tables,	1235	.set_default_dpm_table = yellow_carp_set_default_dpm_tables,
1217	.read_sensor = yellow_carp_read_sensor,	1236	.read_sensor = yellow_carp_read_sensor,
1218	.is_dpm_running = yellow_carp_is_dpm_running,	1237	.is_dpm_running = yellow_carp_is_dpm_running,
1219	.set_watermarks_table = yellow_carp_set_watermarks_table,	1238	.set_watermarks_table = yellow_carp_set_watermarks_table,
@@ -1222,8 +1241,8 @@ static const struct pptable_funcs yellow_carp_ppt_funcs = { · 2 unmodified lines
1222	.get_gpu_metrics = yellow_carp_get_gpu_metrics,	1241	.get_gpu_metrics = yellow_carp_get_gpu_metrics,
1223	.get_enabled_mask = smu_cmn_get_enabled_32_bits_mask,	1242	.get_enabled_mask = smu_cmn_get_enabled_32_bits_mask,
1224	.get_pp_feature_mask = smu_cmn_get_pp_feature_mask,	1243	.get_pp_feature_mask = smu_cmn_get_pp_feature_mask,
1225	.set_driver_table_location = smu_v13_0_1_set_driver_table_location,	1244	.set_driver_table_location = smu_v13_0_set_driver_table_location,
1226	.gfx_off_control = smu_v13_0_1_gfx_off_control,	1245	.gfx_off_control = smu_v13_0_gfx_off_control,
1227	.post_init = yellow_carp_post_smu_init,	1246	.post_init = yellow_carp_post_smu_init,
1228	.mode2_reset = yellow_carp_mode2_reset,	1247	.mode2_reset = yellow_carp_mode2_reset,
1229	.get_dpm_ultimate_freq = yellow_carp_get_dpm_ultimate_freq,	1248	.get_dpm_ultimate_freq = yellow_carp_get_dpm_ultimate_freq,

drivers/gpu/drm/i915/gem/i915_gem_shrinker.c+1−0

@@ -62,6 +62,7 @@ static void try_to_writeback(struct drm_i915_gem_object *obj, · 61 unmodified lines
62	switch (obj->mm.madv) {	62	switch (obj->mm.madv) {
63	case I915_MADV_DONTNEED:	63	case I915_MADV_DONTNEED:
64	i915_gem_object_truncate(obj);	64	i915_gem_object_truncate(obj);
		65	return;
65	case __I915_MADV_PURGED:	66	case __I915_MADV_PURGED:
66	return;	67	return;
67	}	68	}

drivers/gpu/drm/i915/gt/gen8_ppgtt.c+1−4

 			__i915_gem_object_pin_pages(pt->base);
 			i915_gem_object_make_unshrinkable(pt->base);
-			if (lvl ||
+			fill_px(pt, vm->scratch[lvl]->encode);
-			    gen8_pt_count(*start, end) < I915_PDES ||
-			    intel_vgpu_active(vm->i915))
-				fill_px(pt, vm->scratch[lvl]->encode);
 			spin_lock(&pd->lock);
 			if (likely(!pd->entry[idx])) {

drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c+1−1

@@ -348,7 +348,7 @@ static struct i915_fence_reg fence_find(struct i915_ggtt ggtt) · 347 unmodified lines
348	if (intel_has_pending_fb_unpin(ggtt->vm.i915))	348	if (intel_has_pending_fb_unpin(ggtt->vm.i915))
349	return ERR_PTR(-EAGAIN);	349	return ERR_PTR(-EAGAIN);
350		350
351	return ERR_PTR(-EDEADLK);	351	return ERR_PTR(-ENOBUFS);
352	}	352	}
353		353
354	int __i915_vma_pin_fence(struct i915_vma *vma)	354	int __i915_vma_pin_fence(struct i915_vma *vma)

drivers/gpu/drm/msm/msm_gem.c+1−1

@@ -1169,7 +1169,7 @@ static int msm_gem_new_impl(struct drm_device *dev, · 1168 unmodified lines
1169	case MSM_BO_CACHED_COHERENT:	1169	case MSM_BO_CACHED_COHERENT:
1170	if (priv->has_cached_coherent)	1170	if (priv->has_cached_coherent)
1171	break;	1171	break;
1172	/* fallthrough */	1172	fallthrough;
1173	default:	1173	default:
1174	DRM_DEV_ERROR(dev->dev, "invalid cache flag: %x\n",	1174	DRM_DEV_ERROR(dev->dev, "invalid cache flag: %x\n",
1175	(flags & MSM_BO_CACHE_MASK));	1175	(flags & MSM_BO_CACHE_MASK));

drivers/gpu/drm/panel/panel-novatek-nt35510.c+1−3

@@ -706,9 +706,7 @@ static int nt35510_power_on(struct nt35510 *nt) · 705 unmodified lines
706	if (ret)	706	if (ret)
707	return ret;	707	return ret;
708		708
709	ret = nt35510_read_id(nt);	709	nt35510_read_id(nt);
710	if (ret)
711	return ret;
712		710
713	/* Set up stuff in manufacturer control, page 1 */	711	/* Set up stuff in manufacturer control, page 1 */
714	ret = nt35510_send_long(nt, dsi, MCS_CMD_MAUCCTR,	712	ret = nt35510_send_long(nt, dsi, MCS_CMD_MAUCCTR,

drivers/gpu/drm/qxl/qxl_ttm.c+1−1

@@ -127,7 +127,7 @@ static void qxl_bo_move_notify(struct ttm_buffer_object *bo, · 126 unmodified lines
127	struct qxl_bo *qbo;	127	struct qxl_bo *qbo;
128	struct qxl_device *qdev;	128	struct qxl_device *qdev;
129		129
130	if (!qxl_ttm_bo_is_qxl_bo(bo))	130	if (!qxl_ttm_bo_is_qxl_bo(bo) \|\| !bo->resource)
131	return;	131	return;
132	qbo = to_qxl_bo(bo);	132	qbo = to_qxl_bo(bo);
133	qdev = to_qxl(qbo->tbo.base.dev);	133	qdev = to_qxl(qbo->tbo.base.dev);

drivers/gpu/drm/ttm/ttm_range_manager.c+3−0

@@ -181,6 +181,9 @@ int ttm_range_man_fini(struct ttm_device *bdev, · 180 unmodified lines
181	struct drm_mm *mm = &rman->mm;	181	struct drm_mm *mm = &rman->mm;
182	int ret;	182	int ret;
183		183
		184	if (!man)
		185	return 0;
		186
184	ttm_resource_manager_set_used(man, false);	187	ttm_resource_manager_set_used(man, false);
185		188
186	ret = ttm_resource_manager_evict_all(bdev, man);	189	ret = ttm_resource_manager_evict_all(bdev, man);

drivers/gpu/drm/vmwgfx/vmwgfx_drv.c+1−0

@@ -36,6 +36,7 @@ · 35 unmodified lines
36	#include <drm/drm_ioctl.h>	36	#include <drm/drm_ioctl.h>
37	#include <drm/drm_sysfs.h>	37	#include <drm/drm_sysfs.h>
38	#include <drm/ttm/ttm_bo_driver.h>	38	#include <drm/ttm/ttm_bo_driver.h>
		39	#include <drm/ttm/ttm_range_manager.h>
39	#include <drm/ttm/ttm_placement.h>	40	#include <drm/ttm/ttm_placement.h>
40	#include <generated/utsrelease.h>	41	#include <generated/utsrelease.h>
41		42

drivers/gpu/drm/vmwgfx/vmwgfx_mob.c+0−1

@@ -354,7 +354,6 @@ static void vmw_otable_batch_takedown(struct vmw_private *dev_priv, · 353 unmodified lines
354	ttm_bo_unpin(bo);	354	ttm_bo_unpin(bo);
355	ttm_bo_unreserve(bo);	355	ttm_bo_unreserve(bo);
356		356
357	ttm_bo_unpin(batch->otable_bo);
358	ttm_bo_put(batch->otable_bo);	357	ttm_bo_put(batch->otable_bo);
359	batch->otable_bo = NULL;	358	batch->otable_bo = NULL;
360	}	359	}

drivers/hv/channel_mgmt.c+64−32

 	 */
 	mutex_lock(&vmbus_connection.channel_mutex);
+	list_for_each_entry(channel, &vmbus_connection.chn_list, listentry) {
+		if (guid_equal(&channel->offermsg.offer.if_type,
+			       &newchannel->offermsg.offer.if_type) &&
+		    guid_equal(&channel->offermsg.offer.if_instance,
+			       &newchannel->offermsg.offer.if_instance)) {
+			fnew = false;
+			newchannel->primary_channel = channel;
+			break;
+		}
+	}
 	init_vp_index(newchannel);
 	/* Remember the channels that should be cleaned up upon suspend. */
 	 */
 	atomic_dec(&vmbus_connection.offer_in_progress);
-	list_for_each_entry(channel, &vmbus_connection.chn_list, listentry) {
-		if (guid_equal(&channel->offermsg.offer.if_type,
-			       &newchannel->offermsg.offer.if_type) &&
-		    guid_equal(&channel->offermsg.offer.if_instance,
-			       &newchannel->offermsg.offer.if_instance)) {
-			fnew = false;
-			break;
-		}
-	}
 	if (fnew) {
 		list_add_tail(&newchannel->listentry,
 			      &vmbus_connection.chn_list);
 		/*
 		 * Process the sub-channel.
 		 */
-		newchannel->primary_channel = channel;
 		list_add_tail(&newchannel->sc_list, &channel->sc_list);
 	}
 	queue_work(wq, &newchannel->add_channel_work);
 }
+/*
+ * Check if CPUs used by other channels of the same device.
+ * It should only be called by init_vp_index().
+ */
+static bool hv_cpuself_used(u32 cpu, struct vmbus_channel *chn)
+{
+	struct vmbus_channel *primary = chn->primary_channel;
+	struct vmbus_channel *sc;
+	lockdep_assert_held(&vmbus_connection.channel_mutex);
+	if (!primary)
+		return false;
+	if (primary->target_cpu == cpu)
+		return true;
+	list_for_each_entry(sc, &primary->sc_list, sc_list)
+		if (sc != chn && sc->target_cpu == cpu)
+			return true;
+	return false;
+}
 /*
  * We use this state to statically distribute the channel interrupt load.
  */
 static void init_vp_index(struct vmbus_channel *channel)
 {
 	bool perf_chn = hv_is_perf_channel(channel);
+	u32 i, ncpu = num_online_cpus();
 	cpumask_var_t available_mask;
 	struct cpumask *alloced_mask;
 	u32 target_cpu;
 		return;
 	}
-	while (true) {
+	for (i = 1; i <= ncpu + 1; i++) {
-		numa_node = next_numa_node_id++;
+		while (true) {
-		if (numa_node == nr_node_ids) {
+			numa_node = next_numa_node_id++;
-			next_numa_node_id = 0;
+			if (numa_node == nr_node_ids) {
-			continue;
+				next_numa_node_id = 0;
+				continue;
+			}
+			if (cpumask_empty(cpumask_of_node(numa_node)))
+				continue;
+			break;
+		}
+		alloced_mask = &hv_context.hv_numa_map[numa_node];
+		if (cpumask_weight(alloced_mask) ==
+		    cpumask_weight(cpumask_of_node(numa_node))) {
+			/*
+			 * We have cycled through all the CPUs in the node;
+			 * reset the alloced map.
+			 */
+			cpumask_clear(alloced_mask);
 		}
-		if (cpumask_empty(cpumask_of_node(numa_node)))
-			continue;
-		break;
-	}
-	alloced_mask = &hv_context.hv_numa_map[numa_node];
-	if (cpumask_weight(alloced_mask) ==
+		cpumask_xor(available_mask, alloced_mask,
-	    cpumask_weight(cpumask_of_node(numa_node))) {
+			    cpumask_of_node(numa_node));
-		/*
-		 * We have cycled through all the CPUs in the node;
-		 * reset the alloced map.
-		 */
-		cpumask_clear(alloced_mask);
-	}
-	cpumask_xor(available_mask, alloced_mask, cpumask_of_node(numa_node));
+		target_cpu = cpumask_first(available_mask);
+		cpumask_set_cpu(target_cpu, alloced_mask);
-	target_cpu = cpumask_first(available_mask);
+		if (channel->offermsg.offer.sub_channel_index >= ncpu ||
-	cpumask_set_cpu(target_cpu, alloced_mask);
+		    i > ncpu || !hv_cpuself_used(target_cpu, channel))
+			break;
+	}
 	channel->target_cpu = target_cpu;

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c+1−0

@@ -379,6 +379,7 @@ static void arm_smmu_cmdq_skip_err(struct arm_smmu_device *smmu) · 378 unmodified lines
379	switch (idx) {	379	switch (idx) {
380	case CMDQ_ERR_CERROR_ABT_IDX:	380	case CMDQ_ERR_CERROR_ABT_IDX:
381	dev_err(smmu->dev, "retrying command fetch\n");	381	dev_err(smmu->dev, "retrying command fetch\n");
		382	return;
382	case CMDQ_ERR_CERROR_NONE_IDX:	383	case CMDQ_ERR_CERROR_NONE_IDX:
383	return;	384	return;
384	case CMDQ_ERR_CERROR_ATC_INV_IDX:	385	case CMDQ_ERR_CERROR_ATC_INV_IDX:

drivers/iommu/arm/arm-smmu/qcom_iommu.c+2−11

 	ret = iommu_device_register(&qcom_iommu->iommu, &qcom_iommu_ops, dev);
 	if (ret) {
 		dev_err(dev, "Failed to register iommu\n");
-		goto err_sysfs_remove;
+		return ret;
 	}
-	ret = bus_set_iommu(&platform_bus_type, &qcom_iommu_ops);
+	bus_set_iommu(&platform_bus_type, &qcom_iommu_ops);
-	if (ret)
-		goto err_unregister_device;
 	if (qcom_iommu->local_base) {
 		pm_runtime_get_sync(dev);
 	}
 	return 0;
-err_unregister_device:
-	iommu_device_unregister(&qcom_iommu->iommu);
-err_sysfs_remove:
-	iommu_device_sysfs_remove(&qcom_iommu->iommu);
-	return ret;
 }
 static int qcom_iommu_device_remove(struct platform_device *pdev)

drivers/iommu/intel/iommu.c+23−11

@@ -2429,10 +2429,11 @@ __domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn, · 2428 unmodified lines
2429	return 0;	2429	return 0;
2430	}	2430	}
2431		2431
2432	static void domain_context_clear_one(struct intel_iommu *iommu, u8 bus, u8 devfn)	2432	static void domain_context_clear_one(struct device_domain_info *info, u8 bus, u8 devfn)
2433	{	2433	{
2434	unsigned long flags;	2434	struct intel_iommu *iommu = info->iommu;
2435	struct context_entry *context;	2435	struct context_entry *context;
		2436	unsigned long flags;
2436	u16 did_old;	2437	u16 did_old;
2437		2438
2438	if (!iommu)	2439	if (!iommu)
@@ -2444,7 +2445,16 @@ static void domain_context_clear_one(struct intel_iommu *iommu, u8 bus, u8 devfn · 5 unmodified lines
2444	spin_unlock_irqrestore(&iommu->lock, flags);	2445	spin_unlock_irqrestore(&iommu->lock, flags);
2445	return;	2446	return;
2446	}	2447	}
2447	did_old = context_domain_id(context);	2448
		2449	if (sm_supported(iommu)) {
		2450	if (hw_pass_through && domain_type_is_si(info->domain))
		2451	did_old = FLPT_DEFAULT_DID;
		2452	else
		2453	did_old = info->domain->iommu_did[iommu->seq_id];
		2454	} else {
		2455	did_old = context_domain_id(context);
		2456	}
		2457
2448	context_clear_entry(context);	2458	context_clear_entry(context);
2449	__iommu_flush_cache(iommu, context, sizeof(*context));	2459	__iommu_flush_cache(iommu, context, sizeof(*context));
2450	spin_unlock_irqrestore(&iommu->lock, flags);	2460	spin_unlock_irqrestore(&iommu->lock, flags);
@@ -2462,6 +2472,8 @@ static void domain_context_clear_one(struct intel_iommu *iommu, u8 bus, u8 devfn · 11 unmodified lines
2462	0,	2472	0,
2463	0,	2473	0,
2464	DMA_TLB_DSI_FLUSH);	2474	DMA_TLB_DSI_FLUSH);
		2475
		2476	__iommu_flush_dev_iotlb(info, 0, MAX_AGAW_PFN_WIDTH);
2465	}	2477	}
2466		2478
2467	static inline void unlink_domain_info(struct device_domain_info *info)	2479	static inline void unlink_domain_info(struct device_domain_info *info)
@@ -4425,9 +4437,9 @@ out_free_dmar: · 1957 unmodified lines
4425		4437
4426	static int domain_context_clear_one_cb(struct pci_dev pdev, u16 alias, void opaque)	4438	static int domain_context_clear_one_cb(struct pci_dev pdev, u16 alias, void opaque)
4427	{	4439	{
4428	struct intel_iommu *iommu = opaque;	4440	struct device_domain_info *info = opaque;
4429		4441
4430	domain_context_clear_one(iommu, PCI_BUS_NUM(alias), alias & 0xff);	4442	domain_context_clear_one(info, PCI_BUS_NUM(alias), alias & 0xff);
4431	return 0;	4443	return 0;
4432	}	4444	}
4433		4445
@@ -4437,12 +4449,13 @@ static int domain_context_clear_one_cb(struct pci_dev pdev, u16 alias, void op · 3 unmodified lines
4437	* devices, unbinding the driver from any one of them will possibly leave	4449	* devices, unbinding the driver from any one of them will possibly leave
4438	* the others unable to operate.	4450	* the others unable to operate.
4439	*/	4451	*/
4440	static void domain_context_clear(struct intel_iommu iommu, struct device dev)	4452	static void domain_context_clear(struct device_domain_info *info)
4441	{	4453	{
4442	if (!iommu \|\| !dev \|\| !dev_is_pci(dev))	4454	if (!info->iommu \|\| !info->dev \|\| !dev_is_pci(info->dev))
4443	return;	4455	return;
4444		4456
4445	pci_for_each_dma_alias(to_pci_dev(dev), &domain_context_clear_one_cb, iommu);	4457	pci_for_each_dma_alias(to_pci_dev(info->dev),
		4458	&domain_context_clear_one_cb, info);
4446	}	4459	}
4447		4460
4448	static void __dmar_remove_one_dev_info(struct device_domain_info *info)	4461	static void __dmar_remove_one_dev_info(struct device_domain_info *info)
@@ -4459,14 +4472,13 @@ static void __dmar_remove_one_dev_info(struct device_domain_info *info) · 10 unmodified lines
4459	iommu = info->iommu;	4472	iommu = info->iommu;
4460	domain = info->domain;	4473	domain = info->domain;
4461		4474
4462	if (info->dev) {	4475	if (info->dev && !dev_is_real_dma_subdevice(info->dev)) {
4463	if (dev_is_pci(info->dev) && sm_supported(iommu))	4476	if (dev_is_pci(info->dev) && sm_supported(iommu))
4464	intel_pasid_tear_down_entry(iommu, info->dev,	4477	intel_pasid_tear_down_entry(iommu, info->dev,
4465	PASID_RID2PASID, false);	4478	PASID_RID2PASID, false);
4466		4479
4467	iommu_disable_dev_iotlb(info);	4480	iommu_disable_dev_iotlb(info);
4468	if (!dev_is_real_dma_subdevice(info->dev))	4481	domain_context_clear(info);
4469	domain_context_clear(iommu, info->dev);
4470	intel_pasid_free_table(info->dev);	4482	intel_pasid_free_table(info->dev);
4471	}	4483	}
4472		4484

drivers/iommu/rockchip-iommu.c+4−2

 }
 #define DT_HI_MASK GENMASK_ULL(39, 32)
+#define DTE_BASE_HI_MASK GENMASK(11, 4)
 #define DT_SHIFT   28
 static inline phys_addr_t rk_dte_addr_phys_v2(u32 addr)
 {
-	return (phys_addr_t)(addr & RK_DTE_PT_ADDRESS_MASK) |
+	u64 addr64 = addr;
-	       ((addr & DT_HI_MASK) << DT_SHIFT);
+	return (phys_addr_t)(addr64 & RK_DTE_PT_ADDRESS_MASK) |
+	       ((addr64 & DTE_BASE_HI_MASK) << DT_SHIFT);
 }
 static inline u32 rk_dma_addr_dte_v2(dma_addr_t dt_dma)

drivers/mmc/core/block.c+21−14

@@ -28,6 +28,7 @@ · 27 unmodified lines
28	#include <linux/errno.h>	28	#include <linux/errno.h>
29	#include <linux/hdreg.h>	29	#include <linux/hdreg.h>
30	#include <linux/kdev_t.h>	30	#include <linux/kdev_t.h>
		31	#include <linux/kref.h>
31	#include <linux/blkdev.h>	32	#include <linux/blkdev.h>
32	#include <linux/cdev.h>	33	#include <linux/cdev.h>
33	#include <linux/mutex.h>	34	#include <linux/mutex.h>
@@ -111,7 +112,7 @@ struct mmc_blk_data { · 77 unmodified lines
111	#define MMC_BLK_CMD23 (1 << 0) /* Can do SET_BLOCK_COUNT for multiblock */	112	#define MMC_BLK_CMD23 (1 << 0) /* Can do SET_BLOCK_COUNT for multiblock */
112	#define MMC_BLK_REL_WR (1 << 1) /* MMC Reliable write support */	113	#define MMC_BLK_REL_WR (1 << 1) /* MMC Reliable write support */
113		114
114	unsigned int usage;	115	struct kref kref;
115	unsigned int read_only;	116	unsigned int read_only;
116	unsigned int part_type;	117	unsigned int part_type;
117	unsigned int reset_done;	118	unsigned int reset_done;
@@ -181,10 +182,8 @@ static struct mmc_blk_data mmc_blk_get(struct gendisk disk) · 63 unmodified lines
181		182
182	mutex_lock(&open_lock);	183	mutex_lock(&open_lock);
183	md = disk->private_data;	184	md = disk->private_data;
184	if (md && md->usage == 0)	185	if (md && !kref_get_unless_zero(&md->kref))
185	md = NULL;	186	md = NULL;
186	if (md)
187	md->usage++;
188	mutex_unlock(&open_lock);	187	mutex_unlock(&open_lock);
189		188
190	return md;	189	return md;
@@ -196,18 +195,25 @@ static inline int mmc_get_devidx(struct gendisk *disk) · 5 unmodified lines
196	return devidx;	195	return devidx;
197	}	196	}
198		197
199	static void mmc_blk_put(struct mmc_blk_data *md)	198	static void mmc_blk_kref_release(struct kref *ref)
200	{	199	{
201	mutex_lock(&open_lock);	200	struct mmc_blk_data *md = container_of(ref, struct mmc_blk_data, kref);
202	md->usage--;	201	int devidx;
203	if (md->usage == 0) {
204	int devidx = mmc_get_devidx(md->disk);
205		202
206	ida_simple_remove(&mmc_blk_ida, devidx);	203	devidx = mmc_get_devidx(md->disk);
207	put_disk(md->disk);	204	ida_simple_remove(&mmc_blk_ida, devidx);
208	kfree(md);	205
209	}	206	mutex_lock(&open_lock);
		207	md->disk->private_data = NULL;
210	mutex_unlock(&open_lock);	208	mutex_unlock(&open_lock);
		209
		210	put_disk(md->disk);
		211	kfree(md);
		212	}
		213
		214	static void mmc_blk_put(struct mmc_blk_data *md)
		215	{
		216	kref_put(&md->kref, mmc_blk_kref_release);
211	}	217	}
212		218
213	static ssize_t power_ro_lock_show(struct device *dev,	219	static ssize_t power_ro_lock_show(struct device *dev,
@@ -2327,7 +2333,8 @@ static struct mmc_blk_data mmc_blk_alloc_req(struct mmc_card card, · 2113 unmodified lines
2327		2333
2328	INIT_LIST_HEAD(&md->part);	2334	INIT_LIST_HEAD(&md->part);
2329	INIT_LIST_HEAD(&md->rpmbs);	2335	INIT_LIST_HEAD(&md->rpmbs);
2330	md->usage = 1;	2336	kref_init(&md->kref);
		2337
2331	md->queue.blkdata = md;	2338	md->queue.blkdata = md;
2332		2339
2333	md->disk->major = MMC_BLOCK_MAJOR;	2340	md->disk->major = MMC_BLOCK_MAJOR;

drivers/mmc/core/host.c+10−10

 {
 	struct mmc_host *host = cls_dev_to_mmc_host(dev);
 	wakeup_source_unregister(host->ws);
-	ida_simple_remove(&mmc_host_ida, host->index);
+	if (of_alias_get_id(host->parent->of_node, "mmc") < 0)
+		ida_simple_remove(&mmc_host_ida, host->index);
 	kfree(host);
 }
  */
 struct mmc_host *mmc_alloc_host(int extra, struct device *dev)
 {
-	int err;
+	int index;
 	struct mmc_host *host;
 	int alias_id, min_idx, max_idx;
 	alias_id = of_alias_get_id(dev->of_node, "mmc");
 	if (alias_id >= 0) {
-		min_idx = alias_id;
+		index = alias_id;
-		max_idx = alias_id + 1;
 	} else {
 		min_idx = mmc_first_nonreserved_index();
 		max_idx = 0;
-	}
-	err = ida_simple_get(&mmc_host_ida, min_idx, max_idx, GFP_KERNEL);
+		index = ida_simple_get(&mmc_host_ida, min_idx, max_idx, GFP_KERNEL);
-	if (err < 0) {
+		if (index < 0) {
-		kfree(host);
+			kfree(host);
-		return NULL;
+			return NULL;
+		}
 	}
-	host->index = err;
+	host->index = index;
 	dev_set_name(&host->class_dev, "mmc%d", host->index);
 	host->ws = wakeup_source_register(NULL, dev_name(&host->class_dev));

drivers/mmc/host/jz4740_mmc.c+2−0

@@ -789,6 +789,8 @@ static irqreturn_t jz_mmc_irq_worker(int irq, void *devid) · 788 unmodified lines
789	break;	789	break;
790	}	790	}
791	}	791	}
		792	fallthrough;
		793
792	case JZ4740_MMC_STATE_DONE:	794	case JZ4740_MMC_STATE_DONE:
793	break;	795	break;
794	}	796	}

drivers/mtd/chips/cfi_util.c+2−2

 #if BITS_PER_LONG >= 64
 	case 8:
 		onecmd |= (onecmd << (chip_mode * 32));
-#endif
 		fallthrough;
+#endif
 	case 4:
 		onecmd |= (onecmd << (chip_mode * 16));
 		fallthrough;
 #if BITS_PER_LONG >= 64
 	case 8:
 		res |= (onestat >> (chip_mode * 32));
-#endif
 		fallthrough;
+#endif
 	case 4:
 		res |= (onestat >> (chip_mode * 16));
 		fallthrough;

drivers/net/bonding/bond_main.c+2−0

 		return bond_event_changename(event_bond);
 	case NETDEV_UNREGISTER:
 		bond_remove_proc_entry(event_bond);
+#ifdef CONFIG_XFRM_OFFLOAD
 		xfrm_dev_state_flush(dev_net(bond_dev), bond_dev, true);
+#endif /* CONFIG_XFRM_OFFLOAD */
 		break;
 	case NETDEV_REGISTER:
 		bond_create_proc_entry(event_bond);

drivers/net/dsa/mt7530.c+2−0

@@ -366,6 +366,8 @@ mt7530_fdb_write(struct mt7530_priv *priv, u16 vid, · 365 unmodified lines
366	int i;	366	int i;
367		367
368	reg[1] \|= vid & CVID_MASK;	368	reg[1] \|= vid & CVID_MASK;
		369	if (vid > 1)
		370	reg[1] \|= ATA2_IVL;
369	reg[2] \|= (aging & AGE_TIMER_MASK) << AGE_TIMER;	371	reg[2] \|= (aging & AGE_TIMER_MASK) << AGE_TIMER;
370	reg[2] \|= (port_mask & PORT_MAP_MASK) << PORT_MAP;	372	reg[2] \|= (port_mask & PORT_MAP_MASK) << PORT_MAP;
371	/* STATIC_ENT indicate that entry is static wouldn't	373	/* STATIC_ENT indicate that entry is static wouldn't

drivers/net/dsa/mt7530.h+1−0

@@ -79,6 +79,7 @@ enum mt753x_bpdu_port_fw { · 78 unmodified lines
79	#define STATIC_EMP 0	79	#define STATIC_EMP 0
80	#define STATIC_ENT 3	80	#define STATIC_ENT 3
81	#define MT7530_ATA2 0x78	81	#define MT7530_ATA2 0x78
		82	#define ATA2_IVL BIT(15)
82		83
83	/* Register for address table write data */	84	/* Register for address table write data */
84	#define MT7530_ATWD 0x7c	85	#define MT7530_ATWD 0x7c

drivers/net/dsa/mv88e6xxx/Kconfig+1−1

@@ -12,7 +12,7 @@ config NET_DSA_MV88E6XXX · 11 unmodified lines
12	config NET_DSA_MV88E6XXX_PTP	12	config NET_DSA_MV88E6XXX_PTP
13	bool "PTP support for Marvell 88E6xxx"	13	bool "PTP support for Marvell 88E6xxx"
14	default n	14	default n
15	depends on PTP_1588_CLOCK	15	depends on NET_DSA_MV88E6XXX && PTP_1588_CLOCK
16	help	16	help
17	Say Y to enable PTP hardware timestamping on Marvell 88E6xxx switch	17	Say Y to enable PTP hardware timestamping on Marvell 88E6xxx switch
18	chips that support it.	18	chips that support it.

drivers/net/dsa/sja1105/sja1105_main.c+6−0

 		if (dsa_is_cpu_port(ds, port))
 			v->pvid = true;
 		list_add(&v->list, &priv->dsa_8021q_vlans);
+		v = kmemdup(v, sizeof(*v), GFP_KERNEL);
+		if (!v)
+			return -ENOMEM;
+		list_add(&v->list, &priv->bridge_vlans);
 	}
 	((struct sja1105_vlan_lookup_entry *)table->entries)[0] = pvid;

drivers/net/ethernet/broadcom/bnxt/bnxt.c+62−23

 	if ((tpa_info->flags2 & RX_CMP_FLAGS2_META_FORMAT_VLAN) &&
 	    (skb->dev->features & BNXT_HW_FEATURE_VLAN_ALL_RX)) {
-		u16 vlan_proto = tpa_info->metadata >>
+		__be16 vlan_proto = htons(tpa_info->metadata >>
-			RX_CMP_FLAGS2_METADATA_TPID_SFT;
+					  RX_CMP_FLAGS2_METADATA_TPID_SFT);
 		u16 vtag = tpa_info->metadata & RX_CMP_FLAGS2_METADATA_TCI_MASK;
-		__vlan_hwaccel_put_tag(skb, htons(vlan_proto), vtag);
+		if (eth_type_vlan(vlan_proto)) {
+			__vlan_hwaccel_put_tag(skb, vlan_proto, vtag);
+		} else {
+			dev_kfree_skb(skb);
+			return NULL;
+		}
 	}
 	skb_checksum_none_assert(skb);
 	    (skb->dev->features & BNXT_HW_FEATURE_VLAN_ALL_RX)) {
 		u32 meta_data = le32_to_cpu(rxcmp1->rx_cmp_meta_data);
 		u16 vtag = meta_data & RX_CMP_FLAGS2_METADATA_TCI_MASK;
-		u16 vlan_proto = meta_data >> RX_CMP_FLAGS2_METADATA_TPID_SFT;
+		__be16 vlan_proto = htons(meta_data >>
+					  RX_CMP_FLAGS2_METADATA_TPID_SFT);
-		__vlan_hwaccel_put_tag(skb, htons(vlan_proto), vtag);
+		if (eth_type_vlan(vlan_proto)) {
+			__vlan_hwaccel_put_tag(skb, vlan_proto, vtag);
+		} else {
+			dev_kfree_skb(skb);
+			goto next_rx;
+		}
 	}
 	skb_checksum_none_assert(skb);
 		bp->flags &= ~BNXT_FLAG_WOL_CAP;
 		if (flags & FUNC_QCAPS_RESP_FLAGS_WOL_MAGICPKT_SUPPORTED)
 			bp->flags |= BNXT_FLAG_WOL_CAP;
-		if (flags & FUNC_QCAPS_RESP_FLAGS_PTP_SUPPORTED)
+		if (flags & FUNC_QCAPS_RESP_FLAGS_PTP_SUPPORTED) {
 			__bnxt_hwrm_ptp_qcfg(bp);
+		} else {
+			kfree(bp->ptp_cfg);
+			bp->ptp_cfg = NULL;
+		}
 	} else {
 #ifdef CONFIG_BNXT_SRIOV
 		struct bnxt_vf_info *vf = &bp->vf;
 		}
 	}
-	bnxt_ptp_start(bp);
 	rc = bnxt_init_nic(bp, irq_re_init);
 	if (rc) {
 		netdev_err(bp->dev, "bnxt_init_nic err: %x\n", rc);
 {
 	int rc = 0;
+	if (test_bit(BNXT_STATE_ABORT_ERR, &bp->state)) {
+		netdev_err(bp->dev, "A previous firmware reset has not completed, aborting half open\n");
+		rc = -ENODEV;
+		goto half_open_err;
+	}
 	rc = bnxt_alloc_mem(bp, false);
 	if (rc) {
 		netdev_err(bp->dev, "bnxt_alloc_mem err: %x\n", rc);
 	rc = bnxt_hwrm_if_change(bp, true);
 	if (rc)
 		return rc;
+	if (bnxt_ptp_init(bp)) {
+		netdev_warn(dev, "PTP initialization failed.\n");
+		kfree(bp->ptp_cfg);
+		bp->ptp_cfg = NULL;
+	}
 	rc = __bnxt_open_nic(bp, true, true);
 	if (rc) {
 		bnxt_hwrm_if_change(bp, false);
+		bnxt_ptp_clear(bp);
 	} else {
 		if (test_and_clear_bit(BNXT_STATE_FW_RESET_DET, &bp->state)) {
 			if (!test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) {
 {
 	struct bnxt *bp = netdev_priv(dev);
+	bnxt_ptp_clear(bp);
 	bnxt_hwmon_close(bp);
 	bnxt_close_nic(bp, true, true);
 	bnxt_hwrm_shutdown_link(bp);
 		bnxt_clear_int_mode(bp);
 		pci_disable_device(bp->pdev);
 	}
+	bnxt_ptp_clear(bp);
 	__bnxt_close_nic(bp, true, false);
 	bnxt_vf_reps_free(bp);
 	bnxt_clear_int_mode(bp);
 			  (bp->fw_reset_max_dsecs * HZ / 10));
 }
+static void bnxt_fw_reset_abort(struct bnxt *bp, int rc)
+{
+	clear_bit(BNXT_STATE_IN_FW_RESET, &bp->state);
+	if (bp->fw_reset_state != BNXT_FW_RESET_STATE_POLL_VF) {
+		bnxt_ulp_start(bp, rc);
+		bnxt_dl_health_status_update(bp, false);
+	}
+	bp->fw_reset_state = 0;
+	dev_close(bp->dev);
+}
 static void bnxt_fw_reset_task(struct work_struct *work)
 {
 	struct bnxt *bp = container_of(work, struct bnxt, fw_reset_task.work);
-	int rc;
+	int rc = 0;
 	if (!test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) {
 		netdev_err(bp->dev, "bnxt_fw_reset_task() called when not in fw reset mode!\n");
 		}
 		bp->fw_reset_timestamp = jiffies;
 		rtnl_lock();
+		if (test_bit(BNXT_STATE_ABORT_ERR, &bp->state)) {
+			bnxt_fw_reset_abort(bp, rc);
+			rtnl_unlock();
+			return;
+		}
 		bnxt_fw_reset_close(bp);
 		if (bp->fw_cap & BNXT_FW_CAP_ERR_RECOVER_RELOAD) {
 			bp->fw_reset_state = BNXT_FW_RESET_STATE_POLL_FW_DOWN;
 			if (val == 0xffff) {
 				if (bnxt_fw_reset_timeout(bp)) {
 					netdev_err(bp->dev, "Firmware reset aborted, PCI config space invalid\n");
+					rc = -ETIMEDOUT;
 					goto fw_reset_abort;
 				}
 				bnxt_queue_fw_reset_work(bp, HZ / 1000);
 		clear_bit(BNXT_STATE_FW_FATAL_COND, &bp->state);
 		if (pci_enable_device(bp->pdev)) {
 			netdev_err(bp->dev, "Cannot re-enable PCI device\n");
+			rc = -ENODEV;
 			goto fw_reset_abort;
 		}
 		pci_set_master(bp->pdev);
 		}
 		rc = bnxt_open(bp->dev);
 		if (rc) {
-			netdev_err(bp->dev, "bnxt_open_nic() failed\n");
+			netdev_err(bp->dev, "bnxt_open() failed during FW reset\n");
-			clear_bit(BNXT_STATE_IN_FW_RESET, &bp->state);
+			bnxt_fw_reset_abort(bp, rc);
-			dev_close(bp->dev);
+			rtnl_unlock();
+			return;
 		}
 		bp->fw_reset_state = 0;
 		netdev_err(bp->dev, "fw_health_status 0x%x\n", sts);
 	}
 fw_reset_abort:
-	clear_bit(BNXT_STATE_IN_FW_RESET, &bp->state);
-	if (bp->fw_reset_state != BNXT_FW_RESET_STATE_POLL_VF)
-		bnxt_dl_health_status_update(bp, false);
-	bp->fw_reset_state = 0;
 	rtnl_lock();
-	dev_close(bp->dev);
+	bnxt_fw_reset_abort(bp, rc);
 	rtnl_unlock();
 }
 	if (BNXT_PF(bp))
 		devlink_port_type_clear(&bp->dl_port);
-	bnxt_ptp_clear(bp);
 	pci_disable_pcie_error_reporting(pdev);
 	unregister_netdev(dev);
 	clear_bit(BNXT_STATE_IN_FW_RESET, &bp->state);
 				   rc);
 	}
-	if (bnxt_ptp_init(bp)) {
-		netdev_warn(dev, "PTP initialization failed.\n");
-		kfree(bp->ptp_cfg);
-		bp->ptp_cfg = NULL;
-	}
 	bnxt_inv_fw_health_reg(bp);
 	bnxt_dl_register(bp);
 	if (netif_running(netdev))
 		bnxt_close(netdev);
-	pci_disable_device(pdev);
+	if (pci_is_enabled(pdev))
+		pci_disable_device(pdev);
 	bnxt_free_ctx_mem(bp);
 	kfree(bp->ctx);
 	bp->ctx = NULL;

drivers/net/ethernet/broadcom/bnxt/bnxt_dcb.c+9−1

 static int bnxt_ets_validate(struct bnxt *bp, struct ieee_ets *ets, u8 *tc)
 {
 	int total_ets_bw = 0;
+	bool zero = false;
 	u8 max_tc = 0;
 	int i;
 			break;
 		case IEEE_8021QAZ_TSA_ETS:
 			total_ets_bw += ets->tc_tx_bw[i];
+			zero = zero || !ets->tc_tx_bw[i];
 			break;
 		default:
 			return -ENOTSUPP;
 		}
 	}
-	if (total_ets_bw > 100)
+	if (total_ets_bw > 100) {
+		netdev_warn(bp->dev, "rejecting ETS config exceeding available bandwidth\n");
 		return -EINVAL;
+	}
+	if (zero && total_ets_bw == 100) {
+		netdev_warn(bp->dev, "rejecting ETS config starving a TC\n");
+		return -EINVAL;
+	}
 	if (max_tc >= bp->max_tc)
 		*tc = bp->max_tc;

drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c+7−17

@@ -385,22 +385,6 @@ int bnxt_get_rx_ts_p5(struct bnxt bp, u64 ts, u32 pkt_ts) · 384 unmodified lines
385	return 0;	385	return 0;
386	}	386	}
387		387
388	void bnxt_ptp_start(struct bnxt *bp)
389	{
390	struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
391
392	if (!ptp)
393	return;
394
395	if (bp->flags & BNXT_FLAG_CHIP_P5) {
396	spin_lock_bh(&ptp->ptp_lock);
397	ptp->current_time = bnxt_refclk_read(bp, NULL);
398	WRITE_ONCE(ptp->old_time, ptp->current_time);
399	spin_unlock_bh(&ptp->ptp_lock);
400	ptp_schedule_worker(ptp->ptp_clock, 0);
401	}
402	}
403
404	static const struct ptp_clock_info bnxt_ptp_caps = {	388	static const struct ptp_clock_info bnxt_ptp_caps = {
405	.owner = THIS_MODULE,	389	.owner = THIS_MODULE,
406	.name = "bnxt clock",	390	.name = "bnxt clock",
@@ -450,7 +434,13 @@ int bnxt_ptp_init(struct bnxt *bp) · 43 unmodified lines
450	bnxt_unmap_ptp_regs(bp);	434	bnxt_unmap_ptp_regs(bp);
451	return err;	435	return err;
452	}	436	}
453		437	if (bp->flags & BNXT_FLAG_CHIP_P5) {
		438	spin_lock_bh(&ptp->ptp_lock);
		439	ptp->current_time = bnxt_refclk_read(bp, NULL);
		440	WRITE_ONCE(ptp->old_time, ptp->current_time);
		441	spin_unlock_bh(&ptp->ptp_lock);
		442	ptp_schedule_worker(ptp->ptp_clock, 0);
		443	}
454	return 0;	444	return 0;
455	}	445	}
456		446

drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.h+0−1

@@ -75,7 +75,6 @@ int bnxt_hwtstamp_set(struct net_device dev, struct ifreq ifr); · 74 unmodified lines
75	int bnxt_hwtstamp_get(struct net_device dev, struct ifreq ifr);	75	int bnxt_hwtstamp_get(struct net_device dev, struct ifreq ifr);
76	int bnxt_get_tx_ts_p5(struct bnxt bp, struct sk_buff skb);	76	int bnxt_get_tx_ts_p5(struct bnxt bp, struct sk_buff skb);
77	int bnxt_get_rx_ts_p5(struct bnxt bp, u64 ts, u32 pkt_ts);	77	int bnxt_get_rx_ts_p5(struct bnxt bp, u64 ts, u32 pkt_ts);
78	void bnxt_ptp_start(struct bnxt *bp);
79	int bnxt_ptp_init(struct bnxt *bp);	78	int bnxt_ptp_init(struct bnxt *bp);
80	void bnxt_ptp_clear(struct bnxt *bp);	79	void bnxt_ptp_clear(struct bnxt *bp);
81	#endif	80	#endif

drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.c+5−4

 		if (!edev)
 			return ERR_PTR(-ENOMEM);
 		edev->en_ops = &bnxt_en_ops_tbl;
-		if (bp->flags & BNXT_FLAG_ROCEV1_CAP)
-			edev->flags |= BNXT_EN_FLAG_ROCEV1_CAP;
-		if (bp->flags & BNXT_FLAG_ROCEV2_CAP)
-			edev->flags |= BNXT_EN_FLAG_ROCEV2_CAP;
 		edev->net = dev;
 		edev->pdev = bp->pdev;
 		edev->l2_db_size = bp->db_size;
 		edev->l2_db_size_nc = bp->db_size;
 		bp->edev = edev;
 	}
+	edev->flags &= ~BNXT_EN_FLAG_ROCE_CAP;
+	if (bp->flags & BNXT_FLAG_ROCEV1_CAP)
+		edev->flags |= BNXT_EN_FLAG_ROCEV1_CAP;
+	if (bp->flags & BNXT_FLAG_ROCEV2_CAP)
+		edev->flags |= BNXT_EN_FLAG_ROCEV2_CAP;
 	return bp->edev;
 }
 EXPORT_SYMBOL(bnxt_ulp_probe);

drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c+1−1

@@ -420,7 +420,7 @@ static int cn23xx_pf_setup_global_input_regs(struct octeon_device *oct) · 419 unmodified lines
420	* bits 32:47 indicate the PVF num.	420	* bits 32:47 indicate the PVF num.
421	*/	421	*/
422	for (q_no = 0; q_no < ern; q_no++) {	422	for (q_no = 0; q_no < ern; q_no++) {
423	reg_val = oct->pcie_port << CN23XX_PKT_INPUT_CTL_MAC_NUM_POS;	423	reg_val = (u64)oct->pcie_port << CN23XX_PKT_INPUT_CTL_MAC_NUM_POS;
424		424
425	/* for VF assigned queues. */	425	/* for VF assigned queues. */
426	if (q_no < oct->sriov_info.pf_srn) {	426	if (q_no < oct->sriov_info.pf_srn) {

drivers/net/ethernet/freescale/dpaa2/dpaa2-switch.c+8−8

 	if (err)
 		return err;
-	err = dpaa2_switch_seed_bp(ethsw);
-	if (err)
-		goto err_free_dpbp;
 	err = dpaa2_switch_alloc_rings(ethsw);
 	if (err)
-		goto err_drain_dpbp;
+		goto err_free_dpbp;
 	err = dpaa2_switch_setup_dpio(ethsw);
 	if (err)
 		goto err_destroy_rings;
+	err = dpaa2_switch_seed_bp(ethsw);
+	if (err)
+		goto err_deregister_dpio;
 	err = dpsw_ctrl_if_enable(ethsw->mc_io, 0, ethsw->dpsw_handle);
 	if (err) {
 		dev_err(ethsw->dev, "dpsw_ctrl_if_enable err %d\n", err);
-		goto err_deregister_dpio;
+		goto err_drain_dpbp;
 	}
 	return 0;
+err_drain_dpbp:
+	dpaa2_switch_drain_bp(ethsw);
 err_deregister_dpio:
 	dpaa2_switch_free_dpio(ethsw);
 err_destroy_rings:
 	dpaa2_switch_destroy_rings(ethsw);
-err_drain_dpbp:
-	dpaa2_switch_drain_bp(ethsw);
 err_free_dpbp:
 	dpaa2_switch_free_dpbp(ethsw);

drivers/net/ethernet/freescale/fman/mac.c+1−0

@@ -524,6 +524,7 @@ static void setup_memac(struct mac_device *mac_dev) · 523 unmodified lines
524	\| SUPPORTED_Autoneg \	524	\| SUPPORTED_Autoneg \
525	\| SUPPORTED_Pause \	525	\| SUPPORTED_Pause \
526	\| SUPPORTED_Asym_Pause \	526	\| SUPPORTED_Asym_Pause \
		527	\| SUPPORTED_FIBRE \
527	\| SUPPORTED_MII)	528	\| SUPPORTED_MII)
528		529
529	static DEFINE_MUTEX(eth_lock);	530	static DEFINE_MUTEX(eth_lock);

drivers/net/ethernet/hisilicon/hip04_eth.c+3−3

drivers/net/ethernet/hisilicon/hns3/hclge_mbx.h+5−2

 	u32 origin_mbx_msg;
 	bool received_resp;
 	int resp_status;
+	u16 match_id;
 	u8 additional_info[HCLGE_MBX_MAX_RESP_DATA_SIZE];
 };
 	u8 mbx_need_resp;
 	u8 rsv1[1];
 	u8 msg_len;
-	u8 rsv2[3];
+	u8 rsv2;
+	u16 match_id;
 	struct hclge_vf_to_pf_msg msg;
 };
 	u8 dest_vfid;
 	u8 rsv[3];
 	u8 msg_len;
-	u8 rsv1[3];
+	u8 rsv1;
+	u16 match_id;
 	struct hclge_pf_to_vf_msg msg;
 };

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c+6−2

 	if (ret)
 		return ret;
-	if (test_bit(HNAE3_DEV_SUPPORT_PORT_VLAN_BYPASS_B, ae_dev->caps))
+	if (test_bit(HNAE3_DEV_SUPPORT_PORT_VLAN_BYPASS_B, ae_dev->caps)) {
 		ret = hclge_set_port_vlan_filter_bypass(hdev, vport->vport_id,
 							!enable);
-	else if (!vport->vport_id)
+	} else if (!vport->vport_id) {
+		if (test_bit(HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B, ae_dev->caps))
+			enable = false;
 		ret = hclge_set_vlan_filter_ctrl(hdev, HCLGE_FILTER_TYPE_PORT,
 						 HCLGE_FILTER_FE_INGRESS,
 						 enable, 0);
+	}
 	return ret;
 }

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c+1−0

@@ -47,6 +47,7 @@ static int hclge_gen_resp_to_vf(struct hclge_vport *vport, · 46 unmodified lines
47		47
48	resp_pf_to_vf->dest_vfid = vf_to_pf_req->mbx_src_vfid;	48	resp_pf_to_vf->dest_vfid = vf_to_pf_req->mbx_src_vfid;
49	resp_pf_to_vf->msg_len = vf_to_pf_req->msg_len;	49	resp_pf_to_vf->msg_len = vf_to_pf_req->msg_len;
		50	resp_pf_to_vf->match_id = vf_to_pf_req->match_id;
50		51
51	resp_pf_to_vf->msg.code = HCLGE_MBX_PF_VF_RESP;	52	resp_pf_to_vf->msg.code = HCLGE_MBX_PF_VF_RESP;
52	resp_pf_to_vf->msg.vf_mbx_msg_code = vf_to_pf_req->msg.code;	53	resp_pf_to_vf->msg.vf_mbx_msg_code = vf_to_pf_req->msg.code;

drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c+10−0

@@ -2641,6 +2641,16 @@ static int hclgevf_rss_init_hw(struct hclgevf_dev *hdev) · 2640 unmodified lines
2641		2641
2642	static int hclgevf_init_vlan_config(struct hclgevf_dev *hdev)	2642	static int hclgevf_init_vlan_config(struct hclgevf_dev *hdev)
2643	{	2643	{
		2644	struct hnae3_handle *nic = &hdev->nic;
		2645	int ret;
		2646
		2647	ret = hclgevf_en_hw_strip_rxvtag(nic, true);
		2648	if (ret) {
		2649	dev_err(&hdev->pdev->dev,
		2650	"failed to enable rx vlan offload, ret = %d\n", ret);
		2651	return ret;
		2652	}
		2653
2644	return hclgevf_set_vlan_filter(&hdev->nic, htons(ETH_P_8021Q), 0,	2654	return hclgevf_set_vlan_filter(&hdev->nic, htons(ETH_P_8021Q), 0,
2645	false);	2655	false);
2646	}	2656	}

drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_mbx.c+19−0

 	return resp_code ? -resp_code : 0;
 }
+#define HCLGEVF_MBX_MATCH_ID_START	1
 static void hclgevf_reset_mbx_resp_status(struct hclgevf_dev *hdev)
 {
 	/* this function should be called with mbx_resp.mbx_mutex held
 	hdev->mbx_resp.received_resp  = false;
 	hdev->mbx_resp.origin_mbx_msg = 0;
 	hdev->mbx_resp.resp_status    = 0;
+	hdev->mbx_resp.match_id++;
+	/* Update match_id and ensure the value of match_id is not zero */
+	if (hdev->mbx_resp.match_id == 0)
+		hdev->mbx_resp.match_id = HCLGEVF_MBX_MATCH_ID_START;
 	memset(hdev->mbx_resp.additional_info, 0, HCLGE_MBX_MAX_RESP_DATA_SIZE);
 }
 	if (need_resp) {
 		mutex_lock(&hdev->mbx_resp.mbx_mutex);
 		hclgevf_reset_mbx_resp_status(hdev);
+		req->match_id = hdev->mbx_resp.match_id;
 		status = hclgevf_cmd_send(&hdev->hw, &desc, 1);
 		if (status) {
 			dev_err(&hdev->pdev->dev,
 				resp->additional_info[i] = *temp;
 				temp++;
 			}
+			/* If match_id is not zero, it means PF support
+			 * match_id. If the match_id is right, VF get the
+			 * right response, otherwise ignore the response.
+			 * Driver will clear hdev->mbx_resp when send
+			 * next message which need response.
+			 */
+			if (req->match_id) {
+				if (req->match_id == resp->match_id)
+					resp->received_resp = true;
+			} else {
+				resp->received_resp = true;
+			}
 			break;
 		case HCLGE_MBX_LINK_STAT_CHANGE:
 		case HCLGE_MBX_ASSERTING_RESET:

drivers/net/ethernet/ibm/ibmvnic.c+1−1

 		tx_send_failed++;
 		tx_dropped++;
 		ret = NETDEV_TX_OK;
-		ibmvnic_tx_scrq_flush(adapter, tx_scrq);
 		goto out;
 	}
 		dev_kfree_skb_any(skb);
 		tx_send_failed++;
 		tx_dropped++;
+		ibmvnic_tx_scrq_flush(adapter, tx_scrq);
 		ret = NETDEV_TX_OK;
 		goto out;
 	}

drivers/net/ethernet/intel/ixgbe/ixgbe_main.c+2−1

@@ -1825,7 +1825,8 @@ static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring, · 1824 unmodified lines
1825	struct sk_buff *skb)	1825	struct sk_buff *skb)
1826	{	1826	{
1827	if (ring_uses_build_skb(rx_ring)) {	1827	if (ring_uses_build_skb(rx_ring)) {
1828	unsigned long offset = (unsigned long)(skb->data) & ~PAGE_MASK;	1828	unsigned long mask = (unsigned long)ixgbe_rx_pg_size(rx_ring) - 1;
		1829	unsigned long offset = (unsigned long)(skb->data) & mask;
1829		1830
1830	dma_sync_single_range_for_cpu(rx_ring->dev,	1831	dma_sync_single_range_for_cpu(rx_ring->dev,
1831	IXGBE_CB(skb)->dma,	1832	IXGBE_CB(skb)->dma,

drivers/net/ethernet/marvell/octeontx2/af/Makefile+1−1

@@ -10,4 +10,4 @@ obj-$(CONFIG_OCTEONTX2_AF) += rvu_af.o · 9 unmodified lines
10	rvu_mbox-y := mbox.o rvu_trace.o	10	rvu_mbox-y := mbox.o rvu_trace.o
11	rvu_af-y := cgx.o rvu.o rvu_cgx.o rvu_npa.o rvu_nix.o \	11	rvu_af-y := cgx.o rvu.o rvu_cgx.o rvu_npa.o rvu_nix.o \
12	rvu_reg.o rvu_npc.o rvu_debugfs.o ptp.o rvu_npc_fs.o \	12	rvu_reg.o rvu_npc.o rvu_debugfs.o ptp.o rvu_npc_fs.o \
13	rvu_cpt.o rvu_devlink.o rpm.o rvu_cn10k.o	13	rvu_cpt.o rvu_devlink.o rpm.o rvu_cn10k.o rvu_switch.o

drivers/net/ethernet/marvell/octeontx2/af/rvu.c+9−1

 	return rvu_detach_rsrcs(rvu, detach, detach->hdr.pcifunc);
 }
-static int rvu_get_nix_blkaddr(struct rvu *rvu, u16 pcifunc)
+int rvu_get_nix_blkaddr(struct rvu *rvu, u16 pcifunc)
 {
 	struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);
 	int blkaddr = BLKADDR_NIX0, vf;
 	if (!vfs)
 		return 0;
+	/* LBK channel number 63 is used for switching packets between
+	 * CGX mapped VFs. Hence limit LBK pairs till 62 only.
+	 */
+	if (vfs > 62)
+		vfs = 62;
 	/* Save VFs number for reference in VF interrupts handlers.
 	 * Since interrupts might start arriving during SRIOV enablement
 	 * ordinary API cannot be used to get number of enabled VFs.
 	/* Initialize debugfs */
 	rvu_dbg_init(rvu);
+	mutex_init(&rvu->rswitch.switch_lock);
 	return 0;
 err_dl:
 	rvu_unregister_dl(rvu);

drivers/net/ethernet/marvell/octeontx2/af/rvu.h+21−0

 	size_t				kpus;
 };
+#define RVU_SWITCH_LBK_CHAN	63
+struct rvu_switch {
+	struct mutex switch_lock; /* Serialize flow installation */
+	u32 used_entries;
+	u16 *entry2pcifunc;
+	u16 mode;
+	u16 start_entry;
+};
 struct rvu {
 	void __iomem		*afreg_base;
 	void __iomem		*pfreg_base;
 	/* CGX */
 #define PF_CGXMAP_BASE		1 /* PF 0 is reserved for RVU PF */
+	u16			cgx_mapped_vfs; /* maximum CGX mapped VFs */
 	u8			cgx_mapped_pfs;
 	u8			cgx_cnt_max;	 /* CGX port count max */
 	u8			*pf2cgxlmac_map; /* pf to cgx_lmac map */
 	struct rvu_debugfs	rvu_dbg;
 #endif
 	struct rvu_devlink	*rvu_dl;
+	/* RVU switch implementation over NPC with DMAC rules */
+	struct rvu_switch	rswitch;
 };
 static inline void rvu_write64(struct rvu *rvu, u64 block, u64 offset, u64 val)
 			struct nix_cn10k_aq_enq_req *aq_req,
 			struct nix_cn10k_aq_enq_rsp *aq_rsp,
 			u16 pcifunc, u8 ctype, u32 qidx);
+int rvu_get_nix_blkaddr(struct rvu *rvu, u16 pcifunc);
 /* NPC APIs */
 int rvu_npc_init(struct rvu *rvu);
 static inline void rvu_dbg_init(struct rvu *rvu) {}
 static inline void rvu_dbg_exit(struct rvu *rvu) {}
 #endif
+/* RVU Switch */
+void rvu_switch_enable(struct rvu *rvu);
+void rvu_switch_disable(struct rvu *rvu);
+void rvu_switch_update_rules(struct rvu *rvu, u16 pcifunc);
 #endif /* RVU_H */

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c+3−0

 	unsigned long lmac_bmap;
 	int size, free_pkind;
 	int cgx, lmac, iter;
+	int numvfs, hwvfs;
 	if (!cgx_cnt_max)
 		return 0;
 			pkind->pfchan_map[free_pkind] = ((pf) & 0x3F) << 16;
 			rvu_map_cgx_nix_block(rvu, pf, cgx, lmac);
 			rvu->cgx_mapped_pfs++;
+			rvu_get_pf_numvfs(rvu, pf, &numvfs, &hwvfs);
+			rvu->cgx_mapped_vfs += numvfs;
 			pf++;
 		}
 	}

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c+1−4

 	int entry_acnt, entry_ecnt;
 	int cntr_acnt, cntr_ecnt;
-	/* Skip PF0 */
-	if (!pcifunc)
-		return;
 	rvu_npc_get_mcam_entry_alloc_info(rvu, pcifunc, blkaddr,
 					  &entry_acnt, &entry_ecnt);
 	rvu_npc_get_mcam_counter_alloc_info(rvu, pcifunc, blkaddr,
 static void rvu_dbg_npc_mcam_show_action(struct seq_file *s,
 					 struct rvu_npc_mcam_rule *rule)
 {
-	if (rule->intf == NIX_INTF_TX) {
+	if (is_npc_intf_tx(rule->intf)) {
 		switch (rule->tx_action.op) {
 		case NIX_TX_ACTIONOP_DROP:
 			seq_puts(s, "\taction: Drop\n");

drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c+41−7

 	rvu_nix_health_reporters_destroy(rvu_dl);
 }
+static int rvu_devlink_eswitch_mode_get(struct devlink *devlink, u16 *mode)
+{
+	struct rvu_devlink *rvu_dl = devlink_priv(devlink);
+	struct rvu *rvu = rvu_dl->rvu;
+	struct rvu_switch *rswitch;
+	rswitch = &rvu->rswitch;
+	*mode = rswitch->mode;
+	return 0;
+}
+static int rvu_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode,
+					struct netlink_ext_ack *extack)
+{
+	struct rvu_devlink *rvu_dl = devlink_priv(devlink);
+	struct rvu *rvu = rvu_dl->rvu;
+	struct rvu_switch *rswitch;
+	rswitch = &rvu->rswitch;
+	switch (mode) {
+	case DEVLINK_ESWITCH_MODE_LEGACY:
+	case DEVLINK_ESWITCH_MODE_SWITCHDEV:
+		if (rswitch->mode == mode)
+			return 0;
+		rswitch->mode = mode;
+		if (mode == DEVLINK_ESWITCH_MODE_SWITCHDEV)
+			rvu_switch_enable(rvu);
+		else
+			rvu_switch_disable(rvu);
+		break;
+	default:
+		return -EINVAL;
+	}
+	return 0;
+}
 static int rvu_devlink_info_get(struct devlink *devlink, struct devlink_info_req *req,
 				struct netlink_ext_ack *extack)
 {
 static const struct devlink_ops rvu_devlink_ops = {
 	.info_get = rvu_devlink_info_get,
+	.eswitch_mode_get = rvu_devlink_eswitch_mode_get,
+	.eswitch_mode_set = rvu_devlink_eswitch_mode_set,
 };
 int rvu_register_dl(struct rvu *rvu)
 	struct devlink *dl;
 	int err;
-	rvu_dl = kzalloc(sizeof(*rvu_dl), GFP_KERNEL);
-	if (!rvu_dl)
-		return -ENOMEM;
 	dl = devlink_alloc(&rvu_devlink_ops, sizeof(struct rvu_devlink));
 	if (!dl) {
 		dev_warn(rvu->dev, "devlink_alloc failed\n");
-		kfree(rvu_dl);
 		return -ENOMEM;
 	}
 	if (err) {
 		dev_err(rvu->dev, "devlink register failed with error %d\n", err);
 		devlink_free(dl);
-		kfree(rvu_dl);
 		return err;
 	}
+	rvu_dl = devlink_priv(dl);
 	rvu_dl->dl = dl;
 	rvu_dl->rvu = rvu;
 	rvu->rvu_dl = rvu_dl;
 	rvu_health_reporters_destroy(rvu);
 	devlink_unregister(dl);
 	devlink_free(dl);
-	kfree(rvu_dl);
 }

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c+36−0

@@ -1952,6 +1952,35 @@ static void nix_tl1_default_cfg(struct rvu rvu, struct nix_hw nix_hw, · 1951 unmodified lines
1952	pfvf_map[schq] = TXSCH_SET_FLAG(pfvf_map[schq], NIX_TXSCHQ_CFG_DONE);	1952	pfvf_map[schq] = TXSCH_SET_FLAG(pfvf_map[schq], NIX_TXSCHQ_CFG_DONE);
1953	}	1953	}
1954		1954
		1955	static void rvu_nix_tx_tl2_cfg(struct rvu *rvu, int blkaddr,
		1956	u16 pcifunc, struct nix_txsch *txsch)
		1957	{
		1958	struct rvu_hwinfo *hw = rvu->hw;
		1959	int lbk_link_start, lbk_links;
		1960	u8 pf = rvu_get_pf(pcifunc);
		1961	int schq;
		1962
		1963	if (!is_pf_cgxmapped(rvu, pf))
		1964	return;
		1965
		1966	lbk_link_start = hw->cgx_links;
		1967
		1968	for (schq = 0; schq < txsch->schq.max; schq++) {
		1969	if (TXSCH_MAP_FUNC(txsch->pfvf_map[schq]) != pcifunc)
		1970	continue;
		1971	/* Enable all LBK links with channel 63 by default so that
		1972	* packets can be sent to LBK with a NPC TX MCAM rule
		1973	*/
		1974	lbk_links = hw->lbk_links;
		1975	while (lbk_links--)
		1976	rvu_write64(rvu, blkaddr,
		1977	NIX_AF_TL3_TL2X_LINKX_CFG(schq,
		1978	lbk_link_start +
		1979	lbk_links),
		1980	BIT_ULL(12) \| RVU_SWITCH_LBK_CHAN);
		1981	}
		1982	}
		1983
1955	int rvu_mbox_handler_nix_txschq_cfg(struct rvu *rvu,	1984	int rvu_mbox_handler_nix_txschq_cfg(struct rvu *rvu,
1956	struct nix_txschq_config *req,	1985	struct nix_txschq_config *req,
1957	struct msg_rsp *rsp)	1986	struct msg_rsp *rsp)
@@ -2040,6 +2069,9 @@ int rvu_mbox_handler_nix_txschq_cfg(struct rvu *rvu, · 82 unmodified lines
2040	rvu_write64(rvu, blkaddr, reg, regval);	2069	rvu_write64(rvu, blkaddr, reg, regval);
2041	}	2070	}
2042		2071
		2072	rvu_nix_tx_tl2_cfg(rvu, blkaddr, pcifunc,
		2073	&nix_hw->txsch[NIX_TXSCH_LVL_TL2]);
		2074
2043	return 0;	2075	return 0;
2044	}	2076	}
2045		2077
@@ -3180,6 +3212,8 @@ int rvu_mbox_handler_nix_set_mac_addr(struct rvu *rvu, · 1134 unmodified lines
3180	if (test_bit(PF_SET_VF_TRUSTED, &pfvf->flags) && from_vf)	3212	if (test_bit(PF_SET_VF_TRUSTED, &pfvf->flags) && from_vf)
3181	ether_addr_copy(pfvf->default_mac, req->mac_addr);	3213	ether_addr_copy(pfvf->default_mac, req->mac_addr);
3182		3214
		3215	rvu_switch_update_rules(rvu, pcifunc);
		3216
3183	return 0;	3217	return 0;
3184	}	3218	}
3185		3219
@@ -3849,6 +3883,8 @@ int rvu_mbox_handler_nix_lf_start_rx(struct rvu rvu, struct msg_req req, · 663 unmodified lines
3849	pfvf = rvu_get_pfvf(rvu, pcifunc);	3883	pfvf = rvu_get_pfvf(rvu, pcifunc);
3850	set_bit(NIXLF_INITIALIZED, &pfvf->flags);	3884	set_bit(NIXLF_INITIALIZED, &pfvf->flags);
3851		3885
		3886	rvu_switch_update_rules(rvu, pcifunc);
		3887
3852	return rvu_cgx_start_stop_io(rvu, pcifunc, true);	3888	return rvu_cgx_start_stop_io(rvu, pcifunc, true);
3853	}	3889	}
3854		3890

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c+36−11

 	owner = mcam->entry2pfvf_map[index];
 	target_func = (entry->action >> 4) & 0xffff;
 	/* do nothing when target is LBK/PF or owner is not PF */
-	if (is_afvf(target_func) || (owner & RVU_PFVF_FUNC_MASK) ||
+	if (is_pffunc_af(owner) || is_afvf(target_func) ||
+	    (owner & RVU_PFVF_FUNC_MASK) ||
 	    !(target_func & RVU_PFVF_FUNC_MASK))
 		return;
 {
 	int bank = npc_get_bank(mcam, index);
 	int kw = 0, actbank, actindex;
+	u8 tx_intf_mask = ~intf & 0x3;
+	u8 tx_intf = intf;
 	u64 cam0, cam1;
 	actbank = bank; /* Save bank id, to set action later on */
 	 */
 	for (; bank < (actbank + mcam->banks_per_entry); bank++, kw = kw + 2) {
 		/* Interface should be set in all banks */
+		if (is_npc_intf_tx(intf)) {
+			/* Last bit must be set and rest don't care
+			 * for TX interfaces
+			 */
+			tx_intf_mask = 0x1;
+			tx_intf = intf & tx_intf_mask;
+			tx_intf_mask = ~tx_intf & tx_intf_mask;
+		}
 		rvu_write64(rvu, blkaddr,
 			    NPC_AF_MCAMEX_BANKX_CAMX_INTF(index, bank, 1),
-			    intf);
+			    tx_intf);
 		rvu_write64(rvu, blkaddr,
 			    NPC_AF_MCAMEX_BANKX_CAMX_INTF(index, bank, 0),
-			    ~intf & 0x3);
+			    tx_intf_mask);
 		/* Set the match key */
 		npc_get_keyword(entry, kw, &cam0, &cam1);
 	eth_broadcast_addr((u8 *)&req.mask.dmac);
 	req.features = BIT_ULL(NPC_DMAC);
 	req.channel = chan;
+	req.chan_mask = 0xFFFU;
 	req.intf = pfvf->nix_rx_intf;
 	req.op = action.op;
 	req.hdr.pcifunc = 0; /* AF is requester */
 	eth_broadcast_addr((u8 *)&req.mask.dmac);
 	req.features = BIT_ULL(NPC_DMAC);
 	req.channel = chan;
+	req.chan_mask = 0xFFFU;
 	req.intf = pfvf->nix_rx_intf;
 	req.entry = index;
 	req.hdr.pcifunc = 0; /* AF is requester */
 	int nixlf_count = rvu_get_nixlf_count(rvu);
 	struct npc_mcam *mcam = &rvu->hw->mcam;
 	int rsvd, err;
+	u16 index;
+	int cntr;
 	u64 cfg;
 	/* Actual number of MCAM entries vary by entry size */
 	if (!mcam->entry2target_pffunc)
 		goto free_mem;
+	for (index = 0; index < mcam->bmap_entries; index++) {
+		mcam->entry2pfvf_map[index] = NPC_MCAM_INVALID_MAP;
+		mcam->entry2cntr_map[index] = NPC_MCAM_INVALID_MAP;
+	}
+	for (cntr = 0; cntr < mcam->counters.max; cntr++)
+		mcam->cntr2pfvf_map[cntr] = NPC_MCAM_INVALID_MAP;
 	mutex_init(&mcam->lock);
 	return 0;
 	}
 	/* Alloc request from PFFUNC with no NIXLF attached should be denied */
-	if (!is_nixlf_attached(rvu, pcifunc))
+	if (!is_pffunc_af(pcifunc) && !is_nixlf_attached(rvu, pcifunc))
 		return NPC_MCAM_ALLOC_DENIED;
 	return npc_mcam_alloc_entries(mcam, pcifunc, req, rsp);
 		return NPC_MCAM_INVALID_REQ;
 	/* Free request from PFFUNC with no NIXLF attached, ignore */
-	if (!is_nixlf_attached(rvu, pcifunc))
+	if (!is_pffunc_af(pcifunc) && !is_nixlf_attached(rvu, pcifunc))
 		return NPC_MCAM_INVALID_REQ;
 	mutex_lock(&mcam->lock);
 	if (rc)
 		goto exit;
-	mcam->entry2pfvf_map[req->entry] = 0;
+	mcam->entry2pfvf_map[req->entry] = NPC_MCAM_INVALID_MAP;
 	mcam->entry2target_pffunc[req->entry] = 0x0;
 	npc_mcam_clear_bit(mcam, req->entry);
 	npc_enable_mcam_entry(rvu, mcam, blkaddr, req->entry, false);
 	else
 		nix_intf = pfvf->nix_rx_intf;
-	if (npc_mcam_verify_channel(rvu, pcifunc, req->intf, channel)) {
+	if (!is_pffunc_af(pcifunc) &&
+	    npc_mcam_verify_channel(rvu, pcifunc, req->intf, channel)) {
 		rc = NPC_MCAM_INVALID_REQ;
 		goto exit;
 	}
-	if (npc_mcam_verify_pf_func(rvu, &req->entry_data, req->intf,
+	if (!is_pffunc_af(pcifunc) &&
-				    pcifunc)) {
+	    npc_mcam_verify_pf_func(rvu, &req->entry_data, req->intf, pcifunc)) {
 		rc = NPC_MCAM_INVALID_REQ;
 		goto exit;
 	}
 		return NPC_MCAM_INVALID_REQ;
 	/* If the request is from a PFFUNC with no NIXLF attached, ignore */
-	if (!is_nixlf_attached(rvu, pcifunc))
+	if (!is_pffunc_af(pcifunc) && !is_nixlf_attached(rvu, pcifunc))
 		return NPC_MCAM_INVALID_REQ;
 	/* Since list of allocated counter IDs needs to be sent to requester,
 	if (rc) {
 		/* Free allocated MCAM entry */
 		mutex_lock(&mcam->lock);
-		mcam->entry2pfvf_map[entry] = 0;
+		mcam->entry2pfvf_map[entry] = NPC_MCAM_INVALID_MAP;
 		npc_mcam_clear_bit(mcam, entry);
 		mutex_unlock(&mcam->lock);
 		return rc;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c+21−8

@@ -910,14 +910,17 @@ static void rvu_mcam_add_counter_to_rule(struct rvu *rvu, u16 pcifunc, · 909 unmodified lines
910		910
911	static void npc_update_rx_entry(struct rvu rvu, struct rvu_pfvf pfvf,	911	static void npc_update_rx_entry(struct rvu rvu, struct rvu_pfvf pfvf,
912	struct mcam_entry *entry,	912	struct mcam_entry *entry,
913	struct npc_install_flow_req *req, u16 target)	913	struct npc_install_flow_req *req,
		914	u16 target, bool pf_set_vfs_mac)
914	{	915	{
		916	struct rvu_switch *rswitch = &rvu->rswitch;
915	struct nix_rx_action action;	917	struct nix_rx_action action;
916	u64 chan_mask;
917		918
918	chan_mask = req->chan_mask ? req->chan_mask : ~0ULL;	919	if (rswitch->mode == DEVLINK_ESWITCH_MODE_SWITCHDEV && pf_set_vfs_mac)
919	npc_update_entry(rvu, NPC_CHAN, entry, req->channel, 0, chan_mask, 0,	920	req->chan_mask = 0x0; /* Do not care channel */
920	NIX_INTF_RX);	921
		922	npc_update_entry(rvu, NPC_CHAN, entry, req->channel, 0, req->chan_mask,
		923	0, NIX_INTF_RX);
921		924
922	(u64 )&action = 0x00;	925	(u64 )&action = 0x00;
923	action.pf_func = target;	926	action.pf_func = target;
@@ -949,9 +952,16 @@ static void npc_update_tx_entry(struct rvu rvu, struct rvu_pfvf pfvf, · 25 unmodified lines
949	struct npc_install_flow_req *req, u16 target)	952	struct npc_install_flow_req *req, u16 target)
950	{	953	{
951	struct nix_tx_action action;	954	struct nix_tx_action action;
		955	u64 mask = ~0ULL;
		956
		957	/* If AF is installing then do not care about
		958	* PF_FUNC in Send Descriptor
		959	*/
		960	if (is_pffunc_af(req->hdr.pcifunc))
		961	mask = 0;
952		962
953	npc_update_entry(rvu, NPC_PF_FUNC, entry, (__force u16)htons(target),	963	npc_update_entry(rvu, NPC_PF_FUNC, entry, (__force u16)htons(target),
954	0, ~0ULL, 0, NIX_INTF_TX);	964	0, mask, 0, NIX_INTF_TX);
955		965
956	(u64 )&action = 0x00;	966	(u64 )&action = 0x00;
957	action.op = req->op;	967	action.op = req->op;
@@ -1002,7 +1012,7 @@ static int npc_install_flow(struct rvu *rvu, int blkaddr, u16 target, · 44 unmodified lines
1002	req->intf);	1012	req->intf);
1003		1013
1004	if (is_npc_intf_rx(req->intf))	1014	if (is_npc_intf_rx(req->intf))
1005	npc_update_rx_entry(rvu, pfvf, entry, req, target);	1015	npc_update_rx_entry(rvu, pfvf, entry, req, target, pf_set_vfs_mac);
1006	else	1016	else
1007	npc_update_tx_entry(rvu, pfvf, entry, req, target);	1017	npc_update_tx_entry(rvu, pfvf, entry, req, target);
1008		1018
@@ -1164,7 +1174,9 @@ int rvu_mbox_handler_npc_install_flow(struct rvu *rvu, · 155 unmodified lines
1164	if (err)	1174	if (err)
1165	return err;	1175	return err;
1166		1176
1167	if (npc_mcam_verify_channel(rvu, target, req->intf, req->channel))	1177	/* Skip channel validation if AF is installing */
		1178	if (!is_pffunc_af(req->hdr.pcifunc) &&
		1179	npc_mcam_verify_channel(rvu, target, req->intf, req->channel))
1168	return -EINVAL;	1180	return -EINVAL;
1169		1181
1170	pfvf = rvu_get_pfvf(rvu, target);	1182	pfvf = rvu_get_pfvf(rvu, target);
@@ -1180,6 +1192,7 @@ int rvu_mbox_handler_npc_install_flow(struct rvu *rvu, · 9 unmodified lines
1180	eth_broadcast_addr((u8 *)&req->mask.dmac);	1192	eth_broadcast_addr((u8 *)&req->mask.dmac);
1181	}	1193	}
1182		1194
		1195	/* Proceed if NIXLF is attached or not for TX rules */
1183	err = nix_get_nixlf(rvu, target, &nixlf, NULL);	1196	err = nix_get_nixlf(rvu, target, &nixlf, NULL);
1184	if (err && is_npc_intf_rx(req->intf) && !pf_set_vfs_mac)	1197	if (err && is_npc_intf_rx(req->intf) && !pf_set_vfs_mac)
1185	return -EINVAL;	1198	return -EINVAL;

drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c+258−0

@@ -0,0 +1,258 @@
	1	// SPDX-License-Identifier: GPL-2.0
	2	/* Marvell OcteonTx2 RVU Admin Function driver
	3	*
	4	* Copyright (C) 2021 Marvell.
	5	*/
	6
	7	#include <linux/bitfield.h>
	8	#include "rvu.h"
	9
	10	static int rvu_switch_install_rx_rule(struct rvu *rvu, u16 pcifunc,
	11	u16 chan_mask)
	12	{
	13	struct npc_install_flow_req req = { 0 };
	14	struct npc_install_flow_rsp rsp = { 0 };
	15	struct rvu_pfvf *pfvf;
	16
	17	pfvf = rvu_get_pfvf(rvu, pcifunc);
	18	/* If the pcifunc is not initialized then nothing to do.
	19	* This same function will be called again via rvu_switch_update_rules
	20	* after pcifunc is initialized.
	21	*/
	22	if (!test_bit(NIXLF_INITIALIZED, &pfvf->flags))
	23	return 0;
	24
	25	ether_addr_copy(req.packet.dmac, pfvf->mac_addr);
	26	eth_broadcast_addr((u8 *)&req.mask.dmac);
	27	req.hdr.pcifunc = 0; /* AF is requester */
	28	req.vf = pcifunc;
	29	req.features = BIT_ULL(NPC_DMAC);
	30	req.channel = pfvf->rx_chan_base;
	31	req.chan_mask = chan_mask;
	32	req.intf = pfvf->nix_rx_intf;
	33	req.op = NIX_RX_ACTION_DEFAULT;
	34	req.default_rule = 1;
	35
	36	return rvu_mbox_handler_npc_install_flow(rvu, &req, &rsp);
	37	}
	38
	39	static int rvu_switch_install_tx_rule(struct rvu *rvu, u16 pcifunc, u16 entry)
	40	{
	41	struct npc_install_flow_req req = { 0 };
	42	struct npc_install_flow_rsp rsp = { 0 };
	43	struct rvu_pfvf *pfvf;
	44	u8 lbkid;
	45
	46	pfvf = rvu_get_pfvf(rvu, pcifunc);
	47	/* If the pcifunc is not initialized then nothing to do.
	48	* This same function will be called again via rvu_switch_update_rules
	49	* after pcifunc is initialized.
	50	*/
	51	if (!test_bit(NIXLF_INITIALIZED, &pfvf->flags))
	52	return 0;
	53
	54	lbkid = pfvf->nix_blkaddr == BLKADDR_NIX0 ? 0 : 1;
	55	ether_addr_copy(req.packet.dmac, pfvf->mac_addr);
	56	eth_broadcast_addr((u8 *)&req.mask.dmac);
	57	req.hdr.pcifunc = 0; /* AF is requester */
	58	req.vf = pcifunc;
	59	req.entry = entry;
	60	req.features = BIT_ULL(NPC_DMAC);
	61	req.intf = pfvf->nix_tx_intf;
	62	req.op = NIX_TX_ACTIONOP_UCAST_CHAN;
	63	req.index = (lbkid << 8) \| RVU_SWITCH_LBK_CHAN;
	64	req.set_cntr = 1;
	65
	66	return rvu_mbox_handler_npc_install_flow(rvu, &req, &rsp);
	67	}
	68
	69	static int rvu_switch_install_rules(struct rvu *rvu)
	70	{
	71	struct rvu_switch *rswitch = &rvu->rswitch;
	72	u16 start = rswitch->start_entry;
	73	struct rvu_hwinfo *hw = rvu->hw;
	74	int pf, vf, numvfs, hwvf;
	75	u16 pcifunc, entry = 0;
	76	int err;
	77
	78	for (pf = 1; pf < hw->total_pfs; pf++) {
	79	if (!is_pf_cgxmapped(rvu, pf))
	80	continue;
	81
	82	pcifunc = pf << 10;
	83	/* rvu_get_nix_blkaddr sets up the corresponding NIX block
	84	* address and NIX RX and TX interfaces for a pcifunc.
	85	* Generally it is called during attach call of a pcifunc but it
	86	* is called here since we are pre-installing rules before
	87	* nixlfs are attached
	88	*/
	89	rvu_get_nix_blkaddr(rvu, pcifunc);
	90
	91	/* MCAM RX rule for a PF/VF already exists as default unicast
	92	* rules installed by AF. Hence change the channel in those
	93	* rules to ignore channel so that packets with the required
	94	* DMAC received from LBK(by other PF/VFs in system) or from
	95	* external world (from wire) are accepted.
	96	*/
	97	err = rvu_switch_install_rx_rule(rvu, pcifunc, 0x0);
	98	if (err) {
	99	dev_err(rvu->dev, "RX rule for PF%d failed(%d)\n",
	100	pf, err);
	101	return err;
	102	}
	103
	104	err = rvu_switch_install_tx_rule(rvu, pcifunc, start + entry);
	105	if (err) {
	106	dev_err(rvu->dev, "TX rule for PF%d failed(%d)\n",
	107	pf, err);
	108	return err;
	109	}
	110
	111	rswitch->entry2pcifunc[entry++] = pcifunc;
	112
	113	rvu_get_pf_numvfs(rvu, pf, &numvfs, &hwvf);
	114	for (vf = 0; vf < numvfs; vf++, hwvf++) {
	115	pcifunc = pf << 10 \| ((vf + 1) & 0x3FF);
	116	rvu_get_nix_blkaddr(rvu, pcifunc);
	117
	118	err = rvu_switch_install_rx_rule(rvu, pcifunc, 0x0);
	119	if (err) {
	120	dev_err(rvu->dev,
	121	"RX rule for PF%dVF%d failed(%d)\n",
	122	pf, vf, err);
	123	return err;
	124	}
	125
	126	err = rvu_switch_install_tx_rule(rvu, pcifunc,
	127	start + entry);
	128	if (err) {
	129	dev_err(rvu->dev,
	130	"TX rule for PF%dVF%d failed(%d)\n",
	131	pf, vf, err);
	132	return err;
	133	}
	134
	135	rswitch->entry2pcifunc[entry++] = pcifunc;
	136	}
	137	}
	138
	139	return 0;
	140	}
	141
	142	void rvu_switch_enable(struct rvu *rvu)
	143	{
	144	struct npc_mcam_alloc_entry_req alloc_req = { 0 };
	145	struct npc_mcam_alloc_entry_rsp alloc_rsp = { 0 };
	146	struct npc_delete_flow_req uninstall_req = { 0 };
	147	struct npc_mcam_free_entry_req free_req = { 0 };
	148	struct rvu_switch *rswitch = &rvu->rswitch;
	149	struct msg_rsp rsp;
	150	int ret;
	151
	152	alloc_req.contig = true;
	153	alloc_req.count = rvu->cgx_mapped_pfs + rvu->cgx_mapped_vfs;
	154	ret = rvu_mbox_handler_npc_mcam_alloc_entry(rvu, &alloc_req,
	155	&alloc_rsp);
	156	if (ret) {
	157	dev_err(rvu->dev,
	158	"Unable to allocate MCAM entries\n");
	159	goto exit;
	160	}
	161
	162	if (alloc_rsp.count != alloc_req.count) {
	163	dev_err(rvu->dev,
	164	"Unable to allocate %d MCAM entries, got %d\n",
	165	alloc_req.count, alloc_rsp.count);
	166	goto free_entries;
	167	}
	168
	169	rswitch->entry2pcifunc = kcalloc(alloc_req.count, sizeof(u16),
	170	GFP_KERNEL);
	171	if (!rswitch->entry2pcifunc)
	172	goto free_entries;
	173
	174	rswitch->used_entries = alloc_rsp.count;
	175	rswitch->start_entry = alloc_rsp.entry;
	176
	177	ret = rvu_switch_install_rules(rvu);
	178	if (ret)
	179	goto uninstall_rules;
	180
	181	return;
	182
	183	uninstall_rules:
	184	uninstall_req.start = rswitch->start_entry;
	185	uninstall_req.end = rswitch->start_entry + rswitch->used_entries - 1;
	186	rvu_mbox_handler_npc_delete_flow(rvu, &uninstall_req, &rsp);
	187	kfree(rswitch->entry2pcifunc);
	188	free_entries:
	189	free_req.all = 1;
	190	rvu_mbox_handler_npc_mcam_free_entry(rvu, &free_req, &rsp);
	191	exit:
	192	return;
	193	}
	194
	195	void rvu_switch_disable(struct rvu *rvu)
	196	{
	197	struct npc_delete_flow_req uninstall_req = { 0 };
	198	struct npc_mcam_free_entry_req free_req = { 0 };
	199	struct rvu_switch *rswitch = &rvu->rswitch;
	200	struct rvu_hwinfo *hw = rvu->hw;
	201	int pf, vf, numvfs, hwvf;
	202	struct msg_rsp rsp;
	203	u16 pcifunc;
	204	int err;
	205
	206	if (!rswitch->used_entries)
	207	return;
	208
	209	for (pf = 1; pf < hw->total_pfs; pf++) {
	210	if (!is_pf_cgxmapped(rvu, pf))
	211	continue;
	212
	213	pcifunc = pf << 10;
	214	err = rvu_switch_install_rx_rule(rvu, pcifunc, 0xFFF);
	215	if (err)
	216	dev_err(rvu->dev,
	217	"Reverting RX rule for PF%d failed(%d)\n",
	218	pf, err);
	219
	220	for (vf = 0; vf < numvfs; vf++, hwvf++) {
	221	pcifunc = pf << 10 \| ((vf + 1) & 0x3FF);
	222	err = rvu_switch_install_rx_rule(rvu, pcifunc, 0xFFF);
	223	if (err)
	224	dev_err(rvu->dev,
	225	"Reverting RX rule for PF%dVF%d failed(%d)\n",
	226	pf, vf, err);
	227	}
	228	}
	229
	230	uninstall_req.start = rswitch->start_entry;
	231	uninstall_req.end = rswitch->start_entry + rswitch->used_entries - 1;
	232	free_req.all = 1;
	233	rvu_mbox_handler_npc_delete_flow(rvu, &uninstall_req, &rsp);
	234	rvu_mbox_handler_npc_mcam_free_entry(rvu, &free_req, &rsp);
	235	rswitch->used_entries = 0;
	236	kfree(rswitch->entry2pcifunc);
	237	}
	238
	239	void rvu_switch_update_rules(struct rvu *rvu, u16 pcifunc)
	240	{
	241	struct rvu_switch *rswitch = &rvu->rswitch;
	242	u32 max = rswitch->used_entries;
	243	u16 entry;
	244
	245	if (!rswitch->used_entries)
	246	return;
	247
	248	for (entry = 0; entry < max; entry++) {
	249	if (rswitch->entry2pcifunc[entry] == pcifunc)
	250	break;
	251	}
	252
	253	if (entry >= max)
	254	return;
	255
	256	rvu_switch_install_tx_rule(rvu, pcifunc, rswitch->start_entry + entry);
	257	rvu_switch_install_rx_rule(rvu, pcifunc, 0x0);
	258	}

drivers/net/ethernet/microchip/sparx5/Kconfig+1−0

@@ -3,6 +3,7 @@ config SPARX5_SWITCH · 2 unmodified lines
3	depends on NET_SWITCHDEV	3	depends on NET_SWITCHDEV
4	depends on HAS_IOMEM	4	depends on HAS_IOMEM
5	depends on OF	5	depends on OF
		6	depends on ARCH_SPARX5 \|\| COMPILE_TEST
6	select PHYLINK	7	select PHYLINK
7	select PHY_SPARX5_SERDES	8	select PHY_SPARX5_SERDES
8	select RESET_CONTROLLER	9	select RESET_CONTROLLER

drivers/net/ethernet/netronome/nfp/flower/conntrack.c+1−0

@@ -1769,6 +1769,7 @@ int nfp_fl_ct_del_flow(struct nfp_fl_ct_map_entry *ct_map_ent) · 1768 unmodified lines
1769	nfp_ct_map_params);	1769	nfp_ct_map_params);
1770	nfp_fl_ct_clean_flow_entry(ct_map_ent->ct_entry);	1770	nfp_fl_ct_clean_flow_entry(ct_map_ent->ct_entry);
1771	kfree(ct_map_ent);	1771	kfree(ct_map_ent);
		1772	break;
1772	default:	1773	default:
1773	break;	1774	break;
1774	}	1775	}

drivers/net/ethernet/realtek/r8169_main.c+2−1

@@ -5084,7 +5084,8 @@ static int r8169_mdio_register(struct rtl8169_private *tp) · 5083 unmodified lines
5084	new_bus->priv = tp;	5084	new_bus->priv = tp;
5085	new_bus->parent = &pdev->dev;	5085	new_bus->parent = &pdev->dev;
5086	new_bus->irq[0] = PHY_MAC_INTERRUPT;	5086	new_bus->irq[0] = PHY_MAC_INTERRUPT;
5087	snprintf(new_bus->id, MII_BUS_ID_SIZE, "r8169-%x", pci_dev_id(pdev));	5087	snprintf(new_bus->id, MII_BUS_ID_SIZE, "r8169-%x-%x",
		5088	pci_domain_nr(pdev->bus), pci_dev_id(pdev));
5088		5089
5089	new_bus->read = r8169_mdio_read_reg;	5090	new_bus->read = r8169_mdio_read_reg;
5090	new_bus->write = r8169_mdio_write_reg;	5091	new_bus->write = r8169_mdio_write_reg;

drivers/net/ethernet/renesas/ravb.h+1−1

@@ -864,7 +864,7 @@ enum GECMR_BIT { · 863 unmodified lines
864		864
865	/* The Ethernet AVB descriptor definitions. */	865	/* The Ethernet AVB descriptor definitions. */
866	struct ravb_desc {	866	struct ravb_desc {
867	__le16 ds; /* Descriptor size */	867	__le16 ds; /* Descriptor size */
868	u8 cc; /* Content control MSBs (reserved) */	868	u8 cc; /* Content control MSBs (reserved) */
869	u8 die_dt; /* Descriptor interrupt enable and type */	869	u8 die_dt; /* Descriptor interrupt enable and type */
870	__le32 dptr; /* Descriptor pointer */	870	__le32 dptr; /* Descriptor pointer */

drivers/net/ethernet/renesas/ravb_main.c+1−1

@@ -920,7 +920,7 @@ static int ravb_poll(struct napi_struct *napi, int budget) · 919 unmodified lines
920	if (ravb_rx(ndev, &quota, q))	920	if (ravb_rx(ndev, &quota, q))
921	goto out;	921	goto out;
922		922
923	/* Processing RX Descriptor Ring */	923	/* Processing TX Descriptor Ring */
924	spin_lock_irqsave(&priv->lock, flags);	924	spin_lock_irqsave(&priv->lock, flags);
925	/* Clear TX interrupt */	925	/* Clear TX interrupt */
926	ravb_write(ndev, ~(mask \| TIS_RESERVED), TIS);	926	ravb_write(ndev, ~(mask \| TIS_RESERVED), TIS);

drivers/net/ethernet/xscale/ptp_ixp46x.c+2−0

@@ -14,6 +14,8 @@ · 13 unmodified lines
14	#include <linux/kernel.h>	14	#include <linux/kernel.h>
15	#include <linux/ptp_clock_kernel.h>	15	#include <linux/ptp_clock_kernel.h>
16	#include <linux/soc/ixp4xx/cpu.h>	16	#include <linux/soc/ixp4xx/cpu.h>
		17	#include <linux/module.h>
		18	#include <mach/ixp4xx-regs.h>
17		19
18	#include "ixp46x_ts.h"	20	#include "ixp46x_ts.h"
19		21

drivers/net/usb/r8152.c+20−10

 rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u32 speed, u8 duplex,
 		  u32 advertising);
-static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
+static int __rtl8152_set_mac_address(struct net_device *netdev, void *p,
+				     bool in_resume)
 {
 	struct r8152 *tp = netdev_priv(netdev);
 	struct sockaddr *addr = p;
 	if (!is_valid_ether_addr(addr->sa_data))
 		goto out1;
-	ret = usb_autopm_get_interface(tp->intf);
+	if (!in_resume) {
-	if (ret < 0)
+		ret = usb_autopm_get_interface(tp->intf);
-		goto out1;
+		if (ret < 0)
+			goto out1;
+	}
 	mutex_lock(&tp->control);
 	mutex_unlock(&tp->control);
-	usb_autopm_put_interface(tp->intf);
+	if (!in_resume)
+		usb_autopm_put_interface(tp->intf);
 out1:
 	return ret;
 }
+static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
+{
+	return __rtl8152_set_mac_address(netdev, p, false);
+}
 /* Devices containing proper chips can support a persistent
  * host system provided MAC address.
  * Examples of this are Dell TB15 and Dell WD15 docks
 	return ret;
 }
-static int set_ethernet_addr(struct r8152 *tp)
+static int set_ethernet_addr(struct r8152 *tp, bool in_resume)
 {
 	struct net_device *dev = tp->netdev;
 	struct sockaddr sa;
 	if (tp->version == RTL_VER_01)
 		ether_addr_copy(dev->dev_addr, sa.sa_data);
 	else
-		ret = rtl8152_set_mac_address(dev, &sa);
+		ret = __rtl8152_set_mac_address(dev, &sa, in_resume);
 	return ret;
 }
 		tp->rtl_ops.down(tp);
 		mutex_unlock(&tp->control);
+	}
+	if (!res)
 		usb_autopm_put_interface(tp->intf);
-	}
 	free_all_mem(tp);
 	clear_bit(SELECTIVE_SUSPEND, &tp->flags);
 	tp->rtl_ops.init(tp);
 	queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
-	set_ethernet_addr(tp);
+	set_ethernet_addr(tp, true);
 	return rtl8152_resume(intf);
 }
 	tp->rtl_fw.retry = true;
 #endif
 	queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
-	set_ethernet_addr(tp);
+	set_ethernet_addr(tp, false);
 	usb_set_intfdata(intf, tp);

drivers/net/wireless/mediatek/mt76/mt7921/main.c+1−0

@@ -389,6 +389,7 @@ static int mt7921_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, · 388 unmodified lines
389	case WLAN_CIPHER_SUITE_WEP104:	389	case WLAN_CIPHER_SUITE_WEP104:
390	if (!mvif->wep_sta)	390	if (!mvif->wep_sta)
391	return -EOPNOTSUPP;	391	return -EOPNOTSUPP;
		392	break;
392	case WLAN_CIPHER_SUITE_TKIP:	393	case WLAN_CIPHER_SUITE_TKIP:
393	case WLAN_CIPHER_SUITE_CCMP:	394	case WLAN_CIPHER_SUITE_CCMP:
394	case WLAN_CIPHER_SUITE_CCMP_256:	395	case WLAN_CIPHER_SUITE_CCMP_256:

drivers/nvme/host/pci.c+58−9

 	wmb(); /* ensure the first interrupt sees the initialization */
 }
+/*
+ * Try getting shutdown_lock while setting up IO queues.
+ */
+static int nvme_setup_io_queues_trylock(struct nvme_dev *dev)
+{
+	/*
+	 * Give up if the lock is being held by nvme_dev_disable.
+	 */
+	if (!mutex_trylock(&dev->shutdown_lock))
+		return -ENODEV;
+	/*
+	 * Controller is in wrong state, fail early.
+	 */
+	if (dev->ctrl.state != NVME_CTRL_CONNECTING) {
+		mutex_unlock(&dev->shutdown_lock);
+		return -ENODEV;
+	}
+	return 0;
+}
 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid, bool polled)
 {
 	struct nvme_dev *dev = nvmeq->dev;
 		goto release_cq;
 	nvmeq->cq_vector = vector;
-	nvme_init_queue(nvmeq, qid);
+	result = nvme_setup_io_queues_trylock(dev);
+	if (result)
+		return result;
+	nvme_init_queue(nvmeq, qid);
 	if (!polled) {
 		result = queue_request_irq(nvmeq);
 		if (result < 0)
 	}
 	set_bit(NVMEQ_ENABLED, &nvmeq->flags);
+	mutex_unlock(&dev->shutdown_lock);
 	return result;
 release_sq:
 	dev->online_queues--;
+	mutex_unlock(&dev->shutdown_lock);
 	adapter_delete_sq(dev, qid);
 release_cq:
 	adapter_delete_cq(dev, qid);
 	if (nr_io_queues == 0)
 		return 0;
-	clear_bit(NVMEQ_ENABLED, &adminq->flags);
+	/*
+	 * Free IRQ resources as soon as NVMEQ_ENABLED bit transitions
+	 * from set to unset. If there is a window to it is truely freed,
+	 * pci_free_irq_vectors() jumping into this window will crash.
+	 * And take lock to avoid racing with pci_free_irq_vectors() in
+	 * nvme_dev_disable() path.
+	 */
+	result = nvme_setup_io_queues_trylock(dev);
+	if (result)
+		return result;
+	if (test_and_clear_bit(NVMEQ_ENABLED, &adminq->flags))
+		pci_free_irq(pdev, 0, adminq);
 	if (dev->cmb_use_sqes) {
 		result = nvme_cmb_qdepth(dev, nr_io_queues,
 		result = nvme_remap_bar(dev, size);
 		if (!result)
 			break;
-		if (!--nr_io_queues)
+		if (!--nr_io_queues) {
-			return -ENOMEM;
+			result = -ENOMEM;
+			goto out_unlock;
+		}
 	} while (1);
 	adminq->q_db = dev->dbs;
  retry:
 	/* Deregister the admin queue's interrupt */
-	pci_free_irq(pdev, 0, adminq);
+	if (test_and_clear_bit(NVMEQ_ENABLED, &adminq->flags))
+		pci_free_irq(pdev, 0, adminq);
 	/*
 	 * If we enable msix early due to not intx, disable it again before
 	pci_free_irq_vectors(pdev);
 	result = nvme_setup_irqs(dev, nr_io_queues);
-	if (result <= 0)
+	if (result <= 0) {
-		return -EIO;
+		result = -EIO;
+		goto out_unlock;
+	}
 	dev->num_vecs = result;
 	result = max(result - 1, 1);
 	 */
 	result = queue_request_irq(adminq);
 	if (result)
-		return result;
+		goto out_unlock;
 	set_bit(NVMEQ_ENABLED, &adminq->flags);
+	mutex_unlock(&dev->shutdown_lock);
 	result = nvme_create_io_queues(dev);
 	if (result || dev->online_queues < 2)
 	if (dev->online_queues - 1 < dev->max_qid) {
 		nr_io_queues = dev->online_queues - 1;
 		nvme_disable_io_queues(dev);
+		result = nvme_setup_io_queues_trylock(dev);
+		if (result)
+			return result;
 		nvme_suspend_io_queues(dev);
 		goto retry;
 	}
 					dev->io_queues[HCTX_TYPE_READ],
 					dev->io_queues[HCTX_TYPE_POLL]);
 	return 0;
+out_unlock:
+	mutex_unlock(&dev->shutdown_lock);
+	return result;
 }
 static void nvme_del_queue_end(struct request *req, blk_status_t error)
 	if (!pci_device_is_present(pdev)) {
 		nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_DEAD);
 		nvme_dev_disable(dev, true);
-		nvme_dev_remove_admin(dev);
 	}
 	flush_work(&dev->ctrl.reset_work);

drivers/nvme/host/tcp.c+1−3

 	struct blk_mq_tag_set	admin_tag_set;
 	struct sockaddr_storage addr;
 	struct sockaddr_storage src_addr;
-	struct net_device	*ndev;
 	struct nvme_ctrl	ctrl;
 	struct work_struct	err_work;
 	}
 	if (opts->mask & NVMF_OPT_HOST_IFACE) {
-		ctrl->ndev = dev_get_by_name(&init_net, opts->host_iface);
+		if (!__dev_get_by_name(&init_net, opts->host_iface)) {
-		if (!ctrl->ndev) {
 			pr_err("invalid interface passed: %s\n",
 			       opts->host_iface);
 			ret = -ENODEV;

drivers/pci/proc.c+1−1

 			break;
 		}
 		/* If arch decided it can't, fall through... */
-#endif /* HAVE_PCI_MMAP */
 		fallthrough;
+#endif /* HAVE_PCI_MMAP */
 	default:
 		ret = -EINVAL;
 		break;

drivers/power/supply/ab8500_fg.c+2−0

 		break;
 	case AB8500_FG_CALIB_WAIT:
 		dev_dbg(di->dev, "Calibration WFI\n");
+		break;
 	default:
 		break;
 	}
 					queue_work(di->fg_wq, &di->fg_work);
 					break;
 				}
+				break;
 			default:
 				break;
 			}

drivers/power/supply/abx500_chargalg.c+1−0

@@ -1150,6 +1150,7 @@ static int abx500_chargalg_get_ext_psy_data(struct device dev, void data) · 1149 unmodified lines
1150	default:	1150	default:
1151	break;	1151	break;
1152	}	1152	}
		1153	break;
1153	default:	1154	default:
1154	break;	1155	break;
1155	}	1156	}

drivers/pwm/pwm-berlin.c+3−6

 		return 0;
 	}
-	if (state->period != pwm->state.period ||
+	err = berlin_pwm_config(chip, pwm, state->duty_cycle, state->period);
-	    state->duty_cycle != pwm->state.duty_cycle) {
+	if (err)
-		err = berlin_pwm_config(chip, pwm, state->duty_cycle, state->period);
+		return err;
-		if (err)
-			return err;
-	}
 	if (!enabled)
 		return berlin_pwm_enable(chip, pwm);

drivers/pwm/pwm-ep93xx.c+40−45

@@ -64,6 +64,11 @@ static int ep93xx_pwm_apply(struct pwm_chip chip, struct pwm_device pwm, · 63 unmodified lines
64	int ret;	64	int ret;
65	struct ep93xx_pwm *ep93xx_pwm = to_ep93xx_pwm(chip);	65	struct ep93xx_pwm *ep93xx_pwm = to_ep93xx_pwm(chip);
66	bool enabled = state->enabled;	66	bool enabled = state->enabled;
		67	void __iomem *base = ep93xx_pwm->base;
		68	unsigned long long c;
		69	unsigned long period_cycles;
		70	unsigned long duty_cycles;
		71	unsigned long term;
67		72
68	if (state->polarity != pwm->state.polarity) {	73	if (state->polarity != pwm->state.polarity) {
69	if (enabled) {	74	if (enabled) {
@@ -97,57 +102,47 @@ static int ep93xx_pwm_apply(struct pwm_chip chip, struct pwm_device pwm, · 27 unmodified lines
97	return 0;	102	return 0;
98	}	103	}
99		104
100	if (state->period != pwm->state.period \|\|	105	/*
101	state->duty_cycle != pwm->state.duty_cycle) {	106	* The clock needs to be enabled to access the PWM registers.
102	struct ep93xx_pwm *ep93xx_pwm = to_ep93xx_pwm(chip);	107	* Configuration can be changed at any time.
103	void __iomem *base = ep93xx_pwm->base;	108	*/
104	unsigned long long c;	109	if (!pwm_is_enabled(pwm)) {
105	unsigned long period_cycles;	110	ret = clk_prepare_enable(ep93xx_pwm->clk);
106	unsigned long duty_cycles;	111	if (ret)
107	unsigned long term;	112	return ret;
		113	}
108		114
109	/*	115	c = clk_get_rate(ep93xx_pwm->clk);
110	* The clock needs to be enabled to access the PWM registers.	116	c *= state->period;
111	* Configuration can be changed at any time.	117	do_div(c, 1000000000);
112	*/	118	period_cycles = c;
113	if (!pwm_is_enabled(pwm)) {	119
114	ret = clk_prepare_enable(ep93xx_pwm->clk);	120	c = period_cycles;
115	if (ret)	121	c *= state->duty_cycle;
116	return ret;	122	do_div(c, state->period);
117	}	123	duty_cycles = c;
118		124
119	c = clk_get_rate(ep93xx_pwm->clk);	125	if (period_cycles < 0x10000 && duty_cycles < 0x10000) {
120	c *= state->period;	126	term = readw(base + EP93XX_PWMx_TERM_COUNT);
121	do_div(c, 1000000000);	127
122	period_cycles = c;	128	/* Order is important if PWM is running */
123		129	if (period_cycles > term) {
124	c = period_cycles;	130	writew(period_cycles, base + EP93XX_PWMx_TERM_COUNT);
125	c *= state->duty_cycle;	131	writew(duty_cycles, base + EP93XX_PWMx_DUTY_CYCLE);
126	do_div(c, state->period);
127	duty_cycles = c;
128
129	if (period_cycles < 0x10000 && duty_cycles < 0x10000) {
130	term = readw(base + EP93XX_PWMx_TERM_COUNT);
131
132	/* Order is important if PWM is running */
133	if (period_cycles > term) {
134	writew(period_cycles, base + EP93XX_PWMx_TERM_COUNT);
135	writew(duty_cycles, base + EP93XX_PWMx_DUTY_CYCLE);
136	} else {
137	writew(duty_cycles, base + EP93XX_PWMx_DUTY_CYCLE);
138	writew(period_cycles, base + EP93XX_PWMx_TERM_COUNT);
139	}
140	ret = 0;
141	} else {	132	} else {
142	ret = -EINVAL;	133	writew(duty_cycles, base + EP93XX_PWMx_DUTY_CYCLE);
		134	writew(period_cycles, base + EP93XX_PWMx_TERM_COUNT);
143	}	135	}
		136	ret = 0;
		137	} else {
		138	ret = -EINVAL;
		139	}
144		140
145	if (!pwm_is_enabled(pwm))	141	if (!pwm_is_enabled(pwm))
146	clk_disable_unprepare(ep93xx_pwm->clk);	142	clk_disable_unprepare(ep93xx_pwm->clk);
147		143
148	if (ret)	144	if (ret)
149	return ret;	145	return ret;
150	}
151		146
152	if (!enabled) {	147	if (!enabled) {
153	ret = clk_prepare_enable(ep93xx_pwm->clk);	148	ret = clk_prepare_enable(ep93xx_pwm->clk);

drivers/pwm/pwm-spear.c+3−6

 		return 0;
 	}
-	if (state->period != pwm->state.period ||
+	err = spear_pwm_config(chip, pwm, state->duty_cycle, state->period);
-	    state->duty_cycle != pwm->state.duty_cycle) {
+	if (err)
-		err = spear_pwm_config(chip, pwm, state->duty_cycle, state->period);
+		return err;
-		if (err)
-			return err;
-	}
 	if (!pwm->state.enabled)
 		return spear_pwm_enable(chip, pwm);

drivers/pwm/pwm-sprd.c+4−7

 			}
 		}
-		if (state->period != cstate->period ||
+		ret = sprd_pwm_config(spc, pwm, state->duty_cycle,
-		    state->duty_cycle != cstate->duty_cycle) {
+				      state->period);
-			ret = sprd_pwm_config(spc, pwm, state->duty_cycle,
+		if (ret)
-					      state->period);
+			return ret;
-			if (ret)
-				return ret;
-		}
 		sprd_pwm_write(spc, pwm->hwpwm, SPRD_PWM_ENABLE, 1);
 	} else if (cstate->enabled) {

drivers/pwm/pwm-tiecap.c+6−9

@@ -189,16 +189,13 @@ static int ecap_pwm_apply(struct pwm_chip chip, struct pwm_device pwm, · 188 unmodified lines
189	return 0;	189	return 0;
190	}	190	}
191		191
192	if (state->period != pwm->state.period \|\|	192	if (state->period > NSEC_PER_SEC)
193	state->duty_cycle != pwm->state.duty_cycle) {	193	return -ERANGE;
194	if (state->period > NSEC_PER_SEC)
195	return -ERANGE;
196		194
197	err = ecap_pwm_config(chip, pwm, state->duty_cycle,	195	err = ecap_pwm_config(chip, pwm, state->duty_cycle,
198	state->period, enabled);	196	state->period, enabled);
199	if (err)	197	if (err)
200	return err;	198	return err;
201	}
202		199
203	if (!enabled)	200	if (!enabled)
204	return ecap_pwm_enable(chip, pwm);	201	return ecap_pwm_enable(chip, pwm);

drivers/regulator/bd9576-regulator.c+2−2

@@ -294,9 +294,9 @@ static bool check_temp_flag_mismatch(struct regulator_dev *rdev, int severity, · 293 unmodified lines
294	struct bd957x_regulator_data *r)	294	struct bd957x_regulator_data *r)
295	{	295	{
296	if ((severity == REGULATOR_SEVERITY_ERR &&	296	if ((severity == REGULATOR_SEVERITY_ERR &&
297	r->ovd_notif != REGULATOR_EVENT_OVER_TEMP) \|\|	297	r->temp_notif != REGULATOR_EVENT_OVER_TEMP) \|\|
298	(severity == REGULATOR_SEVERITY_WARN &&	298	(severity == REGULATOR_SEVERITY_WARN &&
299	r->ovd_notif != REGULATOR_EVENT_OVER_TEMP_WARN)) {	299	r->temp_notif != REGULATOR_EVENT_OVER_TEMP_WARN)) {
300	dev_warn(rdev_get_dev(rdev),	300	dev_warn(rdev_get_dev(rdev),
301	"Can't support both thermal WARN and ERR\n");	301	"Can't support both thermal WARN and ERR\n");
302	if (severity == REGULATOR_SEVERITY_WARN)	302	if (severity == REGULATOR_SEVERITY_WARN)

drivers/regulator/hi6421-regulator.c+13−9

 static int hi6421_regulator_enable(struct regulator_dev *rdev)
 {
-	struct hi6421_regulator_pdata *pdata;
+	struct hi6421_regulator_pdata *pdata = rdev_get_drvdata(rdev);
-	pdata = dev_get_drvdata(rdev->dev.parent);
 	/* hi6421 spec requires regulator enablement must be serialized:
 	 *  - Because when BUCK, LDO switching from off to on, it will have
 	 *    a huge instantaneous current; so you can not turn on two or
 static unsigned int hi6421_regulator_ldo_get_mode(struct regulator_dev *rdev)
 {
-	struct hi6421_regulator_info *info = rdev_get_drvdata(rdev);
+	struct hi6421_regulator_info *info;
 	unsigned int reg_val;
+	info = container_of(rdev->desc, struct hi6421_regulator_info, desc);
 	regmap_read(rdev->regmap, rdev->desc->enable_reg, &reg_val);
 	if (reg_val & info->mode_mask)
 		return REGULATOR_MODE_IDLE;
 static unsigned int hi6421_regulator_buck_get_mode(struct regulator_dev *rdev)
 {
-	struct hi6421_regulator_info *info = rdev_get_drvdata(rdev);
+	struct hi6421_regulator_info *info;
 	unsigned int reg_val;
+	info = container_of(rdev->desc, struct hi6421_regulator_info, desc);
 	regmap_read(rdev->regmap, rdev->desc->enable_reg, &reg_val);
 	if (reg_val & info->mode_mask)
 		return REGULATOR_MODE_STANDBY;
 static int hi6421_regulator_ldo_set_mode(struct regulator_dev *rdev,
 						unsigned int mode)
 {
-	struct hi6421_regulator_info *info = rdev_get_drvdata(rdev);
+	struct hi6421_regulator_info *info;
 	unsigned int new_mode;
+	info = container_of(rdev->desc, struct hi6421_regulator_info, desc);
 	switch (mode) {
 	case REGULATOR_MODE_NORMAL:
 		new_mode = 0;
 static int hi6421_regulator_buck_set_mode(struct regulator_dev *rdev,
 						unsigned int mode)
 {
-	struct hi6421_regulator_info *info = rdev_get_drvdata(rdev);
+	struct hi6421_regulator_info *info;
 	unsigned int new_mode;
+	info = container_of(rdev->desc, struct hi6421_regulator_info, desc);
 	switch (mode) {
 	case REGULATOR_MODE_NORMAL:
 		new_mode = 0;
 hi6421_regulator_ldo_get_optimum_mode(struct regulator_dev *rdev,
 			int input_uV, int output_uV, int load_uA)
 {
-	struct hi6421_regulator_info *info = rdev_get_drvdata(rdev);
+	struct hi6421_regulator_info *info;
+	info = container_of(rdev->desc, struct hi6421_regulator_info, desc);
 	if (load_uA > info->eco_microamp)
 		return REGULATOR_MODE_NORMAL;
 	if (!pdata)
 		return -ENOMEM;
 	mutex_init(&pdata->lock);
-	platform_set_drvdata(pdev, pdata);
 	for (i = 0; i < ARRAY_SIZE(hi6421_regulator_info); i++) {
 		/* assign per-regulator data */
 		info = &hi6421_regulator_info[i];
 		config.dev = pdev->dev.parent;
-		config.driver_data = info;
+		config.driver_data = pdata;
 		config.regmap = pmic->regmap;
 		rdev = devm_regulator_register(&pdev->dev, &info->desc,

drivers/regulator/hi6421v600-regulator.c+9−7

 static int hi6421_spmi_regulator_enable(struct regulator_dev *rdev)
 {
-	struct hi6421_spmi_reg_priv *priv;
+	struct hi6421_spmi_reg_priv *priv = rdev_get_drvdata(rdev);
 	int ret;
-	priv = dev_get_drvdata(rdev->dev.parent);
 	/* cannot enable more than one regulator at one time */
 	mutex_lock(&priv->enable_mutex);
 static unsigned int hi6421_spmi_regulator_get_mode(struct regulator_dev *rdev)
 {
-	struct hi6421_spmi_reg_info *sreg = rdev_get_drvdata(rdev);
+	struct hi6421_spmi_reg_info *sreg;
 	unsigned int reg_val;
+	sreg = container_of(rdev->desc, struct hi6421_spmi_reg_info, desc);
 	regmap_read(rdev->regmap, rdev->desc->enable_reg, &reg_val);
 	if (reg_val & sreg->eco_mode_mask)
 static int hi6421_spmi_regulator_set_mode(struct regulator_dev *rdev,
 					  unsigned int mode)
 {
-	struct hi6421_spmi_reg_info *sreg = rdev_get_drvdata(rdev);
+	struct hi6421_spmi_reg_info *sreg;
 	unsigned int val;
+	sreg = container_of(rdev->desc, struct hi6421_spmi_reg_info, desc);
 	switch (mode) {
 	case REGULATOR_MODE_NORMAL:
 		val = 0;
 				       int input_uV, int output_uV,
 				       int load_uA)
 {
-	struct hi6421_spmi_reg_info *sreg = rdev_get_drvdata(rdev);
+	struct hi6421_spmi_reg_info *sreg;
+	sreg = container_of(rdev->desc, struct hi6421_spmi_reg_info, desc);
 	if (!sreg->eco_uA || ((unsigned int)load_uA > sreg->eco_uA))
 		return REGULATOR_MODE_NORMAL;
 		return -ENOMEM;
 	mutex_init(&priv->enable_mutex);
-	platform_set_drvdata(pdev, priv);
 	for (i = 0; i < ARRAY_SIZE(regulator_info); i++) {
 		info = &regulator_info[i];
 		config.dev = pdev->dev.parent;
-		config.driver_data = info;
+		config.driver_data = priv;
 		config.regmap = pmic->regmap;
 		rdev = devm_regulator_register(dev, &info->desc, &config);

drivers/regulator/mtk-dvfsrc-regulator.c+1−2

 	for (i = 0; i < regulator_init_data->size; i++) {
 		config.dev = dev->parent;
 		config.driver_data = (mt_regulators + i);
-		rdev = devm_regulator_register(dev->parent,
+		rdev = devm_regulator_register(dev, &(mt_regulators + i)->desc,
-					       &(mt_regulators + i)->desc,
 					       &config);
 		if (IS_ERR(rdev)) {
 			dev_err(dev, "failed to register %s\n",

drivers/regulator/rtmv20-regulator.c+1−1

@@ -37,7 +37,7 @@ · 36 unmodified lines
37	#define RTMV20_WIDTH2_MASK GENMASK(7, 0)	37	#define RTMV20_WIDTH2_MASK GENMASK(7, 0)
38	#define RTMV20_LBPLVL_MASK GENMASK(3, 0)	38	#define RTMV20_LBPLVL_MASK GENMASK(3, 0)
39	#define RTMV20_LBPEN_MASK BIT(7)	39	#define RTMV20_LBPEN_MASK BIT(7)
40	#define RTMV20_STROBEPOL_MASK BIT(1)	40	#define RTMV20_STROBEPOL_MASK BIT(0)
41	#define RTMV20_VSYNPOL_MASK BIT(1)	41	#define RTMV20_VSYNPOL_MASK BIT(1)
42	#define RTMV20_FSINEN_MASK BIT(7)	42	#define RTMV20_FSINEN_MASK BIT(7)
43	#define RTMV20_ESEN_MASK BIT(6)	43	#define RTMV20_ESEN_MASK BIT(6)

drivers/s390/char/tape_char.c+0−2

@@ -371,8 +371,6 @@ __tapechar_ioctl(struct tape_device *device, · 370 unmodified lines
371	case MTSEEK:	371	case MTSEEK:
372	if (device->required_tapemarks)	372	if (device->required_tapemarks)
373	tape_std_terminate_write(device);	373	tape_std_terminate_write(device);
374	default:
375	;
376	}	374	}
377	rc = tape_mtop(device, op.mt_op, op.mt_count);	375	rc = tape_mtop(device, op.mt_op, op.mt_count);
378		376

drivers/s390/net/ctcm_fsms.c+1−0

@@ -1454,6 +1454,7 @@ again: · 1453 unmodified lines
1454	get_ccwdev_lock(ch->cdev), saveflags);	1454	get_ccwdev_lock(ch->cdev), saveflags);
1455	if (rc != 0)	1455	if (rc != 0)
1456	ctcm_ccw_check_rc(ch, rc, "normal RX");	1456	ctcm_ccw_check_rc(ch, rc, "normal RX");
		1457	break;
1457	default:	1458	default:
1458	break;	1459	break;
1459	}	1460	}

drivers/s390/net/qeth_l3_main.c+1−0

@@ -434,6 +434,7 @@ static int qeth_l3_correct_routing_type(struct qeth_card *card, · 433 unmodified lines
434	if (qeth_is_ipafunc_supported(card, prot,	434	if (qeth_is_ipafunc_supported(card, prot,
435	IPA_OSA_MC_ROUTER))	435	IPA_OSA_MC_ROUTER))
436	return 0;	436	return 0;
		437	goto out_inval;
437	default:	438	default:
438	goto out_inval;	439	goto out_inval;
439	}	440	}

drivers/s390/scsi/zfcp_sysfs.c+1−0

@@ -487,6 +487,7 @@ static ssize_t zfcp_sysfs_port_fc_security_show(struct device *dev, · 486 unmodified lines
487	if (0 == (status & ZFCP_STATUS_COMMON_OPEN) \|\|	487	if (0 == (status & ZFCP_STATUS_COMMON_OPEN) \|\|
488	0 == (status & ZFCP_STATUS_COMMON_UNBLOCKED) \|\|	488	0 == (status & ZFCP_STATUS_COMMON_UNBLOCKED) \|\|
489	0 == (status & ZFCP_STATUS_PORT_PHYS_OPEN) \|\|	489	0 == (status & ZFCP_STATUS_PORT_PHYS_OPEN) \|\|
		490	0 != (status & ZFCP_STATUS_PORT_LINK_TEST) \|\|
490	0 != (status & ZFCP_STATUS_COMMON_ERP_FAILED) \|\|	491	0 != (status & ZFCP_STATUS_COMMON_ERP_FAILED) \|\|
491	0 != (status & ZFCP_STATUS_COMMON_ACCESS_BOXED))	492	0 != (status & ZFCP_STATUS_COMMON_ACCESS_BOXED))
492	i = sprintf(buf, "unknown\n");	493	i = sprintf(buf, "unknown\n");

drivers/scsi/arm/fas216.c+1−1

@@ -2010,7 +2010,7 @@ static void fas216_rq_sns_done(FAS216_Info info, struct scsi_cmnd SCpnt, · 2009 unmodified lines
2010	"request sense complete, result=0x%04x%02x%02x",	2010	"request sense complete, result=0x%04x%02x%02x",
2011	result, SCpnt->SCp.Message, SCpnt->SCp.Status);	2011	result, SCpnt->SCp.Message, SCpnt->SCp.Status);
2012		2012
2013	if (result != DID_OK \|\| SCpnt->SCp.Status != GOOD)	2013	if (result != DID_OK \|\| SCpnt->SCp.Status != SAM_STAT_GOOD)
2014	/*	2014	/*
2015	* Something went wrong. Make sure that we don't	2015	* Something went wrong. Make sure that we don't
2016	* have valid data in the sense buffer that could	2016	* have valid data in the sense buffer that could

drivers/scsi/hosts.c+1−0

@@ -488,6 +488,7 @@ struct Scsi_Host scsi_host_alloc(struct scsi_host_template sht, int privsize) · 487 unmodified lines
488	shost_printk(KERN_WARNING, shost,	488	shost_printk(KERN_WARNING, shost,
489	"error handler thread failed to spawn, error = %ld\n",	489	"error handler thread failed to spawn, error = %ld\n",
490	PTR_ERR(shost->ehandler));	490	PTR_ERR(shost->ehandler));
		491	shost->ehandler = NULL;
491	goto fail;	492	goto fail;
492	}	493	}
493		494

drivers/scsi/libsas/sas_discover.c+1−1

@@ -461,7 +461,7 @@ static void sas_discover_domain(struct work_struct *work) · 460 unmodified lines
461	break;	461	break;
462	#else	462	#else
463	pr_notice("ATA device seen but CONFIG_SCSI_SAS_ATA=N so cannot attach\n");	463	pr_notice("ATA device seen but CONFIG_SCSI_SAS_ATA=N so cannot attach\n");
464	/* Fall through */	464	fallthrough;
465	#endif	465	#endif
466	/* Fall through - only for the #else condition above. */	466	/* Fall through - only for the #else condition above. */
467	default:	467	default:

drivers/scsi/mpi3mr/mpi3mr_fw.c+7−8

@@ -2607,14 +2607,13 @@ static int mpi3mr_issue_iocinit(struct mpi3mr_ioc *mrioc) · 2606 unmodified lines
2607	goto out;	2607	goto out;
2608	}	2608	}
2609	drv_info->information_length = cpu_to_le32(data_len);	2609	drv_info->information_length = cpu_to_le32(data_len);
2610	strncpy(drv_info->driver_signature, "Broadcom", sizeof(drv_info->driver_signature));	2610	strscpy(drv_info->driver_signature, "Broadcom", sizeof(drv_info->driver_signature));
2611	strncpy(drv_info->os_name, utsname()->sysname, sizeof(drv_info->os_name));	2611	strscpy(drv_info->os_name, utsname()->sysname, sizeof(drv_info->os_name));
2612	drv_info->os_name[sizeof(drv_info->os_name) - 1] = 0;	2612	strscpy(drv_info->os_version, utsname()->release, sizeof(drv_info->os_version));
2613	strncpy(drv_info->os_version, utsname()->release, sizeof(drv_info->os_version));	2613	strscpy(drv_info->driver_name, MPI3MR_DRIVER_NAME, sizeof(drv_info->driver_name));
2614	drv_info->os_version[sizeof(drv_info->os_version) - 1] = 0;	2614	strscpy(drv_info->driver_version, MPI3MR_DRIVER_VERSION, sizeof(drv_info->driver_version));
2615	strncpy(drv_info->driver_name, MPI3MR_DRIVER_NAME, sizeof(drv_info->driver_name));	2615	strscpy(drv_info->driver_release_date, MPI3MR_DRIVER_RELDATE,
2616	strncpy(drv_info->driver_version, MPI3MR_DRIVER_VERSION, sizeof(drv_info->driver_version));	2616	sizeof(drv_info->driver_release_date));
2617	strncpy(drv_info->driver_release_date, MPI3MR_DRIVER_RELDATE, sizeof(drv_info->driver_release_date));
2618	drv_info->driver_capabilities = 0;	2617	drv_info->driver_capabilities = 0;
2619	memcpy((u8 )&mrioc->driver_info, (u8 )drv_info,	2618	memcpy((u8 )&mrioc->driver_info, (u8 )drv_info,
2620	sizeof(mrioc->driver_info));	2619	sizeof(mrioc->driver_info));

drivers/scsi/pm8001/pm8001_ctl.c+26−22

  * @attr: device attribute (unused)
  * @buf: the buffer returned
  *
- * A sysfs 'read only' shost attribute.
+ * A sysfs 'read-only' shost attribute.
  */
 static ssize_t controller_fatal_error_show(struct device *cdev,
 		struct device_attribute *attr, char *buf)
 static DEVICE_ATTR(ila_version, 0444, pm8001_ctl_ila_version_show, NULL);
 /**
- * pm8001_ctl_inactive_fw_version_show - Inacative firmware version number
+ * pm8001_ctl_inactive_fw_version_show - Inactive firmware version number
  * @cdev: pointer to embedded class device
  * @attr: device attribute (unused)
  * @buf: the buffer returned
  * @cdev:pointer to embedded class device
  * @attr: device attribute (unused)
  * @buf: the buffer returned
+ *
  * A sysfs 'read-only' shost attribute.
  */
 static ssize_t pm8001_ctl_ib_queue_log_show(struct device *cdev,
  * @cdev:pointer to embedded class device
  * @attr: device attribute (unused)
  * @buf: the buffer returned
+ *
  * A sysfs 'read-only' shost attribute.
  */
  * @cdev:pointer to embedded class device
  * @attr: device attribute (unused)
  * @buf:the buffer returned
+ *
  * A sysfs 'read-only' shost attribute.
  */
 static ssize_t pm8001_ctl_bios_version_show(struct device *cdev,
 static DEVICE_ATTR(iop_log, S_IRUGO, pm8001_ctl_iop_log_show, NULL);
 /**
- ** pm8001_ctl_fatal_log_show - fatal error logging
+ * pm8001_ctl_fatal_log_show - fatal error logging
- ** @cdev:pointer to embedded class device
+ * @cdev:pointer to embedded class device
- ** @attr: device attribute
+ * @attr: device attribute
- ** @buf: the buffer returned
+ * @buf: the buffer returned
- **
+ *
- ** A sysfs 'read-only' shost attribute.
+ * A sysfs 'read-only' shost attribute.
- **/
+ */
 static ssize_t pm8001_ctl_fatal_log_show(struct device *cdev,
 	struct device_attribute *attr, char *buf)
 static DEVICE_ATTR(fatal_log, S_IRUGO, pm8001_ctl_fatal_log_show, NULL);
 /**
- ** non_fatal_log_show - non fatal error logging
+ * non_fatal_log_show - non fatal error logging
- ** @cdev:pointer to embedded class device
+ * @cdev:pointer to embedded class device
- ** @attr: device attribute
+ * @attr: device attribute
- ** @buf: the buffer returned
+ * @buf: the buffer returned
- **
+ *
- ** A sysfs 'read-only' shost attribute.
+ * A sysfs 'read-only' shost attribute.
- **/
+ */
 static ssize_t non_fatal_log_show(struct device *cdev,
 	struct device_attribute *attr, char *buf)
 {
 static DEVICE_ATTR_RW(non_fatal_count);
 /**
- ** pm8001_ctl_gsm_log_show - gsm dump collection
+ * pm8001_ctl_gsm_log_show - gsm dump collection
- ** @cdev:pointer to embedded class device
+ * @cdev:pointer to embedded class device
- ** @attr: device attribute (unused)
+ * @attr: device attribute (unused)
- ** @buf: the buffer returned
+ * @buf: the buffer returned
- ** A sysfs 'read-only' shost attribute.
+ *
- **/
+ * A sysfs 'read-only' shost attribute.
+ */
 static ssize_t pm8001_ctl_gsm_log_show(struct device *cdev,
 	struct device_attribute *attr, char *buf)
 {

drivers/scsi/pm8001/pm8001_hwi.c+9−9

drivers/scsi/pm8001/pm8001_init.c+15−14

 /**
  * pm8001_interrupt_handler_intx - main INTx interrupt handler.
  * @irq: interrupt number
- * @dev_id: sas_ha structure. The HBA is retrieved from sas_has structure.
+ * @dev_id: sas_ha structure. The HBA is retrieved from sas_ha structure.
  */
 static irqreturn_t pm8001_interrupt_handler_intx(int irq, void *dev_id)
 }
 /**
- * pm8001_ioremap - remap the pci high physical address to kernal virtual
+ * pm8001_ioremap - remap the pci high physical address to kernel virtual
  * address so that we can access them.
- * @pm8001_ha:our hba structure.
+ * @pm8001_ha: our hba structure.
  */
 static int pm8001_ioremap(struct pm8001_hba_info *pm8001_ha)
 {
  * pm8001_init_sas_add - initialize sas address
  * @pm8001_ha: our ha struct.
  *
- * Currently we just set the fixed SAS address to our HBA,for manufacture,
+ * Currently we just set the fixed SAS address to our HBA, for manufacture,
  * it should read from the EEPROM
  */
 static void pm8001_init_sas_add(struct pm8001_hba_info *pm8001_ha)
 };
 /**
- * pm8001_get_internal_phy_settings : Retrieves the internal PHY settings
+ * pm8001_get_internal_phy_settings - Retrieves the internal PHY settings
  * @pm8001_ha : our adapter
  * @phycfg : PHY config page to populate
  */
 }
 /**
- * pm8001_get_external_phy_settings : Retrieves the external PHY settings
+ * pm8001_get_external_phy_settings - Retrieves the external PHY settings
  * @pm8001_ha : our adapter
  * @phycfg : PHY config page to populate
  */
 }
 /**
- * pm8001_get_phy_mask : Retrieves the mask that denotes if a PHY is int/ext
+ * pm8001_get_phy_mask - Retrieves the mask that denotes if a PHY is int/ext
  * @pm8001_ha : our adapter
  * @phymask : The PHY mask
  */
 }
 /**
- * pm8001_set_phy_settings_ven_117c_12G() : Configure ATTO 12Gb PHY settings
+ * pm8001_set_phy_settings_ven_117c_12G() - Configure ATTO 12Gb PHY settings
  * @pm8001_ha : our adapter
  */
 static
 }
 /**
- * pm8001_configure_phy_settings : Configures PHY settings based on vendor ID.
+ * pm8001_configure_phy_settings - Configures PHY settings based on vendor ID.
  * @pm8001_ha : our hba.
  */
 static int pm8001_configure_phy_settings(struct pm8001_hba_info *pm8001_ha)
  * @ent: pci device id
  *
  * This function is the main initialization function, when register a new
- * pci driver it is invoked, all struct an hardware initilization should be done
+ * pci driver it is invoked, all struct and hardware initialization should be
- * here, also, register interrupt
+ * done here, also, register interrupt.
  */
 static int pm8001_pci_probe(struct pci_dev *pdev,
 			    const struct pci_device_id *ent)
 	return rc;
 }
-/*
+/**
  * pm8001_init_ccb_tag - allocate memory to CCB and tag.
  * @pm8001_ha: our hba card information.
  * @shost: scsi host which has been allocated outside.
+ * @pdev: pci device.
  */
 static int
 pm8001_init_ccb_tag(struct pm8001_hba_info *pm8001_ha, struct Scsi_Host *shost,
  * pm8001_pci_suspend - power management suspend main entry point
  * @dev: Device struct
  *
- * Returns 0 success, anything else error.
+ * Return: 0 on success, anything else on error.
  */
 static int __maybe_unused pm8001_pci_suspend(struct device *dev)
 {
  * pm8001_pci_resume - power management resume main entry point
  * @dev: Device struct
  *
- * Returns 0 success, anything else error.
+ * Return: 0 on success, anything else on error.
  */
 static int __maybe_unused pm8001_pci_resume(struct device *dev)
 {

drivers/scsi/pm8001/pm8001_sas.c+22−19

 		pm8001_tag_free(pm8001_ha, i);
 }
- /**
+/**
-  * pm8001_mem_alloc - allocate memory for pm8001.
+ * pm8001_mem_alloc - allocate memory for pm8001.
-  * @pdev: pci device.
+ * @pdev: pci device.
-  * @virt_addr: the allocated virtual address
+ * @virt_addr: the allocated virtual address
-  * @pphys_addr_hi: the physical address high byte address.
+ * @pphys_addr: DMA address for this device
-  * @pphys_addr_lo: the physical address low byte address.
+ * @pphys_addr_hi: the physical address high byte address.
-  * @mem_size: memory size.
+ * @pphys_addr_lo: the physical address low byte address.
-  */
+ * @mem_size: memory size.
+ * @align: requested byte alignment
+ */
 int pm8001_mem_alloc(struct pci_dev *pdev, void **virt_addr,
 	dma_addr_t *pphys_addr, u32 *pphys_addr_hi,
 	u32 *pphys_addr_lo, u32 mem_size, u32 align)
 }
 /**
-  * pm8001_task_prep_ssp - the dispatcher function,prepare ssp data for ssp task
+  * pm8001_task_prep_ssp - the dispatcher function, prepare ssp data for ssp task
   * @pm8001_ha: our hba card information
   * @ccb: the ccb which attached to ssp task
   */
 	pm8001_tag_free(pm8001_ha, ccb_idx);
 }
- /**
+/**
-  * pm8001_alloc_dev - find a empty pm8001_device
+ * pm8001_alloc_dev - find a empty pm8001_device
-  * @pm8001_ha: our hba card information
+ * @pm8001_ha: our hba card information
-  */
+ */
 static struct pm8001_device *pm8001_alloc_dev(struct pm8001_hba_info *pm8001_ha)
 {
 	u32 dev;
   * @parameter: ssp task parameter.
   *
   * when errors or exception happened, we may want to do something, for example
-  * abort the issued task which result in this execption, it is done by calling
+  * abort the issued task which result in this exception, it is done by calling
   * this function, note it is also with the task execute interface.
   */
 static int pm8001_exec_internal_tmf_task(struct domain_device *dev,
 }
 /**
- * pm8001_I_T_nexus_reset()
+ * pm8001_I_T_nexus_reset() - reset the initiator/target connection
-  * Standard mandates link reset for ATA  (type 0) and hard reset for
+ * @dev: the device structure for the device to reset.
-  * SSP (type 1) , only for RECOVERY
+ *
-  * @dev: the device structure for the device to reset.
+ * Standard mandates link reset for ATA (type 0) and hard reset for
-  */
+ * SSP (type 1), only for RECOVERY
+ */
 int pm8001_I_T_nexus_reset(struct domain_device *dev)
 {
 	int rc = TMF_RESP_FUNC_FAILED;

drivers/scsi/pm8001/pm80xx_hwi.c+25−25

@@ -140,7 +140,7 @@ ssize_t pm80xx_get_fatal_dump(struct device *cdev, · 139 unmodified lines
140	pm8001_ha->fatal_bar_loc = 0;	140	pm8001_ha->fatal_bar_loc = 0;
141	}	141	}
142		142
143	/* Read until accum_len is retrived */	143	/* Read until accum_len is retrieved */
144	accum_len = pm8001_mr32(fatal_table_address,	144	accum_len = pm8001_mr32(fatal_table_address,
145	MPI_FATAL_EDUMP_TABLE_ACCUM_LEN);	145	MPI_FATAL_EDUMP_TABLE_ACCUM_LEN);
146	/* Determine length of data between previously stored transfer length	146	/* Determine length of data between previously stored transfer length
@@ -1011,7 +1011,7 @@ static int mpi_init_check(struct pm8001_hba_info *pm8001_ha) · 864 unmodified lines
1011	value);	1011	value);
1012	return -EBUSY;	1012	return -EBUSY;
1013	}	1013	}
1014	/* check the MPI-State for initialization upto 100ms*/	1014	/* check the MPI-State for initialization up to 100ms*/
1015	max_wait_count = 5;/* 100 msec */	1015	max_wait_count = 5;/* 100 msec */
1016	do {	1016	do {
1017	msleep(FW_READY_INTERVAL);	1017	msleep(FW_READY_INTERVAL);
@@ -1093,7 +1093,7 @@ static int init_pci_device_addresses(struct pm8001_hba_info *pm8001_ha) · 75 unmodified lines
1093		1093
1094	value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0);	1094	value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0);
1095		1095
1096	/**	1096	/*
1097	* lower 26 bits of SCRATCHPAD0 register describes offset within the	1097	* lower 26 bits of SCRATCHPAD0 register describes offset within the
1098	* PCIe BAR where the MPI configuration table is present	1098	* PCIe BAR where the MPI configuration table is present
1099	*/	1099	*/
@@ -1101,7 +1101,7 @@ static int init_pci_device_addresses(struct pm8001_hba_info *pm8001_ha) · 1 unmodified line
1101		1101
1102	pm8001_dbg(pm8001_ha, DEV, "Scratchpad 0 Offset: 0x%x value 0x%x\n",	1102	pm8001_dbg(pm8001_ha, DEV, "Scratchpad 0 Offset: 0x%x value 0x%x\n",
1103	offset, value);	1103	offset, value);
1104	/**	1104	/*
1105	* Upper 6 bits describe the offset within PCI config space where BAR	1105	* Upper 6 bits describe the offset within PCI config space where BAR
1106	* is located.	1106	* is located.
1107	*/	1107	*/
@@ -1109,7 +1109,7 @@ static int init_pci_device_addresses(struct pm8001_hba_info *pm8001_ha) · 1 unmodified line
1109	pcibar = get_pci_bar_index(pcilogic);	1109	pcibar = get_pci_bar_index(pcilogic);
1110	pm8001_dbg(pm8001_ha, INIT, "Scratchpad 0 PCI BAR: %d\n", pcibar);	1110	pm8001_dbg(pm8001_ha, INIT, "Scratchpad 0 PCI BAR: %d\n", pcibar);
1111		1111
1112	/**	1112	/*
1113	* Make sure the offset falls inside the ioremapped PCI BAR	1113	* Make sure the offset falls inside the ioremapped PCI BAR
1114	*/	1114	*/
1115	if (offset > pm8001_ha->io_mem[pcibar].memsize) {	1115	if (offset > pm8001_ha->io_mem[pcibar].memsize) {
@@ -1121,7 +1121,7 @@ static int init_pci_device_addresses(struct pm8001_hba_info *pm8001_ha) · 5 unmodified lines
1121	pm8001_ha->main_cfg_tbl_addr = base_addr =	1121	pm8001_ha->main_cfg_tbl_addr = base_addr =
1122	pm8001_ha->io_mem[pcibar].memvirtaddr + offset;	1122	pm8001_ha->io_mem[pcibar].memvirtaddr + offset;
1123		1123
1124	/**	1124	/*
1125	* Validate main configuration table address: first DWord should read	1125	* Validate main configuration table address: first DWord should read
1126	* "PMCS"	1126	* "PMCS"
1127	*/	1127	*/
@@ -1385,7 +1385,7 @@ pm80xx_get_encrypt_info(struct pm8001_hba_info *pm8001_ha) · 257 unmodified lines
1385	}	1385	}
1386		1386
1387	/**	1387	/**
1388	* pm80xx_encrypt_update - update flash with encryption informtion	1388	* pm80xx_encrypt_update - update flash with encryption information
1389	* @pm8001_ha: our hba card information.	1389	* @pm8001_ha: our hba card information.
1390	*/	1390	*/
1391	static int pm80xx_encrypt_update(struct pm8001_hba_info *pm8001_ha)	1391	static int pm80xx_encrypt_update(struct pm8001_hba_info *pm8001_ha)
@@ -1422,7 +1422,7 @@ static int pm80xx_encrypt_update(struct pm8001_hba_info *pm8001_ha) · 30 unmodified lines
1422	}	1422	}
1423		1423
1424	/**	1424	/**
1425	* pm80xx_chip_init - the main init function that initialize whole PM8001 chip.	1425	* pm80xx_chip_init - the main init function that initializes whole PM8001 chip.
1426	* @pm8001_ha: our hba card information	1426	* @pm8001_ha: our hba card information
1427	*/	1427	*/
1428	static int pm80xx_chip_init(struct pm8001_hba_info *pm8001_ha)	1428	static int pm80xx_chip_init(struct pm8001_hba_info *pm8001_ha)
@@ -1541,7 +1541,7 @@ static int mpi_uninit_check(struct pm8001_hba_info *pm8001_ha) · 112 unmodified lines
1541	}	1541	}
1542		1542
1543	/**	1543	/**
1544	* pm80xx_fatal_errors - returns non zero ONLY when fatal errors	1544	* pm80xx_fatal_errors - returns non-zero ONLY when fatal errors
1545	* @pm8001_ha: our hba card information	1545	* @pm8001_ha: our hba card information
1546	*	1546	*
1547	* Fatal errors are recoverable only after a host reboot.	1547	* Fatal errors are recoverable only after a host reboot.
@@ -1576,8 +1576,8 @@ pm80xx_fatal_errors(struct pm8001_hba_info *pm8001_ha) · 28 unmodified lines
1576	}	1576	}
1577		1577
1578	/**	1578	/**
1579	* pm80xx_chip_soft_rst - soft reset the PM8001 chip, so that the clear all	1579	* pm80xx_chip_soft_rst - soft reset the PM8001 chip, so that all
1580	* the FW register status to the originated status.	1580	* FW register status are reset to the originated status.
1581	* @pm8001_ha: our hba card information	1581	* @pm8001_ha: our hba card information
1582	*/	1582	*/
1583		1583
@@ -1895,13 +1895,13 @@ static void pm80xx_send_read_log(struct pm8001_hba_info *pm8001_ha, · 311 unmodified lines
1895	}	1895	}
1896		1896
1897	/**	1897	/**
1898	* mpi_ssp_completion- process the event that FW response to the SSP request.	1898	* mpi_ssp_completion - process the event that FW response to the SSP request.
1899	* @pm8001_ha: our hba card information	1899	* @pm8001_ha: our hba card information
1900	* @piomb: the message contents of this outbound message.	1900	* @piomb: the message contents of this outbound message.
1901	*	1901	*
1902	* When FW has completed a ssp request for example a IO request, after it has	1902	* When FW has completed a ssp request for example a IO request, after it has
1903	* filled the SG data with the data, it will trigger this event represent	1903	* filled the SG data with the data, it will trigger this event representing
1904	* that he has finished the job,please check the coresponding buffer.	1904	* that he has finished the job; please check the corresponding buffer.
1905	* So we will tell the caller who maybe waiting the result to tell upper layer	1905	* So we will tell the caller who maybe waiting the result to tell upper layer
1906	* that the task has been finished.	1906	* that the task has been finished.
1907	*/	1907	*/
@@ -3217,7 +3217,7 @@ mpi_smp_completion(struct pm8001_hba_info pm8001_ha, void piomb) · 1309 unmodified lines
3217	}	3217	}
3218		3218
3219	/**	3219	/**
3220	* pm80xx_hw_event_ack_req- For PM8001,some events need to acknowage to FW.	3220	* pm80xx_hw_event_ack_req- For PM8001, some events need to acknowledge to FW.
3221	* @pm8001_ha: our hba card information	3221	* @pm8001_ha: our hba card information
3222	* @Qnum: the outbound queue message number.	3222	* @Qnum: the outbound queue message number.
3223	* @SEA: source of event to ack	3223	* @SEA: source of event to ack
@@ -3275,7 +3275,7 @@ static void hw_event_port_recover(struct pm8001_hba_info *pm8001_ha, · 51 unmodified lines
3275	}	3275	}
3276		3276
3277	/**	3277	/**
3278	* hw_event_sas_phy_up -FW tells me a SAS phy up event.	3278	* hw_event_sas_phy_up - FW tells me a SAS phy up event.
3279	* @pm8001_ha: our hba card information	3279	* @pm8001_ha: our hba card information
3280	* @piomb: IO message buffer	3280	* @piomb: IO message buffer
3281	*/	3281	*/
@@ -3353,7 +3353,7 @@ hw_event_sas_phy_up(struct pm8001_hba_info pm8001_ha, void piomb) · 71 unmodified lines
3353	}	3353	}
3354		3354
3355	/**	3355	/**
3356	* hw_event_sata_phy_up -FW tells me a SATA phy up event.	3356	* hw_event_sata_phy_up - FW tells me a SATA phy up event.
3357	* @pm8001_ha: our hba card information	3357	* @pm8001_ha: our hba card information
3358	* @piomb: IO message buffer	3358	* @piomb: IO message buffer
3359	*/	3359	*/
@@ -3400,7 +3400,7 @@ hw_event_sata_phy_up(struct pm8001_hba_info pm8001_ha, void piomb) · 40 unmodified lines
3400	}	3400	}
3401		3401
3402	/**	3402	/**
3403	* hw_event_phy_down -we should notify the libsas the phy is down.	3403	* hw_event_phy_down - we should notify the libsas the phy is down.
3404	* @pm8001_ha: our hba card information	3404	* @pm8001_ha: our hba card information
3405	* @piomb: IO message buffer	3405	* @piomb: IO message buffer
3406	*/	3406	*/
@@ -3500,7 +3500,7 @@ static int mpi_phy_start_resp(struct pm8001_hba_info pm8001_ha, void piomb) · 93 unmodified lines
3500	}	3500	}
3501		3501
3502	/**	3502	/**
3503	* mpi_thermal_hw_event -The hw event has come.	3503	* mpi_thermal_hw_event - a thermal hw event has come.
3504	* @pm8001_ha: our hba card information	3504	* @pm8001_ha: our hba card information
3505	* @piomb: IO message buffer	3505	* @piomb: IO message buffer
3506	*/	3506	*/
@@ -3530,7 +3530,7 @@ static int mpi_thermal_hw_event(struct pm8001_hba_info pm8001_ha, void piomb) · 23 unmodified lines
3530	}	3530	}
3531		3531
3532	/**	3532	/**
3533	* mpi_hw_event -The hw event has come.	3533	* mpi_hw_event - The hw event has come.
3534	* @pm8001_ha: our hba card information	3534	* @pm8001_ha: our hba card information
3535	* @piomb: IO message buffer	3535	* @piomb: IO message buffer
3536	*/	3536	*/
@@ -4025,7 +4025,7 @@ static void process_one_iomb(struct pm8001_hba_info pm8001_ha, void piomb) · 488 unmodified lines
4025	case OPC_OUB_SET_DEV_INFO:	4025	case OPC_OUB_SET_DEV_INFO:
4026	pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_DEV_INFO\n");	4026	pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_DEV_INFO\n");
4027	break;	4027	break;
4028	/* spcv specifc commands */	4028	/* spcv specific commands */
4029	case OPC_OUB_PHY_START_RESP:	4029	case OPC_OUB_PHY_START_RESP:
4030	pm8001_dbg(pm8001_ha, MSG,	4030	pm8001_dbg(pm8001_ha, MSG,
4031	"OPC_OUB_PHY_START_RESP opcode:%x\n", opc);	4031	"OPC_OUB_PHY_START_RESP opcode:%x\n", opc);
@@ -4186,7 +4186,7 @@ static void build_smp_cmd(u32 deviceID, __le32 hTag, · 154 unmodified lines
4186	}	4186	}
4187		4187
4188	/**	4188	/**
4189	* pm80xx_chip_smp_req - send a SMP task to FW	4189	* pm80xx_chip_smp_req - send an SMP task to FW
4190	* @pm8001_ha: our hba card information.	4190	* @pm8001_ha: our hba card information.
4191	* @ccb: the ccb information this request used.	4191	* @ccb: the ccb information this request used.
4192	*/	4192	*/
@@ -4346,7 +4346,7 @@ static int check_enc_sat_cmd(struct sas_task *task) · 153 unmodified lines
4346	}	4346	}
4347		4347
4348	/**	4348	/**
4349	* pm80xx_chip_ssp_io_req - send a SSP task to FW	4349	* pm80xx_chip_ssp_io_req - send an SSP task to FW
4350	* @pm8001_ha: our hba card information.	4350	* @pm8001_ha: our hba card information.
4351	* @ccb: the ccb information this request used.	4351	* @ccb: the ccb information this request used.
4352	*/	4352	*/
@@ -4750,13 +4750,13 @@ pm80xx_chip_phy_start_req(struct pm8001_hba_info *pm8001_ha, u8 phy_id) · 397 unmodified lines
4750	payload.ase_sh_lm_slr_phyid = cpu_to_le32(SPINHOLD_DISABLE \|	4750	payload.ase_sh_lm_slr_phyid = cpu_to_le32(SPINHOLD_DISABLE \|
4751	LINKMODE_AUTO \| pm8001_ha->link_rate \| phy_id);	4751	LINKMODE_AUTO \| pm8001_ha->link_rate \| phy_id);
4752	/* SSC Disable and SAS Analog ST configuration */	4752	/* SSC Disable and SAS Analog ST configuration */
4753	/**	4753	/*
4754	payload.ase_sh_lm_slr_phyid =	4754	payload.ase_sh_lm_slr_phyid =
4755	cpu_to_le32(SSC_DISABLE_30 \| SAS_ASE \| SPINHOLD_DISABLE \|	4755	cpu_to_le32(SSC_DISABLE_30 \| SAS_ASE \| SPINHOLD_DISABLE \|
4756	LINKMODE_AUTO \| LINKRATE_15 \| LINKRATE_30 \| LINKRATE_60 \|	4756	LINKMODE_AUTO \| LINKRATE_15 \| LINKRATE_30 \| LINKRATE_60 \|
4757	phy_id);	4757	phy_id);
4758	Have to add "SAS PHY Analog Setup SPASTI 1 Byte" Based on need	4758	Have to add "SAS PHY Analog Setup SPASTI 1 Byte" Based on need
4759	**/	4759	*/
4760		4760
4761	payload.sas_identify.dev_type = SAS_END_DEVICE;	4761	payload.sas_identify.dev_type = SAS_END_DEVICE;
4762	payload.sas_identify.initiator_bits = SAS_PROTOCOL_ALL;	4762	payload.sas_identify.initiator_bits = SAS_PROTOCOL_ALL;

drivers/scsi/scsi_lib.c+1−1

@@ -194,7 +194,7 @@ void scsi_queue_insert(struct scsi_cmnd *cmd, int reason) · 193 unmodified lines
194	* @bufflen: len of buffer	194	* @bufflen: len of buffer
195	* @sense: optional sense buffer	195	* @sense: optional sense buffer
196	* @sshdr: optional decoded sense header	196	* @sshdr: optional decoded sense header
197	* @timeout: request timeout in seconds	197	* @timeout: request timeout in HZ
198	* @retries: number of times to retry request	198	* @retries: number of times to retry request
199	* @flags: flags for ->cmd_flags	199	* @flags: flags for ->cmd_flags
200	* @rq_flags: flags for ->rq_flags	200	* @rq_flags: flags for ->rq_flags

drivers/scsi/ufs/ufshcd.h+7−2

 static inline void ufshcd_vops_setup_xfer_req(struct ufs_hba *hba, int tag,
 					bool is_scsi_cmd)
 {
-	if (hba->vops && hba->vops->setup_xfer_req)
+	if (hba->vops && hba->vops->setup_xfer_req) {
-		return hba->vops->setup_xfer_req(hba, tag, is_scsi_cmd);
+		unsigned long flags;
+		spin_lock_irqsave(hba->host->host_lock, flags);
+		hba->vops->setup_xfer_req(hba, tag, is_scsi_cmd);
+		spin_unlock_irqrestore(hba->host->host_lock, flags);
+	}
 }
 static inline void ufshcd_vops_setup_task_mgmt(struct ufs_hba *hba,

drivers/spi/spi-atmel.c+2−7

 		}
 		mr = spi_readl(as, MR);
-		if (spi->cs_gpiod)
-			gpiod_set_value(spi->cs_gpiod, 1);
 	} else {
 		u32 cpol = (spi->mode & SPI_CPOL) ? SPI_BIT(CPOL) : 0;
 		int i;
 		mr = spi_readl(as, MR);
 		mr = SPI_BFINS(PCS, ~(1 << chip_select), mr);
-		if (spi->cs_gpiod)
-			gpiod_set_value(spi->cs_gpiod, 1);
 		spi_writel(as, MR, mr);
 	}
 	if (!spi->cs_gpiod)
 		spi_writel(as, CR, SPI_BIT(LASTXFER));
-	else
-		gpiod_set_value(spi->cs_gpiod, 0);
 }
 static void atmel_spi_lock(struct atmel_spi *as) __acquires(&as->lock)
 	master->bus_num = pdev->id;
 	master->num_chipselect = 4;
 	master->setup = atmel_spi_setup;
-	master->flags = (SPI_MASTER_MUST_RX | SPI_MASTER_MUST_TX);
+	master->flags = (SPI_MASTER_MUST_RX | SPI_MASTER_MUST_TX |
+			SPI_MASTER_GPIO_SS);
 	master->transfer_one = atmel_spi_one_transfer;
 	master->set_cs = atmel_spi_set_cs;
 	master->cleanup = atmel_spi_cleanup;

drivers/spi/spi-bcm2835.c+7−5

  * struct bcm2835_spi - BCM2835 SPI controller
  * @regs: base address of register map
  * @clk: core clock, divided to calculate serial clock
+ * @clk_hz: core clock cached speed
  * @irq: interrupt, signals TX FIFO empty or RX FIFO ¾ full
  * @tfr: SPI transfer currently processed
  * @ctlr: SPI controller reverse lookup
 struct bcm2835_spi {
 	void __iomem *regs;
 	struct clk *clk;
+	unsigned long clk_hz;
 	int irq;
 	struct spi_transfer *tfr;
 	struct spi_controller *ctlr;
 {
 	struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr);
 	struct bcm2835_spidev *slv = spi_get_ctldata(spi);
-	unsigned long spi_hz, clk_hz, cdiv;
+	unsigned long spi_hz, cdiv;
 	unsigned long hz_per_byte, byte_limit;
 	u32 cs = slv->prepare_cs;
 	/* set clock */
 	spi_hz = tfr->speed_hz;
-	clk_hz = clk_get_rate(bs->clk);
-	if (spi_hz >= clk_hz / 2) {
+	if (spi_hz >= bs->clk_hz / 2) {
 		cdiv = 2; /* clk_hz/2 is the fastest we can go */
 	} else if (spi_hz) {
 		/* CDIV must be a multiple of two */
-		cdiv = DIV_ROUND_UP(clk_hz, spi_hz);
+		cdiv = DIV_ROUND_UP(bs->clk_hz, spi_hz);
 		cdiv += (cdiv % 2);
 		if (cdiv >= 65536)
 	} else {
 		cdiv = 0; /* 0 is the slowest we can go */
 	}
-	tfr->effective_speed_hz = cdiv ? (clk_hz / cdiv) : (clk_hz / 65536);
+	tfr->effective_speed_hz = cdiv ? (bs->clk_hz / cdiv) : (bs->clk_hz / 65536);
 	bcm2835_wr(bs, BCM2835_SPI_CLK, cdiv);
 	/* handle all the 3-wire mode */
 		return bs->irq ? bs->irq : -ENODEV;
 	clk_prepare_enable(bs->clk);
+	bs->clk_hz = clk_get_rate(bs->clk);
 	err = bcm2835_dma_init(ctlr, &pdev->dev, bs);
 	if (err)

drivers/spi/spi-cadence-quadspi.c+17−13

@@ -309,6 +309,9 @@ static unsigned int cqspi_calc_dummy(const struct spi_mem_op *op, bool dtr) · 308 unmodified lines
309	{	309	{
310	unsigned int dummy_clk;	310	unsigned int dummy_clk;
311		311
		312	if (!op->dummy.nbytes)
		313	return 0;
		314
312	dummy_clk = op->dummy.nbytes * (8 / op->dummy.buswidth);	315	dummy_clk = op->dummy.nbytes * (8 / op->dummy.buswidth);
313	if (dtr)	316	if (dtr)
314	dummy_clk /= 2;	317	dummy_clk /= 2;
@@ -797,19 +800,20 @@ static int cqspi_write_setup(struct cqspi_flash_pdata *f_pdata, · 482 unmodified lines
797	reg = cqspi_calc_rdreg(f_pdata);	800	reg = cqspi_calc_rdreg(f_pdata);
798	writel(reg, reg_base + CQSPI_REG_RD_INSTR);	801	writel(reg, reg_base + CQSPI_REG_RD_INSTR);
799		802
800	if (f_pdata->dtr) {	803	/*
801	/*	804	* SPI NAND flashes require the address of the status register to be
802	* Some flashes like the cypress Semper flash expect a 4-byte	805	* passed in the Read SR command. Also, some SPI NOR flashes like the
803	* dummy address with the Read SR command in DTR mode, but this	806	* cypress Semper flash expect a 4-byte dummy address in the Read SR
804	* controller does not support sending address with the Read SR	807	* command in DTR mode.
805	* command. So, disable write completion polling on the	808	*
806	* controller's side. spi-nor will take care of polling the	809	* But this controller does not support address phase in the Read SR
807	* status register.	810	* command when doing auto-HW polling. So, disable write completion
808	*/	811	* polling on the controller's side. spinand and spi-nor will take
809	reg = readl(reg_base + CQSPI_REG_WR_COMPLETION_CTRL);	812	* care of polling the status register.
810	reg \|= CQSPI_REG_WR_DISABLE_AUTO_POLL;	813	*/
811	writel(reg, reg_base + CQSPI_REG_WR_COMPLETION_CTRL);	814	reg = readl(reg_base + CQSPI_REG_WR_COMPLETION_CTRL);
812	}	815	reg \|= CQSPI_REG_WR_DISABLE_AUTO_POLL;
		816	writel(reg, reg_base + CQSPI_REG_WR_COMPLETION_CTRL);
813		817
814	reg = readl(reg_base + CQSPI_REG_SIZE);	818	reg = readl(reg_base + CQSPI_REG_SIZE);
815	reg &= ~CQSPI_REG_SIZE_ADDRESS_MASK;	819	reg &= ~CQSPI_REG_SIZE_ADDRESS_MASK;

drivers/spi/spi-cadence.c+9−5

 		goto clk_dis_apb;
 	}
+	pm_runtime_use_autosuspend(&pdev->dev);
+	pm_runtime_set_autosuspend_delay(&pdev->dev, SPI_AUTOSUSPEND_TIMEOUT);
+	pm_runtime_get_noresume(&pdev->dev);
+	pm_runtime_set_active(&pdev->dev);
+	pm_runtime_enable(&pdev->dev);
 	ret = of_property_read_u32(pdev->dev.of_node, "num-cs", &num_cs);
 	if (ret < 0)
 		master->num_chipselect = CDNS_SPI_DEFAULT_NUM_CS;
 	/* SPI controller initializations */
 	cdns_spi_init_hw(xspi);
-	pm_runtime_set_active(&pdev->dev);
-	pm_runtime_enable(&pdev->dev);
-	pm_runtime_use_autosuspend(&pdev->dev);
-	pm_runtime_set_autosuspend_delay(&pdev->dev, SPI_AUTOSUSPEND_TIMEOUT);
 	irq = platform_get_irq(pdev, 0);
 	if (irq <= 0) {
 		ret = -ENXIO;
 	master->bits_per_word_mask = SPI_BPW_MASK(8);
+	pm_runtime_mark_last_busy(&pdev->dev);
+	pm_runtime_put_autosuspend(&pdev->dev);
 	ret = spi_register_master(master);
 	if (ret) {
 		dev_err(&pdev->dev, "spi_register_master failed\n");

drivers/spi/spi-imx.c+19−19

 {
 	struct spi_device *spi = msg->spi;
 	u32 ctrl = MX51_ECSPI_CTRL_ENABLE;
-	u32 testreg;
+	u32 testreg, delay;
 	u32 cfg = readl(spi_imx->base + MX51_ECSPI_CONFIG);
 	/* set Master or Slave mode */
 	writel(cfg, spi_imx->base + MX51_ECSPI_CONFIG);
+	/*
+	 * Wait until the changes in the configuration register CONFIGREG
+	 * propagate into the hardware. It takes exactly one tick of the
+	 * SCLK clock, but we will wait two SCLK clock just to be sure. The
+	 * effect of the delay it takes for the hardware to apply changes
+	 * is noticable if the SCLK clock run very slow. In such a case, if
+	 * the polarity of SCLK should be inverted, the GPIO ChipSelect might
+	 * be asserted before the SCLK polarity changes, which would disrupt
+	 * the SPI communication as the device on the other end would consider
+	 * the change of SCLK polarity as a clock tick already.
+	 */
+	delay = (2 * 1000000) / spi_imx->spi_bus_clk;
+	if (likely(delay < 10))	/* SCLK is faster than 100 kHz */
+		udelay(delay);
+	else			/* SCLK is _very_ slow */
+		usleep_range(delay, delay + 10);
 	return 0;
 }
 				       struct spi_device *spi)
 {
 	u32 ctrl = readl(spi_imx->base + MX51_ECSPI_CTRL);
-	u32 clk, delay;
+	u32 clk;
 	/* Clear BL field and set the right value */
 	ctrl &= ~MX51_ECSPI_CTRL_BL_MASK;
 	writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL);
-	/*
-	 * Wait until the changes in the configuration register CONFIGREG
-	 * propagate into the hardware. It takes exactly one tick of the
-	 * SCLK clock, but we will wait two SCLK clock just to be sure. The
-	 * effect of the delay it takes for the hardware to apply changes
-	 * is noticable if the SCLK clock run very slow. In such a case, if
-	 * the polarity of SCLK should be inverted, the GPIO ChipSelect might
-	 * be asserted before the SCLK polarity changes, which would disrupt
-	 * the SPI communication as the device on the other end would consider
-	 * the change of SCLK polarity as a clock tick already.
-	 */
-	delay = (2 * 1000000) / clk;
-	if (likely(delay < 10))	/* SCLK is faster than 100 kHz */
-		udelay(delay);
-	else			/* SCLK is _very_ slow */
-		usleep_range(delay, delay + 10);
 	return 0;
 }

drivers/spi/spi-mt65xx.c+19−9

 	mtk_spi_setup_packet(master);
 	cnt = xfer->len / 4;
-	iowrite32_rep(mdata->base + SPI_TX_DATA_REG, xfer->tx_buf, cnt);
+	if (xfer->tx_buf)
+		iowrite32_rep(mdata->base + SPI_TX_DATA_REG, xfer->tx_buf, cnt);
+	if (xfer->rx_buf)
+		ioread32_rep(mdata->base + SPI_RX_DATA_REG, xfer->rx_buf, cnt);
 	remainder = xfer->len % 4;
 	if (remainder > 0) {
 		reg_val = 0;
-		memcpy(&reg_val, xfer->tx_buf + (cnt * 4), remainder);
+		if (xfer->tx_buf) {
-		writel(reg_val, mdata->base + SPI_TX_DATA_REG);
+			memcpy(&reg_val, xfer->tx_buf + (cnt * 4), remainder);
+			writel(reg_val, mdata->base + SPI_TX_DATA_REG);
+		}
+		if (xfer->rx_buf) {
+			reg_val = readl(mdata->base + SPI_RX_DATA_REG);
+			memcpy(xfer->rx_buf + (cnt * 4), &reg_val, remainder);
+		}
 	}
 	mtk_spi_enable_transfer(master);
 	pm_runtime_enable(&pdev->dev);
-	ret = devm_spi_register_master(&pdev->dev, master);
-	if (ret) {
-		dev_err(&pdev->dev, "failed to register master (%d)\n", ret);
-		goto err_disable_runtime_pm;
-	}
 	if (mdata->dev_comp->need_pad_sel) {
 		if (mdata->pad_num != master->num_chipselect) {
 			dev_err(&pdev->dev,
 		dev_notice(&pdev->dev, "SPI dma_set_mask(%d) failed, ret:%d\n",
 			   addr_bits, ret);
+	ret = devm_spi_register_master(&pdev->dev, master);
+	if (ret) {
+		dev_err(&pdev->dev, "failed to register master (%d)\n", ret);
+		goto err_disable_runtime_pm;
+	}
 	return 0;
 err_disable_runtime_pm:

drivers/spi/spi-stm32.c+17−7

 	ier = readl_relaxed(spi->base + STM32H7_SPI_IER);
 	mask = ier;
-	/* EOTIE is triggered on EOT, SUSP and TXC events. */
+	/*
+	 * EOTIE enables irq from EOT, SUSP and TXC events. We need to set
+	 * SUSP to acknowledge it later. TXC is automatically cleared
+	 */
 	mask |= STM32H7_SPI_SR_SUSP;
 	/*
-	 * When TXTF is set, DXPIE and TXPIE are cleared. So in case of
+	 * DXPIE is set in Full-Duplex, one IT will be raised if TXP and RXP
-	 * Full-Duplex, need to poll RXP event to know if there are remaining
+	 * are set. So in case of Full-Duplex, need to poll TXP and RXP event.
-	 * data, before disabling SPI.
 	 */
-	if (spi->rx_buf && !spi->cur_usedma)
+	if ((spi->cur_comm == SPI_FULL_DUPLEX) && !spi->cur_usedma)
-		mask |= STM32H7_SPI_SR_RXP;
+		mask |= STM32H7_SPI_SR_TXP | STM32H7_SPI_SR_RXP;
 	if (!(sr & mask)) {
 		dev_warn(spi->dev, "spurious IT (sr=0x%08x, ier=0x%08x)\n",
 		master->can_dma = stm32_spi_can_dma;
 	pm_runtime_set_active(&pdev->dev);
+	pm_runtime_get_noresume(&pdev->dev);
 	pm_runtime_enable(&pdev->dev);
 	ret = spi_register_master(master);
 err_pm_disable:
 	pm_runtime_disable(&pdev->dev);
+	pm_runtime_put_noidle(&pdev->dev);
+	pm_runtime_set_suspended(&pdev->dev);
 err_dma_release:
 	if (spi->dma_tx)
 		dma_release_channel(spi->dma_tx);
 	struct spi_master *master = platform_get_drvdata(pdev);
 	struct stm32_spi *spi = spi_master_get_devdata(master);
+	pm_runtime_get_sync(&pdev->dev);
 	spi_unregister_master(master);
 	spi->cfg->disable(spi);
+	pm_runtime_disable(&pdev->dev);
+	pm_runtime_put_noidle(&pdev->dev);
+	pm_runtime_set_suspended(&pdev->dev);
 	if (master->dma_tx)
 		dma_release_channel(master->dma_tx);
 	if (master->dma_rx)
 	clk_disable_unprepare(spi->clk);
-	pm_runtime_disable(&pdev->dev);
 	pinctrl_pm_select_sleep_state(&pdev->dev);

drivers/usb/gadget/udc/fsl_qe_udc.c+1−0

@@ -586,6 +586,7 @@ static int qe_ep_init(struct qe_udc *udc, · 585 unmodified lines
586	case USB_SPEED_FULL:	586	case USB_SPEED_FULL:
587	if (max <= 1023)	587	if (max <= 1023)
588	break;	588	break;
		589	fallthrough;
589	default:	590	default:
590	goto en_done;	591	goto en_done;
591	}	592	}

drivers/video/fbdev/core/fbmem.c+5−7

@@ -970,13 +970,11 @@ fb_set_var(struct fb_info info, struct fb_var_screeninfo var) · 969 unmodified lines
970	fb_var_to_videomode(&mode2, &info->var);	970	fb_var_to_videomode(&mode2, &info->var);
971	/* make sure we don't delete the videomode of current var */	971	/* make sure we don't delete the videomode of current var */
972	ret = fb_mode_is_equal(&mode1, &mode2);	972	ret = fb_mode_is_equal(&mode1, &mode2);
973		973	if (!ret) {
974	if (!ret)	974	ret = fbcon_mode_deleted(info, &mode1);
975	fbcon_mode_deleted(info, &mode1);	975	if (!ret)
976		976	fb_delete_videomode(&mode1, &info->modelist);
977	if (!ret)	977	}
978	fb_delete_videomode(&mode1, &info->modelist);
979
980		978
981	return ret ? -EINVAL : 0;	979	return ret ? -EINVAL : 0;
982	}	980	}

drivers/video/fbdev/xilinxfb.c+2−0

@@ -241,6 +241,8 @@ xilinx_fb_blank(int blank_mode, struct fb_info *fbi) · 240 unmodified lines
241	case FB_BLANK_POWERDOWN:	241	case FB_BLANK_POWERDOWN:
242	/* turn off panel */	242	/* turn off panel */
243	xilinx_fb_out32(drvdata, REG_CTRL, 0);	243	xilinx_fb_out32(drvdata, REG_CTRL, 0);
		244	break;
		245
244	default:	246	default:
245	break;	247	break;
246	}	248	}

fs/afs/cmservice.c+7−18

 static int afs_deliver_yfs_cb_callback(struct afs_call *);
-#define CM_NAME(name) \
-	char afs_SRXCB##name##_name[] __tracepoint_string =	\
-		"CB." #name
 /*
  * CB.CallBack operation type
  */
-static CM_NAME(CallBack);
 static const struct afs_call_type afs_SRXCBCallBack = {
-	.name		= afs_SRXCBCallBack_name,
+	.name		= "CB.CallBack",
 	.deliver	= afs_deliver_cb_callback,
 	.destructor	= afs_cm_destructor,
 	.work		= SRXAFSCB_CallBack,
 /*
  * CB.InitCallBackState operation type
  */
-static CM_NAME(InitCallBackState);
 static const struct afs_call_type afs_SRXCBInitCallBackState = {
-	.name		= afs_SRXCBInitCallBackState_name,
+	.name		= "CB.InitCallBackState",
 	.deliver	= afs_deliver_cb_init_call_back_state,
 	.destructor	= afs_cm_destructor,
 	.work		= SRXAFSCB_InitCallBackState,
 /*
  * CB.InitCallBackState3 operation type
  */
-static CM_NAME(InitCallBackState3);
 static const struct afs_call_type afs_SRXCBInitCallBackState3 = {
-	.name		= afs_SRXCBInitCallBackState3_name,
+	.name		= "CB.InitCallBackState3",
 	.deliver	= afs_deliver_cb_init_call_back_state3,
 	.destructor	= afs_cm_destructor,
 	.work		= SRXAFSCB_InitCallBackState,
 /*
  * CB.Probe operation type
  */
-static CM_NAME(Probe);
 static const struct afs_call_type afs_SRXCBProbe = {
-	.name		= afs_SRXCBProbe_name,
+	.name		= "CB.Probe",
 	.deliver	= afs_deliver_cb_probe,
 	.destructor	= afs_cm_destructor,
 	.work		= SRXAFSCB_Probe,
 /*
  * CB.ProbeUuid operation type
  */
-static CM_NAME(ProbeUuid);
 static const struct afs_call_type afs_SRXCBProbeUuid = {
-	.name		= afs_SRXCBProbeUuid_name,
+	.name		= "CB.ProbeUuid",
 	.deliver	= afs_deliver_cb_probe_uuid,
 	.destructor	= afs_cm_destructor,
 	.work		= SRXAFSCB_ProbeUuid,
 /*
  * CB.TellMeAboutYourself operation type
  */
-static CM_NAME(TellMeAboutYourself);
 static const struct afs_call_type afs_SRXCBTellMeAboutYourself = {
-	.name		= afs_SRXCBTellMeAboutYourself_name,
+	.name		= "CB.TellMeAboutYourself",
 	.deliver	= afs_deliver_cb_tell_me_about_yourself,
 	.destructor	= afs_cm_destructor,
 	.work		= SRXAFSCB_TellMeAboutYourself,
 /*
  * YFS CB.CallBack operation type
  */
-static CM_NAME(YFS_CallBack);
 static const struct afs_call_type afs_SRXYFSCB_CallBack = {
-	.name		= afs_SRXCBYFS_CallBack_name,
+	.name		= "YFSCB.CallBack",
 	.deliver	= afs_deliver_yfs_cb_callback,
 	.destructor	= afs_cm_destructor,
 	.work		= SRXAFSCB_CallBack,

fs/afs/dir.c+6−4

 		return ret;
 	}
-	ret = -ENOENT;
 	if (!cookie.found) {
 		_leave(" = -ENOENT [not found]");
 		return -ENOENT;
 		if (d_count(new_dentry) > 2) {
 			/* copy the target dentry's name */
-			ret = -ENOMEM;
 			op->rename.tmp = d_alloc(new_dentry->d_parent,
 						 &new_dentry->d_name);
-			if (!op->rename.tmp)
+			if (!op->rename.tmp) {
+				op->error = -ENOMEM;
 				goto error;
+			}
 			ret = afs_sillyrename(new_dvnode,
 					      AFS_FS_I(d_inode(new_dentry)),
 					      new_dentry, op->key);
-			if (ret)
+			if (ret) {
+				op->error = ret;
 				goto error;
+			}
 			op->dentry_2 = op->rename.tmp;
 			op->rename.rehash = NULL;

fs/afs/write.c+12−6

 	if (wbc->range_cyclic) {
 		start = mapping->writeback_index * PAGE_SIZE;
 		ret = afs_writepages_region(mapping, wbc, start, LLONG_MAX, &next);
-		if (start > 0 && wbc->nr_to_write > 0 && ret == 0)
+		if (ret == 0) {
-			ret = afs_writepages_region(mapping, wbc, 0, start,
+			mapping->writeback_index = next / PAGE_SIZE;
-						    &next);
+			if (start > 0 && wbc->nr_to_write > 0) {
-		mapping->writeback_index = next / PAGE_SIZE;
+				ret = afs_writepages_region(mapping, wbc, 0,
+							    start, &next);
+				if (ret == 0)
+					mapping->writeback_index =
+						next / PAGE_SIZE;
+			}
+		}
 	} else if (wbc->range_start == 0 && wbc->range_end == LLONG_MAX) {
 		ret = afs_writepages_region(mapping, wbc, 0, LLONG_MAX, &next);
-		if (wbc->nr_to_write > 0)
+		if (wbc->nr_to_write > 0 && ret == 0)
-			mapping->writeback_index = next;
+			mapping->writeback_index = next / PAGE_SIZE;
 	} else {
 		ret = afs_writepages_region(mapping, wbc,
 					    wbc->range_start, wbc->range_end, &next);

fs/cifs/cifs_dfs_ref.c+5−1

 		}
 	}
-	rc = dns_resolve_server_name_to_ip(name, &srvIP);
+	rc = dns_resolve_server_name_to_ip(name, &srvIP, NULL);
 	if (rc < 0) {
 		cifs_dbg(FYI, "%s: Failed to resolve server part of %s to IP: %d\n",
 			 __func__, name, rc);
 		else
 			noff = tkn_e - (sb_mountdata + off) + 1;
+		if (strncasecmp(sb_mountdata + off, "cruid=", 6) == 0) {
+			off += noff;
+			continue;
+		}
 		if (strncasecmp(sb_mountdata + off, "unc=", 4) == 0) {
 			off += noff;
 			continue;

fs/cifs/cifsglob.h+7−0

 #define SMB_ECHO_INTERVAL_MAX 600
 #define SMB_ECHO_INTERVAL_DEFAULT 60
+/* dns resolution interval in seconds */
+#define SMB_DNS_RESOLVE_INTERVAL_DEFAULT 600
 /* maximum number of PDUs in one compound */
 #define MAX_COMPOUND 5
 	/* point to the SMBD connection if RDMA is used instead of socket */
 	struct smbd_connection *smbd_conn;
 	struct delayed_work	echo; /* echo ping workqueue job */
+	struct delayed_work	resolve; /* dns resolution workqueue job */
 	char	*smallbuf;	/* pointer to current "small" buffer */
 	char	*bigbuf;	/* pointer to current "big" buffer */
 	/* Total size of this PDU. Only valid from cifs_demultiplex_thread */
 	bool use_swn_dstaddr;
 	struct sockaddr_storage swn_dstaddr;
 #endif
+#ifdef CONFIG_CIFS_DFS_UPCALL
+	bool is_dfs_conn; /* if a dfs connection */
+#endif
 };
 struct cifs_credits {

fs/cifs/connect.c+99−11

 	int rc;
 	int len;
 	char *unc, *ipaddr = NULL;
+	time64_t expiry, now;
+	unsigned long ttl = SMB_DNS_RESOLVE_INTERVAL_DEFAULT;
 	if (!server->hostname)
 		return -EINVAL;
 	}
 	scnprintf(unc, len, "\\\\%s", server->hostname);
-	rc = dns_resolve_server_name_to_ip(unc, &ipaddr);
+	rc = dns_resolve_server_name_to_ip(unc, &ipaddr, &expiry);
 	kfree(unc);
 	if (rc < 0) {
 		cifs_dbg(FYI, "%s: failed to resolve server part of %s to IP: %d\n",
 			 __func__, server->hostname, rc);
-		return rc;
+		goto requeue_resolve;
 	}
 	spin_lock(&cifs_tcp_ses_lock);
 	spin_unlock(&cifs_tcp_ses_lock);
 	kfree(ipaddr);
-	return !rc ? -1 : 0;
+	/* rc == 1 means success here */
+	if (rc) {
+		now = ktime_get_real_seconds();
+		if (expiry && expiry > now)
+			/*
+			 * To make sure we don't use the cached entry, retry 1s
+			 * after expiry.
+			 */
+			ttl = (expiry - now + 1);
+	}
+	rc = !rc ? -1 : 0;
+requeue_resolve:
+	cifs_dbg(FYI, "%s: next dns resolution scheduled for %lu seconds in the future\n",
+		 __func__, ttl);
+	mod_delayed_work(cifsiod_wq, &server->resolve, (ttl * HZ));
+	return rc;
+}
+static void cifs_resolve_server(struct work_struct *work)
+{
+	int rc;
+	struct TCP_Server_Info *server = container_of(work,
+					struct TCP_Server_Info, resolve.work);
+	mutex_lock(&server->srv_mutex);
+	/*
+	 * Resolve the hostname again to make sure that IP address is up-to-date.
+	 */
+	rc = reconn_set_ipaddr_from_hostname(server);
+	if (rc) {
+		cifs_dbg(FYI, "%s: failed to resolve hostname: %d\n",
+				__func__, rc);
+	}
+	mutex_unlock(&server->srv_mutex);
 }
 #ifdef CONFIG_CIFS_DFS_UPCALL
 	spin_unlock(&cifs_tcp_ses_lock);
 	cancel_delayed_work_sync(&server->echo);
+	cancel_delayed_work_sync(&server->resolve);
 	spin_lock(&GlobalMid_Lock);
 	server->tcpStatus = CifsExiting;
 	spin_lock(&cifs_tcp_ses_lock);
 	list_for_each_entry(server, &cifs_tcp_ses_list, tcp_ses_list) {
+#ifdef CONFIG_CIFS_DFS_UPCALL
+		/*
+		 * DFS failover implementation in cifs_reconnect() requires unique tcp sessions for
+		 * DFS connections to do failover properly, so avoid sharing them with regular
+		 * shares or even links that may connect to same server but having completely
+		 * different failover targets.
+		 */
+		if (server->is_dfs_conn)
+			continue;
+#endif
 		/*
 		 * Skip ses channels since they're only handled in lower layers
 		 * (e.g. cifs_send_recv).
 		return;
 	}
+	/* srv_count can never go negative */
+	WARN_ON(server->srv_count < 0);
 	put_net(cifs_net_ns(server));
 	list_del_init(&server->tcp_ses_list);
 	spin_unlock(&cifs_tcp_ses_lock);
 	cancel_delayed_work_sync(&server->echo);
+	cancel_delayed_work_sync(&server->resolve);
 	if (from_reconnect)
 		/*
 	INIT_LIST_HEAD(&tcp_ses->tcp_ses_list);
 	INIT_LIST_HEAD(&tcp_ses->smb_ses_list);
 	INIT_DELAYED_WORK(&tcp_ses->echo, cifs_echo_request);
+	INIT_DELAYED_WORK(&tcp_ses->resolve, cifs_resolve_server);
 	INIT_DELAYED_WORK(&tcp_ses->reconnect, smb2_reconnect_server);
 	mutex_init(&tcp_ses->reconnect_mutex);
 	memcpy(&tcp_ses->srcaddr, &ctx->srcaddr,
 	/* queue echo request delayed work */
 	queue_delayed_work(cifsiod_wq, &tcp_ses->echo, tcp_ses->echo_interval);
+	/* queue dns resolution delayed work */
+	cifs_dbg(FYI, "%s: next dns resolution scheduled for %d seconds in the future\n",
+		 __func__, SMB_DNS_RESOLVE_INTERVAL_DEFAULT);
+	queue_delayed_work(cifsiod_wq, &tcp_ses->resolve, (SMB_DNS_RESOLVE_INTERVAL_DEFAULT * HZ));
 	return tcp_ses;
 out_err_crypto_release:
 	}
 	spin_unlock(&cifs_tcp_ses_lock);
+	/* ses_count can never go negative */
+	WARN_ON(ses->ses_count < 0);
 	spin_lock(&GlobalMid_Lock);
 	if (ses->status == CifsGood)
 		ses->status = CifsExiting;
 		return;
 	}
+	/* tc_count can never go negative */
+	WARN_ON(tcon->tc_count < 0);
 	if (tcon->use_witness) {
 		int rc;
 }
 #ifdef CONFIG_CIFS_DFS_UPCALL
+static int mount_get_dfs_conns(struct smb3_fs_context *ctx, struct cifs_sb_info *cifs_sb,
+			       unsigned int *xid, struct TCP_Server_Info **nserver,
+			       struct cifs_ses **nses, struct cifs_tcon **ntcon)
+{
+	int rc;
+	ctx->nosharesock = true;
+	rc = mount_get_conns(ctx, cifs_sb, xid, nserver, nses, ntcon);
+	if (*nserver) {
+		cifs_dbg(FYI, "%s: marking tcp session as a dfs connection\n", __func__);
+		spin_lock(&cifs_tcp_ses_lock);
+		(*nserver)->is_dfs_conn = true;
+		spin_unlock(&cifs_tcp_ses_lock);
+	}
+	return rc;
+}
 /*
  * cifs_build_path_to_root returns full path to root when we do not have an
  * existing connection (tcon)
 			 tmp_ctx.prepath);
 		mount_put_conns(cifs_sb, *xid, *server, *ses, *tcon);
-		rc = mount_get_conns(&tmp_ctx, cifs_sb, xid, server, ses, tcon);
+		rc = mount_get_dfs_conns(&tmp_ctx, cifs_sb, xid, server, ses, tcon);
 		if (!rc || (*server && *ses)) {
 			/*
 			 * We were able to connect to new target server. Update current context with
 			goto error;
 	}
-	ctx->nosharesock = true;
+	mount_put_conns(cifs_sb, xid, server, ses, tcon);
+	/*
+	 * Ignore error check here because we may failover to other targets from cached a
+	 * referral.
+	 */
+	(void)mount_get_dfs_conns(ctx, cifs_sb, &xid, &server, &ses, &tcon);
 	/* Get path of DFS root */
 	ref_path = build_unc_path_to_root(ctx, cifs_sb, false);
 		/* Connect to new DFS target only if we were redirected */
 		if (oldmnt != cifs_sb->ctx->mount_options) {
 			mount_put_conns(cifs_sb, xid, server, ses, tcon);
-			rc = mount_get_conns(ctx, cifs_sb, &xid, &server, &ses, &tcon);
+			rc = mount_get_dfs_conns(ctx, cifs_sb, &xid, &server, &ses, &tcon);
 		}
 		if (rc && !server && !ses) {
 			/* Failed to connect. Try to connect to other targets in the referral. */
 			rc = -ELOOP;
 	} while (rc == -EREMOTE);
-	if (rc || !tcon)
+	if (rc || !tcon || !ses)
 		goto error;
 	kfree(ref_path);
 	if (!tree)
 		return -ENOMEM;
-	if (!tcon->dfs_path) {
+	/* If it is not dfs or there was no cached dfs referral, then reconnect to same share */
+	if (!tcon->dfs_path || dfs_cache_noreq_find(tcon->dfs_path + 1, &ref, &tl)) {
 		if (tcon->ipc) {
 			scnprintf(tree, MAX_TREE_SIZE, "\\\\%s\\IPC$", server->hostname);
 			rc = ops->tree_connect(xid, tcon->ses, tree, tcon, nlsc);
 		goto out;
 	}
-	rc = dfs_cache_noreq_find(tcon->dfs_path + 1, &ref, &tl);
-	if (rc)
-		goto out;
 	isroot = ref.server_type == DFS_TYPE_ROOT;
 	free_dfs_info_param(&ref);

fs/cifs/dns_resolve.c+6−4

  * dns_resolve_server_name_to_ip - Resolve UNC server name to ip address.
  * @unc: UNC path specifying the server (with '/' as delimiter)
  * @ip_addr: Where to return the IP address.
+ * @expiry: Where to return the expiry time for the dns record.
  *
  * The IP address will be returned in string form, and the caller is
  * responsible for freeing it.
  * Returns length of result on success, -ve on error.
  */
 int
-dns_resolve_server_name_to_ip(const char *unc, char **ip_addr)
+dns_resolve_server_name_to_ip(const char *unc, char **ip_addr, time64_t *expiry)
 {
 	struct sockaddr_storage ss;
 	const char *hostname, *sep;
 	/* Perform the upcall */
 	rc = dns_query(current->nsproxy->net_ns, NULL, hostname, len,
-		       NULL, ip_addr, NULL, false);
+		       NULL, ip_addr, expiry, false);
 	if (rc < 0)
 		cifs_dbg(FYI, "%s: unable to resolve: %*.*s\n",
 			 __func__, len, len, hostname);
 	else
-		cifs_dbg(FYI, "%s: resolved: %*.*s to %s\n",
+		cifs_dbg(FYI, "%s: resolved: %*.*s to %s expiry %llu\n",
-			 __func__, len, len, hostname, *ip_addr);
+			 __func__, len, len, hostname, *ip_addr,
+			 expiry ? (*expiry) : 0);
 	return rc;
 name_is_IP_address:

fs/cifs/dns_resolve.h+1−1

@@ -12,7 +12,7 @@ · 11 unmodified lines
12	#define _DNS_RESOLVE_H	12	#define _DNS_RESOLVE_H
13		13
14	#ifdef __KERNEL__	14	#ifdef __KERNEL__
15	extern int dns_resolve_server_name_to_ip(const char unc, char *ip_addr);	15	extern int dns_resolve_server_name_to_ip(const char unc, char ip_addr, time64_t expiry);
16	#endif /* KERNEL */	16	#endif /* KERNEL */
17		17
18	#endif /* _DNS_RESOLVE_H */	18	#endif /* _DNS_RESOLVE_H */

fs/cifs/misc.c+1−1

@@ -1187,7 +1187,7 @@ int match_target_ip(struct TCP_Server_Info *server, · 1186 unmodified lines
1187		1187
1188	cifs_dbg(FYI, "%s: target name: %s\n", __func__, target + 2);	1188	cifs_dbg(FYI, "%s: target name: %s\n", __func__, target + 2);
1189		1189
1190	rc = dns_resolve_server_name_to_ip(target, &tip);	1190	rc = dns_resolve_server_name_to_ip(target, &tip, NULL);
1191	if (rc < 0)	1191	if (rc < 0)
1192	goto out;	1192	goto out;
1193		1193

fs/cifs/smb2ops.c+4−2

 	p = buf;
 	while (bytes_left >= sizeof(*p)) {
 		info->speed = le64_to_cpu(p->LinkSpeed);
-		info->rdma_capable = le32_to_cpu(p->Capability & RDMA_CAPABLE);
+		info->rdma_capable = le32_to_cpu(p->Capability & RDMA_CAPABLE) ? 1 : 0;
-		info->rss_capable = le32_to_cpu(p->Capability & RSS_CAPABLE);
+		info->rss_capable = le32_to_cpu(p->Capability & RSS_CAPABLE) ? 1 : 0;
 		cifs_dbg(FYI, "%s: adding iface %zu\n", __func__, *iface_count);
 		cifs_dbg(FYI, "%s: speed %zu bps\n", __func__, info->speed);
 		/* ipc tcons are not refcounted */
 		spin_lock(&cifs_tcp_ses_lock);
 		tcon->tc_count--;
+		/* tc_count can never go negative */
+		WARN_ON(tcon->tc_count < 0);
 		spin_unlock(&cifs_tcp_ses_lock);
 	}
 	kfree(utf16_path);

fs/cifs/smb2pdu.h+1−0

@@ -394,6 +394,7 @@ struct smb2_compression_capabilities_context { · 393 unmodified lines
394	__u16 Padding;	394	__u16 Padding;
395	__u32 Flags;	395	__u32 Flags;
396	__le16 CompressionAlgorithms[3];	396	__le16 CompressionAlgorithms[3];
		397	__u16 Pad; /* Some servers require pad to DataLen multiple of 8 */
397	/* Check if pad needed */	398	/* Check if pad needed */
398	} __packed;	399	} __packed;
399		400

fs/configfs/file.c+22−7

 	}
 	pr_debug("%s: count = %zd, pos = %lld, buf = %s\n",
 		 __func__, iov_iter_count(to), iocb->ki_pos, buffer->page);
-	retval = copy_to_iter(buffer->page, buffer->count, to);
+	if (iocb->ki_pos >= buffer->count)
+		goto out;
+	retval = copy_to_iter(buffer->page + iocb->ki_pos,
+			      buffer->count - iocb->ki_pos, to);
 	iocb->ki_pos += retval;
 	if (retval == 0)
 		retval = -EFAULT;
 		buffer->needs_read_fill = 0;
 	}
-	retval = copy_to_iter(buffer->bin_buffer, buffer->bin_buffer_size, to);
+	if (iocb->ki_pos >= buffer->bin_buffer_size)
+		goto out;
+	retval = copy_to_iter(buffer->bin_buffer + iocb->ki_pos,
+			      buffer->bin_buffer_size - iocb->ki_pos, to);
 	iocb->ki_pos += retval;
 	if (retval == 0)
 		retval = -EFAULT;
 	return retval;
 }
-static int fill_write_buffer(struct configfs_buffer *buffer,
+/* Fill [buffer, buffer + pos) with data coming from @from. */
+static int fill_write_buffer(struct configfs_buffer *buffer, loff_t pos,
 			     struct iov_iter *from)
 {
+	loff_t to_copy;
 	int copied;
+	u8 *to;
 	if (!buffer->page)
 		buffer->page = (char *)__get_free_pages(GFP_KERNEL, 0);
 	if (!buffer->page)
 		return -ENOMEM;
-	copied = copy_from_iter(buffer->page, SIMPLE_ATTR_SIZE - 1, from);
+	to_copy = SIMPLE_ATTR_SIZE - 1 - pos;
+	if (to_copy <= 0)
+		return 0;
+	to = buffer->page + pos;
+	copied = copy_from_iter(to, to_copy, from);
 	buffer->needs_read_fill = 1;
 	/* if buf is assumed to contain a string, terminate it by \0,
 	 * so e.g. sscanf() can scan the string easily */
-	buffer->page[copied] = 0;
+	to[copied] = 0;
 	return copied ? : -EFAULT;
 }
 	ssize_t len;
 	mutex_lock(&buffer->mutex);
-	len = fill_write_buffer(buffer, from);
+	len = fill_write_buffer(buffer, iocb->ki_pos, from);
 	if (len > 0)
 		len = flush_write_buffer(file, buffer, len);
 	if (len > 0)
 		buffer->bin_buffer_size = end_offset;
 	}
-	len = copy_from_iter(buffer->bin_buffer, buffer->bin_buffer_size, from);
+	len = copy_from_iter(buffer->bin_buffer + iocb->ki_pos,
+			     buffer->bin_buffer_size - iocb->ki_pos, from);
+	iocb->ki_pos += len;
 out:
 	mutex_unlock(&buffer->mutex);
 	return len ? : -EFAULT;

fs/fcntl.c+1−1

 	/* 32-bit arches must use fcntl64() */
 	case F_OFD_SETLK:
 	case F_OFD_SETLKW:
-#endif
 		fallthrough;
+#endif
 	case F_SETLK:
 	case F_SETLKW:
 		if (copy_from_user(&flock, argp, sizeof(flock)))

fs/hfs/bfind.c+13−1

@@ -25,7 +25,19 @@ int hfs_find_init(struct hfs_btree tree, struct hfs_find_data fd) · 24 unmodified lines
25	fd->key = ptr + tree->max_key_len + 2;	25	fd->key = ptr + tree->max_key_len + 2;
26	hfs_dbg(BNODE_REFS, "find_init: %d (%p)\n",	26	hfs_dbg(BNODE_REFS, "find_init: %d (%p)\n",
27	tree->cnid, __builtin_return_address(0));	27	tree->cnid, __builtin_return_address(0));
28	mutex_lock(&tree->tree_lock);	28	switch (tree->cnid) {
		29	case HFS_CAT_CNID:
		30	mutex_lock_nested(&tree->tree_lock, CATALOG_BTREE_MUTEX);
		31	break;
		32	case HFS_EXT_CNID:
		33	mutex_lock_nested(&tree->tree_lock, EXTENTS_BTREE_MUTEX);
		34	break;
		35	case HFS_ATTR_CNID:
		36	mutex_lock_nested(&tree->tree_lock, ATTR_BTREE_MUTEX);
		37	break;
		38	default:
		39	return -EINVAL;
		40	}
29	return 0;	41	return 0;
30	}	42	}
31		43

fs/hfs/bnode.c+20−5

 #include "btree.h"
-void hfs_bnode_read(struct hfs_bnode *node, void *buf,
+void hfs_bnode_read(struct hfs_bnode *node, void *buf, int off, int len)
-		int off, int len)
 {
 	struct page *page;
+	int pagenum;
+	int bytes_read;
+	int bytes_to_read;
+	void *vaddr;
 	off += node->page_offset;
-	page = node->page[0];
+	pagenum = off >> PAGE_SHIFT;
+	off &= ~PAGE_MASK; /* compute page offset for the first page */
-	memcpy(buf, kmap(page) + off, len);
+	for (bytes_read = 0; bytes_read < len; bytes_read += bytes_to_read) {
-	kunmap(page);
+		if (pagenum >= node->tree->pages_per_bnode)
+			break;
+		page = node->page[pagenum];
+		bytes_to_read = min_t(int, len - bytes_read, PAGE_SIZE - off);
+		vaddr = kmap_atomic(page);
+		memcpy(buf + bytes_read, vaddr + off, bytes_to_read);
+		kunmap_atomic(vaddr);
+		pagenum++;
+		off = 0; /* page offset only applies to the first page */
+	}
 }
 u16 hfs_bnode_read_u16(struct hfs_bnode *node, int off)

fs/hfs/btree.h+7−0

@@ -13,6 +13,13 @@ typedef int (btree_keycmp)(const btree_key , const btree_key *); · 12 unmodified lines
13		13
14	#define NODE_HASH_SIZE 256	14	#define NODE_HASH_SIZE 256
15		15
		16	/* B-tree mutex nested subclasses */
		17	enum hfs_btree_mutex_classes {
		18	CATALOG_BTREE_MUTEX,
		19	EXTENTS_BTREE_MUTEX,
		20	ATTR_BTREE_MUTEX,
		21	};
		22
16	/* A HFS BTree held in memory */	23	/* A HFS BTree held in memory */
17	struct hfs_btree {	24	struct hfs_btree {
18	struct super_block *sb;	25	struct super_block *sb;

fs/hfs/super.c+5−5

 	if (!res) {
 		if (fd.entrylength > sizeof(rec) || fd.entrylength < 0) {
 			res =  -EIO;
-			goto bail;
+			goto bail_hfs_find;
 		}
 		hfs_bnode_read(fd.bnode, &rec, fd.entryoffset, fd.entrylength);
 	}
-	if (res) {
+	if (res)
-		hfs_find_exit(&fd);
+		goto bail_hfs_find;
-		goto bail_no_root;
-	}
 	res = -EINVAL;
 	root_inode = hfs_iget(sb, &fd.search_key->cat, &rec);
 	hfs_find_exit(&fd);
 	/* everything's okay */
 	return 0;
+bail_hfs_find:
+	hfs_find_exit(&fd);
 bail_no_root:
 	pr_err("get root inode failed\n");
 bail:

fs/io_uring.c+5−3

 	/* ctx stays valid until unlock, even if we drop all ours ctx->refs */
 	mutex_lock(&ctx->uring_lock);
-	if (!(current->flags & PF_EXITING) && !current->in_execve)
+	if (!(req->task->flags & PF_EXITING) && !req->task->in_execve)
 		__io_queue_sqe(req);
 	else
 		io_req_complete_failed(req, -EFAULT);
 	ret = io_req_prep_async(req);
 	if (ret)
-		return ret;
+		goto fail;
 	io_prep_async_link(req);
 	de = kmalloc(sizeof(*de), GFP_KERNEL);
 	if (!de) {
-		io_req_complete_failed(req, -ENOMEM);
+		ret = -ENOMEM;
+fail:
+		io_req_complete_failed(req, ret);
 		return true;
 	}

fs/iomap/buffered-io.c+4−4

 	if (PageUptodate(page))
 		return;
+	BUG_ON(page_has_private(page));
 	BUG_ON(page->index);
 	BUG_ON(size > PAGE_SIZE - offset_in_page(iomap->inline_data));
 {
 	struct iomap_readpage_ctx *ctx = data;
 	struct page *page = ctx->cur_page;
-	struct iomap_page *iop = iomap_page_create(inode, page);
+	struct iomap_page *iop;
 	bool same_page = false, is_contig = false;
 	loff_t orig_pos = pos;
 	unsigned poff, plen;
 	}
 	/* zero post-eof blocks as the page may be mapped */
+	iop = iomap_page_create(inode, page);
 	iomap_adjust_read_range(inode, iop, &pos, length, &poff, &plen);
 	if (plen == 0)
 		goto done;
 		block_commit_write(page, 0, length);
 	} else {
 		WARN_ON_ONCE(!PageUptodate(page));
-		iomap_page_create(inode, page);
 		set_page_dirty(page);
 	}
 		struct writeback_control *wbc, struct inode *inode,
 		struct page *page, u64 end_offset)
 {
-	struct iomap_page *iop = to_iomap_page(page);
+	struct iomap_page *iop = iomap_page_create(inode, page);
 	struct iomap_ioend *ioend, *next;
 	unsigned len = i_blocksize(inode);
 	u64 file_offset; /* file offset of page */
 	int error = 0, count = 0, i;
 	LIST_HEAD(submit_list);
-	WARN_ON_ONCE(i_blocks_per_page(inode, page) > 1 && !iop);
 	WARN_ON_ONCE(iop && atomic_read(&iop->write_bytes_pending) != 0);
 	/*

fs/iomap/seek.c+9−16

 iomap_seek_hole(struct inode *inode, loff_t offset, const struct iomap_ops *ops)
 {
 	loff_t size = i_size_read(inode);
-	loff_t length = size - offset;
 	loff_t ret;
 	/* Nothing to be found before or beyond the end of the file. */
 	if (offset < 0 || offset >= size)
 		return -ENXIO;
-	while (length > 0) {
+	while (offset < size) {
-		ret = iomap_apply(inode, offset, length, IOMAP_REPORT, ops,
+		ret = iomap_apply(inode, offset, size - offset, IOMAP_REPORT,
-				  &offset, iomap_seek_hole_actor);
+				  ops, &offset, iomap_seek_hole_actor);
 		if (ret < 0)
 			return ret;
 		if (ret == 0)
 			break;
 		offset += ret;
-		length -= ret;
 	}
 	return offset;
 iomap_seek_data(struct inode *inode, loff_t offset, const struct iomap_ops *ops)
 {
 	loff_t size = i_size_read(inode);
-	loff_t length = size - offset;
 	loff_t ret;
 	/* Nothing to be found before or beyond the end of the file. */
 	if (offset < 0 || offset >= size)
 		return -ENXIO;
-	while (length > 0) {
+	while (offset < size) {
-		ret = iomap_apply(inode, offset, length, IOMAP_REPORT, ops,
+		ret = iomap_apply(inode, offset, size - offset, IOMAP_REPORT,
-				  &offset, iomap_seek_data_actor);
+				  ops, &offset, iomap_seek_data_actor);
 		if (ret < 0)
 			return ret;
 		if (ret == 0)
-			break;
+			return offset;
 		offset += ret;
-		length -= ret;
 	}
-	if (length <= 0)
+	/* We've reached the end of the file without finding data */
-		return -ENXIO;
+	return -ENXIO;
-	return offset;
 }
 EXPORT_SYMBOL_GPL(iomap_seek_data);

fs/seq_file.c+3−0

@@ -32,6 +32,9 @@ static void seq_set_overflow(struct seq_file *m) · 31 unmodified lines
32		32
33	static void *seq_buf_alloc(unsigned long size)	33	static void *seq_buf_alloc(unsigned long size)
34	{	34	{
		35	if (unlikely(size > MAX_RW_COUNT))
		36	return NULL;
		37
35	return kvmalloc(size, GFP_KERNEL_ACCOUNT);	38	return kvmalloc(size, GFP_KERNEL_ACCOUNT);
36	}	39	}
37		40

fs/xfs/libxfs/xfs_ag.c+8−0

@@ -803,6 +803,14 @@ xfs_ag_shrink_space( · 802 unmodified lines
803		803
804	args.fsbno = XFS_AGB_TO_FSB(mp, agno, aglen - delta);	804	args.fsbno = XFS_AGB_TO_FSB(mp, agno, aglen - delta);
805		805
		806	/*
		807	* Make sure that the last inode cluster cannot overlap with the new
		808	* end of the AG, even if it's sparse.
		809	*/
		810	error = xfs_ialloc_check_shrink(*tpp, agno, agibp, aglen - delta);
		811	if (error)
		812	return error;
		813
806	/*	814	/*
807	* Disable perag reservations so it doesn't cause the allocation request	815	* Disable perag reservations so it doesn't cause the allocation request
808	* to fail. We'll reestablish reservation before we return.	816	* to fail. We'll reestablish reservation before we return.

fs/xfs/libxfs/xfs_attr.c+8−8

@@ -483,7 +483,7 @@ xfs_attr_set_iter( · 482 unmodified lines
483	if (error)	483	if (error)
484	return error;	484	return error;
485		485
486	/* fallthrough */	486	fallthrough;
487	case XFS_DAS_RM_LBLK:	487	case XFS_DAS_RM_LBLK:
488	/* Set state in case xfs_attr_rmtval_remove returns -EAGAIN */	488	/* Set state in case xfs_attr_rmtval_remove returns -EAGAIN */
489	dac->dela_state = XFS_DAS_RM_LBLK;	489	dac->dela_state = XFS_DAS_RM_LBLK;
@@ -496,7 +496,7 @@ xfs_attr_set_iter( · 6 unmodified lines
496	return -EAGAIN;	496	return -EAGAIN;
497	}	497	}
498		498
499	/* fallthrough */	499	fallthrough;
500	case XFS_DAS_RD_LEAF:	500	case XFS_DAS_RD_LEAF:
501	/*	501	/*
502	* This is the last step for leaf format. Read the block with	502	* This is the last step for leaf format. Read the block with
@@ -528,7 +528,7 @@ xfs_attr_set_iter( · 25 unmodified lines
528	return error;	528	return error;
529	}	529	}
530		530
531	/* fallthrough */	531	fallthrough;
532	case XFS_DAS_ALLOC_NODE:	532	case XFS_DAS_ALLOC_NODE:
533	/*	533	/*
534	* If there was an out-of-line value, allocate the blocks we	534	* If there was an out-of-line value, allocate the blocks we
@@ -590,7 +590,7 @@ xfs_attr_set_iter( · 55 unmodified lines
590	if (error)	590	if (error)
591	return error;	591	return error;
592		592
593	/* fallthrough */	593	fallthrough;
594	case XFS_DAS_RM_NBLK:	594	case XFS_DAS_RM_NBLK:
595	/* Set state in case xfs_attr_rmtval_remove returns -EAGAIN */	595	/* Set state in case xfs_attr_rmtval_remove returns -EAGAIN */
596	dac->dela_state = XFS_DAS_RM_NBLK;	596	dac->dela_state = XFS_DAS_RM_NBLK;
@@ -603,7 +603,7 @@ xfs_attr_set_iter( · 6 unmodified lines
603	return -EAGAIN;	603	return -EAGAIN;
604	}	604	}
605		605
606	/* fallthrough */	606	fallthrough;
607	case XFS_DAS_CLR_FLAG:	607	case XFS_DAS_CLR_FLAG:
608	/*	608	/*
609	* The last state for node format. Look up the old attr and	609	* The last state for node format. Look up the old attr and
@@ -1406,7 +1406,7 @@ xfs_attr_remove_iter( · 796 unmodified lines
1406	state = dac->da_state;	1406	state = dac->da_state;
1407	}	1407	}
1408		1408
1409	/* fallthrough */	1409	fallthrough;
1410	case XFS_DAS_RMTBLK:	1410	case XFS_DAS_RMTBLK:
1411	dac->dela_state = XFS_DAS_RMTBLK;	1411	dac->dela_state = XFS_DAS_RMTBLK;
1412		1412
@@ -1441,7 +1441,7 @@ xfs_attr_remove_iter( · 28 unmodified lines
1441	return -EAGAIN;	1441	return -EAGAIN;
1442	}	1442	}
1443		1443
1444	/* fallthrough */	1444	fallthrough;
1445	case XFS_DAS_RM_NAME:	1445	case XFS_DAS_RM_NAME:
1446	/*	1446	/*
1447	* If we came here fresh from a transaction roll, reattach all	1447	* If we came here fresh from a transaction roll, reattach all
@@ -1469,7 +1469,7 @@ xfs_attr_remove_iter( · 21 unmodified lines
1469	return -EAGAIN;	1469	return -EAGAIN;
1470	}	1470	}
1471		1471
1472	/* fallthrough */	1472	fallthrough;
1473	case XFS_DAS_RM_SHRINK:	1473	case XFS_DAS_RM_SHRINK:
1474	/*	1474	/*
1475	* If the result is small enough, push it all into the inode.	1475	* If the result is small enough, push it all into the inode.

fs/xfs/libxfs/xfs_ialloc.c+55−0

@@ -2928,3 +2928,58 @@ xfs_ialloc_calc_rootino( · 2927 unmodified lines
2928		2928
2929	return XFS_AGINO_TO_INO(mp, 0, XFS_AGB_TO_AGINO(mp, first_bno));	2929	return XFS_AGINO_TO_INO(mp, 0, XFS_AGB_TO_AGINO(mp, first_bno));
2930	}	2930	}
		2931
		2932	/*
		2933	* Ensure there are not sparse inode clusters that cross the new EOAG.
		2934	*
		2935	* This is a no-op for non-spinode filesystems since clusters are always fully
		2936	* allocated and checking the bnobt suffices. However, a spinode filesystem
		2937	* could have a record where the upper inodes are free blocks. If those blocks
		2938	* were removed from the filesystem, the inode record would extend beyond EOAG,
		2939	* which will be flagged as corruption.
		2940	*/
		2941	int
		2942	xfs_ialloc_check_shrink(
		2943	struct xfs_trans *tp,
		2944	xfs_agnumber_t agno,
		2945	struct xfs_buf *agibp,
		2946	xfs_agblock_t new_length)
		2947	{
		2948	struct xfs_inobt_rec_incore rec;
		2949	struct xfs_btree_cur *cur;
		2950	struct xfs_mount *mp = tp->t_mountp;
		2951	struct xfs_perag *pag;
		2952	xfs_agino_t agino = XFS_AGB_TO_AGINO(mp, new_length);
		2953	int has;
		2954	int error;
		2955
		2956	if (!xfs_sb_version_hassparseinodes(&mp->m_sb))
		2957	return 0;
		2958
		2959	pag = xfs_perag_get(mp, agno);
		2960	cur = xfs_inobt_init_cursor(mp, tp, agibp, pag, XFS_BTNUM_INO);
		2961
		2962	/* Look up the inobt record that would correspond to the new EOFS. */
		2963	error = xfs_inobt_lookup(cur, agino, XFS_LOOKUP_LE, &has);
		2964	if (error \|\| !has)
		2965	goto out;
		2966
		2967	error = xfs_inobt_get_rec(cur, &rec, &has);
		2968	if (error)
		2969	goto out;
		2970
		2971	if (!has) {
		2972	error = -EFSCORRUPTED;
		2973	goto out;
		2974	}
		2975
		2976	/* If the record covers inodes that would be beyond EOFS, bail out. */
		2977	if (rec.ir_startino + XFS_INODES_PER_CHUNK > agino) {
		2978	error = -ENOSPC;
		2979	goto out;
		2980	}
		2981	out:
		2982	xfs_btree_del_cursor(cur, error);
		2983	xfs_perag_put(pag);
		2984	return error;
		2985	}

fs/xfs/libxfs/xfs_ialloc.h+3−0

@@ -122,4 +122,7 @@ int xfs_ialloc_cluster_alignment(struct xfs_mount *mp); · 121 unmodified lines
122	void xfs_ialloc_setup_geometry(struct xfs_mount *mp);	122	void xfs_ialloc_setup_geometry(struct xfs_mount *mp);
123	xfs_ino_t xfs_ialloc_calc_rootino(struct xfs_mount *mp, int sunit);	123	xfs_ino_t xfs_ialloc_calc_rootino(struct xfs_mount *mp, int sunit);
124		124
		125	int xfs_ialloc_check_shrink(struct xfs_trans *tp, xfs_agnumber_t agno,
		126	struct xfs_buf *agibp, xfs_agblock_t new_length);
		127
125	#endif /* __XFS_IALLOC_H__ */	128	#endif /* __XFS_IALLOC_H__ */

fs/xfs/libxfs/xfs_inode_buf.c+16−12

@@ -592,23 +592,27 @@ xfs_inode_validate_extsize( · 591 unmodified lines
592	/*	592	/*
593	* This comment describes a historic gap in this verifier function.	593	* This comment describes a historic gap in this verifier function.
594	*	594	*
595	* On older kernels, the extent size hint verifier doesn't check that	595	* For a directory with both RTINHERIT and EXTSZINHERIT flags set, this
596	* the extent size hint is an integer multiple of the realtime extent	596	* function has never checked that the extent size hint is an integer
597	* size on a directory with both RTINHERIT and EXTSZINHERIT flags set.	597	* multiple of the realtime extent size. Since we allow users to set
598	* The verifier has always enforced the alignment rule for regular	598	* this combination on non-rt filesystems /and/ to change the rt
599	* files with the REALTIME flag set.	599	* extent size when adding a rt device to a filesystem, the net effect
		600	* is that users can configure a filesystem anticipating one rt
		601	* geometry and change their minds later. Directories do not use the
		602	* extent size hint, so this is harmless for them.
600	*	603	*
601	* If a directory with a misaligned extent size hint is allowed to	604	* If a directory with a misaligned extent size hint is allowed to
602	* propagate that hint into a new regular realtime file, the result	605	* propagate that hint into a new regular realtime file, the result
603	* is that the inode cluster buffer verifier will trigger a corruption	606	* is that the inode cluster buffer verifier will trigger a corruption
604	* shutdown the next time it is run.	607	* shutdown the next time it is run, because the verifier has always
		608	* enforced the alignment rule for regular files.
605	*	609	*
606	* Unfortunately, there could be filesystems with these misconfigured	610	* Because we allow administrators to set a new rt extent size when
607	* directories in the wild, so we cannot add a check to this verifier	611	* adding a rt section, we cannot add a check to this verifier because
608	* at this time because that will result a new source of directory	612	* that will result a new source of directory corruption errors when
609	* corruption errors when reading an existing filesystem. Instead, we	613	* reading an existing filesystem. Instead, we rely on callers to
610	* permit the misconfiguration to pass through the verifiers so that	614	* decide when alignment checks are appropriate, and fix things up as
611	* callers of this function can correct and mitigate externally.	615	* needed.
612	*/	616	*/
613		617
614	if (rt_flag)	618	if (rt_flag)

fs/xfs/libxfs/xfs_trans_inode.c+4−6

 	}
 	/*
-	 * Inode verifiers on older kernels don't check that the extent size
+	 * Inode verifiers do not check that the extent size hint is an integer
-	 * hint is an integer multiple of the rt extent size on a directory
+	 * multiple of the rt extent size on a directory with both rtinherit
-	 * with both rtinherit and extszinherit flags set.  If we're logging a
+	 * and extszinherit flags set.  If we're logging a directory that is
-	 * directory that is misconfigured in this way, clear the hint.
+	 * misconfigured in this way, clear the hint.
 	 */
 	if ((ip->i_diflags & XFS_DIFLAG_RTINHERIT) &&
 	    (ip->i_diflags & XFS_DIFLAG_EXTSZINHERIT) &&
 	    (ip->i_extsize % ip->i_mount->m_sb.sb_rextsize) > 0) {
-		xfs_info_once(ip->i_mount,
-	"Correcting misaligned extent size hint in inode 0x%llx.", ip->i_ino);
 		ip->i_diflags &= ~(XFS_DIFLAG_EXTSIZE |
 				   XFS_DIFLAG_EXTSZINHERIT);
 		ip->i_extsize = 0;

fs/xfs/scrub/inode.c+16−2

@@ -73,11 +73,25 @@ xchk_inode_extsize( · 72 unmodified lines
73	uint16_t flags)	73	uint16_t flags)
74	{	74	{
75	xfs_failaddr_t fa;	75	xfs_failaddr_t fa;
		76	uint32_t value = be32_to_cpu(dip->di_extsize);
76		77
77	fa = xfs_inode_validate_extsize(sc->mp, be32_to_cpu(dip->di_extsize),	78	fa = xfs_inode_validate_extsize(sc->mp, value, mode, flags);
78	mode, flags);
79	if (fa)	79	if (fa)
80	xchk_ino_set_corrupt(sc, ino);	80	xchk_ino_set_corrupt(sc, ino);
		81
		82	/*
		83	* XFS allows a sysadmin to change the rt extent size when adding a rt
		84	* section to a filesystem after formatting. If there are any
		85	* directories with extszinherit and rtinherit set, the hint could
		86	* become misaligned with the new rextsize. The verifier doesn't check
		87	* this, because we allow rtinherit directories even without an rt
		88	* device. Flag this as an administrative warning since we will clean
		89	* this up eventually.
		90	*/
		91	if ((flags & XFS_DIFLAG_RTINHERIT) &&
		92	(flags & XFS_DIFLAG_EXTSZINHERIT) &&
		93	value % sc->mp->m_sb.sb_rextsize > 0)
		94	xchk_ino_set_warning(sc, ino);
81	}	95	}
82		96
83	/*	97	/*

fs/xfs/xfs_inode.c+13−0

@@ -2763,6 +2763,19 @@ xfs_remove( · 2762 unmodified lines
2763	error = xfs_droplink(tp, ip);	2763	error = xfs_droplink(tp, ip);
2764	if (error)	2764	if (error)
2765	goto out_trans_cancel;	2765	goto out_trans_cancel;
		2766
		2767	/*
		2768	* Point the unlinked child directory's ".." entry to the root
		2769	* directory to eliminate back-references to inodes that may
		2770	* get freed before the child directory is closed. If the fs
		2771	* gets shrunk, this can lead to dirent inode validation errors.
		2772	*/
		2773	if (dp->i_ino != tp->t_mountp->m_sb.sb_rootino) {
		2774	error = xfs_dir_replace(tp, ip, &xfs_name_dotdot,
		2775	tp->t_mountp->m_sb.sb_rootino, 0);
		2776	if (error)
		2777	return error;
		2778	}
2766	} else {	2779	} else {
2767	/*	2780	/*
2768	* When removing a non-directory we need to log the parent	2781	* When removing a non-directory we need to log the parent

fs/xfs/xfs_ioctl.c+22−5

 	fileattr_fill_xflags(fa, xfs_ip2xflags(ip));
-	fa->fsx_extsize = XFS_FSB_TO_B(mp, ip->i_extsize);
+	if (ip->i_diflags & XFS_DIFLAG_EXTSIZE) {
+		fa->fsx_extsize = XFS_FSB_TO_B(mp, ip->i_extsize);
+	} else if (ip->i_diflags & XFS_DIFLAG_EXTSZINHERIT) {
+		/*
+		 * Don't let a misaligned extent size hint on a directory
+		 * escape to userspace if it won't pass the setattr checks
+		 * later.
+		 */
+		if ((ip->i_diflags & XFS_DIFLAG_RTINHERIT) &&
+		    ip->i_extsize % mp->m_sb.sb_rextsize > 0) {
+			fa->fsx_xflags &= ~(FS_XFLAG_EXTSIZE |
+					    FS_XFLAG_EXTSZINHERIT);
+			fa->fsx_extsize = 0;
+		} else {
+			fa->fsx_extsize = XFS_FSB_TO_B(mp, ip->i_extsize);
+		}
+	}
 	if (ip->i_diflags2 & XFS_DIFLAG2_COWEXTSIZE)
 		fa->fsx_cowextsize = XFS_FSB_TO_B(mp, ip->i_cowextsize);
 	fa->fsx_projid = ip->i_projid;
 	new_diflags = xfs_flags2diflags(ip, fa->fsx_xflags);
 	/*
-	 * Inode verifiers on older kernels don't check that the extent size
+	 * Inode verifiers do not check that the extent size hint is an integer
-	 * hint is an integer multiple of the rt extent size on a directory
+	 * multiple of the rt extent size on a directory with both rtinherit
-	 * with both rtinherit and extszinherit flags set.  Don't let sysadmins
+	 * and extszinherit flags set.  Don't let sysadmins misconfigure
-	 * misconfigure directories.
+	 * directories.
 	 */
 	if ((new_diflags & XFS_DIFLAG_RTINHERIT) &&
 	    (new_diflags & XFS_DIFLAG_EXTSZINHERIT)) {

fs/xfs/xfs_rtalloc.c+37−12

@@ -923,16 +923,41 @@ xfs_growfs_rt( · 922 unmodified lines
923	uint8_t rsum_cache; / old summary cache */	923	uint8_t rsum_cache; / old summary cache */
924		924
925	sbp = &mp->m_sb;	925	sbp = &mp->m_sb;
926	/*	926
927	* Initial error checking.
928	*/
929	if (!capable(CAP_SYS_ADMIN))	927	if (!capable(CAP_SYS_ADMIN))
930	return -EPERM;	928	return -EPERM;
931	if (mp->m_rtdev_targp == NULL \|\| mp->m_rbmip == NULL \|\|	929
932	(nrblocks = in->newblocks) <= sbp->sb_rblocks \|\|	930	/* Needs to have been mounted with an rt device. */
933	(sbp->sb_rblocks && (in->extsize != sbp->sb_rextsize)))	931	if (!XFS_IS_REALTIME_MOUNT(mp))
		932	return -EINVAL;
		933	/*
		934	* Mount should fail if the rt bitmap/summary files don't load, but
		935	* we'll check anyway.
		936	*/
		937	if (!mp->m_rbmip \|\| !mp->m_rsumip)
		938	return -EINVAL;
		939
		940	/* Shrink not supported. */
		941	if (in->newblocks <= sbp->sb_rblocks)
		942	return -EINVAL;
		943
		944	/* Can only change rt extent size when adding rt volume. */
		945	if (sbp->sb_rblocks > 0 && in->extsize != sbp->sb_rextsize)
		946	return -EINVAL;
		947
		948	/* Range check the extent size. */
		949	if (XFS_FSB_TO_B(mp, in->extsize) > XFS_MAX_RTEXTSIZE \|\|
		950	XFS_FSB_TO_B(mp, in->extsize) < XFS_MIN_RTEXTSIZE)
934	return -EINVAL;	951	return -EINVAL;
935	if ((error = xfs_sb_validate_fsb_count(sbp, nrblocks)))	952
		953	/* Unsupported realtime features. */
		954	if (xfs_sb_version_hasrmapbt(&mp->m_sb) \|\|
		955	xfs_sb_version_hasreflink(&mp->m_sb))
		956	return -EOPNOTSUPP;
		957
		958	nrblocks = in->newblocks;
		959	error = xfs_sb_validate_fsb_count(sbp, nrblocks);
		960	if (error)
936	return error;	961	return error;
937	/*	962	/*
938	* Read in the last block of the device, make sure it exists.	963	* Read in the last block of the device, make sure it exists.
@@ -996,7 +1021,8 @@ xfs_growfs_rt( · 57 unmodified lines
996	((sbp->sb_rextents & ((1 << mp->m_blkbit_log) - 1)) != 0);	1021	((sbp->sb_rextents & ((1 << mp->m_blkbit_log) - 1)) != 0);
997	bmbno < nrbmblocks;	1022	bmbno < nrbmblocks;
998	bmbno++) {	1023	bmbno++) {
999	xfs_trans_t *tp;	1024	struct xfs_trans *tp;
		1025	xfs_rfsblock_t nrblocks_step;
1000		1026
1001	nmp = mp;	1027	nmp = mp;
1002	nsbp = &nmp->m_sb;	1028	nsbp = &nmp->m_sb;
@@ -1005,10 +1031,9 @@ xfs_growfs_rt( · 2 unmodified lines
1005	*/	1031	*/
1006	nsbp->sb_rextsize = in->extsize;	1032	nsbp->sb_rextsize = in->extsize;
1007	nsbp->sb_rbmblocks = bmbno + 1;	1033	nsbp->sb_rbmblocks = bmbno + 1;
1008	nsbp->sb_rblocks =	1034	nrblocks_step = (bmbno + 1) * NBBY * nsbp->sb_blocksize *
1009	XFS_RTMIN(nrblocks,	1035	nsbp->sb_rextsize;
1010	nsbp->sb_rbmblocks * NBBY *	1036	nsbp->sb_rblocks = min(nrblocks, nrblocks_step);
1011	nsbp->sb_blocksize * nsbp->sb_rextsize);
1012	nsbp->sb_rextents = nsbp->sb_rblocks;	1037	nsbp->sb_rextents = nsbp->sb_rblocks;
1013	do_div(nsbp->sb_rextents, nsbp->sb_rextsize);	1038	do_div(nsbp->sb_rextents, nsbp->sb_rextsize);
1014	ASSERT(nsbp->sb_rextents != 0);	1039	ASSERT(nsbp->sb_rextents != 0);

fs/zonefs/super.c+0−3

@@ -705,9 +705,6 @@ static ssize_t zonefs_file_dio_append(struct kiocb iocb, struct iov_iter from) · 704 unmodified lines
705	return 0;	705	return 0;
706		706
707	bio = bio_alloc(GFP_NOFS, nr_pages);	707	bio = bio_alloc(GFP_NOFS, nr_pages);
708	if (!bio)
709	return -ENOMEM;
710
711	bio_set_dev(bio, bdev);	708	bio_set_dev(bio, bdev);
712	bio->bi_iter.bi_sector = zi->i_zsector;	709	bio->bi_iter.bi_sector = zi->i_zsector;
713	bio->bi_write_hint = iocb->ki_hint;	710	bio->bi_write_hint = iocb->ki_hint;

include/dt-bindings/clock/r9a07g044-cpg.h+183−53

@@ -32,58 +32,188 @@ · 31 unmodified lines
32	#define R9A07G044_OSCCLK 21	32	#define R9A07G044_OSCCLK 21
33		33
34	/* R9A07G044 Module Clocks */	34	/* R9A07G044 Module Clocks */
35	#define R9A07G044_CLK_GIC600 0	35	#define R9A07G044_CA55_SCLK 0
36	#define R9A07G044_CLK_IA55 1	36	#define R9A07G044_CA55_PCLK 1
37	#define R9A07G044_CLK_SYC 2	37	#define R9A07G044_CA55_ATCLK 2
38	#define R9A07G044_CLK_DMAC 3	38	#define R9A07G044_CA55_GICCLK 3
39	#define R9A07G044_CLK_SYSC 4	39	#define R9A07G044_CA55_PERICLK 4
40	#define R9A07G044_CLK_MTU 5	40	#define R9A07G044_CA55_ACLK 5
41	#define R9A07G044_CLK_GPT 6	41	#define R9A07G044_CA55_TSCLK 6
42	#define R9A07G044_CLK_ETH0 7	42	#define R9A07G044_GIC600_GICCLK 7
43	#define R9A07G044_CLK_ETH1 8	43	#define R9A07G044_IA55_CLK 8
44	#define R9A07G044_CLK_I2C0 9	44	#define R9A07G044_IA55_PCLK 9
45	#define R9A07G044_CLK_I2C1 10	45	#define R9A07G044_MHU_PCLK 10
46	#define R9A07G044_CLK_I2C2 11	46	#define R9A07G044_SYC_CNT_CLK 11
47	#define R9A07G044_CLK_I2C3 12	47	#define R9A07G044_DMAC_ACLK 12
48	#define R9A07G044_CLK_SCIF0 13	48	#define R9A07G044_DMAC_PCLK 13
49	#define R9A07G044_CLK_SCIF1 14	49	#define R9A07G044_OSTM0_PCLK 14
50	#define R9A07G044_CLK_SCIF2 15	50	#define R9A07G044_OSTM1_PCLK 15
51	#define R9A07G044_CLK_SCIF3 16	51	#define R9A07G044_OSTM2_PCLK 16
52	#define R9A07G044_CLK_SCIF4 17	52	#define R9A07G044_MTU_X_MCK_MTU3 17
53	#define R9A07G044_CLK_SCI0 18	53	#define R9A07G044_POE3_CLKM_POE 18
54	#define R9A07G044_CLK_SCI1 19	54	#define R9A07G044_GPT_PCLK 19
55	#define R9A07G044_CLK_GPIO 20	55	#define R9A07G044_POEG_A_CLKP 20
56	#define R9A07G044_CLK_SDHI0 21	56	#define R9A07G044_POEG_B_CLKP 21
57	#define R9A07G044_CLK_SDHI1 22	57	#define R9A07G044_POEG_C_CLKP 22
58	#define R9A07G044_CLK_USB0 23	58	#define R9A07G044_POEG_D_CLKP 23
59	#define R9A07G044_CLK_USB1 24	59	#define R9A07G044_WDT0_PCLK 24
60	#define R9A07G044_CLK_CANFD 25	60	#define R9A07G044_WDT0_CLK 25
61	#define R9A07G044_CLK_SSI0 26	61	#define R9A07G044_WDT1_PCLK 26
62	#define R9A07G044_CLK_SSI1 27	62	#define R9A07G044_WDT1_CLK 27
63	#define R9A07G044_CLK_SSI2 28	63	#define R9A07G044_WDT2_PCLK 28
64	#define R9A07G044_CLK_SSI3 29	64	#define R9A07G044_WDT2_CLK 29
65	#define R9A07G044_CLK_MHU 30	65	#define R9A07G044_SPI_CLK2 30
66	#define R9A07G044_CLK_OSTM0 31	66	#define R9A07G044_SPI_CLK 31
67	#define R9A07G044_CLK_OSTM1 32	67	#define R9A07G044_SDHI0_IMCLK 32
68	#define R9A07G044_CLK_OSTM2 33	68	#define R9A07G044_SDHI0_IMCLK2 33
69	#define R9A07G044_CLK_WDT0 34	69	#define R9A07G044_SDHI0_CLK_HS 34
70	#define R9A07G044_CLK_WDT1 35	70	#define R9A07G044_SDHI0_ACLK 35
71	#define R9A07G044_CLK_WDT2 36	71	#define R9A07G044_SDHI1_IMCLK 36
72	#define R9A07G044_CLK_WDT_PON 37	72	#define R9A07G044_SDHI1_IMCLK2 37
73	#define R9A07G044_CLK_GPU 38	73	#define R9A07G044_SDHI1_CLK_HS 38
74	#define R9A07G044_CLK_ISU 39	74	#define R9A07G044_SDHI1_ACLK 39
75	#define R9A07G044_CLK_H264 40	75	#define R9A07G044_GPU_CLK 40
76	#define R9A07G044_CLK_CRU 41	76	#define R9A07G044_GPU_AXI_CLK 41
77	#define R9A07G044_CLK_MIPI_DSI 42	77	#define R9A07G044_GPU_ACE_CLK 42
78	#define R9A07G044_CLK_LCDC 43	78	#define R9A07G044_ISU_ACLK 43
79	#define R9A07G044_CLK_SRC 44	79	#define R9A07G044_ISU_PCLK 44
80	#define R9A07G044_CLK_RSPI0 45	80	#define R9A07G044_H264_CLK_A 45
81	#define R9A07G044_CLK_RSPI1 46	81	#define R9A07G044_H264_CLK_P 46
82	#define R9A07G044_CLK_RSPI2 47	82	#define R9A07G044_CRU_SYSCLK 47
83	#define R9A07G044_CLK_ADC 48	83	#define R9A07G044_CRU_VCLK 48
84	#define R9A07G044_CLK_TSU_PCLK 49	84	#define R9A07G044_CRU_PCLK 49
85	#define R9A07G044_CLK_SPI 50	85	#define R9A07G044_CRU_ACLK 50
86	#define R9A07G044_CLK_MIPI_DSI_V 51	86	#define R9A07G044_MIPI_DSI_PLLCLK 51
87	#define R9A07G044_CLK_MIPI_DSI_PIN 52	87	#define R9A07G044_MIPI_DSI_SYSCLK 52
		88	#define R9A07G044_MIPI_DSI_ACLK 53
		89	#define R9A07G044_MIPI_DSI_PCLK 54
		90	#define R9A07G044_MIPI_DSI_VCLK 55
		91	#define R9A07G044_MIPI_DSI_LPCLK 56
		92	#define R9A07G044_LCDC_CLK_A 57
		93	#define R9A07G044_LCDC_CLK_P 58
		94	#define R9A07G044_LCDC_CLK_D 59
		95	#define R9A07G044_SSI0_PCLK2 60
		96	#define R9A07G044_SSI0_PCLK_SFR 61
		97	#define R9A07G044_SSI1_PCLK2 62
		98	#define R9A07G044_SSI1_PCLK_SFR 63
		99	#define R9A07G044_SSI2_PCLK2 64
		100	#define R9A07G044_SSI2_PCLK_SFR 65
		101	#define R9A07G044_SSI3_PCLK2 66
		102	#define R9A07G044_SSI3_PCLK_SFR 67
		103	#define R9A07G044_SRC_CLKP 68
		104	#define R9A07G044_USB_U2H0_HCLK 69
		105	#define R9A07G044_USB_U2H1_HCLK 70
		106	#define R9A07G044_USB_U2P_EXR_CPUCLK 71
		107	#define R9A07G044_USB_PCLK 72
		108	#define R9A07G044_ETH0_CLK_AXI 73
		109	#define R9A07G044_ETH0_CLK_CHI 74
		110	#define R9A07G044_ETH1_CLK_AXI 75
		111	#define R9A07G044_ETH1_CLK_CHI 76
		112	#define R9A07G044_I2C0_PCLK 77
		113	#define R9A07G044_I2C1_PCLK 78
		114	#define R9A07G044_I2C2_PCLK 79
		115	#define R9A07G044_I2C3_PCLK 80
		116	#define R9A07G044_SCIF0_CLK_PCK 81
		117	#define R9A07G044_SCIF1_CLK_PCK 82
		118	#define R9A07G044_SCIF2_CLK_PCK 83
		119	#define R9A07G044_SCIF3_CLK_PCK 84
		120	#define R9A07G044_SCIF4_CLK_PCK 85
		121	#define R9A07G044_SCI0_CLKP 86
		122	#define R9A07G044_SCI1_CLKP 87
		123	#define R9A07G044_IRDA_CLKP 88
		124	#define R9A07G044_RSPI0_CLKB 89
		125	#define R9A07G044_RSPI1_CLKB 90
		126	#define R9A07G044_RSPI2_CLKB 91
		127	#define R9A07G044_CANFD_PCLK 92
		128	#define R9A07G044_GPIO_HCLK 93
		129	#define R9A07G044_ADC_ADCLK 94
		130	#define R9A07G044_ADC_PCLK 95
		131	#define R9A07G044_TSU_PCLK 96
		132
		133	/* R9A07G044 Resets */
		134	#define R9A07G044_CA55_RST_1_0 0
		135	#define R9A07G044_CA55_RST_1_1 1
		136	#define R9A07G044_CA55_RST_3_0 2
		137	#define R9A07G044_CA55_RST_3_1 3
		138	#define R9A07G044_CA55_RST_4 4
		139	#define R9A07G044_CA55_RST_5 5
		140	#define R9A07G044_CA55_RST_6 6
		141	#define R9A07G044_CA55_RST_7 7
		142	#define R9A07G044_CA55_RST_8 8
		143	#define R9A07G044_CA55_RST_9 9
		144	#define R9A07G044_CA55_RST_10 10
		145	#define R9A07G044_CA55_RST_11 11
		146	#define R9A07G044_CA55_RST_12 12
		147	#define R9A07G044_GIC600_GICRESET_N 13
		148	#define R9A07G044_GIC600_DBG_GICRESET_N 14
		149	#define R9A07G044_IA55_RESETN 15
		150	#define R9A07G044_MHU_RESETN 16
		151	#define R9A07G044_DMAC_ARESETN 17
		152	#define R9A07G044_DMAC_RST_ASYNC 18
		153	#define R9A07G044_SYC_RESETN 19
		154	#define R9A07G044_OSTM0_PRESETZ 20
		155	#define R9A07G044_OSTM1_PRESETZ 21
		156	#define R9A07G044_OSTM2_PRESETZ 22
		157	#define R9A07G044_MTU_X_PRESET_MTU3 23
		158	#define R9A07G044_POE3_RST_M_REG 24
		159	#define R9A07G044_GPT_RST_C 25
		160	#define R9A07G044_POEG_A_RST 26
		161	#define R9A07G044_POEG_B_RST 27
		162	#define R9A07G044_POEG_C_RST 28
		163	#define R9A07G044_POEG_D_RST 29
		164	#define R9A07G044_WDT0_PRESETN 30
		165	#define R9A07G044_WDT1_PRESETN 31
		166	#define R9A07G044_WDT2_PRESETN 32
		167	#define R9A07G044_SPI_RST 33
		168	#define R9A07G044_SDHI0_IXRST 34
		169	#define R9A07G044_SDHI1_IXRST 35
		170	#define R9A07G044_GPU_RESETN 36
		171	#define R9A07G044_GPU_AXI_RESETN 37
		172	#define R9A07G044_GPU_ACE_RESETN 38
		173	#define R9A07G044_ISU_ARESETN 39
		174	#define R9A07G044_ISU_PRESETN 40
		175	#define R9A07G044_H264_X_RESET_VCP 41
		176	#define R9A07G044_H264_CP_PRESET_P 42
		177	#define R9A07G044_CRU_CMN_RSTB 43
		178	#define R9A07G044_CRU_PRESETN 44
		179	#define R9A07G044_CRU_ARESETN 45
		180	#define R9A07G044_MIPI_DSI_CMN_RSTB 46
		181	#define R9A07G044_MIPI_DSI_ARESET_N 47
		182	#define R9A07G044_MIPI_DSI_PRESET_N 48
		183	#define R9A07G044_LCDC_RESET_N 49
		184	#define R9A07G044_SSI0_RST_M2_REG 50
		185	#define R9A07G044_SSI1_RST_M2_REG 51
		186	#define R9A07G044_SSI2_RST_M2_REG 52
		187	#define R9A07G044_SSI3_RST_M2_REG 53
		188	#define R9A07G044_SRC_RST 54
		189	#define R9A07G044_USB_U2H0_HRESETN 55
		190	#define R9A07G044_USB_U2H1_HRESETN 56
		191	#define R9A07G044_USB_U2P_EXL_SYSRST 57
		192	#define R9A07G044_USB_PRESETN 58
		193	#define R9A07G044_ETH0_RST_HW_N 59
		194	#define R9A07G044_ETH1_RST_HW_N 60
		195	#define R9A07G044_I2C0_MRST 61
		196	#define R9A07G044_I2C1_MRST 62
		197	#define R9A07G044_I2C2_MRST 63
		198	#define R9A07G044_I2C3_MRST 64
		199	#define R9A07G044_SCIF0_RST_SYSTEM_N 65
		200	#define R9A07G044_SCIF1_RST_SYSTEM_N 66
		201	#define R9A07G044_SCIF2_RST_SYSTEM_N 67
		202	#define R9A07G044_SCIF3_RST_SYSTEM_N 68
		203	#define R9A07G044_SCIF4_RST_SYSTEM_N 69
		204	#define R9A07G044_SCI0_RST 70
		205	#define R9A07G044_SCI1_RST 71
		206	#define R9A07G044_IRDA_RST 72
		207	#define R9A07G044_RSPI0_RST 73
		208	#define R9A07G044_RSPI1_RST 74
		209	#define R9A07G044_RSPI2_RST 75
		210	#define R9A07G044_CANFD_RSTP_N 76
		211	#define R9A07G044_CANFD_RSTC_N 77
		212	#define R9A07G044_GPIO_RSTN 78
		213	#define R9A07G044_GPIO_PORT_RESETN 79
		214	#define R9A07G044_GPIO_SPARE_RESETN 80
		215	#define R9A07G044_ADC_PRESETN 81
		216	#define R9A07G044_ADC_ADRST_N 82
		217	#define R9A07G044_TSU_PRESETN 83
88		218
89	#endif /* __DT_BINDINGS_CLOCK_R9A07G044_CPG_H__ */	219	#endif /* __DT_BINDINGS_CLOCK_R9A07G044_CPG_H__ */

include/linux/kasan.h+1−0

@@ -3,6 +3,7 @@ · 2 unmodified lines
3	#define _LINUX_KASAN_H	3	#define _LINUX_KASAN_H
4		4
5	#include <linux/bug.h>	5	#include <linux/bug.h>
		6	#include <linux/kernel.h>
6	#include <linux/static_key.h>	7	#include <linux/static_key.h>
7	#include <linux/types.h>	8	#include <linux/types.h>
8		9

include/linux/mfd/rt5033-private.h+2−2

@@ -200,13 +200,13 @@ enum rt5033_reg { · 199 unmodified lines
200	#define RT5033_REGULATOR_BUCK_VOLTAGE_MIN 1000000U	200	#define RT5033_REGULATOR_BUCK_VOLTAGE_MIN 1000000U
201	#define RT5033_REGULATOR_BUCK_VOLTAGE_MAX 3000000U	201	#define RT5033_REGULATOR_BUCK_VOLTAGE_MAX 3000000U
202	#define RT5033_REGULATOR_BUCK_VOLTAGE_STEP 100000U	202	#define RT5033_REGULATOR_BUCK_VOLTAGE_STEP 100000U
203	#define RT5033_REGULATOR_BUCK_VOLTAGE_STEP_NUM 32	203	#define RT5033_REGULATOR_BUCK_VOLTAGE_STEP_NUM 21
204		204
205	/* RT5033 regulator LDO output voltage uV */	205	/* RT5033 regulator LDO output voltage uV */
206	#define RT5033_REGULATOR_LDO_VOLTAGE_MIN 1200000U	206	#define RT5033_REGULATOR_LDO_VOLTAGE_MIN 1200000U
207	#define RT5033_REGULATOR_LDO_VOLTAGE_MAX 3000000U	207	#define RT5033_REGULATOR_LDO_VOLTAGE_MAX 3000000U
208	#define RT5033_REGULATOR_LDO_VOLTAGE_STEP 100000U	208	#define RT5033_REGULATOR_LDO_VOLTAGE_STEP 100000U
209	#define RT5033_REGULATOR_LDO_VOLTAGE_STEP_NUM 32	209	#define RT5033_REGULATOR_LDO_VOLTAGE_STEP_NUM 19
210		210
211	/* RT5033 regulator SAFE LDO output voltage uV */	211	/* RT5033 regulator SAFE LDO output voltage uV */
212	#define RT5033_REGULATOR_SAFE_LDO_VOLTAGE 4900000U	212	#define RT5033_REGULATOR_SAFE_LDO_VOLTAGE 4900000U

include/linux/pgtable.h+1−25

@@ -1397,34 +1397,10 @@ static inline int p4d_clear_huge(p4d_t *p4d) · 1396 unmodified lines
1397	}	1397	}
1398	#endif /* !__PAGETABLE_P4D_FOLDED */	1398	#endif /* !__PAGETABLE_P4D_FOLDED */
1399		1399
1400	#ifndef __PAGETABLE_PUD_FOLDED
1401	int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot);	1400	int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot);
1402	int pud_clear_huge(pud_t *pud);
1403	#else
1404	static inline int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)
1405	{
1406	return 0;
1407	}
1408	static inline int pud_clear_huge(pud_t *pud)
1409	{
1410	return 0;
1411	}
1412	#endif /* !__PAGETABLE_PUD_FOLDED */
1413
1414	#ifndef __PAGETABLE_PMD_FOLDED
1415	int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot);	1401	int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot);
		1402	int pud_clear_huge(pud_t *pud);
1416	int pmd_clear_huge(pmd_t *pmd);	1403	int pmd_clear_huge(pmd_t *pmd);
1417	#else
1418	static inline int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot)
1419	{
1420	return 0;
1421	}
1422	static inline int pmd_clear_huge(pmd_t *pmd)
1423	{
1424	return 0;
1425	}
1426	#endif /* !__PAGETABLE_PMD_FOLDED */
1427
1428	int p4d_free_pud_page(p4d_t *p4d, unsigned long addr);	1404	int p4d_free_pud_page(p4d_t *p4d, unsigned long addr);
1429	int pud_free_pmd_page(pud_t *pud, unsigned long addr);	1405	int pud_free_pmd_page(pud_t *pud, unsigned long addr);
1430	int pmd_free_pte_page(pmd_t *pmd, unsigned long addr);	1406	int pmd_free_pte_page(pmd_t *pmd, unsigned long addr);

include/linux/rmap.h+3−1

@@ -291,7 +291,9 @@ static inline int page_referenced(struct page *page, int is_locked, · 290 unmodified lines
291	return 0;	291	return 0;
292	}	292	}
293		293
294	#define try_to_unmap(page, refs) false	294	static inline void try_to_unmap(struct page *page, enum ttu_flags flags)
		295	{
		296	}
295		297
296	static inline int page_mkclean(struct page *page)	298	static inline int page_mkclean(struct page *page)
297	{	299	{

include/linux/scmi_protocol.h+9−5

  *	to sustained performance level mapping
  * @est_power_get: gets the estimated power cost for a given performance domain
  *	at a given frequency
+ * @fast_switch_possible: indicates if fast DVFS switching is possible or not
+ *	for a given device
+ * @power_scale_mw_get: indicates if the power values provided are in milliWatts
+ *	or in some other (abstract) scale
  */
 struct scmi_perf_proto_ops {
 	int (*limits_set)(const struct scmi_protocol_handle *ph, u32 domain,
 };
 /**
- * scmi_sensor_reading  - represent a timestamped read
+ * struct scmi_sensor_reading  - represent a timestamped read
  *
  * Used by @reading_get_timestamped method.
  *
 };
 /**
- * scmi_range_attrs  - specifies a sensor or axis values' range
+ * struct scmi_range_attrs  - specifies a sensor or axis values' range
  * @min_range: The minimum value which can be represented by the sensor/axis.
  * @max_range: The maximum value which can be represented by the sensor/axis.
  */
 };
 /**
- * scmi_sensor_axis_info  - describes one sensor axes
+ * struct scmi_sensor_axis_info  - describes one sensor axes
  * @id: The axes ID.
  * @type: Axes type. Chosen amongst one of @enum scmi_sensor_class.
  * @scale: Power-of-10 multiplier applied to the axis unit.
 };
 /**
- * scmi_sensor_intervals_info  - describes number and type of available update
+ * struct scmi_sensor_intervals_info  - describes number and type of available
- * intervals
+ *	update intervals
  * @segmented: Flag for segmented intervals' representation. When True there
  *	       will be exactly 3 intervals in @desc, with each entry
  *	       representing a member of a segment in this order:

include/linux/scpi_protocol.h+8−0

@@ -51,6 +51,14 @@ struct scpi_sensor_info { · 50 unmodified lines
51	* OPP is an index to the list return by @dvfs_get_info	51	* OPP is an index to the list return by @dvfs_get_info
52	* @dvfs_get_info: returns the DVFS capabilities of the given power	52	* @dvfs_get_info: returns the DVFS capabilities of the given power
53	* domain. It includes the OPP list and the latency information	53	* domain. It includes the OPP list and the latency information
		54	* @device_domain_id: gets the scpi domain id for a given device
		55	* @get_transition_latency: gets the DVFS transition latency for a given device
		56	* @add_opps_to_device: adds all the OPPs for a given device
		57	* @sensor_get_capability: get the list of capabilities for the sensors
		58	* @sensor_get_info: get the information of the specified sensor
		59	* @sensor_get_value: gets the current value of the sensor
		60	* @device_get_power_state: gets the power state of a power domain
		61	* @device_set_power_state: sets the power state of a power domain
54	*/	62	*/
55	struct scpi_ops {	63	struct scpi_ops {
56	u32 (*get_version)(void);	64	u32 (*get_version)(void);

include/math-emu/op-common.h+1−1

@@ -338,7 +338,7 @@ do { \ · 337 unmodified lines
338	FP_SET_EXCEPTION(FP_EX_INVALID \| FP_EX_INVALID_ISI); \	338	FP_SET_EXCEPTION(FP_EX_INVALID \| FP_EX_INVALID_ISI); \
339	break; \	339	break; \
340	} \	340	} \
341	/* FALLTHRU */ \	341	fallthrough; \
342	\	342	\
343	case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_NORMAL): \	343	case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_NORMAL): \
344	case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_ZERO): \	344	case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_ZERO): \

include/net/tcp.h+0−1

@@ -1709,7 +1709,6 @@ struct tcp_fastopen_context { · 1708 unmodified lines
1709	struct rcu_head rcu;	1709	struct rcu_head rcu;
1710	};	1710	};
1711		1711
1712	extern unsigned int sysctl_tcp_fastopen_blackhole_timeout;
1713	void tcp_fastopen_active_disable(struct sock *sk);	1712	void tcp_fastopen_active_disable(struct sock *sk);
1714	bool tcp_fastopen_active_should_disable(struct sock *sk);	1713	bool tcp_fastopen_active_should_disable(struct sock *sk);
1715	void tcp_fastopen_active_disable_ofo_check(struct sock *sk);	1714	void tcp_fastopen_active_disable_ofo_check(struct sock *sk);

include/soc/tegra/mc.h+7−2

 #ifdef CONFIG_TEGRA_MC
 struct tegra_mc *devm_tegra_memory_controller_get(struct device *dev);
+int tegra_mc_probe_device(struct tegra_mc *mc, struct device *dev);
 #else
 static inline struct tegra_mc *
 devm_tegra_memory_controller_get(struct device *dev)
 {
 	return ERR_PTR(-ENODEV);
 }
-#endif
-int tegra_mc_probe_device(struct tegra_mc *mc, struct device *dev);
+static inline int
+tegra_mc_probe_device(struct tegra_mc *mc, struct device *dev)
+{
+	return -ENODEV;
+}
+#endif
 #endif /* __SOC_TEGRA_MC_H__ */

include/trace/events/afs.h+62−5

@@ -174,6 +174,34 @@ enum afs_vl_operation { · 173 unmodified lines
174	afs_VL_GetCapabilities = 65537, /* AFS Get VL server capabilities */	174	afs_VL_GetCapabilities = 65537, /* AFS Get VL server capabilities */
175	};	175	};
176		176
		177	enum afs_cm_operation {
		178	afs_CB_CallBack = 204, /* AFS break callback promises */
		179	afs_CB_InitCallBackState = 205, /* AFS initialise callback state */
		180	afs_CB_Probe = 206, /* AFS probe client */
		181	afs_CB_GetLock = 207, /* AFS get contents of CM lock table */
		182	afs_CB_GetCE = 208, /* AFS get cache file description */
		183	afs_CB_GetXStatsVersion = 209, /* AFS get version of extended statistics */
		184	afs_CB_GetXStats = 210, /* AFS get contents of extended statistics data */
		185	afs_CB_InitCallBackState3 = 213, /* AFS initialise callback state, version 3 */
		186	afs_CB_ProbeUuid = 214, /* AFS check the client hasn't rebooted */
		187	};
		188
		189	enum yfs_cm_operation {
		190	yfs_CB_Probe = 206, /* YFS probe client */
		191	yfs_CB_GetLock = 207, /* YFS get contents of CM lock table */
		192	yfs_CB_XStatsVersion = 209, /* YFS get version of extended statistics */
		193	yfs_CB_GetXStats = 210, /* YFS get contents of extended statistics data */
		194	yfs_CB_InitCallBackState3 = 213, /* YFS initialise callback state, version 3 */
		195	yfs_CB_ProbeUuid = 214, /* YFS check the client hasn't rebooted */
		196	yfs_CB_GetServerPrefs = 215,
		197	yfs_CB_GetCellServDV = 216,
		198	yfs_CB_GetLocalCell = 217,
		199	yfs_CB_GetCacheConfig = 218,
		200	yfs_CB_GetCellByNum = 65537,
		201	yfs_CB_TellMeAboutYourself = 65538, /* get client capabilities */
		202	yfs_CB_CallBack = 64204,
		203	};
		204
177	enum afs_edit_dir_op {	205	enum afs_edit_dir_op {
178	afs_edit_dir_create,	206	afs_edit_dir_create,
179	afs_edit_dir_create_error,	207	afs_edit_dir_create_error,
@@ -436,6 +464,32 @@ enum afs_cb_break_reason { · 256 unmodified lines
436	EM(afs_YFSVL_GetCellName, "YFSVL.GetCellName") \	464	EM(afs_YFSVL_GetCellName, "YFSVL.GetCellName") \
437	E_(afs_VL_GetCapabilities, "VL.GetCapabilities")	465	E_(afs_VL_GetCapabilities, "VL.GetCapabilities")
438		466
		467	#define afs_cm_operations \
		468	EM(afs_CB_CallBack, "CB.CallBack") \
		469	EM(afs_CB_InitCallBackState, "CB.InitCallBackState") \
		470	EM(afs_CB_Probe, "CB.Probe") \
		471	EM(afs_CB_GetLock, "CB.GetLock") \
		472	EM(afs_CB_GetCE, "CB.GetCE") \
		473	EM(afs_CB_GetXStatsVersion, "CB.GetXStatsVersion") \
		474	EM(afs_CB_GetXStats, "CB.GetXStats") \
		475	EM(afs_CB_InitCallBackState3, "CB.InitCallBackState3") \
		476	E_(afs_CB_ProbeUuid, "CB.ProbeUuid")
		477
		478	#define yfs_cm_operations \
		479	EM(yfs_CB_Probe, "YFSCB.Probe") \
		480	EM(yfs_CB_GetLock, "YFSCB.GetLock") \
		481	EM(yfs_CB_XStatsVersion, "YFSCB.XStatsVersion") \
		482	EM(yfs_CB_GetXStats, "YFSCB.GetXStats") \
		483	EM(yfs_CB_InitCallBackState3, "YFSCB.InitCallBackState3") \
		484	EM(yfs_CB_ProbeUuid, "YFSCB.ProbeUuid") \
		485	EM(yfs_CB_GetServerPrefs, "YFSCB.GetServerPrefs") \
		486	EM(yfs_CB_GetCellServDV, "YFSCB.GetCellServDV") \
		487	EM(yfs_CB_GetLocalCell, "YFSCB.GetLocalCell") \
		488	EM(yfs_CB_GetCacheConfig, "YFSCB.GetCacheConfig") \
		489	EM(yfs_CB_GetCellByNum, "YFSCB.GetCellByNum") \
		490	EM(yfs_CB_TellMeAboutYourself, "YFSCB.TellMeAboutYourself") \
		491	E_(yfs_CB_CallBack, "YFSCB.CallBack")
		492
439	#define afs_edit_dir_ops \	493	#define afs_edit_dir_ops \
440	EM(afs_edit_dir_create, "create") \	494	EM(afs_edit_dir_create, "create") \
441	EM(afs_edit_dir_create_error, "c_fail") \	495	EM(afs_edit_dir_create_error, "c_fail") \
@@ -569,6 +623,8 @@ afs_server_traces; · 127 unmodified lines
569	afs_cell_traces;	623	afs_cell_traces;
570	afs_fs_operations;	624	afs_fs_operations;
571	afs_vl_operations;	625	afs_vl_operations;
		626	afs_cm_operations;
		627	yfs_cm_operations;
572	afs_edit_dir_ops;	628	afs_edit_dir_ops;
573	afs_edit_dir_reasons;	629	afs_edit_dir_reasons;
574	afs_eproto_causes;	630	afs_eproto_causes;
@@ -649,20 +705,21 @@ TRACE_EVENT(afs_cb_call, · 74 unmodified lines
649		705
650	TP_STRUCT__entry(	706	TP_STRUCT__entry(
651	__field(unsigned int, call )	707	__field(unsigned int, call )
652	__field(const char *, name )
653	__field(u32, op )	708	__field(u32, op )
		709	__field(u16, service_id )
654	),	710	),
655		711
656	TP_fast_assign(	712	TP_fast_assign(
657	__entry->call = call->debug_id;	713	__entry->call = call->debug_id;
658	__entry->name = call->type->name;
659	__entry->op = call->operation_ID;	714	__entry->op = call->operation_ID;
		715	__entry->service_id = call->service_id;
660	),	716	),
661		717
662	TP_printk("c=%08x %s o=%u",	718	TP_printk("c=%08x %s",
663	__entry->call,	719	__entry->call,
664	__entry->name,	720	__entry->service_id == 2501 ?
665	__entry->op)	721	__print_symbolic(__entry->op, yfs_cm_operations) :
		722	__print_symbolic(__entry->op, afs_cm_operations))
666	);	723	);
667		724
668	TRACE_EVENT(afs_call,	725	TRACE_EVENT(afs_call,

include/trace/events/net.h+1−1

@@ -136,7 +136,7 @@ DECLARE_EVENT_CLASS(net_dev_template, · 135 unmodified lines
136	__assign_str(name, skb->dev->name);	136	__assign_str(name, skb->dev->name);
137	),	137	),
138		138
139	TP_printk("dev=%s skbaddr=%p len=%u",	139	TP_printk("dev=%s skbaddr=%px len=%u",
140	__get_str(name), __entry->skbaddr, __entry->len)	140	__get_str(name), __entry->skbaddr, __entry->len)
141	)	141	)
142		142

include/trace/events/qdisc.h+27−1

@@ -41,11 +41,37 @@ TRACE_EVENT(qdisc_dequeue, · 40 unmodified lines
41	__entry->txq_state = txq->state;	41	__entry->txq_state = txq->state;
42	),	42	),
43		43
44	TP_printk("dequeue ifindex=%d qdisc handle=0x%X parent=0x%X txq_state=0x%lX packets=%d skbaddr=%p",	44	TP_printk("dequeue ifindex=%d qdisc handle=0x%X parent=0x%X txq_state=0x%lX packets=%d skbaddr=%px",
45	__entry->ifindex, __entry->handle, __entry->parent,	45	__entry->ifindex, __entry->handle, __entry->parent,
46	__entry->txq_state, __entry->packets, __entry->skbaddr )	46	__entry->txq_state, __entry->packets, __entry->skbaddr )
47	);	47	);
48		48
		49	TRACE_EVENT(qdisc_enqueue,
		50
		51	TP_PROTO(struct Qdisc qdisc, const struct netdev_queue txq, struct sk_buff *skb),
		52
		53	TP_ARGS(qdisc, txq, skb),
		54
		55	TP_STRUCT__entry(
		56	__field(struct Qdisc *, qdisc)
		57	__field(void *, skbaddr)
		58	__field(int, ifindex)
		59	__field(u32, handle)
		60	__field(u32, parent)
		61	),
		62
		63	TP_fast_assign(
		64	__entry->qdisc = qdisc;
		65	__entry->skbaddr = skb;
		66	__entry->ifindex = txq->dev ? txq->dev->ifindex : 0;
		67	__entry->handle = qdisc->handle;
		68	__entry->parent = qdisc->parent;
		69	),
		70
		71	TP_printk("enqueue ifindex=%d qdisc handle=0x%X parent=0x%X skbaddr=%px",
		72	__entry->ifindex, __entry->handle, __entry->parent, __entry->skbaddr)
		73	);
		74
49	TRACE_EVENT(qdisc_reset,	75	TRACE_EVENT(qdisc_reset,
50		76
51	TP_PROTO(struct Qdisc *q),	77	TP_PROTO(struct Qdisc *q),

init/Kconfig+0−1

@@ -1847,7 +1847,6 @@ config SLUB_DEBUG · 1846 unmodified lines
1847	default y	1847	default y
1848	bool "Enable SLUB debugging support" if EXPERT	1848	bool "Enable SLUB debugging support" if EXPERT
1849	depends on SLUB && SYSFS	1849	depends on SLUB && SYSFS
1850	select STACKDEPOT if STACKTRACE_SUPPORT
1851	help	1850	help
1852	SLUB has extensive debug support features. Disabling these can	1851	SLUB has extensive debug support features. Disabling these can
1853	result in significant savings in code size. This also disables	1852	result in significant savings in code size. This also disables

kernel/bpf/verifier.c+2−0

@@ -3754,6 +3754,8 @@ continue_func: · 3753 unmodified lines
3754	if (tail_call_reachable)	3754	if (tail_call_reachable)
3755	for (j = 0; j < frame; j++)	3755	for (j = 0; j < frame; j++)
3756	subprog[ret_prog[j]].tail_call_reachable = true;	3756	subprog[ret_prog[j]].tail_call_reachable = true;
		3757	if (subprog[0].tail_call_reachable)
		3758	env->prog->aux->tail_call_reachable = true;
3757		3759
3758	/* end of for() loop means the last insn of the 'subprog'	3760	/* end of for() loop means the last insn of the 'subprog'
3759	* was reached. Doesn't matter whether it was JA or EXIT	3761	* was reached. Doesn't matter whether it was JA or EXIT

kernel/debug/gdbstub.c+1−1

 				gdb_cmd_detachkill(ks);
 				return DBG_PASS_EVENT;
 			}
-#endif
 			fallthrough;
+#endif
 		case 'C': /* Exception passing */
 			tmp = gdb_cmd_exception_pass(ks);
 			if (tmp > 0)

kernel/rcu/refscale.c+3−3

@@ -487,13 +487,13 @@ ref_scale_reader(void *arg) · 486 unmodified lines
487	s64 duration;	487	s64 duration;
488		488
489	VERBOSE_SCALEOUT_BATCH("ref_scale_reader %ld: task started", me);	489	VERBOSE_SCALEOUT_BATCH("ref_scale_reader %ld: task started", me);
490	set_cpus_allowed_ptr(current, cpumask_of(me % nr_cpu_ids));	490	WARN_ON_ONCE(set_cpus_allowed_ptr(current, cpumask_of(me % nr_cpu_ids)));
491	set_user_nice(current, MAX_NICE);	491	set_user_nice(current, MAX_NICE);
492	atomic_inc(&n_init);	492	atomic_inc(&n_init);
493	if (holdoff)	493	if (holdoff)
494	schedule_timeout_interruptible(holdoff * HZ);	494	schedule_timeout_interruptible(holdoff * HZ);
495	repeat:	495	repeat:
496	VERBOSE_SCALEOUT_BATCH("ref_scale_reader %ld: waiting to start next experiment on cpu %d", me, smp_processor_id());	496	VERBOSE_SCALEOUT_BATCH("ref_scale_reader %ld: waiting to start next experiment on cpu %d", me, raw_smp_processor_id());
497		497
498	// Wait for signal that this reader can start.	498	// Wait for signal that this reader can start.
499	wait_event(rt->wq, (atomic_read(&nreaders_exp) && smp_load_acquire(&rt->start_reader)) \|\|	499	wait_event(rt->wq, (atomic_read(&nreaders_exp) && smp_load_acquire(&rt->start_reader)) \|\|
@@ -503,7 +503,7 @@ repeat: · 3 unmodified lines
503	goto end;	503	goto end;
504		504
505	// Make sure that the CPU is affinitized appropriately during testing.	505	// Make sure that the CPU is affinitized appropriately during testing.
506	WARN_ON_ONCE(smp_processor_id() != me);	506	WARN_ON_ONCE(raw_smp_processor_id() != me);
507		507
508	WRITE_ONCE(rt->start_reader, 0);	508	WRITE_ONCE(rt->start_reader, 0);
509	if (!atomic_dec_return(&n_started))	509	if (!atomic_dec_return(&n_started))

kernel/rcu/tasks.h+2−4

 		in_qs = likely(!t->trc_reader_nesting);
 	}
-	// Mark as checked.  Because this is called from the grace-period
+	// Mark as checked so that the grace-period kthread will
-	// kthread, also remove the task from the holdout list.
+	// remove it from the holdout list.
 	t->trc_reader_checked = true;
-	trc_del_holdout(t);
 	if (in_qs)
 		return true;  // Already in quiescent state, done!!!
 	// The current task had better be in a quiescent state.
 	if (t == current) {
 		t->trc_reader_checked = true;
-		trc_del_holdout(t);
 		WARN_ON_ONCE(t->trc_reader_nesting);
 		return;
 	}

kernel/rcu/tree_stall.h+2−2

@@ -795,9 +795,9 @@ void show_rcu_gp_kthreads(void) · 794 unmodified lines
795	jr = j - data_race(rcu_state.gp_req_activity);	795	jr = j - data_race(rcu_state.gp_req_activity);
796	js = j - data_race(rcu_state.gp_start);	796	js = j - data_race(rcu_state.gp_start);
797	jw = j - data_race(rcu_state.gp_wake_time);	797	jw = j - data_race(rcu_state.gp_wake_time);
798	pr_info("%s: wait state: %s(%d) ->state: %#lx ->rt_priority %u delta ->gp_start %lu ->gp_activity %lu ->gp_req_activity %lu ->gp_wake_time %lu ->gp_wake_seq %ld ->gp_seq %ld ->gp_seq_needed %ld ->gp_max %lu ->gp_flags %#x\n",	798	pr_info("%s: wait state: %s(%d) ->state: %#x ->rt_priority %u delta ->gp_start %lu ->gp_activity %lu ->gp_req_activity %lu ->gp_wake_time %lu ->gp_wake_seq %ld ->gp_seq %ld ->gp_seq_needed %ld ->gp_max %lu ->gp_flags %#x\n",
799	rcu_state.name, gp_state_getname(rcu_state.gp_state),	799	rcu_state.name, gp_state_getname(rcu_state.gp_state),
800	rcu_state.gp_state, t ? t->__state : 0x1ffffL, t ? t->rt_priority : 0xffU,	800	rcu_state.gp_state, t ? t->__state : 0x1ffff, t ? t->rt_priority : 0xffU,
801	js, ja, jr, jw, (long)data_race(rcu_state.gp_wake_seq),	801	js, ja, jr, jw, (long)data_race(rcu_state.gp_wake_seq),
802	(long)data_race(rcu_state.gp_seq),	802	(long)data_race(rcu_state.gp_seq),
803	(long)data_race(rcu_get_root()->gp_seq_needed),	803	(long)data_race(rcu_get_root()->gp_seq_needed),

kernel/scftorture.c+3−3

@@ -405,15 +405,15 @@ static int scftorture_invoker(void *arg) · 404 unmodified lines
405		405
406	VERBOSE_SCFTORTOUT("scftorture_invoker %d: task started", scfp->cpu);	406	VERBOSE_SCFTORTOUT("scftorture_invoker %d: task started", scfp->cpu);
407	cpu = scfp->cpu % nr_cpu_ids;	407	cpu = scfp->cpu % nr_cpu_ids;
408	set_cpus_allowed_ptr(current, cpumask_of(cpu));	408	WARN_ON_ONCE(set_cpus_allowed_ptr(current, cpumask_of(cpu)));
409	set_user_nice(current, MAX_NICE);	409	set_user_nice(current, MAX_NICE);
410	if (holdoff)	410	if (holdoff)
411	schedule_timeout_interruptible(holdoff * HZ);	411	schedule_timeout_interruptible(holdoff * HZ);
412		412
413	VERBOSE_SCFTORTOUT("scftorture_invoker %d: Waiting for all SCF torturers from cpu %d", scfp->cpu, smp_processor_id());	413	VERBOSE_SCFTORTOUT("scftorture_invoker %d: Waiting for all SCF torturers from cpu %d", scfp->cpu, raw_smp_processor_id());
414		414
415	// Make sure that the CPU is affinitized appropriately during testing.	415	// Make sure that the CPU is affinitized appropriately during testing.
416	curcpu = smp_processor_id();	416	curcpu = raw_smp_processor_id();
417	WARN_ONCE(curcpu != scfp->cpu % nr_cpu_ids,	417	WARN_ONCE(curcpu != scfp->cpu % nr_cpu_ids,
418	"%s: Wanted CPU %d, running on %d, nr_cpu_ids = %d\n",	418	"%s: Wanted CPU %d, running on %d, nr_cpu_ids = %d\n",
419	__func__, scfp->cpu, curcpu, nr_cpu_ids);	419	__func__, scfp->cpu, curcpu, nr_cpu_ids);

kernel/trace/trace_events_hist.c+3−3

 	if (WARN_ON_ONCE(!field))
 		goto out;
-	if (is_string_field(field)) {
+	/* Pointers to strings are just pointers and dangerous to dereference */
+	if (is_string_field(field) &&
+	    (field->filter_type != FILTER_PTR_STRING)) {
 		flags |= HIST_FIELD_FL_STRING;
 		hist_field->size = MAX_FILTER_STR_VAL;
 		field = key_field->field;
 		if (field->filter_type == FILTER_DYN_STRING)
 			size = *(u32 *)(rec + field->offset) >> 16;
-		else if (field->filter_type == FILTER_PTR_STRING)
-			size = strlen(key);
 		else if (field->filter_type == FILTER_STATIC_STRING)
 			size = field->size;

lib/test_hmm.c+0−2

 	for (pfn = start >> PAGE_SHIFT; pfn < (end >> PAGE_SHIFT); pfn++) {
 		void *entry;
-		struct page *page;
 		entry = xa_load(&dmirror->pt, pfn);
-		page = xa_untag_pointer(entry);
 		if (xa_pointer_tag(entry) == DPT_XA_TAG_ATOMIC)
 			return -EPERM;
 	}

mm/hugetlb.c+3−2

@@ -5440,8 +5440,9 @@ long follow_hugetlb_page(struct mm_struct mm, struct vm_area_struct vma, · 5439 unmodified lines
5440	continue;	5440	continue;
5441	}	5441	}
5442		5442
5443	refs = min3(pages_per_huge_page(h) - pfn_offset,	5443	/* vaddr may not be aligned to PAGE_SIZE */
5444	(vma->vm_end - vaddr) >> PAGE_SHIFT, remainder);	5444	refs = min3(pages_per_huge_page(h) - pfn_offset, remainder,
		5445	(vma->vm_end - ALIGN_DOWN(vaddr, PAGE_SIZE)) >> PAGE_SHIFT);
5445		5446
5446	if (pages \|\| vmas)	5447	if (pages \|\| vmas)
5447	record_subpages_vmas(mem_map_offset(page, pfn_offset),	5448	record_subpages_vmas(mem_map_offset(page, pfn_offset),

mm/kasan/kasan.h+12−0

 #ifdef CONFIG_KASAN_HW_TAGS
 #include <linux/static_key.h>
+#include "../slab.h"
 DECLARE_STATIC_KEY_FALSE(kasan_flag_stacktrace);
 extern bool kasan_flag_async __ro_after_init;
 	if (WARN_ON((unsigned long)addr & KASAN_GRANULE_MASK))
 		return;
+	/*
+	 * Explicitly initialize the memory with the precise object size to
+	 * avoid overwriting the SLAB redzone. This disables initialization in
+	 * the arch code and may thus lead to performance penalty. The penalty
+	 * is accepted since SLAB redzones aren't enabled in production builds.
+	 */
+	if (__slub_debug_enabled() &&
+	    init && ((unsigned long)size & KASAN_GRANULE_MASK)) {
+		init = false;
+		memzero_explicit((void *)addr, size);
+	}
 	size = round_up(size, KASAN_GRANULE_SIZE);
 	hw_set_mem_tag_range((void *)addr, size, tag, init);

mm/page_alloc.c+21−7

 #endif /* CONFIG_FAIL_PAGE_ALLOC */
-static noinline bool should_fail_alloc_page(gfp_t gfp_mask, unsigned int order)
+noinline bool should_fail_alloc_page(gfp_t gfp_mask, unsigned int order)
 {
 	return __should_fail_alloc_page(gfp_mask, order);
 }
 	unsigned int alloc_flags = ALLOC_WMARK_LOW;
 	int nr_populated = 0, nr_account = 0;
-	if (unlikely(nr_pages <= 0))
-		return 0;
 	/*
 	 * Skip populated array elements to determine if any pages need
 	 * to be allocated before disabling IRQs.
 	while (page_array && nr_populated < nr_pages && page_array[nr_populated])
 		nr_populated++;
+	/* No pages requested? */
+	if (unlikely(nr_pages <= 0))
+		goto out;
 	/* Already populated array? */
 	if (unlikely(page_array && nr_pages - nr_populated == 0))
-		return nr_populated;
+		goto out;
 	/* Use the single page allocator for one page. */
 	if (nr_pages - nr_populated == 1)
 		goto failed;
+#ifdef CONFIG_PAGE_OWNER
+	/*
+	 * PAGE_OWNER may recurse into the allocator to allocate space to
+	 * save the stack with pagesets.lock held. Releasing/reacquiring
+	 * removes much of the performance benefit of bulk allocation so
+	 * force the caller to allocate one page at a time as it'll have
+	 * similar performance to added complexity to the bulk allocator.
+	 */
+	if (static_branch_unlikely(&page_owner_inited))
+		goto failed;
+#endif
 	/* May set ALLOC_NOFRAGMENT, fragmentation will return 1 page. */
 	gfp &= gfp_allowed_mask;
 	alloc_gfp = gfp;
 	if (!prepare_alloc_pages(gfp, 0, preferred_nid, nodemask, &ac, &alloc_gfp, &alloc_flags))
-		return 0;
+		goto out;
 	gfp = alloc_gfp;
 	/* Find an allowed local zone that meets the low watermark. */
 	__count_zid_vm_events(PGALLOC, zone_idx(zone), nr_account);
 	zone_statistics(ac.preferred_zoneref->zone, zone, nr_account);
+out:
 	return nr_populated;
 failed_irq:
 		nr_populated++;
 	}
-	return nr_populated;
+	goto out;
 }
 EXPORT_SYMBOL_GPL(__alloc_pages_bulk);

mm/slab.h+11−4

 #endif
 extern void print_tracking(struct kmem_cache *s, void *object);
 long validate_slab_cache(struct kmem_cache *s);
+static inline bool __slub_debug_enabled(void)
+{
+	return static_branch_unlikely(&slub_debug_enabled);
+}
 #else
 static inline void print_tracking(struct kmem_cache *s, void *object)
 {
 }
+static inline bool __slub_debug_enabled(void)
+{
+	return false;
+}
 #endif
 /*
  */
 static inline bool kmem_cache_debug_flags(struct kmem_cache *s, slab_flags_t flags)
 {
-#ifdef CONFIG_SLUB_DEBUG
+	if (IS_ENABLED(CONFIG_SLUB_DEBUG))
-	VM_WARN_ON_ONCE(!(flags & SLAB_DEBUG_FLAGS));
+		VM_WARN_ON_ONCE(!(flags & SLAB_DEBUG_FLAGS));
-	if (static_branch_unlikely(&slub_debug_enabled))
+	if (__slub_debug_enabled())
 		return s->flags & flags;
-#endif
 	return false;
 }

mm/slub.c+30−63

@@ -26,7 +26,6 @@ · 25 unmodified lines
26	#include <linux/cpuset.h>	26	#include <linux/cpuset.h>
27	#include <linux/mempolicy.h>	27	#include <linux/mempolicy.h>
28	#include <linux/ctype.h>	28	#include <linux/ctype.h>
29	#include <linux/stackdepot.h>
30	#include <linux/debugobjects.h>	29	#include <linux/debugobjects.h>
31	#include <linux/kallsyms.h>	30	#include <linux/kallsyms.h>
32	#include <linux/kfence.h>	31	#include <linux/kfence.h>
@@ -120,25 +119,11 @@ · 87 unmodified lines
120	*/	119	*/
121		120
122	#ifdef CONFIG_SLUB_DEBUG	121	#ifdef CONFIG_SLUB_DEBUG
123
124	#ifdef CONFIG_SLUB_DEBUG_ON	122	#ifdef CONFIG_SLUB_DEBUG_ON
125	DEFINE_STATIC_KEY_TRUE(slub_debug_enabled);	123	DEFINE_STATIC_KEY_TRUE(slub_debug_enabled);
126	#else	124	#else
127	DEFINE_STATIC_KEY_FALSE(slub_debug_enabled);	125	DEFINE_STATIC_KEY_FALSE(slub_debug_enabled);
128	#endif	126	#endif
129
130	static inline bool __slub_debug_enabled(void)
131	{
132	return static_branch_unlikely(&slub_debug_enabled);
133	}
134
135	#else /* CONFIG_SLUB_DEBUG */
136
137	static inline bool __slub_debug_enabled(void)
138	{
139	return false;
140	}
141
142	#endif /* CONFIG_SLUB_DEBUG */	127	#endif /* CONFIG_SLUB_DEBUG */
143		128
144	static inline bool kmem_cache_debug(struct kmem_cache *s)	129	static inline bool kmem_cache_debug(struct kmem_cache *s)
@@ -221,8 +206,8 @@ static inline bool kmem_cache_has_cpu_partial(struct kmem_cache *s) · 76 unmodified lines
221	#define TRACK_ADDRS_COUNT 16	206	#define TRACK_ADDRS_COUNT 16
222	struct track {	207	struct track {
223	unsigned long addr; /* Called from address */	208	unsigned long addr; /* Called from address */
224	#ifdef CONFIG_STACKDEPOT	209	#ifdef CONFIG_STACKTRACE
225	depot_stack_handle_t handle;	210	unsigned long addrs[TRACK_ADDRS_COUNT]; /* Called from address */
226	#endif	211	#endif
227	int cpu; /* Was running on cpu */	212	int cpu; /* Was running on cpu */
228	int pid; /* Pid context */	213	int pid; /* Pid context */
@@ -626,27 +611,22 @@ static struct track get_track(struct kmem_cache s, void *object, · 397 unmodified lines
626	return kasan_reset_tag(p + alloc);	611	return kasan_reset_tag(p + alloc);
627	}	612	}
628		613
629	#ifdef CONFIG_STACKDEPOT
630	static depot_stack_handle_t save_stack_depot_trace(gfp_t flags)
631	{
632	unsigned long entries[TRACK_ADDRS_COUNT];
633	depot_stack_handle_t handle;
634	unsigned int nr_entries;
635
636	nr_entries = stack_trace_save(entries, ARRAY_SIZE(entries), 4);
637	handle = stack_depot_save(entries, nr_entries, flags);
638	return handle;
639	}
640	#endif
641
642	static void set_track(struct kmem_cache s, void object,	614	static void set_track(struct kmem_cache s, void object,
643	enum track_item alloc, unsigned long addr)	615	enum track_item alloc, unsigned long addr)
644	{	616	{
645	struct track *p = get_track(s, object, alloc);	617	struct track *p = get_track(s, object, alloc);
646		618
647	if (addr) {	619	if (addr) {
648	#ifdef CONFIG_STACKDEPOT	620	#ifdef CONFIG_STACKTRACE
649	p->handle = save_stack_depot_trace(GFP_NOWAIT);	621	unsigned int nr_entries;
		622
		623	metadata_access_enable();
		624	nr_entries = stack_trace_save(kasan_reset_tag(p->addrs),
		625	TRACK_ADDRS_COUNT, 3);
		626	metadata_access_disable();
		627
		628	if (nr_entries < TRACK_ADDRS_COUNT)
		629	p->addrs[nr_entries] = 0;
650	#endif	630	#endif
651	p->addr = addr;	631	p->addr = addr;
652	p->cpu = smp_processor_id();	632	p->cpu = smp_processor_id();
@@ -673,19 +653,14 @@ static void print_track(const char s, struct track t, unsigned long pr_time) · 20 unmodified lines
673		653
674	pr_err("%s in %pS age=%lu cpu=%u pid=%d\n",	654	pr_err("%s in %pS age=%lu cpu=%u pid=%d\n",
675	s, (void *)t->addr, pr_time - t->when, t->cpu, t->pid);	655	s, (void *)t->addr, pr_time - t->when, t->cpu, t->pid);
676	#ifdef CONFIG_STACKDEPOT	656	#ifdef CONFIG_STACKTRACE
677	{	657	{
678	depot_stack_handle_t handle;	658	int i;
679	unsigned long *entries;	659	for (i = 0; i < TRACK_ADDRS_COUNT; i++)
680	unsigned int nr_entries;	660	if (t->addrs[i])
681		661	pr_err("\t%pS\n", (void *)t->addrs[i]);
682	handle = READ_ONCE(t->handle);	662	else
683	if (!handle) {	663	break;
684	pr_err("object allocation/free stack trace missing\n");
685	} else {
686	nr_entries = stack_depot_fetch(handle, &entries);
687	stack_trace_print(entries, nr_entries, 0);
688	}
689	}	664	}
690	#endif	665	#endif
691	}	666	}
@@ -4059,26 +4034,18 @@ void kmem_obj_info(struct kmem_obj_info kpp, void object, struct page *page) · 3367 unmodified lines
4059	objp = fixup_red_left(s, objp);	4034	objp = fixup_red_left(s, objp);
4060	trackp = get_track(s, objp, TRACK_ALLOC);	4035	trackp = get_track(s, objp, TRACK_ALLOC);
4061	kpp->kp_ret = (void *)trackp->addr;	4036	kpp->kp_ret = (void *)trackp->addr;
4062	#ifdef CONFIG_STACKDEPOT	4037	#ifdef CONFIG_STACKTRACE
4063	{	4038	for (i = 0; i < KS_ADDRS_COUNT && i < TRACK_ADDRS_COUNT; i++) {
4064	depot_stack_handle_t handle;	4039	kpp->kp_stack[i] = (void *)trackp->addrs[i];
4065	unsigned long *entries;	4040	if (!kpp->kp_stack[i])
4066	unsigned int nr_entries;	4041	break;
4067		4042	}
4068	handle = READ_ONCE(trackp->handle);
4069	if (handle) {
4070	nr_entries = stack_depot_fetch(handle, &entries);
4071	for (i = 0; i < KS_ADDRS_COUNT && i < nr_entries; i++)
4072	kpp->kp_stack[i] = (void *)entries[i];
4073	}
4074		4043
4075	trackp = get_track(s, objp, TRACK_FREE);	4044	trackp = get_track(s, objp, TRACK_FREE);
4076	handle = READ_ONCE(trackp->handle);	4045	for (i = 0; i < KS_ADDRS_COUNT && i < TRACK_ADDRS_COUNT; i++) {
4077	if (handle) {	4046	kpp->kp_free_stack[i] = (void *)trackp->addrs[i];
4078	nr_entries = stack_depot_fetch(handle, &entries);	4047	if (!kpp->kp_free_stack[i])
4079	for (i = 0; i < KS_ADDRS_COUNT && i < nr_entries; i++)	4048	break;
4080	kpp->kp_free_stack[i] = (void *)entries[i];
4081	}
4082	}	4049	}
4083	#endif	4050	#endif
4084	#endif	4051	#endif

net/bpf/test_run.c+5−0

 	void *data;
 	int ret = -EINVAL;
+	if (prog->expected_attach_type == BPF_XDP_DEVMAP ||
+	    prog->expected_attach_type == BPF_XDP_CPUMAP)
+		return -EINVAL;
+	if (kattr->test.ctx_in || kattr->test.ctx_out)
+		return -EINVAL;
 	ctx = bpf_ctx_init(kattr, sizeof(struct xdp_md));
 	if (IS_ERR(ctx))
 		return PTR_ERR(ctx);

net/bridge/br_fdb.c+1−1

@@ -783,7 +783,7 @@ int br_fdb_replay(const struct net_device br_dev, const struct net_device dev, · 782 unmodified lines
783	struct net_device *dst_dev;	783	struct net_device *dst_dev;
784		784
785	dst_dev = dst ? dst->dev : br->dev;	785	dst_dev = dst ? dst->dev : br->dev;
786	if (dst_dev != br_dev && dst_dev != dev)	786	if (dst_dev && dst_dev != dev)
787	continue;	787	continue;
788		788
789	err = br_fdb_replay_one(nb, fdb, dst_dev, action, ctx);	789	err = br_fdb_replay_one(nb, fdb, dst_dev, action, ctx);

net/caif/caif_socket.c+2−1

@@ -539,7 +539,8 @@ static int caif_seqpkt_sendmsg(struct socket sock, struct msghdr msg, · 538 unmodified lines
539	goto err;	539	goto err;
540		540
541	ret = -EINVAL;	541	ret = -EINVAL;
542	if (unlikely(msg->msg_iter.iov->iov_base == NULL))	542	if (unlikely(msg->msg_iter.nr_segs == 0) \|\|
		543	unlikely(msg->msg_iter.iov->iov_base == NULL))
543	goto err;	544	goto err;
544	noblock = msg->msg_flags & MSG_DONTWAIT;	545	noblock = msg->msg_flags & MSG_DONTWAIT;
545		546

net/core/dev.c+26−8

 #include <trace/events/napi.h>
 #include <trace/events/net.h>
 #include <trace/events/skb.h>
+#include <trace/events/qdisc.h>
 #include <linux/inetdevice.h>
 #include <linux/cpu_rmap.h>
 #include <linux/static_key.h>
 	}
 }
+static int dev_qdisc_enqueue(struct sk_buff *skb, struct Qdisc *q,
+			     struct sk_buff **to_free,
+			     struct netdev_queue *txq)
+{
+	int rc;
+	rc = q->enqueue(skb, q, to_free) & NET_XMIT_MASK;
+	if (rc == NET_XMIT_SUCCESS)
+		trace_qdisc_enqueue(q, txq, skb);
+	return rc;
+}
 static inline int __dev_xmit_skb(struct sk_buff *skb, struct Qdisc *q,
 				 struct net_device *dev,
 				 struct netdev_queue *txq)
 			 * of q->seqlock to protect from racing with requeuing.
 			 */
 			if (unlikely(!nolock_qdisc_is_empty(q))) {
-				rc = q->enqueue(skb, q, &to_free) &
+				rc = dev_qdisc_enqueue(skb, q, &to_free, txq);
-					NET_XMIT_MASK;
 				__qdisc_run(q);
 				qdisc_run_end(q);
 			return NET_XMIT_SUCCESS;
 		}
-		rc = q->enqueue(skb, q, &to_free) & NET_XMIT_MASK;
+		rc = dev_qdisc_enqueue(skb, q, &to_free, txq);
 		qdisc_run(q);
 no_lock_out:
 		qdisc_run_end(q);
 		rc = NET_XMIT_SUCCESS;
 	} else {
-		rc = q->enqueue(skb, q, &to_free) & NET_XMIT_MASK;
+		rc = dev_qdisc_enqueue(skb, q, &to_free, txq);
 		if (qdisc_run_begin(q)) {
 			if (unlikely(contended)) {
 				spin_unlock(&q->busylock);
 	struct net_device *dev;
 	int err, fd;
+	rtnl_lock();
 	dev = dev_get_by_index(net, attr->link_create.target_ifindex);
-	if (!dev)
+	if (!dev) {
+		rtnl_unlock();
 		return -EINVAL;
+	}
 	link = kzalloc(sizeof(*link), GFP_USER);
 	if (!link) {
 		err = -ENOMEM;
-		goto out_put_dev;
+		goto unlock;
 	}
 	bpf_link_init(&link->link, BPF_LINK_TYPE_XDP, &bpf_xdp_link_lops, prog);
 	err = bpf_link_prime(&link->link, &link_primer);
 	if (err) {
 		kfree(link);
-		goto out_put_dev;
+		goto unlock;
 	}
-	rtnl_lock();
 	err = dev_xdp_attach_link(dev, NULL, link);
 	rtnl_unlock();
 	if (err) {
+		link->dev = NULL;
 		bpf_link_cleanup(&link_primer);
 		goto out_put_dev;
 	}
 	dev_put(dev);
 	return fd;
+unlock:
+	rtnl_unlock();
 out_put_dev:
 	dev_put(dev);
 	return err;

net/core/skbuff.c+16−2

 	if (skb->cloned &&
 	    atomic_sub_return(skb->nohdr ? (1 << SKB_DATAREF_SHIFT) + 1 : 1,
 			      &shinfo->dataref))
-		return;
+		goto exit;
 	skb_zcopy_clear(skb, true);
 		kfree_skb_list(shinfo->frag_list);
 	skb_free_head(skb);
+exit:
+	/* When we clone an SKB we copy the reycling bit. The pp_recycle
+	 * bit is only set on the head though, so in order to avoid races
+	 * while trying to recycle fragments on __skb_frag_unref() we need
+	 * to make one SKB responsible for triggering the recycle path.
+	 * So disable the recycling bit if an SKB is cloned and we have
+	 * additional references to to the fragmented part of the SKB.
+	 * Eventually the last SKB will have the recycling bit set and it's
+	 * dataref set to 0, which will trigger the recycling
+	 */
+	skb->pp_recycle = 0;
 }
 /*
 	if (!from->head_frag ||
 	    skb_headlen(from) < L1_CACHE_BYTES ||
-	    skb_shinfo(from)->nr_frags >= MAX_SKB_FRAGS)
+	    skb_shinfo(from)->nr_frags >= MAX_SKB_FRAGS) {
 		hlen = skb_headlen(from);
+		if (!hlen)
+			hlen = from->len;
+	}
 	if (skb_has_frag_list(from))
 		hlen = from->len;

net/core/skmsg.c+11−5

 	if (skb_linearize(skb))
 		return -EAGAIN;
 	num_sge = skb_to_sgvec(skb, msg->sg.data, 0, skb->len);
-	if (unlikely(num_sge < 0)) {
+	if (unlikely(num_sge < 0))
-		kfree(msg);
 		return num_sge;
-	}
 	copied = skb->len;
 	msg->sg.start = 0;
 {
 	struct sock *sk = psock->sk;
 	struct sk_msg *msg;
+	int err;
 	/* If we are receiving on the same sock skb->sk is already assigned,
 	 * skip memory accounting and owner transition seeing it already set
 	 * into user buffers.
 	 */
 	skb_set_owner_r(skb, sk);
-	return sk_psock_skb_ingress_enqueue(skb, psock, sk, msg);
+	err = sk_psock_skb_ingress_enqueue(skb, psock, sk, msg);
+	if (err < 0)
+		kfree(msg);
+	return err;
 }
 /* Puts an skb on the ingress queue of the socket already assigned to the
 {
 	struct sk_msg *msg = kzalloc(sizeof(*msg), __GFP_NOWARN | GFP_ATOMIC);
 	struct sock *sk = psock->sk;
+	int err;
 	if (unlikely(!msg))
 		return -EAGAIN;
 	sk_msg_init(msg);
 	skb_set_owner_r(skb, sk);
-	return sk_psock_skb_ingress_enqueue(skb, psock, sk, msg);
+	err = sk_psock_skb_ingress_enqueue(skb, psock, sk, msg);
+	if (err < 0)
+		kfree(msg);
+	return err;
 }
 static int sk_psock_handle_skb(struct sk_psock *psock, struct sk_buff *skb,

net/decnet/af_decnet.c+12−15

 static int dn_confirm_accept(struct sock *sk, long *timeo, gfp_t allocation)
 {
 	struct dn_scp *scp = DN_SK(sk);
-	DEFINE_WAIT(wait);
+	DEFINE_WAIT_FUNC(wait, woken_wake_function);
 	int err;
 	if (scp->state != DN_CR)
 	scp->segsize_loc = dst_metric_advmss(__sk_dst_get(sk));
 	dn_send_conn_conf(sk, allocation);
-	prepare_to_wait(sk_sleep(sk), &wait, TASK_INTERRUPTIBLE);
+	add_wait_queue(sk_sleep(sk), &wait);
 	for(;;) {
 		release_sock(sk);
 		if (scp->state == DN_CC)
-			*timeo = schedule_timeout(*timeo);
+			*timeo = wait_woken(&wait, TASK_INTERRUPTIBLE, *timeo);
 		lock_sock(sk);
 		err = 0;
 		if (scp->state == DN_RUN)
 		err = -EAGAIN;
 		if (!*timeo)
 			break;
-		prepare_to_wait(sk_sleep(sk), &wait, TASK_INTERRUPTIBLE);
 	}
-	finish_wait(sk_sleep(sk), &wait);
+	remove_wait_queue(sk_sleep(sk), &wait);
 	if (err == 0) {
 		sk->sk_socket->state = SS_CONNECTED;
 	} else if (scp->state != DN_CC) {
 static int dn_wait_run(struct sock *sk, long *timeo)
 {
 	struct dn_scp *scp = DN_SK(sk);
-	DEFINE_WAIT(wait);
+	DEFINE_WAIT_FUNC(wait, woken_wake_function);
 	int err = 0;
 	if (scp->state == DN_RUN)
 	if (!*timeo)
 		return -EALREADY;
-	prepare_to_wait(sk_sleep(sk), &wait, TASK_INTERRUPTIBLE);
+	add_wait_queue(sk_sleep(sk), &wait);
 	for(;;) {
 		release_sock(sk);
 		if (scp->state == DN_CI || scp->state == DN_CC)
-			*timeo = schedule_timeout(*timeo);
+			*timeo = wait_woken(&wait, TASK_INTERRUPTIBLE, *timeo);
 		lock_sock(sk);
 		err = 0;
 		if (scp->state == DN_RUN)
 		err = -ETIMEDOUT;
 		if (!*timeo)
 			break;
-		prepare_to_wait(sk_sleep(sk), &wait, TASK_INTERRUPTIBLE);
 	}
-	finish_wait(sk_sleep(sk), &wait);
+	remove_wait_queue(sk_sleep(sk), &wait);
 out:
 	if (err == 0) {
 		sk->sk_socket->state = SS_CONNECTED;
 static struct sk_buff *dn_wait_for_connect(struct sock *sk, long *timeo)
 {
-	DEFINE_WAIT(wait);
+	DEFINE_WAIT_FUNC(wait, woken_wake_function);
 	struct sk_buff *skb = NULL;
 	int err = 0;
-	prepare_to_wait(sk_sleep(sk), &wait, TASK_INTERRUPTIBLE);
+	add_wait_queue(sk_sleep(sk), &wait);
 	for(;;) {
 		release_sock(sk);
 		skb = skb_dequeue(&sk->sk_receive_queue);
 		if (skb == NULL) {
-			*timeo = schedule_timeout(*timeo);
+			*timeo = wait_woken(&wait, TASK_INTERRUPTIBLE, *timeo);
 			skb = skb_dequeue(&sk->sk_receive_queue);
 		}
 		lock_sock(sk);
 		err = -EAGAIN;
 		if (!*timeo)
 			break;
-		prepare_to_wait(sk_sleep(sk), &wait, TASK_INTERRUPTIBLE);
 	}
-	finish_wait(sk_sleep(sk), &wait);
+	remove_wait_queue(sk_sleep(sk), &wait);
 	return skb == NULL ? ERR_PTR(err) : skb;
 }

net/dsa/slave.c+9−5

 	struct dsa_slave_priv *p = netdev_priv(slave);
 	const struct dsa_port *cpu_dp = dp->cpu_dp;
 	struct net_device *master = cpu_dp->master;
+	const struct dsa_switch *ds = dp->ds;
 	slave->needed_headroom = cpu_dp->tag_ops->needed_headroom;
 	slave->needed_tailroom = cpu_dp->tag_ops->needed_tailroom;
 	slave->needed_tailroom += master->needed_tailroom;
 	p->xmit = cpu_dp->tag_ops->xmit;
+	slave->features = master->vlan_features | NETIF_F_HW_TC;
+	if (ds->ops->port_vlan_add && ds->ops->port_vlan_del)
+		slave->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
+	slave->hw_features |= NETIF_F_HW_TC;
+	slave->features |= NETIF_F_LLTX;
+	if (slave->needed_tailroom)
+		slave->features &= ~(NETIF_F_SG | NETIF_F_FRAGLIST);
 }
 static struct lock_class_key dsa_slave_netdev_xmit_lock_key;
 	if (slave_dev == NULL)
 		return -ENOMEM;
-	slave_dev->features = master->vlan_features | NETIF_F_HW_TC;
-	if (ds->ops->port_vlan_add && ds->ops->port_vlan_del)
-		slave_dev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
-	slave_dev->hw_features |= NETIF_F_HW_TC;
-	slave_dev->features |= NETIF_F_LLTX;
 	slave_dev->ethtool_ops = &dsa_slave_ethtool_ops;
 	if (!is_zero_ether_addr(port->mac))
 		ether_addr_copy(slave_dev->dev_addr, port->mac);

net/dsa/tag_ksz.c+9−0

 	u8 *tag;
 	u8 *addr;
+	if (skb->ip_summed == CHECKSUM_PARTIAL && skb_checksum_help(skb))
+		return NULL;
 	/* Tag encoding */
 	tag = skb_put(skb, KSZ_INGRESS_TAG_LEN);
 	addr = skb_mac_header(skb);
 	u8 *addr;
 	u16 val;
+	if (skb->ip_summed == CHECKSUM_PARTIAL && skb_checksum_help(skb))
+		return NULL;
 	/* Tag encoding */
 	tag = skb_put(skb, KSZ9477_INGRESS_TAG_LEN);
 	addr = skb_mac_header(skb);
 	u8 *addr;
 	u8 *tag;
+	if (skb->ip_summed == CHECKSUM_PARTIAL && skb_checksum_help(skb))
+		return NULL;
 	/* Tag encoding */
 	tag = skb_put(skb, KSZ_INGRESS_TAG_LEN);
 	addr = skb_mac_header(skb);

net/ipv4/tcp_bpf.c+1−1

@@ -503,7 +503,7 @@ static int __init tcp_bpf_v4_build_proto(void) · 502 unmodified lines
503	tcp_bpf_rebuild_protos(tcp_bpf_prots[TCP_BPF_IPV4], &tcp_prot);	503	tcp_bpf_rebuild_protos(tcp_bpf_prots[TCP_BPF_IPV4], &tcp_prot);
504	return 0;	504	return 0;
505	}	505	}
506	core_initcall(tcp_bpf_v4_build_proto);	506	late_initcall(tcp_bpf_v4_build_proto);
507		507
508	static int tcp_bpf_assert_proto_ops(struct proto *ops)	508	static int tcp_bpf_assert_proto_ops(struct proto *ops)
509	{	509	{

net/ipv4/tcp_fastopen.c+24−4

@@ -496,8 +496,18 @@ void tcp_fastopen_active_disable(struct sock *sk) · 495 unmodified lines
496	{	496	{
497	struct net *net = sock_net(sk);	497	struct net *net = sock_net(sk);
498		498
		499	if (!sock_net(sk)->ipv4.sysctl_tcp_fastopen_blackhole_timeout)
		500	return;
		501
		502	/* Paired with READ_ONCE() in tcp_fastopen_active_should_disable() */
		503	WRITE_ONCE(net->ipv4.tfo_active_disable_stamp, jiffies);
		504
		505	/* Paired with smp_rmb() in tcp_fastopen_active_should_disable().
		506	* We want net->ipv4.tfo_active_disable_stamp to be updated first.
		507	*/
		508	smp_mb__before_atomic();
499	atomic_inc(&net->ipv4.tfo_active_disable_times);	509	atomic_inc(&net->ipv4.tfo_active_disable_times);
500	net->ipv4.tfo_active_disable_stamp = jiffies;	510
501	NET_INC_STATS(net, LINUX_MIB_TCPFASTOPENBLACKHOLE);	511	NET_INC_STATS(net, LINUX_MIB_TCPFASTOPENBLACKHOLE);
502	}	512	}
503		513
@@ -508,17 +518,27 @@ void tcp_fastopen_active_disable(struct sock *sk) · 4 unmodified lines
508	bool tcp_fastopen_active_should_disable(struct sock *sk)	518	bool tcp_fastopen_active_should_disable(struct sock *sk)
509	{	519	{
510	unsigned int tfo_bh_timeout = sock_net(sk)->ipv4.sysctl_tcp_fastopen_blackhole_timeout;	520	unsigned int tfo_bh_timeout = sock_net(sk)->ipv4.sysctl_tcp_fastopen_blackhole_timeout;
511	int tfo_da_times = atomic_read(&sock_net(sk)->ipv4.tfo_active_disable_times);
512	unsigned long timeout;	521	unsigned long timeout;
		522	int tfo_da_times;
513	int multiplier;	523	int multiplier;
514		524
		525	if (!tfo_bh_timeout)
		526	return false;
		527
		528	tfo_da_times = atomic_read(&sock_net(sk)->ipv4.tfo_active_disable_times);
515	if (!tfo_da_times)	529	if (!tfo_da_times)
516	return false;	530	return false;
517		531
		532	/* Paired with smp_mb__before_atomic() in tcp_fastopen_active_disable() */
		533	smp_rmb();
		534
518	/* Limit timeout to max: 2^6 * initial timeout */	535	/* Limit timeout to max: 2^6 * initial timeout */
519	multiplier = 1 << min(tfo_da_times - 1, 6);	536	multiplier = 1 << min(tfo_da_times - 1, 6);
520	timeout = multiplier * tfo_bh_timeout * HZ;	537
521	if (time_before(jiffies, sock_net(sk)->ipv4.tfo_active_disable_stamp + timeout))	538	/* Paired with the WRITE_ONCE() in tcp_fastopen_active_disable(). */
		539	timeout = READ_ONCE(sock_net(sk)->ipv4.tfo_active_disable_stamp) +
		540	multiplier * tfo_bh_timeout * HZ;
		541	if (time_before(jiffies, timeout))
522	return true;	542	return true;
523		543
524	/* Mark check bit so we can check for successful active TFO	544	/* Mark check bit so we can check for successful active TFO

net/ipv4/tcp_ipv4.c+1−1

@@ -2964,7 +2964,7 @@ static int __net_init tcp_sk_init(struct net *net) · 2963 unmodified lines
2964	net->ipv4.sysctl_tcp_comp_sack_slack_ns = 100 * NSEC_PER_USEC;	2964	net->ipv4.sysctl_tcp_comp_sack_slack_ns = 100 * NSEC_PER_USEC;
2965	net->ipv4.sysctl_tcp_comp_sack_nr = 44;	2965	net->ipv4.sysctl_tcp_comp_sack_nr = 44;
2966	net->ipv4.sysctl_tcp_fastopen = TFO_CLIENT_ENABLE;	2966	net->ipv4.sysctl_tcp_fastopen = TFO_CLIENT_ENABLE;
2967	net->ipv4.sysctl_tcp_fastopen_blackhole_timeout = 60 * 60;	2967	net->ipv4.sysctl_tcp_fastopen_blackhole_timeout = 0;
2968	atomic_set(&net->ipv4.tfo_active_disable_times, 0);	2968	atomic_set(&net->ipv4.tfo_active_disable_times, 0);
2969		2969
2970	/* Reno is always built in */	2970	/* Reno is always built in */

net/ipv4/udp.c+19−6

 					 const struct iphdr *iph,
 					 struct udphdr *uh,
 					 struct udp_table *udptable,
+					 struct sock *sk,
 					 struct sk_buff *skb, u32 info)
 {
+	int (*lookup)(struct sock *sk, struct sk_buff *skb);
 	int network_offset, transport_offset;
-	struct sock *sk;
+	struct udp_sock *up;
 	network_offset = skb_network_offset(skb);
 	transport_offset = skb_transport_offset(skb);
 	/* Transport header needs to point to the UDP header */
 	skb_set_transport_header(skb, iph->ihl << 2);
+	if (sk) {
+		up = udp_sk(sk);
+		lookup = READ_ONCE(up->encap_err_lookup);
+		if (lookup && lookup(sk, skb))
+			sk = NULL;
+		goto out;
+	}
 	sk = __udp4_lib_lookup(net, iph->daddr, uh->source,
 			       iph->saddr, uh->dest, skb->dev->ifindex, 0,
 			       udptable, NULL);
 	if (sk) {
-		int (*lookup)(struct sock *sk, struct sk_buff *skb);
+		up = udp_sk(sk);
-		struct udp_sock *up = udp_sk(sk);
 		lookup = READ_ONCE(up->encap_err_lookup);
 		if (!lookup || lookup(sk, skb))
 			sk = NULL;
 	}
+out:
 	if (!sk)
 		sk = ERR_PTR(__udp4_lib_err_encap_no_sk(skb, info));
 	sk = __udp4_lib_lookup(net, iph->daddr, uh->dest,
 			       iph->saddr, uh->source, skb->dev->ifindex,
 			       inet_sdif(skb), udptable, NULL);
 	if (!sk || udp_sk(sk)->encap_type) {
 		/* No socket for error: try tunnels before discarding */
-		sk = ERR_PTR(-ENOENT);
 		if (static_branch_unlikely(&udp_encap_needed_key)) {
-			sk = __udp4_lib_err_encap(net, iph, uh, udptable, skb,
+			sk = __udp4_lib_err_encap(net, iph, uh, udptable, sk, skb,
 						  info);
 			if (!sk)
 				return 0;
-		}
+		} else
+			sk = ERR_PTR(-ENOENT);
 		if (IS_ERR(sk)) {
 			__ICMP_INC_STATS(net, ICMP_MIB_INERRORS);

net/ipv4/udp_bpf.c+1−1

@@ -133,7 +133,7 @@ static int __init udp_bpf_v4_build_proto(void) · 132 unmodified lines
133	udp_bpf_rebuild_protos(&udp_bpf_prots[UDP_BPF_IPV4], &udp_prot);	133	udp_bpf_rebuild_protos(&udp_bpf_prots[UDP_BPF_IPV4], &udp_prot);
134	return 0;	134	return 0;
135	}	135	}
136	core_initcall(udp_bpf_v4_build_proto);	136	late_initcall(udp_bpf_v4_build_proto);
137		137
138	int udp_bpf_update_proto(struct sock sk, struct sk_psock psock, bool restore)	138	int udp_bpf_update_proto(struct sock sk, struct sk_psock psock, bool restore)
139	{	139	{

net/ipv6/ip6_output.c+1−1

@@ -74,7 +74,7 @@ static int ip6_finish_output2(struct net net, struct sock sk, struct sk_buff * · 73 unmodified lines
74		74
75	if (likely(nskb)) {	75	if (likely(nskb)) {
76	if (skb->sk)	76	if (skb->sk)
77	skb_set_owner_w(skb, skb->sk);	77	skb_set_owner_w(nskb, skb->sk);
78	consume_skb(skb);	78	consume_skb(skb);
79	} else {	79	} else {
80	kfree_skb(skb);	80	kfree_skb(skb);

net/ipv6/route.c+1−1

@@ -3751,7 +3751,7 @@ static struct fib6_info ip6_route_info_create(struct fib6_config cfg, · 3750 unmodified lines
3751	err = PTR_ERR(rt->fib6_metrics);	3751	err = PTR_ERR(rt->fib6_metrics);
3752	/* Do not leave garbage there. */	3752	/* Do not leave garbage there. */
3753	rt->fib6_metrics = (struct dst_metrics *)&dst_default_metrics;	3753	rt->fib6_metrics = (struct dst_metrics *)&dst_default_metrics;
3754	goto out;	3754	goto out_free;
3755	}	3755	}
3756		3756
3757	if (cfg->fc_flags & RTF_ADDRCONF)	3757	if (cfg->fc_flags & RTF_ADDRCONF)

net/ipv6/udp.c+19−6

 					 const struct ipv6hdr *hdr, int offset,
 					 struct udphdr *uh,
 					 struct udp_table *udptable,
+					 struct sock *sk,
 					 struct sk_buff *skb,
 					 struct inet6_skb_parm *opt,
 					 u8 type, u8 code, __be32 info)
 {
+	int (*lookup)(struct sock *sk, struct sk_buff *skb);
 	int network_offset, transport_offset;
-	struct sock *sk;
+	struct udp_sock *up;
 	network_offset = skb_network_offset(skb);
 	transport_offset = skb_transport_offset(skb);
 	/* Transport header needs to point to the UDP header */
 	skb_set_transport_header(skb, offset);
+	if (sk) {
+		up = udp_sk(sk);
+		lookup = READ_ONCE(up->encap_err_lookup);
+		if (lookup && lookup(sk, skb))
+			sk = NULL;
+		goto out;
+	}
 	sk = __udp6_lib_lookup(net, &hdr->daddr, uh->source,
 			       &hdr->saddr, uh->dest,
 			       inet6_iif(skb), 0, udptable, skb);
 	if (sk) {
-		int (*lookup)(struct sock *sk, struct sk_buff *skb);
+		up = udp_sk(sk);
-		struct udp_sock *up = udp_sk(sk);
 		lookup = READ_ONCE(up->encap_err_lookup);
 		if (!lookup || lookup(sk, skb))
 			sk = NULL;
 	}
+out:
 	if (!sk) {
 		sk = ERR_PTR(__udp6_lib_err_encap_no_sk(skb, opt, type, code,
 							offset, info));
 	sk = __udp6_lib_lookup(net, daddr, uh->dest, saddr, uh->source,
 			       inet6_iif(skb), inet6_sdif(skb), udptable, NULL);
 	if (!sk || udp_sk(sk)->encap_type) {
 		/* No socket for error: try tunnels before discarding */
-		sk = ERR_PTR(-ENOENT);
 		if (static_branch_unlikely(&udpv6_encap_needed_key)) {
 			sk = __udp6_lib_err_encap(net, hdr, offset, uh,
-						  udptable, skb,
+						  udptable, sk, skb,
 						  opt, type, code, info);
 			if (!sk)
 				return 0;
-		}
+		} else
+			sk = ERR_PTR(-ENOENT);
 		if (IS_ERR(sk)) {
 			__ICMP6_INC_STATS(net, __in6_dev_get(skb->dev),

net/netrom/nr_timer.c+11−9

 		   is accepted() it isn't 'dead' so doesn't get removed. */
 		if (sock_flag(sk, SOCK_DESTROY) ||
 		    (sk->sk_state == TCP_LISTEN && sock_flag(sk, SOCK_DEAD))) {
-			sock_hold(sk);
 			bh_unlock_sock(sk);
 			nr_destroy_socket(sk);
-			sock_put(sk);
+			goto out;
-			return;
 		}
 		break;
 	nr_start_heartbeat(sk);
 	bh_unlock_sock(sk);
+out:
+	sock_put(sk);
 }
 static void nr_t2timer_expiry(struct timer_list *t)
 		nr_enquiry_response(sk);
 	}
 	bh_unlock_sock(sk);
+	sock_put(sk);
 }
 static void nr_t4timer_expiry(struct timer_list *t)
 	bh_lock_sock(sk);
 	nr_sk(sk)->condition &= ~NR_COND_PEER_RX_BUSY;
 	bh_unlock_sock(sk);
+	sock_put(sk);
 }
 static void nr_idletimer_expiry(struct timer_list *t)
 		sock_set_flag(sk, SOCK_DEAD);
 	}
 	bh_unlock_sock(sk);
+	sock_put(sk);
 }
 static void nr_t1timer_expiry(struct timer_list *t)
 	case NR_STATE_1:
 		if (nr->n2count == nr->n2) {
 			nr_disconnect(sk, ETIMEDOUT);
-			bh_unlock_sock(sk);
+			goto out;
-			return;
 		} else {
 			nr->n2count++;
 			nr_write_internal(sk, NR_CONNREQ);
 	case NR_STATE_2:
 		if (nr->n2count == nr->n2) {
 			nr_disconnect(sk, ETIMEDOUT);
-			bh_unlock_sock(sk);
+			goto out;
-			return;
 		} else {
 			nr->n2count++;
 			nr_write_internal(sk, NR_DISCREQ);
 	case NR_STATE_3:
 		if (nr->n2count == nr->n2) {
 			nr_disconnect(sk, ETIMEDOUT);
-			bh_unlock_sock(sk);
+			goto out;
-			return;
 		} else {
 			nr->n2count++;
 			nr_requeue_frames(sk);
 	}
 	nr_start_t1timer(sk);
+out:
 	bh_unlock_sock(sk);
+	sock_put(sk);
 }

net/sched/act_skbmod.c+8−4

 */
 #include <linux/module.h>
+#include <linux/if_arp.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/skbuff.h>
 	tcf_lastuse_update(&d->tcf_tm);
 	bstats_cpu_update(this_cpu_ptr(d->common.cpu_bstats), skb);
+	action = READ_ONCE(d->tcf_action);
+	if (unlikely(action == TC_ACT_SHOT))
+		goto drop;
+	if (!skb->dev || skb->dev->type != ARPHRD_ETHER)
+		return action;
 	/* XXX: if you are going to edit more fields beyond ethernet header
 	 * (example when you add IP header replacement or vlan swap)
 	 * then MAX_EDIT_LEN needs to change appropriately
 	if (unlikely(err)) /* best policy is to drop on the floor */
 		goto drop;
-	action = READ_ONCE(d->tcf_action);
-	if (unlikely(action == TC_ACT_SHOT))
-		goto drop;
 	p = rcu_dereference_bh(d->skbmod_p);
 	flags = p->flags;
 	if (flags & SKBMOD_F_DMAC)

net/sched/cls_api.c+1−1

@@ -2897,7 +2897,7 @@ replay: · 2896 unmodified lines
2897	break;	2897	break;
2898	case RTM_GETCHAIN:	2898	case RTM_GETCHAIN:
2899	err = tc_chain_notify(chain, skb, n->nlmsg_seq,	2899	err = tc_chain_notify(chain, skb, n->nlmsg_seq,
2900	n->nlmsg_seq, n->nlmsg_type, true);	2900	n->nlmsg_flags, n->nlmsg_type, true);
2901	if (err < 0)	2901	if (err < 0)
2902	NL_SET_ERR_MSG(extack, "Failed to send chain notify message");	2902	NL_SET_ERR_MSG(extack, "Failed to send chain notify message");
2903	break;	2903	break;

net/sched/cls_tcindex.c+4−1

 			     TCA_TCINDEX_POLICE);
 }
+static void tcindex_free_perfect_hash(struct tcindex_data *cp);
 static void tcindex_partial_destroy_work(struct work_struct *work)
 {
 	struct tcindex_data *p = container_of(to_rcu_work(work),
 					      rwork);
 	rtnl_lock();
-	kfree(p->perfect);
+	if (p->perfect)
+		tcindex_free_perfect_hash(p);
 	kfree(p);
 	rtnl_unlock();
 }

net/sctp/auth.c+2−0

@@ -860,6 +860,8 @@ int sctp_auth_set_key(struct sctp_endpoint *ep, · 859 unmodified lines
860	if (replace) {	860	if (replace) {
861	list_del_init(&shkey->key_list);	861	list_del_init(&shkey->key_list);
862	sctp_auth_shkey_release(shkey);	862	sctp_auth_shkey_release(shkey);
		863	if (asoc && asoc->active_key_id == auth_key->sca_keynumber)
		864	sctp_auth_asoc_init_active_key(asoc, GFP_KERNEL);
863	}	865	}
864	list_add(&cur_key->key_list, sh_keys);	866	list_add(&cur_key->key_list, sh_keys);
865		867

net/sctp/output.c+2−2

@@ -104,8 +104,8 @@ void sctp_packet_config(struct sctp_packet *packet, __u32 vtag, · 103 unmodified lines
104	if (asoc->param_flags & SPP_PMTUD_ENABLE)	104	if (asoc->param_flags & SPP_PMTUD_ENABLE)
105	sctp_assoc_sync_pmtu(asoc);	105	sctp_assoc_sync_pmtu(asoc);
106	} else if (!sctp_transport_pl_enabled(tp) &&	106	} else if (!sctp_transport_pl_enabled(tp) &&
107	!sctp_transport_pmtu_check(tp)) {	107	asoc->param_flags & SPP_PMTUD_ENABLE) {
108	if (asoc->param_flags & SPP_PMTUD_ENABLE)	108	if (!sctp_transport_pmtu_check(tp))
109	sctp_assoc_sync_pmtu(asoc);	109	sctp_assoc_sync_pmtu(asoc);
110	}	110	}
111		111

net/sctp/socket.c+4−0

 	}
 	if (optlen > 0) {
+		/* Trim it to the biggest size sctp sockopt may need if necessary */
+		optlen = min_t(unsigned int, optlen,
+			       PAGE_ALIGN(USHRT_MAX +
+					  sizeof(__u16) * sizeof(struct sctp_reset_streams)));
 		kopt = memdup_sockptr(optval, optlen);
 		if (IS_ERR(kopt))
 			return PTR_ERR(kopt);

scripts/Makefile.build+1−1

@@ -386,7 +386,7 @@ ifeq ($(CONFIG_LTO_CLANG) $(CONFIG_MODVERSIONS),y y) · 385 unmodified lines
386	cmd_update_lto_symversions = \	386	cmd_update_lto_symversions = \
387	rm -f $@.symversions \	387	rm -f $@.symversions \
388	$(foreach n, $(filter-out FORCE,$^), \	388	$(foreach n, $(filter-out FORCE,$^), \
389	$(if $(wildcard $(n).symversions), \	389	$(if $(shell test -s $(n).symversions && echo y), \
390	; cat $(n).symversions >> $@.symversions))	390	; cat $(n).symversions >> $@.symversions))
391	else	391	else
392	cmd_update_lto_symversions = echo >/dev/null	392	cmd_update_lto_symversions = echo >/dev/null

scripts/setlocalversion+8−5

 if test "$CONFIG_LOCALVERSION_AUTO" = "y"; then
 	# full scm version string
 	res="$res$(scm_version)"
-elif [ -z "${LOCALVERSION}" ]; then
+elif [ "${LOCALVERSION+set}" != "set" ]; then
-	# append a plus sign if the repository is not in a clean
+	# If the variable LOCALVERSION is not set, append a plus
-	# annotated or signed tagged state (as git describe only
+	# sign if the repository is not in a clean annotated or
-	# looks at signed or annotated tags - git tag -a/-s) and
+	# signed tagged state (as git describe only looks at signed
-	# LOCALVERSION= is not specified
+	# or annotated tags - git tag -a/-s).
+	#
+	# If the variable LOCALVERSION is set (including being set
+	# to an empty string), we don't want to append a plus sign.
 	scm=$(scm_version --short)
 	res="$res${scm:++}"
 fi

scripts/spdxcheck.py+1−1

@@ -44,7 +44,7 @@ def read_spdxdata(repo): · 43 unmodified lines
44	continue	44	continue
45		45
46	exception = None	46	exception = None
47	for l in open(el.path).readlines():	47	for l in open(el.path, encoding="utf-8").readlines():
48	if l.startswith('Valid-License-Identifier:'):	48	if l.startswith('Valid-License-Identifier:'):
49	lid = l.split(':')[1].strip().upper()	49	lid = l.split(':')[1].strip().upper()
50	if lid in spdx.licenses:	50	if lid in spdx.licenses:

sound/soc/mediatek/mt8183/mt8183-dai-adda.c+1−0

@@ -341,6 +341,7 @@ static int set_mtkaif_rx(struct mtk_base_afe *afe) · 340 unmodified lines
341	case MT8183_MTKAIF_PROTOCOL_1:	341	case MT8183_MTKAIF_PROTOCOL_1:
342	regmap_write(afe->regmap, AFE_AUD_PAD_TOP, 0x31);	342	regmap_write(afe->regmap, AFE_AUD_PAD_TOP, 0x31);
343	regmap_write(afe->regmap, AFE_ADDA_MTKAIF_CFG0, 0x0);	343	regmap_write(afe->regmap, AFE_ADDA_MTKAIF_CFG0, 0x0);
		344	break;
344	default:	345	default:
345	break;	346	break;
346	}	347	}

tools/arch/arm64/include/uapi/asm/unistd.h+1−0

@@ -20,5 +20,6 @@ · 19 unmodified lines
20	#define __ARCH_WANT_SET_GET_RLIMIT	20	#define __ARCH_WANT_SET_GET_RLIMIT
21	#define __ARCH_WANT_TIME32_SYSCALLS	21	#define __ARCH_WANT_TIME32_SYSCALLS
22	#define __ARCH_WANT_SYS_CLONE3	22	#define __ARCH_WANT_SYS_CLONE3
		23	#define __ARCH_WANT_MEMFD_SECRET
23		24
24	#include <asm-generic/unistd.h>	25	#include <asm-generic/unistd.h>

tools/bpf/bpftool/common.c+5−0

 	int err = 0;
 	file = malloc(strlen(name) + 1);
+	if (!file) {
+		p_err("mem alloc failed");
+		return -1;
+	}
 	strcpy(file, name);
 	dir = dirname(file);

tools/include/linux/kconfig.h+0−6

 /* CONFIG_CC_VERSION_TEXT (Do not delete this comment. See help in Kconfig) */
-#ifdef CONFIG_CPU_BIG_ENDIAN
-#define __BIG_ENDIAN 4321
-#else
-#define __LITTLE_ENDIAN 1234
-#endif
 #define __ARG_PLACEHOLDER_1 0,
 #define __take_second_arg(__ignored, val, ...) val

tools/include/uapi/asm-generic/unistd.h+6−1

 #define __NR_landlock_restrict_self 446
 __SYSCALL(__NR_landlock_restrict_self, sys_landlock_restrict_self)
+#ifdef __ARCH_WANT_MEMFD_SECRET
+#define __NR_memfd_secret 447
+__SYSCALL(__NR_memfd_secret, sys_memfd_secret)
+#endif
 #undef __NR_syscalls
-#define __NR_syscalls 447
+#define __NR_syscalls 448
 /*
  * 32 bit systems traditionally used different

tools/perf/arch/x86/entry/syscalls/syscall_64.tbl+1−0

@@ -368,6 +368,7 @@ · 367 unmodified lines
368	444 common landlock_create_ruleset sys_landlock_create_ruleset	368	444 common landlock_create_ruleset sys_landlock_create_ruleset
369	445 common landlock_add_rule sys_landlock_add_rule	369	445 common landlock_add_rule sys_landlock_add_rule
370	446 common landlock_restrict_self sys_landlock_restrict_self	370	446 common landlock_restrict_self sys_landlock_restrict_self
		371	447 common memfd_secret sys_memfd_secret
371		372
372	#	373	#
373	# Due to a historical design error, certain syscalls are numbered differently	374	# Due to a historical design error, certain syscalls are numbered differently

tools/perf/builtin-inject.c+9−4

 		dso = machine__findnew_dso_id(machine, filename, id);
 	}
-	if (dso)
+	if (dso) {
+		nsinfo__put(dso->nsinfo);
 		dso->nsinfo = nsi;
-	else
+	} else
 		nsinfo__put(nsi);
 	thread__put(thread);
 	data.path = inject.input_name;
 	inject.session = perf_session__new(&data, inject.output.is_pipe, &inject.tool);
-	if (IS_ERR(inject.session))
+	if (IS_ERR(inject.session)) {
-		return PTR_ERR(inject.session);
+		ret = PTR_ERR(inject.session);
+		goto out_close_output;
+	}
 	if (zstd_init(&(inject.session->zstd_data), 0) < 0)
 		pr_warning("Decompression initialization failed.\n");
 out_delete:
 	zstd_fini(&(inject.session->zstd_data));
 	perf_session__delete(inject.session);
+out_close_output:
+	perf_data__close(&inject.output);
 	free(inject.itrace_synth_opts.vm_tm_corr_args);
 	return ret;
 }

tools/perf/builtin-report.c+22−11

 		.annotation_opts	 = annotation__default_options,
 		.skip_empty		 = true,
 	};
+	char *sort_order_help = sort_help("sort by key(s):");
+	char *field_order_help = sort_help("output field(s): overhead period sample ");
 	const struct option options[] = {
 	OPT_STRING('i', "input", &input_name, "file",
 		    "input file name"),
 	OPT_BOOLEAN(0, "header-only", &report.header_only,
 		    "Show only data header."),
 	OPT_STRING('s', "sort", &sort_order, "key[,key2...]",
-		   sort_help("sort by key(s):")),
+		   sort_order_help),
 	OPT_STRING('F', "fields", &field_order, "key[,keys...]",
-		   sort_help("output field(s): overhead period sample ")),
+		   field_order_help),
 	OPT_BOOLEAN(0, "show-cpu-utilization", &symbol_conf.show_cpu_utilization,
 		    "Show sample percentage for different cpu modes"),
 	OPT_BOOLEAN_FLAG(0, "showcpuutilization", &symbol_conf.show_cpu_utilization,
 	char sort_tmp[128];
 	if (ret < 0)
-		return ret;
+		goto exit;
 	ret = perf_config(report__config, &report);
 	if (ret)
-		return ret;
+		goto exit;
 	argc = parse_options(argc, argv, options, report_usage, 0);
 	if (argc) {
 		report.symbol_filter_str = argv[0];
 	}
-	if (annotate_check_args(&report.annotation_opts) < 0)
+	if (annotate_check_args(&report.annotation_opts) < 0) {
-		return -EINVAL;
+		ret = -EINVAL;
+		goto exit;
+	}
 	if (report.mmaps_mode)
 		report.tasks_mode = true;
 	if (symbol_conf.vmlinux_name &&
 	    access(symbol_conf.vmlinux_name, R_OK)) {
 		pr_err("Invalid file: %s\n", symbol_conf.vmlinux_name);
-		return -EINVAL;
+		ret = -EINVAL;
+		goto exit;
 	}
 	if (symbol_conf.kallsyms_name &&
 	    access(symbol_conf.kallsyms_name, R_OK)) {
 		pr_err("Invalid file: %s\n", symbol_conf.kallsyms_name);
-		return -EINVAL;
+		ret = -EINVAL;
+		goto exit;
 	}
 	if (report.inverted_callchain)
 repeat:
 	session = perf_session__new(&data, false, &report.tool);
-	if (IS_ERR(session))
+	if (IS_ERR(session)) {
-		return PTR_ERR(session);
+		ret = PTR_ERR(session);
+		goto exit;
+	}
 	ret = evswitch__init(&report.evswitch, session->evlist, stderr);
 	if (ret)
-		return ret;
+		goto exit;
 	if (zstd_init(&(session->zstd_data), 0) < 0)
 		pr_warning("Decompression initialization failed. Reported data may be incomplete.\n");
 	zstd_fini(&(session->zstd_data));
 	perf_session__delete(session);
+exit:
+	free(sort_order_help);
+	free(field_order_help);
 	return ret;
 }

tools/perf/builtin-sched.c+30−5

 	err = pthread_attr_init(&attr);
 	BUG_ON(err);
 	err = pthread_attr_setstacksize(&attr,
-			(size_t) max(16 * 1024, PTHREAD_STACK_MIN));
+			(size_t) max(16 * 1024, (int)PTHREAD_STACK_MIN));
 	BUG_ON(err);
 	err = pthread_mutex_lock(&sched->start_work_mutex);
 	BUG_ON(err);
 	sort_dimension__add("pid", &sched->cmp_pid);
 }
+static bool schedstat_events_exposed(void)
+{
+	/*
+	 * Select "sched:sched_stat_wait" event to check
+	 * whether schedstat tracepoints are exposed.
+	 */
+	return IS_ERR(trace_event__tp_format("sched", "sched_stat_wait")) ?
+		false : true;
+}
 static int __cmd_record(int argc, const char **argv)
 {
 	unsigned int rec_argc, i, j;
 		"-m", "1024",
 		"-c", "1",
 		"-e", "sched:sched_switch",
-		"-e", "sched:sched_stat_wait",
-		"-e", "sched:sched_stat_sleep",
-		"-e", "sched:sched_stat_iowait",
 		"-e", "sched:sched_stat_runtime",
 		"-e", "sched:sched_process_fork",
 		"-e", "sched:sched_wakeup_new",
 		"-e", "sched:sched_migrate_task",
 	};
+	/*
+	 * The tracepoints trace_sched_stat_{wait, sleep, iowait}
+	 * are not exposed to user if CONFIG_SCHEDSTATS is not set,
+	 * to prevent "perf sched record" execution failure, determine
+	 * whether to record schedstat events according to actual situation.
+	 */
+	const char * const schedstat_args[] = {
+		"-e", "sched:sched_stat_wait",
+		"-e", "sched:sched_stat_sleep",
+		"-e", "sched:sched_stat_iowait",
+	};
+	unsigned int schedstat_argc = schedstat_events_exposed() ?
+		ARRAY_SIZE(schedstat_args) : 0;
 	struct tep_event *waking_event;
 	/*
 	 * +2 for either "-e", "sched:sched_wakeup" or
 	 * "-e", "sched:sched_waking"
 	 */
-	rec_argc = ARRAY_SIZE(record_args) + 2 + argc - 1;
+	rec_argc = ARRAY_SIZE(record_args) + 2 + schedstat_argc + argc - 1;
 	rec_argv = calloc(rec_argc + 1, sizeof(char *));
 	if (rec_argv == NULL)
 	else
 		rec_argv[i++] = strdup("sched:sched_wakeup");
+	for (j = 0; j < schedstat_argc; j++)
+		rec_argv[i++] = strdup(schedstat_args[j]);
 	for (j = 1; j < (unsigned int)argc; j++, i++)
 		rec_argv[i] = argv[j];

tools/perf/builtin-script.c+8−0

 	}
 }
+static void perf_script__exit(struct perf_script *script)
+{
+	perf_thread_map__put(script->threads);
+	perf_cpu_map__put(script->cpus);
+}
 static int __cmd_script(struct perf_script *script)
 {
 	int ret;
 		zfree(&script.ptime_range);
 	}
+	zstd_fini(&(session->zstd_data));
 	evlist__free_stats(session->evlist);
 	perf_session__delete(session);
+	perf_script__exit(&script);
 	if (script_started)
 		cleanup_scripting();

tools/perf/builtin-stat.c+0−3

@@ -2445,9 +2445,6 @@ int cmd_stat(int argc, const char **argv) · 2444 unmodified lines
2445		2445
2446	evlist__check_cpu_maps(evsel_list);	2446	evlist__check_cpu_maps(evsel_list);
2447		2447
2448	if (perf_pmu__has_hybrid())
2449	stat_config.no_merge = true;
2450
2451	/*	2448	/*
2452	* Initialize thread_map with comm names,	2449	* Initialize thread_map with comm names,
2453	* so we could print it out on output.	2450	* so we could print it out on output.

tools/perf/builtin-trace.c+43−2

@@ -2266,6 +2266,14 @@ static void syscall__augmented_args(struct syscall sc, struct perf_sample *sam · 2265 unmodified lines
2266	return augmented_args;	2266	return augmented_args;
2267	}	2267	}
2268		2268
		2269	static void syscall__exit(struct syscall *sc)
		2270	{
		2271	if (!sc)
		2272	return;
		2273
		2274	free(sc->arg_fmt);
		2275	}
		2276
2269	static int trace__sys_enter(struct trace trace, struct evsel evsel,	2277	static int trace__sys_enter(struct trace trace, struct evsel evsel,
2270	union perf_event *event __maybe_unused,	2278	union perf_event *event __maybe_unused,
2271	struct perf_sample *sample)	2279	struct perf_sample *sample)
@@ -3095,6 +3103,21 @@ static struct evsel *evsel__new_pgfault(u64 config) · 823 unmodified lines
3095	return evsel;	3103	return evsel;
3096	}	3104	}
3097		3105
		3106	static void evlist__free_syscall_tp_fields(struct evlist *evlist)
		3107	{
		3108	struct evsel *evsel;
		3109
		3110	evlist__for_each_entry(evlist, evsel) {
		3111	struct evsel_trace *et = evsel->priv;
		3112
		3113	if (!et \|\| !evsel->tp_format \|\| strcmp(evsel->tp_format->system, "syscalls"))
		3114	continue;
		3115
		3116	free(et->fmt);
		3117	free(et);
		3118	}
		3119	}
		3120
3098	static void trace__handle_event(struct trace trace, union perf_event event, struct perf_sample *sample)	3121	static void trace__handle_event(struct trace trace, union perf_event event, struct perf_sample *sample)
3099	{	3122	{
3100	const u32 type = event->header.type;	3123	const u32 type = event->header.type;
@@ -4130,7 +4153,7 @@ out_disable: · 1029 unmodified lines
4130		4153
4131	out_delete_evlist:	4154	out_delete_evlist:
4132	trace__symbols__exit(trace);	4155	trace__symbols__exit(trace);
4133		4156	evlist__free_syscall_tp_fields(evlist);
4134	evlist__delete(evlist);	4157	evlist__delete(evlist);
4135	cgroup__put(trace->cgroup);	4158	cgroup__put(trace->cgroup);
4136	trace->evlist = NULL;	4159	trace->evlist = NULL;
@@ -4636,6 +4659,9 @@ do_concat: · 499 unmodified lines
4636	err = parse_events_option(&o, lists[0], 0);	4659	err = parse_events_option(&o, lists[0], 0);
4637	}	4660	}
4638	out:	4661	out:
		4662	free(strace_groups_dir);
		4663	free(lists[0]);
		4664	free(lists[1]);
4639	if (sep)	4665	if (sep)
4640	*sep = ',';	4666	*sep = ',';
4641		4667
@@ -4701,6 +4727,21 @@ out: · 59 unmodified lines
4701	return err;	4727	return err;
4702	}	4728	}
4703		4729
		4730	static void trace__exit(struct trace *trace)
		4731	{
		4732	int i;
		4733
		4734	strlist__delete(trace->ev_qualifier);
		4735	free(trace->ev_qualifier_ids.entries);
		4736	if (trace->syscalls.table) {
		4737	for (i = 0; i <= trace->sctbl->syscalls.max_id; i++)
		4738	syscall__exit(&trace->syscalls.table[i]);
		4739	free(trace->syscalls.table);
		4740	}
		4741	syscalltbl__delete(trace->sctbl);
		4742	zfree(&trace->perfconfig_events);
		4743	}
		4744
4704	int cmd_trace(int argc, const char **argv)	4745	int cmd_trace(int argc, const char **argv)
4705	{	4746	{
4706	const char *trace_usage[] = {	4747	const char *trace_usage[] = {
@@ -5135,6 +5176,6 @@ out_close: · 428 unmodified lines
5135	if (output_name != NULL)	5176	if (output_name != NULL)
5136	fclose(trace.output);	5177	fclose(trace.output);
5137	out:	5178	out:
5138	zfree(&trace.perfconfig_events);	5179	trace__exit(&trace);
5139	return err;	5180	return err;
5140	}	5181	}

tools/perf/tests/bpf.c+2−0

 // SPDX-License-Identifier: GPL-2.0
 #include <errno.h>
 #include <stdio.h>
+#include <stdlib.h>
 #include <sys/epoll.h>
 #include <sys/types.h>
 #include <sys/stat.h>
 	}
 out:
+	free(obj_buf);
 	bpf__clear();
 	return ret;
 }

tools/perf/tests/event_update.c+4−2

 	struct evsel *evsel;
 	struct event_name tmp;
 	struct evlist *evlist = evlist__new_default();
+	char *unit = strdup("KRAVA");
 	TEST_ASSERT_VAL("failed to get evlist", evlist);
 	perf_evlist__id_add(&evlist->core, &evsel->core, 0, 0, 123);
-	evsel->unit = strdup("KRAVA");
+	evsel->unit = unit;
 	TEST_ASSERT_VAL("failed to synthesize attr update unit",
 			!perf_event__synthesize_event_update_unit(NULL, evsel, process_event_unit));
 	TEST_ASSERT_VAL("failed to synthesize attr update cpus",
 			!perf_event__synthesize_event_update_cpus(&tmp.tool, evsel, process_event_cpus));
-	perf_cpu_map__put(evsel->core.own_cpus);
+	free(unit);
+	evlist__delete(evlist);
 	return 0;
 }

tools/perf/tests/evsel-roundtrip-name.c+2−1

 #include "tests.h"
 #include "debug.h"
 #include "pmu.h"
+#include "pmu-hybrid.h"
 #include <errno.h>
 #include <linux/kernel.h>
 {
 	int err = 0, ret = 0;
-	if (perf_pmu__has_hybrid())
+	if (perf_pmu__has_hybrid() && perf_pmu__hybrid_mounted("cpu_atom"))
 		return perf_evsel__name_array_test(evsel__hw_names, 2);
 	err = perf_evsel__name_array_test(evsel__hw_names, 1);

tools/perf/tests/maps.c+2−0

@@ -116,5 +116,7 @@ int test__maps__merge_in(struct test *t __maybe_unused, int subtest __maybe_unus · 115 unmodified lines
116		116
117	ret = check_maps(merged3, ARRAY_SIZE(merged3), &maps);	117	ret = check_maps(merged3, ARRAY_SIZE(merged3), &maps);
118	TEST_ASSERT_VAL("merge check failed", !ret);	118	TEST_ASSERT_VAL("merge check failed", !ret);
		119
		120	maps__exit(&maps);
119	return TEST_OK;	121	return TEST_OK;
120	}	122	}

tools/perf/tests/parse-events.c+10−6

 #include "tests.h"
 #include "debug.h"
 #include "pmu.h"
+#include "pmu-hybrid.h"
 #include <dirent.h>
 #include <errno.h>
 #include <sys/types.h>
 {
 	struct evsel *evsel = evlist__first(evlist);
+	if (!perf_pmu__hybrid_mounted("cpu_atom")) {
+		TEST_ASSERT_VAL("wrong number of entries", 1 == evlist->core.nr_entries);
+		TEST_ASSERT_VAL("wrong type", PERF_TYPE_RAW == evsel->core.attr.type);
+		TEST_ASSERT_VAL("wrong config", 0x1a == evsel->core.attr.config);
+		return 0;
+	}
 	TEST_ASSERT_VAL("wrong number of entries", 2 == evlist->core.nr_entries);
 	TEST_ASSERT_VAL("wrong type", PERF_TYPE_RAW == evsel->core.attr.type);
 	TEST_ASSERT_VAL("wrong config", 0x1a == evsel->core.attr.config);
 {
 	struct evsel *evsel = evlist__first(evlist);
-	TEST_ASSERT_VAL("wrong number of entries", 2 == evlist->core.nr_entries);
+	TEST_ASSERT_VAL("wrong number of entries", 1 == evlist->core.nr_entries);
 	TEST_ASSERT_VAL("wrong type", PERF_TYPE_HW_CACHE == evsel->core.attr.type);
 	TEST_ASSERT_VAL("wrong config", 0x2 == (evsel->core.attr.config & 0xffffffff));
-	evsel = evsel__next(evsel);
-	TEST_ASSERT_VAL("wrong type", PERF_TYPE_HW_CACHE == evsel->core.attr.type);
-	TEST_ASSERT_VAL("wrong config", 0x10002 == (evsel->core.attr.config & 0xffffffff));
 	return 0;
 }
 		.id    = 7,
 	},
 	{
-		.name  = "cpu_core/LLC-loads/,cpu_atom/LLC-load-misses/",
+		.name  = "cpu_core/LLC-loads/",
 		.check = test__hybrid_cache_event,
 		.id    = 8,
 	},

tools/perf/tests/perf-time-to-tsc.c+2−1

 #include "mmap.h"
 #include "tests.h"
 #include "pmu.h"
+#include "pmu-hybrid.h"
 #define CHECK__(x) {				\
 	while ((x) < 0) {			\
 	 * For hybrid "cycles:u", it creates two events.
 	 * Init the second evsel here.
 	 */
-	if (perf_pmu__has_hybrid()) {
+	if (perf_pmu__has_hybrid() && perf_pmu__hybrid_mounted("cpu_atom")) {
 		evsel = evsel__next(evsel);
 		evsel->core.attr.comm = 1;
 		evsel->core.attr.disabled = 1;

tools/perf/tests/topology.c+1−0

@@ -61,6 +61,7 @@ static int session_write_header(char *path) · 60 unmodified lines
61	TEST_ASSERT_VAL("failed to write header",	61	TEST_ASSERT_VAL("failed to write header",
62	!perf_session__write_header(session, session->evlist, data.file.fd, true));	62	!perf_session__write_header(session, session->evlist, data.file.fd, true));
63		63
		64	evlist__delete(session->evlist);
64	perf_session__delete(session);	65	perf_session__delete(session);
65		66
66	return 0;	67	return 0;

tools/perf/util/cs-etm.c+167−1

@@ -2683,6 +2683,172 @@ static u64 cs_etm__create_meta_blk(u64 buff_in, int *buff_in_offset, · 2682 unmodified lines
2683	return metadata;	2683	return metadata;
2684	}	2684	}
2685		2685
		2686	/**
		2687	* Puts a fragment of an auxtrace buffer into the auxtrace queues based
		2688	* on the bounds of aux_event, if it matches with the buffer that's at
		2689	* file_offset.
		2690	*
		2691	* Normally, whole auxtrace buffers would be added to the queue. But we
		2692	* want to reset the decoder for every PERF_RECORD_AUX event, and the decoder
		2693	* is reset across each buffer, so splitting the buffers up in advance has
		2694	* the same effect.
		2695	*/
		2696	static int cs_etm__queue_aux_fragment(struct perf_session *session, off_t file_offset, size_t sz,
		2697	struct perf_record_aux aux_event, struct perf_sample sample)
		2698	{
		2699	int err;
		2700	char buf[PERF_SAMPLE_MAX_SIZE];
		2701	union perf_event *auxtrace_event_union;
		2702	struct perf_record_auxtrace *auxtrace_event;
		2703	union perf_event auxtrace_fragment;
		2704	__u64 aux_offset, aux_size;
		2705
		2706	struct cs_etm_auxtrace *etm = container_of(session->auxtrace,
		2707	struct cs_etm_auxtrace,
		2708	auxtrace);
		2709
		2710	/*
		2711	* There should be a PERF_RECORD_AUXTRACE event at the file_offset that we got
		2712	* from looping through the auxtrace index.
		2713	*/
		2714	err = perf_session__peek_event(session, file_offset, buf,
		2715	PERF_SAMPLE_MAX_SIZE, &auxtrace_event_union, NULL);
		2716	if (err)
		2717	return err;
		2718	auxtrace_event = &auxtrace_event_union->auxtrace;
		2719	if (auxtrace_event->header.type != PERF_RECORD_AUXTRACE)
		2720	return -EINVAL;
		2721
		2722	if (auxtrace_event->header.size < sizeof(struct perf_record_auxtrace) \|\|
		2723	auxtrace_event->header.size != sz) {
		2724	return -EINVAL;
		2725	}
		2726
		2727	/*
		2728	* In per-thread mode, CPU is set to -1, but TID will be set instead. See
		2729	* auxtrace_mmap_params__set_idx(). Return 'not found' if neither CPU nor TID match.
		2730	*/
		2731	if ((auxtrace_event->cpu == (__u32) -1 && auxtrace_event->tid != sample->tid) \|\|
		2732	auxtrace_event->cpu != sample->cpu)
		2733	return 1;
		2734
		2735	if (aux_event->flags & PERF_AUX_FLAG_OVERWRITE) {
		2736	/*
		2737	* Clamp size in snapshot mode. The buffer size is clamped in
		2738	* __auxtrace_mmap__read() for snapshots, so the aux record size doesn't reflect
		2739	* the buffer size.
		2740	*/
		2741	aux_size = min(aux_event->aux_size, auxtrace_event->size);
		2742
		2743	/*
		2744	* In this mode, the head also points to the end of the buffer so aux_offset
		2745	* needs to have the size subtracted so it points to the beginning as in normal mode
		2746	*/
		2747	aux_offset = aux_event->aux_offset - aux_size;
		2748	} else {
		2749	aux_size = aux_event->aux_size;
		2750	aux_offset = aux_event->aux_offset;
		2751	}
		2752
		2753	if (aux_offset >= auxtrace_event->offset &&
		2754	aux_offset + aux_size <= auxtrace_event->offset + auxtrace_event->size) {
		2755	/*
		2756	* If this AUX event was inside this buffer somewhere, create a new auxtrace event
		2757	* based on the sizes of the aux event, and queue that fragment.
		2758	*/
		2759	auxtrace_fragment.auxtrace = *auxtrace_event;
		2760	auxtrace_fragment.auxtrace.size = aux_size;
		2761	auxtrace_fragment.auxtrace.offset = aux_offset;
		2762	file_offset += aux_offset - auxtrace_event->offset + auxtrace_event->header.size;
		2763
		2764	pr_debug3("CS ETM: Queue buffer size: %#"PRI_lx64" offset: %#"PRI_lx64
		2765	" tid: %d cpu: %d\n", aux_size, aux_offset, sample->tid, sample->cpu);
		2766	return auxtrace_queues__add_event(&etm->queues, session, &auxtrace_fragment,
		2767	file_offset, NULL);
		2768	}
		2769
		2770	/* Wasn't inside this buffer, but there were no parse errors. 1 == 'not found' */
		2771	return 1;
		2772	}
		2773
		2774	static int cs_etm__queue_aux_records_cb(struct perf_session session, union perf_event event,
		2775	u64 offset __maybe_unused, void *data __maybe_unused)
		2776	{
		2777	struct perf_sample sample;
		2778	int ret;
		2779	struct auxtrace_index_entry *ent;
		2780	struct auxtrace_index *auxtrace_index;
		2781	struct evsel *evsel;
		2782	size_t i;
		2783
		2784	/* Don't care about any other events, we're only queuing buffers for AUX events */
		2785	if (event->header.type != PERF_RECORD_AUX)
		2786	return 0;
		2787
		2788	if (event->header.size < sizeof(struct perf_record_aux))
		2789	return -EINVAL;
		2790
		2791	/* Truncated Aux records can have 0 size and shouldn't result in anything being queued. */
		2792	if (!event->aux.aux_size)
		2793	return 0;
		2794
		2795	/*
		2796	* Parse the sample, we need the sample_id_all data that comes after the event so that the
		2797	* CPU or PID can be matched to an AUXTRACE buffer's CPU or PID.
		2798	*/
		2799	evsel = evlist__event2evsel(session->evlist, event);
		2800	if (!evsel)
		2801	return -EINVAL;
		2802	ret = evsel__parse_sample(evsel, event, &sample);
		2803	if (ret)
		2804	return ret;
		2805
		2806	/*
		2807	* Loop through the auxtrace index to find the buffer that matches up with this aux event.
		2808	*/
		2809	list_for_each_entry(auxtrace_index, &session->auxtrace_index, list) {
		2810	for (i = 0; i < auxtrace_index->nr; i++) {
		2811	ent = &auxtrace_index->entries[i];
		2812	ret = cs_etm__queue_aux_fragment(session, ent->file_offset,
		2813	ent->sz, &event->aux, &sample);
		2814	/*
		2815	* Stop search on error or successful values. Continue search on
		2816	* 1 ('not found')
		2817	*/
		2818	if (ret != 1)
		2819	return ret;
		2820	}
		2821	}
		2822
		2823	/*
		2824	* Couldn't find the buffer corresponding to this aux record, something went wrong. Warn but
		2825	* don't exit with an error because it will still be possible to decode other aux records.
		2826	*/
		2827	pr_err("CS ETM: Couldn't find auxtrace buffer for aux_offset: %#"PRI_lx64
		2828	" tid: %d cpu: %d\n", event->aux.aux_offset, sample.tid, sample.cpu);
		2829	return 0;
		2830	}
		2831
		2832	static int cs_etm__queue_aux_records(struct perf_session *session)
		2833	{
		2834	struct auxtrace_index *index = list_first_entry_or_null(&session->auxtrace_index,
		2835	struct auxtrace_index, list);
		2836	if (index && index->nr > 0)
		2837	return perf_session__peek_events(session, session->header.data_offset,
		2838	session->header.data_size,
		2839	cs_etm__queue_aux_records_cb, NULL);
		2840
		2841	/*
		2842	* We would get here if there are no entries in the index (either no auxtrace
		2843	* buffers or no index at all). Fail silently as there is the possibility of
		2844	* queueing them in cs_etm__process_auxtrace_event() if etm->data_queued is still
		2845	* false.
		2846	*
		2847	* In that scenario, buffers will not be split by AUX records.
		2848	*/
		2849	return 0;
		2850	}
		2851
2686	int cs_etm__process_auxtrace_info(union perf_event *event,	2852	int cs_etm__process_auxtrace_info(union perf_event *event,
2687	struct perf_session *session)	2853	struct perf_session *session)
2688	{	2854	{
@@ -2883,7 +3049,7 @@ int cs_etm__process_auxtrace_info(union perf_event *event, · 194 unmodified lines
2883	if (err)	3049	if (err)
2884	goto err_delete_thread;	3050	goto err_delete_thread;
2885		3051
2886	err = auxtrace_queues__process_index(&etm->queues, session);	3052	err = cs_etm__queue_aux_records(session);
2887	if (err)	3053	if (err)
2888	goto err_delete_thread;	3054	goto err_delete_thread;
2889		3055

tools/perf/util/data.c+1−1

@@ -20,7 +20,7 @@ · 19 unmodified lines
20		20
21	static void close_dir(struct perf_data_file *files, int nr)	21	static void close_dir(struct perf_data_file *files, int nr)
22	{	22	{
23	while (--nr >= 1) {	23	while (--nr >= 0) {
24	close(files[nr].fd);	24	close(files[nr].fd);
25	zfree(&files[nr].path);	25	zfree(&files[nr].path);
26	}	26	}

tools/perf/util/dso.c+3−1

 	struct map *map = NULL;
 	struct dso *dso = dso__new(name);
-	if (dso)
+	if (dso) {
 		map = map__new2(0, dso);
+		dso__put(dso);
+	}
 	return map;
 }

tools/perf/util/dwarf-aux.c+4−4

@@ -113,14 +113,14 @@ static Dwarf_Line cu_getsrc_die(Dwarf_Die cu_die, Dwarf_Addr addr) · 112 unmodified lines
113	*	113	*
114	* Find a line number and file name for @addr in @cu_die.	114	* Find a line number and file name for @addr in @cu_die.
115	*/	115	*/
116	int cu_find_lineinfo(Dwarf_Die *cu_die, unsigned long addr,	116	int cu_find_lineinfo(Dwarf_Die *cu_die, Dwarf_Addr addr,
117	const char *fname, int lineno)	117	const char *fname, int lineno)
118	{	118	{
119	Dwarf_Line *line;	119	Dwarf_Line *line;
120	Dwarf_Die die_mem;	120	Dwarf_Die die_mem;
121	Dwarf_Addr faddr;	121	Dwarf_Addr faddr;
122		122
123	if (die_find_realfunc(cu_die, (Dwarf_Addr)addr, &die_mem)	123	if (die_find_realfunc(cu_die, addr, &die_mem)
124	&& die_entrypc(&die_mem, &faddr) == 0 &&	124	&& die_entrypc(&die_mem, &faddr) == 0 &&
125	faddr == addr) {	125	faddr == addr) {
126	*fname = dwarf_decl_file(&die_mem);	126	*fname = dwarf_decl_file(&die_mem);
@@ -128,7 +128,7 @@ int cu_find_lineinfo(Dwarf_Die *cu_die, unsigned long addr, · 1 unmodified line
128	goto out;	128	goto out;
129	}	129	}
130		130
131	line = cu_getsrc_die(cu_die, (Dwarf_Addr)addr);	131	line = cu_getsrc_die(cu_die, addr);
132	if (line && dwarf_lineno(line, lineno) == 0) {	132	if (line && dwarf_lineno(line, lineno) == 0) {
133	*fname = dwarf_linesrc(line, NULL, NULL);	133	*fname = dwarf_linesrc(line, NULL, NULL);
134	if (!*fname)	134	if (!*fname)

tools/perf/util/dwarf-aux.h+1−1

@@ -19,7 +19,7 @@ const char cu_find_realpath(Dwarf_Die cu_die, const char *fname); · 18 unmodified lines
19	const char cu_get_comp_dir(Dwarf_Die cu_die);	19	const char cu_get_comp_dir(Dwarf_Die cu_die);
20		20
21	/* Get a line number and file name for given address */	21	/* Get a line number and file name for given address */
22	int cu_find_lineinfo(Dwarf_Die *cudie, unsigned long addr,	22	int cu_find_lineinfo(Dwarf_Die *cudie, Dwarf_Addr addr,
23	const char *fname, int lineno);	23	const char *fname, int lineno);
24		24
25	/* Walk on functions at given address */	25	/* Walk on functions at given address */

tools/perf/util/env.c+2−0

 	zfree(&env->cpuid);
 	zfree(&env->cmdline);
 	zfree(&env->cmdline_argv);
+	zfree(&env->sibling_dies);
 	zfree(&env->sibling_cores);
 	zfree(&env->sibling_threads);
 	zfree(&env->pmu_mappings);
 	zfree(&env->cpu);
+	zfree(&env->cpu_pmu_caps);
 	zfree(&env->numa_map);
 	for (i = 0; i < env->nr_numa_nodes; i++)

tools/perf/util/lzma.c+5−3

 			if (ferror(infile)) {
 				pr_err("lzma: read error: %s\n", strerror(errno));
-				goto err_fclose;
+				goto err_lzma_end;
 			}
 			if (feof(infile))
 			if (writen(output_fd, buf_out, write_size) != write_size) {
 				pr_err("lzma: write error: %s\n", strerror(errno));
-				goto err_fclose;
+				goto err_lzma_end;
 			}
 			strm.next_out  = buf_out;
 				break;
 			pr_err("lzma: failed %s\n", lzma_strerror(ret));
-			goto err_fclose;
+			goto err_lzma_end;
 		}
 	}
 	err = 0;
+err_lzma_end:
+	lzma_end(&strm);
 err_fclose:
 	fclose(infile);
 	return err;

tools/perf/util/map.c+2−0

@@ -192,6 +192,8 @@ struct map map__new(struct machine machine, u64 start, u64 len, · 191 unmodified lines
192	if (!(prot & PROT_EXEC))	192	if (!(prot & PROT_EXEC))
193	dso__set_loaded(dso);	193	dso__set_loaded(dso);
194	}	194	}
		195
		196	nsinfo__put(dso->nsinfo);
195	dso->nsinfo = nsi;	197	dso->nsinfo = nsi;
196		198
197	if (build_id__is_defined(bid))	199	if (build_id__is_defined(bid))

tools/perf/util/pfm.c+1−1

@@ -99,7 +99,7 @@ int parse_libpfm_events_option(const struct option opt, const char str, · 98 unmodified lines
99	grp_leader = evsel;	99	grp_leader = evsel;
100		100
101	if (grp_evt > -1) {	101	if (grp_evt > -1) {
102	evsel->leader = grp_leader;	102	evsel__set_leader(evsel, grp_leader);
103	grp_leader->core.nr_members++;	103	grp_leader->core.nr_members++;
104	grp_evt++;	104	grp_evt++;
105	}	105	}

tools/perf/util/pmu.c+8−1

 	LIST_HEAD(format);
 	LIST_HEAD(aliases);
 	__u32 type;
+	bool is_hybrid = perf_pmu__hybrid_mounted(name);
+	/*
+	 * Check pmu name for hybrid and the pmu may be invalid in sysfs
+	 */
+	if (!strncmp(name, "cpu_", 4) && !is_hybrid)
+		return NULL;
 	/*
 	 * The pmu data we store & need consists of the pmu
 	pmu->is_uncore = pmu_is_uncore(name);
 	if (pmu->is_uncore)
 		pmu->id = pmu_id(name);
-	pmu->is_hybrid = perf_pmu__hybrid_mounted(name);
+	pmu->is_hybrid = is_hybrid;
 	pmu->max_precise = pmu_max_precise(name);
 	pmu_add_cpu_aliases(&aliases, pmu);
 	pmu_add_sys_aliases(&aliases, pmu);

tools/perf/util/probe-event.c+26−27

 		struct map *map;
 		map = dso__new_map(target);
-		if (map && map->dso)
+		if (map && map->dso) {
+			nsinfo__put(map->dso->nsinfo);
 			map->dso->nsinfo = nsinfo__get(nsi);
+		}
 		return map;
 	} else {
 		return kernel_get_module_map(target);
 		clear_probe_trace_event(tevs + i);
 }
-static bool kprobe_blacklist__listed(unsigned long address);
+static bool kprobe_blacklist__listed(u64 address);
-static bool kprobe_warn_out_range(const char *symbol, unsigned long address)
+static bool kprobe_warn_out_range(const char *symbol, u64 address)
 {
 	struct map *map;
 	bool ret = false;
 	pr_debug("Symbol %s address found : %" PRIx64 "\n",
 			pp->function, address);
-	ret = debuginfo__find_probe_point(dinfo, (unsigned long)address,
+	ret = debuginfo__find_probe_point(dinfo, address, result);
-					  result);
 	if (ret <= 0)
 		ret = (!ret) ? -ENOENT : ret;
 	else {
 }
-static int get_text_start_address(const char *exec, unsigned long *address,
+static int get_text_start_address(const char *exec, u64 *address,
 				  struct nsinfo *nsi)
 {
 	Elf *elf;
 					    bool is_kprobe)
 {
 	struct debuginfo *dinfo = NULL;
-	unsigned long stext = 0;
+	u64 stext = 0;
 	u64 addr = tp->address;
 	int ret = -ENOENT;
 	dinfo = debuginfo_cache__open(tp->module, verbose <= 0);
 	if (dinfo)
-		ret = debuginfo__find_probe_point(dinfo,
+		ret = debuginfo__find_probe_point(dinfo, addr, pp);
-						 (unsigned long)addr, pp);
 	else
 		ret = -ENOENT;
 /* Adjust symbol name and address */
 static int post_process_probe_trace_point(struct probe_trace_point *tp,
-					   struct map *map, unsigned long offs)
+					   struct map *map, u64 offs)
 {
 	struct symbol *sym;
 	u64 addr = tp->address - offs;
 					int ntevs, const char *pathname)
 {
 	struct map *map;
-	unsigned long stext = 0;
+	u64 stext = 0;
 	int i, ret = 0;
 	/* Prepare a map for offline binary */
 					  struct nsinfo *nsi)
 {
 	int i, ret = 0;
-	unsigned long stext = 0;
+	u64 stext = 0;
 	if (!exec)
 		return 0;
 	mod_name = find_module_name(module);
 	for (i = 0; i < ntevs; i++) {
 		ret = post_process_probe_trace_point(&tevs[i].point,
-						map, (unsigned long)text_offs);
+						map, text_offs);
 		if (ret < 0)
 			break;
 		tevs[i].point.module =
 		 * so tmp[1] should always valid (but could be '\0').
 		 */
 		if (tmp && !strncmp(tmp, "0x", 2)) {
-			pp->abs_address = strtoul(pp->function, &tmp, 0);
+			pp->abs_address = strtoull(pp->function, &tmp, 0);
 			if (*tmp != '\0') {
 				semantic_error("Invalid absolute address.\n");
 				return -EINVAL;
 			argv[i] = NULL;
 			argc -= 1;
 		} else
-			tp->address = strtoul(fmt1_str, NULL, 0);
+			tp->address = strtoull(fmt1_str, NULL, 0);
 	} else {
 		/* Only the symbol-based probe has offset */
 		tp->symbol = strdup(fmt1_str);
 		return -EINVAL;
 	/* Use the tp->address for uprobes */
-	err = strbuf_addf(buf, "%s:0x%lx", tp->module, tp->address);
+	err = strbuf_addf(buf, "%s:0x%" PRIx64, tp->module, tp->address);
 	if (err >= 0 && tp->ref_ctr_offset) {
 		if (!uprobe_ref_ctr_is_supported())
 {
 	if (!strncmp(tp->symbol, "0x", 2)) {
 		/* Absolute address. See try_to_find_absolute_address() */
-		return strbuf_addf(buf, "%s%s0x%lx", tp->module ?: "",
+		return strbuf_addf(buf, "%s%s0x%" PRIx64, tp->module ?: "",
 				  tp->module ? ":" : "", tp->address);
 	} else {
 		return strbuf_addf(buf, "%s%s%s+%lu", tp->module ?: "",
 		pp->function = strdup(tp->symbol);
 		pp->offset = tp->offset;
 	} else {
-		ret = e_snprintf(buf, 128, "0x%" PRIx64, (u64)tp->address);
+		ret = e_snprintf(buf, 128, "0x%" PRIx64, tp->address);
 		if (ret < 0)
 			return ret;
 		pp->function = strdup(buf);
 struct kprobe_blacklist_node {
 	struct list_head list;
-	unsigned long start;
+	u64 start;
-	unsigned long end;
+	u64 end;
 	char *symbol;
 };
 		}
 		INIT_LIST_HEAD(&node->list);
 		list_add_tail(&node->list, blacklist);
-		if (sscanf(buf, "0x%lx-0x%lx", &node->start, &node->end) != 2) {
+		if (sscanf(buf, "0x%" PRIx64 "-0x%" PRIx64, &node->start, &node->end) != 2) {
 			ret = -EINVAL;
 			break;
 		}
 			ret = -ENOMEM;
 			break;
 		}
-		pr_debug2("Blacklist: 0x%lx-0x%lx, %s\n",
+		pr_debug2("Blacklist: 0x%" PRIx64 "-0x%" PRIx64 ", %s\n",
 			  node->start, node->end, node->symbol);
 		ret++;
 	}
 }
 static struct kprobe_blacklist_node *
-kprobe_blacklist__find_by_address(struct list_head *blacklist,
+kprobe_blacklist__find_by_address(struct list_head *blacklist, u64 address)
-				  unsigned long address)
 {
 	struct kprobe_blacklist_node *node;
 	kprobe_blacklist__delete(&kprobe_blacklist);
 }
-static bool kprobe_blacklist__listed(unsigned long address)
+static bool kprobe_blacklist__listed(u64 address)
 {
 	return !!kprobe_blacklist__find_by_address(&kprobe_blacklist, address);
 }
 	 * In __add_probe_trace_events, a NULL symbol is interpreted as
 	 * invalid.
 	 */
-	if (asprintf(&tp->symbol, "0x%lx", tp->address) < 0)
+	if (asprintf(&tp->symbol, "0x%" PRIx64, tp->address) < 0)
 		goto errout;
 	/* For kprobe, check range */
 		goto errout;
 	}
-	if (asprintf(&tp->realname, "abs_%lx", tp->address) < 0)
+	if (asprintf(&tp->realname, "abs_%" PRIx64, tp->address) < 0)
 		goto errout;
 	if (pev->target) {

tools/perf/util/probe-event.h+2−2

@@ -33,7 +33,7 @@ struct probe_trace_point { · 32 unmodified lines
33	char module; / Module name */	33	char module; / Module name */
34	unsigned long offset; /* Offset from symbol */	34	unsigned long offset; /* Offset from symbol */
35	unsigned long ref_ctr_offset; /* SDT reference counter offset */	35	unsigned long ref_ctr_offset; /* SDT reference counter offset */
36	unsigned long address; /* Actual address of the trace point */	36	u64 address; /* Actual address of the trace point */
37	bool retprobe; /* Return probe flag */	37	bool retprobe; /* Return probe flag */
38	};	38	};
39		39
@@ -70,7 +70,7 @@ struct perf_probe_point { · 30 unmodified lines
70	bool retprobe; /* Return probe flag */	70	bool retprobe; /* Return probe flag */
71	char lazy_line; / Lazy matching pattern */	71	char lazy_line; / Lazy matching pattern */
72	unsigned long offset; /* Offset from function entry */	72	unsigned long offset; /* Offset from function entry */
73	unsigned long abs_address; /* Absolute address of the point */	73	u64 abs_address; /* Absolute address of the point */
74	};	74	};
75		75
76	/* Perf probe probing argument field chain */	76	/* Perf probe probing argument field chain */

tools/perf/util/probe-file.c+2−2

 	ret = probe_file__get_events(fd, filter, namelist);
 	if (ret < 0)
-		return ret;
+		goto out;
 	ret = probe_file__del_strlist(fd, namelist);
+out:
 	strlist__delete(namelist);
 	return ret;
 }

tools/perf/util/probe-finder.c+7−8

 	}
 	tp->offset = (unsigned long)(paddr - eaddr);
-	tp->address = (unsigned long)paddr;
+	tp->address = paddr;
 	tp->symbol = strdup(symbol);
 	if (!tp->symbol)
 		return -ENOMEM;
 }
 /* Reverse search */
-int debuginfo__find_probe_point(struct debuginfo *dbg, unsigned long addr,
+int debuginfo__find_probe_point(struct debuginfo *dbg, u64 addr,
 				struct perf_probe_point *ppt)
 {
 	Dwarf_Die cudie, spdie, indie;
 		addr += baseaddr;
 	/* Find cu die */
 	if (!dwarf_addrdie(dbg->dbg, (Dwarf_Addr)addr, &cudie)) {
-		pr_warning("Failed to find debug information for address %lx\n",
+		pr_warning("Failed to find debug information for address %" PRIx64 "\n",
 			   addr);
 		ret = -EINVAL;
 		goto end;
 	}
 	/* Find a corresponding line (filename and lineno) */
-	cu_find_lineinfo(&cudie, addr, &fname, &lineno);
+	cu_find_lineinfo(&cudie, (Dwarf_Addr)addr, &fname, &lineno);
 	/* Don't care whether it failed or not */
 	/* Find a corresponding function (name, baseline and baseaddr) */
 		}
 		fname = dwarf_decl_file(&spdie);
-		if (addr == (unsigned long)baseaddr) {
+		if (addr == baseaddr) {
 			/* Function entry - Relative line number is 0 */
 			lineno = baseline;
 			goto post;
 	if (lineno)
 		ppt->line = lineno - baseline;
 	else if (basefunc) {
-		ppt->offset = addr - (unsigned long)baseaddr;
+		ppt->offset = addr - baseaddr;
 		func = basefunc;
 	}
 }
 static int line_range_walk_cb(const char *fname, int lineno,
-			      Dwarf_Addr addr __maybe_unused,
+			      Dwarf_Addr addr, void *data)
-			      void *data)
 {
 	struct line_finder *lf = data;
 	const char *__fname;

tools/perf/util/probe-finder.h+1−1

@@ -46,7 +46,7 @@ int debuginfo__find_trace_events(struct debuginfo *dbg, · 45 unmodified lines
46	struct probe_trace_event **tevs);	46	struct probe_trace_event **tevs);
47		47
48	/* Find a perf_probe_point from debuginfo */	48	/* Find a perf_probe_point from debuginfo */
49	int debuginfo__find_probe_point(struct debuginfo *dbg, unsigned long addr,	49	int debuginfo__find_probe_point(struct debuginfo *dbg, u64 addr,
50	struct perf_probe_point *ppt);	50	struct perf_probe_point *ppt);
51		51
52	int debuginfo__get_text_offset(struct debuginfo dbg, Dwarf_Addr offs,	52	int debuginfo__get_text_offset(struct debuginfo dbg, Dwarf_Addr offs,

tools/perf/util/session.c+1−0

@@ -306,6 +306,7 @@ void perf_session__delete(struct perf_session *session) · 305 unmodified lines
306	evlist__delete(session->evlist);	306	evlist__delete(session->evlist);
307	perf_data__close(session->data);	307	perf_data__close(session->data);
308	}	308	}
		309	trace_event__cleanup(&session->tevent);
309	free(session);	310	free(session);
310	}	311	}
311		312

tools/perf/util/sort.c+1−1

@@ -3370,7 +3370,7 @@ static void add_hpp_sort_string(struct strbuf sb, struct hpp_dimension s, int · 3369 unmodified lines
3370	add_key(sb, s[i].name, llen);	3370	add_key(sb, s[i].name, llen);
3371	}	3371	}
3372		3372
3373	const char sort_help(const char prefix)	3373	char sort_help(const char prefix)
3374	{	3374	{
3375	struct strbuf sb;	3375	struct strbuf sb;
3376	char *s;	3376	char *s;

tools/perf/util/sort.h+1−1

@@ -302,7 +302,7 @@ void reset_output_field(void); · 301 unmodified lines
302	void sort__setup_elide(FILE *fp);	302	void sort__setup_elide(FILE *fp);
303	void perf_hpp__set_elide(int idx, bool elide);	303	void perf_hpp__set_elide(int idx, bool elide);
304		304
305	const char sort_help(const char prefix);	305	char sort_help(const char prefix);
306		306
307	int report_parse_ignore_callees_opt(const struct option opt, const char arg, int unset);	307	int report_parse_ignore_callees_opt(const struct option opt, const char arg, int unset);
308		308

tools/perf/util/stat-display.c+13−1

 	}
 }
+static bool is_uncore(struct evsel *evsel)
+{
+	struct perf_pmu *pmu = evsel__find_pmu(evsel);
+	return pmu && pmu->is_uncore;
+}
+static bool hybrid_uniquify(struct evsel *evsel)
+{
+	return perf_pmu__has_hybrid() && !is_uncore(evsel);
+}
 static bool collect_data(struct perf_stat_config *config, struct evsel *counter,
 			    void (*cb)(struct perf_stat_config *config, struct evsel *counter, void *data,
 				       bool first),
 	if (counter->merged_stat)
 		return false;
 	cb(config, counter, data, true);
-	if (config->no_merge)
+	if (config->no_merge || hybrid_uniquify(counter))
 		uniquify_event_name(counter);
 	else if (counter->auto_merge_stats)
 		collect_all_aliases(config, counter, cb, data);

tools/testing/kunit/kunit.py+2−0

@@ -12,6 +12,8 @@ import sys · 11 unmodified lines
12	import os	12	import os
13	import time	13	import time
14		14
		15	assert sys.version_info >= (3, 7), "Python version is too old"
		16
15	from collections import namedtuple	17	from collections import namedtuple
16	from enum import Enum, auto	18	from enum import Enum, auto
17		19

tools/testing/kunit/kunit_kernel.py+2−4

 # Author: Felix Guo <felixguoxiuping@gmail.com>
 # Author: Brendan Higgins <brendanhiggins@google.com>
-from __future__ import annotations
 import importlib.util
 import logging
 import subprocess
 import os
 import shutil
 import signal
-from typing import Iterator
+from typing import Iterator, Optional, Tuple
-from typing import Optional
 from contextlib import ExitStack
 		raise ConfigError(arch + ' is not a valid arch')
 def get_source_tree_ops_from_qemu_config(config_path: str,
-					 cross_compile: Optional[str]) -> tuple[
+					 cross_compile: Optional[str]) -> Tuple[
 							 str, LinuxSourceTreeOperations]:
 	# The module name/path has very little to do with where the actual file
 	# exists (I learned this through experimentation and could not find it

tools/testing/kunit/kunit_parser.py+4−2

 def parse_test_result(lines: LineStream) -> TestResult:
 	consume_non_diagnostic(lines)
 	if not lines or not parse_tap_header(lines):
-		return TestResult(TestStatus.NO_TESTS, [], lines)
+		return TestResult(TestStatus.FAILURE_TO_PARSE_TESTS, [], lines)
 	expected_test_suite_num = parse_test_plan(lines)
-	if not expected_test_suite_num:
+	if expected_test_suite_num == 0:
+		return TestResult(TestStatus.NO_TESTS, [], lines)
+	elif expected_test_suite_num is None:
 		return TestResult(TestStatus.FAILURE_TO_PARSE_TESTS, [], lines)
 	test_suites = []
 	for i in range(1, expected_test_suite_num + 1):

tools/testing/kunit/kunit_tool_test.py+13−3

 			kunit_parser.TestStatus.FAILURE,
 			result.status)
+	def test_no_header(self):
+		empty_log = test_data_path('test_is_test_passed-no_tests_run_no_header.log')
+		with open(empty_log) as file:
+			result = kunit_parser.parse_run_tests(
+				kunit_parser.extract_tap_lines(file.readlines()))
+		self.assertEqual(0, len(result.suites))
+		self.assertEqual(
+			kunit_parser.TestStatus.FAILURE_TO_PARSE_TESTS,
+			result.status)
 	def test_no_tests(self):
-		empty_log = test_data_path('test_is_test_passed-no_tests_run.log')
+		empty_log = test_data_path('test_is_test_passed-no_tests_run_with_header.log')
 		with open(empty_log) as file:
 			result = kunit_parser.parse_run_tests(
 				kunit_parser.extract_tap_lines(file.readlines()))
 		with open(crash_log) as file:
 			result = kunit_parser.parse_run_tests(
 				kunit_parser.extract_tap_lines(file.readlines()))
-		print_mock.assert_any_call(StrContains('no tests run!'))
+		print_mock.assert_any_call(StrContains('could not parse test results!'))
 		print_mock.stop()
 		file.close()
 			result["sub_groups"][1]["test_cases"][0])
 	def test_no_tests_json(self):
-		result = self._json_for('test_is_test_passed-no_tests_run.log')
+		result = self._json_for('test_is_test_passed-no_tests_run_with_header.log')
 		self.assertEqual(0, len(result['sub_groups']))
 class StrContains(str):

tools/testing/kunit/test_data/test_is_test_passed-no_tests_run_no_header.logrenamed from tools/testing/kunit/test_data/test_is_test_passed-no_tests_run.log+0−0

File renamed without changes.

tools/testing/kunit/test_data/test_is_test_passed-no_tests_run_with_header.log+2−0

@@ -0,0 +1,2 @@
	1	TAP version 14
	2	1..0

tools/testing/selftests/kvm/include/kvm_util.h+2−1

 	VM_MODE_P40V48_64K,
 	VM_MODE_PXXV48_4K,	/* For 48bits VA but ANY bits PA */
 	VM_MODE_P47V64_4K,
+	VM_MODE_P44V64_4K,
 	NUM_VM_MODES,
 };
 #elif defined(__s390x__)
-#define VM_MODE_DEFAULT			VM_MODE_P47V64_4K
+#define VM_MODE_DEFAULT			VM_MODE_P44V64_4K
 #define MIN_PAGE_SHIFT			12U
 #define ptes_per_page(page_size)	((page_size) / 16)

tools/testing/selftests/kvm/lib/aarch64/processor.c+1−1

@@ -401,7 +401,7 @@ unexpected_exception: · 400 unmodified lines
401	void vm_init_descriptor_tables(struct kvm_vm *vm)	401	void vm_init_descriptor_tables(struct kvm_vm *vm)
402	{	402	{
403	vm->handlers = vm_vaddr_alloc(vm, sizeof(struct handlers),	403	vm->handlers = vm_vaddr_alloc(vm, sizeof(struct handlers),
404	vm->page_size, 0, 0);	404	vm->page_size);
405		405
406	(vm_vaddr_t )addr_gva2hva(vm, (vm_vaddr_t)(&exception_handlers)) = vm->handlers;	406	(vm_vaddr_t )addr_gva2hva(vm, (vm_vaddr_t)(&exception_handlers)) = vm->handlers;
407	}	407	}

tools/testing/selftests/kvm/lib/guest_modes.c+16−0

@@ -22,6 +22,22 @@ void guest_modes_append_default(void) · 21 unmodified lines
22	}	22	}
23	}	23	}
24	#endif	24	#endif
		25	#ifdef __s390x__
		26	{
		27	int kvm_fd, vm_fd;
		28	struct kvm_s390_vm_cpu_processor info;
		29
		30	kvm_fd = open_kvm_dev_path_or_exit();
		31	vm_fd = ioctl(kvm_fd, KVM_CREATE_VM, 0);
		32	kvm_device_access(vm_fd, KVM_S390_VM_CPU_MODEL,
		33	KVM_S390_VM_CPU_PROCESSOR, &info, false);
		34	close(vm_fd);
		35	close(kvm_fd);
		36	/* Starting with z13 we have 47bits of physical address */
		37	if (info.ibc >= 0x30)
		38	guest_mode_append(VM_MODE_P47V64_4K, true, true);
		39	}
		40	#endif
25	}	41	}
26		42
27	void for_each_guest_mode(void (func)(enum vm_guest_mode, void ), void *arg)	43	void for_each_guest_mode(void (func)(enum vm_guest_mode, void ), void *arg)

tools/testing/selftests/kvm/lib/kvm_util.c+5−0

 		[VM_MODE_P40V48_64K]	= "PA-bits:40,  VA-bits:48, 64K pages",
 		[VM_MODE_PXXV48_4K]	= "PA-bits:ANY, VA-bits:48,  4K pages",
 		[VM_MODE_P47V64_4K]	= "PA-bits:47,  VA-bits:64,  4K pages",
+		[VM_MODE_P44V64_4K]	= "PA-bits:44,  VA-bits:64,  4K pages",
 	};
 	_Static_assert(sizeof(strings)/sizeof(char *) == NUM_VM_MODES,
 		       "Missing new mode strings?");
 	{ 40, 48, 0x10000, 16 },
 	{  0,  0,  0x1000, 12 },
 	{ 47, 64,  0x1000, 12 },
+	{ 44, 64,  0x1000, 12 },
 };
 _Static_assert(sizeof(vm_guest_mode_params)/sizeof(struct vm_guest_mode_params) == NUM_VM_MODES,
 	       "Missing new mode params?");
 	case VM_MODE_P47V64_4K:
 		vm->pgtable_levels = 5;
 		break;
+	case VM_MODE_P44V64_4K:
+		vm->pgtable_levels = 5;
+		break;
 	default:
 		TEST_FAIL("Unknown guest mode, mode: 0x%x", mode);
 	}

tools/testing/selftests/kvm/set_memory_region_test.c+2−1

@@ -377,7 +377,8 @@ static void test_add_max_memory_regions(void) · 376 unmodified lines
377	(max_mem_slots - 1), MEM_REGION_SIZE >> 10);	377	(max_mem_slots - 1), MEM_REGION_SIZE >> 10);
378		378
379	mem = mmap(NULL, (size_t)max_mem_slots * MEM_REGION_SIZE + alignment,	379	mem = mmap(NULL, (size_t)max_mem_slots * MEM_REGION_SIZE + alignment,
380	PROT_READ \| PROT_WRITE, MAP_PRIVATE \| MAP_ANONYMOUS, -1, 0);	380	PROT_READ \| PROT_WRITE,
		381	MAP_PRIVATE \| MAP_ANONYMOUS \| MAP_NORESERVE, -1, 0);
381	TEST_ASSERT(mem != MAP_FAILED, "Failed to mmap() host");	382	TEST_ASSERT(mem != MAP_FAILED, "Failed to mmap() host");
382	mem_aligned = (void *)(((size_t) mem + alignment - 1) & ~(alignment - 1));	383	mem_aligned = (void *)(((size_t) mem + alignment - 1) & ~(alignment - 1));
383		384

tools/testing/selftests/kvm/x86_64/hyperv_features.c+1−1

@@ -615,7 +615,7 @@ int main(void) · 614 unmodified lines
615		615
616	vm_init_descriptor_tables(vm);	616	vm_init_descriptor_tables(vm);
617	vcpu_init_descriptor_tables(vm, VCPU_ID);	617	vcpu_init_descriptor_tables(vm, VCPU_ID);
618	vm_handle_exception(vm, GP_VECTOR, guest_gp_handler);	618	vm_install_exception_handler(vm, GP_VECTOR, guest_gp_handler);
619		619
620	pr_info("Testing access to Hyper-V specific MSRs\n");	620	pr_info("Testing access to Hyper-V specific MSRs\n");
621	guest_test_msrs_access(vm, addr_gva2hva(vm, msr_gva),	621	guest_test_msrs_access(vm, addr_gva2hva(vm, msr_gva),

tools/testing/selftests/kvm/x86_64/mmu_role_test.c+1−1

@@ -71,7 +71,7 @@ static void mmu_role_test(u32 *cpuid_reg, u32 evil_cpuid_val) · 70 unmodified lines
71	/* Set up a #PF handler to eat the RSVD #PF and signal all done! */	71	/* Set up a #PF handler to eat the RSVD #PF and signal all done! */
72	vm_init_descriptor_tables(vm);	72	vm_init_descriptor_tables(vm);
73	vcpu_init_descriptor_tables(vm, VCPU_ID);	73	vcpu_init_descriptor_tables(vm, VCPU_ID);
74	vm_handle_exception(vm, PF_VECTOR, guest_pf_handler);	74	vm_install_exception_handler(vm, PF_VECTOR, guest_pf_handler);
75		75
76	r = _vcpu_run(vm, VCPU_ID);	76	r = _vcpu_run(vm, VCPU_ID);
77	TEST_ASSERT(r == 0, "vcpu_run failed: %d\n", r);	77	TEST_ASSERT(r == 0, "vcpu_run failed: %d\n", r);

tools/testing/selftests/kvm/x86_64/smm_test.c+64−6

@@ -53,15 +53,28 @@ static inline void sync_with_host(uint64_t phase) · 52 unmodified lines
53	: "+a" (phase));	53	: "+a" (phase));
54	}	54	}
55		55
56	void self_smi(void)	56	static void self_smi(void)
57	{	57	{
58	x2apic_write_reg(APIC_ICR,	58	x2apic_write_reg(APIC_ICR,
59	APIC_DEST_SELF \| APIC_INT_ASSERT \| APIC_DM_SMI);	59	APIC_DEST_SELF \| APIC_INT_ASSERT \| APIC_DM_SMI);
60	}	60	}
61		61
62	void guest_code(void *arg)	62	static void l2_guest_code(void)
63	{	63	{
		64	sync_with_host(8);
		65
		66	sync_with_host(10);
		67
		68	vmcall();
		69	}
		70
		71	static void guest_code(void *arg)
		72	{
		73	#define L2_GUEST_STACK_SIZE 64
		74	unsigned long l2_guest_stack[L2_GUEST_STACK_SIZE];
64	uint64_t apicbase = rdmsr(MSR_IA32_APICBASE);	75	uint64_t apicbase = rdmsr(MSR_IA32_APICBASE);
		76	struct svm_test_data *svm = arg;
		77	struct vmx_pages *vmx_pages = arg;
65		78
66	sync_with_host(1);	79	sync_with_host(1);
67		80
@@ -74,21 +87,50 @@ void guest_code(void *arg) · 6 unmodified lines
74	sync_with_host(4);	87	sync_with_host(4);
75		88
76	if (arg) {	89	if (arg) {
77	if (cpu_has_svm())	90	if (cpu_has_svm()) {
78	generic_svm_setup(arg, NULL, NULL);	91	generic_svm_setup(svm, l2_guest_code,
79	else	92	&l2_guest_stack[L2_GUEST_STACK_SIZE]);
80	GUEST_ASSERT(prepare_for_vmx_operation(arg));	93	} else {
		94	GUEST_ASSERT(prepare_for_vmx_operation(vmx_pages));
		95	GUEST_ASSERT(load_vmcs(vmx_pages));
		96	prepare_vmcs(vmx_pages, l2_guest_code,
		97	&l2_guest_stack[L2_GUEST_STACK_SIZE]);
		98	}
81		99
82	sync_with_host(5);	100	sync_with_host(5);
83		101
84	self_smi();	102	self_smi();
85		103
86	sync_with_host(7);	104	sync_with_host(7);
		105
		106	if (cpu_has_svm()) {
		107	run_guest(svm->vmcb, svm->vmcb_gpa);
		108	svm->vmcb->save.rip += 3;
		109	run_guest(svm->vmcb, svm->vmcb_gpa);
		110	} else {
		111	vmlaunch();
		112	vmresume();
		113	}
		114
		115	/* Stages 8-11 are eaten by SMM (SMRAM_STAGE reported instead) */
		116	sync_with_host(12);
87	}	117	}
88		118
89	sync_with_host(DONE);	119	sync_with_host(DONE);
90	}	120	}
91		121
		122	void inject_smi(struct kvm_vm *vm)
		123	{
		124	struct kvm_vcpu_events events;
		125
		126	vcpu_events_get(vm, VCPU_ID, &events);
		127
		128	events.smi.pending = 1;
		129	events.flags \|= KVM_VCPUEVENT_VALID_SMM;
		130
		131	vcpu_events_set(vm, VCPU_ID, &events);
		132	}
		133
92	int main(int argc, char *argv[])	134	int main(int argc, char *argv[])
93	{	135	{
94	vm_vaddr_t nested_gva = 0;	136	vm_vaddr_t nested_gva = 0;
@@ -147,6 +189,22 @@ int main(int argc, char *argv[]) · 52 unmodified lines
147	"Unexpected stage: #%x, got %x",	189	"Unexpected stage: #%x, got %x",
148	stage, stage_reported);	190	stage, stage_reported);
149		191
		192	/*
		193	* Enter SMM during L2 execution and check that we correctly
		194	* return from it. Do not perform save/restore while in SMM yet.
		195	*/
		196	if (stage == 8) {
		197	inject_smi(vm);
		198	continue;
		199	}
		200
		201	/*
		202	* Perform save/restore while the guest is in SMM triggered
		203	* during L2 execution.
		204	*/
		205	if (stage == 10)
		206	inject_smi(vm);
		207
150	state = vcpu_save_state(vm, VCPU_ID);	208	state = vcpu_save_state(vm, VCPU_ID);
151	kvm_vm_release(vm);	209	kvm_vm_release(vm);
152	kvm_vm_restart(vm, O_RDWR);	210	kvm_vm_restart(vm, O_RDWR);

tools/testing/selftests/memory-hotplug/mem-on-off-test.sh+3−1

 #
 echo $error > $NOTIFIER_ERR_INJECT_DIR/actions/MEM_GOING_OFFLINE/error
 for memory in `hotpluggable_online_memory`; do
-	offline_memory_expect_fail $memory
+	if [ $((RANDOM % 100)) -lt $ratio ]; then
+		offline_memory_expect_fail $memory
+	fi
 done
 echo 0 > $NOTIFIER_ERR_INJECT_DIR/actions/MEM_GOING_OFFLINE/error

tools/testing/selftests/net/nettest.c+54−1

@@ -11,9 +11,11 @@ · 10 unmodified lines
11	#include <sys/socket.h>	11	#include <sys/socket.h>
12	#include <sys/wait.h>	12	#include <sys/wait.h>
13	#include <linux/tcp.h>	13	#include <linux/tcp.h>
		14	#include <linux/udp.h>
14	#include <arpa/inet.h>	15	#include <arpa/inet.h>
15	#include <net/if.h>	16	#include <net/if.h>
16	#include <netinet/in.h>	17	#include <netinet/in.h>
		18	#include <netinet/ip.h>
17	#include <netdb.h>	19	#include <netdb.h>
18	#include <fcntl.h>	20	#include <fcntl.h>
19	#include <libgen.h>	21	#include <libgen.h>
@@ -27,6 +29,10 @@ · 7 unmodified lines
27	#include <time.h>	29	#include <time.h>
28	#include <errno.h>	30	#include <errno.h>
29		31
		32	#include <linux/xfrm.h>
		33	#include <linux/ipsec.h>
		34	#include <linux/pfkeyv2.h>
		35
30	#ifndef IPV6_UNICAST_IF	36	#ifndef IPV6_UNICAST_IF
31	#define IPV6_UNICAST_IF 76	37	#define IPV6_UNICAST_IF 76
32	#endif	38	#endif
@@ -114,6 +120,9 @@ struct sock_args { · 81 unmodified lines
114	struct in_addr in;	120	struct in_addr in;
115	struct in6_addr in6;	121	struct in6_addr in6;
116	} expected_raddr;	122	} expected_raddr;
		123
		124	/* ESP in UDP encap test */
		125	int use_xfrm;
117	};	126	};
118		127
119	static int server_mode;	128	static int server_mode;
@@ -1346,6 +1355,41 @@ static int bind_socket(int sd, struct sock_args *args) · 1226 unmodified lines
1346	return 0;	1355	return 0;
1347	}	1356	}
1348		1357
		1358	static int config_xfrm_policy(int sd, struct sock_args *args)
		1359	{
		1360	struct xfrm_userpolicy_info policy = {};
		1361	int type = UDP_ENCAP_ESPINUDP;
		1362	int xfrm_af = IP_XFRM_POLICY;
		1363	int level = SOL_IP;
		1364
		1365	if (args->type != SOCK_DGRAM) {
		1366	log_error("Invalid socket type. Only DGRAM could be used for XFRM\n");
		1367	return 1;
		1368	}
		1369
		1370	policy.action = XFRM_POLICY_ALLOW;
		1371	policy.sel.family = args->version;
		1372	if (args->version == AF_INET6) {
		1373	xfrm_af = IPV6_XFRM_POLICY;
		1374	level = SOL_IPV6;
		1375	}
		1376
		1377	policy.dir = XFRM_POLICY_OUT;
		1378	if (setsockopt(sd, level, xfrm_af, &policy, sizeof(policy)) < 0)
		1379	return 1;
		1380
		1381	policy.dir = XFRM_POLICY_IN;
		1382	if (setsockopt(sd, level, xfrm_af, &policy, sizeof(policy)) < 0)
		1383	return 1;
		1384
		1385	if (setsockopt(sd, IPPROTO_UDP, UDP_ENCAP, &type, sizeof(type)) < 0) {
		1386	log_err_errno("Failed to set xfrm encap");
		1387	return 1;
		1388	}
		1389
		1390	return 0;
		1391	}
		1392
1349	static int lsock_init(struct sock_args *args)	1393	static int lsock_init(struct sock_args *args)
1350	{	1394	{
1351	long flags;	1395	long flags;
@@ -1389,6 +1433,11 @@ static int lsock_init(struct sock_args *args) · 37 unmodified lines
1389	if (fcntl(sd, F_SETFD, FD_CLOEXEC) < 0)	1433	if (fcntl(sd, F_SETFD, FD_CLOEXEC) < 0)
1390	log_err_errno("Failed to set close-on-exec flag");	1434	log_err_errno("Failed to set close-on-exec flag");
1391		1435
		1436	if (args->use_xfrm && config_xfrm_policy(sd, args)) {
		1437	log_err_errno("Failed to set xfrm policy");
		1438	goto err;
		1439	}
		1440
1392	out:	1441	out:
1393	return sd;	1442	return sd;
1394		1443
@@ -1772,7 +1821,7 @@ static int ipc_parent(int cpid, int fd, struct sock_args *args) · 377 unmodified lines
1772	return client_status;	1821	return client_status;
1773	}	1822	}
1774		1823
1775	#define GETOPT_STR "sr:l:c:p:t:g:P:DRn:M:X:m:d:I:BN:O:SCi6L:0:1:2:3:Fbq"	1824	#define GETOPT_STR "sr:l:c:p:t:g:P:DRn:M:X:m:d:I:BN:O:SCi6xL:0:1:2:3:Fbq"
1776		1825
1777	static void print_usage(char *prog)	1826	static void print_usage(char *prog)
1778	{	1827	{
@@ -1795,6 +1844,7 @@ static void print_usage(char *prog) · 16 unmodified lines
1795	" -D\|R datagram (D) / raw (R) socket (default stream)\n"	1844	" -D\|R datagram (D) / raw (R) socket (default stream)\n"
1796	" -l addr local address to bind to in server mode\n"	1845	" -l addr local address to bind to in server mode\n"
1797	" -c addr local address to bind to in client mode\n"	1846	" -c addr local address to bind to in client mode\n"
		1847	" -x configure XFRM policy on socket\n"
1798	"\n"	1848	"\n"
1799	" -d dev bind socket to given device name\n"	1849	" -d dev bind socket to given device name\n"
1800	" -I dev bind socket to given device name - server mode\n"	1850	" -I dev bind socket to given device name - server mode\n"
@@ -1966,6 +2016,9 @@ int main(int argc, char *argv[]) · 165 unmodified lines
1966	case 'q':	2016	case 'q':
1967	quiet = 1;	2017	quiet = 1;
1968	break;	2018	break;
		2019	case 'x':
		2020	args.use_xfrm = 1;
		2021	break;
1969	default:	2022	default:
1970	print_usage(argv[0]);	2023	print_usage(argv[0]);
1971	return 1;	2024	return 1;

tools/testing/selftests/net/pmtu.sh+206−6

@@ -118,6 +118,16 @@ · 117 unmodified lines
118	# below for IPv6 doesn't apply here, because, on IPv4, administrative MTU	118	# below for IPv6 doesn't apply here, because, on IPv4, administrative MTU
119	# changes alone won't affect PMTU	119	# changes alone won't affect PMTU
120	#	120	#
		121	# - pmtu_vti4_udp_exception
		122	# Same as pmtu_vti4_exception, but using ESP-in-UDP
		123	#
		124	# - pmtu_vti4_udp_routed_exception
		125	# Set up vti tunnel on top of veth connected through routing namespace and
		126	# add xfrm states and policies with ESP-in-UDP encapsulation. Check that
		127	# route exception is not created if link layer MTU is not exceeded, then
		128	# lower MTU on second part of routed environment and check that exception
		129	# is created with the expected PMTU.
		130	#
121	# - pmtu_vti6_exception	131	# - pmtu_vti6_exception
122	# Set up vti6 tunnel on top of veth, with xfrm states and policies, in two	132	# Set up vti6 tunnel on top of veth, with xfrm states and policies, in two
123	# namespaces with matching endpoints. Check that route exception is	133	# namespaces with matching endpoints. Check that route exception is
@@ -125,6 +135,13 @@ · 1 unmodified line
125	# decrease and increase MTU of tunnel, checking that route exception PMTU	135	# decrease and increase MTU of tunnel, checking that route exception PMTU
126	# changes accordingly	136	# changes accordingly
127	#	137	#
		138	# - pmtu_vti6_udp_exception
		139	# Same as pmtu_vti6_exception, but using ESP-in-UDP
		140	#
		141	# - pmtu_vti6_udp_routed_exception
		142	# Same as pmtu_vti6_udp_routed_exception but with routing between vti
		143	# endpoints
		144	#
128	# - pmtu_vti4_default_mtu	145	# - pmtu_vti4_default_mtu
129	# Set up vti4 tunnel on top of veth, in two namespaces with matching	146	# Set up vti4 tunnel on top of veth, in two namespaces with matching
130	# endpoints. Check that MTU assigned to vti interface is the MTU of the	147	# endpoints. Check that MTU assigned to vti interface is the MTU of the
@@ -224,6 +241,10 @@ tests=" · 93 unmodified lines
224	pmtu_ipv6_ipv6_exception IPv6 over IPv6: PMTU exceptions 1	241	pmtu_ipv6_ipv6_exception IPv6 over IPv6: PMTU exceptions 1
225	pmtu_vti6_exception vti6: PMTU exceptions 0	242	pmtu_vti6_exception vti6: PMTU exceptions 0
226	pmtu_vti4_exception vti4: PMTU exceptions 0	243	pmtu_vti4_exception vti4: PMTU exceptions 0
		244	pmtu_vti6_udp_exception vti6: PMTU exceptions (ESP-in-UDP) 0
		245	pmtu_vti4_udp_exception vti4: PMTU exceptions (ESP-in-UDP) 0
		246	pmtu_vti6_udp_routed_exception vti6: PMTU exceptions, routed (ESP-in-UDP) 0
		247	pmtu_vti4_udp_routed_exception vti4: PMTU exceptions, routed (ESP-in-UDP) 0
227	pmtu_vti4_default_mtu vti4: default MTU assignment 0	248	pmtu_vti4_default_mtu vti4: default MTU assignment 0
228	pmtu_vti6_default_mtu vti6: default MTU assignment 0	249	pmtu_vti6_default_mtu vti6: default MTU assignment 0
229	pmtu_vti4_link_add_mtu vti4: MTU setting on link creation 0	250	pmtu_vti4_link_add_mtu vti4: MTU setting on link creation 0
@@ -246,7 +267,6 @@ ns_b="ip netns exec ${NS_B}" · 16 unmodified lines
246	ns_c="ip netns exec ${NS_C}"	267	ns_c="ip netns exec ${NS_C}"
247	ns_r1="ip netns exec ${NS_R1}"	268	ns_r1="ip netns exec ${NS_R1}"
248	ns_r2="ip netns exec ${NS_R2}"	269	ns_r2="ip netns exec ${NS_R2}"
249
250	# Addressing and routing for tests with routers: four network segments, with	270	# Addressing and routing for tests with routers: four network segments, with
251	# index SEGMENT between 1 and 4, a common prefix (PREFIX4 or PREFIX6) and an	271	# index SEGMENT between 1 and 4, a common prefix (PREFIX4 or PREFIX6) and an
252	# identifier ID, which is 1 for hosts (A and B), 2 for routers (R1 and R2).	272	# identifier ID, which is 1 for hosts (A and B), 2 for routers (R1 and R2).
@@ -279,7 +299,6 @@ routes=" · 26 unmodified lines
279	A ${prefix6}:${b_r2}::1 ${prefix6}:${a_r2}::2	299	A ${prefix6}:${b_r2}::1 ${prefix6}:${a_r2}::2
280	B default ${prefix6}:${b_r1}::2	300	B default ${prefix6}:${b_r1}::2
281	"	301	"
282
283	USE_NH="no"	302	USE_NH="no"
284	# ns family nh id destination gateway	303	# ns family nh id destination gateway
285	nexthops="	304	nexthops="
@@ -326,6 +345,7 @@ dummy6_mask="64" · 40 unmodified lines
326		345
327	err_buf=	346	err_buf=
328	tcpdump_pids=	347	tcpdump_pids=
		348	nettest_pids=
329		349
330	err() {	350	err() {
331	err_buf="${err_buf}${1}	351	err_buf="${err_buf}${1}
@@ -548,6 +568,14 @@ setup_vti6() { · 216 unmodified lines
548	setup_vti 6 ${veth6_a_addr} ${veth6_b_addr} ${tunnel6_a_addr} ${tunnel6_b_addr} ${tunnel6_mask}	568	setup_vti 6 ${veth6_a_addr} ${veth6_b_addr} ${tunnel6_a_addr} ${tunnel6_b_addr} ${tunnel6_mask}
549	}	569	}
550		570
		571	setup_vti4routed() {
		572	setup_vti 4 ${prefix4}.${a_r1}.1 ${prefix4}.${b_r1}.1 ${tunnel4_a_addr} ${tunnel4_b_addr} ${tunnel4_mask}
		573	}
		574
		575	setup_vti6routed() {
		576	setup_vti 6 ${prefix6}:${a_r1}::1 ${prefix6}:${b_r1}::1 ${tunnel6_a_addr} ${tunnel6_b_addr} ${tunnel6_mask}
		577	}
		578
551	setup_vxlan_or_geneve() {	579	setup_vxlan_or_geneve() {
552	type="${1}"	580	type="${1}"
553	a_addr="${2}"	581	a_addr="${2}"
@@ -619,18 +647,36 @@ setup_xfrm() { · 65 unmodified lines
619	proto=${1}	647	proto=${1}
620	veth_a_addr="${2}"	648	veth_a_addr="${2}"
621	veth_b_addr="${3}"	649	veth_b_addr="${3}"
		650	encap=${4}
622		651
623	run_cmd ${ns_a} ip -${proto} xfrm state add src ${veth_a_addr} dst ${veth_b_addr} spi 0x1000 proto esp aead 'rfc4106(gcm(aes))' 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f 128 mode tunnel \|\| return 1	652	run_cmd ${ns_a} ip -${proto} xfrm state add src ${veth_a_addr} dst ${veth_b_addr} spi 0x1000 proto esp aead 'rfc4106(gcm(aes))' 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f 128 mode tunnel ${encap} \|\| return 1
624	run_cmd ${ns_a} ip -${proto} xfrm state add src ${veth_b_addr} dst ${veth_a_addr} spi 0x1001 proto esp aead 'rfc4106(gcm(aes))' 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f 128 mode tunnel	653	run_cmd ${ns_a} ip -${proto} xfrm state add src ${veth_b_addr} dst ${veth_a_addr} spi 0x1001 proto esp aead 'rfc4106(gcm(aes))' 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f 128 mode tunnel ${encap}
625	run_cmd ${ns_a} ip -${proto} xfrm policy add dir out mark 10 tmpl src ${veth_a_addr} dst ${veth_b_addr} proto esp mode tunnel	654	run_cmd ${ns_a} ip -${proto} xfrm policy add dir out mark 10 tmpl src ${veth_a_addr} dst ${veth_b_addr} proto esp mode tunnel
626	run_cmd ${ns_a} ip -${proto} xfrm policy add dir in mark 10 tmpl src ${veth_b_addr} dst ${veth_a_addr} proto esp mode tunnel	655	run_cmd ${ns_a} ip -${proto} xfrm policy add dir in mark 10 tmpl src ${veth_b_addr} dst ${veth_a_addr} proto esp mode tunnel
627		656
628	run_cmd ${ns_b} ip -${proto} xfrm state add src ${veth_a_addr} dst ${veth_b_addr} spi 0x1000 proto esp aead 'rfc4106(gcm(aes))' 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f 128 mode tunnel	657	run_cmd ${ns_b} ip -${proto} xfrm state add src ${veth_a_addr} dst ${veth_b_addr} spi 0x1000 proto esp aead 'rfc4106(gcm(aes))' 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f 128 mode tunnel ${encap}
629	run_cmd ${ns_b} ip -${proto} xfrm state add src ${veth_b_addr} dst ${veth_a_addr} spi 0x1001 proto esp aead 'rfc4106(gcm(aes))' 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f 128 mode tunnel	658	run_cmd ${ns_b} ip -${proto} xfrm state add src ${veth_b_addr} dst ${veth_a_addr} spi 0x1001 proto esp aead 'rfc4106(gcm(aes))' 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f 128 mode tunnel ${encap}
630	run_cmd ${ns_b} ip -${proto} xfrm policy add dir out mark 10 tmpl src ${veth_b_addr} dst ${veth_a_addr} proto esp mode tunnel	659	run_cmd ${ns_b} ip -${proto} xfrm policy add dir out mark 10 tmpl src ${veth_b_addr} dst ${veth_a_addr} proto esp mode tunnel
631	run_cmd ${ns_b} ip -${proto} xfrm policy add dir in mark 10 tmpl src ${veth_a_addr} dst ${veth_b_addr} proto esp mode tunnel	660	run_cmd ${ns_b} ip -${proto} xfrm policy add dir in mark 10 tmpl src ${veth_a_addr} dst ${veth_b_addr} proto esp mode tunnel
632	}	661	}
633		662
		663	setup_nettest_xfrm() {
		664	which nettest >/dev/null
		665	if [ $? -ne 0 ]; then
		666	echo "'nettest' command not found; skipping tests"
		667	return 1
		668	fi
		669
		670	[ ${1} -eq 6 ] && proto="-6" \|\| proto=""
		671	port=${2}
		672
		673	run_cmd ${ns_a} nettest ${proto} -q -D -s -x -p ${port} -t 5 &
		674	nettest_pids="${nettest_pids} $!"
		675
		676	run_cmd ${ns_b} nettest ${proto} -q -D -s -x -p ${port} -t 5 &
		677	nettest_pids="${nettest_pids} $!"
		678	}
		679
634	setup_xfrm4() {	680	setup_xfrm4() {
635	setup_xfrm 4 ${veth4_a_addr} ${veth4_b_addr}	681	setup_xfrm 4 ${veth4_a_addr} ${veth4_b_addr}
636	}	682	}
@@ -639,6 +685,26 @@ setup_xfrm6() { · 2 unmodified lines
639	setup_xfrm 6 ${veth6_a_addr} ${veth6_b_addr}	685	setup_xfrm 6 ${veth6_a_addr} ${veth6_b_addr}
640	}	686	}
641		687
		688	setup_xfrm4udp() {
		689	setup_xfrm 4 ${veth4_a_addr} ${veth4_b_addr} "encap espinudp 4500 4500 0.0.0.0"
		690	setup_nettest_xfrm 4 4500
		691	}
		692
		693	setup_xfrm6udp() {
		694	setup_xfrm 6 ${veth6_a_addr} ${veth6_b_addr} "encap espinudp 4500 4500 0.0.0.0"
		695	setup_nettest_xfrm 6 4500
		696	}
		697
		698	setup_xfrm4udprouted() {
		699	setup_xfrm 4 ${prefix4}.${a_r1}.1 ${prefix4}.${b_r1}.1 "encap espinudp 4500 4500 0.0.0.0"
		700	setup_nettest_xfrm 4 4500
		701	}
		702
		703	setup_xfrm6udprouted() {
		704	setup_xfrm 6 ${prefix6}:${a_r1}::1 ${prefix6}:${b_r1}::1 "encap espinudp 4500 4500 0.0.0.0"
		705	setup_nettest_xfrm 6 4500
		706	}
		707
642	setup_routing_old() {	708	setup_routing_old() {
643	for i in ${routes}; do	709	for i in ${routes}; do
644	[ "${ns}" = "" ] && ns="${i}" && continue	710	[ "${ns}" = "" ] && ns="${i}" && continue
@@ -823,6 +889,11 @@ cleanup() { · 178 unmodified lines
823	done	889	done
824	tcpdump_pids=	890	tcpdump_pids=
825		891
		892	for pid in ${nettest_pids}; do
		893	kill ${pid}
		894	done
		895	nettest_pids=
		896
826	for n in ${NS_A} ${NS_B} ${NS_C} ${NS_R1} ${NS_R2}; do	897	for n in ${NS_A} ${NS_B} ${NS_C} ${NS_R1} ${NS_R2}; do
827	ip netns del ${n} 2> /dev/null	898	ip netns del ${n} 2> /dev/null
828	done	899	done
@@ -1432,6 +1503,135 @@ test_pmtu_vti6_exception() { · 603 unmodified lines
1432	return ${fail}	1503	return ${fail}
1433	}	1504	}
1434		1505
		1506	test_pmtu_vti4_udp_exception() {
		1507	setup namespaces veth vti4 xfrm4udp \|\| return $ksft_skip
		1508	trace "${ns_a}" veth_a "${ns_b}" veth_b \
		1509	"${ns_a}" vti4_a "${ns_b}" vti4_b
		1510
		1511	veth_mtu=1500
		1512	vti_mtu=$((veth_mtu - 20))
		1513
		1514	# UDP SPI SN IV ICV pad length next header
		1515	esp_payload_rfc4106=$((vti_mtu - 8 - 4 - 4 - 8 - 16 - 1 - 1))
		1516	ping_payload=$((esp_payload_rfc4106 - 28))
		1517
		1518	mtu "${ns_a}" veth_a ${veth_mtu}
		1519	mtu "${ns_b}" veth_b ${veth_mtu}
		1520	mtu "${ns_a}" vti4_a ${vti_mtu}
		1521	mtu "${ns_b}" vti4_b ${vti_mtu}
		1522
		1523	# Send DF packet without exceeding link layer MTU, check that no
		1524	# exception is created
		1525	run_cmd ${ns_a} ping -q -M want -i 0.1 -w 1 -s ${ping_payload} ${tunnel4_b_addr}
		1526	pmtu="$(route_get_dst_pmtu_from_exception "${ns_a}" ${tunnel4_b_addr})"
		1527	check_pmtu_value "" "${pmtu}" "sending packet smaller than PMTU (IP payload length ${esp_payload_rfc4106})" \|\| return 1
		1528
		1529	# Now exceed link layer MTU by one byte, check that exception is created
		1530	# with the right PMTU value
		1531	run_cmd ${ns_a} ping -q -M want -i 0.1 -w 1 -s $((ping_payload + 1)) ${tunnel4_b_addr}
		1532	pmtu="$(route_get_dst_pmtu_from_exception "${ns_a}" ${tunnel4_b_addr})"
		1533	check_pmtu_value "${esp_payload_rfc4106}" "${pmtu}" "exceeding PMTU (IP payload length $((esp_payload_rfc4106 + 1)))"
		1534	}
		1535
		1536	test_pmtu_vti6_udp_exception() {
		1537	setup namespaces veth vti6 xfrm6udp \|\| return $ksft_skip
		1538	trace "${ns_a}" veth_a "${ns_b}" veth_b \
		1539	"${ns_a}" vti6_a "${ns_b}" vti6_b
		1540	fail=0
		1541
		1542	# Create route exception by exceeding link layer MTU
		1543	mtu "${ns_a}" veth_a 4000
		1544	mtu "${ns_b}" veth_b 4000
		1545	mtu "${ns_a}" vti6_a 5000
		1546	mtu "${ns_b}" vti6_b 5000
		1547	run_cmd ${ns_a} ${ping6} -q -i 0.1 -w 1 -s 60000 ${tunnel6_b_addr}
		1548
		1549	# Check that exception was created
		1550	pmtu="$(route_get_dst_pmtu_from_exception "${ns_a}" ${tunnel6_b_addr})"
		1551	check_pmtu_value any "${pmtu}" "creating tunnel exceeding link layer MTU" \|\| return 1
		1552
		1553	# Decrease tunnel MTU, check for PMTU decrease in route exception
		1554	mtu "${ns_a}" vti6_a 3000
		1555	pmtu="$(route_get_dst_pmtu_from_exception "${ns_a}" ${tunnel6_b_addr})"
		1556	check_pmtu_value "3000" "${pmtu}" "decreasing tunnel MTU" \|\| fail=1
		1557
		1558	# Increase tunnel MTU, check for PMTU increase in route exception
		1559	mtu "${ns_a}" vti6_a 9000
		1560	pmtu="$(route_get_dst_pmtu_from_exception "${ns_a}" ${tunnel6_b_addr})"
		1561	check_pmtu_value "9000" "${pmtu}" "increasing tunnel MTU" \|\| fail=1
		1562
		1563	return ${fail}
		1564	}
		1565
		1566	test_pmtu_vti4_udp_routed_exception() {
		1567	setup namespaces routing vti4routed xfrm4udprouted \|\| return $ksft_skip
		1568	trace "${ns_a}" veth_A-R1 "${ns_b}" veth_B-R1 \
		1569	"${ns_a}" vti4_a "${ns_b}" vti4_b
		1570
		1571	veth_mtu=1500
		1572	vti_mtu=$((veth_mtu - 20))
		1573
		1574	# UDP SPI SN IV ICV pad length next header
		1575	esp_payload_rfc4106=$((vti_mtu - 8 - 4 - 4 - 8 - 16 - 1 - 1))
		1576	ping_payload=$((esp_payload_rfc4106 - 28))
		1577
		1578	mtu "${ns_a}" veth_A-R1 ${veth_mtu}
		1579	mtu "${ns_r1}" veth_R1-A ${veth_mtu}
		1580	mtu "${ns_b}" veth_B-R1 ${veth_mtu}
		1581	mtu "${ns_r1}" veth_R1-B ${veth_mtu}
		1582
		1583	mtu "${ns_a}" vti4_a ${vti_mtu}
		1584	mtu "${ns_b}" vti4_b ${vti_mtu}
		1585
		1586	# Send DF packet without exceeding link layer MTU, check that no
		1587	# exception is created
		1588	run_cmd ${ns_a} ping -q -M want -i 0.1 -w 1 -s ${ping_payload} ${tunnel4_b_addr}
		1589	pmtu="$(route_get_dst_pmtu_from_exception "${ns_a}" ${tunnel4_b_addr})"
		1590	check_pmtu_value "" "${pmtu}" "sending packet smaller than PMTU (IP payload length ${esp_payload_rfc4106})" \|\| return 1
		1591
		1592	# Now decrease link layer MTU by 8 bytes on R1, check that exception is created
		1593	# with the right PMTU value
		1594	mtu "${ns_r1}" veth_R1-B $((veth_mtu - 8))
		1595	run_cmd ${ns_a} ping -q -M want -i 0.1 -w 1 -s $((ping_payload)) ${tunnel4_b_addr}
		1596	pmtu="$(route_get_dst_pmtu_from_exception "${ns_a}" ${tunnel4_b_addr})"
		1597	check_pmtu_value "$((esp_payload_rfc4106 - 8))" "${pmtu}" "exceeding PMTU (IP payload length $((esp_payload_rfc4106)))"
		1598	}
		1599
		1600	test_pmtu_vti6_udp_routed_exception() {
		1601	setup namespaces routing vti6routed xfrm6udprouted \|\| return $ksft_skip
		1602	trace "${ns_a}" veth_A-R1 "${ns_b}" veth_B-R1 \
		1603	"${ns_a}" vti6_a "${ns_b}" vti6_b
		1604
		1605	veth_mtu=1500
		1606	vti_mtu=$((veth_mtu - 40))
		1607
		1608	# UDP SPI SN IV ICV pad length next header
		1609	esp_payload_rfc4106=$((vti_mtu - 8 - 4 - 4 - 8 - 16 - 1 - 1))
		1610	ping_payload=$((esp_payload_rfc4106 - 48))
		1611
		1612	mtu "${ns_a}" veth_A-R1 ${veth_mtu}
		1613	mtu "${ns_r1}" veth_R1-A ${veth_mtu}
		1614	mtu "${ns_b}" veth_B-R1 ${veth_mtu}
		1615	mtu "${ns_r1}" veth_R1-B ${veth_mtu}
		1616
		1617	# mtu "${ns_a}" vti6_a ${vti_mtu}
		1618	# mtu "${ns_b}" vti6_b ${vti_mtu}
		1619
		1620	run_cmd ${ns_a} ${ping6} -q -M want -i 0.1 -w 1 -s ${ping_payload} ${tunnel6_b_addr}
		1621
		1622	# Check that exception was not created
		1623	pmtu="$(route_get_dst_pmtu_from_exception "${ns_a}" ${tunnel6_b_addr})"
		1624	check_pmtu_value "" "${pmtu}" "sending packet smaller than PMTU (IP payload length ${esp_payload_rfc4106})" \|\| return 1
		1625
		1626	# Now decrease link layer MTU by 8 bytes on R1, check that exception is created
		1627	# with the right PMTU value
		1628	mtu "${ns_r1}" veth_R1-B $((veth_mtu - 8))
		1629	run_cmd ${ns_a} ${ping6} -q -M want -i 0.1 -w 1 -s $((ping_payload)) ${tunnel6_b_addr}
		1630	pmtu="$(route_get_dst_pmtu_from_exception "${ns_a}" ${tunnel6_b_addr})"
		1631	check_pmtu_value "$((esp_payload_rfc4106 - 8))" "${pmtu}" "exceeding PMTU (IP payload length $((esp_payload_rfc4106)))"
		1632
		1633	}
		1634
1435	test_pmtu_vti4_default_mtu() {	1635	test_pmtu_vti4_default_mtu() {
1436	setup namespaces veth vti4 \|\| return $ksft_skip	1636	setup namespaces veth vti4 \|\| return $ksft_skip
1437		1637

virt/kvm/coalesced_mmio.c+1−1

 		    coalesced_mmio_in_range(dev, zone->addr, zone->size)) {
 			r = kvm_io_bus_unregister_dev(kvm,
 				zone->pio ? KVM_PIO_BUS : KVM_MMIO_BUS, &dev->dev);
-			kvm_iodevice_destructor(&dev->dev);
 			/*
 			 * On failure, unregister destroys all devices on the
 			 */
 			if (r)
 				break;
+			kvm_iodevice_destructor(&dev->dev);
 		}
 	}

virt/kvm/kvm_main.c+1−1

@@ -935,7 +935,7 @@ static int kvm_create_vm_debugfs(struct kvm *kvm, int fd) · 934 unmodified lines
935	stat_data->kvm = kvm;	935	stat_data->kvm = kvm;
936	stat_data->desc = pdesc;	936	stat_data->desc = pdesc;
937	stat_data->kind = KVM_STAT_VCPU;	937	stat_data->kind = KVM_STAT_VCPU;
938	kvm->debugfs_stat_data[i] = stat_data;	938	kvm->debugfs_stat_data[i + kvm_vm_stats_header.num_desc] = stat_data;
939	debugfs_create_file(pdesc->name, kvm_stats_debugfs_mode(pdesc),	939	debugfs_create_file(pdesc->name, kvm_stats_debugfs_mode(pdesc),
940	kvm->debugfs_dentry, stat_data,	940	kvm->debugfs_dentry, stat_data,
941	&stat_fops_per_vm);	941	&stat_fops_per_vm);

@@ -69,17 +69,17 @@ early userspace image can be built by an unprivileged user. · 68 unmodified lines
69		69
70	As a technical note, when directories and files are specified, the	70	As a technical note, when directories and files are specified, the
71	entire CONFIG_INITRAMFS_SOURCE is passed to	71	entire CONFIG_INITRAMFS_SOURCE is passed to
72	usr/gen_initramfs_list.sh. This means that CONFIG_INITRAMFS_SOURCE	72	usr/gen_initramfs.sh. This means that CONFIG_INITRAMFS_SOURCE
73	can really be interpreted as any legal argument to	73	can really be interpreted as any legal argument to
74	gen_initramfs_list.sh. If a directory is specified as an argument then	74	gen_initramfs.sh. If a directory is specified as an argument then
75	the contents are scanned, uid/gid translation is performed, and	75	the contents are scanned, uid/gid translation is performed, and
76	usr/gen_init_cpio file directives are output. If a directory is	76	usr/gen_init_cpio file directives are output. If a directory is
77	specified as an argument to usr/gen_initramfs_list.sh then the	77	specified as an argument to usr/gen_initramfs.sh then the
78	contents of the file are simply copied to the output. All of the output	78	contents of the file are simply copied to the output. All of the output
79	directives from directory scanning and file contents copying are	79	directives from directory scanning and file contents copying are
80	processed by usr/gen_init_cpio.	80	processed by usr/gen_init_cpio.
81		81
82	See also 'usr/gen_initramfs_list.sh -h'.	82	See also 'usr/gen_initramfs.sh -h'.
83		83
84	Where's this all leading?	84	Where's this all leading?
85	=========================	85	=========================

@@ -24,7 +24,7 @@ · 23 unmodified lines
24	#define pt_element_t u64	24	#define pt_element_t u64
25	#define guest_walker guest_walker64	25	#define guest_walker guest_walker64
26	#define FNAME(name) paging##64_##name	26	#define FNAME(name) paging##64_##name
27	#define PT_BASE_ADDR_MASK PT64_BASE_ADDR_MASK	27	#define PT_BASE_ADDR_MASK GUEST_PT64_BASE_ADDR_MASK
28	#define PT_LVL_ADDR_MASK(lvl) PT64_LVL_ADDR_MASK(lvl)	28	#define PT_LVL_ADDR_MASK(lvl) PT64_LVL_ADDR_MASK(lvl)
29	#define PT_LVL_OFFSET_MASK(lvl) PT64_LVL_OFFSET_MASK(lvl)	29	#define PT_LVL_OFFSET_MASK(lvl) PT64_LVL_OFFSET_MASK(lvl)
30	#define PT_INDEX(addr, level) PT64_INDEX(addr, level)	30	#define PT_INDEX(addr, level) PT64_INDEX(addr, level)
@@ -57,7 +57,7 @@ · 26 unmodified lines
57	#define pt_element_t u64	57	#define pt_element_t u64
58	#define guest_walker guest_walkerEPT	58	#define guest_walker guest_walkerEPT
59	#define FNAME(name) ept_##name	59	#define FNAME(name) ept_##name
60	#define PT_BASE_ADDR_MASK PT64_BASE_ADDR_MASK	60	#define PT_BASE_ADDR_MASK GUEST_PT64_BASE_ADDR_MASK
61	#define PT_LVL_ADDR_MASK(lvl) PT64_LVL_ADDR_MASK(lvl)	61	#define PT_LVL_ADDR_MASK(lvl) PT64_LVL_ADDR_MASK(lvl)
62	#define PT_LVL_OFFSET_MASK(lvl) PT64_LVL_OFFSET_MASK(lvl)	62	#define PT_LVL_OFFSET_MASK(lvl) PT64_LVL_OFFSET_MASK(lvl)
63	#define PT_INDEX(addr, level) PT64_INDEX(addr, level)	63	#define PT_INDEX(addr, level) PT64_INDEX(addr, level)

@@ -131,7 +131,7 @@ · 130 unmodified lines
131	/* buf unit size is cache_line_size, which is 64, so the shift is 6 */	131	/* buf unit size is cache_line_size, which is 64, so the shift is 6 */
132	#define PPE_BUF_SIZE_SHIFT 6	132	#define PPE_BUF_SIZE_SHIFT 6
133	#define PPE_TX_BUF_HOLD BIT(31)	133	#define PPE_TX_BUF_HOLD BIT(31)
134	#define CACHE_LINE_MASK 0x3F	134	#define SOC_CACHE_LINE_MASK 0x3F
135	#else	135	#else
136	#define PPE_CFG_QOS_VMID_GRP_SHIFT 8	136	#define PPE_CFG_QOS_VMID_GRP_SHIFT 8
137	#define PPE_CFG_RX_CTRL_ALIGN_SHIFT 11	137	#define PPE_CFG_RX_CTRL_ALIGN_SHIFT 11
@@ -531,8 +531,8 @@ hip04_mac_start_xmit(struct sk_buff skb, struct net_device ndev) · 393 unmodified lines
531	#if defined(CONFIG_HI13X1_GMAC)	531	#if defined(CONFIG_HI13X1_GMAC)
532	desc->cfg = (__force u32)cpu_to_be32(TX_CLEAR_WB \| TX_FINISH_CACHE_INV	532	desc->cfg = (__force u32)cpu_to_be32(TX_CLEAR_WB \| TX_FINISH_CACHE_INV
533	\| TX_RELEASE_TO_PPE \| priv->port << TX_POOL_SHIFT);	533	\| TX_RELEASE_TO_PPE \| priv->port << TX_POOL_SHIFT);
534	desc->data_offset = (__force u32)cpu_to_be32(phys & CACHE_LINE_MASK);	534	desc->data_offset = (__force u32)cpu_to_be32(phys & SOC_CACHE_LINE_MASK);
535	desc->send_addr = (__force u32)cpu_to_be32(phys & ~CACHE_LINE_MASK);	535	desc->send_addr = (__force u32)cpu_to_be32(phys & ~SOC_CACHE_LINE_MASK);
536	#else	536	#else
537	desc->cfg = (__force u32)cpu_to_be32(TX_CLEAR_WB \| TX_FINISH_CACHE_INV);	537	desc->cfg = (__force u32)cpu_to_be32(TX_CLEAR_WB \| TX_FINISH_CACHE_INV);
538	desc->send_addr = (__force u32)cpu_to_be32(phys);	538	desc->send_addr = (__force u32)cpu_to_be32(phys);

@@ -384,7 +384,7 @@ static void update_outbnd_queue_table(struct pm8001_hba_info *pm8001_ha, · 383 unmodified lines
384		384
385	/**	385	/**
386	* pm8001_bar4_shift - function is called to shift BAR base address	386	* pm8001_bar4_shift - function is called to shift BAR base address
387	* @pm8001_ha : our hba card infomation	387	* @pm8001_ha : our hba card information
388	* @shiftValue : shifting value in memory bar.	388	* @shiftValue : shifting value in memory bar.
389	*/	389	*/
390	int pm8001_bar4_shift(struct pm8001_hba_info *pm8001_ha, u32 shiftValue)	390	int pm8001_bar4_shift(struct pm8001_hba_info *pm8001_ha, u32 shiftValue)
@@ -1151,7 +1151,7 @@ static void pm8001_hw_chip_rst(struct pm8001_hba_info *pm8001_ha) · 760 unmodified lines
1151	}	1151	}
1152		1152
1153	/**	1153	/**
1154	* pm8001_chip_iounmap - which maped when initialized.	1154	* pm8001_chip_iounmap - which mapped when initialized.
1155	* @pm8001_ha: our hba card information	1155	* @pm8001_ha: our hba card information
1156	*/	1156	*/
1157	void pm8001_chip_iounmap(struct pm8001_hba_info *pm8001_ha)	1157	void pm8001_chip_iounmap(struct pm8001_hba_info *pm8001_ha)
@@ -1187,10 +1187,10 @@ pm8001_chip_intx_interrupt_enable(struct pm8001_hba_info *pm8001_ha) · 29 unmodified lines
1187	pm8001_cw32(pm8001_ha, 0, MSGU_ODCR, ODCR_CLEAR_ALL);	1187	pm8001_cw32(pm8001_ha, 0, MSGU_ODCR, ODCR_CLEAR_ALL);
1188	}	1188	}
1189		1189
1190	/**	1190	/**
1191	* pm8001_chip_intx_interrupt_disable- disable PM8001 chip interrupt	1191	* pm8001_chip_intx_interrupt_disable - disable PM8001 chip interrupt
1192	* @pm8001_ha: our hba card information	1192	* @pm8001_ha: our hba card information
1193	*/	1193	*/
1194	static void	1194	static void
1195	pm8001_chip_intx_interrupt_disable(struct pm8001_hba_info *pm8001_ha)	1195	pm8001_chip_intx_interrupt_disable(struct pm8001_hba_info *pm8001_ha)
1196	{	1196	{
@@ -1876,8 +1876,8 @@ static void pm8001_send_read_log(struct pm8001_hba_info *pm8001_ha, · 679 unmodified lines
1876	* @piomb: the message contents of this outbound message.	1876	* @piomb: the message contents of this outbound message.
1877	*	1877	*
1878	* When FW has completed a ssp request for example a IO request, after it has	1878	* When FW has completed a ssp request for example a IO request, after it has
1879	* filled the SG data with the data, it will trigger this event represent	1879	* filled the SG data with the data, it will trigger this event representing
1880	* that he has finished the job,please check the coresponding buffer.	1880	* that he has finished the job; please check the corresponding buffer.
1881	* So we will tell the caller who maybe waiting the result to tell upper layer	1881	* So we will tell the caller who maybe waiting the result to tell upper layer
1882	* that the task has been finished.	1882	* that the task has been finished.
1883	*/	1883	*/
@@ -3522,7 +3522,7 @@ hw_event_phy_down(struct pm8001_hba_info pm8001_ha, void piomb) · 1638 unmodified lines
3522	*	3522	*
3523	* when sas layer find a device it will notify LLDD, then the driver register	3523	* when sas layer find a device it will notify LLDD, then the driver register
3524	* the domain device to FW, this event is the return device ID which the FW	3524	* the domain device to FW, this event is the return device ID which the FW
3525	* has assigned, from now,inter-communication with FW is no longer using the	3525	* has assigned, from now, inter-communication with FW is no longer using the
3526	* SAS address, use device ID which FW assigned.	3526	* SAS address, use device ID which FW assigned.
3527	*/	3527	*/
3528	int pm8001_mpi_reg_resp(struct pm8001_hba_info pm8001_ha, void piomb)	3528	int pm8001_mpi_reg_resp(struct pm8001_hba_info pm8001_ha, void piomb)