lael-labs/linux

.mailmap+1−0

@@ -290,6 +290,7 @@ Santosh Shilimkar <ssantosh@kernel.org> · 289 unmodified lines
290	Sarangdhar Joshi <spjoshi@codeaurora.org>	290	Sarangdhar Joshi <spjoshi@codeaurora.org>
291	Sascha Hauer <s.hauer@pengutronix.de>	291	Sascha Hauer <s.hauer@pengutronix.de>
292	S.Çağlar Onur <caglar@pardus.org.tr>	292	S.Çağlar Onur <caglar@pardus.org.tr>
		293	Sean Christopherson <seanjc@google.com> <sean.j.christopherson@intel.com>
293	Sean Nyekjaer <sean@geanix.com> <sean.nyekjaer@prevas.dk>	294	Sean Nyekjaer <sean@geanix.com> <sean.nyekjaer@prevas.dk>
294	Sebastian Reichel <sre@kernel.org> <sebastian.reichel@collabora.co.uk>	295	Sebastian Reichel <sre@kernel.org> <sebastian.reichel@collabora.co.uk>
295	Sebastian Reichel <sre@kernel.org> <sre@debian.org>	296	Sebastian Reichel <sre@kernel.org> <sre@debian.org>

Documentation/ABI/testing/sysfs-bus-iio-timer-stm32+0−24

@@ -109,30 +109,6 @@ Description: · 108 unmodified lines
109	When counting down the counter start from preset value	109	When counting down the counter start from preset value
110	and fire event when reach 0.	110	and fire event when reach 0.
111		111
112	What: /sys/bus/iio/devices/iio:deviceX/in_count_quadrature_mode_available
113	KernelVersion: 4.12
114	Contact: benjamin.gaignard@st.com
115	Description:
116	Reading returns the list possible quadrature modes.
117
118	What: /sys/bus/iio/devices/iio:deviceX/in_count0_quadrature_mode
119	KernelVersion: 4.12
120	Contact: benjamin.gaignard@st.com
121	Description:
122	Configure the device counter quadrature modes:
123
124	channel_A:
125	Encoder A input servers as the count input and B as
126	the UP/DOWN direction control input.
127
128	channel_B:
129	Encoder B input serves as the count input and A as
130	the UP/DOWN direction control input.
131
132	quadrature:
133	Encoder A and B inputs are mixed to get direction
134	and count with a scale of 0.25.
135
136	What: /sys/bus/iio/devices/iio:deviceX/in_count_enable_mode_available	112	What: /sys/bus/iio/devices/iio:deviceX/in_count_enable_mode_available
137	KernelVersion: 4.12	113	KernelVersion: 4.12
138	Contact: benjamin.gaignard@st.com	114	Contact: benjamin.gaignard@st.com

Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml+6−0

   resets:
     maxItems: 1
+  wifi-2.4ghz-coexistence:
+    type: boolean
+    description: >
+      Should the pixel frequencies in the WiFi frequencies range be
+      avoided?
 required:
   - compatible
   - reg

Documentation/devicetree/bindings/sound/rt1015.txt+6−0

 - reg : The I2C address of the device.
+Optional properties:
+- realtek,power-up-delay-ms
+  Set a delay time for flush work to be completed,
+  this value is adjustable depending on platform.
 Example:
 rt1015: codec@28 {
 	compatible = "realtek,rt1015";
 	reg = <0x28>;
+	realtek,power-up-delay-ms = <50>;
 };

Documentation/driver-api/media/drivers/vidtv.rst+104−16

@@ -149,11 +149,11 @@ vidtv_psi.[ch] · 148 unmodified lines
149	Because the generator is implemented in a separate file, it can be	149	Because the generator is implemented in a separate file, it can be
150	reused elsewhere in the media subsystem.	150	reused elsewhere in the media subsystem.
151		151
152	Currently vidtv supports working with 3 PSI tables: PAT, PMT and	152	Currently vidtv supports working with 5 PSI tables: PAT, PMT,
153	SDT.	153	SDT, NIT and EIT.
154		154
155	The specification for PAT and PMT can be found in *ISO 13818-1:	155	The specification for PAT and PMT can be found in *ISO 13818-1:
156	Systems, while the specification for the SDT can be found in ETSI	156	Systems, while the specification for the SDT, NIT, EIT can be found in ETSI
157	EN 300 468: Specification for Service Information (SI) in DVB	157	EN 300 468: Specification for Service Information (SI) in DVB
158	systems*.	158	systems*.
159		159
@@ -197,6 +197,8 @@ vidtv_channel.[ch] · 37 unmodified lines
197		197
198	#. Their programs will be concatenated to populate the PAT	198	#. Their programs will be concatenated to populate the PAT
199		199
		200	#. Their events will be concatenated to populate the EIT
		201
200	#. For each program in the PAT, a PMT section will be created	202	#. For each program in the PAT, a PMT section will be created
201		203
202	#. The PMT section for a channel will be assigned its streams.	204	#. The PMT section for a channel will be assigned its streams.
@@ -256,6 +258,42 @@ Using dvb-fe-tool · 53 unmodified lines
256	The first step to check whether the demod loaded successfully is to run::	258	The first step to check whether the demod loaded successfully is to run::
257		259
258	$ dvb-fe-tool	260	$ dvb-fe-tool
		261	Device Dummy demod for DVB-T/T2/C/S/S2 (/dev/dvb/adapter0/frontend0) capabilities:
		262	CAN_FEC_1_2
		263	CAN_FEC_2_3
		264	CAN_FEC_3_4
		265	CAN_FEC_4_5
		266	CAN_FEC_5_6
		267	CAN_FEC_6_7
		268	CAN_FEC_7_8
		269	CAN_FEC_8_9
		270	CAN_FEC_AUTO
		271	CAN_GUARD_INTERVAL_AUTO
		272	CAN_HIERARCHY_AUTO
		273	CAN_INVERSION_AUTO
		274	CAN_QAM_16
		275	CAN_QAM_32
		276	CAN_QAM_64
		277	CAN_QAM_128
		278	CAN_QAM_256
		279	CAN_QAM_AUTO
		280	CAN_QPSK
		281	CAN_TRANSMISSION_MODE_AUTO
		282	DVB API Version 5.11, Current v5 delivery system: DVBC/ANNEX_A
		283	Supported delivery systems:
		284	DVBT
		285	DVBT2
		286	[DVBC/ANNEX_A]
		287	DVBS
		288	DVBS2
		289	Frequency range for the current standard:
		290	From: 51.0 MHz
		291	To: 2.15 GHz
		292	Step: 62.5 kHz
		293	Tolerance: 29.5 MHz
		294	Symbol rate ranges for the current standard:
		295	From: 1.00 MBauds
		296	To: 45.0 MBauds
259		297
260	This should return what is currently set up at the demod struct, i.e.::	298	This should return what is currently set up at the demod struct, i.e.::
261		299
@@ -314,7 +352,7 @@ For this, one should provide a configuration file known as a 'scan file', · 52 unmodified lines
314	here's an example::	352	here's an example::
315		353
316	[Channel]	354	[Channel]
317	FREQUENCY = 330000000	355	FREQUENCY = 474000000
318	MODULATION = QAM/AUTO	356	MODULATION = QAM/AUTO
319	SYMBOL_RATE = 6940000	357	SYMBOL_RATE = 6940000
320	INNER_FEC = AUTO	358	INNER_FEC = AUTO
@@ -335,6 +373,14 @@ You can browse scan tables online here: `dvb-scan-tables · 14 unmodified lines
335	Assuming this channel is named 'channel.conf', you can then run::	373	Assuming this channel is named 'channel.conf', you can then run::
336		374
337	$ dvbv5-scan channel.conf	375	$ dvbv5-scan channel.conf
		376	dvbv5-scan ~/vidtv.conf
		377	ERROR command BANDWIDTH_HZ (5) not found during retrieve
		378	Cannot calc frequency shift. Either bandwidth/symbol-rate is unavailable (yet).
		379	Scanning frequency #1 330000000
		380	(0x00) Signal= -68.00dBm
		381	Scanning frequency #2 474000000
		382	Lock (0x1f) Signal= -34.45dBm C/N= 33.74dB UCB= 0
		383	Service Beethoven, provider LinuxTV.org: digital television
338		384
339	For more information on dvb-scan, check its documentation online here:	385	For more information on dvb-scan, check its documentation online here:
340	`dvb-scan Documentation <https://www.linuxtv.org/wiki/index.php/Dvbscan>`_.	386	`dvb-scan Documentation <https://www.linuxtv.org/wiki/index.php/Dvbscan>`_.
@@ -344,23 +390,38 @@ Using dvb-zap · 3 unmodified lines
344		390
345	dvbv5-zap is a command line tool that can be used to record MPEG-TS to disk. The	391	dvbv5-zap is a command line tool that can be used to record MPEG-TS to disk. The
346	typical use is to tune into a channel and put it into record mode. The example	392	typical use is to tune into a channel and put it into record mode. The example
347	below - which is taken from the documentation - illustrates that::	393	below - which is taken from the documentation - illustrates that\ [1]_::
348		394
349	$ dvbv5-zap -c dvb_channel.conf "trilhas sonoras" -r	395	$ dvbv5-zap -c dvb_channel.conf "beethoven" -o music.ts -P -t 10
350	using demux '/dev/dvb/adapter0/demux0'	396	using demux 'dvb0.demux0'
351	reading channels from file 'dvb_channel.conf'	397	reading channels from file 'dvb_channel.conf'
352	service has pid type 05: 204	398	tuning to 474000000 Hz
353	tuning to 573000000 Hz	399	pass all PID's to TS
354	audio pid 104	400	dvb_set_pesfilter 8192
355	dvb_set_pesfilter 104	401	dvb_dev_set_bufsize: buffer set to 6160384
356	Lock (0x1f) Quality= Good Signal= 100.00% C/N= -13.80dB UCB= 70 postBER= 3.14x10^-3 PER= 0	402	Lock (0x1f) Quality= Good Signal= -34.66dBm C/N= 33.41dB UCB= 0 postBER= 0 preBER= 1.05x10^-3 PER= 0
357	DVR interface '/dev/dvb/adapter0/dvr0' can now be opened	403	Lock (0x1f) Quality= Good Signal= -34.57dBm C/N= 33.46dB UCB= 0 postBER= 0 preBER= 1.05x10^-3 PER= 0
		404	Record to file 'music.ts' started
		405	received 24587768 bytes (2401 Kbytes/sec)
		406	Lock (0x1f) Quality= Good Signal= -34.42dBm C/N= 33.89dB UCB= 0 postBER= 0 preBER= 2.44x10^-3 PER= 0
		407
		408	.. [1] In this example, it records 10 seconds with all program ID's stored
		409	at the music.ts file.
		410
358		411
359	The channel can be watched by playing the contents of the DVR interface, with	412	The channel can be watched by playing the contents of the stream with some
360	some player that recognizes the MPEG-TS format, such as mplayer or vlc.	413	player that recognizes the MPEG-TS format, such as ``mplayer`` or ``vlc``.
361		414
362	By playing the contents of the stream one can visually inspect the workings of	415	By playing the contents of the stream one can visually inspect the workings of
363	vidtv, e.g.::	416	vidtv, e.g., to play a recorded TS file with::
		417
		418	$ mplayer music.ts
		419
		420	or, alternatively, running this command on one terminal::
		421
		422	$ dvbv5-zap -c dvb_channel.conf "beethoven" -P -r &
		423
		424	And, on a second terminal, playing the contents from DVR interface with::
364		425
365	$ mplayer /dev/dvb/adapter0/dvr0	426	$ mplayer /dev/dvb/adapter0/dvr0
366		427
@@ -423,3 +484,30 @@ A nice addition is to simulate some noise when the signal quality is bad by: · 56 unmodified lines
423	- Updating the error statistics accordingly (e.g. BER, etc).	484	- Updating the error statistics accordingly (e.g. BER, etc).
424		485
425	- Simulating some noise in the encoded data.	486	- Simulating some noise in the encoded data.
		487
		488	Functions and structs used within vidtv
		489	---------------------------------------
		490
		491	.. kernel-doc:: drivers/media/test-drivers/vidtv/vidtv_bridge.h
		492
		493	.. kernel-doc:: drivers/media/test-drivers/vidtv/vidtv_channel.h
		494
		495	.. kernel-doc:: drivers/media/test-drivers/vidtv/vidtv_demod.h
		496
		497	.. kernel-doc:: drivers/media/test-drivers/vidtv/vidtv_encoder.h
		498
		499	.. kernel-doc:: drivers/media/test-drivers/vidtv/vidtv_mux.h
		500
		501	.. kernel-doc:: drivers/media/test-drivers/vidtv/vidtv_pes.h
		502
		503	.. kernel-doc:: drivers/media/test-drivers/vidtv/vidtv_psi.h
		504
		505	.. kernel-doc:: drivers/media/test-drivers/vidtv/vidtv_s302m.h
		506
		507	.. kernel-doc:: drivers/media/test-drivers/vidtv/vidtv_ts.h
		508
		509	.. kernel-doc:: drivers/media/test-drivers/vidtv/vidtv_tuner.h
		510
		511	.. kernel-doc:: drivers/media/test-drivers/vidtv/vidtv_common.c
		512
		513	.. kernel-doc:: drivers/media/test-drivers/vidtv/vidtv_tuner.c

Documentation/networking/netdev-FAQ.rst+26−0

@@ -254,6 +254,32 @@ you will have done run-time testing specific to your change, but at a · 253 unmodified lines
254	minimum, your changes should survive an ``allyesconfig`` and an	254	minimum, your changes should survive an ``allyesconfig`` and an
255	``allmodconfig`` build without new warnings or failures.	255	``allmodconfig`` build without new warnings or failures.
256		256
		257	Q: How do I post corresponding changes to user space components?
		258	----------------------------------------------------------------
		259	A: User space code exercising kernel features should be posted
		260	alongside kernel patches. This gives reviewers a chance to see
		261	how any new interface is used and how well it works.
		262
		263	When user space tools reside in the kernel repo itself all changes
		264	should generally come as one series. If series becomes too large
		265	or the user space project is not reviewed on netdev include a link
		266	to a public repo where user space patches can be seen.
		267
		268	In case user space tooling lives in a separate repository but is
		269	reviewed on netdev (e.g. patches to `iproute2` tools) kernel and
		270	user space patches should form separate series (threads) when posted
		271	to the mailing list, e.g.::
		272
		273	[PATCH net-next 0/3] net: some feature cover letter
		274	└─ [PATCH net-next 1/3] net: some feature prep
		275	└─ [PATCH net-next 2/3] net: some feature do it
		276	└─ [PATCH net-next 3/3] selftest: net: some feature
		277
		278	[PATCH iproute2-next] ip: add support for some feature
		279
		280	Posting as one thread is discouraged because it confuses patchwork
		281	(as of patchwork 2.2.2).
		282
257	Q: Any other tips to help ensure my net/net-next patch gets OK'd?	283	Q: Any other tips to help ensure my net/net-next patch gets OK'd?
258	-----------------------------------------------------------------	284	-----------------------------------------------------------------
259	A: Attention to detail. Re-read your own work as if you were the	285	A: Attention to detail. Re-read your own work as if you were the

MAINTAINERS+11−8

 ARM/LPC32XX SOC SUPPORT
 M:	Vladimir Zapolskiy <vz@mleia.com>
-M:	Sylvain Lemieux <slemieux.tyco@gmail.com>
 L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 S:	Maintained
 T:	git git://github.com/vzapolskiy/linux-lpc32xx.git
 M:	Arend van Spriel <arend.vanspriel@broadcom.com>
 M:	Franky Lin <franky.lin@broadcom.com>
 M:	Hante Meuleman <hante.meuleman@broadcom.com>
-M:	Chi-Hsien Lin <chi-hsien.lin@cypress.com>
+M:	Chi-hsien Lin <chi-hsien.lin@infineon.com>
-M:	Wright Feng <wright.feng@cypress.com>
+M:	Wright Feng <wright.feng@infineon.com>
+M:	Chung-hsien Hsu <chung-hsien.hsu@infineon.com>
 L:	linux-wireless@vger.kernel.org
 L:	brcm80211-dev-list.pdl@broadcom.com
-L:	brcm80211-dev-list@cypress.com
+L:	SHA-cyfmac-dev-list@infineon.com
 S:	Supported
 F:	drivers/net/wireless/broadcom/brcm80211/
 IOMMU DRIVERS
 M:	Joerg Roedel <joro@8bytes.org>
+M:	Will Deacon <will@kernel.org>
 L:	iommu@lists.linux-foundation.org
 S:	Maintained
 T:	git git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git
 F:	arch/s390/include/asm/gmap.h
 F:	arch/s390/include/asm/kvm*
 F:	arch/s390/include/uapi/asm/kvm*
+F:	arch/s390/kernel/uv.c
 F:	arch/s390/kvm/
 F:	arch/s390/mm/gmap.c
 F:	tools/testing/selftests/kvm/*/s390x/
 M:	Ilias Apalodimas <ilias.apalodimas@linaro.org>
 L:	netdev@vger.kernel.org
 S:	Supported
+F:	Documentation/networking/page_pool.rst
 F:	include/net/page_pool.h
+F:	include/trace/events/page_pool.h
 F:	net/core/page_pool.c
 PANASONIC LAPTOP ACPI EXTRAS DRIVER
 F:	drivers/net/wireless/realtek/rtlwifi/
 REALTEK WIRELESS DRIVER (rtw88)
-M:	Yan-Hsuan Chuang <yhchuang@realtek.com>
+M:	Yan-Hsuan Chuang <tony0620emma@gmail.com>
 L:	linux-wireless@vger.kernel.org
 S:	Maintained
 F:	drivers/net/wireless/realtek/rtw88/
 F:	include/linux/slimbus.h
 SFC NETWORK DRIVER
-M:	Solarflare linux maintainers <linux-net-drivers@solarflare.com>
+M:	Edward Cree <ecree.xilinx@gmail.com>
-M:	Edward Cree <ecree@solarflare.com>
+M:	Martin Habets <habetsm.xilinx@gmail.com>
-M:	Martin Habets <mhabets@solarflare.com>
 L:	netdev@vger.kernel.org
 S:	Supported
 F:	drivers/net/ethernet/sfc/

Makefile+1−1

@@ -2,7 +2,7 @@ · 1 unmodified line
2	VERSION = 5	2	VERSION = 5
3	PATCHLEVEL = 10	3	PATCHLEVEL = 10
4	SUBLEVEL = 0	4	SUBLEVEL = 0
5	EXTRAVERSION = -rc4	5	EXTRAVERSION = -rc5
6	NAME = Kleptomaniac Octopus	6	NAME = Kleptomaniac Octopus
7		7
8	# DOCUMENTATION	8	# DOCUMENTATION

arch/arc/include/asm/bitops.h+1−3

 		x <<= 2;
 		r -= 2;
 	}
-	if (!(x & 0x80000000u)) {
+	if (!(x & 0x80000000u))
-		x <<= 1;
 		r -= 1;
-	}
 	return r;
 }

arch/arc/include/asm/pgtable.h+2−0

 #ifdef CONFIG_ARC_HAS_PAE40
 #define PTE_BITS_NON_RWX_IN_PD1	(0xff00000000 | PAGE_MASK | _PAGE_CACHEABLE)
+#define MAX_POSSIBLE_PHYSMEM_BITS 40
 #else
 #define PTE_BITS_NON_RWX_IN_PD1	(PAGE_MASK | _PAGE_CACHEABLE)
+#define MAX_POSSIBLE_PHYSMEM_BITS 32
 #endif
 /**************************************************************************

arch/arc/kernel/stacktrace.c+31−25

 #ifdef CONFIG_ARC_DW2_UNWIND
-static void seed_unwind_frame_info(struct task_struct *tsk,
+static int
-				   struct pt_regs *regs,
+seed_unwind_frame_info(struct task_struct *tsk, struct pt_regs *regs,
-				   struct unwind_frame_info *frame_info)
+		       struct unwind_frame_info *frame_info)
 {
-	/*
+	if (regs) {
-	 * synchronous unwinding (e.g. dump_stack)
+		/*
-	 *  - uses current values of SP and friends
+		 * Asynchronous unwinding of intr/exception
-	 */
+		 *  - Just uses the pt_regs passed
-	if (tsk == NULL && regs == NULL) {
+		 */
+		frame_info->task = tsk;
+		frame_info->regs.r27 = regs->fp;
+		frame_info->regs.r28 = regs->sp;
+		frame_info->regs.r31 = regs->blink;
+		frame_info->regs.r63 = regs->ret;
+		frame_info->call_frame = 0;
+	} else if (tsk == NULL || tsk == current) {
+		/*
+		 * synchronous unwinding (e.g. dump_stack)
+		 *  - uses current values of SP and friends
+		 */
 		unsigned long fp, sp, blink, ret;
 		frame_info->task = current;
 		frame_info->regs.r31 = blink;
 		frame_info->regs.r63 = ret;
 		frame_info->call_frame = 0;
-	} else if (regs == NULL) {
+	} else {
 		/*
-		 * Asynchronous unwinding of sleeping task
+		 * Asynchronous unwinding of a likely sleeping task
-		 *  - Gets SP etc from task's pt_regs (saved bottom of kernel
+		 *  - first ensure it is actually sleeping
-		 *    mode stack of task)
+		 *  - if so, it will be in __switch_to, kernel mode SP of task
+		 *    is safe-kept and BLINK at a well known location in there
 		 */
+		if (tsk->state == TASK_RUNNING)
+			return -1;
 		frame_info->task = tsk;
 		frame_info->regs.r27 = TSK_K_FP(tsk);
 		frame_info->regs.r28 += 60;
 		frame_info->call_frame = 0;
-	} else {
-		/*
-		 * Asynchronous unwinding of intr/exception
-		 *  - Just uses the pt_regs passed
-		 */
-		frame_info->task = tsk;
-		frame_info->regs.r27 = regs->fp;
-		frame_info->regs.r28 = regs->sp;
-		frame_info->regs.r31 = regs->blink;
-		frame_info->regs.r63 = regs->ret;
-		frame_info->call_frame = 0;
 	}
+	return 0;
 }
 #endif
 	unsigned int address;
 	struct unwind_frame_info frame_info;
-	seed_unwind_frame_info(tsk, regs, &frame_info);
+	if (seed_unwind_frame_info(tsk, regs, &frame_info))
+		return 0;
 	while (1) {
 		address = UNW_PC(&frame_info);

arch/arc/mm/tlb.c+12−12

arch/arm/boot/compressed/head.S+3−0

 		@ issued from HYP mode take us to the correct handler code. We
 		@ will disable the MMU before jumping to the kernel proper.
 		@
+ ARM(		bic	r1, r1, #(1 << 30)	) @ clear HSCTLR.TE
+ THUMB(		orr	r1, r1, #(1 << 30)	) @ set HSCTLR.TE
+		mcr	p15, 4, r1, c1, c0, 0
 		adr	r0, __hyp_reentry_vectors
 		mcr	p15, 4, r0, c12, c0, 0	@ set HYP vector base (HVBAR)
 		isb

arch/arm/boot/dts/am437x-l4.dtsi+1−1

@@ -521,7 +521,7 @@ · 520 unmodified lines
521	ranges = <0x0 0x100000 0x8000>;	521	ranges = <0x0 0x100000 0x8000>;
522		522
523	mac_sw: switch@0 {	523	mac_sw: switch@0 {
524	compatible = "ti,am4372-cpsw","ti,cpsw-switch";	524	compatible = "ti,am4372-cpsw-switch", "ti,cpsw-switch";
525	reg = <0x0 0x4000>;	525	reg = <0x0 0x4000>;
526	ranges = <0 0 0x4000>;	526	ranges = <0 0 0x4000>;
527	clocks = <&cpsw_125mhz_gclk>, <&dpll_clksel_mac_clk>;	527	clocks = <&cpsw_125mhz_gclk>, <&dpll_clksel_mac_clk>;

arch/arm/boot/dts/dra76x.dtsi+2−2

@@ -32,8 +32,8 @@ · 31 unmodified lines
32	interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,	32	interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
33	<GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;	33	<GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
34	interrupt-names = "int0", "int1";	34	interrupt-names = "int0", "int1";
35	clocks = <&mcan_clk>, <&l3_iclk_div>;	35	clocks = <&l3_iclk_div>, <&mcan_clk>;
36	clock-names = "cclk", "hclk";	36	clock-names = "hclk", "cclk";
37	bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>;	37	bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>;
38	};	38	};
39	};	39	};

arch/arm/include/asm/pgtable-2level.h+2−0

@@ -75,6 +75,8 @@ · 74 unmodified lines
75	#define PTE_HWTABLE_OFF (PTE_HWTABLE_PTRS * sizeof(pte_t))	75	#define PTE_HWTABLE_OFF (PTE_HWTABLE_PTRS * sizeof(pte_t))
76	#define PTE_HWTABLE_SIZE (PTRS_PER_PTE * sizeof(u32))	76	#define PTE_HWTABLE_SIZE (PTRS_PER_PTE * sizeof(u32))
77		77
		78	#define MAX_POSSIBLE_PHYSMEM_BITS 32
		79
78	/*	80	/*
79	* PMD_SHIFT determines the size of the area a second-level page table can map	81	* PMD_SHIFT determines the size of the area a second-level page table can map
80	* PGDIR_SHIFT determines what a third-level page table entry can map	82	* PGDIR_SHIFT determines what a third-level page table entry can map

arch/arm/include/asm/pgtable-3level.h+2−0

@@ -25,6 +25,8 @@ · 24 unmodified lines
25	#define PTE_HWTABLE_OFF (0)	25	#define PTE_HWTABLE_OFF (0)
26	#define PTE_HWTABLE_SIZE (PTRS_PER_PTE * sizeof(u64))	26	#define PTE_HWTABLE_SIZE (PTRS_PER_PTE * sizeof(u64))
27		27
		28	#define MAX_POSSIBLE_PHYSMEM_BITS 40
		29
28	/*	30	/*
29	* PGDIR_SHIFT determines the size a top-level page table entry can map.	31	* PGDIR_SHIFT determines the size a top-level page table entry can map.
30	*/	32	*/

arch/arm/mach-omap2/Kconfig+2−1

 	depends on ARCH_MULTI_V6
 	select ARCH_OMAP2PLUS
 	select CPU_V6
-	select PM_GENERIC_DOMAINS if PM
 	select SOC_HAS_OMAP2_SDRC
 config ARCH_OMAP3
 	select OMAP_DM_TIMER
 	select OMAP_GPMC
 	select PINCTRL
+	select PM_GENERIC_DOMAINS if PM
+	select PM_GENERIC_DOMAINS_OF if PM
 	select RESET_CONTROLLER
 	select SOC_BUS
 	select TI_SYSC

arch/arm/mach-omap2/cpuidle44xx.c+5−3

 		if (mpuss_can_lose_context) {
 			error = cpu_cluster_pm_enter();
 			if (error) {
-				omap_set_pwrdm_state(mpu_pd, PWRDM_POWER_ON);
+				index = 0;
-				goto cpu_cluster_pm_out;
+				cx = state_ptr + index;
+				pwrdm_set_logic_retst(mpu_pd, cx->mpu_logic_state);
+				omap_set_pwrdm_state(mpu_pd, cx->mpu_state);
+				mpuss_can_lose_context = 0;
 			}
 		}
 	}
 	omap4_enter_lowpower(dev->cpu, cx->cpu_state);
 	cpu_done[dev->cpu] = true;
-cpu_cluster_pm_out:
 	/* Wakeup CPU1 only if it is not offlined */
 	if (dev->cpu == 0 && cpumask_test_cpu(1, cpu_online_mask)) {

arch/arm64/boot/dts/broadcom/stingray/stingray-usb.dtsi+10−10

@@ -5,20 +5,20 @@ · 4 unmodified lines
5	usb {	5	usb {
6	compatible = "simple-bus";	6	compatible = "simple-bus";
7	dma-ranges;	7	dma-ranges;
8	#address-cells = <1>;	8	#address-cells = <2>;
9	#size-cells = <1>;	9	#size-cells = <2>;
10	ranges = <0x0 0x0 0x68500000 0x00400000>;	10	ranges = <0x0 0x0 0x0 0x68500000 0x0 0x00400000>;
11		11
12	usbphy0: usb-phy@0 {	12	usbphy0: usb-phy@0 {
13	compatible = "brcm,sr-usb-combo-phy";	13	compatible = "brcm,sr-usb-combo-phy";
14	reg = <0x00000000 0x100>;	14	reg = <0x0 0x00000000 0x0 0x100>;
15	#phy-cells = <1>;	15	#phy-cells = <1>;
16	status = "disabled";	16	status = "disabled";
17	};	17	};
18		18
19	xhci0: usb@1000 {	19	xhci0: usb@1000 {
20	compatible = "generic-xhci";	20	compatible = "generic-xhci";
21	reg = <0x00001000 0x1000>;	21	reg = <0x0 0x00001000 0x0 0x1000>;
22	interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;	22	interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
23	phys = <&usbphy0 1>, <&usbphy0 0>;	23	phys = <&usbphy0 1>, <&usbphy0 0>;
24	phy-names = "phy0", "phy1";	24	phy-names = "phy0", "phy1";
@@ -28,7 +28,7 @@ · 3 unmodified lines
28		28
29	bdc0: usb@2000 {	29	bdc0: usb@2000 {
30	compatible = "brcm,bdc-v0.16";	30	compatible = "brcm,bdc-v0.16";
31	reg = <0x00002000 0x1000>;	31	reg = <0x0 0x00002000 0x0 0x1000>;
32	interrupts = <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>;	32	interrupts = <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>;
33	phys = <&usbphy0 0>, <&usbphy0 1>;	33	phys = <&usbphy0 0>, <&usbphy0 1>;
34	phy-names = "phy0", "phy1";	34	phy-names = "phy0", "phy1";
@@ -38,21 +38,21 @@ · 3 unmodified lines
38		38
39	usbphy1: usb-phy@10000 {	39	usbphy1: usb-phy@10000 {
40	compatible = "brcm,sr-usb-combo-phy";	40	compatible = "brcm,sr-usb-combo-phy";
41	reg = <0x00010000 0x100>;	41	reg = <0x0 0x00010000 0x0 0x100>;
42	#phy-cells = <1>;	42	#phy-cells = <1>;
43	status = "disabled";	43	status = "disabled";
44	};	44	};
45		45
46	usbphy2: usb-phy@20000 {	46	usbphy2: usb-phy@20000 {
47	compatible = "brcm,sr-usb-hs-phy";	47	compatible = "brcm,sr-usb-hs-phy";
48	reg = <0x00020000 0x100>;	48	reg = <0x0 0x00020000 0x0 0x100>;
49	#phy-cells = <0>;	49	#phy-cells = <0>;
50	status = "disabled";	50	status = "disabled";
51	};	51	};
52		52
53	xhci1: usb@11000 {	53	xhci1: usb@11000 {
54	compatible = "generic-xhci";	54	compatible = "generic-xhci";
55	reg = <0x00011000 0x1000>;	55	reg = <0x0 0x00011000 0x0 0x1000>;
56	interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;	56	interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
57	phys = <&usbphy1 1>, <&usbphy2>, <&usbphy1 0>;	57	phys = <&usbphy1 1>, <&usbphy2>, <&usbphy1 0>;
58	phy-names = "phy0", "phy1", "phy2";	58	phy-names = "phy0", "phy1", "phy2";
@@ -62,7 +62,7 @@ · 3 unmodified lines
62		62
63	bdc1: usb@21000 {	63	bdc1: usb@21000 {
64	compatible = "brcm,bdc-v0.16";	64	compatible = "brcm,bdc-v0.16";
65	reg = <0x00021000 0x1000>;	65	reg = <0x0 0x00021000 0x0 0x1000>;
66	interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;	66	interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
67	phys = <&usbphy2>;	67	phys = <&usbphy2>;
68	phy-names = "phy0";	68	phy-names = "phy0";

arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts+0−12

@@ -10,18 +10,6 @@ · 9 unmodified lines
10	model = "NVIDIA Jetson TX2 Developer Kit";	10	model = "NVIDIA Jetson TX2 Developer Kit";
11	compatible = "nvidia,p2771-0000", "nvidia,tegra186";	11	compatible = "nvidia,p2771-0000", "nvidia,tegra186";
12		12
13	aconnect {
14	status = "okay";
15
16	dma-controller@2930000 {
17	status = "okay";
18	};
19
20	interrupt-controller@2a40000 {
21	status = "okay";
22	};
23	};
24
25	i2c@3160000 {	13	i2c@3160000 {
26	power-monitor@42 {	14	power-monitor@42 {
27	compatible = "ti,ina3221";	15	compatible = "ti,ina3221";

arch/arm64/boot/dts/nvidia/tegra194-p3668-0000.dtsi+1−1

@@ -54,7 +54,7 @@ · 53 unmodified lines
54	status = "okay";	54	status = "okay";
55	};	55	};
56		56
57	serial@c280000 {	57	serial@3100000 {
58	status = "okay";	58	status = "okay";
59	};	59	};
60		60

arch/arm64/boot/dts/nvidia/tegra194.dtsi+1−1

@@ -1161,7 +1161,7 @@ · 1160 unmodified lines
1161		1161
1162	hsp_aon: hsp@c150000 {	1162	hsp_aon: hsp@c150000 {
1163	compatible = "nvidia,tegra194-hsp", "nvidia,tegra186-hsp";	1163	compatible = "nvidia,tegra194-hsp", "nvidia,tegra186-hsp";
1164	reg = <0x0c150000 0xa0000>;	1164	reg = <0x0c150000 0x90000>;
1165	interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,	1165	interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
1166	<GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,	1166	<GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
1167	<GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,	1167	<GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,

arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi+10−10

 		vin-supply = <&vdd_5v0_sys>;
 	};
-	vdd_usb_vbus_otg: regulator@11 {
-		compatible = "regulator-fixed";
-		regulator-name = "USB_VBUS_EN0";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		gpio = <&gpio TEGRA_GPIO(CC, 4) GPIO_ACTIVE_HIGH>;
-		enable-active-high;
-		vin-supply = <&vdd_5v0_sys>;
-	};
 	vdd_hdmi: regulator@10 {
 		compatible = "regulator-fixed";
 		regulator-name = "VDD_HDMI_5V0";
 		enable-active-high;
 		vin-supply = <&vdd_3v3_sys>;
 	};
+	vdd_usb_vbus_otg: regulator@14 {
+		compatible = "regulator-fixed";
+		regulator-name = "USB_VBUS_EN0";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&gpio TEGRA_GPIO(CC, 4) GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		vin-supply = <&vdd_5v0_sys>;
+	};
 };

arch/arm64/boot/dts/nvidia/tegra234-sim-vdk.dts+3−3

@@ -8,7 +8,7 @@ · 7 unmodified lines
8	compatible = "nvidia,tegra234-vdk", "nvidia,tegra234";	8	compatible = "nvidia,tegra234-vdk", "nvidia,tegra234";
9		9
10	aliases {	10	aliases {
11	sdhci3 = "/cbb@0/sdhci@3460000";	11	mmc3 = "/bus@0/mmc@3460000";
12	serial0 = &uarta;	12	serial0 = &uarta;
13	};	13	};
14		14
@@ -17,12 +17,12 @@ · 2 unmodified lines
17	stdout-path = "serial0:115200n8";	17	stdout-path = "serial0:115200n8";
18	};	18	};
19		19
20	cbb@0 {	20	bus@0 {
21	serial@3100000 {	21	serial@3100000 {
22	status = "okay";	22	status = "okay";
23	};	23	};
24		24
25	sdhci@3460000 {	25	mmc@3460000 {
26	status = "okay";	26	status = "okay";
27	bus-width = <8>;	27	bus-width = <8>;
28	non-removable;	28	non-removable;

arch/arm64/boot/dts/qcom/ipq6018.dtsi+36−36

@@ -179,22 +179,22 @@ · 178 unmodified lines
179	};	179	};
180		180
181	soc: soc {	181	soc: soc {
182	#address-cells = <1>;	182	#address-cells = <2>;
183	#size-cells = <1>;	183	#size-cells = <2>;
184	ranges = <0 0 0 0xffffffff>;	184	ranges = <0 0 0 0 0x0 0xffffffff>;
185	dma-ranges;	185	dma-ranges;
186	compatible = "simple-bus";	186	compatible = "simple-bus";
187		187
188	prng: qrng@e1000 {	188	prng: qrng@e1000 {
189	compatible = "qcom,prng-ee";	189	compatible = "qcom,prng-ee";
190	reg = <0xe3000 0x1000>;	190	reg = <0x0 0xe3000 0x0 0x1000>;
191	clocks = <&gcc GCC_PRNG_AHB_CLK>;	191	clocks = <&gcc GCC_PRNG_AHB_CLK>;
192	clock-names = "core";	192	clock-names = "core";
193	};	193	};
194		194
195	cryptobam: dma@704000 {	195	cryptobam: dma@704000 {
196	compatible = "qcom,bam-v1.7.0";	196	compatible = "qcom,bam-v1.7.0";
197	reg = <0x00704000 0x20000>;	197	reg = <0x0 0x00704000 0x0 0x20000>;
198	interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;	198	interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
199	clocks = <&gcc GCC_CRYPTO_AHB_CLK>;	199	clocks = <&gcc GCC_CRYPTO_AHB_CLK>;
200	clock-names = "bam_clk";	200	clock-names = "bam_clk";
@@ -206,7 +206,7 @@ · 5 unmodified lines
206		206
207	crypto: crypto@73a000 {	207	crypto: crypto@73a000 {
208	compatible = "qcom,crypto-v5.1";	208	compatible = "qcom,crypto-v5.1";
209	reg = <0x0073a000 0x6000>;	209	reg = <0x0 0x0073a000 0x0 0x6000>;
210	clocks = <&gcc GCC_CRYPTO_AHB_CLK>,	210	clocks = <&gcc GCC_CRYPTO_AHB_CLK>,
211	<&gcc GCC_CRYPTO_AXI_CLK>,	211	<&gcc GCC_CRYPTO_AXI_CLK>,
212	<&gcc GCC_CRYPTO_CLK>;	212	<&gcc GCC_CRYPTO_CLK>;
@@ -217,7 +217,7 @@ · 4 unmodified lines
217		217
218	tlmm: pinctrl@1000000 {	218	tlmm: pinctrl@1000000 {
219	compatible = "qcom,ipq6018-pinctrl";	219	compatible = "qcom,ipq6018-pinctrl";
220	reg = <0x01000000 0x300000>;	220	reg = <0x0 0x01000000 0x0 0x300000>;
221	interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;	221	interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
222	gpio-controller;	222	gpio-controller;
223	#gpio-cells = <2>;	223	#gpio-cells = <2>;
@@ -235,7 +235,7 @@ · 11 unmodified lines
235		235
236	gcc: gcc@1800000 {	236	gcc: gcc@1800000 {
237	compatible = "qcom,gcc-ipq6018";	237	compatible = "qcom,gcc-ipq6018";
238	reg = <0x01800000 0x80000>;	238	reg = <0x0 0x01800000 0x0 0x80000>;
239	clocks = <&xo>, <&sleep_clk>;	239	clocks = <&xo>, <&sleep_clk>;
240	clock-names = "xo", "sleep_clk";	240	clock-names = "xo", "sleep_clk";
241	#clock-cells = <1>;	241	#clock-cells = <1>;
@@ -244,17 +244,17 @@ · 2 unmodified lines
244		244
245	tcsr_mutex_regs: syscon@1905000 {	245	tcsr_mutex_regs: syscon@1905000 {
246	compatible = "syscon";	246	compatible = "syscon";
247	reg = <0x01905000 0x8000>;	247	reg = <0x0 0x01905000 0x0 0x8000>;
248	};	248	};
249		249
250	tcsr_q6: syscon@1945000 {	250	tcsr_q6: syscon@1945000 {
251	compatible = "syscon";	251	compatible = "syscon";
252	reg = <0x01945000 0xe000>;	252	reg = <0x0 0x01945000 0x0 0xe000>;
253	};	253	};
254		254
255	blsp_dma: dma@7884000 {	255	blsp_dma: dma@7884000 {
256	compatible = "qcom,bam-v1.7.0";	256	compatible = "qcom,bam-v1.7.0";
257	reg = <0x07884000 0x2b000>;	257	reg = <0x0 0x07884000 0x0 0x2b000>;
258	interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;	258	interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
259	clocks = <&gcc GCC_BLSP1_AHB_CLK>;	259	clocks = <&gcc GCC_BLSP1_AHB_CLK>;
260	clock-names = "bam_clk";	260	clock-names = "bam_clk";
@@ -264,7 +264,7 @@ · 3 unmodified lines
264		264
265	blsp1_uart3: serial@78b1000 {	265	blsp1_uart3: serial@78b1000 {
266	compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";	266	compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
267	reg = <0x078b1000 0x200>;	267	reg = <0x0 0x078b1000 0x0 0x200>;
268	interrupts = <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;	268	interrupts = <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
269	clocks = <&gcc GCC_BLSP1_UART3_APPS_CLK>,	269	clocks = <&gcc GCC_BLSP1_UART3_APPS_CLK>,
270	<&gcc GCC_BLSP1_AHB_CLK>;	270	<&gcc GCC_BLSP1_AHB_CLK>;
@@ -276,7 +276,7 @@ · 5 unmodified lines
276	compatible = "qcom,spi-qup-v2.2.1";	276	compatible = "qcom,spi-qup-v2.2.1";
277	#address-cells = <1>;	277	#address-cells = <1>;
278	#size-cells = <0>;	278	#size-cells = <0>;
279	reg = <0x078b5000 0x600>;	279	reg = <0x0 0x078b5000 0x0 0x600>;
280	interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;	280	interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
281	spi-max-frequency = <50000000>;	281	spi-max-frequency = <50000000>;
282	clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,	282	clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
@@ -291,7 +291,7 @@ · 8 unmodified lines
291	compatible = "qcom,spi-qup-v2.2.1";	291	compatible = "qcom,spi-qup-v2.2.1";
292	#address-cells = <1>;	292	#address-cells = <1>;
293	#size-cells = <0>;	293	#size-cells = <0>;
294	reg = <0x078b6000 0x600>;	294	reg = <0x0 0x078b6000 0x0 0x600>;
295	interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;	295	interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
296	spi-max-frequency = <50000000>;	296	spi-max-frequency = <50000000>;
297	clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>,	297	clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>,
@@ -306,7 +306,7 @@ · 8 unmodified lines
306	compatible = "qcom,i2c-qup-v2.2.1";	306	compatible = "qcom,i2c-qup-v2.2.1";
307	#address-cells = <1>;	307	#address-cells = <1>;
308	#size-cells = <0>;	308	#size-cells = <0>;
309	reg = <0x078b6000 0x600>;	309	reg = <0x0 0x078b6000 0x0 0x600>;
310	interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;	310	interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
311	clocks = <&gcc GCC_BLSP1_AHB_CLK>,	311	clocks = <&gcc GCC_BLSP1_AHB_CLK>,
312	<&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;	312	<&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
@@ -321,7 +321,7 @@ · 8 unmodified lines
321	compatible = "qcom,i2c-qup-v2.2.1";	321	compatible = "qcom,i2c-qup-v2.2.1";
322	#address-cells = <1>;	322	#address-cells = <1>;
323	#size-cells = <0>;	323	#size-cells = <0>;
324	reg = <0x078b7000 0x600>;	324	reg = <0x0 0x078b7000 0x0 0x600>;
325	interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;	325	interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
326	clocks = <&gcc GCC_BLSP1_AHB_CLK>,	326	clocks = <&gcc GCC_BLSP1_AHB_CLK>,
327	<&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>;	327	<&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>;
@@ -336,24 +336,24 @@ · 8 unmodified lines
336	compatible = "qcom,msm-qgic2";	336	compatible = "qcom,msm-qgic2";
337	interrupt-controller;	337	interrupt-controller;
338	#interrupt-cells = <0x3>;	338	#interrupt-cells = <0x3>;
339	reg = <0x0b000000 0x1000>, /GICD/	339	reg = <0x0 0x0b000000 0x0 0x1000>, /GICD/
340	<0x0b002000 0x1000>, /GICC/	340	<0x0 0x0b002000 0x0 0x1000>, /GICC/
341	<0x0b001000 0x1000>, /GICH/	341	<0x0 0x0b001000 0x0 0x1000>, /GICH/
342	<0x0b004000 0x1000>; /GICV/	342	<0x0 0x0b004000 0x0 0x1000>; /GICV/
343	interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;	343	interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
344	};	344	};
345		345
346	watchdog@b017000 {	346	watchdog@b017000 {
347	compatible = "qcom,kpss-wdt";	347	compatible = "qcom,kpss-wdt";
348	interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;	348	interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
349	reg = <0x0b017000 0x40>;	349	reg = <0x0 0x0b017000 0x0 0x40>;
350	clocks = <&sleep_clk>;	350	clocks = <&sleep_clk>;
351	timeout-sec = <10>;	351	timeout-sec = <10>;
352	};	352	};
353		353
354	apcs_glb: mailbox@b111000 {	354	apcs_glb: mailbox@b111000 {
355	compatible = "qcom,ipq6018-apcs-apps-global";	355	compatible = "qcom,ipq6018-apcs-apps-global";
356	reg = <0x0b111000 0x1000>;	356	reg = <0x0 0x0b111000 0x0 0x1000>;
357	#clock-cells = <1>;	357	#clock-cells = <1>;
358	clocks = <&a53pll>, <&xo>;	358	clocks = <&a53pll>, <&xo>;
359	clock-names = "pll", "xo";	359	clock-names = "pll", "xo";
@@ -362,7 +362,7 @@ · 2 unmodified lines
362		362
363	a53pll: clock@b116000 {	363	a53pll: clock@b116000 {
364	compatible = "qcom,ipq6018-a53pll";	364	compatible = "qcom,ipq6018-a53pll";
365	reg = <0x0b116000 0x40>;	365	reg = <0x0 0x0b116000 0x0 0x40>;
366	#clock-cells = <0>;	366	#clock-cells = <0>;
367	clocks = <&xo>;	367	clocks = <&xo>;
368	clock-names = "xo";	368	clock-names = "xo";
@@ -377,68 +377,68 @@ · 8 unmodified lines
377	};	377	};
378		378
379	timer@b120000 {	379	timer@b120000 {
380	#address-cells = <1>;	380	#address-cells = <2>;
381	#size-cells = <1>;	381	#size-cells = <2>;
382	ranges;	382	ranges;
383	compatible = "arm,armv7-timer-mem";	383	compatible = "arm,armv7-timer-mem";
384	reg = <0x0b120000 0x1000>;	384	reg = <0x0 0x0b120000 0x0 0x1000>;
385	clock-frequency = <19200000>;	385	clock-frequency = <19200000>;
386		386
387	frame@b120000 {	387	frame@b120000 {
388	frame-number = <0>;	388	frame-number = <0>;
389	interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,	389	interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
390	<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;	390	<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
391	reg = <0x0b121000 0x1000>,	391	reg = <0x0 0x0b121000 0x0 0x1000>,
392	<0x0b122000 0x1000>;	392	<0x0 0x0b122000 0x0 0x1000>;
393	};	393	};
394		394
395	frame@b123000 {	395	frame@b123000 {
396	frame-number = <1>;	396	frame-number = <1>;
397	interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;	397	interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
398	reg = <0xb123000 0x1000>;	398	reg = <0x0 0xb123000 0x0 0x1000>;
399	status = "disabled";	399	status = "disabled";
400	};	400	};
401		401
402	frame@b124000 {	402	frame@b124000 {
403	frame-number = <2>;	403	frame-number = <2>;
404	interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;	404	interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
405	reg = <0x0b124000 0x1000>;	405	reg = <0x0 0x0b124000 0x0 0x1000>;
406	status = "disabled";	406	status = "disabled";
407	};	407	};
408		408
409	frame@b125000 {	409	frame@b125000 {
410	frame-number = <3>;	410	frame-number = <3>;
411	interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;	411	interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
412	reg = <0x0b125000 0x1000>;	412	reg = <0x0 0x0b125000 0x0 0x1000>;
413	status = "disabled";	413	status = "disabled";
414	};	414	};
415		415
416	frame@b126000 {	416	frame@b126000 {
417	frame-number = <4>;	417	frame-number = <4>;
418	interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;	418	interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
419	reg = <0x0b126000 0x1000>;	419	reg = <0x0 0x0b126000 0x0 0x1000>;
420	status = "disabled";	420	status = "disabled";
421	};	421	};
422		422
423	frame@b127000 {	423	frame@b127000 {
424	frame-number = <5>;	424	frame-number = <5>;
425	interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;	425	interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
426	reg = <0x0b127000 0x1000>;	426	reg = <0x0 0x0b127000 0x0 0x1000>;
427	status = "disabled";	427	status = "disabled";
428	};	428	};
429		429
430	frame@b128000 {	430	frame@b128000 {
431	frame-number = <6>;	431	frame-number = <6>;
432	interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;	432	interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
433	reg = <0x0b128000 0x1000>;	433	reg = <0x0 0x0b128000 0x0 0x1000>;
434	status = "disabled";	434	status = "disabled";
435	};	435	};
436	};	436	};
437		437
438	q6v5_wcss: remoteproc@cd00000 {	438	q6v5_wcss: remoteproc@cd00000 {
439	compatible = "qcom,ipq8074-wcss-pil";	439	compatible = "qcom,ipq8074-wcss-pil";
440	reg = <0x0cd00000 0x4040>,	440	reg = <0x0 0x0cd00000 0x0 0x4040>,
441	<0x004ab000 0x20>;	441	<0x0 0x004ab000 0x0 0x20>;
442	reg-names = "qdsp6",	442	reg-names = "qdsp6",
443	"rmb";	443	"rmb";
444	interrupts-extended = <&intc GIC_SPI 325 IRQ_TYPE_EDGE_RISING>,	444	interrupts-extended = <&intc GIC_SPI 325 IRQ_TYPE_EDGE_RISING>,

arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts+0−1

@@ -243,7 +243,6 @@ · 242 unmodified lines
243	interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;	243	interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
244	pinctrl-names = "default";	244	pinctrl-names = "default";
245	pinctrl-0 = <&pmic_int>;	245	pinctrl-0 = <&pmic_int>;
246	rockchip,system-power-controller;
247	wakeup-source;	246	wakeup-source;
248	#clock-cells = <1>;	247	#clock-cells = <1>;
249	clock-output-names = "rk808-clkout1", "xin32k";	248	clock-output-names = "rk808-clkout1", "xin32k";

arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts+1−1

@@ -20,7 +20,7 @@ · 19 unmodified lines
20	gmac_clk: gmac-clock {	20	gmac_clk: gmac-clock {
21	compatible = "fixed-clock";	21	compatible = "fixed-clock";
22	clock-frequency = <125000000>;	22	clock-frequency = <125000000>;
23	clock-output-names = "gmac_clk";	23	clock-output-names = "gmac_clkin";
24	#clock-cells = <0>;	24	#clock-cells = <0>;
25	};	25	};
26		26

arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi+2−2

@@ -74,14 +74,14 @@ · 73 unmodified lines
74	label = "red:diy";	74	label = "red:diy";
75	gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;	75	gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
76	default-state = "off";	76	default-state = "off";
77	linux,default-trigger = "mmc1";	77	linux,default-trigger = "mmc2";
78	};	78	};
79		79
80	yellow_led: led-2 {	80	yellow_led: led-2 {
81	label = "yellow:yellow-led";	81	label = "yellow:yellow-led";
82	gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;	82	gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
83	default-state = "off";	83	default-state = "off";
84	linux,default-trigger = "mmc0";	84	linux,default-trigger = "mmc1";
85	};	85	};
86	};	86	};
87		87

arch/arm64/boot/dts/rockchip/rk3399.dtsi+3−0

 		i2c6 = &i2c6;
 		i2c7 = &i2c7;
 		i2c8 = &i2c8;
+		mmc0 = &sdio0;
+		mmc1 = &sdmmc;
+		mmc2 = &sdhci;
 		serial0 = &uart0;
 		serial1 = &uart1;
 		serial2 = &uart2;

arch/arm64/include/asm/pgtable.h+18−16

 #define pte_valid(pte)		(!!(pte_val(pte) & PTE_VALID))
 #define pte_valid_not_user(pte) \
 	((pte_val(pte) & (PTE_VALID | PTE_USER)) == PTE_VALID)
-#define pte_valid_young(pte) \
-	((pte_val(pte) & (PTE_VALID | PTE_AF)) == (PTE_VALID | PTE_AF))
 #define pte_valid_user(pte) \
 	((pte_val(pte) & (PTE_VALID | PTE_USER)) == (PTE_VALID | PTE_USER))
  * Could the pte be present in the TLB? We must check mm_tlb_flush_pending
  * so that we don't erroneously return false for pages that have been
  * remapped as PROT_NONE but are yet to be flushed from the TLB.
+ * Note that we can't make any assumptions based on the state of the access
+ * flag, since ptep_clear_flush_young() elides a DSB when invalidating the
+ * TLB.
  */
 #define pte_accessible(mm, pte)	\
-	(mm_tlb_flush_pending(mm) ? pte_present(pte) : pte_valid_young(pte))
+	(mm_tlb_flush_pending(mm) ? pte_present(pte) : pte_valid(pte))
 /*
  * p??_access_permitted() is true for valid user mappings (subject to the
 	return pmd;
 }
-static inline pte_t pte_wrprotect(pte_t pte)
-{
-	pte = clear_pte_bit(pte, __pgprot(PTE_WRITE));
-	pte = set_pte_bit(pte, __pgprot(PTE_RDONLY));
-	return pte;
-}
 static inline pte_t pte_mkwrite(pte_t pte)
 {
 	pte = set_pte_bit(pte, __pgprot(PTE_WRITE));
 	return pte;
 }
+static inline pte_t pte_wrprotect(pte_t pte)
+{
+	/*
+	 * If hardware-dirty (PTE_WRITE/DBM bit set and PTE_RDONLY
+	 * clear), set the PTE_DIRTY bit.
+	 */
+	if (pte_hw_dirty(pte))
+		pte = pte_mkdirty(pte);
+	pte = clear_pte_bit(pte, __pgprot(PTE_WRITE));
+	pte = set_pte_bit(pte, __pgprot(PTE_RDONLY));
+	return pte;
+}
 static inline pte_t pte_mkold(pte_t pte)
 {
 	return clear_pte_bit(pte, __pgprot(PTE_AF));
 	pte = READ_ONCE(*ptep);
 	do {
 		old_pte = pte;
-		/*
-		 * If hardware-dirty (PTE_WRITE/DBM bit set and PTE_RDONLY
-		 * clear), set the PTE_DIRTY bit.
-		 */
-		if (pte_hw_dirty(pte))
-			pte = pte_mkdirty(pte);
 		pte = pte_wrprotect(pte);
 		pte_val(pte) = cmpxchg_relaxed(&pte_val(*ptep),
 					       pte_val(old_pte), pte_val(pte));

arch/arm64/include/asm/probes.h+2−0

@@ -7,6 +7,8 @@ · 6 unmodified lines
7	#ifndef _ARM_PROBES_H	7	#ifndef _ARM_PROBES_H
8	#define _ARM_PROBES_H	8	#define _ARM_PROBES_H
9		9
		10	#include <asm/insn.h>
		11
10	typedef u32 probe_opcode_t;	12	typedef u32 probe_opcode_t;
11	typedef void (probes_handler_t) (u32 opcode, long addr, struct pt_regs *);	13	typedef void (probes_handler_t) (u32 opcode, long addr, struct pt_regs *);
12		14

arch/arm64/kvm/hyp/nvhe/hyp.lds.S+5−0

 SECTIONS {
 	HYP_SECTION(.text)
+	/*
+	 * .hyp..data..percpu needs to be page aligned to maintain the same
+	 * alignment for when linking into vmlinux.
+	 */
+	. = ALIGN(PAGE_SIZE);
 	HYP_SECTION_NAME(.data..percpu) : {
 		PERCPU_INPUT(L1_CACHE_BYTES)
 	}

arch/arm64/kvm/vgic/vgic-mmio-v3.c+20−2

@@ -273,6 +273,23 @@ static unsigned long vgic_mmio_read_v3r_typer(struct kvm_vcpu *vcpu, · 272 unmodified lines
273	return extract_bytes(value, addr & 7, len);	273	return extract_bytes(value, addr & 7, len);
274	}	274	}
275		275
		276	static unsigned long vgic_uaccess_read_v3r_typer(struct kvm_vcpu *vcpu,
		277	gpa_t addr, unsigned int len)
		278	{
		279	unsigned long mpidr = kvm_vcpu_get_mpidr_aff(vcpu);
		280	int target_vcpu_id = vcpu->vcpu_id;
		281	u64 value;
		282
		283	value = (u64)(mpidr & GENMASK(23, 0)) << 32;
		284	value \|= ((target_vcpu_id & 0xffff) << 8);
		285
		286	if (vgic_has_its(vcpu->kvm))
		287	value \|= GICR_TYPER_PLPIS;
		288
		289	/* reporting of the Last bit is not supported for userspace */
		290	return extract_bytes(value, addr & 7, len);
		291	}
		292
276	static unsigned long vgic_mmio_read_v3r_iidr(struct kvm_vcpu *vcpu,	293	static unsigned long vgic_mmio_read_v3r_iidr(struct kvm_vcpu *vcpu,
277	gpa_t addr, unsigned int len)	294	gpa_t addr, unsigned int len)
278	{	295	{
@@ -593,8 +610,9 @@ static const struct vgic_register_region vgic_v3_rd_registers[] = { · 314 unmodified lines
593	REGISTER_DESC_WITH_LENGTH(GICR_IIDR,	610	REGISTER_DESC_WITH_LENGTH(GICR_IIDR,
594	vgic_mmio_read_v3r_iidr, vgic_mmio_write_wi, 4,	611	vgic_mmio_read_v3r_iidr, vgic_mmio_write_wi, 4,
595	VGIC_ACCESS_32bit),	612	VGIC_ACCESS_32bit),
596	REGISTER_DESC_WITH_LENGTH(GICR_TYPER,	613	REGISTER_DESC_WITH_LENGTH_UACCESS(GICR_TYPER,
597	vgic_mmio_read_v3r_typer, vgic_mmio_write_wi, 8,	614	vgic_mmio_read_v3r_typer, vgic_mmio_write_wi,
		615	vgic_uaccess_read_v3r_typer, vgic_mmio_uaccess_write_wi, 8,
598	VGIC_ACCESS_64bit \| VGIC_ACCESS_32bit),	616	VGIC_ACCESS_64bit \| VGIC_ACCESS_32bit),
599	REGISTER_DESC_WITH_LENGTH(GICR_WAKER,	617	REGISTER_DESC_WITH_LENGTH(GICR_WAKER,
600	vgic_mmio_read_raz, vgic_mmio_write_wi, 4,	618	vgic_mmio_read_raz, vgic_mmio_write_wi, 4,

arch/ia64/include/asm/sparsemem.h+6−0

@@ -18,4 +18,10 @@ · 17 unmodified lines
18	#endif	18	#endif
19		19
20	#endif /* CONFIG_SPARSEMEM */	20	#endif /* CONFIG_SPARSEMEM */
		21
		22	#ifdef CONFIG_MEMORY_HOTPLUG
		23	int memory_add_physaddr_to_nid(u64 addr);
		24	#define memory_add_physaddr_to_nid memory_add_physaddr_to_nid
		25	#endif
		26
21	#endif /* _ASM_IA64_SPARSEMEM_H */	27	#endif /* _ASM_IA64_SPARSEMEM_H */

arch/mips/include/asm/pgtable-32.h+3−0

 #if defined(CONFIG_XPA)
+#define MAX_POSSIBLE_PHYSMEM_BITS 40
 #define pte_pfn(x)		(((unsigned long)((x).pte_high >> _PFN_SHIFT)) | (unsigned long)((x).pte_low << _PAGE_PRESENT_SHIFT))
 static inline pte_t
 pfn_pte(unsigned long pfn, pgprot_t prot)
 #elif defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
+#define MAX_POSSIBLE_PHYSMEM_BITS 36
 #define pte_pfn(x)		((unsigned long)((x).pte_high >> 6))
 static inline pte_t pfn_pte(unsigned long pfn, pgprot_t prot)
 #else
+#define MAX_POSSIBLE_PHYSMEM_BITS 32
 #ifdef CONFIG_CPU_VR41XX
 #define pte_pfn(x)		((unsigned long)((x).pte >> (PAGE_SHIFT + 2)))
 #define pfn_pte(pfn, prot)	__pte(((pfn) << (PAGE_SHIFT + 2)) | pgprot_val(prot))

arch/powerpc/Makefile+0−1

@@ -248,7 +248,6 @@ KBUILD_CFLAGS += $(call cc-option,-mno-string) · 247 unmodified lines
248	cpu-as-$(CONFIG_40x) += -Wa,-m405	248	cpu-as-$(CONFIG_40x) += -Wa,-m405
249	cpu-as-$(CONFIG_44x) += -Wa,-m440	249	cpu-as-$(CONFIG_44x) += -Wa,-m440
250	cpu-as-$(CONFIG_ALTIVEC) += $(call as-option,-Wa$(comma)-maltivec)	250	cpu-as-$(CONFIG_ALTIVEC) += $(call as-option,-Wa$(comma)-maltivec)
251	cpu-as-$(CONFIG_E200) += -Wa,-me200
252	cpu-as-$(CONFIG_E500) += -Wa,-me500	251	cpu-as-$(CONFIG_E500) += -Wa,-me500
253		252
254	# When using '-many -mpower4' gas will first try and find a matching power4	253	# When using '-many -mpower4' gas will first try and find a matching power4

arch/powerpc/include/asm/book3s/32/pgtable.h+2−0

  */
 #ifdef CONFIG_PTE_64BIT
 #define PTE_RPN_MASK	(~((1ULL << PTE_RPN_SHIFT) - 1))
+#define MAX_POSSIBLE_PHYSMEM_BITS 36
 #else
 #define PTE_RPN_MASK	(~((1UL << PTE_RPN_SHIFT) - 1))
+#define MAX_POSSIBLE_PHYSMEM_BITS 32
 #endif
 /*

arch/powerpc/include/asm/book3s/64/kup-radix.h+2−0

@@ -63,6 +63,8 @@ · 62 unmodified lines
63		63
64	#else /* !__ASSEMBLY__ */	64	#else /* !__ASSEMBLY__ */
65		65
		66	#include <linux/jump_label.h>
		67
66	DECLARE_STATIC_KEY_FALSE(uaccess_flush_key);	68	DECLARE_STATIC_KEY_FALSE(uaccess_flush_key);
67		69
68	#ifdef CONFIG_PPC_KUAP	70	#ifdef CONFIG_PPC_KUAP

arch/powerpc/include/asm/mmzone.h+5−0

 #define __HAVE_ARCH_RESERVED_KERNEL_PAGES
 #endif
+#ifdef CONFIG_MEMORY_HOTPLUG
+extern int create_section_mapping(unsigned long start, unsigned long end,
+				  int nid, pgprot_t prot);
+#endif
 #endif /* __KERNEL__ */
 #endif /* _ASM_MMZONE_H_ */

arch/powerpc/include/asm/nohash/32/pgtable.h+2−0

  */
 #if defined(CONFIG_PPC32) && defined(CONFIG_PTE_64BIT)
 #define PTE_RPN_MASK	(~((1ULL << PTE_RPN_SHIFT) - 1))
+#define MAX_POSSIBLE_PHYSMEM_BITS 36
 #else
 #define PTE_RPN_MASK	(~((1UL << PTE_RPN_SHIFT) - 1))
+#define MAX_POSSIBLE_PHYSMEM_BITS 32
 #endif
 /*

arch/powerpc/include/asm/sparsemem.h+2−3

 #endif /* CONFIG_SPARSEMEM */
 #ifdef CONFIG_MEMORY_HOTPLUG
-extern int create_section_mapping(unsigned long start, unsigned long end,
-				  int nid, pgprot_t prot);
 extern int remove_section_mapping(unsigned long start, unsigned long end);
+extern int memory_add_physaddr_to_nid(u64 start);
+#define memory_add_physaddr_to_nid memory_add_physaddr_to_nid
 #ifdef CONFIG_NUMA
 extern int hot_add_scn_to_nid(unsigned long scn_addr);
 }
 #endif /* CONFIG_NUMA */
 #endif /* CONFIG_MEMORY_HOTPLUG */
 #endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_SPARSEMEM_H */

arch/powerpc/kernel/exceptions-64s.S+7−6

  * Vectors for the FWNMI option.  Share common code.
  */
 TRAMP_REAL_BEGIN(system_reset_fwnmi)
-	/* XXX: fwnmi guest could run a nested/PR guest, so why no test?  */
-	__IKVM_REAL(system_reset)=0
 	GEN_INT_ENTRY system_reset, virt=0
 #endif /* CONFIG_PPC_PSERIES */
  *   If none is found, do a Linux page fault. Linux page faults can happen in
  *   kernel mode due to user copy operations of course.
  *
+ *   KVM: The KVM HDSI handler may perform a load with MSR[DR]=1 in guest
+ *   MMU context, which may cause a DSI in the host, which must go to the
+ *   KVM handler. MSR[IR] is not enabled, so the real-mode handler will
+ *   always be used regardless of AIL setting.
+ *
  * - Radix MMU
  *   The hardware loads from the Linux page table directly, so a fault goes
  *   immediately to Linux page fault.
 	IVEC=0x300
 	IDAR=1
 	IDSISR=1
-#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
 	IKVM_SKIP=1
 	IKVM_REAL=1
-#endif
 INT_DEFINE_END(data_access)
 EXC_REAL_BEGIN(data_access, 0x300, 0x80)
  *   ppc64_bolted_size (first segment). The kernel handler must avoid stomping
  *   on user-handler data structures.
  *
+ *   KVM: Same as 0x300, DSLB must test for KVM guest.
+ *
  * A dedicated save area EXSLB is used (XXX: but it actually need not be
  * these days, we could use EXGEN).
  */
 	IAREA=PACA_EXSLB
 	IRECONCILE=0
 	IDAR=1
-#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
 	IKVM_SKIP=1
 	IKVM_REAL=1
-#endif
 INT_DEFINE_END(data_access_slb)
 EXC_REAL_BEGIN(data_access_slb, 0x380, 0x80)

arch/powerpc/kernel/head_book3s_32.S+2−1

 	bl	initial_bats
 	bl	load_segment_registers
 BEGIN_MMU_FTR_SECTION
+	bl	reloc_offset
 	bl	early_hash_table
 END_MMU_FTR_SECTION_IFSET(MMU_FTR_HPTE_TABLE)
 #if defined(CONFIG_BOOTX_TEXT)
 	ori	r6, r6, 3	/* 256kB table */
 	mtspr	SPRN_SDR1, r6
 	lis	r6, early_hash@h
-	lis	r3, Hash@ha
+	addis	r3, r3, Hash@ha
 	stw	r6, Hash@l(r3)
 	blr

arch/powerpc/kvm/book3s_xive_native.c+7−0

@@ -251,6 +251,13 @@ static vm_fault_t xive_native_esb_fault(struct vm_fault *vmf) · 250 unmodified lines
251	}	251	}
252		252
253	state = &sb->irq_state[src];	253	state = &sb->irq_state[src];
		254
		255	/* Some sanity checking */
		256	if (!state->valid) {
		257	pr_devel("%s: source %lx invalid !\n", __func__, irq);
		258	return VM_FAULT_SIGBUS;
		259	}
		260
254	kvmppc_xive_select_irq(state, &hw_num, &xd);	261	kvmppc_xive_select_irq(state, &hw_num, &xd);
255		262
256	arch_spin_lock(&sb->lock);	263	arch_spin_lock(&sb->lock);

arch/powerpc/mm/mem.c+1−0

@@ -50,6 +50,7 @@ · 49 unmodified lines
50	#include <asm/rtas.h>	50	#include <asm/rtas.h>
51	#include <asm/kasan.h>	51	#include <asm/kasan.h>
52	#include <asm/svm.h>	52	#include <asm/svm.h>
		53	#include <asm/mmzone.h>
53		54
54	#include <mm/mmu_decl.h>	55	#include <mm/mmu_decl.h>
55		56

arch/riscv/include/asm/pgtable-32.h+2−0

@@ -14,4 +14,6 @@ · 13 unmodified lines
14	#define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT)	14	#define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT)
15	#define PGDIR_MASK (~(PGDIR_SIZE - 1))	15	#define PGDIR_MASK (~(PGDIR_SIZE - 1))
16		16
		17	#define MAX_POSSIBLE_PHYSMEM_BITS 34
		18
17	#endif /* _ASM_RISCV_PGTABLE_32_H */	19	#endif /* _ASM_RISCV_PGTABLE_32_H */

arch/s390/kernel/asm-offsets.c+5−5

@@ -53,11 +53,11 @@ int main(void) · 52 unmodified lines
53	/* stack_frame offsets */	53	/* stack_frame offsets */
54	OFFSET(__SF_BACKCHAIN, stack_frame, back_chain);	54	OFFSET(__SF_BACKCHAIN, stack_frame, back_chain);
55	OFFSET(__SF_GPRS, stack_frame, gprs);	55	OFFSET(__SF_GPRS, stack_frame, gprs);
56	OFFSET(__SF_EMPTY, stack_frame, empty1);	56	OFFSET(__SF_EMPTY, stack_frame, empty1[0]);
57	OFFSET(__SF_SIE_CONTROL, stack_frame, empty1[0]);	57	OFFSET(__SF_SIE_CONTROL, stack_frame, empty1[1]);
58	OFFSET(__SF_SIE_SAVEAREA, stack_frame, empty1[1]);	58	OFFSET(__SF_SIE_SAVEAREA, stack_frame, empty1[2]);
59	OFFSET(__SF_SIE_REASON, stack_frame, empty1[2]);	59	OFFSET(__SF_SIE_REASON, stack_frame, empty1[3]);
60	OFFSET(__SF_SIE_FLAGS, stack_frame, empty1[3]);	60	OFFSET(__SF_SIE_FLAGS, stack_frame, empty1[4]);
61	BLANK();	61	BLANK();
62	OFFSET(__VDSO_GETCPU_VAL, vdso_per_cpu_data, getcpu_val);	62	OFFSET(__VDSO_GETCPU_VAL, vdso_per_cpu_data, getcpu_val);
63	BLANK();	63	BLANK();

arch/s390/kernel/entry.S+2−0

  *	%r4
  */
 load_fpu_regs:
+	stnsm	__SF_EMPTY(%r15),0xfc
 	lg	%r4,__LC_CURRENT
 	aghi	%r4,__TASK_thread
 	TSTMSK	__LC_CPU_FLAGS,_CIF_FPU
 .Lload_fpu_regs_done:
 	ni	__LC_CPU_FLAGS+7,255-_CIF_FPU
 .Lload_fpu_regs_exit:
+	ssm	__SF_EMPTY(%r15)
 	BR_EX	%r14
 .Lload_fpu_regs_end:
 ENDPROC(load_fpu_regs)

arch/s390/kernel/uv.c+8−1

 		.paddr = paddr
 	};
-	if (uv_call(0, (u64)&uvcb))
+	if (uv_call(0, (u64)&uvcb)) {
+		/*
+		 * Older firmware uses 107/d as an indication of a non secure
+		 * page. Let us emulate the newer variant (no-op).
+		 */
+		if (uvcb.header.rc == 0x107 && uvcb.header.rrc == 0xd)
+			return 0;
 		return -EINVAL;
+	}
 	return 0;
 }

arch/s390/kvm/kvm-s390.c+1−3

 		struct kvm_s390_pv_unp unp = {};
 		r = -EINVAL;
-		if (!kvm_s390_pv_is_protected(kvm))
+		if (!kvm_s390_pv_is_protected(kvm) || !mm_is_protected(kvm->mm))
 			break;
 		r = -EFAULT;
 		vcpu->arch.sie_block->pp = 0;
 		vcpu->arch.sie_block->fpf &= ~FPF_BPBC;
 		vcpu->arch.sie_block->todpr = 0;
-		vcpu->arch.sie_block->cpnc = 0;
 	}
 }
 	regs->etoken = 0;
 	regs->etoken_extension = 0;
-	regs->diag318 = 0;
 }
 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)

arch/s390/kvm/pv.c+2−1

 		return -EIO;
 	}
 	kvm->arch.gmap->guest_handle = uvcb.guest_handle;
-	atomic_set(&kvm->mm->context.is_protected, 1);
 	return 0;
 }
 	*rrc = uvcb.header.rrc;
 	KVM_UV_EVENT(kvm, 3, "PROTVIRT VM SET PARMS: rc %x rrc %x",
 		     *rc, *rrc);
+	if (!cc)
+		atomic_set(&kvm->mm->context.is_protected, 1);
 	return cc ? -EINVAL : 0;
 }

arch/s390/mm/gmap.c+2−0

 #include <linux/sched/mm.h>
 void s390_reset_acc(struct mm_struct *mm)
 {
+	if (!mm_is_protected(mm))
+		return;
 	/*
 	 * we might be called during
 	 * reset:                             we walk the pages and clear

arch/x86/events/intel/cstate.c+3−3

@@ -107,14 +107,14 @@ · 106 unmodified lines
107	MODULE_LICENSE("GPL");	107	MODULE_LICENSE("GPL");
108		108
109	#define DEFINE_CSTATE_FORMAT_ATTR(_var, _name, _format) \	109	#define DEFINE_CSTATE_FORMAT_ATTR(_var, _name, _format) \
110	static ssize_t __cstate_##_var##_show(struct kobject *kobj, \	110	static ssize_t __cstate_##_var##_show(struct device *dev, \
111	struct kobj_attribute *attr, \	111	struct device_attribute *attr, \
112	char *page) \	112	char *page) \
113	{ \	113	{ \
114	BUILD_BUG_ON(sizeof(_format) >= PAGE_SIZE); \	114	BUILD_BUG_ON(sizeof(_format) >= PAGE_SIZE); \
115	return sprintf(page, _format "\n"); \	115	return sprintf(page, _format "\n"); \
116	} \	116	} \
117	static struct kobj_attribute format_attr_##_var = \	117	static struct device_attribute format_attr_##_var = \
118	__ATTR(_name, 0444, __cstate_##_var##_show, NULL)	118	__ATTR(_name, 0444, __cstate_##_var##_show, NULL)
119		119
120	static ssize_t cstate_get_attr_cpumask(struct device *dev,	120	static ssize_t cstate_get_attr_cpumask(struct device *dev,

arch/x86/events/intel/uncore.c+2−2

@@ -94,8 +94,8 @@ end: · 93 unmodified lines
94	return map;	94	return map;
95	}	95	}
96		96
97	ssize_t uncore_event_show(struct kobject *kobj,	97	ssize_t uncore_event_show(struct device *dev,
98	struct kobj_attribute attr, char buf)	98	struct device_attribute attr, char buf)
99	{	99	{
100	struct uncore_event_desc *event =	100	struct uncore_event_desc *event =
101	container_of(attr, struct uncore_event_desc, attr);	101	container_of(attr, struct uncore_event_desc, attr);

arch/x86/events/intel/uncore.h+6−6

@@ -157,7 +157,7 @@ struct intel_uncore_box { · 156 unmodified lines
157	#define UNCORE_BOX_FLAG_CFL8_CBOX_MSR_OFFS 2	157	#define UNCORE_BOX_FLAG_CFL8_CBOX_MSR_OFFS 2
158		158
159	struct uncore_event_desc {	159	struct uncore_event_desc {
160	struct kobj_attribute attr;	160	struct device_attribute attr;
161	const char *config;	161	const char *config;
162	};	162	};
163		163
@@ -179,8 +179,8 @@ struct pci2phy_map { · 15 unmodified lines
179	struct pci2phy_map *__find_pci2phy_map(int segment);	179	struct pci2phy_map *__find_pci2phy_map(int segment);
180	int uncore_pcibus_to_physid(struct pci_bus *bus);	180	int uncore_pcibus_to_physid(struct pci_bus *bus);
181		181
182	ssize_t uncore_event_show(struct kobject *kobj,	182	ssize_t uncore_event_show(struct device *dev,
183	struct kobj_attribute attr, char buf);	183	struct device_attribute attr, char buf);
184		184
185	static inline struct intel_uncore_pmu dev_to_uncore_pmu(struct device dev)	185	static inline struct intel_uncore_pmu dev_to_uncore_pmu(struct device dev)
186	{	186	{
@@ -201,14 +201,14 @@ extern int __uncore_max_dies; · 14 unmodified lines
201	}	201	}
202		202
203	#define DEFINE_UNCORE_FORMAT_ATTR(_var, _name, _format) \	203	#define DEFINE_UNCORE_FORMAT_ATTR(_var, _name, _format) \
204	static ssize_t __uncore_##_var##_show(struct kobject *kobj, \	204	static ssize_t __uncore_##_var##_show(struct device *dev, \
205	struct kobj_attribute *attr, \	205	struct device_attribute *attr, \
206	char *page) \	206	char *page) \
207	{ \	207	{ \
208	BUILD_BUG_ON(sizeof(_format) >= PAGE_SIZE); \	208	BUILD_BUG_ON(sizeof(_format) >= PAGE_SIZE); \
209	return sprintf(page, _format "\n"); \	209	return sprintf(page, _format "\n"); \
210	} \	210	} \
211	static struct kobj_attribute format_attr_##_var = \	211	static struct device_attribute format_attr_##_var = \
212	__ATTR(_name, 0444, __uncore_##_var##_show, NULL)	212	__ATTR(_name, 0444, __uncore_##_var##_show, NULL)
213		213
214	static inline bool uncore_pmc_fixed(int idx)	214	static inline bool uncore_pmc_fixed(int idx)

arch/x86/events/rapl.c+1−13

  * any other bit is reserved
  */
 #define RAPL_EVENT_MASK	0xFFULL
-#define DEFINE_RAPL_FORMAT_ATTR(_var, _name, _format)		\
-static ssize_t __rapl_##_var##_show(struct kobject *kobj,	\
-				struct kobj_attribute *attr,	\
-				char *page)			\
-{								\
-	BUILD_BUG_ON(sizeof(_format) >= PAGE_SIZE);		\
-	return sprintf(page, _format "\n");			\
-}								\
-static struct kobj_attribute format_attr_##_var =		\
-	__ATTR(_name, 0444, __rapl_##_var##_show, NULL)
 #define RAPL_CNTR_WIDTH 32
 #define RAPL_EVENT_ATTR_STR(_name, v, str)					\
 	.attrs = attrs_empty,
 };
-DEFINE_RAPL_FORMAT_ATTR(event, event, "config:0-7");
+PMU_FORMAT_ATTR(event, "config:0-7");
 static struct attribute *rapl_formats_attr[] = {
 	&format_attr_event.attr,
 	NULL,

arch/x86/include/asm/kvm_host.h+1−0

@@ -1656,6 +1656,7 @@ int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); · 1655 unmodified lines
1656	int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);	1656	int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
1657	int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);	1657	int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
1658	int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);	1658	int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
		1659	int kvm_cpu_has_extint(struct kvm_vcpu *v);
1659	int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);	1660	int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
1660	int kvm_cpu_get_interrupt(struct kvm_vcpu *v);	1661	int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
1661	void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);	1662	void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);

arch/x86/include/asm/sparsemem.h+10−0

@@ -28,4 +28,14 @@ · 27 unmodified lines
28	#endif	28	#endif
29		29
30	#endif /* CONFIG_SPARSEMEM */	30	#endif /* CONFIG_SPARSEMEM */
		31
		32	#ifndef __ASSEMBLY__
		33	#ifdef CONFIG_NUMA_KEEP_MEMINFO
		34	extern int phys_to_target_node(phys_addr_t start);
		35	#define phys_to_target_node phys_to_target_node
		36	extern int memory_add_physaddr_to_nid(u64 start);
		37	#define memory_add_physaddr_to_nid memory_add_physaddr_to_nid
		38	#endif
		39	#endif /* __ASSEMBLY__ */
		40
31	#endif /* _ASM_X86_SPARSEMEM_H */	41	#endif /* _ASM_X86_SPARSEMEM_H */

arch/x86/kernel/cpu/microcode/intel.c+10−53

 	return find_matching_signature(mc, csig, cpf);
 }
-/*
- * Given CPU signature and a microcode patch, this function finds if the
- * microcode patch has matching family and model with the CPU.
- *
- * %true - if there's a match
- * %false - otherwise
- */
-static bool microcode_matches(struct microcode_header_intel *mc_header,
-			      unsigned long sig)
-{
-	unsigned long total_size = get_totalsize(mc_header);
-	unsigned long data_size = get_datasize(mc_header);
-	struct extended_sigtable *ext_header;
-	unsigned int fam_ucode, model_ucode;
-	struct extended_signature *ext_sig;
-	unsigned int fam, model;
-	int ext_sigcount, i;
-	fam   = x86_family(sig);
-	model = x86_model(sig);
-	fam_ucode   = x86_family(mc_header->sig);
-	model_ucode = x86_model(mc_header->sig);
-	if (fam == fam_ucode && model == model_ucode)
-		return true;
-	/* Look for ext. headers: */
-	if (total_size <= data_size + MC_HEADER_SIZE)
-		return false;
-	ext_header   = (void *) mc_header + data_size + MC_HEADER_SIZE;
-	ext_sig      = (void *)ext_header + EXT_HEADER_SIZE;
-	ext_sigcount = ext_header->count;
-	for (i = 0; i < ext_sigcount; i++) {
-		fam_ucode   = x86_family(ext_sig->sig);
-		model_ucode = x86_model(ext_sig->sig);
-		if (fam == fam_ucode && model == model_ucode)
-			return true;
-		ext_sig++;
-	}
-	return false;
-}
 static struct ucode_patch *memdup_patch(void *data, unsigned int size)
 {
 	struct ucode_patch *p;
 	return p;
 }
-static void save_microcode_patch(void *data, unsigned int size)
+static void save_microcode_patch(struct ucode_cpu_info *uci, void *data, unsigned int size)
 {
 	struct microcode_header_intel *mc_hdr, *mc_saved_hdr;
 	struct ucode_patch *iter, *tmp, *p = NULL;
 	if (!p)
 		return;
+	if (!find_matching_signature(p->data, uci->cpu_sig.sig, uci->cpu_sig.pf))
+		return;
 	/*
 	 * Save for early loading. On 32-bit, that needs to be a physical
 	 * address as the APs are running from physical addresses, before
 		size -= mc_size;
-		if (!microcode_matches(mc_header, uci->cpu_sig.sig)) {
+		if (!find_matching_signature(data, uci->cpu_sig.sig,
+					     uci->cpu_sig.pf)) {
 			data += mc_size;
 			continue;
 		}
 		if (save) {
-			save_microcode_patch(data, mc_size);
+			save_microcode_patch(uci, data, mc_size);
 			goto next;
 		}
  * Save this microcode patch. It will be loaded early when a CPU is
  * hot-added or resumes.
  */
-static void save_mc_for_early(u8 *mc, unsigned int size)
+static void save_mc_for_early(struct ucode_cpu_info *uci, u8 *mc, unsigned int size)
 {
 	/* Synchronization during CPU hotplug. */
 	static DEFINE_MUTEX(x86_cpu_microcode_mutex);
 	mutex_lock(&x86_cpu_microcode_mutex);
-	save_microcode_patch(mc, size);
+	save_microcode_patch(uci, mc, size);
 	show_saved_mc();
 	mutex_unlock(&x86_cpu_microcode_mutex);
 	 * permanent memory. So it will be loaded early when a CPU is hot added
 	 * or resumes.
 	 */
-	save_mc_for_early(new_mc, new_mc_size);
+	save_mc_for_early(uci, new_mc, new_mc_size);
 	pr_debug("CPU%d found a matching microcode update with version 0x%x (current=0x%x)\n",
 		 cpu, new_rev, uci->cpu_sig.rev);

arch/x86/kernel/dumpstack.c+19−4

 	if (!user_mode(regs))
 		return copy_from_kernel_nofault(buf, (u8 *)src, nbytes);
+	/* The user space code from other tasks cannot be accessed. */
+	if (regs != task_pt_regs(current))
+		return -EPERM;
 	/*
 	 * Make sure userspace isn't trying to trick us into dumping kernel
 	 * memory by pointing the userspace instruction pointer at it.
 	if (__chk_range_not_ok(src, nbytes, TASK_SIZE_MAX))
 		return -EINVAL;
+	/*
+	 * Even if named copy_from_user_nmi() this can be invoked from
+	 * other contexts and will not try to resolve a pagefault, which is
+	 * the correct thing to do here as this code can be called from any
+	 * context.
+	 */
 	return copy_from_user_nmi(buf, (void __user *)src, nbytes);
 }
 	u8 opcodes[OPCODE_BUFSIZE];
 	unsigned long prologue = regs->ip - PROLOGUE_SIZE;
-	if (copy_code(regs, opcodes, prologue, sizeof(opcodes))) {
+	switch (copy_code(regs, opcodes, prologue, sizeof(opcodes))) {
-		printk("%sCode: Unable to access opcode bytes at RIP 0x%lx.\n",
+	case 0:
-		       loglvl, prologue);
-	} else {
 		printk("%sCode: %" __stringify(PROLOGUE_SIZE) "ph <%02x> %"
 		       __stringify(EPILOGUE_SIZE) "ph\n", loglvl, opcodes,
 		       opcodes[PROLOGUE_SIZE], opcodes + PROLOGUE_SIZE + 1);
+		break;
+	case -EPERM:
+		/* No access to the user space stack of other tasks. Ignore. */
+		break;
+	default:
+		printk("%sCode: Unable to access opcode bytes at RIP 0x%lx.\n",
+		       loglvl, prologue);
+		break;
 	}
 }

arch/x86/kernel/tboot.c+1−7

 	if (!tboot_enabled())
 		return 0;
-	if (intel_iommu_tboot_noforce)
+	if (no_iommu || dmar_disabled)
-		return 1;
-	if (no_iommu || swiotlb || dmar_disabled)
 		pr_warn("Forcing Intel-IOMMU to enabled\n");
 	dmar_disabled = 0;
-#ifdef CONFIG_SWIOTLB
-	swiotlb = 0;
-#endif
 	no_iommu = 0;
 	return 1;

arch/x86/kvm/irq.c+34−51

  * check if there is pending interrupt from
  * non-APIC source without intack.
  */
-static int kvm_cpu_has_extint(struct kvm_vcpu *v)
+int kvm_cpu_has_extint(struct kvm_vcpu *v)
-{
-	u8 accept = kvm_apic_accept_pic_intr(v);
-	if (accept) {
-		if (irqchip_split(v->kvm))
-			return pending_userspace_extint(v);
-		else
-			return v->kvm->arch.vpic->output;
-	} else
-		return 0;
-}
-/*
- * check if there is injectable interrupt:
- * when virtual interrupt delivery enabled,
- * interrupt from apic will handled by hardware,
- * we don't need to check it here.
- */
-int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v)
 {
 	/*
-	 * FIXME: interrupt.injected represents an interrupt that it's
+	 * FIXME: interrupt.injected represents an interrupt whose
 	 * side-effects have already been applied (e.g. bit from IRR
 	 * already moved to ISR). Therefore, it is incorrect to rely
 	 * on interrupt.injected to know if there is a pending
 	if (!lapic_in_kernel(v))
 		return v->arch.interrupt.injected;
+	if (!kvm_apic_accept_pic_intr(v))
+		return 0;
+	if (irqchip_split(v->kvm))
+		return pending_userspace_extint(v);
+	else
+		return v->kvm->arch.vpic->output;
+}
+/*
+ * check if there is injectable interrupt:
+ * when virtual interrupt delivery enabled,
+ * interrupt from apic will handled by hardware,
+ * we don't need to check it here.
+ */
+int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v)
+{
 	if (kvm_cpu_has_extint(v))
 		return 1;
  */
 int kvm_cpu_has_interrupt(struct kvm_vcpu *v)
 {
-	/*
-	 * FIXME: interrupt.injected represents an interrupt that it's
-	 * side-effects have already been applied (e.g. bit from IRR
-	 * already moved to ISR). Therefore, it is incorrect to rely
-	 * on interrupt.injected to know if there is a pending
-	 * interrupt in the user-mode LAPIC.
-	 * This leads to nVMX/nSVM not be able to distinguish
-	 * if it should exit from L2 to L1 on EXTERNAL_INTERRUPT on
-	 * pending interrupt or should re-inject an injected
-	 * interrupt.
-	 */
-	if (!lapic_in_kernel(v))
-		return v->arch.interrupt.injected;
 	if (kvm_cpu_has_extint(v))
 		return 1;
  */
 static int kvm_cpu_get_extint(struct kvm_vcpu *v)
 {
-	if (kvm_cpu_has_extint(v)) {
+	if (!kvm_cpu_has_extint(v)) {
-		if (irqchip_split(v->kvm)) {
+		WARN_ON(!lapic_in_kernel(v));
-			int vector = v->arch.pending_external_vector;
-			v->arch.pending_external_vector = -1;
-			return vector;
-		} else
-			return kvm_pic_read_irq(v->kvm); /* PIC */
-	} else
 		return -1;
+	}
+	if (!lapic_in_kernel(v))
+		return v->arch.interrupt.nr;
+	if (irqchip_split(v->kvm)) {
+		int vector = v->arch.pending_external_vector;
+		v->arch.pending_external_vector = -1;
+		return vector;
+	} else
+		return kvm_pic_read_irq(v->kvm); /* PIC */
 }
 /*
  */
 int kvm_cpu_get_interrupt(struct kvm_vcpu *v)
 {
-	int vector;
+	int vector = kvm_cpu_get_extint(v);
-	if (!lapic_in_kernel(v))
-		return v->arch.interrupt.nr;
-	vector = kvm_cpu_get_extint(v);
 	if (vector != -1)
 		return vector;			/* PIC */

arch/x86/kvm/lapic.c+1−1

@@ -2465,7 +2465,7 @@ int kvm_apic_has_interrupt(struct kvm_vcpu *vcpu) · 2464 unmodified lines
2465	struct kvm_lapic *apic = vcpu->arch.apic;	2465	struct kvm_lapic *apic = vcpu->arch.apic;
2466	u32 ppr;	2466	u32 ppr;
2467		2467
2468	if (!kvm_apic_hw_enabled(apic))	2468	if (!kvm_apic_present(vcpu))
2469	return -1;	2469	return -1;
2470		2470
2471	__apic_update_ppr(apic, &ppr);	2471	__apic_update_ppr(apic, &ppr);

arch/x86/kvm/mmu/mmu.c+1−1

@@ -3517,7 +3517,7 @@ static bool get_mmio_spte(struct kvm_vcpu vcpu, u64 addr, u64 sptep) · 3516 unmodified lines
3517	{	3517	{
3518	u64 sptes[PT64_ROOT_MAX_LEVEL];	3518	u64 sptes[PT64_ROOT_MAX_LEVEL];
3519	struct rsvd_bits_validate *rsvd_check;	3519	struct rsvd_bits_validate *rsvd_check;
3520	int root = vcpu->arch.mmu->root_level;	3520	int root = vcpu->arch.mmu->shadow_root_level;
3521	int leaf;	3521	int leaf;
3522	int level;	3522	int level;
3523	bool reserved = false;	3523	bool reserved = false;

arch/x86/kvm/svm/sev.c+1−1

 	 * Its safe to read more than we are asked, caller should ensure that
 	 * destination has enough space.
 	 */
-	src_paddr = round_down(src_paddr, 16);
 	offset = src_paddr & 15;
+	src_paddr = round_down(src_paddr, 16);
 	sz = round_up(sz + offset, 16);
 	return __sev_issue_dbg_cmd(kvm, src_paddr, dst_paddr, sz, err, false);

arch/x86/kvm/svm/svm.c+3−1

@@ -1309,8 +1309,10 @@ static int svm_create_vcpu(struct kvm_vcpu *vcpu) · 1308 unmodified lines
1309	svm->avic_is_running = true;	1309	svm->avic_is_running = true;
1310		1310
1311	svm->msrpm = svm_vcpu_alloc_msrpm();	1311	svm->msrpm = svm_vcpu_alloc_msrpm();
1312	if (!svm->msrpm)	1312	if (!svm->msrpm) {
		1313	err = -ENOMEM;
1313	goto error_free_vmcb_page;	1314	goto error_free_vmcb_page;
		1315	}
1314		1316
1315	svm_vcpu_init_msrpm(vcpu, svm->msrpm);	1317	svm_vcpu_init_msrpm(vcpu, svm->msrpm);
1316		1318

arch/x86/kvm/x86.c+10−8

 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
 {
+	/*
+	 * We can accept userspace's request for interrupt injection
+	 * as long as we have a place to store the interrupt number.
+	 * The actual injection will happen when the CPU is able to
+	 * deliver the interrupt.
+	 */
+	if (kvm_cpu_has_extint(vcpu))
+		return false;
+	/* Acknowledging ExtINT does not happen if LINT0 is masked.  */
 	return (!lapic_in_kernel(vcpu) ||
 		kvm_apic_accept_pic_intr(vcpu));
 }
-/*
- * if userspace requested an interrupt window, check that the
- * interrupt window is open.
- *
- * No need to exit to userspace if we already have an interrupt queued.
- */
 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
 {
 	return kvm_arch_interrupt_allowed(vcpu) &&
-		!kvm_cpu_has_interrupt(vcpu) &&
-		!kvm_event_needs_reinjection(vcpu) &&
 		kvm_cpu_accept_dm_intr(vcpu);
 }

arch/x86/mm/numa.c+2−0

 	return meminfo_to_nid(&numa_reserved_meminfo, start);
 }
+EXPORT_SYMBOL_GPL(phys_to_target_node);
 int memory_add_physaddr_to_nid(u64 start)
 {
 		nid = numa_meminfo.blk[0].nid;
 	return nid;
 }
+EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid);
 #endif

arch/x86/platform/efi/efi_64.c+13−11

 	gfp_mask = GFP_KERNEL | __GFP_ZERO;
 	efi_pgd = (pgd_t *)__get_free_pages(gfp_mask, PGD_ALLOCATION_ORDER);
 	if (!efi_pgd)
-		return -ENOMEM;
+		goto fail;
 	pgd = efi_pgd + pgd_index(EFI_VA_END);
 	p4d = p4d_alloc(&init_mm, pgd, EFI_VA_END);
-	if (!p4d) {
+	if (!p4d)
-		free_page((unsigned long)efi_pgd);
+		goto free_pgd;
-		return -ENOMEM;
-	}
 	pud = pud_alloc(&init_mm, p4d, EFI_VA_END);
-	if (!pud) {
+	if (!pud)
-		if (pgtable_l5_enabled())
+		goto free_p4d;
-			free_page((unsigned long) pgd_page_vaddr(*pgd));
-		free_pages((unsigned long)efi_pgd, PGD_ALLOCATION_ORDER);
-		return -ENOMEM;
-	}
 	efi_mm.pgd = efi_pgd;
 	mm_init_cpumask(&efi_mm);
 	init_new_context(NULL, &efi_mm);
 	return 0;
+free_p4d:
+	if (pgtable_l5_enabled())
+		free_page((unsigned long)pgd_page_vaddr(*pgd));
+free_pgd:
+	free_pages((unsigned long)efi_pgd, PGD_ALLOCATION_ORDER);
+fail:
+	return -ENOMEM;
 }
 /*

arch/x86/xen/spinlock.c+11−1

 void xen_uninit_lock_cpu(int cpu)
 {
+	int irq;
 	if (!xen_pvspin)
 		return;
-	unbind_from_irqhandler(per_cpu(lock_kicker_irq, cpu), NULL);
+	/*
+	 * When booting the kernel with 'mitigations=auto,nosmt', the secondary
+	 * CPUs are not activated, and lock_kicker_irq is not initialized.
+	 */
+	irq = per_cpu(lock_kicker_irq, cpu);
+	if (irq == -1)
+		return;
+	unbind_from_irqhandler(irq, NULL);
 	per_cpu(lock_kicker_irq, cpu) = -1;
 	kfree(per_cpu(irq_name, cpu));
 	per_cpu(irq_name, cpu) = NULL;

block/blk-cgroup.c+1−0

@@ -849,6 +849,7 @@ static void blkcg_fill_root_iostats(void) · 848 unmodified lines
849	blkg_iostat_set(&blkg->iostat.cur, &tmp);	849	blkg_iostat_set(&blkg->iostat.cur, &tmp);
850	u64_stats_update_end(&blkg->iostat.sync);	850	u64_stats_update_end(&blkg->iostat.sync);
851	}	851	}
		852	disk_put_part(part);
852	}	853	}
853	}	854	}
854		855

block/blk-flush.c+6−1

 	/* release the tag's ownership to the req cloned from */
 	spin_lock_irqsave(&fq->mq_flush_lock, flags);
-	WRITE_ONCE(flush_rq->state, MQ_RQ_IDLE);
 	if (!refcount_dec_and_test(&flush_rq->ref)) {
 		fq->rq_status = error;
 		spin_unlock_irqrestore(&fq->mq_flush_lock, flags);
 		return;
 	}
+	/*
+	 * Flush request has to be marked as IDLE when it is really ended
+	 * because its .end_io() is called from timeout code path too for
+	 * avoiding use-after-free.
+	 */
+	WRITE_ONCE(flush_rq->state, MQ_RQ_IDLE);
 	if (fq->rq_status != BLK_STS_OK)
 		error = fq->rq_status;

block/keyslot-manager.c+7−0

@@ -103,6 +103,13 @@ int blk_ksm_init(struct blk_keyslot_manager *ksm, unsigned int num_slots) · 102 unmodified lines
103	spin_lock_init(&ksm->idle_slots_lock);	103	spin_lock_init(&ksm->idle_slots_lock);
104		104
105	slot_hashtable_size = roundup_pow_of_two(num_slots);	105	slot_hashtable_size = roundup_pow_of_two(num_slots);
		106	/*
		107	* hash_ptr() assumes bits != 0, so ensure the hash table has at least 2
		108	* buckets. This only makes a difference when there is only 1 keyslot.
		109	*/
		110	if (slot_hashtable_size < 2)
		111	slot_hashtable_size = 2;
		112
106	ksm->log_slot_ht_size = ilog2(slot_hashtable_size);	113	ksm->log_slot_ht_size = ilog2(slot_hashtable_size);
107	ksm->slot_hashtable = kvmalloc_array(slot_hashtable_size,	114	ksm->slot_hashtable = kvmalloc_array(slot_hashtable_size,
108	sizeof(ksm->slot_hashtable[0]),	115	sizeof(ksm->slot_hashtable[0]),

drivers/accessibility/speakup/spk_ttyio.c+11−1

 	if (!tty->ops->write)
 		return -EOPNOTSUPP;
+	mutex_lock(&speakup_tty_mutex);
+	if (speakup_tty) {
+		mutex_unlock(&speakup_tty_mutex);
+		return -EBUSY;
+	}
 	speakup_tty = tty;
 	ldisc_data = kmalloc(sizeof(*ldisc_data), GFP_KERNEL);
-	if (!ldisc_data)
+	if (!ldisc_data) {
+		speakup_tty = NULL;
+		mutex_unlock(&speakup_tty_mutex);
 		return -ENOMEM;
+	}
 	init_completion(&ldisc_data->completion);
 	ldisc_data->buf_free = true;
 	speakup_tty->disc_data = ldisc_data;
+	mutex_unlock(&speakup_tty_mutex);
 	return 0;
 }

drivers/acpi/arm64/iort.c+5−3

  * iort_set_fwnode() - Create iort_fwnode and use it to register
  *		       iommu data in the iort_fwnode_list
  *
- * @node: IORT table node associated with the IOMMU
+ * @iort_node: IORT table node associated with the IOMMU
  * @fwnode: fwnode associated with the IORT node
  *
  * Returns: 0 on success
 /**
  * iort_get_device_domain() - Find MSI domain related to a device
  * @dev: The device.
- * @req_id: Requester ID for the device.
+ * @id: Requester ID for the device.
+ * @bus_token: irq domain bus token.
  *
  * Returns: the MSI domain for this device, NULL otherwise
  */
  *
  * @dev: device to configure
  * @dma_addr: device DMA address result pointer
- * @size: DMA range size result pointer
+ * @dma_size: DMA range size result pointer
  */
 void iort_dma_setup(struct device *dev, u64 *dma_addr, u64 *dma_size)
 {
 /**
  * iort_add_platform_device() - Allocate a platform device for IORT node
  * @node: Pointer to device ACPI IORT node
+ * @ops: Pointer to IORT device config struct
  *
  * Returns: 0 on success, <0 failure
  */

drivers/bus/ti-sysc.c+19−10

 	u32 sysc_mask, syss_done, rstval;
 	int syss_offset, error = 0;
+	if (ddata->cap->regbits->srst_shift < 0)
+		return 0;
 	syss_offset = ddata->offsets[SYSC_SYSSTATUS];
 	sysc_mask = BIT(ddata->cap->regbits->srst_shift);
 			return error;
 		}
 	}
-	error = sysc_wait_softreset(ddata);
+	/*
-	if (error)
+	 * Some modules like i2c and hdq1w have unusable reset status unless
-		dev_warn(ddata->dev, "OCP softreset timed out\n");
+	 * the module reset quirk is enabled. Skip status check on enable.
+	 */
+	if (!(ddata->cfg.quirks & SYSC_MODULE_QUIRK_ENA_RESETDONE)) {
+		error = sysc_wait_softreset(ddata);
+		if (error)
+			dev_warn(ddata->dev, "OCP softreset timed out\n");
+	}
 	if (ddata->cfg.quirks & SYSC_QUIRK_OPT_CLKS_IN_RESET)
 		sysc_disable_opt_clocks(ddata);
 	SYSC_QUIRK("hdmi", 0, 0, 0x10, -ENODEV, 0x50030200, 0xffffffff,
 		   SYSC_QUIRK_OPT_CLKS_NEEDED),
 	SYSC_QUIRK("hdq1w", 0, 0, 0x14, 0x18, 0x00000006, 0xffffffff,
-		   SYSC_MODULE_QUIRK_HDQ1W),
+		   SYSC_MODULE_QUIRK_HDQ1W | SYSC_MODULE_QUIRK_ENA_RESETDONE),
 	SYSC_QUIRK("hdq1w", 0, 0, 0x14, 0x18, 0x0000000a, 0xffffffff,
-		   SYSC_MODULE_QUIRK_HDQ1W),
+		   SYSC_MODULE_QUIRK_HDQ1W | SYSC_MODULE_QUIRK_ENA_RESETDONE),
 	SYSC_QUIRK("i2c", 0, 0, 0x20, 0x10, 0x00000036, 0x000000ff,
-		   SYSC_MODULE_QUIRK_I2C),
+		   SYSC_MODULE_QUIRK_I2C | SYSC_MODULE_QUIRK_ENA_RESETDONE),
 	SYSC_QUIRK("i2c", 0, 0, 0x20, 0x10, 0x0000003c, 0x000000ff,
-		   SYSC_MODULE_QUIRK_I2C),
+		   SYSC_MODULE_QUIRK_I2C | SYSC_MODULE_QUIRK_ENA_RESETDONE),
 	SYSC_QUIRK("i2c", 0, 0, 0x20, 0x10, 0x00000040, 0x000000ff,
-		   SYSC_MODULE_QUIRK_I2C),
+		   SYSC_MODULE_QUIRK_I2C | SYSC_MODULE_QUIRK_ENA_RESETDONE),
 	SYSC_QUIRK("i2c", 0, 0, 0x10, 0x90, 0x5040000a, 0xfffff0f0,
-		   SYSC_MODULE_QUIRK_I2C),
+		   SYSC_MODULE_QUIRK_I2C | SYSC_MODULE_QUIRK_ENA_RESETDONE),
 	SYSC_QUIRK("gpu", 0x50000000, 0x14, -ENODEV, -ENODEV, 0x00010201, 0xffffffff, 0),
 	SYSC_QUIRK("gpu", 0x50000000, 0xfe00, 0xfe10, -ENODEV, 0x40000000 , 0xffffffff,
 		   SYSC_MODULE_QUIRK_SGX),
 	if ((ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT) &&
 	    (ddata->cfg.quirks & SYSC_QUIRK_NO_IDLE))
-		return -EBUSY;
+		return -ENXIO;
 	return 0;
 }

drivers/counter/ti-eqep.c+2−2

@@ -368,7 +368,7 @@ static const struct regmap_config ti_eqep_regmap32_config = { · 367 unmodified lines
368	.reg_bits = 32,	368	.reg_bits = 32,
369	.val_bits = 32,	369	.val_bits = 32,
370	.reg_stride = 4,	370	.reg_stride = 4,
371	.max_register = 0x24,	371	.max_register = QUPRD,
372	};	372	};
373		373
374	static const struct regmap_config ti_eqep_regmap16_config = {	374	static const struct regmap_config ti_eqep_regmap16_config = {
@@ -376,7 +376,7 @@ static const struct regmap_config ti_eqep_regmap16_config = { · 1 unmodified line
376	.reg_bits = 16,	376	.reg_bits = 16,
377	.val_bits = 16,	377	.val_bits = 16,
378	.reg_stride = 2,	378	.reg_stride = 2,
379	.max_register = 0x1e,	379	.max_register = QCPRDLAT,
380	};	380	};
381		381
382	static int ti_eqep_probe(struct platform_device *pdev)	382	static int ti_eqep_probe(struct platform_device *pdev)

drivers/cpufreq/scmi-cpufreq.c+3−1

 	if (!handle || !handle->perf_ops)
 		return -ENODEV;
+#ifdef CONFIG_COMMON_CLK
 	/* dummy clock provider as needed by OPP if clocks property is used */
 	if (of_find_property(dev->of_node, "#clock-cells", NULL))
 		devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, NULL);
+#endif
 	ret = cpufreq_register_driver(&scmi_cpufreq_driver);
 	if (ret) {
-		dev_err(&sdev->dev, "%s: registering cpufreq failed, err: %d\n",
+		dev_err(dev, "%s: registering cpufreq failed, err: %d\n",
 			__func__, ret);
 	}

drivers/dax/Kconfig+0−1

@@ -50,7 +50,6 @@ config DEV_DAX_HMEM · 49 unmodified lines
50	Say M if unsure.	50	Say M if unsure.
51		51
52	config DEV_DAX_HMEM_DEVICES	52	config DEV_DAX_HMEM_DEVICES
53	depends on NUMA_KEEP_MEMINFO # for phys_to_target_node()
54	depends on DEV_DAX_HMEM && DAX=y	53	depends on DEV_DAX_HMEM && DAX=y
55	def_bool y	54	def_bool y
56		55

drivers/dma/dmaengine.c+9−8

 static int __dma_async_device_channel_register(struct dma_device *device,
 					       struct dma_chan *chan)
 {
-	int rc = 0;
+	int rc;
 	chan->local = alloc_percpu(typeof(*chan->local));
 	if (!chan->local)
-		goto err_out;
+		return -ENOMEM;
 	chan->dev = kzalloc(sizeof(*chan->dev), GFP_KERNEL);
 	if (!chan->dev) {
-		free_percpu(chan->local);
+		rc = -ENOMEM;
-		chan->local = NULL;
+		goto err_free_local;
-		goto err_out;
 	}
 	/*
 	if (chan->chan_id < 0) {
 		pr_err("%s: unable to alloc ida for chan: %d\n",
 		       __func__, chan->chan_id);
-		goto err_out;
+		rc = chan->chan_id;
+		goto err_free_dev;
 	}
 	chan->dev->device.class = &dma_devclass;
 	mutex_lock(&device->chan_mutex);
 	ida_free(&device->chan_ida, chan->chan_id);
 	mutex_unlock(&device->chan_mutex);
- err_out:
+ err_free_dev:
-	free_percpu(chan->local);
 	kfree(chan->dev);
+ err_free_local:
+	free_percpu(chan->local);
 	return rc;
 }

drivers/dma/idxd/device.c+15−16

@@ -271,7 +271,7 @@ int idxd_wq_map_portal(struct idxd_wq *wq) · 270 unmodified lines
271	resource_size_t start;	271	resource_size_t start;
272		272
273	start = pci_resource_start(pdev, IDXD_WQ_BAR);	273	start = pci_resource_start(pdev, IDXD_WQ_BAR);
274	start = start + wq->id * IDXD_PORTAL_SIZE;	274	start += idxd_get_wq_portal_full_offset(wq->id, IDXD_PORTAL_LIMITED);
275		275
276	wq->dportal = devm_ioremap(dev, start, IDXD_PORTAL_SIZE);	276	wq->dportal = devm_ioremap(dev, start, IDXD_PORTAL_SIZE);
277	if (!wq->dportal)	277	if (!wq->dportal)
@@ -295,7 +295,7 @@ void idxd_wq_disable_cleanup(struct idxd_wq *wq) · 17 unmodified lines
295	int i, wq_offset;	295	int i, wq_offset;
296		296
297	lockdep_assert_held(&idxd->dev_lock);	297	lockdep_assert_held(&idxd->dev_lock);
298	memset(&wq->wqcfg, 0, sizeof(wq->wqcfg));	298	memset(wq->wqcfg, 0, idxd->wqcfg_size);
299	wq->type = IDXD_WQT_NONE;	299	wq->type = IDXD_WQT_NONE;
300	wq->size = 0;	300	wq->size = 0;
301	wq->group = NULL;	301	wq->group = NULL;
@@ -304,8 +304,8 @@ void idxd_wq_disable_cleanup(struct idxd_wq *wq) · 2 unmodified lines
304	clear_bit(WQ_FLAG_DEDICATED, &wq->flags);	304	clear_bit(WQ_FLAG_DEDICATED, &wq->flags);
305	memset(wq->name, 0, WQ_NAME_SIZE);	305	memset(wq->name, 0, WQ_NAME_SIZE);
306		306
307	for (i = 0; i < 8; i++) {	307	for (i = 0; i < WQCFG_STRIDES(idxd); i++) {
308	wq_offset = idxd->wqcfg_offset + wq->id * 32 + i * sizeof(u32);	308	wq_offset = WQCFG_OFFSET(idxd, wq->id, i);
309	iowrite32(0, idxd->reg_base + wq_offset);	309	iowrite32(0, idxd->reg_base + wq_offset);
310	dev_dbg(dev, "WQ[%d][%d][%#x]: %#x\n",	310	dev_dbg(dev, "WQ[%d][%d][%#x]: %#x\n",
311	wq->id, i, wq_offset,	311	wq->id, i, wq_offset,
@@ -539,10 +539,10 @@ static int idxd_wq_config_write(struct idxd_wq *wq) · 227 unmodified lines
539	if (!wq->group)	539	if (!wq->group)
540	return 0;	540	return 0;
541		541
542	memset(&wq->wqcfg, 0, sizeof(union wqcfg));	542	memset(wq->wqcfg, 0, idxd->wqcfg_size);
543		543
544	/* byte 0-3 */	544	/* byte 0-3 */
545	wq->wqcfg.wq_size = wq->size;	545	wq->wqcfg->wq_size = wq->size;
546		546
547	if (wq->size == 0) {	547	if (wq->size == 0) {
548	dev_warn(dev, "Incorrect work queue size: 0\n");	548	dev_warn(dev, "Incorrect work queue size: 0\n");
@@ -550,22 +550,21 @@ static int idxd_wq_config_write(struct idxd_wq *wq) · 1 unmodified line
550	}	550	}
551		551
552	/* bytes 4-7 */	552	/* bytes 4-7 */
553	wq->wqcfg.wq_thresh = wq->threshold;	553	wq->wqcfg->wq_thresh = wq->threshold;
554		554
555	/* byte 8-11 */	555	/* byte 8-11 */
556	wq->wqcfg.priv = !!(wq->type == IDXD_WQT_KERNEL);	556	wq->wqcfg->priv = !!(wq->type == IDXD_WQT_KERNEL);
557	wq->wqcfg.mode = 1;	557	wq->wqcfg->mode = 1;
558		558	wq->wqcfg->priority = wq->priority;
559	wq->wqcfg.priority = wq->priority;
560		559
561	/* bytes 12-15 */	560	/* bytes 12-15 */
562	wq->wqcfg.max_xfer_shift = ilog2(wq->max_xfer_bytes);	561	wq->wqcfg->max_xfer_shift = ilog2(wq->max_xfer_bytes);
563	wq->wqcfg.max_batch_shift = ilog2(wq->max_batch_size);	562	wq->wqcfg->max_batch_shift = ilog2(wq->max_batch_size);
564		563
565	dev_dbg(dev, "WQ %d CFGs\n", wq->id);	564	dev_dbg(dev, "WQ %d CFGs\n", wq->id);
566	for (i = 0; i < 8; i++) {	565	for (i = 0; i < WQCFG_STRIDES(idxd); i++) {
567	wq_offset = idxd->wqcfg_offset + wq->id * 32 + i * sizeof(u32);	566	wq_offset = WQCFG_OFFSET(idxd, wq->id, i);
568	iowrite32(wq->wqcfg.bits[i], idxd->reg_base + wq_offset);	567	iowrite32(wq->wqcfg->bits[i], idxd->reg_base + wq_offset);
569	dev_dbg(dev, "WQ[%d][%d][%#x]: %#x\n",	568	dev_dbg(dev, "WQ[%d][%d][%#x]: %#x\n",
570	wq->id, i, wq_offset,	569	wq->id, i, wq_offset,
571	ioread32(idxd->reg_base + wq_offset));	570	ioread32(idxd->reg_base + wq_offset));

drivers/dma/idxd/idxd.h+2−1

 	u32 priority;
 	enum idxd_wq_state state;
 	unsigned long flags;
-	union wqcfg wqcfg;
+	union wqcfg *wqcfg;
 	u32 vec_ptr;		/* interrupt steering */
 	struct dsa_hw_desc **hw_descs;
 	int num_descs;
 	int max_wq_size;
 	int token_limit;
 	int nr_tokens;		/* non-reserved tokens */
+	unsigned int wqcfg_size;
 	union sw_err_reg sw_err;
 	wait_queue_head_t cmd_waitq;

drivers/dma/idxd/init.c+5−0

 		wq->idxd_cdev.minor = -1;
 		wq->max_xfer_bytes = idxd->max_xfer_bytes;
 		wq->max_batch_size = idxd->max_batch_size;
+		wq->wqcfg = devm_kzalloc(dev, idxd->wqcfg_size, GFP_KERNEL);
+		if (!wq->wqcfg)
+			return -ENOMEM;
 	}
 	for (i = 0; i < idxd->max_engines; i++) {
 	dev_dbg(dev, "total workqueue size: %u\n", idxd->max_wq_size);
 	idxd->max_wqs = idxd->hw.wq_cap.num_wqs;
 	dev_dbg(dev, "max workqueues: %u\n", idxd->max_wqs);
+	idxd->wqcfg_size = 1 << (idxd->hw.wq_cap.wqcfg_size + IDXD_WQCFG_MIN);
+	dev_dbg(dev, "wqcfg size: %u\n", idxd->wqcfg_size);
 	/* reading operation capabilities */
 	for (i = 0; i < 4; i++) {

drivers/dma/idxd/registers.h+23−2

 #define IDXD_MMIO_BAR		0
 #define IDXD_WQ_BAR		2
-#define IDXD_PORTAL_SIZE	0x4000
+#define IDXD_PORTAL_SIZE	PAGE_SIZE
 /* MMIO Device BAR0 Registers */
 #define IDXD_VER_OFFSET			0x00
 	struct {
 		u64 total_wq_size:16;
 		u64 num_wqs:8;
-		u64 rsvd:24;
+		u64 wqcfg_size:4;
+		u64 rsvd:20;
 		u64 shared_mode:1;
 		u64 dedicated_mode:1;
 		u64 rsvd2:1;
 	u64 bits;
 } __packed;
 #define IDXD_WQCAP_OFFSET		0x20
+#define IDXD_WQCFG_MIN			5
 union group_cap_reg {
 	struct {
 	};
 	u32 bits[8];
 } __packed;
+/*
+ * This macro calculates the offset into the WQCFG register
+ * idxd - struct idxd *
+ * n - wq id
+ * ofs - the index of the 32b dword for the config register
+ *
+ * The WQCFG register block is divided into groups per each wq. The n index
+ * allows us to move to the register group that's for that particular wq.
+ * Each register is 32bits. The ofs gives us the number of register to access.
+ */
+#define WQCFG_OFFSET(_idxd_dev, n, ofs) \
+({\
+	typeof(_idxd_dev) __idxd_dev = (_idxd_dev);	\
+	(__idxd_dev)->wqcfg_offset + (n) * (__idxd_dev)->wqcfg_size + sizeof(u32) * (ofs);	\
+})
+#define WQCFG_STRIDES(_idxd_dev) ((_idxd_dev)->wqcfg_size / sizeof(u32))
 #endif

drivers/dma/idxd/submit.c+1−1

@@ -74,7 +74,7 @@ int idxd_submit_desc(struct idxd_wq wq, struct idxd_desc desc) · 73 unmodified lines
74	if (idxd->state != IDXD_DEV_ENABLED)	74	if (idxd->state != IDXD_DEV_ENABLED)
75	return -EIO;	75	return -EIO;
76		76
77	portal = wq->dportal + idxd_get_wq_portal_offset(IDXD_PORTAL_UNLIMITED);	77	portal = wq->dportal;
78	/*	78	/*
79	* The wmb() flushes writes to coherent DMA data before possibly	79	* The wmb() flushes writes to coherent DMA data before possibly
80	* triggering a DMA read. The wmb() is necessary even on UP because	80	* triggering a DMA read. The wmb() is necessary even on UP because

drivers/dma/ioat/dca.c+0−10

@@ -40,16 +40,6 @@ · 39 unmodified lines
40	#define DCA2_TAG_MAP_BYTE3 0x82	40	#define DCA2_TAG_MAP_BYTE3 0x82
41	#define DCA2_TAG_MAP_BYTE4 0x82	41	#define DCA2_TAG_MAP_BYTE4 0x82
42		42
43	/* verify if tag map matches expected values */
44	static inline int dca2_tag_map_valid(u8 *tag_map)
45	{
46	return ((tag_map[0] == DCA2_TAG_MAP_BYTE0) &&
47	(tag_map[1] == DCA2_TAG_MAP_BYTE1) &&
48	(tag_map[2] == DCA2_TAG_MAP_BYTE2) &&
49	(tag_map[3] == DCA2_TAG_MAP_BYTE3) &&
50	(tag_map[4] == DCA2_TAG_MAP_BYTE4));
51	}
52
53	/*	43	/*
54	* "Legacy" DCA systems do not implement the DCA register set in the	44	* "Legacy" DCA systems do not implement the DCA register set in the
55	* I/OAT device. Software needs direct support for their tag mappings.	45	* I/OAT device. Software needs direct support for their tag mappings.

drivers/dma/pl330.c+1−1

@@ -2799,7 +2799,7 @@ pl330_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dst, · 2798 unmodified lines
2799	* If burst size is smaller than bus width then make sure we only	2799	* If burst size is smaller than bus width then make sure we only
2800	* transfer one at a time to avoid a burst stradling an MFIFO entry.	2800	* transfer one at a time to avoid a burst stradling an MFIFO entry.
2801	*/	2801	*/
2802	if (desc->rqcfg.brst_size * 8 < pl330->pcfg.data_bus_width)	2802	if (burst * 8 < pl330->pcfg.data_bus_width)
2803	desc->rqcfg.brst_len = 1;	2803	desc->rqcfg.brst_len = 1;
2804		2804
2805	desc->bytes_requested = len;	2805	desc->bytes_requested = len;

drivers/dma/ti/k3-udma-private.c+1−1

@@ -83,7 +83,7 @@ EXPORT_SYMBOL(xudma_rflow_is_gp); · 82 unmodified lines
83	#define XUDMA_GET_PUT_RESOURCE(res) \	83	#define XUDMA_GET_PUT_RESOURCE(res) \
84	struct udma_##res xudma_##res##_get(struct udma_dev ud, int id) \	84	struct udma_##res xudma_##res##_get(struct udma_dev ud, int id) \
85	{ \	85	{ \
86	return __udma_reserve_##res(ud, false, id); \	86	return __udma_reserve_##res(ud, UDMA_TP_NORMAL, id); \
87	} \	87	} \
88	EXPORT_SYMBOL(xudma_##res##_get); \	88	EXPORT_SYMBOL(xudma_##res##_get); \
89	\	89	\

drivers/dma/ti/omap-dma.c+24−13

 	}
 }
+/* Currently used by omap2 & 3 to block deeper SoC idle states */
+static bool omap_dma_busy(struct omap_dmadev *od)
+{
+	struct omap_chan *c;
+	int lch = -1;
+	while (1) {
+		lch = find_next_bit(od->lch_bitmap, od->lch_count, lch + 1);
+		if (lch >= od->lch_count)
+			break;
+		c = od->lch_map[lch];
+		if (!c)
+			continue;
+		if (omap_dma_chan_read(c, CCR) & CCR_ENABLE)
+			return true;
+	}
+	return false;
+}
 /* Currently only used for omap2. For omap1, also a check for lcd_dma is needed */
 static int omap_dma_busy_notifier(struct notifier_block *nb,
 				  unsigned long cmd, void *v)
 {
 	struct omap_dmadev *od;
-	struct omap_chan *c;
-	int lch = -1;
 	od = container_of(nb, struct omap_dmadev, nb);
 	switch (cmd) {
 	case CPU_CLUSTER_PM_ENTER:
-		while (1) {
+		if (omap_dma_busy(od))
-			lch = find_next_bit(od->lch_bitmap, od->lch_count,
+			return NOTIFY_BAD;
-					    lch + 1);
-			if (lch >= od->lch_count)
-				break;
-			c = od->lch_map[lch];
-			if (!c)
-				continue;
-			if (omap_dma_chan_read(c, CCR) & CCR_ENABLE)
-				return NOTIFY_BAD;
-		}
 		break;
 	case CPU_CLUSTER_PM_ENTER_FAILED:
 	case CPU_CLUSTER_PM_EXIT:
 	switch (cmd) {
 	case CPU_CLUSTER_PM_ENTER:
+		if (omap_dma_busy(od))
+			return NOTIFY_BAD;
 		omap_dma_context_save(od);
 		break;
 	case CPU_CLUSTER_PM_ENTER_FAILED:

drivers/dma/xilinx/xilinx_dma.c+30−10

 #define to_dma_tx_descriptor(tx) \
 	container_of(tx, struct xilinx_dma_tx_descriptor, async_tx)
 #define xilinx_dma_poll_timeout(chan, reg, val, cond, delay_us, timeout_us) \
-	readl_poll_timeout(chan->xdev->regs + chan->ctrl_offset + reg, val, \
+	readl_poll_timeout_atomic(chan->xdev->regs + chan->ctrl_offset + reg, \
-			   cond, delay_us, timeout_us)
+				  val, cond, delay_us, timeout_us)
 /* IO accessors */
 static inline u32 dma_read(struct xilinx_dma_chan *chan, u32 reg)
 {
 	struct xilinx_cdma_tx_segment *cdma_seg;
 	struct xilinx_axidma_tx_segment *axidma_seg;
+	struct xilinx_aximcdma_tx_segment *aximcdma_seg;
 	struct xilinx_cdma_desc_hw *cdma_hw;
 	struct xilinx_axidma_desc_hw *axidma_hw;
+	struct xilinx_aximcdma_desc_hw *aximcdma_hw;
 	struct list_head *entry;
 	u32 residue = 0;
 			cdma_hw = &cdma_seg->hw;
 			residue += (cdma_hw->control - cdma_hw->status) &
 				   chan->xdev->max_buffer_len;
-		} else {
+		} else if (chan->xdev->dma_config->dmatype ==
+			   XDMA_TYPE_AXIDMA) {
 			axidma_seg = list_entry(entry,
 						struct xilinx_axidma_tx_segment,
 						node);
 			axidma_hw = &axidma_seg->hw;
 			residue += (axidma_hw->control - axidma_hw->status) &
 				   chan->xdev->max_buffer_len;
+		} else {
+			aximcdma_seg =
+				list_entry(entry,
+					   struct xilinx_aximcdma_tx_segment,
+					   node);
+			aximcdma_hw = &aximcdma_seg->hw;
+			residue +=
+				(aximcdma_hw->control - aximcdma_hw->status) &
+				chan->xdev->max_buffer_len;
 		}
 	}
 			upper_32_bits(chan->seg_p + sizeof(*chan->seg_mv) *
 				((i + 1) % XILINX_DMA_NUM_DESCS));
 			chan->seg_mv[i].phys = chan->seg_p +
-				sizeof(*chan->seg_v) * i;
+				sizeof(*chan->seg_mv) * i;
 			list_add_tail(&chan->seg_mv[i].node,
 				      &chan->free_seg_list);
 		}
 static void xilinx_mcdma_start_transfer(struct xilinx_dma_chan *chan)
 {
 	struct xilinx_dma_tx_descriptor *head_desc, *tail_desc;
-	struct xilinx_axidma_tx_segment *tail_segment;
+	struct xilinx_aximcdma_tx_segment *tail_segment;
 	u32 reg;
 	/*
 	tail_desc = list_last_entry(&chan->pending_list,
 				    struct xilinx_dma_tx_descriptor, node);
 	tail_segment = list_last_entry(&tail_desc->segments,
-				       struct xilinx_axidma_tx_segment, node);
+				       struct xilinx_aximcdma_tx_segment, node);
 	reg = dma_ctrl_read(chan, XILINX_MCDMA_CHAN_CR_OFFSET(chan->tdest));
 	struct xilinx_vdma_tx_segment *tail_segment;
 	struct xilinx_dma_tx_descriptor *tail_desc;
 	struct xilinx_axidma_tx_segment *axidma_tail_segment;
+	struct xilinx_aximcdma_tx_segment *aximcdma_tail_segment;
 	struct xilinx_cdma_tx_segment *cdma_tail_segment;
 	if (list_empty(&chan->pending_list))
 						struct xilinx_cdma_tx_segment,
 						node);
 		cdma_tail_segment->hw.next_desc = (u32)desc->async_tx.phys;
-	} else {
+	} else if (chan->xdev->dma_config->dmatype == XDMA_TYPE_AXIDMA) {
 		axidma_tail_segment = list_last_entry(&tail_desc->segments,
 					       struct xilinx_axidma_tx_segment,
 					       node);
 		axidma_tail_segment->hw.next_desc = (u32)desc->async_tx.phys;
+	} else {
+		aximcdma_tail_segment =
+			list_last_entry(&tail_desc->segments,
+					struct xilinx_aximcdma_tx_segment,
+					node);
+		aximcdma_tail_segment->hw.next_desc = (u32)desc->async_tx.phys;
 	}
 	/*
 		chan->stop_transfer = xilinx_dma_stop_transfer;
 	}
-	/* check if SG is enabled (only for AXIDMA and CDMA) */
+	/* check if SG is enabled (only for AXIDMA, AXIMCDMA, and CDMA) */
 	if (xdev->dma_config->dmatype != XDMA_TYPE_VDMA) {
-		if (dma_ctrl_read(chan, XILINX_DMA_REG_DMASR) &
+		if (xdev->dma_config->dmatype == XDMA_TYPE_AXIMCDMA ||
-		    XILINX_DMA_DMASR_SG_MASK)
+		    dma_ctrl_read(chan, XILINX_DMA_REG_DMASR) &
+			    XILINX_DMA_DMASR_SG_MASK)
 			chan->has_sg = true;
 		dev_dbg(chan->dev, "ch %d: SG %s\n", chan->id,
 			chan->has_sg ? "enabled" : "disabled");

drivers/firmware/xilinx/zynqmp.c+50−15

 #include <linux/of_platform.h>
 #include <linux/slab.h>
 #include <linux/uaccess.h>
+#include <linux/hashtable.h>
 #include <linux/firmware/xlnx-zynqmp.h>
 #include "zynqmp-debug.h"
+/* Max HashMap Order for PM API feature check (1<<7 = 128) */
+#define PM_API_FEATURE_CHECK_MAX_ORDER  7
 static bool feature_check_enabled;
-static u32 zynqmp_pm_features[PM_API_MAX];
+DEFINE_HASHTABLE(pm_api_features_map, PM_API_FEATURE_CHECK_MAX_ORDER);
+/**
+ * struct pm_api_feature_data - PM API Feature data
+ * @pm_api_id:		PM API Id, used as key to index into hashmap
+ * @feature_status:	status of PM API feature: valid, invalid
+ * @hentry:		hlist_node that hooks this entry into hashtable
+ */
+struct pm_api_feature_data {
+	u32 pm_api_id;
+	int feature_status;
+	struct hlist_node hentry;
+};
 static const struct mfd_cell firmware_devs[] = {
 	{
 	int ret;
 	u32 ret_payload[PAYLOAD_ARG_CNT];
 	u64 smc_arg[2];
+	struct pm_api_feature_data *feature_data;
 	if (!feature_check_enabled)
 		return 0;
-	/* Return value if feature is already checked */
+	/* Check for existing entry in hash table for given api */
-	if (api_id > ARRAY_SIZE(zynqmp_pm_features))
+	hash_for_each_possible(pm_api_features_map, feature_data, hentry,
-		return PM_FEATURE_INVALID;
+			       api_id) {
+		if (feature_data->pm_api_id == api_id)
+			return feature_data->feature_status;
+	}
-	if (zynqmp_pm_features[api_id] != PM_FEATURE_UNCHECKED)
+	/* Add new entry if not present */
-		return zynqmp_pm_features[api_id];
+	feature_data = kmalloc(sizeof(*feature_data), GFP_KERNEL);
+	if (!feature_data)
+		return -ENOMEM;
+	feature_data->pm_api_id = api_id;
 	smc_arg[0] = PM_SIP_SVC | PM_FEATURE_CHECK;
 	smc_arg[1] = api_id;
 	ret = do_fw_call(smc_arg[0], smc_arg[1], 0, ret_payload);
-	if (ret) {
+	if (ret)
-		zynqmp_pm_features[api_id] = PM_FEATURE_INVALID;
+		ret = -EOPNOTSUPP;
-		return PM_FEATURE_INVALID;
+	else
-	}
+		ret = ret_payload[1];
-	zynqmp_pm_features[api_id] = ret_payload[1];
+	feature_data->feature_status = ret;
+	hash_add(pm_api_features_map, &feature_data->hentry, api_id);
-	return zynqmp_pm_features[api_id];
+	return ret;
 }
 /**
 	 * Make sure to stay in x0 register
 	 */
 	u64 smc_arg[4];
+	int ret;
-	if (zynqmp_pm_feature(pm_api_id) == PM_FEATURE_INVALID)
+	/* Check if feature is supported or not */
-		return -ENOTSUPP;
+	ret = zynqmp_pm_feature(pm_api_id);
+	if (ret < 0)
+		return ret;
 	smc_arg[0] = PM_SIP_SVC | pm_api_id;
 	smc_arg[1] = ((u64)arg1 << 32) | arg0;
  */
 int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type)
 {
-	return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SET_SD_TAPDELAY,
+	return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SD_DLL_RESET,
 				   type, 0, NULL);
 }
 EXPORT_SYMBOL_GPL(zynqmp_pm_sd_dll_reset);
 static int zynqmp_firmware_remove(struct platform_device *pdev)
 {
+	struct pm_api_feature_data *feature_data;
+	int i;
 	mfd_remove_devices(&pdev->dev);
 	zynqmp_pm_api_debugfs_exit();
+	hash_for_each(pm_api_features_map, i, feature_data, hentry) {
+		hash_del(&feature_data->hentry);
+		kfree(feature_data);
+	}
 	return 0;
 }

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c+2−2

@@ -4852,7 +4852,7 @@ int amdgpu_device_baco_enter(struct drm_device *dev) · 4851 unmodified lines
4852	if (!amdgpu_device_supports_baco(adev_to_drm(adev)))	4852	if (!amdgpu_device_supports_baco(adev_to_drm(adev)))
4853	return -ENOTSUPP;	4853	return -ENOTSUPP;
4854		4854
4855	if (ras && ras->supported)	4855	if (ras && ras->supported && adev->nbio.funcs->enable_doorbell_interrupt)
4856	adev->nbio.funcs->enable_doorbell_interrupt(adev, false);	4856	adev->nbio.funcs->enable_doorbell_interrupt(adev, false);
4857		4857
4858	return amdgpu_dpm_baco_enter(adev);	4858	return amdgpu_dpm_baco_enter(adev);
@@ -4871,7 +4871,7 @@ int amdgpu_device_baco_exit(struct drm_device *dev) · 12 unmodified lines
4871	if (ret)	4871	if (ret)
4872	return ret;	4872	return ret;
4873		4873
4874	if (ras && ras->supported)	4874	if (ras && ras->supported && adev->nbio.funcs->enable_doorbell_interrupt)
4875	adev->nbio.funcs->enable_doorbell_interrupt(adev, true);	4875	adev->nbio.funcs->enable_doorbell_interrupt(adev, true);
4876		4876
4877	return 0;	4877	return 0;

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c+4−4

@@ -1055,10 +1055,10 @@ static const struct pci_device_id pciidlist[] = { · 1054 unmodified lines
1055	{0x1002, 0x15dd, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RAVEN\|AMD_IS_APU},	1055	{0x1002, 0x15dd, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RAVEN\|AMD_IS_APU},
1056	{0x1002, 0x15d8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RAVEN\|AMD_IS_APU},	1056	{0x1002, 0x15d8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RAVEN\|AMD_IS_APU},
1057	/* Arcturus */	1057	/* Arcturus */
1058	{0x1002, 0x738C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARCTURUS\|AMD_EXP_HW_SUPPORT},	1058	{0x1002, 0x738C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARCTURUS},
1059	{0x1002, 0x7388, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARCTURUS\|AMD_EXP_HW_SUPPORT},	1059	{0x1002, 0x7388, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARCTURUS},
1060	{0x1002, 0x738E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARCTURUS\|AMD_EXP_HW_SUPPORT},	1060	{0x1002, 0x738E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARCTURUS},
1061	{0x1002, 0x7390, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARCTURUS\|AMD_EXP_HW_SUPPORT},	1061	{0x1002, 0x7390, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARCTURUS},
1062	/* Navi10 */	1062	/* Navi10 */
1063	{0x1002, 0x7310, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},	1063	{0x1002, 0x7310, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
1064	{0x1002, 0x7312, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},	1064	{0x1002, 0x7312, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c+2−2

@@ -69,10 +69,10 @@ static int amdgpu_ttm_backend_bind(struct ttm_bo_device *bdev, · 68 unmodified lines
69		69
70	static int amdgpu_ttm_init_on_chip(struct amdgpu_device *adev,	70	static int amdgpu_ttm_init_on_chip(struct amdgpu_device *adev,
71	unsigned int type,	71	unsigned int type,
72	uint64_t size)	72	uint64_t size_in_page)
73	{	73	{
74	return ttm_range_man_init(&adev->mman.bdev, type,	74	return ttm_range_man_init(&adev->mman.bdev, type,
75	false, size >> PAGE_SHIFT);	75	false, size_in_page);
76	}	76	}
77		77
78	/**	78	/**

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h+1−0

@@ -67,6 +67,7 @@ struct amdgpu_uvd { · 66 unmodified lines
67	unsigned harvest_config;	67	unsigned harvest_config;
68	/* store image width to adjust nb memory state */	68	/* store image width to adjust nb memory state */
69	unsigned decode_image_width;	69	unsigned decode_image_width;
		70	uint32_t keyselect;
70	};	71	};
71		72
72	int amdgpu_uvd_sw_init(struct amdgpu_device *adev);	73	int amdgpu_uvd_sw_init(struct amdgpu_device *adev);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c+2−0

 	SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG3, 0xffffffff, 0x00000280),
 	SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG4, 0xffffffff, 0x00800000),
 	SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_EXCEPTION_CONTROL, 0x7fff0f1f, 0x00b80000),
+	SOC15_REG_GOLDEN_VALUE(GC, 0 ,mmGCEA_SDP_TAG_RESERVE0, 0xffffffff, 0x10100100),
+	SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCEA_SDP_TAG_RESERVE1, 0xffffffff, 0x17000088),
 	SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL_Sienna_Cichlid, 0x1ff1ffff, 0x00000500),
 	SOC15_REG_GOLDEN_VALUE(GC, 0, mmGE_PC_CNTL, 0x003fffff, 0x00280400),
 	SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL2A_ADDR_MATCH_MASK, 0xffffffff, 0xffffffcf),

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c+11−9

  */
 static int uvd_v3_1_fw_validate(struct amdgpu_device *adev)
 {
-	void *ptr;
+	int i;
-	uint32_t ucode_len, i;
+	uint32_t keysel = adev->uvd.keyselect;
-	uint32_t keysel;
-	ptr = adev->uvd.inst[0].cpu_addr;
-	ptr += 192 + 16;
-	memcpy(&ucode_len, ptr, 4);
-	ptr += ucode_len;
-	memcpy(&keysel, ptr, 4);
 	WREG32(mmUVD_FW_START, keysel);
 	struct amdgpu_ring *ring;
 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 	int r;
+	void *ptr;
+	uint32_t ucode_len;
 	/* UVD TRAP */
 	r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 124, &adev->uvd.inst->irq);
 	if (r)
 		return r;
+	/* Retrieval firmware validate key */
+	ptr = adev->uvd.inst[0].cpu_addr;
+	ptr += 192 + 16;
+	memcpy(&ucode_len, ptr, 4);
+	ptr += ucode_len;
+	memcpy(&adev->uvd.keyselect, ptr, 4);
 	r = amdgpu_uvd_entity_init(adev);
 	return r;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c+3−2

 	amdgpu_dm_init_color_mod();
 #ifdef CONFIG_DRM_AMD_DC_HDCP
-	if (adev->asic_type >= CHIP_RAVEN) {
+	if (adev->dm.dc->caps.max_links > 0 && adev->asic_type >= CHIP_RAVEN) {
 		adev->dm.hdcp_workqueue = hdcp_create_workqueue(adev, &init_params.cp_psp, adev->dm.dc);
 		if (!adev->dm.hdcp_workqueue)
 	bool mode_set_reset_required = false;
 	drm_atomic_helper_update_legacy_modeset_state(dev, state);
-	drm_atomic_helper_calc_timestamping_constants(state);
 	dm_state = dm_atomic_get_new_state(state);
 	if (dm_state && dm_state->context) {
 		}
 	}
+	drm_atomic_helper_calc_timestamping_constants(state);
 	/* update changed items */
 	for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
 		struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);

drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c+2−2

@@ -299,8 +299,8 @@ irq_source_info_dcn20[DAL_IRQ_SOURCES_NUMBER] = { · 298 unmodified lines
299	pflip_int_entry(1),	299	pflip_int_entry(1),
300	pflip_int_entry(2),	300	pflip_int_entry(2),
301	pflip_int_entry(3),	301	pflip_int_entry(3),
302	[DC_IRQ_SOURCE_PFLIP5] = dummy_irq_entry(),	302	pflip_int_entry(4),
303	[DC_IRQ_SOURCE_PFLIP6] = dummy_irq_entry(),	303	pflip_int_entry(5),
304	[DC_IRQ_SOURCE_PFLIP_UNDERLAY0] = dummy_irq_entry(),	304	[DC_IRQ_SOURCE_PFLIP_UNDERLAY0] = dummy_irq_entry(),
305	gpio_pad_int_entry(0),	305	gpio_pad_int_entry(0),
306	gpio_pad_int_entry(1),	306	gpio_pad_int_entry(1),

drivers/gpu/drm/ast/ast_mode.c+16−1

 	case DRM_MODE_DPMS_SUSPEND:
 		if (ast->tx_chip_type == AST_TX_DP501)
 			ast_set_dp501_video_output(crtc->dev, 1);
-		ast_crtc_load_lut(ast, crtc);
 		break;
 	case DRM_MODE_DPMS_OFF:
 		if (ast->tx_chip_type == AST_TX_DP501)
 	return 0;
 }
+static void
+ast_crtc_helper_atomic_flush(struct drm_crtc *crtc, struct drm_crtc_state *old_crtc_state)
+{
+	struct ast_private *ast = to_ast_private(crtc->dev);
+	struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc->state);
+	struct ast_crtc_state *old_ast_crtc_state = to_ast_crtc_state(old_crtc_state);
+	/*
+	 * The gamma LUT has to be reloaded after changing the primary
+	 * plane's color format.
+	 */
+	if (old_ast_crtc_state->format != ast_crtc_state->format)
+		ast_crtc_load_lut(ast, crtc);
+}
 static void
 ast_crtc_helper_atomic_enable(struct drm_crtc *crtc,
 			      struct drm_crtc_state *old_crtc_state)
 static const struct drm_crtc_helper_funcs ast_crtc_helper_funcs = {
 	.atomic_check = ast_crtc_helper_atomic_check,
+	.atomic_flush = ast_crtc_helper_atomic_flush,
 	.atomic_enable = ast_crtc_helper_atomic_enable,
 	.atomic_disable = ast_crtc_helper_atomic_disable,
 };

drivers/gpu/drm/bridge/synopsys/dw-hdmi.c+0−6

 {
 	enum drm_connector_status result;
-	mutex_lock(&hdmi->mutex);
-	hdmi->force = DRM_FORCE_UNSPECIFIED;
-	dw_hdmi_update_power(hdmi);
-	dw_hdmi_update_phy_mask(hdmi);
-	mutex_unlock(&hdmi->mutex);
 	result = hdmi->phy.ops->read_hpd(hdmi, hdmi->phy.data);
 	mutex_lock(&hdmi->mutex);

drivers/gpu/drm/drm_gem_vram_helper.c+1−1

@@ -140,7 +140,7 @@ static void drm_gem_vram_placement(struct drm_gem_vram_object *gbo, · 139 unmodified lines
140	unsigned int c = 0;	140	unsigned int c = 0;
141		141
142	if (pl_flag & DRM_GEM_VRAM_PL_FLAG_TOPDOWN)	142	if (pl_flag & DRM_GEM_VRAM_PL_FLAG_TOPDOWN)
143	pl_flag = TTM_PL_FLAG_TOPDOWN;	143	invariant_flags = TTM_PL_FLAG_TOPDOWN;
144		144
145	gbo->placement.placement = gbo->placements;	145	gbo->placement.placement = gbo->placements;
146	gbo->placement.busy_placement = gbo->placements;	146	gbo->placement.busy_placement = gbo->placements;

drivers/gpu/drm/exynos/Kconfig+2−1

 # SPDX-License-Identifier: GPL-2.0-only
 config DRM_EXYNOS
 	tristate "DRM Support for Samsung SoC Exynos Series"
-	depends on OF && DRM && (ARCH_S3C64XX || ARCH_S5PV210 || ARCH_EXYNOS || ARCH_MULTIPLATFORM || COMPILE_TEST)
+	depends on OF && DRM && COMMON_CLK
+	depends on ARCH_S3C64XX || ARCH_S5PV210 || ARCH_EXYNOS || ARCH_MULTIPLATFORM || COMPILE_TEST
 	depends on MMU
 	select DRM_KMS_HELPER
 	select VIDEOMODE_HELPERS

drivers/gpu/drm/i915/display/intel_display.c+2−1

 	case 10 ... 11:
 		bpp = 10 * 3;
 		break;
-	case 12:
+	case 12 ... 16:
 		bpp = 12 * 3;
 		break;
 	default:
+		MISSING_CASE(conn_state->max_bpc);
 		return -EINVAL;
 	}

drivers/gpu/drm/i915/gt/intel_breadcrumbs.c+92−51

@@ -30,18 +30,21 @@ · 29 unmodified lines
30	#include "i915_trace.h"	30	#include "i915_trace.h"
31	#include "intel_breadcrumbs.h"	31	#include "intel_breadcrumbs.h"
32	#include "intel_context.h"	32	#include "intel_context.h"
		33	#include "intel_engine_pm.h"
33	#include "intel_gt_pm.h"	34	#include "intel_gt_pm.h"
34	#include "intel_gt_requests.h"	35	#include "intel_gt_requests.h"
35		36
36	static void irq_enable(struct intel_engine_cs *engine)	37	static bool irq_enable(struct intel_engine_cs *engine)
37	{	38	{
38	if (!engine->irq_enable)	39	if (!engine->irq_enable)
39	return;	40	return false;
40		41
41	/* Caller disables interrupts */	42	/* Caller disables interrupts */
42	spin_lock(&engine->gt->irq_lock);	43	spin_lock(&engine->gt->irq_lock);
43	engine->irq_enable(engine);	44	engine->irq_enable(engine);
44	spin_unlock(&engine->gt->irq_lock);	45	spin_unlock(&engine->gt->irq_lock);
		46
		47	return true;
45	}	48	}
46		49
47	static void irq_disable(struct intel_engine_cs *engine)	50	static void irq_disable(struct intel_engine_cs *engine)
@@ -57,12 +60,11 @@ static void irq_disable(struct intel_engine_cs *engine) · 9 unmodified lines
57		60
58	static void __intel_breadcrumbs_arm_irq(struct intel_breadcrumbs *b)	61	static void __intel_breadcrumbs_arm_irq(struct intel_breadcrumbs *b)
59	{	62	{
60	lockdep_assert_held(&b->irq_lock);	63	/*
61		64	* Since we are waiting on a request, the GPU should be busy
62	if (!b->irq_engine \|\| b->irq_armed)	65	* and should have its own rpm reference.
63	return;	66	*/
64		67	if (GEM_WARN_ON(!intel_gt_pm_get_if_awake(b->irq_engine->gt)))
65	if (!intel_gt_pm_get_if_awake(b->irq_engine->gt))
66	return;	68	return;
67		69
68	/*	70	/*
@@ -73,25 +75,24 @@ static void __intel_breadcrumbs_arm_irq(struct intel_breadcrumbs *b) · 4 unmodified lines
73	*/	75	*/
74	WRITE_ONCE(b->irq_armed, true);	76	WRITE_ONCE(b->irq_armed, true);
75		77
76	/*	78	/* Requests may have completed before we could enable the interrupt. */
77	* Since we are waiting on a request, the GPU should be busy	79	if (!b->irq_enabled++ && irq_enable(b->irq_engine))
78	* and should have its own rpm reference. This is tracked	80	irq_work_queue(&b->irq_work);
79	* by i915->gt.awake, we can forgo holding our own wakref
80	* for the interrupt as before i915->gt.awake is released (when
81	* the driver is idle) we disarm the breadcrumbs.
82	*/
83
84	if (!b->irq_enabled++)
85	irq_enable(b->irq_engine);
86	}	81	}
87		82
88	static void __intel_breadcrumbs_disarm_irq(struct intel_breadcrumbs *b)	83	static void intel_breadcrumbs_arm_irq(struct intel_breadcrumbs *b)
89	{	84	{
90	lockdep_assert_held(&b->irq_lock);	85	if (!b->irq_engine)
91
92	if (!b->irq_engine \|\| !b->irq_armed)
93	return;	86	return;
94		87
		88	spin_lock(&b->irq_lock);
		89	if (!b->irq_armed)
		90	__intel_breadcrumbs_arm_irq(b);
		91	spin_unlock(&b->irq_lock);
		92	}
		93
		94	static void __intel_breadcrumbs_disarm_irq(struct intel_breadcrumbs *b)
		95	{
95	GEM_BUG_ON(!b->irq_enabled);	96	GEM_BUG_ON(!b->irq_enabled);
96	if (!--b->irq_enabled)	97	if (!--b->irq_enabled)
97	irq_disable(b->irq_engine);	98	irq_disable(b->irq_engine);
@@ -105,8 +106,6 @@ static void add_signaling_context(struct intel_breadcrumbs *b, · 7 unmodified lines
105	{	106	{
106	intel_context_get(ce);	107	intel_context_get(ce);
107	list_add_tail(&ce->signal_link, &b->signalers);	108	list_add_tail(&ce->signal_link, &b->signalers);
108	if (list_is_first(&ce->signal_link, &b->signalers))
109	__intel_breadcrumbs_arm_irq(b);
110	}	109	}
111		110
112	static void remove_signaling_context(struct intel_breadcrumbs *b,	111	static void remove_signaling_context(struct intel_breadcrumbs *b,
@@ -174,34 +173,65 @@ static void add_retire(struct intel_breadcrumbs b, struct intel_timeline tl) · 61 unmodified lines
174	intel_engine_add_retire(b->irq_engine, tl);	173	intel_engine_add_retire(b->irq_engine, tl);
175	}	174	}
176		175
177	static bool __signal_request(struct i915_request rq, struct list_head signals)	176	static bool __signal_request(struct i915_request *rq)
178	{	177	{
179	clear_bit(I915_FENCE_FLAG_SIGNAL, &rq->fence.flags);
180
181	if (!__dma_fence_signal(&rq->fence)) {	178	if (!__dma_fence_signal(&rq->fence)) {
182	i915_request_put(rq);	179	i915_request_put(rq);
183	return false;	180	return false;
184	}	181	}
185		182
186	list_add_tail(&rq->signal_link, signals);
187	return true;	183	return true;
188	}	184	}
189		185
		186	static struct llist_node *
		187	slist_add(struct llist_node node, struct llist_node head)
		188	{
		189	node->next = head;
		190	return node;
		191	}
		192
190	static void signal_irq_work(struct irq_work *work)	193	static void signal_irq_work(struct irq_work *work)
191	{	194	{
192	struct intel_breadcrumbs b = container_of(work, typeof(b), irq_work);	195	struct intel_breadcrumbs b = container_of(work, typeof(b), irq_work);
193	const ktime_t timestamp = ktime_get();	196	const ktime_t timestamp = ktime_get();
		197	struct llist_node signal, sn;
194	struct intel_context ce, cn;	198	struct intel_context ce, cn;
195	struct list_head pos, next;	199	struct list_head pos, next;
196	LIST_HEAD(signal);	200
		201	signal = NULL;
		202	if (unlikely(!llist_empty(&b->signaled_requests)))
		203	signal = llist_del_all(&b->signaled_requests);
197		204
198	spin_lock(&b->irq_lock);	205	spin_lock(&b->irq_lock);
199		206
200	if (list_empty(&b->signalers))	207	/*
		208	* Keep the irq armed until the interrupt after all listeners are gone.
		209	*
		210	* Enabling/disabling the interrupt is rather costly, roughly a couple
		211	* of hundred microseconds. If we are proactive and enable/disable
		212	* the interrupt around every request that wants a breadcrumb, we
		213	* quickly drown in the extra orders of magnitude of latency imposed
		214	* on request submission.
		215	*
		216	* So we try to be lazy, and keep the interrupts enabled until no
		217	* more listeners appear within a breadcrumb interrupt interval (that
		218	* is until a request completes that no one cares about). The
		219	* observation is that listeners come in batches, and will often
		220	* listen to a bunch of requests in succession. Though note on icl+,
		221	* interrupts are always enabled due to concerns with rc6 being
		222	* dysfunctional with per-engine interrupt masking.
		223	*
		224	* We also try to avoid raising too many interrupts, as they may
		225	* be generated by userspace batches and it is unfortunately rather
		226	* too easy to drown the CPU under a flood of GPU interrupts. Thus
		227	* whenever no one appears to be listening, we turn off the interrupts.
		228	* Fewer interrupts should conserve power -- at the very least, fewer
		229	* interrupt draw less ire from other users of the system and tools
		230	* like powertop.
		231	*/
		232	if (!signal && b->irq_armed && list_empty(&b->signalers))
201	__intel_breadcrumbs_disarm_irq(b);	233	__intel_breadcrumbs_disarm_irq(b);
202		234
203	list_splice_init(&b->signaled_requests, &signal);
204
205	list_for_each_entry_safe(ce, cn, &b->signalers, signal_link) {	235	list_for_each_entry_safe(ce, cn, &b->signalers, signal_link) {
206	GEM_BUG_ON(list_empty(&ce->signals));	236	GEM_BUG_ON(list_empty(&ce->signals));
207		237
@@ -218,7 +248,10 @@ static void signal_irq_work(struct irq_work *work) · 10 unmodified lines
218	* spinlock as the callback chain may end up adding	248	* spinlock as the callback chain may end up adding
219	* more signalers to the same context or engine.	249	* more signalers to the same context or engine.
220	*/	250	*/
221	__signal_request(rq, &signal);	251	clear_bit(I915_FENCE_FLAG_SIGNAL, &rq->fence.flags);
		252	if (__signal_request(rq))
		253	/* We own signal_node now, xfer to local list */
		254	signal = slist_add(&rq->signal_node, signal);
222	}	255	}
223		256
224	/*	257	/*
@@ -238,9 +271,9 @@ static void signal_irq_work(struct irq_work *work) · 13 unmodified lines
238		271
239	spin_unlock(&b->irq_lock);	272	spin_unlock(&b->irq_lock);
240		273
241	list_for_each_safe(pos, next, &signal) {	274	llist_for_each_safe(signal, sn, signal) {
242	struct i915_request *rq =	275	struct i915_request *rq =
243	list_entry(pos, typeof(*rq), signal_link);	276	llist_entry(signal, typeof(*rq), signal_node);
244	struct list_head cb_list;	277	struct list_head cb_list;
245		278
246	spin_lock(&rq->lock);	279	spin_lock(&rq->lock);
@@ -251,6 +284,9 @@ static void signal_irq_work(struct irq_work *work) · 4 unmodified lines
251		284
252	i915_request_put(rq);	285	i915_request_put(rq);
253	}	286	}
		287
		288	if (!READ_ONCE(b->irq_armed) && !list_empty(&b->signalers))
		289	intel_breadcrumbs_arm_irq(b);
254	}	290	}
255		291
256	struct intel_breadcrumbs *	292	struct intel_breadcrumbs *
@@ -264,7 +300,7 @@ intel_breadcrumbs_create(struct intel_engine_cs *irq_engine) · 7 unmodified lines
264		300
265	spin_lock_init(&b->irq_lock);	301	spin_lock_init(&b->irq_lock);
266	INIT_LIST_HEAD(&b->signalers);	302	INIT_LIST_HEAD(&b->signalers);
267	INIT_LIST_HEAD(&b->signaled_requests);	303	init_llist_head(&b->signaled_requests);
268		304
269	init_irq_work(&b->irq_work, signal_irq_work);	305	init_irq_work(&b->irq_work, signal_irq_work);
270		306
@@ -292,21 +328,22 @@ void intel_breadcrumbs_reset(struct intel_breadcrumbs *b) · 21 unmodified lines
292		328
293	void intel_breadcrumbs_park(struct intel_breadcrumbs *b)	329	void intel_breadcrumbs_park(struct intel_breadcrumbs *b)
294	{	330	{
295	unsigned long flags;	331	/* Kick the work once more to drain the signalers */
296		332	irq_work_sync(&b->irq_work);
297	if (!READ_ONCE(b->irq_armed))	333	while (unlikely(READ_ONCE(b->irq_armed))) {
298	return;	334	local_irq_disable();
299		335	signal_irq_work(&b->irq_work);
300	spin_lock_irqsave(&b->irq_lock, flags);	336	local_irq_enable();
301	__intel_breadcrumbs_disarm_irq(b);	337	cond_resched();
302	spin_unlock_irqrestore(&b->irq_lock, flags);	338	}
303		339	GEM_BUG_ON(!list_empty(&b->signalers));
304	if (!list_empty(&b->signalers))
305	irq_work_queue(&b->irq_work);
306	}	340	}
307		341
308	void intel_breadcrumbs_free(struct intel_breadcrumbs *b)	342	void intel_breadcrumbs_free(struct intel_breadcrumbs *b)
309	{	343	{
		344	irq_work_sync(&b->irq_work);
		345	GEM_BUG_ON(!list_empty(&b->signalers));
		346	GEM_BUG_ON(b->irq_armed);
310	kfree(b);	347	kfree(b);
311	}	348	}
312		349
@@ -327,7 +364,8 @@ static void insert_breadcrumb(struct i915_request *rq, · 14 unmodified lines
327	* its signal completion.	364	* its signal completion.
328	*/	365	*/
329	if (__request_completed(rq)) {	366	if (__request_completed(rq)) {
330	if (__signal_request(rq, &b->signaled_requests))	367	if (__signal_request(rq) &&
		368	llist_add(&rq->signal_node, &b->signaled_requests))
331	irq_work_queue(&b->irq_work);	369	irq_work_queue(&b->irq_work);
332	return;	370	return;
333	}	371	}
@@ -362,9 +400,12 @@ static void insert_breadcrumb(struct i915_request *rq, · 28 unmodified lines
362	GEM_BUG_ON(!check_signal_order(ce, rq));	400	GEM_BUG_ON(!check_signal_order(ce, rq));
363	set_bit(I915_FENCE_FLAG_SIGNAL, &rq->fence.flags);	401	set_bit(I915_FENCE_FLAG_SIGNAL, &rq->fence.flags);
364		402
365	/* Check after attaching to irq, interrupt may have already fired. */	403	/*
366	if (__request_completed(rq))	404	* Defer enabling the interrupt to after HW submission and recheck
367	irq_work_queue(&b->irq_work);	405	* the request as it may have completed and raised the interrupt as
		406	* we were attaching it into the lists.
		407	*/
		408	irq_work_queue(&b->irq_work);
368	}	409	}
369		410
370	bool i915_request_enable_breadcrumb(struct i915_request *rq)	411	bool i915_request_enable_breadcrumb(struct i915_request *rq)

drivers/gpu/drm/i915/gt/intel_breadcrumbs_types.h+1−1

@@ -35,7 +35,7 @@ struct intel_breadcrumbs { · 34 unmodified lines
35	struct intel_engine_cs *irq_engine;	35	struct intel_engine_cs *irq_engine;
36		36
37	struct list_head signalers;	37	struct list_head signalers;
38	struct list_head signaled_requests;	38	struct llist_head signaled_requests;
39		39
40	struct irq_work irq_work; /* for use from inside irq_lock */	40	struct irq_work irq_work; /* for use from inside irq_lock */
41		41

drivers/gpu/drm/i915/gt/intel_lrc.c+54−7

 struct virtual_engine {
 	struct intel_engine_cs base;
 	struct intel_context context;
+	struct rcu_work rcu;
 	/*
 	 * We allow only a single request through the virtual engine at a time
 	return &ve->base.execlists.default_priolist.requests[0];
 }
-static void virtual_context_destroy(struct kref *kref)
+static void rcu_virtual_context_destroy(struct work_struct *wrk)
 {
 	struct virtual_engine *ve =
-		container_of(kref, typeof(*ve), context.ref);
+		container_of(wrk, typeof(*ve), rcu.work);
 	unsigned int n;
-	GEM_BUG_ON(!list_empty(virtual_queue(ve)));
-	GEM_BUG_ON(ve->request);
 	GEM_BUG_ON(ve->context.inflight);
+	/* Preempt-to-busy may leave a stale request behind. */
+	if (unlikely(ve->request)) {
+		struct i915_request *old;
+		spin_lock_irq(&ve->base.active.lock);
+		old = fetch_and_zero(&ve->request);
+		if (old) {
+			GEM_BUG_ON(!i915_request_completed(old));
+			__i915_request_submit(old);
+			i915_request_put(old);
+		}
+		spin_unlock_irq(&ve->base.active.lock);
+	}
+	/*
+	 * Flush the tasklet in case it is still running on another core.
+	 *
+	 * This needs to be done before we remove ourselves from the siblings'
+	 * rbtrees as in the case it is running in parallel, it may reinsert
+	 * the rb_node into a sibling.
+	 */
+	tasklet_kill(&ve->base.execlists.tasklet);
+	/* Decouple ourselves from the siblings, no more access allowed. */
 	for (n = 0; n < ve->num_siblings; n++) {
 		struct intel_engine_cs *sibling = ve->siblings[n];
 		struct rb_node *node = &ve->nodes[sibling->id].rb;
-		unsigned long flags;
 		if (RB_EMPTY_NODE(node))
 			continue;
-		spin_lock_irqsave(&sibling->active.lock, flags);
+		spin_lock_irq(&sibling->active.lock);
 		/* Detachment is lazily performed in the execlists tasklet */
 		if (!RB_EMPTY_NODE(node))
 			rb_erase_cached(node, &sibling->execlists.virtual);
-		spin_unlock_irqrestore(&sibling->active.lock, flags);
+		spin_unlock_irq(&sibling->active.lock);
 	}
 	GEM_BUG_ON(__tasklet_is_scheduled(&ve->base.execlists.tasklet));
+	GEM_BUG_ON(!list_empty(virtual_queue(ve)));
 	if (ve->context.state)
 		__execlists_context_fini(&ve->context);
 	intel_context_fini(&ve->context);
+	intel_breadcrumbs_free(ve->base.breadcrumbs);
 	intel_engine_free_request_pool(&ve->base);
 	kfree(ve->bonds);
 	kfree(ve);
 }
+static void virtual_context_destroy(struct kref *kref)
+{
+	struct virtual_engine *ve =
+		container_of(kref, typeof(*ve), context.ref);
+	GEM_BUG_ON(!list_empty(&ve->context.signals));
+	/*
+	 * When destroying the virtual engine, we have to be aware that
+	 * it may still be in use from an hardirq/softirq context causing
+	 * the resubmission of a completed request (background completion
+	 * due to preempt-to-busy). Before we can free the engine, we need
+	 * to flush the submission code and tasklets that are still potentially
+	 * accessing the engine. Flushing the tasklets requires process context,
+	 * and since we can guard the resubmit onto the engine with an RCU read
+	 * lock, we can delegate the free of the engine to an RCU worker.
+	 */
+	INIT_RCU_WORK(&ve->rcu, rcu_virtual_context_destroy);
+	queue_rcu_work(system_wq, &ve->rcu);
+}
 static void virtual_engine_initial_hint(struct virtual_engine *ve)
 {
 	int swp;

drivers/gpu/drm/i915/gt/intel_mocs.c+3−2

 	 * only, __init_mocs_table() take care to program unused index with
 	 * this entry.
 	 */
-	MOCS_ENTRY(1, LE_3_WB | LE_TC_1_LLC | LE_LRUM(3),
+	MOCS_ENTRY(I915_MOCS_PTE,
-		   L3_3_WB),
+		   LE_0_PAGETABLE | LE_TC_0_PAGETABLE,
+		   L3_1_UC),
 	GEN11_MOCS_ENTRIES,
 	/* Implicitly enable L1 - HDC:L1 + L3 + LLC */

drivers/gpu/drm/i915/gt/intel_rc6.c+17−5

 static void gen11_rc6_enable(struct intel_rc6 *rc6)
 {
-	struct intel_uncore *uncore = rc6_to_uncore(rc6);
+	struct intel_gt *gt = rc6_to_gt(rc6);
+	struct intel_uncore *uncore = gt->uncore;
 	struct intel_engine_cs *engine;
 	enum intel_engine_id id;
+	u32 pg_enable;
+	int i;
 	/* 2b: Program RC6 thresholds.*/
 	set(uncore, GEN6_RC6_WAKE_RATE_LIMIT, 54 << 16 | 85);
 		GEN6_RC_CTL_RC6_ENABLE |
 		GEN6_RC_CTL_EI_MODE(1);
-	set(uncore, GEN9_PG_ENABLE,
+	pg_enable =
-	    GEN9_RENDER_PG_ENABLE |
+		GEN9_RENDER_PG_ENABLE |
-	    GEN9_MEDIA_PG_ENABLE |
+		GEN9_MEDIA_PG_ENABLE |
-	    GEN11_MEDIA_SAMPLER_PG_ENABLE);
+		GEN11_MEDIA_SAMPLER_PG_ENABLE;
+	if (INTEL_GEN(gt->i915) >= 12) {
+		for (i = 0; i < I915_MAX_VCS; i++)
+			if (HAS_ENGINE(gt, _VCS(i)))
+				pg_enable |= (VDN_HCP_POWERGATE_ENABLE(i) |
+					      VDN_MFX_POWERGATE_ENABLE(i));
+	}
+	set(uncore, GEN9_PG_ENABLE, pg_enable);
 }
 static void gen9_rc6_enable(struct intel_rc6 *rc6)

drivers/gpu/drm/i915/gt/intel_workarounds.c+3−1

 			return;
 		}
-		if (wal->list)
+		if (wal->list) {
 			memcpy(list, wal->list, sizeof(*wa) * wal->count);
+			kfree(wal->list);
+		}
 		wal->list = list;
 	}

drivers/gpu/drm/i915/gvt/display.c+1−1

@@ -164,7 +164,7 @@ static unsigned char virtual_dp_monitor_edid[GVT_EDID_NUM][EDID_SIZE] = { · 163 unmodified lines
164		164
165	/* let the virtual display supports DP1.2 */	165	/* let the virtual display supports DP1.2 */
166	static u8 dpcd_fix_data[DPCD_HEADER_SIZE] = {	166	static u8 dpcd_fix_data[DPCD_HEADER_SIZE] = {
167	0x12, 0x014, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00	167	0x12, 0x014, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
168	};	168	};
169		169
170	static void emulate_monitor_status_change(struct intel_vgpu *vgpu)	170	static void emulate_monitor_status_change(struct intel_vgpu *vgpu)

drivers/gpu/drm/i915/gvt/gvt.h+1−1

@@ -255,7 +255,7 @@ struct intel_gvt_mmio { · 254 unmodified lines
255	#define F_CMD_ACCESS (1 << 3)	255	#define F_CMD_ACCESS (1 << 3)
256	/* This reg has been accessed by a VM */	256	/* This reg has been accessed by a VM */
257	#define F_ACCESSED (1 << 4)	257	#define F_ACCESSED (1 << 4)
258	/* This reg has been accessed through GPU commands */	258	/* This reg could be accessed by unaligned address */
259	#define F_UNALIGN (1 << 6)	259	#define F_UNALIGN (1 << 6)
260	/* This reg is in GVT's mmio save-restor list and in hardware	260	/* This reg is in GVT's mmio save-restor list and in hardware
261	* logical context image	261	* logical context image

drivers/gpu/drm/i915/gvt/kvmgt.c+3−1

 	/* Take a module reference as mdev core doesn't take
 	 * a reference for vendor driver.
 	 */
-	if (!try_module_get(THIS_MODULE))
+	if (!try_module_get(THIS_MODULE)) {
+		ret = -ENODEV;
 		goto undo_group;
+	}
 	ret = kvmgt_guest_init(mdev);
 	if (ret)

drivers/gpu/drm/i915/gvt/vgpu.c+2−1

@@ -439,7 +439,8 @@ static struct intel_vgpu __intel_gvt_create_vgpu(struct intel_gvt gvt, · 438 unmodified lines
439		439
440	if (IS_BROADWELL(dev_priv))	440	if (IS_BROADWELL(dev_priv))
441	ret = intel_gvt_hypervisor_set_edid(vgpu, PORT_B);	441	ret = intel_gvt_hypervisor_set_edid(vgpu, PORT_B);
442	else	442	/* FixMe: Re-enable APL/BXT once vfio_edid enabled */
		443	else if (!IS_BROXTON(dev_priv))
443	ret = intel_gvt_hypervisor_set_edid(vgpu, PORT_D);	444	ret = intel_gvt_hypervisor_set_edid(vgpu, PORT_D);
444	if (ret)	445	if (ret)
445	goto out_clean_sched_policy;	446	goto out_clean_sched_policy;

drivers/gpu/drm/i915/i915_perf.c+7−2

@@ -909,8 +909,13 @@ static int gen8_oa_read(struct i915_perf_stream *stream, · 908 unmodified lines
909	DRM_I915_PERF_RECORD_OA_REPORT_LOST);	909	DRM_I915_PERF_RECORD_OA_REPORT_LOST);
910	if (ret)	910	if (ret)
911	return ret;	911	return ret;
912	intel_uncore_write(uncore, oastatus_reg,	912
913	oastatus & ~GEN8_OASTATUS_REPORT_LOST);	913	intel_uncore_rmw(uncore, oastatus_reg,
		914	GEN8_OASTATUS_COUNTER_OVERFLOW \|
		915	GEN8_OASTATUS_REPORT_LOST,
		916	IS_GEN_RANGE(uncore->i915, 8, 10) ?
		917	(GEN8_OASTATUS_HEAD_POINTER_WRAP \|
		918	GEN8_OASTATUS_TAIL_POINTER_WRAP) : 0);
914	}	919	}
915		920
916	return gen8_append_oa_reports(stream, buf, count, offset);	921	return gen8_append_oa_reports(stream, buf, count, offset);

drivers/gpu/drm/i915/i915_reg.h+7−7

 #define  GEN7_OASTATUS2_MEM_SELECT_GGTT     (1 << 0) /* 0: PPGTT, 1: GGTT */
 #define GEN8_OASTATUS _MMIO(0x2b08)
+#define  GEN8_OASTATUS_TAIL_POINTER_WRAP    (1 << 17)
+#define  GEN8_OASTATUS_HEAD_POINTER_WRAP    (1 << 16)
 #define  GEN8_OASTATUS_OVERRUN_STATUS	    (1 << 3)
 #define  GEN8_OASTATUS_COUNTER_OVERFLOW     (1 << 2)
 #define  GEN8_OASTATUS_OABUFFER_OVERFLOW    (1 << 1)
 #define   GEN9_PWRGT_MEDIA_STATUS_MASK		(1 << 0)
 #define   GEN9_PWRGT_RENDER_STATUS_MASK		(1 << 1)
-#define POWERGATE_ENABLE			_MMIO(0xa210)
-#define    VDN_HCP_POWERGATE_ENABLE(n)		BIT(((n) * 2) + 3)
-#define    VDN_MFX_POWERGATE_ENABLE(n)		BIT(((n) * 2) + 4)
 #define  GTFIFODBG				_MMIO(0x120000)
 #define    GT_FIFO_SBDEDICATE_FREE_ENTRY_CHV	(0x1f << 20)
 #define    GT_FIFO_FREE_ENTRIES_CHV		(0x7f << 13)
 #define GEN9_MEDIA_PG_IDLE_HYSTERESIS		_MMIO(0xA0C4)
 #define GEN9_RENDER_PG_IDLE_HYSTERESIS		_MMIO(0xA0C8)
 #define GEN9_PG_ENABLE				_MMIO(0xA210)
-#define GEN9_RENDER_PG_ENABLE			REG_BIT(0)
+#define   GEN9_RENDER_PG_ENABLE			REG_BIT(0)
-#define GEN9_MEDIA_PG_ENABLE			REG_BIT(1)
+#define   GEN9_MEDIA_PG_ENABLE			REG_BIT(1)
-#define GEN11_MEDIA_SAMPLER_PG_ENABLE		REG_BIT(2)
+#define   GEN11_MEDIA_SAMPLER_PG_ENABLE		REG_BIT(2)
+#define   VDN_HCP_POWERGATE_ENABLE(n)		REG_BIT(3 + 2 * (n))
+#define   VDN_MFX_POWERGATE_ENABLE(n)		REG_BIT(4 + 2 * (n))
 #define GEN8_PUSHBUS_CONTROL			_MMIO(0xA248)
 #define GEN8_PUSHBUS_ENABLE			_MMIO(0xA250)
 #define GEN8_PUSHBUS_SHIFT			_MMIO(0xA25C)

drivers/gpu/drm/i915/i915_request.h+5−1

@@ -176,7 +176,11 @@ struct i915_request { · 175 unmodified lines
176	struct intel_context *context;	176	struct intel_context *context;
177	struct intel_ring *ring;	177	struct intel_ring *ring;
178	struct intel_timeline __rcu *timeline;	178	struct intel_timeline __rcu *timeline;
179	struct list_head signal_link;	179
		180	union {
		181	struct list_head signal_link;
		182	struct llist_node signal_node;
		183	};
180		184
181	/*	185	/*
182	* The rcu epoch of when this request was allocated. Used to judiciously	186	* The rcu epoch of when this request was allocated. Used to judiciously

drivers/gpu/drm/i915/intel_pm.c+0−13

@@ -7118,23 +7118,10 @@ static void icl_init_clock_gating(struct drm_i915_private *dev_priv) · 7117 unmodified lines
7118		7118
7119	static void tgl_init_clock_gating(struct drm_i915_private *dev_priv)	7119	static void tgl_init_clock_gating(struct drm_i915_private *dev_priv)
7120	{	7120	{
7121	u32 vd_pg_enable = 0;
7122	unsigned int i;
7123
7124	/* Wa_1409120013:tgl */	7121	/* Wa_1409120013:tgl */
7125	I915_WRITE(ILK_DPFC_CHICKEN,	7122	I915_WRITE(ILK_DPFC_CHICKEN,
7126	ILK_DPFC_CHICKEN_COMP_DUMMY_PIXEL);	7123	ILK_DPFC_CHICKEN_COMP_DUMMY_PIXEL);
7127		7124
7128	/* This is not a WA. Enable VD HCP & MFX_ENC powergate */
7129	for (i = 0; i < I915_MAX_VCS; i++) {
7130	if (HAS_ENGINE(&dev_priv->gt, _VCS(i)))
7131	vd_pg_enable \|= VDN_HCP_POWERGATE_ENABLE(i) \|
7132	VDN_MFX_POWERGATE_ENABLE(i);
7133	}
7134
7135	I915_WRITE(POWERGATE_ENABLE,
7136	I915_READ(POWERGATE_ENABLE) \| vd_pg_enable);
7137
7138	/* Wa_1409825376:tgl (pre-prod)*/	7125	/* Wa_1409825376:tgl (pre-prod)*/
7139	if (IS_TGL_DISP_REVID(dev_priv, TGL_REVID_A0, TGL_REVID_B1))	7126	if (IS_TGL_DISP_REVID(dev_priv, TGL_REVID_A0, TGL_REVID_B1))
7140	I915_WRITE(GEN9_CLKGATE_DIS_3, I915_READ(GEN9_CLKGATE_DIS_3) \|	7127	I915_WRITE(GEN9_CLKGATE_DIS_3, I915_READ(GEN9_CLKGATE_DIS_3) \|

drivers/gpu/drm/i915/selftests/i915_request.c+6−2

 		struct intel_context *ce;
 		ce = intel_context_create(engine);
-		if (IS_ERR(ce))
+		if (IS_ERR(ce)) {
+			err = PTR_ERR(ce);
 			goto out;
+		}
 		err = intel_context_pin(ce);
 		if (err) {
 		struct intel_context *ce;
 		ce = intel_context_create(engine);
-		if (IS_ERR(ce))
+		if (IS_ERR(ce)) {
+			err = PTR_ERR(ce);
 			goto out;
+		}
 		err = intel_context_pin(ce);
 		if (err) {

drivers/gpu/drm/mediatek/mtk_dpi.c+0−9

@@ -522,15 +522,6 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi, · 521 unmodified lines
522	return 0;	522	return 0;
523	}	523	}
524		524
525	static void mtk_dpi_encoder_destroy(struct drm_encoder *encoder)
526	{
527	drm_encoder_cleanup(encoder);
528	}
529
530	static const struct drm_encoder_funcs mtk_dpi_encoder_funcs = {
531	.destroy = mtk_dpi_encoder_destroy,
532	};
533
534	static int mtk_dpi_bridge_attach(struct drm_bridge *bridge,	525	static int mtk_dpi_bridge_attach(struct drm_bridge *bridge,
535	enum drm_bridge_attach_flags flags)	526	enum drm_bridge_attach_flags flags)
536	{	527	{

drivers/gpu/drm/mediatek/mtk_dsi.c+22−39

@@ -444,7 +444,10 @@ static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi) · 443 unmodified lines
444	u32 horizontal_sync_active_byte;	444	u32 horizontal_sync_active_byte;
445	u32 horizontal_backporch_byte;	445	u32 horizontal_backporch_byte;
446	u32 horizontal_frontporch_byte;	446	u32 horizontal_frontporch_byte;
		447	u32 horizontal_front_back_byte;
		448	u32 data_phy_cycles_byte;
447	u32 dsi_tmp_buf_bpp, data_phy_cycles;	449	u32 dsi_tmp_buf_bpp, data_phy_cycles;
		450	u32 delta;
448	struct mtk_phy_timing *timing = &dsi->phy_timing;	451	struct mtk_phy_timing *timing = &dsi->phy_timing;
449		452
450	struct videomode *vm = &dsi->vm;	453	struct videomode *vm = &dsi->vm;
@@ -466,50 +469,30 @@ static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi) · 15 unmodified lines
466	horizontal_sync_active_byte = (vm->hsync_len * dsi_tmp_buf_bpp - 10);	469	horizontal_sync_active_byte = (vm->hsync_len * dsi_tmp_buf_bpp - 10);
467		470
468	if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE)	471	if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE)
469	horizontal_backporch_byte = vm->hback_porch * dsi_tmp_buf_bpp;	472	horizontal_backporch_byte = vm->hback_porch * dsi_tmp_buf_bpp - 10;
470	else	473	else
471	horizontal_backporch_byte = (vm->hback_porch + vm->hsync_len) *	474	horizontal_backporch_byte = (vm->hback_porch + vm->hsync_len) *
472	dsi_tmp_buf_bpp;	475	dsi_tmp_buf_bpp - 10;
473		476
474	data_phy_cycles = timing->lpx + timing->da_hs_prepare +	477	data_phy_cycles = timing->lpx + timing->da_hs_prepare +
475	timing->da_hs_zero + timing->da_hs_exit;	478	timing->da_hs_zero + timing->da_hs_exit + 3;
476		479
477	if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) {	480	delta = dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST ? 18 : 12;
478	if ((vm->hfront_porch + vm->hback_porch) * dsi_tmp_buf_bpp >	481
479	data_phy_cycles * dsi->lanes + 18) {	482	horizontal_frontporch_byte = vm->hfront_porch * dsi_tmp_buf_bpp;
480	horizontal_frontporch_byte =	483	horizontal_front_back_byte = horizontal_frontporch_byte + horizontal_backporch_byte;
481	vm->hfront_porch * dsi_tmp_buf_bpp -	484	data_phy_cycles_byte = data_phy_cycles * dsi->lanes + delta;
482	(data_phy_cycles * dsi->lanes + 18) *	485
483	vm->hfront_porch /	486	if (horizontal_front_back_byte > data_phy_cycles_byte) {
484	(vm->hfront_porch + vm->hback_porch);	487	horizontal_frontporch_byte -= data_phy_cycles_byte *
485		488	horizontal_frontporch_byte /
486	horizontal_backporch_byte =	489	horizontal_front_back_byte;
487	horizontal_backporch_byte -	490
488	(data_phy_cycles * dsi->lanes + 18) *	491	horizontal_backporch_byte -= data_phy_cycles_byte *
489	vm->hback_porch /	492	horizontal_backporch_byte /
490	(vm->hfront_porch + vm->hback_porch);	493	horizontal_front_back_byte;
491	} else {
492	DRM_WARN("HFP less than d-phy, FPS will under 60Hz\n");
493	horizontal_frontporch_byte = vm->hfront_porch *
494	dsi_tmp_buf_bpp;
495	}
496	} else {	494	} else {
497	if ((vm->hfront_porch + vm->hback_porch) * dsi_tmp_buf_bpp >	495	DRM_WARN("HFP + HBP less than d-phy, FPS will under 60Hz\n");
498	data_phy_cycles * dsi->lanes + 12) {
499	horizontal_frontporch_byte =
500	vm->hfront_porch * dsi_tmp_buf_bpp -
501	(data_phy_cycles * dsi->lanes + 12) *
502	vm->hfront_porch /
503	(vm->hfront_porch + vm->hback_porch);
504	horizontal_backporch_byte = horizontal_backporch_byte -
505	(data_phy_cycles * dsi->lanes + 12) *
506	vm->hback_porch /
507	(vm->hfront_porch + vm->hback_porch);
508	} else {
509	DRM_WARN("HFP less than d-phy, FPS will under 60Hz\n");
510	horizontal_frontporch_byte = vm->hfront_porch *
511	dsi_tmp_buf_bpp;
512	}
513	}	496	}
514		497
515	writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC);	498	writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC);

drivers/gpu/drm/nouveau/nouveau_gem.c+5−3

@@ -558,8 +558,10 @@ nouveau_gem_pushbuf_validate(struct nouveau_channel *chan, · 557 unmodified lines
558	NV_PRINTK(err, cli, "validating bo list\n");	558	NV_PRINTK(err, cli, "validating bo list\n");
559	validate_fini(op, chan, NULL, NULL);	559	validate_fini(op, chan, NULL, NULL);
560	return ret;	560	return ret;
		561	} else if (ret > 0) {
		562	*apply_relocs = true;
561	}	563	}
562	*apply_relocs = ret;	564
563	return 0;	565	return 0;
564	}	566	}
565		567
@@ -662,7 +664,6 @@ nouveau_gem_pushbuf_reloc_apply(struct nouveau_cli *cli, · 96 unmodified lines
662	nouveau_bo_wr32(nvbo, r->reloc_bo_offset >> 2, data);	664	nouveau_bo_wr32(nvbo, r->reloc_bo_offset >> 2, data);
663	}	665	}
664		666
665	u_free(reloc);
666	return ret;	667	return ret;
667	}	668	}
668		669
@@ -872,9 +873,10 @@ out: · 203 unmodified lines
872	break;	873	break;
873	}	874	}
874	}	875	}
875	u_free(reloc);
876	}	876	}
877	out_prevalid:	877	out_prevalid:
		878	if (!IS_ERR(reloc))
		879	u_free(reloc);
878	u_free(bo);	880	u_free(bo);
879	u_free(push);	881	u_free(push);
880		882

drivers/gpu/drm/sun4i/sun4i_backend.c+7−1

 		 *
 		 * XXX(hch): this has no business in a driver and needs to move
 		 * to the device tree.
+		 *
+		 * If we have two subsequent calls to dma_direct_set_offset
+		 * returns -EINVAL. Unfortunately, this happens when we have two
+		 * backends in the system, and will result in the driver
+		 * reporting an error while it has been setup properly before.
+		 * Ignore EINVAL, but it should really be removed eventually.
 		 */
 		ret = dma_direct_set_offset(drm->dev, PHYS_OFFSET, 0, SZ_4G);
-		if (ret)
+		if (ret && ret != -EINVAL)
 			return ret;
 	}

drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c+1−0

@@ -208,6 +208,7 @@ static int sun8i_dw_hdmi_bind(struct device dev, struct device master, · 207 unmodified lines
208	phy_node = of_parse_phandle(dev->of_node, "phys", 0);	208	phy_node = of_parse_phandle(dev->of_node, "phys", 0);
209	if (!phy_node) {	209	if (!phy_node) {
210	dev_err(dev, "Can't found PHY phandle\n");	210	dev_err(dev, "Can't found PHY phandle\n");
		211	ret = -EINVAL;
211	goto err_disable_clk_tmds;	212	goto err_disable_clk_tmds;
212	}	213	}
213		214

drivers/gpu/drm/vc4/vc4_drv.h+4−0

 	struct drm_modeset_lock ctm_state_lock;
 	struct drm_private_obj ctm_manager;
+	struct drm_private_obj hvs_channels;
 	struct drm_private_obj load_tracker;
 	/* List of vc4_debugfs_info_entry for adding to debugfs once
 		unsigned int top;
 		unsigned int bottom;
 	} margins;
+	/* Transitional state below, only valid during atomic commits */
+	bool update_muxing;
 };
 #define VC4_HVS_CHANNEL_DISABLED ((unsigned int)-1)

drivers/gpu/drm/vc4/vc4_hdmi.c+48−0

@@ -760,12 +760,54 @@ static void vc4_hdmi_encoder_enable(struct drm_encoder *encoder) · 759 unmodified lines
760	{	760	{
761	}	761	}
762		762
		763	#define WIFI_2_4GHz_CH1_MIN_FREQ 2400000000ULL
		764	#define WIFI_2_4GHz_CH1_MAX_FREQ 2422000000ULL
		765
		766	static int vc4_hdmi_encoder_atomic_check(struct drm_encoder *encoder,
		767	struct drm_crtc_state *crtc_state,
		768	struct drm_connector_state *conn_state)
		769	{
		770	struct drm_display_mode *mode = &crtc_state->adjusted_mode;
		771	struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
		772	unsigned long long pixel_rate = mode->clock * 1000;
		773	unsigned long long tmds_rate;
		774
		775	if (vc4_hdmi->variant->unsupported_odd_h_timings &&
		776	((mode->hdisplay % 2) \|\| (mode->hsync_start % 2) \|\|
		777	(mode->hsync_end % 2) \|\| (mode->htotal % 2)))
		778	return -EINVAL;
		779
		780	/*
		781	* The 1440p@60 pixel rate is in the same range than the first
		782	* WiFi channel (between 2.4GHz and 2.422GHz with 22MHz
		783	* bandwidth). Slightly lower the frequency to bring it out of
		784	* the WiFi range.
		785	*/
		786	tmds_rate = pixel_rate * 10;
		787	if (vc4_hdmi->disable_wifi_frequencies &&
		788	(tmds_rate >= WIFI_2_4GHz_CH1_MIN_FREQ &&
		789	tmds_rate <= WIFI_2_4GHz_CH1_MAX_FREQ)) {
		790	mode->clock = 238560;
		791	pixel_rate = mode->clock * 1000;
		792	}
		793
		794	if (pixel_rate > vc4_hdmi->variant->max_pixel_clock)
		795	return -EINVAL;
		796
		797	return 0;
		798	}
		799
763	static enum drm_mode_status	800	static enum drm_mode_status
764	vc4_hdmi_encoder_mode_valid(struct drm_encoder *encoder,	801	vc4_hdmi_encoder_mode_valid(struct drm_encoder *encoder,
765	const struct drm_display_mode *mode)	802	const struct drm_display_mode *mode)
766	{	803	{
767	struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);	804	struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
768		805
		806	if (vc4_hdmi->variant->unsupported_odd_h_timings &&
		807	((mode->hdisplay % 2) \|\| (mode->hsync_start % 2) \|\|
		808	(mode->hsync_end % 2) \|\| (mode->htotal % 2)))
		809	return MODE_H_ILLEGAL;
		810
769	if ((mode->clock * 1000) > vc4_hdmi->variant->max_pixel_clock)	811	if ((mode->clock * 1000) > vc4_hdmi->variant->max_pixel_clock)
770	return MODE_CLOCK_HIGH;	812	return MODE_CLOCK_HIGH;
771		813
@@ -773,6 +815,7 @@ vc4_hdmi_encoder_mode_valid(struct drm_encoder *encoder, · 1 unmodified line
773	}	815	}
774		816
775	static const struct drm_encoder_helper_funcs vc4_hdmi_encoder_helper_funcs = {	817	static const struct drm_encoder_helper_funcs vc4_hdmi_encoder_helper_funcs = {
		818	.atomic_check = vc4_hdmi_encoder_atomic_check,
776	.mode_valid = vc4_hdmi_encoder_mode_valid,	819	.mode_valid = vc4_hdmi_encoder_mode_valid,
777	.disable = vc4_hdmi_encoder_disable,	820	.disable = vc4_hdmi_encoder_disable,
778	.enable = vc4_hdmi_encoder_enable,	821	.enable = vc4_hdmi_encoder_enable,
@@ -1694,6 +1737,9 @@ static int vc4_hdmi_bind(struct device dev, struct device master, void *data) · 915 unmodified lines
1694	vc4_hdmi->hpd_active_low = hpd_gpio_flags & OF_GPIO_ACTIVE_LOW;	1737	vc4_hdmi->hpd_active_low = hpd_gpio_flags & OF_GPIO_ACTIVE_LOW;
1695	}	1738	}
1696		1739
		1740	vc4_hdmi->disable_wifi_frequencies =
		1741	of_property_read_bool(dev->of_node, "wifi-2.4ghz-coexistence");
		1742
1697	pm_runtime_enable(dev);	1743	pm_runtime_enable(dev);
1698		1744
1699	drm_simple_encoder_init(drm, encoder, DRM_MODE_ENCODER_TMDS);	1745	drm_simple_encoder_init(drm, encoder, DRM_MODE_ENCODER_TMDS);
@@ -1817,6 +1863,7 @@ static const struct vc4_hdmi_variant bcm2711_hdmi0_variant = { · 117 unmodified lines
1817	PHY_LANE_2,	1863	PHY_LANE_2,
1818	PHY_LANE_CK,	1864	PHY_LANE_CK,
1819	},	1865	},
		1866	.unsupported_odd_h_timings = true,
1820		1867
1821	.init_resources = vc5_hdmi_init_resources,	1868	.init_resources = vc5_hdmi_init_resources,
1822	.csc_setup = vc5_hdmi_csc_setup,	1869	.csc_setup = vc5_hdmi_csc_setup,
@@ -1842,6 +1889,7 @@ static const struct vc4_hdmi_variant bcm2711_hdmi1_variant = { · 19 unmodified lines
1842	PHY_LANE_CK,	1889	PHY_LANE_CK,
1843	PHY_LANE_2,	1890	PHY_LANE_2,
1844	},	1891	},
		1892	.unsupported_odd_h_timings = true,
1845		1893
1846	.init_resources = vc5_hdmi_init_resources,	1894	.init_resources = vc5_hdmi_init_resources,
1847	.csc_setup = vc5_hdmi_csc_setup,	1895	.csc_setup = vc5_hdmi_csc_setup,

drivers/gpu/drm/vc4/vc4_hdmi.h+11−0

 	 */
 	enum vc4_hdmi_phy_channel phy_lane_mapping[4];
+	/* The BCM2711 cannot deal with odd horizontal pixel timings */
+	bool unsupported_odd_h_timings;
 	/* Callback to get the resources (memory region, interrupts,
 	 * clocks, etc) for that variant.
 	 */
 	int hpd_gpio;
 	bool hpd_active_low;
+	/*
+	 * On some systems (like the RPi4), some modes are in the same
+	 * frequency range than the WiFi channels (1440p@60Hz for
+	 * example). Should we take evasive actions because that system
+	 * has a wifi adapter?
+	 */
+	bool disable_wifi_frequencies;
 	struct cec_adapter *cec_adap;
 	struct cec_msg cec_rx_msg;
 	bool cec_tx_ok;

drivers/gpu/drm/vc4/vc4_kms.c+181−63

@@ -24,6 +24,8 @@ · 23 unmodified lines
24	#include "vc4_drv.h"	24	#include "vc4_drv.h"
25	#include "vc4_regs.h"	25	#include "vc4_regs.h"
26		26
		27	#define HVS_NUM_CHANNELS 3
		28
27	struct vc4_ctm_state {	29	struct vc4_ctm_state {
28	struct drm_private_state base;	30	struct drm_private_state base;
29	struct drm_color_ctm *ctm;	31	struct drm_color_ctm *ctm;
@@ -35,6 +37,17 @@ static struct vc4_ctm_state to_vc4_ctm_state(struct drm_private_state priv) · 5 unmodified lines
35	return container_of(priv, struct vc4_ctm_state, base);	37	return container_of(priv, struct vc4_ctm_state, base);
36	}	38	}
37		39
		40	struct vc4_hvs_state {
		41	struct drm_private_state base;
		42	unsigned int unassigned_channels;
		43	};
		44
		45	static struct vc4_hvs_state *
		46	to_vc4_hvs_state(struct drm_private_state *priv)
		47	{
		48	return container_of(priv, struct vc4_hvs_state, base);
		49	}
		50
38	struct vc4_load_tracker_state {	51	struct vc4_load_tracker_state {
39	struct drm_private_state base;	52	struct drm_private_state base;
40	u64 hvs_load;	53	u64 hvs_load;
@@ -113,7 +126,7 @@ static int vc4_ctm_obj_init(struct vc4_dev *vc4) · 72 unmodified lines
113	drm_atomic_private_obj_init(&vc4->base, &vc4->ctm_manager, &ctm_state->base,	126	drm_atomic_private_obj_init(&vc4->base, &vc4->ctm_manager, &ctm_state->base,
114	&vc4_ctm_state_funcs);	127	&vc4_ctm_state_funcs);
115		128
116	return drmm_add_action(&vc4->base, vc4_ctm_obj_fini, NULL);	129	return drmm_add_action_or_reset(&vc4->base, vc4_ctm_obj_fini, NULL);
117	}	130	}
118		131
119	/* Converts a DRM S31.32 value to the HW S0.9 format. */	132	/* Converts a DRM S31.32 value to the HW S0.9 format. */
@@ -169,6 +182,19 @@ vc4_ctm_commit(struct vc4_dev vc4, struct drm_atomic_state state) · 49 unmodified lines
169	VC4_SET_FIELD(ctm_state->fifo, SCALER_OLEDOFFS_DISPFIFO));	182	VC4_SET_FIELD(ctm_state->fifo, SCALER_OLEDOFFS_DISPFIFO));
170	}	183	}
171		184
		185	static struct vc4_hvs_state *
		186	vc4_hvs_get_global_state(struct drm_atomic_state *state)
		187	{
		188	struct vc4_dev *vc4 = to_vc4_dev(state->dev);
		189	struct drm_private_state *priv_state;
		190
		191	priv_state = drm_atomic_get_private_obj_state(state, &vc4->hvs_channels);
		192	if (IS_ERR(priv_state))
		193	return ERR_CAST(priv_state);
		194
		195	return to_vc4_hvs_state(priv_state);
		196	}
		197
172	static void vc4_hvs_pv_muxing_commit(struct vc4_dev *vc4,	198	static void vc4_hvs_pv_muxing_commit(struct vc4_dev *vc4,
173	struct drm_atomic_state *state)	199	struct drm_atomic_state *state)
174	{	200	{
@@ -213,10 +239,7 @@ static void vc5_hvs_pv_muxing_commit(struct vc4_dev *vc4, · 38 unmodified lines
213	{	239	{
214	struct drm_crtc_state *crtc_state;	240	struct drm_crtc_state *crtc_state;
215	struct drm_crtc *crtc;	241	struct drm_crtc *crtc;
216	unsigned char dsp2_mux = 0;	242	unsigned char mux;
217	unsigned char dsp3_mux = 3;
218	unsigned char dsp4_mux = 3;
219	unsigned char dsp5_mux = 3;
220	unsigned int i;	243	unsigned int i;
221	u32 reg;	244	u32 reg;
222		245
@@ -224,50 +247,59 @@ static void vc5_hvs_pv_muxing_commit(struct vc4_dev *vc4, · 1 unmodified line
224	struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc_state);	247	struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc_state);
225	struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);	248	struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
226		249
227	if (!crtc_state->active)	250	if (!vc4_state->update_muxing)
228	continue;	251	continue;
229		252
230	switch (vc4_crtc->data->hvs_output) {	253	switch (vc4_crtc->data->hvs_output) {
231	case 2:	254	case 2:
232	dsp2_mux = (vc4_state->assigned_channel == 2) ? 0 : 1;	255	mux = (vc4_state->assigned_channel == 2) ? 0 : 1;
		256	reg = HVS_READ(SCALER_DISPECTRL);
		257	HVS_WRITE(SCALER_DISPECTRL,
		258	(reg & ~SCALER_DISPECTRL_DSP2_MUX_MASK) \|
		259	VC4_SET_FIELD(mux, SCALER_DISPECTRL_DSP2_MUX));
233	break;	260	break;
234		261
235	case 3:	262	case 3:
236	dsp3_mux = vc4_state->assigned_channel;	263	if (vc4_state->assigned_channel == VC4_HVS_CHANNEL_DISABLED)
		264	mux = 3;
		265	else
		266	mux = vc4_state->assigned_channel;
		267
		268	reg = HVS_READ(SCALER_DISPCTRL);
		269	HVS_WRITE(SCALER_DISPCTRL,
		270	(reg & ~SCALER_DISPCTRL_DSP3_MUX_MASK) \|
		271	VC4_SET_FIELD(mux, SCALER_DISPCTRL_DSP3_MUX));
237	break;	272	break;
238		273
239	case 4:	274	case 4:
240	dsp4_mux = vc4_state->assigned_channel;	275	if (vc4_state->assigned_channel == VC4_HVS_CHANNEL_DISABLED)
		276	mux = 3;
		277	else
		278	mux = vc4_state->assigned_channel;
		279
		280	reg = HVS_READ(SCALER_DISPEOLN);
		281	HVS_WRITE(SCALER_DISPEOLN,
		282	(reg & ~SCALER_DISPEOLN_DSP4_MUX_MASK) \|
		283	VC4_SET_FIELD(mux, SCALER_DISPEOLN_DSP4_MUX));
		284
241	break;	285	break;
242		286
243	case 5:	287	case 5:
244	dsp5_mux = vc4_state->assigned_channel;	288	if (vc4_state->assigned_channel == VC4_HVS_CHANNEL_DISABLED)
		289	mux = 3;
		290	else
		291	mux = vc4_state->assigned_channel;
		292
		293	reg = HVS_READ(SCALER_DISPDITHER);
		294	HVS_WRITE(SCALER_DISPDITHER,
		295	(reg & ~SCALER_DISPDITHER_DSP5_MUX_MASK) \|
		296	VC4_SET_FIELD(mux, SCALER_DISPDITHER_DSP5_MUX));
245	break;	297	break;
246		298
247	default:	299	default:
248	break;	300	break;
249	}	301	}
250	}	302	}
251
252	reg = HVS_READ(SCALER_DISPECTRL);
253	HVS_WRITE(SCALER_DISPECTRL,
254	(reg & ~SCALER_DISPECTRL_DSP2_MUX_MASK) \|
255	VC4_SET_FIELD(dsp2_mux, SCALER_DISPECTRL_DSP2_MUX));
256
257	reg = HVS_READ(SCALER_DISPCTRL);
258	HVS_WRITE(SCALER_DISPCTRL,
259	(reg & ~SCALER_DISPCTRL_DSP3_MUX_MASK) \|
260	VC4_SET_FIELD(dsp3_mux, SCALER_DISPCTRL_DSP3_MUX));
261
262	reg = HVS_READ(SCALER_DISPEOLN);
263	HVS_WRITE(SCALER_DISPEOLN,
264	(reg & ~SCALER_DISPEOLN_DSP4_MUX_MASK) \|
265	VC4_SET_FIELD(dsp4_mux, SCALER_DISPEOLN_DSP4_MUX));
266
267	reg = HVS_READ(SCALER_DISPDITHER);
268	HVS_WRITE(SCALER_DISPDITHER,
269	(reg & ~SCALER_DISPDITHER_DSP5_MUX_MASK) \|
270	VC4_SET_FIELD(dsp5_mux, SCALER_DISPDITHER_DSP5_MUX));
271	}	303	}
272		304
273	static void	305	static void
@@ -657,53 +689,123 @@ static int vc4_load_tracker_obj_init(struct vc4_dev *vc4) · 383 unmodified lines
657	&load_state->base,	689	&load_state->base,
658	&vc4_load_tracker_state_funcs);	690	&vc4_load_tracker_state_funcs);
659		691
660	return drmm_add_action(&vc4->base, vc4_load_tracker_obj_fini, NULL);	692	return drmm_add_action_or_reset(&vc4->base, vc4_load_tracker_obj_fini, NULL);
661	}	693	}
662		694
663	#define NUM_OUTPUTS 6	695	static struct drm_private_state *
664	#define NUM_CHANNELS 3	696	vc4_hvs_channels_duplicate_state(struct drm_private_obj *obj)
		697	{
		698	struct vc4_hvs_state *old_state = to_vc4_hvs_state(obj->state);
		699	struct vc4_hvs_state *state;
		700
		701	state = kzalloc(sizeof(*state), GFP_KERNEL);
		702	if (!state)
		703	return NULL;
665		704
666	static int	705	__drm_atomic_helper_private_obj_duplicate_state(obj, &state->base);
667	vc4_atomic_check(struct drm_device dev, struct drm_atomic_state state)	706
		707	state->unassigned_channels = old_state->unassigned_channels;
		708
		709	return &state->base;
		710	}
		711
		712	static void vc4_hvs_channels_destroy_state(struct drm_private_obj *obj,
		713	struct drm_private_state *state)
668	{	714	{
669	unsigned long unassigned_channels = GENMASK(NUM_CHANNELS - 1, 0);	715	struct vc4_hvs_state *hvs_state = to_vc4_hvs_state(state);
670	struct drm_crtc_state old_crtc_state, new_crtc_state;
671	struct drm_crtc *crtc;
672	int i, ret;
673		716
674	/*	717	kfree(hvs_state);
675	* Since the HVS FIFOs are shared across all the pixelvalves and	718	}
676	* the TXP (and thus all the CRTCs), we need to pull the current
677	* state of all the enabled CRTCs so that an update to a single
678	* CRTC still keeps the previous FIFOs enabled and assigned to
679	* the same CRTCs, instead of evaluating only the CRTC being
680	* modified.
681	*/
682	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
683	struct drm_crtc_state *crtc_state;
684		719
685	if (!crtc->state->enable)	720	static const struct drm_private_state_funcs vc4_hvs_state_funcs = {
686	continue;	721	.atomic_duplicate_state = vc4_hvs_channels_duplicate_state,
		722	.atomic_destroy_state = vc4_hvs_channels_destroy_state,
		723	};
687		724
688	crtc_state = drm_atomic_get_crtc_state(state, crtc);	725	static void vc4_hvs_channels_obj_fini(struct drm_device dev, void unused)
689	if (IS_ERR(crtc_state))	726	{
690	return PTR_ERR(crtc_state);	727	struct vc4_dev *vc4 = to_vc4_dev(dev);
691	}	728
		729	drm_atomic_private_obj_fini(&vc4->hvs_channels);
		730	}
		731
		732	static int vc4_hvs_channels_obj_init(struct vc4_dev *vc4)
		733	{
		734	struct vc4_hvs_state *state;
		735
		736	state = kzalloc(sizeof(*state), GFP_KERNEL);
		737	if (!state)
		738	return -ENOMEM;
		739
		740	state->unassigned_channels = GENMASK(HVS_NUM_CHANNELS - 1, 0);
		741	drm_atomic_private_obj_init(&vc4->base, &vc4->hvs_channels,
		742	&state->base,
		743	&vc4_hvs_state_funcs);
		744
		745	return drmm_add_action_or_reset(&vc4->base, vc4_hvs_channels_obj_fini, NULL);
		746	}
		747
		748	/*
		749	* The BCM2711 HVS has up to 7 outputs connected to the pixelvalves and
		750	* the TXP (and therefore all the CRTCs found on that platform).
		751	*
		752	* The naive (and our initial) implementation would just iterate over
		753	* all the active CRTCs, try to find a suitable FIFO, and then remove it
		754	* from the pool of available FIFOs. However, there are a few corner
		755	* cases that need to be considered:
		756	*
		757	* - When running in a dual-display setup (so with two CRTCs involved),
		758	* we can update the state of a single CRTC (for example by changing
		759	* its mode using xrandr under X11) without affecting the other. In
		760	* this case, the other CRTC wouldn't be in the state at all, so we
		761	* need to consider all the running CRTCs in the DRM device to assign
		762	* a FIFO, not just the one in the state.
		763	*
		764	* - To fix the above, we can't use drm_atomic_get_crtc_state on all
		765	* enabled CRTCs to pull their CRTC state into the global state, since
		766	* a page flip would start considering their vblank to complete. Since
		767	* we don't have a guarantee that they are actually active, that
		768	* vblank might never happen, and shouldn't even be considered if we
		769	* want to do a page flip on a single CRTC. That can be tested by
		770	* doing a modetest -v first on HDMI1 and then on HDMI0.
		771	*
		772	* - Since we need the pixelvalve to be disabled and enabled back when
		773	* the FIFO is changed, we should keep the FIFO assigned for as long
		774	* as the CRTC is enabled, only considering it free again once that
		775	* CRTC has been disabled. This can be tested by booting X11 on a
		776	* single display, and changing the resolution down and then back up.
		777	*/
		778	static int vc4_pv_muxing_atomic_check(struct drm_device *dev,
		779	struct drm_atomic_state *state)
		780	{
		781	struct vc4_hvs_state *hvs_new_state;
		782	struct drm_crtc_state old_crtc_state, new_crtc_state;
		783	struct drm_crtc *crtc;
		784	unsigned int i;
		785
		786	hvs_new_state = vc4_hvs_get_global_state(state);
		787	if (!hvs_new_state)
		788	return -EINVAL;
692		789
693	for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {	790	for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
		791	struct vc4_crtc_state *old_vc4_crtc_state =
		792	to_vc4_crtc_state(old_crtc_state);
694	struct vc4_crtc_state *new_vc4_crtc_state =	793	struct vc4_crtc_state *new_vc4_crtc_state =
695	to_vc4_crtc_state(new_crtc_state);	794	to_vc4_crtc_state(new_crtc_state);
696	struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);	795	struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
697	unsigned int matching_channels;	796	unsigned int matching_channels;
698		797
699	if (old_crtc_state->enable && !new_crtc_state->enable)	798	/* Nothing to do here, let's skip it */
700	new_vc4_crtc_state->assigned_channel = VC4_HVS_CHANNEL_DISABLED;	799	if (old_crtc_state->enable == new_crtc_state->enable)
701
702	if (!new_crtc_state->enable)
703	continue;	800	continue;
704		801
705	if (new_vc4_crtc_state->assigned_channel != VC4_HVS_CHANNEL_DISABLED) {	802	/* Muxing will need to be modified, mark it as such */
706	unassigned_channels &= ~BIT(new_vc4_crtc_state->assigned_channel);	803	new_vc4_crtc_state->update_muxing = true;
		804
		805	/* If we're disabling our CRTC, we put back our channel */
		806	if (!new_crtc_state->enable) {
		807	hvs_new_state->unassigned_channels \|= BIT(old_vc4_crtc_state->assigned_channel);
		808	new_vc4_crtc_state->assigned_channel = VC4_HVS_CHANNEL_DISABLED;
707	continue;	809	continue;
708	}	810	}
709		811
@@ -731,17 +833,29 @@ vc4_atomic_check(struct drm_device dev, struct drm_atomic_state state) · 21 unmodified lines
731	* the future, we will need to have something smarter,	833	* the future, we will need to have something smarter,
732	* but it works so far.	834	* but it works so far.
733	*/	835	*/
734	matching_channels = unassigned_channels & vc4_crtc->data->hvs_available_channels;	836	matching_channels = hvs_new_state->unassigned_channels & vc4_crtc->data->hvs_available_channels;
735	if (matching_channels) {	837	if (matching_channels) {
736	unsigned int channel = ffs(matching_channels) - 1;	838	unsigned int channel = ffs(matching_channels) - 1;
737		839
738	new_vc4_crtc_state->assigned_channel = channel;	840	new_vc4_crtc_state->assigned_channel = channel;
739	unassigned_channels &= ~BIT(channel);	841	hvs_new_state->unassigned_channels &= ~BIT(channel);
740	} else {	842	} else {
741	return -EINVAL;	843	return -EINVAL;
742	}	844	}
743	}	845	}
744		846
		847	return 0;
		848	}
		849
		850	static int
		851	vc4_atomic_check(struct drm_device dev, struct drm_atomic_state state)
		852	{
		853	int ret;
		854
		855	ret = vc4_pv_muxing_atomic_check(dev, state);
		856	if (ret)
		857	return ret;
		858
745	ret = vc4_ctm_atomic_check(dev, state);	859	ret = vc4_ctm_atomic_check(dev, state);
746	if (ret < 0)	860	if (ret < 0)
747	return ret;	861	return ret;
@@ -808,6 +922,10 @@ int vc4_kms_load(struct drm_device *dev) · 60 unmodified lines
808	if (ret)	922	if (ret)
809	return ret;	923	return ret;
810		924
		925	ret = vc4_hvs_channels_obj_init(vc4);
		926	if (ret)
		927	return ret;
		928
811	drm_mode_config_reset(dev);	929	drm_mode_config_reset(dev);
812		930
813	drm_kms_helper_poll_init(dev);	931	drm_kms_helper_poll_init(dev);

drivers/hid/hid-cypress.c+39−5

@@ -23,19 +23,17 @@ · 22 unmodified lines
23	#define CP_2WHEEL_MOUSE_HACK 0x02	23	#define CP_2WHEEL_MOUSE_HACK 0x02
24	#define CP_2WHEEL_MOUSE_HACK_ON 0x04	24	#define CP_2WHEEL_MOUSE_HACK_ON 0x04
25		25
		26	#define VA_INVAL_LOGICAL_BOUNDARY 0x08
		27
26	/*	28	/*
27	* Some USB barcode readers from cypress have usage min and usage max in	29	* Some USB barcode readers from cypress have usage min and usage max in
28	* the wrong order	30	* the wrong order
29	*/	31	*/
30	static __u8 cp_report_fixup(struct hid_device hdev, __u8 *rdesc,	32	static __u8 cp_rdesc_fixup(struct hid_device hdev, __u8 *rdesc,
31	unsigned int *rsize)	33	unsigned int *rsize)
32	{	34	{
33	unsigned long quirks = (unsigned long)hid_get_drvdata(hdev);
34	unsigned int i;	35	unsigned int i;
35		36
36	if (!(quirks & CP_RDESC_SWAPPED_MIN_MAX))
37	return rdesc;
38
39	if (*rsize < 4)	37	if (*rsize < 4)
40	return rdesc;	38	return rdesc;
41		39
@@ -48,6 +46,40 @@ static __u8 cp_report_fixup(struct hid_device hdev, __u8 *rdesc, · 6 unmodified lines
48	return rdesc;	46	return rdesc;
49	}	47	}
50		48
		49	static __u8 va_logical_boundary_fixup(struct hid_device hdev, __u8 *rdesc,
		50	unsigned int *rsize)
		51	{
		52	/*
		53	* Varmilo VA104M (with VID Cypress and device ID 07B1) incorrectly
		54	* reports Logical Minimum of its Consumer Control device as 572
		55	* (0x02 0x3c). Fix this by setting its Logical Minimum to zero.
		56	*/
		57	if (*rsize == 25 &&
		58	rdesc[0] == 0x05 && rdesc[1] == 0x0c &&
		59	rdesc[2] == 0x09 && rdesc[3] == 0x01 &&
		60	rdesc[6] == 0x19 && rdesc[7] == 0x00 &&
		61	rdesc[11] == 0x16 && rdesc[12] == 0x3c && rdesc[13] == 0x02) {
		62	hid_info(hdev,
		63	"fixing up varmilo VA104M consumer control report descriptor\n");
		64	rdesc[12] = 0x00;
		65	rdesc[13] = 0x00;
		66	}
		67	return rdesc;
		68	}
		69
		70	static __u8 cp_report_fixup(struct hid_device hdev, __u8 *rdesc,
		71	unsigned int *rsize)
		72	{
		73	unsigned long quirks = (unsigned long)hid_get_drvdata(hdev);
		74
		75	if (quirks & CP_RDESC_SWAPPED_MIN_MAX)
		76	rdesc = cp_rdesc_fixup(hdev, rdesc, rsize);
		77	if (quirks & VA_INVAL_LOGICAL_BOUNDARY)
		78	rdesc = va_logical_boundary_fixup(hdev, rdesc, rsize);
		79
		80	return rdesc;
		81	}
		82
51	static int cp_input_mapped(struct hid_device hdev, struct hid_input hi,	83	static int cp_input_mapped(struct hid_device hdev, struct hid_input hi,
52	struct hid_field field, struct hid_usage usage,	84	struct hid_field field, struct hid_usage usage,
53	unsigned long *bit, int max)	85	unsigned long *bit, int max)
@@ -128,6 +160,8 @@ static const struct hid_device_id cp_devices[] = { · 74 unmodified lines
128	.driver_data = CP_RDESC_SWAPPED_MIN_MAX },	160	.driver_data = CP_RDESC_SWAPPED_MIN_MAX },
129	{ HID_USB_DEVICE(USB_VENDOR_ID_CYPRESS, USB_DEVICE_ID_CYPRESS_MOUSE),	161	{ HID_USB_DEVICE(USB_VENDOR_ID_CYPRESS, USB_DEVICE_ID_CYPRESS_MOUSE),
130	.driver_data = CP_2WHEEL_MOUSE_HACK },	162	.driver_data = CP_2WHEEL_MOUSE_HACK },
		163	{ HID_USB_DEVICE(USB_VENDOR_ID_CYPRESS, USB_DEVICE_ID_CYPRESS_VARMILO_VA104M_07B1),
		164	.driver_data = VA_INVAL_LOGICAL_BOUNDARY },
131	{ }	165	{ }
132	};	166	};
133	MODULE_DEVICE_TABLE(hid, cp_devices);	167	MODULE_DEVICE_TABLE(hid, cp_devices);

drivers/hid/hid-ids.h+9−0

 #define USB_DEVICE_ID_CYPRESS_BARCODE_4	0xed81
 #define USB_DEVICE_ID_CYPRESS_TRUETOUCH	0xc001
+#define USB_DEVICE_ID_CYPRESS_VARMILO_VA104M_07B1   0X07b1
 #define USB_VENDOR_ID_DATA_MODUL	0x7374
 #define USB_VENDOR_ID_DATA_MODUL_EASYMAXTOUCH	0x1201
 #define USB_VENDOR_ID_FRUCTEL	0x25B6
 #define USB_DEVICE_ID_GAMETEL_MT_MODE	0x0002
+#define USB_VENDOR_ID_GAMEVICE	0x27F8
+#define USB_DEVICE_ID_GAMEVICE_GV186	0x0BBE
+#define USB_DEVICE_ID_GAMEVICE_KISHI	0x0BBF
 #define USB_VENDOR_ID_GAMERON		0x0810
 #define USB_DEVICE_ID_GAMERON_DUAL_PSX_ADAPTOR	0x0001
 #define USB_DEVICE_ID_GAMERON_DUAL_PCS_ADAPTOR	0x0002
 #define USB_DEVICE_ID_PENPOWER		0x00f4
 #define USB_VENDOR_ID_GREENASIA		0x0e8f
+#define USB_DEVICE_ID_GREENASIA_DUAL_SAT_ADAPTOR 0x3010
 #define USB_DEVICE_ID_GREENASIA_DUAL_USB_JOYPAD	0x3013
 #define USB_VENDOR_ID_GRETAGMACBETH	0x0971
 #define USB_VENDOR_ID_LOGITECH		0x046d
 #define USB_DEVICE_ID_LOGITECH_AUDIOHUB 0x0a0e
 #define USB_DEVICE_ID_LOGITECH_T651	0xb00c
+#define USB_DEVICE_ID_LOGITECH_DINOVO_EDGE_KBD	0xb309
 #define USB_DEVICE_ID_LOGITECH_C007	0xc007
 #define USB_DEVICE_ID_LOGITECH_C077	0xc077
 #define USB_DEVICE_ID_LOGITECH_RECEIVER	0xc101
 #define USB_VENDOR_ID_UGTIZER			0x2179
 #define USB_DEVICE_ID_UGTIZER_TABLET_GP0610	0x0053
+#define USB_DEVICE_ID_UGTIZER_TABLET_GT5040	0x0077
 #define USB_VENDOR_ID_VIEWSONIC			0x0543
 #define USB_DEVICE_ID_VIEWSONIC_PD1011		0xe621

drivers/hid/hid-input.c+3−0

 	{ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_ASUSTEK,
 		USB_DEVICE_ID_ASUSTEK_T100CHI_KEYBOARD),
 	  HID_BATTERY_QUIRK_IGNORE },
+	{ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_LOGITECH,
+		USB_DEVICE_ID_LOGITECH_DINOVO_EDGE_KBD),
+	  HID_BATTERY_QUIRK_IGNORE },
 	{}
 };

drivers/hid/hid-ite.c+60−1

@@ -11,6 +11,48 @@ · 10 unmodified lines
11		11
12	#include "hid-ids.h"	12	#include "hid-ids.h"
13		13
		14	#define QUIRK_TOUCHPAD_ON_OFF_REPORT BIT(0)
		15
		16	static __u8 ite_report_fixup(struct hid_device hdev, __u8 rdesc, unsigned int rsize)
		17	{
		18	unsigned long quirks = (unsigned long)hid_get_drvdata(hdev);
		19
		20	if (quirks & QUIRK_TOUCHPAD_ON_OFF_REPORT) {
		21	if (*rsize == 188 && rdesc[162] == 0x81 && rdesc[163] == 0x02) {
		22	hid_info(hdev, "Fixing up ITE keyboard report descriptor\n");
		23	rdesc[163] = HID_MAIN_ITEM_RELATIVE;
		24	}
		25	}
		26
		27	return rdesc;
		28	}
		29
		30	static int ite_input_mapping(struct hid_device *hdev,
		31	struct hid_input hi, struct hid_field field,
		32	struct hid_usage usage, unsigned long *bit,
		33	int *max)
		34	{
		35
		36	unsigned long quirks = (unsigned long)hid_get_drvdata(hdev);
		37
		38	if ((quirks & QUIRK_TOUCHPAD_ON_OFF_REPORT) &&
		39	(usage->hid & HID_USAGE_PAGE) == 0x00880000) {
		40	if (usage->hid == 0x00880078) {
		41	/* Touchpad on, userspace expects F22 for this */
		42	hid_map_usage_clear(hi, usage, bit, max, EV_KEY, KEY_F22);
		43	return 1;
		44	}
		45	if (usage->hid == 0x00880079) {
		46	/* Touchpad off, userspace expects F23 for this */
		47	hid_map_usage_clear(hi, usage, bit, max, EV_KEY, KEY_F23);
		48	return 1;
		49	}
		50	return -1;
		51	}
		52
		53	return 0;
		54	}
		55
14	static int ite_event(struct hid_device hdev, struct hid_field field,	56	static int ite_event(struct hid_device hdev, struct hid_field field,
15	struct hid_usage *usage, __s32 value)	57	struct hid_usage *usage, __s32 value)
16	{	58	{
@@ -37,13 +79,27 @@ static int ite_event(struct hid_device hdev, struct hid_field field, · 20 unmodified lines
37	return 0;	79	return 0;
38	}	80	}
39		81
		82	static int ite_probe(struct hid_device hdev, const struct hid_device_id id)
		83	{
		84	int ret;
		85
		86	hid_set_drvdata(hdev, (void *)id->driver_data);
		87
		88	ret = hid_open_report(hdev);
		89	if (ret)
		90	return ret;
		91
		92	return hid_hw_start(hdev, HID_CONNECT_DEFAULT);
		93	}
		94
40	static const struct hid_device_id ite_devices[] = {	95	static const struct hid_device_id ite_devices[] = {
41	{ HID_USB_DEVICE(USB_VENDOR_ID_ITE, USB_DEVICE_ID_ITE8595) },	96	{ HID_USB_DEVICE(USB_VENDOR_ID_ITE, USB_DEVICE_ID_ITE8595) },
42	{ HID_USB_DEVICE(USB_VENDOR_ID_258A, USB_DEVICE_ID_258A_6A88) },	97	{ HID_USB_DEVICE(USB_VENDOR_ID_258A, USB_DEVICE_ID_258A_6A88) },
43	/* ITE8595 USB kbd ctlr, with Synaptics touchpad connected to it. */	98	/* ITE8595 USB kbd ctlr, with Synaptics touchpad connected to it. */
44	{ HID_DEVICE(BUS_USB, HID_GROUP_GENERIC,	99	{ HID_DEVICE(BUS_USB, HID_GROUP_GENERIC,
45	USB_VENDOR_ID_SYNAPTICS,	100	USB_VENDOR_ID_SYNAPTICS,
46	USB_DEVICE_ID_SYNAPTICS_ACER_SWITCH5_012) },	101	USB_DEVICE_ID_SYNAPTICS_ACER_SWITCH5_012),
		102	.driver_data = QUIRK_TOUCHPAD_ON_OFF_REPORT },
47	/* ITE8910 USB kbd ctlr, with Synaptics touchpad connected to it. */	103	/* ITE8910 USB kbd ctlr, with Synaptics touchpad connected to it. */
48	{ HID_DEVICE(BUS_USB, HID_GROUP_GENERIC,	104	{ HID_DEVICE(BUS_USB, HID_GROUP_GENERIC,
49	USB_VENDOR_ID_SYNAPTICS,	105	USB_VENDOR_ID_SYNAPTICS,
@@ -55,6 +111,9 @@ MODULE_DEVICE_TABLE(hid, ite_devices); · 5 unmodified lines
55	static struct hid_driver ite_driver = {	111	static struct hid_driver ite_driver = {
56	.name = "itetech",	112	.name = "itetech",
57	.id_table = ite_devices,	113	.id_table = ite_devices,
		114	.probe = ite_probe,
		115	.report_fixup = ite_report_fixup,
		116	.input_mapping = ite_input_mapping,
58	.event = ite_event,	117	.event = ite_event,
59	};	118	};
60	module_hid_driver(ite_driver);	119	module_hid_driver(ite_driver);

drivers/hid/hid-logitech-dj.c+21−1

 	0x25, 0x01,		/*      LOGICAL_MAX (1)                 */
 	0x75, 0x01,		/*      REPORT_SIZE (1)                 */
 	0x95, 0x04,		/*      REPORT_COUNT (4)                */
-	0x81, 0x06,		/*      INPUT                           */
+	0x81, 0x02,		/*      INPUT (Data,Var,Abs)            */
 	0xC0,			/*    END_COLLECTION                    */
 	0xC0,			/*  END_COLLECTION                      */
 };
 	schedule_work(&djrcv_dev->work);
 }
+/*
+ * Some quad/bluetooth keyboards have a builtin touchpad in this case we see
+ * only 1 paired device with a device_type of REPORT_TYPE_KEYBOARD. For the
+ * touchpad to work we must also forward mouse input reports to the dj_hiddev
+ * created for the keyboard (instead of forwarding them to a second paired
+ * device with a device_type of REPORT_TYPE_MOUSE as we normally would).
+ */
+static const u16 kbd_builtin_touchpad_ids[] = {
+	0xb309, /* Dinovo Edge */
+	0xb30c, /* Dinovo Mini */
+};
 static void logi_hidpp_dev_conn_notif_equad(struct hid_device *hdev,
 					    struct hidpp_event *hidpp_report,
 					    struct dj_workitem *workitem)
 {
 	struct dj_receiver_dev *djrcv_dev = hid_get_drvdata(hdev);
+	int i, id;
 	workitem->type = WORKITEM_TYPE_PAIRED;
 	workitem->device_type = hidpp_report->params[HIDPP_PARAM_DEVICE_INFO] &
 		workitem->reports_supported |= STD_KEYBOARD | MULTIMEDIA |
 					       POWER_KEYS | MEDIA_CENTER |
 					       HIDPP;
+		id = (workitem->quad_id_msb << 8) | workitem->quad_id_lsb;
+		for (i = 0; i < ARRAY_SIZE(kbd_builtin_touchpad_ids); i++) {
+			if (id == kbd_builtin_touchpad_ids[i]) {
+				workitem->reports_supported |= STD_MOUSE;
+				break;
+			}
+		}
 		break;
 	case REPORT_TYPE_MOUSE:
 		workitem->reports_supported |= STD_MOUSE | HIDPP;

drivers/hid/hid-logitech-hidpp.c+32−0

 #define HIDPP_CAPABILITY_BATTERY_LEVEL_STATUS	BIT(3)
 #define HIDPP_CAPABILITY_BATTERY_VOLTAGE	BIT(4)
+#define lg_map_key_clear(c)  hid_map_usage_clear(hi, usage, bit, max, EV_KEY, (c))
 /*
  * There are two hidpp protocols in use, the first version hidpp10 is known
  * as register access protocol or RAP, the second version hidpp20 is known as
 	return g920_ff_set_autocenter(hidpp, data);
 }
+/* -------------------------------------------------------------------------- */
+/* Logitech Dinovo Mini keyboard with builtin touchpad                        */
+/* -------------------------------------------------------------------------- */
+#define DINOVO_MINI_PRODUCT_ID		0xb30c
+static int lg_dinovo_input_mapping(struct hid_device *hdev, struct hid_input *hi,
+		struct hid_field *field, struct hid_usage *usage,
+		unsigned long **bit, int *max)
+{
+	if ((usage->hid & HID_USAGE_PAGE) != HID_UP_LOGIVENDOR)
+		return 0;
+	switch (usage->hid & HID_USAGE) {
+	case 0x00d: lg_map_key_clear(KEY_MEDIA);	break;
+	default:
+		return 0;
+	}
+	return 1;
+}
 /* -------------------------------------------------------------------------- */
 /* HID++1.0 devices which use HID++ reports for their wheels                  */
 /* -------------------------------------------------------------------------- */
 			field->application != HID_GD_MOUSE)
 		return m560_input_mapping(hdev, hi, field, usage, bit, max);
+	if (hdev->product == DINOVO_MINI_PRODUCT_ID)
+		return lg_dinovo_input_mapping(hdev, hi, field, usage, bit, max);
 	return 0;
 }
 	  LDJ_DEVICE(0x405e), .driver_data = HIDPP_QUIRK_HI_RES_SCROLL_X2121 },
 	{ /* Mouse Logitech MX Anywhere 2 */
 	  LDJ_DEVICE(0x404a), .driver_data = HIDPP_QUIRK_HI_RES_SCROLL_X2121 },
+	{ LDJ_DEVICE(0x4072), .driver_data = HIDPP_QUIRK_HI_RES_SCROLL_X2121 },
 	{ LDJ_DEVICE(0xb013), .driver_data = HIDPP_QUIRK_HI_RES_SCROLL_X2121 },
 	{ LDJ_DEVICE(0xb018), .driver_data = HIDPP_QUIRK_HI_RES_SCROLL_X2121 },
 	{ LDJ_DEVICE(0xb01f), .driver_data = HIDPP_QUIRK_HI_RES_SCROLL_X2121 },
 	{ /* Keyboard MX5000 (Bluetooth-receiver in HID proxy mode) */
 	  LDJ_DEVICE(0xb305),
 	  .driver_data = HIDPP_QUIRK_HIDPP_CONSUMER_VENDOR_KEYS },
+	{ /* Dinovo Edge (Bluetooth-receiver in HID proxy mode) */
+	  LDJ_DEVICE(0xb309),
+	  .driver_data = HIDPP_QUIRK_HIDPP_CONSUMER_VENDOR_KEYS },
 	{ /* Keyboard MX5500 (Bluetooth-receiver in HID proxy mode) */
 	  LDJ_DEVICE(0xb30b),
 	  .driver_data = HIDPP_QUIRK_HIDPP_CONSUMER_VENDOR_KEYS },
 	{ /* MX5000 keyboard over Bluetooth */
 	  HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_LOGITECH, 0xb305),
 	  .driver_data = HIDPP_QUIRK_HIDPP_CONSUMER_VENDOR_KEYS },
+	{ /* Dinovo Edge keyboard over Bluetooth */
+	  HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_LOGITECH, 0xb309),
+	  .driver_data = HIDPP_QUIRK_HIDPP_CONSUMER_VENDOR_KEYS },
 	{ /* MX5500 keyboard over Bluetooth */
 	  HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_LOGITECH, 0xb30b),
 	  .driver_data = HIDPP_QUIRK_HIDPP_CONSUMER_VENDOR_KEYS },

drivers/hid/hid-mcp2221.c+39−9

 	MCP2221_ALT_F_NOT_GPIOD = 0xEF,
 };
+/* MCP GPIO direction encoding */
+enum {
+	MCP2221_DIR_OUT = 0x00,
+	MCP2221_DIR_IN = 0x01,
+};
+#define MCP_NGPIO	4
+/* MCP GPIO set command layout */
+struct mcp_set_gpio {
+	u8 cmd;
+	u8 dummy;
+	struct {
+		u8 change_value;
+		u8 value;
+		u8 change_direction;
+		u8 direction;
+	} gpio[MCP_NGPIO];
+} __packed;
+/* MCP GPIO get command layout */
+struct mcp_get_gpio {
+	u8 cmd;
+	u8 dummy;
+	struct {
+		u8 direction;
+		u8 value;
+	} gpio[MCP_NGPIO];
+} __packed;
 /*
  * There is no way to distinguish responses. Therefore next command
  * is sent only after response to previous has been received. Mutex
 	mcp->txbuf[0] = MCP2221_GPIO_GET;
-	mcp->gp_idx = (offset + 1) * 2;
+	mcp->gp_idx = offsetof(struct mcp_get_gpio, gpio[offset].value);
 	mutex_lock(&mcp->lock);
 	ret = mcp_send_data_req_status(mcp, mcp->txbuf, 1);
 	memset(mcp->txbuf, 0, 18);
 	mcp->txbuf[0] = MCP2221_GPIO_SET;
-	mcp->gp_idx = ((offset + 1) * 4) - 1;
+	mcp->gp_idx = offsetof(struct mcp_set_gpio, gpio[offset].value);
 	mcp->txbuf[mcp->gp_idx - 1] = 1;
 	mcp->txbuf[mcp->gp_idx] = !!value;
 	memset(mcp->txbuf, 0, 18);
 	mcp->txbuf[0] = MCP2221_GPIO_SET;
-	mcp->gp_idx = (offset + 1) * 5;
+	mcp->gp_idx = offsetof(struct mcp_set_gpio, gpio[offset].direction);
 	mcp->txbuf[mcp->gp_idx - 1] = 1;
 	mcp->txbuf[mcp->gp_idx] = val;
 	struct mcp2221 *mcp = gpiochip_get_data(gc);
 	mutex_lock(&mcp->lock);
-	ret = mcp_gpio_dir_set(mcp, offset, 0);
+	ret = mcp_gpio_dir_set(mcp, offset, MCP2221_DIR_IN);
 	mutex_unlock(&mcp->lock);
 	return ret;
 	struct mcp2221 *mcp = gpiochip_get_data(gc);
 	mutex_lock(&mcp->lock);
-	ret = mcp_gpio_dir_set(mcp, offset, 1);
+	ret = mcp_gpio_dir_set(mcp, offset, MCP2221_DIR_OUT);
 	mutex_unlock(&mcp->lock);
 	/* Can't configure as output, bailout early */
 	mcp->txbuf[0] = MCP2221_GPIO_GET;
-	mcp->gp_idx = (offset + 1) * 2;
+	mcp->gp_idx = offsetof(struct mcp_get_gpio, gpio[offset].direction);
 	mutex_lock(&mcp->lock);
 	ret = mcp_send_data_req_status(mcp, mcp->txbuf, 1);
 	if (ret)
 		return ret;
-	if (mcp->gpio_dir)
+	if (mcp->gpio_dir == MCP2221_DIR_IN)
 		return GPIO_LINE_DIRECTION_IN;
 	return GPIO_LINE_DIRECTION_OUT;
 				mcp->status = -ENOENT;
 			} else {
 				mcp->status = !!data[mcp->gp_idx];
-				mcp->gpio_dir = !!data[mcp->gp_idx + 1];
+				mcp->gpio_dir = data[mcp->gp_idx + 1];
 			}
 			break;
 		default:
 	mcp->gc->get_direction = mcp_gpio_get_direction;
 	mcp->gc->set = mcp_gpio_set;
 	mcp->gc->get = mcp_gpio_get;
-	mcp->gc->ngpio = 4;
+	mcp->gc->ngpio = MCP_NGPIO;
 	mcp->gc->base = -1;
 	mcp->gc->can_sleep = 1;
 	mcp->gc->parent = &hdev->dev;

drivers/hid/hid-quirks.c+5−0

 	{ HID_USB_DEVICE(USB_VENDOR_ID_FORMOSA, USB_DEVICE_ID_FORMOSA_IR_RECEIVER), HID_QUIRK_NO_INIT_REPORTS },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_FREESCALE, USB_DEVICE_ID_FREESCALE_MX28), HID_QUIRK_NOGET },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_FUTABA, USB_DEVICE_ID_LED_DISPLAY), HID_QUIRK_NO_INIT_REPORTS },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_GREENASIA, USB_DEVICE_ID_GREENASIA_DUAL_SAT_ADAPTOR), HID_QUIRK_MULTI_INPUT },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_GREENASIA, USB_DEVICE_ID_GREENASIA_DUAL_USB_JOYPAD), HID_QUIRK_MULTI_INPUT },
+	{ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_GAMEVICE, USB_DEVICE_ID_GAMEVICE_GV186),
+		HID_QUIRK_INCREMENT_USAGE_ON_DUPLICATE },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_GAMEVICE, USB_DEVICE_ID_GAMEVICE_KISHI),
+		HID_QUIRK_INCREMENT_USAGE_ON_DUPLICATE },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_HAPP, USB_DEVICE_ID_UGCI_DRIVING), HID_QUIRK_BADPAD | HID_QUIRK_MULTI_INPUT },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_HAPP, USB_DEVICE_ID_UGCI_FIGHTING), HID_QUIRK_BADPAD | HID_QUIRK_MULTI_INPUT },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_HAPP, USB_DEVICE_ID_UGCI_FLYING), HID_QUIRK_BADPAD | HID_QUIRK_MULTI_INPUT },

drivers/hid/hid-sensor-hub.c+2−1

@@ -483,7 +483,8 @@ static int sensor_hub_raw_event(struct hid_device *hdev, · 482 unmodified lines
483	return 1;	483	return 1;
484		484
485	ptr = raw_data;	485	ptr = raw_data;
486	ptr++; /* Skip report id */	486	if (report->id)
		487	ptr++; /* Skip report id */
487		488
488	spin_lock_irqsave(&pdata->lock, flags);	489	spin_lock_irqsave(&pdata->lock, flags);
489		490

drivers/hid/hid-uclogic-core.c+2−0

 				USB_DEVICE_ID_UCLOGIC_DRAWIMAGE_G3) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_UGTIZER,
 				USB_DEVICE_ID_UGTIZER_TABLET_GP0610) },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_UGTIZER,
+				USB_DEVICE_ID_UGTIZER_TABLET_GT5040) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_UGEE,
 				USB_DEVICE_ID_UGEE_TABLET_G5) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_UGEE,

drivers/hid/hid-uclogic-params.c+2−0

 		break;
 	case VID_PID(USB_VENDOR_ID_UGTIZER,
 		     USB_DEVICE_ID_UGTIZER_TABLET_GP0610):
+	case VID_PID(USB_VENDOR_ID_UGTIZER,
+		     USB_DEVICE_ID_UGTIZER_TABLET_GT5040):
 	case VID_PID(USB_VENDOR_ID_UGEE,
 		     USB_DEVICE_ID_UGEE_XPPEN_TABLET_G540):
 	case VID_PID(USB_VENDOR_ID_UGEE,

drivers/hid/i2c-hid/i2c-hid-core.c+9−0

 	}
 }
+static void i2c_hid_acpi_shutdown(struct device *dev)
+{
+	acpi_device_set_power(ACPI_COMPANION(dev), ACPI_STATE_D3_COLD);
+}
 static const struct acpi_device_id i2c_hid_acpi_match[] = {
 	{"ACPI0C50", 0 },
 	{"PNP0C50", 0 },
 static inline void i2c_hid_acpi_fix_up_power(struct device *dev) {}
 static inline void i2c_hid_acpi_enable_wakeup(struct device *dev) {}
+static inline void i2c_hid_acpi_shutdown(struct device *dev) {}
 #endif
 #ifdef CONFIG_OF
 	i2c_hid_set_power(client, I2C_HID_PWR_SLEEP);
 	free_irq(client->irq, ihid);
+	i2c_hid_acpi_shutdown(&client->dev);
 }
 #ifdef CONFIG_PM_SLEEP

drivers/iio/accel/kxcjk-1013.c+46−5

 	KX_MAX_CHIPS /* this must be last */
 };
+enum kx_acpi_type {
+	ACPI_GENERIC,
+	ACPI_SMO8500,
+	ACPI_KIOX010A,
+};
 struct kxcjk1013_data {
 	struct i2c_client *client;
 	struct iio_trigger *dready_trig;
 	bool motion_trigger_on;
 	int64_t timestamp;
 	enum kx_chipset chipset;
-	bool is_smo8500_device;
+	enum kx_acpi_type acpi_type;
 };
 enum kxcjk1013_axis {
 			      {19163, 1, 0},
 			      {38326, 0, 1} };
+#ifdef CONFIG_ACPI
+enum kiox010a_fn_index {
+	KIOX010A_SET_LAPTOP_MODE = 1,
+	KIOX010A_SET_TABLET_MODE = 2,
+};
+static int kiox010a_dsm(struct device *dev, int fn_index)
+{
+	acpi_handle handle = ACPI_HANDLE(dev);
+	guid_t kiox010a_dsm_guid;
+	union acpi_object *obj;
+	if (!handle)
+		return -ENODEV;
+	guid_parse("1f339696-d475-4e26-8cad-2e9f8e6d7a91", &kiox010a_dsm_guid);
+	obj = acpi_evaluate_dsm(handle, &kiox010a_dsm_guid, 1, fn_index, NULL);
+	if (!obj)
+		return -EIO;
+	ACPI_FREE(obj);
+	return 0;
+}
+#endif
 static int kxcjk1013_set_mode(struct kxcjk1013_data *data,
 			      enum kxcjk1013_mode mode)
 {
 {
 	int ret;
+#ifdef CONFIG_ACPI
+	if (data->acpi_type == ACPI_KIOX010A) {
+		/* Make sure the kbd and touchpad on 2-in-1s using 2 KXCJ91008-s work */
+		kiox010a_dsm(&data->client->dev, KIOX010A_SET_LAPTOP_MODE);
+	}
+#endif
 	ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_WHO_AM_I);
 	if (ret < 0) {
 		dev_err(&data->client->dev, "Error reading who_am_i\n");
 static const char *kxcjk1013_match_acpi_device(struct device *dev,
 					       enum kx_chipset *chipset,
-					       bool *is_smo8500_device)
+					       enum kx_acpi_type *acpi_type)
 {
 	const struct acpi_device_id *id;
 		return NULL;
 	if (strcmp(id->id, "SMO8500") == 0)
-		*is_smo8500_device = true;
+		*acpi_type = ACPI_SMO8500;
+	else if (strcmp(id->id, "KIOX010A") == 0)
+		*acpi_type = ACPI_KIOX010A;
 	*chipset = (enum kx_chipset)id->driver_data;
 	} else if (ACPI_HANDLE(&client->dev)) {
 		name = kxcjk1013_match_acpi_device(&client->dev,
 						   &data->chipset,
-						   &data->is_smo8500_device);
+						   &data->acpi_type);
 	} else
 		return -ENODEV;
 	indio_dev->modes = INDIO_DIRECT_MODE;
 	indio_dev->info = &kxcjk1013_info;
-	if (client->irq > 0 && !data->is_smo8500_device) {
+	if (client->irq > 0 && data->acpi_type != ACPI_SMO8500) {
 		ret = devm_request_threaded_irq(&client->dev, client->irq,
 						kxcjk1013_data_rdy_trig_poll,
 						kxcjk1013_event_handler,

drivers/iio/adc/ingenic-adc.c+27−7

 #define JZ4725B_ADC_BATTERY_HIGH_VREF_BITS	10
 #define JZ4740_ADC_BATTERY_HIGH_VREF		(7500 * 0.986)
 #define JZ4740_ADC_BATTERY_HIGH_VREF_BITS	12
-#define JZ4770_ADC_BATTERY_VREF			6600
+#define JZ4770_ADC_BATTERY_VREF			1200
 #define JZ4770_ADC_BATTERY_VREF_BITS		12
 #define JZ_ADC_IRQ_AUX			BIT(0)
 	mutex_unlock(&adc->lock);
 }
-static void ingenic_adc_enable(struct ingenic_adc *adc,
+static void ingenic_adc_enable_unlocked(struct ingenic_adc *adc,
-			       int engine,
+					int engine,
-			       bool enabled)
+					bool enabled)
 {
 	u8 val;
-	mutex_lock(&adc->lock);
 	val = readb(adc->base + JZ_ADC_REG_ENABLE);
 	if (enabled)
 		val &= ~BIT(engine);
 	writeb(val, adc->base + JZ_ADC_REG_ENABLE);
+}
+static void ingenic_adc_enable(struct ingenic_adc *adc,
+			       int engine,
+			       bool enabled)
+{
+	mutex_lock(&adc->lock);
+	ingenic_adc_enable_unlocked(adc, engine, enabled);
 	mutex_unlock(&adc->lock);
 }
 static int ingenic_adc_capture(struct ingenic_adc *adc,
 			       int engine)
 {
+	u32 cfg;
 	u8 val;
 	int ret;
-	ingenic_adc_enable(adc, engine, true);
+	/*
+	 * Disable CMD_SEL temporarily, because it causes wrong VBAT readings,
+	 * probably due to the switch of VREF. We must keep the lock here to
+	 * avoid races with the buffer enable/disable functions.
+	 */
+	mutex_lock(&adc->lock);
+	cfg = readl(adc->base + JZ_ADC_REG_CFG);
+	writel(cfg & ~JZ_ADC_REG_CFG_CMD_SEL, adc->base + JZ_ADC_REG_CFG);
+	ingenic_adc_enable_unlocked(adc, engine, true);
 	ret = readb_poll_timeout(adc->base + JZ_ADC_REG_ENABLE, val,
 				 !(val & BIT(engine)), 250, 1000);
 	if (ret)
-		ingenic_adc_enable(adc, engine, false);
+		ingenic_adc_enable_unlocked(adc, engine, false);
+	writel(cfg, adc->base + JZ_ADC_REG_CFG);
+	mutex_unlock(&adc->lock);
 	return ret;
 }

drivers/iio/adc/mt6577_auxadc.c+4−2

 #include <linux/err.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
-#include <linux/of.h>
+#include <linux/mod_devicetable.h>
-#include <linux/of_device.h>
 #include <linux/platform_device.h>
+#include <linux/property.h>
 #include <linux/iopoll.h>
 #include <linux/io.h>
 #include <linux/iio/iio.h>
 		goto err_disable_clk;
 	}
+	adc_dev->dev_comp = device_get_match_data(&pdev->dev);
 	mutex_init(&adc_dev->lock);
 	mt6577_auxadc_mod_reg(adc_dev->reg_base + MT6577_AUXADC_MISC,

drivers/iio/adc/stm32-adc-core.c+17−24

@@ -41,18 +41,16 @@ · 40 unmodified lines
41	* struct stm32_adc_common_regs - stm32 common registers	41	* struct stm32_adc_common_regs - stm32 common registers
42	* @csr: common status register offset	42	* @csr: common status register offset
43	* @ccr: common control register offset	43	* @ccr: common control register offset
44	* @eoc1_msk: adc1 end of conversion flag in @csr	44	* @eoc_msk: array of eoc (end of conversion flag) masks in csr for adc1..n
45	* @eoc2_msk: adc2 end of conversion flag in @csr	45	* @ovr_msk: array of ovr (overrun flag) masks in csr for adc1..n
46	* @eoc3_msk: adc3 end of conversion flag in @csr
47	* @ier: interrupt enable register offset for each adc	46	* @ier: interrupt enable register offset for each adc
48	* @eocie_msk: end of conversion interrupt enable mask in @ier	47	* @eocie_msk: end of conversion interrupt enable mask in @ier
49	*/	48	*/
50	struct stm32_adc_common_regs {	49	struct stm32_adc_common_regs {
51	u32 csr;	50	u32 csr;
52	u32 ccr;	51	u32 ccr;
53	u32 eoc1_msk;	52	u32 eoc_msk[STM32_ADC_MAX_ADCS];
54	u32 eoc2_msk;	53	u32 ovr_msk[STM32_ADC_MAX_ADCS];
55	u32 eoc3_msk;
56	u32 ier;	54	u32 ier;
57	u32 eocie_msk;	55	u32 eocie_msk;
58	};	56	};
@@ -282,21 +280,20 @@ out: · 223 unmodified lines
282	static const struct stm32_adc_common_regs stm32f4_adc_common_regs = {	280	static const struct stm32_adc_common_regs stm32f4_adc_common_regs = {
283	.csr = STM32F4_ADC_CSR,	281	.csr = STM32F4_ADC_CSR,
284	.ccr = STM32F4_ADC_CCR,	282	.ccr = STM32F4_ADC_CCR,
285	.eoc1_msk = STM32F4_EOC1 \| STM32F4_OVR1,	283	.eoc_msk = { STM32F4_EOC1, STM32F4_EOC2, STM32F4_EOC3},
286	.eoc2_msk = STM32F4_EOC2 \| STM32F4_OVR2,	284	.ovr_msk = { STM32F4_OVR1, STM32F4_OVR2, STM32F4_OVR3},
287	.eoc3_msk = STM32F4_EOC3 \| STM32F4_OVR3,
288	.ier = STM32F4_ADC_CR1,	285	.ier = STM32F4_ADC_CR1,
289	.eocie_msk = STM32F4_EOCIE \| STM32F4_OVRIE,	286	.eocie_msk = STM32F4_EOCIE,
290	};	287	};
291		288
292	/* STM32H7 common registers definitions */	289	/* STM32H7 common registers definitions */
293	static const struct stm32_adc_common_regs stm32h7_adc_common_regs = {	290	static const struct stm32_adc_common_regs stm32h7_adc_common_regs = {
294	.csr = STM32H7_ADC_CSR,	291	.csr = STM32H7_ADC_CSR,
295	.ccr = STM32H7_ADC_CCR,	292	.ccr = STM32H7_ADC_CCR,
296	.eoc1_msk = STM32H7_EOC_MST \| STM32H7_OVR_MST,	293	.eoc_msk = { STM32H7_EOC_MST, STM32H7_EOC_SLV},
297	.eoc2_msk = STM32H7_EOC_SLV \| STM32H7_OVR_SLV,	294	.ovr_msk = { STM32H7_OVR_MST, STM32H7_OVR_SLV},
298	.ier = STM32H7_ADC_IER,	295	.ier = STM32H7_ADC_IER,
299	.eocie_msk = STM32H7_EOCIE \| STM32H7_OVRIE,	296	.eocie_msk = STM32H7_EOCIE,
300	};	297	};
301		298
302	static const unsigned int stm32_adc_offset[STM32_ADC_MAX_ADCS] = {	299	static const unsigned int stm32_adc_offset[STM32_ADC_MAX_ADCS] = {
@@ -318,6 +315,7 @@ static void stm32_adc_irq_handler(struct irq_desc *desc) · 15 unmodified lines
318	{	315	{
319	struct stm32_adc_priv *priv = irq_desc_get_handler_data(desc);	316	struct stm32_adc_priv *priv = irq_desc_get_handler_data(desc);
320	struct irq_chip *chip = irq_desc_get_chip(desc);	317	struct irq_chip *chip = irq_desc_get_chip(desc);
		318	int i;
321	u32 status;	319	u32 status;
322		320
323	chained_irq_enter(chip, desc);	321	chained_irq_enter(chip, desc);
@@ -335,17 +333,12 @@ static void stm32_adc_irq_handler(struct irq_desc *desc) · 11 unmodified lines
335	* before invoking the interrupt handler (e.g. call ISR only for	333	* before invoking the interrupt handler (e.g. call ISR only for
336	* IRQ-enabled ADCs).	334	* IRQ-enabled ADCs).
337	*/	335	*/
338	if (status & priv->cfg->regs->eoc1_msk &&	336	for (i = 0; i < priv->cfg->num_irqs; i++) {
339	stm32_adc_eoc_enabled(priv, 0))	337	if ((status & priv->cfg->regs->eoc_msk[i] &&
340	generic_handle_irq(irq_find_mapping(priv->domain, 0));	338	stm32_adc_eoc_enabled(priv, i)) \|\|
341		339	(status & priv->cfg->regs->ovr_msk[i]))
342	if (status & priv->cfg->regs->eoc2_msk &&	340	generic_handle_irq(irq_find_mapping(priv->domain, i));
343	stm32_adc_eoc_enabled(priv, 1))	341	}
344	generic_handle_irq(irq_find_mapping(priv->domain, 1));
345
346	if (status & priv->cfg->regs->eoc3_msk &&
347	stm32_adc_eoc_enabled(priv, 2))
348	generic_handle_irq(irq_find_mapping(priv->domain, 2));
349		342
350	chained_irq_exit(chip, desc);	343	chained_irq_exit(chip, desc);
351	};	344	};

drivers/iio/adc/stm32-adc.c+48−2

  * @start_conv:		routine to start conversions
  * @stop_conv:		routine to stop conversions
  * @unprepare:		optional unprepare routine (disable, power-down)
+ * @irq_clear:		routine to clear irqs
  * @smp_cycles:		programmable sampling time (ADC clock cycles)
  */
 struct stm32_adc_cfg {
 	void (*start_conv)(struct iio_dev *, bool dma);
 	void (*stop_conv)(struct iio_dev *);
 	void (*unprepare)(struct iio_dev *);
+	void (*irq_clear)(struct iio_dev *indio_dev, u32 msk);
 	const unsigned int *smp_cycles;
 };
 			   STM32F4_ADON | STM32F4_DMA | STM32F4_DDS);
 }
+static void stm32f4_adc_irq_clear(struct iio_dev *indio_dev, u32 msk)
+{
+	struct stm32_adc *adc = iio_priv(indio_dev);
+	stm32_adc_clr_bits(adc, adc->cfg->regs->isr_eoc.reg, msk);
+}
 static void stm32h7_adc_start_conv(struct iio_dev *indio_dev, bool dma)
 {
 	struct stm32_adc *adc = iio_priv(indio_dev);
 	stm32_adc_clr_bits(adc, STM32H7_ADC_CFGR, STM32H7_DMNGT_MASK);
 }
+static void stm32h7_adc_irq_clear(struct iio_dev *indio_dev, u32 msk)
+{
+	struct stm32_adc *adc = iio_priv(indio_dev);
+	/* On STM32H7 IRQs are cleared by writing 1 into ISR register */
+	stm32_adc_set_bits(adc, adc->cfg->regs->isr_eoc.reg, msk);
+}
 static int stm32h7_adc_exit_pwr_down(struct iio_dev *indio_dev)
 {
 	struct stm32_adc *adc = iio_priv(indio_dev);
 	}
 }
+static void stm32_adc_irq_clear(struct iio_dev *indio_dev, u32 msk)
+{
+	struct stm32_adc *adc = iio_priv(indio_dev);
+	adc->cfg->irq_clear(indio_dev, msk);
+}
 static irqreturn_t stm32_adc_threaded_isr(int irq, void *data)
 {
 	struct iio_dev *indio_dev = data;
 	struct stm32_adc *adc = iio_priv(indio_dev);
 	const struct stm32_adc_regspec *regs = adc->cfg->regs;
 	u32 status = stm32_adc_readl(adc, regs->isr_eoc.reg);
+	u32 mask = stm32_adc_readl(adc, regs->ier_eoc.reg);
-	if (status & regs->isr_ovr.mask)
+	/* Check ovr status right now, as ovr mask should be already disabled */
+	if (status & regs->isr_ovr.mask) {
+		/*
+		 * Clear ovr bit to avoid subsequent calls to IRQ handler.
+		 * This requires to stop ADC first. OVR bit state in ISR,
+		 * is propaged to CSR register by hardware.
+		 */
+		adc->cfg->stop_conv(indio_dev);
+		stm32_adc_irq_clear(indio_dev, regs->isr_ovr.mask);
 		dev_err(&indio_dev->dev, "Overrun, stopping: restart needed\n");
+		return IRQ_HANDLED;
+	}
-	return IRQ_HANDLED;
+	if (!(status & mask))
+		dev_err_ratelimited(&indio_dev->dev,
+				    "Unexpected IRQ: IER=0x%08x, ISR=0x%08x\n",
+				    mask, status);
+	return IRQ_NONE;
 }
 static irqreturn_t stm32_adc_isr(int irq, void *data)
 	struct stm32_adc *adc = iio_priv(indio_dev);
 	const struct stm32_adc_regspec *regs = adc->cfg->regs;
 	u32 status = stm32_adc_readl(adc, regs->isr_eoc.reg);
+	u32 mask = stm32_adc_readl(adc, regs->ier_eoc.reg);
+	if (!(status & mask))
+		return IRQ_WAKE_THREAD;
 	if (status & regs->isr_ovr.mask) {
 		/*
 	.start_conv = stm32f4_adc_start_conv,
 	.stop_conv = stm32f4_adc_stop_conv,
 	.smp_cycles = stm32f4_adc_smp_cycles,
+	.irq_clear = stm32f4_adc_irq_clear,
 };
 static const struct stm32_adc_cfg stm32h7_adc_cfg = {
 	.prepare = stm32h7_adc_prepare,
 	.unprepare = stm32h7_adc_unprepare,
 	.smp_cycles = stm32h7_adc_smp_cycles,
+	.irq_clear = stm32h7_adc_irq_clear,
 };
 static const struct stm32_adc_cfg stm32mp1_adc_cfg = {
 	.prepare = stm32h7_adc_prepare,
 	.unprepare = stm32h7_adc_unprepare,
 	.smp_cycles = stm32h7_adc_smp_cycles,
+	.irq_clear = stm32h7_adc_irq_clear,
 };
 static const struct of_device_id stm32_adc_of_match[] = {

drivers/iio/common/cros_ec_sensors/cros_ec_sensors_core.c+11−5

 	struct cros_ec_sensorhub *sensor_hub = dev_get_drvdata(dev->parent);
 	struct cros_ec_dev *ec = sensor_hub->ec;
 	struct cros_ec_sensor_platform *sensor_platform = dev_get_platdata(dev);
-	u32 ver_mask;
+	u32 ver_mask, temp;
 	int frequencies[ARRAY_SIZE(state->frequencies) / 2] = { 0 };
 	int ret, i;
 						 &frequencies[2],
 						 &state->fifo_max_event_count);
 		} else {
-			frequencies[1] = state->resp->info_3.min_frequency;
+			if (state->resp->info_3.max_frequency == 0) {
-			frequencies[2] = state->resp->info_3.max_frequency;
+				get_default_min_max_freq(state->resp->info.type,
-			state->fifo_max_event_count =
+							 &frequencies[1],
-			    state->resp->info_3.fifo_max_event_count;
+							 &frequencies[2],
+							 &temp);
+			} else {
+				frequencies[1] = state->resp->info_3.min_frequency;
+				frequencies[2] = state->resp->info_3.max_frequency;
+			}
+			state->fifo_max_event_count = state->resp->info_3.fifo_max_event_count;
 		}
 		for (i = 0; i < ARRAY_SIZE(frequencies); i++) {
 			state->frequencies[2 * i] = frequencies[i] / 1000;

drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_shub.c+4−2

 static void st_lsm6dsx_shub_wait_complete(struct st_lsm6dsx_hw *hw)
 {
 	struct st_lsm6dsx_sensor *sensor;
-	u32 odr;
+	u32 odr, timeout;
 	sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]);
 	odr = (hw->enable_mask & BIT(ST_LSM6DSX_ID_ACC)) ? sensor->odr : 12500;
-	msleep((2000000U / odr) + 1);
+	/* set 10ms as minimum timeout for i2c slave configuration */
+	timeout = max_t(u32, 2000000U / odr + 1, 10);
+	msleep(timeout);
 }
 /*

drivers/iio/light/Kconfig+1−0

@@ -544,6 +544,7 @@ config VCNL4000 · 543 unmodified lines
544		544
545	config VCNL4035	545	config VCNL4035
546	tristate "VCNL4035 combined ALS and proximity sensor"	546	tristate "VCNL4035 combined ALS and proximity sensor"
		547	select IIO_BUFFER
547	select IIO_TRIGGERED_BUFFER	548	select IIO_TRIGGERED_BUFFER
548	select REGMAP_I2C	549	select REGMAP_I2C
549	depends on I2C	550	depends on I2C

drivers/infiniband/hw/hfi1/file_ops.c+1−3

 /*
+ * Copyright(c) 2020 Cornelis Networks, Inc.
  * Copyright(c) 2015-2020 Intel Corporation.
  *
  * This file is provided under a dual BSD/GPLv2 license.  When using or
 	spin_lock_init(&fd->tid_lock);
 	spin_lock_init(&fd->invalid_lock);
 	fd->rec_cpu_num = -1; /* no cpu affinity by default */
-	fd->mm = current->mm;
-	mmgrab(fd->mm);
 	fd->dd = dd;
 	fp->private_data = fd;
 	return 0;
 	deallocate_ctxt(uctxt);
 done:
-	mmdrop(fdata->mm);
 	if (atomic_dec_and_test(&dd->user_refcount))
 		complete(&dd->user_comp);

drivers/infiniband/hw/hfi1/hfi.h+1−1

 #ifndef _HFI1_KERNEL_H
 #define _HFI1_KERNEL_H
 /*
+ * Copyright(c) 2020 Cornelis Networks, Inc.
  * Copyright(c) 2015-2020 Intel Corporation.
  *
  * This file is provided under a dual BSD/GPLv2 license.  When using or
 	u32 invalid_tid_idx;
 	/* protect invalid_tids array and invalid_tid_idx */
 	spinlock_t invalid_lock;
-	struct mm_struct *mm;
 };
 extern struct xarray hfi1_dev_table;

drivers/infiniband/hw/hfi1/mmu_rb.c+35−33

@@ -1,4 +1,5 @@
1	/*	1	/*
		2	* Copyright(c) 2020 Cornelis Networks, Inc.
2	* Copyright(c) 2016 - 2017 Intel Corporation.	3	* Copyright(c) 2016 - 2017 Intel Corporation.
3	*	4	*
4	* This file is provided under a dual BSD/GPLv2 license. When using or	5	* This file is provided under a dual BSD/GPLv2 license. When using or
@@ -48,23 +49,11 @@ · 43 unmodified lines
48	#include <linux/rculist.h>	49	#include <linux/rculist.h>
49	#include <linux/mmu_notifier.h>	50	#include <linux/mmu_notifier.h>
50	#include <linux/interval_tree_generic.h>	51	#include <linux/interval_tree_generic.h>
		52	#include <linux/sched/mm.h>
51		53
52	#include "mmu_rb.h"	54	#include "mmu_rb.h"
53	#include "trace.h"	55	#include "trace.h"
54		56
55	struct mmu_rb_handler {
56	struct mmu_notifier mn;
57	struct rb_root_cached root;
58	void *ops_arg;
59	spinlock_t lock; /* protect the RB tree */
60	struct mmu_rb_ops *ops;
61	struct mm_struct *mm;
62	struct list_head lru_list;
63	struct work_struct del_work;
64	struct list_head del_list;
65	struct workqueue_struct *wq;
66	};
67
68	static unsigned long mmu_node_start(struct mmu_rb_node *);	57	static unsigned long mmu_node_start(struct mmu_rb_node *);
69	static unsigned long mmu_node_last(struct mmu_rb_node *);	58	static unsigned long mmu_node_last(struct mmu_rb_node *);
70	static int mmu_notifier_range_start(struct mmu_notifier *,	59	static int mmu_notifier_range_start(struct mmu_notifier *,
@@ -92,37 +81,36 @@ static unsigned long mmu_node_last(struct mmu_rb_node *node) · 21 unmodified lines
92	return PAGE_ALIGN(node->addr + node->len) - 1;	81	return PAGE_ALIGN(node->addr + node->len) - 1;
93	}	82	}
94		83
95	int hfi1_mmu_rb_register(void ops_arg, struct mm_struct mm,	84	int hfi1_mmu_rb_register(void *ops_arg,
96	struct mmu_rb_ops *ops,	85	struct mmu_rb_ops *ops,
97	struct workqueue_struct *wq,	86	struct workqueue_struct *wq,
98	struct mmu_rb_handler **handler)	87	struct mmu_rb_handler **handler)
99	{	88	{
100	struct mmu_rb_handler *handlr;	89	struct mmu_rb_handler *h;
101	int ret;	90	int ret;
102		91
103	handlr = kmalloc(sizeof(*handlr), GFP_KERNEL);	92	h = kmalloc(sizeof(*h), GFP_KERNEL);
104	if (!handlr)	93	if (!h)
105	return -ENOMEM;	94	return -ENOMEM;
106		95
107	handlr->root = RB_ROOT_CACHED;	96	h->root = RB_ROOT_CACHED;
108	handlr->ops = ops;	97	h->ops = ops;
109	handlr->ops_arg = ops_arg;	98	h->ops_arg = ops_arg;
110	INIT_HLIST_NODE(&handlr->mn.hlist);	99	INIT_HLIST_NODE(&h->mn.hlist);
111	spin_lock_init(&handlr->lock);	100	spin_lock_init(&h->lock);
112	handlr->mn.ops = &mn_opts;	101	h->mn.ops = &mn_opts;
113	handlr->mm = mm;	102	INIT_WORK(&h->del_work, handle_remove);
114	INIT_WORK(&handlr->del_work, handle_remove);	103	INIT_LIST_HEAD(&h->del_list);
115	INIT_LIST_HEAD(&handlr->del_list);	104	INIT_LIST_HEAD(&h->lru_list);
116	INIT_LIST_HEAD(&handlr->lru_list);	105	h->wq = wq;
117	handlr->wq = wq;	106
118		107	ret = mmu_notifier_register(&h->mn, current->mm);
119	ret = mmu_notifier_register(&handlr->mn, handlr->mm);
120	if (ret) {	108	if (ret) {
121	kfree(handlr);	109	kfree(h);
122	return ret;	110	return ret;
123	}	111	}
124		112
125	*handler = handlr;	113	*handler = h;
126	return 0;	114	return 0;
127	}	115	}
128		116
@@ -134,7 +122,7 @@ void hfi1_mmu_rb_unregister(struct mmu_rb_handler *handler) · 5 unmodified lines
134	struct list_head del_list;	122	struct list_head del_list;
135		123
136	/* Unregister first so we don't get any more notifications. */	124	/* Unregister first so we don't get any more notifications. */
137	mmu_notifier_unregister(&handler->mn, handler->mm);	125	mmu_notifier_unregister(&handler->mn, handler->mn.mm);
138		126
139	/*	127	/*
140	* Make sure the wq delete handler is finished running. It will not	128	* Make sure the wq delete handler is finished running. It will not
@@ -166,6 +154,10 @@ int hfi1_mmu_rb_insert(struct mmu_rb_handler *handler, · 25 unmodified lines
166	int ret = 0;	154	int ret = 0;
167		155
168	trace_hfi1_mmu_rb_insert(mnode->addr, mnode->len);	156	trace_hfi1_mmu_rb_insert(mnode->addr, mnode->len);
		157
		158	if (current->mm != handler->mn.mm)
		159	return -EPERM;
		160
169	spin_lock_irqsave(&handler->lock, flags);	161	spin_lock_irqsave(&handler->lock, flags);
170	node = __mmu_rb_search(handler, mnode->addr, mnode->len);	162	node = __mmu_rb_search(handler, mnode->addr, mnode->len);
171	if (node) {	163	if (node) {
@@ -180,6 +172,7 @@ int hfi1_mmu_rb_insert(struct mmu_rb_handler *handler, · 8 unmodified lines
180	__mmu_int_rb_remove(mnode, &handler->root);	172	__mmu_int_rb_remove(mnode, &handler->root);
181	list_del(&mnode->list); /* remove from LRU list */	173	list_del(&mnode->list); /* remove from LRU list */
182	}	174	}
		175	mnode->handler = handler;
183	unlock:	176	unlock:
184	spin_unlock_irqrestore(&handler->lock, flags);	177	spin_unlock_irqrestore(&handler->lock, flags);
185	return ret;	178	return ret;
@@ -217,6 +210,9 @@ bool hfi1_mmu_rb_remove_unless_exact(struct mmu_rb_handler *handler, · 31 unmodified lines
217	unsigned long flags;	210	unsigned long flags;
218	bool ret = false;	211	bool ret = false;
219		212
		213	if (current->mm != handler->mn.mm)
		214	return ret;
		215
220	spin_lock_irqsave(&handler->lock, flags);	216	spin_lock_irqsave(&handler->lock, flags);
221	node = __mmu_rb_search(handler, addr, len);	217	node = __mmu_rb_search(handler, addr, len);
222	if (node) {	218	if (node) {
@@ -239,6 +235,9 @@ void hfi1_mmu_rb_evict(struct mmu_rb_handler handler, void evict_arg) · 16 unmodified lines
239	unsigned long flags;	235	unsigned long flags;
240	bool stop = false;	236	bool stop = false;
241		237
		238	if (current->mm != handler->mn.mm)
		239	return;
		240
242	INIT_LIST_HEAD(&del_list);	241	INIT_LIST_HEAD(&del_list);
243		242
244	spin_lock_irqsave(&handler->lock, flags);	243	spin_lock_irqsave(&handler->lock, flags);
@@ -272,6 +271,9 @@ void hfi1_mmu_rb_remove(struct mmu_rb_handler *handler, · 27 unmodified lines
272	{	271	{
273	unsigned long flags;	272	unsigned long flags;
274		273
		274	if (current->mm != handler->mn.mm)
		275	return;
		276
275	/* Validity of handler and node pointers has been checked by caller. */	277	/* Validity of handler and node pointers has been checked by caller. */
276	trace_hfi1_mmu_rb_remove(node->addr, node->len);	278	trace_hfi1_mmu_rb_remove(node->addr, node->len);
277	spin_lock_irqsave(&handler->lock, flags);	279	spin_lock_irqsave(&handler->lock, flags);

drivers/infiniband/hw/hfi1/mmu_rb.h+15−1

 /*
+ * Copyright(c) 2020 Cornelis Networks, Inc.
  * Copyright(c) 2016 Intel Corporation.
  *
  * This file is provided under a dual BSD/GPLv2 license.  When using or
 	unsigned long len;
 	unsigned long __last;
 	struct rb_node node;
+	struct mmu_rb_handler *handler;
 	struct list_head list;
 };
 		     void *evict_arg, bool *stop);
 };
-int hfi1_mmu_rb_register(void *ops_arg, struct mm_struct *mm,
+struct mmu_rb_handler {
+	struct mmu_notifier mn;
+	struct rb_root_cached root;
+	void *ops_arg;
+	spinlock_t lock;        /* protect the RB tree */
+	struct mmu_rb_ops *ops;
+	struct list_head lru_list;
+	struct work_struct del_work;
+	struct list_head del_list;
+	struct workqueue_struct *wq;
+};
+int hfi1_mmu_rb_register(void *ops_arg,
 			 struct mmu_rb_ops *ops,
 			 struct workqueue_struct *wq,
 			 struct mmu_rb_handler **handler);

drivers/infiniband/hw/hfi1/user_exp_rcv.c+8−4

 /*
+ * Copyright(c) 2020 Cornelis Networks, Inc.
  * Copyright(c) 2015-2018 Intel Corporation.
  *
  * This file is provided under a dual BSD/GPLv2 license.  When using or
 {
 	struct page **pages;
 	struct hfi1_devdata *dd = fd->uctxt->dd;
+	struct mm_struct *mm;
 	if (mapped) {
 		pci_unmap_single(dd->pcidev, node->dma_addr,
 				 node->npages * PAGE_SIZE, PCI_DMA_FROMDEVICE);
 		pages = &node->pages[idx];
+		mm = mm_from_tid_node(node);
 	} else {
 		pages = &tidbuf->pages[idx];
+		mm = current->mm;
 	}
-	hfi1_release_user_pages(fd->mm, pages, npages, mapped);
+	hfi1_release_user_pages(mm, pages, npages, mapped);
 	fd->tid_n_pinned -= npages;
 }
 	 * pages, accept the amount pinned so far and program only that.
 	 * User space knows how to deal with partially programmed buffers.
 	 */
-	if (!hfi1_can_pin_pages(dd, fd->mm, fd->tid_n_pinned, npages)) {
+	if (!hfi1_can_pin_pages(dd, current->mm, fd->tid_n_pinned, npages)) {
 		kfree(pages);
 		return -ENOMEM;
 	}
-	pinned = hfi1_acquire_user_pages(fd->mm, vaddr, npages, true, pages);
+	pinned = hfi1_acquire_user_pages(current->mm, vaddr, npages, true, pages);
 	if (pinned <= 0) {
 		kfree(pages);
 		return pinned;
 	if (fd->use_mn) {
 		ret = mmu_interval_notifier_insert(
-			&node->notifier, fd->mm,
+			&node->notifier, current->mm,
 			tbuf->vaddr + (pageidx * PAGE_SIZE), npages * PAGE_SIZE,
 			&tid_mn_ops);
 		if (ret)

drivers/infiniband/hw/hfi1/user_exp_rcv.h+6−0

 #ifndef _HFI1_USER_EXP_RCV_H
 #define _HFI1_USER_EXP_RCV_H
 /*
+ * Copyright(c) 2020 - Cornelis Networks, Inc.
  * Copyright(c) 2015 - 2017 Intel Corporation.
  *
  * This file is provided under a dual BSD/GPLv2 license.  When using or
 int hfi1_user_exp_rcv_invalid(struct hfi1_filedata *fd,
 			      struct hfi1_tid_info *tinfo);
+static inline struct mm_struct *mm_from_tid_node(struct tid_rb_node *node)
+{
+	return node->notifier.mm;
+}
 #endif /* _HFI1_USER_EXP_RCV_H */

drivers/infiniband/hw/hfi1/user_sdma.c+7−6

 /*
+ * Copyright(c) 2020 - Cornelis Networks, Inc.
  * Copyright(c) 2015 - 2018 Intel Corporation.
  *
  * This file is provided under a dual BSD/GPLv2 license.  When using or
 	atomic_set(&pq->n_reqs, 0);
 	init_waitqueue_head(&pq->wait);
 	atomic_set(&pq->n_locked, 0);
-	pq->mm = fd->mm;
 	iowait_init(&pq->busy, 0, NULL, NULL, defer_packet_queue,
 		    activate_packet_queue, NULL, NULL);
 	cq->nentries = hfi1_sdma_comp_ring_size;
-	ret = hfi1_mmu_rb_register(pq, pq->mm, &sdma_rb_ops, dd->pport->hfi1_wq,
+	ret = hfi1_mmu_rb_register(pq, &sdma_rb_ops, dd->pport->hfi1_wq,
 				   &pq->handler);
 	if (ret) {
 		dd_dev_err(dd, "Failed to register with MMU %d", ret);
 	npages -= node->npages;
 retry:
-	if (!hfi1_can_pin_pages(pq->dd, pq->mm,
+	if (!hfi1_can_pin_pages(pq->dd, current->mm,
 				atomic_read(&pq->n_locked), npages)) {
 		cleared = sdma_cache_evict(pq, npages);
 		if (cleared >= npages)
 			goto retry;
 	}
-	pinned = hfi1_acquire_user_pages(pq->mm,
+	pinned = hfi1_acquire_user_pages(current->mm,
 					 ((unsigned long)iovec->iov.iov_base +
 					 (node->npages * PAGE_SIZE)), npages, 0,
 					 pages + node->npages);
 		return pinned;
 	}
 	if (pinned != npages) {
-		unpin_vector_pages(pq->mm, pages, node->npages, pinned);
+		unpin_vector_pages(current->mm, pages, node->npages, pinned);
 		return -EFAULT;
 	}
 	kfree(node->pages);
 static void unpin_sdma_pages(struct sdma_mmu_node *node)
 {
 	if (node->npages) {
-		unpin_vector_pages(node->pq->mm, node->pages, 0, node->npages);
+		unpin_vector_pages(mm_from_sdma_node(node), node->pages, 0,
+				   node->npages);
 		atomic_sub(node->npages, &node->pq->n_locked);
 	}
 }

drivers/infiniband/hw/hfi1/user_sdma.h+6−1

 #ifndef _HFI1_USER_SDMA_H
 #define _HFI1_USER_SDMA_H
 /*
+ * Copyright(c) 2020 - Cornelis Networks, Inc.
  * Copyright(c) 2015 - 2018 Intel Corporation.
  *
  * This file is provided under a dual BSD/GPLv2 license.  When using or
 	unsigned long unpinned;
 	struct mmu_rb_handler *handler;
 	atomic_t n_locked;
-	struct mm_struct *mm;
 };
 struct hfi1_user_sdma_comp_q {
 				   struct iovec *iovec, unsigned long dim,
 				   unsigned long *count);
+static inline struct mm_struct *mm_from_sdma_node(struct sdma_mmu_node *node)
+{
+	return node->rb.handler->mn.mm;
+}
 #endif /* _HFI1_USER_SDMA_H */

drivers/infiniband/hw/hns/hns_roce_hw_v2.c+5−4

 	roce_set_bit(mpt_entry->byte_8_mw_cnt_en, V2_MPT_BYTE_8_R_INV_EN_S, 1);
 	roce_set_bit(mpt_entry->byte_8_mw_cnt_en, V2_MPT_BYTE_8_L_INV_EN_S, 1);
+	roce_set_bit(mpt_entry->byte_8_mw_cnt_en, V2_MPT_BYTE_8_LW_EN_S, 1);
 	roce_set_bit(mpt_entry->byte_12_mw_pa, V2_MPT_BYTE_12_PA_S, 0);
 	roce_set_bit(mpt_entry->byte_12_mw_pa, V2_MPT_BYTE_12_MR_MW_S, 1);
 					      V2_QPC_BYTE_28_AT_M,
 					      V2_QPC_BYTE_28_AT_S);
 	qp_attr->retry_cnt = roce_get_field(context.byte_212_lsn,
-					    V2_QPC_BYTE_212_RETRY_CNT_M,
+					    V2_QPC_BYTE_212_RETRY_NUM_INIT_M,
-					    V2_QPC_BYTE_212_RETRY_CNT_S);
+					    V2_QPC_BYTE_212_RETRY_NUM_INIT_S);
 	qp_attr->rnr_retry = roce_get_field(context.byte_244_rnr_rxack,
-					    V2_QPC_BYTE_244_RNR_CNT_M,
+					    V2_QPC_BYTE_244_RNR_NUM_INIT_M,
-					    V2_QPC_BYTE_244_RNR_CNT_S);
+					    V2_QPC_BYTE_244_RNR_NUM_INIT_S);
 done:
 	qp_attr->cur_qp_state = qp_attr->qp_state;

drivers/infiniband/hw/hns/hns_roce_hw_v2.h+1−1

@@ -1661,7 +1661,7 @@ struct hns_roce_query_pf_caps_d { · 1660 unmodified lines
1661	__le32 rsv_uars_rsv_qps;	1661	__le32 rsv_uars_rsv_qps;
1662	};	1662	};
1663	#define V2_QUERY_PF_CAPS_D_NUM_SRQS_S 0	1663	#define V2_QUERY_PF_CAPS_D_NUM_SRQS_S 0
1664	#define V2_QUERY_PF_CAPS_D_NUM_SRQS_M GENMASK(20, 0)	1664	#define V2_QUERY_PF_CAPS_D_NUM_SRQS_M GENMASK(19, 0)
1665		1665
1666	#define V2_QUERY_PF_CAPS_D_RQWQE_HOP_NUM_S 20	1666	#define V2_QUERY_PF_CAPS_D_RQWQE_HOP_NUM_S 20
1667	#define V2_QUERY_PF_CAPS_D_RQWQE_HOP_NUM_M GENMASK(21, 20)	1667	#define V2_QUERY_PF_CAPS_D_RQWQE_HOP_NUM_M GENMASK(21, 20)

drivers/infiniband/hw/i40iw/i40iw_main.c+0−5

 #define DRV_VERSION	__stringify(DRV_VERSION_MAJOR) "."		\
 	__stringify(DRV_VERSION_MINOR) "." __stringify(DRV_VERSION_BUILD)
-static int push_mode;
-module_param(push_mode, int, 0644);
-MODULE_PARM_DESC(push_mode, "Low latency mode: 0=disabled (default), 1=enabled)");
 static int debug;
 module_param(debug, int, 0644);
 MODULE_PARM_DESC(debug, "debug flags: 0=disabled (default), 0x7fffffff=all");
 	if (status)
 		goto exit;
 	iwdev->obj_next = iwdev->obj_mem;
-	iwdev->push_mode = push_mode;
 	init_waitqueue_head(&iwdev->vchnl_waitq);
 	init_waitqueue_head(&dev->vf_reqs);

drivers/infiniband/hw/i40iw/i40iw_verbs.c+7−30

@@ -167,39 +167,16 @@ static void i40iw_dealloc_ucontext(struct ib_ucontext *context) · 166 unmodified lines
167	*/	167	*/
168	static int i40iw_mmap(struct ib_ucontext context, struct vm_area_struct vma)	168	static int i40iw_mmap(struct ib_ucontext context, struct vm_area_struct vma)
169	{	169	{
170	struct i40iw_ucontext *ucontext;	170	struct i40iw_ucontext *ucontext = to_ucontext(context);
171	u64 db_addr_offset, push_offset, pfn;	171	u64 dbaddr;
172
173	ucontext = to_ucontext(context);
174	if (ucontext->iwdev->sc_dev.is_pf) {
175	db_addr_offset = I40IW_DB_ADDR_OFFSET;
176	push_offset = I40IW_PUSH_OFFSET;
177	if (vma->vm_pgoff)
178	vma->vm_pgoff += I40IW_PF_FIRST_PUSH_PAGE_INDEX - 1;
179	} else {
180	db_addr_offset = I40IW_VF_DB_ADDR_OFFSET;
181	push_offset = I40IW_VF_PUSH_OFFSET;
182	if (vma->vm_pgoff)
183	vma->vm_pgoff += I40IW_VF_FIRST_PUSH_PAGE_INDEX - 1;
184	}
185		172
186	vma->vm_pgoff += db_addr_offset >> PAGE_SHIFT;	173	if (vma->vm_pgoff \|\| vma->vm_end - vma->vm_start != PAGE_SIZE)
187		174	return -EINVAL;
188	if (vma->vm_pgoff == (db_addr_offset >> PAGE_SHIFT)) {
189	vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
190	} else {
191	if ((vma->vm_pgoff - (push_offset >> PAGE_SHIFT)) % 2)
192	vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
193	else
194	vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
195	}
196		175
197	pfn = vma->vm_pgoff +	176	dbaddr = I40IW_DB_ADDR_OFFSET + pci_resource_start(ucontext->iwdev->ldev->pcidev, 0);
198	(pci_resource_start(ucontext->iwdev->ldev->pcidev, 0) >>
199	PAGE_SHIFT);
200		177
201	return rdma_user_mmap_io(context, vma, pfn, PAGE_SIZE,	178	return rdma_user_mmap_io(context, vma, dbaddr >> PAGE_SHIFT, PAGE_SIZE,
202	vma->vm_page_prot, NULL);	179	pgprot_noncached(vma->vm_page_prot), NULL);
203	}	180	}
204		181
205	/**	182	/**

drivers/infiniband/hw/mthca/mthca_cq.c+6−4

 	}
 	mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
-	if (IS_ERR(mailbox))
+	if (IS_ERR(mailbox)) {
+		err = PTR_ERR(mailbox);
 		goto err_out_arm;
+	}
 	cq_context = mailbox->buf;
 	}
 	spin_lock_irq(&dev->cq_table.lock);
-	if (mthca_array_set(&dev->cq_table.cq,
+	err = mthca_array_set(&dev->cq_table.cq,
-			    cq->cqn & (dev->limits.num_cqs - 1),
+			      cq->cqn & (dev->limits.num_cqs - 1), cq);
-			    cq)) {
+	if (err) {
 		spin_unlock_irq(&dev->cq_table.lock);
 		goto err_out_free_mr;
 	}

drivers/iommu/amd/init.c+22−5

 #include <asm/iommu_table.h>
 #include <asm/io_apic.h>
 #include <asm/irq_remapping.h>
+#include <asm/set_memory.h>
 #include <linux/crash_dump.h>
 	free_pages((unsigned long)iommu->cmd_buf, get_order(CMD_BUFFER_SIZE));
 }
+static void *__init iommu_alloc_4k_pages(struct amd_iommu *iommu,
+					 gfp_t gfp, size_t size)
+{
+	int order = get_order(size);
+	void *buf = (void *)__get_free_pages(gfp, order);
+	if (buf &&
+	    iommu_feature(iommu, FEATURE_SNP) &&
+	    set_memory_4k((unsigned long)buf, (1 << order))) {
+		free_pages((unsigned long)buf, order);
+		buf = NULL;
+	}
+	return buf;
+}
 /* allocates the memory where the IOMMU will log its events to */
 static int __init alloc_event_buffer(struct amd_iommu *iommu)
 {
-	iommu->evt_buf = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO,
+	iommu->evt_buf = iommu_alloc_4k_pages(iommu, GFP_KERNEL | __GFP_ZERO,
-						  get_order(EVT_BUFFER_SIZE));
+					      EVT_BUFFER_SIZE);
 	return iommu->evt_buf ? 0 : -ENOMEM;
 }
 /* allocates the memory where the IOMMU will log its events to */
 static int __init alloc_ppr_log(struct amd_iommu *iommu)
 {
-	iommu->ppr_log = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO,
+	iommu->ppr_log = iommu_alloc_4k_pages(iommu, GFP_KERNEL | __GFP_ZERO,
-						  get_order(PPR_LOG_SIZE));
+					      PPR_LOG_SIZE);
 	return iommu->ppr_log ? 0 : -ENOMEM;
 }
 static int __init alloc_cwwb_sem(struct amd_iommu *iommu)
 {
-	iommu->cmd_sem = (void *)get_zeroed_page(GFP_KERNEL);
+	iommu->cmd_sem = iommu_alloc_4k_pages(iommu, GFP_KERNEL | __GFP_ZERO, 1);
 	return iommu->cmd_sem ? 0 : -ENOMEM;
 }

drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c+4−0

 {
 	struct qcom_smmu *qsmmu;
+	/* Check to make sure qcom_scm has finished probing */
+	if (!qcom_scm_is_available())
+		return ERR_PTR(-EPROBE_DEFER);
 	qsmmu = devm_kzalloc(smmu->dev, sizeof(*qsmmu), GFP_KERNEL);
 	if (!qsmmu)
 		return ERR_PTR(-ENOMEM);

drivers/iommu/intel/dmar.c+5−2

 static inline void vf_inherit_msi_domain(struct pci_dev *pdev)
 {
-	dev_set_msi_domain(&pdev->dev, dev_get_msi_domain(&pdev->physfn->dev));
+	struct pci_dev *physfn = pci_physfn(pdev);
+	dev_set_msi_domain(&pdev->dev, dev_get_msi_domain(&physfn->dev));
 }
 static int dmar_pci_bus_notifier(struct notifier_block *nb,
 		warn_invalid_dmar(phys_addr, " returns all ones");
 		goto unmap;
 	}
-	iommu->vccap = dmar_readq(iommu->reg + DMAR_VCCAP_REG);
+	if (ecap_vcs(iommu->ecap))
+		iommu->vccap = dmar_readq(iommu->reg + DMAR_VCCAP_REG);
 	/* the registers might be more than one page */
 	map_size = max_t(int, ecap_max_iotlb_offset(iommu->ecap),

drivers/iommu/intel/iommu.c+5−4

  * (used when kernel is launched w/ TXT)
  */
 static int force_on = 0;
-int intel_iommu_tboot_noforce;
+static int intel_iommu_tboot_noforce;
 static int no_platform_optin;
 #define ROOT_ENTRY_NR (VTD_PAGE_SIZE/sizeof(struct root_entry))
 		if (ecap_prs(iommu->ecap))
 			intel_svm_finish_prq(iommu);
 	}
-	if (ecap_vcs(iommu->ecap) && vccap_pasid(iommu->vccap))
+	if (vccap_pasid(iommu->vccap))
 		ioasid_unregister_allocator(&iommu->pasid_allocator);
 #endif
 	 * is active. All vIOMMU allocators will eventually be calling the same
 	 * host allocator.
 	 */
-	if (!ecap_vcs(iommu->ecap) || !vccap_pasid(iommu->vccap))
+	if (!vccap_pasid(iommu->vccap))
 		return;
 	pr_info("Register custom PASID allocator\n");
 	 * Intel IOMMU is required for a TXT/tboot launch or platform
 	 * opt in, so enforce that.
 	 */
-	force_on = tboot_force_iommu() || platform_optin_force_iommu();
+	force_on = (!intel_iommu_tboot_noforce && tboot_force_iommu()) ||
+		    platform_optin_force_iommu();
 	if (iommu_init_mempool()) {
 		if (force_on)

drivers/iommu/iommu.c+6−4

 	 */
 	iommu_alloc_default_domain(group, dev);
-	if (group->default_domain)
+	if (group->default_domain) {
 		ret = __iommu_attach_device(group->default_domain, dev);
+		if (ret) {
+			iommu_group_put(group);
+			goto err_release;
+		}
+	}
 	iommu_create_device_direct_mappings(group, dev);
 	iommu_group_put(group);
-	if (ret)
-		goto err_release;
 	if (ops->probe_finalize)
 		ops->probe_finalize(dev);

drivers/media/platform/Kconfig+21−7

 	depends on MTK_IOMMU || COMPILE_TEST
 	depends on VIDEO_DEV && VIDEO_V4L2
 	depends on ARCH_MEDIATEK || COMPILE_TEST
+	depends on VIDEO_MEDIATEK_VPU || MTK_SCP
+	# The two following lines ensure we have the same state ("m" or "y") as
+	# our dependencies, to avoid missing symbols during link.
+	depends on VIDEO_MEDIATEK_VPU || !VIDEO_MEDIATEK_VPU
+	depends on MTK_SCP || !MTK_SCP
 	select VIDEOBUF2_DMA_CONTIG
 	select V4L2_MEM2MEM_DEV
-	select VIDEO_MEDIATEK_VPU
+	select VIDEO_MEDIATEK_VCODEC_VPU if VIDEO_MEDIATEK_VPU
-	select MTK_SCP
+	select VIDEO_MEDIATEK_VCODEC_SCP if MTK_SCP
 	help
-	    Mediatek video codec driver provides HW capability to
+	  Mediatek video codec driver provides HW capability to
-	    encode and decode in a range of video formats
+	  encode and decode in a range of video formats on MT8173
-	    This driver rely on VPU driver to communicate with VPU.
+	  and MT8183.
+	  Note that support for MT8173 requires VIDEO_MEDIATEK_VPU to
+	  also be selected. Support for MT8183 depends on MTK_SCP.
+	  To compile this driver as modules, choose M here: the
+	  modules will be called mtk-vcodec-dec and mtk-vcodec-enc.
+config VIDEO_MEDIATEK_VCODEC_VPU
+	bool
-	    To compile this driver as modules, choose M here: the
+config VIDEO_MEDIATEK_VCODEC_SCP
-	    modules will be called mtk-vcodec-dec and mtk-vcodec-enc.
+	bool
 config VIDEO_MEM2MEM_DEINTERLACE
 	tristate "Deinterlace support"

drivers/media/platform/marvell-ccic/mmp-driver.c+2−0

  * Suspend/resume support.
  */
+#ifdef CONFIG_PM
 static int mmpcam_runtime_resume(struct device *dev)
 {
 	struct mmp_camera *cam = dev_get_drvdata(dev);
 		return mccic_resume(&cam->mcam);
 	return 0;
 }
+#endif
 static const struct dev_pm_ops mmpcam_pm_ops = {
 	SET_RUNTIME_PM_OPS(mmpcam_runtime_suspend, mmpcam_runtime_resume, NULL)

drivers/media/platform/mtk-vcodec/Makefile+9−1

@@ -24,4 +24,12 @@ mtk-vcodec-enc-y := venc/venc_vp8_if.o \ · 23 unmodified lines
24		24
25	mtk-vcodec-common-y := mtk_vcodec_intr.o \	25	mtk-vcodec-common-y := mtk_vcodec_intr.o \
26	mtk_vcodec_util.o \	26	mtk_vcodec_util.o \
27	mtk_vcodec_fw.o	27	mtk_vcodec_fw.o \
		28
		29	ifneq ($(CONFIG_VIDEO_MEDIATEK_VCODEC_VPU),)
		30	mtk-vcodec-common-y += mtk_vcodec_fw_vpu.o
		31	endif
		32
		33	ifneq ($(CONFIG_VIDEO_MEDIATEK_VCODEC_SCP),)
		34	mtk-vcodec-common-y += mtk_vcodec_fw_scp.o
		35	endif

drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c+1−1

@@ -241,7 +241,7 @@ static int mtk_vcodec_probe(struct platform_device *pdev) · 240 unmodified lines
241	}	241	}
242	dma_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(32));	242	dma_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(32));
243		243
244	dev->fw_handler = mtk_vcodec_fw_select(dev, fw_type, VPU_RST_DEC);	244	dev->fw_handler = mtk_vcodec_fw_select(dev, fw_type, DECODER);
245	if (IS_ERR(dev->fw_handler))	245	if (IS_ERR(dev->fw_handler))
246	return PTR_ERR(dev->fw_handler);	246	return PTR_ERR(dev->fw_handler);
247		247

drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_drv.c+1−1

@@ -293,7 +293,7 @@ static int mtk_vcodec_probe(struct platform_device *pdev) · 292 unmodified lines
293	}	293	}
294	dma_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(32));	294	dma_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(32));
295		295
296	dev->fw_handler = mtk_vcodec_fw_select(dev, fw_type, VPU_RST_ENC);	296	dev->fw_handler = mtk_vcodec_fw_select(dev, fw_type, ENCODER);
297	if (IS_ERR(dev->fw_handler))	297	if (IS_ERR(dev->fw_handler))
298	return PTR_ERR(dev->fw_handler);	298	return PTR_ERR(dev->fw_handler);
299		299

drivers/media/platform/mtk-vcodec/mtk_vcodec_fw.c+5−169

@@ -1,193 +1,29 @@
1	// SPDX-License-Identifier: GPL-2.0	1	// SPDX-License-Identifier: GPL-2.0
2		2
3	#include "mtk_vcodec_fw.h"	3	#include "mtk_vcodec_fw.h"
		4	#include "mtk_vcodec_fw_priv.h"
4	#include "mtk_vcodec_util.h"	5	#include "mtk_vcodec_util.h"
5	#include "mtk_vcodec_drv.h"	6	#include "mtk_vcodec_drv.h"
6		7
7	struct mtk_vcodec_fw_ops {
8	int (load_firmware)(struct mtk_vcodec_fw fw);
9	unsigned int (get_vdec_capa)(struct mtk_vcodec_fw fw);
10	unsigned int (get_venc_capa)(struct mtk_vcodec_fw fw);
11	void * (map_dm_addr)(struct mtk_vcodec_fw fw, u32 dtcm_dmem_addr);
12	int (ipi_register)(struct mtk_vcodec_fw fw, int id,
13	mtk_vcodec_ipi_handler handler, const char name, void priv);
14	int (ipi_send)(struct mtk_vcodec_fw fw, int id, void *buf,
15	unsigned int len, unsigned int wait);
16	};
17
18	struct mtk_vcodec_fw {
19	enum mtk_vcodec_fw_type type;
20	const struct mtk_vcodec_fw_ops *ops;
21	struct platform_device *pdev;
22	struct mtk_scp *scp;
23	};
24
25	static int mtk_vcodec_vpu_load_firmware(struct mtk_vcodec_fw *fw)
26	{
27	return vpu_load_firmware(fw->pdev);
28	}
29
30	static unsigned int mtk_vcodec_vpu_get_vdec_capa(struct mtk_vcodec_fw *fw)
31	{
32	return vpu_get_vdec_hw_capa(fw->pdev);
33	}
34
35	static unsigned int mtk_vcodec_vpu_get_venc_capa(struct mtk_vcodec_fw *fw)
36	{
37	return vpu_get_venc_hw_capa(fw->pdev);
38	}
39
40	static void mtk_vcodec_vpu_map_dm_addr(struct mtk_vcodec_fw fw,
41	u32 dtcm_dmem_addr)
42	{
43	return vpu_mapping_dm_addr(fw->pdev, dtcm_dmem_addr);
44	}
45
46	static int mtk_vcodec_vpu_set_ipi_register(struct mtk_vcodec_fw *fw, int id,
47	mtk_vcodec_ipi_handler handler,
48	const char name, void priv)
49	{
50	/*
51	* The handler we receive takes a void * as its first argument. We
52	* cannot change this because it needs to be passed down to the rproc
53	* subsystem when SCP is used. VPU takes a const argument, which is
54	* more constrained, so the conversion below is safe.
55	*/
56	ipi_handler_t handler_const = (ipi_handler_t)handler;
57
58	return vpu_ipi_register(fw->pdev, id, handler_const, name, priv);
59	}
60
61	static int mtk_vcodec_vpu_ipi_send(struct mtk_vcodec_fw fw, int id, void buf,
62	unsigned int len, unsigned int wait)
63	{
64	return vpu_ipi_send(fw->pdev, id, buf, len);
65	}
66
67	static const struct mtk_vcodec_fw_ops mtk_vcodec_vpu_msg = {
68	.load_firmware = mtk_vcodec_vpu_load_firmware,
69	.get_vdec_capa = mtk_vcodec_vpu_get_vdec_capa,
70	.get_venc_capa = mtk_vcodec_vpu_get_venc_capa,
71	.map_dm_addr = mtk_vcodec_vpu_map_dm_addr,
72	.ipi_register = mtk_vcodec_vpu_set_ipi_register,
73	.ipi_send = mtk_vcodec_vpu_ipi_send,
74	};
75
76	static int mtk_vcodec_scp_load_firmware(struct mtk_vcodec_fw *fw)
77	{
78	return rproc_boot(scp_get_rproc(fw->scp));
79	}
80
81	static unsigned int mtk_vcodec_scp_get_vdec_capa(struct mtk_vcodec_fw *fw)
82	{
83	return scp_get_vdec_hw_capa(fw->scp);
84	}
85
86	static unsigned int mtk_vcodec_scp_get_venc_capa(struct mtk_vcodec_fw *fw)
87	{
88	return scp_get_venc_hw_capa(fw->scp);
89	}
90
91	static void mtk_vcodec_vpu_scp_dm_addr(struct mtk_vcodec_fw fw,
92	u32 dtcm_dmem_addr)
93	{
94	return scp_mapping_dm_addr(fw->scp, dtcm_dmem_addr);
95	}
96
97	static int mtk_vcodec_scp_set_ipi_register(struct mtk_vcodec_fw *fw, int id,
98	mtk_vcodec_ipi_handler handler,
99	const char name, void priv)
100	{
101	return scp_ipi_register(fw->scp, id, handler, priv);
102	}
103
104	static int mtk_vcodec_scp_ipi_send(struct mtk_vcodec_fw fw, int id, void buf,
105	unsigned int len, unsigned int wait)
106	{
107	return scp_ipi_send(fw->scp, id, buf, len, wait);
108	}
109
110	static const struct mtk_vcodec_fw_ops mtk_vcodec_rproc_msg = {
111	.load_firmware = mtk_vcodec_scp_load_firmware,
112	.get_vdec_capa = mtk_vcodec_scp_get_vdec_capa,
113	.get_venc_capa = mtk_vcodec_scp_get_venc_capa,
114	.map_dm_addr = mtk_vcodec_vpu_scp_dm_addr,
115	.ipi_register = mtk_vcodec_scp_set_ipi_register,
116	.ipi_send = mtk_vcodec_scp_ipi_send,
117	};
118
119	static void mtk_vcodec_reset_handler(void *priv)
120	{
121	struct mtk_vcodec_dev *dev = priv;
122	struct mtk_vcodec_ctx *ctx;
123
124	mtk_v4l2_err("Watchdog timeout!!");
125
126	mutex_lock(&dev->dev_mutex);
127	list_for_each_entry(ctx, &dev->ctx_list, list) {
128	ctx->state = MTK_STATE_ABORT;
129	mtk_v4l2_debug(0, "[%d] Change to state MTK_STATE_ABORT",
130	ctx->id);
131	}
132	mutex_unlock(&dev->dev_mutex);
133	}
134
135	struct mtk_vcodec_fw mtk_vcodec_fw_select(struct mtk_vcodec_dev dev,	8	struct mtk_vcodec_fw mtk_vcodec_fw_select(struct mtk_vcodec_dev dev,
136	enum mtk_vcodec_fw_type type,	9	enum mtk_vcodec_fw_type type,
137	enum rst_id rst_id)	10	enum mtk_vcodec_fw_use fw_use)
138	{	11	{
139	const struct mtk_vcodec_fw_ops *ops;
140	struct mtk_vcodec_fw *fw;
141	struct platform_device *fw_pdev = NULL;
142	struct mtk_scp *scp = NULL;
143
144	switch (type) {	12	switch (type) {
145	case VPU:	13	case VPU:
146	ops = &mtk_vcodec_vpu_msg;	14	return mtk_vcodec_fw_vpu_init(dev, fw_use);
147	fw_pdev = vpu_get_plat_device(dev->plat_dev);
148	if (!fw_pdev) {
149	mtk_v4l2_err("firmware device is not ready");
150	return ERR_PTR(-EINVAL);
151	}
152	vpu_wdt_reg_handler(fw_pdev, mtk_vcodec_reset_handler,
153	dev, rst_id);
154	break;
155	case SCP:	15	case SCP:
156	ops = &mtk_vcodec_rproc_msg;	16	return mtk_vcodec_fw_scp_init(dev);
157	scp = scp_get(dev->plat_dev);
158	if (!scp) {
159	mtk_v4l2_err("could not get vdec scp handle");
160	return ERR_PTR(-EPROBE_DEFER);
161	}
162	break;
163	default:	17	default:
164	mtk_v4l2_err("invalid vcodec fw type");	18	mtk_v4l2_err("invalid vcodec fw type");
165	return ERR_PTR(-EINVAL);	19	return ERR_PTR(-EINVAL);
166	}	20	}
167
168	fw = devm_kzalloc(&dev->plat_dev->dev, sizeof(*fw), GFP_KERNEL);
169	if (!fw)
170	return ERR_PTR(-EINVAL);
171
172	fw->type = type;
173	fw->ops = ops;
174	fw->pdev = fw_pdev;
175	fw->scp = scp;
176
177	return fw;
178	}	21	}
179	EXPORT_SYMBOL_GPL(mtk_vcodec_fw_select);	22	EXPORT_SYMBOL_GPL(mtk_vcodec_fw_select);
180		23
181	void mtk_vcodec_fw_release(struct mtk_vcodec_fw *fw)	24	void mtk_vcodec_fw_release(struct mtk_vcodec_fw *fw)
182	{	25	{
183	switch (fw->type) {	26	fw->ops->release(fw);
184	case VPU:
185	put_device(&fw->pdev->dev);
186	break;
187	case SCP:
188	scp_put(fw->scp);
189	break;
190	}
191	}	27	}
192	EXPORT_SYMBOL_GPL(mtk_vcodec_fw_release);	28	EXPORT_SYMBOL_GPL(mtk_vcodec_fw_release);
193		29

drivers/media/platform/mtk-vcodec/mtk_vcodec_fw.h+6−1

 	SCP,
 };
+enum mtk_vcodec_fw_use {
+	DECODER,
+	ENCODER,
+};
 struct mtk_vcodec_fw;
 typedef void (*mtk_vcodec_ipi_handler) (void *data,
 struct mtk_vcodec_fw *mtk_vcodec_fw_select(struct mtk_vcodec_dev *dev,
 					   enum mtk_vcodec_fw_type type,
-					   enum rst_id rst_id);
+					   enum mtk_vcodec_fw_use fw_use);
 void mtk_vcodec_fw_release(struct mtk_vcodec_fw *fw);
 int mtk_vcodec_fw_load_firmware(struct mtk_vcodec_fw *fw);

drivers/media/platform/mtk-vcodec/mtk_vcodec_fw_priv.h+52−0

@@ -0,0 +1,52 @@
	1	/* SPDX-License-Identifier: GPL-2.0 */
	2
	3	#ifndef _MTK_VCODEC_FW_PRIV_H_
	4	#define _MTK_VCODEC_FW_PRIV_H_
	5
	6	#include "mtk_vcodec_fw.h"
	7
	8	struct mtk_vcodec_dev;
	9
	10	struct mtk_vcodec_fw {
	11	enum mtk_vcodec_fw_type type;
	12	const struct mtk_vcodec_fw_ops *ops;
	13	struct platform_device *pdev;
	14	struct mtk_scp *scp;
	15	};
	16
	17	struct mtk_vcodec_fw_ops {
	18	int (load_firmware)(struct mtk_vcodec_fw fw);
	19	unsigned int (get_vdec_capa)(struct mtk_vcodec_fw fw);
	20	unsigned int (get_venc_capa)(struct mtk_vcodec_fw fw);
	21	void (map_dm_addr)(struct mtk_vcodec_fw *fw, u32 dtcm_dmem_addr);
	22	int (ipi_register)(struct mtk_vcodec_fw fw, int id,
	23	mtk_vcodec_ipi_handler handler, const char *name,
	24	void *priv);
	25	int (ipi_send)(struct mtk_vcodec_fw fw, int id, void *buf,
	26	unsigned int len, unsigned int wait);
	27	void (release)(struct mtk_vcodec_fw fw);
	28	};
	29
	30	#if IS_ENABLED(CONFIG_VIDEO_MEDIATEK_VCODEC_VPU)
	31	struct mtk_vcodec_fw mtk_vcodec_fw_vpu_init(struct mtk_vcodec_dev dev,
	32	enum mtk_vcodec_fw_use fw_use);
	33	#else
	34	static inline struct mtk_vcodec_fw *
	35	mtk_vcodec_fw_vpu_init(struct mtk_vcodec_dev *dev,
	36	enum mtk_vcodec_fw_use fw_use)
	37	{
	38	return ERR_PTR(-ENODEV);
	39	}
	40	#endif /* CONFIG_VIDEO_MEDIATEK_VCODEC_VPU */
	41
	42	#if IS_ENABLED(CONFIG_VIDEO_MEDIATEK_VCODEC_SCP)
	43	struct mtk_vcodec_fw mtk_vcodec_fw_scp_init(struct mtk_vcodec_dev dev);
	44	#else
	45	static inline struct mtk_vcodec_fw *
	46	mtk_vcodec_fw_scp_init(struct mtk_vcodec_dev *dev)
	47	{
	48	return ERR_PTR(-ENODEV);
	49	}
	50	#endif /* CONFIG_VIDEO_MEDIATEK_VCODEC_SCP */
	51
	52	#endif /* _MTK_VCODEC_FW_PRIV_H_ */

drivers/media/platform/mtk-vcodec/mtk_vcodec_fw_scp.c+73−0

@@ -0,0 +1,73 @@
	1	// SPDX-License-Identifier: GPL-2.0
	2
	3	#include "mtk_vcodec_fw_priv.h"
	4	#include "mtk_vcodec_util.h"
	5	#include "mtk_vcodec_drv.h"
	6
	7	static int mtk_vcodec_scp_load_firmware(struct mtk_vcodec_fw *fw)
	8	{
	9	return rproc_boot(scp_get_rproc(fw->scp));
	10	}
	11
	12	static unsigned int mtk_vcodec_scp_get_vdec_capa(struct mtk_vcodec_fw *fw)
	13	{
	14	return scp_get_vdec_hw_capa(fw->scp);
	15	}
	16
	17	static unsigned int mtk_vcodec_scp_get_venc_capa(struct mtk_vcodec_fw *fw)
	18	{
	19	return scp_get_venc_hw_capa(fw->scp);
	20	}
	21
	22	static void mtk_vcodec_vpu_scp_dm_addr(struct mtk_vcodec_fw fw,
	23	u32 dtcm_dmem_addr)
	24	{
	25	return scp_mapping_dm_addr(fw->scp, dtcm_dmem_addr);
	26	}
	27
	28	static int mtk_vcodec_scp_set_ipi_register(struct mtk_vcodec_fw *fw, int id,
	29	mtk_vcodec_ipi_handler handler,
	30	const char name, void priv)
	31	{
	32	return scp_ipi_register(fw->scp, id, handler, priv);
	33	}
	34
	35	static int mtk_vcodec_scp_ipi_send(struct mtk_vcodec_fw fw, int id, void buf,
	36	unsigned int len, unsigned int wait)
	37	{
	38	return scp_ipi_send(fw->scp, id, buf, len, wait);
	39	}
	40
	41	static void mtk_vcodec_scp_release(struct mtk_vcodec_fw *fw)
	42	{
	43	scp_put(fw->scp);
	44	}
	45
	46	static const struct mtk_vcodec_fw_ops mtk_vcodec_rproc_msg = {
	47	.load_firmware = mtk_vcodec_scp_load_firmware,
	48	.get_vdec_capa = mtk_vcodec_scp_get_vdec_capa,
	49	.get_venc_capa = mtk_vcodec_scp_get_venc_capa,
	50	.map_dm_addr = mtk_vcodec_vpu_scp_dm_addr,
	51	.ipi_register = mtk_vcodec_scp_set_ipi_register,
	52	.ipi_send = mtk_vcodec_scp_ipi_send,
	53	.release = mtk_vcodec_scp_release,
	54	};
	55
	56	struct mtk_vcodec_fw mtk_vcodec_fw_scp_init(struct mtk_vcodec_dev dev)
	57	{
	58	struct mtk_vcodec_fw *fw;
	59	struct mtk_scp *scp;
	60
	61	scp = scp_get(dev->plat_dev);
	62	if (!scp) {
	63	mtk_v4l2_err("could not get vdec scp handle");
	64	return ERR_PTR(-EPROBE_DEFER);
	65	}
	66
	67	fw = devm_kzalloc(&dev->plat_dev->dev, sizeof(*fw), GFP_KERNEL);
	68	fw->type = SCP;
	69	fw->ops = &mtk_vcodec_rproc_msg;
	70	fw->scp = scp;
	71
	72	return fw;
	73	}

drivers/media/platform/mtk-vcodec/mtk_vcodec_fw_vpu.c+110−0

@@ -0,0 +1,110 @@
	1	// SPDX-License-Identifier: GPL-2.0
	2
	3	#include "mtk_vcodec_fw_priv.h"
	4	#include "mtk_vcodec_util.h"
	5	#include "mtk_vcodec_drv.h"
	6
	7	static int mtk_vcodec_vpu_load_firmware(struct mtk_vcodec_fw *fw)
	8	{
	9	return vpu_load_firmware(fw->pdev);
	10	}
	11
	12	static unsigned int mtk_vcodec_vpu_get_vdec_capa(struct mtk_vcodec_fw *fw)
	13	{
	14	return vpu_get_vdec_hw_capa(fw->pdev);
	15	}
	16
	17	static unsigned int mtk_vcodec_vpu_get_venc_capa(struct mtk_vcodec_fw *fw)
	18	{
	19	return vpu_get_venc_hw_capa(fw->pdev);
	20	}
	21
	22	static void mtk_vcodec_vpu_map_dm_addr(struct mtk_vcodec_fw fw,
	23	u32 dtcm_dmem_addr)
	24	{
	25	return vpu_mapping_dm_addr(fw->pdev, dtcm_dmem_addr);
	26	}
	27
	28	static int mtk_vcodec_vpu_set_ipi_register(struct mtk_vcodec_fw *fw, int id,
	29	mtk_vcodec_ipi_handler handler,
	30	const char name, void priv)
	31	{
	32	/*
	33	* The handler we receive takes a void * as its first argument. We
	34	* cannot change this because it needs to be passed down to the rproc
	35	* subsystem when SCP is used. VPU takes a const argument, which is
	36	* more constrained, so the conversion below is safe.
	37	*/
	38	ipi_handler_t handler_const = (ipi_handler_t)handler;
	39
	40	return vpu_ipi_register(fw->pdev, id, handler_const, name, priv);
	41	}
	42
	43	static int mtk_vcodec_vpu_ipi_send(struct mtk_vcodec_fw fw, int id, void buf,
	44	unsigned int len, unsigned int wait)
	45	{
	46	return vpu_ipi_send(fw->pdev, id, buf, len);
	47	}
	48
	49	static void mtk_vcodec_vpu_release(struct mtk_vcodec_fw *fw)
	50	{
	51	put_device(&fw->pdev->dev);
	52	}
	53
	54	static void mtk_vcodec_vpu_reset_handler(void *priv)
	55	{
	56	struct mtk_vcodec_dev *dev = priv;
	57	struct mtk_vcodec_ctx *ctx;
	58
	59	mtk_v4l2_err("Watchdog timeout!!");
	60
	61	mutex_lock(&dev->dev_mutex);
	62	list_for_each_entry(ctx, &dev->ctx_list, list) {
	63	ctx->state = MTK_STATE_ABORT;
	64	mtk_v4l2_debug(0, "[%d] Change to state MTK_STATE_ABORT",
	65	ctx->id);
	66	}
	67	mutex_unlock(&dev->dev_mutex);
	68	}
	69
	70	static const struct mtk_vcodec_fw_ops mtk_vcodec_vpu_msg = {
	71	.load_firmware = mtk_vcodec_vpu_load_firmware,
	72	.get_vdec_capa = mtk_vcodec_vpu_get_vdec_capa,
	73	.get_venc_capa = mtk_vcodec_vpu_get_venc_capa,
	74	.map_dm_addr = mtk_vcodec_vpu_map_dm_addr,
	75	.ipi_register = mtk_vcodec_vpu_set_ipi_register,
	76	.ipi_send = mtk_vcodec_vpu_ipi_send,
	77	.release = mtk_vcodec_vpu_release,
	78	};
	79
	80	struct mtk_vcodec_fw mtk_vcodec_fw_vpu_init(struct mtk_vcodec_dev dev,
	81	enum mtk_vcodec_fw_use fw_use)
	82	{
	83	struct platform_device *fw_pdev;
	84	struct mtk_vcodec_fw *fw;
	85	enum rst_id rst_id;
	86
	87	switch (fw_use) {
	88	case ENCODER:
	89	rst_id = VPU_RST_ENC;
	90	break;
	91	case DECODER:
	92	default:
	93	rst_id = VPU_RST_DEC;
	94	break;
	95	}
	96
	97	fw_pdev = vpu_get_plat_device(dev->plat_dev);
	98	if (!fw_pdev) {
	99	mtk_v4l2_err("firmware device is not ready");
	100	return ERR_PTR(-EINVAL);
	101	}
	102	vpu_wdt_reg_handler(fw_pdev, mtk_vcodec_vpu_reset_handler, dev, rst_id);
	103
	104	fw = devm_kzalloc(&dev->plat_dev->dev, sizeof(*fw), GFP_KERNEL);
	105	fw->type = VPU;
	106	fw->ops = &mtk_vcodec_vpu_msg;
	107	fw->pdev = fw_pdev;
	108
	109	return fw;
	110	}

drivers/media/platform/qcom/venus/core.h+13−2

@@ -243,8 +243,19 @@ struct venc_controls { · 242 unmodified lines
243		243
244	u32 header_mode;	244	u32 header_mode;
245		245
246	u32 profile;	246	struct {
247	u32 level;	247	u32 h264;
		248	u32 mpeg4;
		249	u32 hevc;
		250	u32 vp8;
		251	u32 vp9;
		252	} profile;
		253	struct {
		254	u32 h264;
		255	u32 mpeg4;
		256	u32 hevc;
		257	u32 vp9;
		258	} level;
248	};	259	};
249		260
250	struct venus_buffer {	261	struct venus_buffer {

drivers/media/platform/qcom/venus/pm_helpers.c+2−2

@@ -794,7 +794,7 @@ skip_pmdomains: · 793 unmodified lines
794	return 0;	794	return 0;
795		795
796	opp_dl_add_err:	796	opp_dl_add_err:
797	dev_pm_domain_detach(core->opp_pmdomain, true);	797	dev_pm_opp_detach_genpd(core->opp_table);
798	opp_attach_err:	798	opp_attach_err:
799	if (core->pd_dl_venus) {	799	if (core->pd_dl_venus) {
800	device_link_del(core->pd_dl_venus);	800	device_link_del(core->pd_dl_venus);
@@ -832,7 +832,7 @@ skip_pmdomains: · 31 unmodified lines
832	if (core->opp_dl_venus)	832	if (core->opp_dl_venus)
833	device_link_del(core->opp_dl_venus);	833	device_link_del(core->opp_dl_venus);
834		834
835	dev_pm_domain_detach(core->opp_pmdomain, true);	835	dev_pm_opp_detach_genpd(core->opp_table);
836	}	836	}
837		837
838	static int core_get_v4(struct device *dev)	838	static int core_get_v4(struct device *dev)

drivers/media/platform/qcom/venus/venc.c+30−1

@@ -537,6 +537,7 @@ static int venc_set_properties(struct venus_inst *inst) · 536 unmodified lines
537	struct hfi_quantization quant;	537	struct hfi_quantization quant;
538	struct hfi_quantization_range quant_range;	538	struct hfi_quantization_range quant_range;
539	u32 ptype, rate_control, bitrate;	539	u32 ptype, rate_control, bitrate;
		540	u32 profile, level;
540	int ret;	541	int ret;
541		542
542	ret = venus_helper_set_work_mode(inst, VIDC_WORK_MODE_2);	543	ret = venus_helper_set_work_mode(inst, VIDC_WORK_MODE_2);
@@ -684,7 +685,35 @@ static int venc_set_properties(struct venus_inst *inst) · 141 unmodified lines
684	if (ret)	685	if (ret)
685	return ret;	686	return ret;
686		687
687	ret = venus_helper_set_profile_level(inst, ctr->profile, ctr->level);	688	switch (inst->hfi_codec) {
		689	case HFI_VIDEO_CODEC_H264:
		690	profile = ctr->profile.h264;
		691	level = ctr->level.h264;
		692	break;
		693	case HFI_VIDEO_CODEC_MPEG4:
		694	profile = ctr->profile.mpeg4;
		695	level = ctr->level.mpeg4;
		696	break;
		697	case HFI_VIDEO_CODEC_VP8:
		698	profile = ctr->profile.vp8;
		699	level = 0;
		700	break;
		701	case HFI_VIDEO_CODEC_VP9:
		702	profile = ctr->profile.vp9;
		703	level = ctr->level.vp9;
		704	break;
		705	case HFI_VIDEO_CODEC_HEVC:
		706	profile = ctr->profile.hevc;
		707	level = ctr->level.hevc;
		708	break;
		709	case HFI_VIDEO_CODEC_MPEG2:
		710	default:
		711	profile = 0;
		712	level = 0;
		713	break;
		714	}
		715
		716	ret = venus_helper_set_profile_level(inst, profile, level);
688	if (ret)	717	if (ret)
689	return ret;	718	return ret;
690		719

drivers/media/platform/qcom/venus/venc_ctrls.c+12−2

 		ctr->h264_entropy_mode = ctrl->val;
 		break;
 	case V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE:
+		ctr->profile.mpeg4 = ctrl->val;
+		break;
 	case V4L2_CID_MPEG_VIDEO_H264_PROFILE:
+		ctr->profile.h264 = ctrl->val;
+		break;
 	case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
+		ctr->profile.hevc = ctrl->val;
+		break;
 	case V4L2_CID_MPEG_VIDEO_VP8_PROFILE:
-		ctr->profile = ctrl->val;
+		ctr->profile.vp8 = ctrl->val;
 		break;
 	case V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL:
+		ctr->level.mpeg4 = ctrl->val;
+		break;
 	case V4L2_CID_MPEG_VIDEO_H264_LEVEL:
+		ctr->level.h264 = ctrl->val;
+		break;
 	case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
-		ctr->level = ctrl->val;
+		ctr->level.hevc = ctrl->val;
 		break;
 	case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
 		ctr->h264_i_qp = ctrl->val;

drivers/media/test-drivers/vidtv/vidtv_bridge.c+65−51

@@ -4,36 +4,43 @@ · 3 unmodified lines
4	* validate the existing APIs in the media subsystem. It can also aid	4	* validate the existing APIs in the media subsystem. It can also aid
5	* developers working on userspace applications.	5	* developers working on userspace applications.
6	*	6	*
7	* When this module is loaded, it will attempt to modprobe 'dvb_vidtv_tuner' and 'dvb_vidtv_demod'.	7	* When this module is loaded, it will attempt to modprobe 'dvb_vidtv_tuner'
		8	* and 'dvb_vidtv_demod'.
8	*	9	*
9	* Copyright (C) 2020 Daniel W. S. Almeida	10	* Copyright (C) 2020 Daniel W. S. Almeida
10	*/	11	*/
11		12
		13	#include <linux/dev_printk.h>
12	#include <linux/moduleparam.h>	14	#include <linux/moduleparam.h>
13	#include <linux/mutex.h>	15	#include <linux/mutex.h>
14	#include <linux/platform_device.h>	16	#include <linux/platform_device.h>
15	#include <linux/dev_printk.h>
16	#include <linux/time.h>	17	#include <linux/time.h>
17	#include <linux/types.h>	18	#include <linux/types.h>
18	#include <linux/workqueue.h>	19	#include <linux/workqueue.h>
19		20
20	#include "vidtv_bridge.h"	21	#include "vidtv_bridge.h"
		22	#include "vidtv_common.h"
21	#include "vidtv_demod.h"	23	#include "vidtv_demod.h"
22	#include "vidtv_tuner.h"
23	#include "vidtv_ts.h"
24	#include "vidtv_mux.h"	24	#include "vidtv_mux.h"
25	#include "vidtv_common.h"	25	#include "vidtv_ts.h"
		26	#include "vidtv_tuner.h"
26		27
27	//#define MUX_BUF_MAX_SZ	28	#define MUX_BUF_MIN_SZ 90164
28	//#define MUX_BUF_MIN_SZ	29	#define MUX_BUF_MAX_SZ (MUX_BUF_MIN_SZ * 10)
29	#define TUNER_DEFAULT_ADDR 0x68	30	#define TUNER_DEFAULT_ADDR 0x68
30	#define DEMOD_DEFAULT_ADDR 0x60	31	#define DEMOD_DEFAULT_ADDR 0x60
		32	#define VIDTV_DEFAULT_NETWORK_ID 0xff44
		33	#define VIDTV_DEFAULT_NETWORK_NAME "LinuxTV.org"
		34	#define VIDTV_DEFAULT_TS_ID 0x4081
31		35
32	/* LNBf fake parameters: ranges used by an Universal (extended) European LNBf */	36	/*
33	#define LNB_CUT_FREQUENCY 11700000	37	* The LNBf fake parameters here are the ranges used by an
34	#define LNB_LOW_FREQ 9750000	38	* Universal (extended) European LNBf, which is likely the most common LNBf
35	#define LNB_HIGH_FREQ 10600000	39	* found on Satellite digital TV system nowadays.
36		40	*/
		41	#define LNB_CUT_FREQUENCY 11700000 /* high IF frequency */
		42	#define LNB_LOW_FREQ 9750000 /* low IF frequency */
		43	#define LNB_HIGH_FREQ 10600000 /* transition frequency */
37		44
38	static unsigned int drop_tslock_prob_on_low_snr;	45	static unsigned int drop_tslock_prob_on_low_snr;
39	module_param(drop_tslock_prob_on_low_snr, uint, 0);	46	module_param(drop_tslock_prob_on_low_snr, uint, 0);
@@ -92,7 +99,8 @@ MODULE_PARM_DESC(si_period_msec, "How often to send SI packets. Default: 40ms"); · 52 unmodified lines
92		99
93	static unsigned int pcr_period_msec = 40;	100	static unsigned int pcr_period_msec = 40;
94	module_param(pcr_period_msec, uint, 0);	101	module_param(pcr_period_msec, uint, 0);
95	MODULE_PARM_DESC(pcr_period_msec, "How often to send PCR packets. Default: 40ms");	102	MODULE_PARM_DESC(pcr_period_msec,
		103	"How often to send PCR packets. Default: 40ms");
96		104
97	static unsigned int mux_rate_kbytes_sec = 4096;	105	static unsigned int mux_rate_kbytes_sec = 4096;
98	module_param(mux_rate_kbytes_sec, uint, 0);	106	module_param(mux_rate_kbytes_sec, uint, 0);
@@ -104,16 +112,14 @@ MODULE_PARM_DESC(pcr_pid, "PCR PID for all channels: defaults to 0x200"); · 5 unmodified lines
104		112
105	static unsigned int mux_buf_sz_pkts;	113	static unsigned int mux_buf_sz_pkts;
106	module_param(mux_buf_sz_pkts, uint, 0);	114	module_param(mux_buf_sz_pkts, uint, 0);
107	MODULE_PARM_DESC(mux_buf_sz_pkts, "Size for the internal mux buffer in multiples of 188 bytes");	115	MODULE_PARM_DESC(mux_buf_sz_pkts,
108		116	"Size for the internal mux buffer in multiples of 188 bytes");
109	#define MUX_BUF_MIN_SZ 90164
110	#define MUX_BUF_MAX_SZ (MUX_BUF_MIN_SZ * 10)
111		117
112	static u32 vidtv_bridge_mux_buf_sz_for_mux_rate(void)	118	static u32 vidtv_bridge_mux_buf_sz_for_mux_rate(void)
113	{	119	{
114	u32 max_elapsed_time_msecs = VIDTV_MAX_SLEEP_USECS / USEC_PER_MSEC;	120	u32 max_elapsed_time_msecs = VIDTV_MAX_SLEEP_USECS / USEC_PER_MSEC;
115	u32 nbytes_expected;
116	u32 mux_buf_sz = mux_buf_sz_pkts * TS_PACKET_LEN;	121	u32 mux_buf_sz = mux_buf_sz_pkts * TS_PACKET_LEN;
		122	u32 nbytes_expected;
117		123
118	nbytes_expected = mux_rate_kbytes_sec;	124	nbytes_expected = mux_rate_kbytes_sec;
119	nbytes_expected *= max_elapsed_time_msecs;	125	nbytes_expected *= max_elapsed_time_msecs;
@@ -143,14 +149,12 @@ static bool vidtv_bridge_check_demod_lock(struct vidtv_dvb *dvb, u32 n) · 23 unmodified lines
143	FE_HAS_LOCK);	149	FE_HAS_LOCK);
144	}	150	}
145		151
146	static void	152	/*
147	vidtv_bridge_on_new_pkts_avail(void priv, u8 buf, u32 npkts)	153	* called on a separate thread by the mux when new packets become available
		154	*/
		155	static void vidtv_bridge_on_new_pkts_avail(void priv, u8 buf, u32 npkts)
148	{	156	{
149	/*	157	struct vidtv_dvb *dvb = priv;
150	* called on a separate thread by the mux when new packets become
151	* available
152	*/
153	struct vidtv_dvb dvb = (struct vidtv_dvb )priv;
154		158
155	/* drop packets if we lose the lock */	159	/* drop packets if we lose the lock */
156	if (vidtv_bridge_check_demod_lock(dvb, 0))	160	if (vidtv_bridge_check_demod_lock(dvb, 0))
@@ -159,7 +163,17 @@ vidtv_bridge_on_new_pkts_avail(void priv, u8 buf, u32 npkts) · 2 unmodified lines
159		163
160	static int vidtv_start_streaming(struct vidtv_dvb *dvb)	164	static int vidtv_start_streaming(struct vidtv_dvb *dvb)
161	{	165	{
162	struct vidtv_mux_init_args mux_args = {0};	166	struct vidtv_mux_init_args mux_args = {
		167	.mux_rate_kbytes_sec = mux_rate_kbytes_sec,
		168	.on_new_packets_available_cb = vidtv_bridge_on_new_pkts_avail,
		169	.pcr_period_usecs = pcr_period_msec * USEC_PER_MSEC,
		170	.si_period_usecs = si_period_msec * USEC_PER_MSEC,
		171	.pcr_pid = pcr_pid,
		172	.transport_stream_id = VIDTV_DEFAULT_TS_ID,
		173	.network_id = VIDTV_DEFAULT_NETWORK_ID,
		174	.network_name = VIDTV_DEFAULT_NETWORK_NAME,
		175	.priv = dvb,
		176	};
163	struct device *dev = &dvb->pdev->dev;	177	struct device *dev = &dvb->pdev->dev;
164	u32 mux_buf_sz;	178	u32 mux_buf_sz;
165		179
@@ -168,19 +182,17 @@ static int vidtv_start_streaming(struct vidtv_dvb *dvb) · 2 unmodified lines
168	return 0;	182	return 0;
169	}	183	}
170		184
171	mux_buf_sz = (mux_buf_sz_pkts) ? mux_buf_sz_pkts : vidtv_bridge_mux_buf_sz_for_mux_rate();	185	if (mux_buf_sz_pkts)
		186	mux_buf_sz = mux_buf_sz_pkts;
		187	else
		188	mux_buf_sz = vidtv_bridge_mux_buf_sz_for_mux_rate();
172		189
173	mux_args.mux_rate_kbytes_sec = mux_rate_kbytes_sec;	190	mux_args.mux_buf_sz = mux_buf_sz;
174	mux_args.on_new_packets_available_cb = vidtv_bridge_on_new_pkts_avail;
175	mux_args.mux_buf_sz = mux_buf_sz;
176	mux_args.pcr_period_usecs = pcr_period_msec * 1000;
177	mux_args.si_period_usecs = si_period_msec * 1000;
178	mux_args.pcr_pid = pcr_pid;
179	mux_args.transport_stream_id = VIDTV_DEFAULT_TS_ID;
180	mux_args.priv = dvb;
181		191
182	dvb->streaming = true;	192	dvb->streaming = true;
183	dvb->mux = vidtv_mux_init(dvb->fe[0], dev, mux_args);	193	dvb->mux = vidtv_mux_init(dvb->fe[0], dev, &mux_args);
		194	if (!dvb->mux)
		195	return -ENOMEM;
184	vidtv_mux_start_thread(dvb->mux);	196	vidtv_mux_start_thread(dvb->mux);
185		197
186	dev_dbg_ratelimited(dev, "Started streaming\n");	198	dev_dbg_ratelimited(dev, "Started streaming\n");
@@ -204,8 +216,8 @@ static int vidtv_start_feed(struct dvb_demux_feed *feed) · 17 unmodified lines
204	{	216	{
205	struct dvb_demux *demux = feed->demux;	217	struct dvb_demux *demux = feed->demux;
206	struct vidtv_dvb *dvb = demux->priv;	218	struct vidtv_dvb *dvb = demux->priv;
207	int rc;
208	int ret;	219	int ret;
		220	int rc;
209		221
210	if (!demux->dmx.frontend)	222	if (!demux->dmx.frontend)
211	return -EINVAL;	223	return -EINVAL;
@@ -243,9 +255,9 @@ static int vidtv_stop_feed(struct dvb_demux_feed *feed) · 31 unmodified lines
243		255
244	static struct dvb_frontend vidtv_get_frontend_ptr(struct i2c_client c)	256	static struct dvb_frontend vidtv_get_frontend_ptr(struct i2c_client c)
245	{	257	{
246	/* the demod will set this when its probe function runs */
247	struct vidtv_demod_state *state = i2c_get_clientdata(c);	258	struct vidtv_demod_state *state = i2c_get_clientdata(c);
248		259
		260	/* the demod will set this when its probe function runs */
249	return &state->frontend;	261	return &state->frontend;
250	}	262	}
251		263
@@ -253,6 +265,11 @@ static int vidtv_master_xfer(struct i2c_adapter *i2c_adap, · 1 unmodified line
253	struct i2c_msg msgs[],	265	struct i2c_msg msgs[],
254	int num)	266	int num)
255	{	267	{
		268	/*
		269	* Right now, this virtual driver doesn't really send or receive
		270	* messages from I2C. A real driver will require an implementation
		271	* here.
		272	*/
256	return 0;	273	return 0;
257	}	274	}
258		275
@@ -320,11 +337,10 @@ static int vidtv_bridge_dmxdev_init(struct vidtv_dvb *dvb) · 61 unmodified lines
320		337
321	static int vidtv_bridge_probe_demod(struct vidtv_dvb *dvb, u32 n)	338	static int vidtv_bridge_probe_demod(struct vidtv_dvb *dvb, u32 n)
322	{	339	{
323	struct vidtv_demod_config cfg = {};	340	struct vidtv_demod_config cfg = {
324		341	.drop_tslock_prob_on_low_snr = drop_tslock_prob_on_low_snr,
325	cfg.drop_tslock_prob_on_low_snr = drop_tslock_prob_on_low_snr;	342	.recover_tslock_prob_on_good_snr = recover_tslock_prob_on_good_snr,
326	cfg.recover_tslock_prob_on_good_snr = recover_tslock_prob_on_good_snr;	343	};
327
328	dvb->i2c_client_demod[n] = dvb_module_probe("dvb_vidtv_demod",	344	dvb->i2c_client_demod[n] = dvb_module_probe("dvb_vidtv_demod",
329	NULL,	345	NULL,
330	&dvb->i2c_adapter,	346	&dvb->i2c_adapter,
@@ -343,14 +359,14 @@ static int vidtv_bridge_probe_demod(struct vidtv_dvb *dvb, u32 n) · 12 unmodified lines
343		359
344	static int vidtv_bridge_probe_tuner(struct vidtv_dvb *dvb, u32 n)	360	static int vidtv_bridge_probe_tuner(struct vidtv_dvb *dvb, u32 n)
345	{	361	{
346	struct vidtv_tuner_config cfg = {};	362	struct vidtv_tuner_config cfg = {
		363	.fe = dvb->fe[n],
		364	.mock_power_up_delay_msec = mock_power_up_delay_msec,
		365	.mock_tune_delay_msec = mock_tune_delay_msec,
		366	};
347	u32 freq;	367	u32 freq;
348	int i;	368	int i;
349		369
350	cfg.fe = dvb->fe[n];
351	cfg.mock_power_up_delay_msec = mock_power_up_delay_msec;
352	cfg.mock_tune_delay_msec = mock_tune_delay_msec;
353
354	/* TODO: check if the frequencies are at a valid range */	370	/* TODO: check if the frequencies are at a valid range */
355		371
356	memcpy(cfg.vidtv_valid_dvb_t_freqs,	372	memcpy(cfg.vidtv_valid_dvb_t_freqs,
@@ -389,9 +405,7 @@ static int vidtv_bridge_probe_tuner(struct vidtv_dvb *dvb, u32 n) · 32 unmodified lines
389		405
390	static int vidtv_bridge_dvb_init(struct vidtv_dvb *dvb)	406	static int vidtv_bridge_dvb_init(struct vidtv_dvb *dvb)
391	{	407	{
392	int ret;	408	int ret, i, j;
393	int i;
394	int j;
395		409
396	ret = vidtv_bridge_i2c_register_adap(dvb);	410	ret = vidtv_bridge_i2c_register_adap(dvb);
397	if (ret < 0)	411	if (ret < 0)

drivers/media/test-drivers/vidtv/vidtv_bridge.h+3−1

@@ -20,9 +20,11 @@ · 19 unmodified lines
20	#include <linux/i2c.h>	20	#include <linux/i2c.h>
21	#include <linux/platform_device.h>	21	#include <linux/platform_device.h>
22	#include <linux/types.h>	22	#include <linux/types.h>
		23
23	#include <media/dmxdev.h>	24	#include <media/dmxdev.h>
24	#include <media/dvb_demux.h>	25	#include <media/dvb_demux.h>
25	#include <media/dvb_frontend.h>	26	#include <media/dvb_frontend.h>
		27
26	#include "vidtv_mux.h"	28	#include "vidtv_mux.h"
27		29
28	/**	30	/**
@@ -32,7 +34,7 @@ · 3 unmodified lines
32	* @adapter: Represents a DTV adapter. See 'dvb_register_adapter'.	34	* @adapter: Represents a DTV adapter. See 'dvb_register_adapter'.
33	* @demux: The demux used by the dvb_dmx_swfilter_packets() call.	35	* @demux: The demux used by the dvb_dmx_swfilter_packets() call.
34	* @dmx_dev: Represents a demux device.	36	* @dmx_dev: Represents a demux device.
35	* @dmx_frontend: The frontends associated with the demux.	37	* @dmx_fe: The frontends associated with the demux.
36	* @i2c_adapter: The i2c_adapter associated with the bridge driver.	38	* @i2c_adapter: The i2c_adapter associated with the bridge driver.
37	* @i2c_client_demod: The i2c_clients associated with the demodulator modules.	39	* @i2c_client_demod: The i2c_clients associated with the demodulator modules.
38	* @i2c_client_tuner: The i2c_clients associated with the tuner modules.	40	* @i2c_client_tuner: The i2c_clients associated with the tuner modules.

drivers/media/test-drivers/vidtv/vidtv_channel.c+274−38

@@ -9,6 +9,7 @@ · 8 unmodified lines
9	* When vidtv boots, it will create some hardcoded channels.	9	* When vidtv boots, it will create some hardcoded channels.
10	* Their services will be concatenated to populate the SDT.	10	* Their services will be concatenated to populate the SDT.
11	* Their programs will be concatenated to populate the PAT	11	* Their programs will be concatenated to populate the PAT
		12	* Their events will be concatenated to populate the EIT
12	* For each program in the PAT, a PMT section will be created	13	* For each program in the PAT, a PMT section will be created
13	* The PMT section for a channel will be assigned its streams.	14	* The PMT section for a channel will be assigned its streams.
14	* Every stream will have its corresponding encoder polled to produce TS packets	15	* Every stream will have its corresponding encoder polled to produce TS packets
@@ -18,22 +19,22 @@ · 3 unmodified lines
18	* Copyright (C) 2020 Daniel W. S. Almeida	19	* Copyright (C) 2020 Daniel W. S. Almeida
19	*/	20	*/
20		21
21	#include <linux/types.h>
22	#include <linux/slab.h>
23	#include <linux/dev_printk.h>	22	#include <linux/dev_printk.h>
24	#include <linux/ratelimit.h>	23	#include <linux/ratelimit.h>
		24	#include <linux/slab.h>
		25	#include <linux/types.h>
25		26
26	#include "vidtv_channel.h"	27	#include "vidtv_channel.h"
27	#include "vidtv_psi.h"	28	#include "vidtv_common.h"
28	#include "vidtv_encoder.h"	29	#include "vidtv_encoder.h"
29	#include "vidtv_mux.h"	30	#include "vidtv_mux.h"
30	#include "vidtv_common.h"	31	#include "vidtv_psi.h"
31	#include "vidtv_s302m.h"	32	#include "vidtv_s302m.h"
32		33
33	static void vidtv_channel_encoder_destroy(struct vidtv_encoder *e)	34	static void vidtv_channel_encoder_destroy(struct vidtv_encoder *e)
34	{	35	{
35	struct vidtv_encoder *curr = e;
36	struct vidtv_encoder *tmp = NULL;	36	struct vidtv_encoder *tmp = NULL;
		37	struct vidtv_encoder *curr = e;
37		38
38	while (curr) {	39	while (curr) {
39	/* forward the call to the derived type */	40	/* forward the call to the derived type */
@@ -44,55 +45,88 @@ static void vidtv_channel_encoder_destroy(struct vidtv_encoder *e) · 4 unmodified lines
44	}	45	}
45		46
46	#define ENCODING_ISO8859_15 "\x0b"	47	#define ENCODING_ISO8859_15 "\x0b"
		48	#define TS_NIT_PID 0x10
47		49
		50	/*
		51	* init an audio only channel with a s302m encoder
		52	*/
48	struct vidtv_channel	53	struct vidtv_channel
49	vidtv_channel_s302m_init(struct vidtv_channel head, u16 transport_stream_id)	54	vidtv_channel_s302m_init(struct vidtv_channel head, u16 transport_stream_id)
50	{	55	{
51	/*
52	* init an audio only channel with a s302m encoder
53	*/
54	const u16 s302m_service_id = 0x880;
55	const u16 s302m_program_num = 0x880;
56	const u16 s302m_program_pid = 0x101; /* packet id for PMT*/
57	const u16 s302m_es_pid = 0x111; /* packet id for the ES */
58	const __be32 s302m_fid = cpu_to_be32(VIDTV_S302M_FORMAT_IDENTIFIER);	56	const __be32 s302m_fid = cpu_to_be32(VIDTV_S302M_FORMAT_IDENTIFIER);
59		57	char *event_text = ENCODING_ISO8859_15 "Bagatelle No. 25 in A minor for solo piano, also known as F\xfcr Elise, composed by Ludwig van Beethoven";
60	char *name = ENCODING_ISO8859_15 "Beethoven";	58	char *event_name = ENCODING_ISO8859_15 "Ludwig van Beethoven: F\xfcr Elise";
		59	struct vidtv_s302m_encoder_init_args encoder_args = {};
		60	char *iso_language_code = ENCODING_ISO8859_15 "eng";
61	char *provider = ENCODING_ISO8859_15 "LinuxTV.org";	61	char *provider = ENCODING_ISO8859_15 "LinuxTV.org";
		62	char *name = ENCODING_ISO8859_15 "Beethoven";
		63	const u16 s302m_es_pid = 0x111; /* packet id for the ES */
		64	const u16 s302m_program_pid = 0x101; /* packet id for PMT*/
		65	const u16 s302m_service_id = 0x880;
		66	const u16 s302m_program_num = 0x880;
		67	const u16 s302m_beethoven_event_id = 1;
		68	struct vidtv_channel *s302m;
62		69
63	struct vidtv_channel s302m = kzalloc(sizeof(s302m), GFP_KERNEL);	70	s302m = kzalloc(sizeof(*s302m), GFP_KERNEL);
64	struct vidtv_s302m_encoder_init_args encoder_args = {};	71	if (!s302m)
		72	return NULL;
65		73
66	s302m->name = kstrdup(name, GFP_KERNEL);	74	s302m->name = kstrdup(name, GFP_KERNEL);
		75	if (!s302m->name)
		76	goto free_s302m;
67		77
68	s302m->service = vidtv_psi_sdt_service_init(NULL, s302m_service_id);	78	s302m->service = vidtv_psi_sdt_service_init(NULL, s302m_service_id, false, true);
		79	if (!s302m->service)
		80	goto free_name;
69		81
70	s302m->service->descriptor = (struct vidtv_psi_desc *)	82	s302m->service->descriptor = (struct vidtv_psi_desc *)
71	vidtv_psi_service_desc_init(NULL,	83	vidtv_psi_service_desc_init(NULL,
72	DIGITAL_TELEVISION_SERVICE,	84	DIGITAL_RADIO_SOUND_SERVICE,
73	name,	85	name,
74	provider);	86	provider);
		87	if (!s302m->service->descriptor)
		88	goto free_service;
75		89
76	s302m->transport_stream_id = transport_stream_id;	90	s302m->transport_stream_id = transport_stream_id;
77		91
78	s302m->program = vidtv_psi_pat_program_init(NULL,	92	s302m->program = vidtv_psi_pat_program_init(NULL,
79	s302m_service_id,	93	s302m_service_id,
80	s302m_program_pid);	94	s302m_program_pid);
		95	if (!s302m->program)
		96	goto free_service;
81		97
82	s302m->program_num = s302m_program_num;	98	s302m->program_num = s302m_program_num;
83		99
84	s302m->streams = vidtv_psi_pmt_stream_init(NULL,	100	s302m->streams = vidtv_psi_pmt_stream_init(NULL,
85	STREAM_PRIVATE_DATA,	101	STREAM_PRIVATE_DATA,
86	s302m_es_pid);	102	s302m_es_pid);
		103	if (!s302m->streams)
		104	goto free_program;
87		105
88	s302m->streams->descriptor = (struct vidtv_psi_desc *)	106	s302m->streams->descriptor = (struct vidtv_psi_desc *)
89	vidtv_psi_registration_desc_init(NULL,	107	vidtv_psi_registration_desc_init(NULL,
90	s302m_fid,	108	s302m_fid,
91	NULL,	109	NULL,
92	0);	110	0);
		111	if (!s302m->streams->descriptor)
		112	goto free_streams;
		113
93	encoder_args.es_pid = s302m_es_pid;	114	encoder_args.es_pid = s302m_es_pid;
94		115
95	s302m->encoders = vidtv_s302m_encoder_init(encoder_args);	116	s302m->encoders = vidtv_s302m_encoder_init(encoder_args);
		117	if (!s302m->encoders)
		118	goto free_streams;
		119
		120	s302m->events = vidtv_psi_eit_event_init(NULL, s302m_beethoven_event_id);
		121	if (!s302m->events)
		122	goto free_encoders;
		123	s302m->events->descriptor = (struct vidtv_psi_desc *)
		124	vidtv_psi_short_event_desc_init(NULL,
		125	iso_language_code,
		126	event_name,
		127	event_text);
		128	if (!s302m->events->descriptor)
		129	goto free_events;
96		130
97	if (head) {	131	if (head) {
98	while (head->next)	132	while (head->next)
@@ -102,6 +136,68 @@ struct vidtv_channel · 3 unmodified lines
102	}	136	}
103		137
104	return s302m;	138	return s302m;
		139
		140	free_events:
		141	vidtv_psi_eit_event_destroy(s302m->events);
		142	free_encoders:
		143	vidtv_s302m_encoder_destroy(s302m->encoders);
		144	free_streams:
		145	vidtv_psi_pmt_stream_destroy(s302m->streams);
		146	free_program:
		147	vidtv_psi_pat_program_destroy(s302m->program);
		148	free_service:
		149	vidtv_psi_sdt_service_destroy(s302m->service);
		150	free_name:
		151	kfree(s302m->name);
		152	free_s302m:
		153	kfree(s302m);
		154
		155	return NULL;
		156	}
		157
		158	static struct vidtv_psi_table_eit_event
		159	vidtv_channel_eit_event_cat_into_new(struct vidtv_mux m)
		160	{
		161	/* Concatenate the events */
		162	const struct vidtv_channel *cur_chnl = m->channels;
		163	struct vidtv_psi_table_eit_event *curr = NULL;
		164	struct vidtv_psi_table_eit_event *head = NULL;
		165	struct vidtv_psi_table_eit_event *tail = NULL;
		166	struct vidtv_psi_desc *desc = NULL;
		167	u16 event_id;
		168
		169	if (!cur_chnl)
		170	return NULL;
		171
		172	while (cur_chnl) {
		173	curr = cur_chnl->events;
		174
		175	if (!curr)
		176	dev_warn_ratelimited(m->dev,
		177	"No events found for channel %s\n",
		178	cur_chnl->name);
		179
		180	while (curr) {
		181	event_id = be16_to_cpu(curr->event_id);
		182	tail = vidtv_psi_eit_event_init(tail, event_id);
		183	if (!tail) {
		184	vidtv_psi_eit_event_destroy(head);
		185	return NULL;
		186	}
		187
		188	desc = vidtv_psi_desc_clone(curr->descriptor);
		189	vidtv_psi_desc_assign(&tail->descriptor, desc);
		190
		191	if (!head)
		192	head = tail;
		193
		194	curr = curr->next;
		195	}
		196
		197	cur_chnl = cur_chnl->next;
		198	}
		199
		200	return head;
105	}	201	}
106		202
107	static struct vidtv_psi_table_sdt_service	203	static struct vidtv_psi_table_sdt_service
@@ -125,13 +221,21 @@ static struct vidtv_psi_table_sdt_service · 17 unmodified lines
125		221
126	if (!curr)	222	if (!curr)
127	dev_warn_ratelimited(m->dev,	223	dev_warn_ratelimited(m->dev,
128	"No services found for channel %s\n", cur_chnl->name);	224	"No services found for channel %s\n",
		225	cur_chnl->name);
129		226
130	while (curr) {	227	while (curr) {
131	service_id = be16_to_cpu(curr->service_id);	228	service_id = be16_to_cpu(curr->service_id);
132	tail = vidtv_psi_sdt_service_init(tail, service_id);	229	tail = vidtv_psi_sdt_service_init(tail,
		230	service_id,
		231	curr->EIT_schedule,
		232	curr->EIT_present_following);
		233	if (!tail)
		234	goto free;
133		235
134	desc = vidtv_psi_desc_clone(curr->descriptor);	236	desc = vidtv_psi_desc_clone(curr->descriptor);
		237	if (!desc)
		238	goto free_tail;
135	vidtv_psi_desc_assign(&tail->descriptor, desc);	239	vidtv_psi_desc_assign(&tail->descriptor, desc);
136		240
137	if (!head)	241	if (!head)
@@ -144,6 +248,12 @@ static struct vidtv_psi_table_sdt_service · 6 unmodified lines
144	}	248	}
145		249
146	return head;	250	return head;
		251
		252	free_tail:
		253	vidtv_psi_sdt_service_destroy(tail);
		254	free:
		255	vidtv_psi_sdt_service_destroy(head);
		256	return NULL;
147	}	257	}
148		258
149	static struct vidtv_psi_table_pat_program*	259	static struct vidtv_psi_table_pat_program*
@@ -174,6 +284,10 @@ vidtv_channel_pat_prog_cat_into_new(struct vidtv_mux *m) · 24 unmodified lines
174	tail = vidtv_psi_pat_program_init(tail,	284	tail = vidtv_psi_pat_program_init(tail,
175	serv_id,	285	serv_id,
176	pid);	286	pid);
		287	if (!tail) {
		288	vidtv_psi_pat_program_destroy(head);
		289	return NULL;
		290	}
177		291
178	if (!head)	292	if (!head)
179	head = tail;	293	head = tail;
@@ -183,30 +297,30 @@ vidtv_channel_pat_prog_cat_into_new(struct vidtv_mux *m) · 3 unmodified lines
183		297
184	cur_chnl = cur_chnl->next;	298	cur_chnl = cur_chnl->next;
185	}	299	}
		300	/* Add the NIT table */
		301	vidtv_psi_pat_program_init(tail, 0, TS_NIT_PID);
186		302
187	return head;	303	return head;
188	}	304	}
189		305
		306	/*
		307	* Match channels to their respective PMT sections, then assign the
		308	* streams
		309	*/
190	static void	310	static void
191	vidtv_channel_pmt_match_sections(struct vidtv_channel *channels,	311	vidtv_channel_pmt_match_sections(struct vidtv_channel *channels,
192	struct vidtv_psi_table_pmt **sections,	312	struct vidtv_psi_table_pmt **sections,
193	u32 nsections)	313	u32 nsections)
194	{	314	{
195	/*
196	* Match channels to their respective PMT sections, then assign the
197	* streams
198	*/
199	struct vidtv_psi_table_pmt *curr_section = NULL;	315	struct vidtv_psi_table_pmt *curr_section = NULL;
200	struct vidtv_channel *cur_chnl = channels;
201
202	struct vidtv_psi_table_pmt_stream *s = NULL;
203	struct vidtv_psi_table_pmt_stream *head = NULL;	316	struct vidtv_psi_table_pmt_stream *head = NULL;
204	struct vidtv_psi_table_pmt_stream *tail = NULL;	317	struct vidtv_psi_table_pmt_stream *tail = NULL;
205		318	struct vidtv_psi_table_pmt_stream *s = NULL;
		319	struct vidtv_channel *cur_chnl = channels;
206	struct vidtv_psi_desc *desc = NULL;	320	struct vidtv_psi_desc *desc = NULL;
207	u32 j;
208	u16 curr_id;
209	u16 e_pid; /* elementary stream pid */	321	u16 e_pid; /* elementary stream pid */
		322	u16 curr_id;
		323	u32 j;
210		324
211	while (cur_chnl) {	325	while (cur_chnl) {
212	for (j = 0; j < nsections; ++j) {	326	for (j = 0; j < nsections; ++j) {
@@ -232,7 +346,8 @@ vidtv_channel_pmt_match_sections(struct vidtv_channel *channels, · 19 unmodified lines
232	head = tail;	346	head = tail;
233		347
234	desc = vidtv_psi_desc_clone(s->descriptor);	348	desc = vidtv_psi_desc_clone(s->descriptor);
235	vidtv_psi_desc_assign(&tail->descriptor, desc);	349	vidtv_psi_desc_assign(&tail->descriptor,
		350	desc);
236		351
237	s = s->next;	352	s = s->next;
238	}	353	}
@@ -246,17 +361,103 @@ vidtv_channel_pmt_match_sections(struct vidtv_channel *channels, · 7 unmodified lines
246	}	361	}
247	}	362	}
248		363
249	void vidtv_channel_si_init(struct vidtv_mux *m)	364	static void
		365	vidtv_channel_destroy_service_list(struct vidtv_psi_desc_service_list_entry *e)
		366	{
		367	struct vidtv_psi_desc_service_list_entry *tmp;
		368
		369	while (e) {
		370	tmp = e;
		371	e = e->next;
		372	kfree(tmp);
		373	}
		374	}
		375
		376	static struct vidtv_psi_desc_service_list_entry
		377	vidtv_channel_build_service_list(struct vidtv_psi_table_sdt_service s)
		378	{
		379	struct vidtv_psi_desc_service_list_entry *curr_e = NULL;
		380	struct vidtv_psi_desc_service_list_entry *head_e = NULL;
		381	struct vidtv_psi_desc_service_list_entry *prev_e = NULL;
		382	struct vidtv_psi_desc *desc = s->descriptor;
		383	struct vidtv_psi_desc_service *s_desc;
		384
		385	while (s) {
		386	while (desc) {
		387	if (s->descriptor->type != SERVICE_DESCRIPTOR)
		388	goto next_desc;
		389
		390	s_desc = (struct vidtv_psi_desc_service *)desc;
		391
		392	curr_e = kzalloc(sizeof(*curr_e), GFP_KERNEL);
		393	if (!curr_e) {
		394	vidtv_channel_destroy_service_list(head_e);
		395	return NULL;
		396	}
		397
		398	curr_e->service_id = s->service_id;
		399	curr_e->service_type = s_desc->service_type;
		400
		401	if (!head_e)
		402	head_e = curr_e;
		403	if (prev_e)
		404	prev_e->next = curr_e;
		405
		406	prev_e = curr_e;
		407
		408	next_desc:
		409	desc = desc->next;
		410	}
		411	s = s->next;
		412	}
		413	return head_e;
		414	}
		415
		416	int vidtv_channel_si_init(struct vidtv_mux *m)
250	{	417	{
		418	struct vidtv_psi_desc_service_list_entry *service_list = NULL;
251	struct vidtv_psi_table_pat_program *programs = NULL;	419	struct vidtv_psi_table_pat_program *programs = NULL;
252	struct vidtv_psi_table_sdt_service *services = NULL;	420	struct vidtv_psi_table_sdt_service *services = NULL;
		421	struct vidtv_psi_table_eit_event *events = NULL;
253		422
254	m->si.pat = vidtv_psi_pat_table_init(m->transport_stream_id);	423	m->si.pat = vidtv_psi_pat_table_init(m->transport_stream_id);
		424	if (!m->si.pat)
		425	return -ENOMEM;
255		426
256	m->si.sdt = vidtv_psi_sdt_table_init(m->transport_stream_id);	427	m->si.sdt = vidtv_psi_sdt_table_init(m->network_id,
		428	m->transport_stream_id);
		429	if (!m->si.sdt)
		430	goto free_pat;
257		431
258	programs = vidtv_channel_pat_prog_cat_into_new(m);	432	programs = vidtv_channel_pat_prog_cat_into_new(m);
		433	if (!programs)
		434	goto free_sdt;
259	services = vidtv_channel_sdt_serv_cat_into_new(m);	435	services = vidtv_channel_sdt_serv_cat_into_new(m);
		436	if (!services)
		437	goto free_programs;
		438
		439	events = vidtv_channel_eit_event_cat_into_new(m);
		440	if (!events)
		441	goto free_services;
		442
		443	/* look for a service descriptor for every service */
		444	service_list = vidtv_channel_build_service_list(services);
		445	if (!service_list)
		446	goto free_events;
		447
		448	/* use these descriptors to build the NIT */
		449	m->si.nit = vidtv_psi_nit_table_init(m->network_id,
		450	m->transport_stream_id,
		451	m->network_name,
		452	service_list);
		453	if (!m->si.nit)
		454	goto free_service_list;
		455
		456	m->si.eit = vidtv_psi_eit_table_init(m->network_id,
		457	m->transport_stream_id,
		458	programs->service_id);
		459	if (!m->si.eit)
		460	goto free_nit;
260		461
261	/* assemble all programs and assign to PAT */	462	/* assemble all programs and assign to PAT */
262	vidtv_psi_pat_program_assign(m->si.pat, programs);	463	vidtv_psi_pat_program_assign(m->si.pat, programs);
@@ -264,31 +465,65 @@ void vidtv_channel_si_init(struct vidtv_mux *m) · 1 unmodified line
264	/* assemble all services and assign to SDT */	465	/* assemble all services and assign to SDT */
265	vidtv_psi_sdt_service_assign(m->si.sdt, services);	466	vidtv_psi_sdt_service_assign(m->si.sdt, services);
266		467
267	m->si.pmt_secs = vidtv_psi_pmt_create_sec_for_each_pat_entry(m->si.pat, m->pcr_pid);	468	/* assemble all events and assign to EIT */
		469	vidtv_psi_eit_event_assign(m->si.eit, events);
		470
		471	m->si.pmt_secs = vidtv_psi_pmt_create_sec_for_each_pat_entry(m->si.pat,
		472	m->pcr_pid);
		473	if (!m->si.pmt_secs)
		474	goto free_eit;
268		475
269	vidtv_channel_pmt_match_sections(m->channels,	476	vidtv_channel_pmt_match_sections(m->channels,
270	m->si.pmt_secs,	477	m->si.pmt_secs,
271	m->si.pat->programs);	478	m->si.pat->num_pmt);
		479
		480	vidtv_channel_destroy_service_list(service_list);
		481
		482	return 0;
		483
		484	free_eit:
		485	vidtv_psi_eit_table_destroy(m->si.eit);
		486	free_nit:
		487	vidtv_psi_nit_table_destroy(m->si.nit);
		488	free_service_list:
		489	vidtv_channel_destroy_service_list(service_list);
		490	free_events:
		491	vidtv_psi_eit_event_destroy(events);
		492	free_services:
		493	vidtv_psi_sdt_service_destroy(services);
		494	free_programs:
		495	vidtv_psi_pat_program_destroy(programs);
		496	free_sdt:
		497	vidtv_psi_sdt_table_destroy(m->si.sdt);
		498	free_pat:
		499	vidtv_psi_pat_table_destroy(m->si.pat);
		500	return 0;
272	}	501	}
273		502
274	void vidtv_channel_si_destroy(struct vidtv_mux *m)	503	void vidtv_channel_si_destroy(struct vidtv_mux *m)
275	{	504	{
276	u32 i;	505	u32 i;
277	u16 num_programs = m->si.pat->programs;
278		506
279	vidtv_psi_pat_table_destroy(m->si.pat);	507	vidtv_psi_pat_table_destroy(m->si.pat);
280		508
281	for (i = 0; i < num_programs; ++i)	509	for (i = 0; i < m->si.pat->num_pmt; ++i)
282	vidtv_psi_pmt_table_destroy(m->si.pmt_secs[i]);	510	vidtv_psi_pmt_table_destroy(m->si.pmt_secs[i]);
283		511
284	kfree(m->si.pmt_secs);	512	kfree(m->si.pmt_secs);
285	vidtv_psi_sdt_table_destroy(m->si.sdt);	513	vidtv_psi_sdt_table_destroy(m->si.sdt);
		514	vidtv_psi_nit_table_destroy(m->si.nit);
		515	vidtv_psi_eit_table_destroy(m->si.eit);
286	}	516	}
287		517
288	void vidtv_channels_init(struct vidtv_mux *m)	518	int vidtv_channels_init(struct vidtv_mux *m)
289	{	519	{
290	/* this is the place to add new 'channels' for vidtv */	520	/* this is the place to add new 'channels' for vidtv */
291	m->channels = vidtv_channel_s302m_init(NULL, m->transport_stream_id);	521	m->channels = vidtv_channel_s302m_init(NULL, m->transport_stream_id);
		522
		523	if (!m->channels)
		524	return -ENOMEM;
		525
		526	return 0;
292	}	527	}
293		528
294	void vidtv_channels_destroy(struct vidtv_mux *m)	529	void vidtv_channels_destroy(struct vidtv_mux *m)
@@ -302,6 +537,7 @@ void vidtv_channels_destroy(struct vidtv_mux *m) · 7 unmodified lines
302	vidtv_psi_pat_program_destroy(curr->program);	537	vidtv_psi_pat_program_destroy(curr->program);
303	vidtv_psi_pmt_stream_destroy(curr->streams);	538	vidtv_psi_pmt_stream_destroy(curr->streams);
304	vidtv_channel_encoder_destroy(curr->encoders);	539	vidtv_channel_encoder_destroy(curr->encoders);
		540	vidtv_psi_eit_event_destroy(curr->events);
305		541
306	tmp = curr;	542	tmp = curr;
307	curr = curr->next;	543	curr = curr->next;

drivers/media/test-drivers/vidtv/vidtv_channel.h+8−3

@@ -9,6 +9,7 @@ · 8 unmodified lines
9	* When vidtv boots, it will create some hardcoded channels.	9	* When vidtv boots, it will create some hardcoded channels.
10	* Their services will be concatenated to populate the SDT.	10	* Their services will be concatenated to populate the SDT.
11	* Their programs will be concatenated to populate the PAT	11	* Their programs will be concatenated to populate the PAT
		12	* Their events will be concatenated to populate the EIT
12	* For each program in the PAT, a PMT section will be created	13	* For each program in the PAT, a PMT section will be created
13	* The PMT section for a channel will be assigned its streams.	14	* The PMT section for a channel will be assigned its streams.
14	* Every stream will have its corresponding encoder polled to produce TS packets	15	* Every stream will have its corresponding encoder polled to produce TS packets
@@ -22,9 +23,10 @@ · 7 unmodified lines
22	#define VIDTV_CHANNEL_H	23	#define VIDTV_CHANNEL_H
23		24
24	#include <linux/types.h>	25	#include <linux/types.h>
25	#include "vidtv_psi.h"	26
26	#include "vidtv_encoder.h"	27	#include "vidtv_encoder.h"
27	#include "vidtv_mux.h"	28	#include "vidtv_mux.h"
		29	#include "vidtv_psi.h"
28		30
29	/**	31	/**
30	* struct vidtv_channel - A 'channel' abstraction	32	* struct vidtv_channel - A 'channel' abstraction
@@ -37,6 +39,7 @@ · 6 unmodified lines
37	* Every stream will have its corresponding encoder polled to produce TS packets	39	* Every stream will have its corresponding encoder polled to produce TS packets
38	* These packets may be interleaved by the mux and then delivered to the bridge	40	* These packets may be interleaved by the mux and then delivered to the bridge
39	*	41	*
		42	* @name: name of the channel
40	* @transport_stream_id: a number to identify the TS, chosen at will.	43	* @transport_stream_id: a number to identify the TS, chosen at will.
41	* @service: A _single_ service. Will be concatenated into the SDT.	44	* @service: A _single_ service. Will be concatenated into the SDT.
42	* @program_num: The link between PAT, PMT and SDT.	45	* @program_num: The link between PAT, PMT and SDT.
@@ -44,6 +47,7 @@ · 1 unmodified line
44	* Will be concatenated into the PAT.	47	* Will be concatenated into the PAT.
45	* @streams: A stream loop used to populate the PMT section for 'program'	48	* @streams: A stream loop used to populate the PMT section for 'program'
46	* @encoders: A encoder loop. There must be one encoder for each stream.	49	* @encoders: A encoder loop. There must be one encoder for each stream.
		50	* @events: Optional event information. This will feed into the EIT.
47	* @next: Optionally chain this channel.	51	* @next: Optionally chain this channel.
48	*/	52	*/
49	struct vidtv_channel {	53	struct vidtv_channel {
@@ -54,6 +58,7 @@ struct vidtv_channel { · 4 unmodified lines
54	struct vidtv_psi_table_pat_program *program;	58	struct vidtv_psi_table_pat_program *program;
55	struct vidtv_psi_table_pmt_stream *streams;	59	struct vidtv_psi_table_pmt_stream *streams;
56	struct vidtv_encoder *encoders;	60	struct vidtv_encoder *encoders;
		61	struct vidtv_psi_table_eit_event *events;
57	struct vidtv_channel *next;	62	struct vidtv_channel *next;
58	};	63	};
59		64
@@ -61,14 +66,14 @@ struct vidtv_channel { · 1 unmodified line
61	* vidtv_channel_si_init - Init the PSI tables from the channels in the mux	66	* vidtv_channel_si_init - Init the PSI tables from the channels in the mux
62	* @m: The mux containing the channels.	67	* @m: The mux containing the channels.
63	*/	68	*/
64	void vidtv_channel_si_init(struct vidtv_mux *m);	69	int vidtv_channel_si_init(struct vidtv_mux *m);
65	void vidtv_channel_si_destroy(struct vidtv_mux *m);	70	void vidtv_channel_si_destroy(struct vidtv_mux *m);
66		71
67	/**	72	/**
68	* vidtv_channels_init - Init hardcoded, fake 'channels'.	73	* vidtv_channels_init - Init hardcoded, fake 'channels'.
69	* @m: The mux to store the channels into.	74	* @m: The mux to store the channels into.
70	*/	75	*/
71	void vidtv_channels_init(struct vidtv_mux *m);	76	int vidtv_channels_init(struct vidtv_mux *m);
72	struct vidtv_channel	77	struct vidtv_channel
73	vidtv_channel_s302m_init(struct vidtv_channel head, u16 transport_stream_id);	78	vidtv_channel_s302m_init(struct vidtv_channel head, u16 transport_stream_id);
74	void vidtv_channels_destroy(struct vidtv_mux *m);	79	void vidtv_channels_destroy(struct vidtv_mux *m);

drivers/media/test-drivers/vidtv/vidtv_common.h+0−1

@@ -16,7 +16,6 @@ · 15 unmodified lines
16	#define CLOCK_UNIT_27MHZ 27000000	16	#define CLOCK_UNIT_27MHZ 27000000
17	#define VIDTV_SLEEP_USECS 10000	17	#define VIDTV_SLEEP_USECS 10000
18	#define VIDTV_MAX_SLEEP_USECS (2 * VIDTV_SLEEP_USECS)	18	#define VIDTV_MAX_SLEEP_USECS (2 * VIDTV_SLEEP_USECS)
19	#define VIDTV_DEFAULT_TS_ID 0x744
20		19
21	u32 vidtv_memcpy(void *to,	20	u32 vidtv_memcpy(void *to,
22	size_t to_offset,	21	size_t to_offset,

drivers/media/test-drivers/vidtv/vidtv_demod.c+1−1

@@ -19,6 +19,7 @@ · 18 unmodified lines
19	#include <linux/slab.h>	19	#include <linux/slab.h>
20	#include <linux/string.h>	20	#include <linux/string.h>
21	#include <linux/workqueue.h>	21	#include <linux/workqueue.h>
		22
22	#include <media/dvb_frontend.h>	23	#include <media/dvb_frontend.h>
23		24
24	#include "vidtv_demod.h"	25	#include "vidtv_demod.h"
@@ -192,7 +193,6 @@ static void vidtv_demod_update_stats(struct dvb_frontend *fe) · 167 unmodified lines
192		193
193	c->cnr.stat[0].svalue = state->tuner_cnr;	194	c->cnr.stat[0].svalue = state->tuner_cnr;
194	c->cnr.stat[0].svalue -= prandom_u32_max(state->tuner_cnr / 50);	195	c->cnr.stat[0].svalue -= prandom_u32_max(state->tuner_cnr / 50);
195
196	}	196	}
197		197
198	static int vidtv_demod_read_status(struct dvb_frontend *fe,	198	static int vidtv_demod_read_status(struct dvb_frontend *fe,

drivers/media/test-drivers/vidtv/vidtv_demod.h+5−6

 #define VIDTV_DEMOD_H
 #include <linux/dvb/frontend.h>
 #include <media/dvb_frontend.h>
 /**
  * modulation and fec_inner
  * @modulation: see enum fe_modulation
  * @fec: see enum fe_fec_rate
+ * @cnr_ok: S/N threshold to consider the signal as OK. Below that, there's
+ *          a chance of losing sync.
+ * @cnr_good: S/N threshold to consider the signal strong.
  *
  * This struct matches values for 'good' and 'ok' CNRs given the combination
  * of modulation and fec_inner in use. We might simulate some noise if the
  * struct vidtv_demod_state - The demodulator state
  * @frontend: The frontend structure allocated by the demod.
  * @config: The config used to init the demod.
- * @poll_snr: The task responsible for periodically checking the simulated
- * signal quality, eventually dropping or reacquiring the TS lock.
  * @status: the demod status.
- * @cold_start: Whether the demod has not been init yet.
+ * @tuner_cnr: current S/N ratio for the signal carrier
- * @poll_snr_thread_running: Whether the task responsible for periodically
- * checking the simulated signal quality is running.
- * @poll_snr_thread_restart: Whether we should restart the poll_snr task.
  */
 struct vidtv_demod_state {
 	struct dvb_frontend frontend;

drivers/media/test-drivers/vidtv/vidtv_encoder.h+4−5

 	struct vidtv_access_unit *next;
 };
-/* Some musical notes, used by a tone generator */
+/* Some musical notes, used by a tone generator. Values are in Hz */
 enum musical_notes {
 	NOTE_SILENT = 0,
  * @encoder_buf_sz: The encoder buffer size, in bytes
  * @encoder_buf_offset: Our byte position in the encoder buffer.
  * @sample_count: How many samples we have encoded in total.
+ * @access_units: encoder payload units, used for clock references
  * @src_buf: The source of raw data to be encoded, encoder might set a
  * default if null.
+ * @src_buf_sz: size of @src_buf.
  * @src_buf_offset: Our position in the source buffer.
  * @is_video_encoder: Whether this a video encoder (as opposed to audio)
  * @ctx: Encoder-specific state.
  * @stream_id: Examples: Audio streams (0xc0-0xdf), Video streams
  * (0xe0-0xef).
- * @es_id: The TS PID to use for the elementary stream in this encoder.
+ * @es_pid: The TS PID to use for the elementary stream in this encoder.
  * @encode: Prepare enough AUs for the given amount of time.
  * @clear: Clear the encoder output.
  * @sync: Attempt to synchronize with this encoder.
 	u32 encoder_buf_offset;
 	u64 sample_count;
-	int last_duration;
-	int note_offset;
-	enum musical_notes last_tone;
 	struct vidtv_access_unit *access_units;

drivers/media/test-drivers/vidtv/vidtv_mux.c+160−88

@@ -12,23 +12,23 @@ · 11 unmodified lines
12	* Copyright (C) 2020 Daniel W. S. Almeida	12	* Copyright (C) 2020 Daniel W. S. Almeida
13	*/	13	*/
14		14
15	#include <linux/types.h>	15	#include <linux/delay.h>
16	#include <linux/slab.h>	16	#include <linux/dev_printk.h>
17	#include <linux/jiffies.h>	17	#include <linux/jiffies.h>
18	#include <linux/kernel.h>	18	#include <linux/kernel.h>
19	#include <linux/dev_printk.h>	19	#include <linux/math64.h>
20	#include <linux/ratelimit.h>	20	#include <linux/ratelimit.h>
21	#include <linux/delay.h>	21	#include <linux/slab.h>
		22	#include <linux/types.h>
22	#include <linux/vmalloc.h>	23	#include <linux/vmalloc.h>
23	#include <linux/math64.h>
24		24
25	#include "vidtv_mux.h"
26	#include "vidtv_ts.h"
27	#include "vidtv_pes.h"
28	#include "vidtv_encoder.h"
29	#include "vidtv_channel.h"	25	#include "vidtv_channel.h"
30	#include "vidtv_common.h"	26	#include "vidtv_common.h"
		27	#include "vidtv_encoder.h"
		28	#include "vidtv_mux.h"
		29	#include "vidtv_pes.h"
31	#include "vidtv_psi.h"	30	#include "vidtv_psi.h"
		31	#include "vidtv_ts.h"
32		32
33	static struct vidtv_mux_pid_ctx	33	static struct vidtv_mux_pid_ctx
34	vidtv_mux_get_pid_ctx(struct vidtv_mux m, u16 pid)	34	vidtv_mux_get_pid_ctx(struct vidtv_mux m, u16 pid)
@@ -47,33 +47,56 @@ static struct vidtv_mux_pid_ctx · 12 unmodified lines
47	struct vidtv_mux_pid_ctx *ctx;	47	struct vidtv_mux_pid_ctx *ctx;
48		48
49	ctx = vidtv_mux_get_pid_ctx(m, pid);	49	ctx = vidtv_mux_get_pid_ctx(m, pid);
50
51	if (ctx)	50	if (ctx)
52	goto end;	51	return ctx;
		52
		53	ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
		54	if (!ctx)
		55	return NULL;
53		56
54	ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
55	ctx->pid = pid;	57	ctx->pid = pid;
56	ctx->cc = 0;	58	ctx->cc = 0;
57	hash_add(m->pid_ctx, &ctx->h, pid);	59	hash_add(m->pid_ctx, &ctx->h, pid);
58		60
59	end:
60	return ctx;	61	return ctx;
61	}	62	}
62		63
63	static void vidtv_mux_pid_ctx_init(struct vidtv_mux *m)	64	static void vidtv_mux_pid_ctx_destroy(struct vidtv_mux *m)
		65	{
		66	struct vidtv_mux_pid_ctx *ctx;
		67	struct hlist_node *tmp;
		68	int bkt;
		69
		70	hash_for_each_safe(m->pid_ctx, bkt, tmp, ctx, h) {
		71	hash_del(&ctx->h);
		72	kfree(ctx);
		73	}
		74	}
		75
		76	static int vidtv_mux_pid_ctx_init(struct vidtv_mux *m)
64	{	77	{
65	struct vidtv_psi_table_pat_program *p = m->si.pat->program;	78	struct vidtv_psi_table_pat_program *p = m->si.pat->program;
66	u16 pid;	79	u16 pid;
67		80
68	hash_init(m->pid_ctx);	81	hash_init(m->pid_ctx);
69	/* push the pcr pid ctx */	82	/* push the pcr pid ctx */
70	vidtv_mux_create_pid_ctx_once(m, m->pcr_pid);	83	if (!vidtv_mux_create_pid_ctx_once(m, m->pcr_pid))
71	/* push the null packet pid ctx */	84	return -ENOMEM;
72	vidtv_mux_create_pid_ctx_once(m, TS_NULL_PACKET_PID);	85	/* push the NULL packet pid ctx */
		86	if (!vidtv_mux_create_pid_ctx_once(m, TS_NULL_PACKET_PID))
		87	goto free;
73	/* push the PAT pid ctx */	88	/* push the PAT pid ctx */
74	vidtv_mux_create_pid_ctx_once(m, VIDTV_PAT_PID);	89	if (!vidtv_mux_create_pid_ctx_once(m, VIDTV_PAT_PID))
		90	goto free;
75	/* push the SDT pid ctx */	91	/* push the SDT pid ctx */
76	vidtv_mux_create_pid_ctx_once(m, VIDTV_SDT_PID);	92	if (!vidtv_mux_create_pid_ctx_once(m, VIDTV_SDT_PID))
		93	goto free;
		94	/* push the NIT pid ctx */
		95	if (!vidtv_mux_create_pid_ctx_once(m, VIDTV_NIT_PID))
		96	goto free;
		97	/* push the EIT pid ctx */
		98	if (!vidtv_mux_create_pid_ctx_once(m, VIDTV_EIT_PID))
		99	goto free;
77		100
78	/* add a ctx for all PMT sections */	101	/* add a ctx for all PMT sections */
79	while (p) {	102	while (p) {
@@ -81,18 +104,12 @@ static void vidtv_mux_pid_ctx_init(struct vidtv_mux *m) · 1 unmodified line
81	vidtv_mux_create_pid_ctx_once(m, pid);	104	vidtv_mux_create_pid_ctx_once(m, pid);
82	p = p->next;	105	p = p->next;
83	}	106	}
84	}
85		107
86	static void vidtv_mux_pid_ctx_destroy(struct vidtv_mux *m)	108	return 0;
87	{
88	int bkt;
89	struct vidtv_mux_pid_ctx *ctx;
90	struct hlist_node *tmp;
91		109
92	hash_for_each_safe(m->pid_ctx, bkt, tmp, ctx, h) {	110	free:
93	hash_del(&ctx->h);	111	vidtv_mux_pid_ctx_destroy(m);
94	kfree(ctx);	112	return -ENOMEM;
95	}
96	}	113	}
97		114
98	static void vidtv_mux_update_clk(struct vidtv_mux *m)	115	static void vidtv_mux_update_clk(struct vidtv_mux *m)
@@ -112,32 +129,53 @@ static void vidtv_mux_update_clk(struct vidtv_mux *m) · 13 unmodified lines
112		129
113	static u32 vidtv_mux_push_si(struct vidtv_mux *m)	130	static u32 vidtv_mux_push_si(struct vidtv_mux *m)
114	{	131	{
		132	struct vidtv_psi_pat_write_args pat_args = {
		133	.buf = m->mux_buf,
		134	.buf_sz = m->mux_buf_sz,
		135	.pat = m->si.pat,
		136	};
		137	struct vidtv_psi_pmt_write_args pmt_args = {
		138	.buf = m->mux_buf,
		139	.buf_sz = m->mux_buf_sz,
		140	.pcr_pid = m->pcr_pid,
		141	};
		142	struct vidtv_psi_sdt_write_args sdt_args = {
		143	.buf = m->mux_buf,
		144	.buf_sz = m->mux_buf_sz,
		145	.sdt = m->si.sdt,
		146	};
		147	struct vidtv_psi_nit_write_args nit_args = {
		148	.buf = m->mux_buf,
		149	.buf_sz = m->mux_buf_sz,
		150	.nit = m->si.nit,
		151
		152	};
		153	struct vidtv_psi_eit_write_args eit_args = {
		154	.buf = m->mux_buf,
		155	.buf_sz = m->mux_buf_sz,
		156	.eit = m->si.eit,
		157	};
115	u32 initial_offset = m->mux_buf_offset;	158	u32 initial_offset = m->mux_buf_offset;
116
117	struct vidtv_mux_pid_ctx *pat_ctx;	159	struct vidtv_mux_pid_ctx *pat_ctx;
118	struct vidtv_mux_pid_ctx *pmt_ctx;	160	struct vidtv_mux_pid_ctx *pmt_ctx;
119	struct vidtv_mux_pid_ctx *sdt_ctx;	161	struct vidtv_mux_pid_ctx *sdt_ctx;
120		162	struct vidtv_mux_pid_ctx *nit_ctx;
121	struct vidtv_psi_pat_write_args pat_args = {};	163	struct vidtv_mux_pid_ctx *eit_ctx;
122	struct vidtv_psi_pmt_write_args pmt_args = {};	164	u32 nbytes;
123	struct vidtv_psi_sdt_write_args sdt_args = {};
124
125	u32 nbytes; /* the number of bytes written by this function */
126	u16 pmt_pid;	165	u16 pmt_pid;
127	u32 i;	166	u32 i;
128		167
129	pat_ctx = vidtv_mux_get_pid_ctx(m, VIDTV_PAT_PID);	168	pat_ctx = vidtv_mux_get_pid_ctx(m, VIDTV_PAT_PID);
130	sdt_ctx = vidtv_mux_get_pid_ctx(m, VIDTV_SDT_PID);	169	sdt_ctx = vidtv_mux_get_pid_ctx(m, VIDTV_SDT_PID);
		170	nit_ctx = vidtv_mux_get_pid_ctx(m, VIDTV_NIT_PID);
		171	eit_ctx = vidtv_mux_get_pid_ctx(m, VIDTV_EIT_PID);
131		172
132	pat_args.buf = m->mux_buf;
133	pat_args.offset = m->mux_buf_offset;	173	pat_args.offset = m->mux_buf_offset;
134	pat_args.pat = m->si.pat;
135	pat_args.buf_sz = m->mux_buf_sz;
136	pat_args.continuity_counter = &pat_ctx->cc;	174	pat_args.continuity_counter = &pat_ctx->cc;
137		175
138	m->mux_buf_offset += vidtv_psi_pat_write_into(pat_args);	176	m->mux_buf_offset += vidtv_psi_pat_write_into(&pat_args);
139		177
140	for (i = 0; i < m->si.pat->programs; ++i) {	178	for (i = 0; i < m->si.pat->num_pmt; ++i) {
141	pmt_pid = vidtv_psi_pmt_get_pid(m->si.pmt_secs[i],	179	pmt_pid = vidtv_psi_pmt_get_pid(m->si.pmt_secs[i],
142	m->si.pat);	180	m->si.pat);
143		181
@@ -149,25 +187,29 @@ static u32 vidtv_mux_push_si(struct vidtv_mux *m) · 5 unmodified lines
149		187
150	pmt_ctx = vidtv_mux_get_pid_ctx(m, pmt_pid);	188	pmt_ctx = vidtv_mux_get_pid_ctx(m, pmt_pid);
151		189
152	pmt_args.buf = m->mux_buf;
153	pmt_args.offset = m->mux_buf_offset;	190	pmt_args.offset = m->mux_buf_offset;
154	pmt_args.pmt = m->si.pmt_secs[i];	191	pmt_args.pmt = m->si.pmt_secs[i];
155	pmt_args.pid = pmt_pid;	192	pmt_args.pid = pmt_pid;
156	pmt_args.buf_sz = m->mux_buf_sz;
157	pmt_args.continuity_counter = &pmt_ctx->cc;	193	pmt_args.continuity_counter = &pmt_ctx->cc;
158	pmt_args.pcr_pid = m->pcr_pid;
159		194
160	/* write each section into buffer */	195	/* write each section into buffer */
161	m->mux_buf_offset += vidtv_psi_pmt_write_into(pmt_args);	196	m->mux_buf_offset += vidtv_psi_pmt_write_into(&pmt_args);
162	}	197	}
163		198
164	sdt_args.buf = m->mux_buf;
165	sdt_args.offset = m->mux_buf_offset;	199	sdt_args.offset = m->mux_buf_offset;
166	sdt_args.sdt = m->si.sdt;
167	sdt_args.buf_sz = m->mux_buf_sz;
168	sdt_args.continuity_counter = &sdt_ctx->cc;	200	sdt_args.continuity_counter = &sdt_ctx->cc;
169		201
170	m->mux_buf_offset += vidtv_psi_sdt_write_into(sdt_args);	202	m->mux_buf_offset += vidtv_psi_sdt_write_into(&sdt_args);
		203
		204	nit_args.offset = m->mux_buf_offset;
		205	nit_args.continuity_counter = &nit_ctx->cc;
		206
		207	m->mux_buf_offset += vidtv_psi_nit_write_into(&nit_args);
		208
		209	eit_args.offset = m->mux_buf_offset;
		210	eit_args.continuity_counter = &eit_ctx->cc;
		211
		212	m->mux_buf_offset += vidtv_psi_eit_write_into(&eit_args);
171		213
172	nbytes = m->mux_buf_offset - initial_offset;	214	nbytes = m->mux_buf_offset - initial_offset;
173		215
@@ -230,23 +272,29 @@ static bool vidtv_mux_should_push_si(struct vidtv_mux *m) · 56 unmodified lines
230	static u32 vidtv_mux_packetize_access_units(struct vidtv_mux *m,	272	static u32 vidtv_mux_packetize_access_units(struct vidtv_mux *m,
231	struct vidtv_encoder *e)	273	struct vidtv_encoder *e)
232	{	274	{
233	u32 nbytes = 0;	275	struct pes_write_args args = {
234		276	.dest_buf = m->mux_buf,
235	struct pes_write_args args = {};	277	.dest_buf_sz = m->mux_buf_sz,
236	u32 initial_offset = m->mux_buf_offset;	278	.pid = be16_to_cpu(e->es_pid),
		279	.encoder_id = e->id,
		280	.stream_id = be16_to_cpu(e->stream_id),
		281	.send_pts = true, /* forbidden value '01'... */
		282	.send_dts = false, /* ...for PTS_DTS flags */
		283	};
237	struct vidtv_access_unit *au = e->access_units;	284	struct vidtv_access_unit *au = e->access_units;
238		285	u32 initial_offset = m->mux_buf_offset;
		286	struct vidtv_mux_pid_ctx *pid_ctx;
		287	u32 nbytes = 0;
239	u8 *buf = NULL;	288	u8 *buf = NULL;
240	struct vidtv_mux_pid_ctx *pid_ctx = vidtv_mux_create_pid_ctx_once(m,
241	be16_to_cpu(e->es_pid));
242		289
243	args.dest_buf = m->mux_buf;	290	/* see SMPTE 302M clause 6.4 */
244	args.dest_buf_sz = m->mux_buf_sz;	291	if (args.encoder_id == S302M) {
245	args.pid = be16_to_cpu(e->es_pid);	292	args.send_dts = false;
246	args.encoder_id = e->id;	293	args.send_pts = true;
		294	}
		295
		296	pid_ctx = vidtv_mux_create_pid_ctx_once(m, be16_to_cpu(e->es_pid));
247	args.continuity_counter = &pid_ctx->cc;	297	args.continuity_counter = &pid_ctx->cc;
248	args.stream_id = be16_to_cpu(e->stream_id);
249	args.send_pts = true;
250		298
251	while (au) {	299	while (au) {
252	buf = e->encoder_buf + au->offset;	300	buf = e->encoder_buf + au->offset;
@@ -256,7 +304,7 @@ static u32 vidtv_mux_packetize_access_units(struct vidtv_mux *m, · 3 unmodified lines
256	args.pts = au->pts;	304	args.pts = au->pts;
257	args.pcr = m->timing.clk;	305	args.pcr = m->timing.clk;
258		306
259	m->mux_buf_offset += vidtv_pes_write_into(args);	307	m->mux_buf_offset += vidtv_pes_write_into(&args);
260		308
261	au = au->next;	309	au = au->next;
262	}	310	}
@@ -273,10 +321,10 @@ static u32 vidtv_mux_packetize_access_units(struct vidtv_mux *m, · 10 unmodified lines
273		321
274	static u32 vidtv_mux_poll_encoders(struct vidtv_mux *m)	322	static u32 vidtv_mux_poll_encoders(struct vidtv_mux *m)
275	{	323	{
276	u32 nbytes = 0;
277	u32 au_nbytes;
278	struct vidtv_channel *cur_chnl = m->channels;	324	struct vidtv_channel *cur_chnl = m->channels;
279	struct vidtv_encoder *e = NULL;	325	struct vidtv_encoder *e = NULL;
		326	u32 nbytes = 0;
		327	u32 au_nbytes;
280		328
281	while (cur_chnl) {	329	while (cur_chnl) {
282	e = cur_chnl->encoders;	330	e = cur_chnl->encoders;
@@ -300,18 +348,19 @@ static u32 vidtv_mux_poll_encoders(struct vidtv_mux *m) · 17 unmodified lines
300		348
301	static u32 vidtv_mux_pad_with_nulls(struct vidtv_mux *m, u32 npkts)	349	static u32 vidtv_mux_pad_with_nulls(struct vidtv_mux *m, u32 npkts)
302	{	350	{
303	struct null_packet_write_args args = {};	351	struct null_packet_write_args args = {
		352	.dest_buf = m->mux_buf,
		353	.buf_sz = m->mux_buf_sz,
		354	.dest_offset = m->mux_buf_offset,
		355	};
304	u32 initial_offset = m->mux_buf_offset;	356	u32 initial_offset = m->mux_buf_offset;
305	u32 nbytes; /* the number of bytes written by this function */
306	u32 i;
307	struct vidtv_mux_pid_ctx *ctx;	357	struct vidtv_mux_pid_ctx *ctx;
		358	u32 nbytes;
		359	u32 i;
308		360
309	ctx = vidtv_mux_get_pid_ctx(m, TS_NULL_PACKET_PID);	361	ctx = vidtv_mux_get_pid_ctx(m, TS_NULL_PACKET_PID);
310		362
311	args.dest_buf = m->mux_buf;
312	args.buf_sz = m->mux_buf_sz;
313	args.continuity_counter = &ctx->cc;	363	args.continuity_counter = &ctx->cc;
314	args.dest_offset = m->mux_buf_offset;
315		364
316	for (i = 0; i < npkts; ++i) {	365	for (i = 0; i < npkts; ++i) {
317	m->mux_buf_offset += vidtv_ts_null_write_into(args);	366	m->mux_buf_offset += vidtv_ts_null_write_into(args);
@@ -343,9 +392,9 @@ static void vidtv_mux_tick(struct work_struct *work) · 25 unmodified lines
343	struct vidtv_mux,	392	struct vidtv_mux,
344	mpeg_thread);	393	mpeg_thread);
345	struct dtv_frontend_properties *c = &m->fe->dtv_property_cache;	394	struct dtv_frontend_properties *c = &m->fe->dtv_property_cache;
		395	u32 tot_bits = 0;
346	u32 nbytes;	396	u32 nbytes;
347	u32 npkts;	397	u32 npkts;
348	u32 tot_bits = 0;
349		398
350	while (m->streaming) {	399	while (m->streaming) {
351	nbytes = 0;	400	nbytes = 0;
@@ -427,40 +476,62 @@ void vidtv_mux_stop_thread(struct vidtv_mux *m) · 75 unmodified lines
427		476
428	struct vidtv_mux vidtv_mux_init(struct dvb_frontend fe,	477	struct vidtv_mux vidtv_mux_init(struct dvb_frontend fe,
429	struct device *dev,	478	struct device *dev,
430	struct vidtv_mux_init_args args)	479	struct vidtv_mux_init_args *args)
431	{	480	{
432	struct vidtv_mux m = kzalloc(sizeof(m), GFP_KERNEL);	481	struct vidtv_mux *m;
		482
		483	m = kzalloc(sizeof(*m), GFP_KERNEL);
		484	if (!m)
		485	return NULL;
433		486
434	m->dev = dev;	487	m->dev = dev;
435	m->fe = fe;	488	m->fe = fe;
436	m->timing.pcr_period_usecs = args.pcr_period_usecs;	489	m->timing.pcr_period_usecs = args->pcr_period_usecs;
437	m->timing.si_period_usecs = args.si_period_usecs;	490	m->timing.si_period_usecs = args->si_period_usecs;
		491
		492	m->mux_rate_kbytes_sec = args->mux_rate_kbytes_sec;
438		493
439	m->mux_rate_kbytes_sec = args.mux_rate_kbytes_sec;	494	m->on_new_packets_available_cb = args->on_new_packets_available_cb;
440		495
441	m->on_new_packets_available_cb = args.on_new_packets_available_cb;	496	m->mux_buf = vzalloc(args->mux_buf_sz);
		497	if (!m->mux_buf)
		498	goto free_mux;
442		499
443	m->mux_buf = vzalloc(args.mux_buf_sz);	500	m->mux_buf_sz = args->mux_buf_sz;
444	m->mux_buf_sz = args.mux_buf_sz;
445		501
446	m->pcr_pid = args.pcr_pid;	502	m->pcr_pid = args->pcr_pid;
447	m->transport_stream_id = args.transport_stream_id;	503	m->transport_stream_id = args->transport_stream_id;
448	m->priv = args.priv;	504	m->priv = args->priv;
		505	m->network_id = args->network_id;
		506	m->network_name = kstrdup(args->network_name, GFP_KERNEL);
449	m->timing.current_jiffies = get_jiffies_64();	507	m->timing.current_jiffies = get_jiffies_64();
450		508
451	if (args.channels)	509	if (args->channels)
452	m->channels = args.channels;	510	m->channels = args->channels;
453	else	511	else
454	vidtv_channels_init(m);	512	if (vidtv_channels_init(m) < 0)
		513	goto free_mux_buf;
455		514
456	/* will alloc data for pmt_sections after initializing pat */	515	/* will alloc data for pmt_sections after initializing pat */
457	vidtv_channel_si_init(m);	516	if (vidtv_channel_si_init(m) < 0)
		517	goto free_channels;
458		518
459	INIT_WORK(&m->mpeg_thread, vidtv_mux_tick);	519	INIT_WORK(&m->mpeg_thread, vidtv_mux_tick);
460		520
461	vidtv_mux_pid_ctx_init(m);	521	if (vidtv_mux_pid_ctx_init(m) < 0)
		522	goto free_channel_si;
462		523
463	return m;	524	return m;
		525
		526	free_channel_si:
		527	vidtv_channel_si_destroy(m);
		528	free_channels:
		529	vidtv_channels_destroy(m);
		530	free_mux_buf:
		531	vfree(m->mux_buf);
		532	free_mux:
		533	kfree(m);
		534	return NULL;
464	}	535	}
465		536
466	void vidtv_mux_destroy(struct vidtv_mux *m)	537	void vidtv_mux_destroy(struct vidtv_mux *m)
@@ -469,6 +540,7 @@ void vidtv_mux_destroy(struct vidtv_mux *m) · 2 unmodified lines
469	vidtv_mux_pid_ctx_destroy(m);	540	vidtv_mux_pid_ctx_destroy(m);
470	vidtv_channel_si_destroy(m);	541	vidtv_channel_si_destroy(m);
471	vidtv_channels_destroy(m);	542	vidtv_channels_destroy(m);
		543	kfree(m->network_name);
472	vfree(m->mux_buf);	544	vfree(m->mux_buf);
473	kfree(m);	545	kfree(m);
474	}	546	}

drivers/media/test-drivers/vidtv/vidtv_mux.h+18−3

 #ifndef VIDTV_MUX_H
 #define VIDTV_MUX_H
-#include <linux/types.h>
 #include <linux/hashtable.h>
+#include <linux/types.h>
 #include <linux/workqueue.h>
 #include <media/dvb_frontend.h>
 #include "vidtv_psi.h"
  * @pat: The PAT in use by the muxer.
  * @pmt_secs: The PMT sections in use by the muxer. One for each program in the PAT.
  * @sdt: The SDT in use by the muxer.
+ * @nit: The NIT in use by the muxer.
+ * @eit: the EIT in use by the muxer.
  */
 struct vidtv_mux_si {
 	/* the SI tables */
 	struct vidtv_psi_table_pat *pat;
 	struct vidtv_psi_table_pmt **pmt_secs; /* the PMT sections */
 	struct vidtv_psi_table_sdt *sdt;
+	struct vidtv_psi_table_nit *nit;
+	struct vidtv_psi_table_eit *eit;
 };
 /**
 /**
  * struct vidtv_mux - A muxer abstraction loosely based in libavcodec/mpegtsenc.c
- * @mux_rate_kbytes_sec: The bit rate for the TS, in kbytes.
+ * @fe: The frontend structure allocated by the muxer.
+ * @dev: pointer to struct device.
  * @timing: Keeps track of timing related information.
+ * @mux_rate_kbytes_sec: The bit rate for the TS, in kbytes.
  * @pid_ctx: A hash table to keep track of per-PID metadata.
  * @on_new_packets_available_cb: A callback to inform of new TS packets ready.
  * @mux_buf: A pointer to a buffer for this muxer. TS packets are stored there
  * @pcr_pid: The TS PID used for the PSI packets. All channels will share the
  * same PCR.
  * @transport_stream_id: The transport stream ID
+ * @network_id: The network ID
+ * @network_name: The network name
  * @priv: Private data.
  */
 struct vidtv_mux {
 	u16 pcr_pid;
 	u16 transport_stream_id;
+	u16 network_id;
+	char *network_name;
 	void *priv;
 };
  * same PCR.
  * @transport_stream_id: The transport stream ID
  * @channels: an optional list of channels to use
+ * @network_id: The network ID
+ * @network_name: The network name
  * @priv: Private data.
  */
 struct vidtv_mux_init_args {
 	u16 pcr_pid;
 	u16 transport_stream_id;
 	struct vidtv_channel *channels;
+	u16 network_id;
+	char *network_name;
 	void *priv;
 };
 struct vidtv_mux *vidtv_mux_init(struct dvb_frontend *fe,
 				 struct device *dev,
-				 struct vidtv_mux_init_args args);
+				 struct vidtv_mux_init_args *args);
 void vidtv_mux_destroy(struct vidtv_mux *m);
 void vidtv_mux_start_thread(struct vidtv_mux *m);

drivers/media/test-drivers/vidtv/vidtv_pes.c+83−96

@@ -16,7 +16,6 @@ · 15 unmodified lines
16	#include <linux/types.h>	16	#include <linux/types.h>
17	#include <linux/printk.h>	17	#include <linux/printk.h>
18	#include <linux/ratelimit.h>	18	#include <linux/ratelimit.h>
19	#include <asm/byteorder.h>
20		19
21	#include "vidtv_pes.h"	20	#include "vidtv_pes.h"
22	#include "vidtv_common.h"	21	#include "vidtv_common.h"
@@ -57,7 +56,7 @@ static u32 vidtv_pes_h_get_len(bool send_pts, bool send_dts) · 34 unmodified lines
57	return len;	56	return len;
58	}	57	}
59		58
60	static u32 vidtv_pes_write_header_stuffing(struct pes_header_write_args args)	59	static u32 vidtv_pes_write_header_stuffing(struct pes_header_write_args *args)
61	{	60	{
62	/*	61	/*
63	* This is a fixed 8-bit value equal to '0xFF' that can be inserted	62	* This is a fixed 8-bit value equal to '0xFF' that can be inserted
@@ -65,20 +64,20 @@ static u32 vidtv_pes_write_header_stuffing(struct pes_header_write_args args) · 1 unmodified line
65	* It is discarded by the decoder. No more than 32 stuffing bytes shall	64	* It is discarded by the decoder. No more than 32 stuffing bytes shall
66	* be present in one PES packet header.	65	* be present in one PES packet header.
67	*/	66	*/
68	if (args.n_pes_h_s_bytes > PES_HEADER_MAX_STUFFING_BYTES) {	67	if (args->n_pes_h_s_bytes > PES_HEADER_MAX_STUFFING_BYTES) {
69	pr_warn_ratelimited("More than %d stuffing bytes in PES packet header\n",	68	pr_warn_ratelimited("More than %d stuffing bytes in PES packet header\n",
70	PES_HEADER_MAX_STUFFING_BYTES);	69	PES_HEADER_MAX_STUFFING_BYTES);
71	args.n_pes_h_s_bytes = PES_HEADER_MAX_STUFFING_BYTES;	70	args->n_pes_h_s_bytes = PES_HEADER_MAX_STUFFING_BYTES;
72	}	71	}
73		72
74	return vidtv_memset(args.dest_buf,	73	return vidtv_memset(args->dest_buf,
75	args.dest_offset,	74	args->dest_offset,
76	args.dest_buf_sz,	75	args->dest_buf_sz,
77	TS_FILL_BYTE,	76	TS_FILL_BYTE,
78	args.n_pes_h_s_bytes);	77	args->n_pes_h_s_bytes);
79	}	78	}
80		79
81	static u32 vidtv_pes_write_pts_dts(struct pes_header_write_args args)	80	static u32 vidtv_pes_write_pts_dts(struct pes_header_write_args *args)
82	{	81	{
83	u32 nbytes = 0; /* the number of bytes written by this function */	82	u32 nbytes = 0; /* the number of bytes written by this function */
84		83
@@ -90,7 +89,7 @@ static u32 vidtv_pes_write_pts_dts(struct pes_header_write_args args) · 5 unmodified lines
90	u64 mask2;	89	u64 mask2;
91	u64 mask3;	90	u64 mask3;
92		91
93	if (!args.send_pts && args.send_dts)	92	if (!args->send_pts && args->send_dts)
94	return 0;	93	return 0;
95		94
96	mask1 = GENMASK_ULL(32, 30);	95	mask1 = GENMASK_ULL(32, 30);
@@ -98,80 +97,81 @@ static u32 vidtv_pes_write_pts_dts(struct pes_header_write_args args) · 1 unmodified line
98	mask3 = GENMASK_ULL(14, 0);	97	mask3 = GENMASK_ULL(14, 0);
99		98
100	/* see ISO/IEC 13818-1 : 2000 p. 32 */	99	/* see ISO/IEC 13818-1 : 2000 p. 32 */
101	if (args.send_pts && args.send_dts) {	100	if (args->send_pts && args->send_dts) {
102	pts_dts.pts1 = (0x3 << 4) \| ((args.pts & mask1) >> 29) \| 0x1;	101	pts_dts.pts1 = (0x3 << 4) \| ((args->pts & mask1) >> 29) \| 0x1;
103	pts_dts.pts2 = cpu_to_be16(((args.pts & mask2) >> 14) \| 0x1);	102	pts_dts.pts2 = cpu_to_be16(((args->pts & mask2) >> 14) \| 0x1);
104	pts_dts.pts3 = cpu_to_be16(((args.pts & mask3) << 1) \| 0x1);	103	pts_dts.pts3 = cpu_to_be16(((args->pts & mask3) << 1) \| 0x1);
105		104
106	pts_dts.dts1 = (0x1 << 4) \| ((args.dts & mask1) >> 29) \| 0x1;	105	pts_dts.dts1 = (0x1 << 4) \| ((args->dts & mask1) >> 29) \| 0x1;
107	pts_dts.dts2 = cpu_to_be16(((args.dts & mask2) >> 14) \| 0x1);	106	pts_dts.dts2 = cpu_to_be16(((args->dts & mask2) >> 14) \| 0x1);
108	pts_dts.dts3 = cpu_to_be16(((args.dts & mask3) << 1) \| 0x1);	107	pts_dts.dts3 = cpu_to_be16(((args->dts & mask3) << 1) \| 0x1);
109		108
110	op = &pts_dts;	109	op = &pts_dts;
111	op_sz = sizeof(pts_dts);	110	op_sz = sizeof(pts_dts);
112		111
113	} else if (args.send_pts) {	112	} else if (args->send_pts) {
114	pts.pts1 = (0x1 << 5) \| ((args.pts & mask1) >> 29) \| 0x1;	113	pts.pts1 = (0x1 << 5) \| ((args->pts & mask1) >> 29) \| 0x1;
115	pts.pts2 = cpu_to_be16(((args.pts & mask2) >> 14) \| 0x1);	114	pts.pts2 = cpu_to_be16(((args->pts & mask2) >> 14) \| 0x1);
116	pts.pts3 = cpu_to_be16(((args.pts & mask3) << 1) \| 0x1);	115	pts.pts3 = cpu_to_be16(((args->pts & mask3) << 1) \| 0x1);
117		116
118	op = &pts;	117	op = &pts;
119	op_sz = sizeof(pts);	118	op_sz = sizeof(pts);
120	}	119	}
121		120
122	/* copy PTS/DTS optional */	121	/* copy PTS/DTS optional */
123	nbytes += vidtv_memcpy(args.dest_buf,	122	nbytes += vidtv_memcpy(args->dest_buf,
124	args.dest_offset + nbytes,	123	args->dest_offset + nbytes,
125	args.dest_buf_sz,	124	args->dest_buf_sz,
126	op,	125	op,
127	op_sz);	126	op_sz);
128		127
129	return nbytes;	128	return nbytes;
130	}	129	}
131		130
132	static u32 vidtv_pes_write_h(struct pes_header_write_args args)	131	static u32 vidtv_pes_write_h(struct pes_header_write_args *args)
133	{	132	{
134	u32 nbytes = 0; /* the number of bytes written by this function */	133	u32 nbytes = 0; /* the number of bytes written by this function */
135		134
136	struct vidtv_mpeg_pes pes_header = {};	135	struct vidtv_mpeg_pes pes_header = {};
137	struct vidtv_pes_optional pes_optional = {};	136	struct vidtv_pes_optional pes_optional = {};
138	struct pes_header_write_args pts_dts_args = args;	137	struct pes_header_write_args pts_dts_args;
139	u32 stream_id = (args.encoder_id == S302M) ? PRIVATE_STREAM_1_ID : args.stream_id;	138	u32 stream_id = (args->encoder_id == S302M) ? PRIVATE_STREAM_1_ID : args->stream_id;
140	u16 pes_opt_bitfield = 0x01 << 15;	139	u16 pes_opt_bitfield = 0x01 << 15;
141		140
142	pes_header.bitfield = cpu_to_be32((PES_START_CODE_PREFIX << 8) \| stream_id);	141	pes_header.bitfield = cpu_to_be32((PES_START_CODE_PREFIX << 8) \| stream_id);
143		142
144	pes_header.length = cpu_to_be16(vidtv_pes_op_get_len(args.send_pts,	143	pes_header.length = cpu_to_be16(vidtv_pes_op_get_len(args->send_pts,
145	args.send_dts) +	144	args->send_dts) +
146	args.access_unit_len);	145	args->access_unit_len);
147		146
148	if (args.send_pts && args.send_dts)	147	if (args->send_pts && args->send_dts)
149	pes_opt_bitfield \|= (0x3 << 6);	148	pes_opt_bitfield \|= (0x3 << 6);
150	else if (args.send_pts)	149	else if (args->send_pts)
151	pes_opt_bitfield \|= (0x1 << 7);	150	pes_opt_bitfield \|= (0x1 << 7);
152		151
153	pes_optional.bitfield = cpu_to_be16(pes_opt_bitfield);	152	pes_optional.bitfield = cpu_to_be16(pes_opt_bitfield);
154	pes_optional.length = vidtv_pes_op_get_len(args.send_pts, args.send_dts) +	153	pes_optional.length = vidtv_pes_op_get_len(args->send_pts, args->send_dts) +
155	args.n_pes_h_s_bytes -	154	args->n_pes_h_s_bytes -
156	sizeof(struct vidtv_pes_optional);	155	sizeof(struct vidtv_pes_optional);
157		156
158	/* copy header */	157	/* copy header */
159	nbytes += vidtv_memcpy(args.dest_buf,	158	nbytes += vidtv_memcpy(args->dest_buf,
160	args.dest_offset + nbytes,	159	args->dest_offset + nbytes,
161	args.dest_buf_sz,	160	args->dest_buf_sz,
162	&pes_header,	161	&pes_header,
163	sizeof(pes_header));	162	sizeof(pes_header));
164		163
165	/* copy optional header bits */	164	/* copy optional header bits */
166	nbytes += vidtv_memcpy(args.dest_buf,	165	nbytes += vidtv_memcpy(args->dest_buf,
167	args.dest_offset + nbytes,	166	args->dest_offset + nbytes,
168	args.dest_buf_sz,	167	args->dest_buf_sz,
169	&pes_optional,	168	&pes_optional,
170	sizeof(pes_optional));	169	sizeof(pes_optional));
171		170
172	/* copy the timing information */	171	/* copy the timing information */
173	pts_dts_args.dest_offset = args.dest_offset + nbytes;	172	pts_dts_args = *args;
174	nbytes += vidtv_pes_write_pts_dts(pts_dts_args);	173	pts_dts_args.dest_offset = args->dest_offset + nbytes;
		174	nbytes += vidtv_pes_write_pts_dts(&pts_dts_args);
175		175
176	/* write any PES header stuffing */	176	/* write any PES header stuffing */
177	nbytes += vidtv_pes_write_header_stuffing(args);	177	nbytes += vidtv_pes_write_header_stuffing(args);
@@ -300,14 +300,31 @@ static u32 vidtv_pes_write_ts_h(struct pes_ts_header_write_args args, · 122 unmodified lines
300	return nbytes;	300	return nbytes;
301	}	301	}
302		302
303	u32 vidtv_pes_write_into(struct pes_write_args args)	303	u32 vidtv_pes_write_into(struct pes_write_args *args)
304	{	304	{
305	u32 unaligned_bytes = (args.dest_offset % TS_PACKET_LEN);	305	u32 unaligned_bytes = (args->dest_offset % TS_PACKET_LEN);
306	struct pes_ts_header_write_args ts_header_args = {};	306	struct pes_ts_header_write_args ts_header_args = {
307	struct pes_header_write_args pes_header_args = {};	307	.dest_buf = args->dest_buf,
308	u32 remaining_len = args.access_unit_len;	308	.dest_buf_sz = args->dest_buf_sz,
		309	.pid = args->pid,
		310	.pcr = args->pcr,
		311	.continuity_counter = args->continuity_counter,
		312	};
		313	struct pes_header_write_args pes_header_args = {
		314	.dest_buf = args->dest_buf,
		315	.dest_buf_sz = args->dest_buf_sz,
		316	.encoder_id = args->encoder_id,
		317	.send_pts = args->send_pts,
		318	.pts = args->pts,
		319	.send_dts = args->send_dts,
		320	.dts = args->dts,
		321	.stream_id = args->stream_id,
		322	.n_pes_h_s_bytes = args->n_pes_h_s_bytes,
		323	.access_unit_len = args->access_unit_len,
		324	};
		325	u32 remaining_len = args->access_unit_len;
309	bool wrote_pes_header = false;	326	bool wrote_pes_header = false;
310	u64 last_pcr = args.pcr;	327	u64 last_pcr = args->pcr;
311	bool need_pcr = true;	328	bool need_pcr = true;
312	u32 available_space;	329	u32 available_space;
313	u32 payload_size;	330	u32 payload_size;
@@ -318,25 +335,13 @@ u32 vidtv_pes_write_into(struct pes_write_args args) · 4 unmodified lines
318	pr_warn_ratelimited("buffer is misaligned, while starting PES\n");	335	pr_warn_ratelimited("buffer is misaligned, while starting PES\n");
319		336
320	/* forcibly align and hope for the best */	337	/* forcibly align and hope for the best */
321	nbytes += vidtv_memset(args.dest_buf,	338	nbytes += vidtv_memset(args->dest_buf,
322	args.dest_offset + nbytes,	339	args->dest_offset + nbytes,
323	args.dest_buf_sz,	340	args->dest_buf_sz,
324	TS_FILL_BYTE,	341	TS_FILL_BYTE,
325	TS_PACKET_LEN - unaligned_bytes);	342	TS_PACKET_LEN - unaligned_bytes);
326	}	343	}
327		344
328	if (args.send_dts && !args.send_pts) {
329	pr_warn_ratelimited("forbidden value '01' for PTS_DTS flags\n");
330	args.send_pts = true;
331	args.pts = args.dts;
332	}
333
334	/* see SMPTE 302M clause 6.4 */
335	if (args.encoder_id == S302M) {
336	args.send_dts = false;
337	args.send_pts = true;
338	}
339
340	while (remaining_len) {	345	while (remaining_len) {
341	available_space = TS_PAYLOAD_LEN;	346	available_space = TS_PAYLOAD_LEN;
342	/*	347	/*
@@ -345,14 +350,14 @@ u32 vidtv_pes_write_into(struct pes_write_args args) · 2 unmodified lines
345	* the space needed for the TS header _and_ for the PES header	350	* the space needed for the TS header _and_ for the PES header
346	*/	351	*/
347	if (!wrote_pes_header)	352	if (!wrote_pes_header)
348	available_space -= vidtv_pes_h_get_len(args.send_pts,	353	available_space -= vidtv_pes_h_get_len(args->send_pts,
349	args.send_dts);	354	args->send_dts);
350		355
351	/*	356	/*
352	* if the encoder has inserted stuffing bytes in the PES	357	* if the encoder has inserted stuffing bytes in the PES
353	* header, account for them.	358	* header, account for them.
354	*/	359	*/
355	available_space -= args.n_pes_h_s_bytes;	360	available_space -= args->n_pes_h_s_bytes;
356		361
357	/* Take the extra adaptation into account if need to send PCR */	362	/* Take the extra adaptation into account if need to send PCR */
358	if (need_pcr) {	363	if (need_pcr) {
@@ -387,14 +392,9 @@ u32 vidtv_pes_write_into(struct pes_write_args args) · 28 unmodified lines
387	}	392	}
388		393
389	/* write ts header */	394	/* write ts header */
390	ts_header_args.dest_buf = args.dest_buf;	395	ts_header_args.dest_offset = args->dest_offset + nbytes;
391	ts_header_args.dest_offset = args.dest_offset + nbytes;	396	ts_header_args.wrote_pes_header = wrote_pes_header;
392	ts_header_args.dest_buf_sz = args.dest_buf_sz;	397	ts_header_args.n_stuffing_bytes = stuff_bytes;
393	ts_header_args.pid = args.pid;
394	ts_header_args.pcr = args.pcr;
395	ts_header_args.continuity_counter = args.continuity_counter;
396	ts_header_args.wrote_pes_header = wrote_pes_header;
397	ts_header_args.n_stuffing_bytes = stuff_bytes;
398		398
399	nbytes += vidtv_pes_write_ts_h(ts_header_args, need_pcr,	399	nbytes += vidtv_pes_write_ts_h(ts_header_args, need_pcr,
400	&last_pcr);	400	&last_pcr);
@@ -403,33 +403,20 @@ u32 vidtv_pes_write_into(struct pes_write_args args) · 2 unmodified lines
403		403
404	if (!wrote_pes_header) {	404	if (!wrote_pes_header) {
405	/* write the PES header only once */	405	/* write the PES header only once */
406	pes_header_args.dest_buf = args.dest_buf;	406	pes_header_args.dest_offset = args->dest_offset +
407		407	nbytes;
408	pes_header_args.dest_offset = args.dest_offset +	408	nbytes += vidtv_pes_write_h(&pes_header_args);
409	nbytes;	409	wrote_pes_header = true;
410
411	pes_header_args.dest_buf_sz = args.dest_buf_sz;
412	pes_header_args.encoder_id = args.encoder_id;
413	pes_header_args.send_pts = args.send_pts;
414	pes_header_args.pts = args.pts;
415	pes_header_args.send_dts = args.send_dts;
416	pes_header_args.dts = args.dts;
417	pes_header_args.stream_id = args.stream_id;
418	pes_header_args.n_pes_h_s_bytes = args.n_pes_h_s_bytes;
419	pes_header_args.access_unit_len = args.access_unit_len;
420
421	nbytes += vidtv_pes_write_h(pes_header_args);
422	wrote_pes_header = true;
423	}	410	}
424		411
425	/* write as much of the payload as we possibly can */	412	/* write as much of the payload as we possibly can */
426	nbytes += vidtv_memcpy(args.dest_buf,	413	nbytes += vidtv_memcpy(args->dest_buf,
427	args.dest_offset + nbytes,	414	args->dest_offset + nbytes,
428	args.dest_buf_sz,	415	args->dest_buf_sz,
429	args.from,	416	args->from,
430	payload_size);	417	payload_size);
431		418
432	args.from += payload_size;	419	args->from += payload_size;
433		420
434	remaining_len -= payload_size;	421	remaining_len -= payload_size;
435	}	422	}

drivers/media/test-drivers/vidtv/vidtv_pes.h+5−3

 #ifndef VIDTV_PES_H
 #define VIDTV_PES_H
-#include <asm/byteorder.h>
 #include <linux/types.h>
 #include "vidtv_common.h"
  * @dest_buf_sz: The size of the dest_buffer
  * @pid: The PID to use for the TS packets.
  * @continuity_counter: Incremented on every new TS packet.
- * @n_pes_h_s_bytes: Padding bytes. Might be used by an encoder if needed, gets
+ * @wrote_pes_header: Flag to indicate that the PES header was written
+ * @n_stuffing_bytes: Padding bytes. Might be used by an encoder if needed, gets
  * discarded by the decoder.
+ * @pcr: counter driven by a 27Mhz clock.
  */
 struct pes_ts_header_write_args {
 	void *dest_buf;
  * @dts: DTS value to send.
  * @n_pes_h_s_bytes: Padding bytes. Might be used by an encoder if needed, gets
  * discarded by the decoder.
+ * @pcr: counter driven by a 27Mhz clock.
  */
 struct pes_write_args {
 	void *dest_buf;
  * equal to the size of the access unit, since we need space for PES headers, TS headers
  * and padding bytes, if any.
  */
-u32 vidtv_pes_write_into(struct pes_write_args args);
+u32 vidtv_pes_write_into(struct pes_write_args *args);
 #endif // VIDTV_PES_H

drivers/media/test-drivers/vidtv/vidtv_psi.c+1112−409

@@ -6,31 +6,31 @@ · 5 unmodified lines
6	* technically be broken into one or more sections, we do not do this here,	6	* technically be broken into one or more sections, we do not do this here,
7	* hence 'table' and 'section' are interchangeable for vidtv.	7	* hence 'table' and 'section' are interchangeable for vidtv.
8	*	8	*
9	* This code currently supports three tables: PAT, PMT and SDT. These are the
10	* bare minimum to get userspace to recognize our MPEG transport stream. It can
11	* be extended to support more PSI tables in the future.
12	*
13	* Copyright (C) 2020 Daniel W. S. Almeida	9	* Copyright (C) 2020 Daniel W. S. Almeida
14	*/	10	*/
15		11
16	#define pr_fmt(fmt) KBUILD_MODNAME ":%s, %d: " fmt, __func__, __LINE__	12	#define pr_fmt(fmt) KBUILD_MODNAME ":%s, %d: " fmt, __func__, __LINE__
17		13
18	#include <linux/kernel.h>	14	#include <linux/bcd.h>
19	#include <linux/types.h>
20	#include <linux/slab.h>
21	#include <linux/crc32.h>	15	#include <linux/crc32.h>
22	#include <linux/string.h>	16	#include <linux/kernel.h>
		17	#include <linux/ktime.h>
23	#include <linux/printk.h>	18	#include <linux/printk.h>
24	#include <linux/ratelimit.h>	19	#include <linux/ratelimit.h>
		20	#include <linux/slab.h>
25	#include <linux/string.h>	21	#include <linux/string.h>
26	#include <asm/byteorder.h>	22	#include <linux/string.h>
		23	#include <linux/time.h>
		24	#include <linux/types.h>
27		25
28	#include "vidtv_psi.h"
29	#include "vidtv_common.h"	26	#include "vidtv_common.h"
		27	#include "vidtv_psi.h"
30	#include "vidtv_ts.h"	28	#include "vidtv_ts.h"
31		29
32	#define CRC_SIZE_IN_BYTES 4	30	#define CRC_SIZE_IN_BYTES 4
33	#define MAX_VERSION_NUM 32	31	#define MAX_VERSION_NUM 32
		32	#define INITIAL_CRC 0xffffffff
		33	#define ISO_LANGUAGE_CODE_LEN 3
34		34
35	static const u32 CRC_LUT[256] = {	35	static const u32 CRC_LUT[256] = {
36	/* from libdvbv5 */	36	/* from libdvbv5 */
@@ -79,7 +79,7 @@ static const u32 CRC_LUT[256] = { · 42 unmodified lines
79	0xbcb4666d, 0xb8757bda, 0xb5365d03, 0xb1f740b4	79	0xbcb4666d, 0xb8757bda, 0xb5365d03, 0xb1f740b4
80	};	80	};
81		81
82	static inline u32 dvb_crc32(u32 crc, u8 *data, u32 len)	82	static u32 dvb_crc32(u32 crc, u8 *data, u32 len)
83	{	83	{
84	/* from libdvbv5 */	84	/* from libdvbv5 */
85	while (len--)	85	while (len--)
@@ -92,40 +92,7 @@ static void vidtv_psi_update_version_num(struct vidtv_psi_table_header *h) · 6 unmodified lines
92	h->version++;	92	h->version++;
93	}	93	}
94		94
95	static inline u16 vidtv_psi_sdt_serv_get_desc_loop_len(struct vidtv_psi_table_sdt_service *s)	95	static u16 vidtv_psi_get_sec_len(struct vidtv_psi_table_header *h)
96	{
97	u16 mask;
98	u16 ret;
99
100	mask = GENMASK(11, 0);
101
102	ret = be16_to_cpu(s->bitfield) & mask;
103	return ret;
104	}
105
106	static inline u16 vidtv_psi_pmt_stream_get_desc_loop_len(struct vidtv_psi_table_pmt_stream *s)
107	{
108	u16 mask;
109	u16 ret;
110
111	mask = GENMASK(9, 0);
112
113	ret = be16_to_cpu(s->bitfield2) & mask;
114	return ret;
115	}
116
117	static inline u16 vidtv_psi_pmt_get_desc_loop_len(struct vidtv_psi_table_pmt *p)
118	{
119	u16 mask;
120	u16 ret;
121
122	mask = GENMASK(9, 0);
123
124	ret = be16_to_cpu(p->bitfield2) & mask;
125	return ret;
126	}
127
128	static inline u16 vidtv_psi_get_sec_len(struct vidtv_psi_table_header *h)
129	{	96	{
130	u16 mask;	97	u16 mask;
131	u16 ret;	98	u16 ret;
@@ -136,7 +103,7 @@ static inline u16 vidtv_psi_get_sec_len(struct vidtv_psi_table_header *h) · 4 unmodified lines
136	return ret;	103	return ret;
137	}	104	}
138		105
139	inline u16 vidtv_psi_get_pat_program_pid(struct vidtv_psi_table_pat_program *p)	106	u16 vidtv_psi_get_pat_program_pid(struct vidtv_psi_table_pat_program *p)
140	{	107	{
141	u16 mask;	108	u16 mask;
142	u16 ret;	109	u16 ret;
@@ -147,7 +114,7 @@ inline u16 vidtv_psi_get_pat_program_pid(struct vidtv_psi_table_pat_program *p) · 4 unmodified lines
147	return ret;	114	return ret;
148	}	115	}
149		116
150	inline u16 vidtv_psi_pmt_stream_get_elem_pid(struct vidtv_psi_table_pmt_stream *s)	117	u16 vidtv_psi_pmt_stream_get_elem_pid(struct vidtv_psi_table_pmt_stream *s)
151	{	118	{
152	u16 mask;	119	u16 mask;
153	u16 ret;	120	u16 ret;
@@ -158,10 +125,11 @@ inline u16 vidtv_psi_pmt_stream_get_elem_pid(struct vidtv_psi_table_pmt_stream * · 4 unmodified lines
158	return ret;	125	return ret;
159	}	126	}
160		127
161	static inline void vidtv_psi_set_desc_loop_len(__be16 *bitfield, u16 new_len, u8 desc_len_nbits)	128	static void vidtv_psi_set_desc_loop_len(__be16 *bitfield, u16 new_len,
		129	u8 desc_len_nbits)
162	{	130	{
163	u16 mask;
164	__be16 new;	131	__be16 new;
		132	u16 mask;
165		133
166	mask = GENMASK(15, desc_len_nbits);	134	mask = GENMASK(15, desc_len_nbits);
167		135
@@ -188,90 +156,81 @@ static void vidtv_psi_set_sec_len(struct vidtv_psi_table_header *h, u16 new_len) · 20 unmodified lines
188	h->bitfield = new;	156	h->bitfield = new;
189	}	157	}
190		158
191	static u32 vidtv_psi_ts_psi_write_into(struct psi_write_args args)	159	/*
		160	* Packetize PSI sections into TS packets:
		161	* push a TS header (4bytes) every 184 bytes
		162	* manage the continuity_counter
		163	* add stuffing (i.e. padding bytes) after the CRC
		164	*/
		165	static u32 vidtv_psi_ts_psi_write_into(struct psi_write_args *args)
192	{	166	{
193	/*	167	struct vidtv_mpeg_ts ts_header = {
194	* Packetize PSI sections into TS packets:	168	.sync_byte = TS_SYNC_BYTE,
195	* push a TS header (4bytes) every 184 bytes	169	.bitfield = cpu_to_be16((args->new_psi_section << 14) \| args->pid),
196	* manage the continuity_counter	170	.scrambling = 0,
197	* add stuffing (i.e. padding bytes) after the CRC	171	.payload = 1,
198	*/	172	.adaptation_field = 0, /* no adaptation field */
199		173	};
200	u32 nbytes_past_boundary = (args.dest_offset % TS_PACKET_LEN);	174	u32 nbytes_past_boundary = (args->dest_offset % TS_PACKET_LEN);
201	bool aligned = (nbytes_past_boundary == 0);	175	bool aligned = (nbytes_past_boundary == 0);
202	struct vidtv_mpeg_ts ts_header = {};	176	u32 remaining_len = args->len;
203
204	/* number of bytes written by this function */
205	u32 nbytes = 0;
206	/* how much there is left to write */
207	u32 remaining_len = args.len;
208	/* how much we can be written in this packet */
209	u32 payload_write_len = 0;	177	u32 payload_write_len = 0;
210	/* where we are in the source */
211	u32 payload_offset = 0;	178	u32 payload_offset = 0;
		179	u32 nbytes = 0;
212		180
213	const u16 PAYLOAD_START = args.new_psi_section;	181	if (!args->crc && !args->is_crc)
214
215	if (!args.crc && !args.is_crc)
216	pr_warn_ratelimited("Missing CRC for chunk\n");	182	pr_warn_ratelimited("Missing CRC for chunk\n");
217		183
218	if (args.crc)	184	if (args->crc)
219	args.crc = dvb_crc32(args.crc, args.from, args.len);	185	args->crc = dvb_crc32(args->crc, args->from, args->len);
220		186
221	if (args.new_psi_section && !aligned) {	187	if (args->new_psi_section && !aligned) {
222	pr_warn_ratelimited("Cannot write a new PSI section in a misaligned buffer\n");	188	pr_warn_ratelimited("Cannot write a new PSI section in a misaligned buffer\n");
223		189
224	/* forcibly align and hope for the best */	190	/* forcibly align and hope for the best */
225	nbytes += vidtv_memset(args.dest_buf,	191	nbytes += vidtv_memset(args->dest_buf,
226	args.dest_offset + nbytes,	192	args->dest_offset + nbytes,
227	args.dest_buf_sz,	193	args->dest_buf_sz,
228	TS_FILL_BYTE,	194	TS_FILL_BYTE,
229	TS_PACKET_LEN - nbytes_past_boundary);	195	TS_PACKET_LEN - nbytes_past_boundary);
230	}	196	}
231		197
232	while (remaining_len) {	198	while (remaining_len) {
233	nbytes_past_boundary = (args.dest_offset + nbytes) % TS_PACKET_LEN;	199	nbytes_past_boundary = (args->dest_offset + nbytes) % TS_PACKET_LEN;
234	aligned = (nbytes_past_boundary == 0);	200	aligned = (nbytes_past_boundary == 0);
235		201
236	if (aligned) {	202	if (aligned) {
237	/* if at a packet boundary, write a new TS header */	203	/* if at a packet boundary, write a new TS header */
238	ts_header.sync_byte = TS_SYNC_BYTE;	204	ts_header.continuity_counter = *args->continuity_counter;
239	ts_header.bitfield = cpu_to_be16((PAYLOAD_START << 14) \| args.pid);	205
240	ts_header.scrambling = 0;	206	nbytes += vidtv_memcpy(args->dest_buf,
241	ts_header.continuity_counter = *args.continuity_counter;	207	args->dest_offset + nbytes,
242	ts_header.payload = 1;	208	args->dest_buf_sz,
243	/* no adaptation field */
244	ts_header.adaptation_field = 0;
245
246	/* copy the header */
247	nbytes += vidtv_memcpy(args.dest_buf,
248	args.dest_offset + nbytes,
249	args.dest_buf_sz,
250	&ts_header,	209	&ts_header,
251	sizeof(ts_header));	210	sizeof(ts_header));
252	/*	211	/*
253	* This will trigger a discontinuity if the buffer is full,	212	* This will trigger a discontinuity if the buffer is full,
254	* effectively dropping the packet.	213	* effectively dropping the packet.
255	*/	214	*/
256	vidtv_ts_inc_cc(args.continuity_counter);	215	vidtv_ts_inc_cc(args->continuity_counter);
257	}	216	}
258		217
259	/* write the pointer_field in the first byte of the payload */	218	/* write the pointer_field in the first byte of the payload */
260	if (args.new_psi_section)	219	if (args->new_psi_section)
261	nbytes += vidtv_memset(args.dest_buf,	220	nbytes += vidtv_memset(args->dest_buf,
262	args.dest_offset + nbytes,	221	args->dest_offset + nbytes,
263	args.dest_buf_sz,	222	args->dest_buf_sz,
264	0x0,	223	0x0,
265	1);	224	1);
266		225
267	/* write as much of the payload as possible */	226	/* write as much of the payload as possible */
268	nbytes_past_boundary = (args.dest_offset + nbytes) % TS_PACKET_LEN;	227	nbytes_past_boundary = (args->dest_offset + nbytes) % TS_PACKET_LEN;
269	payload_write_len = min(TS_PACKET_LEN - nbytes_past_boundary, remaining_len);	228	payload_write_len = min(TS_PACKET_LEN - nbytes_past_boundary, remaining_len);
270		229
271	nbytes += vidtv_memcpy(args.dest_buf,	230	nbytes += vidtv_memcpy(args->dest_buf,
272	args.dest_offset + nbytes,	231	args->dest_offset + nbytes,
273	args.dest_buf_sz,	232	args->dest_buf_sz,
274	args.from + payload_offset,	233	args->from + payload_offset,
275	payload_write_len);	234	payload_write_len);
276		235
277	/* 'payload_write_len' written from a total of 'len' requested*/	236	/* 'payload_write_len' written from a total of 'len' requested*/
@@ -283,37 +242,45 @@ static u32 vidtv_psi_ts_psi_write_into(struct psi_write_args args) · 5 unmodified lines
283	* fill the rest of the packet if there is any remaining space unused	242	* fill the rest of the packet if there is any remaining space unused
284	*/	243	*/
285		244
286	nbytes_past_boundary = (args.dest_offset + nbytes) % TS_PACKET_LEN;	245	nbytes_past_boundary = (args->dest_offset + nbytes) % TS_PACKET_LEN;
287		246
288	if (args.is_crc)	247	if (args->is_crc)
289	nbytes += vidtv_memset(args.dest_buf,	248	nbytes += vidtv_memset(args->dest_buf,
290	args.dest_offset + nbytes,	249	args->dest_offset + nbytes,
291	args.dest_buf_sz,	250	args->dest_buf_sz,
292	TS_FILL_BYTE,	251	TS_FILL_BYTE,
293	TS_PACKET_LEN - nbytes_past_boundary);	252	TS_PACKET_LEN - nbytes_past_boundary);
294		253
295	return nbytes;	254	return nbytes;
296	}	255	}
297		256
298	static u32 table_section_crc32_write_into(struct crc32_write_args args)	257	static u32 table_section_crc32_write_into(struct crc32_write_args *args)
299	{	258	{
		259	struct psi_write_args psi_args = {
		260	.dest_buf = args->dest_buf,
		261	.from = &args->crc,
		262	.len = CRC_SIZE_IN_BYTES,
		263	.dest_offset = args->dest_offset,
		264	.pid = args->pid,
		265	.new_psi_section = false,
		266	.continuity_counter = args->continuity_counter,
		267	.is_crc = true,
		268	.dest_buf_sz = args->dest_buf_sz,
		269	};
		270
300	/* the CRC is the last entry in the section */	271	/* the CRC is the last entry in the section */
301	u32 nbytes = 0;
302	struct psi_write_args psi_args = {};
303		272
304	psi_args.dest_buf = args.dest_buf;	273	return vidtv_psi_ts_psi_write_into(&psi_args);
305	psi_args.from = &args.crc;	274	}
306	psi_args.len = CRC_SIZE_IN_BYTES;
307	psi_args.dest_offset = args.dest_offset;
308	psi_args.pid = args.pid;
309	psi_args.new_psi_section = false;
310	psi_args.continuity_counter = args.continuity_counter;
311	psi_args.is_crc = true;
312	psi_args.dest_buf_sz = args.dest_buf_sz;
313		275
314	nbytes += vidtv_psi_ts_psi_write_into(psi_args);	276	static void vidtv_psi_desc_chain(struct vidtv_psi_desc head, struct vidtv_psi_desc desc)
		277	{
		278	if (head) {
		279	while (head->next)
		280	head = head->next;
315		281
316	return nbytes;	282	head->next = desc;
		283	}
317	}	284	}
318		285
319	struct vidtv_psi_desc_service vidtv_psi_service_desc_init(struct vidtv_psi_desc head,	286	struct vidtv_psi_desc_service vidtv_psi_service_desc_init(struct vidtv_psi_desc head,
@@ -326,6 +293,8 @@ struct vidtv_psi_desc_service *vidtv_psi_service_desc_init(struct vidtv_psi_desc · 6 unmodified lines
326	u32 provider_name_len = provider_name ? strlen(provider_name) : 0;	293	u32 provider_name_len = provider_name ? strlen(provider_name) : 0;
327		294
328	desc = kzalloc(sizeof(*desc), GFP_KERNEL);	295	desc = kzalloc(sizeof(*desc), GFP_KERNEL);
		296	if (!desc)
		297	return NULL;
329		298
330	desc->type = SERVICE_DESCRIPTOR;	299	desc->type = SERVICE_DESCRIPTOR;
331		300
@@ -347,12 +316,7 @@ struct vidtv_psi_desc_service *vidtv_psi_service_desc_init(struct vidtv_psi_desc · 15 unmodified lines
347	if (provider_name && provider_name_len)	316	if (provider_name && provider_name_len)
348	desc->provider_name = kstrdup(provider_name, GFP_KERNEL);	317	desc->provider_name = kstrdup(provider_name, GFP_KERNEL);
349		318
350	if (head) {	319	vidtv_psi_desc_chain(head, (struct vidtv_psi_desc *)desc);
351	while (head->next)
352	head = head->next;
353
354	head->next = (struct vidtv_psi_desc *)desc;
355	}
356	return desc;	320	return desc;
357	}	321	}
358		322
@@ -365,6 +329,8 @@ struct vidtv_psi_desc_registration · 6 unmodified lines
365	struct vidtv_psi_desc_registration *desc;	329	struct vidtv_psi_desc_registration *desc;
366		330
367	desc = kzalloc(sizeof(*desc) + sizeof(format_id) + additional_info_len, GFP_KERNEL);	331	desc = kzalloc(sizeof(*desc) + sizeof(format_id) + additional_info_len, GFP_KERNEL);
		332	if (!desc)
		333	return NULL;
368		334
369	desc->type = REGISTRATION_DESCRIPTOR;	335	desc->type = REGISTRATION_DESCRIPTOR;
370		336
@@ -378,44 +344,178 @@ struct vidtv_psi_desc_registration · 7 unmodified lines
378	additional_ident_info,	344	additional_ident_info,
379	additional_info_len);	345	additional_info_len);
380		346
381	if (head) {	347	vidtv_psi_desc_chain(head, (struct vidtv_psi_desc *)desc);
382	while (head->next)	348	return desc;
383	head = head->next;	349	}
384		350
385	head->next = (struct vidtv_psi_desc *)desc;	351	struct vidtv_psi_desc_network_name
		352	vidtv_psi_network_name_desc_init(struct vidtv_psi_desc head, char *network_name)
		353	{
		354	u32 network_name_len = network_name ? strlen(network_name) : 0;
		355	struct vidtv_psi_desc_network_name *desc;
		356
		357	desc = kzalloc(sizeof(*desc), GFP_KERNEL);
		358	if (!desc)
		359	return NULL;
		360
		361	desc->type = NETWORK_NAME_DESCRIPTOR;
		362
		363	desc->length = network_name_len;
		364
		365	if (network_name && network_name_len)
		366	desc->network_name = kstrdup(network_name, GFP_KERNEL);
		367
		368	vidtv_psi_desc_chain(head, (struct vidtv_psi_desc *)desc);
		369	return desc;
		370	}
		371
		372	struct vidtv_psi_desc_service_list
		373	vidtv_psi_service_list_desc_init(struct vidtv_psi_desc head,
		374	struct vidtv_psi_desc_service_list_entry *entry)
		375	{
		376	struct vidtv_psi_desc_service_list_entry *curr_e = NULL;
		377	struct vidtv_psi_desc_service_list_entry *head_e = NULL;
		378	struct vidtv_psi_desc_service_list_entry *prev_e = NULL;
		379	struct vidtv_psi_desc_service_list *desc;
		380	u16 length = 0;
		381
		382	desc = kzalloc(sizeof(*desc), GFP_KERNEL);
		383	if (!desc)
		384	return NULL;
		385
		386	desc->type = SERVICE_LIST_DESCRIPTOR;
		387
		388	while (entry) {
		389	curr_e = kzalloc(sizeof(*curr_e), GFP_KERNEL);
		390	if (!curr_e) {
		391	while (head_e) {
		392	curr_e = head_e;
		393	head_e = head_e->next;
		394	kfree(curr_e);
		395	}
		396	kfree(desc);
		397	return NULL;
		398	}
		399
		400	curr_e->service_id = entry->service_id;
		401	curr_e->service_type = entry->service_type;
		402
		403	length += sizeof(struct vidtv_psi_desc_service_list_entry) -
		404	sizeof(struct vidtv_psi_desc_service_list_entry *);
		405
		406	if (!head_e)
		407	head_e = curr_e;
		408	if (prev_e)
		409	prev_e->next = curr_e;
		410
		411	prev_e = curr_e;
		412	entry = entry->next;
386	}	413	}
387		414
		415	desc->length = length;
		416	desc->service_list = head_e;
		417
		418	vidtv_psi_desc_chain(head, (struct vidtv_psi_desc *)desc);
		419	return desc;
		420	}
		421
		422	struct vidtv_psi_desc_short_event
		423	vidtv_psi_short_event_desc_init(struct vidtv_psi_desc head,
		424	char *iso_language_code,
		425	char *event_name,
		426	char *text)
		427	{
		428	u32 iso_len = iso_language_code ? strlen(iso_language_code) : 0;
		429	u32 event_name_len = event_name ? strlen(event_name) : 0;
		430	struct vidtv_psi_desc_short_event *desc;
		431	u32 text_len = text ? strlen(text) : 0;
		432
		433	desc = kzalloc(sizeof(*desc), GFP_KERNEL);
		434	if (!desc)
		435	return NULL;
		436
		437	desc->type = SHORT_EVENT_DESCRIPTOR;
		438
		439	desc->length = ISO_LANGUAGE_CODE_LEN +
		440	sizeof_field(struct vidtv_psi_desc_short_event, event_name_len) +
		441	event_name_len +
		442	sizeof_field(struct vidtv_psi_desc_short_event, text_len) +
		443	text_len;
		444
		445	desc->event_name_len = event_name_len;
		446	desc->text_len = text_len;
		447
		448	if (iso_len != ISO_LANGUAGE_CODE_LEN)
		449	iso_language_code = "eng";
		450
		451	desc->iso_language_code = kstrdup(iso_language_code, GFP_KERNEL);
		452
		453	if (event_name && event_name_len)
		454	desc->event_name = kstrdup(event_name, GFP_KERNEL);
		455
		456	if (text && text_len)
		457	desc->text = kstrdup(text, GFP_KERNEL);
		458
		459	vidtv_psi_desc_chain(head, (struct vidtv_psi_desc *)desc);
388	return desc;	460	return desc;
389	}	461	}
390		462
391	struct vidtv_psi_desc vidtv_psi_desc_clone(struct vidtv_psi_desc desc)	463	struct vidtv_psi_desc vidtv_psi_desc_clone(struct vidtv_psi_desc desc)
392	{	464	{
		465	struct vidtv_psi_desc_network_name *desc_network_name;
		466	struct vidtv_psi_desc_service_list *desc_service_list;
		467	struct vidtv_psi_desc_short_event *desc_short_event;
		468	struct vidtv_psi_desc_service *service;
393	struct vidtv_psi_desc *head = NULL;	469	struct vidtv_psi_desc *head = NULL;
394	struct vidtv_psi_desc *prev = NULL;	470	struct vidtv_psi_desc *prev = NULL;
395	struct vidtv_psi_desc *curr = NULL;	471	struct vidtv_psi_desc *curr = NULL;
396		472
397	struct vidtv_psi_desc_service *service;
398
399	while (desc) {	473	while (desc) {
400	switch (desc->type) {	474	switch (desc->type) {
401	case SERVICE_DESCRIPTOR:	475	case SERVICE_DESCRIPTOR:
402	service = (struct vidtv_psi_desc_service *)desc;	476	service = (struct vidtv_psi_desc_service *)desc;
403	curr = (struct vidtv_psi_desc *)	477	curr = (struct vidtv_psi_desc *)
404	vidtv_psi_service_desc_init(head,	478	vidtv_psi_service_desc_init(head,
405	service->service_type,	479	service->service_type,
406	service->service_name,	480	service->service_name,
407	service->provider_name);	481	service->provider_name);
		482	break;
		483
		484	case NETWORK_NAME_DESCRIPTOR:
		485	desc_network_name = (struct vidtv_psi_desc_network_name *)desc;
		486	curr = (struct vidtv_psi_desc *)
		487	vidtv_psi_network_name_desc_init(head,
		488	desc_network_name->network_name);
		489	break;
		490
		491	case SERVICE_LIST_DESCRIPTOR:
		492	desc_service_list = (struct vidtv_psi_desc_service_list *)desc;
		493	curr = (struct vidtv_psi_desc *)
		494	vidtv_psi_service_list_desc_init(head,
		495	desc_service_list->service_list);
		496	break;
		497
		498	case SHORT_EVENT_DESCRIPTOR:
		499	desc_short_event = (struct vidtv_psi_desc_short_event *)desc;
		500	curr = (struct vidtv_psi_desc *)
		501	vidtv_psi_short_event_desc_init(head,
		502	desc_short_event->iso_language_code,
		503	desc_short_event->event_name,
		504	desc_short_event->text);
408	break;	505	break;
409		506
410	case REGISTRATION_DESCRIPTOR:	507	case REGISTRATION_DESCRIPTOR:
411	default:	508	default:
412	curr = kzalloc(sizeof(*desc) + desc->length, GFP_KERNEL);	509	curr = kzalloc(sizeof(*desc) + desc->length, GFP_KERNEL);
		510	if (!curr)
		511	return NULL;
413	memcpy(curr, desc, sizeof(*desc) + desc->length);	512	memcpy(curr, desc, sizeof(*desc) + desc->length);
414	break;	513	}
415	}
416		514
417	if (curr)	515	if (!curr)
418	curr->next = NULL;	516	return NULL;
		517
		518	curr->next = NULL;
419	if (!head)	519	if (!head)
420	head = curr;	520	head = curr;
421	if (prev)	521	if (prev)
@@ -430,6 +530,8 @@ struct vidtv_psi_desc vidtv_psi_desc_clone(struct vidtv_psi_desc desc) · 8 unmodified lines
430		530
431	void vidtv_psi_desc_destroy(struct vidtv_psi_desc *desc)	531	void vidtv_psi_desc_destroy(struct vidtv_psi_desc *desc)
432	{	532	{
		533	struct vidtv_psi_desc_service_list_entry *sl_entry_tmp = NULL;
		534	struct vidtv_psi_desc_service_list_entry *sl_entry = NULL;
433	struct vidtv_psi_desc *curr = desc;	535	struct vidtv_psi_desc *curr = desc;
434	struct vidtv_psi_desc *tmp = NULL;	536	struct vidtv_psi_desc *tmp = NULL;
435		537
@@ -447,6 +549,25 @@ void vidtv_psi_desc_destroy(struct vidtv_psi_desc *desc) · 11 unmodified lines
447	/* nothing to do */	549	/* nothing to do */
448	break;	550	break;
449		551
		552	case NETWORK_NAME_DESCRIPTOR:
		553	kfree(((struct vidtv_psi_desc_network_name *)tmp)->network_name);
		554	break;
		555
		556	case SERVICE_LIST_DESCRIPTOR:
		557	sl_entry = ((struct vidtv_psi_desc_service_list *)tmp)->service_list;
		558	while (sl_entry) {
		559	sl_entry_tmp = sl_entry;
		560	sl_entry = sl_entry->next;
		561	kfree(sl_entry_tmp);
		562	}
		563	break;
		564
		565	case SHORT_EVENT_DESCRIPTOR:
		566	kfree(((struct vidtv_psi_desc_short_event *)tmp)->iso_language_code);
		567	kfree(((struct vidtv_psi_desc_short_event *)tmp)->event_name);
		568	kfree(((struct vidtv_psi_desc_short_event *)tmp)->text);
		569	break;
		570
450	default:	571	default:
451	pr_warn_ratelimited("Possible leak: not handling descriptor type %d\n",	572	pr_warn_ratelimited("Possible leak: not handling descriptor type %d\n",
452	tmp->type);	573	tmp->type);
@@ -513,63 +634,119 @@ void vidtv_sdt_desc_assign(struct vidtv_psi_table_sdt *sdt, · 60 unmodified lines
513	vidtv_psi_update_version_num(&sdt->header);	634	vidtv_psi_update_version_num(&sdt->header);
514	}	635	}
515		636
516	static u32 vidtv_psi_desc_write_into(struct desc_write_args args)	637	static u32 vidtv_psi_desc_write_into(struct desc_write_args *args)
517	{	638	{
518	/* the number of bytes written by this function */	639	struct psi_write_args psi_args = {
		640	.dest_buf = args->dest_buf,
		641	.from = &args->desc->type,
		642	.pid = args->pid,
		643	.new_psi_section = false,
		644	.continuity_counter = args->continuity_counter,
		645	.is_crc = false,
		646	.dest_buf_sz = args->dest_buf_sz,
		647	.crc = args->crc,
		648	.len = sizeof_field(struct vidtv_psi_desc, type) +
		649	sizeof_field(struct vidtv_psi_desc, length),
		650	};
		651	struct vidtv_psi_desc_service_list_entry *serv_list_entry = NULL;
519	u32 nbytes = 0;	652	u32 nbytes = 0;
520	struct psi_write_args psi_args = {};
521
522	psi_args.dest_buf = args.dest_buf;
523	psi_args.from = &args.desc->type;
524		653
525	psi_args.len = sizeof_field(struct vidtv_psi_desc, type) +	654	psi_args.dest_offset = args->dest_offset + nbytes;
526	sizeof_field(struct vidtv_psi_desc, length);
527		655
528	psi_args.dest_offset = args.dest_offset + nbytes;	656	nbytes += vidtv_psi_ts_psi_write_into(&psi_args);
529	psi_args.pid = args.pid;
530	psi_args.new_psi_section = false;
531	psi_args.continuity_counter = args.continuity_counter;
532	psi_args.is_crc = false;
533	psi_args.dest_buf_sz = args.dest_buf_sz;
534	psi_args.crc = args.crc;
535		657
536	nbytes += vidtv_psi_ts_psi_write_into(psi_args);	658	switch (args->desc->type) {
537
538	switch (args.desc->type) {
539	case SERVICE_DESCRIPTOR:	659	case SERVICE_DESCRIPTOR:
540	psi_args.dest_offset = args.dest_offset + nbytes;	660	psi_args.dest_offset = args->dest_offset + nbytes;
541	psi_args.len = sizeof_field(struct vidtv_psi_desc_service, service_type) +	661	psi_args.len = sizeof_field(struct vidtv_psi_desc_service, service_type) +
542	sizeof_field(struct vidtv_psi_desc_service, provider_name_len);	662	sizeof_field(struct vidtv_psi_desc_service, provider_name_len);
543	psi_args.from = &((struct vidtv_psi_desc_service *)args.desc)->service_type;	663	psi_args.from = &((struct vidtv_psi_desc_service *)args->desc)->service_type;
544		664
545	nbytes += vidtv_psi_ts_psi_write_into(psi_args);	665	nbytes += vidtv_psi_ts_psi_write_into(&psi_args);
546		666
547	psi_args.dest_offset = args.dest_offset + nbytes;	667	psi_args.dest_offset = args->dest_offset + nbytes;
548	psi_args.len = ((struct vidtv_psi_desc_service *)args.desc)->provider_name_len;	668	psi_args.len = ((struct vidtv_psi_desc_service *)args->desc)->provider_name_len;
549	psi_args.from = ((struct vidtv_psi_desc_service *)args.desc)->provider_name;	669	psi_args.from = ((struct vidtv_psi_desc_service *)args->desc)->provider_name;
550		670
551	nbytes += vidtv_psi_ts_psi_write_into(psi_args);	671	nbytes += vidtv_psi_ts_psi_write_into(&psi_args);
552		672
553	psi_args.dest_offset = args.dest_offset + nbytes;	673	psi_args.dest_offset = args->dest_offset + nbytes;
554	psi_args.len = sizeof_field(struct vidtv_psi_desc_service, service_name_len);	674	psi_args.len = sizeof_field(struct vidtv_psi_desc_service, service_name_len);
555	psi_args.from = &((struct vidtv_psi_desc_service *)args.desc)->service_name_len;	675	psi_args.from = &((struct vidtv_psi_desc_service *)args->desc)->service_name_len;
556		676
557	nbytes += vidtv_psi_ts_psi_write_into(psi_args);	677	nbytes += vidtv_psi_ts_psi_write_into(&psi_args);
558		678
559	psi_args.dest_offset = args.dest_offset + nbytes;	679	psi_args.dest_offset = args->dest_offset + nbytes;
560	psi_args.len = ((struct vidtv_psi_desc_service *)args.desc)->service_name_len;	680	psi_args.len = ((struct vidtv_psi_desc_service *)args->desc)->service_name_len;
561	psi_args.from = ((struct vidtv_psi_desc_service *)args.desc)->service_name;	681	psi_args.from = ((struct vidtv_psi_desc_service *)args->desc)->service_name;
		682
		683	nbytes += vidtv_psi_ts_psi_write_into(&psi_args);
		684	break;
		685
		686	case NETWORK_NAME_DESCRIPTOR:
		687	psi_args.dest_offset = args->dest_offset + nbytes;
		688	psi_args.len = args->desc->length;
		689	psi_args.from = ((struct vidtv_psi_desc_network_name *)args->desc)->network_name;
		690
		691	nbytes += vidtv_psi_ts_psi_write_into(&psi_args);
		692	break;
		693
		694	case SERVICE_LIST_DESCRIPTOR:
		695	serv_list_entry = ((struct vidtv_psi_desc_service_list *)args->desc)->service_list;
		696	while (serv_list_entry) {
		697	psi_args.dest_offset = args->dest_offset + nbytes;
		698	psi_args.len = sizeof(struct vidtv_psi_desc_service_list_entry) -
		699	sizeof(struct vidtv_psi_desc_service_list_entry *);
		700	psi_args.from = serv_list_entry;
		701
		702	nbytes += vidtv_psi_ts_psi_write_into(&psi_args);
		703
		704	serv_list_entry = serv_list_entry->next;
		705	}
		706	break;
		707
		708	case SHORT_EVENT_DESCRIPTOR:
		709	psi_args.dest_offset = args->dest_offset + nbytes;
		710	psi_args.len = ISO_LANGUAGE_CODE_LEN;
		711	psi_args.from = ((struct vidtv_psi_desc_short_event *)
		712	args->desc)->iso_language_code;
		713
		714	nbytes += vidtv_psi_ts_psi_write_into(&psi_args);
		715
		716	psi_args.dest_offset = args->dest_offset + nbytes;
		717	psi_args.len = sizeof_field(struct vidtv_psi_desc_short_event, event_name_len);
		718	psi_args.from = &((struct vidtv_psi_desc_short_event *)
		719	args->desc)->event_name_len;
		720
		721	nbytes += vidtv_psi_ts_psi_write_into(&psi_args);
		722
		723	psi_args.dest_offset = args->dest_offset + nbytes;
		724	psi_args.len = ((struct vidtv_psi_desc_short_event *)args->desc)->event_name_len;
		725	psi_args.from = ((struct vidtv_psi_desc_short_event *)args->desc)->event_name;
		726
		727	nbytes += vidtv_psi_ts_psi_write_into(&psi_args);
		728
		729	psi_args.dest_offset = args->dest_offset + nbytes;
		730	psi_args.len = sizeof_field(struct vidtv_psi_desc_short_event, text_len);
		731	psi_args.from = &((struct vidtv_psi_desc_short_event *)args->desc)->text_len;
		732
		733	nbytes += vidtv_psi_ts_psi_write_into(&psi_args);
		734
		735	psi_args.dest_offset = args->dest_offset + nbytes;
		736	psi_args.len = ((struct vidtv_psi_desc_short_event *)args->desc)->text_len;
		737	psi_args.from = ((struct vidtv_psi_desc_short_event *)args->desc)->text;
		738
		739	nbytes += vidtv_psi_ts_psi_write_into(&psi_args);
562		740
563	nbytes += vidtv_psi_ts_psi_write_into(psi_args);
564	break;	741	break;
565		742
566	case REGISTRATION_DESCRIPTOR:	743	case REGISTRATION_DESCRIPTOR:
567	default:	744	default:
568	psi_args.dest_offset = args.dest_offset + nbytes;	745	psi_args.dest_offset = args->dest_offset + nbytes;
569	psi_args.len = args.desc->length;	746	psi_args.len = args->desc->length;
570	psi_args.from = &args.desc->data;	747	psi_args.from = &args->desc->data;
571		748
572	nbytes += vidtv_psi_ts_psi_write_into(psi_args);	749	nbytes += vidtv_psi_ts_psi_write_into(&psi_args);
573	break;	750	break;
574	}	751	}
575		752
@@ -577,40 +754,37 @@ static u32 vidtv_psi_desc_write_into(struct desc_write_args args) · 1 unmodified line
577	}	754	}
578		755
579	static u32	756	static u32
580	vidtv_psi_table_header_write_into(struct header_write_args args)	757	vidtv_psi_table_header_write_into(struct header_write_args *args)
581	{	758	{
582	/* the number of bytes written by this function */	759	struct psi_write_args psi_args = {
583	u32 nbytes = 0;	760	.dest_buf = args->dest_buf,
584	struct psi_write_args psi_args = {};	761	.from = args->h,
585		762	.len = sizeof(struct vidtv_psi_table_header),
586	psi_args.dest_buf = args.dest_buf;	763	.dest_offset = args->dest_offset,
587	psi_args.from = args.h;	764	.pid = args->pid,
588	psi_args.len = sizeof(struct vidtv_psi_table_header);	765	.new_psi_section = true,
589	psi_args.dest_offset = args.dest_offset;	766	.continuity_counter = args->continuity_counter,
590	psi_args.pid = args.pid;	767	.is_crc = false,
591	psi_args.new_psi_section = true;	768	.dest_buf_sz = args->dest_buf_sz,
592	psi_args.continuity_counter = args.continuity_counter;	769	.crc = args->crc,
593	psi_args.is_crc = false;	770	};
594	psi_args.dest_buf_sz = args.dest_buf_sz;	771
595	psi_args.crc = args.crc;	772	return vidtv_psi_ts_psi_write_into(&psi_args);
596
597	nbytes += vidtv_psi_ts_psi_write_into(psi_args);
598
599	return nbytes;
600	}	773	}
601		774
602	void	775	void
603	vidtv_psi_pat_table_update_sec_len(struct vidtv_psi_table_pat *pat)	776	vidtv_psi_pat_table_update_sec_len(struct vidtv_psi_table_pat *pat)
604	{	777	{
605	/* see ISO/IEC 13818-1 : 2000 p.43 */
606	u16 length = 0;	778	u16 length = 0;
607	u32 i;	779	u32 i;
608		780
		781	/* see ISO/IEC 13818-1 : 2000 p.43 */
		782
609	/* from immediately after 'section_length' until 'last_section_number'*/	783	/* from immediately after 'section_length' until 'last_section_number'*/
610	length += PAT_LEN_UNTIL_LAST_SECTION_NUMBER;	784	length += PAT_LEN_UNTIL_LAST_SECTION_NUMBER;
611		785
612	/* do not count the pointer */	786	/* do not count the pointer */
613	for (i = 0; i < pat->programs; ++i)	787	for (i = 0; i < pat->num_pat; ++i)
614	length += sizeof(struct vidtv_psi_table_pat_program) -	788	length += sizeof(struct vidtv_psi_table_pat_program) -
615	sizeof(struct vidtv_psi_table_pat_program *);	789	sizeof(struct vidtv_psi_table_pat_program *);
616		790
@@ -621,10 +795,11 @@ vidtv_psi_pat_table_update_sec_len(struct vidtv_psi_table_pat *pat) · 4 unmodified lines
621		795
622	void vidtv_psi_pmt_table_update_sec_len(struct vidtv_psi_table_pmt *pmt)	796	void vidtv_psi_pmt_table_update_sec_len(struct vidtv_psi_table_pmt *pmt)
623	{	797	{
624	/* see ISO/IEC 13818-1 : 2000 p.46 */
625	u16 length = 0;
626	struct vidtv_psi_table_pmt_stream *s = pmt->stream;	798	struct vidtv_psi_table_pmt_stream *s = pmt->stream;
627	u16 desc_loop_len;	799	u16 desc_loop_len;
		800	u16 length = 0;
		801
		802	/* see ISO/IEC 13818-1 : 2000 p.46 */
628		803
629	/* from immediately after 'section_length' until 'program_info_length'*/	804	/* from immediately after 'section_length' until 'program_info_length'*/
630	length += PMT_LEN_UNTIL_PROGRAM_INFO_LENGTH;	805	length += PMT_LEN_UNTIL_PROGRAM_INFO_LENGTH;
@@ -655,10 +830,11 @@ void vidtv_psi_pmt_table_update_sec_len(struct vidtv_psi_table_pmt *pmt) · 24 unmodified lines
655		830
656	void vidtv_psi_sdt_table_update_sec_len(struct vidtv_psi_table_sdt *sdt)	831	void vidtv_psi_sdt_table_update_sec_len(struct vidtv_psi_table_sdt *sdt)
657	{	832	{
658	/* see ETSI EN 300 468 V 1.10.1 p.24 */
659	u16 length = 0;
660	struct vidtv_psi_table_sdt_service *s = sdt->service;	833	struct vidtv_psi_table_sdt_service *s = sdt->service;
661	u16 desc_loop_len;	834	u16 desc_loop_len;
		835	u16 length = 0;
		836
		837	/* see ETSI EN 300 468 V 1.10.1 p.24 */
662		838
663	/*	839	/*
664	* from immediately after 'section_length' until	840	* from immediately after 'section_length' until
@@ -681,7 +857,6 @@ void vidtv_psi_sdt_table_update_sec_len(struct vidtv_psi_table_sdt *sdt) · 16 unmodified lines
681	}	857	}
682		858
683	length += CRC_SIZE_IN_BYTES;	859	length += CRC_SIZE_IN_BYTES;
684
685	vidtv_psi_set_sec_len(&sdt->header, length);	860	vidtv_psi_set_sec_len(&sdt->header, length);
686	}	861	}
687		862
@@ -694,6 +869,8 @@ vidtv_psi_pat_program_init(struct vidtv_psi_table_pat_program *head, · 6 unmodified lines
694	const u16 RESERVED = 0x07;	869	const u16 RESERVED = 0x07;
695		870
696	program = kzalloc(sizeof(*program), GFP_KERNEL);	871	program = kzalloc(sizeof(*program), GFP_KERNEL);
		872	if (!program)
		873	return NULL;
697		874
698	program->service_id = cpu_to_be16(service_id);	875	program->service_id = cpu_to_be16(service_id);
699		876
@@ -714,8 +891,8 @@ vidtv_psi_pat_program_init(struct vidtv_psi_table_pat_program *head, · 14 unmodified lines
714	void	891	void
715	vidtv_psi_pat_program_destroy(struct vidtv_psi_table_pat_program *p)	892	vidtv_psi_pat_program_destroy(struct vidtv_psi_table_pat_program *p)
716	{	893	{
717	struct vidtv_psi_table_pat_program *curr = p;
718	struct vidtv_psi_table_pat_program *tmp = NULL;	894	struct vidtv_psi_table_pat_program *tmp = NULL;
		895	struct vidtv_psi_table_pat_program *curr = p;
719		896
720	while (curr) {	897	while (curr) {
721	tmp = curr;	898	tmp = curr;
@@ -724,42 +901,49 @@ vidtv_psi_pat_program_destroy(struct vidtv_psi_table_pat_program *p) · 2 unmodified lines
724	}	901	}
725	}	902	}
726		903
		904	/* This function transfers ownership of p to the table */
727	void	905	void
728	vidtv_psi_pat_program_assign(struct vidtv_psi_table_pat *pat,	906	vidtv_psi_pat_program_assign(struct vidtv_psi_table_pat *pat,
729	struct vidtv_psi_table_pat_program *p)	907	struct vidtv_psi_table_pat_program *p)
730	{	908	{
731	/* This function transfers ownership of p to the table */	909	struct vidtv_psi_table_pat_program *program;
		910	u16 program_count;
732		911
733	u16 program_count = 0;	912	do {
734	struct vidtv_psi_table_pat_program *program = p;	913	program_count = 0;
		914	program = p;
735		915
736	if (p == pat->program)	916	if (p == pat->program)
737	return;	917	return;
738		918
739	while (program) {	919	while (program) {
740	++program_count;	920	++program_count;
741	program = program->next;	921	program = program->next;
742	}	922	}
743		923
744	pat->programs = program_count;	924	pat->num_pat = program_count;
745	pat->program = p;	925	pat->program = p;
746		926
747	/* Recompute section length */	927	/* Recompute section length */
748	vidtv_psi_pat_table_update_sec_len(pat);	928	vidtv_psi_pat_table_update_sec_len(pat);
749		929
750	if (vidtv_psi_get_sec_len(&pat->header) > MAX_SECTION_LEN)	930	p = NULL;
751	vidtv_psi_pat_program_assign(pat, NULL);	931	} while (vidtv_psi_get_sec_len(&pat->header) > MAX_SECTION_LEN);
752		932
753	vidtv_psi_update_version_num(&pat->header);	933	vidtv_psi_update_version_num(&pat->header);
754	}	934	}
755		935
756	struct vidtv_psi_table_pat *vidtv_psi_pat_table_init(u16 transport_stream_id)	936	struct vidtv_psi_table_pat *vidtv_psi_pat_table_init(u16 transport_stream_id)
757	{	937	{
758	struct vidtv_psi_table_pat pat = kzalloc(sizeof(pat), GFP_KERNEL);	938	struct vidtv_psi_table_pat *pat;
759	const u16 SYNTAX = 0x1;	939	const u16 SYNTAX = 0x1;
760	const u16 ZERO = 0x0;	940	const u16 ZERO = 0x0;
761	const u16 ONES = 0x03;	941	const u16 ONES = 0x03;
762		942
		943	pat = kzalloc(sizeof(*pat), GFP_KERNEL);
		944	if (!pat)
		945	return NULL;
		946
763	pat->header.table_id = 0x0;	947	pat->header.table_id = 0x0;
764		948
765	pat->header.bitfield = cpu_to_be16((SYNTAX << 15) \| (ZERO << 14) \| (ONES << 12));	949	pat->header.bitfield = cpu_to_be16((SYNTAX << 15) \| (ZERO << 14) \| (ONES << 12));
@@ -772,70 +956,68 @@ struct vidtv_psi_table_pat *vidtv_psi_pat_table_init(u16 transport_stream_id) · 6 unmodified lines
772	pat->header.section_id = 0x0;	956	pat->header.section_id = 0x0;
773	pat->header.last_section = 0x0;	957	pat->header.last_section = 0x0;
774		958
775	pat->programs = 0;
776
777	vidtv_psi_pat_table_update_sec_len(pat);	959	vidtv_psi_pat_table_update_sec_len(pat);
778		960
779	return pat;	961	return pat;
780	}	962	}
781		963
782	u32 vidtv_psi_pat_write_into(struct vidtv_psi_pat_write_args args)	964	u32 vidtv_psi_pat_write_into(struct vidtv_psi_pat_write_args *args)
783	{	965	{
784	/* the number of bytes written by this function */	966	struct vidtv_psi_table_pat_program *p = args->pat->program;
		967	struct header_write_args h_args = {
		968	.dest_buf = args->buf,
		969	.dest_offset = args->offset,
		970	.pid = VIDTV_PAT_PID,
		971	.h = &args->pat->header,
		972	.continuity_counter = args->continuity_counter,
		973	.dest_buf_sz = args->buf_sz,
		974	};
		975	struct psi_write_args psi_args = {
		976	.dest_buf = args->buf,
		977	.pid = VIDTV_PAT_PID,
		978	.new_psi_section = false,
		979	.continuity_counter = args->continuity_counter,
		980	.is_crc = false,
		981	.dest_buf_sz = args->buf_sz,
		982	};
		983	struct crc32_write_args c_args = {
		984	.dest_buf = args->buf,
		985	.pid = VIDTV_PAT_PID,
		986	.dest_buf_sz = args->buf_sz,
		987	};
		988	u32 crc = INITIAL_CRC;
785	u32 nbytes = 0;	989	u32 nbytes = 0;
786	const u16 pat_pid = VIDTV_PAT_PID;
787	u32 crc = 0xffffffff;
788
789	struct vidtv_psi_table_pat_program *p = args.pat->program;
790		990
791	struct header_write_args h_args = {};	991	vidtv_psi_pat_table_update_sec_len(args->pat);
792	struct psi_write_args psi_args = {};
793	struct crc32_write_args c_args = {};
794		992
795	vidtv_psi_pat_table_update_sec_len(args.pat);
796
797	h_args.dest_buf = args.buf;
798	h_args.dest_offset = args.offset;
799	h_args.h = &args.pat->header;
800	h_args.pid = pat_pid;
801	h_args.continuity_counter = args.continuity_counter;
802	h_args.dest_buf_sz = args.buf_sz;
803	h_args.crc = &crc;	993	h_args.crc = &crc;
804		994
805	nbytes += vidtv_psi_table_header_write_into(h_args);	995	nbytes += vidtv_psi_table_header_write_into(&h_args);
806		996
807	/* note that the field 'u16 programs' is not really part of the PAT */	997	/* note that the field 'u16 programs' is not really part of the PAT */
808		998
809	psi_args.dest_buf = args.buf;	999	psi_args.crc = &crc;
810	psi_args.pid = pat_pid;
811	psi_args.new_psi_section = false;
812	psi_args.continuity_counter = args.continuity_counter;
813	psi_args.is_crc = false;
814	psi_args.dest_buf_sz = args.buf_sz;
815	psi_args.crc = &crc;
816		1000
817	while (p) {	1001	while (p) {
818	/* copy the PAT programs */	1002	/* copy the PAT programs */
819	psi_args.from = p;	1003	psi_args.from = p;
820	/* skip the pointer */	1004	/* skip the pointer */
821	psi_args.len = sizeof(*p) -	1005	psi_args.len = sizeof(*p) -
822	sizeof(struct vidtv_psi_table_pat_program *);	1006	sizeof(struct vidtv_psi_table_pat_program *);
823	psi_args.dest_offset = args.offset + nbytes;	1007	psi_args.dest_offset = args->offset + nbytes;
		1008	psi_args.continuity_counter = args->continuity_counter;
824		1009
825	nbytes += vidtv_psi_ts_psi_write_into(psi_args);	1010	nbytes += vidtv_psi_ts_psi_write_into(&psi_args);
826		1011
827	p = p->next;	1012	p = p->next;
828	}	1013	}
829		1014
830	c_args.dest_buf = args.buf;	1015	c_args.dest_offset = args->offset + nbytes;
831	c_args.dest_offset = args.offset + nbytes;	1016	c_args.continuity_counter = args->continuity_counter;
832	c_args.crc = cpu_to_be32(crc);	1017	c_args.crc = cpu_to_be32(crc);
833	c_args.pid = pat_pid;
834	c_args.continuity_counter = args.continuity_counter;
835	c_args.dest_buf_sz = args.buf_sz;
836		1018
837	/* Write the CRC32 at the end */	1019	/* Write the CRC32 at the end */
838	nbytes += table_section_crc32_write_into(c_args);	1020	nbytes += table_section_crc32_write_into(&c_args);
839		1021
840	return nbytes;	1022	return nbytes;
841	}	1023	}
@@ -859,6 +1041,8 @@ vidtv_psi_pmt_stream_init(struct vidtv_psi_table_pmt_stream *head, · 17 unmodified lines
859	u16 desc_loop_len;	1041	u16 desc_loop_len;
860		1042
861	stream = kzalloc(sizeof(*stream), GFP_KERNEL);	1043	stream = kzalloc(sizeof(*stream), GFP_KERNEL);
		1044	if (!stream)
		1045	return NULL;
862		1046
863	stream->type = stream_type;	1047	stream->type = stream_type;
864		1048
@@ -883,8 +1067,8 @@ vidtv_psi_pmt_stream_init(struct vidtv_psi_table_pmt_stream *head, · 18 unmodified lines
883		1067
884	void vidtv_psi_pmt_stream_destroy(struct vidtv_psi_table_pmt_stream *s)	1068	void vidtv_psi_pmt_stream_destroy(struct vidtv_psi_table_pmt_stream *s)
885	{	1069	{
886	struct vidtv_psi_table_pmt_stream *curr_stream = s;
887	struct vidtv_psi_table_pmt_stream *tmp_stream = NULL;	1070	struct vidtv_psi_table_pmt_stream *tmp_stream = NULL;
		1071	struct vidtv_psi_table_pmt_stream *curr_stream = s;
888		1072
889	while (curr_stream) {	1073	while (curr_stream) {
890	tmp_stream = curr_stream;	1074	tmp_stream = curr_stream;
@@ -897,15 +1081,16 @@ void vidtv_psi_pmt_stream_destroy(struct vidtv_psi_table_pmt_stream *s) · 6 unmodified lines
897	void vidtv_psi_pmt_stream_assign(struct vidtv_psi_table_pmt *pmt,	1081	void vidtv_psi_pmt_stream_assign(struct vidtv_psi_table_pmt *pmt,
898	struct vidtv_psi_table_pmt_stream *s)	1082	struct vidtv_psi_table_pmt_stream *s)
899	{	1083	{
900	/* This function transfers ownership of s to the table */	1084	do {
901	if (s == pmt->stream)	1085	/* This function transfers ownership of s to the table */
902	return;	1086	if (s == pmt->stream)
		1087	return;
903		1088
904	pmt->stream = s;	1089	pmt->stream = s;
905	vidtv_psi_pmt_table_update_sec_len(pmt);	1090	vidtv_psi_pmt_table_update_sec_len(pmt);
906		1091
907	if (vidtv_psi_get_sec_len(&pmt->header) > MAX_SECTION_LEN)	1092	s = NULL;
908	vidtv_psi_pmt_stream_assign(pmt, NULL);	1093	} while (vidtv_psi_get_sec_len(&pmt->header) > MAX_SECTION_LEN);
909		1094
910	vidtv_psi_update_version_num(&pmt->header);	1095	vidtv_psi_update_version_num(&pmt->header);
911	}	1096	}
@@ -933,14 +1118,18 @@ u16 vidtv_psi_pmt_get_pid(struct vidtv_psi_table_pmt *section, · 21 unmodified lines
933	struct vidtv_psi_table_pmt *vidtv_psi_pmt_table_init(u16 program_number,	1118	struct vidtv_psi_table_pmt *vidtv_psi_pmt_table_init(u16 program_number,
934	u16 pcr_pid)	1119	u16 pcr_pid)
935	{	1120	{
936	struct vidtv_psi_table_pmt pmt = kzalloc(sizeof(pmt), GFP_KERNEL);	1121	struct vidtv_psi_table_pmt *pmt;
937	const u16 SYNTAX = 0x1;
938	const u16 ZERO = 0x0;
939	const u16 ONES = 0x03;
940	const u16 RESERVED1 = 0x07;	1122	const u16 RESERVED1 = 0x07;
941	const u16 RESERVED2 = 0x0f;	1123	const u16 RESERVED2 = 0x0f;
		1124	const u16 SYNTAX = 0x1;
		1125	const u16 ONES = 0x03;
		1126	const u16 ZERO = 0x0;
942	u16 desc_loop_len;	1127	u16 desc_loop_len;
943		1128
		1129	pmt = kzalloc(sizeof(*pmt), GFP_KERNEL);
		1130	if (!pmt)
		1131	return NULL;
		1132
944	if (!pcr_pid)	1133	if (!pcr_pid)
945	pcr_pid = 0x1fff;	1134	pcr_pid = 0x1fff;
946		1135
@@ -970,87 +1159,84 @@ struct vidtv_psi_table_pmt *vidtv_psi_pmt_table_init(u16 program_number, · 23 unmodified lines
970	return pmt;	1159	return pmt;
971	}	1160	}
972		1161
973	u32 vidtv_psi_pmt_write_into(struct vidtv_psi_pmt_write_args args)	1162	u32 vidtv_psi_pmt_write_into(struct vidtv_psi_pmt_write_args *args)
974	{	1163	{
975	/* the number of bytes written by this function */	1164	struct vidtv_psi_desc *table_descriptor = args->pmt->descriptor;
		1165	struct vidtv_psi_table_pmt_stream *stream = args->pmt->stream;
		1166	struct vidtv_psi_desc *stream_descriptor;
		1167	struct header_write_args h_args = {
		1168	.dest_buf = args->buf,
		1169	.dest_offset = args->offset,
		1170	.h = &args->pmt->header,
		1171	.pid = args->pid,
		1172	.continuity_counter = args->continuity_counter,
		1173	.dest_buf_sz = args->buf_sz,
		1174	};
		1175	struct psi_write_args psi_args = {
		1176	.dest_buf = args->buf,
		1177	.from = &args->pmt->bitfield,
		1178	.len = sizeof_field(struct vidtv_psi_table_pmt, bitfield) +
		1179	sizeof_field(struct vidtv_psi_table_pmt, bitfield2),
		1180	.pid = args->pid,
		1181	.new_psi_section = false,
		1182	.is_crc = false,
		1183	.dest_buf_sz = args->buf_sz,
		1184	};
		1185	struct desc_write_args d_args = {
		1186	.dest_buf = args->buf,
		1187	.desc = table_descriptor,
		1188	.pid = args->pid,
		1189	.dest_buf_sz = args->buf_sz,
		1190	};
		1191	struct crc32_write_args c_args = {
		1192	.dest_buf = args->buf,
		1193	.pid = args->pid,
		1194	.dest_buf_sz = args->buf_sz,
		1195	};
		1196	u32 crc = INITIAL_CRC;
976	u32 nbytes = 0;	1197	u32 nbytes = 0;
977	u32 crc = 0xffffffff;	1198
978		1199	vidtv_psi_pmt_table_update_sec_len(args->pmt);
979	struct vidtv_psi_desc *table_descriptor = args.pmt->descriptor;	1200
980	struct vidtv_psi_table_pmt_stream *stream = args.pmt->stream;
981	struct vidtv_psi_desc *stream_descriptor = (stream) ?
982	args.pmt->stream->descriptor :
983	NULL;
984
985	struct header_write_args h_args = {};
986	struct psi_write_args psi_args = {};
987	struct desc_write_args d_args = {};
988	struct crc32_write_args c_args = {};
989
990	vidtv_psi_pmt_table_update_sec_len(args.pmt);
991
992	h_args.dest_buf = args.buf;
993	h_args.dest_offset = args.offset;
994	h_args.h = &args.pmt->header;
995	h_args.pid = args.pid;
996	h_args.continuity_counter = args.continuity_counter;
997	h_args.dest_buf_sz = args.buf_sz;
998	h_args.crc = &crc;	1201	h_args.crc = &crc;
999		1202
1000	nbytes += vidtv_psi_table_header_write_into(h_args);	1203	nbytes += vidtv_psi_table_header_write_into(&h_args);
1001		1204
1002	/* write the two bitfields */	1205	/* write the two bitfields */
1003	psi_args.dest_buf = args.buf;	1206	psi_args.dest_offset = args->offset + nbytes;
1004	psi_args.from = &args.pmt->bitfield;	1207	psi_args.continuity_counter = args->continuity_counter;
1005	psi_args.len = sizeof_field(struct vidtv_psi_table_pmt, bitfield) +	1208	nbytes += vidtv_psi_ts_psi_write_into(&psi_args);
1006	sizeof_field(struct vidtv_psi_table_pmt, bitfield2);
1007
1008	psi_args.dest_offset = args.offset + nbytes;
1009	psi_args.pid = args.pid;
1010	psi_args.new_psi_section = false;
1011	psi_args.continuity_counter = args.continuity_counter;
1012	psi_args.is_crc = false;
1013	psi_args.dest_buf_sz = args.buf_sz;
1014	psi_args.crc = &crc;
1015
1016	nbytes += vidtv_psi_ts_psi_write_into(psi_args);
1017		1209
1018	while (table_descriptor) {	1210	while (table_descriptor) {
1019	/* write the descriptors, if any */	1211	/* write the descriptors, if any */
1020	d_args.dest_buf = args.buf;	1212	d_args.dest_offset = args->offset + nbytes;
1021	d_args.dest_offset = args.offset + nbytes;	1213	d_args.continuity_counter = args->continuity_counter;
1022	d_args.desc = table_descriptor;
1023	d_args.pid = args.pid;
1024	d_args.continuity_counter = args.continuity_counter;
1025	d_args.dest_buf_sz = args.buf_sz;
1026	d_args.crc = &crc;	1214	d_args.crc = &crc;
1027		1215
1028	nbytes += vidtv_psi_desc_write_into(d_args);	1216	nbytes += vidtv_psi_desc_write_into(&d_args);
1029		1217
1030	table_descriptor = table_descriptor->next;	1218	table_descriptor = table_descriptor->next;
1031	}	1219	}
1032		1220
		1221	psi_args.len += sizeof_field(struct vidtv_psi_table_pmt_stream, type);
1033	while (stream) {	1222	while (stream) {
1034	/* write the streams, if any */	1223	/* write the streams, if any */
1035	psi_args.from = stream;	1224	psi_args.from = stream;
1036	psi_args.len = sizeof_field(struct vidtv_psi_table_pmt_stream, type) +	1225	psi_args.dest_offset = args->offset + nbytes;
1037	sizeof_field(struct vidtv_psi_table_pmt_stream, bitfield) +	1226	psi_args.continuity_counter = args->continuity_counter;
1038	sizeof_field(struct vidtv_psi_table_pmt_stream, bitfield2);	1227
1039	psi_args.dest_offset = args.offset + nbytes;	1228	nbytes += vidtv_psi_ts_psi_write_into(&psi_args);
1040		1229
1041	nbytes += vidtv_psi_ts_psi_write_into(psi_args);	1230	stream_descriptor = stream->descriptor;
1042		1231
1043	while (stream_descriptor) {	1232	while (stream_descriptor) {
1044	/* write the stream descriptors, if any */	1233	/* write the stream descriptors, if any */
1045	d_args.dest_buf = args.buf;	1234	d_args.dest_offset = args->offset + nbytes;
1046	d_args.dest_offset = args.offset + nbytes;
1047	d_args.desc = stream_descriptor;	1235	d_args.desc = stream_descriptor;
1048	d_args.pid = args.pid;	1236	d_args.continuity_counter = args->continuity_counter;
1049	d_args.continuity_counter = args.continuity_counter;
1050	d_args.dest_buf_sz = args.buf_sz;
1051	d_args.crc = &crc;	1237	d_args.crc = &crc;
1052		1238
1053	nbytes += vidtv_psi_desc_write_into(d_args);	1239	nbytes += vidtv_psi_desc_write_into(&d_args);
1054		1240
1055	stream_descriptor = stream_descriptor->next;	1241	stream_descriptor = stream_descriptor->next;
1056	}	1242	}
@@ -1058,15 +1244,12 @@ u32 vidtv_psi_pmt_write_into(struct vidtv_psi_pmt_write_args args) · 1 unmodified line
1058	stream = stream->next;	1244	stream = stream->next;
1059	}	1245	}
1060		1246
1061	c_args.dest_buf = args.buf;	1247	c_args.dest_offset = args->offset + nbytes;
1062	c_args.dest_offset = args.offset + nbytes;
1063	c_args.crc = cpu_to_be32(crc);	1248	c_args.crc = cpu_to_be32(crc);
1064	c_args.pid = args.pid;	1249	c_args.continuity_counter = args->continuity_counter;
1065	c_args.continuity_counter = args.continuity_counter;
1066	c_args.dest_buf_sz = args.buf_sz;
1067		1250
1068	/* Write the CRC32 at the end */	1251	/* Write the CRC32 at the end */
1069	nbytes += table_section_crc32_write_into(c_args);	1252	nbytes += table_section_crc32_write_into(&c_args);
1070		1253
1071	return nbytes;	1254	return nbytes;
1072	}	1255	}
@@ -1078,16 +1261,20 @@ void vidtv_psi_pmt_table_destroy(struct vidtv_psi_table_pmt *pmt) · 5 unmodified lines
1078	kfree(pmt);	1261	kfree(pmt);
1079	}	1262	}
1080		1263
1081	struct vidtv_psi_table_sdt *vidtv_psi_sdt_table_init(u16 transport_stream_id)	1264	struct vidtv_psi_table_sdt *vidtv_psi_sdt_table_init(u16 network_id,
		1265	u16 transport_stream_id)
1082	{	1266	{
1083	struct vidtv_psi_table_sdt sdt = kzalloc(sizeof(sdt), GFP_KERNEL);	1267	struct vidtv_psi_table_sdt *sdt;
		1268	const u16 RESERVED = 0xff;
1084	const u16 SYNTAX = 0x1;	1269	const u16 SYNTAX = 0x1;
1085	const u16 ONE = 0x1;
1086	const u16 ONES = 0x03;	1270	const u16 ONES = 0x03;
1087	const u16 RESERVED = 0xff;	1271	const u16 ONE = 0x1;
1088		1272
1089	sdt->header.table_id = 0x42;	1273	sdt = kzalloc(sizeof(*sdt), GFP_KERNEL);
		1274	if (!sdt)
		1275	return NULL;
1090		1276
		1277	sdt->header.table_id = 0x42;
1091	sdt->header.bitfield = cpu_to_be16((SYNTAX << 15) \| (ONE << 14) \| (ONES << 12));	1278	sdt->header.bitfield = cpu_to_be16((SYNTAX << 15) \| (ONE << 14) \| (ONES << 12));
1092		1279
1093	/*	1280	/*
@@ -1111,7 +1298,7 @@ struct vidtv_psi_table_sdt *vidtv_psi_sdt_table_init(u16 transport_stream_id) · 17 unmodified lines
1111	* This can be changed to something more useful, when support for	1298	* This can be changed to something more useful, when support for
1112	* NIT gets added	1299	* NIT gets added
1113	*/	1300	*/
1114	sdt->network_id = cpu_to_be16(0xff01);	1301	sdt->network_id = cpu_to_be16(network_id);
1115	sdt->reserved = RESERVED;	1302	sdt->reserved = RESERVED;
1116		1303
1117	vidtv_psi_sdt_table_update_sec_len(sdt);	1304	vidtv_psi_sdt_table_update_sec_len(sdt);
@@ -1119,74 +1306,79 @@ struct vidtv_psi_table_sdt *vidtv_psi_sdt_table_init(u16 transport_stream_id) · 1 unmodified line
1119	return sdt;	1306	return sdt;
1120	}	1307	}
1121		1308
1122	u32 vidtv_psi_sdt_write_into(struct vidtv_psi_sdt_write_args args)	1309	u32 vidtv_psi_sdt_write_into(struct vidtv_psi_sdt_write_args *args)
1123	{	1310	{
		1311	struct header_write_args h_args = {
		1312	.dest_buf = args->buf,
		1313	.dest_offset = args->offset,
		1314	.h = &args->sdt->header,
		1315	.pid = VIDTV_SDT_PID,
		1316	.dest_buf_sz = args->buf_sz,
		1317	};
		1318	struct psi_write_args psi_args = {
		1319	.dest_buf = args->buf,
		1320	.len = sizeof_field(struct vidtv_psi_table_sdt, network_id) +
		1321	sizeof_field(struct vidtv_psi_table_sdt, reserved),
		1322	.pid = VIDTV_SDT_PID,
		1323	.new_psi_section = false,
		1324	.is_crc = false,
		1325	.dest_buf_sz = args->buf_sz,
		1326	};
		1327	struct desc_write_args d_args = {
		1328	.dest_buf = args->buf,
		1329	.pid = VIDTV_SDT_PID,
		1330	.dest_buf_sz = args->buf_sz,
		1331	};
		1332	struct crc32_write_args c_args = {
		1333	.dest_buf = args->buf,
		1334	.pid = VIDTV_SDT_PID,
		1335	.dest_buf_sz = args->buf_sz,
		1336	};
		1337	struct vidtv_psi_table_sdt_service *service = args->sdt->service;
		1338	struct vidtv_psi_desc *service_desc;
1124	u32 nbytes = 0;	1339	u32 nbytes = 0;
1125	u16 sdt_pid = VIDTV_SDT_PID; /* see ETSI EN 300 468 v1.15.1 p. 11 */	1340	u32 crc = INITIAL_CRC;
1126		1341
1127	u32 crc = 0xffffffff;	1342	/* see ETSI EN 300 468 v1.15.1 p. 11 */
1128		1343
1129	struct vidtv_psi_table_sdt_service *service = args.sdt->service;	1344	vidtv_psi_sdt_table_update_sec_len(args->sdt);
1130	struct vidtv_psi_desc *service_desc = (args.sdt->service) ?
1131	args.sdt->service->descriptor :
1132	NULL;
1133		1345
1134	struct header_write_args h_args = {};	1346	h_args.continuity_counter = args->continuity_counter;
1135	struct psi_write_args psi_args = {};
1136	struct desc_write_args d_args = {};
1137	struct crc32_write_args c_args = {};
1138
1139	vidtv_psi_sdt_table_update_sec_len(args.sdt);
1140
1141	h_args.dest_buf = args.buf;
1142	h_args.dest_offset = args.offset;
1143	h_args.h = &args.sdt->header;
1144	h_args.pid = sdt_pid;
1145	h_args.continuity_counter = args.continuity_counter;
1146	h_args.dest_buf_sz = args.buf_sz;
1147	h_args.crc = &crc;	1347	h_args.crc = &crc;
1148		1348
1149	nbytes += vidtv_psi_table_header_write_into(h_args);	1349	nbytes += vidtv_psi_table_header_write_into(&h_args);
1150
1151	psi_args.dest_buf = args.buf;
1152	psi_args.from = &args.sdt->network_id;
1153		1350
1154	psi_args.len = sizeof_field(struct vidtv_psi_table_sdt, network_id) +	1351	psi_args.from = &args->sdt->network_id;
1155	sizeof_field(struct vidtv_psi_table_sdt, reserved);	1352	psi_args.dest_offset = args->offset + nbytes;
1156		1353	psi_args.continuity_counter = args->continuity_counter;
1157	psi_args.dest_offset = args.offset + nbytes;
1158	psi_args.pid = sdt_pid;
1159	psi_args.new_psi_section = false;
1160	psi_args.continuity_counter = args.continuity_counter;
1161	psi_args.is_crc = false;
1162	psi_args.dest_buf_sz = args.buf_sz;
1163	psi_args.crc = &crc;	1354	psi_args.crc = &crc;
1164		1355
1165	/* copy u16 network_id + u8 reserved)*/	1356	/* copy u16 network_id + u8 reserved)*/
1166	nbytes += vidtv_psi_ts_psi_write_into(psi_args);	1357	nbytes += vidtv_psi_ts_psi_write_into(&psi_args);
		1358
		1359	/* skip both pointers at the end */
		1360	psi_args.len = sizeof(struct vidtv_psi_table_sdt_service) -
		1361	sizeof(struct vidtv_psi_desc *) -
		1362	sizeof(struct vidtv_psi_table_sdt_service *);
1167		1363
1168	while (service) {	1364	while (service) {
1169	/* copy the services, if any */	1365	/* copy the services, if any */
1170	psi_args.from = service;	1366	psi_args.from = service;
1171	/* skip both pointers at the end */	1367	psi_args.dest_offset = args->offset + nbytes;
1172	psi_args.len = sizeof(struct vidtv_psi_table_sdt_service) -	1368	psi_args.continuity_counter = args->continuity_counter;
1173	sizeof(struct vidtv_psi_desc *) -	1369
1174	sizeof(struct vidtv_psi_table_sdt_service *);	1370	nbytes += vidtv_psi_ts_psi_write_into(&psi_args);
1175	psi_args.dest_offset = args.offset + nbytes;
1176		1371
1177	nbytes += vidtv_psi_ts_psi_write_into(psi_args);	1372	service_desc = service->descriptor;
1178		1373
1179	while (service_desc) {	1374	while (service_desc) {
1180	/* copy the service descriptors, if any */	1375	/* copy the service descriptors, if any */
1181	d_args.dest_buf = args.buf;	1376	d_args.dest_offset = args->offset + nbytes;
1182	d_args.dest_offset = args.offset + nbytes;
1183	d_args.desc = service_desc;	1377	d_args.desc = service_desc;
1184	d_args.pid = sdt_pid;	1378	d_args.continuity_counter = args->continuity_counter;
1185	d_args.continuity_counter = args.continuity_counter;
1186	d_args.dest_buf_sz = args.buf_sz;
1187	d_args.crc = &crc;	1379	d_args.crc = &crc;
1188		1380
1189	nbytes += vidtv_psi_desc_write_into(d_args);	1381	nbytes += vidtv_psi_desc_write_into(&d_args);
1190		1382
1191	service_desc = service_desc->next;	1383	service_desc = service_desc->next;
1192	}	1384	}
@@ -1194,15 +1386,12 @@ u32 vidtv_psi_sdt_write_into(struct vidtv_psi_sdt_write_args args) · 1 unmodified line
1194	service = service->next;	1386	service = service->next;
1195	}	1387	}
1196		1388
1197	c_args.dest_buf = args.buf;	1389	c_args.dest_offset = args->offset + nbytes;
1198	c_args.dest_offset = args.offset + nbytes;
1199	c_args.crc = cpu_to_be32(crc);	1390	c_args.crc = cpu_to_be32(crc);
1200	c_args.pid = sdt_pid;	1391	c_args.continuity_counter = args->continuity_counter;
1201	c_args.continuity_counter = args.continuity_counter;
1202	c_args.dest_buf_sz = args.buf_sz;
1203		1392
1204	/* Write the CRC at the end */	1393	/* Write the CRC at the end */
1205	nbytes += table_section_crc32_write_into(c_args);	1394	nbytes += table_section_crc32_write_into(&c_args);
1206		1395
1207	return nbytes;	1396	return nbytes;
1208	}	1397	}
@@ -1215,11 +1404,15 @@ void vidtv_psi_sdt_table_destroy(struct vidtv_psi_table_sdt *sdt) · 6 unmodified lines
1215		1404
1216	struct vidtv_psi_table_sdt_service	1405	struct vidtv_psi_table_sdt_service
1217	vidtv_psi_sdt_service_init(struct vidtv_psi_table_sdt_service head,	1406	vidtv_psi_sdt_service_init(struct vidtv_psi_table_sdt_service head,
1218	u16 service_id)	1407	u16 service_id,
		1408	bool eit_schedule,
		1409	bool eit_present_following)
1219	{	1410	{
1220	struct vidtv_psi_table_sdt_service *service;	1411	struct vidtv_psi_table_sdt_service *service;
1221		1412
1222	service = kzalloc(sizeof(*service), GFP_KERNEL);	1413	service = kzalloc(sizeof(*service), GFP_KERNEL);
		1414	if (!service)
		1415	return NULL;
1223		1416
1224	/*	1417	/*
1225	* ETSI 300 468: this is a 16bit field which serves as a label to	1418	* ETSI 300 468: this is a 16bit field which serves as a label to
@@ -1228,8 +1421,8 @@ struct vidtv_psi_table_sdt_service · 2 unmodified lines
1228	* corresponding program_map_section	1421	* corresponding program_map_section
1229	*/	1422	*/
1230	service->service_id = cpu_to_be16(service_id);	1423	service->service_id = cpu_to_be16(service_id);
1231	service->EIT_schedule = 0x0;	1424	service->EIT_schedule = eit_schedule;
1232	service->EIT_present_following = 0x0;	1425	service->EIT_present_following = eit_present_following;
1233	service->reserved = 0x3f;	1426	service->reserved = 0x3f;
1234		1427
1235	service->bitfield = cpu_to_be16(RUNNING << 13);	1428	service->bitfield = cpu_to_be16(RUNNING << 13);
@@ -1262,53 +1455,78 @@ void · 26 unmodified lines
1262	vidtv_psi_sdt_service_assign(struct vidtv_psi_table_sdt *sdt,	1455	vidtv_psi_sdt_service_assign(struct vidtv_psi_table_sdt *sdt,
1263	struct vidtv_psi_table_sdt_service *service)	1456	struct vidtv_psi_table_sdt_service *service)
1264	{	1457	{
1265	if (service == sdt->service)	1458	do {
1266	return;	1459	if (service == sdt->service)
		1460	return;
1267		1461
1268	sdt->service = service;	1462	sdt->service = service;
1269		1463
1270	/* recompute section length */	1464	/* recompute section length */
1271	vidtv_psi_sdt_table_update_sec_len(sdt);	1465	vidtv_psi_sdt_table_update_sec_len(sdt);
1272		1466
1273	if (vidtv_psi_get_sec_len(&sdt->header) > MAX_SECTION_LEN)	1467	service = NULL;
1274	vidtv_psi_sdt_service_assign(sdt, NULL);	1468	} while (vidtv_psi_get_sec_len(&sdt->header) > MAX_SECTION_LEN);
1275		1469
1276	vidtv_psi_update_version_num(&sdt->header);	1470	vidtv_psi_update_version_num(&sdt->header);
1277	}	1471	}
1278		1472
		1473	/*
		1474	* PMTs contain information about programs. For each program,
		1475	* there is one PMT section. This function will create a section
		1476	* for each program found in the PAT
		1477	*/
1279	struct vidtv_psi_table_pmt**	1478	struct vidtv_psi_table_pmt**
1280	vidtv_psi_pmt_create_sec_for_each_pat_entry(struct vidtv_psi_table_pat *pat, u16 pcr_pid)	1479	vidtv_psi_pmt_create_sec_for_each_pat_entry(struct vidtv_psi_table_pat *pat,
		1480	u16 pcr_pid)
1281		1481
1282	{	1482	{
		1483	struct vidtv_psi_table_pat_program *program;
		1484	struct vidtv_psi_table_pmt **pmt_secs;
		1485	u32 i = 0, num_pmt = 0;
		1486
1283	/*	1487	/*
1284	* PMTs contain information about programs. For each program,	1488	* The number of PMT entries is the number of PAT entries
1285	* there is one PMT section. This function will create a section	1489	* that contain service_id. That exclude special tables, like NIT
1286	* for each program found in the PAT
1287	*/	1490	*/
1288	struct vidtv_psi_table_pat_program *program = pat->program;	1491	program = pat->program;
1289	struct vidtv_psi_table_pmt **pmt_secs;	1492	while (program) {
1290	u32 i = 0;	1493	if (program->service_id)
		1494	num_pmt++;
		1495	program = program->next;
		1496	}
1291		1497
1292	/* a section for each program_id */	1498	pmt_secs = kcalloc(num_pmt,
1293	pmt_secs = kcalloc(pat->programs,
1294	sizeof(struct vidtv_psi_table_pmt *),	1499	sizeof(struct vidtv_psi_table_pmt *),
1295	GFP_KERNEL);	1500	GFP_KERNEL);
1296		1501	if (!pmt_secs)
1297	while (program) {	1502	return NULL;
1298	pmt_secs[i] = vidtv_psi_pmt_table_init(be16_to_cpu(program->service_id), pcr_pid);	1503
1299	++i;	1504	for (program = pat->program; program; program = program->next) {
1300	program = program->next;	1505	if (!program->service_id)
		1506	continue;
		1507	pmt_secs[i] = vidtv_psi_pmt_table_init(be16_to_cpu(program->service_id),
		1508	pcr_pid);
		1509
		1510	if (!pmt_secs[i]) {
		1511	while (i > 0) {
		1512	i--;
		1513	vidtv_psi_pmt_table_destroy(pmt_secs[i]);
		1514	}
		1515	return NULL;
		1516	}
		1517	i++;
1301	}	1518	}
		1519	pat->num_pmt = num_pmt;
1302		1520
1303	return pmt_secs;	1521	return pmt_secs;
1304	}	1522	}
1305		1523
		1524	/* find the PMT section associated with 'program_num' */
1306	struct vidtv_psi_table_pmt	1525	struct vidtv_psi_table_pmt
1307	vidtv_psi_find_pmt_sec(struct vidtv_psi_table_pmt *pmt_sections,	1526	vidtv_psi_find_pmt_sec(struct vidtv_psi_table_pmt *pmt_sections,
1308	u16 nsections,	1527	u16 nsections,
1309	u16 program_num)	1528	u16 program_num)
1310	{	1529	{
1311	/* find the PMT section associated with 'program_num' */
1312	struct vidtv_psi_table_pmt *sec = NULL;	1530	struct vidtv_psi_table_pmt *sec = NULL;
1313	u32 i;	1531	u32 i;
1314		1532
@@ -1320,3 +1538,488 @@ struct vidtv_psi_table_pmt · 5 unmodified lines
1320		1538
1321	return NULL; /* not found */	1539	return NULL; /* not found */
1322	}	1540	}
		1541
		1542	static void vidtv_psi_nit_table_update_sec_len(struct vidtv_psi_table_nit *nit)
		1543	{
		1544	u16 length = 0;
		1545	struct vidtv_psi_table_transport *t = nit->transport;
		1546	u16 desc_loop_len;
		1547	u16 transport_loop_len = 0;
		1548
		1549	/*
		1550	* from immediately after 'section_length' until
		1551	* 'network_descriptor_length'
		1552	*/
		1553	length += NIT_LEN_UNTIL_NETWORK_DESCRIPTOR_LEN;
		1554
		1555	desc_loop_len = vidtv_psi_desc_comp_loop_len(nit->descriptor);
		1556	vidtv_psi_set_desc_loop_len(&nit->bitfield, desc_loop_len, 12);
		1557
		1558	length += desc_loop_len;
		1559
		1560	length += sizeof_field(struct vidtv_psi_table_nit, bitfield2);
		1561
		1562	while (t) {
		1563	/* skip both pointers at the end */
		1564	transport_loop_len += sizeof(struct vidtv_psi_table_transport) -
		1565	sizeof(struct vidtv_psi_desc *) -
		1566	sizeof(struct vidtv_psi_table_transport *);
		1567
		1568	length += transport_loop_len;
		1569
		1570	desc_loop_len = vidtv_psi_desc_comp_loop_len(t->descriptor);
		1571	vidtv_psi_set_desc_loop_len(&t->bitfield, desc_loop_len, 12);
		1572
		1573	length += desc_loop_len;
		1574
		1575	t = t->next;
		1576	}
		1577
		1578	// Actually sets the transport stream loop len, maybe rename this function later
		1579	vidtv_psi_set_desc_loop_len(&nit->bitfield2, transport_loop_len, 12);
		1580	length += CRC_SIZE_IN_BYTES;
		1581
		1582	vidtv_psi_set_sec_len(&nit->header, length);
		1583	}
		1584
		1585	struct vidtv_psi_table_nit
		1586	*vidtv_psi_nit_table_init(u16 network_id,
		1587	u16 transport_stream_id,
		1588	char *network_name,
		1589	struct vidtv_psi_desc_service_list_entry *service_list)
		1590	{
		1591	struct vidtv_psi_table_transport *transport;
		1592	struct vidtv_psi_table_nit *nit;
		1593	const u16 SYNTAX = 0x1;
		1594	const u16 ONES = 0x03;
		1595	const u16 ONE = 0x1;
		1596
		1597	nit = kzalloc(sizeof(*nit), GFP_KERNEL);
		1598	if (!nit)
		1599	return NULL;
		1600
		1601	transport = kzalloc(sizeof(*transport), GFP_KERNEL);
		1602	if (!transport)
		1603	goto free_nit;
		1604
		1605	nit->header.table_id = 0x40; // ACTUAL_NETWORK
		1606
		1607	nit->header.bitfield = cpu_to_be16((SYNTAX << 15) \| (ONE << 14) \| (ONES << 12));
		1608
		1609	nit->header.id = cpu_to_be16(network_id);
		1610	nit->header.current_next = ONE;
		1611
		1612	nit->header.version = 0x1f;
		1613
		1614	nit->header.one2 = ONES;
		1615	nit->header.section_id = 0;
		1616	nit->header.last_section = 0;
		1617
		1618	nit->bitfield = cpu_to_be16(0xf);
		1619	nit->bitfield2 = cpu_to_be16(0xf);
		1620
		1621	nit->descriptor = (struct vidtv_psi_desc *)
		1622	vidtv_psi_network_name_desc_init(NULL, network_name);
		1623	if (!nit->descriptor)
		1624	goto free_transport;
		1625
		1626	transport->transport_id = cpu_to_be16(transport_stream_id);
		1627	transport->network_id = cpu_to_be16(network_id);
		1628	transport->bitfield = cpu_to_be16(0xf);
		1629	transport->descriptor = (struct vidtv_psi_desc *)
		1630	vidtv_psi_service_list_desc_init(NULL, service_list);
		1631	if (!transport->descriptor)
		1632	goto free_nit_desc;
		1633
		1634	nit->transport = transport;
		1635
		1636	vidtv_psi_nit_table_update_sec_len(nit);
		1637
		1638	return nit;
		1639
		1640	free_nit_desc:
		1641	vidtv_psi_desc_destroy((struct vidtv_psi_desc *)nit->descriptor);
		1642
		1643	free_transport:
		1644	kfree(transport);
		1645	free_nit:
		1646	kfree(nit);
		1647	return NULL;
		1648	}
		1649
		1650	u32 vidtv_psi_nit_write_into(struct vidtv_psi_nit_write_args *args)
		1651	{
		1652	struct header_write_args h_args = {
		1653	.dest_buf = args->buf,
		1654	.dest_offset = args->offset,
		1655	.h = &args->nit->header,
		1656	.pid = VIDTV_NIT_PID,
		1657	.dest_buf_sz = args->buf_sz,
		1658	};
		1659	struct psi_write_args psi_args = {
		1660	.dest_buf = args->buf,
		1661	.from = &args->nit->bitfield,
		1662	.len = sizeof_field(struct vidtv_psi_table_nit, bitfield),
		1663	.pid = VIDTV_NIT_PID,
		1664	.new_psi_section = false,
		1665	.is_crc = false,
		1666	.dest_buf_sz = args->buf_sz,
		1667	};
		1668	struct desc_write_args d_args = {
		1669	.dest_buf = args->buf,
		1670	.pid = VIDTV_NIT_PID,
		1671	.dest_buf_sz = args->buf_sz,
		1672	};
		1673	struct crc32_write_args c_args = {
		1674	.dest_buf = args->buf,
		1675	.pid = VIDTV_NIT_PID,
		1676	.dest_buf_sz = args->buf_sz,
		1677	};
		1678	struct vidtv_psi_desc *table_descriptor = args->nit->descriptor;
		1679	struct vidtv_psi_table_transport *transport = args->nit->transport;
		1680	struct vidtv_psi_desc *transport_descriptor;
		1681	u32 crc = INITIAL_CRC;
		1682	u32 nbytes = 0;
		1683
		1684	vidtv_psi_nit_table_update_sec_len(args->nit);
		1685
		1686	h_args.continuity_counter = args->continuity_counter;
		1687	h_args.crc = &crc;
		1688
		1689	nbytes += vidtv_psi_table_header_write_into(&h_args);
		1690
		1691	/* write the bitfield */
		1692
		1693	psi_args.dest_offset = args->offset + nbytes;
		1694	psi_args.continuity_counter = args->continuity_counter;
		1695	psi_args.crc = &crc;
		1696
		1697	nbytes += vidtv_psi_ts_psi_write_into(&psi_args);
		1698
		1699	while (table_descriptor) {
		1700	/* write the descriptors, if any */
		1701	d_args.dest_offset = args->offset + nbytes;
		1702	d_args.desc = table_descriptor;
		1703	d_args.continuity_counter = args->continuity_counter;
		1704	d_args.crc = &crc;
		1705
		1706	nbytes += vidtv_psi_desc_write_into(&d_args);
		1707
		1708	table_descriptor = table_descriptor->next;
		1709	}
		1710
		1711	/* write the second bitfield */
		1712	psi_args.from = &args->nit->bitfield2;
		1713	psi_args.len = sizeof_field(struct vidtv_psi_table_nit, bitfield2);
		1714	psi_args.dest_offset = args->offset + nbytes;
		1715
		1716	nbytes += vidtv_psi_ts_psi_write_into(&psi_args);
		1717
		1718	psi_args.len = sizeof_field(struct vidtv_psi_table_transport, transport_id) +
		1719	sizeof_field(struct vidtv_psi_table_transport, network_id) +
		1720	sizeof_field(struct vidtv_psi_table_transport, bitfield);
		1721	while (transport) {
		1722	/* write the transport sections, if any */
		1723	psi_args.from = transport;
		1724	psi_args.dest_offset = args->offset + nbytes;
		1725
		1726	nbytes += vidtv_psi_ts_psi_write_into(&psi_args);
		1727
		1728	transport_descriptor = transport->descriptor;
		1729
		1730	while (transport_descriptor) {
		1731	/* write the transport descriptors, if any */
		1732	d_args.dest_offset = args->offset + nbytes;
		1733	d_args.desc = transport_descriptor;
		1734	d_args.continuity_counter = args->continuity_counter;
		1735	d_args.crc = &crc;
		1736
		1737	nbytes += vidtv_psi_desc_write_into(&d_args);
		1738
		1739	transport_descriptor = transport_descriptor->next;
		1740	}
		1741
		1742	transport = transport->next;
		1743	}
		1744
		1745	c_args.dest_offset = args->offset + nbytes;
		1746	c_args.crc = cpu_to_be32(crc);
		1747	c_args.continuity_counter = args->continuity_counter;
		1748
		1749	/* Write the CRC32 at the end */
		1750	nbytes += table_section_crc32_write_into(&c_args);
		1751
		1752	return nbytes;
		1753	}
		1754
		1755	static void vidtv_psi_transport_destroy(struct vidtv_psi_table_transport *t)
		1756	{
		1757	struct vidtv_psi_table_transport *tmp_t = NULL;
		1758	struct vidtv_psi_table_transport *curr_t = t;
		1759
		1760	while (curr_t) {
		1761	tmp_t = curr_t;
		1762	curr_t = curr_t->next;
		1763	vidtv_psi_desc_destroy(tmp_t->descriptor);
		1764	kfree(tmp_t);
		1765	}
		1766	}
		1767
		1768	void vidtv_psi_nit_table_destroy(struct vidtv_psi_table_nit *nit)
		1769	{
		1770	vidtv_psi_desc_destroy(nit->descriptor);
		1771	vidtv_psi_transport_destroy(nit->transport);
		1772	kfree(nit);
		1773	}
		1774
		1775	void vidtv_psi_eit_table_update_sec_len(struct vidtv_psi_table_eit *eit)
		1776	{
		1777	struct vidtv_psi_table_eit_event *e = eit->event;
		1778	u16 desc_loop_len;
		1779	u16 length = 0;
		1780
		1781	/*
		1782	* from immediately after 'section_length' until
		1783	* 'last_table_id'
		1784	*/
		1785	length += EIT_LEN_UNTIL_LAST_TABLE_ID;
		1786
		1787	while (e) {
		1788	/* skip both pointers at the end */
		1789	length += sizeof(struct vidtv_psi_table_eit_event) -
		1790	sizeof(struct vidtv_psi_desc *) -
		1791	sizeof(struct vidtv_psi_table_eit_event *);
		1792
		1793	desc_loop_len = vidtv_psi_desc_comp_loop_len(e->descriptor);
		1794	vidtv_psi_set_desc_loop_len(&e->bitfield, desc_loop_len, 12);
		1795
		1796	length += desc_loop_len;
		1797
		1798	e = e->next;
		1799	}
		1800
		1801	length += CRC_SIZE_IN_BYTES;
		1802
		1803	vidtv_psi_set_sec_len(&eit->header, length);
		1804	}
		1805
		1806	void vidtv_psi_eit_event_assign(struct vidtv_psi_table_eit *eit,
		1807	struct vidtv_psi_table_eit_event *e)
		1808	{
		1809	do {
		1810	if (e == eit->event)
		1811	return;
		1812
		1813	eit->event = e;
		1814	vidtv_psi_eit_table_update_sec_len(eit);
		1815
		1816	e = NULL;
		1817	} while (vidtv_psi_get_sec_len(&eit->header) > EIT_MAX_SECTION_LEN);
		1818
		1819	vidtv_psi_update_version_num(&eit->header);
		1820	}
		1821
		1822	struct vidtv_psi_table_eit
		1823	*vidtv_psi_eit_table_init(u16 network_id,
		1824	u16 transport_stream_id,
		1825	__be16 service_id)
		1826	{
		1827	struct vidtv_psi_table_eit *eit;
		1828	const u16 SYNTAX = 0x1;
		1829	const u16 ONE = 0x1;
		1830	const u16 ONES = 0x03;
		1831
		1832	eit = kzalloc(sizeof(*eit), GFP_KERNEL);
		1833	if (!eit)
		1834	return NULL;
		1835
		1836	eit->header.table_id = 0x4e; //actual_transport_stream: present/following
		1837
		1838	eit->header.bitfield = cpu_to_be16((SYNTAX << 15) \| (ONE << 14) \| (ONES << 12));
		1839
		1840	eit->header.id = service_id;
		1841	eit->header.current_next = ONE;
		1842
		1843	eit->header.version = 0x1f;
		1844
		1845	eit->header.one2 = ONES;
		1846	eit->header.section_id = 0;
		1847	eit->header.last_section = 0;
		1848
		1849	eit->transport_id = cpu_to_be16(transport_stream_id);
		1850	eit->network_id = cpu_to_be16(network_id);
		1851
		1852	eit->last_segment = eit->header.last_section; /* not implemented */
		1853	eit->last_table_id = eit->header.table_id; /* not implemented */
		1854
		1855	vidtv_psi_eit_table_update_sec_len(eit);
		1856
		1857	return eit;
		1858	}
		1859
		1860	u32 vidtv_psi_eit_write_into(struct vidtv_psi_eit_write_args *args)
		1861	{
		1862	struct header_write_args h_args = {
		1863	.dest_buf = args->buf,
		1864	.dest_offset = args->offset,
		1865	.h = &args->eit->header,
		1866	.pid = VIDTV_EIT_PID,
		1867	.dest_buf_sz = args->buf_sz,
		1868	};
		1869	struct psi_write_args psi_args = {
		1870	.dest_buf = args->buf,
		1871	.len = sizeof_field(struct vidtv_psi_table_eit, transport_id) +
		1872	sizeof_field(struct vidtv_psi_table_eit, network_id) +
		1873	sizeof_field(struct vidtv_psi_table_eit, last_segment) +
		1874	sizeof_field(struct vidtv_psi_table_eit, last_table_id),
		1875	.pid = VIDTV_EIT_PID,
		1876	.new_psi_section = false,
		1877	.is_crc = false,
		1878	.dest_buf_sz = args->buf_sz,
		1879	};
		1880	struct desc_write_args d_args = {
		1881	.dest_buf = args->buf,
		1882	.pid = VIDTV_EIT_PID,
		1883	.dest_buf_sz = args->buf_sz,
		1884	};
		1885	struct crc32_write_args c_args = {
		1886	.dest_buf = args->buf,
		1887	.pid = VIDTV_EIT_PID,
		1888	.dest_buf_sz = args->buf_sz,
		1889	};
		1890	struct vidtv_psi_table_eit_event *event = args->eit->event;
		1891	struct vidtv_psi_desc *event_descriptor;
		1892	u32 crc = INITIAL_CRC;
		1893	u32 nbytes = 0;
		1894
		1895	vidtv_psi_eit_table_update_sec_len(args->eit);
		1896
		1897	h_args.continuity_counter = args->continuity_counter;
		1898	h_args.crc = &crc;
		1899
		1900	nbytes += vidtv_psi_table_header_write_into(&h_args);
		1901
		1902	psi_args.from = &args->eit->transport_id;
		1903	psi_args.dest_offset = args->offset + nbytes;
		1904	psi_args.continuity_counter = args->continuity_counter;
		1905	psi_args.crc = &crc;
		1906
		1907	nbytes += vidtv_psi_ts_psi_write_into(&psi_args);
		1908
		1909	/* skip both pointers at the end */
		1910	psi_args.len = sizeof(struct vidtv_psi_table_eit_event) -
		1911	sizeof(struct vidtv_psi_desc *) -
		1912	sizeof(struct vidtv_psi_table_eit_event *);
		1913	while (event) {
		1914	/* copy the events, if any */
		1915	psi_args.from = event;
		1916	psi_args.dest_offset = args->offset + nbytes;
		1917
		1918	nbytes += vidtv_psi_ts_psi_write_into(&psi_args);
		1919
		1920	event_descriptor = event->descriptor;
		1921
		1922	while (event_descriptor) {
		1923	/* copy the event descriptors, if any */
		1924	d_args.dest_offset = args->offset + nbytes;
		1925	d_args.desc = event_descriptor;
		1926	d_args.continuity_counter = args->continuity_counter;
		1927	d_args.crc = &crc;
		1928
		1929	nbytes += vidtv_psi_desc_write_into(&d_args);
		1930
		1931	event_descriptor = event_descriptor->next;
		1932	}
		1933
		1934	event = event->next;
		1935	}
		1936
		1937	c_args.dest_offset = args->offset + nbytes;
		1938	c_args.crc = cpu_to_be32(crc);
		1939	c_args.continuity_counter = args->continuity_counter;
		1940
		1941	/* Write the CRC at the end */
		1942	nbytes += table_section_crc32_write_into(&c_args);
		1943
		1944	return nbytes;
		1945	}
		1946
		1947	struct vidtv_psi_table_eit_event
		1948	vidtv_psi_eit_event_init(struct vidtv_psi_table_eit_event head, u16 event_id)
		1949	{
		1950	const u8 DURATION[] = {0x23, 0x59, 0x59}; /* BCD encoded */
		1951	struct vidtv_psi_table_eit_event *e;
		1952	struct timespec64 ts;
		1953	struct tm time;
		1954	int mjd, l;
		1955	__be16 mjd_be;
		1956
		1957	e = kzalloc(sizeof(*e), GFP_KERNEL);
		1958	if (!e)
		1959	return NULL;
		1960
		1961	e->event_id = cpu_to_be16(event_id);
		1962
		1963	ts = ktime_to_timespec64(ktime_get_real());
		1964	time64_to_tm(ts.tv_sec, 0, &time);
		1965
		1966	/* Convert date to Modified Julian Date - per EN 300 468 Annex C */
		1967	if (time.tm_mon < 2)
		1968	l = 1;
		1969	else
		1970	l = 0;
		1971
		1972	mjd = 14956 + time.tm_mday;
		1973	mjd += (time.tm_year - l) * 36525 / 100;
		1974	mjd += (time.tm_mon + 2 + l * 12) * 306001 / 10000;
		1975	mjd_be = cpu_to_be16(mjd);
		1976
		1977	/*
		1978	* Store MJD and hour/min/sec to the event.
		1979	*
		1980	* Let's make the event to start on a full hour
		1981	*/
		1982	memcpy(e->start_time, &mjd_be, sizeof(mjd_be));
		1983	e->start_time[2] = bin2bcd(time.tm_hour);
		1984	e->start_time[3] = 0;
		1985	e->start_time[4] = 0;
		1986
		1987	/*
		1988	* TODO: for now, the event will last for a day. Should be
		1989	* enough for testing purposes, but if one runs the driver
		1990	* for more than that, the current event will become invalid.
		1991	* So, we need a better code here in order to change the start
		1992	* time once the event expires.
		1993	*/
		1994	memcpy(e->duration, DURATION, sizeof(e->duration));
		1995
		1996	e->bitfield = cpu_to_be16(RUNNING << 13);
		1997
		1998	if (head) {
		1999	while (head->next)
		2000	head = head->next;
		2001
		2002	head->next = e;
		2003	}
		2004
		2005	return e;
		2006	}
		2007
		2008	void vidtv_psi_eit_event_destroy(struct vidtv_psi_table_eit_event *e)
		2009	{
		2010	struct vidtv_psi_table_eit_event *tmp_e = NULL;
		2011	struct vidtv_psi_table_eit_event *curr_e = e;
		2012
		2013	while (curr_e) {
		2014	tmp_e = curr_e;
		2015	curr_e = curr_e->next;
		2016	vidtv_psi_desc_destroy(tmp_e->descriptor);
		2017	kfree(tmp_e);
		2018	}
		2019	}
		2020
		2021	void vidtv_psi_eit_table_destroy(struct vidtv_psi_table_eit *eit)
		2022	{
		2023	vidtv_psi_eit_event_destroy(eit->event);
		2024	kfree(eit);
		2025	}

drivers/media/test-drivers/vidtv/vidtv_psi.h+257−25

@@ -6,10 +6,6 @@ · 5 unmodified lines
6	* technically be broken into one or more sections, we do not do this here,	6	* technically be broken into one or more sections, we do not do this here,
7	* hence 'table' and 'section' are interchangeable for vidtv.	7	* hence 'table' and 'section' are interchangeable for vidtv.
8	*	8	*
9	* This code currently supports three tables: PAT, PMT and SDT. These are the
10	* bare minimum to get userspace to recognize our MPEG transport stream. It can
11	* be extended to support more PSI tables in the future.
12	*
13	* Copyright (C) 2020 Daniel W. S. Almeida	9	* Copyright (C) 2020 Daniel W. S. Almeida
14	*/	10	*/
15		11
@@ -17,7 +13,6 @@ · 1 unmodified line
17	#define VIDTV_PSI_H	13	#define VIDTV_PSI_H
18		14
19	#include <linux/types.h>	15	#include <linux/types.h>
20	#include <asm/byteorder.h>
21		16
22	/*	17	/*
23	* all section lengths start immediately after the 'section_length' field	18	* all section lengths start immediately after the 'section_length' field
@@ -27,20 +22,28 @@ · 3 unmodified lines
27	#define PAT_LEN_UNTIL_LAST_SECTION_NUMBER 5	22	#define PAT_LEN_UNTIL_LAST_SECTION_NUMBER 5
28	#define PMT_LEN_UNTIL_PROGRAM_INFO_LENGTH 9	23	#define PMT_LEN_UNTIL_PROGRAM_INFO_LENGTH 9
29	#define SDT_LEN_UNTIL_RESERVED_FOR_FUTURE_USE 8	24	#define SDT_LEN_UNTIL_RESERVED_FOR_FUTURE_USE 8
		25	#define NIT_LEN_UNTIL_NETWORK_DESCRIPTOR_LEN 7
		26	#define EIT_LEN_UNTIL_LAST_TABLE_ID 11
30	#define MAX_SECTION_LEN 1021	27	#define MAX_SECTION_LEN 1021
		28	#define EIT_MAX_SECTION_LEN 4093 /* see ETSI 300 468 v.1.10.1 p. 26 */
31	#define VIDTV_PAT_PID 0 /* mandated by the specs */	29	#define VIDTV_PAT_PID 0 /* mandated by the specs */
32	#define VIDTV_SDT_PID 0x0011 /* mandated by the specs */	30	#define VIDTV_SDT_PID 0x0011 /* mandated by the specs */
		31	#define VIDTV_NIT_PID 0x0010 /* mandated by the specs */
		32	#define VIDTV_EIT_PID 0x0012 /mandated by the specs /
33		33
34	enum vidtv_psi_descriptors {	34	enum vidtv_psi_descriptors {
35	REGISTRATION_DESCRIPTOR = 0x05, /* See ISO/IEC 13818-1 section 2.6.8 */	35	REGISTRATION_DESCRIPTOR = 0x05, /* See ISO/IEC 13818-1 section 2.6.8 */
		36	NETWORK_NAME_DESCRIPTOR = 0x40, /* See ETSI EN 300 468 section 6.2.27 */
		37	SERVICE_LIST_DESCRIPTOR = 0x41, /* See ETSI EN 300 468 section 6.2.35 */
36	SERVICE_DESCRIPTOR = 0x48, /* See ETSI EN 300 468 section 6.2.33 */	38	SERVICE_DESCRIPTOR = 0x48, /* See ETSI EN 300 468 section 6.2.33 */
		39	SHORT_EVENT_DESCRIPTOR = 0x4d, /* See ETSI EN 300 468 section 6.2.37 */
37	};	40	};
38		41
39	enum vidtv_psi_stream_types {	42	enum vidtv_psi_stream_types {
40	STREAM_PRIVATE_DATA = 0x06, /* see ISO/IEC 13818-1 2000 p. 48 */	43	STREAM_PRIVATE_DATA = 0x06, /* see ISO/IEC 13818-1 2000 p. 48 */
41	};	44	};
42		45
43	/**	46	/*
44	* struct vidtv_psi_desc - A generic PSI descriptor type.	47	* struct vidtv_psi_desc - A generic PSI descriptor type.
45	* The descriptor length is an 8-bit field specifying the total number of bytes of the data portion	48	* The descriptor length is an 8-bit field specifying the total number of bytes of the data portion
46	* of the descriptor following the byte defining the value of this field.	49	* of the descriptor following the byte defining the value of this field.
@@ -52,7 +55,7 @@ struct vidtv_psi_desc { · 5 unmodified lines
52	u8 data[];	55	u8 data[];
53	} __packed;	56	} __packed;
54		57
55	/**	58	/*
56	* struct vidtv_psi_desc_service - Service descriptor.	59	* struct vidtv_psi_desc_service - Service descriptor.
57	* See ETSI EN 300 468 section 6.2.33.	60	* See ETSI EN 300 468 section 6.2.33.
58	*/	61	*/
@@ -68,7 +71,7 @@ struct vidtv_psi_desc_service { · 9 unmodified lines
68	char *service_name;	71	char *service_name;
69	} __packed;	72	} __packed;
70		73
71	/**	74	/*
72	* struct vidtv_psi_desc_registration - A registration descriptor.	75	* struct vidtv_psi_desc_registration - A registration descriptor.
73	* See ISO/IEC 13818-1 section 2.6.8	76	* See ISO/IEC 13818-1 section 2.6.8
74	*/	77	*/
@@ -90,7 +93,56 @@ struct vidtv_psi_desc_registration { · 15 unmodified lines
90	u8 additional_identification_info[];	93	u8 additional_identification_info[];
91	} __packed;	94	} __packed;
92		95
93	/**	96	/*
		97	* struct vidtv_psi_desc_network_name - A network name descriptor
		98	* see ETSI EN 300 468 v1.15.1 section 6.2.27
		99	*/
		100	struct vidtv_psi_desc_network_name {
		101	struct vidtv_psi_desc *next;
		102	u8 type;
		103	u8 length;
		104	char *network_name;
		105	} __packed;
		106
		107	struct vidtv_psi_desc_service_list_entry {
		108	__be16 service_id;
		109	u8 service_type;
		110	struct vidtv_psi_desc_service_list_entry *next;
		111	} __packed;
		112
		113	/*
		114	* struct vidtv_psi_desc_service_list - A service list descriptor
		115	* see ETSI EN 300 468 v1.15.1 section 6.2.35
		116	*/
		117	struct vidtv_psi_desc_service_list {
		118	struct vidtv_psi_desc *next;
		119	u8 type;
		120	u8 length;
		121	struct vidtv_psi_desc_service_list_entry *service_list;
		122	} __packed;
		123
		124	/*
		125	* struct vidtv_psi_desc_short_event - A short event descriptor
		126	* see ETSI EN 300 468 v1.15.1 section 6.2.37
		127	*/
		128	struct vidtv_psi_desc_short_event {
		129	struct vidtv_psi_desc *next;
		130	u8 type;
		131	u8 length;
		132	char *iso_language_code;
		133	u8 event_name_len;
		134	char *event_name;
		135	u8 text_len;
		136	char *text;
		137	} __packed;
		138
		139	struct vidtv_psi_desc_short_event
		140	vidtv_psi_short_event_desc_init(struct vidtv_psi_desc head,
		141	char *iso_language_code,
		142	char *event_name,
		143	char *text);
		144
		145	/*
94	* struct vidtv_psi_table_header - A header that is present for all PSI tables.	146	* struct vidtv_psi_table_header - A header that is present for all PSI tables.
95	*/	147	*/
96	struct vidtv_psi_table_header {	148	struct vidtv_psi_table_header {
@@ -106,7 +158,7 @@ struct vidtv_psi_table_header { · 9 unmodified lines
106	u8 last_section; /* last_section_number */	158	u8 last_section; /* last_section_number */
107	} __packed;	159	} __packed;
108		160
109	/**	161	/*
110	* struct vidtv_psi_table_pat_program - A single program in the PAT	162	* struct vidtv_psi_table_pat_program - A single program in the PAT
111	* See ISO/IEC 13818-1 : 2000 p.43	163	* See ISO/IEC 13818-1 : 2000 p.43
112	*/	164	*/
@@ -116,17 +168,18 @@ struct vidtv_psi_table_pat_program { · 3 unmodified lines
116	struct vidtv_psi_table_pat_program *next;	168	struct vidtv_psi_table_pat_program *next;
117	} __packed;	169	} __packed;
118		170
119	/**	171	/*
120	* struct vidtv_psi_table_pat - The Program Allocation Table (PAT)	172	* struct vidtv_psi_table_pat - The Program Allocation Table (PAT)
121	* See ISO/IEC 13818-1 : 2000 p.43	173	* See ISO/IEC 13818-1 : 2000 p.43
122	*/	174	*/
123	struct vidtv_psi_table_pat {	175	struct vidtv_psi_table_pat {
124	struct vidtv_psi_table_header header;	176	struct vidtv_psi_table_header header;
125	u16 programs; /* Included by libdvbv5, not part of the table and not actually serialized */	177	u16 num_pat;
		178	u16 num_pmt;
126	struct vidtv_psi_table_pat_program *program;	179	struct vidtv_psi_table_pat_program *program;
127	} __packed;	180	} __packed;
128		181
129	/**	182	/*
130	* struct vidtv_psi_table_sdt_service - Represents a service in the SDT.	183	* struct vidtv_psi_table_sdt_service - Represents a service in the SDT.
131	* see ETSI EN 300 468 v1.15.1 section 5.2.3.	184	* see ETSI EN 300 468 v1.15.1 section 5.2.3.
132	*/	185	*/
@@ -140,7 +193,7 @@ struct vidtv_psi_table_sdt_service { · 7 unmodified lines
140	struct vidtv_psi_table_sdt_service *next;	193	struct vidtv_psi_table_sdt_service *next;
141	} __packed;	194	} __packed;
142		195
143	/**	196	/*
144	* struct vidtv_psi_table_sdt - Represents the Service Description Table	197	* struct vidtv_psi_table_sdt - Represents the Service Description Table
145	* see ETSI EN 300 468 v1.15.1 section 5.2.3.	198	* see ETSI EN 300 468 v1.15.1 section 5.2.3.
146	*/	199	*/
@@ -152,7 +205,7 @@ struct vidtv_psi_table_sdt { · 5 unmodified lines
152	struct vidtv_psi_table_sdt_service *service;	205	struct vidtv_psi_table_sdt_service *service;
153	} __packed;	206	} __packed;
154		207
155	/**	208	/*
156	* enum service_running_status - Status of a SDT service.	209	* enum service_running_status - Status of a SDT service.
157	* see ETSI EN 300 468 v1.15.1 section 5.2.3 table 6.	210	* see ETSI EN 300 468 v1.15.1 section 5.2.3 table 6.
158	*/	211	*/
@@ -160,16 +213,17 @@ enum service_running_status { · 1 unmodified line
160	RUNNING = 0x4,	213	RUNNING = 0x4,
161	};	214	};
162		215
163	/**	216	/*
164	* enum service_type - The type of a SDT service.	217	* enum service_type - The type of a SDT service.
165	* see ETSI EN 300 468 v1.15.1 section 6.2.33, table 81.	218	* see ETSI EN 300 468 v1.15.1 section 6.2.33, table 81.
166	*/	219	*/
167	enum service_type {	220	enum service_type {
168	/* see ETSI EN 300 468 v1.15.1 p. 77 */	221	/* see ETSI EN 300 468 v1.15.1 p. 77 */
169	DIGITAL_TELEVISION_SERVICE = 0x1,	222	DIGITAL_TELEVISION_SERVICE = 0x1,
		223	DIGITAL_RADIO_SOUND_SERVICE = 0X2,
170	};	224	};
171		225
172	/**	226	/*
173	* struct vidtv_psi_table_pmt_stream - A single stream in the PMT.	227	* struct vidtv_psi_table_pmt_stream - A single stream in the PMT.
174	* See ISO/IEC 13818-1 : 2000 p.46.	228	* See ISO/IEC 13818-1 : 2000 p.46.
175	*/	229	*/
@@ -181,7 +235,7 @@ struct vidtv_psi_table_pmt_stream { · 5 unmodified lines
181	struct vidtv_psi_table_pmt_stream *next;	235	struct vidtv_psi_table_pmt_stream *next;
182	} __packed;	236	} __packed;
183		237
184	/**	238	/*
185	* struct vidtv_psi_table_pmt - The Program Map Table (PMT).	239	* struct vidtv_psi_table_pmt - The Program Map Table (PMT).
186	* See ISO/IEC 13818-1 : 2000 p.46.	240	* See ISO/IEC 13818-1 : 2000 p.46.
187	*/	241	*/
@@ -290,6 +344,13 @@ struct vidtv_psi_desc_registration · 102 unmodified lines
290	u8 *additional_ident_info,	344	u8 *additional_ident_info,
291	u32 additional_info_len);	345	u32 additional_info_len);
292		346
		347	struct vidtv_psi_desc_network_name
		348	vidtv_psi_network_name_desc_init(struct vidtv_psi_desc head, char *network_name);
		349
		350	struct vidtv_psi_desc_service_list
		351	vidtv_psi_service_list_desc_init(struct vidtv_psi_desc head,
		352	struct vidtv_psi_desc_service_list_entry *entry);
		353
293	struct vidtv_psi_table_pat_program	354	struct vidtv_psi_table_pat_program
294	vidtv_psi_pat_program_init(struct vidtv_psi_table_pat_program head,	355	vidtv_psi_pat_program_init(struct vidtv_psi_table_pat_program head,
295	u16 service_id,	356	u16 service_id,
@@ -305,11 +366,14 @@ struct vidtv_psi_table_pat *vidtv_psi_pat_table_init(u16 transport_stream_id); · 9 unmodified lines
305	struct vidtv_psi_table_pmt *vidtv_psi_pmt_table_init(u16 program_number,	366	struct vidtv_psi_table_pmt *vidtv_psi_pmt_table_init(u16 program_number,
306	u16 pcr_pid);	367	u16 pcr_pid);
307		368
308	struct vidtv_psi_table_sdt *vidtv_psi_sdt_table_init(u16 transport_stream_id);	369	struct vidtv_psi_table_sdt *vidtv_psi_sdt_table_init(u16 network_id,
		370	u16 transport_stream_id);
309		371
310	struct vidtv_psi_table_sdt_service*	372	struct vidtv_psi_table_sdt_service*
311	vidtv_psi_sdt_service_init(struct vidtv_psi_table_sdt_service *head,	373	vidtv_psi_sdt_service_init(struct vidtv_psi_table_sdt_service *head,
312	u16 service_id);	374	u16 service_id,
		375	bool eit_schedule,
		376	bool eit_present_following);
313		377
314	void	378	void
315	vidtv_psi_desc_destroy(struct vidtv_psi_desc *desc);	379	vidtv_psi_desc_destroy(struct vidtv_psi_desc *desc);
@@ -413,7 +477,6 @@ struct vidtv_psi_desc vidtv_psi_desc_clone(struct vidtv_psi_desc desc); · 97 unmodified lines
413	* vidtv_psi_create_sec_for_each_pat_entry - Create a PMT section for each	477	* vidtv_psi_create_sec_for_each_pat_entry - Create a PMT section for each
414	* program found in the PAT	478	* program found in the PAT
415	* @pat: The PAT to look for programs.	479	* @pat: The PAT to look for programs.
416	* @s: The stream loop (one or more streams)
417	* @pcr_pid: packet ID for the PCR to be used for the program described in this	480	* @pcr_pid: packet ID for the PCR to be used for the program described in this
418	* PMT section	481	* PMT section
419	*/	482	*/
@@ -492,7 +555,7 @@ struct vidtv_psi_pat_write_args { · 72 unmodified lines
492	* equal to the size of the PAT, since more space is needed for TS headers during TS	555	* equal to the size of the PAT, since more space is needed for TS headers during TS
493	* encapsulation.	556	* encapsulation.
494	*/	557	*/
495	u32 vidtv_psi_pat_write_into(struct vidtv_psi_pat_write_args args);	558	u32 vidtv_psi_pat_write_into(struct vidtv_psi_pat_write_args *args);
496		559
497	/**	560	/**
498	* struct vidtv_psi_sdt_write_args - Arguments for writing a SDT table	561	* struct vidtv_psi_sdt_write_args - Arguments for writing a SDT table
@@ -524,16 +587,18 @@ struct vidtv_psi_sdt_write_args { · 25 unmodified lines
524	* equal to the size of the SDT, since more space is needed for TS headers during TS	587	* equal to the size of the SDT, since more space is needed for TS headers during TS
525	* encapsulation.	588	* encapsulation.
526	*/	589	*/
527	u32 vidtv_psi_sdt_write_into(struct vidtv_psi_sdt_write_args args);	590	u32 vidtv_psi_sdt_write_into(struct vidtv_psi_sdt_write_args *args);
528		591
529	/**	592	/**
530	* struct vidtv_psi_pmt_write_args - Arguments for writing a PMT section	593	* struct vidtv_psi_pmt_write_args - Arguments for writing a PMT section
531	* @buf: The destination buffer.	594	* @buf: The destination buffer.
532	* @offset: The offset into the destination buffer.	595	* @offset: The offset into the destination buffer.
533	* @pmt: A pointer to the PMT.	596	* @pmt: A pointer to the PMT.
		597	* @pid: Program ID
534	* @buf_sz: The size of the destination buffer.	598	* @buf_sz: The size of the destination buffer.
535	* @continuity_counter: A pointer to the CC. Incremented on every new packet.	599	* @continuity_counter: A pointer to the CC. Incremented on every new packet.
536	*	600	* @pcr_pid: The TS PID used for the PSI packets. All channels will share the
		601	* same PCR.
537	*/	602	*/
538	struct vidtv_psi_pmt_write_args {	603	struct vidtv_psi_pmt_write_args {
539	char *buf;	604	char *buf;
@@ -557,7 +622,7 @@ struct vidtv_psi_pmt_write_args { · 17 unmodified lines
557	* equal to the size of the PMT section, since more space is needed for TS headers	622	* equal to the size of the PMT section, since more space is needed for TS headers
558	* during TS encapsulation.	623	* during TS encapsulation.
559	*/	624	*/
560	u32 vidtv_psi_pmt_write_into(struct vidtv_psi_pmt_write_args args);	625	u32 vidtv_psi_pmt_write_into(struct vidtv_psi_pmt_write_args *args);
561		626
562	/**	627	/**
563	* vidtv_psi_find_pmt_sec - Finds the PMT section for 'program_num'	628	* vidtv_psi_find_pmt_sec - Finds the PMT section for 'program_num'
@@ -574,4 +639,171 @@ struct vidtv_psi_table_pmt vidtv_psi_find_pmt_sec(struct vidtv_psi_table_pmt * · 10 unmodified lines
574	u16 vidtv_psi_get_pat_program_pid(struct vidtv_psi_table_pat_program *p);	639	u16 vidtv_psi_get_pat_program_pid(struct vidtv_psi_table_pat_program *p);
575	u16 vidtv_psi_pmt_stream_get_elem_pid(struct vidtv_psi_table_pmt_stream *s);	640	u16 vidtv_psi_pmt_stream_get_elem_pid(struct vidtv_psi_table_pmt_stream *s);
576		641
		642	/**
		643	* struct vidtv_psi_table_transport - A entry in the TS loop for the NIT and/or other tables.
		644	* See ETSI 300 468 section 5.2.1
		645	* @transport_id: The TS ID being described
		646	* @network_id: The network_id that contains the TS ID
		647	* @bitfield: Contains the descriptor loop length
		648	* @descriptor: A descriptor loop
		649	* @next: Pointer to the next entry
		650	*
		651	*/
		652	struct vidtv_psi_table_transport {
		653	__be16 transport_id;
		654	__be16 network_id;
		655	__be16 bitfield; /* desc_len: 12, reserved: 4 */
		656	struct vidtv_psi_desc *descriptor;
		657	struct vidtv_psi_table_transport *next;
		658	} __packed;
		659
		660	/**
		661	* struct vidtv_psi_table_nit - A Network Information Table (NIT). See ETSI 300
		662	* 468 section 5.2.1
		663	* @header: A PSI table header
		664	* @bitfield: Contains the network descriptor length
		665	* @descriptor: A descriptor loop describing the network
		666	* @bitfield2: Contains the transport stream loop length
		667	* @transport: The transport stream loop
		668	*
		669	*/
		670	struct vidtv_psi_table_nit {
		671	struct vidtv_psi_table_header header;
		672	__be16 bitfield; /* network_desc_len: 12, reserved:4 */
		673	struct vidtv_psi_desc *descriptor;
		674	__be16 bitfield2; /* ts_loop_len: 12, reserved: 4 */
		675	struct vidtv_psi_table_transport *transport;
		676	} __packed;
		677
		678	struct vidtv_psi_table_nit
		679	*vidtv_psi_nit_table_init(u16 network_id,
		680	u16 transport_stream_id,
		681	char *network_name,
		682	struct vidtv_psi_desc_service_list_entry *service_list);
		683
		684	/**
		685	* struct vidtv_psi_nit_write_args - Arguments for writing a NIT section
		686	* @buf: The destination buffer.
		687	* @offset: The offset into the destination buffer.
		688	* @nit: A pointer to the NIT
		689	* @buf_sz: The size of the destination buffer.
		690	* @continuity_counter: A pointer to the CC. Incremented on every new packet.
		691	*
		692	*/
		693	struct vidtv_psi_nit_write_args {
		694	char *buf;
		695	u32 offset;
		696	struct vidtv_psi_table_nit *nit;
		697	u32 buf_sz;
		698	u8 *continuity_counter;
		699	};
		700
		701	/**
		702	* vidtv_psi_nit_write_into - Write NIT as MPEG-TS packets into a buffer.
		703	* @args: an instance of struct vidtv_psi_nit_write_args
		704	*
		705	* This function writes the MPEG TS packets for a NIT table into a buffer.
		706	* Calling code will usually generate the NIT via a call to its init function
		707	* and thus is responsible for freeing it.
		708	*
		709	* Return: The number of bytes written into the buffer. This is NOT
		710	* equal to the size of the NIT, since more space is needed for TS headers during TS
		711	* encapsulation.
		712	*/
		713	u32 vidtv_psi_nit_write_into(struct vidtv_psi_nit_write_args *args);
		714
		715	void vidtv_psi_nit_table_destroy(struct vidtv_psi_table_nit *nit);
		716
		717	/*
		718	* struct vidtv_psi_desc_short_event - A short event descriptor
		719	* see ETSI EN 300 468 v1.15.1 section 6.2.37
		720	*/
		721	struct vidtv_psi_table_eit_event {
		722	__be16 event_id;
		723	u8 start_time[5];
		724	u8 duration[3];
		725	__be16 bitfield; /* desc_length: 12, free_CA_mode: 1, running_status: 1 */
		726	struct vidtv_psi_desc *descriptor;
		727	struct vidtv_psi_table_eit_event *next;
		728	} __packed;
		729
		730	/*
		731	* struct vidtv_psi_table_eit - A Event Information Table (EIT)
		732	* See ETSI 300 468 section 5.2.4
		733	*/
		734	struct vidtv_psi_table_eit {
		735	struct vidtv_psi_table_header header;
		736	__be16 transport_id;
		737	__be16 network_id;
		738	u8 last_segment;
		739	u8 last_table_id;
		740	struct vidtv_psi_table_eit_event *event;
		741	} __packed;
		742
		743	struct vidtv_psi_table_eit
		744	*vidtv_psi_eit_table_init(u16 network_id,
		745	u16 transport_stream_id,
		746	u16 service_id);
		747
		748	/**
		749	* struct vidtv_psi_eit_write_args - Arguments for writing an EIT section
		750	* @buf: The destination buffer.
		751	* @offset: The offset into the destination buffer.
		752	* @eit: A pointer to the EIT
		753	* @buf_sz: The size of the destination buffer.
		754	* @continuity_counter: A pointer to the CC. Incremented on every new packet.
		755	*
		756	*/
		757	struct vidtv_psi_eit_write_args {
		758	char *buf;
		759	u32 offset;
		760	struct vidtv_psi_table_eit *eit;
		761	u32 buf_sz;
		762	u8 *continuity_counter;
		763	};
		764
		765	/**
		766	* vidtv_psi_eit_write_into - Write EIT as MPEG-TS packets into a buffer.
		767	* @args: an instance of struct vidtv_psi_nit_write_args
		768	*
		769	* This function writes the MPEG TS packets for a EIT table into a buffer.
		770	* Calling code will usually generate the EIT via a call to its init function
		771	* and thus is responsible for freeing it.
		772	*
		773	* Return: The number of bytes written into the buffer. This is NOT
		774	* equal to the size of the EIT, since more space is needed for TS headers during TS
		775	* encapsulation.
		776	*/
		777	u32 vidtv_psi_eit_write_into(struct vidtv_psi_eit_write_args *args);
		778
		779	void vidtv_psi_eit_table_destroy(struct vidtv_psi_table_eit *eit);
		780
		781	/**
		782	* vidtv_psi_eit_table_update_sec_len - Recompute and update the EIT section length.
		783	* @eit: The EIT whose length is to be updated.
		784	*
		785	* This will traverse the table and accumulate the length of its components,
		786	* which is then used to replace the 'section_length' field.
		787	*
		788	* If section_length > EIT_MAX_SECTION_LEN, the operation fails.
		789	*/
		790	void vidtv_psi_eit_table_update_sec_len(struct vidtv_psi_table_eit *eit);
		791
		792	/**
		793	* vidtv_psi_eit_event_assign - Assigns the event loop to the EIT.
		794	* @eit: The EIT to assign to.
		795	* @e: The event loop
		796	*
		797	* This will free the previous event loop in the table.
		798	* This will assign ownership of the stream loop to the table, i.e. the table
		799	* will free this stream loop when a call to its destroy function is made.
		800	*/
		801	void vidtv_psi_eit_event_assign(struct vidtv_psi_table_eit *eit,
		802	struct vidtv_psi_table_eit_event *e);
		803
		804	struct vidtv_psi_table_eit_event
		805	vidtv_psi_eit_event_init(struct vidtv_psi_table_eit_event head, u16 event_id);
		806
		807	void vidtv_psi_eit_event_destroy(struct vidtv_psi_table_eit_event *e);
		808
577	#endif // VIDTV_PSI_H	809	#endif // VIDTV_PSI_H

drivers/media/test-drivers/vidtv/vidtv_s302m.c+68−57

@@ -17,23 +17,22 @@ · 16 unmodified lines
17		17
18	#define pr_fmt(fmt) KBUILD_MODNAME ":%s, %d: " fmt, __func__, __LINE__	18	#define pr_fmt(fmt) KBUILD_MODNAME ":%s, %d: " fmt, __func__, __LINE__
19		19
20	#include <linux/types.h>	20	#include <linux/bug.h>
21	#include <linux/slab.h>
22	#include <linux/crc32.h>	21	#include <linux/crc32.h>
23	#include <linux/vmalloc.h>	22	#include <linux/fixp-arith.h>
24	#include <linux/string.h>
25	#include <linux/kernel.h>
26	#include <linux/jiffies.h>	23	#include <linux/jiffies.h>
		24	#include <linux/kernel.h>
		25	#include <linux/math64.h>
27	#include <linux/printk.h>	26	#include <linux/printk.h>
28	#include <linux/ratelimit.h>	27	#include <linux/ratelimit.h>
29	#include <linux/fixp-arith.h>	28	#include <linux/slab.h>
30		29	#include <linux/string.h>
31	#include <linux/math64.h>	30	#include <linux/types.h>
32	#include <asm/byteorder.h>	31	#include <linux/vmalloc.h>
33		32
34	#include "vidtv_s302m.h"
35	#include "vidtv_encoder.h"
36	#include "vidtv_common.h"	33	#include "vidtv_common.h"
		34	#include "vidtv_encoder.h"
		35	#include "vidtv_s302m.h"
37		36
38	#define S302M_SAMPLING_RATE_HZ 48000	37	#define S302M_SAMPLING_RATE_HZ 48000
39	#define PES_PRIVATE_STREAM_1 0xbd /* PES: private_stream_1 */	38	#define PES_PRIVATE_STREAM_1 0xbd /* PES: private_stream_1 */
@@ -79,8 +78,9 @@ struct tone_duration { · 39 unmodified lines
79	int duration;	78	int duration;
80	};	79	};
81		80
82	#define COMPASS 120 /* beats per minute (Allegro) */	81	#define COMPASS 100 /* beats per minute */
83	static const struct tone_duration beethoven_5th_symphony[] = {	82	static const struct tone_duration beethoven_fur_elise[] = {
		83	{ NOTE_SILENT, 512},
84	{ NOTE_E_6, 128}, { NOTE_DS_6, 128}, { NOTE_E_6, 128},	84	{ NOTE_E_6, 128}, { NOTE_DS_6, 128}, { NOTE_E_6, 128},
85	{ NOTE_DS_6, 128}, { NOTE_E_6, 128}, { NOTE_B_5, 128},	85	{ NOTE_DS_6, 128}, { NOTE_E_6, 128}, { NOTE_B_5, 128},
86	{ NOTE_D_6, 128}, { NOTE_C_6, 128}, { NOTE_A_3, 128},	86	{ NOTE_D_6, 128}, { NOTE_C_6, 128}, { NOTE_A_3, 128},
@@ -121,31 +121,36 @@ static const struct tone_duration beethoven_5th_symphony[] = { · 34 unmodified lines
121	{ NOTE_E_5, 128}, { NOTE_D_5, 128}, { NOTE_A_3, 128},	121	{ NOTE_E_5, 128}, { NOTE_D_5, 128}, { NOTE_A_3, 128},
122	{ NOTE_E_4, 128}, { NOTE_A_4, 128}, { NOTE_E_4, 128},	122	{ NOTE_E_4, 128}, { NOTE_A_4, 128}, { NOTE_E_4, 128},
123	{ NOTE_D_5, 128}, { NOTE_C_5, 128}, { NOTE_E_3, 128},	123	{ NOTE_D_5, 128}, { NOTE_C_5, 128}, { NOTE_E_3, 128},
124	{ NOTE_E_4, 128}, { NOTE_E_5, 255}, { NOTE_E_6, 128},	124	{ NOTE_E_4, 128}, { NOTE_E_5, 128}, { NOTE_E_5, 128},
125	{ NOTE_E_5, 128}, { NOTE_E_6, 128}, { NOTE_E_5, 255},	125	{ NOTE_E_6, 128}, { NOTE_E_5, 128}, { NOTE_E_6, 128},
		126	{ NOTE_E_5, 128}, { NOTE_E_5, 128}, { NOTE_DS_5, 128},
		127	{ NOTE_E_5, 128}, { NOTE_DS_6, 128}, { NOTE_E_6, 128},
126	{ NOTE_DS_5, 128}, { NOTE_E_5, 128}, { NOTE_DS_6, 128},	128	{ NOTE_DS_5, 128}, { NOTE_E_5, 128}, { NOTE_DS_6, 128},
127	{ NOTE_E_6, 128}, { NOTE_DS_5, 128}, { NOTE_E_5, 128},
128	{ NOTE_DS_6, 128}, { NOTE_E_6, 128}, { NOTE_DS_6, 128},
129	{ NOTE_E_6, 128}, { NOTE_DS_6, 128}, { NOTE_E_6, 128},	129	{ NOTE_E_6, 128}, { NOTE_DS_6, 128}, { NOTE_E_6, 128},
130	{ NOTE_B_5, 128}, { NOTE_D_6, 128}, { NOTE_C_6, 128},	130	{ NOTE_DS_6, 128}, { NOTE_E_6, 128}, { NOTE_B_5, 128},
131	{ NOTE_A_3, 128}, { NOTE_E_4, 128}, { NOTE_A_4, 128},	131	{ NOTE_D_6, 128}, { NOTE_C_6, 128}, { NOTE_A_3, 128},
132	{ NOTE_C_5, 128}, { NOTE_E_5, 128}, { NOTE_A_5, 128},	132	{ NOTE_E_4, 128}, { NOTE_A_4, 128}, { NOTE_C_5, 128},
133	{ NOTE_E_3, 128}, { NOTE_E_4, 128}, { NOTE_GS_4, 128},	133	{ NOTE_E_5, 128}, { NOTE_A_5, 128}, { NOTE_E_3, 128},
134	{ NOTE_E_5, 128}, { NOTE_GS_5, 128}, { NOTE_B_5, 128},	134	{ NOTE_E_4, 128}, { NOTE_GS_4, 128}, { NOTE_E_5, 128},
135	{ NOTE_A_3, 128}, { NOTE_E_4, 128}, { NOTE_A_4, 128},	135	{ NOTE_GS_5, 128}, { NOTE_B_5, 128}, { NOTE_A_3, 128},
136	{ NOTE_E_5, 128}, { NOTE_E_6, 128}, { NOTE_DS_6, 128},	136	{ NOTE_E_4, 128}, { NOTE_A_4, 128}, { NOTE_E_5, 128},
137	{ NOTE_E_6, 128}, { NOTE_DS_6, 128}, { NOTE_E_6, 128},	137	{ NOTE_E_6, 128}, { NOTE_DS_6, 128}, { NOTE_E_6, 128},
138	{ NOTE_B_5, 128}, { NOTE_D_6, 128}, { NOTE_C_6, 128},	138	{ NOTE_DS_6, 128}, { NOTE_E_6, 128}, { NOTE_B_5, 128},
139	{ NOTE_A_3, 128}, { NOTE_E_4, 128}, { NOTE_A_4, 128},	139	{ NOTE_D_6, 128}, { NOTE_C_6, 128}, { NOTE_A_3, 128},
140	{ NOTE_C_5, 128}, { NOTE_E_5, 128}, { NOTE_A_5, 128},	140	{ NOTE_E_4, 128}, { NOTE_A_4, 128}, { NOTE_C_5, 128},
141	{ NOTE_E_3, 128}, { NOTE_E_4, 128}, { NOTE_GS_4, 128},	141	{ NOTE_E_5, 128}, { NOTE_A_5, 128}, { NOTE_E_3, 128},
142	{ NOTE_E_5, 128}, { NOTE_C_6, 128}, { NOTE_B_5, 128},	142	{ NOTE_E_4, 128}, { NOTE_GS_4, 128}, { NOTE_E_5, 128},
143	{ NOTE_C_5, 255}, { NOTE_C_5, 255}, { NOTE_SILENT, 512},	143	{ NOTE_C_6, 128}, { NOTE_B_5, 128}, { NOTE_A_5, 512},
		144	{ NOTE_SILENT, 256},
144	};	145	};
145		146
146	static struct vidtv_access_unit vidtv_s302m_access_unit_init(struct vidtv_access_unit head)	147	static struct vidtv_access_unit vidtv_s302m_access_unit_init(struct vidtv_access_unit head)
147	{	148	{
148	struct vidtv_access_unit au = kzalloc(sizeof(au), GFP_KERNEL);	149	struct vidtv_access_unit *au;
		150
		151	au = kzalloc(sizeof(*au), GFP_KERNEL);
		152	if (!au)
		153	return NULL;
149		154
150	if (head) {	155	if (head) {
151	while (head->next)	156	while (head->next)
@@ -196,10 +201,10 @@ static void vidtv_s302m_alloc_au(struct vidtv_encoder *e) · 44 unmodified lines
196	static void	201	static void
197	vidtv_s302m_compute_sample_count_from_video(struct vidtv_encoder *e)	202	vidtv_s302m_compute_sample_count_from_video(struct vidtv_encoder *e)
198	{	203	{
199	struct vidtv_access_unit *au = e->access_units;
200	struct vidtv_access_unit *sync_au = e->sync->access_units;	204	struct vidtv_access_unit *sync_au = e->sync->access_units;
201	u32 vau_duration_usecs;	205	struct vidtv_access_unit *au = e->access_units;
202	u32 sample_duration_usecs;	206	u32 sample_duration_usecs;
		207	u32 vau_duration_usecs;
203	u32 s;	208	u32 s;
204		209
205	vau_duration_usecs = USEC_PER_SEC / e->sync->sampling_rate_hz;	210	vau_duration_usecs = USEC_PER_SEC / e->sync->sampling_rate_hz;
@@ -230,36 +235,32 @@ static u16 vidtv_s302m_get_sample(struct vidtv_encoder *e) · 24 unmodified lines
230	{	235	{
231	u16 sample;	236	u16 sample;
232	int pos;	237	int pos;
		238	struct vidtv_s302m_ctx *ctx = e->ctx;
233		239
234	if (!e->src_buf) {	240	if (!e->src_buf) {
235	/*	241	/*
236	* Simple tone generator: play the tones at the	242	* Simple tone generator: play the tones at the
237	* beethoven_5th_symphony array.	243	* beethoven_fur_elise array.
238	*/	244	*/
239	if (e->last_duration <= 0) {	245	if (ctx->last_duration <= 0) {
240	if (e->src_buf_offset >= ARRAY_SIZE(beethoven_5th_symphony))	246	if (e->src_buf_offset >= ARRAY_SIZE(beethoven_fur_elise))
241	e->src_buf_offset = 0;	247	e->src_buf_offset = 0;
242		248
243	e->last_tone = beethoven_5th_symphony[e->src_buf_offset].note;	249	ctx->last_tone = beethoven_fur_elise[e->src_buf_offset].note;
244	e->last_duration = beethoven_5th_symphony[e->src_buf_offset].duration * S302M_SAMPLING_RATE_HZ / COMPASS / 5;	250	ctx->last_duration = beethoven_fur_elise[e->src_buf_offset].duration *
		251	S302M_SAMPLING_RATE_HZ / COMPASS / 5;
245	e->src_buf_offset++;	252	e->src_buf_offset++;
246	e->note_offset = 0;	253	ctx->note_offset = 0;
247	} else {	254	} else {
248	e->last_duration--;	255	ctx->last_duration--;
249	}	256	}
250		257
251	/* Handle silent */	258	/* Handle pause notes */
252	if (!e->last_tone) {	259	if (!ctx->last_tone)
253	e->src_buf_offset = 0;
254	return 0x8000;	260	return 0x8000;
255	}
256		261
257	pos = (2 * PI * e->note_offset * e->last_tone / S302M_SAMPLING_RATE_HZ);	262	pos = (2 * PI * ctx->note_offset * ctx->last_tone) / S302M_SAMPLING_RATE_HZ;
258		263	ctx->note_offset++;
259	if (pos == 360)
260	e->note_offset = 0;
261	else
262	e->note_offset++;
263		264
264	return (fixp_sin32(pos % (2 * PI)) >> 16) + 0x8000;	265	return (fixp_sin32(pos % (2 * PI)) >> 16) + 0x8000;
265	}	266	}
@@ -289,9 +290,9 @@ static u16 vidtv_s302m_get_sample(struct vidtv_encoder *e) · 23 unmodified lines
289	static u32 vidtv_s302m_write_frame(struct vidtv_encoder *e,	290	static u32 vidtv_s302m_write_frame(struct vidtv_encoder *e,
290	u16 sample)	291	u16 sample)
291	{	292	{
292	u32 nbytes = 0;
293	struct vidtv_s302m_frame_16 f = {};
294	struct vidtv_s302m_ctx *ctx = e->ctx;	293	struct vidtv_s302m_ctx *ctx = e->ctx;
		294	struct vidtv_s302m_frame_16 f = {};
		295	u32 nbytes = 0;
295		296
296	/* from ffmpeg: see s302enc.c */	297	/* from ffmpeg: see s302enc.c */
297		298
@@ -388,6 +389,8 @@ static void vidtv_s302m_write_frames(struct vidtv_encoder *e) · 90 unmodified lines
388		389
389	static void vidtv_s302m_encode(struct vidtv_encoder e)	390	static void vidtv_s302m_encode(struct vidtv_encoder e)
390	{	391	{
		392	struct vidtv_s302m_ctx *ctx = e->ctx;
		393
391	/*	394	/*
392	* According to SMPTE 302M, an audio access unit is specified as those	395	* According to SMPTE 302M, an audio access unit is specified as those
393	* AES3 words that are associated with a corresponding video frame.	396	* AES3 words that are associated with a corresponding video frame.
@@ -401,8 +404,6 @@ static void vidtv_s302m_encode(struct vidtv_encoder e) · 7 unmodified lines
401	* ffmpeg	404	* ffmpeg
402	*/	405	*/
403		406
404	struct vidtv_s302m_ctx *ctx = e->ctx;
405
406	vidtv_s302m_access_unit_destroy(e);	407	vidtv_s302m_access_unit_destroy(e);
407	vidtv_s302m_alloc_au(e);	408	vidtv_s302m_alloc_au(e);
408		409
@@ -440,8 +441,13 @@ static u32 vidtv_s302m_clear(struct vidtv_encoder *e) · 31 unmodified lines
440	struct vidtv_encoder	441	struct vidtv_encoder
441	*vidtv_s302m_encoder_init(struct vidtv_s302m_encoder_init_args args)	442	*vidtv_s302m_encoder_init(struct vidtv_s302m_encoder_init_args args)
442	{	443	{
443	struct vidtv_encoder e = kzalloc(sizeof(e), GFP_KERNEL);
444	u32 priv_sz = sizeof(struct vidtv_s302m_ctx);	444	u32 priv_sz = sizeof(struct vidtv_s302m_ctx);
		445	struct vidtv_s302m_ctx *ctx;
		446	struct vidtv_encoder *e;
		447
		448	e = kzalloc(sizeof(*e), GFP_KERNEL);
		449	if (!e)
		450	return NULL;
445		451
446	e->id = S302M;	452	e->id = S302M;
447		453
@@ -453,14 +459,19 @@ struct vidtv_encoder · 5 unmodified lines
453	e->encoder_buf_offset = 0;	459	e->encoder_buf_offset = 0;
454		460
455	e->sample_count = 0;	461	e->sample_count = 0;
456	e->last_duration = 0;
457		462
458	e->src_buf = (args.src_buf) ? args.src_buf : NULL;	463	e->src_buf = (args.src_buf) ? args.src_buf : NULL;
459	e->src_buf_sz = (args.src_buf) ? args.src_buf_sz : 0;	464	e->src_buf_sz = (args.src_buf) ? args.src_buf_sz : 0;
460	e->src_buf_offset = 0;	465	e->src_buf_offset = 0;
461		466
462	e->is_video_encoder = false;	467	e->is_video_encoder = false;
463	e->ctx = kzalloc(priv_sz, GFP_KERNEL);	468
		469	ctx = kzalloc(priv_sz, GFP_KERNEL);
		470	if (!ctx)
		471	return NULL;
		472
		473	e->ctx = ctx;
		474	ctx->last_duration = 0;
464		475
465	e->encode = vidtv_s302m_encode;	476	e->encode = vidtv_s302m_encode;
466	e->clear = vidtv_s302m_clear;	477	e->clear = vidtv_s302m_clear;

drivers/media/test-drivers/vidtv/vidtv_s302m.h+7−2

 #define VIDTV_S302M_H
 #include <linux/types.h>
-#include <asm/byteorder.h>
 #include "vidtv_encoder.h"
  * @enc: A pointer to the containing encoder structure.
  * @frame_index: The current frame in a block
  * @au_count: The total number of access units encoded up to now
+ * @last_duration: Duration of the tone currently being played
+ * @note_offset: Position at the music tone array
+ * @last_tone: Tone currently being played
  */
 struct vidtv_s302m_ctx {
 	struct vidtv_encoder *enc;
 	u32 frame_index;
 	u32 au_count;
+	int last_duration;
+	unsigned int note_offset;
+	enum musical_notes last_tone;
 };
-/**
+/*
  * struct vidtv_smpte_s302m_es - s302m MPEG Elementary Stream header.
  *
  * See SMPTE 302M 2007 table 1.

drivers/media/test-drivers/vidtv/vidtv_ts.c+2−3

 #define pr_fmt(fmt) KBUILD_MODNAME ":%s, %d: " fmt, __func__, __LINE__
+#include <linux/math64.h>
 #include <linux/printk.h>
 #include <linux/ratelimit.h>
 #include <linux/types.h>
-#include <linux/math64.h>
-#include <asm/byteorder.h>
-#include "vidtv_ts.h"
 #include "vidtv_common.h"
+#include "vidtv_ts.h"
 static u32 vidtv_ts_write_pcr_bits(u8 *to, u32 to_offset, u64 pcr)
 {

drivers/media/test-drivers/vidtv/vidtv_ts.h+2−3

 #define VIDTV_TS_H
 #include <linux/types.h>
-#include <asm/byteorder.h>
 #define TS_SYNC_BYTE 0x47
 #define TS_PACKET_LEN 188
  * @dest_offset: The byte offset into the buffer.
  * @pid: The TS PID for the PCR packets.
  * @buf_sz: The size of the buffer in bytes.
- * @countinuity_counter: The TS continuity_counter.
+ * @continuity_counter: The TS continuity_counter.
  * @pcr: A sample from the system clock.
  */
 struct pcr_write_args {
  * @dest_buf: The buffer to write into.
  * @dest_offset: The byte offset into the buffer.
  * @buf_sz: The size of the buffer in bytes.
- * @countinuity_counter: The TS continuity_counter.
+ * @continuity_counter: The TS continuity_counter.
  */
 struct null_packet_write_args {
 	void *dest_buf;

drivers/media/test-drivers/vidtv/vidtv_tuner.c+3−2

 #include <linux/errno.h>
 #include <linux/i2c.h>
 #include <linux/module.h>
+#include <linux/printk.h>
+#include <linux/ratelimit.h>
 #include <linux/slab.h>
 #include <linux/types.h>
 #include <media/dvb_frontend.h>
-#include <linux/printk.h>
-#include <linux/ratelimit.h>
 #include "vidtv_tuner.h"

drivers/media/test-drivers/vidtv/vidtv_tuner.h+1−0

@@ -11,6 +11,7 @@ · 10 unmodified lines
11	#define VIDTV_TUNER_H	11	#define VIDTV_TUNER_H
12		12
13	#include <linux/types.h>	13	#include <linux/types.h>
		14
14	#include <media/dvb_frontend.h>	15	#include <media/dvb_frontend.h>
15		16
16	#define NUM_VALID_TUNER_FREQS 8	17	#define NUM_VALID_TUNER_FREQS 8

drivers/mmc/host/sdhci-of-arasan.c+19−32

 #define SDHCI_ARASAN_VENDOR_REGISTER	0x78
 #define SDHCI_ARASAN_ITAPDLY_REGISTER	0xF0F8
+#define SDHCI_ARASAN_ITAPDLY_SEL_MASK	0xFF
 #define SDHCI_ARASAN_OTAPDLY_REGISTER	0xF0FC
+#define SDHCI_ARASAN_OTAPDLY_SEL_MASK	0x3F
 #define SDHCI_ARASAN_CQE_BASE_ADDR	0x200
 #define VENDOR_ENHANCED_STROBE		BIT(0)
 	u8 tap_delay, tap_max = 0;
 	int ret;
-	/*
+	/* This is applicable for SDHCI_SPEC_300 and above */
-	 * This is applicable for SDHCI_SPEC_300 and above
+	if (host->version < SDHCI_SPEC_300)
-	 * ZynqMP does not set phase for <=25MHz clock.
-	 * If degrees is zero, no need to do anything.
-	 */
-	if (host->version < SDHCI_SPEC_300 ||
-	    host->timing == MMC_TIMING_LEGACY ||
-	    host->timing == MMC_TIMING_UHS_SDR12 || !degrees)
 		return 0;
 	switch (host->timing) {
 	if (ret)
 		pr_err("Error setting Output Tap Delay\n");
+	/* Release DLL Reset */
+	zynqmp_pm_sd_dll_reset(node_id, PM_DLL_RESET_RELEASE);
 	return ret;
 }
 	u8 tap_delay, tap_max = 0;
 	int ret;
-	/*
+	/* This is applicable for SDHCI_SPEC_300 and above */
-	 * This is applicable for SDHCI_SPEC_300 and above
+	if (host->version < SDHCI_SPEC_300)
-	 * ZynqMP does not set phase for <=25MHz clock.
-	 * If degrees is zero, no need to do anything.
-	 */
-	if (host->version < SDHCI_SPEC_300 ||
-	    host->timing == MMC_TIMING_LEGACY ||
-	    host->timing == MMC_TIMING_UHS_SDR12 || !degrees)
 		return 0;
+	/* Assert DLL Reset */
+	zynqmp_pm_sd_dll_reset(node_id, PM_DLL_RESET_ASSERT);
 	switch (host->timing) {
 	case MMC_TIMING_MMC_HS:
 	case MMC_TIMING_SD_HS:
 	struct sdhci_host *host = sdhci_arasan->host;
 	u8 tap_delay, tap_max = 0;
-	/*
+	/* This is applicable for SDHCI_SPEC_300 and above */
-	 * This is applicable for SDHCI_SPEC_300 and above
+	if (host->version < SDHCI_SPEC_300)
-	 * Versal does not set phase for <=25MHz clock.
-	 * If degrees is zero, no need to do anything.
-	 */
-	if (host->version < SDHCI_SPEC_300 ||
-	    host->timing == MMC_TIMING_LEGACY ||
-	    host->timing == MMC_TIMING_UHS_SDR12 || !degrees)
 		return 0;
 	switch (host->timing) {
 		regval = sdhci_readl(host, SDHCI_ARASAN_OTAPDLY_REGISTER);
 		regval |= SDHCI_OTAPDLY_ENABLE;
 		sdhci_writel(host, regval, SDHCI_ARASAN_OTAPDLY_REGISTER);
+		regval &= ~SDHCI_ARASAN_OTAPDLY_SEL_MASK;
 		regval |= tap_delay;
 		sdhci_writel(host, regval, SDHCI_ARASAN_OTAPDLY_REGISTER);
 	}
 	struct sdhci_host *host = sdhci_arasan->host;
 	u8 tap_delay, tap_max = 0;
-	/*
+	/* This is applicable for SDHCI_SPEC_300 and above */
-	 * This is applicable for SDHCI_SPEC_300 and above
+	if (host->version < SDHCI_SPEC_300)
-	 * Versal does not set phase for <=25MHz clock.
-	 * If degrees is zero, no need to do anything.
-	 */
-	if (host->version < SDHCI_SPEC_300 ||
-	    host->timing == MMC_TIMING_LEGACY ||
-	    host->timing == MMC_TIMING_UHS_SDR12 || !degrees)
 		return 0;
 	switch (host->timing) {
 		sdhci_writel(host, regval, SDHCI_ARASAN_ITAPDLY_REGISTER);
 		regval |= SDHCI_ITAPDLY_ENABLE;
 		sdhci_writel(host, regval, SDHCI_ARASAN_ITAPDLY_REGISTER);
+		regval &= ~SDHCI_ARASAN_ITAPDLY_SEL_MASK;
 		regval |= tap_delay;
 		sdhci_writel(host, regval, SDHCI_ARASAN_ITAPDLY_REGISTER);
 		regval &= ~SDHCI_ITAPDLY_CHGWIN;

drivers/mmc/host/sdhci-pci-core.c+11−2

 	}
 }
+static void sdhci_intel_set_uhs_signaling(struct sdhci_host *host,
+					  unsigned int timing)
+{
+	/* Set UHS timing to SDR25 for High Speed mode */
+	if (timing == MMC_TIMING_MMC_HS || timing == MMC_TIMING_SD_HS)
+		timing = MMC_TIMING_UHS_SDR25;
+	sdhci_set_uhs_signaling(host, timing);
+}
 #define INTEL_HS400_ES_REG 0x78
 #define INTEL_HS400_ES_BIT BIT(0)
 	.enable_dma		= sdhci_pci_enable_dma,
 	.set_bus_width		= sdhci_set_bus_width,
 	.reset			= sdhci_reset,
-	.set_uhs_signaling	= sdhci_set_uhs_signaling,
+	.set_uhs_signaling	= sdhci_intel_set_uhs_signaling,
 	.hw_reset		= sdhci_pci_hw_reset,
 };
 	.enable_dma		= sdhci_pci_enable_dma,
 	.set_bus_width		= sdhci_set_bus_width,
 	.reset			= sdhci_cqhci_reset,
-	.set_uhs_signaling	= sdhci_set_uhs_signaling,
+	.set_uhs_signaling	= sdhci_intel_set_uhs_signaling,
 	.hw_reset		= sdhci_pci_hw_reset,
 	.irq			= sdhci_cqhci_irq,
 };

drivers/mtd/nand/raw/ams-delta.c+9−3

 	return 0;
 }
+static int gpio_nand_attach_chip(struct nand_chip *chip)
+{
+	chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
+	chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
+	return 0;
+}
 static const struct nand_controller_ops gpio_nand_ops = {
 	.exec_op = gpio_nand_exec_op,
+	.attach_chip = gpio_nand_attach_chip,
 	.setup_interface = gpio_nand_setup_interface,
 };
 		return err;
 	}
-	this->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
-	this->ecc.algo = NAND_ECC_ALGO_HAMMING;
 	platform_set_drvdata(pdev, priv);
 	/* Set chip enabled but write protected */

drivers/mtd/nand/raw/au1550nd.c+9−2

 	return ret;
 }
+static int au1550nd_attach_chip(struct nand_chip *chip)
+{
+	chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
+	chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
+	return 0;
+}
 static const struct nand_controller_ops au1550nd_ops = {
 	.exec_op = au1550nd_exec_op,
+	.attach_chip = au1550nd_attach_chip,
 };
 static int au1550nd_probe(struct platform_device *pdev)
 	nand_controller_init(&ctx->controller);
 	ctx->controller.ops = &au1550nd_ops;
 	this->controller = &ctx->controller;
-	this->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
-	this->ecc.algo = NAND_ECC_ALGO_HAMMING;
 	if (pd->devwidth)
 		this->options |= NAND_BUSWIDTH_16;

drivers/mtd/nand/raw/cs553x_nand.c+16−8

 static struct cs553x_nand_controller *controllers[4];
+static int cs553x_attach_chip(struct nand_chip *chip)
+{
+	if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)
+		return 0;
+	chip->ecc.size = 256;
+	chip->ecc.bytes = 3;
+	chip->ecc.hwctl  = cs_enable_hwecc;
+	chip->ecc.calculate = cs_calculate_ecc;
+	chip->ecc.correct  = nand_correct_data;
+	chip->ecc.strength = 1;
+	return 0;
+}
 static const struct nand_controller_ops cs553x_nand_controller_ops = {
 	.exec_op = cs553x_exec_op,
+	.attach_chip = cs553x_attach_chip,
 };
 static int __init cs553x_init_one(int cs, int mmio, unsigned long adr)
 		goto out_mtd;
 	}
-	this->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
-	this->ecc.size = 256;
-	this->ecc.bytes = 3;
-	this->ecc.hwctl  = cs_enable_hwecc;
-	this->ecc.calculate = cs_calculate_ecc;
-	this->ecc.correct  = nand_correct_data;
-	this->ecc.strength = 1;
 	/* Enable the following for a flash based bad block table */
 	this->bbt_options = NAND_BBT_USE_FLASH;

drivers/mtd/nand/raw/davinci_nand.c+4−4

 	if (IS_ERR(pdata))
 		return PTR_ERR(pdata);
+	/* Use board-specific ECC config */
+	info->chip.ecc.engine_type = pdata->engine_type;
+	info->chip.ecc.placement = pdata->ecc_placement;
 	switch (info->chip.ecc.engine_type) {
 	case NAND_ECC_ENGINE_TYPE_NONE:
 		pdata->ecc_bits = 0;
 	info->mask_ale		= pdata->mask_ale ? : MASK_ALE;
 	info->mask_cle		= pdata->mask_cle ? : MASK_CLE;
-	/* Use board-specific ECC config */
-	info->chip.ecc.engine_type = pdata->engine_type;
-	info->chip.ecc.placement = pdata->ecc_placement;
 	spin_lock_irq(&davinci_nand_lock);
 	/* put CSxNAND into NAND mode */

drivers/mtd/nand/raw/diskonchip.c+19−10

 	return 1;
 }
+static int doc200x_attach_chip(struct nand_chip *chip)
+{
+	if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)
+		return 0;
+	chip->ecc.placement = NAND_ECC_PLACEMENT_INTERLEAVED;
+	chip->ecc.size = 512;
+	chip->ecc.bytes = 6;
+	chip->ecc.strength = 2;
+	chip->ecc.options = NAND_ECC_GENERIC_ERASED_CHECK;
+	chip->ecc.hwctl = doc200x_enable_hwecc;
+	chip->ecc.calculate = doc200x_calculate_ecc;
+	chip->ecc.correct = doc200x_correct_data;
+	return 0;
+}
 static const struct nand_controller_ops doc200x_ops = {
 	.exec_op = doc200x_exec_op,
+	.attach_chip = doc200x_attach_chip,
 };
 static const struct nand_controller_ops doc2001plus_ops = {
 	.exec_op = doc2001plus_exec_op,
+	.attach_chip = doc200x_attach_chip,
 };
 static int __init doc_probe(unsigned long physadr)
 	nand->controller	= &doc->base;
 	nand_set_controller_data(nand, doc);
-	nand->ecc.hwctl		= doc200x_enable_hwecc;
-	nand->ecc.calculate	= doc200x_calculate_ecc;
-	nand->ecc.correct	= doc200x_correct_data;
-	nand->ecc.engine_type	= NAND_ECC_ENGINE_TYPE_ON_HOST;
-	nand->ecc.placement	= NAND_ECC_PLACEMENT_INTERLEAVED;
-	nand->ecc.size		= 512;
-	nand->ecc.bytes		= 6;
-	nand->ecc.strength	= 2;
-	nand->ecc.options	= NAND_ECC_GENERIC_ERASED_CHECK;
 	nand->bbt_options	= NAND_BBT_USE_FLASH;
 	/* Skip the automatic BBT scan so we can run it manually */
 	nand->options		|= NAND_SKIP_BBTSCAN | NAND_NO_BBM_QUIRK;

drivers/mtd/nand/raw/fsmc_nand.c+15−15

 	struct mtd_info *mtd = nand_to_mtd(nand);
 	struct fsmc_nand_data *host = nand_to_fsmc(nand);
+	if (nand->ecc.engine_type == NAND_ECC_ENGINE_TYPE_INVALID)
+		nand->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
+	if (!nand->ecc.size)
+		nand->ecc.size = 512;
+	if (AMBA_REV_BITS(host->pid) >= 8) {
+		nand->ecc.read_page = fsmc_read_page_hwecc;
+		nand->ecc.calculate = fsmc_read_hwecc_ecc4;
+		nand->ecc.correct = fsmc_bch8_correct_data;
+		nand->ecc.bytes = 13;
+		nand->ecc.strength = 8;
+	}
 	if (AMBA_REV_BITS(host->pid) >= 8) {
 		switch (mtd->oobsize) {
 		case 16:
 		dev_info(host->dev, "Using 1-bit HW ECC scheme\n");
 		nand->ecc.calculate = fsmc_read_hwecc_ecc1;
 		nand->ecc.correct = nand_correct_data;
+		nand->ecc.hwctl = fsmc_enable_hwecc;
 		nand->ecc.bytes = 3;
 		nand->ecc.strength = 1;
 		nand->ecc.options |= NAND_ECC_SOFT_HAMMING_SM_ORDER;
 	mtd->dev.parent = &pdev->dev;
-	/*
-	 * Setup default ECC mode. nand_dt_init() called from nand_scan_ident()
-	 * can overwrite this value if the DT provides a different value.
-	 */
-	nand->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
-	nand->ecc.hwctl = fsmc_enable_hwecc;
-	nand->ecc.size = 512;
 	nand->badblockbits = 7;
 	if (host->mode == USE_DMA_ACCESS) {
 		nand->options |= NAND_KEEP_TIMINGS;
 	}
-	if (AMBA_REV_BITS(host->pid) >= 8) {
-		nand->ecc.read_page = fsmc_read_page_hwecc;
-		nand->ecc.calculate = fsmc_read_hwecc_ecc4;
-		nand->ecc.correct = fsmc_bch8_correct_data;
-		nand->ecc.bytes = 13;
-		nand->ecc.strength = 8;
-	}
 	nand_controller_init(&host->base);
 	host->base.ops = &fsmc_nand_controller_ops;
 	nand->controller = &host->base;

drivers/mtd/nand/raw/gpio.c+9−2

 	return ret;
 }
+static int gpio_nand_attach_chip(struct nand_chip *chip)
+{
+	chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
+	chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
+	return 0;
+}
 static const struct nand_controller_ops gpio_nand_ops = {
 	.exec_op = gpio_nand_exec_op,
+	.attach_chip = gpio_nand_attach_chip,
 };
 #ifdef CONFIG_OF
 	gpiomtd->base.ops = &gpio_nand_ops;
 	nand_set_flash_node(chip, pdev->dev.of_node);
-	chip->ecc.engine_type	= NAND_ECC_ENGINE_TYPE_SOFT;
-	chip->ecc.algo		= NAND_ECC_ALGO_HAMMING;
 	chip->options		= gpiomtd->plat.options;
 	chip->controller	= &gpiomtd->base;

drivers/mtd/nand/raw/lpc32xx_mlc.c+13−10

 	struct lpc32xx_nand_host *host = nand_get_controller_data(chip);
 	struct device *dev = &host->pdev->dev;
+	if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)
+		return 0;
 	host->dma_buf = devm_kzalloc(dev, mtd->writesize, GFP_KERNEL);
 	if (!host->dma_buf)
 		return -ENOMEM;
 	if (!host->dummy_buf)
 		return -ENOMEM;
-	chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
 	chip->ecc.size = 512;
+	chip->ecc.hwctl = lpc32xx_ecc_enable;
+	chip->ecc.read_page_raw = lpc32xx_read_page;
+	chip->ecc.read_page = lpc32xx_read_page;
+	chip->ecc.write_page_raw = lpc32xx_write_page_lowlevel;
+	chip->ecc.write_page = lpc32xx_write_page_lowlevel;
+	chip->ecc.write_oob = lpc32xx_write_oob;
+	chip->ecc.read_oob = lpc32xx_read_oob;
+	chip->ecc.strength = 4;
+	chip->ecc.bytes = 10;
 	mtd_set_ooblayout(mtd, &lpc32xx_ooblayout_ops);
 	host->mlcsubpages = mtd->writesize / 512;
 	platform_set_drvdata(pdev, host);
 	/* Initialize function pointers */
-	nand_chip->ecc.hwctl = lpc32xx_ecc_enable;
-	nand_chip->ecc.read_page_raw = lpc32xx_read_page;
-	nand_chip->ecc.read_page = lpc32xx_read_page;
-	nand_chip->ecc.write_page_raw = lpc32xx_write_page_lowlevel;
-	nand_chip->ecc.write_page = lpc32xx_write_page_lowlevel;
-	nand_chip->ecc.write_oob = lpc32xx_write_oob;
-	nand_chip->ecc.read_oob = lpc32xx_read_oob;
-	nand_chip->ecc.strength = 4;
-	nand_chip->ecc.bytes = 10;
 	nand_chip->legacy.waitfunc = lpc32xx_waitfunc;
 	nand_chip->options = NAND_NO_SUBPAGE_WRITE;

drivers/mtd/nand/raw/lpc32xx_slc.c+14−12

 	struct mtd_info *mtd = nand_to_mtd(chip);
 	struct lpc32xx_nand_host *host = nand_get_controller_data(chip);
+	if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)
+		return 0;
 	/* OOB and ECC CPU and DMA work areas */
 	host->ecc_buf = (uint32_t *)(host->data_buf + LPC32XX_DMA_DATA_SIZE);
 	if (mtd->writesize <= 512)
 		mtd_set_ooblayout(mtd, &lpc32xx_ooblayout_ops);
+	chip->ecc.placement = NAND_ECC_PLACEMENT_INTERLEAVED;
 	/* These sizes remain the same regardless of page size */
 	chip->ecc.size = 256;
+	chip->ecc.strength = 1;
 	chip->ecc.bytes = LPC32XX_SLC_DEV_ECC_BYTES;
 	chip->ecc.prepad = 0;
 	chip->ecc.postpad = 0;
+	chip->ecc.read_page_raw = lpc32xx_nand_read_page_raw_syndrome;
+	chip->ecc.read_page = lpc32xx_nand_read_page_syndrome;
+	chip->ecc.write_page_raw = lpc32xx_nand_write_page_raw_syndrome;
+	chip->ecc.write_page = lpc32xx_nand_write_page_syndrome;
+	chip->ecc.write_oob = lpc32xx_nand_write_oob_syndrome;
+	chip->ecc.read_oob = lpc32xx_nand_read_oob_syndrome;
+	chip->ecc.calculate = lpc32xx_nand_ecc_calculate;
+	chip->ecc.correct = nand_correct_data;
+	chip->ecc.hwctl = lpc32xx_nand_ecc_enable;
 	/*
 	 * Use a custom BBT marker setup for small page FLASH that
 	platform_set_drvdata(pdev, host);
 	/* NAND callbacks for LPC32xx SLC hardware */
-	chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
-	chip->ecc.placement = NAND_ECC_PLACEMENT_INTERLEAVED;
 	chip->legacy.read_byte = lpc32xx_nand_read_byte;
 	chip->legacy.read_buf = lpc32xx_nand_read_buf;
 	chip->legacy.write_buf = lpc32xx_nand_write_buf;
-	chip->ecc.read_page_raw = lpc32xx_nand_read_page_raw_syndrome;
-	chip->ecc.read_page = lpc32xx_nand_read_page_syndrome;
-	chip->ecc.write_page_raw = lpc32xx_nand_write_page_raw_syndrome;
-	chip->ecc.write_page = lpc32xx_nand_write_page_syndrome;
-	chip->ecc.write_oob = lpc32xx_nand_write_oob_syndrome;
-	chip->ecc.read_oob = lpc32xx_nand_read_oob_syndrome;
-	chip->ecc.calculate = lpc32xx_nand_ecc_calculate;
-	chip->ecc.correct = nand_correct_data;
-	chip->ecc.strength = 1;
-	chip->ecc.hwctl = lpc32xx_nand_ecc_enable;
 	/*
 	 * Allocate a large enough buffer for a single huge page plus

drivers/mtd/nand/raw/mpc5121_nfc.c+17−2

 #define NFC_TIMEOUT		(HZ / 10)	/* 1/10 s */
 struct mpc5121_nfc_prv {
+	struct nand_controller	controller;
 	struct nand_chip	chip;
 	int			irq;
 	void __iomem		*regs;
 		iounmap(prv->csreg);
 }
+static int mpc5121_nfc_attach_chip(struct nand_chip *chip)
+{
+	chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
+	chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
+	return 0;
+}
+static const struct nand_controller_ops mpc5121_nfc_ops = {
+	.attach_chip = mpc5121_nfc_attach_chip,
+};
 static int mpc5121_nfc_probe(struct platform_device *op)
 {
 	struct device_node *dn = op->dev.of_node;
 	chip = &prv->chip;
 	mtd = nand_to_mtd(chip);
+	nand_controller_init(&prv->controller);
+	prv->controller.ops = &mpc5121_nfc_ops;
+	chip->controller = &prv->controller;
 	mtd->dev.parent = dev;
 	nand_set_controller_data(chip, prv);
 	nand_set_flash_node(chip, dn);
 	chip->legacy.set_features = nand_get_set_features_notsupp;
 	chip->legacy.get_features = nand_get_set_features_notsupp;
 	chip->bbt_options = NAND_BBT_USE_FLASH;
-	chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
-	chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
 	/* Support external chip-select logic on ADS5121 board */
 	if (of_machine_is_compatible("fsl,mpc5121ads")) {

drivers/mtd/nand/raw/orion_nand.c+17−2

 #include <linux/platform_data/mtd-orion_nand.h>
 struct orion_nand_info {
+	struct nand_controller controller;
 	struct nand_chip chip;
 	struct clk *clk;
 };
 		buf[i++] = readb(io_base);
 }
+static int orion_nand_attach_chip(struct nand_chip *chip)
+{
+	chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
+	chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
+	return 0;
+}
+static const struct nand_controller_ops orion_nand_ops = {
+	.attach_chip = orion_nand_attach_chip,
+};
 static int __init orion_nand_probe(struct platform_device *pdev)
 {
 	struct orion_nand_info *info;
 	nc = &info->chip;
 	mtd = nand_to_mtd(nc);
+	nand_controller_init(&info->controller);
+	info->controller.ops = &orion_nand_ops;
+	nc->controller = &info->controller;
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	io_base = devm_ioremap_resource(&pdev->dev, res);
 	nc->legacy.IO_ADDR_R = nc->legacy.IO_ADDR_W = io_base;
 	nc->legacy.cmd_ctrl = orion_nand_cmd_ctrl;
 	nc->legacy.read_buf = orion_nand_read_buf;
-	nc->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
-	nc->ecc.algo = NAND_ECC_ALGO_HAMMING;
 	if (board->chip_delay)
 		nc->legacy.chip_delay = board->chip_delay;

drivers/mtd/nand/raw/pasemi_nand.c+17−2

 static unsigned int lpcctl;
 static struct mtd_info *pasemi_nand_mtd;
+static struct nand_controller controller;
 static const char driver_name[] = "pasemi-nand";
 static void pasemi_read_buf(struct nand_chip *chip, u_char *buf, int len)
 	return !!(inl(lpcctl) & LBICTRL_LPCCTL_NR);
 }
+static int pasemi_attach_chip(struct nand_chip *chip)
+{
+	chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
+	chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
+	return 0;
+}
+static const struct nand_controller_ops pasemi_ops = {
+	.attach_chip = pasemi_attach_chip,
+};
 static int pasemi_nand_probe(struct platform_device *ofdev)
 {
 	struct device *dev = &ofdev->dev;
 		goto out;
 	}
+	controller.ops = &pasemi_ops;
+	nand_controller_init(&controller);
+	chip->controller = &controller;
 	pasemi_nand_mtd = nand_to_mtd(chip);
 	/* Link the private data with the MTD structure */
 	chip->legacy.read_buf = pasemi_read_buf;
 	chip->legacy.write_buf = pasemi_write_buf;
 	chip->legacy.chip_delay = 0;
-	chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
-	chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
 	/* Enable the following for a flash based bad block table */
 	chip->bbt_options = NAND_BBT_USE_FLASH;

drivers/mtd/nand/raw/plat_nand.c+17−3

 #include <linux/mtd/platnand.h>
 struct plat_nand_data {
+	struct nand_controller	controller;
 	struct nand_chip	chip;
 	void __iomem		*io_base;
 };
+static int plat_nand_attach_chip(struct nand_chip *chip)
+{
+	chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
+	chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
+	return 0;
+}
+static const struct nand_controller_ops plat_nand_ops = {
+	.attach_chip = plat_nand_attach_chip,
+};
 /*
  * Probe for the NAND device.
  */
 	if (!data)
 		return -ENOMEM;
+	data->controller.ops = &plat_nand_ops;
+	nand_controller_init(&data->controller);
+	data->chip.controller = &data->controller;
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	data->io_base = devm_ioremap_resource(&pdev->dev, res);
 	if (IS_ERR(data->io_base))
 	data->chip.options |= pdata->chip.options;
 	data->chip.bbt_options |= pdata->chip.bbt_options;
-	data->chip.ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
-	data->chip.ecc.algo = NAND_ECC_ALGO_HAMMING;
 	platform_set_drvdata(pdev, data);
 	/* Handle any platform specific setup */

drivers/mtd/nand/raw/r852.c+27−13

 	return ret;
 }
+static int r852_attach_chip(struct nand_chip *chip)
+{
+	if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)
+		return 0;
+	chip->ecc.placement = NAND_ECC_PLACEMENT_INTERLEAVED;
+	chip->ecc.size = R852_DMA_LEN;
+	chip->ecc.bytes = SM_OOB_SIZE;
+	chip->ecc.strength = 2;
+	chip->ecc.hwctl = r852_ecc_hwctl;
+	chip->ecc.calculate = r852_ecc_calculate;
+	chip->ecc.correct = r852_ecc_correct;
+	/* TODO: hack */
+	chip->ecc.read_oob = r852_read_oob;
+	return 0;
+}
+static const struct nand_controller_ops r852_ops = {
+	.attach_chip = r852_attach_chip,
+};
 static int  r852_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
 {
 	int error;
 	chip->legacy.read_buf = r852_read_buf;
 	chip->legacy.write_buf = r852_write_buf;
-	/* ecc */
-	chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
-	chip->ecc.placement = NAND_ECC_PLACEMENT_INTERLEAVED;
-	chip->ecc.size = R852_DMA_LEN;
-	chip->ecc.bytes = SM_OOB_SIZE;
-	chip->ecc.strength = 2;
-	chip->ecc.hwctl = r852_ecc_hwctl;
-	chip->ecc.calculate = r852_ecc_calculate;
-	chip->ecc.correct = r852_ecc_correct;
-	/* TODO: hack */
-	chip->ecc.read_oob = r852_read_oob;
 	/* init our device structure */
 	dev = kzalloc(sizeof(struct r852_device), GFP_KERNEL);
 	dev->pci_dev = pci_dev;
 	pci_set_drvdata(pci_dev, dev);
+	nand_controller_init(&dev->controller);
+	dev->controller.ops = &r852_ops;
+	chip->controller = &dev->controller;
 	dev->bounce_buffer = dma_alloc_coherent(&pci_dev->dev, R852_DMA_LEN,
 		&dev->phys_bounce_buffer, GFP_KERNEL);

drivers/mtd/nand/raw/r852.h+1−0

@@ -104,6 +104,7 @@ · 103 unmodified lines
104	#define DMA_MEMORY 1	104	#define DMA_MEMORY 1
105		105
106	struct r852_device {	106	struct r852_device {
		107	struct nand_controller controller;
107	void __iomem mmio; / mmio */	108	void __iomem mmio; / mmio */
108	struct nand_chip chip; / nand chip backpointer */	109	struct nand_chip chip; / nand chip backpointer */
109	struct pci_dev pci_dev; / pci backpointer */	110	struct pci_dev pci_dev; / pci backpointer */

drivers/mtd/nand/raw/sharpsl.c+24−8

 #include <linux/io.h>
 struct sharpsl_nand {
+	struct nand_controller	controller;
 	struct nand_chip	chip;
 	void __iomem		*io;
 	return readb(sharpsl->io + ECCCNTR) != 0;
 }
+static int sharpsl_attach_chip(struct nand_chip *chip)
+{
+	if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)
+		return 0;
+	chip->ecc.size = 256;
+	chip->ecc.bytes = 3;
+	chip->ecc.strength = 1;
+	chip->ecc.hwctl = sharpsl_nand_enable_hwecc;
+	chip->ecc.calculate = sharpsl_nand_calculate_ecc;
+	chip->ecc.correct = nand_correct_data;
+	return 0;
+}
+static const struct nand_controller_ops sharpsl_ops = {
+	.attach_chip = sharpsl_attach_chip,
+};
 /*
  * Main initialization routine
  */
 	/* Get pointer to private data */
 	this = (struct nand_chip *)(&sharpsl->chip);
+	nand_controller_init(&sharpsl->controller);
+	sharpsl->controller.ops = &sharpsl_ops;
+	this->controller = &sharpsl->controller;
 	/* Link the private data with the MTD structure */
 	mtd = nand_to_mtd(this);
 	mtd->dev.parent = &pdev->dev;
 	this->legacy.dev_ready = sharpsl_nand_dev_ready;
 	/* 15 us command delay time */
 	this->legacy.chip_delay = 15;
-	/* set eccmode using hardware ECC */
-	this->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
-	this->ecc.size = 256;
-	this->ecc.bytes = 3;
-	this->ecc.strength = 1;
 	this->badblock_pattern = data->badblock_pattern;
-	this->ecc.hwctl = sharpsl_nand_enable_hwecc;
-	this->ecc.calculate = sharpsl_nand_calculate_ecc;
-	this->ecc.correct = nand_correct_data;
 	/* Scan to find existence of the device */
 	err = nand_scan(this, 1);

drivers/mtd/nand/raw/socrates_nand.c+17−4

 #define FPGA_NAND_DATA_SHIFT		16
 struct socrates_nand_host {
+	struct nand_controller	controller;
 	struct nand_chip	nand_chip;
 	void __iomem		*io_base;
 	struct device		*dev;
 	return 1;
 }
+static int socrates_attach_chip(struct nand_chip *chip)
+{
+	chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
+	chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
+	return 0;
+}
+static const struct nand_controller_ops socrates_ops = {
+	.attach_chip = socrates_attach_chip,
+};
 /*
  * Probe for the NAND device.
  */
 	mtd = nand_to_mtd(nand_chip);
 	host->dev = &ofdev->dev;
+	nand_controller_init(&host->controller);
+	host->controller.ops = &socrates_ops;
+	nand_chip->controller = &host->controller;
 	/* link the private data structures */
 	nand_set_controller_data(nand_chip, host);
 	nand_set_flash_node(nand_chip, ofdev->dev.of_node);
 	nand_chip->legacy.read_buf = socrates_nand_read_buf;
 	nand_chip->legacy.dev_ready = socrates_nand_device_ready;
-	/* enable ECC */
-	nand_chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
-	nand_chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
 	/* TODO: I have no idea what real delay is. */
 	nand_chip->legacy.chip_delay = 20;	/* 20us command delay time */

drivers/mtd/nand/raw/tmio_nand.c+24−9

 /*--------------------------------------------------------------------------*/
 struct tmio_nand {
+	struct nand_controller controller;
 	struct nand_chip chip;
 	struct completion comp;
 		cell->disable(dev);
 }
+static int tmio_attach_chip(struct nand_chip *chip)
+{
+	if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)
+		return 0;
+	chip->ecc.size = 512;
+	chip->ecc.bytes = 6;
+	chip->ecc.strength = 2;
+	chip->ecc.hwctl = tmio_nand_enable_hwecc;
+	chip->ecc.calculate = tmio_nand_calculate_ecc;
+	chip->ecc.correct = tmio_nand_correct_data;
+	return 0;
+}
+static const struct nand_controller_ops tmio_ops = {
+	.attach_chip = tmio_attach_chip,
+};
 static int tmio_probe(struct platform_device *dev)
 {
 	struct tmio_nand_data *data = dev_get_platdata(&dev->dev);
 	mtd->name = "tmio-nand";
 	mtd->dev.parent = &dev->dev;
+	nand_controller_init(&tmio->controller);
+	tmio->controller.ops = &tmio_ops;
+	nand_chip->controller = &tmio->controller;
 	tmio->ccr = devm_ioremap(&dev->dev, ccr->start, resource_size(ccr));
 	if (!tmio->ccr)
 		return -EIO;
 	nand_chip->legacy.write_buf = tmio_nand_write_buf;
 	nand_chip->legacy.read_buf = tmio_nand_read_buf;
-	/* set eccmode using hardware ECC */
-	nand_chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
-	nand_chip->ecc.size = 512;
-	nand_chip->ecc.bytes = 6;
-	nand_chip->ecc.strength = 2;
-	nand_chip->ecc.hwctl = tmio_nand_enable_hwecc;
-	nand_chip->ecc.calculate = tmio_nand_calculate_ecc;
-	nand_chip->ecc.correct = tmio_nand_correct_data;
 	if (data)
 		nand_chip->badblock_pattern = data->badblock_pattern;

drivers/mtd/nand/raw/txx9ndfmc.c+9−5

 {
 	struct mtd_info *mtd = nand_to_mtd(chip);
+	if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)
+		return 0;
+	chip->ecc.strength = 1;
 	if (mtd->writesize >= 512) {
 		chip->ecc.size = 512;
 		chip->ecc.bytes = 6;
 		chip->ecc.bytes = 3;
 	}
+	chip->ecc.calculate = txx9ndfmc_calculate_ecc;
+	chip->ecc.correct = txx9ndfmc_correct_data;
+	chip->ecc.hwctl = txx9ndfmc_enable_hwecc;
 	return 0;
 }
 		chip->legacy.write_buf = txx9ndfmc_write_buf;
 		chip->legacy.cmd_ctrl = txx9ndfmc_cmd_ctrl;
 		chip->legacy.dev_ready = txx9ndfmc_dev_ready;
-		chip->ecc.calculate = txx9ndfmc_calculate_ecc;
-		chip->ecc.correct = txx9ndfmc_correct_data;
-		chip->ecc.hwctl = txx9ndfmc_enable_hwecc;
-		chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
-		chip->ecc.strength = 1;
 		chip->legacy.chip_delay = 100;
 		chip->controller = &drvdata->controller;

drivers/mtd/nand/raw/xway_nand.c+16−2

 #define NAND_CON_NANDM		1
 struct xway_nand_data {
+	struct nand_controller	controller;
 	struct nand_chip	chip;
 	unsigned long		csflags;
 	void __iomem		*nandaddr;
 		xway_writeb(nand_to_mtd(chip), NAND_WRITE_DATA, buf[i]);
 }
+static int xway_attach_chip(struct nand_chip *chip)
+{
+	chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
+	chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
+	return 0;
+}
+static const struct nand_controller_ops xway_nand_ops = {
+	.attach_chip = xway_attach_chip,
+};
 /*
  * Probe for the NAND device.
  */
 	data->chip.legacy.read_byte = xway_read_byte;
 	data->chip.legacy.chip_delay = 30;
-	data->chip.ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
+	nand_controller_init(&data->controller);
-	data->chip.ecc.algo = NAND_ECC_ALGO_HAMMING;
+	data->controller.ops = &xway_nand_ops;
+	data->chip.controller = &data->controller;
 	platform_set_drvdata(pdev, data);
 	nand_set_controller_data(&data->chip, data);

drivers/net/bonding/bond_main.c+43−18

 	slave->dev->flags &= ~IFF_SLAVE;
 }
-static struct slave *bond_alloc_slave(struct bonding *bond)
+static void slave_kobj_release(struct kobject *kobj)
+{
+	struct slave *slave = to_slave(kobj);
+	struct bonding *bond = bond_get_bond_by_slave(slave);
+	cancel_delayed_work_sync(&slave->notify_work);
+	if (BOND_MODE(bond) == BOND_MODE_8023AD)
+		kfree(SLAVE_AD_INFO(slave));
+	kfree(slave);
+}
+static struct kobj_type slave_ktype = {
+	.release = slave_kobj_release,
+#ifdef CONFIG_SYSFS
+	.sysfs_ops = &slave_sysfs_ops,
+#endif
+};
+static int bond_kobj_init(struct slave *slave)
+{
+	int err;
+	err = kobject_init_and_add(&slave->kobj, &slave_ktype,
+				   &(slave->dev->dev.kobj), "bonding_slave");
+	if (err)
+		kobject_put(&slave->kobj);
+	return err;
+}
+static struct slave *bond_alloc_slave(struct bonding *bond,
+				      struct net_device *slave_dev)
 {
 	struct slave *slave = NULL;
 	if (!slave)
 		return NULL;
+	slave->bond = bond;
+	slave->dev = slave_dev;
+	if (bond_kobj_init(slave))
+		return NULL;
 	if (BOND_MODE(bond) == BOND_MODE_8023AD) {
 		SLAVE_AD_INFO(slave) = kzalloc(sizeof(struct ad_slave_info),
 					       GFP_KERNEL);
 		if (!SLAVE_AD_INFO(slave)) {
-			kfree(slave);
+			kobject_put(&slave->kobj);
 			return NULL;
 		}
 	}
 	return slave;
 }
-static void bond_free_slave(struct slave *slave)
-{
-	struct bonding *bond = bond_get_bond_by_slave(slave);
-	cancel_delayed_work_sync(&slave->notify_work);
-	if (BOND_MODE(bond) == BOND_MODE_8023AD)
-		kfree(SLAVE_AD_INFO(slave));
-	kfree(slave);
-}
 static void bond_fill_ifbond(struct bonding *bond, struct ifbond *info)
 {
 	info->bond_mode = BOND_MODE(bond);
 			goto err_undo_flags;
 	}
-	new_slave = bond_alloc_slave(bond);
+	new_slave = bond_alloc_slave(bond, slave_dev);
 	if (!new_slave) {
 		res = -ENOMEM;
 		goto err_undo_flags;
 	}
-	new_slave->bond = bond;
-	new_slave->dev = slave_dev;
 	/* Set the new_slave's queue_id to be zero.  Queue ID mapping
 	 * is set via sysfs or module option if desired.
 	 */
 	dev_set_mtu(slave_dev, new_slave->original_mtu);
 err_free:
-	bond_free_slave(new_slave);
+	kobject_put(&new_slave->kobj);
 err_undo_flags:
 	/* Enslave of first slave has failed and we need to fix master's mac */
 	if (!netif_is_bond_master(slave_dev))
 		slave_dev->priv_flags &= ~IFF_BONDING;
-	bond_free_slave(slave);
+	kobject_put(&slave->kobj);
 	return 0;
 }

drivers/net/bonding/bond_sysfs_slave.c+1−17

 };
 #define to_slave_attr(_at) container_of(_at, struct slave_attribute, attr)
-#define to_slave(obj)	container_of(obj, struct slave, kobj)
 static ssize_t slave_show(struct kobject *kobj,
 			  struct attribute *attr, char *buf)
 	return slave_attr->show(slave, buf);
 }
-static const struct sysfs_ops slave_sysfs_ops = {
+const struct sysfs_ops slave_sysfs_ops = {
 	.show = slave_show,
 };
-static struct kobj_type slave_ktype = {
-#ifdef CONFIG_SYSFS
-	.sysfs_ops = &slave_sysfs_ops,
-#endif
-};
 int bond_sysfs_slave_add(struct slave *slave)
 {
 	const struct slave_attribute **a;
 	int err;
-	err = kobject_init_and_add(&slave->kobj, &slave_ktype,
-				   &(slave->dev->dev.kobj), "bonding_slave");
-	if (err) {
-		kobject_put(&slave->kobj);
-		return err;
-	}
 	for (a = slave_attrs; *a; ++a) {
 		err = sysfs_create_file(&slave->kobj, &((*a)->attr));
 		if (err) {
 	for (a = slave_attrs; *a; ++a)
 		sysfs_remove_file(&slave->kobj, &((*a)->attr));
-	kobject_put(&slave->kobj);
 }

drivers/net/can/m_can/m_can.c+4−2

 	.name = KBUILD_MODNAME,
 	.tseg1_min = 2,		/* Time segment 1 = prop_seg + phase_seg1 */
 	.tseg1_max = 256,
-	.tseg2_min = 1,		/* Time segment 2 = phase_seg2 */
+	.tseg2_min = 2,		/* Time segment 2 = phase_seg2 */
 	.tseg2_max = 128,
 	.sjw_max = 128,
 	.brp_min = 1,
 						&m_can_data_bittiming_const_31X;
 		break;
 	case 32:
+	case 33:
+		/* Support both MCAN version v3.2.x and v3.3.0 */
 		m_can_dev->can.bittiming_const = m_can_dev->bit_timing ?
 			m_can_dev->bit_timing : &m_can_bittiming_const_31X;
 		INIT_WORK(&cdev->tx_work, m_can_tx_work_queue);
 		err = request_threaded_irq(dev->irq, NULL, m_can_isr,
-					   IRQF_ONESHOT | IRQF_TRIGGER_FALLING,
+					   IRQF_ONESHOT,
 					   dev->name, dev);
 	} else {
 		err = request_irq(dev->irq, m_can_isr, IRQF_SHARED, dev->name,

drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c+4−0

 	u32 freq;
 	int err;
+	if (!spi->irq)
+		return dev_err_probe(&spi->dev, -ENXIO,
+				     "No IRQ specified (maybe node \"interrupts-extended\" in DT missing)!\n");
 	rx_int = devm_gpiod_get_optional(&spi->dev, "microchip,rx-int",
 					 GPIOD_IN);
 	if (PTR_ERR(rx_int) == -EPROBE_DEFER)

drivers/net/can/usb/gs_usb.c+70−61

 };
 /* data types passed between host and device */
+/* The firmware on the original USB2CAN by Geschwister Schneider
+ * Technologie Entwicklungs- und Vertriebs UG exchanges all data
+ * between the host and the device in host byte order. This is done
+ * with the struct gs_host_config::byte_order member, which is sent
+ * first to indicate the desired byte order.
+ *
+ * The widely used open source firmware candleLight doesn't support
+ * this feature and exchanges the data in little endian byte order.
+ */
 struct gs_host_config {
-	u32 byte_order;
+	__le32 byte_order;
 } __packed;
-/* All data exchanged between host and device is exchanged in host byte order,
- * thanks to the struct gs_host_config byte_order member, which is sent first
- * to indicate the desired byte order.
- */
 struct gs_device_config {
 	u8 reserved1;
 	u8 reserved2;
 	u8 reserved3;
 	u8 icount;
-	u32 sw_version;
+	__le32 sw_version;
-	u32 hw_version;
+	__le32 hw_version;
 } __packed;
 #define GS_CAN_MODE_NORMAL               0
 #define GS_CAN_MODE_ONE_SHOT             BIT(3)
 struct gs_device_mode {
-	u32 mode;
+	__le32 mode;
-	u32 flags;
+	__le32 flags;
 } __packed;
 struct gs_device_state {
-	u32 state;
+	__le32 state;
-	u32 rxerr;
+	__le32 rxerr;
-	u32 txerr;
+	__le32 txerr;
 } __packed;
 struct gs_device_bittiming {
-	u32 prop_seg;
+	__le32 prop_seg;
-	u32 phase_seg1;
+	__le32 phase_seg1;
-	u32 phase_seg2;
+	__le32 phase_seg2;
-	u32 sjw;
+	__le32 sjw;
-	u32 brp;
+	__le32 brp;
 } __packed;
 struct gs_identify_mode {
-	u32 mode;
+	__le32 mode;
 } __packed;
 #define GS_CAN_FEATURE_LISTEN_ONLY      BIT(0)
 #define GS_CAN_FEATURE_IDENTIFY         BIT(5)
 struct gs_device_bt_const {
-	u32 feature;
+	__le32 feature;
-	u32 fclk_can;
+	__le32 fclk_can;
-	u32 tseg1_min;
+	__le32 tseg1_min;
-	u32 tseg1_max;
+	__le32 tseg1_max;
-	u32 tseg2_min;
+	__le32 tseg2_min;
-	u32 tseg2_max;
+	__le32 tseg2_max;
-	u32 sjw_max;
+	__le32 sjw_max;
-	u32 brp_min;
+	__le32 brp_min;
-	u32 brp_max;
+	__le32 brp_max;
-	u32 brp_inc;
+	__le32 brp_inc;
 } __packed;
 #define GS_CAN_FLAG_OVERFLOW 1
 struct gs_host_frame {
 	u32 echo_id;
-	u32 can_id;
+	__le32 can_id;
 	u8 can_dlc;
 	u8 channel;
 		if (!skb)
 			return;
-		cf->can_id = hf->can_id;
+		cf->can_id = le32_to_cpu(hf->can_id);
 		can_frame_set_cc_len(cf, hf->can_dlc, dev->can.ctrlmode);
 		memcpy(cf->data, hf->data, 8);
 		/* ERROR frames tell us information about the controller */
-		if (hf->can_id & CAN_ERR_FLAG)
+		if (le32_to_cpu(hf->can_id) & CAN_ERR_FLAG)
 			gs_update_state(dev, cf);
 		netdev->stats.rx_packets++;
 	if (!dbt)
 		return -ENOMEM;
-	dbt->prop_seg = bt->prop_seg;
+	dbt->prop_seg = cpu_to_le32(bt->prop_seg);
-	dbt->phase_seg1 = bt->phase_seg1;
+	dbt->phase_seg1 = cpu_to_le32(bt->phase_seg1);
-	dbt->phase_seg2 = bt->phase_seg2;
+	dbt->phase_seg2 = cpu_to_le32(bt->phase_seg2);
-	dbt->sjw = bt->sjw;
+	dbt->sjw = cpu_to_le32(bt->sjw);
-	dbt->brp = bt->brp;
+	dbt->brp = cpu_to_le32(bt->brp);
 	/* request bit timings */
 	rc = usb_control_msg(interface_to_usbdev(intf),
 	cf = (struct can_frame *)skb->data;
-	hf->can_id = cf->can_id;
+	hf->can_id = cpu_to_le32(cf->can_id);
 	hf->can_dlc = can_get_cc_dlc(cf, dev->can.ctrlmode);
 	memcpy(hf->data, cf->data, cf->len);
 	int rc, i;
 	struct gs_device_mode *dm;
 	u32 ctrlmode;
+	u32 flags = 0;
 	rc = open_candev(netdev);
 	if (rc)
 	/* flags */
 	ctrlmode = dev->can.ctrlmode;
-	dm->flags = 0;
 	if (ctrlmode & CAN_CTRLMODE_LOOPBACK)
-		dm->flags |= GS_CAN_MODE_LOOP_BACK;
+		flags |= GS_CAN_MODE_LOOP_BACK;
 	else if (ctrlmode & CAN_CTRLMODE_LISTENONLY)
-		dm->flags |= GS_CAN_MODE_LISTEN_ONLY;
+		flags |= GS_CAN_MODE_LISTEN_ONLY;
 	/* Controller is not allowed to retry TX
 	 * this mode is unavailable on atmels uc3c hardware
 	 */
 	if (ctrlmode & CAN_CTRLMODE_ONE_SHOT)
-		dm->flags |= GS_CAN_MODE_ONE_SHOT;
+		flags |= GS_CAN_MODE_ONE_SHOT;
 	if (ctrlmode & CAN_CTRLMODE_3_SAMPLES)
-		dm->flags |= GS_CAN_MODE_TRIPLE_SAMPLE;
+		flags |= GS_CAN_MODE_TRIPLE_SAMPLE;
 	/* finally start device */
-	dm->mode = GS_CAN_MODE_START;
+	dm->mode = cpu_to_le32(GS_CAN_MODE_START);
+	dm->flags = cpu_to_le32(flags);
 	rc = usb_control_msg(interface_to_usbdev(dev->iface),
 			     usb_sndctrlpipe(interface_to_usbdev(dev->iface), 0),
 			     GS_USB_BREQ_MODE,
 		return -ENOMEM;
 	if (do_identify)
-		imode->mode = GS_CAN_IDENTIFY_ON;
+		imode->mode = cpu_to_le32(GS_CAN_IDENTIFY_ON);
 	else
-		imode->mode = GS_CAN_IDENTIFY_OFF;
+		imode->mode = cpu_to_le32(GS_CAN_IDENTIFY_OFF);
 	rc = usb_control_msg(interface_to_usbdev(dev->iface),
 			     usb_sndctrlpipe(interface_to_usbdev(dev->iface),
 	struct net_device *netdev;
 	int rc;
 	struct gs_device_bt_const *bt_const;
+	u32 feature;
 	bt_const = kmalloc(sizeof(*bt_const), GFP_KERNEL);
 	if (!bt_const)
 	/* dev setup */
 	strcpy(dev->bt_const.name, "gs_usb");
-	dev->bt_const.tseg1_min = bt_const->tseg1_min;
+	dev->bt_const.tseg1_min = le32_to_cpu(bt_const->tseg1_min);
-	dev->bt_const.tseg1_max = bt_const->tseg1_max;
+	dev->bt_const.tseg1_max = le32_to_cpu(bt_const->tseg1_max);
-	dev->bt_const.tseg2_min = bt_const->tseg2_min;
+	dev->bt_const.tseg2_min = le32_to_cpu(bt_const->tseg2_min);
-	dev->bt_const.tseg2_max = bt_const->tseg2_max;
+	dev->bt_const.tseg2_max = le32_to_cpu(bt_const->tseg2_max);
-	dev->bt_const.sjw_max = bt_const->sjw_max;
+	dev->bt_const.sjw_max = le32_to_cpu(bt_const->sjw_max);
-	dev->bt_const.brp_min = bt_const->brp_min;
+	dev->bt_const.brp_min = le32_to_cpu(bt_const->brp_min);
-	dev->bt_const.brp_max = bt_const->brp_max;
+	dev->bt_const.brp_max = le32_to_cpu(bt_const->brp_max);
-	dev->bt_const.brp_inc = bt_const->brp_inc;
+	dev->bt_const.brp_inc = le32_to_cpu(bt_const->brp_inc);
 	dev->udev = interface_to_usbdev(intf);
 	dev->iface = intf;
 	/* can setup */
 	dev->can.state = CAN_STATE_STOPPED;
-	dev->can.clock.freq = bt_const->fclk_can;
+	dev->can.clock.freq = le32_to_cpu(bt_const->fclk_can);
 	dev->can.bittiming_const = &dev->bt_const;
 	dev->can.do_set_bittiming = gs_usb_set_bittiming;
 	dev->can.ctrlmode_supported = CAN_CTRLMODE_CC_LEN8_DLC;
-	if (bt_const->feature & GS_CAN_FEATURE_LISTEN_ONLY)
+	feature = le32_to_cpu(bt_const->feature);
+	if (feature & GS_CAN_FEATURE_LISTEN_ONLY)
 		dev->can.ctrlmode_supported |= CAN_CTRLMODE_LISTENONLY;
-	if (bt_const->feature & GS_CAN_FEATURE_LOOP_BACK)
+	if (feature & GS_CAN_FEATURE_LOOP_BACK)
 		dev->can.ctrlmode_supported |= CAN_CTRLMODE_LOOPBACK;
-	if (bt_const->feature & GS_CAN_FEATURE_TRIPLE_SAMPLE)
+	if (feature & GS_CAN_FEATURE_TRIPLE_SAMPLE)
 		dev->can.ctrlmode_supported |= CAN_CTRLMODE_3_SAMPLES;
-	if (bt_const->feature & GS_CAN_FEATURE_ONE_SHOT)
+	if (feature & GS_CAN_FEATURE_ONE_SHOT)
 		dev->can.ctrlmode_supported |= CAN_CTRLMODE_ONE_SHOT;
 	SET_NETDEV_DEV(netdev, &intf->dev);
-	if (dconf->sw_version > 1)
+	if (le32_to_cpu(dconf->sw_version) > 1)
-		if (bt_const->feature & GS_CAN_FEATURE_IDENTIFY)
+		if (feature & GS_CAN_FEATURE_IDENTIFY)
 			netdev->ethtool_ops = &gs_usb_ethtool_ops;
 	kfree(bt_const);
 	if (!hconf)
 		return -ENOMEM;
-	hconf->byte_order = 0x0000beef;
+	hconf->byte_order = cpu_to_le32(0x0000beef);
 	/* send host config */
 	rc = usb_control_msg(interface_to_usbdev(intf),

drivers/net/ethernet/amazon/ena/ena_eth_com.c+3−0

 {
 	struct ena_com_rx_buf_info *ena_buf = &ena_rx_ctx->ena_bufs[0];
 	struct ena_eth_io_rx_cdesc_base *cdesc = NULL;
+	u16 q_depth = io_cq->q_depth;
 	u16 cdesc_idx = 0;
 	u16 nb_hw_desc;
 	u16 i = 0;
 	do {
 		ena_buf[i].len = cdesc->length;
 		ena_buf[i].req_id = cdesc->req_id;
+		if (unlikely(ena_buf[i].req_id >= q_depth))
+			return -EIO;
 		if (++i >= nb_hw_desc)
 			break;

drivers/net/ethernet/amazon/ena/ena_netdev.c+30−50

@@ -789,24 +789,6 @@ static void ena_free_all_io_tx_resources(struct ena_adapter *adapter) · 788 unmodified lines
789	adapter->num_io_queues);	789	adapter->num_io_queues);
790	}	790	}
791		791
792	static int validate_rx_req_id(struct ena_ring *rx_ring, u16 req_id)
793	{
794	if (likely(req_id < rx_ring->ring_size))
795	return 0;
796
797	netif_err(rx_ring->adapter, rx_err, rx_ring->netdev,
798	"Invalid rx req_id: %hu\n", req_id);
799
800	u64_stats_update_begin(&rx_ring->syncp);
801	rx_ring->rx_stats.bad_req_id++;
802	u64_stats_update_end(&rx_ring->syncp);
803
804	/* Trigger device reset */
805	rx_ring->adapter->reset_reason = ENA_REGS_RESET_INV_RX_REQ_ID;
806	set_bit(ENA_FLAG_TRIGGER_RESET, &rx_ring->adapter->flags);
807	return -EFAULT;
808	}
809
810	/* ena_setup_rx_resources - allocate I/O Rx resources (Descriptors)	792	/* ena_setup_rx_resources - allocate I/O Rx resources (Descriptors)
811	* @adapter: network interface device structure	793	* @adapter: network interface device structure
812	* @qid: queue index	794	* @qid: queue index
@@ -926,10 +908,14 @@ static void ena_free_all_io_rx_resources(struct ena_adapter *adapter) · 113 unmodified lines
926	static int ena_alloc_rx_page(struct ena_ring *rx_ring,	908	static int ena_alloc_rx_page(struct ena_ring *rx_ring,
927	struct ena_rx_buffer *rx_info, gfp_t gfp)	909	struct ena_rx_buffer *rx_info, gfp_t gfp)
928	{	910	{
		911	int headroom = rx_ring->rx_headroom;
929	struct ena_com_buf *ena_buf;	912	struct ena_com_buf *ena_buf;
930	struct page *page;	913	struct page *page;
931	dma_addr_t dma;	914	dma_addr_t dma;
932		915
		916	/* restore page offset value in case it has been changed by device */
		917	rx_info->page_offset = headroom;
		918
933	/* if previous allocated page is not used */	919	/* if previous allocated page is not used */
934	if (unlikely(rx_info->page))	920	if (unlikely(rx_info->page))
935	return 0;	921	return 0;
@@ -959,10 +945,9 @@ static int ena_alloc_rx_page(struct ena_ring *rx_ring, · 23 unmodified lines
959	"Allocate page %p, rx_info %p\n", page, rx_info);	945	"Allocate page %p, rx_info %p\n", page, rx_info);
960		946
961	rx_info->page = page;	947	rx_info->page = page;
962	rx_info->page_offset = 0;
963	ena_buf = &rx_info->ena_buf;	948	ena_buf = &rx_info->ena_buf;
964	ena_buf->paddr = dma + rx_ring->rx_headroom;	949	ena_buf->paddr = dma + headroom;
965	ena_buf->len = ENA_PAGE_SIZE - rx_ring->rx_headroom;	950	ena_buf->len = ENA_PAGE_SIZE - headroom;
966		951
967	return 0;	952	return 0;
968	}	953	}
@@ -1356,15 +1341,10 @@ static struct sk_buff ena_rx_skb(struct ena_ring rx_ring, · 387 unmodified lines
1356	struct ena_rx_buffer *rx_info;	1341	struct ena_rx_buffer *rx_info;
1357	u16 len, req_id, buf = 0;	1342	u16 len, req_id, buf = 0;
1358	void *va;	1343	void *va;
1359	int rc;
1360		1344
1361	len = ena_bufs[buf].len;	1345	len = ena_bufs[buf].len;
1362	req_id = ena_bufs[buf].req_id;	1346	req_id = ena_bufs[buf].req_id;
1363		1347
1364	rc = validate_rx_req_id(rx_ring, req_id);
1365	if (unlikely(rc < 0))
1366	return NULL;
1367
1368	rx_info = &rx_ring->rx_buffer_info[req_id];	1348	rx_info = &rx_ring->rx_buffer_info[req_id];
1369		1349
1370	if (unlikely(!rx_info->page)) {	1350	if (unlikely(!rx_info->page)) {
@@ -1379,7 +1359,8 @@ static struct sk_buff ena_rx_skb(struct ena_ring rx_ring, · 8 unmodified lines
1379		1359
1380	/* save virt address of first buffer */	1360	/* save virt address of first buffer */
1381	va = page_address(rx_info->page) + rx_info->page_offset;	1361	va = page_address(rx_info->page) + rx_info->page_offset;
1382	prefetch(va + NET_IP_ALIGN);	1362
		1363	prefetch(va);
1383		1364
1384	if (len <= rx_ring->rx_copybreak) {	1365	if (len <= rx_ring->rx_copybreak) {
1385	skb = ena_alloc_skb(rx_ring, false);	1366	skb = ena_alloc_skb(rx_ring, false);
@@ -1420,8 +1401,6 @@ static struct sk_buff ena_rx_skb(struct ena_ring rx_ring, · 34 unmodified lines
1420		1401
1421	skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_info->page,	1402	skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_info->page,
1422	rx_info->page_offset, len, ENA_PAGE_SIZE);	1403	rx_info->page_offset, len, ENA_PAGE_SIZE);
1423	/* The offset is non zero only for the first buffer */
1424	rx_info->page_offset = 0;
1425		1404
1426	netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,	1405	netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1427	"RX skb updated. len %d. data_len %d\n",	1406	"RX skb updated. len %d. data_len %d\n",
@@ -1440,10 +1419,6 @@ static struct sk_buff ena_rx_skb(struct ena_ring rx_ring, · 12 unmodified lines
1440	len = ena_bufs[buf].len;	1419	len = ena_bufs[buf].len;
1441	req_id = ena_bufs[buf].req_id;	1420	req_id = ena_bufs[buf].req_id;
1442		1421
1443	rc = validate_rx_req_id(rx_ring, req_id);
1444	if (unlikely(rc < 0))
1445	return NULL;
1446
1447	rx_info = &rx_ring->rx_buffer_info[req_id];	1422	rx_info = &rx_ring->rx_buffer_info[req_id];
1448	} while (1);	1423	} while (1);
1449		1424
@@ -1544,8 +1519,7 @@ static int ena_xdp_handle_buff(struct ena_ring rx_ring, struct xdp_buff xdp) · 94 unmodified lines
1544	int ret;	1519	int ret;
1545		1520
1546	rx_info = &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id];	1521	rx_info = &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id];
1547	xdp->data = page_address(rx_info->page) +	1522	xdp->data = page_address(rx_info->page) + rx_info->page_offset;
1548	rx_info->page_offset + rx_ring->rx_headroom;
1549	xdp_set_data_meta_invalid(xdp);	1523	xdp_set_data_meta_invalid(xdp);
1550	xdp->data_hard_start = page_address(rx_info->page);	1524	xdp->data_hard_start = page_address(rx_info->page);
1551	xdp->data_end = xdp->data + rx_ring->ena_bufs[0].len;	1525	xdp->data_end = xdp->data + rx_ring->ena_bufs[0].len;
@@ -1612,8 +1586,9 @@ static int ena_clean_rx_irq(struct ena_ring rx_ring, struct napi_struct napi, · 60 unmodified lines
1612	if (unlikely(ena_rx_ctx.descs == 0))	1586	if (unlikely(ena_rx_ctx.descs == 0))
1613	break;	1587	break;
1614		1588
		1589	/* First descriptor might have an offset set by the device */
1615	rx_info = &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id];	1590	rx_info = &rx_ring->rx_buffer_info[rx_ring->ena_bufs[0].req_id];
1616	rx_info->page_offset = ena_rx_ctx.pkt_offset;	1591	rx_info->page_offset += ena_rx_ctx.pkt_offset;
1617		1592
1618	netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,	1593	netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1619	"rx_poll: q %d got packet from ena. descs #: %d l3 proto %d l4 proto %d hash: %x\n",	1594	"rx_poll: q %d got packet from ena. descs #: %d l3 proto %d l4 proto %d hash: %x\n",
@@ -1697,12 +1672,18 @@ static int ena_clean_rx_irq(struct ena_ring rx_ring, struct napi_struct napi, · 77 unmodified lines
1697	error:	1672	error:
1698	adapter = netdev_priv(rx_ring->netdev);	1673	adapter = netdev_priv(rx_ring->netdev);
1699		1674
1700	u64_stats_update_begin(&rx_ring->syncp);	1675	if (rc == -ENOSPC) {
1701	rx_ring->rx_stats.bad_desc_num++;	1676	u64_stats_update_begin(&rx_ring->syncp);
1702	u64_stats_update_end(&rx_ring->syncp);	1677	rx_ring->rx_stats.bad_desc_num++;
		1678	u64_stats_update_end(&rx_ring->syncp);
		1679	adapter->reset_reason = ENA_REGS_RESET_TOO_MANY_RX_DESCS;
		1680	} else {
		1681	u64_stats_update_begin(&rx_ring->syncp);
		1682	rx_ring->rx_stats.bad_req_id++;
		1683	u64_stats_update_end(&rx_ring->syncp);
		1684	adapter->reset_reason = ENA_REGS_RESET_INV_RX_REQ_ID;
		1685	}
1703		1686
1704	/* Too many desc from the device. Trigger reset */
1705	adapter->reset_reason = ENA_REGS_RESET_TOO_MANY_RX_DESCS;
1706	set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);	1687	set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
1707		1688
1708	return 0;	1689	return 0;
@@ -3388,16 +3369,9 @@ static int ena_device_init(struct ena_com_dev ena_dev, struct pci_dev pdev, · 1679 unmodified lines
3388	goto err_mmio_read_less;	3369	goto err_mmio_read_less;
3389	}	3370	}
3390		3371
3391	rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(dma_width));	3372	rc = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(dma_width));
3392	if (rc) {	3373	if (rc) {
3393	dev_err(dev, "pci_set_dma_mask failed 0x%x\n", rc);	3374	dev_err(dev, "dma_set_mask_and_coherent failed %d\n", rc);
3394	goto err_mmio_read_less;
3395	}
3396
3397	rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(dma_width));
3398	if (rc) {
3399	dev_err(dev, "err_pci_set_consistent_dma_mask failed 0x%x\n",
3400	rc);
3401	goto err_mmio_read_less;	3375	goto err_mmio_read_less;
3402	}	3376	}
3403		3377
@@ -4167,6 +4141,12 @@ static int ena_probe(struct pci_dev pdev, const struct pci_device_id ent) · 763 unmodified lines
4167	return rc;	4141	return rc;
4168	}	4142	}
4169		4143
		4144	rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(ENA_MAX_PHYS_ADDR_SIZE_BITS));
		4145	if (rc) {
		4146	dev_err(&pdev->dev, "dma_set_mask_and_coherent failed %d\n", rc);
		4147	goto err_disable_device;
		4148	}
		4149
4170	pci_set_master(pdev);	4150	pci_set_master(pdev);
4171		4151
4172	ena_dev = vzalloc(sizeof(*ena_dev));	4152	ena_dev = vzalloc(sizeof(*ena_dev));

drivers/net/ethernet/aquantia/atlantic/aq_ring.c+52−74

 					      buff->rxdata.pg_off,
 					      buff->len, DMA_FROM_DEVICE);
-		/* for single fragment packets use build_skb() */
+		skb = napi_alloc_skb(napi, AQ_CFG_RX_HDR_SIZE);
-		if (buff->is_eop &&
+		if (unlikely(!skb)) {
-		    buff->len <= AQ_CFG_RX_FRAME_MAX - AQ_SKB_ALIGN) {
+			u64_stats_update_begin(&self->stats.rx.syncp);
-			skb = build_skb(aq_buf_vaddr(&buff->rxdata),
+			self->stats.rx.skb_alloc_fails++;
+			u64_stats_update_end(&self->stats.rx.syncp);
+			err = -ENOMEM;
+			goto err_exit;
+		}
+		if (is_ptp_ring)
+			buff->len -=
+				aq_ptp_extract_ts(self->aq_nic, skb,
+						  aq_buf_vaddr(&buff->rxdata),
+						  buff->len);
+		hdr_len = buff->len;
+		if (hdr_len > AQ_CFG_RX_HDR_SIZE)
+			hdr_len = eth_get_headlen(skb->dev,
+						  aq_buf_vaddr(&buff->rxdata),
+						  AQ_CFG_RX_HDR_SIZE);
+		memcpy(__skb_put(skb, hdr_len), aq_buf_vaddr(&buff->rxdata),
+		       ALIGN(hdr_len, sizeof(long)));
+		if (buff->len - hdr_len > 0) {
+			skb_add_rx_frag(skb, 0, buff->rxdata.page,
+					buff->rxdata.pg_off + hdr_len,
+					buff->len - hdr_len,
 					AQ_CFG_RX_FRAME_MAX);
-			if (unlikely(!skb)) {
-				u64_stats_update_begin(&self->stats.rx.syncp);
-				self->stats.rx.skb_alloc_fails++;
-				u64_stats_update_end(&self->stats.rx.syncp);
-				err = -ENOMEM;
-				goto err_exit;
-			}
-			if (is_ptp_ring)
-				buff->len -=
-					aq_ptp_extract_ts(self->aq_nic, skb,
-						aq_buf_vaddr(&buff->rxdata),
-						buff->len);
-			skb_put(skb, buff->len);
 			page_ref_inc(buff->rxdata.page);
-		} else {
+		}
-			skb = napi_alloc_skb(napi, AQ_CFG_RX_HDR_SIZE);
-			if (unlikely(!skb)) {
-				u64_stats_update_begin(&self->stats.rx.syncp);
-				self->stats.rx.skb_alloc_fails++;
-				u64_stats_update_end(&self->stats.rx.syncp);
-				err = -ENOMEM;
-				goto err_exit;
-			}
-			if (is_ptp_ring)
-				buff->len -=
-					aq_ptp_extract_ts(self->aq_nic, skb,
-						aq_buf_vaddr(&buff->rxdata),
-						buff->len);
-			hdr_len = buff->len;
-			if (hdr_len > AQ_CFG_RX_HDR_SIZE)
-				hdr_len = eth_get_headlen(skb->dev,
-							  aq_buf_vaddr(&buff->rxdata),
-							  AQ_CFG_RX_HDR_SIZE);
-			memcpy(__skb_put(skb, hdr_len), aq_buf_vaddr(&buff->rxdata),
-			       ALIGN(hdr_len, sizeof(long)));
-			if (buff->len - hdr_len > 0) {
-				skb_add_rx_frag(skb, 0, buff->rxdata.page,
-						buff->rxdata.pg_off + hdr_len,
-						buff->len - hdr_len,
-						AQ_CFG_RX_FRAME_MAX);
-				page_ref_inc(buff->rxdata.page);
-			}
-			if (!buff->is_eop) {
+		if (!buff->is_eop) {
-				buff_ = buff;
+			buff_ = buff;
-				i = 1U;
+			i = 1U;
-				do {
+			do {
-					next_ = buff_->next,
+				next_ = buff_->next;
-					buff_ = &self->buff_ring[next_];
+				buff_ = &self->buff_ring[next_];
-					dma_sync_single_range_for_cpu(
+				dma_sync_single_range_for_cpu(aq_nic_get_dev(self->aq_nic),
-							aq_nic_get_dev(self->aq_nic),
+							      buff_->rxdata.daddr,
-							buff_->rxdata.daddr,
+							      buff_->rxdata.pg_off,
-							buff_->rxdata.pg_off,
+							      buff_->len,
-							buff_->len,
+							      DMA_FROM_DEVICE);
-							DMA_FROM_DEVICE);
+				skb_add_rx_frag(skb, i++,
-					skb_add_rx_frag(skb, i++,
+						buff_->rxdata.page,
-							buff_->rxdata.page,
+						buff_->rxdata.pg_off,
-							buff_->rxdata.pg_off,
+						buff_->len,
-							buff_->len,
+						AQ_CFG_RX_FRAME_MAX);
-							AQ_CFG_RX_FRAME_MAX);
+				page_ref_inc(buff_->rxdata.page);
-					page_ref_inc(buff_->rxdata.page);
+				buff_->is_cleaned = 1;
-					buff_->is_cleaned = 1;
-					buff->is_ip_cso &= buff_->is_ip_cso;
-					buff->is_udp_cso &= buff_->is_udp_cso;
-					buff->is_tcp_cso &= buff_->is_tcp_cso;
-					buff->is_cso_err |= buff_->is_cso_err;
-				} while (!buff_->is_eop);
+				buff->is_ip_cso &= buff_->is_ip_cso;
-			}
+				buff->is_udp_cso &= buff_->is_udp_cso;
+				buff->is_tcp_cso &= buff_->is_tcp_cso;
+				buff->is_cso_err |= buff_->is_cso_err;
+			} while (!buff_->is_eop);
 		}
 		if (buff->is_vlan)

drivers/net/ethernet/broadcom/bnxt/bnxt.c+3−1

 	if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)) != 0 &&
 	    dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)) != 0) {
 		dev_err(&pdev->dev, "System does not support DMA, aborting\n");
-		goto init_err_disable;
+		rc = -EIO;
+		goto init_err_release;
 	}
 	pci_set_master(pdev);
 				create_singlethread_workqueue("bnxt_pf_wq");
 			if (!bnxt_pf_wq) {
 				dev_err(&pdev->dev, "Unable to create workqueue.\n");
+				rc = -ENOMEM;
 				goto init_err_pci_clean;
 			}
 		}

drivers/net/ethernet/chelsio/Kconfig+1−1

@@ -68,7 +68,7 @@ config CHELSIO_T3 · 67 unmodified lines
68		68
69	config CHELSIO_T4	69	config CHELSIO_T4
70	tristate "Chelsio Communications T4/T5/T6 Ethernet support"	70	tristate "Chelsio Communications T4/T5/T6 Ethernet support"
71	depends on PCI && (IPV6 \|\| IPV6=n)	71	depends on PCI && (IPV6 \|\| IPV6=n) && (TLS \|\| TLS=n)
72	select FW_LOADER	72	select FW_LOADER
73	select MDIO	73	select MDIO
74	select ZLIB_DEFLATE	74	select ZLIB_DEFLATE

drivers/net/ethernet/chelsio/cxgb4/cxgb4_filter.c+2−1

 		 FW_FILTER_WR_OVLAN_VLD_V(f->fs.val.ovlan_vld) |
 		 FW_FILTER_WR_IVLAN_VLDM_V(f->fs.mask.ivlan_vld) |
 		 FW_FILTER_WR_OVLAN_VLDM_V(f->fs.mask.ovlan_vld));
-	fwr->smac_sel = f->smt->idx;
+	if (f->fs.newsmac)
+		fwr->smac_sel = f->smt->idx;
 	fwr->rx_chan_rx_rpl_iq =
 		htons(FW_FILTER_WR_RX_CHAN_V(0) |
 		      FW_FILTER_WR_RX_RPL_IQ_V(adapter->sge.fw_evtq.abs_id));

drivers/net/ethernet/chelsio/inline_crypto/ch_ktls/chcr_ktls.c+3−1

 		/* need to wait for hw response, can't free tx_info yet. */
 		if (tx_info->open_state == CH_KTLS_OPEN_PENDING)
 			tx_info->pending_close = true;
-		/* free the lock after the cleanup */
+		else
+			spin_unlock_bh(&tx_info->lock);
+		/* if in pending close, free the lock after the cleanup */
 		goto put_module;
 	}
 	spin_unlock_bh(&tx_info->lock);

drivers/net/ethernet/freescale/dpaa2/Kconfig+2−0

 	depends on FSL_MC_BUS && FSL_MC_DPIO
 	select PHYLINK
 	select PCS_LYNX
+	select FSL_XGMAC_MDIO
+	select NET_DEVLINK
 	help
 	  This is the DPAA2 Ethernet driver supporting Freescale SoCs
 	  with DPAA2 (DataPath Acceleration Architecture v2).

drivers/net/ethernet/freescale/enetc/enetc_qos.c+2−12

@@ -92,18 +92,8 @@ static int enetc_setup_taprio(struct net_device *ndev, · 91 unmodified lines
92	gcl_config->atc = 0xff;	92	gcl_config->atc = 0xff;
93	gcl_config->acl_len = cpu_to_le16(gcl_len);	93	gcl_config->acl_len = cpu_to_le16(gcl_len);
94		94
95	if (!admin_conf->base_time) {	95	gcl_data->btl = cpu_to_le32(lower_32_bits(admin_conf->base_time));
96	gcl_data->btl =	96	gcl_data->bth = cpu_to_le32(upper_32_bits(admin_conf->base_time));
97	cpu_to_le32(enetc_rd(&priv->si->hw, ENETC_SICTR0));
98	gcl_data->bth =
99	cpu_to_le32(enetc_rd(&priv->si->hw, ENETC_SICTR1));
100	} else {
101	gcl_data->btl =
102	cpu_to_le32(lower_32_bits(admin_conf->base_time));
103	gcl_data->bth =
104	cpu_to_le32(upper_32_bits(admin_conf->base_time));
105	}
106
107	gcl_data->ct = cpu_to_le32(admin_conf->cycle_time);	97	gcl_data->ct = cpu_to_le32(admin_conf->cycle_time);
108	gcl_data->cte = cpu_to_le32(admin_conf->cycle_time_extension);	98	gcl_data->cte = cpu_to_le32(admin_conf->cycle_time_extension);
109		99

drivers/net/ethernet/ibm/ibmvnic.c+20−3

 	for (i = 0; i < adapter->req_rx_queues; i++)
 		napi_schedule(&adapter->napi[i]);
-	if (adapter->reset_reason != VNIC_RESET_FAILOVER)
+	if (adapter->reset_reason == VNIC_RESET_FAILOVER ||
+	    adapter->reset_reason == VNIC_RESET_MOBILITY) {
 		call_netdevice_notifiers(NETDEV_NOTIFY_PEERS, netdev);
+		call_netdevice_notifiers(NETDEV_RESEND_IGMP, netdev);
+	}
 	rc = 0;
 	if (rc)
 		return IBMVNIC_OPEN_FAILED;
+	call_netdevice_notifiers(NETDEV_NOTIFY_PEERS, netdev);
+	call_netdevice_notifiers(NETDEV_RESEND_IGMP, netdev);
 	return 0;
 }
 		if (!saved_state) {
 			reset_state = adapter->state;
-			adapter->state = VNIC_RESETTING;
 			saved_state = true;
 		}
 		spin_unlock_irqrestore(&adapter->state_lock, flags);
 {
 	struct ibmvnic_adapter *adapter = netdev_priv(dev);
+	if (test_bit(0, &adapter->resetting)) {
+		netdev_err(adapter->netdev,
+			   "Adapter is resetting, skip timeout reset\n");
+		return;
+	}
 	ibmvnic_reset(adapter, VNIC_RESET_TIMEOUT);
 }
 {
 	int i, rc;
+	if (!adapter->tx_scrq || !adapter->rx_scrq)
+		return -EINVAL;
 	for (i = 0; i < adapter->req_tx_queues; i++) {
 		netdev_dbg(adapter->netdev, "Re-setting tx_scrq[%d]\n", i);
 		rc = reset_one_sub_crq_queue(adapter, adapter->tx_scrq[i]);
 	} while (rc == H_BUSY || H_IS_LONG_BUSY(rc));
 	/* Clean out the queue */
+	if (!crq->msgs)
+		return -EINVAL;
 	memset(crq->msgs, 0, PAGE_SIZE);
 	crq->cur = 0;
 	crq->active = false;
 	unsigned long flags;
 	spin_lock_irqsave(&adapter->state_lock, flags);
-	if (adapter->state == VNIC_RESETTING) {
+	if (test_bit(0, &adapter->resetting)) {
 		spin_unlock_irqrestore(&adapter->state_lock, flags);
 		return -EBUSY;
 	}

drivers/net/ethernet/ibm/ibmvnic.h+1−2

@@ -943,8 +943,7 @@ enum vnic_state {VNIC_PROBING = 1, · 942 unmodified lines
943	VNIC_CLOSING,	943	VNIC_CLOSING,
944	VNIC_CLOSED,	944	VNIC_CLOSED,
945	VNIC_REMOVING,	945	VNIC_REMOVING,
946	VNIC_REMOVED,	946	VNIC_REMOVED};
947	VNIC_RESETTING};
948		947
949	enum ibmvnic_reset_reason {VNIC_RESET_FAILOVER = 1,	948	enum ibmvnic_reset_reason {VNIC_RESET_FAILOVER = 1,
950	VNIC_RESET_MOBILITY,	949	VNIC_RESET_MOBILITY,

drivers/net/ethernet/intel/i40e/i40e.h+1−0

@@ -140,6 +140,7 @@ enum i40e_state_t { · 139 unmodified lines
140	__I40E_CLIENT_RESET,	140	__I40E_CLIENT_RESET,
141	__I40E_VIRTCHNL_OP_PENDING,	141	__I40E_VIRTCHNL_OP_PENDING,
142	__I40E_RECOVERY_MODE,	142	__I40E_RECOVERY_MODE,
		143	__I40E_VF_RESETS_DISABLED, /* disable resets during i40e_remove */
143	/* This must be last as it determines the size of the BITMAP */	144	/* This must be last as it determines the size of the BITMAP */
144	__I40E_STATE_SIZE__,	145	__I40E_STATE_SIZE__,
145	};	146	};

drivers/net/ethernet/intel/i40e/i40e_main.c+15−7

 	}
 	if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
-		ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
+		/* disable any further VFLR event notifications */
-		set_bit(__I40E_VFLR_EVENT_PENDING, pf->state);
+		if (test_bit(__I40E_VF_RESETS_DISABLED, pf->state)) {
+			u32 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
+			reg &= ~I40E_PFINT_ICR0_VFLR_MASK;
+			wr32(hw, I40E_PFINT_ICR0_ENA, reg);
+		} else {
+			ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
+			set_bit(__I40E_VFLR_EVENT_PENDING, pf->state);
+		}
 	}
 	if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
 	while (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
 		usleep_range(1000, 2000);
+	if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
+		set_bit(__I40E_VF_RESETS_DISABLED, pf->state);
+		i40e_free_vfs(pf);
+		pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
+	}
 	/* no more scheduling of any task */
 	set_bit(__I40E_SUSPENDED, pf->state);
 	set_bit(__I40E_DOWN, pf->state);
 	 */
 	i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
-	if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
-		i40e_free_vfs(pf);
-		pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
-	}
 	i40e_fdir_teardown(pf);
 	/* If there is a switch structure or any orphans, remove them.

drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c+15−11

  * @vf: pointer to the VF structure
  * @flr: VFLR was issued or not
  *
- * Returns true if the VF is reset, false otherwise.
+ * Returns true if the VF is in reset, resets successfully, or resets
+ * are disabled and false otherwise.
  **/
 bool i40e_reset_vf(struct i40e_vf *vf, bool flr)
 {
 	u32 reg;
 	int i;
+	if (test_bit(__I40E_VF_RESETS_DISABLED, pf->state))
+		return true;
 	/* If the VFs have been disabled, this means something else is
 	 * resetting the VF, so we shouldn't continue.
 	 */
 	if (test_and_set_bit(__I40E_VF_DISABLE, pf->state))
-		return false;
+		return true;
 	i40e_trigger_vf_reset(vf, flr);
 	i40e_notify_client_of_vf_enable(pf, 0);
+	/* Disable IOV before freeing resources. This lets any VF drivers
+	 * running in the host get themselves cleaned up before we yank
+	 * the carpet out from underneath their feet.
+	 */
+	if (!pci_vfs_assigned(pf->pdev))
+		pci_disable_sriov(pf->pdev);
+	else
+		dev_warn(&pf->pdev->dev, "VFs are assigned - not disabling SR-IOV\n");
 	/* Amortize wait time by stopping all VFs at the same time */
 	for (i = 0; i < pf->num_alloc_vfs; i++) {
 		if (test_bit(I40E_VF_STATE_INIT, &pf->vf[i].vf_states))
 		i40e_vsi_wait_queues_disabled(pf->vsi[pf->vf[i].lan_vsi_idx]);
 	}
-	/* Disable IOV before freeing resources. This lets any VF drivers
-	 * running in the host get themselves cleaned up before we yank
-	 * the carpet out from underneath their feet.
-	 */
-	if (!pci_vfs_assigned(pf->pdev))
-		pci_disable_sriov(pf->pdev);
-	else
-		dev_warn(&pf->pdev->dev, "VFs are assigned - not disabling SR-IOV\n");
 	/* free up VF resources */
 	tmp = pf->num_alloc_vfs;
 	pf->num_alloc_vfs = 0;

drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c+1−1

 	.pcs_get_adv_lp = dwmac4_get_adv_lp,
 	.debug = dwmac4_debug,
 	.set_filter = dwmac4_set_filter,
-	.flex_pps_config = dwmac5_flex_pps_config,
 	.set_mac_loopback = dwmac4_set_mac_loopback,
 	.update_vlan_hash = dwmac4_update_vlan_hash,
 	.sarc_configure = dwmac4_sarc_configure,
 	.pcs_get_adv_lp = dwmac4_get_adv_lp,
 	.debug = dwmac4_debug,
 	.set_filter = dwmac4_set_filter,
+	.flex_pps_config = dwmac5_flex_pps_config,
 	.set_mac_loopback = dwmac4_set_mac_loopback,
 	.update_vlan_hash = dwmac4_update_vlan_hash,
 	.sarc_configure = dwmac4_sarc_configure,

drivers/net/tun.c+11−3

@@ -1921,12 +1921,15 @@ static ssize_t tun_chr_write_iter(struct kiocb iocb, struct iov_iter from) · 1920 unmodified lines
1921	struct tun_file *tfile = file->private_data;	1921	struct tun_file *tfile = file->private_data;
1922	struct tun_struct *tun = tun_get(tfile);	1922	struct tun_struct *tun = tun_get(tfile);
1923	ssize_t result;	1923	ssize_t result;
		1924	int noblock = 0;
1924		1925
1925	if (!tun)	1926	if (!tun)
1926	return -EBADFD;	1927	return -EBADFD;
1927		1928
1928	result = tun_get_user(tun, tfile, NULL, from,	1929	if ((file->f_flags & O_NONBLOCK) \|\| (iocb->ki_flags & IOCB_NOWAIT))
1929	file->f_flags & O_NONBLOCK, false);	1930	noblock = 1;
		1931
		1932	result = tun_get_user(tun, tfile, NULL, from, noblock, false);
1930		1933
1931	tun_put(tun);	1934	tun_put(tun);
1932	return result;	1935	return result;
@@ -2137,10 +2140,15 @@ static ssize_t tun_chr_read_iter(struct kiocb iocb, struct iov_iter to) · 204 unmodified lines
2137	struct tun_file *tfile = file->private_data;	2140	struct tun_file *tfile = file->private_data;
2138	struct tun_struct *tun = tun_get(tfile);	2141	struct tun_struct *tun = tun_get(tfile);
2139	ssize_t len = iov_iter_count(to), ret;	2142	ssize_t len = iov_iter_count(to), ret;
		2143	int noblock = 0;
2140		2144
2141	if (!tun)	2145	if (!tun)
2142	return -EBADFD;	2146	return -EBADFD;
2143	ret = tun_do_read(tun, tfile, to, file->f_flags & O_NONBLOCK, NULL);	2147
		2148	if ((file->f_flags & O_NONBLOCK) \|\| (iocb->ki_flags & IOCB_NOWAIT))
		2149	noblock = 1;
		2150
		2151	ret = tun_do_read(tun, tfile, to, noblock, NULL);
2144	ret = min_t(ssize_t, ret, len);	2152	ret = min_t(ssize_t, ret, len);
2145	if (ret > 0)	2153	if (ret > 0)
2146	iocb->ki_pos = ret;	2154	iocb->ki_pos = ret;

drivers/net/usb/ipheth.c+1−1

@@ -59,7 +59,7 @@ · 58 unmodified lines
59	#define IPHETH_USBINTF_SUBCLASS 253	59	#define IPHETH_USBINTF_SUBCLASS 253
60	#define IPHETH_USBINTF_PROTO 1	60	#define IPHETH_USBINTF_PROTO 1
61		61
62	#define IPHETH_BUF_SIZE 1516	62	#define IPHETH_BUF_SIZE 1514
63	#define IPHETH_IP_ALIGN 2 /* padding at front of URB */	63	#define IPHETH_IP_ALIGN 2 /* padding at front of URB */
64	#define IPHETH_TX_TIMEOUT (5 * HZ)	64	#define IPHETH_TX_TIMEOUT (5 * HZ)
65		65

drivers/net/wireless/intel/iwlwifi/fw/api/sta.h+5−5

  *
  * GPL LICENSE SUMMARY
  *
- * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
- * Copyright(c) 2018 - 2019 Intel Corporation
+ * Copyright(c) 2012-2014, 2018 - 2020 Intel Corporation
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of version 2 of the GNU General Public License as
  *
  * BSD LICENSE
  *
- * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
- * Copyright(c) 2018 - 2019 Intel Corporation
+ * Copyright(c) 2012-2014, 2018 - 2020 Intel Corporation
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
 	STA_FLG_MAX_AGG_SIZE_256K	= (5 << STA_FLG_MAX_AGG_SIZE_SHIFT),
 	STA_FLG_MAX_AGG_SIZE_512K	= (6 << STA_FLG_MAX_AGG_SIZE_SHIFT),
 	STA_FLG_MAX_AGG_SIZE_1024K	= (7 << STA_FLG_MAX_AGG_SIZE_SHIFT),
-	STA_FLG_MAX_AGG_SIZE_MSK	= (7 << STA_FLG_MAX_AGG_SIZE_SHIFT),
+	STA_FLG_MAX_AGG_SIZE_2M		= (8 << STA_FLG_MAX_AGG_SIZE_SHIFT),
+	STA_FLG_MAX_AGG_SIZE_4M		= (9 << STA_FLG_MAX_AGG_SIZE_SHIFT),
+	STA_FLG_MAX_AGG_SIZE_MSK	= (0xf << STA_FLG_MAX_AGG_SIZE_SHIFT),
 	STA_FLG_AGG_MPDU_DENS_SHIFT	= 23,
 	STA_FLG_AGG_MPDU_DENS_2US	= (4 << STA_FLG_AGG_MPDU_DENS_SHIFT),

drivers/net/wireless/intel/iwlwifi/fw/api/time-event.h+5−3

  * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
- * Copyright(c) 2018 - 2019 Intel Corporation
+ * Copyright(c) 2018 - 2020 Intel Corporation
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of version 2 of the GNU General Public License as
  * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
- * Copyright(c) 2018 - 2019 Intel Corporation
+ * Copyright(c) 2018 - 2020 Intel Corporation
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
  *	able to run the GO Negotiation. Will not be fragmented and not
  *	repetitive. Valid only on the P2P Device MAC. Only the duration will
  *	be taken into account.
+ * @SESSION_PROTECT_CONF_MAX_ID: not used
  */
 enum iwl_mvm_session_prot_conf_id {
 	SESSION_PROTECT_CONF_ASSOC,
 	SESSION_PROTECT_CONF_GO_CLIENT_ASSOC,
 	SESSION_PROTECT_CONF_P2P_DEVICE_DISCOV,
 	SESSION_PROTECT_CONF_P2P_GO_NEGOTIATION,
+	SESSION_PROTECT_CONF_MAX_ID,
 }; /* SESSION_PROTECTION_CONF_ID_E_VER_1 */
 /**
  * @mac_id: the mac id for which the session protection started / ended
  * @status: 1 means success, 0 means failure
  * @start: 1 means the session protection started, 0 means it ended
- * @conf_id: the configuration id of the session that started / eneded
+ * @conf_id: see &enum iwl_mvm_session_prot_conf_id
  *
  * Note that any session protection will always get two notifications: start
  * and end even the firmware could not schedule it.

drivers/net/wireless/intel/iwlwifi/iwl-csr.h+10−0

@@ -147,6 +147,16 @@ · 146 unmodified lines
147	#define CSR_MAC_SHADOW_REG_CTL2 (CSR_BASE + 0x0AC)	147	#define CSR_MAC_SHADOW_REG_CTL2 (CSR_BASE + 0x0AC)
148	#define CSR_MAC_SHADOW_REG_CTL2_RX_WAKE 0xFFFF	148	#define CSR_MAC_SHADOW_REG_CTL2_RX_WAKE 0xFFFF
149		149
		150	/* LTR control (since IWL_DEVICE_FAMILY_22000) */
		151	#define CSR_LTR_LONG_VAL_AD (CSR_BASE + 0x0D4)
		152	#define CSR_LTR_LONG_VAL_AD_NO_SNOOP_REQ 0x80000000
		153	#define CSR_LTR_LONG_VAL_AD_NO_SNOOP_SCALE 0x1c000000
		154	#define CSR_LTR_LONG_VAL_AD_NO_SNOOP_VAL 0x03ff0000
		155	#define CSR_LTR_LONG_VAL_AD_SNOOP_REQ 0x00008000
		156	#define CSR_LTR_LONG_VAL_AD_SNOOP_SCALE 0x00001c00
		157	#define CSR_LTR_LONG_VAL_AD_SNOOP_VAL 0x000003ff
		158	#define CSR_LTR_LONG_VAL_AD_SCALE_USEC 2
		159
150	/* GIO Chicken Bits (PCI Express bus link power management) */	160	/* GIO Chicken Bits (PCI Express bus link power management) */
151	#define CSR_GIO_CHICKEN_BITS (CSR_BASE+0x100)	161	#define CSR_GIO_CHICKEN_BITS (CSR_BASE+0x100)
152		162

drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c+4−1

 	/* this would be a mac80211 bug ... but don't crash */
 	if (WARN_ON_ONCE(!mvmvif->phy_ctxt))
-		return -EINVAL;
+		return test_bit(IWL_MVM_STATUS_HW_RESTART_REQUESTED, &mvm->status) ? 0 : -EINVAL;
 	/*
 	 * If we are in a STA removal flow and in DQA mode:
 			goto out_unlock;
 		}
+		if (vif->type == NL80211_IFTYPE_STATION)
+			vif->bss_conf.he_support = sta->he_cap.has_he;
 		if (sta->tdls &&
 		    (vif->p2p ||
 		     iwl_mvm_tdls_sta_count(mvm, NULL) ==

drivers/net/wireless/intel/iwlwifi/mvm/sta.c+18−0

@@ -196,6 +196,7 @@ int iwl_mvm_sta_send_to_fw(struct iwl_mvm mvm, struct ieee80211_sta sta, · 195 unmodified lines
196	mpdu_dens = sta->ht_cap.ampdu_density;	196	mpdu_dens = sta->ht_cap.ampdu_density;
197	}	197	}
198		198
		199
199	if (sta->vht_cap.vht_supported) {	200	if (sta->vht_cap.vht_supported) {
200	agg_size = sta->vht_cap.cap &	201	agg_size = sta->vht_cap.cap &
201	IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK;	202	IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK;
@@ -205,6 +206,23 @@ int iwl_mvm_sta_send_to_fw(struct iwl_mvm mvm, struct ieee80211_sta sta, · 3 unmodified lines
205	agg_size = sta->ht_cap.ampdu_factor;	206	agg_size = sta->ht_cap.ampdu_factor;
206	}	207	}
207		208
		209	/* D6.0 10.12.2 A-MPDU length limit rules
		210	* A STA indicates the maximum length of the A-MPDU preEOF padding
		211	* that it can receive in an HE PPDU in the Maximum A-MPDU Length
		212	* Exponent field in its HT Capabilities, VHT Capabilities,
		213	* and HE 6 GHz Band Capabilities elements (if present) and the
		214	* Maximum AMPDU Length Exponent Extension field in its HE
		215	* Capabilities element
		216	*/
		217	if (sta->he_cap.has_he)
		218	agg_size += u8_get_bits(sta->he_cap.he_cap_elem.mac_cap_info[3],
		219	IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_MASK);
		220
		221	/* Limit to max A-MPDU supported by FW */
		222	if (agg_size > (STA_FLG_MAX_AGG_SIZE_4M >> STA_FLG_MAX_AGG_SIZE_SHIFT))
		223	agg_size = (STA_FLG_MAX_AGG_SIZE_4M >>
		224	STA_FLG_MAX_AGG_SIZE_SHIFT);
		225
208	add_sta_cmd.station_flags \|=	226	add_sta_cmd.station_flags \|=
209	cpu_to_le32(agg_size << STA_FLG_MAX_AGG_SIZE_SHIFT);	227	cpu_to_le32(agg_size << STA_FLG_MAX_AGG_SIZE_SHIFT);
210	add_sta_cmd.station_flags \|=	228	add_sta_cmd.station_flags \|=

drivers/net/wireless/intel/iwlwifi/mvm/time-event.c+69−34

@@ -641,11 +641,32 @@ void iwl_mvm_protect_session(struct iwl_mvm *mvm, · 640 unmodified lines
641	}	641	}
642	}	642	}
643		643
		644	static void iwl_mvm_cancel_session_protection(struct iwl_mvm *mvm,
		645	struct iwl_mvm_vif *mvmvif)
		646	{
		647	struct iwl_mvm_session_prot_cmd cmd = {
		648	.id_and_color =
		649	cpu_to_le32(FW_CMD_ID_AND_COLOR(mvmvif->id,
		650	mvmvif->color)),
		651	.action = cpu_to_le32(FW_CTXT_ACTION_REMOVE),
		652	.conf_id = cpu_to_le32(mvmvif->time_event_data.id),
		653	};
		654	int ret;
		655
		656	ret = iwl_mvm_send_cmd_pdu(mvm, iwl_cmd_id(SESSION_PROTECTION_CMD,
		657	MAC_CONF_GROUP, 0),
		658	0, sizeof(cmd), &cmd);
		659	if (ret)
		660	IWL_ERR(mvm,
		661	"Couldn't send the SESSION_PROTECTION_CMD: %d\n", ret);
		662	}
		663
644	static bool __iwl_mvm_remove_time_event(struct iwl_mvm *mvm,	664	static bool __iwl_mvm_remove_time_event(struct iwl_mvm *mvm,
645	struct iwl_mvm_time_event_data *te_data,	665	struct iwl_mvm_time_event_data *te_data,
646	u32 *uid)	666	u32 *uid)
647	{	667	{
648	u32 id;	668	u32 id;
		669	struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(te_data->vif);
649		670
650	/*	671	/*
651	* It is possible that by the time we got to this point the time	672	* It is possible that by the time we got to this point the time
@@ -663,14 +684,29 @@ static bool __iwl_mvm_remove_time_event(struct iwl_mvm *mvm, · 11 unmodified lines
663	iwl_mvm_te_clear_data(mvm, te_data);	684	iwl_mvm_te_clear_data(mvm, te_data);
664	spin_unlock_bh(&mvm->time_event_lock);	685	spin_unlock_bh(&mvm->time_event_lock);
665		686
666	/*	687	/* When session protection is supported, the te_data->id field
667	* It is possible that by the time we try to remove it, the time event	688	* is reused to save session protection's configuration.
668	* has already ended and removed. In such a case there is no need to
669	* send a removal command.
670	*/	689	*/
671	if (id == TE_MAX) {	690	if (fw_has_capa(&mvm->fw->ucode_capa,
672	IWL_DEBUG_TE(mvm, "TE 0x%x has already ended\n", *uid);	691	IWL_UCODE_TLV_CAPA_SESSION_PROT_CMD)) {
		692	if (mvmvif && id < SESSION_PROTECT_CONF_MAX_ID) {
		693	/* Session protection is still ongoing. Cancel it */
		694	iwl_mvm_cancel_session_protection(mvm, mvmvif);
		695	if (te_data->vif->type == NL80211_IFTYPE_P2P_DEVICE) {
		696	set_bit(IWL_MVM_STATUS_NEED_FLUSH_P2P, &mvm->status);
		697	iwl_mvm_roc_finished(mvm);
		698	}
		699	}
673	return false;	700	return false;
		701	} else {
		702	/* It is possible that by the time we try to remove it, the
		703	* time event has already ended and removed. In such a case
		704	* there is no need to send a removal command.
		705	*/
		706	if (id == TE_MAX) {
		707	IWL_DEBUG_TE(mvm, "TE 0x%x has already ended\n", *uid);
		708	return false;
		709	}
674	}	710	}
675		711
676	return true;	712	return true;
@@ -771,6 +807,7 @@ void iwl_mvm_rx_session_protect_notif(struct iwl_mvm *mvm, · 94 unmodified lines
771	struct iwl_rx_packet *pkt = rxb_addr(rxb);	807	struct iwl_rx_packet *pkt = rxb_addr(rxb);
772	struct iwl_mvm_session_prot_notif notif = (void )pkt->data;	808	struct iwl_mvm_session_prot_notif notif = (void )pkt->data;
773	struct ieee80211_vif *vif;	809	struct ieee80211_vif *vif;
		810	struct iwl_mvm_vif *mvmvif;
774		811
775	rcu_read_lock();	812	rcu_read_lock();
776	vif = iwl_mvm_rcu_dereference_vif_id(mvm, le32_to_cpu(notif->mac_id),	813	vif = iwl_mvm_rcu_dereference_vif_id(mvm, le32_to_cpu(notif->mac_id),
@@ -779,9 +816,10 @@ void iwl_mvm_rx_session_protect_notif(struct iwl_mvm *mvm, · 2 unmodified lines
779	if (!vif)	816	if (!vif)
780	goto out_unlock;	817	goto out_unlock;
781		818
		819	mvmvif = iwl_mvm_vif_from_mac80211(vif);
		820
782	/* The vif is not a P2P_DEVICE, maintain its time_event_data */	821	/* The vif is not a P2P_DEVICE, maintain its time_event_data */
783	if (vif->type != NL80211_IFTYPE_P2P_DEVICE) {	822	if (vif->type != NL80211_IFTYPE_P2P_DEVICE) {
784	struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
785	struct iwl_mvm_time_event_data *te_data =	823	struct iwl_mvm_time_event_data *te_data =
786	&mvmvif->time_event_data;	824	&mvmvif->time_event_data;
787		825
@@ -816,10 +854,14 @@ void iwl_mvm_rx_session_protect_notif(struct iwl_mvm *mvm, · 28 unmodified lines
816		854
817	if (!le32_to_cpu(notif->status) \|\| !le32_to_cpu(notif->start)) {	855	if (!le32_to_cpu(notif->status) \|\| !le32_to_cpu(notif->start)) {
818	/* End TE, notify mac80211 */	856	/* End TE, notify mac80211 */
		857	mvmvif->time_event_data.id = SESSION_PROTECT_CONF_MAX_ID;
819	ieee80211_remain_on_channel_expired(mvm->hw);	858	ieee80211_remain_on_channel_expired(mvm->hw);
820	set_bit(IWL_MVM_STATUS_NEED_FLUSH_P2P, &mvm->status);	859	set_bit(IWL_MVM_STATUS_NEED_FLUSH_P2P, &mvm->status);
821	iwl_mvm_roc_finished(mvm);	860	iwl_mvm_roc_finished(mvm);
822	} else if (le32_to_cpu(notif->start)) {	861	} else if (le32_to_cpu(notif->start)) {
		862	if (WARN_ON(mvmvif->time_event_data.id !=
		863	le32_to_cpu(notif->conf_id)))
		864	goto out_unlock;
823	set_bit(IWL_MVM_STATUS_ROC_RUNNING, &mvm->status);	865	set_bit(IWL_MVM_STATUS_ROC_RUNNING, &mvm->status);
824	ieee80211_ready_on_channel(mvm->hw); /* Start TE */	866	ieee80211_ready_on_channel(mvm->hw); /* Start TE */
825	}	867	}
@@ -845,20 +887,24 @@ iwl_mvm_start_p2p_roc_session_protection(struct iwl_mvm *mvm, · 19 unmodified lines
845		887
846	lockdep_assert_held(&mvm->mutex);	888	lockdep_assert_held(&mvm->mutex);
847		889
		890	/* The time_event_data.id field is reused to save session
		891	* protection's configuration.
		892	*/
848	switch (type) {	893	switch (type) {
849	case IEEE80211_ROC_TYPE_NORMAL:	894	case IEEE80211_ROC_TYPE_NORMAL:
850	cmd.conf_id =	895	mvmvif->time_event_data.id =
851	cpu_to_le32(SESSION_PROTECT_CONF_P2P_DEVICE_DISCOV);	896	SESSION_PROTECT_CONF_P2P_DEVICE_DISCOV;
852	break;	897	break;
853	case IEEE80211_ROC_TYPE_MGMT_TX:	898	case IEEE80211_ROC_TYPE_MGMT_TX:
854	cmd.conf_id =	899	mvmvif->time_event_data.id =
855	cpu_to_le32(SESSION_PROTECT_CONF_P2P_GO_NEGOTIATION);	900	SESSION_PROTECT_CONF_P2P_GO_NEGOTIATION;
856	break;	901	break;
857	default:	902	default:
858	WARN_ONCE(1, "Got an invalid ROC type\n");	903	WARN_ONCE(1, "Got an invalid ROC type\n");
859	return -EINVAL;	904	return -EINVAL;
860	}	905	}
861		906
		907	cmd.conf_id = cpu_to_le32(mvmvif->time_event_data.id);
862	return iwl_mvm_send_cmd_pdu(mvm, iwl_cmd_id(SESSION_PROTECTION_CMD,	908	return iwl_mvm_send_cmd_pdu(mvm, iwl_cmd_id(SESSION_PROTECTION_CMD,
863	MAC_CONF_GROUP, 0),	909	MAC_CONF_GROUP, 0),
864	0, sizeof(cmd), &cmd);	910	0, sizeof(cmd), &cmd);
@@ -960,25 +1006,6 @@ void iwl_mvm_cleanup_roc_te(struct iwl_mvm *mvm) · 95 unmodified lines
960	__iwl_mvm_remove_time_event(mvm, te_data, &uid);	1006	__iwl_mvm_remove_time_event(mvm, te_data, &uid);
961	}	1007	}
962		1008
963	static void iwl_mvm_cancel_session_protection(struct iwl_mvm *mvm,
964	struct iwl_mvm_vif *mvmvif)
965	{
966	struct iwl_mvm_session_prot_cmd cmd = {
967	.id_and_color =
968	cpu_to_le32(FW_CMD_ID_AND_COLOR(mvmvif->id,
969	mvmvif->color)),
970	.action = cpu_to_le32(FW_CTXT_ACTION_REMOVE),
971	};
972	int ret;
973
974	ret = iwl_mvm_send_cmd_pdu(mvm, iwl_cmd_id(SESSION_PROTECTION_CMD,
975	MAC_CONF_GROUP, 0),
976	0, sizeof(cmd), &cmd);
977	if (ret)
978	IWL_ERR(mvm,
979	"Couldn't send the SESSION_PROTECTION_CMD: %d\n", ret);
980	}
981
982	void iwl_mvm_stop_roc(struct iwl_mvm mvm, struct ieee80211_vif vif)	1009	void iwl_mvm_stop_roc(struct iwl_mvm mvm, struct ieee80211_vif vif)
983	{	1010	{
984	struct iwl_mvm_vif *mvmvif;	1011	struct iwl_mvm_vif *mvmvif;
@@ -988,10 +1015,13 @@ void iwl_mvm_stop_roc(struct iwl_mvm mvm, struct ieee80211_vif vif) · 3 unmodified lines
988	IWL_UCODE_TLV_CAPA_SESSION_PROT_CMD)) {	1015	IWL_UCODE_TLV_CAPA_SESSION_PROT_CMD)) {
989	mvmvif = iwl_mvm_vif_from_mac80211(vif);	1016	mvmvif = iwl_mvm_vif_from_mac80211(vif);
990		1017
991	iwl_mvm_cancel_session_protection(mvm, mvmvif);	1018	if (vif->type == NL80211_IFTYPE_P2P_DEVICE) {
992		1019	iwl_mvm_cancel_session_protection(mvm, mvmvif);
993	if (vif->type == NL80211_IFTYPE_P2P_DEVICE)
994	set_bit(IWL_MVM_STATUS_NEED_FLUSH_P2P, &mvm->status);	1020	set_bit(IWL_MVM_STATUS_NEED_FLUSH_P2P, &mvm->status);
		1021	} else {
		1022	iwl_mvm_remove_aux_roc_te(mvm, mvmvif,
		1023	&mvmvif->time_event_data);
		1024	}
995		1025
996	iwl_mvm_roc_finished(mvm);	1026	iwl_mvm_roc_finished(mvm);
997		1027
@@ -1126,10 +1156,15 @@ void iwl_mvm_schedule_session_protection(struct iwl_mvm *mvm, · 128 unmodified lines
1126	cpu_to_le32(FW_CMD_ID_AND_COLOR(mvmvif->id,	1156	cpu_to_le32(FW_CMD_ID_AND_COLOR(mvmvif->id,
1127	mvmvif->color)),	1157	mvmvif->color)),
1128	.action = cpu_to_le32(FW_CTXT_ACTION_ADD),	1158	.action = cpu_to_le32(FW_CTXT_ACTION_ADD),
1129	.conf_id = cpu_to_le32(SESSION_PROTECT_CONF_ASSOC),
1130	.duration_tu = cpu_to_le32(MSEC_TO_TU(duration)),	1159	.duration_tu = cpu_to_le32(MSEC_TO_TU(duration)),
1131	};	1160	};
1132		1161
		1162	/* The time_event_data.id field is reused to save session
		1163	* protection's configuration.
		1164	*/
		1165	mvmvif->time_event_data.id = SESSION_PROTECT_CONF_ASSOC;
		1166	cmd.conf_id = cpu_to_le32(mvmvif->time_event_data.id);
		1167
1133	lockdep_assert_held(&mvm->mutex);	1168	lockdep_assert_held(&mvm->mutex);
1134		1169
1135	spin_lock_bh(&mvm->time_event_lock);	1170	spin_lock_bh(&mvm->time_event_lock);

drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info-gen3.c+20−0

@@ -252,6 +252,26 @@ int iwl_pcie_ctxt_info_gen3_init(struct iwl_trans *trans, · 251 unmodified lines
252		252
253	iwl_set_bit(trans, CSR_CTXT_INFO_BOOT_CTRL,	253	iwl_set_bit(trans, CSR_CTXT_INFO_BOOT_CTRL,
254	CSR_AUTO_FUNC_BOOT_ENA);	254	CSR_AUTO_FUNC_BOOT_ENA);
		255
		256	if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_AX210) {
		257	/*
		258	* The firmware initializes this again later (to a smaller
		259	* value), but for the boot process initialize the LTR to
		260	* ~250 usec.
		261	*/
		262	u32 val = CSR_LTR_LONG_VAL_AD_NO_SNOOP_REQ \|
		263	u32_encode_bits(CSR_LTR_LONG_VAL_AD_SCALE_USEC,
		264	CSR_LTR_LONG_VAL_AD_NO_SNOOP_SCALE) \|
		265	u32_encode_bits(250,
		266	CSR_LTR_LONG_VAL_AD_NO_SNOOP_VAL) \|
		267	CSR_LTR_LONG_VAL_AD_SNOOP_REQ \|
		268	u32_encode_bits(CSR_LTR_LONG_VAL_AD_SCALE_USEC,
		269	CSR_LTR_LONG_VAL_AD_SNOOP_SCALE) \|
		270	u32_encode_bits(250, CSR_LTR_LONG_VAL_AD_SNOOP_VAL);
		271
		272	iwl_write32(trans, CSR_LTR_LONG_VAL_AD, val);
		273	}
		274
255	if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210)	275	if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210)
256	iwl_write_umac_prph(trans, UREG_CPU_INIT_RUN, 1);	276	iwl_write_umac_prph(trans, UREG_CPU_INIT_RUN, 1);
257	else	277	else

drivers/net/wireless/intel/iwlwifi/pcie/trans.c+27−9

@@ -2156,18 +2156,36 @@ static int iwl_trans_pcie_read_mem(struct iwl_trans *trans, u32 addr, · 2155 unmodified lines
2156	void *buf, int dwords)	2156	void *buf, int dwords)
2157	{	2157	{
2158	unsigned long flags;	2158	unsigned long flags;
2159	int offs, ret = 0;	2159	int offs = 0;
2160	u32 *vals = buf;	2160	u32 *vals = buf;
2161		2161
2162	if (iwl_trans_grab_nic_access(trans, &flags)) {	2162	while (offs < dwords) {
2163	iwl_write32(trans, HBUS_TARG_MEM_RADDR, addr);	2163	/* limit the time we spin here under lock to 1/2s */
2164	for (offs = 0; offs < dwords; offs++)	2164	ktime_t timeout = ktime_add_us(ktime_get(), 500 * USEC_PER_MSEC);
2165	vals[offs] = iwl_read32(trans, HBUS_TARG_MEM_RDAT);	2165
2166	iwl_trans_release_nic_access(trans, &flags);	2166	if (iwl_trans_grab_nic_access(trans, &flags)) {
2167	} else {	2167	iwl_write32(trans, HBUS_TARG_MEM_RADDR,
2168	ret = -EBUSY;	2168	addr + 4 * offs);
		2169
		2170	while (offs < dwords) {
		2171	vals[offs] = iwl_read32(trans,
		2172	HBUS_TARG_MEM_RDAT);
		2173	offs++;
		2174
		2175	/* calling ktime_get is expensive so
		2176	* do it once in 128 reads
		2177	*/
		2178	if (offs % 128 == 0 && ktime_after(ktime_get(),
		2179	timeout))
		2180	break;
		2181	}
		2182	iwl_trans_release_nic_access(trans, &flags);
		2183	} else {
		2184	return -EBUSY;
		2185	}
2169	}	2186	}
2170	return ret;	2187
		2188	return 0;
2171	}	2189	}
2172		2190
2173	static int iwl_trans_pcie_write_mem(struct iwl_trans *trans, u32 addr,	2191	static int iwl_trans_pcie_write_mem(struct iwl_trans *trans, u32 addr,

drivers/net/wireless/realtek/rtw88/fw.c+1−1

@@ -1482,7 +1482,7 @@ static bool rtw_fw_dump_check_size(struct rtw_dev *rtwdev, · 1481 unmodified lines
1482	int rtw_fw_dump_fifo(struct rtw_dev *rtwdev, u8 fifo_sel, u32 addr, u32 size,	1482	int rtw_fw_dump_fifo(struct rtw_dev *rtwdev, u8 fifo_sel, u32 addr, u32 size,
1483	u32 *buffer)	1483	u32 *buffer)
1484	{	1484	{
1485	if (!rtwdev->chip->fw_fifo_addr) {	1485	if (!rtwdev->chip->fw_fifo_addr[0]) {
1486	rtw_dbg(rtwdev, RTW_DBG_FW, "chip not support dump fw fifo\n");	1486	rtw_dbg(rtwdev, RTW_DBG_FW, "chip not support dump fw fifo\n");
1487	return -ENOTSUPP;	1487	return -ENOTSUPP;
1488	}	1488	}

drivers/nfc/s3fwrn5/i2c.c+2−2

@@ -25,8 +25,8 @@ struct s3fwrn5_i2c_phy { · 24 unmodified lines
25	struct i2c_client *i2c_dev;	25	struct i2c_client *i2c_dev;
26	struct nci_dev *ndev;	26	struct nci_dev *ndev;
27		27
28	unsigned int gpio_en;	28	int gpio_en;
29	unsigned int gpio_fw_wake;	29	int gpio_fw_wake;
30		30
31	struct mutex mutex;	31	struct mutex mutex;
32		32

drivers/nvme/host/core.c+18−7

 static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi,
 				struct nvme_effects_log **log)
 {
-	struct nvme_cel *cel = xa_load(&ctrl->cels, csi);
+	struct nvme_effects_log	*cel = xa_load(&ctrl->cels, csi);
 	int ret;
 	if (cel)
 		return -ENOMEM;
 	ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi,
-			&cel->log, sizeof(cel->log), 0);
+			cel, sizeof(*cel), 0);
 	if (ret) {
 		kfree(cel);
 		return ret;
 	}
-	cel->csi = csi;
+	xa_store(&ctrl->cels, csi, cel, GFP_KERNEL);
-	xa_store(&ctrl->cels, cel->csi, cel, GFP_KERNEL);
 out:
-	*log = &cel->log;
+	*log = cel;
 	return 0;
 }
 }
 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
+static void nvme_free_cels(struct nvme_ctrl *ctrl)
+{
+	struct nvme_effects_log	*cel;
+	unsigned long i;
+	xa_for_each (&ctrl->cels, i, cel) {
+		xa_erase(&ctrl->cels, i);
+		kfree(cel);
+	}
+	xa_destroy(&ctrl->cels);
+}
 static void nvme_free_ctrl(struct device *dev)
 {
 	struct nvme_ctrl *ctrl =
 	if (!subsys || ctrl->instance != subsys->instance)
 		ida_simple_remove(&nvme_instance_ida, ctrl->instance);
-	xa_destroy(&ctrl->cels);
+	nvme_free_cels(ctrl);
 	nvme_mpath_uninit(ctrl);
 	__free_page(ctrl->discard_page);

drivers/nvme/host/nvme.h+0−6

 #endif
 };
-struct nvme_cel {
-	struct list_head	entry;
-	struct nvme_effects_log	log;
-	u8			csi;
-};
 struct nvme_ctrl {
 	bool comp_seen;
 	enum nvme_ctrl_state state;

drivers/nvme/host/pci.c+15−0

 	nvmeq->dbbuf_cq_ei = &dev->dbbuf_eis[cq_idx(qid, dev->db_stride)];
 }
+static void nvme_dbbuf_free(struct nvme_queue *nvmeq)
+{
+	if (!nvmeq->qid)
+		return;
+	nvmeq->dbbuf_sq_db = NULL;
+	nvmeq->dbbuf_cq_db = NULL;
+	nvmeq->dbbuf_sq_ei = NULL;
+	nvmeq->dbbuf_cq_ei = NULL;
+}
 static void nvme_dbbuf_set(struct nvme_dev *dev)
 {
 	struct nvme_command c;
+	unsigned int i;
 	if (!dev->dbbuf_dbs)
 		return;
 		dev_warn(dev->ctrl.device, "unable to set dbbuf\n");
 		/* Free memory and continue on */
 		nvme_dbbuf_dma_free(dev);
+		for (i = 1; i <= dev->online_queues; i++)
+			nvme_dbbuf_free(&dev->queues[i]);
 	}
 }

drivers/platform/x86/acer-wmi.c+1−0

@@ -111,6 +111,7 @@ static const struct key_entry acer_wmi_keymap[] __initconst = { · 110 unmodified lines
111	{KE_KEY, 0x64, {KEY_SWITCHVIDEOMODE} }, /* Display Switch */	111	{KE_KEY, 0x64, {KEY_SWITCHVIDEOMODE} }, /* Display Switch */
112	{KE_IGNORE, 0x81, {KEY_SLEEP} },	112	{KE_IGNORE, 0x81, {KEY_SLEEP} },
113	{KE_KEY, 0x82, {KEY_TOUCHPAD_TOGGLE} }, /* Touch Pad Toggle */	113	{KE_KEY, 0x82, {KEY_TOUCHPAD_TOGGLE} }, /* Touch Pad Toggle */
		114	{KE_IGNORE, 0x84, {KEY_KBDILLUMTOGGLE} }, /* Automatic Keyboard background light toggle */
114	{KE_KEY, KEY_TOUCHPAD_ON, {KEY_TOUCHPAD_ON} },	115	{KE_KEY, KEY_TOUCHPAD_ON, {KEY_TOUCHPAD_ON} },
115	{KE_KEY, KEY_TOUCHPAD_OFF, {KEY_TOUCHPAD_OFF} },	116	{KE_KEY, KEY_TOUCHPAD_OFF, {KEY_TOUCHPAD_OFF} },
116	{KE_IGNORE, 0x83, {KEY_TOUCHPAD_TOGGLE} },	117	{KE_IGNORE, 0x83, {KEY_TOUCHPAD_TOGGLE} },

drivers/platform/x86/intel-vbtn.c+6−0

 			DMI_MATCH(DMI_PRODUCT_NAME, "HP Stream x360 Convertible PC 11"),
 		},
 	},
+	{
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion 13 x360 PC"),
+		},
+	},
 	{} /* Array terminator */
 };

drivers/platform/x86/thinkpad_acpi.c+12−1

 		in_tablet_mode = hotkey_gmms_get_tablet_mode(res,
 							     &has_tablet_mode);
-		if (has_tablet_mode)
+		/*
+		 * The Yoga 11e series has 2 accelerometers described by a
+		 * BOSC0200 ACPI node. This setup relies on a Windows service
+		 * which calls special ACPI methods on this node to report
+		 * the laptop/tent/tablet mode to the EC. The bmc150 iio driver
+		 * does not support this, so skip the hotkey on these models.
+		 */
+		if (has_tablet_mode && !acpi_dev_present("BOSC0200", "1", -1))
 			tp_features.hotkey_tablet = TP_HOTKEY_TABLET_USES_GMMS;
 		type = "GMMS";
 	} else if (acpi_evalf(hkey_handle, &res, "MHKG", "qd")) {
 		pr_err("error while attempting to reset the event firmware interface\n");
 	tpacpi_send_radiosw_update();
+	tpacpi_input_send_tabletsw();
 	hotkey_tablet_mode_notify_change();
 	hotkey_wakeup_reason_notify_change();
 	hotkey_wakeup_hotunplug_complete_notify_change();
 	TPACPI_Q_LNV3('N', '2', 'C', TPACPI_FAN_2CTL),	/* P52 / P72 */
 	TPACPI_Q_LNV3('N', '2', 'E', TPACPI_FAN_2CTL),	/* P1 / X1 Extreme (1st gen) */
 	TPACPI_Q_LNV3('N', '2', 'O', TPACPI_FAN_2CTL),	/* P1 / X1 Extreme (2nd gen) */
+	TPACPI_Q_LNV3('N', '2', 'V', TPACPI_FAN_2CTL),	/* P1 / X1 Extreme (3nd gen) */
+	TPACPI_Q_LNV3('N', '3', '0', TPACPI_FAN_2CTL),	/* P15 (1st gen) / P15v (1st gen) */
 };
 static int __init fan_init(struct ibm_init_struct *iibm)
 	TPACPI_Q_LNV3('R', '0', 'B', true), /* Thinkpad 11e gen 3 */
 	TPACPI_Q_LNV3('R', '0', 'C', true), /* Thinkpad 13 */
 	TPACPI_Q_LNV3('R', '0', 'J', true), /* Thinkpad 13 gen 2 */
+	TPACPI_Q_LNV3('R', '0', 'K', true), /* Thinkpad 11e gen 4 celeron BIOS */
 };
 static int __init tpacpi_battery_init(struct ibm_init_struct *ibm)

drivers/platform/x86/toshiba_acpi.c+1−2

 	struct toshiba_acpi_dev *dev = PDE_DATA(file_inode(file));
 	char *buffer;
 	char *cmd;
-	int lcd_out, crt_out, tv_out;
+	int lcd_out = -1, crt_out = -1, tv_out = -1;
 	int remain = count;
 	int value;
 	int ret;
 	kfree(cmd);
-	lcd_out = crt_out = tv_out = -1;
 	ret = get_video_status(dev, &video_out);
 	if (!ret) {
 		unsigned int new_video_out = video_out;

drivers/platform/x86/touchscreen_dmi.c+50−0

@@ -295,6 +295,21 @@ static const struct ts_dmi_data irbis_tw90_data = { · 294 unmodified lines
295	.properties = irbis_tw90_props,	295	.properties = irbis_tw90_props,
296	};	296	};
297		297
		298	static const struct property_entry irbis_tw118_props[] = {
		299	PROPERTY_ENTRY_U32("touchscreen-min-x", 20),
		300	PROPERTY_ENTRY_U32("touchscreen-min-y", 30),
		301	PROPERTY_ENTRY_U32("touchscreen-size-x", 1960),
		302	PROPERTY_ENTRY_U32("touchscreen-size-y", 1510),
		303	PROPERTY_ENTRY_STRING("firmware-name", "gsl1680-irbis-tw118.fw"),
		304	PROPERTY_ENTRY_U32("silead,max-fingers", 10),
		305	{ }
		306	};
		307
		308	static const struct ts_dmi_data irbis_tw118_data = {
		309	.acpi_name = "MSSL1680:00",
		310	.properties = irbis_tw118_props,
		311	};
		312
298	static const struct property_entry itworks_tw891_props[] = {	313	static const struct property_entry itworks_tw891_props[] = {
299	PROPERTY_ENTRY_U32("touchscreen-min-x", 1),	314	PROPERTY_ENTRY_U32("touchscreen-min-x", 1),
300	PROPERTY_ENTRY_U32("touchscreen-min-y", 5),	315	PROPERTY_ENTRY_U32("touchscreen-min-y", 5),
@@ -623,6 +638,23 @@ static const struct ts_dmi_data pov_mobii_wintab_p1006w_v10_data = { · 322 unmodified lines
623	.properties = pov_mobii_wintab_p1006w_v10_props,	638	.properties = pov_mobii_wintab_p1006w_v10_props,
624	};	639	};
625		640
		641	static const struct property_entry predia_basic_props[] = {
		642	PROPERTY_ENTRY_U32("touchscreen-min-x", 3),
		643	PROPERTY_ENTRY_U32("touchscreen-min-y", 10),
		644	PROPERTY_ENTRY_U32("touchscreen-size-x", 1728),
		645	PROPERTY_ENTRY_U32("touchscreen-size-y", 1144),
		646	PROPERTY_ENTRY_BOOL("touchscreen-swapped-x-y"),
		647	PROPERTY_ENTRY_STRING("firmware-name", "gsl3680-predia-basic.fw"),
		648	PROPERTY_ENTRY_U32("silead,max-fingers", 10),
		649	PROPERTY_ENTRY_BOOL("silead,home-button"),
		650	{ }
		651	};
		652
		653	static const struct ts_dmi_data predia_basic_data = {
		654	.acpi_name = "MSSL1680:00",
		655	.properties = predia_basic_props,
		656	};
		657
626	static const struct property_entry schneider_sct101ctm_props[] = {	658	static const struct property_entry schneider_sct101ctm_props[] = {
627	PROPERTY_ENTRY_U32("touchscreen-size-x", 1715),	659	PROPERTY_ENTRY_U32("touchscreen-size-x", 1715),
628	PROPERTY_ENTRY_U32("touchscreen-size-y", 1140),	660	PROPERTY_ENTRY_U32("touchscreen-size-y", 1140),
@@ -936,6 +968,14 @@ const struct dmi_system_id touchscreen_dmi_table[] = { · 307 unmodified lines
936	DMI_MATCH(DMI_PRODUCT_NAME, "TW90"),	968	DMI_MATCH(DMI_PRODUCT_NAME, "TW90"),
937	},	969	},
938	},	970	},
		971	{
		972	/* Irbis TW118 */
		973	.driver_data = (void *)&irbis_tw118_data,
		974	.matches = {
		975	DMI_MATCH(DMI_SYS_VENDOR, "IRBIS"),
		976	DMI_MATCH(DMI_PRODUCT_NAME, "TW118"),
		977	},
		978	},
939	{	979	{
940	/* I.T.Works TW891 */	980	/* I.T.Works TW891 */
941	.driver_data = (void *)&itworks_tw891_data,	981	.driver_data = (void *)&itworks_tw891_data,
@@ -1109,6 +1149,16 @@ const struct dmi_system_id touchscreen_dmi_table[] = { · 167 unmodified lines
1109	DMI_MATCH(DMI_BIOS_DATE, "10/24/2014"),	1149	DMI_MATCH(DMI_BIOS_DATE, "10/24/2014"),
1110	},	1150	},
1111	},	1151	},
		1152	{
		1153	/* Predia Basic tablet) */
		1154	.driver_data = (void *)&predia_basic_data,
		1155	.matches = {
		1156	DMI_MATCH(DMI_SYS_VENDOR, "Insyde"),
		1157	DMI_MATCH(DMI_PRODUCT_NAME, "CherryTrail"),
		1158	/* Above matches are too generic, add bios-version match */
		1159	DMI_MATCH(DMI_BIOS_VERSION, "Mx.WT107.KUBNGEA"),
		1160	},
		1161	},
1112	{	1162	{
1113	/* Point of View mobii wintab p800w (v2.1) */	1163	/* Point of View mobii wintab p800w (v2.1) */
1114	.driver_data = (void *)&pov_mobii_wintab_p800w_v21_data,	1164	.driver_data = (void *)&pov_mobii_wintab_p800w_v21_data,

drivers/ptp/ptp_clockmatrix.c+16−33

@@ -103,43 +103,26 @@ static int timespec_to_char_array(struct timespec64 const *ts, · 102 unmodified lines
103	return 0;	103	return 0;
104	}	104	}
105		105
106	static int idtcm_strverscmp(const char ver1, const char ver2)	106	static int idtcm_strverscmp(const char version1, const char version2)
107	{	107	{
108	u8 num1;	108	u8 ver1[3], ver2[3];
109	u8 num2;	109	int i;
110	int result = 0;
111
112	/* loop through each level of the version string */
113	while (result == 0) {
114	/* extract leading version numbers */
115	if (kstrtou8(ver1, 10, &num1) < 0)
116	return -1;
117		110
118	if (kstrtou8(ver2, 10, &num2) < 0)	111	if (sscanf(version1, "%hhu.%hhu.%hhu",
119	return -1;	112	&ver1[0], &ver1[1], &ver1[2]) != 3)
		113	return -1;
		114	if (sscanf(version2, "%hhu.%hhu.%hhu",
		115	&ver2[0], &ver2[1], &ver2[2]) != 3)
		116	return -1;
120		117
121	/* if numbers differ, then set the result */	118	for (i = 0; i < 3; i++) {
122	if (num1 < num2)	119	if (ver1[i] > ver2[i])
123	result = -1;	120	return 1;
124	else if (num1 > num2)	121	if (ver1[i] < ver2[i])
125	result = 1;	122	return -1;
126	else {
127	/* if numbers are the same, go to next level */
128	ver1 = strchr(ver1, '.');
129	ver2 = strchr(ver2, '.');
130	if (!ver1 && !ver2)
131	break;
132	else if (!ver1)
133	result = -1;
134	else if (!ver2)
135	result = 1;
136	else {
137	ver1++;
138	ver2++;
139	}
140	}
141	}	123	}
142	return result;	124
		125	return 0;
143	}	126	}
144		127
145	static int idtcm_xfer_read(struct idtcm *idtcm,	128	static int idtcm_xfer_read(struct idtcm *idtcm,

drivers/s390/block/dasd.c+6−0

 	if (!block)
 		return -EINVAL;
+	/*
+	 * If the request is an ERP request there is nothing to requeue.
+	 * This will be done with the remaining original request.
+	 */
+	if (cqr->refers)
+		return 0;
 	spin_lock_irq(&cqr->dq->lock);
 	req = (struct request *) cqr->callback_data;
 	blk_mq_requeue_request(req, false);

drivers/s390/net/qeth_core.h+6−3

 	QETH_QDIO_BUF_EMPTY,
 	/* Filled by driver; owned by hardware in order to be sent. */
 	QETH_QDIO_BUF_PRIMED,
-	/* Identified to be pending in TPQ. */
+	/* Discovered by the TX completion code: */
 	QETH_QDIO_BUF_PENDING,
-	/* Found in completion queue. */
+	/* Finished by the TX completion code: */
-	QETH_QDIO_BUF_IN_CQ,
+	QETH_QDIO_BUF_NEED_QAOB,
+	/* Received QAOB notification on CQ: */
+	QETH_QDIO_BUF_QAOB_OK,
+	QETH_QDIO_BUF_QAOB_ERROR,
 	/* Handled via transfer pending / completion queue. */
 	QETH_QDIO_BUF_HANDLED_DELAYED,
 };

drivers/s390/net/qeth_core_main.c+54−28

@@ -33,6 +33,7 @@ · 32 unmodified lines
33		33
34	#include <net/iucv/af_iucv.h>	34	#include <net/iucv/af_iucv.h>
35	#include <net/dsfield.h>	35	#include <net/dsfield.h>
		36	#include <net/sock.h>
36		37
37	#include <asm/ebcdic.h>	38	#include <asm/ebcdic.h>
38	#include <asm/chpid.h>	39	#include <asm/chpid.h>
@@ -499,17 +500,12 @@ static void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q, int bidx, · 460 unmodified lines
499		500
500	}	501	}
501	}	502	}
502	if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
503	QETH_QDIO_BUF_HANDLED_DELAYED)) {
504	/* for recovery situations */
505	qeth_init_qdio_out_buf(q, bidx);
506	QETH_CARD_TEXT(q->card, 2, "clprecov");
507	}
508	}	503	}
509		504
510	static void qeth_qdio_handle_aob(struct qeth_card *card,	505	static void qeth_qdio_handle_aob(struct qeth_card *card,
511	unsigned long phys_aob_addr)	506	unsigned long phys_aob_addr)
512	{	507	{
		508	enum qeth_qdio_out_buffer_state new_state = QETH_QDIO_BUF_QAOB_OK;
513	struct qaob *aob;	509	struct qaob *aob;
514	struct qeth_qdio_out_buffer *buffer;	510	struct qeth_qdio_out_buffer *buffer;
515	enum iucv_tx_notify notification;	511	enum iucv_tx_notify notification;
@@ -521,22 +517,6 @@ static void qeth_qdio_handle_aob(struct qeth_card *card, · 5 unmodified lines
521	buffer = (struct qeth_qdio_out_buffer *) aob->user1;	517	buffer = (struct qeth_qdio_out_buffer *) aob->user1;
522	QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);	518	QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
523		519
524	if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
525	QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
526	notification = TX_NOTIFY_OK;
527	} else {
528	WARN_ON_ONCE(atomic_read(&buffer->state) !=
529	QETH_QDIO_BUF_PENDING);
530	atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
531	notification = TX_NOTIFY_DELAYED_OK;
532	}
533
534	if (aob->aorc != 0) {
535	QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
536	notification = qeth_compute_cq_notification(aob->aorc, 1);
537	}
538	qeth_notify_skbs(buffer->q, buffer, notification);
539
540	/* Free dangling allocations. The attached skbs are handled by	520	/* Free dangling allocations. The attached skbs are handled by
541	* qeth_cleanup_handled_pending().	521	* qeth_cleanup_handled_pending().
542	*/	522	*/
@@ -548,7 +528,33 @@ static void qeth_qdio_handle_aob(struct qeth_card *card, · 5 unmodified lines
548	if (data && buffer->is_header[i])	528	if (data && buffer->is_header[i])
549	kmem_cache_free(qeth_core_header_cache, data);	529	kmem_cache_free(qeth_core_header_cache, data);
550	}	530	}
551	atomic_set(&buffer->state, QETH_QDIO_BUF_HANDLED_DELAYED);	531
		532	if (aob->aorc) {
		533	QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
		534	new_state = QETH_QDIO_BUF_QAOB_ERROR;
		535	}
		536
		537	switch (atomic_xchg(&buffer->state, new_state)) {
		538	case QETH_QDIO_BUF_PRIMED:
		539	/* Faster than TX completion code. */
		540	notification = qeth_compute_cq_notification(aob->aorc, 0);
		541	qeth_notify_skbs(buffer->q, buffer, notification);
		542	atomic_set(&buffer->state, QETH_QDIO_BUF_HANDLED_DELAYED);
		543	break;
		544	case QETH_QDIO_BUF_PENDING:
		545	/* TX completion code is active and will handle the async
		546	* completion for us.
		547	*/
		548	break;
		549	case QETH_QDIO_BUF_NEED_QAOB:
		550	/* TX completion code is already finished. */
		551	notification = qeth_compute_cq_notification(aob->aorc, 1);
		552	qeth_notify_skbs(buffer->q, buffer, notification);
		553	atomic_set(&buffer->state, QETH_QDIO_BUF_HANDLED_DELAYED);
		554	break;
		555	default:
		556	WARN_ON_ONCE(1);
		557	}
552		558
553	qdio_release_aob(aob);	559	qdio_release_aob(aob);
554	}	560	}
@@ -1405,7 +1411,7 @@ static void qeth_notify_skbs(struct qeth_qdio_out_q *q, · 850 unmodified lines
1405	skb_queue_walk(&buf->skb_list, skb) {	1411	skb_queue_walk(&buf->skb_list, skb) {
1406	QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);	1412	QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1407	QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);	1413	QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
1408	if (skb->protocol == htons(ETH_P_AF_IUCV) && skb->sk)	1414	if (skb->sk && skb->sk->sk_family == PF_IUCV)
1409	iucv_sk(skb->sk)->sk_txnotify(skb, notification);	1415	iucv_sk(skb->sk)->sk_txnotify(skb, notification);
1410	}	1416	}
1411	}	1417	}
@@ -1416,9 +1422,6 @@ static void qeth_tx_complete_buf(struct qeth_qdio_out_buffer *buf, bool error, · 4 unmodified lines
1416	struct qeth_qdio_out_q *queue = buf->q;	1422	struct qeth_qdio_out_q *queue = buf->q;
1417	struct sk_buff *skb;	1423	struct sk_buff *skb;
1418		1424
1419	/* release may never happen from within CQ tasklet scope */
1420	WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
1421
1422	if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)	1425	if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1423	qeth_notify_skbs(queue, buf, TX_NOTIFY_GENERALERROR);	1426	qeth_notify_skbs(queue, buf, TX_NOTIFY_GENERALERROR);
1424		1427
@@ -6078,9 +6081,32 @@ static void qeth_iqd_tx_complete(struct qeth_qdio_out_q *queue, · 4653 unmodified lines
6078		6081
6079	if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,	6082	if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
6080	QETH_QDIO_BUF_PENDING) ==	6083	QETH_QDIO_BUF_PENDING) ==
6081	QETH_QDIO_BUF_PRIMED)	6084	QETH_QDIO_BUF_PRIMED) {
6082	qeth_notify_skbs(queue, buffer, TX_NOTIFY_PENDING);	6085	qeth_notify_skbs(queue, buffer, TX_NOTIFY_PENDING);
6083		6086
		6087	/* Handle race with qeth_qdio_handle_aob(): */
		6088	switch (atomic_xchg(&buffer->state,
		6089	QETH_QDIO_BUF_NEED_QAOB)) {
		6090	case QETH_QDIO_BUF_PENDING:
		6091	/* No concurrent QAOB notification. */
		6092	break;
		6093	case QETH_QDIO_BUF_QAOB_OK:
		6094	qeth_notify_skbs(queue, buffer,
		6095	TX_NOTIFY_DELAYED_OK);
		6096	atomic_set(&buffer->state,
		6097	QETH_QDIO_BUF_HANDLED_DELAYED);
		6098	break;
		6099	case QETH_QDIO_BUF_QAOB_ERROR:
		6100	qeth_notify_skbs(queue, buffer,
		6101	TX_NOTIFY_DELAYED_GENERALERROR);
		6102	atomic_set(&buffer->state,
		6103	QETH_QDIO_BUF_HANDLED_DELAYED);
		6104	break;
		6105	default:
		6106	WARN_ON_ONCE(1);
		6107	}
		6108	}
		6109
6084	QETH_CARD_TEXT_(card, 5, "pel%u", bidx);	6110	QETH_CARD_TEXT_(card, 5, "pel%u", bidx);
6085		6111
6086	/* prepare the queue slot for re-use: */	6112	/* prepare the queue slot for re-use: */

drivers/s390/net/qeth_l2_main.c+2−16

  *	change notification' and thus can support the learning_sync bridgeport
  *	attribute
  *	@card: qeth_card structure pointer
- *
- *	This is a destructive test and must be called before dev2br or
- *	bridgeport address notification is enabled!
  */
 static void qeth_l2_detect_dev2br_support(struct qeth_card *card)
 {
 	struct qeth_priv *priv = netdev_priv(card->dev);
 	bool dev2br_supported;
-	int rc;
 	QETH_CARD_TEXT(card, 2, "d2brsup");
 	if (!IS_IQD(card))
 		return;
 	/* dev2br requires valid cssid,iid,chid */
-	if (!card->info.ids_valid) {
+	dev2br_supported = card->info.ids_valid &&
-		dev2br_supported = false;
+			   css_general_characteristics.enarf;
-	} else if (css_general_characteristics.enarf) {
-		dev2br_supported = true;
-	} else {
-		/* Old machines don't have the feature bit:
-		 * Probe by testing whether a disable succeeds
-		 */
-		rc = qeth_l2_pnso(card, PNSO_OC_NET_ADDR_INFO, 0, NULL, NULL);
-		dev2br_supported = !rc;
-	}
 	QETH_CARD_TEXT_(card, 2, "D2Bsup%02x", dev2br_supported);
 	if (dev2br_supported)
 	struct net_device *dev = card->dev;
 	int rc = 0;
-	/* query before bridgeport_notification may be enabled */
 	qeth_l2_detect_dev2br_support(card);
 	mutex_lock(&card->sbp_lock);

drivers/scsi/libiscsi.c+15−8

 	if (conn->task == task)
 		conn->task = NULL;
-	if (conn->ping_task == task)
+	if (READ_ONCE(conn->ping_task) == task)
-		conn->ping_task = NULL;
+		WRITE_ONCE(conn->ping_task, NULL);
 	/* release get from queueing */
 	__iscsi_put_task(task);
 						   task->conn->session->age);
 	}
+	if (unlikely(READ_ONCE(conn->ping_task) == INVALID_SCSI_TASK))
+		WRITE_ONCE(conn->ping_task, task);
 	if (!ihost->workq) {
 		if (iscsi_prep_mgmt_task(conn, task))
 			goto free_task;
         struct iscsi_nopout hdr;
 	struct iscsi_task *task;
-	if (!rhdr && conn->ping_task)
+	if (!rhdr) {
-		return -EINVAL;
+		if (READ_ONCE(conn->ping_task))
+			return -EINVAL;
+		WRITE_ONCE(conn->ping_task, INVALID_SCSI_TASK);
+	}
 	memset(&hdr, 0, sizeof(struct iscsi_nopout));
 	hdr.opcode = ISCSI_OP_NOOP_OUT | ISCSI_OP_IMMEDIATE;
 	task = __iscsi_conn_send_pdu(conn, (struct iscsi_hdr *)&hdr, NULL, 0);
 	if (!task) {
+		if (!rhdr)
+			WRITE_ONCE(conn->ping_task, NULL);
 		iscsi_conn_printk(KERN_ERR, conn, "Could not send nopout\n");
 		return -EIO;
 	} else if (!rhdr) {
 		/* only track our nops */
-		conn->ping_task = task;
 		conn->last_ping = jiffies;
 	}
 	struct iscsi_conn *conn = task->conn;
 	int rc = 0;
-	if (conn->ping_task != task) {
+	if (READ_ONCE(conn->ping_task) != task) {
 		/*
 		 * If this is not in response to one of our
 		 * nops then it must be from userspace.
  */
 static int iscsi_has_ping_timed_out(struct iscsi_conn *conn)
 {
-	if (conn->ping_task &&
+	if (READ_ONCE(conn->ping_task) &&
 	    time_before_eq(conn->last_recv + (conn->recv_timeout * HZ) +
 			   (conn->ping_timeout * HZ), jiffies))
 		return 1;
 	 * Checking the transport already or nop from a cmd timeout still
 	 * running
 	 */
-	if (conn->ping_task) {
+	if (READ_ONCE(conn->ping_task)) {
 		task->have_checked_conn = true;
 		rc = BLK_EH_RESET_TIMER;
 		goto done;

drivers/scsi/ufs/ufshcd.c+23−14

@@ -1294,8 +1294,15 @@ static int ufshcd_devfreq_target(struct device *dev, · 1293 unmodified lines
1294	}	1294	}
1295	spin_unlock_irqrestore(hba->host->host_lock, irq_flags);	1295	spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1296		1296
		1297	pm_runtime_get_noresume(hba->dev);
		1298	if (!pm_runtime_active(hba->dev)) {
		1299	pm_runtime_put_noidle(hba->dev);
		1300	ret = -EAGAIN;
		1301	goto out;
		1302	}
1297	start = ktime_get();	1303	start = ktime_get();
1298	ret = ufshcd_devfreq_scale(hba, scale_up);	1304	ret = ufshcd_devfreq_scale(hba, scale_up);
		1305	pm_runtime_put(hba->dev);
1299		1306
1300	trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),	1307	trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
1301	(scale_up ? "up" : "down"),	1308	(scale_up ? "up" : "down"),
@@ -3192,13 +3199,19 @@ int ufshcd_read_desc_param(struct ufs_hba *hba, · 1890 unmodified lines
3192	/* Get the length of descriptor */	3199	/* Get the length of descriptor */
3193	ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);	3200	ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);
3194	if (!buff_len) {	3201	if (!buff_len) {
3195	dev_err(hba->dev, "%s: Failed to get desc length", __func__);	3202	dev_err(hba->dev, "%s: Failed to get desc length\n", __func__);
		3203	return -EINVAL;
		3204	}
		3205
		3206	if (param_offset >= buff_len) {
		3207	dev_err(hba->dev, "%s: Invalid offset 0x%x in descriptor IDN 0x%x, length 0x%x\n",
		3208	__func__, param_offset, desc_id, buff_len);
3196	return -EINVAL;	3209	return -EINVAL;
3197	}	3210	}
3198		3211
3199	/* Check whether we need temp memory */	3212	/* Check whether we need temp memory */
3200	if (param_offset != 0 \|\| param_size < buff_len) {	3213	if (param_offset != 0 \|\| param_size < buff_len) {
3201	desc_buf = kmalloc(buff_len, GFP_KERNEL);	3214	desc_buf = kzalloc(buff_len, GFP_KERNEL);
3202	if (!desc_buf)	3215	if (!desc_buf)
3203	return -ENOMEM;	3216	return -ENOMEM;
3204	} else {	3217	} else {
@@ -3212,14 +3225,14 @@ int ufshcd_read_desc_param(struct ufs_hba *hba, · 7 unmodified lines
3212	desc_buf, &buff_len);	3225	desc_buf, &buff_len);
3213		3226
3214	if (ret) {	3227	if (ret) {
3215	dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d",	3228	dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d\n",
3216	__func__, desc_id, desc_index, param_offset, ret);	3229	__func__, desc_id, desc_index, param_offset, ret);
3217	goto out;	3230	goto out;
3218	}	3231	}
3219		3232
3220	/* Sanity check */	3233	/* Sanity check */
3221	if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {	3234	if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
3222	dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header",	3235	dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header\n",
3223	__func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);	3236	__func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
3224	ret = -EINVAL;	3237	ret = -EINVAL;
3225	goto out;	3238	goto out;
@@ -3229,12 +3242,12 @@ int ufshcd_read_desc_param(struct ufs_hba *hba, · 3 unmodified lines
3229	buff_len = desc_buf[QUERY_DESC_LENGTH_OFFSET];	3242	buff_len = desc_buf[QUERY_DESC_LENGTH_OFFSET];
3230	ufshcd_update_desc_length(hba, desc_id, desc_index, buff_len);	3243	ufshcd_update_desc_length(hba, desc_id, desc_index, buff_len);
3231		3244
3232	/* Check wherher we will not copy more data, than available */	3245	if (is_kmalloc) {
3233	if (is_kmalloc && (param_offset + param_size) > buff_len)	3246	/* Make sure we don't copy more data than available */
3234	param_size = buff_len - param_offset;	3247	if (param_offset + param_size > buff_len)
3235		3248	param_size = buff_len - param_offset;
3236	if (is_kmalloc)
3237	memcpy(param_read_buf, &desc_buf[param_offset], param_size);	3249	memcpy(param_read_buf, &desc_buf[param_offset], param_size);
		3250	}
3238	out:	3251	out:
3239	if (is_kmalloc)	3252	if (is_kmalloc)
3240	kfree(desc_buf);	3253	kfree(desc_buf);
@@ -8900,11 +8913,7 @@ int ufshcd_shutdown(struct ufs_hba *hba) · 5659 unmodified lines
8900	if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))	8913	if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
8901	goto out;	8914	goto out;
8902		8915
8903	if (pm_runtime_suspended(hba->dev)) {	8916	pm_runtime_get_sync(hba->dev);
8904	ret = ufshcd_runtime_resume(hba);
8905	if (ret)
8906	goto out;
8907	}
8908		8917
8909	ret = ufshcd_suspend(hba, UFS_SHUTDOWN_PM);	8918	ret = ufshcd_suspend(hba, UFS_SHUTDOWN_PM);
8910	out:	8919	out:

drivers/soc/fsl/dpio/dpio-driver.c+1−4

 {
 	int error;
 	struct fsl_mc_device_irq *irq;
-	cpumask_t mask;
 	irq = dpio_dev->irqs[0];
 	error = devm_request_irq(&dpio_dev->dev,
 	}
 	/* set the affinity hint */
-	cpumask_clear(&mask);
+	if (irq_set_affinity_hint(irq->msi_desc->irq, cpumask_of(cpu)))
-	cpumask_set_cpu(cpu, &mask);
-	if (irq_set_affinity_hint(irq->msi_desc->irq, &mask))
 		dev_err(&dpio_dev->dev,
 			"irq_set_affinity failed irq %d cpu %d\n",
 			irq->msi_desc->irq, cpu);

drivers/spi/spi-dw-core.c+2−1

 		master->set_cs = dw_spi_set_cs;
 	master->transfer_one = dw_spi_transfer_one;
 	master->handle_err = dw_spi_handle_err;
-	master->mem_ops = &dws->mem_ops;
+	if (dws->mem_ops.exec_op)
+		master->mem_ops = &dws->mem_ops;
 	master->max_speed_hz = dws->max_freq;
 	master->dev.of_node = dev->of_node;
 	master->dev.fwnode = dev->fwnode;

drivers/spi/spi-imx.c+1−0

@@ -1686,6 +1686,7 @@ static int spi_imx_probe(struct platform_device *pdev) · 1685 unmodified lines
1686		1686
1687	pm_runtime_set_autosuspend_delay(spi_imx->dev, MXC_RPM_TIMEOUT);	1687	pm_runtime_set_autosuspend_delay(spi_imx->dev, MXC_RPM_TIMEOUT);
1688	pm_runtime_use_autosuspend(spi_imx->dev);	1688	pm_runtime_use_autosuspend(spi_imx->dev);
		1689	pm_runtime_get_noresume(spi_imx->dev);
1689	pm_runtime_set_active(spi_imx->dev);	1690	pm_runtime_set_active(spi_imx->dev);
1690	pm_runtime_enable(spi_imx->dev);	1691	pm_runtime_enable(spi_imx->dev);
1691		1692

drivers/spi/spi-nxp-fspi.c+7−0

 	struct resource *res;
 	struct nxp_fspi *f;
 	int ret;
+	u32 reg;
 	ctlr = spi_alloc_master(&pdev->dev, sizeof(*f));
 	if (!ctlr)
 		goto err_put_ctrl;
 	}
+	/* Clear potential interrupts */
+	reg = fspi_readl(f, f->iobase + FSPI_INTR);
+	if (reg)
+		fspi_writel(f, reg, f->iobase + FSPI_INTR);
 	/* find the resources - controller memory mapped space */
 	if (is_acpi_node(f->dev->fwnode))
 		res = platform_get_resource(pdev, IORESOURCE_MEM, 1);

drivers/spi/spi.c+5−0

 	if (!spi->max_speed_hz)
 		spi->max_speed_hz = spi->controller->max_speed_hz;
+	mutex_lock(&spi->controller->io_mutex);
 	if (spi->controller->setup)
 		status = spi->controller->setup(spi);
 	if (spi->controller->auto_runtime_pm && spi->controller->set_cs) {
 		status = pm_runtime_get_sync(spi->controller->dev.parent);
 		if (status < 0) {
+			mutex_unlock(&spi->controller->io_mutex);
 			pm_runtime_put_noidle(spi->controller->dev.parent);
 			dev_err(&spi->controller->dev, "Failed to power device: %d\n",
 				status);
 		spi_set_cs(spi, false);
 	}
+	mutex_unlock(&spi->controller->io_mutex);
 	if (spi->rt && !spi->controller->rt) {
 		spi->controller->rt = true;
 		spi_set_thread_rt(spi->controller);

drivers/staging/media/sunxi/cedrus/cedrus_h264.c+1−1

@@ -446,7 +446,7 @@ static void cedrus_set_params(struct cedrus_ctx *ctx, · 445 unmodified lines
446	reg \|= (pps->second_chroma_qp_index_offset & 0x3f) << 16;	446	reg \|= (pps->second_chroma_qp_index_offset & 0x3f) << 16;
447	reg \|= (pps->chroma_qp_index_offset & 0x3f) << 8;	447	reg \|= (pps->chroma_qp_index_offset & 0x3f) << 8;
448	reg \|= (pps->pic_init_qp_minus26 + 26 + slice->slice_qp_delta) & 0x3f;	448	reg \|= (pps->pic_init_qp_minus26 + 26 + slice->slice_qp_delta) & 0x3f;
449	if (pps->flags & V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT)	449	if (!(pps->flags & V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT))
450	reg \|= VE_H264_SHS_QP_SCALING_MATRIX_DEFAULT;	450	reg \|= VE_H264_SHS_QP_SCALING_MATRIX_DEFAULT;
451	cedrus_write(dev, VE_H264_SHS_QP, reg);	451	cedrus_write(dev, VE_H264_SHS_QP, reg);
452		452

drivers/staging/mt7621-pci/pci-mt7621.c+3−12

 	return 0;
 }
-static int mt7621_pcie_request_resources(struct mt7621_pcie *pcie,
+static void mt7621_pcie_add_resources(struct mt7621_pcie *pcie,
-					 struct list_head *res)
+				      struct list_head *res)
 {
-	struct device *dev = pcie->dev;
 	pci_add_resource_offset(res, &pcie->io, pcie->offset.io);
 	pci_add_resource_offset(res, &pcie->mem, pcie->offset.mem);
-	pci_add_resource(res, &pcie->busn);
-	return devm_request_pci_bus_resources(dev, res);
 }
 static int mt7621_pcie_register_host(struct pci_host_bridge *host,
 	setup_cm_memory_region(pcie);
-	err = mt7621_pcie_request_resources(pcie, &res);
+	mt7621_pcie_add_resources(pcie, &res);
-	if (err) {
-		dev_err(dev, "Error requesting resources\n");
-		return err;
-	}
 	err = mt7621_pcie_register_host(bridge, &res);
 	if (err) {

drivers/staging/ralink-gdma/Kconfig+1−0

@@ -2,6 +2,7 @@ · 1 unmodified line
2	config DMA_RALINK	2	config DMA_RALINK
3	tristate "RALINK DMA support"	3	tristate "RALINK DMA support"
4	depends on RALINK && !SOC_RT288X	4	depends on RALINK && !SOC_RT288X
		5	depends on DMADEVICES
5	select DMA_ENGINE	6	select DMA_ENGINE
6	select DMA_VIRTUAL_CHANNELS	7	select DMA_VIRTUAL_CHANNELS
7		8

drivers/staging/rtl8723bs/os_dep/sdio_intf.c+1−0

@@ -20,6 +20,7 @@ static const struct sdio_device_id sdio_ids[] = { · 19 unmodified lines
20	{ SDIO_DEVICE(0x024c, 0x0525), },	20	{ SDIO_DEVICE(0x024c, 0x0525), },
21	{ SDIO_DEVICE(0x024c, 0x0623), },	21	{ SDIO_DEVICE(0x024c, 0x0623), },
22	{ SDIO_DEVICE(0x024c, 0x0626), },	22	{ SDIO_DEVICE(0x024c, 0x0626), },
		23	{ SDIO_DEVICE(0x024c, 0x0627), },
23	{ SDIO_DEVICE(0x024c, 0xb723), },	24	{ SDIO_DEVICE(0x024c, 0xb723), },
24	{ /* end: all zeroes */ },	25	{ /* end: all zeroes */ },
25	};	26	};

drivers/target/iscsi/iscsi_target.c+13−4

 void iscsit_aborted_task(struct iscsi_conn *conn, struct iscsi_cmd *cmd)
 {
 	spin_lock_bh(&conn->cmd_lock);
-	if (!list_empty(&cmd->i_conn_node) &&
+	if (!list_empty(&cmd->i_conn_node))
-	    !(cmd->se_cmd.transport_state & CMD_T_FABRIC_STOP))
 		list_del_init(&cmd->i_conn_node);
 	spin_unlock_bh(&conn->cmd_lock);
 	spin_lock_bh(&conn->cmd_lock);
 	list_splice_init(&conn->conn_cmd_list, &tmp_list);
-	list_for_each_entry(cmd, &tmp_list, i_conn_node) {
+	list_for_each_entry_safe(cmd, cmd_tmp, &tmp_list, i_conn_node) {
 		struct se_cmd *se_cmd = &cmd->se_cmd;
 		if (se_cmd->se_tfo != NULL) {
 			spin_lock_irq(&se_cmd->t_state_lock);
-			se_cmd->transport_state |= CMD_T_FABRIC_STOP;
+			if (se_cmd->transport_state & CMD_T_ABORTED) {
+				/*
+				 * LIO's abort path owns the cleanup for this,
+				 * so put it back on the list and let
+				 * aborted_task handle it.
+				 */
+				list_move_tail(&cmd->i_conn_node,
+					       &conn->conn_cmd_list);
+			} else {
+				se_cmd->transport_state |= CMD_T_FABRIC_STOP;
+			}
 			spin_unlock_irq(&se_cmd->t_state_lock);
 		}
 	}

drivers/tee/optee/call.c+2−1

 static bool is_normal_memory(pgprot_t p)
 {
 #if defined(CONFIG_ARM)
-	return (pgprot_val(p) & L_PTE_MT_MASK) == L_PTE_MT_WRITEALLOC;
+	return (((pgprot_val(p) & L_PTE_MT_MASK) == L_PTE_MT_WRITEALLOC) ||
+		((pgprot_val(p) & L_PTE_MT_MASK) == L_PTE_MT_WRITEBACK));
 #elif defined(CONFIG_ARM64)
 	return (pgprot_val(p) & PTE_ATTRINDX_MASK) == PTE_ATTRINDX(MT_NORMAL);
 #else

drivers/tty/serial/ar933x_uart.c+4−2

@@ -789,8 +789,10 @@ static int ar933x_uart_probe(struct platform_device *pdev) · 788 unmodified lines
789	goto err_disable_clk;	789	goto err_disable_clk;
790		790
791	up->gpios = mctrl_gpio_init(port, 0);	791	up->gpios = mctrl_gpio_init(port, 0);
792	if (IS_ERR(up->gpios) && PTR_ERR(up->gpios) != -ENOSYS)	792	if (IS_ERR(up->gpios) && PTR_ERR(up->gpios) != -ENOSYS) {
793	return PTR_ERR(up->gpios);	793	ret = PTR_ERR(up->gpios);
		794	goto err_disable_clk;
		795	}
794		796
795	up->rts_gpiod = mctrl_gpio_to_gpiod(up->gpios, UART_GPIO_RTS);	797	up->rts_gpiod = mctrl_gpio_to_gpiod(up->gpios, UART_GPIO_RTS);
796		798

drivers/tty/serial/imx.c+11−19

 	struct imx_port *sport = dev_id;
 	unsigned int usr1, usr2, ucr1, ucr2, ucr3, ucr4;
 	irqreturn_t ret = IRQ_NONE;
+	unsigned long flags = 0;
-	spin_lock(&sport->port.lock);
+	/*
+	 * IRQs might not be disabled upon entering this interrupt handler,
+	 * e.g. when interrupt handlers are forced to be threaded. To support
+	 * this scenario as well, disable IRQs when acquiring the spinlock.
+	 */
+	spin_lock_irqsave(&sport->port.lock, flags);
 	usr1 = imx_uart_readl(sport, USR1);
 	usr2 = imx_uart_readl(sport, USR2);
 		ret = IRQ_HANDLED;
 	}
-	spin_unlock(&sport->port.lock);
+	spin_unlock_irqrestore(&sport->port.lock, flags);
 	return ret;
 }
 	unsigned int ucr1;
 	unsigned long flags = 0;
 	int locked = 1;
-	int retval;
-	retval = clk_enable(sport->clk_per);
-	if (retval)
-		return;
-	retval = clk_enable(sport->clk_ipg);
-	if (retval) {
-		clk_disable(sport->clk_per);
-		return;
-	}
 	if (sport->port.sysrq)
 		locked = 0;
 	if (locked)
 		spin_unlock_irqrestore(&sport->port.lock, flags);
-	clk_disable(sport->clk_ipg);
-	clk_disable(sport->clk_per);
 }
 /*
 	retval = uart_set_options(&sport->port, co, baud, parity, bits, flow);
-	clk_disable(sport->clk_ipg);
 	if (retval) {
-		clk_unprepare(sport->clk_ipg);
+		clk_disable_unprepare(sport->clk_ipg);
 		goto error_console;
 	}
-	retval = clk_prepare(sport->clk_per);
+	retval = clk_prepare_enable(sport->clk_per);
 	if (retval)
-		clk_unprepare(sport->clk_ipg);
+		clk_disable_unprepare(sport->clk_ipg);
 error_console:
 	return retval;

drivers/video/fbdev/hyperv_fb.c+6−1

 		goto err1;
 	}
-	fb_virt = ioremap(par->mem->start, screen_fb_size);
+	/*
+	 * Map the VRAM cacheable for performance. This is also required for
+	 * VM Connect to display properly for ARM64 Linux VM, as the host also
+	 * maps the VRAM cacheable.
+	 */
+	fb_virt = ioremap_cache(par->mem->start, screen_fb_size);
 	if (!fb_virt)
 		goto err2;

fs/afs/dir.c+1−0

@@ -823,6 +823,7 @@ static struct inode afs_do_lookup(struct inode dir, struct dentry *dentry, · 822 unmodified lines
823	vp->cb_break_before = afs_calc_vnode_cb_break(vnode);	823	vp->cb_break_before = afs_calc_vnode_cb_break(vnode);
824	vp->vnode = vnode;	824	vp->vnode = vnode;
825	vp->put_vnode = true;	825	vp->put_vnode = true;
		826	vp->speculative = true; /* vnode not locked */
826	}	827	}
827	}	828	}
828	}	829	}

fs/afs/inode.c+8−0

 			op->flags &= ~AFS_OPERATION_DIR_CONFLICT;
 		}
 	} else if (vp->scb.have_status) {
+		if (vp->dv_before + vp->dv_delta != vp->scb.status.data_version &&
+		    vp->speculative)
+			/* Ignore the result of a speculative bulk status fetch
+			 * if it splits around a modification op, thereby
+			 * appearing to regress the data version.
+			 */
+			goto out;
 		afs_apply_status(op, vp);
 		if (vp->scb.have_cb)
 			afs_apply_callback(op, vp);
 		}
 	}
+out:
 	write_sequnlock(&vnode->cb_lock);
 	if (vp->scb.have_status)

fs/afs/internal.h+1−0

@@ -755,6 +755,7 @@ struct afs_vnode_param { · 754 unmodified lines
755	bool update_ctime:1; /* Need to update the ctime */	755	bool update_ctime:1; /* Need to update the ctime */
756	bool set_size:1; /* Must update i_size */	756	bool set_size:1; /* Must update i_size */
757	bool op_unlinked:1; /* True if file was unlinked by op */	757	bool op_unlinked:1; /* True if file was unlinked by op */
		758	bool speculative:1; /* T if speculative status fetch (no vnode lock) */
758	};	759	};
759		760
760	/*	761	/*

fs/btrfs/ctree.h+4−1

 	 */
 	struct ulist *qgroup_ulist;
-	/* protect user change for quota operations */
+	/*
+	 * Protect user change for quota operations. If a transaction is needed,
+	 * it must be started before locking this lock.
+	 */
 	struct mutex qgroup_ioctl_lock;
 	/* list of dirty qgroups to be written at next commit */

fs/btrfs/file.c+0−57

@@ -452,46 +452,6 @@ static void btrfs_drop_pages(struct page **pages, size_t num_pages) · 451 unmodified lines
452	}	452	}
453	}	453	}
454		454
455	static int btrfs_find_new_delalloc_bytes(struct btrfs_inode *inode,
456	const u64 start,
457	const u64 len,
458	struct extent_state **cached_state)
459	{
460	u64 search_start = start;
461	const u64 end = start + len - 1;
462
463	while (search_start < end) {
464	const u64 search_len = end - search_start + 1;
465	struct extent_map *em;
466	u64 em_len;
467	int ret = 0;
468
469	em = btrfs_get_extent(inode, NULL, 0, search_start, search_len);
470	if (IS_ERR(em))
471	return PTR_ERR(em);
472
473	if (em->block_start != EXTENT_MAP_HOLE)
474	goto next;
475
476	em_len = em->len;
477	if (em->start < search_start)
478	em_len -= search_start - em->start;
479	if (em_len > search_len)
480	em_len = search_len;
481
482	ret = set_extent_bit(&inode->io_tree, search_start,
483	search_start + em_len - 1,
484	EXTENT_DELALLOC_NEW,
485	NULL, cached_state, GFP_NOFS);
486	next:
487	search_start = extent_map_end(em);
488	free_extent_map(em);
489	if (ret)
490	return ret;
491	}
492	return 0;
493	}
494
495	/*	455	/*
496	* after copy_from_user, pages need to be dirtied and we need to make	456	* after copy_from_user, pages need to be dirtied and we need to make
497	* sure holes are created between the current EOF and the start of	457	* sure holes are created between the current EOF and the start of
@@ -528,23 +488,6 @@ int btrfs_dirty_pages(struct btrfs_inode inode, struct page *pages, · 30 unmodified lines
528	EXTENT_DELALLOC \| EXTENT_DO_ACCOUNTING \| EXTENT_DEFRAG,	488	EXTENT_DELALLOC \| EXTENT_DO_ACCOUNTING \| EXTENT_DEFRAG,
529	0, 0, cached);	489	0, 0, cached);
530		490
531	if (!btrfs_is_free_space_inode(inode)) {
532	if (start_pos >= isize &&
533	!(inode->flags & BTRFS_INODE_PREALLOC)) {
534	/*
535	* There can't be any extents following eof in this case
536	* so just set the delalloc new bit for the range
537	* directly.
538	*/
539	extra_bits \|= EXTENT_DELALLOC_NEW;
540	} else {
541	err = btrfs_find_new_delalloc_bytes(inode, start_pos,
542	num_bytes, cached);
543	if (err)
544	return err;
545	}
546	}
547
548	err = btrfs_set_extent_delalloc(inode, start_pos, end_of_last_block,	491	err = btrfs_set_extent_delalloc(inode, start_pos, end_of_last_block,
549	extra_bits, cached);	492	extra_bits, cached);
550	if (err)	493	if (err)

fs/btrfs/inode.c+58−0

@@ -2253,11 +2253,69 @@ static int add_pending_csums(struct btrfs_trans_handle *trans, · 2252 unmodified lines
2253	return 0;	2253	return 0;
2254	}	2254	}
2255		2255
		2256	static int btrfs_find_new_delalloc_bytes(struct btrfs_inode *inode,
		2257	const u64 start,
		2258	const u64 len,
		2259	struct extent_state **cached_state)
		2260	{
		2261	u64 search_start = start;
		2262	const u64 end = start + len - 1;
		2263
		2264	while (search_start < end) {
		2265	const u64 search_len = end - search_start + 1;
		2266	struct extent_map *em;
		2267	u64 em_len;
		2268	int ret = 0;
		2269
		2270	em = btrfs_get_extent(inode, NULL, 0, search_start, search_len);
		2271	if (IS_ERR(em))
		2272	return PTR_ERR(em);
		2273
		2274	if (em->block_start != EXTENT_MAP_HOLE)
		2275	goto next;
		2276
		2277	em_len = em->len;
		2278	if (em->start < search_start)
		2279	em_len -= search_start - em->start;
		2280	if (em_len > search_len)
		2281	em_len = search_len;
		2282
		2283	ret = set_extent_bit(&inode->io_tree, search_start,
		2284	search_start + em_len - 1,
		2285	EXTENT_DELALLOC_NEW,
		2286	NULL, cached_state, GFP_NOFS);
		2287	next:
		2288	search_start = extent_map_end(em);
		2289	free_extent_map(em);
		2290	if (ret)
		2291	return ret;
		2292	}
		2293	return 0;
		2294	}
		2295
2256	int btrfs_set_extent_delalloc(struct btrfs_inode *inode, u64 start, u64 end,	2296	int btrfs_set_extent_delalloc(struct btrfs_inode *inode, u64 start, u64 end,
2257	unsigned int extra_bits,	2297	unsigned int extra_bits,
2258	struct extent_state **cached_state)	2298	struct extent_state **cached_state)
2259	{	2299	{
2260	WARN_ON(PAGE_ALIGNED(end));	2300	WARN_ON(PAGE_ALIGNED(end));
		2301
		2302	if (start >= i_size_read(&inode->vfs_inode) &&
		2303	!(inode->flags & BTRFS_INODE_PREALLOC)) {
		2304	/*
		2305	* There can't be any extents following eof in this case so just
		2306	* set the delalloc new bit for the range directly.
		2307	*/
		2308	extra_bits \|= EXTENT_DELALLOC_NEW;
		2309	} else {
		2310	int ret;
		2311
		2312	ret = btrfs_find_new_delalloc_bytes(inode, start,
		2313	end + 1 - start,
		2314	cached_state);
		2315	if (ret)
		2316	return ret;
		2317	}
		2318
2261	return set_extent_delalloc(&inode->io_tree, start, end, extra_bits,	2319	return set_extent_delalloc(&inode->io_tree, start, end, extra_bits,
2262	cached_state);	2320	cached_state);
2263	}	2321	}

fs/btrfs/qgroup.c+78−10

 #include <linux/slab.h>
 #include <linux/workqueue.h>
 #include <linux/btrfs.h>
+#include <linux/sched/mm.h>
 #include "ctree.h"
 #include "transaction.h"
 			break;
 	}
 out:
+	btrfs_free_path(path);
 	fs_info->qgroup_flags |= flags;
 	if (!(fs_info->qgroup_flags & BTRFS_QGROUP_STATUS_FLAG_ON))
 		clear_bit(BTRFS_FS_QUOTA_ENABLED, &fs_info->flags);
 	else if (fs_info->qgroup_flags & BTRFS_QGROUP_STATUS_FLAG_RESCAN &&
 		 ret >= 0)
 		ret = qgroup_rescan_init(fs_info, rescan_progress, 0);
-	btrfs_free_path(path);
 	if (ret < 0) {
 		ulist_free(fs_info->qgroup_ulist);
 	struct btrfs_key found_key;
 	struct btrfs_qgroup *qgroup = NULL;
 	struct btrfs_trans_handle *trans = NULL;
+	struct ulist *ulist = NULL;
 	int ret = 0;
 	int slot;
 	if (fs_info->quota_root)
 		goto out;
-	fs_info->qgroup_ulist = ulist_alloc(GFP_KERNEL);
+	ulist = ulist_alloc(GFP_KERNEL);
-	if (!fs_info->qgroup_ulist) {
+	if (!ulist) {
 		ret = -ENOMEM;
 		goto out;
 	}
 	ret = btrfs_sysfs_add_qgroups(fs_info);
 	if (ret < 0)
 		goto out;
+	/*
+	 * Unlock qgroup_ioctl_lock before starting the transaction. This is to
+	 * avoid lock acquisition inversion problems (reported by lockdep) between
+	 * qgroup_ioctl_lock and the vfs freeze semaphores, acquired when we
+	 * start a transaction.
+	 * After we started the transaction lock qgroup_ioctl_lock again and
+	 * check if someone else created the quota root in the meanwhile. If so,
+	 * just return success and release the transaction handle.
+	 *
+	 * Also we don't need to worry about someone else calling
+	 * btrfs_sysfs_add_qgroups() after we unlock and getting an error because
+	 * that function returns 0 (success) when the sysfs entries already exist.
+	 */
+	mutex_unlock(&fs_info->qgroup_ioctl_lock);
 	/*
 	 * 1 for quota root item
 	 * 1 for BTRFS_QGROUP_STATUS item
 	 * would be a lot of overkill.
 	 */
 	trans = btrfs_start_transaction(tree_root, 2);
+	mutex_lock(&fs_info->qgroup_ioctl_lock);
 	if (IS_ERR(trans)) {
 		ret = PTR_ERR(trans);
 		trans = NULL;
 		goto out;
 	}
+	if (fs_info->quota_root)
+		goto out;
+	fs_info->qgroup_ulist = ulist;
+	ulist = NULL;
 	/*
 	 * initially create the quota tree
 	 */
 	if (ret) {
 		ulist_free(fs_info->qgroup_ulist);
 		fs_info->qgroup_ulist = NULL;
-		if (trans)
-			btrfs_end_transaction(trans);
 		btrfs_sysfs_del_qgroups(fs_info);
 	}
 	mutex_unlock(&fs_info->qgroup_ioctl_lock);
+	if (ret && trans)
+		btrfs_end_transaction(trans);
+	else if (trans)
+		ret = btrfs_end_transaction(trans);
+	ulist_free(ulist);
 	return ret;
 }
 	mutex_lock(&fs_info->qgroup_ioctl_lock);
 	if (!fs_info->quota_root)
 		goto out;
+	mutex_unlock(&fs_info->qgroup_ioctl_lock);
 	/*
 	 * 1 For the root item
 	 *
 	 * We should also reserve enough items for the quota tree deletion in
 	 * btrfs_clean_quota_tree but this is not done.
+	 *
+	 * Also, we must always start a transaction without holding the mutex
+	 * qgroup_ioctl_lock, see btrfs_quota_enable().
 	 */
 	trans = btrfs_start_transaction(fs_info->tree_root, 1);
+	mutex_lock(&fs_info->qgroup_ioctl_lock);
 	if (IS_ERR(trans)) {
 		ret = PTR_ERR(trans);
+		trans = NULL;
 		goto out;
 	}
+	if (!fs_info->quota_root)
+		goto out;
 	clear_bit(BTRFS_FS_QUOTA_ENABLED, &fs_info->flags);
 	btrfs_qgroup_wait_for_completion(fs_info, false);
 	spin_lock(&fs_info->qgroup_lock);
 	ret = btrfs_clean_quota_tree(trans, quota_root);
 	if (ret) {
 		btrfs_abort_transaction(trans, ret);
-		goto end_trans;
+		goto out;
 	}
 	ret = btrfs_del_root(trans, &quota_root->root_key);
 	if (ret) {
 		btrfs_abort_transaction(trans, ret);
-		goto end_trans;
+		goto out;
 	}
 	list_del(&quota_root->dirty_list);
 	btrfs_put_root(quota_root);
-end_trans:
-	ret = btrfs_end_transaction(trans);
 out:
 	mutex_unlock(&fs_info->qgroup_ioctl_lock);
+	if (ret && trans)
+		btrfs_end_transaction(trans);
+	else if (trans)
+		ret = btrfs_end_transaction(trans);
 	return ret;
 }
 	struct btrfs_qgroup *member;
 	struct btrfs_qgroup_list *list;
 	struct ulist *tmp;
+	unsigned int nofs_flag;
 	int ret = 0;
 	/* Check the level of src and dst first */
 	if (btrfs_qgroup_level(src) >= btrfs_qgroup_level(dst))
 		return -EINVAL;
+	/* We hold a transaction handle open, must do a NOFS allocation. */
+	nofs_flag = memalloc_nofs_save();
 	tmp = ulist_alloc(GFP_KERNEL);
+	memalloc_nofs_restore(nofs_flag);
 	if (!tmp)
 		return -ENOMEM;
 	struct btrfs_qgroup_list *list;
 	struct ulist *tmp;
 	bool found = false;
+	unsigned int nofs_flag;
 	int ret = 0;
 	int ret2;
+	/* We hold a transaction handle open, must do a NOFS allocation. */
+	nofs_flag = memalloc_nofs_save();
 	tmp = ulist_alloc(GFP_KERNEL);
+	memalloc_nofs_restore(nofs_flag);
 	if (!tmp)
 		return -ENOMEM;
 {
 	struct btrfs_trans_handle *trans;
 	int ret;
+	bool can_commit = true;
 	/*
 	 * We don't want to run flush again and again, so if there is a running
 		return 0;
 	}
+	/*
+	 * If current process holds a transaction, we shouldn't flush, as we
+	 * assume all space reservation happens before a transaction handle is
+	 * held.
+	 *
+	 * But there are cases like btrfs_delayed_item_reserve_metadata() where
+	 * we try to reserve space with one transction handle already held.
+	 * In that case we can't commit transaction, but at least try to end it
+	 * and hope the started data writes can free some space.
+	 */
+	if (current->journal_info &&
+	    current->journal_info != BTRFS_SEND_TRANS_STUB)
+		can_commit = false;
 	ret = btrfs_start_delalloc_snapshot(root);
 	if (ret < 0)
 		goto out;
 		goto out;
 	}
-	ret = btrfs_commit_transaction(trans);
+	if (can_commit)
+		ret = btrfs_commit_transaction(trans);
+	else
+		ret = btrfs_end_transaction(trans);
 out:
 	clear_bit(BTRFS_ROOT_QGROUP_FLUSHING, &root->state);
 	wake_up(&root->qgroup_flush_wait);

fs/btrfs/tests/inode-tests.c+8−4

 	ret = clear_extent_bit(&BTRFS_I(inode)->io_tree,
 			       BTRFS_MAX_EXTENT_SIZE >> 1,
 			       (BTRFS_MAX_EXTENT_SIZE >> 1) + sectorsize - 1,
-			       EXTENT_DELALLOC | EXTENT_UPTODATE, 0, 0, NULL);
+			       EXTENT_DELALLOC | EXTENT_DELALLOC_NEW |
+			       EXTENT_UPTODATE, 0, 0, NULL);
 	if (ret) {
 		test_err("clear_extent_bit returned %d", ret);
 		goto out;
 	ret = clear_extent_bit(&BTRFS_I(inode)->io_tree,
 			       BTRFS_MAX_EXTENT_SIZE + sectorsize,
 			       BTRFS_MAX_EXTENT_SIZE + 2 * sectorsize - 1,
-			       EXTENT_DELALLOC | EXTENT_UPTODATE, 0, 0, NULL);
+			       EXTENT_DELALLOC | EXTENT_DELALLOC_NEW |
+			       EXTENT_UPTODATE, 0, 0, NULL);
 	if (ret) {
 		test_err("clear_extent_bit returned %d", ret);
 		goto out;
 	/* Empty */
 	ret = clear_extent_bit(&BTRFS_I(inode)->io_tree, 0, (u64)-1,
-			       EXTENT_DELALLOC | EXTENT_UPTODATE, 0, 0, NULL);
+			       EXTENT_DELALLOC | EXTENT_DELALLOC_NEW |
+			       EXTENT_UPTODATE, 0, 0, NULL);
 	if (ret) {
 		test_err("clear_extent_bit returned %d", ret);
 		goto out;
 out:
 	if (ret)
 		clear_extent_bit(&BTRFS_I(inode)->io_tree, 0, (u64)-1,
-				 EXTENT_DELALLOC | EXTENT_UPTODATE, 0, 0, NULL);
+				 EXTENT_DELALLOC | EXTENT_DELALLOC_NEW |
+				 EXTENT_UPTODATE, 0, 0, NULL);
 	iput(inode);
 	btrfs_free_dummy_root(root);
 	btrfs_free_dummy_fs_info(fs_info);

fs/btrfs/tree-checker.c+3−0

 			    "invalid root item size, have %u expect %zu or %u",
 			    btrfs_item_size_nr(leaf, slot), sizeof(ri),
 			    btrfs_legacy_root_item_size());
+		return -EUCLEAN;
 	}
 	/*
 	"invalid item size, have %u expect aligned to %zu for key type %u",
 			    btrfs_item_size_nr(leaf, slot),
 			    sizeof(*dref), key->type);
+		return -EUCLEAN;
 	}
 	if (!IS_ALIGNED(key->objectid, leaf->fs_info->sectorsize)) {
 		generic_err(leaf, slot,
 			extent_err(leaf, slot,
 	"invalid extent data backref offset, have %llu expect aligned to %u",
 				   offset, leaf->fs_info->sectorsize);
+			return -EUCLEAN;
 		}
 	}
 	return 0;

fs/btrfs/volumes.c+7−1

 			if (device->bdev != path_bdev) {
 				bdput(path_bdev);
 				mutex_unlock(&fs_devices->device_list_mutex);
-				btrfs_warn_in_rcu(device->fs_info,
+				/*
+				 * device->fs_info may not be reliable here, so
+				 * pass in a NULL instead. This avoids a
+				 * possible use-after-free when the fs_info and
+				 * fs_info->sb are already torn down.
+				 */
+				btrfs_warn_in_rcu(NULL,
 	"duplicate device %s devid %llu generation %llu scanned by %s (%d)",
 						  path, devid, found_transid,
 						  current->comm,

fs/cifs/cifsacl.c+1−0

@@ -1266,6 +1266,7 @@ cifs_acl_to_fattr(struct cifs_sb_info cifs_sb, struct cifs_fattr fattr, · 1265 unmodified lines
1266	cifs_dbg(VFS, "%s: error %d getting sec desc\n", __func__, rc);	1266	cifs_dbg(VFS, "%s: error %d getting sec desc\n", __func__, rc);
1267	} else if (mode_from_special_sid) {	1267	} else if (mode_from_special_sid) {
1268	rc = parse_sec_desc(cifs_sb, pntsd, acllen, fattr, true);	1268	rc = parse_sec_desc(cifs_sb, pntsd, acllen, fattr, true);
		1269	kfree(pntsd);
1269	} else {	1270	} else {
1270	/* get approximated mode from ACL */	1271	/* get approximated mode from ACL */
1271	rc = parse_sec_desc(cifs_sb, pntsd, acllen, fattr, false);	1272	rc = parse_sec_desc(cifs_sb, pntsd, acllen, fattr, false);

fs/cifs/smb2ops.c+73−15

 }
 static struct mid_q_entry *
-smb2_find_mid(struct TCP_Server_Info *server, char *buf)
+__smb2_find_mid(struct TCP_Server_Info *server, char *buf, bool dequeue)
 {
 	struct mid_q_entry *mid;
 	struct smb2_sync_hdr *shdr = (struct smb2_sync_hdr *)buf;
 		    (mid->mid_state == MID_REQUEST_SUBMITTED) &&
 		    (mid->command == shdr->Command)) {
 			kref_get(&mid->refcount);
+			if (dequeue) {
+				list_del_init(&mid->qhead);
+				mid->mid_flags |= MID_DELETED;
+			}
 			spin_unlock(&GlobalMid_Lock);
 			return mid;
 		}
 	return NULL;
 }
+static struct mid_q_entry *
+smb2_find_mid(struct TCP_Server_Info *server, char *buf)
+{
+	return __smb2_find_mid(server, buf, false);
+}
+static struct mid_q_entry *
+smb2_find_dequeue_mid(struct TCP_Server_Info *server, char *buf)
+{
+	return __smb2_find_mid(server, buf, true);
+}
 static void
 smb2_dump_detail(void *buf, struct TCP_Server_Info *server)
 {
 static int
 handle_read_data(struct TCP_Server_Info *server, struct mid_q_entry *mid,
 		 char *buf, unsigned int buf_len, struct page **pages,
-		 unsigned int npages, unsigned int page_data_size)
+		 unsigned int npages, unsigned int page_data_size,
+		 bool is_offloaded)
 {
 	unsigned int data_offset;
 	unsigned int data_len;
 	if (server->ops->is_session_expired &&
 	    server->ops->is_session_expired(buf)) {
-		cifs_reconnect(server);
+		if (!is_offloaded)
+			cifs_reconnect(server);
 		return -1;
 	}
 		cifs_dbg(FYI, "%s: server returned error %d\n",
 			 __func__, rdata->result);
 		/* normal error on read response */
-		dequeue_mid(mid, false);
+		if (is_offloaded)
+			mid->mid_state = MID_RESPONSE_RECEIVED;
+		else
+			dequeue_mid(mid, false);
 		return 0;
 	}
 		cifs_dbg(FYI, "%s: data offset (%u) beyond end of smallbuf\n",
 			 __func__, data_offset);
 		rdata->result = -EIO;
-		dequeue_mid(mid, rdata->result);
+		if (is_offloaded)
+			mid->mid_state = MID_RESPONSE_MALFORMED;
+		else
+			dequeue_mid(mid, rdata->result);
 		return 0;
 	}
 			cifs_dbg(FYI, "%s: data offset (%u) beyond 1st page of response\n",
 				 __func__, data_offset);
 			rdata->result = -EIO;
-			dequeue_mid(mid, rdata->result);
+			if (is_offloaded)
+				mid->mid_state = MID_RESPONSE_MALFORMED;
+			else
+				dequeue_mid(mid, rdata->result);
 			return 0;
 		}
 		if (data_len > page_data_size - pad_len) {
 			/* data_len is corrupt -- discard frame */
 			rdata->result = -EIO;
-			dequeue_mid(mid, rdata->result);
+			if (is_offloaded)
+				mid->mid_state = MID_RESPONSE_MALFORMED;
+			else
+				dequeue_mid(mid, rdata->result);
 			return 0;
 		}
 		rdata->result = init_read_bvec(pages, npages, page_data_size,
 					       cur_off, &bvec);
 		if (rdata->result != 0) {
-			dequeue_mid(mid, rdata->result);
+			if (is_offloaded)
+				mid->mid_state = MID_RESPONSE_MALFORMED;
+			else
+				dequeue_mid(mid, rdata->result);
 			return 0;
 		}
 		/* read response payload cannot be in both buf and pages */
 		WARN_ONCE(1, "buf can not contain only a part of read data");
 		rdata->result = -EIO;
-		dequeue_mid(mid, rdata->result);
+		if (is_offloaded)
+			mid->mid_state = MID_RESPONSE_MALFORMED;
+		else
+			dequeue_mid(mid, rdata->result);
 		return 0;
 	}
 	if (length < 0)
 		return length;
-	dequeue_mid(mid, false);
+	if (is_offloaded)
+		mid->mid_state = MID_RESPONSE_RECEIVED;
+	else
+		dequeue_mid(mid, false);
 	return length;
 }
 	}
 	dw->server->lstrp = jiffies;
-	mid = smb2_find_mid(dw->server, dw->buf);
+	mid = smb2_find_dequeue_mid(dw->server, dw->buf);
 	if (mid == NULL)
 		cifs_dbg(FYI, "mid not found\n");
 	else {
 		mid->decrypted = true;
 		rc = handle_read_data(dw->server, mid, dw->buf,
 				      dw->server->vals->read_rsp_size,
-				      dw->ppages, dw->npages, dw->len);
+				      dw->ppages, dw->npages, dw->len,
-		mid->callback(mid);
+				      true);
+		if (rc >= 0) {
+#ifdef CONFIG_CIFS_STATS2
+			mid->when_received = jiffies;
+#endif
+			mid->callback(mid);
+		} else {
+			spin_lock(&GlobalMid_Lock);
+			if (dw->server->tcpStatus == CifsNeedReconnect) {
+				mid->mid_state = MID_RETRY_NEEDED;
+				spin_unlock(&GlobalMid_Lock);
+				mid->callback(mid);
+			} else {
+				mid->mid_state = MID_REQUEST_SUBMITTED;
+				mid->mid_flags &= ~(MID_DELETED);
+				list_add_tail(&mid->qhead,
+					&dw->server->pending_mid_q);
+				spin_unlock(&GlobalMid_Lock);
+			}
+		}
 		cifs_mid_q_entry_release(mid);
 	}
 		(*mid)->decrypted = true;
 		rc = handle_read_data(server, *mid, buf,
 				      server->vals->read_rsp_size,
-				      pages, npages, len);
+				      pages, npages, len, false);
 	}
 free_pages:
 	char *buf = server->large_buf ? server->bigbuf : server->smallbuf;
 	return handle_read_data(server, mid, buf, server->pdu_size,
-				NULL, 0, 0);
+				NULL, 0, 0, false);
 }
 static int

fs/efivarfs/super.c+1−0

@@ -21,6 +21,7 @@ LIST_HEAD(efivarfs_list); · 20 unmodified lines
21	static void efivarfs_evict_inode(struct inode *inode)	21	static void efivarfs_evict_inode(struct inode *inode)
22	{	22	{
23	clear_inode(inode);	23	clear_inode(inode);
		24	kfree(inode->i_private);
24	}	25	}
25		26
26	static const struct super_operations efivarfs_ops = {	27	static const struct super_operations efivarfs_ops = {

fs/ext4/ext4.h+2−1

 			struct ext4_filename *fname);
 static inline void ext4_update_dx_flag(struct inode *inode)
 {
-	if (!ext4_has_feature_dir_index(inode->i_sb)) {
+	if (!ext4_has_feature_dir_index(inode->i_sb) &&
+	    ext4_test_inode_flag(inode, EXT4_INODE_INDEX)) {
 		/* ext4_iget() should have caught this... */
 		WARN_ON_ONCE(ext4_has_feature_metadata_csum(inode->i_sb));
 		ext4_clear_inode_flag(inode, EXT4_INODE_INDEX);

fs/ext4/super.c+0−4

 	} else if (test_opt2(sb, DAX_INODE)) {
 		SEQ_OPTS_PUTS("dax=inode");
 	}
-	if (test_opt2(sb, JOURNAL_FAST_COMMIT))
-		SEQ_OPTS_PUTS("fast_commit");
 	ext4_show_quota_options(seq, sb);
 	return 0;
 }

fs/io_uring.c+62−34

 	struct list_head		file_list;
 	struct fixed_file_data		*file_data;
 	struct llist_node		llist;
+	bool				done;
 };
 struct fixed_file_data {
 struct io_open {
 	struct file			*file;
 	int				dfd;
+	bool				ignore_nonblock;
 	struct filename			*filename;
 	struct open_how			how;
 	unsigned long			nofile;
 			return false;
 		req->work.flags |= IO_WQ_WORK_FSIZE;
 	}
-	if (!(req->work.flags & IO_WQ_WORK_FILES) &&
-	    (def->work_flags & IO_WQ_WORK_FILES) &&
-	    !(req->flags & REQ_F_NO_FILE_TABLE)) {
-		if (id->files != current->files ||
-		    id->nsproxy != current->nsproxy)
-			return false;
-		atomic_inc(&id->files->count);
-		get_nsproxy(id->nsproxy);
-		req->flags |= REQ_F_INFLIGHT;
-		spin_lock_irq(&ctx->inflight_lock);
-		list_add(&req->inflight_entry, &ctx->inflight_list);
-		spin_unlock_irq(&ctx->inflight_lock);
-		req->work.flags |= IO_WQ_WORK_FILES;
-	}
 #ifdef CONFIG_BLK_CGROUP
 	if (!(req->work.flags & IO_WQ_WORK_BLKCG) &&
 	    (def->work_flags & IO_WQ_WORK_BLKCG)) {
 		}
 		spin_unlock(&current->fs->lock);
 	}
+	if (!(req->work.flags & IO_WQ_WORK_FILES) &&
+	    (def->work_flags & IO_WQ_WORK_FILES) &&
+	    !(req->flags & REQ_F_NO_FILE_TABLE)) {
+		if (id->files != current->files ||
+		    id->nsproxy != current->nsproxy)
+			return false;
+		atomic_inc(&id->files->count);
+		get_nsproxy(id->nsproxy);
+		req->flags |= REQ_F_INFLIGHT;
+		spin_lock_irq(&ctx->inflight_lock);
+		list_add(&req->inflight_entry, &ctx->inflight_list);
+		spin_unlock_irq(&ctx->inflight_lock);
+		req->work.flags |= IO_WQ_WORK_FILES;
+	}
 	return true;
 }
 	}
 end_req:
 	req_set_fail_links(req);
-	io_req_complete(req, ret);
 	return false;
 }
 #endif
 	rw->free_iovec = iovec;
 	rw->bytes_done = 0;
 	/* can only be fixed buffers, no need to do anything */
-	if (iter->type == ITER_BVEC)
+	if (iov_iter_is_bvec(iter))
 		return;
 	if (!iovec) {
 		unsigned iov_off = 0;
 		return ret;
 	}
 	req->open.nofile = rlimit(RLIMIT_NOFILE);
+	req->open.ignore_nonblock = false;
 	req->flags |= REQ_F_NEED_CLEANUP;
 	return 0;
 }
 	struct file *file;
 	int ret;
-	if (force_nonblock)
+	if (force_nonblock && !req->open.ignore_nonblock)
 		return -EAGAIN;
 	ret = build_open_flags(&req->open.how, &op);
 	if (IS_ERR(file)) {
 		put_unused_fd(ret);
 		ret = PTR_ERR(file);
+		/*
+		 * A work-around to ensure that /proc/self works that way
+		 * that it should - if we get -EOPNOTSUPP back, then assume
+		 * that proc_self_get_link() failed us because we're in async
+		 * context. We should be safe to retry this from the task
+		 * itself with force_nonblock == false set, as it should not
+		 * block on lookup. Would be nice to know this upfront and
+		 * avoid the async dance, but doesn't seem feasible.
+		 */
+		if (ret == -EOPNOTSUPP && io_wq_current_is_worker()) {
+			req->open.ignore_nonblock = true;
+			refcount_inc(&req->refs);
+			io_req_task_queue(req);
+			return 0;
+		}
 	} else {
 		fsnotify_open(file);
 		fd_install(ret, file);
 		return -ENXIO;
 	spin_lock(&data->lock);
-	if (!list_empty(&data->ref_list))
+	ref_node = data->node;
-		ref_node = list_first_entry(&data->ref_list,
-				struct fixed_file_ref_node, node);
 	spin_unlock(&data->lock);
 	if (ref_node)
 		percpu_ref_kill(&ref_node->refs);
 		kfree(pfile);
 	}
-	spin_lock(&file_data->lock);
-	list_del(&ref_node->node);
-	spin_unlock(&file_data->lock);
 	percpu_ref_exit(&ref_node->refs);
 	kfree(ref_node);
 	percpu_ref_put(&file_data->refs);
 static void io_file_data_ref_zero(struct percpu_ref *ref)
 {
 	struct fixed_file_ref_node *ref_node;
+	struct fixed_file_data *data;
 	struct io_ring_ctx *ctx;
-	bool first_add;
+	bool first_add = false;
 	int delay = HZ;
 	ref_node = container_of(ref, struct fixed_file_ref_node, refs);
-	ctx = ref_node->file_data->ctx;
+	data = ref_node->file_data;
+	ctx = data->ctx;
+	spin_lock(&data->lock);
+	ref_node->done = true;
-	if (percpu_ref_is_dying(&ctx->file_data->refs))
+	while (!list_empty(&data->ref_list)) {
+		ref_node = list_first_entry(&data->ref_list,
+					struct fixed_file_ref_node, node);
+		/* recycle ref nodes in order */
+		if (!ref_node->done)
+			break;
+		list_del(&ref_node->node);
+		first_add |= llist_add(&ref_node->llist, &ctx->file_put_llist);
+	}
+	spin_unlock(&data->lock);
+	if (percpu_ref_is_dying(&data->refs))
 		delay = 0;
-	first_add = llist_add(&ref_node->llist, &ctx->file_put_llist);
 	if (!delay)
 		mod_delayed_work(system_wq, &ctx->file_put_work, 0);
 	else if (first_add)
 	INIT_LIST_HEAD(&ref_node->node);
 	INIT_LIST_HEAD(&ref_node->file_list);
 	ref_node->file_data = ctx->file_data;
+	ref_node->done = false;
 	return ref_node;
 }
 	file_data->node = ref_node;
 	spin_lock(&file_data->lock);
-	list_add(&ref_node->node, &file_data->ref_list);
+	list_add_tail(&ref_node->node, &file_data->ref_list);
 	spin_unlock(&file_data->lock);
 	percpu_ref_get(&file_data->refs);
 	return ret;
 	if (needs_switch) {
 		percpu_ref_kill(&data->node->refs);
 		spin_lock(&data->lock);
-		list_add(&ref_node->node, &data->ref_list);
+		list_add_tail(&ref_node->node, &data->ref_list);
 		data->node = ref_node;
 		spin_unlock(&data->lock);
 		percpu_ref_get(&ctx->file_data->refs);
 		 * to a power-of-two, if it isn't already. We do NOT impose
 		 * any cq vs sq ring sizing.
 		 */
-		p->cq_entries = roundup_pow_of_two(p->cq_entries);
+		if (!p->cq_entries)
-		if (p->cq_entries < p->sq_entries)
 			return -EINVAL;
 		if (p->cq_entries > IORING_MAX_CQ_ENTRIES) {
 			if (!(p->flags & IORING_SETUP_CLAMP))
 				return -EINVAL;
 			p->cq_entries = IORING_MAX_CQ_ENTRIES;
 		}
+		p->cq_entries = roundup_pow_of_two(p->cq_entries);
+		if (p->cq_entries < p->sq_entries)
+			return -EINVAL;
 	} else {
 		p->cq_entries = 2 * p->sq_entries;
 	}

fs/jbd2/journal.c+18−16

 }
 /**
- * Force and wait upon a commit if the calling process is not within
+ * jbd2_journal_force_commit_nested - Force and wait upon a commit if the
- * transaction.  This is used for forcing out undo-protected data which contains
+ * calling process is not within transaction.
- * bitmaps, when the fs is running out of space.
  *
  * @journal: journal to force
  * Returns true if progress was made.
+ *
+ * This is used for forcing out undo-protected data which contains
+ * bitmaps, when the fs is running out of space.
  */
 int jbd2_journal_force_commit_nested(journal_t *journal)
 {
 }
 /**
- * int journal_force_commit() - force any uncommitted transactions
+ * jbd2_journal_force_commit() - force any uncommitted transactions
  * @journal: journal to force
  *
  * Caller want unconditional commit. We can only force the running transaction
 /**
- * int jbd2_journal_load() - Read journal from disk.
+ * jbd2_journal_load() - Read journal from disk.
  * @journal: Journal to act on.
  *
  * Given a journal_t structure which tells us which disk blocks contain
 }
 /**
- * void jbd2_journal_destroy() - Release a journal_t structure.
+ * jbd2_journal_destroy() - Release a journal_t structure.
  * @journal: Journal to act on.
  *
  * Release a journal_t structure once it is no longer in use by the
 /**
- *int jbd2_journal_check_used_features() - Check if features specified are used.
+ * jbd2_journal_check_used_features() - Check if features specified are used.
  * @journal: Journal to check.
  * @compat: bitmask of compatible features
  * @ro: bitmask of features that force read-only mount
 }
 /**
- * int jbd2_journal_check_available_features() - Check feature set in journalling layer
+ * jbd2_journal_check_available_features() - Check feature set in journalling layer
  * @journal: Journal to check.
  * @compat: bitmask of compatible features
  * @ro: bitmask of features that force read-only mount
 }
 /**
- * int jbd2_journal_set_features() - Mark a given journal feature in the superblock
+ * jbd2_journal_set_features() - Mark a given journal feature in the superblock
  * @journal: Journal to act on.
  * @compat: bitmask of compatible features
  * @ro: bitmask of features that force read-only mount
 }
 /*
- * jbd2_journal_clear_features () - Clear a given journal feature in the
+ * jbd2_journal_clear_features() - Clear a given journal feature in the
  * 				    superblock
  * @journal: Journal to act on.
  * @compat: bitmask of compatible features
 EXPORT_SYMBOL(jbd2_journal_clear_features);
 /**
- * int jbd2_journal_flush () - Flush journal
+ * jbd2_journal_flush() - Flush journal
  * @journal: Journal to act on.
  *
  * Flush all data for a given journal to disk and empty the journal.
 }
 /**
- * int jbd2_journal_wipe() - Wipe journal contents
+ * jbd2_journal_wipe() - Wipe journal contents
  * @journal: Journal to act on.
  * @write: flag (see below)
  *
 }
 /**
- * void jbd2_journal_abort () - Shutdown the journal immediately.
+ * jbd2_journal_abort () - Shutdown the journal immediately.
  * @journal: the journal to shutdown.
  * @errno:   an error number to record in the journal indicating
  *           the reason for the shutdown.
 }
 /**
- * int jbd2_journal_errno () - returns the journal's error state.
+ * jbd2_journal_errno() - returns the journal's error state.
  * @journal: journal to examine.
  *
  * This is the errno number set with jbd2_journal_abort(), the last
 }
 /**
- * int jbd2_journal_clear_err () - clears the journal's error state
+ * jbd2_journal_clear_err() - clears the journal's error state
  * @journal: journal to act on.
  *
  * An error must be cleared or acked to take a FS out of readonly
 }
 /**
- * void jbd2_journal_ack_err() - Ack journal err.
+ * jbd2_journal_ack_err() - Ack journal err.
  * @journal: journal to act on.
  *
  * An error must be cleared or acked to take a FS out of readonly

fs/jbd2/transaction.c+16−15

 /**
- * handle_t *jbd2_journal_start() - Obtain a new handle.
+ * jbd2_journal_start() - Obtain a new handle.
  * @journal: Journal to start transaction on.
  * @nblocks: number of block buffer we might modify
  *
 EXPORT_SYMBOL(jbd2_journal_free_reserved);
 /**
- * int jbd2_journal_start_reserved() - start reserved handle
+ * jbd2_journal_start_reserved() - start reserved handle
  * @handle: handle to start
  * @type: for handle statistics
  * @line_no: for handle statistics
 EXPORT_SYMBOL(jbd2_journal_start_reserved);
 /**
- * int jbd2_journal_extend() - extend buffer credits.
+ * jbd2_journal_extend() - extend buffer credits.
  * @handle:  handle to 'extend'
  * @nblocks: nr blocks to try to extend by.
  * @revoke_records: number of revoke records to try to extend by.
 }
 /**
- * int jbd2_journal_restart() - restart a handle .
+ * jbd2__journal_restart() - restart a handle .
  * @handle:  handle to restart
  * @nblocks: nr credits requested
  * @revoke_records: number of revoke record credits requested
 EXPORT_SYMBOL(jbd2_journal_restart);
 /**
- * void jbd2_journal_lock_updates () - establish a transaction barrier.
+ * jbd2_journal_lock_updates () - establish a transaction barrier.
  * @journal:  Journal to establish a barrier on.
  *
  * This locks out any further updates from being started, and blocks
 }
 /**
- * void jbd2_journal_unlock_updates (journal_t* journal) - release barrier
+ * jbd2_journal_unlock_updates () - release barrier
  * @journal:  Journal to release the barrier on.
  *
  * Release a transaction barrier obtained with jbd2_journal_lock_updates().
 }
 /**
- * int jbd2_journal_get_write_access() - notify intent to modify a buffer for metadata (not data) update.
+ * jbd2_journal_get_write_access() - notify intent to modify a buffer
+ *				     for metadata (not data) update.
  * @handle: transaction to add buffer modifications to
  * @bh:     bh to be used for metadata writes
  *
  * unlocked buffer beforehand. */
 /**
- * int jbd2_journal_get_create_access () - notify intent to use newly created bh
+ * jbd2_journal_get_create_access () - notify intent to use newly created bh
  * @handle: transaction to new buffer to
  * @bh: new buffer.
  *
 }
 /**
- * int jbd2_journal_get_undo_access() -  Notify intent to modify metadata with
+ * jbd2_journal_get_undo_access() -  Notify intent to modify metadata with
  *     non-rewindable consequences
  * @handle: transaction
  * @bh: buffer to undo
 }
 /**
- * void jbd2_journal_set_triggers() - Add triggers for commit writeout
+ * jbd2_journal_set_triggers() - Add triggers for commit writeout
  * @bh: buffer to trigger on
  * @type: struct jbd2_buffer_trigger_type containing the trigger(s).
  *
 }
 /**
- * int jbd2_journal_dirty_metadata() -  mark a buffer as containing dirty metadata
+ * jbd2_journal_dirty_metadata() -  mark a buffer as containing dirty metadata
  * @handle: transaction to add buffer to.
  * @bh: buffer to mark
  *
 }
 /**
- * void jbd2_journal_forget() - bforget() for potentially-journaled buffers.
+ * jbd2_journal_forget() - bforget() for potentially-journaled buffers.
  * @handle: transaction handle
  * @bh:     bh to 'forget'
  *
 }
 /**
- * int jbd2_journal_stop() - complete a transaction
+ * jbd2_journal_stop() - complete a transaction
  * @handle: transaction to complete.
  *
  * All done for a particular handle.
 }
 /**
- * int jbd2_journal_try_to_free_buffers() - try to free page buffers.
+ * jbd2_journal_try_to_free_buffers() - try to free page buffers.
  * @journal: journal for operation
  * @page: to try and free
  *
 }
 /**
- * void jbd2_journal_invalidatepage()
+ * jbd2_journal_invalidatepage()
  * @journal: journal to use for flush...
  * @page:    page to flush
  * @offset:  start of the range to invalidate

fs/libfs.c+4−2

 			  size_t len, loff_t *ppos)
 {
 	struct simple_attr *attr;
-	u64 val;
+	unsigned long long val;
 	size_t size;
 	ssize_t ret;
 		goto out;
 	attr->set_buf[size] = '\0';
-	val = simple_strtoll(attr->set_buf, NULL, 0);
+	ret = kstrtoull(attr->set_buf, 0, &val);
+	if (ret)
+		goto out;
 	ret = attr->set(attr->data, val);
 	if (ret == 0)
 		ret = len; /* on success, claim we got the whole input */

fs/notify/fsnotify.c+7−5

 	struct inode *inode = d_inode(dentry);
 	struct dentry *parent;
 	bool parent_watched = dentry->d_flags & DCACHE_FSNOTIFY_PARENT_WATCHED;
+	bool parent_needed, parent_interested;
 	__u32 p_mask;
 	struct inode *p_inode = NULL;
 	struct name_snapshot name;
 		return 0;
 	parent = NULL;
-	if (!parent_watched && !fsnotify_event_needs_parent(inode, mnt, mask))
+	parent_needed = fsnotify_event_needs_parent(inode, mnt, mask);
+	if (!parent_watched && !parent_needed)
 		goto notify;
 	/* Does parent inode care about events on children? */
 	/*
 	 * Include parent/name in notification either if some notification
-	 * groups require parent info (!parent_watched case) or the parent is
+	 * groups require parent info or the parent is interested in this event.
-	 * interested in this event.
 	 */
-	if (!parent_watched || (mask & p_mask & ALL_FSNOTIFY_EVENTS)) {
+	parent_interested = mask & p_mask & ALL_FSNOTIFY_EVENTS;
+	if (parent_needed || parent_interested) {
 		/* When notifying parent, child should be passed as data */
 		WARN_ON_ONCE(inode != fsnotify_data_inode(data, data_type));
 		/* Notify both parent and child with child name info */
 		take_dentry_name_snapshot(&name, dentry);
 		file_name = &name.name;
-		if (parent_watched)
+		if (parent_interested)
 			mask |= FS_EVENT_ON_CHILD;
 	}

fs/proc/self.c+7−0

@@ -16,6 +16,13 @@ static const char proc_self_get_link(struct dentry dentry, · 15 unmodified lines
16	pid_t tgid = task_tgid_nr_ns(current, ns);	16	pid_t tgid = task_tgid_nr_ns(current, ns);
17	char *name;	17	char *name;
18		18
		19	/*
		20	* Not currently supported. Once we can inherit all of struct pid,
		21	* we can allow this.
		22	*/
		23	if (current->flags & PF_KTHREAD)
		24	return ERR_PTR(-EOPNOTSUPP);
		25
19	if (!tgid)	26	if (!tgid)
20	return ERR_PTR(-ENOENT);	27	return ERR_PTR(-ENOENT);
21	/* max length of unsigned int in decimal + NULL term */	28	/* max length of unsigned int in decimal + NULL term */

fs/xfs/libxfs/xfs_attr_leaf.c+7−1

  *========================================================================*/
 /*
- * Query whether the requested number of additional bytes of extended
+ * Query whether the total requested number of attr fork bytes of extended
  * attribute space will be able to fit inline.
  *
  * Returns zero if not, else the di_forkoff fork offset to be used in the
 	int			maxforkoff;
 	int			offset;
+	/*
+	 * Check if the new size could fit at all first:
+	 */
+	if (bytes > XFS_LITINO(mp))
+		return 0;
 	/* rounded down */
 	offset = (XFS_LITINO(mp) - bytes) >> 3;

fs/xfs/libxfs/xfs_rmap_btree.c+8−8

@@ -243,8 +243,8 @@ xfs_rmapbt_key_diff( · 242 unmodified lines
243	else if (y > x)	243	else if (y > x)
244	return -1;	244	return -1;
245		245
246	x = be64_to_cpu(kp->rm_offset);	246	x = XFS_RMAP_OFF(be64_to_cpu(kp->rm_offset));
247	y = xfs_rmap_irec_offset_pack(rec);	247	y = rec->rm_offset;
248	if (x > y)	248	if (x > y)
249	return 1;	249	return 1;
250	else if (y > x)	250	else if (y > x)
@@ -275,8 +275,8 @@ xfs_rmapbt_diff_two_keys( · 24 unmodified lines
275	else if (y > x)	275	else if (y > x)
276	return -1;	276	return -1;
277		277
278	x = be64_to_cpu(kp1->rm_offset);	278	x = XFS_RMAP_OFF(be64_to_cpu(kp1->rm_offset));
279	y = be64_to_cpu(kp2->rm_offset);	279	y = XFS_RMAP_OFF(be64_to_cpu(kp2->rm_offset));
280	if (x > y)	280	if (x > y)
281	return 1;	281	return 1;
282	else if (y > x)	282	else if (y > x)
@@ -390,8 +390,8 @@ xfs_rmapbt_keys_inorder( · 107 unmodified lines
390	return 1;	390	return 1;
391	else if (a > b)	391	else if (a > b)
392	return 0;	392	return 0;
393	a = be64_to_cpu(k1->rmap.rm_offset);	393	a = XFS_RMAP_OFF(be64_to_cpu(k1->rmap.rm_offset));
394	b = be64_to_cpu(k2->rmap.rm_offset);	394	b = XFS_RMAP_OFF(be64_to_cpu(k2->rmap.rm_offset));
395	if (a <= b)	395	if (a <= b)
396	return 1;	396	return 1;
397	return 0;	397	return 0;
@@ -420,8 +420,8 @@ xfs_rmapbt_recs_inorder( · 22 unmodified lines
420	return 1;	420	return 1;
421	else if (a > b)	421	else if (a > b)
422	return 0;	422	return 0;
423	a = be64_to_cpu(r1->rmap.rm_offset);	423	a = XFS_RMAP_OFF(be64_to_cpu(r1->rmap.rm_offset));
424	b = be64_to_cpu(r2->rmap.rm_offset);	424	b = XFS_RMAP_OFF(be64_to_cpu(r2->rmap.rm_offset));
425	if (a <= b)	425	if (a <= b)
426	return 1;	426	return 1;
427	return 0;	427	return 0;

fs/xfs/scrub/bmap.c+4−4

@@ -218,13 +218,13 @@ xchk_bmap_xref_rmap( · 217 unmodified lines
218	* which doesn't track unwritten state.	218	* which doesn't track unwritten state.
219	*/	219	*/
220	if (owner != XFS_RMAP_OWN_COW &&	220	if (owner != XFS_RMAP_OWN_COW &&
221	irec->br_state == XFS_EXT_UNWRITTEN &&	221	!!(irec->br_state == XFS_EXT_UNWRITTEN) !=
222	!(rmap.rm_flags & XFS_RMAP_UNWRITTEN))	222	!!(rmap.rm_flags & XFS_RMAP_UNWRITTEN))
223	xchk_fblock_xref_set_corrupt(info->sc, info->whichfork,	223	xchk_fblock_xref_set_corrupt(info->sc, info->whichfork,
224	irec->br_startoff);	224	irec->br_startoff);
225		225
226	if (info->whichfork == XFS_ATTR_FORK &&	226	if (!!(info->whichfork == XFS_ATTR_FORK) !=
227	!(rmap.rm_flags & XFS_RMAP_ATTR_FORK))	227	!!(rmap.rm_flags & XFS_RMAP_ATTR_FORK))
228	xchk_fblock_xref_set_corrupt(info->sc, info->whichfork,	228	xchk_fblock_xref_set_corrupt(info->sc, info->whichfork,
229	irec->br_startoff);	229	irec->br_startoff);
230	if (rmap.rm_flags & XFS_RMAP_BMBT_BLOCK)	230	if (rmap.rm_flags & XFS_RMAP_BMBT_BLOCK)

fs/xfs/scrub/btree.c+27−18

@@ -452,32 +452,41 @@ xchk_btree_check_minrecs( · 451 unmodified lines
452	int level,	452	int level,
453	struct xfs_btree_block *block)	453	struct xfs_btree_block *block)
454	{	454	{
455	unsigned int numrecs;	455	struct xfs_btree_cur *cur = bs->cur;
456	int ok_level;	456	unsigned int root_level = cur->bc_nlevels - 1;
457		457	unsigned int numrecs = be16_to_cpu(block->bb_numrecs);
458	numrecs = be16_to_cpu(block->bb_numrecs);
459		458
460	/* More records than minrecs means the block is ok. */	459	/* More records than minrecs means the block is ok. */
461	if (numrecs >= bs->cur->bc_ops->get_minrecs(bs->cur, level))	460	if (numrecs >= cur->bc_ops->get_minrecs(cur, level))
462	return;	461	return;
463		462
464	/*	463	/*
465	* Certain btree blocks /can/ have fewer than minrecs records. Any	464	* For btrees rooted in the inode, it's possible that the root block
466	* level greater than or equal to the level of the highest dedicated	465	* contents spilled into a regular ondisk block because there wasn't
467	* btree block are allowed to violate this constraint.	466	* enough space in the inode root. The number of records in that
468	*	467	* child block might be less than the standard minrecs, but that's ok
469	* For a btree rooted in a block, the btree root can have fewer than	468	* provided that there's only one direct child of the root.
470	* minrecs records. If the btree is rooted in an inode and does not
471	* store records in the root, the direct children of the root and the
472	* root itself can have fewer than minrecs records.
473	*/	469	*/
474	ok_level = bs->cur->bc_nlevels - 1;	470	if ((cur->bc_flags & XFS_BTREE_ROOT_IN_INODE) &&
475	if (bs->cur->bc_flags & XFS_BTREE_ROOT_IN_INODE)	471	level == cur->bc_nlevels - 2) {
476	ok_level--;	472	struct xfs_btree_block *root_block;
477	if (level >= ok_level)	473	struct xfs_buf *root_bp;
		474	int root_maxrecs;
		475
		476	root_block = xfs_btree_get_block(cur, root_level, &root_bp);
		477	root_maxrecs = cur->bc_ops->get_dmaxrecs(cur, root_level);
		478	if (be16_to_cpu(root_block->bb_numrecs) != 1 \|\|
		479	numrecs <= root_maxrecs)
		480	xchk_btree_set_corrupt(bs->sc, cur, level);
478	return;	481	return;
		482	}
479		483
480	xchk_btree_set_corrupt(bs->sc, bs->cur, level);	484	/*
		485	* Otherwise, only the root level is allowed to have fewer than minrecs
		486	* records or keyptrs.
		487	*/
		488	if (level < root_level)
		489	xchk_btree_set_corrupt(bs->sc, cur, level);
481	}	490	}
482		491
483	/*	492	/*

fs/xfs/scrub/dir.c+17−4

@@ -558,14 +558,27 @@ xchk_directory_leaf1_bestfree( · 557 unmodified lines
558	/* Check all the bestfree entries. */	558	/* Check all the bestfree entries. */
559	for (i = 0; i < bestcount; i++, bestp++) {	559	for (i = 0; i < bestcount; i++, bestp++) {
560	best = be16_to_cpu(*bestp);	560	best = be16_to_cpu(*bestp);
561	if (best == NULLDATAOFF)
562	continue;
563	error = xfs_dir3_data_read(sc->tp, sc->ip,	561	error = xfs_dir3_data_read(sc->tp, sc->ip,
564	i * args->geo->fsbcount, 0, &dbp);	562	xfs_dir2_db_to_da(args->geo, i),
		563	XFS_DABUF_MAP_HOLE_OK,
		564	&dbp);
565	if (!xchk_fblock_process_error(sc, XFS_DATA_FORK, lblk,	565	if (!xchk_fblock_process_error(sc, XFS_DATA_FORK, lblk,
566	&error))	566	&error))
567	break;	567	break;
568	xchk_directory_check_freesp(sc, lblk, dbp, best);	568
		569	if (!dbp) {
		570	if (best != NULLDATAOFF) {
		571	xchk_fblock_set_corrupt(sc, XFS_DATA_FORK,
		572	lblk);
		573	break;
		574	}
		575	continue;
		576	}
		577
		578	if (best == NULLDATAOFF)
		579	xchk_fblock_set_corrupt(sc, XFS_DATA_FORK, lblk);
		580	else
		581	xchk_directory_check_freesp(sc, lblk, dbp, best);
569	xfs_trans_brelse(sc->tp, dbp);	582	xfs_trans_brelse(sc->tp, dbp);
570	if (sc->sm->sm_flags & XFS_SCRUB_OFLAG_CORRUPT)	583	if (sc->sm->sm_flags & XFS_SCRUB_OFLAG_CORRUPT)
571	break;	584	break;

fs/xfs/xfs_iomap.c+29−0

@@ -706,6 +706,23 @@ relock: · 705 unmodified lines
706	return 0;	706	return 0;
707	}	707	}
708		708
		709	/*
		710	* Check that the imap we are going to return to the caller spans the entire
		711	* range that the caller requested for the IO.
		712	*/
		713	static bool
		714	imap_spans_range(
		715	struct xfs_bmbt_irec *imap,
		716	xfs_fileoff_t offset_fsb,
		717	xfs_fileoff_t end_fsb)
		718	{
		719	if (imap->br_startoff > offset_fsb)
		720	return false;
		721	if (imap->br_startoff + imap->br_blockcount < end_fsb)
		722	return false;
		723	return true;
		724	}
		725
709	static int	726	static int
710	xfs_direct_write_iomap_begin(	727	xfs_direct_write_iomap_begin(
711	struct inode *inode,	728	struct inode *inode,
@@ -766,6 +783,18 @@ xfs_direct_write_iomap_begin( · 54 unmodified lines
766	if (imap_needs_alloc(inode, flags, &imap, nimaps))	783	if (imap_needs_alloc(inode, flags, &imap, nimaps))
767	goto allocate_blocks;	784	goto allocate_blocks;
768		785
		786	/*
		787	* NOWAIT IO needs to span the entire requested IO with a single map so
		788	* that we avoid partial IO failures due to the rest of the IO range not
		789	* covered by this map triggering an EAGAIN condition when it is
		790	* subsequently mapped and aborting the IO.
		791	*/
		792	if ((flags & IOMAP_NOWAIT) &&
		793	!imap_spans_range(&imap, offset_fsb, end_fsb)) {
		794	error = -EAGAIN;
		795	goto out_unlock;
		796	}
		797
769	xfs_iunlock(ip, lockmode);	798	xfs_iunlock(ip, lockmode);
770	trace_xfs_iomap_found(ip, offset, length, XFS_DATA_FORK, &imap);	799	trace_xfs_iomap_found(ip, offset, length, XFS_DATA_FORK, &imap);
771	return xfs_bmbt_to_iomap(ip, iomap, &imap, iomap_flags);	800	return xfs_bmbt_to_iomap(ip, iomap, &imap, iomap_flags);

fs/xfs/xfs_iwalk.c+24−3

 	/* Where do we start the traversal? */
 	xfs_ino_t			startino;
+	/* What was the last inode number we saw when iterating the inobt? */
+	xfs_ino_t			lastino;
 	/* Array of inobt records we cache. */
 	struct xfs_inobt_rec_incore	*recs;
 	if (XFS_IS_CORRUPT(mp, *has_more != 1))
 		return -EFSCORRUPTED;
+	iwag->lastino = XFS_AGINO_TO_INO(mp, agno,
+				irec->ir_startino + XFS_INODES_PER_CHUNK - 1);
 	/*
 	 * If the LE lookup yielded an inobt record before the cursor position,
 	 * skip it and see if there's another one after it.
 	struct xfs_mount		*mp = iwag->mp;
 	struct xfs_trans		*tp = iwag->tp;
 	struct xfs_inobt_rec_incore	*irec;
-	xfs_agino_t			restart;
+	xfs_agino_t			next_agino;
 	int				error;
+	next_agino = XFS_INO_TO_AGINO(mp, iwag->lastino) + 1;
 	ASSERT(iwag->nr_recs > 0);
 	/* Delete cursor but remember the last record we cached... */
 	xfs_iwalk_del_inobt(tp, curpp, agi_bpp, 0);
 	irec = &iwag->recs[iwag->nr_recs - 1];
-	restart = irec->ir_startino + XFS_INODES_PER_CHUNK - 1;
+	ASSERT(next_agino == irec->ir_startino + XFS_INODES_PER_CHUNK);
 	error = xfs_iwalk_ag_recs(iwag);
 	if (error)
 	if (error)
 		return error;
-	return xfs_inobt_lookup(*curpp, restart, XFS_LOOKUP_GE, has_more);
+	return xfs_inobt_lookup(*curpp, next_agino, XFS_LOOKUP_GE, has_more);
 }
 /* Walk all inodes in a single AG, from @iwag->startino to the end of the AG. */
 	while (!error && has_more) {
 		struct xfs_inobt_rec_incore	*irec;
+		xfs_ino_t			rec_fsino;
 		cond_resched();
 		if (xfs_pwork_want_abort(&iwag->pwork))
 		if (error || !has_more)
 			break;
+		/* Make sure that we always move forward. */
+		rec_fsino = XFS_AGINO_TO_INO(mp, agno, irec->ir_startino);
+		if (iwag->lastino != NULLFSINO &&
+		    XFS_IS_CORRUPT(mp, iwag->lastino >= rec_fsino)) {
+			error = -EFSCORRUPTED;
+			goto out;
+		}
+		iwag->lastino = rec_fsino + XFS_INODES_PER_CHUNK - 1;
 		/* No allocated inodes in this chunk; skip it. */
 		if (iwag->skip_empty && irec->ir_freecount == irec->ir_count) {
 			error = xfs_btree_increment(cur, 0, &has_more);
 		.trim_start	= 1,
 		.skip_empty	= 1,
 		.pwork		= XFS_PWORK_SINGLE_THREADED,
+		.lastino	= NULLFSINO,
 	};
 	xfs_agnumber_t		agno = XFS_INO_TO_AGNO(mp, startino);
 	int			error;
 		iwag->data = data;
 		iwag->startino = startino;
 		iwag->sz_recs = xfs_iwalk_prefetch(inode_records);
+		iwag->lastino = NULLFSINO;
 		xfs_pwork_queue(&pctl, &iwag->pwork);
 		startino = XFS_AGINO_TO_INO(mp, agno + 1, 0);
 		if (flags & XFS_INOBT_WALK_SAME_AG)
 		.startino	= startino,
 		.sz_recs	= xfs_inobt_walk_prefetch(inobt_records),
 		.pwork		= XFS_PWORK_SINGLE_THREADED,
+		.lastino	= NULLFSINO,
 	};
 	xfs_agnumber_t		agno = XFS_INO_TO_AGNO(mp, startino);
 	int			error;

fs/xfs/xfs_mount.c+8−3

@@ -194,20 +194,25 @@ xfs_initialize_perag( · 193 unmodified lines
194	}	194	}
195		195
196	pag = kmem_zalloc(sizeof(*pag), KM_MAYFAIL);	196	pag = kmem_zalloc(sizeof(*pag), KM_MAYFAIL);
197	if (!pag)	197	if (!pag) {
		198	error = -ENOMEM;
198	goto out_unwind_new_pags;	199	goto out_unwind_new_pags;
		200	}
199	pag->pag_agno = index;	201	pag->pag_agno = index;
200	pag->pag_mount = mp;	202	pag->pag_mount = mp;
201	spin_lock_init(&pag->pag_ici_lock);	203	spin_lock_init(&pag->pag_ici_lock);
202	INIT_RADIX_TREE(&pag->pag_ici_root, GFP_ATOMIC);	204	INIT_RADIX_TREE(&pag->pag_ici_root, GFP_ATOMIC);
203	if (xfs_buf_hash_init(pag))	205
		206	error = xfs_buf_hash_init(pag);
		207	if (error)
204	goto out_free_pag;	208	goto out_free_pag;
205	init_waitqueue_head(&pag->pagb_wait);	209	init_waitqueue_head(&pag->pagb_wait);
206	spin_lock_init(&pag->pagb_lock);	210	spin_lock_init(&pag->pagb_lock);
207	pag->pagb_count = 0;	211	pag->pagb_count = 0;
208	pag->pagb_tree = RB_ROOT;	212	pag->pagb_tree = RB_ROOT;
209		213
210	if (radix_tree_preload(GFP_NOFS))	214	error = radix_tree_preload(GFP_NOFS);
		215	if (error)
211	goto out_hash_destroy;	216	goto out_hash_destroy;
212		217
213	spin_lock(&mp->m_perag_lock);	218	spin_lock(&mp->m_perag_lock);

include/linux/compiler-clang.h+2−0

@@ -8,8 +8,10 @@ · 7 unmodified lines
8	+ __clang_patchlevel__)	8	+ __clang_patchlevel__)
9		9
10	#if CLANG_VERSION < 100001	10	#if CLANG_VERSION < 100001
		11	#ifndef __BPF_TRACING__
11	# error Sorry, your version of Clang is too old - please use 10.0.1 or newer.	12	# error Sorry, your version of Clang is too old - please use 10.0.1 or newer.
12	#endif	13	#endif
		14	#endif
13		15
14	/* Compiler specific definitions for Clang compiler */	16	/* Compiler specific definitions for Clang compiler */
15		17

include/linux/firmware/xlnx-zynqmp.h+0−4

 #define	ZYNQMP_PM_CAPABILITY_WAKEUP	0x4U
 #define	ZYNQMP_PM_CAPABILITY_UNUSABLE	0x8U
-/* Feature check status */
-#define PM_FEATURE_INVALID		-1
-#define PM_FEATURE_UNCHECKED		0
 /*
  * Firmware FPGA Manager flags
  * XILINX_ZYNQMP_PM_FPGA_FULL:	FPGA full reconfiguration

include/linux/intel-iommu.h+0−1

@@ -798,7 +798,6 @@ extern int iommu_calculate_agaw(struct intel_iommu *iommu); · 797 unmodified lines
798	extern int iommu_calculate_max_sagaw(struct intel_iommu *iommu);	798	extern int iommu_calculate_max_sagaw(struct intel_iommu *iommu);
799	extern int dmar_disabled;	799	extern int dmar_disabled;
800	extern int intel_iommu_enabled;	800	extern int intel_iommu_enabled;
801	extern int intel_iommu_tboot_noforce;
802	extern int intel_iommu_gfx_mapped;	801	extern int intel_iommu_gfx_mapped;
803	#else	802	#else
804	static inline int iommu_calculate_agaw(struct intel_iommu *iommu)	803	static inline int iommu_calculate_agaw(struct intel_iommu *iommu)

include/linux/jbd2.h+1−1

@@ -401,7 +401,7 @@ static inline void jbd_unlock_bh_journal_head(struct buffer_head *bh) · 400 unmodified lines
401	#define JI_WAIT_DATA (1 << __JI_WAIT_DATA)	401	#define JI_WAIT_DATA (1 << __JI_WAIT_DATA)
402		402
403	/**	403	/**
404	* struct jbd_inode - The jbd_inode type is the structure linking inodes in	404	* struct jbd2_inode - The jbd_inode type is the structure linking inodes in
405	* ordered mode present in a transaction so that we can sync them during commit.	405	* ordered mode present in a transaction so that we can sync them during commit.
406	*/	406	*/
407	struct jbd2_inode {	407	struct jbd2_inode {

include/linux/memcontrol.h+14−14

 	MEMCG_PADDING(_pad1_);
-	/*
-	 * set > 0 if pages under this cgroup are moving to other cgroup.
-	 */
-	atomic_t		moving_account;
-	struct task_struct	*move_lock_task;
-	/* Legacy local VM stats and events */
-	struct memcg_vmstats_percpu __percpu *vmstats_local;
-	/* Subtree VM stats and events (batched updates) */
-	struct memcg_vmstats_percpu __percpu *vmstats_percpu;
-	MEMCG_PADDING(_pad2_);
 	atomic_long_t		vmstats[MEMCG_NR_STAT];
 	atomic_long_t		vmevents[NR_VM_EVENT_ITEMS];
 	struct list_head objcg_list; /* list of inherited objcgs */
 #endif
+	MEMCG_PADDING(_pad2_);
+	/*
+	 * set > 0 if pages under this cgroup are moving to other cgroup.
+	 */
+	atomic_t		moving_account;
+	struct task_struct	*move_lock_task;
+	/* Legacy local VM stats and events */
+	struct memcg_vmstats_percpu __percpu *vmstats_local;
+	/* Subtree VM stats and events (batched updates) */
+	struct memcg_vmstats_percpu __percpu *vmstats_percpu;
 #ifdef CONFIG_CGROUP_WRITEBACK
 	struct list_head cgwb_list;
 	struct wb_domain cgwb_domain;

include/linux/memory_hotplug.h+0−14

@@ -281,20 +281,6 @@ static inline bool movable_node_is_enabled(void) · 280 unmodified lines
281	}	281	}
282	#endif /* ! CONFIG_MEMORY_HOTPLUG */	282	#endif /* ! CONFIG_MEMORY_HOTPLUG */
283		283
284	#ifdef CONFIG_NUMA
285	extern int memory_add_physaddr_to_nid(u64 start);
286	extern int phys_to_target_node(u64 start);
287	#else
288	static inline int memory_add_physaddr_to_nid(u64 start)
289	{
290	return 0;
291	}
292	static inline int phys_to_target_node(u64 start)
293	{
294	return 0;
295	}
296	#endif
297
298	#if defined(CONFIG_MEMORY_HOTPLUG) \|\| defined(CONFIG_DEFERRED_STRUCT_PAGE_INIT)	284	#if defined(CONFIG_MEMORY_HOTPLUG) \|\| defined(CONFIG_DEFERRED_STRUCT_PAGE_INIT)
299	/*	285	/*
300	* pgdat resizing functions	286	* pgdat resizing functions

include/linux/netdevice.h+5−0

 	return false;
 }
+static inline bool dev_has_header(const struct net_device *dev)
+{
+	return dev->header_ops && dev->header_ops->create;
+}
 typedef int gifconf_func_t(struct net_device * dev, char __user * bufptr,
 			   int len, int size);
 int register_gifconf(unsigned int family, gifconf_func_t *gifconf);

include/linux/numa.h+29−1

@@ -21,13 +21,41 @@ · 20 unmodified lines
21	#endif	21	#endif
22		22
23	#ifdef CONFIG_NUMA	23	#ifdef CONFIG_NUMA
		24	#include <linux/printk.h>
		25	#include <asm/sparsemem.h>
		26
24	/* Generic implementation available */	27	/* Generic implementation available */
25	int numa_map_to_online_node(int node);	28	int numa_map_to_online_node(int node);
26	#else	29
		30	#ifndef memory_add_physaddr_to_nid
		31	static inline int memory_add_physaddr_to_nid(u64 start)
		32	{
		33	pr_info_once("Unknown online node for memory at 0x%llx, assuming node 0\n",
		34	start);
		35	return 0;
		36	}
		37	#endif
		38	#ifndef phys_to_target_node
		39	static inline int phys_to_target_node(u64 start)
		40	{
		41	pr_info_once("Unknown target node for memory at 0x%llx, assuming node 0\n",
		42	start);
		43	return 0;
		44	}
		45	#endif
		46	#else /* !CONFIG_NUMA */
27	static inline int numa_map_to_online_node(int node)	47	static inline int numa_map_to_online_node(int node)
28	{	48	{
29	return NUMA_NO_NODE;	49	return NUMA_NO_NODE;
30	}	50	}
		51	static inline int memory_add_physaddr_to_nid(u64 start)
		52	{
		53	return 0;
		54	}
		55	static inline int phys_to_target_node(u64 start)
		56	{
		57	return 0;
		58	}
31	#endif	59	#endif
32		60
33	#endif /* _LINUX_NUMA_H */	61	#endif /* _LINUX_NUMA_H */

include/linux/pagemap.h+2−0

 	xas_set(&xas, rac->_index);
 	rcu_read_lock();
 	xas_for_each(&xas, page, rac->_index + rac->_nr_pages - 1) {
+		if (xas_retry(&xas, page))
+			continue;
 		VM_BUG_ON_PAGE(!PageLocked(page), page);
 		VM_BUG_ON_PAGE(PageTail(page), page);
 		array[i++] = page;

include/linux/pgtable.h+13−0

@@ -1427,6 +1427,19 @@ typedef unsigned int pgtbl_mod_mask; · 1426 unmodified lines
1427		1427
1428	#endif /* !__ASSEMBLY__ */	1428	#endif /* !__ASSEMBLY__ */
1429		1429
		1430	#if !defined(MAX_POSSIBLE_PHYSMEM_BITS) && !defined(CONFIG_64BIT)
		1431	#ifdef CONFIG_PHYS_ADDR_T_64BIT
		1432	/*
		1433	* ZSMALLOC needs to know the highest PFN on 32-bit architectures
		1434	* with physical address space extension, but falls back to
		1435	* BITS_PER_LONG otherwise.
		1436	*/
		1437	#error Missing MAX_POSSIBLE_PHYSMEM_BITS definition
		1438	#else
		1439	#define MAX_POSSIBLE_PHYSMEM_BITS 32
		1440	#endif
		1441	#endif
		1442
1430	#ifndef has_transparent_hugepage	1443	#ifndef has_transparent_hugepage
1431	#ifdef CONFIG_TRANSPARENT_HUGEPAGE	1444	#ifdef CONFIG_TRANSPARENT_HUGEPAGE
1432	#define has_transparent_hugepage() 1	1445	#define has_transparent_hugepage() 1

include/linux/platform_data/ti-sysc.h+1−0

@@ -50,6 +50,7 @@ struct sysc_regbits { · 49 unmodified lines
50	s8 emufree_shift;	50	s8 emufree_shift;
51	};	51	};
52		52
		53	#define SYSC_MODULE_QUIRK_ENA_RESETDONE BIT(25)
53	#define SYSC_MODULE_QUIRK_PRUSS BIT(24)	54	#define SYSC_MODULE_QUIRK_PRUSS BIT(24)
54	#define SYSC_MODULE_QUIRK_DSS_RESET BIT(23)	55	#define SYSC_MODULE_QUIRK_DSS_RESET BIT(23)
55	#define SYSC_MODULE_QUIRK_RTC_UNLOCK BIT(22)	56	#define SYSC_MODULE_QUIRK_RTC_UNLOCK BIT(22)

include/linux/sched.h+24−2

 	 * overruns.
 	 */
 	unsigned int			dl_throttled      : 1;
-	unsigned int			dl_boosted        : 1;
 	unsigned int			dl_yielded        : 1;
 	unsigned int			dl_non_contending : 1;
 	unsigned int			dl_overrun	  : 1;
 	 * time.
 	 */
 	struct hrtimer inactive_timer;
+#ifdef CONFIG_RT_MUTEXES
+	/*
+	 * Priority Inheritance. When a DEADLINE scheduling entity is boosted
+	 * pi_se points to the donor, otherwise points to the dl_se it belongs
+	 * to (the original one/itself).
+	 */
+	struct sched_dl_entity *pi_se;
+#endif
 };
 #ifdef CONFIG_UCLAMP_TASK
 	unsigned			sched_reset_on_fork:1;
 	unsigned			sched_contributes_to_load:1;
 	unsigned			sched_migrated:1;
-	unsigned			sched_remote_wakeup:1;
 #ifdef CONFIG_PSI
 	unsigned			sched_psi_wake_requeue:1;
 #endif
 	/* Unserialized, strictly 'current' */
+	/*
+	 * This field must not be in the scheduler word above due to wakelist
+	 * queueing no longer being serialized by p->on_cpu. However:
+	 *
+	 * p->XXX = X;			ttwu()
+	 * schedule()			  if (p->on_rq && ..) // false
+	 *   smp_mb__after_spinlock();	  if (smp_load_acquire(&p->on_cpu) && //true
+	 *   deactivate_task()		      ttwu_queue_wakelist())
+	 *     p->on_rq = 0;			p->sched_remote_wakeup = Y;
+	 *
+	 * guarantees all stores of 'current' are visible before
+	 * ->sched_remote_wakeup gets used, so it can be in this word.
+	 */
+	unsigned			sched_remote_wakeup:1;
 	/* Bit to tell LSMs we're in execve(): */
 	unsigned			in_execve:1;
 	unsigned			in_iowait:1;

include/net/bonding.h+8−0

 	struct rtnl_link_stats64 slave_stats;
 };
+static inline struct slave *to_slave(struct kobject *kobj)
+{
+	return container_of(kobj, struct slave, kobj);
+}
 struct bond_up_slave {
 	unsigned int	count;
 	struct rcu_head rcu;
 /* exported from bond_netlink.c */
 extern struct rtnl_link_ops bond_link_ops;
+/* exported from bond_sysfs_slave.c */
+extern const struct sysfs_ops slave_sysfs_ops;
 static inline netdev_tx_t bond_tx_drop(struct net_device *dev, struct sk_buff *skb)
 {
 	atomic_long_inc(&dev->tx_dropped);

include/net/inet_hashtables.h+3−2

 			 unsigned long high_limit);
 int inet_hashinfo2_init_mod(struct inet_hashinfo *h);
-bool inet_ehash_insert(struct sock *sk, struct sock *osk);
+bool inet_ehash_insert(struct sock *sk, struct sock *osk, bool *found_dup_sk);
-bool inet_ehash_nolisten(struct sock *sk, struct sock *osk);
+bool inet_ehash_nolisten(struct sock *sk, struct sock *osk,
+			 bool *found_dup_sk);
 int __inet_hash(struct sock *sk, struct sock *osk);
 int inet_hash(struct sock *sk);
 void inet_unhash(struct sock *sk);

include/net/tls.h+6−0

 	 * to be atomic.
 	 */
 	TLS_TX_SYNC_SCHED = 1,
+	/* tls_dev_del was called for the RX side, device state was released,
+	 * but tls_ctx->netdev might still be kept, because TX-side driver
+	 * resources might not be released yet. Used to prevent the second
+	 * tls_dev_del call in tls_device_down if it happens simultaneously.
+	 */
+	TLS_RX_DEV_CLOSED = 2,
 };
 struct cipher_context {

include/scsi/libiscsi.h+3−0

@@ -132,6 +132,9 @@ struct iscsi_task { · 131 unmodified lines
132	void dd_data; / driver/transport data */	132	void dd_data; / driver/transport data */
133	};	133	};
134		134
		135	/* invalid scsi_task pointer */
		136	#define INVALID_SCSI_TASK (struct iscsi_task *)-1l
		137
135	static inline int iscsi_task_has_unsol_data(struct iscsi_task *task)	138	static inline int iscsi_task_has_unsol_data(struct iscsi_task *task)
136	{	139	{
137	return task->unsol_r2t.data_length > task->unsol_r2t.sent;	140	return task->unsol_r2t.data_length > task->unsol_r2t.sent;

include/sound/rt1015.h+15−0

@@ -0,0 +1,15 @@
	1	/* SPDX-License-Identifier: GPL-2.0-only */
	2	/*
	3	* linux/sound/rt1015.h -- Platform data for RT1015
	4	*
	5	* Copyright 2020 Realtek Microelectronics
	6	*/
	7
	8	#ifndef __LINUX_SND_RT1015_H
	9	#define __LINUX_SND_RT1015_H
	10
	11	struct rt1015_platform_data {
	12	unsigned int power_up_delay_ms;
	13	};
	14
	15	#endif

include/trace/events/writeback.h+4−4

include/uapi/linux/devlink.h+2−0

@@ -526,6 +526,8 @@ enum devlink_attr { · 525 unmodified lines
526	DEVLINK_ATTR_RELOAD_STATS_LIMIT, /* u8 */	526	DEVLINK_ATTR_RELOAD_STATS_LIMIT, /* u8 */
527	DEVLINK_ATTR_RELOAD_STATS_VALUE, /* u32 */	527	DEVLINK_ATTR_RELOAD_STATS_VALUE, /* u32 */
528	DEVLINK_ATTR_REMOTE_RELOAD_STATS, /* nested */	528	DEVLINK_ATTR_REMOTE_RELOAD_STATS, /* nested */
		529	DEVLINK_ATTR_RELOAD_ACTION_INFO, /* nested */
		530	DEVLINK_ATTR_RELOAD_ACTION_STATS, /* nested */
529		531
530	/* add new attributes above here, update the policy in devlink.c */	532	/* add new attributes above here, update the policy in devlink.c */
531		533

include/uapi/linux/openvswitch.h+2−0

@@ -1058,4 +1058,6 @@ enum ovs_dec_ttl_attr { · 1057 unmodified lines
1058	__OVS_DEC_TTL_ATTR_MAX	1058	__OVS_DEC_TTL_ATTR_MAX
1059	};	1059	};
1060		1060
		1061	#define OVS_DEC_TTL_ATTR_MAX (__OVS_DEC_TTL_ATTR_MAX - 1)
		1062
1061	#endif /* _LINUX_OPENVSWITCH_H */	1063	#endif /* _LINUX_OPENVSWITCH_H */

init/Kconfig+1−1

@@ -719,7 +719,7 @@ config LOG_CPU_MAX_BUF_SHIFT · 718 unmodified lines
719	with more CPUs. Therefore this value is used only when the sum of	719	with more CPUs. Therefore this value is used only when the sum of
720	contributions is greater than the half of the default kernel ring	720	contributions is greater than the half of the default kernel ring
721	buffer as defined by LOG_BUF_SHIFT. The default values are set	721	buffer as defined by LOG_BUF_SHIFT. The default values are set
722	so that more than 64 CPUs are needed to trigger the allocation.	722	so that more than 16 CPUs are needed to trigger the allocation.
723		723
724	Also this option is ignored when "log_buf_len" kernel parameter is	724	Also this option is ignored when "log_buf_len" kernel parameter is
725	used as it forces an exact (power of two) size of the ring buffer.	725	used as it forces an exact (power of two) size of the ring buffer.

kernel/locking/lockdep.c+4−2

 {
 	DEBUG_LOCKS_WARN_ON(!irqs_disabled());
+	__this_cpu_inc(lockdep_recursion);
 	arch_spin_lock(&__lock);
 	__owner = current;
-	__this_cpu_inc(lockdep_recursion);
 }
 static inline void lockdep_unlock(void)
 {
+	DEBUG_LOCKS_WARN_ON(!irqs_disabled());
 	if (debug_locks && DEBUG_LOCKS_WARN_ON(__owner != current))
 		return;
-	__this_cpu_dec(lockdep_recursion);
 	__owner = NULL;
 	arch_spin_unlock(&__lock);
+	__this_cpu_dec(lockdep_recursion);
 }
 static inline bool lockdep_assert_locked(void)

kernel/printk/printk.c+2−2

@@ -528,8 +528,8 @@ static int log_store(u32 caller_id, int facility, int level, · 527 unmodified lines
528	if (dev_info)	528	if (dev_info)
529	memcpy(&r.info->dev_info, dev_info, sizeof(r.info->dev_info));	529	memcpy(&r.info->dev_info, dev_info, sizeof(r.info->dev_info));
530		530
531	/* insert message */	531	/* A message without a trailing newline can be continued. */
532	if ((flags & LOG_CONT) \|\| !(flags & LOG_NEWLINE))	532	if (!(flags & LOG_NEWLINE))
533	prb_commit(&e);	533	prb_commit(&e);
534	else	534	else
535	prb_final_commit(&e);	535	prb_final_commit(&e);

kernel/printk/printk_ringbuffer.c+0−2

@@ -882,8 +882,6 @@ static bool desc_reserve(struct printk_ringbuffer rb, unsigned long id_out) · 881 unmodified lines
882	head_id = atomic_long_read(&desc_ring->head_id); /* LMM(desc_reserve:A) */	882	head_id = atomic_long_read(&desc_ring->head_id); /* LMM(desc_reserve:A) */
883		883
884	do {	884	do {
885	desc = to_desc(desc_ring, head_id);
886
887	id = DESC_ID(head_id + 1);	885	id = DESC_ID(head_id + 1);
888	id_prev_wrap = DESC_ID_PREV_WRAP(desc_ring, id);	886	id_prev_wrap = DESC_ID_PREV_WRAP(desc_ring, id);
889		887

kernel/ptrace.c+5−11

 	return ret;
 }
-static bool ptrace_has_cap(const struct cred *cred, struct user_namespace *ns,
+static bool ptrace_has_cap(struct user_namespace *ns, unsigned int mode)
-			   unsigned int mode)
 {
-	int ret;
 	if (mode & PTRACE_MODE_NOAUDIT)
-		ret = security_capable(cred, ns, CAP_SYS_PTRACE, CAP_OPT_NOAUDIT);
+		return ns_capable_noaudit(ns, CAP_SYS_PTRACE);
-	else
+	return ns_capable(ns, CAP_SYS_PTRACE);
-		ret = security_capable(cred, ns, CAP_SYS_PTRACE, CAP_OPT_NONE);
-	return ret == 0;
 }
 /* Returns 0 on success, -errno on denial. */
 	    gid_eq(caller_gid, tcred->sgid) &&
 	    gid_eq(caller_gid, tcred->gid))
 		goto ok;
-	if (ptrace_has_cap(cred, tcred->user_ns, mode))
+	if (ptrace_has_cap(tcred->user_ns, mode))
 		goto ok;
 	rcu_read_unlock();
 	return -EPERM;
 	mm = task->mm;
 	if (mm &&
 	    ((get_dumpable(mm) != SUID_DUMP_USER) &&
-	     !ptrace_has_cap(cred, mm->user_ns, mode)))
+	     !ptrace_has_cap(mm->user_ns, mode)))
 	    return -EPERM;
 	return security_ptrace_access_check(task, mode);

kernel/sched/core.c+16−10

 #ifdef CONFIG_SMP
 	if (wake_flags & WF_MIGRATED)
 		en_flags |= ENQUEUE_MIGRATED;
+	else
 #endif
+	if (p->in_iowait) {
+		delayacct_blkio_end(p);
+		atomic_dec(&task_rq(p)->nr_iowait);
+	}
 	activate_task(rq, p, en_flags);
 	ttwu_do_wakeup(rq, p, wake_flags, rf);
 	if (READ_ONCE(p->on_rq) && ttwu_runnable(p, wake_flags))
 		goto unlock;
-	if (p->in_iowait) {
-		delayacct_blkio_end(p);
-		atomic_dec(&task_rq(p)->nr_iowait);
-	}
 #ifdef CONFIG_SMP
 	/*
 	 * Ensure we load p->on_cpu _after_ p->on_rq, otherwise it would be
 	cpu = select_task_rq(p, p->wake_cpu, SD_BALANCE_WAKE, wake_flags);
 	if (task_cpu(p) != cpu) {
+		if (p->in_iowait) {
+			delayacct_blkio_end(p);
+			atomic_dec(&task_rq(p)->nr_iowait);
+		}
 		wake_flags |= WF_MIGRATED;
 		psi_ttwu_dequeue(p);
 		set_task_cpu(p, cpu);
 		if (!dl_prio(p->normal_prio) ||
 		    (pi_task && dl_prio(pi_task->prio) &&
 		     dl_entity_preempt(&pi_task->dl, &p->dl))) {
-			p->dl.dl_boosted = 1;
+			p->dl.pi_se = pi_task->dl.pi_se;
 			queue_flag |= ENQUEUE_REPLENISH;
-		} else
+		} else {
-			p->dl.dl_boosted = 0;
+			p->dl.pi_se = &p->dl;
+		}
 		p->sched_class = &dl_sched_class;
 	} else if (rt_prio(prio)) {
 		if (dl_prio(oldprio))
-			p->dl.dl_boosted = 0;
+			p->dl.pi_se = &p->dl;
 		if (oldprio < prio)
 			queue_flag |= ENQUEUE_HEAD;
 		p->sched_class = &rt_sched_class;
 	} else {
 		if (dl_prio(oldprio))
-			p->dl.dl_boosted = 0;
+			p->dl.pi_se = &p->dl;
 		if (rt_prio(oldprio))
 			p->rt.timeout = 0;
 		p->sched_class = &fair_sched_class;

kernel/sched/deadline.c+53−44

 	return !RB_EMPTY_NODE(&dl_se->rb_node);
 }
+#ifdef CONFIG_RT_MUTEXES
+static inline struct sched_dl_entity *pi_of(struct sched_dl_entity *dl_se)
+{
+	return dl_se->pi_se;
+}
+static inline bool is_dl_boosted(struct sched_dl_entity *dl_se)
+{
+	return pi_of(dl_se) != dl_se;
+}
+#else
+static inline struct sched_dl_entity *pi_of(struct sched_dl_entity *dl_se)
+{
+	return dl_se;
+}
+static inline bool is_dl_boosted(struct sched_dl_entity *dl_se)
+{
+	return false;
+}
+#endif
 #ifdef CONFIG_SMP
 static inline struct dl_bw *dl_bw_of(int i)
 {
 	struct dl_rq *dl_rq = dl_rq_of_se(dl_se);
 	struct rq *rq = rq_of_dl_rq(dl_rq);
-	WARN_ON(dl_se->dl_boosted);
+	WARN_ON(is_dl_boosted(dl_se));
 	WARN_ON(dl_time_before(rq_clock(rq), dl_se->deadline));
 	/*
  * could happen are, typically, a entity voluntarily trying to overcome its
  * runtime, or it just underestimated it during sched_setattr().
  */
-static void replenish_dl_entity(struct sched_dl_entity *dl_se,
+static void replenish_dl_entity(struct sched_dl_entity *dl_se)
-				struct sched_dl_entity *pi_se)
 {
 	struct dl_rq *dl_rq = dl_rq_of_se(dl_se);
 	struct rq *rq = rq_of_dl_rq(dl_rq);
-	BUG_ON(pi_se->dl_runtime <= 0);
+	BUG_ON(pi_of(dl_se)->dl_runtime <= 0);
 	/*
 	 * This could be the case for a !-dl task that is boosted.
 	 * Just go with full inherited parameters.
 	 */
 	if (dl_se->dl_deadline == 0) {
-		dl_se->deadline = rq_clock(rq) + pi_se->dl_deadline;
+		dl_se->deadline = rq_clock(rq) + pi_of(dl_se)->dl_deadline;
-		dl_se->runtime = pi_se->dl_runtime;
+		dl_se->runtime = pi_of(dl_se)->dl_runtime;
 	}
 	if (dl_se->dl_yielded && dl_se->runtime > 0)
 	 * arbitrary large.
 	 */
 	while (dl_se->runtime <= 0) {
-		dl_se->deadline += pi_se->dl_period;
+		dl_se->deadline += pi_of(dl_se)->dl_period;
-		dl_se->runtime += pi_se->dl_runtime;
+		dl_se->runtime += pi_of(dl_se)->dl_runtime;
 	}
 	/*
 	 */
 	if (dl_time_before(dl_se->deadline, rq_clock(rq))) {
 		printk_deferred_once("sched: DL replenish lagged too much\n");
-		dl_se->deadline = rq_clock(rq) + pi_se->dl_deadline;
+		dl_se->deadline = rq_clock(rq) + pi_of(dl_se)->dl_deadline;
-		dl_se->runtime = pi_se->dl_runtime;
+		dl_se->runtime = pi_of(dl_se)->dl_runtime;
 	}
 	if (dl_se->dl_yielded)
  * task with deadline equal to period this is the same of using
  * dl_period instead of dl_deadline in the equation above.
  */
-static bool dl_entity_overflow(struct sched_dl_entity *dl_se,
+static bool dl_entity_overflow(struct sched_dl_entity *dl_se, u64 t)
-			       struct sched_dl_entity *pi_se, u64 t)
 {
 	u64 left, right;
 	 * of anything below microseconds resolution is actually fiction
 	 * (but still we want to give the user that illusion >;).
 	 */
-	left = (pi_se->dl_deadline >> DL_SCALE) * (dl_se->runtime >> DL_SCALE);
+	left = (pi_of(dl_se)->dl_deadline >> DL_SCALE) * (dl_se->runtime >> DL_SCALE);
 	right = ((dl_se->deadline - t) >> DL_SCALE) *
-		(pi_se->dl_runtime >> DL_SCALE);
+		(pi_of(dl_se)->dl_runtime >> DL_SCALE);
 	return dl_time_before(right, left);
 }
  * Please refer to the comments update_dl_revised_wakeup() function to find
  * more about the Revised CBS rule.
  */
-static void update_dl_entity(struct sched_dl_entity *dl_se,
+static void update_dl_entity(struct sched_dl_entity *dl_se)
-			     struct sched_dl_entity *pi_se)
 {
 	struct dl_rq *dl_rq = dl_rq_of_se(dl_se);
 	struct rq *rq = rq_of_dl_rq(dl_rq);
 	if (dl_time_before(dl_se->deadline, rq_clock(rq)) ||
-	    dl_entity_overflow(dl_se, pi_se, rq_clock(rq))) {
+	    dl_entity_overflow(dl_se, rq_clock(rq))) {
 		if (unlikely(!dl_is_implicit(dl_se) &&
 			     !dl_time_before(dl_se->deadline, rq_clock(rq)) &&
-			     !dl_se->dl_boosted)){
+			     !is_dl_boosted(dl_se))) {
 			update_dl_revised_wakeup(dl_se, rq);
 			return;
 		}
-		dl_se->deadline = rq_clock(rq) + pi_se->dl_deadline;
+		dl_se->deadline = rq_clock(rq) + pi_of(dl_se)->dl_deadline;
-		dl_se->runtime = pi_se->dl_runtime;
+		dl_se->runtime = pi_of(dl_se)->dl_runtime;
 	}
 }
 	 * The task might have been boosted by someone else and might be in the
 	 * boosting/deboosting path, its not throttled.
 	 */
-	if (dl_se->dl_boosted)
+	if (is_dl_boosted(dl_se))
 		goto unlock;
 	/*
 	 * but do not enqueue -- wait for our wakeup to do that.
 	 */
 	if (!task_on_rq_queued(p)) {
-		replenish_dl_entity(dl_se, dl_se);
+		replenish_dl_entity(dl_se);
 		goto unlock;
 	}
 	if (dl_time_before(dl_se->deadline, rq_clock(rq)) &&
 	    dl_time_before(rq_clock(rq), dl_next_period(dl_se))) {
-		if (unlikely(dl_se->dl_boosted || !start_dl_timer(p)))
+		if (unlikely(is_dl_boosted(dl_se) || !start_dl_timer(p)))
 			return;
 		dl_se->dl_throttled = 1;
 		if (dl_se->runtime > 0)
 			dl_se->dl_overrun = 1;
 		__dequeue_task_dl(rq, curr, 0);
-		if (unlikely(dl_se->dl_boosted || !start_dl_timer(curr)))
+		if (unlikely(is_dl_boosted(dl_se) || !start_dl_timer(curr)))
 			enqueue_task_dl(rq, curr, ENQUEUE_REPLENISH);
 		if (!is_leftmost(curr, &rq->dl))
 }
 static void
-enqueue_dl_entity(struct sched_dl_entity *dl_se,
+enqueue_dl_entity(struct sched_dl_entity *dl_se, int flags)
-		  struct sched_dl_entity *pi_se, int flags)
 {
 	BUG_ON(on_dl_rq(dl_se));
 	 */
 	if (flags & ENQUEUE_WAKEUP) {
 		task_contending(dl_se, flags);
-		update_dl_entity(dl_se, pi_se);
+		update_dl_entity(dl_se);
 	} else if (flags & ENQUEUE_REPLENISH) {
-		replenish_dl_entity(dl_se, pi_se);
+		replenish_dl_entity(dl_se);
 	} else if ((flags & ENQUEUE_RESTORE) &&
 		  dl_time_before(dl_se->deadline,
 				 rq_clock(rq_of_dl_rq(dl_rq_of_se(dl_se))))) {
 static void enqueue_task_dl(struct rq *rq, struct task_struct *p, int flags)
 {
-	struct task_struct *pi_task = rt_mutex_get_top_task(p);
+	if (is_dl_boosted(&p->dl)) {
-	struct sched_dl_entity *pi_se = &p->dl;
-	/*
-	 * Use the scheduling parameters of the top pi-waiter task if:
-	 * - we have a top pi-waiter which is a SCHED_DEADLINE task AND
-	 * - our dl_boosted is set (i.e. the pi-waiter's (absolute) deadline is
-	 *   smaller than our deadline OR we are a !SCHED_DEADLINE task getting
-	 *   boosted due to a SCHED_DEADLINE pi-waiter).
-	 * Otherwise we keep our runtime and deadline.
-	 */
-	if (pi_task && dl_prio(pi_task->normal_prio) && p->dl.dl_boosted) {
-		pi_se = &pi_task->dl;
 		/*
 		 * Because of delays in the detection of the overrun of a
 		 * thread's runtime, it might be the case that a thread
 		 * the throttle.
 		 */
 		p->dl.dl_throttled = 0;
-		BUG_ON(!p->dl.dl_boosted || flags != ENQUEUE_REPLENISH);
+		BUG_ON(!is_dl_boosted(&p->dl) || flags != ENQUEUE_REPLENISH);
 		return;
 	}
 		return;
 	}
-	enqueue_dl_entity(&p->dl, pi_se, flags);
+	enqueue_dl_entity(&p->dl, flags);
 	if (!task_current(rq, p) && p->nr_cpus_allowed > 1)
 		enqueue_pushable_dl_task(rq, p);
 	dl_se->dl_bw			= 0;
 	dl_se->dl_density		= 0;
-	dl_se->dl_boosted		= 0;
 	dl_se->dl_throttled		= 0;
 	dl_se->dl_yielded		= 0;
 	dl_se->dl_non_contending	= 0;
 	dl_se->dl_overrun		= 0;
+#ifdef CONFIG_RT_MUTEXES
+	dl_se->pi_se			= dl_se;
+#endif
 }
 bool dl_param_changed(struct task_struct *p, const struct sched_attr *attr)

kernel/sched/fair.c+2−1

 	struct cfs_rq *cfs_rq;
 	struct sched_entity *se = &p->se;
 	int idle_h_nr_running = task_has_idle_policy(p);
+	int task_new = !(flags & ENQUEUE_WAKEUP);
 	/*
 	 * The code below (indirectly) updates schedutil which looks at
 	 * into account, but that is not straightforward to implement,
 	 * and the following generally works well enough in practice.
 	 */
-	if (flags & ENQUEUE_WAKEUP)
+	if (!task_new)
 		update_overutilized_status(rq);
 enqueue_throttle:

kernel/seccomp.c+2−3

 #include <linux/filter.h>
 #include <linux/pid.h>
 #include <linux/ptrace.h>
-#include <linux/security.h>
+#include <linux/capability.h>
 #include <linux/tracehook.h>
 #include <linux/uaccess.h>
 #include <linux/anon_inodes.h>
 	 * behavior of privileged children.
 	 */
 	if (!task_no_new_privs(current) &&
-	    security_capable(current_cred(), current_user_ns(),
+			!ns_capable_noaudit(current_user_ns(), CAP_SYS_ADMIN))
-				     CAP_SYS_ADMIN, CAP_OPT_NOAUDIT) != 0)
 		return ERR_PTR(-EACCES);
 	/* Allocate a new seccomp_filter */

mm/filemap.c+22−4

 		rotate_reclaimable_page(page);
 	}
+	/*
+	 * Writeback does not hold a page reference of its own, relying
+	 * on truncation to wait for the clearing of PG_writeback.
+	 * But here we must make sure that the page is not freed and
+	 * reused before the wake_up_page().
+	 */
+	get_page(page);
 	if (!test_clear_page_writeback(page))
 		BUG();
 	smp_mb__after_atomic();
 	wake_up_page(page, PG_writeback);
+	put_page(page);
 }
 EXPORT_SYMBOL(end_page_writeback);
 page_not_up_to_date:
 		/* Get exclusive access to the page ... */
-		if (iocb->ki_flags & IOCB_WAITQ)
+		if (iocb->ki_flags & IOCB_WAITQ) {
+			if (written) {
+				put_page(page);
+				goto out;
+			}
 			error = lock_page_async(page, iocb->ki_waitq);
-		else
+		} else {
 			error = lock_page_killable(page);
+		}
 		if (unlikely(error))
 			goto readpage_error;
 		}
 		if (!PageUptodate(page)) {
-			if (iocb->ki_flags & IOCB_WAITQ)
+			if (iocb->ki_flags & IOCB_WAITQ) {
+				if (written) {
+					put_page(page);
+					goto out;
+				}
 				error = lock_page_async(page, iocb->ki_waitq);
-			else
+			} else {
 				error = lock_page_killable(page);
+			}
 			if (unlikely(error))
 				goto readpage_error;

mm/huge_memory.c+4−5

 			transparent_hugepage_use_zero_page()) {
 		pgtable_t pgtable;
 		struct page *zero_page;
-		bool set;
 		vm_fault_t ret;
 		pgtable = pte_alloc_one(vma->vm_mm);
 		if (unlikely(!pgtable))
 		}
 		vmf->ptl = pmd_lock(vma->vm_mm, vmf->pmd);
 		ret = 0;
-		set = false;
 		if (pmd_none(*vmf->pmd)) {
 			ret = check_stable_address_space(vma->vm_mm);
 			if (ret) {
 				spin_unlock(vmf->ptl);
+				pte_free(vma->vm_mm, pgtable);
 			} else if (userfaultfd_missing(vma)) {
 				spin_unlock(vmf->ptl);
+				pte_free(vma->vm_mm, pgtable);
 				ret = handle_userfault(vmf, VM_UFFD_MISSING);
 				VM_BUG_ON(ret & VM_FAULT_FALLBACK);
 			} else {
 				set_huge_zero_page(pgtable, vma->vm_mm, vma,
 						   haddr, vmf->pmd, zero_page);
 				spin_unlock(vmf->ptl);
-				set = true;
 			}
-		} else
+		} else {
 			spin_unlock(vmf->ptl);
-		if (!set)
 			pte_free(vma->vm_mm, pgtable);
+		}
 		return ret;
 	}
 	gfp = alloc_hugepage_direct_gfpmask(vma);

mm/madvise.c+1−3

 		struct address_space *mapping)
 {
 	XA_STATE(xas, &mapping->i_pages, linear_page_index(vma, start));
-	pgoff_t end_index = end / PAGE_SIZE;
+	pgoff_t end_index = linear_page_index(vma, end + PAGE_SIZE - 1);
 	struct page *page;
 	rcu_read_lock();
 		ret = total_len - iov_iter_count(&iter);
 	mmput(mm);
-	return ret;
 release_task:
 	put_task_struct(task);
 put_pid:

mm/memcontrol.c+7−2

 	rcu_read_lock();
 	memcg = mem_cgroup_from_obj(p);
-	/* Untracked pages have no memcg, no lruvec. Update only the node */
+	/*
-	if (!memcg || memcg == root_mem_cgroup) {
+	 * Untracked pages have no memcg, no lruvec. Update only the
+	 * node. If we reparent the slab objects to the root memcg,
+	 * when we free the slab object, we need to update the per-memcg
+	 * vmstats to keep it correct for the root memcg.
+	 */
+	if (!memcg) {
 		__mod_node_page_state(pgdat, idx, val);
 	} else {
 		lruvec = mem_cgroup_lruvec(memcg, pgdat);

mm/memory_hotplug.c+0−18

@@ -350,24 +350,6 @@ int __ref __add_pages(int nid, unsigned long pfn, unsigned long nr_pages, · 349 unmodified lines
350	return err;	350	return err;
351	}	351	}
352		352
353	#ifdef CONFIG_NUMA
354	int __weak memory_add_physaddr_to_nid(u64 start)
355	{
356	pr_info_once("Unknown online node for memory at 0x%llx, assuming node 0\n",
357	start);
358	return 0;
359	}
360	EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid);
361
362	int __weak phys_to_target_node(u64 start)
363	{
364	pr_info_once("Unknown target node for memory at 0x%llx, assuming node 0\n",
365	start);
366	return 0;
367	}
368	EXPORT_SYMBOL_GPL(phys_to_target_node);
369	#endif
370
371	/* find the smallest valid pfn in the range [start_pfn, end_pfn) */	353	/* find the smallest valid pfn in the range [start_pfn, end_pfn) */
372	static unsigned long find_smallest_section_pfn(int nid, struct zone *zone,	354	static unsigned long find_smallest_section_pfn(int nid, struct zone *zone,
373	unsigned long start_pfn,	355	unsigned long start_pfn,

mm/page-writeback.c+0−6

 	} else {
 		ret = TestClearPageWriteback(page);
 	}
-	/*
-	 * NOTE: Page might be free now! Writeback doesn't hold a page
-	 * reference on its own, it relies on truncation to wait for
-	 * the clearing of PG_writeback. The below can only access
-	 * page state that is static across allocation cycles.
-	 */
 	if (ret) {
 		dec_lruvec_state(lruvec, NR_WRITEBACK);
 		dec_zone_page_state(page, NR_ZONE_WRITE_PENDING);

net/batman-adv/log.c+1−0

@@ -180,6 +180,7 @@ static const struct file_operations batadv_log_fops = { · 179 unmodified lines
180	.read = batadv_log_read,	180	.read = batadv_log_read,
181	.poll = batadv_log_poll,	181	.poll = batadv_log_poll,
182	.llseek = no_llseek,	182	.llseek = no_llseek,
		183	.owner = THIS_MODULE,
183	};	184	};
184		185
185	/**	186	/**

net/can/af_can.c+5−2

 	/* Check for bugs in CAN protocol implementations using af_can.c:
 	 * 'rcv' will be NULL if no matching list item was found for removal.
+	 * As this case may potentially happen when closing a socket while
+	 * the notifier for removing the CAN netdev is running we just print
+	 * a warning here.
 	 */
 	if (!rcv) {
-		WARN(1, "BUG: receive list entry not found for dev %s, id %03X, mask %03X\n",
+		pr_warn("can: receive list entry not found for dev %s, id %03X, mask %03X\n",
-		     DNAME(dev), can_id, mask);
+			DNAME(dev), can_id, mask);
 		goto out;
 	}

net/core/devlink.c+39−17

 	return test_bit(limit, &devlink->ops->reload_limits);
 }
-static int devlink_reload_stat_put(struct sk_buff *msg, enum devlink_reload_action action,
+static int devlink_reload_stat_put(struct sk_buff *msg,
 				   enum devlink_reload_limit limit, u32 value)
 {
 	struct nlattr *reload_stats_entry;
 	if (!reload_stats_entry)
 		return -EMSGSIZE;
-	if (nla_put_u8(msg, DEVLINK_ATTR_RELOAD_ACTION, action) ||
+	if (nla_put_u8(msg, DEVLINK_ATTR_RELOAD_STATS_LIMIT, limit) ||
-	    nla_put_u8(msg, DEVLINK_ATTR_RELOAD_STATS_LIMIT, limit) ||
 	    nla_put_u32(msg, DEVLINK_ATTR_RELOAD_STATS_VALUE, value))
 		goto nla_put_failure;
 	nla_nest_end(msg, reload_stats_entry);
 static int devlink_reload_stats_put(struct sk_buff *msg, struct devlink *devlink, bool is_remote)
 {
-	struct nlattr *reload_stats_attr;
+	struct nlattr *reload_stats_attr, *act_info, *act_stats;
 	int i, j, stat_idx;
 	u32 value;
 	if (!reload_stats_attr)
 		return -EMSGSIZE;
-	for (j = 0; j <= DEVLINK_RELOAD_LIMIT_MAX; j++) {
+	for (i = 0; i <= DEVLINK_RELOAD_ACTION_MAX; i++) {
-		/* Remote stats are shown even if not locally supported. Stats
+		if ((!is_remote &&
-		 * of actions with unspecified limit are shown though drivers
+		     !devlink_reload_action_is_supported(devlink, i)) ||
-		 * don't need to register unspecified limit.
+		    i == DEVLINK_RELOAD_ACTION_UNSPEC)
-		 */
-		if (!is_remote && j != DEVLINK_RELOAD_LIMIT_UNSPEC &&
-		    !devlink_reload_limit_is_supported(devlink, j))
 			continue;
-		for (i = 0; i <= DEVLINK_RELOAD_ACTION_MAX; i++) {
+		act_info = nla_nest_start(msg, DEVLINK_ATTR_RELOAD_ACTION_INFO);
-			if ((!is_remote && !devlink_reload_action_is_supported(devlink, i)) ||
+		if (!act_info)
-			    i == DEVLINK_RELOAD_ACTION_UNSPEC ||
+			goto nla_put_failure;
+		if (nla_put_u8(msg, DEVLINK_ATTR_RELOAD_ACTION, i))
+			goto action_info_nest_cancel;
+		act_stats = nla_nest_start(msg, DEVLINK_ATTR_RELOAD_ACTION_STATS);
+		if (!act_stats)
+			goto action_info_nest_cancel;
+		for (j = 0; j <= DEVLINK_RELOAD_LIMIT_MAX; j++) {
+			/* Remote stats are shown even if not locally supported.
+			 * Stats of actions with unspecified limit are shown
+			 * though drivers don't need to register unspecified
+			 * limit.
+			 */
+			if ((!is_remote && j != DEVLINK_RELOAD_LIMIT_UNSPEC &&
+			     !devlink_reload_limit_is_supported(devlink, j)) ||
 			    devlink_reload_combination_is_invalid(i, j))
 				continue;
 				value = devlink->stats.reload_stats[stat_idx];
 			else
 				value = devlink->stats.remote_reload_stats[stat_idx];
-			if (devlink_reload_stat_put(msg, i, j, value))
+			if (devlink_reload_stat_put(msg, j, value))
-				goto nla_put_failure;
+				goto action_stats_nest_cancel;
 		}
+		nla_nest_end(msg, act_stats);
+		nla_nest_end(msg, act_info);
 	}
 	nla_nest_end(msg, reload_stats_attr);
 	return 0;
+action_stats_nest_cancel:
+	nla_nest_cancel(msg, act_stats);
+action_info_nest_cancel:
+	nla_nest_cancel(msg, act_info);
 nla_put_failure:
 	nla_nest_cancel(msg, reload_stats_attr);
 	return -EMSGSIZE;
 	if (nla_put_u32(msg, DEVLINK_ATTR_PORT_INDEX, devlink_port->index))
 		goto nla_put_failure;
+	/* Hold rtnl lock while accessing port's netdev attributes. */
+	rtnl_lock();
 	spin_lock_bh(&devlink_port->type_lock);
 	if (nla_put_u16(msg, DEVLINK_ATTR_PORT_TYPE, devlink_port->type))
 		goto nla_put_failure_type_locked;
 			devlink_port->desired_type))
 		goto nla_put_failure_type_locked;
 	if (devlink_port->type == DEVLINK_PORT_TYPE_ETH) {
+		struct net *net = devlink_net(devlink_port->devlink);
 		struct net_device *netdev = devlink_port->type_dev;
-		if (netdev &&
+		if (netdev && net_eq(net, dev_net(netdev)) &&
 		    (nla_put_u32(msg, DEVLINK_ATTR_PORT_NETDEV_IFINDEX,
 				 netdev->ifindex) ||
 		     nla_put_string(msg, DEVLINK_ATTR_PORT_NETDEV_NAME,
 			goto nla_put_failure_type_locked;
 	}
 	spin_unlock_bh(&devlink_port->type_lock);
+	rtnl_unlock();
 	if (devlink_nl_port_attrs_put(msg, devlink_port))
 		goto nla_put_failure;
 	if (devlink_nl_port_function_attrs_put(msg, devlink_port, extack))
 nla_put_failure_type_locked:
 	spin_unlock_bh(&devlink_port->type_lock);
+	rtnl_unlock();
 nla_put_failure:
 	genlmsg_cancel(msg, hdr);
 	return -EMSGSIZE;

net/core/gro_cells.c+6−1

 		struct gro_cell *cell = per_cpu_ptr(gcells->cells, i);
 		napi_disable(&cell->napi);
-		netif_napi_del(&cell->napi);
+		__netif_napi_del(&cell->napi);
 		__skb_queue_purge(&cell->napi_skbs);
 	}
+	/* This barrier is needed because netpoll could access dev->napi_list
+	 * under rcu protection.
+	 */
+	synchronize_net();
 	free_percpu(gcells->cells);
 	gcells->cells = NULL;
 }

net/core/skbuff.c+1−1

@@ -4562,7 +4562,7 @@ struct sk_buff sock_dequeue_err_skb(struct sock sk) · 4561 unmodified lines
4562	if (skb && (skb_next = skb_peek(q))) {	4562	if (skb && (skb_next = skb_peek(q))) {
4563	icmp_next = is_icmp_err_skb(skb_next);	4563	icmp_next = is_icmp_err_skb(skb_next);
4564	if (icmp_next)	4564	if (icmp_next)
4565	sk->sk_err = SKB_EXT_ERR(skb_next)->ee.ee_origin;	4565	sk->sk_err = SKB_EXT_ERR(skb_next)->ee.ee_errno;
4566	}	4566	}
4567	spin_unlock_irqrestore(&q->lock, flags);	4567	spin_unlock_irqrestore(&q->lock, flags);
4568		4568

net/dccp/ipv4.c+1−1

@@ -427,7 +427,7 @@ struct sock dccp_v4_request_recv_sock(const struct sock sk, · 426 unmodified lines
427		427
428	if (__inet_inherit_port(sk, newsk) < 0)	428	if (__inet_inherit_port(sk, newsk) < 0)
429	goto put_and_exit;	429	goto put_and_exit;
430	*own_req = inet_ehash_nolisten(newsk, req_to_sk(req_unhash));	430	*own_req = inet_ehash_nolisten(newsk, req_to_sk(req_unhash), NULL);
431	if (*own_req)	431	if (*own_req)
432	ireq->ireq_opt = NULL;	432	ireq->ireq_opt = NULL;
433	else	433	else

net/dccp/ipv6.c+1−1

@@ -533,7 +533,7 @@ static struct sock dccp_v6_request_recv_sock(const struct sock sk, · 532 unmodified lines
533	dccp_done(newsk);	533	dccp_done(newsk);
534	goto out;	534	goto out;
535	}	535	}
536	*own_req = inet_ehash_nolisten(newsk, req_to_sk(req_unhash));	536	*own_req = inet_ehash_nolisten(newsk, req_to_sk(req_unhash), NULL);
537	/* Clone pktoptions received with SYN, if we own the req */	537	/* Clone pktoptions received with SYN, if we own the req */
538	if (*own_req && ireq->pktopts) {	538	if (*own_req && ireq->pktopts) {
539	newnp->pktoptions = skb_clone(ireq->pktopts, GFP_ATOMIC);	539	newnp->pktoptions = skb_clone(ireq->pktopts, GFP_ATOMIC);

net/ipv4/inet_connection_sock.c+1−1

@@ -787,7 +787,7 @@ static void reqsk_queue_hash_req(struct request_sock *req, · 786 unmodified lines
787	timer_setup(&req->rsk_timer, reqsk_timer_handler, TIMER_PINNED);	787	timer_setup(&req->rsk_timer, reqsk_timer_handler, TIMER_PINNED);
788	mod_timer(&req->rsk_timer, jiffies + timeout);	788	mod_timer(&req->rsk_timer, jiffies + timeout);
789		789
790	inet_ehash_insert(req_to_sk(req), NULL);	790	inet_ehash_insert(req_to_sk(req), NULL, NULL);
791	/* before letting lookups find us, make sure all req fields	791	/* before letting lookups find us, make sure all req fields
792	* are committed to memory and refcnt initialized.	792	* are committed to memory and refcnt initialized.
793	*/	793	*/

net/ipv4/inet_hashtables.c+60−8

 #include <net/addrconf.h>
 #include <net/inet_connection_sock.h>
 #include <net/inet_hashtables.h>
+#if IS_ENABLED(CONFIG_IPV6)
+#include <net/inet6_hashtables.h>
+#endif
 #include <net/secure_seq.h>
 #include <net/ip.h>
 #include <net/tcp.h>
 					  inet->inet_dport);
 }
-/* insert a socket into ehash, and eventually remove another one
+/* Searches for an exsiting socket in the ehash bucket list.
- * (The another one can be a SYN_RECV or TIMEWAIT
+ * Returns true if found, false otherwise.
  */
-bool inet_ehash_insert(struct sock *sk, struct sock *osk)
+static bool inet_ehash_lookup_by_sk(struct sock *sk,
+				    struct hlist_nulls_head *list)
+{
+	const __portpair ports = INET_COMBINED_PORTS(sk->sk_dport, sk->sk_num);
+	const int sdif = sk->sk_bound_dev_if;
+	const int dif = sk->sk_bound_dev_if;
+	const struct hlist_nulls_node *node;
+	struct net *net = sock_net(sk);
+	struct sock *esk;
+	INET_ADDR_COOKIE(acookie, sk->sk_daddr, sk->sk_rcv_saddr);
+	sk_nulls_for_each_rcu(esk, node, list) {
+		if (esk->sk_hash != sk->sk_hash)
+			continue;
+		if (sk->sk_family == AF_INET) {
+			if (unlikely(INET_MATCH(esk, net, acookie,
+						sk->sk_daddr,
+						sk->sk_rcv_saddr,
+						ports, dif, sdif))) {
+				return true;
+			}
+		}
+#if IS_ENABLED(CONFIG_IPV6)
+		else if (sk->sk_family == AF_INET6) {
+			if (unlikely(INET6_MATCH(esk, net,
+						 &sk->sk_v6_daddr,
+						 &sk->sk_v6_rcv_saddr,
+						 ports, dif, sdif))) {
+				return true;
+			}
+		}
+#endif
+	}
+	return false;
+}
+/* Insert a socket into ehash, and eventually remove another one
+ * (The another one can be a SYN_RECV or TIMEWAIT)
+ * If an existing socket already exists, socket sk is not inserted,
+ * and sets found_dup_sk parameter to true.
+ */
+bool inet_ehash_insert(struct sock *sk, struct sock *osk, bool *found_dup_sk)
 {
 	struct inet_hashinfo *hashinfo = sk->sk_prot->h.hashinfo;
 	struct hlist_nulls_head *list;
 	if (osk) {
 		WARN_ON_ONCE(sk->sk_hash != osk->sk_hash);
 		ret = sk_nulls_del_node_init_rcu(osk);
+	} else if (found_dup_sk) {
+		*found_dup_sk = inet_ehash_lookup_by_sk(sk, list);
+		if (*found_dup_sk)
+			ret = false;
 	}
 	if (ret)
 		__sk_nulls_add_node_rcu(sk, list);
 	spin_unlock(lock);
 	return ret;
 }
-bool inet_ehash_nolisten(struct sock *sk, struct sock *osk)
+bool inet_ehash_nolisten(struct sock *sk, struct sock *osk, bool *found_dup_sk)
 {
-	bool ok = inet_ehash_insert(sk, osk);
+	bool ok = inet_ehash_insert(sk, osk, found_dup_sk);
 	if (ok) {
 		sock_prot_inuse_add(sock_net(sk), sk->sk_prot, 1);
 	int err = 0;
 	if (sk->sk_state != TCP_LISTEN) {
-		inet_ehash_nolisten(sk, osk);
+		inet_ehash_nolisten(sk, osk, NULL);
 		return 0;
 	}
 	WARN_ON(!sk_unhashed(sk));
 		tb = inet_csk(sk)->icsk_bind_hash;
 		spin_lock_bh(&head->lock);
 		if (sk_head(&tb->owners) == sk && !sk->sk_bind_node.next) {
-			inet_ehash_nolisten(sk, NULL);
+			inet_ehash_nolisten(sk, NULL, NULL);
 			spin_unlock_bh(&head->lock);
 			return 0;
 		}
 	inet_bind_hash(sk, tb, port);
 	if (sk_unhashed(sk)) {
 		inet_sk(sk)->inet_sport = htons(port);
-		inet_ehash_nolisten(sk, (struct sock *)tw);
+		inet_ehash_nolisten(sk, (struct sock *)tw, NULL);
 	}
 	if (tw)
 		inet_twsk_bind_unhash(tw, hinfo);

net/ipv4/tcp_cong.c+5−0

 	icsk->icsk_ca_setsockopt = 1;
 	memset(icsk->icsk_ca_priv, 0, sizeof(icsk->icsk_ca_priv));
+	if (ca->flags & TCP_CONG_NEEDS_ECN)
+		INET_ECN_xmit(sk);
+	else
+		INET_ECN_dontxmit(sk);
 	if (!((1 << sk->sk_state) & (TCPF_CLOSE | TCPF_LISTEN)))
 		tcp_init_congestion_control(sk);
 }

net/ipv4/tcp_ipv4.c+22−6

 	skb = tcp_make_synack(sk, dst, req, foc, synack_type, syn_skb);
-	tos = sock_net(sk)->ipv4.sysctl_tcp_reflect_tos ?
-			tcp_rsk(req)->syn_tos : inet_sk(sk)->tos;
 	if (skb) {
 		__tcp_v4_send_check(skb, ireq->ir_loc_addr, ireq->ir_rmt_addr);
+		tos = sock_net(sk)->ipv4.sysctl_tcp_reflect_tos ?
+				tcp_rsk(req)->syn_tos & ~INET_ECN_MASK :
+				inet_sk(sk)->tos;
+		if (!INET_ECN_is_capable(tos) &&
+		    tcp_bpf_ca_needs_ecn((struct sock *)req))
+			tos |= INET_ECN_ECT_0;
 		rcu_read_lock();
 		err = ip_build_and_send_pkt(skb, sk, ireq->ir_loc_addr,
 					    ireq->ir_rmt_addr,
 					    rcu_dereference(ireq->ireq_opt),
-					    tos & ~INET_ECN_MASK);
+					    tos);
 		rcu_read_unlock();
 		err = net_xmit_eval(err);
 	}
 				  bool *own_req)
 {
 	struct inet_request_sock *ireq;
+	bool found_dup_sk = false;
 	struct inet_sock *newinet;
 	struct tcp_sock *newtp;
 	struct sock *newsk;
 	if (__inet_inherit_port(sk, newsk) < 0)
 		goto put_and_exit;
-	*own_req = inet_ehash_nolisten(newsk, req_to_sk(req_unhash));
+	*own_req = inet_ehash_nolisten(newsk, req_to_sk(req_unhash),
+				       &found_dup_sk);
 	if (likely(*own_req)) {
 		tcp_move_syn(newtp, req);
 		ireq->ireq_opt = NULL;
 	} else {
-		newinet->inet_opt = NULL;
+		if (!req_unhash && found_dup_sk) {
+			/* This code path should only be executed in the
+			 * syncookie case only
+			 */
+			bh_unlock_sock(newsk);
+			sock_put(newsk);
+			newsk = NULL;
+		} else {
+			newinet->inet_opt = NULL;
+		}
 	}
 	return newsk;

net/ipv6/addrlabel.c+17−9

 /* add default label */
 static int __net_init ip6addrlbl_net_init(struct net *net)
 {
-	int err = 0;
+	struct ip6addrlbl_entry *p = NULL;
+	struct hlist_node *n;
+	int err;
 	int i;
 	ADDRLABEL(KERN_DEBUG "%s\n", __func__);
 	INIT_HLIST_HEAD(&net->ipv6.ip6addrlbl_table.head);
 	for (i = 0; i < ARRAY_SIZE(ip6addrlbl_init_table); i++) {
-		int ret = ip6addrlbl_add(net,
+		err = ip6addrlbl_add(net,
-					 ip6addrlbl_init_table[i].prefix,
+				     ip6addrlbl_init_table[i].prefix,
-					 ip6addrlbl_init_table[i].prefixlen,
+				     ip6addrlbl_init_table[i].prefixlen,
-					 0,
+				     0,
-					 ip6addrlbl_init_table[i].label, 0);
+				     ip6addrlbl_init_table[i].label, 0);
-		/* XXX: should we free all rules when we catch an error? */
+		if (err)
-		if (ret && (!err || err != -ENOMEM))
+			goto err_ip6addrlbl_add;
-			err = ret;
+	}
+	return 0;
+err_ip6addrlbl_add:
+	hlist_for_each_entry_safe(p, n, &net->ipv6.ip6addrlbl_table.head, list) {
+		hlist_del_rcu(&p->list);
+		kfree_rcu(p, rcu);
 	}
 	return err;
 }

net/ipv6/tcp_ipv6.c+21−5

 		if (np->repflow && ireq->pktopts)
 			fl6->flowlabel = ip6_flowlabel(ipv6_hdr(ireq->pktopts));
+		tclass = sock_net(sk)->ipv4.sysctl_tcp_reflect_tos ?
+				tcp_rsk(req)->syn_tos & ~INET_ECN_MASK :
+				np->tclass;
+		if (!INET_ECN_is_capable(tclass) &&
+		    tcp_bpf_ca_needs_ecn((struct sock *)req))
+			tclass |= INET_ECN_ECT_0;
 		rcu_read_lock();
 		opt = ireq->ipv6_opt;
-		tclass = sock_net(sk)->ipv4.sysctl_tcp_reflect_tos ?
-				tcp_rsk(req)->syn_tos : np->tclass;
 		if (!opt)
 			opt = rcu_dereference(np->opt);
 		err = ip6_xmit(sk, skb, fl6, sk->sk_mark, opt,
-			       tclass & ~INET_ECN_MASK,
+			       tclass, sk->sk_priority);
-			       sk->sk_priority);
 		rcu_read_unlock();
 		err = net_xmit_eval(err);
 	}
 	const struct ipv6_pinfo *np = tcp_inet6_sk(sk);
 	struct ipv6_txoptions *opt;
 	struct inet_sock *newinet;
+	bool found_dup_sk = false;
 	struct tcp_sock *newtp;
 	struct sock *newsk;
 #ifdef CONFIG_TCP_MD5SIG
 		tcp_done(newsk);
 		goto out;
 	}
-	*own_req = inet_ehash_nolisten(newsk, req_to_sk(req_unhash));
+	*own_req = inet_ehash_nolisten(newsk, req_to_sk(req_unhash),
+				       &found_dup_sk);
 	if (*own_req) {
 		tcp_move_syn(newtp, req);
 				skb_set_owner_r(newnp->pktoptions, newsk);
 			}
 		}
+	} else {
+		if (!req_unhash && found_dup_sk) {
+			/* This code path should only be executed in the
+			 * syncookie case only
+			 */
+			bh_unlock_sock(newsk);
+			sock_put(newsk);
+			newsk = NULL;
+		}
 	}
 	return newsk;

net/iucv/af_iucv.c+2−2

@@ -1645,7 +1645,7 @@ static int iucv_callback_connreq(struct iucv_path *path, · 1644 unmodified lines
1645	}	1645	}
1646		1646
1647	/* Create the new socket */	1647	/* Create the new socket */
1648	nsk = iucv_sock_alloc(NULL, sk->sk_type, GFP_ATOMIC, 0);	1648	nsk = iucv_sock_alloc(NULL, sk->sk_protocol, GFP_ATOMIC, 0);
1649	if (!nsk) {	1649	if (!nsk) {
1650	err = pr_iucv->path_sever(path, user_data);	1650	err = pr_iucv->path_sever(path, user_data);
1651	iucv_path_free(path);	1651	iucv_path_free(path);
@@ -1851,7 +1851,7 @@ static int afiucv_hs_callback_syn(struct sock sk, struct sk_buff skb) · 199 unmodified lines
1851	goto out;	1851	goto out;
1852	}	1852	}
1853		1853
1854	nsk = iucv_sock_alloc(NULL, sk->sk_type, GFP_ATOMIC, 0);	1854	nsk = iucv_sock_alloc(NULL, sk->sk_protocol, GFP_ATOMIC, 0);
1855	bh_lock_sock(sk);	1855	bh_lock_sock(sk);
1856	if ((sk->sk_state != IUCV_LISTEN) \|\|	1856	if ((sk->sk_state != IUCV_LISTEN) \|\|
1857	sk_acceptq_is_full(sk) \|\|	1857	sk_acceptq_is_full(sk) \|\|

net/mptcp/subflow.c+2−3

 			fallback = true;
 	} else if (subflow_req->mp_join) {
 		mptcp_get_options(skb, &mp_opt);
-		if (!mp_opt.mp_join ||
+		if (!mp_opt.mp_join || !subflow_hmac_valid(req, &mp_opt) ||
-		    !mptcp_can_accept_new_subflow(subflow_req->msk) ||
+		    !mptcp_can_accept_new_subflow(subflow_req->msk)) {
-		    !subflow_hmac_valid(req, &mp_opt)) {
 			SUBFLOW_REQ_INC_STATS(req, MPTCP_MIB_JOINACKMAC);
 			fallback = true;
 		}

net/openvswitch/actions.c+3−4

 {
 	/* The first action is always 'OVS_DEC_TTL_ATTR_ARG'. */
 	struct nlattr *dec_ttl_arg = nla_data(attr);
-	int rem = nla_len(attr);
 	if (nla_len(dec_ttl_arg)) {
-		struct nlattr *actions = nla_next(dec_ttl_arg, &rem);
+		struct nlattr *actions = nla_data(dec_ttl_arg);
 		if (actions)
-			return clone_execute(dp, skb, key, 0, actions, rem,
+			return clone_execute(dp, skb, key, 0, nla_data(actions),
-					     last, false);
+					     nla_len(actions), last, false);
 	}
 	consume_skb(skb);
 	return 0;

net/openvswitch/flow_netlink.c+55−19

@@ -2503,28 +2503,42 @@ static int validate_and_copy_dec_ttl(struct net *net, · 2502 unmodified lines
2503	__be16 eth_type, __be16 vlan_tci,	2503	__be16 eth_type, __be16 vlan_tci,
2504	u32 mpls_label_count, bool log)	2504	u32 mpls_label_count, bool log)
2505	{	2505	{
2506	int start, err;	2506	const struct nlattr *attrs[OVS_DEC_TTL_ATTR_MAX + 1];
2507	u32 nested = true;	2507	int start, action_start, err, rem;
		2508	const struct nlattr a, actions;
		2509
		2510	memset(attrs, 0, sizeof(attrs));
		2511	nla_for_each_nested(a, attr, rem) {
		2512	int type = nla_type(a);
2508		2513
2509	if (!nla_len(attr))	2514	/* Ignore unknown attributes to be future proof. */
2510	return ovs_nla_add_action(sfa, OVS_ACTION_ATTR_DEC_TTL,	2515	if (type > OVS_DEC_TTL_ATTR_MAX)
2511	NULL, 0, log);	2516	continue;
		2517
		2518	if (!type \|\| attrs[type])
		2519	return -EINVAL;
		2520
		2521	attrs[type] = a;
		2522	}
		2523
		2524	actions = attrs[OVS_DEC_TTL_ATTR_ACTION];
		2525	if (rem \|\| !actions \|\| (nla_len(actions) && nla_len(actions) < NLA_HDRLEN))
		2526	return -EINVAL;
2512		2527
2513	start = add_nested_action_start(sfa, OVS_ACTION_ATTR_DEC_TTL, log);	2528	start = add_nested_action_start(sfa, OVS_ACTION_ATTR_DEC_TTL, log);
2514	if (start < 0)	2529	if (start < 0)
2515	return start;	2530	return start;
2516		2531
2517	err = ovs_nla_add_action(sfa, OVS_DEC_TTL_ATTR_ACTION, &nested,	2532	action_start = add_nested_action_start(sfa, OVS_DEC_TTL_ATTR_ACTION, log);
2518	sizeof(nested), log);	2533	if (action_start < 0)
2519		2534	return start;
2520	if (err)
2521	return err;
2522		2535
2523	err = __ovs_nla_copy_actions(net, attr, key, sfa, eth_type,	2536	err = __ovs_nla_copy_actions(net, actions, key, sfa, eth_type,
2524	vlan_tci, mpls_label_count, log);	2537	vlan_tci, mpls_label_count, log);
2525	if (err)	2538	if (err)
2526	return err;	2539	return err;
2527		2540
		2541	add_nested_action_end(*sfa, action_start);
2528	add_nested_action_end(*sfa, start);	2542	add_nested_action_end(*sfa, start);
2529	return 0;	2543	return 0;
2530	}	2544	}
@@ -3487,20 +3501,42 @@ out: · 956 unmodified lines
3487	static int dec_ttl_action_to_attr(const struct nlattr *attr,	3501	static int dec_ttl_action_to_attr(const struct nlattr *attr,
3488	struct sk_buff *skb)	3502	struct sk_buff *skb)
3489	{	3503	{
3490	int err = 0, rem = nla_len(attr);	3504	struct nlattr start, action_start;
3491	struct nlattr *start;	3505	const struct nlattr *a;
		3506	int err = 0, rem;
3492		3507
3493	start = nla_nest_start_noflag(skb, OVS_ACTION_ATTR_DEC_TTL);	3508	start = nla_nest_start_noflag(skb, OVS_ACTION_ATTR_DEC_TTL);
3494
3495	if (!start)	3509	if (!start)
3496	return -EMSGSIZE;	3510	return -EMSGSIZE;
3497		3511
3498	err = ovs_nla_put_actions(nla_data(attr), rem, skb);	3512	nla_for_each_attr(a, nla_data(attr), nla_len(attr), rem) {
3499	if (err)	3513	switch (nla_type(a)) {
3500	nla_nest_cancel(skb, start);	3514	case OVS_DEC_TTL_ATTR_ACTION:
3501	else	3515
3502	nla_nest_end(skb, start);	3516	action_start = nla_nest_start_noflag(skb, OVS_DEC_TTL_ATTR_ACTION);
		3517	if (!action_start) {
		3518	err = -EMSGSIZE;
		3519	goto out;
		3520	}
		3521
		3522	err = ovs_nla_put_actions(nla_data(a), nla_len(a), skb);
		3523	if (err)
		3524	goto out;
		3525
		3526	nla_nest_end(skb, action_start);
		3527	break;
3503		3528
		3529	default:
		3530	/* Ignore all other option to be future compatible */
		3531	break;
		3532	}
		3533	}
		3534
		3535	nla_nest_end(skb, start);
		3536	return 0;
		3537
		3538	out:
		3539	nla_nest_cancel(skb, start);
3504	return err;	3540	return err;
3505	}	3541	}
3506		3542

net/packet/af_packet.c+9−9

@@ -94,8 +94,8 @@ · 93 unmodified lines
94		94
95	/*	95	/*
96	Assumptions:	96	Assumptions:
97	- If the device has no dev->header_ops, there is no LL header visible	97	- If the device has no dev->header_ops->create, there is no LL header
98	above the device. In this case, its hard_header_len should be 0.	98	visible above the device. In this case, its hard_header_len should be 0.
99	The device may prepend its own header internally. In this case, its	99	The device may prepend its own header internally. In this case, its
100	needed_headroom should be set to the space needed for it to add its	100	needed_headroom should be set to the space needed for it to add its
101	internal header.	101	internal header.
@@ -109,26 +109,26 @@ · 7 unmodified lines
109	On receive:	109	On receive:
110	-----------	110	-----------
111		111
112	Incoming, dev->header_ops != NULL	112	Incoming, dev_has_header(dev) == true
113	mac_header -> ll header	113	mac_header -> ll header
114	data -> data	114	data -> data
115		115
116	Outgoing, dev->header_ops != NULL	116	Outgoing, dev_has_header(dev) == true
117	mac_header -> ll header	117	mac_header -> ll header
118	data -> ll header	118	data -> ll header
119		119
120	Incoming, dev->header_ops == NULL	120	Incoming, dev_has_header(dev) == false
121	mac_header -> data	121	mac_header -> data
122	However drivers often make it point to the ll header.	122	However drivers often make it point to the ll header.
123	This is incorrect because the ll header should be invisible to us.	123	This is incorrect because the ll header should be invisible to us.
124	data -> data	124	data -> data
125		125
126	Outgoing, dev->header_ops == NULL	126	Outgoing, dev_has_header(dev) == false
127	mac_header -> data. ll header is invisible to us.	127	mac_header -> data. ll header is invisible to us.
128	data -> data	128	data -> data
129		129
130	Resume	130	Resume
131	If dev->header_ops == NULL we are unable to restore the ll header,	131	If dev_has_header(dev) == false we are unable to restore the ll header,
132	because it is invisible to us.	132	because it is invisible to us.
133		133
134		134
@@ -2083,7 +2083,7 @@ static int packet_rcv(struct sk_buff skb, struct net_device dev, · 1948 unmodified lines
2083		2083
2084	skb->dev = dev;	2084	skb->dev = dev;
2085		2085
2086	if (dev->header_ops) {	2086	if (dev_has_header(dev)) {
2087	/* The device has an explicit notion of ll header,	2087	/* The device has an explicit notion of ll header,
2088	* exported to higher levels.	2088	* exported to higher levels.
2089	*	2089	*
@@ -2212,7 +2212,7 @@ static int tpacket_rcv(struct sk_buff skb, struct net_device dev, · 122 unmodified lines
2212	if (!net_eq(dev_net(dev), sock_net(sk)))	2212	if (!net_eq(dev_net(dev), sock_net(sk)))
2213	goto drop;	2213	goto drop;
2214		2214
2215	if (dev->header_ops) {	2215	if (dev_has_header(dev)) {
2216	if (sk->sk_type != SOCK_DGRAM)	2216	if (sk->sk_type != SOCK_DGRAM)
2217	skb_push(skb, skb->data - skb_mac_header(skb));	2217	skb_push(skb, skb->data - skb_mac_header(skb));
2218	else if (skb->pkt_type == PACKET_OUTGOING) {	2218	else if (skb->pkt_type == PACKET_OUTGOING) {

net/rose/rose_loopback.c+13−4

 		}
 		if (frametype == ROSE_CALL_REQUEST) {
-			if ((dev = rose_dev_get(dest)) != NULL) {
+			if (!rose_loopback_neigh->dev) {
-				if (rose_rx_call_request(skb, dev, rose_loopback_neigh, lci_o) == 0)
+				kfree_skb(skb);
-					kfree_skb(skb);
+				continue;
-			} else {
+			}
+			dev = rose_dev_get(dest);
+			if (!dev) {
+				kfree_skb(skb);
+				continue;
+			}
+			if (rose_rx_call_request(skb, dev, rose_loopback_neigh, lci_o) == 0) {
+				dev_put(dev);
 				kfree_skb(skb);
 			}
 		} else {

net/tls/tls_device.c+4−1

 	if (tls_ctx->tx_conf != TLS_HW) {
 		dev_put(netdev);
 		tls_ctx->netdev = NULL;
+	} else {
+		set_bit(TLS_RX_DEV_CLOSED, &tls_ctx->flags);
 	}
 out:
 	up_read(&device_offload_lock);
 		if (ctx->tx_conf == TLS_HW)
 			netdev->tlsdev_ops->tls_dev_del(netdev, ctx,
 							TLS_OFFLOAD_CTX_DIR_TX);
-		if (ctx->rx_conf == TLS_HW)
+		if (ctx->rx_conf == TLS_HW &&
+		    !test_bit(TLS_RX_DEV_CLOSED, &ctx->flags))
 			netdev->tlsdev_ops->tls_dev_del(netdev, ctx,
 							TLS_OFFLOAD_CTX_DIR_RX);
 		WRITE_ONCE(ctx->netdev, NULL);

net/tls/tls_sw.c+6−0

 			return NULL;
 		}
+		if (!skb_queue_empty(&sk->sk_receive_queue)) {
+			__strp_unpause(&ctx->strp);
+			if (ctx->recv_pkt)
+				return ctx->recv_pkt;
+		}
 		if (sk->sk_shutdown & RCV_SHUTDOWN)
 			return NULL;

net/vmw_vsock/virtio_transport_common.c+5−3

 		virtio_transport_free_pkt(pkt);
 	}
-	if (remove_sock)
+	if (remove_sock) {
+		sock_set_flag(sk, SOCK_DONE);
 		vsock_remove_sock(vsk);
+	}
 }
 EXPORT_SYMBOL_GPL(virtio_transport_release);
 	lock_sock(sk);
-	/* Check if sk has been released before lock_sock */
+	/* Check if sk has been closed before lock_sock */
-	if (sk->sk_shutdown == SHUTDOWN_MASK) {
+	if (sock_flag(sk, SOCK_DONE)) {
 		(void)virtio_transport_reset_no_sock(t, pkt);
 		release_sock(sk);
 		sock_put(sk);

sound/core/control.c+1−1

@@ -1539,7 +1539,7 @@ static int snd_ctl_elem_add(struct snd_ctl_file *file, · 1538 unmodified lines
1539		1539
1540	unlock:	1540	unlock:
1541	up_write(&card->controls_rwsem);	1541	up_write(&card->controls_rwsem);
1542	return 0;	1542	return err;
1543	}	1543	}
1544		1544
1545	static int snd_ctl_elem_add_user(struct snd_ctl_file *file,	1545	static int snd_ctl_elem_add_user(struct snd_ctl_file *file,

sound/firewire/fireworks/fireworks_transaction.c+2−2

@@ -123,7 +123,7 @@ copy_resp_to_buf(struct snd_efw efw, void data, size_t length, int *rcode) · 122 unmodified lines
123	t = (struct snd_efw_transaction *)data;	123	t = (struct snd_efw_transaction *)data;
124	length = min_t(size_t, be32_to_cpu(t->length) * sizeof(u32), length);	124	length = min_t(size_t, be32_to_cpu(t->length) * sizeof(u32), length);
125		125
126	spin_lock_irq(&efw->lock);	126	spin_lock(&efw->lock);
127		127
128	if (efw->push_ptr < efw->pull_ptr)	128	if (efw->push_ptr < efw->pull_ptr)
129	capacity = (unsigned int)(efw->pull_ptr - efw->push_ptr);	129	capacity = (unsigned int)(efw->pull_ptr - efw->push_ptr);
@@ -190,7 +190,7 @@ handle_resp_for_user(struct fw_card *card, int generation, int source, · 60 unmodified lines
190		190
191	copy_resp_to_buf(efw, data, length, rcode);	191	copy_resp_to_buf(efw, data, length, rcode);
192	end:	192	end:
193	spin_unlock_irq(&instances_lock);	193	spin_unlock(&instances_lock);
194	}	194	}
195		195
196	static void	196	static void

sound/pci/hda/hda_intel.c+3−0

 	/* DG1 */
 	{ PCI_DEVICE(0x8086, 0x490d),
 	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
+	/* Alderlake-S */
+	{ PCI_DEVICE(0x8086, 0x7ad0),
+	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
 	/* Elkhart Lake */
 	{ PCI_DEVICE(0x8086, 0x4b55),
 	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},

sound/pci/hda/patch_ca0132.c+2−0

@@ -9183,6 +9183,8 @@ static void ca0132_mmio_init(struct hda_codec *codec) · 9182 unmodified lines
9183	case QUIRK_AE5:	9183	case QUIRK_AE5:
9184	ca0132_mmio_init_ae5(codec);	9184	ca0132_mmio_init_ae5(codec);
9185	break;	9185	break;
		9186	default:
		9187	break;
9186	}	9188	}
9187	}	9189	}
9188		9190

sound/pci/hda/patch_hdmi.c+1−0

@@ -4274,6 +4274,7 @@ HDA_CODEC_ENTRY(0x8086280d, "Geminilake HDMI", patch_i915_glk_hdmi), · 4273 unmodified lines
4274	HDA_CODEC_ENTRY(0x8086280f, "Icelake HDMI", patch_i915_icl_hdmi),	4274	HDA_CODEC_ENTRY(0x8086280f, "Icelake HDMI", patch_i915_icl_hdmi),
4275	HDA_CODEC_ENTRY(0x80862812, "Tigerlake HDMI", patch_i915_tgl_hdmi),	4275	HDA_CODEC_ENTRY(0x80862812, "Tigerlake HDMI", patch_i915_tgl_hdmi),
4276	HDA_CODEC_ENTRY(0x80862814, "DG1 HDMI", patch_i915_tgl_hdmi),	4276	HDA_CODEC_ENTRY(0x80862814, "DG1 HDMI", patch_i915_tgl_hdmi),
		4277	HDA_CODEC_ENTRY(0x80862815, "Alderlake HDMI", patch_i915_tgl_hdmi),
4277	HDA_CODEC_ENTRY(0x80862816, "Rocketlake HDMI", patch_i915_tgl_hdmi),	4278	HDA_CODEC_ENTRY(0x80862816, "Rocketlake HDMI", patch_i915_tgl_hdmi),
4278	HDA_CODEC_ENTRY(0x8086281a, "Jasperlake HDMI", patch_i915_icl_hdmi),	4279	HDA_CODEC_ENTRY(0x8086281a, "Jasperlake HDMI", patch_i915_icl_hdmi),
4279	HDA_CODEC_ENTRY(0x8086281b, "Elkhartlake HDMI", patch_i915_icl_hdmi),	4280	HDA_CODEC_ENTRY(0x8086281b, "Elkhartlake HDMI", patch_i915_icl_hdmi),

sound/pci/hda/patch_realtek.c+84−1

@@ -2522,13 +2522,23 @@ static const struct snd_pci_quirk alc882_fixup_tbl[] = { · 2521 unmodified lines
2522	SND_PCI_QUIRK_VENDOR(0x1462, "MSI", ALC882_FIXUP_GPIO3),	2522	SND_PCI_QUIRK_VENDOR(0x1462, "MSI", ALC882_FIXUP_GPIO3),
2523	SND_PCI_QUIRK(0x147b, 0x107a, "Abit AW9D-MAX", ALC882_FIXUP_ABIT_AW9D_MAX),	2523	SND_PCI_QUIRK(0x147b, 0x107a, "Abit AW9D-MAX", ALC882_FIXUP_ABIT_AW9D_MAX),
2524	SND_PCI_QUIRK(0x1558, 0x9501, "Clevo P950HR", ALC1220_FIXUP_CLEVO_P950),	2524	SND_PCI_QUIRK(0x1558, 0x9501, "Clevo P950HR", ALC1220_FIXUP_CLEVO_P950),
		2525	SND_PCI_QUIRK(0x1558, 0x9506, "Clevo P955HQ", ALC1220_FIXUP_CLEVO_P950),
		2526	SND_PCI_QUIRK(0x1558, 0x950A, "Clevo P955H[PR]", ALC1220_FIXUP_CLEVO_P950),
2525	SND_PCI_QUIRK(0x1558, 0x95e1, "Clevo P95xER", ALC1220_FIXUP_CLEVO_P950),	2527	SND_PCI_QUIRK(0x1558, 0x95e1, "Clevo P95xER", ALC1220_FIXUP_CLEVO_P950),
2526	SND_PCI_QUIRK(0x1558, 0x95e2, "Clevo P950ER", ALC1220_FIXUP_CLEVO_P950),	2528	SND_PCI_QUIRK(0x1558, 0x95e2, "Clevo P950ER", ALC1220_FIXUP_CLEVO_P950),
		2529	SND_PCI_QUIRK(0x1558, 0x95e3, "Clevo P955[ER]T", ALC1220_FIXUP_CLEVO_P950),
		2530	SND_PCI_QUIRK(0x1558, 0x95e4, "Clevo P955ER", ALC1220_FIXUP_CLEVO_P950),
		2531	SND_PCI_QUIRK(0x1558, 0x95e5, "Clevo P955EE6", ALC1220_FIXUP_CLEVO_P950),
		2532	SND_PCI_QUIRK(0x1558, 0x95e6, "Clevo P950R[CDF]", ALC1220_FIXUP_CLEVO_P950),
2527	SND_PCI_QUIRK(0x1558, 0x96e1, "Clevo P960[ER][CDFN]-K", ALC1220_FIXUP_CLEVO_P950),	2533	SND_PCI_QUIRK(0x1558, 0x96e1, "Clevo P960[ER][CDFN]-K", ALC1220_FIXUP_CLEVO_P950),
2528	SND_PCI_QUIRK(0x1558, 0x97e1, "Clevo P970[ER][CDFN]", ALC1220_FIXUP_CLEVO_P950),	2534	SND_PCI_QUIRK(0x1558, 0x97e1, "Clevo P970[ER][CDFN]", ALC1220_FIXUP_CLEVO_P950),
		2535	SND_PCI_QUIRK(0x1558, 0x97e2, "Clevo P970RC-M", ALC1220_FIXUP_CLEVO_P950),
		2536	SND_PCI_QUIRK(0x1558, 0x50d3, "Clevo PC50[ER][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
2529	SND_PCI_QUIRK(0x1558, 0x65d1, "Clevo PB51[ER][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS),	2537	SND_PCI_QUIRK(0x1558, 0x65d1, "Clevo PB51[ER][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
		2538	SND_PCI_QUIRK(0x1558, 0x65d2, "Clevo PB51R[CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
		2539	SND_PCI_QUIRK(0x1558, 0x65e1, "Clevo PB51[ED][DF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
2530	SND_PCI_QUIRK(0x1558, 0x67d1, "Clevo PB71[ER][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS),	2540	SND_PCI_QUIRK(0x1558, 0x67d1, "Clevo PB71[ER][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
2531	SND_PCI_QUIRK(0x1558, 0x50d3, "Clevo PC50[ER][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS),	2541	SND_PCI_QUIRK(0x1558, 0x67e1, "Clevo PB71[DE][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
2532	SND_PCI_QUIRK(0x1558, 0x70d1, "Clevo PC70[ER][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS),	2542	SND_PCI_QUIRK(0x1558, 0x70d1, "Clevo PC70[ER][CDF]", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
2533	SND_PCI_QUIRK(0x1558, 0x7714, "Clevo X170", ALC1220_FIXUP_CLEVO_PB51ED_PINS),	2543	SND_PCI_QUIRK(0x1558, 0x7714, "Clevo X170", ALC1220_FIXUP_CLEVO_PB51ED_PINS),
2534	SND_PCI_QUIRK_VENDOR(0x1558, "Clevo laptop", ALC882_FIXUP_EAPD),	2544	SND_PCI_QUIRK_VENDOR(0x1558, "Clevo laptop", ALC882_FIXUP_EAPD),
@@ -4216,6 +4226,12 @@ static void alc286_fixup_hp_gpio_led(struct hda_codec *codec, · 1681 unmodified lines
4216	alc_fixup_hp_gpio_led(codec, action, 0x02, 0x20);	4226	alc_fixup_hp_gpio_led(codec, action, 0x02, 0x20);
4217	}	4227	}
4218		4228
		4229	static void alc287_fixup_hp_gpio_led(struct hda_codec *codec,
		4230	const struct hda_fixup *fix, int action)
		4231	{
		4232	alc_fixup_hp_gpio_led(codec, action, 0x10, 0);
		4233	}
		4234
4219	/* turn on/off mic-mute LED per capture hook via VREF change */	4235	/* turn on/off mic-mute LED per capture hook via VREF change */
4220	static int vref_micmute_led_set(struct led_classdev *led_cdev,	4236	static int vref_micmute_led_set(struct led_classdev *led_cdev,
4221	enum led_brightness brightness)	4237	enum led_brightness brightness)
@@ -6301,6 +6317,9 @@ enum { · 2079 unmodified lines
6301	ALC274_FIXUP_HP_MIC,	6317	ALC274_FIXUP_HP_MIC,
6302	ALC274_FIXUP_HP_HEADSET_MIC,	6318	ALC274_FIXUP_HP_HEADSET_MIC,
6303	ALC256_FIXUP_ASUS_HPE,	6319	ALC256_FIXUP_ASUS_HPE,
		6320	ALC285_FIXUP_THINKPAD_NO_BASS_SPK_HEADSET_JACK,
		6321	ALC287_FIXUP_HP_GPIO_LED,
		6322	ALC256_FIXUP_HP_HEADSET_MIC,
6304	};	6323	};
6305		6324
6306	static const struct hda_fixup alc269_fixups[] = {	6325	static const struct hda_fixup alc269_fixups[] = {
@@ -7705,6 +7724,20 @@ static const struct hda_fixup alc269_fixups[] = { · 1398 unmodified lines
7705	.chained = true,	7724	.chained = true,
7706	.chain_id = ALC294_FIXUP_ASUS_HEADSET_MIC	7725	.chain_id = ALC294_FIXUP_ASUS_HEADSET_MIC
7707	},	7726	},
		7727	[ALC285_FIXUP_THINKPAD_NO_BASS_SPK_HEADSET_JACK] = {
		7728	.type = HDA_FIXUP_FUNC,
		7729	.v.func = alc_fixup_headset_jack,
		7730	.chained = true,
		7731	.chain_id = ALC269_FIXUP_THINKPAD_ACPI
		7732	},
		7733	[ALC287_FIXUP_HP_GPIO_LED] = {
		7734	.type = HDA_FIXUP_FUNC,
		7735	.v.func = alc287_fixup_hp_gpio_led,
		7736	},
		7737	[ALC256_FIXUP_HP_HEADSET_MIC] = {
		7738	.type = HDA_FIXUP_FUNC,
		7739	.v.func = alc274_fixup_hp_headset_mic,
		7740	},
7708	};	7741	};
7709		7742
7710	static const struct snd_pci_quirk alc269_fixup_tbl[] = {	7743	static const struct snd_pci_quirk alc269_fixup_tbl[] = {
@@ -7859,6 +7892,8 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { · 148 unmodified lines
7859	SND_PCI_QUIRK(0x103c, 0x8760, "HP", ALC285_FIXUP_HP_MUTE_LED),	7892	SND_PCI_QUIRK(0x103c, 0x8760, "HP", ALC285_FIXUP_HP_MUTE_LED),
7860	SND_PCI_QUIRK(0x103c, 0x877a, "HP", ALC285_FIXUP_HP_MUTE_LED),	7893	SND_PCI_QUIRK(0x103c, 0x877a, "HP", ALC285_FIXUP_HP_MUTE_LED),
7861	SND_PCI_QUIRK(0x103c, 0x877d, "HP", ALC236_FIXUP_HP_MUTE_LED),	7894	SND_PCI_QUIRK(0x103c, 0x877d, "HP", ALC236_FIXUP_HP_MUTE_LED),
		7895	SND_PCI_QUIRK(0x103c, 0x87f4, "HP", ALC287_FIXUP_HP_GPIO_LED),
		7896	SND_PCI_QUIRK(0x103c, 0x87f5, "HP", ALC287_FIXUP_HP_GPIO_LED),
7862	SND_PCI_QUIRK(0x1043, 0x103e, "ASUS X540SA", ALC256_FIXUP_ASUS_MIC),	7897	SND_PCI_QUIRK(0x1043, 0x103e, "ASUS X540SA", ALC256_FIXUP_ASUS_MIC),
7863	SND_PCI_QUIRK(0x1043, 0x103f, "ASUS TX300", ALC282_FIXUP_ASUS_TX300),	7898	SND_PCI_QUIRK(0x1043, 0x103f, "ASUS TX300", ALC282_FIXUP_ASUS_TX300),
7864	SND_PCI_QUIRK(0x1043, 0x106d, "Asus K53BE", ALC269_FIXUP_LIMIT_INT_MIC_BOOST),	7899	SND_PCI_QUIRK(0x1043, 0x106d, "Asus K53BE", ALC269_FIXUP_LIMIT_INT_MIC_BOOST),
@@ -7924,11 +7959,49 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { · 59 unmodified lines
7924	SND_PCI_QUIRK(0x1458, 0xfa53, "Gigabyte BXBT-2807", ALC283_FIXUP_HEADSET_MIC),	7959	SND_PCI_QUIRK(0x1458, 0xfa53, "Gigabyte BXBT-2807", ALC283_FIXUP_HEADSET_MIC),
7925	SND_PCI_QUIRK(0x1462, 0xb120, "MSI Cubi MS-B120", ALC283_FIXUP_HEADSET_MIC),	7960	SND_PCI_QUIRK(0x1462, 0xb120, "MSI Cubi MS-B120", ALC283_FIXUP_HEADSET_MIC),
7926	SND_PCI_QUIRK(0x1462, 0xb171, "Cubi N 8GL (MS-B171)", ALC283_FIXUP_HEADSET_MIC),	7961	SND_PCI_QUIRK(0x1462, 0xb171, "Cubi N 8GL (MS-B171)", ALC283_FIXUP_HEADSET_MIC),
		7962	SND_PCI_QUIRK(0x1558, 0x1323, "Clevo N130ZU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
7927	SND_PCI_QUIRK(0x1558, 0x1325, "System76 Darter Pro (darp5)", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),	7963	SND_PCI_QUIRK(0x1558, 0x1325, "System76 Darter Pro (darp5)", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		7964	SND_PCI_QUIRK(0x1558, 0x1401, "Clevo L140[CZ]U", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		7965	SND_PCI_QUIRK(0x1558, 0x1403, "Clevo N140CU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		7966	SND_PCI_QUIRK(0x1558, 0x1404, "Clevo N150CU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		7967	SND_PCI_QUIRK(0x1558, 0x14a1, "Clevo L141MU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		7968	SND_PCI_QUIRK(0x1558, 0x4018, "Clevo NV40M[BE]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		7969	SND_PCI_QUIRK(0x1558, 0x4019, "Clevo NV40MZ", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		7970	SND_PCI_QUIRK(0x1558, 0x4020, "Clevo NV40MB", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		7971	SND_PCI_QUIRK(0x1558, 0x40a1, "Clevo NL40GU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		7972	SND_PCI_QUIRK(0x1558, 0x40c1, "Clevo NL40[CZ]U", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		7973	SND_PCI_QUIRK(0x1558, 0x40d1, "Clevo NL41DU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		7974	SND_PCI_QUIRK(0x1558, 0x50a3, "Clevo NJ51GU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		7975	SND_PCI_QUIRK(0x1558, 0x50b3, "Clevo NK50S[BEZ]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		7976	SND_PCI_QUIRK(0x1558, 0x50b6, "Clevo NK50S5", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		7977	SND_PCI_QUIRK(0x1558, 0x50b8, "Clevo NK50SZ", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		7978	SND_PCI_QUIRK(0x1558, 0x50d5, "Clevo NP50D5", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		7979	SND_PCI_QUIRK(0x1558, 0x50f0, "Clevo NH50A[CDF]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		7980	SND_PCI_QUIRK(0x1558, 0x50f3, "Clevo NH58DPQ", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		7981	SND_PCI_QUIRK(0x1558, 0x5101, "Clevo S510WU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		7982	SND_PCI_QUIRK(0x1558, 0x5157, "Clevo W517GU1", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		7983	SND_PCI_QUIRK(0x1558, 0x51a1, "Clevo NS50MU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		7984	SND_PCI_QUIRK(0x1558, 0x70a1, "Clevo NB70T[HJK]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		7985	SND_PCI_QUIRK(0x1558, 0x70b3, "Clevo NK70SB", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		7986	SND_PCI_QUIRK(0x1558, 0x8228, "Clevo NR40BU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		7987	SND_PCI_QUIRK(0x1558, 0x8520, "Clevo NH50D[CD]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		7988	SND_PCI_QUIRK(0x1558, 0x8521, "Clevo NH77D[CD]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		7989	SND_PCI_QUIRK(0x1558, 0x8535, "Clevo NH50D[BE]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		7990	SND_PCI_QUIRK(0x1558, 0x8536, "Clevo NH79D[BE]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
7928	SND_PCI_QUIRK(0x1558, 0x8550, "System76 Gazelle (gaze14)", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),	7991	SND_PCI_QUIRK(0x1558, 0x8550, "System76 Gazelle (gaze14)", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
7929	SND_PCI_QUIRK(0x1558, 0x8551, "System76 Gazelle (gaze14)", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),	7992	SND_PCI_QUIRK(0x1558, 0x8551, "System76 Gazelle (gaze14)", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
7930	SND_PCI_QUIRK(0x1558, 0x8560, "System76 Gazelle (gaze14)", ALC269_FIXUP_HEADSET_MIC),	7993	SND_PCI_QUIRK(0x1558, 0x8560, "System76 Gazelle (gaze14)", ALC269_FIXUP_HEADSET_MIC),
7931	SND_PCI_QUIRK(0x1558, 0x8561, "System76 Gazelle (gaze14)", ALC269_FIXUP_HEADSET_MIC),	7994	SND_PCI_QUIRK(0x1558, 0x8561, "System76 Gazelle (gaze14)", ALC269_FIXUP_HEADSET_MIC),
		7995	SND_PCI_QUIRK(0x1558, 0x8668, "Clevo NP50B[BE]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		7996	SND_PCI_QUIRK(0x1558, 0x8680, "Clevo NJ50LU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		7997	SND_PCI_QUIRK(0x1558, 0x8686, "Clevo NH50[CZ]U", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		7998	SND_PCI_QUIRK(0x1558, 0x8a20, "Clevo NH55DCQ-Y", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		7999	SND_PCI_QUIRK(0x1558, 0x8a51, "Clevo NH70RCQ-Y", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		8000	SND_PCI_QUIRK(0x1558, 0x8d50, "Clevo NH55RCQ-M", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		8001	SND_PCI_QUIRK(0x1558, 0x951d, "Clevo N950T[CDF]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		8002	SND_PCI_QUIRK(0x1558, 0x961d, "Clevo N960S[CDF]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		8003	SND_PCI_QUIRK(0x1558, 0x971d, "Clevo N970T[CDF]", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
		8004	SND_PCI_QUIRK(0x1558, 0xa500, "Clevo NL53RU", ALC293_FIXUP_SYSTEM76_MIC_NO_PRESENCE),
7932	SND_PCI_QUIRK(0x17aa, 0x1036, "Lenovo P520", ALC233_FIXUP_LENOVO_MULTI_CODECS),	8005	SND_PCI_QUIRK(0x17aa, 0x1036, "Lenovo P520", ALC233_FIXUP_LENOVO_MULTI_CODECS),
7933	SND_PCI_QUIRK(0x17aa, 0x1048, "ThinkCentre Station", ALC283_FIXUP_HEADSET_MIC),	8006	SND_PCI_QUIRK(0x17aa, 0x1048, "ThinkCentre Station", ALC283_FIXUP_HEADSET_MIC),
7934	SND_PCI_QUIRK(0x17aa, 0x20f2, "Thinkpad SL410/510", ALC269_FIXUP_SKU_IGNORE),	8007	SND_PCI_QUIRK(0x17aa, 0x20f2, "Thinkpad SL410/510", ALC269_FIXUP_SKU_IGNORE),
@@ -7966,6 +8039,8 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { · 31 unmodified lines
7966	SND_PCI_QUIRK(0x17aa, 0x225d, "Thinkpad T480", ALC269_FIXUP_LIMIT_INT_MIC_BOOST),	8039	SND_PCI_QUIRK(0x17aa, 0x225d, "Thinkpad T480", ALC269_FIXUP_LIMIT_INT_MIC_BOOST),
7967	SND_PCI_QUIRK(0x17aa, 0x2292, "Thinkpad X1 Carbon 7th", ALC285_FIXUP_THINKPAD_HEADSET_JACK),	8040	SND_PCI_QUIRK(0x17aa, 0x2292, "Thinkpad X1 Carbon 7th", ALC285_FIXUP_THINKPAD_HEADSET_JACK),
7968	SND_PCI_QUIRK(0x17aa, 0x22be, "Thinkpad X1 Carbon 8th", ALC285_FIXUP_THINKPAD_HEADSET_JACK),	8041	SND_PCI_QUIRK(0x17aa, 0x22be, "Thinkpad X1 Carbon 8th", ALC285_FIXUP_THINKPAD_HEADSET_JACK),
		8042	SND_PCI_QUIRK(0x17aa, 0x22c1, "Thinkpad P1 Gen 3", ALC285_FIXUP_THINKPAD_NO_BASS_SPK_HEADSET_JACK),
		8043	SND_PCI_QUIRK(0x17aa, 0x22c2, "Thinkpad X1 Extreme Gen 3", ALC285_FIXUP_THINKPAD_NO_BASS_SPK_HEADSET_JACK),
7969	SND_PCI_QUIRK(0x17aa, 0x30bb, "ThinkCentre AIO", ALC233_FIXUP_LENOVO_LINE2_MIC_HOTKEY),	8044	SND_PCI_QUIRK(0x17aa, 0x30bb, "ThinkCentre AIO", ALC233_FIXUP_LENOVO_LINE2_MIC_HOTKEY),
7970	SND_PCI_QUIRK(0x17aa, 0x30e2, "ThinkCentre AIO", ALC233_FIXUP_LENOVO_LINE2_MIC_HOTKEY),	8045	SND_PCI_QUIRK(0x17aa, 0x30e2, "ThinkCentre AIO", ALC233_FIXUP_LENOVO_LINE2_MIC_HOTKEY),
7971	SND_PCI_QUIRK(0x17aa, 0x310c, "ThinkCentre Station", ALC294_FIXUP_LENOVO_MIC_LOCATION),	8046	SND_PCI_QUIRK(0x17aa, 0x310c, "ThinkCentre Station", ALC294_FIXUP_LENOVO_MIC_LOCATION),
@@ -8278,6 +8353,10 @@ static const struct snd_hda_pin_quirk alc269_pin_fixup_tbl[] = { · 306 unmodified lines
8278	{0x19, 0x02a11020},	8353	{0x19, 0x02a11020},
8279	{0x1a, 0x02a11030},	8354	{0x1a, 0x02a11030},
8280	{0x21, 0x0221101f}),	8355	{0x21, 0x0221101f}),
		8356	SND_HDA_PIN_QUIRK(0x10ec0236, 0x103c, "HP", ALC256_FIXUP_HP_HEADSET_MIC,
		8357	{0x14, 0x90170110},
		8358	{0x19, 0x02a11020},
		8359	{0x21, 0x02211030}),
8281	SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell", ALC255_FIXUP_DELL2_MIC_NO_PRESENCE,	8360	SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell", ALC255_FIXUP_DELL2_MIC_NO_PRESENCE,
8282	{0x14, 0x90170110},	8361	{0x14, 0x90170110},
8283	{0x21, 0x02211020}),	8362	{0x21, 0x02211020}),
@@ -8380,6 +8459,10 @@ static const struct snd_hda_pin_quirk alc269_pin_fixup_tbl[] = { · 96 unmodified lines
8380	{0x1a, 0x90a70130},	8459	{0x1a, 0x90a70130},
8381	{0x1b, 0x90170110},	8460	{0x1b, 0x90170110},
8382	{0x21, 0x03211020}),	8461	{0x21, 0x03211020}),
		8462	SND_HDA_PIN_QUIRK(0x10ec0256, 0x103c, "HP", ALC256_FIXUP_HP_HEADSET_MIC,
		8463	{0x14, 0x90170110},
		8464	{0x19, 0x02a11020},
		8465	{0x21, 0x0221101f}),
8383	SND_HDA_PIN_QUIRK(0x10ec0274, 0x103c, "HP", ALC274_FIXUP_HP_HEADSET_MIC,	8466	SND_HDA_PIN_QUIRK(0x10ec0274, 0x103c, "HP", ALC274_FIXUP_HP_HEADSET_MIC,
8384	{0x17, 0x90170110},	8467	{0x17, 0x90170110},
8385	{0x19, 0x03a11030},	8468	{0x19, 0x03a11030},

sound/pci/mixart/mixart_core.c+2−3

 	unsigned int i;
 #endif
-	mutex_lock(&mgr->msg_lock);
 	err = 0;
 	/* copy message descriptor from miXart to driver */
 	writel_be(headptr, MIXART_MEM(mgr, MSG_OUTBOUND_FREE_HEAD));
  _clean_exit:
-	mutex_unlock(&mgr->msg_lock);
 	return err;
 }
 	resp.data = resp_data;
 	resp.size = max_resp_size;
+	mutex_lock(&mgr->msg_lock);
 	err = get_msg(mgr, &resp, msg_frame);
+	mutex_unlock(&mgr->msg_lock);
 	if( request->message_id != resp.message_id )
 		dev_err(&mgr->pci->dev, "RESPONSE ERROR!\n");

sound/soc/codecs/rt1015.c+21−1

 #include <sound/soc-dapm.h>
 #include <sound/soc.h>
 #include <sound/tlv.h>
+#include <sound/rt1015.h>
 #include "rl6231.h"
 #include "rt1015.h"
+static const struct rt1015_platform_data i2s_default_platform_data = {
+	.power_up_delay_ms = 50,
+};
 static const struct reg_default rt1015_reg[] = {
 	{ 0x0000, 0x0000 },
 	{ 0x0004, 0xa000 },
 	struct rt1015_priv *rt1015 = container_of(work, struct rt1015_priv,
 						flush_work.work);
 	struct snd_soc_component *component = rt1015->component;
-	unsigned int val, i = 0, count = 20;
+	unsigned int val, i = 0, count = 200;
 	while (i < count) {
 		usleep_range(1000, 1500);
 	case SND_SOC_DAPM_POST_PMU:
 		if (rt1015->hw_config == RT1015_HW_28)
 			schedule_delayed_work(&rt1015->flush_work, msecs_to_jiffies(10));
+		msleep(rt1015->pdata.power_up_delay_ms);
 		break;
 	default:
 		break;
 MODULE_DEVICE_TABLE(acpi, rt1015_acpi_match);
 #endif
+static void rt1015_parse_dt(struct rt1015_priv *rt1015, struct device *dev)
+{
+	device_property_read_u32(dev, "realtek,power-up-delay-ms",
+		&rt1015->pdata.power_up_delay_ms);
+}
 static int rt1015_i2c_probe(struct i2c_client *i2c,
 	const struct i2c_device_id *id)
 {
+	struct rt1015_platform_data *pdata = dev_get_platdata(&i2c->dev);
 	struct rt1015_priv *rt1015;
 	int ret;
 	unsigned int val;
 	i2c_set_clientdata(i2c, rt1015);
+	rt1015->pdata = i2s_default_platform_data;
+	if (pdata)
+		rt1015->pdata = *pdata;
+	else
+		rt1015_parse_dt(rt1015, &i2c->dev);
 	rt1015->regmap = devm_regmap_init_i2c(i2c, &rt1015_regmap);
 	if (IS_ERR(rt1015->regmap)) {
 		ret = PTR_ERR(rt1015->regmap);

sound/soc/codecs/rt1015.h+2−0

 #ifndef __RT1015_H__
 #define __RT1015_H__
+#include <sound/rt1015.h>
 #define RT1015_DEVICE_ID_VAL			0x1011
 #define RT1015_DEVICE_ID_VAL2			0x1015
 struct rt1015_priv {
 	struct snd_soc_component *component;
+	struct rt1015_platform_data pdata;
 	struct regmap *regmap;
 	int sysclk;
 	int sysclk_src;

sound/soc/intel/boards/kbl_rt5663_rt5514_max98927.c+2−0

 	switch (level) {
 	case SND_SOC_BIAS_PREPARE:
 		if (dapm->bias_level == SND_SOC_BIAS_ON) {
+			if (!__clk_is_enabled(priv->mclk))
+				return 0;
 			dev_dbg(card->dev, "Disable mclk");
 			clk_disable_unprepare(priv->mclk);
 		} else {

sound/soc/intel/catpt/pcm.c+4−5

 	if (ret)
 		return CATPT_IPC_ERROR(ret);
-	ret = catpt_dsp_update_lpclock(cdev);
-	if (ret)
-		return ret;
 	ret = catpt_dai_apply_usettings(dai, stream);
 	if (ret)
 		return ret;
 	case SNDRV_PCM_TRIGGER_RESUME:
 	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 	resume_stream:
+		catpt_dsp_update_lpclock(cdev);
 		ret = catpt_ipc_resume_stream(cdev, stream->info.stream_hw_id);
 		if (ret)
 			return CATPT_IPC_ERROR(ret);
 	case SNDRV_PCM_TRIGGER_STOP:
 		stream->prepared = false;
-		catpt_dsp_update_lpclock(cdev);
 		fallthrough;
 	case SNDRV_PCM_TRIGGER_SUSPEND:
 	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 		ret = catpt_ipc_pause_stream(cdev, stream->info.stream_hw_id);
+		catpt_dsp_update_lpclock(cdev);
 		if (ret)
 			return CATPT_IPC_ERROR(ret);
 		break;
 	dsppos = bytes_to_frames(r, pos->stream_position);
+	if (!stream->prepared)
+		goto exit;
 	/* only offload is set_write_pos driven */
 	if (stream->template->type != CATPT_STRM_TYPE_RENDER)
 		goto exit;

sound/soc/intel/keembay/kmb_platform.c+3−3

@@ -487,9 +487,9 @@ static int kmb_dai_hw_params(struct snd_pcm_substream *substream, · 486 unmodified lines
487	kmb_i2s->xfer_resolution = 0x02;	487	kmb_i2s->xfer_resolution = 0x02;
488	break;	488	break;
489	case SNDRV_PCM_FORMAT_S24_LE:	489	case SNDRV_PCM_FORMAT_S24_LE:
490	config->data_width = 24;	490	config->data_width = 32;
491	kmb_i2s->ccr = 0x08;	491	kmb_i2s->ccr = 0x14;
492	kmb_i2s->xfer_resolution = 0x04;	492	kmb_i2s->xfer_resolution = 0x05;
493	break;	493	break;
494	case SNDRV_PCM_FORMAT_S32_LE:	494	case SNDRV_PCM_FORMAT_S32_LE:
495	config->data_width = 32;	495	config->data_width = 32;

sound/soc/qcom/lpass-platform.c+4−1

 	else
 		dma_ch = 0;
-	if (dma_ch < 0)
+	if (dma_ch < 0) {
+		kfree(data);
 		return dma_ch;
+	}
 	if (cpu_dai->driver->id == LPASS_DP_RX) {
 		map = drvdata->hdmiif_map;
 	ret = snd_pcm_hw_constraint_integer(runtime,
 			SNDRV_PCM_HW_PARAM_PERIODS);
 	if (ret < 0) {
+		kfree(data);
 		dev_err(soc_runtime->dev, "setting constraints failed: %d\n",
 			ret);
 		return -EINVAL;

sound/usb/card.c+4−0

@@ -379,6 +379,10 @@ static const struct usb_audio_device_name usb_audio_names[] = { · 378 unmodified lines
379		379
380	DEVICE_NAME(0x046d, 0x0990, "Logitech, Inc.", "QuickCam Pro 9000"),	380	DEVICE_NAME(0x046d, 0x0990, "Logitech, Inc.", "QuickCam Pro 9000"),
381		381
		382	/* ASUS ROG Strix */
		383	PROFILE_NAME(0x0b05, 0x1917,
		384	"Realtek", "ALC1220-VB-DT", "Realtek-ALC1220-VB-Desktop"),
		385
382	/* Dell WD15 Dock */	386	/* Dell WD15 Dock */
383	PROFILE_NAME(0x0bda, 0x4014, "Dell", "WD15 Dock", "Dell-WD15-Dock"),	387	PROFILE_NAME(0x0bda, 0x4014, "Dell", "WD15 Dock", "Dell-WD15-Dock"),
384	/* Dell WD19 Dock */	388	/* Dell WD19 Dock */

sound/usb/mixer_maps.c+2−1

 	},
 	{	/* ASUS ROG Strix */
 		.id = USB_ID(0x0b05, 0x1917),
-		.map = asus_rog_map,
+		.map = trx40_mobo_map,
+		.connector_map = trx40_mobo_connector_map,
 	},
 	{	/* MSI TRX40 Creator */
 		.id = USB_ID(0x0db0, 0x0d64),

sound/usb/quirks.c+5−5

 	    && (requesttype & USB_TYPE_MASK) == USB_TYPE_CLASS)
 		msleep(20);
-	/* Zoom R16/24, Logitech H650e/H570e, Jabra 550a, Kingston HyperX
+	/* Zoom R16/24, many Logitech(at least H650e/H570e/BCC950),
-	 *  needs a tiny delay here, otherwise requests like get/set
+	 * Jabra 550a, Kingston HyperX needs a tiny delay here,
-	 *  frequency return as failed despite actually succeeding.
+	 * otherwise requests like get/set frequency return
+	 * as failed despite actually succeeding.
 	 */
 	if ((chip->usb_id == USB_ID(0x1686, 0x00dd) ||
-	     chip->usb_id == USB_ID(0x046d, 0x0a46) ||
+	     USB_ID_VENDOR(chip->usb_id) == 0x046d  || /* Logitech */
-	     chip->usb_id == USB_ID(0x046d, 0x0a56) ||
 	     chip->usb_id == USB_ID(0x0b0e, 0x0349) ||
 	     chip->usb_id == USB_ID(0x0951, 0x16ad)) &&
 	    (requesttype & USB_TYPE_MASK) == USB_TYPE_CLASS)

tools/testing/selftests/seccomp/seccomp_bpf.c+4−4

@@ -1758,10 +1758,10 @@ TEST_F(TRACE_poke, getpid_runs_normally) · 1757 unmodified lines
1758	* and the code is stored as a positive value. \	1758	* and the code is stored as a positive value. \
1759	*/ \	1759	*/ \
1760	if (_result < 0) { \	1760	if (_result < 0) { \
1761	SYSCALL_RET(_regs) = -result; \	1761	SYSCALL_RET(_regs) = -_result; \
1762	(_regs).ccr \|= 0x10000000; \	1762	(_regs).ccr \|= 0x10000000; \
1763	} else { \	1763	} else { \
1764	SYSCALL_RET(_regs) = result; \	1764	SYSCALL_RET(_regs) = _result; \
1765	(_regs).ccr &= ~0x10000000; \	1765	(_regs).ccr &= ~0x10000000; \
1766	} \	1766	} \
1767	} while (0)	1767	} while (0)
@@ -1804,8 +1804,8 @@ TEST_F(TRACE_poke, getpid_runs_normally) · 36 unmodified lines
1804	#define SYSCALL_RET(_regs) (_regs).a[(_regs).windowbase * 4 + 2]	1804	#define SYSCALL_RET(_regs) (_regs).a[(_regs).windowbase * 4 + 2]
1805	#elif defined(__sh__)	1805	#elif defined(__sh__)
1806	# define ARCH_REGS struct pt_regs	1806	# define ARCH_REGS struct pt_regs
1807	# define SYSCALL_NUM(_regs) (_regs).gpr[3]	1807	# define SYSCALL_NUM(_regs) (_regs).regs[3]
1808	# define SYSCALL_RET(_regs) (_regs).gpr[0]	1808	# define SYSCALL_RET(_regs) (_regs).regs[0]
1809	#else	1809	#else
1810	# error "Do not know how to find your architecture's registers and syscalls"	1810	# error "Do not know how to find your architecture's registers and syscalls"
1811	#endif	1811	#endif

@@ -30,14 +30,14 @@ · 29 unmodified lines
30	* -Changes related to MMU v2 (Rel 4.8)	30	* -Changes related to MMU v2 (Rel 4.8)
31	*	31	*
32	* Vineetg: Aug 29th 2008	32	* Vineetg: Aug 29th 2008
33	* -In TLB Flush operations (Metal Fix MMU) there is a explict command to	33	* -In TLB Flush operations (Metal Fix MMU) there is a explicit command to
34	* flush Micro-TLBS. If TLB Index Reg is invalid prior to TLBIVUTLB cmd,	34	* flush Micro-TLBS. If TLB Index Reg is invalid prior to TLBIVUTLB cmd,
35	* it fails. Thus need to load it with ANY valid value before invoking	35	* it fails. Thus need to load it with ANY valid value before invoking
36	* TLBIVUTLB cmd	36	* TLBIVUTLB cmd
37	*	37	*
38	* Vineetg: Aug 21th 2008:	38	* Vineetg: Aug 21th 2008:
39	* -Reduced the duration of IRQ lockouts in TLB Flush routines	39	* -Reduced the duration of IRQ lockouts in TLB Flush routines
40	* -Multiple copies of TLB erase code seperated into a "single" function	40	* -Multiple copies of TLB erase code separated into a "single" function
41	* -In TLB Flush routines, interrupt disabling moved UP to retrieve ASID	41	* -In TLB Flush routines, interrupt disabling moved UP to retrieve ASID
42	* in interrupt-safe region.	42	* in interrupt-safe region.
43	*	43	*
@@ -66,7 +66,7 @@ · 22 unmodified lines
66	*	66	*
67	* Although J-TLB is 2 way set assoc, ARC700 caches J-TLB into uTLBS which has	67	* Although J-TLB is 2 way set assoc, ARC700 caches J-TLB into uTLBS which has
68	* much higher associativity. u-D-TLB is 8 ways, u-I-TLB is 4 ways.	68	* much higher associativity. u-D-TLB is 8 ways, u-I-TLB is 4 ways.
69	* Given this, the thrasing problem should never happen because once the 3	69	* Given this, the thrashing problem should never happen because once the 3
70	* J-TLB entries are created (even though 3rd will knock out one of the prev	70	* J-TLB entries are created (even though 3rd will knock out one of the prev
71	* two), the u-D-TLB and u-I-TLB will have what is required to accomplish memcpy	71	* two), the u-D-TLB and u-I-TLB will have what is required to accomplish memcpy
72	*	72	*
@@ -127,7 +127,7 @@ static void utlb_invalidate(void) · 54 unmodified lines
127	* There was however an obscure hardware bug, where uTLB flush would	127	* There was however an obscure hardware bug, where uTLB flush would
128	* fail when a prior probe for J-TLB (both totally unrelated) would	128	* fail when a prior probe for J-TLB (both totally unrelated) would
129	* return lkup err - because the entry didn't exist in MMU.	129	* return lkup err - because the entry didn't exist in MMU.
130	* The Workround was to set Index reg with some valid value, prior to	130	* The Workaround was to set Index reg with some valid value, prior to
131	* flush. This was fixed in MMU v3	131	* flush. This was fixed in MMU v3
132	*/	132	*/
133	unsigned int idx;	133	unsigned int idx;
@@ -272,7 +272,7 @@ noinline void local_flush_tlb_all(void) · 138 unmodified lines
272	}	272	}
273		273
274	/*	274	/*
275	* Flush the entrie MM for userland. The fastest way is to move to Next ASID	275	* Flush the entire MM for userland. The fastest way is to move to Next ASID
276	*/	276	*/
277	noinline void local_flush_tlb_mm(struct mm_struct *mm)	277	noinline void local_flush_tlb_mm(struct mm_struct *mm)
278	{	278	{
@@ -303,7 +303,7 @@ noinline void local_flush_tlb_mm(struct mm_struct *mm) · 24 unmodified lines
303	* Difference between this and Kernel Range Flush is	303	* Difference between this and Kernel Range Flush is
304	* -Here the fastest way (if range is too large) is to move to next ASID	304	* -Here the fastest way (if range is too large) is to move to next ASID
305	* without doing any explicit Shootdown	305	* without doing any explicit Shootdown
306	* -In case of kernel Flush, entry has to be shot down explictly	306	* -In case of kernel Flush, entry has to be shot down explicitly
307	*/	307	*/
308	void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,	308	void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
309	unsigned long end)	309	unsigned long end)
@@ -620,7 +620,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long vaddr_unaligned, · 310 unmodified lines
620	* Super Page size is configurable in hardware (4K to 16M), but fixed once	620	* Super Page size is configurable in hardware (4K to 16M), but fixed once
621	* RTL builds.	621	* RTL builds.
622	*	622	*
623	* The exact THP size a Linx configuration will support is a function of:	623	* The exact THP size a Linux configuration will support is a function of:
624	* - MMU page size (typical 8K, RTL fixed)	624	* - MMU page size (typical 8K, RTL fixed)
625	* - software page walker address split between PGD:PTE:PFN (typical	625	* - software page walker address split between PGD:PTE:PFN (typical
626	* 11:8:13, but can be changed with 1 line)	626	* 11:8:13, but can be changed with 1 line)
@@ -698,7 +698,7 @@ void local_flush_pmd_tlb_range(struct vm_area_struct *vma, unsigned long start, · 71 unmodified lines
698		698
699	#endif	699	#endif
700		700
701	/* Read the Cache Build Confuration Registers, Decode them and save into	701	/* Read the Cache Build Configuration Registers, Decode them and save into
702	* the cpuinfo structure for later use.	702	* the cpuinfo structure for later use.
703	* No Validation is done here, simply read/convert the BCRs	703	* No Validation is done here, simply read/convert the BCRs
704	*/	704	*/
@@ -803,13 +803,13 @@ void arc_mmu_init(void) · 98 unmodified lines
803	pr_info("%s", arc_mmu_mumbojumbo(0, str, sizeof(str)));	803	pr_info("%s", arc_mmu_mumbojumbo(0, str, sizeof(str)));
804		804
805	/*	805	/*
806	* Can't be done in processor.h due to header include depenedencies	806	* Can't be done in processor.h due to header include dependencies
807	*/	807	*/
808	BUILD_BUG_ON(!IS_ALIGNED((CONFIG_ARC_KVADDR_SIZE << 20), PMD_SIZE));	808	BUILD_BUG_ON(!IS_ALIGNED((CONFIG_ARC_KVADDR_SIZE << 20), PMD_SIZE));
809		809
810	/*	810	/*
811	* stack top size sanity check,	811	* stack top size sanity check,
812	* Can't be done in processor.h due to header include depenedencies	812	* Can't be done in processor.h due to header include dependencies
813	*/	813	*/
814	BUILD_BUG_ON(!IS_ALIGNED(STACK_TOP, PMD_SIZE));	814	BUILD_BUG_ON(!IS_ALIGNED(STACK_TOP, PMD_SIZE));
815		815
@@ -881,7 +881,7 @@ void arc_mmu_init(void) · 65 unmodified lines
881	* the duplicate one.	881	* the duplicate one.
882	* -Knob to be verbose abt it.(TODO: hook them up to debugfs)	882	* -Knob to be verbose abt it.(TODO: hook them up to debugfs)
883	*/	883	*/
884	volatile int dup_pd_silent; /* Be slient abt it or complain (default) */	884	volatile int dup_pd_silent; /* Be silent abt it or complain (default) */
885		885
886	void do_tlb_overlap_fault(unsigned long cause, unsigned long address,	886	void do_tlb_overlap_fault(unsigned long cause, unsigned long address,
887	struct pt_regs *regs)	887	struct pt_regs *regs)
@@ -948,7 +948,7 @@ void do_tlb_overlap_fault(unsigned long cause, unsigned long address, · 60 unmodified lines
948		948
949	/***********************************************************************	949	/***********************************************************************
950	* Diagnostic Routines	950	* Diagnostic Routines
951	* -Called from Low Level TLB Hanlders if things don;t look good	951	* -Called from Low Level TLB Handlers if things don;t look good
952	**********************************************************************/	952	**********************************************************************/
953		953
954	#ifdef CONFIG_ARC_DBG_TLB_PARANOIA	954	#ifdef CONFIG_ARC_DBG_TLB_PARANOIA

@@ -190,7 +190,7 @@ TRACE_EVENT(inode_foreign_history, · 189 unmodified lines
190	),	190	),
191		191
192	TP_fast_assign(	192	TP_fast_assign(
193	strncpy(__entry->name, bdi_dev_name(inode_to_bdi(inode)), 32);	193	strscpy_pad(__entry->name, bdi_dev_name(inode_to_bdi(inode)), 32);
194	__entry->ino = inode->i_ino;	194	__entry->ino = inode->i_ino;
195	__entry->cgroup_ino = __trace_wbc_assign_cgroup(wbc);	195	__entry->cgroup_ino = __trace_wbc_assign_cgroup(wbc);
196	__entry->history = history;	196	__entry->history = history;
@@ -219,7 +219,7 @@ TRACE_EVENT(inode_switch_wbs, · 22 unmodified lines
219	),	219	),
220		220
221	TP_fast_assign(	221	TP_fast_assign(
222	strncpy(__entry->name, bdi_dev_name(old_wb->bdi), 32);	222	strscpy_pad(__entry->name, bdi_dev_name(old_wb->bdi), 32);
223	__entry->ino = inode->i_ino;	223	__entry->ino = inode->i_ino;
224	__entry->old_cgroup_ino = __trace_wb_assign_cgroup(old_wb);	224	__entry->old_cgroup_ino = __trace_wb_assign_cgroup(old_wb);
225	__entry->new_cgroup_ino = __trace_wb_assign_cgroup(new_wb);	225	__entry->new_cgroup_ino = __trace_wb_assign_cgroup(new_wb);
@@ -252,7 +252,7 @@ TRACE_EVENT(track_foreign_dirty, · 26 unmodified lines
252	struct address_space *mapping = page_mapping(page);	252	struct address_space *mapping = page_mapping(page);
253	struct inode *inode = mapping ? mapping->host : NULL;	253	struct inode *inode = mapping ? mapping->host : NULL;
254		254
255	strncpy(__entry->name, bdi_dev_name(wb->bdi), 32);	255	strscpy_pad(__entry->name, bdi_dev_name(wb->bdi), 32);
256	__entry->bdi_id = wb->bdi->id;	256	__entry->bdi_id = wb->bdi->id;
257	__entry->ino = inode ? inode->i_ino : 0;	257	__entry->ino = inode ? inode->i_ino : 0;
258	__entry->memcg_id = wb->memcg_css->id;	258	__entry->memcg_id = wb->memcg_css->id;
@@ -285,7 +285,7 @@ TRACE_EVENT(flush_foreign, · 26 unmodified lines
285	),	285	),
286		286
287	TP_fast_assign(	287	TP_fast_assign(
288	strncpy(__entry->name, bdi_dev_name(wb->bdi), 32);	288	strscpy_pad(__entry->name, bdi_dev_name(wb->bdi), 32);
289	__entry->cgroup_ino = __trace_wb_assign_cgroup(wb);	289	__entry->cgroup_ino = __trace_wb_assign_cgroup(wb);
290	__entry->frn_bdi_id = frn_bdi_id;	290	__entry->frn_bdi_id = frn_bdi_id;
291	__entry->frn_memcg_id = frn_memcg_id;	291	__entry->frn_memcg_id = frn_memcg_id;