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IB/mlx5: Mmap the HCA's clock info to user-space

This patch maps the new page to user space applications to allow converting a user space completion timestamp to system wall time at the lowest possible latency cost. By using a versioning scheme we allow compatibility between current and future userspace libraries. The change moves mlx5_ib_mmap_cmd enum from mlx5_ib.h to the abi header file mlx5-abi.h.

Feras Daoud committed 8 years ago

Commit 5c99eae1 parent 24d33d23 files · +59 −13Browse files

Unified · Split

3 files
  1. drivers/infiniband/hw/mlx5/main.c +42 −2
  2. drivers/infiniband/hw/mlx5/mlx5_ib.h +0 −10
  3. include/uapi/rdma/mlx5-abi.h +17 −1
drivers/infiniband/hw/mlx5/main.c+42−2
@@ -1579,6 +1579,7 @@ static struct ib_ucontext *mlx5_ib_alloc_ucontext(struct ib_device *ibdev, · 1578 unmodified lines
15791579 struct mlx5_ib_dev *dev = to_mdev(ibdev);
15801580 struct mlx5_ib_alloc_ucontext_req_v2 req = {};
15811581 struct mlx5_ib_alloc_ucontext_resp resp = {};
1582+ struct mlx5_core_dev *mdev = dev->mdev;
15821583 struct mlx5_ib_ucontext *context;
15831584 struct mlx5_bfreg_info *bfregi;
15841585 int ver;
@@ -1706,6 +1707,12 @@ static struct ib_ucontext *mlx5_ib_alloc_ucontext(struct ib_device *ibdev, · 121 unmodified lines
17061707 resp.response_length += sizeof(resp.eth_min_inline);
17071708 }
17081709
1710+ if (field_avail(typeof(resp), clock_info_versions, udata->outlen)) {
1711+ if (mdev->clock_info)
1712+ resp.clock_info_versions = BIT(MLX5_IB_CLOCK_INFO_V1);
1713+ resp.response_length += sizeof(resp.clock_info_versions);
1714+ }
1715+
17091716 /*
17101717 * We don't want to expose information from the PCI bar that is located
17111718 * after 4096 bytes, so if the arch only supports larger pages, let's
@@ -1719,8 +1726,7 @@ static struct ib_ucontext *mlx5_ib_alloc_ucontext(struct ib_device *ibdev, · 7 unmodified lines
17191726 resp.hca_core_clock_offset =
17201727 offsetof(struct mlx5_init_seg, internal_timer_h) % PAGE_SIZE;
17211728 }
1722− resp.response_length += sizeof(resp.hca_core_clock_offset) +
1723− sizeof(resp.reserved2);
1729+ resp.response_length += sizeof(resp.hca_core_clock_offset);
17241730 }
17251731
17261732 if (field_avail(typeof(resp), log_uar_size, udata->outlen))
@@ -1959,6 +1965,38 @@ static inline char *mmap_cmd2str(enum mlx5_ib_mmap_cmd cmd) · 232 unmodified lines
19591965 }
19601966 }
19611967
1968+static int mlx5_ib_mmap_clock_info_page(struct mlx5_ib_dev *dev,
1969+ struct vm_area_struct *vma,
1970+ struct mlx5_ib_ucontext *context)
1971+{
1972+ phys_addr_t pfn;
1973+ int err;
1974+
1975+ if (vma->vm_end - vma->vm_start != PAGE_SIZE)
1976+ return -EINVAL;
1977+
1978+ if (get_index(vma->vm_pgoff) != MLX5_IB_CLOCK_INFO_V1)
1979+ return -EOPNOTSUPP;
1980+
1981+ if (vma->vm_flags & VM_WRITE)
1982+ return -EPERM;
1983+
1984+ if (!dev->mdev->clock_info_page)
1985+ return -EOPNOTSUPP;
1986+
1987+ pfn = page_to_pfn(dev->mdev->clock_info_page);
1988+ err = remap_pfn_range(vma, vma->vm_start, pfn, PAGE_SIZE,
1989+ vma->vm_page_prot);
1990+ if (err)
1991+ return err;
1992+
1993+ mlx5_ib_dbg(dev, "mapped clock info at 0x%lx, PA 0x%llx\n",
1994+ vma->vm_start,
1995+ (unsigned long long)pfn << PAGE_SHIFT);
1996+
1997+ return mlx5_ib_set_vma_data(vma, context);
1998+}
1999+
19622000 static int uar_mmap(struct mlx5_ib_dev *dev, enum mlx5_ib_mmap_cmd cmd,
19632001 struct vm_area_struct *vma,
19642002 struct mlx5_ib_ucontext *context)
@@ -2121,6 +2159,8 @@ static int mlx5_ib_mmap(struct ib_ucontext *ibcontext, struct vm_area_struct *vm · 156 unmodified lines
21212159 vma->vm_start,
21222160 (unsigned long long)pfn << PAGE_SHIFT);
21232161 break;
2162+ case MLX5_IB_MMAP_CLOCK_INFO:
2163+ return mlx5_ib_mmap_clock_info_page(dev, vma, context);
21242164
21252165 default:
21262166 return -EINVAL;
drivers/infiniband/hw/mlx5/mlx5_ib.h+0−10
@@ -70,16 +70,6 @@ enum { · 69 unmodified lines
7070 MLX5_IB_MMAP_CMD_MASK = 0xff,
7171 };
7272
73−enum mlx5_ib_mmap_cmd {
74− MLX5_IB_MMAP_REGULAR_PAGE = 0,
75− MLX5_IB_MMAP_GET_CONTIGUOUS_PAGES = 1,
76− MLX5_IB_MMAP_WC_PAGE = 2,
77− MLX5_IB_MMAP_NC_PAGE = 3,
78− /* 5 is chosen in order to be compatible with old versions of libmlx5 */
79− MLX5_IB_MMAP_CORE_CLOCK = 5,
80− MLX5_IB_MMAP_ALLOC_WC = 6,
81−};
82−
8373 enum {
8474 MLX5_RES_SCAT_DATA32_CQE = 0x1,
8575 MLX5_RES_SCAT_DATA64_CQE = 0x2,
include/uapi/rdma/mlx5-abi.h+17−1
@@ -124,7 +124,7 @@ struct mlx5_ib_alloc_ucontext_resp { · 123 unmodified lines
124124 __u8 cqe_version;
125125 __u8 cmds_supp_uhw;
126126 __u8 eth_min_inline;
127− __u8 reserved2;
127+ __u8 clock_info_versions;
128128 __u64 hca_core_clock_offset;
129129 __u32 log_uar_size;
130130 __u32 num_uars_per_page;
@@ -394,7 +394,23 @@ struct mlx5_ib_clock_info { · 263 unmodified lines
394394 __u64 overflow_period;
395395 };
396396
397+enum mlx5_ib_mmap_cmd {
398+ MLX5_IB_MMAP_REGULAR_PAGE = 0,
399+ MLX5_IB_MMAP_GET_CONTIGUOUS_PAGES = 1,
400+ MLX5_IB_MMAP_WC_PAGE = 2,
401+ MLX5_IB_MMAP_NC_PAGE = 3,
402+ /* 5 is chosen in order to be compatible with old versions of libmlx5 */
403+ MLX5_IB_MMAP_CORE_CLOCK = 5,
404+ MLX5_IB_MMAP_ALLOC_WC = 6,
405+ MLX5_IB_MMAP_CLOCK_INFO = 7,
406+};
407+
397408 enum {
398409 MLX5_IB_CLOCK_INFO_KERNEL_UPDATING = 1,
399410 };
411+
412+/* Bit indexes for the mlx5_alloc_ucontext_resp.clock_info_versions bitmap */
413+enum {
414+ MLX5_IB_CLOCK_INFO_V1 = 0,
415+};
400416 #endif /* MLX5_ABI_USER_H */

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