CHECK drivers/net/wan/fsl_ucc_hdlc.c drivers/net/wan/fsl_ucc_hdlc.c:309:57: warning: incorrect type in argument 2 (different address spaces) drivers/net/wan/fsl_ucc_hdlc.c:309:57: expected void [noderef] __iomem * drivers/net/wan/fsl_ucc_hdlc.c:309:57: got restricted __be16 * drivers/net/wan/fsl_ucc_hdlc.c:311:46: warning: incorrect type in argument 2 (different address spaces) drivers/net/wan/fsl_ucc_hdlc.c:311:46: expected void [noderef] __iomem * drivers/net/wan/fsl_ucc_hdlc.c:311:46: got restricted __be32 * drivers/net/wan/fsl_ucc_hdlc.c:320:57: warning: incorrect type in argument 2 (different address spaces) drivers/net/wan/fsl_ucc_hdlc.c:320:57: expected void [noderef] __iomem * drivers/net/wan/fsl_ucc_hdlc.c:320:57: got restricted __be16 * drivers/net/wan/fsl_ucc_hdlc.c:322:46: warning: incorrect type in argument 2 (different address spaces) drivers/net/wan/fsl_ucc_hdlc.c:322:46: expected void [noderef] __iomem * drivers/net/wan/fsl_ucc_hdlc.c:322:46: got restricted __be32 * drivers/net/wan/fsl_ucc_hdlc.c:372:29: warning: incorrect type in assignment (different base types) drivers/net/wan/fsl_ucc_hdlc.c:372:29: expected unsigned short [usertype] drivers/net/wan/fsl_ucc_hdlc.c:372:29: got restricted __be16 [usertype] drivers/net/wan/fsl_ucc_hdlc.c:379:36: warning: restricted __be16 degrades to integer drivers/net/wan/fsl_ucc_hdlc.c:402:12: warning: incorrect type in assignment (different address spaces) drivers/net/wan/fsl_ucc_hdlc.c:402:12: expected struct qe_bd [noderef] __iomem *bd drivers/net/wan/fsl_ucc_hdlc.c:402:12: got struct qe_bd *curtx_bd drivers/net/wan/fsl_ucc_hdlc.c:425:20: warning: incorrect type in assignment (different address spaces) drivers/net/wan/fsl_ucc_hdlc.c:425:20: expected struct qe_bd [noderef] __iomem *[assigned] bd drivers/net/wan/fsl_ucc_hdlc.c:425:20: got struct qe_bd *tx_bd_base drivers/net/wan/fsl_ucc_hdlc.c:427:16: error: incompatible types in comparison expression (different address spaces): drivers/net/wan/fsl_ucc_hdlc.c:427:16: struct qe_bd [noderef] __iomem * drivers/net/wan/fsl_ucc_hdlc.c:427:16: struct qe_bd * drivers/net/wan/fsl_ucc_hdlc.c:462:33: warning: incorrect type in argument 1 (different address spaces) drivers/net/wan/fsl_ucc_hdlc.c:506:41: warning: incorrect type in argument 1 (different address spaces) drivers/net/wan/fsl_ucc_hdlc.c:528:33: warning: incorrect type in argument 1 (different address spaces) drivers/net/wan/fsl_ucc_hdlc.c:552:38: warning: incorrect type in argument 1 (different address spaces) drivers/net/wan/fsl_ucc_hdlc.c:596:67: warning: incorrect type in argument 2 (different address spaces) drivers/net/wan/fsl_ucc_hdlc.c:611:41: warning: incorrect type in argument 1 (different address spaces) drivers/net/wan/fsl_ucc_hdlc.c:851:38: warning: incorrect type in initializer (different address spaces) drivers/net/wan/fsl_ucc_hdlc.c:854:40: warning: incorrect type in argument 1 (different address spaces) drivers/net/wan/fsl_ucc_hdlc.c:855:40: warning: incorrect type in argument 1 (different address spaces) drivers/net/wan/fsl_ucc_hdlc.c:858:39: warning: incorrect type in argument 1 (different address spaces) drivers/net/wan/fsl_ucc_hdlc.c:861:37: warning: incorrect type in argument 2 (different address spaces) drivers/net/wan/fsl_ucc_hdlc.c:866:38: warning: incorrect type in initializer (different address spaces) drivers/net/wan/fsl_ucc_hdlc.c:868:21: warning: incorrect type in argument 1 (different address spaces) drivers/net/wan/fsl_ucc_hdlc.c:870:40: warning: incorrect type in argument 2 (different address spaces) drivers/net/wan/fsl_ucc_hdlc.c:871:40: warning: incorrect type in argument 2 (different address spaces) drivers/net/wan/fsl_ucc_hdlc.c:873:39: warning: incorrect type in argument 2 (different address spaces) drivers/net/wan/fsl_ucc_hdlc.c:993:57: warning: incorrect type in argument 2 (different address spaces) drivers/net/wan/fsl_ucc_hdlc.c:995:46: warning: incorrect type in argument 2 (different address spaces) drivers/net/wan/fsl_ucc_hdlc.c:1004:57: warning: incorrect type in argument 2 (different address spaces) drivers/net/wan/fsl_ucc_hdlc.c:1006:46: warning: incorrect type in argument 2 (different address spaces) drivers/net/wan/fsl_ucc_hdlc.c:412:35: warning: dereference of noderef expression drivers/net/wan/fsl_ucc_hdlc.c:412:35: warning: dereference of noderef expression drivers/net/wan/fsl_ucc_hdlc.c:724:29: warning: dereference of noderef expression drivers/net/wan/fsl_ucc_hdlc.c:815:21: warning: dereference of noderef expression drivers/net/wan/fsl_ucc_hdlc.c:1021:29: warning: dereference of noderef expression Most of the warnings are due to DMA memory being incorrectly handled as IO memory. Fix it by doing direct read/write and doing proper dma_rmb() / dma_wmb(). Other problems are type mismatches or lack of use of IO accessors.
Unified · Split
| @@ -306,9 +306,8 @@ static int uhdlc_init(struct ucc_hdlc_private *priv) · 305 unmodified lines | |||
| 306 | else | 306 | else |
| 307 | bd_status = R_E_S | R_I_S | R_W_S; | 307 | bd_status = R_E_S | R_I_S | R_W_S; |
| 308 | 308 | ||
| 309 | iowrite16be(bd_status, &priv->rx_bd_base[i].status); | 309 | priv->rx_bd_base[i].status = cpu_to_be16(bd_status); |
| 310 | iowrite32be(priv->dma_rx_addr + i * MAX_RX_BUF_LENGTH, | 310 | priv->rx_bd_base[i].buf = cpu_to_be32(priv->dma_rx_addr + i * MAX_RX_BUF_LENGTH); |
| 311 | &priv->rx_bd_base[i].buf); | ||
| 312 | } | 311 | } |
| 313 | 312 | ||
| 314 | for (i = 0; i < TX_BD_RING_LEN; i++) { | 313 | for (i = 0; i < TX_BD_RING_LEN; i++) { |
| @@ -317,10 +316,10 @@ static int uhdlc_init(struct ucc_hdlc_private *priv) · 2 unmodified lines | |||
| 317 | else | 316 | else |
| 318 | bd_status = T_I_S | T_TC_S | T_W_S; | 317 | bd_status = T_I_S | T_TC_S | T_W_S; |
| 319 | 318 | ||
| 320 | iowrite16be(bd_status, &priv->tx_bd_base[i].status); | 319 | priv->tx_bd_base[i].status = cpu_to_be16(bd_status); |
| 321 | iowrite32be(priv->dma_tx_addr + i * MAX_RX_BUF_LENGTH, | 320 | priv->tx_bd_base[i].buf = cpu_to_be32(priv->dma_tx_addr + i * MAX_RX_BUF_LENGTH); |
| 322 | &priv->tx_bd_base[i].buf); | ||
| 323 | } | 321 | } |
| 322 | dma_wmb(); | ||
| 324 | 323 | ||
| 325 | return 0; | 324 | return 0; |
| 326 | 325 | ||
| @@ -352,10 +351,10 @@ static netdev_tx_t ucc_hdlc_tx(struct sk_buff *skb, struct net_device *dev) · 25 unmodified lines | |||
| 352 | { | 351 | { |
| 353 | hdlc_device *hdlc = dev_to_hdlc(dev); | 352 | hdlc_device *hdlc = dev_to_hdlc(dev); |
| 354 | struct ucc_hdlc_private *priv = (struct ucc_hdlc_private *)hdlc->priv; | 353 | struct ucc_hdlc_private *priv = (struct ucc_hdlc_private *)hdlc->priv; |
| 355 | struct qe_bd __iomem *bd; | 354 | struct qe_bd *bd; |
| 356 | u16 bd_status; | 355 | u16 bd_status; |
| 357 | unsigned long flags; | 356 | unsigned long flags; |
| 358 | u16 *proto_head; | 357 | __be16 *proto_head; |
| 359 | 358 | ||
| 360 | switch (dev->type) { | 359 | switch (dev->type) { |
| 361 | case ARPHRD_RAWHDLC: | 360 | case ARPHRD_RAWHDLC: |
| @@ -368,14 +367,14 @@ static netdev_tx_t ucc_hdlc_tx(struct sk_buff *skb, struct net_device *dev) · 6 unmodified lines | |||
| 368 | 367 | ||
| 369 | skb_push(skb, HDLC_HEAD_LEN); | 368 | skb_push(skb, HDLC_HEAD_LEN); |
| 370 | 369 | ||
| 371 | proto_head = (u16 *)skb->data; | 370 | proto_head = (__be16 *)skb->data; |
| 372 | *proto_head = htons(DEFAULT_HDLC_HEAD); | 371 | *proto_head = htons(DEFAULT_HDLC_HEAD); |
| 373 | 372 | ||
| 374 | dev->stats.tx_bytes += skb->len; | 373 | dev->stats.tx_bytes += skb->len; |
| 375 | break; | 374 | break; |
| 376 | 375 | ||
| 377 | case ARPHRD_PPP: | 376 | case ARPHRD_PPP: |
| 378 | proto_head = (u16 *)skb->data; | 377 | proto_head = (__be16 *)skb->data; |
| 379 | if (*proto_head != htons(DEFAULT_PPP_HEAD)) { | 378 | if (*proto_head != htons(DEFAULT_PPP_HEAD)) { |
| 380 | dev->stats.tx_dropped++; | 379 | dev->stats.tx_dropped++; |
| 381 | dev_kfree_skb(skb); | 380 | dev_kfree_skb(skb); |
| @@ -398,9 +397,10 @@ static netdev_tx_t ucc_hdlc_tx(struct sk_buff *skb, struct net_device *dev) · 16 unmodified lines | |||
| 398 | netdev_sent_queue(dev, skb->len); | 397 | netdev_sent_queue(dev, skb->len); |
| 399 | spin_lock_irqsave(&priv->lock, flags); | 398 | spin_lock_irqsave(&priv->lock, flags); |
| 400 | 399 | ||
| 400 | dma_rmb(); | ||
| 401 | /* Start from the next BD that should be filled */ | 401 | /* Start from the next BD that should be filled */ |
| 402 | bd = priv->curtx_bd; | 402 | bd = priv->curtx_bd; |
| 403 | bd_status = ioread16be(&bd->status); | 403 | bd_status = be16_to_cpu(bd->status); |
| 404 | /* Save the skb pointer so we can free it later */ | 404 | /* Save the skb pointer so we can free it later */ |
| 405 | priv->tx_skbuff[priv->skb_curtx] = skb; | 405 | priv->tx_skbuff[priv->skb_curtx] = skb; |
| 406 | 406 | ||
| @@ -415,8 +415,8 @@ static netdev_tx_t ucc_hdlc_tx(struct sk_buff *skb, struct net_device *dev) · 8 unmodified lines | |||
| 415 | /* set bd status and length */ | 415 | /* set bd status and length */ |
| 416 | bd_status = (bd_status & T_W_S) | T_R_S | T_I_S | T_L_S | T_TC_S; | 416 | bd_status = (bd_status & T_W_S) | T_R_S | T_I_S | T_L_S | T_TC_S; |
| 417 | 417 | ||
| 418 | iowrite16be(skb->len, &bd->length); | 418 | bd->length = cpu_to_be16(skb->len); |
| 419 | iowrite16be(bd_status, &bd->status); | 419 | bd->status = cpu_to_be16(bd_status); |
| 420 | 420 | ||
| 421 | /* Move to next BD in the ring */ | 421 | /* Move to next BD in the ring */ |
| 422 | if (!(bd_status & T_W_S)) | 422 | if (!(bd_status & T_W_S)) |
| @@ -458,8 +458,9 @@ static int hdlc_tx_done(struct ucc_hdlc_private *priv) · 35 unmodified lines | |||
| 458 | u16 bd_status; | 458 | u16 bd_status; |
| 459 | int tx_restart = 0; | 459 | int tx_restart = 0; |
| 460 | 460 | ||
| 461 | dma_rmb(); | ||
| 461 | bd = priv->dirty_tx; | 462 | bd = priv->dirty_tx; |
| 462 | bd_status = ioread16be(&bd->status); | 463 | bd_status = be16_to_cpu(bd->status); |
| 463 | 464 | ||
| 464 | /* Normal processing. */ | 465 | /* Normal processing. */ |
| 465 | while ((bd_status & T_R_S) == 0) { | 466 | while ((bd_status & T_R_S) == 0) { |
| @@ -503,7 +504,7 @@ static int hdlc_tx_done(struct ucc_hdlc_private *priv) · 37 unmodified lines | |||
| 503 | bd += 1; | 504 | bd += 1; |
| 504 | else | 505 | else |
| 505 | bd = priv->tx_bd_base; | 506 | bd = priv->tx_bd_base; |
| 506 | bd_status = ioread16be(&bd->status); | 507 | bd_status = be16_to_cpu(bd->status); |
| 507 | } | 508 | } |
| 508 | priv->dirty_tx = bd; | 509 | priv->dirty_tx = bd; |
| 509 | 510 | ||
| @@ -524,8 +525,9 @@ static int hdlc_rx_done(struct ucc_hdlc_private *priv, int rx_work_limit) · 14 unmodified lines | |||
| 524 | u16 length, howmany = 0; | 525 | u16 length, howmany = 0; |
| 525 | u8 *bdbuffer; | 526 | u8 *bdbuffer; |
| 526 | 527 | ||
| 528 | dma_rmb(); | ||
| 527 | bd = priv->currx_bd; | 529 | bd = priv->currx_bd; |
| 528 | bd_status = ioread16be(&bd->status); | 530 | bd_status = be16_to_cpu(bd->status); |
| 529 | 531 | ||
| 530 | /* while there are received buffers and BD is full (~R_E) */ | 532 | /* while there are received buffers and BD is full (~R_E) */ |
| 531 | while (!((bd_status & (R_E_S)) || (--rx_work_limit < 0))) { | 533 | while (!((bd_status & (R_E_S)) || (--rx_work_limit < 0))) { |
| @@ -549,7 +551,7 @@ static int hdlc_rx_done(struct ucc_hdlc_private *priv, int rx_work_limit) · 17 unmodified lines | |||
| 549 | } | 551 | } |
| 550 | bdbuffer = priv->rx_buffer + | 552 | bdbuffer = priv->rx_buffer + |
| 551 | (priv->currx_bdnum * MAX_RX_BUF_LENGTH); | 553 | (priv->currx_bdnum * MAX_RX_BUF_LENGTH); |
| 552 | length = ioread16be(&bd->length); | 554 | length = be16_to_cpu(bd->length); |
| 553 | 555 | ||
| 554 | switch (dev->type) { | 556 | switch (dev->type) { |
| 555 | case ARPHRD_RAWHDLC: | 557 | case ARPHRD_RAWHDLC: |
| @@ -593,7 +595,7 @@ static int hdlc_rx_done(struct ucc_hdlc_private *priv, int rx_work_limit) · 37 unmodified lines | |||
| 593 | netif_receive_skb(skb); | 595 | netif_receive_skb(skb); |
| 594 | 596 | ||
| 595 | recycle: | 597 | recycle: |
| 596 | iowrite16be((bd_status & R_W_S) | R_E_S | R_I_S, &bd->status); | 598 | bd->status = cpu_to_be16((bd_status & R_W_S) | R_E_S | R_I_S); |
| 597 | 599 | ||
| 598 | /* update to point at the next bd */ | 600 | /* update to point at the next bd */ |
| 599 | if (bd_status & R_W_S) { | 601 | if (bd_status & R_W_S) { |
| @@ -608,8 +610,9 @@ recycle: · 8 unmodified lines | |||
| 608 | bd += 1; | 610 | bd += 1; |
| 609 | } | 611 | } |
| 610 | 612 | ||
| 611 | bd_status = ioread16be(&bd->status); | 613 | bd_status = be16_to_cpu(bd->status); |
| 612 | } | 614 | } |
| 615 | dma_rmb(); | ||
| 613 | 616 | ||
| 614 | priv->currx_bd = bd; | 617 | priv->currx_bd = bd; |
| 615 | return howmany; | 618 | return howmany; |
| @@ -721,7 +724,7 @@ static int uhdlc_open(struct net_device *dev) · 105 unmodified lines | |||
| 721 | 724 | ||
| 722 | /* Enable the TDM port */ | 725 | /* Enable the TDM port */ |
| 723 | if (priv->tsa) | 726 | if (priv->tsa) |
| 724 | utdm->si_regs->siglmr1_h |= (0x1 << utdm->tdm_port); | 727 | qe_setbits_8(&utdm->si_regs->siglmr1_h, 0x1 << utdm->tdm_port); |
| 725 | 728 | ||
| 726 | priv->hdlc_busy = 1; | 729 | priv->hdlc_busy = 1; |
| 727 | netif_device_attach(priv->ndev); | 730 | netif_device_attach(priv->ndev); |
| @@ -812,7 +815,7 @@ static int uhdlc_close(struct net_device *dev) · 84 unmodified lines | |||
| 812 | (u8)QE_CR_PROTOCOL_UNSPECIFIED, 0); | 815 | (u8)QE_CR_PROTOCOL_UNSPECIFIED, 0); |
| 813 | 816 | ||
| 814 | if (priv->tsa) | 817 | if (priv->tsa) |
| 815 | utdm->si_regs->siglmr1_h &= ~(0x1 << utdm->tdm_port); | 818 | qe_clrbits_8(&utdm->si_regs->siglmr1_h, 0x1 << utdm->tdm_port); |
| 816 | 819 | ||
| 817 | ucc_fast_disable(priv->uccf, COMM_DIR_RX | COMM_DIR_TX); | 820 | ucc_fast_disable(priv->uccf, COMM_DIR_RX | COMM_DIR_TX); |
| 818 | 821 | ||
| @@ -848,7 +851,7 @@ static int ucc_hdlc_attach(struct net_device *dev, unsigned short encoding, · 29 unmodified lines | |||
| 848 | #ifdef CONFIG_PM | 851 | #ifdef CONFIG_PM |
| 849 | static void store_clk_config(struct ucc_hdlc_private *priv) | 852 | static void store_clk_config(struct ucc_hdlc_private *priv) |
| 850 | { | 853 | { |
| 851 | struct qe_mux *qe_mux_reg = &qe_immr->qmx; | 854 | struct qe_mux __iomem *qe_mux_reg = &qe_immr->qmx; |
| 852 | 855 | ||
| 853 | /* store si clk */ | 856 | /* store si clk */ |
| 854 | priv->cmxsi1cr_h = ioread32be(&qe_mux_reg->cmxsi1cr_h); | 857 | priv->cmxsi1cr_h = ioread32be(&qe_mux_reg->cmxsi1cr_h); |
| @@ -863,7 +866,7 @@ static void store_clk_config(struct ucc_hdlc_private *priv) · 8 unmodified lines | |||
| 863 | 866 | ||
| 864 | static void resume_clk_config(struct ucc_hdlc_private *priv) | 867 | static void resume_clk_config(struct ucc_hdlc_private *priv) |
| 865 | { | 868 | { |
| 866 | struct qe_mux *qe_mux_reg = &qe_immr->qmx; | 869 | struct qe_mux __iomem *qe_mux_reg = &qe_immr->qmx; |
| 867 | 870 | ||
| 868 | memcpy_toio(qe_mux_reg->cmxucr, priv->cmxucr, 4 * sizeof(u32)); | 871 | memcpy_toio(qe_mux_reg->cmxucr, priv->cmxucr, 4 * sizeof(u32)); |
| 869 | 872 | ||
| @@ -990,9 +993,8 @@ static int uhdlc_resume(struct device *dev) · 120 unmodified lines | |||
| 990 | else | 993 | else |
| 991 | bd_status = R_E_S | R_I_S | R_W_S; | 994 | bd_status = R_E_S | R_I_S | R_W_S; |
| 992 | 995 | ||
| 993 | iowrite16be(bd_status, &priv->rx_bd_base[i].status); | 996 | priv->rx_bd_base[i].status = cpu_to_be16(bd_status); |
| 994 | iowrite32be(priv->dma_rx_addr + i * MAX_RX_BUF_LENGTH, | 997 | priv->rx_bd_base[i].buf = cpu_to_be32(priv->dma_rx_addr + i * MAX_RX_BUF_LENGTH); |
| 995 | &priv->rx_bd_base[i].buf); | ||
| 996 | } | 998 | } |
| 997 | 999 | ||
| 998 | for (i = 0; i < TX_BD_RING_LEN; i++) { | 1000 | for (i = 0; i < TX_BD_RING_LEN; i++) { |
| @@ -1001,10 +1003,10 @@ static int uhdlc_resume(struct device *dev) · 2 unmodified lines | |||
| 1001 | else | 1003 | else |
| 1002 | bd_status = T_I_S | T_TC_S | T_W_S; | 1004 | bd_status = T_I_S | T_TC_S | T_W_S; |
| 1003 | 1005 | ||
| 1004 | iowrite16be(bd_status, &priv->tx_bd_base[i].status); | 1006 | priv->tx_bd_base[i].status = cpu_to_be16(bd_status); |
| 1005 | iowrite32be(priv->dma_tx_addr + i * MAX_RX_BUF_LENGTH, | 1007 | priv->tx_bd_base[i].buf = cpu_to_be32(priv->dma_tx_addr + i * MAX_RX_BUF_LENGTH); |
| 1006 | &priv->tx_bd_base[i].buf); | ||
| 1007 | } | 1008 | } |
| 1009 | dma_wmb(); | ||
| 1008 | 1010 | ||
| 1009 | /* if hdlc is busy enable TX and RX */ | 1011 | /* if hdlc is busy enable TX and RX */ |
| 1010 | if (priv->hdlc_busy == 1) { | 1012 | if (priv->hdlc_busy == 1) { |
| @@ -1018,7 +1020,7 @@ static int uhdlc_resume(struct device *dev) · 7 unmodified lines | |||
| 1018 | 1020 | ||
| 1019 | /* Enable the TDM port */ | 1021 | /* Enable the TDM port */ |
| 1020 | if (priv->tsa) | 1022 | if (priv->tsa) |
| 1021 | utdm->si_regs->siglmr1_h |= (0x1 << utdm->tdm_port); | 1023 | qe_setbits_8(&utdm->si_regs->siglmr1_h, 0x1 << utdm->tdm_port); |
| 1022 | } | 1024 | } |
| 1023 | 1025 | ||
| 1024 | napi_enable(&priv->napi); | 1026 | napi_enable(&priv->napi); |