iommu/vt-d: Enforce PASID devTLB field mask

Set proper masks to avoid invalid input spillover to reserved bits.

Liu Yi L committed 6 years ago

Commit 5f77d6c1 parent 9ebcfad1 file · +2 −2Browse files

Showing the changes to include/linux (1 of 1 file). Show all

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include/linux/intel-iommu.h+2−2

@@ -381,8 +381,8 @@ enum { · 380 unmodified lines
381		381
382	#define QI_DEV_EIOTLB_ADDR(a) ((u64)(a) & VTD_PAGE_MASK)	382	#define QI_DEV_EIOTLB_ADDR(a) ((u64)(a) & VTD_PAGE_MASK)
383	#define QI_DEV_EIOTLB_SIZE (((u64)1) << 11)	383	#define QI_DEV_EIOTLB_SIZE (((u64)1) << 11)
384	#define QI_DEV_EIOTLB_GLOB(g) ((u64)g)	384	#define QI_DEV_EIOTLB_GLOB(g) ((u64)(g) & 0x1)
385	#define QI_DEV_EIOTLB_PASID(p) (((u64)p) << 32)	385	#define QI_DEV_EIOTLB_PASID(p) ((u64)((p) & 0xfffff) << 32)
386	#define QI_DEV_EIOTLB_SID(sid) ((u64)((sid) & 0xffff) << 16)	386	#define QI_DEV_EIOTLB_SID(sid) ((u64)((sid) & 0xffff) << 16)
387	#define QI_DEV_EIOTLB_QDEP(qd) ((u64)((qd) & 0x1f) << 4)	387	#define QI_DEV_EIOTLB_QDEP(qd) ((u64)((qd) & 0x1f) << 4)
388	#define QI_DEV_EIOTLB_PFSID(pfsid) (((u64)(pfsid & 0xf) << 12) \| \	388	#define QI_DEV_EIOTLB_PFSID(pfsid) (((u64)(pfsid & 0xf) << 12) \| \