History

Merge master.kernel.org:/home/rmk/linux-2.6-arm

* master.kernel.org:/home/rmk/linux-2.6-arm: ARM: 6524/1: GIC irq desciptor bug fix ARM: 6523/1: iop: ensure sched_clock() is notrace ARM: 6456/1: Fix for building DEBUG with sa11xx_base.c as a module. ARM: 6519/1: kuser: Fix incorrect cmpxchg syscall in kuser helpers ARM: 6505/1: kprobes: Don't HAVE_KPROBES when CONFIG_THUMB2_KERNEL is selected ARM: 6508/1: vexpress: Correct data alignment in headsmp.S for CONFIG_THUMB2_KERNEL ARM: 6507/1: RealView: Correct data alignment in headsmp.S for CONFIG_THUMB2_KERNEL ARM: 6504/1: Thumb-2: Fix long-distance conditional branches in head.S for Thumb-2. ARM: 6503/1: Thumb-2: Restore sensible zImage header layout for CONFIG_THUMB2_KERNEL ARM: 6502/1: Thumb-2: Fix CONFIG_THUMB2_KERNEL breakage in compressed/head.S ARM: 6501/1: Thumb-2: Correct data alignment for CONFIG_THUMB2_KERNEL in mm/proc-v7.S ARM: 6500/1: Thumb-2: Correct data alignment for CONFIG_THUMB2_KERNEL in kernel/head.S ARM: 6499/1: Thumb-2: Correct data alignment for CONFIG_THUMB2_KERNEL in bootp/init.S ARM: 6498/1: vfp: Correct data alignment for CONFIG_THUMB2_KERNEL ARM: 6497/1: kexec: Correct data alignment for CONFIG_THUMB2_KERNEL ARM: 6496/1: GIC: Do not try to register more then NR_IRQS interrupts ARM: cns3xxx: Fix build with CONFIG_PCI=y

Linus Torvalds committed 15 years ago

Commit 60658f82 parents 771f8bc f444a5715 files · +56 −30Browse files

Unified · Split

15 files
  1. arch/arm/Kconfig +1 −1
  2. arch/arm/boot/Makefile +0 −5
  3. arch/arm/boot/bootp/init.S +2 −0
  4. arch/arm/boot/compressed/head.S +10 −3
  5. arch/arm/common/gic.c +24 −16
  6. arch/arm/kernel/entry-armv.S +1 −1
  7. arch/arm/kernel/head.S +7 −0
  8. arch/arm/kernel/relocate_kernel.S +2 −0
  9. arch/arm/mach-cns3xxx/pcie.c +1 −1
  10. arch/arm/mach-realview/headsmp.S +1 −0
  11. arch/arm/mach-vexpress/headsmp.S +1 −0
  12. arch/arm/mm/proc-v7.S +2 −2
  13. arch/arm/plat-iop/time.c +2 −1
  14. arch/arm/vfp/vfphw.S +1 −0
  15. drivers/pcmcia/soc_common.c +1 −0
arch/arm/Kconfig+1−1
@@ -9,7 +9,7 @@ config ARM · 8 unmodified lines
9 select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)9 select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)
10 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)10 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
11 select HAVE_ARCH_KGDB11 select HAVE_ARCH_KGDB
12 select HAVE_KPROBES if (!XIP_KERNEL)12 select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
13 select HAVE_KRETPROBES if (HAVE_KPROBES)13 select HAVE_KRETPROBES if (HAVE_KPROBES)
14 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)14 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
15 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)15 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
arch/arm/boot/Makefile+0−5
@@ -70,12 +70,7 @@ else · 69 unmodified lines
70$(obj)/uImage: LOADADDR=$(ZRELADDR)70$(obj)/uImage: LOADADDR=$(ZRELADDR)
71endif71endif
72 72
73ifeq ($(CONFIG_THUMB2_KERNEL),y)
74# Set bit 0 to 1 so that "mov pc, rx" switches to Thumb-2 mode
75$(obj)/uImage: STARTADDR=$(shell echo $(LOADADDR) | sed -e "s/.$$/1/")
76else
77$(obj)/uImage: STARTADDR=$(LOADADDR)73$(obj)/uImage: STARTADDR=$(LOADADDR)
78endif
79 74
80$(obj)/uImage: $(obj)/zImage FORCE75$(obj)/uImage: $(obj)/zImage FORCE
81 $(call if_changed,uimage)76 $(call if_changed,uimage)
arch/arm/boot/bootp/init.S+2−0
@@ -73,6 +73,8 @@ move: ldmia r4!, {r7 - r10} @ move 32-bytes at a time · 72 unmodified lines
73 73
74 .size _start, . - _start74 .size _start, . - _start
75 75
76 .align
77
76 .type data,#object78 .type data,#object
77data: .word initrd_start @ source initrd address79data: .word initrd_start @ source initrd address
78 .word initrd_phys @ destination initrd address80 .word initrd_phys @ destination initrd address
arch/arm/boot/compressed/head.S+10−3
@@ -125,9 +125,13 @@ wait: mrc p14, 0, pc, c0, c1, 0 · 124 unmodified lines
125 * sort out different calling conventions125 * sort out different calling conventions
126 */126 */
127 .align127 .align
128 .arm @ Always enter in ARM state
128start:129start:
129 .type start,#function130 .type start,#function
130 .rept 8131 THUMB( adr r12, BSYM(1f) )
132 THUMB( bx r12 )
133 THUMB( .rept 6 )
134 ARM( .rept 8 )
131 mov r0, r0135 mov r0, r0
132 .endr136 .endr
133 137
@@ -135,6 +139,7 @@ start: · 1 unmodified line
135 .word 0x016f2818 @ Magic numbers to help the loader139 .word 0x016f2818 @ Magic numbers to help the loader
136 .word start @ absolute load/run zImage address140 .word start @ absolute load/run zImage address
137 .word _edata @ zImage end address141 .word _edata @ zImage end address
142 THUMB( .thumb )
1381: mov r7, r1 @ save architecture ID1431: mov r7, r1 @ save architecture ID
139 mov r8, r2 @ save atags pointer144 mov r8, r2 @ save atags pointer
140 145
@@ -174,7 +179,8 @@ not_angel: · 33 unmodified lines
174 ldr sp, [r0, #28]179 ldr sp, [r0, #28]
175#ifdef CONFIG_AUTO_ZRELADDR180#ifdef CONFIG_AUTO_ZRELADDR
176 @ determine final kernel image address181 @ determine final kernel image address
177 and r4, pc, #0xf8000000182 mov r4, pc
183 and r4, r4, #0xf8000000
178 add r4, r4, #TEXT_OFFSET184 add r4, r4, #TEXT_OFFSET
179#else185#else
180 ldr r4, =zreladdr186 ldr r4, =zreladdr
@@ -445,7 +451,8 @@ __setup_mmu: sub r3, r4, #16384 @ Page directory size · 264 unmodified lines
445 */451 */
446 mov r1, #0x1e452 mov r1, #0x1e
447 orr r1, r1, #3 << 10453 orr r1, r1, #3 << 10
448 mov r2, pc, lsr #20454 mov r2, pc
455 mov r2, r2, lsr #20
449 orr r1, r1, r2, lsl #20456 orr r1, r1, r2, lsl #20
450 add r0, r3, r2, lsl #2457 add r0, r3, r2, lsl #2
451 str r1, [r0], #4458 str r1, [r0], #4
arch/arm/common/gic.c+24−16
@@ -146,9 +146,15 @@ static int gic_set_cpu(unsigned int irq, const struct cpumask *mask_val) · 145 unmodified lines
146 unsigned int shift = (irq % 4) * 8;146 unsigned int shift = (irq % 4) * 8;
147 unsigned int cpu = cpumask_first(mask_val);147 unsigned int cpu = cpumask_first(mask_val);
148 u32 val;148 u32 val;
149 struct irq_desc *desc;
149 150
150 spin_lock(&irq_controller_lock);151 spin_lock(&irq_controller_lock);
151 irq_desc[irq].node = cpu;152 desc = irq_to_desc(irq);
153 if (desc == NULL) {
154 spin_unlock(&irq_controller_lock);
155 return -EINVAL;
156 }
157 desc->node = cpu;
152 val = readl(reg) & ~(0xff << shift);158 val = readl(reg) & ~(0xff << shift);
153 val |= 1 << (cpu + shift);159 val |= 1 << (cpu + shift);
154 writel(val, reg);160 writel(val, reg);
@@ -210,7 +216,7 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq) · 55 unmodified lines
210void __init gic_dist_init(unsigned int gic_nr, void __iomem *base,216void __init gic_dist_init(unsigned int gic_nr, void __iomem *base,
211 unsigned int irq_start)217 unsigned int irq_start)
212{218{
213 unsigned int max_irq, i;219 unsigned int gic_irqs, irq_limit, i;
214 u32 cpumask = 1 << smp_processor_id();220 u32 cpumask = 1 << smp_processor_id();
215 221
216 if (gic_nr >= MAX_GIC_NR)222 if (gic_nr >= MAX_GIC_NR)
@@ -226,47 +232,49 @@ void __init gic_dist_init(unsigned int gic_nr, void __iomem *base, · 9 unmodified lines
226 232
227 /*233 /*
228 * Find out how many interrupts are supported.234 * Find out how many interrupts are supported.
229 */
230 max_irq = readl(base + GIC_DIST_CTR) & 0x1f;
231 max_irq = (max_irq + 1) * 32;
232
233 /*
234 * The GIC only supports up to 1020 interrupt sources.235 * The GIC only supports up to 1020 interrupt sources.
235 * Limit this to either the architected maximum, or the
236 * platform maximum.
237 */236 */
238 if (max_irq > max(1020, NR_IRQS))237 gic_irqs = readl(base + GIC_DIST_CTR) & 0x1f;
239 max_irq = max(1020, NR_IRQS);238 gic_irqs = (gic_irqs + 1) * 32;
239 if (gic_irqs > 1020)
240 gic_irqs = 1020;
240 241
241 /*242 /*
242 * Set all global interrupts to be level triggered, active low.243 * Set all global interrupts to be level triggered, active low.
243 */244 */
244 for (i = 32; i < max_irq; i += 16)245 for (i = 32; i < gic_irqs; i += 16)
245 writel(0, base + GIC_DIST_CONFIG + i * 4 / 16);246 writel(0, base + GIC_DIST_CONFIG + i * 4 / 16);
246 247
247 /*248 /*
248 * Set all global interrupts to this CPU only.249 * Set all global interrupts to this CPU only.
249 */250 */
250 for (i = 32; i < max_irq; i += 4)251 for (i = 32; i < gic_irqs; i += 4)
251 writel(cpumask, base + GIC_DIST_TARGET + i * 4 / 4);252 writel(cpumask, base + GIC_DIST_TARGET + i * 4 / 4);
252 253
253 /*254 /*
254 * Set priority on all global interrupts.255 * Set priority on all global interrupts.
255 */256 */
256 for (i = 32; i < max_irq; i += 4)257 for (i = 32; i < gic_irqs; i += 4)
257 writel(0xa0a0a0a0, base + GIC_DIST_PRI + i * 4 / 4);258 writel(0xa0a0a0a0, base + GIC_DIST_PRI + i * 4 / 4);
258 259
259 /*260 /*
260 * Disable all interrupts. Leave the PPI and SGIs alone261 * Disable all interrupts. Leave the PPI and SGIs alone
261 * as these enables are banked registers.262 * as these enables are banked registers.
262 */263 */
263 for (i = 32; i < max_irq; i += 32)264 for (i = 32; i < gic_irqs; i += 32)
264 writel(0xffffffff, base + GIC_DIST_ENABLE_CLEAR + i * 4 / 32);265 writel(0xffffffff, base + GIC_DIST_ENABLE_CLEAR + i * 4 / 32);
265 266
267 /*
268 * Limit number of interrupts registered to the platform maximum
269 */
270 irq_limit = gic_data[gic_nr].irq_offset + gic_irqs;
271 if (WARN_ON(irq_limit > NR_IRQS))
272 irq_limit = NR_IRQS;
273
266 /*274 /*
267 * Setup the Linux IRQ subsystem.275 * Setup the Linux IRQ subsystem.
268 */276 */
269 for (i = irq_start; i < gic_data[gic_nr].irq_offset + max_irq; i++) {277 for (i = irq_start; i < irq_limit; i++) {
270 set_irq_chip(i, &gic_chip);278 set_irq_chip(i, &gic_chip);
271 set_irq_chip_data(i, &gic_data[gic_nr]);279 set_irq_chip_data(i, &gic_data[gic_nr]);
272 set_irq_handler(i, handle_level_irq);280 set_irq_handler(i, handle_level_irq);
arch/arm/kernel/entry-armv.S+1−1
@@ -911,7 +911,7 @@ __kuser_cmpxchg: @ 0xffff0fc0 · 910 unmodified lines
911 * A special ghost syscall is used for that (see traps.c).911 * A special ghost syscall is used for that (see traps.c).
912 */912 */
913 stmfd sp!, {r7, lr}913 stmfd sp!, {r7, lr}
914 ldr r7, =1f @ it's 20 bits914 ldr r7, 1f @ it's 20 bits
915 swi __ARM_NR_cmpxchg915 swi __ARM_NR_cmpxchg
916 ldmfd sp!, {r7, pc}916 ldmfd sp!, {r7, pc}
9171: .word __ARM_NR_cmpxchg9171: .word __ARM_NR_cmpxchg
arch/arm/kernel/head.S+7−0
@@ -85,9 +85,11 @@ ENTRY(stext) · 84 unmodified lines
85 mrc p15, 0, r9, c0, c0 @ get processor id85 mrc p15, 0, r9, c0, c0 @ get processor id
86 bl __lookup_processor_type @ r5=procinfo r9=cpuid86 bl __lookup_processor_type @ r5=procinfo r9=cpuid
87 movs r10, r5 @ invalid processor (r5=0)?87 movs r10, r5 @ invalid processor (r5=0)?
88 THUMB( it eq ) @ force fixup-able long branch encoding
88 beq __error_p @ yes, error 'p'89 beq __error_p @ yes, error 'p'
89 bl __lookup_machine_type @ r5=machinfo90 bl __lookup_machine_type @ r5=machinfo
90 movs r8, r5 @ invalid machine (r5=0)?91 movs r8, r5 @ invalid machine (r5=0)?
92 THUMB( it eq ) @ force fixup-able long branch encoding
91 beq __error_a @ yes, error 'a'93 beq __error_a @ yes, error 'a'
92 bl __vet_atags94 bl __vet_atags
93#ifdef CONFIG_SMP_ON_UP95#ifdef CONFIG_SMP_ON_UP
@@ -262,6 +264,7 @@ __create_page_tables: · 168 unmodified lines
262 mov pc, lr264 mov pc, lr
263ENDPROC(__create_page_tables)265ENDPROC(__create_page_tables)
264 .ltorg266 .ltorg
267 .align
265__enable_mmu_loc:268__enable_mmu_loc:
266 .long .269 .long .
267 .long __enable_mmu270 .long __enable_mmu
@@ -282,6 +285,7 @@ ENTRY(secondary_startup) · 14 unmodified lines
282 bl __lookup_processor_type285 bl __lookup_processor_type
283 movs r10, r5 @ invalid processor?286 movs r10, r5 @ invalid processor?
284 moveq r0, #'p' @ yes, error 'p'287 moveq r0, #'p' @ yes, error 'p'
288 THUMB( it eq ) @ force fixup-able long branch encoding
285 beq __error_p289 beq __error_p
286 290
287 /*291 /*
@@ -308,6 +312,8 @@ ENTRY(__secondary_switched) · 20 unmodified lines
308 b secondary_start_kernel312 b secondary_start_kernel
309ENDPROC(__secondary_switched)313ENDPROC(__secondary_switched)
310 314
315 .align
316
311 .type __secondary_data, %object317 .type __secondary_data, %object
312__secondary_data:318__secondary_data:
313 .long .319 .long .
@@ -413,6 +419,7 @@ __fixup_smp_on_up: · 99 unmodified lines
413 mov pc, lr419 mov pc, lr
414ENDPROC(__fixup_smp)420ENDPROC(__fixup_smp)
415 421
422 .align
4161: .word .4231: .word .
417 .word __smpalt_begin424 .word __smpalt_begin
418 .word __smpalt_end425 .word __smpalt_end
arch/arm/kernel/relocate_kernel.S+2−0
@@ -59,6 +59,8 @@ relocate_new_kernel: · 58 unmodified lines
59 ldr r2,kexec_boot_atags59 ldr r2,kexec_boot_atags
60 mov pc,lr60 mov pc,lr
61 61
62 .align
63
62 .globl kexec_start_address64 .globl kexec_start_address
63kexec_start_address:65kexec_start_address:
64 .long 0x066 .long 0x0
arch/arm/mach-cns3xxx/pcie.c+1−1
@@ -369,7 +369,7 @@ static int __init cns3xxx_pcie_init(void) · 368 unmodified lines
369{369{
370 int i;370 int i;
371 371
372 hook_fault_code(16 + 6, cns3xxx_pcie_abort_handler, SIGBUS,372 hook_fault_code(16 + 6, cns3xxx_pcie_abort_handler, SIGBUS, 0,
373 "imprecise external abort");373 "imprecise external abort");
374 374
375 for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) {375 for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) {
arch/arm/mach-realview/headsmp.S+1−0
@@ -35,5 +35,6 @@ pen: ldr r7, [r6] · 34 unmodified lines
35 */35 */
36 b secondary_startup36 b secondary_startup
37 37
38 .align
381: .long .391: .long .
39 .long pen_release40 .long pen_release
arch/arm/mach-vexpress/headsmp.S+1−0
@@ -35,5 +35,6 @@ pen: ldr r7, [r6] · 34 unmodified lines
35 */35 */
36 b secondary_startup36 b secondary_startup
37 37
38 .align
381: .long .391: .long .
39 .long pen_release40 .long pen_release
arch/arm/mm/proc-v7.S+2−2
@@ -381,7 +381,7 @@ __v7_ca9mp_proc_info: · 380 unmodified lines
381 PMD_SECT_XN | \381 PMD_SECT_XN | \
382 PMD_SECT_AP_WRITE | \382 PMD_SECT_AP_WRITE | \
383 PMD_SECT_AP_READ383 PMD_SECT_AP_READ
384 b __v7_ca9mp_setup384 W(b) __v7_ca9mp_setup
385 .long cpu_arch_name385 .long cpu_arch_name
386 .long cpu_elf_name386 .long cpu_elf_name
387 .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_TLS387 .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_TLS
@@ -413,7 +413,7 @@ __v7_proc_info: · 25 unmodified lines
413 PMD_SECT_XN | \413 PMD_SECT_XN | \
414 PMD_SECT_AP_WRITE | \414 PMD_SECT_AP_WRITE | \
415 PMD_SECT_AP_READ415 PMD_SECT_AP_READ
416 b __v7_setup416 W(b) __v7_setup
417 .long cpu_arch_name417 .long cpu_arch_name
418 .long cpu_elf_name418 .long cpu_elf_name
419 .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_TLS419 .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_TLS
arch/arm/plat-iop/time.c+2−1
@@ -18,6 +18,7 @@ · 17 unmodified lines
18#include <linux/time.h>18#include <linux/time.h>
19#include <linux/init.h>19#include <linux/init.h>
20#include <linux/timex.h>20#include <linux/timex.h>
21#include <linux/sched.h>
21#include <linux/io.h>22#include <linux/io.h>
22#include <linux/clocksource.h>23#include <linux/clocksource.h>
23#include <linux/clockchips.h>24#include <linux/clockchips.h>
@@ -36,7 +37,7 @@ · 12 unmodified lines
36/*37/*
37 * IOP clocksource (free-running timer 1).38 * IOP clocksource (free-running timer 1).
38 */39 */
39static cycle_t iop_clocksource_read(struct clocksource *unused)40static cycle_t notrace iop_clocksource_read(struct clocksource *unused)
40{41{
41 return 0xffffffffu - read_tcr1();42 return 0xffffffffu - read_tcr1();
42}43}
arch/arm/vfp/vfphw.S+1−0
@@ -206,6 +206,7 @@ ENTRY(vfp_save_state) · 205 unmodified lines
206 mov pc, lr206 mov pc, lr
207ENDPROC(vfp_save_state)207ENDPROC(vfp_save_state)
208 208
209 .align
209last_VFP_context_address:210last_VFP_context_address:
210 .word last_VFP_context211 .word last_VFP_context
211 212
drivers/pcmcia/soc_common.c+1−0
@@ -70,6 +70,7 @@ void soc_pcmcia_debug(struct soc_pcmcia_socket *skt, const char *func, · 69 unmodified lines
70 va_end(args);70 va_end(args);
71 }71 }
72}72}
73EXPORT_SYMBOL(soc_pcmcia_debug);
73 74
74#endif75#endif
75 76