Both RISC-V & ARM64 are using cpu-map device tree to describe their cpu topology. It's better to move the relevant code to a common place instead of duplicate code.
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| @@ -33,4 +33,32 @@ unsigned long topology_get_freq_scale(int cpu) · 32 unmodified lines | ||
| 33 | 33 | return per_cpu(freq_scale, cpu); |
| 34 | 34 | } |
| 35 | 35 | |
| 36 | +struct cpu_topology { | |
| 37 | + int thread_id; | |
| 38 | + int core_id; | |
| 39 | + int package_id; | |
| 40 | + int llc_id; | |
| 41 | + cpumask_t thread_sibling; | |
| 42 | + cpumask_t core_sibling; | |
| 43 | + cpumask_t llc_sibling; | |
| 44 | +}; | |
| 45 | + | |
| 46 | +#ifdef CONFIG_GENERIC_ARCH_TOPOLOGY | |
| 47 | +extern struct cpu_topology cpu_topology[NR_CPUS]; | |
| 48 | + | |
| 49 | +#define topology_physical_package_id(cpu) (cpu_topology[cpu].package_id) | |
| 50 | +#define topology_core_id(cpu) (cpu_topology[cpu].core_id) | |
| 51 | +#define topology_core_cpumask(cpu) (&cpu_topology[cpu].core_sibling) | |
| 52 | +#define topology_sibling_cpumask(cpu) (&cpu_topology[cpu].thread_sibling) | |
| 53 | +#define topology_llc_cpumask(cpu) (&cpu_topology[cpu].llc_sibling) | |
| 54 | +void init_cpu_topology(void); | |
| 55 | +void store_cpu_topology(unsigned int cpuid); | |
| 56 | +const struct cpumask *cpu_coregroup_mask(int cpu); | |
| 57 | +#endif | |
| 58 | + | |
| 59 | +#if defined(CONFIG_ARM64) || defined(CONFIG_RISCV) | |
| 60 | +void update_siblings_masks(unsigned int cpu); | |
| 61 | +#endif | |
| 62 | +void remove_cpu_topology(unsigned int cpuid); | |
| 63 | + | |
| 36 | 64 | #endif /* _LINUX_ARCH_TOPOLOGY_H_ */ |
| @@ -27,6 +27,7 @@ · 26 unmodified lines | ||
| 27 | 27 | #ifndef _LINUX_TOPOLOGY_H |
| 28 | 28 | #define _LINUX_TOPOLOGY_H |
| 29 | 29 | |
| 30 | +#include <linux/arch_topology.h> | |
| 30 | 31 | #include <linux/cpumask.h> |
| 31 | 32 | #include <linux/bitops.h> |
| 32 | 33 | #include <linux/mmzone.h> |