perf: Add ability to sample machine state on interrupt

Enable capture of interrupted machine state for each sample. Registers to sample are passed per event in the sample_regs_intr bitmask. To sample interrupt machine state, the PERF_SAMPLE_INTR_REGS must be passed in sample_type. The list of available registers is arch dependent and provided by asm/perf_regs.h Registers are laid out as u64 in the order of the bit order of sample_intr_regs. This patch also adds a new ABI version PERF_ATTR_SIZE_VER4 because we extend the perf_event_attr struct with a new u64 field.

Stephane Eranian committed 12 years ago

Commit 60e23641 parent af4bdcf3 files · +63 −5Browse files

Showing the changes to include/uapi/linux (1 of 3 files). Show all

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include/uapi/linux/perf_event.h+14−1

@@ -137,8 +137,9 @@ enum perf_event_sample_format { · 136 unmodified lines
137	137	PERF_SAMPLE_DATA_SRC = 1U << 15,
138	138	PERF_SAMPLE_IDENTIFIER = 1U << 16,
139	139	PERF_SAMPLE_TRANSACTION = 1U << 17,
	140	+ PERF_SAMPLE_REGS_INTR = 1U << 18,
140	141
141		− PERF_SAMPLE_MAX = 1U << 18, /* non-ABI */
	142	+ PERF_SAMPLE_MAX = 1U << 19, /* non-ABI */
142	143	};
143	144
144	145	/*
@@ -238,6 +239,7 @@ enum perf_event_read_format { · 93 unmodified lines
238	239	#define PERF_ATTR_SIZE_VER2 80 /* add: branch_sample_type */
239	240	#define PERF_ATTR_SIZE_VER3 96 /* add: sample_regs_user */
240	241	/* add: sample_stack_user */
	242	+#define PERF_ATTR_SIZE_VER4 104 /* add: sample_regs_intr */
241	243
242	244	/*
243	245	* Hardware event_id to monitor via a performance monitoring event:
@@ -334,6 +336,15 @@ struct perf_event_attr { · 90 unmodified lines
334	336
335	337	/* Align to u64. */
336	338	__u32 __reserved_2;
	339	+ /*
	340	+ * Defines set of regs to dump for each sample
	341	+ * state captured on:
	342	+ * - precise = 0: PMU interrupt
	343	+ * - precise > 0: sampled instruction
	344	+ *
	345	+ * See asm/perf_regs.h for details.
	346	+ */
	347	+ __u64 sample_regs_intr;
337	348	};
338	349
339	350	#define perf_flags(attr) (*(&(attr)->read_format + 1))
@@ -686,6 +697,8 @@ enum perf_event_type { · 346 unmodified lines
686	697	* { u64 weight; } && PERF_SAMPLE_WEIGHT
687	698	* { u64 data_src; } && PERF_SAMPLE_DATA_SRC
688	699	* { u64 transaction; } && PERF_SAMPLE_TRANSACTION
	700	+ * { u64 abi; # enum perf_sample_regs_abi
	701	+ * u64 regs[weight(mask)]; } && PERF_SAMPLE_REGS_INTR
689	702	* };
690	703	*/
691	704	PERF_RECORD_SAMPLE = 9,