History

Merge tag 'v5.17-rc5' into sched/core, to resolve conflicts

New conflicts in sched/core due to the following upstream fixes: 44585f7bc0cb ("psi: fix "defined but not used" warnings when CONFIG_PROC_FS=n") a06247c6804f ("psi: Fix uaf issue when psi trigger is destroyed while being polled") Conflicts: include/linux/psi_types.h kernel/sched/psi.c

Ingo Molnar committed 4 years ago

Commit 6255b482 parents 1b2d345 cfb92441212 files · +13287 −6877Browse files

Unified · Split

1212 files
  1. .mailmap +4 −0
  2. Documentation/ABI/testing/sysfs-class-power +1 −0
  3. Documentation/ABI/testing/sysfs-driver-aspeed-uart-routing +3 −3
  4. Documentation/accounting/psi.rst +2 −1
  5. Documentation/admin-guide/gpio/index.rst +1 −0
  6. Documentation/arm/marvell.rst +2 −0
  7. Documentation/arm64/silicon-errata.rst +14 −0
  8. Documentation/dev-tools/kselftest.rst +8 −0
  9. Documentation/dev-tools/kunit/usage.rst +1 −1
  10. Documentation/devicetree/bindings/arm/omap/omap.txt +3 −0
  11. Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.yaml +1 −0
  12. Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml +21 −12
  13. Documentation/devicetree/bindings/net/can/tcan4x5x.txt +1 −1
  14. Documentation/devicetree/bindings/net/qcom,ipa.yaml +6 −0
  15. Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml +1 −0
  16. Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml +3 −2
  17. Documentation/filesystems/netfs_library.rst +16 −0
  18. Documentation/gpu/todo.rst +0 −24
  19. Documentation/index.rst +1 −0
  20. Documentation/kernel-hacking/locking.rst +1 −1
  21. Documentation/tools/index.rst +20 −0
  22. Documentation/tools/rtla/index.rst +26 −0
  23. Documentation/userspace-api/ioctl/ioctl-number.rst +3 −0
  24. Documentation/virt/kvm/api.rst +3 −1
  25. Documentation/vm/page_table_check.rst +1 −1
  26. MAINTAINERS +102 −42
  27. Makefile +2 −2
  28. arch/arm/Kconfig +1 −0
  29. arch/arm/boot/dts/Makefile +1 −0
  30. arch/arm/boot/dts/am335x-wega.dtsi +1 −1
  31. arch/arm/boot/dts/dra7.dtsi +10 −10
  32. arch/arm/boot/dts/imx23-evk.dts +0 −1
  33. arch/arm/boot/dts/imx6qdl-udoo.dtsi +4 −1
  34. arch/arm/boot/dts/imx7ulp.dtsi +1 −1
  35. arch/arm/boot/dts/meson.dtsi +4 −4
  36. arch/arm/boot/dts/meson8.dtsi +12 −12
  37. arch/arm/boot/dts/meson8b.dtsi +12 −12
  38. arch/arm/boot/dts/omap3-beagle-ab4.dts +47 −0
  39. arch/arm/boot/dts/omap3-beagle.dts +0 −33
  40. arch/arm/boot/dts/spear320-hmi.dts +0 −1
  41. arch/arm/boot/dts/ste-ux500-samsung-skomer.dts +0 −4
  42. arch/arm/crypto/blake2s-shash.c +2 −2
  43. arch/arm/include/asm/assembler.h +2 −0
  44. arch/arm/include/asm/processor.h +1 −0
  45. arch/arm/include/asm/uaccess.h +8 −2
  46. arch/arm/mach-omap2/display.c +1 −1
  47. arch/arm/mach-omap2/omap_hwmod.c +3 −1
  48. arch/arm/mach-socfpga/Kconfig +2 −0
  49. arch/arm/probes/kprobes/Makefile +3 −0
  50. arch/arm64/Kconfig +92 −6
  51. arch/arm64/Kconfig.platforms +0 −3
  52. arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +6 −0
  53. arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts +0 −8
  54. arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi +2 −2
  55. arch/arm64/boot/dts/amlogic/meson-gx.dtsi +6 −0
  56. arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m5.dts +1 −1
  57. arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi +1 −1
  58. arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts +0 −8
  59. arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dts +4 −0
  60. arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi +2 −2
  61. arch/arm64/boot/dts/freescale/imx8mq.dtsi +5 −5
  62. arch/arm64/boot/dts/freescale/mba8mx.dtsi +1 −1
  63. arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts +12 −2
  64. arch/arm64/boot/dts/ti/k3-j721s2.dtsi +0 −22
  65. arch/arm64/include/asm/cputype.h +4 −0
  66. arch/arm64/include/asm/el2_setup.h +1 −1
  67. arch/arm64/kernel/cpu_errata.c +37 −0
  68. arch/arm64/kernel/cpufeature.c +3 −0
  69. arch/arm64/kernel/stacktrace.c +3 −2
  70. arch/arm64/kernel/vdso/Makefile +4 −1
  71. arch/arm64/kvm/arm.c +33 −18
  72. arch/arm64/kvm/handle_exit.c +8 −0
  73. arch/arm64/kvm/hyp/exception.c +4 −1
  74. arch/arm64/kvm/hyp/include/hyp/switch.h +21 −2
  75. arch/arm64/kvm/hyp/pgtable.c +6 −12
  76. arch/arm64/kvm/hyp/vgic-v3-sr.c +3 −0
  77. arch/arm64/kvm/vgic/vgic-mmio.c +2 −0
  78. arch/arm64/kvm/vgic/vgic-v3.c +15 −2
  79. arch/arm64/mm/extable.c +2 −2
  80. arch/arm64/tools/cpucaps +4 −0
  81. arch/ia64/Kconfig +1 −1
  82. arch/ia64/pci/fixup.c +2 −2
  83. arch/mips/boot/dts/ingenic/ci20.dts +2 −13
  84. arch/mips/cavium-octeon/octeon-memcpy.S +1 −1
  85. arch/mips/include/asm/asm.h +2 −2
  86. arch/mips/include/asm/ftrace.h +2 −2
  87. arch/mips/include/asm/r4kcache.h +2 −2
  88. arch/mips/include/asm/unaligned-emul.h +88 −88
  89. arch/mips/kernel/mips-r2-to-r6-emul.c +52 −52
  90. arch/mips/kernel/r2300_fpu.S +3 −3
  91. arch/mips/kernel/r4k_fpu.S +1 −1
  92. arch/mips/kernel/relocate_kernel.S +11 −11
  93. arch/mips/kernel/scall32-o32.S +5 −5
  94. arch/mips/kernel/scall64-n32.S +1 −1
  95. arch/mips/kernel/scall64-n64.S +1 −1
  96. arch/mips/kernel/scall64-o32.S +5 −5
  97. arch/mips/kernel/syscall.c +4 −4
  98. arch/mips/kvm/mips.c +46 −4
  99. arch/mips/kvm/vz.c +9 −3
  100. arch/mips/lib/csum_partial.S +2 −2
  101. arch/mips/lib/memcpy.S +2 −2
  102. arch/mips/lib/memset.S +1 −1
  103. arch/mips/lib/strncpy_user.S +2 −2
  104. arch/mips/lib/strnlen_user.S +1 −1
  105. arch/mips/loongson64/vbios_quirk.c +4 −5
  106. arch/parisc/include/asm/bitops.h +8 −0
  107. arch/parisc/include/asm/uaccess.h +15 −14
  108. arch/parisc/lib/iomap.c +18 −0
  109. arch/parisc/mm/init.c +4 −5
  110. arch/powerpc/include/asm/book3s/32/mmu-hash.h +2 −0
  111. arch/powerpc/include/asm/book3s/32/pgtable.h +1 −0
  112. arch/powerpc/include/asm/book3s/64/pgtable.h +2 −0
  113. arch/powerpc/include/asm/fixmap.h +4 −2
  114. arch/powerpc/include/asm/hw_irq.h +1 −1
  115. arch/powerpc/include/asm/kvm_book3s_64.h +0 −1
  116. arch/powerpc/include/asm/kvm_host.h +1 −0
  117. arch/powerpc/include/asm/nohash/32/pgtable.h +1 −0
  118. arch/powerpc/include/asm/nohash/64/pgtable.h +1 −0
  119. arch/powerpc/include/asm/ppc-opcode.h +1 −0
  120. arch/powerpc/include/asm/syscall.h +2 −2
  121. arch/powerpc/include/asm/thread_info.h +2 −0
  122. arch/powerpc/kernel/head_book3s_32.S +2 −2
  123. arch/powerpc/kernel/interrupt_64.S +2 −0
  124. arch/powerpc/kernel/time.c +3 −2
  125. arch/powerpc/kvm/book3s_hv.c +1 −2
  126. arch/powerpc/kvm/book3s_hv_nested.c +1 −1
  127. arch/powerpc/lib/sstep.c +2 −0
  128. arch/powerpc/mm/book3s32/mmu.c +5 −5
  129. arch/powerpc/mm/kasan/book3s_32.c +31 −28
  130. arch/powerpc/mm/pgtable.c +9 −0
  131. arch/powerpc/net/bpf_jit_comp.c +23 −6
  132. arch/powerpc/net/bpf_jit_comp32.c +9 −0
  133. arch/powerpc/net/bpf_jit_comp64.c +19 −10
  134. arch/powerpc/perf/core-book3s.c +42 −33
  135. arch/riscv/Makefile +6 −0
  136. arch/riscv/kernel/cpu-hotplug.c +2 −0
  137. arch/riscv/kernel/head.S +5 −6
  138. arch/riscv/kernel/sbi.c +47 −25
  139. arch/riscv/kernel/stacktrace.c +5 −4
  140. arch/riscv/kvm/vcpu.c +31 −17
  141. arch/riscv/kvm/vcpu_sbi_base.c +2 −1
  142. arch/riscv/mm/extable.c +3 −3
  143. arch/riscv/mm/init.c +2 −0
  144. arch/s390/Kconfig +15 −0
  145. arch/s390/configs/debug_defconfig +10 −10
  146. arch/s390/configs/defconfig +9 −7
  147. arch/s390/configs/zfcpdump_defconfig +3 −0
  148. arch/s390/hypfs/hypfs_vm.c +4 −2
  149. arch/s390/include/asm/uaccess.h +2 −2
  150. arch/s390/kernel/module.c +18 −19
  151. arch/s390/kernel/nmi.c +22 −5
  152. arch/s390/kvm/kvm-s390.c +2 −0
  153. arch/s390/lib/Makefile +3 −0
  154. arch/s390/lib/test_modules.c +32 −0
  155. arch/s390/lib/test_modules.h +53 −0
  156. arch/s390/lib/test_modules_helpers.c +13 −0
  157. arch/x86/Kconfig +1 −0
  158. arch/x86/crypto/blake2s-shash.c +2 −2
  159. arch/x86/events/intel/core.c +28 −0
  160. arch/x86/events/intel/lbr.c +101 −67
  161. arch/x86/events/intel/pt.c +3 −2
  162. arch/x86/events/intel/uncore.c +1 −1
  163. arch/x86/events/intel/uncore.h +2 −1
  164. arch/x86/events/intel/uncore_discovery.c +2 −2
  165. arch/x86/events/intel/uncore_discovery.h +2 −0
  166. arch/x86/events/intel/uncore_snb.c +213 −1
  167. arch/x86/events/intel/uncore_snbep.c +1 −1
  168. arch/x86/events/perf_event.h +9 −1
  169. arch/x86/events/rapl.c +6 −3
  170. arch/x86/include/asm/bug.h +11 −9
  171. arch/x86/include/asm/kvm-x86-ops.h +1 −1
  172. arch/x86/include/asm/kvm_host.h +5 −3
  173. arch/x86/include/asm/msr-index.h +1 −0
  174. arch/x86/include/asm/svm.h +36 −0
  175. arch/x86/include/asm/xen/cpuid.h +7 −0
  176. arch/x86/include/asm/xen/hypervisor.h +0 −14
  177. arch/x86/include/uapi/asm/kvm.h +3 −0
  178. arch/x86/kernel/cpu/mce/amd.c +1 −1
  179. arch/x86/kernel/cpu/mce/intel.c +1 −0
  180. arch/x86/kernel/cpu/sgx/encl.c +2 −0
  181. arch/x86/kernel/cpu/sgx/main.c +1 −9
  182. arch/x86/kernel/fpu/regset.c +4 −5
  183. arch/x86/kernel/ptrace.c +2 −2
  184. arch/x86/kernel/resource.c +1 −22
  185. arch/x86/kvm/cpuid.c +62 −41
  186. arch/x86/kvm/lapic.c +9 −10
  187. arch/x86/kvm/pmu.c +4 −3
  188. arch/x86/kvm/svm/avic.c +23 −70
  189. arch/x86/kvm/svm/nested.c +19 −16
  190. arch/x86/kvm/svm/sev.c +7 −2
  191. arch/x86/kvm/svm/svm.c +205 −64
  192. arch/x86/kvm/svm/svm.h +4 −18
  193. arch/x86/kvm/svm/svm_onhyperv.h +4 −8
  194. arch/x86/kvm/vmx/capabilities.h +0 −1
  195. arch/x86/kvm/vmx/evmcs.c +2 −2
  196. arch/x86/kvm/vmx/evmcs.h +39 −9
  197. arch/x86/kvm/vmx/nested.c +54 −28
  198. arch/x86/kvm/vmx/vmcs12.c +2 −2
  199. arch/x86/kvm/vmx/vmcs12.h +3 −3
  200. arch/x86/kvm/vmx/vmx.c +57 −12
  201. arch/x86/kvm/x86.c +89 −17
  202. arch/x86/kvm/x86.h +0 −45
  203. arch/x86/kvm/xen.c +69 −38
  204. arch/x86/pci/fixup.c +2 −2
  205. arch/x86/xen/enlighten_hvm.c +11 −11
  206. arch/x86/xen/enlighten_pv.c +0 −4
  207. arch/x86/xen/smp_pv.c +6 −20
  208. arch/x86/xen/vga.c +8 −8
  209. block/bfq-iosched.c +2 −0
  210. block/bio-integrity.c +1 −1
  211. block/blk-core.c +21 −14
  212. block/blk-ia-ranges.c +1 −1
  213. block/blk-map.c +1 −1
  214. block/blk-mq.c +6 −0
  215. block/elevator.c +0 −2
  216. block/fops.c +19 −14
  217. block/genhd.c +14 −0
  218. crypto/af_alg.c +0 −3
  219. crypto/algapi.c +1 −0
  220. crypto/api.c +0 −1
  221. crypto/blake2s_generic.c +2 −2
  222. drivers/accessibility/speakup/speakup_dectlk.c +1 −0
  223. drivers/acpi/Kconfig +1 −0
  224. drivers/acpi/arm64/iort.c +11 −3
  225. drivers/acpi/ec.c +10 −0
  226. drivers/acpi/processor_idle.c +5 −0
  227. drivers/acpi/sleep.c +5 −10
  228. drivers/acpi/tables.c +1 −1
  229. drivers/acpi/x86/s2idle.c +4 −8
  230. drivers/ata/libata-core.c +17 −8
  231. drivers/ata/pata_platform.c +2 −0
  232. drivers/ata/sata_fsl.c +7 −9
  233. drivers/base/power/wakeup.c +34 −7
  234. drivers/block/loop.c +36 −37
  235. drivers/block/loop.h +0 −1
  236. drivers/block/mtip32xx/mtip32xx.c +1 −1
  237. drivers/block/rbd.c +1 −1
  238. drivers/block/xen-blkfront.c +1 −1
  239. drivers/bus/mhi/pci_generic.c +2 −0
  240. drivers/char/random.c +22 −17
  241. drivers/clocksource/timer-ti-dm-systimer.c +1 −1
  242. drivers/connector/cn_proc.c +1 −1
  243. drivers/counter/counter-core.c +6 −9
  244. drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c +2 −1
  245. drivers/dma-buf/dma-heap.c +2 −0
  246. drivers/dma/at_xdmac.c +3 −1
  247. drivers/dma/ptdma/ptdma-dev.c +9 −8
  248. drivers/dma/sh/rcar-dmac.c +7 −2
  249. drivers/dma/sh/shdma-base.c +3 −1
  250. drivers/dma/stm32-dmamux.c +3 −1
  251. drivers/edac/altera_edac.c +1 −1
  252. drivers/edac/edac_mc.c +1 −1
  253. drivers/edac/xgene_edac.c +1 −1
  254. drivers/firmware/efi/efi.c +7 −0
  255. drivers/firmware/efi/libstub/arm64-stub.c +3 −3
  256. drivers/gpio/gpio-aggregator.c +14 −4
  257. drivers/gpio/gpio-sifive.c +1 −1
  258. drivers/gpio/gpio-sim.c +15 −4
  259. drivers/gpio/gpiolib-cdev.c +3 −3
  260. drivers/gpio/gpiolib-sysfs.c +2 −5
  261. drivers/gpio/gpiolib.h +12 −0
  262. drivers/gpu/drm/amd/amdgpu/amdgpu.h +8 −2
  263. drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c +32 −5
  264. drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +90 −2
  265. drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +1 −1
  266. drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c +6 −1
  267. drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c +3 −0
  268. drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c +8 −0
  269. drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +1 −1
  270. drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c +2 −2
  271. drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c +0 −1
  272. drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c +8 −8
  273. drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c +10 −10
  274. drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.c +5 −1
  275. drivers/gpu/drm/amd/display/dc/core/dc.c +29 −13
  276. drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c +23 −3
  277. drivers/gpu/drm/amd/display/dc/core/dc_resource.c +54 −0
  278. drivers/gpu/drm/amd/display/dc/dc.h +2 −0
  279. drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +30 −7
  280. drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c +0 −15
  281. drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h +0 −3
  282. drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c +1 −1
  283. drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c +0 −2
  284. drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.c +0 −2
  285. drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c +2 −2
  286. drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c +12 −1
  287. drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hubbub.c +32 −29
  288. drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c +3 −0
  289. drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c +0 −2
  290. drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c +0 −2
  291. drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c +0 −2
  292. drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c +0 −2
  293. drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c +1 −1
  294. drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.h +1 −1
  295. drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h +0 −1
  296. drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c +0 −3
  297. drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c +0 −4
  298. drivers/gpu/drm/amd/display/dc/inc/core_types.h +1 −0
  299. drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h +0 −4
  300. drivers/gpu/drm/amd/display/dc/inc/resource.h +11 −0
  301. drivers/gpu/drm/amd/pm/amdgpu_pm.c +1 −2
  302. drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c +24 −8
  303. drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.h +8 −0
  304. drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c +2 −7
  305. drivers/gpu/drm/ast/ast_tables.h +0 −2
  306. drivers/gpu/drm/bridge/nwl-dsi.c +5 −7
  307. drivers/gpu/drm/drm_atomic.c +8 −4
  308. drivers/gpu/drm/drm_atomic_uapi.c +8 −6
  309. drivers/gpu/drm/drm_gem_cma_helper.c +1 −0
  310. drivers/gpu/drm/drm_panel_orientation_quirks.c +12 −0
  311. drivers/gpu/drm/drm_privacy_screen.c +1 −1
  312. drivers/gpu/drm/drm_privacy_screen_x86.c +3 −0
  313. drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c +2 −2
  314. drivers/gpu/drm/i915/Kconfig +1 −0
  315. drivers/gpu/drm/i915/display/intel_display.c +1 −0
  316. drivers/gpu/drm/i915/display/intel_drrs.c +8 −0
  317. drivers/gpu/drm/i915/display/intel_fbc.c +2 −1
  318. drivers/gpu/drm/i915/display/intel_opregion.c +15 −0
  319. drivers/gpu/drm/i915/display/intel_overlay.c +3 −0
  320. drivers/gpu/drm/i915/display/intel_tc.c +2 −1
  321. drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c +7 −2
  322. drivers/gpu/drm/i915/gem/i915_gem_object_types.h +1 −0
  323. drivers/gpu/drm/i915/gem/i915_gem_pages.c +10 −0
  324. drivers/gpu/drm/i915/gem/i915_gem_ttm.c +2 −4
  325. drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c +10 −4
  326. drivers/gpu/drm/i915/gt/intel_gt.c +108 −0
  327. drivers/gpu/drm/i915/gt/intel_gt.h +2 −0
  328. drivers/gpu/drm/i915/gt/intel_gt_types.h +2 −0
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  1054. net/sunrpc/xprtrdma/frwr_ops.c +0 −4
  1055. net/sunrpc/xprtrdma/rpc_rdma.c +0 −4
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.mailmap+4−0
@@ -70,6 +70,7 @@ Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@bootlin.com> · 69 unmodified lines
70Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@free-electrons.com>70Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@free-electrons.com>
71Brian Avery <b.avery@hp.com>71Brian Avery <b.avery@hp.com>
72Brian King <brking@us.ibm.com>72Brian King <brking@us.ibm.com>
73Brian Silverman <bsilver16384@gmail.com> <brian.silverman@bluerivertech.com>
73Changbin Du <changbin.du@intel.com> <changbin.du@gmail.com>74Changbin Du <changbin.du@intel.com> <changbin.du@gmail.com>
74Changbin Du <changbin.du@intel.com> <changbin.du@intel.com>75Changbin Du <changbin.du@intel.com> <changbin.du@intel.com>
75Chao Yu <chao@kernel.org> <chao2.yu@samsung.com>76Chao Yu <chao@kernel.org> <chao2.yu@samsung.com>
@@ -79,6 +80,9 @@ Chris Chiu <chris.chiu@canonical.com> <chiu@endlessos.org> · 3 unmodified lines
79Christian Borntraeger <borntraeger@linux.ibm.com> <borntraeger@de.ibm.com>80Christian Borntraeger <borntraeger@linux.ibm.com> <borntraeger@de.ibm.com>
80Christian Borntraeger <borntraeger@linux.ibm.com> <cborntra@de.ibm.com>81Christian Borntraeger <borntraeger@linux.ibm.com> <cborntra@de.ibm.com>
81Christian Borntraeger <borntraeger@linux.ibm.com> <borntrae@de.ibm.com>82Christian Borntraeger <borntraeger@linux.ibm.com> <borntrae@de.ibm.com>
83Christian Brauner <brauner@kernel.org> <christian@brauner.io>
84Christian Brauner <brauner@kernel.org> <christian.brauner@canonical.com>
85Christian Brauner <brauner@kernel.org> <christian.brauner@ubuntu.com>
82Christophe Ricard <christophe.ricard@gmail.com>86Christophe Ricard <christophe.ricard@gmail.com>
83Christoph Hellwig <hch@lst.de>87Christoph Hellwig <hch@lst.de>
84Colin Ian King <colin.king@intel.com> <colin.king@canonical.com>88Colin Ian King <colin.king@intel.com> <colin.king@canonical.com>
Documentation/ABI/testing/sysfs-class-power+1−0
@@ -468,6 +468,7 @@ Description: · 467 unmodified lines
468 auto: Charge normally, respect thresholds468 auto: Charge normally, respect thresholds
469 inhibit-charge: Do not charge while AC is attached469 inhibit-charge: Do not charge while AC is attached
470 force-discharge: Force discharge while AC is attached470 force-discharge: Force discharge while AC is attached
471 ================ ====================================
471 472
472What: /sys/class/power_supply/<supply_name>/technology473What: /sys/class/power_supply/<supply_name>/technology
473Date: May 2007474Date: May 2007
Documentation/ABI/testing/sysfs-driver-aspeed-uart-routing+3−3
@@ -1,4 +1,4 @@
1What: /sys/bus/platform/drivers/aspeed-uart-routing/*/uart*1What: /sys/bus/platform/drivers/aspeed-uart-routing/\*/uart\*
2Date: September 20212Date: September 2021
3Contact: Oskar Senft <osk@google.com>3Contact: Oskar Senft <osk@google.com>
4 Chia-Wei Wang <chiawei_wang@aspeedtech.com>4 Chia-Wei Wang <chiawei_wang@aspeedtech.com>
@@ -9,7 +9,7 @@ Description: Selects the RX source of the UARTx device. · 4 unmodified lines
9 depends on the selected file.9 depends on the selected file.
10 10
11 e.g.11 e.g.
12 cat /sys/bus/platform/drivers/aspeed-uart-routing/*.uart_routing/uart112 cat /sys/bus/platform/drivers/aspeed-uart-routing/\*.uart_routing/uart1
13 [io1] io2 io3 io4 uart2 uart3 uart4 io613 [io1] io2 io3 io4 uart2 uart3 uart4 io6
14 14
15 In this case, UART1 gets its input from IO1 (physical serial port 1).15 In this case, UART1 gets its input from IO1 (physical serial port 1).
@@ -17,7 +17,7 @@ Description: Selects the RX source of the UARTx device. · 1 unmodified line
17Users: OpenBMC. Proposed changes should be mailed to17Users: OpenBMC. Proposed changes should be mailed to
18 openbmc@lists.ozlabs.org18 openbmc@lists.ozlabs.org
19 19
20What: /sys/bus/platform/drivers/aspeed-uart-routing/*/io*20What: /sys/bus/platform/drivers/aspeed-uart-routing/\*/io\*
21Date: September 202121Date: September 2021
22Contact: Oskar Senft <osk@google.com>22Contact: Oskar Senft <osk@google.com>
23 Chia-Wei Wang <chiawei_wang@aspeedtech.com>23 Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Documentation/accounting/psi.rst+2−1
@@ -92,7 +92,8 @@ Triggers can be set on more than one psi metric and more than one trigger · 91 unmodified lines
92for the same psi metric can be specified. However for each trigger a separate92for the same psi metric can be specified. However for each trigger a separate
93file descriptor is required to be able to poll it separately from others,93file descriptor is required to be able to poll it separately from others,
94therefore for each trigger a separate open() syscall should be made even94therefore for each trigger a separate open() syscall should be made even
95when opening the same psi interface file.95when opening the same psi interface file. Write operations to a file descriptor
96with an already existing psi trigger will fail with EBUSY.
96 97
97Monitors activate only when system enters stall state for the monitored98Monitors activate only when system enters stall state for the monitored
98psi metric and deactivates upon exit from the stall state. While system is99psi metric and deactivates upon exit from the stall state. While system is
Documentation/admin-guide/gpio/index.rst+1−0
@@ -10,6 +10,7 @@ gpio · 9 unmodified lines
10 gpio-aggregator10 gpio-aggregator
11 sysfs11 sysfs
12 gpio-mockup12 gpio-mockup
13 gpio-sim
13 14
14.. only:: subproject and html15.. only:: subproject and html
15 16
Documentation/arm/marvell.rst+2−0
@@ -266,10 +266,12 @@ Avanta family · 265 unmodified lines
266-------------266-------------
267 267
268 Flavors:268 Flavors:
269 - 88F6500
269 - 88F6510270 - 88F6510
270 - 88F6530P271 - 88F6530P
271 - 88F6550272 - 88F6550
272 - 88F6560273 - 88F6560
274 - 88F6601
273 275
274 Homepage:276 Homepage:
275 https://web.archive.org/web/20181005145041/http://www.marvell.com/broadband/277 https://web.archive.org/web/20181005145041/http://www.marvell.com/broadband/
Documentation/arm64/silicon-errata.rst+14−0
@@ -52,6 +52,12 @@ stable kernels. · 51 unmodified lines
52| Allwinner | A64/R18 | UNKNOWN1 | SUN50I_ERRATUM_UNKNOWN1 |52| Allwinner | A64/R18 | UNKNOWN1 | SUN50I_ERRATUM_UNKNOWN1 |
53+----------------+-----------------+-----------------+-----------------------------+53+----------------+-----------------+-----------------+-----------------------------+
54+----------------+-----------------+-----------------+-----------------------------+54+----------------+-----------------+-----------------+-----------------------------+
55| ARM | Cortex-A510 | #2064142 | ARM64_ERRATUM_2064142 |
56+----------------+-----------------+-----------------+-----------------------------+
57| ARM | Cortex-A510 | #2038923 | ARM64_ERRATUM_2038923 |
58+----------------+-----------------+-----------------+-----------------------------+
59| ARM | Cortex-A510 | #1902691 | ARM64_ERRATUM_1902691 |
60+----------------+-----------------+-----------------+-----------------------------+
55| ARM | Cortex-A53 | #826319 | ARM64_ERRATUM_826319 |61| ARM | Cortex-A53 | #826319 | ARM64_ERRATUM_826319 |
56+----------------+-----------------+-----------------+-----------------------------+62+----------------+-----------------+-----------------+-----------------------------+
57| ARM | Cortex-A53 | #827319 | ARM64_ERRATUM_827319 |63| ARM | Cortex-A53 | #827319 | ARM64_ERRATUM_827319 |
@@ -92,12 +98,20 @@ stable kernels. · 34 unmodified lines
92+----------------+-----------------+-----------------+-----------------------------+98+----------------+-----------------+-----------------+-----------------------------+
93| ARM | Cortex-A77 | #1508412 | ARM64_ERRATUM_1508412 |99| ARM | Cortex-A77 | #1508412 | ARM64_ERRATUM_1508412 |
94+----------------+-----------------+-----------------+-----------------------------+100+----------------+-----------------+-----------------+-----------------------------+
101| ARM | Cortex-A510 | #2051678 | ARM64_ERRATUM_2051678 |
102+----------------+-----------------+-----------------+-----------------------------+
103| ARM | Cortex-A510 | #2077057 | ARM64_ERRATUM_2077057 |
104+----------------+-----------------+-----------------+-----------------------------+
95| ARM | Cortex-A710 | #2119858 | ARM64_ERRATUM_2119858 |105| ARM | Cortex-A710 | #2119858 | ARM64_ERRATUM_2119858 |
96+----------------+-----------------+-----------------+-----------------------------+106+----------------+-----------------+-----------------+-----------------------------+
97| ARM | Cortex-A710 | #2054223 | ARM64_ERRATUM_2054223 |107| ARM | Cortex-A710 | #2054223 | ARM64_ERRATUM_2054223 |
98+----------------+-----------------+-----------------+-----------------------------+108+----------------+-----------------+-----------------+-----------------------------+
99| ARM | Cortex-A710 | #2224489 | ARM64_ERRATUM_2224489 |109| ARM | Cortex-A710 | #2224489 | ARM64_ERRATUM_2224489 |
100+----------------+-----------------+-----------------+-----------------------------+110+----------------+-----------------+-----------------+-----------------------------+
111| ARM | Cortex-X2 | #2119858 | ARM64_ERRATUM_2119858 |
112+----------------+-----------------+-----------------+-----------------------------+
113| ARM | Cortex-X2 | #2224489 | ARM64_ERRATUM_2224489 |
114+----------------+-----------------+-----------------+-----------------------------+
101| ARM | Neoverse-N1 | #1188873,1418040| ARM64_ERRATUM_1418040 |115| ARM | Neoverse-N1 | #1188873,1418040| ARM64_ERRATUM_1418040 |
102+----------------+-----------------+-----------------+-----------------------------+116+----------------+-----------------+-----------------+-----------------------------+
103| ARM | Neoverse-N1 | #1349291 | N/A |117| ARM | Neoverse-N1 | #1349291 | N/A |
Documentation/dev-tools/kselftest.rst+8−0
@@ -7,6 +7,14 @@ directory. These are intended to be small tests to exercise individual code · 6 unmodified lines
7paths in the kernel. Tests are intended to be run after building, installing7paths in the kernel. Tests are intended to be run after building, installing
8and booting a kernel.8and booting a kernel.
9 9
10Kselftest from mainline can be run on older stable kernels. Running tests
11from mainline offers the best coverage. Several test rings run mainline
12kselftest suite on stable releases. The reason is that when a new test
13gets added to test existing code to regression test a bug, we should be
14able to run that test on an older kernel. Hence, it is important to keep
15code that can still test an older kernel and make sure it skips the test
16gracefully on newer releases.
17
10You can find additional information on Kselftest framework, how to18You can find additional information on Kselftest framework, how to
11write new tests using the framework on Kselftest wiki:19write new tests using the framework on Kselftest wiki:
12 20
Documentation/dev-tools/kunit/usage.rst+1−1
@@ -242,7 +242,7 @@ example: · 241 unmodified lines
242 242
243 int rectangle_area(struct shape *this)243 int rectangle_area(struct shape *this)
244 {244 {
245 struct rectangle *self = container_of(this, struct shape, parent);245 struct rectangle *self = container_of(this, struct rectangle, parent);
246 246
247 return self->length * self->width;247 return self->length * self->width;
248 };248 };
Documentation/devicetree/bindings/arm/omap/omap.txt+3−0
@@ -119,6 +119,9 @@ Boards (incomplete list of examples): · 118 unmodified lines
119- OMAP3 BeagleBoard : Low cost community board119- OMAP3 BeagleBoard : Low cost community board
120 compatible = "ti,omap3-beagle", "ti,omap3430", "ti,omap3"120 compatible = "ti,omap3-beagle", "ti,omap3430", "ti,omap3"
121 121
122- OMAP3 BeagleBoard A to B4 : Early BeagleBoard revisions A to B4 with a timer quirk
123 compatible = "ti,omap3-beagle-ab4", "ti,omap3-beagle", "ti,omap3430", "ti,omap3"
124
122- OMAP3 Tobi with Overo : Commercial expansion board with daughter board125- OMAP3 Tobi with Overo : Commercial expansion board with daughter board
123 compatible = "gumstix,omap3-overo-tobi", "gumstix,omap3-overo", "ti,omap3430", "ti,omap3"126 compatible = "gumstix,omap3-overo-tobi", "gumstix,omap3-overo", "ti,omap3430", "ti,omap3"
124 127
Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.yaml+1−0
@@ -36,6 +36,7 @@ properties: · 35 unmodified lines
36 - renesas,intc-ex-r8a77980 # R-Car V3H36 - renesas,intc-ex-r8a77980 # R-Car V3H
37 - renesas,intc-ex-r8a77990 # R-Car E337 - renesas,intc-ex-r8a77990 # R-Car E3
38 - renesas,intc-ex-r8a77995 # R-Car D338 - renesas,intc-ex-r8a77995 # R-Car D3
39 - renesas,intc-ex-r8a779a0 # R-Car V3U
39 - const: renesas,irqc40 - const: renesas,irqc
40 41
41 '#interrupt-cells':42 '#interrupt-cells':
Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml+21−12
@@ -35,6 +35,10 @@ description: · 34 unmodified lines
35 contains a specific memory layout, which is documented in chapter 8 of the35 contains a specific memory layout, which is documented in chapter 8 of the
36 SiFive U5 Coreplex Series Manual <https://static.dev.sifive.com/U54-MC-RVCoreIP.pdf>.36 SiFive U5 Coreplex Series Manual <https://static.dev.sifive.com/U54-MC-RVCoreIP.pdf>.
37 37
38 The thead,c900-plic is different from sifive,plic-1.0.0 in opensbi, the
39 T-HEAD PLIC implementation requires setting a delegation bit to allow access
40 from S-mode. So add thead,c900-plic to distinguish them.
41
38maintainers:42maintainers:
39 - Sagar Kadam <sagar.kadam@sifive.com>43 - Sagar Kadam <sagar.kadam@sifive.com>
40 - Paul Walmsley <paul.walmsley@sifive.com>44 - Paul Walmsley <paul.walmsley@sifive.com>
@@ -42,12 +46,17 @@ maintainers: · 1 unmodified line
42 46
43properties:47properties:
44 compatible:48 compatible:
45 items:49 oneOf:
46 - enum:50 - items:
47 - sifive,fu540-c000-plic51 - enum:
48 - starfive,jh7100-plic52 - sifive,fu540-c000-plic
49 - canaan,k210-plic53 - starfive,jh7100-plic
50 - const: sifive,plic-1.0.054 - canaan,k210-plic
55 - const: sifive,plic-1.0.0
56 - items:
57 - enum:
58 - allwinner,sun20i-d1-plic
59 - const: thead,c900-plic
51 60
52 reg:61 reg:
53 maxItems: 162 maxItems: 1
@@ -62,6 +71,7 @@ properties: · 8 unmodified lines
62 71
63 interrupts-extended:72 interrupts-extended:
64 minItems: 173 minItems: 1
74 maxItems: 15872
65 description:75 description:
66 Specifies which contexts are connected to the PLIC, with "-1" specifying76 Specifies which contexts are connected to the PLIC, with "-1" specifying
67 that a context is not present. Each node pointed to should be a77 that a context is not present. Each node pointed to should be a
@@ -90,12 +100,11 @@ examples: · 22 unmodified lines
90 #interrupt-cells = <1>;100 #interrupt-cells = <1>;
91 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";101 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
92 interrupt-controller;102 interrupt-controller;
93 interrupts-extended = <103 interrupts-extended = <&cpu0_intc 11>,
94 &cpu0_intc 11104 <&cpu1_intc 11>, <&cpu1_intc 9>,
95 &cpu1_intc 11 &cpu1_intc 9105 <&cpu2_intc 11>, <&cpu2_intc 9>,
96 &cpu2_intc 11 &cpu2_intc 9106 <&cpu3_intc 11>, <&cpu3_intc 9>,
97 &cpu3_intc 11 &cpu3_intc 9107 <&cpu4_intc 11>, <&cpu4_intc 9>;
98 &cpu4_intc 11 &cpu4_intc 9>;
99 reg = <0xc000000 0x4000000>;108 reg = <0xc000000 0x4000000>;
100 riscv,ndev = <10>;109 riscv,ndev = <10>;
101 };110 };
Documentation/devicetree/bindings/net/can/tcan4x5x.txt+1−1
@@ -31,7 +31,7 @@ tcan4x5x: tcan4x5x@0 { · 30 unmodified lines
31 #address-cells = <1>;31 #address-cells = <1>;
32 #size-cells = <1>;32 #size-cells = <1>;
33 spi-max-frequency = <10000000>;33 spi-max-frequency = <10000000>;
34 bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>;34 bosch,mram-cfg = <0x0 0 0 16 0 0 1 1>;
35 interrupt-parent = <&gpio1>;35 interrupt-parent = <&gpio1>;
36 interrupts = <14 IRQ_TYPE_LEVEL_LOW>;36 interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
37 device-state-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;37 device-state-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
Documentation/devicetree/bindings/net/qcom,ipa.yaml+6−0
@@ -107,6 +107,10 @@ properties: · 106 unmodified lines
107 - const: imem107 - const: imem
108 - const: config108 - const: config
109 109
110 qcom,qmp:
111 $ref: /schemas/types.yaml#/definitions/phandle
112 description: phandle to the AOSS side-channel message RAM
113
110 qcom,smem-states:114 qcom,smem-states:
111 $ref: /schemas/types.yaml#/definitions/phandle-array115 $ref: /schemas/types.yaml#/definitions/phandle-array
112 description: State bits used in by the AP to signal the modem.116 description: State bits used in by the AP to signal the modem.
@@ -222,6 +226,8 @@ examples: · 109 unmodified lines
222 "imem",226 "imem",
223 "config";227 "config";
224 228
229 qcom,qmp = <&aoss_qmp>;
230
225 qcom,smem-states = <&ipa_smp2p_out 0>,231 qcom,smem-states = <&ipa_smp2p_out 0>,
226 <&ipa_smp2p_out 1>;232 <&ipa_smp2p_out 1>;
227 qcom,smem-state-names = "ipa-clock-enabled-valid",233 qcom,smem-state-names = "ipa-clock-enabled-valid",
Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml+1−0
@@ -8,6 +8,7 @@ title: Audio codec controlled by ChromeOS EC · 7 unmodified lines
8 8
9maintainers:9maintainers:
10 - Cheng-Yi Chiang <cychiang@chromium.org>10 - Cheng-Yi Chiang <cychiang@chromium.org>
11 - Tzung-Bi Shih <tzungbi@google.com>
11 12
12description: |13description: |
13 Google's ChromeOS EC codec is a digital mic codec provided by the14 Google's ChromeOS EC codec is a digital mic codec provided by the
Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml+3−2
@@ -23,8 +23,9 @@ properties: · 22 unmodified lines
23 minItems: 123 minItems: 1
24 maxItems: 25624 maxItems: 256
25 items:25 items:
26 minimum: 026 items:
27 maximum: 25627 - minimum: 0
28 maximum: 256
28 description:29 description:
29 Chip select used by the device.30 Chip select used by the device.
30 31
Documentation/filesystems/netfs_library.rst+16−0
@@ -462,6 +462,10 @@ operation table looks like the following:: · 461 unmodified lines
462 struct iov_iter *iter,462 struct iov_iter *iter,
463 netfs_io_terminated_t term_func,463 netfs_io_terminated_t term_func,
464 void *term_func_priv);464 void *term_func_priv);
465
466 int (*query_occupancy)(struct netfs_cache_resources *cres,
467 loff_t start, size_t len, size_t granularity,
468 loff_t *_data_start, size_t *_data_len);
465 };469 };
466 470
467With a termination handler function pointer::471With a termination handler function pointer::
@@ -536,6 +540,18 @@ The methods defined in the table are: · 68 unmodified lines
536 indicating whether the termination is definitely happening in the caller's540 indicating whether the termination is definitely happening in the caller's
537 context.541 context.
538 542
543 * ``query_occupancy()``
544
545 [Required] Called to find out where the next piece of data is within a
546 particular region of the cache. The start and length of the region to be
547 queried are passed in, along with the granularity to which the answer needs
548 to be aligned. The function passes back the start and length of the data,
549 if any, available within that region. Note that there may be a hole at the
550 front.
551
552 It returns 0 if some data was found, -ENODATA if there was no usable data
553 within the region or -ENOBUFS if there is no caching on this file.
554
539Note that these methods are passed a pointer to the cache resource structure,555Note that these methods are passed a pointer to the cache resource structure,
540not the read request structure as they could be used in other situations where556not the read request structure as they could be used in other situations where
541there isn't a read request structure as well, such as writing dirty data to the557there isn't a read request structure as well, such as writing dirty data to the
Documentation/gpu/todo.rst+0−24
@@ -300,30 +300,6 @@ Contact: Daniel Vetter, Noralf Tronnes · 299 unmodified lines
300 300
301Level: Advanced301Level: Advanced
302 302
303Garbage collect fbdev scrolling acceleration
304--------------------------------------------
305
306Scroll acceleration has been disabled in fbcon. Now it works as the old
307SCROLL_REDRAW mode. A ton of code was removed in fbcon.c and the hook bmove was
308removed from fbcon_ops.
309Remaining tasks:
310
311- a bunch of the hooks in fbcon_ops could be removed or simplified by calling
312 directly instead of the function table (with a switch on p->rotate)
313
314- fb_copyarea is unused after this, and can be deleted from all drivers
315
316- after that, fb_copyarea can be deleted from fb_ops in include/linux/fb.h as
317 well as cfb_copyarea
318
319Note that not all acceleration code can be deleted, since clearing and cursor
320support is still accelerated, which might be good candidates for further
321deletion projects.
322
323Contact: Daniel Vetter
324
325Level: Intermediate
326
327idr_init_base()303idr_init_base()
328---------------304---------------
329 305
Documentation/index.rst+1−0
@@ -166,6 +166,7 @@ to ReStructured Text format, or are simply too old. · 165 unmodified lines
166.. toctree::166.. toctree::
167 :maxdepth: 2167 :maxdepth: 2
168 168
169 tools/index
169 staging/index170 staging/index
170 watch_queue171 watch_queue
171 172
Documentation/kernel-hacking/locking.rst+1−1
@@ -295,7 +295,7 @@ Pete Zaitcev gives the following summary: · 294 unmodified lines
295 295
296- If you are in a process context (any syscall) and want to lock other296- If you are in a process context (any syscall) and want to lock other
297 process out, use a mutex. You can take a mutex and sleep297 process out, use a mutex. You can take a mutex and sleep
298 (``copy_from_user*(`` or ``kmalloc(x,GFP_KERNEL)``).298 (``copy_from_user()`` or ``kmalloc(x,GFP_KERNEL)``).
299 299
300- Otherwise (== data can be touched in an interrupt), use300- Otherwise (== data can be touched in an interrupt), use
301 spin_lock_irqsave() and301 spin_lock_irqsave() and
Documentation/tools/index.rst+20−0
@@ -0,0 +1,20 @@
1.. SPDX-License-Identifier: GPL-2.0
2
3============
4Kernel tools
5============
6
7This book covers user-space tools that are shipped with the kernel source;
8more additions are needed here:
9
10.. toctree::
11 :maxdepth: 1
12
13 rtla/index
14
15.. only:: subproject and html
16
17 Indices
18 =======
19
20 * :ref:`genindex`
Documentation/tools/rtla/index.rst+26−0
@@ -0,0 +1,26 @@
1.. SPDX-License-Identifier: GPL-2.0
2
3================================
4The realtime Linux analysis tool
5================================
6
7RTLA provides a set of tools for the analysis of the kernel's realtime
8behavior on specific hardware.
9
10.. toctree::
11 :maxdepth: 1
12
13 rtla
14 rtla-osnoise
15 rtla-osnoise-hist
16 rtla-osnoise-top
17 rtla-timerlat
18 rtla-timerlat-hist
19 rtla-timerlat-top
20
21.. only:: subproject and html
22
23 Indices
24 =======
25
26 * :ref:`genindex`
Documentation/userspace-api/ioctl/ioctl-number.rst+3−0
@@ -115,6 +115,7 @@ Code Seq# Include File Comments · 114 unmodified lines
115'B' 00-1F linux/cciss_ioctl.h conflict!115'B' 00-1F linux/cciss_ioctl.h conflict!
116'B' 00-0F include/linux/pmu.h conflict!116'B' 00-0F include/linux/pmu.h conflict!
117'B' C0-FF advanced bbus <mailto:maassen@uni-freiburg.de>117'B' C0-FF advanced bbus <mailto:maassen@uni-freiburg.de>
118'B' 00-0F xen/xenbus_dev.h conflict!
118'C' all linux/soundcard.h conflict!119'C' all linux/soundcard.h conflict!
119'C' 01-2F linux/capi.h conflict!120'C' 01-2F linux/capi.h conflict!
120'C' F0-FF drivers/net/wan/cosa.h conflict!121'C' F0-FF drivers/net/wan/cosa.h conflict!
@@ -134,6 +135,7 @@ Code Seq# Include File Comments · 13 unmodified lines
134'F' 80-8F linux/arcfb.h conflict!135'F' 80-8F linux/arcfb.h conflict!
135'F' DD video/sstfb.h conflict!136'F' DD video/sstfb.h conflict!
136'G' 00-3F drivers/misc/sgi-gru/grulib.h conflict!137'G' 00-3F drivers/misc/sgi-gru/grulib.h conflict!
138'G' 00-0F xen/gntalloc.h, xen/gntdev.h conflict!
137'H' 00-7F linux/hiddev.h conflict!139'H' 00-7F linux/hiddev.h conflict!
138'H' 00-0F linux/hidraw.h conflict!140'H' 00-0F linux/hidraw.h conflict!
139'H' 01 linux/mei.h conflict!141'H' 01 linux/mei.h conflict!
@@ -176,6 +178,7 @@ Code Seq# Include File Comments · 36 unmodified lines
176'P' 60-6F sound/sscape_ioctl.h conflict!178'P' 60-6F sound/sscape_ioctl.h conflict!
177'P' 00-0F drivers/usb/class/usblp.c conflict!179'P' 00-0F drivers/usb/class/usblp.c conflict!
178'P' 01-09 drivers/misc/pci_endpoint_test.c conflict!180'P' 01-09 drivers/misc/pci_endpoint_test.c conflict!
181'P' 00-0F xen/privcmd.h conflict!
179'Q' all linux/soundcard.h182'Q' all linux/soundcard.h
180'R' 00-1F linux/random.h conflict!183'R' 00-1F linux/random.h conflict!
181'R' 01 linux/rfkill.h conflict!184'R' 01 linux/rfkill.h conflict!
Documentation/virt/kvm/api.rst+3−1
@@ -3268,6 +3268,7 @@ number. · 3267 unmodified lines
3268 3268
3269:Capability: KVM_CAP_DEVICE_CTRL, KVM_CAP_VM_ATTRIBUTES for vm device,3269:Capability: KVM_CAP_DEVICE_CTRL, KVM_CAP_VM_ATTRIBUTES for vm device,
3270 KVM_CAP_VCPU_ATTRIBUTES for vcpu device3270 KVM_CAP_VCPU_ATTRIBUTES for vcpu device
3271 KVM_CAP_SYS_ATTRIBUTES for system (/dev/kvm) device (no set)
3271:Type: device ioctl, vm ioctl, vcpu ioctl3272:Type: device ioctl, vm ioctl, vcpu ioctl
3272:Parameters: struct kvm_device_attr3273:Parameters: struct kvm_device_attr
3273:Returns: 0 on success, -1 on error3274:Returns: 0 on success, -1 on error
@@ -3302,7 +3303,8 @@ transferred is defined by the particular attribute. · 28 unmodified lines
3302------------------------3303------------------------
3303 3304
3304:Capability: KVM_CAP_DEVICE_CTRL, KVM_CAP_VM_ATTRIBUTES for vm device,3305:Capability: KVM_CAP_DEVICE_CTRL, KVM_CAP_VM_ATTRIBUTES for vm device,
3305 KVM_CAP_VCPU_ATTRIBUTES for vcpu device3306 KVM_CAP_VCPU_ATTRIBUTES for vcpu device
3307 KVM_CAP_SYS_ATTRIBUTES for system (/dev/kvm) device
3306:Type: device ioctl, vm ioctl, vcpu ioctl3308:Type: device ioctl, vm ioctl, vcpu ioctl
3307:Parameters: struct kvm_device_attr3309:Parameters: struct kvm_device_attr
3308:Returns: 0 on success, -1 on error3310:Returns: 0 on success, -1 on error
Documentation/vm/page_table_check.rst+1−1
@@ -9,7 +9,7 @@ Page Table Check · 8 unmodified lines
9Introduction9Introduction
10============10============
11 11
12Page table check allows to hardern the kernel by ensuring that some types of12Page table check allows to harden the kernel by ensuring that some types of
13the memory corruptions are prevented.13the memory corruptions are prevented.
14 14
15Page table check performs extra verifications at the time when new pages become15Page table check performs extra verifications at the time when new pages become
MAINTAINERS+102−42
@@ -190,8 +190,9 @@ M: Johannes Berg <johannes@sipsolutions.net> · 189 unmodified lines
190L: linux-wireless@vger.kernel.org190L: linux-wireless@vger.kernel.org
191S: Maintained191S: Maintained
192W: https://wireless.wiki.kernel.org/192W: https://wireless.wiki.kernel.org/
193T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211.git193Q: https://patchwork.kernel.org/project/linux-wireless/list/
194T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211-next.git194T: git git://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless.git
195T: git git://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next.git
195F: Documentation/driver-api/80211/cfg80211.rst196F: Documentation/driver-api/80211/cfg80211.rst
196F: Documentation/networking/regulatory.rst197F: Documentation/networking/regulatory.rst
197F: include/linux/ieee80211.h198F: include/linux/ieee80211.h
@@ -1619,6 +1620,7 @@ M: Olof Johansson <olof@lixom.net> · 1421 unmodified lines
1619M: soc@kernel.org1620M: soc@kernel.org
1620L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)1621L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
1621S: Maintained1622S: Maintained
1623C: irc://irc.libera.chat/armlinux
1622T: git git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git1624T: git git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git
1623F: arch/arm/boot/dts/Makefile1625F: arch/arm/boot/dts/Makefile
1624F: arch/arm64/boot/dts/Makefile1626F: arch/arm64/boot/dts/Makefile
@@ -1626,6 +1628,7 @@ F: arch/arm64/boot/dts/Makefile · 1 unmodified line
1626ARM SUB-ARCHITECTURES1628ARM SUB-ARCHITECTURES
1627L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)1629L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
1628S: Maintained1630S: Maintained
1631C: irc://irc.libera.chat/armlinux
1629T: git git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git1632T: git git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git
1630F: arch/arm/mach-*/1633F: arch/arm/mach-*/
1631F: arch/arm/plat-*/1634F: arch/arm/plat-*/
@@ -1779,6 +1782,7 @@ F: drivers/irqchip/irq-apple-aic.c · 147 unmodified lines
1779F: drivers/mailbox/apple-mailbox.c1782F: drivers/mailbox/apple-mailbox.c
1780F: drivers/pinctrl/pinctrl-apple-gpio.c1783F: drivers/pinctrl/pinctrl-apple-gpio.c
1781F: drivers/soc/apple/*1784F: drivers/soc/apple/*
1785F: drivers/watchdog/apple_wdt.c
1782F: include/dt-bindings/interrupt-controller/apple-aic.h1786F: include/dt-bindings/interrupt-controller/apple-aic.h
1783F: include/dt-bindings/pinctrl/apple.h1787F: include/dt-bindings/pinctrl/apple.h
1784F: include/linux/apple-mailbox.h1788F: include/linux/apple-mailbox.h
@@ -2569,10 +2573,13 @@ N: rockchip · 784 unmodified lines
2569 2573
2570ARM/SAMSUNG S3C, S5P AND EXYNOS ARM ARCHITECTURES2574ARM/SAMSUNG S3C, S5P AND EXYNOS ARM ARCHITECTURES
2571M: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>2575M: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2576R: Alim Akhtar <alim.akhtar@samsung.com>
2572L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)2577L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
2573L: linux-samsung-soc@vger.kernel.org2578L: linux-samsung-soc@vger.kernel.org
2574S: Maintained2579S: Maintained
2580C: irc://irc.libera.chat/linux-exynos
2575Q: https://patchwork.kernel.org/project/linux-samsung-soc/list/2581Q: https://patchwork.kernel.org/project/linux-samsung-soc/list/
2582T: git git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git
2576F: Documentation/arm/samsung/2583F: Documentation/arm/samsung/
2577F: Documentation/devicetree/bindings/arm/samsung/2584F: Documentation/devicetree/bindings/arm/samsung/
2578F: Documentation/devicetree/bindings/power/pd-samsung.yaml2585F: Documentation/devicetree/bindings/power/pd-samsung.yaml
@@ -3132,11 +3139,9 @@ W: https://wireless.wiki.kernel.org/en/users/Drivers/ath5k · 553 unmodified lines
3132F: drivers/net/wireless/ath/ath5k/3139F: drivers/net/wireless/ath/ath5k/
3133 3140
3134ATHEROS ATH6KL WIRELESS DRIVER3141ATHEROS ATH6KL WIRELESS DRIVER
3135M: Kalle Valo <kvalo@kernel.org>
3136L: linux-wireless@vger.kernel.org3142L: linux-wireless@vger.kernel.org
3137S: Supported3143S: Orphan
3138W: https://wireless.wiki.kernel.org/en/users/Drivers/ath6kl3144W: https://wireless.wiki.kernel.org/en/users/Drivers/ath6kl
3139T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git
3140F: drivers/net/wireless/ath/ath6kl/3145F: drivers/net/wireless/ath/ath6kl/
3141 3146
3142ATI_REMOTE2 DRIVER3147ATI_REMOTE2 DRIVER
@@ -4156,9 +4161,8 @@ N: csky · 1013 unmodified lines
4156K: csky4161K: csky
4157 4162
4158CA8210 IEEE-802.15.4 RADIO DRIVER4163CA8210 IEEE-802.15.4 RADIO DRIVER
4159M: Harry Morris <h.morris@cascoda.com>
4160L: linux-wpan@vger.kernel.org4164L: linux-wpan@vger.kernel.org
4161S: Maintained4165S: Orphan
4162W: https://github.com/Cascoda/ca8210-linux.git4166W: https://github.com/Cascoda/ca8210-linux.git
4163F: Documentation/devicetree/bindings/net/ieee802154/ca8210.txt4167F: Documentation/devicetree/bindings/net/ieee802154/ca8210.txt
4164F: drivers/net/ieee802154/ca8210.c4168F: drivers/net/ieee802154/ca8210.c
@@ -4543,6 +4547,7 @@ F: drivers/platform/chrome/ · 378 unmodified lines
4543 4547
4544CHROMEOS EC CODEC DRIVER4548CHROMEOS EC CODEC DRIVER
4545M: Cheng-Yi Chiang <cychiang@chromium.org>4549M: Cheng-Yi Chiang <cychiang@chromium.org>
4550M: Tzung-Bi Shih <tzungbi@google.com>
4546R: Guenter Roeck <groeck@chromium.org>4551R: Guenter Roeck <groeck@chromium.org>
4547S: Maintained4552S: Maintained
4548F: Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml4553F: Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml
@@ -5772,7 +5777,7 @@ F: tools/testing/selftests/dma/ · 1223 unmodified lines
5772 5777
5773DMA-BUF HEAPS FRAMEWORK5778DMA-BUF HEAPS FRAMEWORK
5774M: Sumit Semwal <sumit.semwal@linaro.org>5779M: Sumit Semwal <sumit.semwal@linaro.org>
5775R: Benjamin Gaignard <benjamin.gaignard@linaro.org>5780R: Benjamin Gaignard <benjamin.gaignard@collabora.com>
5776R: Liam Mark <lmark@codeaurora.org>5781R: Liam Mark <lmark@codeaurora.org>
5777R: Laura Abbott <labbott@redhat.com>5782R: Laura Abbott <labbott@redhat.com>
5778R: Brian Starkey <Brian.Starkey@arm.com>5783R: Brian Starkey <Brian.Starkey@arm.com>
@@ -6502,7 +6507,7 @@ F: Documentation/devicetree/bindings/display/rockchip/ · 723 unmodified lines
6502F: drivers/gpu/drm/rockchip/6507F: drivers/gpu/drm/rockchip/
6503 6508
6504DRM DRIVERS FOR STI6509DRM DRIVERS FOR STI
6505M: Benjamin Gaignard <benjamin.gaignard@linaro.org>6510M: Alain Volmat <alain.volmat@foss.st.com>
6506L: dri-devel@lists.freedesktop.org6511L: dri-devel@lists.freedesktop.org
6507S: Maintained6512S: Maintained
6508T: git git://anongit.freedesktop.org/drm/drm-misc6513T: git git://anongit.freedesktop.org/drm/drm-misc
@@ -6511,8 +6516,8 @@ F: drivers/gpu/drm/sti · 2 unmodified lines
6511 6516
6512DRM DRIVERS FOR STM6517DRM DRIVERS FOR STM
6513M: Yannick Fertre <yannick.fertre@foss.st.com>6518M: Yannick Fertre <yannick.fertre@foss.st.com>
6519M: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
6514M: Philippe Cornu <philippe.cornu@foss.st.com>6520M: Philippe Cornu <philippe.cornu@foss.st.com>
6515M: Benjamin Gaignard <benjamin.gaignard@linaro.org>
6516L: dri-devel@lists.freedesktop.org6521L: dri-devel@lists.freedesktop.org
6517S: Maintained6522S: Maintained
6518T: git git://anongit.freedesktop.org/drm/drm-misc6523T: git git://anongit.freedesktop.org/drm/drm-misc
@@ -7182,7 +7187,7 @@ F: drivers/net/can/usb/etas_es58x/ · 663 unmodified lines
7182 7187
7183ETHERNET BRIDGE7188ETHERNET BRIDGE
7184M: Roopa Prabhu <roopa@nvidia.com>7189M: Roopa Prabhu <roopa@nvidia.com>
7185M: Nikolay Aleksandrov <nikolay@nvidia.com>7190M: Nikolay Aleksandrov <razor@blackwall.org>
7186L: bridge@lists.linux-foundation.org (moderated for non-subscribers)7191L: bridge@lists.linux-foundation.org (moderated for non-subscribers)
7187L: netdev@vger.kernel.org7192L: netdev@vger.kernel.org
7188S: Maintained7193S: Maintained
@@ -7208,8 +7213,10 @@ F: drivers/net/mdio/of_mdio.c · 19 unmodified lines
7208F: drivers/net/pcs/7213F: drivers/net/pcs/
7209F: drivers/net/phy/7214F: drivers/net/phy/
7210F: include/dt-bindings/net/qca-ar803x.h7215F: include/dt-bindings/net/qca-ar803x.h
7216F: include/linux/linkmode.h
7211F: include/linux/*mdio*.h7217F: include/linux/*mdio*.h
7212F: include/linux/mdio/*.h7218F: include/linux/mdio/*.h
7219F: include/linux/mii.h
7213F: include/linux/of_net.h7220F: include/linux/of_net.h
7214F: include/linux/phy.h7221F: include/linux/phy.h
7215F: include/linux/phy_fixed.h7222F: include/linux/phy_fixed.h
@@ -7573,6 +7580,12 @@ S: Maintained · 357 unmodified lines
7573W: http://floatingpoint.sourceforge.net/emulator/index.html7580W: http://floatingpoint.sourceforge.net/emulator/index.html
7574F: arch/x86/math-emu/7581F: arch/x86/math-emu/
7575 7582
7583FRAMEBUFFER CORE
7584M: Daniel Vetter <daniel@ffwll.ch>
7585F: drivers/video/fbdev/core/
7586S: Odd Fixes
7587T: git git://anongit.freedesktop.org/drm/drm-misc
7588
7576FRAMEBUFFER LAYER7589FRAMEBUFFER LAYER
7577M: Helge Deller <deller@gmx.de>7590M: Helge Deller <deller@gmx.de>
7578L: linux-fbdev@vger.kernel.org7591L: linux-fbdev@vger.kernel.org
@@ -9250,6 +9263,15 @@ S: Maintained · 1671 unmodified lines
9250W: https://github.com/o2genum/ideapad-slidebar9263W: https://github.com/o2genum/ideapad-slidebar
9251F: drivers/input/misc/ideapad_slidebar.c9264F: drivers/input/misc/ideapad_slidebar.c
9252 9265
9266IDMAPPED MOUNTS
9267M: Christian Brauner <brauner@kernel.org>
9268L: linux-fsdevel@vger.kernel.org
9269S: Maintained
9270T: git git://git.kernel.org/pub/scm/linux/kernel/git/brauner/linux.git
9271F: Documentation/filesystems/idmappings.rst
9272F: tools/testing/selftests/mount_setattr/
9273F: include/linux/mnt_idmapping.h
9274
9253IDT VersaClock 5 CLOCK DRIVER9275IDT VersaClock 5 CLOCK DRIVER
9254M: Luca Ceresoli <luca@lucaceresoli.net>9276M: Luca Ceresoli <luca@lucaceresoli.net>
9255S: Maintained9277S: Maintained
@@ -10877,6 +10899,12 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/axboe/linux-block.git · 1621 unmodified lines
10877F: drivers/ata/pata_arasan_cf.c10899F: drivers/ata/pata_arasan_cf.c
10878F: include/linux/pata_arasan_cf_data.h10900F: include/linux/pata_arasan_cf_data.h
10879 10901
10902LIBATA PATA DRIVERS
10903R: Sergey Shtylyov <s.shtylyov@omp.ru>
10904L: linux-ide@vger.kernel.org
10905F: drivers/ata/ata_*.c
10906F: drivers/ata/pata_*.c
10907
10880LIBATA PATA FARADAY FTIDE010 AND GEMINI SATA BRIDGE DRIVERS10908LIBATA PATA FARADAY FTIDE010 AND GEMINI SATA BRIDGE DRIVERS
10881M: Linus Walleij <linus.walleij@linaro.org>10909M: Linus Walleij <linus.walleij@linaro.org>
10882L: linux-ide@vger.kernel.org10910L: linux-ide@vger.kernel.org
@@ -11366,8 +11394,9 @@ M: Johannes Berg <johannes@sipsolutions.net> · 483 unmodified lines
11366L: linux-wireless@vger.kernel.org11394L: linux-wireless@vger.kernel.org
11367S: Maintained11395S: Maintained
11368W: https://wireless.wiki.kernel.org/11396W: https://wireless.wiki.kernel.org/
11369T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211.git11397Q: https://patchwork.kernel.org/project/linux-wireless/list/
11370T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211-next.git11398T: git git://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless.git
11399T: git git://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next.git
11371F: Documentation/networking/mac80211-injection.rst11400F: Documentation/networking/mac80211-injection.rst
11372F: Documentation/networking/mac80211_hwsim/mac80211_hwsim.rst11401F: Documentation/networking/mac80211_hwsim/mac80211_hwsim.rst
11373F: drivers/net/wireless/mac80211_hwsim.[ch]11402F: drivers/net/wireless/mac80211_hwsim.[ch]
@@ -12396,7 +12425,7 @@ F: include/uapi/linux/membarrier.h · 1022 unmodified lines
12396F: kernel/sched/membarrier.c12425F: kernel/sched/membarrier.c
12397 12426
12398MEMBLOCK12427MEMBLOCK
12399M: Mike Rapoport <rppt@linux.ibm.com>12428M: Mike Rapoport <rppt@kernel.org>
12400L: linux-mm@kvack.org12429L: linux-mm@kvack.org
12401S: Maintained12430S: Maintained
12402F: Documentation/core-api/boot-time-mm.rst12431F: Documentation/core-api/boot-time-mm.rst
@@ -13294,8 +13323,8 @@ W: http://www.iptables.org/ · 891 unmodified lines
13294W: http://www.nftables.org/13323W: http://www.nftables.org/
13295Q: http://patchwork.ozlabs.org/project/netfilter-devel/list/13324Q: http://patchwork.ozlabs.org/project/netfilter-devel/list/
13296C: irc://irc.libera.chat/netfilter13325C: irc://irc.libera.chat/netfilter
13297T: git git://git.kernel.org/pub/scm/linux/kernel/git/pablo/nf.git13326T: git git://git.kernel.org/pub/scm/linux/kernel/git/netfilter/nf.git
13298T: git git://git.kernel.org/pub/scm/linux/kernel/git/pablo/nf-next.git13327T: git git://git.kernel.org/pub/scm/linux/kernel/git/netfilter/nf-next.git
13299F: include/linux/netfilter*13328F: include/linux/netfilter*
13300F: include/linux/netfilter/13329F: include/linux/netfilter/
13301F: include/net/netfilter/13330F: include/net/netfilter/
@@ -13374,9 +13403,10 @@ NETWORKING DRIVERS (WIRELESS) · 72 unmodified lines
13374M: Kalle Valo <kvalo@kernel.org>13403M: Kalle Valo <kvalo@kernel.org>
13375L: linux-wireless@vger.kernel.org13404L: linux-wireless@vger.kernel.org
13376S: Maintained13405S: Maintained
13377Q: http://patchwork.kernel.org/project/linux-wireless/list/13406W: https://wireless.wiki.kernel.org/
13378T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers.git13407Q: https://patchwork.kernel.org/project/linux-wireless/list/
13379T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next.git13408T: git git://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless.git
13409T: git git://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next.git
13380F: Documentation/devicetree/bindings/net/wireless/13410F: Documentation/devicetree/bindings/net/wireless/
13381F: drivers/net/wireless/13411F: drivers/net/wireless/
13382 13412
@@ -13449,7 +13479,11 @@ L: netdev@vger.kernel.org · 66 unmodified lines
13449S: Maintained13479S: Maintained
13450T: git git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net.git13480T: git git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net.git
13451F: arch/x86/net/*13481F: arch/x86/net/*
13482F: include/linux/ip.h
13483F: include/linux/ipv6*
13484F: include/net/fib*
13452F: include/net/ip*13485F: include/net/ip*
13486F: include/net/route.h
13453F: net/ipv4/13487F: net/ipv4/
13454F: net/ipv6/13488F: net/ipv6/
13455 13489
@@ -13510,10 +13544,6 @@ F: include/net/tls.h · 54 unmodified lines
13510F: include/uapi/linux/tls.h13544F: include/uapi/linux/tls.h
13511F: net/tls/*13545F: net/tls/*
13512 13546
13513NETWORKING [WIRELESS]
13514L: linux-wireless@vger.kernel.org
13515Q: http://patchwork.kernel.org/project/linux-wireless/list/
13516
13517NETXEN (1/10) GbE SUPPORT13547NETXEN (1/10) GbE SUPPORT
13518M: Manish Chopra <manishc@marvell.com>13548M: Manish Chopra <manishc@marvell.com>
13519M: Rahul Verma <rahulv@marvell.com>13549M: Rahul Verma <rahulv@marvell.com>
@@ -13561,7 +13591,7 @@ F: tools/testing/selftests/nci/ · 41 unmodified lines
13561 13591
13562NFS, SUNRPC, AND LOCKD CLIENTS13592NFS, SUNRPC, AND LOCKD CLIENTS
13563M: Trond Myklebust <trond.myklebust@hammerspace.com>13593M: Trond Myklebust <trond.myklebust@hammerspace.com>
13564M: Anna Schumaker <anna.schumaker@netapp.com>13594M: Anna Schumaker <anna@kernel.org>
13565L: linux-nfs@vger.kernel.org13595L: linux-nfs@vger.kernel.org
13566S: Maintained13596S: Maintained
13567W: http://client.linux-nfs.org13597W: http://client.linux-nfs.org
@@ -14379,6 +14409,7 @@ M: Rob Herring <robh+dt@kernel.org> · 811 unmodified lines
14379M: Frank Rowand <frowand.list@gmail.com>14409M: Frank Rowand <frowand.list@gmail.com>
14380L: devicetree@vger.kernel.org14410L: devicetree@vger.kernel.org
14381S: Maintained14411S: Maintained
14412C: irc://irc.libera.chat/devicetree
14382W: http://www.devicetree.org/14413W: http://www.devicetree.org/
14383T: git git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git14414T: git git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git
14384F: Documentation/ABI/testing/sysfs-firmware-ofw14415F: Documentation/ABI/testing/sysfs-firmware-ofw
@@ -14390,6 +14421,7 @@ OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS · 5 unmodified lines
14390M: Rob Herring <robh+dt@kernel.org>14421M: Rob Herring <robh+dt@kernel.org>
14391L: devicetree@vger.kernel.org14422L: devicetree@vger.kernel.org
14392S: Maintained14423S: Maintained
14424C: irc://irc.libera.chat/devicetree
14393Q: http://patchwork.ozlabs.org/project/devicetree-bindings/list/14425Q: http://patchwork.ozlabs.org/project/devicetree-bindings/list/
14394T: git git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git14426T: git git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git
14395F: Documentation/devicetree/14427F: Documentation/devicetree/
@@ -15123,7 +15155,7 @@ M: Ingo Molnar <mingo@redhat.com> · 727 unmodified lines
15123M: Arnaldo Carvalho de Melo <acme@kernel.org>15155M: Arnaldo Carvalho de Melo <acme@kernel.org>
15124R: Mark Rutland <mark.rutland@arm.com>15156R: Mark Rutland <mark.rutland@arm.com>
15125R: Alexander Shishkin <alexander.shishkin@linux.intel.com>15157R: Alexander Shishkin <alexander.shishkin@linux.intel.com>
15126R: Jiri Olsa <jolsa@redhat.com>15158R: Jiri Olsa <jolsa@kernel.org>
15127R: Namhyung Kim <namhyung@kernel.org>15159R: Namhyung Kim <namhyung@kernel.org>
15128L: linux-perf-users@vger.kernel.org15160L: linux-perf-users@vger.kernel.org
15129L: linux-kernel@vger.kernel.org15161L: linux-kernel@vger.kernel.org
@@ -15280,9 +15312,11 @@ PIN CONTROLLER - SAMSUNG · 150 unmodified lines
15280M: Tomasz Figa <tomasz.figa@gmail.com>15312M: Tomasz Figa <tomasz.figa@gmail.com>
15281M: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>15313M: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
15282M: Sylwester Nawrocki <s.nawrocki@samsung.com>15314M: Sylwester Nawrocki <s.nawrocki@samsung.com>
15315R: Alim Akhtar <alim.akhtar@samsung.com>
15283L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)15316L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
15284L: linux-samsung-soc@vger.kernel.org15317L: linux-samsung-soc@vger.kernel.org
15285S: Maintained15318S: Maintained
15319C: irc://irc.libera.chat/linux-exynos
15286Q: https://patchwork.kernel.org/project/linux-samsung-soc/list/15320Q: https://patchwork.kernel.org/project/linux-samsung-soc/list/
15287T: git git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung.git15321T: git git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung.git
15288F: Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt15322F: Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
@@ -15887,6 +15921,7 @@ S: Supported · 598 unmodified lines
15887W: https://wireless.wiki.kernel.org/en/users/Drivers/ath10k15921W: https://wireless.wiki.kernel.org/en/users/Drivers/ath10k
15888T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git15922T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git
15889F: drivers/net/wireless/ath/ath10k/15923F: drivers/net/wireless/ath/ath10k/
15924F: Documentation/devicetree/bindings/net/wireless/qcom,ath10k.txt
15890 15925
15891QUALCOMM ATHEROS ATH11K WIRELESS DRIVER15926QUALCOMM ATHEROS ATH11K WIRELESS DRIVER
15892M: Kalle Valo <kvalo@kernel.org>15927M: Kalle Valo <kvalo@kernel.org>
@@ -15894,11 +15929,12 @@ L: ath11k@lists.infradead.org · 1 unmodified line
15894S: Supported15929S: Supported
15895T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git15930T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git
15896F: drivers/net/wireless/ath/ath11k/15931F: drivers/net/wireless/ath/ath11k/
15932F: Documentation/devicetree/bindings/net/wireless/qcom,ath11k.txt
15897 15933
15898QUALCOMM ATHEROS ATH9K WIRELESS DRIVER15934QUALCOMM ATHEROS ATH9K WIRELESS DRIVER
15899M: ath9k-devel@qca.qualcomm.com15935M: Toke Høiland-Jørgensen <toke@toke.dk>
15900L: linux-wireless@vger.kernel.org15936L: linux-wireless@vger.kernel.org
15901S: Supported15937S: Maintained
15902W: https://wireless.wiki.kernel.org/en/users/Drivers/ath9k15938W: https://wireless.wiki.kernel.org/en/users/Drivers/ath9k
15903F: Documentation/devicetree/bindings/net/wireless/qca,ath9k.yaml15939F: Documentation/devicetree/bindings/net/wireless/qca,ath9k.yaml
15904F: drivers/net/wireless/ath/ath9k/15940F: drivers/net/wireless/ath/ath9k/
@@ -15973,14 +16009,6 @@ F: Documentation/devicetree/bindings/misc/qcom,fastrpc.txt · 68 unmodified lines
15973F: drivers/misc/fastrpc.c16009F: drivers/misc/fastrpc.c
15974F: include/uapi/misc/fastrpc.h16010F: include/uapi/misc/fastrpc.h
15975 16011
15976QUALCOMM GENERIC INTERFACE I2C DRIVER
15977M: Akash Asthana <akashast@codeaurora.org>
15978M: Mukesh Savaliya <msavaliy@codeaurora.org>
15979L: linux-i2c@vger.kernel.org
15980L: linux-arm-msm@vger.kernel.org
15981S: Supported
15982F: drivers/i2c/busses/i2c-qcom-geni.c
15983
15984QUALCOMM HEXAGON ARCHITECTURE16012QUALCOMM HEXAGON ARCHITECTURE
15985M: Brian Cain <bcain@codeaurora.org>16013M: Brian Cain <bcain@codeaurora.org>
15986L: linux-hexagon@vger.kernel.org16014L: linux-hexagon@vger.kernel.org
@@ -16079,11 +16107,10 @@ F: Documentation/devicetree/bindings/media/*venus* · 92 unmodified lines
16079F: drivers/media/platform/qcom/venus/16107F: drivers/media/platform/qcom/venus/
16080 16108
16081QUALCOMM WCN36XX WIRELESS DRIVER16109QUALCOMM WCN36XX WIRELESS DRIVER
16082M: Kalle Valo <kvalo@kernel.org>16110M: Loic Poulain <loic.poulain@linaro.org>
16083L: wcn36xx@lists.infradead.org16111L: wcn36xx@lists.infradead.org
16084S: Supported16112S: Supported
16085W: https://wireless.wiki.kernel.org/en/users/Drivers/wcn36xx16113W: https://wireless.wiki.kernel.org/en/users/Drivers/wcn36xx
16086T: git git://github.com/KrasnikovEugene/wcn36xx.git
16087F: drivers/net/wireless/ath/wcn36xx/16114F: drivers/net/wireless/ath/wcn36xx/
16088 16115
16089QUANTENNA QTNFMAC WIRELESS DRIVER16116QUANTENNA QTNFMAC WIRELESS DRIVER
@@ -16465,6 +16492,14 @@ F: Documentation/devicetree/bindings/i2c/renesas,rmobile-iic.yaml · 375 unmodified lines
16465F: drivers/i2c/busses/i2c-rcar.c16492F: drivers/i2c/busses/i2c-rcar.c
16466F: drivers/i2c/busses/i2c-sh_mobile.c16493F: drivers/i2c/busses/i2c-sh_mobile.c
16467 16494
16495RENESAS R-CAR SATA DRIVER
16496R: Sergey Shtylyov <s.shtylyov@omp.ru>
16497S: Supported
16498L: linux-ide@vger.kernel.org
16499L: linux-renesas-soc@vger.kernel.org
16500F: Documentation/devicetree/bindings/ata/renesas,rcar-sata.yaml
16501F: drivers/ata/sata_rcar.c
16502
16468RENESAS R-CAR THERMAL DRIVERS16503RENESAS R-CAR THERMAL DRIVERS
16469M: Niklas Söderlund <niklas.soderlund@ragnatech.se>16504M: Niklas Söderlund <niklas.soderlund@ragnatech.se>
16470L: linux-renesas-soc@vger.kernel.org16505L: linux-renesas-soc@vger.kernel.org
@@ -16533,8 +16568,9 @@ M: Johannes Berg <johannes@sipsolutions.net> · 62 unmodified lines
16533L: linux-wireless@vger.kernel.org16568L: linux-wireless@vger.kernel.org
16534S: Maintained16569S: Maintained
16535W: https://wireless.wiki.kernel.org/16570W: https://wireless.wiki.kernel.org/
16536T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211.git16571Q: https://patchwork.kernel.org/project/linux-wireless/list/
16537T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211-next.git16572T: git git://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless.git
16573T: git git://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next.git
16538F: Documentation/ABI/stable/sysfs-class-rfkill16574F: Documentation/ABI/stable/sysfs-class-rfkill
16539F: Documentation/driver-api/rfkill.rst16575F: Documentation/driver-api/rfkill.rst
16540F: include/linux/rfkill.h16576F: include/linux/rfkill.h
@@ -16799,8 +16835,8 @@ F: drivers/video/fbdev/savage/ · 258 unmodified lines
16799S39016835S390
16800M: Heiko Carstens <hca@linux.ibm.com>16836M: Heiko Carstens <hca@linux.ibm.com>
16801M: Vasily Gorbik <gor@linux.ibm.com>16837M: Vasily Gorbik <gor@linux.ibm.com>
16802M: Christian Borntraeger <borntraeger@linux.ibm.com>16838M: Alexander Gordeev <agordeev@linux.ibm.com>
16803R: Alexander Gordeev <agordeev@linux.ibm.com>16839R: Christian Borntraeger <borntraeger@linux.ibm.com>
16804R: Sven Schnelle <svens@linux.ibm.com>16840R: Sven Schnelle <svens@linux.ibm.com>
16805L: linux-s390@vger.kernel.org16841L: linux-s390@vger.kernel.org
16806S: Supported16842S: Supported
@@ -17071,6 +17107,7 @@ SAMSUNG SOC CLOCK DRIVERS · 264 unmodified lines
17071M: Sylwester Nawrocki <s.nawrocki@samsung.com>17107M: Sylwester Nawrocki <s.nawrocki@samsung.com>
17072M: Tomasz Figa <tomasz.figa@gmail.com>17108M: Tomasz Figa <tomasz.figa@gmail.com>
17073M: Chanwoo Choi <cw00.choi@samsung.com>17109M: Chanwoo Choi <cw00.choi@samsung.com>
17110R: Alim Akhtar <alim.akhtar@samsung.com>
17074L: linux-samsung-soc@vger.kernel.org17111L: linux-samsung-soc@vger.kernel.org
17075S: Supported17112S: Supported
17076T: git git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk.git17113T: git git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk.git
@@ -17707,6 +17744,21 @@ S: Maintained · 630 unmodified lines
17707W: http://www.winischhofer.at/linuxsisusbvga.shtml17744W: http://www.winischhofer.at/linuxsisusbvga.shtml
17708F: drivers/usb/misc/sisusbvga/17745F: drivers/usb/misc/sisusbvga/
17709 17746
17747SL28 CPLD MFD DRIVER
17748M: Michael Walle <michael@walle.cc>
17749S: Maintained
17750F: Documentation/devicetree/bindings/gpio/kontron,sl28cpld-gpio.yaml
17751F: Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml
17752F: Documentation/devicetree/bindings/interrupt-controller/kontron,sl28cpld-intc.yaml
17753F: Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml
17754F: Documentation/devicetree/bindings/pwm/kontron,sl28cpld-pwm.yaml
17755F: Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml
17756F: drivers/gpio/gpio-sl28cpld.c
17757F: drivers/hwmon/sl28cpld-hwmon.c
17758F: drivers/irqchip/irq-sl28cpld.c
17759F: drivers/pwm/pwm-sl28cpld.c
17760F: drivers/watchdog/sl28cpld_wdt.c
17761
17710SLAB ALLOCATOR17762SLAB ALLOCATOR
17711M: Christoph Lameter <cl@linux.com>17763M: Christoph Lameter <cl@linux.com>
17712M: Pekka Enberg <penberg@kernel.org>17764M: Pekka Enberg <penberg@kernel.org>
@@ -18423,7 +18475,7 @@ F: Documentation/devicetree/bindings/sound/st,sti-asoc-card.txt · 710 unmodified lines
18423F: sound/soc/sti/18475F: sound/soc/sti/
18424 18476
18425STI CEC DRIVER18477STI CEC DRIVER
18426M: Benjamin Gaignard <benjamin.gaignard@linaro.org>18478M: Alain Volmat <alain.volmat@foss.st.com>
18427S: Maintained18479S: Maintained
18428F: Documentation/devicetree/bindings/media/stih-cec.txt18480F: Documentation/devicetree/bindings/media/stih-cec.txt
18429F: drivers/media/cec/platform/sti/18481F: drivers/media/cec/platform/sti/
@@ -19577,6 +19629,14 @@ F: Documentation/trace/timerlat-tracer.rst · 1147 unmodified lines
19577F: Documentation/trace/hwlat_detector.rst19629F: Documentation/trace/hwlat_detector.rst
19578F: arch/*/kernel/trace.c19630F: arch/*/kernel/trace.c
19579 19631
19632Real-time Linux Analysis (RTLA) tools
19633M: Daniel Bristot de Oliveira <bristot@kernel.org>
19634M: Steven Rostedt <rostedt@goodmis.org>
19635L: linux-trace-devel@vger.kernel.org
19636S: Maintained
19637F: Documentation/tools/rtla/
19638F: tools/tracing/rtla/
19639
19580TRADITIONAL CHINESE DOCUMENTATION19640TRADITIONAL CHINESE DOCUMENTATION
19581M: Hu Haowen <src.res@email.cn>19641M: Hu Haowen <src.res@email.cn>
19582L: linux-doc-tw-discuss@lists.sourceforge.net19642L: linux-doc-tw-discuss@lists.sourceforge.net
Makefile+2−2
@@ -2,8 +2,8 @@ · 1 unmodified line
2VERSION = 52VERSION = 5
3PATCHLEVEL = 173PATCHLEVEL = 17
4SUBLEVEL = 04SUBLEVEL = 0
5EXTRAVERSION = -rc15EXTRAVERSION = -rc5
6NAME = Gobble Gobble6NAME = Superb Owl
7 7
8# *DOCUMENTATION*8# *DOCUMENTATION*
9# To see a list of typical targets execute "make help"9# To see a list of typical targets execute "make help"
arch/arm/Kconfig+1−0
@@ -83,6 +83,7 @@ config ARM · 82 unmodified lines
83 select HAVE_EBPF_JIT if !CPU_ENDIAN_BE3283 select HAVE_EBPF_JIT if !CPU_ENDIAN_BE32
84 select HAVE_CONTEXT_TRACKING84 select HAVE_CONTEXT_TRACKING
85 select HAVE_C_RECORDMCOUNT85 select HAVE_C_RECORDMCOUNT
86 select HAVE_BUILDTIME_MCOUNT_SORT
86 select HAVE_DEBUG_KMEMLEAK if !XIP_KERNEL87 select HAVE_DEBUG_KMEMLEAK if !XIP_KERNEL
87 select HAVE_DMA_CONTIGUOUS if MMU88 select HAVE_DMA_CONTIGUOUS if MMU
88 select HAVE_DYNAMIC_FTRACE if !XIP_KERNEL && !CPU_ENDIAN_BE32 && MMU89 select HAVE_DYNAMIC_FTRACE if !XIP_KERNEL && !CPU_ENDIAN_BE32 && MMU
arch/arm/boot/dts/Makefile+1−0
@@ -806,6 +806,7 @@ dtb-$(CONFIG_ARCH_OMAP3) += \ · 805 unmodified lines
806 logicpd-som-lv-37xx-devkit.dtb \806 logicpd-som-lv-37xx-devkit.dtb \
807 omap3430-sdp.dtb \807 omap3430-sdp.dtb \
808 omap3-beagle.dtb \808 omap3-beagle.dtb \
809 omap3-beagle-ab4.dtb \
809 omap3-beagle-xm.dtb \810 omap3-beagle-xm.dtb \
810 omap3-beagle-xm-ab.dtb \811 omap3-beagle-xm-ab.dtb \
811 omap3-cm-t3517.dtb \812 omap3-cm-t3517.dtb \
arch/arm/boot/dts/am335x-wega.dtsi+1−1
@@ -55,7 +55,7 @@ · 54 unmodified lines
55 2 1 0 0 /* # 0: INACTIVE, 1: TX, 2: RX */55 2 1 0 0 /* # 0: INACTIVE, 1: TX, 2: RX */
56 >;56 >;
57 tx-num-evt = <16>;57 tx-num-evt = <16>;
58 rt-num-evt = <16>;58 rx-num-evt = <16>;
59 status = "okay";59 status = "okay";
60};60};
61 61
arch/arm/boot/dts/dra7.dtsi+10−10
@@ -160,7 +160,7 @@ · 159 unmodified lines
160 target-module@48210000 {160 target-module@48210000 {
161 compatible = "ti,sysc-omap4-simple", "ti,sysc";161 compatible = "ti,sysc-omap4-simple", "ti,sysc";
162 power-domains = <&prm_mpu>;162 power-domains = <&prm_mpu>;
163 clocks = <&mpu_clkctrl DRA7_MPU_CLKCTRL 0>;163 clocks = <&mpu_clkctrl DRA7_MPU_MPU_CLKCTRL 0>;
164 clock-names = "fck";164 clock-names = "fck";
165 #address-cells = <1>;165 #address-cells = <1>;
166 #size-cells = <1>;166 #size-cells = <1>;
@@ -875,10 +875,10 @@ · 708 unmodified lines
875 <0x58000014 4>;875 <0x58000014 4>;
876 reg-names = "rev", "syss";876 reg-names = "rev", "syss";
877 ti,syss-mask = <1>;877 ti,syss-mask = <1>;
878 clocks = <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 0>,878 clocks = <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 0>,
879 <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 9>,879 <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 9>,
880 <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 10>,880 <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 10>,
881 <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 11>;881 <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 11>;
882 clock-names = "fck", "hdmi_clk", "sys_clk", "tv_clk";882 clock-names = "fck", "hdmi_clk", "sys_clk", "tv_clk";
883 #address-cells = <1>;883 #address-cells = <1>;
884 #size-cells = <1>;884 #size-cells = <1>;
@@ -912,7 +912,7 @@ · 27 unmodified lines
912 SYSC_OMAP2_SOFTRESET |912 SYSC_OMAP2_SOFTRESET |
913 SYSC_OMAP2_AUTOIDLE)>;913 SYSC_OMAP2_AUTOIDLE)>;
914 ti,syss-mask = <1>;914 ti,syss-mask = <1>;
915 clocks = <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 8>;915 clocks = <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 8>;
916 clock-names = "fck";916 clock-names = "fck";
917 #address-cells = <1>;917 #address-cells = <1>;
918 #size-cells = <1>;918 #size-cells = <1>;
@@ -939,8 +939,8 @@ · 20 unmodified lines
939 <SYSC_IDLE_SMART>,939 <SYSC_IDLE_SMART>,
940 <SYSC_IDLE_SMART_WKUP>;940 <SYSC_IDLE_SMART_WKUP>;
941 ti,sysc-mask = <(SYSC_OMAP4_SOFTRESET)>;941 ti,sysc-mask = <(SYSC_OMAP4_SOFTRESET)>;
942 clocks = <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 9>,942 clocks = <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 9>,
943 <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 8>;943 <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 8>;
944 clock-names = "fck", "dss_clk";944 clock-names = "fck", "dss_clk";
945 #address-cells = <1>;945 #address-cells = <1>;
946 #size-cells = <1>;946 #size-cells = <1>;
@@ -979,7 +979,7 @@ · 32 unmodified lines
979 compatible = "vivante,gc";979 compatible = "vivante,gc";
980 reg = <0x0 0x700>;980 reg = <0x0 0x700>;
981 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;981 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
982 clocks = <&dss_clkctrl DRA7_BB2D_CLKCTRL 0>;982 clocks = <&dss_clkctrl DRA7_DSS_BB2D_CLKCTRL 0>;
983 clock-names = "core";983 clock-names = "core";
984 };984 };
985 };985 };
@@ -1333,7 +1333,7 @@ · 347 unmodified lines
1333 ti,no-reset-on-init;1333 ti,no-reset-on-init;
1334 ti,no-idle;1334 ti,no-idle;
1335 timer@0 {1335 timer@0 {
1336 assigned-clocks = <&wkupaon_clkctrl DRA7_TIMER1_CLKCTRL 24>;1336 assigned-clocks = <&wkupaon_clkctrl DRA7_WKUPAON_TIMER1_CLKCTRL 24>;
1337 assigned-clock-parents = <&sys_32k_ck>;1337 assigned-clock-parents = <&sys_32k_ck>;
1338 };1338 };
1339};1339};
arch/arm/boot/dts/imx23-evk.dts+0−1
@@ -79,7 +79,6 @@ · 78 unmodified lines
79 MX23_PAD_LCD_RESET__GPIO_1_1879 MX23_PAD_LCD_RESET__GPIO_1_18
80 MX23_PAD_PWM3__GPIO_1_2980 MX23_PAD_PWM3__GPIO_1_29
81 MX23_PAD_PWM4__GPIO_1_3081 MX23_PAD_PWM4__GPIO_1_30
82 MX23_PAD_SSP1_DETECT__SSP1_DETECT
83 >;82 >;
84 fsl,drive-strength = <MXS_DRIVE_4mA>;83 fsl,drive-strength = <MXS_DRIVE_4mA>;
85 fsl,voltage = <MXS_VOLTAGE_HIGH>;84 fsl,voltage = <MXS_VOLTAGE_HIGH>;
arch/arm/boot/dts/imx6qdl-udoo.dtsi+4−1
@@ -5,6 +5,8 @@ · 4 unmodified lines
5 * Author: Fabio Estevam <fabio.estevam@freescale.com>5 * Author: Fabio Estevam <fabio.estevam@freescale.com>
6 */6 */
7 7
8#include <dt-bindings/gpio/gpio.h>
9
8/ {10/ {
9 aliases {11 aliases {
10 backlight = &backlight;12 backlight = &backlight;
@@ -226,6 +228,7 @@ · 215 unmodified lines
226 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059228 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
227 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059229 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
228 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059230 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
231 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0
229 >;232 >;
230 };233 };
231 234
@@ -304,7 +307,7 @@ · 72 unmodified lines
304&usdhc3 {307&usdhc3 {
305 pinctrl-names = "default";308 pinctrl-names = "default";
306 pinctrl-0 = <&pinctrl_usdhc3>;309 pinctrl-0 = <&pinctrl_usdhc3>;
307 non-removable;310 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
308 status = "okay";311 status = "okay";
309};312};
310 313
arch/arm/boot/dts/imx7ulp.dtsi+1−1
@@ -259,7 +259,7 @@ · 258 unmodified lines
259 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;259 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
260 clocks = <&pcc2 IMX7ULP_CLK_WDG1>;260 clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
261 assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;261 assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
262 assigned-clocks-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;262 assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
263 timeout-sec = <40>;263 timeout-sec = <40>;
264 };264 };
265 265
arch/arm/boot/dts/meson.dtsi+4−4
@@ -59,7 +59,7 @@ · 58 unmodified lines
59 };59 };
60 60
61 uart_A: serial@84c0 {61 uart_A: serial@84c0 {
62 compatible = "amlogic,meson6-uart", "amlogic,meson-uart";62 compatible = "amlogic,meson6-uart";
63 reg = <0x84c0 0x18>;63 reg = <0x84c0 0x18>;
64 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;64 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
65 fifo-size = <128>;65 fifo-size = <128>;
@@ -67,7 +67,7 @@ · 1 unmodified line
67 };67 };
68 68
69 uart_B: serial@84dc {69 uart_B: serial@84dc {
70 compatible = "amlogic,meson6-uart", "amlogic,meson-uart";70 compatible = "amlogic,meson6-uart";
71 reg = <0x84dc 0x18>;71 reg = <0x84dc 0x18>;
72 interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;72 interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
73 status = "disabled";73 status = "disabled";
@@ -105,7 +105,7 @@ · 31 unmodified lines
105 };105 };
106 106
107 uart_C: serial@8700 {107 uart_C: serial@8700 {
108 compatible = "amlogic,meson6-uart", "amlogic,meson-uart";108 compatible = "amlogic,meson6-uart";
109 reg = <0x8700 0x18>;109 reg = <0x8700 0x18>;
110 interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;110 interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
111 status = "disabled";111 status = "disabled";
@@ -228,7 +228,7 @@ · 116 unmodified lines
228 };228 };
229 229
230 uart_AO: serial@4c0 {230 uart_AO: serial@4c0 {
231 compatible = "amlogic,meson6-uart", "amlogic,meson-ao-uart", "amlogic,meson-uart";231 compatible = "amlogic,meson6-uart", "amlogic,meson-ao-uart";
232 reg = <0x4c0 0x18>;232 reg = <0x4c0 0x18>;
233 interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;233 interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
234 status = "disabled";234 status = "disabled";
arch/arm/boot/dts/meson8.dtsi+12−12
@@ -736,27 +736,27 @@ · 735 unmodified lines
736};736};
737 737
738&uart_AO {738&uart_AO {
739 compatible = "amlogic,meson8-uart", "amlogic,meson-uart";739 compatible = "amlogic,meson8-uart", "amlogic,meson-ao-uart";
740 clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_CLK81>;740 clocks = <&xtal>, <&clkc CLKID_CLK81>, <&clkc CLKID_CLK81>;
741 clock-names = "baud", "xtal", "pclk";741 clock-names = "xtal", "pclk", "baud";
742};742};
743 743
744&uart_A {744&uart_A {
745 compatible = "amlogic,meson8-uart", "amlogic,meson-uart";745 compatible = "amlogic,meson8-uart";
746 clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART0>;746 clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>;
747 clock-names = "baud", "xtal", "pclk";747 clock-names = "xtal", "pclk", "baud";
748};748};
749 749
750&uart_B {750&uart_B {
751 compatible = "amlogic,meson8-uart", "amlogic,meson-uart";751 compatible = "amlogic,meson8-uart";
752 clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART1>;752 clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>;
753 clock-names = "baud", "xtal", "pclk";753 clock-names = "xtal", "pclk", "baud";
754};754};
755 755
756&uart_C {756&uart_C {
757 compatible = "amlogic,meson8-uart", "amlogic,meson-uart";757 compatible = "amlogic,meson8-uart";
758 clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART2>;758 clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>;
759 clock-names = "baud", "xtal", "pclk";759 clock-names = "xtal", "pclk", "baud";
760};760};
761 761
762&usb0 {762&usb0 {
arch/arm/boot/dts/meson8b.dtsi+12−12
@@ -724,27 +724,27 @@ · 723 unmodified lines
724};724};
725 725
726&uart_AO {726&uart_AO {
727 compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";727 compatible = "amlogic,meson8b-uart", "amlogic,meson-ao-uart";
728 clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_CLK81>;728 clocks = <&xtal>, <&clkc CLKID_CLK81>, <&clkc CLKID_CLK81>;
729 clock-names = "baud", "xtal", "pclk";729 clock-names = "xtal", "pclk", "baud";
730};730};
731 731
732&uart_A {732&uart_A {
733 compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";733 compatible = "amlogic,meson8b-uart";
734 clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART0>;734 clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>;
735 clock-names = "baud", "xtal", "pclk";735 clock-names = "xtal", "pclk", "baud";
736};736};
737 737
738&uart_B {738&uart_B {
739 compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";739 compatible = "amlogic,meson8b-uart";
740 clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART1>;740 clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>;
741 clock-names = "baud", "xtal", "pclk";741 clock-names = "xtal", "pclk", "baud";
742};742};
743 743
744&uart_C {744&uart_C {
745 compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";745 compatible = "amlogic,meson8b-uart";
746 clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART2>;746 clocks = <&xtal>, <&clkc CLKID_UART0>, <&clkc CLKID_CLK81>;
747 clock-names = "baud", "xtal", "pclk";747 clock-names = "xtal", "pclk", "baud";
748};748};
749 749
750&usb0 {750&usb0 {
arch/arm/boot/dts/omap3-beagle-ab4.dts+47−0
@@ -0,0 +1,47 @@
1// SPDX-License-Identifier: GPL-2.0-only
2/dts-v1/;
3
4#include "omap3-beagle.dts"
5
6/ {
7 model = "TI OMAP3 BeagleBoard A to B4";
8 compatible = "ti,omap3-beagle-ab4", "ti,omap3-beagle", "ti,omap3430", "ti,omap3";
9};
10
11/*
12 * Workaround for capacitor C70 issue, see "Boards revision A and < B5"
13 * section at https://elinux.org/BeagleBoard_Community
14 */
15
16/* Unusable as clocksource because of unreliable oscillator */
17&counter32k {
18 status = "disabled";
19};
20
21/* Unusable as clockevent because of unreliable oscillator, allow to idle */
22&timer1_target {
23 /delete-property/ti,no-reset-on-init;
24 /delete-property/ti,no-idle;
25 timer@0 {
26 /delete-property/ti,timer-alwon;
27 };
28};
29
30/* Preferred always-on timer for clocksource */
31&timer12_target {
32 ti,no-reset-on-init;
33 ti,no-idle;
34 timer@0 {
35 /* Always clocked by secure_32k_fck */
36 };
37};
38
39/* Preferred timer for clockevent */
40&timer2_target {
41 ti,no-reset-on-init;
42 ti,no-idle;
43 timer@0 {
44 assigned-clocks = <&gpt2_fck>;
45 assigned-clock-parents = <&sys_ck>;
46 };
47};
arch/arm/boot/dts/omap3-beagle.dts+0−33
@@ -304,39 +304,6 @@ · 303 unmodified lines
304 phys = <0 &hsusb2_phy>;304 phys = <0 &hsusb2_phy>;
305};305};
306 306
307/* Unusable as clocksource because of unreliable oscillator */
308&counter32k {
309 status = "disabled";
310};
311
312/* Unusable as clockevent because if unreliable oscillator, allow to idle */
313&timer1_target {
314 /delete-property/ti,no-reset-on-init;
315 /delete-property/ti,no-idle;
316 timer@0 {
317 /delete-property/ti,timer-alwon;
318 };
319};
320
321/* Preferred always-on timer for clocksource */
322&timer12_target {
323 ti,no-reset-on-init;
324 ti,no-idle;
325 timer@0 {
326 /* Always clocked by secure_32k_fck */
327 };
328};
329
330/* Preferred timer for clockevent */
331&timer2_target {
332 ti,no-reset-on-init;
333 ti,no-idle;
334 timer@0 {
335 assigned-clocks = <&gpt2_fck>;
336 assigned-clock-parents = <&sys_ck>;
337 };
338};
339
340&twl_gpio {307&twl_gpio {
341 ti,use-leds;308 ti,use-leds;
342 /* pullups: BIT(1) */309 /* pullups: BIT(1) */
arch/arm/boot/dts/spear320-hmi.dts+0−1
@@ -235,7 +235,6 @@ · 234 unmodified lines
235 #address-cells = <1>;235 #address-cells = <1>;
236 #size-cells = <0>;236 #size-cells = <0>;
237 reg = <0x41>;237 reg = <0x41>;
238 irq-over-gpio;
239 irq-gpios = <&gpiopinctrl 29 0x4>;238 irq-gpios = <&gpiopinctrl 29 0x4>;
240 id = <0>;239 id = <0>;
241 blocks = <0x5>;240 blocks = <0x5>;
arch/arm/boot/dts/ste-ux500-samsung-skomer.dts+0−4
@@ -185,10 +185,6 @@ · 184 unmodified lines
185 cap-sd-highspeed;185 cap-sd-highspeed;
186 cap-mmc-highspeed;186 cap-mmc-highspeed;
187 /* All direction control is used */187 /* All direction control is used */
188 st,sig-dir-cmd;
189 st,sig-dir-dat0;
190 st,sig-dir-dat2;
191 st,sig-dir-dat31;
192 st,sig-pin-fbclk;188 st,sig-pin-fbclk;
193 full-pwr-cycle;189 full-pwr-cycle;
194 vmmc-supply = <&ab8500_ldo_aux3_reg>;190 vmmc-supply = <&ab8500_ldo_aux3_reg>;
arch/arm/crypto/blake2s-shash.c+2−2
@@ -13,12 +13,12 @@ · 12 unmodified lines
13static int crypto_blake2s_update_arm(struct shash_desc *desc,13static int crypto_blake2s_update_arm(struct shash_desc *desc,
14 const u8 *in, unsigned int inlen)14 const u8 *in, unsigned int inlen)
15{15{
16 return crypto_blake2s_update(desc, in, inlen, blake2s_compress);16 return crypto_blake2s_update(desc, in, inlen, false);
17}17}
18 18
19static int crypto_blake2s_final_arm(struct shash_desc *desc, u8 *out)19static int crypto_blake2s_final_arm(struct shash_desc *desc, u8 *out)
20{20{
21 return crypto_blake2s_final(desc, out, blake2s_compress);21 return crypto_blake2s_final(desc, out, false);
22}22}
23 23
24#define BLAKE2S_ALG(name, driver_name, digest_size) \24#define BLAKE2S_ALG(name, driver_name, digest_size) \
arch/arm/include/asm/assembler.h+2−0
@@ -288,6 +288,7 @@ · 287 unmodified lines
288 */288 */
289#define ALT_UP(instr...) \289#define ALT_UP(instr...) \
290 .pushsection ".alt.smp.init", "a" ;\290 .pushsection ".alt.smp.init", "a" ;\
291 .align 2 ;\
291 .long 9998b - . ;\292 .long 9998b - . ;\
2929997: instr ;\2939997: instr ;\
293 .if . - 9997b == 2 ;\294 .if . - 9997b == 2 ;\
@@ -299,6 +300,7 @@ · 5 unmodified lines
299 .popsection300 .popsection
300#define ALT_UP_B(label) \301#define ALT_UP_B(label) \
301 .pushsection ".alt.smp.init", "a" ;\302 .pushsection ".alt.smp.init", "a" ;\
303 .align 2 ;\
302 .long 9998b - . ;\304 .long 9998b - . ;\
303 W(b) . + (label - 9998b) ;\305 W(b) . + (label - 9998b) ;\
304 .popsection306 .popsection
arch/arm/include/asm/processor.h+1−0
@@ -96,6 +96,7 @@ unsigned long __get_wchan(struct task_struct *p); · 95 unmodified lines
96#define __ALT_SMP_ASM(smp, up) \96#define __ALT_SMP_ASM(smp, up) \
97 "9998: " smp "\n" \97 "9998: " smp "\n" \
98 " .pushsection \".alt.smp.init\", \"a\"\n" \98 " .pushsection \".alt.smp.init\", \"a\"\n" \
99 " .align 2\n" \
99 " .long 9998b - .\n" \100 " .long 9998b - .\n" \
100 " " up "\n" \101 " " up "\n" \
101 " .popsection\n"102 " .popsection\n"
arch/arm/include/asm/uaccess.h+8−2
@@ -11,6 +11,7 @@ · 10 unmodified lines
11#include <linux/string.h>11#include <linux/string.h>
12#include <asm/memory.h>12#include <asm/memory.h>
13#include <asm/domain.h>13#include <asm/domain.h>
14#include <asm/unaligned.h>
14#include <asm/unified.h>15#include <asm/unified.h>
15#include <asm/compiler.h>16#include <asm/compiler.h>
16 17
@@ -497,7 +498,10 @@ do { \ · 480 unmodified lines
497 } \498 } \
498 default: __err = __get_user_bad(); break; \499 default: __err = __get_user_bad(); break; \
499 } \500 } \
500 *(type *)(dst) = __val; \501 if (IS_ENABLED(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS)) \
502 put_unaligned(__val, (type *)(dst)); \
503 else \
504 *(type *)(dst) = __val; /* aligned by caller */ \
501 if (__err) \505 if (__err) \
502 goto err_label; \506 goto err_label; \
503} while (0)507} while (0)
@@ -507,7 +511,9 @@ do { \ · 3 unmodified lines
507 const type *__pk_ptr = (dst); \511 const type *__pk_ptr = (dst); \
508 unsigned long __dst = (unsigned long)__pk_ptr; \512 unsigned long __dst = (unsigned long)__pk_ptr; \
509 int __err = 0; \513 int __err = 0; \
510 type __val = *(type *)src; \514 type __val = IS_ENABLED(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS) \
515 ? get_unaligned((type *)(src)) \
516 : *(type *)(src); /* aligned by caller */ \
511 switch (sizeof(type)) { \517 switch (sizeof(type)) { \
512 case 1: __put_user_asm_byte(__val, __dst, __err, ""); break; \518 case 1: __put_user_asm_byte(__val, __dst, __err, ""); break; \
513 case 2: __put_user_asm_half(__val, __dst, __err, ""); break; \519 case 2: __put_user_asm_half(__val, __dst, __err, ""); break; \
arch/arm/mach-omap2/display.c+1−1
@@ -263,9 +263,9 @@ static int __init omapdss_init_of(void) · 262 unmodified lines
263 }263 }
264 264
265 r = of_platform_populate(node, NULL, NULL, &pdev->dev);265 r = of_platform_populate(node, NULL, NULL, &pdev->dev);
266 put_device(&pdev->dev);
266 if (r) {267 if (r) {
267 pr_err("Unable to populate DSS submodule devices\n");268 pr_err("Unable to populate DSS submodule devices\n");
268 put_device(&pdev->dev);
269 return r;269 return r;
270 }270 }
271 271
arch/arm/mach-omap2/omap_hwmod.c+3−1
@@ -752,8 +752,10 @@ static int __init _init_clkctrl_providers(void) · 751 unmodified lines
752 752
753 for_each_matching_node(np, ti_clkctrl_match_table) {753 for_each_matching_node(np, ti_clkctrl_match_table) {
754 ret = _setup_clkctrl_provider(np);754 ret = _setup_clkctrl_provider(np);
755 if (ret)755 if (ret) {
756 of_node_put(np);
756 break;757 break;
758 }
757 }759 }
758 760
759 return ret;761 return ret;
arch/arm/mach-socfpga/Kconfig+2−0
@@ -2,6 +2,7 @@ · 1 unmodified line
2menuconfig ARCH_INTEL_SOCFPGA2menuconfig ARCH_INTEL_SOCFPGA
3 bool "Altera SOCFPGA family"3 bool "Altera SOCFPGA family"
4 depends on ARCH_MULTI_V74 depends on ARCH_MULTI_V7
5 select ARCH_HAS_RESET_CONTROLLER
5 select ARCH_SUPPORTS_BIG_ENDIAN6 select ARCH_SUPPORTS_BIG_ENDIAN
6 select ARM_AMBA7 select ARM_AMBA
7 select ARM_GIC8 select ARM_GIC
@@ -18,6 +19,7 @@ menuconfig ARCH_INTEL_SOCFPGA · 10 unmodified lines
18 select PL310_ERRATA_72791519 select PL310_ERRATA_727915
19 select PL310_ERRATA_753970 if PL31020 select PL310_ERRATA_753970 if PL310
20 select PL310_ERRATA_76941921 select PL310_ERRATA_769419
22 select RESET_CONTROLLER
21 23
22if ARCH_INTEL_SOCFPGA24if ARCH_INTEL_SOCFPGA
23config SOCFPGA_SUSPEND25config SOCFPGA_SUSPEND
arch/arm/probes/kprobes/Makefile+3−0
@@ -1,4 +1,7 @@
1# SPDX-License-Identifier: GPL-2.01# SPDX-License-Identifier: GPL-2.0
2KASAN_SANITIZE_actions-common.o := n
3KASAN_SANITIZE_actions-arm.o := n
4KASAN_SANITIZE_actions-thumb.o := n
2obj-$(CONFIG_KPROBES) += core.o actions-common.o checkers-common.o5obj-$(CONFIG_KPROBES) += core.o actions-common.o checkers-common.o
3obj-$(CONFIG_ARM_KPROBES_TEST) += test-kprobes.o6obj-$(CONFIG_ARM_KPROBES_TEST) += test-kprobes.o
4test-kprobes-objs := test-core.o7test-kprobes-objs := test-core.o
arch/arm64/Kconfig+92−6
@@ -671,15 +671,42 @@ config ARM64_ERRATUM_1508412 · 670 unmodified lines
671config ARM64_WORKAROUND_TRBE_OVERWRITE_FILL_MODE671config ARM64_WORKAROUND_TRBE_OVERWRITE_FILL_MODE
672 bool672 bool
673 673
674config ARM64_ERRATUM_2051678
675 bool "Cortex-A510: 2051678: disable Hardware Update of the page table dirty bit"
676 default y
677 help
678 This options adds the workaround for ARM Cortex-A510 erratum ARM64_ERRATUM_2051678.
679 Affected Coretex-A510 might not respect the ordering rules for
680 hardware update of the page table's dirty bit. The workaround
681 is to not enable the feature on affected CPUs.
682
683 If unsure, say Y.
684
685config ARM64_ERRATUM_2077057
686 bool "Cortex-A510: 2077057: workaround software-step corrupting SPSR_EL2"
687 help
688 This option adds the workaround for ARM Cortex-A510 erratum 2077057.
689 Affected Cortex-A510 may corrupt SPSR_EL2 when the a step exception is
690 expected, but a Pointer Authentication trap is taken instead. The
691 erratum causes SPSR_EL1 to be copied to SPSR_EL2, which could allow
692 EL1 to cause a return to EL2 with a guest controlled ELR_EL2.
693
694 This can only happen when EL2 is stepping EL1.
695
696 When these conditions occur, the SPSR_EL2 value is unchanged from the
697 previous guest entry, and can be restored from the in-memory copy.
698
699 If unsure, say Y.
700
674config ARM64_ERRATUM_2119858701config ARM64_ERRATUM_2119858
675 bool "Cortex-A710: 2119858: workaround TRBE overwriting trace data in FILL mode"702 bool "Cortex-A710/X2: 2119858: workaround TRBE overwriting trace data in FILL mode"
676 default y703 default y
677 depends on CORESIGHT_TRBE704 depends on CORESIGHT_TRBE
678 select ARM64_WORKAROUND_TRBE_OVERWRITE_FILL_MODE705 select ARM64_WORKAROUND_TRBE_OVERWRITE_FILL_MODE
679 help706 help
680 This option adds the workaround for ARM Cortex-A710 erratum 2119858.707 This option adds the workaround for ARM Cortex-A710/X2 erratum 2119858.
681 708
682 Affected Cortex-A710 cores could overwrite up to 3 cache lines of trace709 Affected Cortex-A710/X2 cores could overwrite up to 3 cache lines of trace
683 data at the base of the buffer (pointed to by TRBASER_EL1) in FILL mode in710 data at the base of the buffer (pointed to by TRBASER_EL1) in FILL mode in
684 the event of a WRAP event.711 the event of a WRAP event.
685 712
@@ -762,14 +789,14 @@ config ARM64_ERRATUM_2253138 · 76 unmodified lines
762 If unsure, say Y.789 If unsure, say Y.
763 790
764config ARM64_ERRATUM_2224489791config ARM64_ERRATUM_2224489
765 bool "Cortex-A710: 2224489: workaround TRBE writing to address out-of-range"792 bool "Cortex-A710/X2: 2224489: workaround TRBE writing to address out-of-range"
766 depends on CORESIGHT_TRBE793 depends on CORESIGHT_TRBE
767 default y794 default y
768 select ARM64_WORKAROUND_TRBE_WRITE_OUT_OF_RANGE795 select ARM64_WORKAROUND_TRBE_WRITE_OUT_OF_RANGE
769 help796 help
770 This option adds the workaround for ARM Cortex-A710 erratum 2224489.797 This option adds the workaround for ARM Cortex-A710/X2 erratum 2224489.
771 798
772 Affected Cortex-A710 cores might write to an out-of-range address, not reserved799 Affected Cortex-A710/X2 cores might write to an out-of-range address, not reserved
773 for TRBE. Under some conditions, the TRBE might generate a write to the next800 for TRBE. Under some conditions, the TRBE might generate a write to the next
774 virtually addressed page following the last page of the TRBE address space801 virtually addressed page following the last page of the TRBE address space
775 (i.e., the TRBLIMITR_EL1.LIMIT), instead of wrapping around to the base.802 (i.e., the TRBLIMITR_EL1.LIMIT), instead of wrapping around to the base.
@@ -779,6 +806,65 @@ config ARM64_ERRATUM_2224489 · 3 unmodified lines
779 806
780 If unsure, say Y.807 If unsure, say Y.
781 808
809config ARM64_ERRATUM_2064142
810 bool "Cortex-A510: 2064142: workaround TRBE register writes while disabled"
811 depends on COMPILE_TEST # Until the CoreSight TRBE driver changes are in
812 default y
813 help
814 This option adds the workaround for ARM Cortex-A510 erratum 2064142.
815
816 Affected Cortex-A510 core might fail to write into system registers after the
817 TRBE has been disabled. Under some conditions after the TRBE has been disabled
818 writes into TRBE registers TRBLIMITR_EL1, TRBPTR_EL1, TRBBASER_EL1, TRBSR_EL1,
819 and TRBTRG_EL1 will be ignored and will not be effected.
820
821 Work around this in the driver by executing TSB CSYNC and DSB after collection
822 is stopped and before performing a system register write to one of the affected
823 registers.
824
825 If unsure, say Y.
826
827config ARM64_ERRATUM_2038923
828 bool "Cortex-A510: 2038923: workaround TRBE corruption with enable"
829 depends on COMPILE_TEST # Until the CoreSight TRBE driver changes are in
830 default y
831 help
832 This option adds the workaround for ARM Cortex-A510 erratum 2038923.
833
834 Affected Cortex-A510 core might cause an inconsistent view on whether trace is
835 prohibited within the CPU. As a result, the trace buffer or trace buffer state
836 might be corrupted. This happens after TRBE buffer has been enabled by setting
837 TRBLIMITR_EL1.E, followed by just a single context synchronization event before
838 execution changes from a context, in which trace is prohibited to one where it
839 isn't, or vice versa. In these mentioned conditions, the view of whether trace
840 is prohibited is inconsistent between parts of the CPU, and the trace buffer or
841 the trace buffer state might be corrupted.
842
843 Work around this in the driver by preventing an inconsistent view of whether the
844 trace is prohibited or not based on TRBLIMITR_EL1.E by immediately following a
845 change to TRBLIMITR_EL1.E with at least one ISB instruction before an ERET, or
846 two ISB instructions if no ERET is to take place.
847
848 If unsure, say Y.
849
850config ARM64_ERRATUM_1902691
851 bool "Cortex-A510: 1902691: workaround TRBE trace corruption"
852 depends on COMPILE_TEST # Until the CoreSight TRBE driver changes are in
853 default y
854 help
855 This option adds the workaround for ARM Cortex-A510 erratum 1902691.
856
857 Affected Cortex-A510 core might cause trace data corruption, when being written
858 into the memory. Effectively TRBE is broken and hence cannot be used to capture
859 trace data.
860
861 Work around this problem in the driver by just preventing TRBE initialization on
862 affected cpus. The firmware must have disabled the access to TRBE for the kernel
863 on such implementations. This will cover the kernel for any firmware that doesn't
864 do this already.
865
866 If unsure, say Y.
867
782config CAVIUM_ERRATUM_22375868config CAVIUM_ERRATUM_22375
783 bool "Cavium erratum 22375, 24313"869 bool "Cavium erratum 22375, 24313"
784 default y870 default y
arch/arm64/Kconfig.platforms+0−3
@@ -309,9 +309,6 @@ config ARCH_VISCONTI · 308 unmodified lines
309 help309 help
310 This enables support for Toshiba Visconti SoCs Family.310 This enables support for Toshiba Visconti SoCs Family.
311 311
312config ARCH_VULCAN
313 def_bool n
314
315config ARCH_XGENE312config ARCH_XGENE
316 bool "AppliedMicro X-Gene SOC Family"313 bool "AppliedMicro X-Gene SOC Family"
317 help314 help
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi+6−0
@@ -107,6 +107,12 @@ · 106 unmodified lines
107 no-map;107 no-map;
108 };108 };
109 109
110 /* 32 MiB reserved for ARM Trusted Firmware (BL32) */
111 secmon_reserved_bl32: secmon@5300000 {
112 reg = <0x0 0x05300000 0x0 0x2000000>;
113 no-map;
114 };
115
110 linux,cma {116 linux,cma {
111 compatible = "shared-dma-pool";117 compatible = "shared-dma-pool";
112 reusable;118 reusable;
arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts+0−8
@@ -157,14 +157,6 @@ · 156 unmodified lines
157 regulator-always-on;157 regulator-always-on;
158 };158 };
159 159
160 reserved-memory {
161 /* TEE Reserved Memory */
162 bl32_reserved: bl32@5000000 {
163 reg = <0x0 0x05300000 0x0 0x2000000>;
164 no-map;
165 };
166 };
167
168 sdio_pwrseq: sdio-pwrseq {160 sdio_pwrseq: sdio-pwrseq {
169 compatible = "mmc-pwrseq-simple";161 compatible = "mmc-pwrseq-simple";
170 reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;162 reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi+2−2
@@ -17,7 +17,7 @@ · 16 unmodified lines
17 rtc1 = &vrtc;17 rtc1 = &vrtc;
18 };18 };
19 19
20 dioo2133: audio-amplifier-0 {20 dio2133: audio-amplifier-0 {
21 compatible = "simple-audio-amplifier";21 compatible = "simple-audio-amplifier";
22 enable-gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;22 enable-gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
23 VCC-supply = <&vcc_5v>;23 VCC-supply = <&vcc_5v>;
@@ -219,7 +219,7 @@ · 195 unmodified lines
219 audio-widgets = "Line", "Lineout";219 audio-widgets = "Line", "Lineout";
220 audio-aux-devs = <&tdmout_b>, <&tdmout_c>, <&tdmin_a>,220 audio-aux-devs = <&tdmout_b>, <&tdmout_c>, <&tdmin_a>,
221 <&tdmin_b>, <&tdmin_c>, <&tdmin_lb>,221 <&tdmin_b>, <&tdmin_c>, <&tdmin_lb>,
222 <&dioo2133>;222 <&dio2133>;
223 audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",223 audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
224 "TDMOUT_B IN 1", "FRDDR_B OUT 1",224 "TDMOUT_B IN 1", "FRDDR_B OUT 1",
225 "TDMOUT_B IN 2", "FRDDR_C OUT 1",225 "TDMOUT_B IN 2", "FRDDR_C OUT 1",
arch/arm64/boot/dts/amlogic/meson-gx.dtsi+6−0
@@ -49,6 +49,12 @@ · 48 unmodified lines
49 no-map;49 no-map;
50 };50 };
51 51
52 /* 32 MiB reserved for ARM Trusted Firmware (BL32) */
53 secmon_reserved_bl32: secmon@5300000 {
54 reg = <0x0 0x05300000 0x0 0x2000000>;
55 no-map;
56 };
57
52 linux,cma {58 linux,cma {
53 compatible = "shared-dma-pool";59 compatible = "shared-dma-pool";
54 reusable;60 reusable;
arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m5.dts+1−1
@@ -123,7 +123,7 @@ · 122 unmodified lines
123 regulator-min-microvolt = <1800000>;123 regulator-min-microvolt = <1800000>;
124 regulator-max-microvolt = <3300000>;124 regulator-max-microvolt = <3300000>;
125 125
126 enable-gpio = <&gpio GPIOE_2 GPIO_ACTIVE_HIGH>;126 enable-gpio = <&gpio_ao GPIOE_2 GPIO_ACTIVE_HIGH>;
127 enable-active-high;127 enable-active-high;
128 regulator-always-on;128 regulator-always-on;
129 129
arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi+1−1
@@ -48,7 +48,7 @@ · 47 unmodified lines
48 regulator-max-microvolt = <3300000>;48 regulator-max-microvolt = <3300000>;
49 vin-supply = <&vcc_5v>;49 vin-supply = <&vcc_5v>;
50 50
51 enable-gpio = <&gpio GPIOE_2 GPIO_ACTIVE_HIGH>;51 enable-gpio = <&gpio_ao GPIOE_2 GPIO_OPEN_DRAIN>;
52 enable-active-high;52 enable-active-high;
53 regulator-always-on;53 regulator-always-on;
54 54
arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts+0−8
@@ -203,14 +203,6 @@ · 202 unmodified lines
203 regulator-always-on;203 regulator-always-on;
204 };204 };
205 205
206 reserved-memory {
207 /* TEE Reserved Memory */
208 bl32_reserved: bl32@5000000 {
209 reg = <0x0 0x05300000 0x0 0x2000000>;
210 no-map;
211 };
212 };
213
214 sdio_pwrseq: sdio-pwrseq {206 sdio_pwrseq: sdio-pwrseq {
215 compatible = "mmc-pwrseq-simple";207 compatible = "mmc-pwrseq-simple";
216 reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;208 reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dts+4−0
@@ -157,6 +157,10 @@ · 156 unmodified lines
157 };157 };
158};158};
159 159
160&ftm_alarm0 {
161 status = "okay";
162};
163
160&gpio1 {164&gpio1 {
161 gpio-line-names =165 gpio-line-names =
162 "", "", "", "", "", "", "", "",166 "", "", "", "", "", "", "", "",
arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi+2−2
@@ -1115,8 +1115,8 @@ · 1114 unmodified lines
1115 status = "okay";1115 status = "okay";
1116 1116
1117 ports {1117 ports {
1118 port@1 {1118 port@0 {
1119 reg = <1>;1119 reg = <0>;
1120 1120
1121 mipi1_sensor_ep: endpoint {1121 mipi1_sensor_ep: endpoint {
1122 remote-endpoint = <&camera1_ep>;1122 remote-endpoint = <&camera1_ep>;
arch/arm64/boot/dts/freescale/imx8mq.dtsi+5−5
@@ -554,7 +554,7 @@ · 553 unmodified lines
554 assigned-clock-rates = <0>, <0>, <0>, <594000000>;554 assigned-clock-rates = <0>, <0>, <0>, <594000000>;
555 status = "disabled";555 status = "disabled";
556 556
557 port@0 {557 port {
558 lcdif_mipi_dsi: endpoint {558 lcdif_mipi_dsi: endpoint {
559 remote-endpoint = <&mipi_dsi_lcdif_in>;559 remote-endpoint = <&mipi_dsi_lcdif_in>;
560 };560 };
@@ -1151,8 +1151,8 @@ · 590 unmodified lines
1151 #address-cells = <1>;1151 #address-cells = <1>;
1152 #size-cells = <0>;1152 #size-cells = <0>;
1153 1153
1154 port@0 {1154 port@1 {
1155 reg = <0>;1155 reg = <1>;
1156 1156
1157 csi1_mipi_ep: endpoint {1157 csi1_mipi_ep: endpoint {
1158 remote-endpoint = <&csi1_ep>;1158 remote-endpoint = <&csi1_ep>;
@@ -1203,8 +1203,8 @@ · 44 unmodified lines
1203 #address-cells = <1>;1203 #address-cells = <1>;
1204 #size-cells = <0>;1204 #size-cells = <0>;
1205 1205
1206 port@0 {1206 port@1 {
1207 reg = <0>;1207 reg = <1>;
1208 1208
1209 csi2_mipi_ep: endpoint {1209 csi2_mipi_ep: endpoint {
1210 remote-endpoint = <&csi2_ep>;1210 remote-endpoint = <&csi2_ep>;
arch/arm64/boot/dts/freescale/mba8mx.dtsi+1−1
@@ -91,7 +91,7 @@ · 90 unmodified lines
91 91
92 sound {92 sound {
93 compatible = "fsl,imx-audio-tlv320aic32x4";93 compatible = "fsl,imx-audio-tlv320aic32x4";
94 model = "tqm-tlv320aic32";94 model = "imx-audio-tlv320aic32x4";
95 ssi-controller = <&sai3>;95 ssi-controller = <&sai3>;
96 audio-codec = <&tlv320aic3x04>;96 audio-codec = <&tlv320aic3x04>;
97 };97 };
arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts+12−2
@@ -15,8 +15,18 @@ · 14 unmodified lines
15 model = "Texas Instruments J721S2 EVM";15 model = "Texas Instruments J721S2 EVM";
16 16
17 chosen {17 chosen {
18 stdout-path = "serial10:115200n8";18 stdout-path = "serial2:115200n8";
19 bootargs = "console=ttyS10,115200n8 earlycon=ns16550a,mmio32,2880000";19 bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,2880000";
20 };
21
22 aliases {
23 serial1 = &mcu_uart0;
24 serial2 = &main_uart8;
25 mmc0 = &main_sdhci0;
26 mmc1 = &main_sdhci1;
27 can0 = &main_mcan16;
28 can1 = &mcu_mcan0;
29 can2 = &mcu_mcan1;
20 };30 };
21 31
22 evm_12v0: fixedregulator-evm12v0 {32 evm_12v0: fixedregulator-evm12v0 {
arch/arm64/boot/dts/ti/k3-j721s2.dtsi+0−22
@@ -21,28 +21,6 @@ · 20 unmodified lines
21 #address-cells = <2>;21 #address-cells = <2>;
22 #size-cells = <2>;22 #size-cells = <2>;
23 23
24 aliases {
25 serial0 = &wkup_uart0;
26 serial1 = &mcu_uart0;
27 serial2 = &main_uart0;
28 serial3 = &main_uart1;
29 serial4 = &main_uart2;
30 serial5 = &main_uart3;
31 serial6 = &main_uart4;
32 serial7 = &main_uart5;
33 serial8 = &main_uart6;
34 serial9 = &main_uart7;
35 serial10 = &main_uart8;
36 serial11 = &main_uart9;
37 mmc0 = &main_sdhci0;
38 mmc1 = &main_sdhci1;
39 can0 = &main_mcan16;
40 can1 = &mcu_mcan0;
41 can2 = &mcu_mcan1;
42 can3 = &main_mcan3;
43 can4 = &main_mcan5;
44 };
45
46 chosen { };24 chosen { };
47 25
48 cpus {26 cpus {
arch/arm64/include/asm/cputype.h+4−0
@@ -73,7 +73,9 @@ · 72 unmodified lines
73#define ARM_CPU_PART_CORTEX_A76 0xD0B73#define ARM_CPU_PART_CORTEX_A76 0xD0B
74#define ARM_CPU_PART_NEOVERSE_N1 0xD0C74#define ARM_CPU_PART_NEOVERSE_N1 0xD0C
75#define ARM_CPU_PART_CORTEX_A77 0xD0D75#define ARM_CPU_PART_CORTEX_A77 0xD0D
76#define ARM_CPU_PART_CORTEX_A510 0xD46
76#define ARM_CPU_PART_CORTEX_A710 0xD4777#define ARM_CPU_PART_CORTEX_A710 0xD47
78#define ARM_CPU_PART_CORTEX_X2 0xD48
77#define ARM_CPU_PART_NEOVERSE_N2 0xD4979#define ARM_CPU_PART_NEOVERSE_N2 0xD49
78 80
79#define APM_CPU_PART_POTENZA 0x00081#define APM_CPU_PART_POTENZA 0x000
@@ -115,7 +117,9 @@ · 35 unmodified lines
115#define MIDR_CORTEX_A76 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A76)117#define MIDR_CORTEX_A76 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A76)
116#define MIDR_NEOVERSE_N1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N1)118#define MIDR_NEOVERSE_N1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N1)
117#define MIDR_CORTEX_A77 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A77)119#define MIDR_CORTEX_A77 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A77)
120#define MIDR_CORTEX_A510 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A510)
118#define MIDR_CORTEX_A710 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A710)121#define MIDR_CORTEX_A710 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A710)
122#define MIDR_CORTEX_X2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X2)
119#define MIDR_NEOVERSE_N2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N2)123#define MIDR_NEOVERSE_N2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N2)
120#define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)124#define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)
121#define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)125#define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)
arch/arm64/include/asm/el2_setup.h+1−1
@@ -106,7 +106,7 @@ · 105 unmodified lines
106 msr_s SYS_ICC_SRE_EL2, x0106 msr_s SYS_ICC_SRE_EL2, x0
107 isb // Make sure SRE is now set107 isb // Make sure SRE is now set
108 mrs_s x0, SYS_ICC_SRE_EL2 // Read SRE back,108 mrs_s x0, SYS_ICC_SRE_EL2 // Read SRE back,
109 tbz x0, #0, 1f // and check that it sticks109 tbz x0, #0, .Lskip_gicv3_\@ // and check that it sticks
110 msr_s SYS_ICH_HCR_EL2, xzr // Reset ICC_HCR_EL2 to defaults110 msr_s SYS_ICH_HCR_EL2, xzr // Reset ICC_HCR_EL2 to defaults
111.Lskip_gicv3_\@:111.Lskip_gicv3_\@:
112.endm112.endm
arch/arm64/kernel/cpu_errata.c+37−0
@@ -347,6 +347,7 @@ static const struct midr_range trbe_overwrite_fill_mode_cpus[] = { · 346 unmodified lines
347#endif347#endif
348#ifdef CONFIG_ARM64_ERRATUM_2119858348#ifdef CONFIG_ARM64_ERRATUM_2119858
349 MIDR_ALL_VERSIONS(MIDR_CORTEX_A710),349 MIDR_ALL_VERSIONS(MIDR_CORTEX_A710),
350 MIDR_RANGE(MIDR_CORTEX_X2, 0, 0, 2, 0),
350#endif351#endif
351 {},352 {},
352};353};
@@ -371,6 +372,7 @@ static struct midr_range trbe_write_out_of_range_cpus[] = { · 18 unmodified lines
371#endif372#endif
372#ifdef CONFIG_ARM64_ERRATUM_2224489373#ifdef CONFIG_ARM64_ERRATUM_2224489
373 MIDR_ALL_VERSIONS(MIDR_CORTEX_A710),374 MIDR_ALL_VERSIONS(MIDR_CORTEX_A710),
375 MIDR_RANGE(MIDR_CORTEX_X2, 0, 0, 2, 0),
374#endif376#endif
375 {},377 {},
376};378};
@@ -597,6 +599,41 @@ const struct arm64_cpu_capabilities arm64_errata[] = { · 220 unmodified lines
597 .type = ARM64_CPUCAP_WEAK_LOCAL_CPU_FEATURE,599 .type = ARM64_CPUCAP_WEAK_LOCAL_CPU_FEATURE,
598 CAP_MIDR_RANGE_LIST(trbe_write_out_of_range_cpus),600 CAP_MIDR_RANGE_LIST(trbe_write_out_of_range_cpus),
599 },601 },
602#endif
603#ifdef CONFIG_ARM64_ERRATUM_2077057
604 {
605 .desc = "ARM erratum 2077057",
606 .capability = ARM64_WORKAROUND_2077057,
607 .type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM,
608 ERRATA_MIDR_REV_RANGE(MIDR_CORTEX_A510, 0, 0, 2),
609 },
610#endif
611#ifdef CONFIG_ARM64_ERRATUM_2064142
612 {
613 .desc = "ARM erratum 2064142",
614 .capability = ARM64_WORKAROUND_2064142,
615
616 /* Cortex-A510 r0p0 - r0p2 */
617 ERRATA_MIDR_REV_RANGE(MIDR_CORTEX_A510, 0, 0, 2)
618 },
619#endif
620#ifdef CONFIG_ARM64_ERRATUM_2038923
621 {
622 .desc = "ARM erratum 2038923",
623 .capability = ARM64_WORKAROUND_2038923,
624
625 /* Cortex-A510 r0p0 - r0p2 */
626 ERRATA_MIDR_REV_RANGE(MIDR_CORTEX_A510, 0, 0, 2)
627 },
628#endif
629#ifdef CONFIG_ARM64_ERRATUM_1902691
630 {
631 .desc = "ARM erratum 1902691",
632 .capability = ARM64_WORKAROUND_1902691,
633
634 /* Cortex-A510 r0p0 - r0p1 */
635 ERRATA_MIDR_REV_RANGE(MIDR_CORTEX_A510, 0, 0, 1)
636 },
600#endif637#endif
601 {638 {
602 }639 }
arch/arm64/kernel/cpufeature.c+3−0
@@ -1645,6 +1645,9 @@ static bool cpu_has_broken_dbm(void) · 1644 unmodified lines
1645 MIDR_ALL_VERSIONS(MIDR_CORTEX_A55),1645 MIDR_ALL_VERSIONS(MIDR_CORTEX_A55),
1646 /* Kryo4xx Silver (rdpe => r1p0) */1646 /* Kryo4xx Silver (rdpe => r1p0) */
1647 MIDR_REV(MIDR_QCOM_KRYO_4XX_SILVER, 0xd, 0xe),1647 MIDR_REV(MIDR_QCOM_KRYO_4XX_SILVER, 0xd, 0xe),
1648#endif
1649#ifdef CONFIG_ARM64_ERRATUM_2051678
1650 MIDR_REV_RANGE(MIDR_CORTEX_A510, 0, 0, 2),
1648#endif1651#endif
1649 {},1652 {},
1650 };1653 };
arch/arm64/kernel/stacktrace.c+3−2
@@ -33,8 +33,8 @@ · 32 unmodified lines
33 */33 */
34 34
35 35
36static void start_backtrace(struct stackframe *frame, unsigned long fp,36static notrace void start_backtrace(struct stackframe *frame, unsigned long fp,
37 unsigned long pc)37 unsigned long pc)
38{38{
39 frame->fp = fp;39 frame->fp = fp;
40 frame->pc = pc;40 frame->pc = pc;
@@ -55,6 +55,7 @@ static void start_backtrace(struct stackframe *frame, unsigned long fp, · 14 unmodified lines
55 frame->prev_fp = 0;55 frame->prev_fp = 0;
56 frame->prev_type = STACK_TYPE_UNKNOWN;56 frame->prev_type = STACK_TYPE_UNKNOWN;
57}57}
58NOKPROBE_SYMBOL(start_backtrace);
58 59
59/*60/*
60 * Unwind from one frame record (A) to the next frame record (B).61 * Unwind from one frame record (A) to the next frame record (B).
arch/arm64/kernel/vdso/Makefile+4−1
@@ -29,8 +29,11 @@ ldflags-y := -shared -soname=linux-vdso.so.1 --hash-style=sysv \ · 28 unmodified lines
29ccflags-y := -fno-common -fno-builtin -fno-stack-protector -ffixed-x1829ccflags-y := -fno-common -fno-builtin -fno-stack-protector -ffixed-x18
30ccflags-y += -DDISABLE_BRANCH_PROFILING -DBUILD_VDSO30ccflags-y += -DDISABLE_BRANCH_PROFILING -DBUILD_VDSO
31 31
32# -Wmissing-prototypes and -Wmissing-declarations are removed from
33# the CFLAGS of vgettimeofday.c to make possible to build the
34# kernel with CONFIG_WERROR enabled.
32CFLAGS_REMOVE_vgettimeofday.o = $(CC_FLAGS_FTRACE) -Os $(CC_FLAGS_SCS) $(GCC_PLUGINS_CFLAGS) \35CFLAGS_REMOVE_vgettimeofday.o = $(CC_FLAGS_FTRACE) -Os $(CC_FLAGS_SCS) $(GCC_PLUGINS_CFLAGS) \
33 $(CC_FLAGS_LTO)36 $(CC_FLAGS_LTO) -Wmissing-prototypes -Wmissing-declarations
34KASAN_SANITIZE := n37KASAN_SANITIZE := n
35KCSAN_SANITIZE := n38KCSAN_SANITIZE := n
36UBSAN_SANITIZE := n39UBSAN_SANITIZE := n
arch/arm64/kvm/arm.c+33−18
@@ -797,6 +797,24 @@ static bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu, int *ret) · 796 unmodified lines
797 xfer_to_guest_mode_work_pending();797 xfer_to_guest_mode_work_pending();
798}798}
799 799
800/*
801 * Actually run the vCPU, entering an RCU extended quiescent state (EQS) while
802 * the vCPU is running.
803 *
804 * This must be noinstr as instrumentation may make use of RCU, and this is not
805 * safe during the EQS.
806 */
807static int noinstr kvm_arm_vcpu_enter_exit(struct kvm_vcpu *vcpu)
808{
809 int ret;
810
811 guest_state_enter_irqoff();
812 ret = kvm_call_hyp_ret(__kvm_vcpu_run, vcpu);
813 guest_state_exit_irqoff();
814
815 return ret;
816}
817
800/**818/**
801 * kvm_arch_vcpu_ioctl_run - the main VCPU run function to execute guest code819 * kvm_arch_vcpu_ioctl_run - the main VCPU run function to execute guest code
802 * @vcpu: The VCPU pointer820 * @vcpu: The VCPU pointer
@@ -881,9 +899,9 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) · 78 unmodified lines
881 * Enter the guest899 * Enter the guest
882 */900 */
883 trace_kvm_entry(*vcpu_pc(vcpu));901 trace_kvm_entry(*vcpu_pc(vcpu));
884 guest_enter_irqoff();902 guest_timing_enter_irqoff();
885 903
886 ret = kvm_call_hyp_ret(__kvm_vcpu_run, vcpu);904 ret = kvm_arm_vcpu_enter_exit(vcpu);
887 905
888 vcpu->mode = OUTSIDE_GUEST_MODE;906 vcpu->mode = OUTSIDE_GUEST_MODE;
889 vcpu->stat.exits++;907 vcpu->stat.exits++;
@@ -918,26 +936,23 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) · 28 unmodified lines
918 kvm_arch_vcpu_ctxsync_fp(vcpu);936 kvm_arch_vcpu_ctxsync_fp(vcpu);
919 937
920 /*938 /*
921 * We may have taken a host interrupt in HYP mode (ie939 * We must ensure that any pending interrupts are taken before
922 * while executing the guest). This interrupt is still940 * we exit guest timing so that timer ticks are accounted as
923 * pending, as we haven't serviced it yet!941 * guest time. Transiently unmask interrupts so that any
942 * pending interrupts are taken.
924 *943 *
925 * We're now back in SVC mode, with interrupts944 * Per ARM DDI 0487G.b section D1.13.4, an ISB (or other
926 * disabled. Enabling the interrupts now will have945 * context synchronization event) is necessary to ensure that
927 * the effect of taking the interrupt again, in SVC946 * pending interrupts are taken.
928 * mode this time.
929 */947 */
930 local_irq_enable();948 local_irq_enable();
949 isb();
950 local_irq_disable();
951
952 guest_timing_exit_irqoff();
953
954 local_irq_enable();
931 955
932 /*
933 * We do local_irq_enable() before calling guest_exit() so
934 * that if a timer interrupt hits while running the guest we
935 * account that tick as being spent in the guest. We enable
936 * preemption after calling guest_exit() so that if we get
937 * preempted we make sure ticks after that is not counted as
938 * guest time.
939 */
940 guest_exit();
941 trace_kvm_exit(ret, kvm_vcpu_trap_get_class(vcpu), *vcpu_pc(vcpu));956 trace_kvm_exit(ret, kvm_vcpu_trap_get_class(vcpu), *vcpu_pc(vcpu));
942 957
943 /* Exit types that need handling before we can be preempted */958 /* Exit types that need handling before we can be preempted */
arch/arm64/kvm/handle_exit.c+8−0
@@ -228,6 +228,14 @@ int handle_exit(struct kvm_vcpu *vcpu, int exception_index) · 227 unmodified lines
228{228{
229 struct kvm_run *run = vcpu->run;229 struct kvm_run *run = vcpu->run;
230 230
231 if (ARM_SERROR_PENDING(exception_index)) {
232 /*
233 * The SError is handled by handle_exit_early(). If the guest
234 * survives it will re-execute the original instruction.
235 */
236 return 1;
237 }
238
231 exception_index = ARM_EXCEPTION_CODE(exception_index);239 exception_index = ARM_EXCEPTION_CODE(exception_index);
232 240
233 switch (exception_index) {241 switch (exception_index) {
arch/arm64/kvm/hyp/exception.c+4−1
@@ -38,7 +38,10 @@ static inline void __vcpu_write_sys_reg(struct kvm_vcpu *vcpu, u64 val, int reg) · 37 unmodified lines
38 38
39static void __vcpu_write_spsr(struct kvm_vcpu *vcpu, u64 val)39static void __vcpu_write_spsr(struct kvm_vcpu *vcpu, u64 val)
40{40{
41 write_sysreg_el1(val, SYS_SPSR);41 if (has_vhe())
42 write_sysreg_el1(val, SYS_SPSR);
43 else
44 __vcpu_sys_reg(vcpu, SPSR_EL1) = val;
42}45}
43 46
44static void __vcpu_write_spsr_abt(struct kvm_vcpu *vcpu, u64 val)47static void __vcpu_write_spsr_abt(struct kvm_vcpu *vcpu, u64 val)
arch/arm64/kvm/hyp/include/hyp/switch.h+21−2
@@ -402,6 +402,24 @@ static inline bool kvm_hyp_handle_exit(struct kvm_vcpu *vcpu, u64 *exit_code) · 401 unmodified lines
402 return false;402 return false;
403}403}
404 404
405static inline void synchronize_vcpu_pstate(struct kvm_vcpu *vcpu, u64 *exit_code)
406{
407 /*
408 * Check for the conditions of Cortex-A510's #2077057. When these occur
409 * SPSR_EL2 can't be trusted, but isn't needed either as it is
410 * unchanged from the value in vcpu_gp_regs(vcpu)->pstate.
411 * Are we single-stepping the guest, and took a PAC exception from the
412 * active-not-pending state?
413 */
414 if (cpus_have_final_cap(ARM64_WORKAROUND_2077057) &&
415 vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
416 *vcpu_cpsr(vcpu) & DBG_SPSR_SS &&
417 ESR_ELx_EC(read_sysreg_el2(SYS_ESR)) == ESR_ELx_EC_PAC)
418 write_sysreg_el2(*vcpu_cpsr(vcpu), SYS_SPSR);
419
420 vcpu->arch.ctxt.regs.pstate = read_sysreg_el2(SYS_SPSR);
421}
422
405/*423/*
406 * Return true when we were able to fixup the guest exit and should return to424 * Return true when we were able to fixup the guest exit and should return to
407 * the guest, false when we should restore the host state and return to the425 * the guest, false when we should restore the host state and return to the
@@ -413,7 +431,7 @@ static inline bool fixup_guest_exit(struct kvm_vcpu *vcpu, u64 *exit_code) · 5 unmodified lines
413 * Save PSTATE early so that we can evaluate the vcpu mode431 * Save PSTATE early so that we can evaluate the vcpu mode
414 * early on.432 * early on.
415 */433 */
416 vcpu->arch.ctxt.regs.pstate = read_sysreg_el2(SYS_SPSR);434 synchronize_vcpu_pstate(vcpu, exit_code);
417 435
418 /*436 /*
419 * Check whether we want to repaint the state one way or437 * Check whether we want to repaint the state one way or
@@ -424,7 +442,8 @@ static inline bool fixup_guest_exit(struct kvm_vcpu *vcpu, u64 *exit_code) · 4 unmodified lines
424 if (ARM_EXCEPTION_CODE(*exit_code) != ARM_EXCEPTION_IRQ)442 if (ARM_EXCEPTION_CODE(*exit_code) != ARM_EXCEPTION_IRQ)
425 vcpu->arch.fault.esr_el2 = read_sysreg_el2(SYS_ESR);443 vcpu->arch.fault.esr_el2 = read_sysreg_el2(SYS_ESR);
426 444
427 if (ARM_SERROR_PENDING(*exit_code)) {445 if (ARM_SERROR_PENDING(*exit_code) &&
446 ARM_EXCEPTION_CODE(*exit_code) != ARM_EXCEPTION_IRQ) {
428 u8 esr_ec = kvm_vcpu_trap_get_class(vcpu);447 u8 esr_ec = kvm_vcpu_trap_get_class(vcpu);
429 448
430 /*449 /*
arch/arm64/kvm/hyp/pgtable.c+6−12
@@ -983,13 +983,9 @@ static int stage2_unmap_walker(u64 addr, u64 end, u32 level, kvm_pte_t *ptep, · 982 unmodified lines
983 */983 */
984 stage2_put_pte(ptep, mmu, addr, level, mm_ops);984 stage2_put_pte(ptep, mmu, addr, level, mm_ops);
985 985
986 if (need_flush) {986 if (need_flush && mm_ops->dcache_clean_inval_poc)
987 kvm_pte_t *pte_follow = kvm_pte_follow(pte, mm_ops);987 mm_ops->dcache_clean_inval_poc(kvm_pte_follow(pte, mm_ops),
988 988 kvm_granule_size(level));
989 dcache_clean_inval_poc((unsigned long)pte_follow,
990 (unsigned long)pte_follow +
991 kvm_granule_size(level));
992 }
993 989
994 if (childp)990 if (childp)
995 mm_ops->put_page(childp);991 mm_ops->put_page(childp);
@@ -1151,15 +1147,13 @@ static int stage2_flush_walker(u64 addr, u64 end, u32 level, kvm_pte_t *ptep, · 155 unmodified lines
1151 struct kvm_pgtable *pgt = arg;1147 struct kvm_pgtable *pgt = arg;
1152 struct kvm_pgtable_mm_ops *mm_ops = pgt->mm_ops;1148 struct kvm_pgtable_mm_ops *mm_ops = pgt->mm_ops;
1153 kvm_pte_t pte = *ptep;1149 kvm_pte_t pte = *ptep;
1154 kvm_pte_t *pte_follow;
1155 1150
1156 if (!kvm_pte_valid(pte) || !stage2_pte_cacheable(pgt, pte))1151 if (!kvm_pte_valid(pte) || !stage2_pte_cacheable(pgt, pte))
1157 return 0;1152 return 0;
1158 1153
1159 pte_follow = kvm_pte_follow(pte, mm_ops);1154 if (mm_ops->dcache_clean_inval_poc)
1160 dcache_clean_inval_poc((unsigned long)pte_follow,1155 mm_ops->dcache_clean_inval_poc(kvm_pte_follow(pte, mm_ops),
1161 (unsigned long)pte_follow +1156 kvm_granule_size(level));
1162 kvm_granule_size(level));
1163 return 0;1157 return 0;
1164}1158}
1165 1159
arch/arm64/kvm/hyp/vgic-v3-sr.c+3−0
@@ -983,6 +983,9 @@ static void __vgic_v3_read_ctlr(struct kvm_vcpu *vcpu, u32 vmcr, int rt) · 982 unmodified lines
983 val = ((vtr >> 29) & 7) << ICC_CTLR_EL1_PRI_BITS_SHIFT;983 val = ((vtr >> 29) & 7) << ICC_CTLR_EL1_PRI_BITS_SHIFT;
984 /* IDbits */984 /* IDbits */
985 val |= ((vtr >> 23) & 7) << ICC_CTLR_EL1_ID_BITS_SHIFT;985 val |= ((vtr >> 23) & 7) << ICC_CTLR_EL1_ID_BITS_SHIFT;
986 /* SEIS */
987 if (kvm_vgic_global_state.ich_vtr_el2 & ICH_VTR_SEIS_MASK)
988 val |= BIT(ICC_CTLR_EL1_SEIS_SHIFT);
986 /* A3V */989 /* A3V */
987 val |= ((vtr >> 21) & 1) << ICC_CTLR_EL1_A3V_SHIFT;990 val |= ((vtr >> 21) & 1) << ICC_CTLR_EL1_A3V_SHIFT;
988 /* EOImode */991 /* EOImode */
arch/arm64/kvm/vgic/vgic-mmio.c+2−0
@@ -248,6 +248,8 @@ unsigned long vgic_mmio_read_pending(struct kvm_vcpu *vcpu, · 247 unmodified lines
248 IRQCHIP_STATE_PENDING,248 IRQCHIP_STATE_PENDING,
249 &val);249 &val);
250 WARN_RATELIMIT(err, "IRQ %d", irq->host_irq);250 WARN_RATELIMIT(err, "IRQ %d", irq->host_irq);
251 } else if (vgic_irq_is_mapped_level(irq)) {
252 val = vgic_get_phys_line_level(irq);
251 } else {253 } else {
252 val = irq_is_pending(irq);254 val = irq_is_pending(irq);
253 }255 }
arch/arm64/kvm/vgic/vgic-v3.c+15−2
@@ -609,6 +609,18 @@ static int __init early_gicv4_enable(char *buf) · 608 unmodified lines
609}609}
610early_param("kvm-arm.vgic_v4_enable", early_gicv4_enable);610early_param("kvm-arm.vgic_v4_enable", early_gicv4_enable);
611 611
612static const struct midr_range broken_seis[] = {
613 MIDR_ALL_VERSIONS(MIDR_APPLE_M1_ICESTORM),
614 MIDR_ALL_VERSIONS(MIDR_APPLE_M1_FIRESTORM),
615 {},
616};
617
618static bool vgic_v3_broken_seis(void)
619{
620 return ((kvm_vgic_global_state.ich_vtr_el2 & ICH_VTR_SEIS_MASK) &&
621 is_midr_in_range_list(read_cpuid_id(), broken_seis));
622}
623
612/**624/**
613 * vgic_v3_probe - probe for a VGICv3 compatible interrupt controller625 * vgic_v3_probe - probe for a VGICv3 compatible interrupt controller
614 * @info: pointer to the GIC description626 * @info: pointer to the GIC description
@@ -676,9 +688,10 @@ int vgic_v3_probe(const struct gic_kvm_info *info) · 61 unmodified lines
676 group1_trap = true;688 group1_trap = true;
677 }689 }
678 690
679 if (kvm_vgic_global_state.ich_vtr_el2 & ICH_VTR_SEIS_MASK) {691 if (vgic_v3_broken_seis()) {
680 kvm_info("GICv3 with locally generated SEI\n");692 kvm_info("GICv3 with broken locally generated SEI\n");
681 693
694 kvm_vgic_global_state.ich_vtr_el2 &= ~ICH_VTR_SEIS_MASK;
682 group0_trap = true;695 group0_trap = true;
683 group1_trap = true;696 group1_trap = true;
684 if (ich_vtr_el2 & ICH_VTR_TDS_MASK)697 if (ich_vtr_el2 & ICH_VTR_TDS_MASK)
arch/arm64/mm/extable.c+2−2
@@ -40,8 +40,8 @@ static bool · 39 unmodified lines
40ex_handler_load_unaligned_zeropad(const struct exception_table_entry *ex,40ex_handler_load_unaligned_zeropad(const struct exception_table_entry *ex,
41 struct pt_regs *regs)41 struct pt_regs *regs)
42{42{
43 int reg_data = FIELD_GET(EX_DATA_REG_DATA, ex->type);43 int reg_data = FIELD_GET(EX_DATA_REG_DATA, ex->data);
44 int reg_addr = FIELD_GET(EX_DATA_REG_ADDR, ex->type);44 int reg_addr = FIELD_GET(EX_DATA_REG_ADDR, ex->data);
45 unsigned long data, addr, offset;45 unsigned long data, addr, offset;
46 46
47 addr = pt_regs_read_reg(regs, reg_addr);47 addr = pt_regs_read_reg(regs, reg_addr);
arch/arm64/tools/cpucaps+4−0
@@ -55,6 +55,10 @@ WORKAROUND_1418040 · 54 unmodified lines
55WORKAROUND_146322555WORKAROUND_1463225
56WORKAROUND_150841256WORKAROUND_1508412
57WORKAROUND_154241957WORKAROUND_1542419
58WORKAROUND_1902691
59WORKAROUND_2038923
60WORKAROUND_2064142
61WORKAROUND_2077057
58WORKAROUND_TRBE_OVERWRITE_FILL_MODE62WORKAROUND_TRBE_OVERWRITE_FILL_MODE
59WORKAROUND_TSB_FLUSH_FAILURE63WORKAROUND_TSB_FLUSH_FAILURE
60WORKAROUND_TRBE_WRITE_OUT_OF_RANGE64WORKAROUND_TRBE_WRITE_OUT_OF_RANGE
arch/ia64/Kconfig+1−1
@@ -318,7 +318,7 @@ config ARCH_PROC_KCORE_TEXT · 317 unmodified lines
318 depends on PROC_KCORE318 depends on PROC_KCORE
319 319
320config IA64_MCA_RECOVERY320config IA64_MCA_RECOVERY
321 tristate "MCA recovery from errors other than TLB."321 bool "MCA recovery from errors other than TLB."
322 322
323config IA64_PALINFO323config IA64_PALINFO
324 tristate "/proc/pal support"324 tristate "/proc/pal support"
arch/ia64/pci/fixup.c+2−2
@@ -76,5 +76,5 @@ static void pci_fixup_video(struct pci_dev *pdev) · 75 unmodified lines
76 }76 }
77 }77 }
78}78}
79DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_ANY_ID, PCI_ANY_ID,79DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_ANY_ID, PCI_ANY_ID,
80 PCI_CLASS_DISPLAY_VGA, 8, pci_fixup_video);80 PCI_CLASS_DISPLAY_VGA, 8, pci_fixup_video);
arch/mips/boot/dts/ingenic/ci20.dts+2−13
@@ -83,6 +83,8 @@ · 82 unmodified lines
83 label = "HDMI OUT";83 label = "HDMI OUT";
84 type = "a";84 type = "a";
85 85
86 ddc-en-gpios = <&gpa 25 GPIO_ACTIVE_HIGH>;
87
86 port {88 port {
87 hdmi_con: endpoint {89 hdmi_con: endpoint {
88 remote-endpoint = <&dw_hdmi_out>;90 remote-endpoint = <&dw_hdmi_out>;
@@ -114,17 +116,6 @@ · 25 unmodified lines
114 gpio = <&gpf 14 GPIO_ACTIVE_LOW>;116 gpio = <&gpf 14 GPIO_ACTIVE_LOW>;
115 enable-active-high;117 enable-active-high;
116 };118 };
117
118 hdmi_power: fixedregulator@3 {
119 compatible = "regulator-fixed";
120
121 regulator-name = "hdmi_power";
122 regulator-min-microvolt = <5000000>;
123 regulator-max-microvolt = <5000000>;
124
125 gpio = <&gpa 25 0>;
126 enable-active-high;
127 };
128};119};
129 120
130&ext {121&ext {
@@ -576,8 +567,6 @@ · 445 unmodified lines
576 pinctrl-names = "default";567 pinctrl-names = "default";
577 pinctrl-0 = <&pins_hdmi_ddc>;568 pinctrl-0 = <&pins_hdmi_ddc>;
578 569
579 hdmi-5v-supply = <&hdmi_power>;
580
581 ports {570 ports {
582 #address-cells = <1>;571 #address-cells = <1>;
583 #size-cells = <0>;572 #size-cells = <0>;
arch/mips/cavium-octeon/octeon-memcpy.S+1−1
@@ -74,7 +74,7 @@ · 73 unmodified lines
74#define EXC(inst_reg,addr,handler) \74#define EXC(inst_reg,addr,handler) \
759: inst_reg, addr; \759: inst_reg, addr; \
76 .section __ex_table,"a"; \76 .section __ex_table,"a"; \
77 PTR 9b, handler; \77 PTR_WD 9b, handler; \
78 .previous78 .previous
79 79
80/*80/*
arch/mips/include/asm/asm.h+2−2
@@ -285,7 +285,7 @@ symbol = value · 284 unmodified lines
285 285
286#define PTR_SCALESHIFT 2286#define PTR_SCALESHIFT 2
287 287
288#define PTR .word288#define PTR_WD .word
289#define PTRSIZE 4289#define PTRSIZE 4
290#define PTRLOG 2290#define PTRLOG 2
291#endif291#endif
@@ -310,7 +310,7 @@ symbol = value · 18 unmodified lines
310 310
311#define PTR_SCALESHIFT 3311#define PTR_SCALESHIFT 3
312 312
313#define PTR .dword313#define PTR_WD .dword
314#define PTRSIZE 8314#define PTRSIZE 8
315#define PTRLOG 3315#define PTRLOG 3
316#endif316#endif
arch/mips/include/asm/ftrace.h+2−2
@@ -32,7 +32,7 @@ do { \ · 31 unmodified lines
32 ".previous\n" \32 ".previous\n" \
33 \33 \
34 ".section\t__ex_table,\"a\"\n\t" \34 ".section\t__ex_table,\"a\"\n\t" \
35 STR(PTR) "\t1b, 3b\n\t" \35 STR(PTR_WD) "\t1b, 3b\n\t" \
36 ".previous\n" \36 ".previous\n" \
37 \37 \
38 : [tmp_dst] "=&r" (dst), [tmp_err] "=r" (error)\38 : [tmp_dst] "=&r" (dst), [tmp_err] "=r" (error)\
@@ -54,7 +54,7 @@ do { \ · 15 unmodified lines
54 ".previous\n" \54 ".previous\n" \
55 \55 \
56 ".section\t__ex_table,\"a\"\n\t"\56 ".section\t__ex_table,\"a\"\n\t"\
57 STR(PTR) "\t1b, 3b\n\t" \57 STR(PTR_WD) "\t1b, 3b\n\t" \
58 ".previous\n" \58 ".previous\n" \
59 \59 \
60 : [tmp_err] "=r" (error) \60 : [tmp_err] "=r" (error) \
arch/mips/include/asm/r4kcache.h+2−2
@@ -119,7 +119,7 @@ static inline void flush_scache_line(unsigned long addr) · 118 unmodified lines
119 " j 2b \n" \119 " j 2b \n" \
120 " .previous \n" \120 " .previous \n" \
121 " .section __ex_table,\"a\" \n" \121 " .section __ex_table,\"a\" \n" \
122 " "STR(PTR)" 1b, 3b \n" \122 " "STR(PTR_WD)" 1b, 3b \n" \
123 " .previous" \123 " .previous" \
124 : "+r" (__err) \124 : "+r" (__err) \
125 : "i" (op), "r" (addr), "i" (-EFAULT)); \125 : "i" (op), "r" (addr), "i" (-EFAULT)); \
@@ -142,7 +142,7 @@ static inline void flush_scache_line(unsigned long addr) · 16 unmodified lines
142 " j 2b \n" \142 " j 2b \n" \
143 " .previous \n" \143 " .previous \n" \
144 " .section __ex_table,\"a\" \n" \144 " .section __ex_table,\"a\" \n" \
145 " "STR(PTR)" 1b, 3b \n" \145 " "STR(PTR_WD)" 1b, 3b \n" \
146 " .previous" \146 " .previous" \
147 : "+r" (__err) \147 : "+r" (__err) \
148 : "i" (op), "r" (addr), "i" (-EFAULT)); \148 : "i" (op), "r" (addr), "i" (-EFAULT)); \
arch/mips/include/asm/unaligned-emul.h+88−88
@@ -20,8 +20,8 @@ do { \ · 19 unmodified lines
20 "j\t3b\n\t" \20 "j\t3b\n\t" \
21 ".previous\n\t" \21 ".previous\n\t" \
22 ".section\t__ex_table,\"a\"\n\t" \22 ".section\t__ex_table,\"a\"\n\t" \
23 STR(PTR)"\t1b, 4b\n\t" \23 STR(PTR_WD)"\t1b, 4b\n\t" \
24 STR(PTR)"\t2b, 4b\n\t" \24 STR(PTR_WD)"\t2b, 4b\n\t" \
25 ".previous" \25 ".previous" \
26 : "=&r" (value), "=r" (res) \26 : "=&r" (value), "=r" (res) \
27 : "r" (addr), "i" (-EFAULT)); \27 : "r" (addr), "i" (-EFAULT)); \
@@ -41,8 +41,8 @@ do { \ · 13 unmodified lines
41 "j\t3b\n\t" \41 "j\t3b\n\t" \
42 ".previous\n\t" \42 ".previous\n\t" \
43 ".section\t__ex_table,\"a\"\n\t" \43 ".section\t__ex_table,\"a\"\n\t" \
44 STR(PTR)"\t1b, 4b\n\t" \44 STR(PTR_WD)"\t1b, 4b\n\t" \
45 STR(PTR)"\t2b, 4b\n\t" \45 STR(PTR_WD)"\t2b, 4b\n\t" \
46 ".previous" \46 ".previous" \
47 : "=&r" (value), "=r" (res) \47 : "=&r" (value), "=r" (res) \
48 : "r" (addr), "i" (-EFAULT)); \48 : "r" (addr), "i" (-EFAULT)); \
@@ -74,10 +74,10 @@ do { \ · 25 unmodified lines
74 "j\t10b\n\t" \74 "j\t10b\n\t" \
75 ".previous\n\t" \75 ".previous\n\t" \
76 ".section\t__ex_table,\"a\"\n\t" \76 ".section\t__ex_table,\"a\"\n\t" \
77 STR(PTR)"\t1b, 11b\n\t" \77 STR(PTR_WD)"\t1b, 11b\n\t" \
78 STR(PTR)"\t2b, 11b\n\t" \78 STR(PTR_WD)"\t2b, 11b\n\t" \
79 STR(PTR)"\t3b, 11b\n\t" \79 STR(PTR_WD)"\t3b, 11b\n\t" \
80 STR(PTR)"\t4b, 11b\n\t" \80 STR(PTR_WD)"\t4b, 11b\n\t" \
81 ".previous" \81 ".previous" \
82 : "=&r" (value), "=r" (res) \82 : "=&r" (value), "=r" (res) \
83 : "r" (addr), "i" (-EFAULT)); \83 : "r" (addr), "i" (-EFAULT)); \
@@ -102,8 +102,8 @@ do { \ · 18 unmodified lines
102 "j\t3b\n\t" \102 "j\t3b\n\t" \
103 ".previous\n\t" \103 ".previous\n\t" \
104 ".section\t__ex_table,\"a\"\n\t" \104 ".section\t__ex_table,\"a\"\n\t" \
105 STR(PTR)"\t1b, 4b\n\t" \105 STR(PTR_WD)"\t1b, 4b\n\t" \
106 STR(PTR)"\t2b, 4b\n\t" \106 STR(PTR_WD)"\t2b, 4b\n\t" \
107 ".previous" \107 ".previous" \
108 : "=&r" (value), "=r" (res) \108 : "=&r" (value), "=r" (res) \
109 : "r" (addr), "i" (-EFAULT)); \109 : "r" (addr), "i" (-EFAULT)); \
@@ -125,8 +125,8 @@ do { \ · 15 unmodified lines
125 "j\t3b\n\t" \125 "j\t3b\n\t" \
126 ".previous\n\t" \126 ".previous\n\t" \
127 ".section\t__ex_table,\"a\"\n\t" \127 ".section\t__ex_table,\"a\"\n\t" \
128 STR(PTR)"\t1b, 4b\n\t" \128 STR(PTR_WD)"\t1b, 4b\n\t" \
129 STR(PTR)"\t2b, 4b\n\t" \129 STR(PTR_WD)"\t2b, 4b\n\t" \
130 ".previous" \130 ".previous" \
131 : "=&r" (value), "=r" (res) \131 : "=&r" (value), "=r" (res) \
132 : "r" (addr), "i" (-EFAULT)); \132 : "r" (addr), "i" (-EFAULT)); \
@@ -145,8 +145,8 @@ do { \ · 12 unmodified lines
145 "j\t3b\n\t" \145 "j\t3b\n\t" \
146 ".previous\n\t" \146 ".previous\n\t" \
147 ".section\t__ex_table,\"a\"\n\t" \147 ".section\t__ex_table,\"a\"\n\t" \
148 STR(PTR)"\t1b, 4b\n\t" \148 STR(PTR_WD)"\t1b, 4b\n\t" \
149 STR(PTR)"\t2b, 4b\n\t" \149 STR(PTR_WD)"\t2b, 4b\n\t" \
150 ".previous" \150 ".previous" \
151 : "=&r" (value), "=r" (res) \151 : "=&r" (value), "=r" (res) \
152 : "r" (addr), "i" (-EFAULT)); \152 : "r" (addr), "i" (-EFAULT)); \
@@ -178,10 +178,10 @@ do { \ · 25 unmodified lines
178 "j\t10b\n\t" \178 "j\t10b\n\t" \
179 ".previous\n\t" \179 ".previous\n\t" \
180 ".section\t__ex_table,\"a\"\n\t" \180 ".section\t__ex_table,\"a\"\n\t" \
181 STR(PTR)"\t1b, 11b\n\t" \181 STR(PTR_WD)"\t1b, 11b\n\t" \
182 STR(PTR)"\t2b, 11b\n\t" \182 STR(PTR_WD)"\t2b, 11b\n\t" \
183 STR(PTR)"\t3b, 11b\n\t" \183 STR(PTR_WD)"\t3b, 11b\n\t" \
184 STR(PTR)"\t4b, 11b\n\t" \184 STR(PTR_WD)"\t4b, 11b\n\t" \
185 ".previous" \185 ".previous" \
186 : "=&r" (value), "=r" (res) \186 : "=&r" (value), "=r" (res) \
187 : "r" (addr), "i" (-EFAULT)); \187 : "r" (addr), "i" (-EFAULT)); \
@@ -223,14 +223,14 @@ do { \ · 35 unmodified lines
223 "j\t10b\n\t" \223 "j\t10b\n\t" \
224 ".previous\n\t" \224 ".previous\n\t" \
225 ".section\t__ex_table,\"a\"\n\t" \225 ".section\t__ex_table,\"a\"\n\t" \
226 STR(PTR)"\t1b, 11b\n\t" \226 STR(PTR_WD)"\t1b, 11b\n\t" \
227 STR(PTR)"\t2b, 11b\n\t" \227 STR(PTR_WD)"\t2b, 11b\n\t" \
228 STR(PTR)"\t3b, 11b\n\t" \228 STR(PTR_WD)"\t3b, 11b\n\t" \
229 STR(PTR)"\t4b, 11b\n\t" \229 STR(PTR_WD)"\t4b, 11b\n\t" \
230 STR(PTR)"\t5b, 11b\n\t" \230 STR(PTR_WD)"\t5b, 11b\n\t" \
231 STR(PTR)"\t6b, 11b\n\t" \231 STR(PTR_WD)"\t6b, 11b\n\t" \
232 STR(PTR)"\t7b, 11b\n\t" \232 STR(PTR_WD)"\t7b, 11b\n\t" \
233 STR(PTR)"\t8b, 11b\n\t" \233 STR(PTR_WD)"\t8b, 11b\n\t" \
234 ".previous" \234 ".previous" \
235 : "=&r" (value), "=r" (res) \235 : "=&r" (value), "=r" (res) \
236 : "r" (addr), "i" (-EFAULT)); \236 : "r" (addr), "i" (-EFAULT)); \
@@ -255,8 +255,8 @@ do { \ · 18 unmodified lines
255 "j\t3b\n\t" \255 "j\t3b\n\t" \
256 ".previous\n\t" \256 ".previous\n\t" \
257 ".section\t__ex_table,\"a\"\n\t" \257 ".section\t__ex_table,\"a\"\n\t" \
258 STR(PTR)"\t1b, 4b\n\t" \258 STR(PTR_WD)"\t1b, 4b\n\t" \
259 STR(PTR)"\t2b, 4b\n\t" \259 STR(PTR_WD)"\t2b, 4b\n\t" \
260 ".previous" \260 ".previous" \
261 : "=r" (res) \261 : "=r" (res) \
262 : "r" (value), "r" (addr), "i" (-EFAULT));\262 : "r" (value), "r" (addr), "i" (-EFAULT));\
@@ -276,8 +276,8 @@ do { \ · 13 unmodified lines
276 "j\t3b\n\t" \276 "j\t3b\n\t" \
277 ".previous\n\t" \277 ".previous\n\t" \
278 ".section\t__ex_table,\"a\"\n\t" \278 ".section\t__ex_table,\"a\"\n\t" \
279 STR(PTR)"\t1b, 4b\n\t" \279 STR(PTR_WD)"\t1b, 4b\n\t" \
280 STR(PTR)"\t2b, 4b\n\t" \280 STR(PTR_WD)"\t2b, 4b\n\t" \
281 ".previous" \281 ".previous" \
282 : "=r" (res) \282 : "=r" (res) \
283 : "r" (value), "r" (addr), "i" (-EFAULT)); \283 : "r" (value), "r" (addr), "i" (-EFAULT)); \
@@ -296,8 +296,8 @@ do { \ · 12 unmodified lines
296 "j\t3b\n\t" \296 "j\t3b\n\t" \
297 ".previous\n\t" \297 ".previous\n\t" \
298 ".section\t__ex_table,\"a\"\n\t" \298 ".section\t__ex_table,\"a\"\n\t" \
299 STR(PTR)"\t1b, 4b\n\t" \299 STR(PTR_WD)"\t1b, 4b\n\t" \
300 STR(PTR)"\t2b, 4b\n\t" \300 STR(PTR_WD)"\t2b, 4b\n\t" \
301 ".previous" \301 ".previous" \
302 : "=r" (res) \302 : "=r" (res) \
303 : "r" (value), "r" (addr), "i" (-EFAULT)); \303 : "r" (value), "r" (addr), "i" (-EFAULT)); \
@@ -325,10 +325,10 @@ do { \ · 21 unmodified lines
325 "j\t10b\n\t" \325 "j\t10b\n\t" \
326 ".previous\n\t" \326 ".previous\n\t" \
327 ".section\t__ex_table,\"a\"\n\t" \327 ".section\t__ex_table,\"a\"\n\t" \
328 STR(PTR)"\t1b, 11b\n\t" \328 STR(PTR_WD)"\t1b, 11b\n\t" \
329 STR(PTR)"\t2b, 11b\n\t" \329 STR(PTR_WD)"\t2b, 11b\n\t" \
330 STR(PTR)"\t3b, 11b\n\t" \330 STR(PTR_WD)"\t3b, 11b\n\t" \
331 STR(PTR)"\t4b, 11b\n\t" \331 STR(PTR_WD)"\t4b, 11b\n\t" \
332 ".previous" \332 ".previous" \
333 : "=&r" (res) \333 : "=&r" (res) \
334 : "r" (value), "r" (addr), "i" (-EFAULT) \334 : "r" (value), "r" (addr), "i" (-EFAULT) \
@@ -365,14 +365,14 @@ do { \ · 30 unmodified lines
365 "j\t10b\n\t" \365 "j\t10b\n\t" \
366 ".previous\n\t" \366 ".previous\n\t" \
367 ".section\t__ex_table,\"a\"\n\t" \367 ".section\t__ex_table,\"a\"\n\t" \
368 STR(PTR)"\t1b, 11b\n\t" \368 STR(PTR_WD)"\t1b, 11b\n\t" \
369 STR(PTR)"\t2b, 11b\n\t" \369 STR(PTR_WD)"\t2b, 11b\n\t" \
370 STR(PTR)"\t3b, 11b\n\t" \370 STR(PTR_WD)"\t3b, 11b\n\t" \
371 STR(PTR)"\t4b, 11b\n\t" \371 STR(PTR_WD)"\t4b, 11b\n\t" \
372 STR(PTR)"\t5b, 11b\n\t" \372 STR(PTR_WD)"\t5b, 11b\n\t" \
373 STR(PTR)"\t6b, 11b\n\t" \373 STR(PTR_WD)"\t6b, 11b\n\t" \
374 STR(PTR)"\t7b, 11b\n\t" \374 STR(PTR_WD)"\t7b, 11b\n\t" \
375 STR(PTR)"\t8b, 11b\n\t" \375 STR(PTR_WD)"\t8b, 11b\n\t" \
376 ".previous" \376 ".previous" \
377 : "=&r" (res) \377 : "=&r" (res) \
378 : "r" (value), "r" (addr), "i" (-EFAULT) \378 : "r" (value), "r" (addr), "i" (-EFAULT) \
@@ -398,8 +398,8 @@ do { \ · 19 unmodified lines
398 "j\t3b\n\t" \398 "j\t3b\n\t" \
399 ".previous\n\t" \399 ".previous\n\t" \
400 ".section\t__ex_table,\"a\"\n\t" \400 ".section\t__ex_table,\"a\"\n\t" \
401 STR(PTR)"\t1b, 4b\n\t" \401 STR(PTR_WD)"\t1b, 4b\n\t" \
402 STR(PTR)"\t2b, 4b\n\t" \402 STR(PTR_WD)"\t2b, 4b\n\t" \
403 ".previous" \403 ".previous" \
404 : "=&r" (value), "=r" (res) \404 : "=&r" (value), "=r" (res) \
405 : "r" (addr), "i" (-EFAULT)); \405 : "r" (addr), "i" (-EFAULT)); \
@@ -419,8 +419,8 @@ do { \ · 13 unmodified lines
419 "j\t3b\n\t" \419 "j\t3b\n\t" \
420 ".previous\n\t" \420 ".previous\n\t" \
421 ".section\t__ex_table,\"a\"\n\t" \421 ".section\t__ex_table,\"a\"\n\t" \
422 STR(PTR)"\t1b, 4b\n\t" \422 STR(PTR_WD)"\t1b, 4b\n\t" \
423 STR(PTR)"\t2b, 4b\n\t" \423 STR(PTR_WD)"\t2b, 4b\n\t" \
424 ".previous" \424 ".previous" \
425 : "=&r" (value), "=r" (res) \425 : "=&r" (value), "=r" (res) \
426 : "r" (addr), "i" (-EFAULT)); \426 : "r" (addr), "i" (-EFAULT)); \
@@ -452,10 +452,10 @@ do { \ · 25 unmodified lines
452 "j\t10b\n\t" \452 "j\t10b\n\t" \
453 ".previous\n\t" \453 ".previous\n\t" \
454 ".section\t__ex_table,\"a\"\n\t" \454 ".section\t__ex_table,\"a\"\n\t" \
455 STR(PTR)"\t1b, 11b\n\t" \455 STR(PTR_WD)"\t1b, 11b\n\t" \
456 STR(PTR)"\t2b, 11b\n\t" \456 STR(PTR_WD)"\t2b, 11b\n\t" \
457 STR(PTR)"\t3b, 11b\n\t" \457 STR(PTR_WD)"\t3b, 11b\n\t" \
458 STR(PTR)"\t4b, 11b\n\t" \458 STR(PTR_WD)"\t4b, 11b\n\t" \
459 ".previous" \459 ".previous" \
460 : "=&r" (value), "=r" (res) \460 : "=&r" (value), "=r" (res) \
461 : "r" (addr), "i" (-EFAULT)); \461 : "r" (addr), "i" (-EFAULT)); \
@@ -481,8 +481,8 @@ do { \ · 19 unmodified lines
481 "j\t3b\n\t" \481 "j\t3b\n\t" \
482 ".previous\n\t" \482 ".previous\n\t" \
483 ".section\t__ex_table,\"a\"\n\t" \483 ".section\t__ex_table,\"a\"\n\t" \
484 STR(PTR)"\t1b, 4b\n\t" \484 STR(PTR_WD)"\t1b, 4b\n\t" \
485 STR(PTR)"\t2b, 4b\n\t" \485 STR(PTR_WD)"\t2b, 4b\n\t" \
486 ".previous" \486 ".previous" \
487 : "=&r" (value), "=r" (res) \487 : "=&r" (value), "=r" (res) \
488 : "r" (addr), "i" (-EFAULT)); \488 : "r" (addr), "i" (-EFAULT)); \
@@ -504,8 +504,8 @@ do { \ · 15 unmodified lines
504 "j\t3b\n\t" \504 "j\t3b\n\t" \
505 ".previous\n\t" \505 ".previous\n\t" \
506 ".section\t__ex_table,\"a\"\n\t" \506 ".section\t__ex_table,\"a\"\n\t" \
507 STR(PTR)"\t1b, 4b\n\t" \507 STR(PTR_WD)"\t1b, 4b\n\t" \
508 STR(PTR)"\t2b, 4b\n\t" \508 STR(PTR_WD)"\t2b, 4b\n\t" \
509 ".previous" \509 ".previous" \
510 : "=&r" (value), "=r" (res) \510 : "=&r" (value), "=r" (res) \
511 : "r" (addr), "i" (-EFAULT)); \511 : "r" (addr), "i" (-EFAULT)); \
@@ -524,8 +524,8 @@ do { \ · 12 unmodified lines
524 "j\t3b\n\t" \524 "j\t3b\n\t" \
525 ".previous\n\t" \525 ".previous\n\t" \
526 ".section\t__ex_table,\"a\"\n\t" \526 ".section\t__ex_table,\"a\"\n\t" \
527 STR(PTR)"\t1b, 4b\n\t" \527 STR(PTR_WD)"\t1b, 4b\n\t" \
528 STR(PTR)"\t2b, 4b\n\t" \528 STR(PTR_WD)"\t2b, 4b\n\t" \
529 ".previous" \529 ".previous" \
530 : "=&r" (value), "=r" (res) \530 : "=&r" (value), "=r" (res) \
531 : "r" (addr), "i" (-EFAULT)); \531 : "r" (addr), "i" (-EFAULT)); \
@@ -557,10 +557,10 @@ do { \ · 25 unmodified lines
557 "j\t10b\n\t" \557 "j\t10b\n\t" \
558 ".previous\n\t" \558 ".previous\n\t" \
559 ".section\t__ex_table,\"a\"\n\t" \559 ".section\t__ex_table,\"a\"\n\t" \
560 STR(PTR)"\t1b, 11b\n\t" \560 STR(PTR_WD)"\t1b, 11b\n\t" \
561 STR(PTR)"\t2b, 11b\n\t" \561 STR(PTR_WD)"\t2b, 11b\n\t" \
562 STR(PTR)"\t3b, 11b\n\t" \562 STR(PTR_WD)"\t3b, 11b\n\t" \
563 STR(PTR)"\t4b, 11b\n\t" \563 STR(PTR_WD)"\t4b, 11b\n\t" \
564 ".previous" \564 ".previous" \
565 : "=&r" (value), "=r" (res) \565 : "=&r" (value), "=r" (res) \
566 : "r" (addr), "i" (-EFAULT)); \566 : "r" (addr), "i" (-EFAULT)); \
@@ -602,14 +602,14 @@ do { \ · 35 unmodified lines
602 "j\t10b\n\t" \602 "j\t10b\n\t" \
603 ".previous\n\t" \603 ".previous\n\t" \
604 ".section\t__ex_table,\"a\"\n\t" \604 ".section\t__ex_table,\"a\"\n\t" \
605 STR(PTR)"\t1b, 11b\n\t" \605 STR(PTR_WD)"\t1b, 11b\n\t" \
606 STR(PTR)"\t2b, 11b\n\t" \606 STR(PTR_WD)"\t2b, 11b\n\t" \
607 STR(PTR)"\t3b, 11b\n\t" \607 STR(PTR_WD)"\t3b, 11b\n\t" \
608 STR(PTR)"\t4b, 11b\n\t" \608 STR(PTR_WD)"\t4b, 11b\n\t" \
609 STR(PTR)"\t5b, 11b\n\t" \609 STR(PTR_WD)"\t5b, 11b\n\t" \
610 STR(PTR)"\t6b, 11b\n\t" \610 STR(PTR_WD)"\t6b, 11b\n\t" \
611 STR(PTR)"\t7b, 11b\n\t" \611 STR(PTR_WD)"\t7b, 11b\n\t" \
612 STR(PTR)"\t8b, 11b\n\t" \612 STR(PTR_WD)"\t8b, 11b\n\t" \
613 ".previous" \613 ".previous" \
614 : "=&r" (value), "=r" (res) \614 : "=&r" (value), "=r" (res) \
615 : "r" (addr), "i" (-EFAULT)); \615 : "r" (addr), "i" (-EFAULT)); \
@@ -632,8 +632,8 @@ do { \ · 16 unmodified lines
632 "j\t3b\n\t" \632 "j\t3b\n\t" \
633 ".previous\n\t" \633 ".previous\n\t" \
634 ".section\t__ex_table,\"a\"\n\t" \634 ".section\t__ex_table,\"a\"\n\t" \
635 STR(PTR)"\t1b, 4b\n\t" \635 STR(PTR_WD)"\t1b, 4b\n\t" \
636 STR(PTR)"\t2b, 4b\n\t" \636 STR(PTR_WD)"\t2b, 4b\n\t" \
637 ".previous" \637 ".previous" \
638 : "=r" (res) \638 : "=r" (res) \
639 : "r" (value), "r" (addr), "i" (-EFAULT));\639 : "r" (value), "r" (addr), "i" (-EFAULT));\
@@ -653,8 +653,8 @@ do { \ · 13 unmodified lines
653 "j\t3b\n\t" \653 "j\t3b\n\t" \
654 ".previous\n\t" \654 ".previous\n\t" \
655 ".section\t__ex_table,\"a\"\n\t" \655 ".section\t__ex_table,\"a\"\n\t" \
656 STR(PTR)"\t1b, 4b\n\t" \656 STR(PTR_WD)"\t1b, 4b\n\t" \
657 STR(PTR)"\t2b, 4b\n\t" \657 STR(PTR_WD)"\t2b, 4b\n\t" \
658 ".previous" \658 ".previous" \
659 : "=r" (res) \659 : "=r" (res) \
660 : "r" (value), "r" (addr), "i" (-EFAULT)); \660 : "r" (value), "r" (addr), "i" (-EFAULT)); \
@@ -673,8 +673,8 @@ do { \ · 12 unmodified lines
673 "j\t3b\n\t" \673 "j\t3b\n\t" \
674 ".previous\n\t" \674 ".previous\n\t" \
675 ".section\t__ex_table,\"a\"\n\t" \675 ".section\t__ex_table,\"a\"\n\t" \
676 STR(PTR)"\t1b, 4b\n\t" \676 STR(PTR_WD)"\t1b, 4b\n\t" \
677 STR(PTR)"\t2b, 4b\n\t" \677 STR(PTR_WD)"\t2b, 4b\n\t" \
678 ".previous" \678 ".previous" \
679 : "=r" (res) \679 : "=r" (res) \
680 : "r" (value), "r" (addr), "i" (-EFAULT)); \680 : "r" (value), "r" (addr), "i" (-EFAULT)); \
@@ -703,10 +703,10 @@ do { \ · 22 unmodified lines
703 "j\t10b\n\t" \703 "j\t10b\n\t" \
704 ".previous\n\t" \704 ".previous\n\t" \
705 ".section\t__ex_table,\"a\"\n\t" \705 ".section\t__ex_table,\"a\"\n\t" \
706 STR(PTR)"\t1b, 11b\n\t" \706 STR(PTR_WD)"\t1b, 11b\n\t" \
707 STR(PTR)"\t2b, 11b\n\t" \707 STR(PTR_WD)"\t2b, 11b\n\t" \
708 STR(PTR)"\t3b, 11b\n\t" \708 STR(PTR_WD)"\t3b, 11b\n\t" \
709 STR(PTR)"\t4b, 11b\n\t" \709 STR(PTR_WD)"\t4b, 11b\n\t" \
710 ".previous" \710 ".previous" \
711 : "=&r" (res) \711 : "=&r" (res) \
712 : "r" (value), "r" (addr), "i" (-EFAULT) \712 : "r" (value), "r" (addr), "i" (-EFAULT) \
@@ -743,14 +743,14 @@ do { \ · 30 unmodified lines
743 "j\t10b\n\t" \743 "j\t10b\n\t" \
744 ".previous\n\t" \744 ".previous\n\t" \
745 ".section\t__ex_table,\"a\"\n\t" \745 ".section\t__ex_table,\"a\"\n\t" \
746 STR(PTR)"\t1b, 11b\n\t" \746 STR(PTR_WD)"\t1b, 11b\n\t" \
747 STR(PTR)"\t2b, 11b\n\t" \747 STR(PTR_WD)"\t2b, 11b\n\t" \
748 STR(PTR)"\t3b, 11b\n\t" \748 STR(PTR_WD)"\t3b, 11b\n\t" \
749 STR(PTR)"\t4b, 11b\n\t" \749 STR(PTR_WD)"\t4b, 11b\n\t" \
750 STR(PTR)"\t5b, 11b\n\t" \750 STR(PTR_WD)"\t5b, 11b\n\t" \
751 STR(PTR)"\t6b, 11b\n\t" \751 STR(PTR_WD)"\t6b, 11b\n\t" \
752 STR(PTR)"\t7b, 11b\n\t" \752 STR(PTR_WD)"\t7b, 11b\n\t" \
753 STR(PTR)"\t8b, 11b\n\t" \753 STR(PTR_WD)"\t8b, 11b\n\t" \
754 ".previous" \754 ".previous" \
755 : "=&r" (res) \755 : "=&r" (res) \
756 : "r" (value), "r" (addr), "i" (-EFAULT) \756 : "r" (value), "r" (addr), "i" (-EFAULT) \
arch/mips/kernel/mips-r2-to-r6-emul.c+52−52
@@ -1258,10 +1258,10 @@ fpu_emul: · 1257 unmodified lines
1258 " j 10b\n"1258 " j 10b\n"
1259 " .previous\n"1259 " .previous\n"
1260 " .section __ex_table,\"a\"\n"1260 " .section __ex_table,\"a\"\n"
1261 STR(PTR) " 1b,8b\n"1261 STR(PTR_WD) " 1b,8b\n"
1262 STR(PTR) " 2b,8b\n"1262 STR(PTR_WD) " 2b,8b\n"
1263 STR(PTR) " 3b,8b\n"1263 STR(PTR_WD) " 3b,8b\n"
1264 STR(PTR) " 4b,8b\n"1264 STR(PTR_WD) " 4b,8b\n"
1265 " .previous\n"1265 " .previous\n"
1266 " .set pop\n"1266 " .set pop\n"
1267 : "+&r"(rt), "=&r"(rs),1267 : "+&r"(rt), "=&r"(rs),
@@ -1333,10 +1333,10 @@ fpu_emul: · 65 unmodified lines
1333 " j 10b\n"1333 " j 10b\n"
1334 " .previous\n"1334 " .previous\n"
1335 " .section __ex_table,\"a\"\n"1335 " .section __ex_table,\"a\"\n"
1336 STR(PTR) " 1b,8b\n"1336 STR(PTR_WD) " 1b,8b\n"
1337 STR(PTR) " 2b,8b\n"1337 STR(PTR_WD) " 2b,8b\n"
1338 STR(PTR) " 3b,8b\n"1338 STR(PTR_WD) " 3b,8b\n"
1339 STR(PTR) " 4b,8b\n"1339 STR(PTR_WD) " 4b,8b\n"
1340 " .previous\n"1340 " .previous\n"
1341 " .set pop\n"1341 " .set pop\n"
1342 : "+&r"(rt), "=&r"(rs),1342 : "+&r"(rt), "=&r"(rs),
@@ -1404,10 +1404,10 @@ fpu_emul: · 61 unmodified lines
1404 " j 9b\n"1404 " j 9b\n"
1405 " .previous\n"1405 " .previous\n"
1406 " .section __ex_table,\"a\"\n"1406 " .section __ex_table,\"a\"\n"
1407 STR(PTR) " 1b,8b\n"1407 STR(PTR_WD) " 1b,8b\n"
1408 STR(PTR) " 2b,8b\n"1408 STR(PTR_WD) " 2b,8b\n"
1409 STR(PTR) " 3b,8b\n"1409 STR(PTR_WD) " 3b,8b\n"
1410 STR(PTR) " 4b,8b\n"1410 STR(PTR_WD) " 4b,8b\n"
1411 " .previous\n"1411 " .previous\n"
1412 " .set pop\n"1412 " .set pop\n"
1413 : "+&r"(rt), "=&r"(rs),1413 : "+&r"(rt), "=&r"(rs),
@@ -1474,10 +1474,10 @@ fpu_emul: · 60 unmodified lines
1474 " j 9b\n"1474 " j 9b\n"
1475 " .previous\n"1475 " .previous\n"
1476 " .section __ex_table,\"a\"\n"1476 " .section __ex_table,\"a\"\n"
1477 STR(PTR) " 1b,8b\n"1477 STR(PTR_WD) " 1b,8b\n"
1478 STR(PTR) " 2b,8b\n"1478 STR(PTR_WD) " 2b,8b\n"
1479 STR(PTR) " 3b,8b\n"1479 STR(PTR_WD) " 3b,8b\n"
1480 STR(PTR) " 4b,8b\n"1480 STR(PTR_WD) " 4b,8b\n"
1481 " .previous\n"1481 " .previous\n"
1482 " .set pop\n"1482 " .set pop\n"
1483 : "+&r"(rt), "=&r"(rs),1483 : "+&r"(rt), "=&r"(rs),
@@ -1589,14 +1589,14 @@ fpu_emul: · 105 unmodified lines
1589 " j 9b\n"1589 " j 9b\n"
1590 " .previous\n"1590 " .previous\n"
1591 " .section __ex_table,\"a\"\n"1591 " .section __ex_table,\"a\"\n"
1592 STR(PTR) " 1b,8b\n"1592 STR(PTR_WD) " 1b,8b\n"
1593 STR(PTR) " 2b,8b\n"1593 STR(PTR_WD) " 2b,8b\n"
1594 STR(PTR) " 3b,8b\n"1594 STR(PTR_WD) " 3b,8b\n"
1595 STR(PTR) " 4b,8b\n"1595 STR(PTR_WD) " 4b,8b\n"
1596 STR(PTR) " 5b,8b\n"1596 STR(PTR_WD) " 5b,8b\n"
1597 STR(PTR) " 6b,8b\n"1597 STR(PTR_WD) " 6b,8b\n"
1598 STR(PTR) " 7b,8b\n"1598 STR(PTR_WD) " 7b,8b\n"
1599 STR(PTR) " 0b,8b\n"1599 STR(PTR_WD) " 0b,8b\n"
1600 " .previous\n"1600 " .previous\n"
1601 " .set pop\n"1601 " .set pop\n"
1602 : "+&r"(rt), "=&r"(rs),1602 : "+&r"(rt), "=&r"(rs),
@@ -1708,14 +1708,14 @@ fpu_emul: · 105 unmodified lines
1708 " j 9b\n"1708 " j 9b\n"
1709 " .previous\n"1709 " .previous\n"
1710 " .section __ex_table,\"a\"\n"1710 " .section __ex_table,\"a\"\n"
1711 STR(PTR) " 1b,8b\n"1711 STR(PTR_WD) " 1b,8b\n"
1712 STR(PTR) " 2b,8b\n"1712 STR(PTR_WD) " 2b,8b\n"
1713 STR(PTR) " 3b,8b\n"1713 STR(PTR_WD) " 3b,8b\n"
1714 STR(PTR) " 4b,8b\n"1714 STR(PTR_WD) " 4b,8b\n"
1715 STR(PTR) " 5b,8b\n"1715 STR(PTR_WD) " 5b,8b\n"
1716 STR(PTR) " 6b,8b\n"1716 STR(PTR_WD) " 6b,8b\n"
1717 STR(PTR) " 7b,8b\n"1717 STR(PTR_WD) " 7b,8b\n"
1718 STR(PTR) " 0b,8b\n"1718 STR(PTR_WD) " 0b,8b\n"
1719 " .previous\n"1719 " .previous\n"
1720 " .set pop\n"1720 " .set pop\n"
1721 : "+&r"(rt), "=&r"(rs),1721 : "+&r"(rt), "=&r"(rs),
@@ -1827,14 +1827,14 @@ fpu_emul: · 105 unmodified lines
1827 " j 9b\n"1827 " j 9b\n"
1828 " .previous\n"1828 " .previous\n"
1829 " .section __ex_table,\"a\"\n"1829 " .section __ex_table,\"a\"\n"
1830 STR(PTR) " 1b,8b\n"1830 STR(PTR_WD) " 1b,8b\n"
1831 STR(PTR) " 2b,8b\n"1831 STR(PTR_WD) " 2b,8b\n"
1832 STR(PTR) " 3b,8b\n"1832 STR(PTR_WD) " 3b,8b\n"
1833 STR(PTR) " 4b,8b\n"1833 STR(PTR_WD) " 4b,8b\n"
1834 STR(PTR) " 5b,8b\n"1834 STR(PTR_WD) " 5b,8b\n"
1835 STR(PTR) " 6b,8b\n"1835 STR(PTR_WD) " 6b,8b\n"
1836 STR(PTR) " 7b,8b\n"1836 STR(PTR_WD) " 7b,8b\n"
1837 STR(PTR) " 0b,8b\n"1837 STR(PTR_WD) " 0b,8b\n"
1838 " .previous\n"1838 " .previous\n"
1839 " .set pop\n"1839 " .set pop\n"
1840 : "+&r"(rt), "=&r"(rs),1840 : "+&r"(rt), "=&r"(rs),
@@ -1945,14 +1945,14 @@ fpu_emul: · 104 unmodified lines
1945 " j 9b\n"1945 " j 9b\n"
1946 " .previous\n"1946 " .previous\n"
1947 " .section __ex_table,\"a\"\n"1947 " .section __ex_table,\"a\"\n"
1948 STR(PTR) " 1b,8b\n"1948 STR(PTR_WD) " 1b,8b\n"
1949 STR(PTR) " 2b,8b\n"1949 STR(PTR_WD) " 2b,8b\n"
1950 STR(PTR) " 3b,8b\n"1950 STR(PTR_WD) " 3b,8b\n"
1951 STR(PTR) " 4b,8b\n"1951 STR(PTR_WD) " 4b,8b\n"
1952 STR(PTR) " 5b,8b\n"1952 STR(PTR_WD) " 5b,8b\n"
1953 STR(PTR) " 6b,8b\n"1953 STR(PTR_WD) " 6b,8b\n"
1954 STR(PTR) " 7b,8b\n"1954 STR(PTR_WD) " 7b,8b\n"
1955 STR(PTR) " 0b,8b\n"1955 STR(PTR_WD) " 0b,8b\n"
1956 " .previous\n"1956 " .previous\n"
1957 " .set pop\n"1957 " .set pop\n"
1958 : "+&r"(rt), "=&r"(rs),1958 : "+&r"(rt), "=&r"(rs),
@@ -2007,7 +2007,7 @@ fpu_emul: · 48 unmodified lines
2007 "j 2b\n"2007 "j 2b\n"
2008 ".previous\n"2008 ".previous\n"
2009 ".section __ex_table,\"a\"\n"2009 ".section __ex_table,\"a\"\n"
2010 STR(PTR) " 1b,3b\n"2010 STR(PTR_WD) " 1b,3b\n"
2011 ".previous\n"2011 ".previous\n"
2012 : "=&r"(res), "+&r"(err)2012 : "=&r"(res), "+&r"(err)
2013 : "r"(vaddr), "i"(SIGSEGV)2013 : "r"(vaddr), "i"(SIGSEGV)
@@ -2065,7 +2065,7 @@ fpu_emul: · 51 unmodified lines
2065 "j 2b\n"2065 "j 2b\n"
2066 ".previous\n"2066 ".previous\n"
2067 ".section __ex_table,\"a\"\n"2067 ".section __ex_table,\"a\"\n"
2068 STR(PTR) " 1b,3b\n"2068 STR(PTR_WD) " 1b,3b\n"
2069 ".previous\n"2069 ".previous\n"
2070 : "+&r"(res), "+&r"(err)2070 : "+&r"(res), "+&r"(err)
2071 : "r"(vaddr), "i"(SIGSEGV));2071 : "r"(vaddr), "i"(SIGSEGV));
@@ -2126,7 +2126,7 @@ fpu_emul: · 54 unmodified lines
2126 "j 2b\n"2126 "j 2b\n"
2127 ".previous\n"2127 ".previous\n"
2128 ".section __ex_table,\"a\"\n"2128 ".section __ex_table,\"a\"\n"
2129 STR(PTR) " 1b,3b\n"2129 STR(PTR_WD) " 1b,3b\n"
2130 ".previous\n"2130 ".previous\n"
2131 : "=&r"(res), "+&r"(err)2131 : "=&r"(res), "+&r"(err)
2132 : "r"(vaddr), "i"(SIGSEGV)2132 : "r"(vaddr), "i"(SIGSEGV)
@@ -2189,7 +2189,7 @@ fpu_emul: · 56 unmodified lines
2189 "j 2b\n"2189 "j 2b\n"
2190 ".previous\n"2190 ".previous\n"
2191 ".section __ex_table,\"a\"\n"2191 ".section __ex_table,\"a\"\n"
2192 STR(PTR) " 1b,3b\n"2192 STR(PTR_WD) " 1b,3b\n"
2193 ".previous\n"2193 ".previous\n"
2194 : "+&r"(res), "+&r"(err)2194 : "+&r"(res), "+&r"(err)
2195 : "r"(vaddr), "i"(SIGSEGV));2195 : "r"(vaddr), "i"(SIGSEGV));
arch/mips/kernel/r2300_fpu.S+3−3
@@ -23,14 +23,14 @@ · 22 unmodified lines
23#define EX(a,b) \23#define EX(a,b) \
249: a,##b; \249: a,##b; \
25 .section __ex_table,"a"; \25 .section __ex_table,"a"; \
26 PTR 9b,fault; \26 PTR_WD 9b,fault; \
27 .previous27 .previous
28 28
29#define EX2(a,b) \29#define EX2(a,b) \
309: a,##b; \309: a,##b; \
31 .section __ex_table,"a"; \31 .section __ex_table,"a"; \
32 PTR 9b,fault; \32 PTR_WD 9b,fault; \
33 PTR 9b+4,fault; \33 PTR_WD 9b+4,fault; \
34 .previous34 .previous
35 35
36 .set mips136 .set mips1
arch/mips/kernel/r4k_fpu.S+1−1
@@ -31,7 +31,7 @@ · 30 unmodified lines
31.ex\@: \insn \reg, \src31.ex\@: \insn \reg, \src
32 .set pop32 .set pop
33 .section __ex_table,"a"33 .section __ex_table,"a"
34 PTR .ex\@, fault34 PTR_WD .ex\@, fault
35 .previous35 .previous
36 .endm36 .endm
37 37
arch/mips/kernel/relocate_kernel.S+11−11
@@ -147,10 +147,10 @@ LEAF(kexec_smp_wait) · 146 unmodified lines
147 147
148kexec_args:148kexec_args:
149 EXPORT(kexec_args)149 EXPORT(kexec_args)
150arg0: PTR 0x0150arg0: PTR_WD 0x0
151arg1: PTR 0x0151arg1: PTR_WD 0x0
152arg2: PTR 0x0152arg2: PTR_WD 0x0
153arg3: PTR 0x0153arg3: PTR_WD 0x0
154 .size kexec_args,PTRSIZE*4154 .size kexec_args,PTRSIZE*4
155 155
156#ifdef CONFIG_SMP156#ifdef CONFIG_SMP
@@ -161,10 +161,10 @@ arg3: PTR 0x0 · 4 unmodified lines
161 */161 */
162secondary_kexec_args:162secondary_kexec_args:
163 EXPORT(secondary_kexec_args)163 EXPORT(secondary_kexec_args)
164s_arg0: PTR 0x0164s_arg0: PTR_WD 0x0
165s_arg1: PTR 0x0165s_arg1: PTR_WD 0x0
166s_arg2: PTR 0x0166s_arg2: PTR_WD 0x0
167s_arg3: PTR 0x0167s_arg3: PTR_WD 0x0
168 .size secondary_kexec_args,PTRSIZE*4168 .size secondary_kexec_args,PTRSIZE*4
169kexec_flag:169kexec_flag:
170 LONG 0x1170 LONG 0x1
@@ -173,17 +173,17 @@ kexec_flag: · 2 unmodified lines
173 173
174kexec_start_address:174kexec_start_address:
175 EXPORT(kexec_start_address)175 EXPORT(kexec_start_address)
176 PTR 0x0176 PTR_WD 0x0
177 .size kexec_start_address, PTRSIZE177 .size kexec_start_address, PTRSIZE
178 178
179kexec_indirection_page:179kexec_indirection_page:
180 EXPORT(kexec_indirection_page)180 EXPORT(kexec_indirection_page)
181 PTR 0181 PTR_WD 0
182 .size kexec_indirection_page, PTRSIZE182 .size kexec_indirection_page, PTRSIZE
183 183
184relocate_new_kernel_end:184relocate_new_kernel_end:
185 185
186relocate_new_kernel_size:186relocate_new_kernel_size:
187 EXPORT(relocate_new_kernel_size)187 EXPORT(relocate_new_kernel_size)
188 PTR relocate_new_kernel_end - relocate_new_kernel188 PTR_WD relocate_new_kernel_end - relocate_new_kernel
189 .size relocate_new_kernel_size, PTRSIZE189 .size relocate_new_kernel_size, PTRSIZE
arch/mips/kernel/scall32-o32.S+5−5
@@ -72,10 +72,10 @@ loads_done: · 71 unmodified lines
72 .set pop72 .set pop
73 73
74 .section __ex_table,"a"74 .section __ex_table,"a"
75 PTR load_a4, bad_stack_a475 PTR_WD load_a4, bad_stack_a4
76 PTR load_a5, bad_stack_a576 PTR_WD load_a5, bad_stack_a5
77 PTR load_a6, bad_stack_a677 PTR_WD load_a6, bad_stack_a6
78 PTR load_a7, bad_stack_a778 PTR_WD load_a7, bad_stack_a7
79 .previous79 .previous
80 80
81 lw t0, TI_FLAGS($28) # syscall tracing enabled?81 lw t0, TI_FLAGS($28) # syscall tracing enabled?
@@ -216,7 +216,7 @@ einval: li v0, -ENOSYS · 134 unmodified lines
216#endif /* CONFIG_MIPS_MT_FPAFF */216#endif /* CONFIG_MIPS_MT_FPAFF */
217 217
218#define __SYSCALL_WITH_COMPAT(nr, native, compat) __SYSCALL(nr, native)218#define __SYSCALL_WITH_COMPAT(nr, native, compat) __SYSCALL(nr, native)
219#define __SYSCALL(nr, entry) PTR entry219#define __SYSCALL(nr, entry) PTR_WD entry
220 .align 2220 .align 2
221 .type sys_call_table, @object221 .type sys_call_table, @object
222EXPORT(sys_call_table)222EXPORT(sys_call_table)
arch/mips/kernel/scall64-n32.S+1−1
@@ -101,7 +101,7 @@ not_n32_scall: · 100 unmodified lines
101 101
102 END(handle_sysn32)102 END(handle_sysn32)
103 103
104#define __SYSCALL(nr, entry) PTR entry104#define __SYSCALL(nr, entry) PTR_WD entry
105 .type sysn32_call_table, @object105 .type sysn32_call_table, @object
106EXPORT(sysn32_call_table)106EXPORT(sysn32_call_table)
107#include <asm/syscall_table_n32.h>107#include <asm/syscall_table_n32.h>
arch/mips/kernel/scall64-n64.S+1−1
@@ -109,7 +109,7 @@ illegal_syscall: · 108 unmodified lines
109 j n64_syscall_exit109 j n64_syscall_exit
110 END(handle_sys64)110 END(handle_sys64)
111 111
112#define __SYSCALL(nr, entry) PTR entry112#define __SYSCALL(nr, entry) PTR_WD entry
113 .align 3113 .align 3
114 .type sys_call_table, @object114 .type sys_call_table, @object
115EXPORT(sys_call_table)115EXPORT(sys_call_table)
arch/mips/kernel/scall64-o32.S+5−5
@@ -73,10 +73,10 @@ load_a7: lw a7, 28(t0) # argument #8 from usp · 72 unmodified lines
73loads_done:73loads_done:
74 74
75 .section __ex_table,"a"75 .section __ex_table,"a"
76 PTR load_a4, bad_stack_a476 PTR_WD load_a4, bad_stack_a4
77 PTR load_a5, bad_stack_a577 PTR_WD load_a5, bad_stack_a5
78 PTR load_a6, bad_stack_a678 PTR_WD load_a6, bad_stack_a6
79 PTR load_a7, bad_stack_a779 PTR_WD load_a7, bad_stack_a7
80 .previous80 .previous
81 81
82 li t1, _TIF_WORK_SYSCALL_ENTRY82 li t1, _TIF_WORK_SYSCALL_ENTRY
@@ -214,7 +214,7 @@ einval: li v0, -ENOSYS · 131 unmodified lines
214 END(sys32_syscall)214 END(sys32_syscall)
215 215
216#define __SYSCALL_WITH_COMPAT(nr, native, compat) __SYSCALL(nr, compat)216#define __SYSCALL_WITH_COMPAT(nr, native, compat) __SYSCALL(nr, compat)
217#define __SYSCALL(nr, entry) PTR entry217#define __SYSCALL(nr, entry) PTR_WD entry
218 .align 3218 .align 3
219 .type sys32_call_table,@object219 .type sys32_call_table,@object
220EXPORT(sys32_call_table)220EXPORT(sys32_call_table)
arch/mips/kernel/syscall.c+4−4
@@ -122,8 +122,8 @@ static inline int mips_atomic_set(unsigned long addr, unsigned long new) · 121 unmodified lines
122 " j 3b \n"122 " j 3b \n"
123 " .previous \n"123 " .previous \n"
124 " .section __ex_table,\"a\" \n"124 " .section __ex_table,\"a\" \n"
125 " "STR(PTR)" 1b, 4b \n"125 " "STR(PTR_WD)" 1b, 4b \n"
126 " "STR(PTR)" 2b, 4b \n"126 " "STR(PTR_WD)" 2b, 4b \n"
127 " .previous \n"127 " .previous \n"
128 " .set pop \n"128 " .set pop \n"
129 : [old] "=&r" (old),129 : [old] "=&r" (old),
@@ -152,8 +152,8 @@ static inline int mips_atomic_set(unsigned long addr, unsigned long new) · 22 unmodified lines
152 " j 3b \n"152 " j 3b \n"
153 " .previous \n"153 " .previous \n"
154 " .section __ex_table,\"a\" \n"154 " .section __ex_table,\"a\" \n"
155 " "STR(PTR)" 1b, 5b \n"155 " "STR(PTR_WD)" 1b, 5b \n"
156 " "STR(PTR)" 2b, 5b \n"156 " "STR(PTR_WD)" 2b, 5b \n"
157 " .previous \n"157 " .previous \n"
158 " .set pop \n"158 " .set pop \n"
159 : [old] "=&r" (old),159 : [old] "=&r" (old),
arch/mips/kvm/mips.c+46−4
@@ -414,6 +414,24 @@ int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu, · 413 unmodified lines
414 return -ENOIOCTLCMD;414 return -ENOIOCTLCMD;
415}415}
416 416
417/*
418 * Actually run the vCPU, entering an RCU extended quiescent state (EQS) while
419 * the vCPU is running.
420 *
421 * This must be noinstr as instrumentation may make use of RCU, and this is not
422 * safe during the EQS.
423 */
424static int noinstr kvm_mips_vcpu_enter_exit(struct kvm_vcpu *vcpu)
425{
426 int ret;
427
428 guest_state_enter_irqoff();
429 ret = kvm_mips_callbacks->vcpu_run(vcpu);
430 guest_state_exit_irqoff();
431
432 return ret;
433}
434
417int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)435int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
418{436{
419 int r = -EINTR;437 int r = -EINTR;
@@ -434,7 +452,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) · 14 unmodified lines
434 lose_fpu(1);452 lose_fpu(1);
435 453
436 local_irq_disable();454 local_irq_disable();
437 guest_enter_irqoff();455 guest_timing_enter_irqoff();
438 trace_kvm_enter(vcpu);456 trace_kvm_enter(vcpu);
439 457
440 /*458 /*
@@ -445,10 +463,23 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) · 4 unmodified lines
445 */463 */
446 smp_store_mb(vcpu->mode, IN_GUEST_MODE);464 smp_store_mb(vcpu->mode, IN_GUEST_MODE);
447 465
448 r = kvm_mips_callbacks->vcpu_run(vcpu);466 r = kvm_mips_vcpu_enter_exit(vcpu);
467
468 /*
469 * We must ensure that any pending interrupts are taken before
470 * we exit guest timing so that timer ticks are accounted as
471 * guest time. Transiently unmask interrupts so that any
472 * pending interrupts are taken.
473 *
474 * TODO: is there a barrier which ensures that pending interrupts are
475 * recognised? Currently this just hopes that the CPU takes any pending
476 * interrupts between the enable and disable.
477 */
478 local_irq_enable();
479 local_irq_disable();
449 480
450 trace_kvm_out(vcpu);481 trace_kvm_out(vcpu);
451 guest_exit_irqoff();482 guest_timing_exit_irqoff();
452 local_irq_enable();483 local_irq_enable();
453 484
454out:485out:
@@ -1168,7 +1199,7 @@ static void kvm_mips_set_c0_status(void) · 713 unmodified lines
1168/*1199/*
1169 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)1200 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
1170 */1201 */
1171int kvm_mips_handle_exit(struct kvm_vcpu *vcpu)1202static int __kvm_mips_handle_exit(struct kvm_vcpu *vcpu)
1172{1203{
1173 struct kvm_run *run = vcpu->run;1204 struct kvm_run *run = vcpu->run;
1174 u32 cause = vcpu->arch.host_cp0_cause;1205 u32 cause = vcpu->arch.host_cp0_cause;
@@ -1357,6 +1388,17 @@ int kvm_mips_handle_exit(struct kvm_vcpu *vcpu) · 182 unmodified lines
1357 return ret;1388 return ret;
1358}1389}
1359 1390
1391int noinstr kvm_mips_handle_exit(struct kvm_vcpu *vcpu)
1392{
1393 int ret;
1394
1395 guest_state_exit_irqoff();
1396 ret = __kvm_mips_handle_exit(vcpu);
1397 guest_state_enter_irqoff();
1398
1399 return ret;
1400}
1401
1360/* Enable FPU for guest and restore context */1402/* Enable FPU for guest and restore context */
1361void kvm_own_fpu(struct kvm_vcpu *vcpu)1403void kvm_own_fpu(struct kvm_vcpu *vcpu)
1362{1404{
arch/mips/kvm/vz.c+9−3
@@ -458,8 +458,8 @@ void kvm_vz_acquire_htimer(struct kvm_vcpu *vcpu) · 457 unmodified lines
458/**458/**
459 * _kvm_vz_save_htimer() - Switch to software emulation of guest timer.459 * _kvm_vz_save_htimer() - Switch to software emulation of guest timer.
460 * @vcpu: Virtual CPU.460 * @vcpu: Virtual CPU.
461 * @compare: Pointer to write compare value to.461 * @out_compare: Pointer to write compare value to.
462 * @cause: Pointer to write cause value to.462 * @out_cause: Pointer to write cause value to.
463 *463 *
464 * Save VZ guest timer state and switch to software emulation of guest CP0464 * Save VZ guest timer state and switch to software emulation of guest CP0
465 * timer. The hard timer must already be in use, so preemption should be465 * timer. The hard timer must already be in use, so preemption should be
@@ -1541,11 +1541,14 @@ static int kvm_trap_vz_handle_guest_exit(struct kvm_vcpu *vcpu) · 1075 unmodified lines
1541}1541}
1542 1542
1543/**1543/**
1544 * kvm_trap_vz_handle_cop_unusuable() - Guest used unusable coprocessor.1544 * kvm_trap_vz_handle_cop_unusable() - Guest used unusable coprocessor.
1545 * @vcpu: Virtual CPU context.1545 * @vcpu: Virtual CPU context.
1546 *1546 *
1547 * Handle when the guest attempts to use a coprocessor which hasn't been allowed1547 * Handle when the guest attempts to use a coprocessor which hasn't been allowed
1548 * by the root context.1548 * by the root context.
1549 *
1550 * Return: value indicating whether to resume the host or the guest
1551 * (RESUME_HOST or RESUME_GUEST)
1549 */1552 */
1550static int kvm_trap_vz_handle_cop_unusable(struct kvm_vcpu *vcpu)1553static int kvm_trap_vz_handle_cop_unusable(struct kvm_vcpu *vcpu)
1551{1554{
@@ -1592,6 +1595,9 @@ static int kvm_trap_vz_handle_cop_unusable(struct kvm_vcpu *vcpu) · 40 unmodified lines
1592 *1595 *
1593 * Handle when the guest attempts to use MSA when it is disabled in the root1596 * Handle when the guest attempts to use MSA when it is disabled in the root
1594 * context.1597 * context.
1598 *
1599 * Return: value indicating whether to resume the host or the guest
1600 * (RESUME_HOST or RESUME_GUEST)
1595 */1601 */
1596static int kvm_trap_vz_handle_msa_disabled(struct kvm_vcpu *vcpu)1602static int kvm_trap_vz_handle_msa_disabled(struct kvm_vcpu *vcpu)
1597{1603{
arch/mips/lib/csum_partial.S+2−2
@@ -347,7 +347,7 @@ EXPORT_SYMBOL(csum_partial) · 346 unmodified lines
347 .if \mode == LEGACY_MODE; \347 .if \mode == LEGACY_MODE; \
3489: insn reg, addr; \3489: insn reg, addr; \
349 .section __ex_table,"a"; \349 .section __ex_table,"a"; \
350 PTR 9b, .L_exc; \350 PTR_WD 9b, .L_exc; \
351 .previous; \351 .previous; \
352 /* This is enabled in EVA mode */ \352 /* This is enabled in EVA mode */ \
353 .else; \353 .else; \
@@ -356,7 +356,7 @@ EXPORT_SYMBOL(csum_partial) · 2 unmodified lines
356 ((\to == USEROP) && (type == ST_INSN)); \356 ((\to == USEROP) && (type == ST_INSN)); \
3579: __BUILD_EVA_INSN(insn##e, reg, addr); \3579: __BUILD_EVA_INSN(insn##e, reg, addr); \
358 .section __ex_table,"a"; \358 .section __ex_table,"a"; \
359 PTR 9b, .L_exc; \359 PTR_WD 9b, .L_exc; \
360 .previous; \360 .previous; \
361 .else; \361 .else; \
362 /* EVA without exception */ \362 /* EVA without exception */ \
arch/mips/lib/memcpy.S+2−2
@@ -116,7 +116,7 @@ · 115 unmodified lines
116 .if \mode == LEGACY_MODE; \116 .if \mode == LEGACY_MODE; \
1179: insn reg, addr; \1179: insn reg, addr; \
118 .section __ex_table,"a"; \118 .section __ex_table,"a"; \
119 PTR 9b, handler; \119 PTR_WD 9b, handler; \
120 .previous; \120 .previous; \
121 /* This is assembled in EVA mode */ \121 /* This is assembled in EVA mode */ \
122 .else; \122 .else; \
@@ -125,7 +125,7 @@ · 2 unmodified lines
125 ((\to == USEROP) && (type == ST_INSN)); \125 ((\to == USEROP) && (type == ST_INSN)); \
1269: __BUILD_EVA_INSN(insn##e, reg, addr); \1269: __BUILD_EVA_INSN(insn##e, reg, addr); \
127 .section __ex_table,"a"; \127 .section __ex_table,"a"; \
128 PTR 9b, handler; \128 PTR_WD 9b, handler; \
129 .previous; \129 .previous; \
130 .else; \130 .else; \
131 /* \131 /* \
arch/mips/lib/memset.S+1−1
@@ -52,7 +52,7 @@ · 51 unmodified lines
529: ___BUILD_EVA_INSN(insn, reg, addr); \529: ___BUILD_EVA_INSN(insn, reg, addr); \
53 .endif; \53 .endif; \
54 .section __ex_table,"a"; \54 .section __ex_table,"a"; \
55 PTR 9b, handler; \55 PTR_WD 9b, handler; \
56 .previous56 .previous
57 57
58 .macro f_fill64 dst, offset, val, fixup, mode58 .macro f_fill64 dst, offset, val, fixup, mode
arch/mips/lib/strncpy_user.S+2−2
@@ -15,7 +15,7 @@ · 14 unmodified lines
15#define EX(insn,reg,addr,handler) \15#define EX(insn,reg,addr,handler) \
169: insn reg, addr; \169: insn reg, addr; \
17 .section __ex_table,"a"; \17 .section __ex_table,"a"; \
18 PTR 9b, handler; \18 PTR_WD 9b, handler; \
19 .previous19 .previous
20 20
21/*21/*
@@ -59,7 +59,7 @@ LEAF(__strncpy_from_user_asm) · 37 unmodified lines
59 jr ra59 jr ra
60 60
61 .section __ex_table,"a"61 .section __ex_table,"a"
62 PTR 1b, .Lfault62 PTR_WD 1b, .Lfault
63 .previous63 .previous
64 64
65 EXPORT_SYMBOL(__strncpy_from_user_asm)65 EXPORT_SYMBOL(__strncpy_from_user_asm)
arch/mips/lib/strnlen_user.S+1−1
@@ -14,7 +14,7 @@ · 13 unmodified lines
14#define EX(insn,reg,addr,handler) \14#define EX(insn,reg,addr,handler) \
159: insn reg, addr; \159: insn reg, addr; \
16 .section __ex_table,"a"; \16 .section __ex_table,"a"; \
17 PTR 9b, handler; \17 PTR_WD 9b, handler; \
18 .previous18 .previous
19 19
20/*20/*
arch/mips/loongson64/vbios_quirk.c+4−5
@@ -3,7 +3,7 @@ · 2 unmodified lines
3#include <linux/pci.h>3#include <linux/pci.h>
4#include <loongson.h>4#include <loongson.h>
5 5
6static void pci_fixup_radeon(struct pci_dev *pdev)6static void pci_fixup_video(struct pci_dev *pdev)
7{7{
8 struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];8 struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
9 9
@@ -22,8 +22,7 @@ static void pci_fixup_radeon(struct pci_dev *pdev) · 12 unmodified lines
22 res->flags = IORESOURCE_MEM | IORESOURCE_ROM_SHADOW |22 res->flags = IORESOURCE_MEM | IORESOURCE_ROM_SHADOW |
23 IORESOURCE_PCI_FIXED;23 IORESOURCE_PCI_FIXED;
24 24
25 dev_info(&pdev->dev, "BAR %d: assigned %pR for Radeon ROM\n",25 dev_info(&pdev->dev, "Video device with shadowed ROM at %pR\n", res);
26 PCI_ROM_RESOURCE, res);
27}26}
28DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_ATI, 0x9615,27DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_ATI, 0x9615,
29 PCI_CLASS_DISPLAY_VGA, 8, pci_fixup_radeon);28 PCI_CLASS_DISPLAY_VGA, 8, pci_fixup_video);
arch/parisc/include/asm/bitops.h+8−0
@@ -12,6 +12,14 @@ · 11 unmodified lines
12#include <asm/barrier.h>12#include <asm/barrier.h>
13#include <linux/atomic.h>13#include <linux/atomic.h>
14 14
15/* compiler build environment sanity checks: */
16#if !defined(CONFIG_64BIT) && defined(__LP64__)
17#error "Please use 'ARCH=parisc' to build the 32-bit kernel."
18#endif
19#if defined(CONFIG_64BIT) && !defined(__LP64__)
20#error "Please use 'ARCH=parisc64' to build the 64-bit kernel."
21#endif
22
15/* See http://marc.theaimsgroup.com/?t=108826637900003 for discussion23/* See http://marc.theaimsgroup.com/?t=108826637900003 for discussion
16 * on use of volatile and __*_bit() (set/clear/change):24 * on use of volatile and __*_bit() (set/clear/change):
17 * *_bit() want use of volatile.25 * *_bit() want use of volatile.
arch/parisc/include/asm/uaccess.h+15−14
@@ -89,8 +89,8 @@ struct exception_table_entry { · 88 unmodified lines
89 __asm__("1: " ldx " 0(" sr "%2),%0\n" \89 __asm__("1: " ldx " 0(" sr "%2),%0\n" \
90 "9:\n" \90 "9:\n" \
91 ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b) \91 ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b) \
92 : "=r"(__gu_val), "=r"(__gu_err) \92 : "=r"(__gu_val), "+r"(__gu_err) \
93 : "r"(ptr), "1"(__gu_err)); \93 : "r"(ptr)); \
94 \94 \
95 (val) = (__force __typeof__(*(ptr))) __gu_val; \95 (val) = (__force __typeof__(*(ptr))) __gu_val; \
96}96}
@@ -123,8 +123,8 @@ struct exception_table_entry { · 26 unmodified lines
123 "9:\n" \123 "9:\n" \
124 ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b) \124 ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b) \
125 ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 9b) \125 ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 9b) \
126 : "=&r"(__gu_tmp.l), "=r"(__gu_err) \126 : "=&r"(__gu_tmp.l), "+r"(__gu_err) \
127 : "r"(ptr), "1"(__gu_err)); \127 : "r"(ptr)); \
128 \128 \
129 (val) = __gu_tmp.t; \129 (val) = __gu_tmp.t; \
130}130}
@@ -135,13 +135,12 @@ struct exception_table_entry { · 4 unmodified lines
135#define __put_user_internal(sr, x, ptr) \135#define __put_user_internal(sr, x, ptr) \
136({ \136({ \
137 ASM_EXCEPTIONTABLE_VAR(__pu_err); \137 ASM_EXCEPTIONTABLE_VAR(__pu_err); \
138 __typeof__(*(ptr)) __x = (__typeof__(*(ptr)))(x); \
139 \138 \
140 switch (sizeof(*(ptr))) { \139 switch (sizeof(*(ptr))) { \
141 case 1: __put_user_asm(sr, "stb", __x, ptr); break; \140 case 1: __put_user_asm(sr, "stb", x, ptr); break; \
142 case 2: __put_user_asm(sr, "sth", __x, ptr); break; \141 case 2: __put_user_asm(sr, "sth", x, ptr); break; \
143 case 4: __put_user_asm(sr, "stw", __x, ptr); break; \142 case 4: __put_user_asm(sr, "stw", x, ptr); break; \
144 case 8: STD_USER(sr, __x, ptr); break; \143 case 8: STD_USER(sr, x, ptr); break; \
145 default: BUILD_BUG(); \144 default: BUILD_BUG(); \
146 } \145 } \
147 \146 \
@@ -150,7 +149,9 @@ struct exception_table_entry { · 2 unmodified lines
150 149
151#define __put_user(x, ptr) \150#define __put_user(x, ptr) \
152({ \151({ \
153 __put_user_internal("%%sr3,", x, ptr); \152 __typeof__(&*(ptr)) __ptr = ptr; \
153 __typeof__(*(__ptr)) __x = (__typeof__(*(__ptr)))(x); \
154 __put_user_internal("%%sr3,", __x, __ptr); \
154})155})
155 156
156#define __put_kernel_nofault(dst, src, type, err_label) \157#define __put_kernel_nofault(dst, src, type, err_label) \
@@ -180,8 +181,8 @@ struct exception_table_entry { · 23 unmodified lines
180 "1: " stx " %2,0(" sr "%1)\n" \181 "1: " stx " %2,0(" sr "%1)\n" \
181 "9:\n" \182 "9:\n" \
182 ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b) \183 ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b) \
183 : "=r"(__pu_err) \184 : "+r"(__pu_err) \
184 : "r"(ptr), "r"(x), "0"(__pu_err))185 : "r"(ptr), "r"(x))
185 186
186 187
187#if !defined(CONFIG_64BIT)188#if !defined(CONFIG_64BIT)
@@ -193,8 +194,8 @@ struct exception_table_entry { · 5 unmodified lines
193 "9:\n" \194 "9:\n" \
194 ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b) \195 ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b) \
195 ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 9b) \196 ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 9b) \
196 : "=r"(__pu_err) \197 : "+r"(__pu_err) \
197 : "r"(ptr), "r"(__val), "0"(__pu_err)); \198 : "r"(ptr), "r"(__val)); \
198} while (0)199} while (0)
199 200
200#endif /* !defined(CONFIG_64BIT) */201#endif /* !defined(CONFIG_64BIT) */
arch/parisc/lib/iomap.c+18−0
@@ -346,6 +346,16 @@ u64 ioread64be(const void __iomem *addr) · 345 unmodified lines
346 return *((u64 *)addr);346 return *((u64 *)addr);
347}347}
348 348
349u64 ioread64_lo_hi(const void __iomem *addr)
350{
351 u32 low, high;
352
353 low = ioread32(addr);
354 high = ioread32(addr + sizeof(u32));
355
356 return low + ((u64)high << 32);
357}
358
349u64 ioread64_hi_lo(const void __iomem *addr)359u64 ioread64_hi_lo(const void __iomem *addr)
350{360{
351 u32 low, high;361 u32 low, high;
@@ -419,6 +429,12 @@ void iowrite64be(u64 datum, void __iomem *addr) · 67 unmodified lines
419 }429 }
420}430}
421 431
432void iowrite64_lo_hi(u64 val, void __iomem *addr)
433{
434 iowrite32(val, addr);
435 iowrite32(val >> 32, addr + sizeof(u32));
436}
437
422void iowrite64_hi_lo(u64 val, void __iomem *addr)438void iowrite64_hi_lo(u64 val, void __iomem *addr)
423{439{
424 iowrite32(val >> 32, addr + sizeof(u32));440 iowrite32(val >> 32, addr + sizeof(u32));
@@ -530,6 +546,7 @@ EXPORT_SYMBOL(ioread32); · 105 unmodified lines
530EXPORT_SYMBOL(ioread32be);546EXPORT_SYMBOL(ioread32be);
531EXPORT_SYMBOL(ioread64);547EXPORT_SYMBOL(ioread64);
532EXPORT_SYMBOL(ioread64be);548EXPORT_SYMBOL(ioread64be);
549EXPORT_SYMBOL(ioread64_lo_hi);
533EXPORT_SYMBOL(ioread64_hi_lo);550EXPORT_SYMBOL(ioread64_hi_lo);
534EXPORT_SYMBOL(iowrite8);551EXPORT_SYMBOL(iowrite8);
535EXPORT_SYMBOL(iowrite16);552EXPORT_SYMBOL(iowrite16);
@@ -538,6 +555,7 @@ EXPORT_SYMBOL(iowrite32); · 2 unmodified lines
538EXPORT_SYMBOL(iowrite32be);555EXPORT_SYMBOL(iowrite32be);
539EXPORT_SYMBOL(iowrite64);556EXPORT_SYMBOL(iowrite64);
540EXPORT_SYMBOL(iowrite64be);557EXPORT_SYMBOL(iowrite64be);
558EXPORT_SYMBOL(iowrite64_lo_hi);
541EXPORT_SYMBOL(iowrite64_hi_lo);559EXPORT_SYMBOL(iowrite64_hi_lo);
542EXPORT_SYMBOL(ioread8_rep);560EXPORT_SYMBOL(ioread8_rep);
543EXPORT_SYMBOL(ioread16_rep);561EXPORT_SYMBOL(ioread16_rep);
arch/parisc/mm/init.c+4−5
@@ -337,9 +337,9 @@ static void __init setup_bootmem(void) · 336 unmodified lines
337 337
338static bool kernel_set_to_readonly;338static bool kernel_set_to_readonly;
339 339
340static void __init map_pages(unsigned long start_vaddr,340static void __ref map_pages(unsigned long start_vaddr,
341 unsigned long start_paddr, unsigned long size,341 unsigned long start_paddr, unsigned long size,
342 pgprot_t pgprot, int force)342 pgprot_t pgprot, int force)
343{343{
344 pmd_t *pmd;344 pmd_t *pmd;
345 pte_t *pg_table;345 pte_t *pg_table;
@@ -449,7 +449,7 @@ void __init set_kernel_text_rw(int enable_read_write) · 103 unmodified lines
449 flush_tlb_all();449 flush_tlb_all();
450}450}
451 451
452void __ref free_initmem(void)452void free_initmem(void)
453{453{
454 unsigned long init_begin = (unsigned long)__init_begin;454 unsigned long init_begin = (unsigned long)__init_begin;
455 unsigned long init_end = (unsigned long)__init_end;455 unsigned long init_end = (unsigned long)__init_end;
@@ -463,7 +463,6 @@ void __ref free_initmem(void) · 7 unmodified lines
463 /* The init text pages are marked R-X. We have to463 /* The init text pages are marked R-X. We have to
464 * flush the icache and mark them RW-464 * flush the icache and mark them RW-
465 *465 *
466 * This is tricky, because map_pages is in the init section.
467 * Do a dummy remap of the data section first (the data466 * Do a dummy remap of the data section first (the data
468 * section is already PAGE_KERNEL) to pull in the TLB entries467 * section is already PAGE_KERNEL) to pull in the TLB entries
469 * for map_kernel */468 * for map_kernel */
arch/powerpc/include/asm/book3s/32/mmu-hash.h+2−0
@@ -223,6 +223,8 @@ static __always_inline void update_user_segments(u32 val) · 222 unmodified lines
223 update_user_segment(15, val);223 update_user_segment(15, val);
224}224}
225 225
226int __init find_free_bat(void);
227unsigned int bat_block_size(unsigned long base, unsigned long top);
226#endif /* !__ASSEMBLY__ */228#endif /* !__ASSEMBLY__ */
227 229
228/* We happily ignore the smaller BATs on 601, we don't actually use230/* We happily ignore the smaller BATs on 601, we don't actually use
arch/powerpc/include/asm/book3s/32/pgtable.h+1−0
@@ -178,6 +178,7 @@ static inline bool pte_user(pte_t pte) · 177 unmodified lines
178#ifndef __ASSEMBLY__178#ifndef __ASSEMBLY__
179 179
180int map_kernel_page(unsigned long va, phys_addr_t pa, pgprot_t prot);180int map_kernel_page(unsigned long va, phys_addr_t pa, pgprot_t prot);
181void unmap_kernel_page(unsigned long va);
181 182
182#endif /* !__ASSEMBLY__ */183#endif /* !__ASSEMBLY__ */
183 184
arch/powerpc/include/asm/book3s/64/pgtable.h+2−0
@@ -1082,6 +1082,8 @@ static inline int map_kernel_page(unsigned long ea, unsigned long pa, pgprot_t p · 1081 unmodified lines
1082 return hash__map_kernel_page(ea, pa, prot);1082 return hash__map_kernel_page(ea, pa, prot);
1083}1083}
1084 1084
1085void unmap_kernel_page(unsigned long va);
1086
1085static inline int __meminit vmemmap_create_mapping(unsigned long start,1087static inline int __meminit vmemmap_create_mapping(unsigned long start,
1086 unsigned long page_size,1088 unsigned long page_size,
1087 unsigned long phys)1089 unsigned long phys)
arch/powerpc/include/asm/fixmap.h+4−2
@@ -111,8 +111,10 @@ static inline void __set_fixmap(enum fixed_addresses idx, · 110 unmodified lines
111 BUILD_BUG_ON(idx >= __end_of_fixed_addresses);111 BUILD_BUG_ON(idx >= __end_of_fixed_addresses);
112 else if (WARN_ON(idx >= __end_of_fixed_addresses))112 else if (WARN_ON(idx >= __end_of_fixed_addresses))
113 return;113 return;
114 114 if (pgprot_val(flags))
115 map_kernel_page(__fix_to_virt(idx), phys, flags);115 map_kernel_page(__fix_to_virt(idx), phys, flags);
116 else
117 unmap_kernel_page(__fix_to_virt(idx));
116}118}
117 119
118#define __early_set_fixmap __set_fixmap120#define __early_set_fixmap __set_fixmap
arch/powerpc/include/asm/hw_irq.h+1−1
@@ -473,7 +473,7 @@ static inline bool arch_irq_disabled_regs(struct pt_regs *regs) · 472 unmodified lines
473 return !(regs->msr & MSR_EE);473 return !(regs->msr & MSR_EE);
474}474}
475 475
476static inline bool should_hard_irq_enable(void)476static __always_inline bool should_hard_irq_enable(void)
477{477{
478 return false;478 return false;
479}479}
arch/powerpc/include/asm/kvm_book3s_64.h+0−1
@@ -39,7 +39,6 @@ struct kvm_nested_guest { · 38 unmodified lines
39 pgd_t *shadow_pgtable; /* our page table for this guest */39 pgd_t *shadow_pgtable; /* our page table for this guest */
40 u64 l1_gr_to_hr; /* L1's addr of part'n-scoped table */40 u64 l1_gr_to_hr; /* L1's addr of part'n-scoped table */
41 u64 process_table; /* process table entry for this guest */41 u64 process_table; /* process table entry for this guest */
42 u64 hfscr; /* HFSCR that the L1 requested for this nested guest */
43 long refcnt; /* number of pointers to this struct */42 long refcnt; /* number of pointers to this struct */
44 struct mutex tlb_lock; /* serialize page faults and tlbies */43 struct mutex tlb_lock; /* serialize page faults and tlbies */
45 struct kvm_nested_guest *next;44 struct kvm_nested_guest *next;
arch/powerpc/include/asm/kvm_host.h+1−0
@@ -818,6 +818,7 @@ struct kvm_vcpu_arch { · 817 unmodified lines
818 818
819 /* For support of nested guests */819 /* For support of nested guests */
820 struct kvm_nested_guest *nested;820 struct kvm_nested_guest *nested;
821 u64 nested_hfscr; /* HFSCR that the L1 requested for the nested guest */
821 u32 nested_vcpu_id;822 u32 nested_vcpu_id;
822 gpa_t nested_io_gpr;823 gpa_t nested_io_gpr;
823#endif824#endif
arch/powerpc/include/asm/nohash/32/pgtable.h+1−0
@@ -64,6 +64,7 @@ extern int icache_44x_need_flush; · 63 unmodified lines
64#ifndef __ASSEMBLY__64#ifndef __ASSEMBLY__
65 65
66int map_kernel_page(unsigned long va, phys_addr_t pa, pgprot_t prot);66int map_kernel_page(unsigned long va, phys_addr_t pa, pgprot_t prot);
67void unmap_kernel_page(unsigned long va);
67 68
68#endif /* !__ASSEMBLY__ */69#endif /* !__ASSEMBLY__ */
69 70
arch/powerpc/include/asm/nohash/64/pgtable.h+1−0
@@ -308,6 +308,7 @@ static inline void __ptep_set_access_flags(struct vm_area_struct *vma, · 307 unmodified lines
308#define __swp_entry_to_pte(x) __pte((x).val)308#define __swp_entry_to_pte(x) __pte((x).val)
309 309
310int map_kernel_page(unsigned long ea, unsigned long pa, pgprot_t prot);310int map_kernel_page(unsigned long ea, unsigned long pa, pgprot_t prot);
311void unmap_kernel_page(unsigned long va);
311extern int __meminit vmemmap_create_mapping(unsigned long start,312extern int __meminit vmemmap_create_mapping(unsigned long start,
312 unsigned long page_size,313 unsigned long page_size,
313 unsigned long phys);314 unsigned long phys);
arch/powerpc/include/asm/ppc-opcode.h+1−0
@@ -500,6 +500,7 @@ · 499 unmodified lines
500#define PPC_RAW_LDX(r, base, b) (0x7c00002a | ___PPC_RT(r) | ___PPC_RA(base) | ___PPC_RB(b))500#define PPC_RAW_LDX(r, base, b) (0x7c00002a | ___PPC_RT(r) | ___PPC_RA(base) | ___PPC_RB(b))
501#define PPC_RAW_LHZ(r, base, i) (0xa0000000 | ___PPC_RT(r) | ___PPC_RA(base) | IMM_L(i))501#define PPC_RAW_LHZ(r, base, i) (0xa0000000 | ___PPC_RT(r) | ___PPC_RA(base) | IMM_L(i))
502#define PPC_RAW_LHBRX(r, base, b) (0x7c00062c | ___PPC_RT(r) | ___PPC_RA(base) | ___PPC_RB(b))502#define PPC_RAW_LHBRX(r, base, b) (0x7c00062c | ___PPC_RT(r) | ___PPC_RA(base) | ___PPC_RB(b))
503#define PPC_RAW_LWBRX(r, base, b) (0x7c00042c | ___PPC_RT(r) | ___PPC_RA(base) | ___PPC_RB(b))
503#define PPC_RAW_LDBRX(r, base, b) (0x7c000428 | ___PPC_RT(r) | ___PPC_RA(base) | ___PPC_RB(b))504#define PPC_RAW_LDBRX(r, base, b) (0x7c000428 | ___PPC_RT(r) | ___PPC_RA(base) | ___PPC_RB(b))
504#define PPC_RAW_STWCX(s, a, b) (0x7c00012d | ___PPC_RS(s) | ___PPC_RA(a) | ___PPC_RB(b))505#define PPC_RAW_STWCX(s, a, b) (0x7c00012d | ___PPC_RS(s) | ___PPC_RA(a) | ___PPC_RB(b))
505#define PPC_RAW_CMPWI(a, i) (0x2c000000 | ___PPC_RA(a) | IMM_L(i))506#define PPC_RAW_CMPWI(a, i) (0x2c000000 | ___PPC_RA(a) | IMM_L(i))
arch/powerpc/include/asm/syscall.h+2−2
@@ -90,7 +90,7 @@ static inline void syscall_get_arguments(struct task_struct *task, · 89 unmodified lines
90 unsigned long val, mask = -1UL;90 unsigned long val, mask = -1UL;
91 unsigned int n = 6;91 unsigned int n = 6;
92 92
93 if (is_32bit_task())93 if (is_tsk_32bit_task(task))
94 mask = 0xffffffff;94 mask = 0xffffffff;
95 95
96 while (n--) {96 while (n--) {
@@ -105,7 +105,7 @@ static inline void syscall_get_arguments(struct task_struct *task, · 8 unmodified lines
105 105
106static inline int syscall_get_arch(struct task_struct *task)106static inline int syscall_get_arch(struct task_struct *task)
107{107{
108 if (is_32bit_task())108 if (is_tsk_32bit_task(task))
109 return AUDIT_ARCH_PPC;109 return AUDIT_ARCH_PPC;
110 else if (IS_ENABLED(CONFIG_CPU_LITTLE_ENDIAN))110 else if (IS_ENABLED(CONFIG_CPU_LITTLE_ENDIAN))
111 return AUDIT_ARCH_PPC64LE;111 return AUDIT_ARCH_PPC64LE;
arch/powerpc/include/asm/thread_info.h+2−0
@@ -168,8 +168,10 @@ static inline bool test_thread_local_flags(unsigned int flags) · 167 unmodified lines
168 168
169#ifdef CONFIG_COMPAT169#ifdef CONFIG_COMPAT
170#define is_32bit_task() (test_thread_flag(TIF_32BIT))170#define is_32bit_task() (test_thread_flag(TIF_32BIT))
171#define is_tsk_32bit_task(tsk) (test_tsk_thread_flag(tsk, TIF_32BIT))
171#else172#else
172#define is_32bit_task() (IS_ENABLED(CONFIG_PPC32))173#define is_32bit_task() (IS_ENABLED(CONFIG_PPC32))
174#define is_tsk_32bit_task(tsk) (IS_ENABLED(CONFIG_PPC32))
173#endif175#endif
174 176
175#if defined(CONFIG_PPC64)177#if defined(CONFIG_PPC64)
arch/powerpc/kernel/head_book3s_32.S+2−2
@@ -421,14 +421,14 @@ InstructionTLBMiss: · 420 unmodified lines
421 */421 */
422 /* Get PTE (linux-style) and check access */422 /* Get PTE (linux-style) and check access */
423 mfspr r3,SPRN_IMISS423 mfspr r3,SPRN_IMISS
424#ifdef CONFIG_MODULES424#if defined(CONFIG_MODULES) || defined(CONFIG_DEBUG_PAGEALLOC) || defined(CONFIG_KFENCE)
425 lis r1, TASK_SIZE@h /* check if kernel address */425 lis r1, TASK_SIZE@h /* check if kernel address */
426 cmplw 0,r1,r3426 cmplw 0,r1,r3
427#endif427#endif
428 mfspr r2, SPRN_SDR1428 mfspr r2, SPRN_SDR1
429 li r1,_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_EXEC | _PAGE_USER429 li r1,_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_EXEC | _PAGE_USER
430 rlwinm r2, r2, 28, 0xfffff000430 rlwinm r2, r2, 28, 0xfffff000
431#ifdef CONFIG_MODULES431#if defined(CONFIG_MODULES) || defined(CONFIG_DEBUG_PAGEALLOC) || defined(CONFIG_KFENCE)
432 bgt- 112f432 bgt- 112f
433 lis r2, (swapper_pg_dir - PAGE_OFFSET)@ha /* if kernel address, use */433 lis r2, (swapper_pg_dir - PAGE_OFFSET)@ha /* if kernel address, use */
434 li r1,_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_EXEC434 li r1,_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_EXEC
arch/powerpc/kernel/interrupt_64.S+2−0
@@ -30,6 +30,7 @@ COMPAT_SYS_CALL_TABLE: · 29 unmodified lines
30 .ifc \srr,srr30 .ifc \srr,srr
31 mfspr r11,SPRN_SRR031 mfspr r11,SPRN_SRR0
32 ld r12,_NIP(r1)32 ld r12,_NIP(r1)
33 clrrdi r11,r11,2
33 clrrdi r12,r12,234 clrrdi r12,r12,2
34100: tdne r11,r1235100: tdne r11,r12
35 EMIT_WARN_ENTRY 100b,__FILE__,__LINE__,(BUGFLAG_WARNING | BUGFLAG_ONCE)36 EMIT_WARN_ENTRY 100b,__FILE__,__LINE__,(BUGFLAG_WARNING | BUGFLAG_ONCE)
@@ -40,6 +41,7 @@ COMPAT_SYS_CALL_TABLE: · 4 unmodified lines
40 .else41 .else
41 mfspr r11,SPRN_HSRR042 mfspr r11,SPRN_HSRR0
42 ld r12,_NIP(r1)43 ld r12,_NIP(r1)
44 clrrdi r11,r11,2
43 clrrdi r12,r12,245 clrrdi r12,r12,2
44100: tdne r11,r1246100: tdne r11,r12
45 EMIT_WARN_ENTRY 100b,__FILE__,__LINE__,(BUGFLAG_WARNING | BUGFLAG_ONCE)47 EMIT_WARN_ENTRY 100b,__FILE__,__LINE__,(BUGFLAG_WARNING | BUGFLAG_ONCE)
arch/powerpc/kernel/time.c+3−2
@@ -649,8 +649,9 @@ DEFINE_INTERRUPT_HANDLER_ASYNC(timer_interrupt) · 648 unmodified lines
649 __this_cpu_inc(irq_stat.timer_irqs_event);649 __this_cpu_inc(irq_stat.timer_irqs_event);
650 } else {650 } else {
651 now = *next_tb - now;651 now = *next_tb - now;
652 if (now <= decrementer_max)652 if (now > decrementer_max)
653 set_dec_or_work(now);653 now = decrementer_max;
654 set_dec_or_work(now);
654 __this_cpu_inc(irq_stat.timer_irqs_others);655 __this_cpu_inc(irq_stat.timer_irqs_others);
655 }656 }
656 657
arch/powerpc/kvm/book3s_hv.c+1−2
@@ -1816,7 +1816,6 @@ static int kvmppc_handle_exit_hv(struct kvm_vcpu *vcpu, · 1815 unmodified lines
1816 1816
1817static int kvmppc_handle_nested_exit(struct kvm_vcpu *vcpu)1817static int kvmppc_handle_nested_exit(struct kvm_vcpu *vcpu)
1818{1818{
1819 struct kvm_nested_guest *nested = vcpu->arch.nested;
1820 int r;1819 int r;
1821 int srcu_idx;1820 int srcu_idx;
1822 1821
@@ -1922,7 +1921,7 @@ static int kvmppc_handle_nested_exit(struct kvm_vcpu *vcpu) · 99 unmodified lines
1922 * it into a HEAI.1921 * it into a HEAI.
1923 */1922 */
1924 if (!(vcpu->arch.hfscr_permitted & (1UL << cause)) ||1923 if (!(vcpu->arch.hfscr_permitted & (1UL << cause)) ||
1925 (nested->hfscr & (1UL << cause))) {1924 (vcpu->arch.nested_hfscr & (1UL << cause))) {
1926 vcpu->arch.trap = BOOK3S_INTERRUPT_H_EMUL_ASSIST;1925 vcpu->arch.trap = BOOK3S_INTERRUPT_H_EMUL_ASSIST;
1927 1926
1928 /*1927 /*
arch/powerpc/kvm/book3s_hv_nested.c+1−1
@@ -363,7 +363,7 @@ long kvmhv_enter_nested_guest(struct kvm_vcpu *vcpu) · 362 unmodified lines
363 /* set L1 state to L2 state */363 /* set L1 state to L2 state */
364 vcpu->arch.nested = l2;364 vcpu->arch.nested = l2;
365 vcpu->arch.nested_vcpu_id = l2_hv.vcpu_token;365 vcpu->arch.nested_vcpu_id = l2_hv.vcpu_token;
366 l2->hfscr = l2_hv.hfscr;366 vcpu->arch.nested_hfscr = l2_hv.hfscr;
367 vcpu->arch.regs = l2_regs;367 vcpu->arch.regs = l2_regs;
368 368
369 /* Guest must always run with ME enabled, HV disabled. */369 /* Guest must always run with ME enabled, HV disabled. */
arch/powerpc/lib/sstep.c+2−0
@@ -3264,12 +3264,14 @@ void emulate_update_regs(struct pt_regs *regs, struct instruction_op *op) · 3263 unmodified lines
3264 case BARRIER_EIEIO:3264 case BARRIER_EIEIO:
3265 eieio();3265 eieio();
3266 break;3266 break;
3267#ifdef CONFIG_PPC64
3267 case BARRIER_LWSYNC:3268 case BARRIER_LWSYNC:
3268 asm volatile("lwsync" : : : "memory");3269 asm volatile("lwsync" : : : "memory");
3269 break;3270 break;
3270 case BARRIER_PTESYNC:3271 case BARRIER_PTESYNC:
3271 asm volatile("ptesync" : : : "memory");3272 asm volatile("ptesync" : : : "memory");
3272 break;3273 break;
3274#endif
3273 }3275 }
3274 break;3276 break;
3275 3277
arch/powerpc/mm/book3s32/mmu.c+5−5
@@ -76,7 +76,7 @@ unsigned long p_block_mapped(phys_addr_t pa) · 75 unmodified lines
76 return 0;76 return 0;
77}77}
78 78
79static int __init find_free_bat(void)79int __init find_free_bat(void)
80{80{
81 int b;81 int b;
82 int n = mmu_has_feature(MMU_FTR_USE_HIGH_BATS) ? 8 : 4;82 int n = mmu_has_feature(MMU_FTR_USE_HIGH_BATS) ? 8 : 4;
@@ -100,7 +100,7 @@ static int __init find_free_bat(void) · 17 unmodified lines
100 * - block size has to be a power of two. This is calculated by finding the100 * - block size has to be a power of two. This is calculated by finding the
101 * highest bit set to 1.101 * highest bit set to 1.
102 */102 */
103static unsigned int block_size(unsigned long base, unsigned long top)103unsigned int bat_block_size(unsigned long base, unsigned long top)
104{104{
105 unsigned int max_size = SZ_256M;105 unsigned int max_size = SZ_256M;
106 unsigned int base_shift = (ffs(base) - 1) & 31;106 unsigned int base_shift = (ffs(base) - 1) & 31;
@@ -145,7 +145,7 @@ static unsigned long __init __mmu_mapin_ram(unsigned long base, unsigned long to · 38 unmodified lines
145 int idx;145 int idx;
146 146
147 while ((idx = find_free_bat()) != -1 && base != top) {147 while ((idx = find_free_bat()) != -1 && base != top) {
148 unsigned int size = block_size(base, top);148 unsigned int size = bat_block_size(base, top);
149 149
150 if (size < 128 << 10)150 if (size < 128 << 10)
151 break;151 break;
@@ -201,12 +201,12 @@ void mmu_mark_initmem_nx(void) · 49 unmodified lines
201 unsigned long size;201 unsigned long size;
202 202
203 for (i = 0; i < nb - 1 && base < top;) {203 for (i = 0; i < nb - 1 && base < top;) {
204 size = block_size(base, top);204 size = bat_block_size(base, top);
205 setibat(i++, PAGE_OFFSET + base, base, size, PAGE_KERNEL_TEXT);205 setibat(i++, PAGE_OFFSET + base, base, size, PAGE_KERNEL_TEXT);
206 base += size;206 base += size;
207 }207 }
208 if (base < top) {208 if (base < top) {
209 size = block_size(base, top);209 size = bat_block_size(base, top);
210 if ((top - base) > size) {210 if ((top - base) > size) {
211 size <<= 1;211 size <<= 1;
212 if (strict_kernel_rwx_enabled() && base + size > border)212 if (strict_kernel_rwx_enabled() && base + size > border)
arch/powerpc/mm/kasan/book3s_32.c+31−28
@@ -10,48 +10,51 @@ int __init kasan_init_region(void *start, size_t size) · 9 unmodified lines
10{10{
11 unsigned long k_start = (unsigned long)kasan_mem_to_shadow(start);11 unsigned long k_start = (unsigned long)kasan_mem_to_shadow(start);
12 unsigned long k_end = (unsigned long)kasan_mem_to_shadow(start + size);12 unsigned long k_end = (unsigned long)kasan_mem_to_shadow(start + size);
13 unsigned long k_cur = k_start;13 unsigned long k_nobat = k_start;
14 int k_size = k_end - k_start;14 unsigned long k_cur;
15 int k_size_base = 1 << (ffs(k_size) - 1);15 phys_addr_t phys;
16 int ret;16 int ret;
17 void *block;
18 17
19 block = memblock_alloc(k_size, k_size_base);18 while (k_nobat < k_end) {
20 19 unsigned int k_size = bat_block_size(k_nobat, k_end);
21 if (block && k_size_base >= SZ_128K && k_start == ALIGN(k_start, k_size_base)) {20 int idx = find_free_bat();
22 int shift = ffs(k_size - k_size_base);21
23 int k_size_more = shift ? 1 << (shift - 1) : 0;22 if (idx == -1)
24 23 break;
25 setbat(-1, k_start, __pa(block), k_size_base, PAGE_KERNEL);24 if (k_size < SZ_128K)
26 if (k_size_more >= SZ_128K)25 break;
27 setbat(-1, k_start + k_size_base, __pa(block) + k_size_base,26 phys = memblock_phys_alloc_range(k_size, k_size, 0,
28 k_size_more, PAGE_KERNEL);27 MEMBLOCK_ALLOC_ANYWHERE);
29 if (v_block_mapped(k_start))28 if (!phys)
30 k_cur = k_start + k_size_base;29 break;
31 if (v_block_mapped(k_start + k_size_base))30
32 k_cur = k_start + k_size_base + k_size_more;31 setbat(idx, k_nobat, phys, k_size, PAGE_KERNEL);
33 32 k_nobat += k_size;
34 update_bats();
35 }33 }
34 if (k_nobat != k_start)
35 update_bats();
36 36
37 if (!block)37 if (k_nobat < k_end) {
38 block = memblock_alloc(k_size, PAGE_SIZE);38 phys = memblock_phys_alloc_range(k_end - k_nobat, PAGE_SIZE, 0,
39 if (!block)39 MEMBLOCK_ALLOC_ANYWHERE);
40 return -ENOMEM;40 if (!phys)
41 return -ENOMEM;
42 }
41 43
42 ret = kasan_init_shadow_page_tables(k_start, k_end);44 ret = kasan_init_shadow_page_tables(k_start, k_end);
43 if (ret)45 if (ret)
44 return ret;46 return ret;
45 47
46 kasan_update_early_region(k_start, k_cur, __pte(0));48 kasan_update_early_region(k_start, k_nobat, __pte(0));
47 49
48 for (; k_cur < k_end; k_cur += PAGE_SIZE) {50 for (k_cur = k_nobat; k_cur < k_end; k_cur += PAGE_SIZE) {
49 pmd_t *pmd = pmd_off_k(k_cur);51 pmd_t *pmd = pmd_off_k(k_cur);
50 void *va = block + k_cur - k_start;52 pte_t pte = pfn_pte(PHYS_PFN(phys + k_cur - k_nobat), PAGE_KERNEL);
51 pte_t pte = pfn_pte(PHYS_PFN(__pa(va)), PAGE_KERNEL);
52 53
53 __set_pte_at(&init_mm, k_cur, pte_offset_kernel(pmd, k_cur), pte, 0);54 __set_pte_at(&init_mm, k_cur, pte_offset_kernel(pmd, k_cur), pte, 0);
54 }55 }
55 flush_tlb_kernel_range(k_start, k_end);56 flush_tlb_kernel_range(k_start, k_end);
57 memset(kasan_mem_to_shadow(start), 0, k_end - k_start);
58
56 return 0;59 return 0;
57}60}
arch/powerpc/mm/pgtable.c+9−0
@@ -206,6 +206,15 @@ void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, · 205 unmodified lines
206 __set_pte_at(mm, addr, ptep, pte, 0);206 __set_pte_at(mm, addr, ptep, pte, 0);
207}207}
208 208
209void unmap_kernel_page(unsigned long va)
210{
211 pmd_t *pmdp = pmd_off_k(va);
212 pte_t *ptep = pte_offset_kernel(pmdp, va);
213
214 pte_clear(&init_mm, va, ptep);
215 flush_tlb_kernel_range(va, va + PAGE_SIZE);
216}
217
209/*218/*
210 * This is called when relaxing access to a PTE. It's also called in the page219 * This is called when relaxing access to a PTE. It's also called in the page
211 * fault path when we don't hit any of the major fault cases, ie, a minor220 * fault path when we don't hit any of the major fault cases, ie, a minor
arch/powerpc/net/bpf_jit_comp.c+23−6
@@ -23,15 +23,15 @@ static void bpf_jit_fill_ill_insns(void *area, unsigned int size) · 22 unmodified lines
23 memset32(area, BREAKPOINT_INSTRUCTION, size / 4);23 memset32(area, BREAKPOINT_INSTRUCTION, size / 4);
24}24}
25 25
26/* Fix the branch target addresses for subprog calls */26/* Fix updated addresses (for subprog calls, ldimm64, et al) during extra pass */
27static int bpf_jit_fixup_subprog_calls(struct bpf_prog *fp, u32 *image,27static int bpf_jit_fixup_addresses(struct bpf_prog *fp, u32 *image,
28 struct codegen_context *ctx, u32 *addrs)28 struct codegen_context *ctx, u32 *addrs)
29{29{
30 const struct bpf_insn *insn = fp->insnsi;30 const struct bpf_insn *insn = fp->insnsi;
31 bool func_addr_fixed;31 bool func_addr_fixed;
32 u64 func_addr;32 u64 func_addr;
33 u32 tmp_idx;33 u32 tmp_idx;
34 int i, ret;34 int i, j, ret;
35 35
36 for (i = 0; i < fp->len; i++) {36 for (i = 0; i < fp->len; i++) {
37 /*37 /*
@@ -66,6 +66,23 @@ static int bpf_jit_fixup_subprog_calls(struct bpf_prog *fp, u32 *image, · 28 unmodified lines
66 * of the JITed sequence remains unchanged.66 * of the JITed sequence remains unchanged.
67 */67 */
68 ctx->idx = tmp_idx;68 ctx->idx = tmp_idx;
69 } else if (insn[i].code == (BPF_LD | BPF_IMM | BPF_DW)) {
70 tmp_idx = ctx->idx;
71 ctx->idx = addrs[i] / 4;
72#ifdef CONFIG_PPC32
73 PPC_LI32(ctx->b2p[insn[i].dst_reg] - 1, (u32)insn[i + 1].imm);
74 PPC_LI32(ctx->b2p[insn[i].dst_reg], (u32)insn[i].imm);
75 for (j = ctx->idx - addrs[i] / 4; j < 4; j++)
76 EMIT(PPC_RAW_NOP());
77#else
78 func_addr = ((u64)(u32)insn[i].imm) | (((u64)(u32)insn[i + 1].imm) << 32);
79 PPC_LI64(b2p[insn[i].dst_reg], func_addr);
80 /* overwrite rest with nops */
81 for (j = ctx->idx - addrs[i] / 4; j < 5; j++)
82 EMIT(PPC_RAW_NOP());
83#endif
84 ctx->idx = tmp_idx;
85 i++;
69 }86 }
70 }87 }
71 88
@@ -200,13 +217,13 @@ skip_init_ctx: · 128 unmodified lines
200 /*217 /*
201 * Do not touch the prologue and epilogue as they will remain218 * Do not touch the prologue and epilogue as they will remain
202 * unchanged. Only fix the branch target address for subprog219 * unchanged. Only fix the branch target address for subprog
203 * calls in the body.220 * calls in the body, and ldimm64 instructions.
204 *221 *
205 * This does not change the offsets and lengths of the subprog222 * This does not change the offsets and lengths of the subprog
206 * call instruction sequences and hence, the size of the JITed223 * call instruction sequences and hence, the size of the JITed
207 * image as well.224 * image as well.
208 */225 */
209 bpf_jit_fixup_subprog_calls(fp, code_base, &cgctx, addrs);226 bpf_jit_fixup_addresses(fp, code_base, &cgctx, addrs);
210 227
211 /* There is no need to perform the usual passes. */228 /* There is no need to perform the usual passes. */
212 goto skip_codegen_passes;229 goto skip_codegen_passes;
arch/powerpc/net/bpf_jit_comp32.c+9−0
@@ -191,6 +191,9 @@ void bpf_jit_emit_func_call_rel(u32 *image, struct codegen_context *ctx, u64 fun · 190 unmodified lines
191 191
192 if (image && rel < 0x2000000 && rel >= -0x2000000) {192 if (image && rel < 0x2000000 && rel >= -0x2000000) {
193 PPC_BL_ABS(func);193 PPC_BL_ABS(func);
194 EMIT(PPC_RAW_NOP());
195 EMIT(PPC_RAW_NOP());
196 EMIT(PPC_RAW_NOP());
194 } else {197 } else {
195 /* Load function address into r0 */198 /* Load function address into r0 */
196 EMIT(PPC_RAW_LIS(_R0, IMM_H(func)));199 EMIT(PPC_RAW_LIS(_R0, IMM_H(func)));
@@ -290,6 +293,8 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, struct codegen_context * · 93 unmodified lines
290 bool func_addr_fixed;293 bool func_addr_fixed;
291 u64 func_addr;294 u64 func_addr;
292 u32 true_cond;295 u32 true_cond;
296 u32 tmp_idx;
297 int j;
293 298
294 /*299 /*
295 * addrs[] maps a BPF bytecode address into a real offset from300 * addrs[] maps a BPF bytecode address into a real offset from
@@ -905,8 +910,12 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, struct codegen_context * · 609 unmodified lines
905 * 16 byte instruction that uses two 'struct bpf_insn'910 * 16 byte instruction that uses two 'struct bpf_insn'
906 */911 */
907 case BPF_LD | BPF_IMM | BPF_DW: /* dst = (u64) imm */912 case BPF_LD | BPF_IMM | BPF_DW: /* dst = (u64) imm */
913 tmp_idx = ctx->idx;
908 PPC_LI32(dst_reg_h, (u32)insn[i + 1].imm);914 PPC_LI32(dst_reg_h, (u32)insn[i + 1].imm);
909 PPC_LI32(dst_reg, (u32)insn[i].imm);915 PPC_LI32(dst_reg, (u32)insn[i].imm);
916 /* padding to allow full 4 instructions for later patching */
917 for (j = ctx->idx - tmp_idx; j < 4; j++)
918 EMIT(PPC_RAW_NOP());
910 /* Adjust for two bpf instructions */919 /* Adjust for two bpf instructions */
911 addrs[++i] = ctx->idx * 4;920 addrs[++i] = ctx->idx * 4;
912 break;921 break;
arch/powerpc/net/bpf_jit_comp64.c+19−10
@@ -319,6 +319,7 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, struct codegen_context * · 318 unmodified lines
319 u64 imm64;319 u64 imm64;
320 u32 true_cond;320 u32 true_cond;
321 u32 tmp_idx;321 u32 tmp_idx;
322 int j;
322 323
323 /*324 /*
324 * addrs[] maps a BPF bytecode address into a real offset from325 * addrs[] maps a BPF bytecode address into a real offset from
@@ -633,17 +634,21 @@ bpf_alu32_trunc: · 308 unmodified lines
633 EMIT(PPC_RAW_MR(dst_reg, b2p[TMP_REG_1]));634 EMIT(PPC_RAW_MR(dst_reg, b2p[TMP_REG_1]));
634 break;635 break;
635 case 64:636 case 64:
636 /*637 /* Store the value to stack and then use byte-reverse loads */
637 * Way easier and faster(?) to store the value
638 * into stack and then use ldbrx
639 *
640 * ctx->seen will be reliable in pass2, but
641 * the instructions generated will remain the
642 * same across all passes
643 */
644 PPC_BPF_STL(dst_reg, 1, bpf_jit_stack_local(ctx));638 PPC_BPF_STL(dst_reg, 1, bpf_jit_stack_local(ctx));
645 EMIT(PPC_RAW_ADDI(b2p[TMP_REG_1], 1, bpf_jit_stack_local(ctx)));639 EMIT(PPC_RAW_ADDI(b2p[TMP_REG_1], 1, bpf_jit_stack_local(ctx)));
646 EMIT(PPC_RAW_LDBRX(dst_reg, 0, b2p[TMP_REG_1]));640 if (cpu_has_feature(CPU_FTR_ARCH_206)) {
641 EMIT(PPC_RAW_LDBRX(dst_reg, 0, b2p[TMP_REG_1]));
642 } else {
643 EMIT(PPC_RAW_LWBRX(dst_reg, 0, b2p[TMP_REG_1]));
644 if (IS_ENABLED(CONFIG_CPU_LITTLE_ENDIAN))
645 EMIT(PPC_RAW_SLDI(dst_reg, dst_reg, 32));
646 EMIT(PPC_RAW_LI(b2p[TMP_REG_2], 4));
647 EMIT(PPC_RAW_LWBRX(b2p[TMP_REG_2], b2p[TMP_REG_2], b2p[TMP_REG_1]));
648 if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
649 EMIT(PPC_RAW_SLDI(b2p[TMP_REG_2], b2p[TMP_REG_2], 32));
650 EMIT(PPC_RAW_OR(dst_reg, dst_reg, b2p[TMP_REG_2]));
651 }
647 break;652 break;
648 }653 }
649 break;654 break;
@@ -848,9 +853,13 @@ emit_clear: · 198 unmodified lines
848 case BPF_LD | BPF_IMM | BPF_DW: /* dst = (u64) imm */853 case BPF_LD | BPF_IMM | BPF_DW: /* dst = (u64) imm */
849 imm64 = ((u64)(u32) insn[i].imm) |854 imm64 = ((u64)(u32) insn[i].imm) |
850 (((u64)(u32) insn[i+1].imm) << 32);855 (((u64)(u32) insn[i+1].imm) << 32);
856 tmp_idx = ctx->idx;
857 PPC_LI64(dst_reg, imm64);
858 /* padding to allow full 5 instructions for later patching */
859 for (j = ctx->idx - tmp_idx; j < 5; j++)
860 EMIT(PPC_RAW_NOP());
851 /* Adjust for two bpf instructions */861 /* Adjust for two bpf instructions */
852 addrs[++i] = ctx->idx * 4;862 addrs[++i] = ctx->idx * 4;
853 PPC_LI64(dst_reg, imm64);
854 break;863 break;
855 864
856 /*865 /*
arch/powerpc/perf/core-book3s.c+42−33
@@ -776,6 +776,34 @@ static void pmao_restore_workaround(bool ebb) · 775 unmodified lines
776 mtspr(SPRN_PMC6, pmcs[5]);776 mtspr(SPRN_PMC6, pmcs[5]);
777}777}
778 778
779/*
780 * If the perf subsystem wants performance monitor interrupts as soon as
781 * possible (e.g., to sample the instruction address and stack chain),
782 * this should return true. The IRQ masking code can then enable MSR[EE]
783 * in some places (e.g., interrupt handlers) that allows PMI interrupts
784 * through to improve accuracy of profiles, at the cost of some performance.
785 *
786 * The PMU counters can be enabled by other means (e.g., sysfs raw SPR
787 * access), but in that case there is no need for prompt PMI handling.
788 *
789 * This currently returns true if any perf counter is being used. It
790 * could possibly return false if only events are being counted rather than
791 * samples being taken, but for now this is good enough.
792 */
793bool power_pmu_wants_prompt_pmi(void)
794{
795 struct cpu_hw_events *cpuhw;
796
797 /*
798 * This could simply test local_paca->pmcregs_in_use if that were not
799 * under ifdef KVM.
800 */
801 if (!ppmu)
802 return false;
803
804 cpuhw = this_cpu_ptr(&cpu_hw_events);
805 return cpuhw->n_events;
806}
779#endif /* CONFIG_PPC64 */807#endif /* CONFIG_PPC64 */
780 808
781static void perf_event_interrupt(struct pt_regs *regs);809static void perf_event_interrupt(struct pt_regs *regs);
@@ -1327,9 +1355,20 @@ static void power_pmu_disable(struct pmu *pmu) · 545 unmodified lines
1327 * Otherwise provide a warning if there is PMI pending, but1355 * Otherwise provide a warning if there is PMI pending, but
1328 * no counter is found overflown.1356 * no counter is found overflown.
1329 */1357 */
1330 if (any_pmc_overflown(cpuhw))1358 if (any_pmc_overflown(cpuhw)) {
1331 clear_pmi_irq_pending();1359 /*
1332 else1360 * Since power_pmu_disable runs under local_irq_save, it
1361 * could happen that code hits a PMC overflow without PMI
1362 * pending in paca. Hence only clear PMI pending if it was
1363 * set.
1364 *
1365 * If a PMI is pending, then MSR[EE] must be disabled (because
1366 * the masked PMI handler disabling EE). So it is safe to
1367 * call clear_pmi_irq_pending().
1368 */
1369 if (pmi_irq_pending())
1370 clear_pmi_irq_pending();
1371 } else
1333 WARN_ON(pmi_irq_pending());1372 WARN_ON(pmi_irq_pending());
1334 1373
1335 val = mmcra = cpuhw->mmcr.mmcra;1374 val = mmcra = cpuhw->mmcr.mmcra;
@@ -2438,36 +2477,6 @@ static void perf_event_interrupt(struct pt_regs *regs) · 1102 unmodified lines
2438 perf_sample_event_took(sched_clock() - start_clock);2477 perf_sample_event_took(sched_clock() - start_clock);
2439}2478}
2440 2479
2441/*
2442 * If the perf subsystem wants performance monitor interrupts as soon as
2443 * possible (e.g., to sample the instruction address and stack chain),
2444 * this should return true. The IRQ masking code can then enable MSR[EE]
2445 * in some places (e.g., interrupt handlers) that allows PMI interrupts
2446 * though to improve accuracy of profiles, at the cost of some performance.
2447 *
2448 * The PMU counters can be enabled by other means (e.g., sysfs raw SPR
2449 * access), but in that case there is no need for prompt PMI handling.
2450 *
2451 * This currently returns true if any perf counter is being used. It
2452 * could possibly return false if only events are being counted rather than
2453 * samples being taken, but for now this is good enough.
2454 */
2455bool power_pmu_wants_prompt_pmi(void)
2456{
2457 struct cpu_hw_events *cpuhw;
2458
2459 /*
2460 * This could simply test local_paca->pmcregs_in_use if that were not
2461 * under ifdef KVM.
2462 */
2463
2464 if (!ppmu)
2465 return false;
2466
2467 cpuhw = this_cpu_ptr(&cpu_hw_events);
2468 return cpuhw->n_events;
2469}
2470
2471static int power_pmu_prepare_cpu(unsigned int cpu)2480static int power_pmu_prepare_cpu(unsigned int cpu)
2472{2481{
2473 struct cpu_hw_events *cpuhw = &per_cpu(cpu_hw_events, cpu);2482 struct cpu_hw_events *cpuhw = &per_cpu(cpu_hw_events, cpu);
arch/riscv/Makefile+6−0
@@ -50,6 +50,12 @@ riscv-march-$(CONFIG_ARCH_RV32I) := rv32ima · 49 unmodified lines
50riscv-march-$(CONFIG_ARCH_RV64I) := rv64ima50riscv-march-$(CONFIG_ARCH_RV64I) := rv64ima
51riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd51riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd
52riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c52riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c
53
54# Newer binutils versions default to ISA spec version 20191213 which moves some
55# instructions from the I extension to the Zicsr and Zifencei extensions.
56toolchain-need-zicsr-zifencei := $(call cc-option-yn, -march=$(riscv-march-y)_zicsr_zifencei)
57riscv-march-$(toolchain-need-zicsr-zifencei) := $(riscv-march-y)_zicsr_zifencei
58
53KBUILD_CFLAGS += -march=$(subst fd,,$(riscv-march-y))59KBUILD_CFLAGS += -march=$(subst fd,,$(riscv-march-y))
54KBUILD_AFLAGS += -march=$(riscv-march-y)60KBUILD_AFLAGS += -march=$(riscv-march-y)
55 61
arch/riscv/kernel/cpu-hotplug.c+2−0
@@ -12,6 +12,7 @@ · 11 unmodified lines
12#include <linux/sched/hotplug.h>12#include <linux/sched/hotplug.h>
13#include <asm/irq.h>13#include <asm/irq.h>
14#include <asm/cpu_ops.h>14#include <asm/cpu_ops.h>
15#include <asm/numa.h>
15#include <asm/sbi.h>16#include <asm/sbi.h>
16 17
17bool cpu_has_hotplug(unsigned int cpu)18bool cpu_has_hotplug(unsigned int cpu)
@@ -40,6 +41,7 @@ int __cpu_disable(void) · 22 unmodified lines
40 return ret;41 return ret;
41 42
42 remove_cpu_topology(cpu);43 remove_cpu_topology(cpu);
44 numa_remove_cpu(cpu);
43 set_cpu_online(cpu, false);45 set_cpu_online(cpu, false);
44 irq_migrate_all_off_this_cpu();46 irq_migrate_all_off_this_cpu();
45 47
arch/riscv/kernel/head.S+5−6
@@ -22,14 +22,13 @@ · 21 unmodified lines
22 add \reg, \reg, t022 add \reg, \reg, t0
23.endm23.endm
24.macro XIP_FIXUP_FLASH_OFFSET reg24.macro XIP_FIXUP_FLASH_OFFSET reg
25 la t1, __data_loc25 la t0, __data_loc
26 li t0, XIP_OFFSET_MASK26 REG_L t1, _xip_phys_offset
27 and t1, t1, t027 sub \reg, \reg, t1
28 li t1, XIP_OFFSET28 add \reg, \reg, t0
29 sub t0, t0, t1
30 sub \reg, \reg, t0
31.endm29.endm
32_xip_fixup: .dword CONFIG_PHYS_RAM_BASE - CONFIG_XIP_PHYS_ADDR - XIP_OFFSET30_xip_fixup: .dword CONFIG_PHYS_RAM_BASE - CONFIG_XIP_PHYS_ADDR - XIP_OFFSET
31_xip_phys_offset: .dword CONFIG_XIP_PHYS_ADDR + XIP_OFFSET
33#else32#else
34.macro XIP_FIXUP_OFFSET reg33.macro XIP_FIXUP_OFFSET reg
35.endm34.endm
arch/riscv/kernel/sbi.c+47−25
@@ -5,6 +5,7 @@ · 4 unmodified lines
5 * Copyright (c) 2020 Western Digital Corporation or its affiliates.5 * Copyright (c) 2020 Western Digital Corporation or its affiliates.
6 */6 */
7 7
8#include <linux/bits.h>
8#include <linux/init.h>9#include <linux/init.h>
9#include <linux/pm.h>10#include <linux/pm.h>
10#include <linux/reboot.h>11#include <linux/reboot.h>
@@ -85,7 +86,7 @@ static unsigned long __sbi_v01_cpumask_to_hartmask(const struct cpumask *cpu_mas · 74 unmodified lines
85 pr_warn("Unable to send any request to hartid > BITS_PER_LONG for SBI v0.1\n");86 pr_warn("Unable to send any request to hartid > BITS_PER_LONG for SBI v0.1\n");
86 break;87 break;
87 }88 }
88 hmask |= 1 << hartid;89 hmask |= BIT(hartid);
89 }90 }
90 91
91 return hmask;92 return hmask;
@@ -160,7 +161,7 @@ static int __sbi_send_ipi_v01(const struct cpumask *cpu_mask) · 68 unmodified lines
160{161{
161 unsigned long hart_mask;162 unsigned long hart_mask;
162 163
163 if (!cpu_mask)164 if (!cpu_mask || cpumask_empty(cpu_mask))
164 cpu_mask = cpu_online_mask;165 cpu_mask = cpu_online_mask;
165 hart_mask = __sbi_v01_cpumask_to_hartmask(cpu_mask);166 hart_mask = __sbi_v01_cpumask_to_hartmask(cpu_mask);
166 167
@@ -176,7 +177,7 @@ static int __sbi_rfence_v01(int fid, const struct cpumask *cpu_mask, · 9 unmodified lines
176 int result = 0;177 int result = 0;
177 unsigned long hart_mask;178 unsigned long hart_mask;
178 179
179 if (!cpu_mask)180 if (!cpu_mask || cpumask_empty(cpu_mask))
180 cpu_mask = cpu_online_mask;181 cpu_mask = cpu_online_mask;
181 hart_mask = __sbi_v01_cpumask_to_hartmask(cpu_mask);182 hart_mask = __sbi_v01_cpumask_to_hartmask(cpu_mask);
182 183
@@ -249,26 +250,37 @@ static void __sbi_set_timer_v02(uint64_t stime_value) · 66 unmodified lines
249 250
250static int __sbi_send_ipi_v02(const struct cpumask *cpu_mask)251static int __sbi_send_ipi_v02(const struct cpumask *cpu_mask)
251{252{
252 unsigned long hartid, cpuid, hmask = 0, hbase = 0;253 unsigned long hartid, cpuid, hmask = 0, hbase = 0, htop = 0;
253 struct sbiret ret = {0};254 struct sbiret ret = {0};
254 int result;255 int result;
255 256
256 if (!cpu_mask)257 if (!cpu_mask || cpumask_empty(cpu_mask))
257 cpu_mask = cpu_online_mask;258 cpu_mask = cpu_online_mask;
258 259
259 for_each_cpu(cpuid, cpu_mask) {260 for_each_cpu(cpuid, cpu_mask) {
260 hartid = cpuid_to_hartid_map(cpuid);261 hartid = cpuid_to_hartid_map(cpuid);
261 if (hmask && ((hbase + BITS_PER_LONG) <= hartid)) {262 if (hmask) {
262 ret = sbi_ecall(SBI_EXT_IPI, SBI_EXT_IPI_SEND_IPI,263 if (hartid + BITS_PER_LONG <= htop ||
263 hmask, hbase, 0, 0, 0, 0);264 hbase + BITS_PER_LONG <= hartid) {
264 if (ret.error)265 ret = sbi_ecall(SBI_EXT_IPI,
265 goto ecall_failed;266 SBI_EXT_IPI_SEND_IPI, hmask,
266 hmask = 0;267 hbase, 0, 0, 0, 0);
267 hbase = 0;268 if (ret.error)
269 goto ecall_failed;
270 hmask = 0;
271 } else if (hartid < hbase) {
272 /* shift the mask to fit lower hartid */
273 hmask <<= hbase - hartid;
274 hbase = hartid;
275 }
268 }276 }
269 if (!hmask)277 if (!hmask) {
270 hbase = hartid;278 hbase = hartid;
271 hmask |= 1UL << (hartid - hbase);279 htop = hartid;
280 } else if (hartid > htop) {
281 htop = hartid;
282 }
283 hmask |= BIT(hartid - hbase);
272 }284 }
273 285
274 if (hmask) {286 if (hmask) {
@@ -344,25 +356,35 @@ static int __sbi_rfence_v02(int fid, const struct cpumask *cpu_mask, · 69 unmodified lines
344 unsigned long start, unsigned long size,356 unsigned long start, unsigned long size,
345 unsigned long arg4, unsigned long arg5)357 unsigned long arg4, unsigned long arg5)
346{358{
347 unsigned long hartid, cpuid, hmask = 0, hbase = 0;359 unsigned long hartid, cpuid, hmask = 0, hbase = 0, htop = 0;
348 int result;360 int result;
349 361
350 if (!cpu_mask)362 if (!cpu_mask || cpumask_empty(cpu_mask))
351 cpu_mask = cpu_online_mask;363 cpu_mask = cpu_online_mask;
352 364
353 for_each_cpu(cpuid, cpu_mask) {365 for_each_cpu(cpuid, cpu_mask) {
354 hartid = cpuid_to_hartid_map(cpuid);366 hartid = cpuid_to_hartid_map(cpuid);
355 if (hmask && ((hbase + BITS_PER_LONG) <= hartid)) {367 if (hmask) {
356 result = __sbi_rfence_v02_call(fid, hmask, hbase,368 if (hartid + BITS_PER_LONG <= htop ||
357 start, size, arg4, arg5);369 hbase + BITS_PER_LONG <= hartid) {
358 if (result)370 result = __sbi_rfence_v02_call(fid, hmask,
359 return result;371 hbase, start, size, arg4, arg5);
360 hmask = 0;372 if (result)
361 hbase = 0;373 return result;
374 hmask = 0;
375 } else if (hartid < hbase) {
376 /* shift the mask to fit lower hartid */
377 hmask <<= hbase - hartid;
378 hbase = hartid;
379 }
362 }380 }
363 if (!hmask)381 if (!hmask) {
364 hbase = hartid;382 hbase = hartid;
365 hmask |= 1UL << (hartid - hbase);383 htop = hartid;
384 } else if (hartid > htop) {
385 htop = hartid;
386 }
387 hmask |= BIT(hartid - hbase);
366 }388 }
367 389
368 if (hmask) {390 if (hmask) {
arch/riscv/kernel/stacktrace.c+5−4
@@ -22,15 +22,16 @@ void notrace walk_stackframe(struct task_struct *task, struct pt_regs *regs, · 21 unmodified lines
22 bool (*fn)(void *, unsigned long), void *arg)22 bool (*fn)(void *, unsigned long), void *arg)
23{23{
24 unsigned long fp, sp, pc;24 unsigned long fp, sp, pc;
25 int level = 0;
25 26
26 if (regs) {27 if (regs) {
27 fp = frame_pointer(regs);28 fp = frame_pointer(regs);
28 sp = user_stack_pointer(regs);29 sp = user_stack_pointer(regs);
29 pc = instruction_pointer(regs);30 pc = instruction_pointer(regs);
30 } else if (task == NULL || task == current) {31 } else if (task == NULL || task == current) {
31 fp = (unsigned long)__builtin_frame_address(1);32 fp = (unsigned long)__builtin_frame_address(0);
32 sp = (unsigned long)__builtin_frame_address(0);33 sp = sp_in_global;
33 pc = (unsigned long)__builtin_return_address(0);34 pc = (unsigned long)walk_stackframe;
34 } else {35 } else {
35 /* task blocked in __switch_to */36 /* task blocked in __switch_to */
36 fp = task->thread.s[0];37 fp = task->thread.s[0];
@@ -42,7 +43,7 @@ void notrace walk_stackframe(struct task_struct *task, struct pt_regs *regs, · 5 unmodified lines
42 unsigned long low, high;43 unsigned long low, high;
43 struct stackframe *frame;44 struct stackframe *frame;
44 45
45 if (unlikely(!__kernel_text_address(pc) || !fn(arg, pc)))46 if (unlikely(!__kernel_text_address(pc) || (level++ >= 1 && !fn(arg, pc))))
46 break;47 break;
47 48
48 /* Validate frame pointer */49 /* Validate frame pointer */
arch/riscv/kvm/vcpu.c+31−17
@@ -90,6 +90,7 @@ int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id) · 89 unmodified lines
90int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)90int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
91{91{
92 struct kvm_cpu_context *cntx;92 struct kvm_cpu_context *cntx;
93 struct kvm_vcpu_csr *reset_csr = &vcpu->arch.guest_reset_csr;
93 94
94 /* Mark this VCPU never ran */95 /* Mark this VCPU never ran */
95 vcpu->arch.ran_atleast_once = false;96 vcpu->arch.ran_atleast_once = false;
@@ -106,6 +107,9 @@ int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu) · 10 unmodified lines
106 cntx->hstatus |= HSTATUS_SPVP;107 cntx->hstatus |= HSTATUS_SPVP;
107 cntx->hstatus |= HSTATUS_SPV;108 cntx->hstatus |= HSTATUS_SPV;
108 109
110 /* By default, make CY, TM, and IR counters accessible in VU mode */
111 reset_csr->scounteren = 0x7;
112
109 /* Setup VCPU timer */113 /* Setup VCPU timer */
110 kvm_riscv_vcpu_timer_init(vcpu);114 kvm_riscv_vcpu_timer_init(vcpu);
111 115
@@ -699,6 +703,20 @@ static void kvm_riscv_update_hvip(struct kvm_vcpu *vcpu) · 587 unmodified lines
699 csr_write(CSR_HVIP, csr->hvip);703 csr_write(CSR_HVIP, csr->hvip);
700}704}
701 705
706/*
707 * Actually run the vCPU, entering an RCU extended quiescent state (EQS) while
708 * the vCPU is running.
709 *
710 * This must be noinstr as instrumentation may make use of RCU, and this is not
711 * safe during the EQS.
712 */
713static void noinstr kvm_riscv_vcpu_enter_exit(struct kvm_vcpu *vcpu)
714{
715 guest_state_enter_irqoff();
716 __kvm_riscv_switch_to(&vcpu->arch);
717 guest_state_exit_irqoff();
718}
719
702int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)720int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
703{721{
704 int ret;722 int ret;
@@ -790,9 +808,9 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) · 85 unmodified lines
790 continue;808 continue;
791 }809 }
792 810
793 guest_enter_irqoff();811 guest_timing_enter_irqoff();
794 812
795 __kvm_riscv_switch_to(&vcpu->arch);813 kvm_riscv_vcpu_enter_exit(vcpu);
796 814
797 vcpu->mode = OUTSIDE_GUEST_MODE;815 vcpu->mode = OUTSIDE_GUEST_MODE;
798 vcpu->stat.exits++;816 vcpu->stat.exits++;
@@ -812,25 +830,21 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) · 13 unmodified lines
812 kvm_riscv_vcpu_sync_interrupts(vcpu);830 kvm_riscv_vcpu_sync_interrupts(vcpu);
813 831
814 /*832 /*
815 * We may have taken a host interrupt in VS/VU-mode (i.e.833 * We must ensure that any pending interrupts are taken before
816 * while executing the guest). This interrupt is still834 * we exit guest timing so that timer ticks are accounted as
817 * pending, as we haven't serviced it yet!835 * guest time. Transiently unmask interrupts so that any
836 * pending interrupts are taken.
818 *837 *
819 * We're now back in HS-mode with interrupts disabled838 * There's no barrier which ensures that pending interrupts are
820 * so enabling the interrupts now will have the effect839 * recognised, so we just hope that the CPU takes any pending
821 * of taking the interrupt again, in HS-mode this time.840 * interrupts between the enable and disable.
822 */841 */
823 local_irq_enable();842 local_irq_enable();
843 local_irq_disable();
824 844
825 /*845 guest_timing_exit_irqoff();
826 * We do local_irq_enable() before calling guest_exit() so846
827 * that if a timer interrupt hits while running the guest847 local_irq_enable();
828 * we account that tick as being spent in the guest. We
829 * enable preemption after calling guest_exit() so that if
830 * we get preempted we make sure ticks after that is not
831 * counted as guest time.
832 */
833 guest_exit();
834 848
835 preempt_enable();849 preempt_enable();
836 850
arch/riscv/kvm/vcpu_sbi_base.c+2−1
@@ -9,6 +9,7 @@ · 8 unmodified lines
9#include <linux/errno.h>9#include <linux/errno.h>
10#include <linux/err.h>10#include <linux/err.h>
11#include <linux/kvm_host.h>11#include <linux/kvm_host.h>
12#include <linux/version.h>
12#include <asm/csr.h>13#include <asm/csr.h>
13#include <asm/sbi.h>14#include <asm/sbi.h>
14#include <asm/kvm_vcpu_timer.h>15#include <asm/kvm_vcpu_timer.h>
@@ -32,7 +33,7 @@ static int kvm_sbi_ext_base_handler(struct kvm_vcpu *vcpu, struct kvm_run *run, · 17 unmodified lines
32 *out_val = KVM_SBI_IMPID;33 *out_val = KVM_SBI_IMPID;
33 break;34 break;
34 case SBI_EXT_BASE_GET_IMP_VERSION:35 case SBI_EXT_BASE_GET_IMP_VERSION:
35 *out_val = 0;36 *out_val = LINUX_VERSION_CODE;
36 break;37 break;
37 case SBI_EXT_BASE_PROBE_EXT:38 case SBI_EXT_BASE_PROBE_EXT:
38 if ((cp->a0 >= SBI_EXT_EXPERIMENTAL_START &&39 if ((cp->a0 >= SBI_EXT_EXPERIMENTAL_START &&
arch/riscv/mm/extable.c+3−3
@@ -33,7 +33,7 @@ static inline void regs_set_gpr(struct pt_regs *regs, unsigned int offset, · 32 unmodified lines
33 if (unlikely(offset > MAX_REG_OFFSET))33 if (unlikely(offset > MAX_REG_OFFSET))
34 return;34 return;
35 35
36 if (!offset)36 if (offset)
37 *(unsigned long *)((unsigned long)regs + offset) = val;37 *(unsigned long *)((unsigned long)regs + offset) = val;
38}38}
39 39
@@ -43,8 +43,8 @@ static bool ex_handler_uaccess_err_zero(const struct exception_table_entry *ex, · 3 unmodified lines
43 int reg_err = FIELD_GET(EX_DATA_REG_ERR, ex->data);43 int reg_err = FIELD_GET(EX_DATA_REG_ERR, ex->data);
44 int reg_zero = FIELD_GET(EX_DATA_REG_ZERO, ex->data);44 int reg_zero = FIELD_GET(EX_DATA_REG_ZERO, ex->data);
45 45
46 regs_set_gpr(regs, reg_err, -EFAULT);46 regs_set_gpr(regs, reg_err * sizeof(unsigned long), -EFAULT);
47 regs_set_gpr(regs, reg_zero, 0);47 regs_set_gpr(regs, reg_zero * sizeof(unsigned long), 0);
48 48
49 regs->epc = get_ex_fixup(ex);49 regs->epc = get_ex_fixup(ex);
50 return true;50 return true;
arch/riscv/mm/init.c+2−0
@@ -232,6 +232,7 @@ static pmd_t __maybe_unused early_dtb_pmd[PTRS_PER_PMD] __initdata __aligned(PAG · 231 unmodified lines
232 232
233#ifdef CONFIG_XIP_KERNEL233#ifdef CONFIG_XIP_KERNEL
234#define pt_ops (*(struct pt_alloc_ops *)XIP_FIXUP(&pt_ops))234#define pt_ops (*(struct pt_alloc_ops *)XIP_FIXUP(&pt_ops))
235#define riscv_pfn_base (*(unsigned long *)XIP_FIXUP(&riscv_pfn_base))
235#define trampoline_pg_dir ((pgd_t *)XIP_FIXUP(trampoline_pg_dir))236#define trampoline_pg_dir ((pgd_t *)XIP_FIXUP(trampoline_pg_dir))
236#define fixmap_pte ((pte_t *)XIP_FIXUP(fixmap_pte))237#define fixmap_pte ((pte_t *)XIP_FIXUP(fixmap_pte))
237#define early_pg_dir ((pgd_t *)XIP_FIXUP(early_pg_dir))238#define early_pg_dir ((pgd_t *)XIP_FIXUP(early_pg_dir))
@@ -522,6 +523,7 @@ static uintptr_t __init best_map_size(phys_addr_t base, phys_addr_t size) · 284 unmodified lines
522}523}
523 524
524#ifdef CONFIG_XIP_KERNEL525#ifdef CONFIG_XIP_KERNEL
526#define phys_ram_base (*(phys_addr_t *)XIP_FIXUP(&phys_ram_base))
525extern char _xiprom[], _exiprom[], __data_loc;527extern char _xiprom[], _exiprom[], __data_loc;
526 528
527/* called from head.S with MMU off */529/* called from head.S with MMU off */
arch/s390/Kconfig+15−0
@@ -945,6 +945,9 @@ config S390_GUEST · 944 unmodified lines
945 945
946endmenu946endmenu
947 947
948config S390_MODULES_SANITY_TEST_HELPERS
949 def_bool n
950
948menu "Selftests"951menu "Selftests"
949 952
950config S390_UNWIND_SELFTEST953config S390_UNWIND_SELFTEST
@@ -971,4 +974,16 @@ config S390_KPROBES_SANITY_TEST · 20 unmodified lines
971 974
972 Say N if you are unsure.975 Say N if you are unsure.
973 976
977config S390_MODULES_SANITY_TEST
978 def_tristate n
979 depends on KUNIT
980 default KUNIT_ALL_TESTS
981 prompt "Enable s390 specific modules tests"
982 select S390_MODULES_SANITY_TEST_HELPERS
983 help
984 This option enables an s390 specific modules test. This option is
985 not useful for distributions or general kernels, but only for
986 kernel developers working on architecture code.
987
988 Say N if you are unsure.
974endmenu989endmenu
arch/s390/configs/debug_defconfig+10−10
@@ -63,6 +63,7 @@ CONFIG_APPLDATA_BASE=y · 62 unmodified lines
63CONFIG_KVM=m63CONFIG_KVM=m
64CONFIG_S390_UNWIND_SELFTEST=m64CONFIG_S390_UNWIND_SELFTEST=m
65CONFIG_S390_KPROBES_SANITY_TEST=m65CONFIG_S390_KPROBES_SANITY_TEST=m
66CONFIG_S390_MODULES_SANITY_TEST=m
66CONFIG_KPROBES=y67CONFIG_KPROBES=y
67CONFIG_JUMP_LABEL=y68CONFIG_JUMP_LABEL=y
68CONFIG_STATIC_KEYS_SELFTEST=y69CONFIG_STATIC_KEYS_SELFTEST=y
@@ -96,7 +97,6 @@ CONFIG_MEMORY_HOTPLUG=y · 27 unmodified lines
96CONFIG_MEMORY_HOTREMOVE=y97CONFIG_MEMORY_HOTREMOVE=y
97CONFIG_KSM=y98CONFIG_KSM=y
98CONFIG_TRANSPARENT_HUGEPAGE=y99CONFIG_TRANSPARENT_HUGEPAGE=y
99CONFIG_FRONTSWAP=y
100CONFIG_CMA_DEBUG=y100CONFIG_CMA_DEBUG=y
101CONFIG_CMA_DEBUGFS=y101CONFIG_CMA_DEBUGFS=y
102CONFIG_CMA_SYSFS=y102CONFIG_CMA_SYSFS=y
@@ -109,6 +109,7 @@ CONFIG_DEFERRED_STRUCT_PAGE_INIT=y · 6 unmodified lines
109CONFIG_IDLE_PAGE_TRACKING=y109CONFIG_IDLE_PAGE_TRACKING=y
110CONFIG_PERCPU_STATS=y110CONFIG_PERCPU_STATS=y
111CONFIG_GUP_TEST=y111CONFIG_GUP_TEST=y
112CONFIG_ANON_VMA_NAME=y
112CONFIG_NET=y113CONFIG_NET=y
113CONFIG_PACKET=y114CONFIG_PACKET=y
114CONFIG_PACKET_DIAG=m115CONFIG_PACKET_DIAG=m
@@ -116,7 +117,6 @@ CONFIG_UNIX=y · 1 unmodified line
116CONFIG_UNIX_DIAG=m117CONFIG_UNIX_DIAG=m
117CONFIG_XFRM_USER=m118CONFIG_XFRM_USER=m
118CONFIG_NET_KEY=m119CONFIG_NET_KEY=m
119CONFIG_NET_SWITCHDEV=y
120CONFIG_SMC=m120CONFIG_SMC=m
121CONFIG_SMC_DIAG=m121CONFIG_SMC_DIAG=m
122CONFIG_INET=y122CONFIG_INET=y
@@ -185,7 +185,6 @@ CONFIG_NF_CT_NETLINK_TIMEOUT=m · 62 unmodified lines
185CONFIG_NF_TABLES=m185CONFIG_NF_TABLES=m
186CONFIG_NF_TABLES_INET=y186CONFIG_NF_TABLES_INET=y
187CONFIG_NFT_CT=m187CONFIG_NFT_CT=m
188CONFIG_NFT_COUNTER=m
189CONFIG_NFT_LOG=m188CONFIG_NFT_LOG=m
190CONFIG_NFT_LIMIT=m189CONFIG_NFT_LIMIT=m
191CONFIG_NFT_NAT=m190CONFIG_NFT_NAT=m
@@ -391,6 +390,7 @@ CONFIG_OPENVSWITCH=m · 199 unmodified lines
391CONFIG_VSOCKETS=m390CONFIG_VSOCKETS=m
392CONFIG_VIRTIO_VSOCKETS=m391CONFIG_VIRTIO_VSOCKETS=m
393CONFIG_NETLINK_DIAG=m392CONFIG_NETLINK_DIAG=m
393CONFIG_NET_SWITCHDEV=y
394CONFIG_CGROUP_NET_PRIO=y394CONFIG_CGROUP_NET_PRIO=y
395CONFIG_NET_PKTGEN=m395CONFIG_NET_PKTGEN=m
396CONFIG_PCI=y396CONFIG_PCI=y
@@ -400,6 +400,7 @@ CONFIG_PCI_IOV=y · 3 unmodified lines
400CONFIG_HOTPLUG_PCI=y400CONFIG_HOTPLUG_PCI=y
401CONFIG_HOTPLUG_PCI_S390=y401CONFIG_HOTPLUG_PCI_S390=y
402CONFIG_DEVTMPFS=y402CONFIG_DEVTMPFS=y
403CONFIG_DEVTMPFS_SAFE=y
403CONFIG_CONNECTOR=y404CONFIG_CONNECTOR=y
404CONFIG_ZRAM=y405CONFIG_ZRAM=y
405CONFIG_BLK_DEV_LOOP=m406CONFIG_BLK_DEV_LOOP=m
@@ -501,6 +502,7 @@ CONFIG_NLMON=m · 95 unmodified lines
501# CONFIG_NET_VENDOR_DEC is not set502# CONFIG_NET_VENDOR_DEC is not set
502# CONFIG_NET_VENDOR_DLINK is not set503# CONFIG_NET_VENDOR_DLINK is not set
503# CONFIG_NET_VENDOR_EMULEX is not set504# CONFIG_NET_VENDOR_EMULEX is not set
505# CONFIG_NET_VENDOR_ENGLEDER is not set
504# CONFIG_NET_VENDOR_EZCHIP is not set506# CONFIG_NET_VENDOR_EZCHIP is not set
505# CONFIG_NET_VENDOR_GOOGLE is not set507# CONFIG_NET_VENDOR_GOOGLE is not set
506# CONFIG_NET_VENDOR_HUAWEI is not set508# CONFIG_NET_VENDOR_HUAWEI is not set
@@ -511,7 +513,6 @@ CONFIG_NLMON=m · 4 unmodified lines
511CONFIG_MLX4_EN=m513CONFIG_MLX4_EN=m
512CONFIG_MLX5_CORE=m514CONFIG_MLX5_CORE=m
513CONFIG_MLX5_CORE_EN=y515CONFIG_MLX5_CORE_EN=y
514CONFIG_MLX5_ESWITCH=y
515# CONFIG_NET_VENDOR_MICREL is not set516# CONFIG_NET_VENDOR_MICREL is not set
516# CONFIG_NET_VENDOR_MICROCHIP is not set517# CONFIG_NET_VENDOR_MICROCHIP is not set
517# CONFIG_NET_VENDOR_MICROSEMI is not set518# CONFIG_NET_VENDOR_MICROSEMI is not set
@@ -542,6 +543,7 @@ CONFIG_MLX5_ESWITCH=y · 24 unmodified lines
542# CONFIG_NET_VENDOR_SYNOPSYS is not set543# CONFIG_NET_VENDOR_SYNOPSYS is not set
543# CONFIG_NET_VENDOR_TEHUTI is not set544# CONFIG_NET_VENDOR_TEHUTI is not set
544# CONFIG_NET_VENDOR_TI is not set545# CONFIG_NET_VENDOR_TI is not set
546# CONFIG_NET_VENDOR_VERTEXCOM is not set
545# CONFIG_NET_VENDOR_VIA is not set547# CONFIG_NET_VENDOR_VIA is not set
546# CONFIG_NET_VENDOR_WIZNET is not set548# CONFIG_NET_VENDOR_WIZNET is not set
547# CONFIG_NET_VENDOR_XILINX is not set549# CONFIG_NET_VENDOR_XILINX is not set
@@ -592,6 +594,7 @@ CONFIG_VIRTIO_BALLOON=m · 44 unmodified lines
592CONFIG_VIRTIO_INPUT=y594CONFIG_VIRTIO_INPUT=y
593CONFIG_VHOST_NET=m595CONFIG_VHOST_NET=m
594CONFIG_VHOST_VSOCK=m596CONFIG_VHOST_VSOCK=m
597# CONFIG_SURFACE_PLATFORMS is not set
595CONFIG_S390_CCW_IOMMU=y598CONFIG_S390_CCW_IOMMU=y
596CONFIG_S390_AP_IOMMU=y599CONFIG_S390_AP_IOMMU=y
597CONFIG_EXT4_FS=y600CONFIG_EXT4_FS=y
@@ -756,9 +759,6 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m · 158 unmodified lines
756CONFIG_CRYPTO_USER_API_RNG=m759CONFIG_CRYPTO_USER_API_RNG=m
757CONFIG_CRYPTO_USER_API_AEAD=m760CONFIG_CRYPTO_USER_API_AEAD=m
758CONFIG_CRYPTO_STATS=y761CONFIG_CRYPTO_STATS=y
759CONFIG_CRYPTO_LIB_BLAKE2S=m
760CONFIG_CRYPTO_LIB_CURVE25519=m
761CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m
762CONFIG_ZCRYPT=m762CONFIG_ZCRYPT=m
763CONFIG_PKEY=m763CONFIG_PKEY=m
764CONFIG_CRYPTO_PAES_S390=m764CONFIG_CRYPTO_PAES_S390=m
@@ -774,6 +774,8 @@ CONFIG_CRYPTO_GHASH_S390=m · 9 unmodified lines
774CONFIG_CRYPTO_CRC32_S390=y774CONFIG_CRYPTO_CRC32_S390=y
775CONFIG_CRYPTO_DEV_VIRTIO=m775CONFIG_CRYPTO_DEV_VIRTIO=m
776CONFIG_CORDIC=m776CONFIG_CORDIC=m
777CONFIG_CRYPTO_LIB_CURVE25519=m
778CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m
777CONFIG_CRC32_SELFTEST=y779CONFIG_CRC32_SELFTEST=y
778CONFIG_CRC4=m780CONFIG_CRC4=m
779CONFIG_CRC7=m781CONFIG_CRC7=m
@@ -807,7 +809,6 @@ CONFIG_SLUB_DEBUG_ON=y · 27 unmodified lines
807CONFIG_SLUB_STATS=y809CONFIG_SLUB_STATS=y
808CONFIG_DEBUG_STACK_USAGE=y810CONFIG_DEBUG_STACK_USAGE=y
809CONFIG_DEBUG_VM=y811CONFIG_DEBUG_VM=y
810CONFIG_DEBUG_VM_VMACACHE=y
811CONFIG_DEBUG_VM_PGFLAGS=y812CONFIG_DEBUG_VM_PGFLAGS=y
812CONFIG_DEBUG_MEMORY_INIT=y813CONFIG_DEBUG_MEMORY_INIT=y
813CONFIG_MEMORY_NOTIFIER_ERROR_INJECT=m814CONFIG_MEMORY_NOTIFIER_ERROR_INJECT=m
@@ -819,12 +820,11 @@ CONFIG_PANIC_ON_OOPS=y · 5 unmodified lines
819CONFIG_DETECT_HUNG_TASK=y820CONFIG_DETECT_HUNG_TASK=y
820CONFIG_WQ_WATCHDOG=y821CONFIG_WQ_WATCHDOG=y
821CONFIG_TEST_LOCKUP=m822CONFIG_TEST_LOCKUP=m
822CONFIG_DEBUG_TIMEKEEPING=y
823CONFIG_PROVE_LOCKING=y823CONFIG_PROVE_LOCKING=y
824CONFIG_LOCK_STAT=y824CONFIG_LOCK_STAT=y
825CONFIG_DEBUG_LOCKDEP=y
826CONFIG_DEBUG_ATOMIC_SLEEP=y825CONFIG_DEBUG_ATOMIC_SLEEP=y
827CONFIG_DEBUG_LOCKING_API_SELFTESTS=y826CONFIG_DEBUG_LOCKING_API_SELFTESTS=y
827CONFIG_DEBUG_IRQFLAGS=y
828CONFIG_DEBUG_SG=y828CONFIG_DEBUG_SG=y
829CONFIG_DEBUG_NOTIFIERS=y829CONFIG_DEBUG_NOTIFIERS=y
830CONFIG_BUG_ON_DATA_CORRUPTION=y830CONFIG_BUG_ON_DATA_CORRUPTION=y
arch/s390/configs/defconfig+9−7
@@ -61,6 +61,7 @@ CONFIG_APPLDATA_BASE=y · 60 unmodified lines
61CONFIG_KVM=m61CONFIG_KVM=m
62CONFIG_S390_UNWIND_SELFTEST=m62CONFIG_S390_UNWIND_SELFTEST=m
63CONFIG_S390_KPROBES_SANITY_TEST=m63CONFIG_S390_KPROBES_SANITY_TEST=m
64CONFIG_S390_MODULES_SANITY_TEST=m
64CONFIG_KPROBES=y65CONFIG_KPROBES=y
65CONFIG_JUMP_LABEL=y66CONFIG_JUMP_LABEL=y
66# CONFIG_GCC_PLUGINS is not set67# CONFIG_GCC_PLUGINS is not set
@@ -91,7 +92,6 @@ CONFIG_MEMORY_HOTPLUG=y · 24 unmodified lines
91CONFIG_MEMORY_HOTREMOVE=y92CONFIG_MEMORY_HOTREMOVE=y
92CONFIG_KSM=y93CONFIG_KSM=y
93CONFIG_TRANSPARENT_HUGEPAGE=y94CONFIG_TRANSPARENT_HUGEPAGE=y
94CONFIG_FRONTSWAP=y
95CONFIG_CMA_SYSFS=y95CONFIG_CMA_SYSFS=y
96CONFIG_CMA_AREAS=796CONFIG_CMA_AREAS=7
97CONFIG_MEM_SOFT_DIRTY=y97CONFIG_MEM_SOFT_DIRTY=y
@@ -101,6 +101,7 @@ CONFIG_ZSMALLOC_STAT=y · 3 unmodified lines
101CONFIG_DEFERRED_STRUCT_PAGE_INIT=y101CONFIG_DEFERRED_STRUCT_PAGE_INIT=y
102CONFIG_IDLE_PAGE_TRACKING=y102CONFIG_IDLE_PAGE_TRACKING=y
103CONFIG_PERCPU_STATS=y103CONFIG_PERCPU_STATS=y
104CONFIG_ANON_VMA_NAME=y
104CONFIG_NET=y105CONFIG_NET=y
105CONFIG_PACKET=y106CONFIG_PACKET=y
106CONFIG_PACKET_DIAG=m107CONFIG_PACKET_DIAG=m
@@ -108,7 +109,6 @@ CONFIG_UNIX=y · 1 unmodified line
108CONFIG_UNIX_DIAG=m109CONFIG_UNIX_DIAG=m
109CONFIG_XFRM_USER=m110CONFIG_XFRM_USER=m
110CONFIG_NET_KEY=m111CONFIG_NET_KEY=m
111CONFIG_NET_SWITCHDEV=y
112CONFIG_SMC=m112CONFIG_SMC=m
113CONFIG_SMC_DIAG=m113CONFIG_SMC_DIAG=m
114CONFIG_INET=y114CONFIG_INET=y
@@ -177,7 +177,6 @@ CONFIG_NF_CT_NETLINK_TIMEOUT=m · 62 unmodified lines
177CONFIG_NF_TABLES=m177CONFIG_NF_TABLES=m
178CONFIG_NF_TABLES_INET=y178CONFIG_NF_TABLES_INET=y
179CONFIG_NFT_CT=m179CONFIG_NFT_CT=m
180CONFIG_NFT_COUNTER=m
181CONFIG_NFT_LOG=m180CONFIG_NFT_LOG=m
182CONFIG_NFT_LIMIT=m181CONFIG_NFT_LIMIT=m
183CONFIG_NFT_NAT=m182CONFIG_NFT_NAT=m
@@ -382,6 +381,7 @@ CONFIG_OPENVSWITCH=m · 198 unmodified lines
382CONFIG_VSOCKETS=m381CONFIG_VSOCKETS=m
383CONFIG_VIRTIO_VSOCKETS=m382CONFIG_VIRTIO_VSOCKETS=m
384CONFIG_NETLINK_DIAG=m383CONFIG_NETLINK_DIAG=m
384CONFIG_NET_SWITCHDEV=y
385CONFIG_CGROUP_NET_PRIO=y385CONFIG_CGROUP_NET_PRIO=y
386CONFIG_NET_PKTGEN=m386CONFIG_NET_PKTGEN=m
387CONFIG_PCI=y387CONFIG_PCI=y
@@ -391,6 +391,7 @@ CONFIG_HOTPLUG_PCI=y · 3 unmodified lines
391CONFIG_HOTPLUG_PCI_S390=y391CONFIG_HOTPLUG_PCI_S390=y
392CONFIG_UEVENT_HELPER=y392CONFIG_UEVENT_HELPER=y
393CONFIG_DEVTMPFS=y393CONFIG_DEVTMPFS=y
394CONFIG_DEVTMPFS_SAFE=y
394CONFIG_CONNECTOR=y395CONFIG_CONNECTOR=y
395CONFIG_ZRAM=y396CONFIG_ZRAM=y
396CONFIG_BLK_DEV_LOOP=m397CONFIG_BLK_DEV_LOOP=m
@@ -492,6 +493,7 @@ CONFIG_NLMON=m · 95 unmodified lines
492# CONFIG_NET_VENDOR_DEC is not set493# CONFIG_NET_VENDOR_DEC is not set
493# CONFIG_NET_VENDOR_DLINK is not set494# CONFIG_NET_VENDOR_DLINK is not set
494# CONFIG_NET_VENDOR_EMULEX is not set495# CONFIG_NET_VENDOR_EMULEX is not set
496# CONFIG_NET_VENDOR_ENGLEDER is not set
495# CONFIG_NET_VENDOR_EZCHIP is not set497# CONFIG_NET_VENDOR_EZCHIP is not set
496# CONFIG_NET_VENDOR_GOOGLE is not set498# CONFIG_NET_VENDOR_GOOGLE is not set
497# CONFIG_NET_VENDOR_HUAWEI is not set499# CONFIG_NET_VENDOR_HUAWEI is not set
@@ -502,7 +504,6 @@ CONFIG_NLMON=m · 4 unmodified lines
502CONFIG_MLX4_EN=m504CONFIG_MLX4_EN=m
503CONFIG_MLX5_CORE=m505CONFIG_MLX5_CORE=m
504CONFIG_MLX5_CORE_EN=y506CONFIG_MLX5_CORE_EN=y
505CONFIG_MLX5_ESWITCH=y
506# CONFIG_NET_VENDOR_MICREL is not set507# CONFIG_NET_VENDOR_MICREL is not set
507# CONFIG_NET_VENDOR_MICROCHIP is not set508# CONFIG_NET_VENDOR_MICROCHIP is not set
508# CONFIG_NET_VENDOR_MICROSEMI is not set509# CONFIG_NET_VENDOR_MICROSEMI is not set
@@ -533,6 +534,7 @@ CONFIG_MLX5_ESWITCH=y · 24 unmodified lines
533# CONFIG_NET_VENDOR_SYNOPSYS is not set534# CONFIG_NET_VENDOR_SYNOPSYS is not set
534# CONFIG_NET_VENDOR_TEHUTI is not set535# CONFIG_NET_VENDOR_TEHUTI is not set
535# CONFIG_NET_VENDOR_TI is not set536# CONFIG_NET_VENDOR_TI is not set
537# CONFIG_NET_VENDOR_VERTEXCOM is not set
536# CONFIG_NET_VENDOR_VIA is not set538# CONFIG_NET_VENDOR_VIA is not set
537# CONFIG_NET_VENDOR_WIZNET is not set539# CONFIG_NET_VENDOR_WIZNET is not set
538# CONFIG_NET_VENDOR_XILINX is not set540# CONFIG_NET_VENDOR_XILINX is not set
@@ -582,6 +584,7 @@ CONFIG_VIRTIO_BALLOON=m · 43 unmodified lines
582CONFIG_VIRTIO_INPUT=y584CONFIG_VIRTIO_INPUT=y
583CONFIG_VHOST_NET=m585CONFIG_VHOST_NET=m
584CONFIG_VHOST_VSOCK=m586CONFIG_VHOST_VSOCK=m
587# CONFIG_SURFACE_PLATFORMS is not set
585CONFIG_S390_CCW_IOMMU=y588CONFIG_S390_CCW_IOMMU=y
586CONFIG_S390_AP_IOMMU=y589CONFIG_S390_AP_IOMMU=y
587CONFIG_EXT4_FS=y590CONFIG_EXT4_FS=y
@@ -743,9 +746,6 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m · 155 unmodified lines
743CONFIG_CRYPTO_USER_API_RNG=m746CONFIG_CRYPTO_USER_API_RNG=m
744CONFIG_CRYPTO_USER_API_AEAD=m747CONFIG_CRYPTO_USER_API_AEAD=m
745CONFIG_CRYPTO_STATS=y748CONFIG_CRYPTO_STATS=y
746CONFIG_CRYPTO_LIB_BLAKE2S=m
747CONFIG_CRYPTO_LIB_CURVE25519=m
748CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m
749CONFIG_ZCRYPT=m749CONFIG_ZCRYPT=m
750CONFIG_PKEY=m750CONFIG_PKEY=m
751CONFIG_CRYPTO_PAES_S390=m751CONFIG_CRYPTO_PAES_S390=m
@@ -762,6 +762,8 @@ CONFIG_CRYPTO_CRC32_S390=y · 10 unmodified lines
762CONFIG_CRYPTO_DEV_VIRTIO=m762CONFIG_CRYPTO_DEV_VIRTIO=m
763CONFIG_CORDIC=m763CONFIG_CORDIC=m
764CONFIG_PRIME_NUMBERS=m764CONFIG_PRIME_NUMBERS=m
765CONFIG_CRYPTO_LIB_CURVE25519=m
766CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m
765CONFIG_CRC4=m767CONFIG_CRC4=m
766CONFIG_CRC7=m768CONFIG_CRC7=m
767CONFIG_CRC8=m769CONFIG_CRC8=m
arch/s390/configs/zfcpdump_defconfig+3−0
@@ -1,6 +1,7 @@
1# CONFIG_SWAP is not set1# CONFIG_SWAP is not set
2CONFIG_NO_HZ_IDLE=y2CONFIG_NO_HZ_IDLE=y
3CONFIG_HIGH_RES_TIMERS=y3CONFIG_HIGH_RES_TIMERS=y
4CONFIG_BPF_SYSCALL=y
4# CONFIG_CPU_ISOLATION is not set5# CONFIG_CPU_ISOLATION is not set
5# CONFIG_UTS_NS is not set6# CONFIG_UTS_NS is not set
6# CONFIG_TIME_NS is not set7# CONFIG_TIME_NS is not set
@@ -34,6 +35,7 @@ CONFIG_NET=y · 27 unmodified lines
34# CONFIG_PCPU_DEV_REFCNT is not set35# CONFIG_PCPU_DEV_REFCNT is not set
35# CONFIG_ETHTOOL_NETLINK is not set36# CONFIG_ETHTOOL_NETLINK is not set
36CONFIG_DEVTMPFS=y37CONFIG_DEVTMPFS=y
38CONFIG_DEVTMPFS_SAFE=y
37CONFIG_BLK_DEV_RAM=y39CONFIG_BLK_DEV_RAM=y
38# CONFIG_DCSSBLK is not set40# CONFIG_DCSSBLK is not set
39# CONFIG_DASD is not set41# CONFIG_DASD is not set
@@ -58,6 +60,7 @@ CONFIG_ZFCP=y · 18 unmodified lines
58# CONFIG_HID is not set60# CONFIG_HID is not set
59# CONFIG_VIRTIO_MENU is not set61# CONFIG_VIRTIO_MENU is not set
60# CONFIG_VHOST_MENU is not set62# CONFIG_VHOST_MENU is not set
63# CONFIG_SURFACE_PLATFORMS is not set
61# CONFIG_IOMMU_SUPPORT is not set64# CONFIG_IOMMU_SUPPORT is not set
62# CONFIG_DNOTIFY is not set65# CONFIG_DNOTIFY is not set
63# CONFIG_INOTIFY_USER is not set66# CONFIG_INOTIFY_USER is not set
arch/s390/hypfs/hypfs_vm.c+4−2
@@ -20,6 +20,7 @@ · 19 unmodified lines
20 20
21static char local_guest[] = " ";21static char local_guest[] = " ";
22static char all_guests[] = "* ";22static char all_guests[] = "* ";
23static char *all_groups = all_guests;
23static char *guest_query;24static char *guest_query;
24 25
25struct diag2fc_data {26struct diag2fc_data {
@@ -62,10 +63,11 @@ static int diag2fc(int size, char* query, void *addr) · 36 unmodified lines
62 63
63 memcpy(parm_list.userid, query, NAME_LEN);64 memcpy(parm_list.userid, query, NAME_LEN);
64 ASCEBC(parm_list.userid, NAME_LEN);65 ASCEBC(parm_list.userid, NAME_LEN);
65 parm_list.addr = (unsigned long) addr ;66 memcpy(parm_list.aci_grp, all_groups, NAME_LEN);
67 ASCEBC(parm_list.aci_grp, NAME_LEN);
68 parm_list.addr = (unsigned long)addr;
66 parm_list.size = size;69 parm_list.size = size;
67 parm_list.fmt = 0x02;70 parm_list.fmt = 0x02;
68 memset(parm_list.aci_grp, 0x40, NAME_LEN);
69 rc = -1;71 rc = -1;
70 72
71 diag_stat_inc(DIAG_STAT_X2FC);73 diag_stat_inc(DIAG_STAT_X2FC);
arch/s390/include/asm/uaccess.h+2−2
@@ -47,8 +47,6 @@ raw_copy_to_user(void __user *to, const void *from, unsigned long n); · 46 unmodified lines
47int __put_user_bad(void) __attribute__((noreturn));47int __put_user_bad(void) __attribute__((noreturn));
48int __get_user_bad(void) __attribute__((noreturn));48int __get_user_bad(void) __attribute__((noreturn));
49 49
50#ifdef CONFIG_HAVE_MARCH_Z10_FEATURES
51
52union oac {50union oac {
53 unsigned int val;51 unsigned int val;
54 struct {52 struct {
@@ -71,6 +69,8 @@ union oac { · 16 unmodified lines
71 };69 };
72};70};
73 71
72#ifdef CONFIG_HAVE_MARCH_Z10_FEATURES
73
74#define __put_get_user_asm(to, from, size, oac_spec) \74#define __put_get_user_asm(to, from, size, oac_spec) \
75({ \75({ \
76 int __rc; \76 int __rc; \
arch/s390/kernel/module.c+18−19
@@ -33,7 +33,7 @@ · 32 unmodified lines
33#define DEBUGP(fmt , ...)33#define DEBUGP(fmt , ...)
34#endif34#endif
35 35
36#define PLT_ENTRY_SIZE 2036#define PLT_ENTRY_SIZE 22
37 37
38void *module_alloc(unsigned long size)38void *module_alloc(unsigned long size)
39{39{
@@ -341,27 +341,26 @@ static int apply_rela(Elf_Rela *rela, Elf_Addr base, Elf_Sym *symtab, · 301 unmodified lines
341 case R_390_PLTOFF32: /* 32 bit offset from GOT to PLT. */341 case R_390_PLTOFF32: /* 32 bit offset from GOT to PLT. */
342 case R_390_PLTOFF64: /* 16 bit offset from GOT to PLT. */342 case R_390_PLTOFF64: /* 16 bit offset from GOT to PLT. */
343 if (info->plt_initialized == 0) {343 if (info->plt_initialized == 0) {
344 unsigned int insn[5];344 unsigned char insn[PLT_ENTRY_SIZE];
345 unsigned int *ip = me->core_layout.base +345 char *plt_base;
346 me->arch.plt_offset +346 char *ip;
347 info->plt_offset;347
348 348 plt_base = me->core_layout.base + me->arch.plt_offset;
349 insn[0] = 0x0d10e310; /* basr 1,0 */349 ip = plt_base + info->plt_offset;
350 insn[1] = 0x100a0004; /* lg 1,10(1) */350 *(int *)insn = 0x0d10e310; /* basr 1,0 */
351 *(int *)&insn[4] = 0x100c0004; /* lg 1,12(1) */
351 if (IS_ENABLED(CONFIG_EXPOLINE) && !nospec_disable) {352 if (IS_ENABLED(CONFIG_EXPOLINE) && !nospec_disable) {
352 unsigned int *ij;353 char *jump_r1;
353 ij = me->core_layout.base +354
354 me->arch.plt_offset +355 jump_r1 = plt_base + me->arch.plt_size -
355 me->arch.plt_size - PLT_ENTRY_SIZE;356 PLT_ENTRY_SIZE;
356 insn[2] = 0xa7f40000 + /* j __jump_r1 */357 /* brcl 0xf,__jump_r1 */
357 (unsigned int)(u16)358 *(short *)&insn[8] = 0xc0f4;
358 (((unsigned long) ij - 8 -359 *(int *)&insn[10] = (jump_r1 - (ip + 8)) / 2;
359 (unsigned long) ip) / 2);
360 } else {360 } else {
361 insn[2] = 0x07f10000; /* br %r1 */361 *(int *)&insn[8] = 0x07f10000; /* br %r1 */
362 }362 }
363 insn[3] = (unsigned int) (val >> 32);363 *(long *)&insn[14] = val;
364 insn[4] = (unsigned int) val;
365 364
366 write(ip, insn, sizeof(insn));365 write(ip, insn, sizeof(insn));
367 info->plt_initialized = 1;366 info->plt_initialized = 1;
arch/s390/kernel/nmi.c+22−5
@@ -264,7 +264,14 @@ static int notrace s390_validate_registers(union mci mci, int umode) · 263 unmodified lines
264 /* Validate vector registers */264 /* Validate vector registers */
265 union ctlreg0 cr0;265 union ctlreg0 cr0;
266 266
267 if (!mci.vr) {267 /*
268 * The vector validity must only be checked if not running a
269 * KVM guest. For KVM guests the machine check is forwarded by
270 * KVM and it is the responsibility of the guest to take
271 * appropriate actions. The host vector or FPU values have been
272 * saved by KVM and will be restored by KVM.
273 */
274 if (!mci.vr && !test_cpu_flag(CIF_MCCK_GUEST)) {
268 /*275 /*
269 * Vector registers can't be restored. If the kernel276 * Vector registers can't be restored. If the kernel
270 * currently uses vector registers the system is277 * currently uses vector registers the system is
@@ -307,11 +314,21 @@ static int notrace s390_validate_registers(union mci mci, int umode) · 36 unmodified lines
307 if (cr2.gse) {314 if (cr2.gse) {
308 if (!mci.gs) {315 if (!mci.gs) {
309 /*316 /*
310 * Guarded storage register can't be restored and317 * 2 cases:
311 * the current processes uses guarded storage.318 * - machine check in kernel or userspace
312 * It has to be terminated.319 * - machine check while running SIE (KVM guest)
320 * For kernel or userspace the userspace values of
321 * guarded storage control can not be recreated, the
322 * process must be terminated.
323 * For SIE the guest values of guarded storage can not
324 * be recreated. This is either due to a bug or due to
325 * GS being disabled in the guest. The guest will be
326 * notified by KVM code and the guests machine check
327 * handling must take care of this. The host values
328 * are saved by KVM and are not affected.
313 */329 */
314 kill_task = 1;330 if (!test_cpu_flag(CIF_MCCK_GUEST))
331 kill_task = 1;
315 } else {332 } else {
316 load_gs_cb((struct gs_cb *)mcesa->guarded_storage_save_area);333 load_gs_cb((struct gs_cb *)mcesa->guarded_storage_save_area);
317 }334 }
arch/s390/kvm/kvm-s390.c+2−0
@@ -4667,6 +4667,8 @@ static long kvm_s390_guest_sida_op(struct kvm_vcpu *vcpu, · 4666 unmodified lines
4667 return -EINVAL;4667 return -EINVAL;
4668 if (mop->size + mop->sida_offset > sida_size(vcpu->arch.sie_block))4668 if (mop->size + mop->sida_offset > sida_size(vcpu->arch.sie_block))
4669 return -E2BIG;4669 return -E2BIG;
4670 if (!kvm_s390_pv_cpu_is_protected(vcpu))
4671 return -EINVAL;
4670 4672
4671 switch (mop->op) {4673 switch (mop->op) {
4672 case KVM_S390_MEMOP_SIDA_READ:4674 case KVM_S390_MEMOP_SIDA_READ:
arch/s390/lib/Makefile+3−0
@@ -17,4 +17,7 @@ KASAN_SANITIZE_uaccess.o := n · 16 unmodified lines
17obj-$(CONFIG_S390_UNWIND_SELFTEST) += test_unwind.o17obj-$(CONFIG_S390_UNWIND_SELFTEST) += test_unwind.o
18CFLAGS_test_unwind.o += -fno-optimize-sibling-calls18CFLAGS_test_unwind.o += -fno-optimize-sibling-calls
19 19
20obj-$(CONFIG_S390_MODULES_SANITY_TEST) += test_modules.o
21obj-$(CONFIG_S390_MODULES_SANITY_TEST_HELPERS) += test_modules_helpers.o
22
20lib-$(CONFIG_FUNCTION_ERROR_INJECTION) += error-inject.o23lib-$(CONFIG_FUNCTION_ERROR_INJECTION) += error-inject.o
arch/s390/lib/test_modules.c+32−0
@@ -0,0 +1,32 @@
1// SPDX-License-Identifier: GPL-2.0+
2
3#include <kunit/test.h>
4#include <linux/module.h>
5
6#include "test_modules.h"
7
8/*
9 * Test that modules with many relocations are loaded properly.
10 */
11static void test_modules_many_vmlinux_relocs(struct kunit *test)
12{
13 int result = 0;
14
15#define CALL_RETURN(i) result += test_modules_return_ ## i()
16 REPEAT_10000(CALL_RETURN);
17 KUNIT_ASSERT_EQ(test, result, 49995000);
18}
19
20static struct kunit_case modules_testcases[] = {
21 KUNIT_CASE(test_modules_many_vmlinux_relocs),
22 {}
23};
24
25static struct kunit_suite modules_test_suite = {
26 .name = "modules_test_s390",
27 .test_cases = modules_testcases,
28};
29
30kunit_test_suites(&modules_test_suite);
31
32MODULE_LICENSE("GPL");
arch/s390/lib/test_modules.h+53−0
@@ -0,0 +1,53 @@
1/* SPDX-License-Identifier: GPL-2.0+ */
2#ifndef TEST_MODULES_H
3#define TEST_MODULES_H
4
5#define __REPEAT_10000_3(f, x) \
6 f(x ## 0); \
7 f(x ## 1); \
8 f(x ## 2); \
9 f(x ## 3); \
10 f(x ## 4); \
11 f(x ## 5); \
12 f(x ## 6); \
13 f(x ## 7); \
14 f(x ## 8); \
15 f(x ## 9)
16#define __REPEAT_10000_2(f, x) \
17 __REPEAT_10000_3(f, x ## 0); \
18 __REPEAT_10000_3(f, x ## 1); \
19 __REPEAT_10000_3(f, x ## 2); \
20 __REPEAT_10000_3(f, x ## 3); \
21 __REPEAT_10000_3(f, x ## 4); \
22 __REPEAT_10000_3(f, x ## 5); \
23 __REPEAT_10000_3(f, x ## 6); \
24 __REPEAT_10000_3(f, x ## 7); \
25 __REPEAT_10000_3(f, x ## 8); \
26 __REPEAT_10000_3(f, x ## 9)
27#define __REPEAT_10000_1(f, x) \
28 __REPEAT_10000_2(f, x ## 0); \
29 __REPEAT_10000_2(f, x ## 1); \
30 __REPEAT_10000_2(f, x ## 2); \
31 __REPEAT_10000_2(f, x ## 3); \
32 __REPEAT_10000_2(f, x ## 4); \
33 __REPEAT_10000_2(f, x ## 5); \
34 __REPEAT_10000_2(f, x ## 6); \
35 __REPEAT_10000_2(f, x ## 7); \
36 __REPEAT_10000_2(f, x ## 8); \
37 __REPEAT_10000_2(f, x ## 9)
38#define REPEAT_10000(f) \
39 __REPEAT_10000_1(f, 0); \
40 __REPEAT_10000_1(f, 1); \
41 __REPEAT_10000_1(f, 2); \
42 __REPEAT_10000_1(f, 3); \
43 __REPEAT_10000_1(f, 4); \
44 __REPEAT_10000_1(f, 5); \
45 __REPEAT_10000_1(f, 6); \
46 __REPEAT_10000_1(f, 7); \
47 __REPEAT_10000_1(f, 8); \
48 __REPEAT_10000_1(f, 9)
49
50#define DECLARE_RETURN(i) int test_modules_return_ ## i(void)
51REPEAT_10000(DECLARE_RETURN);
52
53#endif
arch/s390/lib/test_modules_helpers.c+13−0
@@ -0,0 +1,13 @@
1// SPDX-License-Identifier: GPL-2.0+
2
3#include <linux/export.h>
4
5#include "test_modules.h"
6
7#define DEFINE_RETURN(i) \
8 int test_modules_return_ ## i(void) \
9 { \
10 return 1 ## i - 10000; \
11 } \
12 EXPORT_SYMBOL_GPL(test_modules_return_ ## i)
13REPEAT_10000(DEFINE_RETURN);
arch/x86/Kconfig+1−0
@@ -186,6 +186,7 @@ config X86 · 185 unmodified lines
186 select HAVE_CONTEXT_TRACKING_OFFSTACK if HAVE_CONTEXT_TRACKING186 select HAVE_CONTEXT_TRACKING_OFFSTACK if HAVE_CONTEXT_TRACKING
187 select HAVE_C_RECORDMCOUNT187 select HAVE_C_RECORDMCOUNT
188 select HAVE_OBJTOOL_MCOUNT if STACK_VALIDATION188 select HAVE_OBJTOOL_MCOUNT if STACK_VALIDATION
189 select HAVE_BUILDTIME_MCOUNT_SORT
189 select HAVE_DEBUG_KMEMLEAK190 select HAVE_DEBUG_KMEMLEAK
190 select HAVE_DMA_CONTIGUOUS191 select HAVE_DMA_CONTIGUOUS
191 select HAVE_DYNAMIC_FTRACE192 select HAVE_DYNAMIC_FTRACE
arch/x86/crypto/blake2s-shash.c+2−2
@@ -18,12 +18,12 @@ · 17 unmodified lines
18static int crypto_blake2s_update_x86(struct shash_desc *desc,18static int crypto_blake2s_update_x86(struct shash_desc *desc,
19 const u8 *in, unsigned int inlen)19 const u8 *in, unsigned int inlen)
20{20{
21 return crypto_blake2s_update(desc, in, inlen, blake2s_compress);21 return crypto_blake2s_update(desc, in, inlen, false);
22}22}
23 23
24static int crypto_blake2s_final_x86(struct shash_desc *desc, u8 *out)24static int crypto_blake2s_final_x86(struct shash_desc *desc, u8 *out)
25{25{
26 return crypto_blake2s_final(desc, out, blake2s_compress);26 return crypto_blake2s_final(desc, out, false);
27}27}
28 28
29#define BLAKE2S_ALG(name, driver_name, digest_size) \29#define BLAKE2S_ALG(name, driver_name, digest_size) \
arch/x86/events/intel/core.c+28−0
@@ -4703,6 +4703,19 @@ static __initconst const struct x86_pmu intel_pmu = { · 4702 unmodified lines
4703 .lbr_read = intel_pmu_lbr_read_64,4703 .lbr_read = intel_pmu_lbr_read_64,
4704 .lbr_save = intel_pmu_lbr_save,4704 .lbr_save = intel_pmu_lbr_save,
4705 .lbr_restore = intel_pmu_lbr_restore,4705 .lbr_restore = intel_pmu_lbr_restore,
4706
4707 /*
4708 * SMM has access to all 4 rings and while traditionally SMM code only
4709 * ran in CPL0, 2021-era firmware is starting to make use of CPL3 in SMM.
4710 *
4711 * Since the EVENTSEL.{USR,OS} CPL filtering makes no distinction
4712 * between SMM or not, this results in what should be pure userspace
4713 * counters including SMM data.
4714 *
4715 * This is a clear privilege issue, therefore globally disable
4716 * counting SMM by default.
4717 */
4718 .attr_freeze_on_smi = 1,
4706};4719};
4707 4720
4708static __init void intel_clovertown_quirk(void)4721static __init void intel_clovertown_quirk(void)
@@ -6236,6 +6249,19 @@ __init int intel_pmu_init(void) · 1527 unmodified lines
6236 pmu->num_counters = x86_pmu.num_counters;6249 pmu->num_counters = x86_pmu.num_counters;
6237 pmu->num_counters_fixed = x86_pmu.num_counters_fixed;6250 pmu->num_counters_fixed = x86_pmu.num_counters_fixed;
6238 }6251 }
6252
6253 /*
6254 * Quirk: For some Alder Lake machine, when all E-cores are disabled in
6255 * a BIOS, the leaf 0xA will enumerate all counters of P-cores. However,
6256 * the X86_FEATURE_HYBRID_CPU is still set. The above codes will
6257 * mistakenly add extra counters for P-cores. Correct the number of
6258 * counters here.
6259 */
6260 if ((pmu->num_counters > 8) || (pmu->num_counters_fixed > 4)) {
6261 pmu->num_counters = x86_pmu.num_counters;
6262 pmu->num_counters_fixed = x86_pmu.num_counters_fixed;
6263 }
6264
6239 pmu->max_pebs_events = min_t(unsigned, MAX_PEBS_EVENTS, pmu->num_counters);6265 pmu->max_pebs_events = min_t(unsigned, MAX_PEBS_EVENTS, pmu->num_counters);
6240 pmu->unconstrained = (struct event_constraint)6266 pmu->unconstrained = (struct event_constraint)
6241 __EVENT_CONSTRAINT(0, (1ULL << pmu->num_counters) - 1,6267 __EVENT_CONSTRAINT(0, (1ULL << pmu->num_counters) - 1,
@@ -6340,6 +6366,8 @@ __init int intel_pmu_init(void) · 98 unmodified lines
6340 }6366 }
6341 6367
6342 if (x86_pmu.lbr_nr) {6368 if (x86_pmu.lbr_nr) {
6369 intel_pmu_lbr_init();
6370
6343 pr_cont("%d-deep LBR, ", x86_pmu.lbr_nr);6371 pr_cont("%d-deep LBR, ", x86_pmu.lbr_nr);
6344 6372
6345 /* only support branch_stack snapshot for perfmon >= v2 */6373 /* only support branch_stack snapshot for perfmon >= v2 */
arch/x86/events/intel/lbr.c+101−67
@@ -8,14 +8,6 @@ · 7 unmodified lines
8 8
9#include "../perf_event.h"9#include "../perf_event.h"
10 10
11static const enum {
12 LBR_EIP_FLAGS = 1,
13 LBR_TSX = 2,
14} lbr_desc[LBR_FORMAT_MAX_KNOWN + 1] = {
15 [LBR_FORMAT_EIP_FLAGS] = LBR_EIP_FLAGS,
16 [LBR_FORMAT_EIP_FLAGS2] = LBR_EIP_FLAGS | LBR_TSX,
17};
18
19/*11/*
20 * Intel LBR_SELECT bits12 * Intel LBR_SELECT bits
21 * Intel Vol3a, April 2011, Section 16.7 Table 16-1013 * Intel Vol3a, April 2011, Section 16.7 Table 16-10
@@ -243,7 +235,7 @@ void intel_pmu_lbr_reset_64(void) · 221 unmodified lines
243 for (i = 0; i < x86_pmu.lbr_nr; i++) {235 for (i = 0; i < x86_pmu.lbr_nr; i++) {
244 wrmsrl(x86_pmu.lbr_from + i, 0);236 wrmsrl(x86_pmu.lbr_from + i, 0);
245 wrmsrl(x86_pmu.lbr_to + i, 0);237 wrmsrl(x86_pmu.lbr_to + i, 0);
246 if (x86_pmu.intel_cap.lbr_format == LBR_FORMAT_INFO)238 if (x86_pmu.lbr_has_info)
247 wrmsrl(x86_pmu.lbr_info + i, 0);239 wrmsrl(x86_pmu.lbr_info + i, 0);
248 }240 }
249}241}
@@ -305,11 +297,10 @@ enum { · 55 unmodified lines
305 */297 */
306static inline bool lbr_from_signext_quirk_needed(void)298static inline bool lbr_from_signext_quirk_needed(void)
307{299{
308 int lbr_format = x86_pmu.intel_cap.lbr_format;
309 bool tsx_support = boot_cpu_has(X86_FEATURE_HLE) ||300 bool tsx_support = boot_cpu_has(X86_FEATURE_HLE) ||
310 boot_cpu_has(X86_FEATURE_RTM);301 boot_cpu_has(X86_FEATURE_RTM);
311 302
312 return !tsx_support && (lbr_desc[lbr_format] & LBR_TSX);303 return !tsx_support && x86_pmu.lbr_has_tsx;
313}304}
314 305
315static DEFINE_STATIC_KEY_FALSE(lbr_from_quirk_key);306static DEFINE_STATIC_KEY_FALSE(lbr_from_quirk_key);
@@ -427,12 +418,12 @@ rdlbr_all(struct lbr_entry *lbr, unsigned int idx, bool need_info) · 111 unmodified lines
427 418
428void intel_pmu_lbr_restore(void *ctx)419void intel_pmu_lbr_restore(void *ctx)
429{420{
430 bool need_info = x86_pmu.intel_cap.lbr_format == LBR_FORMAT_INFO;
431 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);421 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
432 struct x86_perf_task_context *task_ctx = ctx;422 struct x86_perf_task_context *task_ctx = ctx;
433 int i;423 bool need_info = x86_pmu.lbr_has_info;
434 unsigned lbr_idx, mask;
435 u64 tos = task_ctx->tos;424 u64 tos = task_ctx->tos;
425 unsigned lbr_idx, mask;
426 int i;
436 427
437 mask = x86_pmu.lbr_nr - 1;428 mask = x86_pmu.lbr_nr - 1;
438 for (i = 0; i < task_ctx->valid_lbrs; i++) {429 for (i = 0; i < task_ctx->valid_lbrs; i++) {
@@ -444,7 +435,7 @@ void intel_pmu_lbr_restore(void *ctx) · 5 unmodified lines
444 lbr_idx = (tos - i) & mask;435 lbr_idx = (tos - i) & mask;
445 wrlbr_from(lbr_idx, 0);436 wrlbr_from(lbr_idx, 0);
446 wrlbr_to(lbr_idx, 0);437 wrlbr_to(lbr_idx, 0);
447 if (x86_pmu.intel_cap.lbr_format == LBR_FORMAT_INFO)438 if (need_info)
448 wrlbr_info(lbr_idx, 0);439 wrlbr_info(lbr_idx, 0);
449 }440 }
450 441
@@ -519,9 +510,9 @@ static void __intel_pmu_lbr_restore(void *ctx) · 68 unmodified lines
519 510
520void intel_pmu_lbr_save(void *ctx)511void intel_pmu_lbr_save(void *ctx)
521{512{
522 bool need_info = x86_pmu.intel_cap.lbr_format == LBR_FORMAT_INFO;
523 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);513 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
524 struct x86_perf_task_context *task_ctx = ctx;514 struct x86_perf_task_context *task_ctx = ctx;
515 bool need_info = x86_pmu.lbr_has_info;
525 unsigned lbr_idx, mask;516 unsigned lbr_idx, mask;
526 u64 tos;517 u64 tos;
527 int i;518 int i;
@@ -816,7 +807,6 @@ void intel_pmu_lbr_read_64(struct cpu_hw_events *cpuc) · 288 unmodified lines
816{807{
817 bool need_info = false, call_stack = false;808 bool need_info = false, call_stack = false;
818 unsigned long mask = x86_pmu.lbr_nr - 1;809 unsigned long mask = x86_pmu.lbr_nr - 1;
819 int lbr_format = x86_pmu.intel_cap.lbr_format;
820 u64 tos = intel_pmu_lbr_tos();810 u64 tos = intel_pmu_lbr_tos();
821 int i;811 int i;
822 int out = 0;812 int out = 0;
@@ -831,9 +821,7 @@ void intel_pmu_lbr_read_64(struct cpu_hw_events *cpuc) · 8 unmodified lines
831 for (i = 0; i < num; i++) {821 for (i = 0; i < num; i++) {
832 unsigned long lbr_idx = (tos - i) & mask;822 unsigned long lbr_idx = (tos - i) & mask;
833 u64 from, to, mis = 0, pred = 0, in_tx = 0, abort = 0;823 u64 from, to, mis = 0, pred = 0, in_tx = 0, abort = 0;
834 int skip = 0;
835 u16 cycles = 0;824 u16 cycles = 0;
836 int lbr_flags = lbr_desc[lbr_format];
837 825
838 from = rdlbr_from(lbr_idx, NULL);826 from = rdlbr_from(lbr_idx, NULL);
839 to = rdlbr_to(lbr_idx, NULL);827 to = rdlbr_to(lbr_idx, NULL);
@@ -845,37 +833,39 @@ void intel_pmu_lbr_read_64(struct cpu_hw_events *cpuc) · 5 unmodified lines
845 if (call_stack && !from)833 if (call_stack && !from)
846 break;834 break;
847 835
848 if (lbr_format == LBR_FORMAT_INFO && need_info) {836 if (x86_pmu.lbr_has_info) {
849 u64 info;837 if (need_info) {
850 838 u64 info;
851 info = rdlbr_info(lbr_idx, NULL);839
852 mis = !!(info & LBR_INFO_MISPRED);840 info = rdlbr_info(lbr_idx, NULL);
853 pred = !mis;841 mis = !!(info & LBR_INFO_MISPRED);
854 in_tx = !!(info & LBR_INFO_IN_TX);842 pred = !mis;
855 abort = !!(info & LBR_INFO_ABORT);843 cycles = (info & LBR_INFO_CYCLES);
856 cycles = (info & LBR_INFO_CYCLES);844 if (x86_pmu.lbr_has_tsx) {
857 }845 in_tx = !!(info & LBR_INFO_IN_TX);
858 846 abort = !!(info & LBR_INFO_ABORT);
859 if (lbr_format == LBR_FORMAT_TIME) {847 }
860 mis = !!(from & LBR_FROM_FLAG_MISPRED);848 }
861 pred = !mis;849 } else {
862 skip = 1;850 int skip = 0;
863 cycles = ((to >> 48) & LBR_INFO_CYCLES);851
864 852 if (x86_pmu.lbr_from_flags) {
865 to = (u64)((((s64)to) << 16) >> 16);853 mis = !!(from & LBR_FROM_FLAG_MISPRED);
866 }854 pred = !mis;
867 855 skip = 1;
868 if (lbr_flags & LBR_EIP_FLAGS) {856 }
869 mis = !!(from & LBR_FROM_FLAG_MISPRED);857 if (x86_pmu.lbr_has_tsx) {
870 pred = !mis;858 in_tx = !!(from & LBR_FROM_FLAG_IN_TX);
871 skip = 1;859 abort = !!(from & LBR_FROM_FLAG_ABORT);
872 }860 skip = 3;
873 if (lbr_flags & LBR_TSX) {861 }
874 in_tx = !!(from & LBR_FROM_FLAG_IN_TX);862 from = (u64)((((s64)from) << skip) >> skip);
875 abort = !!(from & LBR_FROM_FLAG_ABORT);863
876 skip = 3;864 if (x86_pmu.lbr_to_cycles) {
865 cycles = ((to >> 48) & LBR_INFO_CYCLES);
866 to = (u64)((((s64)to) << 16) >> 16);
867 }
877 }868 }
878 from = (u64)((((s64)from) << skip) >> skip);
879 869
880 /*870 /*
881 * Some CPUs report duplicated abort records,871 * Some CPUs report duplicated abort records,
@@ -903,37 +893,40 @@ void intel_pmu_lbr_read_64(struct cpu_hw_events *cpuc) · 21 unmodified lines
903 cpuc->lbr_stack.hw_idx = tos;893 cpuc->lbr_stack.hw_idx = tos;
904}894}
905 895
896static DEFINE_STATIC_KEY_FALSE(x86_lbr_mispred);
897static DEFINE_STATIC_KEY_FALSE(x86_lbr_cycles);
898static DEFINE_STATIC_KEY_FALSE(x86_lbr_type);
899
906static __always_inline int get_lbr_br_type(u64 info)900static __always_inline int get_lbr_br_type(u64 info)
907{901{
908 if (!static_cpu_has(X86_FEATURE_ARCH_LBR) || !x86_pmu.lbr_br_type)902 int type = 0;
909 return 0;
910 903
911 return (info & LBR_INFO_BR_TYPE) >> LBR_INFO_BR_TYPE_OFFSET;904 if (static_branch_likely(&x86_lbr_type))
905 type = (info & LBR_INFO_BR_TYPE) >> LBR_INFO_BR_TYPE_OFFSET;
906
907 return type;
912}908}
913 909
914static __always_inline bool get_lbr_mispred(u64 info)910static __always_inline bool get_lbr_mispred(u64 info)
915{911{
916 if (static_cpu_has(X86_FEATURE_ARCH_LBR) && !x86_pmu.lbr_mispred)912 bool mispred = 0;
917 return 0;
918 913
919 return !!(info & LBR_INFO_MISPRED);914 if (static_branch_likely(&x86_lbr_mispred))
920}915 mispred = !!(info & LBR_INFO_MISPRED);
921 916
922static __always_inline bool get_lbr_predicted(u64 info)917 return mispred;
923{
924 if (static_cpu_has(X86_FEATURE_ARCH_LBR) && !x86_pmu.lbr_mispred)
925 return 0;
926
927 return !(info & LBR_INFO_MISPRED);
928}918}
929 919
930static __always_inline u16 get_lbr_cycles(u64 info)920static __always_inline u16 get_lbr_cycles(u64 info)
931{921{
922 u16 cycles = info & LBR_INFO_CYCLES;
923
932 if (static_cpu_has(X86_FEATURE_ARCH_LBR) &&924 if (static_cpu_has(X86_FEATURE_ARCH_LBR) &&
933 !(x86_pmu.lbr_timed_lbr && info & LBR_INFO_CYC_CNT_VALID))925 (!static_branch_likely(&x86_lbr_cycles) ||
934 return 0;926 !(info & LBR_INFO_CYC_CNT_VALID)))
927 cycles = 0;
935 928
936 return info & LBR_INFO_CYCLES;929 return cycles;
937}930}
938 931
939static void intel_pmu_store_lbr(struct cpu_hw_events *cpuc,932static void intel_pmu_store_lbr(struct cpu_hw_events *cpuc,
@@ -961,7 +954,7 @@ static void intel_pmu_store_lbr(struct cpu_hw_events *cpuc, · 21 unmodified lines
961 e->from = from;954 e->from = from;
962 e->to = to;955 e->to = to;
963 e->mispred = get_lbr_mispred(info);956 e->mispred = get_lbr_mispred(info);
964 e->predicted = get_lbr_predicted(info);957 e->predicted = !e->mispred;
965 e->in_tx = !!(info & LBR_INFO_IN_TX);958 e->in_tx = !!(info & LBR_INFO_IN_TX);
966 e->abort = !!(info & LBR_INFO_ABORT);959 e->abort = !!(info & LBR_INFO_ABORT);
967 e->cycles = get_lbr_cycles(info);960 e->cycles = get_lbr_cycles(info);
@@ -1120,7 +1113,7 @@ static int intel_pmu_setup_hw_lbr_filter(struct perf_event *event) · 152 unmodified lines
1120 1113
1121 if ((br_type & PERF_SAMPLE_BRANCH_NO_CYCLES) &&1114 if ((br_type & PERF_SAMPLE_BRANCH_NO_CYCLES) &&
1122 (br_type & PERF_SAMPLE_BRANCH_NO_FLAGS) &&1115 (br_type & PERF_SAMPLE_BRANCH_NO_FLAGS) &&
1123 (x86_pmu.intel_cap.lbr_format == LBR_FORMAT_INFO))1116 x86_pmu.lbr_has_info)
1124 reg->config |= LBR_NO_INFO;1117 reg->config |= LBR_NO_INFO;
1125 1118
1126 return 0;1119 return 0;
@@ -1706,6 +1699,38 @@ void intel_pmu_lbr_init_knl(void) · 579 unmodified lines
1706 x86_pmu.intel_cap.lbr_format = LBR_FORMAT_EIP_FLAGS;1699 x86_pmu.intel_cap.lbr_format = LBR_FORMAT_EIP_FLAGS;
1707}1700}
1708 1701
1702void intel_pmu_lbr_init(void)
1703{
1704 switch (x86_pmu.intel_cap.lbr_format) {
1705 case LBR_FORMAT_EIP_FLAGS2:
1706 x86_pmu.lbr_has_tsx = 1;
1707 fallthrough;
1708 case LBR_FORMAT_EIP_FLAGS:
1709 x86_pmu.lbr_from_flags = 1;
1710 break;
1711
1712 case LBR_FORMAT_INFO:
1713 x86_pmu.lbr_has_tsx = 1;
1714 fallthrough;
1715 case LBR_FORMAT_INFO2:
1716 x86_pmu.lbr_has_info = 1;
1717 break;
1718
1719 case LBR_FORMAT_TIME:
1720 x86_pmu.lbr_from_flags = 1;
1721 x86_pmu.lbr_to_cycles = 1;
1722 break;
1723 }
1724
1725 if (x86_pmu.lbr_has_info) {
1726 /*
1727 * Only used in combination with baseline pebs.
1728 */
1729 static_branch_enable(&x86_lbr_mispred);
1730 static_branch_enable(&x86_lbr_cycles);
1731 }
1732}
1733
1709/*1734/*
1710 * LBR state size is variable based on the max number of registers.1735 * LBR state size is variable based on the max number of registers.
1711 * This calculates the expected state size, which should match1736 * This calculates the expected state size, which should match
@@ -1726,6 +1751,9 @@ static bool is_arch_lbr_xsave_available(void) · 14 unmodified lines
1726 * Check the LBR state with the corresponding software structure.1751 * Check the LBR state with the corresponding software structure.
1727 * Disable LBR XSAVES support if the size doesn't match.1752 * Disable LBR XSAVES support if the size doesn't match.
1728 */1753 */
1754 if (xfeature_size(XFEATURE_LBR) == 0)
1755 return false;
1756
1729 if (WARN_ON(xfeature_size(XFEATURE_LBR) != get_lbr_state_size()))1757 if (WARN_ON(xfeature_size(XFEATURE_LBR) != get_lbr_state_size()))
1730 return false;1758 return false;
1731 1759
@@ -1765,6 +1793,12 @@ void __init intel_pmu_arch_lbr_init(void) · 33 unmodified lines
1765 x86_pmu.lbr_br_type = ecx.split.lbr_br_type;1793 x86_pmu.lbr_br_type = ecx.split.lbr_br_type;
1766 x86_pmu.lbr_nr = lbr_nr;1794 x86_pmu.lbr_nr = lbr_nr;
1767 1795
1796 if (x86_pmu.lbr_mispred)
1797 static_branch_enable(&x86_lbr_mispred);
1798 if (x86_pmu.lbr_timed_lbr)
1799 static_branch_enable(&x86_lbr_cycles);
1800 if (x86_pmu.lbr_br_type)
1801 static_branch_enable(&x86_lbr_type);
1768 1802
1769 arch_lbr_xsave = is_arch_lbr_xsave_available();1803 arch_lbr_xsave = is_arch_lbr_xsave_available();
1770 if (arch_lbr_xsave) {1804 if (arch_lbr_xsave) {
arch/x86/events/intel/pt.c+3−2
@@ -897,8 +897,9 @@ static void pt_handle_status(struct pt *pt) · 896 unmodified lines
897 * means we are already losing data; need to let the decoder897 * means we are already losing data; need to let the decoder
898 * know.898 * know.
899 */899 */
900 if (!intel_pt_validate_hw_cap(PT_CAP_topa_multiple_entries) ||900 if (!buf->single &&
901 buf->output_off == pt_buffer_region_size(buf)) {901 (!intel_pt_validate_hw_cap(PT_CAP_topa_multiple_entries) ||
902 buf->output_off == pt_buffer_region_size(buf))) {
902 perf_aux_output_flag(&pt->handle,903 perf_aux_output_flag(&pt->handle,
903 PERF_AUX_FLAG_TRUNCATED);904 PERF_AUX_FLAG_TRUNCATED);
904 advance++;905 advance++;
arch/x86/events/intel/uncore.c+1−1
@@ -1762,7 +1762,7 @@ static const struct intel_uncore_init_fun rkl_uncore_init __initconst = { · 1761 unmodified lines
1762 1762
1763static const struct intel_uncore_init_fun adl_uncore_init __initconst = {1763static const struct intel_uncore_init_fun adl_uncore_init __initconst = {
1764 .cpu_init = adl_uncore_cpu_init,1764 .cpu_init = adl_uncore_cpu_init,
1765 .mmio_init = tgl_uncore_mmio_init,1765 .mmio_init = adl_uncore_mmio_init,
1766};1766};
1767 1767
1768static const struct intel_uncore_init_fun icx_uncore_init __initconst = {1768static const struct intel_uncore_init_fun icx_uncore_init __initconst = {
arch/x86/events/intel/uncore.h+2−1
@@ -584,10 +584,11 @@ void snb_uncore_cpu_init(void); · 583 unmodified lines
584void nhm_uncore_cpu_init(void);584void nhm_uncore_cpu_init(void);
585void skl_uncore_cpu_init(void);585void skl_uncore_cpu_init(void);
586void icl_uncore_cpu_init(void);586void icl_uncore_cpu_init(void);
587void adl_uncore_cpu_init(void);
588void tgl_uncore_cpu_init(void);587void tgl_uncore_cpu_init(void);
588void adl_uncore_cpu_init(void);
589void tgl_uncore_mmio_init(void);589void tgl_uncore_mmio_init(void);
590void tgl_l_uncore_mmio_init(void);590void tgl_l_uncore_mmio_init(void);
591void adl_uncore_mmio_init(void);
591int snb_pci2phy_map_init(int devid);592int snb_pci2phy_map_init(int devid);
592 593
593/* uncore_snbep.c */594/* uncore_snbep.c */
arch/x86/events/intel/uncore_discovery.c+2−2
@@ -494,8 +494,8 @@ void intel_generic_uncore_mmio_enable_box(struct intel_uncore_box *box) · 493 unmodified lines
494 writel(0, box->io_addr);494 writel(0, box->io_addr);
495}495}
496 496
497static void intel_generic_uncore_mmio_enable_event(struct intel_uncore_box *box,497void intel_generic_uncore_mmio_enable_event(struct intel_uncore_box *box,
498 struct perf_event *event)498 struct perf_event *event)
499{499{
500 struct hw_perf_event *hwc = &event->hw;500 struct hw_perf_event *hwc = &event->hw;
501 501
arch/x86/events/intel/uncore_discovery.h+2−0
@@ -139,6 +139,8 @@ void intel_generic_uncore_mmio_disable_box(struct intel_uncore_box *box); · 138 unmodified lines
139void intel_generic_uncore_mmio_enable_box(struct intel_uncore_box *box);139void intel_generic_uncore_mmio_enable_box(struct intel_uncore_box *box);
140void intel_generic_uncore_mmio_disable_event(struct intel_uncore_box *box,140void intel_generic_uncore_mmio_disable_event(struct intel_uncore_box *box,
141 struct perf_event *event);141 struct perf_event *event);
142void intel_generic_uncore_mmio_enable_event(struct intel_uncore_box *box,
143 struct perf_event *event);
142 144
143void intel_generic_uncore_pci_init_box(struct intel_uncore_box *box);145void intel_generic_uncore_pci_init_box(struct intel_uncore_box *box);
144void intel_generic_uncore_pci_disable_box(struct intel_uncore_box *box);146void intel_generic_uncore_pci_disable_box(struct intel_uncore_box *box);
arch/x86/events/intel/uncore_snb.c+213−1
@@ -1,6 +1,7 @@
1// SPDX-License-Identifier: GPL-2.01// SPDX-License-Identifier: GPL-2.0
2/* Nehalem/SandBridge/Haswell/Broadwell/Skylake uncore support */2/* Nehalem/SandBridge/Haswell/Broadwell/Skylake uncore support */
3#include "uncore.h"3#include "uncore.h"
4#include "uncore_discovery.h"
4 5
5/* Uncore IMC PCI IDs */6/* Uncore IMC PCI IDs */
6#define PCI_DEVICE_ID_INTEL_SNB_IMC 0x01007#define PCI_DEVICE_ID_INTEL_SNB_IMC 0x0100
@@ -64,6 +65,20 @@ · 57 unmodified lines
64#define PCI_DEVICE_ID_INTEL_RKL_2_IMC 0x4c5365#define PCI_DEVICE_ID_INTEL_RKL_2_IMC 0x4c53
65#define PCI_DEVICE_ID_INTEL_ADL_1_IMC 0x466066#define PCI_DEVICE_ID_INTEL_ADL_1_IMC 0x4660
66#define PCI_DEVICE_ID_INTEL_ADL_2_IMC 0x464167#define PCI_DEVICE_ID_INTEL_ADL_2_IMC 0x4641
68#define PCI_DEVICE_ID_INTEL_ADL_3_IMC 0x4601
69#define PCI_DEVICE_ID_INTEL_ADL_4_IMC 0x4602
70#define PCI_DEVICE_ID_INTEL_ADL_5_IMC 0x4609
71#define PCI_DEVICE_ID_INTEL_ADL_6_IMC 0x460a
72#define PCI_DEVICE_ID_INTEL_ADL_7_IMC 0x4621
73#define PCI_DEVICE_ID_INTEL_ADL_8_IMC 0x4623
74#define PCI_DEVICE_ID_INTEL_ADL_9_IMC 0x4629
75#define PCI_DEVICE_ID_INTEL_ADL_10_IMC 0x4637
76#define PCI_DEVICE_ID_INTEL_ADL_11_IMC 0x463b
77#define PCI_DEVICE_ID_INTEL_ADL_12_IMC 0x4648
78#define PCI_DEVICE_ID_INTEL_ADL_13_IMC 0x4649
79#define PCI_DEVICE_ID_INTEL_ADL_14_IMC 0x4650
80#define PCI_DEVICE_ID_INTEL_ADL_15_IMC 0x4668
81#define PCI_DEVICE_ID_INTEL_ADL_16_IMC 0x4670
67 82
68/* SNB event control */83/* SNB event control */
69#define SNB_UNC_CTL_EV_SEL_MASK 0x000000ff84#define SNB_UNC_CTL_EV_SEL_MASK 0x000000ff
@@ -155,6 +170,7 @@ · 85 unmodified lines
155 170
156DEFINE_UNCORE_FORMAT_ATTR(event, event, "config:0-7");171DEFINE_UNCORE_FORMAT_ATTR(event, event, "config:0-7");
157DEFINE_UNCORE_FORMAT_ATTR(umask, umask, "config:8-15");172DEFINE_UNCORE_FORMAT_ATTR(umask, umask, "config:8-15");
173DEFINE_UNCORE_FORMAT_ATTR(chmask, chmask, "config:8-11");
158DEFINE_UNCORE_FORMAT_ATTR(edge, edge, "config:18");174DEFINE_UNCORE_FORMAT_ATTR(edge, edge, "config:18");
159DEFINE_UNCORE_FORMAT_ATTR(inv, inv, "config:23");175DEFINE_UNCORE_FORMAT_ATTR(inv, inv, "config:23");
160DEFINE_UNCORE_FORMAT_ATTR(cmask5, cmask, "config:24-28");176DEFINE_UNCORE_FORMAT_ATTR(cmask5, cmask, "config:24-28");
@@ -1334,6 +1350,62 @@ static const struct pci_device_id tgl_uncore_pci_ids[] = { · 1173 unmodified lines
1334 PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_2_IMC),1350 PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_2_IMC),
1335 .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),1351 .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
1336 },1352 },
1353 { /* IMC */
1354 PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_3_IMC),
1355 .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
1356 },
1357 { /* IMC */
1358 PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_4_IMC),
1359 .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
1360 },
1361 { /* IMC */
1362 PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_5_IMC),
1363 .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
1364 },
1365 { /* IMC */
1366 PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_6_IMC),
1367 .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
1368 },
1369 { /* IMC */
1370 PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_7_IMC),
1371 .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
1372 },
1373 { /* IMC */
1374 PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_8_IMC),
1375 .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
1376 },
1377 { /* IMC */
1378 PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_9_IMC),
1379 .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
1380 },
1381 { /* IMC */
1382 PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_10_IMC),
1383 .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
1384 },
1385 { /* IMC */
1386 PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_11_IMC),
1387 .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
1388 },
1389 { /* IMC */
1390 PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_12_IMC),
1391 .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
1392 },
1393 { /* IMC */
1394 PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_13_IMC),
1395 .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
1396 },
1397 { /* IMC */
1398 PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_14_IMC),
1399 .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
1400 },
1401 { /* IMC */
1402 PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_15_IMC),
1403 .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
1404 },
1405 { /* IMC */
1406 PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_16_IMC),
1407 .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
1408 },
1337 { /* end: all zeroes */ }1409 { /* end: all zeroes */ }
1338};1410};
1339 1411
@@ -1390,7 +1462,8 @@ static struct pci_dev *tgl_uncore_get_mc_dev(void) · 50 unmodified lines
1390#define TGL_UNCORE_MMIO_IMC_MEM_OFFSET 0x100001462#define TGL_UNCORE_MMIO_IMC_MEM_OFFSET 0x10000
1391#define TGL_UNCORE_PCI_IMC_MAP_SIZE 0xe0001463#define TGL_UNCORE_PCI_IMC_MAP_SIZE 0xe000
1392 1464
1393static void tgl_uncore_imc_freerunning_init_box(struct intel_uncore_box *box)1465static void __uncore_imc_init_box(struct intel_uncore_box *box,
1466 unsigned int base_offset)
1394{1467{
1395 struct pci_dev *pdev = tgl_uncore_get_mc_dev();1468 struct pci_dev *pdev = tgl_uncore_get_mc_dev();
1396 struct intel_uncore_pmu *pmu = box->pmu;1469 struct intel_uncore_pmu *pmu = box->pmu;
@@ -1417,11 +1490,17 @@ static void tgl_uncore_imc_freerunning_init_box(struct intel_uncore_box *box) · 20 unmodified lines
1417 addr |= ((resource_size_t)mch_bar << 32);1490 addr |= ((resource_size_t)mch_bar << 32);
1418#endif1491#endif
1419 1492
1493 addr += base_offset;
1420 box->io_addr = ioremap(addr, type->mmio_map_size);1494 box->io_addr = ioremap(addr, type->mmio_map_size);
1421 if (!box->io_addr)1495 if (!box->io_addr)
1422 pr_warn("perf uncore: Failed to ioremap for %s.\n", type->name);1496 pr_warn("perf uncore: Failed to ioremap for %s.\n", type->name);
1423}1497}
1424 1498
1499static void tgl_uncore_imc_freerunning_init_box(struct intel_uncore_box *box)
1500{
1501 __uncore_imc_init_box(box, 0);
1502}
1503
1425static struct intel_uncore_ops tgl_uncore_imc_freerunning_ops = {1504static struct intel_uncore_ops tgl_uncore_imc_freerunning_ops = {
1426 .init_box = tgl_uncore_imc_freerunning_init_box,1505 .init_box = tgl_uncore_imc_freerunning_init_box,
1427 .exit_box = uncore_mmio_exit_box,1506 .exit_box = uncore_mmio_exit_box,
@@ -1469,3 +1548,136 @@ void tgl_uncore_mmio_init(void) · 41 unmodified lines
1469}1548}
1470 1549
1471/* end of Tiger Lake MMIO uncore support */1550/* end of Tiger Lake MMIO uncore support */
1551
1552/* Alder Lake MMIO uncore support */
1553#define ADL_UNCORE_IMC_BASE 0xd900
1554#define ADL_UNCORE_IMC_MAP_SIZE 0x200
1555#define ADL_UNCORE_IMC_CTR 0xe8
1556#define ADL_UNCORE_IMC_CTRL 0xd0
1557#define ADL_UNCORE_IMC_GLOBAL_CTL 0xc0
1558#define ADL_UNCORE_IMC_BOX_CTL 0xc4
1559#define ADL_UNCORE_IMC_FREERUNNING_BASE 0xd800
1560#define ADL_UNCORE_IMC_FREERUNNING_MAP_SIZE 0x100
1561
1562#define ADL_UNCORE_IMC_CTL_FRZ (1 << 0)
1563#define ADL_UNCORE_IMC_CTL_RST_CTRL (1 << 1)
1564#define ADL_UNCORE_IMC_CTL_RST_CTRS (1 << 2)
1565#define ADL_UNCORE_IMC_CTL_INT (ADL_UNCORE_IMC_CTL_RST_CTRL | \
1566 ADL_UNCORE_IMC_CTL_RST_CTRS)
1567
1568static void adl_uncore_imc_init_box(struct intel_uncore_box *box)
1569{
1570 __uncore_imc_init_box(box, ADL_UNCORE_IMC_BASE);
1571
1572 /* The global control in MC1 can control both MCs. */
1573 if (box->io_addr && (box->pmu->pmu_idx == 1))
1574 writel(ADL_UNCORE_IMC_CTL_INT, box->io_addr + ADL_UNCORE_IMC_GLOBAL_CTL);
1575}
1576
1577static void adl_uncore_mmio_disable_box(struct intel_uncore_box *box)
1578{
1579 if (!box->io_addr)
1580 return;
1581
1582 writel(ADL_UNCORE_IMC_CTL_FRZ, box->io_addr + uncore_mmio_box_ctl(box));
1583}
1584
1585static void adl_uncore_mmio_enable_box(struct intel_uncore_box *box)
1586{
1587 if (!box->io_addr)
1588 return;
1589
1590 writel(0, box->io_addr + uncore_mmio_box_ctl(box));
1591}
1592
1593static struct intel_uncore_ops adl_uncore_mmio_ops = {
1594 .init_box = adl_uncore_imc_init_box,
1595 .exit_box = uncore_mmio_exit_box,
1596 .disable_box = adl_uncore_mmio_disable_box,
1597 .enable_box = adl_uncore_mmio_enable_box,
1598 .disable_event = intel_generic_uncore_mmio_disable_event,
1599 .enable_event = intel_generic_uncore_mmio_enable_event,
1600 .read_counter = uncore_mmio_read_counter,
1601};
1602
1603#define ADL_UNC_CTL_CHMASK_MASK 0x00000f00
1604#define ADL_UNC_IMC_EVENT_MASK (SNB_UNC_CTL_EV_SEL_MASK | \
1605 ADL_UNC_CTL_CHMASK_MASK | \
1606 SNB_UNC_CTL_EDGE_DET)
1607
1608static struct attribute *adl_uncore_imc_formats_attr[] = {
1609 &format_attr_event.attr,
1610 &format_attr_chmask.attr,
1611 &format_attr_edge.attr,
1612 NULL,
1613};
1614
1615static const struct attribute_group adl_uncore_imc_format_group = {
1616 .name = "format",
1617 .attrs = adl_uncore_imc_formats_attr,
1618};
1619
1620static struct intel_uncore_type adl_uncore_imc = {
1621 .name = "imc",
1622 .num_counters = 5,
1623 .num_boxes = 2,
1624 .perf_ctr_bits = 64,
1625 .perf_ctr = ADL_UNCORE_IMC_CTR,
1626 .event_ctl = ADL_UNCORE_IMC_CTRL,
1627 .event_mask = ADL_UNC_IMC_EVENT_MASK,
1628 .box_ctl = ADL_UNCORE_IMC_BOX_CTL,
1629 .mmio_offset = 0,
1630 .mmio_map_size = ADL_UNCORE_IMC_MAP_SIZE,
1631 .ops = &adl_uncore_mmio_ops,
1632 .format_group = &adl_uncore_imc_format_group,
1633};
1634
1635enum perf_adl_uncore_imc_freerunning_types {
1636 ADL_MMIO_UNCORE_IMC_DATA_TOTAL,
1637 ADL_MMIO_UNCORE_IMC_DATA_READ,
1638 ADL_MMIO_UNCORE_IMC_DATA_WRITE,
1639 ADL_MMIO_UNCORE_IMC_FREERUNNING_TYPE_MAX
1640};
1641
1642static struct freerunning_counters adl_uncore_imc_freerunning[] = {
1643 [ADL_MMIO_UNCORE_IMC_DATA_TOTAL] = { 0x40, 0x0, 0x0, 1, 64 },
1644 [ADL_MMIO_UNCORE_IMC_DATA_READ] = { 0x58, 0x0, 0x0, 1, 64 },
1645 [ADL_MMIO_UNCORE_IMC_DATA_WRITE] = { 0xA0, 0x0, 0x0, 1, 64 },
1646};
1647
1648static void adl_uncore_imc_freerunning_init_box(struct intel_uncore_box *box)
1649{
1650 __uncore_imc_init_box(box, ADL_UNCORE_IMC_FREERUNNING_BASE);
1651}
1652
1653static struct intel_uncore_ops adl_uncore_imc_freerunning_ops = {
1654 .init_box = adl_uncore_imc_freerunning_init_box,
1655 .exit_box = uncore_mmio_exit_box,
1656 .read_counter = uncore_mmio_read_counter,
1657 .hw_config = uncore_freerunning_hw_config,
1658};
1659
1660static struct intel_uncore_type adl_uncore_imc_free_running = {
1661 .name = "imc_free_running",
1662 .num_counters = 3,
1663 .num_boxes = 2,
1664 .num_freerunning_types = ADL_MMIO_UNCORE_IMC_FREERUNNING_TYPE_MAX,
1665 .mmio_map_size = ADL_UNCORE_IMC_FREERUNNING_MAP_SIZE,
1666 .freerunning = adl_uncore_imc_freerunning,
1667 .ops = &adl_uncore_imc_freerunning_ops,
1668 .event_descs = tgl_uncore_imc_events,
1669 .format_group = &tgl_uncore_imc_format_group,
1670};
1671
1672static struct intel_uncore_type *adl_mmio_uncores[] = {
1673 &adl_uncore_imc,
1674 &adl_uncore_imc_free_running,
1675 NULL
1676};
1677
1678void adl_uncore_mmio_init(void)
1679{
1680 uncore_mmio_uncores = adl_mmio_uncores;
1681}
1682
1683/* end of Alder Lake MMIO uncore support */
arch/x86/events/intel/uncore_snbep.c+1−1
@@ -5482,7 +5482,7 @@ static struct intel_uncore_type icx_uncore_imc = { · 5481 unmodified lines
5482 .fixed_ctr_bits = 48,5482 .fixed_ctr_bits = 48,
5483 .fixed_ctr = SNR_IMC_MMIO_PMON_FIXED_CTR,5483 .fixed_ctr = SNR_IMC_MMIO_PMON_FIXED_CTR,
5484 .fixed_ctl = SNR_IMC_MMIO_PMON_FIXED_CTL,5484 .fixed_ctl = SNR_IMC_MMIO_PMON_FIXED_CTL,
5485 .event_descs = hswep_uncore_imc_events,5485 .event_descs = snr_uncore_imc_events,
5486 .perf_ctr = SNR_IMC_MMIO_PMON_CTR0,5486 .perf_ctr = SNR_IMC_MMIO_PMON_CTR0,
5487 .event_ctl = SNR_IMC_MMIO_PMON_CTL0,5487 .event_ctl = SNR_IMC_MMIO_PMON_CTL0,
5488 .event_mask = SNBEP_PMON_RAW_EVENT_MASK,5488 .event_mask = SNBEP_PMON_RAW_EVENT_MASK,
arch/x86/events/perf_event.h+9−1
@@ -215,7 +215,8 @@ enum { · 214 unmodified lines
215 LBR_FORMAT_EIP_FLAGS2 = 0x04,215 LBR_FORMAT_EIP_FLAGS2 = 0x04,
216 LBR_FORMAT_INFO = 0x05,216 LBR_FORMAT_INFO = 0x05,
217 LBR_FORMAT_TIME = 0x06,217 LBR_FORMAT_TIME = 0x06,
218 LBR_FORMAT_MAX_KNOWN = LBR_FORMAT_TIME,218 LBR_FORMAT_INFO2 = 0x07,
219 LBR_FORMAT_MAX_KNOWN = LBR_FORMAT_INFO2,
219};220};
220 221
221enum {222enum {
@@ -840,6 +841,11 @@ struct x86_pmu { · 618 unmodified lines
840 bool lbr_double_abort; /* duplicated lbr aborts */841 bool lbr_double_abort; /* duplicated lbr aborts */
841 bool lbr_pt_coexist; /* (LBR|BTS) may coexist with PT */842 bool lbr_pt_coexist; /* (LBR|BTS) may coexist with PT */
842 843
844 unsigned int lbr_has_info:1;
845 unsigned int lbr_has_tsx:1;
846 unsigned int lbr_from_flags:1;
847 unsigned int lbr_to_cycles:1;
848
843 /*849 /*
844 * Intel Architectural LBR CPUID Enumeration850 * Intel Architectural LBR CPUID Enumeration
845 */851 */
@@ -1392,6 +1398,8 @@ void intel_pmu_lbr_init_skl(void); · 546 unmodified lines
1392 1398
1393void intel_pmu_lbr_init_knl(void);1399void intel_pmu_lbr_init_knl(void);
1394 1400
1401void intel_pmu_lbr_init(void);
1402
1395void intel_pmu_arch_lbr_init(void);1403void intel_pmu_arch_lbr_init(void);
1396 1404
1397void intel_pmu_pebs_data_source_nhm(void);1405void intel_pmu_pebs_data_source_nhm(void);
arch/x86/events/rapl.c+6−3
@@ -536,11 +536,14 @@ static struct perf_msr intel_rapl_spr_msrs[] = { · 535 unmodified lines
536 * - perf_msr_probe(PERF_RAPL_MAX)536 * - perf_msr_probe(PERF_RAPL_MAX)
537 * - want to use same event codes across both architectures537 * - want to use same event codes across both architectures
538 */538 */
539static struct perf_msr amd_rapl_msrs[PERF_RAPL_MAX] = {539static struct perf_msr amd_rapl_msrs[] = {
540 [PERF_RAPL_PKG] = { MSR_AMD_PKG_ENERGY_STATUS, &rapl_events_pkg_group, test_msr },540 [PERF_RAPL_PP0] = { 0, &rapl_events_cores_group, 0, false, 0 },
541 [PERF_RAPL_PKG] = { MSR_AMD_PKG_ENERGY_STATUS, &rapl_events_pkg_group, test_msr, false, RAPL_MSR_MASK },
542 [PERF_RAPL_RAM] = { 0, &rapl_events_ram_group, 0, false, 0 },
543 [PERF_RAPL_PP1] = { 0, &rapl_events_gpu_group, 0, false, 0 },
544 [PERF_RAPL_PSYS] = { 0, &rapl_events_psys_group, 0, false, 0 },
541};545};
542 546
543
544static int rapl_cpu_offline(unsigned int cpu)547static int rapl_cpu_offline(unsigned int cpu)
545{548{
546 struct rapl_pmu *pmu = cpu_to_rapl_pmu(cpu);549 struct rapl_pmu *pmu = cpu_to_rapl_pmu(cpu);
arch/x86/include/asm/bug.h+11−9
@@ -22,7 +22,7 @@ · 21 unmodified lines
22 22
23#ifdef CONFIG_DEBUG_BUGVERBOSE23#ifdef CONFIG_DEBUG_BUGVERBOSE
24 24
25#define _BUG_FLAGS(ins, flags) \25#define _BUG_FLAGS(ins, flags, extra) \
26do { \26do { \
27 asm_inline volatile("1:\t" ins "\n" \27 asm_inline volatile("1:\t" ins "\n" \
28 ".pushsection __bug_table,\"aw\"\n" \28 ".pushsection __bug_table,\"aw\"\n" \
@@ -31,7 +31,8 @@ do { \ · 2 unmodified lines
31 "\t.word %c1" "\t# bug_entry::line\n" \31 "\t.word %c1" "\t# bug_entry::line\n" \
32 "\t.word %c2" "\t# bug_entry::flags\n" \32 "\t.word %c2" "\t# bug_entry::flags\n" \
33 "\t.org 2b+%c3\n" \33 "\t.org 2b+%c3\n" \
34 ".popsection" \34 ".popsection\n" \
35 extra \
35 : : "i" (__FILE__), "i" (__LINE__), \36 : : "i" (__FILE__), "i" (__LINE__), \
36 "i" (flags), \37 "i" (flags), \
37 "i" (sizeof(struct bug_entry))); \38 "i" (sizeof(struct bug_entry))); \
@@ -39,14 +40,15 @@ do { \ · 1 unmodified line
39 40
40#else /* !CONFIG_DEBUG_BUGVERBOSE */41#else /* !CONFIG_DEBUG_BUGVERBOSE */
41 42
42#define _BUG_FLAGS(ins, flags) \43#define _BUG_FLAGS(ins, flags, extra) \
43do { \44do { \
44 asm_inline volatile("1:\t" ins "\n" \45 asm_inline volatile("1:\t" ins "\n" \
45 ".pushsection __bug_table,\"aw\"\n" \46 ".pushsection __bug_table,\"aw\"\n" \
46 "2:\t" __BUG_REL(1b) "\t# bug_entry::bug_addr\n" \47 "2:\t" __BUG_REL(1b) "\t# bug_entry::bug_addr\n" \
47 "\t.word %c0" "\t# bug_entry::flags\n" \48 "\t.word %c0" "\t# bug_entry::flags\n" \
48 "\t.org 2b+%c1\n" \49 "\t.org 2b+%c1\n" \
49 ".popsection" \50 ".popsection\n" \
51 extra \
50 : : "i" (flags), \52 : : "i" (flags), \
51 "i" (sizeof(struct bug_entry))); \53 "i" (sizeof(struct bug_entry))); \
52} while (0)54} while (0)
@@ -55,7 +57,7 @@ do { \ · 2 unmodified lines
55 57
56#else58#else
57 59
58#define _BUG_FLAGS(ins, flags) asm volatile(ins)60#define _BUG_FLAGS(ins, flags, extra) asm volatile(ins)
59 61
60#endif /* CONFIG_GENERIC_BUG */62#endif /* CONFIG_GENERIC_BUG */
61 63
@@ -63,8 +65,8 @@ do { \ · 1 unmodified line
63#define BUG() \65#define BUG() \
64do { \66do { \
65 instrumentation_begin(); \67 instrumentation_begin(); \
66 _BUG_FLAGS(ASM_UD2, 0); \68 _BUG_FLAGS(ASM_UD2, 0, ""); \
67 unreachable(); \69 __builtin_unreachable(); \
68} while (0)70} while (0)
69 71
70/*72/*
@@ -75,9 +77,9 @@ do { \ · 4 unmodified lines
75 */77 */
76#define __WARN_FLAGS(flags) \78#define __WARN_FLAGS(flags) \
77do { \79do { \
80 __auto_type f = BUGFLAG_WARNING|(flags); \
78 instrumentation_begin(); \81 instrumentation_begin(); \
79 _BUG_FLAGS(ASM_UD2, BUGFLAG_WARNING|(flags)); \82 _BUG_FLAGS(ASM_UD2, f, ASM_REACHABLE); \
80 annotate_reachable(); \
81 instrumentation_end(); \83 instrumentation_end(); \
82} while (0)84} while (0)
83 85
arch/x86/include/asm/kvm-x86-ops.h+1−1
@@ -82,7 +82,7 @@ KVM_X86_OP_NULL(guest_apic_has_interrupt) · 81 unmodified lines
82KVM_X86_OP(load_eoi_exitmap)82KVM_X86_OP(load_eoi_exitmap)
83KVM_X86_OP(set_virtual_apic_mode)83KVM_X86_OP(set_virtual_apic_mode)
84KVM_X86_OP_NULL(set_apic_access_page_addr)84KVM_X86_OP_NULL(set_apic_access_page_addr)
85KVM_X86_OP(deliver_posted_interrupt)85KVM_X86_OP(deliver_interrupt)
86KVM_X86_OP_NULL(sync_pir_to_irr)86KVM_X86_OP_NULL(sync_pir_to_irr)
87KVM_X86_OP(set_tss_addr)87KVM_X86_OP(set_tss_addr)
88KVM_X86_OP(set_identity_map_addr)88KVM_X86_OP(set_identity_map_addr)
arch/x86/include/asm/kvm_host.h+5−3
@@ -1410,7 +1410,8 @@ struct kvm_x86_ops { · 1409 unmodified lines
1410 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);1410 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
1411 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu);1411 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu);
1412 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu);1412 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu);
1413 int (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector);1413 void (*deliver_interrupt)(struct kvm_lapic *apic, int delivery_mode,
1414 int trig_mode, int vector);
1414 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);1415 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
1415 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);1416 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
1416 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr);1417 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr);
@@ -1483,7 +1484,8 @@ struct kvm_x86_ops { · 66 unmodified lines
1483 1484
1484 int (*get_msr_feature)(struct kvm_msr_entry *entry);1485 int (*get_msr_feature)(struct kvm_msr_entry *entry);
1485 1486
1486 bool (*can_emulate_instruction)(struct kvm_vcpu *vcpu, void *insn, int insn_len);1487 bool (*can_emulate_instruction)(struct kvm_vcpu *vcpu, int emul_type,
1488 void *insn, int insn_len);
1487 1489
1488 bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu);1490 bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu);
1489 int (*enable_direct_tlbflush)(struct kvm_vcpu *vcpu);1491 int (*enable_direct_tlbflush)(struct kvm_vcpu *vcpu);
@@ -1496,6 +1498,7 @@ struct kvm_x86_ops { · 6 unmodified lines
1496};1498};
1497 1499
1498struct kvm_x86_nested_ops {1500struct kvm_x86_nested_ops {
1501 void (*leave_nested)(struct kvm_vcpu *vcpu);
1499 int (*check_events)(struct kvm_vcpu *vcpu);1502 int (*check_events)(struct kvm_vcpu *vcpu);
1500 bool (*hv_timer_pending)(struct kvm_vcpu *vcpu);1503 bool (*hv_timer_pending)(struct kvm_vcpu *vcpu);
1501 void (*triple_fault)(struct kvm_vcpu *vcpu);1504 void (*triple_fault)(struct kvm_vcpu *vcpu);
@@ -1861,7 +1864,6 @@ int kvm_cpu_has_extint(struct kvm_vcpu *v); · 359 unmodified lines
1861int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);1864int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
1862int kvm_cpu_get_interrupt(struct kvm_vcpu *v);1865int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
1863void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);1866void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);
1864void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu);
1865 1867
1866int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low,1868int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low,
1867 unsigned long ipi_bitmap_high, u32 min,1869 unsigned long ipi_bitmap_high, u32 min,
arch/x86/include/asm/msr-index.h+1−0
@@ -476,6 +476,7 @@ · 475 unmodified lines
476#define MSR_AMD64_ICIBSEXTDCTL 0xc001103c476#define MSR_AMD64_ICIBSEXTDCTL 0xc001103c
477#define MSR_AMD64_IBSOPDATA4 0xc001103d477#define MSR_AMD64_IBSOPDATA4 0xc001103d
478#define MSR_AMD64_IBS_REG_COUNT_MAX 8 /* includes MSR_AMD64_IBSBRTARGET */478#define MSR_AMD64_IBS_REG_COUNT_MAX 8 /* includes MSR_AMD64_IBSBRTARGET */
479#define MSR_AMD64_SVM_AVIC_DOORBELL 0xc001011b
479#define MSR_AMD64_VM_PAGE_FLUSH 0xc001011e480#define MSR_AMD64_VM_PAGE_FLUSH 0xc001011e
480#define MSR_AMD64_SEV_ES_GHCB 0xc0010130481#define MSR_AMD64_SEV_ES_GHCB 0xc0010130
481#define MSR_AMD64_SEV 0xc0010131482#define MSR_AMD64_SEV 0xc0010131
arch/x86/include/asm/svm.h+36−0
@@ -220,6 +220,42 @@ struct __attribute__ ((__packed__)) vmcb_control_area { · 219 unmodified lines
220#define SVM_NESTED_CTL_SEV_ENABLE BIT(1)220#define SVM_NESTED_CTL_SEV_ENABLE BIT(1)
221#define SVM_NESTED_CTL_SEV_ES_ENABLE BIT(2)221#define SVM_NESTED_CTL_SEV_ES_ENABLE BIT(2)
222 222
223
224/* AVIC */
225#define AVIC_LOGICAL_ID_ENTRY_GUEST_PHYSICAL_ID_MASK (0xFF)
226#define AVIC_LOGICAL_ID_ENTRY_VALID_BIT 31
227#define AVIC_LOGICAL_ID_ENTRY_VALID_MASK (1 << 31)
228
229#define AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK (0xFFULL)
230#define AVIC_PHYSICAL_ID_ENTRY_BACKING_PAGE_MASK (0xFFFFFFFFFFULL << 12)
231#define AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK (1ULL << 62)
232#define AVIC_PHYSICAL_ID_ENTRY_VALID_MASK (1ULL << 63)
233#define AVIC_PHYSICAL_ID_TABLE_SIZE_MASK (0xFF)
234
235#define AVIC_DOORBELL_PHYSICAL_ID_MASK (0xFF)
236
237#define AVIC_UNACCEL_ACCESS_WRITE_MASK 1
238#define AVIC_UNACCEL_ACCESS_OFFSET_MASK 0xFF0
239#define AVIC_UNACCEL_ACCESS_VECTOR_MASK 0xFFFFFFFF
240
241enum avic_ipi_failure_cause {
242 AVIC_IPI_FAILURE_INVALID_INT_TYPE,
243 AVIC_IPI_FAILURE_TARGET_NOT_RUNNING,
244 AVIC_IPI_FAILURE_INVALID_TARGET,
245 AVIC_IPI_FAILURE_INVALID_BACKING_PAGE,
246};
247
248
249/*
250 * 0xff is broadcast, so the max index allowed for physical APIC ID
251 * table is 0xfe. APIC IDs above 0xff are reserved.
252 */
253#define AVIC_MAX_PHYSICAL_ID_COUNT 0xff
254
255#define AVIC_HPA_MASK ~((0xFFFULL << 52) | 0xFFF)
256#define VMCB_AVIC_APIC_BAR_MASK 0xFFFFFFFFFF000ULL
257
258
223struct vmcb_seg {259struct vmcb_seg {
224 u16 selector;260 u16 selector;
225 u16 attrib;261 u16 attrib;
arch/x86/include/asm/xen/cpuid.h+7−0
@@ -100,6 +100,13 @@ · 99 unmodified lines
100/* Memory mapped from other domains has valid IOMMU entries */100/* Memory mapped from other domains has valid IOMMU entries */
101#define XEN_HVM_CPUID_IOMMU_MAPPINGS (1u << 2)101#define XEN_HVM_CPUID_IOMMU_MAPPINGS (1u << 2)
102#define XEN_HVM_CPUID_VCPU_ID_PRESENT (1u << 3) /* vcpu id is present in EBX */102#define XEN_HVM_CPUID_VCPU_ID_PRESENT (1u << 3) /* vcpu id is present in EBX */
103#define XEN_HVM_CPUID_DOMID_PRESENT (1u << 4) /* domid is present in ECX */
104/*
105 * Bits 55:49 from the IO-APIC RTE and bits 11:5 from the MSI address can be
106 * used to store high bits for the Destination ID. This expands the Destination
107 * ID field from 8 to 15 bits, allowing to target APIC IDs up 32768.
108 */
109#define XEN_HVM_CPUID_EXT_DEST_ID (1u << 5)
103 110
104/*111/*
105 * Leaf 6 (0x40000x05)112 * Leaf 6 (0x40000x05)
arch/x86/include/asm/xen/hypervisor.h+0−14
@@ -43,20 +43,6 @@ static inline uint32_t xen_cpuid_base(void) · 42 unmodified lines
43 return hypervisor_cpuid_base("XenVMMXenVMM", 2);43 return hypervisor_cpuid_base("XenVMMXenVMM", 2);
44}44}
45 45
46#ifdef CONFIG_XEN
47extern bool __init xen_hvm_need_lapic(void);
48
49static inline bool __init xen_x2apic_para_available(void)
50{
51 return xen_hvm_need_lapic();
52}
53#else
54static inline bool __init xen_x2apic_para_available(void)
55{
56 return (xen_cpuid_base() != 0);
57}
58#endif
59
60struct pci_dev;46struct pci_dev;
61 47
62#ifdef CONFIG_XEN_PV_DOM048#ifdef CONFIG_XEN_PV_DOM0
arch/x86/include/uapi/asm/kvm.h+3−0
@@ -452,6 +452,9 @@ struct kvm_sync_regs { · 451 unmodified lines
452 452
453#define KVM_STATE_VMX_PREEMPTION_TIMER_DEADLINE 0x00000001453#define KVM_STATE_VMX_PREEMPTION_TIMER_DEADLINE 0x00000001
454 454
455/* attributes for system fd (group 0) */
456#define KVM_X86_XCOMP_GUEST_SUPP 0
457
455struct kvm_vmx_nested_state_data {458struct kvm_vmx_nested_state_data {
456 __u8 vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];459 __u8 vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
457 __u8 shadow_vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];460 __u8 shadow_vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
arch/x86/kernel/cpu/mce/amd.c+1−1
@@ -423,7 +423,7 @@ static void threshold_restart_bank(void *_tr) · 422 unmodified lines
423 u32 hi, lo;423 u32 hi, lo;
424 424
425 /* sysfs write might race against an offline operation */425 /* sysfs write might race against an offline operation */
426 if (this_cpu_read(threshold_banks))426 if (!this_cpu_read(threshold_banks) && !tr->set_lvt_off)
427 return;427 return;
428 428
429 rdmsr(tr->b->address, lo, hi);429 rdmsr(tr->b->address, lo, hi);
arch/x86/kernel/cpu/mce/intel.c+1−0
@@ -486,6 +486,7 @@ static void intel_ppin_init(struct cpuinfo_x86 *c) · 485 unmodified lines
486 case INTEL_FAM6_BROADWELL_X:486 case INTEL_FAM6_BROADWELL_X:
487 case INTEL_FAM6_SKYLAKE_X:487 case INTEL_FAM6_SKYLAKE_X:
488 case INTEL_FAM6_ICELAKE_X:488 case INTEL_FAM6_ICELAKE_X:
489 case INTEL_FAM6_ICELAKE_D:
489 case INTEL_FAM6_SAPPHIRERAPIDS_X:490 case INTEL_FAM6_SAPPHIRERAPIDS_X:
490 case INTEL_FAM6_XEON_PHI_KNL:491 case INTEL_FAM6_XEON_PHI_KNL:
491 case INTEL_FAM6_XEON_PHI_KNM:492 case INTEL_FAM6_XEON_PHI_KNM:
arch/x86/kernel/cpu/sgx/encl.c+2−0
@@ -410,6 +410,8 @@ void sgx_encl_release(struct kref *ref) · 409 unmodified lines
410 }410 }
411 411
412 kfree(entry);412 kfree(entry);
413 /* Invoke scheduler to prevent soft lockups. */
414 cond_resched();
413 }415 }
414 416
415 xa_destroy(&encl->page_array);417 xa_destroy(&encl->page_array);
arch/x86/kernel/cpu/sgx/main.c+1−9
@@ -344,10 +344,8 @@ static void sgx_reclaim_pages(void) · 343 unmodified lines
344{344{
345 struct sgx_epc_page *chunk[SGX_NR_TO_SCAN];345 struct sgx_epc_page *chunk[SGX_NR_TO_SCAN];
346 struct sgx_backing backing[SGX_NR_TO_SCAN];346 struct sgx_backing backing[SGX_NR_TO_SCAN];
347 struct sgx_epc_section *section;
348 struct sgx_encl_page *encl_page;347 struct sgx_encl_page *encl_page;
349 struct sgx_epc_page *epc_page;348 struct sgx_epc_page *epc_page;
350 struct sgx_numa_node *node;
351 pgoff_t page_index;349 pgoff_t page_index;
352 int cnt = 0;350 int cnt = 0;
353 int ret;351 int ret;
@@ -418,13 +416,7 @@ skip: · 64 unmodified lines
418 kref_put(&encl_page->encl->refcount, sgx_encl_release);416 kref_put(&encl_page->encl->refcount, sgx_encl_release);
419 epc_page->flags &= ~SGX_EPC_PAGE_RECLAIMER_TRACKED;417 epc_page->flags &= ~SGX_EPC_PAGE_RECLAIMER_TRACKED;
420 418
421 section = &sgx_epc_sections[epc_page->section];419 sgx_free_epc_page(epc_page);
422 node = section->node;
423
424 spin_lock(&node->lock);
425 list_add_tail(&epc_page->list, &node->free_page_list);
426 spin_unlock(&node->lock);
427 atomic_long_inc(&sgx_nr_free_pages);
428 }420 }
429}421}
430 422
arch/x86/kernel/fpu/regset.c+4−5
@@ -91,11 +91,9 @@ int xfpregs_set(struct task_struct *target, const struct user_regset *regset, · 90 unmodified lines
91 const void *kbuf, const void __user *ubuf)91 const void *kbuf, const void __user *ubuf)
92{92{
93 struct fpu *fpu = &target->thread.fpu;93 struct fpu *fpu = &target->thread.fpu;
94 struct user32_fxsr_struct newstate;94 struct fxregs_state newstate;
95 int ret;95 int ret;
96 96
97 BUILD_BUG_ON(sizeof(newstate) != sizeof(struct fxregs_state));
98
99 if (!cpu_feature_enabled(X86_FEATURE_FXSR))97 if (!cpu_feature_enabled(X86_FEATURE_FXSR))
100 return -ENODEV;98 return -ENODEV;
101 99
@@ -116,9 +114,10 @@ int xfpregs_set(struct task_struct *target, const struct user_regset *regset, · 14 unmodified lines
116 /* Copy the state */114 /* Copy the state */
117 memcpy(&fpu->fpstate->regs.fxsave, &newstate, sizeof(newstate));115 memcpy(&fpu->fpstate->regs.fxsave, &newstate, sizeof(newstate));
118 116
119 /* Clear xmm8..15 */117 /* Clear xmm8..15 for 32-bit callers */
120 BUILD_BUG_ON(sizeof(fpu->__fpstate.regs.fxsave.xmm_space) != 16 * 16);118 BUILD_BUG_ON(sizeof(fpu->__fpstate.regs.fxsave.xmm_space) != 16 * 16);
121 memset(&fpu->fpstate->regs.fxsave.xmm_space[8], 0, 8 * 16);119 if (in_ia32_syscall())
120 memset(&fpu->fpstate->regs.fxsave.xmm_space[8*4], 0, 8 * 16);
122 121
123 /* Mark FP and SSE as in use when XSAVE is enabled */122 /* Mark FP and SSE as in use when XSAVE is enabled */
124 if (use_xsave())123 if (use_xsave())
arch/x86/kernel/ptrace.c+2−2
@@ -1224,7 +1224,7 @@ static struct user_regset x86_64_regsets[] __ro_after_init = { · 1223 unmodified lines
1224 },1224 },
1225 [REGSET_FP] = {1225 [REGSET_FP] = {
1226 .core_note_type = NT_PRFPREG,1226 .core_note_type = NT_PRFPREG,
1227 .n = sizeof(struct user_i387_struct) / sizeof(long),1227 .n = sizeof(struct fxregs_state) / sizeof(long),
1228 .size = sizeof(long), .align = sizeof(long),1228 .size = sizeof(long), .align = sizeof(long),
1229 .active = regset_xregset_fpregs_active, .regset_get = xfpregs_get, .set = xfpregs_set1229 .active = regset_xregset_fpregs_active, .regset_get = xfpregs_get, .set = xfpregs_set
1230 },1230 },
@@ -1271,7 +1271,7 @@ static struct user_regset x86_32_regsets[] __ro_after_init = { · 40 unmodified lines
1271 },1271 },
1272 [REGSET_XFP] = {1272 [REGSET_XFP] = {
1273 .core_note_type = NT_PRXFPREG,1273 .core_note_type = NT_PRXFPREG,
1274 .n = sizeof(struct user32_fxsr_struct) / sizeof(u32),1274 .n = sizeof(struct fxregs_state) / sizeof(u32),
1275 .size = sizeof(u32), .align = sizeof(u32),1275 .size = sizeof(u32), .align = sizeof(u32),
1276 .active = regset_xregset_fpregs_active, .regset_get = xfpregs_get, .set = xfpregs_set1276 .active = regset_xregset_fpregs_active, .regset_get = xfpregs_get, .set = xfpregs_set
1277 },1277 },
arch/x86/kernel/resource.c+1−22
@@ -1,5 +1,4 @@
1// SPDX-License-Identifier: GPL-2.01// SPDX-License-Identifier: GPL-2.0
2#include <linux/dmi.h>
3#include <linux/ioport.h>2#include <linux/ioport.h>
4#include <asm/e820/api.h>3#include <asm/e820/api.h>
5 4
@@ -24,31 +23,11 @@ static void resource_clip(struct resource *res, resource_size_t start, · 18 unmodified lines
24 res->start = end + 1;23 res->start = end + 1;
25}24}
26 25
27/*
28 * Some BIOS-es contain a bug where they add addresses which map to
29 * system RAM in the PCI host bridge window returned by the ACPI _CRS
30 * method, see commit 4dc2287c1805 ("x86: avoid E820 regions when
31 * allocating address space"). To avoid this Linux by default excludes
32 * E820 reservations when allocating addresses since 2010.
33 * In 2019 some systems have shown-up with E820 reservations which cover
34 * the entire _CRS returned PCI host bridge window, causing all attempts
35 * to assign memory to PCI BARs to fail if Linux uses E820 reservations.
36 *
37 * Ideally Linux would fully stop using E820 reservations, but then
38 * the old systems this was added for will regress.
39 * Instead keep the old behavior for old systems, while ignoring the
40 * E820 reservations for any systems from now on.
41 */
42static void remove_e820_regions(struct resource *avail)26static void remove_e820_regions(struct resource *avail)
43{27{
44 int i, year = dmi_get_bios_year();28 int i;
45 struct e820_entry *entry;29 struct e820_entry *entry;
46 30
47 if (year >= 2018)
48 return;
49
50 pr_info_once("PCI: Removing E820 reservations from host bridge windows\n");
51
52 for (i = 0; i < e820_table->nr_entries; i++) {31 for (i = 0; i < e820_table->nr_entries; i++) {
53 entry = &e820_table->entries[i];32 entry = &e820_table->entries[i];
54 33
arch/x86/kvm/cpuid.c+62−41
@@ -133,6 +133,7 @@ static int kvm_cpuid_check_equal(struct kvm_vcpu *vcpu, struct kvm_cpuid_entry2 · 132 unmodified lines
133 orig = &vcpu->arch.cpuid_entries[i];133 orig = &vcpu->arch.cpuid_entries[i];
134 if (e2[i].function != orig->function ||134 if (e2[i].function != orig->function ||
135 e2[i].index != orig->index ||135 e2[i].index != orig->index ||
136 e2[i].flags != orig->flags ||
136 e2[i].eax != orig->eax || e2[i].ebx != orig->ebx ||137 e2[i].eax != orig->eax || e2[i].ebx != orig->ebx ||
137 e2[i].ecx != orig->ecx || e2[i].edx != orig->edx)138 e2[i].ecx != orig->ecx || e2[i].edx != orig->edx)
138 return -EINVAL;139 return -EINVAL;
@@ -196,10 +197,26 @@ void kvm_update_pv_runtime(struct kvm_vcpu *vcpu) · 57 unmodified lines
196 vcpu->arch.pv_cpuid.features = best->eax;197 vcpu->arch.pv_cpuid.features = best->eax;
197}198}
198 199
200/*
201 * Calculate guest's supported XCR0 taking into account guest CPUID data and
202 * supported_xcr0 (comprised of host configuration and KVM_SUPPORTED_XCR0).
203 */
204static u64 cpuid_get_supported_xcr0(struct kvm_cpuid_entry2 *entries, int nent)
205{
206 struct kvm_cpuid_entry2 *best;
207
208 best = cpuid_entry2_find(entries, nent, 0xd, 0);
209 if (!best)
210 return 0;
211
212 return (best->eax | ((u64)best->edx << 32)) & supported_xcr0;
213}
214
199static void __kvm_update_cpuid_runtime(struct kvm_vcpu *vcpu, struct kvm_cpuid_entry2 *entries,215static void __kvm_update_cpuid_runtime(struct kvm_vcpu *vcpu, struct kvm_cpuid_entry2 *entries,
200 int nent)216 int nent)
201{217{
202 struct kvm_cpuid_entry2 *best;218 struct kvm_cpuid_entry2 *best;
219 u64 guest_supported_xcr0 = cpuid_get_supported_xcr0(entries, nent);
203 220
204 best = cpuid_entry2_find(entries, nent, 1, 0);221 best = cpuid_entry2_find(entries, nent, 1, 0);
205 if (best) {222 if (best) {
@@ -238,6 +255,21 @@ static void __kvm_update_cpuid_runtime(struct kvm_vcpu *vcpu, struct kvm_cpuid_e · 32 unmodified lines
238 vcpu->arch.ia32_misc_enable_msr &255 vcpu->arch.ia32_misc_enable_msr &
239 MSR_IA32_MISC_ENABLE_MWAIT);256 MSR_IA32_MISC_ENABLE_MWAIT);
240 }257 }
258
259 /*
260 * Bits 127:0 of the allowed SECS.ATTRIBUTES (CPUID.0x12.0x1) enumerate
261 * the supported XSAVE Feature Request Mask (XFRM), i.e. the enclave's
262 * requested XCR0 value. The enclave's XFRM must be a subset of XCRO
263 * at the time of EENTER, thus adjust the allowed XFRM by the guest's
264 * supported XCR0. Similar to XCR0 handling, FP and SSE are forced to
265 * '1' even on CPUs that don't support XSAVE.
266 */
267 best = cpuid_entry2_find(entries, nent, 0x12, 0x1);
268 if (best) {
269 best->ecx &= guest_supported_xcr0 & 0xffffffff;
270 best->edx &= guest_supported_xcr0 >> 32;
271 best->ecx |= XFEATURE_MASK_FPSSE;
272 }
241}273}
242 274
243void kvm_update_cpuid_runtime(struct kvm_vcpu *vcpu)275void kvm_update_cpuid_runtime(struct kvm_vcpu *vcpu)
@@ -261,27 +293,8 @@ static void kvm_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu) · 17 unmodified lines
261 kvm_apic_set_version(vcpu);293 kvm_apic_set_version(vcpu);
262 }294 }
263 295
264 best = kvm_find_cpuid_entry(vcpu, 0xD, 0);296 vcpu->arch.guest_supported_xcr0 =
265 if (!best)297 cpuid_get_supported_xcr0(vcpu->arch.cpuid_entries, vcpu->arch.cpuid_nent);
266 vcpu->arch.guest_supported_xcr0 = 0;
267 else
268 vcpu->arch.guest_supported_xcr0 =
269 (best->eax | ((u64)best->edx << 32)) & supported_xcr0;
270
271 /*
272 * Bits 127:0 of the allowed SECS.ATTRIBUTES (CPUID.0x12.0x1) enumerate
273 * the supported XSAVE Feature Request Mask (XFRM), i.e. the enclave's
274 * requested XCR0 value. The enclave's XFRM must be a subset of XCRO
275 * at the time of EENTER, thus adjust the allowed XFRM by the guest's
276 * supported XCR0. Similar to XCR0 handling, FP and SSE are forced to
277 * '1' even on CPUs that don't support XSAVE.
278 */
279 best = kvm_find_cpuid_entry(vcpu, 0x12, 0x1);
280 if (best) {
281 best->ecx &= vcpu->arch.guest_supported_xcr0 & 0xffffffff;
282 best->edx &= vcpu->arch.guest_supported_xcr0 >> 32;
283 best->ecx |= XFEATURE_MASK_FPSSE;
284 }
285 298
286 kvm_update_pv_runtime(vcpu);299 kvm_update_pv_runtime(vcpu);
287 300
@@ -346,8 +359,14 @@ static int kvm_set_cpuid(struct kvm_vcpu *vcpu, struct kvm_cpuid_entry2 *e2, · 58 unmodified lines
346 * KVM_SET_CPUID{,2} again. To support this legacy behavior, check359 * KVM_SET_CPUID{,2} again. To support this legacy behavior, check
347 * whether the supplied CPUID data is equal to what's already set.360 * whether the supplied CPUID data is equal to what's already set.
348 */361 */
349 if (vcpu->arch.last_vmentry_cpu != -1)362 if (vcpu->arch.last_vmentry_cpu != -1) {
350 return kvm_cpuid_check_equal(vcpu, e2, nent);363 r = kvm_cpuid_check_equal(vcpu, e2, nent);
364 if (r)
365 return r;
366
367 kvfree(e2);
368 return 0;
369 }
351 370
352 r = kvm_check_cpuid(vcpu, e2, nent);371 r = kvm_check_cpuid(vcpu, e2, nent);
353 if (r)372 if (r)
@@ -535,12 +554,13 @@ void kvm_set_cpu_caps(void) · 181 unmodified lines
535 );554 );
536 555
537 kvm_cpu_cap_mask(CPUID_7_0_EBX,556 kvm_cpu_cap_mask(CPUID_7_0_EBX,
538 F(FSGSBASE) | F(SGX) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) |557 F(FSGSBASE) | F(SGX) | F(BMI1) | F(HLE) | F(AVX2) |
539 F(BMI2) | F(ERMS) | F(INVPCID) | F(RTM) | 0 /*MPX*/ | F(RDSEED) |558 F(FDP_EXCPTN_ONLY) | F(SMEP) | F(BMI2) | F(ERMS) | F(INVPCID) |
540 F(ADX) | F(SMAP) | F(AVX512IFMA) | F(AVX512F) | F(AVX512PF) |559 F(RTM) | F(ZERO_FCS_FDS) | 0 /*MPX*/ | F(AVX512F) |
541 F(AVX512ER) | F(AVX512CD) | F(CLFLUSHOPT) | F(CLWB) | F(AVX512DQ) |560 F(AVX512DQ) | F(RDSEED) | F(ADX) | F(SMAP) | F(AVX512IFMA) |
542 F(SHA_NI) | F(AVX512BW) | F(AVX512VL) | 0 /*INTEL_PT*/561 F(CLFLUSHOPT) | F(CLWB) | 0 /*INTEL_PT*/ | F(AVX512PF) |
543 );562 F(AVX512ER) | F(AVX512CD) | F(SHA_NI) | F(AVX512BW) |
563 F(AVX512VL));
544 564
545 kvm_cpu_cap_mask(CPUID_7_ECX,565 kvm_cpu_cap_mask(CPUID_7_ECX,
546 F(AVX512VBMI) | F(LA57) | F(PKU) | 0 /*OSPKE*/ | F(RDPID) |566 F(AVX512VBMI) | F(LA57) | F(PKU) | 0 /*OSPKE*/ | F(RDPID) |
@@ -887,13 +907,14 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function) · 340 unmodified lines
887 }907 }
888 break;908 break;
889 case 0xd: {909 case 0xd: {
890 u64 guest_perm = xstate_get_guest_group_perm();910 u64 permitted_xcr0 = supported_xcr0 & xstate_get_guest_group_perm();
911 u64 permitted_xss = supported_xss;
891 912
892 entry->eax &= supported_xcr0 & guest_perm;913 entry->eax &= permitted_xcr0;
893 entry->ebx = xstate_required_size(supported_xcr0, false);914 entry->ebx = xstate_required_size(permitted_xcr0, false);
894 entry->ecx = entry->ebx;915 entry->ecx = entry->ebx;
895 entry->edx &= (supported_xcr0 & guest_perm) >> 32;916 entry->edx &= permitted_xcr0 >> 32;
896 if (!supported_xcr0)917 if (!permitted_xcr0)
897 break;918 break;
898 919
899 entry = do_host_cpuid(array, function, 1);920 entry = do_host_cpuid(array, function, 1);
@@ -902,20 +923,20 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function) · 2 unmodified lines
902 923
903 cpuid_entry_override(entry, CPUID_D_1_EAX);924 cpuid_entry_override(entry, CPUID_D_1_EAX);
904 if (entry->eax & (F(XSAVES)|F(XSAVEC)))925 if (entry->eax & (F(XSAVES)|F(XSAVEC)))
905 entry->ebx = xstate_required_size(supported_xcr0 | supported_xss,926 entry->ebx = xstate_required_size(permitted_xcr0 | permitted_xss,
906 true);927 true);
907 else {928 else {
908 WARN_ON_ONCE(supported_xss != 0);929 WARN_ON_ONCE(permitted_xss != 0);
909 entry->ebx = 0;930 entry->ebx = 0;
910 }931 }
911 entry->ecx &= supported_xss;932 entry->ecx &= permitted_xss;
912 entry->edx &= supported_xss >> 32;933 entry->edx &= permitted_xss >> 32;
913 934
914 for (i = 2; i < 64; ++i) {935 for (i = 2; i < 64; ++i) {
915 bool s_state;936 bool s_state;
916 if (supported_xcr0 & BIT_ULL(i))937 if (permitted_xcr0 & BIT_ULL(i))
917 s_state = false;938 s_state = false;
918 else if (supported_xss & BIT_ULL(i))939 else if (permitted_xss & BIT_ULL(i))
919 s_state = true;940 s_state = true;
920 else941 else
921 continue;942 continue;
@@ -929,7 +950,7 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function) · 7 unmodified lines
929 * invalid sub-leafs. Only valid sub-leafs should950 * invalid sub-leafs. Only valid sub-leafs should
930 * reach this point, and they should have a non-zero951 * reach this point, and they should have a non-zero
931 * save state size. Furthermore, check whether the952 * save state size. Furthermore, check whether the
932 * processor agrees with supported_xcr0/supported_xss953 * processor agrees with permitted_xcr0/permitted_xss
933 * on whether this is an XCR0- or IA32_XSS-managed area.954 * on whether this is an XCR0- or IA32_XSS-managed area.
934 */955 */
935 if (WARN_ON_ONCE(!entry->eax || (entry->ecx & 0x1) != s_state)) {956 if (WARN_ON_ONCE(!entry->eax || (entry->ecx & 0x1) != s_state)) {
arch/x86/kvm/lapic.c+9−10
@@ -1096,14 +1096,8 @@ static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode, · 1095 unmodified lines
1096 apic->regs + APIC_TMR);1096 apic->regs + APIC_TMR);
1097 }1097 }
1098 1098
1099 if (static_call(kvm_x86_deliver_posted_interrupt)(vcpu, vector)) {1099 static_call(kvm_x86_deliver_interrupt)(apic, delivery_mode,
1100 kvm_lapic_set_irr(vector, apic);1100 trig_mode, vector);
1101 kvm_make_request(KVM_REQ_EVENT, vcpu);
1102 kvm_vcpu_kick(vcpu);
1103 } else {
1104 trace_kvm_apicv_accept_irq(vcpu->vcpu_id, delivery_mode,
1105 trig_mode, vector);
1106 }
1107 break;1101 break;
1108 1102
1109 case APIC_DM_REMRD:1103 case APIC_DM_REMRD:
@@ -2312,7 +2306,12 @@ void kvm_apic_update_apicv(struct kvm_vcpu *vcpu) · 1202 unmodified lines
2312 apic->irr_pending = true;2306 apic->irr_pending = true;
2313 apic->isr_count = 1;2307 apic->isr_count = 1;
2314 } else {2308 } else {
2315 apic->irr_pending = (apic_search_irr(apic) != -1);2309 /*
2310 * Don't clear irr_pending, searching the IRR can race with
2311 * updates from the CPU as APICv is still active from hardware's
2312 * perspective. The flag will be cleared as appropriate when
2313 * KVM injects the interrupt.
2314 */
2316 apic->isr_count = count_vectors(apic->regs + APIC_ISR);2315 apic->isr_count = count_vectors(apic->regs + APIC_ISR);
2317 }2316 }
2318}2317}
@@ -2629,7 +2628,7 @@ int kvm_apic_set_state(struct kvm_vcpu *vcpu, struct kvm_lapic_state *s) · 310 unmodified lines
2629 kvm_apic_set_version(vcpu);2628 kvm_apic_set_version(vcpu);
2630 2629
2631 apic_update_ppr(apic);2630 apic_update_ppr(apic);
2632 hrtimer_cancel(&apic->lapic_timer.timer);2631 cancel_apic_timer(apic);
2633 apic->lapic_timer.expired_tscdeadline = 0;2632 apic->lapic_timer.expired_tscdeadline = 0;
2634 apic_update_lvtt(apic);2633 apic_update_lvtt(apic);
2635 apic_manage_nmi_watchdog(apic, kvm_lapic_get_reg(apic, APIC_LVT0));2634 apic_manage_nmi_watchdog(apic, kvm_lapic_get_reg(apic, APIC_LVT0));
arch/x86/kvm/pmu.c+4−3
@@ -95,7 +95,7 @@ static void kvm_perf_overflow(struct perf_event *perf_event, · 94 unmodified lines
95}95}
96 96
97static void pmc_reprogram_counter(struct kvm_pmc *pmc, u32 type,97static void pmc_reprogram_counter(struct kvm_pmc *pmc, u32 type,
98 unsigned config, bool exclude_user,98 u64 config, bool exclude_user,
99 bool exclude_kernel, bool intr,99 bool exclude_kernel, bool intr,
100 bool in_tx, bool in_tx_cp)100 bool in_tx, bool in_tx_cp)
101{101{
@@ -181,7 +181,8 @@ static int cmp_u64(const void *a, const void *b) · 79 unmodified lines
181 181
182void reprogram_gp_counter(struct kvm_pmc *pmc, u64 eventsel)182void reprogram_gp_counter(struct kvm_pmc *pmc, u64 eventsel)
183{183{
184 unsigned config, type = PERF_TYPE_RAW;184 u64 config;
185 u32 type = PERF_TYPE_RAW;
185 struct kvm *kvm = pmc->vcpu->kvm;186 struct kvm *kvm = pmc->vcpu->kvm;
186 struct kvm_pmu_event_filter *filter;187 struct kvm_pmu_event_filter *filter;
187 bool allow_event = true;188 bool allow_event = true;
@@ -220,7 +221,7 @@ void reprogram_gp_counter(struct kvm_pmc *pmc, u64 eventsel) · 32 unmodified lines
220 }221 }
221 222
222 if (type == PERF_TYPE_RAW)223 if (type == PERF_TYPE_RAW)
223 config = eventsel & X86_RAW_EVENT_MASK;224 config = eventsel & AMD64_RAW_EVENT_MASK;
224 225
225 if (pmc->current_config == eventsel && pmc_resume_counter(pmc))226 if (pmc->current_config == eventsel && pmc_resume_counter(pmc))
226 return;227 return;
arch/x86/kvm/svm/avic.c+23−70
@@ -27,20 +27,6 @@ · 26 unmodified lines
27#include "irq.h"27#include "irq.h"
28#include "svm.h"28#include "svm.h"
29 29
30#define SVM_AVIC_DOORBELL 0xc001011b
31
32#define AVIC_HPA_MASK ~((0xFFFULL << 52) | 0xFFF)
33
34/*
35 * 0xff is broadcast, so the max index allowed for physical APIC ID
36 * table is 0xfe. APIC IDs above 0xff are reserved.
37 */
38#define AVIC_MAX_PHYSICAL_ID_COUNT 255
39
40#define AVIC_UNACCEL_ACCESS_WRITE_MASK 1
41#define AVIC_UNACCEL_ACCESS_OFFSET_MASK 0xFF0
42#define AVIC_UNACCEL_ACCESS_VECTOR_MASK 0xFFFFFFFF
43
44/* AVIC GATAG is encoded using VM and VCPU IDs */30/* AVIC GATAG is encoded using VM and VCPU IDs */
45#define AVIC_VCPU_ID_BITS 831#define AVIC_VCPU_ID_BITS 8
46#define AVIC_VCPU_ID_MASK ((1 << AVIC_VCPU_ID_BITS) - 1)32#define AVIC_VCPU_ID_MASK ((1 << AVIC_VCPU_ID_BITS) - 1)
@@ -73,12 +59,6 @@ struct amd_svm_iommu_ir { · 26 unmodified lines
73 void *data; /* Storing pointer to struct amd_ir_data */59 void *data; /* Storing pointer to struct amd_ir_data */
74};60};
75 61
76enum avic_ipi_failure_cause {
77 AVIC_IPI_FAILURE_INVALID_INT_TYPE,
78 AVIC_IPI_FAILURE_TARGET_NOT_RUNNING,
79 AVIC_IPI_FAILURE_INVALID_TARGET,
80 AVIC_IPI_FAILURE_INVALID_BACKING_PAGE,
81};
82 62
83/* Note:63/* Note:
84 * This function is called from IOMMU driver to notify64 * This function is called from IOMMU driver to notify
@@ -289,6 +269,22 @@ static int avic_init_backing_page(struct kvm_vcpu *vcpu) · 204 unmodified lines
289 return 0;269 return 0;
290}270}
291 271
272void avic_ring_doorbell(struct kvm_vcpu *vcpu)
273{
274 /*
275 * Note, the vCPU could get migrated to a different pCPU at any point,
276 * which could result in signalling the wrong/previous pCPU. But if
277 * that happens the vCPU is guaranteed to do a VMRUN (after being
278 * migrated) and thus will process pending interrupts, i.e. a doorbell
279 * is not needed (and the spurious one is harmless).
280 */
281 int cpu = READ_ONCE(vcpu->cpu);
282
283 if (cpu != get_cpu())
284 wrmsrl(MSR_AMD64_SVM_AVIC_DOORBELL, kvm_cpu_get_apicid(cpu));
285 put_cpu();
286}
287
292static void avic_kick_target_vcpus(struct kvm *kvm, struct kvm_lapic *source,288static void avic_kick_target_vcpus(struct kvm *kvm, struct kvm_lapic *source,
293 u32 icrl, u32 icrh)289 u32 icrl, u32 icrh)
294{290{
@@ -304,8 +300,13 @@ static void avic_kick_target_vcpus(struct kvm *kvm, struct kvm_lapic *source, · 9 unmodified lines
304 kvm_for_each_vcpu(i, vcpu, kvm) {300 kvm_for_each_vcpu(i, vcpu, kvm) {
305 if (kvm_apic_match_dest(vcpu, source, icrl & APIC_SHORT_MASK,301 if (kvm_apic_match_dest(vcpu, source, icrl & APIC_SHORT_MASK,
306 GET_APIC_DEST_FIELD(icrh),302 GET_APIC_DEST_FIELD(icrh),
307 icrl & APIC_DEST_MASK))303 icrl & APIC_DEST_MASK)) {
308 kvm_vcpu_wake_up(vcpu);304 vcpu->arch.apic->irr_pending = true;
305 svm_complete_interrupt_delivery(vcpu,
306 icrl & APIC_MODE_MASK,
307 icrl & APIC_INT_LEVELTRIG,
308 icrl & APIC_VECTOR_MASK);
309 }
309 }310 }
310}311}
311 312
@@ -345,8 +346,6 @@ int avic_incomplete_ipi_interception(struct kvm_vcpu *vcpu) · 33 unmodified lines
345 avic_kick_target_vcpus(vcpu->kvm, apic, icrl, icrh);346 avic_kick_target_vcpus(vcpu->kvm, apic, icrl, icrh);
346 break;347 break;
347 case AVIC_IPI_FAILURE_INVALID_TARGET:348 case AVIC_IPI_FAILURE_INVALID_TARGET:
348 WARN_ONCE(1, "Invalid IPI target: index=%u, vcpu=%d, icr=%#0x:%#0x\n",
349 index, vcpu->vcpu_id, icrh, icrl);
350 break;349 break;
351 case AVIC_IPI_FAILURE_INVALID_BACKING_PAGE:350 case AVIC_IPI_FAILURE_INVALID_BACKING_PAGE:
352 WARN_ONCE(1, "Invalid backing page\n");351 WARN_ONCE(1, "Invalid backing page\n");
@@ -669,52 +668,6 @@ void svm_load_eoi_exitmap(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap) · 316 unmodified lines
669 return;668 return;
670}669}
671 670
672int svm_deliver_avic_intr(struct kvm_vcpu *vcpu, int vec)
673{
674 if (!vcpu->arch.apicv_active)
675 return -1;
676
677 kvm_lapic_set_irr(vec, vcpu->arch.apic);
678
679 /*
680 * Pairs with the smp_mb_*() after setting vcpu->guest_mode in
681 * vcpu_enter_guest() to ensure the write to the vIRR is ordered before
682 * the read of guest_mode, which guarantees that either VMRUN will see
683 * and process the new vIRR entry, or that the below code will signal
684 * the doorbell if the vCPU is already running in the guest.
685 */
686 smp_mb__after_atomic();
687
688 /*
689 * Signal the doorbell to tell hardware to inject the IRQ if the vCPU
690 * is in the guest. If the vCPU is not in the guest, hardware will
691 * automatically process AVIC interrupts at VMRUN.
692 */
693 if (vcpu->mode == IN_GUEST_MODE) {
694 int cpu = READ_ONCE(vcpu->cpu);
695
696 /*
697 * Note, the vCPU could get migrated to a different pCPU at any
698 * point, which could result in signalling the wrong/previous
699 * pCPU. But if that happens the vCPU is guaranteed to do a
700 * VMRUN (after being migrated) and thus will process pending
701 * interrupts, i.e. a doorbell is not needed (and the spurious
702 * one is harmless).
703 */
704 if (cpu != get_cpu())
705 wrmsrl(SVM_AVIC_DOORBELL, kvm_cpu_get_apicid(cpu));
706 put_cpu();
707 } else {
708 /*
709 * Wake the vCPU if it was blocking. KVM will then detect the
710 * pending IRQ when checking if the vCPU has a wake event.
711 */
712 kvm_vcpu_wake_up(vcpu);
713 }
714
715 return 0;
716}
717
718bool svm_dy_apicv_has_pending_interrupt(struct kvm_vcpu *vcpu)671bool svm_dy_apicv_has_pending_interrupt(struct kvm_vcpu *vcpu)
719{672{
720 return false;673 return false;
arch/x86/kvm/svm/nested.c+19−16
@@ -983,9 +983,9 @@ void svm_free_nested(struct vcpu_svm *svm) · 982 unmodified lines
983/*983/*
984 * Forcibly leave nested mode in order to be able to reset the VCPU later on.984 * Forcibly leave nested mode in order to be able to reset the VCPU later on.
985 */985 */
986void svm_leave_nested(struct vcpu_svm *svm)986void svm_leave_nested(struct kvm_vcpu *vcpu)
987{987{
988 struct kvm_vcpu *vcpu = &svm->vcpu;988 struct vcpu_svm *svm = to_svm(vcpu);
989 989
990 if (is_guest_mode(vcpu)) {990 if (is_guest_mode(vcpu)) {
991 svm->nested.nested_run_pending = 0;991 svm->nested.nested_run_pending = 0;
@@ -1411,7 +1411,7 @@ static int svm_set_nested_state(struct kvm_vcpu *vcpu, · 419 unmodified lines
1411 return -EINVAL;1411 return -EINVAL;
1412 1412
1413 if (!(kvm_state->flags & KVM_STATE_NESTED_GUEST_MODE)) {1413 if (!(kvm_state->flags & KVM_STATE_NESTED_GUEST_MODE)) {
1414 svm_leave_nested(svm);1414 svm_leave_nested(vcpu);
1415 svm_set_gif(svm, !!(kvm_state->flags & KVM_STATE_NESTED_GIF_SET));1415 svm_set_gif(svm, !!(kvm_state->flags & KVM_STATE_NESTED_GIF_SET));
1416 return 0;1416 return 0;
1417 }1417 }
@@ -1457,18 +1457,6 @@ static int svm_set_nested_state(struct kvm_vcpu *vcpu, · 39 unmodified lines
1457 !__nested_vmcb_check_save(vcpu, &save_cached))1457 !__nested_vmcb_check_save(vcpu, &save_cached))
1458 goto out_free;1458 goto out_free;
1459 1459
1460 /*
1461 * While the nested guest CR3 is already checked and set by
1462 * KVM_SET_SREGS, it was set when nested state was yet loaded,
1463 * thus MMU might not be initialized correctly.
1464 * Set it again to fix this.
1465 */
1466
1467 ret = nested_svm_load_cr3(&svm->vcpu, vcpu->arch.cr3,
1468 nested_npt_enabled(svm), false);
1469 if (WARN_ON_ONCE(ret))
1470 goto out_free;
1471
1472 1460
1473 /*1461 /*
1474 * All checks done, we can enter guest mode. Userspace provides1462 * All checks done, we can enter guest mode. Userspace provides
@@ -1478,7 +1466,7 @@ static int svm_set_nested_state(struct kvm_vcpu *vcpu, · 3 unmodified lines
1478 */1466 */
1479 1467
1480 if (is_guest_mode(vcpu))1468 if (is_guest_mode(vcpu))
1481 svm_leave_nested(svm);1469 svm_leave_nested(vcpu);
1482 else1470 else
1483 svm->nested.vmcb02.ptr->save = svm->vmcb01.ptr->save;1471 svm->nested.vmcb02.ptr->save = svm->vmcb01.ptr->save;
1484 1472
@@ -1494,6 +1482,20 @@ static int svm_set_nested_state(struct kvm_vcpu *vcpu, · 9 unmodified lines
1494 1482
1495 svm_switch_vmcb(svm, &svm->nested.vmcb02);1483 svm_switch_vmcb(svm, &svm->nested.vmcb02);
1496 nested_vmcb02_prepare_control(svm);1484 nested_vmcb02_prepare_control(svm);
1485
1486 /*
1487 * While the nested guest CR3 is already checked and set by
1488 * KVM_SET_SREGS, it was set when nested state was yet loaded,
1489 * thus MMU might not be initialized correctly.
1490 * Set it again to fix this.
1491 */
1492
1493 ret = nested_svm_load_cr3(&svm->vcpu, vcpu->arch.cr3,
1494 nested_npt_enabled(svm), false);
1495 if (WARN_ON_ONCE(ret))
1496 goto out_free;
1497
1498
1497 kvm_make_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu);1499 kvm_make_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu);
1498 ret = 0;1500 ret = 0;
1499out_free:1501out_free:
@@ -1532,6 +1534,7 @@ static bool svm_get_nested_state_pages(struct kvm_vcpu *vcpu) · 32 unmodified lines
1532}1534}
1533 1535
1534struct kvm_x86_nested_ops svm_nested_ops = {1536struct kvm_x86_nested_ops svm_nested_ops = {
1537 .leave_nested = svm_leave_nested,
1535 .check_events = svm_check_nested_events,1538 .check_events = svm_check_nested_events,
1536 .triple_fault = nested_svm_triple_fault,1539 .triple_fault = nested_svm_triple_fault,
1537 .get_nested_state_pages = svm_get_nested_state_pages,1540 .get_nested_state_pages = svm_get_nested_state_pages,
arch/x86/kvm/svm/sev.c+7−2
@@ -2100,8 +2100,13 @@ void __init sev_hardware_setup(void) · 2099 unmodified lines
2100 if (!sev_enabled || !npt_enabled)2100 if (!sev_enabled || !npt_enabled)
2101 goto out;2101 goto out;
2102 2102
2103 /* Does the CPU support SEV? */2103 /*
2104 if (!boot_cpu_has(X86_FEATURE_SEV))2104 * SEV must obviously be supported in hardware. Sanity check that the
2105 * CPU supports decode assists, which is mandatory for SEV guests to
2106 * support instruction emulation.
2107 */
2108 if (!boot_cpu_has(X86_FEATURE_SEV) ||
2109 WARN_ON_ONCE(!boot_cpu_has(X86_FEATURE_DECODEASSISTS)))
2105 goto out;2110 goto out;
2106 2111
2107 /* Retrieve SEV CPUID information */2112 /* Retrieve SEV CPUID information */
arch/x86/kvm/svm/svm.c+205−64
@@ -290,7 +290,7 @@ int svm_set_efer(struct kvm_vcpu *vcpu, u64 efer) · 289 unmodified lines
290 290
291 if ((old_efer & EFER_SVME) != (efer & EFER_SVME)) {291 if ((old_efer & EFER_SVME) != (efer & EFER_SVME)) {
292 if (!(efer & EFER_SVME)) {292 if (!(efer & EFER_SVME)) {
293 svm_leave_nested(svm);293 svm_leave_nested(vcpu);
294 svm_set_gif(svm, true);294 svm_set_gif(svm, true);
295 /* #GP intercept is still needed for vmware backdoor */295 /* #GP intercept is still needed for vmware backdoor */
296 if (!enable_vmware_backdoor)296 if (!enable_vmware_backdoor)
@@ -312,7 +312,11 @@ int svm_set_efer(struct kvm_vcpu *vcpu, u64 efer) · 15 unmodified lines
312 return ret;312 return ret;
313 }313 }
314 314
315 if (svm_gp_erratum_intercept)315 /*
316 * Never intercept #GP for SEV guests, KVM can't
317 * decrypt guest memory to workaround the erratum.
318 */
319 if (svm_gp_erratum_intercept && !sev_guest(vcpu->kvm))
316 set_exception_intercept(svm, GP_VECTOR);320 set_exception_intercept(svm, GP_VECTOR);
317 }321 }
318 }322 }
@@ -1010,9 +1014,10 @@ static void init_vmcb(struct kvm_vcpu *vcpu) · 691 unmodified lines
1010 * Guest access to VMware backdoor ports could legitimately1014 * Guest access to VMware backdoor ports could legitimately
1011 * trigger #GP because of TSS I/O permission bitmap.1015 * trigger #GP because of TSS I/O permission bitmap.
1012 * We intercept those #GP and allow access to them anyway1016 * We intercept those #GP and allow access to them anyway
1013 * as VMware does.1017 * as VMware does. Don't intercept #GP for SEV guests as KVM can't
1018 * decrypt guest memory to decode the faulting instruction.
1014 */1019 */
1015 if (enable_vmware_backdoor)1020 if (enable_vmware_backdoor && !sev_guest(vcpu->kvm))
1016 set_exception_intercept(svm, GP_VECTOR);1021 set_exception_intercept(svm, GP_VECTOR);
1017 1022
1018 svm_set_intercept(svm, INTERCEPT_INTR);1023 svm_set_intercept(svm, INTERCEPT_INTR);
@@ -1580,6 +1585,7 @@ void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0) · 561 unmodified lines
1580{1585{
1581 struct vcpu_svm *svm = to_svm(vcpu);1586 struct vcpu_svm *svm = to_svm(vcpu);
1582 u64 hcr0 = cr0;1587 u64 hcr0 = cr0;
1588 bool old_paging = is_paging(vcpu);
1583 1589
1584#ifdef CONFIG_X86_641590#ifdef CONFIG_X86_64
1585 if (vcpu->arch.efer & EFER_LME && !vcpu->arch.guest_state_protected) {1591 if (vcpu->arch.efer & EFER_LME && !vcpu->arch.guest_state_protected) {
@@ -1596,8 +1602,11 @@ void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0) · 10 unmodified lines
1596#endif1602#endif
1597 vcpu->arch.cr0 = cr0;1603 vcpu->arch.cr0 = cr0;
1598 1604
1599 if (!npt_enabled)1605 if (!npt_enabled) {
1600 hcr0 |= X86_CR0_PG | X86_CR0_WP;1606 hcr0 |= X86_CR0_PG | X86_CR0_WP;
1607 if (old_paging != is_paging(vcpu))
1608 svm_set_cr4(vcpu, kvm_read_cr4(vcpu));
1609 }
1601 1610
1602 /*1611 /*
1603 * re-enable caching here because the QEMU bios1612 * re-enable caching here because the QEMU bios
@@ -1641,8 +1650,12 @@ void svm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4) · 37 unmodified lines
1641 svm_flush_tlb(vcpu);1650 svm_flush_tlb(vcpu);
1642 1651
1643 vcpu->arch.cr4 = cr4;1652 vcpu->arch.cr4 = cr4;
1644 if (!npt_enabled)1653 if (!npt_enabled) {
1645 cr4 |= X86_CR4_PAE;1654 cr4 |= X86_CR4_PAE;
1655
1656 if (!is_paging(vcpu))
1657 cr4 &= ~(X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE);
1658 }
1646 cr4 |= host_cr4_mce;1659 cr4 |= host_cr4_mce;
1647 to_svm(vcpu)->vmcb->save.cr4 = cr4;1660 to_svm(vcpu)->vmcb->save.cr4 = cr4;
1648 vmcb_mark_dirty(to_svm(vcpu)->vmcb, VMCB_CR);1661 vmcb_mark_dirty(to_svm(vcpu)->vmcb, VMCB_CR);
@@ -2091,10 +2104,6 @@ static int gp_interception(struct kvm_vcpu *vcpu) · 442 unmodified lines
2091 if (error_code)2104 if (error_code)
2092 goto reinject;2105 goto reinject;
2093 2106
2094 /* All SVM instructions expect page aligned RAX */
2095 if (svm->vmcb->save.rax & ~PAGE_MASK)
2096 goto reinject;
2097
2098 /* Decode the instruction for usage later */2107 /* Decode the instruction for usage later */
2099 if (x86_decode_emulated_instruction(vcpu, 0, NULL, 0) != EMULATION_OK)2108 if (x86_decode_emulated_instruction(vcpu, 0, NULL, 0) != EMULATION_OK)
2100 goto reinject;2109 goto reinject;
@@ -2112,8 +2121,13 @@ static int gp_interception(struct kvm_vcpu *vcpu) · 11 unmodified lines
2112 if (!is_guest_mode(vcpu))2121 if (!is_guest_mode(vcpu))
2113 return kvm_emulate_instruction(vcpu,2122 return kvm_emulate_instruction(vcpu,
2114 EMULTYPE_VMWARE_GP | EMULTYPE_NO_DECODE);2123 EMULTYPE_VMWARE_GP | EMULTYPE_NO_DECODE);
2115 } else2124 } else {
2125 /* All SVM instructions expect page aligned RAX */
2126 if (svm->vmcb->save.rax & ~PAGE_MASK)
2127 goto reinject;
2128
2116 return emulate_svm_instr(vcpu, opcode);2129 return emulate_svm_instr(vcpu, opcode);
2130 }
2117 2131
2118reinject:2132reinject:
2119 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);2133 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
@@ -3285,6 +3299,55 @@ static void svm_set_irq(struct kvm_vcpu *vcpu) · 1165 unmodified lines
3285 SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_INTR;3299 SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_INTR;
3286}3300}
3287 3301
3302void svm_complete_interrupt_delivery(struct kvm_vcpu *vcpu, int delivery_mode,
3303 int trig_mode, int vector)
3304{
3305 /*
3306 * vcpu->arch.apicv_active must be read after vcpu->mode.
3307 * Pairs with smp_store_release in vcpu_enter_guest.
3308 */
3309 bool in_guest_mode = (smp_load_acquire(&vcpu->mode) == IN_GUEST_MODE);
3310
3311 if (!READ_ONCE(vcpu->arch.apicv_active)) {
3312 /* Process the interrupt via inject_pending_event */
3313 kvm_make_request(KVM_REQ_EVENT, vcpu);
3314 kvm_vcpu_kick(vcpu);
3315 return;
3316 }
3317
3318 trace_kvm_apicv_accept_irq(vcpu->vcpu_id, delivery_mode, trig_mode, vector);
3319 if (in_guest_mode) {
3320 /*
3321 * Signal the doorbell to tell hardware to inject the IRQ. If
3322 * the vCPU exits the guest before the doorbell chimes, hardware
3323 * will automatically process AVIC interrupts at the next VMRUN.
3324 */
3325 avic_ring_doorbell(vcpu);
3326 } else {
3327 /*
3328 * Wake the vCPU if it was blocking. KVM will then detect the
3329 * pending IRQ when checking if the vCPU has a wake event.
3330 */
3331 kvm_vcpu_wake_up(vcpu);
3332 }
3333}
3334
3335static void svm_deliver_interrupt(struct kvm_lapic *apic, int delivery_mode,
3336 int trig_mode, int vector)
3337{
3338 kvm_lapic_set_irr(vector, apic);
3339
3340 /*
3341 * Pairs with the smp_mb_*() after setting vcpu->guest_mode in
3342 * vcpu_enter_guest() to ensure the write to the vIRR is ordered before
3343 * the read of guest_mode. This guarantees that either VMRUN will see
3344 * and process the new vIRR entry, or that svm_complete_interrupt_delivery
3345 * will signal the doorbell if the CPU has already entered the guest.
3346 */
3347 smp_mb__after_atomic();
3348 svm_complete_interrupt_delivery(apic->vcpu, delivery_mode, trig_mode, vector);
3349}
3350
3288static void svm_update_cr8_intercept(struct kvm_vcpu *vcpu, int tpr, int irr)3351static void svm_update_cr8_intercept(struct kvm_vcpu *vcpu, int tpr, int irr)
3289{3352{
3290 struct vcpu_svm *svm = to_svm(vcpu);3353 struct vcpu_svm *svm = to_svm(vcpu);
@@ -3332,11 +3395,13 @@ static int svm_nmi_allowed(struct kvm_vcpu *vcpu, bool for_injection) · 41 unmodified lines
3332 if (svm->nested.nested_run_pending)3395 if (svm->nested.nested_run_pending)
3333 return -EBUSY;3396 return -EBUSY;
3334 3397
3398 if (svm_nmi_blocked(vcpu))
3399 return 0;
3400
3335 /* An NMI must not be injected into L2 if it's supposed to VM-Exit. */3401 /* An NMI must not be injected into L2 if it's supposed to VM-Exit. */
3336 if (for_injection && is_guest_mode(vcpu) && nested_exit_on_nmi(svm))3402 if (for_injection && is_guest_mode(vcpu) && nested_exit_on_nmi(svm))
3337 return -EBUSY;3403 return -EBUSY;
3338 3404 return 1;
3339 return !svm_nmi_blocked(vcpu);
3340}3405}
3341 3406
3342static bool svm_get_nmi_mask(struct kvm_vcpu *vcpu)3407static bool svm_get_nmi_mask(struct kvm_vcpu *vcpu)
@@ -3388,9 +3453,13 @@ bool svm_interrupt_blocked(struct kvm_vcpu *vcpu) · 45 unmodified lines
3388static int svm_interrupt_allowed(struct kvm_vcpu *vcpu, bool for_injection)3453static int svm_interrupt_allowed(struct kvm_vcpu *vcpu, bool for_injection)
3389{3454{
3390 struct vcpu_svm *svm = to_svm(vcpu);3455 struct vcpu_svm *svm = to_svm(vcpu);
3456
3391 if (svm->nested.nested_run_pending)3457 if (svm->nested.nested_run_pending)
3392 return -EBUSY;3458 return -EBUSY;
3393 3459
3460 if (svm_interrupt_blocked(vcpu))
3461 return 0;
3462
3394 /*3463 /*
3395 * An IRQ must not be injected into L2 if it's supposed to VM-Exit,3464 * An IRQ must not be injected into L2 if it's supposed to VM-Exit,
3396 * e.g. if the IRQ arrived asynchronously after checking nested events.3465 * e.g. if the IRQ arrived asynchronously after checking nested events.
@@ -3398,7 +3467,7 @@ static int svm_interrupt_allowed(struct kvm_vcpu *vcpu, bool for_injection) · 1 unmodified line
3398 if (for_injection && is_guest_mode(vcpu) && nested_exit_on_intr(svm))3467 if (for_injection && is_guest_mode(vcpu) && nested_exit_on_intr(svm))
3399 return -EBUSY;3468 return -EBUSY;
3400 3469
3401 return !svm_interrupt_blocked(vcpu);3470 return 1;
3402}3471}
3403 3472
3404static void svm_enable_irq_window(struct kvm_vcpu *vcpu)3473static void svm_enable_irq_window(struct kvm_vcpu *vcpu)
@@ -3609,7 +3678,7 @@ static noinstr void svm_vcpu_enter_exit(struct kvm_vcpu *vcpu) · 204 unmodified lines
3609 struct vcpu_svm *svm = to_svm(vcpu);3678 struct vcpu_svm *svm = to_svm(vcpu);
3610 unsigned long vmcb_pa = svm->current_vmcb->pa;3679 unsigned long vmcb_pa = svm->current_vmcb->pa;
3611 3680
3612 kvm_guest_enter_irqoff();3681 guest_state_enter_irqoff();
3613 3682
3614 if (sev_es_guest(vcpu->kvm)) {3683 if (sev_es_guest(vcpu->kvm)) {
3615 __svm_sev_es_vcpu_run(vmcb_pa);3684 __svm_sev_es_vcpu_run(vmcb_pa);
@@ -3629,7 +3698,7 @@ static noinstr void svm_vcpu_enter_exit(struct kvm_vcpu *vcpu) · 13 unmodified lines
3629 vmload(__sme_page_pa(sd->save_area));3698 vmload(__sme_page_pa(sd->save_area));
3630 }3699 }
3631 3700
3632 kvm_guest_exit_irqoff();3701 guest_state_exit_irqoff();
3633}3702}
3634 3703
3635static __no_kcsan fastpath_t svm_vcpu_run(struct kvm_vcpu *vcpu)3704static __no_kcsan fastpath_t svm_vcpu_run(struct kvm_vcpu *vcpu)
@@ -4129,11 +4198,14 @@ static int svm_smi_allowed(struct kvm_vcpu *vcpu, bool for_injection) · 493 unmodified lines
4129 if (svm->nested.nested_run_pending)4198 if (svm->nested.nested_run_pending)
4130 return -EBUSY;4199 return -EBUSY;
4131 4200
4201 if (svm_smi_blocked(vcpu))
4202 return 0;
4203
4132 /* An SMI must not be injected into L2 if it's supposed to VM-Exit. */4204 /* An SMI must not be injected into L2 if it's supposed to VM-Exit. */
4133 if (for_injection && is_guest_mode(vcpu) && nested_exit_on_smi(svm))4205 if (for_injection && is_guest_mode(vcpu) && nested_exit_on_smi(svm))
4134 return -EBUSY;4206 return -EBUSY;
4135 4207
4136 return !svm_smi_blocked(vcpu);4208 return 1;
4137}4209}
4138 4210
4139static int svm_enter_smm(struct kvm_vcpu *vcpu, char *smstate)4211static int svm_enter_smm(struct kvm_vcpu *vcpu, char *smstate)
@@ -4227,11 +4299,18 @@ static int svm_leave_smm(struct kvm_vcpu *vcpu, const char *smstate) · 87 unmodified lines
4227 * Enter the nested guest now4299 * Enter the nested guest now
4228 */4300 */
4229 4301
4302 vmcb_mark_all_dirty(svm->vmcb01.ptr);
4303
4230 vmcb12 = map.hva;4304 vmcb12 = map.hva;
4231 nested_copy_vmcb_control_to_cache(svm, &vmcb12->control);4305 nested_copy_vmcb_control_to_cache(svm, &vmcb12->control);
4232 nested_copy_vmcb_save_to_cache(svm, &vmcb12->save);4306 nested_copy_vmcb_save_to_cache(svm, &vmcb12->save);
4233 ret = enter_svm_guest_mode(vcpu, vmcb12_gpa, vmcb12, false);4307 ret = enter_svm_guest_mode(vcpu, vmcb12_gpa, vmcb12, false);
4234 4308
4309 if (ret)
4310 goto unmap_save;
4311
4312 svm->nested.nested_run_pending = 1;
4313
4235unmap_save:4314unmap_save:
4236 kvm_vcpu_unmap(vcpu, &map_save, true);4315 kvm_vcpu_unmap(vcpu, &map_save, true);
4237unmap_map:4316unmap_map:
@@ -4252,79 +4331,140 @@ static void svm_enable_smi_window(struct kvm_vcpu *vcpu) · 14 unmodified lines
4252 }4331 }
4253}4332}
4254 4333
4255static bool svm_can_emulate_instruction(struct kvm_vcpu *vcpu, void *insn, int insn_len)4334static bool svm_can_emulate_instruction(struct kvm_vcpu *vcpu, int emul_type,
4335 void *insn, int insn_len)
4256{4336{
4257 bool smep, smap, is_user;4337 bool smep, smap, is_user;
4258 unsigned long cr4;4338 unsigned long cr4;
4339 u64 error_code;
4340
4341 /* Emulation is always possible when KVM has access to all guest state. */
4342 if (!sev_guest(vcpu->kvm))
4343 return true;
4344
4345 /* #UD and #GP should never be intercepted for SEV guests. */
4346 WARN_ON_ONCE(emul_type & (EMULTYPE_TRAP_UD |
4347 EMULTYPE_TRAP_UD_FORCED |
4348 EMULTYPE_VMWARE_GP));
4259 4349
4260 /*4350 /*
4261 * When the guest is an SEV-ES guest, emulation is not possible.4351 * Emulation is impossible for SEV-ES guests as KVM doesn't have access
4352 * to guest register state.
4262 */4353 */
4263 if (sev_es_guest(vcpu->kvm))4354 if (sev_es_guest(vcpu->kvm))
4264 return false;4355 return false;
4265 4356
4357 /*
4358 * Emulation is possible if the instruction is already decoded, e.g.
4359 * when completing I/O after returning from userspace.
4360 */
4361 if (emul_type & EMULTYPE_NO_DECODE)
4362 return true;
4363
4364 /*
4365 * Emulation is possible for SEV guests if and only if a prefilled
4366 * buffer containing the bytes of the intercepted instruction is
4367 * available. SEV guest memory is encrypted with a guest specific key
4368 * and cannot be decrypted by KVM, i.e. KVM would read cyphertext and
4369 * decode garbage.
4370 *
4371 * Inject #UD if KVM reached this point without an instruction buffer.
4372 * In practice, this path should never be hit by a well-behaved guest,
4373 * e.g. KVM doesn't intercept #UD or #GP for SEV guests, but this path
4374 * is still theoretically reachable, e.g. via unaccelerated fault-like
4375 * AVIC access, and needs to be handled by KVM to avoid putting the
4376 * guest into an infinite loop. Injecting #UD is somewhat arbitrary,
4377 * but its the least awful option given lack of insight into the guest.
4378 */
4379 if (unlikely(!insn)) {
4380 kvm_queue_exception(vcpu, UD_VECTOR);
4381 return false;
4382 }
4383
4384 /*
4385 * Emulate for SEV guests if the insn buffer is not empty. The buffer
4386 * will be empty if the DecodeAssist microcode cannot fetch bytes for
4387 * the faulting instruction because the code fetch itself faulted, e.g.
4388 * the guest attempted to fetch from emulated MMIO or a guest page
4389 * table used to translate CS:RIP resides in emulated MMIO.
4390 */
4391 if (likely(insn_len))
4392 return true;
4393
4266 /*4394 /*
4267 * Detect and workaround Errata 1096 Fam_17h_00_0Fh.4395 * Detect and workaround Errata 1096 Fam_17h_00_0Fh.
4268 *4396 *
4269 * Errata:4397 * Errata:
4270 * When CPU raise #NPF on guest data access and vCPU CR4.SMAP=1, it is4398 * When CPU raises #NPF on guest data access and vCPU CR4.SMAP=1, it is
4271 * possible that CPU microcode implementing DecodeAssist will fail4399 * possible that CPU microcode implementing DecodeAssist will fail to
4272 * to read bytes of instruction which caused #NPF. In this case,4400 * read guest memory at CS:RIP and vmcb.GuestIntrBytes will incorrectly
4273 * GuestIntrBytes field of the VMCB on a VMEXIT will incorrectly4401 * be '0'. This happens because microcode reads CS:RIP using a _data_
4274 * return 0 instead of the correct guest instruction bytes.4402 * loap uop with CPL=0 privileges. If the load hits a SMAP #PF, ucode
4275 *4403 * gives up and does not fill the instruction bytes buffer.
4276 * This happens because CPU microcode reading instruction bytes
4277 * uses a special opcode which attempts to read data using CPL=0
4278 * privileges. The microcode reads CS:RIP and if it hits a SMAP
4279 * fault, it gives up and returns no instruction bytes.
4280 *4404 *
4281 * Detection:4405 * As above, KVM reaches this point iff the VM is an SEV guest, the CPU
4282 * We reach here in case CPU supports DecodeAssist, raised #NPF and4406 * supports DecodeAssist, a #NPF was raised, KVM's page fault handler
4283 * returned 0 in GuestIntrBytes field of the VMCB.4407 * triggered emulation (e.g. for MMIO), and the CPU returned 0 in the
4284 * First, errata can only be triggered in case vCPU CR4.SMAP=1.4408 * GuestIntrBytes field of the VMCB.
4285 * Second, if vCPU CR4.SMEP=1, errata could only be triggered
4286 * in case vCPU CPL==3 (Because otherwise guest would have triggered
4287 * a SMEP fault instead of #NPF).
4288 * Otherwise, vCPU CR4.SMEP=0, errata could be triggered by any vCPU CPL.
4289 * As most guests enable SMAP if they have also enabled SMEP, use above
4290 * logic in order to attempt minimize false-positive of detecting errata
4291 * while still preserving all cases semantic correctness.
4292 *4409 *
4293 * Workaround:4410 * This does _not_ mean that the erratum has been encountered, as the
4294 * To determine what instruction the guest was executing, the hypervisor4411 * DecodeAssist will also fail if the load for CS:RIP hits a legitimate
4295 * will have to decode the instruction at the instruction pointer.4412 * #PF, e.g. if the guest attempt to execute from emulated MMIO and
4413 * encountered a reserved/not-present #PF.
4296 *4414 *
4297 * In non SEV guest, hypervisor will be able to read the guest4415 * To hit the erratum, the following conditions must be true:
4298 * memory to decode the instruction pointer when insn_len is zero4416 * 1. CR4.SMAP=1 (obviously).
4299 * so we return true to indicate that decoding is possible.4417 * 2. CR4.SMEP=0 || CPL=3. If SMEP=1 and CPL<3, the erratum cannot
4418 * have been hit as the guest would have encountered a SMEP
4419 * violation #PF, not a #NPF.
4420 * 3. The #NPF is not due to a code fetch, in which case failure to
4421 * retrieve the instruction bytes is legitimate (see abvoe).
4300 *4422 *
4301 * But in the SEV guest, the guest memory is encrypted with the4423 * In addition, don't apply the erratum workaround if the #NPF occurred
4302 * guest specific key and hypervisor will not be able to decode the4424 * while translating guest page tables (see below).
4303 * instruction pointer so we will not able to workaround it. Lets
4304 * print the error and request to kill the guest.
4305 */4425 */
4306 if (likely(!insn || insn_len))4426 error_code = to_svm(vcpu)->vmcb->control.exit_info_1;
4307 return true;4427 if (error_code & (PFERR_GUEST_PAGE_MASK | PFERR_FETCH_MASK))
4308 4428 goto resume_guest;
4309 /*
4310 * If RIP is invalid, go ahead with emulation which will cause an
4311 * internal error exit.
4312 */
4313 if (!kvm_vcpu_gfn_to_memslot(vcpu, kvm_rip_read(vcpu) >> PAGE_SHIFT))
4314 return true;
4315 4429
4316 cr4 = kvm_read_cr4(vcpu);4430 cr4 = kvm_read_cr4(vcpu);
4317 smep = cr4 & X86_CR4_SMEP;4431 smep = cr4 & X86_CR4_SMEP;
4318 smap = cr4 & X86_CR4_SMAP;4432 smap = cr4 & X86_CR4_SMAP;
4319 is_user = svm_get_cpl(vcpu) == 3;4433 is_user = svm_get_cpl(vcpu) == 3;
4320 if (smap && (!smep || is_user)) {4434 if (smap && (!smep || is_user)) {
4321 if (!sev_guest(vcpu->kvm))
4322 return true;
4323
4324 pr_err_ratelimited("KVM: SEV Guest triggered AMD Erratum 1096\n");4435 pr_err_ratelimited("KVM: SEV Guest triggered AMD Erratum 1096\n");
4325 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);4436
4437 /*
4438 * If the fault occurred in userspace, arbitrarily inject #GP
4439 * to avoid killing the guest and to hopefully avoid confusing
4440 * the guest kernel too much, e.g. injecting #PF would not be
4441 * coherent with respect to the guest's page tables. Request
4442 * triple fault if the fault occurred in the kernel as there's
4443 * no fault that KVM can inject without confusing the guest.
4444 * In practice, the triple fault is moot as no sane SEV kernel
4445 * will execute from user memory while also running with SMAP=1.
4446 */
4447 if (is_user)
4448 kvm_inject_gp(vcpu, 0);
4449 else
4450 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4326 }4451 }
4327 4452
4453resume_guest:
4454 /*
4455 * If the erratum was not hit, simply resume the guest and let it fault
4456 * again. While awful, e.g. the vCPU may get stuck in an infinite loop
4457 * if the fault is at CPL=0, it's the lesser of all evils. Exiting to
4458 * userspace will kill the guest, and letting the emulator read garbage
4459 * will yield random behavior and potentially corrupt the guest.
4460 *
4461 * Simply resuming the guest is technically not a violation of the SEV
4462 * architecture. AMD's APM states that all code fetches and page table
4463 * accesses for SEV guest are encrypted, regardless of the C-Bit. The
4464 * APM also states that encrypted accesses to MMIO are "ignored", but
4465 * doesn't explicitly define "ignored", i.e. doing nothing and letting
4466 * the guest spin is technically "ignoring" the access.
4467 */
4328 return false;4468 return false;
4329}4469}
4330 4470
@@ -4478,7 +4618,7 @@ static struct kvm_x86_ops svm_x86_ops __initdata = { · 147 unmodified lines
4478 .pmu_ops = &amd_pmu_ops,4618 .pmu_ops = &amd_pmu_ops,
4479 .nested_ops = &svm_nested_ops,4619 .nested_ops = &svm_nested_ops,
4480 4620
4481 .deliver_posted_interrupt = svm_deliver_avic_intr,4621 .deliver_interrupt = svm_deliver_interrupt,
4482 .dy_apicv_has_pending_interrupt = svm_dy_apicv_has_pending_interrupt,4622 .dy_apicv_has_pending_interrupt = svm_dy_apicv_has_pending_interrupt,
4483 .update_pi_irte = svm_update_pi_irte,4623 .update_pi_irte = svm_update_pi_irte,
4484 .setup_mce = svm_setup_mce,4624 .setup_mce = svm_setup_mce,
@@ -4555,6 +4695,7 @@ static __init void svm_set_cpu_caps(void) · 70 unmodified lines
4555 /* CPUID 0x80000001 and 0x8000000A (SVM features) */4695 /* CPUID 0x80000001 and 0x8000000A (SVM features) */
4556 if (nested) {4696 if (nested) {
4557 kvm_cpu_cap_set(X86_FEATURE_SVM);4697 kvm_cpu_cap_set(X86_FEATURE_SVM);
4698 kvm_cpu_cap_set(X86_FEATURE_VMCBCLEAN);
4558 4699
4559 if (nrips)4700 if (nrips)
4560 kvm_cpu_cap_set(X86_FEATURE_NRIPS);4701 kvm_cpu_cap_set(X86_FEATURE_NRIPS);
arch/x86/kvm/svm/svm.h+4−18
@@ -304,11 +304,6 @@ static inline void vmcb_mark_all_clean(struct vmcb *vmcb) · 303 unmodified lines
304 & ~VMCB_ALWAYS_DIRTY_MASK;304 & ~VMCB_ALWAYS_DIRTY_MASK;
305}305}
306 306
307static inline bool vmcb_is_clean(struct vmcb *vmcb, int bit)
308{
309 return (vmcb->control.clean & (1 << bit));
310}
311
312static inline void vmcb_mark_dirty(struct vmcb *vmcb, int bit)307static inline void vmcb_mark_dirty(struct vmcb *vmcb, int bit)
313{308{
314 vmcb->control.clean &= ~(1 << bit);309 vmcb->control.clean &= ~(1 << bit);
@@ -494,6 +489,8 @@ void svm_set_gif(struct vcpu_svm *svm, bool value); · 179 unmodified lines
494int svm_invoke_exit_handler(struct kvm_vcpu *vcpu, u64 exit_code);489int svm_invoke_exit_handler(struct kvm_vcpu *vcpu, u64 exit_code);
495void set_msr_interception(struct kvm_vcpu *vcpu, u32 *msrpm, u32 msr,490void set_msr_interception(struct kvm_vcpu *vcpu, u32 *msrpm, u32 msr,
496 int read, int write);491 int read, int write);
492void svm_complete_interrupt_delivery(struct kvm_vcpu *vcpu, int delivery_mode,
493 int trig_mode, int vec);
497 494
498/* nested.c */495/* nested.c */
499 496
@@ -525,7 +522,7 @@ static inline bool nested_exit_on_nmi(struct vcpu_svm *svm) · 25 unmodified lines
525 522
526int enter_svm_guest_mode(struct kvm_vcpu *vcpu,523int enter_svm_guest_mode(struct kvm_vcpu *vcpu,
527 u64 vmcb_gpa, struct vmcb *vmcb12, bool from_vmrun);524 u64 vmcb_gpa, struct vmcb *vmcb12, bool from_vmrun);
528void svm_leave_nested(struct vcpu_svm *svm);525void svm_leave_nested(struct kvm_vcpu *vcpu);
529void svm_free_nested(struct vcpu_svm *svm);526void svm_free_nested(struct vcpu_svm *svm);
530int svm_allocate_nested(struct vcpu_svm *svm);527int svm_allocate_nested(struct vcpu_svm *svm);
531int nested_svm_vmrun(struct kvm_vcpu *vcpu);528int nested_svm_vmrun(struct kvm_vcpu *vcpu);
@@ -561,17 +558,6 @@ extern struct kvm_x86_nested_ops svm_nested_ops; · 29 unmodified lines
561 558
562/* avic.c */559/* avic.c */
563 560
564#define AVIC_LOGICAL_ID_ENTRY_GUEST_PHYSICAL_ID_MASK (0xFF)
565#define AVIC_LOGICAL_ID_ENTRY_VALID_BIT 31
566#define AVIC_LOGICAL_ID_ENTRY_VALID_MASK (1 << 31)
567
568#define AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK (0xFFULL)
569#define AVIC_PHYSICAL_ID_ENTRY_BACKING_PAGE_MASK (0xFFFFFFFFFFULL << 12)
570#define AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK (1ULL << 62)
571#define AVIC_PHYSICAL_ID_ENTRY_VALID_MASK (1ULL << 63)
572
573#define VMCB_AVIC_APIC_BAR_MASK 0xFFFFFFFFFF000ULL
574
575int avic_ga_log_notifier(u32 ga_tag);561int avic_ga_log_notifier(u32 ga_tag);
576void avic_vm_destroy(struct kvm *kvm);562void avic_vm_destroy(struct kvm *kvm);
577int avic_vm_init(struct kvm *kvm);563int avic_vm_init(struct kvm *kvm);
@@ -588,12 +574,12 @@ bool svm_check_apicv_inhibit_reasons(ulong bit); · 10 unmodified lines
588void svm_load_eoi_exitmap(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);574void svm_load_eoi_exitmap(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
589void svm_hwapic_irr_update(struct kvm_vcpu *vcpu, int max_irr);575void svm_hwapic_irr_update(struct kvm_vcpu *vcpu, int max_irr);
590void svm_hwapic_isr_update(struct kvm_vcpu *vcpu, int max_isr);576void svm_hwapic_isr_update(struct kvm_vcpu *vcpu, int max_isr);
591int svm_deliver_avic_intr(struct kvm_vcpu *vcpu, int vec);
592bool svm_dy_apicv_has_pending_interrupt(struct kvm_vcpu *vcpu);577bool svm_dy_apicv_has_pending_interrupt(struct kvm_vcpu *vcpu);
593int svm_update_pi_irte(struct kvm *kvm, unsigned int host_irq,578int svm_update_pi_irte(struct kvm *kvm, unsigned int host_irq,
594 uint32_t guest_irq, bool set);579 uint32_t guest_irq, bool set);
595void avic_vcpu_blocking(struct kvm_vcpu *vcpu);580void avic_vcpu_blocking(struct kvm_vcpu *vcpu);
596void avic_vcpu_unblocking(struct kvm_vcpu *vcpu);581void avic_vcpu_unblocking(struct kvm_vcpu *vcpu);
582void avic_ring_doorbell(struct kvm_vcpu *vcpu);
597 583
598/* sev.c */584/* sev.c */
599 585
arch/x86/kvm/svm/svm_onhyperv.h+4−8
@@ -46,6 +46,9 @@ static inline void svm_hv_init_vmcb(struct vmcb *vmcb) · 45 unmodified lines
46 if (npt_enabled &&46 if (npt_enabled &&
47 ms_hyperv.nested_features & HV_X64_NESTED_ENLIGHTENED_TLB)47 ms_hyperv.nested_features & HV_X64_NESTED_ENLIGHTENED_TLB)
48 hve->hv_enlightenments_control.enlightened_npt_tlb = 1;48 hve->hv_enlightenments_control.enlightened_npt_tlb = 1;
49
50 if (ms_hyperv.nested_features & HV_X64_NESTED_MSR_BITMAP)
51 hve->hv_enlightenments_control.msr_bitmap = 1;
49}52}
50 53
51static inline void svm_hv_hardware_setup(void)54static inline void svm_hv_hardware_setup(void)
@@ -83,14 +86,7 @@ static inline void svm_hv_vmcb_dirty_nested_enlightenments( · 31 unmodified lines
83 struct hv_enlightenments *hve =86 struct hv_enlightenments *hve =
84 (struct hv_enlightenments *)vmcb->control.reserved_sw;87 (struct hv_enlightenments *)vmcb->control.reserved_sw;
85 88
86 /*89 if (hve->hv_enlightenments_control.msr_bitmap)
87 * vmcb can be NULL if called during early vcpu init.
88 * And its okay not to mark vmcb dirty during vcpu init
89 * as we mark it dirty unconditionally towards end of vcpu
90 * init phase.
91 */
92 if (vmcb_is_clean(vmcb, VMCB_HV_NESTED_ENLIGHTENMENTS) &&
93 hve->hv_enlightenments_control.msr_bitmap)
94 vmcb_mark_dirty(vmcb, VMCB_HV_NESTED_ENLIGHTENMENTS);90 vmcb_mark_dirty(vmcb, VMCB_HV_NESTED_ENLIGHTENMENTS);
95}91}
96 92
arch/x86/kvm/vmx/capabilities.h+0−1
@@ -54,7 +54,6 @@ struct nested_vmx_msrs { · 53 unmodified lines
54 54
55struct vmcs_config {55struct vmcs_config {
56 int size;56 int size;
57 int order;
58 u32 basic_cap;57 u32 basic_cap;
59 u32 revision_id;58 u32 revision_id;
60 u32 pin_based_exec_ctrl;59 u32 pin_based_exec_ctrl;
arch/x86/kvm/vmx/evmcs.c+2−2
@@ -12,8 +12,6 @@ · 11 unmodified lines
12 12
13DEFINE_STATIC_KEY_FALSE(enable_evmcs);13DEFINE_STATIC_KEY_FALSE(enable_evmcs);
14 14
15#if IS_ENABLED(CONFIG_HYPERV)
16
17#define EVMCS1_OFFSET(x) offsetof(struct hv_enlightened_vmcs, x)15#define EVMCS1_OFFSET(x) offsetof(struct hv_enlightened_vmcs, x)
18#define EVMCS1_FIELD(number, name, clean_field)[ROL16(number, 6)] = \16#define EVMCS1_FIELD(number, name, clean_field)[ROL16(number, 6)] = \
19 {EVMCS1_OFFSET(name), clean_field}17 {EVMCS1_OFFSET(name), clean_field}
@@ -296,6 +294,7 @@ const struct evmcs_field vmcs_field_to_evmcs_1[] = { · 276 unmodified lines
296};294};
297const unsigned int nr_evmcs_1_fields = ARRAY_SIZE(vmcs_field_to_evmcs_1);295const unsigned int nr_evmcs_1_fields = ARRAY_SIZE(vmcs_field_to_evmcs_1);
298 296
297#if IS_ENABLED(CONFIG_HYPERV)
299__init void evmcs_sanitize_exec_ctrls(struct vmcs_config *vmcs_conf)298__init void evmcs_sanitize_exec_ctrls(struct vmcs_config *vmcs_conf)
300{299{
301 vmcs_conf->pin_based_exec_ctrl &= ~EVMCS1_UNSUPPORTED_PINCTRL;300 vmcs_conf->pin_based_exec_ctrl &= ~EVMCS1_UNSUPPORTED_PINCTRL;
@@ -362,6 +361,7 @@ void nested_evmcs_filter_control_msr(u32 msr_index, u64 *pdata) · 60 unmodified lines
362 case MSR_IA32_VMX_PROCBASED_CTLS2:361 case MSR_IA32_VMX_PROCBASED_CTLS2:
363 ctl_high &= ~EVMCS1_UNSUPPORTED_2NDEXEC;362 ctl_high &= ~EVMCS1_UNSUPPORTED_2NDEXEC;
364 break;363 break;
364 case MSR_IA32_VMX_TRUE_PINBASED_CTLS:
365 case MSR_IA32_VMX_PINBASED_CTLS:365 case MSR_IA32_VMX_PINBASED_CTLS:
366 ctl_high &= ~EVMCS1_UNSUPPORTED_PINCTRL;366 ctl_high &= ~EVMCS1_UNSUPPORTED_PINCTRL;
367 break;367 break;
arch/x86/kvm/vmx/evmcs.h+39−9
@@ -59,12 +59,12 @@ DECLARE_STATIC_KEY_FALSE(enable_evmcs); · 58 unmodified lines
59 SECONDARY_EXEC_SHADOW_VMCS | \59 SECONDARY_EXEC_SHADOW_VMCS | \
60 SECONDARY_EXEC_TSC_SCALING | \60 SECONDARY_EXEC_TSC_SCALING | \
61 SECONDARY_EXEC_PAUSE_LOOP_EXITING)61 SECONDARY_EXEC_PAUSE_LOOP_EXITING)
62#define EVMCS1_UNSUPPORTED_VMEXIT_CTRL (VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL)62#define EVMCS1_UNSUPPORTED_VMEXIT_CTRL \
63 (VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL | \
64 VM_EXIT_SAVE_VMX_PREEMPTION_TIMER)
63#define EVMCS1_UNSUPPORTED_VMENTRY_CTRL (VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL)65#define EVMCS1_UNSUPPORTED_VMENTRY_CTRL (VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL)
64#define EVMCS1_UNSUPPORTED_VMFUNC (VMX_VMFUNC_EPTP_SWITCHING)66#define EVMCS1_UNSUPPORTED_VMFUNC (VMX_VMFUNC_EPTP_SWITCHING)
65 67
66#if IS_ENABLED(CONFIG_HYPERV)
67
68struct evmcs_field {68struct evmcs_field {
69 u16 offset;69 u16 offset;
70 u16 clean_field;70 u16 clean_field;
@@ -73,26 +73,56 @@ struct evmcs_field { · 2 unmodified lines
73extern const struct evmcs_field vmcs_field_to_evmcs_1[];73extern const struct evmcs_field vmcs_field_to_evmcs_1[];
74extern const unsigned int nr_evmcs_1_fields;74extern const unsigned int nr_evmcs_1_fields;
75 75
76static __always_inline int get_evmcs_offset(unsigned long field,76static __always_inline int evmcs_field_offset(unsigned long field,
77 u16 *clean_field)77 u16 *clean_field)
78{78{
79 unsigned int index = ROL16(field, 6);79 unsigned int index = ROL16(field, 6);
80 const struct evmcs_field *evmcs_field;80 const struct evmcs_field *evmcs_field;
81 81
82 if (unlikely(index >= nr_evmcs_1_fields)) {82 if (unlikely(index >= nr_evmcs_1_fields))
83 WARN_ONCE(1, "KVM: accessing unsupported EVMCS field %lx\n",
84 field);
85 return -ENOENT;83 return -ENOENT;
86 }
87 84
88 evmcs_field = &vmcs_field_to_evmcs_1[index];85 evmcs_field = &vmcs_field_to_evmcs_1[index];
89 86
87 /*
88 * Use offset=0 to detect holes in eVMCS. This offset belongs to
89 * 'revision_id' but this field has no encoding and is supposed to
90 * be accessed directly.
91 */
92 if (unlikely(!evmcs_field->offset))
93 return -ENOENT;
94
90 if (clean_field)95 if (clean_field)
91 *clean_field = evmcs_field->clean_field;96 *clean_field = evmcs_field->clean_field;
92 97
93 return evmcs_field->offset;98 return evmcs_field->offset;
94}99}
95 100
101static inline u64 evmcs_read_any(struct hv_enlightened_vmcs *evmcs,
102 unsigned long field, u16 offset)
103{
104 /*
105 * vmcs12_read_any() doesn't care whether the supplied structure
106 * is 'struct vmcs12' or 'struct hv_enlightened_vmcs' as it takes
107 * the exact offset of the required field, use it for convenience
108 * here.
109 */
110 return vmcs12_read_any((void *)evmcs, field, offset);
111}
112
113#if IS_ENABLED(CONFIG_HYPERV)
114
115static __always_inline int get_evmcs_offset(unsigned long field,
116 u16 *clean_field)
117{
118 int offset = evmcs_field_offset(field, clean_field);
119
120 WARN_ONCE(offset < 0, "KVM: accessing unsupported EVMCS field %lx\n",
121 field);
122
123 return offset;
124}
125
96static __always_inline void evmcs_write64(unsigned long field, u64 value)126static __always_inline void evmcs_write64(unsigned long field, u64 value)
97{127{
98 u16 clean_field;128 u16 clean_field;
arch/x86/kvm/vmx/nested.c+54−28
@@ -7,6 +7,7 @@ · 6 unmodified lines
7#include <asm/mmu_context.h>7#include <asm/mmu_context.h>
8 8
9#include "cpuid.h"9#include "cpuid.h"
10#include "evmcs.h"
10#include "hyperv.h"11#include "hyperv.h"
11#include "mmu.h"12#include "mmu.h"
12#include "nested.h"13#include "nested.h"
@@ -4851,18 +4852,20 @@ static struct vmcs *alloc_shadow_vmcs(struct kvm_vcpu *vcpu) · 4838 unmodified lines
4851 struct loaded_vmcs *loaded_vmcs = vmx->loaded_vmcs;4852 struct loaded_vmcs *loaded_vmcs = vmx->loaded_vmcs;
4852 4853
4853 /*4854 /*
4854 * We should allocate a shadow vmcs for vmcs01 only when L14855 * KVM allocates a shadow VMCS only when L1 executes VMXON and frees it
4855 * executes VMXON and free it when L1 executes VMXOFF.4856 * when L1 executes VMXOFF or the vCPU is forced out of nested
4856 * As it is invalid to execute VMXON twice, we shouldn't reach4857 * operation. VMXON faults if the CPU is already post-VMXON, so it
4857 * here when vmcs01 already have an allocated shadow vmcs.4858 * should be impossible to already have an allocated shadow VMCS. KVM
4859 * doesn't support virtualization of VMCS shadowing, so vmcs01 should
4860 * always be the loaded VMCS.
4858 */4861 */
4859 WARN_ON(loaded_vmcs == &vmx->vmcs01 && loaded_vmcs->shadow_vmcs);4862 if (WARN_ON(loaded_vmcs != &vmx->vmcs01 || loaded_vmcs->shadow_vmcs))
4863 return loaded_vmcs->shadow_vmcs;
4864
4865 loaded_vmcs->shadow_vmcs = alloc_vmcs(true);
4866 if (loaded_vmcs->shadow_vmcs)
4867 vmcs_clear(loaded_vmcs->shadow_vmcs);
4860 4868
4861 if (!loaded_vmcs->shadow_vmcs) {
4862 loaded_vmcs->shadow_vmcs = alloc_vmcs(true);
4863 if (loaded_vmcs->shadow_vmcs)
4864 vmcs_clear(loaded_vmcs->shadow_vmcs);
4865 }
4866 return loaded_vmcs->shadow_vmcs;4869 return loaded_vmcs->shadow_vmcs;
4867}4870}
4868 4871
@@ -5099,27 +5102,49 @@ static int handle_vmread(struct kvm_vcpu *vcpu) · 230 unmodified lines
5099 if (!nested_vmx_check_permission(vcpu))5102 if (!nested_vmx_check_permission(vcpu))
5100 return 1;5103 return 1;
5101 5104
5102 /*
5103 * In VMX non-root operation, when the VMCS-link pointer is INVALID_GPA,
5104 * any VMREAD sets the ALU flags for VMfailInvalid.
5105 */
5106 if (vmx->nested.current_vmptr == INVALID_GPA ||
5107 (is_guest_mode(vcpu) &&
5108 get_vmcs12(vcpu)->vmcs_link_pointer == INVALID_GPA))
5109 return nested_vmx_failInvalid(vcpu);
5110
5111 /* Decode instruction info and find the field to read */5105 /* Decode instruction info and find the field to read */
5112 field = kvm_register_read(vcpu, (((instr_info) >> 28) & 0xf));5106 field = kvm_register_read(vcpu, (((instr_info) >> 28) & 0xf));
5113 5107
5114 offset = vmcs_field_to_offset(field);5108 if (!evmptr_is_valid(vmx->nested.hv_evmcs_vmptr)) {
5115 if (offset < 0)5109 /*
5116 return nested_vmx_fail(vcpu, VMXERR_UNSUPPORTED_VMCS_COMPONENT);5110 * In VMX non-root operation, when the VMCS-link pointer is INVALID_GPA,
5111 * any VMREAD sets the ALU flags for VMfailInvalid.
5112 */
5113 if (vmx->nested.current_vmptr == INVALID_GPA ||
5114 (is_guest_mode(vcpu) &&
5115 get_vmcs12(vcpu)->vmcs_link_pointer == INVALID_GPA))
5116 return nested_vmx_failInvalid(vcpu);
5117 5117
5118 if (!is_guest_mode(vcpu) && is_vmcs12_ext_field(field))5118 offset = get_vmcs12_field_offset(field);
5119 copy_vmcs02_to_vmcs12_rare(vcpu, vmcs12);5119 if (offset < 0)
5120 return nested_vmx_fail(vcpu, VMXERR_UNSUPPORTED_VMCS_COMPONENT);
5121
5122 if (!is_guest_mode(vcpu) && is_vmcs12_ext_field(field))
5123 copy_vmcs02_to_vmcs12_rare(vcpu, vmcs12);
5120 5124
5121 /* Read the field, zero-extended to a u64 value */5125 /* Read the field, zero-extended to a u64 value */
5122 value = vmcs12_read_any(vmcs12, field, offset);5126 value = vmcs12_read_any(vmcs12, field, offset);
5127 } else {
5128 /*
5129 * Hyper-V TLFS (as of 6.0b) explicitly states, that while an
5130 * enlightened VMCS is active VMREAD/VMWRITE instructions are
5131 * unsupported. Unfortunately, certain versions of Windows 11
5132 * don't comply with this requirement which is not enforced in
5133 * genuine Hyper-V. Allow VMREAD from an enlightened VMCS as a
5134 * workaround, as misbehaving guests will panic on VM-Fail.
5135 * Note, enlightened VMCS is incompatible with shadow VMCS so
5136 * all VMREADs from L2 should go to L1.
5137 */
5138 if (WARN_ON_ONCE(is_guest_mode(vcpu)))
5139 return nested_vmx_failInvalid(vcpu);
5140
5141 offset = evmcs_field_offset(field, NULL);
5142 if (offset < 0)
5143 return nested_vmx_fail(vcpu, VMXERR_UNSUPPORTED_VMCS_COMPONENT);
5144
5145 /* Read the field, zero-extended to a u64 value */
5146 value = evmcs_read_any(vmx->nested.hv_evmcs, field, offset);
5147 }
5123 5148
5124 /*5149 /*
5125 * Now copy part of this value to register or memory, as requested.5150 * Now copy part of this value to register or memory, as requested.
@@ -5214,7 +5239,7 @@ static int handle_vmwrite(struct kvm_vcpu *vcpu) · 88 unmodified lines
5214 5239
5215 field = kvm_register_read(vcpu, (((instr_info) >> 28) & 0xf));5240 field = kvm_register_read(vcpu, (((instr_info) >> 28) & 0xf));
5216 5241
5217 offset = vmcs_field_to_offset(field);5242 offset = get_vmcs12_field_offset(field);
5218 if (offset < 0)5243 if (offset < 0)
5219 return nested_vmx_fail(vcpu, VMXERR_UNSUPPORTED_VMCS_COMPONENT);5244 return nested_vmx_fail(vcpu, VMXERR_UNSUPPORTED_VMCS_COMPONENT);
5220 5245
@@ -6462,7 +6487,7 @@ static u64 nested_vmx_calc_vmcs_enum_msr(void) · 1241 unmodified lines
6462 max_idx = 0;6487 max_idx = 0;
6463 for (i = 0; i < nr_vmcs12_fields; i++) {6488 for (i = 0; i < nr_vmcs12_fields; i++) {
6464 /* The vmcs12 table is very, very sparsely populated. */6489 /* The vmcs12 table is very, very sparsely populated. */
6465 if (!vmcs_field_to_offset_table[i])6490 if (!vmcs12_field_offsets[i])
6466 continue;6491 continue;
6467 6492
6468 idx = vmcs_field_index(VMCS12_IDX_TO_ENC(i));6493 idx = vmcs_field_index(VMCS12_IDX_TO_ENC(i));
@@ -6771,6 +6796,7 @@ __init int nested_vmx_hardware_setup(int (*exit_handlers[])(struct kvm_vcpu *)) · 302 unmodified lines
6771}6796}
6772 6797
6773struct kvm_x86_nested_ops vmx_nested_ops = {6798struct kvm_x86_nested_ops vmx_nested_ops = {
6799 .leave_nested = vmx_leave_nested,
6774 .check_events = vmx_check_nested_events,6800 .check_events = vmx_check_nested_events,
6775 .hv_timer_pending = nested_vmx_preemption_timer_pending,6801 .hv_timer_pending = nested_vmx_preemption_timer_pending,
6776 .triple_fault = nested_vmx_triple_fault,6802 .triple_fault = nested_vmx_triple_fault,
arch/x86/kvm/vmx/vmcs12.c+2−2
@@ -8,7 +8,7 @@ · 7 unmodified lines
8 FIELD(number, name), \8 FIELD(number, name), \
9 [ROL16(number##_HIGH, 6)] = VMCS12_OFFSET(name) + sizeof(u32)9 [ROL16(number##_HIGH, 6)] = VMCS12_OFFSET(name) + sizeof(u32)
10 10
11const unsigned short vmcs_field_to_offset_table[] = {11const unsigned short vmcs12_field_offsets[] = {
12 FIELD(VIRTUAL_PROCESSOR_ID, virtual_processor_id),12 FIELD(VIRTUAL_PROCESSOR_ID, virtual_processor_id),
13 FIELD(POSTED_INTR_NV, posted_intr_nv),13 FIELD(POSTED_INTR_NV, posted_intr_nv),
14 FIELD(GUEST_ES_SELECTOR, guest_es_selector),14 FIELD(GUEST_ES_SELECTOR, guest_es_selector),
@@ -151,4 +151,4 @@ const unsigned short vmcs_field_to_offset_table[] = { · 136 unmodified lines
151 FIELD(HOST_RSP, host_rsp),151 FIELD(HOST_RSP, host_rsp),
152 FIELD(HOST_RIP, host_rip),152 FIELD(HOST_RIP, host_rip),
153};153};
154const unsigned int nr_vmcs12_fields = ARRAY_SIZE(vmcs_field_to_offset_table);154const unsigned int nr_vmcs12_fields = ARRAY_SIZE(vmcs12_field_offsets);
arch/x86/kvm/vmx/vmcs12.h+3−3
@@ -361,10 +361,10 @@ static inline void vmx_check_vmcs12_offsets(void) · 360 unmodified lines
361 CHECK_OFFSET(guest_pml_index, 996);361 CHECK_OFFSET(guest_pml_index, 996);
362}362}
363 363
364extern const unsigned short vmcs_field_to_offset_table[];364extern const unsigned short vmcs12_field_offsets[];
365extern const unsigned int nr_vmcs12_fields;365extern const unsigned int nr_vmcs12_fields;
366 366
367static inline short vmcs_field_to_offset(unsigned long field)367static inline short get_vmcs12_field_offset(unsigned long field)
368{368{
369 unsigned short offset;369 unsigned short offset;
370 unsigned int index;370 unsigned int index;
@@ -377,7 +377,7 @@ static inline short vmcs_field_to_offset(unsigned long field) · 6 unmodified lines
377 return -ENOENT;377 return -ENOENT;
378 378
379 index = array_index_nospec(index, nr_vmcs12_fields);379 index = array_index_nospec(index, nr_vmcs12_fields);
380 offset = vmcs_field_to_offset_table[index];380 offset = vmcs12_field_offsets[index];
381 if (offset == 0)381 if (offset == 0)
382 return -ENOENT;382 return -ENOENT;
383 return offset;383 return offset;
arch/x86/kvm/vmx/vmx.c+57−12
@@ -1487,11 +1487,12 @@ static int vmx_rtit_ctl_check(struct kvm_vcpu *vcpu, u64 data) · 1486 unmodified lines
1487 return 0;1487 return 0;
1488}1488}
1489 1489
1490static bool vmx_can_emulate_instruction(struct kvm_vcpu *vcpu, void *insn, int insn_len)1490static bool vmx_can_emulate_instruction(struct kvm_vcpu *vcpu, int emul_type,
1491 void *insn, int insn_len)
1491{1492{
1492 /*1493 /*
1493 * Emulation of instructions in SGX enclaves is impossible as RIP does1494 * Emulation of instructions in SGX enclaves is impossible as RIP does
1494 * not point tthe failing instruction, and even if it did, the code1495 * not point at the failing instruction, and even if it did, the code
1495 * stream is inaccessible. Inject #UD instead of exiting to userspace1496 * stream is inaccessible. Inject #UD instead of exiting to userspace
1496 * so that guest userspace can't DoS the guest simply by triggering1497 * so that guest userspace can't DoS the guest simply by triggering
1497 * emulation (enclaves are CPL3 only).1498 * emulation (enclaves are CPL3 only).
@@ -2603,7 +2604,6 @@ static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf, · 1105 unmodified lines
2603 return -EIO;2604 return -EIO;
2604 2605
2605 vmcs_conf->size = vmx_msr_high & 0x1fff;2606 vmcs_conf->size = vmx_msr_high & 0x1fff;
2606 vmcs_conf->order = get_order(vmcs_conf->size);
2607 vmcs_conf->basic_cap = vmx_msr_high & ~0x1fff;2607 vmcs_conf->basic_cap = vmx_msr_high & ~0x1fff;
2608 2608
2609 vmcs_conf->revision_id = vmx_msr_low;2609 vmcs_conf->revision_id = vmx_msr_low;
@@ -2628,7 +2628,7 @@ struct vmcs *alloc_vmcs_cpu(bool shadow, int cpu, gfp_t flags) · 18 unmodified lines
2628 struct page *pages;2628 struct page *pages;
2629 struct vmcs *vmcs;2629 struct vmcs *vmcs;
2630 2630
2631 pages = __alloc_pages_node(node, flags, vmcs_config.order);2631 pages = __alloc_pages_node(node, flags, 0);
2632 if (!pages)2632 if (!pages)
2633 return NULL;2633 return NULL;
2634 vmcs = page_address(pages);2634 vmcs = page_address(pages);
@@ -2647,7 +2647,7 @@ struct vmcs *alloc_vmcs_cpu(bool shadow, int cpu, gfp_t flags) · 12 unmodified lines
2647 2647
2648void free_vmcs(struct vmcs *vmcs)2648void free_vmcs(struct vmcs *vmcs)
2649{2649{
2650 free_pages((unsigned long)vmcs, vmcs_config.order);2650 free_page((unsigned long)vmcs);
2651}2651}
2652 2652
2653/*2653/*
@@ -4041,6 +4041,21 @@ static int vmx_deliver_posted_interrupt(struct kvm_vcpu *vcpu, int vector) · 1387 unmodified lines
4041 return 0;4041 return 0;
4042}4042}
4043 4043
4044static void vmx_deliver_interrupt(struct kvm_lapic *apic, int delivery_mode,
4045 int trig_mode, int vector)
4046{
4047 struct kvm_vcpu *vcpu = apic->vcpu;
4048
4049 if (vmx_deliver_posted_interrupt(vcpu, vector)) {
4050 kvm_lapic_set_irr(vector, apic);
4051 kvm_make_request(KVM_REQ_EVENT, vcpu);
4052 kvm_vcpu_kick(vcpu);
4053 } else {
4054 trace_kvm_apicv_accept_irq(vcpu->vcpu_id, delivery_mode,
4055 trig_mode, vector);
4056 }
4057}
4058
4044/*4059/*
4045 * Set up the vmcs's constant host-state fields, i.e., host-state fields that4060 * Set up the vmcs's constant host-state fields, i.e., host-state fields that
4046 * will not change in the lifetime of the guest.4061 * will not change in the lifetime of the guest.
@@ -4094,10 +4109,14 @@ void vmx_set_constant_host_state(struct vcpu_vmx *vmx) · 47 unmodified lines
4094 vmcs_write32(HOST_IA32_SYSENTER_CS, low32);4109 vmcs_write32(HOST_IA32_SYSENTER_CS, low32);
4095 4110
4096 /*4111 /*
4097 * If 32-bit syscall is enabled, vmx_vcpu_load_vcms rewrites4112 * SYSENTER is used for 32-bit system calls on either 32-bit or
4098 * HOST_IA32_SYSENTER_ESP.4113 * 64-bit kernels. It is always zero If neither is allowed, otherwise
4114 * vmx_vcpu_load_vmcs loads it with the per-CPU entry stack (and may
4115 * have already done so!).
4099 */4116 */
4100 vmcs_writel(HOST_IA32_SYSENTER_ESP, 0);4117 if (!IS_ENABLED(CONFIG_IA32_EMULATION) && !IS_ENABLED(CONFIG_X86_32))
4118 vmcs_writel(HOST_IA32_SYSENTER_ESP, 0);
4119
4101 rdmsrl(MSR_IA32_SYSENTER_EIP, tmpl);4120 rdmsrl(MSR_IA32_SYSENTER_EIP, tmpl);
4102 vmcs_writel(HOST_IA32_SYSENTER_EIP, tmpl); /* 22.2.3 */4121 vmcs_writel(HOST_IA32_SYSENTER_EIP, tmpl); /* 22.2.3 */
4103 4122
@@ -4901,8 +4920,33 @@ static int handle_exception_nmi(struct kvm_vcpu *vcpu) · 797 unmodified lines
4901 dr6 = vmx_get_exit_qual(vcpu);4920 dr6 = vmx_get_exit_qual(vcpu);
4902 if (!(vcpu->guest_debug &4921 if (!(vcpu->guest_debug &
4903 (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP))) {4922 (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP))) {
4923 /*
4924 * If the #DB was due to ICEBP, a.k.a. INT1, skip the
4925 * instruction. ICEBP generates a trap-like #DB, but
4926 * despite its interception control being tied to #DB,
4927 * is an instruction intercept, i.e. the VM-Exit occurs
4928 * on the ICEBP itself. Note, skipping ICEBP also
4929 * clears STI and MOVSS blocking.
4930 *
4931 * For all other #DBs, set vmcs.PENDING_DBG_EXCEPTIONS.BS
4932 * if single-step is enabled in RFLAGS and STI or MOVSS
4933 * blocking is active, as the CPU doesn't set the bit
4934 * on VM-Exit due to #DB interception. VM-Entry has a
4935 * consistency check that a single-step #DB is pending
4936 * in this scenario as the previous instruction cannot
4937 * have toggled RFLAGS.TF 0=>1 (because STI and POP/MOV
4938 * don't modify RFLAGS), therefore the one instruction
4939 * delay when activating single-step breakpoints must
4940 * have already expired. Note, the CPU sets/clears BS
4941 * as appropriate for all other VM-Exits types.
4942 */
4904 if (is_icebp(intr_info))4943 if (is_icebp(intr_info))
4905 WARN_ON(!skip_emulated_instruction(vcpu));4944 WARN_ON(!skip_emulated_instruction(vcpu));
4945 else if ((vmx_get_rflags(vcpu) & X86_EFLAGS_TF) &&
4946 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) &
4947 (GUEST_INTR_STATE_STI | GUEST_INTR_STATE_MOV_SS)))
4948 vmcs_writel(GUEST_PENDING_DBG_EXCEPTIONS,
4949 vmcs_readl(GUEST_PENDING_DBG_EXCEPTIONS) | DR6_BS);
4906 4950
4907 kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);4951 kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
4908 return 1;4952 return 1;
@@ -5397,7 +5441,7 @@ static int handle_ept_misconfig(struct kvm_vcpu *vcpu) · 488 unmodified lines
5397{5441{
5398 gpa_t gpa;5442 gpa_t gpa;
5399 5443
5400 if (!vmx_can_emulate_instruction(vcpu, NULL, 0))5444 if (!vmx_can_emulate_instruction(vcpu, EMULTYPE_PF, NULL, 0))
5401 return 1;5445 return 1;
5402 5446
5403 /*5447 /*
@@ -6725,7 +6769,7 @@ static fastpath_t vmx_exit_handlers_fastpath(struct kvm_vcpu *vcpu) · 1321 unmodified lines
6725static noinstr void vmx_vcpu_enter_exit(struct kvm_vcpu *vcpu,6769static noinstr void vmx_vcpu_enter_exit(struct kvm_vcpu *vcpu,
6726 struct vcpu_vmx *vmx)6770 struct vcpu_vmx *vmx)
6727{6771{
6728 kvm_guest_enter_irqoff();6772 guest_state_enter_irqoff();
6729 6773
6730 /* L1D Flush includes CPU buffer clear to mitigate MDS */6774 /* L1D Flush includes CPU buffer clear to mitigate MDS */
6731 if (static_branch_unlikely(&vmx_l1d_should_flush))6775 if (static_branch_unlikely(&vmx_l1d_should_flush))
@@ -6741,7 +6785,7 @@ static noinstr void vmx_vcpu_enter_exit(struct kvm_vcpu *vcpu, · 9 unmodified lines
6741 6785
6742 vcpu->arch.cr2 = native_read_cr2();6786 vcpu->arch.cr2 = native_read_cr2();
6743 6787
6744 kvm_guest_exit_irqoff();6788 guest_state_exit_irqoff();
6745}6789}
6746 6790
6747static fastpath_t vmx_vcpu_run(struct kvm_vcpu *vcpu)6791static fastpath_t vmx_vcpu_run(struct kvm_vcpu *vcpu)
@@ -7615,6 +7659,7 @@ static int vmx_leave_smm(struct kvm_vcpu *vcpu, const char *smstate) · 867 unmodified lines
7615 if (ret)7659 if (ret)
7616 return ret;7660 return ret;
7617 7661
7662 vmx->nested.nested_run_pending = 1;
7618 vmx->nested.smm.guest_mode = false;7663 vmx->nested.smm.guest_mode = false;
7619 }7664 }
7620 return 0;7665 return 0;
@@ -7739,7 +7784,7 @@ static struct kvm_x86_ops vmx_x86_ops __initdata = { · 118 unmodified lines
7739 .hwapic_isr_update = vmx_hwapic_isr_update,7784 .hwapic_isr_update = vmx_hwapic_isr_update,
7740 .guest_apic_has_interrupt = vmx_guest_apic_has_interrupt,7785 .guest_apic_has_interrupt = vmx_guest_apic_has_interrupt,
7741 .sync_pir_to_irr = vmx_sync_pir_to_irr,7786 .sync_pir_to_irr = vmx_sync_pir_to_irr,
7742 .deliver_posted_interrupt = vmx_deliver_posted_interrupt,7787 .deliver_interrupt = vmx_deliver_interrupt,
7743 .dy_apicv_has_pending_interrupt = pi_has_pending_interrupt,7788 .dy_apicv_has_pending_interrupt = pi_has_pending_interrupt,
7744 7789
7745 .set_tss_addr = vmx_set_tss_addr,7790 .set_tss_addr = vmx_set_tss_addr,
arch/x86/kvm/x86.c+89−17
@@ -90,6 +90,8 @@ · 89 unmodified lines
90u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;90u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
91EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);91EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
92 92
93#define ERR_PTR_USR(e) ((void __user *)ERR_PTR(e))
94
93#define emul_to_vcpu(ctxt) \95#define emul_to_vcpu(ctxt) \
94 ((struct kvm_vcpu *)(ctxt)->vcpu)96 ((struct kvm_vcpu *)(ctxt)->vcpu)
95 97
@@ -3535,6 +3537,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) · 3439 unmodified lines
3535 if (data & ~supported_xss)3537 if (data & ~supported_xss)
3536 return 1;3538 return 1;
3537 vcpu->arch.ia32_xss = data;3539 vcpu->arch.ia32_xss = data;
3540 kvm_update_cpuid_runtime(vcpu);
3538 break;3541 break;
3539 case MSR_SMI_COUNT:3542 case MSR_SMI_COUNT:
3540 if (!msr_info->host_initiated)3543 if (!msr_info->host_initiated)
@@ -4229,6 +4232,7 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) · 688 unmodified lines
4229 case KVM_CAP_SREGS2:4232 case KVM_CAP_SREGS2:
4230 case KVM_CAP_EXIT_ON_EMULATION_FAILURE:4233 case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
4231 case KVM_CAP_VCPU_ATTRIBUTES:4234 case KVM_CAP_VCPU_ATTRIBUTES:
4235 case KVM_CAP_SYS_ATTRIBUTES:
4232 r = 1;4236 r = 1;
4233 break;4237 break;
4234 case KVM_CAP_EXIT_HYPERCALL:4238 case KVM_CAP_EXIT_HYPERCALL:
@@ -4331,7 +4335,49 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) · 96 unmodified lines
4331 break;4335 break;
4332 }4336 }
4333 return r;4337 return r;
4338}
4339
4340static inline void __user *kvm_get_attr_addr(struct kvm_device_attr *attr)
4341{
4342 void __user *uaddr = (void __user*)(unsigned long)attr->addr;
4343
4344 if ((u64)(unsigned long)uaddr != attr->addr)
4345 return ERR_PTR_USR(-EFAULT);
4346 return uaddr;
4347}
4348
4349static int kvm_x86_dev_get_attr(struct kvm_device_attr *attr)
4350{
4351 u64 __user *uaddr = kvm_get_attr_addr(attr);
4352
4353 if (attr->group)
4354 return -ENXIO;
4334 4355
4356 if (IS_ERR(uaddr))
4357 return PTR_ERR(uaddr);
4358
4359 switch (attr->attr) {
4360 case KVM_X86_XCOMP_GUEST_SUPP:
4361 if (put_user(supported_xcr0, uaddr))
4362 return -EFAULT;
4363 return 0;
4364 default:
4365 return -ENXIO;
4366 break;
4367 }
4368}
4369
4370static int kvm_x86_dev_has_attr(struct kvm_device_attr *attr)
4371{
4372 if (attr->group)
4373 return -ENXIO;
4374
4375 switch (attr->attr) {
4376 case KVM_X86_XCOMP_GUEST_SUPP:
4377 return 0;
4378 default:
4379 return -ENXIO;
4380 }
4335}4381}
4336 4382
4337long kvm_arch_dev_ioctl(struct file *filp,4383long kvm_arch_dev_ioctl(struct file *filp,
@@ -4422,6 +4468,22 @@ long kvm_arch_dev_ioctl(struct file *filp, · 84 unmodified lines
4422 case KVM_GET_SUPPORTED_HV_CPUID:4468 case KVM_GET_SUPPORTED_HV_CPUID:
4423 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);4469 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4424 break;4470 break;
4471 case KVM_GET_DEVICE_ATTR: {
4472 struct kvm_device_attr attr;
4473 r = -EFAULT;
4474 if (copy_from_user(&attr, (void __user *)arg, sizeof(attr)))
4475 break;
4476 r = kvm_x86_dev_get_attr(&attr);
4477 break;
4478 }
4479 case KVM_HAS_DEVICE_ATTR: {
4480 struct kvm_device_attr attr;
4481 r = -EFAULT;
4482 if (copy_from_user(&attr, (void __user *)arg, sizeof(attr)))
4483 break;
4484 r = kvm_x86_dev_has_attr(&attr);
4485 break;
4486 }
4425 default:4487 default:
4426 r = -EINVAL;4488 r = -EINVAL;
4427 break;4489 break;
@@ -4860,8 +4922,10 @@ static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu, · 432 unmodified lines
4860 vcpu->arch.apic->sipi_vector = events->sipi_vector;4922 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4861 4923
4862 if (events->flags & KVM_VCPUEVENT_VALID_SMM) {4924 if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4863 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm)4925 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4926 kvm_x86_ops.nested_ops->leave_nested(vcpu);
4864 kvm_smm_changed(vcpu, events->smi.smm);4927 kvm_smm_changed(vcpu, events->smi.smm);
4928 }
4865 4929
4866 vcpu->arch.smi_pending = events->smi.pending;4930 vcpu->arch.smi_pending = events->smi.pending;
4867 4931
@@ -5022,11 +5086,11 @@ static int kvm_arch_tsc_has_attr(struct kvm_vcpu *vcpu, · 154 unmodified lines
5022static int kvm_arch_tsc_get_attr(struct kvm_vcpu *vcpu,5086static int kvm_arch_tsc_get_attr(struct kvm_vcpu *vcpu,
5023 struct kvm_device_attr *attr)5087 struct kvm_device_attr *attr)
5024{5088{
5025 u64 __user *uaddr = (u64 __user *)(unsigned long)attr->addr;5089 u64 __user *uaddr = kvm_get_attr_addr(attr);
5026 int r;5090 int r;
5027 5091
5028 if ((u64)(unsigned long)uaddr != attr->addr)5092 if (IS_ERR(uaddr))
5029 return -EFAULT;5093 return PTR_ERR(uaddr);
5030 5094
5031 switch (attr->attr) {5095 switch (attr->attr) {
5032 case KVM_VCPU_TSC_OFFSET:5096 case KVM_VCPU_TSC_OFFSET:
@@ -5045,12 +5109,12 @@ static int kvm_arch_tsc_get_attr(struct kvm_vcpu *vcpu, · 12 unmodified lines
5045static int kvm_arch_tsc_set_attr(struct kvm_vcpu *vcpu,5109static int kvm_arch_tsc_set_attr(struct kvm_vcpu *vcpu,
5046 struct kvm_device_attr *attr)5110 struct kvm_device_attr *attr)
5047{5111{
5048 u64 __user *uaddr = (u64 __user *)(unsigned long)attr->addr;5112 u64 __user *uaddr = kvm_get_attr_addr(attr);
5049 struct kvm *kvm = vcpu->kvm;5113 struct kvm *kvm = vcpu->kvm;
5050 int r;5114 int r;
5051 5115
5052 if ((u64)(unsigned long)uaddr != attr->addr)5116 if (IS_ERR(uaddr))
5053 return -EFAULT;5117 return PTR_ERR(uaddr);
5054 5118
5055 switch (attr->attr) {5119 switch (attr->attr) {
5056 case KVM_VCPU_TSC_OFFSET: {5120 case KVM_VCPU_TSC_OFFSET: {
@@ -6810,6 +6874,13 @@ int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val, · 1753 unmodified lines
6810}6874}
6811EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);6875EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6812 6876
6877static int kvm_can_emulate_insn(struct kvm_vcpu *vcpu, int emul_type,
6878 void *insn, int insn_len)
6879{
6880 return static_call(kvm_x86_can_emulate_instruction)(vcpu, emul_type,
6881 insn, insn_len);
6882}
6883
6813int handle_ud(struct kvm_vcpu *vcpu)6884int handle_ud(struct kvm_vcpu *vcpu)
6814{6885{
6815 static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };6886 static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
@@ -6817,7 +6888,7 @@ int handle_ud(struct kvm_vcpu *vcpu) · 1 unmodified line
6817 char sig[5]; /* ud2; .ascii "kvm" */6888 char sig[5]; /* ud2; .ascii "kvm" */
6818 struct x86_exception e;6889 struct x86_exception e;
6819 6890
6820 if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))6891 if (unlikely(!kvm_can_emulate_insn(vcpu, emul_type, NULL, 0)))
6821 return 1;6892 return 1;
6822 6893
6823 if (force_emulation_prefix &&6894 if (force_emulation_prefix &&
@@ -8193,7 +8264,7 @@ int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, · 1369 unmodified lines
8193 bool writeback = true;8264 bool writeback = true;
8194 bool write_fault_to_spt;8265 bool write_fault_to_spt;
8195 8266
8196 if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))8267 if (unlikely(!kvm_can_emulate_insn(vcpu, emulation_type, insn, insn_len)))
8197 return 1;8268 return 1;
8198 8269
8199 vcpu->arch.l1tf_flush_l1d = true;8270 vcpu->arch.l1tf_flush_l1d = true;
@@ -9706,7 +9777,7 @@ void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm, · 1506 unmodified lines
9706 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);9777 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9707}9778}
9708 9779
9709void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)9780static void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9710{9781{
9711 if (!lapic_in_kernel(vcpu))9782 if (!lapic_in_kernel(vcpu))
9712 return;9783 return;
@@ -9912,7 +9983,9 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu) · 199 unmodified lines
9912 * result in virtual interrupt delivery.9983 * result in virtual interrupt delivery.
9913 */9984 */
9914 local_irq_disable();9985 local_irq_disable();
9915 vcpu->mode = IN_GUEST_MODE;9986
9987 /* Store vcpu->apicv_active before vcpu->mode. */
9988 smp_store_release(&vcpu->mode, IN_GUEST_MODE);
9916 9989
9917 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);9990 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9918 9991
@@ -9972,6 +10045,8 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu) · 53 unmodified lines
9972 set_debugreg(0, 7);10045 set_debugreg(0, 7);
9973 }10046 }
9974 10047
10048 guest_timing_enter_irqoff();
10049
9975 for (;;) {10050 for (;;) {
9976 /*10051 /*
9977 * Assert that vCPU vs. VM APICv state is consistent. An APICv10052 * Assert that vCPU vs. VM APICv state is consistent. An APICv
@@ -10056,7 +10131,7 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu) · 78 unmodified lines
10056 * of accounting via context tracking, but the loss of accuracy is10131 * of accounting via context tracking, but the loss of accuracy is
10057 * acceptable for all known use cases.10132 * acceptable for all known use cases.
10058 */10133 */
10059 vtime_account_guest_exit();10134 guest_timing_exit_irqoff();
10060 10135
10061 if (lapic_in_kernel(vcpu)) {10136 if (lapic_in_kernel(vcpu)) {
10062 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;10137 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
@@ -11209,7 +11284,8 @@ void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event) · 1146 unmodified lines
11209 11284
11210 vcpu->arch.msr_misc_features_enables = 0;11285 vcpu->arch.msr_misc_features_enables = 0;
11211 11286
11212 vcpu->arch.xcr0 = XFEATURE_MASK_FP;11287 __kvm_set_xcr(vcpu, 0, XFEATURE_MASK_FP);
11288 __kvm_set_msr(vcpu, MSR_IA32_XSS, 0, true);
11213 }11289 }
11214 11290
11215 /* All GPRs except RDX (handled below) are zeroed on RESET/INIT. */11291 /* All GPRs except RDX (handled below) are zeroed on RESET/INIT. */
@@ -11226,8 +11302,6 @@ void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event) · 10 unmodified lines
11226 cpuid_0x1 = kvm_find_cpuid_entry(vcpu, 1, 0);11302 cpuid_0x1 = kvm_find_cpuid_entry(vcpu, 1, 0);
11227 kvm_rdx_write(vcpu, cpuid_0x1 ? cpuid_0x1->eax : 0x600);11303 kvm_rdx_write(vcpu, cpuid_0x1 ? cpuid_0x1->eax : 0x600);
11228 11304
11229 vcpu->arch.ia32_xss = 0;
11230
11231 static_call(kvm_x86_vcpu_reset)(vcpu, init_event);11305 static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
11232 11306
11233 kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);11307 kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
@@ -11571,8 +11645,6 @@ void kvm_arch_sync_events(struct kvm *kvm) · 337 unmodified lines
11571 kvm_free_pit(kvm);11645 kvm_free_pit(kvm);
11572}11646}
11573 11647
11574#define ERR_PTR_USR(e) ((void __user *)ERR_PTR(e))
11575
11576/**11648/**
11577 * __x86_set_memory_region: Setup KVM internal memory slot11649 * __x86_set_memory_region: Setup KVM internal memory slot
11578 *11650 *
arch/x86/kvm/x86.h+0−45
@@ -10,51 +10,6 @@ · 9 unmodified lines
10 10
11void kvm_spurious_fault(void);11void kvm_spurious_fault(void);
12 12
13static __always_inline void kvm_guest_enter_irqoff(void)
14{
15 /*
16 * VMENTER enables interrupts (host state), but the kernel state is
17 * interrupts disabled when this is invoked. Also tell RCU about
18 * it. This is the same logic as for exit_to_user_mode().
19 *
20 * This ensures that e.g. latency analysis on the host observes
21 * guest mode as interrupt enabled.
22 *
23 * guest_enter_irqoff() informs context tracking about the
24 * transition to guest mode and if enabled adjusts RCU state
25 * accordingly.
26 */
27 instrumentation_begin();
28 trace_hardirqs_on_prepare();
29 lockdep_hardirqs_on_prepare(CALLER_ADDR0);
30 instrumentation_end();
31
32 guest_enter_irqoff();
33 lockdep_hardirqs_on(CALLER_ADDR0);
34}
35
36static __always_inline void kvm_guest_exit_irqoff(void)
37{
38 /*
39 * VMEXIT disables interrupts (host state), but tracing and lockdep
40 * have them in state 'on' as recorded before entering guest mode.
41 * Same as enter_from_user_mode().
42 *
43 * context_tracking_guest_exit() restores host context and reinstates
44 * RCU if enabled and required.
45 *
46 * This needs to be done immediately after VM-Exit, before any code
47 * that might contain tracepoints or call out to the greater world,
48 * e.g. before x86_spec_ctrl_restore_host().
49 */
50 lockdep_hardirqs_off(CALLER_ADDR0);
51 context_tracking_guest_exit();
52
53 instrumentation_begin();
54 trace_hardirqs_off_finish();
55 instrumentation_end();
56}
57
58#define KVM_NESTED_VMENTER_CONSISTENCY_CHECK(consistency_check) \13#define KVM_NESTED_VMENTER_CONSISTENCY_CHECK(consistency_check) \
59({ \14({ \
60 bool failed = (consistency_check); \15 bool failed = (consistency_check); \
arch/x86/kvm/xen.c+69−38
@@ -133,32 +133,57 @@ static void kvm_xen_update_runstate(struct kvm_vcpu *v, int state) · 132 unmodified lines
133void kvm_xen_update_runstate_guest(struct kvm_vcpu *v, int state)133void kvm_xen_update_runstate_guest(struct kvm_vcpu *v, int state)
134{134{
135 struct kvm_vcpu_xen *vx = &v->arch.xen;135 struct kvm_vcpu_xen *vx = &v->arch.xen;
136 struct gfn_to_hva_cache *ghc = &vx->runstate_cache;
137 struct kvm_memslots *slots = kvm_memslots(v->kvm);
138 bool atomic = (state == RUNSTATE_runnable);
136 uint64_t state_entry_time;139 uint64_t state_entry_time;
137 unsigned int offset;140 int __user *user_state;
141 uint64_t __user *user_times;
138 142
139 kvm_xen_update_runstate(v, state);143 kvm_xen_update_runstate(v, state);
140 144
141 if (!vx->runstate_set)145 if (!vx->runstate_set)
142 return;146 return;
143 147
144 BUILD_BUG_ON(sizeof(struct compat_vcpu_runstate_info) != 0x2c);148 if (unlikely(slots->generation != ghc->generation || kvm_is_error_hva(ghc->hva)) &&
149 kvm_gfn_to_hva_cache_init(v->kvm, ghc, ghc->gpa, ghc->len))
150 return;
151
152 /* We made sure it fits in a single page */
153 BUG_ON(!ghc->memslot);
154
155 if (atomic)
156 pagefault_disable();
145 157
146 offset = offsetof(struct compat_vcpu_runstate_info, state_entry_time);
147#ifdef CONFIG_X86_64
148 /*158 /*
149 * The only difference is alignment of uint64_t in 32-bit.159 * The only difference between 32-bit and 64-bit versions of the
150 * So the first field 'state' is accessed directly using160 * runstate struct us the alignment of uint64_t in 32-bit, which
151 * offsetof() (where its offset happens to be zero), while the161 * means that the 64-bit version has an additional 4 bytes of
152 * remaining fields which are all uint64_t, start at 'offset'162 * padding after the first field 'state'.
153 * which we tweak here by adding 4.163 *
164 * So we use 'int __user *user_state' to point to the state field,
165 * and 'uint64_t __user *user_times' for runstate_entry_time. So
166 * the actual array of time[] in each state starts at user_times[1].
154 */167 */
168 BUILD_BUG_ON(offsetof(struct vcpu_runstate_info, state) != 0);
169 BUILD_BUG_ON(offsetof(struct compat_vcpu_runstate_info, state) != 0);
170 user_state = (int __user *)ghc->hva;
171
172 BUILD_BUG_ON(sizeof(struct compat_vcpu_runstate_info) != 0x2c);
173
174 user_times = (uint64_t __user *)(ghc->hva +
175 offsetof(struct compat_vcpu_runstate_info,
176 state_entry_time));
177#ifdef CONFIG_X86_64
155 BUILD_BUG_ON(offsetof(struct vcpu_runstate_info, state_entry_time) !=178 BUILD_BUG_ON(offsetof(struct vcpu_runstate_info, state_entry_time) !=
156 offsetof(struct compat_vcpu_runstate_info, state_entry_time) + 4);179 offsetof(struct compat_vcpu_runstate_info, state_entry_time) + 4);
157 BUILD_BUG_ON(offsetof(struct vcpu_runstate_info, time) !=180 BUILD_BUG_ON(offsetof(struct vcpu_runstate_info, time) !=
158 offsetof(struct compat_vcpu_runstate_info, time) + 4);181 offsetof(struct compat_vcpu_runstate_info, time) + 4);
159 182
160 if (v->kvm->arch.xen.long_mode)183 if (v->kvm->arch.xen.long_mode)
161 offset = offsetof(struct vcpu_runstate_info, state_entry_time);184 user_times = (uint64_t __user *)(ghc->hva +
185 offsetof(struct vcpu_runstate_info,
186 state_entry_time));
162#endif187#endif
163 /*188 /*
164 * First write the updated state_entry_time at the appropriate189 * First write the updated state_entry_time at the appropriate
@@ -172,10 +197,8 @@ void kvm_xen_update_runstate_guest(struct kvm_vcpu *v, int state) · 7 unmodified lines
172 BUILD_BUG_ON(sizeof_field(struct compat_vcpu_runstate_info, state_entry_time) !=197 BUILD_BUG_ON(sizeof_field(struct compat_vcpu_runstate_info, state_entry_time) !=
173 sizeof(state_entry_time));198 sizeof(state_entry_time));
174 199
175 if (kvm_write_guest_offset_cached(v->kvm, &v->arch.xen.runstate_cache,200 if (__put_user(state_entry_time, user_times))
176 &state_entry_time, offset,201 goto out;
177 sizeof(state_entry_time)))
178 return;
179 smp_wmb();202 smp_wmb();
180 203
181 /*204 /*
@@ -189,11 +212,8 @@ void kvm_xen_update_runstate_guest(struct kvm_vcpu *v, int state) · 7 unmodified lines
189 BUILD_BUG_ON(sizeof_field(struct compat_vcpu_runstate_info, state) !=212 BUILD_BUG_ON(sizeof_field(struct compat_vcpu_runstate_info, state) !=
190 sizeof(vx->current_runstate));213 sizeof(vx->current_runstate));
191 214
192 if (kvm_write_guest_offset_cached(v->kvm, &v->arch.xen.runstate_cache,215 if (__put_user(vx->current_runstate, user_state))
193 &vx->current_runstate,216 goto out;
194 offsetof(struct vcpu_runstate_info, state),
195 sizeof(vx->current_runstate)))
196 return;
197 217
198 /*218 /*
199 * Write the actual runstate times immediately after the219 * Write the actual runstate times immediately after the
@@ -208,24 +228,23 @@ void kvm_xen_update_runstate_guest(struct kvm_vcpu *v, int state) · 8 unmodified lines
208 BUILD_BUG_ON(sizeof_field(struct vcpu_runstate_info, time) !=228 BUILD_BUG_ON(sizeof_field(struct vcpu_runstate_info, time) !=
209 sizeof(vx->runstate_times));229 sizeof(vx->runstate_times));
210 230
211 if (kvm_write_guest_offset_cached(v->kvm, &v->arch.xen.runstate_cache,231 if (__copy_to_user(user_times + 1, vx->runstate_times, sizeof(vx->runstate_times)))
212 &vx->runstate_times[0],232 goto out;
213 offset + sizeof(u64),
214 sizeof(vx->runstate_times)))
215 return;
216
217 smp_wmb();233 smp_wmb();
218 234
219 /*235 /*
220 * Finally, clear the XEN_RUNSTATE_UPDATE bit in the guest's236 * Finally, clear the XEN_RUNSTATE_UPDATE bit in the guest's
221 * runstate_entry_time field.237 * runstate_entry_time field.
222 */238 */
223
224 state_entry_time &= ~XEN_RUNSTATE_UPDATE;239 state_entry_time &= ~XEN_RUNSTATE_UPDATE;
225 if (kvm_write_guest_offset_cached(v->kvm, &v->arch.xen.runstate_cache,240 __put_user(state_entry_time, user_times);
226 &state_entry_time, offset,241 smp_wmb();
227 sizeof(state_entry_time)))242
228 return;243 out:
244 mark_page_dirty_in_slot(v->kvm, ghc->memslot, ghc->gpa >> PAGE_SHIFT);
245
246 if (atomic)
247 pagefault_enable();
229}248}
230 249
231int __kvm_xen_has_interrupt(struct kvm_vcpu *v)250int __kvm_xen_has_interrupt(struct kvm_vcpu *v)
@@ -316,10 +335,7 @@ int __kvm_xen_has_interrupt(struct kvm_vcpu *v) · 84 unmodified lines
316 "\tnotq %0\n"335 "\tnotq %0\n"
317 "\t" LOCK_PREFIX "andq %0, %2\n"336 "\t" LOCK_PREFIX "andq %0, %2\n"
318 "2:\n"337 "2:\n"
319 "\t.section .fixup,\"ax\"\n"338 _ASM_EXTABLE_UA(1b, 2b)
320 "3:\tjmp\t2b\n"
321 "\t.previous\n"
322 _ASM_EXTABLE_UA(1b, 3b)
323 : "=r" (evtchn_pending_sel),339 : "=r" (evtchn_pending_sel),
324 "+m" (vi->evtchn_pending_sel),340 "+m" (vi->evtchn_pending_sel),
325 "+m" (v->arch.xen.evtchn_pending_sel)341 "+m" (v->arch.xen.evtchn_pending_sel)
@@ -335,10 +351,7 @@ int __kvm_xen_has_interrupt(struct kvm_vcpu *v) · 9 unmodified lines
335 "\tnotl %0\n"351 "\tnotl %0\n"
336 "\t" LOCK_PREFIX "andl %0, %2\n"352 "\t" LOCK_PREFIX "andl %0, %2\n"
337 "2:\n"353 "2:\n"
338 "\t.section .fixup,\"ax\"\n"354 _ASM_EXTABLE_UA(1b, 2b)
339 "3:\tjmp\t2b\n"
340 "\t.previous\n"
341 _ASM_EXTABLE_UA(1b, 3b)
342 : "=r" (evtchn_pending_sel32),355 : "=r" (evtchn_pending_sel32),
343 "+m" (vi->evtchn_pending_sel),356 "+m" (vi->evtchn_pending_sel),
344 "+m" (v->arch.xen.evtchn_pending_sel)357 "+m" (v->arch.xen.evtchn_pending_sel)
@@ -449,6 +462,12 @@ int kvm_xen_vcpu_set_attr(struct kvm_vcpu *vcpu, struct kvm_xen_vcpu_attr *data) · 104 unmodified lines
449 break;462 break;
450 }463 }
451 464
465 /* It must fit within a single page */
466 if ((data->u.gpa & ~PAGE_MASK) + sizeof(struct vcpu_info) > PAGE_SIZE) {
467 r = -EINVAL;
468 break;
469 }
470
452 r = kvm_gfn_to_hva_cache_init(vcpu->kvm,471 r = kvm_gfn_to_hva_cache_init(vcpu->kvm,
453 &vcpu->arch.xen.vcpu_info_cache,472 &vcpu->arch.xen.vcpu_info_cache,
454 data->u.gpa,473 data->u.gpa,
@@ -466,6 +485,12 @@ int kvm_xen_vcpu_set_attr(struct kvm_vcpu *vcpu, struct kvm_xen_vcpu_attr *data) · 11 unmodified lines
466 break;485 break;
467 }486 }
468 487
488 /* It must fit within a single page */
489 if ((data->u.gpa & ~PAGE_MASK) + sizeof(struct pvclock_vcpu_time_info) > PAGE_SIZE) {
490 r = -EINVAL;
491 break;
492 }
493
469 r = kvm_gfn_to_hva_cache_init(vcpu->kvm,494 r = kvm_gfn_to_hva_cache_init(vcpu->kvm,
470 &vcpu->arch.xen.vcpu_time_info_cache,495 &vcpu->arch.xen.vcpu_time_info_cache,
471 data->u.gpa,496 data->u.gpa,
@@ -487,6 +512,12 @@ int kvm_xen_vcpu_set_attr(struct kvm_vcpu *vcpu, struct kvm_xen_vcpu_attr *data) · 15 unmodified lines
487 break;512 break;
488 }513 }
489 514
515 /* It must fit within a single page */
516 if ((data->u.gpa & ~PAGE_MASK) + sizeof(struct vcpu_runstate_info) > PAGE_SIZE) {
517 r = -EINVAL;
518 break;
519 }
520
490 r = kvm_gfn_to_hva_cache_init(vcpu->kvm,521 r = kvm_gfn_to_hva_cache_init(vcpu->kvm,
491 &vcpu->arch.xen.runstate_cache,522 &vcpu->arch.xen.runstate_cache,
492 data->u.gpa,523 data->u.gpa,
arch/x86/pci/fixup.c+2−2
@@ -353,8 +353,8 @@ static void pci_fixup_video(struct pci_dev *pdev) · 352 unmodified lines
353 }353 }
354 }354 }
355}355}
356DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_ANY_ID, PCI_ANY_ID,356DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_ANY_ID, PCI_ANY_ID,
357 PCI_CLASS_DISPLAY_VGA, 8, pci_fixup_video);357 PCI_CLASS_DISPLAY_VGA, 8, pci_fixup_video);
358 358
359 359
360static const struct dmi_system_id msi_k8t_dmi_table[] = {360static const struct dmi_system_id msi_k8t_dmi_table[] = {
arch/x86/xen/enlighten_hvm.c+11−11
@@ -9,6 +9,7 @@ · 8 unmodified lines
9#include <xen/events.h>9#include <xen/events.h>
10#include <xen/interface/memory.h>10#include <xen/interface/memory.h>
11 11
12#include <asm/apic.h>
12#include <asm/cpu.h>13#include <asm/cpu.h>
13#include <asm/smp.h>14#include <asm/smp.h>
14#include <asm/io_apic.h>15#include <asm/io_apic.h>
@@ -184,8 +185,7 @@ static int xen_cpu_dead_hvm(unsigned int cpu) · 169 unmodified lines
184 185
185 if (xen_have_vector_callback && xen_feature(XENFEAT_hvm_safe_pvclock))186 if (xen_have_vector_callback && xen_feature(XENFEAT_hvm_safe_pvclock))
186 xen_teardown_timer(cpu);187 xen_teardown_timer(cpu);
187 188 return 0;
188 return 0;
189}189}
190 190
191static bool no_vector_callback __initdata;191static bool no_vector_callback __initdata;
@@ -242,15 +242,14 @@ static __init int xen_parse_no_vector_callback(char *arg) · 50 unmodified lines
242}242}
243early_param("xen_no_vector_callback", xen_parse_no_vector_callback);243early_param("xen_no_vector_callback", xen_parse_no_vector_callback);
244 244
245bool __init xen_hvm_need_lapic(void)245static __init bool xen_x2apic_available(void)
246{246{
247 if (xen_pv_domain())247 return x2apic_supported();
248 return false;248}
249 if (!xen_hvm_domain())249
250 return false;250static bool __init msi_ext_dest_id(void)
251 if (xen_feature(XENFEAT_hvm_pirqs) && xen_have_vector_callback)251{
252 return false;252 return cpuid_eax(xen_cpuid_base() + 4) & XEN_HVM_CPUID_EXT_DEST_ID;
253 return true;
254}253}
255 254
256static __init void xen_hvm_guest_late_init(void)255static __init void xen_hvm_guest_late_init(void)
@@ -312,9 +311,10 @@ struct hypervisor_x86 x86_hyper_xen_hvm __initdata = { · 55 unmodified lines
312 .detect = xen_platform_hvm,311 .detect = xen_platform_hvm,
313 .type = X86_HYPER_XEN_HVM,312 .type = X86_HYPER_XEN_HVM,
314 .init.init_platform = xen_hvm_guest_init,313 .init.init_platform = xen_hvm_guest_init,
315 .init.x2apic_available = xen_x2apic_para_available,314 .init.x2apic_available = xen_x2apic_available,
316 .init.init_mem_mapping = xen_hvm_init_mem_mapping,315 .init.init_mem_mapping = xen_hvm_init_mem_mapping,
317 .init.guest_late_init = xen_hvm_guest_late_init,316 .init.guest_late_init = xen_hvm_guest_late_init,
317 .init.msi_ext_dest_id = msi_ext_dest_id,
318 .runtime.pin_vcpu = xen_pin_vcpu,318 .runtime.pin_vcpu = xen_pin_vcpu,
319 .ignore_nopv = true,319 .ignore_nopv = true,
320};320};
arch/x86/xen/enlighten_pv.c+0−4
@@ -1341,10 +1341,6 @@ asmlinkage __visible void __init xen_start_kernel(void) · 1340 unmodified lines
1341 1341
1342 xen_acpi_sleep_register();1342 xen_acpi_sleep_register();
1343 1343
1344 /* Avoid searching for BIOS MP tables */
1345 x86_init.mpparse.find_smp_config = x86_init_noop;
1346 x86_init.mpparse.get_smp_config = x86_init_uint_noop;
1347
1348 xen_boot_params_init_edd();1344 xen_boot_params_init_edd();
1349 1345
1350#ifdef CONFIG_ACPI1346#ifdef CONFIG_ACPI
arch/x86/xen/smp_pv.c+6−20
@@ -148,28 +148,12 @@ int xen_smp_intr_init_pv(unsigned int cpu) · 147 unmodified lines
148 return rc;148 return rc;
149}149}
150 150
151static void __init xen_fill_possible_map(void)151static void __init _get_smp_config(unsigned int early)
152{
153 int i, rc;
154
155 if (xen_initial_domain())
156 return;
157
158 for (i = 0; i < nr_cpu_ids; i++) {
159 rc = HYPERVISOR_vcpu_op(VCPUOP_is_up, i, NULL);
160 if (rc >= 0) {
161 num_processors++;
162 set_cpu_possible(i, true);
163 }
164 }
165}
166
167static void __init xen_filter_cpu_maps(void)
168{152{
169 int i, rc;153 int i, rc;
170 unsigned int subtract = 0;154 unsigned int subtract = 0;
171 155
172 if (!xen_initial_domain())156 if (early)
173 return;157 return;
174 158
175 num_processors = 0;159 num_processors = 0;
@@ -210,7 +194,6 @@ static void __init xen_pv_smp_prepare_boot_cpu(void) · 34 unmodified lines
210 * sure the old memory can be recycled. */194 * sure the old memory can be recycled. */
211 make_lowmem_page_readwrite(xen_initial_gdt);195 make_lowmem_page_readwrite(xen_initial_gdt);
212 196
213 xen_filter_cpu_maps();
214 xen_setup_vcpu_info_placement();197 xen_setup_vcpu_info_placement();
215 198
216 /*199 /*
@@ -476,5 +459,8 @@ static const struct smp_ops xen_smp_ops __initconst = { · 259 unmodified lines
476void __init xen_smp_init(void)459void __init xen_smp_init(void)
477{460{
478 smp_ops = xen_smp_ops;461 smp_ops = xen_smp_ops;
479 xen_fill_possible_map();462
463 /* Avoid searching for BIOS MP tables */
464 x86_init.mpparse.find_smp_config = x86_init_noop;
465 x86_init.mpparse.get_smp_config = _get_smp_config;
480}466}
arch/x86/xen/vga.c+8−8
@@ -57,6 +57,14 @@ void __init xen_init_vga(const struct dom0_vga_console_info *info, size_t size) · 56 unmodified lines
57 screen_info->rsvd_size = info->u.vesa_lfb.rsvd_size;57 screen_info->rsvd_size = info->u.vesa_lfb.rsvd_size;
58 screen_info->rsvd_pos = info->u.vesa_lfb.rsvd_pos;58 screen_info->rsvd_pos = info->u.vesa_lfb.rsvd_pos;
59 59
60 if (size >= offsetof(struct dom0_vga_console_info,
61 u.vesa_lfb.ext_lfb_base)
62 + sizeof(info->u.vesa_lfb.ext_lfb_base)
63 && info->u.vesa_lfb.ext_lfb_base) {
64 screen_info->ext_lfb_base = info->u.vesa_lfb.ext_lfb_base;
65 screen_info->capabilities |= VIDEO_CAPABILITY_64BIT_BASE;
66 }
67
60 if (info->video_type == XEN_VGATYPE_EFI_LFB) {68 if (info->video_type == XEN_VGATYPE_EFI_LFB) {
61 screen_info->orig_video_isVGA = VIDEO_TYPE_EFI;69 screen_info->orig_video_isVGA = VIDEO_TYPE_EFI;
62 break;70 break;
@@ -66,14 +74,6 @@ void __init xen_init_vga(const struct dom0_vga_console_info *info, size_t size) · 3 unmodified lines
66 u.vesa_lfb.mode_attrs)74 u.vesa_lfb.mode_attrs)
67 + sizeof(info->u.vesa_lfb.mode_attrs))75 + sizeof(info->u.vesa_lfb.mode_attrs))
68 screen_info->vesa_attributes = info->u.vesa_lfb.mode_attrs;76 screen_info->vesa_attributes = info->u.vesa_lfb.mode_attrs;
69
70 if (size >= offsetof(struct dom0_vga_console_info,
71 u.vesa_lfb.ext_lfb_base)
72 + sizeof(info->u.vesa_lfb.ext_lfb_base)
73 && info->u.vesa_lfb.ext_lfb_base) {
74 screen_info->ext_lfb_base = info->u.vesa_lfb.ext_lfb_base;
75 screen_info->capabilities |= VIDEO_CAPABILITY_64BIT_BASE;
76 }
77 break;77 break;
78 }78 }
79}79}
block/bfq-iosched.c+2−0
@@ -7018,6 +7018,8 @@ static void bfq_exit_queue(struct elevator_queue *e) · 7017 unmodified lines
7018 spin_unlock_irq(&bfqd->lock);7018 spin_unlock_irq(&bfqd->lock);
7019#endif7019#endif
7020 7020
7021 wbt_enable_default(bfqd->queue);
7022
7021 kfree(bfqd);7023 kfree(bfqd);
7022}7024}
7023 7025
block/bio-integrity.c+1−1
@@ -373,7 +373,7 @@ void bio_integrity_advance(struct bio *bio, unsigned int bytes_done) · 372 unmodified lines
373 struct blk_integrity *bi = blk_get_integrity(bio->bi_bdev->bd_disk);373 struct blk_integrity *bi = blk_get_integrity(bio->bi_bdev->bd_disk);
374 unsigned bytes = bio_integrity_bytes(bi, bytes_done >> 9);374 unsigned bytes = bio_integrity_bytes(bi, bytes_done >> 9);
375 375
376 bip->bip_iter.bi_sector += bytes_done >> 9;376 bip->bip_iter.bi_sector += bio_integrity_intervals(bi, bytes_done >> 9);
377 bvec_iter_advance(bip->bip_vec, &bip->bip_iter, bytes);377 bvec_iter_advance(bip->bip_vec, &bip->bip_iter, bytes);
378}378}
379 379
block/blk-core.c+21−14
@@ -284,13 +284,6 @@ void blk_queue_start_drain(struct request_queue *q) · 283 unmodified lines
284 wake_up_all(&q->mq_freeze_wq);284 wake_up_all(&q->mq_freeze_wq);
285}285}
286 286
287void blk_set_queue_dying(struct request_queue *q)
288{
289 blk_queue_flag_set(QUEUE_FLAG_DYING, q);
290 blk_queue_start_drain(q);
291}
292EXPORT_SYMBOL_GPL(blk_set_queue_dying);
293
294/**287/**
295 * blk_cleanup_queue - shutdown a request queue288 * blk_cleanup_queue - shutdown a request queue
296 * @q: request queue to shutdown289 * @q: request queue to shutdown
@@ -308,7 +301,8 @@ void blk_cleanup_queue(struct request_queue *q) · 11 unmodified lines
308 WARN_ON_ONCE(blk_queue_registered(q));301 WARN_ON_ONCE(blk_queue_registered(q));
309 302
310 /* mark @q DYING, no new request or merges will be allowed afterwards */303 /* mark @q DYING, no new request or merges will be allowed afterwards */
311 blk_set_queue_dying(q);304 blk_queue_flag_set(QUEUE_FLAG_DYING, q);
305 blk_queue_start_drain(q);
312 306
313 blk_queue_flag_set(QUEUE_FLAG_NOMERGES, q);307 blk_queue_flag_set(QUEUE_FLAG_NOMERGES, q);
314 blk_queue_flag_set(QUEUE_FLAG_NOXMERGES, q);308 blk_queue_flag_set(QUEUE_FLAG_NOXMERGES, q);
@@ -1061,20 +1055,32 @@ again: · 746 unmodified lines
1061}1055}
1062 1056
1063static unsigned long __part_start_io_acct(struct block_device *part,1057static unsigned long __part_start_io_acct(struct block_device *part,
1064 unsigned int sectors, unsigned int op)1058 unsigned int sectors, unsigned int op,
1059 unsigned long start_time)
1065{1060{
1066 const int sgrp = op_stat_group(op);1061 const int sgrp = op_stat_group(op);
1067 unsigned long now = READ_ONCE(jiffies);
1068 1062
1069 part_stat_lock();1063 part_stat_lock();
1070 update_io_ticks(part, now, false);1064 update_io_ticks(part, start_time, false);
1071 part_stat_inc(part, ios[sgrp]);1065 part_stat_inc(part, ios[sgrp]);
1072 part_stat_add(part, sectors[sgrp], sectors);1066 part_stat_add(part, sectors[sgrp], sectors);
1073 part_stat_local_inc(part, in_flight[op_is_write(op)]);1067 part_stat_local_inc(part, in_flight[op_is_write(op)]);
1074 part_stat_unlock();1068 part_stat_unlock();
1075 1069
1076 return now;1070 return start_time;
1071}
1072
1073/**
1074 * bio_start_io_acct_time - start I/O accounting for bio based drivers
1075 * @bio: bio to start account for
1076 * @start_time: start time that should be passed back to bio_end_io_acct().
1077 */
1078void bio_start_io_acct_time(struct bio *bio, unsigned long start_time)
1079{
1080 __part_start_io_acct(bio->bi_bdev, bio_sectors(bio),
1081 bio_op(bio), start_time);
1077}1082}
1083EXPORT_SYMBOL_GPL(bio_start_io_acct_time);
1078 1084
1079/**1085/**
1080 * bio_start_io_acct - start I/O accounting for bio based drivers1086 * bio_start_io_acct - start I/O accounting for bio based drivers
@@ -1084,14 +1090,15 @@ static unsigned long __part_start_io_acct(struct block_device *part, · 3 unmodified lines
1084 */1090 */
1085unsigned long bio_start_io_acct(struct bio *bio)1091unsigned long bio_start_io_acct(struct bio *bio)
1086{1092{
1087 return __part_start_io_acct(bio->bi_bdev, bio_sectors(bio), bio_op(bio));1093 return __part_start_io_acct(bio->bi_bdev, bio_sectors(bio),
1094 bio_op(bio), jiffies);
1088}1095}
1089EXPORT_SYMBOL_GPL(bio_start_io_acct);1096EXPORT_SYMBOL_GPL(bio_start_io_acct);
1090 1097
1091unsigned long disk_start_io_acct(struct gendisk *disk, unsigned int sectors,1098unsigned long disk_start_io_acct(struct gendisk *disk, unsigned int sectors,
1092 unsigned int op)1099 unsigned int op)
1093{1100{
1094 return __part_start_io_acct(disk->part0, sectors, op);1101 return __part_start_io_acct(disk->part0, sectors, op, jiffies);
1095}1102}
1096EXPORT_SYMBOL(disk_start_io_acct);1103EXPORT_SYMBOL(disk_start_io_acct);
1097 1104
block/blk-ia-ranges.c+1−1
@@ -144,7 +144,7 @@ int disk_register_independent_access_ranges(struct gendisk *disk, · 143 unmodified lines
144 &q->kobj, "%s", "independent_access_ranges");144 &q->kobj, "%s", "independent_access_ranges");
145 if (ret) {145 if (ret) {
146 q->ia_ranges = NULL;146 q->ia_ranges = NULL;
147 kfree(iars);147 kobject_put(&iars->kobj);
148 return ret;148 return ret;
149 }149 }
150 150
block/blk-map.c+1−1
@@ -446,7 +446,7 @@ static struct bio *bio_copy_kern(struct request_queue *q, void *data, · 445 unmodified lines
446 if (bytes > len)446 if (bytes > len)
447 bytes = len;447 bytes = len;
448 448
449 page = alloc_page(GFP_NOIO | gfp_mask);449 page = alloc_page(GFP_NOIO | __GFP_ZERO | gfp_mask);
450 if (!page)450 if (!page)
451 goto cleanup;451 goto cleanup;
452 452
block/blk-mq.c+6−0
@@ -736,6 +736,10 @@ static void blk_complete_request(struct request *req) · 735 unmodified lines
736 736
737 /* Completion has already been traced */737 /* Completion has already been traced */
738 bio_clear_flag(bio, BIO_TRACE_COMPLETION);738 bio_clear_flag(bio, BIO_TRACE_COMPLETION);
739
740 if (req_op(req) == REQ_OP_ZONE_APPEND)
741 bio->bi_iter.bi_sector = req->__sector;
742
739 if (!is_flush)743 if (!is_flush)
740 bio_endio(bio);744 bio_endio(bio);
741 bio = next;745 bio = next;
@@ -2922,6 +2926,8 @@ blk_status_t blk_insert_cloned_request(struct request_queue *q, struct request * · 2180 unmodified lines
2922 */2926 */
2923 blk_mq_run_dispatch_ops(rq->q,2927 blk_mq_run_dispatch_ops(rq->q,
2924 ret = blk_mq_request_issue_directly(rq, true));2928 ret = blk_mq_request_issue_directly(rq, true));
2929 if (ret)
2930 blk_account_io_done(rq, ktime_get_ns());
2925 return ret;2931 return ret;
2926}2932}
2927EXPORT_SYMBOL_GPL(blk_insert_cloned_request);2933EXPORT_SYMBOL_GPL(blk_insert_cloned_request);
block/elevator.c+0−2
@@ -525,8 +525,6 @@ void elv_unregister_queue(struct request_queue *q) · 524 unmodified lines
525 kobject_del(&e->kobj);525 kobject_del(&e->kobj);
526 526
527 e->registered = 0;527 e->registered = 0;
528 /* Re-enable throttling in case elevator disabled it */
529 wbt_enable_default(q);
530 }528 }
531}529}
532 530
block/fops.c+19−14
@@ -566,34 +566,37 @@ static ssize_t blkdev_read_iter(struct kiocb *iocb, struct iov_iter *to) · 565 unmodified lines
566{566{
567 struct block_device *bdev = iocb->ki_filp->private_data;567 struct block_device *bdev = iocb->ki_filp->private_data;
568 loff_t size = bdev_nr_bytes(bdev);568 loff_t size = bdev_nr_bytes(bdev);
569 size_t count = iov_iter_count(to);
570 loff_t pos = iocb->ki_pos;569 loff_t pos = iocb->ki_pos;
571 size_t shorted = 0;570 size_t shorted = 0;
572 ssize_t ret = 0;571 ssize_t ret = 0;
572 size_t count;
573 573
574 if (unlikely(pos + count > size)) {574 if (unlikely(pos + iov_iter_count(to) > size)) {
575 if (pos >= size)575 if (pos >= size)
576 return 0;576 return 0;
577 size -= pos;577 size -= pos;
578 if (count > size) {578 shorted = iov_iter_count(to) - size;
579 shorted = count - size;579 iov_iter_truncate(to, size);
580 iov_iter_truncate(to, size);
581 }
582 }580 }
583 581
582 count = iov_iter_count(to);
583 if (!count)
584 goto reexpand; /* skip atime */
585
584 if (iocb->ki_flags & IOCB_DIRECT) {586 if (iocb->ki_flags & IOCB_DIRECT) {
585 struct address_space *mapping = iocb->ki_filp->f_mapping;587 struct address_space *mapping = iocb->ki_filp->f_mapping;
586 588
587 if (iocb->ki_flags & IOCB_NOWAIT) {589 if (iocb->ki_flags & IOCB_NOWAIT) {
588 if (filemap_range_needs_writeback(mapping, iocb->ki_pos,590 if (filemap_range_needs_writeback(mapping, pos,
589 iocb->ki_pos + count - 1))591 pos + count - 1)) {
590 return -EAGAIN;592 ret = -EAGAIN;
593 goto reexpand;
594 }
591 } else {595 } else {
592 ret = filemap_write_and_wait_range(mapping,596 ret = filemap_write_and_wait_range(mapping, pos,
593 iocb->ki_pos,597 pos + count - 1);
594 iocb->ki_pos + count - 1);
595 if (ret < 0)598 if (ret < 0)
596 return ret;599 goto reexpand;
597 }600 }
598 601
599 file_accessed(iocb->ki_filp);602 file_accessed(iocb->ki_filp);
@@ -603,12 +606,14 @@ static ssize_t blkdev_read_iter(struct kiocb *iocb, struct iov_iter *to) · 3 unmodified lines
603 iocb->ki_pos += ret;606 iocb->ki_pos += ret;
604 count -= ret;607 count -= ret;
605 }608 }
609 iov_iter_revert(to, count - iov_iter_count(to));
606 if (ret < 0 || !count)610 if (ret < 0 || !count)
607 return ret;611 goto reexpand;
608 }612 }
609 613
610 ret = filemap_read(iocb, to, ret);614 ret = filemap_read(iocb, to, ret);
611 615
616reexpand:
612 if (unlikely(shorted))617 if (unlikely(shorted))
613 iov_iter_reexpand(to, iov_iter_count(to) + shorted);618 iov_iter_reexpand(to, iov_iter_count(to) + shorted);
614 return ret;619 return ret;
block/genhd.c+14−0
@@ -548,6 +548,20 @@ out_free_ext_minor: · 547 unmodified lines
548}548}
549EXPORT_SYMBOL(device_add_disk);549EXPORT_SYMBOL(device_add_disk);
550 550
551/**
552 * blk_mark_disk_dead - mark a disk as dead
553 * @disk: disk to mark as dead
554 *
555 * Mark as disk as dead (e.g. surprise removed) and don't accept any new I/O
556 * to this disk.
557 */
558void blk_mark_disk_dead(struct gendisk *disk)
559{
560 set_bit(GD_DEAD, &disk->state);
561 blk_queue_start_drain(disk->queue);
562}
563EXPORT_SYMBOL_GPL(blk_mark_disk_dead);
564
551/**565/**
552 * del_gendisk - remove the gendisk566 * del_gendisk - remove the gendisk
553 * @disk: the struct gendisk to remove567 * @disk: the struct gendisk to remove
crypto/af_alg.c+0−3
@@ -25,12 +25,9 @@ struct alg_type_list { · 24 unmodified lines
25 struct list_head list;25 struct list_head list;
26};26};
27 27
28static atomic_long_t alg_memory_allocated;
29
30static struct proto alg_proto = {28static struct proto alg_proto = {
31 .name = "ALG",29 .name = "ALG",
32 .owner = THIS_MODULE,30 .owner = THIS_MODULE,
33 .memory_allocated = &alg_memory_allocated,
34 .obj_size = sizeof(struct alg_sock),31 .obj_size = sizeof(struct alg_sock),
35};32};
36 33
crypto/algapi.c+1−0
@@ -1324,3 +1324,4 @@ module_exit(crypto_algapi_exit); · 1323 unmodified lines
1324 1324
1325MODULE_LICENSE("GPL");1325MODULE_LICENSE("GPL");
1326MODULE_DESCRIPTION("Cryptographic algorithms API");1326MODULE_DESCRIPTION("Cryptographic algorithms API");
1327MODULE_SOFTDEP("pre: cryptomgr");
crypto/api.c+0−1
@@ -643,4 +643,3 @@ EXPORT_SYMBOL_GPL(crypto_req_done); · 642 unmodified lines
643 643
644MODULE_DESCRIPTION("Cryptographic core API");644MODULE_DESCRIPTION("Cryptographic core API");
645MODULE_LICENSE("GPL");645MODULE_LICENSE("GPL");
646MODULE_SOFTDEP("pre: cryptomgr");
crypto/blake2s_generic.c+2−2
@@ -15,12 +15,12 @@ · 14 unmodified lines
15static int crypto_blake2s_update_generic(struct shash_desc *desc,15static int crypto_blake2s_update_generic(struct shash_desc *desc,
16 const u8 *in, unsigned int inlen)16 const u8 *in, unsigned int inlen)
17{17{
18 return crypto_blake2s_update(desc, in, inlen, blake2s_compress_generic);18 return crypto_blake2s_update(desc, in, inlen, true);
19}19}
20 20
21static int crypto_blake2s_final_generic(struct shash_desc *desc, u8 *out)21static int crypto_blake2s_final_generic(struct shash_desc *desc, u8 *out)
22{22{
23 return crypto_blake2s_final(desc, out, blake2s_compress_generic);23 return crypto_blake2s_final(desc, out, true);
24}24}
25 25
26#define BLAKE2S_ALG(name, driver_name, digest_size) \26#define BLAKE2S_ALG(name, driver_name, digest_size) \
drivers/accessibility/speakup/speakup_dectlk.c+1−0
@@ -44,6 +44,7 @@ static struct var_t vars[] = { · 43 unmodified lines
44 { CAPS_START, .u.s = {"[:dv ap 160] " } },44 { CAPS_START, .u.s = {"[:dv ap 160] " } },
45 { CAPS_STOP, .u.s = {"[:dv ap 100 ] " } },45 { CAPS_STOP, .u.s = {"[:dv ap 100 ] " } },
46 { RATE, .u.n = {"[:ra %d] ", 180, 75, 650, 0, 0, NULL } },46 { RATE, .u.n = {"[:ra %d] ", 180, 75, 650, 0, 0, NULL } },
47 { PITCH, .u.n = {"[:dv ap %d] ", 122, 50, 350, 0, 0, NULL } },
47 { INFLECTION, .u.n = {"[:dv pr %d] ", 100, 0, 10000, 0, 0, NULL } },48 { INFLECTION, .u.n = {"[:dv pr %d] ", 100, 0, 10000, 0, 0, NULL } },
48 { VOL, .u.n = {"[:dv g5 %d] ", 86, 60, 86, 0, 0, NULL } },49 { VOL, .u.n = {"[:dv g5 %d] ", 86, 60, 86, 0, 0, NULL } },
49 { PUNCT, .u.n = {"[:pu %c] ", 0, 0, 2, 0, 0, "nsa" } },50 { PUNCT, .u.n = {"[:pu %c] ", 0, 0, 2, 0, 0, "nsa" } },
drivers/acpi/Kconfig+1−0
@@ -11,6 +11,7 @@ menuconfig ACPI · 10 unmodified lines
11 depends on ARCH_SUPPORTS_ACPI11 depends on ARCH_SUPPORTS_ACPI
12 select PNP12 select PNP
13 select NLS13 select NLS
14 select CRC32
14 default y if X8615 default y if X86
15 help16 help
16 Advanced Configuration and Power Interface (ACPI) support for 17 Advanced Configuration and Power Interface (ACPI) support for
drivers/acpi/arm64/iort.c+11−3
@@ -1361,9 +1361,17 @@ static void __init arm_smmu_v3_pmcg_init_resources(struct resource *res, · 1360 unmodified lines
1361 res[0].start = pmcg->page0_base_address;1361 res[0].start = pmcg->page0_base_address;
1362 res[0].end = pmcg->page0_base_address + SZ_4K - 1;1362 res[0].end = pmcg->page0_base_address + SZ_4K - 1;
1363 res[0].flags = IORESOURCE_MEM;1363 res[0].flags = IORESOURCE_MEM;
1364 res[1].start = pmcg->page1_base_address;1364 /*
1365 res[1].end = pmcg->page1_base_address + SZ_4K - 1;1365 * The initial version in DEN0049C lacked a way to describe register
1366 res[1].flags = IORESOURCE_MEM;1366 * page 1, which makes it broken for most PMCG implementations; in
1367 * that case, just let the driver fail gracefully if it expects to
1368 * find a second memory resource.
1369 */
1370 if (node->revision > 0) {
1371 res[1].start = pmcg->page1_base_address;
1372 res[1].end = pmcg->page1_base_address + SZ_4K - 1;
1373 res[1].flags = IORESOURCE_MEM;
1374 }
1367 1375
1368 if (pmcg->overflow_gsiv)1376 if (pmcg->overflow_gsiv)
1369 acpi_iort_register_irq(pmcg->overflow_gsiv, "overflow",1377 acpi_iort_register_irq(pmcg->overflow_gsiv, "overflow",
drivers/acpi/ec.c+10−0
@@ -2065,6 +2065,16 @@ bool acpi_ec_dispatch_gpe(void) · 2064 unmodified lines
2065 if (acpi_any_gpe_status_set(first_ec->gpe))2065 if (acpi_any_gpe_status_set(first_ec->gpe))
2066 return true;2066 return true;
2067 2067
2068 /*
2069 * Cancel the SCI wakeup and process all pending events in case there
2070 * are any wakeup ones in there.
2071 *
2072 * Note that if any non-EC GPEs are active at this point, the SCI will
2073 * retrigger after the rearming in acpi_s2idle_wake(), so no events
2074 * should be missed by canceling the wakeup here.
2075 */
2076 pm_system_cancel_wakeup();
2077
2068 /*2078 /*
2069 * Dispatch the EC GPE in-band, but do not report wakeup in any case2079 * Dispatch the EC GPE in-band, but do not report wakeup in any case
2070 * to allow the caller to process events properly after that.2080 * to allow the caller to process events properly after that.
drivers/acpi/processor_idle.c+5−0
@@ -96,6 +96,11 @@ static const struct dmi_system_id processor_power_dmi_table[] = { · 95 unmodified lines
96 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),96 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
97 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},97 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
98 (void *)1},98 (void *)1},
99 /* T40 can not handle C3 idle state */
100 { set_max_cstate, "IBM ThinkPad T40", {
101 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
102 DMI_MATCH(DMI_PRODUCT_NAME, "23737CU")},
103 (void *)2},
99 {},104 {},
100};105};
101 106
drivers/acpi/sleep.c+5−10
@@ -736,21 +736,15 @@ bool acpi_s2idle_wake(void) · 735 unmodified lines
736 return true;736 return true;
737 }737 }
738 738
739 /* Check non-EC GPE wakeups and dispatch the EC GPE. */739 /*
740 * Check non-EC GPE wakeups and if there are none, cancel the
741 * SCI-related wakeup and dispatch the EC GPE.
742 */
740 if (acpi_ec_dispatch_gpe()) {743 if (acpi_ec_dispatch_gpe()) {
741 pm_pr_dbg("ACPI non-EC GPE wakeup\n");744 pm_pr_dbg("ACPI non-EC GPE wakeup\n");
742 return true;745 return true;
743 }746 }
744 747
745 /*
746 * Cancel the SCI wakeup and process all pending events in case
747 * there are any wakeup ones in there.
748 *
749 * Note that if any non-EC GPEs are active at this point, the
750 * SCI will retrigger after the rearming below, so no events
751 * should be missed by canceling the wakeup here.
752 */
753 pm_system_cancel_wakeup();
754 acpi_os_wait_events_complete();748 acpi_os_wait_events_complete();
755 749
756 /*750 /*
@@ -764,6 +758,7 @@ bool acpi_s2idle_wake(void) · 7 unmodified lines
764 return true;758 return true;
765 }759 }
766 760
761 pm_wakeup_clear(acpi_sci_irq);
767 rearm_wake_irq(acpi_sci_irq);762 rearm_wake_irq(acpi_sci_irq);
768 }763 }
769 764
drivers/acpi/tables.c+1−1
@@ -400,7 +400,7 @@ int __init_or_acpilib acpi_table_parse_entries_array( · 399 unmodified lines
400 400
401 acpi_get_table(id, instance, &table_header);401 acpi_get_table(id, instance, &table_header);
402 if (!table_header) {402 if (!table_header) {
403 pr_warn("%4.4s not present\n", id);403 pr_debug("%4.4s not present\n", id);
404 return -ENODEV;404 return -ENODEV;
405 }405 }
406 406
drivers/acpi/x86/s2idle.c+4−8
@@ -424,15 +424,11 @@ static int lps0_device_attach(struct acpi_device *adev, · 423 unmodified lines
424 mem_sleep_current = PM_SUSPEND_TO_IDLE;424 mem_sleep_current = PM_SUSPEND_TO_IDLE;
425 425
426 /*426 /*
427 * Some Intel based LPS0 systems, like ASUS Zenbook UX430UNR/i7-8550U don't427 * Some LPS0 systems, like ASUS Zenbook UX430UNR/i7-8550U, require the
428 * use intel-hid or intel-vbtn but require the EC GPE to be enabled while428 * EC GPE to be enabled while suspended for certain wakeup devices to
429 * suspended for certain wakeup devices to work, so mark it as wakeup-capable.429 * work, so mark it as wakeup-capable.
430 *
431 * Only enable on !AMD as enabling this universally causes problems for a number
432 * of AMD based systems.
433 */430 */
434 if (!acpi_s2idle_vendor_amd())431 acpi_ec_mark_gpe_for_wake();
435 acpi_ec_mark_gpe_for_wake();
436 432
437 return 0;433 return 0;
438}434}
drivers/ata/libata-core.c+17−8
@@ -2007,6 +2007,9 @@ static bool ata_log_supported(struct ata_device *dev, u8 log) · 2006 unmodified lines
2007{2007{
2008 struct ata_port *ap = dev->link->ap;2008 struct ata_port *ap = dev->link->ap;
2009 2009
2010 if (dev->horkage & ATA_HORKAGE_NO_LOG_DIR)
2011 return false;
2012
2010 if (ata_read_log_page(dev, ATA_LOG_DIRECTORY, 0, ap->sector_buf, 1))2013 if (ata_read_log_page(dev, ATA_LOG_DIRECTORY, 0, ap->sector_buf, 1))
2011 return false;2014 return false;
2012 return get_unaligned_le16(&ap->sector_buf[log * 2]) ? true : false;2015 return get_unaligned_le16(&ap->sector_buf[log * 2]) ? true : false;
@@ -2445,23 +2448,21 @@ static void ata_dev_config_cpr(struct ata_device *dev) · 432 unmodified lines
2445 struct ata_cpr_log *cpr_log = NULL;2448 struct ata_cpr_log *cpr_log = NULL;
2446 u8 *desc, *buf = NULL;2449 u8 *desc, *buf = NULL;
2447 2450
2448 if (!ata_identify_page_supported(dev,2451 if (ata_id_major_version(dev->id) < 11 ||
2449 ATA_LOG_CONCURRENT_POSITIONING_RANGES))2452 !ata_log_supported(dev, ATA_LOG_CONCURRENT_POSITIONING_RANGES))
2450 goto out;2453 goto out;
2451 2454
2452 /*2455 /*
2453 * Read IDENTIFY DEVICE data log, page 0x472456 * Read the concurrent positioning ranges log (0x47). We can have at
2454 * (concurrent positioning ranges). We can have at most 255 32B range2457 * most 255 32B range descriptors plus a 64B header.
2455 * descriptors plus a 64B header.
2456 */2458 */
2457 buf_len = (64 + 255 * 32 + 511) & ~511;2459 buf_len = (64 + 255 * 32 + 511) & ~511;
2458 buf = kzalloc(buf_len, GFP_KERNEL);2460 buf = kzalloc(buf_len, GFP_KERNEL);
2459 if (!buf)2461 if (!buf)
2460 goto out;2462 goto out;
2461 2463
2462 err_mask = ata_read_log_page(dev, ATA_LOG_IDENTIFY_DEVICE,2464 err_mask = ata_read_log_page(dev, ATA_LOG_CONCURRENT_POSITIONING_RANGES,
2463 ATA_LOG_CONCURRENT_POSITIONING_RANGES,2465 0, buf, buf_len >> 9);
2464 buf, buf_len >> 9);
2465 if (err_mask)2466 if (err_mask)
2466 goto out;2467 goto out;
2467 2468
@@ -4028,6 +4029,7 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = { · 1560 unmodified lines
4028 4029
4029 /* devices that don't properly handle TRIM commands */4030 /* devices that don't properly handle TRIM commands */
4030 { "SuperSSpeed S238*", NULL, ATA_HORKAGE_NOTRIM, },4031 { "SuperSSpeed S238*", NULL, ATA_HORKAGE_NOTRIM, },
4032 { "M88V29*", NULL, ATA_HORKAGE_NOTRIM, },
4031 4033
4032 /*4034 /*
4033 * As defined, the DRAT (Deterministic Read After Trim) and RZAT4035 * As defined, the DRAT (Deterministic Read After Trim) and RZAT
@@ -4073,6 +4075,13 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = { · 39 unmodified lines
4073 { "WDC WD3000JD-*", NULL, ATA_HORKAGE_WD_BROKEN_LPM },4075 { "WDC WD3000JD-*", NULL, ATA_HORKAGE_WD_BROKEN_LPM },
4074 { "WDC WD3200JD-*", NULL, ATA_HORKAGE_WD_BROKEN_LPM },4076 { "WDC WD3200JD-*", NULL, ATA_HORKAGE_WD_BROKEN_LPM },
4075 4077
4078 /*
4079 * This sata dom device goes on a walkabout when the ATA_LOG_DIRECTORY
4080 * log page is accessed. Ensure we never ask for this log page with
4081 * these devices.
4082 */
4083 { "SATADOM-ML 3ME", NULL, ATA_HORKAGE_NO_LOG_DIR },
4084
4076 /* End Marker */4085 /* End Marker */
4077 { }4086 { }
4078};4087};
drivers/ata/pata_platform.c+2−0
@@ -128,6 +128,8 @@ int __pata_platform_probe(struct device *dev, struct resource *io_res, · 127 unmodified lines
128 ap = host->ports[0];128 ap = host->ports[0];
129 129
130 ap->ops = devm_kzalloc(dev, sizeof(*ap->ops), GFP_KERNEL);130 ap->ops = devm_kzalloc(dev, sizeof(*ap->ops), GFP_KERNEL);
131 if (!ap->ops)
132 return -ENOMEM;
131 ap->ops->inherits = &ata_sff_port_ops;133 ap->ops->inherits = &ata_sff_port_ops;
132 ap->ops->cable_detect = ata_cable_unknown;134 ap->ops->cable_detect = ata_cable_unknown;
133 ap->ops->set_mode = pata_platform_set_mode;135 ap->ops->set_mode = pata_platform_set_mode;
drivers/ata/sata_fsl.c+7−9
@@ -322,7 +322,7 @@ static void fsl_sata_set_irq_coalescing(struct ata_host *host, · 321 unmodified lines
322static ssize_t fsl_sata_intr_coalescing_show(struct device *dev,322static ssize_t fsl_sata_intr_coalescing_show(struct device *dev,
323 struct device_attribute *attr, char *buf)323 struct device_attribute *attr, char *buf)
324{324{
325 return sysfs_emit(buf, "%d %d\n",325 return sysfs_emit(buf, "%u %u\n",
326 intr_coalescing_count, intr_coalescing_ticks);326 intr_coalescing_count, intr_coalescing_ticks);
327}327}
328 328
@@ -332,10 +332,8 @@ static ssize_t fsl_sata_intr_coalescing_store(struct device *dev, · 3 unmodified lines
332{332{
333 unsigned int coalescing_count, coalescing_ticks;333 unsigned int coalescing_count, coalescing_ticks;
334 334
335 if (sscanf(buf, "%d%d",335 if (sscanf(buf, "%u%u", &coalescing_count, &coalescing_ticks) != 2) {
336 &coalescing_count,336 dev_err(dev, "fsl-sata: wrong parameter format.\n");
337 &coalescing_ticks) != 2) {
338 printk(KERN_ERR "fsl-sata: wrong parameter format.\n");
339 return -EINVAL;337 return -EINVAL;
340 }338 }
341 339
@@ -359,7 +357,7 @@ static ssize_t fsl_sata_rx_watermark_show(struct device *dev, · 17 unmodified lines
359 rx_watermark &= 0x1f;357 rx_watermark &= 0x1f;
360 spin_unlock_irqrestore(&host->lock, flags);358 spin_unlock_irqrestore(&host->lock, flags);
361 359
362 return sysfs_emit(buf, "%d\n", rx_watermark);360 return sysfs_emit(buf, "%u\n", rx_watermark);
363}361}
364 362
365static ssize_t fsl_sata_rx_watermark_store(struct device *dev,363static ssize_t fsl_sata_rx_watermark_store(struct device *dev,
@@ -373,8 +371,8 @@ static ssize_t fsl_sata_rx_watermark_store(struct device *dev, · 7 unmodified lines
373 void __iomem *csr_base = host_priv->csr_base;371 void __iomem *csr_base = host_priv->csr_base;
374 u32 temp;372 u32 temp;
375 373
376 if (sscanf(buf, "%d", &rx_watermark) != 1) {374 if (kstrtouint(buf, 10, &rx_watermark) < 0) {
377 printk(KERN_ERR "fsl-sata: wrong parameter format.\n");375 dev_err(dev, "fsl-sata: wrong parameter format.\n");
378 return -EINVAL;376 return -EINVAL;
379 }377 }
380 378
@@ -382,8 +380,8 @@ static ssize_t fsl_sata_rx_watermark_store(struct device *dev, · 1 unmodified line
382 temp = ioread32(csr_base + TRANSCFG);380 temp = ioread32(csr_base + TRANSCFG);
383 temp &= 0xffffffe0;381 temp &= 0xffffffe0;
384 iowrite32(temp | rx_watermark, csr_base + TRANSCFG);382 iowrite32(temp | rx_watermark, csr_base + TRANSCFG);
385
386 spin_unlock_irqrestore(&host->lock, flags);383 spin_unlock_irqrestore(&host->lock, flags);
384
387 return strlen(buf);385 return strlen(buf);
388}386}
389 387
drivers/base/power/wakeup.c+34−7
@@ -34,7 +34,8 @@ suspend_state_t pm_suspend_target_state; · 33 unmodified lines
34bool events_check_enabled __read_mostly;34bool events_check_enabled __read_mostly;
35 35
36/* First wakeup IRQ seen by the kernel in the last cycle. */36/* First wakeup IRQ seen by the kernel in the last cycle. */
37unsigned int pm_wakeup_irq __read_mostly;37static unsigned int wakeup_irq[2] __read_mostly;
38static DEFINE_RAW_SPINLOCK(wakeup_irq_lock);
38 39
39/* If greater than 0 and the system is suspending, terminate the suspend. */40/* If greater than 0 and the system is suspending, terminate the suspend. */
40static atomic_t pm_abort_suspend __read_mostly;41static atomic_t pm_abort_suspend __read_mostly;
@@ -942,19 +943,45 @@ void pm_system_cancel_wakeup(void) · 901 unmodified lines
942 atomic_dec_if_positive(&pm_abort_suspend);943 atomic_dec_if_positive(&pm_abort_suspend);
943}944}
944 945
945void pm_wakeup_clear(bool reset)946void pm_wakeup_clear(unsigned int irq_number)
946{947{
947 pm_wakeup_irq = 0;948 raw_spin_lock_irq(&wakeup_irq_lock);
948 if (reset)949
950 if (irq_number && wakeup_irq[0] == irq_number)
951 wakeup_irq[0] = wakeup_irq[1];
952 else
953 wakeup_irq[0] = 0;
954
955 wakeup_irq[1] = 0;
956
957 raw_spin_unlock_irq(&wakeup_irq_lock);
958
959 if (!irq_number)
949 atomic_set(&pm_abort_suspend, 0);960 atomic_set(&pm_abort_suspend, 0);
950}961}
951 962
952void pm_system_irq_wakeup(unsigned int irq_number)963void pm_system_irq_wakeup(unsigned int irq_number)
953{964{
954 if (pm_wakeup_irq == 0) {965 unsigned long flags;
955 pm_wakeup_irq = irq_number;966
967 raw_spin_lock_irqsave(&wakeup_irq_lock, flags);
968
969 if (wakeup_irq[0] == 0)
970 wakeup_irq[0] = irq_number;
971 else if (wakeup_irq[1] == 0)
972 wakeup_irq[1] = irq_number;
973 else
974 irq_number = 0;
975
976 raw_spin_unlock_irqrestore(&wakeup_irq_lock, flags);
977
978 if (irq_number)
956 pm_system_wakeup();979 pm_system_wakeup();
957 }980}
981
982unsigned int pm_wakeup_irq(void)
983{
984 return wakeup_irq[0];
958}985}
959 986
960/**987/**
drivers/block/loop.c+36−37
@@ -79,6 +79,7 @@ · 78 unmodified lines
79#include <linux/ioprio.h>79#include <linux/ioprio.h>
80#include <linux/blk-cgroup.h>80#include <linux/blk-cgroup.h>
81#include <linux/sched/mm.h>81#include <linux/sched/mm.h>
82#include <linux/statfs.h>
82 83
83#include "loop.h"84#include "loop.h"
84 85
@@ -774,8 +775,13 @@ static void loop_config_discard(struct loop_device *lo) · 689 unmodified lines
774 granularity = 0;775 granularity = 0;
775 776
776 } else {777 } else {
778 struct kstatfs sbuf;
779
777 max_discard_sectors = UINT_MAX >> 9;780 max_discard_sectors = UINT_MAX >> 9;
778 granularity = inode->i_sb->s_blocksize;781 if (!vfs_statfs(&file->f_path, &sbuf))
782 granularity = sbuf.f_bsize;
783 else
784 max_discard_sectors = 0;
779 }785 }
780 786
781 if (max_discard_sectors) {787 if (max_discard_sectors) {
@@ -1082,7 +1088,7 @@ out_putf: · 300 unmodified lines
1082 return error;1088 return error;
1083}1089}
1084 1090
1085static void __loop_clr_fd(struct loop_device *lo)1091static void __loop_clr_fd(struct loop_device *lo, bool release)
1086{1092{
1087 struct file *filp;1093 struct file *filp;
1088 gfp_t gfp = lo->old_gfp_mask;1094 gfp_t gfp = lo->old_gfp_mask;
@@ -1144,6 +1150,8 @@ static void __loop_clr_fd(struct loop_device *lo) · 55 unmodified lines
1144 /* let user-space know about this change */1150 /* let user-space know about this change */
1145 kobject_uevent(&disk_to_dev(lo->lo_disk)->kobj, KOBJ_CHANGE);1151 kobject_uevent(&disk_to_dev(lo->lo_disk)->kobj, KOBJ_CHANGE);
1146 mapping_set_gfp_mask(filp->f_mapping, gfp);1152 mapping_set_gfp_mask(filp->f_mapping, gfp);
1153 /* This is safe: open() is still holding a reference. */
1154 module_put(THIS_MODULE);
1147 blk_mq_unfreeze_queue(lo->lo_queue);1155 blk_mq_unfreeze_queue(lo->lo_queue);
1148 1156
1149 disk_force_media_change(lo->lo_disk, DISK_EVENT_MEDIA_CHANGE);1157 disk_force_media_change(lo->lo_disk, DISK_EVENT_MEDIA_CHANGE);
@@ -1151,52 +1159,44 @@ static void __loop_clr_fd(struct loop_device *lo) · 1 unmodified line
1151 if (lo->lo_flags & LO_FLAGS_PARTSCAN) {1159 if (lo->lo_flags & LO_FLAGS_PARTSCAN) {
1152 int err;1160 int err;
1153 1161
1154 mutex_lock(&lo->lo_disk->open_mutex);1162 /*
1163 * open_mutex has been held already in release path, so don't
1164 * acquire it if this function is called in such case.
1165 *
1166 * If the reread partition isn't from release path, lo_refcnt
1167 * must be at least one and it can only become zero when the
1168 * current holder is released.
1169 */
1170 if (!release)
1171 mutex_lock(&lo->lo_disk->open_mutex);
1155 err = bdev_disk_changed(lo->lo_disk, false);1172 err = bdev_disk_changed(lo->lo_disk, false);
1156 mutex_unlock(&lo->lo_disk->open_mutex);1173 if (!release)
1174 mutex_unlock(&lo->lo_disk->open_mutex);
1157 if (err)1175 if (err)
1158 pr_warn("%s: partition scan of loop%d failed (rc=%d)\n",1176 pr_warn("%s: partition scan of loop%d failed (rc=%d)\n",
1159 __func__, lo->lo_number, err);1177 __func__, lo->lo_number, err);
1160 /* Device is gone, no point in returning error */1178 /* Device is gone, no point in returning error */
1161 }1179 }
1162 1180
1181 /*
1182 * lo->lo_state is set to Lo_unbound here after above partscan has
1183 * finished. There cannot be anybody else entering __loop_clr_fd() as
1184 * Lo_rundown state protects us from all the other places trying to
1185 * change the 'lo' device.
1186 */
1163 lo->lo_flags = 0;1187 lo->lo_flags = 0;
1164 if (!part_shift)1188 if (!part_shift)
1165 lo->lo_disk->flags |= GENHD_FL_NO_PART;1189 lo->lo_disk->flags |= GENHD_FL_NO_PART;
1166
1167 fput(filp);
1168}
1169
1170static void loop_rundown_completed(struct loop_device *lo)
1171{
1172 mutex_lock(&lo->lo_mutex);1190 mutex_lock(&lo->lo_mutex);
1173 lo->lo_state = Lo_unbound;1191 lo->lo_state = Lo_unbound;
1174 mutex_unlock(&lo->lo_mutex);1192 mutex_unlock(&lo->lo_mutex);
1175 module_put(THIS_MODULE);
1176}
1177
1178static void loop_rundown_workfn(struct work_struct *work)
1179{
1180 struct loop_device *lo = container_of(work, struct loop_device,
1181 rundown_work);
1182 struct block_device *bdev = lo->lo_device;
1183 struct gendisk *disk = lo->lo_disk;
1184
1185 __loop_clr_fd(lo);
1186 kobject_put(&bdev->bd_device.kobj);
1187 module_put(disk->fops->owner);
1188 loop_rundown_completed(lo);
1189}
1190
1191static void loop_schedule_rundown(struct loop_device *lo)
1192{
1193 struct block_device *bdev = lo->lo_device;
1194 struct gendisk *disk = lo->lo_disk;
1195 1193
1196 __module_get(disk->fops->owner);1194 /*
1197 kobject_get(&bdev->bd_device.kobj);1195 * Need not hold lo_mutex to fput backing file. Calling fput holding
1198 INIT_WORK(&lo->rundown_work, loop_rundown_workfn);1196 * lo_mutex triggers a circular lock dependency possibility warning as
1199 queue_work(system_long_wq, &lo->rundown_work);1197 * fput can take open_mutex which is usually taken before lo_mutex.
1198 */
1199 fput(filp);
1200}1200}
1201 1201
1202static int loop_clr_fd(struct loop_device *lo)1202static int loop_clr_fd(struct loop_device *lo)
@@ -1228,8 +1228,7 @@ static int loop_clr_fd(struct loop_device *lo) · 25 unmodified lines
1228 lo->lo_state = Lo_rundown;1228 lo->lo_state = Lo_rundown;
1229 mutex_unlock(&lo->lo_mutex);1229 mutex_unlock(&lo->lo_mutex);
1230 1230
1231 __loop_clr_fd(lo);1231 __loop_clr_fd(lo, false);
1232 loop_rundown_completed(lo);
1233 return 0;1232 return 0;
1234}1233}
1235 1234
@@ -1754,7 +1753,7 @@ static void lo_release(struct gendisk *disk, fmode_t mode) · 518 unmodified lines
1754 * In autoclear mode, stop the loop thread1753 * In autoclear mode, stop the loop thread
1755 * and remove configuration after last close.1754 * and remove configuration after last close.
1756 */1755 */
1757 loop_schedule_rundown(lo);1756 __loop_clr_fd(lo, true);
1758 return;1757 return;
1759 } else if (lo->lo_state == Lo_bound) {1758 } else if (lo->lo_state == Lo_bound) {
1760 /*1759 /*
drivers/block/loop.h+0−1
@@ -56,7 +56,6 @@ struct loop_device { · 55 unmodified lines
56 struct gendisk *lo_disk;56 struct gendisk *lo_disk;
57 struct mutex lo_mutex;57 struct mutex lo_mutex;
58 bool idr_visible;58 bool idr_visible;
59 struct work_struct rundown_work;
60};59};
61 60
62struct loop_cmd {61struct loop_cmd {
drivers/block/mtip32xx/mtip32xx.c+1−1
@@ -4112,7 +4112,7 @@ static void mtip_pci_remove(struct pci_dev *pdev) · 4111 unmodified lines
4112 "Completion workers still active!\n");4112 "Completion workers still active!\n");
4113 }4113 }
4114 4114
4115 blk_set_queue_dying(dd->queue);4115 blk_mark_disk_dead(dd->disk);
4116 set_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag);4116 set_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag);
4117 4117
4118 /* Clean up the block layer. */4118 /* Clean up the block layer. */
drivers/block/rbd.c+1−1
@@ -7185,7 +7185,7 @@ static ssize_t do_rbd_remove(struct bus_type *bus, · 7184 unmodified lines
7185 * IO to complete/fail.7185 * IO to complete/fail.
7186 */7186 */
7187 blk_mq_freeze_queue(rbd_dev->disk->queue);7187 blk_mq_freeze_queue(rbd_dev->disk->queue);
7188 blk_set_queue_dying(rbd_dev->disk->queue);7188 blk_mark_disk_dead(rbd_dev->disk);
7189 }7189 }
7190 7190
7191 del_gendisk(rbd_dev->disk);7191 del_gendisk(rbd_dev->disk);
drivers/block/xen-blkfront.c+1−1
@@ -2126,7 +2126,7 @@ static void blkfront_closing(struct blkfront_info *info) · 2125 unmodified lines
2126 2126
2127 /* No more blkif_request(). */2127 /* No more blkif_request(). */
2128 blk_mq_stop_hw_queues(info->rq);2128 blk_mq_stop_hw_queues(info->rq);
2129 blk_set_queue_dying(info->rq);2129 blk_mark_disk_dead(info->gd);
2130 set_capacity(info->gd, 0);2130 set_capacity(info->gd, 0);
2131 2131
2132 for_each_rinfo(info, rinfo, i) {2132 for_each_rinfo(info, rinfo, i) {
drivers/bus/mhi/pci_generic.c+2−0
@@ -366,6 +366,7 @@ static const struct mhi_pci_dev_info mhi_foxconn_sdx55_info = { · 365 unmodified lines
366 .config = &modem_foxconn_sdx55_config,366 .config = &modem_foxconn_sdx55_config,
367 .bar_num = MHI_PCI_DEFAULT_BAR_NUM,367 .bar_num = MHI_PCI_DEFAULT_BAR_NUM,
368 .dma_data_width = 32,368 .dma_data_width = 32,
369 .mru_default = 32768,
369 .sideband_wake = false,370 .sideband_wake = false,
370};371};
371 372
@@ -401,6 +402,7 @@ static const struct mhi_pci_dev_info mhi_mv31_info = { · 29 unmodified lines
401 .config = &modem_mv31_config,402 .config = &modem_mv31_config,
402 .bar_num = MHI_PCI_DEFAULT_BAR_NUM,403 .bar_num = MHI_PCI_DEFAULT_BAR_NUM,
403 .dma_data_width = 32,404 .dma_data_width = 32,
405 .mru_default = 32768,
404};406};
405 407
406static const struct mhi_channel_config mhi_sierra_em919x_channels[] = {408static const struct mhi_channel_config mhi_sierra_em919x_channels[] = {
drivers/char/random.c+22−17
@@ -762,7 +762,7 @@ static bool crng_init_try_arch(struct crng_state *crng) · 761 unmodified lines
762 return arch_init;762 return arch_init;
763}763}
764 764
765static bool __init crng_init_try_arch_early(struct crng_state *crng)765static bool __init crng_init_try_arch_early(void)
766{766{
767 int i;767 int i;
768 bool arch_init = true;768 bool arch_init = true;
@@ -774,7 +774,7 @@ static bool __init crng_init_try_arch_early(struct crng_state *crng) · 5 unmodified lines
774 rv = random_get_entropy();774 rv = random_get_entropy();
775 arch_init = false;775 arch_init = false;
776 }776 }
777 crng->state[i] ^= rv;777 primary_crng.state[i] ^= rv;
778 }778 }
779 779
780 return arch_init;780 return arch_init;
@@ -788,22 +788,20 @@ static void crng_initialize_secondary(struct crng_state *crng) · 7 unmodified lines
788 crng->init_time = jiffies - CRNG_RESEED_INTERVAL - 1;788 crng->init_time = jiffies - CRNG_RESEED_INTERVAL - 1;
789}789}
790 790
791static void __init crng_initialize_primary(struct crng_state *crng)791static void __init crng_initialize_primary(void)
792{792{
793 _extract_entropy(&crng->state[4], sizeof(u32) * 12);793 _extract_entropy(&primary_crng.state[4], sizeof(u32) * 12);
794 if (crng_init_try_arch_early(crng) && trust_cpu && crng_init < 2) {794 if (crng_init_try_arch_early() && trust_cpu && crng_init < 2) {
795 invalidate_batched_entropy();795 invalidate_batched_entropy();
796 numa_crng_init();796 numa_crng_init();
797 crng_init = 2;797 crng_init = 2;
798 pr_notice("crng init done (trusting CPU's manufacturer)\n");798 pr_notice("crng init done (trusting CPU's manufacturer)\n");
799 }799 }
800 crng->init_time = jiffies - CRNG_RESEED_INTERVAL - 1;800 primary_crng.init_time = jiffies - CRNG_RESEED_INTERVAL - 1;
801}801}
802 802
803static void crng_finalize_init(struct crng_state *crng)803static void crng_finalize_init(void)
804{804{
805 if (crng != &primary_crng || crng_init >= 2)
806 return;
807 if (!system_wq) {805 if (!system_wq) {
808 /* We can't call numa_crng_init until we have workqueues,806 /* We can't call numa_crng_init until we have workqueues,
809 * so mark this for processing later. */807 * so mark this for processing later. */
@@ -814,6 +812,7 @@ static void crng_finalize_init(struct crng_state *crng) · 4 unmodified lines
814 invalidate_batched_entropy();812 invalidate_batched_entropy();
815 numa_crng_init();813 numa_crng_init();
816 crng_init = 2;814 crng_init = 2;
815 crng_need_final_init = false;
817 process_random_ready_list();816 process_random_ready_list();
818 wake_up_interruptible(&crng_init_wait);817 wake_up_interruptible(&crng_init_wait);
819 kill_fasync(&fasync, SIGIO, POLL_IN);818 kill_fasync(&fasync, SIGIO, POLL_IN);
@@ -980,7 +979,8 @@ static void crng_reseed(struct crng_state *crng, bool use_input_pool) · 160 unmodified lines
980 memzero_explicit(&buf, sizeof(buf));979 memzero_explicit(&buf, sizeof(buf));
981 WRITE_ONCE(crng->init_time, jiffies);980 WRITE_ONCE(crng->init_time, jiffies);
982 spin_unlock_irqrestore(&crng->lock, flags);981 spin_unlock_irqrestore(&crng->lock, flags);
983 crng_finalize_init(crng);982 if (crng == &primary_crng && crng_init < 2)
983 crng_finalize_init();
984}984}
985 985
986static void _extract_crng(struct crng_state *crng, u8 out[CHACHA_BLOCK_SIZE])986static void _extract_crng(struct crng_state *crng, u8 out[CHACHA_BLOCK_SIZE])
@@ -1697,8 +1697,8 @@ int __init rand_initialize(void) · 710 unmodified lines
1697{1697{
1698 init_std_data();1698 init_std_data();
1699 if (crng_need_final_init)1699 if (crng_need_final_init)
1700 crng_finalize_init(&primary_crng);1700 crng_finalize_init();
1701 crng_initialize_primary(&primary_crng);1701 crng_initialize_primary();
1702 crng_global_init_time = jiffies;1702 crng_global_init_time = jiffies;
1703 if (ratelimit_disable) {1703 if (ratelimit_disable) {
1704 urandom_warning.interval = 0;1704 urandom_warning.interval = 0;
@@ -1856,7 +1856,10 @@ static long random_ioctl(struct file *f, unsigned int cmd, unsigned long arg) · 151 unmodified lines
1856 */1856 */
1857 if (!capable(CAP_SYS_ADMIN))1857 if (!capable(CAP_SYS_ADMIN))
1858 return -EPERM;1858 return -EPERM;
1859 input_pool.entropy_count = 0;1859 if (xchg(&input_pool.entropy_count, 0) && random_write_wakeup_bits) {
1860 wake_up_interruptible(&random_write_wait);
1861 kill_fasync(&fasync, SIGIO, POLL_OUT);
1862 }
1860 return 0;1863 return 0;
1861 case RNDRESEEDCRNG:1864 case RNDRESEEDCRNG:
1862 if (!capable(CAP_SYS_ADMIN))1865 if (!capable(CAP_SYS_ADMIN))
@@ -2205,13 +2208,15 @@ void add_hwgenerator_randomness(const char *buffer, size_t count, · 342 unmodified lines
2205 return;2208 return;
2206 }2209 }
2207 2210
2208 /* Suspend writing if we're above the trickle threshold.2211 /* Throttle writing if we're above the trickle threshold.
2209 * We'll be woken up again once below random_write_wakeup_thresh,2212 * We'll be woken up again once below random_write_wakeup_thresh,
2210 * or when the calling thread is about to terminate.2213 * when the calling thread is about to terminate, or once
2214 * CRNG_RESEED_INTERVAL has lapsed.
2211 */2215 */
2212 wait_event_interruptible(random_write_wait,2216 wait_event_interruptible_timeout(random_write_wait,
2213 !system_wq || kthread_should_stop() ||2217 !system_wq || kthread_should_stop() ||
2214 POOL_ENTROPY_BITS() <= random_write_wakeup_bits);2218 POOL_ENTROPY_BITS() <= random_write_wakeup_bits,
2219 CRNG_RESEED_INTERVAL);
2215 mix_pool_bytes(buffer, count);2220 mix_pool_bytes(buffer, count);
2216 credit_entropy_bits(entropy);2221 credit_entropy_bits(entropy);
2217}2222}
drivers/clocksource/timer-ti-dm-systimer.c+1−1
@@ -241,7 +241,7 @@ static void __init dmtimer_systimer_assign_alwon(void) · 240 unmodified lines
241 bool quirk_unreliable_oscillator = false;241 bool quirk_unreliable_oscillator = false;
242 242
243 /* Quirk unreliable 32 KiHz oscillator with incomplete dts */243 /* Quirk unreliable 32 KiHz oscillator with incomplete dts */
244 if (of_machine_is_compatible("ti,omap3-beagle") ||244 if (of_machine_is_compatible("ti,omap3-beagle-ab4") ||
245 of_machine_is_compatible("timll,omap3-devkit8000")) {245 of_machine_is_compatible("timll,omap3-devkit8000")) {
246 quirk_unreliable_oscillator = true;246 quirk_unreliable_oscillator = true;
247 counter_32k = -ENODEV;247 counter_32k = -ENODEV;
drivers/connector/cn_proc.c+1−1
@@ -358,7 +358,7 @@ static void cn_proc_mcast_ctl(struct cn_msg *msg, · 357 unmodified lines
358 * other namespaces.358 * other namespaces.
359 */359 */
360 if ((current_user_ns() != &init_user_ns) ||360 if ((current_user_ns() != &init_user_ns) ||
361 (task_active_pid_ns(current) != &init_pid_ns))361 !task_is_in_init_pid_ns(current))
362 return;362 return;
363 363
364 /* Can only change if privileged. */364 /* Can only change if privileged. */
drivers/counter/counter-core.c+6−9
@@ -90,10 +90,8 @@ struct counter_device *counter_alloc(size_t sizeof_priv) · 89 unmodified lines
90 int err;90 int err;
91 91
92 ch = kzalloc(sizeof(*ch) + sizeof_priv, GFP_KERNEL);92 ch = kzalloc(sizeof(*ch) + sizeof_priv, GFP_KERNEL);
93 if (!ch) {93 if (!ch)
94 err = -ENOMEM;94 return NULL;
95 goto err_alloc_ch;
96 }
97 95
98 counter = &ch->counter;96 counter = &ch->counter;
99 dev = &counter->dev;97 dev = &counter->dev;
@@ -123,9 +121,8 @@ err_chrdev_add: · 23 unmodified lines
123err_ida_alloc:121err_ida_alloc:
124 122
125 kfree(ch);123 kfree(ch);
126err_alloc_ch:
127 124
128 return ERR_PTR(err);125 return NULL;
129}126}
130EXPORT_SYMBOL_GPL(counter_alloc);127EXPORT_SYMBOL_GPL(counter_alloc);
131 128
@@ -208,12 +205,12 @@ struct counter_device *devm_counter_alloc(struct device *dev, size_t sizeof_priv · 76 unmodified lines
208 int err;205 int err;
209 206
210 counter = counter_alloc(sizeof_priv);207 counter = counter_alloc(sizeof_priv);
211 if (IS_ERR(counter))208 if (!counter)
212 return counter;209 return NULL;
213 210
214 err = devm_add_action_or_reset(dev, devm_counter_put, counter);211 err = devm_add_action_or_reset(dev, devm_counter_put, counter);
215 if (err < 0)212 if (err < 0)
216 return ERR_PTR(err);213 return NULL;
217 214
218 return counter;215 return counter;
219}216}
drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c+2−1
@@ -1753,7 +1753,6 @@ void otx2_cpt_print_uc_dbg_info(struct otx2_cptpf_dev *cptpf) · 1752 unmodified lines
1753 char engs_info[2 * OTX2_CPT_NAME_LENGTH];1753 char engs_info[2 * OTX2_CPT_NAME_LENGTH];
1754 struct otx2_cpt_eng_grp_info *grp;1754 struct otx2_cpt_eng_grp_info *grp;
1755 struct otx2_cpt_engs_rsvd *engs;1755 struct otx2_cpt_engs_rsvd *engs;
1756 u32 mask[4];
1757 int i, j;1756 int i, j;
1758 1757
1759 pr_debug("Engine groups global info");1758 pr_debug("Engine groups global info");
@@ -1785,6 +1784,8 @@ void otx2_cpt_print_uc_dbg_info(struct otx2_cptpf_dev *cptpf) · 25 unmodified lines
1785 for (j = 0; j < OTX2_CPT_MAX_ETYPES_PER_GRP; j++) {1784 for (j = 0; j < OTX2_CPT_MAX_ETYPES_PER_GRP; j++) {
1786 engs = &grp->engs[j];1785 engs = &grp->engs[j];
1787 if (engs->type) {1786 if (engs->type) {
1787 u32 mask[5] = { };
1788
1788 get_engs_info(grp, engs_info,1789 get_engs_info(grp, engs_info,
1789 2 * OTX2_CPT_NAME_LENGTH, j);1790 2 * OTX2_CPT_NAME_LENGTH, j);
1790 pr_debug("Slot%d: %s", j, engs_info);1791 pr_debug("Slot%d: %s", j, engs_info);
drivers/dma-buf/dma-heap.c+2−0
@@ -14,6 +14,7 @@ · 13 unmodified lines
14#include <linux/xarray.h>14#include <linux/xarray.h>
15#include <linux/list.h>15#include <linux/list.h>
16#include <linux/slab.h>16#include <linux/slab.h>
17#include <linux/nospec.h>
17#include <linux/uaccess.h>18#include <linux/uaccess.h>
18#include <linux/syscalls.h>19#include <linux/syscalls.h>
19#include <linux/dma-heap.h>20#include <linux/dma-heap.h>
@@ -135,6 +136,7 @@ static long dma_heap_ioctl(struct file *file, unsigned int ucmd, · 115 unmodified lines
135 if (nr >= ARRAY_SIZE(dma_heap_ioctl_cmds))136 if (nr >= ARRAY_SIZE(dma_heap_ioctl_cmds))
136 return -EINVAL;137 return -EINVAL;
137 138
139 nr = array_index_nospec(nr, ARRAY_SIZE(dma_heap_ioctl_cmds));
138 /* Get the kernel ioctl cmd that matches */140 /* Get the kernel ioctl cmd that matches */
139 kcmd = dma_heap_ioctl_cmds[nr];141 kcmd = dma_heap_ioctl_cmds[nr];
140 142
drivers/dma/at_xdmac.c+3−1
@@ -1681,8 +1681,10 @@ static void at_xdmac_tasklet(struct tasklet_struct *t) · 1680 unmodified lines
1681 __func__, atchan->irq_status);1681 __func__, atchan->irq_status);
1682 1682
1683 if (!(atchan->irq_status & AT_XDMAC_CIS_LIS) &&1683 if (!(atchan->irq_status & AT_XDMAC_CIS_LIS) &&
1684 !(atchan->irq_status & error_mask))1684 !(atchan->irq_status & error_mask)) {
1685 spin_unlock_irq(&atchan->lock);
1685 return;1686 return;
1687 }
1686 1688
1687 if (atchan->irq_status & error_mask)1689 if (atchan->irq_status & error_mask)
1688 at_xdmac_handle_error(atchan);1690 at_xdmac_handle_error(atchan);
drivers/dma/ptdma/ptdma-dev.c+9−8
@@ -207,7 +207,7 @@ int pt_core_init(struct pt_device *pt) · 206 unmodified lines
207 if (!cmd_q->qbase) {207 if (!cmd_q->qbase) {
208 dev_err(dev, "unable to allocate command queue\n");208 dev_err(dev, "unable to allocate command queue\n");
209 ret = -ENOMEM;209 ret = -ENOMEM;
210 goto e_dma_alloc;210 goto e_destroy_pool;
211 }211 }
212 212
213 cmd_q->qidx = 0;213 cmd_q->qidx = 0;
@@ -229,8 +229,10 @@ int pt_core_init(struct pt_device *pt) · 15 unmodified lines
229 229
230 /* Request an irq */230 /* Request an irq */
231 ret = request_irq(pt->pt_irq, pt_core_irq_handler, 0, dev_name(pt->dev), pt);231 ret = request_irq(pt->pt_irq, pt_core_irq_handler, 0, dev_name(pt->dev), pt);
232 if (ret)232 if (ret) {
233 goto e_pool;233 dev_err(dev, "unable to allocate an IRQ\n");
234 goto e_free_dma;
235 }
234 236
235 /* Update the device registers with queue information. */237 /* Update the device registers with queue information. */
236 cmd_q->qcontrol &= ~CMD_Q_SIZE;238 cmd_q->qcontrol &= ~CMD_Q_SIZE;
@@ -250,21 +252,20 @@ int pt_core_init(struct pt_device *pt) · 13 unmodified lines
250 /* Register the DMA engine support */252 /* Register the DMA engine support */
251 ret = pt_dmaengine_register(pt);253 ret = pt_dmaengine_register(pt);
252 if (ret)254 if (ret)
253 goto e_dmaengine;255 goto e_free_irq;
254 256
255 /* Set up debugfs entries */257 /* Set up debugfs entries */
256 ptdma_debugfs_setup(pt);258 ptdma_debugfs_setup(pt);
257 259
258 return 0;260 return 0;
259 261
260e_dmaengine:262e_free_irq:
261 free_irq(pt->pt_irq, pt);263 free_irq(pt->pt_irq, pt);
262 264
263e_dma_alloc:265e_free_dma:
264 dma_free_coherent(dev, cmd_q->qsize, cmd_q->qbase, cmd_q->qbase_dma);266 dma_free_coherent(dev, cmd_q->qsize, cmd_q->qbase, cmd_q->qbase_dma);
265 267
266e_pool:268e_destroy_pool:
267 dev_err(dev, "unable to allocate an IRQ\n");
268 dma_pool_destroy(pt->cmd_q.dma_pool);269 dma_pool_destroy(pt->cmd_q.dma_pool);
269 270
270 return ret;271 return ret;
drivers/dma/sh/rcar-dmac.c+7−2
@@ -1868,8 +1868,13 @@ static int rcar_dmac_probe(struct platform_device *pdev) · 1867 unmodified lines
1868 1868
1869 dmac->dev = &pdev->dev;1869 dmac->dev = &pdev->dev;
1870 platform_set_drvdata(pdev, dmac);1870 platform_set_drvdata(pdev, dmac);
1871 dma_set_max_seg_size(dmac->dev, RCAR_DMATCR_MASK);1871 ret = dma_set_max_seg_size(dmac->dev, RCAR_DMATCR_MASK);
1872 dma_set_mask_and_coherent(dmac->dev, DMA_BIT_MASK(40));1872 if (ret)
1873 return ret;
1874
1875 ret = dma_set_mask_and_coherent(dmac->dev, DMA_BIT_MASK(40));
1876 if (ret)
1877 return ret;
1873 1878
1874 ret = rcar_dmac_parse_of(&pdev->dev, dmac);1879 ret = rcar_dmac_parse_of(&pdev->dev, dmac);
1875 if (ret < 0)1880 if (ret < 0)
drivers/dma/sh/shdma-base.c+3−1
@@ -115,8 +115,10 @@ static dma_cookie_t shdma_tx_submit(struct dma_async_tx_descriptor *tx) · 114 unmodified lines
115 ret = pm_runtime_get(schan->dev);115 ret = pm_runtime_get(schan->dev);
116 116
117 spin_unlock_irq(&schan->chan_lock);117 spin_unlock_irq(&schan->chan_lock);
118 if (ret < 0)118 if (ret < 0) {
119 dev_err(schan->dev, "%s(): GET = %d\n", __func__, ret);119 dev_err(schan->dev, "%s(): GET = %d\n", __func__, ret);
120 pm_runtime_put(schan->dev);
121 }
120 122
121 pm_runtime_barrier(schan->dev);123 pm_runtime_barrier(schan->dev);
122 124
drivers/dma/stm32-dmamux.c+3−1
@@ -292,10 +292,12 @@ static int stm32_dmamux_probe(struct platform_device *pdev) · 291 unmodified lines
292 ret = of_dma_router_register(node, stm32_dmamux_route_allocate,292 ret = of_dma_router_register(node, stm32_dmamux_route_allocate,
293 &stm32_dmamux->dmarouter);293 &stm32_dmamux->dmarouter);
294 if (ret)294 if (ret)
295 goto err_clk;295 goto pm_disable;
296 296
297 return 0;297 return 0;
298 298
299pm_disable:
300 pm_runtime_disable(&pdev->dev);
299err_clk:301err_clk:
300 clk_disable_unprepare(stm32_dmamux->clk);302 clk_disable_unprepare(stm32_dmamux->clk);
301 303
drivers/edac/altera_edac.c+1−1
@@ -350,7 +350,7 @@ static int altr_sdram_probe(struct platform_device *pdev) · 349 unmodified lines
350 if (irq < 0) {350 if (irq < 0) {
351 edac_printk(KERN_ERR, EDAC_MC,351 edac_printk(KERN_ERR, EDAC_MC,
352 "No irq %d in DT\n", irq);352 "No irq %d in DT\n", irq);
353 return -ENODEV;353 return irq;
354 }354 }
355 355
356 /* Arria10 has a 2nd IRQ */356 /* Arria10 has a 2nd IRQ */
drivers/edac/edac_mc.c+1−1
@@ -215,7 +215,7 @@ void *edac_align_ptr(void **p, unsigned int size, int n_elems) · 214 unmodified lines
215 else215 else
216 return (char *)ptr;216 return (char *)ptr;
217 217
218 r = (unsigned long)p % align;218 r = (unsigned long)ptr % align;
219 219
220 if (r == 0)220 if (r == 0)
221 return (char *)ptr;221 return (char *)ptr;
drivers/edac/xgene_edac.c+1−1
@@ -1919,7 +1919,7 @@ static int xgene_edac_probe(struct platform_device *pdev) · 1918 unmodified lines
1919 irq = platform_get_irq_optional(pdev, i);1919 irq = platform_get_irq_optional(pdev, i);
1920 if (irq < 0) {1920 if (irq < 0) {
1921 dev_err(&pdev->dev, "No IRQ resource\n");1921 dev_err(&pdev->dev, "No IRQ resource\n");
1922 rc = -EINVAL;1922 rc = irq;
1923 goto out_err;1923 goto out_err;
1924 }1924 }
1925 rc = devm_request_irq(&pdev->dev, irq,1925 rc = devm_request_irq(&pdev->dev, irq,
drivers/firmware/efi/efi.c+7−0
@@ -722,6 +722,13 @@ void __init efi_systab_report_header(const efi_table_hdr_t *systab_hdr, · 721 unmodified lines
722 systab_hdr->revision >> 16,722 systab_hdr->revision >> 16,
723 systab_hdr->revision & 0xffff,723 systab_hdr->revision & 0xffff,
724 vendor);724 vendor);
725
726 if (IS_ENABLED(CONFIG_X86_64) &&
727 systab_hdr->revision > EFI_1_10_SYSTEM_TABLE_REVISION &&
728 !strcmp(vendor, "Apple")) {
729 pr_info("Apple Mac detected, using EFI v1.10 runtime services only\n");
730 efi.runtime_version = EFI_1_10_SYSTEM_TABLE_REVISION;
731 }
725}732}
726 733
727static __initdata char memory_type_name[][13] = {734static __initdata char memory_type_name[][13] = {
drivers/firmware/efi/libstub/arm64-stub.c+3−3
@@ -119,9 +119,9 @@ efi_status_t handle_kernel_image(unsigned long *image_addr, · 118 unmodified lines
119 if (image->image_base != _text)119 if (image->image_base != _text)
120 efi_err("FIRMWARE BUG: efi_loaded_image_t::image_base has bogus value\n");120 efi_err("FIRMWARE BUG: efi_loaded_image_t::image_base has bogus value\n");
121 121
122 if (!IS_ALIGNED((u64)_text, EFI_KIMG_ALIGN))122 if (!IS_ALIGNED((u64)_text, SEGMENT_ALIGN))
123 efi_err("FIRMWARE BUG: kernel image not aligned on %ldk boundary\n",123 efi_err("FIRMWARE BUG: kernel image not aligned on %dk boundary\n",
124 EFI_KIMG_ALIGN >> 10);124 SEGMENT_ALIGN >> 10);
125 125
126 kernel_size = _edata - _text;126 kernel_size = _edata - _text;
127 kernel_memsize = kernel_size + (_end - _edata);127 kernel_memsize = kernel_size + (_end - _edata);
drivers/gpio/gpio-aggregator.c+14−4
@@ -278,7 +278,8 @@ static int gpio_fwd_get(struct gpio_chip *chip, unsigned int offset) · 277 unmodified lines
278{278{
279 struct gpiochip_fwd *fwd = gpiochip_get_data(chip);279 struct gpiochip_fwd *fwd = gpiochip_get_data(chip);
280 280
281 return gpiod_get_value(fwd->descs[offset]);281 return chip->can_sleep ? gpiod_get_value_cansleep(fwd->descs[offset])
282 : gpiod_get_value(fwd->descs[offset]);
282}283}
283 284
284static int gpio_fwd_get_multiple(struct gpiochip_fwd *fwd, unsigned long *mask,285static int gpio_fwd_get_multiple(struct gpiochip_fwd *fwd, unsigned long *mask,
@@ -293,7 +294,10 @@ static int gpio_fwd_get_multiple(struct gpiochip_fwd *fwd, unsigned long *mask, · 8 unmodified lines
293 for_each_set_bit(i, mask, fwd->chip.ngpio)294 for_each_set_bit(i, mask, fwd->chip.ngpio)
294 descs[j++] = fwd->descs[i];295 descs[j++] = fwd->descs[i];
295 296
296 error = gpiod_get_array_value(j, descs, NULL, values);297 if (fwd->chip.can_sleep)
298 error = gpiod_get_array_value_cansleep(j, descs, NULL, values);
299 else
300 error = gpiod_get_array_value(j, descs, NULL, values);
297 if (error)301 if (error)
298 return error;302 return error;
299 303
@@ -328,7 +332,10 @@ static void gpio_fwd_set(struct gpio_chip *chip, unsigned int offset, int value) · 28 unmodified lines
328{332{
329 struct gpiochip_fwd *fwd = gpiochip_get_data(chip);333 struct gpiochip_fwd *fwd = gpiochip_get_data(chip);
330 334
331 gpiod_set_value(fwd->descs[offset], value);335 if (chip->can_sleep)
336 gpiod_set_value_cansleep(fwd->descs[offset], value);
337 else
338 gpiod_set_value(fwd->descs[offset], value);
332}339}
333 340
334static void gpio_fwd_set_multiple(struct gpiochip_fwd *fwd, unsigned long *mask,341static void gpio_fwd_set_multiple(struct gpiochip_fwd *fwd, unsigned long *mask,
@@ -343,7 +350,10 @@ static void gpio_fwd_set_multiple(struct gpiochip_fwd *fwd, unsigned long *mask, · 8 unmodified lines
343 descs[j++] = fwd->descs[i];350 descs[j++] = fwd->descs[i];
344 }351 }
345 352
346 gpiod_set_array_value(j, descs, NULL, values);353 if (fwd->chip.can_sleep)
354 gpiod_set_array_value_cansleep(j, descs, NULL, values);
355 else
356 gpiod_set_array_value(j, descs, NULL, values);
347}357}
348 358
349static void gpio_fwd_set_multiple_locked(struct gpio_chip *chip,359static void gpio_fwd_set_multiple_locked(struct gpio_chip *chip,
drivers/gpio/gpio-sifive.c+1−1
@@ -223,7 +223,7 @@ static int sifive_gpio_probe(struct platform_device *pdev) · 222 unmodified lines
223 NULL,223 NULL,
224 chip->base + SIFIVE_GPIO_OUTPUT_EN,224 chip->base + SIFIVE_GPIO_OUTPUT_EN,
225 chip->base + SIFIVE_GPIO_INPUT_EN,225 chip->base + SIFIVE_GPIO_INPUT_EN,
226 0);226 BGPIOF_READ_OUTPUT_REG_SET);
227 if (ret) {227 if (ret) {
228 dev_err(dev, "unable to init generic GPIO\n");228 dev_err(dev, "unable to init generic GPIO\n");
229 return ret;229 return ret;
drivers/gpio/gpio-sim.c+15−4
@@ -570,6 +570,11 @@ static struct gpio_sim_bank *to_gpio_sim_bank(struct config_item *item) · 569 unmodified lines
570 return container_of(group, struct gpio_sim_bank, group);570 return container_of(group, struct gpio_sim_bank, group);
571}571}
572 572
573static bool gpio_sim_bank_has_label(struct gpio_sim_bank *bank)
574{
575 return bank->label && *bank->label;
576}
577
573static struct gpio_sim_device *578static struct gpio_sim_device *
574gpio_sim_bank_get_device(struct gpio_sim_bank *bank)579gpio_sim_bank_get_device(struct gpio_sim_bank *bank)
575{580{
@@ -770,9 +775,15 @@ static int gpio_sim_add_hogs(struct gpio_sim_device *dev) · 194 unmodified lines
770 * point the device doesn't exist yet and so dev_name()775 * point the device doesn't exist yet and so dev_name()
771 * is not available.776 * is not available.
772 */777 */
773 hog->chip_label = kasprintf(GFP_KERNEL,778 if (gpio_sim_bank_has_label(bank))
774 "gpio-sim.%u-%s", dev->id,779 hog->chip_label = kstrdup(bank->label,
775 fwnode_get_name(bank->swnode));780 GFP_KERNEL);
781 else
782 hog->chip_label = kasprintf(GFP_KERNEL,
783 "gpio-sim.%u-%s",
784 dev->id,
785 fwnode_get_name(
786 bank->swnode));
776 if (!hog->chip_label) {787 if (!hog->chip_label) {
777 gpio_sim_remove_hogs(dev);788 gpio_sim_remove_hogs(dev);
778 return -ENOMEM;789 return -ENOMEM;
@@ -816,7 +827,7 @@ gpio_sim_make_bank_swnode(struct gpio_sim_bank *bank, · 37 unmodified lines
816 827
817 properties[prop_idx++] = PROPERTY_ENTRY_U32("ngpios", bank->num_lines);828 properties[prop_idx++] = PROPERTY_ENTRY_U32("ngpios", bank->num_lines);
818 829
819 if (bank->label)830 if (gpio_sim_bank_has_label(bank))
820 properties[prop_idx++] = PROPERTY_ENTRY_STRING("gpio-sim,label",831 properties[prop_idx++] = PROPERTY_ENTRY_STRING("gpio-sim,label",
821 bank->label);832 bank->label);
822 833
drivers/gpio/gpiolib-cdev.c+3−3
@@ -330,7 +330,7 @@ static int linehandle_create(struct gpio_device *gdev, void __user *ip) · 329 unmodified lines
330 goto out_free_lh;330 goto out_free_lh;
331 }331 }
332 332
333 ret = gpiod_request(desc, lh->label);333 ret = gpiod_request_user(desc, lh->label);
334 if (ret)334 if (ret)
335 goto out_free_lh;335 goto out_free_lh;
336 lh->descs[i] = desc;336 lh->descs[i] = desc;
@@ -1378,7 +1378,7 @@ static int linereq_create(struct gpio_device *gdev, void __user *ip) · 1041 unmodified lines
1378 goto out_free_linereq;1378 goto out_free_linereq;
1379 }1379 }
1380 1380
1381 ret = gpiod_request(desc, lr->label);1381 ret = gpiod_request_user(desc, lr->label);
1382 if (ret)1382 if (ret)
1383 goto out_free_linereq;1383 goto out_free_linereq;
1384 1384
@@ -1764,7 +1764,7 @@ static int lineevent_create(struct gpio_device *gdev, void __user *ip) · 379 unmodified lines
1764 }1764 }
1765 }1765 }
1766 1766
1767 ret = gpiod_request(desc, le->label);1767 ret = gpiod_request_user(desc, le->label);
1768 if (ret)1768 if (ret)
1769 goto out_free_le;1769 goto out_free_le;
1770 le->desc = desc;1770 le->desc = desc;
drivers/gpio/gpiolib-sysfs.c+2−5
@@ -475,12 +475,9 @@ static ssize_t export_store(struct class *class, · 474 unmodified lines
475 * they may be undone on its behalf too.475 * they may be undone on its behalf too.
476 */476 */
477 477
478 status = gpiod_request(desc, "sysfs");478 status = gpiod_request_user(desc, "sysfs");
479 if (status) {479 if (status)
480 if (status == -EPROBE_DEFER)
481 status = -ENODEV;
482 goto done;480 goto done;
483 }
484 481
485 status = gpiod_set_transitory(desc, false);482 status = gpiod_set_transitory(desc, false);
486 if (!status) {483 if (!status) {
drivers/gpio/gpiolib.h+12−0
@@ -135,6 +135,18 @@ struct gpio_desc { · 134 unmodified lines
135 135
136int gpiod_request(struct gpio_desc *desc, const char *label);136int gpiod_request(struct gpio_desc *desc, const char *label);
137void gpiod_free(struct gpio_desc *desc);137void gpiod_free(struct gpio_desc *desc);
138
139static inline int gpiod_request_user(struct gpio_desc *desc, const char *label)
140{
141 int ret;
142
143 ret = gpiod_request(desc, label);
144 if (ret == -EPROBE_DEFER)
145 ret = -ENODEV;
146
147 return ret;
148}
149
138int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,150int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
139 unsigned long lflags, enum gpiod_flags dflags);151 unsigned long lflags, enum gpiod_flags dflags);
140int gpio_set_debounce_timeout(struct gpio_desc *desc, unsigned int debounce);152int gpio_set_debounce_timeout(struct gpio_desc *desc, unsigned int debounce);
drivers/gpu/drm/amd/amdgpu/amdgpu.h+8−2
@@ -1408,12 +1408,10 @@ int amdgpu_acpi_smart_shift_update(struct drm_device *dev, enum amdgpu_ss ss_sta · 1407 unmodified lines
1408int amdgpu_acpi_pcie_notify_device_ready(struct amdgpu_device *adev);1408int amdgpu_acpi_pcie_notify_device_ready(struct amdgpu_device *adev);
1409 1409
1410void amdgpu_acpi_get_backlight_caps(struct amdgpu_dm_backlight_caps *caps);1410void amdgpu_acpi_get_backlight_caps(struct amdgpu_dm_backlight_caps *caps);
1411bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev);
1412void amdgpu_acpi_detect(void);1411void amdgpu_acpi_detect(void);
1413#else1412#else
1414static inline int amdgpu_acpi_init(struct amdgpu_device *adev) { return 0; }1413static inline int amdgpu_acpi_init(struct amdgpu_device *adev) { return 0; }
1415static inline void amdgpu_acpi_fini(struct amdgpu_device *adev) { }1414static inline void amdgpu_acpi_fini(struct amdgpu_device *adev) { }
1416static inline bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev) { return false; }
1417static inline void amdgpu_acpi_detect(void) { }1415static inline void amdgpu_acpi_detect(void) { }
1418static inline bool amdgpu_acpi_is_power_shift_control_supported(void) { return false; }1416static inline bool amdgpu_acpi_is_power_shift_control_supported(void) { return false; }
1419static inline int amdgpu_acpi_power_shift_control(struct amdgpu_device *adev,1417static inline int amdgpu_acpi_power_shift_control(struct amdgpu_device *adev,
@@ -1422,6 +1420,14 @@ static inline int amdgpu_acpi_smart_shift_update(struct drm_device *dev, · 2 unmodified lines
1422 enum amdgpu_ss ss_state) { return 0; }1420 enum amdgpu_ss ss_state) { return 0; }
1423#endif1421#endif
1424 1422
1423#if defined(CONFIG_ACPI) && defined(CONFIG_SUSPEND)
1424bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev);
1425bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev);
1426#else
1427static inline bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev) { return false; }
1428static inline bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev) { return false; }
1429#endif
1430
1425int amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser,1431int amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser,
1426 uint64_t addr, struct amdgpu_bo **bo,1432 uint64_t addr, struct amdgpu_bo **bo,
1427 struct amdgpu_bo_va_mapping **mapping);1433 struct amdgpu_bo_va_mapping **mapping);
drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c+32−5
@@ -1031,6 +1031,20 @@ void amdgpu_acpi_detect(void) · 1030 unmodified lines
1031 }1031 }
1032}1032}
1033 1033
1034#if IS_ENABLED(CONFIG_SUSPEND)
1035/**
1036 * amdgpu_acpi_is_s3_active
1037 *
1038 * @adev: amdgpu_device_pointer
1039 *
1040 * returns true if supported, false if not.
1041 */
1042bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev)
1043{
1044 return !(adev->flags & AMD_IS_APU) ||
1045 (pm_suspend_target_state == PM_SUSPEND_MEM);
1046}
1047
1034/**1048/**
1035 * amdgpu_acpi_is_s0ix_active1049 * amdgpu_acpi_is_s0ix_active
1036 *1050 *
@@ -1040,11 +1054,24 @@ void amdgpu_acpi_detect(void) · 3 unmodified lines
1040 */1054 */
1041bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev)1055bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev)
1042{1056{
1043#if IS_ENABLED(CONFIG_AMD_PMC) && IS_ENABLED(CONFIG_SUSPEND)1057 if (!(adev->flags & AMD_IS_APU) ||
1044 if (acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0) {1058 (pm_suspend_target_state != PM_SUSPEND_TO_IDLE))
1045 if (adev->flags & AMD_IS_APU)1059 return false;
1046 return pm_suspend_target_state == PM_SUSPEND_TO_IDLE;1060
1061 if (!(acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0)) {
1062 dev_warn_once(adev->dev,
1063 "Power consumption will be higher as BIOS has not been configured for suspend-to-idle.\n"
1064 "To use suspend-to-idle change the sleep mode in BIOS setup.\n");
1065 return false;
1047 }1066 }
1048#endif1067
1068#if !IS_ENABLED(CONFIG_AMD_PMC)
1069 dev_warn_once(adev->dev,
1070 "Power consumption will be higher as the kernel has not been compiled with CONFIG_AMD_PMC.\n");
1049 return false;1071 return false;
1072#else
1073 return true;
1074#endif /* CONFIG_AMD_PMC */
1050}1075}
1076
1077#endif /* CONFIG_SUSPEND */
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c+90−2
@@ -1525,6 +1525,87 @@ static const u16 amdgpu_unsupported_pciidlist[] = { · 1524 unmodified lines
1525 0x99A0,1525 0x99A0,
1526 0x99A2,1526 0x99A2,
1527 0x99A4,1527 0x99A4,
1528 /* radeon secondary ids */
1529 0x3171,
1530 0x3e70,
1531 0x4164,
1532 0x4165,
1533 0x4166,
1534 0x4168,
1535 0x4170,
1536 0x4171,
1537 0x4172,
1538 0x4173,
1539 0x496e,
1540 0x4a69,
1541 0x4a6a,
1542 0x4a6b,
1543 0x4a70,
1544 0x4a74,
1545 0x4b69,
1546 0x4b6b,
1547 0x4b6c,
1548 0x4c6e,
1549 0x4e64,
1550 0x4e65,
1551 0x4e66,
1552 0x4e67,
1553 0x4e68,
1554 0x4e69,
1555 0x4e6a,
1556 0x4e71,
1557 0x4f73,
1558 0x5569,
1559 0x556b,
1560 0x556d,
1561 0x556f,
1562 0x5571,
1563 0x5854,
1564 0x5874,
1565 0x5940,
1566 0x5941,
1567 0x5b72,
1568 0x5b73,
1569 0x5b74,
1570 0x5b75,
1571 0x5d44,
1572 0x5d45,
1573 0x5d6d,
1574 0x5d6f,
1575 0x5d72,
1576 0x5d77,
1577 0x5e6b,
1578 0x5e6d,
1579 0x7120,
1580 0x7124,
1581 0x7129,
1582 0x712e,
1583 0x712f,
1584 0x7162,
1585 0x7163,
1586 0x7166,
1587 0x7167,
1588 0x7172,
1589 0x7173,
1590 0x71a0,
1591 0x71a1,
1592 0x71a3,
1593 0x71a7,
1594 0x71bb,
1595 0x71e0,
1596 0x71e1,
1597 0x71e2,
1598 0x71e6,
1599 0x71e7,
1600 0x71f2,
1601 0x7269,
1602 0x726b,
1603 0x726e,
1604 0x72a0,
1605 0x72a8,
1606 0x72b1,
1607 0x72b3,
1608 0x793f,
1528};1609};
1529 1610
1530static const struct pci_device_id pciidlist[] = {1611static const struct pci_device_id pciidlist[] = {
@@ -2165,13 +2246,20 @@ static void amdgpu_drv_delayed_reset_work_handler(struct work_struct *work) · 634 unmodified lines
2165static int amdgpu_pmops_prepare(struct device *dev)2246static int amdgpu_pmops_prepare(struct device *dev)
2166{2247{
2167 struct drm_device *drm_dev = dev_get_drvdata(dev);2248 struct drm_device *drm_dev = dev_get_drvdata(dev);
2249 struct amdgpu_device *adev = drm_to_adev(drm_dev);
2168 2250
2169 /* Return a positive number here so2251 /* Return a positive number here so
2170 * DPM_FLAG_SMART_SUSPEND works properly2252 * DPM_FLAG_SMART_SUSPEND works properly
2171 */2253 */
2172 if (amdgpu_device_supports_boco(drm_dev))2254 if (amdgpu_device_supports_boco(drm_dev))
2173 return pm_runtime_suspended(dev) &&2255 return pm_runtime_suspended(dev);
2174 pm_suspend_via_firmware();2256
2257 /* if we will not support s3 or s2i for the device
2258 * then skip suspend
2259 */
2260 if (!amdgpu_acpi_is_s0ix_active(adev) &&
2261 !amdgpu_acpi_is_s3_active(adev))
2262 return 1;
2175 2263
2176 return 0;2264 return 0;
2177}2265}
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c+1−1
@@ -1904,7 +1904,7 @@ int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset, · 1903 unmodified lines
1904 unsigned i;1904 unsigned i;
1905 int r;1905 int r;
1906 1906
1907 if (direct_submit && !ring->sched.ready) {1907 if (!direct_submit && !ring->sched.ready) {
1908 DRM_ERROR("Trying to move memory with ring turned off.\n");1908 DRM_ERROR("Trying to move memory with ring turned off.\n");
1909 return -EINVAL;1909 return -EINVAL;
1910 }1910 }
drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c+6−1
@@ -543,7 +543,9 @@ static void gfxhub_v2_1_utcl2_harvest(struct amdgpu_device *adev) · 542 unmodified lines
543 adev->gfx.config.max_sh_per_se *543 adev->gfx.config.max_sh_per_se *
544 adev->gfx.config.max_shader_engines);544 adev->gfx.config.max_shader_engines);
545 545
546 if (adev->ip_versions[GC_HWIP][0] == IP_VERSION(10, 3, 3)) {546 switch (adev->ip_versions[GC_HWIP][0]) {
547 case IP_VERSION(10, 3, 1):
548 case IP_VERSION(10, 3, 3):
547 /* Get SA disabled bitmap from eFuse setting */549 /* Get SA disabled bitmap from eFuse setting */
548 efuse_setting = RREG32_SOC15(GC, 0, mmCC_GC_SA_UNIT_DISABLE);550 efuse_setting = RREG32_SOC15(GC, 0, mmCC_GC_SA_UNIT_DISABLE);
549 efuse_setting &= CC_GC_SA_UNIT_DISABLE__SA_DISABLE_MASK;551 efuse_setting &= CC_GC_SA_UNIT_DISABLE__SA_DISABLE_MASK;
@@ -566,6 +568,9 @@ static void gfxhub_v2_1_utcl2_harvest(struct amdgpu_device *adev) · 16 unmodified lines
566 disabled_sa = tmp;568 disabled_sa = tmp;
567 569
568 WREG32_SOC15(GC, 0, mmGCUTCL2_HARVEST_BYPASS_GROUPS_YELLOW_CARP, disabled_sa);570 WREG32_SOC15(GC, 0, mmGCUTCL2_HARVEST_BYPASS_GROUPS_YELLOW_CARP, disabled_sa);
571 break;
572 default:
573 break;
569 }574 }
570}575}
571 576
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c+3−0
@@ -1140,6 +1140,9 @@ static void gmc_v10_0_get_clockgating_state(void *handle, u32 *flags) · 1139 unmodified lines
1140{1140{
1141 struct amdgpu_device *adev = (struct amdgpu_device *)handle;1141 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
1142 1142
1143 if (adev->ip_versions[GC_HWIP][0] == IP_VERSION(10, 1, 3))
1144 return;
1145
1143 adev->mmhub.funcs->get_clockgating(adev, flags);1146 adev->mmhub.funcs->get_clockgating(adev, flags);
1144 1147
1145 if (adev->ip_versions[ATHUB_HWIP][0] >= IP_VERSION(2, 1, 0))1148 if (adev->ip_versions[ATHUB_HWIP][0] >= IP_VERSION(2, 1, 0))
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c+8−0
@@ -2057,6 +2057,10 @@ static int sdma_v4_0_suspend(void *handle) · 2056 unmodified lines
2057{2057{
2058 struct amdgpu_device *adev = (struct amdgpu_device *)handle;2058 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
2059 2059
2060 /* SMU saves SDMA state for us */
2061 if (adev->in_s0ix)
2062 return 0;
2063
2060 return sdma_v4_0_hw_fini(adev);2064 return sdma_v4_0_hw_fini(adev);
2061}2065}
2062 2066
@@ -2064,6 +2068,10 @@ static int sdma_v4_0_resume(void *handle) · 1 unmodified line
2064{2068{
2065 struct amdgpu_device *adev = (struct amdgpu_device *)handle;2069 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
2066 2070
2071 /* SMU restores SDMA state for us */
2072 if (adev->in_s0ix)
2073 return 0;
2074
2067 return sdma_v4_0_hw_init(adev);2075 return sdma_v4_0_hw_init(adev);
2068}2076}
2069 2077
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c+1−1
@@ -3653,7 +3653,7 @@ static int dcn10_register_irq_handlers(struct amdgpu_device *adev) · 3652 unmodified lines
3653 3653
3654 /* Use GRPH_PFLIP interrupt */3654 /* Use GRPH_PFLIP interrupt */
3655 for (i = DCN_1_0__SRCID__HUBP0_FLIP_INTERRUPT;3655 for (i = DCN_1_0__SRCID__HUBP0_FLIP_INTERRUPT;
3656 i <= DCN_1_0__SRCID__HUBP0_FLIP_INTERRUPT + adev->mode_info.num_crtc - 1;3656 i <= DCN_1_0__SRCID__HUBP0_FLIP_INTERRUPT + dc->caps.max_otg_num - 1;
3657 i++) {3657 i++) {
3658 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_DCE, i, &adev->pageflip_irq);3658 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_DCE, i, &adev->pageflip_irq);
3659 if (r) {3659 if (r) {
drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c+2−2
@@ -2033,10 +2033,10 @@ static void calculate_bandwidth( · 2032 unmodified lines
2033 kfree(surface_type);2033 kfree(surface_type);
2034free_tiling_mode:2034free_tiling_mode:
2035 kfree(tiling_mode);2035 kfree(tiling_mode);
2036free_yclk:
2037 kfree(yclk);
2038free_sclk:2036free_sclk:
2039 kfree(sclk);2037 kfree(sclk);
2038free_yclk:
2039 kfree(yclk);
2040}2040}
2041 2041
2042/*******************************************************************************2042/*******************************************************************************
drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c+0−1
@@ -503,7 +503,6 @@ static void dcn_bw_calc_rq_dlg_ttu( · 502 unmodified lines
503 //input[in_idx].dout.output_standard;503 //input[in_idx].dout.output_standard;
504 504
505 /*todo: soc->sr_enter_plus_exit_time??*/505 /*todo: soc->sr_enter_plus_exit_time??*/
506 dlg_sys_param->t_srx_delay_us = dc->dcn_ip->dcfclk_cstate_latency / v->dcf_clk_deep_sleep;
507 506
508 dml1_rq_dlg_get_rq_params(dml, rq_param, &input->pipe.src);507 dml1_rq_dlg_get_rq_params(dml, rq_param, &input->pipe.src);
509 dml1_extract_rq_regs(dml, rq_regs, rq_param);508 dml1_extract_rq_regs(dml, rq_regs, rq_param);
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c+8−8
@@ -570,32 +570,32 @@ static struct wm_table lpddr5_wm_table = { · 569 unmodified lines
570 .wm_inst = WM_A,570 .wm_inst = WM_A,
571 .wm_type = WM_TYPE_PSTATE_CHG,571 .wm_type = WM_TYPE_PSTATE_CHG,
572 .pstate_latency_us = 11.65333,572 .pstate_latency_us = 11.65333,
573 .sr_exit_time_us = 7.95,573 .sr_exit_time_us = 13.5,
574 .sr_enter_plus_exit_time_us = 9,574 .sr_enter_plus_exit_time_us = 16.5,
575 .valid = true,575 .valid = true,
576 },576 },
577 {577 {
578 .wm_inst = WM_B,578 .wm_inst = WM_B,
579 .wm_type = WM_TYPE_PSTATE_CHG,579 .wm_type = WM_TYPE_PSTATE_CHG,
580 .pstate_latency_us = 11.65333,580 .pstate_latency_us = 11.65333,
581 .sr_exit_time_us = 9.82,581 .sr_exit_time_us = 13.5,
582 .sr_enter_plus_exit_time_us = 11.196,582 .sr_enter_plus_exit_time_us = 16.5,
583 .valid = true,583 .valid = true,
584 },584 },
585 {585 {
586 .wm_inst = WM_C,586 .wm_inst = WM_C,
587 .wm_type = WM_TYPE_PSTATE_CHG,587 .wm_type = WM_TYPE_PSTATE_CHG,
588 .pstate_latency_us = 11.65333,588 .pstate_latency_us = 11.65333,
589 .sr_exit_time_us = 9.89,589 .sr_exit_time_us = 13.5,
590 .sr_enter_plus_exit_time_us = 11.24,590 .sr_enter_plus_exit_time_us = 16.5,
591 .valid = true,591 .valid = true,
592 },592 },
593 {593 {
594 .wm_inst = WM_D,594 .wm_inst = WM_D,
595 .wm_type = WM_TYPE_PSTATE_CHG,595 .wm_type = WM_TYPE_PSTATE_CHG,
596 .pstate_latency_us = 11.65333,596 .pstate_latency_us = 11.65333,
597 .sr_exit_time_us = 9.748,597 .sr_exit_time_us = 13.5,
598 .sr_enter_plus_exit_time_us = 11.102,598 .sr_enter_plus_exit_time_us = 16.5,
599 .valid = true,599 .valid = true,
600 },600 },
601 }601 }
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c+10−10
@@ -329,38 +329,38 @@ static struct clk_bw_params dcn31_bw_params = { · 328 unmodified lines
329 329
330};330};
331 331
332static struct wm_table ddr4_wm_table = {332static struct wm_table ddr5_wm_table = {
333 .entries = {333 .entries = {
334 {334 {
335 .wm_inst = WM_A,335 .wm_inst = WM_A,
336 .wm_type = WM_TYPE_PSTATE_CHG,336 .wm_type = WM_TYPE_PSTATE_CHG,
337 .pstate_latency_us = 11.72,337 .pstate_latency_us = 11.72,
338 .sr_exit_time_us = 6.09,338 .sr_exit_time_us = 9,
339 .sr_enter_plus_exit_time_us = 7.14,339 .sr_enter_plus_exit_time_us = 11,
340 .valid = true,340 .valid = true,
341 },341 },
342 {342 {
343 .wm_inst = WM_B,343 .wm_inst = WM_B,
344 .wm_type = WM_TYPE_PSTATE_CHG,344 .wm_type = WM_TYPE_PSTATE_CHG,
345 .pstate_latency_us = 11.72,345 .pstate_latency_us = 11.72,
346 .sr_exit_time_us = 10.12,346 .sr_exit_time_us = 9,
347 .sr_enter_plus_exit_time_us = 11.48,347 .sr_enter_plus_exit_time_us = 11,
348 .valid = true,348 .valid = true,
349 },349 },
350 {350 {
351 .wm_inst = WM_C,351 .wm_inst = WM_C,
352 .wm_type = WM_TYPE_PSTATE_CHG,352 .wm_type = WM_TYPE_PSTATE_CHG,
353 .pstate_latency_us = 11.72,353 .pstate_latency_us = 11.72,
354 .sr_exit_time_us = 10.12,354 .sr_exit_time_us = 9,
355 .sr_enter_plus_exit_time_us = 11.48,355 .sr_enter_plus_exit_time_us = 11,
356 .valid = true,356 .valid = true,
357 },357 },
358 {358 {
359 .wm_inst = WM_D,359 .wm_inst = WM_D,
360 .wm_type = WM_TYPE_PSTATE_CHG,360 .wm_type = WM_TYPE_PSTATE_CHG,
361 .pstate_latency_us = 11.72,361 .pstate_latency_us = 11.72,
362 .sr_exit_time_us = 10.12,362 .sr_exit_time_us = 9,
363 .sr_enter_plus_exit_time_us = 11.48,363 .sr_enter_plus_exit_time_us = 11,
364 .valid = true,364 .valid = true,
365 },365 },
366 }366 }
@@ -687,7 +687,7 @@ void dcn31_clk_mgr_construct( · 320 unmodified lines
687 if (ctx->dc_bios->integrated_info->memory_type == LpDdr5MemType) {687 if (ctx->dc_bios->integrated_info->memory_type == LpDdr5MemType) {
688 dcn31_bw_params.wm_table = lpddr5_wm_table;688 dcn31_bw_params.wm_table = lpddr5_wm_table;
689 } else {689 } else {
690 dcn31_bw_params.wm_table = ddr4_wm_table;690 dcn31_bw_params.wm_table = ddr5_wm_table;
691 }691 }
692 /* Saved clocks configured at boot for debug purposes */692 /* Saved clocks configured at boot for debug purposes */
693 dcn31_dump_clk_registers(&clk_mgr->base.base.boot_snapshot, &clk_mgr->base.base, &log_info);693 dcn31_dump_clk_registers(&clk_mgr->base.base.boot_snapshot, &clk_mgr->base.base, &log_info);
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.c+5−1
@@ -120,7 +120,11 @@ static int dcn31_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, · 119 unmodified lines
120 result = dcn31_smu_wait_for_response(clk_mgr, 10, 200000);120 result = dcn31_smu_wait_for_response(clk_mgr, 10, 200000);
121 121
122 if (result == VBIOSSMC_Result_Failed) {122 if (result == VBIOSSMC_Result_Failed) {
123 ASSERT(0);123 if (msg_id == VBIOSSMC_MSG_TransferTableDram2Smu &&
124 param == TABLE_WATERMARKS)
125 DC_LOG_WARNING("Watermarks table not configured properly by SMU");
126 else
127 ASSERT(0);
124 REG_WRITE(MP1_SMN_C2PMSG_91, VBIOSSMC_Result_OK);128 REG_WRITE(MP1_SMN_C2PMSG_91, VBIOSSMC_Result_OK);
125 return -1;129 return -1;
126 }130 }
drivers/gpu/drm/amd/display/dc/core/dc.c+29−13
@@ -1220,6 +1220,8 @@ struct dc *dc_create(const struct dc_init_data *init_params) · 1219 unmodified lines
1220 1220
1221 dc->caps.max_dp_protocol_version = DP_VERSION_1_4;1221 dc->caps.max_dp_protocol_version = DP_VERSION_1_4;
1222 1222
1223 dc->caps.max_otg_num = dc->res_pool->res_cap->num_timing_generator;
1224
1223 if (dc->res_pool->dmcu != NULL)1225 if (dc->res_pool->dmcu != NULL)
1224 dc->versions.dmcu_version = dc->res_pool->dmcu->dmcu_version;1226 dc->versions.dmcu_version = dc->res_pool->dmcu->dmcu_version;
1225 }1227 }
@@ -1404,20 +1406,34 @@ static void program_timing_sync( · 178 unmodified lines
1404 status->timing_sync_info.master = false;1406 status->timing_sync_info.master = false;
1405 1407
1406 }1408 }
1407 /* remove any other unblanked pipes as they have already been synced */
1408 for (j = j + 1; j < group_size; j++) {
1409 bool is_blanked;
1410 1409
1411 if (pipe_set[j]->stream_res.opp->funcs->dpg_is_blanked)1410 /* remove any other pipes that are already been synced */
1412 is_blanked =1411 if (dc->config.use_pipe_ctx_sync_logic) {
1413 pipe_set[j]->stream_res.opp->funcs->dpg_is_blanked(pipe_set[j]->stream_res.opp);1412 /* check pipe's syncd to decide which pipe to be removed */
1414 else1413 for (j = 1; j < group_size; j++) {
1415 is_blanked =1414 if (pipe_set[j]->pipe_idx_syncd == pipe_set[0]->pipe_idx_syncd) {
1416 pipe_set[j]->stream_res.tg->funcs->is_blanked(pipe_set[j]->stream_res.tg);1415 group_size--;
1417 if (!is_blanked) {1416 pipe_set[j] = pipe_set[group_size];
1418 group_size--;1417 j--;
1419 pipe_set[j] = pipe_set[group_size];1418 } else
1420 j--;1419 /* link slave pipe's syncd with master pipe */
1420 pipe_set[j]->pipe_idx_syncd = pipe_set[0]->pipe_idx_syncd;
1421 }
1422 } else {
1423 for (j = j + 1; j < group_size; j++) {
1424 bool is_blanked;
1425
1426 if (pipe_set[j]->stream_res.opp->funcs->dpg_is_blanked)
1427 is_blanked =
1428 pipe_set[j]->stream_res.opp->funcs->dpg_is_blanked(pipe_set[j]->stream_res.opp);
1429 else
1430 is_blanked =
1431 pipe_set[j]->stream_res.tg->funcs->is_blanked(pipe_set[j]->stream_res.tg);
1432 if (!is_blanked) {
1433 group_size--;
1434 pipe_set[j] = pipe_set[group_size];
1435 j--;
1436 }
1421 }1437 }
1422 }1438 }
1423 1439
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c+23−3
@@ -202,7 +202,7 @@ void dp_wait_for_training_aux_rd_interval( · 201 unmodified lines
202 uint32_t wait_in_micro_secs)202 uint32_t wait_in_micro_secs)
203{203{
204#if defined(CONFIG_DRM_AMD_DC_DCN)204#if defined(CONFIG_DRM_AMD_DC_DCN)
205 if (wait_in_micro_secs > 16000)205 if (wait_in_micro_secs > 1000)
206 msleep(wait_in_micro_secs/1000);206 msleep(wait_in_micro_secs/1000);
207 else207 else
208 udelay(wait_in_micro_secs);208 udelay(wait_in_micro_secs);
@@ -5597,6 +5597,26 @@ static bool retrieve_link_cap(struct dc_link *link) · 5388 unmodified lines
5597 dp_hw_fw_revision.ieee_fw_rev,5597 dp_hw_fw_revision.ieee_fw_rev,
5598 sizeof(dp_hw_fw_revision.ieee_fw_rev));5598 sizeof(dp_hw_fw_revision.ieee_fw_rev));
5599 5599
5600 /* Quirk for Apple MBP 2018 15" Retina panels: wrong DP_MAX_LINK_RATE */
5601 {
5602 uint8_t str_mbp_2018[] = { 101, 68, 21, 103, 98, 97 };
5603 uint8_t fwrev_mbp_2018[] = { 7, 4 };
5604 uint8_t fwrev_mbp_2018_vega[] = { 8, 4 };
5605
5606 /* We also check for the firmware revision as 16,1 models have an
5607 * identical device id and are incorrectly quirked otherwise.
5608 */
5609 if ((link->dpcd_caps.sink_dev_id == 0x0010fa) &&
5610 !memcmp(link->dpcd_caps.sink_dev_id_str, str_mbp_2018,
5611 sizeof(str_mbp_2018)) &&
5612 (!memcmp(link->dpcd_caps.sink_fw_revision, fwrev_mbp_2018,
5613 sizeof(fwrev_mbp_2018)) ||
5614 !memcmp(link->dpcd_caps.sink_fw_revision, fwrev_mbp_2018_vega,
5615 sizeof(fwrev_mbp_2018_vega)))) {
5616 link->reported_link_cap.link_rate = LINK_RATE_RBR2;
5617 }
5618 }
5619
5600 memset(&link->dpcd_caps.dsc_caps, '\0',5620 memset(&link->dpcd_caps.dsc_caps, '\0',
5601 sizeof(link->dpcd_caps.dsc_caps));5621 sizeof(link->dpcd_caps.dsc_caps));
5602 memset(&link->dpcd_caps.fec_cap, '\0', sizeof(link->dpcd_caps.fec_cap));5622 memset(&link->dpcd_caps.fec_cap, '\0', sizeof(link->dpcd_caps.fec_cap));
@@ -6935,7 +6955,7 @@ bool dpcd_write_128b_132b_sst_payload_allocation_table( · 1332 unmodified lines
6935 }6955 }
6936 }6956 }
6937 retries++;6957 retries++;
6938 udelay(5000);6958 msleep(5);
6939 }6959 }
6940 6960
6941 if (!result && retries == max_retries) {6961 if (!result && retries == max_retries) {
@@ -6987,7 +7007,7 @@ bool dpcd_poll_for_allocation_change_trigger(struct dc_link *link) · 45 unmodified lines
6987 break;7007 break;
6988 }7008 }
6989 7009
6990 udelay(5000);7010 msleep(5);
6991 }7011 }
6992 7012
6993 if (result == ACT_FAILED) {7013 if (result == ACT_FAILED) {
drivers/gpu/drm/amd/display/dc/core/dc_resource.c+54−0
@@ -3217,6 +3217,60 @@ struct hpo_dp_link_encoder *resource_get_hpo_dp_link_enc_for_det_lt( · 3216 unmodified lines
3217}3217}
3218#endif3218#endif
3219 3219
3220void reset_syncd_pipes_from_disabled_pipes(struct dc *dc,
3221 struct dc_state *context)
3222{
3223 int i, j;
3224 struct pipe_ctx *pipe_ctx_old, *pipe_ctx, *pipe_ctx_syncd;
3225
3226 /* If pipe backend is reset, need to reset pipe syncd status */
3227 for (i = 0; i < dc->res_pool->pipe_count; i++) {
3228 pipe_ctx_old = &dc->current_state->res_ctx.pipe_ctx[i];
3229 pipe_ctx = &context->res_ctx.pipe_ctx[i];
3230
3231 if (!pipe_ctx_old->stream)
3232 continue;
3233
3234 if (pipe_ctx_old->top_pipe || pipe_ctx_old->prev_odm_pipe)
3235 continue;
3236
3237 if (!pipe_ctx->stream ||
3238 pipe_need_reprogram(pipe_ctx_old, pipe_ctx)) {
3239
3240 /* Reset all the syncd pipes from the disabled pipe */
3241 for (j = 0; j < dc->res_pool->pipe_count; j++) {
3242 pipe_ctx_syncd = &context->res_ctx.pipe_ctx[j];
3243 if ((GET_PIPE_SYNCD_FROM_PIPE(pipe_ctx_syncd) == pipe_ctx_old->pipe_idx) ||
3244 !IS_PIPE_SYNCD_VALID(pipe_ctx_syncd))
3245 SET_PIPE_SYNCD_TO_PIPE(pipe_ctx_syncd, j);
3246 }
3247 }
3248 }
3249}
3250
3251void check_syncd_pipes_for_disabled_master_pipe(struct dc *dc,
3252 struct dc_state *context,
3253 uint8_t disabled_master_pipe_idx)
3254{
3255 int i;
3256 struct pipe_ctx *pipe_ctx, *pipe_ctx_check;
3257
3258 pipe_ctx = &context->res_ctx.pipe_ctx[disabled_master_pipe_idx];
3259 if ((GET_PIPE_SYNCD_FROM_PIPE(pipe_ctx) != disabled_master_pipe_idx) ||
3260 !IS_PIPE_SYNCD_VALID(pipe_ctx))
3261 SET_PIPE_SYNCD_TO_PIPE(pipe_ctx, disabled_master_pipe_idx);
3262
3263 /* for the pipe disabled, check if any slave pipe exists and assert */
3264 for (i = 0; i < dc->res_pool->pipe_count; i++) {
3265 pipe_ctx_check = &context->res_ctx.pipe_ctx[i];
3266
3267 if ((GET_PIPE_SYNCD_FROM_PIPE(pipe_ctx_check) == disabled_master_pipe_idx) &&
3268 IS_PIPE_SYNCD_VALID(pipe_ctx_check) && (i != disabled_master_pipe_idx))
3269 DC_ERR("DC: Failure: pipe_idx[%d] syncd with disabled master pipe_idx[%d]\n",
3270 i, disabled_master_pipe_idx);
3271 }
3272}
3273
3220uint8_t resource_transmitter_to_phy_idx(const struct dc *dc, enum transmitter transmitter)3274uint8_t resource_transmitter_to_phy_idx(const struct dc *dc, enum transmitter transmitter)
3221{3275{
3222 /* TODO - get transmitter to phy idx mapping from DMUB */3276 /* TODO - get transmitter to phy idx mapping from DMUB */
drivers/gpu/drm/amd/display/dc/dc.h+2−0
@@ -202,6 +202,7 @@ struct dc_caps { · 201 unmodified lines
202 bool edp_dsc_support;202 bool edp_dsc_support;
203 bool vbios_lttpr_aware;203 bool vbios_lttpr_aware;
204 bool vbios_lttpr_enable;204 bool vbios_lttpr_enable;
205 uint32_t max_otg_num;
205};206};
206 207
207struct dc_bug_wa {208struct dc_bug_wa {
@@ -344,6 +345,7 @@ struct dc_config { · 136 unmodified lines
344 uint8_t vblank_alignment_max_frame_time_diff;345 uint8_t vblank_alignment_max_frame_time_diff;
345 bool is_asymmetric_memory;346 bool is_asymmetric_memory;
346 bool is_single_rank_dimm;347 bool is_single_rank_dimm;
348 bool use_pipe_ctx_sync_logic;
347};349};
348 350
349enum visual_confirm {351enum visual_confirm {
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c+30−7
@@ -1566,6 +1566,10 @@ static enum dc_status apply_single_controller_ctx_to_hw( · 1565 unmodified lines
1566 &pipe_ctx->stream->audio_info);1566 &pipe_ctx->stream->audio_info);
1567 }1567 }
1568 1568
1569 /* make sure no pipes syncd to the pipe being enabled */
1570 if (!pipe_ctx->stream->apply_seamless_boot_optimization && dc->config.use_pipe_ctx_sync_logic)
1571 check_syncd_pipes_for_disabled_master_pipe(dc, context, pipe_ctx->pipe_idx);
1572
1569#if defined(CONFIG_DRM_AMD_DC_DCN)1573#if defined(CONFIG_DRM_AMD_DC_DCN)
1570 /* DCN3.1 FPGA Workaround1574 /* DCN3.1 FPGA Workaround
1571 * Need to enable HPO DP Stream Encoder before setting OTG master enable.1575 * Need to enable HPO DP Stream Encoder before setting OTG master enable.
@@ -1604,11 +1608,6 @@ static enum dc_status apply_single_controller_ctx_to_hw( · 32 unmodified lines
1604 pipe_ctx->stream_res.stream_enc,1608 pipe_ctx->stream_res.stream_enc,
1605 pipe_ctx->stream_res.tg->inst);1609 pipe_ctx->stream_res.tg->inst);
1606 1610
1607 if (dc_is_dp_signal(pipe_ctx->stream->signal) &&
1608 pipe_ctx->stream_res.stream_enc->funcs->reset_fifo)
1609 pipe_ctx->stream_res.stream_enc->funcs->reset_fifo(
1610 pipe_ctx->stream_res.stream_enc);
1611
1612 if (dc_is_dp_signal(pipe_ctx->stream->signal))1611 if (dc_is_dp_signal(pipe_ctx->stream->signal))
1613 dp_source_sequence_trace(link, DPCD_SOURCE_SEQ_AFTER_CONNECT_DIG_FE_OTG);1612 dp_source_sequence_trace(link, DPCD_SOURCE_SEQ_AFTER_CONNECT_DIG_FE_OTG);
1614 1613
@@ -1835,9 +1834,29 @@ void dce110_enable_accelerated_mode(struct dc *dc, struct dc_state *context) · 220 unmodified lines
1835 break;1834 break;
1836 }1835 }
1837 }1836 }
1838 // We are trying to enable eDP, don't power down VDD1837
1839 if (can_apply_edp_fast_boot)1838 /*
1839 * TO-DO: So far the code logic below only addresses single eDP case.
1840 * For dual eDP case, there are a few things that need to be
1841 * implemented first:
1842 *
1843 * 1. Change the fastboot logic above, so eDP link[0 or 1]'s
1844 * stream[0 or 1] will all be checked.
1845 *
1846 * 2. Change keep_edp_vdd_on to an array, and maintain keep_edp_vdd_on
1847 * for each eDP.
1848 *
1849 * Once above 2 things are completed, we can then change the logic below
1850 * correspondingly, so dual eDP case will be fully covered.
1851 */
1852
1853 // We are trying to enable eDP, don't power down VDD if eDP stream is existing
1854 if ((edp_stream_num == 1 && edp_streams[0] != NULL) || can_apply_edp_fast_boot) {
1840 keep_edp_vdd_on = true;1855 keep_edp_vdd_on = true;
1856 DC_LOG_EVENT_LINK_TRAINING("Keep eDP Vdd on\n");
1857 } else {
1858 DC_LOG_EVENT_LINK_TRAINING("No eDP stream enabled, turn eDP Vdd off\n");
1859 }
1841 }1860 }
1842 1861
1843 // Check seamless boot support1862 // Check seamless boot support
@@ -2297,6 +2316,10 @@ enum dc_status dce110_apply_ctx_to_hw( · 453 unmodified lines
2297 enum dc_status status;2316 enum dc_status status;
2298 int i;2317 int i;
2299 2318
2319 /* reset syncd pipes from disabled pipes */
2320 if (dc->config.use_pipe_ctx_sync_logic)
2321 reset_syncd_pipes_from_disabled_pipes(dc, context);
2322
2300 /* Reset old context */2323 /* Reset old context */
2301 /* look up the targets that have been removed since last commit */2324 /* look up the targets that have been removed since last commit */
2302 hws->funcs.reset_hw_ctx_wrap(dc, context);2325 hws->funcs.reset_hw_ctx_wrap(dc, context);
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c+0−15
@@ -902,19 +902,6 @@ void enc1_stream_encoder_stop_dp_info_packets( · 901 unmodified lines
902 902
903}903}
904 904
905void enc1_stream_encoder_reset_fifo(
906 struct stream_encoder *enc)
907{
908 struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc);
909
910 /* set DIG_START to 0x1 to reset FIFO */
911 REG_UPDATE(DIG_FE_CNTL, DIG_START, 1);
912 udelay(100);
913
914 /* write 0 to take the FIFO out of reset */
915 REG_UPDATE(DIG_FE_CNTL, DIG_START, 0);
916}
917
918void enc1_stream_encoder_dp_blank(905void enc1_stream_encoder_dp_blank(
919 struct dc_link *link,906 struct dc_link *link,
920 struct stream_encoder *enc)907 struct stream_encoder *enc)
@@ -1600,8 +1587,6 @@ static const struct stream_encoder_funcs dcn10_str_enc_funcs = { · 679 unmodified lines
1600 enc1_stream_encoder_send_immediate_sdp_message,1587 enc1_stream_encoder_send_immediate_sdp_message,
1601 .stop_dp_info_packets =1588 .stop_dp_info_packets =
1602 enc1_stream_encoder_stop_dp_info_packets,1589 enc1_stream_encoder_stop_dp_info_packets,
1603 .reset_fifo =
1604 enc1_stream_encoder_reset_fifo,
1605 .dp_blank =1590 .dp_blank =
1606 enc1_stream_encoder_dp_blank,1591 enc1_stream_encoder_dp_blank,
1607 .dp_unblank =1592 .dp_unblank =
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h+0−3
@@ -626,9 +626,6 @@ void enc1_stream_encoder_send_immediate_sdp_message( · 625 unmodified lines
626void enc1_stream_encoder_stop_dp_info_packets(626void enc1_stream_encoder_stop_dp_info_packets(
627 struct stream_encoder *enc);627 struct stream_encoder *enc);
628 628
629void enc1_stream_encoder_reset_fifo(
630 struct stream_encoder *enc);
631
632void enc1_stream_encoder_dp_blank(629void enc1_stream_encoder_dp_blank(
633 struct dc_link *link,630 struct dc_link *link,
634 struct stream_encoder *enc);631 struct stream_encoder *enc);
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c+1−1
@@ -1069,7 +1069,7 @@ static const struct dc_debug_options debug_defaults_drv = { · 1068 unmodified lines
1069 .timing_trace = false,1069 .timing_trace = false,
1070 .clock_trace = true,1070 .clock_trace = true,
1071 .disable_pplib_clock_request = true,1071 .disable_pplib_clock_request = true,
1072 .pipe_split_policy = MPC_SPLIT_DYNAMIC,1072 .pipe_split_policy = MPC_SPLIT_AVOID_MULT_DISP,
1073 .force_single_disp_pipe_split = false,1073 .force_single_disp_pipe_split = false,
1074 .disable_dcc = DCC_ENABLE,1074 .disable_dcc = DCC_ENABLE,
1075 .vsr_support = true,1075 .vsr_support = true,
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c+0−2
@@ -593,8 +593,6 @@ static const struct stream_encoder_funcs dcn20_str_enc_funcs = { · 592 unmodified lines
593 enc1_stream_encoder_send_immediate_sdp_message,593 enc1_stream_encoder_send_immediate_sdp_message,
594 .stop_dp_info_packets =594 .stop_dp_info_packets =
595 enc1_stream_encoder_stop_dp_info_packets,595 enc1_stream_encoder_stop_dp_info_packets,
596 .reset_fifo =
597 enc1_stream_encoder_reset_fifo,
598 .dp_blank =596 .dp_blank =
599 enc1_stream_encoder_dp_blank,597 enc1_stream_encoder_dp_blank,
600 .dp_unblank =598 .dp_unblank =
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dio_stream_encoder.c+0−2
@@ -789,8 +789,6 @@ static const struct stream_encoder_funcs dcn30_str_enc_funcs = { · 788 unmodified lines
789 enc3_stream_encoder_update_dp_info_packets,789 enc3_stream_encoder_update_dp_info_packets,
790 .stop_dp_info_packets =790 .stop_dp_info_packets =
791 enc1_stream_encoder_stop_dp_info_packets,791 enc1_stream_encoder_stop_dp_info_packets,
792 .reset_fifo =
793 enc1_stream_encoder_reset_fifo,
794 .dp_blank =792 .dp_blank =
795 enc1_stream_encoder_dp_blank,793 enc1_stream_encoder_dp_blank,
796 .dp_unblank =794 .dp_unblank =
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c+2−2
@@ -1878,7 +1878,6 @@ noinline bool dcn30_internal_validate_bw( · 1877 unmodified lines
1878 dc->res_pool->funcs->update_soc_for_wm_a(dc, context);1878 dc->res_pool->funcs->update_soc_for_wm_a(dc, context);
1879 pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc, context, pipes, fast_validate);1879 pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc, context, pipes, fast_validate);
1880 1880
1881 DC_FP_START();
1882 if (!pipe_cnt) {1881 if (!pipe_cnt) {
1883 out = true;1882 out = true;
1884 goto validate_out;1883 goto validate_out;
@@ -2104,7 +2103,6 @@ validate_fail: · 219 unmodified lines
2104 out = false;2103 out = false;
2105 2104
2106validate_out:2105validate_out:
2107 DC_FP_END();
2108 return out;2106 return out;
2109}2107}
2110 2108
@@ -2306,7 +2304,9 @@ bool dcn30_validate_bandwidth(struct dc *dc, · 195 unmodified lines
2306 2304
2307 BW_VAL_TRACE_COUNT();2305 BW_VAL_TRACE_COUNT();
2308 2306
2307 DC_FP_START();
2309 out = dcn30_internal_validate_bw(dc, context, pipes, &pipe_cnt, &vlevel, fast_validate);2308 out = dcn30_internal_validate_bw(dc, context, pipes, &pipe_cnt, &vlevel, fast_validate);
2309 DC_FP_END();
2310 2310
2311 if (pipe_cnt == 0)2311 if (pipe_cnt == 0)
2312 goto validate_out;2312 goto validate_out;
drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c+12−1
@@ -686,7 +686,7 @@ static const struct dc_debug_options debug_defaults_drv = { · 685 unmodified lines
686 .disable_clock_gate = true,686 .disable_clock_gate = true,
687 .disable_pplib_clock_request = true,687 .disable_pplib_clock_request = true,
688 .disable_pplib_wm_range = true,688 .disable_pplib_wm_range = true,
689 .pipe_split_policy = MPC_SPLIT_DYNAMIC,689 .pipe_split_policy = MPC_SPLIT_AVOID,
690 .force_single_disp_pipe_split = false,690 .force_single_disp_pipe_split = false,
691 .disable_dcc = DCC_ENABLE,691 .disable_dcc = DCC_ENABLE,
692 .vsr_support = true,692 .vsr_support = true,
@@ -1380,6 +1380,17 @@ static void set_wm_ranges( · 687 unmodified lines
1380 pp_smu->nv_funcs.set_wm_ranges(&pp_smu->nv_funcs.pp_smu, &ranges);1380 pp_smu->nv_funcs.set_wm_ranges(&pp_smu->nv_funcs.pp_smu, &ranges);
1381}1381}
1382 1382
1383static void dcn301_calculate_wm_and_dlg(
1384 struct dc *dc, struct dc_state *context,
1385 display_e2e_pipe_params_st *pipes,
1386 int pipe_cnt,
1387 int vlevel)
1388{
1389 DC_FP_START();
1390 dcn301_calculate_wm_and_dlg_fp(dc, context, pipes, pipe_cnt, vlevel);
1391 DC_FP_END();
1392}
1393
1383static struct resource_funcs dcn301_res_pool_funcs = {1394static struct resource_funcs dcn301_res_pool_funcs = {
1384 .destroy = dcn301_destroy_resource_pool,1395 .destroy = dcn301_destroy_resource_pool,
1385 .link_enc_create = dcn301_link_encoder_create,1396 .link_enc_create = dcn301_link_encoder_create,
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hubbub.c+32−29
@@ -138,8 +138,11 @@ static uint32_t convert_and_clamp( · 137 unmodified lines
138 ret_val = wm_ns * refclk_mhz;138 ret_val = wm_ns * refclk_mhz;
139 ret_val /= 1000;139 ret_val /= 1000;
140 140
141 if (ret_val > clamp_value)141 if (ret_val > clamp_value) {
142 /* clamping WMs is abnormal, unexpected and may lead to underflow*/
143 ASSERT(0);
142 ret_val = clamp_value;144 ret_val = clamp_value;
145 }
143 146
144 return ret_val;147 return ret_val;
145}148}
@@ -159,7 +162,7 @@ static bool hubbub31_program_urgent_watermarks( · 13 unmodified lines
159 if (safe_to_lower || watermarks->a.urgent_ns > hubbub2->watermarks.a.urgent_ns) {162 if (safe_to_lower || watermarks->a.urgent_ns > hubbub2->watermarks.a.urgent_ns) {
160 hubbub2->watermarks.a.urgent_ns = watermarks->a.urgent_ns;163 hubbub2->watermarks.a.urgent_ns = watermarks->a.urgent_ns;
161 prog_wm_value = convert_and_clamp(watermarks->a.urgent_ns,164 prog_wm_value = convert_and_clamp(watermarks->a.urgent_ns,
162 refclk_mhz, 0x1fffff);165 refclk_mhz, 0x3fff);
163 REG_SET(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A, 0,166 REG_SET(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A, 0,
164 DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A, prog_wm_value);167 DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A, prog_wm_value);
165 168
@@ -193,7 +196,7 @@ static bool hubbub31_program_urgent_watermarks( · 27 unmodified lines
193 if (safe_to_lower || watermarks->a.urgent_latency_ns > hubbub2->watermarks.a.urgent_latency_ns) {196 if (safe_to_lower || watermarks->a.urgent_latency_ns > hubbub2->watermarks.a.urgent_latency_ns) {
194 hubbub2->watermarks.a.urgent_latency_ns = watermarks->a.urgent_latency_ns;197 hubbub2->watermarks.a.urgent_latency_ns = watermarks->a.urgent_latency_ns;
195 prog_wm_value = convert_and_clamp(watermarks->a.urgent_latency_ns,198 prog_wm_value = convert_and_clamp(watermarks->a.urgent_latency_ns,
196 refclk_mhz, 0x1fffff);199 refclk_mhz, 0x3fff);
197 REG_SET(DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_A, 0,200 REG_SET(DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_A, 0,
198 DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_A, prog_wm_value);201 DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_A, prog_wm_value);
199 } else if (watermarks->a.urgent_latency_ns < hubbub2->watermarks.a.urgent_latency_ns)202 } else if (watermarks->a.urgent_latency_ns < hubbub2->watermarks.a.urgent_latency_ns)
@@ -203,7 +206,7 @@ static bool hubbub31_program_urgent_watermarks( · 3 unmodified lines
203 if (safe_to_lower || watermarks->b.urgent_ns > hubbub2->watermarks.b.urgent_ns) {206 if (safe_to_lower || watermarks->b.urgent_ns > hubbub2->watermarks.b.urgent_ns) {
204 hubbub2->watermarks.b.urgent_ns = watermarks->b.urgent_ns;207 hubbub2->watermarks.b.urgent_ns = watermarks->b.urgent_ns;
205 prog_wm_value = convert_and_clamp(watermarks->b.urgent_ns,208 prog_wm_value = convert_and_clamp(watermarks->b.urgent_ns,
206 refclk_mhz, 0x1fffff);209 refclk_mhz, 0x3fff);
207 REG_SET(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B, 0,210 REG_SET(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B, 0,
208 DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B, prog_wm_value);211 DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B, prog_wm_value);
209 212
@@ -237,7 +240,7 @@ static bool hubbub31_program_urgent_watermarks( · 27 unmodified lines
237 if (safe_to_lower || watermarks->b.urgent_latency_ns > hubbub2->watermarks.b.urgent_latency_ns) {240 if (safe_to_lower || watermarks->b.urgent_latency_ns > hubbub2->watermarks.b.urgent_latency_ns) {
238 hubbub2->watermarks.b.urgent_latency_ns = watermarks->b.urgent_latency_ns;241 hubbub2->watermarks.b.urgent_latency_ns = watermarks->b.urgent_latency_ns;
239 prog_wm_value = convert_and_clamp(watermarks->b.urgent_latency_ns,242 prog_wm_value = convert_and_clamp(watermarks->b.urgent_latency_ns,
240 refclk_mhz, 0x1fffff);243 refclk_mhz, 0x3fff);
241 REG_SET(DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_B, 0,244 REG_SET(DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_B, 0,
242 DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_B, prog_wm_value);245 DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_B, prog_wm_value);
243 } else if (watermarks->b.urgent_latency_ns < hubbub2->watermarks.b.urgent_latency_ns)246 } else if (watermarks->b.urgent_latency_ns < hubbub2->watermarks.b.urgent_latency_ns)
@@ -247,7 +250,7 @@ static bool hubbub31_program_urgent_watermarks( · 3 unmodified lines
247 if (safe_to_lower || watermarks->c.urgent_ns > hubbub2->watermarks.c.urgent_ns) {250 if (safe_to_lower || watermarks->c.urgent_ns > hubbub2->watermarks.c.urgent_ns) {
248 hubbub2->watermarks.c.urgent_ns = watermarks->c.urgent_ns;251 hubbub2->watermarks.c.urgent_ns = watermarks->c.urgent_ns;
249 prog_wm_value = convert_and_clamp(watermarks->c.urgent_ns,252 prog_wm_value = convert_and_clamp(watermarks->c.urgent_ns,
250 refclk_mhz, 0x1fffff);253 refclk_mhz, 0x3fff);
251 REG_SET(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C, 0,254 REG_SET(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C, 0,
252 DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C, prog_wm_value);255 DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C, prog_wm_value);
253 256
@@ -281,7 +284,7 @@ static bool hubbub31_program_urgent_watermarks( · 27 unmodified lines
281 if (safe_to_lower || watermarks->c.urgent_latency_ns > hubbub2->watermarks.c.urgent_latency_ns) {284 if (safe_to_lower || watermarks->c.urgent_latency_ns > hubbub2->watermarks.c.urgent_latency_ns) {
282 hubbub2->watermarks.c.urgent_latency_ns = watermarks->c.urgent_latency_ns;285 hubbub2->watermarks.c.urgent_latency_ns = watermarks->c.urgent_latency_ns;
283 prog_wm_value = convert_and_clamp(watermarks->c.urgent_latency_ns,286 prog_wm_value = convert_and_clamp(watermarks->c.urgent_latency_ns,
284 refclk_mhz, 0x1fffff);287 refclk_mhz, 0x3fff);
285 REG_SET(DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_C, 0,288 REG_SET(DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_C, 0,
286 DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_C, prog_wm_value);289 DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_C, prog_wm_value);
287 } else if (watermarks->c.urgent_latency_ns < hubbub2->watermarks.c.urgent_latency_ns)290 } else if (watermarks->c.urgent_latency_ns < hubbub2->watermarks.c.urgent_latency_ns)
@@ -291,7 +294,7 @@ static bool hubbub31_program_urgent_watermarks( · 3 unmodified lines
291 if (safe_to_lower || watermarks->d.urgent_ns > hubbub2->watermarks.d.urgent_ns) {294 if (safe_to_lower || watermarks->d.urgent_ns > hubbub2->watermarks.d.urgent_ns) {
292 hubbub2->watermarks.d.urgent_ns = watermarks->d.urgent_ns;295 hubbub2->watermarks.d.urgent_ns = watermarks->d.urgent_ns;
293 prog_wm_value = convert_and_clamp(watermarks->d.urgent_ns,296 prog_wm_value = convert_and_clamp(watermarks->d.urgent_ns,
294 refclk_mhz, 0x1fffff);297 refclk_mhz, 0x3fff);
295 REG_SET(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D, 0,298 REG_SET(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D, 0,
296 DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D, prog_wm_value);299 DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D, prog_wm_value);
297 300
@@ -325,7 +328,7 @@ static bool hubbub31_program_urgent_watermarks( · 27 unmodified lines
325 if (safe_to_lower || watermarks->d.urgent_latency_ns > hubbub2->watermarks.d.urgent_latency_ns) {328 if (safe_to_lower || watermarks->d.urgent_latency_ns > hubbub2->watermarks.d.urgent_latency_ns) {
326 hubbub2->watermarks.d.urgent_latency_ns = watermarks->d.urgent_latency_ns;329 hubbub2->watermarks.d.urgent_latency_ns = watermarks->d.urgent_latency_ns;
327 prog_wm_value = convert_and_clamp(watermarks->d.urgent_latency_ns,330 prog_wm_value = convert_and_clamp(watermarks->d.urgent_latency_ns,
328 refclk_mhz, 0x1fffff);331 refclk_mhz, 0x3fff);
329 REG_SET(DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_D, 0,332 REG_SET(DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_D, 0,
330 DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_D, prog_wm_value);333 DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_D, prog_wm_value);
331 } else if (watermarks->d.urgent_latency_ns < hubbub2->watermarks.d.urgent_latency_ns)334 } else if (watermarks->d.urgent_latency_ns < hubbub2->watermarks.d.urgent_latency_ns)
@@ -351,7 +354,7 @@ static bool hubbub31_program_stutter_watermarks( · 19 unmodified lines
351 watermarks->a.cstate_pstate.cstate_enter_plus_exit_ns;354 watermarks->a.cstate_pstate.cstate_enter_plus_exit_ns;
352 prog_wm_value = convert_and_clamp(355 prog_wm_value = convert_and_clamp(
353 watermarks->a.cstate_pstate.cstate_enter_plus_exit_ns,356 watermarks->a.cstate_pstate.cstate_enter_plus_exit_ns,
354 refclk_mhz, 0x1fffff);357 refclk_mhz, 0xffff);
355 REG_SET(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A, 0,358 REG_SET(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A, 0,
356 DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A, prog_wm_value);359 DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A, prog_wm_value);
357 DC_LOG_BANDWIDTH_CALCS("SR_ENTER_EXIT_WATERMARK_A calculated =%d\n"360 DC_LOG_BANDWIDTH_CALCS("SR_ENTER_EXIT_WATERMARK_A calculated =%d\n"
@@ -367,7 +370,7 @@ static bool hubbub31_program_stutter_watermarks( · 9 unmodified lines
367 watermarks->a.cstate_pstate.cstate_exit_ns;370 watermarks->a.cstate_pstate.cstate_exit_ns;
368 prog_wm_value = convert_and_clamp(371 prog_wm_value = convert_and_clamp(
369 watermarks->a.cstate_pstate.cstate_exit_ns,372 watermarks->a.cstate_pstate.cstate_exit_ns,
370 refclk_mhz, 0x1fffff);373 refclk_mhz, 0xffff);
371 REG_SET(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_A, 0,374 REG_SET(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_A, 0,
372 DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_A, prog_wm_value);375 DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_A, prog_wm_value);
373 DC_LOG_BANDWIDTH_CALCS("SR_EXIT_WATERMARK_A calculated =%d\n"376 DC_LOG_BANDWIDTH_CALCS("SR_EXIT_WATERMARK_A calculated =%d\n"
@@ -383,7 +386,7 @@ static bool hubbub31_program_stutter_watermarks( · 9 unmodified lines
383 watermarks->a.cstate_pstate.cstate_enter_plus_exit_z8_ns;386 watermarks->a.cstate_pstate.cstate_enter_plus_exit_z8_ns;
384 prog_wm_value = convert_and_clamp(387 prog_wm_value = convert_and_clamp(
385 watermarks->a.cstate_pstate.cstate_enter_plus_exit_z8_ns,388 watermarks->a.cstate_pstate.cstate_enter_plus_exit_z8_ns,
386 refclk_mhz, 0x1fffff);389 refclk_mhz, 0xffff);
387 REG_SET(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_A, 0,390 REG_SET(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_A, 0,
388 DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_A, prog_wm_value);391 DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_A, prog_wm_value);
389 DC_LOG_BANDWIDTH_CALCS("SR_ENTER_WATERMARK_Z8_A calculated =%d\n"392 DC_LOG_BANDWIDTH_CALCS("SR_ENTER_WATERMARK_Z8_A calculated =%d\n"
@@ -399,7 +402,7 @@ static bool hubbub31_program_stutter_watermarks( · 9 unmodified lines
399 watermarks->a.cstate_pstate.cstate_exit_z8_ns;402 watermarks->a.cstate_pstate.cstate_exit_z8_ns;
400 prog_wm_value = convert_and_clamp(403 prog_wm_value = convert_and_clamp(
401 watermarks->a.cstate_pstate.cstate_exit_z8_ns,404 watermarks->a.cstate_pstate.cstate_exit_z8_ns,
402 refclk_mhz, 0x1fffff);405 refclk_mhz, 0xffff);
403 REG_SET(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_A, 0,406 REG_SET(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_A, 0,
404 DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_A, prog_wm_value);407 DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_A, prog_wm_value);
405 DC_LOG_BANDWIDTH_CALCS("SR_EXIT_WATERMARK_Z8_A calculated =%d\n"408 DC_LOG_BANDWIDTH_CALCS("SR_EXIT_WATERMARK_Z8_A calculated =%d\n"
@@ -416,7 +419,7 @@ static bool hubbub31_program_stutter_watermarks( · 10 unmodified lines
416 watermarks->b.cstate_pstate.cstate_enter_plus_exit_ns;419 watermarks->b.cstate_pstate.cstate_enter_plus_exit_ns;
417 prog_wm_value = convert_and_clamp(420 prog_wm_value = convert_and_clamp(
418 watermarks->b.cstate_pstate.cstate_enter_plus_exit_ns,421 watermarks->b.cstate_pstate.cstate_enter_plus_exit_ns,
419 refclk_mhz, 0x1fffff);422 refclk_mhz, 0xffff);
420 REG_SET(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B, 0,423 REG_SET(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B, 0,
421 DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B, prog_wm_value);424 DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B, prog_wm_value);
422 DC_LOG_BANDWIDTH_CALCS("SR_ENTER_EXIT_WATERMARK_B calculated =%d\n"425 DC_LOG_BANDWIDTH_CALCS("SR_ENTER_EXIT_WATERMARK_B calculated =%d\n"
@@ -432,7 +435,7 @@ static bool hubbub31_program_stutter_watermarks( · 9 unmodified lines
432 watermarks->b.cstate_pstate.cstate_exit_ns;435 watermarks->b.cstate_pstate.cstate_exit_ns;
433 prog_wm_value = convert_and_clamp(436 prog_wm_value = convert_and_clamp(
434 watermarks->b.cstate_pstate.cstate_exit_ns,437 watermarks->b.cstate_pstate.cstate_exit_ns,
435 refclk_mhz, 0x1fffff);438 refclk_mhz, 0xffff);
436 REG_SET(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_B, 0,439 REG_SET(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_B, 0,
437 DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_B, prog_wm_value);440 DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_B, prog_wm_value);
438 DC_LOG_BANDWIDTH_CALCS("SR_EXIT_WATERMARK_B calculated =%d\n"441 DC_LOG_BANDWIDTH_CALCS("SR_EXIT_WATERMARK_B calculated =%d\n"
@@ -448,7 +451,7 @@ static bool hubbub31_program_stutter_watermarks( · 9 unmodified lines
448 watermarks->b.cstate_pstate.cstate_enter_plus_exit_z8_ns;451 watermarks->b.cstate_pstate.cstate_enter_plus_exit_z8_ns;
449 prog_wm_value = convert_and_clamp(452 prog_wm_value = convert_and_clamp(
450 watermarks->b.cstate_pstate.cstate_enter_plus_exit_z8_ns,453 watermarks->b.cstate_pstate.cstate_enter_plus_exit_z8_ns,
451 refclk_mhz, 0x1fffff);454 refclk_mhz, 0xffff);
452 REG_SET(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_B, 0,455 REG_SET(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_B, 0,
453 DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_B, prog_wm_value);456 DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_B, prog_wm_value);
454 DC_LOG_BANDWIDTH_CALCS("SR_ENTER_WATERMARK_Z8_B calculated =%d\n"457 DC_LOG_BANDWIDTH_CALCS("SR_ENTER_WATERMARK_Z8_B calculated =%d\n"
@@ -464,7 +467,7 @@ static bool hubbub31_program_stutter_watermarks( · 9 unmodified lines
464 watermarks->b.cstate_pstate.cstate_exit_z8_ns;467 watermarks->b.cstate_pstate.cstate_exit_z8_ns;
465 prog_wm_value = convert_and_clamp(468 prog_wm_value = convert_and_clamp(
466 watermarks->b.cstate_pstate.cstate_exit_z8_ns,469 watermarks->b.cstate_pstate.cstate_exit_z8_ns,
467 refclk_mhz, 0x1fffff);470 refclk_mhz, 0xffff);
468 REG_SET(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_B, 0,471 REG_SET(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_B, 0,
469 DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_B, prog_wm_value);472 DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_B, prog_wm_value);
470 DC_LOG_BANDWIDTH_CALCS("SR_EXIT_WATERMARK_Z8_B calculated =%d\n"473 DC_LOG_BANDWIDTH_CALCS("SR_EXIT_WATERMARK_Z8_B calculated =%d\n"
@@ -481,7 +484,7 @@ static bool hubbub31_program_stutter_watermarks( · 10 unmodified lines
481 watermarks->c.cstate_pstate.cstate_enter_plus_exit_ns;484 watermarks->c.cstate_pstate.cstate_enter_plus_exit_ns;
482 prog_wm_value = convert_and_clamp(485 prog_wm_value = convert_and_clamp(
483 watermarks->c.cstate_pstate.cstate_enter_plus_exit_ns,486 watermarks->c.cstate_pstate.cstate_enter_plus_exit_ns,
484 refclk_mhz, 0x1fffff);487 refclk_mhz, 0xffff);
485 REG_SET(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C, 0,488 REG_SET(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C, 0,
486 DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C, prog_wm_value);489 DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C, prog_wm_value);
487 DC_LOG_BANDWIDTH_CALCS("SR_ENTER_EXIT_WATERMARK_C calculated =%d\n"490 DC_LOG_BANDWIDTH_CALCS("SR_ENTER_EXIT_WATERMARK_C calculated =%d\n"
@@ -497,7 +500,7 @@ static bool hubbub31_program_stutter_watermarks( · 9 unmodified lines
497 watermarks->c.cstate_pstate.cstate_exit_ns;500 watermarks->c.cstate_pstate.cstate_exit_ns;
498 prog_wm_value = convert_and_clamp(501 prog_wm_value = convert_and_clamp(
499 watermarks->c.cstate_pstate.cstate_exit_ns,502 watermarks->c.cstate_pstate.cstate_exit_ns,
500 refclk_mhz, 0x1fffff);503 refclk_mhz, 0xffff);
501 REG_SET(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_C, 0,504 REG_SET(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_C, 0,
502 DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_C, prog_wm_value);505 DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_C, prog_wm_value);
503 DC_LOG_BANDWIDTH_CALCS("SR_EXIT_WATERMARK_C calculated =%d\n"506 DC_LOG_BANDWIDTH_CALCS("SR_EXIT_WATERMARK_C calculated =%d\n"
@@ -513,7 +516,7 @@ static bool hubbub31_program_stutter_watermarks( · 9 unmodified lines
513 watermarks->c.cstate_pstate.cstate_enter_plus_exit_z8_ns;516 watermarks->c.cstate_pstate.cstate_enter_plus_exit_z8_ns;
514 prog_wm_value = convert_and_clamp(517 prog_wm_value = convert_and_clamp(
515 watermarks->c.cstate_pstate.cstate_enter_plus_exit_z8_ns,518 watermarks->c.cstate_pstate.cstate_enter_plus_exit_z8_ns,
516 refclk_mhz, 0x1fffff);519 refclk_mhz, 0xffff);
517 REG_SET(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_C, 0,520 REG_SET(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_C, 0,
518 DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_C, prog_wm_value);521 DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_C, prog_wm_value);
519 DC_LOG_BANDWIDTH_CALCS("SR_ENTER_WATERMARK_Z8_C calculated =%d\n"522 DC_LOG_BANDWIDTH_CALCS("SR_ENTER_WATERMARK_Z8_C calculated =%d\n"
@@ -529,7 +532,7 @@ static bool hubbub31_program_stutter_watermarks( · 9 unmodified lines
529 watermarks->c.cstate_pstate.cstate_exit_z8_ns;532 watermarks->c.cstate_pstate.cstate_exit_z8_ns;
530 prog_wm_value = convert_and_clamp(533 prog_wm_value = convert_and_clamp(
531 watermarks->c.cstate_pstate.cstate_exit_z8_ns,534 watermarks->c.cstate_pstate.cstate_exit_z8_ns,
532 refclk_mhz, 0x1fffff);535 refclk_mhz, 0xffff);
533 REG_SET(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_C, 0,536 REG_SET(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_C, 0,
534 DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_C, prog_wm_value);537 DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_C, prog_wm_value);
535 DC_LOG_BANDWIDTH_CALCS("SR_EXIT_WATERMARK_Z8_C calculated =%d\n"538 DC_LOG_BANDWIDTH_CALCS("SR_EXIT_WATERMARK_Z8_C calculated =%d\n"
@@ -546,7 +549,7 @@ static bool hubbub31_program_stutter_watermarks( · 10 unmodified lines
546 watermarks->d.cstate_pstate.cstate_enter_plus_exit_ns;549 watermarks->d.cstate_pstate.cstate_enter_plus_exit_ns;
547 prog_wm_value = convert_and_clamp(550 prog_wm_value = convert_and_clamp(
548 watermarks->d.cstate_pstate.cstate_enter_plus_exit_ns,551 watermarks->d.cstate_pstate.cstate_enter_plus_exit_ns,
549 refclk_mhz, 0x1fffff);552 refclk_mhz, 0xffff);
550 REG_SET(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D, 0,553 REG_SET(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D, 0,
551 DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D, prog_wm_value);554 DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D, prog_wm_value);
552 DC_LOG_BANDWIDTH_CALCS("SR_ENTER_EXIT_WATERMARK_D calculated =%d\n"555 DC_LOG_BANDWIDTH_CALCS("SR_ENTER_EXIT_WATERMARK_D calculated =%d\n"
@@ -562,7 +565,7 @@ static bool hubbub31_program_stutter_watermarks( · 9 unmodified lines
562 watermarks->d.cstate_pstate.cstate_exit_ns;565 watermarks->d.cstate_pstate.cstate_exit_ns;
563 prog_wm_value = convert_and_clamp(566 prog_wm_value = convert_and_clamp(
564 watermarks->d.cstate_pstate.cstate_exit_ns,567 watermarks->d.cstate_pstate.cstate_exit_ns,
565 refclk_mhz, 0x1fffff);568 refclk_mhz, 0xffff);
566 REG_SET(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_D, 0,569 REG_SET(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_D, 0,
567 DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_D, prog_wm_value);570 DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_D, prog_wm_value);
568 DC_LOG_BANDWIDTH_CALCS("SR_EXIT_WATERMARK_D calculated =%d\n"571 DC_LOG_BANDWIDTH_CALCS("SR_EXIT_WATERMARK_D calculated =%d\n"
@@ -578,7 +581,7 @@ static bool hubbub31_program_stutter_watermarks( · 9 unmodified lines
578 watermarks->d.cstate_pstate.cstate_enter_plus_exit_z8_ns;581 watermarks->d.cstate_pstate.cstate_enter_plus_exit_z8_ns;
579 prog_wm_value = convert_and_clamp(582 prog_wm_value = convert_and_clamp(
580 watermarks->d.cstate_pstate.cstate_enter_plus_exit_z8_ns,583 watermarks->d.cstate_pstate.cstate_enter_plus_exit_z8_ns,
581 refclk_mhz, 0x1fffff);584 refclk_mhz, 0xffff);
582 REG_SET(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_D, 0,585 REG_SET(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_D, 0,
583 DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_D, prog_wm_value);586 DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_D, prog_wm_value);
584 DC_LOG_BANDWIDTH_CALCS("SR_ENTER_WATERMARK_Z8_D calculated =%d\n"587 DC_LOG_BANDWIDTH_CALCS("SR_ENTER_WATERMARK_Z8_D calculated =%d\n"
@@ -594,7 +597,7 @@ static bool hubbub31_program_stutter_watermarks( · 9 unmodified lines
594 watermarks->d.cstate_pstate.cstate_exit_z8_ns;597 watermarks->d.cstate_pstate.cstate_exit_z8_ns;
595 prog_wm_value = convert_and_clamp(598 prog_wm_value = convert_and_clamp(
596 watermarks->d.cstate_pstate.cstate_exit_z8_ns,599 watermarks->d.cstate_pstate.cstate_exit_z8_ns,
597 refclk_mhz, 0x1fffff);600 refclk_mhz, 0xffff);
598 REG_SET(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_D, 0,601 REG_SET(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_D, 0,
599 DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_D, prog_wm_value);602 DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_D, prog_wm_value);
600 DC_LOG_BANDWIDTH_CALCS("SR_EXIT_WATERMARK_Z8_D calculated =%d\n"603 DC_LOG_BANDWIDTH_CALCS("SR_EXIT_WATERMARK_Z8_D calculated =%d\n"
@@ -625,7 +628,7 @@ static bool hubbub31_program_pstate_watermarks( · 24 unmodified lines
625 watermarks->a.cstate_pstate.pstate_change_ns;628 watermarks->a.cstate_pstate.pstate_change_ns;
626 prog_wm_value = convert_and_clamp(629 prog_wm_value = convert_and_clamp(
627 watermarks->a.cstate_pstate.pstate_change_ns,630 watermarks->a.cstate_pstate.pstate_change_ns,
628 refclk_mhz, 0x1fffff);631 refclk_mhz, 0xffff);
629 REG_SET(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A, 0,632 REG_SET(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A, 0,
630 DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A, prog_wm_value);633 DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A, prog_wm_value);
631 DC_LOG_BANDWIDTH_CALCS("DRAM_CLK_CHANGE_WATERMARK_A calculated =%d\n"634 DC_LOG_BANDWIDTH_CALCS("DRAM_CLK_CHANGE_WATERMARK_A calculated =%d\n"
@@ -642,7 +645,7 @@ static bool hubbub31_program_pstate_watermarks( · 10 unmodified lines
642 watermarks->b.cstate_pstate.pstate_change_ns;645 watermarks->b.cstate_pstate.pstate_change_ns;
643 prog_wm_value = convert_and_clamp(646 prog_wm_value = convert_and_clamp(
644 watermarks->b.cstate_pstate.pstate_change_ns,647 watermarks->b.cstate_pstate.pstate_change_ns,
645 refclk_mhz, 0x1fffff);648 refclk_mhz, 0xffff);
646 REG_SET(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B, 0,649 REG_SET(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B, 0,
647 DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B, prog_wm_value);650 DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B, prog_wm_value);
648 DC_LOG_BANDWIDTH_CALCS("DRAM_CLK_CHANGE_WATERMARK_B calculated =%d\n"651 DC_LOG_BANDWIDTH_CALCS("DRAM_CLK_CHANGE_WATERMARK_B calculated =%d\n"
@@ -659,7 +662,7 @@ static bool hubbub31_program_pstate_watermarks( · 10 unmodified lines
659 watermarks->c.cstate_pstate.pstate_change_ns;662 watermarks->c.cstate_pstate.pstate_change_ns;
660 prog_wm_value = convert_and_clamp(663 prog_wm_value = convert_and_clamp(
661 watermarks->c.cstate_pstate.pstate_change_ns,664 watermarks->c.cstate_pstate.pstate_change_ns,
662 refclk_mhz, 0x1fffff);665 refclk_mhz, 0xffff);
663 REG_SET(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C, 0,666 REG_SET(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C, 0,
664 DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C, prog_wm_value);667 DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C, prog_wm_value);
665 DC_LOG_BANDWIDTH_CALCS("DRAM_CLK_CHANGE_WATERMARK_C calculated =%d\n"668 DC_LOG_BANDWIDTH_CALCS("DRAM_CLK_CHANGE_WATERMARK_C calculated =%d\n"
@@ -676,7 +679,7 @@ static bool hubbub31_program_pstate_watermarks( · 10 unmodified lines
676 watermarks->d.cstate_pstate.pstate_change_ns;679 watermarks->d.cstate_pstate.pstate_change_ns;
677 prog_wm_value = convert_and_clamp(680 prog_wm_value = convert_and_clamp(
678 watermarks->d.cstate_pstate.pstate_change_ns,681 watermarks->d.cstate_pstate.pstate_change_ns,
679 refclk_mhz, 0x1fffff);682 refclk_mhz, 0xffff);
680 REG_SET(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D, 0,683 REG_SET(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D, 0,
681 DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D, prog_wm_value);684 DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D, prog_wm_value);
682 DC_LOG_BANDWIDTH_CALCS("DRAM_CLK_CHANGE_WATERMARK_D calculated =%d\n"685 DC_LOG_BANDWIDTH_CALCS("DRAM_CLK_CHANGE_WATERMARK_D calculated =%d\n"
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c+3−0
@@ -2260,6 +2260,9 @@ static bool dcn31_resource_construct( · 2259 unmodified lines
2260 dc->caps.color.mpc.ogam_rom_caps.hlg = 0;2260 dc->caps.color.mpc.ogam_rom_caps.hlg = 0;
2261 dc->caps.color.mpc.ocsc = 1;2261 dc->caps.color.mpc.ocsc = 1;
2262 2262
2263 /* Use pipe context based otg sync logic */
2264 dc->config.use_pipe_ctx_sync_logic = true;
2265
2263 /* read VBIOS LTTPR caps */2266 /* read VBIOS LTTPR caps */
2264 {2267 {
2265 if (ctx->dc_bios->funcs->get_lttpr_caps) {2268 if (ctx->dc_bios->funcs->get_lttpr_caps) {
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c+0−2
@@ -1576,8 +1576,6 @@ void dml20_rq_dlg_get_dlg_reg(struct display_mode_lib *mode_lib, · 1575 unmodified lines
1576 dlg_sys_param.total_flip_bytes = get_total_immediate_flip_bytes(mode_lib,1576 dlg_sys_param.total_flip_bytes = get_total_immediate_flip_bytes(mode_lib,
1577 e2e_pipe_param,1577 e2e_pipe_param,
1578 num_pipes);1578 num_pipes);
1579 dlg_sys_param.t_srx_delay_us = mode_lib->ip.dcfclk_cstate_latency
1580 / dlg_sys_param.deepsleep_dcfclk_mhz; // TODO: Deprecated
1581 1579
1582 print__dlg_sys_params_st(mode_lib, &dlg_sys_param);1580 print__dlg_sys_params_st(mode_lib, &dlg_sys_param);
1583 1581
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c+0−2
@@ -1577,8 +1577,6 @@ void dml20v2_rq_dlg_get_dlg_reg(struct display_mode_lib *mode_lib, · 1576 unmodified lines
1577 dlg_sys_param.total_flip_bytes = get_total_immediate_flip_bytes(mode_lib,1577 dlg_sys_param.total_flip_bytes = get_total_immediate_flip_bytes(mode_lib,
1578 e2e_pipe_param,1578 e2e_pipe_param,
1579 num_pipes);1579 num_pipes);
1580 dlg_sys_param.t_srx_delay_us = mode_lib->ip.dcfclk_cstate_latency
1581 / dlg_sys_param.deepsleep_dcfclk_mhz; // TODO: Deprecated
1582 1580
1583 print__dlg_sys_params_st(mode_lib, &dlg_sys_param);1581 print__dlg_sys_params_st(mode_lib, &dlg_sys_param);
1584 1582
drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c+0−2
@@ -1688,8 +1688,6 @@ void dml21_rq_dlg_get_dlg_reg( · 1687 unmodified lines
1688 mode_lib,1688 mode_lib,
1689 e2e_pipe_param,1689 e2e_pipe_param,
1690 num_pipes);1690 num_pipes);
1691 dlg_sys_param.t_srx_delay_us = mode_lib->ip.dcfclk_cstate_latency
1692 / dlg_sys_param.deepsleep_dcfclk_mhz; // TODO: Deprecated
1693 1691
1694 print__dlg_sys_params_st(mode_lib, &dlg_sys_param);1692 print__dlg_sys_params_st(mode_lib, &dlg_sys_param);
1695 1693
drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c+0−2
@@ -1858,8 +1858,6 @@ void dml30_rq_dlg_get_dlg_reg(struct display_mode_lib *mode_lib, · 1857 unmodified lines
1858 dlg_sys_param.total_flip_bytes = get_total_immediate_flip_bytes(mode_lib,1858 dlg_sys_param.total_flip_bytes = get_total_immediate_flip_bytes(mode_lib,
1859 e2e_pipe_param,1859 e2e_pipe_param,
1860 num_pipes);1860 num_pipes);
1861 dlg_sys_param.t_srx_delay_us = mode_lib->ip.dcfclk_cstate_latency
1862 / dlg_sys_param.deepsleep_dcfclk_mhz; // TODO: Deprecated
1863 1861
1864 print__dlg_sys_params_st(mode_lib, &dlg_sys_param);1862 print__dlg_sys_params_st(mode_lib, &dlg_sys_param);
1865 1863
drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c+1−1
@@ -327,7 +327,7 @@ void dcn301_fpu_init_soc_bounding_box(struct bp_soc_bb_info bb_info) · 326 unmodified lines
327 dcn3_01_soc.sr_exit_time_us = bb_info.dram_sr_exit_latency_100ns * 10;327 dcn3_01_soc.sr_exit_time_us = bb_info.dram_sr_exit_latency_100ns * 10;
328}328}
329 329
330void dcn301_calculate_wm_and_dlg(struct dc *dc,330void dcn301_calculate_wm_and_dlg_fp(struct dc *dc,
331 struct dc_state *context,331 struct dc_state *context,
332 display_e2e_pipe_params_st *pipes,332 display_e2e_pipe_params_st *pipes,
333 int pipe_cnt,333 int pipe_cnt,
drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.h+1−1
@@ -34,7 +34,7 @@ void dcn301_fpu_set_wm_ranges(int i, · 33 unmodified lines
34 34
35void dcn301_fpu_init_soc_bounding_box(struct bp_soc_bb_info bb_info);35void dcn301_fpu_init_soc_bounding_box(struct bp_soc_bb_info bb_info);
36 36
37void dcn301_calculate_wm_and_dlg(struct dc *dc,37void dcn301_calculate_wm_and_dlg_fp(struct dc *dc,
38 struct dc_state *context,38 struct dc_state *context,
39 display_e2e_pipe_params_st *pipes,39 display_e2e_pipe_params_st *pipes,
40 int pipe_cnt,40 int pipe_cnt,
drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h+0−1
@@ -546,7 +546,6 @@ struct _vcs_dpi_display_dlg_sys_params_st { · 545 unmodified lines
546 double t_sr_wm_us;546 double t_sr_wm_us;
547 double t_extra_us;547 double t_extra_us;
548 double mem_trip_us;548 double mem_trip_us;
549 double t_srx_delay_us;
550 double deepsleep_dcfclk_mhz;549 double deepsleep_dcfclk_mhz;
551 double total_flip_bw;550 double total_flip_bw;
552 unsigned int total_flip_bytes;551 unsigned int total_flip_bytes;
drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c+0−3
@@ -141,9 +141,6 @@ void print__dlg_sys_params_st(struct display_mode_lib *mode_lib, const struct _v · 140 unmodified lines
141 dml_print("DML_RQ_DLG_CALC: t_urg_wm_us = %3.2f\n", dlg_sys_param->t_urg_wm_us);141 dml_print("DML_RQ_DLG_CALC: t_urg_wm_us = %3.2f\n", dlg_sys_param->t_urg_wm_us);
142 dml_print("DML_RQ_DLG_CALC: t_sr_wm_us = %3.2f\n", dlg_sys_param->t_sr_wm_us);142 dml_print("DML_RQ_DLG_CALC: t_sr_wm_us = %3.2f\n", dlg_sys_param->t_sr_wm_us);
143 dml_print("DML_RQ_DLG_CALC: t_extra_us = %3.2f\n", dlg_sys_param->t_extra_us);143 dml_print("DML_RQ_DLG_CALC: t_extra_us = %3.2f\n", dlg_sys_param->t_extra_us);
144 dml_print(
145 "DML_RQ_DLG_CALC: t_srx_delay_us = %3.2f\n",
146 dlg_sys_param->t_srx_delay_us);
147 dml_print(144 dml_print(
148 "DML_RQ_DLG_CALC: deepsleep_dcfclk_mhz = %3.2f\n",145 "DML_RQ_DLG_CALC: deepsleep_dcfclk_mhz = %3.2f\n",
149 dlg_sys_param->deepsleep_dcfclk_mhz);146 dlg_sys_param->deepsleep_dcfclk_mhz);
drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c+0−4
@@ -1331,10 +1331,6 @@ void dml1_rq_dlg_get_dlg_params( · 1330 unmodified lines
1331 if (dual_plane)1331 if (dual_plane)
1332 DTRACE("DLG: %s: swath_height_c = %d", __func__, swath_height_c);1332 DTRACE("DLG: %s: swath_height_c = %d", __func__, swath_height_c);
1333 1333
1334 DTRACE(
1335 "DLG: %s: t_srx_delay_us = %3.2f",
1336 __func__,
1337 (double) dlg_sys_param->t_srx_delay_us);
1338 DTRACE("DLG: %s: line_time_in_us = %3.2f", __func__, (double) line_time_in_us);1334 DTRACE("DLG: %s: line_time_in_us = %3.2f", __func__, (double) line_time_in_us);
1339 DTRACE("DLG: %s: vupdate_offset = %d", __func__, vupdate_offset);1335 DTRACE("DLG: %s: vupdate_offset = %d", __func__, vupdate_offset);
1340 DTRACE("DLG: %s: vupdate_width = %d", __func__, vupdate_width);1336 DTRACE("DLG: %s: vupdate_width = %d", __func__, vupdate_width);
drivers/gpu/drm/amd/display/dc/inc/core_types.h+1−0
@@ -382,6 +382,7 @@ struct pipe_ctx { · 381 unmodified lines
382 struct pll_settings pll_settings;382 struct pll_settings pll_settings;
383 383
384 uint8_t pipe_idx;384 uint8_t pipe_idx;
385 uint8_t pipe_idx_syncd;
385 386
386 struct pipe_ctx *top_pipe;387 struct pipe_ctx *top_pipe;
387 struct pipe_ctx *bottom_pipe;388 struct pipe_ctx *bottom_pipe;
drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h+0−4
@@ -164,10 +164,6 @@ struct stream_encoder_funcs { · 163 unmodified lines
164 void (*stop_dp_info_packets)(164 void (*stop_dp_info_packets)(
165 struct stream_encoder *enc);165 struct stream_encoder *enc);
166 166
167 void (*reset_fifo)(
168 struct stream_encoder *enc
169 );
170
171 void (*dp_blank)(167 void (*dp_blank)(
172 struct dc_link *link,168 struct dc_link *link,
173 struct stream_encoder *enc);169 struct stream_encoder *enc);
drivers/gpu/drm/amd/display/dc/inc/resource.h+11−0
@@ -34,6 +34,10 @@ · 33 unmodified lines
34#define MEMORY_TYPE_HBM 234#define MEMORY_TYPE_HBM 2
35 35
36 36
37#define IS_PIPE_SYNCD_VALID(pipe) ((((pipe)->pipe_idx_syncd) & 0x80)?1:0)
38#define GET_PIPE_SYNCD_FROM_PIPE(pipe) ((pipe)->pipe_idx_syncd & 0x7F)
39#define SET_PIPE_SYNCD_TO_PIPE(pipe, pipe_syncd) ((pipe)->pipe_idx_syncd = (0x80 | pipe_syncd))
40
37enum dce_version resource_parse_asic_id(41enum dce_version resource_parse_asic_id(
38 struct hw_asic_id asic_id);42 struct hw_asic_id asic_id);
39 43
@@ -208,6 +212,13 @@ struct hpo_dp_link_encoder *resource_get_hpo_dp_link_enc_for_det_lt( · 168 unmodified lines
208 const struct dc_link *link);212 const struct dc_link *link);
209#endif213#endif
210 214
215void reset_syncd_pipes_from_disabled_pipes(struct dc *dc,
216 struct dc_state *context);
217
218void check_syncd_pipes_for_disabled_master_pipe(struct dc *dc,
219 struct dc_state *context,
220 uint8_t disabled_master_pipe_idx);
221
211uint8_t resource_transmitter_to_phy_idx(const struct dc *dc, enum transmitter transmitter);222uint8_t resource_transmitter_to_phy_idx(const struct dc *dc, enum transmitter transmitter);
212 223
213#endif /* DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ */224#endif /* DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ */
drivers/gpu/drm/amd/pm/amdgpu_pm.c+1−2
@@ -3462,8 +3462,7 @@ static umode_t hwmon_attributes_visible(struct kobject *kobj, · 3461 unmodified lines
3462 attr == &sensor_dev_attr_power2_cap_min.dev_attr.attr ||3462 attr == &sensor_dev_attr_power2_cap_min.dev_attr.attr ||
3463 attr == &sensor_dev_attr_power2_cap.dev_attr.attr ||3463 attr == &sensor_dev_attr_power2_cap.dev_attr.attr ||
3464 attr == &sensor_dev_attr_power2_cap_default.dev_attr.attr ||3464 attr == &sensor_dev_attr_power2_cap_default.dev_attr.attr ||
3465 attr == &sensor_dev_attr_power2_label.dev_attr.attr ||3465 attr == &sensor_dev_attr_power2_label.dev_attr.attr))
3466 attr == &sensor_dev_attr_power1_label.dev_attr.attr))
3467 return 0;3466 return 0;
3468 3467
3469 return effective_mode;3468 return effective_mode;
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c+24−8
@@ -1238,21 +1238,37 @@ static int sienna_cichlid_populate_umd_state_clk(struct smu_context *smu) · 1237 unmodified lines
1238 &dpm_context->dpm_tables.soc_table;1238 &dpm_context->dpm_tables.soc_table;
1239 struct smu_umd_pstate_table *pstate_table =1239 struct smu_umd_pstate_table *pstate_table =
1240 &smu->pstate_table;1240 &smu->pstate_table;
1241 struct amdgpu_device *adev = smu->adev;
1241 1242
1242 pstate_table->gfxclk_pstate.min = gfx_table->min;1243 pstate_table->gfxclk_pstate.min = gfx_table->min;
1243 pstate_table->gfxclk_pstate.peak = gfx_table->max;1244 pstate_table->gfxclk_pstate.peak = gfx_table->max;
1244 if (gfx_table->max >= SIENNA_CICHLID_UMD_PSTATE_PROFILING_GFXCLK)
1245 pstate_table->gfxclk_pstate.standard = SIENNA_CICHLID_UMD_PSTATE_PROFILING_GFXCLK;
1246 1245
1247 pstate_table->uclk_pstate.min = mem_table->min;1246 pstate_table->uclk_pstate.min = mem_table->min;
1248 pstate_table->uclk_pstate.peak = mem_table->max;1247 pstate_table->uclk_pstate.peak = mem_table->max;
1249 if (mem_table->max >= SIENNA_CICHLID_UMD_PSTATE_PROFILING_MEMCLK)
1250 pstate_table->uclk_pstate.standard = SIENNA_CICHLID_UMD_PSTATE_PROFILING_MEMCLK;
1251 1248
1252 pstate_table->socclk_pstate.min = soc_table->min;1249 pstate_table->socclk_pstate.min = soc_table->min;
1253 pstate_table->socclk_pstate.peak = soc_table->max;1250 pstate_table->socclk_pstate.peak = soc_table->max;
1254 if (soc_table->max >= SIENNA_CICHLID_UMD_PSTATE_PROFILING_SOCCLK)1251
1252 switch (adev->asic_type) {
1253 case CHIP_SIENNA_CICHLID:
1254 case CHIP_NAVY_FLOUNDER:
1255 pstate_table->gfxclk_pstate.standard = SIENNA_CICHLID_UMD_PSTATE_PROFILING_GFXCLK;
1256 pstate_table->uclk_pstate.standard = SIENNA_CICHLID_UMD_PSTATE_PROFILING_MEMCLK;
1255 pstate_table->socclk_pstate.standard = SIENNA_CICHLID_UMD_PSTATE_PROFILING_SOCCLK;1257 pstate_table->socclk_pstate.standard = SIENNA_CICHLID_UMD_PSTATE_PROFILING_SOCCLK;
1258 break;
1259 case CHIP_DIMGREY_CAVEFISH:
1260 pstate_table->gfxclk_pstate.standard = DIMGREY_CAVEFISH_UMD_PSTATE_PROFILING_GFXCLK;
1261 pstate_table->uclk_pstate.standard = DIMGREY_CAVEFISH_UMD_PSTATE_PROFILING_MEMCLK;
1262 pstate_table->socclk_pstate.standard = DIMGREY_CAVEFISH_UMD_PSTATE_PROFILING_SOCCLK;
1263 break;
1264 case CHIP_BEIGE_GOBY:
1265 pstate_table->gfxclk_pstate.standard = BEIGE_GOBY_UMD_PSTATE_PROFILING_GFXCLK;
1266 pstate_table->uclk_pstate.standard = BEIGE_GOBY_UMD_PSTATE_PROFILING_MEMCLK;
1267 pstate_table->socclk_pstate.standard = BEIGE_GOBY_UMD_PSTATE_PROFILING_SOCCLK;
1268 break;
1269 default:
1270 break;
1271 }
1256 1272
1257 return 0;1273 return 0;
1258}1274}
@@ -3696,14 +3712,14 @@ static ssize_t sienna_cichlid_get_gpu_metrics(struct smu_context *smu, · 2437 unmodified lines
3696 3712
3697static int sienna_cichlid_enable_mgpu_fan_boost(struct smu_context *smu)3713static int sienna_cichlid_enable_mgpu_fan_boost(struct smu_context *smu)
3698{3714{
3699 struct smu_table_context *table_context = &smu->smu_table;3715 uint16_t *mgpu_fan_boost_limit_rpm;
3700 PPTable_t *smc_pptable = table_context->driver_pptable;
3701 3716
3717 GET_PPTABLE_MEMBER(MGpuFanBoostLimitRpm, &mgpu_fan_boost_limit_rpm);
3702 /*3718 /*
3703 * Skip the MGpuFanBoost setting for those ASICs3719 * Skip the MGpuFanBoost setting for those ASICs
3704 * which do not support it3720 * which do not support it
3705 */3721 */
3706 if (!smc_pptable->MGpuFanBoostLimitRpm)3722 if (*mgpu_fan_boost_limit_rpm == 0)
3707 return 0;3723 return 0;
3708 3724
3709 return smu_cmn_send_smc_msg_with_param(smu,3725 return smu_cmn_send_smc_msg_with_param(smu,
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.h+8−0
@@ -33,6 +33,14 @@ typedef enum { · 32 unmodified lines
33#define SIENNA_CICHLID_UMD_PSTATE_PROFILING_SOCCLK 96033#define SIENNA_CICHLID_UMD_PSTATE_PROFILING_SOCCLK 960
34#define SIENNA_CICHLID_UMD_PSTATE_PROFILING_MEMCLK 100034#define SIENNA_CICHLID_UMD_PSTATE_PROFILING_MEMCLK 1000
35 35
36#define DIMGREY_CAVEFISH_UMD_PSTATE_PROFILING_GFXCLK 1950
37#define DIMGREY_CAVEFISH_UMD_PSTATE_PROFILING_SOCCLK 960
38#define DIMGREY_CAVEFISH_UMD_PSTATE_PROFILING_MEMCLK 676
39
40#define BEIGE_GOBY_UMD_PSTATE_PROFILING_GFXCLK 2200
41#define BEIGE_GOBY_UMD_PSTATE_PROFILING_SOCCLK 960
42#define BEIGE_GOBY_UMD_PSTATE_PROFILING_MEMCLK 1000
43
36extern void sienna_cichlid_set_ppt_funcs(struct smu_context *smu);44extern void sienna_cichlid_set_ppt_funcs(struct smu_context *smu);
37 45
38#endif46#endif
drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c+2−7
@@ -282,14 +282,9 @@ static int yellow_carp_post_smu_init(struct smu_context *smu) · 281 unmodified lines
282 282
283static int yellow_carp_mode_reset(struct smu_context *smu, int type)283static int yellow_carp_mode_reset(struct smu_context *smu, int type)
284{284{
285 int ret = 0, index = 0;285 int ret = 0;
286
287 index = smu_cmn_to_asic_specific_index(smu, CMN2ASIC_MAPPING_MSG,
288 SMU_MSG_GfxDeviceDriverReset);
289 if (index < 0)
290 return index == -EACCES ? 0 : index;
291 286
292 ret = smu_cmn_send_smc_msg_with_param(smu, (uint16_t)index, type, NULL);287 ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_GfxDeviceDriverReset, type, NULL);
293 if (ret)288 if (ret)
294 dev_err(smu->adev->dev, "Failed to mode reset!\n");289 dev_err(smu->adev->dev, "Failed to mode reset!\n");
295 290
drivers/gpu/drm/ast/ast_tables.h+0−2
@@ -282,8 +282,6 @@ static const struct ast_vbios_enhtable res_1360x768[] = { · 281 unmodified lines
282};282};
283 283
284static const struct ast_vbios_enhtable res_1600x900[] = {284static const struct ast_vbios_enhtable res_1600x900[] = {
285 {1800, 1600, 24, 80, 1000, 900, 1, 3, VCLK108, /* 60Hz */
286 (SyncPP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 3, 0x3A },
287 {1760, 1600, 48, 32, 926, 900, 3, 5, VCLK97_75, /* 60Hz CVT RB */285 {1760, 1600, 48, 32, 926, 900, 3, 5, VCLK97_75, /* 60Hz CVT RB */
288 (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo |286 (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo |
289 AST2500PreCatchCRT), 60, 1, 0x3A },287 AST2500PreCatchCRT), 60, 1, 0x3A },
drivers/gpu/drm/bridge/nwl-dsi.c+5−7
@@ -7,6 +7,7 @@ · 6 unmodified lines
7 */7 */
8 8
9#include <linux/bitfield.h>9#include <linux/bitfield.h>
10#include <linux/bits.h>
10#include <linux/clk.h>11#include <linux/clk.h>
11#include <linux/irq.h>12#include <linux/irq.h>
12#include <linux/math64.h>13#include <linux/math64.h>
@@ -196,12 +197,9 @@ static u32 ps2bc(struct nwl_dsi *dsi, unsigned long long ps) · 183 unmodified lines
196/*197/*
197 * ui2bc - UI time periods to byte clock cycles198 * ui2bc - UI time periods to byte clock cycles
198 */199 */
199static u32 ui2bc(struct nwl_dsi *dsi, unsigned long long ui)200static u32 ui2bc(unsigned int ui)
200{201{
201 u32 bpp = mipi_dsi_pixel_format_to_bpp(dsi->format);202 return DIV_ROUND_UP(ui, BITS_PER_BYTE);
202
203 return DIV64_U64_ROUND_UP(ui * dsi->lanes,
204 dsi->mode.clock * 1000 * bpp);
205}203}
206 204
207/*205/*
@@ -232,12 +230,12 @@ static int nwl_dsi_config_host(struct nwl_dsi *dsi) · 24 unmodified lines
232 }230 }
233 231
234 /* values in byte clock cycles */232 /* values in byte clock cycles */
235 cycles = ui2bc(dsi, cfg->clk_pre);233 cycles = ui2bc(cfg->clk_pre);
236 DRM_DEV_DEBUG_DRIVER(dsi->dev, "cfg_t_pre: 0x%x\n", cycles);234 DRM_DEV_DEBUG_DRIVER(dsi->dev, "cfg_t_pre: 0x%x\n", cycles);
237 nwl_dsi_write(dsi, NWL_DSI_CFG_T_PRE, cycles);235 nwl_dsi_write(dsi, NWL_DSI_CFG_T_PRE, cycles);
238 cycles = ps2bc(dsi, cfg->lpx + cfg->clk_prepare + cfg->clk_zero);236 cycles = ps2bc(dsi, cfg->lpx + cfg->clk_prepare + cfg->clk_zero);
239 DRM_DEV_DEBUG_DRIVER(dsi->dev, "cfg_tx_gap (pre): 0x%x\n", cycles);237 DRM_DEV_DEBUG_DRIVER(dsi->dev, "cfg_tx_gap (pre): 0x%x\n", cycles);
240 cycles += ui2bc(dsi, cfg->clk_pre);238 cycles += ui2bc(cfg->clk_pre);
241 DRM_DEV_DEBUG_DRIVER(dsi->dev, "cfg_t_post: 0x%x\n", cycles);239 DRM_DEV_DEBUG_DRIVER(dsi->dev, "cfg_t_post: 0x%x\n", cycles);
242 nwl_dsi_write(dsi, NWL_DSI_CFG_T_POST, cycles);240 nwl_dsi_write(dsi, NWL_DSI_CFG_T_POST, cycles);
243 cycles = ps2bc(dsi, cfg->hs_exit);241 cycles = ps2bc(dsi, cfg->hs_exit);
drivers/gpu/drm/drm_atomic.c+8−4
@@ -1327,8 +1327,10 @@ int drm_atomic_check_only(struct drm_atomic_state *state) · 1326 unmodified lines
1327 1327
1328 drm_dbg_atomic(dev, "checking %p\n", state);1328 drm_dbg_atomic(dev, "checking %p\n", state);
1329 1329
1330 for_each_new_crtc_in_state(state, crtc, new_crtc_state, i)1330 for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {
1331 requested_crtc |= drm_crtc_mask(crtc);1331 if (new_crtc_state->enable)
1332 requested_crtc |= drm_crtc_mask(crtc);
1333 }
1332 1334
1333 for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, i) {1335 for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, i) {
1334 ret = drm_atomic_plane_check(old_plane_state, new_plane_state);1336 ret = drm_atomic_plane_check(old_plane_state, new_plane_state);
@@ -1377,8 +1379,10 @@ int drm_atomic_check_only(struct drm_atomic_state *state) · 42 unmodified lines
1377 }1379 }
1378 }1380 }
1379 1381
1380 for_each_new_crtc_in_state(state, crtc, new_crtc_state, i)1382 for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {
1381 affected_crtc |= drm_crtc_mask(crtc);1383 if (new_crtc_state->enable)
1384 affected_crtc |= drm_crtc_mask(crtc);
1385 }
1382 1386
1383 /*1387 /*
1384 * For commits that allow modesets drivers can add other CRTCs to the1388 * For commits that allow modesets drivers can add other CRTCs to the
drivers/gpu/drm/drm_atomic_uapi.c+8−6
@@ -76,15 +76,17 @@ int drm_atomic_set_mode_for_crtc(struct drm_crtc_state *state, · 75 unmodified lines
76 state->mode_blob = NULL;76 state->mode_blob = NULL;
77 77
78 if (mode) {78 if (mode) {
79 struct drm_property_blob *blob;
80
79 drm_mode_convert_to_umode(&umode, mode);81 drm_mode_convert_to_umode(&umode, mode);
80 state->mode_blob =82 blob = drm_property_create_blob(crtc->dev,
81 drm_property_create_blob(state->crtc->dev,83 sizeof(umode), &umode);
82 sizeof(umode),84 if (IS_ERR(blob))
83 &umode);85 return PTR_ERR(blob);
84 if (IS_ERR(state->mode_blob))
85 return PTR_ERR(state->mode_blob);
86 86
87 drm_mode_copy(&state->mode, mode);87 drm_mode_copy(&state->mode, mode);
88
89 state->mode_blob = blob;
88 state->enable = true;90 state->enable = true;
89 drm_dbg_atomic(crtc->dev,91 drm_dbg_atomic(crtc->dev,
90 "Set [MODE:%s] for [CRTC:%d:%s] state %p\n",92 "Set [MODE:%s] for [CRTC:%d:%s] state %p\n",
drivers/gpu/drm/drm_gem_cma_helper.c+1−0
@@ -512,6 +512,7 @@ int drm_gem_cma_mmap(struct drm_gem_cma_object *cma_obj, struct vm_area_struct * · 511 unmodified lines
512 */512 */
513 vma->vm_pgoff -= drm_vma_node_start(&obj->vma_node);513 vma->vm_pgoff -= drm_vma_node_start(&obj->vma_node);
514 vma->vm_flags &= ~VM_PFNMAP;514 vma->vm_flags &= ~VM_PFNMAP;
515 vma->vm_flags |= VM_DONTEXPAND;
515 516
516 if (cma_obj->map_noncoherent) {517 if (cma_obj->map_noncoherent) {
517 vma->vm_page_prot = vm_get_page_prot(vma->vm_flags);518 vma->vm_page_prot = vm_get_page_prot(vma->vm_flags);
drivers/gpu/drm/drm_panel_orientation_quirks.c+12−0
@@ -115,6 +115,12 @@ static const struct drm_dmi_panel_orientation_data lcd1280x1920_rightside_up = { · 114 unmodified lines
115 .orientation = DRM_MODE_PANEL_ORIENTATION_RIGHT_UP,115 .orientation = DRM_MODE_PANEL_ORIENTATION_RIGHT_UP,
116};116};
117 117
118static const struct drm_dmi_panel_orientation_data lcd1600x2560_leftside_up = {
119 .width = 1600,
120 .height = 2560,
121 .orientation = DRM_MODE_PANEL_ORIENTATION_LEFT_UP,
122};
123
118static const struct dmi_system_id orientation_data[] = {124static const struct dmi_system_id orientation_data[] = {
119 { /* Acer One 10 (S1003) */125 { /* Acer One 10 (S1003) */
120 .matches = {126 .matches = {
@@ -275,6 +281,12 @@ static const struct dmi_system_id orientation_data[] = { · 154 unmodified lines
275 DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "Default string"),281 DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "Default string"),
276 },282 },
277 .driver_data = (void *)&onegx1_pro,283 .driver_data = (void *)&onegx1_pro,
284 }, { /* OneXPlayer */
285 .matches = {
286 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ONE-NETBOOK TECHNOLOGY CO., LTD."),
287 DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "ONE XPLAYER"),
288 },
289 .driver_data = (void *)&lcd1600x2560_leftside_up,
278 }, { /* Samsung GalaxyBook 10.6 */290 }, { /* Samsung GalaxyBook 10.6 */
279 .matches = {291 .matches = {
280 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD."),292 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD."),
drivers/gpu/drm/drm_privacy_screen.c+1−1
@@ -269,7 +269,7 @@ EXPORT_SYMBOL(drm_privacy_screen_get_state); · 268 unmodified lines
269 *269 *
270 * The notifier is called with no locks held. The new hw_state and sw_state270 * The notifier is called with no locks held. The new hw_state and sw_state
271 * can be retrieved using the drm_privacy_screen_get_state() function.271 * can be retrieved using the drm_privacy_screen_get_state() function.
272 * A pointer to the drm_privacy_screen's struct is passed as the void *data272 * A pointer to the drm_privacy_screen's struct is passed as the ``void *data``
273 * argument of the notifier_block's notifier_call.273 * argument of the notifier_block's notifier_call.
274 *274 *
275 * The notifier will NOT be called when changes are made through275 * The notifier will NOT be called when changes are made through
drivers/gpu/drm/drm_privacy_screen_x86.c+3−0
@@ -33,6 +33,9 @@ static bool __init detect_thinkpad_privacy_screen(void) · 32 unmodified lines
33 unsigned long long output;33 unsigned long long output;
34 acpi_status status;34 acpi_status status;
35 35
36 if (acpi_disabled)
37 return false;
38
36 /* Get embedded-controller handle */39 /* Get embedded-controller handle */
37 status = acpi_get_devices("PNP0C09", acpi_set_handle, NULL, &ec_handle);40 status = acpi_get_devices("PNP0C09", acpi_set_handle, NULL, &ec_handle);
38 if (ACPI_FAILURE(status) || !ec_handle)41 if (ACPI_FAILURE(status) || !ec_handle)
drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c+2−2
@@ -469,8 +469,8 @@ int etnaviv_ioctl_gem_submit(struct drm_device *dev, void *data, · 468 unmodified lines
469 return -EINVAL;469 return -EINVAL;
470 }470 }
471 471
472 if (args->stream_size > SZ_64K || args->nr_relocs > SZ_64K ||472 if (args->stream_size > SZ_128K || args->nr_relocs > SZ_128K ||
473 args->nr_bos > SZ_64K || args->nr_pmrs > 128) {473 args->nr_bos > SZ_128K || args->nr_pmrs > 128) {
474 DRM_ERROR("submit arguments out of size limits\n");474 DRM_ERROR("submit arguments out of size limits\n");
475 return -EINVAL;475 return -EINVAL;
476 }476 }
drivers/gpu/drm/i915/Kconfig+1−0
@@ -101,6 +101,7 @@ config DRM_I915_USERPTR · 100 unmodified lines
101config DRM_I915_GVT101config DRM_I915_GVT
102 bool "Enable Intel GVT-g graphics virtualization host support"102 bool "Enable Intel GVT-g graphics virtualization host support"
103 depends on DRM_I915103 depends on DRM_I915
104 depends on X86
104 depends on 64BIT105 depends on 64BIT
105 default n106 default n
106 help107 help
drivers/gpu/drm/i915/display/intel_display.c+1−0
@@ -10673,6 +10673,7 @@ intel_modeset_setup_hw_state(struct drm_device *dev, · 10672 unmodified lines
10673 vlv_wm_sanitize(dev_priv);10673 vlv_wm_sanitize(dev_priv);
10674 } else if (DISPLAY_VER(dev_priv) >= 9) {10674 } else if (DISPLAY_VER(dev_priv) >= 9) {
10675 skl_wm_get_hw_state(dev_priv);10675 skl_wm_get_hw_state(dev_priv);
10676 skl_wm_sanitize(dev_priv);
10676 } else if (HAS_PCH_SPLIT(dev_priv)) {10677 } else if (HAS_PCH_SPLIT(dev_priv)) {
10677 ilk_wm_get_hw_state(dev_priv);10678 ilk_wm_get_hw_state(dev_priv);
10678 }10679 }
drivers/gpu/drm/i915/display/intel_drrs.c+8−0
@@ -405,6 +405,7 @@ intel_drrs_init(struct intel_connector *connector, · 404 unmodified lines
405 struct drm_display_mode *fixed_mode)405 struct drm_display_mode *fixed_mode)
406{406{
407 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);407 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
408 struct intel_encoder *encoder = connector->encoder;
408 struct drm_display_mode *downclock_mode = NULL;409 struct drm_display_mode *downclock_mode = NULL;
409 410
410 INIT_DELAYED_WORK(&dev_priv->drrs.work, intel_drrs_downclock_work);411 INIT_DELAYED_WORK(&dev_priv->drrs.work, intel_drrs_downclock_work);
@@ -416,6 +417,13 @@ intel_drrs_init(struct intel_connector *connector, · 5 unmodified lines
416 return NULL;417 return NULL;
417 }418 }
418 419
420 if ((DISPLAY_VER(dev_priv) < 8 && !HAS_GMCH(dev_priv)) &&
421 encoder->port != PORT_A) {
422 drm_dbg_kms(&dev_priv->drm,
423 "DRRS only supported on eDP port A\n");
424 return NULL;
425 }
426
419 if (dev_priv->vbt.drrs_type != SEAMLESS_DRRS_SUPPORT) {427 if (dev_priv->vbt.drrs_type != SEAMLESS_DRRS_SUPPORT) {
420 drm_dbg_kms(&dev_priv->drm, "VBT doesn't support DRRS\n");428 drm_dbg_kms(&dev_priv->drm, "VBT doesn't support DRRS\n");
421 return NULL;429 return NULL;
drivers/gpu/drm/i915/display/intel_fbc.c+2−1
@@ -1115,7 +1115,8 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state, · 1114 unmodified lines
1115 1115
1116 /* Wa_22010751166: icl, ehl, tgl, dg1, rkl */1116 /* Wa_22010751166: icl, ehl, tgl, dg1, rkl */
1117 if (DISPLAY_VER(i915) >= 11 &&1117 if (DISPLAY_VER(i915) >= 11 &&
1118 (plane_state->view.color_plane[0].y + drm_rect_height(&plane_state->uapi.src)) & 3) {1118 (plane_state->view.color_plane[0].y +
1119 (drm_rect_height(&plane_state->uapi.src) >> 16)) & 3) {
1119 plane_state->no_fbc_reason = "plane end Y offset misaligned";1120 plane_state->no_fbc_reason = "plane end Y offset misaligned";
1120 return false;1121 return false;
1121 }1122 }
drivers/gpu/drm/i915/display/intel_opregion.c+15−0
@@ -360,6 +360,21 @@ int intel_opregion_notify_encoder(struct intel_encoder *intel_encoder, · 359 unmodified lines
360 port++;360 port++;
361 }361 }
362 362
363 /*
364 * The port numbering and mapping here is bizarre. The now-obsolete
365 * swsci spec supports ports numbered [0..4]. Port E is handled as a
366 * special case, but port F and beyond are not. The functionality is
367 * supposed to be obsolete for new platforms. Just bail out if the port
368 * number is out of bounds after mapping.
369 */
370 if (port > 4) {
371 drm_dbg_kms(&dev_priv->drm,
372 "[ENCODER:%d:%s] port %c (index %u) out of bounds for display power state notification\n",
373 intel_encoder->base.base.id, intel_encoder->base.name,
374 port_name(intel_encoder->port), port);
375 return -EINVAL;
376 }
377
363 if (!enable)378 if (!enable)
364 parm |= 4 << 8;379 parm |= 4 << 8;
365 380
drivers/gpu/drm/i915/display/intel_overlay.c+3−0
@@ -959,6 +959,9 @@ static int check_overlay_dst(struct intel_overlay *overlay, · 958 unmodified lines
959 const struct intel_crtc_state *pipe_config =959 const struct intel_crtc_state *pipe_config =
960 overlay->crtc->config;960 overlay->crtc->config;
961 961
962 if (rec->dst_height == 0 || rec->dst_width == 0)
963 return -EINVAL;
964
962 if (rec->dst_x < pipe_config->pipe_src_w &&965 if (rec->dst_x < pipe_config->pipe_src_w &&
963 rec->dst_x + rec->dst_width <= pipe_config->pipe_src_w &&966 rec->dst_x + rec->dst_width <= pipe_config->pipe_src_w &&
964 rec->dst_y < pipe_config->pipe_src_h &&967 rec->dst_y < pipe_config->pipe_src_h &&
drivers/gpu/drm/i915/display/intel_tc.c+2−1
@@ -345,10 +345,11 @@ static bool icl_tc_phy_status_complete(struct intel_digital_port *dig_port) · 344 unmodified lines
345static bool adl_tc_phy_status_complete(struct intel_digital_port *dig_port)345static bool adl_tc_phy_status_complete(struct intel_digital_port *dig_port)
346{346{
347 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);347 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
348 enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
348 struct intel_uncore *uncore = &i915->uncore;349 struct intel_uncore *uncore = &i915->uncore;
349 u32 val;350 u32 val;
350 351
351 val = intel_uncore_read(uncore, TCSS_DDI_STATUS(dig_port->tc_phy_fia_idx));352 val = intel_uncore_read(uncore, TCSS_DDI_STATUS(tc_port));
352 if (val == 0xffffffff) {353 if (val == 0xffffffff) {
353 drm_dbg_kms(&i915->drm,354 drm_dbg_kms(&i915->drm,
354 "Port %s: PHY in TCCOLD, assuming not complete\n",355 "Port %s: PHY in TCCOLD, assuming not complete\n",
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c+7−2
@@ -2505,9 +2505,14 @@ static int eb_pin_timeline(struct i915_execbuffer *eb, struct intel_context *ce, · 2504 unmodified lines
2505 timeout) < 0) {2505 timeout) < 0) {
2506 i915_request_put(rq);2506 i915_request_put(rq);
2507 2507
2508 tl = intel_context_timeline_lock(ce);2508 /*
2509 * Error path, cannot use intel_context_timeline_lock as
2510 * that is user interruptable and this clean up step
2511 * must be done.
2512 */
2513 mutex_lock(&ce->timeline->mutex);
2509 intel_context_exit(ce);2514 intel_context_exit(ce);
2510 intel_context_timeline_unlock(tl);2515 mutex_unlock(&ce->timeline->mutex);
2511 2516
2512 if (nonblock)2517 if (nonblock)
2513 return -EWOULDBLOCK;2518 return -EWOULDBLOCK;
drivers/gpu/drm/i915/gem/i915_gem_object_types.h+1−0
@@ -311,6 +311,7 @@ struct drm_i915_gem_object { · 310 unmodified lines
311#define I915_BO_READONLY BIT(6)311#define I915_BO_READONLY BIT(6)
312#define I915_TILING_QUIRK_BIT 7 /* unknown swizzling; do not release! */312#define I915_TILING_QUIRK_BIT 7 /* unknown swizzling; do not release! */
313#define I915_BO_PROTECTED BIT(8)313#define I915_BO_PROTECTED BIT(8)
314#define I915_BO_WAS_BOUND_BIT 9
314 /**315 /**
315 * @mem_flags - Mutable placement-related flags316 * @mem_flags - Mutable placement-related flags
316 *317 *
drivers/gpu/drm/i915/gem/i915_gem_pages.c+10−0
@@ -10,6 +10,8 @@ · 9 unmodified lines
10#include "i915_gem_lmem.h"10#include "i915_gem_lmem.h"
11#include "i915_gem_mman.h"11#include "i915_gem_mman.h"
12 12
13#include "gt/intel_gt.h"
14
13void __i915_gem_object_set_pages(struct drm_i915_gem_object *obj,15void __i915_gem_object_set_pages(struct drm_i915_gem_object *obj,
14 struct sg_table *pages,16 struct sg_table *pages,
15 unsigned int sg_page_sizes)17 unsigned int sg_page_sizes)
@@ -221,6 +223,14 @@ __i915_gem_object_unset_pages(struct drm_i915_gem_object *obj) · 205 unmodified lines
221 __i915_gem_object_reset_page_iter(obj);223 __i915_gem_object_reset_page_iter(obj);
222 obj->mm.page_sizes.phys = obj->mm.page_sizes.sg = 0;224 obj->mm.page_sizes.phys = obj->mm.page_sizes.sg = 0;
223 225
226 if (test_and_clear_bit(I915_BO_WAS_BOUND_BIT, &obj->flags)) {
227 struct drm_i915_private *i915 = to_i915(obj->base.dev);
228 intel_wakeref_t wakeref;
229
230 with_intel_runtime_pm_if_active(&i915->runtime_pm, wakeref)
231 intel_gt_invalidate_tlbs(to_gt(i915));
232 }
233
224 return pages;234 return pages;
225}235}
226 236
drivers/gpu/drm/i915/gem/i915_gem_ttm.c+2−4
@@ -842,11 +842,9 @@ void i915_ttm_adjust_lru(struct drm_i915_gem_object *obj) · 841 unmodified lines
842 } else if (obj->mm.madv != I915_MADV_WILLNEED) {842 } else if (obj->mm.madv != I915_MADV_WILLNEED) {
843 bo->priority = I915_TTM_PRIO_PURGE;843 bo->priority = I915_TTM_PRIO_PURGE;
844 } else if (!i915_gem_object_has_pages(obj)) {844 } else if (!i915_gem_object_has_pages(obj)) {
845 if (bo->priority < I915_TTM_PRIO_HAS_PAGES)845 bo->priority = I915_TTM_PRIO_NO_PAGES;
846 bo->priority = I915_TTM_PRIO_HAS_PAGES;
847 } else {846 } else {
848 if (bo->priority > I915_TTM_PRIO_NO_PAGES)847 bo->priority = I915_TTM_PRIO_HAS_PAGES;
849 bo->priority = I915_TTM_PRIO_NO_PAGES;
850 }848 }
851 849
852 ttm_bo_move_to_lru_tail(bo, bo->resource, NULL);850 ttm_bo_move_to_lru_tail(bo, bo->resource, NULL);
drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c+10−4
@@ -427,11 +427,17 @@ __i915_ttm_move(struct ttm_buffer_object *bo, · 426 unmodified lines
427 427
428 if (!IS_ERR(fence))428 if (!IS_ERR(fence))
429 goto out;429 goto out;
430 } else if (move_deps) {430 } else {
431 int err = i915_deps_sync(move_deps, ctx);431 int err = PTR_ERR(fence);
432
433 if (err == -EINTR || err == -ERESTARTSYS || err == -EAGAIN)
434 return fence;
432 435
433 if (err)436 if (move_deps) {
434 return ERR_PTR(err);437 err = i915_deps_sync(move_deps, ctx);
438 if (err)
439 return ERR_PTR(err);
440 }
435 }441 }
436 442
437 /* Error intercept failed or no accelerated migration to start with */443 /* Error intercept failed or no accelerated migration to start with */
drivers/gpu/drm/i915/gt/intel_gt.c+108−0
@@ -29,6 +29,8 @@ void __intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915) · 28 unmodified lines
29{29{
30 spin_lock_init(&gt->irq_lock);30 spin_lock_init(&gt->irq_lock);
31 31
32 mutex_init(&gt->tlb_invalidate_lock);
33
32 INIT_LIST_HEAD(&gt->closed_vma);34 INIT_LIST_HEAD(&gt->closed_vma);
33 spin_lock_init(&gt->closed_lock);35 spin_lock_init(&gt->closed_lock);
34 36
@@ -912,3 +914,109 @@ void intel_gt_info_print(const struct intel_gt_info *info, · 877 unmodified lines
912 914
913 intel_sseu_dump(&info->sseu, p);915 intel_sseu_dump(&info->sseu, p);
914}916}
917
918struct reg_and_bit {
919 i915_reg_t reg;
920 u32 bit;
921};
922
923static struct reg_and_bit
924get_reg_and_bit(const struct intel_engine_cs *engine, const bool gen8,
925 const i915_reg_t *regs, const unsigned int num)
926{
927 const unsigned int class = engine->class;
928 struct reg_and_bit rb = { };
929
930 if (drm_WARN_ON_ONCE(&engine->i915->drm,
931 class >= num || !regs[class].reg))
932 return rb;
933
934 rb.reg = regs[class];
935 if (gen8 && class == VIDEO_DECODE_CLASS)
936 rb.reg.reg += 4 * engine->instance; /* GEN8_M2TCR */
937 else
938 rb.bit = engine->instance;
939
940 rb.bit = BIT(rb.bit);
941
942 return rb;
943}
944
945void intel_gt_invalidate_tlbs(struct intel_gt *gt)
946{
947 static const i915_reg_t gen8_regs[] = {
948 [RENDER_CLASS] = GEN8_RTCR,
949 [VIDEO_DECODE_CLASS] = GEN8_M1TCR, /* , GEN8_M2TCR */
950 [VIDEO_ENHANCEMENT_CLASS] = GEN8_VTCR,
951 [COPY_ENGINE_CLASS] = GEN8_BTCR,
952 };
953 static const i915_reg_t gen12_regs[] = {
954 [RENDER_CLASS] = GEN12_GFX_TLB_INV_CR,
955 [VIDEO_DECODE_CLASS] = GEN12_VD_TLB_INV_CR,
956 [VIDEO_ENHANCEMENT_CLASS] = GEN12_VE_TLB_INV_CR,
957 [COPY_ENGINE_CLASS] = GEN12_BLT_TLB_INV_CR,
958 };
959 struct drm_i915_private *i915 = gt->i915;
960 struct intel_uncore *uncore = gt->uncore;
961 struct intel_engine_cs *engine;
962 enum intel_engine_id id;
963 const i915_reg_t *regs;
964 unsigned int num = 0;
965
966 if (I915_SELFTEST_ONLY(gt->awake == -ENODEV))
967 return;
968
969 if (GRAPHICS_VER(i915) == 12) {
970 regs = gen12_regs;
971 num = ARRAY_SIZE(gen12_regs);
972 } else if (GRAPHICS_VER(i915) >= 8 && GRAPHICS_VER(i915) <= 11) {
973 regs = gen8_regs;
974 num = ARRAY_SIZE(gen8_regs);
975 } else if (GRAPHICS_VER(i915) < 8) {
976 return;
977 }
978
979 if (drm_WARN_ONCE(&i915->drm, !num,
980 "Platform does not implement TLB invalidation!"))
981 return;
982
983 GEM_TRACE("\n");
984
985 assert_rpm_wakelock_held(&i915->runtime_pm);
986
987 mutex_lock(&gt->tlb_invalidate_lock);
988 intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL);
989
990 for_each_engine(engine, gt, id) {
991 /*
992 * HW architecture suggest typical invalidation time at 40us,
993 * with pessimistic cases up to 100us and a recommendation to
994 * cap at 1ms. We go a bit higher just in case.
995 */
996 const unsigned int timeout_us = 100;
997 const unsigned int timeout_ms = 4;
998 struct reg_and_bit rb;
999
1000 rb = get_reg_and_bit(engine, regs == gen8_regs, regs, num);
1001 if (!i915_mmio_reg_offset(rb.reg))
1002 continue;
1003
1004 intel_uncore_write_fw(uncore, rb.reg, rb.bit);
1005 if (__intel_wait_for_register_fw(uncore,
1006 rb.reg, rb.bit, 0,
1007 timeout_us, timeout_ms,
1008 NULL))
1009 drm_err_ratelimited(&gt->i915->drm,
1010 "%s TLB invalidation did not complete in %ums!\n",
1011 engine->name, timeout_ms);
1012 }
1013
1014 /*
1015 * Use delayed put since a) we mostly expect a flurry of TLB
1016 * invalidations so it is good to avoid paying the forcewake cost and
1017 * b) it works around a bug in Icelake which cannot cope with too rapid
1018 * transitions.
1019 */
1020 intel_uncore_forcewake_put_delayed(uncore, FORCEWAKE_ALL);
1021 mutex_unlock(&gt->tlb_invalidate_lock);
1022}
drivers/gpu/drm/i915/gt/intel_gt.h+2−0
@@ -91,4 +91,6 @@ void intel_gt_info_print(const struct intel_gt_info *info, · 90 unmodified lines
91 91
92void intel_gt_watchdog_work(struct work_struct *work);92void intel_gt_watchdog_work(struct work_struct *work);
93 93
94void intel_gt_invalidate_tlbs(struct intel_gt *gt);
95
94#endif /* __INTEL_GT_H__ */96#endif /* __INTEL_GT_H__ */
drivers/gpu/drm/i915/gt/intel_gt_types.h+2−0
@@ -73,6 +73,8 @@ struct intel_gt { · 72 unmodified lines
73 73
74 struct intel_uc uc;74 struct intel_uc uc;
75 75
76 struct mutex tlb_invalidate_lock;
77
76 struct i915_wa_list wa_list;78 struct i915_wa_list wa_list;
77 79
78 struct intel_gt_timelines {80 struct intel_gt_timelines {
drivers/gpu/drm/i915/gt/uc/intel_guc.h+5−0
@@ -206,6 +206,11 @@ struct intel_guc { · 205 unmodified lines
206 * context usage for overflows.206 * context usage for overflows.
207 */207 */
208 struct delayed_work work;208 struct delayed_work work;
209
210 /**
211 * @shift: Right shift value for the gpm timestamp
212 */
213 u32 shift;
209 } timestamp;214 } timestamp;
210 215
211#ifdef CONFIG_DRM_I915_SELFTEST216#ifdef CONFIG_DRM_I915_SELFTEST
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c+97−17
@@ -1113,6 +1113,19 @@ __extend_last_switch(struct intel_guc *guc, u64 *prev_start, u32 new_start) · 1112 unmodified lines
1113 if (new_start == lower_32_bits(*prev_start))1113 if (new_start == lower_32_bits(*prev_start))
1114 return;1114 return;
1115 1115
1116 /*
1117 * When gt is unparked, we update the gt timestamp and start the ping
1118 * worker that updates the gt_stamp every POLL_TIME_CLKS. As long as gt
1119 * is unparked, all switched in contexts will have a start time that is
1120 * within +/- POLL_TIME_CLKS of the most recent gt_stamp.
1121 *
1122 * If neither gt_stamp nor new_start has rolled over, then the
1123 * gt_stamp_hi does not need to be adjusted, however if one of them has
1124 * rolled over, we need to adjust gt_stamp_hi accordingly.
1125 *
1126 * The below conditions address the cases of new_start rollover and
1127 * gt_stamp_last rollover respectively.
1128 */
1116 if (new_start < gt_stamp_last &&1129 if (new_start < gt_stamp_last &&
1117 (new_start - gt_stamp_last) <= POLL_TIME_CLKS)1130 (new_start - gt_stamp_last) <= POLL_TIME_CLKS)
1118 gt_stamp_hi++;1131 gt_stamp_hi++;
@@ -1124,17 +1137,45 @@ __extend_last_switch(struct intel_guc *guc, u64 *prev_start, u32 new_start) · 5 unmodified lines
1124 *prev_start = ((u64)gt_stamp_hi << 32) | new_start;1137 *prev_start = ((u64)gt_stamp_hi << 32) | new_start;
1125}1138}
1126 1139
1127static void guc_update_engine_gt_clks(struct intel_engine_cs *engine)1140/*
1141 * GuC updates shared memory and KMD reads it. Since this is not synchronized,
1142 * we run into a race where the value read is inconsistent. Sometimes the
1143 * inconsistency is in reading the upper MSB bytes of the last_in value when
1144 * this race occurs. 2 types of cases are seen - upper 8 bits are zero and upper
1145 * 24 bits are zero. Since these are non-zero values, it is non-trivial to
1146 * determine validity of these values. Instead we read the values multiple times
1147 * until they are consistent. In test runs, 3 attempts results in consistent
1148 * values. The upper bound is set to 6 attempts and may need to be tuned as per
1149 * any new occurences.
1150 */
1151static void __get_engine_usage_record(struct intel_engine_cs *engine,
1152 u32 *last_in, u32 *id, u32 *total)
1128{1153{
1129 struct guc_engine_usage_record *rec = intel_guc_engine_usage(engine);1154 struct guc_engine_usage_record *rec = intel_guc_engine_usage(engine);
1155 int i = 0;
1156
1157 do {
1158 *last_in = READ_ONCE(rec->last_switch_in_stamp);
1159 *id = READ_ONCE(rec->current_context_index);
1160 *total = READ_ONCE(rec->total_runtime);
1161
1162 if (READ_ONCE(rec->last_switch_in_stamp) == *last_in &&
1163 READ_ONCE(rec->current_context_index) == *id &&
1164 READ_ONCE(rec->total_runtime) == *total)
1165 break;
1166 } while (++i < 6);
1167}
1168
1169static void guc_update_engine_gt_clks(struct intel_engine_cs *engine)
1170{
1130 struct intel_engine_guc_stats *stats = &engine->stats.guc;1171 struct intel_engine_guc_stats *stats = &engine->stats.guc;
1131 struct intel_guc *guc = &engine->gt->uc.guc;1172 struct intel_guc *guc = &engine->gt->uc.guc;
1132 u32 last_switch = rec->last_switch_in_stamp;1173 u32 last_switch, ctx_id, total;
1133 u32 ctx_id = rec->current_context_index;
1134 u32 total = rec->total_runtime;
1135 1174
1136 lockdep_assert_held(&guc->timestamp.lock);1175 lockdep_assert_held(&guc->timestamp.lock);
1137 1176
1177 __get_engine_usage_record(engine, &last_switch, &ctx_id, &total);
1178
1138 stats->running = ctx_id != ~0U && last_switch;1179 stats->running = ctx_id != ~0U && last_switch;
1139 if (stats->running)1180 if (stats->running)
1140 __extend_last_switch(guc, &stats->start_gt_clk, last_switch);1181 __extend_last_switch(guc, &stats->start_gt_clk, last_switch);
@@ -1149,23 +1190,51 @@ static void guc_update_engine_gt_clks(struct intel_engine_cs *engine) · 8 unmodified lines
1149 }1190 }
1150}1191}
1151 1192
1152static void guc_update_pm_timestamp(struct intel_guc *guc,1193static u32 gpm_timestamp_shift(struct intel_gt *gt)
1153 struct intel_engine_cs *engine,1194{
1154 ktime_t *now)1195 intel_wakeref_t wakeref;
1196 u32 reg, shift;
1197
1198 with_intel_runtime_pm(gt->uncore->rpm, wakeref)
1199 reg = intel_uncore_read(gt->uncore, RPM_CONFIG0);
1200
1201 shift = (reg & GEN10_RPM_CONFIG0_CTC_SHIFT_PARAMETER_MASK) >>
1202 GEN10_RPM_CONFIG0_CTC_SHIFT_PARAMETER_SHIFT;
1203
1204 return 3 - shift;
1205}
1206
1207static u64 gpm_timestamp(struct intel_gt *gt)
1208{
1209 u32 lo, hi, old_hi, loop = 0;
1210
1211 hi = intel_uncore_read(gt->uncore, MISC_STATUS1);
1212 do {
1213 lo = intel_uncore_read(gt->uncore, MISC_STATUS0);
1214 old_hi = hi;
1215 hi = intel_uncore_read(gt->uncore, MISC_STATUS1);
1216 } while (old_hi != hi && loop++ < 2);
1217
1218 return ((u64)hi << 32) | lo;
1219}
1220
1221static void guc_update_pm_timestamp(struct intel_guc *guc, ktime_t *now)
1155{1222{
1156 u32 gt_stamp_now, gt_stamp_hi;1223 struct intel_gt *gt = guc_to_gt(guc);
1224 u32 gt_stamp_lo, gt_stamp_hi;
1225 u64 gpm_ts;
1157 1226
1158 lockdep_assert_held(&guc->timestamp.lock);1227 lockdep_assert_held(&guc->timestamp.lock);
1159 1228
1160 gt_stamp_hi = upper_32_bits(guc->timestamp.gt_stamp);1229 gt_stamp_hi = upper_32_bits(guc->timestamp.gt_stamp);
1161 gt_stamp_now = intel_uncore_read(engine->uncore,1230 gpm_ts = gpm_timestamp(gt) >> guc->timestamp.shift;
1162 RING_TIMESTAMP(engine->mmio_base));1231 gt_stamp_lo = lower_32_bits(gpm_ts);
1163 *now = ktime_get();1232 *now = ktime_get();
1164 1233
1165 if (gt_stamp_now < lower_32_bits(guc->timestamp.gt_stamp))1234 if (gt_stamp_lo < lower_32_bits(guc->timestamp.gt_stamp))
1166 gt_stamp_hi++;1235 gt_stamp_hi++;
1167 1236
1168 guc->timestamp.gt_stamp = ((u64)gt_stamp_hi << 32) | gt_stamp_now;1237 guc->timestamp.gt_stamp = ((u64)gt_stamp_hi << 32) | gt_stamp_lo;
1169}1238}
1170 1239
1171/*1240/*
@@ -1208,8 +1277,12 @@ static ktime_t guc_engine_busyness(struct intel_engine_cs *engine, ktime_t *now) · 36 unmodified lines
1208 if (!in_reset && intel_gt_pm_get_if_awake(gt)) {1277 if (!in_reset && intel_gt_pm_get_if_awake(gt)) {
1209 stats_saved = *stats;1278 stats_saved = *stats;
1210 gt_stamp_saved = guc->timestamp.gt_stamp;1279 gt_stamp_saved = guc->timestamp.gt_stamp;
1280 /*
1281 * Update gt_clks, then gt timestamp to simplify the 'gt_stamp -
1282 * start_gt_clk' calculation below for active engines.
1283 */
1211 guc_update_engine_gt_clks(engine);1284 guc_update_engine_gt_clks(engine);
1212 guc_update_pm_timestamp(guc, engine, now);1285 guc_update_pm_timestamp(guc, now);
1213 intel_gt_pm_put_async(gt);1286 intel_gt_pm_put_async(gt);
1214 if (i915_reset_count(gpu_error) != reset_count) {1287 if (i915_reset_count(gpu_error) != reset_count) {
1215 *stats = stats_saved;1288 *stats = stats_saved;
@@ -1241,8 +1314,8 @@ static void __reset_guc_busyness_stats(struct intel_guc *guc) · 25 unmodified lines
1241 1314
1242 spin_lock_irqsave(&guc->timestamp.lock, flags);1315 spin_lock_irqsave(&guc->timestamp.lock, flags);
1243 1316
1317 guc_update_pm_timestamp(guc, &unused);
1244 for_each_engine(engine, gt, id) {1318 for_each_engine(engine, gt, id) {
1245 guc_update_pm_timestamp(guc, engine, &unused);
1246 guc_update_engine_gt_clks(engine);1319 guc_update_engine_gt_clks(engine);
1247 engine->stats.guc.prev_total = 0;1320 engine->stats.guc.prev_total = 0;
1248 }1321 }
@@ -1259,10 +1332,11 @@ static void __update_guc_busyness_stats(struct intel_guc *guc) · 10 unmodified lines
1259 ktime_t unused;1332 ktime_t unused;
1260 1333
1261 spin_lock_irqsave(&guc->timestamp.lock, flags);1334 spin_lock_irqsave(&guc->timestamp.lock, flags);
1262 for_each_engine(engine, gt, id) {1335
1263 guc_update_pm_timestamp(guc, engine, &unused);1336 guc_update_pm_timestamp(guc, &unused);
1337 for_each_engine(engine, gt, id)
1264 guc_update_engine_gt_clks(engine);1338 guc_update_engine_gt_clks(engine);
1265 }1339
1266 spin_unlock_irqrestore(&guc->timestamp.lock, flags);1340 spin_unlock_irqrestore(&guc->timestamp.lock, flags);
1267}1341}
1268 1342
@@ -1335,10 +1409,15 @@ void intel_guc_busyness_park(struct intel_gt *gt) · 66 unmodified lines
1335void intel_guc_busyness_unpark(struct intel_gt *gt)1409void intel_guc_busyness_unpark(struct intel_gt *gt)
1336{1410{
1337 struct intel_guc *guc = &gt->uc.guc;1411 struct intel_guc *guc = &gt->uc.guc;
1412 unsigned long flags;
1413 ktime_t unused;
1338 1414
1339 if (!guc_submission_initialized(guc))1415 if (!guc_submission_initialized(guc))
1340 return;1416 return;
1341 1417
1418 spin_lock_irqsave(&guc->timestamp.lock, flags);
1419 guc_update_pm_timestamp(guc, &unused);
1420 spin_unlock_irqrestore(&guc->timestamp.lock, flags);
1342 mod_delayed_work(system_highpri_wq, &guc->timestamp.work,1421 mod_delayed_work(system_highpri_wq, &guc->timestamp.work,
1343 guc->timestamp.ping_delay);1422 guc->timestamp.ping_delay);
1344}1423}
@@ -1783,6 +1862,7 @@ int intel_guc_submission_init(struct intel_guc *guc) · 438 unmodified lines
1783 spin_lock_init(&guc->timestamp.lock);1862 spin_lock_init(&guc->timestamp.lock);
1784 INIT_DELAYED_WORK(&guc->timestamp.work, guc_timestamp_ping);1863 INIT_DELAYED_WORK(&guc->timestamp.work, guc_timestamp_ping);
1785 guc->timestamp.ping_delay = (POLL_TIME_CLKS / gt->clock_frequency + 1) * HZ;1864 guc->timestamp.ping_delay = (POLL_TIME_CLKS / gt->clock_frequency + 1) * HZ;
1865 guc->timestamp.shift = gpm_timestamp_shift(gt);
1786 1866
1787 return 0;1867 return 0;
1788}1868}
drivers/gpu/drm/i915/gvt/gtt.c+2−2
@@ -1148,7 +1148,7 @@ static inline void ppgtt_generate_shadow_entry(struct intel_gvt_gtt_entry *se, · 1147 unmodified lines
1148 ops->set_pfn(se, s->shadow_page.mfn);1148 ops->set_pfn(se, s->shadow_page.mfn);
1149}1149}
1150 1150
1151/**1151/*
1152 * Check if can do 2M page1152 * Check if can do 2M page
1153 * @vgpu: target vgpu1153 * @vgpu: target vgpu
1154 * @entry: target pfn's gtt entry1154 * @entry: target pfn's gtt entry
@@ -2193,7 +2193,7 @@ static int emulate_ggtt_mmio_read(struct intel_vgpu *vgpu, · 1038 unmodified lines
2193}2193}
2194 2194
2195/**2195/**
2196 * intel_vgpu_emulate_gtt_mmio_read - emulate GTT MMIO register read2196 * intel_vgpu_emulate_ggtt_mmio_read - emulate GTT MMIO register read
2197 * @vgpu: a vGPU2197 * @vgpu: a vGPU
2198 * @off: register offset2198 * @off: register offset
2199 * @p_data: data will be returned to guest2199 * @p_data: data will be returned to guest
drivers/gpu/drm/i915/i915_gpu_error.c+1−1
@@ -1522,7 +1522,7 @@ capture_engine(struct intel_engine_cs *engine, · 1521 unmodified lines
1522 struct i915_request *rq = NULL;1522 struct i915_request *rq = NULL;
1523 unsigned long flags;1523 unsigned long flags;
1524 1524
1525 ee = intel_engine_coredump_alloc(engine, GFP_KERNEL);1525 ee = intel_engine_coredump_alloc(engine, ALLOW_FAIL);
1526 if (!ee)1526 if (!ee)
1527 return NULL;1527 return NULL;
1528 1528
drivers/gpu/drm/i915/i915_mm.h+1−0
@@ -6,6 +6,7 @@ · 5 unmodified lines
6#ifndef __I915_MM_H__6#ifndef __I915_MM_H__
7#define __I915_MM_H__7#define __I915_MM_H__
8 8
9#include <linux/bug.h>
9#include <linux/types.h>10#include <linux/types.h>
10 11
11struct vm_area_struct;12struct vm_area_struct;
drivers/gpu/drm/i915/i915_reg.h+13−1
@@ -2684,7 +2684,8 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg) · 2683 unmodified lines
2684#define RING_WAIT (1 << 11) /* gen3+, PRBx_CTL */2684#define RING_WAIT (1 << 11) /* gen3+, PRBx_CTL */
2685#define RING_WAIT_SEMAPHORE (1 << 10) /* gen6+ */2685#define RING_WAIT_SEMAPHORE (1 << 10) /* gen6+ */
2686 2686
2687#define GUCPMTIMESTAMP _MMIO(0xC3E8)2687#define MISC_STATUS0 _MMIO(0xA500)
2688#define MISC_STATUS1 _MMIO(0xA504)
2688 2689
2689/* There are 16 64-bit CS General Purpose Registers per-engine on Gen8+ */2690/* There are 16 64-bit CS General Purpose Registers per-engine on Gen8+ */
2690#define GEN8_RING_CS_GPR(base, n) _MMIO((base) + 0x600 + (n) * 8)2691#define GEN8_RING_CS_GPR(base, n) _MMIO((base) + 0x600 + (n) * 8)
@@ -2721,6 +2722,12 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg) · 30 unmodified lines
2721#define GAMT_CHKN_DISABLE_DYNAMIC_CREDIT_SHARING (1 << 28)2722#define GAMT_CHKN_DISABLE_DYNAMIC_CREDIT_SHARING (1 << 28)
2722#define GAMT_CHKN_DISABLE_I2M_CYCLE_ON_WR_PORT (1 << 24)2723#define GAMT_CHKN_DISABLE_I2M_CYCLE_ON_WR_PORT (1 << 24)
2723 2724
2725#define GEN8_RTCR _MMIO(0x4260)
2726#define GEN8_M1TCR _MMIO(0x4264)
2727#define GEN8_M2TCR _MMIO(0x4268)
2728#define GEN8_BTCR _MMIO(0x426c)
2729#define GEN8_VTCR _MMIO(0x4270)
2730
2724#if 02731#if 0
2725#define PRB0_TAIL _MMIO(0x2030)2732#define PRB0_TAIL _MMIO(0x2030)
2726#define PRB0_HEAD _MMIO(0x2034)2733#define PRB0_HEAD _MMIO(0x2034)
@@ -2819,6 +2826,11 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg) · 92 unmodified lines
2819#define FAULT_VA_HIGH_BITS (0xf << 0)2826#define FAULT_VA_HIGH_BITS (0xf << 0)
2820#define FAULT_GTT_SEL (1 << 4)2827#define FAULT_GTT_SEL (1 << 4)
2821 2828
2829#define GEN12_GFX_TLB_INV_CR _MMIO(0xced8)
2830#define GEN12_VD_TLB_INV_CR _MMIO(0xcedc)
2831#define GEN12_VE_TLB_INV_CR _MMIO(0xcee0)
2832#define GEN12_BLT_TLB_INV_CR _MMIO(0xcee4)
2833
2822#define GEN12_AUX_ERR_DBG _MMIO(0x43f4)2834#define GEN12_AUX_ERR_DBG _MMIO(0x43f4)
2823 2835
2824#define FPGA_DBG _MMIO(0x42300)2836#define FPGA_DBG _MMIO(0x42300)
drivers/gpu/drm/i915/i915_vma.c+3−0
@@ -457,6 +457,9 @@ int i915_vma_bind(struct i915_vma *vma, · 456 unmodified lines
457 vma->ops->bind_vma(vma->vm, NULL, vma, cache_level, bind_flags);457 vma->ops->bind_vma(vma->vm, NULL, vma, cache_level, bind_flags);
458 }458 }
459 459
460 if (vma->obj)
461 set_bit(I915_BO_WAS_BOUND_BIT, &vma->obj->flags);
462
460 atomic_or(bind_flags, &vma->flags);463 atomic_or(bind_flags, &vma->flags);
461 return 0;464 return 0;
462}465}
drivers/gpu/drm/i915/intel_pm.c+122−25
@@ -4717,6 +4717,10 @@ static const struct dbuf_slice_conf_entry dg2_allowed_dbufs[] = { · 4716 unmodified lines
4717};4717};
4718 4718
4719static const struct dbuf_slice_conf_entry adlp_allowed_dbufs[] = {4719static const struct dbuf_slice_conf_entry adlp_allowed_dbufs[] = {
4720 /*
4721 * Keep the join_mbus cases first so check_mbus_joined()
4722 * will prefer them over the !join_mbus cases.
4723 */
4720 {4724 {
4721 .active_pipes = BIT(PIPE_A),4725 .active_pipes = BIT(PIPE_A),
4722 .dbuf_mask = {4726 .dbuf_mask = {
@@ -4731,6 +4735,20 @@ static const struct dbuf_slice_conf_entry adlp_allowed_dbufs[] = { · 8 unmodified lines
4731 },4735 },
4732 .join_mbus = true,4736 .join_mbus = true,
4733 },4737 },
4738 {
4739 .active_pipes = BIT(PIPE_A),
4740 .dbuf_mask = {
4741 [PIPE_A] = BIT(DBUF_S1) | BIT(DBUF_S2),
4742 },
4743 .join_mbus = false,
4744 },
4745 {
4746 .active_pipes = BIT(PIPE_B),
4747 .dbuf_mask = {
4748 [PIPE_B] = BIT(DBUF_S3) | BIT(DBUF_S4),
4749 },
4750 .join_mbus = false,
4751 },
4734 {4752 {
4735 .active_pipes = BIT(PIPE_A) | BIT(PIPE_B),4753 .active_pipes = BIT(PIPE_A) | BIT(PIPE_B),
4736 .dbuf_mask = {4754 .dbuf_mask = {
@@ -4835,7 +4853,7 @@ static bool check_mbus_joined(u8 active_pipes, · 98 unmodified lines
4835{4853{
4836 int i;4854 int i;
4837 4855
4838 for (i = 0; i < dbuf_slices[i].active_pipes; i++) {4856 for (i = 0; dbuf_slices[i].active_pipes != 0; i++) {
4839 if (dbuf_slices[i].active_pipes == active_pipes)4857 if (dbuf_slices[i].active_pipes == active_pipes)
4840 return dbuf_slices[i].join_mbus;4858 return dbuf_slices[i].join_mbus;
4841 }4859 }
@@ -4847,13 +4865,14 @@ static bool adlp_check_mbus_joined(u8 active_pipes) · 5 unmodified lines
4847 return check_mbus_joined(active_pipes, adlp_allowed_dbufs);4865 return check_mbus_joined(active_pipes, adlp_allowed_dbufs);
4848}4866}
4849 4867
4850static u8 compute_dbuf_slices(enum pipe pipe, u8 active_pipes,4868static u8 compute_dbuf_slices(enum pipe pipe, u8 active_pipes, bool join_mbus,
4851 const struct dbuf_slice_conf_entry *dbuf_slices)4869 const struct dbuf_slice_conf_entry *dbuf_slices)
4852{4870{
4853 int i;4871 int i;
4854 4872
4855 for (i = 0; i < dbuf_slices[i].active_pipes; i++) {4873 for (i = 0; dbuf_slices[i].active_pipes != 0; i++) {
4856 if (dbuf_slices[i].active_pipes == active_pipes)4874 if (dbuf_slices[i].active_pipes == active_pipes &&
4875 dbuf_slices[i].join_mbus == join_mbus)
4857 return dbuf_slices[i].dbuf_mask[pipe];4876 return dbuf_slices[i].dbuf_mask[pipe];
4858 }4877 }
4859 return 0;4878 return 0;
@@ -4864,7 +4883,7 @@ static u8 compute_dbuf_slices(enum pipe pipe, u8 active_pipes, · 4 unmodified lines
4864 * returns correspondent DBuf slice mask as stated in BSpec for particular4883 * returns correspondent DBuf slice mask as stated in BSpec for particular
4865 * platform.4884 * platform.
4866 */4885 */
4867static u8 icl_compute_dbuf_slices(enum pipe pipe, u8 active_pipes)4886static u8 icl_compute_dbuf_slices(enum pipe pipe, u8 active_pipes, bool join_mbus)
4868{4887{
4869 /*4888 /*
4870 * FIXME: For ICL this is still a bit unclear as prev BSpec revision4889 * FIXME: For ICL this is still a bit unclear as prev BSpec revision
@@ -4878,37 +4897,41 @@ static u8 icl_compute_dbuf_slices(enum pipe pipe, u8 active_pipes) · 7 unmodified lines
4878 * still here - we will need it once those additional constraints4897 * still here - we will need it once those additional constraints
4879 * pop up.4898 * pop up.
4880 */4899 */
4881 return compute_dbuf_slices(pipe, active_pipes, icl_allowed_dbufs);4900 return compute_dbuf_slices(pipe, active_pipes, join_mbus,
4901 icl_allowed_dbufs);
4882}4902}
4883 4903
4884static u8 tgl_compute_dbuf_slices(enum pipe pipe, u8 active_pipes)4904static u8 tgl_compute_dbuf_slices(enum pipe pipe, u8 active_pipes, bool join_mbus)
4885{4905{
4886 return compute_dbuf_slices(pipe, active_pipes, tgl_allowed_dbufs);4906 return compute_dbuf_slices(pipe, active_pipes, join_mbus,
4907 tgl_allowed_dbufs);
4887}4908}
4888 4909
4889static u32 adlp_compute_dbuf_slices(enum pipe pipe, u32 active_pipes)4910static u8 adlp_compute_dbuf_slices(enum pipe pipe, u8 active_pipes, bool join_mbus)
4890{4911{
4891 return compute_dbuf_slices(pipe, active_pipes, adlp_allowed_dbufs);4912 return compute_dbuf_slices(pipe, active_pipes, join_mbus,
4913 adlp_allowed_dbufs);
4892}4914}
4893 4915
4894static u32 dg2_compute_dbuf_slices(enum pipe pipe, u32 active_pipes)4916static u8 dg2_compute_dbuf_slices(enum pipe pipe, u8 active_pipes, bool join_mbus)
4895{4917{
4896 return compute_dbuf_slices(pipe, active_pipes, dg2_allowed_dbufs);4918 return compute_dbuf_slices(pipe, active_pipes, join_mbus,
4919 dg2_allowed_dbufs);
4897}4920}
4898 4921
4899static u8 skl_compute_dbuf_slices(struct intel_crtc *crtc, u8 active_pipes)4922static u8 skl_compute_dbuf_slices(struct intel_crtc *crtc, u8 active_pipes, bool join_mbus)
4900{4923{
4901 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);4924 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
4902 enum pipe pipe = crtc->pipe;4925 enum pipe pipe = crtc->pipe;
4903 4926
4904 if (IS_DG2(dev_priv))4927 if (IS_DG2(dev_priv))
4905 return dg2_compute_dbuf_slices(pipe, active_pipes);4928 return dg2_compute_dbuf_slices(pipe, active_pipes, join_mbus);
4906 else if (IS_ALDERLAKE_P(dev_priv))4929 else if (IS_ALDERLAKE_P(dev_priv))
4907 return adlp_compute_dbuf_slices(pipe, active_pipes);4930 return adlp_compute_dbuf_slices(pipe, active_pipes, join_mbus);
4908 else if (DISPLAY_VER(dev_priv) == 12)4931 else if (DISPLAY_VER(dev_priv) == 12)
4909 return tgl_compute_dbuf_slices(pipe, active_pipes);4932 return tgl_compute_dbuf_slices(pipe, active_pipes, join_mbus);
4910 else if (DISPLAY_VER(dev_priv) == 11)4933 else if (DISPLAY_VER(dev_priv) == 11)
4911 return icl_compute_dbuf_slices(pipe, active_pipes);4934 return icl_compute_dbuf_slices(pipe, active_pipes, join_mbus);
4912 /*4935 /*
4913 * For anything else just return one slice yet.4936 * For anything else just return one slice yet.
4914 * Should be extended for other platforms.4937 * Should be extended for other platforms.
@@ -6127,11 +6150,16 @@ skl_compute_ddb(struct intel_atomic_state *state) · 1212 unmodified lines
6127 return ret;6150 return ret;
6128 }6151 }
6129 6152
6153 if (IS_ALDERLAKE_P(dev_priv))
6154 new_dbuf_state->joined_mbus =
6155 adlp_check_mbus_joined(new_dbuf_state->active_pipes);
6156
6130 for_each_intel_crtc(&dev_priv->drm, crtc) {6157 for_each_intel_crtc(&dev_priv->drm, crtc) {
6131 enum pipe pipe = crtc->pipe;6158 enum pipe pipe = crtc->pipe;
6132 6159
6133 new_dbuf_state->slices[pipe] =6160 new_dbuf_state->slices[pipe] =
6134 skl_compute_dbuf_slices(crtc, new_dbuf_state->active_pipes);6161 skl_compute_dbuf_slices(crtc, new_dbuf_state->active_pipes,
6162 new_dbuf_state->joined_mbus);
6135 6163
6136 if (old_dbuf_state->slices[pipe] == new_dbuf_state->slices[pipe])6164 if (old_dbuf_state->slices[pipe] == new_dbuf_state->slices[pipe])
6137 continue;6165 continue;
@@ -6143,9 +6171,6 @@ skl_compute_ddb(struct intel_atomic_state *state) · 5 unmodified lines
6143 6171
6144 new_dbuf_state->enabled_slices = intel_dbuf_enabled_slices(new_dbuf_state);6172 new_dbuf_state->enabled_slices = intel_dbuf_enabled_slices(new_dbuf_state);
6145 6173
6146 if (IS_ALDERLAKE_P(dev_priv))
6147 new_dbuf_state->joined_mbus = adlp_check_mbus_joined(new_dbuf_state->active_pipes);
6148
6149 if (old_dbuf_state->enabled_slices != new_dbuf_state->enabled_slices ||6174 if (old_dbuf_state->enabled_slices != new_dbuf_state->enabled_slices ||
6150 old_dbuf_state->joined_mbus != new_dbuf_state->joined_mbus) {6175 old_dbuf_state->joined_mbus != new_dbuf_state->joined_mbus) {
6151 ret = intel_atomic_serialize_global_state(&new_dbuf_state->base);6176 ret = intel_atomic_serialize_global_state(&new_dbuf_state->base);
@@ -6626,6 +6651,7 @@ void skl_wm_get_hw_state(struct drm_i915_private *dev_priv) · 474 unmodified lines
6626 enum pipe pipe = crtc->pipe;6651 enum pipe pipe = crtc->pipe;
6627 unsigned int mbus_offset;6652 unsigned int mbus_offset;
6628 enum plane_id plane_id;6653 enum plane_id plane_id;
6654 u8 slices;
6629 6655
6630 skl_pipe_wm_get_hw_state(crtc, &crtc_state->wm.skl.optimal);6656 skl_pipe_wm_get_hw_state(crtc, &crtc_state->wm.skl.optimal);
6631 crtc_state->wm.skl.raw = crtc_state->wm.skl.optimal;6657 crtc_state->wm.skl.raw = crtc_state->wm.skl.optimal;
@@ -6645,19 +6671,22 @@ void skl_wm_get_hw_state(struct drm_i915_private *dev_priv) · 13 unmodified lines
6645 skl_ddb_entry_union(&dbuf_state->ddb[pipe], ddb_uv);6671 skl_ddb_entry_union(&dbuf_state->ddb[pipe], ddb_uv);
6646 }6672 }
6647 6673
6648 dbuf_state->slices[pipe] =
6649 skl_compute_dbuf_slices(crtc, dbuf_state->active_pipes);
6650
6651 dbuf_state->weight[pipe] = intel_crtc_ddb_weight(crtc_state);6674 dbuf_state->weight[pipe] = intel_crtc_ddb_weight(crtc_state);
6652 6675
6653 /*6676 /*
6654 * Used for checking overlaps, so we need absolute6677 * Used for checking overlaps, so we need absolute
6655 * offsets instead of MBUS relative offsets.6678 * offsets instead of MBUS relative offsets.
6656 */6679 */
6657 mbus_offset = mbus_ddb_offset(dev_priv, dbuf_state->slices[pipe]);6680 slices = skl_compute_dbuf_slices(crtc, dbuf_state->active_pipes,
6681 dbuf_state->joined_mbus);
6682 mbus_offset = mbus_ddb_offset(dev_priv, slices);
6658 crtc_state->wm.skl.ddb.start = mbus_offset + dbuf_state->ddb[pipe].start;6683 crtc_state->wm.skl.ddb.start = mbus_offset + dbuf_state->ddb[pipe].start;
6659 crtc_state->wm.skl.ddb.end = mbus_offset + dbuf_state->ddb[pipe].end;6684 crtc_state->wm.skl.ddb.end = mbus_offset + dbuf_state->ddb[pipe].end;
6660 6685
6686 /* The slices actually used by the planes on the pipe */
6687 dbuf_state->slices[pipe] =
6688 skl_ddb_dbuf_slice_mask(dev_priv, &crtc_state->wm.skl.ddb);
6689
6661 drm_dbg_kms(&dev_priv->drm,6690 drm_dbg_kms(&dev_priv->drm,
6662 "[CRTC:%d:%s] dbuf slices 0x%x, ddb (%d - %d), active pipes 0x%x, mbus joined: %s\n",6691 "[CRTC:%d:%s] dbuf slices 0x%x, ddb (%d - %d), active pipes 0x%x, mbus joined: %s\n",
6663 crtc->base.base.id, crtc->base.name,6692 crtc->base.base.id, crtc->base.name,
@@ -6669,6 +6698,74 @@ void skl_wm_get_hw_state(struct drm_i915_private *dev_priv) · 5 unmodified lines
6669 dbuf_state->enabled_slices = dev_priv->dbuf.enabled_slices;6698 dbuf_state->enabled_slices = dev_priv->dbuf.enabled_slices;
6670}6699}
6671 6700
6701static bool skl_dbuf_is_misconfigured(struct drm_i915_private *i915)
6702{
6703 const struct intel_dbuf_state *dbuf_state =
6704 to_intel_dbuf_state(i915->dbuf.obj.state);
6705 struct skl_ddb_entry entries[I915_MAX_PIPES] = {};
6706 struct intel_crtc *crtc;
6707
6708 for_each_intel_crtc(&i915->drm, crtc) {
6709 const struct intel_crtc_state *crtc_state =
6710 to_intel_crtc_state(crtc->base.state);
6711
6712 entries[crtc->pipe] = crtc_state->wm.skl.ddb;
6713 }
6714
6715 for_each_intel_crtc(&i915->drm, crtc) {
6716 const struct intel_crtc_state *crtc_state =
6717 to_intel_crtc_state(crtc->base.state);
6718 u8 slices;
6719
6720 slices = skl_compute_dbuf_slices(crtc, dbuf_state->active_pipes,
6721 dbuf_state->joined_mbus);
6722 if (dbuf_state->slices[crtc->pipe] & ~slices)
6723 return true;
6724
6725 if (skl_ddb_allocation_overlaps(&crtc_state->wm.skl.ddb, entries,
6726 I915_MAX_PIPES, crtc->pipe))
6727 return true;
6728 }
6729
6730 return false;
6731}
6732
6733void skl_wm_sanitize(struct drm_i915_private *i915)
6734{
6735 struct intel_crtc *crtc;
6736
6737 /*
6738 * On TGL/RKL (at least) the BIOS likes to assign the planes
6739 * to the wrong DBUF slices. This will cause an infinite loop
6740 * in skl_commit_modeset_enables() as it can't find a way to
6741 * transition between the old bogus DBUF layout to the new
6742 * proper DBUF layout without DBUF allocation overlaps between
6743 * the planes (which cannot be allowed or else the hardware
6744 * may hang). If we detect a bogus DBUF layout just turn off
6745 * all the planes so that skl_commit_modeset_enables() can
6746 * simply ignore them.
6747 */
6748 if (!skl_dbuf_is_misconfigured(i915))
6749 return;
6750
6751 drm_dbg_kms(&i915->drm, "BIOS has misprogrammed the DBUF, disabling all planes\n");
6752
6753 for_each_intel_crtc(&i915->drm, crtc) {
6754 struct intel_plane *plane = to_intel_plane(crtc->base.primary);
6755 const struct intel_plane_state *plane_state =
6756 to_intel_plane_state(plane->base.state);
6757 struct intel_crtc_state *crtc_state =
6758 to_intel_crtc_state(crtc->base.state);
6759
6760 if (plane_state->uapi.visible)
6761 intel_plane_disable_noatomic(crtc, plane);
6762
6763 drm_WARN_ON(&i915->drm, crtc_state->active_planes != 0);
6764
6765 memset(&crtc_state->wm.skl.ddb, 0, sizeof(crtc_state->wm.skl.ddb));
6766 }
6767}
6768
6672static void ilk_pipe_wm_get_hw_state(struct intel_crtc *crtc)6769static void ilk_pipe_wm_get_hw_state(struct intel_crtc *crtc)
6673{6770{
6674 struct drm_device *dev = crtc->base.dev;6771 struct drm_device *dev = crtc->base.dev;
drivers/gpu/drm/i915/intel_pm.h+1−0
@@ -47,6 +47,7 @@ void skl_pipe_wm_get_hw_state(struct intel_crtc *crtc, · 46 unmodified lines
47 struct skl_pipe_wm *out);47 struct skl_pipe_wm *out);
48void g4x_wm_sanitize(struct drm_i915_private *dev_priv);48void g4x_wm_sanitize(struct drm_i915_private *dev_priv);
49void vlv_wm_sanitize(struct drm_i915_private *dev_priv);49void vlv_wm_sanitize(struct drm_i915_private *dev_priv);
50void skl_wm_sanitize(struct drm_i915_private *dev_priv);
50bool intel_can_enable_sagv(struct drm_i915_private *dev_priv,51bool intel_can_enable_sagv(struct drm_i915_private *dev_priv,
51 const struct intel_bw_state *bw_state);52 const struct intel_bw_state *bw_state);
52void intel_sagv_pre_plane_update(struct intel_atomic_state *state);53void intel_sagv_pre_plane_update(struct intel_atomic_state *state);
drivers/gpu/drm/i915/intel_runtime_pm.c+1−3
@@ -68,9 +68,7 @@ static noinline depot_stack_handle_t __save_depot_stack(void) · 67 unmodified lines
68static void init_intel_runtime_pm_wakeref(struct intel_runtime_pm *rpm)68static void init_intel_runtime_pm_wakeref(struct intel_runtime_pm *rpm)
69{69{
70 spin_lock_init(&rpm->debug.lock);70 spin_lock_init(&rpm->debug.lock);
71 71 stack_depot_init();
72 if (rpm->available)
73 stack_depot_init();
74}72}
75 73
76static noinline depot_stack_handle_t74static noinline depot_stack_handle_t
drivers/gpu/drm/i915/intel_uncore.c+22−4
@@ -724,7 +724,8 @@ void intel_uncore_forcewake_get__locked(struct intel_uncore *uncore, · 723 unmodified lines
724}724}
725 725
726static void __intel_uncore_forcewake_put(struct intel_uncore *uncore,726static void __intel_uncore_forcewake_put(struct intel_uncore *uncore,
727 enum forcewake_domains fw_domains)727 enum forcewake_domains fw_domains,
728 bool delayed)
728{729{
729 struct intel_uncore_forcewake_domain *domain;730 struct intel_uncore_forcewake_domain *domain;
730 unsigned int tmp;731 unsigned int tmp;
@@ -739,7 +740,11 @@ static void __intel_uncore_forcewake_put(struct intel_uncore *uncore, · 8 unmodified lines
739 continue;740 continue;
740 }741 }
741 742
742 fw_domains_put(uncore, domain->mask);743 if (delayed &&
744 !(domain->uncore->fw_domains_timer & domain->mask))
745 fw_domain_arm_timer(domain);
746 else
747 fw_domains_put(uncore, domain->mask);
743 }748 }
744}749}
745 750
@@ -760,7 +765,20 @@ void intel_uncore_forcewake_put(struct intel_uncore *uncore, · 14 unmodified lines
760 return;765 return;
761 766
762 spin_lock_irqsave(&uncore->lock, irqflags);767 spin_lock_irqsave(&uncore->lock, irqflags);
763 __intel_uncore_forcewake_put(uncore, fw_domains);768 __intel_uncore_forcewake_put(uncore, fw_domains, false);
769 spin_unlock_irqrestore(&uncore->lock, irqflags);
770}
771
772void intel_uncore_forcewake_put_delayed(struct intel_uncore *uncore,
773 enum forcewake_domains fw_domains)
774{
775 unsigned long irqflags;
776
777 if (!uncore->fw_get_funcs)
778 return;
779
780 spin_lock_irqsave(&uncore->lock, irqflags);
781 __intel_uncore_forcewake_put(uncore, fw_domains, true);
764 spin_unlock_irqrestore(&uncore->lock, irqflags);782 spin_unlock_irqrestore(&uncore->lock, irqflags);
765}783}
766 784
@@ -802,7 +820,7 @@ void intel_uncore_forcewake_put__locked(struct intel_uncore *uncore, · 35 unmodified lines
802 if (!uncore->fw_get_funcs)820 if (!uncore->fw_get_funcs)
803 return;821 return;
804 822
805 __intel_uncore_forcewake_put(uncore, fw_domains);823 __intel_uncore_forcewake_put(uncore, fw_domains, false);
806}824}
807 825
808void assert_forcewakes_inactive(struct intel_uncore *uncore)826void assert_forcewakes_inactive(struct intel_uncore *uncore)
drivers/gpu/drm/i915/intel_uncore.h+2−0
@@ -246,6 +246,8 @@ void intel_uncore_forcewake_get(struct intel_uncore *uncore, · 245 unmodified lines
246 enum forcewake_domains domains);246 enum forcewake_domains domains);
247void intel_uncore_forcewake_put(struct intel_uncore *uncore,247void intel_uncore_forcewake_put(struct intel_uncore *uncore,
248 enum forcewake_domains domains);248 enum forcewake_domains domains);
249void intel_uncore_forcewake_put_delayed(struct intel_uncore *uncore,
250 enum forcewake_domains domains);
249void intel_uncore_forcewake_flush(struct intel_uncore *uncore,251void intel_uncore_forcewake_flush(struct intel_uncore *uncore,
250 enum forcewake_domains fw_domains);252 enum forcewake_domains fw_domains);
251 253
drivers/gpu/drm/kmb/kmb_plane.c+0−6
@@ -158,12 +158,6 @@ static void kmb_plane_atomic_disable(struct drm_plane *plane, · 157 unmodified lines
158 case LAYER_1:158 case LAYER_1:
159 kmb->plane_status[plane_id].ctrl = LCD_CTRL_VL2_ENABLE;159 kmb->plane_status[plane_id].ctrl = LCD_CTRL_VL2_ENABLE;
160 break;160 break;
161 case LAYER_2:
162 kmb->plane_status[plane_id].ctrl = LCD_CTRL_GL1_ENABLE;
163 break;
164 case LAYER_3:
165 kmb->plane_status[plane_id].ctrl = LCD_CTRL_GL2_ENABLE;
166 break;
167 }161 }
168 162
169 kmb->plane_status[plane_id].disable = true;163 kmb->plane_status[plane_id].disable = true;
drivers/gpu/drm/mediatek/mtk_dsi.c+84−83
@@ -786,18 +786,101 @@ void mtk_dsi_ddp_stop(struct device *dev) · 785 unmodified lines
786 mtk_dsi_poweroff(dsi);786 mtk_dsi_poweroff(dsi);
787}787}
788 788
789static int mtk_dsi_encoder_init(struct drm_device *drm, struct mtk_dsi *dsi)
790{
791 int ret;
792
793 ret = drm_simple_encoder_init(drm, &dsi->encoder,
794 DRM_MODE_ENCODER_DSI);
795 if (ret) {
796 DRM_ERROR("Failed to encoder init to drm\n");
797 return ret;
798 }
799
800 dsi->encoder.possible_crtcs = mtk_drm_find_possible_crtc_by_comp(drm, dsi->host.dev);
801
802 ret = drm_bridge_attach(&dsi->encoder, &dsi->bridge, NULL,
803 DRM_BRIDGE_ATTACH_NO_CONNECTOR);
804 if (ret)
805 goto err_cleanup_encoder;
806
807 dsi->connector = drm_bridge_connector_init(drm, &dsi->encoder);
808 if (IS_ERR(dsi->connector)) {
809 DRM_ERROR("Unable to create bridge connector\n");
810 ret = PTR_ERR(dsi->connector);
811 goto err_cleanup_encoder;
812 }
813 drm_connector_attach_encoder(dsi->connector, &dsi->encoder);
814
815 return 0;
816
817err_cleanup_encoder:
818 drm_encoder_cleanup(&dsi->encoder);
819 return ret;
820}
821
822static int mtk_dsi_bind(struct device *dev, struct device *master, void *data)
823{
824 int ret;
825 struct drm_device *drm = data;
826 struct mtk_dsi *dsi = dev_get_drvdata(dev);
827
828 ret = mtk_dsi_encoder_init(drm, dsi);
829 if (ret)
830 return ret;
831
832 return device_reset_optional(dev);
833}
834
835static void mtk_dsi_unbind(struct device *dev, struct device *master,
836 void *data)
837{
838 struct mtk_dsi *dsi = dev_get_drvdata(dev);
839
840 drm_encoder_cleanup(&dsi->encoder);
841}
842
843static const struct component_ops mtk_dsi_component_ops = {
844 .bind = mtk_dsi_bind,
845 .unbind = mtk_dsi_unbind,
846};
847
789static int mtk_dsi_host_attach(struct mipi_dsi_host *host,848static int mtk_dsi_host_attach(struct mipi_dsi_host *host,
790 struct mipi_dsi_device *device)849 struct mipi_dsi_device *device)
791{850{
792 struct mtk_dsi *dsi = host_to_dsi(host);851 struct mtk_dsi *dsi = host_to_dsi(host);
852 struct device *dev = host->dev;
853 int ret;
793 854
794 dsi->lanes = device->lanes;855 dsi->lanes = device->lanes;
795 dsi->format = device->format;856 dsi->format = device->format;
796 dsi->mode_flags = device->mode_flags;857 dsi->mode_flags = device->mode_flags;
858 dsi->next_bridge = devm_drm_of_get_bridge(dev, dev->of_node, 0, 0);
859 if (IS_ERR(dsi->next_bridge))
860 return PTR_ERR(dsi->next_bridge);
861
862 drm_bridge_add(&dsi->bridge);
863
864 ret = component_add(host->dev, &mtk_dsi_component_ops);
865 if (ret) {
866 DRM_ERROR("failed to add dsi_host component: %d\n", ret);
867 drm_bridge_remove(&dsi->bridge);
868 return ret;
869 }
797 870
798 return 0;871 return 0;
799}872}
800 873
874static int mtk_dsi_host_detach(struct mipi_dsi_host *host,
875 struct mipi_dsi_device *device)
876{
877 struct mtk_dsi *dsi = host_to_dsi(host);
878
879 component_del(host->dev, &mtk_dsi_component_ops);
880 drm_bridge_remove(&dsi->bridge);
881 return 0;
882}
883
801static void mtk_dsi_wait_for_idle(struct mtk_dsi *dsi)884static void mtk_dsi_wait_for_idle(struct mtk_dsi *dsi)
802{885{
803 int ret;886 int ret;
@@ -938,73 +1021,14 @@ static ssize_t mtk_dsi_host_transfer(struct mipi_dsi_host *host, · 134 unmodified lines
938 1021
939static const struct mipi_dsi_host_ops mtk_dsi_ops = {1022static const struct mipi_dsi_host_ops mtk_dsi_ops = {
940 .attach = mtk_dsi_host_attach,1023 .attach = mtk_dsi_host_attach,
1024 .detach = mtk_dsi_host_detach,
941 .transfer = mtk_dsi_host_transfer,1025 .transfer = mtk_dsi_host_transfer,
942};1026};
943 1027
944static int mtk_dsi_encoder_init(struct drm_device *drm, struct mtk_dsi *dsi)
945{
946 int ret;
947
948 ret = drm_simple_encoder_init(drm, &dsi->encoder,
949 DRM_MODE_ENCODER_DSI);
950 if (ret) {
951 DRM_ERROR("Failed to encoder init to drm\n");
952 return ret;
953 }
954
955 dsi->encoder.possible_crtcs = mtk_drm_find_possible_crtc_by_comp(drm, dsi->host.dev);
956
957 ret = drm_bridge_attach(&dsi->encoder, &dsi->bridge, NULL,
958 DRM_BRIDGE_ATTACH_NO_CONNECTOR);
959 if (ret)
960 goto err_cleanup_encoder;
961
962 dsi->connector = drm_bridge_connector_init(drm, &dsi->encoder);
963 if (IS_ERR(dsi->connector)) {
964 DRM_ERROR("Unable to create bridge connector\n");
965 ret = PTR_ERR(dsi->connector);
966 goto err_cleanup_encoder;
967 }
968 drm_connector_attach_encoder(dsi->connector, &dsi->encoder);
969
970 return 0;
971
972err_cleanup_encoder:
973 drm_encoder_cleanup(&dsi->encoder);
974 return ret;
975}
976
977static int mtk_dsi_bind(struct device *dev, struct device *master, void *data)
978{
979 int ret;
980 struct drm_device *drm = data;
981 struct mtk_dsi *dsi = dev_get_drvdata(dev);
982
983 ret = mtk_dsi_encoder_init(drm, dsi);
984 if (ret)
985 return ret;
986
987 return device_reset_optional(dev);
988}
989
990static void mtk_dsi_unbind(struct device *dev, struct device *master,
991 void *data)
992{
993 struct mtk_dsi *dsi = dev_get_drvdata(dev);
994
995 drm_encoder_cleanup(&dsi->encoder);
996}
997
998static const struct component_ops mtk_dsi_component_ops = {
999 .bind = mtk_dsi_bind,
1000 .unbind = mtk_dsi_unbind,
1001};
1002
1003static int mtk_dsi_probe(struct platform_device *pdev)1028static int mtk_dsi_probe(struct platform_device *pdev)
1004{1029{
1005 struct mtk_dsi *dsi;1030 struct mtk_dsi *dsi;
1006 struct device *dev = &pdev->dev;1031 struct device *dev = &pdev->dev;
1007 struct drm_panel *panel;
1008 struct resource *regs;1032 struct resource *regs;
1009 int irq_num;1033 int irq_num;
1010 int ret;1034 int ret;
@@ -1021,19 +1045,6 @@ static int mtk_dsi_probe(struct platform_device *pdev) · 10 unmodified lines
1021 return ret;1045 return ret;
1022 }1046 }
1023 1047
1024 ret = drm_of_find_panel_or_bridge(dev->of_node, 0, 0,
1025 &panel, &dsi->next_bridge);
1026 if (ret)
1027 goto err_unregister_host;
1028
1029 if (panel) {
1030 dsi->next_bridge = devm_drm_panel_bridge_add(dev, panel);
1031 if (IS_ERR(dsi->next_bridge)) {
1032 ret = PTR_ERR(dsi->next_bridge);
1033 goto err_unregister_host;
1034 }
1035 }
1036
1037 dsi->driver_data = of_device_get_match_data(dev);1048 dsi->driver_data = of_device_get_match_data(dev);
1038 1049
1039 dsi->engine_clk = devm_clk_get(dev, "engine");1050 dsi->engine_clk = devm_clk_get(dev, "engine");
@@ -1098,14 +1109,6 @@ static int mtk_dsi_probe(struct platform_device *pdev) · 58 unmodified lines
1098 dsi->bridge.of_node = dev->of_node;1109 dsi->bridge.of_node = dev->of_node;
1099 dsi->bridge.type = DRM_MODE_CONNECTOR_DSI;1110 dsi->bridge.type = DRM_MODE_CONNECTOR_DSI;
1100 1111
1101 drm_bridge_add(&dsi->bridge);
1102
1103 ret = component_add(&pdev->dev, &mtk_dsi_component_ops);
1104 if (ret) {
1105 dev_err(&pdev->dev, "failed to add component: %d\n", ret);
1106 goto err_unregister_host;
1107 }
1108
1109 return 0;1112 return 0;
1110 1113
1111err_unregister_host:1114err_unregister_host:
@@ -1118,8 +1121,6 @@ static int mtk_dsi_remove(struct platform_device *pdev) · 6 unmodified lines
1118 struct mtk_dsi *dsi = platform_get_drvdata(pdev);1121 struct mtk_dsi *dsi = platform_get_drvdata(pdev);
1119 1122
1120 mtk_output_dsi_disable(dsi);1123 mtk_output_dsi_disable(dsi);
1121 drm_bridge_remove(&dsi->bridge);
1122 component_del(&pdev->dev, &mtk_dsi_component_ops);
1123 mipi_dsi_host_unregister(&dsi->host);1124 mipi_dsi_host_unregister(&dsi->host);
1124 1125
1125 return 0;1126 return 0;
drivers/gpu/drm/msm/adreno/a6xx_gpu.c+2−0
@@ -1560,6 +1560,8 @@ static int a6xx_pm_suspend(struct msm_gpu *gpu) · 1559 unmodified lines
1560 for (i = 0; i < gpu->nr_rings; i++)1560 for (i = 0; i < gpu->nr_rings; i++)
1561 a6xx_gpu->shadow[i] = 0;1561 a6xx_gpu->shadow[i] = 0;
1562 1562
1563 gpu->suspend_count++;
1564
1563 return 0;1565 return 0;
1564}1566}
1565 1567
drivers/gpu/drm/msm/adreno/adreno_device.c+18−0
@@ -608,9 +608,27 @@ static int adreno_resume(struct device *dev) · 607 unmodified lines
608 return gpu->funcs->pm_resume(gpu);608 return gpu->funcs->pm_resume(gpu);
609}609}
610 610
611static int active_submits(struct msm_gpu *gpu)
612{
613 int active_submits;
614 mutex_lock(&gpu->active_lock);
615 active_submits = gpu->active_submits;
616 mutex_unlock(&gpu->active_lock);
617 return active_submits;
618}
619
611static int adreno_suspend(struct device *dev)620static int adreno_suspend(struct device *dev)
612{621{
613 struct msm_gpu *gpu = dev_to_gpu(dev);622 struct msm_gpu *gpu = dev_to_gpu(dev);
623 int remaining;
624
625 remaining = wait_event_timeout(gpu->retire_event,
626 active_submits(gpu) == 0,
627 msecs_to_jiffies(1000));
628 if (remaining == 0) {
629 dev_err(dev, "Timeout waiting for GPU to suspend\n");
630 return -EBUSY;
631 }
614 632
615 return gpu->funcs->pm_suspend(gpu);633 return gpu->funcs->pm_suspend(gpu);
616}634}
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c+9−2
@@ -26,9 +26,16 @@ static void dpu_setup_dspp_pcc(struct dpu_hw_dspp *ctx, · 25 unmodified lines
26 struct dpu_hw_pcc_cfg *cfg)26 struct dpu_hw_pcc_cfg *cfg)
27{27{
28 28
29 u32 base = ctx->cap->sblk->pcc.base;29 u32 base;
30 30
31 if (!ctx || !base) {31 if (!ctx) {
32 DRM_ERROR("invalid ctx %pK\n", ctx);
33 return;
34 }
35
36 base = ctx->cap->sblk->pcc.base;
37
38 if (!base) {
32 DRM_ERROR("invalid ctx %pK pcc base 0x%x\n", ctx, base);39 DRM_ERROR("invalid ctx %pK pcc base 0x%x\n", ctx, base);
33 return;40 return;
34 }41 }
drivers/gpu/drm/msm/dsi/dsi.c+6−1
@@ -40,7 +40,12 @@ static int dsi_get_phy(struct msm_dsi *msm_dsi) · 39 unmodified lines
40 40
41 of_node_put(phy_node);41 of_node_put(phy_node);
42 42
43 if (!phy_pdev || !msm_dsi->phy) {43 if (!phy_pdev) {
44 DRM_DEV_ERROR(&pdev->dev, "%s: phy driver is not ready\n", __func__);
45 return -EPROBE_DEFER;
46 }
47 if (!msm_dsi->phy) {
48 put_device(&phy_pdev->dev);
44 DRM_DEV_ERROR(&pdev->dev, "%s: phy driver is not ready\n", __func__);49 DRM_DEV_ERROR(&pdev->dev, "%s: phy driver is not ready\n", __func__);
45 return -EPROBE_DEFER;50 return -EPROBE_DEFER;
46 }51 }
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c+3−1
@@ -808,12 +808,14 @@ int msm_dsi_phy_enable(struct msm_dsi_phy *phy, · 807 unmodified lines
808 struct msm_dsi_phy_clk_request *clk_req,808 struct msm_dsi_phy_clk_request *clk_req,
809 struct msm_dsi_phy_shared_timings *shared_timings)809 struct msm_dsi_phy_shared_timings *shared_timings)
810{810{
811 struct device *dev = &phy->pdev->dev;811 struct device *dev;
812 int ret;812 int ret;
813 813
814 if (!phy || !phy->cfg->ops.enable)814 if (!phy || !phy->cfg->ops.enable)
815 return -EINVAL;815 return -EINVAL;
816 816
817 dev = &phy->pdev->dev;
818
817 ret = dsi_phy_enable_resource(phy);819 ret = dsi_phy_enable_resource(phy);
818 if (ret) {820 if (ret) {
819 DRM_DEV_ERROR(dev, "%s: resource enable failed, %d\n",821 DRM_DEV_ERROR(dev, "%s: resource enable failed, %d\n",
drivers/gpu/drm/msm/hdmi/hdmi.c+6−1
@@ -97,10 +97,15 @@ static int msm_hdmi_get_phy(struct hdmi *hdmi) · 96 unmodified lines
97 97
98 of_node_put(phy_node);98 of_node_put(phy_node);
99 99
100 if (!phy_pdev || !hdmi->phy) {100 if (!phy_pdev) {
101 DRM_DEV_ERROR(&pdev->dev, "phy driver is not ready\n");101 DRM_DEV_ERROR(&pdev->dev, "phy driver is not ready\n");
102 return -EPROBE_DEFER;102 return -EPROBE_DEFER;
103 }103 }
104 if (!hdmi->phy) {
105 DRM_DEV_ERROR(&pdev->dev, "phy driver is not ready\n");
106 put_device(&phy_pdev->dev);
107 return -EPROBE_DEFER;
108 }
104 109
105 hdmi->phy_dev = get_device(&phy_pdev->dev);110 hdmi->phy_dev = get_device(&phy_pdev->dev);
106 111
drivers/gpu/drm/msm/msm_drv.c+1−4
@@ -461,7 +461,7 @@ static int msm_init_vram(struct drm_device *dev) · 460 unmodified lines
461 of_node_put(node);461 of_node_put(node);
462 if (ret)462 if (ret)
463 return ret;463 return ret;
464 size = r.end - r.start;464 size = r.end - r.start + 1;
465 DRM_INFO("using VRAM carveout: %lx@%pa\n", size, &r.start);465 DRM_INFO("using VRAM carveout: %lx@%pa\n", size, &r.start);
466 466
467 /* if we have no IOMMU, then we need to use carveout allocator.467 /* if we have no IOMMU, then we need to use carveout allocator.
@@ -510,7 +510,6 @@ static int msm_drm_init(struct device *dev, const struct drm_driver *drv) · 42 unmodified lines
510 struct msm_drm_private *priv = dev_get_drvdata(dev);510 struct msm_drm_private *priv = dev_get_drvdata(dev);
511 struct drm_device *ddev;511 struct drm_device *ddev;
512 struct msm_kms *kms;512 struct msm_kms *kms;
513 struct msm_mdss *mdss;
514 int ret, i;513 int ret, i;
515 514
516 ddev = drm_dev_alloc(drv, dev);515 ddev = drm_dev_alloc(drv, dev);
@@ -521,8 +520,6 @@ static int msm_drm_init(struct device *dev, const struct drm_driver *drv) · 4 unmodified lines
521 ddev->dev_private = priv;520 ddev->dev_private = priv;
522 priv->dev = ddev;521 priv->dev = ddev;
523 522
524 mdss = priv->mdss;
525
526 priv->wq = alloc_ordered_workqueue("msm", 0);523 priv->wq = alloc_ordered_workqueue("msm", 0);
527 priv->hangcheck_period = DRM_MSM_HANGCHECK_DEFAULT_PERIOD;524 priv->hangcheck_period = DRM_MSM_HANGCHECK_DEFAULT_PERIOD;
528 525
drivers/gpu/drm/msm/msm_gpu.c+3−0
@@ -703,6 +703,8 @@ static void retire_submits(struct msm_gpu *gpu) · 702 unmodified lines
703 }703 }
704 }704 }
705 }705 }
706
707 wake_up_all(&gpu->retire_event);
706}708}
707 709
708static void retire_worker(struct kthread_work *work)710static void retire_worker(struct kthread_work *work)
@@ -848,6 +850,7 @@ int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev, · 139 unmodified lines
848 INIT_LIST_HEAD(&gpu->active_list);850 INIT_LIST_HEAD(&gpu->active_list);
849 mutex_init(&gpu->active_lock);851 mutex_init(&gpu->active_lock);
850 mutex_init(&gpu->lock);852 mutex_init(&gpu->lock);
853 init_waitqueue_head(&gpu->retire_event);
851 kthread_init_work(&gpu->retire_work, retire_worker);854 kthread_init_work(&gpu->retire_work, retire_worker);
852 kthread_init_work(&gpu->recover_work, recover_worker);855 kthread_init_work(&gpu->recover_work, recover_worker);
853 kthread_init_work(&gpu->fault_work, fault_worker);856 kthread_init_work(&gpu->fault_work, fault_worker);
drivers/gpu/drm/msm/msm_gpu.h+3−0
@@ -230,6 +230,9 @@ struct msm_gpu { · 229 unmodified lines
230 /* work for handling GPU recovery: */230 /* work for handling GPU recovery: */
231 struct kthread_work recover_work;231 struct kthread_work recover_work;
232 232
233 /** retire_event: notified when submits are retired: */
234 wait_queue_head_t retire_event;
235
233 /* work for handling active-list retiring: */236 /* work for handling active-list retiring: */
234 struct kthread_work retire_work;237 struct kthread_work retire_work;
235 238
drivers/gpu/drm/msm/msm_gpu_devfreq.c+19−2
@@ -133,6 +133,18 @@ void msm_devfreq_init(struct msm_gpu *gpu) · 132 unmodified lines
133 CLOCK_MONOTONIC, HRTIMER_MODE_REL);133 CLOCK_MONOTONIC, HRTIMER_MODE_REL);
134}134}
135 135
136static void cancel_idle_work(struct msm_gpu_devfreq *df)
137{
138 hrtimer_cancel(&df->idle_work.timer);
139 kthread_cancel_work_sync(&df->idle_work.work);
140}
141
142static void cancel_boost_work(struct msm_gpu_devfreq *df)
143{
144 hrtimer_cancel(&df->boost_work.timer);
145 kthread_cancel_work_sync(&df->boost_work.work);
146}
147
136void msm_devfreq_cleanup(struct msm_gpu *gpu)148void msm_devfreq_cleanup(struct msm_gpu *gpu)
137{149{
138 struct msm_gpu_devfreq *df = &gpu->devfreq;150 struct msm_gpu_devfreq *df = &gpu->devfreq;
@@ -152,7 +164,12 @@ void msm_devfreq_resume(struct msm_gpu *gpu) · 13 unmodified lines
152 164
153void msm_devfreq_suspend(struct msm_gpu *gpu)165void msm_devfreq_suspend(struct msm_gpu *gpu)
154{166{
155 devfreq_suspend_device(gpu->devfreq.devfreq);167 struct msm_gpu_devfreq *df = &gpu->devfreq;
168
169 devfreq_suspend_device(df->devfreq);
170
171 cancel_idle_work(df);
172 cancel_boost_work(df);
156}173}
157 174
158static void msm_devfreq_boost_work(struct kthread_work *work)175static void msm_devfreq_boost_work(struct kthread_work *work)
@@ -196,7 +213,7 @@ void msm_devfreq_active(struct msm_gpu *gpu) · 37 unmodified lines
196 /*213 /*
197 * Cancel any pending transition to idle frequency:214 * Cancel any pending transition to idle frequency:
198 */215 */
199 hrtimer_cancel(&df->idle_work.timer);216 cancel_idle_work(df);
200 217
201 idle_time = ktime_to_ms(ktime_sub(ktime_get(), df->idle_time));218 idle_time = ktime_to_ms(ktime_sub(ktime_get(), df->idle_time));
202 219
drivers/gpu/drm/mxsfb/mxsfb_kms.c+5−1
@@ -361,7 +361,11 @@ static void mxsfb_crtc_atomic_enable(struct drm_crtc *crtc, · 360 unmodified lines
361 bridge_state =361 bridge_state =
362 drm_atomic_get_new_bridge_state(state,362 drm_atomic_get_new_bridge_state(state,
363 mxsfb->bridge);363 mxsfb->bridge);
364 bus_format = bridge_state->input_bus_cfg.format;364 if (!bridge_state)
365 bus_format = MEDIA_BUS_FMT_FIXED;
366 else
367 bus_format = bridge_state->input_bus_cfg.format;
368
365 if (bus_format == MEDIA_BUS_FMT_FIXED) {369 if (bus_format == MEDIA_BUS_FMT_FIXED) {
366 dev_warn_once(drm->dev,370 dev_warn_once(drm->dev,
367 "Bridge does not provide bus format, assuming MEDIA_BUS_FMT_RGB888_1X24.\n"371 "Bridge does not provide bus format, assuming MEDIA_BUS_FMT_RGB888_1X24.\n"
drivers/gpu/drm/nouveau/nvkm/subdev/bios/base.c+1−1
@@ -38,7 +38,7 @@ nvbios_addr(struct nvkm_bios *bios, u32 *addr, u8 size) · 37 unmodified lines
38 *addr += bios->imaged_addr;38 *addr += bios->imaged_addr;
39 }39 }
40 40
41 if (unlikely(*addr + size >= bios->size)) {41 if (unlikely(*addr + size > bios->size)) {
42 nvkm_error(&bios->subdev, "OOB %d %08x %08x\n", size, p, *addr);42 nvkm_error(&bios->subdev, "OOB %d %08x %08x\n", size, p, *addr);
43 return false;43 return false;
44 }44 }
drivers/gpu/drm/panel/panel-simple.c+1−0
@@ -588,6 +588,7 @@ static int panel_simple_probe(struct device *dev, const struct panel_desc *desc) · 587 unmodified lines
588 err = panel_dpi_probe(dev, panel);588 err = panel_dpi_probe(dev, panel);
589 if (err)589 if (err)
590 goto free_ddc;590 goto free_ddc;
591 desc = panel->desc;
591 } else {592 } else {
592 if (!of_get_display_timing(dev->of_node, "panel-timing", &dt))593 if (!of_get_display_timing(dev->of_node, "panel-timing", &dt))
593 panel_simple_parse_panel_timing_node(dev, panel, &dt);594 panel_simple_parse_panel_timing_node(dev, panel, &dt);
drivers/gpu/drm/radeon/atombios_encoders.c+2−1
@@ -198,7 +198,8 @@ void radeon_atom_backlight_init(struct radeon_encoder *radeon_encoder, · 197 unmodified lines
198 * so don't register a backlight device198 * so don't register a backlight device
199 */199 */
200 if ((rdev->pdev->subsystem_vendor == PCI_VENDOR_ID_APPLE) &&200 if ((rdev->pdev->subsystem_vendor == PCI_VENDOR_ID_APPLE) &&
201 (rdev->pdev->device == 0x6741))201 (rdev->pdev->device == 0x6741) &&
202 !dmi_match(DMI_PRODUCT_NAME, "iMac12,1"))
202 return;203 return;
203 204
204 if (!radeon_encoder->enc_priv)205 if (!radeon_encoder->enc_priv)
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c+7−7
@@ -529,13 +529,6 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master, · 528 unmodified lines
529 return ret;529 return ret;
530 }530 }
531 531
532 ret = clk_prepare_enable(hdmi->vpll_clk);
533 if (ret) {
534 DRM_DEV_ERROR(hdmi->dev, "Failed to enable HDMI vpll: %d\n",
535 ret);
536 return ret;
537 }
538
539 hdmi->phy = devm_phy_optional_get(dev, "hdmi");532 hdmi->phy = devm_phy_optional_get(dev, "hdmi");
540 if (IS_ERR(hdmi->phy)) {533 if (IS_ERR(hdmi->phy)) {
541 ret = PTR_ERR(hdmi->phy);534 ret = PTR_ERR(hdmi->phy);
@@ -544,6 +537,13 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master, · 2 unmodified lines
544 return ret;537 return ret;
545 }538 }
546 539
540 ret = clk_prepare_enable(hdmi->vpll_clk);
541 if (ret) {
542 DRM_DEV_ERROR(hdmi->dev, "Failed to enable HDMI vpll: %d\n",
543 ret);
544 return ret;
545 }
546
547 drm_encoder_helper_add(encoder, &dw_hdmi_rockchip_encoder_helper_funcs);547 drm_encoder_helper_add(encoder, &dw_hdmi_rockchip_encoder_helper_funcs);
548 drm_simple_encoder_init(drm, encoder, DRM_MODE_ENCODER_TMDS);548 drm_simple_encoder_init(drm, encoder, DRM_MODE_ENCODER_TMDS);
549 549
drivers/gpu/drm/rockchip/rockchip_vop_reg.c+5−3
@@ -902,6 +902,7 @@ static const struct vop_win_phy rk3399_win01_data = { · 901 unmodified lines
902 .enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0),902 .enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0),
903 .format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1),903 .format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1),
904 .rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),904 .rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
905 .x_mir_en = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 21),
905 .y_mir_en = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 22),906 .y_mir_en = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 22),
906 .act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0),907 .act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0),
907 .dsp_info = VOP_REG(RK3288_WIN0_DSP_INFO, 0x0fff0fff, 0),908 .dsp_info = VOP_REG(RK3288_WIN0_DSP_INFO, 0x0fff0fff, 0),
@@ -912,6 +913,7 @@ static const struct vop_win_phy rk3399_win01_data = { · 4 unmodified lines
912 .uv_vir = VOP_REG(RK3288_WIN0_VIR, 0x3fff, 16),913 .uv_vir = VOP_REG(RK3288_WIN0_VIR, 0x3fff, 16),
913 .src_alpha_ctl = VOP_REG(RK3288_WIN0_SRC_ALPHA_CTRL, 0xff, 0),914 .src_alpha_ctl = VOP_REG(RK3288_WIN0_SRC_ALPHA_CTRL, 0xff, 0),
914 .dst_alpha_ctl = VOP_REG(RK3288_WIN0_DST_ALPHA_CTRL, 0xff, 0),915 .dst_alpha_ctl = VOP_REG(RK3288_WIN0_DST_ALPHA_CTRL, 0xff, 0),
916 .channel = VOP_REG(RK3288_WIN0_CTRL2, 0xff, 0),
915};917};
916 918
917/*919/*
@@ -922,11 +924,11 @@ static const struct vop_win_phy rk3399_win01_data = { · 4 unmodified lines
922static const struct vop_win_data rk3399_vop_win_data[] = {924static const struct vop_win_data rk3399_vop_win_data[] = {
923 { .base = 0x00, .phy = &rk3399_win01_data,925 { .base = 0x00, .phy = &rk3399_win01_data,
924 .type = DRM_PLANE_TYPE_PRIMARY },926 .type = DRM_PLANE_TYPE_PRIMARY },
925 { .base = 0x40, .phy = &rk3288_win01_data,927 { .base = 0x40, .phy = &rk3368_win01_data,
926 .type = DRM_PLANE_TYPE_OVERLAY },928 .type = DRM_PLANE_TYPE_OVERLAY },
927 { .base = 0x00, .phy = &rk3288_win23_data,929 { .base = 0x00, .phy = &rk3368_win23_data,
928 .type = DRM_PLANE_TYPE_OVERLAY },930 .type = DRM_PLANE_TYPE_OVERLAY },
929 { .base = 0x50, .phy = &rk3288_win23_data,931 { .base = 0x50, .phy = &rk3368_win23_data,
930 .type = DRM_PLANE_TYPE_CURSOR },932 .type = DRM_PLANE_TYPE_CURSOR },
931};933};
932 934
drivers/gpu/drm/vc4/vc4_crtc.c+0−1
@@ -671,7 +671,6 @@ static int vc4_crtc_atomic_check(struct drm_crtc *crtc, · 670 unmodified lines
671 const struct drm_display_mode *mode = &crtc_state->adjusted_mode;671 const struct drm_display_mode *mode = &crtc_state->adjusted_mode;
672 struct vc4_encoder *vc4_encoder = to_vc4_encoder(encoder);672 struct vc4_encoder *vc4_encoder = to_vc4_encoder(encoder);
673 673
674 mode = &crtc_state->adjusted_mode;
675 if (vc4_encoder->type == VC4_ENCODER_TYPE_HDMI0) {674 if (vc4_encoder->type == VC4_ENCODER_TYPE_HDMI0) {
676 vc4_state->hvs_load = max(mode->clock * mode->hdisplay / mode->htotal + 1000,675 vc4_state->hvs_load = max(mode->clock * mode->hdisplay / mode->htotal + 1000,
677 mode->clock * 9 / 10) * 1000;676 mode->clock * 9 / 10) * 1000;
drivers/gpu/drm/vc4/vc4_dsi.c+4−10
@@ -1262,7 +1262,6 @@ static int vc4_dsi_host_attach(struct mipi_dsi_host *host, · 1261 unmodified lines
1262 struct mipi_dsi_device *device)1262 struct mipi_dsi_device *device)
1263{1263{
1264 struct vc4_dsi *dsi = host_to_dsi(host);1264 struct vc4_dsi *dsi = host_to_dsi(host);
1265 int ret;
1266 1265
1267 dsi->lanes = device->lanes;1266 dsi->lanes = device->lanes;
1268 dsi->channel = device->channel;1267 dsi->channel = device->channel;
@@ -1297,18 +1296,15 @@ static int vc4_dsi_host_attach(struct mipi_dsi_host *host, · 28 unmodified lines
1297 return 0;1296 return 0;
1298 }1297 }
1299 1298
1300 ret = component_add(&dsi->pdev->dev, &vc4_dsi_ops);1299 return component_add(&dsi->pdev->dev, &vc4_dsi_ops);
1301 if (ret) {
1302 mipi_dsi_host_unregister(&dsi->dsi_host);
1303 return ret;
1304 }
1305
1306 return 0;
1307}1300}
1308 1301
1309static int vc4_dsi_host_detach(struct mipi_dsi_host *host,1302static int vc4_dsi_host_detach(struct mipi_dsi_host *host,
1310 struct mipi_dsi_device *device)1303 struct mipi_dsi_device *device)
1311{1304{
1305 struct vc4_dsi *dsi = host_to_dsi(host);
1306
1307 component_del(&dsi->pdev->dev, &vc4_dsi_ops);
1312 return 0;1308 return 0;
1313}1309}
1314 1310
@@ -1686,9 +1682,7 @@ static int vc4_dsi_dev_remove(struct platform_device *pdev) · 371 unmodified lines
1686 struct device *dev = &pdev->dev;1682 struct device *dev = &pdev->dev;
1687 struct vc4_dsi *dsi = dev_get_drvdata(dev);1683 struct vc4_dsi *dsi = dev_get_drvdata(dev);
1688 1684
1689 component_del(&pdev->dev, &vc4_dsi_ops);
1690 mipi_dsi_host_unregister(&dsi->dsi_host);1685 mipi_dsi_host_unregister(&dsi->dsi_host);
1691
1692 return 0;1686 return 0;
1693}1687}
1694 1688
drivers/gpu/drm/vc4/vc4_hdmi.c+20−9
@@ -196,14 +196,8 @@ vc4_hdmi_connector_detect(struct drm_connector *connector, bool force) · 195 unmodified lines
196 if (gpiod_get_value_cansleep(vc4_hdmi->hpd_gpio))196 if (gpiod_get_value_cansleep(vc4_hdmi->hpd_gpio))
197 connected = true;197 connected = true;
198 } else {198 } else {
199 unsigned long flags;199 if (vc4_hdmi->variant->hp_detect &&
200 u32 hotplug;200 vc4_hdmi->variant->hp_detect(vc4_hdmi))
201
202 spin_lock_irqsave(&vc4_hdmi->hw_lock, flags);
203 hotplug = HDMI_READ(HDMI_HOTPLUG);
204 spin_unlock_irqrestore(&vc4_hdmi->hw_lock, flags);
205
206 if (hotplug & VC4_HDMI_HOTPLUG_CONNECTED)
207 connected = true;201 connected = true;
208 }202 }
209 203
@@ -1251,6 +1245,7 @@ static int vc4_hdmi_encoder_atomic_check(struct drm_encoder *encoder, · 1041 unmodified lines
1251 unsigned long long tmds_rate;1245 unsigned long long tmds_rate;
1252 1246
1253 if (vc4_hdmi->variant->unsupported_odd_h_timings &&1247 if (vc4_hdmi->variant->unsupported_odd_h_timings &&
1248 !(mode->flags & DRM_MODE_FLAG_DBLCLK) &&
1254 ((mode->hdisplay % 2) || (mode->hsync_start % 2) ||1249 ((mode->hdisplay % 2) || (mode->hsync_start % 2) ||
1255 (mode->hsync_end % 2) || (mode->htotal % 2)))1250 (mode->hsync_end % 2) || (mode->htotal % 2)))
1256 return -EINVAL;1251 return -EINVAL;
@@ -1298,6 +1293,7 @@ vc4_hdmi_encoder_mode_valid(struct drm_encoder *encoder, · 41 unmodified lines
1298 struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);1293 struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
1299 1294
1300 if (vc4_hdmi->variant->unsupported_odd_h_timings &&1295 if (vc4_hdmi->variant->unsupported_odd_h_timings &&
1296 !(mode->flags & DRM_MODE_FLAG_DBLCLK) &&
1301 ((mode->hdisplay % 2) || (mode->hsync_start % 2) ||1297 ((mode->hdisplay % 2) || (mode->hsync_start % 2) ||
1302 (mode->hsync_end % 2) || (mode->htotal % 2)))1298 (mode->hsync_end % 2) || (mode->htotal % 2)))
1303 return MODE_H_ILLEGAL;1299 return MODE_H_ILLEGAL;
@@ -1343,6 +1339,18 @@ static u32 vc5_hdmi_channel_map(struct vc4_hdmi *vc4_hdmi, u32 channel_mask) · 39 unmodified lines
1343 return channel_map;1339 return channel_map;
1344}1340}
1345 1341
1342static bool vc5_hdmi_hp_detect(struct vc4_hdmi *vc4_hdmi)
1343{
1344 unsigned long flags;
1345 u32 hotplug;
1346
1347 spin_lock_irqsave(&vc4_hdmi->hw_lock, flags);
1348 hotplug = HDMI_READ(HDMI_HOTPLUG);
1349 spin_unlock_irqrestore(&vc4_hdmi->hw_lock, flags);
1350
1351 return !!(hotplug & VC4_HDMI_HOTPLUG_CONNECTED);
1352}
1353
1346/* HDMI audio codec callbacks */1354/* HDMI audio codec callbacks */
1347static void vc4_hdmi_audio_set_mai_clock(struct vc4_hdmi *vc4_hdmi,1355static void vc4_hdmi_audio_set_mai_clock(struct vc4_hdmi *vc4_hdmi,
1348 unsigned int samplerate)1356 unsigned int samplerate)
@@ -2504,7 +2512,8 @@ static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data) · 1155 unmodified lines
2504 * vc4_hdmi_disable_scrambling() will thus run at boot, make2512 * vc4_hdmi_disable_scrambling() will thus run at boot, make
2505 * sure it's disabled, and avoid any inconsistency.2513 * sure it's disabled, and avoid any inconsistency.
2506 */2514 */
2507 vc4_hdmi->scdc_enabled = true;2515 if (variant->max_pixel_clock > HDMI_14_MAX_TMDS_CLK)
2516 vc4_hdmi->scdc_enabled = true;
2508 2517
2509 ret = variant->init_resources(vc4_hdmi);2518 ret = variant->init_resources(vc4_hdmi);
2510 if (ret)2519 if (ret)
@@ -2723,6 +2732,7 @@ static const struct vc4_hdmi_variant bcm2711_hdmi0_variant = { · 212 unmodified lines
2723 .phy_rng_disable = vc5_hdmi_phy_rng_disable,2732 .phy_rng_disable = vc5_hdmi_phy_rng_disable,
2724 .channel_map = vc5_hdmi_channel_map,2733 .channel_map = vc5_hdmi_channel_map,
2725 .supports_hdr = true,2734 .supports_hdr = true,
2735 .hp_detect = vc5_hdmi_hp_detect,
2726};2736};
2727 2737
2728static const struct vc4_hdmi_variant bcm2711_hdmi1_variant = {2738static const struct vc4_hdmi_variant bcm2711_hdmi1_variant = {
@@ -2751,6 +2761,7 @@ static const struct vc4_hdmi_variant bcm2711_hdmi1_variant = { · 22 unmodified lines
2751 .phy_rng_disable = vc5_hdmi_phy_rng_disable,2761 .phy_rng_disable = vc5_hdmi_phy_rng_disable,
2752 .channel_map = vc5_hdmi_channel_map,2762 .channel_map = vc5_hdmi_channel_map,
2753 .supports_hdr = true,2763 .supports_hdr = true,
2764 .hp_detect = vc5_hdmi_hp_detect,
2754};2765};
2755 2766
2756static const struct of_device_id vc4_hdmi_dt_match[] = {2767static const struct of_device_id vc4_hdmi_dt_match[] = {
drivers/gpu/drm/vc4/vc4_hdmi.h+3−0
@@ -102,6 +102,9 @@ struct vc4_hdmi_variant { · 101 unmodified lines
102 102
103 /* Enables HDR metadata */103 /* Enables HDR metadata */
104 bool supports_hdr;104 bool supports_hdr;
105
106 /* Callback for hardware specific hotplug detect */
107 bool (*hp_detect)(struct vc4_hdmi *vc4_hdmi);
105};108};
106 109
107/* HDMI audio information */110/* HDMI audio information */
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h+2−3
@@ -1140,15 +1140,14 @@ extern int vmw_execbuf_fence_commands(struct drm_file *file_priv, · 1139 unmodified lines
1140 struct vmw_private *dev_priv,1140 struct vmw_private *dev_priv,
1141 struct vmw_fence_obj **p_fence,1141 struct vmw_fence_obj **p_fence,
1142 uint32_t *p_handle);1142 uint32_t *p_handle);
1143extern void vmw_execbuf_copy_fence_user(struct vmw_private *dev_priv,1143extern int vmw_execbuf_copy_fence_user(struct vmw_private *dev_priv,
1144 struct vmw_fpriv *vmw_fp,1144 struct vmw_fpriv *vmw_fp,
1145 int ret,1145 int ret,
1146 struct drm_vmw_fence_rep __user1146 struct drm_vmw_fence_rep __user
1147 *user_fence_rep,1147 *user_fence_rep,
1148 struct vmw_fence_obj *fence,1148 struct vmw_fence_obj *fence,
1149 uint32_t fence_handle,1149 uint32_t fence_handle,
1150 int32_t out_fence_fd,1150 int32_t out_fence_fd);
1151 struct sync_file *sync_file);
1152bool vmw_cmd_describe(const void *buf, u32 *size, char const **cmd);1151bool vmw_cmd_describe(const void *buf, u32 *size, char const **cmd);
1153 1152
1154/**1153/**
drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c+17−16
@@ -3879,17 +3879,17 @@ int vmw_execbuf_fence_commands(struct drm_file *file_priv, · 3878 unmodified lines
3879 * Also if copying fails, user-space will be unable to signal the fence object3879 * Also if copying fails, user-space will be unable to signal the fence object
3880 * so we wait for it immediately, and then unreference the user-space reference.3880 * so we wait for it immediately, and then unreference the user-space reference.
3881 */3881 */
3882void3882int
3883vmw_execbuf_copy_fence_user(struct vmw_private *dev_priv,3883vmw_execbuf_copy_fence_user(struct vmw_private *dev_priv,
3884 struct vmw_fpriv *vmw_fp, int ret,3884 struct vmw_fpriv *vmw_fp, int ret,
3885 struct drm_vmw_fence_rep __user *user_fence_rep,3885 struct drm_vmw_fence_rep __user *user_fence_rep,
3886 struct vmw_fence_obj *fence, uint32_t fence_handle,3886 struct vmw_fence_obj *fence, uint32_t fence_handle,
3887 int32_t out_fence_fd, struct sync_file *sync_file)3887 int32_t out_fence_fd)
3888{3888{
3889 struct drm_vmw_fence_rep fence_rep;3889 struct drm_vmw_fence_rep fence_rep;
3890 3890
3891 if (user_fence_rep == NULL)3891 if (user_fence_rep == NULL)
3892 return;3892 return 0;
3893 3893
3894 memset(&fence_rep, 0, sizeof(fence_rep));3894 memset(&fence_rep, 0, sizeof(fence_rep));
3895 3895
@@ -3917,19 +3917,13 @@ vmw_execbuf_copy_fence_user(struct vmw_private *dev_priv, · 21 unmodified lines
3917 * handle.3917 * handle.
3918 */3918 */
3919 if (unlikely(ret != 0) && (fence_rep.error == 0)) {3919 if (unlikely(ret != 0) && (fence_rep.error == 0)) {
3920 if (sync_file)
3921 fput(sync_file->file);
3922
3923 if (fence_rep.fd != -1) {
3924 put_unused_fd(fence_rep.fd);
3925 fence_rep.fd = -1;
3926 }
3927
3928 ttm_ref_object_base_unref(vmw_fp->tfile, fence_handle);3920 ttm_ref_object_base_unref(vmw_fp->tfile, fence_handle);
3929 VMW_DEBUG_USER("Fence copy error. Syncing.\n");3921 VMW_DEBUG_USER("Fence copy error. Syncing.\n");
3930 (void) vmw_fence_obj_wait(fence, false, false,3922 (void) vmw_fence_obj_wait(fence, false, false,
3931 VMW_FENCE_WAIT_TIMEOUT);3923 VMW_FENCE_WAIT_TIMEOUT);
3932 }3924 }
3925
3926 return ret ? -EFAULT : 0;
3933}3927}
3934 3928
3935/**3929/**
@@ -4266,16 +4260,23 @@ int vmw_execbuf_process(struct drm_file *file_priv, · 330 unmodified lines
4266 4260
4267 (void) vmw_fence_obj_wait(fence, false, false,4261 (void) vmw_fence_obj_wait(fence, false, false,
4268 VMW_FENCE_WAIT_TIMEOUT);4262 VMW_FENCE_WAIT_TIMEOUT);
4263 }
4264 }
4265
4266 ret = vmw_execbuf_copy_fence_user(dev_priv, vmw_fpriv(file_priv), ret,
4267 user_fence_rep, fence, handle, out_fence_fd);
4268
4269 if (sync_file) {
4270 if (ret) {
4271 /* usercopy of fence failed, put the file object */
4272 fput(sync_file->file);
4273 put_unused_fd(out_fence_fd);
4269 } else {4274 } else {
4270 /* Link the fence with the FD created earlier */4275 /* Link the fence with the FD created earlier */
4271 fd_install(out_fence_fd, sync_file->file);4276 fd_install(out_fence_fd, sync_file->file);
4272 }4277 }
4273 }4278 }
4274 4279
4275 vmw_execbuf_copy_fence_user(dev_priv, vmw_fpriv(file_priv), ret,
4276 user_fence_rep, fence, handle, out_fence_fd,
4277 sync_file);
4278
4279 /* Don't unreference when handing fence out */4280 /* Don't unreference when handing fence out */
4280 if (unlikely(out_fence != NULL)) {4281 if (unlikely(out_fence != NULL)) {
4281 *out_fence = fence;4282 *out_fence = fence;
@@ -4293,7 +4294,7 @@ int vmw_execbuf_process(struct drm_file *file_priv, · 11 unmodified lines
4293 */4294 */
4294 vmw_validation_unref_lists(&val_ctx);4295 vmw_validation_unref_lists(&val_ctx);
4295 4296
4296 return 0;4297 return ret;
4297 4298
4298out_unlock_binding:4299out_unlock_binding:
4299 mutex_unlock(&dev_priv->binding_mutex);4300 mutex_unlock(&dev_priv->binding_mutex);
drivers/gpu/drm/vmwgfx/vmwgfx_fence.c+1−1
@@ -1128,7 +1128,7 @@ int vmw_fence_event_ioctl(struct drm_device *dev, void *data, · 1127 unmodified lines
1128 }1128 }
1129 1129
1130 vmw_execbuf_copy_fence_user(dev_priv, vmw_fp, 0, user_fence_rep, fence,1130 vmw_execbuf_copy_fence_user(dev_priv, vmw_fp, 0, user_fence_rep, fence,
1131 handle, -1, NULL);1131 handle, -1);
1132 vmw_fence_obj_unreference(&fence);1132 vmw_fence_obj_unreference(&fence);
1133 return 0;1133 return 0;
1134out_no_create:1134out_no_create:
drivers/gpu/drm/vmwgfx/vmwgfx_kms.c+1−1
@@ -2501,7 +2501,7 @@ void vmw_kms_helper_validation_finish(struct vmw_private *dev_priv, · 2500 unmodified lines
2501 if (file_priv)2501 if (file_priv)
2502 vmw_execbuf_copy_fence_user(dev_priv, vmw_fpriv(file_priv),2502 vmw_execbuf_copy_fence_user(dev_priv, vmw_fpriv(file_priv),
2503 ret, user_fence_rep, fence,2503 ret, user_fence_rep, fence,
2504 handle, -1, NULL);2504 handle, -1);
2505 if (out_fence)2505 if (out_fence)
2506 *out_fence = fence;2506 *out_fence = fence;
2507 else2507 else
drivers/hid/amd-sfh-hid/amd_sfh_pcie.c+73−3
@@ -37,11 +37,11 @@ static int amd_sfh_wait_response_v2(struct amd_mp2_dev *mp2, u8 sid, u32 sensor_ · 36 unmodified lines
37{37{
38 union cmd_response cmd_resp;38 union cmd_response cmd_resp;
39 39
40 /* Get response with status within a max of 800 ms timeout */40 /* Get response with status within a max of 1600 ms timeout */
41 if (!readl_poll_timeout(mp2->mmio + AMD_P2C_MSG(0), cmd_resp.resp,41 if (!readl_poll_timeout(mp2->mmio + AMD_P2C_MSG(0), cmd_resp.resp,
42 (cmd_resp.response_v2.response == sensor_sts &&42 (cmd_resp.response_v2.response == sensor_sts &&
43 cmd_resp.response_v2.status == 0 && (sid == 0xff ||43 cmd_resp.response_v2.status == 0 && (sid == 0xff ||
44 cmd_resp.response_v2.sensor_id == sid)), 500, 800000))44 cmd_resp.response_v2.sensor_id == sid)), 500, 1600000))
45 return cmd_resp.response_v2.response;45 return cmd_resp.response_v2.response;
46 46
47 return SENSOR_DISABLED;47 return SENSOR_DISABLED;
@@ -53,6 +53,7 @@ static void amd_start_sensor_v2(struct amd_mp2_dev *privdata, struct amd_mp2_sen · 5 unmodified lines
53 53
54 cmd_base.ul = 0;54 cmd_base.ul = 0;
55 cmd_base.cmd_v2.cmd_id = ENABLE_SENSOR;55 cmd_base.cmd_v2.cmd_id = ENABLE_SENSOR;
56 cmd_base.cmd_v2.intr_disable = 1;
56 cmd_base.cmd_v2.period = info.period;57 cmd_base.cmd_v2.period = info.period;
57 cmd_base.cmd_v2.sensor_id = info.sensor_idx;58 cmd_base.cmd_v2.sensor_id = info.sensor_idx;
58 cmd_base.cmd_v2.length = 16;59 cmd_base.cmd_v2.length = 16;
@@ -70,6 +71,7 @@ static void amd_stop_sensor_v2(struct amd_mp2_dev *privdata, u16 sensor_idx) · 11 unmodified lines
70 71
71 cmd_base.ul = 0;72 cmd_base.ul = 0;
72 cmd_base.cmd_v2.cmd_id = DISABLE_SENSOR;73 cmd_base.cmd_v2.cmd_id = DISABLE_SENSOR;
74 cmd_base.cmd_v2.intr_disable = 1;
73 cmd_base.cmd_v2.period = 0;75 cmd_base.cmd_v2.period = 0;
74 cmd_base.cmd_v2.sensor_id = sensor_idx;76 cmd_base.cmd_v2.sensor_id = sensor_idx;
75 cmd_base.cmd_v2.length = 16;77 cmd_base.cmd_v2.length = 16;
@@ -83,12 +85,51 @@ static void amd_stop_all_sensor_v2(struct amd_mp2_dev *privdata) · 7 unmodified lines
83 union sfh_cmd_base cmd_base;85 union sfh_cmd_base cmd_base;
84 86
85 cmd_base.cmd_v2.cmd_id = STOP_ALL_SENSORS;87 cmd_base.cmd_v2.cmd_id = STOP_ALL_SENSORS;
88 cmd_base.cmd_v2.intr_disable = 1;
86 cmd_base.cmd_v2.period = 0;89 cmd_base.cmd_v2.period = 0;
87 cmd_base.cmd_v2.sensor_id = 0;90 cmd_base.cmd_v2.sensor_id = 0;
88 91
89 writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG0);92 writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG0);
90}93}
91 94
95static void amd_sfh_clear_intr_v2(struct amd_mp2_dev *privdata)
96{
97 if (readl(privdata->mmio + AMD_P2C_MSG(4))) {
98 writel(0, privdata->mmio + AMD_P2C_MSG(4));
99 writel(0xf, privdata->mmio + AMD_P2C_MSG(5));
100 }
101}
102
103static void amd_sfh_clear_intr(struct amd_mp2_dev *privdata)
104{
105 if (privdata->mp2_ops->clear_intr)
106 privdata->mp2_ops->clear_intr(privdata);
107}
108
109static irqreturn_t amd_sfh_irq_handler(int irq, void *data)
110{
111 amd_sfh_clear_intr(data);
112
113 return IRQ_HANDLED;
114}
115
116static int amd_sfh_irq_init_v2(struct amd_mp2_dev *privdata)
117{
118 int rc;
119
120 pci_intx(privdata->pdev, true);
121
122 rc = devm_request_irq(&privdata->pdev->dev, privdata->pdev->irq,
123 amd_sfh_irq_handler, 0, DRIVER_NAME, privdata);
124 if (rc) {
125 dev_err(&privdata->pdev->dev, "failed to request irq %d err=%d\n",
126 privdata->pdev->irq, rc);
127 return rc;
128 }
129
130 return 0;
131}
132
92void amd_start_sensor(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info)133void amd_start_sensor(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info)
93{134{
94 union sfh_cmd_param cmd_param;135 union sfh_cmd_param cmd_param;
@@ -193,6 +234,8 @@ static void amd_mp2_pci_remove(void *privdata) · 98 unmodified lines
193 struct amd_mp2_dev *mp2 = privdata;234 struct amd_mp2_dev *mp2 = privdata;
194 amd_sfh_hid_client_deinit(privdata);235 amd_sfh_hid_client_deinit(privdata);
195 mp2->mp2_ops->stop_all(mp2);236 mp2->mp2_ops->stop_all(mp2);
237 pci_intx(mp2->pdev, false);
238 amd_sfh_clear_intr(mp2);
196}239}
197 240
198static const struct amd_mp2_ops amd_sfh_ops_v2 = {241static const struct amd_mp2_ops amd_sfh_ops_v2 = {
@@ -200,6 +243,8 @@ static const struct amd_mp2_ops amd_sfh_ops_v2 = { · 1 unmodified line
200 .stop = amd_stop_sensor_v2,243 .stop = amd_stop_sensor_v2,
201 .stop_all = amd_stop_all_sensor_v2,244 .stop_all = amd_stop_all_sensor_v2,
202 .response = amd_sfh_wait_response_v2,245 .response = amd_sfh_wait_response_v2,
246 .clear_intr = amd_sfh_clear_intr_v2,
247 .init_intr = amd_sfh_irq_init_v2,
203};248};
204 249
205static const struct amd_mp2_ops amd_sfh_ops = {250static const struct amd_mp2_ops amd_sfh_ops = {
@@ -225,6 +270,14 @@ static void mp2_select_ops(struct amd_mp2_dev *privdata) · 19 unmodified lines
225 }270 }
226}271}
227 272
273static int amd_sfh_irq_init(struct amd_mp2_dev *privdata)
274{
275 if (privdata->mp2_ops->init_intr)
276 return privdata->mp2_ops->init_intr(privdata);
277
278 return 0;
279}
280
228static int amd_mp2_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)281static int amd_mp2_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
229{282{
230 struct amd_mp2_dev *privdata;283 struct amd_mp2_dev *privdata;
@@ -261,9 +314,20 @@ static int amd_mp2_pci_probe(struct pci_dev *pdev, const struct pci_device_id *i · 30 unmodified lines
261 314
262 mp2_select_ops(privdata);315 mp2_select_ops(privdata);
263 316
317 rc = amd_sfh_irq_init(privdata);
318 if (rc) {
319 dev_err(&pdev->dev, "amd_sfh_irq_init failed\n");
320 return rc;
321 }
322
264 rc = amd_sfh_hid_client_init(privdata);323 rc = amd_sfh_hid_client_init(privdata);
265 if (rc)324 if (rc) {
325 amd_sfh_clear_intr(privdata);
326 dev_err(&pdev->dev, "amd_sfh_hid_client_init failed\n");
266 return rc;327 return rc;
328 }
329
330 amd_sfh_clear_intr(privdata);
267 331
268 return devm_add_action_or_reset(&pdev->dev, amd_mp2_pci_remove, privdata);332 return devm_add_action_or_reset(&pdev->dev, amd_mp2_pci_remove, privdata);
269}333}
@@ -290,6 +354,9 @@ static int __maybe_unused amd_mp2_pci_resume(struct device *dev) · 20 unmodified lines
290 }354 }
291 }355 }
292 356
357 schedule_delayed_work(&cl_data->work_buffer, msecs_to_jiffies(AMD_SFH_IDLE_LOOP));
358 amd_sfh_clear_intr(mp2);
359
293 return 0;360 return 0;
294}361}
295 362
@@ -312,6 +379,9 @@ static int __maybe_unused amd_mp2_pci_suspend(struct device *dev) · 16 unmodified lines
312 }379 }
313 }380 }
314 381
382 cancel_delayed_work_sync(&cl_data->work_buffer);
383 amd_sfh_clear_intr(mp2);
384
315 return 0;385 return 0;
316}386}
317 387
drivers/hid/amd-sfh-hid/amd_sfh_pcie.h+3−1
@@ -49,7 +49,7 @@ union sfh_cmd_base { · 48 unmodified lines
49 } s;49 } s;
50 struct {50 struct {
51 u32 cmd_id : 4;51 u32 cmd_id : 4;
52 u32 intr_enable : 1;52 u32 intr_disable : 1;
53 u32 rsvd1 : 3;53 u32 rsvd1 : 3;
54 u32 length : 7;54 u32 length : 7;
55 u32 mem_type : 1;55 u32 mem_type : 1;
@@ -141,5 +141,7 @@ struct amd_mp2_ops { · 85 unmodified lines
141 void (*stop)(struct amd_mp2_dev *privdata, u16 sensor_idx);141 void (*stop)(struct amd_mp2_dev *privdata, u16 sensor_idx);
142 void (*stop_all)(struct amd_mp2_dev *privdata);142 void (*stop_all)(struct amd_mp2_dev *privdata);
143 int (*response)(struct amd_mp2_dev *mp2, u8 sid, u32 sensor_sts);143 int (*response)(struct amd_mp2_dev *mp2, u8 sid, u32 sensor_sts);
144 void (*clear_intr)(struct amd_mp2_dev *privdata);
145 int (*init_intr)(struct amd_mp2_dev *privdata);
144};146};
145#endif147#endif
drivers/hid/amd-sfh-hid/hid_descriptor/amd_sfh_hid_desc.c+3−1
@@ -27,6 +27,7 @@ · 26 unmodified lines
27#define HID_USAGE_SENSOR_STATE_READY_ENUM 0x0227#define HID_USAGE_SENSOR_STATE_READY_ENUM 0x02
28#define HID_USAGE_SENSOR_STATE_INITIALIZING_ENUM 0x0528#define HID_USAGE_SENSOR_STATE_INITIALIZING_ENUM 0x05
29#define HID_USAGE_SENSOR_EVENT_DATA_UPDATED_ENUM 0x0429#define HID_USAGE_SENSOR_EVENT_DATA_UPDATED_ENUM 0x04
30#define ILLUMINANCE_MASK GENMASK(14, 0)
30 31
31int get_report_descriptor(int sensor_idx, u8 *rep_desc)32int get_report_descriptor(int sensor_idx, u8 *rep_desc)
32{33{
@@ -246,7 +247,8 @@ u8 get_input_report(u8 current_index, int sensor_idx, int report_id, struct amd_ · 213 unmodified lines
246 get_common_inputs(&als_input.common_property, report_id);247 get_common_inputs(&als_input.common_property, report_id);
247 /* For ALS ,V2 Platforms uses C2P_MSG5 register instead of DRAM access method */248 /* For ALS ,V2 Platforms uses C2P_MSG5 register instead of DRAM access method */
248 if (supported_input == V2_STATUS)249 if (supported_input == V2_STATUS)
249 als_input.illuminance_value = (int)readl(privdata->mmio + AMD_C2P_MSG(5));250 als_input.illuminance_value =
251 readl(privdata->mmio + AMD_C2P_MSG(5)) & ILLUMINANCE_MASK;
250 else252 else
251 als_input.illuminance_value =253 als_input.illuminance_value =
252 (int)sensor_virt_addr[0] / AMD_SFH_FW_MULTIPLIER;254 (int)sensor_virt_addr[0] / AMD_SFH_FW_MULTIPLIER;
drivers/hid/hid-apple.c+8−8
@@ -691,49 +691,49 @@ static const struct hid_device_id apple_devices[] = { · 690 unmodified lines
691 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING5_ANSI),691 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING5_ANSI),
692 .driver_data = APPLE_HAS_FN },692 .driver_data = APPLE_HAS_FN },
693 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING5_ISO),693 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING5_ISO),
694 .driver_data = APPLE_HAS_FN },694 .driver_data = APPLE_HAS_FN | APPLE_ISO_TILDE_QUIRK },
695 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING5_JIS),695 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING5_JIS),
696 .driver_data = APPLE_HAS_FN | APPLE_RDESC_JIS },696 .driver_data = APPLE_HAS_FN | APPLE_RDESC_JIS },
697 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING6_ANSI),697 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING6_ANSI),
698 .driver_data = APPLE_HAS_FN },698 .driver_data = APPLE_HAS_FN },
699 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING6_ISO),699 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING6_ISO),
700 .driver_data = APPLE_HAS_FN },700 .driver_data = APPLE_HAS_FN | APPLE_ISO_TILDE_QUIRK },
701 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING6_JIS),701 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING6_JIS),
702 .driver_data = APPLE_HAS_FN | APPLE_RDESC_JIS },702 .driver_data = APPLE_HAS_FN | APPLE_RDESC_JIS },
703 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING6A_ANSI),703 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING6A_ANSI),
704 .driver_data = APPLE_HAS_FN },704 .driver_data = APPLE_HAS_FN },
705 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING6A_ISO),705 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING6A_ISO),
706 .driver_data = APPLE_HAS_FN },706 .driver_data = APPLE_HAS_FN | APPLE_ISO_TILDE_QUIRK },
707 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING6A_JIS),707 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING6A_JIS),
708 .driver_data = APPLE_HAS_FN | APPLE_RDESC_JIS },708 .driver_data = APPLE_HAS_FN | APPLE_RDESC_JIS },
709 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING5A_ANSI),709 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING5A_ANSI),
710 .driver_data = APPLE_HAS_FN },710 .driver_data = APPLE_HAS_FN },
711 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING5A_ISO),711 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING5A_ISO),
712 .driver_data = APPLE_HAS_FN },712 .driver_data = APPLE_HAS_FN | APPLE_ISO_TILDE_QUIRK },
713 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING5A_JIS),713 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING5A_JIS),
714 .driver_data = APPLE_HAS_FN | APPLE_RDESC_JIS },714 .driver_data = APPLE_HAS_FN | APPLE_RDESC_JIS },
715 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7_ANSI),715 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7_ANSI),
716 .driver_data = APPLE_HAS_FN },716 .driver_data = APPLE_HAS_FN },
717 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7_ISO),717 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7_ISO),
718 .driver_data = APPLE_HAS_FN },718 .driver_data = APPLE_HAS_FN | APPLE_ISO_TILDE_QUIRK },
719 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7_JIS),719 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7_JIS),
720 .driver_data = APPLE_HAS_FN | APPLE_RDESC_JIS },720 .driver_data = APPLE_HAS_FN | APPLE_RDESC_JIS },
721 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7A_ANSI),721 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7A_ANSI),
722 .driver_data = APPLE_HAS_FN },722 .driver_data = APPLE_HAS_FN },
723 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7A_ISO),723 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7A_ISO),
724 .driver_data = APPLE_HAS_FN },724 .driver_data = APPLE_HAS_FN | APPLE_ISO_TILDE_QUIRK },
725 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7A_JIS),725 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING7A_JIS),
726 .driver_data = APPLE_HAS_FN | APPLE_RDESC_JIS },726 .driver_data = APPLE_HAS_FN | APPLE_RDESC_JIS },
727 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING8_ANSI),727 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING8_ANSI),
728 .driver_data = APPLE_HAS_FN },728 .driver_data = APPLE_HAS_FN },
729 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING8_ISO),729 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING8_ISO),
730 .driver_data = APPLE_HAS_FN },730 .driver_data = APPLE_HAS_FN | APPLE_ISO_TILDE_QUIRK },
731 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING8_JIS),731 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING8_JIS),
732 .driver_data = APPLE_HAS_FN | APPLE_RDESC_JIS },732 .driver_data = APPLE_HAS_FN | APPLE_RDESC_JIS },
733 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING9_ANSI),733 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING9_ANSI),
734 .driver_data = APPLE_HAS_FN },734 .driver_data = APPLE_HAS_FN },
735 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING9_ISO),735 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING9_ISO),
736 .driver_data = APPLE_HAS_FN },736 .driver_data = APPLE_HAS_FN | APPLE_ISO_TILDE_QUIRK },
737 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING9_JIS),737 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING9_JIS),
738 .driver_data = APPLE_HAS_FN | APPLE_RDESC_JIS },738 .driver_data = APPLE_HAS_FN | APPLE_RDESC_JIS },
739 { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ANSI),739 { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ANSI),
drivers/hid/hid-elo.c+1−0
@@ -262,6 +262,7 @@ static int elo_probe(struct hid_device *hdev, const struct hid_device_id *id) · 261 unmodified lines
262 262
263 return 0;263 return 0;
264err_free:264err_free:
265 usb_put_dev(udev);
265 kfree(priv);266 kfree(priv);
266 return ret;267 return ret;
267}268}
drivers/hid/hid-ids.h+1−0
@@ -1370,6 +1370,7 @@ · 1369 unmodified lines
1370#define USB_VENDOR_ID_UGTIZER 0x21791370#define USB_VENDOR_ID_UGTIZER 0x2179
1371#define USB_DEVICE_ID_UGTIZER_TABLET_GP0610 0x00531371#define USB_DEVICE_ID_UGTIZER_TABLET_GP0610 0x0053
1372#define USB_DEVICE_ID_UGTIZER_TABLET_GT5040 0x00771372#define USB_DEVICE_ID_UGTIZER_TABLET_GT5040 0x0077
1373#define USB_DEVICE_ID_UGTIZER_TABLET_WP5540 0x0004
1373 1374
1374#define USB_VENDOR_ID_VIEWSONIC 0x05431375#define USB_VENDOR_ID_VIEWSONIC 0x0543
1375#define USB_DEVICE_ID_VIEWSONIC_PD1011 0xe6211376#define USB_DEVICE_ID_VIEWSONIC_PD1011 0xe621
drivers/hid/hid-quirks.c+1−0
@@ -187,6 +187,7 @@ static const struct hid_device_id hid_quirks[] = { · 186 unmodified lines
187 { HID_USB_DEVICE(USB_VENDOR_ID_TURBOX, USB_DEVICE_ID_TURBOX_KEYBOARD), HID_QUIRK_NOGET },187 { HID_USB_DEVICE(USB_VENDOR_ID_TURBOX, USB_DEVICE_ID_TURBOX_KEYBOARD), HID_QUIRK_NOGET },
188 { HID_USB_DEVICE(USB_VENDOR_ID_UCLOGIC, USB_DEVICE_ID_UCLOGIC_TABLET_KNA5), HID_QUIRK_MULTI_INPUT },188 { HID_USB_DEVICE(USB_VENDOR_ID_UCLOGIC, USB_DEVICE_ID_UCLOGIC_TABLET_KNA5), HID_QUIRK_MULTI_INPUT },
189 { HID_USB_DEVICE(USB_VENDOR_ID_UCLOGIC, USB_DEVICE_ID_UCLOGIC_TABLET_TWA60), HID_QUIRK_MULTI_INPUT },189 { HID_USB_DEVICE(USB_VENDOR_ID_UCLOGIC, USB_DEVICE_ID_UCLOGIC_TABLET_TWA60), HID_QUIRK_MULTI_INPUT },
190 { HID_USB_DEVICE(USB_VENDOR_ID_UGTIZER, USB_DEVICE_ID_UGTIZER_TABLET_WP5540), HID_QUIRK_MULTI_INPUT },
190 { HID_USB_DEVICE(USB_VENDOR_ID_WALTOP, USB_DEVICE_ID_WALTOP_MEDIA_TABLET_10_6_INCH), HID_QUIRK_MULTI_INPUT },191 { HID_USB_DEVICE(USB_VENDOR_ID_WALTOP, USB_DEVICE_ID_WALTOP_MEDIA_TABLET_10_6_INCH), HID_QUIRK_MULTI_INPUT },
191 { HID_USB_DEVICE(USB_VENDOR_ID_WALTOP, USB_DEVICE_ID_WALTOP_MEDIA_TABLET_14_1_INCH), HID_QUIRK_MULTI_INPUT },192 { HID_USB_DEVICE(USB_VENDOR_ID_WALTOP, USB_DEVICE_ID_WALTOP_MEDIA_TABLET_14_1_INCH), HID_QUIRK_MULTI_INPUT },
192 { HID_USB_DEVICE(USB_VENDOR_ID_WALTOP, USB_DEVICE_ID_WALTOP_SIRIUS_BATTERY_FREE_TABLET), HID_QUIRK_MULTI_INPUT },193 { HID_USB_DEVICE(USB_VENDOR_ID_WALTOP, USB_DEVICE_ID_WALTOP_SIRIUS_BATTERY_FREE_TABLET), HID_QUIRK_MULTI_INPUT },
drivers/hid/i2c-hid/i2c-hid-of-goodix.c+12−16
@@ -27,7 +27,6 @@ struct i2c_hid_of_goodix { · 26 unmodified lines
27 27
28 struct regulator *vdd;28 struct regulator *vdd;
29 struct notifier_block nb;29 struct notifier_block nb;
30 struct mutex regulator_mutex;
31 struct gpio_desc *reset_gpio;30 struct gpio_desc *reset_gpio;
32 const struct goodix_i2c_hid_timing_data *timings;31 const struct goodix_i2c_hid_timing_data *timings;
33};32};
@@ -67,8 +66,6 @@ static int ihid_goodix_vdd_notify(struct notifier_block *nb, · 33 unmodified lines
67 container_of(nb, struct i2c_hid_of_goodix, nb);66 container_of(nb, struct i2c_hid_of_goodix, nb);
68 int ret = NOTIFY_OK;67 int ret = NOTIFY_OK;
69 68
70 mutex_lock(&ihid_goodix->regulator_mutex);
71
72 switch (event) {69 switch (event) {
73 case REGULATOR_EVENT_PRE_DISABLE:70 case REGULATOR_EVENT_PRE_DISABLE:
74 gpiod_set_value_cansleep(ihid_goodix->reset_gpio, 1);71 gpiod_set_value_cansleep(ihid_goodix->reset_gpio, 1);
@@ -87,8 +84,6 @@ static int ihid_goodix_vdd_notify(struct notifier_block *nb, · 12 unmodified lines
87 break;84 break;
88 }85 }
89 86
90 mutex_unlock(&ihid_goodix->regulator_mutex);
91
92 return ret;87 return ret;
93}88}
94 89
@@ -102,8 +97,6 @@ static int i2c_hid_of_goodix_probe(struct i2c_client *client, · 7 unmodified lines
102 if (!ihid_goodix)97 if (!ihid_goodix)
103 return -ENOMEM;98 return -ENOMEM;
104 99
105 mutex_init(&ihid_goodix->regulator_mutex);
106
107 ihid_goodix->ops.power_up = goodix_i2c_hid_power_up;100 ihid_goodix->ops.power_up = goodix_i2c_hid_power_up;
108 ihid_goodix->ops.power_down = goodix_i2c_hid_power_down;101 ihid_goodix->ops.power_down = goodix_i2c_hid_power_down;
109 102
@@ -130,25 +123,28 @@ static int i2c_hid_of_goodix_probe(struct i2c_client *client, · 20 unmodified lines
130 * long. Holding the controller in reset apparently draws extra123 * long. Holding the controller in reset apparently draws extra
131 * power.124 * power.
132 */125 */
133 mutex_lock(&ihid_goodix->regulator_mutex);
134 ihid_goodix->nb.notifier_call = ihid_goodix_vdd_notify;126 ihid_goodix->nb.notifier_call = ihid_goodix_vdd_notify;
135 ret = devm_regulator_register_notifier(ihid_goodix->vdd, &ihid_goodix->nb);127 ret = devm_regulator_register_notifier(ihid_goodix->vdd, &ihid_goodix->nb);
136 if (ret) {128 if (ret)
137 mutex_unlock(&ihid_goodix->regulator_mutex);
138 return dev_err_probe(&client->dev, ret,129 return dev_err_probe(&client->dev, ret,
139 "regulator notifier request failed\n");130 "regulator notifier request failed\n");
140 }
141 131
142 /*132 /*
143 * If someone else is holding the regulator on (or the regulator is133 * If someone else is holding the regulator on (or the regulator is
144 * an always-on one) we might never be told to deassert reset. Do it134 * an always-on one) we might never be told to deassert reset. Do it
145 * now. Here we'll assume that someone else might have _just135 * now... and temporarily bump the regulator reference count just to
146 * barely_ turned the regulator on so we'll do the full136 * make sure it is impossible for this to race with our own notifier!
147 * "post_power_delay" just in case.137 * We also assume that someone else might have _just barely_ turned
138 * the regulator on so we'll do the full "post_power_delay" just in
139 * case.
148 */140 */
149 if (ihid_goodix->reset_gpio && regulator_is_enabled(ihid_goodix->vdd))141 if (ihid_goodix->reset_gpio && regulator_is_enabled(ihid_goodix->vdd)) {
142 ret = regulator_enable(ihid_goodix->vdd);
143 if (ret)
144 return ret;
150 goodix_i2c_hid_deassert_reset(ihid_goodix, true);145 goodix_i2c_hid_deassert_reset(ihid_goodix, true);
151 mutex_unlock(&ihid_goodix->regulator_mutex);146 regulator_disable(ihid_goodix->vdd);
147 }
152 148
153 return i2c_hid_core_probe(client, &ihid_goodix->ops, 0x0001, 0);149 return i2c_hid_core_probe(client, &ihid_goodix->ops, 0x0001, 0);
154}150}
drivers/hv/hv_balloon.c+7−0
@@ -1660,6 +1660,13 @@ static int balloon_connect_vsp(struct hv_device *dev) · 1659 unmodified lines
1660 unsigned long t;1660 unsigned long t;
1661 int ret;1661 int ret;
1662 1662
1663 /*
1664 * max_pkt_size should be large enough for one vmbus packet header plus
1665 * our receive buffer size. Hyper-V sends messages up to
1666 * HV_HYP_PAGE_SIZE bytes long on balloon channel.
1667 */
1668 dev->channel->max_pkt_size = HV_HYP_PAGE_SIZE * 2;
1669
1663 ret = vmbus_open(dev->channel, dm_ring_size, dm_ring_size, NULL, 0,1670 ret = vmbus_open(dev->channel, dm_ring_size, dm_ring_size, NULL, 0,
1664 balloon_onchannelcallback, dev);1671 balloon_onchannelcallback, dev);
1665 if (ret)1672 if (ret)
drivers/hv/hv_utils_transport.c+1−1
@@ -13,7 +13,7 @@ · 12 unmodified lines
13#include "hv_utils_transport.h"13#include "hv_utils_transport.h"
14 14
15static DEFINE_SPINLOCK(hvt_list_lock);15static DEFINE_SPINLOCK(hvt_list_lock);
16static struct list_head hvt_list = LIST_HEAD_INIT(hvt_list);16static LIST_HEAD(hvt_list);
17 17
18static void hvt_reset(struct hvutil_transport *hvt)18static void hvt_reset(struct hvutil_transport *hvt)
19{19{
drivers/hv/vmbus_drv.c+6−3
@@ -2028,8 +2028,10 @@ int vmbus_add_channel_kobj(struct hv_device *dev, struct vmbus_channel *channel) · 2027 unmodified lines
2028 kobj->kset = dev->channels_kset;2028 kobj->kset = dev->channels_kset;
2029 ret = kobject_init_and_add(kobj, &vmbus_chan_ktype, NULL,2029 ret = kobject_init_and_add(kobj, &vmbus_chan_ktype, NULL,
2030 "%u", relid);2030 "%u", relid);
2031 if (ret)2031 if (ret) {
2032 kobject_put(kobj);
2032 return ret;2033 return ret;
2034 }
2033 2035
2034 ret = sysfs_create_group(kobj, &vmbus_chan_group);2036 ret = sysfs_create_group(kobj, &vmbus_chan_group);
2035 2037
@@ -2038,6 +2040,7 @@ int vmbus_add_channel_kobj(struct hv_device *dev, struct vmbus_channel *channel) · 2 unmodified lines
2038 * The calling functions' error handling paths will cleanup the2040 * The calling functions' error handling paths will cleanup the
2039 * empty channel directory.2041 * empty channel directory.
2040 */2042 */
2043 kobject_put(kobj);
2041 dev_err(device, "Unable to set up channel sysfs files\n");2044 dev_err(device, "Unable to set up channel sysfs files\n");
2042 return ret;2045 return ret;
2043 }2046 }
@@ -2079,7 +2082,6 @@ struct hv_device *vmbus_device_create(const guid_t *type, · 35 unmodified lines
2079 return child_device_obj;2082 return child_device_obj;
2080}2083}
2081 2084
2082static u64 vmbus_dma_mask = DMA_BIT_MASK(64);
2083/*2085/*
2084 * vmbus_device_register - Register the child device2086 * vmbus_device_register - Register the child device
2085 */2087 */
@@ -2120,8 +2122,9 @@ int vmbus_device_register(struct hv_device *child_device_obj) · 34 unmodified lines
2120 }2122 }
2121 hv_debug_add_dev_dir(child_device_obj);2123 hv_debug_add_dev_dir(child_device_obj);
2122 2124
2123 child_device_obj->device.dma_mask = &vmbus_dma_mask;
2124 child_device_obj->device.dma_parms = &child_device_obj->dma_parms;2125 child_device_obj->device.dma_parms = &child_device_obj->dma_parms;
2126 child_device_obj->device.dma_mask = &child_device_obj->dma_mask;
2127 dma_set_mask(&child_device_obj->device, DMA_BIT_MASK(64));
2125 return 0;2128 return 0;
2126 2129
2127err_kset_unregister:2130err_kset_unregister:
drivers/hwmon/adt7470.c+3−0
@@ -662,6 +662,9 @@ static int adt7470_fan_write(struct device *dev, u32 attr, int channel, long val · 661 unmodified lines
662 struct adt7470_data *data = dev_get_drvdata(dev);662 struct adt7470_data *data = dev_get_drvdata(dev);
663 int err;663 int err;
664 664
665 if (val <= 0)
666 return -EINVAL;
667
665 val = FAN_RPM_TO_PERIOD(val);668 val = FAN_RPM_TO_PERIOD(val);
666 val = clamp_val(val, 1, 65534);669 val = clamp_val(val, 1, 65534);
667 670
drivers/hwmon/lm90.c+11−10
@@ -373,7 +373,7 @@ static const struct lm90_params lm90_params[] = { · 372 unmodified lines
373 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT373 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
374 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT,374 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT,
375 .alert_alarms = 0x7c,375 .alert_alarms = 0x7c,
376 .max_convrate = 8,376 .max_convrate = 7,
377 },377 },
378 [lm86] = {378 [lm86] = {
379 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT379 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
@@ -394,12 +394,13 @@ static const struct lm90_params lm90_params[] = { · 14 unmodified lines
394 .max_convrate = 9,394 .max_convrate = 9,
395 },395 },
396 [max6646] = {396 [max6646] = {
397 .flags = LM90_HAVE_CRIT,397 .flags = LM90_HAVE_CRIT | LM90_HAVE_BROKEN_ALERT,
398 .alert_alarms = 0x7c,398 .alert_alarms = 0x7c,
399 .max_convrate = 6,399 .max_convrate = 6,
400 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,400 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
401 },401 },
402 [max6654] = {402 [max6654] = {
403 .flags = LM90_HAVE_BROKEN_ALERT,
403 .alert_alarms = 0x7c,404 .alert_alarms = 0x7c,
404 .max_convrate = 7,405 .max_convrate = 7,
405 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,406 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
@@ -418,7 +419,7 @@ static const struct lm90_params lm90_params[] = { · 12 unmodified lines
418 },419 },
419 [max6680] = {420 [max6680] = {
420 .flags = LM90_HAVE_OFFSET | LM90_HAVE_CRIT421 .flags = LM90_HAVE_OFFSET | LM90_HAVE_CRIT
421 | LM90_HAVE_CRIT_ALRM_SWP,422 | LM90_HAVE_CRIT_ALRM_SWP | LM90_HAVE_BROKEN_ALERT,
422 .alert_alarms = 0x7c,423 .alert_alarms = 0x7c,
423 .max_convrate = 7,424 .max_convrate = 7,
424 },425 },
@@ -848,7 +849,7 @@ static int lm90_update_device(struct device *dev) · 423 unmodified lines
848 * Re-enable ALERT# output if it was originally enabled and849 * Re-enable ALERT# output if it was originally enabled and
849 * relevant alarms are all clear850 * relevant alarms are all clear
850 */851 */
851 if (!(data->config_orig & 0x80) &&852 if ((client->irq || !(data->config_orig & 0x80)) &&
852 !(data->alarms & data->alert_alarms)) {853 !(data->alarms & data->alert_alarms)) {
853 if (data->config & 0x80) {854 if (data->config & 0x80) {
854 dev_dbg(&client->dev, "Re-enabling ALERT#\n");855 dev_dbg(&client->dev, "Re-enabling ALERT#\n");
@@ -1807,22 +1808,22 @@ static bool lm90_is_tripped(struct i2c_client *client, u16 *status) · 952 unmodified lines
1807 1808
1808 if (st & LM90_STATUS_LLOW)1809 if (st & LM90_STATUS_LLOW)
1809 hwmon_notify_event(data->hwmon_dev, hwmon_temp,1810 hwmon_notify_event(data->hwmon_dev, hwmon_temp,
1810 hwmon_temp_min, 0);1811 hwmon_temp_min_alarm, 0);
1811 if (st & LM90_STATUS_RLOW)1812 if (st & LM90_STATUS_RLOW)
1812 hwmon_notify_event(data->hwmon_dev, hwmon_temp,1813 hwmon_notify_event(data->hwmon_dev, hwmon_temp,
1813 hwmon_temp_min, 1);1814 hwmon_temp_min_alarm, 1);
1814 if (st2 & MAX6696_STATUS2_R2LOW)1815 if (st2 & MAX6696_STATUS2_R2LOW)
1815 hwmon_notify_event(data->hwmon_dev, hwmon_temp,1816 hwmon_notify_event(data->hwmon_dev, hwmon_temp,
1816 hwmon_temp_min, 2);1817 hwmon_temp_min_alarm, 2);
1817 if (st & LM90_STATUS_LHIGH)1818 if (st & LM90_STATUS_LHIGH)
1818 hwmon_notify_event(data->hwmon_dev, hwmon_temp,1819 hwmon_notify_event(data->hwmon_dev, hwmon_temp,
1819 hwmon_temp_max, 0);1820 hwmon_temp_max_alarm, 0);
1820 if (st & LM90_STATUS_RHIGH)1821 if (st & LM90_STATUS_RHIGH)
1821 hwmon_notify_event(data->hwmon_dev, hwmon_temp,1822 hwmon_notify_event(data->hwmon_dev, hwmon_temp,
1822 hwmon_temp_max, 1);1823 hwmon_temp_max_alarm, 1);
1823 if (st2 & MAX6696_STATUS2_R2HIGH)1824 if (st2 & MAX6696_STATUS2_R2HIGH)
1824 hwmon_notify_event(data->hwmon_dev, hwmon_temp,1825 hwmon_notify_event(data->hwmon_dev, hwmon_temp,
1825 hwmon_temp_max, 2);1826 hwmon_temp_max_alarm, 2);
1826 1827
1827 return true;1828 return true;
1828}1829}
drivers/hwmon/nct6775.c+3−3
@@ -1175,7 +1175,7 @@ static inline u8 in_to_reg(u32 val, u8 nr) · 1174 unmodified lines
1175 1175
1176struct nct6775_data {1176struct nct6775_data {
1177 int addr; /* IO base of hw monitor block */1177 int addr; /* IO base of hw monitor block */
1178 int sioreg; /* SIO register address */1178 struct nct6775_sio_data *sio_data;
1179 enum kinds kind;1179 enum kinds kind;
1180 const char *name;1180 const char *name;
1181 1181
@@ -3559,7 +3559,7 @@ clear_caseopen(struct device *dev, struct device_attribute *attr, · 2377 unmodified lines
3559 const char *buf, size_t count)3559 const char *buf, size_t count)
3560{3560{
3561 struct nct6775_data *data = dev_get_drvdata(dev);3561 struct nct6775_data *data = dev_get_drvdata(dev);
3562 struct nct6775_sio_data *sio_data = dev_get_platdata(dev);3562 struct nct6775_sio_data *sio_data = data->sio_data;
3563 int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;3563 int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3564 unsigned long val;3564 unsigned long val;
3565 u8 reg;3565 u8 reg;
@@ -3967,7 +3967,7 @@ static int nct6775_probe(struct platform_device *pdev) · 401 unmodified lines
3967 return -ENOMEM;3967 return -ENOMEM;
3968 3968
3969 data->kind = sio_data->kind;3969 data->kind = sio_data->kind;
3970 data->sioreg = sio_data->sioreg;3970 data->sio_data = sio_data;
3971 3971
3972 if (sio_data->access == access_direct) {3972 if (sio_data->access == access_direct) {
3973 data->addr = res->start;3973 data->addr = res->start;
drivers/hwmon/pmbus/ir38064.c+1−1
@@ -62,7 +62,7 @@ static const struct i2c_device_id ir38064_id[] = { · 61 unmodified lines
62 62
63MODULE_DEVICE_TABLE(i2c, ir38064_id);63MODULE_DEVICE_TABLE(i2c, ir38064_id);
64 64
65static const struct of_device_id ir38064_of_match[] = {65static const struct of_device_id __maybe_unused ir38064_of_match[] = {
66 { .compatible = "infineon,ir38060" },66 { .compatible = "infineon,ir38060" },
67 { .compatible = "infineon,ir38064" },67 { .compatible = "infineon,ir38064" },
68 { .compatible = "infineon,ir38164" },68 { .compatible = "infineon,ir38164" },
drivers/i2c/busses/Kconfig+3−3
@@ -488,7 +488,7 @@ config I2C_BRCMSTB · 487 unmodified lines
488 488
489config I2C_CADENCE489config I2C_CADENCE
490 tristate "Cadence I2C Controller"490 tristate "Cadence I2C Controller"
491 depends on ARCH_ZYNQ || ARM64 || XTENSA491 depends on ARCH_ZYNQ || ARM64 || XTENSA || COMPILE_TEST
492 help492 help
493 Say yes here to select Cadence I2C Host Controller. This controller is493 Say yes here to select Cadence I2C Host Controller. This controller is
494 e.g. used by Xilinx Zynq.494 e.g. used by Xilinx Zynq.
@@ -680,7 +680,7 @@ config I2C_IMG · 185 unmodified lines
680 680
681config I2C_IMX681config I2C_IMX
682 tristate "IMX I2C interface"682 tristate "IMX I2C interface"
683 depends on ARCH_MXC || ARCH_LAYERSCAPE || COLDFIRE683 depends on ARCH_MXC || ARCH_LAYERSCAPE || COLDFIRE || COMPILE_TEST
684 select I2C_SLAVE684 select I2C_SLAVE
685 help685 help
686 Say Y here if you want to use the IIC bus controller on686 Say Y here if you want to use the IIC bus controller on
@@ -935,7 +935,7 @@ config I2C_QCOM_GENI · 248 unmodified lines
935 935
936config I2C_QUP936config I2C_QUP
937 tristate "Qualcomm QUP based I2C controller"937 tristate "Qualcomm QUP based I2C controller"
938 depends on ARCH_QCOM938 depends on ARCH_QCOM || COMPILE_TEST
939 help939 help
940 If you say yes to this option, support will be included for the940 If you say yes to this option, support will be included for the
941 built-in I2C interface on the Qualcomm SoCs.941 built-in I2C interface on the Qualcomm SoCs.
drivers/i2c/busses/i2c-bcm2835.c+11−0
@@ -23,6 +23,11 @@ · 22 unmodified lines
23#define BCM2835_I2C_FIFO 0x1023#define BCM2835_I2C_FIFO 0x10
24#define BCM2835_I2C_DIV 0x1424#define BCM2835_I2C_DIV 0x14
25#define BCM2835_I2C_DEL 0x1825#define BCM2835_I2C_DEL 0x18
26/*
27 * 16-bit field for the number of SCL cycles to wait after rising SCL
28 * before deciding the slave is not responding. 0 disables the
29 * timeout detection.
30 */
26#define BCM2835_I2C_CLKT 0x1c31#define BCM2835_I2C_CLKT 0x1c
27 32
28#define BCM2835_I2C_C_READ BIT(0)33#define BCM2835_I2C_C_READ BIT(0)
@@ -474,6 +479,12 @@ static int bcm2835_i2c_probe(struct platform_device *pdev) · 445 unmodified lines
474 adap->dev.of_node = pdev->dev.of_node;479 adap->dev.of_node = pdev->dev.of_node;
475 adap->quirks = of_device_get_match_data(&pdev->dev);480 adap->quirks = of_device_get_match_data(&pdev->dev);
476 481
482 /*
483 * Disable the hardware clock stretching timeout. SMBUS
484 * specifies a limit for how long the device can stretch the
485 * clock, but core I2C doesn't.
486 */
487 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_CLKT, 0);
477 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, 0);488 bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, 0);
478 489
479 ret = i2c_add_adapter(adap);490 ret = i2c_add_adapter(adap);
drivers/i2c/busses/i2c-brcmstb.c+1−1
@@ -673,7 +673,7 @@ static int brcmstb_i2c_probe(struct platform_device *pdev) · 672 unmodified lines
673 673
674 /* set the data in/out register size for compatible SoCs */674 /* set the data in/out register size for compatible SoCs */
675 if (of_device_is_compatible(dev->device->of_node,675 if (of_device_is_compatible(dev->device->of_node,
676 "brcmstb,brcmper-i2c"))676 "brcm,brcmper-i2c"))
677 dev->data_regsz = sizeof(u8);677 dev->data_regsz = sizeof(u8);
678 else678 else
679 dev->data_regsz = sizeof(u32);679 dev->data_regsz = sizeof(u32);
drivers/i2c/busses/i2c-qcom-cci.c+11−5
@@ -558,7 +558,7 @@ static int cci_probe(struct platform_device *pdev) · 557 unmodified lines
558 cci->master[idx].adap.quirks = &cci->data->quirks;558 cci->master[idx].adap.quirks = &cci->data->quirks;
559 cci->master[idx].adap.algo = &cci_algo;559 cci->master[idx].adap.algo = &cci_algo;
560 cci->master[idx].adap.dev.parent = dev;560 cci->master[idx].adap.dev.parent = dev;
561 cci->master[idx].adap.dev.of_node = child;561 cci->master[idx].adap.dev.of_node = of_node_get(child);
562 cci->master[idx].master = idx;562 cci->master[idx].master = idx;
563 cci->master[idx].cci = cci;563 cci->master[idx].cci = cci;
564 564
@@ -643,8 +643,10 @@ static int cci_probe(struct platform_device *pdev) · 78 unmodified lines
643 continue;643 continue;
644 644
645 ret = i2c_add_adapter(&cci->master[i].adap);645 ret = i2c_add_adapter(&cci->master[i].adap);
646 if (ret < 0)646 if (ret < 0) {
647 of_node_put(cci->master[i].adap.dev.of_node);
647 goto error_i2c;648 goto error_i2c;
649 }
648 }650 }
649 651
650 pm_runtime_set_autosuspend_delay(dev, MSEC_PER_SEC);652 pm_runtime_set_autosuspend_delay(dev, MSEC_PER_SEC);
@@ -655,9 +657,11 @@ static int cci_probe(struct platform_device *pdev) · 4 unmodified lines
655 return 0;657 return 0;
656 658
657error_i2c:659error_i2c:
658 for (; i >= 0; i--) {660 for (--i ; i >= 0; i--) {
659 if (cci->master[i].cci)661 if (cci->master[i].cci) {
660 i2c_del_adapter(&cci->master[i].adap);662 i2c_del_adapter(&cci->master[i].adap);
663 of_node_put(cci->master[i].adap.dev.of_node);
664 }
661 }665 }
662error:666error:
663 disable_irq(cci->irq);667 disable_irq(cci->irq);
@@ -673,8 +677,10 @@ static int cci_remove(struct platform_device *pdev) · 9 unmodified lines
673 int i;677 int i;
674 678
675 for (i = 0; i < cci->data->num_masters; i++) {679 for (i = 0; i < cci->data->num_masters; i++) {
676 if (cci->master[i].cci)680 if (cci->master[i].cci) {
677 i2c_del_adapter(&cci->master[i].adap);681 i2c_del_adapter(&cci->master[i].adap);
682 of_node_put(cci->master[i].adap.dev.of_node);
683 }
678 cci_halt(cci, i);684 cci_halt(cci, i);
679 }685 }
680 686
drivers/iio/industrialio-buffer.c+11−3
@@ -1569,9 +1569,17 @@ static long iio_device_buffer_getfd(struct iio_dev *indio_dev, unsigned long arg · 1568 unmodified lines
1569 }1569 }
1570 1570
1571 if (copy_to_user(ival, &fd, sizeof(fd))) {1571 if (copy_to_user(ival, &fd, sizeof(fd))) {
1572 put_unused_fd(fd);1572 /*
1573 ret = -EFAULT;1573 * "Leak" the fd, as there's not much we can do about this
1574 goto error_free_ib;1574 * anyway. 'fd' might have been closed already, as
1575 * anon_inode_getfd() called fd_install() on it, which made
1576 * it reachable by userland.
1577 *
1578 * Instead of allowing a malicious user to play tricks with
1579 * us, rely on the process exit path to do any necessary
1580 * cleanup, as in releasing the file, if still needed.
1581 */
1582 return -EFAULT;
1575 }1583 }
1576 1584
1577 return 0;1585 return 0;
drivers/infiniband/core/cm.c+1−1
@@ -3322,7 +3322,7 @@ static int cm_lap_handler(struct cm_work *work) · 3321 unmodified lines
3322 ret = cm_init_av_by_path(param->alternate_path, NULL, &alt_av);3322 ret = cm_init_av_by_path(param->alternate_path, NULL, &alt_av);
3323 if (ret) {3323 if (ret) {
3324 rdma_destroy_ah_attr(&ah_attr);3324 rdma_destroy_ah_attr(&ah_attr);
3325 return -EINVAL;3325 goto deref;
3326 }3326 }
3327 3327
3328 spin_lock_irq(&cm_id_priv->lock);3328 spin_lock_irq(&cm_id_priv->lock);
drivers/infiniband/core/cma.c+12−10
@@ -67,8 +67,8 @@ static const char * const cma_events[] = { · 66 unmodified lines
67 [RDMA_CM_EVENT_TIMEWAIT_EXIT] = "timewait exit",67 [RDMA_CM_EVENT_TIMEWAIT_EXIT] = "timewait exit",
68};68};
69 69
70static void cma_set_mgid(struct rdma_id_private *id_priv, struct sockaddr *addr,70static void cma_iboe_set_mgid(struct sockaddr *addr, union ib_gid *mgid,
71 union ib_gid *mgid);71 enum ib_gid_type gid_type);
72 72
73const char *__attribute_const__ rdma_event_msg(enum rdma_cm_event_type event)73const char *__attribute_const__ rdma_event_msg(enum rdma_cm_event_type event)
74{74{
@@ -1846,17 +1846,19 @@ static void destroy_mc(struct rdma_id_private *id_priv, · 1771 unmodified lines
1846 if (dev_addr->bound_dev_if)1846 if (dev_addr->bound_dev_if)
1847 ndev = dev_get_by_index(dev_addr->net,1847 ndev = dev_get_by_index(dev_addr->net,
1848 dev_addr->bound_dev_if);1848 dev_addr->bound_dev_if);
1849 if (ndev) {1849 if (ndev && !send_only) {
1850 enum ib_gid_type gid_type;
1850 union ib_gid mgid;1851 union ib_gid mgid;
1851 1852
1852 cma_set_mgid(id_priv, (struct sockaddr *)&mc->addr,1853 gid_type = id_priv->cma_dev->default_gid_type
1853 &mgid);1854 [id_priv->id.port_num -
1854 1855 rdma_start_port(
1855 if (!send_only)1856 id_priv->cma_dev->device)];
1856 cma_igmp_send(ndev, &mgid, false);1857 cma_iboe_set_mgid((struct sockaddr *)&mc->addr, &mgid,
1857 1858 gid_type);
1858 dev_put(ndev);1859 cma_igmp_send(ndev, &mgid, false);
1859 }1860 }
1861 dev_put(ndev);
1860 1862
1861 cancel_work_sync(&mc->iboe_join.work);1863 cancel_work_sync(&mc->iboe_join.work);
1862 }1864 }
drivers/infiniband/core/ucma.c+23−11
@@ -95,6 +95,7 @@ struct ucma_context { · 94 unmodified lines
95 u64 uid;95 u64 uid;
96 96
97 struct list_head list;97 struct list_head list;
98 struct list_head mc_list;
98 struct work_struct close_work;99 struct work_struct close_work;
99};100};
100 101
@@ -105,6 +106,7 @@ struct ucma_multicast { · 4 unmodified lines
105 106
106 u64 uid;107 u64 uid;
107 u8 join_state;108 u8 join_state;
109 struct list_head list;
108 struct sockaddr_storage addr;110 struct sockaddr_storage addr;
109};111};
110 112
@@ -198,6 +200,7 @@ static struct ucma_context *ucma_alloc_ctx(struct ucma_file *file) · 87 unmodified lines
198 200
199 INIT_WORK(&ctx->close_work, ucma_close_id);201 INIT_WORK(&ctx->close_work, ucma_close_id);
200 init_completion(&ctx->comp);202 init_completion(&ctx->comp);
203 INIT_LIST_HEAD(&ctx->mc_list);
201 /* So list_del() will work if we don't do ucma_finish_ctx() */204 /* So list_del() will work if we don't do ucma_finish_ctx() */
202 INIT_LIST_HEAD(&ctx->list);205 INIT_LIST_HEAD(&ctx->list);
203 ctx->file = file;206 ctx->file = file;
@@ -484,19 +487,19 @@ err1: · 280 unmodified lines
484 487
485static void ucma_cleanup_multicast(struct ucma_context *ctx)488static void ucma_cleanup_multicast(struct ucma_context *ctx)
486{489{
487 struct ucma_multicast *mc;490 struct ucma_multicast *mc, *tmp;
488 unsigned long index;
489 491
490 xa_for_each(&multicast_table, index, mc) {492 xa_lock(&multicast_table);
491 if (mc->ctx != ctx)493 list_for_each_entry_safe(mc, tmp, &ctx->mc_list, list) {
492 continue;494 list_del(&mc->list);
493 /*495 /*
494 * At this point mc->ctx->ref is 0 so the mc cannot leave the496 * At this point mc->ctx->ref is 0 so the mc cannot leave the
495 * lock on the reader and this is enough serialization497 * lock on the reader and this is enough serialization
496 */498 */
497 xa_erase(&multicast_table, index);499 __xa_erase(&multicast_table, mc->id);
498 kfree(mc);500 kfree(mc);
499 }501 }
502 xa_unlock(&multicast_table);
500}503}
501 504
502static void ucma_cleanup_mc_events(struct ucma_multicast *mc)505static void ucma_cleanup_mc_events(struct ucma_multicast *mc)
@@ -1469,12 +1472,16 @@ static ssize_t ucma_process_join(struct ucma_file *file, · 966 unmodified lines
1469 mc->uid = cmd->uid;1472 mc->uid = cmd->uid;
1470 memcpy(&mc->addr, addr, cmd->addr_size);1473 memcpy(&mc->addr, addr, cmd->addr_size);
1471 1474
1472 if (xa_alloc(&multicast_table, &mc->id, NULL, xa_limit_32b,1475 xa_lock(&multicast_table);
1476 if (__xa_alloc(&multicast_table, &mc->id, NULL, xa_limit_32b,
1473 GFP_KERNEL)) {1477 GFP_KERNEL)) {
1474 ret = -ENOMEM;1478 ret = -ENOMEM;
1475 goto err_free_mc;1479 goto err_free_mc;
1476 }1480 }
1477 1481
1482 list_add_tail(&mc->list, &ctx->mc_list);
1483 xa_unlock(&multicast_table);
1484
1478 mutex_lock(&ctx->mutex);1485 mutex_lock(&ctx->mutex);
1479 ret = rdma_join_multicast(ctx->cm_id, (struct sockaddr *)&mc->addr,1486 ret = rdma_join_multicast(ctx->cm_id, (struct sockaddr *)&mc->addr,
1480 join_state, mc);1487 join_state, mc);
@@ -1500,8 +1507,11 @@ err_leave_multicast: · 19 unmodified lines
1500 mutex_unlock(&ctx->mutex);1507 mutex_unlock(&ctx->mutex);
1501 ucma_cleanup_mc_events(mc);1508 ucma_cleanup_mc_events(mc);
1502err_xa_erase:1509err_xa_erase:
1503 xa_erase(&multicast_table, mc->id);1510 xa_lock(&multicast_table);
1511 list_del(&mc->list);
1512 __xa_erase(&multicast_table, mc->id);
1504err_free_mc:1513err_free_mc:
1514 xa_unlock(&multicast_table);
1505 kfree(mc);1515 kfree(mc);
1506err_put_ctx:1516err_put_ctx:
1507 ucma_put_ctx(ctx);1517 ucma_put_ctx(ctx);
@@ -1569,15 +1579,17 @@ static ssize_t ucma_leave_multicast(struct ucma_file *file, · 61 unmodified lines
1569 mc = ERR_PTR(-EINVAL);1579 mc = ERR_PTR(-EINVAL);
1570 else if (!refcount_inc_not_zero(&mc->ctx->ref))1580 else if (!refcount_inc_not_zero(&mc->ctx->ref))
1571 mc = ERR_PTR(-ENXIO);1581 mc = ERR_PTR(-ENXIO);
1572 else
1573 __xa_erase(&multicast_table, mc->id);
1574 xa_unlock(&multicast_table);
1575 1582
1576 if (IS_ERR(mc)) {1583 if (IS_ERR(mc)) {
1584 xa_unlock(&multicast_table);
1577 ret = PTR_ERR(mc);1585 ret = PTR_ERR(mc);
1578 goto out;1586 goto out;
1579 }1587 }
1580 1588
1589 list_del(&mc->list);
1590 __xa_erase(&multicast_table, mc->id);
1591 xa_unlock(&multicast_table);
1592
1581 mutex_lock(&mc->ctx->mutex);1593 mutex_lock(&mc->ctx->mutex);
1582 rdma_leave_multicast(mc->ctx->cm_id, (struct sockaddr *) &mc->addr);1594 rdma_leave_multicast(mc->ctx->cm_id, (struct sockaddr *) &mc->addr);
1583 mutex_unlock(&mc->ctx->mutex);1595 mutex_unlock(&mc->ctx->mutex);
drivers/infiniband/hw/hfi1/ipoib.h+1−1
@@ -55,7 +55,7 @@ union hfi1_ipoib_flow { · 54 unmodified lines
55 */55 */
56struct ipoib_txreq {56struct ipoib_txreq {
57 struct sdma_txreq txreq;57 struct sdma_txreq txreq;
58 struct hfi1_sdma_header sdma_hdr;58 struct hfi1_sdma_header *sdma_hdr;
59 int sdma_status;59 int sdma_status;
60 int complete;60 int complete;
61 struct hfi1_ipoib_dev_priv *priv;61 struct hfi1_ipoib_dev_priv *priv;
drivers/infiniband/hw/hfi1/ipoib_main.c+15−12
@@ -22,26 +22,35 @@ static int hfi1_ipoib_dev_init(struct net_device *dev) · 21 unmodified lines
22 int ret;22 int ret;
23 23
24 dev->tstats = netdev_alloc_pcpu_stats(struct pcpu_sw_netstats);24 dev->tstats = netdev_alloc_pcpu_stats(struct pcpu_sw_netstats);
25 if (!dev->tstats)
26 return -ENOMEM;
25 27
26 ret = priv->netdev_ops->ndo_init(dev);28 ret = priv->netdev_ops->ndo_init(dev);
27 if (ret)29 if (ret)
28 return ret;30 goto out_ret;
29 31
30 ret = hfi1_netdev_add_data(priv->dd,32 ret = hfi1_netdev_add_data(priv->dd,
31 qpn_from_mac(priv->netdev->dev_addr),33 qpn_from_mac(priv->netdev->dev_addr),
32 dev);34 dev);
33 if (ret < 0) {35 if (ret < 0) {
34 priv->netdev_ops->ndo_uninit(dev);36 priv->netdev_ops->ndo_uninit(dev);
35 return ret;37 goto out_ret;
36 }38 }
37 39
38 return 0;40 return 0;
41out_ret:
42 free_percpu(dev->tstats);
43 dev->tstats = NULL;
44 return ret;
39}45}
40 46
41static void hfi1_ipoib_dev_uninit(struct net_device *dev)47static void hfi1_ipoib_dev_uninit(struct net_device *dev)
42{48{
43 struct hfi1_ipoib_dev_priv *priv = hfi1_ipoib_priv(dev);49 struct hfi1_ipoib_dev_priv *priv = hfi1_ipoib_priv(dev);
44 50
51 free_percpu(dev->tstats);
52 dev->tstats = NULL;
53
45 hfi1_netdev_remove_data(priv->dd, qpn_from_mac(priv->netdev->dev_addr));54 hfi1_netdev_remove_data(priv->dd, qpn_from_mac(priv->netdev->dev_addr));
46 55
47 priv->netdev_ops->ndo_uninit(dev);56 priv->netdev_ops->ndo_uninit(dev);
@@ -166,12 +175,7 @@ static void hfi1_ipoib_netdev_dtor(struct net_device *dev) · 118 unmodified lines
166 hfi1_ipoib_rxq_deinit(priv->netdev);175 hfi1_ipoib_rxq_deinit(priv->netdev);
167 176
168 free_percpu(dev->tstats);177 free_percpu(dev->tstats);
169}178 dev->tstats = NULL;
170
171static void hfi1_ipoib_free_rdma_netdev(struct net_device *dev)
172{
173 hfi1_ipoib_netdev_dtor(dev);
174 free_netdev(dev);
175}179}
176 180
177static void hfi1_ipoib_set_id(struct net_device *dev, int id)181static void hfi1_ipoib_set_id(struct net_device *dev, int id)
@@ -211,24 +215,23 @@ static int hfi1_ipoib_setup_rn(struct ib_device *device, · 33 unmodified lines
211 priv->port_num = port_num;215 priv->port_num = port_num;
212 priv->netdev_ops = netdev->netdev_ops;216 priv->netdev_ops = netdev->netdev_ops;
213 217
214 netdev->netdev_ops = &hfi1_ipoib_netdev_ops;
215
216 ib_query_pkey(device, port_num, priv->pkey_index, &priv->pkey);218 ib_query_pkey(device, port_num, priv->pkey_index, &priv->pkey);
217 219
218 rc = hfi1_ipoib_txreq_init(priv);220 rc = hfi1_ipoib_txreq_init(priv);
219 if (rc) {221 if (rc) {
220 dd_dev_err(dd, "IPoIB netdev TX init - failed(%d)\n", rc);222 dd_dev_err(dd, "IPoIB netdev TX init - failed(%d)\n", rc);
221 hfi1_ipoib_free_rdma_netdev(netdev);
222 return rc;223 return rc;
223 }224 }
224 225
225 rc = hfi1_ipoib_rxq_init(netdev);226 rc = hfi1_ipoib_rxq_init(netdev);
226 if (rc) {227 if (rc) {
227 dd_dev_err(dd, "IPoIB netdev RX init - failed(%d)\n", rc);228 dd_dev_err(dd, "IPoIB netdev RX init - failed(%d)\n", rc);
228 hfi1_ipoib_free_rdma_netdev(netdev);229 hfi1_ipoib_txreq_deinit(priv);
229 return rc;230 return rc;
230 }231 }
231 232
233 netdev->netdev_ops = &hfi1_ipoib_netdev_ops;
234
232 netdev->priv_destructor = hfi1_ipoib_netdev_dtor;235 netdev->priv_destructor = hfi1_ipoib_netdev_dtor;
233 netdev->needs_free_netdev = true;236 netdev->needs_free_netdev = true;
234 237
drivers/infiniband/hw/hfi1/ipoib_tx.c+26−12
@@ -122,7 +122,7 @@ static void hfi1_ipoib_free_tx(struct ipoib_txreq *tx, int budget) · 121 unmodified lines
122 dd_dev_warn(priv->dd,122 dd_dev_warn(priv->dd,
123 "%s: Status = 0x%x pbc 0x%llx txq = %d sde = %d\n",123 "%s: Status = 0x%x pbc 0x%llx txq = %d sde = %d\n",
124 __func__, tx->sdma_status,124 __func__, tx->sdma_status,
125 le64_to_cpu(tx->sdma_hdr.pbc), tx->txq->q_idx,125 le64_to_cpu(tx->sdma_hdr->pbc), tx->txq->q_idx,
126 tx->txq->sde->this_idx);126 tx->txq->sde->this_idx);
127 }127 }
128 128
@@ -231,7 +231,7 @@ static int hfi1_ipoib_build_tx_desc(struct ipoib_txreq *tx, · 102 unmodified lines
231{231{
232 struct hfi1_devdata *dd = txp->dd;232 struct hfi1_devdata *dd = txp->dd;
233 struct sdma_txreq *txreq = &tx->txreq;233 struct sdma_txreq *txreq = &tx->txreq;
234 struct hfi1_sdma_header *sdma_hdr = &tx->sdma_hdr;234 struct hfi1_sdma_header *sdma_hdr = tx->sdma_hdr;
235 u16 pkt_bytes =235 u16 pkt_bytes =
236 sizeof(sdma_hdr->pbc) + (txp->hdr_dwords << 2) + tx->skb->len;236 sizeof(sdma_hdr->pbc) + (txp->hdr_dwords << 2) + tx->skb->len;
237 int ret;237 int ret;
@@ -256,7 +256,7 @@ static void hfi1_ipoib_build_ib_tx_headers(struct ipoib_txreq *tx, · 18 unmodified lines
256 struct ipoib_txparms *txp)256 struct ipoib_txparms *txp)
257{257{
258 struct hfi1_ipoib_dev_priv *priv = tx->txq->priv;258 struct hfi1_ipoib_dev_priv *priv = tx->txq->priv;
259 struct hfi1_sdma_header *sdma_hdr = &tx->sdma_hdr;259 struct hfi1_sdma_header *sdma_hdr = tx->sdma_hdr;
260 struct sk_buff *skb = tx->skb;260 struct sk_buff *skb = tx->skb;
261 struct hfi1_pportdata *ppd = ppd_from_ibp(txp->ibp);261 struct hfi1_pportdata *ppd = ppd_from_ibp(txp->ibp);
262 struct rdma_ah_attr *ah_attr = txp->ah_attr;262 struct rdma_ah_attr *ah_attr = txp->ah_attr;
@@ -483,7 +483,7 @@ static int hfi1_ipoib_send_dma_single(struct net_device *dev, · 220 unmodified lines
483 if (likely(!ret)) {483 if (likely(!ret)) {
484tx_ok:484tx_ok:
485 trace_sdma_output_ibhdr(txq->priv->dd,485 trace_sdma_output_ibhdr(txq->priv->dd,
486 &tx->sdma_hdr.hdr,486 &tx->sdma_hdr->hdr,
487 ib_is_sc5(txp->flow.sc5));487 ib_is_sc5(txp->flow.sc5));
488 hfi1_ipoib_check_queue_depth(txq);488 hfi1_ipoib_check_queue_depth(txq);
489 return NETDEV_TX_OK;489 return NETDEV_TX_OK;
@@ -547,7 +547,7 @@ static int hfi1_ipoib_send_dma_list(struct net_device *dev, · 57 unmodified lines
547 hfi1_ipoib_check_queue_depth(txq);547 hfi1_ipoib_check_queue_depth(txq);
548 548
549 trace_sdma_output_ibhdr(txq->priv->dd,549 trace_sdma_output_ibhdr(txq->priv->dd,
550 &tx->sdma_hdr.hdr,550 &tx->sdma_hdr->hdr,
551 ib_is_sc5(txp->flow.sc5));551 ib_is_sc5(txp->flow.sc5));
552 552
553 if (!netdev_xmit_more())553 if (!netdev_xmit_more())
@@ -683,7 +683,8 @@ int hfi1_ipoib_txreq_init(struct hfi1_ipoib_dev_priv *priv) · 129 unmodified lines
683{683{
684 struct net_device *dev = priv->netdev;684 struct net_device *dev = priv->netdev;
685 u32 tx_ring_size, tx_item_size;685 u32 tx_ring_size, tx_item_size;
686 int i;686 struct hfi1_ipoib_circ_buf *tx_ring;
687 int i, j;
687 688
688 /*689 /*
689 * Ring holds 1 less than tx_ring_size690 * Ring holds 1 less than tx_ring_size
@@ -701,7 +702,9 @@ int hfi1_ipoib_txreq_init(struct hfi1_ipoib_dev_priv *priv) · 11 unmodified lines
701 702
702 for (i = 0; i < dev->num_tx_queues; i++) {703 for (i = 0; i < dev->num_tx_queues; i++) {
703 struct hfi1_ipoib_txq *txq = &priv->txqs[i];704 struct hfi1_ipoib_txq *txq = &priv->txqs[i];
705 struct ipoib_txreq *tx;
704 706
707 tx_ring = &txq->tx_ring;
705 iowait_init(&txq->wait,708 iowait_init(&txq->wait,
706 0,709 0,
707 hfi1_ipoib_flush_txq,710 hfi1_ipoib_flush_txq,
@@ -725,14 +728,19 @@ int hfi1_ipoib_txreq_init(struct hfi1_ipoib_dev_priv *priv) · 17 unmodified lines
725 priv->dd->node);728 priv->dd->node);
726 729
727 txq->tx_ring.items =730 txq->tx_ring.items =
728 kcalloc_node(tx_ring_size, tx_item_size,731 kvzalloc_node(array_size(tx_ring_size, tx_item_size),
729 GFP_KERNEL, priv->dd->node);732 GFP_KERNEL, priv->dd->node);
730 if (!txq->tx_ring.items)733 if (!txq->tx_ring.items)
731 goto free_txqs;734 goto free_txqs;
732 735
733 txq->tx_ring.max_items = tx_ring_size;736 txq->tx_ring.max_items = tx_ring_size;
734 txq->tx_ring.shift = ilog2(tx_ring_size);737 txq->tx_ring.shift = ilog2(tx_item_size);
735 txq->tx_ring.avail = hfi1_ipoib_ring_hwat(txq);738 txq->tx_ring.avail = hfi1_ipoib_ring_hwat(txq);
739 tx_ring = &txq->tx_ring;
740 for (j = 0; j < tx_ring_size; j++)
741 hfi1_txreq_from_idx(tx_ring, j)->sdma_hdr =
742 kzalloc_node(sizeof(*tx->sdma_hdr),
743 GFP_KERNEL, priv->dd->node);
736 744
737 netif_tx_napi_add(dev, &txq->napi,745 netif_tx_napi_add(dev, &txq->napi,
738 hfi1_ipoib_poll_tx_ring,746 hfi1_ipoib_poll_tx_ring,
@@ -746,7 +754,10 @@ free_txqs: · 7 unmodified lines
746 struct hfi1_ipoib_txq *txq = &priv->txqs[i];754 struct hfi1_ipoib_txq *txq = &priv->txqs[i];
747 755
748 netif_napi_del(&txq->napi);756 netif_napi_del(&txq->napi);
749 kfree(txq->tx_ring.items);757 tx_ring = &txq->tx_ring;
758 for (j = 0; j < tx_ring_size; j++)
759 kfree(hfi1_txreq_from_idx(tx_ring, j)->sdma_hdr);
760 kvfree(tx_ring->items);
750 }761 }
751 762
752 kfree(priv->txqs);763 kfree(priv->txqs);
@@ -780,17 +791,20 @@ static void hfi1_ipoib_drain_tx_list(struct hfi1_ipoib_txq *txq) · 27 unmodified lines
780 791
781void hfi1_ipoib_txreq_deinit(struct hfi1_ipoib_dev_priv *priv)792void hfi1_ipoib_txreq_deinit(struct hfi1_ipoib_dev_priv *priv)
782{793{
783 int i;794 int i, j;
784 795
785 for (i = 0; i < priv->netdev->num_tx_queues; i++) {796 for (i = 0; i < priv->netdev->num_tx_queues; i++) {
786 struct hfi1_ipoib_txq *txq = &priv->txqs[i];797 struct hfi1_ipoib_txq *txq = &priv->txqs[i];
798 struct hfi1_ipoib_circ_buf *tx_ring = &txq->tx_ring;
787 799
788 iowait_cancel_work(&txq->wait);800 iowait_cancel_work(&txq->wait);
789 iowait_sdma_drain(&txq->wait);801 iowait_sdma_drain(&txq->wait);
790 hfi1_ipoib_drain_tx_list(txq);802 hfi1_ipoib_drain_tx_list(txq);
791 netif_napi_del(&txq->napi);803 netif_napi_del(&txq->napi);
792 hfi1_ipoib_drain_tx_ring(txq);804 hfi1_ipoib_drain_tx_ring(txq);
793 kfree(txq->tx_ring.items);805 for (j = 0; j < tx_ring->max_items; j++)
806 kfree(hfi1_txreq_from_idx(tx_ring, j)->sdma_hdr);
807 kvfree(tx_ring->items);
794 }808 }
795 809
796 kfree(priv->txqs);810 kfree(priv->txqs);
drivers/infiniband/hw/mlx4/main.c+1−1
@@ -3237,7 +3237,7 @@ static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr, · 3236 unmodified lines
3237 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE:3237 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE:
3238 ew = kmalloc(sizeof *ew, GFP_ATOMIC);3238 ew = kmalloc(sizeof *ew, GFP_ATOMIC);
3239 if (!ew)3239 if (!ew)
3240 break;3240 return;
3241 3241
3242 INIT_WORK(&ew->work, handle_port_mgmt_change_event);3242 INIT_WORK(&ew->work, handle_port_mgmt_change_event);
3243 memcpy(&ew->ib_eqe, eqe, sizeof *eqe);3243 memcpy(&ew->ib_eqe, eqe, sizeof *eqe);
drivers/infiniband/sw/rdmavt/qp.c+2−0
@@ -3073,6 +3073,8 @@ do_write: · 3072 unmodified lines
3073 case IB_WR_ATOMIC_FETCH_AND_ADD:3073 case IB_WR_ATOMIC_FETCH_AND_ADD:
3074 if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC)))3074 if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC)))
3075 goto inv_err;3075 goto inv_err;
3076 if (unlikely(wqe->atomic_wr.remote_addr & (sizeof(u64) - 1)))
3077 goto inv_err;
3076 if (unlikely(!rvt_rkey_ok(qp, &qp->r_sge.sge, sizeof(u64),3078 if (unlikely(!rvt_rkey_ok(qp, &qp->r_sge.sge, sizeof(u64),
3077 wqe->atomic_wr.remote_addr,3079 wqe->atomic_wr.remote_addr,
3078 wqe->atomic_wr.rkey,3080 wqe->atomic_wr.rkey,
drivers/infiniband/sw/siw/siw.h+1−6
@@ -644,14 +644,9 @@ static inline struct siw_sqe *orq_get_current(struct siw_qp *qp) · 643 unmodified lines
644 return &qp->orq[qp->orq_get % qp->attrs.orq_size];644 return &qp->orq[qp->orq_get % qp->attrs.orq_size];
645}645}
646 646
647static inline struct siw_sqe *orq_get_tail(struct siw_qp *qp)
648{
649 return &qp->orq[qp->orq_put % qp->attrs.orq_size];
650}
651
652static inline struct siw_sqe *orq_get_free(struct siw_qp *qp)647static inline struct siw_sqe *orq_get_free(struct siw_qp *qp)
653{648{
654 struct siw_sqe *orq_e = orq_get_tail(qp);649 struct siw_sqe *orq_e = &qp->orq[qp->orq_put % qp->attrs.orq_size];
655 650
656 if (READ_ONCE(orq_e->flags) == 0)651 if (READ_ONCE(orq_e->flags) == 0)
657 return orq_e;652 return orq_e;
drivers/infiniband/sw/siw/siw_qp_rx.c+11−9
@@ -1153,11 +1153,12 @@ static int siw_check_tx_fence(struct siw_qp *qp) · 1152 unmodified lines
1153 1153
1154 spin_lock_irqsave(&qp->orq_lock, flags);1154 spin_lock_irqsave(&qp->orq_lock, flags);
1155 1155
1156 rreq = orq_get_current(qp);
1157
1158 /* free current orq entry */1156 /* free current orq entry */
1157 rreq = orq_get_current(qp);
1159 WRITE_ONCE(rreq->flags, 0);1158 WRITE_ONCE(rreq->flags, 0);
1160 1159
1160 qp->orq_get++;
1161
1161 if (qp->tx_ctx.orq_fence) {1162 if (qp->tx_ctx.orq_fence) {
1162 if (unlikely(tx_waiting->wr_status != SIW_WR_QUEUED)) {1163 if (unlikely(tx_waiting->wr_status != SIW_WR_QUEUED)) {
1163 pr_warn("siw: [QP %u]: fence resume: bad status %d\n",1164 pr_warn("siw: [QP %u]: fence resume: bad status %d\n",
@@ -1165,10 +1166,12 @@ static int siw_check_tx_fence(struct siw_qp *qp) · 1 unmodified line
1165 rv = -EPROTO;1166 rv = -EPROTO;
1166 goto out;1167 goto out;
1167 }1168 }
1168 /* resume SQ processing */1169 /* resume SQ processing, if possible */
1169 if (tx_waiting->sqe.opcode == SIW_OP_READ ||1170 if (tx_waiting->sqe.opcode == SIW_OP_READ ||
1170 tx_waiting->sqe.opcode == SIW_OP_READ_LOCAL_INV) {1171 tx_waiting->sqe.opcode == SIW_OP_READ_LOCAL_INV) {
1171 rreq = orq_get_tail(qp);1172
1173 /* SQ processing was stopped because of a full ORQ */
1174 rreq = orq_get_free(qp);
1172 if (unlikely(!rreq)) {1175 if (unlikely(!rreq)) {
1173 pr_warn("siw: [QP %u]: no ORQE\n", qp_id(qp));1176 pr_warn("siw: [QP %u]: no ORQE\n", qp_id(qp));
1174 rv = -EPROTO;1177 rv = -EPROTO;
@@ -1181,15 +1184,14 @@ static int siw_check_tx_fence(struct siw_qp *qp) · 6 unmodified lines
1181 resume_tx = 1;1184 resume_tx = 1;
1182 1185
1183 } else if (siw_orq_empty(qp)) {1186 } else if (siw_orq_empty(qp)) {
1187 /*
1188 * SQ processing was stopped by fenced work request.
1189 * Resume since all previous Read's are now completed.
1190 */
1184 qp->tx_ctx.orq_fence = 0;1191 qp->tx_ctx.orq_fence = 0;
1185 resume_tx = 1;1192 resume_tx = 1;
1186 } else {
1187 pr_warn("siw: [QP %u]: fence resume: orq idx: %d:%d\n",
1188 qp_id(qp), qp->orq_get, qp->orq_put);
1189 rv = -EPROTO;
1190 }1193 }
1191 }1194 }
1192 qp->orq_get++;
1193out:1195out:
1194 spin_unlock_irqrestore(&qp->orq_lock, flags);1196 spin_unlock_irqrestore(&qp->orq_lock, flags);
1195 1197
drivers/infiniband/sw/siw/siw_verbs.c+2−1
@@ -313,7 +313,8 @@ int siw_create_qp(struct ib_qp *ibqp, struct ib_qp_init_attr *attrs, · 312 unmodified lines
313 313
314 if (atomic_inc_return(&sdev->num_qp) > SIW_MAX_QP) {314 if (atomic_inc_return(&sdev->num_qp) > SIW_MAX_QP) {
315 siw_dbg(base_dev, "too many QP's\n");315 siw_dbg(base_dev, "too many QP's\n");
316 return -ENOMEM;316 rv = -ENOMEM;
317 goto err_atomic;
317 }318 }
318 if (attrs->qp_type != IB_QPT_RC) {319 if (attrs->qp_type != IB_QPT_RC) {
319 siw_dbg(base_dev, "only RC QP's supported\n");320 siw_dbg(base_dev, "only RC QP's supported\n");
drivers/input/input.c+6−0
@@ -2285,6 +2285,12 @@ int input_register_device(struct input_dev *dev) · 2284 unmodified lines
2285 /* KEY_RESERVED is not supposed to be transmitted to userspace. */2285 /* KEY_RESERVED is not supposed to be transmitted to userspace. */
2286 __clear_bit(KEY_RESERVED, dev->keybit);2286 __clear_bit(KEY_RESERVED, dev->keybit);
2287 2287
2288 /* Buttonpads should not map BTN_RIGHT and/or BTN_MIDDLE. */
2289 if (test_bit(INPUT_PROP_BUTTONPAD, dev->propbit)) {
2290 __clear_bit(BTN_RIGHT, dev->keybit);
2291 __clear_bit(BTN_MIDDLE, dev->keybit);
2292 }
2293
2288 /* Make sure that bitmasks not mentioned in dev->evbit are clean. */2294 /* Make sure that bitmasks not mentioned in dev->evbit are clean. */
2289 input_cleanse_bitmasks(dev);2295 input_cleanse_bitmasks(dev);
2290 2296
drivers/input/mouse/psmouse-smbus.c+10−0
@@ -75,6 +75,8 @@ static void psmouse_smbus_detach_i2c_client(struct i2c_client *client) · 74 unmodified lines
75 "Marking SMBus companion %s as gone\n",75 "Marking SMBus companion %s as gone\n",
76 dev_name(&smbdev->client->dev));76 dev_name(&smbdev->client->dev));
77 smbdev->dead = true;77 smbdev->dead = true;
78 device_link_remove(&smbdev->client->dev,
79 &smbdev->psmouse->ps2dev.serio->dev);
78 serio_rescan(smbdev->psmouse->ps2dev.serio);80 serio_rescan(smbdev->psmouse->ps2dev.serio);
79 } else {81 } else {
80 list_del(&smbdev->node);82 list_del(&smbdev->node);
@@ -174,6 +176,8 @@ static void psmouse_smbus_disconnect(struct psmouse *psmouse) · 93 unmodified lines
174 kfree(smbdev);176 kfree(smbdev);
175 } else {177 } else {
176 smbdev->dead = true;178 smbdev->dead = true;
179 device_link_remove(&smbdev->client->dev,
180 &psmouse->ps2dev.serio->dev);
177 psmouse_dbg(smbdev->psmouse,181 psmouse_dbg(smbdev->psmouse,
178 "posting removal request for SMBus companion %s\n",182 "posting removal request for SMBus companion %s\n",
179 dev_name(&smbdev->client->dev));183 dev_name(&smbdev->client->dev));
@@ -270,6 +274,12 @@ int psmouse_smbus_init(struct psmouse *psmouse, · 90 unmodified lines
270 274
271 if (smbdev->client) {275 if (smbdev->client) {
272 /* We have our companion device */276 /* We have our companion device */
277 if (!device_link_add(&smbdev->client->dev,
278 &psmouse->ps2dev.serio->dev,
279 DL_FLAG_STATELESS))
280 psmouse_warn(psmouse,
281 "failed to set up link with iSMBus companion %s\n",
282 dev_name(&smbdev->client->dev));
273 return 0;283 return 0;
274 }284 }
275 285
drivers/input/touchscreen/wm97xx-core.c+3−9
@@ -615,10 +615,9 @@ static int wm97xx_register_touch(struct wm97xx *wm) · 614 unmodified lines
615 * extensions)615 * extensions)
616 */616 */
617 wm->touch_dev = platform_device_alloc("wm97xx-touch", -1);617 wm->touch_dev = platform_device_alloc("wm97xx-touch", -1);
618 if (!wm->touch_dev) {618 if (!wm->touch_dev)
619 ret = -ENOMEM;619 return -ENOMEM;
620 goto touch_err;620
621 }
622 platform_set_drvdata(wm->touch_dev, wm);621 platform_set_drvdata(wm->touch_dev, wm);
623 wm->touch_dev->dev.parent = wm->dev;622 wm->touch_dev->dev.parent = wm->dev;
624 wm->touch_dev->dev.platform_data = pdata;623 wm->touch_dev->dev.platform_data = pdata;
@@ -629,9 +628,6 @@ static int wm97xx_register_touch(struct wm97xx *wm) · 4 unmodified lines
629 return 0;628 return 0;
630touch_reg_err:629touch_reg_err:
631 platform_device_put(wm->touch_dev);630 platform_device_put(wm->touch_dev);
632touch_err:
633 input_unregister_device(wm->input_dev);
634 wm->input_dev = NULL;
635 631
636 return ret;632 return ret;
637}633}
@@ -639,8 +635,6 @@ touch_err: · 1 unmodified line
639static void wm97xx_unregister_touch(struct wm97xx *wm)635static void wm97xx_unregister_touch(struct wm97xx *wm)
640{636{
641 platform_device_unregister(wm->touch_dev);637 platform_device_unregister(wm->touch_dev);
642 input_unregister_device(wm->input_dev);
643 wm->input_dev = NULL;
644}638}
645 639
646static int _wm97xx_probe(struct wm97xx *wm)640static int _wm97xx_probe(struct wm97xx *wm)
drivers/input/touchscreen/zinitix.c+12−0
@@ -571,8 +571,20 @@ static SIMPLE_DEV_PM_OPS(zinitix_pm_ops, zinitix_suspend, zinitix_resume); · 570 unmodified lines
571 571
572#ifdef CONFIG_OF572#ifdef CONFIG_OF
573static const struct of_device_id zinitix_of_match[] = {573static const struct of_device_id zinitix_of_match[] = {
574 { .compatible = "zinitix,bt402" },
575 { .compatible = "zinitix,bt403" },
576 { .compatible = "zinitix,bt404" },
577 { .compatible = "zinitix,bt412" },
578 { .compatible = "zinitix,bt413" },
579 { .compatible = "zinitix,bt431" },
580 { .compatible = "zinitix,bt432" },
581 { .compatible = "zinitix,bt531" },
574 { .compatible = "zinitix,bt532" },582 { .compatible = "zinitix,bt532" },
583 { .compatible = "zinitix,bt538" },
575 { .compatible = "zinitix,bt541" },584 { .compatible = "zinitix,bt541" },
585 { .compatible = "zinitix,bt548" },
586 { .compatible = "zinitix,bt554" },
587 { .compatible = "zinitix,at100" },
576 { }588 { }
577};589};
578MODULE_DEVICE_TABLE(of, zinitix_of_match);590MODULE_DEVICE_TABLE(of, zinitix_of_match);
drivers/iommu/amd/init.c+2−0
@@ -21,6 +21,7 @@ · 20 unmodified lines
21#include <linux/export.h>21#include <linux/export.h>
22#include <linux/kmemleak.h>22#include <linux/kmemleak.h>
23#include <linux/cc_platform.h>23#include <linux/cc_platform.h>
24#include <linux/iopoll.h>
24#include <asm/pci-direct.h>25#include <asm/pci-direct.h>
25#include <asm/iommu.h>26#include <asm/iommu.h>
26#include <asm/apic.h>27#include <asm/apic.h>
@@ -834,6 +835,7 @@ static int iommu_ga_log_enable(struct amd_iommu *iommu) · 807 unmodified lines
834 status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET);835 status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET);
835 if (status & (MMIO_STATUS_GALOG_RUN_MASK))836 if (status & (MMIO_STATUS_GALOG_RUN_MASK))
836 break;837 break;
838 udelay(10);
837 }839 }
838 840
839 if (WARN_ON(i >= LOOP_TIMEOUT))841 if (WARN_ON(i >= LOOP_TIMEOUT))
drivers/iommu/intel/irq_remapping.c+10−3
@@ -569,9 +569,8 @@ static int intel_setup_irq_remapping(struct intel_iommu *iommu) · 568 unmodified lines
569 fn, &intel_ir_domain_ops,569 fn, &intel_ir_domain_ops,
570 iommu);570 iommu);
571 if (!iommu->ir_domain) {571 if (!iommu->ir_domain) {
572 irq_domain_free_fwnode(fn);
573 pr_err("IR%d: failed to allocate irqdomain\n", iommu->seq_id);572 pr_err("IR%d: failed to allocate irqdomain\n", iommu->seq_id);
574 goto out_free_bitmap;573 goto out_free_fwnode;
575 }574 }
576 iommu->ir_msi_domain =575 iommu->ir_msi_domain =
577 arch_create_remap_msi_irq_domain(iommu->ir_domain,576 arch_create_remap_msi_irq_domain(iommu->ir_domain,
@@ -595,7 +594,7 @@ static int intel_setup_irq_remapping(struct intel_iommu *iommu) · 17 unmodified lines
595 594
596 if (dmar_enable_qi(iommu)) {595 if (dmar_enable_qi(iommu)) {
597 pr_err("Failed to enable queued invalidation\n");596 pr_err("Failed to enable queued invalidation\n");
598 goto out_free_bitmap;597 goto out_free_ir_domain;
599 }598 }
600 }599 }
601 600
@@ -619,6 +618,14 @@ static int intel_setup_irq_remapping(struct intel_iommu *iommu) · 17 unmodified lines
619 618
620 return 0;619 return 0;
621 620
621out_free_ir_domain:
622 if (iommu->ir_msi_domain)
623 irq_domain_remove(iommu->ir_msi_domain);
624 iommu->ir_msi_domain = NULL;
625 irq_domain_remove(iommu->ir_domain);
626 iommu->ir_domain = NULL;
627out_free_fwnode:
628 irq_domain_free_fwnode(fn);
622out_free_bitmap:629out_free_bitmap:
623 bitmap_free(bitmap);630 bitmap_free(bitmap);
624out_free_pages:631out_free_pages:
drivers/iommu/ioasid.c+1−0
@@ -349,6 +349,7 @@ EXPORT_SYMBOL_GPL(ioasid_alloc); · 348 unmodified lines
349 349
350/**350/**
351 * ioasid_get - obtain a reference to the IOASID351 * ioasid_get - obtain a reference to the IOASID
352 * @ioasid: the ID to get
352 */353 */
353void ioasid_get(ioasid_t ioasid)354void ioasid_get(ioasid_t ioasid)
354{355{
drivers/iommu/iommu.c+19−14
@@ -207,9 +207,14 @@ static struct dev_iommu *dev_iommu_get(struct device *dev) · 206 unmodified lines
207 207
208static void dev_iommu_free(struct device *dev)208static void dev_iommu_free(struct device *dev)
209{209{
210 iommu_fwspec_free(dev);210 struct dev_iommu *param = dev->iommu;
211 kfree(dev->iommu);211
212 dev->iommu = NULL;212 dev->iommu = NULL;
213 if (param->fwspec) {
214 fwnode_handle_put(param->fwspec->iommu_fwnode);
215 kfree(param->fwspec);
216 }
217 kfree(param);
213}218}
214 219
215static int __iommu_probe_device(struct device *dev, struct list_head *group_list)220static int __iommu_probe_device(struct device *dev, struct list_head *group_list)
@@ -980,17 +985,6 @@ static int iommu_group_device_count(struct iommu_group *group) · 764 unmodified lines
980 return ret;985 return ret;
981}986}
982 987
983/**
984 * iommu_group_for_each_dev - iterate over each device in the group
985 * @group: the group
986 * @data: caller opaque data to be passed to callback function
987 * @fn: caller supplied callback function
988 *
989 * This function is called by group users to iterate over group devices.
990 * Callers should hold a reference count to the group during callback.
991 * The group->mutex is held across callbacks, which will block calls to
992 * iommu_group_add/remove_device.
993 */
994static int __iommu_group_for_each_dev(struct iommu_group *group, void *data,988static int __iommu_group_for_each_dev(struct iommu_group *group, void *data,
995 int (*fn)(struct device *, void *))989 int (*fn)(struct device *, void *))
996{990{
@@ -1005,7 +999,17 @@ static int __iommu_group_for_each_dev(struct iommu_group *group, void *data, · 8 unmodified lines
1005 return ret;999 return ret;
1006}1000}
1007 1001
1008 1002/**
1003 * iommu_group_for_each_dev - iterate over each device in the group
1004 * @group: the group
1005 * @data: caller opaque data to be passed to callback function
1006 * @fn: caller supplied callback function
1007 *
1008 * This function is called by group users to iterate over group devices.
1009 * Callers should hold a reference count to the group during callback.
1010 * The group->mutex is held across callbacks, which will block calls to
1011 * iommu_group_add/remove_device.
1012 */
1009int iommu_group_for_each_dev(struct iommu_group *group, void *data,1013int iommu_group_for_each_dev(struct iommu_group *group, void *data,
1010 int (*fn)(struct device *, void *))1014 int (*fn)(struct device *, void *))
1011{1015{
@@ -3032,6 +3036,7 @@ EXPORT_SYMBOL_GPL(iommu_aux_get_pasid); · 2020 unmodified lines
3032 * iommu_sva_bind_device() - Bind a process address space to a device3036 * iommu_sva_bind_device() - Bind a process address space to a device
3033 * @dev: the device3037 * @dev: the device
3034 * @mm: the mm to bind, caller must hold a reference to it3038 * @mm: the mm to bind, caller must hold a reference to it
3039 * @drvdata: opaque data pointer to pass to bind callback
3035 *3040 *
3036 * Create a bond between device and address space, allowing the device to access3041 * Create a bond between device and address space, allowing the device to access
3037 * the mm using the returned PASID. If a bond already exists between @device and3042 * the mm using the returned PASID. If a bond already exists between @device and
drivers/iommu/omap-iommu.c+1−1
@@ -1085,7 +1085,7 @@ static __maybe_unused int omap_iommu_runtime_resume(struct device *dev) · 1084 unmodified lines
1085}1085}
1086 1086
1087/**1087/**
1088 * omap_iommu_suspend_prepare - prepare() dev_pm_ops implementation1088 * omap_iommu_prepare - prepare() dev_pm_ops implementation
1089 * @dev: iommu device1089 * @dev: iommu device
1090 *1090 *
1091 * This function performs the necessary checks to determine if the IOMMU1091 * This function performs the necessary checks to determine if the IOMMU
drivers/irqchip/irq-apple-aic.c+0−1
@@ -178,7 +178,6 @@ struct aic_irq_chip { · 177 unmodified lines
178 struct irq_domain *hw_domain;178 struct irq_domain *hw_domain;
179 struct irq_domain *ipi_domain;179 struct irq_domain *ipi_domain;
180 int nr_hw;180 int nr_hw;
181 int ipi_hwirq;
182};181};
183 182
184static DEFINE_PER_CPU(uint32_t, aic_fiq_unmasked);183static DEFINE_PER_CPU(uint32_t, aic_fiq_unmasked);
drivers/irqchip/irq-gic-v3-its.c+104−22
@@ -4856,6 +4856,38 @@ static struct syscore_ops its_syscore_ops = { · 4855 unmodified lines
4856 .resume = its_restore_enable,4856 .resume = its_restore_enable,
4857};4857};
4858 4858
4859static void __init __iomem *its_map_one(struct resource *res, int *err)
4860{
4861 void __iomem *its_base;
4862 u32 val;
4863
4864 its_base = ioremap(res->start, SZ_64K);
4865 if (!its_base) {
4866 pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start);
4867 *err = -ENOMEM;
4868 return NULL;
4869 }
4870
4871 val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK;
4872 if (val != 0x30 && val != 0x40) {
4873 pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start);
4874 *err = -ENODEV;
4875 goto out_unmap;
4876 }
4877
4878 *err = its_force_quiescent(its_base);
4879 if (*err) {
4880 pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start);
4881 goto out_unmap;
4882 }
4883
4884 return its_base;
4885
4886out_unmap:
4887 iounmap(its_base);
4888 return NULL;
4889}
4890
4859static int its_init_domain(struct fwnode_handle *handle, struct its_node *its)4891static int its_init_domain(struct fwnode_handle *handle, struct its_node *its)
4860{4892{
4861 struct irq_domain *inner_domain;4893 struct irq_domain *inner_domain;
@@ -4963,29 +4995,14 @@ static int __init its_probe_one(struct resource *res, · 101 unmodified lines
4963{4995{
4964 struct its_node *its;4996 struct its_node *its;
4965 void __iomem *its_base;4997 void __iomem *its_base;
4966 u32 val, ctlr;
4967 u64 baser, tmp, typer;4998 u64 baser, tmp, typer;
4968 struct page *page;4999 struct page *page;
5000 u32 ctlr;
4969 int err;5001 int err;
4970 5002
4971 its_base = ioremap(res->start, SZ_64K);5003 its_base = its_map_one(res, &err);
4972 if (!its_base) {5004 if (!its_base)
4973 pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start);5005 return err;
4974 return -ENOMEM;
4975 }
4976
4977 val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK;
4978 if (val != 0x30 && val != 0x40) {
4979 pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start);
4980 err = -ENODEV;
4981 goto out_unmap;
4982 }
4983
4984 err = its_force_quiescent(its_base);
4985 if (err) {
4986 pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start);
4987 goto out_unmap;
4988 }
4989 5006
4990 pr_info("ITS %pR\n", res);5007 pr_info("ITS %pR\n", res);
4991 5008
@@ -5241,13 +5258,31 @@ static int its_cpu_memreserve_lpi(unsigned int cpu) · 249 unmodified lines
5241 5258
5242out:5259out:
5243 /* Last CPU being brought up gets to issue the cleanup */5260 /* Last CPU being brought up gets to issue the cleanup */
5244 if (cpumask_equal(&cpus_booted_once_mask, cpu_possible_mask))5261 if (!IS_ENABLED(CONFIG_SMP) ||
5262 cpumask_equal(&cpus_booted_once_mask, cpu_possible_mask))
5245 schedule_work(&rdist_memreserve_cpuhp_cleanup_work);5263 schedule_work(&rdist_memreserve_cpuhp_cleanup_work);
5246 5264
5247 gic_data_rdist()->flags |= RD_LOCAL_MEMRESERVE_DONE;5265 gic_data_rdist()->flags |= RD_LOCAL_MEMRESERVE_DONE;
5248 return ret;5266 return ret;
5249}5267}
5250 5268
5269/* Mark all the BASER registers as invalid before they get reprogrammed */
5270static int __init its_reset_one(struct resource *res)
5271{
5272 void __iomem *its_base;
5273 int err, i;
5274
5275 its_base = its_map_one(res, &err);
5276 if (!its_base)
5277 return err;
5278
5279 for (i = 0; i < GITS_BASER_NR_REGS; i++)
5280 gits_write_baser(0, its_base + GITS_BASER + (i << 3));
5281
5282 iounmap(its_base);
5283 return 0;
5284}
5285
5251static const struct of_device_id its_device_id[] = {5286static const struct of_device_id its_device_id[] = {
5252 { .compatible = "arm,gic-v3-its", },5287 { .compatible = "arm,gic-v3-its", },
5253 {},5288 {},
@@ -5258,6 +5293,26 @@ static int __init its_of_probe(struct device_node *node) · 4 unmodified lines
5258 struct device_node *np;5293 struct device_node *np;
5259 struct resource res;5294 struct resource res;
5260 5295
5296 /*
5297 * Make sure *all* the ITS are reset before we probe any, as
5298 * they may be sharing memory. If any of the ITS fails to
5299 * reset, don't even try to go any further, as this could
5300 * result in something even worse.
5301 */
5302 for (np = of_find_matching_node(node, its_device_id); np;
5303 np = of_find_matching_node(np, its_device_id)) {
5304 int err;
5305
5306 if (!of_device_is_available(np) ||
5307 !of_property_read_bool(np, "msi-controller") ||
5308 of_address_to_resource(np, 0, &res))
5309 continue;
5310
5311 err = its_reset_one(&res);
5312 if (err)
5313 return err;
5314 }
5315
5261 for (np = of_find_matching_node(node, its_device_id); np;5316 for (np = of_find_matching_node(node, its_device_id); np;
5262 np = of_find_matching_node(np, its_device_id)) {5317 np = of_find_matching_node(np, its_device_id)) {
5263 if (!of_device_is_available(np))5318 if (!of_device_is_available(np))
@@ -5420,11 +5475,35 @@ dom_err: · 156 unmodified lines
5420 return err;5475 return err;
5421}5476}
5422 5477
5478static int __init its_acpi_reset(union acpi_subtable_headers *header,
5479 const unsigned long end)
5480{
5481 struct acpi_madt_generic_translator *its_entry;
5482 struct resource res;
5483
5484 its_entry = (struct acpi_madt_generic_translator *)header;
5485 res = (struct resource) {
5486 .start = its_entry->base_address,
5487 .end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1,
5488 .flags = IORESOURCE_MEM,
5489 };
5490
5491 return its_reset_one(&res);
5492}
5493
5423static void __init its_acpi_probe(void)5494static void __init its_acpi_probe(void)
5424{5495{
5425 acpi_table_parse_srat_its();5496 acpi_table_parse_srat_its();
5426 acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR,5497 /*
5427 gic_acpi_parse_madt_its, 0);5498 * Make sure *all* the ITS are reset before we probe any, as
5499 * they may be sharing memory. If any of the ITS fails to
5500 * reset, don't even try to go any further, as this could
5501 * result in something even worse.
5502 */
5503 if (acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR,
5504 its_acpi_reset, 0) > 0)
5505 acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR,
5506 gic_acpi_parse_madt_its, 0);
5428 acpi_its_srat_maps_free();5507 acpi_its_srat_maps_free();
5429}5508}
5430#else5509#else
@@ -5438,6 +5517,9 @@ int __init its_lpi_memreserve_init(void) · 7 unmodified lines
5438 if (!efi_enabled(EFI_CONFIG_TABLES))5517 if (!efi_enabled(EFI_CONFIG_TABLES))
5439 return 0;5518 return 0;
5440 5519
5520 if (list_empty(&its_nodes))
5521 return 0;
5522
5441 gic_rdists->cpuhp_memreserve_state = CPUHP_INVALID;5523 gic_rdists->cpuhp_memreserve_state = CPUHP_INVALID;
5442 state = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN,5524 state = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN,
5443 "irqchip/arm/gicv3/memreserve:online",5525 "irqchip/arm/gicv3/memreserve:online",
drivers/irqchip/irq-loongson-pch-msi.c+1−1
@@ -241,7 +241,7 @@ static int pch_msi_init(struct device_node *node, · 240 unmodified lines
241 return 0;241 return 0;
242 242
243err_map:243err_map:
244 kfree(priv->msi_map);244 bitmap_free(priv->msi_map);
245err_priv:245err_priv:
246 kfree(priv);246 kfree(priv);
247 return ret;247 return ret;
drivers/irqchip/irq-realtek-rtl.c+12−6
@@ -62,7 +62,7 @@ static struct irq_chip realtek_ictl_irq = { · 61 unmodified lines
62 62
63static int intc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)63static int intc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
64{64{
65 irq_set_chip_and_handler(hw, &realtek_ictl_irq, handle_level_irq);65 irq_set_chip_and_handler(irq, &realtek_ictl_irq, handle_level_irq);
66 66
67 return 0;67 return 0;
68}68}
@@ -76,16 +76,20 @@ static void realtek_irq_dispatch(struct irq_desc *desc) · 7 unmodified lines
76{76{
77 struct irq_chip *chip = irq_desc_get_chip(desc);77 struct irq_chip *chip = irq_desc_get_chip(desc);
78 struct irq_domain *domain;78 struct irq_domain *domain;
79 unsigned int pending;79 unsigned long pending;
80 unsigned int soc_int;
80 81
81 chained_irq_enter(chip, desc);82 chained_irq_enter(chip, desc);
82 pending = readl(REG(RTL_ICTL_GIMR)) & readl(REG(RTL_ICTL_GISR));83 pending = readl(REG(RTL_ICTL_GIMR)) & readl(REG(RTL_ICTL_GISR));
84
83 if (unlikely(!pending)) {85 if (unlikely(!pending)) {
84 spurious_interrupt();86 spurious_interrupt();
85 goto out;87 goto out;
86 }88 }
89
87 domain = irq_desc_get_handler_data(desc);90 domain = irq_desc_get_handler_data(desc);
88 generic_handle_domain_irq(domain, __ffs(pending));91 for_each_set_bit(soc_int, &pending, 32)
92 generic_handle_domain_irq(domain, soc_int);
89 93
90out:94out:
91 chained_irq_exit(chip, desc);95 chained_irq_exit(chip, desc);
@@ -95,7 +99,8 @@ out: · 3 unmodified lines
95 * SoC interrupts are cascaded to MIPS CPU interrupts according to the99 * SoC interrupts are cascaded to MIPS CPU interrupts according to the
96 * interrupt-map in the device tree. Each SoC interrupt gets 4 bits for100 * interrupt-map in the device tree. Each SoC interrupt gets 4 bits for
97 * the CPU interrupt in an Interrupt Routing Register. Max 32 SoC interrupts101 * the CPU interrupt in an Interrupt Routing Register. Max 32 SoC interrupts
98 * thus go into 4 IRRs.102 * thus go into 4 IRRs. A routing value of '0' means the interrupt is left
103 * disconnected. Routing values {1..15} connect to output lines {0..14}.
99 */104 */
100static int __init map_interrupts(struct device_node *node, struct irq_domain *domain)105static int __init map_interrupts(struct device_node *node, struct irq_domain *domain)
101{106{
@@ -134,7 +139,7 @@ static int __init map_interrupts(struct device_node *node, struct irq_domain *do · 32 unmodified lines
134 of_node_put(cpu_ictl);139 of_node_put(cpu_ictl);
135 140
136 cpu_int = be32_to_cpup(imap + 2);141 cpu_int = be32_to_cpup(imap + 2);
137 if (cpu_int > 7)142 if (cpu_int > 7 || cpu_int < 2)
138 return -EINVAL;143 return -EINVAL;
139 144
140 if (!(mips_irqs_set & BIT(cpu_int))) {145 if (!(mips_irqs_set & BIT(cpu_int))) {
@@ -143,7 +148,8 @@ static int __init map_interrupts(struct device_node *node, struct irq_domain *do · 2 unmodified lines
143 mips_irqs_set |= BIT(cpu_int);148 mips_irqs_set |= BIT(cpu_int);
144 }149 }
145 150
146 regs[(soc_int * 4) / 32] |= cpu_int << (soc_int * 4) % 32;151 /* Use routing values (1..6) for CPU interrupts (2..7) */
152 regs[(soc_int * 4) / 32] |= (cpu_int - 1) << (soc_int * 4) % 32;
147 imap += 3;153 imap += 3;
148 }154 }
149 155
drivers/irqchip/irq-sifive-plic.c+1−0
@@ -398,3 +398,4 @@ out_free_priv: · 397 unmodified lines
398 398
399IRQCHIP_DECLARE(sifive_plic, "sifive,plic-1.0.0", plic_init);399IRQCHIP_DECLARE(sifive_plic, "sifive,plic-1.0.0", plic_init);
400IRQCHIP_DECLARE(riscv_plic0, "riscv,plic0", plic_init); /* for legacy systems */400IRQCHIP_DECLARE(riscv_plic0, "riscv,plic0", plic_init); /* for legacy systems */
401IRQCHIP_DECLARE(thead_c900_plic, "thead,c900-plic", plic_init); /* for firmware driver */
drivers/md/dm.c+4−18
@@ -489,7 +489,7 @@ static void start_io_acct(struct dm_io *io) · 488 unmodified lines
489 struct mapped_device *md = io->md;489 struct mapped_device *md = io->md;
490 struct bio *bio = io->orig_bio;490 struct bio *bio = io->orig_bio;
491 491
492 io->start_time = bio_start_io_acct(bio);492 bio_start_io_acct_time(bio, io->start_time);
493 if (unlikely(dm_stats_used(&md->stats)))493 if (unlikely(dm_stats_used(&md->stats)))
494 dm_stats_account_io(&md->stats, bio_data_dir(bio),494 dm_stats_account_io(&md->stats, bio_data_dir(bio),
495 bio->bi_iter.bi_sector, bio_sectors(bio),495 bio->bi_iter.bi_sector, bio_sectors(bio),
@@ -535,7 +535,7 @@ static struct dm_io *alloc_io(struct mapped_device *md, struct bio *bio) · 39 unmodified lines
535 io->md = md;535 io->md = md;
536 spin_lock_init(&io->endio_lock);536 spin_lock_init(&io->endio_lock);
537 537
538 start_io_acct(io);538 io->start_time = jiffies;
539 539
540 return io;540 return io;
541}541}
@@ -1442,9 +1442,6 @@ static void init_clone_info(struct clone_info *ci, struct mapped_device *md, · 900 unmodified lines
1442 ci->sector = bio->bi_iter.bi_sector;1442 ci->sector = bio->bi_iter.bi_sector;
1443}1443}
1444 1444
1445#define __dm_part_stat_sub(part, field, subnd) \
1446 (part_stat_get(part, field) -= (subnd))
1447
1448/*1445/*
1449 * Entry point to split a bio into clones and submit them to the targets.1446 * Entry point to split a bio into clones and submit them to the targets.
1450 */1447 */
@@ -1480,23 +1477,12 @@ static void __split_and_process_bio(struct mapped_device *md, · 29 unmodified lines
1480 GFP_NOIO, &md->queue->bio_split);1477 GFP_NOIO, &md->queue->bio_split);
1481 ci.io->orig_bio = b;1478 ci.io->orig_bio = b;
1482 1479
1483 /*
1484 * Adjust IO stats for each split, otherwise upon queue
1485 * reentry there will be redundant IO accounting.
1486 * NOTE: this is a stop-gap fix, a proper fix involves
1487 * significant refactoring of DM core's bio splitting
1488 * (by eliminating DM's splitting and just using bio_split)
1489 */
1490 part_stat_lock();
1491 __dm_part_stat_sub(dm_disk(md)->part0,
1492 sectors[op_stat_group(bio_op(bio))], ci.sector_count);
1493 part_stat_unlock();
1494
1495 bio_chain(b, bio);1480 bio_chain(b, bio);
1496 trace_block_split(b, bio->bi_iter.bi_sector);1481 trace_block_split(b, bio->bi_iter.bi_sector);
1497 submit_bio_noacct(bio);1482 submit_bio_noacct(bio);
1498 }1483 }
1499 }1484 }
1485 start_io_acct(ci.io);
1500 1486
1501 /* drop the extra reference count */1487 /* drop the extra reference count */
1502 dm_io_dec_pending(ci.io, errno_to_blk_status(error));1488 dm_io_dec_pending(ci.io, errno_to_blk_status(error));
@@ -2091,7 +2077,7 @@ static void __dm_destroy(struct mapped_device *md, bool wait) · 588 unmodified lines
2091 set_bit(DMF_FREEING, &md->flags);2077 set_bit(DMF_FREEING, &md->flags);
2092 spin_unlock(&_minor_lock);2078 spin_unlock(&_minor_lock);
2093 2079
2094 blk_set_queue_dying(md->queue);2080 blk_mark_disk_dead(md->disk);
2095 2081
2096 /*2082 /*
2097 * Take suspend_lock so that presuspend and postsuspend methods2083 * Take suspend_lock so that presuspend and postsuspend methods
drivers/md/md.c+4−4
@@ -5869,10 +5869,6 @@ int md_run(struct mddev *mddev) · 5868 unmodified lines
5869 nowait = nowait && blk_queue_nowait(bdev_get_queue(rdev->bdev));5869 nowait = nowait && blk_queue_nowait(bdev_get_queue(rdev->bdev));
5870 }5870 }
5871 5871
5872 /* Set the NOWAIT flags if all underlying devices support it */
5873 if (nowait)
5874 blk_queue_flag_set(QUEUE_FLAG_NOWAIT, mddev->queue);
5875
5876 if (!bioset_initialized(&mddev->bio_set)) {5872 if (!bioset_initialized(&mddev->bio_set)) {
5877 err = bioset_init(&mddev->bio_set, BIO_POOL_SIZE, 0, BIOSET_NEED_BVECS);5873 err = bioset_init(&mddev->bio_set, BIO_POOL_SIZE, 0, BIOSET_NEED_BVECS);
5878 if (err)5874 if (err)
@@ -6010,6 +6006,10 @@ int md_run(struct mddev *mddev) · 131 unmodified lines
6010 else6006 else
6011 blk_queue_flag_clear(QUEUE_FLAG_NONROT, mddev->queue);6007 blk_queue_flag_clear(QUEUE_FLAG_NONROT, mddev->queue);
6012 blk_queue_flag_set(QUEUE_FLAG_IO_STAT, mddev->queue);6008 blk_queue_flag_set(QUEUE_FLAG_IO_STAT, mddev->queue);
6009
6010 /* Set the NOWAIT flags if all underlying devices support it */
6011 if (nowait)
6012 blk_queue_flag_set(QUEUE_FLAG_NOWAIT, mddev->queue);
6013 }6013 }
6014 if (pers->sync_request) {6014 if (pers->sync_request) {
6015 if (mddev->kobj.sd &&6015 if (mddev->kobj.sd &&
drivers/misc/eeprom/at25.c+4−0
@@ -440,6 +440,10 @@ static int at25_probe(struct spi_device *spi) · 439 unmodified lines
440 return -ENXIO;440 return -ENXIO;
441 }441 }
442 442
443 at25 = devm_kzalloc(&spi->dev, sizeof(*at25), GFP_KERNEL);
444 if (!at25)
445 return -ENOMEM;
446
443 mutex_init(&at25->lock);447 mutex_init(&at25->lock);
444 at25->spi = spi;448 at25->spi = spi;
445 spi_set_drvdata(spi, at25);449 spi_set_drvdata(spi, at25);
drivers/misc/eeprom/ee1004.c+3−0
@@ -114,6 +114,9 @@ static ssize_t ee1004_eeprom_read(struct i2c_client *client, char *buf, · 113 unmodified lines
114 if (offset + count > EE1004_PAGE_SIZE)114 if (offset + count > EE1004_PAGE_SIZE)
115 count = EE1004_PAGE_SIZE - offset;115 count = EE1004_PAGE_SIZE - offset;
116 116
117 if (count > I2C_SMBUS_BLOCK_MAX)
118 count = I2C_SMBUS_BLOCK_MAX;
119
117 return i2c_smbus_read_i2c_block_data_or_emulated(client, offset, count, buf);120 return i2c_smbus_read_i2c_block_data_or_emulated(client, offset, count, buf);
118}121}
119 122
drivers/misc/fastrpc.c+8−1
@@ -1288,7 +1288,14 @@ static int fastrpc_dmabuf_alloc(struct fastrpc_user *fl, char __user *argp) · 1287 unmodified lines
1288 }1288 }
1289 1289
1290 if (copy_to_user(argp, &bp, sizeof(bp))) {1290 if (copy_to_user(argp, &bp, sizeof(bp))) {
1291 dma_buf_put(buf->dmabuf);1291 /*
1292 * The usercopy failed, but we can't do much about it, as
1293 * dma_buf_fd() already called fd_install() and made the
1294 * file descriptor accessible for the current process. It
1295 * might already be closed and dmabuf no longer valid when
1296 * we reach this point. Therefore "leak" the fd and rely on
1297 * the process exit path to do any required cleanup.
1298 */
1292 return -EFAULT;1299 return -EFAULT;
1293 }1300 }
1294 1301
drivers/mmc/core/block.c+14−14
@@ -1682,31 +1682,31 @@ static void mmc_blk_read_single(struct mmc_queue *mq, struct request *req) · 1681 unmodified lines
1682 struct mmc_card *card = mq->card;1682 struct mmc_card *card = mq->card;
1683 struct mmc_host *host = card->host;1683 struct mmc_host *host = card->host;
1684 blk_status_t error = BLK_STS_OK;1684 blk_status_t error = BLK_STS_OK;
1685 int retries = 0;
1686 1685
1687 do {1686 do {
1688 u32 status;1687 u32 status;
1689 int err;1688 int err;
1689 int retries = 0;
1690 1690
1691 mmc_blk_rw_rq_prep(mqrq, card, 1, mq);1691 while (retries++ <= MMC_READ_SINGLE_RETRIES) {
1692 mmc_blk_rw_rq_prep(mqrq, card, 1, mq);
1692 1693
1693 mmc_wait_for_req(host, mrq);1694 mmc_wait_for_req(host, mrq);
1694 1695
1695 err = mmc_send_status(card, &status);1696 err = mmc_send_status(card, &status);
1696 if (err)
1697 goto error_exit;
1698
1699 if (!mmc_host_is_spi(host) &&
1700 !mmc_ready_for_data(status)) {
1701 err = mmc_blk_fix_state(card, req);
1702 if (err)1697 if (err)
1703 goto error_exit;1698 goto error_exit;
1704 }
1705 1699
1706 if (mrq->cmd->error && retries++ < MMC_READ_SINGLE_RETRIES)1700 if (!mmc_host_is_spi(host) &&
1707 continue;1701 !mmc_ready_for_data(status)) {
1702 err = mmc_blk_fix_state(card, req);
1703 if (err)
1704 goto error_exit;
1705 }
1708 1706
1709 retries = 0;1707 if (!mrq->cmd->error)
1708 break;
1709 }
1710 1710
1711 if (mrq->cmd->error ||1711 if (mrq->cmd->error ||
1712 mrq->data->error ||1712 mrq->data->error ||
drivers/mmc/core/sd.c+7−1
@@ -67,7 +67,7 @@ static const unsigned int sd_au_size[] = { · 66 unmodified lines
67 __res & __mask; \67 __res & __mask; \
68 })68 })
69 69
70#define SD_POWEROFF_NOTIFY_TIMEOUT_MS 200070#define SD_POWEROFF_NOTIFY_TIMEOUT_MS 1000
71#define SD_WRITE_EXTR_SINGLE_TIMEOUT_MS 100071#define SD_WRITE_EXTR_SINGLE_TIMEOUT_MS 1000
72 72
73struct sd_busy_data {73struct sd_busy_data {
@@ -1664,6 +1664,12 @@ static int sd_poweroff_notify(struct mmc_card *card) · 1590 unmodified lines
1664 goto out;1664 goto out;
1665 }1665 }
1666 1666
1667 /* Find out when the command is completed. */
1668 err = mmc_poll_for_busy(card, SD_WRITE_EXTR_SINGLE_TIMEOUT_MS, false,
1669 MMC_BUSY_EXTR_SINGLE);
1670 if (err)
1671 goto out;
1672
1667 cb_data.card = card;1673 cb_data.card = card;
1668 cb_data.reg_buf = reg_buf;1674 cb_data.reg_buf = reg_buf;
1669 err = __mmc_poll_for_busy(card->host, SD_POWEROFF_NOTIFY_TIMEOUT_MS,1675 err = __mmc_poll_for_busy(card->host, SD_POWEROFF_NOTIFY_TIMEOUT_MS,
drivers/mmc/host/moxart-mmc.c+1−1
@@ -705,12 +705,12 @@ static int moxart_remove(struct platform_device *pdev) · 704 unmodified lines
705 if (!IS_ERR_OR_NULL(host->dma_chan_rx))705 if (!IS_ERR_OR_NULL(host->dma_chan_rx))
706 dma_release_channel(host->dma_chan_rx);706 dma_release_channel(host->dma_chan_rx);
707 mmc_remove_host(mmc);707 mmc_remove_host(mmc);
708 mmc_free_host(mmc);
709 708
710 writel(0, host->base + REG_INTERRUPT_MASK);709 writel(0, host->base + REG_INTERRUPT_MASK);
711 writel(0, host->base + REG_POWER_CONTROL);710 writel(0, host->base + REG_POWER_CONTROL);
712 writel(readl(host->base + REG_CLOCK_CONTROL) | CLK_OFF,711 writel(readl(host->base + REG_CLOCK_CONTROL) | CLK_OFF,
713 host->base + REG_CLOCK_CONTROL);712 host->base + REG_CLOCK_CONTROL);
713 mmc_free_host(mmc);
714 714
715 return 0;715 return 0;
716}716}
drivers/mmc/host/sdhci-of-esdhc.c+6−2
@@ -524,12 +524,16 @@ static void esdhc_of_adma_workaround(struct sdhci_host *host, u32 intmask) · 523 unmodified lines
524 524
525static int esdhc_of_enable_dma(struct sdhci_host *host)525static int esdhc_of_enable_dma(struct sdhci_host *host)
526{526{
527 int ret;
527 u32 value;528 u32 value;
528 struct device *dev = mmc_dev(host->mmc);529 struct device *dev = mmc_dev(host->mmc);
529 530
530 if (of_device_is_compatible(dev->of_node, "fsl,ls1043a-esdhc") ||531 if (of_device_is_compatible(dev->of_node, "fsl,ls1043a-esdhc") ||
531 of_device_is_compatible(dev->of_node, "fsl,ls1046a-esdhc"))532 of_device_is_compatible(dev->of_node, "fsl,ls1046a-esdhc")) {
532 dma_set_mask_and_coherent(dev, DMA_BIT_MASK(40));533 ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(40));
534 if (ret)
535 return ret;
536 }
533 537
534 value = sdhci_readl(host, ESDHC_DMA_SYSCTL);538 value = sdhci_readl(host, ESDHC_DMA_SYSCTL);
535 539
drivers/mmc/host/sh_mmcif.c+3−0
@@ -405,6 +405,9 @@ static int sh_mmcif_dma_slave_config(struct sh_mmcif_host *host, · 404 unmodified lines
405 struct dma_slave_config cfg = { 0, };405 struct dma_slave_config cfg = { 0, };
406 406
407 res = platform_get_resource(host->pd, IORESOURCE_MEM, 0);407 res = platform_get_resource(host->pd, IORESOURCE_MEM, 0);
408 if (!res)
409 return -EINVAL;
410
408 cfg.direction = direction;411 cfg.direction = direction;
409 412
410 if (direction == DMA_DEV_TO_MEM) {413 if (direction == DMA_DEV_TO_MEM) {
drivers/mtd/devices/phram.c+8−4
@@ -264,16 +264,20 @@ static int phram_setup(const char *val) · 263 unmodified lines
264 }264 }
265 }265 }
266 266
267 if (erasesize)
268 div_u64_rem(len, (uint32_t)erasesize, &rem);
269
270 if (len == 0 || erasesize == 0 || erasesize > len267 if (len == 0 || erasesize == 0 || erasesize > len
271 || erasesize > UINT_MAX || rem) {268 || erasesize > UINT_MAX) {
272 parse_err("illegal erasesize or len\n");269 parse_err("illegal erasesize or len\n");
273 ret = -EINVAL;270 ret = -EINVAL;
274 goto error;271 goto error;
275 }272 }
276 273
274 div_u64_rem(len, (uint32_t)erasesize, &rem);
275 if (rem) {
276 parse_err("len is not multiple of erasesize\n");
277 ret = -EINVAL;
278 goto error;
279 }
280
277 ret = register_device(name, start, len, (uint32_t)erasesize);281 ret = register_device(name, start, len, (uint32_t)erasesize);
278 if (ret)282 if (ret)
279 goto error;283 goto error;
drivers/mtd/nand/raw/Kconfig+2−1
@@ -42,7 +42,8 @@ config MTD_NAND_OMAP2 · 41 unmodified lines
42 tristate "OMAP2, OMAP3, OMAP4 and Keystone NAND controller"42 tristate "OMAP2, OMAP3, OMAP4 and Keystone NAND controller"
43 depends on ARCH_OMAP2PLUS || ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST43 depends on ARCH_OMAP2PLUS || ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST
44 depends on HAS_IOMEM44 depends on HAS_IOMEM
45 select OMAP_GPMC if ARCH_K345 select MEMORY
46 select OMAP_GPMC
46 help47 help
47 Support for NAND flash on Texas Instruments OMAP2, OMAP3, OMAP448 Support for NAND flash on Texas Instruments OMAP2, OMAP3, OMAP4
48 and Keystone platforms.49 and Keystone platforms.
drivers/mtd/nand/raw/brcmnand/brcmnand.c+1−1
@@ -2106,7 +2106,7 @@ static int brcmnand_read_by_pio(struct mtd_info *mtd, struct nand_chip *chip, · 2105 unmodified lines
2106 mtd->oobsize / trans,2106 mtd->oobsize / trans,
2107 host->hwcfg.sector_size_1k);2107 host->hwcfg.sector_size_1k);
2108 2108
2109 if (!ret) {2109 if (ret != -EBADMSG) {
2110 *err_addr = brcmnand_get_uncorrecc_addr(ctrl);2110 *err_addr = brcmnand_get_uncorrecc_addr(ctrl);
2111 2111
2112 if (*err_addr)2112 if (*err_addr)
drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c+2−1
@@ -2285,7 +2285,7 @@ static int gpmi_nfc_exec_op(struct nand_chip *chip, · 2284 unmodified lines
2285 this->hw.must_apply_timings = false;2285 this->hw.must_apply_timings = false;
2286 ret = gpmi_nfc_apply_timings(this);2286 ret = gpmi_nfc_apply_timings(this);
2287 if (ret)2287 if (ret)
2288 return ret;2288 goto out_pm;
2289 }2289 }
2290 2290
2291 dev_dbg(this->dev, "%s: %d instructions\n", __func__, op->ninstrs);2291 dev_dbg(this->dev, "%s: %d instructions\n", __func__, op->ninstrs);
@@ -2414,6 +2414,7 @@ unmap: · 122 unmodified lines
2414 2414
2415 this->bch = false;2415 this->bch = false;
2416 2416
2417out_pm:
2417 pm_runtime_mark_last_busy(this->dev);2418 pm_runtime_mark_last_busy(this->dev);
2418 pm_runtime_put_autosuspend(this->dev);2419 pm_runtime_put_autosuspend(this->dev);
2419 2420
drivers/mtd/nand/raw/ingenic/ingenic_ecc.c+6−1
@@ -68,9 +68,14 @@ static struct ingenic_ecc *ingenic_ecc_get(struct device_node *np) · 67 unmodified lines
68 struct ingenic_ecc *ecc;68 struct ingenic_ecc *ecc;
69 69
70 pdev = of_find_device_by_node(np);70 pdev = of_find_device_by_node(np);
71 if (!pdev || !platform_get_drvdata(pdev))71 if (!pdev)
72 return ERR_PTR(-EPROBE_DEFER);72 return ERR_PTR(-EPROBE_DEFER);
73 73
74 if (!platform_get_drvdata(pdev)) {
75 put_device(&pdev->dev);
76 return ERR_PTR(-EPROBE_DEFER);
77 }
78
74 ecc = platform_get_drvdata(pdev);79 ecc = platform_get_drvdata(pdev);
75 clk_prepare_enable(ecc->clk);80 clk_prepare_enable(ecc->clk);
76 81
drivers/mtd/nand/raw/qcom_nandc.c+6−8
@@ -2,7 +2,6 @@ · 1 unmodified line
2/*2/*
3 * Copyright (c) 2016, The Linux Foundation. All rights reserved.3 * Copyright (c) 2016, The Linux Foundation. All rights reserved.
4 */4 */
5
6#include <linux/clk.h>5#include <linux/clk.h>
7#include <linux/slab.h>6#include <linux/slab.h>
8#include <linux/bitops.h>7#include <linux/bitops.h>
@@ -3073,10 +3072,6 @@ static int qcom_nandc_probe(struct platform_device *pdev) · 3064 unmodified lines
3073 if (dma_mapping_error(dev, nandc->base_dma))3072 if (dma_mapping_error(dev, nandc->base_dma))
3074 return -ENXIO;3073 return -ENXIO;
3075 3074
3076 ret = qcom_nandc_alloc(nandc);
3077 if (ret)
3078 goto err_nandc_alloc;
3079
3080 ret = clk_prepare_enable(nandc->core_clk);3075 ret = clk_prepare_enable(nandc->core_clk);
3081 if (ret)3076 if (ret)
3082 goto err_core_clk;3077 goto err_core_clk;
@@ -3085,6 +3080,10 @@ static int qcom_nandc_probe(struct platform_device *pdev) · 2 unmodified lines
3085 if (ret)3080 if (ret)
3086 goto err_aon_clk;3081 goto err_aon_clk;
3087 3082
3083 ret = qcom_nandc_alloc(nandc);
3084 if (ret)
3085 goto err_nandc_alloc;
3086
3088 ret = qcom_nandc_setup(nandc);3087 ret = qcom_nandc_setup(nandc);
3089 if (ret)3088 if (ret)
3090 goto err_setup;3089 goto err_setup;
@@ -3096,15 +3095,14 @@ static int qcom_nandc_probe(struct platform_device *pdev) · 5 unmodified lines
3096 return 0;3095 return 0;
3097 3096
3098err_setup:3097err_setup:
3098 qcom_nandc_unalloc(nandc);
3099err_nandc_alloc:
3099 clk_disable_unprepare(nandc->aon_clk);3100 clk_disable_unprepare(nandc->aon_clk);
3100err_aon_clk:3101err_aon_clk:
3101 clk_disable_unprepare(nandc->core_clk);3102 clk_disable_unprepare(nandc->core_clk);
3102err_core_clk:3103err_core_clk:
3103 qcom_nandc_unalloc(nandc);
3104err_nandc_alloc:
3105 dma_unmap_resource(dev, res->start, resource_size(res),3104 dma_unmap_resource(dev, res->start, resource_size(res),
3106 DMA_BIDIRECTIONAL, 0);3105 DMA_BIDIRECTIONAL, 0);
3107
3108 return ret;3106 return ret;
3109}3107}
3110 3108
drivers/mtd/parsers/qcomsmempart.c+23−13
@@ -58,11 +58,11 @@ static int parse_qcomsmem_part(struct mtd_info *mtd, · 57 unmodified lines
58 const struct mtd_partition **pparts,58 const struct mtd_partition **pparts,
59 struct mtd_part_parser_data *data)59 struct mtd_part_parser_data *data)
60{60{
61 size_t len = SMEM_FLASH_PTABLE_HDR_LEN;
62 int ret, i, j, tmpparts, numparts = 0;
61 struct smem_flash_pentry *pentry;63 struct smem_flash_pentry *pentry;
62 struct smem_flash_ptable *ptable;64 struct smem_flash_ptable *ptable;
63 size_t len = SMEM_FLASH_PTABLE_HDR_LEN;
64 struct mtd_partition *parts;65 struct mtd_partition *parts;
65 int ret, i, numparts;
66 char *name, *c;66 char *name, *c;
67 67
68 if (IS_ENABLED(CONFIG_MTD_SPI_NOR_USE_4K_SECTORS)68 if (IS_ENABLED(CONFIG_MTD_SPI_NOR_USE_4K_SECTORS)
@@ -75,7 +75,8 @@ static int parse_qcomsmem_part(struct mtd_info *mtd, · 6 unmodified lines
75 pr_debug("Parsing partition table info from SMEM\n");75 pr_debug("Parsing partition table info from SMEM\n");
76 ptable = qcom_smem_get(SMEM_APPS, SMEM_AARM_PARTITION_TABLE, &len);76 ptable = qcom_smem_get(SMEM_APPS, SMEM_AARM_PARTITION_TABLE, &len);
77 if (IS_ERR(ptable)) {77 if (IS_ERR(ptable)) {
78 pr_err("Error reading partition table header\n");78 if (PTR_ERR(ptable) != -EPROBE_DEFER)
79 pr_err("Error reading partition table header\n");
79 return PTR_ERR(ptable);80 return PTR_ERR(ptable);
80 }81 }
81 82
@@ -87,8 +88,8 @@ static int parse_qcomsmem_part(struct mtd_info *mtd, · 5 unmodified lines
87 }88 }
88 89
89 /* Ensure that # of partitions is less than the max we have allocated */90 /* Ensure that # of partitions is less than the max we have allocated */
90 numparts = le32_to_cpu(ptable->numparts);91 tmpparts = le32_to_cpu(ptable->numparts);
91 if (numparts > SMEM_FLASH_PTABLE_MAX_PARTS_V4) {92 if (tmpparts > SMEM_FLASH_PTABLE_MAX_PARTS_V4) {
92 pr_err("Partition numbers exceed the max limit\n");93 pr_err("Partition numbers exceed the max limit\n");
93 return -EINVAL;94 return -EINVAL;
94 }95 }
@@ -116,11 +117,17 @@ static int parse_qcomsmem_part(struct mtd_info *mtd, · 21 unmodified lines
116 return PTR_ERR(ptable);117 return PTR_ERR(ptable);
117 }118 }
118 119
120 for (i = 0; i < tmpparts; i++) {
121 pentry = &ptable->pentry[i];
122 if (pentry->name[0] != '\0')
123 numparts++;
124 }
125
119 parts = kcalloc(numparts, sizeof(*parts), GFP_KERNEL);126 parts = kcalloc(numparts, sizeof(*parts), GFP_KERNEL);
120 if (!parts)127 if (!parts)
121 return -ENOMEM;128 return -ENOMEM;
122 129
123 for (i = 0; i < numparts; i++) {130 for (i = 0, j = 0; i < tmpparts; i++) {
124 pentry = &ptable->pentry[i];131 pentry = &ptable->pentry[i];
125 if (pentry->name[0] == '\0')132 if (pentry->name[0] == '\0')
126 continue;133 continue;
@@ -135,24 +142,25 @@ static int parse_qcomsmem_part(struct mtd_info *mtd, · 8 unmodified lines
135 for (c = name; *c != '\0'; c++)142 for (c = name; *c != '\0'; c++)
136 *c = tolower(*c);143 *c = tolower(*c);
137 144
138 parts[i].name = name;145 parts[j].name = name;
139 parts[i].offset = le32_to_cpu(pentry->offset) * mtd->erasesize;146 parts[j].offset = le32_to_cpu(pentry->offset) * mtd->erasesize;
140 parts[i].mask_flags = pentry->attr;147 parts[j].mask_flags = pentry->attr;
141 parts[i].size = le32_to_cpu(pentry->length) * mtd->erasesize;148 parts[j].size = le32_to_cpu(pentry->length) * mtd->erasesize;
142 pr_debug("%d: %s offs=0x%08x size=0x%08x attr:0x%08x\n",149 pr_debug("%d: %s offs=0x%08x size=0x%08x attr:0x%08x\n",
143 i, pentry->name, le32_to_cpu(pentry->offset),150 i, pentry->name, le32_to_cpu(pentry->offset),
144 le32_to_cpu(pentry->length), pentry->attr);151 le32_to_cpu(pentry->length), pentry->attr);
152 j++;
145 }153 }
146 154
147 pr_debug("SMEM partition table found: ver: %d len: %d\n",155 pr_debug("SMEM partition table found: ver: %d len: %d\n",
148 le32_to_cpu(ptable->version), numparts);156 le32_to_cpu(ptable->version), tmpparts);
149 *pparts = parts;157 *pparts = parts;
150 158
151 return numparts;159 return numparts;
152 160
153out_free_parts:161out_free_parts:
154 while (--i >= 0)162 while (--j >= 0)
155 kfree(parts[i].name);163 kfree(parts[j].name);
156 kfree(parts);164 kfree(parts);
157 *pparts = NULL;165 *pparts = NULL;
158 166
@@ -166,6 +174,8 @@ static void parse_qcomsmem_cleanup(const struct mtd_partition *pparts, · 7 unmodified lines
166 174
167 for (i = 0; i < nr_parts; i++)175 for (i = 0; i < nr_parts; i++)
168 kfree(pparts[i].name);176 kfree(pparts[i].name);
177
178 kfree(pparts);
169}179}
170 180
171static const struct of_device_id qcomsmem_of_match_table[] = {181static const struct of_device_id qcomsmem_of_match_table[] = {
drivers/net/bonding/bond_3ad.c+27−6
@@ -225,7 +225,7 @@ static inline int __check_agg_selection_timer(struct port *port) · 224 unmodified lines
225 if (bond == NULL)225 if (bond == NULL)
226 return 0;226 return 0;
227 227
228 return BOND_AD_INFO(bond).agg_select_timer ? 1 : 0;228 return atomic_read(&BOND_AD_INFO(bond).agg_select_timer) ? 1 : 0;
229}229}
230 230
231/**231/**
@@ -1021,8 +1021,8 @@ static void ad_mux_machine(struct port *port, bool *update_slave_arr) · 789 unmodified lines
1021 if (port->aggregator &&1021 if (port->aggregator &&
1022 port->aggregator->is_active &&1022 port->aggregator->is_active &&
1023 !__port_is_enabled(port)) {1023 !__port_is_enabled(port)) {
1024
1025 __enable_port(port);1024 __enable_port(port);
1025 *update_slave_arr = true;
1026 }1026 }
1027 }1027 }
1028 break;1028 break;
@@ -1779,6 +1779,7 @@ static void ad_agg_selection_logic(struct aggregator *agg, · 750 unmodified lines
1779 port = port->next_port_in_aggregator) {1779 port = port->next_port_in_aggregator) {
1780 __enable_port(port);1780 __enable_port(port);
1781 }1781 }
1782 *update_slave_arr = true;
1782 }1783 }
1783 }1784 }
1784 1785
@@ -1994,7 +1995,7 @@ static void ad_marker_response_received(struct bond_marker *marker, · 209 unmodified lines
1994 */1995 */
1995void bond_3ad_initiate_agg_selection(struct bonding *bond, int timeout)1996void bond_3ad_initiate_agg_selection(struct bonding *bond, int timeout)
1996{1997{
1997 BOND_AD_INFO(bond).agg_select_timer = timeout;1998 atomic_set(&BOND_AD_INFO(bond).agg_select_timer, timeout);
1998}1999}
1999 2000
2000/**2001/**
@@ -2277,6 +2278,28 @@ void bond_3ad_update_ad_actor_settings(struct bonding *bond) · 276 unmodified lines
2277 spin_unlock_bh(&bond->mode_lock);2278 spin_unlock_bh(&bond->mode_lock);
2278}2279}
2279 2280
2281/**
2282 * bond_agg_timer_advance - advance agg_select_timer
2283 * @bond: bonding structure
2284 *
2285 * Return true when agg_select_timer reaches 0.
2286 */
2287static bool bond_agg_timer_advance(struct bonding *bond)
2288{
2289 int val, nval;
2290
2291 while (1) {
2292 val = atomic_read(&BOND_AD_INFO(bond).agg_select_timer);
2293 if (!val)
2294 return false;
2295 nval = val - 1;
2296 if (atomic_cmpxchg(&BOND_AD_INFO(bond).agg_select_timer,
2297 val, nval) == val)
2298 break;
2299 }
2300 return nval == 0;
2301}
2302
2280/**2303/**
2281 * bond_3ad_state_machine_handler - handle state machines timeout2304 * bond_3ad_state_machine_handler - handle state machines timeout
2282 * @work: work context to fetch bonding struct to work on from2305 * @work: work context to fetch bonding struct to work on from
@@ -2312,9 +2335,7 @@ void bond_3ad_state_machine_handler(struct work_struct *work) · 29 unmodified lines
2312 if (!bond_has_slaves(bond))2335 if (!bond_has_slaves(bond))
2313 goto re_arm;2336 goto re_arm;
2314 2337
2315 /* check if agg_select_timer timer after initialize is timed out */2338 if (bond_agg_timer_advance(bond)) {
2316 if (BOND_AD_INFO(bond).agg_select_timer &&
2317 !(--BOND_AD_INFO(bond).agg_select_timer)) {
2318 slave = bond_first_slave_rcu(bond);2339 slave = bond_first_slave_rcu(bond);
2319 port = slave ? &(SLAVE_AD_INFO(slave)->port) : NULL;2340 port = slave ? &(SLAVE_AD_INFO(slave)->port) : NULL;
2320 2341
drivers/net/bonding/bond_main.c+2−7
@@ -2379,10 +2379,9 @@ static int __bond_release_one(struct net_device *bond_dev, · 2378 unmodified lines
2379 bond_select_active_slave(bond);2379 bond_select_active_slave(bond);
2380 }2380 }
2381 2381
2382 if (!bond_has_slaves(bond)) {2382 bond_set_carrier(bond);
2383 bond_set_carrier(bond);2383 if (!bond_has_slaves(bond))
2384 eth_hw_addr_random(bond_dev);2384 eth_hw_addr_random(bond_dev);
2385 }
2386 2385
2387 unblock_netpoll_tx();2386 unblock_netpoll_tx();
2388 synchronize_rcu();2387 synchronize_rcu();
@@ -4133,9 +4132,7 @@ static int bond_eth_ioctl(struct net_device *bond_dev, struct ifreq *ifr, int cm · 1744 unmodified lines
4133 4132
4134 fallthrough;4133 fallthrough;
4135 case SIOCGHWTSTAMP:4134 case SIOCGHWTSTAMP:
4136 rcu_read_lock();
4137 real_dev = bond_option_active_slave_get_rcu(bond);4135 real_dev = bond_option_active_slave_get_rcu(bond);
4138 rcu_read_unlock();
4139 if (!real_dev)4136 if (!real_dev)
4140 return -EOPNOTSUPP;4137 return -EOPNOTSUPP;
4141 4138
@@ -5382,9 +5379,7 @@ static int bond_ethtool_get_ts_info(struct net_device *bond_dev, · 1240 unmodified lines
5382 struct net_device *real_dev;5379 struct net_device *real_dev;
5383 struct phy_device *phydev;5380 struct phy_device *phydev;
5384 5381
5385 rcu_read_lock();
5386 real_dev = bond_option_active_slave_get_rcu(bond);5382 real_dev = bond_option_active_slave_get_rcu(bond);
5387 rcu_read_unlock();
5388 if (real_dev) {5383 if (real_dev) {
5389 ops = real_dev->ethtool_ops;5384 ops = real_dev->ethtool_ops;
5390 phydev = real_dev->phydev;5385 phydev = real_dev->phydev;
drivers/net/can/flexcan/flexcan-core.c+1−0
@@ -296,6 +296,7 @@ static_assert(sizeof(struct flexcan_regs) == 0x4 * 18 + 0xfb8); · 295 unmodified lines
296static const struct flexcan_devtype_data fsl_mcf5441x_devtype_data = {296static const struct flexcan_devtype_data fsl_mcf5441x_devtype_data = {
297 .quirks = FLEXCAN_QUIRK_BROKEN_PERR_STATE |297 .quirks = FLEXCAN_QUIRK_BROKEN_PERR_STATE |
298 FLEXCAN_QUIRK_NR_IRQ_3 | FLEXCAN_QUIRK_NR_MB_16 |298 FLEXCAN_QUIRK_NR_IRQ_3 | FLEXCAN_QUIRK_NR_MB_16 |
299 FLEXCAN_QUIRK_SUPPPORT_RX_MAILBOX |
299 FLEXCAN_QUIRK_SUPPPORT_RX_FIFO,300 FLEXCAN_QUIRK_SUPPPORT_RX_FIFO,
300};301};
301 302
drivers/net/can/flexcan/flexcan.h+1−1
@@ -21,7 +21,7 @@ · 20 unmodified lines
21 * Below is some version info we got:21 * Below is some version info we got:
22 * SOC Version IP-Version Glitch- [TR]WRN_INT IRQ Err Memory err RTR rece- FD Mode MB22 * SOC Version IP-Version Glitch- [TR]WRN_INT IRQ Err Memory err RTR rece- FD Mode MB
23 * Filter? connected? Passive detection ption in MB Supported?23 * Filter? connected? Passive detection ption in MB Supported?
24 * MCF5441X FlexCAN2 ? no yes no no yes no 1624 * MCF5441X FlexCAN2 ? no yes no no no no 16
25 * MX25 FlexCAN2 03.00.00.00 no no no no no no 6425 * MX25 FlexCAN2 03.00.00.00 no no no no no no 64
26 * MX28 FlexCAN2 03.00.04.00 yes yes no no no no 6426 * MX28 FlexCAN2 03.00.04.00 yes yes no no no no 64
27 * MX35 FlexCAN2 03.00.00.00 no no no no no no 6427 * MX35 FlexCAN2 03.00.00.00 no no no no no no 64
drivers/net/can/m_can/m_can.c+6−0
@@ -336,6 +336,9 @@ m_can_fifo_read(struct m_can_classdev *cdev, · 335 unmodified lines
336 u32 addr_offset = cdev->mcfg[MRAM_RXF0].off + fgi * RXF0_ELEMENT_SIZE +336 u32 addr_offset = cdev->mcfg[MRAM_RXF0].off + fgi * RXF0_ELEMENT_SIZE +
337 offset;337 offset;
338 338
339 if (val_count == 0)
340 return 0;
341
339 return cdev->ops->read_fifo(cdev, addr_offset, val, val_count);342 return cdev->ops->read_fifo(cdev, addr_offset, val, val_count);
340}343}
341 344
@@ -346,6 +349,9 @@ m_can_fifo_write(struct m_can_classdev *cdev, · 4 unmodified lines
346 u32 addr_offset = cdev->mcfg[MRAM_TXB].off + fpi * TXB_ELEMENT_SIZE +349 u32 addr_offset = cdev->mcfg[MRAM_TXB].off + fpi * TXB_ELEMENT_SIZE +
347 offset;350 offset;
348 351
352 if (val_count == 0)
353 return 0;
354
349 return cdev->ops->write_fifo(cdev, addr_offset, val, val_count);355 return cdev->ops->write_fifo(cdev, addr_offset, val, val_count);
350}356}
351 357
drivers/net/can/m_can/tcan4x5x-regmap.c+1−1
@@ -12,7 +12,7 @@ · 11 unmodified lines
12#define TCAN4X5X_SPI_INSTRUCTION_WRITE (0x61 << 24)12#define TCAN4X5X_SPI_INSTRUCTION_WRITE (0x61 << 24)
13#define TCAN4X5X_SPI_INSTRUCTION_READ (0x41 << 24)13#define TCAN4X5X_SPI_INSTRUCTION_READ (0x41 << 24)
14 14
15#define TCAN4X5X_MAX_REGISTER 0x8ffc15#define TCAN4X5X_MAX_REGISTER 0x87fc
16 16
17static int tcan4x5x_regmap_gather_write(void *context,17static int tcan4x5x_regmap_gather_write(void *context,
18 const void *reg, size_t reg_len,18 const void *reg, size_t reg_len,
drivers/net/dsa/Kconfig+2−0
@@ -36,6 +36,7 @@ config NET_DSA_LANTIQ_GSWIP · 35 unmodified lines
36config NET_DSA_MT753036config NET_DSA_MT7530
37 tristate "MediaTek MT753x and MT7621 Ethernet switch support"37 tristate "MediaTek MT753x and MT7621 Ethernet switch support"
38 select NET_DSA_TAG_MTK38 select NET_DSA_TAG_MTK
39 select MEDIATEK_GE_PHY
39 help40 help
40 This enables support for the MediaTek MT7530, MT7531, and MT762141 This enables support for the MediaTek MT7530, MT7531, and MT7621
41 Ethernet switch chips.42 Ethernet switch chips.
@@ -81,6 +82,7 @@ config NET_DSA_REALTEK_SMI · 39 unmodified lines
81 82
82config NET_DSA_SMSC_LAN930383config NET_DSA_SMSC_LAN9303
83 tristate84 tristate
85 depends on VLAN_8021Q || VLAN_8021Q=n
84 select NET_DSA_TAG_LAN930386 select NET_DSA_TAG_LAN9303
85 select REGMAP87 select REGMAP
86 help88 help
drivers/net/dsa/bcm_sf2.c+5−2
@@ -621,7 +621,7 @@ static int bcm_sf2_mdio_register(struct dsa_switch *ds) · 620 unmodified lines
621 get_device(&priv->master_mii_bus->dev);621 get_device(&priv->master_mii_bus->dev);
622 priv->master_mii_dn = dn;622 priv->master_mii_dn = dn;
623 623
624 priv->slave_mii_bus = devm_mdiobus_alloc(ds->dev);624 priv->slave_mii_bus = mdiobus_alloc();
625 if (!priv->slave_mii_bus) {625 if (!priv->slave_mii_bus) {
626 of_node_put(dn);626 of_node_put(dn);
627 return -ENOMEM;627 return -ENOMEM;
@@ -681,8 +681,10 @@ static int bcm_sf2_mdio_register(struct dsa_switch *ds) · 53 unmodified lines
681 }681 }
682 682
683 err = mdiobus_register(priv->slave_mii_bus);683 err = mdiobus_register(priv->slave_mii_bus);
684 if (err && dn)684 if (err && dn) {
685 mdiobus_free(priv->slave_mii_bus);
685 of_node_put(dn);686 of_node_put(dn);
687 }
686 688
687 return err;689 return err;
688}690}
@@ -690,6 +692,7 @@ static int bcm_sf2_mdio_register(struct dsa_switch *ds) · 1 unmodified line
690static void bcm_sf2_mdio_unregister(struct bcm_sf2_priv *priv)692static void bcm_sf2_mdio_unregister(struct bcm_sf2_priv *priv)
691{693{
692 mdiobus_unregister(priv->slave_mii_bus);694 mdiobus_unregister(priv->slave_mii_bus);
695 mdiobus_free(priv->slave_mii_bus);
693 of_node_put(priv->master_mii_dn);696 of_node_put(priv->master_mii_dn);
694}697}
695 698
drivers/net/dsa/lan9303-core.c+10−3
@@ -10,6 +10,7 @@ · 9 unmodified lines
10#include <linux/mii.h>10#include <linux/mii.h>
11#include <linux/phy.h>11#include <linux/phy.h>
12#include <linux/if_bridge.h>12#include <linux/if_bridge.h>
13#include <linux/if_vlan.h>
13#include <linux/etherdevice.h>14#include <linux/etherdevice.h>
14 15
15#include "lan9303.h"16#include "lan9303.h"
@@ -1083,21 +1084,27 @@ static void lan9303_adjust_link(struct dsa_switch *ds, int port, · 1067 unmodified lines
1083static int lan9303_port_enable(struct dsa_switch *ds, int port,1084static int lan9303_port_enable(struct dsa_switch *ds, int port,
1084 struct phy_device *phy)1085 struct phy_device *phy)
1085{1086{
1087 struct dsa_port *dp = dsa_to_port(ds, port);
1086 struct lan9303 *chip = ds->priv;1088 struct lan9303 *chip = ds->priv;
1087 1089
1088 if (!dsa_is_user_port(ds, port))1090 if (!dsa_port_is_user(dp))
1089 return 0;1091 return 0;
1090 1092
1093 vlan_vid_add(dp->cpu_dp->master, htons(ETH_P_8021Q), port);
1094
1091 return lan9303_enable_processing_port(chip, port);1095 return lan9303_enable_processing_port(chip, port);
1092}1096}
1093 1097
1094static void lan9303_port_disable(struct dsa_switch *ds, int port)1098static void lan9303_port_disable(struct dsa_switch *ds, int port)
1095{1099{
1100 struct dsa_port *dp = dsa_to_port(ds, port);
1096 struct lan9303 *chip = ds->priv;1101 struct lan9303 *chip = ds->priv;
1097 1102
1098 if (!dsa_is_user_port(ds, port))1103 if (!dsa_port_is_user(dp))
1099 return;1104 return;
1100 1105
1106 vlan_vid_del(dp->cpu_dp->master, htons(ETH_P_8021Q), port);
1107
1101 lan9303_disable_processing_port(chip, port);1108 lan9303_disable_processing_port(chip, port);
1102 lan9303_phy_write(ds, chip->phy_addr_base + port, MII_BMCR, BMCR_PDOWN);1109 lan9303_phy_write(ds, chip->phy_addr_base + port, MII_BMCR, BMCR_PDOWN);
1103}1110}
@@ -1310,7 +1317,7 @@ static int lan9303_probe_reset_gpio(struct lan9303 *chip, · 206 unmodified lines
1310 struct device_node *np)1317 struct device_node *np)
1311{1318{
1312 chip->reset_gpio = devm_gpiod_get_optional(chip->dev, "reset",1319 chip->reset_gpio = devm_gpiod_get_optional(chip->dev, "reset",
1313 GPIOD_OUT_LOW);1320 GPIOD_OUT_HIGH);
1314 if (IS_ERR(chip->reset_gpio))1321 if (IS_ERR(chip->reset_gpio))
1315 return PTR_ERR(chip->reset_gpio);1322 return PTR_ERR(chip->reset_gpio);
1316 1323
drivers/net/dsa/lantiq_gswip.c+11−3
@@ -498,8 +498,9 @@ static int gswip_mdio_rd(struct mii_bus *bus, int addr, int reg) · 497 unmodified lines
498static int gswip_mdio(struct gswip_priv *priv, struct device_node *mdio_np)498static int gswip_mdio(struct gswip_priv *priv, struct device_node *mdio_np)
499{499{
500 struct dsa_switch *ds = priv->ds;500 struct dsa_switch *ds = priv->ds;
501 int err;
501 502
502 ds->slave_mii_bus = devm_mdiobus_alloc(priv->dev);503 ds->slave_mii_bus = mdiobus_alloc();
503 if (!ds->slave_mii_bus)504 if (!ds->slave_mii_bus)
504 return -ENOMEM;505 return -ENOMEM;
505 506
@@ -512,7 +513,11 @@ static int gswip_mdio(struct gswip_priv *priv, struct device_node *mdio_np) · 6 unmodified lines
512 ds->slave_mii_bus->parent = priv->dev;513 ds->slave_mii_bus->parent = priv->dev;
513 ds->slave_mii_bus->phy_mask = ~ds->phys_mii_mask;514 ds->slave_mii_bus->phy_mask = ~ds->phys_mii_mask;
514 515
515 return of_mdiobus_register(ds->slave_mii_bus, mdio_np);516 err = of_mdiobus_register(ds->slave_mii_bus, mdio_np);
517 if (err)
518 mdiobus_free(ds->slave_mii_bus);
519
520 return err;
516}521}
517 522
518static int gswip_pce_table_entry_read(struct gswip_priv *priv,523static int gswip_pce_table_entry_read(struct gswip_priv *priv,
@@ -2145,8 +2150,10 @@ disable_switch: · 1626 unmodified lines
2145 gswip_mdio_mask(priv, GSWIP_MDIO_GLOB_ENABLE, 0, GSWIP_MDIO_GLOB);2150 gswip_mdio_mask(priv, GSWIP_MDIO_GLOB_ENABLE, 0, GSWIP_MDIO_GLOB);
2146 dsa_unregister_switch(priv->ds);2151 dsa_unregister_switch(priv->ds);
2147mdio_bus:2152mdio_bus:
2148 if (mdio_np)2153 if (mdio_np) {
2149 mdiobus_unregister(priv->ds->slave_mii_bus);2154 mdiobus_unregister(priv->ds->slave_mii_bus);
2155 mdiobus_free(priv->ds->slave_mii_bus);
2156 }
2150put_mdio_node:2157put_mdio_node:
2151 of_node_put(mdio_np);2158 of_node_put(mdio_np);
2152 for (i = 0; i < priv->num_gphy_fw; i++)2159 for (i = 0; i < priv->num_gphy_fw; i++)
@@ -2170,6 +2177,7 @@ static int gswip_remove(struct platform_device *pdev) · 17 unmodified lines
2170 if (priv->ds->slave_mii_bus) {2177 if (priv->ds->slave_mii_bus) {
2171 mdiobus_unregister(priv->ds->slave_mii_bus);2178 mdiobus_unregister(priv->ds->slave_mii_bus);
2172 of_node_put(priv->ds->slave_mii_bus->dev.of_node);2179 of_node_put(priv->ds->slave_mii_bus->dev.of_node);
2180 mdiobus_free(priv->ds->slave_mii_bus);
2173 }2181 }
2174 2182
2175 for (i = 0; i < priv->num_gphy_fw; i++)2183 for (i = 0; i < priv->num_gphy_fw; i++)
drivers/net/dsa/mt7530.c+1−1
@@ -2074,7 +2074,7 @@ mt7530_setup_mdio(struct mt7530_priv *priv) · 2073 unmodified lines
2074 if (priv->irq)2074 if (priv->irq)
2075 mt7530_setup_mdio_irq(priv);2075 mt7530_setup_mdio_irq(priv);
2076 2076
2077 ret = mdiobus_register(bus);2077 ret = devm_mdiobus_register(dev, bus);
2078 if (ret) {2078 if (ret) {
2079 dev_err(dev, "failed to register MDIO bus: %d\n", ret);2079 dev_err(dev, "failed to register MDIO bus: %d\n", ret);
2080 if (priv->irq)2080 if (priv->irq)
drivers/net/dsa/mv88e6xxx/chip.c+17−5
@@ -2284,6 +2284,13 @@ static int mv88e6xxx_port_vlan_del(struct dsa_switch *ds, int port, · 2283 unmodified lines
2284 if (!mv88e6xxx_max_vid(chip))2284 if (!mv88e6xxx_max_vid(chip))
2285 return -EOPNOTSUPP;2285 return -EOPNOTSUPP;
2286 2286
2287 /* The ATU removal procedure needs the FID to be mapped in the VTU,
2288 * but FDB deletion runs concurrently with VLAN deletion. Flush the DSA
2289 * switchdev workqueue to ensure that all FDB entries are deleted
2290 * before we remove the VLAN.
2291 */
2292 dsa_flush_workqueue();
2293
2287 mv88e6xxx_reg_lock(chip);2294 mv88e6xxx_reg_lock(chip);
2288 2295
2289 err = mv88e6xxx_port_get_pvid(chip, port, &pvid);2296 err = mv88e6xxx_port_get_pvid(chip, port, &pvid);
@@ -3399,7 +3406,7 @@ static int mv88e6xxx_mdio_register(struct mv88e6xxx_chip *chip, · 1109 unmodified lines
3399 return err;3406 return err;
3400 }3407 }
3401 3408
3402 bus = devm_mdiobus_alloc_size(chip->dev, sizeof(*mdio_bus));3409 bus = mdiobus_alloc_size(sizeof(*mdio_bus));
3403 if (!bus)3410 if (!bus)
3404 return -ENOMEM;3411 return -ENOMEM;
3405 3412
@@ -3424,14 +3431,14 @@ static int mv88e6xxx_mdio_register(struct mv88e6xxx_chip *chip, · 18 unmodified lines
3424 if (!external) {3431 if (!external) {
3425 err = mv88e6xxx_g2_irq_mdio_setup(chip, bus);3432 err = mv88e6xxx_g2_irq_mdio_setup(chip, bus);
3426 if (err)3433 if (err)
3427 return err;3434 goto out;
3428 }3435 }
3429 3436
3430 err = of_mdiobus_register(bus, np);3437 err = of_mdiobus_register(bus, np);
3431 if (err) {3438 if (err) {
3432 dev_err(chip->dev, "Cannot register MDIO bus (%d)\n", err);3439 dev_err(chip->dev, "Cannot register MDIO bus (%d)\n", err);
3433 mv88e6xxx_g2_irq_mdio_free(chip, bus);3440 mv88e6xxx_g2_irq_mdio_free(chip, bus);
3434 return err;3441 goto out;
3435 }3442 }
3436 3443
3437 if (external)3444 if (external)
@@ -3440,21 +3447,26 @@ static int mv88e6xxx_mdio_register(struct mv88e6xxx_chip *chip, · 2 unmodified lines
3440 list_add(&mdio_bus->list, &chip->mdios);3447 list_add(&mdio_bus->list, &chip->mdios);
3441 3448
3442 return 0;3449 return 0;
3450
3451out:
3452 mdiobus_free(bus);
3453 return err;
3443}3454}
3444 3455
3445static void mv88e6xxx_mdios_unregister(struct mv88e6xxx_chip *chip)3456static void mv88e6xxx_mdios_unregister(struct mv88e6xxx_chip *chip)
3446 3457
3447{3458{
3448 struct mv88e6xxx_mdio_bus *mdio_bus;3459 struct mv88e6xxx_mdio_bus *mdio_bus, *p;
3449 struct mii_bus *bus;3460 struct mii_bus *bus;
3450 3461
3451 list_for_each_entry(mdio_bus, &chip->mdios, list) {3462 list_for_each_entry_safe(mdio_bus, p, &chip->mdios, list) {
3452 bus = mdio_bus->bus;3463 bus = mdio_bus->bus;
3453 3464
3454 if (!mdio_bus->external)3465 if (!mdio_bus->external)
3455 mv88e6xxx_g2_irq_mdio_free(chip, bus);3466 mv88e6xxx_g2_irq_mdio_free(chip, bus);
3456 3467
3457 mdiobus_unregister(bus);3468 mdiobus_unregister(bus);
3469 mdiobus_free(bus);
3458 }3470 }
3459}3471}
3460 3472
drivers/net/dsa/ocelot/felix_vsc9959.c+3−1
@@ -1061,7 +1061,7 @@ static int vsc9959_mdio_bus_alloc(struct ocelot *ocelot) · 1060 unmodified lines
1061 return PTR_ERR(hw);1061 return PTR_ERR(hw);
1062 }1062 }
1063 1063
1064 bus = devm_mdiobus_alloc_size(dev, sizeof(*mdio_priv));1064 bus = mdiobus_alloc_size(sizeof(*mdio_priv));
1065 if (!bus)1065 if (!bus)
1066 return -ENOMEM;1066 return -ENOMEM;
1067 1067
@@ -1081,6 +1081,7 @@ static int vsc9959_mdio_bus_alloc(struct ocelot *ocelot) · 13 unmodified lines
1081 rc = mdiobus_register(bus);1081 rc = mdiobus_register(bus);
1082 if (rc < 0) {1082 if (rc < 0) {
1083 dev_err(dev, "failed to register MDIO bus\n");1083 dev_err(dev, "failed to register MDIO bus\n");
1084 mdiobus_free(bus);
1084 return rc;1085 return rc;
1085 }1086 }
1086 1087
@@ -1132,6 +1133,7 @@ static void vsc9959_mdio_bus_free(struct ocelot *ocelot) · 45 unmodified lines
1132 lynx_pcs_destroy(phylink_pcs);1133 lynx_pcs_destroy(phylink_pcs);
1133 }1134 }
1134 mdiobus_unregister(felix->imdio);1135 mdiobus_unregister(felix->imdio);
1136 mdiobus_free(felix->imdio);
1135}1137}
1136 1138
1137static void vsc9959_sched_speed_set(struct ocelot *ocelot, int port,1139static void vsc9959_sched_speed_set(struct ocelot *ocelot, int port,
drivers/net/dsa/ocelot/seville_vsc9953.c+3−2
@@ -1029,7 +1029,7 @@ static int vsc9953_mdio_bus_alloc(struct ocelot *ocelot) · 1028 unmodified lines
1029 }1029 }
1030 1030
1031 /* Needed in order to initialize the bus mutex lock */1031 /* Needed in order to initialize the bus mutex lock */
1032 rc = of_mdiobus_register(bus, NULL);1032 rc = devm_of_mdiobus_register(dev, bus, NULL);
1033 if (rc < 0) {1033 if (rc < 0) {
1034 dev_err(dev, "failed to register MDIO bus\n");1034 dev_err(dev, "failed to register MDIO bus\n");
1035 return rc;1035 return rc;
@@ -1083,7 +1083,8 @@ static void vsc9953_mdio_bus_free(struct ocelot *ocelot) · 47 unmodified lines
1083 mdio_device_free(mdio_device);1083 mdio_device_free(mdio_device);
1084 lynx_pcs_destroy(phylink_pcs);1084 lynx_pcs_destroy(phylink_pcs);
1085 }1085 }
1086 mdiobus_unregister(felix->imdio);1086
1087 /* mdiobus_unregister and mdiobus_free handled by devres */
1087}1088}
1088 1089
1089static const struct felix_info seville_info_vsc9953 = {1090static const struct felix_info seville_info_vsc9953 = {
drivers/net/dsa/qca/ar9331.c+1−2
@@ -378,7 +378,7 @@ static int ar9331_sw_mbus_init(struct ar9331_sw_priv *priv) · 377 unmodified lines
378 if (!mnp)378 if (!mnp)
379 return -ENODEV;379 return -ENODEV;
380 380
381 ret = of_mdiobus_register(mbus, mnp);381 ret = devm_of_mdiobus_register(dev, mbus, mnp);
382 of_node_put(mnp);382 of_node_put(mnp);
383 if (ret)383 if (ret)
384 return ret;384 return ret;
@@ -1091,7 +1091,6 @@ static void ar9331_sw_remove(struct mdio_device *mdiodev) · 706 unmodified lines
1091 }1091 }
1092 1092
1093 irq_domain_remove(priv->irqdomain);1093 irq_domain_remove(priv->irqdomain);
1094 mdiobus_unregister(priv->mbus);
1095 dsa_unregister_switch(&priv->ds);1094 dsa_unregister_switch(&priv->ds);
1096 1095
1097 reset_control_assert(priv->sw_reset);1096 reset_control_assert(priv->sw_reset);
drivers/net/ethernet/3com/typhoon.c+4−2
@@ -2278,6 +2278,7 @@ typhoon_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) · 2277 unmodified lines
2278 struct net_device *dev;2278 struct net_device *dev;
2279 struct typhoon *tp;2279 struct typhoon *tp;
2280 int card_id = (int) ent->driver_data;2280 int card_id = (int) ent->driver_data;
2281 u8 addr[ETH_ALEN] __aligned(4);
2281 void __iomem *ioaddr;2282 void __iomem *ioaddr;
2282 void *shared;2283 void *shared;
2283 dma_addr_t shared_dma;2284 dma_addr_t shared_dma;
@@ -2409,8 +2410,9 @@ typhoon_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) · 125 unmodified lines
2409 goto error_out_reset;2410 goto error_out_reset;
2410 }2411 }
2411 2412
2412 *(__be16 *)&dev->dev_addr[0] = htons(le16_to_cpu(xp_resp[0].parm1));2413 *(__be16 *)&addr[0] = htons(le16_to_cpu(xp_resp[0].parm1));
2413 *(__be32 *)&dev->dev_addr[2] = htonl(le32_to_cpu(xp_resp[0].parm2));2414 *(__be32 *)&addr[2] = htonl(le32_to_cpu(xp_resp[0].parm2));
2415 eth_hw_addr_set(dev, addr);
2414 2416
2415 if (!is_valid_ether_addr(dev->dev_addr)) {2417 if (!is_valid_ether_addr(dev->dev_addr)) {
2416 err_msg = "Could not obtain valid ethernet address, aborting";2418 err_msg = "Could not obtain valid ethernet address, aborting";
drivers/net/ethernet/8390/etherh.c+4−2
@@ -655,6 +655,7 @@ etherh_probe(struct expansion_card *ec, const struct ecard_id *id) · 654 unmodified lines
655 struct ei_device *ei_local;655 struct ei_device *ei_local;
656 struct net_device *dev;656 struct net_device *dev;
657 struct etherh_priv *eh;657 struct etherh_priv *eh;
658 u8 addr[ETH_ALEN];
658 int ret;659 int ret;
659 660
660 ret = ecard_request_resources(ec);661 ret = ecard_request_resources(ec);
@@ -724,12 +725,13 @@ etherh_probe(struct expansion_card *ec, const struct ecard_id *id) · 63 unmodified lines
724 spin_lock_init(&ei_local->page_lock);725 spin_lock_init(&ei_local->page_lock);
725 726
726 if (ec->cid.product == PROD_ANT_ETHERM) {727 if (ec->cid.product == PROD_ANT_ETHERM) {
727 etherm_addr(dev->dev_addr);728 etherm_addr(addr);
728 ei_local->reg_offset = etherm_regoffsets;729 ei_local->reg_offset = etherm_regoffsets;
729 } else {730 } else {
730 etherh_addr(dev->dev_addr, ec);731 etherh_addr(addr, ec);
731 ei_local->reg_offset = etherh_regoffsets;732 ei_local->reg_offset = etherh_regoffsets;
732 }733 }
734 eth_hw_addr_set(dev, addr);
733 735
734 ei_local->name = dev->name;736 ei_local->name = dev->name;
735 ei_local->word16 = 1;737 ei_local->word16 = 1;
drivers/net/ethernet/amd/declance.c+3−1
@@ -1032,6 +1032,7 @@ static int dec_lance_probe(struct device *bdev, const int type) · 1031 unmodified lines
1032 int i, ret;1032 int i, ret;
1033 unsigned long esar_base;1033 unsigned long esar_base;
1034 unsigned char *esar;1034 unsigned char *esar;
1035 u8 addr[ETH_ALEN];
1035 const char *desc;1036 const char *desc;
1036 1037
1037 if (dec_lance_debug && version_printed++ == 0)1038 if (dec_lance_debug && version_printed++ == 0)
@@ -1228,7 +1229,8 @@ static int dec_lance_probe(struct device *bdev, const int type) · 190 unmodified lines
1228 break;1229 break;
1229 }1230 }
1230 for (i = 0; i < 6; i++)1231 for (i = 0; i < 6; i++)
1231 dev->dev_addr[i] = esar[i * 4];1232 addr[i] = esar[i * 4];
1233 eth_hw_addr_set(dev, addr);
1232 1234
1233 printk("%s: %s, addr = %pM, irq = %d\n",1235 printk("%s: %s, addr = %pM, irq = %d\n",
1234 name, desc, dev->dev_addr, dev->irq);1236 name, desc, dev->dev_addr, dev->irq);
drivers/net/ethernet/amd/xgbe/xgbe-drv.c+13−1
@@ -721,7 +721,9 @@ static void xgbe_stop_timers(struct xgbe_prv_data *pdata) · 720 unmodified lines
721 if (!channel->tx_ring)721 if (!channel->tx_ring)
722 break;722 break;
723 723
724 /* Deactivate the Tx timer */
724 del_timer_sync(&channel->tx_timer);725 del_timer_sync(&channel->tx_timer);
726 channel->tx_timer_active = 0;
725 }727 }
726}728}
727 729
@@ -2550,6 +2552,14 @@ read_again: · 1822 unmodified lines
2550 buf2_len = xgbe_rx_buf2_len(rdata, packet, len);2552 buf2_len = xgbe_rx_buf2_len(rdata, packet, len);
2551 len += buf2_len;2553 len += buf2_len;
2552 2554
2555 if (buf2_len > rdata->rx.buf.dma_len) {
2556 /* Hardware inconsistency within the descriptors
2557 * that has resulted in a length underflow.
2558 */
2559 error = 1;
2560 goto skip_data;
2561 }
2562
2553 if (!skb) {2563 if (!skb) {
2554 skb = xgbe_create_skb(pdata, napi, rdata,2564 skb = xgbe_create_skb(pdata, napi, rdata,
2555 buf1_len);2565 buf1_len);
@@ -2579,8 +2589,10 @@ skip_data: · 23 unmodified lines
2579 if (!last || context_next)2589 if (!last || context_next)
2580 goto read_again;2590 goto read_again;
2581 2591
2582 if (!skb)2592 if (!skb || error) {
2593 dev_kfree_skb(skb);
2583 goto next_packet;2594 goto next_packet;
2595 }
2584 2596
2585 /* Be sure we don't exceed the configured MTU */2597 /* Be sure we don't exceed the configured MTU */
2586 max_len = netdev->mtu + ETH_HLEN;2598 max_len = netdev->mtu + ETH_HLEN;
drivers/net/ethernet/amd/xgbe/xgbe-pci.c+3−0
@@ -425,6 +425,9 @@ static void xgbe_pci_remove(struct pci_dev *pdev) · 424 unmodified lines
425 425
426 pci_free_irq_vectors(pdata->pcidev);426 pci_free_irq_vectors(pdata->pcidev);
427 427
428 /* Disable all interrupts in the hardware */
429 XP_IOWRITE(pdata, XP_INT_EN, 0x0);
430
428 xgbe_free_pdata(pdata);431 xgbe_free_pdata(pdata);
429}432}
430 433
drivers/net/ethernet/aquantia/atlantic/aq_filters.c+2−4
@@ -826,7 +826,6 @@ int aq_filters_vlans_update(struct aq_nic_s *aq_nic) · 825 unmodified lines
826 struct aq_hw_s *aq_hw = aq_nic->aq_hw;826 struct aq_hw_s *aq_hw = aq_nic->aq_hw;
827 int hweight = 0;827 int hweight = 0;
828 int err = 0;828 int err = 0;
829 int i;
830 829
831 if (unlikely(!aq_hw_ops->hw_filter_vlan_set))830 if (unlikely(!aq_hw_ops->hw_filter_vlan_set))
832 return -EOPNOTSUPP;831 return -EOPNOTSUPP;
@@ -837,8 +836,7 @@ int aq_filters_vlans_update(struct aq_nic_s *aq_nic) · 4 unmodified lines
837 aq_nic->aq_hw_rx_fltrs.fl2.aq_vlans);836 aq_nic->aq_hw_rx_fltrs.fl2.aq_vlans);
838 837
839 if (aq_nic->ndev->features & NETIF_F_HW_VLAN_CTAG_FILTER) {838 if (aq_nic->ndev->features & NETIF_F_HW_VLAN_CTAG_FILTER) {
840 for (i = 0; i < BITS_TO_LONGS(VLAN_N_VID); i++)839 hweight = bitmap_weight(aq_nic->active_vlans, VLAN_N_VID);
841 hweight += hweight_long(aq_nic->active_vlans[i]);
842 840
843 err = aq_hw_ops->hw_filter_vlan_ctrl(aq_hw, false);841 err = aq_hw_ops->hw_filter_vlan_ctrl(aq_hw, false);
844 if (err)842 if (err)
@@ -871,7 +869,7 @@ int aq_filters_vlan_offload_off(struct aq_nic_s *aq_nic) · 26 unmodified lines
871 struct aq_hw_s *aq_hw = aq_nic->aq_hw;869 struct aq_hw_s *aq_hw = aq_nic->aq_hw;
872 int err = 0;870 int err = 0;
873 871
874 memset(aq_nic->active_vlans, 0, sizeof(aq_nic->active_vlans));872 bitmap_zero(aq_nic->active_vlans, VLAN_N_VID);
875 aq_fvlan_rebuild(aq_nic, aq_nic->active_vlans,873 aq_fvlan_rebuild(aq_nic, aq_nic->active_vlans,
876 aq_nic->aq_hw_rx_fltrs.fl2.aq_vlans);874 aq_nic->aq_hw_rx_fltrs.fl2.aq_vlans);
877 875
drivers/net/ethernet/atheros/atl1c/atl1c_main.c+1−1
@@ -900,7 +900,7 @@ static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter, · 899 unmodified lines
900 atl1c_clean_buffer(pdev, buffer_info);900 atl1c_clean_buffer(pdev, buffer_info);
901 }901 }
902 902
903 netdev_reset_queue(adapter->netdev);903 netdev_tx_reset_queue(netdev_get_tx_queue(adapter->netdev, queue));
904 904
905 /* Zero out Tx-buffers */905 /* Zero out Tx-buffers */
906 memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *906 memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
drivers/net/ethernet/broadcom/bgmac-platform.c+16−7
@@ -172,6 +172,7 @@ static int bgmac_probe(struct platform_device *pdev) · 171 unmodified lines
172{172{
173 struct device_node *np = pdev->dev.of_node;173 struct device_node *np = pdev->dev.of_node;
174 struct bgmac *bgmac;174 struct bgmac *bgmac;
175 struct resource *regs;
175 int ret;176 int ret;
176 177
177 bgmac = bgmac_alloc(&pdev->dev);178 bgmac = bgmac_alloc(&pdev->dev);
@@ -208,15 +209,23 @@ static int bgmac_probe(struct platform_device *pdev) · 30 unmodified lines
208 if (IS_ERR(bgmac->plat.base))209 if (IS_ERR(bgmac->plat.base))
209 return PTR_ERR(bgmac->plat.base);210 return PTR_ERR(bgmac->plat.base);
210 211
211 bgmac->plat.idm_base = devm_platform_ioremap_resource_byname(pdev, "idm_base");212 /* The idm_base resource is optional for some platforms */
212 if (IS_ERR(bgmac->plat.idm_base))213 regs = platform_get_resource_byname(pdev, IORESOURCE_MEM, "idm_base");
213 return PTR_ERR(bgmac->plat.idm_base);214 if (regs) {
214 else215 bgmac->plat.idm_base = devm_ioremap_resource(&pdev->dev, regs);
216 if (IS_ERR(bgmac->plat.idm_base))
217 return PTR_ERR(bgmac->plat.idm_base);
215 bgmac->feature_flags &= ~BGMAC_FEAT_IDM_MASK;218 bgmac->feature_flags &= ~BGMAC_FEAT_IDM_MASK;
219 }
216 220
217 bgmac->plat.nicpm_base = devm_platform_ioremap_resource_byname(pdev, "nicpm_base");221 /* The nicpm_base resource is optional for some platforms */
218 if (IS_ERR(bgmac->plat.nicpm_base))222 regs = platform_get_resource_byname(pdev, IORESOURCE_MEM, "nicpm_base");
219 return PTR_ERR(bgmac->plat.nicpm_base);223 if (regs) {
224 bgmac->plat.nicpm_base = devm_ioremap_resource(&pdev->dev,
225 regs);
226 if (IS_ERR(bgmac->plat.nicpm_base))
227 return PTR_ERR(bgmac->plat.nicpm_base);
228 }
220 229
221 bgmac->read = platform_bgmac_read;230 bgmac->read = platform_bgmac_read;
222 bgmac->write = platform_bgmac_write;231 bgmac->write = platform_bgmac_write;
drivers/net/ethernet/broadcom/sb1250-mac.c+1−3
@@ -2183,9 +2183,7 @@ static int sbmac_init(struct platform_device *pldev, long long base) · 2182 unmodified lines
2183 ea_reg >>= 8;2183 ea_reg >>= 8;
2184 }2184 }
2185 2185
2186 for (i = 0; i < 6; i++) {2186 eth_hw_addr_set(dev, eaddr);
2187 dev->dev_addr[i] = eaddr[i];
2188 }
2189 2187
2190 /*2188 /*
2191 * Initialize context (get pointers to registers and stuff), then2189 * Initialize context (get pointers to registers and stuff), then
drivers/net/ethernet/cadence/macb_main.c+1−1
@@ -4712,7 +4712,7 @@ static int macb_probe(struct platform_device *pdev) · 4711 unmodified lines
4712 4712
4713#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT4713#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
4714 if (GEM_BFEXT(DAW64, gem_readl(bp, DCFG6))) {4714 if (GEM_BFEXT(DAW64, gem_readl(bp, DCFG6))) {
4715 dma_set_mask(&pdev->dev, DMA_BIT_MASK(44));4715 dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(44));
4716 bp->hw_dma_cap |= HW_DMA_CAP_64B;4716 bp->hw_dma_cap |= HW_DMA_CAP_64B;
4717 }4717 }
4718#endif4718#endif
drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c+3−3
@@ -4338,7 +4338,7 @@ static int dpaa2_eth_probe(struct fsl_mc_device *dpni_dev) · 4337 unmodified lines
4338 }4338 }
4339 4339
4340 INIT_WORK(&priv->tx_onestep_tstamp, dpaa2_eth_tx_onestep_tstamp);4340 INIT_WORK(&priv->tx_onestep_tstamp, dpaa2_eth_tx_onestep_tstamp);
4341 4341 mutex_init(&priv->onestep_tstamp_lock);
4342 skb_queue_head_init(&priv->tx_skbs);4342 skb_queue_head_init(&priv->tx_skbs);
4343 4343
4344 priv->rx_copybreak = DPAA2_ETH_DEFAULT_COPYBREAK;4344 priv->rx_copybreak = DPAA2_ETH_DEFAULT_COPYBREAK;
@@ -4523,12 +4523,12 @@ static int dpaa2_eth_remove(struct fsl_mc_device *ls_dev) · 178 unmodified lines
4523#ifdef CONFIG_DEBUG_FS4523#ifdef CONFIG_DEBUG_FS
4524 dpaa2_dbg_remove(priv);4524 dpaa2_dbg_remove(priv);
4525#endif4525#endif
4526
4527 unregister_netdev(net_dev);
4526 rtnl_lock();4528 rtnl_lock();
4527 dpaa2_eth_disconnect_mac(priv);4529 dpaa2_eth_disconnect_mac(priv);
4528 rtnl_unlock();4530 rtnl_unlock();
4529 4531
4530 unregister_netdev(net_dev);
4531
4532 dpaa2_eth_dl_port_del(priv);4532 dpaa2_eth_dl_port_del(priv);
4533 dpaa2_eth_dl_traps_unregister(priv);4533 dpaa2_eth_dl_traps_unregister(priv);
4534 dpaa2_eth_dl_free(priv);4534 dpaa2_eth_dl_free(priv);
drivers/net/ethernet/freescale/dpaa2/dpaa2-switch-flower.c+3−1
@@ -532,6 +532,7 @@ static int dpaa2_switch_flower_parse_mirror_key(struct flow_cls_offload *cls, · 531 unmodified lines
532 struct flow_rule *rule = flow_cls_offload_flow_rule(cls);532 struct flow_rule *rule = flow_cls_offload_flow_rule(cls);
533 struct flow_dissector *dissector = rule->match.dissector;533 struct flow_dissector *dissector = rule->match.dissector;
534 struct netlink_ext_ack *extack = cls->common.extack;534 struct netlink_ext_ack *extack = cls->common.extack;
535 int ret = -EOPNOTSUPP;
535 536
536 if (dissector->used_keys &537 if (dissector->used_keys &
537 ~(BIT(FLOW_DISSECTOR_KEY_BASIC) |538 ~(BIT(FLOW_DISSECTOR_KEY_BASIC) |
@@ -561,9 +562,10 @@ static int dpaa2_switch_flower_parse_mirror_key(struct flow_cls_offload *cls, · 23 unmodified lines
561 }562 }
562 563
563 *vlan = (u16)match.key->vlan_id;564 *vlan = (u16)match.key->vlan_id;
565 ret = 0;
564 }566 }
565 567
566 return 0;568 return ret;
567}569}
568 570
569static int571static int
drivers/net/ethernet/freescale/fec_mpc52xx.c+7−5
@@ -99,13 +99,13 @@ static void mpc52xx_fec_tx_timeout(struct net_device *dev, unsigned int txqueue) · 98 unmodified lines
99 netif_wake_queue(dev);99 netif_wake_queue(dev);
100}100}
101 101
102static void mpc52xx_fec_set_paddr(struct net_device *dev, u8 *mac)102static void mpc52xx_fec_set_paddr(struct net_device *dev, const u8 *mac)
103{103{
104 struct mpc52xx_fec_priv *priv = netdev_priv(dev);104 struct mpc52xx_fec_priv *priv = netdev_priv(dev);
105 struct mpc52xx_fec __iomem *fec = priv->fec;105 struct mpc52xx_fec __iomem *fec = priv->fec;
106 106
107 out_be32(&fec->paddr1, *(u32 *)(&mac[0]));107 out_be32(&fec->paddr1, *(const u32 *)(&mac[0]));
108 out_be32(&fec->paddr2, (*(u16 *)(&mac[4]) << 16) | FEC_PADDR2_TYPE);108 out_be32(&fec->paddr2, (*(const u16 *)(&mac[4]) << 16) | FEC_PADDR2_TYPE);
109}109}
110 110
111static int mpc52xx_fec_set_mac_address(struct net_device *dev, void *addr)111static int mpc52xx_fec_set_mac_address(struct net_device *dev, void *addr)
@@ -893,13 +893,15 @@ static int mpc52xx_fec_probe(struct platform_device *op) · 781 unmodified lines
893 rv = of_get_ethdev_address(np, ndev);893 rv = of_get_ethdev_address(np, ndev);
894 if (rv) {894 if (rv) {
895 struct mpc52xx_fec __iomem *fec = priv->fec;895 struct mpc52xx_fec __iomem *fec = priv->fec;
896 u8 addr[ETH_ALEN] __aligned(4);
896 897
897 /*898 /*
898 * If the MAC addresse is not provided via DT then read899 * If the MAC addresse is not provided via DT then read
899 * it back from the controller regs900 * it back from the controller regs
900 */901 */
901 *(u32 *)(&ndev->dev_addr[0]) = in_be32(&fec->paddr1);902 *(u32 *)(&addr[0]) = in_be32(&fec->paddr1);
902 *(u16 *)(&ndev->dev_addr[4]) = in_be32(&fec->paddr2) >> 16;903 *(u16 *)(&addr[4]) = in_be32(&fec->paddr2) >> 16;
904 eth_hw_addr_set(ndev, addr);
903 }905 }
904 906
905 /*907 /*
drivers/net/ethernet/google/gve/gve.h+1−1
@@ -843,7 +843,7 @@ static inline bool gve_is_gqi(struct gve_priv *priv) · 842 unmodified lines
843/* buffers */843/* buffers */
844int gve_alloc_page(struct gve_priv *priv, struct device *dev,844int gve_alloc_page(struct gve_priv *priv, struct device *dev,
845 struct page **page, dma_addr_t *dma,845 struct page **page, dma_addr_t *dma,
846 enum dma_data_direction);846 enum dma_data_direction, gfp_t gfp_flags);
847void gve_free_page(struct device *dev, struct page *page, dma_addr_t dma,847void gve_free_page(struct device *dev, struct page *page, dma_addr_t dma,
848 enum dma_data_direction);848 enum dma_data_direction);
849/* tx handling */849/* tx handling */
drivers/net/ethernet/google/gve/gve_adminq.c+1−1
@@ -301,7 +301,7 @@ static int gve_adminq_parse_err(struct gve_priv *priv, u32 status) · 300 unmodified lines
301 */301 */
302static int gve_adminq_kick_and_wait(struct gve_priv *priv)302static int gve_adminq_kick_and_wait(struct gve_priv *priv)
303{303{
304 u32 tail, head;304 int tail, head;
305 int i;305 int i;
306 306
307 tail = ioread32be(&priv->reg_bar0->adminq_event_counter);307 tail = ioread32be(&priv->reg_bar0->adminq_event_counter);
drivers/net/ethernet/google/gve/gve_main.c+3−3
@@ -766,9 +766,9 @@ static void gve_free_rings(struct gve_priv *priv) · 765 unmodified lines
766 766
767int gve_alloc_page(struct gve_priv *priv, struct device *dev,767int gve_alloc_page(struct gve_priv *priv, struct device *dev,
768 struct page **page, dma_addr_t *dma,768 struct page **page, dma_addr_t *dma,
769 enum dma_data_direction dir)769 enum dma_data_direction dir, gfp_t gfp_flags)
770{770{
771 *page = alloc_page(GFP_KERNEL);771 *page = alloc_page(gfp_flags);
772 if (!*page) {772 if (!*page) {
773 priv->page_alloc_fail++;773 priv->page_alloc_fail++;
774 return -ENOMEM;774 return -ENOMEM;
@@ -811,7 +811,7 @@ static int gve_alloc_queue_page_list(struct gve_priv *priv, u32 id, · 36 unmodified lines
811 for (i = 0; i < pages; i++) {811 for (i = 0; i < pages; i++) {
812 err = gve_alloc_page(priv, &priv->pdev->dev, &qpl->pages[i],812 err = gve_alloc_page(priv, &priv->pdev->dev, &qpl->pages[i],
813 &qpl->page_buses[i],813 &qpl->page_buses[i],
814 gve_qpl_dma_dir(priv, id));814 gve_qpl_dma_dir(priv, id), GFP_KERNEL);
815 /* caller handles clean up */815 /* caller handles clean up */
816 if (err)816 if (err)
817 return -ENOMEM;817 return -ENOMEM;
drivers/net/ethernet/google/gve/gve_rx.c+3−1
@@ -86,7 +86,8 @@ static int gve_rx_alloc_buffer(struct gve_priv *priv, struct device *dev, · 85 unmodified lines
86 dma_addr_t dma;86 dma_addr_t dma;
87 int err;87 int err;
88 88
89 err = gve_alloc_page(priv, dev, &page, &dma, DMA_FROM_DEVICE);89 err = gve_alloc_page(priv, dev, &page, &dma, DMA_FROM_DEVICE,
90 GFP_ATOMIC);
90 if (err)91 if (err)
91 return err;92 return err;
92 93
@@ -608,6 +609,7 @@ static bool gve_rx(struct gve_rx_ring *rx, netdev_features_t feat, · 515 unmodified lines
608 609
609 *packet_size_bytes = skb->len + (skb->protocol ? ETH_HLEN : 0);610 *packet_size_bytes = skb->len + (skb->protocol ? ETH_HLEN : 0);
610 *work_done = work_cnt;611 *work_done = work_cnt;
612 skb_record_rx_queue(skb, rx->q_num);
611 if (skb_is_nonlinear(skb))613 if (skb_is_nonlinear(skb))
612 napi_gro_frags(napi);614 napi_gro_frags(napi);
613 else615 else
drivers/net/ethernet/google/gve/gve_rx_dqo.c+1−1
@@ -157,7 +157,7 @@ static int gve_alloc_page_dqo(struct gve_priv *priv, · 156 unmodified lines
157 int err;157 int err;
158 158
159 err = gve_alloc_page(priv, &priv->pdev->dev, &buf_state->page_info.page,159 err = gve_alloc_page(priv, &priv->pdev->dev, &buf_state->page_info.page,
160 &buf_state->addr, DMA_FROM_DEVICE);160 &buf_state->addr, DMA_FROM_DEVICE, GFP_KERNEL);
161 if (err)161 if (err)
162 return err;162 return err;
163 163
drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c+1−2
@@ -2043,8 +2043,7 @@ static irqreturn_t hclgevf_misc_irq_handle(int irq, void *data) · 2042 unmodified lines
2043 break;2043 break;
2044 }2044 }
2045 2045
2046 if (event_cause != HCLGEVF_VECTOR0_EVENT_OTHER)2046 hclgevf_enable_vector(&hdev->misc_vector, true);
2047 hclgevf_enable_vector(&hdev->misc_vector, true);
2048 2047
2049 return IRQ_HANDLED;2048 return IRQ_HANDLED;
2050}2049}
drivers/net/ethernet/i825xx/ether1.c+3−1
@@ -986,6 +986,7 @@ static int · 985 unmodified lines
986ether1_probe(struct expansion_card *ec, const struct ecard_id *id)986ether1_probe(struct expansion_card *ec, const struct ecard_id *id)
987{987{
988 struct net_device *dev;988 struct net_device *dev;
989 u8 addr[ETH_ALEN];
989 int i, ret = 0;990 int i, ret = 0;
990 991
991 ether1_banner();992 ether1_banner();
@@ -1015,7 +1016,8 @@ ether1_probe(struct expansion_card *ec, const struct ecard_id *id) · 23 unmodified lines
1015 }1016 }
1016 1017
1017 for (i = 0; i < 6; i++)1018 for (i = 0; i < 6; i++)
1018 dev->dev_addr[i] = readb(IDPROM_ADDRESS + (i << 2));1019 addr[i] = readb(IDPROM_ADDRESS + (i << 2));
1020 eth_hw_addr_set(dev, addr);
1019 1021
1020 if (ether1_init_2(dev)) {1022 if (ether1_init_2(dev)) {
1021 ret = -ENODEV;1023 ret = -ENODEV;
drivers/net/ethernet/ibm/ibmvnic.c+109−71
@@ -110,6 +110,7 @@ static void ibmvnic_tx_scrq_clean_buffer(struct ibmvnic_adapter *adapter, · 109 unmodified lines
110 struct ibmvnic_sub_crq_queue *tx_scrq);110 struct ibmvnic_sub_crq_queue *tx_scrq);
111static void free_long_term_buff(struct ibmvnic_adapter *adapter,111static void free_long_term_buff(struct ibmvnic_adapter *adapter,
112 struct ibmvnic_long_term_buff *ltb);112 struct ibmvnic_long_term_buff *ltb);
113static void ibmvnic_disable_irqs(struct ibmvnic_adapter *adapter);
113 114
114struct ibmvnic_stat {115struct ibmvnic_stat {
115 char name[ETH_GSTRING_LEN];116 char name[ETH_GSTRING_LEN];
@@ -1424,7 +1425,7 @@ static int __ibmvnic_open(struct net_device *netdev) · 1308 unmodified lines
1424 rc = set_link_state(adapter, IBMVNIC_LOGICAL_LNK_UP);1425 rc = set_link_state(adapter, IBMVNIC_LOGICAL_LNK_UP);
1425 if (rc) {1426 if (rc) {
1426 ibmvnic_napi_disable(adapter);1427 ibmvnic_napi_disable(adapter);
1427 release_resources(adapter);1428 ibmvnic_disable_irqs(adapter);
1428 return rc;1429 return rc;
1429 }1430 }
1430 1431
@@ -1474,9 +1475,6 @@ static int ibmvnic_open(struct net_device *netdev) · 43 unmodified lines
1474 rc = init_resources(adapter);1475 rc = init_resources(adapter);
1475 if (rc) {1476 if (rc) {
1476 netdev_err(netdev, "failed to initialize resources\n");1477 netdev_err(netdev, "failed to initialize resources\n");
1477 release_resources(adapter);
1478 release_rx_pools(adapter);
1479 release_tx_pools(adapter);
1480 goto out;1478 goto out;
1481 }1479 }
1482 }1480 }
@@ -1493,6 +1491,13 @@ out: · 10 unmodified lines
1493 adapter->state = VNIC_OPEN;1491 adapter->state = VNIC_OPEN;
1494 rc = 0;1492 rc = 0;
1495 }1493 }
1494
1495 if (rc) {
1496 release_resources(adapter);
1497 release_rx_pools(adapter);
1498 release_tx_pools(adapter);
1499 }
1500
1496 return rc;1501 return rc;
1497}1502}
1498 1503
@@ -2602,6 +2607,7 @@ static void __ibmvnic_reset(struct work_struct *work) · 1103 unmodified lines
2602 struct ibmvnic_rwi *rwi;2607 struct ibmvnic_rwi *rwi;
2603 unsigned long flags;2608 unsigned long flags;
2604 u32 reset_state;2609 u32 reset_state;
2610 int num_fails = 0;
2605 int rc = 0;2611 int rc = 0;
2606 2612
2607 adapter = container_of(work, struct ibmvnic_adapter, ibmvnic_reset);2613 adapter = container_of(work, struct ibmvnic_adapter, ibmvnic_reset);
@@ -2655,11 +2661,23 @@ static void __ibmvnic_reset(struct work_struct *work) · 47 unmodified lines
2655 rc = do_hard_reset(adapter, rwi, reset_state);2661 rc = do_hard_reset(adapter, rwi, reset_state);
2656 rtnl_unlock();2662 rtnl_unlock();
2657 }2663 }
2658 if (rc) {2664 if (rc)
2659 /* give backing device time to settle down */2665 num_fails++;
2666 else
2667 num_fails = 0;
2668
2669 /* If auto-priority-failover is enabled we can get
2670 * back to back failovers during resets, resulting
2671 * in at least two failed resets (from high-priority
2672 * backing device to low-priority one and then back)
2673 * If resets continue to fail beyond that, give the
2674 * adapter some time to settle down before retrying.
2675 */
2676 if (num_fails >= 3) {
2660 netdev_dbg(adapter->netdev,2677 netdev_dbg(adapter->netdev,
2661 "[S:%s] Hard reset failed, waiting 60 secs\n",2678 "[S:%s] Hard reset failed %d times, waiting 60 secs\n",
2662 adapter_state_to_string(adapter->state));2679 adapter_state_to_string(adapter->state),
2680 num_fails);
2663 set_current_state(TASK_UNINTERRUPTIBLE);2681 set_current_state(TASK_UNINTERRUPTIBLE);
2664 schedule_timeout(60 * HZ);2682 schedule_timeout(60 * HZ);
2665 }2683 }
@@ -3844,11 +3862,25 @@ static void send_request_cap(struct ibmvnic_adapter *adapter, int retry) · 1178 unmodified lines
3844 struct device *dev = &adapter->vdev->dev;3862 struct device *dev = &adapter->vdev->dev;
3845 union ibmvnic_crq crq;3863 union ibmvnic_crq crq;
3846 int max_entries;3864 int max_entries;
3865 int cap_reqs;
3866
3867 /* We send out 6 or 7 REQUEST_CAPABILITY CRQs below (depending on
3868 * the PROMISC flag). Initialize this count upfront. When the tasklet
3869 * receives a response to all of these, it will send the next protocol
3870 * message (QUERY_IP_OFFLOAD).
3871 */
3872 if (!(adapter->netdev->flags & IFF_PROMISC) ||
3873 adapter->promisc_supported)
3874 cap_reqs = 7;
3875 else
3876 cap_reqs = 6;
3847 3877
3848 if (!retry) {3878 if (!retry) {
3849 /* Sub-CRQ entries are 32 byte long */3879 /* Sub-CRQ entries are 32 byte long */
3850 int entries_page = 4 * PAGE_SIZE / (sizeof(u64) * 4);3880 int entries_page = 4 * PAGE_SIZE / (sizeof(u64) * 4);
3851 3881
3882 atomic_set(&adapter->running_cap_crqs, cap_reqs);
3883
3852 if (adapter->min_tx_entries_per_subcrq > entries_page ||3884 if (adapter->min_tx_entries_per_subcrq > entries_page ||
3853 adapter->min_rx_add_entries_per_subcrq > entries_page) {3885 adapter->min_rx_add_entries_per_subcrq > entries_page) {
3854 dev_err(dev, "Fatal, invalid entries per sub-crq\n");3886 dev_err(dev, "Fatal, invalid entries per sub-crq\n");
@@ -3909,44 +3941,45 @@ static void send_request_cap(struct ibmvnic_adapter *adapter, int retry) · 54 unmodified lines
3909 adapter->opt_rx_comp_queues;3941 adapter->opt_rx_comp_queues;
3910 3942
3911 adapter->req_rx_add_queues = adapter->max_rx_add_queues;3943 adapter->req_rx_add_queues = adapter->max_rx_add_queues;
3944 } else {
3945 atomic_add(cap_reqs, &adapter->running_cap_crqs);
3912 }3946 }
3913
3914 memset(&crq, 0, sizeof(crq));3947 memset(&crq, 0, sizeof(crq));
3915 crq.request_capability.first = IBMVNIC_CRQ_CMD;3948 crq.request_capability.first = IBMVNIC_CRQ_CMD;
3916 crq.request_capability.cmd = REQUEST_CAPABILITY;3949 crq.request_capability.cmd = REQUEST_CAPABILITY;
3917 3950
3918 crq.request_capability.capability = cpu_to_be16(REQ_TX_QUEUES);3951 crq.request_capability.capability = cpu_to_be16(REQ_TX_QUEUES);
3919 crq.request_capability.number = cpu_to_be64(adapter->req_tx_queues);3952 crq.request_capability.number = cpu_to_be64(adapter->req_tx_queues);
3920 atomic_inc(&adapter->running_cap_crqs);3953 cap_reqs--;
3921 ibmvnic_send_crq(adapter, &crq);3954 ibmvnic_send_crq(adapter, &crq);
3922 3955
3923 crq.request_capability.capability = cpu_to_be16(REQ_RX_QUEUES);3956 crq.request_capability.capability = cpu_to_be16(REQ_RX_QUEUES);
3924 crq.request_capability.number = cpu_to_be64(adapter->req_rx_queues);3957 crq.request_capability.number = cpu_to_be64(adapter->req_rx_queues);
3925 atomic_inc(&adapter->running_cap_crqs);3958 cap_reqs--;
3926 ibmvnic_send_crq(adapter, &crq);3959 ibmvnic_send_crq(adapter, &crq);
3927 3960
3928 crq.request_capability.capability = cpu_to_be16(REQ_RX_ADD_QUEUES);3961 crq.request_capability.capability = cpu_to_be16(REQ_RX_ADD_QUEUES);
3929 crq.request_capability.number = cpu_to_be64(adapter->req_rx_add_queues);3962 crq.request_capability.number = cpu_to_be64(adapter->req_rx_add_queues);
3930 atomic_inc(&adapter->running_cap_crqs);3963 cap_reqs--;
3931 ibmvnic_send_crq(adapter, &crq);3964 ibmvnic_send_crq(adapter, &crq);
3932 3965
3933 crq.request_capability.capability =3966 crq.request_capability.capability =
3934 cpu_to_be16(REQ_TX_ENTRIES_PER_SUBCRQ);3967 cpu_to_be16(REQ_TX_ENTRIES_PER_SUBCRQ);
3935 crq.request_capability.number =3968 crq.request_capability.number =
3936 cpu_to_be64(adapter->req_tx_entries_per_subcrq);3969 cpu_to_be64(adapter->req_tx_entries_per_subcrq);
3937 atomic_inc(&adapter->running_cap_crqs);3970 cap_reqs--;
3938 ibmvnic_send_crq(adapter, &crq);3971 ibmvnic_send_crq(adapter, &crq);
3939 3972
3940 crq.request_capability.capability =3973 crq.request_capability.capability =
3941 cpu_to_be16(REQ_RX_ADD_ENTRIES_PER_SUBCRQ);3974 cpu_to_be16(REQ_RX_ADD_ENTRIES_PER_SUBCRQ);
3942 crq.request_capability.number =3975 crq.request_capability.number =
3943 cpu_to_be64(adapter->req_rx_add_entries_per_subcrq);3976 cpu_to_be64(adapter->req_rx_add_entries_per_subcrq);
3944 atomic_inc(&adapter->running_cap_crqs);3977 cap_reqs--;
3945 ibmvnic_send_crq(adapter, &crq);3978 ibmvnic_send_crq(adapter, &crq);
3946 3979
3947 crq.request_capability.capability = cpu_to_be16(REQ_MTU);3980 crq.request_capability.capability = cpu_to_be16(REQ_MTU);
3948 crq.request_capability.number = cpu_to_be64(adapter->req_mtu);3981 crq.request_capability.number = cpu_to_be64(adapter->req_mtu);
3949 atomic_inc(&adapter->running_cap_crqs);3982 cap_reqs--;
3950 ibmvnic_send_crq(adapter, &crq);3983 ibmvnic_send_crq(adapter, &crq);
3951 3984
3952 if (adapter->netdev->flags & IFF_PROMISC) {3985 if (adapter->netdev->flags & IFF_PROMISC) {
@@ -3954,16 +3987,21 @@ static void send_request_cap(struct ibmvnic_adapter *adapter, int retry) · 1 unmodified line
3954 crq.request_capability.capability =3987 crq.request_capability.capability =
3955 cpu_to_be16(PROMISC_REQUESTED);3988 cpu_to_be16(PROMISC_REQUESTED);
3956 crq.request_capability.number = cpu_to_be64(1);3989 crq.request_capability.number = cpu_to_be64(1);
3957 atomic_inc(&adapter->running_cap_crqs);3990 cap_reqs--;
3958 ibmvnic_send_crq(adapter, &crq);3991 ibmvnic_send_crq(adapter, &crq);
3959 }3992 }
3960 } else {3993 } else {
3961 crq.request_capability.capability =3994 crq.request_capability.capability =
3962 cpu_to_be16(PROMISC_REQUESTED);3995 cpu_to_be16(PROMISC_REQUESTED);
3963 crq.request_capability.number = cpu_to_be64(0);3996 crq.request_capability.number = cpu_to_be64(0);
3964 atomic_inc(&adapter->running_cap_crqs);3997 cap_reqs--;
3965 ibmvnic_send_crq(adapter, &crq);3998 ibmvnic_send_crq(adapter, &crq);
3966 }3999 }
4000
4001 /* Keep at end to catch any discrepancy between expected and actual
4002 * CRQs sent.
4003 */
4004 WARN_ON(cap_reqs != 0);
3967}4005}
3968 4006
3969static int pending_scrq(struct ibmvnic_adapter *adapter,4007static int pending_scrq(struct ibmvnic_adapter *adapter,
@@ -4357,118 +4395,132 @@ static void send_query_map(struct ibmvnic_adapter *adapter) · 387 unmodified lines
4357static void send_query_cap(struct ibmvnic_adapter *adapter)4395static void send_query_cap(struct ibmvnic_adapter *adapter)
4358{4396{
4359 union ibmvnic_crq crq;4397 union ibmvnic_crq crq;
4398 int cap_reqs;
4399
4400 /* We send out 25 QUERY_CAPABILITY CRQs below. Initialize this count
4401 * upfront. When the tasklet receives a response to all of these, it
4402 * can send out the next protocol messaage (REQUEST_CAPABILITY).
4403 */
4404 cap_reqs = 25;
4405
4406 atomic_set(&adapter->running_cap_crqs, cap_reqs);
4360 4407
4361 atomic_set(&adapter->running_cap_crqs, 0);
4362 memset(&crq, 0, sizeof(crq));4408 memset(&crq, 0, sizeof(crq));
4363 crq.query_capability.first = IBMVNIC_CRQ_CMD;4409 crq.query_capability.first = IBMVNIC_CRQ_CMD;
4364 crq.query_capability.cmd = QUERY_CAPABILITY;4410 crq.query_capability.cmd = QUERY_CAPABILITY;
4365 4411
4366 crq.query_capability.capability = cpu_to_be16(MIN_TX_QUEUES);4412 crq.query_capability.capability = cpu_to_be16(MIN_TX_QUEUES);
4367 atomic_inc(&adapter->running_cap_crqs);
4368 ibmvnic_send_crq(adapter, &crq);4413 ibmvnic_send_crq(adapter, &crq);
4414 cap_reqs--;
4369 4415
4370 crq.query_capability.capability = cpu_to_be16(MIN_RX_QUEUES);4416 crq.query_capability.capability = cpu_to_be16(MIN_RX_QUEUES);
4371 atomic_inc(&adapter->running_cap_crqs);
4372 ibmvnic_send_crq(adapter, &crq);4417 ibmvnic_send_crq(adapter, &crq);
4418 cap_reqs--;
4373 4419
4374 crq.query_capability.capability = cpu_to_be16(MIN_RX_ADD_QUEUES);4420 crq.query_capability.capability = cpu_to_be16(MIN_RX_ADD_QUEUES);
4375 atomic_inc(&adapter->running_cap_crqs);
4376 ibmvnic_send_crq(adapter, &crq);4421 ibmvnic_send_crq(adapter, &crq);
4422 cap_reqs--;
4377 4423
4378 crq.query_capability.capability = cpu_to_be16(MAX_TX_QUEUES);4424 crq.query_capability.capability = cpu_to_be16(MAX_TX_QUEUES);
4379 atomic_inc(&adapter->running_cap_crqs);
4380 ibmvnic_send_crq(adapter, &crq);4425 ibmvnic_send_crq(adapter, &crq);
4426 cap_reqs--;
4381 4427
4382 crq.query_capability.capability = cpu_to_be16(MAX_RX_QUEUES);4428 crq.query_capability.capability = cpu_to_be16(MAX_RX_QUEUES);
4383 atomic_inc(&adapter->running_cap_crqs);
4384 ibmvnic_send_crq(adapter, &crq);4429 ibmvnic_send_crq(adapter, &crq);
4430 cap_reqs--;
4385 4431
4386 crq.query_capability.capability = cpu_to_be16(MAX_RX_ADD_QUEUES);4432 crq.query_capability.capability = cpu_to_be16(MAX_RX_ADD_QUEUES);
4387 atomic_inc(&adapter->running_cap_crqs);
4388 ibmvnic_send_crq(adapter, &crq);4433 ibmvnic_send_crq(adapter, &crq);
4434 cap_reqs--;
4389 4435
4390 crq.query_capability.capability =4436 crq.query_capability.capability =
4391 cpu_to_be16(MIN_TX_ENTRIES_PER_SUBCRQ);4437 cpu_to_be16(MIN_TX_ENTRIES_PER_SUBCRQ);
4392 atomic_inc(&adapter->running_cap_crqs);
4393 ibmvnic_send_crq(adapter, &crq);4438 ibmvnic_send_crq(adapter, &crq);
4439 cap_reqs--;
4394 4440
4395 crq.query_capability.capability =4441 crq.query_capability.capability =
4396 cpu_to_be16(MIN_RX_ADD_ENTRIES_PER_SUBCRQ);4442 cpu_to_be16(MIN_RX_ADD_ENTRIES_PER_SUBCRQ);
4397 atomic_inc(&adapter->running_cap_crqs);
4398 ibmvnic_send_crq(adapter, &crq);4443 ibmvnic_send_crq(adapter, &crq);
4444 cap_reqs--;
4399 4445
4400 crq.query_capability.capability =4446 crq.query_capability.capability =
4401 cpu_to_be16(MAX_TX_ENTRIES_PER_SUBCRQ);4447 cpu_to_be16(MAX_TX_ENTRIES_PER_SUBCRQ);
4402 atomic_inc(&adapter->running_cap_crqs);
4403 ibmvnic_send_crq(adapter, &crq);4448 ibmvnic_send_crq(adapter, &crq);
4449 cap_reqs--;
4404 4450
4405 crq.query_capability.capability =4451 crq.query_capability.capability =
4406 cpu_to_be16(MAX_RX_ADD_ENTRIES_PER_SUBCRQ);4452 cpu_to_be16(MAX_RX_ADD_ENTRIES_PER_SUBCRQ);
4407 atomic_inc(&adapter->running_cap_crqs);
4408 ibmvnic_send_crq(adapter, &crq);4453 ibmvnic_send_crq(adapter, &crq);
4454 cap_reqs--;
4409 4455
4410 crq.query_capability.capability = cpu_to_be16(TCP_IP_OFFLOAD);4456 crq.query_capability.capability = cpu_to_be16(TCP_IP_OFFLOAD);
4411 atomic_inc(&adapter->running_cap_crqs);
4412 ibmvnic_send_crq(adapter, &crq);4457 ibmvnic_send_crq(adapter, &crq);
4458 cap_reqs--;
4413 4459
4414 crq.query_capability.capability = cpu_to_be16(PROMISC_SUPPORTED);4460 crq.query_capability.capability = cpu_to_be16(PROMISC_SUPPORTED);
4415 atomic_inc(&adapter->running_cap_crqs);
4416 ibmvnic_send_crq(adapter, &crq);4461 ibmvnic_send_crq(adapter, &crq);
4462 cap_reqs--;
4417 4463
4418 crq.query_capability.capability = cpu_to_be16(MIN_MTU);4464 crq.query_capability.capability = cpu_to_be16(MIN_MTU);
4419 atomic_inc(&adapter->running_cap_crqs);
4420 ibmvnic_send_crq(adapter, &crq);4465 ibmvnic_send_crq(adapter, &crq);
4466 cap_reqs--;
4421 4467
4422 crq.query_capability.capability = cpu_to_be16(MAX_MTU);4468 crq.query_capability.capability = cpu_to_be16(MAX_MTU);
4423 atomic_inc(&adapter->running_cap_crqs);
4424 ibmvnic_send_crq(adapter, &crq);4469 ibmvnic_send_crq(adapter, &crq);
4470 cap_reqs--;
4425 4471
4426 crq.query_capability.capability = cpu_to_be16(MAX_MULTICAST_FILTERS);4472 crq.query_capability.capability = cpu_to_be16(MAX_MULTICAST_FILTERS);
4427 atomic_inc(&adapter->running_cap_crqs);
4428 ibmvnic_send_crq(adapter, &crq);4473 ibmvnic_send_crq(adapter, &crq);
4474 cap_reqs--;
4429 4475
4430 crq.query_capability.capability = cpu_to_be16(VLAN_HEADER_INSERTION);4476 crq.query_capability.capability = cpu_to_be16(VLAN_HEADER_INSERTION);
4431 atomic_inc(&adapter->running_cap_crqs);
4432 ibmvnic_send_crq(adapter, &crq);4477 ibmvnic_send_crq(adapter, &crq);
4478 cap_reqs--;
4433 4479
4434 crq.query_capability.capability = cpu_to_be16(RX_VLAN_HEADER_INSERTION);4480 crq.query_capability.capability = cpu_to_be16(RX_VLAN_HEADER_INSERTION);
4435 atomic_inc(&adapter->running_cap_crqs);
4436 ibmvnic_send_crq(adapter, &crq);4481 ibmvnic_send_crq(adapter, &crq);
4482 cap_reqs--;
4437 4483
4438 crq.query_capability.capability = cpu_to_be16(MAX_TX_SG_ENTRIES);4484 crq.query_capability.capability = cpu_to_be16(MAX_TX_SG_ENTRIES);
4439 atomic_inc(&adapter->running_cap_crqs);
4440 ibmvnic_send_crq(adapter, &crq);4485 ibmvnic_send_crq(adapter, &crq);
4486 cap_reqs--;
4441 4487
4442 crq.query_capability.capability = cpu_to_be16(RX_SG_SUPPORTED);4488 crq.query_capability.capability = cpu_to_be16(RX_SG_SUPPORTED);
4443 atomic_inc(&adapter->running_cap_crqs);
4444 ibmvnic_send_crq(adapter, &crq);4489 ibmvnic_send_crq(adapter, &crq);
4490 cap_reqs--;
4445 4491
4446 crq.query_capability.capability = cpu_to_be16(OPT_TX_COMP_SUB_QUEUES);4492 crq.query_capability.capability = cpu_to_be16(OPT_TX_COMP_SUB_QUEUES);
4447 atomic_inc(&adapter->running_cap_crqs);
4448 ibmvnic_send_crq(adapter, &crq);4493 ibmvnic_send_crq(adapter, &crq);
4494 cap_reqs--;
4449 4495
4450 crq.query_capability.capability = cpu_to_be16(OPT_RX_COMP_QUEUES);4496 crq.query_capability.capability = cpu_to_be16(OPT_RX_COMP_QUEUES);
4451 atomic_inc(&adapter->running_cap_crqs);
4452 ibmvnic_send_crq(adapter, &crq);4497 ibmvnic_send_crq(adapter, &crq);
4498 cap_reqs--;
4453 4499
4454 crq.query_capability.capability =4500 crq.query_capability.capability =
4455 cpu_to_be16(OPT_RX_BUFADD_Q_PER_RX_COMP_Q);4501 cpu_to_be16(OPT_RX_BUFADD_Q_PER_RX_COMP_Q);
4456 atomic_inc(&adapter->running_cap_crqs);
4457 ibmvnic_send_crq(adapter, &crq);4502 ibmvnic_send_crq(adapter, &crq);
4503 cap_reqs--;
4458 4504
4459 crq.query_capability.capability =4505 crq.query_capability.capability =
4460 cpu_to_be16(OPT_TX_ENTRIES_PER_SUBCRQ);4506 cpu_to_be16(OPT_TX_ENTRIES_PER_SUBCRQ);
4461 atomic_inc(&adapter->running_cap_crqs);
4462 ibmvnic_send_crq(adapter, &crq);4507 ibmvnic_send_crq(adapter, &crq);
4508 cap_reqs--;
4463 4509
4464 crq.query_capability.capability =4510 crq.query_capability.capability =
4465 cpu_to_be16(OPT_RXBA_ENTRIES_PER_SUBCRQ);4511 cpu_to_be16(OPT_RXBA_ENTRIES_PER_SUBCRQ);
4466 atomic_inc(&adapter->running_cap_crqs);
4467 ibmvnic_send_crq(adapter, &crq);4512 ibmvnic_send_crq(adapter, &crq);
4513 cap_reqs--;
4468 4514
4469 crq.query_capability.capability = cpu_to_be16(TX_RX_DESC_REQ);4515 crq.query_capability.capability = cpu_to_be16(TX_RX_DESC_REQ);
4470 atomic_inc(&adapter->running_cap_crqs);4516
4471 ibmvnic_send_crq(adapter, &crq);4517 ibmvnic_send_crq(adapter, &crq);
4518 cap_reqs--;
4519
4520 /* Keep at end to catch any discrepancy between expected and actual
4521 * CRQs sent.
4522 */
4523 WARN_ON(cap_reqs != 0);
4472}4524}
4473 4525
4474static void send_query_ip_offload(struct ibmvnic_adapter *adapter)4526static void send_query_ip_offload(struct ibmvnic_adapter *adapter)
@@ -4772,6 +4824,8 @@ static void handle_request_cap_rsp(union ibmvnic_crq *crq, · 297 unmodified lines
4772 char *name;4824 char *name;
4773 4825
4774 atomic_dec(&adapter->running_cap_crqs);4826 atomic_dec(&adapter->running_cap_crqs);
4827 netdev_dbg(adapter->netdev, "Outstanding request-caps: %d\n",
4828 atomic_read(&adapter->running_cap_crqs));
4775 switch (be16_to_cpu(crq->request_capability_rsp.capability)) {4829 switch (be16_to_cpu(crq->request_capability_rsp.capability)) {
4776 case REQ_TX_QUEUES:4830 case REQ_TX_QUEUES:
4777 req_value = &adapter->req_tx_queues;4831 req_value = &adapter->req_tx_queues;
@@ -4835,10 +4889,8 @@ static void handle_request_cap_rsp(union ibmvnic_crq *crq, · 57 unmodified lines
4835 }4889 }
4836 4890
4837 /* Done receiving requested capabilities, query IP offload support */4891 /* Done receiving requested capabilities, query IP offload support */
4838 if (atomic_read(&adapter->running_cap_crqs) == 0) {4892 if (atomic_read(&adapter->running_cap_crqs) == 0)
4839 adapter->wait_capability = false;
4840 send_query_ip_offload(adapter);4893 send_query_ip_offload(adapter);
4841 }
4842}4894}
4843 4895
4844static int handle_login_rsp(union ibmvnic_crq *login_rsp_crq,4896static int handle_login_rsp(union ibmvnic_crq *login_rsp_crq,
@@ -5136,10 +5188,8 @@ static void handle_query_cap_rsp(union ibmvnic_crq *crq, · 291 unmodified lines
5136 }5188 }
5137 5189
5138out:5190out:
5139 if (atomic_read(&adapter->running_cap_crqs) == 0) {5191 if (atomic_read(&adapter->running_cap_crqs) == 0)
5140 adapter->wait_capability = false;
5141 send_request_cap(adapter, 0);5192 send_request_cap(adapter, 0);
5142 }
5143}5193}
5144 5194
5145static int send_query_phys_parms(struct ibmvnic_adapter *adapter)5195static int send_query_phys_parms(struct ibmvnic_adapter *adapter)
@@ -5435,33 +5485,21 @@ static void ibmvnic_tasklet(struct tasklet_struct *t) · 289 unmodified lines
5435 struct ibmvnic_crq_queue *queue = &adapter->crq;5485 struct ibmvnic_crq_queue *queue = &adapter->crq;
5436 union ibmvnic_crq *crq;5486 union ibmvnic_crq *crq;
5437 unsigned long flags;5487 unsigned long flags;
5438 bool done = false;
5439 5488
5440 spin_lock_irqsave(&queue->lock, flags);5489 spin_lock_irqsave(&queue->lock, flags);
5441 while (!done) {
5442 /* Pull all the valid messages off the CRQ */
5443 while ((crq = ibmvnic_next_crq(adapter)) != NULL) {
5444 /* This barrier makes sure ibmvnic_next_crq()'s
5445 * crq->generic.first & IBMVNIC_CRQ_CMD_RSP is loaded
5446 * before ibmvnic_handle_crq()'s
5447 * switch(gen_crq->first) and switch(gen_crq->cmd).
5448 */
5449 dma_rmb();
5450 ibmvnic_handle_crq(crq, adapter);
5451 crq->generic.first = 0;
5452 }
5453 5490
5454 /* remain in tasklet until all5491 /* Pull all the valid messages off the CRQ */
5455 * capabilities responses are received5492 while ((crq = ibmvnic_next_crq(adapter)) != NULL) {
5493 /* This barrier makes sure ibmvnic_next_crq()'s
5494 * crq->generic.first & IBMVNIC_CRQ_CMD_RSP is loaded
5495 * before ibmvnic_handle_crq()'s
5496 * switch(gen_crq->first) and switch(gen_crq->cmd).
5456 */5497 */
5457 if (!adapter->wait_capability)5498 dma_rmb();
5458 done = true;5499 ibmvnic_handle_crq(crq, adapter);
5500 crq->generic.first = 0;
5459 }5501 }
5460 /* if capabilities CRQ's were sent in this tasklet, the following5502
5461 * tasklet must wait until all responses are received
5462 */
5463 if (atomic_read(&adapter->running_cap_crqs) != 0)
5464 adapter->wait_capability = true;
5465 spin_unlock_irqrestore(&queue->lock, flags);5503 spin_unlock_irqrestore(&queue->lock, flags);
5466}5504}
5467 5505
drivers/net/ethernet/ibm/ibmvnic.h+0−1
@@ -919,7 +919,6 @@ struct ibmvnic_adapter { · 918 unmodified lines
919 int login_rsp_buf_sz;919 int login_rsp_buf_sz;
920 920
921 atomic_t running_cap_crqs;921 atomic_t running_cap_crqs;
922 bool wait_capability;
923 922
924 struct ibmvnic_sub_crq_queue **tx_scrq ____cacheline_aligned;923 struct ibmvnic_sub_crq_queue **tx_scrq ____cacheline_aligned;
925 struct ibmvnic_sub_crq_queue **rx_scrq ____cacheline_aligned;924 struct ibmvnic_sub_crq_queue **rx_scrq ____cacheline_aligned;
drivers/net/ethernet/intel/e1000e/e1000.h+3−1
@@ -115,7 +115,8 @@ enum e1000_boards { · 114 unmodified lines
115 board_pch_lpt,115 board_pch_lpt,
116 board_pch_spt,116 board_pch_spt,
117 board_pch_cnp,117 board_pch_cnp,
118 board_pch_tgp118 board_pch_tgp,
119 board_pch_adp
119};120};
120 121
121struct e1000_ps_page {122struct e1000_ps_page {
@@ -502,6 +503,7 @@ extern const struct e1000_info e1000_pch_lpt_info; · 380 unmodified lines
502extern const struct e1000_info e1000_pch_spt_info;503extern const struct e1000_info e1000_pch_spt_info;
503extern const struct e1000_info e1000_pch_cnp_info;504extern const struct e1000_info e1000_pch_cnp_info;
504extern const struct e1000_info e1000_pch_tgp_info;505extern const struct e1000_info e1000_pch_tgp_info;
506extern const struct e1000_info e1000_pch_adp_info;
505extern const struct e1000_info e1000_es2_info;507extern const struct e1000_info e1000_es2_info;
506 508
507void e1000e_ptp_init(struct e1000_adapter *adapter);509void e1000e_ptp_init(struct e1000_adapter *adapter);
drivers/net/ethernet/intel/e1000e/ich8lan.c+20−0
@@ -6021,3 +6021,23 @@ const struct e1000_info e1000_pch_tgp_info = { · 6020 unmodified lines
6021 .phy_ops = &ich8_phy_ops,6021 .phy_ops = &ich8_phy_ops,
6022 .nvm_ops = &spt_nvm_ops,6022 .nvm_ops = &spt_nvm_ops,
6023};6023};
6024
6025const struct e1000_info e1000_pch_adp_info = {
6026 .mac = e1000_pch_adp,
6027 .flags = FLAG_IS_ICH
6028 | FLAG_HAS_WOL
6029 | FLAG_HAS_HW_TIMESTAMP
6030 | FLAG_HAS_CTRLEXT_ON_LOAD
6031 | FLAG_HAS_AMT
6032 | FLAG_HAS_FLASH
6033 | FLAG_HAS_JUMBO_FRAMES
6034 | FLAG_APME_IN_WUC,
6035 .flags2 = FLAG2_HAS_PHY_STATS
6036 | FLAG2_HAS_EEE,
6037 .pba = 26,
6038 .max_hw_frame_size = 9022,
6039 .get_variants = e1000_get_variants_ich8lan,
6040 .mac_ops = &ich8_mac_ops,
6041 .phy_ops = &ich8_phy_ops,
6042 .nvm_ops = &spt_nvm_ops,
6043};
drivers/net/ethernet/intel/e1000e/netdev.c+21−18
@@ -52,6 +52,7 @@ static const struct e1000_info *e1000_info_tbl[] = { · 51 unmodified lines
52 [board_pch_spt] = &e1000_pch_spt_info,52 [board_pch_spt] = &e1000_pch_spt_info,
53 [board_pch_cnp] = &e1000_pch_cnp_info,53 [board_pch_cnp] = &e1000_pch_cnp_info,
54 [board_pch_tgp] = &e1000_pch_tgp_info,54 [board_pch_tgp] = &e1000_pch_tgp_info,
55 [board_pch_adp] = &e1000_pch_adp_info,
55};56};
56 57
57struct e1000_reg_info {58struct e1000_reg_info {
@@ -6341,7 +6342,8 @@ static void e1000e_s0ix_entry_flow(struct e1000_adapter *adapter) · 6283 unmodified lines
6341 u32 mac_data;6342 u32 mac_data;
6342 u16 phy_data;6343 u16 phy_data;
6343 6344
6344 if (er32(FWSM) & E1000_ICH_FWSM_FW_VALID) {6345 if (er32(FWSM) & E1000_ICH_FWSM_FW_VALID &&
6346 hw->mac.type >= e1000_pch_adp) {
6345 /* Request ME configure the device for S0ix */6347 /* Request ME configure the device for S0ix */
6346 mac_data = er32(H2ME);6348 mac_data = er32(H2ME);
6347 mac_data |= E1000_H2ME_START_DPG;6349 mac_data |= E1000_H2ME_START_DPG;
@@ -6490,7 +6492,8 @@ static void e1000e_s0ix_exit_flow(struct e1000_adapter *adapter) · 142 unmodified lines
6490 u16 phy_data;6492 u16 phy_data;
6491 u32 i = 0;6493 u32 i = 0;
6492 6494
6493 if (er32(FWSM) & E1000_ICH_FWSM_FW_VALID) {6495 if (er32(FWSM) & E1000_ICH_FWSM_FW_VALID &&
6496 hw->mac.type >= e1000_pch_adp) {
6494 /* Request ME unconfigure the device from S0ix */6497 /* Request ME unconfigure the device from S0ix */
6495 mac_data = er32(H2ME);6498 mac_data = er32(H2ME);
6496 mac_data &= ~E1000_H2ME_START_DPG;6499 mac_data &= ~E1000_H2ME_START_DPG;
@@ -7898,22 +7901,22 @@ static const struct pci_device_id e1000_pci_tbl[] = { · 1401 unmodified lines
7898 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V14), board_pch_tgp },7901 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V14), board_pch_tgp },
7899 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_LM15), board_pch_tgp },7902 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_LM15), board_pch_tgp },
7900 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V15), board_pch_tgp },7903 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V15), board_pch_tgp },
7901 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_LM23), board_pch_tgp },7904 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_LM23), board_pch_adp },
7902 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_V23), board_pch_tgp },7905 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_V23), board_pch_adp },
7903 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_LM16), board_pch_tgp },7906 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_LM16), board_pch_adp },
7904 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V16), board_pch_tgp },7907 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V16), board_pch_adp },
7905 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_LM17), board_pch_tgp },7908 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_LM17), board_pch_adp },
7906 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V17), board_pch_tgp },7909 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V17), board_pch_adp },
7907 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_LM22), board_pch_tgp },7910 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_LM22), board_pch_adp },
7908 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_V22), board_pch_tgp },7911 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_V22), board_pch_adp },
7909 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_LM18), board_pch_tgp },7912 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_LM18), board_pch_adp },
7910 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_V18), board_pch_tgp },7913 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_V18), board_pch_adp },
7911 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_LM19), board_pch_tgp },7914 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_LM19), board_pch_adp },
7912 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_V19), board_pch_tgp },7915 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_V19), board_pch_adp },
7913 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_LM20), board_pch_tgp },7916 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_LM20), board_pch_adp },
7914 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_V20), board_pch_tgp },7917 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_V20), board_pch_adp },
7915 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_LM21), board_pch_tgp },7918 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_LM21), board_pch_adp },
7916 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_V21), board_pch_tgp },7919 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_V21), board_pch_adp },
7917 7920
7918 { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */7921 { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
7919};7922};
drivers/net/ethernet/intel/i40e/i40e.h+5−5
@@ -144,6 +144,7 @@ enum i40e_state_t { · 143 unmodified lines
144 __I40E_VIRTCHNL_OP_PENDING,144 __I40E_VIRTCHNL_OP_PENDING,
145 __I40E_RECOVERY_MODE,145 __I40E_RECOVERY_MODE,
146 __I40E_VF_RESETS_DISABLED, /* disable resets during i40e_remove */146 __I40E_VF_RESETS_DISABLED, /* disable resets during i40e_remove */
147 __I40E_IN_REMOVE,
147 __I40E_VFS_RELEASING,148 __I40E_VFS_RELEASING,
148 /* This must be last as it determines the size of the BITMAP */149 /* This must be last as it determines the size of the BITMAP */
149 __I40E_STATE_SIZE__,150 __I40E_STATE_SIZE__,
@@ -174,7 +175,6 @@ enum i40e_interrupt_policy { · 24 unmodified lines
174 175
175struct i40e_lump_tracking {176struct i40e_lump_tracking {
176 u16 num_entries;177 u16 num_entries;
177 u16 search_hint;
178 u16 list[0];178 u16 list[0];
179#define I40E_PILE_VALID_BIT 0x8000179#define I40E_PILE_VALID_BIT 0x8000
180#define I40E_IWARP_IRQ_PILE_ID (I40E_PILE_VALID_BIT - 2)180#define I40E_IWARP_IRQ_PILE_ID (I40E_PILE_VALID_BIT - 2)
@@ -848,12 +848,12 @@ struct i40e_vsi { · 667 unmodified lines
848 struct rtnl_link_stats64 net_stats_offsets;848 struct rtnl_link_stats64 net_stats_offsets;
849 struct i40e_eth_stats eth_stats;849 struct i40e_eth_stats eth_stats;
850 struct i40e_eth_stats eth_stats_offsets;850 struct i40e_eth_stats eth_stats_offsets;
851 u32 tx_restart;851 u64 tx_restart;
852 u32 tx_busy;852 u64 tx_busy;
853 u64 tx_linearize;853 u64 tx_linearize;
854 u64 tx_force_wb;854 u64 tx_force_wb;
855 u32 rx_buf_failed;855 u64 rx_buf_failed;
856 u32 rx_page_failed;856 u64 rx_page_failed;
857 857
858 /* These are containers of ring pointers, allocated at run-time */858 /* These are containers of ring pointers, allocated at run-time */
859 struct i40e_ring **rx_rings;859 struct i40e_ring **rx_rings;
drivers/net/ethernet/intel/i40e/i40e_debugfs.c+1−1
@@ -240,7 +240,7 @@ static void i40e_dbg_dump_vsi_seid(struct i40e_pf *pf, int seid) · 239 unmodified lines
240 (unsigned long int)vsi->net_stats_offsets.rx_compressed,240 (unsigned long int)vsi->net_stats_offsets.rx_compressed,
241 (unsigned long int)vsi->net_stats_offsets.tx_compressed);241 (unsigned long int)vsi->net_stats_offsets.tx_compressed);
242 dev_info(&pf->pdev->dev,242 dev_info(&pf->pdev->dev,
243 " tx_restart = %d, tx_busy = %d, rx_buf_failed = %d, rx_page_failed = %d\n",243 " tx_restart = %llu, tx_busy = %llu, rx_buf_failed = %llu, rx_page_failed = %llu\n",
244 vsi->tx_restart, vsi->tx_busy,244 vsi->tx_restart, vsi->tx_busy,
245 vsi->rx_buf_failed, vsi->rx_page_failed);245 vsi->rx_buf_failed, vsi->rx_page_failed);
246 rcu_read_lock();246 rcu_read_lock();
drivers/net/ethernet/intel/i40e/i40e_main.c+50−25
@@ -196,10 +196,6 @@ int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem) · 195 unmodified lines
196 * @id: an owner id to stick on the items assigned196 * @id: an owner id to stick on the items assigned
197 *197 *
198 * Returns the base item index of the lump, or negative for error198 * Returns the base item index of the lump, or negative for error
199 *
200 * The search_hint trick and lack of advanced fit-finding only work
201 * because we're highly likely to have all the same size lump requests.
202 * Linear search time and any fragmentation should be minimal.
203 **/199 **/
204static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,200static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
205 u16 needed, u16 id)201 u16 needed, u16 id)
@@ -214,8 +210,21 @@ static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile, · 8 unmodified lines
214 return -EINVAL;210 return -EINVAL;
215 }211 }
216 212
217 /* start the linear search with an imperfect hint */213 /* Allocate last queue in the pile for FDIR VSI queue
218 i = pile->search_hint;214 * so it doesn't fragment the qp_pile
215 */
216 if (pile == pf->qp_pile && pf->vsi[id]->type == I40E_VSI_FDIR) {
217 if (pile->list[pile->num_entries - 1] & I40E_PILE_VALID_BIT) {
218 dev_err(&pf->pdev->dev,
219 "Cannot allocate queue %d for I40E_VSI_FDIR\n",
220 pile->num_entries - 1);
221 return -ENOMEM;
222 }
223 pile->list[pile->num_entries - 1] = id | I40E_PILE_VALID_BIT;
224 return pile->num_entries - 1;
225 }
226
227 i = 0;
219 while (i < pile->num_entries) {228 while (i < pile->num_entries) {
220 /* skip already allocated entries */229 /* skip already allocated entries */
221 if (pile->list[i] & I40E_PILE_VALID_BIT) {230 if (pile->list[i] & I40E_PILE_VALID_BIT) {
@@ -234,7 +243,6 @@ static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile, · 12 unmodified lines
234 for (j = 0; j < needed; j++)243 for (j = 0; j < needed; j++)
235 pile->list[i+j] = id | I40E_PILE_VALID_BIT;244 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
236 ret = i;245 ret = i;
237 pile->search_hint = i + j;
238 break;246 break;
239 }247 }
240 248
@@ -257,7 +265,7 @@ static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id) · 16 unmodified lines
257{265{
258 int valid_id = (id | I40E_PILE_VALID_BIT);266 int valid_id = (id | I40E_PILE_VALID_BIT);
259 int count = 0;267 int count = 0;
260 int i;268 u16 i;
261 269
262 if (!pile || index >= pile->num_entries)270 if (!pile || index >= pile->num_entries)
263 return -EINVAL;271 return -EINVAL;
@@ -269,8 +277,6 @@ static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id) · 5 unmodified lines
269 count++;277 count++;
270 }278 }
271 279
272 if (count && index < pile->search_hint)
273 pile->search_hint = index;
274 280
275 return count;281 return count;
276}282}
@@ -772,9 +778,9 @@ static void i40e_update_vsi_stats(struct i40e_vsi *vsi) · 495 unmodified lines
772 struct rtnl_link_stats64 *ns; /* netdev stats */778 struct rtnl_link_stats64 *ns; /* netdev stats */
773 struct i40e_eth_stats *oes;779 struct i40e_eth_stats *oes;
774 struct i40e_eth_stats *es; /* device's eth stats */780 struct i40e_eth_stats *es; /* device's eth stats */
775 u32 tx_restart, tx_busy;781 u64 tx_restart, tx_busy;
776 struct i40e_ring *p;782 struct i40e_ring *p;
777 u32 rx_page, rx_buf;783 u64 rx_page, rx_buf;
778 u64 bytes, packets;784 u64 bytes, packets;
779 unsigned int start;785 unsigned int start;
780 u64 tx_linearize;786 u64 tx_linearize;
@@ -5366,7 +5372,15 @@ static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc, · 4585 unmodified lines
5366 /* There is no need to reset BW when mqprio mode is on. */5372 /* There is no need to reset BW when mqprio mode is on. */
5367 if (pf->flags & I40E_FLAG_TC_MQPRIO)5373 if (pf->flags & I40E_FLAG_TC_MQPRIO)
5368 return 0;5374 return 0;
5369 if (!vsi->mqprio_qopt.qopt.hw && !(pf->flags & I40E_FLAG_DCB_ENABLED)) {5375
5376 if (!vsi->mqprio_qopt.qopt.hw) {
5377 if (pf->flags & I40E_FLAG_DCB_ENABLED)
5378 goto skip_reset;
5379
5380 if (IS_ENABLED(CONFIG_I40E_DCB) &&
5381 i40e_dcb_hw_get_num_tc(&pf->hw) == 1)
5382 goto skip_reset;
5383
5370 ret = i40e_set_bw_limit(vsi, vsi->seid, 0);5384 ret = i40e_set_bw_limit(vsi, vsi->seid, 0);
5371 if (ret)5385 if (ret)
5372 dev_info(&pf->pdev->dev,5386 dev_info(&pf->pdev->dev,
@@ -5374,6 +5388,8 @@ static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc, · 1 unmodified line
5374 vsi->seid);5388 vsi->seid);
5375 return ret;5389 return ret;
5376 }5390 }
5391
5392skip_reset:
5377 memset(&bw_data, 0, sizeof(bw_data));5393 memset(&bw_data, 0, sizeof(bw_data));
5378 bw_data.tc_valid_bits = enabled_tc;5394 bw_data.tc_valid_bits = enabled_tc;
5379 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)5395 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
@@ -10574,15 +10590,9 @@ static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired) · 5194 unmodified lines
10574 }10590 }
10575 i40e_get_oem_version(&pf->hw);10591 i40e_get_oem_version(&pf->hw);
10576 10592
10577 if (test_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state) &&10593 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state)) {
10578 ((hw->aq.fw_maj_ver == 4 && hw->aq.fw_min_ver <= 33) ||10594 /* The following delay is necessary for firmware update. */
10579 hw->aq.fw_maj_ver < 4) && hw->mac.type == I40E_MAC_XL710) {10595 mdelay(1000);
10580 /* The following delay is necessary for 4.33 firmware and older
10581 * to recover after EMP reset. 200 ms should suffice but we
10582 * put here 300 ms to be sure that FW is ready to operate
10583 * after reset.
10584 */
10585 mdelay(300);
10586 }10596 }
10587 10597
10588 /* re-verify the eeprom if we just had an EMP reset */10598 /* re-verify the eeprom if we just had an EMP reset */
@@ -10853,6 +10863,9 @@ static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit, · 264 unmodified lines
10853 bool lock_acquired)10863 bool lock_acquired)
10854{10864{
10855 int ret;10865 int ret;
10866
10867 if (test_bit(__I40E_IN_REMOVE, pf->state))
10868 return;
10856 /* Now we wait for GRST to settle out.10869 /* Now we wait for GRST to settle out.
10857 * We don't have to delete the VEBs or VSIs from the hw switch10870 * We don't have to delete the VEBs or VSIs from the hw switch
10858 * because the reset will make them disappear.10871 * because the reset will make them disappear.
@@ -11792,7 +11805,6 @@ static int i40e_init_interrupt_scheme(struct i40e_pf *pf) · 933 unmodified lines
11792 return -ENOMEM;11805 return -ENOMEM;
11793 11806
11794 pf->irq_pile->num_entries = vectors;11807 pf->irq_pile->num_entries = vectors;
11795 pf->irq_pile->search_hint = 0;
11796 11808
11797 /* track first vector for misc interrupts, ignore return */11809 /* track first vector for misc interrupts, ignore return */
11798 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);11810 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
@@ -12213,6 +12225,8 @@ int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count) · 414 unmodified lines
12213 12225
12214 vsi->req_queue_pairs = queue_count;12226 vsi->req_queue_pairs = queue_count;
12215 i40e_prep_for_reset(pf);12227 i40e_prep_for_reset(pf);
12228 if (test_bit(__I40E_IN_REMOVE, pf->state))
12229 return pf->alloc_rss_size;
12216 12230
12217 pf->alloc_rss_size = new_rss_size;12231 pf->alloc_rss_size = new_rss_size;
12218 12232
@@ -12595,7 +12609,6 @@ static int i40e_sw_init(struct i40e_pf *pf) · 376 unmodified lines
12595 goto sw_init_done;12609 goto sw_init_done;
12596 }12610 }
12597 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;12611 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
12598 pf->qp_pile->search_hint = 0;
12599 12612
12600 pf->tx_timeout_recovery_level = 1;12613 pf->tx_timeout_recovery_level = 1;
12601 12614
@@ -13040,6 +13053,10 @@ static int i40e_xdp_setup(struct i40e_vsi *vsi, struct bpf_prog *prog, · 438 unmodified lines
13040 if (need_reset)13053 if (need_reset)
13041 i40e_prep_for_reset(pf);13054 i40e_prep_for_reset(pf);
13042 13055
13056 /* VSI shall be deleted in a moment, just return EINVAL */
13057 if (test_bit(__I40E_IN_REMOVE, pf->state))
13058 return -EINVAL;
13059
13043 old_prog = xchg(&vsi->xdp_prog, prog);13060 old_prog = xchg(&vsi->xdp_prog, prog);
13044 13061
13045 if (need_reset) {13062 if (need_reset) {
@@ -15930,8 +15947,13 @@ static void i40e_remove(struct pci_dev *pdev) · 2884 unmodified lines
15930 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0);15947 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0);
15931 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0);15948 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0);
15932 15949
15933 while (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))15950 /* Grab __I40E_RESET_RECOVERY_PENDING and set __I40E_IN_REMOVE
15951 * flags, once they are set, i40e_rebuild should not be called as
15952 * i40e_prep_for_reset always returns early.
15953 */
15954 while (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
15934 usleep_range(1000, 2000);15955 usleep_range(1000, 2000);
15956 set_bit(__I40E_IN_REMOVE, pf->state);
15935 15957
15936 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {15958 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
15937 set_bit(__I40E_VF_RESETS_DISABLED, pf->state);15959 set_bit(__I40E_VF_RESETS_DISABLED, pf->state);
@@ -16130,6 +16152,9 @@ static void i40e_pci_error_reset_done(struct pci_dev *pdev) · 192 unmodified lines
16130{16152{
16131 struct i40e_pf *pf = pci_get_drvdata(pdev);16153 struct i40e_pf *pf = pci_get_drvdata(pdev);
16132 16154
16155 if (test_bit(__I40E_IN_REMOVE, pf->state))
16156 return;
16157
16133 i40e_reset_and_rebuild(pf, false, false);16158 i40e_reset_and_rebuild(pf, false, false);
16134}16159}
16135 16160
drivers/net/ethernet/intel/i40e/i40e_register.h+3−0
@@ -413,6 +413,9 @@ · 412 unmodified lines
413#define I40E_VFINT_DYN_CTLN(_INTVF) (0x00024800 + ((_INTVF) * 4)) /* _i=0...511 */ /* Reset: VFR */413#define I40E_VFINT_DYN_CTLN(_INTVF) (0x00024800 + ((_INTVF) * 4)) /* _i=0...511 */ /* Reset: VFR */
414#define I40E_VFINT_DYN_CTLN_CLEARPBA_SHIFT 1414#define I40E_VFINT_DYN_CTLN_CLEARPBA_SHIFT 1
415#define I40E_VFINT_DYN_CTLN_CLEARPBA_MASK I40E_MASK(0x1, I40E_VFINT_DYN_CTLN_CLEARPBA_SHIFT)415#define I40E_VFINT_DYN_CTLN_CLEARPBA_MASK I40E_MASK(0x1, I40E_VFINT_DYN_CTLN_CLEARPBA_SHIFT)
416#define I40E_VFINT_ICR0_ADMINQ_SHIFT 30
417#define I40E_VFINT_ICR0_ADMINQ_MASK I40E_MASK(0x1, I40E_VFINT_ICR0_ADMINQ_SHIFT)
418#define I40E_VFINT_ICR0_ENA(_VF) (0x0002C000 + ((_VF) * 4)) /* _i=0...127 */ /* Reset: CORER */
416#define I40E_VPINT_AEQCTL(_VF) (0x0002B800 + ((_VF) * 4)) /* _i=0...127 */ /* Reset: CORER */419#define I40E_VPINT_AEQCTL(_VF) (0x0002B800 + ((_VF) * 4)) /* _i=0...127 */ /* Reset: CORER */
417#define I40E_VPINT_AEQCTL_MSIX_INDX_SHIFT 0420#define I40E_VPINT_AEQCTL_MSIX_INDX_SHIFT 0
418#define I40E_VPINT_AEQCTL_ITR_INDX_SHIFT 11421#define I40E_VPINT_AEQCTL_ITR_INDX_SHIFT 11
drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c+101−2
@@ -1376,6 +1376,32 @@ static i40e_status i40e_config_vf_promiscuous_mode(struct i40e_vf *vf, · 1375 unmodified lines
1376 return aq_ret;1376 return aq_ret;
1377}1377}
1378 1378
1379/**
1380 * i40e_sync_vfr_reset
1381 * @hw: pointer to hw struct
1382 * @vf_id: VF identifier
1383 *
1384 * Before trigger hardware reset, we need to know if no other process has
1385 * reserved the hardware for any reset operations. This check is done by
1386 * examining the status of the RSTAT1 register used to signal the reset.
1387 **/
1388static int i40e_sync_vfr_reset(struct i40e_hw *hw, int vf_id)
1389{
1390 u32 reg;
1391 int i;
1392
1393 for (i = 0; i < I40E_VFR_WAIT_COUNT; i++) {
1394 reg = rd32(hw, I40E_VFINT_ICR0_ENA(vf_id)) &
1395 I40E_VFINT_ICR0_ADMINQ_MASK;
1396 if (reg)
1397 return 0;
1398
1399 usleep_range(100, 200);
1400 }
1401
1402 return -EAGAIN;
1403}
1404
1379/**1405/**
1380 * i40e_trigger_vf_reset1406 * i40e_trigger_vf_reset
1381 * @vf: pointer to the VF structure1407 * @vf: pointer to the VF structure
@@ -1390,9 +1416,11 @@ static void i40e_trigger_vf_reset(struct i40e_vf *vf, bool flr) · 8 unmodified lines
1390 struct i40e_pf *pf = vf->pf;1416 struct i40e_pf *pf = vf->pf;
1391 struct i40e_hw *hw = &pf->hw;1417 struct i40e_hw *hw = &pf->hw;
1392 u32 reg, reg_idx, bit_idx;1418 u32 reg, reg_idx, bit_idx;
1419 bool vf_active;
1420 u32 radq;
1393 1421
1394 /* warn the VF */1422 /* warn the VF */
1395 clear_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);1423 vf_active = test_and_clear_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);
1396 1424
1397 /* Disable VF's configuration API during reset. The flag is re-enabled1425 /* Disable VF's configuration API during reset. The flag is re-enabled
1398 * in i40e_alloc_vf_res(), when it's safe again to access VF's VSI.1426 * in i40e_alloc_vf_res(), when it's safe again to access VF's VSI.
@@ -1406,7 +1434,19 @@ static void i40e_trigger_vf_reset(struct i40e_vf *vf, bool flr) · 7 unmodified lines
1406 * just need to clean up, so don't hit the VFRTRIG register.1434 * just need to clean up, so don't hit the VFRTRIG register.
1407 */1435 */
1408 if (!flr) {1436 if (!flr) {
1409 /* reset VF using VPGEN_VFRTRIG reg */1437 /* Sync VFR reset before trigger next one */
1438 radq = rd32(hw, I40E_VFINT_ICR0_ENA(vf->vf_id)) &
1439 I40E_VFINT_ICR0_ADMINQ_MASK;
1440 if (vf_active && !radq)
1441 /* waiting for finish reset by virtual driver */
1442 if (i40e_sync_vfr_reset(hw, vf->vf_id))
1443 dev_info(&pf->pdev->dev,
1444 "Reset VF %d never finished\n",
1445 vf->vf_id);
1446
1447 /* Reset VF using VPGEN_VFRTRIG reg. It is also setting
1448 * in progress state in rstat1 register.
1449 */
1410 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));1450 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
1411 reg |= I40E_VPGEN_VFRTRIG_VFSWR_MASK;1451 reg |= I40E_VPGEN_VFRTRIG_VFSWR_MASK;
1412 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);1452 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
@@ -2617,6 +2657,59 @@ error_param: · 1204 unmodified lines
2617 aq_ret);2657 aq_ret);
2618}2658}
2619 2659
2660/**
2661 * i40e_check_enough_queue - find big enough queue number
2662 * @vf: pointer to the VF info
2663 * @needed: the number of items needed
2664 *
2665 * Returns the base item index of the queue, or negative for error
2666 **/
2667static int i40e_check_enough_queue(struct i40e_vf *vf, u16 needed)
2668{
2669 unsigned int i, cur_queues, more, pool_size;
2670 struct i40e_lump_tracking *pile;
2671 struct i40e_pf *pf = vf->pf;
2672 struct i40e_vsi *vsi;
2673
2674 vsi = pf->vsi[vf->lan_vsi_idx];
2675 cur_queues = vsi->alloc_queue_pairs;
2676
2677 /* if current allocated queues are enough for need */
2678 if (cur_queues >= needed)
2679 return vsi->base_queue;
2680
2681 pile = pf->qp_pile;
2682 if (cur_queues > 0) {
2683 /* if the allocated queues are not zero
2684 * just check if there are enough queues for more
2685 * behind the allocated queues.
2686 */
2687 more = needed - cur_queues;
2688 for (i = vsi->base_queue + cur_queues;
2689 i < pile->num_entries; i++) {
2690 if (pile->list[i] & I40E_PILE_VALID_BIT)
2691 break;
2692
2693 if (more-- == 1)
2694 /* there is enough */
2695 return vsi->base_queue;
2696 }
2697 }
2698
2699 pool_size = 0;
2700 for (i = 0; i < pile->num_entries; i++) {
2701 if (pile->list[i] & I40E_PILE_VALID_BIT) {
2702 pool_size = 0;
2703 continue;
2704 }
2705 if (needed <= ++pool_size)
2706 /* there is enough */
2707 return i;
2708 }
2709
2710 return -ENOMEM;
2711}
2712
2620/**2713/**
2621 * i40e_vc_request_queues_msg2714 * i40e_vc_request_queues_msg
2622 * @vf: pointer to the VF info2715 * @vf: pointer to the VF info
@@ -2651,6 +2744,12 @@ static int i40e_vc_request_queues_msg(struct i40e_vf *vf, u8 *msg) · 28 unmodified lines
2651 req_pairs - cur_pairs,2744 req_pairs - cur_pairs,
2652 pf->queues_left);2745 pf->queues_left);
2653 vfres->num_queue_pairs = pf->queues_left + cur_pairs;2746 vfres->num_queue_pairs = pf->queues_left + cur_pairs;
2747 } else if (i40e_check_enough_queue(vf, req_pairs) < 0) {
2748 dev_warn(&pf->pdev->dev,
2749 "VF %d requested %d more queues, but there is not enough for it.\n",
2750 vf->vf_id,
2751 req_pairs - cur_pairs);
2752 vfres->num_queue_pairs = cur_pairs;
2654 } else {2753 } else {
2655 /* successful request */2754 /* successful request */
2656 vf->num_req_queues = req_pairs;2755 vf->num_req_queues = req_pairs;
drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.h+1−0
@@ -19,6 +19,7 @@ · 18 unmodified lines
19#define I40E_MAX_VF_PROMISC_FLAGS 319#define I40E_MAX_VF_PROMISC_FLAGS 3
20 20
21#define I40E_VF_STATE_WAIT_COUNT 2021#define I40E_VF_STATE_WAIT_COUNT 20
22#define I40E_VFR_WAIT_COUNT 100
22 23
23/* Various queue ctrls */24/* Various queue ctrls */
24enum i40e_queue_ctrl {25enum i40e_queue_ctrl {
drivers/net/ethernet/intel/ice/ice.h+2−1
@@ -483,6 +483,7 @@ enum ice_pf_flags { · 482 unmodified lines
483 ICE_FLAG_VF_TRUE_PROMISC_ENA,483 ICE_FLAG_VF_TRUE_PROMISC_ENA,
484 ICE_FLAG_MDD_AUTO_RESET_VF,484 ICE_FLAG_MDD_AUTO_RESET_VF,
485 ICE_FLAG_LINK_LENIENT_MODE_ENA,485 ICE_FLAG_LINK_LENIENT_MODE_ENA,
486 ICE_FLAG_PLUG_AUX_DEV,
486 ICE_PF_FLAGS_NBITS /* must be last */487 ICE_PF_FLAGS_NBITS /* must be last */
487};488};
488 489
@@ -887,7 +888,7 @@ static inline void ice_set_rdma_cap(struct ice_pf *pf) · 398 unmodified lines
887 if (pf->hw.func_caps.common_cap.rdma && pf->num_rdma_msix) {888 if (pf->hw.func_caps.common_cap.rdma && pf->num_rdma_msix) {
888 set_bit(ICE_FLAG_RDMA_ENA, pf->flags);889 set_bit(ICE_FLAG_RDMA_ENA, pf->flags);
889 set_bit(ICE_FLAG_AUX_ENA, pf->flags);890 set_bit(ICE_FLAG_AUX_ENA, pf->flags);
890 ice_plug_aux_dev(pf);891 set_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags);
891 }892 }
892}893}
893 894
drivers/net/ethernet/intel/ice/ice_common.c+2−1
@@ -3342,7 +3342,8 @@ ice_cfg_phy_fec(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg, · 3341 unmodified lines
3342 !ice_fw_supports_report_dflt_cfg(hw)) {3342 !ice_fw_supports_report_dflt_cfg(hw)) {
3343 struct ice_link_default_override_tlv tlv;3343 struct ice_link_default_override_tlv tlv;
3344 3344
3345 if (ice_get_link_default_override(&tlv, pi))3345 status = ice_get_link_default_override(&tlv, pi);
3346 if (status)
3346 goto out;3347 goto out;
3347 3348
3348 if (!(tlv.options & ICE_LINK_OVERRIDE_STRICT_MODE) &&3349 if (!(tlv.options & ICE_LINK_OVERRIDE_STRICT_MODE) &&
drivers/net/ethernet/intel/ice/ice_lag.c+28−6
@@ -204,17 +204,39 @@ ice_lag_unlink(struct ice_lag *lag, · 203 unmodified lines
204 lag->upper_netdev = NULL;204 lag->upper_netdev = NULL;
205 }205 }
206 206
207 if (lag->peer_netdev) {207 lag->peer_netdev = NULL;
208 dev_put(lag->peer_netdev);
209 lag->peer_netdev = NULL;
210 }
211
212 ice_set_sriov_cap(pf);208 ice_set_sriov_cap(pf);
213 ice_set_rdma_cap(pf);209 ice_set_rdma_cap(pf);
214 lag->bonded = false;210 lag->bonded = false;
215 lag->role = ICE_LAG_NONE;211 lag->role = ICE_LAG_NONE;
216}212}
217 213
214/**
215 * ice_lag_unregister - handle netdev unregister events
216 * @lag: LAG info struct
217 * @netdev: netdev reporting the event
218 */
219static void ice_lag_unregister(struct ice_lag *lag, struct net_device *netdev)
220{
221 struct ice_pf *pf = lag->pf;
222
223 /* check to see if this event is for this netdev
224 * check that we are in an aggregate
225 */
226 if (netdev != lag->netdev || !lag->bonded)
227 return;
228
229 if (lag->upper_netdev) {
230 dev_put(lag->upper_netdev);
231 lag->upper_netdev = NULL;
232 ice_set_sriov_cap(pf);
233 ice_set_rdma_cap(pf);
234 }
235 /* perform some cleanup in case we come back */
236 lag->bonded = false;
237 lag->role = ICE_LAG_NONE;
238}
239
218/**240/**
219 * ice_lag_changeupper_event - handle LAG changeupper event241 * ice_lag_changeupper_event - handle LAG changeupper event
220 * @lag: LAG info struct242 * @lag: LAG info struct
@@ -307,7 +329,7 @@ ice_lag_event_handler(struct notifier_block *notif_blk, unsigned long event, · 86 unmodified lines
307 ice_lag_info_event(lag, ptr);329 ice_lag_info_event(lag, ptr);
308 break;330 break;
309 case NETDEV_UNREGISTER:331 case NETDEV_UNREGISTER:
310 ice_lag_unlink(lag, ptr);332 ice_lag_unregister(lag, netdev);
311 break;333 break;
312 default:334 default:
313 break;335 break;
drivers/net/ethernet/intel/ice/ice_lan_tx_rx.h+1−0
@@ -568,6 +568,7 @@ struct ice_tx_ctx_desc { · 567 unmodified lines
568 (0x3FFFFULL << ICE_TXD_CTX_QW1_TSO_LEN_S)568 (0x3FFFFULL << ICE_TXD_CTX_QW1_TSO_LEN_S)
569 569
570#define ICE_TXD_CTX_QW1_MSS_S 50570#define ICE_TXD_CTX_QW1_MSS_S 50
571#define ICE_TXD_CTX_MIN_MSS 64
571 572
572#define ICE_TXD_CTX_QW1_VSI_S 50573#define ICE_TXD_CTX_QW1_VSI_S 50
573#define ICE_TXD_CTX_QW1_VSI_M (0x3FFULL << ICE_TXD_CTX_QW1_VSI_S)574#define ICE_TXD_CTX_QW1_VSI_M (0x3FFULL << ICE_TXD_CTX_QW1_VSI_S)
drivers/net/ethernet/intel/ice/ice_lib.c+6−0
@@ -1684,6 +1684,12 @@ static void ice_vsi_set_rss_flow_fld(struct ice_vsi *vsi) · 1683 unmodified lines
1684 if (status)1684 if (status)
1685 dev_dbg(dev, "ice_add_rss_cfg failed for sctp6 flow, vsi = %d, error = %d\n",1685 dev_dbg(dev, "ice_add_rss_cfg failed for sctp6 flow, vsi = %d, error = %d\n",
1686 vsi_num, status);1686 vsi_num, status);
1687
1688 status = ice_add_rss_cfg(hw, vsi_handle, ICE_FLOW_HASH_ESP_SPI,
1689 ICE_FLOW_SEG_HDR_ESP);
1690 if (status)
1691 dev_dbg(dev, "ice_add_rss_cfg failed for esp/spi flow, vsi = %d, error = %d\n",
1692 vsi_num, status);
1687}1693}
1688 1694
1689/**1695/**
drivers/net/ethernet/intel/ice/ice_main.c+20−8
@@ -2253,6 +2253,9 @@ static void ice_service_task(struct work_struct *work) · 2252 unmodified lines
2253 return;2253 return;
2254 }2254 }
2255 2255
2256 if (test_and_clear_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags))
2257 ice_plug_aux_dev(pf);
2258
2256 ice_clean_adminq_subtask(pf);2259 ice_clean_adminq_subtask(pf);
2257 ice_check_media_subtask(pf);2260 ice_check_media_subtask(pf);
2258 ice_check_for_hang_subtask(pf);2261 ice_check_for_hang_subtask(pf);
@@ -8525,6 +8528,7 @@ ice_features_check(struct sk_buff *skb, · 6266 unmodified lines
8525 struct net_device __always_unused *netdev,8528 struct net_device __always_unused *netdev,
8526 netdev_features_t features)8529 netdev_features_t features)
8527{8530{
8531 bool gso = skb_is_gso(skb);
8528 size_t len;8532 size_t len;
8529 8533
8530 /* No point in doing any of this if neither checksum nor GSO are8534 /* No point in doing any of this if neither checksum nor GSO are
@@ -8537,24 +8541,32 @@ ice_features_check(struct sk_buff *skb, · 6 unmodified lines
8537 /* We cannot support GSO if the MSS is going to be less than8541 /* We cannot support GSO if the MSS is going to be less than
8538 * 64 bytes. If it is then we need to drop support for GSO.8542 * 64 bytes. If it is then we need to drop support for GSO.
8539 */8543 */
8540 if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_size < 64))8544 if (gso && (skb_shinfo(skb)->gso_size < ICE_TXD_CTX_MIN_MSS))
8541 features &= ~NETIF_F_GSO_MASK;8545 features &= ~NETIF_F_GSO_MASK;
8542 8546
8543 len = skb_network_header(skb) - skb->data;8547 len = skb_network_offset(skb);
8544 if (len > ICE_TXD_MACLEN_MAX || len & 0x1)8548 if (len > ICE_TXD_MACLEN_MAX || len & 0x1)
8545 goto out_rm_features;8549 goto out_rm_features;
8546 8550
8547 len = skb_transport_header(skb) - skb_network_header(skb);8551 len = skb_network_header_len(skb);
8548 if (len > ICE_TXD_IPLEN_MAX || len & 0x1)8552 if (len > ICE_TXD_IPLEN_MAX || len & 0x1)
8549 goto out_rm_features;8553 goto out_rm_features;
8550 8554
8551 if (skb->encapsulation) {8555 if (skb->encapsulation) {
8552 len = skb_inner_network_header(skb) - skb_transport_header(skb);8556 /* this must work for VXLAN frames AND IPIP/SIT frames, and in
8553 if (len > ICE_TXD_L4LEN_MAX || len & 0x1)8557 * the case of IPIP frames, the transport header pointer is
8554 goto out_rm_features;8558 * after the inner header! So check to make sure that this
8559 * is a GRE or UDP_TUNNEL frame before doing that math.
8560 */
8561 if (gso && (skb_shinfo(skb)->gso_type &
8562 (SKB_GSO_GRE | SKB_GSO_UDP_TUNNEL))) {
8563 len = skb_inner_network_header(skb) -
8564 skb_transport_header(skb);
8565 if (len > ICE_TXD_L4LEN_MAX || len & 0x1)
8566 goto out_rm_features;
8567 }
8555 8568
8556 len = skb_inner_transport_header(skb) -8569 len = skb_inner_network_header_len(skb);
8557 skb_inner_network_header(skb);
8558 if (len > ICE_TXD_IPLEN_MAX || len & 0x1)8570 if (len > ICE_TXD_IPLEN_MAX || len & 0x1)
8559 goto out_rm_features;8571 goto out_rm_features;
8560 }8572 }
drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c+7−6
@@ -1984,14 +1984,15 @@ static void ixgbevf_set_rx_buffer_len(struct ixgbevf_adapter *adapter, · 1983 unmodified lines
1984 if (adapter->flags & IXGBEVF_FLAGS_LEGACY_RX)1984 if (adapter->flags & IXGBEVF_FLAGS_LEGACY_RX)
1985 return;1985 return;
1986 1986
1987 set_ring_build_skb_enabled(rx_ring);1987 if (PAGE_SIZE < 8192)
1988 if (max_frame > IXGBEVF_MAX_FRAME_BUILD_SKB)
1989 set_ring_uses_large_buffer(rx_ring);
1988 1990
1989 if (PAGE_SIZE < 8192) {1991 /* 82599 can't rely on RXDCTL.RLPML to restrict the size of the frame */
1990 if (max_frame <= IXGBEVF_MAX_FRAME_BUILD_SKB)1992 if (adapter->hw.mac.type == ixgbe_mac_82599_vf && !ring_uses_large_buffer(rx_ring))
1991 return;1993 return;
1992 1994
1993 set_ring_uses_large_buffer(rx_ring);1995 set_ring_build_skb_enabled(rx_ring);
1994 }
1995}1996}
1996 1997
1997/**1998/**
drivers/net/ethernet/litex/Kconfig+1−1
@@ -17,7 +17,7 @@ if NET_VENDOR_LITEX · 16 unmodified lines
17 17
18config LITEX_LITEETH18config LITEX_LITEETH
19 tristate "LiteX Ethernet support"19 tristate "LiteX Ethernet support"
20 depends on OF20 depends on OF && HAS_IOMEM
21 help21 help
22 If you wish to compile a kernel for hardware with a LiteX LiteEth22 If you wish to compile a kernel for hardware with a LiteX LiteEth
23 device then you should answer Y to this.23 device then you should answer Y to this.
drivers/net/ethernet/marvell/octeontx2/af/cgx.c+2−0
@@ -1570,6 +1570,8 @@ static struct mac_ops cgx_mac_ops = { · 1569 unmodified lines
1570 .mac_enadis_pause_frm = cgx_lmac_enadis_pause_frm,1570 .mac_enadis_pause_frm = cgx_lmac_enadis_pause_frm,
1571 .mac_pause_frm_config = cgx_lmac_pause_frm_config,1571 .mac_pause_frm_config = cgx_lmac_pause_frm_config,
1572 .mac_enadis_ptp_config = cgx_lmac_ptp_config,1572 .mac_enadis_ptp_config = cgx_lmac_ptp_config,
1573 .mac_rx_tx_enable = cgx_lmac_rx_tx_enable,
1574 .mac_tx_enable = cgx_lmac_tx_enable,
1573};1575};
1574 1576
1575static int cgx_probe(struct pci_dev *pdev, const struct pci_device_id *id)1577static int cgx_probe(struct pci_dev *pdev, const struct pci_device_id *id)
drivers/net/ethernet/marvell/octeontx2/af/lmac_common.h+3−0
@@ -107,6 +107,9 @@ struct mac_ops { · 106 unmodified lines
107 void (*mac_enadis_ptp_config)(void *cgxd,107 void (*mac_enadis_ptp_config)(void *cgxd,
108 int lmac_id,108 int lmac_id,
109 bool enable);109 bool enable);
110
111 int (*mac_rx_tx_enable)(void *cgxd, int lmac_id, bool enable);
112 int (*mac_tx_enable)(void *cgxd, int lmac_id, bool enable);
110};113};
111 114
112struct cgx {115struct cgx {
drivers/net/ethernet/marvell/octeontx2/af/mbox.h+1−0
@@ -732,6 +732,7 @@ enum nix_af_status { · 731 unmodified lines
732 NIX_AF_ERR_BANDPROF_INVAL_REQ = -428,732 NIX_AF_ERR_BANDPROF_INVAL_REQ = -428,
733 NIX_AF_ERR_CQ_CTX_WRITE_ERR = -429,733 NIX_AF_ERR_CQ_CTX_WRITE_ERR = -429,
734 NIX_AF_ERR_AQ_CTX_RETRY_WRITE = -430,734 NIX_AF_ERR_AQ_CTX_RETRY_WRITE = -430,
735 NIX_AF_ERR_LINK_CREDITS = -431,
735};736};
736 737
737/* For NIX RX vtag action */738/* For NIX RX vtag action */
drivers/net/ethernet/marvell/octeontx2/af/npc_profile.h+35−35
@@ -185,7 +185,6 @@ enum npc_kpu_parser_state { · 184 unmodified lines
185 NPC_S_KPU2_QINQ,185 NPC_S_KPU2_QINQ,
186 NPC_S_KPU2_ETAG,186 NPC_S_KPU2_ETAG,
187 NPC_S_KPU2_EXDSA,187 NPC_S_KPU2_EXDSA,
188 NPC_S_KPU2_NGIO,
189 NPC_S_KPU2_CPT_CTAG,188 NPC_S_KPU2_CPT_CTAG,
190 NPC_S_KPU2_CPT_QINQ,189 NPC_S_KPU2_CPT_QINQ,
191 NPC_S_KPU3_CTAG,190 NPC_S_KPU3_CTAG,
@@ -212,6 +211,7 @@ enum npc_kpu_parser_state { · 20 unmodified lines
212 NPC_S_KPU5_NSH,211 NPC_S_KPU5_NSH,
213 NPC_S_KPU5_CPT_IP,212 NPC_S_KPU5_CPT_IP,
214 NPC_S_KPU5_CPT_IP6,213 NPC_S_KPU5_CPT_IP6,
214 NPC_S_KPU5_NGIO,
215 NPC_S_KPU6_IP6_EXT,215 NPC_S_KPU6_IP6_EXT,
216 NPC_S_KPU6_IP6_HOP_DEST,216 NPC_S_KPU6_IP6_HOP_DEST,
217 NPC_S_KPU6_IP6_ROUT,217 NPC_S_KPU6_IP6_ROUT,
@@ -1120,15 +1120,6 @@ static struct npc_kpu_profile_cam kpu1_cam_entries[] = { · 902 unmodified lines
1120 0x0000,1120 0x0000,
1121 0x0000,1121 0x0000,
1122 },1122 },
1123 {
1124 NPC_S_KPU1_ETHER, 0xff,
1125 NPC_ETYPE_CTAG,
1126 0xffff,
1127 NPC_ETYPE_NGIO,
1128 0xffff,
1129 0x0000,
1130 0x0000,
1131 },
1132 {1123 {
1133 NPC_S_KPU1_ETHER, 0xff,1124 NPC_S_KPU1_ETHER, 0xff,
1134 NPC_ETYPE_CTAG,1125 NPC_ETYPE_CTAG,
@@ -1966,6 +1957,15 @@ static struct npc_kpu_profile_cam kpu2_cam_entries[] = { · 831 unmodified lines
1966 0x0000,1957 0x0000,
1967 0x0000,1958 0x0000,
1968 },1959 },
1960 {
1961 NPC_S_KPU2_CTAG, 0xff,
1962 NPC_ETYPE_NGIO,
1963 0xffff,
1964 0x0000,
1965 0x0000,
1966 0x0000,
1967 0x0000,
1968 },
1969 {1969 {
1970 NPC_S_KPU2_CTAG, 0xff,1970 NPC_S_KPU2_CTAG, 0xff,
1971 NPC_ETYPE_PPPOE,1971 NPC_ETYPE_PPPOE,
@@ -2749,15 +2749,6 @@ static struct npc_kpu_profile_cam kpu2_cam_entries[] = { · 777 unmodified lines
2749 0x0000,2749 0x0000,
2750 0x0000,2750 0x0000,
2751 },2751 },
2752 {
2753 NPC_S_KPU2_NGIO, 0xff,
2754 0x0000,
2755 0x0000,
2756 0x0000,
2757 0x0000,
2758 0x0000,
2759 0x0000,
2760 },
2761 {2752 {
2762 NPC_S_KPU2_CPT_CTAG, 0xff,2753 NPC_S_KPU2_CPT_CTAG, 0xff,
2763 NPC_ETYPE_IP,2754 NPC_ETYPE_IP,
@@ -5089,6 +5080,15 @@ static struct npc_kpu_profile_cam kpu5_cam_entries[] = { · 2325 unmodified lines
5089 0x0000,5080 0x0000,
5090 0x0000,5081 0x0000,
5091 },5082 },
5083 {
5084 NPC_S_KPU5_NGIO, 0xff,
5085 0x0000,
5086 0x0000,
5087 0x0000,
5088 0x0000,
5089 0x0000,
5090 0x0000,
5091 },
5092 {5092 {
5093 NPC_S_NA, 0X00,5093 NPC_S_NA, 0X00,
5094 0x0000,5094 0x0000,
@@ -8422,14 +8422,6 @@ static struct npc_kpu_profile_action kpu1_action_entries[] = { · 3327 unmodified lines
8422 0,8422 0,
8423 0, 0, 0, 0,8423 0, 0, 0, 0,
8424 },8424 },
8425 {
8426 NPC_ERRLEV_RE, NPC_EC_NOERR,
8427 8, 12, 0, 0, 0,
8428 NPC_S_KPU2_NGIO, 12, 1,
8429 NPC_LID_LA, NPC_LT_LA_ETHER,
8430 0,
8431 0, 0, 0, 0,
8432 },
8433 {8425 {
8434 NPC_ERRLEV_RE, NPC_EC_NOERR,8426 NPC_ERRLEV_RE, NPC_EC_NOERR,
8435 8, 12, 0, 0, 0,8427 8, 12, 0, 0, 0,
@@ -9194,6 +9186,14 @@ static struct npc_kpu_profile_action kpu2_action_entries[] = { · 758 unmodified lines
9194 0,9186 0,
9195 0, 0, 0, 0,9187 0, 0, 0, 0,
9196 },9188 },
9189 {
9190 NPC_ERRLEV_RE, NPC_EC_NOERR,
9191 0, 0, 0, 2, 0,
9192 NPC_S_KPU5_NGIO, 6, 1,
9193 NPC_LID_LB, NPC_LT_LB_CTAG,
9194 0,
9195 0, 0, 0, 0,
9196 },
9197 {9197 {
9198 NPC_ERRLEV_RE, NPC_EC_NOERR,9198 NPC_ERRLEV_RE, NPC_EC_NOERR,
9199 8, 0, 6, 2, 0,9199 8, 0, 6, 2, 0,
@@ -9890,14 +9890,6 @@ static struct npc_kpu_profile_action kpu2_action_entries[] = { · 690 unmodified lines
9890 NPC_F_LB_U_UNK_ETYPE | NPC_F_LB_L_EXDSA,9890 NPC_F_LB_U_UNK_ETYPE | NPC_F_LB_L_EXDSA,
9891 0, 0, 0, 0,9891 0, 0, 0, 0,
9892 },9892 },
9893 {
9894 NPC_ERRLEV_RE, NPC_EC_NOERR,
9895 0, 0, 0, 0, 1,
9896 NPC_S_NA, 0, 1,
9897 NPC_LID_LC, NPC_LT_LC_NGIO,
9898 0,
9899 0, 0, 0, 0,
9900 },
9901 {9893 {
9902 NPC_ERRLEV_RE, NPC_EC_NOERR,9894 NPC_ERRLEV_RE, NPC_EC_NOERR,
9903 8, 0, 6, 2, 0,9895 8, 0, 6, 2, 0,
@@ -11973,6 +11965,14 @@ static struct npc_kpu_profile_action kpu5_action_entries[] = { · 2069 unmodified lines
11973 0,11965 0,
11974 0, 0, 0, 0,11966 0, 0, 0, 0,
11975 },11967 },
11968 {
11969 NPC_ERRLEV_RE, NPC_EC_NOERR,
11970 0, 0, 0, 0, 1,
11971 NPC_S_NA, 0, 1,
11972 NPC_LID_LC, NPC_LT_LC_NGIO,
11973 0,
11974 0, 0, 0, 0,
11975 },
11976 {11976 {
11977 NPC_ERRLEV_LC, NPC_EC_UNK,11977 NPC_ERRLEV_LC, NPC_EC_UNK,
11978 0, 0, 0, 0, 1,11978 0, 0, 0, 0, 1,
drivers/net/ethernet/marvell/octeontx2/af/rpm.c+51−15
@@ -30,6 +30,8 @@ static struct mac_ops rpm_mac_ops = { · 29 unmodified lines
30 .mac_enadis_pause_frm = rpm_lmac_enadis_pause_frm,30 .mac_enadis_pause_frm = rpm_lmac_enadis_pause_frm,
31 .mac_pause_frm_config = rpm_lmac_pause_frm_config,31 .mac_pause_frm_config = rpm_lmac_pause_frm_config,
32 .mac_enadis_ptp_config = rpm_lmac_ptp_config,32 .mac_enadis_ptp_config = rpm_lmac_ptp_config,
33 .mac_rx_tx_enable = rpm_lmac_rx_tx_enable,
34 .mac_tx_enable = rpm_lmac_tx_enable,
33};35};
34 36
35struct mac_ops *rpm_get_mac_ops(void)37struct mac_ops *rpm_get_mac_ops(void)
@@ -54,6 +56,43 @@ int rpm_get_nr_lmacs(void *rpmd) · 18 unmodified lines
54 return hweight8(rpm_read(rpm, 0, CGXX_CMRX_RX_LMACS) & 0xFULL);56 return hweight8(rpm_read(rpm, 0, CGXX_CMRX_RX_LMACS) & 0xFULL);
55}57}
56 58
59int rpm_lmac_tx_enable(void *rpmd, int lmac_id, bool enable)
60{
61 rpm_t *rpm = rpmd;
62 u64 cfg, last;
63
64 if (!is_lmac_valid(rpm, lmac_id))
65 return -ENODEV;
66
67 cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
68 last = cfg;
69 if (enable)
70 cfg |= RPM_TX_EN;
71 else
72 cfg &= ~(RPM_TX_EN);
73
74 if (cfg != last)
75 rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);
76 return !!(last & RPM_TX_EN);
77}
78
79int rpm_lmac_rx_tx_enable(void *rpmd, int lmac_id, bool enable)
80{
81 rpm_t *rpm = rpmd;
82 u64 cfg;
83
84 if (!is_lmac_valid(rpm, lmac_id))
85 return -ENODEV;
86
87 cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
88 if (enable)
89 cfg |= RPM_RX_EN | RPM_TX_EN;
90 else
91 cfg &= ~(RPM_RX_EN | RPM_TX_EN);
92 rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);
93 return 0;
94}
95
57void rpm_lmac_enadis_rx_pause_fwding(void *rpmd, int lmac_id, bool enable)96void rpm_lmac_enadis_rx_pause_fwding(void *rpmd, int lmac_id, bool enable)
58{97{
59 rpm_t *rpm = rpmd;98 rpm_t *rpm = rpmd;
@@ -252,23 +291,20 @@ int rpm_lmac_internal_loopback(void *rpmd, int lmac_id, bool enable) · 192 unmodified lines
252 if (!rpm || lmac_id >= rpm->lmac_count)291 if (!rpm || lmac_id >= rpm->lmac_count)
253 return -ENODEV;292 return -ENODEV;
254 lmac_type = rpm->mac_ops->get_lmac_type(rpm, lmac_id);293 lmac_type = rpm->mac_ops->get_lmac_type(rpm, lmac_id);
255 if (lmac_type == LMAC_MODE_100G_R) {294
256 cfg = rpm_read(rpm, lmac_id, RPMX_MTI_PCS100X_CONTROL1);295 if (lmac_type == LMAC_MODE_QSGMII || lmac_type == LMAC_MODE_SGMII) {
257 296 dev_err(&rpm->pdev->dev, "loopback not supported for LPC mode\n");
258 if (enable)297 return 0;
259 cfg |= RPMX_MTI_PCS_LBK;
260 else
261 cfg &= ~RPMX_MTI_PCS_LBK;
262 rpm_write(rpm, lmac_id, RPMX_MTI_PCS100X_CONTROL1, cfg);
263 } else {
264 cfg = rpm_read(rpm, lmac_id, RPMX_MTI_LPCSX_CONTROL1);
265 if (enable)
266 cfg |= RPMX_MTI_PCS_LBK;
267 else
268 cfg &= ~RPMX_MTI_PCS_LBK;
269 rpm_write(rpm, lmac_id, RPMX_MTI_LPCSX_CONTROL1, cfg);
270 }298 }
271 299
300 cfg = rpm_read(rpm, lmac_id, RPMX_MTI_PCS100X_CONTROL1);
301
302 if (enable)
303 cfg |= RPMX_MTI_PCS_LBK;
304 else
305 cfg &= ~RPMX_MTI_PCS_LBK;
306 rpm_write(rpm, lmac_id, RPMX_MTI_PCS100X_CONTROL1, cfg);
307
272 return 0;308 return 0;
273}309}
274 310
drivers/net/ethernet/marvell/octeontx2/af/rpm.h+4−0
@@ -43,6 +43,8 @@ · 42 unmodified lines
43#define RPMX_MTI_STAT_DATA_HI_CDC 0x1003843#define RPMX_MTI_STAT_DATA_HI_CDC 0x10038
44 44
45#define RPM_LMAC_FWI 0xa45#define RPM_LMAC_FWI 0xa
46#define RPM_TX_EN BIT_ULL(0)
47#define RPM_RX_EN BIT_ULL(1)
46 48
47/* Function Declarations */49/* Function Declarations */
48int rpm_get_nr_lmacs(void *rpmd);50int rpm_get_nr_lmacs(void *rpmd);
@@ -57,4 +59,6 @@ int rpm_lmac_enadis_pause_frm(void *rpmd, int lmac_id, u8 tx_pause, · 8 unmodified lines
57int rpm_get_tx_stats(void *rpmd, int lmac_id, int idx, u64 *tx_stat);59int rpm_get_tx_stats(void *rpmd, int lmac_id, int idx, u64 *tx_stat);
58int rpm_get_rx_stats(void *rpmd, int lmac_id, int idx, u64 *rx_stat);60int rpm_get_rx_stats(void *rpmd, int lmac_id, int idx, u64 *rx_stat);
59void rpm_lmac_ptp_config(void *rpmd, int lmac_id, bool enable);61void rpm_lmac_ptp_config(void *rpmd, int lmac_id, bool enable);
62int rpm_lmac_rx_tx_enable(void *rpmd, int lmac_id, bool enable);
63int rpm_lmac_tx_enable(void *rpmd, int lmac_id, bool enable);
60#endif /* RPM_H */64#endif /* RPM_H */
drivers/net/ethernet/marvell/octeontx2/af/rvu.c+5−2
@@ -520,8 +520,11 @@ static void rvu_block_reset(struct rvu *rvu, int blkaddr, u64 rst_reg) · 519 unmodified lines
520 520
521 rvu_write64(rvu, blkaddr, rst_reg, BIT_ULL(0));521 rvu_write64(rvu, blkaddr, rst_reg, BIT_ULL(0));
522 err = rvu_poll_reg(rvu, blkaddr, rst_reg, BIT_ULL(63), true);522 err = rvu_poll_reg(rvu, blkaddr, rst_reg, BIT_ULL(63), true);
523 if (err)523 if (err) {
524 dev_err(rvu->dev, "HW block:%d reset failed\n", blkaddr);524 dev_err(rvu->dev, "HW block:%d reset timeout retrying again\n", blkaddr);
525 while (rvu_poll_reg(rvu, blkaddr, rst_reg, BIT_ULL(63), true) == -EBUSY)
526 ;
527 }
525}528}
526 529
527static void rvu_reset_all_blocks(struct rvu *rvu)530static void rvu_reset_all_blocks(struct rvu *rvu)
drivers/net/ethernet/marvell/octeontx2/af/rvu.h+1−0
@@ -806,6 +806,7 @@ bool is_mac_feature_supported(struct rvu *rvu, int pf, int feature); · 805 unmodified lines
806u32 rvu_cgx_get_fifolen(struct rvu *rvu);806u32 rvu_cgx_get_fifolen(struct rvu *rvu);
807void *rvu_first_cgx_pdata(struct rvu *rvu);807void *rvu_first_cgx_pdata(struct rvu *rvu);
808int cgxlmac_to_pf(struct rvu *rvu, int cgx_id, int lmac_id);808int cgxlmac_to_pf(struct rvu *rvu, int cgx_id, int lmac_id);
809int rvu_cgx_config_tx(void *cgxd, int lmac_id, bool enable);
809 810
810int npc_get_nixlf_mcam_index(struct npc_mcam *mcam, u16 pcifunc, int nixlf,811int npc_get_nixlf_mcam_index(struct npc_mcam *mcam, u16 pcifunc, int nixlf,
811 int type);812 int type);
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c+12−2
@@ -441,16 +441,26 @@ void rvu_cgx_enadis_rx_bp(struct rvu *rvu, int pf, bool enable) · 440 unmodified lines
441int rvu_cgx_config_rxtx(struct rvu *rvu, u16 pcifunc, bool start)441int rvu_cgx_config_rxtx(struct rvu *rvu, u16 pcifunc, bool start)
442{442{
443 int pf = rvu_get_pf(pcifunc);443 int pf = rvu_get_pf(pcifunc);
444 struct mac_ops *mac_ops;
444 u8 cgx_id, lmac_id;445 u8 cgx_id, lmac_id;
446 void *cgxd;
445 447
446 if (!is_cgx_config_permitted(rvu, pcifunc))448 if (!is_cgx_config_permitted(rvu, pcifunc))
447 return LMAC_AF_ERR_PERM_DENIED;449 return LMAC_AF_ERR_PERM_DENIED;
448 450
449 rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);451 rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
452 cgxd = rvu_cgx_pdata(cgx_id, rvu);
453 mac_ops = get_mac_ops(cgxd);
454
455 return mac_ops->mac_rx_tx_enable(cgxd, lmac_id, start);
456}
450 457
451 cgx_lmac_rx_tx_enable(rvu_cgx_pdata(cgx_id, rvu), lmac_id, start);458int rvu_cgx_config_tx(void *cgxd, int lmac_id, bool enable)
459{
460 struct mac_ops *mac_ops;
452 461
453 return 0;462 mac_ops = get_mac_ops(cgxd);
463 return mac_ops->mac_tx_enable(cgxd, lmac_id, enable);
454}464}
455 465
456void rvu_cgx_disable_dmac_entries(struct rvu *rvu, u16 pcifunc)466void rvu_cgx_disable_dmac_entries(struct rvu *rvu, u16 pcifunc)
drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c+2−0
@@ -1224,6 +1224,8 @@ static void print_nix_cn10k_sq_ctx(struct seq_file *m, · 1223 unmodified lines
1224 seq_printf(m, "W3: head_offset\t\t\t%d\nW3: smenq_next_sqb_vld\t\t%d\n\n",1224 seq_printf(m, "W3: head_offset\t\t\t%d\nW3: smenq_next_sqb_vld\t\t%d\n\n",
1225 sq_ctx->head_offset, sq_ctx->smenq_next_sqb_vld);1225 sq_ctx->head_offset, sq_ctx->smenq_next_sqb_vld);
1226 1226
1227 seq_printf(m, "W3: smq_next_sq_vld\t\t%d\nW3: smq_pend\t\t\t%d\n",
1228 sq_ctx->smq_next_sq_vld, sq_ctx->smq_pend);
1227 seq_printf(m, "W4: next_sqb \t\t\t%llx\n\n", sq_ctx->next_sqb);1229 seq_printf(m, "W4: next_sqb \t\t\t%llx\n\n", sq_ctx->next_sqb);
1228 seq_printf(m, "W5: tail_sqb \t\t\t%llx\n\n", sq_ctx->tail_sqb);1230 seq_printf(m, "W5: tail_sqb \t\t\t%llx\n\n", sq_ctx->tail_sqb);
1229 seq_printf(m, "W6: smenq_sqb \t\t\t%llx\n\n", sq_ctx->smenq_sqb);1231 seq_printf(m, "W6: smenq_sqb \t\t\t%llx\n\n", sq_ctx->smenq_sqb);
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c+10−10
@@ -512,11 +512,11 @@ static int rvu_nix_get_bpid(struct rvu *rvu, struct nix_bp_cfg_req *req, · 511 unmodified lines
512 cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST);512 cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST);
513 lmac_chan_cnt = cfg & 0xFF;513 lmac_chan_cnt = cfg & 0xFF;
514 514
515 cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST1);
516 sdp_chan_cnt = cfg & 0xFFF;
517
518 cgx_bpid_cnt = hw->cgx_links * lmac_chan_cnt;515 cgx_bpid_cnt = hw->cgx_links * lmac_chan_cnt;
519 lbk_bpid_cnt = hw->lbk_links * ((cfg >> 16) & 0xFF);516 lbk_bpid_cnt = hw->lbk_links * ((cfg >> 16) & 0xFF);
517
518 cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST1);
519 sdp_chan_cnt = cfg & 0xFFF;
520 sdp_bpid_cnt = hw->sdp_links * sdp_chan_cnt;520 sdp_bpid_cnt = hw->sdp_links * sdp_chan_cnt;
521 521
522 pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);522 pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);
@@ -2068,8 +2068,8 @@ static int nix_smq_flush(struct rvu *rvu, int blkaddr, · 1545 unmodified lines
2068 /* enable cgx tx if disabled */2068 /* enable cgx tx if disabled */
2069 if (is_pf_cgxmapped(rvu, pf)) {2069 if (is_pf_cgxmapped(rvu, pf)) {
2070 rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);2070 rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
2071 restore_tx_en = !cgx_lmac_tx_enable(rvu_cgx_pdata(cgx_id, rvu),2071 restore_tx_en = !rvu_cgx_config_tx(rvu_cgx_pdata(cgx_id, rvu),
2072 lmac_id, true);2072 lmac_id, true);
2073 }2073 }
2074 2074
2075 cfg = rvu_read64(rvu, blkaddr, NIX_AF_SMQX_CFG(smq));2075 cfg = rvu_read64(rvu, blkaddr, NIX_AF_SMQX_CFG(smq));
@@ -2092,7 +2092,7 @@ static int nix_smq_flush(struct rvu *rvu, int blkaddr, · 16 unmodified lines
2092 rvu_cgx_enadis_rx_bp(rvu, pf, true);2092 rvu_cgx_enadis_rx_bp(rvu, pf, true);
2093 /* restore cgx tx state */2093 /* restore cgx tx state */
2094 if (restore_tx_en)2094 if (restore_tx_en)
2095 cgx_lmac_tx_enable(rvu_cgx_pdata(cgx_id, rvu), lmac_id, false);2095 rvu_cgx_config_tx(rvu_cgx_pdata(cgx_id, rvu), lmac_id, false);
2096 return err;2096 return err;
2097}2097}
2098 2098
@@ -3878,7 +3878,7 @@ nix_config_link_credits(struct rvu *rvu, int blkaddr, int link, · 1779 unmodified lines
3878 /* Enable cgx tx if disabled for credits to be back */3878 /* Enable cgx tx if disabled for credits to be back */
3879 if (is_pf_cgxmapped(rvu, pf)) {3879 if (is_pf_cgxmapped(rvu, pf)) {
3880 rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);3880 rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
3881 restore_tx_en = !cgx_lmac_tx_enable(rvu_cgx_pdata(cgx_id, rvu),3881 restore_tx_en = !rvu_cgx_config_tx(rvu_cgx_pdata(cgx_id, rvu),
3882 lmac_id, true);3882 lmac_id, true);
3883 }3883 }
3884 3884
@@ -3891,8 +3891,8 @@ nix_config_link_credits(struct rvu *rvu, int blkaddr, int link, · 6 unmodified lines
3891 NIX_AF_TL1X_SW_XOFF(schq), BIT_ULL(0));3891 NIX_AF_TL1X_SW_XOFF(schq), BIT_ULL(0));
3892 }3892 }
3893 3893
3894 rc = -EBUSY;3894 rc = NIX_AF_ERR_LINK_CREDITS;
3895 poll_tmo = jiffies + usecs_to_jiffies(10000);3895 poll_tmo = jiffies + usecs_to_jiffies(200000);
3896 /* Wait for credits to return */3896 /* Wait for credits to return */
3897 do {3897 do {
3898 if (time_after(jiffies, poll_tmo))3898 if (time_after(jiffies, poll_tmo))
@@ -3918,7 +3918,7 @@ exit: · 19 unmodified lines
3918 3918
3919 /* Restore state of cgx tx */3919 /* Restore state of cgx tx */
3920 if (restore_tx_en)3920 if (restore_tx_en)
3921 cgx_lmac_tx_enable(rvu_cgx_pdata(cgx_id, rvu), lmac_id, false);3921 rvu_cgx_config_tx(rvu_cgx_pdata(cgx_id, rvu), lmac_id, false);
3922 3922
3923 mutex_unlock(&rvu->rsrc_lock);3923 mutex_unlock(&rvu->rsrc_lock);
3924 return rc;3924 return rc;
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c+19−3
@@ -402,6 +402,7 @@ static void npc_fixup_vf_rule(struct rvu *rvu, struct npc_mcam *mcam, · 401 unmodified lines
402 int blkaddr, int index, struct mcam_entry *entry,402 int blkaddr, int index, struct mcam_entry *entry,
403 bool *enable)403 bool *enable)
404{404{
405 struct rvu_npc_mcam_rule *rule;
405 u16 owner, target_func;406 u16 owner, target_func;
406 struct rvu_pfvf *pfvf;407 struct rvu_pfvf *pfvf;
407 u64 rx_action;408 u64 rx_action;
@@ -423,6 +424,12 @@ static void npc_fixup_vf_rule(struct rvu *rvu, struct npc_mcam *mcam, · 15 unmodified lines
423 test_bit(NIXLF_INITIALIZED, &pfvf->flags)))424 test_bit(NIXLF_INITIALIZED, &pfvf->flags)))
424 *enable = false;425 *enable = false;
425 426
427 /* fix up not needed for the rules added by user(ntuple filters) */
428 list_for_each_entry(rule, &mcam->mcam_rules, list) {
429 if (rule->entry == index)
430 return;
431 }
432
426 /* copy VF default entry action to the VF mcam entry */433 /* copy VF default entry action to the VF mcam entry */
427 rx_action = npc_get_default_entry_action(rvu, mcam, blkaddr,434 rx_action = npc_get_default_entry_action(rvu, mcam, blkaddr,
428 target_func);435 target_func);
@@ -489,8 +496,8 @@ static void npc_config_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam, · 60 unmodified lines
489 }496 }
490 497
491 /* PF installing VF rule */498 /* PF installing VF rule */
492 if (intf == NIX_INTF_RX && actindex < mcam->bmap_entries)499 if (is_npc_intf_rx(intf) && actindex < mcam->bmap_entries)
493 npc_fixup_vf_rule(rvu, mcam, blkaddr, index, entry, &enable);500 npc_fixup_vf_rule(rvu, mcam, blkaddr, actindex, entry, &enable);
494 501
495 /* Set 'action' */502 /* Set 'action' */
496 rvu_write64(rvu, blkaddr,503 rvu_write64(rvu, blkaddr,
@@ -916,7 +923,8 @@ static void npc_update_vf_flow_entry(struct rvu *rvu, struct npc_mcam *mcam, · 419 unmodified lines
916 int blkaddr, u16 pcifunc, u64 rx_action)923 int blkaddr, u16 pcifunc, u64 rx_action)
917{924{
918 int actindex, index, bank, entry;925 int actindex, index, bank, entry;
919 bool enable;926 struct rvu_npc_mcam_rule *rule;
927 bool enable, update;
920 928
921 if (!(pcifunc & RVU_PFVF_FUNC_MASK))929 if (!(pcifunc & RVU_PFVF_FUNC_MASK))
922 return;930 return;
@@ -924,6 +932,14 @@ static void npc_update_vf_flow_entry(struct rvu *rvu, struct npc_mcam *mcam, · 1 unmodified line
924 mutex_lock(&mcam->lock);932 mutex_lock(&mcam->lock);
925 for (index = 0; index < mcam->bmap_entries; index++) {933 for (index = 0; index < mcam->bmap_entries; index++) {
926 if (mcam->entry2target_pffunc[index] == pcifunc) {934 if (mcam->entry2target_pffunc[index] == pcifunc) {
935 update = true;
936 /* update not needed for the rules added via ntuple filters */
937 list_for_each_entry(rule, &mcam->mcam_rules, list) {
938 if (rule->entry == index)
939 update = false;
940 }
941 if (!update)
942 continue;
927 bank = npc_get_bank(mcam, index);943 bank = npc_get_bank(mcam, index);
928 actindex = index;944 actindex = index;
929 entry = index & (mcam->banksize - 1);945 entry = index & (mcam->banksize - 1);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c+12−8
@@ -1098,14 +1098,6 @@ find_rule: · 1097 unmodified lines
1098 write_req.cntr = rule->cntr;1098 write_req.cntr = rule->cntr;
1099 }1099 }
1100 1100
1101 err = rvu_mbox_handler_npc_mcam_write_entry(rvu, &write_req,
1102 &write_rsp);
1103 if (err) {
1104 rvu_mcam_remove_counter_from_rule(rvu, owner, rule);
1105 if (new)
1106 kfree(rule);
1107 return err;
1108 }
1109 /* update rule */1101 /* update rule */
1110 memcpy(&rule->packet, &dummy.packet, sizeof(rule->packet));1102 memcpy(&rule->packet, &dummy.packet, sizeof(rule->packet));
1111 memcpy(&rule->mask, &dummy.mask, sizeof(rule->mask));1103 memcpy(&rule->mask, &dummy.mask, sizeof(rule->mask));
@@ -1132,6 +1124,18 @@ find_rule: · 20 unmodified lines
1132 if (req->default_rule)1124 if (req->default_rule)
1133 pfvf->def_ucast_rule = rule;1125 pfvf->def_ucast_rule = rule;
1134 1126
1127 /* write to mcam entry registers */
1128 err = rvu_mbox_handler_npc_mcam_write_entry(rvu, &write_req,
1129 &write_rsp);
1130 if (err) {
1131 rvu_mcam_remove_counter_from_rule(rvu, owner, rule);
1132 if (new) {
1133 list_del(&rule->list);
1134 kfree(rule);
1135 }
1136 return err;
1137 }
1138
1135 /* VF's MAC address is being changed via PF */1139 /* VF's MAC address is being changed via PF */
1136 if (pf_set_vfs_mac) {1140 if (pf_set_vfs_mac) {
1137 ether_addr_copy(pfvf->default_mac, req->packet.dmac);1141 ether_addr_copy(pfvf->default_mac, req->packet.dmac);
drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h+1−0
@@ -603,6 +603,7 @@ static inline void __cn10k_aura_freeptr(struct otx2_nic *pfvf, u64 aura, · 602 unmodified lines
603 size++;603 size++;
604 tar_addr |= ((size - 1) & 0x7) << 4;604 tar_addr |= ((size - 1) & 0x7) << 4;
605 }605 }
606 dma_wmb();
606 memcpy((u64 *)lmt_info->lmt_addr, ptrs, sizeof(u64) * num_ptrs);607 memcpy((u64 *)lmt_info->lmt_addr, ptrs, sizeof(u64) * num_ptrs);
607 /* Perform LMTST flush */608 /* Perform LMTST flush */
608 cn10k_lmt_flush(val, tar_addr);609 cn10k_lmt_flush(val, tar_addr);
drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c+6−1
@@ -394,7 +394,12 @@ static int otx2_forward_vf_mbox_msgs(struct otx2_nic *pf, · 393 unmodified lines
394 dst_mdev->msg_size = mbox_hdr->msg_size;394 dst_mdev->msg_size = mbox_hdr->msg_size;
395 dst_mdev->num_msgs = num_msgs;395 dst_mdev->num_msgs = num_msgs;
396 err = otx2_sync_mbox_msg(dst_mbox);396 err = otx2_sync_mbox_msg(dst_mbox);
397 if (err) {397 /* Error code -EIO indicate there is a communication failure
398 * to the AF. Rest of the error codes indicate that AF processed
399 * VF messages and set the error codes in response messages
400 * (if any) so simply forward responses to VF.
401 */
402 if (err == -EIO) {
398 dev_warn(pf->dev,403 dev_warn(pf->dev,
399 "AF not responding to VF%d messages\n", vf);404 "AF not responding to VF%d messages\n", vf);
400 /* restore PF mbase and exit */405 /* restore PF mbase and exit */
drivers/net/ethernet/mellanox/mlx5/core/en.h+3−3
@@ -224,7 +224,7 @@ static inline int mlx5e_get_max_num_channels(struct mlx5_core_dev *mdev) · 223 unmodified lines
224struct mlx5e_tx_wqe {224struct mlx5e_tx_wqe {
225 struct mlx5_wqe_ctrl_seg ctrl;225 struct mlx5_wqe_ctrl_seg ctrl;
226 struct mlx5_wqe_eth_seg eth;226 struct mlx5_wqe_eth_seg eth;
227 struct mlx5_wqe_data_seg data[0];227 struct mlx5_wqe_data_seg data[];
228};228};
229 229
230struct mlx5e_rx_wqe_ll {230struct mlx5e_rx_wqe_ll {
@@ -241,8 +241,8 @@ struct mlx5e_umr_wqe { · 10 unmodified lines
241 struct mlx5_wqe_umr_ctrl_seg uctrl;241 struct mlx5_wqe_umr_ctrl_seg uctrl;
242 struct mlx5_mkey_seg mkc;242 struct mlx5_mkey_seg mkc;
243 union {243 union {
244 struct mlx5_mtt inline_mtts[0];244 DECLARE_FLEX_ARRAY(struct mlx5_mtt, inline_mtts);
245 struct mlx5_klm inline_klms[0];245 DECLARE_FLEX_ARRAY(struct mlx5_klm, inline_klms);
246 };246 };
247};247};
248 248
drivers/net/ethernet/mellanox/mlx5/core/en/qos.c+2−1
@@ -570,7 +570,8 @@ static int mlx5e_htb_convert_rate(struct mlx5e_priv *priv, u64 rate, · 569 unmodified lines
570 570
571static void mlx5e_htb_convert_ceil(struct mlx5e_priv *priv, u64 ceil, u32 *max_average_bw)571static void mlx5e_htb_convert_ceil(struct mlx5e_priv *priv, u64 ceil, u32 *max_average_bw)
572{572{
573 *max_average_bw = div_u64(ceil, BYTES_IN_MBIT);573 /* Hardware treats 0 as "unlimited", set at least 1. */
574 *max_average_bw = max_t(u32, div_u64(ceil, BYTES_IN_MBIT), 1);
574 575
575 qos_dbg(priv->mdev, "Convert: ceil %llu -> max_average_bw %u\n",576 qos_dbg(priv->mdev, "Convert: ceil %llu -> max_average_bw %u\n",
576 ceil, *max_average_bw);577 ceil, *max_average_bw);
drivers/net/ethernet/mellanox/mlx5/core/en/rep/bond.c+14−18
@@ -183,18 +183,7 @@ void mlx5e_rep_bond_unslave(struct mlx5_eswitch *esw, · 182 unmodified lines
183 183
184static bool mlx5e_rep_is_lag_netdev(struct net_device *netdev)184static bool mlx5e_rep_is_lag_netdev(struct net_device *netdev)
185{185{
186 struct mlx5e_rep_priv *rpriv;186 return netif_is_lag_port(netdev) && mlx5e_eswitch_vf_rep(netdev);
187 struct mlx5e_priv *priv;
188
189 /* A given netdev is not a representor or not a slave of LAG configuration */
190 if (!mlx5e_eswitch_rep(netdev) || !netif_is_lag_port(netdev))
191 return false;
192
193 priv = netdev_priv(netdev);
194 rpriv = priv->ppriv;
195
196 /* Egress acl forward to vport is supported only non-uplink representor */
197 return rpriv->rep->vport != MLX5_VPORT_UPLINK;
198}187}
199 188
200static void mlx5e_rep_changelowerstate_event(struct net_device *netdev, void *ptr)189static void mlx5e_rep_changelowerstate_event(struct net_device *netdev, void *ptr)
@@ -210,9 +199,6 @@ static void mlx5e_rep_changelowerstate_event(struct net_device *netdev, void *pt · 9 unmodified lines
210 u16 fwd_vport_num;199 u16 fwd_vport_num;
211 int err;200 int err;
212 201
213 if (!mlx5e_rep_is_lag_netdev(netdev))
214 return;
215
216 info = ptr;202 info = ptr;
217 lag_info = info->lower_state_info;203 lag_info = info->lower_state_info;
218 /* This is not an event of a representor becoming active slave */204 /* This is not an event of a representor becoming active slave */
@@ -266,9 +252,6 @@ static void mlx5e_rep_changeupper_event(struct net_device *netdev, void *ptr) · 47 unmodified lines
266 struct net_device *lag_dev;252 struct net_device *lag_dev;
267 struct mlx5e_priv *priv;253 struct mlx5e_priv *priv;
268 254
269 if (!mlx5e_rep_is_lag_netdev(netdev))
270 return;
271
272 priv = netdev_priv(netdev);255 priv = netdev_priv(netdev);
273 rpriv = priv->ppriv;256 rpriv = priv->ppriv;
274 lag_dev = info->upper_dev;257 lag_dev = info->upper_dev;
@@ -293,6 +276,19 @@ static int mlx5e_rep_esw_bond_netevent(struct notifier_block *nb, · 18 unmodified lines
293 unsigned long event, void *ptr)276 unsigned long event, void *ptr)
294{277{
295 struct net_device *netdev = netdev_notifier_info_to_dev(ptr);278 struct net_device *netdev = netdev_notifier_info_to_dev(ptr);
279 struct mlx5e_rep_priv *rpriv;
280 struct mlx5e_rep_bond *bond;
281 struct mlx5e_priv *priv;
282
283 if (!mlx5e_rep_is_lag_netdev(netdev))
284 return NOTIFY_DONE;
285
286 bond = container_of(nb, struct mlx5e_rep_bond, nb);
287 priv = netdev_priv(netdev);
288 rpriv = mlx5_eswitch_get_uplink_priv(priv->mdev->priv.eswitch, REP_ETH);
289 /* Verify VF representor is on the same device of the bond handling the netevent. */
290 if (rpriv->uplink_priv.bond != bond)
291 return NOTIFY_DONE;
296 292
297 switch (event) {293 switch (event) {
298 case NETDEV_CHANGELOWERSTATE:294 case NETDEV_CHANGELOWERSTATE:
drivers/net/ethernet/mellanox/mlx5/core/en/rep/bridge.c+4−2
@@ -491,7 +491,7 @@ void mlx5e_rep_bridge_init(struct mlx5e_priv *priv) · 490 unmodified lines
491 }491 }
492 492
493 br_offloads->netdev_nb.notifier_call = mlx5_esw_bridge_switchdev_port_event;493 br_offloads->netdev_nb.notifier_call = mlx5_esw_bridge_switchdev_port_event;
494 err = register_netdevice_notifier(&br_offloads->netdev_nb);494 err = register_netdevice_notifier_net(&init_net, &br_offloads->netdev_nb);
495 if (err) {495 if (err) {
496 esw_warn(mdev, "Failed to register bridge offloads netdevice notifier (err=%d)\n",496 esw_warn(mdev, "Failed to register bridge offloads netdevice notifier (err=%d)\n",
497 err);497 err);
@@ -509,7 +509,9 @@ err_register_swdev_blk: · 11 unmodified lines
509err_register_swdev:509err_register_swdev:
510 destroy_workqueue(br_offloads->wq);510 destroy_workqueue(br_offloads->wq);
511err_alloc_wq:511err_alloc_wq:
512 rtnl_lock();
512 mlx5_esw_bridge_cleanup(esw);513 mlx5_esw_bridge_cleanup(esw);
514 rtnl_unlock();
513}515}
514 516
515void mlx5e_rep_bridge_cleanup(struct mlx5e_priv *priv)517void mlx5e_rep_bridge_cleanup(struct mlx5e_priv *priv)
@@ -524,7 +526,7 @@ void mlx5e_rep_bridge_cleanup(struct mlx5e_priv *priv) · 8 unmodified lines
524 return;526 return;
525 527
526 cancel_delayed_work_sync(&br_offloads->update_work);528 cancel_delayed_work_sync(&br_offloads->update_work);
527 unregister_netdevice_notifier(&br_offloads->netdev_nb);529 unregister_netdevice_notifier_net(&init_net, &br_offloads->netdev_nb);
528 unregister_switchdev_blocking_notifier(&br_offloads->nb_blk);530 unregister_switchdev_blocking_notifier(&br_offloads->nb_blk);
529 unregister_switchdev_notifier(&br_offloads->nb);531 unregister_switchdev_notifier(&br_offloads->nb);
530 destroy_workqueue(br_offloads->wq);532 destroy_workqueue(br_offloads->wq);
drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h+5−0
@@ -167,6 +167,11 @@ static inline u16 mlx5e_txqsq_get_next_pi(struct mlx5e_txqsq *sq, u16 size) · 166 unmodified lines
167 return pi;167 return pi;
168}168}
169 169
170static inline u16 mlx5e_shampo_get_cqe_header_index(struct mlx5e_rq *rq, struct mlx5_cqe64 *cqe)
171{
172 return be16_to_cpu(cqe->shampo.header_entry_index) & (rq->mpwqe.shampo->hd_per_wq - 1);
173}
174
170struct mlx5e_shampo_umr {175struct mlx5e_shampo_umr {
171 u16 len;176 u16 len;
172};177};
drivers/net/ethernet/mellanox/mlx5/core/en/xdp.c+3−1
@@ -341,8 +341,10 @@ mlx5e_xmit_xdp_frame(struct mlx5e_xdpsq *sq, struct mlx5e_xmit_data *xdptxd, · 340 unmodified lines
341 341
342 /* copy the inline part if required */342 /* copy the inline part if required */
343 if (sq->min_inline_mode != MLX5_INLINE_MODE_NONE) {343 if (sq->min_inline_mode != MLX5_INLINE_MODE_NONE) {
344 memcpy(eseg->inline_hdr.start, xdptxd->data, MLX5E_XDP_MIN_INLINE);344 memcpy(eseg->inline_hdr.start, xdptxd->data, sizeof(eseg->inline_hdr.start));
345 eseg->inline_hdr.sz = cpu_to_be16(MLX5E_XDP_MIN_INLINE);345 eseg->inline_hdr.sz = cpu_to_be16(MLX5E_XDP_MIN_INLINE);
346 memcpy(dseg, xdptxd->data + sizeof(eseg->inline_hdr.start),
347 MLX5E_XDP_MIN_INLINE - sizeof(eseg->inline_hdr.start));
346 dma_len -= MLX5E_XDP_MIN_INLINE;348 dma_len -= MLX5E_XDP_MIN_INLINE;
347 dma_addr += MLX5E_XDP_MIN_INLINE;349 dma_addr += MLX5E_XDP_MIN_INLINE;
348 dseg++;350 dseg++;
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c+11−2
@@ -157,11 +157,20 @@ static void mlx5e_ipsec_set_swp(struct sk_buff *skb, · 156 unmodified lines
157 /* Tunnel mode */157 /* Tunnel mode */
158 if (mode == XFRM_MODE_TUNNEL) {158 if (mode == XFRM_MODE_TUNNEL) {
159 eseg->swp_inner_l3_offset = skb_inner_network_offset(skb) / 2;159 eseg->swp_inner_l3_offset = skb_inner_network_offset(skb) / 2;
160 eseg->swp_inner_l4_offset = skb_inner_transport_offset(skb) / 2;
161 if (xo->proto == IPPROTO_IPV6)160 if (xo->proto == IPPROTO_IPV6)
162 eseg->swp_flags |= MLX5_ETH_WQE_SWP_INNER_L3_IPV6;161 eseg->swp_flags |= MLX5_ETH_WQE_SWP_INNER_L3_IPV6;
163 if (inner_ip_hdr(skb)->protocol == IPPROTO_UDP)162
163 switch (xo->inner_ipproto) {
164 case IPPROTO_UDP:
164 eseg->swp_flags |= MLX5_ETH_WQE_SWP_INNER_L4_UDP;165 eseg->swp_flags |= MLX5_ETH_WQE_SWP_INNER_L4_UDP;
166 fallthrough;
167 case IPPROTO_TCP:
168 /* IP | ESP | IP | [TCP | UDP] */
169 eseg->swp_inner_l4_offset = skb_inner_transport_offset(skb) / 2;
170 break;
171 default:
172 break;
173 }
165 return;174 return;
166 }175 }
167 176
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.h+6−3
@@ -131,14 +131,17 @@ static inline bool · 130 unmodified lines
131mlx5e_ipsec_txwqe_build_eseg_csum(struct mlx5e_txqsq *sq, struct sk_buff *skb,131mlx5e_ipsec_txwqe_build_eseg_csum(struct mlx5e_txqsq *sq, struct sk_buff *skb,
132 struct mlx5_wqe_eth_seg *eseg)132 struct mlx5_wqe_eth_seg *eseg)
133{133{
134 struct xfrm_offload *xo = xfrm_offload(skb);134 u8 inner_ipproto;
135 135
136 if (!mlx5e_ipsec_eseg_meta(eseg))136 if (!mlx5e_ipsec_eseg_meta(eseg))
137 return false;137 return false;
138 138
139 eseg->cs_flags = MLX5_ETH_WQE_L3_CSUM;139 eseg->cs_flags = MLX5_ETH_WQE_L3_CSUM;
140 if (xo->inner_ipproto) {140 inner_ipproto = xfrm_offload(skb)->inner_ipproto;
141 eseg->cs_flags |= MLX5_ETH_WQE_L4_INNER_CSUM | MLX5_ETH_WQE_L3_INNER_CSUM;141 if (inner_ipproto) {
142 eseg->cs_flags |= MLX5_ETH_WQE_L3_INNER_CSUM;
143 if (inner_ipproto == IPPROTO_TCP || inner_ipproto == IPPROTO_UDP)
144 eseg->cs_flags |= MLX5_ETH_WQE_L4_INNER_CSUM;
142 } else if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {145 } else if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
143 eseg->cs_flags |= MLX5_ETH_WQE_L4_CSUM;146 eseg->cs_flags |= MLX5_ETH_WQE_L4_CSUM;
144 sq->stats->csum_partial_inner++;147 sq->stats->csum_partial_inner++;
drivers/net/ethernet/mellanox/mlx5/core/en_rx.c+19−11
@@ -1117,7 +1117,7 @@ static void mlx5e_shampo_update_ipv6_udp_hdr(struct mlx5e_rq *rq, struct ipv6hdr · 1116 unmodified lines
1117static void mlx5e_shampo_update_fin_psh_flags(struct mlx5e_rq *rq, struct mlx5_cqe64 *cqe,1117static void mlx5e_shampo_update_fin_psh_flags(struct mlx5e_rq *rq, struct mlx5_cqe64 *cqe,
1118 struct tcphdr *skb_tcp_hd)1118 struct tcphdr *skb_tcp_hd)
1119{1119{
1120 u16 header_index = be16_to_cpu(cqe->shampo.header_entry_index);1120 u16 header_index = mlx5e_shampo_get_cqe_header_index(rq, cqe);
1121 struct tcphdr *last_tcp_hd;1121 struct tcphdr *last_tcp_hd;
1122 void *last_hd_addr;1122 void *last_hd_addr;
1123 1123
@@ -1871,7 +1871,7 @@ mlx5e_skb_from_cqe_mpwrq_linear(struct mlx5e_rq *rq, struct mlx5e_mpw_info *wi, · 747 unmodified lines
1871 return skb;1871 return skb;
1872}1872}
1873 1873
1874static void1874static struct sk_buff *
1875mlx5e_skb_from_cqe_shampo(struct mlx5e_rq *rq, struct mlx5e_mpw_info *wi,1875mlx5e_skb_from_cqe_shampo(struct mlx5e_rq *rq, struct mlx5e_mpw_info *wi,
1876 struct mlx5_cqe64 *cqe, u16 header_index)1876 struct mlx5_cqe64 *cqe, u16 header_index)
1877{1877{
@@ -1895,7 +1895,7 @@ mlx5e_skb_from_cqe_shampo(struct mlx5e_rq *rq, struct mlx5e_mpw_info *wi, · 17 unmodified lines
1895 skb = mlx5e_build_linear_skb(rq, hdr, frag_size, rx_headroom, head_size);1895 skb = mlx5e_build_linear_skb(rq, hdr, frag_size, rx_headroom, head_size);
1896 1896
1897 if (unlikely(!skb))1897 if (unlikely(!skb))
1898 return;1898 return NULL;
1899 1899
1900 /* queue up for recycling/reuse */1900 /* queue up for recycling/reuse */
1901 page_ref_inc(head->page);1901 page_ref_inc(head->page);
@@ -1907,7 +1907,7 @@ mlx5e_skb_from_cqe_shampo(struct mlx5e_rq *rq, struct mlx5e_mpw_info *wi, · 5 unmodified lines
1907 ALIGN(head_size, sizeof(long)));1907 ALIGN(head_size, sizeof(long)));
1908 if (unlikely(!skb)) {1908 if (unlikely(!skb)) {
1909 rq->stats->buff_alloc_err++;1909 rq->stats->buff_alloc_err++;
1910 return;1910 return NULL;
1911 }1911 }
1912 1912
1913 prefetchw(skb->data);1913 prefetchw(skb->data);
@@ -1918,9 +1918,7 @@ mlx5e_skb_from_cqe_shampo(struct mlx5e_rq *rq, struct mlx5e_mpw_info *wi, · 4 unmodified lines
1918 skb->tail += head_size;1918 skb->tail += head_size;
1919 skb->len += head_size;1919 skb->len += head_size;
1920 }1920 }
1921 rq->hw_gro_data->skb = skb;1921 return skb;
1922 NAPI_GRO_CB(skb)->count = 1;
1923 skb_shinfo(skb)->gso_size = mpwrq_get_cqe_byte_cnt(cqe) - head_size;
1924}1922}
1925 1923
1926static void1924static void
@@ -1973,13 +1971,14 @@ mlx5e_free_rx_shampo_hd_entry(struct mlx5e_rq *rq, u16 header_index) · 46 unmodified lines
1973static void mlx5e_handle_rx_cqe_mpwrq_shampo(struct mlx5e_rq *rq, struct mlx5_cqe64 *cqe)1971static void mlx5e_handle_rx_cqe_mpwrq_shampo(struct mlx5e_rq *rq, struct mlx5_cqe64 *cqe)
1974{1972{
1975 u16 data_bcnt = mpwrq_get_cqe_byte_cnt(cqe) - cqe->shampo.header_size;1973 u16 data_bcnt = mpwrq_get_cqe_byte_cnt(cqe) - cqe->shampo.header_size;
1976 u16 header_index = be16_to_cpu(cqe->shampo.header_entry_index);1974 u16 header_index = mlx5e_shampo_get_cqe_header_index(rq, cqe);
1977 u32 wqe_offset = be32_to_cpu(cqe->shampo.data_offset);1975 u32 wqe_offset = be32_to_cpu(cqe->shampo.data_offset);
1978 u16 cstrides = mpwrq_get_cqe_consumed_strides(cqe);1976 u16 cstrides = mpwrq_get_cqe_consumed_strides(cqe);
1979 u32 data_offset = wqe_offset & (PAGE_SIZE - 1);1977 u32 data_offset = wqe_offset & (PAGE_SIZE - 1);
1980 u32 cqe_bcnt = mpwrq_get_cqe_byte_cnt(cqe);1978 u32 cqe_bcnt = mpwrq_get_cqe_byte_cnt(cqe);
1981 u16 wqe_id = be16_to_cpu(cqe->wqe_id);1979 u16 wqe_id = be16_to_cpu(cqe->wqe_id);
1982 u32 page_idx = wqe_offset >> PAGE_SHIFT;1980 u32 page_idx = wqe_offset >> PAGE_SHIFT;
1981 u16 head_size = cqe->shampo.header_size;
1983 struct sk_buff **skb = &rq->hw_gro_data->skb;1982 struct sk_buff **skb = &rq->hw_gro_data->skb;
1984 bool flush = cqe->shampo.flush;1983 bool flush = cqe->shampo.flush;
1985 bool match = cqe->shampo.match;1984 bool match = cqe->shampo.match;
@@ -2011,9 +2010,16 @@ static void mlx5e_handle_rx_cqe_mpwrq_shampo(struct mlx5e_rq *rq, struct mlx5_cq · 25 unmodified lines
2011 }2010 }
2012 2011
2013 if (!*skb) {2012 if (!*skb) {
2014 mlx5e_skb_from_cqe_shampo(rq, wi, cqe, header_index);2013 if (likely(head_size))
2014 *skb = mlx5e_skb_from_cqe_shampo(rq, wi, cqe, header_index);
2015 else
2016 *skb = mlx5e_skb_from_cqe_mpwrq_nonlinear(rq, wi, cqe_bcnt, data_offset,
2017 page_idx);
2015 if (unlikely(!*skb))2018 if (unlikely(!*skb))
2016 goto free_hd_entry;2019 goto free_hd_entry;
2020
2021 NAPI_GRO_CB(*skb)->count = 1;
2022 skb_shinfo(*skb)->gso_size = cqe_bcnt - head_size;
2017 } else {2023 } else {
2018 NAPI_GRO_CB(*skb)->count++;2024 NAPI_GRO_CB(*skb)->count++;
2019 if (NAPI_GRO_CB(*skb)->count == 2 &&2025 if (NAPI_GRO_CB(*skb)->count == 2 &&
@@ -2027,8 +2033,10 @@ static void mlx5e_handle_rx_cqe_mpwrq_shampo(struct mlx5e_rq *rq, struct mlx5_cq · 7 unmodified lines
2027 }2033 }
2028 }2034 }
2029 2035
2030 di = &wi->umr.dma_info[page_idx];2036 if (likely(head_size)) {
2031 mlx5e_fill_skb_data(*skb, rq, di, data_bcnt, data_offset);2037 di = &wi->umr.dma_info[page_idx];
2038 mlx5e_fill_skb_data(*skb, rq, di, data_bcnt, data_offset);
2039 }
2032 2040
2033 mlx5e_shampo_complete_rx_cqe(rq, cqe, cqe_bcnt, *skb);2041 mlx5e_shampo_complete_rx_cqe(rq, cqe, cqe_bcnt, *skb);
2034 if (flush)2042 if (flush)
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c+14−1
@@ -1414,7 +1414,8 @@ mlx5e_tc_add_fdb_flow(struct mlx5e_priv *priv, · 1413 unmodified lines
1414 if (err)1414 if (err)
1415 goto err_out;1415 goto err_out;
1416 1416
1417 if (!attr->chain && esw_attr->int_port) {1417 if (!attr->chain && esw_attr->int_port &&
1418 attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
1418 /* If decap route device is internal port, change the1419 /* If decap route device is internal port, change the
1419 * source vport value in reg_c0 back to uplink just in1420 * source vport value in reg_c0 back to uplink just in
1420 * case the rule performs goto chain > 0. If we have a miss1421 * case the rule performs goto chain > 0. If we have a miss
@@ -3191,6 +3192,18 @@ actions_match_supported(struct mlx5e_priv *priv, · 1770 unmodified lines
3191 return false;3192 return false;
3192 }3193 }
3193 3194
3195 if (!(~actions &
3196 (MLX5_FLOW_CONTEXT_ACTION_FWD_DEST | MLX5_FLOW_CONTEXT_ACTION_DROP))) {
3197 NL_SET_ERR_MSG_MOD(extack, "Rule cannot support forward+drop action");
3198 return false;
3199 }
3200
3201 if (actions & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR &&
3202 actions & MLX5_FLOW_CONTEXT_ACTION_DROP) {
3203 NL_SET_ERR_MSG_MOD(extack, "Drop with modify header action is not supported");
3204 return false;
3205 }
3206
3194 if (actions & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR &&3207 if (actions & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR &&
3195 !modify_header_match_supported(priv, &parse_attr->spec, flow_action,3208 !modify_header_match_supported(priv, &parse_attr->spec, flow_action,
3196 actions, ct_flow, ct_clear, extack))3209 actions, ct_flow, ct_clear, extack))
drivers/net/ethernet/mellanox/mlx5/core/en_tx.c+1−1
@@ -208,7 +208,7 @@ static inline void mlx5e_insert_vlan(void *start, struct sk_buff *skb, u16 ihs) · 207 unmodified lines
208 int cpy1_sz = 2 * ETH_ALEN;208 int cpy1_sz = 2 * ETH_ALEN;
209 int cpy2_sz = ihs - cpy1_sz;209 int cpy2_sz = ihs - cpy1_sz;
210 210
211 memcpy(vhdr, skb->data, cpy1_sz);211 memcpy(&vhdr->addrs, skb->data, cpy1_sz);
212 vhdr->h_vlan_proto = skb->vlan_proto;212 vhdr->h_vlan_proto = skb->vlan_proto;
213 vhdr->h_vlan_TCI = cpu_to_be16(skb_vlan_tag_get(skb));213 vhdr->h_vlan_TCI = cpu_to_be16(skb_vlan_tag_get(skb));
214 memcpy(&vhdr->h_vlan_encapsulated_proto, skb->data + cpy1_sz, cpy2_sz);214 memcpy(&vhdr->h_vlan_encapsulated_proto, skb->data + cpy1_sz, cpy2_sz);
drivers/net/ethernet/mellanox/mlx5/core/esw/bridge.c+4−0
@@ -1574,6 +1574,8 @@ struct mlx5_esw_bridge_offloads *mlx5_esw_bridge_init(struct mlx5_eswitch *esw) · 1573 unmodified lines
1574{1574{
1575 struct mlx5_esw_bridge_offloads *br_offloads;1575 struct mlx5_esw_bridge_offloads *br_offloads;
1576 1576
1577 ASSERT_RTNL();
1578
1577 br_offloads = kvzalloc(sizeof(*br_offloads), GFP_KERNEL);1579 br_offloads = kvzalloc(sizeof(*br_offloads), GFP_KERNEL);
1578 if (!br_offloads)1580 if (!br_offloads)
1579 return ERR_PTR(-ENOMEM);1581 return ERR_PTR(-ENOMEM);
@@ -1590,6 +1592,8 @@ void mlx5_esw_bridge_cleanup(struct mlx5_eswitch *esw) · 10 unmodified lines
1590{1592{
1591 struct mlx5_esw_bridge_offloads *br_offloads = esw->br_offloads;1593 struct mlx5_esw_bridge_offloads *br_offloads = esw->br_offloads;
1592 1594
1595 ASSERT_RTNL();
1596
1593 if (!br_offloads)1597 if (!br_offloads)
1594 return;1598 return;
1595 1599
drivers/net/ethernet/mellanox/mlx5/core/esw/diag/bridge_tracepoint.h+1−1
@@ -21,7 +21,7 @@ DECLARE_EVENT_CLASS(mlx5_esw_bridge_fdb_template, · 20 unmodified lines
21 __field(unsigned int, used)21 __field(unsigned int, used)
22 ),22 ),
23 TP_fast_assign(23 TP_fast_assign(
24 strncpy(__entry->dev_name,24 strscpy(__entry->dev_name,
25 netdev_name(fdb->dev),25 netdev_name(fdb->dev),
26 IFNAMSIZ);26 IFNAMSIZ);
27 memcpy(__entry->addr, fdb->key.addr, ETH_ALEN);27 memcpy(__entry->addr, fdb->key.addr, ETH_ALEN);
drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c+1−1
@@ -132,7 +132,7 @@ static void mlx5_stop_sync_reset_poll(struct mlx5_core_dev *dev) · 131 unmodified lines
132{132{
133 struct mlx5_fw_reset *fw_reset = dev->priv.fw_reset;133 struct mlx5_fw_reset *fw_reset = dev->priv.fw_reset;
134 134
135 del_timer(&fw_reset->timer);135 del_timer_sync(&fw_reset->timer);
136}136}
137 137
138static void mlx5_sync_reset_clear_reset_requested(struct mlx5_core_dev *dev, bool poll_health)138static void mlx5_sync_reset_clear_reset_requested(struct mlx5_core_dev *dev, bool poll_health)
drivers/net/ethernet/mellanox/mlx5/core/lib/fs_chains.c+5−4
@@ -121,12 +121,13 @@ u32 mlx5_chains_get_nf_ft_chain(struct mlx5_fs_chains *chains) · 120 unmodified lines
121 121
122u32 mlx5_chains_get_prio_range(struct mlx5_fs_chains *chains)122u32 mlx5_chains_get_prio_range(struct mlx5_fs_chains *chains)
123{123{
124 if (!mlx5_chains_prios_supported(chains))
125 return 1;
126
127 if (mlx5_chains_ignore_flow_level_supported(chains))124 if (mlx5_chains_ignore_flow_level_supported(chains))
128 return UINT_MAX;125 return UINT_MAX;
129 126
127 if (!chains->dev->priv.eswitch ||
128 chains->dev->priv.eswitch->mode != MLX5_ESWITCH_OFFLOADS)
129 return 1;
130
130 /* We should get here only for eswitch case */131 /* We should get here only for eswitch case */
131 return FDB_TC_MAX_PRIO;132 return FDB_TC_MAX_PRIO;
132}133}
@@ -211,7 +212,7 @@ static int · 78 unmodified lines
211create_chain_restore(struct fs_chain *chain)212create_chain_restore(struct fs_chain *chain)
212{213{
213 struct mlx5_eswitch *esw = chain->chains->dev->priv.eswitch;214 struct mlx5_eswitch *esw = chain->chains->dev->priv.eswitch;
214 char modact[MLX5_UN_SZ_BYTES(set_add_copy_action_in_auto)];215 u8 modact[MLX5_UN_SZ_BYTES(set_add_copy_action_in_auto)] = {};
215 struct mlx5_fs_chains *chains = chain->chains;216 struct mlx5_fs_chains *chains = chain->chains;
216 enum mlx5e_tc_attr_to_reg chain_to_reg;217 enum mlx5e_tc_attr_to_reg chain_to_reg;
217 struct mlx5_modify_hdr *mod_hdr;218 struct mlx5_modify_hdr *mod_hdr;
drivers/net/ethernet/mellanox/mlx5/core/port.c+5−4
@@ -406,23 +406,24 @@ int mlx5_query_module_eeprom(struct mlx5_core_dev *dev, · 405 unmodified lines
406 406
407 switch (module_id) {407 switch (module_id) {
408 case MLX5_MODULE_ID_SFP:408 case MLX5_MODULE_ID_SFP:
409 mlx5_sfp_eeprom_params_set(&query.i2c_address, &query.page, &query.offset);409 mlx5_sfp_eeprom_params_set(&query.i2c_address, &query.page, &offset);
410 break;410 break;
411 case MLX5_MODULE_ID_QSFP:411 case MLX5_MODULE_ID_QSFP:
412 case MLX5_MODULE_ID_QSFP_PLUS:412 case MLX5_MODULE_ID_QSFP_PLUS:
413 case MLX5_MODULE_ID_QSFP28:413 case MLX5_MODULE_ID_QSFP28:
414 mlx5_qsfp_eeprom_params_set(&query.i2c_address, &query.page, &query.offset);414 mlx5_qsfp_eeprom_params_set(&query.i2c_address, &query.page, &offset);
415 break;415 break;
416 default:416 default:
417 mlx5_core_err(dev, "Module ID not recognized: 0x%x\n", module_id);417 mlx5_core_err(dev, "Module ID not recognized: 0x%x\n", module_id);
418 return -EINVAL;418 return -EINVAL;
419 }419 }
420 420
421 if (query.offset + size > MLX5_EEPROM_PAGE_LENGTH)421 if (offset + size > MLX5_EEPROM_PAGE_LENGTH)
422 /* Cross pages read, read until offset 256 in low page */422 /* Cross pages read, read until offset 256 in low page */
423 size -= offset + size - MLX5_EEPROM_PAGE_LENGTH;423 size = MLX5_EEPROM_PAGE_LENGTH - offset;
424 424
425 query.size = size;425 query.size = size;
426 query.offset = offset;
426 427
427 return mlx5_query_mcia(dev, &query, data);428 return mlx5_query_mcia(dev, &query, data);
428}429}
drivers/net/ethernet/microchip/lan966x/lan966x_mac.c+6−5
@@ -40,11 +40,12 @@ static int lan966x_mac_wait_for_completion(struct lan966x *lan966x) · 39 unmodified lines
40{40{
41 u32 val;41 u32 val;
42 42
43 return readx_poll_timeout(lan966x_mac_get_status,43 return readx_poll_timeout_atomic(lan966x_mac_get_status,
44 lan966x, val,44 lan966x, val,
45 (ANA_MACACCESS_MAC_TABLE_CMD_GET(val)) ==45 (ANA_MACACCESS_MAC_TABLE_CMD_GET(val)) ==
46 MACACCESS_CMD_IDLE,46 MACACCESS_CMD_IDLE,
47 TABLE_UPDATE_SLEEP_US, TABLE_UPDATE_TIMEOUT_US);47 TABLE_UPDATE_SLEEP_US,
48 TABLE_UPDATE_TIMEOUT_US);
48}49}
49 50
50static void lan966x_mac_select(struct lan966x *lan966x,51static void lan966x_mac_select(struct lan966x *lan966x,
drivers/net/ethernet/microchip/lan966x/lan966x_main.c+3−3
@@ -182,9 +182,9 @@ static int lan966x_port_inj_ready(struct lan966x *lan966x, u8 grp) · 181 unmodified lines
182{182{
183 u32 val;183 u32 val;
184 184
185 return readx_poll_timeout(lan966x_port_inj_status, lan966x, val,185 return readx_poll_timeout_atomic(lan966x_port_inj_status, lan966x, val,
186 QS_INJ_STATUS_FIFO_RDY_GET(val) & BIT(grp),186 QS_INJ_STATUS_FIFO_RDY_GET(val) & BIT(grp),
187 READL_SLEEP_US, READL_TIMEOUT_US);187 READL_SLEEP_US, READL_TIMEOUT_US);
188}188}
189 189
190static int lan966x_port_ifh_xmit(struct sk_buff *skb,190static int lan966x_port_ifh_xmit(struct sk_buff *skb,
drivers/net/ethernet/microchip/sparx5/sparx5_ethtool.c+1−1
@@ -1103,7 +1103,7 @@ void sparx5_get_stats64(struct net_device *ndev, · 1102 unmodified lines
1103 stats->tx_carrier_errors = portstats[spx5_stats_tx_csense_cnt];1103 stats->tx_carrier_errors = portstats[spx5_stats_tx_csense_cnt];
1104 stats->tx_window_errors = portstats[spx5_stats_tx_late_coll_cnt];1104 stats->tx_window_errors = portstats[spx5_stats_tx_late_coll_cnt];
1105 stats->rx_dropped = portstats[spx5_stats_ana_ac_port_stat_lsb_cnt];1105 stats->rx_dropped = portstats[spx5_stats_ana_ac_port_stat_lsb_cnt];
1106 for (idx = 0; idx < 2 * SPX5_PRIOS; ++idx, ++stats)1106 for (idx = 0; idx < 2 * SPX5_PRIOS; ++idx)
1107 stats->rx_dropped += portstats[spx5_stats_green_p0_rx_port_drop1107 stats->rx_dropped += portstats[spx5_stats_green_p0_rx_port_drop
1108 + idx];1108 + idx];
1109 stats->tx_dropped = portstats[spx5_stats_tx_local_drop];1109 stats->tx_dropped = portstats[spx5_stats_tx_local_drop];
drivers/net/ethernet/microchip/sparx5/sparx5_packet.c+1−1
@@ -145,9 +145,9 @@ static void sparx5_xtr_grp(struct sparx5 *sparx5, u8 grp, bool byte_swap) · 144 unmodified lines
145 skb_put(skb, byte_cnt - ETH_FCS_LEN);145 skb_put(skb, byte_cnt - ETH_FCS_LEN);
146 eth_skb_pad(skb);146 eth_skb_pad(skb);
147 skb->protocol = eth_type_trans(skb, netdev);147 skb->protocol = eth_type_trans(skb, netdev);
148 netif_rx(skb);
149 netdev->stats.rx_bytes += skb->len;148 netdev->stats.rx_bytes += skb->len;
150 netdev->stats.rx_packets++;149 netdev->stats.rx_packets++;
150 netif_rx(skb);
151}151}
152 152
153static int sparx5_inject(struct sparx5 *sparx5,153static int sparx5_inject(struct sparx5 *sparx5,
drivers/net/ethernet/mscc/ocelot.c+20−5
@@ -549,14 +549,18 @@ EXPORT_SYMBOL(ocelot_vlan_add); · 548 unmodified lines
549int ocelot_vlan_del(struct ocelot *ocelot, int port, u16 vid)549int ocelot_vlan_del(struct ocelot *ocelot, int port, u16 vid)
550{550{
551 struct ocelot_port *ocelot_port = ocelot->ports[port];551 struct ocelot_port *ocelot_port = ocelot->ports[port];
552 bool del_pvid = false;
552 int err;553 int err;
553 554
555 if (ocelot_port->pvid_vlan && ocelot_port->pvid_vlan->vid == vid)
556 del_pvid = true;
557
554 err = ocelot_vlan_member_del(ocelot, port, vid);558 err = ocelot_vlan_member_del(ocelot, port, vid);
555 if (err)559 if (err)
556 return err;560 return err;
557 561
558 /* Ingress */562 /* Ingress */
559 if (ocelot_port->pvid_vlan && ocelot_port->pvid_vlan->vid == vid)563 if (del_pvid)
560 ocelot_port_set_pvid(ocelot, port, NULL);564 ocelot_port_set_pvid(ocelot, port, NULL);
561 565
562 /* Egress */566 /* Egress */
@@ -1432,6 +1436,8 @@ static void · 869 unmodified lines
1432ocelot_populate_ipv4_ptp_event_trap_key(struct ocelot_vcap_filter *trap)1436ocelot_populate_ipv4_ptp_event_trap_key(struct ocelot_vcap_filter *trap)
1433{1437{
1434 trap->key_type = OCELOT_VCAP_KEY_IPV4;1438 trap->key_type = OCELOT_VCAP_KEY_IPV4;
1439 trap->key.ipv4.proto.value[0] = IPPROTO_UDP;
1440 trap->key.ipv4.proto.mask[0] = 0xff;
1435 trap->key.ipv4.dport.value = PTP_EV_PORT;1441 trap->key.ipv4.dport.value = PTP_EV_PORT;
1436 trap->key.ipv4.dport.mask = 0xffff;1442 trap->key.ipv4.dport.mask = 0xffff;
1437}1443}
@@ -1440,6 +1446,8 @@ static void · 2 unmodified lines
1440ocelot_populate_ipv6_ptp_event_trap_key(struct ocelot_vcap_filter *trap)1446ocelot_populate_ipv6_ptp_event_trap_key(struct ocelot_vcap_filter *trap)
1441{1447{
1442 trap->key_type = OCELOT_VCAP_KEY_IPV6;1448 trap->key_type = OCELOT_VCAP_KEY_IPV6;
1449 trap->key.ipv4.proto.value[0] = IPPROTO_UDP;
1450 trap->key.ipv4.proto.mask[0] = 0xff;
1443 trap->key.ipv6.dport.value = PTP_EV_PORT;1451 trap->key.ipv6.dport.value = PTP_EV_PORT;
1444 trap->key.ipv6.dport.mask = 0xffff;1452 trap->key.ipv6.dport.mask = 0xffff;
1445}1453}
@@ -1448,6 +1456,8 @@ static void · 2 unmodified lines
1448ocelot_populate_ipv4_ptp_general_trap_key(struct ocelot_vcap_filter *trap)1456ocelot_populate_ipv4_ptp_general_trap_key(struct ocelot_vcap_filter *trap)
1449{1457{
1450 trap->key_type = OCELOT_VCAP_KEY_IPV4;1458 trap->key_type = OCELOT_VCAP_KEY_IPV4;
1459 trap->key.ipv4.proto.value[0] = IPPROTO_UDP;
1460 trap->key.ipv4.proto.mask[0] = 0xff;
1451 trap->key.ipv4.dport.value = PTP_GEN_PORT;1461 trap->key.ipv4.dport.value = PTP_GEN_PORT;
1452 trap->key.ipv4.dport.mask = 0xffff;1462 trap->key.ipv4.dport.mask = 0xffff;
1453}1463}
@@ -1456,6 +1466,8 @@ static void · 2 unmodified lines
1456ocelot_populate_ipv6_ptp_general_trap_key(struct ocelot_vcap_filter *trap)1466ocelot_populate_ipv6_ptp_general_trap_key(struct ocelot_vcap_filter *trap)
1457{1467{
1458 trap->key_type = OCELOT_VCAP_KEY_IPV6;1468 trap->key_type = OCELOT_VCAP_KEY_IPV6;
1469 trap->key.ipv4.proto.value[0] = IPPROTO_UDP;
1470 trap->key.ipv4.proto.mask[0] = 0xff;
1459 trap->key.ipv6.dport.value = PTP_GEN_PORT;1471 trap->key.ipv6.dport.value = PTP_GEN_PORT;
1460 trap->key.ipv6.dport.mask = 0xffff;1472 trap->key.ipv6.dport.mask = 0xffff;
1461}1473}
@@ -1737,12 +1749,11 @@ void ocelot_get_strings(struct ocelot *ocelot, int port, u32 sset, u8 *data) · 275 unmodified lines
1737}1749}
1738EXPORT_SYMBOL(ocelot_get_strings);1750EXPORT_SYMBOL(ocelot_get_strings);
1739 1751
1752/* Caller must hold &ocelot->stats_lock */
1740static void ocelot_update_stats(struct ocelot *ocelot)1753static void ocelot_update_stats(struct ocelot *ocelot)
1741{1754{
1742 int i, j;1755 int i, j;
1743 1756
1744 mutex_lock(&ocelot->stats_lock);
1745
1746 for (i = 0; i < ocelot->num_phys_ports; i++) {1757 for (i = 0; i < ocelot->num_phys_ports; i++) {
1747 /* Configure the port to read the stats from */1758 /* Configure the port to read the stats from */
1748 ocelot_write(ocelot, SYS_STAT_CFG_STAT_VIEW(i), SYS_STAT_CFG);1759 ocelot_write(ocelot, SYS_STAT_CFG_STAT_VIEW(i), SYS_STAT_CFG);
@@ -1761,8 +1772,6 @@ static void ocelot_update_stats(struct ocelot *ocelot) · 12 unmodified lines
1761 ~(u64)U32_MAX) + val;1772 ~(u64)U32_MAX) + val;
1762 }1773 }
1763 }1774 }
1764
1765 mutex_unlock(&ocelot->stats_lock);
1766}1775}
1767 1776
1768static void ocelot_check_stats_work(struct work_struct *work)1777static void ocelot_check_stats_work(struct work_struct *work)
@@ -1771,7 +1780,9 @@ static void ocelot_check_stats_work(struct work_struct *work) · 2 unmodified lines
1771 struct ocelot *ocelot = container_of(del_work, struct ocelot,1780 struct ocelot *ocelot = container_of(del_work, struct ocelot,
1772 stats_work);1781 stats_work);
1773 1782
1783 mutex_lock(&ocelot->stats_lock);
1774 ocelot_update_stats(ocelot);1784 ocelot_update_stats(ocelot);
1785 mutex_unlock(&ocelot->stats_lock);
1775 1786
1776 queue_delayed_work(ocelot->stats_queue, &ocelot->stats_work,1787 queue_delayed_work(ocelot->stats_queue, &ocelot->stats_work,
1777 OCELOT_STATS_CHECK_DELAY);1788 OCELOT_STATS_CHECK_DELAY);
@@ -1781,12 +1792,16 @@ void ocelot_get_ethtool_stats(struct ocelot *ocelot, int port, u64 *data) · 3 unmodified lines
1781{1792{
1782 int i;1793 int i;
1783 1794
1795 mutex_lock(&ocelot->stats_lock);
1796
1784 /* check and update now */1797 /* check and update now */
1785 ocelot_update_stats(ocelot);1798 ocelot_update_stats(ocelot);
1786 1799
1787 /* Copy all counters */1800 /* Copy all counters */
1788 for (i = 0; i < ocelot->num_stats; i++)1801 for (i = 0; i < ocelot->num_stats; i++)
1789 *data++ = ocelot->stats[port * ocelot->num_stats + i];1802 *data++ = ocelot->stats[port * ocelot->num_stats + i];
1803
1804 mutex_unlock(&ocelot->stats_lock);
1790}1805}
1791EXPORT_SYMBOL(ocelot_get_ethtool_stats);1806EXPORT_SYMBOL(ocelot_get_ethtool_stats);
1792 1807
drivers/net/ethernet/netronome/nfp/flower/cmsg.h+2−0
@@ -723,6 +723,8 @@ static inline bool nfp_fl_is_netdev_to_offload(struct net_device *netdev) · 722 unmodified lines
723 return true;723 return true;
724 if (netif_is_gretap(netdev))724 if (netif_is_gretap(netdev))
725 return true;725 return true;
726 if (netif_is_ip6gretap(netdev))
727 return true;
726 728
727 return false;729 return false;
728}730}
drivers/net/ethernet/netronome/nfp/flower/tunnel_conf.c+8−4
@@ -1011,6 +1011,7 @@ nfp_tunnel_del_shared_mac(struct nfp_app *app, struct net_device *netdev, · 1010 unmodified lines
1011 struct nfp_flower_repr_priv *repr_priv;1011 struct nfp_flower_repr_priv *repr_priv;
1012 struct nfp_tun_offloaded_mac *entry;1012 struct nfp_tun_offloaded_mac *entry;
1013 struct nfp_repr *repr;1013 struct nfp_repr *repr;
1014 u16 nfp_mac_idx;
1014 int ida_idx;1015 int ida_idx;
1015 1016
1016 entry = nfp_tunnel_lookup_offloaded_macs(app, mac);1017 entry = nfp_tunnel_lookup_offloaded_macs(app, mac);
@@ -1029,8 +1030,6 @@ nfp_tunnel_del_shared_mac(struct nfp_app *app, struct net_device *netdev, · 12 unmodified lines
1029 entry->bridge_count--;1030 entry->bridge_count--;
1030 1031
1031 if (!entry->bridge_count && entry->ref_count) {1032 if (!entry->bridge_count && entry->ref_count) {
1032 u16 nfp_mac_idx;
1033
1034 nfp_mac_idx = entry->index & ~NFP_TUN_PRE_TUN_IDX_BIT;1033 nfp_mac_idx = entry->index & ~NFP_TUN_PRE_TUN_IDX_BIT;
1035 if (__nfp_tunnel_offload_mac(app, mac, nfp_mac_idx,1034 if (__nfp_tunnel_offload_mac(app, mac, nfp_mac_idx,
1036 false)) {1035 false)) {
@@ -1046,7 +1045,6 @@ nfp_tunnel_del_shared_mac(struct nfp_app *app, struct net_device *netdev, · 9 unmodified lines
1046 1045
1047 /* If MAC is now used by 1 repr set the offloaded MAC index to port. */1046 /* If MAC is now used by 1 repr set the offloaded MAC index to port. */
1048 if (entry->ref_count == 1 && list_is_singular(&entry->repr_list)) {1047 if (entry->ref_count == 1 && list_is_singular(&entry->repr_list)) {
1049 u16 nfp_mac_idx;
1050 int port, err;1048 int port, err;
1051 1049
1052 repr_priv = list_first_entry(&entry->repr_list,1050 repr_priv = list_first_entry(&entry->repr_list,
@@ -1074,8 +1072,14 @@ nfp_tunnel_del_shared_mac(struct nfp_app *app, struct net_device *netdev, · 21 unmodified lines
1074 WARN_ON_ONCE(rhashtable_remove_fast(&priv->tun.offloaded_macs,1072 WARN_ON_ONCE(rhashtable_remove_fast(&priv->tun.offloaded_macs,
1075 &entry->ht_node,1073 &entry->ht_node,
1076 offloaded_macs_params));1074 offloaded_macs_params));
1075
1076 if (nfp_flower_is_supported_bridge(netdev))
1077 nfp_mac_idx = entry->index & ~NFP_TUN_PRE_TUN_IDX_BIT;
1078 else
1079 nfp_mac_idx = entry->index;
1080
1077 /* If MAC has global ID then extract and free the ida entry. */1081 /* If MAC has global ID then extract and free the ida entry. */
1078 if (nfp_tunnel_is_mac_idx_global(entry->index)) {1082 if (nfp_tunnel_is_mac_idx_global(nfp_mac_idx)) {
1079 ida_idx = nfp_tunnel_get_ida_from_global_mac_idx(entry->index);1083 ida_idx = nfp_tunnel_get_ida_from_global_mac_idx(entry->index);
1080 ida_simple_remove(&priv->tun.mac_off_ids, ida_idx);1084 ida_simple_remove(&priv->tun.mac_off_ids, ida_idx);
1081 }1085 }
drivers/net/ethernet/seeq/ether3.c+3−1
@@ -749,6 +749,7 @@ ether3_probe(struct expansion_card *ec, const struct ecard_id *id) · 748 unmodified lines
749 const struct ether3_data *data = id->data;749 const struct ether3_data *data = id->data;
750 struct net_device *dev;750 struct net_device *dev;
751 int bus_type, ret;751 int bus_type, ret;
752 u8 addr[ETH_ALEN];
752 753
753 ether3_banner();754 ether3_banner();
754 755
@@ -776,7 +777,8 @@ ether3_probe(struct expansion_card *ec, const struct ecard_id *id) · 21 unmodified lines
776 priv(dev)->seeq = priv(dev)->base + data->base_offset;777 priv(dev)->seeq = priv(dev)->base + data->base_offset;
777 dev->irq = ec->irq;778 dev->irq = ec->irq;
778 779
779 ether3_addr(dev->dev_addr, ec);780 ether3_addr(addr, ec);
781 eth_hw_addr_set(dev, addr);
780 782
781 priv(dev)->dev = dev;783 priv(dev)->dev = dev;
782 timer_setup(&priv(dev)->timer, ether3_ledoff, 0);784 timer_setup(&priv(dev)->timer, ether3_ledoff, 0);
drivers/net/ethernet/smsc/smc911x.c+4−4
@@ -1648,7 +1648,7 @@ static int smc911x_ethtool_geteeprom(struct net_device *dev, · 1647 unmodified lines
1648 return ret;1648 return ret;
1649 if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)1649 if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
1650 return ret;1650 return ret;
1651 }1651 }
1652 memcpy(data, eebuf+eeprom->offset, eeprom->len);1652 memcpy(data, eebuf+eeprom->offset, eeprom->len);
1653 return 0;1653 return 0;
1654}1654}
@@ -1667,11 +1667,11 @@ static int smc911x_ethtool_seteeprom(struct net_device *dev, · 12 unmodified lines
1667 return ret;1667 return ret;
1668 /* write byte */1668 /* write byte */
1669 if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)1669 if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
1670 return ret;1670 return ret;
1671 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)1671 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
1672 return ret;1672 return ret;
1673 }1673 }
1674 return 0;1674 return 0;
1675}1675}
1676 1676
1677static int smc911x_ethtool_geteeprom_len(struct net_device *dev)1677static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c+1−1
@@ -756,7 +756,7 @@ static int sun8i_dwmac_reset(struct stmmac_priv *priv) · 755 unmodified lines
756 756
757 if (err) {757 if (err) {
758 dev_err(priv->device, "EMAC reset timeout\n");758 dev_err(priv->device, "EMAC reset timeout\n");
759 return -EFAULT;759 return err;
760 }760 }
761 return 0;761 return 0;
762}762}
drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c+33−18
@@ -22,21 +22,21 @@ · 21 unmodified lines
22#define ETHER_CLK_SEL_RMII_CLK_EN BIT(2)22#define ETHER_CLK_SEL_RMII_CLK_EN BIT(2)
23#define ETHER_CLK_SEL_RMII_CLK_RST BIT(3)23#define ETHER_CLK_SEL_RMII_CLK_RST BIT(3)
24#define ETHER_CLK_SEL_DIV_SEL_2 BIT(4)24#define ETHER_CLK_SEL_DIV_SEL_2 BIT(4)
25#define ETHER_CLK_SEL_DIV_SEL_20 BIT(0)25#define ETHER_CLK_SEL_DIV_SEL_20 0
26#define ETHER_CLK_SEL_FREQ_SEL_125M (BIT(9) | BIT(8))26#define ETHER_CLK_SEL_FREQ_SEL_125M (BIT(9) | BIT(8))
27#define ETHER_CLK_SEL_FREQ_SEL_50M BIT(9)27#define ETHER_CLK_SEL_FREQ_SEL_50M BIT(9)
28#define ETHER_CLK_SEL_FREQ_SEL_25M BIT(8)28#define ETHER_CLK_SEL_FREQ_SEL_25M BIT(8)
29#define ETHER_CLK_SEL_FREQ_SEL_2P5M 029#define ETHER_CLK_SEL_FREQ_SEL_2P5M 0
30#define ETHER_CLK_SEL_TX_CLK_EXT_SEL_IN BIT(0)30#define ETHER_CLK_SEL_TX_CLK_EXT_SEL_IN 0
31#define ETHER_CLK_SEL_TX_CLK_EXT_SEL_TXC BIT(10)31#define ETHER_CLK_SEL_TX_CLK_EXT_SEL_TXC BIT(10)
32#define ETHER_CLK_SEL_TX_CLK_EXT_SEL_DIV BIT(11)32#define ETHER_CLK_SEL_TX_CLK_EXT_SEL_DIV BIT(11)
33#define ETHER_CLK_SEL_RX_CLK_EXT_SEL_IN BIT(0)33#define ETHER_CLK_SEL_RX_CLK_EXT_SEL_IN 0
34#define ETHER_CLK_SEL_RX_CLK_EXT_SEL_RXC BIT(12)34#define ETHER_CLK_SEL_RX_CLK_EXT_SEL_RXC BIT(12)
35#define ETHER_CLK_SEL_RX_CLK_EXT_SEL_DIV BIT(13)35#define ETHER_CLK_SEL_RX_CLK_EXT_SEL_DIV BIT(13)
36#define ETHER_CLK_SEL_TX_CLK_O_TX_I BIT(0)36#define ETHER_CLK_SEL_TX_CLK_O_TX_I 0
37#define ETHER_CLK_SEL_TX_CLK_O_RMII_I BIT(14)37#define ETHER_CLK_SEL_TX_CLK_O_RMII_I BIT(14)
38#define ETHER_CLK_SEL_TX_O_E_N_IN BIT(15)38#define ETHER_CLK_SEL_TX_O_E_N_IN BIT(15)
39#define ETHER_CLK_SEL_RMII_CLK_SEL_IN BIT(0)39#define ETHER_CLK_SEL_RMII_CLK_SEL_IN 0
40#define ETHER_CLK_SEL_RMII_CLK_SEL_RX_C BIT(16)40#define ETHER_CLK_SEL_RMII_CLK_SEL_RX_C BIT(16)
41 41
42#define ETHER_CLK_SEL_RX_TX_CLK_EN (ETHER_CLK_SEL_RX_CLK_EN | ETHER_CLK_SEL_TX_CLK_EN)42#define ETHER_CLK_SEL_RX_TX_CLK_EN (ETHER_CLK_SEL_RX_CLK_EN | ETHER_CLK_SEL_TX_CLK_EN)
@@ -49,13 +49,15 @@ struct visconti_eth { · 6 unmodified lines
49 void __iomem *reg;49 void __iomem *reg;
50 u32 phy_intf_sel;50 u32 phy_intf_sel;
51 struct clk *phy_ref_clk;51 struct clk *phy_ref_clk;
52 struct device *dev;
52 spinlock_t lock; /* lock to protect register update */53 spinlock_t lock; /* lock to protect register update */
53};54};
54 55
55static void visconti_eth_fix_mac_speed(void *priv, unsigned int speed)56static void visconti_eth_fix_mac_speed(void *priv, unsigned int speed)
56{57{
57 struct visconti_eth *dwmac = priv;58 struct visconti_eth *dwmac = priv;
58 unsigned int val, clk_sel_val;59 struct net_device *netdev = dev_get_drvdata(dwmac->dev);
60 unsigned int val, clk_sel_val = 0;
59 unsigned long flags;61 unsigned long flags;
60 62
61 spin_lock_irqsave(&dwmac->lock, flags);63 spin_lock_irqsave(&dwmac->lock, flags);
@@ -85,7 +87,9 @@ static void visconti_eth_fix_mac_speed(void *priv, unsigned int speed) · 23 unmodified lines
85 break;87 break;
86 default:88 default:
87 /* No bit control */89 /* No bit control */
88 break;90 netdev_err(netdev, "Unsupported speed request (%d)", speed);
91 spin_unlock_irqrestore(&dwmac->lock, flags);
92 return;
89 }93 }
90 94
91 writel(val, dwmac->reg + MAC_CTRL_REG);95 writel(val, dwmac->reg + MAC_CTRL_REG);
@@ -96,31 +100,41 @@ static void visconti_eth_fix_mac_speed(void *priv, unsigned int speed) · 4 unmodified lines
96 val |= ETHER_CLK_SEL_TX_O_E_N_IN;100 val |= ETHER_CLK_SEL_TX_O_E_N_IN;
97 writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);101 writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);
98 102
103 /* Set Clock-Mux, Start clock, Set TX_O direction */
99 switch (dwmac->phy_intf_sel) {104 switch (dwmac->phy_intf_sel) {
100 case ETHER_CONFIG_INTF_RGMII:105 case ETHER_CONFIG_INTF_RGMII:
101 val = clk_sel_val | ETHER_CLK_SEL_RX_CLK_EXT_SEL_RXC;106 val = clk_sel_val | ETHER_CLK_SEL_RX_CLK_EXT_SEL_RXC;
107 writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);
108
109 val |= ETHER_CLK_SEL_RX_TX_CLK_EN;
110 writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);
111
112 val &= ~ETHER_CLK_SEL_TX_O_E_N_IN;
113 writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);
102 break;114 break;
103 case ETHER_CONFIG_INTF_RMII:115 case ETHER_CONFIG_INTF_RMII:
104 val = clk_sel_val | ETHER_CLK_SEL_RX_CLK_EXT_SEL_DIV |116 val = clk_sel_val | ETHER_CLK_SEL_RX_CLK_EXT_SEL_DIV |
105 ETHER_CLK_SEL_TX_CLK_EXT_SEL_TXC | ETHER_CLK_SEL_TX_O_E_N_IN |117 ETHER_CLK_SEL_TX_CLK_EXT_SEL_DIV | ETHER_CLK_SEL_TX_O_E_N_IN |
106 ETHER_CLK_SEL_RMII_CLK_SEL_RX_C;118 ETHER_CLK_SEL_RMII_CLK_SEL_RX_C;
119 writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);
120
121 val |= ETHER_CLK_SEL_RMII_CLK_RST;
122 writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);
123
124 val |= ETHER_CLK_SEL_RMII_CLK_EN | ETHER_CLK_SEL_RX_TX_CLK_EN;
125 writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);
107 break;126 break;
108 case ETHER_CONFIG_INTF_MII:127 case ETHER_CONFIG_INTF_MII:
109 default:128 default:
110 val = clk_sel_val | ETHER_CLK_SEL_RX_CLK_EXT_SEL_RXC |129 val = clk_sel_val | ETHER_CLK_SEL_RX_CLK_EXT_SEL_RXC |
111 ETHER_CLK_SEL_TX_CLK_EXT_SEL_DIV | ETHER_CLK_SEL_TX_O_E_N_IN |130 ETHER_CLK_SEL_TX_CLK_EXT_SEL_TXC | ETHER_CLK_SEL_TX_O_E_N_IN;
112 ETHER_CLK_SEL_RMII_CLK_EN;131 writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);
132
133 val |= ETHER_CLK_SEL_RX_TX_CLK_EN;
134 writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);
113 break;135 break;
114 }136 }
115 137
116 /* Start clock */
117 writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);
118 val |= ETHER_CLK_SEL_RX_TX_CLK_EN;
119 writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);
120
121 val &= ~ETHER_CLK_SEL_TX_O_E_N_IN;
122 writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);
123
124 spin_unlock_irqrestore(&dwmac->lock, flags);138 spin_unlock_irqrestore(&dwmac->lock, flags);
125}139}
126 140
@@ -219,6 +233,7 @@ static int visconti_eth_dwmac_probe(struct platform_device *pdev) · 92 unmodified lines
219 233
220 spin_lock_init(&dwmac->lock);234 spin_lock_init(&dwmac->lock);
221 dwmac->reg = stmmac_res.addr;235 dwmac->reg = stmmac_res.addr;
236 dwmac->dev = &pdev->dev;
222 plat_dat->bsp_priv = dwmac;237 plat_dat->bsp_priv = dwmac;
223 plat_dat->fix_mac_speed = visconti_eth_fix_mac_speed;238 plat_dat->fix_mac_speed = visconti_eth_fix_mac_speed;
224 239
drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h+1−0
@@ -150,6 +150,7 @@ · 149 unmodified lines
150 150
151#define NUM_DWMAC100_DMA_REGS 9151#define NUM_DWMAC100_DMA_REGS 9
152#define NUM_DWMAC1000_DMA_REGS 23152#define NUM_DWMAC1000_DMA_REGS 23
153#define NUM_DWMAC4_DMA_REGS 27
153 154
154void dwmac_enable_dma_transmission(void __iomem *ioaddr);155void dwmac_enable_dma_transmission(void __iomem *ioaddr);
155void dwmac_enable_dma_irq(void __iomem *ioaddr, u32 chan, bool rx, bool tx);156void dwmac_enable_dma_irq(void __iomem *ioaddr, u32 chan, bool rx, bool tx);
drivers/net/ethernet/stmicro/stmmac/stmmac.h+0−2
@@ -194,7 +194,6 @@ struct stmmac_priv { · 193 unmodified lines
194 u32 tx_coal_timer[MTL_MAX_TX_QUEUES];194 u32 tx_coal_timer[MTL_MAX_TX_QUEUES];
195 u32 rx_coal_frames[MTL_MAX_TX_QUEUES];195 u32 rx_coal_frames[MTL_MAX_TX_QUEUES];
196 196
197 int tx_coalesce;
198 int hwts_tx_en;197 int hwts_tx_en;
199 bool tx_path_in_lpi_mode;198 bool tx_path_in_lpi_mode;
200 bool tso;199 bool tso;
@@ -229,7 +228,6 @@ struct stmmac_priv { · 28 unmodified lines
229 unsigned int flow_ctrl;228 unsigned int flow_ctrl;
230 unsigned int pause;229 unsigned int pause;
231 struct mii_bus *mii;230 struct mii_bus *mii;
232 int mii_irq[PHY_MAX_ADDR];
233 231
234 struct phylink_config phylink_config;232 struct phylink_config phylink_config;
235 struct phylink *phylink;233 struct phylink *phylink;
drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c+17−2
@@ -21,10 +21,18 @@ · 20 unmodified lines
21#include "dwxgmac2.h"21#include "dwxgmac2.h"
22 22
23#define REG_SPACE_SIZE 0x106023#define REG_SPACE_SIZE 0x1060
24#define GMAC4_REG_SPACE_SIZE 0x116C
24#define MAC100_ETHTOOL_NAME "st_mac100"25#define MAC100_ETHTOOL_NAME "st_mac100"
25#define GMAC_ETHTOOL_NAME "st_gmac"26#define GMAC_ETHTOOL_NAME "st_gmac"
26#define XGMAC_ETHTOOL_NAME "st_xgmac"27#define XGMAC_ETHTOOL_NAME "st_xgmac"
27 28
29/* Same as DMA_CHAN_BASE_ADDR defined in dwmac4_dma.h
30 *
31 * It is here because dwmac_dma.h and dwmac4_dam.h can not be included at the
32 * same time due to the conflicting macro names.
33 */
34#define GMAC4_DMA_CHAN_BASE_ADDR 0x00001100
35
28#define ETHTOOL_DMA_OFFSET 5536#define ETHTOOL_DMA_OFFSET 55
29 37
30struct stmmac_stats {38struct stmmac_stats {
@@ -434,6 +442,8 @@ static int stmmac_ethtool_get_regs_len(struct net_device *dev) · 403 unmodified lines
434 442
435 if (priv->plat->has_xgmac)443 if (priv->plat->has_xgmac)
436 return XGMAC_REGSIZE * 4;444 return XGMAC_REGSIZE * 4;
445 else if (priv->plat->has_gmac4)
446 return GMAC4_REG_SPACE_SIZE;
437 return REG_SPACE_SIZE;447 return REG_SPACE_SIZE;
438}448}
439 449
@@ -446,8 +456,13 @@ static void stmmac_ethtool_gregs(struct net_device *dev, · 6 unmodified lines
446 stmmac_dump_mac_regs(priv, priv->hw, reg_space);456 stmmac_dump_mac_regs(priv, priv->hw, reg_space);
447 stmmac_dump_dma_regs(priv, priv->ioaddr, reg_space);457 stmmac_dump_dma_regs(priv, priv->ioaddr, reg_space);
448 458
449 if (!priv->plat->has_xgmac) {459 /* Copy DMA registers to where ethtool expects them */
450 /* Copy DMA registers to where ethtool expects them */460 if (priv->plat->has_gmac4) {
461 /* GMAC4 dumps its DMA registers at its DMA_CHAN_BASE_ADDR */
462 memcpy(&reg_space[ETHTOOL_DMA_OFFSET],
463 &reg_space[GMAC4_DMA_CHAN_BASE_ADDR / 4],
464 NUM_DWMAC4_DMA_REGS * 4);
465 } else if (!priv->plat->has_xgmac) {
451 memcpy(&reg_space[ETHTOOL_DMA_OFFSET],466 memcpy(&reg_space[ETHTOOL_DMA_OFFSET],
452 &reg_space[DMA_BUS_MODE / 4],467 &reg_space[DMA_BUS_MODE / 4],
453 NUM_DWMAC1000_DMA_REGS * 4);468 NUM_DWMAC1000_DMA_REGS * 4);
drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c+12−7
@@ -145,15 +145,20 @@ static int adjust_systime(void __iomem *ioaddr, u32 sec, u32 nsec, · 144 unmodified lines
145 145
146static void get_systime(void __iomem *ioaddr, u64 *systime)146static void get_systime(void __iomem *ioaddr, u64 *systime)
147{147{
148 u64 ns;148 u64 ns, sec0, sec1;
149 149
150 /* Get the TSSS value */150 /* Get the TSS value */
151 ns = readl(ioaddr + PTP_STNSR);151 sec1 = readl_relaxed(ioaddr + PTP_STSR);
152 /* Get the TSS and convert sec time value to nanosecond */152 do {
153 ns += readl(ioaddr + PTP_STSR) * 1000000000ULL;153 sec0 = sec1;
154 /* Get the TSSS value */
155 ns = readl_relaxed(ioaddr + PTP_STNSR);
156 /* Get the TSS value */
157 sec1 = readl_relaxed(ioaddr + PTP_STSR);
158 } while (sec0 != sec1);
154 159
155 if (systime)160 if (systime)
156 *systime = ns;161 *systime = ns + (sec1 * 1000000000ULL);
157}162}
158 163
159static void get_ptptime(void __iomem *ptpaddr, u64 *ptp_time)164static void get_ptptime(void __iomem *ptpaddr, u64 *ptp_time)
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c+23−19
@@ -402,7 +402,7 @@ static void stmmac_lpi_entry_timer_config(struct stmmac_priv *priv, bool en) · 401 unmodified lines
402 * Description: this function is to verify and enter in LPI mode in case of402 * Description: this function is to verify and enter in LPI mode in case of
403 * EEE.403 * EEE.
404 */404 */
405static void stmmac_enable_eee_mode(struct stmmac_priv *priv)405static int stmmac_enable_eee_mode(struct stmmac_priv *priv)
406{406{
407 u32 tx_cnt = priv->plat->tx_queues_to_use;407 u32 tx_cnt = priv->plat->tx_queues_to_use;
408 u32 queue;408 u32 queue;
@@ -412,13 +412,14 @@ static void stmmac_enable_eee_mode(struct stmmac_priv *priv) · 3 unmodified lines
412 struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];412 struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
413 413
414 if (tx_q->dirty_tx != tx_q->cur_tx)414 if (tx_q->dirty_tx != tx_q->cur_tx)
415 return; /* still unfinished work */415 return -EBUSY; /* still unfinished work */
416 }416 }
417 417
418 /* Check and enter in LPI mode */418 /* Check and enter in LPI mode */
419 if (!priv->tx_path_in_lpi_mode)419 if (!priv->tx_path_in_lpi_mode)
420 stmmac_set_eee_mode(priv, priv->hw,420 stmmac_set_eee_mode(priv, priv->hw,
421 priv->plat->en_tx_lpi_clockgating);421 priv->plat->en_tx_lpi_clockgating);
422 return 0;
422}423}
423 424
424/**425/**
@@ -450,8 +451,8 @@ static void stmmac_eee_ctrl_timer(struct timer_list *t) · 25 unmodified lines
450{451{
451 struct stmmac_priv *priv = from_timer(priv, t, eee_ctrl_timer);452 struct stmmac_priv *priv = from_timer(priv, t, eee_ctrl_timer);
452 453
453 stmmac_enable_eee_mode(priv);454 if (stmmac_enable_eee_mode(priv))
454 mod_timer(&priv->eee_ctrl_timer, STMMAC_LPI_T(priv->tx_lpi_timer));455 mod_timer(&priv->eee_ctrl_timer, STMMAC_LPI_T(priv->tx_lpi_timer));
455}456}
456 457
457/**458/**
@@ -889,6 +890,9 @@ static int stmmac_init_ptp(struct stmmac_priv *priv) · 431 unmodified lines
889 bool xmac = priv->plat->has_gmac4 || priv->plat->has_xgmac;890 bool xmac = priv->plat->has_gmac4 || priv->plat->has_xgmac;
890 int ret;891 int ret;
891 892
893 if (priv->plat->ptp_clk_freq_config)
894 priv->plat->ptp_clk_freq_config(priv);
895
892 ret = stmmac_init_tstamp_counter(priv, STMMAC_HWTS_ACTIVE);896 ret = stmmac_init_tstamp_counter(priv, STMMAC_HWTS_ACTIVE);
893 if (ret)897 if (ret)
894 return ret;898 return ret;
@@ -911,8 +915,6 @@ static int stmmac_init_ptp(struct stmmac_priv *priv) · 16 unmodified lines
911 priv->hwts_tx_en = 0;915 priv->hwts_tx_en = 0;
912 priv->hwts_rx_en = 0;916 priv->hwts_rx_en = 0;
913 917
914 stmmac_ptp_register(priv);
915
916 return 0;918 return 0;
917}919}
918 920
@@ -2647,8 +2649,8 @@ static int stmmac_tx_clean(struct stmmac_priv *priv, int budget, u32 queue) · 1728 unmodified lines
2647 2649
2648 if (priv->eee_enabled && !priv->tx_path_in_lpi_mode &&2650 if (priv->eee_enabled && !priv->tx_path_in_lpi_mode &&
2649 priv->eee_sw_timer_en) {2651 priv->eee_sw_timer_en) {
2650 stmmac_enable_eee_mode(priv);2652 if (stmmac_enable_eee_mode(priv))
2651 mod_timer(&priv->eee_ctrl_timer, STMMAC_LPI_T(priv->tx_lpi_timer));2653 mod_timer(&priv->eee_ctrl_timer, STMMAC_LPI_T(priv->tx_lpi_timer));
2652 }2654 }
2653 2655
2654 /* We still have pending packets, let's call for a new scheduling */2656 /* We still have pending packets, let's call for a new scheduling */
@@ -3238,7 +3240,7 @@ static int stmmac_fpe_start_wq(struct stmmac_priv *priv) · 583 unmodified lines
3238/**3240/**
3239 * stmmac_hw_setup - setup mac in a usable state.3241 * stmmac_hw_setup - setup mac in a usable state.
3240 * @dev : pointer to the device structure.3242 * @dev : pointer to the device structure.
3241 * @init_ptp: initialize PTP if set3243 * @ptp_register: register PTP if set
3242 * Description:3244 * Description:
3243 * this is the main function to setup the HW in a usable state because the3245 * this is the main function to setup the HW in a usable state because the
3244 * dma engine is reset, the core registers are configured (e.g. AXI,3246 * dma engine is reset, the core registers are configured (e.g. AXI,
@@ -3248,7 +3250,7 @@ static int stmmac_fpe_start_wq(struct stmmac_priv *priv) · 3 unmodified lines
3248 * 0 on success and an appropriate (-)ve integer as defined in errno.h3250 * 0 on success and an appropriate (-)ve integer as defined in errno.h
3249 * file on failure.3251 * file on failure.
3250 */3252 */
3251static int stmmac_hw_setup(struct net_device *dev, bool init_ptp)3253static int stmmac_hw_setup(struct net_device *dev, bool ptp_register)
3252{3254{
3253 struct stmmac_priv *priv = netdev_priv(dev);3255 struct stmmac_priv *priv = netdev_priv(dev);
3254 u32 rx_cnt = priv->plat->rx_queues_to_use;3256 u32 rx_cnt = priv->plat->rx_queues_to_use;
@@ -3305,13 +3307,13 @@ static int stmmac_hw_setup(struct net_device *dev, bool init_ptp) · 50 unmodified lines
3305 3307
3306 stmmac_mmc_setup(priv);3308 stmmac_mmc_setup(priv);
3307 3309
3308 if (init_ptp) {3310 ret = stmmac_init_ptp(priv);
3309 ret = stmmac_init_ptp(priv);3311 if (ret == -EOPNOTSUPP)
3310 if (ret == -EOPNOTSUPP)3312 netdev_warn(priv->dev, "PTP not supported by HW\n");
3311 netdev_warn(priv->dev, "PTP not supported by HW\n");3313 else if (ret)
3312 else if (ret)3314 netdev_warn(priv->dev, "PTP init failed\n");
3313 netdev_warn(priv->dev, "PTP init failed\n");3315 else if (ptp_register)
3314 }3316 stmmac_ptp_register(priv);
3315 3317
3316 priv->eee_tw_timer = STMMAC_DEFAULT_TWT_LS;3318 priv->eee_tw_timer = STMMAC_DEFAULT_TWT_LS;
3317 3319
@@ -7250,6 +7252,10 @@ int stmmac_dvr_remove(struct device *dev) · 3932 unmodified lines
7250 7252
7251 netdev_info(priv->dev, "%s: removing driver", __func__);7253 netdev_info(priv->dev, "%s: removing driver", __func__);
7252 7254
7255 pm_runtime_get_sync(dev);
7256 pm_runtime_disable(dev);
7257 pm_runtime_put_noidle(dev);
7258
7253 stmmac_stop_all_dma(priv);7259 stmmac_stop_all_dma(priv);
7254 stmmac_mac_set(priv, priv->ioaddr, false);7260 stmmac_mac_set(priv, priv->ioaddr, false);
7255 netif_carrier_off(ndev);7261 netif_carrier_off(ndev);
@@ -7268,8 +7274,6 @@ int stmmac_dvr_remove(struct device *dev) · 12 unmodified lines
7268 if (priv->plat->stmmac_rst)7274 if (priv->plat->stmmac_rst)
7269 reset_control_assert(priv->plat->stmmac_rst);7275 reset_control_assert(priv->plat->stmmac_rst);
7270 reset_control_assert(priv->plat->stmmac_ahb_rst);7276 reset_control_assert(priv->plat->stmmac_ahb_rst);
7271 pm_runtime_put(dev);
7272 pm_runtime_disable(dev);
7273 if (priv->hw->pcs != STMMAC_PCS_TBI &&7277 if (priv->hw->pcs != STMMAC_PCS_TBI &&
7274 priv->hw->pcs != STMMAC_PCS_RTBI)7278 priv->hw->pcs != STMMAC_PCS_RTBI)
7275 stmmac_mdio_unregister(ndev);7279 stmmac_mdio_unregister(ndev);
drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c+0−3
@@ -297,9 +297,6 @@ void stmmac_ptp_register(struct stmmac_priv *priv) · 296 unmodified lines
297{297{
298 int i;298 int i;
299 299
300 if (priv->plat->ptp_clk_freq_config)
301 priv->plat->ptp_clk_freq_config(priv);
302
303 for (i = 0; i < priv->dma_cap.pps_out_num; i++) {300 for (i = 0; i < priv->dma_cap.pps_out_num; i++) {
304 if (i >= STMMAC_PPS_MAX)301 if (i >= STMMAC_PPS_MAX)
305 break;302 break;
drivers/net/ethernet/ti/cpsw_priv.c+1−1
@@ -1146,7 +1146,7 @@ int cpsw_fill_rx_channels(struct cpsw_priv *priv) · 1145 unmodified lines
1146static struct page_pool *cpsw_create_page_pool(struct cpsw_common *cpsw,1146static struct page_pool *cpsw_create_page_pool(struct cpsw_common *cpsw,
1147 int size)1147 int size)
1148{1148{
1149 struct page_pool_params pp_params;1149 struct page_pool_params pp_params = {};
1150 struct page_pool *pool;1150 struct page_pool *pool;
1151 1151
1152 pp_params.order = 0;1152 pp_params.order = 0;
drivers/net/ethernet/tundra/tsi108_eth.c+18−17
@@ -1091,20 +1091,22 @@ static int tsi108_get_mac(struct net_device *dev) · 1090 unmodified lines
1091 struct tsi108_prv_data *data = netdev_priv(dev);1091 struct tsi108_prv_data *data = netdev_priv(dev);
1092 u32 word1 = TSI_READ(TSI108_MAC_ADDR1);1092 u32 word1 = TSI_READ(TSI108_MAC_ADDR1);
1093 u32 word2 = TSI_READ(TSI108_MAC_ADDR2);1093 u32 word2 = TSI_READ(TSI108_MAC_ADDR2);
1094 u8 addr[ETH_ALEN];
1094 1095
1095 /* Note that the octets are reversed from what the manual says,1096 /* Note that the octets are reversed from what the manual says,
1096 * producing an even weirder ordering...1097 * producing an even weirder ordering...
1097 */1098 */
1098 if (word2 == 0 && word1 == 0) {1099 if (word2 == 0 && word1 == 0) {
1099 dev->dev_addr[0] = 0x00;1100 addr[0] = 0x00;
1100 dev->dev_addr[1] = 0x06;1101 addr[1] = 0x06;
1101 dev->dev_addr[2] = 0xd2;1102 addr[2] = 0xd2;
1102 dev->dev_addr[3] = 0x00;1103 addr[3] = 0x00;
1103 dev->dev_addr[4] = 0x00;1104 addr[4] = 0x00;
1104 if (0x8 == data->phy)1105 if (0x8 == data->phy)
1105 dev->dev_addr[5] = 0x01;1106 addr[5] = 0x01;
1106 else1107 else
1107 dev->dev_addr[5] = 0x02;1108 addr[5] = 0x02;
1109 eth_hw_addr_set(dev, addr);
1108 1110
1109 word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);1111 word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
1110 1112
@@ -1114,12 +1116,13 @@ static int tsi108_get_mac(struct net_device *dev) · 3 unmodified lines
1114 TSI_WRITE(TSI108_MAC_ADDR1, word1);1116 TSI_WRITE(TSI108_MAC_ADDR1, word1);
1115 TSI_WRITE(TSI108_MAC_ADDR2, word2);1117 TSI_WRITE(TSI108_MAC_ADDR2, word2);
1116 } else {1118 } else {
1117 dev->dev_addr[0] = (word2 >> 16) & 0xff;1119 addr[0] = (word2 >> 16) & 0xff;
1118 dev->dev_addr[1] = (word2 >> 24) & 0xff;1120 addr[1] = (word2 >> 24) & 0xff;
1119 dev->dev_addr[2] = (word1 >> 0) & 0xff;1121 addr[2] = (word1 >> 0) & 0xff;
1120 dev->dev_addr[3] = (word1 >> 8) & 0xff;1122 addr[3] = (word1 >> 8) & 0xff;
1121 dev->dev_addr[4] = (word1 >> 16) & 0xff;1123 addr[4] = (word1 >> 16) & 0xff;
1122 dev->dev_addr[5] = (word1 >> 24) & 0xff;1124 addr[5] = (word1 >> 24) & 0xff;
1125 eth_hw_addr_set(dev, addr);
1123 }1126 }
1124 1127
1125 if (!is_valid_ether_addr(dev->dev_addr)) {1128 if (!is_valid_ether_addr(dev->dev_addr)) {
@@ -1136,14 +1139,12 @@ static int tsi108_set_mac(struct net_device *dev, void *addr) · 10 unmodified lines
1136{1139{
1137 struct tsi108_prv_data *data = netdev_priv(dev);1140 struct tsi108_prv_data *data = netdev_priv(dev);
1138 u32 word1, word2;1141 u32 word1, word2;
1139 int i;
1140 1142
1141 if (!is_valid_ether_addr(addr))1143 if (!is_valid_ether_addr(addr))
1142 return -EADDRNOTAVAIL;1144 return -EADDRNOTAVAIL;
1143 1145
1144 for (i = 0; i < 6; i++)1146 /* +2 is for the offset of the HW addr type */
1145 /* +2 is for the offset of the HW addr type */1147 eth_hw_addr_set(dev, ((unsigned char *)addr) + 2);
1146 dev->dev_addr[i] = ((unsigned char *)addr)[i + 2];
1147 1148
1148 word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);1149 word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
1149 1150
drivers/net/hamradio/yam.c+1−3
@@ -950,9 +950,7 @@ static int yam_siocdevprivate(struct net_device *dev, struct ifreq *ifr, void __ · 949 unmodified lines
950 ym = memdup_user(data, sizeof(struct yamdrv_ioctl_mcs));950 ym = memdup_user(data, sizeof(struct yamdrv_ioctl_mcs));
951 if (IS_ERR(ym))951 if (IS_ERR(ym))
952 return PTR_ERR(ym);952 return PTR_ERR(ym);
953 if (ym->cmd != SIOCYAMSMCS)953 if (ym->cmd != SIOCYAMSMCS || ym->bitrate > YAM_MAXBITRATE) {
954 return -EINVAL;
955 if (ym->bitrate > YAM_MAXBITRATE) {
956 kfree(ym);954 kfree(ym);
957 return -EINVAL;955 return -EINVAL;
958 }956 }
drivers/net/ieee802154/at86rf230.c+11−2
@@ -100,6 +100,7 @@ struct at86rf230_local { · 99 unmodified lines
100 unsigned long cal_timeout;100 unsigned long cal_timeout;
101 bool is_tx;101 bool is_tx;
102 bool is_tx_from_off;102 bool is_tx_from_off;
103 bool was_tx;
103 u8 tx_retry;104 u8 tx_retry;
104 struct sk_buff *tx_skb;105 struct sk_buff *tx_skb;
105 struct at86rf230_state_change tx;106 struct at86rf230_state_change tx;
@@ -343,7 +344,11 @@ at86rf230_async_error_recover_complete(void *context) · 237 unmodified lines
343 if (ctx->free)344 if (ctx->free)
344 kfree(ctx);345 kfree(ctx);
345 346
346 ieee802154_wake_queue(lp->hw);347 if (lp->was_tx) {
348 lp->was_tx = 0;
349 dev_kfree_skb_any(lp->tx_skb);
350 ieee802154_wake_queue(lp->hw);
351 }
347}352}
348 353
349static void354static void
@@ -352,7 +357,11 @@ at86rf230_async_error_recover(void *context) · 2 unmodified lines
352 struct at86rf230_state_change *ctx = context;357 struct at86rf230_state_change *ctx = context;
353 struct at86rf230_local *lp = ctx->lp;358 struct at86rf230_local *lp = ctx->lp;
354 359
355 lp->is_tx = 0;360 if (lp->is_tx) {
361 lp->was_tx = 1;
362 lp->is_tx = 0;
363 }
364
356 at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON,365 at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON,
357 at86rf230_async_error_recover_complete);366 at86rf230_async_error_recover_complete);
358}367}
drivers/net/ieee802154/ca8210.c+3−2
@@ -1771,6 +1771,7 @@ static int ca8210_async_xmit_complete( · 1770 unmodified lines
1771 status1771 status
1772 );1772 );
1773 if (status != MAC_TRANSACTION_OVERFLOW) {1773 if (status != MAC_TRANSACTION_OVERFLOW) {
1774 dev_kfree_skb_any(priv->tx_skb);
1774 ieee802154_wake_queue(priv->hw);1775 ieee802154_wake_queue(priv->hw);
1775 return 0;1776 return 0;
1776 }1777 }
@@ -2974,8 +2975,8 @@ static void ca8210_hw_setup(struct ieee802154_hw *ca8210_hw) · 1197 unmodified lines
2974 ca8210_hw->phy->cca.opt = NL802154_CCA_OPT_ENERGY_CARRIER_AND;2975 ca8210_hw->phy->cca.opt = NL802154_CCA_OPT_ENERGY_CARRIER_AND;
2975 ca8210_hw->phy->cca_ed_level = -9800;2976 ca8210_hw->phy->cca_ed_level = -9800;
2976 ca8210_hw->phy->symbol_duration = 16;2977 ca8210_hw->phy->symbol_duration = 16;
2977 ca8210_hw->phy->lifs_period = 40;2978 ca8210_hw->phy->lifs_period = 40 * ca8210_hw->phy->symbol_duration;
2978 ca8210_hw->phy->sifs_period = 12;2979 ca8210_hw->phy->sifs_period = 12 * ca8210_hw->phy->symbol_duration;
2979 ca8210_hw->flags =2980 ca8210_hw->flags =
2980 IEEE802154_HW_AFILT |2981 IEEE802154_HW_AFILT |
2981 IEEE802154_HW_OMIT_CKSUM |2982 IEEE802154_HW_OMIT_CKSUM |
drivers/net/ieee802154/mac802154_hwsim.c+1−0
@@ -786,6 +786,7 @@ static int hwsim_add_one(struct genl_info *info, struct device *dev, · 785 unmodified lines
786 goto err_pib;786 goto err_pib;
787 }787 }
788 788
789 pib->channel = 13;
789 rcu_assign_pointer(phy->pib, pib);790 rcu_assign_pointer(phy->pib, pib);
790 phy->idx = idx;791 phy->idx = idx;
791 INIT_LIST_HEAD(&phy->edges);792 INIT_LIST_HEAD(&phy->edges);
drivers/net/ieee802154/mcr20a.c+2−2
@@ -976,8 +976,8 @@ static void mcr20a_hw_setup(struct mcr20a_local *lp) · 975 unmodified lines
976 dev_dbg(printdev(lp), "%s\n", __func__);976 dev_dbg(printdev(lp), "%s\n", __func__);
977 977
978 phy->symbol_duration = 16;978 phy->symbol_duration = 16;
979 phy->lifs_period = 40;979 phy->lifs_period = 40 * phy->symbol_duration;
980 phy->sifs_period = 12;980 phy->sifs_period = 12 * phy->symbol_duration;
981 981
982 hw->flags = IEEE802154_HW_TX_OMIT_CKSUM |982 hw->flags = IEEE802154_HW_TX_OMIT_CKSUM |
983 IEEE802154_HW_AFILT |983 IEEE802154_HW_AFILT |
drivers/net/ipa/ipa_power.c+52−0
@@ -11,6 +11,8 @@ · 10 unmodified lines
11#include <linux/pm_runtime.h>11#include <linux/pm_runtime.h>
12#include <linux/bitops.h>12#include <linux/bitops.h>
13 13
14#include "linux/soc/qcom/qcom_aoss.h"
15
14#include "ipa.h"16#include "ipa.h"
15#include "ipa_power.h"17#include "ipa_power.h"
16#include "ipa_endpoint.h"18#include "ipa_endpoint.h"
@@ -64,6 +66,7 @@ enum ipa_power_flag { · 47 unmodified lines
64 * struct ipa_power - IPA power management information66 * struct ipa_power - IPA power management information
65 * @dev: IPA device pointer67 * @dev: IPA device pointer
66 * @core: IPA core clock68 * @core: IPA core clock
69 * @qmp: QMP handle for AOSS communication
67 * @spinlock: Protects modem TX queue enable/disable70 * @spinlock: Protects modem TX queue enable/disable
68 * @flags: Boolean state flags71 * @flags: Boolean state flags
69 * @interconnect_count: Number of elements in interconnect[]72 * @interconnect_count: Number of elements in interconnect[]
@@ -72,6 +75,7 @@ enum ipa_power_flag { · 2 unmodified lines
72struct ipa_power {75struct ipa_power {
73 struct device *dev;76 struct device *dev;
74 struct clk *core;77 struct clk *core;
78 struct qmp *qmp;
75 spinlock_t spinlock; /* used with STOPPED/STARTED power flags */79 spinlock_t spinlock; /* used with STOPPED/STARTED power flags */
76 DECLARE_BITMAP(flags, IPA_POWER_FLAG_COUNT);80 DECLARE_BITMAP(flags, IPA_POWER_FLAG_COUNT);
77 u32 interconnect_count;81 u32 interconnect_count;
@@ -382,6 +386,47 @@ void ipa_power_modem_queue_active(struct ipa *ipa) · 304 unmodified lines
382 clear_bit(IPA_POWER_FLAG_STARTED, ipa->power->flags);386 clear_bit(IPA_POWER_FLAG_STARTED, ipa->power->flags);
383}387}
384 388
389static int ipa_power_retention_init(struct ipa_power *power)
390{
391 struct qmp *qmp = qmp_get(power->dev);
392
393 if (IS_ERR(qmp)) {
394 if (PTR_ERR(qmp) == -EPROBE_DEFER)
395 return -EPROBE_DEFER;
396
397 /* We assume any other error means it's not defined/needed */
398 qmp = NULL;
399 }
400 power->qmp = qmp;
401
402 return 0;
403}
404
405static void ipa_power_retention_exit(struct ipa_power *power)
406{
407 qmp_put(power->qmp);
408 power->qmp = NULL;
409}
410
411/* Control register retention on power collapse */
412void ipa_power_retention(struct ipa *ipa, bool enable)
413{
414 static const char fmt[] = "{ class: bcm, res: ipa_pc, val: %c }";
415 struct ipa_power *power = ipa->power;
416 char buf[36]; /* Exactly enough for fmt[]; size a multiple of 4 */
417 int ret;
418
419 if (!power->qmp)
420 return; /* Not needed on this platform */
421
422 (void)snprintf(buf, sizeof(buf), fmt, enable ? '1' : '0');
423
424 ret = qmp_send(power->qmp, buf, sizeof(buf));
425 if (ret)
426 dev_err(power->dev, "error %d sending QMP %sable request\n",
427 ret, enable ? "en" : "dis");
428}
429
385int ipa_power_setup(struct ipa *ipa)430int ipa_power_setup(struct ipa *ipa)
386{431{
387 int ret;432 int ret;
@@ -438,12 +483,18 @@ ipa_power_init(struct device *dev, const struct ipa_power_data *data) · 50 unmodified lines
438 if (ret)483 if (ret)
439 goto err_kfree;484 goto err_kfree;
440 485
486 ret = ipa_power_retention_init(power);
487 if (ret)
488 goto err_interconnect_exit;
489
441 pm_runtime_set_autosuspend_delay(dev, IPA_AUTOSUSPEND_DELAY);490 pm_runtime_set_autosuspend_delay(dev, IPA_AUTOSUSPEND_DELAY);
442 pm_runtime_use_autosuspend(dev);491 pm_runtime_use_autosuspend(dev);
443 pm_runtime_enable(dev);492 pm_runtime_enable(dev);
444 493
445 return power;494 return power;
446 495
496err_interconnect_exit:
497 ipa_interconnect_exit(power);
447err_kfree:498err_kfree:
448 kfree(power);499 kfree(power);
449err_clk_put:500err_clk_put:
@@ -460,6 +511,7 @@ void ipa_power_exit(struct ipa_power *power) · 10 unmodified lines
460 511
461 pm_runtime_disable(dev);512 pm_runtime_disable(dev);
462 pm_runtime_dont_use_autosuspend(dev);513 pm_runtime_dont_use_autosuspend(dev);
514 ipa_power_retention_exit(power);
463 ipa_interconnect_exit(power);515 ipa_interconnect_exit(power);
464 kfree(power);516 kfree(power);
465 clk_put(clk);517 clk_put(clk);
drivers/net/ipa/ipa_power.h+7−0
@@ -40,6 +40,13 @@ void ipa_power_modem_queue_wake(struct ipa *ipa); · 39 unmodified lines
40 */40 */
41void ipa_power_modem_queue_active(struct ipa *ipa);41void ipa_power_modem_queue_active(struct ipa *ipa);
42 42
43/**
44 * ipa_power_retention() - Control register retention on power collapse
45 * @ipa: IPA pointer
46 * @enable: Whether retention should be enabled or disabled
47 */
48void ipa_power_retention(struct ipa *ipa, bool enable);
49
43/**50/**
44 * ipa_power_setup() - Set up IPA power management51 * ipa_power_setup() - Set up IPA power management
45 * @ipa: IPA pointer52 * @ipa: IPA pointer
drivers/net/ipa/ipa_uc.c+5−0
@@ -11,6 +11,7 @@ · 10 unmodified lines
11 11
12#include "ipa.h"12#include "ipa.h"
13#include "ipa_uc.h"13#include "ipa_uc.h"
14#include "ipa_power.h"
14 15
15/**16/**
16 * DOC: The IPA embedded microcontroller17 * DOC: The IPA embedded microcontroller
@@ -154,6 +155,7 @@ static void ipa_uc_response_hdlr(struct ipa *ipa, enum ipa_irq_id irq_id) · 137 unmodified lines
154 case IPA_UC_RESPONSE_INIT_COMPLETED:155 case IPA_UC_RESPONSE_INIT_COMPLETED:
155 if (ipa->uc_powered) {156 if (ipa->uc_powered) {
156 ipa->uc_loaded = true;157 ipa->uc_loaded = true;
158 ipa_power_retention(ipa, true);
157 pm_runtime_mark_last_busy(dev);159 pm_runtime_mark_last_busy(dev);
158 (void)pm_runtime_put_autosuspend(dev);160 (void)pm_runtime_put_autosuspend(dev);
159 ipa->uc_powered = false;161 ipa->uc_powered = false;
@@ -184,6 +186,9 @@ void ipa_uc_deconfig(struct ipa *ipa) · 24 unmodified lines
184 186
185 ipa_interrupt_remove(ipa->interrupt, IPA_IRQ_UC_1);187 ipa_interrupt_remove(ipa->interrupt, IPA_IRQ_UC_1);
186 ipa_interrupt_remove(ipa->interrupt, IPA_IRQ_UC_0);188 ipa_interrupt_remove(ipa->interrupt, IPA_IRQ_UC_0);
189 if (ipa->uc_loaded)
190 ipa_power_retention(ipa, false);
191
187 if (!ipa->uc_powered)192 if (!ipa->uc_powered)
188 return;193 return;
189 194
drivers/net/macsec.c+21−12
@@ -3870,6 +3870,18 @@ static void macsec_common_dellink(struct net_device *dev, struct list_head *head · 3869 unmodified lines
3870 struct macsec_dev *macsec = macsec_priv(dev);3870 struct macsec_dev *macsec = macsec_priv(dev);
3871 struct net_device *real_dev = macsec->real_dev;3871 struct net_device *real_dev = macsec->real_dev;
3872 3872
3873 /* If h/w offloading is available, propagate to the device */
3874 if (macsec_is_offloaded(macsec)) {
3875 const struct macsec_ops *ops;
3876 struct macsec_context ctx;
3877
3878 ops = macsec_get_ops(netdev_priv(dev), &ctx);
3879 if (ops) {
3880 ctx.secy = &macsec->secy;
3881 macsec_offload(ops->mdo_del_secy, &ctx);
3882 }
3883 }
3884
3873 unregister_netdevice_queue(dev, head);3885 unregister_netdevice_queue(dev, head);
3874 list_del_rcu(&macsec->secys);3886 list_del_rcu(&macsec->secys);
3875 macsec_del_dev(macsec);3887 macsec_del_dev(macsec);
@@ -3884,18 +3896,6 @@ static void macsec_dellink(struct net_device *dev, struct list_head *head) · 8 unmodified lines
3884 struct net_device *real_dev = macsec->real_dev;3896 struct net_device *real_dev = macsec->real_dev;
3885 struct macsec_rxh_data *rxd = macsec_data_rtnl(real_dev);3897 struct macsec_rxh_data *rxd = macsec_data_rtnl(real_dev);
3886 3898
3887 /* If h/w offloading is available, propagate to the device */
3888 if (macsec_is_offloaded(macsec)) {
3889 const struct macsec_ops *ops;
3890 struct macsec_context ctx;
3891
3892 ops = macsec_get_ops(netdev_priv(dev), &ctx);
3893 if (ops) {
3894 ctx.secy = &macsec->secy;
3895 macsec_offload(ops->mdo_del_secy, &ctx);
3896 }
3897 }
3898
3899 macsec_common_dellink(dev, head);3899 macsec_common_dellink(dev, head);
3900 3900
3901 if (list_empty(&rxd->secys)) {3901 if (list_empty(&rxd->secys)) {
@@ -4018,6 +4018,15 @@ static int macsec_newlink(struct net *net, struct net_device *dev, · 116 unmodified lines
4018 !macsec_check_offload(macsec->offload, macsec))4018 !macsec_check_offload(macsec->offload, macsec))
4019 return -EOPNOTSUPP;4019 return -EOPNOTSUPP;
4020 4020
4021 /* send_sci must be set to true when transmit sci explicitly is set */
4022 if ((data && data[IFLA_MACSEC_SCI]) &&
4023 (data && data[IFLA_MACSEC_INC_SCI])) {
4024 u8 send_sci = !!nla_get_u8(data[IFLA_MACSEC_INC_SCI]);
4025
4026 if (!send_sci)
4027 return -EINVAL;
4028 }
4029
4021 if (data && data[IFLA_MACSEC_ICV_LEN])4030 if (data && data[IFLA_MACSEC_ICV_LEN])
4022 icv_len = nla_get_u8(data[IFLA_MACSEC_ICV_LEN]);4031 icv_len = nla_get_u8(data[IFLA_MACSEC_ICV_LEN]);
4023 mtu = real_dev->mtu - icv_len - macsec_extra_len(true);4032 mtu = real_dev->mtu - icv_len - macsec_extra_len(true);
drivers/net/mctp/mctp-serial.c+8−1
@@ -403,8 +403,16 @@ static void mctp_serial_tty_receive_buf(struct tty_struct *tty, · 402 unmodified lines
403 mctp_serial_push(dev, c[i]);403 mctp_serial_push(dev, c[i]);
404}404}
405 405
406static void mctp_serial_uninit(struct net_device *ndev)
407{
408 struct mctp_serial *dev = netdev_priv(ndev);
409
410 cancel_work_sync(&dev->tx_work);
411}
412
406static const struct net_device_ops mctp_serial_netdev_ops = {413static const struct net_device_ops mctp_serial_netdev_ops = {
407 .ndo_start_xmit = mctp_serial_tx,414 .ndo_start_xmit = mctp_serial_tx,
415 .ndo_uninit = mctp_serial_uninit,
408};416};
409 417
410static void mctp_serial_setup(struct net_device *ndev)418static void mctp_serial_setup(struct net_device *ndev)
@@ -483,7 +491,6 @@ static void mctp_serial_close(struct tty_struct *tty) · 72 unmodified lines
483 int idx = dev->idx;491 int idx = dev->idx;
484 492
485 unregister_netdev(dev->netdev);493 unregister_netdev(dev->netdev);
486 cancel_work_sync(&dev->tx_work);
487 ida_free(&mctp_serial_ida, idx);494 ida_free(&mctp_serial_ida, idx);
488}495}
489 496
drivers/net/mdio/mdio-aspeed.c+1−0
@@ -148,6 +148,7 @@ static const struct of_device_id aspeed_mdio_of_match[] = { · 147 unmodified lines
148 { .compatible = "aspeed,ast2600-mdio", },148 { .compatible = "aspeed,ast2600-mdio", },
149 { },149 { },
150};150};
151MODULE_DEVICE_TABLE(of, aspeed_mdio_of_match);
151 152
152static struct platform_driver aspeed_mdio_driver = {153static struct platform_driver aspeed_mdio_driver = {
153 .driver = {154 .driver = {
drivers/net/netdevsim/fib.c+2−2
@@ -623,14 +623,14 @@ static int nsim_fib6_rt_append(struct nsim_fib_data *data, · 622 unmodified lines
623 if (err)623 if (err)
624 goto err_fib6_rt_nh_del;624 goto err_fib6_rt_nh_del;
625 625
626 fib6_event->rt_arr[i]->trap = true;626 WRITE_ONCE(fib6_event->rt_arr[i]->trap, true);
627 }627 }
628 628
629 return 0;629 return 0;
630 630
631err_fib6_rt_nh_del:631err_fib6_rt_nh_del:
632 for (i--; i >= 0; i--) {632 for (i--; i >= 0; i--) {
633 fib6_event->rt_arr[i]->trap = false;633 WRITE_ONCE(fib6_event->rt_arr[i]->trap, false);
634 nsim_fib6_rt_nh_del(fib6_rt, fib6_event->rt_arr[i]);634 nsim_fib6_rt_nh_del(fib6_rt, fib6_event->rt_arr[i]);
635 }635 }
636 return err;636 return err;
drivers/net/phy/at803x.c+13−13
@@ -1688,19 +1688,19 @@ static int qca808x_read_status(struct phy_device *phydev) · 1687 unmodified lines
1688 if (ret < 0)1688 if (ret < 0)
1689 return ret;1689 return ret;
1690 1690
1691 if (phydev->link && phydev->speed == SPEED_2500)1691 if (phydev->link) {
1692 phydev->interface = PHY_INTERFACE_MODE_2500BASEX;1692 if (phydev->speed == SPEED_2500)
1693 else1693 phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
1694 phydev->interface = PHY_INTERFACE_MODE_SMII;1694 else
1695 1695 phydev->interface = PHY_INTERFACE_MODE_SGMII;
1696 /* generate seed as a lower random value to make PHY linked as SLAVE easily,1696 } else {
1697 * except for master/slave configuration fault detected.1697 /* generate seed as a lower random value to make PHY linked as SLAVE easily,
1698 * the reason for not putting this code into the function link_change_notify is1698 * except for master/slave configuration fault detected.
1699 * the corner case where the link partner is also the qca8081 PHY and the seed1699 * the reason for not putting this code into the function link_change_notify is
1700 * value is configured as the same value, the link can't be up and no link change1700 * the corner case where the link partner is also the qca8081 PHY and the seed
1701 * occurs.1701 * value is configured as the same value, the link can't be up and no link change
1702 */1702 * occurs.
1703 if (!phydev->link) {1703 */
1704 if (phydev->master_slave_state == MASTER_SLAVE_STATE_ERR) {1704 if (phydev->master_slave_state == MASTER_SLAVE_STATE_ERR) {
1705 qca808x_phy_ms_seed_enable(phydev, false);1705 qca808x_phy_ms_seed_enable(phydev, false);
1706 } else {1706 } else {
drivers/net/phy/broadcom.c+1−0
@@ -854,6 +854,7 @@ static struct phy_driver broadcom_drivers[] = { · 853 unmodified lines
854 .phy_id_mask = 0xfffffff0,854 .phy_id_mask = 0xfffffff0,
855 .name = "Broadcom BCM54616S",855 .name = "Broadcom BCM54616S",
856 /* PHY_GBIT_FEATURES */856 /* PHY_GBIT_FEATURES */
857 .soft_reset = genphy_soft_reset,
857 .config_init = bcm54xx_config_init,858 .config_init = bcm54xx_config_init,
858 .config_aneg = bcm54616s_config_aneg,859 .config_aneg = bcm54616s_config_aneg,
859 .config_intr = bcm_phy_config_intr,860 .config_intr = bcm_phy_config_intr,
drivers/net/phy/marvell.c+9−8
@@ -553,9 +553,9 @@ static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev) · 552 unmodified lines
553 else553 else
554 mscr = 0;554 mscr = 0;
555 555
556 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,556 return phy_modify_paged_changed(phydev, MII_MARVELL_MSCR_PAGE,
557 MII_88E1121_PHY_MSCR_REG,557 MII_88E1121_PHY_MSCR_REG,
558 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);558 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
559}559}
560 560
561static int m88e1121_config_aneg(struct phy_device *phydev)561static int m88e1121_config_aneg(struct phy_device *phydev)
@@ -569,11 +569,13 @@ static int m88e1121_config_aneg(struct phy_device *phydev) · 7 unmodified lines
569 return err;569 return err;
570 }570 }
571 571
572 changed = err;
573
572 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);574 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
573 if (err < 0)575 if (err < 0)
574 return err;576 return err;
575 577
576 changed = err;578 changed |= err;
577 579
578 err = genphy_config_aneg(phydev);580 err = genphy_config_aneg(phydev);
579 if (err < 0)581 if (err < 0)
@@ -1213,16 +1215,15 @@ static int m88e1118_config_aneg(struct phy_device *phydev) · 633 unmodified lines
1213{1215{
1214 int err;1216 int err;
1215 1217
1216 err = genphy_soft_reset(phydev);1218 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
1217 if (err < 0)1219 if (err < 0)
1218 return err;1220 return err;
1219 1221
1220 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);1222 err = genphy_config_aneg(phydev);
1221 if (err < 0)1223 if (err < 0)
1222 return err;1224 return err;
1223 1225
1224 err = genphy_config_aneg(phydev);1226 return genphy_soft_reset(phydev);
1225 return 0;
1226}1227}
1227 1228
1228static int m88e1118_config_init(struct phy_device *phydev)1229static int m88e1118_config_init(struct phy_device *phydev)
drivers/net/phy/mediatek-ge.c+0−3
@@ -55,9 +55,6 @@ static int mt7530_phy_config_init(struct phy_device *phydev) · 54 unmodified lines
55 55
56static int mt7531_phy_config_init(struct phy_device *phydev)56static int mt7531_phy_config_init(struct phy_device *phydev)
57{57{
58 if (phydev->interface != PHY_INTERFACE_MODE_INTERNAL)
59 return -EINVAL;
60
61 mtk_gephy_config_init(phydev);58 mtk_gephy_config_init(phydev);
62 59
63 /* PHY link down power saving enable */60 /* PHY link down power saving enable */
drivers/net/phy/phy_device.c+3−3
@@ -1746,6 +1746,9 @@ void phy_detach(struct phy_device *phydev) · 1745 unmodified lines
1746 phy_driver_is_genphy_10g(phydev))1746 phy_driver_is_genphy_10g(phydev))
1747 device_release_driver(&phydev->mdio.dev);1747 device_release_driver(&phydev->mdio.dev);
1748 1748
1749 /* Assert the reset signal */
1750 phy_device_reset(phydev, 1);
1751
1749 /*1752 /*
1750 * The phydev might go away on the put_device() below, so avoid1753 * The phydev might go away on the put_device() below, so avoid
1751 * a use-after-free bug by reading the underlying bus first.1754 * a use-after-free bug by reading the underlying bus first.
@@ -1757,9 +1760,6 @@ void phy_detach(struct phy_device *phydev) · 5 unmodified lines
1757 ndev_owner = dev->dev.parent->driver->owner;1760 ndev_owner = dev->dev.parent->driver->owner;
1758 if (ndev_owner != bus->owner)1761 if (ndev_owner != bus->owner)
1759 module_put(bus->owner);1762 module_put(bus->owner);
1760
1761 /* Assert the reset signal */
1762 phy_device_reset(phydev, 1);
1763}1763}
1764EXPORT_SYMBOL(phy_detach);1764EXPORT_SYMBOL(phy_detach);
1765 1765
drivers/net/phy/sfp-bus.c+5−0
@@ -651,6 +651,11 @@ struct sfp_bus *sfp_bus_find_fwnode(struct fwnode_handle *fwnode) · 650 unmodified lines
651 else if (ret < 0)651 else if (ret < 0)
652 return ERR_PTR(ret);652 return ERR_PTR(ret);
653 653
654 if (!fwnode_device_is_available(ref.fwnode)) {
655 fwnode_handle_put(ref.fwnode);
656 return NULL;
657 }
658
654 bus = sfp_bus_get(ref.fwnode);659 bus = sfp_bus_get(ref.fwnode);
655 fwnode_handle_put(ref.fwnode);660 fwnode_handle_put(ref.fwnode);
656 if (!bus)661 if (!bus)
drivers/net/usb/ax88179_178a.c+39−29
@@ -1468,58 +1468,68 @@ static int ax88179_rx_fixup(struct usbnet *dev, struct sk_buff *skb) · 1467 unmodified lines
1468 u16 hdr_off;1468 u16 hdr_off;
1469 u32 *pkt_hdr;1469 u32 *pkt_hdr;
1470 1470
1471 /* This check is no longer done by usbnet */1471 /* At the end of the SKB, there's a header telling us how many packets
1472 if (skb->len < dev->net->hard_header_len)1472 * are bundled into this buffer and where we can find an array of
1473 * per-packet metadata (which contains elements encoded into u16).
1474 */
1475 if (skb->len < 4)
1473 return 0;1476 return 0;
1474
1475 skb_trim(skb, skb->len - 4);1477 skb_trim(skb, skb->len - 4);
1476 rx_hdr = get_unaligned_le32(skb_tail_pointer(skb));1478 rx_hdr = get_unaligned_le32(skb_tail_pointer(skb));
1477
1478 pkt_cnt = (u16)rx_hdr;1479 pkt_cnt = (u16)rx_hdr;
1479 hdr_off = (u16)(rx_hdr >> 16);1480 hdr_off = (u16)(rx_hdr >> 16);
1481
1482 if (pkt_cnt == 0)
1483 return 0;
1484
1485 /* Make sure that the bounds of the metadata array are inside the SKB
1486 * (and in front of the counter at the end).
1487 */
1488 if (pkt_cnt * 2 + hdr_off > skb->len)
1489 return 0;
1480 pkt_hdr = (u32 *)(skb->data + hdr_off);1490 pkt_hdr = (u32 *)(skb->data + hdr_off);
1481 1491
1482 while (pkt_cnt--) {1492 /* Packets must not overlap the metadata array */
1493 skb_trim(skb, hdr_off);
1494
1495 for (; ; pkt_cnt--, pkt_hdr++) {
1483 u16 pkt_len;1496 u16 pkt_len;
1484 1497
1485 le32_to_cpus(pkt_hdr);1498 le32_to_cpus(pkt_hdr);
1486 pkt_len = (*pkt_hdr >> 16) & 0x1fff;1499 pkt_len = (*pkt_hdr >> 16) & 0x1fff;
1487 1500
1488 /* Check CRC or runt packet */1501 if (pkt_len > skb->len)
1489 if ((*pkt_hdr & AX_RXHDR_CRC_ERR) ||1502 return 0;
1490 (*pkt_hdr & AX_RXHDR_DROP_ERR)) {
1491 skb_pull(skb, (pkt_len + 7) & 0xFFF8);
1492 pkt_hdr++;
1493 continue;
1494 }
1495
1496 if (pkt_cnt == 0) {
1497 skb->len = pkt_len;
1498 /* Skip IP alignment pseudo header */
1499 skb_pull(skb, 2);
1500 skb_set_tail_pointer(skb, skb->len);
1501 skb->truesize = pkt_len + sizeof(struct sk_buff);
1502 ax88179_rx_checksum(skb, pkt_hdr);
1503 return 1;
1504 }
1505 1503
1506 ax_skb = skb_clone(skb, GFP_ATOMIC);1504 /* Check CRC or runt packet */
1507 if (ax_skb) {1505 if (((*pkt_hdr & (AX_RXHDR_CRC_ERR | AX_RXHDR_DROP_ERR)) == 0) &&
1506 pkt_len >= 2 + ETH_HLEN) {
1507 bool last = (pkt_cnt == 0);
1508
1509 if (last) {
1510 ax_skb = skb;
1511 } else {
1512 ax_skb = skb_clone(skb, GFP_ATOMIC);
1513 if (!ax_skb)
1514 return 0;
1515 }
1508 ax_skb->len = pkt_len;1516 ax_skb->len = pkt_len;
1509 /* Skip IP alignment pseudo header */1517 /* Skip IP alignment pseudo header */
1510 skb_pull(ax_skb, 2);1518 skb_pull(ax_skb, 2);
1511 skb_set_tail_pointer(ax_skb, ax_skb->len);1519 skb_set_tail_pointer(ax_skb, ax_skb->len);
1512 ax_skb->truesize = pkt_len + sizeof(struct sk_buff);1520 ax_skb->truesize = pkt_len + sizeof(struct sk_buff);
1513 ax88179_rx_checksum(ax_skb, pkt_hdr);1521 ax88179_rx_checksum(ax_skb, pkt_hdr);
1522
1523 if (last)
1524 return 1;
1525
1514 usbnet_skb_return(dev, ax_skb);1526 usbnet_skb_return(dev, ax_skb);
1515 } else {
1516 return 0;
1517 }1527 }
1518 1528
1519 skb_pull(skb, (pkt_len + 7) & 0xFFF8);1529 /* Trim this packet away from the SKB */
1520 pkt_hdr++;1530 if (!skb_pull(skb, (pkt_len + 7) & 0xFFF8))
1531 return 0;
1521 }1532 }
1522 return 1;
1523}1533}
1524 1534
1525static struct sk_buff *1535static struct sk_buff *
drivers/net/usb/cdc_ether.c+12−0
@@ -583,6 +583,11 @@ static const struct usb_device_id products[] = { · 582 unmodified lines
583 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \583 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
584 .bInterfaceProtocol = USB_CDC_PROTO_NONE584 .bInterfaceProtocol = USB_CDC_PROTO_NONE
585 585
586#define ZAURUS_FAKE_INTERFACE \
587 .bInterfaceClass = USB_CLASS_COMM, \
588 .bInterfaceSubClass = USB_CDC_SUBCLASS_MDLM, \
589 .bInterfaceProtocol = USB_CDC_PROTO_NONE
590
586/* SA-1100 based Sharp Zaurus ("collie"), or compatible;591/* SA-1100 based Sharp Zaurus ("collie"), or compatible;
587 * wire-incompatible with true CDC Ethernet implementations.592 * wire-incompatible with true CDC Ethernet implementations.
588 * (And, it seems, needlessly so...)593 * (And, it seems, needlessly so...)
@@ -636,6 +641,13 @@ static const struct usb_device_id products[] = { · 47 unmodified lines
636 .idProduct = 0x9032, /* SL-6000 */641 .idProduct = 0x9032, /* SL-6000 */
637 ZAURUS_MASTER_INTERFACE,642 ZAURUS_MASTER_INTERFACE,
638 .driver_info = 0,643 .driver_info = 0,
644}, {
645 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO
646 | USB_DEVICE_ID_MATCH_DEVICE,
647 .idVendor = 0x04DD,
648 .idProduct = 0x9032, /* SL-6000 */
649 ZAURUS_FAKE_INTERFACE,
650 .driver_info = 0,
639}, {651}, {
640 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO652 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO
641 | USB_DEVICE_ID_MATCH_DEVICE,653 | USB_DEVICE_ID_MATCH_DEVICE,
drivers/net/usb/cdc_mbim.c+5−0
@@ -659,6 +659,11 @@ static const struct usb_device_id mbim_devs[] = { · 658 unmodified lines
659 .driver_info = (unsigned long)&cdc_mbim_info_avoid_altsetting_toggle,659 .driver_info = (unsigned long)&cdc_mbim_info_avoid_altsetting_toggle,
660 },660 },
661 661
662 /* Telit FN990 */
663 { USB_DEVICE_AND_INTERFACE_INFO(0x1bc7, 0x1071, USB_CLASS_COMM, USB_CDC_SUBCLASS_MBIM, USB_CDC_PROTO_NONE),
664 .driver_info = (unsigned long)&cdc_mbim_info_avoid_altsetting_toggle,
665 },
666
662 /* default entry */667 /* default entry */
663 { USB_INTERFACE_INFO(USB_CLASS_COMM, USB_CDC_SUBCLASS_MBIM, USB_CDC_PROTO_NONE),668 { USB_INTERFACE_INFO(USB_CLASS_COMM, USB_CDC_SUBCLASS_MBIM, USB_CDC_PROTO_NONE),
664 .driver_info = (unsigned long)&cdc_mbim_info_zlp,669 .driver_info = (unsigned long)&cdc_mbim_info_zlp,
drivers/net/usb/cdc_ncm.c+4−4
@@ -1715,10 +1715,10 @@ int cdc_ncm_rx_fixup(struct usbnet *dev, struct sk_buff *skb_in) · 1714 unmodified lines
1715{1715{
1716 struct sk_buff *skb;1716 struct sk_buff *skb;
1717 struct cdc_ncm_ctx *ctx = (struct cdc_ncm_ctx *)dev->data[0];1717 struct cdc_ncm_ctx *ctx = (struct cdc_ncm_ctx *)dev->data[0];
1718 int len;1718 unsigned int len;
1719 int nframes;1719 int nframes;
1720 int x;1720 int x;
1721 int offset;1721 unsigned int offset;
1722 union {1722 union {
1723 struct usb_cdc_ncm_ndp16 *ndp16;1723 struct usb_cdc_ncm_ndp16 *ndp16;
1724 struct usb_cdc_ncm_ndp32 *ndp32;1724 struct usb_cdc_ncm_ndp32 *ndp32;
@@ -1790,8 +1790,8 @@ next_ndp: · 65 unmodified lines
1790 break;1790 break;
1791 }1791 }
1792 1792
1793 /* sanity checking */1793 /* sanity checking - watch out for integer wrap*/
1794 if (((offset + len) > skb_in->len) ||1794 if ((offset > skb_in->len) || (len > skb_in->len - offset) ||
1795 (len > ctx->rx_max) || (len < ETH_HLEN)) {1795 (len > ctx->rx_max) || (len < ETH_HLEN)) {
1796 netif_dbg(dev, rx_err, dev->net,1796 netif_dbg(dev, rx_err, dev->net,
1797 "invalid frame detected (ignored) offset[%u]=%u, length=%u, skb=%p\n",1797 "invalid frame detected (ignored) offset[%u]=%u, length=%u, skb=%p\n",
drivers/net/usb/ipheth.c+3−3
@@ -121,7 +121,7 @@ static int ipheth_alloc_urbs(struct ipheth_device *iphone) · 120 unmodified lines
121 if (tx_buf == NULL)121 if (tx_buf == NULL)
122 goto free_rx_urb;122 goto free_rx_urb;
123 123
124 rx_buf = usb_alloc_coherent(iphone->udev, IPHETH_BUF_SIZE,124 rx_buf = usb_alloc_coherent(iphone->udev, IPHETH_BUF_SIZE + IPHETH_IP_ALIGN,
125 GFP_KERNEL, &rx_urb->transfer_dma);125 GFP_KERNEL, &rx_urb->transfer_dma);
126 if (rx_buf == NULL)126 if (rx_buf == NULL)
127 goto free_tx_buf;127 goto free_tx_buf;
@@ -146,7 +146,7 @@ error_nomem: · 18 unmodified lines
146 146
147static void ipheth_free_urbs(struct ipheth_device *iphone)147static void ipheth_free_urbs(struct ipheth_device *iphone)
148{148{
149 usb_free_coherent(iphone->udev, IPHETH_BUF_SIZE, iphone->rx_buf,149 usb_free_coherent(iphone->udev, IPHETH_BUF_SIZE + IPHETH_IP_ALIGN, iphone->rx_buf,
150 iphone->rx_urb->transfer_dma);150 iphone->rx_urb->transfer_dma);
151 usb_free_coherent(iphone->udev, IPHETH_BUF_SIZE, iphone->tx_buf,151 usb_free_coherent(iphone->udev, IPHETH_BUF_SIZE, iphone->tx_buf,
152 iphone->tx_urb->transfer_dma);152 iphone->tx_urb->transfer_dma);
@@ -317,7 +317,7 @@ static int ipheth_rx_submit(struct ipheth_device *dev, gfp_t mem_flags) · 164 unmodified lines
317 317
318 usb_fill_bulk_urb(dev->rx_urb, udev,318 usb_fill_bulk_urb(dev->rx_urb, udev,
319 usb_rcvbulkpipe(udev, dev->bulk_in),319 usb_rcvbulkpipe(udev, dev->bulk_in),
320 dev->rx_buf, IPHETH_BUF_SIZE,320 dev->rx_buf, IPHETH_BUF_SIZE + IPHETH_IP_ALIGN,
321 ipheth_rcvbulk_callback,321 ipheth_rcvbulk_callback,
322 dev);322 dev);
323 dev->rx_urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;323 dev->rx_urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
drivers/net/usb/qmi_wwan.c+2−0
@@ -1400,6 +1400,8 @@ static const struct usb_device_id products[] = { · 1399 unmodified lines
1400 {QMI_FIXED_INTF(0x413c, 0x81d7, 0)}, /* Dell Wireless 5821e */1400 {QMI_FIXED_INTF(0x413c, 0x81d7, 0)}, /* Dell Wireless 5821e */
1401 {QMI_FIXED_INTF(0x413c, 0x81d7, 1)}, /* Dell Wireless 5821e preproduction config */1401 {QMI_FIXED_INTF(0x413c, 0x81d7, 1)}, /* Dell Wireless 5821e preproduction config */
1402 {QMI_FIXED_INTF(0x413c, 0x81e0, 0)}, /* Dell Wireless 5821e with eSIM support*/1402 {QMI_FIXED_INTF(0x413c, 0x81e0, 0)}, /* Dell Wireless 5821e with eSIM support*/
1403 {QMI_FIXED_INTF(0x413c, 0x81e4, 0)}, /* Dell Wireless 5829e with eSIM support*/
1404 {QMI_FIXED_INTF(0x413c, 0x81e6, 0)}, /* Dell Wireless 5829e */
1403 {QMI_FIXED_INTF(0x03f0, 0x4e1d, 8)}, /* HP lt4111 LTE/EV-DO/HSPA+ Gobi 4G Module */1405 {QMI_FIXED_INTF(0x03f0, 0x4e1d, 8)}, /* HP lt4111 LTE/EV-DO/HSPA+ Gobi 4G Module */
1404 {QMI_FIXED_INTF(0x03f0, 0x9d1d, 1)}, /* HP lt4120 Snapdragon X5 LTE */1406 {QMI_FIXED_INTF(0x03f0, 0x9d1d, 1)}, /* HP lt4120 Snapdragon X5 LTE */
1405 {QMI_QUIRK_SET_DTR(0x22de, 0x9051, 2)}, /* Hucom Wireless HM-211S/K */1407 {QMI_QUIRK_SET_DTR(0x22de, 0x9051, 2)}, /* Hucom Wireless HM-211S/K */
drivers/net/usb/zaurus.c+12−0
@@ -256,6 +256,11 @@ static const struct usb_device_id products [] = { · 255 unmodified lines
256 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \256 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
257 .bInterfaceProtocol = USB_CDC_PROTO_NONE257 .bInterfaceProtocol = USB_CDC_PROTO_NONE
258 258
259#define ZAURUS_FAKE_INTERFACE \
260 .bInterfaceClass = USB_CLASS_COMM, \
261 .bInterfaceSubClass = USB_CDC_SUBCLASS_MDLM, \
262 .bInterfaceProtocol = USB_CDC_PROTO_NONE
263
259/* SA-1100 based Sharp Zaurus ("collie"), or compatible. */264/* SA-1100 based Sharp Zaurus ("collie"), or compatible. */
260{265{
261 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO266 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO
@@ -313,6 +318,13 @@ static const struct usb_device_id products [] = { · 51 unmodified lines
313 .idProduct = 0x9032, /* SL-6000 */318 .idProduct = 0x9032, /* SL-6000 */
314 ZAURUS_MASTER_INTERFACE,319 ZAURUS_MASTER_INTERFACE,
315 .driver_info = ZAURUS_PXA_INFO,320 .driver_info = ZAURUS_PXA_INFO,
321}, {
322 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO
323 | USB_DEVICE_ID_MATCH_DEVICE,
324 .idVendor = 0x04DD,
325 .idProduct = 0x9032, /* SL-6000 */
326 ZAURUS_FAKE_INTERFACE,
327 .driver_info = (unsigned long)&bogus_mdlm_info,
316}, {328}, {
317 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO329 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO
318 | USB_DEVICE_ID_MATCH_DEVICE,330 | USB_DEVICE_ID_MATCH_DEVICE,
drivers/net/veth.c+8−5
@@ -265,9 +265,10 @@ static void __veth_xdp_flush(struct veth_rq *rq) · 264 unmodified lines
265{265{
266 /* Write ptr_ring before reading rx_notify_masked */266 /* Write ptr_ring before reading rx_notify_masked */
267 smp_mb();267 smp_mb();
268 if (!rq->rx_notify_masked) {268 if (!READ_ONCE(rq->rx_notify_masked) &&
269 rq->rx_notify_masked = true;269 napi_schedule_prep(&rq->xdp_napi)) {
270 napi_schedule(&rq->xdp_napi);270 WRITE_ONCE(rq->rx_notify_masked, true);
271 __napi_schedule(&rq->xdp_napi);
271 }272 }
272}273}
273 274
@@ -912,8 +913,10 @@ static int veth_poll(struct napi_struct *napi, int budget) · 638 unmodified lines
912 /* Write rx_notify_masked before reading ptr_ring */913 /* Write rx_notify_masked before reading ptr_ring */
913 smp_store_mb(rq->rx_notify_masked, false);914 smp_store_mb(rq->rx_notify_masked, false);
914 if (unlikely(!__ptr_ring_empty(&rq->xdp_ring))) {915 if (unlikely(!__ptr_ring_empty(&rq->xdp_ring))) {
915 rq->rx_notify_masked = true;916 if (napi_schedule_prep(&rq->xdp_napi)) {
916 napi_schedule(&rq->xdp_napi);917 WRITE_ONCE(rq->rx_notify_masked, true);
918 __napi_schedule(&rq->xdp_napi);
919 }
917 }920 }
918 }921 }
919 922
drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.c+4−2
@@ -693,7 +693,7 @@ int brcmf_fw_get_firmwares(struct device *dev, struct brcmf_fw_request *req, · 692 unmodified lines
693{693{
694 struct brcmf_fw_item *first = &req->items[0];694 struct brcmf_fw_item *first = &req->items[0];
695 struct brcmf_fw *fwctx;695 struct brcmf_fw *fwctx;
696 char *alt_path;696 char *alt_path = NULL;
697 int ret;697 int ret;
698 698
699 brcmf_dbg(TRACE, "enter: dev=%s\n", dev_name(dev));699 brcmf_dbg(TRACE, "enter: dev=%s\n", dev_name(dev));
@@ -712,7 +712,9 @@ int brcmf_fw_get_firmwares(struct device *dev, struct brcmf_fw_request *req, · 12 unmodified lines
712 fwctx->done = fw_cb;712 fwctx->done = fw_cb;
713 713
714 /* First try alternative board-specific path if any */714 /* First try alternative board-specific path if any */
715 alt_path = brcm_alt_fw_path(first->path, fwctx->req->board_type);715 if (fwctx->req->board_type)
716 alt_path = brcm_alt_fw_path(first->path,
717 fwctx->req->board_type);
716 if (alt_path) {718 if (alt_path) {
717 ret = request_firmware_nowait(THIS_MODULE, true, alt_path,719 ret = request_firmware_nowait(THIS_MODULE, true, alt_path,
718 fwctx->dev, GFP_KERNEL, fwctx,720 fwctx->dev, GFP_KERNEL, fwctx,
drivers/net/wireless/intel/iwlwifi/Kconfig+0−13
@@ -80,19 +80,6 @@ config IWLWIFI_OPMODE_MODULAR · 79 unmodified lines
80comment "WARNING: iwlwifi is useless without IWLDVM or IWLMVM"80comment "WARNING: iwlwifi is useless without IWLDVM or IWLMVM"
81 depends on IWLDVM=n && IWLMVM=n81 depends on IWLDVM=n && IWLMVM=n
82 82
83config IWLWIFI_BCAST_FILTERING
84 bool "Enable broadcast filtering"
85 depends on IWLMVM
86 help
87 Say Y here to enable default bcast filtering configuration.
88
89 Enabling broadcast filtering will drop any incoming wireless
90 broadcast frames, except some very specific predefined
91 patterns (e.g. incoming arp requests).
92
93 If unsure, don't enable this option, as some programs might
94 expect incoming broadcasts for their normal operations.
95
96menu "Debugging Options"83menu "Debugging Options"
97 84
98config IWLWIFI_DEBUG85config IWLWIFI_DEBUG
drivers/net/wireless/intel/iwlwifi/fw/acpi.c+6−5
@@ -1,7 +1,7 @@
1// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause1// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2/*2/*
3 * Copyright (C) 2017 Intel Deutschland GmbH3 * Copyright (C) 2017 Intel Deutschland GmbH
4 * Copyright (C) 2019-2021 Intel Corporation4 * Copyright (C) 2019-2022 Intel Corporation
5 */5 */
6#include <linux/uuid.h>6#include <linux/uuid.h>
7#include "iwl-drv.h"7#include "iwl-drv.h"
@@ -888,10 +888,11 @@ bool iwl_sar_geo_support(struct iwl_fw_runtime *fwrt) · 880 unmodified lines
888 * only one using version 36, so skip this version entirely.888 * only one using version 36, so skip this version entirely.
889 */889 */
890 return IWL_UCODE_SERIAL(fwrt->fw->ucode_ver) >= 38 ||890 return IWL_UCODE_SERIAL(fwrt->fw->ucode_ver) >= 38 ||
891 IWL_UCODE_SERIAL(fwrt->fw->ucode_ver) == 17 ||891 (IWL_UCODE_SERIAL(fwrt->fw->ucode_ver) == 17 &&
892 (IWL_UCODE_SERIAL(fwrt->fw->ucode_ver) == 29 &&892 fwrt->trans->hw_rev != CSR_HW_REV_TYPE_3160) ||
893 ((fwrt->trans->hw_rev & CSR_HW_REV_TYPE_MSK) ==893 (IWL_UCODE_SERIAL(fwrt->fw->ucode_ver) == 29 &&
894 CSR_HW_REV_TYPE_7265D));894 ((fwrt->trans->hw_rev & CSR_HW_REV_TYPE_MSK) ==
895 CSR_HW_REV_TYPE_7265D));
895}896}
896IWL_EXPORT_SYMBOL(iwl_sar_geo_support);897IWL_EXPORT_SYMBOL(iwl_sar_geo_support);
897 898
drivers/net/wireless/intel/iwlwifi/fw/api/commands.h+0−5
@@ -501,11 +501,6 @@ enum iwl_legacy_cmds { · 500 unmodified lines
501 */501 */
502 DEBUG_LOG_MSG = 0xf7,502 DEBUG_LOG_MSG = 0xf7,
503 503
504 /**
505 * @BCAST_FILTER_CMD: &struct iwl_bcast_filter_cmd
506 */
507 BCAST_FILTER_CMD = 0xcf,
508
509 /**504 /**
510 * @MCAST_FILTER_CMD: &struct iwl_mcast_filter_cmd505 * @MCAST_FILTER_CMD: &struct iwl_mcast_filter_cmd
511 */506 */
drivers/net/wireless/intel/iwlwifi/fw/api/filter.h+0−88
@@ -36,92 +36,4 @@ struct iwl_mcast_filter_cmd { · 35 unmodified lines
36 u8 addr_list[0];36 u8 addr_list[0];
37} __packed; /* MCAST_FILTERING_CMD_API_S_VER_1 */37} __packed; /* MCAST_FILTERING_CMD_API_S_VER_1 */
38 38
39#define MAX_BCAST_FILTERS 8
40#define MAX_BCAST_FILTER_ATTRS 2
41
42/**
43 * enum iwl_mvm_bcast_filter_attr_offset - written by fw for each Rx packet
44 * @BCAST_FILTER_OFFSET_PAYLOAD_START: offset is from payload start.
45 * @BCAST_FILTER_OFFSET_IP_END: offset is from ip header end (i.e.
46 * start of ip payload).
47 */
48enum iwl_mvm_bcast_filter_attr_offset {
49 BCAST_FILTER_OFFSET_PAYLOAD_START = 0,
50 BCAST_FILTER_OFFSET_IP_END = 1,
51};
52
53/**
54 * struct iwl_fw_bcast_filter_attr - broadcast filter attribute
55 * @offset_type: &enum iwl_mvm_bcast_filter_attr_offset.
56 * @offset: starting offset of this pattern.
57 * @reserved1: reserved
58 * @val: value to match - big endian (MSB is the first
59 * byte to match from offset pos).
60 * @mask: mask to match (big endian).
61 */
62struct iwl_fw_bcast_filter_attr {
63 u8 offset_type;
64 u8 offset;
65 __le16 reserved1;
66 __be32 val;
67 __be32 mask;
68} __packed; /* BCAST_FILTER_ATT_S_VER_1 */
69
70/**
71 * enum iwl_mvm_bcast_filter_frame_type - filter frame type
72 * @BCAST_FILTER_FRAME_TYPE_ALL: consider all frames.
73 * @BCAST_FILTER_FRAME_TYPE_IPV4: consider only ipv4 frames
74 */
75enum iwl_mvm_bcast_filter_frame_type {
76 BCAST_FILTER_FRAME_TYPE_ALL = 0,
77 BCAST_FILTER_FRAME_TYPE_IPV4 = 1,
78};
79
80/**
81 * struct iwl_fw_bcast_filter - broadcast filter
82 * @discard: discard frame (1) or let it pass (0).
83 * @frame_type: &enum iwl_mvm_bcast_filter_frame_type.
84 * @reserved1: reserved
85 * @num_attrs: number of valid attributes in this filter.
86 * @attrs: attributes of this filter. a filter is considered matched
87 * only when all its attributes are matched (i.e. AND relationship)
88 */
89struct iwl_fw_bcast_filter {
90 u8 discard;
91 u8 frame_type;
92 u8 num_attrs;
93 u8 reserved1;
94 struct iwl_fw_bcast_filter_attr attrs[MAX_BCAST_FILTER_ATTRS];
95} __packed; /* BCAST_FILTER_S_VER_1 */
96
97/**
98 * struct iwl_fw_bcast_mac - per-mac broadcast filtering configuration.
99 * @default_discard: default action for this mac (discard (1) / pass (0)).
100 * @reserved1: reserved
101 * @attached_filters: bitmap of relevant filters for this mac.
102 */
103struct iwl_fw_bcast_mac {
104 u8 default_discard;
105 u8 reserved1;
106 __le16 attached_filters;
107} __packed; /* BCAST_MAC_CONTEXT_S_VER_1 */
108
109/**
110 * struct iwl_bcast_filter_cmd - broadcast filtering configuration
111 * @disable: enable (0) / disable (1)
112 * @max_bcast_filters: max number of filters (MAX_BCAST_FILTERS)
113 * @max_macs: max number of macs (NUM_MAC_INDEX_DRIVER)
114 * @reserved1: reserved
115 * @filters: broadcast filters
116 * @macs: broadcast filtering configuration per-mac
117 */
118struct iwl_bcast_filter_cmd {
119 u8 disable;
120 u8 max_bcast_filters;
121 u8 max_macs;
122 u8 reserved1;
123 struct iwl_fw_bcast_filter filters[MAX_BCAST_FILTERS];
124 struct iwl_fw_bcast_mac macs[NUM_MAC_INDEX_DRIVER];
125} __packed; /* BCAST_FILTERING_HCMD_API_S_VER_1 */
126
127#endif /* __iwl_fw_api_filter_h__ */39#endif /* __iwl_fw_api_filter_h__ */
drivers/net/wireless/intel/iwlwifi/fw/api/rs.h+0−1
@@ -752,7 +752,6 @@ struct iwl_lq_cmd { · 751 unmodified lines
752 752
753u8 iwl_fw_rate_idx_to_plcp(int idx);753u8 iwl_fw_rate_idx_to_plcp(int idx);
754u32 iwl_new_rate_from_v1(u32 rate_v1);754u32 iwl_new_rate_from_v1(u32 rate_v1);
755u32 iwl_legacy_rate_to_fw_idx(u32 rate_n_flags);
756const struct iwl_rate_mcs_info *iwl_rate_mcs(int idx);755const struct iwl_rate_mcs_info *iwl_rate_mcs(int idx);
757const char *iwl_rs_pretty_ant(u8 ant);756const char *iwl_rs_pretty_ant(u8 ant);
758const char *iwl_rs_pretty_bw(int bw);757const char *iwl_rs_pretty_bw(int bw);
drivers/net/wireless/intel/iwlwifi/fw/file.h+0−2
@@ -181,7 +181,6 @@ struct iwl_ucode_capa { · 180 unmodified lines
181 * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE: new NS offload (large version)181 * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE: new NS offload (large version)
182 * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: General support for uAPSD182 * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: General support for uAPSD
183 * @IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD: P2P client supports uAPSD power save183 * @IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD: P2P client supports uAPSD power save
184 * @IWL_UCODE_TLV_FLAGS_BCAST_FILTERING: uCode supports broadcast filtering.
185 * @IWL_UCODE_TLV_FLAGS_EBS_SUPPORT: this uCode image supports EBS.184 * @IWL_UCODE_TLV_FLAGS_EBS_SUPPORT: this uCode image supports EBS.
186 */185 */
187enum iwl_ucode_tlv_flag {186enum iwl_ucode_tlv_flag {
@@ -196,7 +195,6 @@ enum iwl_ucode_tlv_flag { · 8 unmodified lines
196 IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT = BIT(24),195 IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT = BIT(24),
197 IWL_UCODE_TLV_FLAGS_EBS_SUPPORT = BIT(25),196 IWL_UCODE_TLV_FLAGS_EBS_SUPPORT = BIT(25),
198 IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD = BIT(26),197 IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD = BIT(26),
199 IWL_UCODE_TLV_FLAGS_BCAST_FILTERING = BIT(29),
200};198};
201 199
202typedef unsigned int __bitwise iwl_ucode_tlv_api_t;200typedef unsigned int __bitwise iwl_ucode_tlv_api_t;
drivers/net/wireless/intel/iwlwifi/fw/rs.c+18−15
@@ -91,6 +91,20 @@ const char *iwl_rs_pretty_bw(int bw) · 90 unmodified lines
91}91}
92IWL_EXPORT_SYMBOL(iwl_rs_pretty_bw);92IWL_EXPORT_SYMBOL(iwl_rs_pretty_bw);
93 93
94static u32 iwl_legacy_rate_to_fw_idx(u32 rate_n_flags)
95{
96 int rate = rate_n_flags & RATE_LEGACY_RATE_MSK_V1;
97 int idx;
98 bool ofdm = !(rate_n_flags & RATE_MCS_CCK_MSK_V1);
99 int offset = ofdm ? IWL_FIRST_OFDM_RATE : 0;
100 int last = ofdm ? IWL_RATE_COUNT_LEGACY : IWL_FIRST_OFDM_RATE;
101
102 for (idx = offset; idx < last; idx++)
103 if (iwl_fw_rate_idx_to_plcp(idx) == rate)
104 return idx - offset;
105 return IWL_RATE_INVALID;
106}
107
94u32 iwl_new_rate_from_v1(u32 rate_v1)108u32 iwl_new_rate_from_v1(u32 rate_v1)
95{109{
96 u32 rate_v2 = 0;110 u32 rate_v2 = 0;
@@ -144,7 +158,10 @@ u32 iwl_new_rate_from_v1(u32 rate_v1) · 47 unmodified lines
144 } else {158 } else {
145 u32 legacy_rate = iwl_legacy_rate_to_fw_idx(rate_v1);159 u32 legacy_rate = iwl_legacy_rate_to_fw_idx(rate_v1);
146 160
147 WARN_ON(legacy_rate < 0);161 if (WARN_ON_ONCE(legacy_rate == IWL_RATE_INVALID))
162 legacy_rate = (rate_v1 & RATE_MCS_CCK_MSK_V1) ?
163 IWL_FIRST_CCK_RATE : IWL_FIRST_OFDM_RATE;
164
148 rate_v2 |= legacy_rate;165 rate_v2 |= legacy_rate;
149 if (!(rate_v1 & RATE_MCS_CCK_MSK_V1))166 if (!(rate_v1 & RATE_MCS_CCK_MSK_V1))
150 rate_v2 |= RATE_MCS_LEGACY_OFDM_MSK;167 rate_v2 |= RATE_MCS_LEGACY_OFDM_MSK;
@@ -172,20 +189,6 @@ u32 iwl_new_rate_from_v1(u32 rate_v1) · 21 unmodified lines
172}189}
173IWL_EXPORT_SYMBOL(iwl_new_rate_from_v1);190IWL_EXPORT_SYMBOL(iwl_new_rate_from_v1);
174 191
175u32 iwl_legacy_rate_to_fw_idx(u32 rate_n_flags)
176{
177 int rate = rate_n_flags & RATE_LEGACY_RATE_MSK_V1;
178 int idx;
179 bool ofdm = !(rate_n_flags & RATE_MCS_CCK_MSK_V1);
180 int offset = ofdm ? IWL_FIRST_OFDM_RATE : 0;
181 int last = ofdm ? IWL_RATE_COUNT_LEGACY : IWL_FIRST_OFDM_RATE;
182
183 for (idx = offset; idx < last; idx++)
184 if (iwl_fw_rate_idx_to_plcp(idx) == rate)
185 return idx - offset;
186 return -1;
187}
188
189int rs_pretty_print_rate(char *buf, int bufsz, const u32 rate)192int rs_pretty_print_rate(char *buf, int bufsz, const u32 rate)
190{193{
191 char *type;194 char *type;
drivers/net/wireless/intel/iwlwifi/iwl-csr.h+2−1
@@ -1,6 +1,6 @@
1/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */1/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2/*2/*
3 * Copyright (C) 2005-2014, 2018-2021 Intel Corporation3 * Copyright (C) 2005-2014, 2018-2022 Intel Corporation
4 * Copyright (C) 2013-2014 Intel Mobile Communications GmbH4 * Copyright (C) 2013-2014 Intel Mobile Communications GmbH
5 * Copyright (C) 2016 Intel Deutschland GmbH5 * Copyright (C) 2016 Intel Deutschland GmbH
6 */6 */
@@ -329,6 +329,7 @@ enum { · 322 unmodified lines
329#define CSR_HW_REV_TYPE_2x00 (0x0000100)329#define CSR_HW_REV_TYPE_2x00 (0x0000100)
330#define CSR_HW_REV_TYPE_105 (0x0000110)330#define CSR_HW_REV_TYPE_105 (0x0000110)
331#define CSR_HW_REV_TYPE_135 (0x0000120)331#define CSR_HW_REV_TYPE_135 (0x0000120)
332#define CSR_HW_REV_TYPE_3160 (0x0000164)
332#define CSR_HW_REV_TYPE_7265D (0x0000210)333#define CSR_HW_REV_TYPE_7265D (0x0000210)
333#define CSR_HW_REV_TYPE_NONE (0x00001F0)334#define CSR_HW_REV_TYPE_NONE (0x00001F0)
334#define CSR_HW_REV_TYPE_QNJ (0x0000360)335#define CSR_HW_REV_TYPE_QNJ (0x0000360)
drivers/net/wireless/intel/iwlwifi/iwl-drv.c+2−0
@@ -1707,6 +1707,8 @@ static void iwl_req_fw_callback(const struct firmware *ucode_raw, void *context) · 1706 unmodified lines
1707 out_unbind:1707 out_unbind:
1708 complete(&drv->request_firmware_complete);1708 complete(&drv->request_firmware_complete);
1709 device_release_driver(drv->trans->dev);1709 device_release_driver(drv->trans->dev);
1710 /* drv has just been freed by the release */
1711 failure = false;
1710 free:1712 free:
1711 if (failure)1713 if (failure)
1712 iwl_dealloc_ucode(drv);1714 iwl_dealloc_ucode(drv);
drivers/net/wireless/intel/iwlwifi/mei/main.c+34−11
@@ -1,6 +1,6 @@
1// SPDX-License-Identifier: GPL-2.0-only1// SPDX-License-Identifier: GPL-2.0-only
2/*2/*
3 * Copyright (C) 2021 Intel Corporation3 * Copyright (C) 2021-2022 Intel Corporation
4 */4 */
5 5
6#include <linux/etherdevice.h>6#include <linux/etherdevice.h>
@@ -146,6 +146,7 @@ struct iwl_mei_filters { · 139 unmodified lines
146 * @csme_taking_ownership: true when CSME is taking ownership. Used to remember146 * @csme_taking_ownership: true when CSME is taking ownership. Used to remember
147 * to send CSME_OWNERSHIP_CONFIRMED when the driver completes its down147 * to send CSME_OWNERSHIP_CONFIRMED when the driver completes its down
148 * flow.148 * flow.
149 * @link_prot_state: true when we are in link protection PASSIVE
149 * @csa_throttle_end_wk: used when &csa_throttled is true150 * @csa_throttle_end_wk: used when &csa_throttled is true
150 * @data_q_lock: protects the access to the data queues which are151 * @data_q_lock: protects the access to the data queues which are
151 * accessed without the mutex.152 * accessed without the mutex.
@@ -165,6 +166,7 @@ struct iwl_mei { · 13 unmodified lines
165 bool amt_enabled;166 bool amt_enabled;
166 bool csa_throttled;167 bool csa_throttled;
167 bool csme_taking_ownership;168 bool csme_taking_ownership;
169 bool link_prot_state;
168 struct delayed_work csa_throttle_end_wk;170 struct delayed_work csa_throttle_end_wk;
169 spinlock_t data_q_lock;171 spinlock_t data_q_lock;
170 172
@@ -229,8 +231,6 @@ static int iwl_mei_alloc_shared_mem(struct mei_cl_device *cldev) · 58 unmodified lines
229 if (IS_ERR(mem->ctrl)) {231 if (IS_ERR(mem->ctrl)) {
230 int ret = PTR_ERR(mem->ctrl);232 int ret = PTR_ERR(mem->ctrl);
231 233
232 dev_err(&cldev->dev, "Couldn't allocate the shared memory: %d\n",
233 ret);
234 mem->ctrl = NULL;234 mem->ctrl = NULL;
235 235
236 return ret;236 return ret;
@@ -669,6 +669,8 @@ iwl_mei_handle_conn_status(struct mei_cl_device *cldev, · 432 unmodified lines
669 669
670 iwl_mei_cache.ops->me_conn_status(iwl_mei_cache.priv, &conn_info);670 iwl_mei_cache.ops->me_conn_status(iwl_mei_cache.priv, &conn_info);
671 671
672 mei->link_prot_state = status->link_prot_state;
673
672 /*674 /*
673 * Update the Rfkill state in case the host does not own the device:675 * Update the Rfkill state in case the host does not own the device:
674 * if we are in Link Protection, ask to not touch the device, else,676 * if we are in Link Protection, ask to not touch the device, else,
@@ -1663,9 +1665,11 @@ int iwl_mei_register(void *priv, const struct iwl_mei_ops *ops) · 988 unmodified lines
1663 mei_cldev_get_drvdata(iwl_mei_global_cldev);1665 mei_cldev_get_drvdata(iwl_mei_global_cldev);
1664 1666
1665 /* we have already a SAP connection */1667 /* we have already a SAP connection */
1666 if (iwl_mei_is_connected())1668 if (iwl_mei_is_connected()) {
1667 iwl_mei_send_sap_msg(mei->cldev,1669 iwl_mei_send_sap_msg(mei->cldev,
1668 SAP_MSG_NOTIF_WIFIDR_UP);1670 SAP_MSG_NOTIF_WIFIDR_UP);
1671 ops->rfkill(priv, mei->link_prot_state);
1672 }
1669 }1673 }
1670 ret = 0;1674 ret = 0;
1671 1675
@@ -1784,6 +1788,8 @@ static void iwl_mei_dbgfs_unregister(struct iwl_mei *mei) {} · 112 unmodified lines
1784 1788
1785#endif /* CONFIG_DEBUG_FS */1789#endif /* CONFIG_DEBUG_FS */
1786 1790
1791#define ALLOC_SHARED_MEM_RETRY_MAX_NUM 3
1792
1787/*1793/*
1788 * iwl_mei_probe - the probe function called by the mei bus enumeration1794 * iwl_mei_probe - the probe function called by the mei bus enumeration
1789 *1795 *
@@ -1795,6 +1801,7 @@ static void iwl_mei_dbgfs_unregister(struct iwl_mei *mei) {} · 5 unmodified lines
1795static int iwl_mei_probe(struct mei_cl_device *cldev,1801static int iwl_mei_probe(struct mei_cl_device *cldev,
1796 const struct mei_cl_device_id *id)1802 const struct mei_cl_device_id *id)
1797{1803{
1804 int alloc_retry = ALLOC_SHARED_MEM_RETRY_MAX_NUM;
1798 struct iwl_mei *mei;1805 struct iwl_mei *mei;
1799 int ret;1806 int ret;
1800 1807
@@ -1812,15 +1819,31 @@ static int iwl_mei_probe(struct mei_cl_device *cldev, · 11 unmodified lines
1812 mei_cldev_set_drvdata(cldev, mei);1819 mei_cldev_set_drvdata(cldev, mei);
1813 mei->cldev = cldev;1820 mei->cldev = cldev;
1814 1821
1815 /*1822 do {
1816 * The CSME firmware needs to boot the internal WLAN client. Wait here1823 ret = iwl_mei_alloc_shared_mem(cldev);
1817 * so that the DMA map request will succeed.1824 if (!ret)
1818 */1825 break;
1819 msleep(20);1826 /*
1827 * The CSME firmware needs to boot the internal WLAN client.
1828 * This can take time in certain configurations (usually
1829 * upon resume and when the whole CSME firmware is shut down
1830 * during suspend).
1831 *
1832 * Wait a bit before retrying and hope we'll succeed next time.
1833 */
1820 1834
1821 ret = iwl_mei_alloc_shared_mem(cldev);1835 dev_dbg(&cldev->dev,
1822 if (ret)1836 "Couldn't allocate the shared memory: %d, attempt %d / %d\n",
1837 ret, alloc_retry, ALLOC_SHARED_MEM_RETRY_MAX_NUM);
1838 msleep(100);
1839 alloc_retry--;
1840 } while (alloc_retry);
1841
1842 if (ret) {
1843 dev_err(&cldev->dev, "Couldn't allocate the shared memory: %d\n",
1844 ret);
1823 goto free;1845 goto free;
1846 }
1824 1847
1825 iwl_mei_init_shared_mem(mei);1848 iwl_mei_init_shared_mem(mei);
1826 1849
drivers/net/wireless/intel/iwlwifi/mei/net.c+1−2
@@ -195,8 +195,7 @@ static bool iwl_mei_rx_filter_ipv4(struct sk_buff *skb, · 194 unmodified lines
195 bool match;195 bool match;
196 196
197 if (!pskb_may_pull(skb, skb_network_offset(skb) + sizeof(*iphdr)) ||197 if (!pskb_may_pull(skb, skb_network_offset(skb) + sizeof(*iphdr)) ||
198 !pskb_may_pull(skb, skb_network_offset(skb) +198 !pskb_may_pull(skb, skb_network_offset(skb) + ip_hdrlen(skb)))
199 sizeof(ip_hdrlen(skb) - sizeof(*iphdr))))
200 return false;199 return false;
201 200
202 iphdrlen = ip_hdrlen(skb);201 iphdrlen = ip_hdrlen(skb);
drivers/net/wireless/intel/iwlwifi/mvm/debugfs.c+0−203
@@ -1369,189 +1369,6 @@ static ssize_t iwl_dbgfs_dbg_time_point_write(struct iwl_mvm *mvm, · 1368 unmodified lines
1369 return count;1369 return count;
1370}1370}
1371 1371
1372#define ADD_TEXT(...) pos += scnprintf(buf + pos, bufsz - pos, __VA_ARGS__)
1373#ifdef CONFIG_IWLWIFI_BCAST_FILTERING
1374static ssize_t iwl_dbgfs_bcast_filters_read(struct file *file,
1375 char __user *user_buf,
1376 size_t count, loff_t *ppos)
1377{
1378 struct iwl_mvm *mvm = file->private_data;
1379 struct iwl_bcast_filter_cmd cmd;
1380 const struct iwl_fw_bcast_filter *filter;
1381 char *buf;
1382 int bufsz = 1024;
1383 int i, j, pos = 0;
1384 ssize_t ret;
1385
1386 buf = kzalloc(bufsz, GFP_KERNEL);
1387 if (!buf)
1388 return -ENOMEM;
1389
1390 mutex_lock(&mvm->mutex);
1391 if (!iwl_mvm_bcast_filter_build_cmd(mvm, &cmd)) {
1392 ADD_TEXT("None\n");
1393 mutex_unlock(&mvm->mutex);
1394 goto out;
1395 }
1396 mutex_unlock(&mvm->mutex);
1397
1398 for (i = 0; cmd.filters[i].attrs[0].mask; i++) {
1399 filter = &cmd.filters[i];
1400
1401 ADD_TEXT("Filter [%d]:\n", i);
1402 ADD_TEXT("\tDiscard=%d\n", filter->discard);
1403 ADD_TEXT("\tFrame Type: %s\n",
1404 filter->frame_type ? "IPv4" : "Generic");
1405
1406 for (j = 0; j < ARRAY_SIZE(filter->attrs); j++) {
1407 const struct iwl_fw_bcast_filter_attr *attr;
1408
1409 attr = &filter->attrs[j];
1410 if (!attr->mask)
1411 break;
1412
1413 ADD_TEXT("\tAttr [%d]: offset=%d (from %s), mask=0x%x, value=0x%x reserved=0x%x\n",
1414 j, attr->offset,
1415 attr->offset_type ? "IP End" :
1416 "Payload Start",
1417 be32_to_cpu(attr->mask),
1418 be32_to_cpu(attr->val),
1419 le16_to_cpu(attr->reserved1));
1420 }
1421 }
1422out:
1423 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
1424 kfree(buf);
1425 return ret;
1426}
1427
1428static ssize_t iwl_dbgfs_bcast_filters_write(struct iwl_mvm *mvm, char *buf,
1429 size_t count, loff_t *ppos)
1430{
1431 int pos, next_pos;
1432 struct iwl_fw_bcast_filter filter = {};
1433 struct iwl_bcast_filter_cmd cmd;
1434 u32 filter_id, attr_id, mask, value;
1435 int err = 0;
1436
1437 if (sscanf(buf, "%d %hhi %hhi %n", &filter_id, &filter.discard,
1438 &filter.frame_type, &pos) != 3)
1439 return -EINVAL;
1440
1441 if (filter_id >= ARRAY_SIZE(mvm->dbgfs_bcast_filtering.cmd.filters) ||
1442 filter.frame_type > BCAST_FILTER_FRAME_TYPE_IPV4)
1443 return -EINVAL;
1444
1445 for (attr_id = 0; attr_id < ARRAY_SIZE(filter.attrs);
1446 attr_id++) {
1447 struct iwl_fw_bcast_filter_attr *attr =
1448 &filter.attrs[attr_id];
1449
1450 if (pos >= count)
1451 break;
1452
1453 if (sscanf(&buf[pos], "%hhi %hhi %i %i %n",
1454 &attr->offset, &attr->offset_type,
1455 &mask, &value, &next_pos) != 4)
1456 return -EINVAL;
1457
1458 attr->mask = cpu_to_be32(mask);
1459 attr->val = cpu_to_be32(value);
1460 if (mask)
1461 filter.num_attrs++;
1462
1463 pos += next_pos;
1464 }
1465
1466 mutex_lock(&mvm->mutex);
1467 memcpy(&mvm->dbgfs_bcast_filtering.cmd.filters[filter_id],
1468 &filter, sizeof(filter));
1469
1470 /* send updated bcast filtering configuration */
1471 if (iwl_mvm_firmware_running(mvm) &&
1472 mvm->dbgfs_bcast_filtering.override &&
1473 iwl_mvm_bcast_filter_build_cmd(mvm, &cmd))
1474 err = iwl_mvm_send_cmd_pdu(mvm, BCAST_FILTER_CMD, 0,
1475 sizeof(cmd), &cmd);
1476 mutex_unlock(&mvm->mutex);
1477
1478 return err ?: count;
1479}
1480
1481static ssize_t iwl_dbgfs_bcast_filters_macs_read(struct file *file,
1482 char __user *user_buf,
1483 size_t count, loff_t *ppos)
1484{
1485 struct iwl_mvm *mvm = file->private_data;
1486 struct iwl_bcast_filter_cmd cmd;
1487 char *buf;
1488 int bufsz = 1024;
1489 int i, pos = 0;
1490 ssize_t ret;
1491
1492 buf = kzalloc(bufsz, GFP_KERNEL);
1493 if (!buf)
1494 return -ENOMEM;
1495
1496 mutex_lock(&mvm->mutex);
1497 if (!iwl_mvm_bcast_filter_build_cmd(mvm, &cmd)) {
1498 ADD_TEXT("None\n");
1499 mutex_unlock(&mvm->mutex);
1500 goto out;
1501 }
1502 mutex_unlock(&mvm->mutex);
1503
1504 for (i = 0; i < ARRAY_SIZE(cmd.macs); i++) {
1505 const struct iwl_fw_bcast_mac *mac = &cmd.macs[i];
1506
1507 ADD_TEXT("Mac [%d]: discard=%d attached_filters=0x%x\n",
1508 i, mac->default_discard, mac->attached_filters);
1509 }
1510out:
1511 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
1512 kfree(buf);
1513 return ret;
1514}
1515
1516static ssize_t iwl_dbgfs_bcast_filters_macs_write(struct iwl_mvm *mvm,
1517 char *buf, size_t count,
1518 loff_t *ppos)
1519{
1520 struct iwl_bcast_filter_cmd cmd;
1521 struct iwl_fw_bcast_mac mac = {};
1522 u32 mac_id, attached_filters;
1523 int err = 0;
1524
1525 if (!mvm->bcast_filters)
1526 return -ENOENT;
1527
1528 if (sscanf(buf, "%d %hhi %i", &mac_id, &mac.default_discard,
1529 &attached_filters) != 3)
1530 return -EINVAL;
1531
1532 if (mac_id >= ARRAY_SIZE(cmd.macs) ||
1533 mac.default_discard > 1 ||
1534 attached_filters >= BIT(ARRAY_SIZE(cmd.filters)))
1535 return -EINVAL;
1536
1537 mac.attached_filters = cpu_to_le16(attached_filters);
1538
1539 mutex_lock(&mvm->mutex);
1540 memcpy(&mvm->dbgfs_bcast_filtering.cmd.macs[mac_id],
1541 &mac, sizeof(mac));
1542
1543 /* send updated bcast filtering configuration */
1544 if (iwl_mvm_firmware_running(mvm) &&
1545 mvm->dbgfs_bcast_filtering.override &&
1546 iwl_mvm_bcast_filter_build_cmd(mvm, &cmd))
1547 err = iwl_mvm_send_cmd_pdu(mvm, BCAST_FILTER_CMD, 0,
1548 sizeof(cmd), &cmd);
1549 mutex_unlock(&mvm->mutex);
1550
1551 return err ?: count;
1552}
1553#endif
1554
1555#define MVM_DEBUGFS_WRITE_FILE_OPS(name, bufsz) \1372#define MVM_DEBUGFS_WRITE_FILE_OPS(name, bufsz) \
1556 _MVM_DEBUGFS_WRITE_FILE_OPS(name, bufsz, struct iwl_mvm)1373 _MVM_DEBUGFS_WRITE_FILE_OPS(name, bufsz, struct iwl_mvm)
1557#define MVM_DEBUGFS_READ_WRITE_FILE_OPS(name, bufsz) \1374#define MVM_DEBUGFS_READ_WRITE_FILE_OPS(name, bufsz) \
@@ -1881,11 +1698,6 @@ MVM_DEBUGFS_WRITE_FILE_OPS(inject_beacon_ie_restore, 512); · 323 unmodified lines
1881 1698
1882MVM_DEBUGFS_READ_FILE_OPS(uapsd_noagg_bssids);1699MVM_DEBUGFS_READ_FILE_OPS(uapsd_noagg_bssids);
1883 1700
1884#ifdef CONFIG_IWLWIFI_BCAST_FILTERING
1885MVM_DEBUGFS_READ_WRITE_FILE_OPS(bcast_filters, 256);
1886MVM_DEBUGFS_READ_WRITE_FILE_OPS(bcast_filters_macs, 256);
1887#endif
1888
1889#ifdef CONFIG_ACPI1701#ifdef CONFIG_ACPI
1890MVM_DEBUGFS_READ_FILE_OPS(sar_geo_profile);1702MVM_DEBUGFS_READ_FILE_OPS(sar_geo_profile);
1891#endif1703#endif
@@ -2097,21 +1909,6 @@ void iwl_mvm_dbgfs_register(struct iwl_mvm *mvm) · 205 unmodified lines
2097 1909
2098 MVM_DEBUGFS_ADD_FILE(uapsd_noagg_bssids, mvm->debugfs_dir, S_IRUSR);1910 MVM_DEBUGFS_ADD_FILE(uapsd_noagg_bssids, mvm->debugfs_dir, S_IRUSR);
2099 1911
2100#ifdef CONFIG_IWLWIFI_BCAST_FILTERING
2101 if (mvm->fw->ucode_capa.flags & IWL_UCODE_TLV_FLAGS_BCAST_FILTERING) {
2102 bcast_dir = debugfs_create_dir("bcast_filtering",
2103 mvm->debugfs_dir);
2104
2105 debugfs_create_bool("override", 0600, bcast_dir,
2106 &mvm->dbgfs_bcast_filtering.override);
2107
2108 MVM_DEBUGFS_ADD_FILE_ALIAS("filters", bcast_filters,
2109 bcast_dir, 0600);
2110 MVM_DEBUGFS_ADD_FILE_ALIAS("macs", bcast_filters_macs,
2111 bcast_dir, 0600);
2112 }
2113#endif
2114
2115#ifdef CONFIG_PM_SLEEP1912#ifdef CONFIG_PM_SLEEP
2116 MVM_DEBUGFS_ADD_FILE(d3_test, mvm->debugfs_dir, 0400);1913 MVM_DEBUGFS_ADD_FILE(d3_test, mvm->debugfs_dir, 0400);
2117 debugfs_create_bool("d3_wake_sysassert", 0600, mvm->debugfs_dir,1914 debugfs_create_bool("d3_wake_sysassert", 0600, mvm->debugfs_dir,
drivers/net/wireless/intel/iwlwifi/mvm/fw.c+1−1
@@ -1741,7 +1741,7 @@ int iwl_mvm_up(struct iwl_mvm *mvm) · 1740 unmodified lines
1741 ret = iwl_mvm_sar_init(mvm);1741 ret = iwl_mvm_sar_init(mvm);
1742 if (ret == 0)1742 if (ret == 0)
1743 ret = iwl_mvm_sar_geo_init(mvm);1743 ret = iwl_mvm_sar_geo_init(mvm);
1744 else if (ret < 0)1744 if (ret < 0)
1745 goto error;1745 goto error;
1746 1746
1747 ret = iwl_mvm_sgom_init(mvm);1747 ret = iwl_mvm_sgom_init(mvm);
drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c+0−240
@@ -55,79 +55,6 @@ static const struct ieee80211_iface_combination iwl_mvm_iface_combinations[] = { · 54 unmodified lines
55 },55 },
56};56};
57 57
58#ifdef CONFIG_IWLWIFI_BCAST_FILTERING
59/*
60 * Use the reserved field to indicate magic values.
61 * these values will only be used internally by the driver,
62 * and won't make it to the fw (reserved will be 0).
63 * BC_FILTER_MAGIC_IP - configure the val of this attribute to
64 * be the vif's ip address. in case there is not a single
65 * ip address (0, or more than 1), this attribute will
66 * be skipped.
67 * BC_FILTER_MAGIC_MAC - set the val of this attribute to
68 * the LSB bytes of the vif's mac address
69 */
70enum {
71 BC_FILTER_MAGIC_NONE = 0,
72 BC_FILTER_MAGIC_IP,
73 BC_FILTER_MAGIC_MAC,
74};
75
76static const struct iwl_fw_bcast_filter iwl_mvm_default_bcast_filters[] = {
77 {
78 /* arp */
79 .discard = 0,
80 .frame_type = BCAST_FILTER_FRAME_TYPE_ALL,
81 .attrs = {
82 {
83 /* frame type - arp, hw type - ethernet */
84 .offset_type =
85 BCAST_FILTER_OFFSET_PAYLOAD_START,
86 .offset = sizeof(rfc1042_header),
87 .val = cpu_to_be32(0x08060001),
88 .mask = cpu_to_be32(0xffffffff),
89 },
90 {
91 /* arp dest ip */
92 .offset_type =
93 BCAST_FILTER_OFFSET_PAYLOAD_START,
94 .offset = sizeof(rfc1042_header) + 2 +
95 sizeof(struct arphdr) +
96 ETH_ALEN + sizeof(__be32) +
97 ETH_ALEN,
98 .mask = cpu_to_be32(0xffffffff),
99 /* mark it as special field */
100 .reserved1 = cpu_to_le16(BC_FILTER_MAGIC_IP),
101 },
102 },
103 },
104 {
105 /* dhcp offer bcast */
106 .discard = 0,
107 .frame_type = BCAST_FILTER_FRAME_TYPE_IPV4,
108 .attrs = {
109 {
110 /* udp dest port - 68 (bootp client)*/
111 .offset_type = BCAST_FILTER_OFFSET_IP_END,
112 .offset = offsetof(struct udphdr, dest),
113 .val = cpu_to_be32(0x00440000),
114 .mask = cpu_to_be32(0xffff0000),
115 },
116 {
117 /* dhcp - lsb bytes of client hw address */
118 .offset_type = BCAST_FILTER_OFFSET_IP_END,
119 .offset = 38,
120 .mask = cpu_to_be32(0xffffffff),
121 /* mark it as special field */
122 .reserved1 = cpu_to_le16(BC_FILTER_MAGIC_MAC),
123 },
124 },
125 },
126 /* last filter must be empty */
127 {},
128};
129#endif
130
131static const struct cfg80211_pmsr_capabilities iwl_mvm_pmsr_capa = {58static const struct cfg80211_pmsr_capabilities iwl_mvm_pmsr_capa = {
132 .max_peers = IWL_MVM_TOF_MAX_APS,59 .max_peers = IWL_MVM_TOF_MAX_APS,
133 .report_ap_tsf = 1,60 .report_ap_tsf = 1,
@@ -693,11 +620,6 @@ int iwl_mvm_mac_setup_register(struct iwl_mvm *mvm) · 559 unmodified lines
693 }620 }
694#endif621#endif
695 622
696#ifdef CONFIG_IWLWIFI_BCAST_FILTERING
697 /* assign default bcast filtering configuration */
698 mvm->bcast_filters = iwl_mvm_default_bcast_filters;
699#endif
700
701 ret = iwl_mvm_leds_init(mvm);623 ret = iwl_mvm_leds_init(mvm);
702 if (ret)624 if (ret)
703 return ret;625 return ret;
@@ -1853,162 +1775,6 @@ static void iwl_mvm_config_iface_filter(struct ieee80211_hw *hw, · 1149 unmodified lines
1853 mutex_unlock(&mvm->mutex);1775 mutex_unlock(&mvm->mutex);
1854}1776}
1855 1777
1856#ifdef CONFIG_IWLWIFI_BCAST_FILTERING
1857struct iwl_bcast_iter_data {
1858 struct iwl_mvm *mvm;
1859 struct iwl_bcast_filter_cmd *cmd;
1860 u8 current_filter;
1861};
1862
1863static void
1864iwl_mvm_set_bcast_filter(struct ieee80211_vif *vif,
1865 const struct iwl_fw_bcast_filter *in_filter,
1866 struct iwl_fw_bcast_filter *out_filter)
1867{
1868 struct iwl_fw_bcast_filter_attr *attr;
1869 int i;
1870
1871 memcpy(out_filter, in_filter, sizeof(*out_filter));
1872
1873 for (i = 0; i < ARRAY_SIZE(out_filter->attrs); i++) {
1874 attr = &out_filter->attrs[i];
1875
1876 if (!attr->mask)
1877 break;
1878
1879 switch (attr->reserved1) {
1880 case cpu_to_le16(BC_FILTER_MAGIC_IP):
1881 if (vif->bss_conf.arp_addr_cnt != 1) {
1882 attr->mask = 0;
1883 continue;
1884 }
1885
1886 attr->val = vif->bss_conf.arp_addr_list[0];
1887 break;
1888 case cpu_to_le16(BC_FILTER_MAGIC_MAC):
1889 attr->val = *(__be32 *)&vif->addr[2];
1890 break;
1891 default:
1892 break;
1893 }
1894 attr->reserved1 = 0;
1895 out_filter->num_attrs++;
1896 }
1897}
1898
1899static void iwl_mvm_bcast_filter_iterator(void *_data, u8 *mac,
1900 struct ieee80211_vif *vif)
1901{
1902 struct iwl_bcast_iter_data *data = _data;
1903 struct iwl_mvm *mvm = data->mvm;
1904 struct iwl_bcast_filter_cmd *cmd = data->cmd;
1905 struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
1906 struct iwl_fw_bcast_mac *bcast_mac;
1907 int i;
1908
1909 if (WARN_ON(mvmvif->id >= ARRAY_SIZE(cmd->macs)))
1910 return;
1911
1912 bcast_mac = &cmd->macs[mvmvif->id];
1913
1914 /*
1915 * enable filtering only for associated stations, but not for P2P
1916 * Clients
1917 */
1918 if (vif->type != NL80211_IFTYPE_STATION || vif->p2p ||
1919 !vif->bss_conf.assoc)
1920 return;
1921
1922 bcast_mac->default_discard = 1;
1923
1924 /* copy all configured filters */
1925 for (i = 0; mvm->bcast_filters[i].attrs[0].mask; i++) {
1926 /*
1927 * Make sure we don't exceed our filters limit.
1928 * if there is still a valid filter to be configured,
1929 * be on the safe side and just allow bcast for this mac.
1930 */
1931 if (WARN_ON_ONCE(data->current_filter >=
1932 ARRAY_SIZE(cmd->filters))) {
1933 bcast_mac->default_discard = 0;
1934 bcast_mac->attached_filters = 0;
1935 break;
1936 }
1937
1938 iwl_mvm_set_bcast_filter(vif,
1939 &mvm->bcast_filters[i],
1940 &cmd->filters[data->current_filter]);
1941
1942 /* skip current filter if it contains no attributes */
1943 if (!cmd->filters[data->current_filter].num_attrs)
1944 continue;
1945
1946 /* attach the filter to current mac */
1947 bcast_mac->attached_filters |=
1948 cpu_to_le16(BIT(data->current_filter));
1949
1950 data->current_filter++;
1951 }
1952}
1953
1954bool iwl_mvm_bcast_filter_build_cmd(struct iwl_mvm *mvm,
1955 struct iwl_bcast_filter_cmd *cmd)
1956{
1957 struct iwl_bcast_iter_data iter_data = {
1958 .mvm = mvm,
1959 .cmd = cmd,
1960 };
1961
1962 if (IWL_MVM_FW_BCAST_FILTER_PASS_ALL)
1963 return false;
1964
1965 memset(cmd, 0, sizeof(*cmd));
1966 cmd->max_bcast_filters = ARRAY_SIZE(cmd->filters);
1967 cmd->max_macs = ARRAY_SIZE(cmd->macs);
1968
1969#ifdef CONFIG_IWLWIFI_DEBUGFS
1970 /* use debugfs filters/macs if override is configured */
1971 if (mvm->dbgfs_bcast_filtering.override) {
1972 memcpy(cmd->filters, &mvm->dbgfs_bcast_filtering.cmd.filters,
1973 sizeof(cmd->filters));
1974 memcpy(cmd->macs, &mvm->dbgfs_bcast_filtering.cmd.macs,
1975 sizeof(cmd->macs));
1976 return true;
1977 }
1978#endif
1979
1980 /* if no filters are configured, do nothing */
1981 if (!mvm->bcast_filters)
1982 return false;
1983
1984 /* configure and attach these filters for each associated sta vif */
1985 ieee80211_iterate_active_interfaces(
1986 mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
1987 iwl_mvm_bcast_filter_iterator, &iter_data);
1988
1989 return true;
1990}
1991
1992static int iwl_mvm_configure_bcast_filter(struct iwl_mvm *mvm)
1993{
1994 struct iwl_bcast_filter_cmd cmd;
1995
1996 if (!(mvm->fw->ucode_capa.flags & IWL_UCODE_TLV_FLAGS_BCAST_FILTERING))
1997 return 0;
1998
1999 if (!iwl_mvm_bcast_filter_build_cmd(mvm, &cmd))
2000 return 0;
2001
2002 return iwl_mvm_send_cmd_pdu(mvm, BCAST_FILTER_CMD, 0,
2003 sizeof(cmd), &cmd);
2004}
2005#else
2006static inline int iwl_mvm_configure_bcast_filter(struct iwl_mvm *mvm)
2007{
2008 return 0;
2009}
2010#endif
2011
2012static int iwl_mvm_update_mu_groups(struct iwl_mvm *mvm,1778static int iwl_mvm_update_mu_groups(struct iwl_mvm *mvm,
2013 struct ieee80211_vif *vif)1779 struct ieee80211_vif *vif)
2014{1780{
@@ -2520,7 +2286,6 @@ static void iwl_mvm_bss_info_changed_station(struct iwl_mvm *mvm, · 505 unmodified lines
2520 }2286 }
2521 2287
2522 iwl_mvm_recalc_multicast(mvm);2288 iwl_mvm_recalc_multicast(mvm);
2523 iwl_mvm_configure_bcast_filter(mvm);
2524 2289
2525 /* reset rssi values */2290 /* reset rssi values */
2526 mvmvif->bf_data.ave_beacon_signal = 0;2291 mvmvif->bf_data.ave_beacon_signal = 0;
@@ -2570,11 +2335,6 @@ static void iwl_mvm_bss_info_changed_station(struct iwl_mvm *mvm, · 43 unmodified lines
2570 }2335 }
2571 }2336 }
2572 2337
2573 if (changes & BSS_CHANGED_ARP_FILTER) {
2574 IWL_DEBUG_MAC80211(mvm, "arp filter changed\n");
2575 iwl_mvm_configure_bcast_filter(mvm);
2576 }
2577
2578 if (changes & BSS_CHANGED_BANDWIDTH)2338 if (changes & BSS_CHANGED_BANDWIDTH)
2579 iwl_mvm_apply_fw_smps_request(vif);2339 iwl_mvm_apply_fw_smps_request(vif);
2580}2340}
drivers/net/wireless/intel/iwlwifi/mvm/mvm.h+1−14
@@ -884,17 +884,6 @@ struct iwl_mvm { · 883 unmodified lines
884 /* rx chain antennas set through debugfs for the scan command */884 /* rx chain antennas set through debugfs for the scan command */
885 u8 scan_rx_ant;885 u8 scan_rx_ant;
886 886
887#ifdef CONFIG_IWLWIFI_BCAST_FILTERING
888 /* broadcast filters to configure for each associated station */
889 const struct iwl_fw_bcast_filter *bcast_filters;
890#ifdef CONFIG_IWLWIFI_DEBUGFS
891 struct {
892 bool override;
893 struct iwl_bcast_filter_cmd cmd;
894 } dbgfs_bcast_filtering;
895#endif
896#endif
897
898 /* Internal station */887 /* Internal station */
899 struct iwl_mvm_int_sta aux_sta;888 struct iwl_mvm_int_sta aux_sta;
900 struct iwl_mvm_int_sta snif_sta;889 struct iwl_mvm_int_sta snif_sta;
@@ -1593,8 +1582,6 @@ int iwl_mvm_up(struct iwl_mvm *mvm); · 692 unmodified lines
1593int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm);1582int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm);
1594 1583
1595int iwl_mvm_mac_setup_register(struct iwl_mvm *mvm);1584int iwl_mvm_mac_setup_register(struct iwl_mvm *mvm);
1596bool iwl_mvm_bcast_filter_build_cmd(struct iwl_mvm *mvm,
1597 struct iwl_bcast_filter_cmd *cmd);
1598 1585
1599/*1586/*
1600 * FW notifications / CMD responses handlers1587 * FW notifications / CMD responses handlers
@@ -2225,7 +2212,7 @@ static inline void iwl_mvm_mei_device_down(struct iwl_mvm *mvm) · 624 unmodified lines
2225static inline void iwl_mvm_mei_set_sw_rfkill_state(struct iwl_mvm *mvm)2212static inline void iwl_mvm_mei_set_sw_rfkill_state(struct iwl_mvm *mvm)
2226{2213{
2227 bool sw_rfkill =2214 bool sw_rfkill =
2228 mvm->hw_registered ? rfkill_blocked(mvm->hw->wiphy->rfkill) : false;2215 mvm->hw_registered ? rfkill_soft_blocked(mvm->hw->wiphy->rfkill) : false;
2229 2216
2230 if (mvm->mei_registered)2217 if (mvm->mei_registered)
2231 iwl_mei_set_rfkill_state(iwl_mvm_is_radio_killed(mvm),2218 iwl_mei_set_rfkill_state(iwl_mvm_is_radio_killed(mvm),
drivers/net/wireless/intel/iwlwifi/mvm/ops.c+0−1
@@ -469,7 +469,6 @@ static const struct iwl_hcmd_names iwl_mvm_legacy_names[] = { · 468 unmodified lines
469 HCMD_NAME(MCC_CHUB_UPDATE_CMD),469 HCMD_NAME(MCC_CHUB_UPDATE_CMD),
470 HCMD_NAME(MARKER_CMD),470 HCMD_NAME(MARKER_CMD),
471 HCMD_NAME(BT_PROFILE_NOTIFICATION),471 HCMD_NAME(BT_PROFILE_NOTIFICATION),
472 HCMD_NAME(BCAST_FILTER_CMD),
473 HCMD_NAME(MCAST_FILTER_CMD),472 HCMD_NAME(MCAST_FILTER_CMD),
474 HCMD_NAME(REPLY_SF_CFG_CMD),473 HCMD_NAME(REPLY_SF_CFG_CMD),
475 HCMD_NAME(REPLY_BEACON_FILTERING_CMD),474 HCMD_NAME(REPLY_BEACON_FILTERING_CMD),
drivers/net/wireless/intel/iwlwifi/mvm/tx.c+1−1
@@ -1427,7 +1427,7 @@ static void iwl_mvm_hwrate_to_tx_status(const struct iwl_fw *fw, · 1426 unmodified lines
1427 struct ieee80211_tx_rate *r = &info->status.rates[0];1427 struct ieee80211_tx_rate *r = &info->status.rates[0];
1428 1428
1429 if (iwl_fw_lookup_notif_ver(fw, LONG_GROUP,1429 if (iwl_fw_lookup_notif_ver(fw, LONG_GROUP,
1430 TX_CMD, 0) > 6)1430 TX_CMD, 0) <= 6)
1431 rate_n_flags = iwl_new_rate_from_v1(rate_n_flags);1431 rate_n_flags = iwl_new_rate_from_v1(rate_n_flags);
1432 1432
1433 info->status.antenna =1433 info->status.antenna =
drivers/net/wireless/intel/iwlwifi/pcie/trans-gen2.c+1−2
@@ -385,8 +385,7 @@ int iwl_trans_pcie_gen2_start_fw(struct iwl_trans *trans, · 384 unmodified lines
385 /* This may fail if AMT took ownership of the device */385 /* This may fail if AMT took ownership of the device */
386 if (iwl_pcie_prepare_card_hw(trans)) {386 if (iwl_pcie_prepare_card_hw(trans)) {
387 IWL_WARN(trans, "Exit HW not ready\n");387 IWL_WARN(trans, "Exit HW not ready\n");
388 ret = -EIO;388 return -EIO;
389 goto out;
390 }389 }
391 390
392 iwl_enable_rfkill_int(trans);391 iwl_enable_rfkill_int(trans);
drivers/net/wireless/intel/iwlwifi/pcie/trans.c+1−2
@@ -1329,8 +1329,7 @@ static int iwl_trans_pcie_start_fw(struct iwl_trans *trans, · 1328 unmodified lines
1329 /* This may fail if AMT took ownership of the device */1329 /* This may fail if AMT took ownership of the device */
1330 if (iwl_pcie_prepare_card_hw(trans)) {1330 if (iwl_pcie_prepare_card_hw(trans)) {
1331 IWL_WARN(trans, "Exit HW not ready\n");1331 IWL_WARN(trans, "Exit HW not ready\n");
1332 ret = -EIO;1332 return -EIO;
1333 goto out;
1334 }1333 }
1335 1334
1336 iwl_enable_rfkill_int(trans);1335 iwl_enable_rfkill_int(trans);
drivers/net/wireless/mac80211_hwsim.c+13−0
@@ -2336,6 +2336,15 @@ static void hw_scan_work(struct work_struct *work) · 2335 unmodified lines
2336 if (req->ie_len)2336 if (req->ie_len)
2337 skb_put_data(probe, req->ie, req->ie_len);2337 skb_put_data(probe, req->ie, req->ie_len);
2338 2338
2339 if (!ieee80211_tx_prepare_skb(hwsim->hw,
2340 hwsim->hw_scan_vif,
2341 probe,
2342 hwsim->tmp_chan->band,
2343 NULL)) {
2344 kfree_skb(probe);
2345 continue;
2346 }
2347
2339 local_bh_disable();2348 local_bh_disable();
2340 mac80211_hwsim_tx_frame(hwsim->hw, probe,2349 mac80211_hwsim_tx_frame(hwsim->hw, probe,
2341 hwsim->tmp_chan);2350 hwsim->tmp_chan);
@@ -3770,6 +3779,10 @@ static int hwsim_tx_info_frame_received_nl(struct sk_buff *skb_2, · 1428 unmodified lines
3770 }3779 }
3771 txi->flags |= IEEE80211_TX_STAT_ACK;3780 txi->flags |= IEEE80211_TX_STAT_ACK;
3772 }3781 }
3782
3783 if (hwsim_flags & HWSIM_TX_CTL_NO_ACK)
3784 txi->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;
3785
3773 ieee80211_tx_status_irqsafe(data2->hw, skb);3786 ieee80211_tx_status_irqsafe(data2->hw, skb);
3774 return 0;3787 return 0;
3775out:3788out:
drivers/nvme/host/core.c+10−2
@@ -368,6 +368,7 @@ EXPORT_SYMBOL_GPL(nvme_complete_rq); · 367 unmodified lines
368 368
369void nvme_complete_batch_req(struct request *req)369void nvme_complete_batch_req(struct request *req)
370{370{
371 trace_nvme_complete_rq(req);
371 nvme_cleanup_cmd(req);372 nvme_cleanup_cmd(req);
372 nvme_end_req_zoned(req);373 nvme_end_req_zoned(req);
373}374}
@@ -4253,7 +4254,14 @@ static void nvme_async_event_work(struct work_struct *work) · 3879 unmodified lines
4253 container_of(work, struct nvme_ctrl, async_event_work);4254 container_of(work, struct nvme_ctrl, async_event_work);
4254 4255
4255 nvme_aen_uevent(ctrl);4256 nvme_aen_uevent(ctrl);
4256 ctrl->ops->submit_async_event(ctrl);4257
4258 /*
4259 * The transport drivers must guarantee AER submission here is safe by
4260 * flushing ctrl async_event_work after changing the controller state
4261 * from LIVE and before freeing the admin queue.
4262 */
4263 if (ctrl->state == NVME_CTRL_LIVE)
4264 ctrl->ops->submit_async_event(ctrl);
4257}4265}
4258 4266
4259static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl)4267static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl)
@@ -4566,7 +4574,7 @@ static void nvme_set_queue_dying(struct nvme_ns *ns) · 306 unmodified lines
4566 if (test_and_set_bit(NVME_NS_DEAD, &ns->flags))4574 if (test_and_set_bit(NVME_NS_DEAD, &ns->flags))
4567 return;4575 return;
4568 4576
4569 blk_set_queue_dying(ns->queue);4577 blk_mark_disk_dead(ns->disk);
4570 nvme_start_ns_queue(ns);4578 nvme_start_ns_queue(ns);
4571 4579
4572 set_capacity_and_notify(ns->disk, 0);4580 set_capacity_and_notify(ns->disk, 0);
drivers/nvme/host/fabrics.c+1−2
@@ -1092,7 +1092,6 @@ static void __nvmf_concat_opt_tokens(struct seq_file *seq_file) · 1091 unmodified lines
1092static int nvmf_dev_show(struct seq_file *seq_file, void *private)1092static int nvmf_dev_show(struct seq_file *seq_file, void *private)
1093{1093{
1094 struct nvme_ctrl *ctrl;1094 struct nvme_ctrl *ctrl;
1095 int ret = 0;
1096 1095
1097 mutex_lock(&nvmf_dev_mutex);1096 mutex_lock(&nvmf_dev_mutex);
1098 ctrl = seq_file->private;1097 ctrl = seq_file->private;
@@ -1106,7 +1105,7 @@ static int nvmf_dev_show(struct seq_file *seq_file, void *private) · 7 unmodified lines
1106 1105
1107out_unlock:1106out_unlock:
1108 mutex_unlock(&nvmf_dev_mutex);1107 mutex_unlock(&nvmf_dev_mutex);
1109 return ret;1108 return 0;
1110}1109}
1111 1110
1112static int nvmf_dev_open(struct inode *inode, struct file *file)1111static int nvmf_dev_open(struct inode *inode, struct file *file)
drivers/nvme/host/fabrics.h+1−0
@@ -170,6 +170,7 @@ nvmf_ctlr_matches_baseopts(struct nvme_ctrl *ctrl, · 169 unmodified lines
170 struct nvmf_ctrl_options *opts)170 struct nvmf_ctrl_options *opts)
171{171{
172 if (ctrl->state == NVME_CTRL_DELETING ||172 if (ctrl->state == NVME_CTRL_DELETING ||
173 ctrl->state == NVME_CTRL_DELETING_NOIO ||
173 ctrl->state == NVME_CTRL_DEAD ||174 ctrl->state == NVME_CTRL_DEAD ||
174 strcmp(opts->subsysnqn, ctrl->opts->subsysnqn) ||175 strcmp(opts->subsysnqn, ctrl->opts->subsysnqn) ||
175 strcmp(opts->host->nqn, ctrl->opts->host->nqn) ||176 strcmp(opts->host->nqn, ctrl->opts->host->nqn) ||
drivers/nvme/host/multipath.c+1−1
@@ -848,7 +848,7 @@ void nvme_mpath_remove_disk(struct nvme_ns_head *head) · 847 unmodified lines
848{848{
849 if (!head->disk)849 if (!head->disk)
850 return;850 return;
851 blk_set_queue_dying(head->disk->queue);851 blk_mark_disk_dead(head->disk);
852 /* make sure all pending bios are cleaned up */852 /* make sure all pending bios are cleaned up */
853 kblockd_schedule_work(&head->requeue_work);853 kblockd_schedule_work(&head->requeue_work);
854 flush_work(&head->requeue_work);854 flush_work(&head->requeue_work);
drivers/nvme/host/pci.c+2−1
@@ -3391,7 +3391,8 @@ static const struct pci_device_id nvme_id_table[] = { · 3390 unmodified lines
3391 NVME_QUIRK_DEALLOCATE_ZEROES, },3391 NVME_QUIRK_DEALLOCATE_ZEROES, },
3392 { PCI_VDEVICE(INTEL, 0x0a54), /* Intel P4500/P4600 */3392 { PCI_VDEVICE(INTEL, 0x0a54), /* Intel P4500/P4600 */
3393 .driver_data = NVME_QUIRK_STRIPE_SIZE |3393 .driver_data = NVME_QUIRK_STRIPE_SIZE |
3394 NVME_QUIRK_DEALLOCATE_ZEROES, },3394 NVME_QUIRK_DEALLOCATE_ZEROES |
3395 NVME_QUIRK_IGNORE_DEV_SUBNQN, },
3395 { PCI_VDEVICE(INTEL, 0x0a55), /* Dell Express Flash P4600 */3396 { PCI_VDEVICE(INTEL, 0x0a55), /* Dell Express Flash P4600 */
3396 .driver_data = NVME_QUIRK_STRIPE_SIZE |3397 .driver_data = NVME_QUIRK_STRIPE_SIZE |
3397 NVME_QUIRK_DEALLOCATE_ZEROES, },3398 NVME_QUIRK_DEALLOCATE_ZEROES, },
drivers/nvme/host/rdma.c+1−0
@@ -1200,6 +1200,7 @@ static void nvme_rdma_error_recovery_work(struct work_struct *work) · 1199 unmodified lines
1200 struct nvme_rdma_ctrl, err_work);1200 struct nvme_rdma_ctrl, err_work);
1201 1201
1202 nvme_stop_keep_alive(&ctrl->ctrl);1202 nvme_stop_keep_alive(&ctrl->ctrl);
1203 flush_work(&ctrl->ctrl.async_event_work);
1203 nvme_rdma_teardown_io_queues(ctrl, false);1204 nvme_rdma_teardown_io_queues(ctrl, false);
1204 nvme_start_queues(&ctrl->ctrl);1205 nvme_start_queues(&ctrl->ctrl);
1205 nvme_rdma_teardown_admin_queue(ctrl, false);1206 nvme_rdma_teardown_admin_queue(ctrl, false);
drivers/nvme/host/tcp.c+10−1
@@ -913,7 +913,15 @@ static inline void nvme_tcp_done_send_req(struct nvme_tcp_queue *queue) · 912 unmodified lines
913 913
914static void nvme_tcp_fail_request(struct nvme_tcp_request *req)914static void nvme_tcp_fail_request(struct nvme_tcp_request *req)
915{915{
916 nvme_tcp_end_request(blk_mq_rq_from_pdu(req), NVME_SC_HOST_PATH_ERROR);916 if (nvme_tcp_async_req(req)) {
917 union nvme_result res = {};
918
919 nvme_complete_async_event(&req->queue->ctrl->ctrl,
920 cpu_to_le16(NVME_SC_HOST_PATH_ERROR), &res);
921 } else {
922 nvme_tcp_end_request(blk_mq_rq_from_pdu(req),
923 NVME_SC_HOST_PATH_ERROR);
924 }
917}925}
918 926
919static int nvme_tcp_try_send_data(struct nvme_tcp_request *req)927static int nvme_tcp_try_send_data(struct nvme_tcp_request *req)
@@ -2096,6 +2104,7 @@ static void nvme_tcp_error_recovery_work(struct work_struct *work) · 1176 unmodified lines
2096 struct nvme_ctrl *ctrl = &tcp_ctrl->ctrl;2104 struct nvme_ctrl *ctrl = &tcp_ctrl->ctrl;
2097 2105
2098 nvme_stop_keep_alive(ctrl);2106 nvme_stop_keep_alive(ctrl);
2107 flush_work(&ctrl->async_event_work);
2099 nvme_tcp_teardown_io_queues(ctrl, false);2108 nvme_tcp_teardown_io_queues(ctrl, false);
2100 /* unquiesce to fail fast pending requests */2109 /* unquiesce to fail fast pending requests */
2101 nvme_start_queues(ctrl);2110 nvme_start_queues(ctrl);
drivers/parisc/ccio-dma.c+2−1
@@ -1003,7 +1003,7 @@ ccio_unmap_sg(struct device *dev, struct scatterlist *sglist, int nents, · 1002 unmodified lines
1003 ioc->usg_calls++;1003 ioc->usg_calls++;
1004#endif1004#endif
1005 1005
1006 while(sg_dma_len(sglist) && nents--) {1006 while (nents && sg_dma_len(sglist)) {
1007 1007
1008#ifdef CCIO_COLLECT_STATS1008#ifdef CCIO_COLLECT_STATS
1009 ioc->usg_pages += sg_dma_len(sglist) >> PAGE_SHIFT;1009 ioc->usg_pages += sg_dma_len(sglist) >> PAGE_SHIFT;
@@ -1011,6 +1011,7 @@ ccio_unmap_sg(struct device *dev, struct scatterlist *sglist, int nents, · 1 unmodified line
1011 ccio_unmap_page(dev, sg_dma_address(sglist),1011 ccio_unmap_page(dev, sg_dma_address(sglist),
1012 sg_dma_len(sglist), direction, 0);1012 sg_dma_len(sglist), direction, 0);
1013 ++sglist;1013 ++sglist;
1014 nents--;
1014 }1015 }
1015 1016
1016 DBG_RUN_SG("%s() DONE (nents %d)\n", __func__, nents);1017 DBG_RUN_SG("%s() DONE (nents %d)\n", __func__, nents);
drivers/parisc/sba_iommu.c+2−1
@@ -1047,7 +1047,7 @@ sba_unmap_sg(struct device *dev, struct scatterlist *sglist, int nents, · 1046 unmodified lines
1047 spin_unlock_irqrestore(&ioc->res_lock, flags);1047 spin_unlock_irqrestore(&ioc->res_lock, flags);
1048#endif1048#endif
1049 1049
1050 while (sg_dma_len(sglist) && nents--) {1050 while (nents && sg_dma_len(sglist)) {
1051 1051
1052 sba_unmap_page(dev, sg_dma_address(sglist), sg_dma_len(sglist),1052 sba_unmap_page(dev, sg_dma_address(sglist), sg_dma_len(sglist),
1053 direction, 0);1053 direction, 0);
@@ -1056,6 +1056,7 @@ sba_unmap_sg(struct device *dev, struct scatterlist *sglist, int nents, · 2 unmodified lines
1056 ioc->usingle_calls--; /* kluge since call is unmap_sg() */1056 ioc->usingle_calls--; /* kluge since call is unmap_sg() */
1057#endif1057#endif
1058 ++sglist;1058 ++sglist;
1059 nents--;
1059 }1060 }
1060 1061
1061 DBG_RUN_SG("%s() DONE (nents %d)\n", __func__, nents);1062 DBG_RUN_SG("%s() DONE (nents %d)\n", __func__, nents);
drivers/pci/controller/cadence/pci-j721e.c+42−43
@@ -356,8 +356,8 @@ static int j721e_pcie_probe(struct platform_device *pdev) · 355 unmodified lines
356 const struct j721e_pcie_data *data;356 const struct j721e_pcie_data *data;
357 struct cdns_pcie *cdns_pcie;357 struct cdns_pcie *cdns_pcie;
358 struct j721e_pcie *pcie;358 struct j721e_pcie *pcie;
359 struct cdns_pcie_rc *rc;359 struct cdns_pcie_rc *rc = NULL;
360 struct cdns_pcie_ep *ep;360 struct cdns_pcie_ep *ep = NULL;
361 struct gpio_desc *gpiod;361 struct gpio_desc *gpiod;
362 void __iomem *base;362 void __iomem *base;
363 struct clk *clk;363 struct clk *clk;
@@ -376,6 +376,46 @@ static int j721e_pcie_probe(struct platform_device *pdev) · 12 unmodified lines
376 if (!pcie)376 if (!pcie)
377 return -ENOMEM;377 return -ENOMEM;
378 378
379 switch (mode) {
380 case PCI_MODE_RC:
381 if (!IS_ENABLED(CONFIG_PCIE_CADENCE_HOST))
382 return -ENODEV;
383
384 bridge = devm_pci_alloc_host_bridge(dev, sizeof(*rc));
385 if (!bridge)
386 return -ENOMEM;
387
388 if (!data->byte_access_allowed)
389 bridge->ops = &cdns_ti_pcie_host_ops;
390 rc = pci_host_bridge_priv(bridge);
391 rc->quirk_retrain_flag = data->quirk_retrain_flag;
392 rc->quirk_detect_quiet_flag = data->quirk_detect_quiet_flag;
393
394 cdns_pcie = &rc->pcie;
395 cdns_pcie->dev = dev;
396 cdns_pcie->ops = &j721e_pcie_ops;
397 pcie->cdns_pcie = cdns_pcie;
398 break;
399 case PCI_MODE_EP:
400 if (!IS_ENABLED(CONFIG_PCIE_CADENCE_EP))
401 return -ENODEV;
402
403 ep = devm_kzalloc(dev, sizeof(*ep), GFP_KERNEL);
404 if (!ep)
405 return -ENOMEM;
406
407 ep->quirk_detect_quiet_flag = data->quirk_detect_quiet_flag;
408
409 cdns_pcie = &ep->pcie;
410 cdns_pcie->dev = dev;
411 cdns_pcie->ops = &j721e_pcie_ops;
412 pcie->cdns_pcie = cdns_pcie;
413 break;
414 default:
415 dev_err(dev, "INVALID device type %d\n", mode);
416 return 0;
417 }
418
379 pcie->mode = mode;419 pcie->mode = mode;
380 pcie->linkdown_irq_regfield = data->linkdown_irq_regfield;420 pcie->linkdown_irq_regfield = data->linkdown_irq_regfield;
381 421
@@ -426,28 +466,6 @@ static int j721e_pcie_probe(struct platform_device *pdev) · 44 unmodified lines
426 466
427 switch (mode) {467 switch (mode) {
428 case PCI_MODE_RC:468 case PCI_MODE_RC:
429 if (!IS_ENABLED(CONFIG_PCIE_CADENCE_HOST)) {
430 ret = -ENODEV;
431 goto err_get_sync;
432 }
433
434 bridge = devm_pci_alloc_host_bridge(dev, sizeof(*rc));
435 if (!bridge) {
436 ret = -ENOMEM;
437 goto err_get_sync;
438 }
439
440 if (!data->byte_access_allowed)
441 bridge->ops = &cdns_ti_pcie_host_ops;
442 rc = pci_host_bridge_priv(bridge);
443 rc->quirk_retrain_flag = data->quirk_retrain_flag;
444 rc->quirk_detect_quiet_flag = data->quirk_detect_quiet_flag;
445
446 cdns_pcie = &rc->pcie;
447 cdns_pcie->dev = dev;
448 cdns_pcie->ops = &j721e_pcie_ops;
449 pcie->cdns_pcie = cdns_pcie;
450
451 gpiod = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);469 gpiod = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
452 if (IS_ERR(gpiod)) {470 if (IS_ERR(gpiod)) {
453 ret = PTR_ERR(gpiod);471 ret = PTR_ERR(gpiod);
@@ -497,23 +515,6 @@ static int j721e_pcie_probe(struct platform_device *pdev) · 43 unmodified lines
497 515
498 break;516 break;
499 case PCI_MODE_EP:517 case PCI_MODE_EP:
500 if (!IS_ENABLED(CONFIG_PCIE_CADENCE_EP)) {
501 ret = -ENODEV;
502 goto err_get_sync;
503 }
504
505 ep = devm_kzalloc(dev, sizeof(*ep), GFP_KERNEL);
506 if (!ep) {
507 ret = -ENOMEM;
508 goto err_get_sync;
509 }
510 ep->quirk_detect_quiet_flag = data->quirk_detect_quiet_flag;
511
512 cdns_pcie = &ep->pcie;
513 cdns_pcie->dev = dev;
514 cdns_pcie->ops = &j721e_pcie_ops;
515 pcie->cdns_pcie = cdns_pcie;
516
517 ret = cdns_pcie_init_phy(dev, cdns_pcie);518 ret = cdns_pcie_init_phy(dev, cdns_pcie);
518 if (ret) {519 if (ret) {
519 dev_err(dev, "Failed to init phy\n");520 dev_err(dev, "Failed to init phy\n");
@@ -525,8 +526,6 @@ static int j721e_pcie_probe(struct platform_device *pdev) · 5 unmodified lines
525 goto err_pcie_setup;526 goto err_pcie_setup;
526 527
527 break;528 break;
528 default:
529 dev_err(dev, "INVALID device type %d\n", mode);
530 }529 }
531 530
532 return 0;531 return 0;
drivers/pci/controller/dwc/pcie-kirin.c+18−13
@@ -756,22 +756,28 @@ static int __exit kirin_pcie_remove(struct platform_device *pdev) · 755 unmodified lines
756 return 0;756 return 0;
757}757}
758 758
759struct kirin_pcie_data {
760 enum pcie_kirin_phy_type phy_type;
761};
762
763static const struct kirin_pcie_data kirin_960_data = {
764 .phy_type = PCIE_KIRIN_INTERNAL_PHY,
765};
766
767static const struct kirin_pcie_data kirin_970_data = {
768 .phy_type = PCIE_KIRIN_EXTERNAL_PHY,
769};
770
759static const struct of_device_id kirin_pcie_match[] = {771static const struct of_device_id kirin_pcie_match[] = {
760 {772 { .compatible = "hisilicon,kirin960-pcie", .data = &kirin_960_data },
761 .compatible = "hisilicon,kirin960-pcie",773 { .compatible = "hisilicon,kirin970-pcie", .data = &kirin_970_data },
762 .data = (void *)PCIE_KIRIN_INTERNAL_PHY
763 },
764 {
765 .compatible = "hisilicon,kirin970-pcie",
766 .data = (void *)PCIE_KIRIN_EXTERNAL_PHY
767 },
768 {},774 {},
769};775};
770 776
771static int kirin_pcie_probe(struct platform_device *pdev)777static int kirin_pcie_probe(struct platform_device *pdev)
772{778{
773 enum pcie_kirin_phy_type phy_type;
774 struct device *dev = &pdev->dev;779 struct device *dev = &pdev->dev;
780 const struct kirin_pcie_data *data;
775 struct kirin_pcie *kirin_pcie;781 struct kirin_pcie *kirin_pcie;
776 struct dw_pcie *pci;782 struct dw_pcie *pci;
777 int ret;783 int ret;
@@ -781,13 +787,12 @@ static int kirin_pcie_probe(struct platform_device *pdev) · 3 unmodified lines
781 return -EINVAL;787 return -EINVAL;
782 }788 }
783 789
784 phy_type = (long)of_device_get_match_data(dev);790 data = of_device_get_match_data(dev);
785 if (!phy_type) {791 if (!data) {
786 dev_err(dev, "OF data missing\n");792 dev_err(dev, "OF data missing\n");
787 return -EINVAL;793 return -EINVAL;
788 }794 }
789 795
790
791 kirin_pcie = devm_kzalloc(dev, sizeof(struct kirin_pcie), GFP_KERNEL);796 kirin_pcie = devm_kzalloc(dev, sizeof(struct kirin_pcie), GFP_KERNEL);
792 if (!kirin_pcie)797 if (!kirin_pcie)
793 return -ENOMEM;798 return -ENOMEM;
@@ -800,7 +805,7 @@ static int kirin_pcie_probe(struct platform_device *pdev) · 6 unmodified lines
800 pci->ops = &kirin_dw_pcie_ops;805 pci->ops = &kirin_dw_pcie_ops;
801 pci->pp.ops = &kirin_pcie_host_ops;806 pci->pp.ops = &kirin_pcie_host_ops;
802 kirin_pcie->pci = pci;807 kirin_pcie->pci = pci;
803 kirin_pcie->type = phy_type;808 kirin_pcie->type = data->phy_type;
804 809
805 ret = kirin_pcie_get_resource(kirin_pcie, pdev);810 ret = kirin_pcie_get_resource(kirin_pcie, pdev);
806 if (ret)811 if (ret)
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