Merge branch 'x86/cpu' into perf/core, to resolve conflict

Conflicts: arch/x86/events/intel/uncore.c

Ingo Molnar committed 6 years ago

Commit 629b3df2 parents 3442a9e d97828077 files · +532 −481Browse files

Unified · Split

77 files

arch/x86/Kconfig +0 −1
arch/x86/crypto/aesni-intel_glue.c +1 −1
arch/x86/crypto/crc32-pclmul_glue.c +1 −1
arch/x86/crypto/crc32c-intel_glue.c +1 −1
arch/x86/crypto/crct10dif-pclmul_glue.c +1 −1
arch/x86/crypto/ghash-clmulni-intel_glue.c +1 −1
arch/x86/events/amd/power.c +1 −1
arch/x86/events/intel/cstate.c +40 −43
arch/x86/events/intel/rapl.c +27 −31
arch/x86/events/intel/uncore.c +31 −36
arch/x86/include/asm/amd_nb.h +0 −1
arch/x86/include/asm/cpu_device_id.h +131 −1
arch/x86/include/asm/cpufeatures.h +1 −1
arch/x86/include/asm/intel-family.h +5 −12
arch/x86/kernel/amd_nb.c +1 −3
arch/x86/kernel/apic/apic.c +13 −19
arch/x86/kernel/cpu/amd.c +2 −1
arch/x86/kernel/cpu/common.c +2 −2
arch/x86/kernel/cpu/match.c +9 −4
arch/x86/kernel/smpboot.c +1 −1
arch/x86/kernel/tsc_msr.c +7 −7
arch/x86/kvm/svm.c +2 −1
arch/x86/kvm/vmx/vmx.c +2 −1
arch/x86/platform/atom/punit_atom_debug.c +6 −7
arch/x86/platform/efi/quirks.c +2 −5
arch/x86/platform/intel-mid/device_libs/platform_bt.c +1 −4
arch/x86/platform/intel-quark/imr.c +1 −1
arch/x86/platform/intel-quark/imr_selftest.c +1 −1
arch/x86/power/cpu.c +2 −14
drivers/acpi/acpi_lpss.c +2 −4
drivers/acpi/x86/utils.c +10 −10
drivers/char/agp/amd64-agp.c +1 −1
drivers/char/hw_random/via-rng.c +3 −4
drivers/cpufreq/acpi-cpufreq.c +3 −2
drivers/cpufreq/amd_freq_sensitivity.c +2 −1
drivers/cpufreq/e_powersaver.c +1 −1
drivers/cpufreq/elanfreq.c +1 −1
drivers/cpufreq/intel_pstate.c +36 −35
drivers/cpufreq/longhaul.c +1 −1
drivers/cpufreq/longrun.c +1 −2
drivers/cpufreq/p4-clockmod.c +1 −1
drivers/cpufreq/powernow-k6.c +2 −2
drivers/cpufreq/powernow-k7.c +1 −1
drivers/cpufreq/powernow-k8.c +1 −1
drivers/cpufreq/sc520_freq.c +1 −1
drivers/cpufreq/speedstep-centrino.c +4 −10
drivers/cpufreq/speedstep-ich.c +3 −7
drivers/cpufreq/speedstep-smi.c +3 −7
drivers/crypto/padlock-aes.c +1 −1
drivers/crypto/padlock-sha.c +1 −1
drivers/edac/amd64_edac.c +7 −7
drivers/edac/i10nm_base.c +4 −4
drivers/edac/pnd2_edac.c +2 −2
drivers/edac/sb_edac.c +7 −7
drivers/edac/skx_base.c +1 −1
drivers/extcon/extcon-axp288.c +1 −1
drivers/hwmon/coretemp.c +1 −1
drivers/hwmon/via-cputemp.c +4 −4
drivers/idle/intel_idle.c +38 −41
drivers/mmc/host/sdhci-acpi.c +2 −2
drivers/pci/pci-mid.c +2 −4
drivers/platform/x86/intel-uncore-frequency.c +6 −8
drivers/platform/x86/intel_int0002_vgpio.c +2 −2
drivers/platform/x86/intel_mid_powerbtn.c +2 −2
drivers/platform/x86/intel_pmc_core.c +12 −12
drivers/platform/x86/intel_pmc_core_pltdrv.c +8 −8
drivers/platform/x86/intel_speed_select_if/isst_if_mbox_msr.c +1 −3
drivers/platform/x86/intel_telemetry_debugfs.c +2 −3
drivers/platform/x86/intel_telemetry_pltdrv.c +2 −5
drivers/platform/x86/intel_turbo_max_3.c +2 −4
drivers/powercap/intel_rapl_common.c +43 −44
drivers/thermal/intel/intel_powerclamp.c +1 −1
drivers/thermal/intel/intel_quark_dts_thermal.c +1 −4
drivers/thermal/intel/intel_soc_dts_thermal.c +1 −2
drivers/thermal/intel/x86_pkg_temp_thermal.c +1 −1
include/linux/mod_devicetable.h +1 −3
sound/soc/intel/common/soc-intel-quirks.h +6 −8

@@ -1875,7 +1875,6 @@ config X86_SMAP · 1874 unmodified lines
1875	1875
1876	1876	config X86_UMIP
1877	1877	def_bool y
1878		− depends on CPU_SUP_INTEL \|\| CPU_SUP_AMD
1879	1878	prompt "User Mode Instruction Prevention" if EXPERT
1880	1879	---help---
1881	1880	User Mode Instruction Prevention (UMIP) is a security feature in

arch/x86/crypto/aesni-intel_glue.c+1−1

@@ -1064,7 +1064,7 @@ static struct aead_alg aesni_aeads[0]; · 1063 unmodified lines
1064	1064	static struct simd_aead_alg *aesni_simd_aeads[ARRAY_SIZE(aesni_aeads)];
1065	1065
1066	1066	static const struct x86_cpu_id aesni_cpu_id[] = {
1067		− X86_FEATURE_MATCH(X86_FEATURE_AES),
	1067	+ X86_MATCH_FEATURE(X86_FEATURE_AES, NULL),
1068	1068	{}
1069	1069	};
1070	1070	MODULE_DEVICE_TABLE(x86cpu, aesni_cpu_id);

arch/x86/crypto/crc32-pclmul_glue.c+1−1

@@ -170,7 +170,7 @@ static struct shash_alg alg = { · 169 unmodified lines
170	170	};
171	171
172	172	static const struct x86_cpu_id crc32pclmul_cpu_id[] = {
173		− X86_FEATURE_MATCH(X86_FEATURE_PCLMULQDQ),
	173	+ X86_MATCH_FEATURE(X86_FEATURE_PCLMULQDQ, NULL),
174	174	{}
175	175	};
176	176	MODULE_DEVICE_TABLE(x86cpu, crc32pclmul_cpu_id);

arch/x86/crypto/crc32c-intel_glue.c+1−1

@@ -221,7 +221,7 @@ static struct shash_alg alg = { · 220 unmodified lines
221	221	};
222	222
223	223	static const struct x86_cpu_id crc32c_cpu_id[] = {
224		− X86_FEATURE_MATCH(X86_FEATURE_XMM4_2),
	224	+ X86_MATCH_FEATURE(X86_FEATURE_XMM4_2, NULL),
225	225	{}
226	226	};
227	227	MODULE_DEVICE_TABLE(x86cpu, crc32c_cpu_id);

arch/x86/crypto/crct10dif-pclmul_glue.c+1−1

@@ -114,7 +114,7 @@ static struct shash_alg alg = { · 113 unmodified lines
114	114	};
115	115
116	116	static const struct x86_cpu_id crct10dif_cpu_id[] = {
117		− X86_FEATURE_MATCH(X86_FEATURE_PCLMULQDQ),
	117	+ X86_MATCH_FEATURE(X86_FEATURE_PCLMULQDQ, NULL),
118	118	{}
119	119	};
120	120	MODULE_DEVICE_TABLE(x86cpu, crct10dif_cpu_id);

arch/x86/crypto/ghash-clmulni-intel_glue.c+1−1

@@ -313,7 +313,7 @@ static struct ahash_alg ghash_async_alg = { · 312 unmodified lines
313	313	};
314	314
315	315	static const struct x86_cpu_id pcmul_cpu_id[] = {
316		− X86_FEATURE_MATCH(X86_FEATURE_PCLMULQDQ), /* Pickle-Mickle-Duck */
	316	+ X86_MATCH_FEATURE(X86_FEATURE_PCLMULQDQ, NULL), /* Pickle-Mickle-Duck */
317	317	{}
318	318	};
319	319	MODULE_DEVICE_TABLE(x86cpu, pcmul_cpu_id);

arch/x86/events/amd/power.c+1−1

@@ -259,7 +259,7 @@ static int power_cpu_init(unsigned int cpu) · 258 unmodified lines
259	259	}
260	260
261	261	static const struct x86_cpu_id cpu_match[] = {
262		− { .vendor = X86_VENDOR_AMD, .family = 0x15 },
	262	+ X86_MATCH_VENDOR_FAM(AMD, 0x15, NULL),
263	263	{},
264	264	};
265	265

arch/x86/events/intel/cstate.c+40−43

@@ -594,63 +594,60 @@ static const struct cstate_model glm_cstates __initconst = { · 593 unmodified lines
594	594	};
595	595
596	596
597		−#define X86_CSTATES_MODEL(model, states) \
598		− { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, (unsigned long) &(states) }
599		−
600	597	static const struct x86_cpu_id intel_cstates_match[] __initconst = {
601		− X86_CSTATES_MODEL(INTEL_FAM6_NEHALEM, nhm_cstates),
602		− X86_CSTATES_MODEL(INTEL_FAM6_NEHALEM_EP, nhm_cstates),
603		− X86_CSTATES_MODEL(INTEL_FAM6_NEHALEM_EX, nhm_cstates),
	598	+ X86_MATCH_INTEL_FAM6_MODEL(NEHALEM, &nhm_cstates),
	599	+ X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EP, &nhm_cstates),
	600	+ X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EX, &nhm_cstates),
604	601
605		− X86_CSTATES_MODEL(INTEL_FAM6_WESTMERE, nhm_cstates),
606		− X86_CSTATES_MODEL(INTEL_FAM6_WESTMERE_EP, nhm_cstates),
607		− X86_CSTATES_MODEL(INTEL_FAM6_WESTMERE_EX, nhm_cstates),
	602	+ X86_MATCH_INTEL_FAM6_MODEL(WESTMERE, &nhm_cstates),
	603	+ X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EP, &nhm_cstates),
	604	+ X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EX, &nhm_cstates),
608	605
609		− X86_CSTATES_MODEL(INTEL_FAM6_SANDYBRIDGE, snb_cstates),
610		− X86_CSTATES_MODEL(INTEL_FAM6_SANDYBRIDGE_X, snb_cstates),
	606	+ X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE, &snb_cstates),
	607	+ X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X, &snb_cstates),
611	608
612		− X86_CSTATES_MODEL(INTEL_FAM6_IVYBRIDGE, snb_cstates),
613		− X86_CSTATES_MODEL(INTEL_FAM6_IVYBRIDGE_X, snb_cstates),
	609	+ X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE, &snb_cstates),
	610	+ X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X, &snb_cstates),
614	611
615		− X86_CSTATES_MODEL(INTEL_FAM6_HASWELL, snb_cstates),
616		− X86_CSTATES_MODEL(INTEL_FAM6_HASWELL_X, snb_cstates),
617		− X86_CSTATES_MODEL(INTEL_FAM6_HASWELL_G, snb_cstates),
	612	+ X86_MATCH_INTEL_FAM6_MODEL(HASWELL, &snb_cstates),
	613	+ X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X, &snb_cstates),
	614	+ X86_MATCH_INTEL_FAM6_MODEL(HASWELL_G, &snb_cstates),
618	615
619		− X86_CSTATES_MODEL(INTEL_FAM6_HASWELL_L, hswult_cstates),
	616	+ X86_MATCH_INTEL_FAM6_MODEL(HASWELL_L, &hswult_cstates),
620	617
621		− X86_CSTATES_MODEL(INTEL_FAM6_ATOM_SILVERMONT, slm_cstates),
622		− X86_CSTATES_MODEL(INTEL_FAM6_ATOM_SILVERMONT_D, slm_cstates),
623		− X86_CSTATES_MODEL(INTEL_FAM6_ATOM_AIRMONT, slm_cstates),
	618	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, &slm_cstates),
	619	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_D, &slm_cstates),
	620	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT, &slm_cstates),
624	621
625		− X86_CSTATES_MODEL(INTEL_FAM6_BROADWELL, snb_cstates),
626		− X86_CSTATES_MODEL(INTEL_FAM6_BROADWELL_D, snb_cstates),
627		− X86_CSTATES_MODEL(INTEL_FAM6_BROADWELL_G, snb_cstates),
628		− X86_CSTATES_MODEL(INTEL_FAM6_BROADWELL_X, snb_cstates),
	622	+ X86_MATCH_INTEL_FAM6_MODEL(BROADWELL, &snb_cstates),
	623	+ X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D, &snb_cstates),
	624	+ X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G, &snb_cstates),
	625	+ X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, &snb_cstates),
629	626
630		− X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE_L, snb_cstates),
631		− X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE, snb_cstates),
632		− X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE_X, snb_cstates),
	627	+ X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, &snb_cstates),
	628	+ X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, &snb_cstates),
	629	+ X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, &snb_cstates),
633	630
634		− X86_CSTATES_MODEL(INTEL_FAM6_KABYLAKE_L, hswult_cstates),
635		− X86_CSTATES_MODEL(INTEL_FAM6_KABYLAKE, hswult_cstates),
636		− X86_CSTATES_MODEL(INTEL_FAM6_COMETLAKE_L, hswult_cstates),
637		− X86_CSTATES_MODEL(INTEL_FAM6_COMETLAKE, hswult_cstates),
	631	+ X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, &hswult_cstates),
	632	+ X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, &hswult_cstates),
	633	+ X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L, &hswult_cstates),
	634	+ X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, &hswult_cstates),
638	635
639		− X86_CSTATES_MODEL(INTEL_FAM6_CANNONLAKE_L, cnl_cstates),
	636	+ X86_MATCH_INTEL_FAM6_MODEL(CANNONLAKE_L, &cnl_cstates),
640	637
641		− X86_CSTATES_MODEL(INTEL_FAM6_XEON_PHI_KNL, knl_cstates),
642		− X86_CSTATES_MODEL(INTEL_FAM6_XEON_PHI_KNM, knl_cstates),
	638	+ X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &knl_cstates),
	639	+ X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &knl_cstates),
643	640
644		− X86_CSTATES_MODEL(INTEL_FAM6_ATOM_GOLDMONT, glm_cstates),
645		− X86_CSTATES_MODEL(INTEL_FAM6_ATOM_GOLDMONT_D, glm_cstates),
646		− X86_CSTATES_MODEL(INTEL_FAM6_ATOM_GOLDMONT_PLUS, glm_cstates),
647		− X86_CSTATES_MODEL(INTEL_FAM6_ATOM_TREMONT_D, glm_cstates),
648		− X86_CSTATES_MODEL(INTEL_FAM6_ATOM_TREMONT, glm_cstates),
	641	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, &glm_cstates),
	642	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_D, &glm_cstates),
	643	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &glm_cstates),
	644	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &glm_cstates),
	645	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT, &glm_cstates),
649	646
650		− X86_CSTATES_MODEL(INTEL_FAM6_ICELAKE_L, icl_cstates),
651		− X86_CSTATES_MODEL(INTEL_FAM6_ICELAKE, icl_cstates),
652		− X86_CSTATES_MODEL(INTEL_FAM6_TIGERLAKE_L, icl_cstates),
653		− X86_CSTATES_MODEL(INTEL_FAM6_TIGERLAKE, icl_cstates),
	647	+ X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, &icl_cstates),
	648	+ X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, &icl_cstates),
	649	+ X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, &icl_cstates),
	650	+ X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, &icl_cstates),
654	651	{ },
655	652	};
656	653	MODULE_DEVICE_TABLE(x86cpu, intel_cstates_match);

arch/x86/events/intel/rapl.c+27−31

@@ -668,9 +668,6 @@ static int __init init_rapl_pmus(void) · 667 unmodified lines
668	668	return 0;
669	669	}
670	670
671		−#define X86_RAPL_MODEL_MATCH(model, init) \
672		− { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, (unsigned long)&init }
673		−
674	671	static struct rapl_model model_snb = {
675	672	.events = BIT(PERF_RAPL_PP0) \|
676	673	BIT(PERF_RAPL_PKG) \|
@@ -716,36 +713,35 @@ static struct rapl_model model_skl = { · 39 unmodified lines
716	713	};
717	714
718	715	static const struct x86_cpu_id rapl_model_match[] __initconst = {
719		− X86_RAPL_MODEL_MATCH(INTEL_FAM6_SANDYBRIDGE, model_snb),
720		− X86_RAPL_MODEL_MATCH(INTEL_FAM6_SANDYBRIDGE_X, model_snbep),
721		− X86_RAPL_MODEL_MATCH(INTEL_FAM6_IVYBRIDGE, model_snb),
722		− X86_RAPL_MODEL_MATCH(INTEL_FAM6_IVYBRIDGE_X, model_snbep),
723		− X86_RAPL_MODEL_MATCH(INTEL_FAM6_HASWELL, model_hsw),
724		− X86_RAPL_MODEL_MATCH(INTEL_FAM6_HASWELL_X, model_hsx),
725		− X86_RAPL_MODEL_MATCH(INTEL_FAM6_HASWELL_L, model_hsw),
726		− X86_RAPL_MODEL_MATCH(INTEL_FAM6_HASWELL_G, model_hsw),
727		− X86_RAPL_MODEL_MATCH(INTEL_FAM6_BROADWELL, model_hsw),
728		− X86_RAPL_MODEL_MATCH(INTEL_FAM6_BROADWELL_G, model_hsw),
729		− X86_RAPL_MODEL_MATCH(INTEL_FAM6_BROADWELL_X, model_hsx),
730		− X86_RAPL_MODEL_MATCH(INTEL_FAM6_BROADWELL_D, model_hsx),
731		− X86_RAPL_MODEL_MATCH(INTEL_FAM6_XEON_PHI_KNL, model_knl),
732		− X86_RAPL_MODEL_MATCH(INTEL_FAM6_XEON_PHI_KNM, model_knl),
733		− X86_RAPL_MODEL_MATCH(INTEL_FAM6_SKYLAKE_L, model_skl),
734		− X86_RAPL_MODEL_MATCH(INTEL_FAM6_SKYLAKE, model_skl),
735		− X86_RAPL_MODEL_MATCH(INTEL_FAM6_SKYLAKE_X, model_hsx),
736		− X86_RAPL_MODEL_MATCH(INTEL_FAM6_KABYLAKE_L, model_skl),
737		− X86_RAPL_MODEL_MATCH(INTEL_FAM6_KABYLAKE, model_skl),
738		− X86_RAPL_MODEL_MATCH(INTEL_FAM6_CANNONLAKE_L, model_skl),
739		− X86_RAPL_MODEL_MATCH(INTEL_FAM6_ATOM_GOLDMONT, model_hsw),
740		− X86_RAPL_MODEL_MATCH(INTEL_FAM6_ATOM_GOLDMONT_D, model_hsw),
741		− X86_RAPL_MODEL_MATCH(INTEL_FAM6_ATOM_GOLDMONT_PLUS, model_hsw),
742		− X86_RAPL_MODEL_MATCH(INTEL_FAM6_ICELAKE_L, model_skl),
743		− X86_RAPL_MODEL_MATCH(INTEL_FAM6_ICELAKE, model_skl),
744		− X86_RAPL_MODEL_MATCH(INTEL_FAM6_COMETLAKE_L, model_skl),
745		− X86_RAPL_MODEL_MATCH(INTEL_FAM6_COMETLAKE, model_skl),
	716	+ X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE, &model_snb),
	717	+ X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X, &model_snbep),
	718	+ X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE, &model_snb),
	719	+ X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X, &model_snbep),
	720	+ X86_MATCH_INTEL_FAM6_MODEL(HASWELL, &model_hsw),
	721	+ X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X, &model_hsx),
	722	+ X86_MATCH_INTEL_FAM6_MODEL(HASWELL_L, &model_hsw),
	723	+ X86_MATCH_INTEL_FAM6_MODEL(HASWELL_G, &model_hsw),
	724	+ X86_MATCH_INTEL_FAM6_MODEL(BROADWELL, &model_hsw),
	725	+ X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G, &model_hsw),
	726	+ X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, &model_hsx),
	727	+ X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D, &model_hsx),
	728	+ X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &model_knl),
	729	+ X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &model_knl),
	730	+ X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, &model_skl),
	731	+ X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, &model_skl),
	732	+ X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, &model_hsx),
	733	+ X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, &model_skl),
	734	+ X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, &model_skl),
	735	+ X86_MATCH_INTEL_FAM6_MODEL(CANNONLAKE_L, &model_skl),
	736	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, &model_hsw),
	737	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_D, &model_hsw),
	738	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &model_hsw),
	739	+ X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, &model_skl),
	740	+ X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, &model_skl),
	741	+ X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L, &model_skl),
	742	+ X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, &model_skl),
746	743	{},
747	744	};
748		−
749	745	MODULE_DEVICE_TABLE(x86cpu, rapl_model_match);
750	746
751	747	static int __init rapl_pmu_init(void)

arch/x86/events/intel/uncore.c+31−36

@@ -1392,10 +1392,6 @@ err: · 1391 unmodified lines
1392	1392	return ret;
1393	1393	}
1394	1394
1395		−
1396		−#define X86_UNCORE_MODEL_MATCH(model, init) \
1397		− { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, (unsigned long)&init }
1398		−
1399	1395	struct intel_uncore_init_fun {
1400	1396	void (*cpu_init)(void);
1401	1397	int (*pci_init)(void);
@@ -1487,40 +1483,39 @@ static const struct intel_uncore_init_fun snr_uncore_init __initconst = { · 85 unmodified lines
1487	1483	};
1488	1484
1489	1485	static const struct x86_cpu_id intel_uncore_match[] __initconst = {
1490		− X86_UNCORE_MODEL_MATCH(INTEL_FAM6_NEHALEM_EP, nhm_uncore_init),
1491		− X86_UNCORE_MODEL_MATCH(INTEL_FAM6_NEHALEM, nhm_uncore_init),
1492		− X86_UNCORE_MODEL_MATCH(INTEL_FAM6_WESTMERE, nhm_uncore_init),
1493		− X86_UNCORE_MODEL_MATCH(INTEL_FAM6_WESTMERE_EP, nhm_uncore_init),
1494		− X86_UNCORE_MODEL_MATCH(INTEL_FAM6_SANDYBRIDGE, snb_uncore_init),
1495		− X86_UNCORE_MODEL_MATCH(INTEL_FAM6_IVYBRIDGE, ivb_uncore_init),
1496		− X86_UNCORE_MODEL_MATCH(INTEL_FAM6_HASWELL, hsw_uncore_init),
1497		− X86_UNCORE_MODEL_MATCH(INTEL_FAM6_HASWELL_L, hsw_uncore_init),
1498		− X86_UNCORE_MODEL_MATCH(INTEL_FAM6_HASWELL_G, hsw_uncore_init),
1499		− X86_UNCORE_MODEL_MATCH(INTEL_FAM6_BROADWELL, bdw_uncore_init),
1500		− X86_UNCORE_MODEL_MATCH(INTEL_FAM6_BROADWELL_G, bdw_uncore_init),
1501		− X86_UNCORE_MODEL_MATCH(INTEL_FAM6_SANDYBRIDGE_X, snbep_uncore_init),
1502		− X86_UNCORE_MODEL_MATCH(INTEL_FAM6_NEHALEM_EX, nhmex_uncore_init),
1503		− X86_UNCORE_MODEL_MATCH(INTEL_FAM6_WESTMERE_EX, nhmex_uncore_init),
1504		− X86_UNCORE_MODEL_MATCH(INTEL_FAM6_IVYBRIDGE_X, ivbep_uncore_init),
1505		− X86_UNCORE_MODEL_MATCH(INTEL_FAM6_HASWELL_X, hswep_uncore_init),
1506		− X86_UNCORE_MODEL_MATCH(INTEL_FAM6_BROADWELL_X, bdx_uncore_init),
1507		− X86_UNCORE_MODEL_MATCH(INTEL_FAM6_BROADWELL_D, bdx_uncore_init),
1508		− X86_UNCORE_MODEL_MATCH(INTEL_FAM6_XEON_PHI_KNL, knl_uncore_init),
1509		− X86_UNCORE_MODEL_MATCH(INTEL_FAM6_XEON_PHI_KNM, knl_uncore_init),
1510		− X86_UNCORE_MODEL_MATCH(INTEL_FAM6_SKYLAKE, skl_uncore_init),
1511		− X86_UNCORE_MODEL_MATCH(INTEL_FAM6_SKYLAKE_L, skl_uncore_init),
1512		− X86_UNCORE_MODEL_MATCH(INTEL_FAM6_SKYLAKE_X, skx_uncore_init),
1513		− X86_UNCORE_MODEL_MATCH(INTEL_FAM6_KABYLAKE_L, skl_uncore_init),
1514		− X86_UNCORE_MODEL_MATCH(INTEL_FAM6_KABYLAKE, skl_uncore_init),
1515		− X86_UNCORE_MODEL_MATCH(INTEL_FAM6_ICELAKE_L, icl_uncore_init),
1516		− X86_UNCORE_MODEL_MATCH(INTEL_FAM6_ICELAKE_NNPI, icl_uncore_init),
1517		− X86_UNCORE_MODEL_MATCH(INTEL_FAM6_ICELAKE, icl_uncore_init),
1518		− X86_UNCORE_MODEL_MATCH(INTEL_FAM6_TIGERLAKE_L, tgl_l_uncore_init),
1519		− X86_UNCORE_MODEL_MATCH(INTEL_FAM6_TIGERLAKE, tgl_uncore_init),
1520		− X86_UNCORE_MODEL_MATCH(INTEL_FAM6_ATOM_TREMONT_D, snr_uncore_init),
	1486	+ X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EP, &nhm_uncore_init),
	1487	+ X86_MATCH_INTEL_FAM6_MODEL(NEHALEM, &nhm_uncore_init),
	1488	+ X86_MATCH_INTEL_FAM6_MODEL(WESTMERE, &nhm_uncore_init),
	1489	+ X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EP, &nhm_uncore_init),
	1490	+ X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE, &snb_uncore_init),
	1491	+ X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE, &ivb_uncore_init),
	1492	+ X86_MATCH_INTEL_FAM6_MODEL(HASWELL, &hsw_uncore_init),
	1493	+ X86_MATCH_INTEL_FAM6_MODEL(HASWELL_L, &hsw_uncore_init),
	1494	+ X86_MATCH_INTEL_FAM6_MODEL(HASWELL_G, &hsw_uncore_init),
	1495	+ X86_MATCH_INTEL_FAM6_MODEL(BROADWELL, &bdw_uncore_init),
	1496	+ X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G, &bdw_uncore_init),
	1497	+ X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X, &snbep_uncore_init),
	1498	+ X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EX, &nhmex_uncore_init),
	1499	+ X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EX, &nhmex_uncore_init),
	1500	+ X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X, &ivbep_uncore_init),
	1501	+ X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X, &hswep_uncore_init),
	1502	+ X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, &bdx_uncore_init),
	1503	+ X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D, &bdx_uncore_init),
	1504	+ X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &knl_uncore_init),
	1505	+ X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &knl_uncore_init),
	1506	+ X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, &skl_uncore_init),
	1507	+ X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, &skl_uncore_init),
	1508	+ X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, &skx_uncore_init),
	1509	+ X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, &skl_uncore_init),
	1510	+ X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, &skl_uncore_init),
	1511	+ X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, &icl_uncore_init),
	1512	+ X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_NNPI, &icl_uncore_init),
	1513	+ X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, &icl_uncore_init),
	1514	+ X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, &tgl_l_uncore_init),
	1515	+ X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, &tgl_uncore_init),
	1516	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &snr_uncore_init),
1521	1517	{},
1522	1518	};
1523		−
1524	1519	MODULE_DEVICE_TABLE(x86cpu, intel_uncore_match);
1525	1520
1526	1521	static int __init intel_uncore_init(void)

arch/x86/include/asm/amd_nb.h+0−1

@@ -12,7 +12,6 @@ struct amd_nb_bus_dev_range { · 11 unmodified lines
12	12	u8 dev_limit;
13	13	};
14	14
15		−extern const struct pci_device_id amd_nb_misc_ids[];
16	15	extern const struct amd_nb_bus_dev_range amd_nb_bus_dev_ranges[];
17	16
18	17	extern bool early_is_amd_nb(u32 value);

arch/x86/include/asm/cpu_device_id.h+131−1

@@ -5,9 +5,139 @@ · 4 unmodified lines
5	5	/*
6	6	* Declare drivers belonging to specific x86 CPUs
7	7	* Similar in spirit to pci_device_id and related PCI functions
	8	+ *
	9	+ * The wildcard initializers are in mod_devicetable.h because
	10	+ * file2alias needs them. Sigh.
8	11	*/
9		−
10	12	#include <linux/mod_devicetable.h>
	13	+/* Get the INTEL_FAM* model defines */
	14	+#include <asm/intel-family.h>
	15	+/* And the X86_VENDOR_* ones */
	16	+#include <asm/processor.h>
	17	+
	18	+/* Centaur FAM6 models */
	19	+#define X86_CENTAUR_FAM6_C7_A 0xa
	20	+#define X86_CENTAUR_FAM6_C7_D 0xd
	21	+#define X86_CENTAUR_FAM6_NANO 0xf
	22	+
	23	+/**
	24	+ * X86_MATCH_VENDOR_FAM_MODEL_FEATURE - Base macro for CPU matching
	25	+ * @_vendor: The vendor name, e.g. INTEL, AMD, HYGON, ..., ANY
	26	+ * The name is expanded to X86_VENDOR_@_vendor
	27	+ * @_family: The family number or X86_FAMILY_ANY
	28	+ * @_model: The model number, model constant or X86_MODEL_ANY
	29	+ * @_feature: A X86_FEATURE bit or X86_FEATURE_ANY
	30	+ * @_data: Driver specific data or NULL. The internal storage
	31	+ * format is unsigned long. The supplied value, pointer
	32	+ * etc. is casted to unsigned long internally.
	33	+ *
	34	+ * Use only if you need all selectors. Otherwise use one of the shorter
	35	+ * macros of the X86_MATCH_* family. If there is no matching shorthand
	36	+ * macro, consider to add one. If you really need to wrap one of the macros
	37	+ * into another macro at the usage site for good reasons, then please
	38	+ * start this local macro with X86_MATCH to allow easy grepping.
	39	+ */
	40	+#define X86_MATCH_VENDOR_FAM_MODEL_FEATURE(_vendor, _family, _model, \
	41	+ _feature, _data) { \
	42	+ .vendor = X86_VENDOR_##_vendor, \
	43	+ .family = _family, \
	44	+ .model = _model, \
	45	+ .feature = _feature, \
	46	+ .driver_data = (unsigned long) _data \
	47	+}
	48	+
	49	+/**
	50	+ * X86_MATCH_VENDOR_FAM_FEATURE - Macro for matching vendor, family and CPU feature
	51	+ * @vendor: The vendor name, e.g. INTEL, AMD, HYGON, ..., ANY
	52	+ * The name is expanded to X86_VENDOR_@vendor
	53	+ * @family: The family number or X86_FAMILY_ANY
	54	+ * @feature: A X86_FEATURE bit
	55	+ * @data: Driver specific data or NULL. The internal storage
	56	+ * format is unsigned long. The supplied value, pointer
	57	+ * etc. is casted to unsigned long internally.
	58	+ *
	59	+ * All other missing arguments of X86_MATCH_VENDOR_FAM_MODEL_FEATURE() are
	60	+ * set to wildcards.
	61	+ */
	62	+#define X86_MATCH_VENDOR_FAM_FEATURE(vendor, family, feature, data) \
	63	+ X86_MATCH_VENDOR_FAM_MODEL_FEATURE(vendor, family, \
	64	+ X86_MODEL_ANY, feature, data)
	65	+
	66	+/**
	67	+ * X86_MATCH_VENDOR_FEATURE - Macro for matching vendor and CPU feature
	68	+ * @vendor: The vendor name, e.g. INTEL, AMD, HYGON, ..., ANY
	69	+ * The name is expanded to X86_VENDOR_@vendor
	70	+ * @feature: A X86_FEATURE bit
	71	+ * @data: Driver specific data or NULL. The internal storage
	72	+ * format is unsigned long. The supplied value, pointer
	73	+ * etc. is casted to unsigned long internally.
	74	+ *
	75	+ * All other missing arguments of X86_MATCH_VENDOR_FAM_MODEL_FEATURE() are
	76	+ * set to wildcards.
	77	+ */
	78	+#define X86_MATCH_VENDOR_FEATURE(vendor, feature, data) \
	79	+ X86_MATCH_VENDOR_FAM_FEATURE(vendor, X86_FAMILY_ANY, feature, data)
	80	+
	81	+/**
	82	+ * X86_MATCH_FEATURE - Macro for matching a CPU feature
	83	+ * @feature: A X86_FEATURE bit
	84	+ * @data: Driver specific data or NULL. The internal storage
	85	+ * format is unsigned long. The supplied value, pointer
	86	+ * etc. is casted to unsigned long internally.
	87	+ *
	88	+ * All other missing arguments of X86_MATCH_VENDOR_FAM_MODEL_FEATURE() are
	89	+ * set to wildcards.
	90	+ */
	91	+#define X86_MATCH_FEATURE(feature, data) \
	92	+ X86_MATCH_VENDOR_FEATURE(ANY, feature, data)
	93	+
	94	+/**
	95	+ * X86_MATCH_VENDOR_FAM_MODEL - Match vendor, family and model
	96	+ * @vendor: The vendor name, e.g. INTEL, AMD, HYGON, ..., ANY
	97	+ * The name is expanded to X86_VENDOR_@vendor
	98	+ * @family: The family number or X86_FAMILY_ANY
	99	+ * @model: The model number, model constant or X86_MODEL_ANY
	100	+ * @data: Driver specific data or NULL. The internal storage
	101	+ * format is unsigned long. The supplied value, pointer
	102	+ * etc. is casted to unsigned long internally.
	103	+ *
	104	+ * All other missing arguments of X86_MATCH_VENDOR_FAM_MODEL_FEATURE() are
	105	+ * set to wildcards.
	106	+ */
	107	+#define X86_MATCH_VENDOR_FAM_MODEL(vendor, family, model, data) \
	108	+ X86_MATCH_VENDOR_FAM_MODEL_FEATURE(vendor, family, model, \
	109	+ X86_FEATURE_ANY, data)
	110	+
	111	+/**
	112	+ * X86_MATCH_VENDOR_FAM - Match vendor and family
	113	+ * @vendor: The vendor name, e.g. INTEL, AMD, HYGON, ..., ANY
	114	+ * The name is expanded to X86_VENDOR_@vendor
	115	+ * @family: The family number or X86_FAMILY_ANY
	116	+ * @data: Driver specific data or NULL. The internal storage
	117	+ * format is unsigned long. The supplied value, pointer
	118	+ * etc. is casted to unsigned long internally.
	119	+ *
	120	+ * All other missing arguments to X86_MATCH_VENDOR_FAM_MODEL_FEATURE() are
	121	+ * set of wildcards.
	122	+ */
	123	+#define X86_MATCH_VENDOR_FAM(vendor, family, data) \
	124	+ X86_MATCH_VENDOR_FAM_MODEL(vendor, family, X86_MODEL_ANY, data)
	125	+
	126	+/**
	127	+ * X86_MATCH_INTEL_FAM6_MODEL - Match vendor INTEL, family 6 and model
	128	+ * @model: The model name without the INTEL_FAM6_ prefix or ANY
	129	+ * The model name is expanded to INTEL_FAM6_@model internally
	130	+ * @data: Driver specific data or NULL. The internal storage
	131	+ * format is unsigned long. The supplied value, pointer
	132	+ * etc. is casted to unsigned long internally.
	133	+ *
	134	+ * The vendor is set to INTEL, the family to 6 and all other missing
	135	+ * arguments of X86_MATCH_VENDOR_FAM_MODEL_FEATURE() are set to wildcards.
	136	+ *
	137	+ * See X86_MATCH_VENDOR_FAM_MODEL_FEATURE() for further information.
	138	+ */
	139	+#define X86_MATCH_INTEL_FAM6_MODEL(model, data) \
	140	+ X86_MATCH_VENDOR_FAM_MODEL(INTEL, 6, INTEL_FAM6_##model, data)
11	141
12	142	/*
13	143	* Match specific microcode revisions.

arch/x86/include/asm/cpufeatures.h+1−1

@@ -217,7 +217,7 @@ · 216 unmodified lines
217	217	#define X86_FEATURE_IBRS ( 732+25) / Indirect Branch Restricted Speculation */
218	218	#define X86_FEATURE_IBPB ( 732+26) / Indirect Branch Prediction Barrier */
219	219	#define X86_FEATURE_STIBP ( 732+27) / Single Thread Indirect Branch Predictors */
220		−#define X86_FEATURE_ZEN ( 732+28) / "" CPU is AMD family 0x17 (Zen) */
	220	+#define X86_FEATURE_ZEN ( 732+28) / "" CPU is AMD family 0x17 or above (Zen) */
221	221	#define X86_FEATURE_L1TF_PTEINV ( 732+29) / "" L1TF workaround PTE inversion */
222	222	#define X86_FEATURE_IBRS_ENHANCED ( 732+30) / Enhanced IBRS */
223	223	#define X86_FEATURE_MSR_IA32_FEAT_CTL ( 732+31) / "" MSR IA32_FEAT_CTL configured */

arch/x86/include/asm/intel-family.h+5−12

@@ -35,6 +35,9 @@ · 34 unmodified lines
35	35	* The #define line may optionally include a comment including platform names.
36	36	*/
37	37
	38	+/* Wildcard match for FAM6 so X86_MATCH_INTEL_FAM6_MODEL(ANY) works */
	39	+#define INTEL_FAM6_ANY X86_MODEL_ANY
	40	+
38	41	#define INTEL_FAM6_CORE_YONAH 0x0E
39	42
40	43	#define INTEL_FAM6_CORE2_MEROM 0x0F
@@ -118,17 +121,7 @@ · 77 unmodified lines
118	121	#define INTEL_FAM6_XEON_PHI_KNL 0x57 /* Knights Landing */
119	122	#define INTEL_FAM6_XEON_PHI_KNM 0x85 /* Knights Mill */
120	123
121		−/* Useful macros */
122		−#define INTEL_CPU_FAM_ANY(_family, _model, _driver_data) \
123		−{ \
124		− .vendor = X86_VENDOR_INTEL, \
125		− .family = _family, \
126		− .model = _model, \
127		− .feature = X86_FEATURE_ANY, \
128		− .driver_data = (kernel_ulong_t)&_driver_data \
129		−}
130		−
131		−#define INTEL_CPU_FAM6(_model, _driver_data) \
132		− INTEL_CPU_FAM_ANY(6, INTEL_FAM6_##_model, _driver_data)
	124	+/* Family 5 */
	125	+#define INTEL_FAM5_QUARK_X1000 0x09 /* Quark X1000 SoC */
133	126
134	127	#endif /* _ASM_X86_INTEL_FAMILY_H */

arch/x86/kernel/amd_nb.c+1−3

@@ -36,10 +36,9 @@ static const struct pci_device_id amd_root_ids[] = { · 35 unmodified lines
36	36	{}
37	37	};
38	38
39		−
40	39	#define PCI_DEVICE_ID_AMD_CNB17H_F4 0x1704
41	40
42		−const struct pci_device_id amd_nb_misc_ids[] = {
	41	+static const struct pci_device_id amd_nb_misc_ids[] = {
43	42	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MISC) },
44	43	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC) },
45	44	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F3) },
@@ -56,7 +55,6 @@ const struct pci_device_id amd_nb_misc_ids[] = { · 10 unmodified lines
56	55	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_DF_F3) },
57	56	{}
58	57	};
59		−EXPORT_SYMBOL_GPL(amd_nb_misc_ids);
60	58
61	59	static const struct pci_device_id amd_nb_link_ids[] = {
62	60	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) },

arch/x86/kernel/apic/apic.c+13−19

@@ -546,12 +546,6 @@ static struct clock_event_device lapic_clockevent = { · 545 unmodified lines
546	546	};
547	547	static DEFINE_PER_CPU(struct clock_event_device, lapic_events);
548	548
549		−#define DEADLINE_MODEL_MATCH_FUNC(model, func) \
550		− { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, (unsigned long)&func }
551		−
552		−#define DEADLINE_MODEL_MATCH_REV(model, rev) \
553		− { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, (unsigned long)rev }
554		−
555	549	static u32 hsx_deadline_rev(void)
556	550	{
557	551	switch (boot_cpu_data.x86_stepping) {
@@ -588,23 +582,23 @@ static u32 skx_deadline_rev(void) · 30 unmodified lines
588	582	}
589	583
590	584	static const struct x86_cpu_id deadline_match[] = {
591		− DEADLINE_MODEL_MATCH_FUNC( INTEL_FAM6_HASWELL_X, hsx_deadline_rev),
592		− DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_BROADWELL_X, 0x0b000020),
593		− DEADLINE_MODEL_MATCH_FUNC( INTEL_FAM6_BROADWELL_D, bdx_deadline_rev),
594		− DEADLINE_MODEL_MATCH_FUNC( INTEL_FAM6_SKYLAKE_X, skx_deadline_rev),
	585	+ X86_MATCH_INTEL_FAM6_MODEL( HASWELL_X, &hsx_deadline_rev),
	586	+ X86_MATCH_INTEL_FAM6_MODEL( BROADWELL_X, 0x0b000020),
	587	+ X86_MATCH_INTEL_FAM6_MODEL( BROADWELL_D, &bdx_deadline_rev),
	588	+ X86_MATCH_INTEL_FAM6_MODEL( SKYLAKE_X, &skx_deadline_rev),
595	589
596		− DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_HASWELL, 0x22),
597		− DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_HASWELL_L, 0x20),
598		− DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_HASWELL_G, 0x17),
	590	+ X86_MATCH_INTEL_FAM6_MODEL( HASWELL, 0x22),
	591	+ X86_MATCH_INTEL_FAM6_MODEL( HASWELL_L, 0x20),
	592	+ X86_MATCH_INTEL_FAM6_MODEL( HASWELL_G, 0x17),
599	593
600		− DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_BROADWELL, 0x25),
601		− DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_BROADWELL_G, 0x17),
	594	+ X86_MATCH_INTEL_FAM6_MODEL( BROADWELL, 0x25),
	595	+ X86_MATCH_INTEL_FAM6_MODEL( BROADWELL_G, 0x17),
602	596
603		− DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_SKYLAKE_L, 0xb2),
604		− DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_SKYLAKE, 0xb2),
	597	+ X86_MATCH_INTEL_FAM6_MODEL( SKYLAKE_L, 0xb2),
	598	+ X86_MATCH_INTEL_FAM6_MODEL( SKYLAKE, 0xb2),
605	599
606		− DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_KABYLAKE_L, 0x52),
607		− DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_KABYLAKE, 0x52),
	600	+ X86_MATCH_INTEL_FAM6_MODEL( KABYLAKE_L, 0x52),
	601	+ X86_MATCH_INTEL_FAM6_MODEL( KABYLAKE, 0x52),
608	602
609	603	{},
610	604	};

arch/x86/kernel/cpu/amd.c+2−1

@@ -926,7 +926,8 @@ static void init_amd(struct cpuinfo_x86 *c) · 925 unmodified lines
926	926	case 0x12: init_amd_ln(c); break;
927	927	case 0x15: init_amd_bd(c); break;
928	928	case 0x16: init_amd_jg(c); break;
929		− case 0x17: init_amd_zn(c); break;
	929	+ case 0x17: fallthrough;
	930	+ case 0x19: init_amd_zn(c); break;
930	931	}
931	932
932	933	/*

arch/x86/kernel/cpu/common.c+2−2

@@ -1008,8 +1008,8 @@ static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c) · 1007 unmodified lines
1008	1008	#define NO_ITLB_MULTIHIT BIT(7)
1009	1009	#define NO_SPECTRE_V2 BIT(8)
1010	1010
1011		−#define VULNWL(_vendor, _family, _model, _whitelist) \
1012		− { X86_VENDOR_##_vendor, _family, _model, X86_FEATURE_ANY, _whitelist }
	1011	+#define VULNWL(vendor, family, model, whitelist) \
	1012	+ X86_MATCH_VENDOR_FAM_MODEL(vendor, family, model, whitelist)
1013	1013
1014	1014	#define VULNWL_INTEL(model, whitelist) \
1015	1015	VULNWL(INTEL, 6, INTEL_FAM6_##model, whitelist)

arch/x86/kernel/cpu/match.c+9−4

@@ -16,12 +16,17 @@ · 15 unmodified lines
16	16	* respective wildcard entries.
17	17	*
18	18	* A typical table entry would be to match a specific CPU
19		− * { X86_VENDOR_INTEL, 6, 0x12 }
20		− * or to match a specific CPU feature
21		− * { X86_FEATURE_MATCH(X86_FEATURE_FOOBAR) }
	19	+ *
	20	+ * X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, INTEL_FAM6_BROADWELL,
	21	+ * X86_FEATURE_ANY, NULL);
22	22	*
23	23	* Fields can be wildcarded with %X86_VENDOR_ANY, %X86_FAMILY_ANY,
24		− * %X86_MODEL_ANY, %X86_FEATURE_ANY or 0 (except for vendor)
	24	+ * %X86_MODEL_ANY, %X86_FEATURE_ANY (except for vendor)
	25	+ *
	26	+ * asm/cpu_device_id.h contains a set of useful macros which are shortcuts
	27	+ * for various common selections. The above can be shortened to:
	28	+ *
	29	+ * X86_MATCH_INTEL_FAM6_MODEL(BROADWELL, NULL);
25	30	*
26	31	* Arrays used to match for this should also be declared using
27	32	* MODULE_DEVICE_TABLE(x86cpu, ...)

arch/x86/kernel/smpboot.c+1−1

@@ -466,7 +466,7 @@ static bool match_smt(struct cpuinfo_x86 c, struct cpuinfo_x86 o) · 465 unmodified lines
466	466	*/
467	467
468	468	static const struct x86_cpu_id snc_cpu[] = {
469		− { X86_VENDOR_INTEL, 6, INTEL_FAM6_SKYLAKE_X },
	469	+ X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, NULL),
470	470	{}
471	471	};
472	472

arch/x86/kernel/tsc_msr.c+7−7

@@ -63,13 +63,13 @@ static const struct freq_desc freq_desc_lgm = { · 62 unmodified lines
63	63	};
64	64
65	65	static const struct x86_cpu_id tsc_msr_cpu_ids[] = {
66		− INTEL_CPU_FAM6(ATOM_SALTWELL_MID, freq_desc_pnw),
67		− INTEL_CPU_FAM6(ATOM_SALTWELL_TABLET, freq_desc_clv),
68		− INTEL_CPU_FAM6(ATOM_SILVERMONT, freq_desc_byt),
69		− INTEL_CPU_FAM6(ATOM_SILVERMONT_MID, freq_desc_tng),
70		− INTEL_CPU_FAM6(ATOM_AIRMONT, freq_desc_cht),
71		− INTEL_CPU_FAM6(ATOM_AIRMONT_MID, freq_desc_ann),
72		− INTEL_CPU_FAM6(ATOM_AIRMONT_NP, freq_desc_lgm),
	66	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL_MID, &freq_desc_pnw),
	67	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL_TABLET,&freq_desc_clv),
	68	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, &freq_desc_byt),
	69	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, &freq_desc_tng),
	70	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT, &freq_desc_cht),
	71	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT_MID, &freq_desc_ann),
	72	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT_NP, &freq_desc_lgm),
73	73	{}
74	74	};
75	75

arch/x86/kvm/svm.c+2−1

@@ -48,6 +48,7 @@ · 47 unmodified lines
48	48	#include <asm/kvm_para.h>
49	49	#include <asm/irq_remapping.h>
50	50	#include <asm/spec-ctrl.h>
	51	+#include <asm/cpu_device_id.h>
51	52
52	53	#include <asm/virtext.h>
53	54	#include "trace.h"
@@ -59,7 +60,7 @@ MODULE_LICENSE("GPL"); · 5 unmodified lines
59	60
60	61	#ifdef MODULE
61	62	static const struct x86_cpu_id svm_cpu_id[] = {
62		− X86_FEATURE_MATCH(X86_FEATURE_SVM),
	63	+ X86_MATCH_FEATURE(X86_FEATURE_SVM, NULL),
63	64	{}
64	65	};
65	66	MODULE_DEVICE_TABLE(x86cpu, svm_cpu_id);

arch/x86/kvm/vmx/vmx.c+2−1

@@ -31,6 +31,7 @@ · 30 unmodified lines
31	31	#include <asm/apic.h>
32	32	#include <asm/asm.h>
33	33	#include <asm/cpu.h>
	34	+#include <asm/cpu_device_id.h>
34	35	#include <asm/debugreg.h>
35	36	#include <asm/desc.h>
36	37	#include <asm/fpu/internal.h>
@@ -66,7 +67,7 @@ MODULE_LICENSE("GPL"); · 29 unmodified lines
66	67
67	68	#ifdef MODULE
68	69	static const struct x86_cpu_id vmx_cpu_id[] = {
69		− X86_FEATURE_MATCH(X86_FEATURE_VMX),
	70	+ X86_MATCH_FEATURE(X86_FEATURE_VMX, NULL),
70	71	{}
71	72	};
72	73	MODULE_DEVICE_TABLE(x86cpu, vmx_cpu_id);

arch/x86/platform/atom/punit_atom_debug.c+6−7

@@ -117,17 +117,16 @@ static void punit_dbgfs_unregister(void) · 116 unmodified lines
117	117	debugfs_remove_recursive(punit_dbg_file);
118	118	}
119	119
120		−#define ICPU(model, drv_data) \
121		− { X86_VENDOR_INTEL, 6, model, X86_FEATURE_MWAIT,\
122		− (kernel_ulong_t)&drv_data }
	120	+#define X86_MATCH(model, data) \
	121	+ X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, INTEL_FAM6_##model, \
	122	+ X86_FEATURE_MWAIT, data)
123	123
124	124	static const struct x86_cpu_id intel_punit_cpu_ids[] = {
125		− ICPU(INTEL_FAM6_ATOM_SILVERMONT, punit_device_byt),
126		− ICPU(INTEL_FAM6_ATOM_SILVERMONT_MID, punit_device_tng),
127		− ICPU(INTEL_FAM6_ATOM_AIRMONT, punit_device_cht),
	125	+ X86_MATCH(ATOM_SILVERMONT, &punit_device_byt),
	126	+ X86_MATCH(ATOM_SILVERMONT_MID, &punit_device_tng),
	127	+ X86_MATCH(ATOM_AIRMONT, &punit_device_cht),
128	128	{}
129	129	};
130		−
131	130	MODULE_DEVICE_TABLE(x86cpu, intel_punit_cpu_ids);
132	131
133	132	static int __init punit_atom_debug_init(void)

arch/x86/platform/efi/quirks.c+2−5

@@ -659,12 +659,9 @@ static int qrk_capsule_setup_info(struct capsule_info cap_info, void *pkbuff, · 658 unmodified lines
659	659	return 1;
660	660	}
661	661
662		−#define ICPU(family, model, quirk_handler) \
663		− { X86_VENDOR_INTEL, family, model, X86_FEATURE_ANY, \
664		− (unsigned long)&quirk_handler }
665		−
666	662	static const struct x86_cpu_id efi_capsule_quirk_ids[] = {
667		− ICPU(5, 9, qrk_capsule_setup_info), /* Intel Quark X1000 */
	663	+ X86_MATCH_VENDOR_FAM_MODEL(INTEL, 5, INTEL_FAM5_QUARK_X1000,
	664	+ &qrk_capsule_setup_info),
668	665	{ }
669	666	};
670	667

arch/x86/platform/intel-mid/device_libs/platform_bt.c+1−4

@@ -60,11 +60,8 @@ static struct bt_sfi_data tng_bt_sfi_data __initdata = { · 59 unmodified lines
60	60	.setup = tng_bt_sfi_setup,
61	61	};
62	62
63		−#define ICPU(model, ddata) \
64		− { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, (kernel_ulong_t)&ddata }
65		−
66	63	static const struct x86_cpu_id bt_sfi_cpu_ids[] = {
67		− ICPU(INTEL_FAM6_ATOM_SILVERMONT_MID, tng_bt_sfi_data),
	64	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, &tng_bt_sfi_data),
68	65	{}
69	66	};
70	67

arch/x86/platform/intel-quark/imr.c+1−1

@@ -569,7 +569,7 @@ static void __init imr_fixup_memmap(struct imr_device *idev) · 568 unmodified lines
569	569	}
570	570
571	571	static const struct x86_cpu_id imr_ids[] __initconst = {
572		− { X86_VENDOR_INTEL, 5, 9 }, /* Intel Quark SoC X1000. */
	572	+ X86_MATCH_VENDOR_FAM_MODEL(INTEL, 5, INTEL_FAM5_QUARK_X1000, NULL),
573	573	{}
574	574	};
575	575

arch/x86/platform/intel-quark/imr_selftest.c+1−1

@@ -105,7 +105,7 @@ static void __init imr_self_test(void) · 104 unmodified lines
105	105	}
106	106
107	107	static const struct x86_cpu_id imr_ids[] __initconst = {
108		− { X86_VENDOR_INTEL, 5, 9 }, /* Intel Quark SoC X1000. */
	108	+ X86_MATCH_VENDOR_FAM_MODEL(INTEL, 5, INTEL_FAM5_QUARK_X1000, NULL),
109	109	{}
110	110	};
111	111

arch/x86/power/cpu.c+2−14

@@ -475,20 +475,8 @@ static int msr_save_cpuid_features(const struct x86_cpu_id *c) · 474 unmodified lines
475	475	}
476	476
477	477	static const struct x86_cpu_id msr_save_cpu_table[] = {
478		− {
479		− .vendor = X86_VENDOR_AMD,
480		− .family = 0x15,
481		− .model = X86_MODEL_ANY,
482		− .feature = X86_FEATURE_ANY,
483		− .driver_data = (kernel_ulong_t)msr_save_cpuid_features,
484		− },
485		− {
486		− .vendor = X86_VENDOR_AMD,
487		− .family = 0x16,
488		− .model = X86_MODEL_ANY,
489		− .feature = X86_FEATURE_ANY,
490		− .driver_data = (kernel_ulong_t)msr_save_cpuid_features,
491		− },
	478	+ X86_MATCH_VENDOR_FAM(AMD, 0x15, &msr_save_cpuid_features),
	479	+ X86_MATCH_VENDOR_FAM(AMD, 0x16, &msr_save_cpuid_features),
492	480	{}
493	481	};
494	482

drivers/acpi/acpi_lpss.c+2−4

@@ -306,11 +306,9 @@ static const struct lpss_device_desc bsw_spi_dev_desc = { · 305 unmodified lines
306	306	.setup = lpss_deassert_reset,
307	307	};
308	308
309		−#define ICPU(model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
310		−
311	309	static const struct x86_cpu_id lpss_cpu_ids[] = {
312		− ICPU(INTEL_FAM6_ATOM_SILVERMONT), /* Valleyview, Bay Trail */
313		− ICPU(INTEL_FAM6_ATOM_AIRMONT), /* Braswell, Cherry Trail */
	310	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, NULL),
	311	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT, NULL),
314	312	{}
315	313	};
316	314

drivers/acpi/x86/utils.c+10−10

@@ -37,7 +37,7 @@ struct always_present_id { · 36 unmodified lines
37	37	const char *uid;
38	38	};
39	39
40		−#define ICPU(model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
	40	+#define X86_MATCH(model) X86_MATCH_INTEL_FAM6_MODEL(model, NULL)
41	41
42	42	#define ENTRY(hid, uid, cpu_models, dmi...) { \
43	43	{ { hid, }, {} }, \
@@ -51,29 +51,29 @@ static const struct always_present_id always_present_ids[] = { · 7 unmodified lines
51	51	* Bay / Cherry Trail PWM directly poked by GPU driver in win10,
52	52	* but Linux uses a separate PWM driver, harmless if not used.
53	53	*/
54		− ENTRY("80860F09", "1", ICPU(INTEL_FAM6_ATOM_SILVERMONT), {}),
55		− ENTRY("80862288", "1", ICPU(INTEL_FAM6_ATOM_AIRMONT), {}),
	54	+ ENTRY("80860F09", "1", X86_MATCH(ATOM_SILVERMONT), {}),
	55	+ ENTRY("80862288", "1", X86_MATCH(ATOM_AIRMONT), {}),
56	56
57	57	/* Lenovo Yoga Book uses PWM2 for keyboard backlight control */
58		− ENTRY("80862289", "2", ICPU(INTEL_FAM6_ATOM_AIRMONT), {
	58	+ ENTRY("80862289", "2", X86_MATCH(ATOM_AIRMONT), {
59	59	DMI_MATCH(DMI_PRODUCT_NAME, "Lenovo YB1-X9"),
60	60	}),
61	61	/*
62	62	* The INT0002 device is necessary to clear wakeup interrupt sources
63	63	* on Cherry Trail devices, without it we get nobody cared IRQ msgs.
64	64	*/
65		− ENTRY("INT0002", "1", ICPU(INTEL_FAM6_ATOM_AIRMONT), {}),
	65	+ ENTRY("INT0002", "1", X86_MATCH(ATOM_AIRMONT), {}),
66	66	/*
67	67	* On the Dell Venue 11 Pro 7130 and 7139, the DSDT hides
68	68	* the touchscreen ACPI device until a certain time
69	69	* after _SB.PCI0.GFX0.LCD.LCD1._ON gets called has passed
70	70	* and _STA has been called at least 3 times since.
71	71	*/
72		− ENTRY("SYNA7500", "1", ICPU(INTEL_FAM6_HASWELL_L), {
	72	+ ENTRY("SYNA7500", "1", X86_MATCH(HASWELL_L), {
73	73	DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
74	74	DMI_MATCH(DMI_PRODUCT_NAME, "Venue 11 Pro 7130"),
75	75	}),
76		− ENTRY("SYNA7500", "1", ICPU(INTEL_FAM6_HASWELL_L), {
	76	+ ENTRY("SYNA7500", "1", X86_MATCH(HASWELL_L), {
77	77	DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
78	78	DMI_MATCH(DMI_PRODUCT_NAME, "Venue 11 Pro 7139"),
79	79	}),
@@ -89,19 +89,19 @@ static const struct always_present_id always_present_ids[] = { · 9 unmodified lines
89	89	* was copy-pasted from the GPD win, so it has a disabled KIOX000A
90	90	* node which we should not enable, thus we also check the BIOS date.
91	91	*/
92		− ENTRY("KIOX000A", "1", ICPU(INTEL_FAM6_ATOM_AIRMONT), {
	92	+ ENTRY("KIOX000A", "1", X86_MATCH(ATOM_AIRMONT), {
93	93	DMI_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"),
94	94	DMI_MATCH(DMI_BOARD_NAME, "Default string"),
95	95	DMI_MATCH(DMI_PRODUCT_NAME, "Default string"),
96	96	DMI_MATCH(DMI_BIOS_DATE, "02/21/2017")
97	97	}),
98		− ENTRY("KIOX000A", "1", ICPU(INTEL_FAM6_ATOM_AIRMONT), {
	98	+ ENTRY("KIOX000A", "1", X86_MATCH(ATOM_AIRMONT), {
99	99	DMI_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"),
100	100	DMI_MATCH(DMI_BOARD_NAME, "Default string"),
101	101	DMI_MATCH(DMI_PRODUCT_NAME, "Default string"),
102	102	DMI_MATCH(DMI_BIOS_DATE, "03/20/2017")
103	103	}),
104		− ENTRY("KIOX000A", "1", ICPU(INTEL_FAM6_ATOM_AIRMONT), {
	104	+ ENTRY("KIOX000A", "1", X86_MATCH(ATOM_AIRMONT), {
105	105	DMI_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"),
106	106	DMI_MATCH(DMI_BOARD_NAME, "Default string"),
107	107	DMI_MATCH(DMI_PRODUCT_NAME, "Default string"),

drivers/char/agp/amd64-agp.c+1−1

@@ -775,7 +775,7 @@ int __init agp_amd64_init(void) · 774 unmodified lines
775	775	}
776	776
777	777	/* First check that we have at least one AMD64 NB */
778		− if (!pci_dev_present(amd_nb_misc_ids)) {
	778	+ if (!amd_nb_num()) {
779	779	pci_unregister_driver(&agp_amd64_pci_driver);
780	780	return -ENODEV;
781	781	}

drivers/char/hw_random/via-rng.c+3−4

@@ -209,20 +209,19 @@ static int __init mod_init(void) · 208 unmodified lines
209	209	out:
210	210	return err;
211	211	}
	212	+module_init(mod_init);
212	213
213	214	static void __exit mod_exit(void)
214	215	{
215	216	hwrng_unregister(&via_rng);
216	217	}
217		−
218		−module_init(mod_init);
219	218	module_exit(mod_exit);
220	219
221	220	static struct x86_cpu_id __maybe_unused via_rng_cpu_id[] = {
222		− X86_FEATURE_MATCH(X86_FEATURE_XSTORE),
	221	+ X86_MATCH_FEATURE(X86_FEATURE_XSTORE, NULL),
223	222	{}
224	223	};
	224	+MODULE_DEVICE_TABLE(x86cpu, via_rng_cpu_id);
225	225
226	226	MODULE_DESCRIPTION("H/W RNG driver for VIA CPU with PadLock");
227	227	MODULE_LICENSE("GPL");
228		−MODULE_DEVICE_TABLE(x86cpu, via_rng_cpu_id);

drivers/cpufreq/acpi-cpufreq.c+3−2

@@ -30,6 +30,7 @@ · 29 unmodified lines
30	30	#include <asm/msr.h>
31	31	#include <asm/processor.h>
32	32	#include <asm/cpufeature.h>
	33	+#include <asm/cpu_device_id.h>
33	34
34	35	MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
35	36	MODULE_DESCRIPTION("ACPI Processor P-States Driver");
@@ -991,8 +992,8 @@ late_initcall(acpi_cpufreq_init); · 955 unmodified lines
991	992	module_exit(acpi_cpufreq_exit);
992	993
993	994	static const struct x86_cpu_id acpi_cpufreq_ids[] = {
994		− X86_FEATURE_MATCH(X86_FEATURE_ACPI),
995		− X86_FEATURE_MATCH(X86_FEATURE_HW_PSTATE),
	995	+ X86_MATCH_FEATURE(X86_FEATURE_ACPI, NULL),
	996	+ X86_MATCH_FEATURE(X86_FEATURE_HW_PSTATE, NULL),
996	997	{}
997	998	};
998	999	MODULE_DEVICE_TABLE(x86cpu, acpi_cpufreq_ids);

drivers/cpufreq/amd_freq_sensitivity.c+2−1

@@ -18,6 +18,7 @@ · 17 unmodified lines
18	18
19	19	#include <asm/msr.h>
20	20	#include <asm/cpufeature.h>
	21	+#include <asm/cpu_device_id.h>
21	22
22	23	#include "cpufreq_ondemand.h"
23	24
@@ -144,7 +145,7 @@ static void __exit amd_freq_sensitivity_exit(void) · 120 unmodified lines
144	145	module_exit(amd_freq_sensitivity_exit);
145	146
146	147	static const struct x86_cpu_id amd_freq_sensitivity_ids[] = {
147		− X86_FEATURE_MATCH(X86_FEATURE_PROC_FEEDBACK),
	148	+ X86_MATCH_FEATURE(X86_FEATURE_PROC_FEEDBACK, NULL),
148	149	{}
149	150	};
150	151	MODULE_DEVICE_TABLE(x86cpu, amd_freq_sensitivity_ids);

drivers/cpufreq/e_powersaver.c+1−1

@@ -385,7 +385,7 @@ static struct cpufreq_driver eps_driver = { · 384 unmodified lines
385	385	/* This driver will work only on Centaur C7 processors with
386	386	* Enhanced SpeedStep/PowerSaver registers */
387	387	static const struct x86_cpu_id eps_cpu_id[] = {
388		− { X86_VENDOR_CENTAUR, 6, X86_MODEL_ANY, X86_FEATURE_EST },
	388	+ X86_MATCH_VENDOR_FAM_FEATURE(CENTAUR, 6, X86_FEATURE_EST, NULL),
389	389	{}
390	390	};
391	391	MODULE_DEVICE_TABLE(x86cpu, eps_cpu_id);

drivers/cpufreq/elanfreq.c+1−1

@@ -198,7 +198,7 @@ static struct cpufreq_driver elanfreq_driver = { · 197 unmodified lines
198	198	};
199	199
200	200	static const struct x86_cpu_id elan_id[] = {
201		− { X86_VENDOR_AMD, 4, 10, },
	201	+ X86_MATCH_VENDOR_FAM_MODEL(AMD, 4, 10, NULL),
202	202	{}
203	203	};
204	204	MODULE_DEVICE_TABLE(x86cpu, elan_id);

drivers/cpufreq/intel_pstate.c+36−35

@@ -1908,51 +1908,51 @@ static const struct pstate_funcs knl_funcs = { · 1907 unmodified lines
1908	1908	.get_val = core_get_val,
1909	1909	};
1910	1910
1911		−#define ICPU(model, policy) \
1912		− { X86_VENDOR_INTEL, 6, model, X86_FEATURE_APERFMPERF,\
1913		− (unsigned long)&policy }
	1911	+#define X86_MATCH(model, policy) \
	1912	+ X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, INTEL_FAM6_##model, \
	1913	+ X86_FEATURE_APERFMPERF, &policy)
1914	1914
1915	1915	static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
1916		− ICPU(INTEL_FAM6_SANDYBRIDGE, core_funcs),
1917		− ICPU(INTEL_FAM6_SANDYBRIDGE_X, core_funcs),
1918		− ICPU(INTEL_FAM6_ATOM_SILVERMONT, silvermont_funcs),
1919		− ICPU(INTEL_FAM6_IVYBRIDGE, core_funcs),
1920		− ICPU(INTEL_FAM6_HASWELL, core_funcs),
1921		− ICPU(INTEL_FAM6_BROADWELL, core_funcs),
1922		− ICPU(INTEL_FAM6_IVYBRIDGE_X, core_funcs),
1923		− ICPU(INTEL_FAM6_HASWELL_X, core_funcs),
1924		− ICPU(INTEL_FAM6_HASWELL_L, core_funcs),
1925		− ICPU(INTEL_FAM6_HASWELL_G, core_funcs),
1926		− ICPU(INTEL_FAM6_BROADWELL_G, core_funcs),
1927		− ICPU(INTEL_FAM6_ATOM_AIRMONT, airmont_funcs),
1928		− ICPU(INTEL_FAM6_SKYLAKE_L, core_funcs),
1929		− ICPU(INTEL_FAM6_BROADWELL_X, core_funcs),
1930		− ICPU(INTEL_FAM6_SKYLAKE, core_funcs),
1931		− ICPU(INTEL_FAM6_BROADWELL_D, core_funcs),
1932		− ICPU(INTEL_FAM6_XEON_PHI_KNL, knl_funcs),
1933		− ICPU(INTEL_FAM6_XEON_PHI_KNM, knl_funcs),
1934		− ICPU(INTEL_FAM6_ATOM_GOLDMONT, core_funcs),
1935		− ICPU(INTEL_FAM6_ATOM_GOLDMONT_PLUS, core_funcs),
1936		− ICPU(INTEL_FAM6_SKYLAKE_X, core_funcs),
	1916	+ X86_MATCH(SANDYBRIDGE, core_funcs),
	1917	+ X86_MATCH(SANDYBRIDGE_X, core_funcs),
	1918	+ X86_MATCH(ATOM_SILVERMONT, silvermont_funcs),
	1919	+ X86_MATCH(IVYBRIDGE, core_funcs),
	1920	+ X86_MATCH(HASWELL, core_funcs),
	1921	+ X86_MATCH(BROADWELL, core_funcs),
	1922	+ X86_MATCH(IVYBRIDGE_X, core_funcs),
	1923	+ X86_MATCH(HASWELL_X, core_funcs),
	1924	+ X86_MATCH(HASWELL_L, core_funcs),
	1925	+ X86_MATCH(HASWELL_G, core_funcs),
	1926	+ X86_MATCH(BROADWELL_G, core_funcs),
	1927	+ X86_MATCH(ATOM_AIRMONT, airmont_funcs),
	1928	+ X86_MATCH(SKYLAKE_L, core_funcs),
	1929	+ X86_MATCH(BROADWELL_X, core_funcs),
	1930	+ X86_MATCH(SKYLAKE, core_funcs),
	1931	+ X86_MATCH(BROADWELL_D, core_funcs),
	1932	+ X86_MATCH(XEON_PHI_KNL, knl_funcs),
	1933	+ X86_MATCH(XEON_PHI_KNM, knl_funcs),
	1934	+ X86_MATCH(ATOM_GOLDMONT, core_funcs),
	1935	+ X86_MATCH(ATOM_GOLDMONT_PLUS, core_funcs),
	1936	+ X86_MATCH(SKYLAKE_X, core_funcs),
1937	1937	{}
1938	1938	};
1939	1939	MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids);
1940	1940
1941	1941	static const struct x86_cpu_id intel_pstate_cpu_oob_ids[] __initconst = {
1942		− ICPU(INTEL_FAM6_BROADWELL_D, core_funcs),
1943		− ICPU(INTEL_FAM6_BROADWELL_X, core_funcs),
1944		− ICPU(INTEL_FAM6_SKYLAKE_X, core_funcs),
	1942	+ X86_MATCH(BROADWELL_D, core_funcs),
	1943	+ X86_MATCH(BROADWELL_X, core_funcs),
	1944	+ X86_MATCH(SKYLAKE_X, core_funcs),
1945	1945	{}
1946	1946	};
1947	1947
1948	1948	static const struct x86_cpu_id intel_pstate_cpu_ee_disable_ids[] = {
1949		− ICPU(INTEL_FAM6_KABYLAKE, core_funcs),
	1949	+ X86_MATCH(KABYLAKE, core_funcs),
1950	1950	{}
1951	1951	};
1952	1952
1953	1953	static const struct x86_cpu_id intel_pstate_hwp_boost_ids[] = {
1954		− ICPU(INTEL_FAM6_SKYLAKE_X, core_funcs),
1955		− ICPU(INTEL_FAM6_SKYLAKE, core_funcs),
	1954	+ X86_MATCH(SKYLAKE_X, core_funcs),
	1955	+ X86_MATCH(SKYLAKE, core_funcs),
1956	1956	{}
1957	1957	};
1958	1958
@@ -2725,13 +2725,14 @@ static inline void intel_pstate_request_control_from_smm(void) {} · 766 unmodified lines
2725	2725
2726	2726	#define INTEL_PSTATE_HWP_BROADWELL 0x01
2727	2727
2728		−#define ICPU_HWP(model, hwp_mode) \
2729		− { X86_VENDOR_INTEL, 6, model, X86_FEATURE_HWP, hwp_mode }
	2728	+#define X86_MATCH_HWP(model, hwp_mode) \
	2729	+ X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, INTEL_FAM6_##model, \
	2730	+ X86_FEATURE_HWP, hwp_mode)
2730	2731
2731	2732	static const struct x86_cpu_id hwp_support_ids[] __initconst = {
2732		− ICPU_HWP(INTEL_FAM6_BROADWELL_X, INTEL_PSTATE_HWP_BROADWELL),
2733		− ICPU_HWP(INTEL_FAM6_BROADWELL_D, INTEL_PSTATE_HWP_BROADWELL),
2734		− ICPU_HWP(X86_MODEL_ANY, 0),
	2733	+ X86_MATCH_HWP(BROADWELL_X, INTEL_PSTATE_HWP_BROADWELL),
	2734	+ X86_MATCH_HWP(BROADWELL_D, INTEL_PSTATE_HWP_BROADWELL),
	2735	+ X86_MATCH_HWP(ANY, 0),
2735	2736	{}
2736	2737	};
2737	2738

drivers/cpufreq/longhaul.c+1−1

@@ -910,7 +910,7 @@ static struct cpufreq_driver longhaul_driver = { · 909 unmodified lines
910	910	};
911	911
912	912	static const struct x86_cpu_id longhaul_id[] = {
913		− { X86_VENDOR_CENTAUR, 6 },
	913	+ X86_MATCH_VENDOR_FAM(CENTAUR, 6, NULL),
914	914	{}
915	915	};
916	916	MODULE_DEVICE_TABLE(x86cpu, longhaul_id);

drivers/cpufreq/longrun.c+1−2

@@ -281,8 +281,7 @@ static struct cpufreq_driver longrun_driver = { · 280 unmodified lines
281	281	};
282	282
283	283	static const struct x86_cpu_id longrun_ids[] = {
284		− { X86_VENDOR_TRANSMETA, X86_FAMILY_ANY, X86_MODEL_ANY,
285		− X86_FEATURE_LONGRUN },
	284	+ X86_MATCH_VENDOR_FEATURE(TRANSMETA, X86_FEATURE_LONGRUN, NULL),
286	285	{}
287	286	};
288	287	MODULE_DEVICE_TABLE(x86cpu, longrun_ids);

drivers/cpufreq/p4-clockmod.c+1−1

@@ -231,7 +231,7 @@ static struct cpufreq_driver p4clockmod_driver = { · 230 unmodified lines
231	231	};
232	232
233	233	static const struct x86_cpu_id cpufreq_p4_id[] = {
234		− { X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, X86_FEATURE_ACC },
	234	+ X86_MATCH_VENDOR_FEATURE(INTEL, X86_FEATURE_ACC, NULL),
235	235	{}
236	236	};
237	237

drivers/cpufreq/powernow-k6.c+2−2

@@ -258,8 +258,8 @@ static struct cpufreq_driver powernow_k6_driver = { · 257 unmodified lines
258	258	};
259	259
260	260	static const struct x86_cpu_id powernow_k6_ids[] = {
261		− { X86_VENDOR_AMD, 5, 12 },
262		− { X86_VENDOR_AMD, 5, 13 },
	261	+ X86_MATCH_VENDOR_FAM_MODEL(AMD, 5, 12, NULL),
	262	+ X86_MATCH_VENDOR_FAM_MODEL(AMD, 5, 13, NULL),
263	263	{}
264	264	};
265	265	MODULE_DEVICE_TABLE(x86cpu, powernow_k6_ids);

drivers/cpufreq/powernow-k7.c+1−1

@@ -109,7 +109,7 @@ static int check_fsb(unsigned int fsbspeed) · 108 unmodified lines
109	109	}
110	110
111	111	static const struct x86_cpu_id powernow_k7_cpuids[] = {
112		− { X86_VENDOR_AMD, 6, },
	112	+ X86_MATCH_VENDOR_FAM(AMD, 6, NULL),
113	113	{}
114	114	};
115	115	MODULE_DEVICE_TABLE(x86cpu, powernow_k7_cpuids);

drivers/cpufreq/powernow-k8.c+1−1

@@ -452,7 +452,7 @@ static int core_voltage_post_transition(struct powernow_k8_data *data, · 451 unmodified lines
452	452
453	453	static const struct x86_cpu_id powernow_k8_ids[] = {
454	454	/* IO based frequency switching */
455		− { X86_VENDOR_AMD, 0xf },
	455	+ X86_MATCH_VENDOR_FAM(AMD, 0xf, NULL),
456	456	{}
457	457	};
458	458	MODULE_DEVICE_TABLE(x86cpu, powernow_k8_ids);

drivers/cpufreq/sc520_freq.c+1−1

@@ -95,7 +95,7 @@ static struct cpufreq_driver sc520_freq_driver = { · 94 unmodified lines
95	95	};
96	96
97	97	static const struct x86_cpu_id sc520_ids[] = {
98		− { X86_VENDOR_AMD, 4, 9 },
	98	+ X86_MATCH_VENDOR_FAM_MODEL(AMD, 4, 9, NULL),
99	99	{}
100	100	};
101	101	MODULE_DEVICE_TABLE(x86cpu, sc520_ids);

drivers/cpufreq/speedstep-centrino.c+4−10

@@ -520,18 +520,12 @@ static struct cpufreq_driver centrino_driver = { · 519 unmodified lines
520	520	* or ASCII model IDs.
521	521	*/
522	522	static const struct x86_cpu_id centrino_ids[] = {
523		− { X86_VENDOR_INTEL, 6, 9, X86_FEATURE_EST },
524		− { X86_VENDOR_INTEL, 6, 13, X86_FEATURE_EST },
525		− { X86_VENDOR_INTEL, 6, 13, X86_FEATURE_EST },
526		− { X86_VENDOR_INTEL, 6, 13, X86_FEATURE_EST },
527		− { X86_VENDOR_INTEL, 15, 3, X86_FEATURE_EST },
528		− { X86_VENDOR_INTEL, 15, 4, X86_FEATURE_EST },
	523	+ X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, 9, X86_FEATURE_EST, NULL),
	524	+ X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, 13, X86_FEATURE_EST, NULL),
	525	+ X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 15, 3, X86_FEATURE_EST, NULL),
	526	+ X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 15, 4, X86_FEATURE_EST, NULL),
529	527	{}
530	528	};
531		−#if 0
532		−/* Autoload or not? Do not for now. */
533		−MODULE_DEVICE_TABLE(x86cpu, centrino_ids);
534		−#endif
535	529
536	530	/**
537	531	* centrino_init - initializes the Enhanced SpeedStep CPUFreq driver

drivers/cpufreq/speedstep-ich.c+3−7

@@ -319,15 +319,11 @@ static struct cpufreq_driver speedstep_driver = { · 318 unmodified lines
319	319	};
320	320
321	321	static const struct x86_cpu_id ss_smi_ids[] = {
322		− { X86_VENDOR_INTEL, 6, 0xb, },
323		− { X86_VENDOR_INTEL, 6, 0x8, },
324		− { X86_VENDOR_INTEL, 15, 2 },
	322	+ X86_MATCH_VENDOR_FAM_MODEL(INTEL, 6, 0x8, 0),
	323	+ X86_MATCH_VENDOR_FAM_MODEL(INTEL, 6, 0xb, 0),
	324	+ X86_MATCH_VENDOR_FAM_MODEL(INTEL, 15, 0x2, 0),
325	325	{}
326	326	};
327		−#if 0
328		−/* Autoload or not? Do not for now. */
329		−MODULE_DEVICE_TABLE(x86cpu, ss_smi_ids);
330		−#endif
331	327
332	328	/**
333	329	* speedstep_init - initializes the SpeedStep CPUFreq driver

drivers/cpufreq/speedstep-smi.c+3−7

@@ -299,15 +299,11 @@ static struct cpufreq_driver speedstep_driver = { · 298 unmodified lines
299	299	};
300	300
301	301	static const struct x86_cpu_id ss_smi_ids[] = {
302		− { X86_VENDOR_INTEL, 6, 0xb, },
303		− { X86_VENDOR_INTEL, 6, 0x8, },
304		− { X86_VENDOR_INTEL, 15, 2 },
	302	+ X86_MATCH_VENDOR_FAM_MODEL(INTEL, 6, 0x8, 0),
	303	+ X86_MATCH_VENDOR_FAM_MODEL(INTEL, 6, 0xb, 0),
	304	+ X86_MATCH_VENDOR_FAM_MODEL(INTEL, 15, 0x2, 0),
305	305	{}
306	306	};
307		−#if 0
308		−/* Not auto loaded currently */
309		−MODULE_DEVICE_TABLE(x86cpu, ss_smi_ids);
310		−#endif
311	307
312	308	/**
313	309	* speedstep_init - initializes the SpeedStep CPUFreq driver

drivers/crypto/padlock-aes.c+1−1

@@ -474,7 +474,7 @@ static struct skcipher_alg cbc_aes_alg = { · 473 unmodified lines
474	474	};
475	475
476	476	static const struct x86_cpu_id padlock_cpu_id[] = {
477		− X86_FEATURE_MATCH(X86_FEATURE_XCRYPT),
	477	+ X86_MATCH_FEATURE(X86_FEATURE_XCRYPT, NULL),
478	478	{}
479	479	};
480	480	MODULE_DEVICE_TABLE(x86cpu, padlock_cpu_id);

drivers/crypto/padlock-sha.c+1−1

@@ -490,7 +490,7 @@ static struct shash_alg sha256_alg_nano = { · 489 unmodified lines
490	490	};
491	491
492	492	static const struct x86_cpu_id padlock_sha_ids[] = {
493		− X86_FEATURE_MATCH(X86_FEATURE_PHE),
	493	+ X86_MATCH_FEATURE(X86_FEATURE_PHE, NULL),
494	494	{}
495	495	};
496	496	MODULE_DEVICE_TABLE(x86cpu, padlock_sha_ids);

drivers/edac/amd64_edac.c+7−7

@@ -3626,13 +3626,13 @@ static void setup_pci_device(void) · 3625 unmodified lines
3626	3626	}
3627	3627
3628	3628	static const struct x86_cpu_id amd64_cpuids[] = {
3629		− { X86_VENDOR_AMD, 0xF, X86_MODEL_ANY, X86_FEATURE_ANY, 0 },
3630		− { X86_VENDOR_AMD, 0x10, X86_MODEL_ANY, X86_FEATURE_ANY, 0 },
3631		− { X86_VENDOR_AMD, 0x15, X86_MODEL_ANY, X86_FEATURE_ANY, 0 },
3632		− { X86_VENDOR_AMD, 0x16, X86_MODEL_ANY, X86_FEATURE_ANY, 0 },
3633		− { X86_VENDOR_AMD, 0x17, X86_MODEL_ANY, X86_FEATURE_ANY, 0 },
3634		− { X86_VENDOR_HYGON, 0x18, X86_MODEL_ANY, X86_FEATURE_ANY, 0 },
3635		− { X86_VENDOR_AMD, 0x19, X86_MODEL_ANY, X86_FEATURE_ANY, 0 },
	3629	+ X86_MATCH_VENDOR_FAM(AMD, 0x0F, NULL),
	3630	+ X86_MATCH_VENDOR_FAM(AMD, 0x10, NULL),
	3631	+ X86_MATCH_VENDOR_FAM(AMD, 0x15, NULL),
	3632	+ X86_MATCH_VENDOR_FAM(AMD, 0x16, NULL),
	3633	+ X86_MATCH_VENDOR_FAM(AMD, 0x17, NULL),
	3634	+ X86_MATCH_VENDOR_FAM(HYGON, 0x18, NULL),
	3635	+ X86_MATCH_VENDOR_FAM(AMD, 0x19, NULL),
3636	3636	{ }
3637	3637	};
3638	3638	MODULE_DEVICE_TABLE(x86cpu, amd64_cpuids);

drivers/edac/i10nm_base.c+4−4

@@ -123,10 +123,10 @@ static int i10nm_get_all_munits(void) · 122 unmodified lines
123	123	}
124	124
125	125	static const struct x86_cpu_id i10nm_cpuids[] = {
126		− { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_TREMONT_D, 0, 0 },
127		− { X86_VENDOR_INTEL, 6, INTEL_FAM6_ICELAKE_X, 0, 0 },
128		− { X86_VENDOR_INTEL, 6, INTEL_FAM6_ICELAKE_D, 0, 0 },
129		− { }
	126	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, NULL),
	127	+ X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, NULL),
	128	+ X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, NULL),
	129	+ {}
130	130	};
131	131	MODULE_DEVICE_TABLE(x86cpu, i10nm_cpuids);
132	132

drivers/edac/pnd2_edac.c+2−2

@@ -1537,8 +1537,8 @@ static struct dunit_ops dnv_ops = { · 1536 unmodified lines
1537	1537	};
1538	1538
1539	1539	static const struct x86_cpu_id pnd2_cpuids[] = {
1540		− { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_GOLDMONT, 0, (kernel_ulong_t)&apl_ops },
1541		− { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_GOLDMONT_D, 0, (kernel_ulong_t)&dnv_ops },
	1540	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, &apl_ops),
	1541	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_D, &dnv_ops),
1542	1542	{ }
1543	1543	};
1544	1544	MODULE_DEVICE_TABLE(x86cpu, pnd2_cpuids);

drivers/edac/sb_edac.c+7−7

@@ -3420,13 +3420,13 @@ fail0: · 3419 unmodified lines
3420	3420	}
3421	3421
3422	3422	static const struct x86_cpu_id sbridge_cpuids[] = {
3423		− INTEL_CPU_FAM6(SANDYBRIDGE_X, pci_dev_descr_sbridge_table),
3424		− INTEL_CPU_FAM6(IVYBRIDGE_X, pci_dev_descr_ibridge_table),
3425		− INTEL_CPU_FAM6(HASWELL_X, pci_dev_descr_haswell_table),
3426		− INTEL_CPU_FAM6(BROADWELL_X, pci_dev_descr_broadwell_table),
3427		− INTEL_CPU_FAM6(BROADWELL_D, pci_dev_descr_broadwell_table),
3428		− INTEL_CPU_FAM6(XEON_PHI_KNL, pci_dev_descr_knl_table),
3429		− INTEL_CPU_FAM6(XEON_PHI_KNM, pci_dev_descr_knl_table),
	3423	+ X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X, &pci_dev_descr_sbridge_table),
	3424	+ X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X, &pci_dev_descr_ibridge_table),
	3425	+ X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X, &pci_dev_descr_haswell_table),
	3426	+ X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, &pci_dev_descr_broadwell_table),
	3427	+ X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D, &pci_dev_descr_broadwell_table),
	3428	+ X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &pci_dev_descr_knl_table),
	3429	+ X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &pci_dev_descr_knl_table),
3430	3430	{ }
3431	3431	};
3432	3432	MODULE_DEVICE_TABLE(x86cpu, sbridge_cpuids);

drivers/edac/skx_base.c+1−1

@@ -158,7 +158,7 @@ fail: · 157 unmodified lines
158	158	}
159	159
160	160	static const struct x86_cpu_id skx_cpuids[] = {
161		− { X86_VENDOR_INTEL, 6, INTEL_FAM6_SKYLAKE_X, 0, 0 },
	161	+ X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, NULL),
162	162	{ }
163	163	};
164	164	MODULE_DEVICE_TABLE(x86cpu, skx_cpuids);

drivers/extcon/extcon-axp288.c+1−1

@@ -107,7 +107,7 @@ struct axp288_extcon_info { · 106 unmodified lines
107	107	};
108	108
109	109	static const struct x86_cpu_id cherry_trail_cpu_ids[] = {
110		− { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_AIRMONT, X86_FEATURE_ANY },
	110	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT, NULL),
111	111	{}
112	112	};
113	113

drivers/hwmon/coretemp.c+1−1

@@ -709,7 +709,7 @@ static int coretemp_cpu_offline(unsigned int cpu) · 708 unmodified lines
709	709	return 0;
710	710	}
711	711	static const struct x86_cpu_id __initconst coretemp_ids[] = {
712		− { X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, X86_FEATURE_DTHERM },
	712	+ X86_MATCH_VENDOR_FEATURE(INTEL, X86_FEATURE_DTHERM, NULL),
713	713	{}
714	714	};
715	715	MODULE_DEVICE_TABLE(x86cpu, coretemp_ids);

drivers/hwmon/via-cputemp.c+4−4

@@ -270,10 +270,10 @@ static int via_cputemp_down_prep(unsigned int cpu) · 269 unmodified lines
270	270	}
271	271
272	272	static const struct x86_cpu_id __initconst cputemp_ids[] = {
273		− { X86_VENDOR_CENTAUR, 6, 0xa, }, /* C7 A */
274		− { X86_VENDOR_CENTAUR, 6, 0xd, }, /* C7 D */
275		− { X86_VENDOR_CENTAUR, 6, 0xf, }, /* Nano */
276		− { X86_VENDOR_CENTAUR, 7, X86_MODEL_ANY, },
	273	+ X86_MATCH_VENDOR_FAM_MODEL(CENTAUR, 6, X86_CENTAUR_FAM6_C7_A, NULL),
	274	+ X86_MATCH_VENDOR_FAM_MODEL(CENTAUR, 6, X86_CENTAUR_FAM6_C7_D, NULL),
	275	+ X86_MATCH_VENDOR_FAM_MODEL(CENTAUR, 6, X86_CENTAUR_FAM6_NANO, NULL),
	276	+ X86_MATCH_VENDOR_FAM_MODEL(CENTAUR, 7, X86_MODEL_ANY, NULL),
277	277	{}
278	278	};
279	279	MODULE_DEVICE_TABLE(x86cpu, cputemp_ids);

drivers/idle/intel_idle.c+38−41

@@ -1068,51 +1068,48 @@ static const struct idle_cpu idle_cpu_dnv = { · 1067 unmodified lines
1068	1068	};
1069	1069
1070	1070	static const struct x86_cpu_id intel_idle_ids[] __initconst = {
1071		− INTEL_CPU_FAM6(NEHALEM_EP, idle_cpu_nhx),
1072		− INTEL_CPU_FAM6(NEHALEM, idle_cpu_nehalem),
1073		− INTEL_CPU_FAM6(NEHALEM_G, idle_cpu_nehalem),
1074		− INTEL_CPU_FAM6(WESTMERE, idle_cpu_nehalem),
1075		− INTEL_CPU_FAM6(WESTMERE_EP, idle_cpu_nhx),
1076		− INTEL_CPU_FAM6(NEHALEM_EX, idle_cpu_nhx),
1077		− INTEL_CPU_FAM6(ATOM_BONNELL, idle_cpu_atom),
1078		− INTEL_CPU_FAM6(ATOM_BONNELL_MID, idle_cpu_lincroft),
1079		− INTEL_CPU_FAM6(WESTMERE_EX, idle_cpu_nhx),
1080		− INTEL_CPU_FAM6(SANDYBRIDGE, idle_cpu_snb),
1081		− INTEL_CPU_FAM6(SANDYBRIDGE_X, idle_cpu_snx),
1082		− INTEL_CPU_FAM6(ATOM_SALTWELL, idle_cpu_atom),
1083		− INTEL_CPU_FAM6(ATOM_SILVERMONT, idle_cpu_byt),
1084		− INTEL_CPU_FAM6(ATOM_SILVERMONT_MID, idle_cpu_tangier),
1085		− INTEL_CPU_FAM6(ATOM_AIRMONT, idle_cpu_cht),
1086		− INTEL_CPU_FAM6(IVYBRIDGE, idle_cpu_ivb),
1087		− INTEL_CPU_FAM6(IVYBRIDGE_X, idle_cpu_ivt),
1088		− INTEL_CPU_FAM6(HASWELL, idle_cpu_hsw),
1089		− INTEL_CPU_FAM6(HASWELL_X, idle_cpu_hsx),
1090		− INTEL_CPU_FAM6(HASWELL_L, idle_cpu_hsw),
1091		− INTEL_CPU_FAM6(HASWELL_G, idle_cpu_hsw),
1092		− INTEL_CPU_FAM6(ATOM_SILVERMONT_D, idle_cpu_avn),
1093		− INTEL_CPU_FAM6(BROADWELL, idle_cpu_bdw),
1094		− INTEL_CPU_FAM6(BROADWELL_G, idle_cpu_bdw),
1095		− INTEL_CPU_FAM6(BROADWELL_X, idle_cpu_bdx),
1096		− INTEL_CPU_FAM6(BROADWELL_D, idle_cpu_bdx),
1097		− INTEL_CPU_FAM6(SKYLAKE_L, idle_cpu_skl),
1098		− INTEL_CPU_FAM6(SKYLAKE, idle_cpu_skl),
1099		− INTEL_CPU_FAM6(KABYLAKE_L, idle_cpu_skl),
1100		− INTEL_CPU_FAM6(KABYLAKE, idle_cpu_skl),
1101		− INTEL_CPU_FAM6(SKYLAKE_X, idle_cpu_skx),
1102		− INTEL_CPU_FAM6(XEON_PHI_KNL, idle_cpu_knl),
1103		− INTEL_CPU_FAM6(XEON_PHI_KNM, idle_cpu_knl),
1104		− INTEL_CPU_FAM6(ATOM_GOLDMONT, idle_cpu_bxt),
1105		− INTEL_CPU_FAM6(ATOM_GOLDMONT_PLUS, idle_cpu_bxt),
1106		− INTEL_CPU_FAM6(ATOM_GOLDMONT_D, idle_cpu_dnv),
1107		− INTEL_CPU_FAM6(ATOM_TREMONT_D, idle_cpu_dnv),
	1071	+ X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EP, &idle_cpu_nhx),
	1072	+ X86_MATCH_INTEL_FAM6_MODEL(NEHALEM, &idle_cpu_nehalem),
	1073	+ X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_G, &idle_cpu_nehalem),
	1074	+ X86_MATCH_INTEL_FAM6_MODEL(WESTMERE, &idle_cpu_nehalem),
	1075	+ X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EP, &idle_cpu_nhx),
	1076	+ X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EX, &idle_cpu_nhx),
	1077	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_BONNELL, &idle_cpu_atom),
	1078	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_BONNELL_MID, &idle_cpu_lincroft),
	1079	+ X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EX, &idle_cpu_nhx),
	1080	+ X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE, &idle_cpu_snb),
	1081	+ X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X, &idle_cpu_snx),
	1082	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL, &idle_cpu_atom),
	1083	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, &idle_cpu_byt),
	1084	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, &idle_cpu_tangier),
	1085	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT, &idle_cpu_cht),
	1086	+ X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE, &idle_cpu_ivb),
	1087	+ X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X, &idle_cpu_ivt),
	1088	+ X86_MATCH_INTEL_FAM6_MODEL(HASWELL, &idle_cpu_hsw),
	1089	+ X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X, &idle_cpu_hsx),
	1090	+ X86_MATCH_INTEL_FAM6_MODEL(HASWELL_L, &idle_cpu_hsw),
	1091	+ X86_MATCH_INTEL_FAM6_MODEL(HASWELL_G, &idle_cpu_hsw),
	1092	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_D, &idle_cpu_avn),
	1093	+ X86_MATCH_INTEL_FAM6_MODEL(BROADWELL, &idle_cpu_bdw),
	1094	+ X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G, &idle_cpu_bdw),
	1095	+ X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, &idle_cpu_bdx),
	1096	+ X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D, &idle_cpu_bdx),
	1097	+ X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, &idle_cpu_skl),
	1098	+ X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, &idle_cpu_skl),
	1099	+ X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, &idle_cpu_skl),
	1100	+ X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, &idle_cpu_skl),
	1101	+ X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, &idle_cpu_skx),
	1102	+ X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &idle_cpu_knl),
	1103	+ X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &idle_cpu_knl),
	1104	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, &idle_cpu_bxt),
	1105	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &idle_cpu_bxt),
	1106	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_D, &idle_cpu_dnv),
	1107	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &idle_cpu_dnv),
1108	1108	{}
1109	1109	};
1110	1110
1111		−#define INTEL_CPU_FAM6_MWAIT \
1112		− { X86_VENDOR_INTEL, 6, X86_MODEL_ANY, X86_FEATURE_MWAIT, 0 }
1113		−
1114	1111	static const struct x86_cpu_id intel_mwait_ids[] __initconst = {
1115		− INTEL_CPU_FAM6_MWAIT,
	1112	+ X86_MATCH_VENDOR_FAM_FEATURE(INTEL, 6, X86_FEATURE_MWAIT, NULL),
1116	1113	{}
1117	1114	};
1118	1115

drivers/mmc/host/sdhci-acpi.c+2−2

@@ -234,7 +234,7 @@ static const struct sdhci_acpi_chip sdhci_acpi_chip_int = { · 233 unmodified lines
234	234	static bool sdhci_acpi_byt(void)
235	235	{
236	236	static const struct x86_cpu_id byt[] = {
237		− { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT },
	237	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, NULL),
238	238	{}
239	239	};
240	240
@@ -244,7 +244,7 @@ static bool sdhci_acpi_byt(void) · 3 unmodified lines
244	244	static bool sdhci_acpi_cht(void)
245	245	{
246	246	static const struct x86_cpu_id cht[] = {
247		− { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_AIRMONT },
	247	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT, NULL),
248	248	{}
249	249	};
250	250

drivers/pci/pci-mid.c+2−4

@@ -55,15 +55,13 @@ static const struct pci_platform_pm_ops mid_pci_platform_pm = { · 54 unmodified lines
55	55	.need_resume = mid_pci_need_resume,
56	56	};
57	57
58		−#define ICPU(model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
59		−
60	58	/*
61	59	* This table should be in sync with the one in
62	60	* arch/x86/platform/intel-mid/pwr.c.
63	61	*/
64	62	static const struct x86_cpu_id lpss_cpu_ids[] = {
65		− ICPU(INTEL_FAM6_ATOM_SALTWELL_MID),
66		− ICPU(INTEL_FAM6_ATOM_SILVERMONT_MID),
	63	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL_MID, NULL),
	64	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, NULL),
67	65	{}
68	66	};
69	67

drivers/platform/x86/intel-uncore-frequency.c+6−8

@@ -358,15 +358,13 @@ static struct notifier_block uncore_pm_nb = { · 357 unmodified lines
358	358	.notifier_call = uncore_pm_notify,
359	359	};
360	360
361		−#define ICPU(model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
362		−
363	361	static const struct x86_cpu_id intel_uncore_cpu_ids[] = {
364		− ICPU(INTEL_FAM6_BROADWELL_G),
365		− ICPU(INTEL_FAM6_BROADWELL_X),
366		− ICPU(INTEL_FAM6_BROADWELL_D),
367		− ICPU(INTEL_FAM6_SKYLAKE_X),
368		− ICPU(INTEL_FAM6_ICELAKE_X),
369		− ICPU(INTEL_FAM6_ICELAKE_D),
	362	+ X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G, NULL),
	363	+ X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, NULL),
	364	+ X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D, NULL),
	365	+ X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, NULL),
	366	+ X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, NULL),
	367	+ X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, NULL),
370	368	{}
371	369	};
372	370

drivers/platform/x86/intel_int0002_vgpio.c+2−2

@@ -148,8 +148,8 @@ static struct irq_chip int0002_cht_irqchip = { · 147 unmodified lines
148	148	};
149	149
150	150	static const struct x86_cpu_id int0002_cpu_ids[] = {
151		− INTEL_CPU_FAM6(ATOM_SILVERMONT, int0002_byt_irqchip), /* Valleyview, Bay Trail */
152		− INTEL_CPU_FAM6(ATOM_AIRMONT, int0002_cht_irqchip), /* Braswell, Cherry Trail */
	151	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, &int0002_byt_irqchip),
	152	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT, &int0002_cht_irqchip),
153	153	{}
154	154	};
155	155

drivers/platform/x86/intel_mid_powerbtn.c+2−2

@@ -113,8 +113,8 @@ static const struct mid_pb_ddata mrfld_ddata = { · 112 unmodified lines
113	113	};
114	114
115	115	static const struct x86_cpu_id mid_pb_cpu_ids[] = {
116		− INTEL_CPU_FAM6(ATOM_SALTWELL_MID, mfld_ddata),
117		− INTEL_CPU_FAM6(ATOM_SILVERMONT_MID, mrfld_ddata),
	116	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL_MID, &mfld_ddata),
	117	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, &mrfld_ddata),
118	118	{}
119	119	};
120	120

drivers/platform/x86/intel_pmc_core.c+12−12

@@ -871,18 +871,18 @@ static inline void pmc_core_dbgfs_unregister(struct pmc_dev *pmcdev) · 870 unmodified lines
871	871	#endif /* CONFIG_DEBUG_FS */
872	872
873	873	static const struct x86_cpu_id intel_pmc_core_ids[] = {
874		− INTEL_CPU_FAM6(SKYLAKE_L, spt_reg_map),
875		− INTEL_CPU_FAM6(SKYLAKE, spt_reg_map),
876		− INTEL_CPU_FAM6(KABYLAKE_L, spt_reg_map),
877		− INTEL_CPU_FAM6(KABYLAKE, spt_reg_map),
878		− INTEL_CPU_FAM6(CANNONLAKE_L, cnp_reg_map),
879		− INTEL_CPU_FAM6(ICELAKE_L, icl_reg_map),
880		− INTEL_CPU_FAM6(ICELAKE_NNPI, icl_reg_map),
881		− INTEL_CPU_FAM6(COMETLAKE, cnp_reg_map),
882		− INTEL_CPU_FAM6(COMETLAKE_L, cnp_reg_map),
883		− INTEL_CPU_FAM6(TIGERLAKE_L, tgl_reg_map),
884		− INTEL_CPU_FAM6(TIGERLAKE, tgl_reg_map),
885		− INTEL_CPU_FAM6(ATOM_TREMONT, tgl_reg_map),
	874	+ X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, &spt_reg_map),
	875	+ X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, &spt_reg_map),
	876	+ X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, &spt_reg_map),
	877	+ X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, &spt_reg_map),
	878	+ X86_MATCH_INTEL_FAM6_MODEL(CANNONLAKE_L, &cnp_reg_map),
	879	+ X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, &icl_reg_map),
	880	+ X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_NNPI, &icl_reg_map),
	881	+ X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, &cnp_reg_map),
	882	+ X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L, &cnp_reg_map),
	883	+ X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, &tgl_reg_map),
	884	+ X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, &tgl_reg_map),
	885	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT, &tgl_reg_map),
886	886	{}
887	887	};
888	888

drivers/platform/x86/intel_pmc_core_pltdrv.c+8−8

@@ -38,14 +38,14 @@ static struct platform_device pmc_core_device = { · 37 unmodified lines
38	38	* other list may grow, but this list should not.
39	39	*/
40	40	static const struct x86_cpu_id intel_pmc_core_platform_ids[] = {
41		− INTEL_CPU_FAM6(SKYLAKE_L, pmc_core_device),
42		− INTEL_CPU_FAM6(SKYLAKE, pmc_core_device),
43		− INTEL_CPU_FAM6(KABYLAKE_L, pmc_core_device),
44		− INTEL_CPU_FAM6(KABYLAKE, pmc_core_device),
45		− INTEL_CPU_FAM6(CANNONLAKE_L, pmc_core_device),
46		− INTEL_CPU_FAM6(ICELAKE_L, pmc_core_device),
47		− INTEL_CPU_FAM6(COMETLAKE, pmc_core_device),
48		− INTEL_CPU_FAM6(COMETLAKE_L, pmc_core_device),
	41	+ X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, &pmc_core_device),
	42	+ X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, &pmc_core_device),
	43	+ X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, &pmc_core_device),
	44	+ X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, &pmc_core_device),
	45	+ X86_MATCH_INTEL_FAM6_MODEL(CANNONLAKE_L, &pmc_core_device),
	46	+ X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, &pmc_core_device),
	47	+ X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, &pmc_core_device),
	48	+ X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L, &pmc_core_device),
49	49	{}
50	50	};
51	51	MODULE_DEVICE_TABLE(x86cpu, intel_pmc_core_platform_ids);

drivers/platform/x86/intel_speed_select_if/isst_if_mbox_msr.c+1−3

@@ -160,10 +160,8 @@ static struct notifier_block isst_pm_nb = { · 159 unmodified lines
160	160	.notifier_call = isst_pm_notify,
161	161	};
162	162
163		−#define ICPU(model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
164		−
165	163	static const struct x86_cpu_id isst_if_cpu_ids[] = {
166		− ICPU(INTEL_FAM6_SKYLAKE_X),
	164	+ X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, NULL),
167	165	{}
168	166	};
169	167	MODULE_DEVICE_TABLE(x86cpu, isst_if_cpu_ids);

drivers/platform/x86/intel_telemetry_debugfs.c+2−3

@@ -308,11 +308,10 @@ static struct telemetry_debugfs_conf telem_apl_debugfs_conf = { · 307 unmodified lines
308	308	};
309	309
310	310	static const struct x86_cpu_id telemetry_debugfs_cpu_ids[] = {
311		− INTEL_CPU_FAM6(ATOM_GOLDMONT, telem_apl_debugfs_conf),
312		− INTEL_CPU_FAM6(ATOM_GOLDMONT_PLUS, telem_apl_debugfs_conf),
	311	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, &telem_apl_debugfs_conf),
	312	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &telem_apl_debugfs_conf),
313	313	{}
314	314	};
315		−
316	315	MODULE_DEVICE_TABLE(x86cpu, telemetry_debugfs_cpu_ids);
317	316
318	317	static int telemetry_debugfs_check_evts(void)

drivers/platform/x86/intel_telemetry_pltdrv.c+2−5

@@ -67,9 +67,6 @@ · 66 unmodified lines
67	67	#define TELEM_CLEAR_VERBOSITY_BITS(x) ((x) &= ~(BIT(27) \| BIT(28)))
68	68	#define TELEM_SET_VERBOSITY_BITS(x, y) ((x) \|= ((y) << 27))
69	69
70		−#define TELEM_CPU(model, data) \
71		− { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, (unsigned long)&data }
72		−
73	70	enum telemetry_action {
74	71	TELEM_UPDATE = 0,
75	72	TELEM_ADD,
@@ -183,8 +180,8 @@ static struct telemetry_plt_config telem_glk_config = { · 107 unmodified lines
183	180	};
184	181
185	182	static const struct x86_cpu_id telemetry_cpu_ids[] = {
186		− TELEM_CPU(INTEL_FAM6_ATOM_GOLDMONT, telem_apl_config),
187		− TELEM_CPU(INTEL_FAM6_ATOM_GOLDMONT_PLUS, telem_glk_config),
	183	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, &telem_apl_config),
	184	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &telem_glk_config),
188	185	{}
189	186	};
190	187

drivers/platform/x86/intel_turbo_max_3.c+2−4

@@ -113,11 +113,9 @@ static int itmt_legacy_cpu_online(unsigned int cpu) · 112 unmodified lines
113	113	return 0;
114	114	}
115	115
116		−#define ICPU(model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
117		−
118	116	static const struct x86_cpu_id itmt_legacy_cpu_ids[] = {
119		− ICPU(INTEL_FAM6_BROADWELL_X),
120		− ICPU(INTEL_FAM6_SKYLAKE_X),
	117	+ X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, NULL),
	118	+ X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, NULL),
121	119	{}
122	120	};
123	121

drivers/powercap/intel_rapl_common.c+43−44

@@ -951,52 +951,51 @@ static const struct rapl_defaults rapl_defaults_cht = { · 950 unmodified lines
951	951	};
952	952
953	953	static const struct x86_cpu_id rapl_ids[] __initconst = {
954		− INTEL_CPU_FAM6(SANDYBRIDGE, rapl_defaults_core),
955		− INTEL_CPU_FAM6(SANDYBRIDGE_X, rapl_defaults_core),
956		−
957		− INTEL_CPU_FAM6(IVYBRIDGE, rapl_defaults_core),
958		− INTEL_CPU_FAM6(IVYBRIDGE_X, rapl_defaults_core),
959		−
960		− INTEL_CPU_FAM6(HASWELL, rapl_defaults_core),
961		− INTEL_CPU_FAM6(HASWELL_L, rapl_defaults_core),
962		− INTEL_CPU_FAM6(HASWELL_G, rapl_defaults_core),
963		− INTEL_CPU_FAM6(HASWELL_X, rapl_defaults_hsw_server),
964		−
965		− INTEL_CPU_FAM6(BROADWELL, rapl_defaults_core),
966		− INTEL_CPU_FAM6(BROADWELL_G, rapl_defaults_core),
967		− INTEL_CPU_FAM6(BROADWELL_D, rapl_defaults_core),
968		− INTEL_CPU_FAM6(BROADWELL_X, rapl_defaults_hsw_server),
969		−
970		− INTEL_CPU_FAM6(SKYLAKE, rapl_defaults_core),
971		− INTEL_CPU_FAM6(SKYLAKE_L, rapl_defaults_core),
972		− INTEL_CPU_FAM6(SKYLAKE_X, rapl_defaults_hsw_server),
973		− INTEL_CPU_FAM6(KABYLAKE_L, rapl_defaults_core),
974		− INTEL_CPU_FAM6(KABYLAKE, rapl_defaults_core),
975		− INTEL_CPU_FAM6(CANNONLAKE_L, rapl_defaults_core),
976		− INTEL_CPU_FAM6(ICELAKE_L, rapl_defaults_core),
977		− INTEL_CPU_FAM6(ICELAKE, rapl_defaults_core),
978		− INTEL_CPU_FAM6(ICELAKE_NNPI, rapl_defaults_core),
979		− INTEL_CPU_FAM6(ICELAKE_X, rapl_defaults_hsw_server),
980		− INTEL_CPU_FAM6(ICELAKE_D, rapl_defaults_hsw_server),
981		− INTEL_CPU_FAM6(COMETLAKE_L, rapl_defaults_core),
982		− INTEL_CPU_FAM6(COMETLAKE, rapl_defaults_core),
983		− INTEL_CPU_FAM6(TIGERLAKE_L, rapl_defaults_core),
984		−
985		− INTEL_CPU_FAM6(ATOM_SILVERMONT, rapl_defaults_byt),
986		− INTEL_CPU_FAM6(ATOM_AIRMONT, rapl_defaults_cht),
987		− INTEL_CPU_FAM6(ATOM_SILVERMONT_MID, rapl_defaults_tng),
988		− INTEL_CPU_FAM6(ATOM_AIRMONT_MID, rapl_defaults_ann),
989		− INTEL_CPU_FAM6(ATOM_GOLDMONT, rapl_defaults_core),
990		− INTEL_CPU_FAM6(ATOM_GOLDMONT_PLUS, rapl_defaults_core),
991		− INTEL_CPU_FAM6(ATOM_GOLDMONT_D, rapl_defaults_core),
992		− INTEL_CPU_FAM6(ATOM_TREMONT_D, rapl_defaults_core),
993		− INTEL_CPU_FAM6(ATOM_TREMONT_L, rapl_defaults_core),
994		−
995		− INTEL_CPU_FAM6(XEON_PHI_KNL, rapl_defaults_hsw_server),
996		− INTEL_CPU_FAM6(XEON_PHI_KNM, rapl_defaults_hsw_server),
	954	+ X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE, &rapl_defaults_core),
	955	+ X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X, &rapl_defaults_core),
	956	+
	957	+ X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE, &rapl_defaults_core),
	958	+ X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X, &rapl_defaults_core),
	959	+
	960	+ X86_MATCH_INTEL_FAM6_MODEL(HASWELL, &rapl_defaults_core),
	961	+ X86_MATCH_INTEL_FAM6_MODEL(HASWELL_L, &rapl_defaults_core),
	962	+ X86_MATCH_INTEL_FAM6_MODEL(HASWELL_G, &rapl_defaults_core),
	963	+ X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X, &rapl_defaults_hsw_server),
	964	+
	965	+ X86_MATCH_INTEL_FAM6_MODEL(BROADWELL, &rapl_defaults_core),
	966	+ X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G, &rapl_defaults_core),
	967	+ X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D, &rapl_defaults_core),
	968	+ X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, &rapl_defaults_hsw_server),
	969	+
	970	+ X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, &rapl_defaults_core),
	971	+ X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, &rapl_defaults_core),
	972	+ X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, &rapl_defaults_hsw_server),
	973	+ X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, &rapl_defaults_core),
	974	+ X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, &rapl_defaults_core),
	975	+ X86_MATCH_INTEL_FAM6_MODEL(CANNONLAKE_L, &rapl_defaults_core),
	976	+ X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, &rapl_defaults_core),
	977	+ X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, &rapl_defaults_core),
	978	+ X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_NNPI, &rapl_defaults_core),
	979	+ X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, &rapl_defaults_hsw_server),
	980	+ X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, &rapl_defaults_hsw_server),
	981	+ X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L, &rapl_defaults_core),
	982	+ X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, &rapl_defaults_core),
	983	+ X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, &rapl_defaults_core),
	984	+
	985	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, &rapl_defaults_byt),
	986	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT, &rapl_defaults_cht),
	987	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, &rapl_defaults_tng),
	988	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT_MID, &rapl_defaults_ann),
	989	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, &rapl_defaults_core),
	990	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &rapl_defaults_core),
	991	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_D, &rapl_defaults_core),
	992	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &rapl_defaults_core),
	993	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L, &rapl_defaults_core),
	994	+
	995	+ X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &rapl_defaults_hsw_server),
	996	+ X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &rapl_defaults_hsw_server),
997	997	{}
998	998	};
999		−
1000	999	MODULE_DEVICE_TABLE(x86cpu, rapl_ids);
1001	1000
1002	1001	/* Read once for all raw primitive data for domains */

drivers/thermal/intel/intel_powerclamp.c+1−1

@@ -651,7 +651,7 @@ static struct thermal_cooling_device_ops powerclamp_cooling_ops = { · 650 unmodified lines
651	651	};
652	652
653	653	static const struct x86_cpu_id __initconst intel_powerclamp_ids[] = {
654		− { X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, X86_FEATURE_MWAIT },
	654	+ X86_MATCH_VENDOR_FEATURE(INTEL, X86_FEATURE_MWAIT, NULL),
655	655	{}
656	656	};
657	657	MODULE_DEVICE_TABLE(x86cpu, intel_powerclamp_ids);

drivers/thermal/intel/intel_quark_dts_thermal.c+1−4

@@ -64,9 +64,6 @@ · 63 unmodified lines
64	64	#include <asm/cpu_device_id.h>
65	65	#include <asm/iosf_mbi.h>
66	66
67		−#define X86_FAMILY_QUARK 0x5
68		−#define X86_MODEL_QUARK_X1000 0x9
69		−
70	67	/* DTS reset is programmed via QRK_MBI_UNIT_SOC */
71	68	#define QRK_DTS_REG_OFFSET_RESET 0x34
72	69	#define QRK_DTS_RESET_BIT BIT(0)
@@ -433,7 +430,7 @@ err_ret: · 360 unmodified lines
433	430	}
434	431
435	432	static const struct x86_cpu_id qrk_thermal_ids[] __initconst = {
436		− { X86_VENDOR_INTEL, X86_FAMILY_QUARK, X86_MODEL_QUARK_X1000 },
	433	+ X86_MATCH_VENDOR_FAM_MODEL(INTEL, 5, INTEL_FAM5_QUARK_X1000, NULL),
437	434	{}
438	435	};
439	436	MODULE_DEVICE_TABLE(x86cpu, qrk_thermal_ids);

drivers/thermal/intel/intel_soc_dts_thermal.c+1−2

@@ -36,8 +36,7 @@ static irqreturn_t soc_irq_thread_fn(int irq, void *dev_data) · 35 unmodified lines
36	36	}
37	37
38	38	static const struct x86_cpu_id soc_thermal_ids[] = {
39		− { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT, 0,
40		− BYT_SOC_DTS_APIC_IRQ},
	39	+ X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, BYT_SOC_DTS_APIC_IRQ),
41	40	{}
42	41	};
43	42	MODULE_DEVICE_TABLE(x86cpu, soc_thermal_ids);

drivers/thermal/intel/x86_pkg_temp_thermal.c+1−1

@@ -478,7 +478,7 @@ static int pkg_thermal_cpu_online(unsigned int cpu) · 477 unmodified lines
478	478	}
479	479
480	480	static const struct x86_cpu_id __initconst pkg_temp_thermal_ids[] = {
481		− { X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, X86_FEATURE_PTS },
	481	+ X86_MATCH_VENDOR_FEATURE(INTEL, X86_FEATURE_PTS, NULL),
482	482	{}
483	483	};
484	484	MODULE_DEVICE_TABLE(x86cpu, pkg_temp_thermal_ids);

include/linux/mod_devicetable.h+1−3

@@ -667,9 +667,7 @@ struct x86_cpu_id { · 666 unmodified lines
667	667	kernel_ulong_t driver_data;
668	668	};
669	669
670		−#define X86_FEATURE_MATCH(x) \
671		− { X86_VENDOR_ANY, X86_FAMILY_ANY, X86_MODEL_ANY, x }
672		−
	670	+/* Wild cards for x86_cpu_id::vendor, family, model and feature */
673	671	#define X86_VENDOR_ANY 0xffff
674	672	#define X86_FAMILY_ANY 0
675	673	#define X86_MODEL_ANY 0

sound/soc/intel/common/soc-intel-quirks.h+6−8

@@ -15,13 +15,11 @@ · 14 unmodified lines
15	15	#include <asm/intel-family.h>
16	16	#include <asm/iosf_mbi.h>
17	17
18		−#define ICPU(model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
19		−
20	18	#define SOC_INTEL_IS_CPU(soc, type) \
21	19	static inline bool soc_intel_is_##soc(void) \
22	20	{ \
23	21	static const struct x86_cpu_id soc##_cpu_ids[] = { \
24		− ICPU(type), \
	22	+ X86_MATCH_INTEL_FAM6_MODEL(type, NULL), \
25	23	{} \
26	24	}; \
27	25	const struct x86_cpu_id *id; \
@@ -32,11 +30,11 @@ static inline bool soc_intel_is_##soc(void) \ · 4 unmodified lines
32	30	return false; \
33	31	}
34	32
35		−SOC_INTEL_IS_CPU(byt, INTEL_FAM6_ATOM_SILVERMONT);
36		−SOC_INTEL_IS_CPU(cht, INTEL_FAM6_ATOM_AIRMONT);
37		−SOC_INTEL_IS_CPU(apl, INTEL_FAM6_ATOM_GOLDMONT);
38		−SOC_INTEL_IS_CPU(glk, INTEL_FAM6_ATOM_GOLDMONT_PLUS);
39		−SOC_INTEL_IS_CPU(cml, INTEL_FAM6_KABYLAKE_L);
	33	+SOC_INTEL_IS_CPU(byt, ATOM_SILVERMONT);
	34	+SOC_INTEL_IS_CPU(cht, ATOM_AIRMONT);
	35	+SOC_INTEL_IS_CPU(apl, ATOM_GOLDMONT);
	36	+SOC_INTEL_IS_CPU(glk, ATOM_GOLDMONT_PLUS);
	37	+SOC_INTEL_IS_CPU(cml, KABYLAKE_L);
40	38
41	39	static inline bool soc_intel_is_byt_cr(struct platform_device *pdev)
42	40	{

Merge branch 'x86/cpu' into perf/core, to resolve conflict

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