Pull clk fixes from Michael Turquette: "Fix a bug in the at91 clk driver, two compile time warnings in sunxi clk drivers, and one bug in a sunxi clk driver introduced in the 4.7 merge window" * tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: clk: at91: fix clk_programmable_set_parent() clk: sunxi: remove unused variable clk: sunxi: display: Add per-clock flags clk: sunxi: tcon-ch1: Do not return a negative error in get_parent
Unified · Split
| @@ -99,7 +99,7 @@ static int clk_programmable_set_parent(struct clk_hw *hw, u8 index) · 98 unmodified lines | |||
| 99 | struct clk_programmable *prog = to_clk_programmable(hw); | 99 | struct clk_programmable *prog = to_clk_programmable(hw); |
| 100 | const struct clk_programmable_layout *layout = prog->layout; | 100 | const struct clk_programmable_layout *layout = prog->layout; |
| 101 | unsigned int mask = layout->css_mask; | 101 | unsigned int mask = layout->css_mask; |
| 102 | unsigned int pckr = 0; | 102 | unsigned int pckr = index; |
| 103 | 103 | ||
| 104 | if (layout->have_slck_mck) | 104 | if (layout->have_slck_mck) |
| 105 | mask |= AT91_PMC_CSSMCK_MCK; | 105 | mask |= AT91_PMC_CSSMCK_MCK; |
| @@ -33,6 +33,8 @@ struct sun4i_a10_display_clk_data { · 32 unmodified lines | |||
| 33 | 33 | ||
| 34 | u8 width_div; | 34 | u8 width_div; |
| 35 | u8 width_mux; | 35 | u8 width_mux; |
| 36 | |||
| 37 | u32 flags; | ||
| 36 | }; | 38 | }; |
| 37 | 39 | ||
| 38 | struct reset_data { | 40 | struct reset_data { |
| @@ -166,7 +168,7 @@ static void __init sun4i_a10_display_init(struct device_node *node, · 127 unmodified lines | |||
| 166 | data->has_div ? &div->hw : NULL, | 168 | data->has_div ? &div->hw : NULL, |
| 167 | data->has_div ? &clk_divider_ops : NULL, | 169 | data->has_div ? &clk_divider_ops : NULL, |
| 168 | &gate->hw, &clk_gate_ops, | 170 | &gate->hw, &clk_gate_ops, |
| 169 | 0); | 171 | data->flags); |
| 170 | if (IS_ERR(clk)) { | 172 | if (IS_ERR(clk)) { |
| 171 | pr_err("%s: Couldn't register the clock\n", clk_name); | 173 | pr_err("%s: Couldn't register the clock\n", clk_name); |
| 172 | goto free_div; | 174 | goto free_div; |
| @@ -232,6 +234,7 @@ static const struct sun4i_a10_display_clk_data sun4i_a10_tcon_ch0_data __initcon · 59 unmodified lines | |||
| 232 | .offset_rst = 29, | 234 | .offset_rst = 29, |
| 233 | .offset_mux = 24, | 235 | .offset_mux = 24, |
| 234 | .width_mux = 2, | 236 | .width_mux = 2, |
| 237 | .flags = CLK_SET_RATE_PARENT, | ||
| 235 | }; | 238 | }; |
| 236 | 239 | ||
| 237 | static void __init sun4i_a10_tcon_ch0_setup(struct device_node *node) | 240 | static void __init sun4i_a10_tcon_ch0_setup(struct device_node *node) |
| @@ -79,15 +79,11 @@ static int tcon_ch1_is_enabled(struct clk_hw *hw) · 78 unmodified lines | |||
| 79 | static u8 tcon_ch1_get_parent(struct clk_hw *hw) | 79 | static u8 tcon_ch1_get_parent(struct clk_hw *hw) |
| 80 | { | 80 | { |
| 81 | struct tcon_ch1_clk *tclk = hw_to_tclk(hw); | 81 | struct tcon_ch1_clk *tclk = hw_to_tclk(hw); |
| 82 | int num_parents = clk_hw_get_num_parents(hw); | ||
| 83 | u32 reg; | 82 | u32 reg; |
| 84 | 83 | ||
| 85 | reg = readl(tclk->reg) >> TCON_CH1_SCLK2_MUX_SHIFT; | 84 | reg = readl(tclk->reg) >> TCON_CH1_SCLK2_MUX_SHIFT; |
| 86 | reg &= reg >> TCON_CH1_SCLK2_MUX_MASK; | 85 | reg &= reg >> TCON_CH1_SCLK2_MUX_MASK; |
| 87 | 86 | ||
| 88 | if (reg >= num_parents) | ||
| 89 | return -EINVAL; | ||
| 90 | |||
| 91 | return reg; | 87 | return reg; |
| 92 | } | 88 | } |
| 93 | 89 | ||