Merge branch 'linus' into timers/core Reason: Get upstream fixes before adding conflicting code.

Thomas Gleixner committed 13 years ago

Commit 6402c7d2 parents 77c675b 60d509f1262 files · +13864 −7800Browse files

Unified · Split

1262 files

CREDITS +8 −0
Documentation/DocBook/device-drivers.tmpl +1 −1
Documentation/devicetree/bindings/mfd/ab8500.txt +1 −5
Documentation/devicetree/bindings/tty/serial/of-serial.txt +3 −0
Documentation/hwmon/lm75 +1 −1
Documentation/i2c/busses/i2c-diolan-u2c +1 −1
Documentation/kernel-parameters.txt +26 −3
Documentation/networking/ipvs-sysctl.txt +7 −0
Documentation/scsi/LICENSE.qla2xxx +1 −1
Documentation/sound/alsa/ALSA-Configuration.txt +3 −4
Documentation/sound/alsa/seq_oss.html +1 −1
MAINTAINERS +66 −34
Makefile +3 −2
arch/Kconfig +0 −7
arch/alpha/Kconfig +1 −1
arch/alpha/Makefile +1 −1
arch/alpha/include/asm/floppy.h +1 −1
arch/alpha/kernel/irq.c +0 −7
arch/alpha/kernel/irq_alpha.c +8 −2
arch/alpha/kernel/sys_nautilus.c +5 −0
arch/alpha/kernel/sys_titan.c +7 −7
arch/arc/include/asm/dma-mapping.h +1 −1
arch/arc/include/asm/elf.h +0 −3
arch/arc/include/asm/entry.h +1 −1
arch/arc/include/asm/irqflags.h +8 −4
arch/arc/include/asm/kgdb.h +2 −4
arch/arc/include/asm/ptrace.h +1 −1
arch/arc/include/asm/syscalls.h +0 −2
arch/arc/include/uapi/asm/ptrace.h +2 −2
arch/arc/kernel/entry.S +1 −26
arch/arc/kernel/kgdb.c +1 −0
arch/arc/kernel/setup.c +1 −3
arch/arc/kernel/sys.c +0 −2
arch/arm/Kconfig +23 −13
arch/arm/Kconfig.debug +2 −1
arch/arm/boot/Makefile +1 −1
arch/arm/boot/dts/armada-370-mirabox.dts +1 −1
arch/arm/boot/dts/armada-370-rd.dts +8 −0
arch/arm/boot/dts/armada-370-xp.dtsi +2 −3
arch/arm/boot/dts/armada-370.dtsi +6 −0
arch/arm/boot/dts/armada-xp.dtsi +2 −2
arch/arm/boot/dts/at91sam9x5.dtsi +26 −2
arch/arm/boot/dts/bcm2835.dtsi +1 −1
arch/arm/boot/dts/dbx5x0.dtsi +3 −4
arch/arm/boot/dts/dove.dtsi +5 −0
arch/arm/boot/dts/exynos4.dtsi +9 −0
arch/arm/boot/dts/exynos5440.dtsi +6 −0
arch/arm/boot/dts/href.dtsi +1 −1
arch/arm/boot/dts/hrefv60plus.dts +1 −1
arch/arm/boot/dts/imx28-m28evk.dts +0 −1
arch/arm/boot/dts/imx28-sps1.dts +0 −1
arch/arm/boot/dts/imx53-mba53.dts +1 −2
arch/arm/boot/dts/imx6qdl.dtsi +1 −0
arch/arm/boot/dts/kirkwood-dns320.dts +0 −2
arch/arm/boot/dts/kirkwood-dns325.dts +0 −1
arch/arm/boot/dts/kirkwood-dockstar.dts +0 −1
arch/arm/boot/dts/kirkwood-dreamplug.dts +0 −1
arch/arm/boot/dts/kirkwood-goflexnet.dts +1 −1
arch/arm/boot/dts/kirkwood-ib62x0.dts +0 −1
arch/arm/boot/dts/kirkwood-iconnect.dts +0 −1
arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts +7 −8
arch/arm/boot/dts/kirkwood-km_kirkwood.dts +0 −1
arch/arm/boot/dts/kirkwood-lschlv2.dts +0 −1
arch/arm/boot/dts/kirkwood-lsxhl.dts +0 −1
arch/arm/boot/dts/kirkwood-mplcec4.dts +0 −1
arch/arm/boot/dts/kirkwood-ns2-common.dtsi +0 −1
arch/arm/boot/dts/kirkwood-nsa310.dts +0 −1
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arch/arm/boot/dts/kirkwood-topkick.dts +0 −1
arch/arm/boot/dts/kirkwood.dtsi +3 −2
arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts +1 −1
arch/arm/boot/dts/orion5x.dtsi +7 −2
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arch/arm/boot/dts/socfpga.dtsi +3 −0
arch/arm/boot/dts/tegra20.dtsi +2 −1
arch/arm/boot/dts/tegra30.dtsi +2 −1
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arch/arm/configs/omap2plus_defconfig +2 −0
arch/arm/include/asm/delay.h +1 −1
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arch/arm/include/asm/pgtable-3level.h +1 −1
arch/arm/include/asm/tlbflush.h +17 −9
arch/arm/include/asm/xen/events.h +4 −21
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arch/arm/kernel/head.S +1 −1
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arch/arm/kernel/smp_tlb.c +66 −0
arch/arm/kernel/tcm.c +0 −1
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arch/arm/kvm/coproc.c +2 −2
arch/arm/kvm/vgic.c +14 −21
arch/arm/lib/delay.c +5 −3
arch/arm/lib/memset.S +13 −20
arch/arm/mach-at91/board-foxg20.c +1 −0
arch/arm/mach-at91/board-stamp9g20.c +1 −0
arch/arm/mach-at91/include/mach/gpio.h +8 −0
arch/arm/mach-at91/irq.c +8 −12
arch/arm/mach-at91/pm.c +8 −2
arch/arm/mach-cns3xxx/core.c +3 −13
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arch/arm/mach-davinci/dma.c +3 −0
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arch/arm/mach-kirkwood/guruplug-setup.c +2 −0
arch/arm/mach-kirkwood/openrd-setup.c +1 −0
arch/arm/mach-kirkwood/rd88f6281-setup.c +1 −0
arch/arm/mach-mmp/gplugd.c +1 −0
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arch/arm/mach-mxs/icoll.c +1 −1
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arch/arm/mach-omap2/cclock44xx_data.c +20 −0
arch/arm/mach-omap2/common.h +3 −1
arch/arm/mach-omap2/gpmc.c +3 −3
arch/arm/mach-omap2/io.c +12 −6
arch/arm/mach-omap2/mux.c +5 −4
arch/arm/mach-omap2/omap_hwmod.c +5 −2
arch/arm/mach-omap2/omap_hwmod.h +7 −2
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +6 −1
arch/arm/mach-omap2/omap_hwmod_44xx_data.c +6 −0
arch/arm/mach-omap2/timer.c +4 −0
arch/arm/mach-pxa/raumfeld.c +1 −0
arch/arm/mach-s3c24xx/include/mach/irqs.h +1 −3
arch/arm/mach-s3c24xx/irq.c +1 −1
arch/arm/mach-s5pv210/clock.c +18 −18
arch/arm/mach-s5pv210/mach-goni.c +1 −1
arch/arm/mach-shmobile/board-marzen.c +1 −0
arch/arm/mach-spear3xx/spear3xx.c +1 −1
arch/arm/mach-ux500/board-mop500-sdi.c +0 −1
arch/arm/mach-ux500/board-mop500.c +12 −0
arch/arm/mach-ux500/board-mop500.h +1 −0
arch/arm/mach-ux500/cpu-db8500.c +3 −2
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include/linux/usb/cdc_ncm.h +1 −0
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include/linux/usb/hcd.h +2 −0
include/linux/usb/serial.h +2 −0
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include/net/dst.h +4 −2
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include/net/inet_frag.h +9 −0
include/net/ip_fib.h +5 −7
include/net/ip_vs.h +12 −0
include/net/ipip.h +6 −10
include/net/irda/irlmp.h +2 −1
include/net/iucv/af_iucv.h +8 −0
include/net/scm.h +2 −2
include/scsi/libfc.h +2 −1
include/sound/max98090.h +0 −0
include/sound/soc-dapm.h +1 −0
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include/trace/events/sched.h +1 −1
include/uapi/linux/acct.h +4 −2
include/uapi/linux/aio_abi.h +2 −2
include/uapi/linux/fuse.h +216 −220
include/uapi/linux/packet_diag.h +3 −1
include/uapi/linux/raid/md_p.h +4 −2
include/uapi/linux/serial_core.h +4 −1
include/uapi/linux/unix_diag.h +3 −1
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include/xen/interface/io/blkif.h +10 −0
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init/Kconfig +0 −4
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kernel/exit.c +1 −1
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kernel/lockdep.c +9 −8
kernel/pid_namespace.c +2 −1
kernel/printk.c +39 −41
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kernel/sched/core.c +5 −3
kernel/sched/cputime.c +1 −1
kernel/signal.c +5 −2
kernel/smpboot.c +12 −2
kernel/sys.c +34 −26
kernel/time/tick-broadcast.c +2 −1
kernel/trace/blktrace.c +3 −23
kernel/trace/ftrace.c +27 −31
kernel/trace/trace.c +53 −15
kernel/trace/trace.h +6 −0
kernel/trace/trace_irqsoff.c +14 −5
kernel/trace/trace_sched_wakeup.c +13 −5
kernel/trace/trace_stack.c +1 −1
kernel/user.c +2 −0
kernel/user_namespace.c +28 −9
kernel/workqueue.c +29 −22
lib/Kconfig +3 −0
lib/Makefile +2 −0
lib/bust_spinlocks.c +1 −2
lib/dma-debug.c +31 −14
lib/idr.c +30 −50
lib/kobject.c +8 −1
lib/swiotlb.c +15 −4
lib/ucs2_string.c +51 −0
lib/xz/Kconfig +1 −1
mm/Kconfig +6 −2
mm/fremap.c +5 −12
mm/hugetlb.c +17 −3
mm/memory.c +48 −0
mm/memory_hotplug.c +6 −2
mm/mlock.c +5 −6
mm/mmap.c +4 −2
mm/nommu.c +1 −1
mm/process_vm_access.c +0 −8
mm/vmscan.c +1 −1
net/802/mrp.c +4 −0
net/8021q/vlan.c +7 −7
net/atm/common.c +2 −0
net/ax25/af_ax25.c +1 −0
net/batman-adv/bat_iv_ogm.c +3 −3
net/batman-adv/main.c +4 −1
net/batman-adv/main.h +1 −1
net/batman-adv/routing.c +20 −18
net/batman-adv/translation-table.c +1 −1
net/batman-adv/vis.c +2 −2
net/bluetooth/af_bluetooth.c +2 −2
net/bluetooth/rfcomm/sock.c +1 −0
net/bluetooth/sco.c +2 −0
net/bridge/br_fdb.c +1 −1
net/bridge/br_if.c +2 −1
net/bridge/br_netlink.c +2 −0
net/bridge/br_private.h +1 −0
net/bridge/br_stp_if.c +1 −0
net/caif/caif_socket.c +2 −0
net/can/gw.c +3 −3
net/ceph/osdmap.c +29 −13
net/core/dev.c +11 −3
net/core/dev_addr_lists.c +3 −3
net/core/flow.c +1 −1
net/core/flow_dissector.c +2 −0
net/core/rtnetlink.c +6 −4
net/core/scm.c +3 −1
net/ipv4/af_inet.c +1 −2
net/ipv4/devinet.c +48 −18
net/ipv4/esp4.c +3 −3
net/ipv4/inet_fragment.c +19 −1
net/ipv4/ip_fragment.c +14 −11
net/ipv4/ip_gre.c +1 −4
net/ipv4/ip_options.c +1 −4
net/ipv4/ipconfig.c +2 −1
net/ipv4/netfilter/Kconfig +0 −13
net/ipv4/netfilter/ipt_rpfilter.c +7 −1
net/ipv4/syncookies.c +2 −2
net/ipv4/tcp.c +1 −1
net/ipv4/tcp_input.c +33 −38
net/ipv4/tcp_ipv4.c +7 −7
net/ipv4/tcp_output.c +12 −5
net/ipv4/udp.c +7 −0
net/ipv6/addrconf.c +40 −37
net/ipv6/addrconf_core.c +19 −0
net/ipv6/ip6_input.c +12 −0
net/ipv6/netfilter/ip6t_NPT.c +3 −1
net/ipv6/netfilter/ip6t_rpfilter.c +7 −1
net/ipv6/netfilter/nf_conntrack_reasm.c +6 −6
net/ipv6/reassembly.c +16 −4
net/ipv6/tcp_ipv6.c +8 −0
net/ipv6/udp.c +8 −0
net/irda/af_irda.c +6 −2
net/irda/iriap.c +2 −1
net/irda/irlmp.c +9 −1
net/iucv/af_iucv.c +18 −18
net/key/af_key.c +1 −0
net/l2tp/l2tp_core.c +101 −105
net/l2tp/l2tp_core.h +12 −10
net/l2tp/l2tp_debugfs.c +14 −14
net/l2tp/l2tp_ip.c +6 −0
net/l2tp/l2tp_ip6.c +8 −0
net/l2tp/l2tp_netlink.c +28 −44
net/l2tp/l2tp_ppp.c +36 −75
net/llc/af_llc.c +2 −0
net/mac80211/cfg.c +4 −2
net/mac80211/chan.c +14 −3
net/mac80211/ieee80211_i.h +3 −1
net/mac80211/iface.c +38 −24
net/mac80211/mesh.c +2 −1
net/mac80211/mlme.c +24 −6
net/mac80211/offchannel.c +17 −6
net/mac80211/rx.c +13 −1
net/mac80211/sta_info.c +10 −2
net/netfilter/ipset/ip_set_bitmap_ipmac.c +5 −1
net/netfilter/ipset/ip_set_hash_ipportnet.c +18 −0
net/netfilter/ipset/ip_set_hash_net.c +20 −2
net/netfilter/ipset/ip_set_hash_netiface.c +20 −2
net/netfilter/ipset/ip_set_hash_netport.c +18 −0
net/netfilter/ipset/ip_set_list_set.c +7 −3
net/netfilter/ipvs/ip_vs_core.c +8 −6
net/netfilter/ipvs/ip_vs_ctl.c +7 −0
net/netfilter/ipvs/ip_vs_proto_sctp.c +9 −7
net/netfilter/nf_conntrack_proto_dccp.c +6 −6
net/netfilter/nf_conntrack_proto_gre.c +6 −6
net/netfilter/nf_conntrack_proto_sctp.c +6 −6
net/netfilter/nf_conntrack_proto_udplite.c +6 −6
net/netfilter/nf_conntrack_sip.c +2 −4
net/netfilter/nf_conntrack_standalone.c +1 −0
net/netfilter/nf_nat_core.c +7 −33
net/netfilter/nfnetlink_acct.c +2 −0
net/netfilter/nfnetlink_queue_core.c +4 −2
net/netlink/genetlink.c +1 −0
net/netrom/af_netrom.c +1 −0
net/nfc/llcp/llcp.c +51 −15
net/nfc/llcp/sock.c +8 −3
net/openvswitch/actions.c +2 −2
net/openvswitch/datapath.c +21 −12
net/openvswitch/flow.c +6 −2
net/openvswitch/vport-netdev.c +1 −2
net/openvswitch/vport.c +1 −2
net/rose/af_rose.c +1 −0
net/sched/cls_fw.c +1 −1
net/sched/sch_cbq.c +4 −1
net/sched/sch_fq_codel.c +1 −1
net/sched/sch_generic.c +1 −1
net/sctp/associola.c +1 −1
net/sctp/sm_statefuns.c +1 −1
net/sunrpc/auth_gss/svcauth_gss.c +8 −4
net/sunrpc/clnt.c +3 −8
net/sunrpc/rpc_pipe.c +1 −0
net/sunrpc/sched.c +7 −2
net/sunrpc/xprtsock.c +10 −5
net/tipc/socket.c +7 −0
net/unix/af_unix.c +4 −5
net/vmw_vsock/af_vsock.c +5 −3
net/vmw_vsock/vmci_transport.c +22 −12
net/vmw_vsock/vsock_addr.c +0 −10
net/vmw_vsock/vsock_addr.h +0 −2
net/wireless/core.c +47 −17
net/wireless/core.h +3 −0
net/wireless/nl80211.c +27 −25
net/wireless/scan.c +16 −8
net/wireless/sme.c +6 −2
net/wireless/trace.h +3 −2
net/wireless/wext-sme.c +6 −0
net/xfrm/xfrm_replay.c +65 −1
scripts/Makefile.headersinst +6 −5
scripts/checkpatch.pl +1 −0
security/capability.c +6 −0
security/keys/compat.c +2 −2
security/keys/process_keys.c +1 −1
security/security.c +5 −0
security/selinux/hooks.c +7 −0
security/selinux/xfrm.c +1 −1
security/yama/yama_lsm.c +1 −3
sound/core/pcm_native.c +2 −10
sound/core/seq/seq_timer.c +4 −4
sound/oss/sequencer.c +6 −0
sound/pci/asihpi/asihpi.c +2 −1
sound/pci/hda/hda_codec.c +16 −12
sound/pci/hda/hda_eld.c +1 −1
sound/pci/hda/hda_generic.c +47 −1
sound/pci/hda/hda_intel.c +111 −27
sound/pci/hda/patch_ca0132.c +15 −13
sound/pci/hda/patch_cirrus.c +6 −2
sound/pci/hda/patch_conexant.c +11 −5
sound/pci/hda/patch_hdmi.c +1 −1
sound/pci/hda/patch_realtek.c +3 −1
sound/pci/hda/patch_sigmatel.c +29 −0
sound/soc/codecs/max98090.c +0 −0
sound/soc/codecs/max98090.h +0 −0
sound/soc/codecs/si476x.c +1 −0
sound/soc/codecs/wm5102.c +1 −1
sound/soc/codecs/wm8903.c +2 −0
sound/soc/codecs/wm_adsp.c +3 −2
sound/soc/fsl/imx-ssi.c +5 −0
sound/soc/fsl/pcm030-audio-fabric.c +1 −1
sound/soc/samsung/i2s.c +12 −5
sound/soc/sh/dma-sh7760.c +2 −2
sound/soc/soc-compress.c +11 −3
sound/soc/soc-core.c +5 −5
sound/soc/soc-dapm.c +14 −0
sound/soc/spear/spear_pcm.c +6 −6
sound/soc/tegra/tegra_pcm.c +1 −23
sound/usb/card.c +15 −0
sound/usb/clock.c +35 −10
sound/usb/mixer.c +13 −8
sound/usb/mixer_quirks.c +2 −2
sound/usb/quirks.c +1 −1
tools/lib/traceevent/Makefile +1 −1
tools/perf/Makefile +7 −1
tools/perf/bench/bench.h +24 −0
tools/perf/builtin-record.c +4 −2
tools/perf/util/hist.h +3 −2
tools/perf/util/strlist.c +1 −1
tools/power/x86/turbostat/turbostat.c +4 −1
tools/usb/ffs-test.c +1 −1
virt/kvm/ioapic.c +5 −2
virt/kvm/kvm_main.c +37 −10

@@ -1510,6 +1510,14 @@ D: Natsemi ethernet · 1509 unmodified lines
1510	1510	D: Cobalt Networks (x86) support
1511	1511	D: This-and-That
1512	1512
	1513	+N: Mark M. Hoffman
	1514	+E: mhoffman@lightlink.com
	1515	+D: asb100, lm93 and smsc47b397 hardware monitoring drivers
	1516	+D: hwmon subsystem core
	1517	+D: hwmon subsystem maintainer
	1518	+D: i2c-sis96x and i2c-stub SMBus drivers
	1519	+S: USA
	1520	+
1513	1521	N: Dirk Hohndel
1514	1522	E: hohndel@suse.de
1515	1523	D: The XFree86[tm] Project

Documentation/DocBook/device-drivers.tmpl+1−1

@@ -227,7 +227,7 @@ X!Isound/sound_firmware.c · 226 unmodified lines
227	227	<chapter id="uart16x50">
228	228	<title>16x50 UART Driver</title>
229	229	!Edrivers/tty/serial/serial_core.c
230		−!Edrivers/tty/serial/8250/8250.c
	230	+!Edrivers/tty/serial/8250/8250_core.c
231	231	</chapter>
232	232
233	233	<chapter id="fbdev">

Documentation/devicetree/bindings/mfd/ab8500.txt+1−5

@@ -13,9 +13,6 @@ Required parent device properties: · 12 unmodified lines
13	13	4 = active high level-sensitive
14	14	8 = active low level-sensitive
15	15
16		−Optional parent device properties:
17		−- reg : contains the PRCMU mailbox address for the AB8500 i2c port
18		−
19	16	The AB8500 consists of a large and varied group of sub-devices:
20	17
21	18	Device IRQ Names Supply Names Description
@@ -86,9 +83,8 @@ Non-standard child device properties: · 64 unmodified lines
86	83	- stericsson,amic2-bias-vamic1 : Analoge Mic wishes to use a non-standard Vamic
87	84	- stericsson,earpeice-cmv : Earpeice voltage (only: 950 \| 1100 \| 1270 \| 1580)
88	85
89		−ab8500@5 {
	86	+ab8500 {
90	87	compatible = "stericsson,ab8500";
91		− reg = <5>; /* mailbox 5 is i2c */
92	88	interrupts = <0 40 0x4>;
93	89	interrupt-controller;
94	90	#interrupt-cells = <2>;

Documentation/devicetree/bindings/tty/serial/of-serial.txt+3−0

@@ -11,6 +11,9 @@ Required properties: · 10 unmodified lines
11	11	- "nvidia,tegra20-uart"
12	12	- "nxp,lpc3220-uart"
13	13	- "ibm,qpace-nwp-serial"
	14	+ - "altr,16550-FIFO32"
	15	+ - "altr,16550-FIFO64"
	16	+ - "altr,16550-FIFO128"
14	17	- "serial" if the port type is unknown.
15	18	- reg : offset and length of the register set for the device.
16	19	- interrupts : should contain uart interrupt.

Documentation/hwmon/lm75+1−1

@@ -23,7 +23,7 @@ Supported chips: · 22 unmodified lines
23	23	Datasheet: Publicly available at the Maxim website
24	24	http://www.maxim-ic.com/
25	25	* Microchip (TelCom) TCN75
26		− Prefix: 'lm75'
	26	+ Prefix: 'tcn75'
27	27	Addresses scanned: none
28	28	Datasheet: Publicly available at the Microchip website
29	29	http://www.microchip.com/

Documentation/i2c/busses/i2c-diolan-u2c+1−1

@@ -5,7 +5,7 @@ Supported adapters: · 4 unmodified lines
5	5	Documentation:
6	6	http://www.diolan.com/i2c/u2c12.html
7	7
8		−Author: Guenter Roeck <guenter.roeck@ericsson.com>
	8	+Author: Guenter Roeck <linux@roeck-us.net>
9	9
10	10	Description
11	11	-----------

Documentation/kernel-parameters.txt+26−3

@@ -596,9 +596,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 595 unmodified lines
596	596	is selected automatically. Check
597	597	Documentation/kdump/kdump.txt for further details.
598	598
599		− crashkernel_low=size[KMG]
600		− [KNL, x86] parts under 4G.
601		−
602	599	crashkernel=range1:size1[,range2:size2,...][@offset]
603	600	[KNL] Same as above, but depends on the memory
604	601	in the running system. The syntax of range is
@@ -606,6 +603,26 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 1 unmodified line
606	603	a memory unit (amount[KMG]). See also
607	604	Documentation/kdump/kdump.txt for an example.
608	605
	606	+ crashkernel=size[KMG],high
	607	+ [KNL, x86_64] range could be above 4G. Allow kernel
	608	+ to allocate physical memory region from top, so could
	609	+ be above 4G if system have more than 4G ram installed.
	610	+ Otherwise memory region will be allocated below 4G, if
	611	+ available.
	612	+ It will be ignored if crashkernel=X is specified.
	613	+ crashkernel=size[KMG],low
	614	+ [KNL, x86_64] range under 4G. When crashkernel=X,high
	615	+ is passed, kernel could allocate physical memory region
	616	+ above 4G, that cause second kernel crash on system
	617	+ that require some amount of low memory, e.g. swiotlb
	618	+ requires at least 64M+32K low memory. Kernel would
	619	+ try to allocate 72M below 4G automatically.
	620	+ This one let user to specify own low range under 4G
	621	+ for second kernel instead.
	622	+ 0: to disable low allocation.
	623	+ It will be ignored when crashkernel=X,high is not used
	624	+ or memory reserved is below 4G.
	625	+
609	626	cs89x0_dma= [HW,NET]
610	627	Format: <dma>
611	628
@@ -788,6 +805,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 176 unmodified lines
788	805	edd= [EDD]
789	806	Format: {"off" \| "on" \| "skip[mbr]"}
790	807
	808	+ efi_no_storage_paranoia [EFI; X86]
	809	+ Using this parameter you can use more than 50% of
	810	+ your efi variable storage. Use this parameter only if
	811	+ you are really sure that your UEFI does sane gc and
	812	+ fulfills the spec otherwise your board may brick.
	813	+
791	814	eisa_irq_edge= [PARISC,HW]
792	815	See header of drivers/parisc/eisa.c.
793	816

Documentation/networking/ipvs-sysctl.txt+7−0

@@ -15,6 +15,13 @@ amemthresh - INTEGER · 14 unmodified lines
15	15	enabled and the variable is automatically set to 2, otherwise
16	16	the strategy is disabled and the variable is set to 1.
17	17
	18	+backup_only - BOOLEAN
	19	+ 0 - disabled (default)
	20	+ not 0 - enabled
	21	+
	22	+ If set, disable the director function while the server is
	23	+ in backup mode to avoid packet loops for DR/TUN methods.
	24	+
18	25	conntrack - BOOLEAN
19	26	0 - disabled (default)
20	27	not 0 - enabled

Documentation/scsi/LICENSE.qla2xxx+1−1

@@ -1,4 +1,4 @@
1		−Copyright (c) 2003-2012 QLogic Corporation
	1	+Copyright (c) 2003-2013 QLogic Corporation
2	2	QLogic Linux FC-FCoE Driver
3	3
4	4	This program includes a device driver for Linux 3.x.

Documentation/sound/alsa/ALSA-Configuration.txt+3−4

@@ -890,9 +890,8 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed. · 889 unmodified lines
890	890	enable_msi - Enable Message Signaled Interrupt (MSI) (default = off)
891	891	power_save - Automatic power-saving timeout (in second, 0 =
892	892	disable)
893		− power_save_controller - Support runtime D3 of HD-audio controller
894		− (-1 = on for supported chip (default), false = off,
895		− true = force to on even for unsupported hardware)
	893	+ power_save_controller - Reset HD-audio controller in power-saving mode
	894	+ (default = on)
896	895	align_buffer_size - Force rounding of buffer/period sizes to multiples
897	896	of 128 bytes. This is more efficient in terms of memory
898	897	access but isn't required by the HDA spec and prevents
@@ -912,7 +911,7 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed. · 13 unmodified lines
912	911	models depending on the codec chip. The list of available models
913	912	is found in HD-Audio-Models.txt
914	913
915		− The model name "genric" is treated as a special case. When this
	914	+ The model name "generic" is treated as a special case. When this
916	915	model is given, the driver uses the generic codec parser without
917	916	"codec-patch". It's sometimes good for testing and debugging.
918	917

Documentation/sound/alsa/seq_oss.html+1−1

@@ -285,7 +285,7 @@ sample data. · 284 unmodified lines
285	285	<H4>
286	286	7.2.4 Close Callback</H4>
287	287	The <TT>close</TT> callback is called when this device is closed by the
288		−applicaion. If any private data was allocated in open callback, it must
	288	+application. If any private data was allocated in open callback, it must
289	289	be released in the close callback. The deletion of ALSA port should be
290	290	done here, too. This callback must not be NULL.
291	291	<H4>

MAINTAINERS+66−34

@@ -1338,12 +1338,6 @@ S: Maintained · 1337 unmodified lines
1338	1338	F: drivers/platform/x86/asus*.c
1339	1339	F: drivers/platform/x86/eeepc*.c
1340	1340
1341		−ASUS ASB100 HARDWARE MONITOR DRIVER
1342		−M: "Mark M. Hoffman" <mhoffman@lightlink.com>
1343		−L: lm-sensors@lm-sensors.org
1344		−S: Maintained
1345		−F: drivers/hwmon/asb100.c
1346		−
1347	1341	ASYNCHRONOUS TRANSFERS/TRANSFORMS (IOAT) API
1348	1342	M: Dan Williams <djbw@fb.com>
1349	1343	W: http://sourceforge.net/projects/xscaleiop
@@ -1467,6 +1461,12 @@ F: drivers/dma/at_hdmac.c · 117 unmodified lines
1467	1461	F: drivers/dma/at_hdmac_regs.h
1468	1462	F: include/linux/platform_data/dma-atmel.h
1469	1463
	1464	+ATMEL I2C DRIVER
	1465	+M: Ludovic Desroches <ludovic.desroches@atmel.com>
	1466	+L: linux-i2c@vger.kernel.org
	1467	+S: Supported
	1468	+F: drivers/i2c/busses/i2c-at91.c
	1469	+
1470	1470	ATMEL ISI DRIVER
1471	1471	M: Josh Wu <josh.wu@atmel.com>
1472	1472	L: linux-media@vger.kernel.org
@@ -2629,7 +2629,7 @@ F: include/uapi/drm/ · 1156 unmodified lines
2629	2629
2630	2630	INTEL DRM DRIVERS (excluding Poulsbo, Moorestown and derivative chipsets)
2631	2631	M: Daniel Vetter <daniel.vetter@ffwll.ch>
2632		−L: intel-gfx@lists.freedesktop.org (subscribers-only)
	2632	+L: intel-gfx@lists.freedesktop.org
2633	2633	L: dri-devel@lists.freedesktop.org
2634	2634	T: git git://people.freedesktop.org/~danvet/drm-intel
2635	2635	S: Supported
@@ -3242,6 +3242,12 @@ F: Documentation/firmware_class/ · 606 unmodified lines
3242	3242	F: drivers/base/firmware*.c
3243	3243	F: include/linux/firmware.h
3244	3244
	3245	+FLASHSYSTEM DRIVER (IBM FlashSystem 70/80 PCI SSD Flash Card)
	3246	+M: Joshua Morris <josh.h.morris@us.ibm.com>
	3247	+M: Philip Kelleher <pjk1939@linux.vnet.ibm.com>
	3248	+S: Maintained
	3249	+F: drivers/block/rsxx/
	3250	+
3245	3251	FLOPPY DRIVER
3246	3252	M: Jiri Kosina <jkosina@suse.cz>
3247	3253	T: git git://git.kernel.org/pub/scm/linux/kernel/git/jikos/floppy.git
@@ -3851,7 +3857,7 @@ F: drivers/i2c/busses/i2c-ismt.c · 603 unmodified lines
3851	3857	F: Documentation/i2c/busses/i2c-ismt
3852	3858
3853	3859	I2C/SMBUS STUB DRIVER
3854		−M: "Mark M. Hoffman" <mhoffman@lightlink.com>
	3860	+M: Jean Delvare <khali@linux-fr.org>
3855	3861	L: linux-i2c@vger.kernel.org
3856	3862	S: Maintained
3857	3863	F: drivers/i2c/i2c-stub.c
@@ -4005,6 +4011,22 @@ M: Stanislaw Gruszka <stf_xl@wp.pl> · 147 unmodified lines
4005	4011	S: Maintained
4006	4012	F: drivers/usb/atm/ueagle-atm.c
4007	4013
	4014	+INA209 HARDWARE MONITOR DRIVER
	4015	+M: Guenter Roeck <linux@roeck-us.net>
	4016	+L: lm-sensors@lm-sensors.org
	4017	+S: Maintained
	4018	+F: Documentation/hwmon/ina209
	4019	+F: Documentation/devicetree/bindings/i2c/ina209.txt
	4020	+F: drivers/hwmon/ina209.c
	4021	+
	4022	+INA2XX HARDWARE MONITOR DRIVER
	4023	+M: Guenter Roeck <linux@roeck-us.net>
	4024	+L: lm-sensors@lm-sensors.org
	4025	+S: Maintained
	4026	+F: Documentation/hwmon/ina2xx
	4027	+F: drivers/hwmon/ina2xx.c
	4028	+F: include/linux/platform_data/ina2xx.h
	4029	+
4008	4030	INDUSTRY PACK SUBSYSTEM (IPACK)
4009	4031	M: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
4010	4032	M: Jens Taprogge <jens.taprogge@taprogge.org>
@@ -4919,6 +4941,12 @@ W: logfs.org · 908 unmodified lines
4919	4941	S: Maintained
4920	4942	F: fs/logfs/
4921	4943
	4944	+LPC32XX MACHINE SUPPORT
	4945	+M: Roland Stigge <stigge@antcom.de>
	4946	+L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
	4947	+S: Maintained
	4948	+F: arch/arm/mach-lpc32xx/
	4949	+
4922	4950	LSILOGIC MPT FUSION DRIVERS (FC/SAS/SPI)
4923	4951	M: Nagalakshmi Nandigama <Nagalakshmi.Nandigama@lsi.com>
4924	4952	M: Sreekanth Reddy <Sreekanth.Reddy@lsi.com>
@@ -5043,9 +5071,8 @@ S: Maintained · 118 unmodified lines
5043	5071	F: drivers/net/ethernet/marvell/sk*
5044	5072
5045	5073	MARVELL LIBERTAS WIRELESS DRIVER
5046		−M: Dan Williams <dcbw@redhat.com>
5047	5074	L: libertas-dev@lists.infradead.org
5048		−S: Maintained
	5075	+S: Orphan
5049	5076	F: drivers/net/wireless/libertas/
5050	5077
5051	5078	MARVELL MV643XX ETHERNET DRIVER
@@ -5098,6 +5125,15 @@ S: Maintained · 46 unmodified lines
5098	5125	F: Documentation/hwmon/max6650
5099	5126	F: drivers/hwmon/max6650.c
5100	5127
	5128	+MAX6697 HARDWARE MONITOR DRIVER
	5129	+M: Guenter Roeck <linux@roeck-us.net>
	5130	+L: lm-sensors@lm-sensors.org
	5131	+S: Maintained
	5132	+F: Documentation/hwmon/max6697
	5133	+F: Documentation/devicetree/bindings/i2c/max6697.txt
	5134	+F: drivers/hwmon/max6697.c
	5135	+F: include/linux/platform_data/max6697.h
	5136	+
5101	5137	MAXIRADIO FM RADIO RECEIVER DRIVER
5102	5138	M: Hans Verkuil <hverkuil@xs4all.nl>
5103	5139	L: linux-media@vger.kernel.org
@@ -5538,6 +5574,7 @@ F: include/uapi/linux/if_* · 434 unmodified lines
5538	5574	F: include/uapi/linux/netdevice.h
5539	5575
5540	5576	NETXEN (1/10) GbE SUPPORT
	5577	+M: Manish Chopra <manish.chopra@qlogic.com>
5541	5578	M: Sony Chacko <sony.chacko@qlogic.com>
5542	5579	M: Rajesh Borundia <rajesh.borundia@qlogic.com>
5543	5580	L: netdev@vger.kernel.org
@@ -5622,6 +5659,14 @@ S: Maintained · 78 unmodified lines
5622	5659	F: drivers/video/riva/
5623	5660	F: drivers/video/nvidia/
5624	5661
	5662	+NVM EXPRESS DRIVER
	5663	+M: Matthew Wilcox <willy@linux.intel.com>
	5664	+L: linux-nvme@lists.infradead.org
	5665	+T: git git://git.infradead.org/users/willy/linux-nvme.git
	5666	+S: Supported
	5667	+F: drivers/block/nvme.c
	5668	+F: include/linux/nvme.h
	5669	+
5625	5670	OMAP SUPPORT
5626	5671	M: Tony Lindgren <tony@atomide.com>
5627	5672	L: linux-omap@vger.kernel.org
@@ -5650,7 +5695,7 @@ S: Maintained · 22 unmodified lines
5650	5695	F: arch/arm/omap/clock
5651	5696
5652	5697	OMAP POWER MANAGEMENT SUPPORT
5653		−M: Kevin Hilman <khilman@ti.com>
	5698	+M: Kevin Hilman <khilman@deeprootsystems.com>
5654	5699	L: linux-omap@vger.kernel.org
5655	5700	S: Maintained
5656	5701	F: arch/arm/omap/pm
@@ -5744,7 +5789,7 @@ F: arch/arm/omap/usb* · 87 unmodified lines
5744	5789
5745	5790	OMAP GPIO DRIVER
5746	5791	M: Santosh Shilimkar <santosh.shilimkar@ti.com>
5747		−M: Kevin Hilman <khilman@ti.com>
	5792	+M: Kevin Hilman <khilman@deeprootsystems.com>
5748	5793	L: linux-omap@vger.kernel.org
5749	5794	S: Maintained
5750	5795	F: drivers/gpio/gpio-omap.c
@@ -6176,7 +6221,7 @@ F: include/linux/power_supply.h · 425 unmodified lines
6176	6221	F: drivers/power/
6177	6222
6178	6223	PNP SUPPORT
6179		−M: Adam Belay <abelay@mit.edu>
	6224	+M: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
6180	6225	M: Bjorn Helgaas <bhelgaas@google.com>
6181	6226	S: Maintained
6182	6227	F: drivers/pnp/
@@ -6518,12 +6563,6 @@ S: Maintained · 335 unmodified lines
6518	6563	F: Documentation/blockdev/ramdisk.txt
6519	6564	F: drivers/block/brd.c
6520	6565
6521		−RAMSAM DRIVER (IBM RamSan 70/80 PCI SSD Flash Card)
6522		−M: Joshua Morris <josh.h.morris@us.ibm.com>
6523		−M: Philip Kelleher <pjk1939@linux.vnet.ibm.com>
6524		−S: Maintained
6525		−F: drivers/block/rsxx/
6526		−
6527	6566	RANDOM NUMBER DRIVER
6528	6567	M: Theodore Ts'o" <tytso@mit.edu>
6529	6568	S: Maintained
@@ -6592,7 +6631,7 @@ S: Supported · 62 unmodified lines
6592	6631	F: fs/reiserfs/
6593	6632
6594	6633	REGISTER MAP ABSTRACTION
6595		−M: Mark Brown <broonie@opensource.wolfsonmicro.com>
	6634	+M: Mark Brown <broonie@kernel.org>
6596	6635	T: git git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap.git
6597	6636	S: Supported
6598	6637	F: drivers/base/regmap/
@@ -6918,7 +6957,6 @@ F: drivers/scsi/st* · 319 unmodified lines
6918	6957
6919	6958	SCTP PROTOCOL
6920	6959	M: Vlad Yasevich <vyasevich@gmail.com>
6921		−M: Sridhar Samudrala <sri@us.ibm.com>
6922	6960	M: Neil Horman <nhorman@tuxdriver.com>
6923	6961	L: linux-sctp@vger.kernel.org
6924	6962	W: http://lksctp.sourceforge.net
@@ -7140,7 +7178,7 @@ F: arch/arm/mach-s3c2410/bast-irq.c · 215 unmodified lines
7140	7178
7141	7179	TI DAVINCI MACHINE SUPPORT
7142	7180	M: Sekhar Nori <nsekhar@ti.com>
7143		−M: Kevin Hilman <khilman@ti.com>
	7181	+M: Kevin Hilman <khilman@deeprootsystems.com>
7144	7182	L: davinci-linux-open-source@linux.davincidsp.com (moderated for non-subscribers)
7145	7183	T: git git://gitorious.org/linux-davinci/linux-davinci.git
7146	7184	Q: http://patchwork.kernel.org/project/linux-davinci/list/
@@ -7173,13 +7211,6 @@ L: netdev@vger.kernel.org · 26 unmodified lines
7173	7211	S: Maintained
7174	7212	F: drivers/net/ethernet/sis/sis900.*
7175	7213
7176		−SIS 96X I2C/SMBUS DRIVER
7177		−M: "Mark M. Hoffman" <mhoffman@lightlink.com>
7178		−L: linux-i2c@vger.kernel.org
7179		−S: Maintained
7180		−F: Documentation/i2c/busses/i2c-sis96x
7181		−F: drivers/i2c/busses/i2c-sis96x.c
7182		−
7183	7214	SIS FRAMEBUFFER DRIVER
7184	7215	M: Thomas Winischhofer <thomas@winischhofer.net>
7185	7216	W: http://www.winischhofer.net/linuxsisvga.shtml
@@ -7257,7 +7288,7 @@ F: Documentation/hwmon/sch5627 · 71 unmodified lines
7257	7288	F: drivers/hwmon/sch5627.c
7258	7289
7259	7290	SMSC47B397 HARDWARE MONITOR DRIVER
7260		−M: "Mark M. Hoffman" <mhoffman@lightlink.com>
	7291	+M: Jean Delvare <khali@linux-fr.org>
7261	7292	L: lm-sensors@lm-sensors.org
7262	7293	S: Maintained
7263	7294	F: Documentation/hwmon/smsc47b397
@@ -7348,7 +7379,7 @@ F: sound/ · 84 unmodified lines
7348	7379
7349	7380	SOUND - SOC LAYER / DYNAMIC AUDIO POWER MANAGEMENT (ASoC)
7350	7381	M: Liam Girdwood <lgirdwood@gmail.com>
7351		−M: Mark Brown <broonie@opensource.wolfsonmicro.com>
	7382	+M: Mark Brown <broonie@kernel.org>
7352	7383	T: git git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
7353	7384	L: alsa-devel@alsa-project.org (moderated for non-subscribers)
7354	7385	W: http://alsa-project.org/main/index.php/ASoC
@@ -7437,7 +7468,7 @@ F: drivers/clk/spear/ · 82 unmodified lines
7437	7468
7438	7469	SPI SUBSYSTEM
7439	7470	M: Grant Likely <grant.likely@secretlab.ca>
7440		−M: Mark Brown <broonie@opensource.wolfsonmicro.com>
	7471	+M: Mark Brown <broonie@kernel.org>
7441	7472	L: spi-devel-general@lists.sourceforge.net
7442	7473	Q: http://patchwork.kernel.org/project/spi-devel-general/list/
7443	7474	T: git git://git.secretlab.ca/git/linux-2.6.git
@@ -7680,9 +7711,10 @@ F: include/linux/swiotlb.h · 236 unmodified lines
7680	7711
7681	7712	SYNOPSYS ARC ARCHITECTURE
7682	7713	M: Vineet Gupta <vgupta@synopsys.com>
7683		−L: linux-snps-arc@vger.kernel.org
7684	7714	S: Supported
7685	7715	F: arch/arc/
	7716	+F: Documentation/devicetree/bindings/arc/
	7717	+F: drivers/tty/serial/arc-uart.c
7686	7718
7687	7719	SYSV FILESYSTEM
7688	7720	M: Christoph Hellwig <hch@infradead.org>
@@ -8681,7 +8713,7 @@ F: drivers/scsi/vmw_pvscsi.h · 992 unmodified lines
8681	8713
8682	8714	VOLTAGE AND CURRENT REGULATOR FRAMEWORK
8683	8715	M: Liam Girdwood <lrg@ti.com>
8684		−M: Mark Brown <broonie@opensource.wolfsonmicro.com>
	8716	+M: Mark Brown <broonie@kernel.org>
8685	8717	W: http://opensource.wolfsonmicro.com/node/15
8686	8718	W: http://www.slimlogic.co.uk/?p=48
8687	8719	T: git git://git.kernel.org/pub/scm/linux/kernel/git/lrg/regulator.git

Makefile+3−2

@@ -1,7 +1,7 @@
1	1	VERSION = 3
2	2	PATCHLEVEL = 9
3	3	SUBLEVEL = 0
4		−EXTRAVERSION = -rc2
	4	+EXTRAVERSION = -rc8
5	5	NAME = Unicycling Gorilla
6	6
7	7	# DOCUMENTATION
@@ -513,7 +513,8 @@ ifeq ($(KBUILD_EXTMOD),) · 505 unmodified lines
513	513	# Carefully list dependencies so we do not try to build scripts twice
514	514	# in parallel
515	515	PHONY += scripts
516		−scripts: scripts_basic include/config/auto.conf include/config/tristate.conf
	516	+scripts: scripts_basic include/config/auto.conf include/config/tristate.conf \
	517	+ asm-generic
517	518	$(Q)$(MAKE) $(build)=$(@)
518	519
519	520	# Objects we will link into vmlinux / subdirs we need to visit

arch/Kconfig+0−7

@@ -319,13 +319,6 @@ config ARCH_WANT_OLD_COMPAT_IPC · 318 unmodified lines
319	319	select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
320	320	bool
321	321
322		−config HAVE_VIRT_TO_BUS
323		− bool
324		− help
325		− An architecture should select this if it implements the
326		− deprecated interface virt_to_bus(). All new architectures
327		− should probably not select this.
328		−
329	322	config HAVE_ARCH_SECCOMP_FILTER
330	323	bool
331	324	help

arch/alpha/Kconfig+1−1

@@ -9,7 +9,7 @@ config ALPHA · 8 unmodified lines
9	9	select HAVE_PERF_EVENTS
10	10	select HAVE_DMA_ATTRS
11	11	select HAVE_GENERIC_HARDIRQS
12		− select HAVE_VIRT_TO_BUS
	12	+ select VIRT_TO_BUS
13	13	select GENERIC_IRQ_PROBE
14	14	select AUTO_IRQ_AFFINITY if SMP
15	15	select GENERIC_IRQ_SHOW

arch/alpha/Makefile+1−1

@@ -12,7 +12,7 @@ NM := $(NM) -B · 11 unmodified lines
12	12
13	13	LDFLAGS_vmlinux := -static -N #-relax
14	14	CHECKFLAGS += -D__alpha__ -m64
15		−cflags-y := -pipe -mno-fp-regs -ffixed-8 -msmall-data
	15	+cflags-y := -pipe -mno-fp-regs -ffixed-8
16	16	cflags-y += $(call cc-option, -fno-jump-tables)
17	17
18	18	cpuflags-$(CONFIG_ALPHA_EV4) := -mcpu=ev4

arch/alpha/include/asm/floppy.h+1−1

@@ -26,7 +26,7 @@ · 25 unmodified lines
26	26	#define fd_disable_irq() disable_irq(FLOPPY_IRQ)
27	27	#define fd_cacheflush(addr,size) /* nothing */
28	28	#define fd_request_irq() request_irq(FLOPPY_IRQ, floppy_interrupt,\
29		− IRQF_DISABLED, "floppy", NULL)
	29	+ 0, "floppy", NULL)
30	30	#define fd_free_irq() free_irq(FLOPPY_IRQ, NULL)
31	31
32	32	#ifdef CONFIG_PCI

arch/alpha/kernel/irq.c+0−7

@@ -117,13 +117,6 @@ handle_irq(int irq) · 116 unmodified lines
117	117	return;
118	118	}
119	119
120		− /*
121		− * From here we must proceed with IPL_MAX. Note that we do not
122		− * explicitly enable interrupts afterwards - some MILO PALcode
123		− * (namely LX164 one) seems to have severe problems with RTI
124		− * at IPL 0.
125		− */
126		− local_irq_disable();
127	120	irq_enter();
128	121	generic_handle_irq_desc(irq, desc);
129	122	irq_exit();

arch/alpha/kernel/irq_alpha.c+8−2

@@ -45,6 +45,14 @@ do_entInt(unsigned long type, unsigned long vector, · 44 unmodified lines
45	45	unsigned long la_ptr, struct pt_regs *regs)
46	46	{
47	47	struct pt_regs *old_regs;
	48	+
	49	+ /*
	50	+ * Disable interrupts during IRQ handling.
	51	+ * Note that there is no matching local_irq_enable() due to
	52	+ * severe problems with RTI at IPL0 and some MILO PALcode
	53	+ * (namely LX164).
	54	+ */
	55	+ local_irq_disable();
48	56	switch (type) {
49	57	case 0:
50	58	#ifdef CONFIG_SMP
@@ -62,7 +70,6 @@ do_entInt(unsigned long type, unsigned long vector, · 11 unmodified lines
62	70	{
63	71	long cpu;
64	72
65		− local_irq_disable();
66	73	smp_percpu_timer_interrupt(regs);
67	74	cpu = smp_processor_id();
68	75	if (cpu != boot_cpuid) {
@@ -222,7 +229,6 @@ process_mcheck_info(unsigned long vector, unsigned long la_ptr, · 153 unmodified lines
222	229
223	230	struct irqaction timer_irqaction = {
224	231	.handler = timer_interrupt,
225		− .flags = IRQF_DISABLED,
226	232	.name = "timer",
227	233	};
228	234

arch/alpha/kernel/sys_nautilus.c+5−0

@@ -188,6 +188,10 @@ nautilus_machine_check(unsigned long vector, unsigned long la_ptr) · 187 unmodified lines
188	188	extern void free_reserved_mem(void , void );
189	189	extern void pcibios_claim_one_bus(struct pci_bus *);
190	190
	191	+static struct resource irongate_io = {
	192	+ .name = "Irongate PCI IO",
	193	+ .flags = IORESOURCE_IO,
	194	+};
191	195	static struct resource irongate_mem = {
192	196	.name = "Irongate PCI MEM",
193	197	.flags = IORESOURCE_MEM,
@@ -209,6 +213,7 @@ nautilus_init_pci(void) · 15 unmodified lines
209	213
210	214	irongate = pci_get_bus_and_slot(0, 0);
211	215	bus->self = irongate;
	216	+ bus->resource[0] = &irongate_io;
212	217	bus->resource[1] = &irongate_mem;
213	218
214	219	pci_bus_size_bridges(bus);

arch/alpha/kernel/sys_titan.c+7−7

@@ -280,15 +280,15 @@ titan_late_init(void) · 279 unmodified lines
280	280	* all reported to the kernel as machine checks, so the handler
281	281	* is a nop so it can be called to count the individual events.
282	282	*/
283		− titan_request_irq(63+16, titan_intr_nop, IRQF_DISABLED,
	283	+ titan_request_irq(63+16, titan_intr_nop, 0,
284	284	"CChip Error", NULL);
285		− titan_request_irq(62+16, titan_intr_nop, IRQF_DISABLED,
	285	+ titan_request_irq(62+16, titan_intr_nop, 0,
286	286	"PChip 0 H_Error", NULL);
287		− titan_request_irq(61+16, titan_intr_nop, IRQF_DISABLED,
	287	+ titan_request_irq(61+16, titan_intr_nop, 0,
288	288	"PChip 1 H_Error", NULL);
289		− titan_request_irq(60+16, titan_intr_nop, IRQF_DISABLED,
	289	+ titan_request_irq(60+16, titan_intr_nop, 0,
290	290	"PChip 0 C_Error", NULL);
291		− titan_request_irq(59+16, titan_intr_nop, IRQF_DISABLED,
	291	+ titan_request_irq(59+16, titan_intr_nop, 0,
292	292	"PChip 1 C_Error", NULL);
293	293
294	294	/*
@@ -348,9 +348,9 @@ privateer_init_pci(void) · 53 unmodified lines
348	348	* Hook a couple of extra err interrupts that the
349	349	* common titan code won't.
350	350	*/
351		− titan_request_irq(53+16, titan_intr_nop, IRQF_DISABLED,
	351	+ titan_request_irq(53+16, titan_intr_nop, 0,
352	352	"NMI", NULL);
353		− titan_request_irq(50+16, titan_intr_nop, IRQF_DISABLED,
	353	+ titan_request_irq(50+16, titan_intr_nop, 0,
354	354	"Temperature Warning", NULL);
355	355
356	356	/*

arch/arc/include/asm/dma-mapping.h+1−1

@@ -126,7 +126,7 @@ dma_map_sg(struct device dev, struct scatterlist sg, · 125 unmodified lines
126	126	int i;
127	127
128	128	for_each_sg(sg, s, nents, i)
129		− sg->dma_address = dma_map_page(dev, sg_page(s), s->offset,
	129	+ s->dma_address = dma_map_page(dev, sg_page(s), s->offset,
130	130	s->length, dir);
131	131
132	132	return nents;

arch/arc/include/asm/elf.h+0−3

@@ -72,7 +72,4 @@ extern int elf_check_arch(const struct elf32_hdr *); · 71 unmodified lines
72	72	*/
73	73	#define ELF_PLATFORM (NULL)
74	74
75		−#define SET_PERSONALITY(ex) \
76		− set_personality(PER_LINUX \| (current->personality & (~PER_MASK)))
77		−
78	75	#endif

arch/arc/include/asm/entry.h+1−1

@@ -415,7 +415,7 @@ · 414 unmodified lines
415	415	-------------------------------------------------------------/
416	416	.macro SAVE_ALL_EXCEPTION marker
417	417
418		− st \marker, [sp, 8]
	418	+ st \marker, [sp, 8] /* orig_r8 */
419	419	st r0, [sp, 4] /* orig_r0, needed only for sys calls */
420	420
421	421	/* Restore r9 used to code the early prologue */

arch/arc/include/asm/irqflags.h+8−4

@@ -39,7 +39,7 @@ static inline long arch_local_irq_save(void) · 38 unmodified lines
39	39	" flag.nz %0 \n"
40	40	: "=r"(temp), "=r"(flags)
41	41	: "n"((STATUS_E1_MASK \| STATUS_E2_MASK))
42		− : "cc");
	42	+ : "memory", "cc");
43	43
44	44	return flags;
45	45	}
@@ -53,7 +53,8 @@ static inline void arch_local_irq_restore(unsigned long flags) · 7 unmodified lines
53	53	__asm__ __volatile__(
54	54	" flag %0 \n"
55	55	:
56		− : "r"(flags));
	56	+ : "r"(flags)
	57	+ : "memory");
57	58	}
58	59
59	60	/*
@@ -73,7 +74,8 @@ static inline void arch_local_irq_disable(void) · 13 unmodified lines
73	74	" and %0, %0, %1 \n"
74	75	" flag %0 \n"
75	76	: "=&r"(temp)
76		− : "n"(~(STATUS_E1_MASK \| STATUS_E2_MASK)));
	77	+ : "n"(~(STATUS_E1_MASK \| STATUS_E2_MASK))
	78	+ : "memory");
77	79	}
78	80
79	81	/*
@@ -85,7 +87,9 @@ static inline long arch_local_save_flags(void) · 5 unmodified lines
85	87
86	88	__asm__ __volatile__(
87	89	" lr %0, [status32] \n"
88		− : "=&r"(temp));
	90	+ : "=&r"(temp)
	91	+ :
	92	+ : "memory");
89	93
90	94	return temp;
91	95	}

arch/arc/include/asm/kgdb.h+2−4

@@ -13,7 +13,7 @@ · 12 unmodified lines
13	13
14	14	#ifdef CONFIG_KGDB
15	15
16		−#include <asm/user.h>
	16	+#include <asm/ptrace.h>
17	17
18	18	/* to ensure compatibility with Linux 2.6.35, we don't implement the get/set
19	19	* register API yet */
@@ -53,9 +53,7 @@ enum arc700_linux_regnums { · 33 unmodified lines
53	53	};
54	54
55	55	#else
56		−static inline void kgdb_trap(struct pt_regs *regs, int param)
57		−{
58		−}
	56	+#define kgdb_trap(regs, param)
59	57	#endif
60	58
61	59	#endif /* __ARC_KGDB_H__ */

arch/arc/include/asm/ptrace.h+1−1

@@ -123,7 +123,7 @@ static inline long regs_return_value(struct pt_regs *regs) · 122 unmodified lines
123	123	#define orig_r8_IS_SCALL 0x0001
124	124	#define orig_r8_IS_SCALL_RESTARTED 0x0002
125	125	#define orig_r8_IS_BRKPT 0x0004
126		−#define orig_r8_IS_EXCPN 0x0004
	126	+#define orig_r8_IS_EXCPN 0x0008
127	127	#define orig_r8_IS_IRQ1 0x0010
128	128	#define orig_r8_IS_IRQ2 0x0020
129	129

arch/arc/include/asm/syscalls.h+0−2

@@ -16,8 +16,6 @@ · 15 unmodified lines
16	16	#include <linux/types.h>
17	17
18	18	int sys_clone_wrapper(int, int, int, int, int);
19		−int sys_fork_wrapper(void);
20		−int sys_vfork_wrapper(void);
21	19	int sys_cacheflush(uint32_t, uint32_t uint32_t);
22	20	int sys_arc_settls(void *);
23	21	int sys_arc_gettls(void);

arch/arc/include/uapi/asm/ptrace.h+2−2

@@ -28,14 +28,14 @@ · 27 unmodified lines
28	28	*/
29	29	struct user_regs_struct {
30	30
31		− struct scratch {
	31	+ struct {
32	32	long pad;
33	33	long bta, lp_start, lp_end, lp_count;
34	34	long status32, ret, blink, fp, gp;
35	35	long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0;
36	36	long sp;
37	37	} scratch;
38		− struct callee {
	38	+ struct {
39	39	long pad;
40	40	long r25, r24, r23, r22, r21, r20;
41	41	long r19, r18, r17, r16, r15, r14, r13;

arch/arc/kernel/entry.S+1−26

@@ -452,7 +452,7 @@ tracesys: · 451 unmodified lines
452	452	; using ERET won't work since next-PC has already committed
453	453	lr r12, [efa]
454	454	GET_CURR_TASK_FIELD_PTR TASK_THREAD, r11
455		− st r12, [r11, THREAD_FAULT_ADDR]
	455	+ st r12, [r11, THREAD_FAULT_ADDR] ; thread.fault_address
456	456
457	457	; PRE Sys Call Ptrace hook
458	458	mov r0, sp ; pt_regs needed
@@ -792,31 +792,6 @@ ARC_EXIT ret_from_fork · 333 unmodified lines
792	792
793	793	;################### Special Sys Call Wrappers ##########################
794	794
795		−; TBD: call do_fork directly from here
796		−ARC_ENTRY sys_fork_wrapper
797		− SAVE_CALLEE_SAVED_USER
798		− bl @sys_fork
799		− DISCARD_CALLEE_SAVED_USER
800		−
801		− GET_CURR_THR_INFO_FLAGS r10
802		− btst r10, TIF_SYSCALL_TRACE
803		− bnz tracesys_exit
804		−
805		− b ret_from_system_call
806		−ARC_EXIT sys_fork_wrapper
807		−
808		−ARC_ENTRY sys_vfork_wrapper
809		− SAVE_CALLEE_SAVED_USER
810		− bl @sys_vfork
811		− DISCARD_CALLEE_SAVED_USER
812		−
813		− GET_CURR_THR_INFO_FLAGS r10
814		− btst r10, TIF_SYSCALL_TRACE
815		− bnz tracesys_exit
816		−
817		− b ret_from_system_call
818		−ARC_EXIT sys_vfork_wrapper
819		−
820	795	ARC_ENTRY sys_clone_wrapper
821	796	SAVE_CALLEE_SAVED_USER
822	797	bl @sys_clone

arch/arc/kernel/kgdb.c+1−0

@@ -9,6 +9,7 @@ · 8 unmodified lines
9	9	*/
10	10
11	11	#include <linux/kgdb.h>
	12	+#include <linux/sched.h>
12	13	#include <asm/disasm.h>
13	14	#include <asm/cacheflush.h>
14	15

arch/arc/kernel/setup.c+1−3

@@ -232,10 +232,8 @@ char arc_extn_mumbojumbo(int cpu_id, char buf, int len) · 231 unmodified lines
232	232
233	233	n += scnprintf(buf + n, len - n, "\n");
234	234
235		−#ifdef _ASM_GENERIC_UNISTD_H
236	235	n += scnprintf(buf + n, len - n,
237		− "OS ABI [v2]\t: asm-generic/{unistd,stat,fcntl}\n");
238		−#endif
	236	+ "OS ABI [v3]\t: no-legacy-syscalls\n");
239	237
240	238	return buf;
241	239	}

arch/arc/kernel/sys.c+0−2

@@ -6,8 +6,6 @@ · 5 unmodified lines
6	6	#include <asm/syscalls.h>
7	7
8	8	#define sys_clone sys_clone_wrapper
9		−#define sys_fork sys_fork_wrapper
10		−#define sys_vfork sys_vfork_wrapper
11	9
12	10	#undef __SYSCALL
13	11	#define __SYSCALL(nr, call) [nr] = (call),

arch/arm/Kconfig+23−13

@@ -49,7 +49,6 @@ config ARM · 48 unmodified lines
49	49	select HAVE_REGS_AND_STACK_ACCESS_API
50	50	select HAVE_SYSCALL_TRACEPOINTS
51	51	select HAVE_UID16
52		− select HAVE_VIRT_TO_BUS
53	52	select KTIME_SCALAR
54	53	select PERF_USE_VMALLOC
55	54	select RTC_LIB
@@ -556,7 +555,6 @@ config ARCH_IXP4XX · 500 unmodified lines
556	555	config ARCH_DOVE
557	556	bool "Marvell Dove"
558	557	select ARCH_REQUIRE_GPIOLIB
559		− select COMMON_CLK_DOVE
560	558	select CPU_V7
561	559	select GENERIC_CLOCKEVENTS
562	560	select MIGHT_HAVE_PCI
@@ -744,6 +742,7 @@ config ARCH_RPC · 181 unmodified lines
744	742	select NEED_MACH_IO_H
745	743	select NEED_MACH_MEMORY_H
746	744	select NO_IOPORT
	745	+ select VIRT_TO_BUS
747	746	help
748	747	On the Acorn Risc-PC, Linux can support the internal IDE disk and
749	748	CD-ROM interface, serial and parallel port, and the floppy drive.
@@ -879,6 +878,7 @@ config ARCH_SHARK · 129 unmodified lines
879	878	select ISA_DMA
880	879	select NEED_MACH_MEMORY_H
881	880	select PCI
	881	+ select VIRT_TO_BUS
882	882	select ZONE_DMA
883	883	help
884	884	Support for the StrongARM based Digital DNARD machine, also known
@@ -1006,12 +1006,12 @@ config ARCH_MULTI_V4_V5 · 121 unmodified lines
1006	1006	bool
1007	1007
1008	1008	config ARCH_MULTI_V6
1009		− bool "ARMv6 based platforms (ARM11, Scorpion, ...)"
	1009	+ bool "ARMv6 based platforms (ARM11)"
1010	1010	select ARCH_MULTI_V6_V7
1011	1011	select CPU_V6
1012	1012
1013	1013	config ARCH_MULTI_V7
1014		− bool "ARMv7 based platforms (Cortex-A, PJ4, Krait)"
	1014	+ bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)"
1015	1015	default y
1016	1016	select ARCH_MULTI_V6_V7
1017	1017	select ARCH_VEXPRESS
@@ -1183,9 +1183,9 @@ config ARM_NR_BANKS · 165 unmodified lines
1183	1183	default 8
1184	1184
1185	1185	config IWMMXT
1186		− bool "Enable iWMMXt support"
	1186	+ bool "Enable iWMMXt support" if !CPU_PJ4
1187	1187	depends on CPU_XSCALE \|\| CPU_XSC3 \|\| CPU_MOHAWK \|\| CPU_PJ4
1188		− default y if PXA27x \|\| PXA3xx \|\| ARCH_MMP
	1188	+ default y if PXA27x \|\| PXA3xx \|\| ARCH_MMP \|\| CPU_PJ4
1189	1189	help
1190	1190	Enable support for iWMMXt context switching at run time if
1191	1191	running on a CPU that supports it.
@@ -1439,6 +1439,16 @@ config ARM_ERRATA_775420 · 247 unmodified lines
1439	1439	to deadlock. This workaround puts DSB before executing ISB if
1440	1440	an abort may occur on cache maintenance.
1441	1441
	1442	+config ARM_ERRATA_798181
	1443	+ bool "ARM errata: TLBI/DSB failure on Cortex-A15"
	1444	+ depends on CPU_V7 && SMP
	1445	+ help
	1446	+ On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not
	1447	+ adequately shooting down all use of the old entries. This
	1448	+ option enables the Linux kernel workaround for this erratum
	1449	+ which sends an IPI to the CPUs that are running the same ASID
	1450	+ as the one being invalidated.
	1451	+
1442	1452	endmenu
1443	1453
1444	1454	source "arch/arm/common/Kconfig"
@@ -1462,10 +1472,6 @@ config ISA_DMA · 17 unmodified lines
1462	1472	bool
1463	1473	select ISA_DMA_API
1464	1474
1465		−config ARCH_NO_VIRT_TO_BUS
1466		− def_bool y
1467		− depends on !ARCH_RPC && !ARCH_NETWINDER && !ARCH_SHARK
1468		−
1469	1475	# Select ISA DMA interface
1470	1476	config ISA_DMA_API
1471	1477	bool
@@ -1657,13 +1663,16 @@ config LOCAL_TIMERS · 185 unmodified lines
1657	1663	accounting to be spread across the timer interval, preventing a
1658	1664	"thundering herd" at every timer tick.
1659	1665
	1666	+# The GPIO number here must be sorted by descending number. In case of
	1667	+# a multiplatform kernel, we just want the highest value required by the
	1668	+# selected platforms.
1660	1669	config ARCH_NR_GPIO
1661	1670	int
1662	1671	default 1024 if ARCH_SHMOBILE \|\| ARCH_TEGRA
1663		− default 355 if ARCH_U8500
1664		− default 264 if MACH_H4700
1665	1672	default 512 if SOC_OMAP5
	1673	+ default 355 if ARCH_U8500
1666	1674	default 288 if ARCH_VT8500 \|\| ARCH_SUNXI
	1675	+ default 264 if MACH_H4700
1667	1676	default 0
1668	1677	help
1669	1678	Maximum number of GPIOs in the system.
@@ -1887,8 +1896,9 @@ config XEN_DOM0 · 217 unmodified lines
1887	1896
1888	1897	config XEN
1889	1898	bool "Xen guest support on ARM (EXPERIMENTAL)"
1890		− depends on ARM && OF
	1899	+ depends on ARM && AEABI && OF
1891	1900	depends on CPU_V7 && !CPU_V6
	1901	+ depends on !GENERIC_ATOMIC64
1892	1902	help
1893	1903	Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
1894	1904

arch/arm/Kconfig.debug+2−1

@@ -492,9 +492,10 @@ config DEBUG_IMX_UART_PORT · 491 unmodified lines
492	492	DEBUG_IMX31_UART \|\| \
493	493	DEBUG_IMX35_UART \|\| \
494	494	DEBUG_IMX51_UART \|\| \
495		− DEBUG_IMX50_IMX53_UART \|\| \
	495	+ DEBUG_IMX53_UART \|\| \
496	496	DEBUG_IMX6Q_UART
497	497	default 1
	498	+ depends on ARCH_MXC
498	499	help
499	500	Choose UART port on which kernel low-level debug messages
500	501	should be output.

arch/arm/boot/Makefile+1−1

@@ -115,4 +115,4 @@ i: · 114 unmodified lines
115	115	$(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \
116	116	$(obj)/Image System.map "$(INSTALL_PATH)"
117	117
118		−subdir- := bootp compressed
	118	+subdir- := bootp compressed dts

arch/arm/boot/dts/armada-370-mirabox.dts+1−1

@@ -54,7 +54,7 @@ · 53 unmodified lines
54	54	};
55	55
56	56	mvsdio@d00d4000 {
57		− pinctrl-0 = <&sdio_pins2>;
	57	+ pinctrl-0 = <&sdio_pins3>;
58	58	pinctrl-names = "default";
59	59	status = "okay";
60	60	/*

arch/arm/boot/dts/armada-370-rd.dts+8−0

@@ -64,5 +64,13 @@ · 63 unmodified lines
64	64	status = "okay";
65	65	/* No CD or WP GPIOs */
66	66	};
	67	+
	68	+ usb@d0050000 {
	69	+ status = "okay";
	70	+ };
	71	+
	72	+ usb@d0051000 {
	73	+ status = "okay";
	74	+ };
67	75	};
68	76	};

arch/arm/boot/dts/armada-370-xp.dtsi+2−3

@@ -31,7 +31,6 @@ · 30 unmodified lines
31	31	mpic: interrupt-controller@d0020000 {
32	32	compatible = "marvell,mpic";
33	33	#interrupt-cells = <1>;
34		− #address-cells = <1>;
35	34	#size-cells = <1>;
36	35	interrupt-controller;
37	36	};
@@ -54,7 +53,7 @@ · 16 unmodified lines
54	53	reg = <0xd0012000 0x100>;
55	54	reg-shift = <2>;
56	55	interrupts = <41>;
57		− reg-io-width = <4>;
	56	+ reg-io-width = <1>;
58	57	status = "disabled";
59	58	};
60	59	serial@d0012100 {
@@ -62,7 +61,7 @@ · 1 unmodified line
62	61	reg = <0xd0012100 0x100>;
63	62	reg-shift = <2>;
64	63	interrupts = <42>;
65		− reg-io-width = <4>;
	64	+ reg-io-width = <1>;
66	65	status = "disabled";
67	66	};
68	67

arch/arm/boot/dts/armada-370.dtsi+6−0

@@ -59,6 +59,12 @@ · 58 unmodified lines
59	59	"mpp50", "mpp51", "mpp52";
60	60	marvell,function = "sd0";
61	61	};
	62	+
	63	+ sdio_pins3: sdio-pins3 {
	64	+ marvell,pins = "mpp48", "mpp49", "mpp50",
	65	+ "mpp51", "mpp52", "mpp53";
	66	+ marvell,function = "sd0";
	67	+ };
62	68	};
63	69
64	70	gpio0: gpio@d0018100 {

arch/arm/boot/dts/armada-xp.dtsi+2−2

@@ -46,7 +46,7 @@ · 45 unmodified lines
46	46	reg = <0xd0012200 0x100>;
47	47	reg-shift = <2>;
48	48	interrupts = <43>;
49		− reg-io-width = <4>;
	49	+ reg-io-width = <1>;
50	50	status = "disabled";
51	51	};
52	52	serial@d0012300 {
@@ -54,7 +54,7 @@ · 1 unmodified line
54	54	reg = <0xd0012300 0x100>;
55	55	reg-shift = <2>;
56	56	interrupts = <44>;
57		− reg-io-width = <4>;
	57	+ reg-io-width = <1>;
58	58	status = "disabled";
59	59	};
60	60

arch/arm/boot/dts/at91sam9x5.dtsi+26−2

@@ -238,8 +238,32 @@ · 237 unmodified lines
238	238	nand {
239	239	pinctrl_nand: nand-0 {
240	240	atmel,pins =
241		− <3 4 0x0 0x1 /* PD5 gpio RDY pin pull_up */
242		− 3 5 0x0 0x1>; /* PD4 gpio enable pin pull_up */
	241	+ <3 0 0x1 0x0 /* PD0 periph A Read Enable */
	242	+ 3 1 0x1 0x0 /* PD1 periph A Write Enable */
	243	+ 3 2 0x1 0x0 /* PD2 periph A Address Latch Enable */
	244	+ 3 3 0x1 0x0 /* PD3 periph A Command Latch Enable */
	245	+ 3 4 0x0 0x1 /* PD4 gpio Chip Enable pin pull_up */
	246	+ 3 5 0x0 0x1 /* PD5 gpio RDY/BUSY pin pull_up */
	247	+ 3 6 0x1 0x0 /* PD6 periph A Data bit 0 */
	248	+ 3 7 0x1 0x0 /* PD7 periph A Data bit 1 */
	249	+ 3 8 0x1 0x0 /* PD8 periph A Data bit 2 */
	250	+ 3 9 0x1 0x0 /* PD9 periph A Data bit 3 */
	251	+ 3 10 0x1 0x0 /* PD10 periph A Data bit 4 */
	252	+ 3 11 0x1 0x0 /* PD11 periph A Data bit 5 */
	253	+ 3 12 0x1 0x0 /* PD12 periph A Data bit 6 */
	254	+ 3 13 0x1 0x0>; /* PD13 periph A Data bit 7 */
	255	+ };
	256	+
	257	+ pinctrl_nand_16bits: nand_16bits-0 {
	258	+ atmel,pins =
	259	+ <3 14 0x1 0x0 /* PD14 periph A Data bit 8 */
	260	+ 3 15 0x1 0x0 /* PD15 periph A Data bit 9 */
	261	+ 3 16 0x1 0x0 /* PD16 periph A Data bit 10 */
	262	+ 3 17 0x1 0x0 /* PD17 periph A Data bit 11 */
	263	+ 3 18 0x1 0x0 /* PD18 periph A Data bit 12 */
	264	+ 3 19 0x1 0x0 /* PD19 periph A Data bit 13 */
	265	+ 3 20 0x1 0x0 /* PD20 periph A Data bit 14 */
	266	+ 3 21 0x1 0x0>; /* PD21 periph A Data bit 15 */
243	267	};
244	268	};
245	269

arch/arm/boot/dts/bcm2835.dtsi+1−1

@@ -105,7 +105,7 @@ · 104 unmodified lines
105	105	compatible = "fixed-clock";
106	106	reg = <1>;
107	107	#clock-cells = <0>;
108		− clock-frequency = <150000000>;
	108	+ clock-frequency = <250000000>;
109	109	};
110	110	};
111	111	};

arch/arm/boot/dts/dbx5x0.dtsi+3−4

@@ -191,8 +191,8 @@ · 190 unmodified lines
191	191
192	192	prcmu: prcmu@80157000 {
193	193	compatible = "stericsson,db8500-prcmu";
194		− reg = <0x80157000 0x1000>;
195		− reg-names = "prcmu";
	194	+ reg = <0x80157000 0x1000>, <0x801b0000 0x8000>, <0x801b8000 0x1000>;
	195	+ reg-names = "prcmu", "prcmu-tcpm", "prcmu-tcdm";
196	196	interrupts = <0 47 0x4>;
197	197	#address-cells = <1>;
198	198	#size-cells = <1>;
@@ -319,9 +319,8 @@ · 120 unmodified lines
319	319	};
320	320	};
321	321
322		− ab8500@5 {
	322	+ ab8500 {
323	323	compatible = "stericsson,ab8500";
324		− reg = <5>; /* mailbox 5 is i2c */
325	324	interrupt-parent = <&intc>;
326	325	interrupts = <0 40 0x4>;
327	326	interrupt-controller;

arch/arm/boot/dts/dove.dtsi+5−0

@@ -197,6 +197,11 @@ · 196 unmodified lines
197	197	status = "disabled";
198	198	};
199	199
	200	+ rtc@d8500 {
	201	+ compatible = "marvell,orion-rtc";
	202	+ reg = <0xd8500 0x20>;
	203	+ };
	204	+
200	205	crypto: crypto@30000 {
201	206	compatible = "marvell,orion-crypto";
202	207	reg = <0x30000 0x10000>,

arch/arm/boot/dts/exynos4.dtsi+9−0

@@ -275,18 +275,27 @@ · 274 unmodified lines
275	275	compatible = "arm,pl330", "arm,primecell";
276	276	reg = <0x12680000 0x1000>;
277	277	interrupts = <0 35 0>;
	278	+ #dma-cells = <1>;
	279	+ #dma-channels = <8>;
	280	+ #dma-requests = <32>;
278	281	};
279	282
280	283	pdma1: pdma@12690000 {
281	284	compatible = "arm,pl330", "arm,primecell";
282	285	reg = <0x12690000 0x1000>;
283	286	interrupts = <0 36 0>;
	287	+ #dma-cells = <1>;
	288	+ #dma-channels = <8>;
	289	+ #dma-requests = <32>;
284	290	};
285	291
286	292	mdma1: mdma@12850000 {
287	293	compatible = "arm,pl330", "arm,primecell";
288	294	reg = <0x12850000 0x1000>;
289	295	interrupts = <0 34 0>;
	296	+ #dma-cells = <1>;
	297	+ #dma-channels = <8>;
	298	+ #dma-requests = <1>;
290	299	};
291	300	};
292	301	};

arch/arm/boot/dts/exynos5440.dtsi+6−0

@@ -142,12 +142,18 @@ · 141 unmodified lines
142	142	compatible = "arm,pl330", "arm,primecell";
143	143	reg = <0x120000 0x1000>;
144	144	interrupts = <0 34 0>;
	145	+ #dma-cells = <1>;
	146	+ #dma-channels = <8>;
	147	+ #dma-requests = <32>;
145	148	};
146	149
147	150	pdma1: pdma@121B0000 {
148	151	compatible = "arm,pl330", "arm,primecell";
149	152	reg = <0x121000 0x1000>;
150	153	interrupts = <0 35 0>;
	154	+ #dma-cells = <1>;
	155	+ #dma-channels = <8>;
	156	+ #dma-requests = <32>;
151	157	};
152	158	};
153	159

arch/arm/boot/dts/href.dtsi+1−1

@@ -221,7 +221,7 @@ · 220 unmodified lines
221	221	};
222	222	};
223	223
224		− ab8500@5 {
	224	+ ab8500 {
225	225	ab8500-regulators {
226	226	ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
227	227	regulator-name = "V-DISPLAY";

arch/arm/boot/dts/hrefv60plus.dts+1−1

@@ -158,7 +158,7 @@ · 157 unmodified lines
158	158	};
159	159	};
160	160
161		− ab8500@5 {
	161	+ ab8500 {
162	162	ab8500-regulators {
163	163	ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
164	164	regulator-name = "V-DISPLAY";

arch/arm/boot/dts/imx28-m28evk.dts+0−1

@@ -152,7 +152,6 @@ · 151 unmodified lines
152	152	i2c0: i2c@80058000 {
153	153	pinctrl-names = "default";
154	154	pinctrl-0 = <&i2c0_pins_a>;
155		− clock-frequency = <400000>;
156	155	status = "okay";
157	156
158	157	sgtl5000: codec@0a {

arch/arm/boot/dts/imx28-sps1.dts+0−1

@@ -70,7 +70,6 @@ · 69 unmodified lines
70	70	i2c0: i2c@80058000 {
71	71	pinctrl-names = "default";
72	72	pinctrl-0 = <&i2c0_pins_a>;
73		− clock-frequency = <400000>;
74	73	status = "okay";
75	74
76	75	rtc: rtc@51 {

arch/arm/boot/dts/imx53-mba53.dts+1−2

@@ -42,10 +42,9 @@ · 41 unmodified lines
42	42	fsl,pins = <689 0x10000 /* DISP1_DRDY */
43	43	482 0x10000 /* DISP1_HSYNC */
44	44	489 0x10000 /* DISP1_VSYNC */
45		− 684 0x10000 /* DISP1_DAT_0 */
46	45	515 0x10000 /* DISP1_DAT_22 */
47	46	523 0x10000 /* DISP1_DAT_23 */
48		− 543 0x10000 /* DISP1_DAT_21 */
	47	+ 545 0x10000 /* DISP1_DAT_21 */
49	48	553 0x10000 /* DISP1_DAT_20 */
50	49	558 0x10000 /* DISP1_DAT_19 */
51	50	564 0x10000 /* DISP1_DAT_18 */

arch/arm/boot/dts/imx6qdl.dtsi+1−0

@@ -91,6 +91,7 @@ · 90 unmodified lines
91	91	compatible = "arm,cortex-a9-twd-timer";
92	92	reg = <0x00a00600 0x20>;
93	93	interrupts = <1 13 0xf01>;
	94	+ clocks = <&clks 15>;
94	95	};
95	96
96	97	L2: l2-cache@00a02000 {

arch/arm/boot/dts/kirkwood-dns320.dts+0−2

@@ -42,12 +42,10 @@ · 41 unmodified lines
42	42
43	43	ocp@f1000000 {
44	44	serial@12000 {
45		− clock-frequency = <166666667>;
46	45	status = "okay";
47	46	};
48	47
49	48	serial@12100 {
50		− clock-frequency = <166666667>;
51	49	status = "okay";
52	50	};
53	51	};

arch/arm/boot/dts/kirkwood-dns325.dts+0−1

@@ -50,7 +50,6 @@ · 49 unmodified lines
50	50	};
51	51	};
52	52	serial@12000 {
53		− clock-frequency = <200000000>;
54	53	status = "okay";
55	54	};
56	55	};

arch/arm/boot/dts/kirkwood-dockstar.dts+0−1

@@ -37,7 +37,6 @@ · 36 unmodified lines
37	37	};
38	38	};
39	39	serial@12000 {
40		− clock-frequency = <200000000>;
41	40	status = "ok";
42	41	};
43	42

arch/arm/boot/dts/kirkwood-dreamplug.dts+0−1

@@ -38,7 +38,6 @@ · 37 unmodified lines
38	38	};
39	39	};
40	40	serial@12000 {
41		− clock-frequency = <200000000>;
42	41	status = "ok";
43	42	};
44	43

arch/arm/boot/dts/kirkwood-goflexnet.dts+1−1

@@ -73,11 +73,11 @@ · 72 unmodified lines
73	73	};
74	74	};
75	75	serial@12000 {
76		− clock-frequency = <200000000>;
77	76	status = "ok";
78	77	};
79	78
80	79	nand@3000000 {
	80	+ chip-delay = <40>;
81	81	status = "okay";
82	82
83	83	partition@0 {

arch/arm/boot/dts/kirkwood-ib62x0.dts+0−1

@@ -51,7 +51,6 @@ · 50 unmodified lines
51	51	};
52	52	};
53	53	serial@12000 {
54		− clock-frequency = <200000000>;
55	54	status = "okay";
56	55	};
57	56

arch/arm/boot/dts/kirkwood-iconnect.dts+0−1

@@ -78,7 +78,6 @@ · 77 unmodified lines
78	78	};
79	79	};
80	80	serial@12000 {
81		− clock-frequency = <200000000>;
82	81	status = "ok";
83	82	};
84	83

arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts+7−8

@@ -96,11 +96,11 @@ · 95 unmodified lines
96	96	marvell,function = "gpio";
97	97	};
98	98	pmx_led_rebuild_brt_ctrl_1: pmx-led-rebuild-brt-ctrl-1 {
99		− marvell,pins = "mpp44";
	99	+ marvell,pins = "mpp46";
100	100	marvell,function = "gpio";
101	101	};
102	102	pmx_led_rebuild_brt_ctrl_2: pmx-led-rebuild-brt-ctrl-2 {
103		− marvell,pins = "mpp45";
	103	+ marvell,pins = "mpp47";
104	104	marvell,function = "gpio";
105	105	};
106	106
@@ -115,7 +115,6 @@ · 8 unmodified lines
115	115	};
116	116
117	117	serial@12000 {
118		− clock-frequency = <200000000>;
119	118	status = "ok";
120	119	};
121	120
@@ -158,14 +157,14 @@ · 36 unmodified lines
158	157	gpios = <&gpio0 16 0>;
159	158	linux,default-trigger = "default-on";
160	159	};
161		− health_led1 {
	160	+ rebuild_led {
	161	+ label = "status:white:rebuild_led";
	162	+ gpios = <&gpio1 4 0>;
	163	+ };
	164	+ health_led {
162	165	label = "status:red:health_led";
163	166	gpios = <&gpio1 5 0>;
164	167	};
165		− health_led2 {
166		− label = "status:white:health_led";
167		− gpios = <&gpio1 4 0>;
168		− };
169	168	backup_led {
170	169	label = "status:blue:backup_led";
171	170	gpios = <&gpio0 15 0>;

arch/arm/boot/dts/kirkwood-km_kirkwood.dts+0−1

@@ -34,7 +34,6 @@ · 33 unmodified lines
34	34	};
35	35
36	36	serial@12000 {
37		− clock-frequency = <200000000>;
38	37	status = "ok";
39	38	};
40	39

arch/arm/boot/dts/kirkwood-lschlv2.dts+0−1

@@ -13,7 +13,6 @@ · 12 unmodified lines
13	13
14	14	ocp@f1000000 {
15	15	serial@12000 {
16		− clock-frequency = <166666667>;
17	16	status = "okay";
18	17	};
19	18	};

arch/arm/boot/dts/kirkwood-lsxhl.dts+0−1

@@ -13,7 +13,6 @@ · 12 unmodified lines
13	13
14	14	ocp@f1000000 {
15	15	serial@12000 {
16		− clock-frequency = <200000000>;
17	16	status = "okay";
18	17	};
19	18	};

arch/arm/boot/dts/kirkwood-mplcec4.dts+0−1

@@ -90,7 +90,6 @@ · 89 unmodified lines
90	90	};
91	91
92	92	serial@12000 {
93		− clock-frequency = <200000000>;
94	93	status = "ok";
95	94	};
96	95

arch/arm/boot/dts/kirkwood-ns2-common.dtsi+0−1

@@ -23,7 +23,6 @@ · 22 unmodified lines
23	23	};
24	24
25	25	serial@12000 {
26		− clock-frequency = <166666667>;
27	26	status = "okay";
28	27	};
29	28

arch/arm/boot/dts/kirkwood-nsa310.dts+0−1

@@ -117,7 +117,6 @@ · 116 unmodified lines
117	117	};
118	118
119	119	serial@12000 {
120		− clock-frequency = <200000000>;
121	120	status = "ok";
122	121	};
123	122

arch/arm/boot/dts/kirkwood-openblocks_a6.dts+0−2

@@ -18,12 +18,10 @@ · 17 unmodified lines
18	18
19	19	ocp@f1000000 {
20	20	serial@12000 {
21		− clock-frequency = <200000000>;
22	21	status = "ok";
23	22	};
24	23
25	24	serial@12100 {
26		− clock-frequency = <200000000>;
27	25	status = "ok";
28	26	};
29	27

arch/arm/boot/dts/kirkwood-topkick.dts+0−1

@@ -108,7 +108,6 @@ · 107 unmodified lines
108	108	};
109	109
110	110	serial@12000 {
111		− clock-frequency = <200000000>;
112	111	status = "ok";
113	112	};
114	113

arch/arm/boot/dts/kirkwood.dtsi+3−2

@@ -38,6 +38,7 @@ · 37 unmodified lines
38	38	interrupt-controller;
39	39	#interrupt-cells = <2>;
40	40	interrupts = <35>, <36>, <37>, <38>;
	41	+ clocks = <&gate_clk 7>;
41	42	};
42	43
43	44	gpio1: gpio@10140 {
@@ -49,6 +50,7 @@ · 5 unmodified lines
49	50	interrupt-controller;
50	51	#interrupt-cells = <2>;
51	52	interrupts = <39>, <40>, <41>;
	53	+ clocks = <&gate_clk 7>;
52	54	};
53	55
54	56	serial@12000 {
@@ -57,7 +59,6 @@ · 2 unmodified lines
57	59	reg-shift = <2>;
58	60	interrupts = <33>;
59	61	clocks = <&gate_clk 7>;
60		− /* set clock-frequency in board dts */
61	62	status = "disabled";
62	63	};
63	64
@@ -67,7 +68,6 @@ · 3 unmodified lines
67	68	reg-shift = <2>;
68	69	interrupts = <34>;
69	70	clocks = <&gate_clk 7>;
70		− /* set clock-frequency in board dts */
71	71	status = "disabled";
72	72	};
73	73
@@ -75,6 +75,7 @@ · 1 unmodified line
75	75	compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
76	76	reg = <0x10300 0x20>;
77	77	interrupts = <53>;
	78	+ clocks = <&gate_clk 7>;
78	79	};
79	80
80	81	spi@10600 {

arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts+1−1

@@ -11,7 +11,7 @@ · 10 unmodified lines
11	11
12	12	/ {
13	13	model = "LaCie Ethernet Disk mini V2";
14		− compatible = "lacie,ethernet-disk-mini-v2", "marvell-orion5x-88f5182", "marvell,orion5x";
	14	+ compatible = "lacie,ethernet-disk-mini-v2", "marvell,orion5x-88f5182", "marvell,orion5x";
15	15
16	16	memory {
17	17	reg = <0x00000000 0x4000000>; /* 64 MB */

arch/arm/boot/dts/orion5x.dtsi+7−2

@@ -13,6 +13,9 @@ · 12 unmodified lines
13	13	compatible = "marvell,orion5x";
14	14	interrupt-parent = <&intc>;
15	15
	16	+ aliases {
	17	+ gpio0 = &gpio0;
	18	+ };
16	19	intc: interrupt-controller {
17	20	compatible = "marvell,orion-intc", "marvell,intc";
18	21	interrupt-controller;
@@ -32,7 +35,9 @@ · 13 unmodified lines
32	35	#gpio-cells = <2>;
33	36	gpio-controller;
34	37	reg = <0x10100 0x40>;
35		− ngpio = <32>;
	38	+ ngpios = <32>;
	39	+ interrupt-controller;
	40	+ #interrupt-cells = <2>;
36	41	interrupts = <6>, <7>, <8>, <9>;
37	42	};
38	43
@@ -91,7 +96,7 @@ · 52 unmodified lines
91	96	reg = <0x90000 0x10000>,
92	97	<0xf2200000 0x800>;
93	98	reg-names = "regs", "sram";
94		− interrupts = <22>;
	99	+ interrupts = <28>;
95	100	status = "okay";
96	101	};
97	102	};

arch/arm/boot/dts/snowball.dts+1−1

@@ -298,7 +298,7 @@ · 297 unmodified lines
298	298	};
299	299	};
300	300
301		− ab8500@5 {
	301	+ ab8500 {
302	302	ab8500-regulators {
303	303	ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
304	304	regulator-name = "V-DISPLAY";

arch/arm/boot/dts/socfpga.dtsi+3−0

@@ -75,6 +75,9 @@ · 74 unmodified lines
75	75	compatible = "arm,pl330", "arm,primecell";
76	76	reg = <0xffe01000 0x1000>;
77	77	interrupts = <0 180 4>;
	78	+ #dma-cells = <1>;
	79	+ #dma-channels = <8>;
	80	+ #dma-requests = <32>;
78	81	};
79	82	};
80	83

arch/arm/boot/dts/tegra20.dtsi+2−1

@@ -118,6 +118,7 @@ · 117 unmodified lines
118	118	compatible = "arm,cortex-a9-twd-timer";
119	119	reg = <0x50040600 0x20>;
120	120	interrupts = <1 13 0x304>;
	121	+ clocks = <&tegra_car 132>;
121	122	};
122	123
123	124	intc: interrupt-controller {
@@ -384,7 +385,7 @@ · 260 unmodified lines
384	385
385	386	spi@7000d800 {
386	387	compatible = "nvidia,tegra20-slink";
387		− reg = <0x7000d480 0x200>;
	388	+ reg = <0x7000d800 0x200>;
388	389	interrupts = <0 83 0x04>;
389	390	nvidia,dma-request-selector = <&apbdma 17>;
390	391	#address-cells = <1>;

arch/arm/boot/dts/tegra30.dtsi+2−1

@@ -119,6 +119,7 @@ · 118 unmodified lines
119	119	compatible = "arm,cortex-a9-twd-timer";
120	120	reg = <0x50040600 0x20>;
121	121	interrupts = <1 13 0xf04>;
	122	+ clocks = <&tegra_car 214>;
122	123	};
123	124
124	125	intc: interrupt-controller {
@@ -371,7 +372,7 @@ · 246 unmodified lines
371	372
372	373	spi@7000d800 {
373	374	compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
374		− reg = <0x7000d480 0x200>;
	375	+ reg = <0x7000d800 0x200>;
375	376	interrupts = <0 83 0x04>;
376	377	nvidia,dma-request-selector = <&apbdma 17>;
377	378	#address-cells = <1>;

arch/arm/configs/mxs_defconfig+1−0

@@ -116,6 +116,7 @@ CONFIG_SND_SOC=y · 115 unmodified lines
116	116	CONFIG_SND_MXS_SOC=y
117	117	CONFIG_SND_SOC_MXS_SGTL5000=y
118	118	CONFIG_USB=y
	119	+CONFIG_USB_EHCI_HCD=y
119	120	CONFIG_USB_CHIPIDEA=y
120	121	CONFIG_USB_CHIPIDEA_HOST=y
121	122	CONFIG_USB_STORAGE=y

arch/arm/configs/omap2plus_defconfig+2−0

@@ -126,6 +126,8 @@ CONFIG_INPUT_MISC=y · 125 unmodified lines
126	126	CONFIG_INPUT_TWL4030_PWRBUTTON=y
127	127	CONFIG_VT_HW_CONSOLE_BINDING=y
128	128	# CONFIG_LEGACY_PTYS is not set
	129	+CONFIG_SERIAL_8250=y
	130	+CONFIG_SERIAL_8250_CONSOLE=y
129	131	CONFIG_SERIAL_8250_NR_UARTS=32
130	132	CONFIG_SERIAL_8250_EXTENDED=y
131	133	CONFIG_SERIAL_8250_MANY_PORTS=y

arch/arm/include/asm/delay.h+1−1

@@ -24,7 +24,7 @@ extern struct arm_delay_ops { · 23 unmodified lines
24	24	void (*delay)(unsigned long);
25	25	void (*const_udelay)(unsigned long);
26	26	void (*udelay)(unsigned long);
27		− bool const_clock;
	27	+ unsigned long ticks_per_jiffy;
28	28	} arm_delay_ops;
29	29
30	30	#define __delay(n) arm_delay_ops.delay(n)

arch/arm/include/asm/glue-cache.h+0−8

@@ -19,14 +19,6 @@ · 18 unmodified lines
19	19	#undef _CACHE
20	20	#undef MULTI_CACHE
21	21
22		−#if defined(CONFIG_CPU_CACHE_V3)
23		−# ifdef _CACHE
24		−# define MULTI_CACHE 1
25		−# else
26		−# define _CACHE v3
27		−# endif
28		−#endif
29		−
30	22	#if defined(CONFIG_CPU_CACHE_V4)
31	23	# ifdef _CACHE
32	24	# define MULTI_CACHE 1

arch/arm/include/asm/hardware/iop3xx.h+1−1

@@ -37,7 +37,7 @@ extern int iop3xx_get_init_atu(void); · 36 unmodified lines
37	37	* IOP3XX processor registers
38	38	*/
39	39	#define IOP3XX_PERIPHERAL_PHYS_BASE 0xffffe000
40		−#define IOP3XX_PERIPHERAL_VIRT_BASE 0xfeffe000
	40	+#define IOP3XX_PERIPHERAL_VIRT_BASE 0xfedfe000
41	41	#define IOP3XX_PERIPHERAL_SIZE 0x00002000
42	42	#define IOP3XX_PERIPHERAL_UPPER_PA (IOP3XX_PERIPHERAL_PHYS_BASE +\
43	43	IOP3XX_PERIPHERAL_SIZE - 1)

arch/arm/include/asm/highmem.h+7−0

@@ -41,6 +41,13 @@ extern void kunmap_high(struct page *page); · 40 unmodified lines
41	41	#endif
42	42	#endif
43	43
	44	+/*
	45	+ * Needed to be able to broadcast the TLB invalidation for kmap.
	46	+ */
	47	+#ifdef CONFIG_ARM_ERRATA_798181
	48	+#undef ARCH_NEEDS_KMAP_HIGH_GET
	49	+#endif
	50	+
44	51	#ifdef ARCH_NEEDS_KMAP_HIGH_GET
45	52	extern void kmap_high_get(struct page page);
46	53	#else

arch/arm/include/asm/mmu_context.h+2−0

@@ -27,6 +27,8 @@ void __check_vmalloc_seq(struct mm_struct *mm); · 26 unmodified lines
27	27	void check_and_switch_context(struct mm_struct mm, struct task_struct tsk);
28	28	#define init_new_context(tsk,mm) ({ atomic64_set(&mm->context.id, 0); 0; })
29	29
	30	+DECLARE_PER_CPU(atomic64_t, active_asids);
	31	+
30	32	#else /* !CONFIG_CPU_HAS_ASID */
31	33
32	34	#ifdef CONFIG_MMU

arch/arm/include/asm/pgtable-3level.h+1−1

@@ -111,7 +111,7 @@ · 110 unmodified lines
111	111	#define L_PTE_S2_MT_WRITETHROUGH (_AT(pteval_t, 0xa) << 2) /* MemAttr[3:0] */
112	112	#define L_PTE_S2_MT_WRITEBACK (_AT(pteval_t, 0xf) << 2) /* MemAttr[3:0] */
113	113	#define L_PTE_S2_RDONLY (_AT(pteval_t, 1) << 6) /* HAP[1] */
114		−#define L_PTE_S2_RDWR (_AT(pteval_t, 2) << 6) /* HAP[2:1] */
	114	+#define L_PTE_S2_RDWR (_AT(pteval_t, 3) << 6) /* HAP[2:1] */
115	115
116	116	/*
117	117	* Hyp-mode PL2 PTE definitions for LPAE.

arch/arm/include/asm/tlbflush.h+17−9

@@ -14,7 +14,6 @@ · 13 unmodified lines
14	14
15	15	#include <asm/glue.h>
16	16
17		−#define TLB_V3_PAGE (1 << 0)
18	17	#define TLB_V4_U_PAGE (1 << 1)
19	18	#define TLB_V4_D_PAGE (1 << 2)
20	19	#define TLB_V4_I_PAGE (1 << 3)
@@ -22,7 +21,6 @@ · 1 unmodified line
22	21	#define TLB_V6_D_PAGE (1 << 5)
23	22	#define TLB_V6_I_PAGE (1 << 6)
24	23
25		−#define TLB_V3_FULL (1 << 8)
26	24	#define TLB_V4_U_FULL (1 << 9)
27	25	#define TLB_V4_D_FULL (1 << 10)
28	26	#define TLB_V4_I_FULL (1 << 11)
@@ -52,7 +50,6 @@ · 23 unmodified lines
52	50	* =============
53	51	*
54	52	* We have the following to choose from:
55		− * v3 - ARMv3
56	53	* v4 - ARMv4 without write buffer
57	54	* v4wb - ARMv4 with write buffer without I TLB flush entry instruction
58	55	* v4wbi - ARMv4 with write buffer with I TLB flush entry instruction
@@ -330,7 +327,6 @@ static inline void local_flush_tlb_all(void) · 271 unmodified lines
330	327	if (tlb_flag(TLB_WB))
331	328	dsb();
332	329
333		− tlb_op(TLB_V3_FULL, "c6, c0, 0", zero);
334	330	tlb_op(TLB_V4_U_FULL \| TLB_V6_U_FULL, "c8, c7, 0", zero);
335	331	tlb_op(TLB_V4_D_FULL \| TLB_V6_D_FULL, "c8, c6, 0", zero);
336	332	tlb_op(TLB_V4_I_FULL \| TLB_V6_I_FULL, "c8, c5, 0", zero);
@@ -351,9 +347,8 @@ static inline void local_flush_tlb_mm(struct mm_struct *mm) · 14 unmodified lines
351	347	if (tlb_flag(TLB_WB))
352	348	dsb();
353	349
354		− if (possible_tlb_flags & (TLB_V3_FULL\|TLB_V4_U_FULL\|TLB_V4_D_FULL\|TLB_V4_I_FULL)) {
	350	+ if (possible_tlb_flags & (TLB_V4_U_FULL\|TLB_V4_D_FULL\|TLB_V4_I_FULL)) {
355	351	if (cpumask_test_cpu(get_cpu(), mm_cpumask(mm))) {
356		− tlb_op(TLB_V3_FULL, "c6, c0, 0", zero);
357	352	tlb_op(TLB_V4_U_FULL, "c8, c7, 0", zero);
358	353	tlb_op(TLB_V4_D_FULL, "c8, c6, 0", zero);
359	354	tlb_op(TLB_V4_I_FULL, "c8, c5, 0", zero);
@@ -385,9 +380,8 @@ local_flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr) · 25 unmodified lines
385	380	if (tlb_flag(TLB_WB))
386	381	dsb();
387	382
388		− if (possible_tlb_flags & (TLB_V3_PAGE\|TLB_V4_U_PAGE\|TLB_V4_D_PAGE\|TLB_V4_I_PAGE\|TLB_V4_I_FULL) &&
	383	+ if (possible_tlb_flags & (TLB_V4_U_PAGE\|TLB_V4_D_PAGE\|TLB_V4_I_PAGE\|TLB_V4_I_FULL) &&
389	384	cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) {
390		− tlb_op(TLB_V3_PAGE, "c6, c0, 0", uaddr);
391	385	tlb_op(TLB_V4_U_PAGE, "c8, c7, 1", uaddr);
392	386	tlb_op(TLB_V4_D_PAGE, "c8, c6, 1", uaddr);
393	387	tlb_op(TLB_V4_I_PAGE, "c8, c5, 1", uaddr);
@@ -418,7 +412,6 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr) · 24 unmodified lines
418	412	if (tlb_flag(TLB_WB))
419	413	dsb();
420	414
421		− tlb_op(TLB_V3_PAGE, "c6, c0, 0", kaddr);
422	415	tlb_op(TLB_V4_U_PAGE, "c8, c7, 1", kaddr);
423	416	tlb_op(TLB_V4_D_PAGE, "c8, c6, 1", kaddr);
424	417	tlb_op(TLB_V4_I_PAGE, "c8, c5, 1", kaddr);
@@ -450,6 +443,21 @@ static inline void local_flush_bp_all(void) · 25 unmodified lines
450	443	isb();
451	444	}
452	445
	446	+#ifdef CONFIG_ARM_ERRATA_798181
	447	+static inline void dummy_flush_tlb_a15_erratum(void)
	448	+{
	449	+ /*
	450	+ * Dummy TLBIMVAIS. Using the unmapped address 0 and ASID 0.
	451	+ */
	452	+ asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (0));
	453	+ dsb();
	454	+}
	455	+#else
	456	+static inline void dummy_flush_tlb_a15_erratum(void)
	457	+{
	458	+}
	459	+#endif
	460	+
453	461	/*
454	462	* flush_pmd_entry
455	463	*

arch/arm/include/asm/xen/events.h+4−21

@@ -2,6 +2,7 @@ · 1 unmodified line
2	2	#define _ASM_ARM_XEN_EVENTS_H
3	3
4	4	#include <asm/ptrace.h>
	5	+#include <asm/atomic.h>
5	6
6	7	enum ipi_vector {
7	8	XEN_PLACEHOLDER_VECTOR,
@@ -15,26 +16,8 @@ static inline int xen_irqs_disabled(struct pt_regs *regs) · 7 unmodified lines
15	16	return raw_irqs_disabled_flags(regs->ARM_cpsr);
16	17	}
17	18
18		−/*
19		− * We cannot use xchg because it does not support 8-byte
20		− * values. However it is safe to use {ldr,dtd}exd directly because all
21		− * platforms which Xen can run on support those instructions.
22		− */
23		−static inline xen_ulong_t xchg_xen_ulong(xen_ulong_t *ptr, xen_ulong_t val)
24		−{
25		− xen_ulong_t oldval;
26		− unsigned int tmp;
27		−
28		− wmb();
29		− asm volatile("@ xchg_xen_ulong\n"
30		− "1: ldrexd %0, %H0, [%3]\n"
31		− " strexd %1, %2, %H2, [%3]\n"
32		− " teq %1, #0\n"
33		− " bne 1b"
34		− : "=&r" (oldval), "=&r" (tmp)
35		− : "r" (val), "r" (ptr)
36		− : "memory", "cc");
37		− return oldval;
38		−}
	19	+#define xchg_xen_ulong(ptr, val) atomic64_xchg(container_of((ptr), \
	20	+ atomic64_t, \
	21	+ counter), (val))
39	22
40	23	#endif /* _ASM_ARM_XEN_EVENTS_H */

arch/arm/kernel/entry-common.S+12−0

@@ -276,7 +276,13 @@ ENDPROC(ftrace_graph_caller_old) · 275 unmodified lines
276	276	*/
277	277
278	278	.macro mcount_enter
	279	+/*
	280	+ * This pad compensates for the push {lr} at the call site. Note that we are
	281	+ * unable to unwind through a function which does not otherwise save its lr.
	282	+ */
	283	+ UNWIND(.pad #4)
279	284	stmdb sp!, {r0-r3, lr}
	285	+ UNWIND(.save {r0-r3, lr})
280	286	.endm
281	287
282	288	.macro mcount_get_lr reg
@@ -289,6 +295,7 @@ ENDPROC(ftrace_graph_caller_old) · 6 unmodified lines
289	295	.endm
290	296
291	297	ENTRY(__gnu_mcount_nc)
	298	+UNWIND(.fnstart)
292	299	#ifdef CONFIG_DYNAMIC_FTRACE
293	300	mov ip, lr
294	301	ldmia sp!, {lr}
@@ -296,17 +303,22 @@ ENTRY(__gnu_mcount_nc) · 1 unmodified line
296	303	#else
297	304	__mcount
298	305	#endif
	306	+UNWIND(.fnend)
299	307	ENDPROC(__gnu_mcount_nc)
300	308
301	309	#ifdef CONFIG_DYNAMIC_FTRACE
302	310	ENTRY(ftrace_caller)
	311	+UNWIND(.fnstart)
303	312	__ftrace_caller
	313	+UNWIND(.fnend)
304	314	ENDPROC(ftrace_caller)
305	315	#endif
306	316
307	317	#ifdef CONFIG_FUNCTION_GRAPH_TRACER
308	318	ENTRY(ftrace_graph_caller)
	319	+UNWIND(.fnstart)
309	320	__ftrace_graph_caller
	321	+UNWIND(.fnend)
310	322	ENDPROC(ftrace_graph_caller)
311	323	#endif
312	324

arch/arm/kernel/head.S+1−1

@@ -267,7 +267,7 @@ __create_page_tables: · 266 unmodified lines
267	267	addne r6, r6, #1 << SECTION_SHIFT
268	268	strne r6, [r3]
269	269
270		−#if defined(CONFIG_LPAE) && defined(CONFIG_CPU_ENDIAN_BE8)
	270	+#if defined(CONFIG_ARM_LPAE) && defined(CONFIG_CPU_ENDIAN_BE8)
271	271	sub r4, r4, #4 @ Fixup page table pointer
272	272	@ for 64-bit descriptors
273	273	#endif

arch/arm/kernel/hw_breakpoint.c+4−4

@@ -966,7 +966,7 @@ static void reset_ctrl_regs(void *unused) · 965 unmodified lines
966	966	}
967	967
968	968	if (err) {
969		− pr_warning("CPU %d debug is powered down!\n", cpu);
	969	+ pr_warn_once("CPU %d debug is powered down!\n", cpu);
970	970	cpumask_or(&debug_err_mask, &debug_err_mask, cpumask_of(cpu));
971	971	return;
972	972	}
@@ -987,7 +987,7 @@ clear_vcr: · 14 unmodified lines
987	987	isb();
988	988
989	989	if (cpumask_intersects(&debug_err_mask, cpumask_of(cpu))) {
990		− pr_warning("CPU %d failed to disable vector catch\n", cpu);
	990	+ pr_warn_once("CPU %d failed to disable vector catch\n", cpu);
991	991	return;
992	992	}
993	993
@@ -1007,7 +1007,7 @@ clear_vcr: · 13 unmodified lines
1007	1007	}
1008	1008
1009	1009	if (cpumask_intersects(&debug_err_mask, cpumask_of(cpu))) {
1010		− pr_warning("CPU %d failed to clear debug register pairs\n", cpu);
	1010	+ pr_warn_once("CPU %d failed to clear debug register pairs\n", cpu);
1011	1011	return;
1012	1012	}
1013	1013
@@ -1043,7 +1043,7 @@ static int dbg_cpu_pm_notify(struct notifier_block *self, unsigned long action, · 29 unmodified lines
1043	1043	return NOTIFY_OK;
1044	1044	}
1045	1045
1046		−static struct notifier_block __cpuinitdata dbg_cpu_pm_nb = {
	1046	+static struct notifier_block dbg_cpu_pm_nb = {
1047	1047	.notifier_call = dbg_cpu_pm_notify,
1048	1048	};
1049	1049

arch/arm/kernel/perf_event.c+4−1

@@ -253,7 +253,10 @@ validate_event(struct pmu_hw_events *hw_events, · 252 unmodified lines
253	253	struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
254	254	struct pmu *leader_pmu = event->group_leader->pmu;
255	255
256		− if (event->pmu != leader_pmu \|\| event->state <= PERF_EVENT_STATE_OFF)
	256	+ if (event->pmu != leader_pmu \|\| event->state < PERF_EVENT_STATE_OFF)
	257	+ return 1;
	258	+
	259	+ if (event->state == PERF_EVENT_STATE_OFF && !event->attr.enable_on_exec)
257	260	return 1;
258	261
259	262	return armpmu->get_event_idx(hw_events, event) >= 0;

arch/arm/kernel/sched_clock.c+2−2

@@ -45,12 +45,12 @@ static u32 notrace jiffy_sched_clock_read(void) · 44 unmodified lines
45	45
46	46	static u32 __read_mostly (*read_sched_clock)(void) = jiffy_sched_clock_read;
47	47
48		−static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift)
	48	+static inline u64 notrace cyc_to_ns(u64 cyc, u32 mult, u32 shift)
49	49	{
50	50	return (cyc * mult) >> shift;
51	51	}
52	52
53		−static unsigned long long cyc_to_sched_clock(u32 cyc, u32 mask)
	53	+static unsigned long long notrace cyc_to_sched_clock(u32 cyc, u32 mask)
54	54	{
55	55	u64 epoch_ns;
56	56	u32 epoch_cyc;

arch/arm/kernel/setup.c+22−5

@@ -56,7 +56,6 @@ · 55 unmodified lines
56	56	#include <asm/virt.h>
57	57
58	58	#include "atags.h"
59		−#include "tcm.h"
60	59
61	60
62	61	#if defined(CONFIG_FPE_NWFPE) \|\| defined(CONFIG_FPE_FASTFPE)
@@ -353,6 +352,23 @@ void __init early_print(const char *str, ...) · 290 unmodified lines
353	352	printk("%s", buf);
354	353	}
355	354
	355	+static void __init cpuid_init_hwcaps(void)
	356	+{
	357	+ unsigned int divide_instrs;
	358	+
	359	+ if (cpu_architecture() < CPU_ARCH_ARMv7)
	360	+ return;
	361	+
	362	+ divide_instrs = (read_cpuid_ext(CPUID_EXT_ISAR0) & 0x0f000000) >> 24;
	363	+
	364	+ switch (divide_instrs) {
	365	+ case 2:
	366	+ elf_hwcap \|= HWCAP_IDIVA;
	367	+ case 1:
	368	+ elf_hwcap \|= HWCAP_IDIVT;
	369	+ }
	370	+}
	371	+
356	372	static void __init feat_v6_fixup(void)
357	373	{
358	374	int id = read_cpuid_id();
@@ -483,8 +499,11 @@ static void __init setup_processor(void) · 124 unmodified lines
483	499	snprintf(elf_platform, ELF_PLATFORM_SIZE, "%s%c",
484	500	list->elf_name, ENDIANNESS);
485	501	elf_hwcap = list->elf_hwcap;
	502	+
	503	+ cpuid_init_hwcaps();
	504	+
486	505	#ifndef CONFIG_ARM_THUMB
487		− elf_hwcap &= ~HWCAP_THUMB;
	506	+ elf_hwcap &= ~(HWCAP_THUMB \| HWCAP_IDIVT);
488	507	#endif
489	508
490	509	feat_v6_fixup();
@@ -524,7 +543,7 @@ int __init arm_add_memory(phys_addr_t start, phys_addr_t size) · 33 unmodified lines
524	543	size -= start & ~PAGE_MASK;
525	544	bank->start = PAGE_ALIGN(start);
526	545
527		−#ifndef CONFIG_LPAE
	546	+#ifndef CONFIG_ARM_LPAE
528	547	if (bank->start + size < bank->start) {
529	548	printk(KERN_CRIT "Truncating memory at 0x%08llx to fit in "
530	549	"32-bit physical address space\n", (long long)start);
@@ -778,8 +797,6 @@ void __init setup_arch(char **cmdline_p) · 247 unmodified lines
778	797
779	798	reserve_crashkernel();
780	799
781		− tcm_init();
782		−
783	800	#ifdef CONFIG_MULTI_IRQ_HANDLER
784	801	handle_arch_irq = mdesc->handle_irq;
785	802	#endif

arch/arm/kernel/smp.c+1−4

@@ -480,7 +480,7 @@ static void __cpuinit broadcast_timer_setup(struct clock_event_device *evt) · 479 unmodified lines
480	480	evt->features = CLOCK_EVT_FEAT_ONESHOT \|
481	481	CLOCK_EVT_FEAT_PERIODIC \|
482	482	CLOCK_EVT_FEAT_DUMMY;
483		− evt->rating = 400;
	483	+ evt->rating = 100;
484	484	evt->mult = 1;
485	485	evt->set_mode = broadcast_timer_set_mode;
486	486
@@ -673,9 +673,6 @@ static int cpufreq_callback(struct notifier_block *nb, · 186 unmodified lines
673	673	if (freq->flags & CPUFREQ_CONST_LOOPS)
674	674	return NOTIFY_OK;
675	675
676		− if (arm_delay_ops.const_clock)
677		− return NOTIFY_OK;
678		−
679	676	if (!per_cpu(l_p_j_ref, cpu)) {
680	677	per_cpu(l_p_j_ref, cpu) =
681	678	per_cpu(cpu_data, cpu).loops_per_jiffy;

arch/arm/kernel/smp_tlb.c+66−0

@@ -12,6 +12,7 @@ · 11 unmodified lines
12	12
13	13	#include <asm/smp_plat.h>
14	14	#include <asm/tlbflush.h>
	15	+#include <asm/mmu_context.h>
15	16
16	17	/**********************************************************************/
17	18
@@ -69,12 +70,72 @@ static inline void ipi_flush_bp_all(void *ignored) · 51 unmodified lines
69	70	local_flush_bp_all();
70	71	}
71	72
	73	+#ifdef CONFIG_ARM_ERRATA_798181
	74	+static int erratum_a15_798181(void)
	75	+{
	76	+ unsigned int midr = read_cpuid_id();
	77	+
	78	+ /* Cortex-A15 r0p0..r3p2 affected */
	79	+ if ((midr & 0xff0ffff0) != 0x410fc0f0 \|\| midr > 0x413fc0f2)
	80	+ return 0;
	81	+ return 1;
	82	+}
	83	+#else
	84	+static int erratum_a15_798181(void)
	85	+{
	86	+ return 0;
	87	+}
	88	+#endif
	89	+
	90	+static void ipi_flush_tlb_a15_erratum(void *arg)
	91	+{
	92	+ dmb();
	93	+}
	94	+
	95	+static void broadcast_tlb_a15_erratum(void)
	96	+{
	97	+ if (!erratum_a15_798181())
	98	+ return;
	99	+
	100	+ dummy_flush_tlb_a15_erratum();
	101	+ smp_call_function_many(cpu_online_mask, ipi_flush_tlb_a15_erratum,
	102	+ NULL, 1);
	103	+}
	104	+
	105	+static void broadcast_tlb_mm_a15_erratum(struct mm_struct *mm)
	106	+{
	107	+ int cpu;
	108	+ cpumask_t mask = { CPU_BITS_NONE };
	109	+
	110	+ if (!erratum_a15_798181())
	111	+ return;
	112	+
	113	+ dummy_flush_tlb_a15_erratum();
	114	+ for_each_online_cpu(cpu) {
	115	+ if (cpu == smp_processor_id())
	116	+ continue;
	117	+ /*
	118	+ * We only need to send an IPI if the other CPUs are running
	119	+ * the same ASID as the one being invalidated. There is no
	120	+ * need for locking around the active_asids check since the
	121	+ * switch_mm() function has at least one dmb() (as required by
	122	+ * this workaround) in case a context switch happens on
	123	+ * another CPU after the condition below.
	124	+ */
	125	+ if (atomic64_read(&mm->context.id) ==
	126	+ atomic64_read(&per_cpu(active_asids, cpu)))
	127	+ cpumask_set_cpu(cpu, &mask);
	128	+ }
	129	+ smp_call_function_many(&mask, ipi_flush_tlb_a15_erratum, NULL, 1);
	130	+}
	131	+
72	132	void flush_tlb_all(void)
73	133	{
74	134	if (tlb_ops_need_broadcast())
75	135	on_each_cpu(ipi_flush_tlb_all, NULL, 1);
76	136	else
77	137	local_flush_tlb_all();
	138	+ broadcast_tlb_a15_erratum();
78	139	}
79	140
80	141	void flush_tlb_mm(struct mm_struct *mm)
@@ -83,6 +144,7 @@ void flush_tlb_mm(struct mm_struct *mm) · 2 unmodified lines
83	144	on_each_cpu_mask(mm_cpumask(mm), ipi_flush_tlb_mm, mm, 1);
84	145	else
85	146	local_flush_tlb_mm(mm);
	147	+ broadcast_tlb_mm_a15_erratum(mm);
86	148	}
87	149
88	150	void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
@@ -95,6 +157,7 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr) · 6 unmodified lines
95	157	&ta, 1);
96	158	} else
97	159	local_flush_tlb_page(vma, uaddr);
	160	+ broadcast_tlb_mm_a15_erratum(vma->vm_mm);
98	161	}
99	162
100	163	void flush_tlb_kernel_page(unsigned long kaddr)
@@ -105,6 +168,7 @@ void flush_tlb_kernel_page(unsigned long kaddr) · 4 unmodified lines
105	168	on_each_cpu(ipi_flush_tlb_kernel_page, &ta, 1);
106	169	} else
107	170	local_flush_tlb_kernel_page(kaddr);
	171	+ broadcast_tlb_a15_erratum();
108	172	}
109	173
110	174	void flush_tlb_range(struct vm_area_struct *vma,
@@ -119,6 +183,7 @@ void flush_tlb_range(struct vm_area_struct *vma, · 8 unmodified lines
119	183	&ta, 1);
120	184	} else
121	185	local_flush_tlb_range(vma, start, end);
	186	+ broadcast_tlb_mm_a15_erratum(vma->vm_mm);
122	187	}
123	188
124	189	void flush_tlb_kernel_range(unsigned long start, unsigned long end)
@@ -130,6 +195,7 @@ void flush_tlb_kernel_range(unsigned long start, unsigned long end) · 5 unmodified lines
130	195	on_each_cpu(ipi_flush_tlb_kernel_range, &ta, 1);
131	196	} else
132	197	local_flush_tlb_kernel_range(start, end);
	198	+ broadcast_tlb_a15_erratum();
133	199	}
134	200
135	201	void flush_bp_all(void)

arch/arm/kernel/tcm.c+0−1

@@ -17,7 +17,6 @@ · 16 unmodified lines
17	17	#include <asm/mach/map.h>
18	18	#include <asm/memory.h>
19	19	#include <asm/system_info.h>
20		−#include "tcm.h"
21	20
22	21	static struct gen_pool *tcm_pool;
23	22	static bool dtcm_present;

arch/arm/kvm/arm.c+1−0

@@ -201,6 +201,7 @@ int kvm_dev_ioctl_check_extension(long ext) · 200 unmodified lines
201	201	break;
202	202	case KVM_CAP_ARM_SET_DEVICE_ADDR:
203	203	r = 1;
	204	+ break;
204	205	case KVM_CAP_NR_VCPUS:
205	206	r = num_online_cpus();
206	207	break;

arch/arm/kvm/coproc.c+2−2

@@ -79,11 +79,11 @@ static bool access_dcsw(struct kvm_vcpu *vcpu, · 78 unmodified lines
79	79	u32 val;
80	80	int cpu;
81	81
82		− cpu = get_cpu();
83		−
84	82	if (!p->is_write)
85	83	return read_from_write_only(vcpu, p);
86	84
	85	+ cpu = get_cpu();
	86	+
87	87	cpumask_setall(&vcpu->arch.require_dcache_flush);
88	88	cpumask_clear_cpu(cpu, &vcpu->arch.require_dcache_flush);
89	89

arch/arm/kvm/vgic.c+14−21

@@ -883,8 +883,7 @@ static bool vgic_queue_irq(struct kvm_vcpu *vcpu, u8 sgi_source_id, int irq) · 882 unmodified lines
883	883	lr, irq, vgic_cpu->vgic_lr[lr]);
884	884	BUG_ON(!test_bit(lr, vgic_cpu->lr_used));
885	885	vgic_cpu->vgic_lr[lr] \|= GICH_LR_PENDING_BIT;
886		−
887		− goto out;
	886	+ return true;
888	887	}
889	888
890	889	/* Try to use another LR for this interrupt */
@@ -898,7 +897,6 @@ static bool vgic_queue_irq(struct kvm_vcpu *vcpu, u8 sgi_source_id, int irq) · 7 unmodified lines
898	897	vgic_cpu->vgic_irq_lr_map[irq] = lr;
899	898	set_bit(lr, vgic_cpu->lr_used);
900	899
901		−out:
902	900	if (!vgic_irq_is_edge(vcpu, irq))
903	901	vgic_cpu->vgic_lr[lr] \|= GICH_LR_EOI;
904	902
@@ -1018,21 +1016,6 @@ static bool vgic_process_maintenance(struct kvm_vcpu *vcpu) · 113 unmodified lines
1018	1016
1019	1017	kvm_debug("MISR = %08x\n", vgic_cpu->vgic_misr);
1020	1018
1021		− /*
1022		− * We do not need to take the distributor lock here, since the only
1023		− * action we perform is clearing the irq_active_bit for an EOIed
1024		− * level interrupt. There is a potential race with
1025		− * the queuing of an interrupt in __kvm_vgic_flush_hwstate(), where we
1026		− * check if the interrupt is already active. Two possibilities:
1027		− *
1028		− * - The queuing is occurring on the same vcpu: cannot happen,
1029		− * as we're already in the context of this vcpu, and
1030		− * executing the handler
1031		− * - The interrupt has been migrated to another vcpu, and we
1032		− * ignore this interrupt for this run. Big deal. It is still
1033		− * pending though, and will get considered when this vcpu
1034		− * exits.
1035		− */
1036	1019	if (vgic_cpu->vgic_misr & GICH_MISR_EOI) {
1037	1020	/*
1038	1021	* Some level interrupts have been EOIed. Clear their
@@ -1054,6 +1037,13 @@ static bool vgic_process_maintenance(struct kvm_vcpu *vcpu) · 15 unmodified lines
1054	1037	} else {
1055	1038	vgic_cpu_irq_clear(vcpu, irq);
1056	1039	}
	1040	+
	1041	+ /*
	1042	+ * Despite being EOIed, the LR may not have
	1043	+ * been marked as empty.
	1044	+ */
	1045	+ set_bit(lr, (unsigned long *)vgic_cpu->vgic_elrsr);
	1046	+ vgic_cpu->vgic_lr[lr] &= ~GICH_LR_ACTIVE_BIT;
1057	1047	}
1058	1048	}
1059	1049
@@ -1064,9 +1054,8 @@ static bool vgic_process_maintenance(struct kvm_vcpu *vcpu) · 4 unmodified lines
1064	1054	}
1065	1055
1066	1056	/*
1067		− * Sync back the VGIC state after a guest run. We do not really touch
1068		− * the distributor here (the irq_pending_on_cpu bit is safe to set),
1069		− * so there is no need for taking its lock.
	1057	+ * Sync back the VGIC state after a guest run. The distributor lock is
	1058	+ * needed so we don't get preempted in the middle of the state processing.
1070	1059	*/
1071	1060	static void __kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu)
1072	1061	{
@@ -1112,10 +1101,14 @@ void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu) · 39 unmodified lines
1112	1101
1113	1102	void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu)
1114	1103	{
	1104	+ struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
	1105	+
1115	1106	if (!irqchip_in_kernel(vcpu->kvm))
1116	1107	return;
1117	1108
	1109	+ spin_lock(&dist->lock);
1118	1110	__kvm_vgic_sync_hwstate(vcpu);
	1111	+ spin_unlock(&dist->lock);
1119	1112	}
1120	1113
1121	1114	int kvm_vgic_vcpu_pending_irq(struct kvm_vcpu *vcpu)

arch/arm/lib/delay.c+5−3

@@ -58,7 +58,7 @@ static void __timer_delay(unsigned long cycles) · 57 unmodified lines
58	58	static void __timer_const_udelay(unsigned long xloops)
59	59	{
60	60	unsigned long long loops = xloops;
61		− loops *= loops_per_jiffy;
	61	+ loops *= arm_delay_ops.ticks_per_jiffy;
62	62	__timer_delay(loops >> UDELAY_SHIFT);
63	63	}
64	64
@@ -73,11 +73,13 @@ void __init register_current_timer_delay(const struct delay_timer *timer) · 8 unmodified lines
73	73	pr_info("Switching to timer-based delay loop\n");
74	74	delay_timer = timer;
75	75	lpj_fine = timer->freq / HZ;
76		− loops_per_jiffy = lpj_fine;
	76	+
	77	+ /* cpufreq may scale loops_per_jiffy, so keep a private copy */
	78	+ arm_delay_ops.ticks_per_jiffy = lpj_fine;
77	79	arm_delay_ops.delay = __timer_delay;
78	80	arm_delay_ops.const_udelay = __timer_const_udelay;
79	81	arm_delay_ops.udelay = __timer_udelay;
80		− arm_delay_ops.const_clock = true;
	82	+
81	83	delay_calibrated = true;
82	84	} else {
83	85	pr_info("Ignoring duplicate/late registration of read_current_timer delay\n");

arch/arm/lib/memset.S+13−20

@@ -14,31 +14,15 @@ · 13 unmodified lines
14	14
15	15	.text
16	16	.align 5
17		− .word 0
18		−
19		−1: subs r2, r2, #4 @ 1 do we have enough
20		− blt 5f @ 1 bytes to align with?
21		− cmp r3, #2 @ 1
22		− strltb r1, [ip], #1 @ 1
23		− strleb r1, [ip], #1 @ 1
24		− strb r1, [ip], #1 @ 1
25		− add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3))
26		−/*
27		− * The pointer is now aligned and the length is adjusted. Try doing the
28		− * memset again.
29		− */
30	17
31	18	ENTRY(memset)
32		−/*
33		− * Preserve the contents of r0 for the return value.
34		− */
35		− mov ip, r0
36		− ands r3, ip, #3 @ 1 unaligned?
37		− bne 1b @ 1
	19	+ ands r3, r0, #3 @ 1 unaligned?
	20	+ mov ip, r0 @ preserve r0 as return value
	21	+ bne 6f @ 1
38	22	/*
39	23	* we know that the pointer in ip is aligned to a word boundary.
40	24	*/
41		− orr r1, r1, r1, lsl #8
	25	+1: orr r1, r1, r1, lsl #8
42	26	orr r1, r1, r1, lsl #16
43	27	mov r3, r1
44	28	cmp r2, #16
@@ -127,4 +111,13 @@ ENTRY(memset) · 82 unmodified lines
127	111	tst r2, #1
128	112	strneb r1, [ip], #1
129	113	mov pc, lr
	114	+
	115	+6: subs r2, r2, #4 @ 1 do we have enough
	116	+ blt 5b @ 1 bytes to align with?
	117	+ cmp r3, #2 @ 1
	118	+ strltb r1, [ip], #1 @ 1
	119	+ strleb r1, [ip], #1 @ 1
	120	+ strb r1, [ip], #1 @ 1
	121	+ add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3))
	122	+ b 1b
130	123	ENDPROC(memset)

arch/arm/mach-at91/board-foxg20.c+1−0

@@ -176,6 +176,7 @@ static struct w1_gpio_platform_data w1_gpio_pdata = { · 175 unmodified lines
176	176	/* If you choose to use a pin other than PB16 it needs to be 3.3V */
177	177	.pin = AT91_PIN_PB16,
178	178	.is_open_drain = 1,
	179	+ .ext_pullup_enable_pin = -EINVAL,
179	180	};
180	181
181	182	static struct platform_device w1_device = {

arch/arm/mach-at91/board-stamp9g20.c+1−0

@@ -188,6 +188,7 @@ static struct spi_board_info portuxg20_spi_devices[] = { · 187 unmodified lines
188	188	static struct w1_gpio_platform_data w1_gpio_pdata = {
189	189	.pin = AT91_PIN_PA29,
190	190	.is_open_drain = 1,
	191	+ .ext_pullup_enable_pin = -EINVAL,
191	192	};
192	193
193	194	static struct platform_device w1_device = {

arch/arm/mach-at91/include/mach/gpio.h+8−0

@@ -209,6 +209,14 @@ extern int at91_get_gpio_value(unsigned pin); · 208 unmodified lines
209	209	extern void at91_gpio_suspend(void);
210	210	extern void at91_gpio_resume(void);
211	211
	212	+#ifdef CONFIG_PINCTRL_AT91
	213	+extern void at91_pinctrl_gpio_suspend(void);
	214	+extern void at91_pinctrl_gpio_resume(void);
	215	+#else
	216	+static inline void at91_pinctrl_gpio_suspend(void) {}
	217	+static inline void at91_pinctrl_gpio_resume(void) {}
	218	+#endif
	219	+
212	220	#endif /* __ASSEMBLY__ */
213	221
214	222	#endif

arch/arm/mach-at91/irq.c+8−12

@@ -92,23 +92,21 @@ static int at91_aic_set_wake(struct irq_data *d, unsigned value) · 91 unmodified lines
92	92
93	93	void at91_irq_suspend(void)
94	94	{
95		− int i = 0, bit;
	95	+ int bit = -1;
96	96
97	97	if (has_aic5()) {
98	98	/* disable enabled irqs */
99		− while ((bit = find_next_bit(backups, n_irqs, i)) < n_irqs) {
	99	+ while ((bit = find_next_bit(backups, n_irqs, bit + 1)) < n_irqs) {
100	100	at91_aic_write(AT91_AIC5_SSR,
101	101	bit & AT91_AIC5_INTSEL_MSK);
102	102	at91_aic_write(AT91_AIC5_IDCR, 1);
103		− i = bit;
104	103	}
105	104	/* enable wakeup irqs */
106		− i = 0;
107		− while ((bit = find_next_bit(wakeups, n_irqs, i)) < n_irqs) {
	105	+ bit = -1;
	106	+ while ((bit = find_next_bit(wakeups, n_irqs, bit + 1)) < n_irqs) {
108	107	at91_aic_write(AT91_AIC5_SSR,
109	108	bit & AT91_AIC5_INTSEL_MSK);
110	109	at91_aic_write(AT91_AIC5_IECR, 1);
111		− i = bit;
112	110	}
113	111	} else {
114	112	at91_aic_write(AT91_AIC_IDCR, *backups);
@@ -118,23 +116,21 @@ void at91_irq_suspend(void) · 3 unmodified lines
118	116
119	117	void at91_irq_resume(void)
120	118	{
121		− int i = 0, bit;
	119	+ int bit = -1;
122	120
123	121	if (has_aic5()) {
124	122	/* disable wakeup irqs */
125		− while ((bit = find_next_bit(wakeups, n_irqs, i)) < n_irqs) {
	123	+ while ((bit = find_next_bit(wakeups, n_irqs, bit + 1)) < n_irqs) {
126	124	at91_aic_write(AT91_AIC5_SSR,
127	125	bit & AT91_AIC5_INTSEL_MSK);
128	126	at91_aic_write(AT91_AIC5_IDCR, 1);
129		− i = bit;
130	127	}
131	128	/* enable irqs disabled for suspend */
132		− i = 0;
133		− while ((bit = find_next_bit(backups, n_irqs, i)) < n_irqs) {
	129	+ bit = -1;
	130	+ while ((bit = find_next_bit(backups, n_irqs, bit + 1)) < n_irqs) {
134	131	at91_aic_write(AT91_AIC5_SSR,
135	132	bit & AT91_AIC5_INTSEL_MSK);
136	133	at91_aic_write(AT91_AIC5_IECR, 1);
137		− i = bit;
138	134	}
139	135	} else {
140	136	at91_aic_write(AT91_AIC_IDCR, *wakeups);

arch/arm/mach-at91/pm.c+8−2

@@ -201,7 +201,10 @@ extern u32 at91_slow_clock_sz; · 200 unmodified lines
201	201
202	202	static int at91_pm_enter(suspend_state_t state)
203	203	{
204		− at91_gpio_suspend();
	204	+ if (of_have_populated_dt())
	205	+ at91_pinctrl_gpio_suspend();
	206	+ else
	207	+ at91_gpio_suspend();
205	208	at91_irq_suspend();
206	209
207	210	pr_debug("AT91: PM - wake mask %08x, pm state %d\n",
@@ -286,7 +289,10 @@ static int at91_pm_enter(suspend_state_t state) · 78 unmodified lines
286	289	error:
287	290	target_state = PM_SUSPEND_ON;
288	291	at91_irq_resume();
289		− at91_gpio_resume();
	292	+ if (of_have_populated_dt())
	293	+ at91_pinctrl_gpio_resume();
	294	+ else
	295	+ at91_gpio_resume();
290	296	return 0;
291	297	}
292	298

arch/arm/mach-cns3xxx/core.c+3−13

@@ -22,19 +22,9 @@ · 21 unmodified lines
22	22
23	23	static struct map_desc cns3xxx_io_desc[] __initdata = {
24	24	{
25		− .virtual = CNS3XXX_TC11MP_TWD_BASE_VIRT,
26		− .pfn = __phys_to_pfn(CNS3XXX_TC11MP_TWD_BASE),
27		− .length = SZ_4K,
28		− .type = MT_DEVICE,
29		− }, {
30		− .virtual = CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT,
31		− .pfn = __phys_to_pfn(CNS3XXX_TC11MP_GIC_CPU_BASE),
32		− .length = SZ_4K,
33		− .type = MT_DEVICE,
34		− }, {
35		− .virtual = CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT,
36		− .pfn = __phys_to_pfn(CNS3XXX_TC11MP_GIC_DIST_BASE),
37		− .length = SZ_4K,
	25	+ .virtual = CNS3XXX_TC11MP_SCU_BASE_VIRT,
	26	+ .pfn = __phys_to_pfn(CNS3XXX_TC11MP_SCU_BASE),
	27	+ .length = SZ_8K,
38	28	.type = MT_DEVICE,
39	29	}, {
40	30	.virtual = CNS3XXX_TIMER1_2_3_BASE_VIRT,

arch/arm/mach-cns3xxx/include/mach/cns3xxx.h+8−8

@@ -94,10 +94,10 @@ · 93 unmodified lines
94	94	#define RTC_INTR_STS_OFFSET 0x34
95	95
96	96	#define CNS3XXX_MISC_BASE 0x76000000 /* Misc Control */
97		−#define CNS3XXX_MISC_BASE_VIRT 0xFFF07000 /* Misc Control */
	97	+#define CNS3XXX_MISC_BASE_VIRT 0xFB000000 /* Misc Control */
98	98
99	99	#define CNS3XXX_PM_BASE 0x77000000 /* Power Management Control */
100		−#define CNS3XXX_PM_BASE_VIRT 0xFFF08000
	100	+#define CNS3XXX_PM_BASE_VIRT 0xFB001000
101	101
102	102	#define PM_CLK_GATE_OFFSET 0x00
103	103	#define PM_SOFT_RST_OFFSET 0x04
@@ -109,7 +109,7 @@ · 5 unmodified lines
109	109	#define PM_PLL_HM_PD_OFFSET 0x1C
110	110
111	111	#define CNS3XXX_UART0_BASE 0x78000000 /* UART 0 */
112		−#define CNS3XXX_UART0_BASE_VIRT 0xFFF09000
	112	+#define CNS3XXX_UART0_BASE_VIRT 0xFB002000
113	113
114	114	#define CNS3XXX_UART1_BASE 0x78400000 /* UART 1 */
115	115	#define CNS3XXX_UART1_BASE_VIRT 0xFFF0A000
@@ -130,7 +130,7 @@ · 14 unmodified lines
130	130	#define CNS3XXX_I2S_BASE_VIRT 0xFFF10000
131	131
132	132	#define CNS3XXX_TIMER1_2_3_BASE 0x7C800000 /* Timer */
133		−#define CNS3XXX_TIMER1_2_3_BASE_VIRT 0xFFF10800
	133	+#define CNS3XXX_TIMER1_2_3_BASE_VIRT 0xFB003000
134	134
135	135	#define TIMER1_COUNTER_OFFSET 0x00
136	136	#define TIMER1_AUTO_RELOAD_OFFSET 0x04
@@ -227,16 +227,16 @@ · 90 unmodified lines
227	227	* Testchip peripheral and fpga gic regions
228	228	*/
229	229	#define CNS3XXX_TC11MP_SCU_BASE 0x90000000 /* IRQ, Test chip */
230		−#define CNS3XXX_TC11MP_SCU_BASE_VIRT 0xFF000000
	230	+#define CNS3XXX_TC11MP_SCU_BASE_VIRT 0xFB004000
231	231
232	232	#define CNS3XXX_TC11MP_GIC_CPU_BASE 0x90000100 /* Test chip interrupt controller CPU interface */
233		−#define CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT 0xFF000100
	233	+#define CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT (CNS3XXX_TC11MP_SCU_BASE_VIRT + 0x100)
234	234
235	235	#define CNS3XXX_TC11MP_TWD_BASE 0x90000600
236		−#define CNS3XXX_TC11MP_TWD_BASE_VIRT 0xFF000600
	236	+#define CNS3XXX_TC11MP_TWD_BASE_VIRT (CNS3XXX_TC11MP_SCU_BASE_VIRT + 0x600)
237	237
238	238	#define CNS3XXX_TC11MP_GIC_DIST_BASE 0x90001000 /* Test chip interrupt controller distributor */
239		−#define CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT 0xFF001000
	239	+#define CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT (CNS3XXX_TC11MP_SCU_BASE_VIRT + 0x1000)
240	240
241	241	#define CNS3XXX_TC11MP_L220_BASE 0x92002000 /* L220 registers */
242	242	#define CNS3XXX_TC11MP_L220_BASE_VIRT 0xFF002000

arch/arm/mach-davinci/dma.c+3−0

@@ -743,6 +743,9 @@ EXPORT_SYMBOL(edma_free_channel); · 742 unmodified lines
743	743	*/
744	744	int edma_alloc_slot(unsigned ctlr, int slot)
745	745	{
	746	+ if (!edma_cc[ctlr])
	747	+ return -EINVAL;
	748	+
746	749	if (slot >= 0)
747	750	slot = EDMA_CHAN_SLOT(slot);
748	751

arch/arm/mach-ep93xx/include/mach/uncompress.h+7−3

@@ -47,9 +47,13 @@ static void __raw_writel(unsigned int value, unsigned int ptr) · 46 unmodified lines
47	47
48	48	static inline void putc(int c)
49	49	{
50		− /* Transmit fifo not full? */
51		− while (__raw_readb(PHYS_UART_FLAG) & UART_FLAG_TXFF)
52		− ;
	50	+ int i;
	51	+
	52	+ for (i = 0; i < 10000; i++) {
	53	+ /* Transmit fifo not full? */
	54	+ if (!(__raw_readb(PHYS_UART_FLAG) & UART_FLAG_TXFF))
	55	+ break;
	56	+ }
53	57
54	58	__raw_writeb(c, PHYS_UART_DATA);
55	59	}

arch/arm/mach-footbridge/Kconfig+1−0

@@ -67,6 +67,7 @@ config ARCH_NETWINDER · 66 unmodified lines
67	67	select ISA
68	68	select ISA_DMA
69	69	select PCI
	70	+ select VIRT_TO_BUS
70	71	help
71	72	Say Y here if you intend to run this kernel on the Rebel.COM
72	73	NetWinder. Information about this machine can be found at:

arch/arm/mach-highbank/hotplug.c+4−6

@@ -28,13 +28,11 @@ extern void secondary_startup(void); · 27 unmodified lines
28	28	*/
29	29	void __ref highbank_cpu_die(unsigned int cpu)
30	30	{
31		− flush_cache_all();
32		−
33	31	highbank_set_cpu_jump(cpu, phys_to_virt(0));
34		− highbank_set_core_pwr();
35	32
36		− cpu_do_idle();
	33	+ flush_cache_louis();
	34	+ highbank_set_core_pwr();
37	35
38		− /* We should never return from idle */
39		− panic("highbank: cpu %d unexpectedly exit from shutdown\n", cpu);
	36	+ while (1)
	37	+ cpu_do_idle();
40	38	}

arch/arm/mach-imx/clk-imx35.c+3−0

@@ -257,6 +257,7 @@ int __init mx35_clocks_init(void) · 256 unmodified lines
257	257	clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");
258	258	clk_register_clkdev(clk[nfc_div], NULL, "imx25-nand.0");
259	259	clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0");
	260	+ clk_register_clkdev(clk[admux_gate], "audmux", NULL);
260	261
261	262	clk_prepare_enable(clk[spba_gate]);
262	263	clk_prepare_enable(clk[gpio1_gate]);
@@ -264,6 +265,8 @@ int __init mx35_clocks_init(void) · 1 unmodified line
264	265	clk_prepare_enable(clk[gpio3_gate]);
265	266	clk_prepare_enable(clk[iim_gate]);
266	267	clk_prepare_enable(clk[emi_gate]);
	268	+ clk_prepare_enable(clk[max_gate]);
	269	+ clk_prepare_enable(clk[iomuxc_gate]);
267	270
268	271	/*
269	272	* SCC is needed to boot via mmc after a watchdog reset. The clock code

arch/arm/mach-imx/clk-imx6q.c+2−3

@@ -115,7 +115,7 @@ static const char *gpu2d_core_sels[] = { "axi", "pll3_usb_otg", "pll2_pfd0_352m" · 114 unmodified lines
115	115	static const char *gpu3d_core_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd2_396m", };
116	116	static const char *gpu3d_shader_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll2_pfd1_594m", "pll2_pfd9_720m", };
117	117	static const char *ipu_sels[] = { "mmdc_ch0_axi", "pll2_pfd2_396m", "pll3_120m", "pll3_pfd1_540m", };
118		−static const char *ldb_di_sels[] = { "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "mmdc_ch1_axi", "pll3_pfd1_540m", };
	118	+static const char *ldb_di_sels[] = { "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "mmdc_ch1_axi", "pll3_usb_otg", };
119	119	static const char *ipu_di_pre_sels[] = { "mmdc_ch0_axi", "pll3_usb_otg", "pll5_video", "pll2_pfd0_352m", "pll2_pfd2_396m", "pll3_pfd1_540m", };
120	120	static const char *ipu1_di0_sels[] = { "ipu1_di0_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };
121	121	static const char *ipu1_di1_sels[] = { "ipu1_di1_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };
@@ -172,7 +172,7 @@ static struct clk *clk[clk_max]; · 50 unmodified lines
172	172	static struct clk_onecell_data clk_data;
173	173
174	174	static enum mx6q_clks const clks_init_on[] __initconst = {
175		− mmdc_ch0_axi, rom,
	175	+ mmdc_ch0_axi, rom, pll1_sys,
176	176	};
177	177
178	178	static struct clk_div_table clk_enet_ref_table[] = {
@@ -443,7 +443,6 @@ int __init mx6q_clocks_init(void) · 264 unmodified lines
443	443
444	444	clk_register_clkdev(clk[gpt_ipg], "ipg", "imx-gpt.0");
445	445	clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0");
446		− clk_register_clkdev(clk[twd], NULL, "smp_twd");
447	446	clk_register_clkdev(clk[cko1_sel], "cko1_sel", NULL);
448	447	clk_register_clkdev(clk[ahb], "ahb", NULL);
449	448	clk_register_clkdev(clk[cko1], "cko1", NULL);

arch/arm/mach-imx/common.h+2−0

@@ -110,6 +110,8 @@ void tzic_handle_irq(struct pt_regs *); · 109 unmodified lines
110	110
111	111	extern void imx_enable_cpu(int cpu, bool enable);
112	112	extern void imx_set_cpu_jump(int cpu, void *jump_addr);
	113	+extern u32 imx_get_cpu_arg(int cpu);
	114	+extern void imx_set_cpu_arg(int cpu, u32 arg);
113	115	extern void v7_cpu_resume(void);
114	116	extern u32 *pl310_get_save_ptr(void);
115	117	#ifdef CONFIG_SMP

arch/arm/mach-imx/headsmp.S+9−9

@@ -26,16 +26,16 @@ ENDPROC(v7_secondary_startup) · 25 unmodified lines
26	26
27	27	#ifdef CONFIG_PM
28	28	/*
29		− * The following code is located into the .data section. This is to
30		− * allow phys_l2x0_saved_regs to be accessed with a relative load
31		− * as we are running on physical address here.
	29	+ * The following code must assume it is running from physical address
	30	+ * where absolute virtual addresses to the data section have to be
	31	+ * turned into relative ones.
32	32	*/
33		− .data
34		− .align
35	33
36	34	#ifdef CONFIG_CACHE_L2X0
37	35	.macro pl310_resume
38		− ldr r2, phys_l2x0_saved_regs
	36	+ adr r0, l2x0_saved_regs_offset
	37	+ ldr r2, [r0]
	38	+ add r2, r2, r0
39	39	ldr r0, [r2, #L2X0_R_PHY_BASE] @ get physical base of l2x0
40	40	ldr r1, [r2, #L2X0_R_AUX_CTRL] @ get aux_ctrl value
41	41	str r1, [r0, #L2X0_AUX_CTRL] @ restore aux_ctrl
@@ -43,9 +43,9 @@ ENDPROC(v7_secondary_startup) · 1 unmodified line
43	43	str r1, [r0, #L2X0_CTRL] @ re-enable L2
44	44	.endm
45	45
46		− .globl phys_l2x0_saved_regs
47		−phys_l2x0_saved_regs:
48		− .long 0
	46	+l2x0_saved_regs_offset:
	47	+ .word l2x0_saved_regs - .
	48	+
49	49	#else
50	50	.macro pl310_resume
51	51	.endm

arch/arm/mach-imx/hotplug.c+12−0

@@ -46,11 +46,23 @@ static inline void cpu_enter_lowpower(void) · 45 unmodified lines
46	46	void imx_cpu_die(unsigned int cpu)
47	47	{
48	48	cpu_enter_lowpower();
	49	+ /*
	50	+ * We use the cpu jumping argument register to sync with
	51	+ * imx_cpu_kill() which is running on cpu0 and waiting for
	52	+ * the register being cleared to kill the cpu.
	53	+ */
	54	+ imx_set_cpu_arg(cpu, ~0);
49	55	cpu_do_idle();
50	56	}
51	57
52	58	int imx_cpu_kill(unsigned int cpu)
53	59	{
	60	+ unsigned long timeout = jiffies + msecs_to_jiffies(50);
	61	+
	62	+ while (imx_get_cpu_arg(cpu) == 0)
	63	+ if (time_after(jiffies, timeout))
	64	+ return 0;
54	65	imx_enable_cpu(cpu, false);
	66	+ imx_set_cpu_arg(cpu, 0);
55	67	return 1;
56	68	}

arch/arm/mach-imx/imx25-dt.c+5−0

@@ -27,6 +27,11 @@ static const char * const imx25_dt_board_compat[] __initconst = { · 26 unmodified lines
27	27	NULL
28	28	};
29	29
	30	+static void __init imx25_timer_init(void)
	31	+{
	32	+ mx25_clocks_init_dt();
	33	+}
	34	+
30	35	DT_MACHINE_START(IMX25_DT, "Freescale i.MX25 (Device Tree Support)")
31	36	.map_io = mx25_map_io,
32	37	.init_early = imx25_init_early,

arch/arm/mach-imx/pm-imx6q.c+0−15

@@ -22,8 +22,6 @@ · 21 unmodified lines
22	22	#include "common.h"
23	23	#include "hardware.h"
24	24
25		−extern unsigned long phys_l2x0_saved_regs;
26		−
27	25	static int imx6q_suspend_finish(unsigned long val)
28	26	{
29	27	cpu_do_idle();
@@ -57,18 +55,5 @@ static const struct platform_suspend_ops imx6q_pm_ops = { · 27 unmodified lines
57	55
58	56	void __init imx6q_pm_init(void)
59	57	{
60		− /*
61		− * The l2x0 core code provides an infrastucture to save and restore
62		− * l2x0 registers across suspend/resume cycle. But because imx6q
63		− * retains L2 content during suspend and needs to resume L2 before
64		− * MMU is enabled, it can only utilize register saving support and
65		− * have to take care of restoring on its own. So we save physical
66		− * address of the data structure used by l2x0 core to save registers,
67		− * and later restore the necessary ones in imx6q resume entry.
68		− */
69		−#ifdef CONFIG_CACHE_L2X0
70		− phys_l2x0_saved_regs = __pa(&l2x0_saved_regs);
71		−#endif
72		−
73	58	suspend_set_ops(&imx6q_pm_ops);
74	59	}

arch/arm/mach-imx/src.c+12−0

@@ -43,6 +43,18 @@ void imx_set_cpu_jump(int cpu, void *jump_addr) · 42 unmodified lines
43	43	src_base + SRC_GPR1 + cpu * 8);
44	44	}
45	45
	46	+u32 imx_get_cpu_arg(int cpu)
	47	+{
	48	+ cpu = cpu_logical_map(cpu);
	49	+ return readl_relaxed(src_base + SRC_GPR1 + cpu * 8 + 4);
	50	+}
	51	+
	52	+void imx_set_cpu_arg(int cpu, u32 arg)
	53	+{
	54	+ cpu = cpu_logical_map(cpu);
	55	+ writel_relaxed(arg, src_base + SRC_GPR1 + cpu * 8 + 4);
	56	+}
	57	+
46	58	void imx_src_prepare_restart(void)
47	59	{
48	60	u32 val;

arch/arm/mach-ixp4xx/vulcan-setup.c+1−0

@@ -163,6 +163,7 @@ static struct platform_device vulcan_max6369 = { · 162 unmodified lines
163	163
164	164	static struct w1_gpio_platform_data vulcan_w1_gpio_pdata = {
165	165	.pin = 14,
	166	+ .ext_pullup_enable_pin = -EINVAL,
166	167	};
167	168
168	169	static struct platform_device vulcan_w1_gpio = {

arch/arm/mach-kirkwood/board-dt.c+18−7

@@ -41,16 +41,12 @@ static void __init kirkwood_legacy_clk_init(void) · 40 unmodified lines
41	41
42	42	struct device_node *np = of_find_compatible_node(
43	43	NULL, NULL, "marvell,kirkwood-gating-clock");
44		−
45	44	struct of_phandle_args clkspec;
	45	+ struct clk *clk;
46	46
47	47	clkspec.np = np;
48	48	clkspec.args_count = 1;
49	49
50		− clkspec.args[0] = CGC_BIT_GE0;
51		− orion_clkdev_add(NULL, "mv643xx_eth_port.0",
52		− of_clk_get_from_provider(&clkspec));
53		−
54	50	clkspec.args[0] = CGC_BIT_PEX0;
55	51	orion_clkdev_add("0", "pcie",
56	52	of_clk_get_from_provider(&clkspec));
@@ -59,9 +55,24 @@ static void __init kirkwood_legacy_clk_init(void) · 2 unmodified lines
59	55	orion_clkdev_add("1", "pcie",
60	56	of_clk_get_from_provider(&clkspec));
61	57
62		− clkspec.args[0] = CGC_BIT_GE1;
63		− orion_clkdev_add(NULL, "mv643xx_eth_port.1",
	58	+ clkspec.args[0] = CGC_BIT_SDIO;
	59	+ orion_clkdev_add(NULL, "mvsdio",
64	60	of_clk_get_from_provider(&clkspec));
	61	+
	62	+ /*
	63	+ * The ethernet interfaces forget the MAC address assigned by
	64	+ * u-boot if the clocks are turned off. Until proper DT support
	65	+ * is available we always enable them for now.
	66	+ */
	67	+ clkspec.args[0] = CGC_BIT_GE0;
	68	+ clk = of_clk_get_from_provider(&clkspec);
	69	+ orion_clkdev_add(NULL, "mv643xx_eth_port.0", clk);
	70	+ clk_prepare_enable(clk);
	71	+
	72	+ clkspec.args[0] = CGC_BIT_GE1;
	73	+ clk = of_clk_get_from_provider(&clkspec);
	74	+ orion_clkdev_add(NULL, "mv643xx_eth_port.1", clk);
	75	+ clk_prepare_enable(clk);
65	76	}
66	77
67	78	static void __init kirkwood_of_clk_init(void)

arch/arm/mach-kirkwood/board-iomega_ix2_200.c+6−1

@@ -20,10 +20,15 @@ static struct mv643xx_eth_platform_data iomega_ix2_200_ge00_data = { · 19 unmodified lines
20	20	.duplex = DUPLEX_FULL,
21	21	};
22	22
	23	+static struct mv643xx_eth_platform_data iomega_ix2_200_ge01_data = {
	24	+ .phy_addr = MV643XX_ETH_PHY_ADDR(11),
	25	+};
	26	+
23	27	void __init iomega_ix2_200_init(void)
24	28	{
25	29	/*
26	30	* Basic setup. Needs to be called early.
27	31	*/
28		− kirkwood_ge01_init(&iomega_ix2_200_ge00_data);
	32	+ kirkwood_ge00_init(&iomega_ix2_200_ge00_data);
	33	+ kirkwood_ge01_init(&iomega_ix2_200_ge01_data);
29	34	}

arch/arm/mach-kirkwood/guruplug-setup.c+2−0

@@ -53,6 +53,8 @@ static struct mv_sata_platform_data guruplug_sata_data = { · 52 unmodified lines
53	53
54	54	static struct mvsdio_platform_data guruplug_mvsdio_data = {
55	55	/* unfortunately the CD signal has not been connected */
	56	+ .gpio_card_detect = -1,
	57	+ .gpio_write_protect = -1,
56	58	};
57	59
58	60	static struct gpio_led guruplug_led_pins[] = {

arch/arm/mach-kirkwood/openrd-setup.c+1−0

@@ -55,6 +55,7 @@ static struct mv_sata_platform_data openrd_sata_data = { · 54 unmodified lines
55	55
56	56	static struct mvsdio_platform_data openrd_mvsdio_data = {
57	57	.gpio_card_detect = 29, /* MPP29 used as SD card detect */
	58	+ .gpio_write_protect = -1,
58	59	};
59	60
60	61	static unsigned int openrd_mpp_config[] __initdata = {

arch/arm/mach-kirkwood/rd88f6281-setup.c+1−0

@@ -69,6 +69,7 @@ static struct mv_sata_platform_data rd88f6281_sata_data = { · 68 unmodified lines
69	69
70	70	static struct mvsdio_platform_data rd88f6281_mvsdio_data = {
71	71	.gpio_card_detect = 28,
	72	+ .gpio_write_protect = -1,
72	73	};
73	74
74	75	static unsigned int rd88f6281_mpp_config[] __initdata = {

arch/arm/mach-mmp/gplugd.c+1−0

@@ -9,6 +9,7 @@ · 8 unmodified lines
9	9	*/
10	10
11	11	#include <linux/init.h>
	12	+#include <linux/platform_device.h>
12	13	#include <linux/gpio.h>
13	14
14	15	#include <asm/mach/arch.h>

arch/arm/mach-msm/timer.c+4−1

@@ -62,7 +62,10 @@ static int msm_timer_set_next_event(unsigned long cycles, · 61 unmodified lines
62	62	{
63	63	u32 ctrl = readl_relaxed(event_base + TIMER_ENABLE);
64	64
65		− writel_relaxed(0, event_base + TIMER_CLEAR);
	65	+ ctrl &= ~TIMER_ENABLE_EN;
	66	+ writel_relaxed(ctrl, event_base + TIMER_ENABLE);
	67	+
	68	+ writel_relaxed(ctrl, event_base + TIMER_CLEAR);
66	69	writel_relaxed(cycles, event_base + TIMER_MATCH_VAL);
67	70	writel_relaxed(ctrl \| TIMER_ENABLE_EN, event_base + TIMER_ENABLE);
68	71	return 0;

arch/arm/mach-mvebu/irq-armada-370-xp.c+10−14

@@ -44,6 +44,8 @@ · 43 unmodified lines
44	44
45	45	#define ARMADA_370_XP_MAX_PER_CPU_IRQS (28)
46	46
	47	+#define ARMADA_370_XP_TIMER0_PER_CPU_IRQ (5)
	48	+
47	49	#define ACTIVE_DOORBELLS (8)
48	50
49	51	static DEFINE_RAW_SPINLOCK(irq_controller_lock);
@@ -59,36 +61,26 @@ static struct irq_domain *armada_370_xp_mpic_domain; · 9 unmodified lines
59	61	*/
60	62	static void armada_370_xp_irq_mask(struct irq_data *d)
61	63	{
62		−#ifdef CONFIG_SMP
63	64	irq_hw_number_t hwirq = irqd_to_hwirq(d);
64	65
65		− if (hwirq > ARMADA_370_XP_MAX_PER_CPU_IRQS)
	66	+ if (hwirq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ)
66	67	writel(hwirq, main_int_base +
67	68	ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS);
68	69	else
69	70	writel(hwirq, per_cpu_int_base +
70	71	ARMADA_370_XP_INT_SET_MASK_OFFS);
71		−#else
72		− writel(irqd_to_hwirq(d),
73		− per_cpu_int_base + ARMADA_370_XP_INT_SET_MASK_OFFS);
74		−#endif
75	72	}
76	73
77	74	static void armada_370_xp_irq_unmask(struct irq_data *d)
78	75	{
79		−#ifdef CONFIG_SMP
80	76	irq_hw_number_t hwirq = irqd_to_hwirq(d);
81	77
82		− if (hwirq > ARMADA_370_XP_MAX_PER_CPU_IRQS)
	78	+ if (hwirq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ)
83	79	writel(hwirq, main_int_base +
84	80	ARMADA_370_XP_INT_SET_ENABLE_OFFS);
85	81	else
86	82	writel(hwirq, per_cpu_int_base +
87	83	ARMADA_370_XP_INT_CLEAR_MASK_OFFS);
88		−#else
89		− writel(irqd_to_hwirq(d),
90		− per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK_OFFS);
91		−#endif
92	84	}
93	85
94	86	#ifdef CONFIG_SMP
@@ -144,10 +136,14 @@ static int armada_370_xp_mpic_irq_map(struct irq_domain *h, · 49 unmodified lines
144	136	unsigned int virq, irq_hw_number_t hw)
145	137	{
146	138	armada_370_xp_irq_mask(irq_get_irq_data(virq));
147		− writel(hw, main_int_base + ARMADA_370_XP_INT_SET_ENABLE_OFFS);
	139	+ if (hw != ARMADA_370_XP_TIMER0_PER_CPU_IRQ)
	140	+ writel(hw, per_cpu_int_base +
	141	+ ARMADA_370_XP_INT_CLEAR_MASK_OFFS);
	142	+ else
	143	+ writel(hw, main_int_base + ARMADA_370_XP_INT_SET_ENABLE_OFFS);
148	144	irq_set_status_flags(virq, IRQ_LEVEL);
149	145
150		− if (hw < ARMADA_370_XP_MAX_PER_CPU_IRQS) {
	146	+ if (hw == ARMADA_370_XP_TIMER0_PER_CPU_IRQ) {
151	147	irq_set_percpu_devid(virq);
152	148	irq_set_chip_and_handler(virq, &armada_370_xp_irq_chip,
153	149	handle_percpu_devid_irq);

arch/arm/mach-mxs/icoll.c+1−1

@@ -100,7 +100,7 @@ static struct irq_domain_ops icoll_irq_domain_ops = { · 99 unmodified lines
100	100	.xlate = irq_domain_xlate_onecell,
101	101	};
102	102
103		−void __init icoll_of_init(struct device_node *np,
	103	+static void __init icoll_of_init(struct device_node *np,
104	104	struct device_node *interrupt_parent)
105	105	{
106	106	/*

arch/arm/mach-mxs/mach-mxs.c+17−17

@@ -41,8 +41,6 @@ static struct fb_videomode mx23evk_video_modes[] = { · 40 unmodified lines
41	41	.lower_margin = 4,
42	42	.hsync_len = 1,
43	43	.vsync_len = 1,
44		− .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT \|
45		− FB_SYNC_DOTCLK_FAILING_ACT,
46	44	},
47	45	};
48	46
@@ -59,8 +57,6 @@ static struct fb_videomode mx28evk_video_modes[] = { · 10 unmodified lines
59	57	.lower_margin = 10,
60	58	.hsync_len = 10,
61	59	.vsync_len = 10,
62		− .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT \|
63		− FB_SYNC_DOTCLK_FAILING_ACT,
64	60	},
65	61	};
66	62
@@ -77,7 +73,6 @@ static struct fb_videomode m28evk_video_modes[] = { · 10 unmodified lines
77	73	.lower_margin = 45,
78	74	.hsync_len = 1,
79	75	.vsync_len = 1,
80		− .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT,
81	76	},
82	77	};
83	78
@@ -94,9 +89,7 @@ static struct fb_videomode apx4devkit_video_modes[] = { · 10 unmodified lines
94	89	.lower_margin = 13,
95	90	.hsync_len = 48,
96	91	.vsync_len = 3,
97		− .sync = FB_SYNC_HOR_HIGH_ACT \| FB_SYNC_VERT_HIGH_ACT \|
98		− FB_SYNC_DATA_ENABLE_HIGH_ACT \|
99		− FB_SYNC_DOTCLK_FAILING_ACT,
	92	+ .sync = FB_SYNC_HOR_HIGH_ACT \| FB_SYNC_VERT_HIGH_ACT,
100	93	},
101	94	};
102	95
@@ -113,9 +106,7 @@ static struct fb_videomode apf28dev_video_modes[] = { · 10 unmodified lines
113	106	.lower_margin = 0x15,
114	107	.hsync_len = 64,
115	108	.vsync_len = 4,
116		− .sync = FB_SYNC_HOR_HIGH_ACT \| FB_SYNC_VERT_HIGH_ACT \|
117		− FB_SYNC_DATA_ENABLE_HIGH_ACT \|
118		− FB_SYNC_DOTCLK_FAILING_ACT,
	109	+ .sync = FB_SYNC_HOR_HIGH_ACT \| FB_SYNC_VERT_HIGH_ACT,
119	110	},
120	111	};
121	112
@@ -132,7 +123,6 @@ static struct fb_videomode cfa10049_video_modes[] = { · 10 unmodified lines
132	123	.lower_margin = 2,
133	124	.hsync_len = 15,
134	125	.vsync_len = 15,
135		− .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT
136	126	},
137	127	};
138	128
@@ -259,6 +249,8 @@ static void __init imx23_evk_init(void) · 120 unmodified lines
259	249	mxsfb_pdata.mode_count = ARRAY_SIZE(mx23evk_video_modes);
260	250	mxsfb_pdata.default_bpp = 32;
261	251	mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
	252	+ mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT \|
	253	+ MXSFB_SYNC_DOTCLK_FAILING_ACT;
262	254	}
263	255
264	256	static inline void enable_clk_enet_out(void)
@@ -278,6 +270,8 @@ static void __init imx28_evk_init(void) · 13 unmodified lines
278	270	mxsfb_pdata.mode_count = ARRAY_SIZE(mx28evk_video_modes);
279	271	mxsfb_pdata.default_bpp = 32;
280	272	mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
	273	+ mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT \|
	274	+ MXSFB_SYNC_DOTCLK_FAILING_ACT;
281	275
282	276	mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0);
283	277	}
@@ -297,6 +291,7 @@ static void __init m28evk_init(void) · 13 unmodified lines
297	291	mxsfb_pdata.mode_count = ARRAY_SIZE(m28evk_video_modes);
298	292	mxsfb_pdata.default_bpp = 16;
299	293	mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
	294	+ mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT;
300	295	}
301	296
302	297	static void __init sc_sps1_init(void)
@@ -322,6 +317,8 @@ static void __init apx4devkit_init(void) · 19 unmodified lines
322	317	mxsfb_pdata.mode_count = ARRAY_SIZE(apx4devkit_video_modes);
323	318	mxsfb_pdata.default_bpp = 32;
324	319	mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
	320	+ mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT \|
	321	+ MXSFB_SYNC_DOTCLK_FAILING_ACT;
325	322	}
326	323
327	324	#define ENET0_MDC__GPIO_4_0 MXS_GPIO_NR(4, 0)
@@ -402,17 +399,18 @@ static void __init cfa10049_init(void) · 74 unmodified lines
402	399	{
403	400	enable_clk_enet_out();
404	401	update_fec_mac_prop(OUI_CRYSTALFONTZ);
	402	+
	403	+ mxsfb_pdata.mode_list = cfa10049_video_modes;
	404	+ mxsfb_pdata.mode_count = ARRAY_SIZE(cfa10049_video_modes);
	405	+ mxsfb_pdata.default_bpp = 32;
	406	+ mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
	407	+ mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT;
405	408	}
406	409
407	410	static void __init cfa10037_init(void)
408	411	{
409	412	enable_clk_enet_out();
410	413	update_fec_mac_prop(OUI_CRYSTALFONTZ);
411		−
412		− mxsfb_pdata.mode_list = cfa10049_video_modes;
413		− mxsfb_pdata.mode_count = ARRAY_SIZE(cfa10049_video_modes);
414		− mxsfb_pdata.default_bpp = 32;
415		− mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
416	414	}
417	415
418	416	static void __init apf28_init(void)
@@ -423,6 +421,8 @@ static void __init apf28_init(void) · 4 unmodified lines
423	421	mxsfb_pdata.mode_count = ARRAY_SIZE(apf28dev_video_modes);
424	422	mxsfb_pdata.default_bpp = 16;
425	423	mxsfb_pdata.ld_intf_width = STMLCDIF_16BIT;
	424	+ mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT \|
	425	+ MXSFB_SYNC_DOTCLK_FAILING_ACT;
426	426	}
427	427
428	428	static void __init mxs_machine_init(void)

arch/arm/mach-mxs/mm.c+1−0

@@ -18,6 +18,7 @@ · 17 unmodified lines
18	18
19	19	#include <mach/mx23.h>
20	20	#include <mach/mx28.h>
	21	+#include <mach/common.h>
21	22
22	23	/*
23	24	* Define the MX23 memory map.

arch/arm/mach-mxs/ocotp.c+1−0

@@ -19,6 +19,7 @@ · 18 unmodified lines
19	19	#include <asm/processor.h> /* for cpu_relax() */
20	20
21	21	#include <mach/mxs.h>
	22	+#include <mach/common.h>
22	23
23	24	#define OCOTP_WORD_OFFSET 0x20
24	25	#define OCOTP_WORD_COUNT 0x20

arch/arm/mach-omap1/clock_data.c+1−11

@@ -538,15 +538,6 @@ static struct clk usb_hhc_ck16xx = { · 537 unmodified lines
538	538	};
539	539
540	540	static struct clk usb_dc_ck = {
541		− .name = "usb_dc_ck",
542		− .ops = &clkops_generic,
543		− /* Direct from ULPD, no parent */
544		− .rate = 48000000,
545		− .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
546		− .enable_bit = USB_REQ_EN_SHIFT,
547		−};
548		−
549		−static struct clk usb_dc_ck7xx = {
550	541	.name = "usb_dc_ck",
551	542	.ops = &clkops_generic,
552	543	/* Direct from ULPD, no parent */
@@ -727,8 +718,7 @@ static struct omap_clk omap_clks[] = { · 174 unmodified lines
727	718	CLK(NULL, "usb_clko", &usb_clko, CK_16XX \| CK_1510 \| CK_310),
728	719	CLK(NULL, "usb_hhc_ck", &usb_hhc_ck1510, CK_1510 \| CK_310),
729	720	CLK(NULL, "usb_hhc_ck", &usb_hhc_ck16xx, CK_16XX),
730		− CLK(NULL, "usb_dc_ck", &usb_dc_ck, CK_16XX),
731		− CLK(NULL, "usb_dc_ck", &usb_dc_ck7xx, CK_7XX),
	721	+ CLK(NULL, "usb_dc_ck", &usb_dc_ck, CK_16XX \| CK_7XX),
732	722	CLK(NULL, "mclk", &mclk_1510, CK_1510 \| CK_310),
733	723	CLK(NULL, "mclk", &mclk_16xx, CK_16XX),
734	724	CLK(NULL, "bclk", &bclk_1510, CK_1510 \| CK_310),

arch/arm/mach-omap1/common.h+2−0

@@ -31,6 +31,8 @@ · 30 unmodified lines
31	31
32	32	#include <plat/i2c.h>
33	33
	34	+#include <mach/irqs.h>
	35	+
34	36	#if defined(CONFIG_ARCH_OMAP730) \|\| defined(CONFIG_ARCH_OMAP850)
35	37	void omap7xx_map_io(void);
36	38	#else

arch/arm/mach-omap2/Kconfig+0−6

@@ -311,9 +311,6 @@ config MACH_OMAP_ZOOM2 · 310 unmodified lines
311	311	default y
312	312	select OMAP_PACKAGE_CBB
313	313	select REGULATOR_FIXED_VOLTAGE if REGULATOR
314		− select SERIAL_8250
315		− select SERIAL_8250_CONSOLE
316		− select SERIAL_CORE_CONSOLE
317	314
318	315	config MACH_OMAP_ZOOM3
319	316	bool "OMAP3630 Zoom3 board"
@@ -321,9 +318,6 @@ config MACH_OMAP_ZOOM3 · 1 unmodified line
321	318	default y
322	319	select OMAP_PACKAGE_CBP
323	320	select REGULATOR_FIXED_VOLTAGE if REGULATOR
324		− select SERIAL_8250
325		− select SERIAL_8250_CONSOLE
326		− select SERIAL_CORE_CONSOLE
327	321
328	322	config MACH_CM_T35
329	323	bool "CompuLab CM-T35/CM-T3730 modules"

arch/arm/mach-omap2/board-generic.c+2−0

@@ -102,6 +102,7 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)") · 101 unmodified lines
102	102	.init_irq = omap_intc_of_init,
103	103	.handle_irq = omap3_intc_handle_irq,
104	104	.init_machine = omap_generic_init,
	105	+ .init_late = omap3_init_late,
105	106	.init_time = omap3_sync32k_timer_init,
106	107	.dt_compat = omap3_boards_compat,
107	108	.restart = omap3xxx_restart,
@@ -119,6 +120,7 @@ DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)") · 11 unmodified lines
119	120	.init_irq = omap_intc_of_init,
120	121	.handle_irq = omap3_intc_handle_irq,
121	122	.init_machine = omap_generic_init,
	123	+ .init_late = omap3_init_late,
122	124	.init_time = omap3_secure_sync32k_timer_init,
123	125	.dt_compat = omap3_gp_boards_compat,
124	126	.restart = omap3xxx_restart,

arch/arm/mach-omap2/board-rx51.c+2−0

@@ -17,6 +17,7 @@ · 16 unmodified lines
17	17	#include <linux/io.h>
18	18	#include <linux/gpio.h>
19	19	#include <linux/leds.h>
	20	+#include <linux/usb/phy.h>
20	21	#include <linux/usb/musb.h>
21	22	#include <linux/platform_data/spi-omap2-mcspi.h>
22	23
@@ -98,6 +99,7 @@ static void __init rx51_init(void) · 75 unmodified lines
98	99	sdrc_params = nokia_get_sdram_timings();
99	100	omap_sdrc_init(sdrc_params, sdrc_params);
100	101
	102	+ usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
101	103	usb_musb_init(&musb_board_data);
102	104	rx51_peripherals_init();
103	105

arch/arm/mach-omap2/cclock44xx_data.c+20−0

@@ -52,6 +52,13 @@ · 51 unmodified lines
52	52	*/
53	53	#define OMAP4_DPLL_ABE_DEFFREQ 98304000
54	54
	55	+/*
	56	+ * OMAP4 USB DPLL default frequency. In OMAP4430 TRM version V, section
	57	+ * "3.6.3.9.5 DPLL_USB Preferred Settings" shows that the preferred
	58	+ * locked frequency for the USB DPLL is 960MHz.
	59	+ */
	60	+#define OMAP4_DPLL_USB_DEFFREQ 960000000
	61	+
55	62	/* Root clocks */
56	63
57	64	DEFINE_CLK_FIXED_RATE(extalt_clkin_ck, CLK_IS_ROOT, 59000000, 0x0);
@@ -1011,6 +1018,10 @@ DEFINE_CLK_OMAP_MUX(hsmmc2_fclk, "l3_init_clkdm", hsmmc1_fclk_sel, · 953 unmodified lines
1011	1018	OMAP4430_CM_L3INIT_MMC2_CLKCTRL, OMAP4430_CLKSEL_MASK,
1012	1019	hsmmc1_fclk_parents, func_dmic_abe_gfclk_ops);
1013	1020
	1021	+DEFINE_CLK_GATE(ocp2scp_usb_phy_phy_48m, "func_48m_fclk", &func_48m_fclk, 0x0,
	1022	+ OMAP4430_CM_L3INIT_USBPHYOCP2SCP_CLKCTRL,
	1023	+ OMAP4430_OPTFCLKEN_PHY_48M_SHIFT, 0x0, NULL);
	1024	+
1014	1025	DEFINE_CLK_GATE(sha2md5_fck, "l3_div_ck", &l3_div_ck, 0x0,
1015	1026	OMAP4430_CM_L4SEC_SHA2MD51_CLKCTRL,
1016	1027	OMAP4430_MODULEMODE_SWCTRL_SHIFT, 0x0, NULL);
@@ -1538,6 +1549,7 @@ static struct omap_clk omap44xx_clks[] = { · 521 unmodified lines
1538	1549	CLK(NULL, "per_mcbsp4_gfclk", &per_mcbsp4_gfclk, CK_443X),
1539	1550	CLK(NULL, "hsmmc1_fclk", &hsmmc1_fclk, CK_443X),
1540	1551	CLK(NULL, "hsmmc2_fclk", &hsmmc2_fclk, CK_443X),
	1552	+ CLK(NULL, "ocp2scp_usb_phy_phy_48m", &ocp2scp_usb_phy_phy_48m, CK_443X),
1541	1553	CLK(NULL, "sha2md5_fck", &sha2md5_fck, CK_443X),
1542	1554	CLK(NULL, "slimbus1_fclk_1", &slimbus1_fclk_1, CK_443X),
1543	1555	CLK(NULL, "slimbus1_fclk_0", &slimbus1_fclk_0, CK_443X),
@@ -1705,5 +1717,13 @@ int __init omap4xxx_clk_init(void) · 161 unmodified lines
1705	1717	if (rc)
1706	1718	pr_err("%s: failed to configure ABE DPLL!\n", __func__);
1707	1719
	1720	+ /*
	1721	+ * Lock USB DPLL on OMAP4 devices so that the L3INIT power
	1722	+ * domain can transition to retention state when not in use.
	1723	+ */
	1724	+ rc = clk_set_rate(&dpll_usb_ck, OMAP4_DPLL_USB_DEFFREQ);
	1725	+ if (rc)
	1726	+ pr_err("%s: failed to configure USB DPLL!\n", __func__);
	1727	+
1708	1728	return 0;
1709	1729	}

arch/arm/mach-omap2/common.h+3−1

@@ -108,7 +108,6 @@ void omap35xx_init_late(void); · 107 unmodified lines
108	108	void omap3630_init_late(void);
109	109	void am35xx_init_late(void);
110	110	void ti81xx_init_late(void);
111		−void omap4430_init_late(void);
112	111	int omap2_common_pm_late_init(void);
113	112
114	113	#if defined(CONFIG_SOC_OMAP2420) \|\| defined(CONFIG_SOC_OMAP2430)
@@ -294,5 +293,8 @@ extern void omap_reserve(void); · 179 unmodified lines
294	293	struct omap_hwmod;
295	294	extern int omap_dss_reset(struct omap_hwmod *);
296	295
	296	+/* SoC specific clock initializer */
	297	+extern int (*omap_clk_init)(void);
	298	+
297	299	#endif /* __ASSEMBLER__ */
298	300	#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */

arch/arm/mach-omap2/gpmc.c+3−3

@@ -1122,9 +1122,6 @@ int gpmc_calc_timings(struct gpmc_timings *gpmc_t, · 1121 unmodified lines
1122	1122	/* TODO: remove, see function definition */
1123	1123	gpmc_convert_ps_to_ns(gpmc_t);
1124	1124
1125		− /* Now the GPMC is initialised, unreserve the chip-selects */
1126		− gpmc_cs_map = 0;
1127		−
1128	1125	return 0;
1129	1126	}
1130	1127
@@ -1383,6 +1380,9 @@ static int gpmc_probe(struct platform_device *pdev) · 252 unmodified lines
1383	1380	if (IS_ERR_VALUE(gpmc_setup_irq()))
1384	1381	dev_warn(gpmc_dev, "gpmc_setup_irq failed\n");
1385	1382
	1383	+ /* Now the GPMC is initialised, unreserve the chip-selects */
	1384	+ gpmc_cs_map = 0;
	1385	+
1386	1386	rc = gpmc_probe_dt(pdev);
1387	1387	if (rc < 0) {
1388	1388	clk_disable_unprepare(gpmc_l3_clk);

arch/arm/mach-omap2/io.c+12−6

@@ -54,6 +54,12 @@ · 53 unmodified lines
54	54	#include "prm3xxx.h"
55	55	#include "prm44xx.h"
56	56
	57	+/*
	58	+ * omap_clk_init: points to a function that does the SoC-specific
	59	+ * clock initializations
	60	+ */
	61	+int (*omap_clk_init)(void);
	62	+
57	63	/*
58	64	* The machine specific code may provide the extra mapping besides the
59	65	* default mapping provided here.
@@ -397,7 +403,7 @@ void __init omap2420_init_early(void) · 337 unmodified lines
397	403	omap242x_clockdomains_init();
398	404	omap2420_hwmod_init();
399	405	omap_hwmod_init_postsetup();
400		− omap2420_clk_init();
	406	+ omap_clk_init = omap2420_clk_init;
401	407	}
402	408
403	409	void __init omap2420_init_late(void)
@@ -427,7 +433,7 @@ void __init omap2430_init_early(void) · 23 unmodified lines
427	433	omap243x_clockdomains_init();
428	434	omap2430_hwmod_init();
429	435	omap_hwmod_init_postsetup();
430		− omap2430_clk_init();
	436	+ omap_clk_init = omap2430_clk_init;
431	437	}
432	438
433	439	void __init omap2430_init_late(void)
@@ -462,7 +468,7 @@ void __init omap3_init_early(void) · 28 unmodified lines
462	468	omap3xxx_clockdomains_init();
463	469	omap3xxx_hwmod_init();
464	470	omap_hwmod_init_postsetup();
465		− omap3xxx_clk_init();
	471	+ omap_clk_init = omap3xxx_clk_init;
466	472	}
467	473
468	474	void __init omap3430_init_early(void)
@@ -500,7 +506,7 @@ void __init ti81xx_init_early(void) · 31 unmodified lines
500	506	omap3xxx_clockdomains_init();
501	507	omap3xxx_hwmod_init();
502	508	omap_hwmod_init_postsetup();
503		− omap3xxx_clk_init();
	509	+ omap_clk_init = omap3xxx_clk_init;
504	510	}
505	511
506	512	void __init omap3_init_late(void)
@@ -568,7 +574,7 @@ void __init am33xx_init_early(void) · 61 unmodified lines
568	574	am33xx_clockdomains_init();
569	575	am33xx_hwmod_init();
570	576	omap_hwmod_init_postsetup();
571		− am33xx_clk_init();
	577	+ omap_clk_init = am33xx_clk_init;
572	578	}
573	579	#endif
574	580
@@ -593,7 +599,7 @@ void __init omap4430_init_early(void) · 18 unmodified lines
593	599	omap44xx_clockdomains_init();
594	600	omap44xx_hwmod_init();
595	601	omap_hwmod_init_postsetup();
596		− omap4xxx_clk_init();
	602	+ omap_clk_init = omap4xxx_clk_init;
597	603	}
598	604
599	605	void __init omap4430_init_late(void)

arch/arm/mach-omap2/mux.c+5−4

@@ -211,8 +211,6 @@ static int __init _omap_mux_get_by_name(struct omap_mux_partition *partition, · 210 unmodified lines
211	211	return -EINVAL;
212	212	}
213	213
214		− pr_err("%s: Could not find signal %s\n", __func__, muxname);
215		−
216	214	return -ENODEV;
217	215	}
218	216
@@ -234,6 +232,8 @@ int __init omap_mux_get_by_name(const char *muxname, · 15 unmodified lines
234	232	return mux_mode;
235	233	}
236	234
	235	+ pr_err("%s: Could not find signal %s\n", __func__, muxname);
	236	+
237	237	return -ENODEV;
238	238	}
239	239
@@ -739,8 +739,9 @@ static void __init omap_mux_dbg_create_entry( · 499 unmodified lines
739	739	list_for_each_entry(e, &partition->muxmodes, node) {
740	740	struct omap_mux *m = &e->mux;
741	741
742		− (void)debugfs_create_file(m->muxnames[0], S_IWUSR, mux_dbg_dir,
743		− m, &omap_mux_dbg_signal_fops);
	742	+ (void)debugfs_create_file(m->muxnames[0], S_IWUSR \| S_IRUGO,
	743	+ mux_dbg_dir, m,
	744	+ &omap_mux_dbg_signal_fops);
744	745	}
745	746	}
746	747

arch/arm/mach-omap2/omap_hwmod.c+5−2

@@ -1368,7 +1368,9 @@ static void _enable_sysc(struct omap_hwmod *oh) · 1367 unmodified lines
1368	1368	}
1369	1369
1370	1370	if (sf & SYSC_HAS_MIDLEMODE) {
1371		− if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
	1371	+ if (oh->flags & HWMOD_FORCE_MSTANDBY) {
	1372	+ idlemode = HWMOD_IDLEMODE_FORCE;
	1373	+ } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1372	1374	idlemode = HWMOD_IDLEMODE_NO;
1373	1375	} else {
1374	1376	if (sf & SYSC_HAS_ENAWAKEUP)
@@ -1440,7 +1442,8 @@ static void _idle_sysc(struct omap_hwmod *oh) · 65 unmodified lines
1440	1442	}
1441	1443
1442	1444	if (sf & SYSC_HAS_MIDLEMODE) {
1443		− if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
	1445	+ if ((oh->flags & HWMOD_SWSUP_MSTANDBY) \|\|
	1446	+ (oh->flags & HWMOD_FORCE_MSTANDBY)) {
1444	1447	idlemode = HWMOD_IDLEMODE_FORCE;
1445	1448	} else {
1446	1449	if (sf & SYSC_HAS_ENAWAKEUP)

arch/arm/mach-omap2/omap_hwmod.h+7−2

@@ -427,8 +427,8 @@ struct omap_hwmod_omap4_prcm { · 426 unmodified lines
427	427	*
428	428	* HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out
429	429	* of idle, rather than relying on module smart-idle
430		− * HWMOD_SWSUP_MSTDBY: omap_hwmod code should manually bring module in and out
431		− * of standby, rather than relying on module smart-standby
	430	+ * HWMOD_SWSUP_MSTANDBY: omap_hwmod code should manually bring module in and
	431	+ * out of standby, rather than relying on module smart-standby
432	432	* HWMOD_INIT_NO_RESET: don't reset this module at boot - important for
433	433	* SDRAM controller, etc. XXX probably belongs outside the main hwmod file
434	434	* XXX Should be HWMOD_SETUP_NO_RESET
@@ -459,6 +459,10 @@ struct omap_hwmod_omap4_prcm { · 24 unmodified lines
459	459	* correctly, or this is being abused to deal with some PM latency
460	460	* issues -- but we're currently suffering from a shortage of
461	461	* folks who are able to track these issues down properly.
	462	+ * HWMOD_FORCE_MSTANDBY: Always keep MIDLEMODE bits cleared so that device
	463	+ * is kept in force-standby mode. Failing to do so causes PM problems
	464	+ * with musb on OMAP3630 at least. Note that musb has a dedicated register
	465	+ * to control MSTANDBY signal when MIDLEMODE is set to force-standby.
462	466	*/
463	467	#define HWMOD_SWSUP_SIDLE (1 << 0)
464	468	#define HWMOD_SWSUP_MSTANDBY (1 << 1)
@@ -471,6 +475,7 @@ struct omap_hwmod_omap4_prcm { · 6 unmodified lines
471	475	#define HWMOD_16BIT_REG (1 << 8)
472	476	#define HWMOD_EXT_OPT_MAIN_CLK (1 << 9)
473	477	#define HWMOD_BLOCK_WFI (1 << 10)
	478	+#define HWMOD_FORCE_MSTANDBY (1 << 11)
474	479
475	480	/*
476	481	* omap_hwmod._int_flags definitions

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c+6−1

@@ -1707,9 +1707,14 @@ static struct omap_hwmod omap3xxx_usbhsotg_hwmod = { · 1706 unmodified lines
1707	1707	* Erratum ID: i479 idle_req / idle_ack mechanism potentially
1708	1708	* broken when autoidle is enabled
1709	1709	* workaround is to disable the autoidle bit at module level.
	1710	+ *
	1711	+ * Enabling the device in any other MIDLEMODE setting but force-idle
	1712	+ * causes core_pwrdm not enter idle states at least on OMAP3630.
	1713	+ * Note that musb has OTG_FORCESTDBY register that controls MSTANDBY
	1714	+ * signal when MIDLEMODE is set to force-idle.
1710	1715	*/
1711	1716	.flags = HWMOD_NO_OCP_AUTOIDLE \| HWMOD_SWSUP_SIDLE
1712		− \| HWMOD_SWSUP_MSTANDBY,
	1717	+ \| HWMOD_FORCE_MSTANDBY,
1713	1718	};
1714	1719
1715	1720	/* usb_otg_hs */

arch/arm/mach-omap2/omap_hwmod_44xx_data.c+6−0

@@ -2714,6 +2714,10 @@ static struct omap_ocp2scp_dev ocp2scp_dev_attr[] = { · 2713 unmodified lines
2714	2714	{ }
2715	2715	};
2716	2716
	2717	+static struct omap_hwmod_opt_clk ocp2scp_usb_phy_opt_clks[] = {
	2718	+ { .role = "48mhz", .clk = "ocp2scp_usb_phy_phy_48m" },
	2719	+};
	2720	+
2717	2721	/* ocp2scp_usb_phy */
2718	2722	static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = {
2719	2723	.name = "ocp2scp_usb_phy",
@@ -2728,6 +2732,8 @@ static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = { · 8 unmodified lines
2728	2732	},
2729	2733	},
2730	2734	.dev_attr = ocp2scp_dev_attr,
	2735	+ .opt_clks = ocp2scp_usb_phy_opt_clks,
	2736	+ .opt_clks_cnt = ARRAY_SIZE(ocp2scp_usb_phy_opt_clks),
2731	2737	};
2732	2738
2733	2739	/*

arch/arm/mach-omap2/timer.c+4−0

@@ -547,6 +547,8 @@ static inline void __init realtime_counter_init(void) · 546 unmodified lines
547	547	clksrc_nr, clksrc_src) \
548	548	void __init omap##name##_gptimer_timer_init(void) \
549	549	{ \
	550	+ if (omap_clk_init) \
	551	+ omap_clk_init(); \
550	552	omap_dmtimer_init(); \
551	553	omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop); \
552	554	omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src); \
@@ -556,6 +558,8 @@ void __init omap##name##_gptimer_timer_init(void) \ · 3 unmodified lines
556	558	clksrc_nr, clksrc_src) \
557	559	void __init omap##name##_sync32k_timer_init(void) \
558	560	{ \
	561	+ if (omap_clk_init) \
	562	+ omap_clk_init(); \
559	563	omap_dmtimer_init(); \
560	564	omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop); \
561	565	/* Enable the use of clocksource="gp_timer" kernel parameter */ \

arch/arm/mach-pxa/raumfeld.c+1−0

@@ -505,6 +505,7 @@ static struct w1_gpio_platform_data w1_gpio_platform_data = { · 504 unmodified lines
505	505	.pin = GPIO_ONE_WIRE,
506	506	.is_open_drain = 0,
507	507	.enable_external_pullup = w1_enable_external_pullup,
	508	+ .ext_pullup_enable_pin = -EINVAL,
508	509	};
509	510
510	511	struct platform_device raumfeld_w1_gpio_device = {

arch/arm/mach-s3c24xx/include/mach/irqs.h+1−3

@@ -188,10 +188,8 @@ · 187 unmodified lines
188	188
189	189	#if defined(CONFIG_CPU_S3C2416)
190	190	#define NR_IRQS (IRQ_S3C2416_I2S1 + 1)
191		−#elif defined(CONFIG_CPU_S3C2443)
192		−#define NR_IRQS (IRQ_S3C2443_AC97+1)
193	191	#else
194		−#define NR_IRQS (IRQ_S3C2440_AC97+1)
	192	+#define NR_IRQS (IRQ_S3C2443_AC97 + 1)
195	193	#endif
196	194
197	195	/* compatibility define. */

arch/arm/mach-s3c24xx/irq.c+1−1

@@ -500,7 +500,7 @@ struct s3c_irq_intc s3c24xx_init_intc(struct device_node np, · 499 unmodified lines
500	500	base = (void *)0xfd000000;
501	501
502	502	intc->reg_mask = base + 0xa4;
503		− intc->reg_pending = base + 0x08;
	503	+ intc->reg_pending = base + 0xa8;
504	504	irq_num = 20;
505	505	irq_start = S3C2410_IRQ(32);
506	506	irq_offset = 4;

arch/arm/mach-s5pv210/clock.c+18−18

@@ -214,11 +214,6 @@ static struct clk clk_pcmcdclk2 = { · 213 unmodified lines
214	214	.name = "pcmcdclk",
215	215	};
216	216
217		−static struct clk dummy_apb_pclk = {
218		− .name = "apb_pclk",
219		− .id = -1,
220		−};
221		−
222	217	static struct clk *clkset_vpllsrc_list[] = {
223	218	[0] = &clk_fin_vpll,
224	219	[1] = &clk_sclk_hdmi27m,
@@ -305,18 +300,6 @@ static struct clk_ops clk_fout_apll_ops = { · 80 unmodified lines
305	300
306	301	static struct clk init_clocks_off[] = {
307	302	{
308		− .name = "dma",
309		− .devname = "dma-pl330.0",
310		− .parent = &clk_hclk_psys.clk,
311		− .enable = s5pv210_clk_ip0_ctrl,
312		− .ctrlbit = (1 << 3),
313		− }, {
314		− .name = "dma",
315		− .devname = "dma-pl330.1",
316		− .parent = &clk_hclk_psys.clk,
317		− .enable = s5pv210_clk_ip0_ctrl,
318		− .ctrlbit = (1 << 4),
319		− }, {
320	303	.name = "rot",
321	304	.parent = &clk_hclk_dsys.clk,
322	305	.enable = s5pv210_clk_ip0_ctrl,
@@ -573,6 +556,20 @@ static struct clk clk_hsmmc3 = { · 250 unmodified lines
573	556	.ctrlbit = (1<<19),
574	557	};
575	558
	559	+static struct clk clk_pdma0 = {
	560	+ .name = "pdma0",
	561	+ .parent = &clk_hclk_psys.clk,
	562	+ .enable = s5pv210_clk_ip0_ctrl,
	563	+ .ctrlbit = (1 << 3),
	564	+};
	565	+
	566	+static struct clk clk_pdma1 = {
	567	+ .name = "pdma1",
	568	+ .parent = &clk_hclk_psys.clk,
	569	+ .enable = s5pv210_clk_ip0_ctrl,
	570	+ .ctrlbit = (1 << 4),
	571	+};
	572	+
576	573	static struct clk *clkset_uart_list[] = {
577	574	[6] = &clk_mout_mpll.clk,
578	575	[7] = &clk_mout_epll.clk,
@@ -1075,6 +1072,8 @@ static struct clk *clk_cdev[] = { · 496 unmodified lines
1075	1072	&clk_hsmmc1,
1076	1073	&clk_hsmmc2,
1077	1074	&clk_hsmmc3,
	1075	+ &clk_pdma0,
	1076	+ &clk_pdma1,
1078	1077	};
1079	1078
1080	1079	/* Clock initialisation code */
@@ -1333,6 +1332,8 @@ static struct clk_lookup s5pv210_clk_lookup[] = { · 252 unmodified lines
1333	1332	CLKDEV_INIT(NULL, "spi_busclk0", &clk_p),
1334	1333	CLKDEV_INIT("s5pv210-spi.0", "spi_busclk1", &clk_sclk_spi0.clk),
1335	1334	CLKDEV_INIT("s5pv210-spi.1", "spi_busclk1", &clk_sclk_spi1.clk),
	1335	+ CLKDEV_INIT("dma-pl330.0", "apb_pclk", &clk_pdma0),
	1336	+ CLKDEV_INIT("dma-pl330.1", "apb_pclk", &clk_pdma1),
1336	1337	};
1337	1338
1338	1339	void __init s5pv210_register_clocks(void)
@@ -1361,6 +1362,5 @@ void __init s5pv210_register_clocks(void) · 22 unmodified lines
1361	1362	for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++)
1362	1363	s3c_disable_clocks(clk_cdev[ptr], 1);
1363	1364
1364		− s3c24xx_register_clock(&dummy_apb_pclk);
1365	1365	s3c_pwmclk_init();
1366	1366	}

arch/arm/mach-s5pv210/mach-goni.c+1−1

@@ -845,7 +845,7 @@ static struct fimc_source_info goni_camera_sensors[] = { · 844 unmodified lines
845	845	.mux_id = 0,
846	846	.flags = V4L2_MBUS_PCLK_SAMPLE_FALLING \|
847	847	V4L2_MBUS_VSYNC_ACTIVE_LOW,
848		− .bus_type = FIMC_BUS_TYPE_ITU_601,
	848	+ .fimc_bus_type = FIMC_BUS_TYPE_ITU_601,
849	849	.board_info = &noon010pc30_board_info,
850	850	.i2c_bus_num = 0,
851	851	.clk_frequency = 16000000UL,

arch/arm/mach-shmobile/board-marzen.c+1−0

@@ -32,6 +32,7 @@ · 31 unmodified lines
32	32	#include <linux/smsc911x.h>
33	33	#include <linux/spi/spi.h>
34	34	#include <linux/spi/sh_hspi.h>
	35	+#include <linux/mmc/host.h>
35	36	#include <linux/mmc/sh_mobile_sdhi.h>
36	37	#include <linux/mfd/tmio.h>
37	38	#include <linux/usb/otg.h>

arch/arm/mach-spear3xx/spear3xx.c+1−1

@@ -14,7 +14,7 @@ · 13 unmodified lines
14	14	#define pr_fmt(fmt) "SPEAr3xx: " fmt
15	15
16	16	#include <linux/amba/pl022.h>
17		−#include <linux/amba/pl08x.h>
	17	+#include <linux/amba/pl080.h>
18	18	#include <linux/io.h>
19	19	#include <plat/pl080.h>
20	20	#include <mach/generic.h>

arch/arm/mach-ux500/board-mop500-sdi.c+0−1

@@ -81,7 +81,6 @@ static struct stedma40_chan_cfg mop500_sdi0_dma_cfg_tx = { · 80 unmodified lines
81	81	#endif
82	82
83	83	struct mmci_platform_data mop500_sdi0_data = {
84		− .ios_handler = mop500_sdi0_ios_handler,
85	84	.ocr_mask = MMC_VDD_29_30,
86	85	.f_max = 50000000,
87	86	.capabilities = MMC_CAP_4_BIT_DATA \|

arch/arm/mach-ux500/board-mop500.c+12−0

@@ -12,6 +12,7 @@ · 11 unmodified lines
12	12	#include <linux/init.h>
13	13	#include <linux/interrupt.h>
14	14	#include <linux/platform_device.h>
	15	+#include <linux/clk.h>
15	16	#include <linux/io.h>
16	17	#include <linux/i2c.h>
17	18	#include <linux/platform_data/i2c-nomadik.h>
@@ -439,6 +440,15 @@ static void mop500_prox_deactivate(struct device *dev) · 421 unmodified lines
439	440	regulator_put(prox_regulator);
440	441	}
441	442
	443	+void mop500_snowball_ethernet_clock_enable(void)
	444	+{
	445	+ struct clk *clk;
	446	+
	447	+ clk = clk_get_sys("fsmc", NULL);
	448	+ if (!IS_ERR(clk))
	449	+ clk_prepare_enable(clk);
	450	+}
	451	+
442	452	static struct cryp_platform_data u8500_cryp1_platform_data = {
443	453	.mem_to_engine = {
444	454	.dir = STEDMA40_MEM_TO_PERIPH,
@@ -683,6 +693,8 @@ static void __init snowball_init_machine(void) · 238 unmodified lines
683	693	mop500_audio_init(parent);
684	694	mop500_uart_init(parent);
685	695
	696	+ mop500_snowball_ethernet_clock_enable();
	697	+
686	698	/* This board has full regulator constraints */
687	699	regulator_has_full_constraints();
688	700	}

arch/arm/mach-ux500/board-mop500.h+1−0

@@ -104,6 +104,7 @@ void __init mop500_pinmaps_init(void); · 103 unmodified lines
104	104	void __init snowball_pinmaps_init(void);
105	105	void __init hrefv60_pinmaps_init(void);
106	106	void mop500_audio_init(struct device *parent);
	107	+void mop500_snowball_ethernet_clock_enable(void);
107	108
108	109	int __init mop500_uib_init(void);
109	110	void mop500_uib_i2c_add(int busnum, struct i2c_board_info *info,

arch/arm/mach-ux500/cpu-db8500.c+3−2

@@ -312,9 +312,10 @@ static void __init u8500_init_machine(void) · 311 unmodified lines
312	312	/* Pinmaps must be in place before devices register */
313	313	if (of_machine_is_compatible("st-ericsson,mop500"))
314	314	mop500_pinmaps_init();
315		− else if (of_machine_is_compatible("calaosystems,snowball-a9500"))
	315	+ else if (of_machine_is_compatible("calaosystems,snowball-a9500")) {
316	316	snowball_pinmaps_init();
317		− else if (of_machine_is_compatible("st-ericsson,hrefv60+"))
	317	+ mop500_snowball_ethernet_clock_enable();
	318	+ } else if (of_machine_is_compatible("st-ericsson,hrefv60+"))
318	319	hrefv60_pinmaps_init();
319	320	else if (of_machine_is_compatible("st-ericsson,ccu9540")) {}
320	321	/* TODO: Add pinmaps for ccu9540 board. */

arch/arm/mm/Kconfig+1−4

@@ -43,7 +43,7 @@ config CPU_ARM740T · 42 unmodified lines
43	43	depends on !MMU
44	44	select CPU_32v4T
45	45	select CPU_ABRT_LV4T
46		− select CPU_CACHE_V3 # although the core is v4t
	46	+ select CPU_CACHE_V4
47	47	select CPU_CP15_MPU
48	48	select CPU_PABRT_LEGACY
49	49	help
@@ -469,9 +469,6 @@ config CPU_PABRT_V7 · 419 unmodified lines
469	469	bool
470	470
471	471	# The cache model
472		−config CPU_CACHE_V3
473		− bool
474		−
475	472	config CPU_CACHE_V4
476	473	bool
477	474

arch/arm/mm/Makefile+0−1

@@ -33,7 +33,6 @@ obj-$(CONFIG_CPU_PABRT_LEGACY) += pabort-legacy.o · 32 unmodified lines
33	33	obj-$(CONFIG_CPU_PABRT_V6) += pabort-v6.o
34	34	obj-$(CONFIG_CPU_PABRT_V7) += pabort-v7.o
35	35
36		−obj-$(CONFIG_CPU_CACHE_V3) += cache-v3.o
37	36	obj-$(CONFIG_CPU_CACHE_V4) += cache-v4.o
38	37	obj-$(CONFIG_CPU_CACHE_V4WT) += cache-v4wt.o
39	38	obj-$(CONFIG_CPU_CACHE_V4WB) += cache-v4wb.o

arch/arm/mm/cache-feroceon-l2.c+1−0

@@ -343,6 +343,7 @@ void __init feroceon_l2_init(int __l2_wt_override) · 342 unmodified lines
343	343	outer_cache.inv_range = feroceon_l2_inv_range;
344	344	outer_cache.clean_range = feroceon_l2_clean_range;
345	345	outer_cache.flush_range = feroceon_l2_flush_range;
	346	+ outer_cache.inv_all = l2_inv_all;
346	347
347	348	enable_l2();
348	349

arch/arm/mm/cache-l2x0.c+4−7

@@ -299,7 +299,7 @@ static void l2x0_unlock(u32 cache_id) · 298 unmodified lines
299	299	int lockregs;
300	300	int i;
301	301
302		− switch (cache_id) {
	302	+ switch (cache_id & L2X0_CACHE_ID_PART_MASK) {
303	303	case L2X0_CACHE_ID_PART_L310:
304	304	lockregs = 8;
305	305	break;
@@ -333,15 +333,14 @@ void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask) · 27 unmodified lines
333	333	if (cache_id_part_number_from_dt)
334	334	cache_id = cache_id_part_number_from_dt;
335	335	else
336		− cache_id = readl_relaxed(l2x0_base + L2X0_CACHE_ID)
337		− & L2X0_CACHE_ID_PART_MASK;
	336	+ cache_id = readl_relaxed(l2x0_base + L2X0_CACHE_ID);
338	337	aux = readl_relaxed(l2x0_base + L2X0_AUX_CTRL);
339	338
340	339	aux &= aux_mask;
341	340	aux \|= aux_val;
342	341
343	342	/* Determine the number of ways */
344		− switch (cache_id) {
	343	+ switch (cache_id & L2X0_CACHE_ID_PART_MASK) {
345	344	case L2X0_CACHE_ID_PART_L310:
346	345	if (aux & (1 << 16))
347	346	ways = 16;
@@ -725,7 +724,6 @@ static const struct l2x0_of_data pl310_data = { · 377 unmodified lines
725	724	.flush_all = l2x0_flush_all,
726	725	.inv_all = l2x0_inv_all,
727	726	.disable = l2x0_disable,
728		− .set_debug = pl310_set_debug,
729	727	},
730	728	};
731	729
@@ -814,9 +812,8 @@ int __init l2x0_of_init(u32 aux_val, u32 aux_mask) · 82 unmodified lines
814	812	data->save();
815	813
816	814	of_init = true;
817		− l2x0_init(l2x0_base, aux_val, aux_mask);
818		−
819	815	memcpy(&outer_cache, &data->outer_cache, sizeof(outer_cache));
	816	+ l2x0_init(l2x0_base, aux_val, aux_mask);
820	817
821	818	return 0;
822	819	}

arch/arm/mm/cache-v3.S+0−137

@@ -1,137 +0,0 @@
1		−/*
2		− * linux/arch/arm/mm/cache-v3.S
3		− *
4		− * Copyright (C) 1997-2002 Russell king
5		− *
6		− * This program is free software; you can redistribute it and/or modify
7		− * it under the terms of the GNU General Public License version 2 as
8		− * published by the Free Software Foundation.
9		− */
10		−#include <linux/linkage.h>
11		−#include <linux/init.h>
12		−#include <asm/page.h>
13		−#include "proc-macros.S"
14		−
15		−/*
16		− * flush_icache_all()
17		− *
18		− * Unconditionally clean and invalidate the entire icache.
19		− */
20		−ENTRY(v3_flush_icache_all)
21		− mov pc, lr
22		−ENDPROC(v3_flush_icache_all)
23		−
24		−/*
25		− * flush_user_cache_all()
26		− *
27		− * Invalidate all cache entries in a particular address
28		− * space.
29		− *
30		− * - mm - mm_struct describing address space
31		− */
32		−ENTRY(v3_flush_user_cache_all)
33		− /* FALLTHROUGH */
34		−/*
35		− * flush_kern_cache_all()
36		− *
37		− * Clean and invalidate the entire cache.
38		− */
39		−ENTRY(v3_flush_kern_cache_all)
40		− /* FALLTHROUGH */
41		−
42		−/*
43		− * flush_user_cache_range(start, end, flags)
44		− *
45		− * Invalidate a range of cache entries in the specified
46		− * address space.
47		− *
48		− * - start - start address (may not be aligned)
49		− * - end - end address (exclusive, may not be aligned)
50		− * - flags - vma_area_struct flags describing address space
51		− */
52		−ENTRY(v3_flush_user_cache_range)
53		− mov ip, #0
54		− mcreq p15, 0, ip, c7, c0, 0 @ flush ID cache
55		− mov pc, lr
56		−
57		−/*
58		− * coherent_kern_range(start, end)
59		− *
60		− * Ensure coherency between the Icache and the Dcache in the
61		− * region described by start. If you have non-snooping
62		− * Harvard caches, you need to implement this function.
63		− *
64		− * - start - virtual start address
65		− * - end - virtual end address
66		− */
67		−ENTRY(v3_coherent_kern_range)
68		− /* FALLTHROUGH */
69		−
70		−/*
71		− * coherent_user_range(start, end)
72		− *
73		− * Ensure coherency between the Icache and the Dcache in the
74		− * region described by start. If you have non-snooping
75		− * Harvard caches, you need to implement this function.
76		− *
77		− * - start - virtual start address
78		− * - end - virtual end address
79		− */
80		−ENTRY(v3_coherent_user_range)
81		− mov r0, #0
82		− mov pc, lr
83		−
84		−/*
85		− * flush_kern_dcache_area(void *page, size_t size)
86		− *
87		− * Ensure no D cache aliasing occurs, either with itself or
88		− * the I cache
89		− *
90		− * - addr - kernel address
91		− * - size - region size
92		− */
93		−ENTRY(v3_flush_kern_dcache_area)
94		− /* FALLTHROUGH */
95		−
96		−/*
97		− * dma_flush_range(start, end)
98		− *
99		− * Clean and invalidate the specified virtual address range.
100		− *
101		− * - start - virtual start address
102		− * - end - virtual end address
103		− */
104		−ENTRY(v3_dma_flush_range)
105		− mov r0, #0
106		− mcr p15, 0, r0, c7, c0, 0 @ flush ID cache
107		− mov pc, lr
108		−
109		−/*
110		− * dma_unmap_area(start, size, dir)
111		− * - start - kernel virtual start address
112		− * - size - size of region
113		− * - dir - DMA direction
114		− */
115		−ENTRY(v3_dma_unmap_area)
116		− teq r2, #DMA_TO_DEVICE
117		− bne v3_dma_flush_range
118		− /* FALLTHROUGH */
119		−
120		−/*
121		− * dma_map_area(start, size, dir)
122		− * - start - kernel virtual start address
123		− * - size - size of region
124		− * - dir - DMA direction
125		− */
126		−ENTRY(v3_dma_map_area)
127		− mov pc, lr
128		−ENDPROC(v3_dma_unmap_area)
129		−ENDPROC(v3_dma_map_area)
130		−
131		− .globl v3_flush_kern_cache_louis
132		− .equ v3_flush_kern_cache_louis, v3_flush_kern_cache_all
133		−
134		− __INITDATA
135		−
136		− @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
137		− define_cache_functions v3

arch/arm/mm/cache-v4.S+1−1

@@ -58,7 +58,7 @@ ENTRY(v4_flush_kern_cache_all) · 57 unmodified lines
58	58	ENTRY(v4_flush_user_cache_range)
59	59	#ifdef CONFIG_CPU_CP15
60	60	mov ip, #0
61		− mcreq p15, 0, ip, c7, c7, 0 @ flush ID cache
	61	+ mcr p15, 0, ip, c7, c7, 0 @ flush ID cache
62	62	mov pc, lr
63	63	#else
64	64	/* FALLTHROUGH */

arch/arm/mm/context.c+2−1

@@ -48,7 +48,7 @@ static DEFINE_RAW_SPINLOCK(cpu_asid_lock); · 47 unmodified lines
48	48	static atomic64_t asid_generation = ATOMIC64_INIT(ASID_FIRST_VERSION);
49	49	static DECLARE_BITMAP(asid_map, NUM_USER_ASIDS);
50	50
51		−static DEFINE_PER_CPU(atomic64_t, active_asids);
	51	+DEFINE_PER_CPU(atomic64_t, active_asids);
52	52	static DEFINE_PER_CPU(u64, reserved_asids);
53	53	static cpumask_t tlb_flush_pending;
54	54
@@ -215,6 +215,7 @@ void check_and_switch_context(struct mm_struct mm, struct task_struct tsk) · 160 unmodified lines
215	215	if (cpumask_test_and_clear_cpu(cpu, &tlb_flush_pending)) {
216	216	local_flush_bp_all();
217	217	local_flush_tlb_all();
	218	+ dummy_flush_tlb_a15_erratum();
218	219	}
219	220
220	221	atomic64_set(&per_cpu(active_asids, cpu), asid);

arch/arm/mm/dma-mapping.c+3−2

@@ -342,6 +342,7 @@ static int __init atomic_pool_init(void) · 341 unmodified lines
342	342	{
343	343	struct dma_pool *pool = &atomic_pool;
344	344	pgprot_t prot = pgprot_dmacoherent(pgprot_kernel);
	345	+ gfp_t gfp = GFP_KERNEL \| GFP_DMA;
345	346	unsigned long nr_pages = pool->size >> PAGE_SHIFT;
346	347	unsigned long *bitmap;
347	348	struct page *page;
@@ -361,8 +362,8 @@ static int __init atomic_pool_init(void) · 13 unmodified lines
361	362	ptr = __alloc_from_contiguous(NULL, pool->size, prot, &page,
362	363	atomic_pool_init);
363	364	else
364		− ptr = __alloc_remap_buffer(NULL, pool->size, GFP_KERNEL, prot,
365		− &page, atomic_pool_init);
	365	+ ptr = __alloc_remap_buffer(NULL, pool->size, gfp, prot, &page,
	366	+ atomic_pool_init);
366	367	if (ptr) {
367	368	int i;
368	369

arch/arm/mm/mmu.c+49−26

@@ -34,6 +34,7 @@ · 33 unmodified lines
34	34	#include <asm/mach/pci.h>
35	35
36	36	#include "mm.h"
	37	+#include "tcm.h"
37	38
38	39	/*
39	40	* empty_zero_page is a special page that is used for
@@ -598,39 +599,60 @@ static void __init alloc_init_pte(pmd_t *pmd, unsigned long addr, · 558 unmodified lines
598	599	} while (pte++, addr += PAGE_SIZE, addr != end);
599	600	}
600	601
601		−static void __init alloc_init_section(pud_t *pud, unsigned long addr,
602		− unsigned long end, phys_addr_t phys,
603		− const struct mem_type *type)
	602	+static void __init map_init_section(pmd_t *pmd, unsigned long addr,
	603	+ unsigned long end, phys_addr_t phys,
	604	+ const struct mem_type *type)
604	605	{
605		− pmd_t *pmd = pmd_offset(pud, addr);
606		−
	606	+#ifndef CONFIG_ARM_LPAE
607	607	/*
608		− * Try a section mapping - end, addr and phys must all be aligned
609		− * to a section boundary. Note that PMDs refer to the individual
610		− * L1 entries, whereas PGDs refer to a group of L1 entries making
611		− * up one logical pointer to an L2 table.
	608	+ * In classic MMU format, puds and pmds are folded in to
	609	+ * the pgds. pmd_offset gives the PGD entry. PGDs refer to a
	610	+ * group of L1 entries making up one logical pointer to
	611	+ * an L2 table (2MB), where as PMDs refer to the individual
	612	+ * L1 entries (1MB). Hence increment to get the correct
	613	+ * offset for odd 1MB sections.
	614	+ * (See arch/arm/include/asm/pgtable-2level.h)
612	615	*/
613		− if (type->prot_sect && ((addr \| end \| phys) & ~SECTION_MASK) == 0) {
614		− pmd_t *p = pmd;
615		−
616		−#ifndef CONFIG_ARM_LPAE
617		− if (addr & SECTION_SIZE)
618		− pmd++;
	616	+ if (addr & SECTION_SIZE)
	617	+ pmd++;
619	618	#endif
	619	+ do {
	620	+ *pmd = __pmd(phys \| type->prot_sect);
	621	+ phys += SECTION_SIZE;
	622	+ } while (pmd++, addr += SECTION_SIZE, addr != end);
620	623
621		− do {
622		− *pmd = __pmd(phys \| type->prot_sect);
623		− phys += SECTION_SIZE;
624		− } while (pmd++, addr += SECTION_SIZE, addr != end);
	624	+ flush_pmd_entry(pmd);
	625	+}
625	626
626		− flush_pmd_entry(p);
627		− } else {
	627	+static void __init alloc_init_pmd(pud_t *pud, unsigned long addr,
	628	+ unsigned long end, phys_addr_t phys,
	629	+ const struct mem_type *type)
	630	+{
	631	+ pmd_t *pmd = pmd_offset(pud, addr);
	632	+ unsigned long next;
	633	+
	634	+ do {
628	635	/*
629		− * No need to loop; pte's aren't interested in the
630		− * individual L1 entries.
	636	+ * With LPAE, we must loop over to map
	637	+ * all the pmds for the given range.
631	638	*/
632		− alloc_init_pte(pmd, addr, end, __phys_to_pfn(phys), type);
633		− }
	639	+ next = pmd_addr_end(addr, end);
	640	+
	641	+ /*
	642	+ * Try a section mapping - addr, next and phys must all be
	643	+ * aligned to a section boundary.
	644	+ */
	645	+ if (type->prot_sect &&
	646	+ ((addr \| next \| phys) & ~SECTION_MASK) == 0) {
	647	+ map_init_section(pmd, addr, next, phys, type);
	648	+ } else {
	649	+ alloc_init_pte(pmd, addr, next,
	650	+ __phys_to_pfn(phys), type);
	651	+ }
	652	+
	653	+ phys += next - addr;
	654	+
	655	+ } while (pmd++, addr = next, addr != end);
634	656	}
635	657
636	658	static void __init alloc_init_pud(pgd_t *pgd, unsigned long addr,
@@ -641,7 +663,7 @@ static void __init alloc_init_pud(pgd_t *pgd, unsigned long addr, · 4 unmodified lines
641	663
642	664	do {
643	665	next = pud_addr_end(addr, end);
644		− alloc_init_section(pud, addr, next, phys, type);
	666	+ alloc_init_pmd(pud, addr, next, phys, type);
645	667	phys += next - addr;
646	668	} while (pud++, addr = next, addr != end);
647	669	}
@@ -1256,6 +1278,7 @@ void __init paging_init(struct machine_desc *mdesc) · 608 unmodified lines
1256	1278	dma_contiguous_remap();
1257	1279	devicemaps_init(mdesc);
1258	1280	kmap_init();
	1281	+ tcm_init();
1259	1282
1260	1283	top_pmd = pmd_off_k(0xffff0000);
1261	1284

arch/arm/mm/proc-arm740.S+17−13

@@ -77,24 +77,27 @@ __arm740_setup: · 76 unmodified lines
77	77	mcr p15, 0, r0, c6, c0 @ set area 0, default
78	78
79	79	ldr r0, =(CONFIG_DRAM_BASE & 0xFFFFF000) @ base[31:12] of RAM
80		− ldr r1, =(CONFIG_DRAM_SIZE >> 12) @ size of RAM (must be >= 4KB)
81		− mov r2, #10 @ 11 is the minimum (4KB)
82		−1: add r2, r2, #1 @ area size *= 2
83		− mov r1, r1, lsr #1
	80	+ ldr r3, =(CONFIG_DRAM_SIZE >> 12) @ size of RAM (must be >= 4KB)
	81	+ mov r4, #10 @ 11 is the minimum (4KB)
	82	+1: add r4, r4, #1 @ area size *= 2
	83	+ movs r3, r3, lsr #1
84	84	bne 1b @ count not zero r-shift
85		− orr r0, r0, r2, lsl #1 @ the area register value
	85	+ orr r0, r0, r4, lsl #1 @ the area register value
86	86	orr r0, r0, #1 @ set enable bit
87	87	mcr p15, 0, r0, c6, c1 @ set area 1, RAM
88	88
89	89	ldr r0, =(CONFIG_FLASH_MEM_BASE & 0xFFFFF000) @ base[31:12] of FLASH
90		− ldr r1, =(CONFIG_FLASH_SIZE >> 12) @ size of FLASH (must be >= 4KB)
91		− mov r2, #10 @ 11 is the minimum (4KB)
92		−1: add r2, r2, #1 @ area size *= 2
93		− mov r1, r1, lsr #1
	90	+ ldr r3, =(CONFIG_FLASH_SIZE >> 12) @ size of FLASH (must be >= 4KB)
	91	+ cmp r3, #0
	92	+ moveq r0, #0
	93	+ beq 2f
	94	+ mov r4, #10 @ 11 is the minimum (4KB)
	95	+1: add r4, r4, #1 @ area size *= 2
	96	+ movs r3, r3, lsr #1
94	97	bne 1b @ count not zero r-shift
95		− orr r0, r0, r2, lsl #1 @ the area register value
	98	+ orr r0, r0, r4, lsl #1 @ the area register value
96	99	orr r0, r0, #1 @ set enable bit
97		− mcr p15, 0, r0, c6, c2 @ set area 2, ROM/FLASH
	100	+2: mcr p15, 0, r0, c6, c2 @ set area 2, ROM/FLASH
98	101
99	102	mov r0, #0x06
100	103	mcr p15, 0, r0, c2, c0 @ Region 1&2 cacheable
@@ -137,13 +140,14 @@ __arm740_proc_info: · 36 unmodified lines
137	140	.long 0x41807400
138	141	.long 0xfffffff0
139	142	.long 0
	143	+ .long 0
140	144	b __arm740_setup
141	145	.long cpu_arch_name
142	146	.long cpu_elf_name
143		− .long HWCAP_SWP \| HWCAP_HALF \| HWCAP_26BIT
	147	+ .long HWCAP_SWP \| HWCAP_HALF \| HWCAP_THUMB \| HWCAP_26BIT
144	148	.long cpu_arm740_name
145	149	.long arm740_processor_functions
146	150	.long 0
147	151	.long 0
148		− .long v3_cache_fns @ cache model
	152	+ .long v4_cache_fns @ cache model
149	153	.size __arm740_proc_info, . - __arm740_proc_info

arch/arm/mm/proc-arm920.S+1−1

@@ -387,7 +387,7 @@ ENTRY(cpu_arm920_set_pte_ext) · 386 unmodified lines
387	387	/* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */
388	388	.globl cpu_arm920_suspend_size
389	389	.equ cpu_arm920_suspend_size, 4 * 3
390		−#ifdef CONFIG_PM_SLEEP
	390	+#ifdef CONFIG_ARM_CPU_SUSPEND
391	391	ENTRY(cpu_arm920_do_suspend)
392	392	stmfd sp!, {r4 - r6, lr}
393	393	mrc p15, 0, r4, c13, c0, 0 @ PID

arch/arm/mm/proc-arm926.S+1−1

@@ -402,7 +402,7 @@ ENTRY(cpu_arm926_set_pte_ext) · 401 unmodified lines
402	402	/* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */
403	403	.globl cpu_arm926_suspend_size
404	404	.equ cpu_arm926_suspend_size, 4 * 3
405		−#ifdef CONFIG_PM_SLEEP
	405	+#ifdef CONFIG_ARM_CPU_SUSPEND
406	406	ENTRY(cpu_arm926_do_suspend)
407	407	stmfd sp!, {r4 - r6, lr}
408	408	mrc p15, 0, r4, c13, c0, 0 @ PID

arch/arm/mm/proc-mohawk.S+1−1

@@ -350,7 +350,7 @@ ENTRY(cpu_mohawk_set_pte_ext) · 349 unmodified lines
350	350
351	351	.globl cpu_mohawk_suspend_size
352	352	.equ cpu_mohawk_suspend_size, 4 * 6
353		−#ifdef CONFIG_PM_SLEEP
	353	+#ifdef CONFIG_ARM_CPU_SUSPEND
354	354	ENTRY(cpu_mohawk_do_suspend)
355	355	stmfd sp!, {r4 - r9, lr}
356	356	mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode

arch/arm/mm/proc-sa1100.S+1−1

@@ -172,7 +172,7 @@ ENTRY(cpu_sa1100_set_pte_ext) · 171 unmodified lines
172	172
173	173	.globl cpu_sa1100_suspend_size
174	174	.equ cpu_sa1100_suspend_size, 4 * 3
175		−#ifdef CONFIG_PM_SLEEP
	175	+#ifdef CONFIG_ARM_CPU_SUSPEND
176	176	ENTRY(cpu_sa1100_do_suspend)
177	177	stmfd sp!, {r4 - r6, lr}
178	178	mrc p15, 0, r4, c3, c0, 0 @ domain ID

arch/arm/mm/proc-syms.c+2−0

@@ -17,7 +17,9 @@ · 16 unmodified lines
17	17
18	18	#ifndef MULTI_CPU
19	19	EXPORT_SYMBOL(cpu_dcache_clean_area);
	20	+#ifdef CONFIG_MMU
20	21	EXPORT_SYMBOL(cpu_set_pte_ext);
	22	+#endif
21	23	#else
22	24	EXPORT_SYMBOL(processor);
23	25	#endif

arch/arm/mm/proc-v6.S+1−1

@@ -138,7 +138,7 @@ ENTRY(cpu_v6_set_pte_ext) · 137 unmodified lines
138	138	/* Suspend/resume support: taken from arch/arm/mach-s3c64xx/sleep.S */
139	139	.globl cpu_v6_suspend_size
140	140	.equ cpu_v6_suspend_size, 4 * 6
141		−#ifdef CONFIG_PM_SLEEP
	141	+#ifdef CONFIG_ARM_CPU_SUSPEND
142	142	ENTRY(cpu_v6_do_suspend)
143	143	stmfd sp!, {r4 - r9, lr}
144	144	mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID

arch/arm/mm/proc-v7.S+17−2

@@ -420,7 +420,7 @@ __v7_pj4b_proc_info: · 419 unmodified lines
420	420	__v7_ca7mp_proc_info:
421	421	.long 0x410fc070
422	422	.long 0xff0ffff0
423		− __v7_proc __v7_ca7mp_setup, hwcaps = HWCAP_IDIV
	423	+ __v7_proc __v7_ca7mp_setup
424	424	.size __v7_ca7mp_proc_info, . - __v7_ca7mp_proc_info
425	425
426	426	/*
@@ -430,9 +430,24 @@ __v7_ca7mp_proc_info: · 3 unmodified lines
430	430	__v7_ca15mp_proc_info:
431	431	.long 0x410fc0f0
432	432	.long 0xff0ffff0
433		− __v7_proc __v7_ca15mp_setup, hwcaps = HWCAP_IDIV
	433	+ __v7_proc __v7_ca15mp_setup
434	434	.size __v7_ca15mp_proc_info, . - __v7_ca15mp_proc_info
435	435
	436	+ /*
	437	+ * Qualcomm Inc. Krait processors.
	438	+ */
	439	+ .type __krait_proc_info, #object
	440	+__krait_proc_info:
	441	+ .long 0x510f0400 @ Required ID value
	442	+ .long 0xff0ffc00 @ Mask for ID
	443	+ /*
	444	+ * Some Krait processors don't indicate support for SDIV and UDIV
	445	+ * instructions in the ARM instruction set, even though they actually
	446	+ * do support them.
	447	+ */
	448	+ __v7_proc __v7_setup, hwcaps = HWCAP_IDIV
	449	+ .size __krait_proc_info, . - __krait_proc_info
	450	+
436	451	/*
437	452	* Match any ARMv7 processor core.
438	453	*/

arch/arm/mm/proc-xsc3.S+1−1

@@ -413,7 +413,7 @@ ENTRY(cpu_xsc3_set_pte_ext) · 412 unmodified lines
413	413
414	414	.globl cpu_xsc3_suspend_size
415	415	.equ cpu_xsc3_suspend_size, 4 * 6
416		−#ifdef CONFIG_PM_SLEEP
	416	+#ifdef CONFIG_ARM_CPU_SUSPEND
417	417	ENTRY(cpu_xsc3_do_suspend)
418	418	stmfd sp!, {r4 - r9, lr}
419	419	mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode

arch/arm/mm/proc-xscale.S+1−1

@@ -528,7 +528,7 @@ ENTRY(cpu_xscale_set_pte_ext) · 527 unmodified lines
528	528
529	529	.globl cpu_xscale_suspend_size
530	530	.equ cpu_xscale_suspend_size, 4 * 6
531		−#ifdef CONFIG_PM_SLEEP
	531	+#ifdef CONFIG_ARM_CPU_SUSPEND
532	532	ENTRY(cpu_xscale_do_suspend)
533	533	stmfd sp!, {r4 - r9, lr}
534	534	mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode

arch/arm/mm/tcm.hrenamed from arch/arm/kernel/tcm.h+0−0

File renamed without changes.

arch/arm/net/bpf_jit_32.c+1−1

@@ -576,7 +576,7 @@ load_ind: · 575 unmodified lines
576	576	/* x = (((frame + k)) & 0xf) << 2; /
577	577	ctx->seen \|= SEEN_X \| SEEN_DATA \| SEEN_CALL;
578	578	/* the interpreter should deal with the negative K */
579		− if (k < 0)
	579	+ if ((int)k < 0)
580	580	return -1;
581	581	/* offset in r1: we might have to take the slow path */
582	582	emit_mov_i(r_off, k, ctx);

arch/arm/plat-orion/addr-map.c+5−2

@@ -157,9 +157,12 @@ void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg, · 156 unmodified lines
157	157	u32 size = readl(ddr_window_cpu_base + DDR_SIZE_CS_OFF(i));
158	158
159	159	/*
160		− * Chip select enabled?
	160	+ * We only take care of entries for which the chip
	161	+ * select is enabled, and that don't have high base
	162	+ * address bits set (devices can only access the first
	163	+ * 32 bits of the memory).
161	164	*/
162		− if (size & 1) {
	165	+ if ((size & 1) && !(base & 0xF)) {
163	166	struct mbus_dram_window *w;
164	167
165	168	w = &orion_mbus_dram_info.cs[cs++];

arch/arm/plat-spear/Kconfig+1−1

@@ -10,7 +10,7 @@ choice · 9 unmodified lines
10	10
11	11	config ARCH_SPEAR13XX
12	12	bool "ST SPEAr13xx with Device Tree"
13		− select ARCH_HAVE_CPUFREQ
	13	+ select ARCH_HAS_CPUFREQ
14	14	select ARM_GIC
15	15	select CPU_V7
16	16	select GPIO_SPEAR_SPICS

arch/arm64/Kconfig+0−1

@@ -9,7 +9,6 @@ config ARM64 · 8 unmodified lines
9	9	select CLONE_BACKWARDS
10	10	select COMMON_CLK
11	11	select GENERIC_CLOCKEVENTS
12		− select GENERIC_HARDIRQS_NO_DEPRECATED
13	12	select GENERIC_IOMAP
14	13	select GENERIC_IRQ_PROBE
15	14	select GENERIC_IRQ_SHOW

arch/arm64/Kconfig.debug+0−11

@@ -6,17 +6,6 @@ config FRAME_POINTER · 5 unmodified lines
6	6	bool
7	7	default y
8	8
9		−config DEBUG_ERRORS
10		− bool "Verbose kernel error messages"
11		− depends on DEBUG_KERNEL
12		− help
13		− This option controls verbose debugging information which can be
14		− printed when the kernel detects an internal error. This debugging
15		− information is useful to kernel hackers when tracking down problems,
16		− but mostly meaningless to other people. It's safe to say Y unless
17		− you are concerned with the code size or don't want to see these
18		− messages.
19		−
20	9	config DEBUG_STACK_USAGE
21	10	bool "Enable stack utilization instrumentation"
22	11	depends on DEBUG_KERNEL

arch/arm64/configs/defconfig+0−1

@@ -82,4 +82,3 @@ CONFIG_DEBUG_KERNEL=y · 81 unmodified lines
82	82	CONFIG_DEBUG_INFO=y
83	83	# CONFIG_FTRACE is not set
84	84	CONFIG_ATOMIC64_SELFTEST=y
85		−CONFIG_DEBUG_ERRORS=y

arch/arm64/include/asm/ucontext.h+1−1

@@ -22,7 +22,7 @@ struct ucontext { · 21 unmodified lines
22	22	stack_t uc_stack;
23	23	sigset_t uc_sigmask;
24	24	/* glibc uses a 1024-bit sigset_t */
25		− __u8 __unused[(1024 - sizeof(sigset_t)) / 8];
	25	+ __u8 __unused[1024 / 8 - sizeof(sigset_t)];
26	26	/* last for future expansion */
27	27	struct sigcontext uc_mcontext;
28	28	};

arch/arm64/kernel/arm64ksyms.c+2−0

@@ -40,7 +40,9 @@ EXPORT_SYMBOL(__copy_to_user); · 39 unmodified lines
40	40	EXPORT_SYMBOL(__clear_user);
41	41
42	42	/* bitops */
	43	+#ifdef CONFIG_SMP
43	44	EXPORT_SYMBOL(__atomic_hash);
	45	+#endif
44	46
45	47	/* physical memory */
46	48	EXPORT_SYMBOL(memstart_addr);

arch/arm64/kernel/signal32.c+0−1

@@ -549,7 +549,6 @@ int compat_setup_rt_frame(int usig, struct k_sigaction ka, siginfo_t info, · 548 unmodified lines
549	549	sigset_t set, struct pt_regs regs)
550	550	{
551	551	struct compat_rt_sigframe __user *frame;
552		− compat_stack_t stack;
553	552	int err = 0;
554	553
555	554	frame = compat_get_sigframe(ka, regs, sizeof(*frame));

arch/arm64/mm/mmu.c+1−1

@@ -261,7 +261,7 @@ static void __init create_mapping(phys_addr_t phys, unsigned long virt, · 260 unmodified lines
261	261	void __iomem * __init early_io_map(phys_addr_t phys, unsigned long virt)
262	262	{
263	263	unsigned long size, mask;
264		− bool page64k = IS_ENABLED(ARM64_64K_PAGES);
	264	+ bool page64k = IS_ENABLED(CONFIG_ARM64_64K_PAGES);
265	265	pgd_t *pgd;
266	266	pud_t *pud;
267	267	pmd_t *pmd;

arch/avr32/Kconfig+1−1

@@ -7,7 +7,7 @@ config AVR32 · 6 unmodified lines
7	7	select HAVE_OPROFILE
8	8	select HAVE_KPROBES
9	9	select HAVE_GENERIC_HARDIRQS
10		− select HAVE_VIRT_TO_BUS
	10	+ select VIRT_TO_BUS
11	11	select GENERIC_IRQ_PROBE
12	12	select GENERIC_ATOMIC64
13	13	select HARDIRQS_SW_RESEND

arch/avr32/include/asm/io.h+4−0

@@ -165,6 +165,10 @@ BUILDIO_IOPORT(l, u32) · 164 unmodified lines
165	165	#define readw_be __raw_readw
166	166	#define readl_be __raw_readl
167	167
	168	+#define writeb_relaxed writeb
	169	+#define writew_relaxed writew
	170	+#define writel_relaxed writel
	171	+
168	172	#define writeb_be __raw_writeb
169	173	#define writew_be __raw_writew
170	174	#define writel_be __raw_writel

arch/blackfin/Kconfig+1−1

@@ -33,7 +33,7 @@ config BLACKFIN · 32 unmodified lines
33	33	select ARCH_HAVE_CUSTOM_GPIO_H
34	34	select ARCH_WANT_OPTIONAL_GPIOLIB
35	35	select HAVE_UID16
36		− select HAVE_VIRT_TO_BUS
	36	+ select VIRT_TO_BUS
37	37	select ARCH_WANT_IPC_PARSE_VERSION
38	38	select HAVE_GENERIC_HARDIRQS
39	39	select GENERIC_ATOMIC64

arch/c6x/include/asm/irqflags.h+1−1

@@ -27,7 +27,7 @@ static inline unsigned long arch_local_save_flags(void) · 26 unmodified lines
27	27	/* set interrupt enabled status */
28	28	static inline void arch_local_irq_restore(unsigned long flags)
29	29	{
30		− asm volatile (" mvc .s2 %0,CSR\n" : : "b"(flags));
	30	+ asm volatile (" mvc .s2 %0,CSR\n" : : "b"(flags) : "memory");
31	31	}
32	32
33	33	/* unconditionally enable interrupts */

arch/cris/Kconfig+1−1

@@ -43,7 +43,7 @@ config CRIS · 42 unmodified lines
43	43	select GENERIC_ATOMIC64
44	44	select HAVE_GENERIC_HARDIRQS
45	45	select HAVE_UID16
46		− select HAVE_VIRT_TO_BUS
	46	+ select VIRT_TO_BUS
47	47	select ARCH_WANT_IPC_PARSE_VERSION
48	48	select GENERIC_IRQ_SHOW
49	49	select GENERIC_IOMAP

arch/frv/Kconfig+1−1

@@ -6,7 +6,7 @@ config FRV · 5 unmodified lines
6	6	select HAVE_PERF_EVENTS
7	7	select HAVE_UID16
8	8	select HAVE_GENERIC_HARDIRQS
9		− select HAVE_VIRT_TO_BUS
	9	+ select VIRT_TO_BUS
10	10	select GENERIC_IRQ_SHOW
11	11	select HAVE_DEBUG_BUGVERBOSE
12	12	select ARCH_HAVE_NMI_SAFE_CMPXCHG

arch/h8300/Kconfig+1−1

@@ -5,7 +5,7 @@ config H8300 · 4 unmodified lines
5	5	select HAVE_GENERIC_HARDIRQS
6	6	select GENERIC_ATOMIC64
7	7	select HAVE_UID16
8		− select HAVE_VIRT_TO_BUS
	8	+ select VIRT_TO_BUS
9	9	select ARCH_WANT_IPC_PARSE_VERSION
10	10	select GENERIC_IRQ_SHOW
11	11	select GENERIC_CPU_DEVICES

arch/ia64/Kconfig+1−1

@@ -26,7 +26,7 @@ config IA64 · 25 unmodified lines
26	26	select HAVE_MEMBLOCK
27	27	select HAVE_MEMBLOCK_NODE_MAP
28	28	select HAVE_VIRT_CPU_ACCOUNTING
29		− select HAVE_VIRT_TO_BUS
	29	+ select VIRT_TO_BUS
30	30	select ARCH_DISCARD_MEMBLOCK
31	31	select GENERIC_IRQ_PROBE
32	32	select GENERIC_PENDING_IRQ if SMP

arch/ia64/kernel/palinfo.c+13−64

@@ -849,17 +849,6 @@ static palinfo_entry_t palinfo_entries[]={ · 848 unmodified lines
849	849
850	850	#define NR_PALINFO_ENTRIES (int) ARRAY_SIZE(palinfo_entries)
851	851
852		−/*
853		− * this array is used to keep track of the proc entries we create. This is
854		− * required in the module mode when we need to remove all entries. The procfs code
855		− * does not do recursion of deletion
856		− *
857		− * Notes:
858		− * - +1 accounts for the cpuN directory entry in /proc/pal
859		− */
860		−#define NR_PALINFO_PROC_ENTRIES (NR_CPUS*(NR_PALINFO_ENTRIES+1))
861		−
862		−static struct proc_dir_entry *palinfo_proc_entries[NR_PALINFO_PROC_ENTRIES];
863	852	static struct proc_dir_entry *palinfo_dir;
864	853
865	854	/*
@@ -971,60 +960,32 @@ palinfo_read_entry(char page, char start, off_t off, int count, int eof, voi · 105 unmodified lines
971	960	static void __cpuinit
972	961	create_palinfo_proc_entries(unsigned int cpu)
973	962	{
974		−# define CPUSTR "cpu%d"
975		−
976	963	pal_func_cpu_u_t f;
977		− struct proc_dir_entry **pdir;
978	964	struct proc_dir_entry *cpu_dir;
979	965	int j;
980		− char cpustr[sizeof(CPUSTR)];
981		−
982		−
983		− /*
984		− * we keep track of created entries in a depth-first order for
985		− * cleanup purposes. Each entry is stored into palinfo_proc_entries
986		− */
987		− sprintf(cpustr,CPUSTR, cpu);
	966	+ char cpustr[3+4+1]; /* cpu numbers are up to 4095 on itanic */
	967	+ sprintf(cpustr, "cpu%d", cpu);
988	968
989	969	cpu_dir = proc_mkdir(cpustr, palinfo_dir);
	970	+ if (!cpu_dir)
	971	+ return;
990	972
991	973	f.req_cpu = cpu;
992	974
993		− /*
994		− * Compute the location to store per cpu entries
995		− * We dont store the top level entry in this list, but
996		− * remove it finally after removing all cpu entries.
997		− */
998		− pdir = &palinfo_proc_entries[cpu*(NR_PALINFO_ENTRIES+1)];
999		− *pdir++ = cpu_dir;
1000	975	for (j=0; j < NR_PALINFO_ENTRIES; j++) {
1001	976	f.func_id = j;
1002		− *pdir = create_proc_read_entry(
1003		− palinfo_entries[j].name, 0, cpu_dir,
1004		− palinfo_read_entry, (void *)f.value);
1005		− pdir++;
	977	+ create_proc_read_entry(
	978	+ palinfo_entries[j].name, 0, cpu_dir,
	979	+ palinfo_read_entry, (void *)f.value);
1006	980	}
1007	981	}
1008	982
1009	983	static void
1010	984	remove_palinfo_proc_entries(unsigned int hcpu)
1011	985	{
1012		− int j;
1013		− struct proc_dir_entry cpu_dir, *pdir;
1014		−
1015		− pdir = &palinfo_proc_entries[hcpu*(NR_PALINFO_ENTRIES+1)];
1016		− cpu_dir = *pdir;
1017		− *pdir++=NULL;
1018		− for (j=0; j < (NR_PALINFO_ENTRIES); j++) {
1019		− if ((*pdir)) {
1020		− remove_proc_entry ((*pdir)->name, cpu_dir);
1021		− *pdir ++= NULL;
1022		− }
1023		− }
1024		−
1025		− if (cpu_dir) {
1026		− remove_proc_entry(cpu_dir->name, palinfo_dir);
1027		− }
	986	+ char cpustr[3+4+1]; /* cpu numbers are up to 4095 on itanic */
	987	+ sprintf(cpustr, "cpu%d", hcpu);
	988	+ remove_proc_subtree(cpustr, palinfo_dir);
1028	989	}
1029	990
1030	991	static int __cpuinit palinfo_cpu_callback(struct notifier_block *nfb,
@@ -1058,6 +1019,8 @@ palinfo_init(void) · 27 unmodified lines
1058	1019
1059	1020	printk(KERN_INFO "PAL Information Facility v%s\n", PALINFO_VERSION);
1060	1021	palinfo_dir = proc_mkdir("pal", NULL);
	1022	+ if (!palinfo_dir)
	1023	+ return -ENOMEM;
1061	1024
1062	1025	/* Create palinfo dirs in /proc for all online cpus */
1063	1026	for_each_online_cpu(i) {
@@ -1073,22 +1036,8 @@ palinfo_init(void) · 9 unmodified lines
1073	1036	static void __exit
1074	1037	palinfo_exit(void)
1075	1038	{
1076		− int i = 0;
1077		−
1078		− /* remove all nodes: depth first pass. Could optimize this */
1079		− for_each_online_cpu(i) {
1080		− remove_palinfo_proc_entries(i);
1081		− }
1082		−
1083		− /*
1084		− * Remove the top level entry finally
1085		− */
1086		− remove_proc_entry(palinfo_dir->name, NULL);
1087		−
1088		− /*
1089		− * Unregister from cpu notifier callbacks
1090		− */
1091	1039	unregister_hotcpu_notifier(&palinfo_cpu_notifier);
	1040	+ remove_proc_subtree("pal", NULL);
1092	1041	}
1093	1042
1094	1043	module_init(palinfo_init);

arch/ia64/kernel/process.c+1−4

@@ -291,7 +291,6 @@ cpu_idle (void) · 290 unmodified lines
291	291	}
292	292
293	293	if (!need_resched()) {
294		− void (*idle)(void);
295	294	#ifdef CONFIG_SMP
296	295	min_xtp();
297	296	#endif
@@ -299,9 +298,7 @@ cpu_idle (void) · 1 unmodified line
299	298	if (mark_idle)
300	299	(*mark_idle)(1);
301	300
302		− if (!idle)
303		− idle = default_idle;
304		− (*idle)();
	301	+ default_idle();
305	302	if (mark_idle)
306	303	(*mark_idle)(0);
307	304	#ifdef CONFIG_SMP

arch/m32r/Kconfig+1−1

@@ -10,7 +10,7 @@ config M32R · 9 unmodified lines
10	10	select ARCH_WANT_IPC_PARSE_VERSION
11	11	select HAVE_DEBUG_BUGVERBOSE
12	12	select HAVE_GENERIC_HARDIRQS
13		− select HAVE_VIRT_TO_BUS
	13	+ select VIRT_TO_BUS
14	14	select GENERIC_IRQ_PROBE
15	15	select GENERIC_IRQ_SHOW
16	16	select GENERIC_ATOMIC64

arch/m32r/include/uapi/asm/stat.h+2−2

@@ -63,10 +63,10 @@ struct stat64 { · 62 unmodified lines
63	63	long long st_size;
64	64	unsigned long st_blksize;
65	65
66		−#if defined(__BIG_ENDIAN)
	66	+#if defined(__BYTE_ORDER) ? __BYTE_ORDER == __BIG_ENDIAN : defined(__BIG_ENDIAN)
67	67	unsigned long __pad4; /* future possible st_blocks high bits */
68	68	unsigned long st_blocks; /* Number 512-byte blocks allocated. */
69		−#elif defined(__LITTLE_ENDIAN)
	69	+#elif defined(__BYTE_ORDER) ? __BYTE_ORDER == __LITTLE_ENDIAN : defined(__LITTLE_ENDIAN)
70	70	unsigned long st_blocks; /* Number 512-byte blocks allocated. */
71	71	unsigned long __pad4; /* future possible st_blocks high bits */
72	72	#else

arch/m68k/Kconfig+1−1

@@ -8,7 +8,7 @@ config M68K · 7 unmodified lines
8	8	select GENERIC_IRQ_SHOW
9	9	select GENERIC_ATOMIC64
10	10	select HAVE_UID16
11		− select HAVE_VIRT_TO_BUS
	11	+ select VIRT_TO_BUS
12	12	select ARCH_HAVE_NMI_SAFE_CMPXCHG if RMW_INSNS
13	13	select GENERIC_CPU_DEVICES
14	14	select GENERIC_STRNCPY_FROM_USER if MMU

arch/m68k/Kconfig.machine+0−1

@@ -310,7 +310,6 @@ config COBRA5282 · 309 unmodified lines
310	310	config SOM5282EM
311	311	bool "EMAC.Inc SOM5282EM board support"
312	312	depends on M528x
313		− select EMAC_INC
314	313	help
315	314	Support for the EMAC.Inc SOM5282EM module.
316	315

arch/m68k/include/asm/MC68328.h+5−5

@@ -293,7 +293,7 @@ · 292 unmodified lines
293	293	/*
294	294	* Here go the bitmasks themselves
295	295	*/
296		−#define IMR_MSPIM (1 << SPIM _IRQ_NUM) /* Mask SPI Master interrupt */
	296	+#define IMR_MSPIM (1 << SPIM_IRQ_NUM) /* Mask SPI Master interrupt */
297	297	#define IMR_MTMR2 (1 << TMR2_IRQ_NUM) /* Mask Timer 2 interrupt */
298	298	#define IMR_MUART (1 << UART_IRQ_NUM) /* Mask UART interrupt */
299	299	#define IMR_MWDT (1 << WDT_IRQ_NUM) /* Mask Watchdog Timer interrupt */
@@ -327,7 +327,7 @@ · 27 unmodified lines
327	327	#define IWR_ADDR 0xfffff308
328	328	#define IWR LONG_REF(IWR_ADDR)
329	329
330		−#define IWR_SPIM (1 << SPIM _IRQ_NUM) /* SPI Master interrupt */
	330	+#define IWR_SPIM (1 << SPIM_IRQ_NUM) /* SPI Master interrupt */
331	331	#define IWR_TMR2 (1 << TMR2_IRQ_NUM) /* Timer 2 interrupt */
332	332	#define IWR_UART (1 << UART_IRQ_NUM) /* UART interrupt */
333	333	#define IWR_WDT (1 << WDT_IRQ_NUM) /* Watchdog Timer interrupt */
@@ -357,7 +357,7 @@ · 23 unmodified lines
357	357	#define ISR_ADDR 0xfffff30c
358	358	#define ISR LONG_REF(ISR_ADDR)
359	359
360		−#define ISR_SPIM (1 << SPIM _IRQ_NUM) /* SPI Master interrupt */
	360	+#define ISR_SPIM (1 << SPIM_IRQ_NUM) /* SPI Master interrupt */
361	361	#define ISR_TMR2 (1 << TMR2_IRQ_NUM) /* Timer 2 interrupt */
362	362	#define ISR_UART (1 << UART_IRQ_NUM) /* UART interrupt */
363	363	#define ISR_WDT (1 << WDT_IRQ_NUM) /* Watchdog Timer interrupt */
@@ -391,7 +391,7 @@ · 27 unmodified lines
391	391	#define IPR_ADDR 0xfffff310
392	392	#define IPR LONG_REF(IPR_ADDR)
393	393
394		−#define IPR_SPIM (1 << SPIM _IRQ_NUM) /* SPI Master interrupt */
	394	+#define IPR_SPIM (1 << SPIM_IRQ_NUM) /* SPI Master interrupt */
395	395	#define IPR_TMR2 (1 << TMR2_IRQ_NUM) /* Timer 2 interrupt */
396	396	#define IPR_UART (1 << UART_IRQ_NUM) /* UART interrupt */
397	397	#define IPR_WDT (1 << WDT_IRQ_NUM) /* Watchdog Timer interrupt */
@@ -757,7 +757,7 @@ · 359 unmodified lines
757	757
758	758	/* 'EZ328-compatible definitions */
759	759	#define TCN_ADDR TCN1_ADDR
760		−#define TCN TCN
	760	+#define TCN TCN1
761	761
762	762	/*
763	763	* Timer Unit 1 and 2 Status Registers

arch/m68k/include/asm/gpio.h+20−0

@@ -86,4 +86,24 @@ static inline int gpio_cansleep(unsigned gpio) · 85 unmodified lines
86	86	return gpio < MCFGPIO_PIN_MAX ? 0 : __gpio_cansleep(gpio);
87	87	}
88	88
	89	+static inline int gpio_request_one(unsigned gpio, unsigned long flags, const char *label)
	90	+{
	91	+ int err;
	92	+
	93	+ err = gpio_request(gpio, label);
	94	+ if (err)
	95	+ return err;
	96	+
	97	+ if (flags & GPIOF_DIR_IN)
	98	+ err = gpio_direction_input(gpio);
	99	+ else
	100	+ err = gpio_direction_output(gpio,
	101	+ (flags & GPIOF_INIT_HIGH) ? 1 : 0);
	102	+
	103	+ if (err)
	104	+ gpio_free(gpio);
	105	+
	106	+ return err;
	107	+}
	108	+
89	109	#endif

arch/m68k/kernel/setup_no.c+3−0

@@ -57,6 +57,9 @@ void (*mach_reset)(void); · 56 unmodified lines
57	57	void (*mach_halt)(void);
58	58	void (*mach_power_off)(void);
59	59
	60	+#ifdef CONFIG_M68000
	61	+#define CPU_NAME "MC68000"
	62	+#endif
60	63	#ifdef CONFIG_M68328
61	64	#define CPU_NAME "MC68328"
62	65	#endif

arch/m68k/mm/init.c+1−1

@@ -188,7 +188,7 @@ void __init mem_init(void) · 187 unmodified lines
188	188	}
189	189	}
190	190
191		−#if !defined(CONFIG_SUN3) && !defined(CONFIG_COLDFIRE)
	191	+#if defined(CONFIG_MMU) && !defined(CONFIG_SUN3) && !defined(CONFIG_COLDFIRE)
192	192	/* insert pointer tables allocated so far into the tablelist */
193	193	init_pointer_table((unsigned long)kernel_pg_dir);
194	194	for (i = 0; i < PTRS_PER_PGD; i++) {

arch/m68k/platform/coldfire/m528x.c+1−1

@@ -69,7 +69,7 @@ static void __init m528x_uarts_init(void) · 68 unmodified lines
69	69	u8 port;
70	70
71	71	/* make sure PUAPAR is set for UART0 and UART1 */
72		− port = readb(MCF5282_GPIO_PUAPAR);
	72	+ port = readb(MCFGPIO_PUAPAR);
73	73	port \|= 0x03 \| (0x03 << 2);
74	74	writeb(port, MCFGPIO_PUAPAR);
75	75	}

arch/microblaze/Kconfig+1−1

@@ -19,7 +19,7 @@ config MICROBLAZE · 18 unmodified lines
19	19	select HAVE_DEBUG_KMEMLEAK
20	20	select IRQ_DOMAIN
21	21	select HAVE_GENERIC_HARDIRQS
22		− select HAVE_VIRT_TO_BUS
	22	+ select VIRT_TO_BUS
23	23	select GENERIC_IRQ_PROBE
24	24	select GENERIC_IRQ_SHOW
25	25	select GENERIC_PCI_IOMAP

arch/mips/Kconfig+4−5

@@ -18,7 +18,7 @@ config MIPS · 17 unmodified lines
18	18	select HAVE_KRETPROBES
19	19	select HAVE_DEBUG_KMEMLEAK
20	20	select ARCH_BINFMT_ELF_RANDOMIZE_PIE
21		− select HAVE_ARCH_TRANSPARENT_HUGEPAGE
	21	+ select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
22	22	select RTC_LIB if !MACH_LOONGSON
23	23	select GENERIC_ATOMIC64 if !64BIT
24	24	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
@@ -38,7 +38,7 @@ config MIPS · 13 unmodified lines
38	38	select GENERIC_CLOCKEVENTS
39	39	select GENERIC_CMOS_UPDATE
40	40	select HAVE_MOD_ARCH_SPECIFIC
41		− select HAVE_VIRT_TO_BUS
	41	+ select VIRT_TO_BUS
42	42	select MODULES_USE_ELF_REL if MODULES
43	43	select MODULES_USE_ELF_RELA if MODULES && 64BIT
44	44	select CLONE_BACKWARDS
@@ -657,7 +657,7 @@ config SNI_RM · 612 unmodified lines
657	657	bool "SNI RM200/300/400"
658	658	select FW_ARC if CPU_LITTLE_ENDIAN
659	659	select FW_ARC32 if CPU_LITTLE_ENDIAN
660		− select SNIPROM if CPU_BIG_ENDIAN
	660	+ select FW_SNIPROM if CPU_BIG_ENDIAN
661	661	select ARCH_MAY_HAVE_PC_FDC
662	662	select BOOT_ELF32
663	663	select CEVT_R4K
@@ -1144,7 +1144,7 @@ config DEFAULT_SGI_PARTITION · 480 unmodified lines
1144	1144	config FW_ARC32
1145	1145	bool
1146	1146
1147		−config SNIPROM
	1147	+config FW_SNIPROM
1148	1148	bool
1149	1149
1150	1150	config BOOT_ELF32
@@ -1493,7 +1493,6 @@ config CPU_XLP · 342 unmodified lines
1493	1493	select CPU_SUPPORTS_32BIT_KERNEL
1494	1494	select CPU_SUPPORTS_64BIT_KERNEL
1495	1495	select CPU_SUPPORTS_HIGHMEM
1496		− select CPU_HAS_LLSC
1497	1496	select WEAK_ORDERING
1498	1497	select WEAK_REORDERING_BEYOND_LLSC
1499	1498	select CPU_HAS_PREFETCH

arch/mips/bcm63xx/boards/board_bcm963xx.c+1−4

@@ -745,10 +745,7 @@ void __init board_prom_init(void) · 744 unmodified lines
745	745	strcpy(cfe_version, "unknown");
746	746	printk(KERN_INFO PFX "CFE version: %s\n", cfe_version);
747	747
748		− if (bcm63xx_nvram_init(boot_addr + BCM963XX_NVRAM_OFFSET)) {
749		− printk(KERN_ERR PFX "invalid nvram checksum\n");
750		− return;
751		− }
	748	+ bcm63xx_nvram_init(boot_addr + BCM963XX_NVRAM_OFFSET);
752	749
753	750	board_name = bcm63xx_nvram_get_name();
754	751	/* find board by name */

arch/mips/bcm63xx/nvram.c+3−4

@@ -38,7 +38,7 @@ struct bcm963xx_nvram { · 37 unmodified lines
38	38	static struct bcm963xx_nvram nvram;
39	39	static int mac_addr_used;
40	40
41		−int __init bcm63xx_nvram_init(void *addr)
	41	+void __init bcm63xx_nvram_init(void *addr)
42	42	{
43	43	unsigned int check_len;
44	44	u32 crc, expected_crc;
@@ -60,9 +60,8 @@ int __init bcm63xx_nvram_init(void *addr) · 15 unmodified lines
60	60	crc = crc32_le(~0, (u8 *)&nvram, check_len);
61	61
62	62	if (crc != expected_crc)
63		− return -EINVAL;
64		−
65		− return 0;
	63	+ pr_warn("nvram checksum failed, contents may be invalid (expected %08x, got %08x)\n",
	64	+ expected_crc, crc);
66	65	}
67	66
68	67	u8 *bcm63xx_nvram_get_name(void)

arch/mips/bcm63xx/setup.c+1−1

@@ -157,4 +157,4 @@ int __init bcm63xx_register_devices(void) · 156 unmodified lines
157	157	return board_register_devices();
158	158	}
159	159
160		−device_initcall(bcm63xx_register_devices);
	160	+arch_initcall(bcm63xx_register_devices);

arch/mips/cavium-octeon/setup.c+4−1

@@ -174,7 +174,10 @@ static int octeon_kexec_prepare(struct kimage *image) · 173 unmodified lines
174	174
175	175	static void octeon_generic_shutdown(void)
176	176	{
177		− int cpu, i;
	177	+ int i;
	178	+#ifdef CONFIG_SMP
	179	+ int cpu;
	180	+#endif
178	181	struct cvmx_bootmem_desc *bootmem_desc;
179	182	void *named_block_array_ptr;
180	183

arch/mips/include/asm/mach-bcm63xx/bcm63xx_nvram.h+1−3

@@ -9,10 +9,8 @@ · 8 unmodified lines
9	9	*
10	10	* Initialized the local nvram copy from the target address and checks
11	11	* its checksum.
12		− *
13		− * Returns 0 on success.
14	12	*/
15		−int __init bcm63xx_nvram_init(void *nvram);
	13	+void bcm63xx_nvram_init(void *nvram);
16	14
17	15	/**
18	16	* bcm63xx_nvram_get_name() - returns the board name according to nvram

arch/mips/include/asm/mach-sead3/cpu-feature-overrides.h+0−4

@@ -28,11 +28,7 @@ · 27 unmodified lines
28	28	/* #define cpu_has_prefetch ? */
29	29	#define cpu_has_mcheck 1
30	30	/* #define cpu_has_ejtag ? */
31		−#ifdef CONFIG_CPU_HAS_LLSC
32	31	#define cpu_has_llsc 1
33		−#else
34		−#define cpu_has_llsc 0
35		−#endif
36	32	/* #define cpu_has_vtag_icache ? */
37	33	/* #define cpu_has_dc_aliases ? */
38	34	/* #define cpu_has_ic_fills_f_dc ? */

arch/mips/include/asm/mipsregs.h+190−19

@@ -1166,7 +1166,10 @@ do { \ · 1165 unmodified lines
1166	1166	unsigned int __dspctl; \
1167	1167	\
1168	1168	__asm__ __volatile__( \
	1169	+ " .set push \n" \
	1170	+ " .set dsp \n" \
1169	1171	" rddsp %0, %x1 \n" \
	1172	+ " .set pop \n" \
1170	1173	: "=r" (__dspctl) \
1171	1174	: "i" (mask)); \
1172	1175	__dspctl; \
@@ -1175,30 +1178,198 @@ do { \ · 2 unmodified lines
1175	1178	#define wrdsp(val, mask) \
1176	1179	do { \
1177	1180	__asm__ __volatile__( \
	1181	+ " .set push \n" \
	1182	+ " .set dsp \n" \
1178	1183	" wrdsp %0, %x1 \n" \
	1184	+ " .set pop \n" \
1179	1185	: \
1180	1186	: "r" (val), "i" (mask)); \
1181	1187	} while (0)
1182	1188
1183		−#define mflo0() ({ long mflo0; __asm__("mflo %0, $ac0" : "=r" (mflo0)); mflo0;})
1184		−#define mflo1() ({ long mflo1; __asm__("mflo %0, $ac1" : "=r" (mflo1)); mflo1;})
1185		−#define mflo2() ({ long mflo2; __asm__("mflo %0, $ac2" : "=r" (mflo2)); mflo2;})
1186		−#define mflo3() ({ long mflo3; __asm__("mflo %0, $ac3" : "=r" (mflo3)); mflo3;})
1187		−
1188		−#define mfhi0() ({ long mfhi0; __asm__("mfhi %0, $ac0" : "=r" (mfhi0)); mfhi0;})
1189		−#define mfhi1() ({ long mfhi1; __asm__("mfhi %0, $ac1" : "=r" (mfhi1)); mfhi1;})
1190		−#define mfhi2() ({ long mfhi2; __asm__("mfhi %0, $ac2" : "=r" (mfhi2)); mfhi2;})
1191		−#define mfhi3() ({ long mfhi3; __asm__("mfhi %0, $ac3" : "=r" (mfhi3)); mfhi3;})
1192		−
1193		−#define mtlo0(x) __asm__("mtlo %0, $ac0" ::"r" (x))
1194		−#define mtlo1(x) __asm__("mtlo %0, $ac1" ::"r" (x))
1195		−#define mtlo2(x) __asm__("mtlo %0, $ac2" ::"r" (x))
1196		−#define mtlo3(x) __asm__("mtlo %0, $ac3" ::"r" (x))
1197		−
1198		−#define mthi0(x) __asm__("mthi %0, $ac0" ::"r" (x))
1199		−#define mthi1(x) __asm__("mthi %0, $ac1" ::"r" (x))
1200		−#define mthi2(x) __asm__("mthi %0, $ac2" ::"r" (x))
1201		−#define mthi3(x) __asm__("mthi %0, $ac3" ::"r" (x))
	1189	+#define mflo0() \
	1190	+({ \
	1191	+ long mflo0; \
	1192	+ __asm__( \
	1193	+ " .set push \n" \
	1194	+ " .set dsp \n" \
	1195	+ " mflo %0, $ac0 \n" \
	1196	+ " .set pop \n" \
	1197	+ : "=r" (mflo0)); \
	1198	+ mflo0; \
	1199	+})
	1200	+
	1201	+#define mflo1() \
	1202	+({ \
	1203	+ long mflo1; \
	1204	+ __asm__( \
	1205	+ " .set push \n" \
	1206	+ " .set dsp \n" \
	1207	+ " mflo %0, $ac1 \n" \
	1208	+ " .set pop \n" \
	1209	+ : "=r" (mflo1)); \
	1210	+ mflo1; \
	1211	+})
	1212	+
	1213	+#define mflo2() \
	1214	+({ \
	1215	+ long mflo2; \
	1216	+ __asm__( \
	1217	+ " .set push \n" \
	1218	+ " .set dsp \n" \
	1219	+ " mflo %0, $ac2 \n" \
	1220	+ " .set pop \n" \
	1221	+ : "=r" (mflo2)); \
	1222	+ mflo2; \
	1223	+})
	1224	+
	1225	+#define mflo3() \
	1226	+({ \
	1227	+ long mflo3; \
	1228	+ __asm__( \
	1229	+ " .set push \n" \
	1230	+ " .set dsp \n" \
	1231	+ " mflo %0, $ac3 \n" \
	1232	+ " .set pop \n" \
	1233	+ : "=r" (mflo3)); \
	1234	+ mflo3; \
	1235	+})
	1236	+
	1237	+#define mfhi0() \
	1238	+({ \
	1239	+ long mfhi0; \
	1240	+ __asm__( \
	1241	+ " .set push \n" \
	1242	+ " .set dsp \n" \
	1243	+ " mfhi %0, $ac0 \n" \
	1244	+ " .set pop \n" \
	1245	+ : "=r" (mfhi0)); \
	1246	+ mfhi0; \
	1247	+})
	1248	+
	1249	+#define mfhi1() \
	1250	+({ \
	1251	+ long mfhi1; \
	1252	+ __asm__( \
	1253	+ " .set push \n" \
	1254	+ " .set dsp \n" \
	1255	+ " mfhi %0, $ac1 \n" \
	1256	+ " .set pop \n" \
	1257	+ : "=r" (mfhi1)); \
	1258	+ mfhi1; \
	1259	+})
	1260	+
	1261	+#define mfhi2() \
	1262	+({ \
	1263	+ long mfhi2; \
	1264	+ __asm__( \
	1265	+ " .set push \n" \
	1266	+ " .set dsp \n" \
	1267	+ " mfhi %0, $ac2 \n" \
	1268	+ " .set pop \n" \
	1269	+ : "=r" (mfhi2)); \
	1270	+ mfhi2; \
	1271	+})
	1272	+
	1273	+#define mfhi3() \
	1274	+({ \
	1275	+ long mfhi3; \
	1276	+ __asm__( \
	1277	+ " .set push \n" \
	1278	+ " .set dsp \n" \
	1279	+ " mfhi %0, $ac3 \n" \
	1280	+ " .set pop \n" \
	1281	+ : "=r" (mfhi3)); \
	1282	+ mfhi3; \
	1283	+})
	1284	+
	1285	+
	1286	+#define mtlo0(x) \
	1287	+({ \
	1288	+ __asm__( \
	1289	+ " .set push \n" \
	1290	+ " .set dsp \n" \
	1291	+ " mtlo %0, $ac0 \n" \
	1292	+ " .set pop \n" \
	1293	+ : \
	1294	+ : "r" (x)); \
	1295	+})
	1296	+
	1297	+#define mtlo1(x) \
	1298	+({ \
	1299	+ __asm__( \
	1300	+ " .set push \n" \
	1301	+ " .set dsp \n" \
	1302	+ " mtlo %0, $ac1 \n" \
	1303	+ " .set pop \n" \
	1304	+ : \
	1305	+ : "r" (x)); \
	1306	+})
	1307	+
	1308	+#define mtlo2(x) \
	1309	+({ \
	1310	+ __asm__( \
	1311	+ " .set push \n" \
	1312	+ " .set dsp \n" \
	1313	+ " mtlo %0, $ac2 \n" \
	1314	+ " .set pop \n" \
	1315	+ : \
	1316	+ : "r" (x)); \
	1317	+})
	1318	+
	1319	+#define mtlo3(x) \
	1320	+({ \
	1321	+ __asm__( \
	1322	+ " .set push \n" \
	1323	+ " .set dsp \n" \
	1324	+ " mtlo %0, $ac3 \n" \
	1325	+ " .set pop \n" \
	1326	+ : \
	1327	+ : "r" (x)); \
	1328	+})
	1329	+
	1330	+#define mthi0(x) \
	1331	+({ \
	1332	+ __asm__( \
	1333	+ " .set push \n" \
	1334	+ " .set dsp \n" \
	1335	+ " mthi %0, $ac0 \n" \
	1336	+ " .set pop \n" \
	1337	+ : \
	1338	+ : "r" (x)); \
	1339	+})
	1340	+
	1341	+#define mthi1(x) \
	1342	+({ \
	1343	+ __asm__( \
	1344	+ " .set push \n" \
	1345	+ " .set dsp \n" \
	1346	+ " mthi %0, $ac1 \n" \
	1347	+ " .set pop \n" \
	1348	+ : \
	1349	+ : "r" (x)); \
	1350	+})
	1351	+
	1352	+#define mthi2(x) \
	1353	+({ \
	1354	+ __asm__( \
	1355	+ " .set push \n" \
	1356	+ " .set dsp \n" \
	1357	+ " mthi %0, $ac2 \n" \
	1358	+ " .set pop \n" \
	1359	+ : \
	1360	+ : "r" (x)); \
	1361	+})
	1362	+
	1363	+#define mthi3(x) \
	1364	+({ \
	1365	+ __asm__( \
	1366	+ " .set push \n" \
	1367	+ " .set dsp \n" \
	1368	+ " mthi %0, $ac3 \n" \
	1369	+ " .set pop \n" \
	1370	+ : \
	1371	+ : "r" (x)); \
	1372	+})
1202	1373
1203	1374	#else
1204	1375

arch/mips/include/asm/signal.h+1−1

@@ -21,6 +21,6 @@ · 20 unmodified lines
21	21	#include <asm/sigcontext.h>
22	22	#include <asm/siginfo.h>
23	23
24		−#define __ARCH_HAS_ODD_SIGACTION
	24	+#define __ARCH_HAS_IRIX_SIGACTION
25	25
26	26	#endif /* _ASM_SIGNAL_H */

arch/mips/include/uapi/asm/signal.h+6−2

@@ -72,6 +72,12 @@ typedef unsigned long old_sigset_t; /* at least 32 bits */ · 71 unmodified lines
72	72	*
73	73	* SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
74	74	* Unix names RESETHAND and NODEFER respectively.
	75	+ *
	76	+ * SA_RESTORER used to be defined as 0x04000000 but only the O32 ABI ever
	77	+ * supported its use and no libc was using it, so the entire sa-restorer
	78	+ * functionality was removed with lmo commit 39bffc12c3580ab for 2.5.48
	79	+ * retaining only the SA_RESTORER definition as a reminder to avoid
	80	+ * accidental reuse of the mask bit.
75	81	*/
76	82	#define SA_ONSTACK 0x08000000
77	83	#define SA_RESETHAND 0x80000000
@@ -84,8 +90,6 @@ typedef unsigned long old_sigset_t; /* at least 32 bits */ · 6 unmodified lines
84	90	#define SA_NOMASK SA_NODEFER
85	91	#define SA_ONESHOT SA_RESETHAND
86	92
87		−#define SA_RESTORER 0x04000000 /* Only for o32 */
88		−
89	93	#define MINSIGSTKSZ 2048
90	94	#define SIGSTKSZ 8192
91	95

arch/mips/kernel/Makefile+6−19

@@ -100,29 +100,16 @@ obj-$(CONFIG_HW_PERF_EVENTS) += perf_event_mipsxx.o · 99 unmodified lines
100	100	obj-$(CONFIG_JUMP_LABEL) += jump_label.o
101	101
102	102	#
103		−# DSP ASE supported for MIPS32 or MIPS64 Release 2 cores only. It is safe
104		−# to enable DSP assembler support here even if the MIPS Release 2 CPU we
105		−# are targetting does not support DSP because all code-paths making use of
106		−# it properly check that the running CPU actually does support these
107		−# instructions.
	103	+# DSP ASE supported for MIPS32 or MIPS64 Release 2 cores only. It is not
	104	+# safe to unconditionnaly use the assembler -mdsp / -mdspr2 switches
	105	+# here because the compiler may use DSP ASE instructions (such as lwx) in
	106	+# code paths where we cannot check that the CPU we are running on supports it.
	107	+# Proper abstraction using HAVE_AS_DSP and macros is done in
	108	+# arch/mips/include/asm/mipsregs.h.
108	109	#
109	110	ifeq ($(CONFIG_CPU_MIPSR2), y)
110	111	CFLAGS_DSP = -DHAVE_AS_DSP
111	112
112		−#
113		−# Check if assembler supports DSP ASE
114		−#
115		−ifeq ($(call cc-option-yn,-mdsp), y)
116		−CFLAGS_DSP += -mdsp
117		−endif
118		−
119		−#
120		−# Check if assembler supports DSP ASE Rev2
121		−#
122		−ifeq ($(call cc-option-yn,-mdspr2), y)
123		−CFLAGS_DSP += -mdspr2
124		−endif
125		−
126	113	CFLAGS_signal.o = $(CFLAGS_DSP)
127	114	CFLAGS_signal32.o = $(CFLAGS_DSP)
128	115	CFLAGS_process.o = $(CFLAGS_DSP)

arch/mips/kernel/cpu-probe.c+6−7

@@ -580,6 +580,9 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu) · 579 unmodified lines
580	580	c->tlbsize = 48;
581	581	break;
582	582	case PRID_IMP_VR41XX:
	583	+ set_isa(c, MIPS_CPU_ISA_III);
	584	+ c->options = R4K_OPTS;
	585	+ c->tlbsize = 32;
583	586	switch (c->processor_id & 0xf0) {
584	587	case PRID_REV_VR4111:
585	588	c->cputype = CPU_VR4111;
@@ -604,6 +607,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu) · 18 unmodified lines
604	607	__cpu_name[cpu] = "NEC VR4131";
605	608	} else {
606	609	c->cputype = CPU_VR4133;
	610	+ c->options \|= MIPS_CPU_LLSC;
607	611	__cpu_name[cpu] = "NEC VR4133";
608	612	}
609	613	break;
@@ -613,9 +617,6 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu) · 3 unmodified lines
613	617	__cpu_name[cpu] = "NEC Vr41xx";
614	618	break;
615	619	}
616		− set_isa(c, MIPS_CPU_ISA_III);
617		− c->options = R4K_OPTS;
618		− c->tlbsize = 32;
619	620	break;
620	621	case PRID_IMP_R4300:
621	622	c->cputype = CPU_R4300;
@@ -1226,10 +1227,8 @@ __cpuinit void cpu_probe(void) · 604 unmodified lines
1226	1227	if (c->options & MIPS_CPU_FPU) {
1227	1228	c->fpu_id = cpu_get_fpu_id();
1228	1229
1229		− if (c->isa_level == MIPS_CPU_ISA_M32R1 \|\|
1230		− c->isa_level == MIPS_CPU_ISA_M32R2 \|\|
1231		− c->isa_level == MIPS_CPU_ISA_M64R1 \|\|
1232		− c->isa_level == MIPS_CPU_ISA_M64R2) {
	1230	+ if (c->isa_level & (MIPS_CPU_ISA_M32R1 \| MIPS_CPU_ISA_M32R2 \|
	1231	+ MIPS_CPU_ISA_M64R1 \| MIPS_CPU_ISA_M64R2)) {
1233	1232	if (c->fpu_id & MIPS_FPIR_3D)
1234	1233	c->ases \|= MIPS_ASE_MIPS3D;
1235	1234	}

arch/mips/kernel/linux32.c+1−1

@@ -171,7 +171,7 @@ SYSCALL_DEFINE6(32_ipc, u32, call, long, first, long, second, long, third, · 170 unmodified lines
171	171	err = compat_sys_shmctl(first, second, compat_ptr(ptr));
172	172	break;
173	173	default:
174		− err = -EINVAL;
	174	+ err = -ENOSYS;
175	175	break;
176	176	}
177	177

arch/mips/kernel/mcount.S+7−4

@@ -46,10 +46,9 @@ · 45 unmodified lines
46	46	PTR_L a5, PT_R9(sp)
47	47	PTR_L a6, PT_R10(sp)
48	48	PTR_L a7, PT_R11(sp)
49		−#else
50		− PTR_ADDIU sp, PT_SIZE
51	49	#endif
52		−.endm
	50	+ PTR_ADDIU sp, PT_SIZE
	51	+ .endm
53	52
54	53	.macro RETURN_BACK
55	54	jr ra
@@ -68,7 +67,11 @@ NESTED(ftrace_caller, PT_SIZE, ra) · 12 unmodified lines
68	67	.globl _mcount
69	68	_mcount:
70	69	b ftrace_stub
71		− addiu sp,sp,8
	70	+#ifdef CONFIG_32BIT
	71	+ addiu sp,sp,8
	72	+#else
	73	+ nop
	74	+#endif
72	75
73	76	/* When tracing is activated, it calls ftrace_caller+8 (aka here) */
74	77	lw t1, function_trace_stop

arch/mips/kernel/proc.c+1−1

@@ -67,7 +67,7 @@ static int show_cpuinfo(struct seq_file m, void v) · 66 unmodified lines
67	67	if (cpu_has_mips_r) {
68	68	seq_printf(m, "isa\t\t\t:");
69	69	if (cpu_has_mips_1)
70		− seq_printf(m, "%s", "mips1");
	70	+ seq_printf(m, "%s", " mips1");
71	71	if (cpu_has_mips_2)
72	72	seq_printf(m, "%s", " mips2");
73	73	if (cpu_has_mips_3)

arch/mips/kernel/traps.c+1−1

@@ -1571,7 +1571,7 @@ void __cpuinit per_cpu_trap_init(bool is_boot_cpu) · 1570 unmodified lines
1571	1571	#ifdef CONFIG_64BIT
1572	1572	status_set \|= ST0_FR\|ST0_KX\|ST0_SX\|ST0_UX;
1573	1573	#endif
1574		− if (current_cpu_data.isa_level == MIPS_CPU_ISA_IV)
	1574	+ if (current_cpu_data.isa_level & MIPS_CPU_ISA_IV)
1575	1575	status_set \|= ST0_XX;
1576	1576	if (cpu_has_dsp)
1577	1577	status_set \|= ST0_MX;

arch/mips/lib/bitops.c+8−8

@@ -90,12 +90,12 @@ int __mips_test_and_set_bit(unsigned long nr, · 89 unmodified lines
90	90	unsigned bit = nr & SZLONG_MASK;
91	91	unsigned long mask;
92	92	unsigned long flags;
93		− unsigned long res;
	93	+ int res;
94	94
95	95	a += nr >> SZLONG_LOG;
96	96	mask = 1UL << bit;
97	97	raw_local_irq_save(flags);
98		− res = (mask & *a);
	98	+ res = (mask & *a) != 0;
99	99	*a \|= mask;
100	100	raw_local_irq_restore(flags);
101	101	return res;
@@ -116,12 +116,12 @@ int __mips_test_and_set_bit_lock(unsigned long nr, · 14 unmodified lines
116	116	unsigned bit = nr & SZLONG_MASK;
117	117	unsigned long mask;
118	118	unsigned long flags;
119		− unsigned long res;
	119	+ int res;
120	120
121	121	a += nr >> SZLONG_LOG;
122	122	mask = 1UL << bit;
123	123	raw_local_irq_save(flags);
124		− res = (mask & *a);
	124	+ res = (mask & *a) != 0;
125	125	*a \|= mask;
126	126	raw_local_irq_restore(flags);
127	127	return res;
@@ -141,12 +141,12 @@ int __mips_test_and_clear_bit(unsigned long nr, volatile unsigned long *addr) · 13 unmodified lines
141	141	unsigned bit = nr & SZLONG_MASK;
142	142	unsigned long mask;
143	143	unsigned long flags;
144		− unsigned long res;
	144	+ int res;
145	145
146	146	a += nr >> SZLONG_LOG;
147	147	mask = 1UL << bit;
148	148	raw_local_irq_save(flags);
149		− res = (mask & *a);
	149	+ res = (mask & *a) != 0;
150	150	*a &= ~mask;
151	151	raw_local_irq_restore(flags);
152	152	return res;
@@ -166,12 +166,12 @@ int __mips_test_and_change_bit(unsigned long nr, volatile unsigned long *addr) · 13 unmodified lines
166	166	unsigned bit = nr & SZLONG_MASK;
167	167	unsigned long mask;
168	168	unsigned long flags;
169		− unsigned long res;
	169	+ int res;
170	170
171	171	a += nr >> SZLONG_LOG;
172	172	mask = 1UL << bit;
173	173	raw_local_irq_save(flags);
174		− res = (mask & *a);
	174	+ res = (mask & *a) != 0;
175	175	*a ^= mask;
176	176	raw_local_irq_restore(flags);
177	177	return res;

arch/mips/lib/csum_partial.S+2−2

@@ -270,7 +270,7 @@ LEAF(csum_partial) · 269 unmodified lines
270	270	#endif
271	271
272	272	/* odd buffer alignment? */
273		−#ifdef CPU_MIPSR2
	273	+#ifdef CONFIG_CPU_MIPSR2
274	274	wsbh v1, sum
275	275	movn sum, v1, t7
276	276	#else
@@ -670,7 +670,7 @@ EXC( sb t0, NBYTES-2(dst), .Ls_exc) · 393 unmodified lines
670	670	addu sum, v1
671	671	#endif
672	672
673		−#ifdef CPU_MIPSR2
	673	+#ifdef CONFIG_CPU_MIPSR2
674	674	wsbh v1, sum
675	675	movn sum, v1, odd
676	676	#else

arch/mips/mm/c-r4k.c+2−4

@@ -1247,10 +1247,8 @@ static void __cpuinit setup_scache(void) · 1246 unmodified lines
1247	1247	return;
1248	1248
1249	1249	default:
1250		− if (c->isa_level == MIPS_CPU_ISA_M32R1 \|\|
1251		− c->isa_level == MIPS_CPU_ISA_M32R2 \|\|
1252		− c->isa_level == MIPS_CPU_ISA_M64R1 \|\|
1253		− c->isa_level == MIPS_CPU_ISA_M64R2) {
	1250	+ if (c->isa_level & (MIPS_CPU_ISA_M32R1 \| MIPS_CPU_ISA_M32R2 \|
	1251	+ MIPS_CPU_ISA_M64R1 \| MIPS_CPU_ISA_M64R2)) {
1254	1252	#ifdef CONFIG_MIPS_CPU_SCACHE
1255	1253	if (mips_sc_init ()) {
1256	1254	scache_size = c->scache.ways * c->scache.sets * c->scache.linesz;

arch/mips/mm/sc-mips.c+2−4

@@ -98,10 +98,8 @@ static inline int __init mips_sc_probe(void) · 97 unmodified lines
98	98	c->scache.flags \|= MIPS_CACHE_NOT_PRESENT;
99	99
100	100	/* Ignore anything but MIPSxx processors */
101		− if (c->isa_level != MIPS_CPU_ISA_M32R1 &&
102		− c->isa_level != MIPS_CPU_ISA_M32R2 &&
103		− c->isa_level != MIPS_CPU_ISA_M64R1 &&
104		− c->isa_level != MIPS_CPU_ISA_M64R2)
	101	+ if (!(c->isa_level & (MIPS_CPU_ISA_M32R1 \| MIPS_CPU_ISA_M32R2 \|
	102	+ MIPS_CPU_ISA_M64R1 \| MIPS_CPU_ISA_M64R2)))
105	103	return 0;
106	104
107	105	/* Does this MIPS32/MIPS64 CPU have a config2 register? */

arch/mips/pci/pci-alchemy.c+2−2

@@ -19,7 +19,7 @@ · 18 unmodified lines
19	19	#include <asm/mach-au1x00/au1000.h>
20	20	#include <asm/tlbmisc.h>
21	21
22		−#ifdef CONFIG_DEBUG_PCI
	22	+#ifdef CONFIG_PCI_DEBUG
23	23	#define DBG(x...) printk(KERN_DEBUG x)
24	24	#else
25	25	#define DBG(x...) do {} while (0)
@@ -162,7 +162,7 @@ static int config_access(unsigned char access_type, struct pci_bus *bus, · 136 unmodified lines
162	162	if (status & (1 << 29)) {
163	163	*data = 0xffffffff;
164	164	error = -1;
165		− DBG("alchemy-pci: master abort on cfg access %d bus %d dev %d",
	165	+ DBG("alchemy-pci: master abort on cfg access %d bus %d dev %d\n",
166	166	access_type, bus->number, device);
167	167	} else if ((status >> 28) & 0xf) {
168	168	DBG("alchemy-pci: PCI ERR detected: dev %d, status %lx\n",

arch/mn10300/Kconfig+1−1

@@ -8,7 +8,7 @@ config MN10300 · 7 unmodified lines
8	8	select HAVE_ARCH_KGDB
9	9	select GENERIC_ATOMIC64
10	10	select HAVE_NMI_WATCHDOG if MN10300_WD_TIMER
11		− select HAVE_VIRT_TO_BUS
	11	+ select VIRT_TO_BUS
12	12	select GENERIC_CLOCKEVENTS
13	13	select MODULES_USE_ELF_RELA
14	14	select OLD_SIGSUSPEND3

arch/openrisc/Kconfig+1−2

@@ -9,10 +9,9 @@ config OPENRISC · 8 unmodified lines
9	9	select OF_EARLY_FLATTREE
10	10	select IRQ_DOMAIN
11	11	select HAVE_MEMBLOCK
12		− select ARCH_WANT_OPTIONAL_GPIOLIB
	12	+ select ARCH_REQUIRE_GPIOLIB
13	13	select HAVE_ARCH_TRACEHOOK
14	14	select HAVE_GENERIC_HARDIRQS
15		− select HAVE_VIRT_TO_BUS
16	15	select GENERIC_IRQ_CHIP
17	16	select GENERIC_IRQ_PROBE
18	17	select GENERIC_IRQ_SHOW

arch/parisc/Kconfig+1−1

@@ -21,7 +21,7 @@ config PARISC · 20 unmodified lines
21	21	select GENERIC_STRNCPY_FROM_USER
22	22	select SYSCTL_ARCH_UNALIGN_ALLOW
23	23	select HAVE_MOD_ARCH_SPECIFIC
24		− select HAVE_VIRT_TO_BUS
	24	+ select VIRT_TO_BUS
25	25	select MODULES_USE_ELF_RELA
26	26	select CLONE_BACKWARDS
27	27	select TTY # Needed for pdc_cons.c

arch/powerpc/Kconfig+2−1

@@ -90,6 +90,7 @@ config GENERIC_GPIO · 89 unmodified lines
90	90	config PPC
91	91	bool
92	92	default y
	93	+ select BINFMT_ELF
93	94	select OF
94	95	select OF_EARLY_FLATTREE
95	96	select HAVE_FTRACE_MCOUNT_RECORD
@@ -98,7 +99,7 @@ config PPC · 2 unmodified lines
98	99	select HAVE_FUNCTION_GRAPH_TRACER
99	100	select SYSCTL_EXCEPTION_TRACE
100	101	select ARCH_WANT_OPTIONAL_GPIOLIB
101		− select HAVE_VIRT_TO_BUS if !PPC64
	102	+ select VIRT_TO_BUS if !PPC64
102	103	select HAVE_IDE
103	104	select HAVE_IOREMAP_PROT
104	105	select HAVE_EFFICIENT_UNALIGNED_ACCESS

arch/powerpc/include/asm/mmu-hash64.h+66−62

@@ -343,17 +343,16 @@ extern void slb_set_size(u16 size); · 342 unmodified lines
343	343	/*
344	344	* VSID allocation (256MB segment)
345	345	*
346		− * We first generate a 38-bit "proto-VSID". For kernel addresses this
347		− * is equal to the ESID \| 1 << 37, for user addresses it is:
348		− * (context << USER_ESID_BITS) \| (esid & ((1U << USER_ESID_BITS) - 1)
	346	+ * We first generate a 37-bit "proto-VSID". Proto-VSIDs are generated
	347	+ * from mmu context id and effective segment id of the address.
349	348	*
350		− * This splits the proto-VSID into the below range
351		− * 0 - (2^(CONTEXT_BITS + USER_ESID_BITS) - 1) : User proto-VSID range
352		− * 2^(CONTEXT_BITS + USER_ESID_BITS) - 2^(VSID_BITS) : Kernel proto-VSID range
353		− *
354		− * We also have CONTEXT_BITS + USER_ESID_BITS = VSID_BITS - 1
355		− * That is, we assign half of the space to user processes and half
356		− * to the kernel.
	349	+ * For user processes max context id is limited to ((1ul << 19) - 5)
	350	+ * for kernel space, we use the top 4 context ids to map address as below
	351	+ * NOTE: each context only support 64TB now.
	352	+ * 0x7fffc - [ 0xc000000000000000 - 0xc0003fffffffffff ]
	353	+ * 0x7fffd - [ 0xd000000000000000 - 0xd0003fffffffffff ]
	354	+ * 0x7fffe - [ 0xe000000000000000 - 0xe0003fffffffffff ]
	355	+ * 0x7ffff - [ 0xf000000000000000 - 0xf0003fffffffffff ]
357	356	*
358	357	* The proto-VSIDs are then scrambled into real VSIDs with the
359	358	* multiplicative hash:
@@ -363,41 +362,49 @@ extern void slb_set_size(u16 size); · 3 unmodified lines
363	362	* VSID_MULTIPLIER is prime, so in particular it is
364	363	* co-prime to VSID_MODULUS, making this a 1:1 scrambling function.
365	364	* Because the modulus is 2^n-1 we can compute it efficiently without
366		− * a divide or extra multiply (see below).
367		− *
368		− * This scheme has several advantages over older methods:
369		− *
370		− * - We have VSIDs allocated for every kernel address
371		− * (i.e. everything above 0xC000000000000000), except the very top
372		− * segment, which simplifies several things.
	365	+ * a divide or extra multiply (see below). The scramble function gives
	366	+ * robust scattering in the hash table (at least based on some initial
	367	+ * results).
373	368	*
374		− * - We allow for USER_ESID_BITS significant bits of ESID and
375		− * CONTEXT_BITS bits of context for user addresses.
376		− * i.e. 64T (46 bits) of address space for up to half a million contexts.
	369	+ * We also consider VSID 0 special. We use VSID 0 for slb entries mapping
	370	+ * bad address. This enables us to consolidate bad address handling in
	371	+ * hash_page.
377	372	*
378		− * - The scramble function gives robust scattering in the hash
379		− * table (at least based on some initial results). The previous
380		− * method was more susceptible to pathological cases giving excessive
381		− * hash collisions.
	373	+ * We also need to avoid the last segment of the last context, because that
	374	+ * would give a protovsid of 0x1fffffffff. That will result in a VSID 0
	375	+ * because of the modulo operation in vsid scramble. But the vmemmap
	376	+ * (which is what uses region 0xf) will never be close to 64TB in size
	377	+ * (it's 56 bytes per page of system memory).
382	378	*/
383	379
	380	+#define CONTEXT_BITS 19
	381	+#define ESID_BITS 18
	382	+#define ESID_BITS_1T 6
	383	+
	384	+/*
	385	+ * 256MB segment
	386	+ * The proto-VSID space has 2^(CONTEX_BITS + ESID_BITS) - 1 segments
	387	+ * available for user + kernel mapping. The top 4 contexts are used for
	388	+ * kernel mapping. Each segment contains 2^28 bytes. Each
	389	+ * context maps 2^46 bytes (64TB) so we can support 2^19-1 contexts
	390	+ * (19 == 37 + 28 - 46).
	391	+ */
	392	+#define MAX_USER_CONTEXT ((ASM_CONST(1) << CONTEXT_BITS) - 5)
	393	+
384	394	/*
385	395	* This should be computed such that protovosid * vsid_mulitplier
386	396	* doesn't overflow 64 bits. It should also be co-prime to vsid_modulus
387	397	*/
388	398	#define VSID_MULTIPLIER_256M ASM_CONST(12538073) /* 24-bit prime */
389		−#define VSID_BITS_256M 38
	399	+#define VSID_BITS_256M (CONTEXT_BITS + ESID_BITS)
390	400	#define VSID_MODULUS_256M ((1UL<<VSID_BITS_256M)-1)
391	401
392	402	#define VSID_MULTIPLIER_1T ASM_CONST(12538073) /* 24-bit prime */
393		−#define VSID_BITS_1T 26
	403	+#define VSID_BITS_1T (CONTEXT_BITS + ESID_BITS_1T)
394	404	#define VSID_MODULUS_1T ((1UL<<VSID_BITS_1T)-1)
395	405
396		−#define CONTEXT_BITS 19
397		−#define USER_ESID_BITS 18
398		−#define USER_ESID_BITS_1T 6
399	406
400		−#define USER_VSID_RANGE (1UL << (USER_ESID_BITS + SID_SHIFT))
	407	+#define USER_VSID_RANGE (1UL << (ESID_BITS + SID_SHIFT))
401	408
402	409	/*
403	410	* This macro generates asm code to compute the VSID scramble
@@ -421,7 +428,8 @@ extern void slb_set_size(u16 size); · 17 unmodified lines
421	428	srdi rx,rt,VSID_BITS_##size; \
422	429	clrldi rt,rt,(64-VSID_BITS_##size); \
423	430	add rt,rt,rx; /* add high and low bits */ \
424		− /* Now, r3 == VSID (mod 2^36-1), and lies between 0 and \
	431	+ /* NOTE: explanation based on VSID_BITS_##size = 36 \
	432	+ * Now, r3 == VSID (mod 2^36-1), and lies between 0 and \
425	433	* 2^36-1+2^28-1. That in particular means that if r3 >= \
426	434	* 2^36-1, then r3+1 has the 2^36 bit set. So, if r3+1 has \
427	435	* the bit clear, r3 already has the answer we want, if it \
@@ -513,34 +521,6 @@ typedef struct { · 85 unmodified lines
513	521	})
514	522	#endif /* 1 */
515	523
516		−/*
517		− * This is only valid for addresses >= PAGE_OFFSET
518		− * The proto-VSID space is divided into two class
519		− * User: 0 to 2^(CONTEXT_BITS + USER_ESID_BITS) -1
520		− * kernel: 2^(CONTEXT_BITS + USER_ESID_BITS) to 2^(VSID_BITS) - 1
521		− *
522		− * With KERNEL_START at 0xc000000000000000, the proto vsid for
523		− * the kernel ends up with 0xc00000000 (36 bits). With 64TB
524		− * support we need to have kernel proto-VSID in the
525		− * [2^37 to 2^38 - 1] range due to the increased USER_ESID_BITS.
526		− */
527		−static inline unsigned long get_kernel_vsid(unsigned long ea, int ssize)
528		−{
529		− unsigned long proto_vsid;
530		− /*
531		− * We need to make sure proto_vsid for the kernel is
532		− * >= 2^(CONTEXT_BITS + USER_ESID_BITS[_1T])
533		− */
534		− if (ssize == MMU_SEGSIZE_256M) {
535		− proto_vsid = ea >> SID_SHIFT;
536		− proto_vsid \|= (1UL << (CONTEXT_BITS + USER_ESID_BITS));
537		− return vsid_scramble(proto_vsid, 256M);
538		− }
539		− proto_vsid = ea >> SID_SHIFT_1T;
540		− proto_vsid \|= (1UL << (CONTEXT_BITS + USER_ESID_BITS_1T));
541		− return vsid_scramble(proto_vsid, 1T);
542		−}
543		−
544	524	/* Returns the segment size indicator for a user address */
545	525	static inline int user_segment_size(unsigned long addr)
546	526	{
@@ -550,17 +530,41 @@ static inline int user_segment_size(unsigned long addr) · 3 unmodified lines
550	530	return MMU_SEGSIZE_256M;
551	531	}
552	532
553		−/* This is only valid for user addresses (which are below 2^44) */
554	533	static inline unsigned long get_vsid(unsigned long context, unsigned long ea,
555	534	int ssize)
556	535	{
	536	+ /*
	537	+ * Bad address. We return VSID 0 for that
	538	+ */
	539	+ if ((ea & ~REGION_MASK) >= PGTABLE_RANGE)
	540	+ return 0;
	541	+
557	542	if (ssize == MMU_SEGSIZE_256M)
558		− return vsid_scramble((context << USER_ESID_BITS)
	543	+ return vsid_scramble((context << ESID_BITS)
559	544	\| (ea >> SID_SHIFT), 256M);
560		− return vsid_scramble((context << USER_ESID_BITS_1T)
	545	+ return vsid_scramble((context << ESID_BITS_1T)
561	546	\| (ea >> SID_SHIFT_1T), 1T);
562	547	}
563	548
	549	+/*
	550	+ * This is only valid for addresses >= PAGE_OFFSET
	551	+ *
	552	+ * For kernel space, we use the top 4 context ids to map address as below
	553	+ * 0x7fffc - [ 0xc000000000000000 - 0xc0003fffffffffff ]
	554	+ * 0x7fffd - [ 0xd000000000000000 - 0xd0003fffffffffff ]
	555	+ * 0x7fffe - [ 0xe000000000000000 - 0xe0003fffffffffff ]
	556	+ * 0x7ffff - [ 0xf000000000000000 - 0xf0003fffffffffff ]
	557	+ */
	558	+static inline unsigned long get_kernel_vsid(unsigned long ea, int ssize)
	559	+{
	560	+ unsigned long context;
	561	+
	562	+ /*
	563	+ * kernel take the top 4 context from the available range
	564	+ */
	565	+ context = (MAX_USER_CONTEXT) + ((ea >> 60) - 0xc) + 1;
	566	+ return get_vsid(context, ea, ssize);
	567	+}
564	568	#endif /* __ASSEMBLY__ */
565	569
566	570	#endif /* _ASM_POWERPC_MMU_HASH64_H_ */

arch/powerpc/kernel/cputable.c+1−1

@@ -275,7 +275,7 @@ static struct cpu_spec __initdata cpu_specs[] = { · 274 unmodified lines
275	275	.cpu_features = CPU_FTRS_PPC970,
276	276	.cpu_user_features = COMMON_USER_POWER4 \|
277	277	PPC_FEATURE_HAS_ALTIVEC_COMP,
278		− .mmu_features = MMU_FTR_HPTE_TABLE,
	278	+ .mmu_features = MMU_FTRS_PPC970,
279	279	.icache_bsize = 128,
280	280	.dcache_bsize = 128,
281	281	.num_pmcs = 8,

arch/powerpc/kernel/entry_64.S+2−2

@@ -304,7 +304,7 @@ syscall_exit_work: · 303 unmodified lines
304	304	subi r12,r12,TI_FLAGS
305	305
306	306	4: /* Anything else left to do? */
307		− SET_DEFAULT_THREAD_PPR(r3, r9) /* Set thread.ppr = 3 */
	307	+ SET_DEFAULT_THREAD_PPR(r3, r10) /* Set thread.ppr = 3 */
308	308	andi. r0,r9,(_TIF_SYSCALL_T_OR_A\|_TIF_SINGLESTEP)
309	309	beq .ret_from_except_lite
310	310
@@ -657,7 +657,7 @@ resume_kernel: · 346 unmodified lines
657	657	/* Clear _TIF_EMULATE_STACK_STORE flag */
658	658	lis r11,_TIF_EMULATE_STACK_STORE@h
659	659	addi r5,r9,TI_FLAGS
660		− ldarx r4,0,r5
	660	+0: ldarx r4,0,r5
661	661	andc r4,r4,r11
662	662	stdcx. r4,0,r5
663	663	bne- 0b

arch/powerpc/kernel/epapr_paravirt.c+6−0

@@ -23,8 +23,10 @@ · 22 unmodified lines
23	23	#include <asm/code-patching.h>
24	24	#include <asm/machdep.h>
25	25
	26	+#if !defined(CONFIG_64BIT) \|\| defined(CONFIG_PPC_BOOK3E_64)
26	27	extern void epapr_ev_idle(void);
27	28	extern u32 epapr_ev_idle_start[];
	29	+#endif
28	30
29	31	bool epapr_paravirt_enabled;
30	32
@@ -47,11 +49,15 @@ static int __init epapr_paravirt_init(void) · 16 unmodified lines
47	49
48	50	for (i = 0; i < (len / 4); i++) {
49	51	patch_instruction(epapr_hypercall_start + i, insts[i]);
	52	+#if !defined(CONFIG_64BIT) \|\| defined(CONFIG_PPC_BOOK3E_64)
50	53	patch_instruction(epapr_ev_idle_start + i, insts[i]);
	54	+#endif
51	55	}
52	56
	57	+#if !defined(CONFIG_64BIT) \|\| defined(CONFIG_PPC_BOOK3E_64)
53	58	if (of_get_property(hyper_node, "has-idle", NULL))
54	59	ppc_md.power_save = epapr_ev_idle;
	60	+#endif
55	61
56	62	epapr_paravirt_enabled = true;
57	63

arch/powerpc/kernel/exceptions-64s.S+97−81

@@ -1066,78 +1066,6 @@ unrecov_user_slb: · 1065 unmodified lines
1066	1066	#endif /* __DISABLED__ */
1067	1067
1068	1068
1069		−/*
1070		− * r13 points to the PACA, r9 contains the saved CR,
1071		− * r12 contain the saved SRR1, SRR0 is still ready for return
1072		− * r3 has the faulting address
1073		− * r9 - r13 are saved in paca->exslb.
1074		− * r3 is saved in paca->slb_r3
1075		− * We assume we aren't going to take any exceptions during this procedure.
1076		− */
1077		−_GLOBAL(slb_miss_realmode)
1078		− mflr r10
1079		−#ifdef CONFIG_RELOCATABLE
1080		− mtctr r11
1081		−#endif
1082		−
1083		− stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
1084		− std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
1085		−
1086		− bl .slb_allocate_realmode
1087		−
1088		− /* All done -- return from exception. */
1089		−
1090		− ld r10,PACA_EXSLB+EX_LR(r13)
1091		− ld r3,PACA_EXSLB+EX_R3(r13)
1092		− lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
1093		−
1094		− mtlr r10
1095		−
1096		− andi. r10,r12,MSR_RI /* check for unrecoverable exception */
1097		− beq- 2f
1098		−
1099		−.machine push
1100		−.machine "power4"
1101		− mtcrf 0x80,r9
1102		− mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
1103		−.machine pop
1104		−
1105		− RESTORE_PPR_PACA(PACA_EXSLB, r9)
1106		− ld r9,PACA_EXSLB+EX_R9(r13)
1107		− ld r10,PACA_EXSLB+EX_R10(r13)
1108		− ld r11,PACA_EXSLB+EX_R11(r13)
1109		− ld r12,PACA_EXSLB+EX_R12(r13)
1110		− ld r13,PACA_EXSLB+EX_R13(r13)
1111		− rfid
1112		− b . /* prevent speculative execution */
1113		−
1114		−2: mfspr r11,SPRN_SRR0
1115		− ld r10,PACAKBASE(r13)
1116		− LOAD_HANDLER(r10,unrecov_slb)
1117		− mtspr SPRN_SRR0,r10
1118		− ld r10,PACAKMSR(r13)
1119		− mtspr SPRN_SRR1,r10
1120		− rfid
1121		− b .
1122		−
1123		−unrecov_slb:
1124		− EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
1125		− DISABLE_INTS
1126		− bl .save_nvgprs
1127		−1: addi r3,r1,STACK_FRAME_OVERHEAD
1128		− bl .unrecoverable_exception
1129		− b 1b
1130		−
1131		−
1132		−#ifdef CONFIG_PPC_970_NAP
1133		−power4_fixup_nap:
1134		− andc r9,r9,r10
1135		− std r9,TI_LOCAL_FLAGS(r11)
1136		− ld r10,_LINK(r1) /* make idle task do the */
1137		− std r10,_NIP(r1) /* equivalent of a blr */
1138		− blr
1139		−#endif
1140		−
1141	1069	.align 7
1142	1070	.globl alignment_common
1143	1071	alignment_common:
@@ -1335,6 +1263,78 @@ _GLOBAL(opal_mc_secondary_handler) · 191 unmodified lines
1335	1263	#endif /* CONFIG_PPC_POWERNV */
1336	1264
1337	1265
	1266	+/*
	1267	+ * r13 points to the PACA, r9 contains the saved CR,
	1268	+ * r12 contain the saved SRR1, SRR0 is still ready for return
	1269	+ * r3 has the faulting address
	1270	+ * r9 - r13 are saved in paca->exslb.
	1271	+ * r3 is saved in paca->slb_r3
	1272	+ * We assume we aren't going to take any exceptions during this procedure.
	1273	+ */
	1274	+_GLOBAL(slb_miss_realmode)
	1275	+ mflr r10
	1276	+#ifdef CONFIG_RELOCATABLE
	1277	+ mtctr r11
	1278	+#endif
	1279	+
	1280	+ stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
	1281	+ std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
	1282	+
	1283	+ bl .slb_allocate_realmode
	1284	+
	1285	+ /* All done -- return from exception. */
	1286	+
	1287	+ ld r10,PACA_EXSLB+EX_LR(r13)
	1288	+ ld r3,PACA_EXSLB+EX_R3(r13)
	1289	+ lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
	1290	+
	1291	+ mtlr r10
	1292	+
	1293	+ andi. r10,r12,MSR_RI /* check for unrecoverable exception */
	1294	+ beq- 2f
	1295	+
	1296	+.machine push
	1297	+.machine "power4"
	1298	+ mtcrf 0x80,r9
	1299	+ mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
	1300	+.machine pop
	1301	+
	1302	+ RESTORE_PPR_PACA(PACA_EXSLB, r9)
	1303	+ ld r9,PACA_EXSLB+EX_R9(r13)
	1304	+ ld r10,PACA_EXSLB+EX_R10(r13)
	1305	+ ld r11,PACA_EXSLB+EX_R11(r13)
	1306	+ ld r12,PACA_EXSLB+EX_R12(r13)
	1307	+ ld r13,PACA_EXSLB+EX_R13(r13)
	1308	+ rfid
	1309	+ b . /* prevent speculative execution */
	1310	+
	1311	+2: mfspr r11,SPRN_SRR0
	1312	+ ld r10,PACAKBASE(r13)
	1313	+ LOAD_HANDLER(r10,unrecov_slb)
	1314	+ mtspr SPRN_SRR0,r10
	1315	+ ld r10,PACAKMSR(r13)
	1316	+ mtspr SPRN_SRR1,r10
	1317	+ rfid
	1318	+ b .
	1319	+
	1320	+unrecov_slb:
	1321	+ EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
	1322	+ DISABLE_INTS
	1323	+ bl .save_nvgprs
	1324	+1: addi r3,r1,STACK_FRAME_OVERHEAD
	1325	+ bl .unrecoverable_exception
	1326	+ b 1b
	1327	+
	1328	+
	1329	+#ifdef CONFIG_PPC_970_NAP
	1330	+power4_fixup_nap:
	1331	+ andc r9,r9,r10
	1332	+ std r9,TI_LOCAL_FLAGS(r11)
	1333	+ ld r10,_LINK(r1) /* make idle task do the */
	1334	+ std r10,_NIP(r1) /* equivalent of a blr */
	1335	+ blr
	1336	+#endif
	1337	+
1338	1338	/*
1339	1339	* Hash table stuff
1340	1340	*/
@@ -1452,20 +1452,36 @@ do_ste_alloc: · 111 unmodified lines
1452	1452	_GLOBAL(do_stab_bolted)
1453	1453	stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
1454	1454	std r11,PACA_EXSLB+EX_SRR0(r13) /* save SRR0 in exc. frame */
	1455	+ mfspr r11,SPRN_DAR /* ea */
1455	1456
	1457	+ /*
	1458	+ * check for bad kernel/user address
	1459	+ * (ea & ~REGION_MASK) >= PGTABLE_RANGE
	1460	+ */
	1461	+ rldicr. r9,r11,4,(63 - 46 - 4)
	1462	+ li r9,0 /* VSID = 0 for bad address */
	1463	+ bne- 0f
	1464	+
	1465	+ /*
	1466	+ * Calculate VSID:
	1467	+ * This is the kernel vsid, we take the top for context from
	1468	+ * the range. context = (MAX_USER_CONTEXT) + ((ea >> 60) - 0xc) + 1
	1469	+ * Here we know that (ea >> 60) == 0xc
	1470	+ */
	1471	+ lis r9,(MAX_USER_CONTEXT + 1)@ha
	1472	+ addi r9,r9,(MAX_USER_CONTEXT + 1)@l
	1473	+
	1474	+ srdi r10,r11,SID_SHIFT
	1475	+ rldimi r10,r9,ESID_BITS,0 /* proto vsid */
	1476	+ ASM_VSID_SCRAMBLE(r10, r9, 256M)
	1477	+ rldic r9,r10,12,16 /* r9 = vsid << 12 */
	1478	+
	1479	+0:
1456	1480	/* Hash to the primary group */
1457	1481	ld r10,PACASTABVIRT(r13)
1458		− mfspr r11,SPRN_DAR
1459		− srdi r11,r11,28
	1482	+ srdi r11,r11,SID_SHIFT
1460	1483	rldimi r10,r11,7,52 /* r10 = first ste of the group */
1461	1484
1462		− /* Calculate VSID */
1463		− /* This is a kernel address, so protovsid = ESID \| 1 << 37 */
1464		− li r9,0x1
1465		− rldimi r11,r9,(CONTEXT_BITS + USER_ESID_BITS),0
1466		− ASM_VSID_SCRAMBLE(r11, r9, 256M)
1467		− rldic r9,r11,12,16 /* r9 = vsid << 12 */
1468		−
1469	1485	/* Search the primary group for a free entry */
1470	1486	1: ld r11,0(r10) /* Test valid bit of the current ste */
1471	1487	andi. r11,r11,0x80

arch/powerpc/kernel/process.c+2−0

@@ -555,10 +555,12 @@ static inline void tm_recheckpoint_new_task(struct task_struct *new) · 554 unmodified lines
555	555	new->thread.regs->msr \|=
556	556	(MSR_FP \| new->thread.fpexc_mode);
557	557	}
	558	+#ifdef CONFIG_ALTIVEC
558	559	if (msr & MSR_VEC) {
559	560	do_load_up_transact_altivec(&new->thread);
560	561	new->thread.regs->msr \|= MSR_VEC;
561	562	}
	563	+#endif
562	564	/* We may as well turn on VSX too since all the state is restored now */
563	565	if (msr & MSR_VSX)
564	566	new->thread.regs->msr \|= MSR_VSX;

arch/powerpc/kernel/prom_init.c+7−7

@@ -2832,11 +2832,13 @@ static void unreloc_toc(void) · 2831 unmodified lines
2832	2832	{
2833	2833	}
2834	2834	#else
2835		−static void __reloc_toc(void *tocstart, unsigned long offset,
2836		− unsigned long nr_entries)
	2835	+static void __reloc_toc(unsigned long offset, unsigned long nr_entries)
2837	2836	{
2838	2837	unsigned long i;
2839		− unsigned long toc_entry = (unsigned long )tocstart;
	2838	+ unsigned long *toc_entry;
	2839	+
	2840	+ /* Get the start of the TOC by using r2 directly. */
	2841	+ asm volatile("addi %0,2,-0x8000" : "=b" (toc_entry));
2840	2842
2841	2843	for (i = 0; i < nr_entries; i++) {
2842	2844	toc_entry = toc_entry + offset;
@@ -2850,8 +2852,7 @@ static void reloc_toc(void) · 7 unmodified lines
2850	2852	unsigned long nr_entries =
2851	2853	(__prom_init_toc_end - __prom_init_toc_start) / sizeof(long);
2852	2854
2853		− /* Need to add offset to get at __prom_init_toc_start */
2854		− __reloc_toc(__prom_init_toc_start + offset, offset, nr_entries);
	2855	+ __reloc_toc(offset, nr_entries);
2855	2856
2856	2857	mb();
2857	2858	}
@@ -2864,8 +2865,7 @@ static void unreloc_toc(void) · 6 unmodified lines
2864	2865
2865	2866	mb();
2866	2867
2867		− /* __prom_init_toc_start has been relocated, no need to add offset */
2868		− __reloc_toc(__prom_init_toc_start, -offset, nr_entries);
	2868	+ __reloc_toc(-offset, nr_entries);
2869	2869	}
2870	2870	#endif
2871	2871	#endif

arch/powerpc/kernel/ptrace.c+1−0

@@ -1428,6 +1428,7 @@ static long ppc_set_hwdebug(struct task_struct *child, · 1427 unmodified lines
1428	1428
1429	1429	brk.address = bp_info->addr & ~7UL;
1430	1430	brk.type = HW_BRK_TYPE_TRANSLATE;
	1431	+ brk.len = 8;
1431	1432	if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1432	1433	brk.type \|= HW_BRK_TYPE_READ;
1433	1434	if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)

arch/powerpc/kernel/signal_32.c+2−0

@@ -866,10 +866,12 @@ static long restore_tm_user_regs(struct pt_regs *regs, · 865 unmodified lines
866	866	do_load_up_transact_fpu(&current->thread);
867	867	regs->msr \|= (MSR_FP \| current->thread.fpexc_mode);
868	868	}
	869	+#ifdef CONFIG_ALTIVEC
869	870	if (msr & MSR_VEC) {
870	871	do_load_up_transact_altivec(&current->thread);
871	872	regs->msr \|= MSR_VEC;
872	873	}
	874	+#endif
873	875
874	876	return 0;
875	877	}

arch/powerpc/kernel/signal_64.c+2−0

@@ -522,10 +522,12 @@ static long restore_tm_sigcontexts(struct pt_regs *regs, · 521 unmodified lines
522	522	do_load_up_transact_fpu(&current->thread);
523	523	regs->msr \|= (MSR_FP \| current->thread.fpexc_mode);
524	524	}
	525	+#ifdef CONFIG_ALTIVEC
525	526	if (msr & MSR_VEC) {
526	527	do_load_up_transact_altivec(&current->thread);
527	528	regs->msr \|= MSR_VEC;
528	529	}
	530	+#endif
529	531
530	532	return err;
531	533	}

arch/powerpc/kernel/tm.S+2−0

@@ -309,6 +309,7 @@ _GLOBAL(tm_recheckpoint) · 308 unmodified lines
309	309	or r5, r6, r5 /* Set MSR.FP+.VSX/.VEC */
310	310	mtmsr r5
311	311
	312	+#ifdef CONFIG_ALTIVEC
312	313	/* FP and VEC registers: These are recheckpointed from thread.fpr[]
313	314	* and thread.vr[] respectively. The thread.transact_fpr[] version
314	315	* is more modern, and will be loaded subsequently by any FPUnavailable
@@ -323,6 +324,7 @@ _GLOBAL(tm_recheckpoint) · 8 unmodified lines
323	324	REST_32VRS(0, r5, r3) /* r5 scratch, r3 THREAD ptr */
324	325	ld r5, THREAD_VRSAVE(r3)
325	326	mtspr SPRN_VRSAVE, r5
	327	+#endif
326	328
327	329	dont_restore_vec:
328	330	andi. r0, r4, MSR_FP

arch/powerpc/kvm/book3s_64_mmu_host.c+2−2

@@ -326,8 +326,8 @@ int kvmppc_mmu_init(struct kvm_vcpu *vcpu) · 325 unmodified lines
326	326	vcpu3s->context_id[0] = err;
327	327
328	328	vcpu3s->proto_vsid_max = ((vcpu3s->context_id[0] + 1)
329		− << USER_ESID_BITS) - 1;
330		− vcpu3s->proto_vsid_first = vcpu3s->context_id[0] << USER_ESID_BITS;
	329	+ << ESID_BITS) - 1;
	330	+ vcpu3s->proto_vsid_first = vcpu3s->context_id[0] << ESID_BITS;
331	331	vcpu3s->proto_vsid_next = vcpu3s->proto_vsid_first;
332	332
333	333	kvmppc_mmu_hpte_init(vcpu);

arch/powerpc/kvm/e500.h+8−16

@@ -26,17 +26,20 @@ · 25 unmodified lines
26	26	#define E500_PID_NUM 3
27	27	#define E500_TLB_NUM 2
28	28
29		−#define E500_TLB_VALID 1
30		−#define E500_TLB_BITMAP 2
	29	+/* entry is mapped somewhere in host TLB */
	30	+#define E500_TLB_VALID (1 << 0)
	31	+/* TLB1 entry is mapped by host TLB1, tracked by bitmaps */
	32	+#define E500_TLB_BITMAP (1 << 1)
	33	+/* TLB1 entry is mapped by host TLB0 */
31	34	#define E500_TLB_TLB0 (1 << 2)
32	35
33	36	struct tlbe_ref {
34		− pfn_t pfn;
35		− unsigned int flags; /* E500_TLB_* */
	37	+ pfn_t pfn; /* valid only for TLB0, except briefly */
	38	+ unsigned int flags; /* E500_TLB_* */
36	39	};
37	40
38	41	struct tlbe_priv {
39		− struct tlbe_ref ref; /* TLB0 only -- TLB1 uses tlb_refs */
	42	+ struct tlbe_ref ref;
40	43	};
41	44
42	45	#ifdef CONFIG_KVM_E500V2
@@ -63,17 +66,6 @@ struct kvmppc_vcpu_e500 { · 20 unmodified lines
63	66
64	67	unsigned int gtlb_nv[E500_TLB_NUM];
65	68
66		− /*
67		− * information associated with each host TLB entry --
68		− * TLB1 only for now. If/when guest TLB1 entries can be
69		− * mapped with host TLB0, this will be used for that too.
70		− *
71		− * We don't want to use this for guest TLB0 because then we'd
72		− * have the overhead of doing the translation again even if
73		− * the entry is still in the guest TLB (e.g. we swapped out
74		− * and back, and our host TLB entries got evicted).
75		− */
76		− struct tlbe_ref *tlb_refs[E500_TLB_NUM];
77	69	unsigned int host_tlb1_nv;
78	70
79	71	u32 svr;

arch/powerpc/kvm/e500_mmu_host.c+27−57

@@ -193,8 +193,11 @@ void inval_gtlbe_on_host(struct kvmppc_vcpu_e500 *vcpu_e500, int tlbsel, · 192 unmodified lines
193	193	struct tlbe_ref *ref = &vcpu_e500->gtlb_priv[tlbsel][esel].ref;
194	194
195	195	/* Don't bother with unmapped entries */
196		− if (!(ref->flags & E500_TLB_VALID))
197		− return;
	196	+ if (!(ref->flags & E500_TLB_VALID)) {
	197	+ WARN(ref->flags & (E500_TLB_BITMAP \| E500_TLB_TLB0),
	198	+ "%s: flags %x\n", __func__, ref->flags);
	199	+ WARN_ON(tlbsel == 1 && vcpu_e500->g2h_tlb1_map[esel]);
	200	+ }
198	201
199	202	if (tlbsel == 1 && ref->flags & E500_TLB_BITMAP) {
200	203	u64 tmp = vcpu_e500->g2h_tlb1_map[esel];
@@ -248,7 +251,7 @@ static inline void kvmppc_e500_ref_setup(struct tlbe_ref *ref, · 47 unmodified lines
248	251	pfn_t pfn)
249	252	{
250	253	ref->pfn = pfn;
251		− ref->flags = E500_TLB_VALID;
	254	+ ref->flags \|= E500_TLB_VALID;
252	255
253	256	if (tlbe_is_writable(gtlbe))
254	257	kvm_set_pfn_dirty(pfn);
@@ -257,6 +260,7 @@ static inline void kvmppc_e500_ref_setup(struct tlbe_ref *ref, · 2 unmodified lines
257	260	static inline void kvmppc_e500_ref_release(struct tlbe_ref *ref)
258	261	{
259	262	if (ref->flags & E500_TLB_VALID) {
	263	+ /* FIXME: don't log bogus pfn for TLB1 */
260	264	trace_kvm_booke206_ref_release(ref->pfn, ref->flags);
261	265	ref->flags = 0;
262	266	}
@@ -274,36 +278,23 @@ static void clear_tlb1_bitmap(struct kvmppc_vcpu_e500 *vcpu_e500) · 11 unmodified lines
274	278
275	279	static void clear_tlb_privs(struct kvmppc_vcpu_e500 *vcpu_e500)
276	280	{
277		− int tlbsel = 0;
278		− int i;
279		−
280		− for (i = 0; i < vcpu_e500->gtlb_params[tlbsel].entries; i++) {
281		− struct tlbe_ref *ref =
282		− &vcpu_e500->gtlb_priv[tlbsel][i].ref;
283		− kvmppc_e500_ref_release(ref);
284		− }
285		−}
286		−
287		−static void clear_tlb_refs(struct kvmppc_vcpu_e500 *vcpu_e500)
288		−{
289		− int stlbsel = 1;
	281	+ int tlbsel;
290	282	int i;
291	283
292		− kvmppc_e500_tlbil_all(vcpu_e500);
293		−
294		− for (i = 0; i < host_tlb_params[stlbsel].entries; i++) {
295		− struct tlbe_ref *ref =
296		− &vcpu_e500->tlb_refs[stlbsel][i];
297		− kvmppc_e500_ref_release(ref);
	284	+ for (tlbsel = 0; tlbsel <= 1; tlbsel++) {
	285	+ for (i = 0; i < vcpu_e500->gtlb_params[tlbsel].entries; i++) {
	286	+ struct tlbe_ref *ref =
	287	+ &vcpu_e500->gtlb_priv[tlbsel][i].ref;
	288	+ kvmppc_e500_ref_release(ref);
	289	+ }
298	290	}
299		−
300		− clear_tlb_privs(vcpu_e500);
301	291	}
302	292
303	293	void kvmppc_core_flush_tlb(struct kvm_vcpu *vcpu)
304	294	{
305	295	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
306		− clear_tlb_refs(vcpu_e500);
	296	+ kvmppc_e500_tlbil_all(vcpu_e500);
	297	+ clear_tlb_privs(vcpu_e500);
307	298	clear_tlb1_bitmap(vcpu_e500);
308	299	}
309	300
@@ -458,8 +449,6 @@ static inline int kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500, · 148 unmodified lines
458	449	gvaddr &= ~((tsize_pages << PAGE_SHIFT) - 1);
459	450	}
460	451
461		− /* Drop old ref and setup new one. */
462		− kvmppc_e500_ref_release(ref);
463	452	kvmppc_e500_ref_setup(ref, gtlbe, pfn);
464	453
465	454	kvmppc_e500_setup_stlbe(&vcpu_e500->vcpu, gtlbe, tsize,
@@ -507,14 +496,15 @@ static int kvmppc_e500_tlb1_map_tlb1(struct kvmppc_vcpu_e500 *vcpu_e500, · 41 unmodified lines
507	496	if (unlikely(vcpu_e500->host_tlb1_nv >= tlb1_max_shadow_size()))
508	497	vcpu_e500->host_tlb1_nv = 0;
509	498
510		− vcpu_e500->tlb_refs[1][sesel] = *ref;
511		− vcpu_e500->g2h_tlb1_map[esel] \|= (u64)1 << sesel;
512		− vcpu_e500->gtlb_priv[1][esel].ref.flags \|= E500_TLB_BITMAP;
513	499	if (vcpu_e500->h2g_tlb1_rmap[sesel]) {
514		− unsigned int idx = vcpu_e500->h2g_tlb1_rmap[sesel];
	500	+ unsigned int idx = vcpu_e500->h2g_tlb1_rmap[sesel] - 1;
515	501	vcpu_e500->g2h_tlb1_map[idx] &= ~(1ULL << sesel);
516	502	}
517		− vcpu_e500->h2g_tlb1_rmap[sesel] = esel;
	503	+
	504	+ vcpu_e500->gtlb_priv[1][esel].ref.flags \|= E500_TLB_BITMAP;
	505	+ vcpu_e500->g2h_tlb1_map[esel] \|= (u64)1 << sesel;
	506	+ vcpu_e500->h2g_tlb1_rmap[sesel] = esel + 1;
	507	+ WARN_ON(!(ref->flags & E500_TLB_VALID));
518	508
519	509	return sesel;
520	510	}
@@ -526,13 +516,12 @@ static int kvmppc_e500_tlb1_map(struct kvmppc_vcpu_e500 *vcpu_e500, · 5 unmodified lines
526	516	u64 gvaddr, gfn_t gfn, struct kvm_book3e_206_tlb_entry *gtlbe,
527	517	struct kvm_book3e_206_tlb_entry *stlbe, int esel)
528	518	{
529		− struct tlbe_ref ref;
	519	+ struct tlbe_ref *ref = &vcpu_e500->gtlb_priv[1][esel].ref;
530	520	int sesel;
531	521	int r;
532	522
533		− ref.flags = 0;
534	523	r = kvmppc_e500_shadow_map(vcpu_e500, gvaddr, gfn, gtlbe, 1, stlbe,
535		− &ref);
	524	+ ref);
536	525	if (r)
537	526	return r;
538	527
@@ -544,7 +533,7 @@ static int kvmppc_e500_tlb1_map(struct kvmppc_vcpu_e500 *vcpu_e500, · 5 unmodified lines
544	533	}
545	534
546	535	/* Otherwise map into TLB1 */
547		− sesel = kvmppc_e500_tlb1_map_tlb1(vcpu_e500, &ref, esel);
	536	+ sesel = kvmppc_e500_tlb1_map_tlb1(vcpu_e500, ref, esel);
548	537	write_stlbe(vcpu_e500, gtlbe, stlbe, 1, sesel);
549	538
550	539	return 0;
@@ -565,7 +554,7 @@ void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 eaddr, gpa_t gpaddr, · 14 unmodified lines
565	554	case 0:
566	555	priv = &vcpu_e500->gtlb_priv[tlbsel][esel];
567	556
568		− /* Triggers after clear_tlb_refs or on initial mapping */
	557	+ /* Triggers after clear_tlb_privs or on initial mapping */
569	558	if (!(priv->ref.flags & E500_TLB_VALID)) {
570	559	kvmppc_e500_tlb0_map(vcpu_e500, esel, &stlbe);
571	560	} else {
@@ -665,35 +654,16 @@ int e500_mmu_host_init(struct kvmppc_vcpu_e500 *vcpu_e500) · 93 unmodified lines
665	654	host_tlb_params[0].entries / host_tlb_params[0].ways;
666	655	host_tlb_params[1].sets = 1;
667	656
668		− vcpu_e500->tlb_refs[0] =
669		− kzalloc(sizeof(struct tlbe_ref) * host_tlb_params[0].entries,
670		− GFP_KERNEL);
671		− if (!vcpu_e500->tlb_refs[0])
672		− goto err;
673		−
674		− vcpu_e500->tlb_refs[1] =
675		− kzalloc(sizeof(struct tlbe_ref) * host_tlb_params[1].entries,
676		− GFP_KERNEL);
677		− if (!vcpu_e500->tlb_refs[1])
678		− goto err;
679		−
680	657	vcpu_e500->h2g_tlb1_rmap = kzalloc(sizeof(unsigned int) *
681	658	host_tlb_params[1].entries,
682	659	GFP_KERNEL);
683	660	if (!vcpu_e500->h2g_tlb1_rmap)
684		− goto err;
	661	+ return -EINVAL;
685	662
686	663	return 0;
687		−
688		−err:
689		− kfree(vcpu_e500->tlb_refs[0]);
690		− kfree(vcpu_e500->tlb_refs[1]);
691		− return -EINVAL;
692	664	}
693	665
694	666	void e500_mmu_host_uninit(struct kvmppc_vcpu_e500 *vcpu_e500)
695	667	{
696	668	kfree(vcpu_e500->h2g_tlb1_rmap);
697		− kfree(vcpu_e500->tlb_refs[0]);
698		− kfree(vcpu_e500->tlb_refs[1]);
699	669	}

arch/powerpc/kvm/e500mc.c+6−1

@@ -108,6 +108,8 @@ void kvmppc_mmu_msr_notify(struct kvm_vcpu *vcpu, u32 old_msr) · 107 unmodified lines
108	108	{
109	109	}
110	110
	111	+static DEFINE_PER_CPU(struct kvm_vcpu *, last_vcpu_on_cpu);
	112	+
111	113	void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
112	114	{
113	115	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
@@ -136,8 +138,11 @@ void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu) · 22 unmodified lines
136	138	mtspr(SPRN_GDEAR, vcpu->arch.shared->dar);
137	139	mtspr(SPRN_GESR, vcpu->arch.shared->esr);
138	140
139		− if (vcpu->arch.oldpir != mfspr(SPRN_PIR))
	141	+ if (vcpu->arch.oldpir != mfspr(SPRN_PIR) \|\|
	142	+ __get_cpu_var(last_vcpu_on_cpu) != vcpu) {
140	143	kvmppc_e500_tlbil_all(vcpu_e500);
	144	+ __get_cpu_var(last_vcpu_on_cpu) = vcpu;
	145	+ }
141	146
142	147	kvmppc_load_guest_fp(vcpu);
143	148	}

arch/powerpc/mm/hash_utils_64.c+17−5

@@ -195,6 +195,11 @@ int htab_bolt_mapping(unsigned long vstart, unsigned long vend, · 194 unmodified lines
195	195	unsigned long vpn = hpt_vpn(vaddr, vsid, ssize);
196	196	unsigned long tprot = prot;
197	197
	198	+ /*
	199	+ * If we hit a bad address return error.
	200	+ */
	201	+ if (!vsid)
	202	+ return -1;
198	203	/* Make kernel text executable */
199	204	if (overlaps_kernel_text(vaddr, vaddr + step))
200	205	tprot &= ~HPTE_R_N;
@@ -759,6 +764,8 @@ void __init early_init_mmu(void) · 558 unmodified lines
759	764	/* Initialize stab / SLB management */
760	765	if (mmu_has_feature(MMU_FTR_SLB))
761	766	slb_initialize();
	767	+ else
	768	+ stab_initialize(get_paca()->stab_real);
762	769	}
763	770
764	771	#ifdef CONFIG_SMP
@@ -922,11 +929,6 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap) · 157 unmodified lines
922	929	DBG_LOW("hash_page(ea=%016lx, access=%lx, trap=%lx\n",
923	930	ea, access, trap);
924	931
925		− if ((ea & ~REGION_MASK) >= PGTABLE_RANGE) {
926		− DBG_LOW(" out of pgtable range !\n");
927		− return 1;
928		− }
929		−
930	932	/* Get region & vsid */
931	933	switch (REGION_ID(ea)) {
932	934	case USER_REGION_ID:
@@ -957,6 +959,11 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap) · 24 unmodified lines
957	959	}
958	960	DBG_LOW(" mm=%p, mm->pgdir=%p, vsid=%016lx\n", mm, mm->pgd, vsid);
959	961
	962	+ /* Bad address. */
	963	+ if (!vsid) {
	964	+ DBG_LOW("Bad address!\n");
	965	+ return 1;
	966	+ }
960	967	/* Get pgdir */
961	968	pgdir = mm->pgd;
962	969	if (pgdir == NULL)
@@ -1126,6 +1133,8 @@ void hash_preload(struct mm_struct *mm, unsigned long ea, · 163 unmodified lines
1126	1133	/* Get VSID */
1127	1134	ssize = user_segment_size(ea);
1128	1135	vsid = get_vsid(mm->context.id, ea, ssize);
	1136	+ if (!vsid)
	1137	+ return;
1129	1138
1130	1139	/* Hash doesn't like irqs */
1131	1140	local_irq_save(flags);
@@ -1233,6 +1242,9 @@ static void kernel_map_linear_page(unsigned long vaddr, unsigned long lmi) · 101 unmodified lines
1233	1242	hash = hpt_hash(vpn, PAGE_SHIFT, mmu_kernel_ssize);
1234	1243	hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP);
1235	1244
	1245	+ /* Don't create HPTE entries for bad address */
	1246	+ if (!vsid)
	1247	+ return;
1236	1248	ret = ppc_md.hpte_insert(hpteg, vpn, __pa(vaddr),
1237	1249	mode, HPTE_V_BOLTED,
1238	1250	mmu_linear_psize, mmu_kernel_ssize);

arch/powerpc/mm/mmu_context_hash64.c+1−10

@@ -29,15 +29,6 @@ · 28 unmodified lines
29	29	static DEFINE_SPINLOCK(mmu_context_lock);
30	30	static DEFINE_IDA(mmu_context_ida);
31	31
32		−/*
33		− * 256MB segment
34		− * The proto-VSID space has 2^(CONTEX_BITS + USER_ESID_BITS) - 1 segments
35		− * available for user mappings. Each segment contains 2^28 bytes. Each
36		− * context maps 2^46 bytes (64TB) so we can support 2^19-1 contexts
37		− * (19 == 37 + 28 - 46).
38		− */
39		−#define MAX_CONTEXT ((1UL << CONTEXT_BITS) - 1)
40		−
41	32	int __init_new_context(void)
42	33	{
43	34	int index;
@@ -56,7 +47,7 @@ again: · 12 unmodified lines
56	47	else if (err)
57	48	return err;
58	49
59		− if (index > MAX_CONTEXT) {
	50	+ if (index > MAX_USER_CONTEXT) {
60	51	spin_lock(&mmu_context_lock);
61	52	ida_remove(&mmu_context_ida, index);
62	53	spin_unlock(&mmu_context_lock);

arch/powerpc/mm/pgtable_64.c+1−1

@@ -61,7 +61,7 @@ · 60 unmodified lines
61	61	#endif
62	62
63	63	#ifdef CONFIG_PPC_STD_MMU_64
64		−#if TASK_SIZE_USER64 > (1UL << (USER_ESID_BITS + SID_SHIFT))
	64	+#if TASK_SIZE_USER64 > (1UL << (ESID_BITS + SID_SHIFT))
65	65	#error TASK_SIZE_USER64 exceeds user VSID range
66	66	#endif
67	67	#endif

arch/powerpc/mm/slb_low.S+25−25

@@ -31,10 +31,15 @@ · 30 unmodified lines
31	31	* No other registers are examined or changed.
32	32	*/
33	33	_GLOBAL(slb_allocate_realmode)
34		− /* r3 = faulting address */
	34	+ /*
	35	+ * check for bad kernel/user address
	36	+ * (ea & ~REGION_MASK) >= PGTABLE_RANGE
	37	+ */
	38	+ rldicr. r9,r3,4,(63 - 46 - 4)
	39	+ bne- 8f
35	40
36	41	srdi r9,r3,60 /* get region */
37		− srdi r10,r3,28 /* get esid */
	42	+ srdi r10,r3,SID_SHIFT /* get esid */
38	43	cmpldi cr7,r9,0xc /* cmp PAGE_OFFSET for later use */
39	44
40	45	/* r3 = address, r10 = esid, cr7 = <> PAGE_OFFSET */
@@ -56,12 +61,14 @@ _GLOBAL(slb_allocate_realmode) · 15 unmodified lines
56	61	*/
57	62	_GLOBAL(slb_miss_kernel_load_linear)
58	63	li r11,0
59		− li r9,0x1
60	64	/*
61		− * for 1T we shift 12 bits more. slb_finish_load_1T will do
62		− * the necessary adjustment
	65	+ * context = (MAX_USER_CONTEXT) + ((ea >> 60) - 0xc) + 1
	66	+ * r9 = region id.
63	67	*/
64		− rldimi r10,r9,(CONTEXT_BITS + USER_ESID_BITS),0
	68	+ addis r9,r9,(MAX_USER_CONTEXT - 0xc + 1)@ha
	69	+ addi r9,r9,(MAX_USER_CONTEXT - 0xc + 1)@l
	70	+
	71	+
65	72	BEGIN_FTR_SECTION
66	73	b slb_finish_load
67	74	END_MMU_FTR_SECTION_IFCLR(MMU_FTR_1T_SEGMENT)
@@ -91,24 +98,19 @@ _GLOBAL(slb_miss_kernel_load_vmemmap) · 23 unmodified lines
91	98	_GLOBAL(slb_miss_kernel_load_io)
92	99	li r11,0
93	100	6:
94		− li r9,0x1
95	101	/*
96		− * for 1T we shift 12 bits more. slb_finish_load_1T will do
97		− * the necessary adjustment
	102	+ * context = (MAX_USER_CONTEXT) + ((ea >> 60) - 0xc) + 1
	103	+ * r9 = region id.
98	104	*/
99		− rldimi r10,r9,(CONTEXT_BITS + USER_ESID_BITS),0
	105	+ addis r9,r9,(MAX_USER_CONTEXT - 0xc + 1)@ha
	106	+ addi r9,r9,(MAX_USER_CONTEXT - 0xc + 1)@l
	107	+
100	108	BEGIN_FTR_SECTION
101	109	b slb_finish_load
102	110	END_MMU_FTR_SECTION_IFCLR(MMU_FTR_1T_SEGMENT)
103	111	b slb_finish_load_1T
104	112
105		−0: /* user address: proto-VSID = context << 15 \| ESID. First check
106		− * if the address is within the boundaries of the user region
107		− */
108		− srdi. r9,r10,USER_ESID_BITS
109		− bne- 8f /* invalid ea bits set */
110		−
111		−
	113	+0:
112	114	/* when using slices, we extract the psize off the slice bitmaps
113	115	* and then we need to get the sllp encoding off the mmu_psize_defs
114	116	* array.
@@ -164,15 +166,13 @@ END_MMU_FTR_SECTION_IFCLR(MMU_FTR_1T_SEGMENT) · 49 unmodified lines
164	166	ld r9,PACACONTEXTID(r13)
165	167	BEGIN_FTR_SECTION
166	168	cmpldi r10,0x1000
167		−END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
168		− rldimi r10,r9,USER_ESID_BITS,0
169		−BEGIN_FTR_SECTION
170	169	bge slb_finish_load_1T
171	170	END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
172	171	b slb_finish_load
173	172
174	173	8: /* invalid EA */
175	174	li r10,0 /* BAD_VSID */
	175	+ li r9,0 /* BAD_VSID */
176	176	li r11,SLB_VSID_USER /* flags don't much matter */
177	177	b slb_finish_load
178	178
@@ -221,8 +221,6 @@ _GLOBAL(slb_allocate_user) · 42 unmodified lines
221	221
222	222	/* get context to calculate proto-VSID */
223	223	ld r9,PACACONTEXTID(r13)
224		− rldimi r10,r9,USER_ESID_BITS,0
225		−
226	224	/* fall through slb_finish_load */
227	225
228	226	#endif /* __DISABLED__ */
@@ -231,9 +229,10 @@ _GLOBAL(slb_allocate_user) · 2 unmodified lines
231	229	/*
232	230	* Finish loading of an SLB entry and return
233	231	*
234		− * r3 = EA, r10 = proto-VSID, r11 = flags, clobbers r9, cr7 = <> PAGE_OFFSET
	232	+ * r3 = EA, r9 = context, r10 = ESID, r11 = flags, clobbers r9, cr7 = <> PAGE_OFFSET
235	233	*/
236	234	slb_finish_load:
	235	+ rldimi r10,r9,ESID_BITS,0
237	236	ASM_VSID_SCRAMBLE(r10,r9,256M)
238	237	/*
239	238	* bits above VSID_BITS_256M need to be ignored from r10
@@ -298,10 +297,11 @@ _GLOBAL(slb_compare_rr_to_size) · 58 unmodified lines
298	297	/*
299	298	* Finish loading of a 1T SLB entry (for the kernel linear mapping) and return.
300	299	*
301		− * r3 = EA, r10 = proto-VSID, r11 = flags, clobbers r9
	300	+ * r3 = EA, r9 = context, r10 = ESID(256MB), r11 = flags, clobbers r9
302	301	*/
303	302	slb_finish_load_1T:
304		− srdi r10,r10,40-28 /* get 1T ESID */
	303	+ srdi r10,r10,(SID_SHIFT_1T - SID_SHIFT) /* get 1T ESID */
	304	+ rldimi r10,r9,ESID_BITS_1T,0
305	305	ASM_VSID_SCRAMBLE(r10,r9,1T)
306	306	/*
307	307	* bits above VSID_BITS_1T need to be ignored from r10

arch/powerpc/mm/tlb_hash64.c+1−1

@@ -82,11 +82,11 @@ void hpte_need_flush(struct mm_struct *mm, unsigned long addr, · 81 unmodified lines
82	82	if (!is_kernel_addr(addr)) {
83	83	ssize = user_segment_size(addr);
84	84	vsid = get_vsid(mm->context.id, addr, ssize);
85		− WARN_ON(vsid == 0);
86	85	} else {
87	86	vsid = get_kernel_vsid(addr, mmu_kernel_ssize);
88	87	ssize = mmu_kernel_ssize;
89	88	}
	89	+ WARN_ON(vsid == 0);
90	90	vpn = hpt_vpn(addr, vsid, ssize);
91	91	rpte = __real_pte(__pte(pte), ptep);
92	92

arch/powerpc/perf/power7-pmu.c+13−0

@@ -420,7 +420,20 @@ static struct attribute_group power7_pmu_events_group = { · 419 unmodified lines
420	420	.attrs = power7_events_attr,
421	421	};
422	422
	423	+PMU_FORMAT_ATTR(event, "config:0-19");
	424	+
	425	+static struct attribute *power7_pmu_format_attr[] = {
	426	+ &format_attr_event.attr,
	427	+ NULL,
	428	+};
	429	+
	430	+struct attribute_group power7_pmu_format_group = {
	431	+ .name = "format",
	432	+ .attrs = power7_pmu_format_attr,
	433	+};
	434	+
423	435	static const struct attribute_group *power7_pmu_attr_groups[] = {
	436	+ &power7_pmu_format_group,
424	437	&power7_pmu_events_group,
425	438	NULL,
426	439	};

arch/powerpc/platforms/85xx/sgy_cts1000.c+3−3

@@ -69,7 +69,7 @@ static irqreturn_t gpio_halt_irq(int irq, void *__data) · 68 unmodified lines
69	69	return IRQ_HANDLED;
70	70	};
71	71
72		−static int __devinit gpio_halt_probe(struct platform_device *pdev)
	72	+static int gpio_halt_probe(struct platform_device *pdev)
73	73	{
74	74	enum of_gpio_flags flags;
75	75	struct device_node *node = pdev->dev.of_node;
@@ -128,7 +128,7 @@ static int __devinit gpio_halt_probe(struct platform_device *pdev) · 52 unmodified lines
128	128	return 0;
129	129	}
130	130
131		−static int __devexit gpio_halt_remove(struct platform_device *pdev)
	131	+static int gpio_halt_remove(struct platform_device *pdev)
132	132	{
133	133	if (halt_node) {
134	134	int gpio = of_get_gpio(halt_node, 0);
@@ -165,7 +165,7 @@ static struct platform_driver gpio_halt_driver = { · 30 unmodified lines
165	165	.of_match_table = gpio_halt_match,
166	166	},
167	167	.probe = gpio_halt_probe,
168		− .remove = __devexit_p(gpio_halt_remove),
	168	+ .remove = gpio_halt_remove,
169	169	};
170	170
171	171	module_platform_driver(gpio_halt_driver);

arch/powerpc/platforms/Kconfig.cputype+2−4

@@ -124,9 +124,8 @@ config 6xx · 123 unmodified lines
124	124	select PPC_HAVE_PMU_SUPPORT
125	125
126	126	config POWER3
127		− bool
128	127	depends on PPC64 && PPC_BOOK3S
129		− default y if !POWER4_ONLY
	128	+ def_bool y
130	129
131	130	config POWER4
132	131	depends on PPC64 && PPC_BOOK3S
@@ -145,8 +144,7 @@ config TUNE_CELL · 12 unmodified lines
145	144	but somewhat slower on other machines. This option only changes
146	145	the scheduling of instructions, not the selection of instructions
147	146	itself, so the resulting kernel will keep running on all other
148		− machines. When building a kernel that is supposed to run only
149		− on Cell, you should also select the POWER4_ONLY option.
	147	+ machines.
150	148
151	149	# this is temp to handle compat with arch=ppc
152	150	config 8xx

arch/powerpc/platforms/pseries/lpar.c+7−1

@@ -186,7 +186,13 @@ static long pSeries_lpar_hpte_remove(unsigned long hpte_group) · 185 unmodified lines
186	186	(0x1UL << 4), &dummy1, &dummy2);
187	187	if (lpar_rc == H_SUCCESS)
188	188	return i;
189		− BUG_ON(lpar_rc != H_NOT_FOUND);
	189	+
	190	+ /*
	191	+ * The test for adjunct partition is performed before the
	192	+ * ANDCOND test. H_RESOURCE may be returned, so we need to
	193	+ * check for that as well.
	194	+ */
	195	+ BUG_ON(lpar_rc != H_NOT_FOUND && lpar_rc != H_RESOURCE);
190	196
191	197	slot_offset++;
192	198	slot_offset &= 0x7;

arch/s390/Kconfig+1−1

@@ -134,7 +134,7 @@ config S390 · 133 unmodified lines
134	134	select HAVE_SYSCALL_WRAPPERS
135	135	select HAVE_UID16 if 32BIT
136	136	select HAVE_VIRT_CPU_ACCOUNTING
137		− select HAVE_VIRT_TO_BUS
	137	+ select VIRT_TO_BUS
138	138	select INIT_ALL_POSSIBLE
139	139	select KTIME_SCALAR if 32BIT
140	140	select MODULES_USE_ELF_RELA

arch/s390/include/asm/eadm.h+5−1

@@ -34,6 +34,8 @@ struct arsb { · 33 unmodified lines
34	34	u32 reserved[4];
35	35	} __packed;
36	36
	37	+#define EQC_WR_PROHIBIT 22
	38	+
37	39	struct msb {
38	40	u8 fmt:4;
39	41	u8 oc:4;
@@ -96,11 +98,13 @@ struct scm_device { · 56 unmodified lines
96	98	#define OP_STATE_TEMP_ERR 2
97	99	#define OP_STATE_PERM_ERR 3
98	100
	101	+enum scm_event {SCM_CHANGE, SCM_AVAIL};
	102	+
99	103	struct scm_driver {
100	104	struct device_driver drv;
101	105	int (probe) (struct scm_device scmdev);
102	106	int (remove) (struct scm_device scmdev);
103		− void (notify) (struct scm_device scmdev);
	107	+ void (notify) (struct scm_device scmdev, enum scm_event event);
104	108	void (handler) (struct scm_device scmdev, void *data, int error);
105	109	};
106	110

arch/s390/include/asm/io.h+0−4

@@ -50,10 +50,6 @@ void unxlate_dev_mem_ptr(unsigned long phys, void *addr); · 49 unmodified lines
50	50	#define ioremap_nocache(addr, size) ioremap(addr, size)
51	51	#define ioremap_wc ioremap_nocache
52	52
53		−/* TODO: s390 cannot support io_remap_pfn_range... */
54		−#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
55		− remap_pfn_range(vma, vaddr, pfn, size, prot)
56		−
57	53	static inline void __iomem *ioremap(unsigned long offset, unsigned long size)
58	54	{
59	55	return (void __iomem *) offset;

arch/s390/include/asm/pgtable.h+7−1

@@ -57,6 +57,10 @@ extern unsigned long zero_page_mask; · 56 unmodified lines
57	57	(((unsigned long)(vaddr)) &zero_page_mask))))
58	58	#define __HAVE_COLOR_ZERO_PAGE
59	59
	60	+/* TODO: s390 cannot support io_remap_pfn_range... */
	61	+#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
	62	+ remap_pfn_range(vma, vaddr, pfn, size, prot)
	63	+
60	64	#endif /* !__ASSEMBLY__ */
61	65
62	66	/*
@@ -344,6 +348,7 @@ extern unsigned long MODULES_END; · 281 unmodified lines
344	348	#define _REGION3_ENTRY_CO 0x100 /* change-recording override */
345	349
346	350	/* Bits in the segment table entry */
	351	+#define _SEGMENT_ENTRY_ORIGIN_LARGE ~0xfffffUL /* large page address */
347	352	#define _SEGMENT_ENTRY_ORIGIN ~0x7ffUL/* segment table origin */
348	353	#define _SEGMENT_ENTRY_RO 0x200 /* page protection bit */
349	354	#define _SEGMENT_ENTRY_INV 0x20 /* invalid segment table entry */
@@ -1531,7 +1536,8 @@ extern int s390_enable_sie(void); · 1181 unmodified lines
1531	1536	/*
1532	1537	* No page table caches to initialise
1533	1538	*/
1534		−#define pgtable_cache_init() do { } while (0)
	1539	+static inline void pgtable_cache_init(void) { }
	1540	+static inline void check_pgt_cache(void) { }
1535	1541
1536	1542	#include <asm-generic/pgtable.h>
1537	1543

arch/s390/include/asm/tlbflush.h+0−2

@@ -74,8 +74,6 @@ static inline void __tlb_flush_idte(unsigned long asce) · 73 unmodified lines
74	74
75	75	static inline void __tlb_flush_mm(struct mm_struct * mm)
76	76	{
77		− if (unlikely(cpumask_empty(mm_cpumask(mm))))
78		− return;
79	77	/*
80	78	* If the machine has IDTE we prefer to do a per mm flush
81	79	* on all cpus instead of doing a local flush if the mm

arch/s390/kernel/entry.S+2−1

@@ -636,7 +636,8 @@ ENTRY(mcck_int_handler) · 635 unmodified lines
636	636	UPDATE_VTIME %r14,%r15,__LC_MCCK_ENTER_TIMER
637	637	mcck_skip:
638	638	SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+32,__LC_PANIC_STACK,PAGE_SHIFT
639		− mvc __PT_R0(64,%r11),__LC_GPREGS_SAVE_AREA
	639	+ stm %r0,%r7,__PT_R0(%r11)
	640	+ mvc __PT_R8(32,%r11),__LC_GPREGS_SAVE_AREA+32
640	641	stm %r8,%r9,__PT_PSW(%r11)
641	642	xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
642	643	l %r1,BASED(.Ldo_machine_check)

arch/s390/kernel/entry64.S+3−2

@@ -678,8 +678,9 @@ ENTRY(mcck_int_handler) · 677 unmodified lines
678	678	UPDATE_VTIME %r14,__LC_MCCK_ENTER_TIMER
679	679	LAST_BREAK %r14
680	680	mcck_skip:
681		− lghi %r14,__LC_GPREGS_SAVE_AREA
682		− mvc __PT_R0(128,%r11),0(%r14)
	681	+ lghi %r14,__LC_GPREGS_SAVE_AREA+64
	682	+ stmg %r0,%r7,__PT_R0(%r11)
	683	+ mvc __PT_R8(64,%r11),0(%r14)
683	684	stmg %r8,%r9,__PT_PSW(%r11)
684	685	xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
685	686	lgr %r2,%r11 # pass pointer to pt_regs

arch/s390/kernel/setup.c+2−0

@@ -571,6 +571,8 @@ static void __init setup_memory_end(void) · 570 unmodified lines
571	571
572	572	/* Split remaining virtual space between 1:1 mapping & vmemmap array */
573	573	tmp = VMALLOC_START / (PAGE_SIZE + sizeof(struct page));
	574	+ /* vmemmap contains a multiple of PAGES_PER_SECTION struct pages */
	575	+ tmp = SECTION_ALIGN_UP(tmp);
574	576	tmp = VMALLOC_START - tmp * sizeof(struct page);
575	577	tmp &= ~((vmax >> 11) - 1); /* align to page table level */
576	578	tmp = min(tmp, 1UL << MAX_PHYSMEM_BITS);

arch/s390/lib/uaccess_pt.c+55−28

@@ -77,42 +77,69 @@ static size_t copy_in_kernel(size_t count, void __user *to, · 76 unmodified lines
77	77	* >= -4095 (IS_ERR_VALUE(x) returns true), a fault has occured and the address
78	78	* contains the (negative) exception code.
79	79	*/
80		−static __always_inline unsigned long follow_table(struct mm_struct *mm,
81		− unsigned long addr, int write)
	80	+#ifdef CONFIG_64BIT
	81	+static unsigned long follow_table(struct mm_struct *mm,
	82	+ unsigned long address, int write)
82	83	{
83		− pgd_t *pgd;
84		− pud_t *pud;
85		− pmd_t *pmd;
86		− pte_t *ptep;
	84	+ unsigned long table = (unsigned long )__pa(mm->pgd);
	85	+
	86	+ switch (mm->context.asce_bits & _ASCE_TYPE_MASK) {
	87	+ case _ASCE_TYPE_REGION1:
	88	+ table = table + ((address >> 53) & 0x7ff);
	89	+ if (unlikely(*table & _REGION_ENTRY_INV))
	90	+ return -0x39UL;
	91	+ table = (unsigned long )(table & _REGION_ENTRY_ORIGIN);
	92	+ case _ASCE_TYPE_REGION2:
	93	+ table = table + ((address >> 42) & 0x7ff);
	94	+ if (unlikely(*table & _REGION_ENTRY_INV))
	95	+ return -0x3aUL;
	96	+ table = (unsigned long )(table & _REGION_ENTRY_ORIGIN);
	97	+ case _ASCE_TYPE_REGION3:
	98	+ table = table + ((address >> 31) & 0x7ff);
	99	+ if (unlikely(*table & _REGION_ENTRY_INV))
	100	+ return -0x3bUL;
	101	+ table = (unsigned long )(table & _REGION_ENTRY_ORIGIN);
	102	+ case _ASCE_TYPE_SEGMENT:
	103	+ table = table + ((address >> 20) & 0x7ff);
	104	+ if (unlikely(*table & _SEGMENT_ENTRY_INV))
	105	+ return -0x10UL;
	106	+ if (unlikely(*table & _SEGMENT_ENTRY_LARGE)) {
	107	+ if (write && (*table & _SEGMENT_ENTRY_RO))
	108	+ return -0x04UL;
	109	+ return (*table & _SEGMENT_ENTRY_ORIGIN_LARGE) +
	110	+ (address & ~_SEGMENT_ENTRY_ORIGIN_LARGE);
	111	+ }
	112	+ table = (unsigned long )(table & _SEGMENT_ENTRY_ORIGIN);
	113	+ }
	114	+ table = table + ((address >> 12) & 0xff);
	115	+ if (unlikely(*table & _PAGE_INVALID))
	116	+ return -0x11UL;
	117	+ if (write && (*table & _PAGE_RO))
	118	+ return -0x04UL;
	119	+ return (*table & PAGE_MASK) + (address & ~PAGE_MASK);
	120	+}
87	121
88		− pgd = pgd_offset(mm, addr);
89		− if (pgd_none(pgd) \|\| unlikely(pgd_bad(pgd)))
90		− return -0x3aUL;
	122	+#else /* CONFIG_64BIT */
91	123
92		− pud = pud_offset(pgd, addr);
93		− if (pud_none(pud) \|\| unlikely(pud_bad(pud)))
94		− return -0x3bUL;
	124	+static unsigned long follow_table(struct mm_struct *mm,
	125	+ unsigned long address, int write)
	126	+{
	127	+ unsigned long table = (unsigned long )__pa(mm->pgd);
95	128
96		− pmd = pmd_offset(pud, addr);
97		− if (pmd_none(*pmd))
	129	+ table = table + ((address >> 20) & 0x7ff);
	130	+ if (unlikely(*table & _SEGMENT_ENTRY_INV))
98	131	return -0x10UL;
99		− if (pmd_large(*pmd)) {
100		− if (write && (pmd_val(*pmd) & _SEGMENT_ENTRY_RO))
101		− return -0x04UL;
102		− return (pmd_val(*pmd) & HPAGE_MASK) + (addr & ~HPAGE_MASK);
103		− }
104		− if (unlikely(pmd_bad(*pmd)))
105		− return -0x10UL;
106		−
107		− ptep = pte_offset_map(pmd, addr);
108		− if (!pte_present(*ptep))
	132	+ table = (unsigned long )(table & _SEGMENT_ENTRY_ORIGIN);
	133	+ table = table + ((address >> 12) & 0xff);
	134	+ if (unlikely(*table & _PAGE_INVALID))
109	135	return -0x11UL;
110		− if (write && (!pte_write(ptep) \|\| !pte_dirty(ptep)))
	136	+ if (write && (*table & _PAGE_RO))
111	137	return -0x04UL;
112		−
113		− return (pte_val(*ptep) & PAGE_MASK) + (addr & ~PAGE_MASK);
	138	+ return (*table & PAGE_MASK) + (address & ~PAGE_MASK);
114	139	}
115	140
	141	+#endif /* CONFIG_64BIT */
	142	+
116	143	static __always_inline size_t __user_copy_pt(unsigned long uaddr, void *kptr,
117	144	size_t n, int write_user)
118	145	{
@@ -197,7 +224,7 @@ size_t copy_to_user_pt(size_t n, void __user to, const void from) · 78 unmodified lines
197	224
198	225	static size_t clear_user_pt(size_t n, void __user *to)
199	226	{
200		− void *zpage = &empty_zero_page;
	227	+ void zpage = (void ) empty_zero_page;
201	228	long done, size, ret;
202	229
203	230	done = 0;

arch/score/Kconfig+1−1

@@ -12,7 +12,7 @@ config SCORE · 11 unmodified lines
12	12	select GENERIC_CPU_DEVICES
13	13	select GENERIC_CLOCKEVENTS
14	14	select HAVE_MOD_ARCH_SPECIFIC
15		− select HAVE_VIRT_TO_BUS
	15	+ select VIRT_TO_BUS
16	16	select MODULES_USE_ELF_REL
17	17	select CLONE_BACKWARDS
18	18

arch/sparc/Kconfig+1−7

@@ -84,12 +84,6 @@ config ARCH_DEFCONFIG · 83 unmodified lines
84	84	default "arch/sparc/configs/sparc32_defconfig" if SPARC32
85	85	default "arch/sparc/configs/sparc64_defconfig" if SPARC64
86	86
87		−# CONFIG_BITS can be used at source level to get 32/64 bits
88		−config BITS
89		− int
90		− default 32 if SPARC32
91		− default 64 if SPARC64
92		−
93	87	config IOMMU_HELPER
94	88	bool
95	89	default y if SPARC64
@@ -197,7 +191,7 @@ config RWSEM_XCHGADD_ALGORITHM · 101 unmodified lines
197	191
198	192	config GENERIC_HWEIGHT
199	193	bool
200		− default y if !ULTRA_HAS_POPULATION_COUNT
	194	+ default y
201	195
202	196	config GENERIC_CALIBRATE_DELAY
203	197	bool

arch/sparc/include/asm/Kbuild+5−0

@@ -2,11 +2,16 @@ · 1 unmodified line
2	2
3	3
4	4	generic-y += clkdev.h
	5	+generic-y += cputime.h
5	6	generic-y += div64.h
	7	+generic-y += emergency-restart.h
6	8	generic-y += exec.h
7	9	generic-y += local64.h
	10	+generic-y += mutex.h
8	11	generic-y += irq_regs.h
9	12	generic-y += local.h
10	13	generic-y += module.h
	14	+generic-y += serial.h
11	15	generic-y += trace_clock.h
	16	+generic-y += types.h
12	17	generic-y += word-at-a-time.h

arch/sparc/include/asm/cputime.h+0−6

@@ -1,6 +0,0 @@
1		−#ifndef __SPARC_CPUTIME_H
2		−#define __SPARC_CPUTIME_H
3		−
4		−#include <asm-generic/cputime.h>
5		−
6		−#endif /* __SPARC_CPUTIME_H */

arch/sparc/include/asm/emergency-restart.h+0−6

@@ -1,6 +0,0 @@
1		−#ifndef _ASM_EMERGENCY_RESTART_H
2		−#define _ASM_EMERGENCY_RESTART_H
3		−
4		−#include <asm-generic/emergency-restart.h>
5		−
6		−#endif /* _ASM_EMERGENCY_RESTART_H */

arch/sparc/include/asm/mutex.h+0−9

@@ -1,9 +0,0 @@
1		−/*
2		− * Pull in the generic implementation for the mutex fastpath.
3		− *
4		− * TODO: implement optimized primitives instead, or leave the generic
5		− * implementation in place, or pick the atomic_xchg() based generic
6		− * implementation. (see asm-generic/mutex-xchg.h for details)
7		− */
8		−
9		−#include <asm-generic/mutex-dec.h>

arch/sparc/include/asm/pgtable_64.h+1−0

@@ -915,6 +915,7 @@ static inline int io_remap_pfn_range(struct vm_area_struct *vma, · 914 unmodified lines
915	915	return remap_pfn_range(vma, from, phys_base >> PAGE_SHIFT, size, prot);
916	916	}
917	917
	918	+#include <asm/tlbflush.h>
918	919	#include <asm-generic/pgtable.h>
919	920
920	921	/* We provide our own get_unmapped_area to cope with VA holes and

arch/sparc/include/asm/serial.h+0−6

@@ -1,6 +0,0 @@
1		−#ifndef __SPARC_SERIAL_H
2		−#define __SPARC_SERIAL_H
3		−
4		−#define BASE_BAUD ( 1843200 / 16 )
5		−
6		−#endif /* __SPARC_SERIAL_H */

arch/sparc/include/asm/smp_32.h+0−5

@@ -36,7 +36,6 @@ typedef void (*smpfunc_t)(unsigned long, unsigned long, unsigned long, · 35 unmodified lines
36	36	unsigned long, unsigned long);
37	37
38	38	void cpu_panic(void);
39		−extern void smp4m_irq_rotate(int cpu);
40	39
41	40	/*
42	41	* General functions that each host system must provide.
@@ -46,7 +45,6 @@ void sun4m_init_smp(void); · 3 unmodified lines
46	45	void sun4d_init_smp(void);
47	46
48	47	void smp_callin(void);
49		−void smp_boot_cpus(void);
50	48	void smp_store_cpu_info(int);
51	49
52	50	void smp_resched_interrupt(void);
@@ -107,9 +105,6 @@ extern int hard_smp_processor_id(void); · 54 unmodified lines
107	105
108	106	#define raw_smp_processor_id() (current_thread_info()->cpu)
109	107
110		−#define prof_multiplier(__cpu) cpu_data(__cpu).multiplier
111		−#define prof_counter(__cpu) cpu_data(__cpu).counter
112		−
113	108	void smp_setup_cpu_possible_map(void);
114	109
115	110	#endif /* !(__ASSEMBLY__) */

arch/sparc/include/asm/spitfire.h+1−0

@@ -45,6 +45,7 @@ · 44 unmodified lines
45	45	#define SUN4V_CHIP_NIAGARA3 0x03
46	46	#define SUN4V_CHIP_NIAGARA4 0x04
47	47	#define SUN4V_CHIP_NIAGARA5 0x05
	48	+#define SUN4V_CHIP_SPARC64X 0x8a
48	49	#define SUN4V_CHIP_UNKNOWN 0xff
49	50
50	51	#ifndef __ASSEMBLY__

arch/sparc/include/asm/switch_to_64.h+1−2

@@ -18,8 +18,7 @@ do { \ · 17 unmodified lines
18	18	* and 2 stores in this critical code path. -DaveM
19	19	*/
20	20	#define switch_to(prev, next, last) \
21		−do { flush_tlb_pending(); \
22		− save_and_clear_fpu(); \
	21	+do { save_and_clear_fpu(); \
23	22	/* If you are tempted to conditionalize the following */ \
24	23	/* so that ASI is only written if it changes, think again. */ \
25	24	__asm__ __volatile__("wr %%g0, %0, %%asi" \

arch/sparc/include/asm/tlbflush_64.h+31−6

@@ -11,24 +11,40 @@ · 10 unmodified lines
11	11	struct tlb_batch {
12	12	struct mm_struct *mm;
13	13	unsigned long tlb_nr;
	14	+ unsigned long active;
14	15	unsigned long vaddrs[TLB_BATCH_NR];
15	16	};
16	17
17	18	extern void flush_tsb_kernel_range(unsigned long start, unsigned long end);
18	19	extern void flush_tsb_user(struct tlb_batch *tb);
	20	+extern void flush_tsb_user_page(struct mm_struct *mm, unsigned long vaddr);
19	21
20	22	/* TLB flush operations. */
21	23
22		−extern void flush_tlb_pending(void);
	24	+static inline void flush_tlb_mm(struct mm_struct *mm)
	25	+{
	26	+}
	27	+
	28	+static inline void flush_tlb_page(struct vm_area_struct *vma,
	29	+ unsigned long vmaddr)
	30	+{
	31	+}
	32	+
	33	+static inline void flush_tlb_range(struct vm_area_struct *vma,
	34	+ unsigned long start, unsigned long end)
	35	+{
	36	+}
	37	+
	38	+#define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
23	39
24		−#define flush_tlb_range(vma,start,end) \
25		− do { (void)(start); flush_tlb_pending(); } while (0)
26		−#define flush_tlb_page(vma,addr) flush_tlb_pending()
27		−#define flush_tlb_mm(mm) flush_tlb_pending()
	40	+extern void flush_tlb_pending(void);
	41	+extern void arch_enter_lazy_mmu_mode(void);
	42	+extern void arch_leave_lazy_mmu_mode(void);
	43	+#define arch_flush_lazy_mmu_mode() do {} while (0)
28	44
29	45	/* Local cpu only. */
30	46	extern void __flush_tlb_all(void);
31		−
	47	+extern void __flush_tlb_page(unsigned long context, unsigned long vaddr);
32	48	extern void __flush_tlb_kernel_range(unsigned long start, unsigned long end);
33	49
34	50	#ifndef CONFIG_SMP
@@ -38,15 +54,24 @@ do { flush_tsb_kernel_range(start,end); \ · 3 unmodified lines
38	54	__flush_tlb_kernel_range(start,end); \
39	55	} while (0)
40	56
	57	+static inline void global_flush_tlb_page(struct mm_struct *mm, unsigned long vaddr)
	58	+{
	59	+ __flush_tlb_page(CTX_HWBITS(mm->context), vaddr);
	60	+}
	61	+
41	62	#else /* CONFIG_SMP */
42	63
43	64	extern void smp_flush_tlb_kernel_range(unsigned long start, unsigned long end);
	65	+extern void smp_flush_tlb_page(struct mm_struct *mm, unsigned long vaddr);
44	66
45	67	#define flush_tlb_kernel_range(start, end) \
46	68	do { flush_tsb_kernel_range(start,end); \
47	69	smp_flush_tlb_kernel_range(start, end); \
48	70	} while (0)
49	71
	72	+#define global_flush_tlb_page(mm, vaddr) \
	73	+ smp_flush_tlb_page(mm, vaddr)
	74	+
50	75	#endif /* ! CONFIG_SMP */
51	76
52	77	#endif /* _SPARC64_TLBFLUSH_H */

arch/sparc/include/uapi/asm/Kbuild+0−1

@@ -44,7 +44,6 @@ header-y += swab.h · 43 unmodified lines
44	44	header-y += termbits.h
45	45	header-y += termios.h
46	46	header-y += traps.h
47		−header-y += types.h
48	47	header-y += uctx.h
49	48	header-y += unistd.h
50	49	header-y += utrap.h

arch/sparc/include/uapi/asm/types.h+0−17

@@ -1,17 +0,0 @@
1		−#ifndef _SPARC_TYPES_H
2		−#define _SPARC_TYPES_H
3		−/*
4		− * This file is never included by application software unless
5		− * explicitly requested (e.g., via linux/types.h) in which case the
6		− * application is Linux specific so (user-) name space pollution is
7		− * not a major issue. However, for interoperability, libraries still
8		− * need to be careful to avoid a name clashes.
9		− */
10		−
11		−#if defined(__sparc__)
12		−
13		−#include <asm-generic/int-ll64.h>
14		−
15		−#endif /* defined(__sparc__) */
16		−
17		−#endif /* defined(_SPARC_TYPES_H) */

arch/sparc/kernel/cpu.c+6−0

@@ -493,6 +493,12 @@ static void __init sun4v_cpu_probe(void) · 492 unmodified lines
493	493	sparc_pmu_type = "niagara5";
494	494	break;
495	495
	496	+ case SUN4V_CHIP_SPARC64X:
	497	+ sparc_cpu_type = "SPARC64-X";
	498	+ sparc_fpu_type = "SPARC64-X integrated FPU";
	499	+ sparc_pmu_type = "sparc64-x";
	500	+ break;
	501	+
496	502	default:
497	503	printk(KERN_WARNING "CPU: Unknown sun4v cpu type [%s]\n",
498	504	prom_cpu_compatible);

arch/sparc/kernel/head_64.S+23−2

@@ -134,6 +134,8 @@ prom_niagara_prefix: · 133 unmodified lines
134	134	.asciz "SUNW,UltraSPARC-T"
135	135	prom_sparc_prefix:
136	136	.asciz "SPARC-"
	137	+prom_sparc64x_prefix:
	138	+ .asciz "SPARC64-X"
137	139	.align 4
138	140	prom_root_compatible:
139	141	.skip 64
@@ -412,7 +414,7 @@ sun4v_chip_type: · 272 unmodified lines
412	414	cmp %g2, 'T'
413	415	be,pt %xcc, 70f
414	416	cmp %g2, 'M'
415		− bne,pn %xcc, 4f
	417	+ bne,pn %xcc, 49f
416	418	nop
417	419
418	420	70: ldub [%g1 + 7], %g2
@@ -425,7 +427,7 @@ sun4v_chip_type: · 6 unmodified lines
425	427	cmp %g2, '5'
426	428	be,pt %xcc, 5f
427	429	mov SUN4V_CHIP_NIAGARA5, %g4
428		− ba,pt %xcc, 4f
	430	+ ba,pt %xcc, 49f
429	431	nop
430	432
431	433	91: sethi %hi(prom_cpu_compatible), %g1
@@ -439,6 +441,25 @@ sun4v_chip_type: · 7 unmodified lines
439	441	mov SUN4V_CHIP_NIAGARA2, %g4
440	442
441	443	4:
	444	+ /* Athena */
	445	+ sethi %hi(prom_cpu_compatible), %g1
	446	+ or %g1, %lo(prom_cpu_compatible), %g1
	447	+ sethi %hi(prom_sparc64x_prefix), %g7
	448	+ or %g7, %lo(prom_sparc64x_prefix), %g7
	449	+ mov 9, %g3
	450	+41: ldub [%g7], %g2
	451	+ ldub [%g1], %g4
	452	+ cmp %g2, %g4
	453	+ bne,pn %icc, 49f
	454	+ add %g7, 1, %g7
	455	+ subcc %g3, 1, %g3
	456	+ bne,pt %xcc, 41b
	457	+ add %g1, 1, %g1
	458	+ mov SUN4V_CHIP_SPARC64X, %g4
	459	+ ba,pt %xcc, 5f
	460	+ nop
	461	+
	462	+49:
442	463	mov SUN4V_CHIP_UNKNOWN, %g4
443	464	5: sethi %hi(sun4v_chip_type), %g2
444	465	or %g2, %lo(sun4v_chip_type), %g2

arch/sparc/kernel/leon_pci_grpci2.c+26−15

@@ -186,6 +186,8 @@ struct grpci2_cap_first { · 185 unmodified lines
186	186	#define CAP9_IOMAP_OFS 0x20
187	187	#define CAP9_BARSIZE_OFS 0x24
188	188
	189	+#define TGT 256
	190	+
189	191	struct grpci2_priv {
190	192	struct leon_pci_info info; /* must be on top of this structure */
191	193	struct grpci2_regs *regs;
@@ -237,8 +239,12 @@ static int grpci2_cfg_r32(struct grpci2_priv *priv, unsigned int bus, · 45 unmodified lines
237	239	if (where & 0x3)
238	240	return -EINVAL;
239	241
240		− if (bus == 0 && PCI_SLOT(devfn) != 0)
241		− devfn += (0x8 * 6);
	242	+ if (bus == 0) {
	243	+ devfn += (0x8 * 6); /* start at AD16=Device0 */
	244	+ } else if (bus == TGT) {
	245	+ bus = 0;
	246	+ devfn = 0; /* special case: bridge controller itself */
	247	+ }
242	248
243	249	/* Select bus */
244	250	spin_lock_irqsave(&grpci2_dev_lock, flags);
@@ -303,8 +309,12 @@ static int grpci2_cfg_w32(struct grpci2_priv *priv, unsigned int bus, · 58 unmodified lines
303	309	if (where & 0x3)
304	310	return -EINVAL;
305	311
306		− if (bus == 0 && PCI_SLOT(devfn) != 0)
307		− devfn += (0x8 * 6);
	312	+ if (bus == 0) {
	313	+ devfn += (0x8 * 6); /* start at AD16=Device0 */
	314	+ } else if (bus == TGT) {
	315	+ bus = 0;
	316	+ devfn = 0; /* special case: bridge controller itself */
	317	+ }
308	318
309	319	/* Select bus */
310	320	spin_lock_irqsave(&grpci2_dev_lock, flags);
@@ -368,7 +378,7 @@ static int grpci2_read_config(struct pci_bus *bus, unsigned int devfn, · 57 unmodified lines
368	378	unsigned int busno = bus->number;
369	379	int ret;
370	380
371		− if (PCI_SLOT(devfn) > 15 \|\| (PCI_SLOT(devfn) == 0 && busno == 0)) {
	381	+ if (PCI_SLOT(devfn) > 15 \|\| busno > 255) {
372	382	*val = ~0;
373	383	return 0;
374	384	}
@@ -406,7 +416,7 @@ static int grpci2_write_config(struct pci_bus *bus, unsigned int devfn, · 31 unmodified lines
406	416	struct grpci2_priv *priv = grpci2priv;
407	417	unsigned int busno = bus->number;
408	418
409		− if (PCI_SLOT(devfn) > 15 \|\| (PCI_SLOT(devfn) == 0 && busno == 0))
	419	+ if (PCI_SLOT(devfn) > 15 \|\| busno > 255)
410	420	return 0;
411	421
412	422	#ifdef GRPCI2_DEBUG_CFGACCESS
@@ -578,15 +588,15 @@ void grpci2_hw_init(struct grpci2_priv *priv) · 165 unmodified lines
578	588	REGSTORE(regs->ahbmst_map[i], priv->pci_area);
579	589
580	590	/* Get the GRPCI2 Host PCI ID */
581		− grpci2_cfg_r32(priv, 0, 0, PCI_VENDOR_ID, &priv->pciid);
	591	+ grpci2_cfg_r32(priv, TGT, 0, PCI_VENDOR_ID, &priv->pciid);
582	592
583	593	/* Get address to first (always defined) capability structure */
584		− grpci2_cfg_r8(priv, 0, 0, PCI_CAPABILITY_LIST, &capptr);
	594	+ grpci2_cfg_r8(priv, TGT, 0, PCI_CAPABILITY_LIST, &capptr);
585	595
586	596	/* Enable/Disable Byte twisting */
587		− grpci2_cfg_r32(priv, 0, 0, capptr+CAP9_IOMAP_OFS, &io_map);
	597	+ grpci2_cfg_r32(priv, TGT, 0, capptr+CAP9_IOMAP_OFS, &io_map);
588	598	io_map = (io_map & ~0x1) \| (priv->bt_enabled ? 1 : 0);
589		− grpci2_cfg_w32(priv, 0, 0, capptr+CAP9_IOMAP_OFS, io_map);
	599	+ grpci2_cfg_w32(priv, TGT, 0, capptr+CAP9_IOMAP_OFS, io_map);
590	600
591	601	/* Setup the Host's PCI Target BARs for other peripherals to access,
592	602	* and do DMA to the host's memory. The target BARs can be sized and
@@ -617,17 +627,18 @@ void grpci2_hw_init(struct grpci2_priv *priv) · 24 unmodified lines
617	627	pciadr = 0;
618	628	}
619	629	}
620		− grpci2_cfg_w32(priv, 0, 0, capptr+CAP9_BARSIZE_OFS+i*4, bar_sz);
621		− grpci2_cfg_w32(priv, 0, 0, PCI_BASE_ADDRESS_0+i*4, pciadr);
622		− grpci2_cfg_w32(priv, 0, 0, capptr+CAP9_BAR_OFS+i*4, ahbadr);
	630	+ grpci2_cfg_w32(priv, TGT, 0, capptr+CAP9_BARSIZE_OFS+i*4,
	631	+ bar_sz);
	632	+ grpci2_cfg_w32(priv, TGT, 0, PCI_BASE_ADDRESS_0+i*4, pciadr);
	633	+ grpci2_cfg_w32(priv, TGT, 0, capptr+CAP9_BAR_OFS+i*4, ahbadr);
623	634	printk(KERN_INFO " TGT BAR[%d]: 0x%08x (PCI)-> 0x%08x\n",
624	635	i, pciadr, ahbadr);
625	636	}
626	637
627	638	/* set as bus master and enable pci memory responses */
628		− grpci2_cfg_r32(priv, 0, 0, PCI_COMMAND, &data);
	639	+ grpci2_cfg_r32(priv, TGT, 0, PCI_COMMAND, &data);
629	640	data \|= (PCI_COMMAND_MEMORY \| PCI_COMMAND_MASTER);
630		− grpci2_cfg_w32(priv, 0, 0, PCI_COMMAND, data);
	641	+ grpci2_cfg_w32(priv, TGT, 0, PCI_COMMAND, data);
631	642
632	643	/* Enable Error respone (CPU-TRAP) on illegal memory access. */
633	644	REGSTORE(regs->ctrl, CTRL_ER \| CTRL_PE);

arch/sparc/kernel/smp_64.c+37−4

@@ -849,7 +849,7 @@ void smp_tsb_sync(struct mm_struct *mm) · 848 unmodified lines
849	849	}
850	850
851	851	extern unsigned long xcall_flush_tlb_mm;
852		−extern unsigned long xcall_flush_tlb_pending;
	852	+extern unsigned long xcall_flush_tlb_page;
853	853	extern unsigned long xcall_flush_tlb_kernel_range;
854	854	extern unsigned long xcall_fetch_glob_regs;
855	855	extern unsigned long xcall_fetch_glob_pmu;
@@ -1074,23 +1074,56 @@ local_flush_and_out: · 218 unmodified lines
1074	1074	put_cpu();
1075	1075	}
1076	1076
	1077	+struct tlb_pending_info {
	1078	+ unsigned long ctx;
	1079	+ unsigned long nr;
	1080	+ unsigned long *vaddrs;
	1081	+};
	1082	+
	1083	+static void tlb_pending_func(void *info)
	1084	+{
	1085	+ struct tlb_pending_info *t = info;
	1086	+
	1087	+ __flush_tlb_pending(t->ctx, t->nr, t->vaddrs);
	1088	+}
	1089	+
1077	1090	void smp_flush_tlb_pending(struct mm_struct mm, unsigned long nr, unsigned long vaddrs)
1078	1091	{
1079	1092	u32 ctx = CTX_HWBITS(mm->context);
	1093	+ struct tlb_pending_info info;
1080	1094	int cpu = get_cpu();
1081	1095
	1096	+ info.ctx = ctx;
	1097	+ info.nr = nr;
	1098	+ info.vaddrs = vaddrs;
	1099	+
1082	1100	if (mm == current->mm && atomic_read(&mm->mm_users) == 1)
1083	1101	cpumask_copy(mm_cpumask(mm), cpumask_of(cpu));
1084	1102	else
1085		− smp_cross_call_masked(&xcall_flush_tlb_pending,
1086		− ctx, nr, (unsigned long) vaddrs,
1087		− mm_cpumask(mm));
	1103	+ smp_call_function_many(mm_cpumask(mm), tlb_pending_func,
	1104	+ &info, 1);
1088	1105
1089	1106	__flush_tlb_pending(ctx, nr, vaddrs);
1090	1107
1091	1108	put_cpu();
1092	1109	}
1093	1110
	1111	+void smp_flush_tlb_page(struct mm_struct *mm, unsigned long vaddr)
	1112	+{
	1113	+ unsigned long context = CTX_HWBITS(mm->context);
	1114	+ int cpu = get_cpu();
	1115	+
	1116	+ if (mm == current->mm && atomic_read(&mm->mm_users) == 1)
	1117	+ cpumask_copy(mm_cpumask(mm), cpumask_of(cpu));
	1118	+ else
	1119	+ smp_cross_call_masked(&xcall_flush_tlb_page,
	1120	+ context, vaddr, 0,
	1121	+ mm_cpumask(mm));
	1122	+ __flush_tlb_page(context, vaddr);
	1123	+
	1124	+ put_cpu();
	1125	+}
	1126	+
1094	1127	void smp_flush_tlb_kernel_range(unsigned long start, unsigned long end)
1095	1128	{
1096	1129	start &= PAGE_MASK;

arch/sparc/lib/bitext.c+1−5

@@ -119,11 +119,7 @@ void bit_map_clear(struct bit_map *t, int offset, int len) · 118 unmodified lines
119	119
120	120	void bit_map_init(struct bit_map t, unsigned long map, int size)
121	121	{
122		−
123		− if ((size & 07) != 0)
124		− BUG();
125		− memset(map, 0, size>>3);
126		−
	122	+ bitmap_zero(map, size);
127	123	memset(t, 0, sizeof *t);
128	124	spin_lock_init(&t->lock);
129	125	t->map = map;

arch/sparc/mm/iommu.c+1−1

@@ -34,7 +34,7 @@ · 33 unmodified lines
34	34	#define IOMMU_RNGE IOMMU_RNGE_256MB
35	35	#define IOMMU_START 0xF0000000
36	36	#define IOMMU_WINSIZE (25610241024U)
37		−#define IOMMU_NPTES (IOMMU_WINSIZE/PAGE_SIZE) /* 64K PTEs, 265KB */
	37	+#define IOMMU_NPTES (IOMMU_WINSIZE/PAGE_SIZE) /* 64K PTEs, 256KB */
38	38	#define IOMMU_ORDER 6 /* 4096 * (1<<6) */
39	39
40	40	/* srmmu.c */

arch/sparc/mm/srmmu.c+3−1

@@ -280,7 +280,9 @@ static void __init srmmu_nocache_init(void) · 279 unmodified lines
280	280	SRMMU_NOCACHE_ALIGN_MAX, 0UL);
281	281	memset(srmmu_nocache_pool, 0, srmmu_nocache_size);
282	282
283		− srmmu_nocache_bitmap = __alloc_bootmem(bitmap_bits >> 3, SMP_CACHE_BYTES, 0UL);
	283	+ srmmu_nocache_bitmap =
	284	+ __alloc_bootmem(BITS_TO_LONGS(bitmap_bits) * sizeof(long),
	285	+ SMP_CACHE_BYTES, 0UL);
284	286	bit_map_init(&srmmu_nocache_map, srmmu_nocache_bitmap, bitmap_bits);
285	287
286	288	srmmu_swapper_pg_dir = __srmmu_get_nocache(SRMMU_PGD_TABLE_SIZE, SRMMU_PGD_TABLE_SIZE);

arch/sparc/mm/tlb.c+34−4

@@ -24,11 +24,17 @@ static DEFINE_PER_CPU(struct tlb_batch, tlb_batch); · 23 unmodified lines
24	24	void flush_tlb_pending(void)
25	25	{
26	26	struct tlb_batch *tb = &get_cpu_var(tlb_batch);
	27	+ struct mm_struct *mm = tb->mm;
27	28
28		− if (tb->tlb_nr) {
29		− flush_tsb_user(tb);
	29	+ if (!tb->tlb_nr)
	30	+ goto out;
30	31
31		− if (CTX_VALID(tb->mm->context)) {
	32	+ flush_tsb_user(tb);
	33	+
	34	+ if (CTX_VALID(mm->context)) {
	35	+ if (tb->tlb_nr == 1) {
	36	+ global_flush_tlb_page(mm, tb->vaddrs[0]);
	37	+ } else {
32	38	#ifdef CONFIG_SMP
33	39	smp_flush_tlb_pending(tb->mm, tb->tlb_nr,
34	40	&tb->vaddrs[0]);
@@ -37,12 +43,30 @@ void flush_tlb_pending(void) · 2 unmodified lines
37	43	tb->tlb_nr, &tb->vaddrs[0]);
38	44	#endif
39	45	}
40		− tb->tlb_nr = 0;
41	46	}
42	47
	48	+ tb->tlb_nr = 0;
	49	+
	50	+out:
43	51	put_cpu_var(tlb_batch);
44	52	}
45	53
	54	+void arch_enter_lazy_mmu_mode(void)
	55	+{
	56	+ struct tlb_batch *tb = &__get_cpu_var(tlb_batch);
	57	+
	58	+ tb->active = 1;
	59	+}
	60	+
	61	+void arch_leave_lazy_mmu_mode(void)
	62	+{
	63	+ struct tlb_batch *tb = &__get_cpu_var(tlb_batch);
	64	+
	65	+ if (tb->tlb_nr)
	66	+ flush_tlb_pending();
	67	+ tb->active = 0;
	68	+}
	69	+
46	70	static void tlb_batch_add_one(struct mm_struct *mm, unsigned long vaddr,
47	71	bool exec)
48	72	{
@@ -60,6 +84,12 @@ static void tlb_batch_add_one(struct mm_struct *mm, unsigned long vaddr, · 11 unmodified lines
60	84	nr = 0;
61	85	}
62	86
	87	+ if (!tb->active) {
	88	+ global_flush_tlb_page(mm, vaddr);
	89	+ flush_tsb_user_page(mm, vaddr);
	90	+ return;
	91	+ }
	92	+
63	93	if (nr == 0)
64	94	tb->mm = mm;
65	95

arch/sparc/mm/tsb.c+42−15

@@ -7,11 +7,10 @@ · 6 unmodified lines
7	7	#include <linux/preempt.h>
8	8	#include <linux/slab.h>
9	9	#include <asm/page.h>
10		−#include <asm/tlbflush.h>
11		−#include <asm/tlb.h>
12		−#include <asm/mmu_context.h>
13	10	#include <asm/pgtable.h>
	11	+#include <asm/mmu_context.h>
14	12	#include <asm/tsb.h>
	13	+#include <asm/tlb.h>
15	14	#include <asm/oplib.h>
16	15
17	16	extern struct tsb swapper_tsb[KERNEL_TSB_NENTRIES];
@@ -46,23 +45,27 @@ void flush_tsb_kernel_range(unsigned long start, unsigned long end) · 28 unmodified lines
46	45	}
47	46	}
48	47
49		−static void __flush_tsb_one(struct tlb_batch *tb, unsigned long hash_shift,
50		− unsigned long tsb, unsigned long nentries)
	48	+static void __flush_tsb_one_entry(unsigned long tsb, unsigned long v,
	49	+ unsigned long hash_shift,
	50	+ unsigned long nentries)
51	51	{
52		− unsigned long i;
	52	+ unsigned long tag, ent, hash;
53	53
54		− for (i = 0; i < tb->tlb_nr; i++) {
55		− unsigned long v = tb->vaddrs[i];
56		− unsigned long tag, ent, hash;
	54	+ v &= ~0x1UL;
	55	+ hash = tsb_hash(v, hash_shift, nentries);
	56	+ ent = tsb + (hash * sizeof(struct tsb));
	57	+ tag = (v >> 22UL);
57	58
58		− v &= ~0x1UL;
	59	+ tsb_flush(ent, tag);
	60	+}
59	61
60		− hash = tsb_hash(v, hash_shift, nentries);
61		− ent = tsb + (hash * sizeof(struct tsb));
62		− tag = (v >> 22UL);
	62	+static void __flush_tsb_one(struct tlb_batch *tb, unsigned long hash_shift,
	63	+ unsigned long tsb, unsigned long nentries)
	64	+{
	65	+ unsigned long i;
63	66
64		− tsb_flush(ent, tag);
65		− }
	67	+ for (i = 0; i < tb->tlb_nr; i++)
	68	+ __flush_tsb_one_entry(tsb, tb->vaddrs[i], hash_shift, nentries);
66	69	}
67	70
68	71	void flush_tsb_user(struct tlb_batch *tb)
@@ -90,6 +93,30 @@ void flush_tsb_user(struct tlb_batch *tb) · 21 unmodified lines
90	93	spin_unlock_irqrestore(&mm->context.lock, flags);
91	94	}
92	95
	96	+void flush_tsb_user_page(struct mm_struct *mm, unsigned long vaddr)
	97	+{
	98	+ unsigned long nentries, base, flags;
	99	+
	100	+ spin_lock_irqsave(&mm->context.lock, flags);
	101	+
	102	+ base = (unsigned long) mm->context.tsb_block[MM_TSB_BASE].tsb;
	103	+ nentries = mm->context.tsb_block[MM_TSB_BASE].tsb_nentries;
	104	+ if (tlb_type == cheetah_plus \|\| tlb_type == hypervisor)
	105	+ base = __pa(base);
	106	+ __flush_tsb_one_entry(base, vaddr, PAGE_SHIFT, nentries);
	107	+
	108	+#if defined(CONFIG_HUGETLB_PAGE) \|\| defined(CONFIG_TRANSPARENT_HUGEPAGE)
	109	+ if (mm->context.tsb_block[MM_TSB_HUGE].tsb) {
	110	+ base = (unsigned long) mm->context.tsb_block[MM_TSB_HUGE].tsb;
	111	+ nentries = mm->context.tsb_block[MM_TSB_HUGE].tsb_nentries;
	112	+ if (tlb_type == cheetah_plus \|\| tlb_type == hypervisor)
	113	+ base = __pa(base);
	114	+ __flush_tsb_one_entry(base, vaddr, HPAGE_SHIFT, nentries);
	115	+ }
	116	+#endif
	117	+ spin_unlock_irqrestore(&mm->context.lock, flags);
	118	+}
	119	+
93	120	#define HV_PGSZ_IDX_BASE HV_PGSZ_IDX_8K
94	121	#define HV_PGSZ_MASK_BASE HV_PGSZ_MASK_8K
95	122

arch/sparc/mm/ultra.S+95−24

@@ -52,6 +52,33 @@ __flush_tlb_mm: /* 18 insns */ · 51 unmodified lines
52	52	nop
53	53	nop
54	54
	55	+ .align 32
	56	+ .globl __flush_tlb_page
	57	+__flush_tlb_page: /* 22 insns */
	58	+ /* %o0 = context, %o1 = vaddr */
	59	+ rdpr %pstate, %g7
	60	+ andn %g7, PSTATE_IE, %g2
	61	+ wrpr %g2, %pstate
	62	+ mov SECONDARY_CONTEXT, %o4
	63	+ ldxa [%o4] ASI_DMMU, %g2
	64	+ stxa %o0, [%o4] ASI_DMMU
	65	+ andcc %o1, 1, %g0
	66	+ andn %o1, 1, %o3
	67	+ be,pn %icc, 1f
	68	+ or %o3, 0x10, %o3
	69	+ stxa %g0, [%o3] ASI_IMMU_DEMAP
	70	+1: stxa %g0, [%o3] ASI_DMMU_DEMAP
	71	+ membar #Sync
	72	+ stxa %g2, [%o4] ASI_DMMU
	73	+ sethi %hi(KERNBASE), %o4
	74	+ flush %o4
	75	+ retl
	76	+ wrpr %g7, 0x0, %pstate
	77	+ nop
	78	+ nop
	79	+ nop
	80	+ nop
	81	+
55	82	.align 32
56	83	.globl __flush_tlb_pending
57	84	__flush_tlb_pending: /* 26 insns */
@@ -203,6 +230,31 @@ __cheetah_flush_tlb_mm: /* 19 insns */ · 145 unmodified lines
203	230	retl
204	231	wrpr %g7, 0x0, %pstate
205	232
	233	+__cheetah_flush_tlb_page: /* 22 insns */
	234	+ /* %o0 = context, %o1 = vaddr */
	235	+ rdpr %pstate, %g7
	236	+ andn %g7, PSTATE_IE, %g2
	237	+ wrpr %g2, 0x0, %pstate
	238	+ wrpr %g0, 1, %tl
	239	+ mov PRIMARY_CONTEXT, %o4
	240	+ ldxa [%o4] ASI_DMMU, %g2
	241	+ srlx %g2, CTX_PGSZ1_NUC_SHIFT, %o3
	242	+ sllx %o3, CTX_PGSZ1_NUC_SHIFT, %o3
	243	+ or %o0, %o3, %o0 /* Preserve nucleus page size fields */
	244	+ stxa %o0, [%o4] ASI_DMMU
	245	+ andcc %o1, 1, %g0
	246	+ be,pn %icc, 1f
	247	+ andn %o1, 1, %o3
	248	+ stxa %g0, [%o3] ASI_IMMU_DEMAP
	249	+1: stxa %g0, [%o3] ASI_DMMU_DEMAP
	250	+ membar #Sync
	251	+ stxa %g2, [%o4] ASI_DMMU
	252	+ sethi %hi(KERNBASE), %o4
	253	+ flush %o4
	254	+ wrpr %g0, 0, %tl
	255	+ retl
	256	+ wrpr %g7, 0x0, %pstate
	257	+
206	258	__cheetah_flush_tlb_pending: /* 27 insns */
207	259	/* %o0 = context, %o1 = nr, %o2 = vaddrs[] */
208	260	rdpr %pstate, %g7
@@ -269,6 +321,20 @@ __hypervisor_flush_tlb_mm: /* 10 insns */ · 60 unmodified lines
269	321	retl
270	322	nop
271	323
	324	+__hypervisor_flush_tlb_page: /* 11 insns */
	325	+ /* %o0 = context, %o1 = vaddr */
	326	+ mov %o0, %g2
	327	+ mov %o1, %o0 /* ARG0: vaddr + IMMU-bit */
	328	+ mov %g2, %o1 /* ARG1: mmu context */
	329	+ mov HV_MMU_ALL, %o2 /* ARG2: flags */
	330	+ srlx %o0, PAGE_SHIFT, %o0
	331	+ sllx %o0, PAGE_SHIFT, %o0
	332	+ ta HV_MMU_UNMAP_ADDR_TRAP
	333	+ brnz,pn %o0, __hypervisor_tlb_tl0_error
	334	+ mov HV_MMU_UNMAP_ADDR_TRAP, %o1
	335	+ retl
	336	+ nop
	337	+
272	338	__hypervisor_flush_tlb_pending: /* 16 insns */
273	339	/* %o0 = context, %o1 = nr, %o2 = vaddrs[] */
274	340	sllx %o1, 3, %g1
@@ -339,6 +405,13 @@ cheetah_patch_cachetlbops: · 64 unmodified lines
339	405	call tlb_patch_one
340	406	mov 19, %o2
341	407
	408	+ sethi %hi(__flush_tlb_page), %o0
	409	+ or %o0, %lo(__flush_tlb_page), %o0
	410	+ sethi %hi(__cheetah_flush_tlb_page), %o1
	411	+ or %o1, %lo(__cheetah_flush_tlb_page), %o1
	412	+ call tlb_patch_one
	413	+ mov 22, %o2
	414	+
342	415	sethi %hi(__flush_tlb_pending), %o0
343	416	or %o0, %lo(__flush_tlb_pending), %o0
344	417	sethi %hi(__cheetah_flush_tlb_pending), %o1
@@ -397,10 +470,9 @@ xcall_flush_tlb_mm: /* 21 insns */ · 52 unmodified lines
397	470	nop
398	471	nop
399	472
400		− .globl xcall_flush_tlb_pending
401		−xcall_flush_tlb_pending: /* 21 insns */
402		− /* %g5=context, %g1=nr, %g7=vaddrs[] */
403		− sllx %g1, 3, %g1
	473	+ .globl xcall_flush_tlb_page
	474	+xcall_flush_tlb_page: /* 17 insns */
	475	+ /* %g5=context, %g1=vaddr */
404	476	mov PRIMARY_CONTEXT, %g4
405	477	ldxa [%g4] ASI_DMMU, %g2
406	478	srlx %g2, CTX_PGSZ1_NUC_SHIFT, %g4
@@ -408,20 +480,16 @@ xcall_flush_tlb_pending: /* 21 insns */ · 1 unmodified line
408	480	or %g5, %g4, %g5
409	481	mov PRIMARY_CONTEXT, %g4
410	482	stxa %g5, [%g4] ASI_DMMU
411		−1: sub %g1, (1 << 3), %g1
412		− ldx [%g7 + %g1], %g5
413		− andcc %g5, 0x1, %g0
	483	+ andcc %g1, 0x1, %g0
414	484	be,pn %icc, 2f
415		−
416		− andn %g5, 0x1, %g5
	485	+ andn %g1, 0x1, %g5
417	486	stxa %g0, [%g5] ASI_IMMU_DEMAP
418	487	2: stxa %g0, [%g5] ASI_DMMU_DEMAP
419	488	membar #Sync
420		− brnz,pt %g1, 1b
421		− nop
422	489	stxa %g2, [%g4] ASI_DMMU
423	490	retry
424	491	nop
	492	+ nop
425	493
426	494	.globl xcall_flush_tlb_kernel_range
427	495	xcall_flush_tlb_kernel_range: /* 25 insns */
@@ -656,15 +724,13 @@ __hypervisor_xcall_flush_tlb_mm: /* 21 insns */ · 228 unmodified lines
656	724	membar #Sync
657	725	retry
658	726
659		− .globl __hypervisor_xcall_flush_tlb_pending
660		−__hypervisor_xcall_flush_tlb_pending: /* 21 insns */
661		− /* %g5=ctx, %g1=nr, %g7=vaddrs[], %g2,%g3,%g4,g6=scratch */
662		− sllx %g1, 3, %g1
	727	+ .globl __hypervisor_xcall_flush_tlb_page
	728	+__hypervisor_xcall_flush_tlb_page: /* 17 insns */
	729	+ /* %g5=ctx, %g1=vaddr */
663	730	mov %o0, %g2
664	731	mov %o1, %g3
665	732	mov %o2, %g4
666		−1: sub %g1, (1 << 3), %g1
667		− ldx [%g7 + %g1], %o0 /* ARG0: virtual address */
	733	+ mov %g1, %o0 /* ARG0: virtual address */
668	734	mov %g5, %o1 /* ARG1: mmu context */
669	735	mov HV_MMU_ALL, %o2 /* ARG2: flags */
670	736	srlx %o0, PAGE_SHIFT, %o0
@@ -673,8 +739,6 @@ __hypervisor_xcall_flush_tlb_pending: /* 21 insns */ · 2 unmodified lines
673	739	mov HV_MMU_UNMAP_ADDR_TRAP, %g6
674	740	brnz,a,pn %o0, __hypervisor_tlb_xcall_error
675	741	mov %o0, %g5
676		− brnz,pt %g1, 1b
677		− nop
678	742	mov %g2, %o0
679	743	mov %g3, %o1
680	744	mov %g4, %o2
@@ -757,6 +821,13 @@ hypervisor_patch_cachetlbops: · 76 unmodified lines
757	821	call tlb_patch_one
758	822	mov 10, %o2
759	823
	824	+ sethi %hi(__flush_tlb_page), %o0
	825	+ or %o0, %lo(__flush_tlb_page), %o0
	826	+ sethi %hi(__hypervisor_flush_tlb_page), %o1
	827	+ or %o1, %lo(__hypervisor_flush_tlb_page), %o1
	828	+ call tlb_patch_one
	829	+ mov 11, %o2
	830	+
760	831	sethi %hi(__flush_tlb_pending), %o0
761	832	or %o0, %lo(__flush_tlb_pending), %o0
762	833	sethi %hi(__hypervisor_flush_tlb_pending), %o1
@@ -788,12 +859,12 @@ hypervisor_patch_cachetlbops: · 25 unmodified lines
788	859	call tlb_patch_one
789	860	mov 21, %o2
790	861
791		− sethi %hi(xcall_flush_tlb_pending), %o0
792		− or %o0, %lo(xcall_flush_tlb_pending), %o0
793		− sethi %hi(__hypervisor_xcall_flush_tlb_pending), %o1
794		− or %o1, %lo(__hypervisor_xcall_flush_tlb_pending), %o1
	862	+ sethi %hi(xcall_flush_tlb_page), %o0
	863	+ or %o0, %lo(xcall_flush_tlb_page), %o0
	864	+ sethi %hi(__hypervisor_xcall_flush_tlb_page), %o1
	865	+ or %o1, %lo(__hypervisor_xcall_flush_tlb_page), %o1
795	866	call tlb_patch_one
796		− mov 21, %o2
	867	+ mov 17, %o2
797	868
798	869	sethi %hi(xcall_flush_tlb_kernel_range), %o0
799	870	or %o0, %lo(xcall_flush_tlb_kernel_range), %o0

arch/tile/Kconfig+1−1

@@ -17,7 +17,7 @@ config TILE · 16 unmodified lines
17	17	select GENERIC_IRQ_SHOW
18	18	select HAVE_DEBUG_BUGVERBOSE
19	19	select HAVE_SYSCALL_WRAPPERS if TILEGX
20		− select HAVE_VIRT_TO_BUS
	20	+ select VIRT_TO_BUS
21	21	select SYS_HYPERVISOR
22	22	select ARCH_HAVE_NMI_SAFE_CMPXCHG
23	23	select GENERIC_CLOCKEVENTS

arch/tile/configs/tilegx_defconfig+0−1

@@ -330,7 +330,6 @@ CONFIG_MD_RAID0=m · 329 unmodified lines
330	330	CONFIG_MD_RAID1=m
331	331	CONFIG_MD_RAID10=m
332	332	CONFIG_MD_RAID456=m
333		−CONFIG_MULTICORE_RAID456=y
334	333	CONFIG_MD_FAULTY=m
335	334	CONFIG_BLK_DEV_DM=m
336	335	CONFIG_DM_DEBUG=y

arch/tile/configs/tilepro_defconfig+0−1

@@ -324,7 +324,6 @@ CONFIG_MD_RAID0=m · 323 unmodified lines
324	324	CONFIG_MD_RAID1=m
325	325	CONFIG_MD_RAID10=m
326	326	CONFIG_MD_RAID456=m
327		−CONFIG_MULTICORE_RAID456=y
328	327	CONFIG_MD_FAULTY=m
329	328	CONFIG_BLK_DEV_DM=m
330	329	CONFIG_DM_DEBUG=y

arch/tile/include/asm/irqflags.h+9−1

@@ -40,7 +40,15 @@ · 39 unmodified lines
40	40	#include <asm/percpu.h>
41	41	#include <arch/spr_def.h>
42	42
43		−/* Set and clear kernel interrupt masks. */
	43	+/*
	44	+ * Set and clear kernel interrupt masks.
	45	+ *
	46	+ * NOTE: __insn_mtspr() is a compiler builtin marked as a memory
	47	+ * clobber. We rely on it being equivalent to a compiler barrier in
	48	+ * this code since arch_local_irq_save() and friends must act as
	49	+ * compiler barriers. This compiler semantic is baked into enough
	50	+ * places that the compiler will maintain it going forward.
	51	+ */
44	52	#if CHIP_HAS_SPLIT_INTR_MASK()
45	53	#if INT_PERF_COUNT < 32 \|\| INT_AUX_PERF_COUNT < 32 \|\| INT_MEM_ERROR >= 32
46	54	# error Fix assumptions about which word various interrupts are in

arch/tile/kernel/setup.c+12−13

@@ -1004,15 +1004,8 @@ void __cpuinit setup_cpu(int boot) · 1003 unmodified lines
1004	1004
1005	1005	#ifdef CONFIG_BLK_DEV_INITRD
1006	1006
1007		−/*
1008		− * Note that the kernel can potentially support other compression
1009		− * techniques than gz, though we don't do so by default. If we ever
1010		− * decide to do so we can either look for other filename extensions,
1011		− * or just allow a file with this name to be compressed with an
1012		− * arbitrary compressor (somewhat counterintuitively).
1013		− */
1014	1007	static int __initdata set_initramfs_file;
1015		−static char __initdata initramfs_file[128] = "initramfs.cpio.gz";
	1008	+static char __initdata initramfs_file[128] = "initramfs";
1016	1009
1017	1010	static int __init setup_initramfs_file(char *str)
1018	1011	{
@@ -1026,9 +1019,9 @@ static int __init setup_initramfs_file(char *str) · 7 unmodified lines
1026	1019	early_param("initramfs_file", setup_initramfs_file);
1027	1020
1028	1021	/*
1029		− * We look for an "initramfs.cpio.gz" file in the hvfs.
1030		− * If there is one, we allocate some memory for it and it will be
1031		− * unpacked to the initramfs.
	1022	+ * We look for a file called "initramfs" in the hvfs. If there is one, we
	1023	+ * allocate some memory for it and it will be unpacked to the initramfs.
	1024	+ * If it's compressed, the initd code will uncompress it first.
1032	1025	*/
1033	1026	static void __init load_hv_initrd(void)
1034	1027	{
@@ -1038,10 +1031,16 @@ static void __init load_hv_initrd(void) · 3 unmodified lines
1038	1031
1039	1032	fd = hv_fs_findfile((HV_VirtAddr) initramfs_file);
1040	1033	if (fd == HV_ENOENT) {
1041		− if (set_initramfs_file)
	1034	+ if (set_initramfs_file) {
1042	1035	pr_warning("No such hvfs initramfs file '%s'\n",
1043	1036	initramfs_file);
1044		− return;
	1037	+ return;
	1038	+ } else {
	1039	+ /* Try old backwards-compatible name. */
	1040	+ fd = hv_fs_findfile((HV_VirtAddr)"initramfs.cpio.gz");
	1041	+ if (fd == HV_ENOENT)
	1042	+ return;
	1043	+ }
1045	1044	}
1046	1045	BUG_ON(fd < 0);
1047	1046	stat = hv_fs_fstat(fd);

arch/unicore32/Kconfig+1−1

@@ -9,7 +9,7 @@ config UNICORE32 · 8 unmodified lines
9	9	select GENERIC_ATOMIC64
10	10	select HAVE_KERNEL_LZO
11	11	select HAVE_KERNEL_LZMA
12		− select HAVE_VIRT_TO_BUS
	12	+ select VIRT_TO_BUS
13	13	select ARCH_HAVE_CUSTOM_GPIO_H
14	14	select GENERIC_FIND_FIRST_BIT
15	15	select GENERIC_IRQ_PROBE

arch/x86/Kconfig+2−1

@@ -112,7 +112,7 @@ config X86 · 111 unmodified lines
112	112	select GENERIC_STRNLEN_USER
113	113	select HAVE_CONTEXT_TRACKING if X86_64
114	114	select HAVE_IRQ_TIME_ACCOUNTING
115		− select HAVE_VIRT_TO_BUS
	115	+ select VIRT_TO_BUS
116	116	select MODULES_USE_ELF_REL if X86_32
117	117	select MODULES_USE_ELF_RELA if X86_64
118	118	select CLONE_BACKWARDS if X86_32
@@ -1550,6 +1550,7 @@ config X86_SMAP · 1431 unmodified lines
1550	1550	config EFI
1551	1551	bool "EFI runtime service support"
1552	1552	depends on ACPI
	1553	+ select UCS2_STRING
1553	1554	---help---
1554	1555	This enables the kernel to use EFI runtime services that are
1555	1556	available (such as the EFI variable services).

arch/x86/boot/compressed/Makefile+2−3

@@ -4,7 +4,7 @@ · 3 unmodified lines
4	4	# create a compressed vmlinux image from the original vmlinux
5	5	#
6	6
7		−targets := vmlinux.lds vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma vmlinux.bin.xz vmlinux.bin.lzo head_$(BITS).o misc.o string.o cmdline.o early_serial_console.o piggy.o
	7	+targets := vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma vmlinux.bin.xz vmlinux.bin.lzo
8	8
9	9	KBUILD_CFLAGS := -m$(BITS) -D__KERNEL__ $(LINUX_INCLUDE) -O2
10	10	KBUILD_CFLAGS += -fno-strict-aliasing -fPIC
@@ -29,7 +29,6 @@ VMLINUX_OBJS = $(obj)/vmlinux.lds $(obj)/head_$(BITS).o $(obj)/misc.o \ · 18 unmodified lines
29	29	$(obj)/piggy.o
30	30
31	31	$(obj)/eboot.o: KBUILD_CFLAGS += -fshort-wchar -mno-red-zone
32		−$(obj)/efi_stub_$(BITS).o: KBUILD_CLFAGS += -fshort-wchar -mno-red-zone
33	32
34	33	ifeq ($(CONFIG_EFI_STUB), y)
35	34	VMLINUX_OBJS += $(obj)/eboot.o $(obj)/efi_stub_$(BITS).o
@@ -43,7 +42,7 @@ OBJCOPYFLAGS_vmlinux.bin := -R .comment -S · 7 unmodified lines
43	42	$(obj)/vmlinux.bin: vmlinux FORCE
44	43	$(call if_changed,objcopy)
45	44
46		−targets += vmlinux.bin.all vmlinux.relocs
	45	+targets += $(patsubst $(obj)/%,%,$(VMLINUX_OBJS)) vmlinux.bin.all vmlinux.relocs
47	46
48	47	CMD_RELOCS = arch/x86/tools/relocs
49	48	quiet_cmd_relocs = RELOCS $@

arch/x86/boot/compressed/eboot.c+47−0

@@ -251,6 +251,51 @@ static void find_bits(unsigned long mask, u8 pos, u8 size) · 250 unmodified lines
251	251	*size = len;
252	252	}
253	253
	254	+static efi_status_t setup_efi_vars(struct boot_params *params)
	255	+{
	256	+ struct setup_data *data;
	257	+ struct efi_var_bootdata *efidata;
	258	+ u64 store_size, remaining_size, var_size;
	259	+ efi_status_t status;
	260	+
	261	+ if (!sys_table->runtime->query_variable_info)
	262	+ return EFI_UNSUPPORTED;
	263	+
	264	+ data = (struct setup_data *)(unsigned long)params->hdr.setup_data;
	265	+
	266	+ while (data && data->next)
	267	+ data = (struct setup_data *)(unsigned long)data->next;
	268	+
	269	+ status = efi_call_phys4(sys_table->runtime->query_variable_info,
	270	+ EFI_VARIABLE_NON_VOLATILE \|
	271	+ EFI_VARIABLE_BOOTSERVICE_ACCESS \|
	272	+ EFI_VARIABLE_RUNTIME_ACCESS, &store_size,
	273	+ &remaining_size, &var_size);
	274	+
	275	+ if (status != EFI_SUCCESS)
	276	+ return status;
	277	+
	278	+ status = efi_call_phys3(sys_table->boottime->allocate_pool,
	279	+ EFI_LOADER_DATA, sizeof(*efidata), &efidata);
	280	+
	281	+ if (status != EFI_SUCCESS)
	282	+ return status;
	283	+
	284	+ efidata->data.type = SETUP_EFI_VARS;
	285	+ efidata->data.len = sizeof(struct efi_var_bootdata) -
	286	+ sizeof(struct setup_data);
	287	+ efidata->data.next = 0;
	288	+ efidata->store_size = store_size;
	289	+ efidata->remaining_size = remaining_size;
	290	+ efidata->max_var_size = var_size;
	291	+
	292	+ if (data)
	293	+ data->next = (unsigned long)efidata;
	294	+ else
	295	+ params->hdr.setup_data = (unsigned long)efidata;
	296	+
	297	+}
	298	+
254	299	static efi_status_t setup_efi_pci(struct boot_params *params)
255	300	{
256	301	efi_pci_io_protocol *pci;
@@ -1157,6 +1202,8 @@ struct boot_params efi_main(void handle, efi_system_table_t *_table, · 900 unmodified lines
1157	1202
1158	1203	setup_graphics(boot_params);
1159	1204
	1205	+ setup_efi_vars(boot_params);
	1206	+
1160	1207	setup_efi_pci(boot_params);
1161	1208
1162	1209	status = efi_call_phys3(sys_table->boottime->allocate_pool,

arch/x86/include/asm/efi.h+7−0

@@ -102,6 +102,13 @@ extern void efi_call_phys_epilog(void); · 101 unmodified lines
102	102	extern void efi_unmap_memmap(void);
103	103	extern void efi_memory_uc(u64 addr, unsigned long size);
104	104
	105	+struct efi_var_bootdata {
	106	+ struct setup_data data;
	107	+ u64 store_size;
	108	+ u64 remaining_size;
	109	+ u64 max_var_size;
	110	+};
	111	+
105	112	#ifdef CONFIG_EFI
106	113
107	114	static inline bool efi_is_native(void)

arch/x86/include/asm/kprobes.h+1−0

@@ -77,6 +77,7 @@ struct arch_specific_insn { · 76 unmodified lines
77	77	* a post_handler or break_handler).
78	78	*/
79	79	int boostable;
	80	+ bool if_modifier;
80	81	};
81	82
82	83	struct arch_optimized_insn {

arch/x86/include/asm/kvm_host.h+2−2

@@ -414,8 +414,8 @@ struct kvm_vcpu_arch { · 413 unmodified lines
414	414	gpa_t time;
415	415	struct pvclock_vcpu_time_info hv_clock;
416	416	unsigned int hw_tsc_khz;
417		− unsigned int time_offset;
418		− struct page *time_page;
	417	+ struct gfn_to_hva_cache pv_time;
	418	+ bool pv_time_enabled;
419	419	/* set guest stopped flag in pvclock flags field */
420	420	bool pvclock_set_guest_stopped_request;
421	421

arch/x86/include/asm/paravirt.h+4−1

@@ -703,7 +703,10 @@ static inline void arch_leave_lazy_mmu_mode(void) · 702 unmodified lines
703	703	PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
704	704	}
705	705
706		−void arch_flush_lazy_mmu_mode(void);
	706	+static inline void arch_flush_lazy_mmu_mode(void)
	707	+{
	708	+ PVOP_VCALL0(pv_mmu_ops.lazy_mode.flush);
	709	+}
707	710
708	711	static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
709	712	phys_addr_t phys, pgprot_t flags)

arch/x86/include/asm/paravirt_types.h+2−0

@@ -91,6 +91,7 @@ struct pv_lazy_ops { · 90 unmodified lines
91	91	/* Set deferred update mode, used for batching operations. */
92	92	void (*enter)(void);
93	93	void (*leave)(void);
	94	+ void (*flush)(void);
94	95	};
95	96
96	97	struct pv_time_ops {
@@ -679,6 +680,7 @@ void paravirt_end_context_switch(struct task_struct *next); · 582 unmodified lines
679	680
680	681	void paravirt_enter_lazy_mmu(void);
681	682	void paravirt_leave_lazy_mmu(void);
	683	+void paravirt_flush_lazy_mmu(void);
682	684
683	685	void _paravirt_nop(void);
684	686	u32 _paravirt_ident_32(u32);

arch/x86/include/asm/syscall.h+2−2

@@ -29,13 +29,13 @@ extern const unsigned long sys_call_table[]; · 28 unmodified lines
29	29	*/
30	30	static inline int syscall_get_nr(struct task_struct task, struct pt_regs regs)
31	31	{
32		− return regs->orig_ax & __SYSCALL_MASK;
	32	+ return regs->orig_ax;
33	33	}
34	34
35	35	static inline void syscall_rollback(struct task_struct *task,
36	36	struct pt_regs *regs)
37	37	{
38		− regs->ax = regs->orig_ax & __SYSCALL_MASK;
	38	+ regs->ax = regs->orig_ax;
39	39	}
40	40
41	41	static inline long syscall_get_error(struct task_struct *task,

arch/x86/include/asm/tlb.h+1−1

@@ -7,7 +7,7 @@ · 6 unmodified lines
7	7
8	8	#define tlb_flush(tlb) \
9	9	{ \
10		− if (tlb->fullmm == 0) \
	10	+ if (!tlb->fullmm && !tlb->need_flush_all) \
11	11	flush_tlb_mm_range(tlb->mm, tlb->start, tlb->end, 0UL); \
12	12	else \
13	13	flush_tlb_mm_range(tlb->mm, 0UL, TLB_FLUSH_ALL, 0UL); \

arch/x86/include/asm/xen/hypercall.h+2−2

@@ -382,14 +382,14 @@ HYPERVISOR_console_io(int cmd, int count, char *str) · 381 unmodified lines
382	382	return _hypercall3(int, console_io, cmd, count, str);
383	383	}
384	384
385		−extern int __must_check HYPERVISOR_physdev_op_compat(int, void *);
	385	+extern int __must_check xen_physdev_op_compat(int, void *);
386	386
387	387	static inline int
388	388	HYPERVISOR_physdev_op(int cmd, void *arg)
389	389	{
390	390	int rc = _hypercall2(int, physdev_op, cmd, arg);
391	391	if (unlikely(rc == -ENOSYS))
392		− rc = HYPERVISOR_physdev_op_compat(cmd, arg);
	392	+ rc = xen_physdev_op_compat(cmd, arg);
393	393	return rc;
394	394	}
395	395

arch/x86/include/uapi/asm/bootparam.h+1−0

@@ -6,6 +6,7 @@ · 5 unmodified lines
6	6	#define SETUP_E820_EXT 1
7	7	#define SETUP_DTB 2
8	8	#define SETUP_PCI 3
	9	+#define SETUP_EFI_VARS 4
9	10
10	11	/* ram_size flags */
11	12	#define RAMDISK_IMAGE_START_MASK 0x07FF

arch/x86/include/uapi/asm/msr-index.h+1−0

@@ -44,6 +44,7 @@ · 43 unmodified lines
44	44	#define SNB_C1_AUTO_UNDEMOTE (1UL << 27)
45	45	#define SNB_C3_AUTO_UNDEMOTE (1UL << 28)
46	46
	47	+#define MSR_PLATFORM_INFO 0x000000ce
47	48	#define MSR_MTRRcap 0x000000fe
48	49	#define MSR_IA32_BBL_CR_CTL 0x00000119
49	50	#define MSR_IA32_BBL_CR_CTL3 0x0000011e

arch/x86/kernel/cpu/mshyperv.c+5−13

@@ -35,13 +35,6 @@ static bool __init ms_hyperv_platform(void) · 34 unmodified lines
35	35	if (!boot_cpu_has(X86_FEATURE_HYPERVISOR))
36	36	return false;
37	37
38		− /*
39		− * Xen emulates Hyper-V to support enlightened Windows.
40		− * Check to see first if we are on a Xen Hypervisor.
41		− */
42		− if (xen_cpuid_base())
43		− return false;
44		−
45	38	cpuid(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS,
46	39	&eax, &hyp_signature[0], &hyp_signature[1], &hyp_signature[2]);
47	40
@@ -82,12 +75,6 @@ static void __init ms_hyperv_init_platform(void) · 34 unmodified lines
82	75
83	76	if (ms_hyperv.features & HV_X64_MSR_TIME_REF_COUNT_AVAILABLE)
84	77	clocksource_register_hz(&hyperv_cs, NSEC_PER_SEC/100);
85		−#if IS_ENABLED(CONFIG_HYPERV)
86		− /*
87		− * Setup the IDT for hypervisor callback.
88		− */
89		− alloc_intr_gate(HYPERVISOR_CALLBACK_VECTOR, hyperv_callback_vector);
90		−#endif
91	78	}
92	79
93	80	const __refconst struct hypervisor_x86 x86_hyper_ms_hyperv = {
@@ -103,6 +90,11 @@ static irq_handler_t vmbus_isr; · 9 unmodified lines
103	90
104	91	void hv_register_vmbus_handler(int irq, irq_handler_t handler)
105	92	{
	93	+ /*
	94	+ * Setup the IDT for hypervisor callback.
	95	+ */
	96	+ alloc_intr_gate(HYPERVISOR_CALLBACK_VECTOR, hyperv_callback_vector);
	97	+
106	98	vmbus_irq = irq;
107	99	vmbus_isr = handler;
108	100	}

arch/x86/kernel/cpu/perf_event_intel.c+20−4

@@ -101,6 +101,10 @@ static struct event_constraint intel_snb_event_constraints[] __read_mostly = · 100 unmodified lines
101	101	FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */
102	102	FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */
103	103	FIXED_EVENT_CONSTRAINT(0x0300, 2), /* CPU_CLK_UNHALTED.REF */
	104	+ INTEL_UEVENT_CONSTRAINT(0x04a3, 0xf), /* CYCLE_ACTIVITY.CYCLES_NO_DISPATCH */
	105	+ INTEL_UEVENT_CONSTRAINT(0x05a3, 0xf), /* CYCLE_ACTIVITY.STALLS_L2_PENDING */
	106	+ INTEL_UEVENT_CONSTRAINT(0x02a3, 0x4), /* CYCLE_ACTIVITY.CYCLES_L1D_PENDING */
	107	+ INTEL_UEVENT_CONSTRAINT(0x06a3, 0x4), /* CYCLE_ACTIVITY.STALLS_L1D_PENDING */
104	108	INTEL_EVENT_CONSTRAINT(0x48, 0x4), /* L1D_PEND_MISS.PENDING */
105	109	INTEL_UEVENT_CONSTRAINT(0x01c0, 0x2), /* INST_RETIRED.PREC_DIST */
106	110	INTEL_EVENT_CONSTRAINT(0xcd, 0x8), /* MEM_TRANS_RETIRED.LOAD_LATENCY */
@@ -149,8 +153,14 @@ static struct event_constraint intel_gen_event_constraints[] __read_mostly = · 42 unmodified lines
149	153	};
150	154
151	155	static struct extra_reg intel_snb_extra_regs[] __read_mostly = {
152		− INTEL_EVENT_EXTRA_REG(0xb7, MSR_OFFCORE_RSP_0, 0x3fffffffffull, RSP_0),
153		− INTEL_EVENT_EXTRA_REG(0xbb, MSR_OFFCORE_RSP_1, 0x3fffffffffull, RSP_1),
	156	+ INTEL_EVENT_EXTRA_REG(0xb7, MSR_OFFCORE_RSP_0, 0x3f807f8fffull, RSP_0),
	157	+ INTEL_EVENT_EXTRA_REG(0xbb, MSR_OFFCORE_RSP_1, 0x3f807f8fffull, RSP_1),
	158	+ EVENT_EXTRA_END
	159	+};
	160	+
	161	+static struct extra_reg intel_snbep_extra_regs[] __read_mostly = {
	162	+ INTEL_EVENT_EXTRA_REG(0xb7, MSR_OFFCORE_RSP_0, 0x3fffff8fffull, RSP_0),
	163	+ INTEL_EVENT_EXTRA_REG(0xbb, MSR_OFFCORE_RSP_1, 0x3fffff8fffull, RSP_1),
154	164	EVENT_EXTRA_END
155	165	};
156	166
@@ -2093,7 +2103,10 @@ __init int intel_pmu_init(void) · 1936 unmodified lines
2093	2103	x86_pmu.event_constraints = intel_snb_event_constraints;
2094	2104	x86_pmu.pebs_constraints = intel_snb_pebs_event_constraints;
2095	2105	x86_pmu.pebs_aliases = intel_pebs_aliases_snb;
2096		− x86_pmu.extra_regs = intel_snb_extra_regs;
	2106	+ if (boot_cpu_data.x86_model == 45)
	2107	+ x86_pmu.extra_regs = intel_snbep_extra_regs;
	2108	+ else
	2109	+ x86_pmu.extra_regs = intel_snb_extra_regs;
2097	2110	/* all extra regs are per-cpu when HT is on */
2098	2111	x86_pmu.er_flags \|= ERF_HAS_RSP_1;
2099	2112	x86_pmu.er_flags \|= ERF_NO_HT_SHARING;
@@ -2119,7 +2132,10 @@ __init int intel_pmu_init(void) · 19 unmodified lines
2119	2132	x86_pmu.event_constraints = intel_ivb_event_constraints;
2120	2133	x86_pmu.pebs_constraints = intel_ivb_pebs_event_constraints;
2121	2134	x86_pmu.pebs_aliases = intel_pebs_aliases_snb;
2122		− x86_pmu.extra_regs = intel_snb_extra_regs;
	2135	+ if (boot_cpu_data.x86_model == 62)
	2136	+ x86_pmu.extra_regs = intel_snbep_extra_regs;
	2137	+ else
	2138	+ x86_pmu.extra_regs = intel_snb_extra_regs;
2123	2139	/* all extra regs are per-cpu when HT is on */
2124	2140	x86_pmu.er_flags \|= ERF_HAS_RSP_1;
2125	2141	x86_pmu.er_flags \|= ERF_NO_HT_SHARING;

arch/x86/kernel/cpu/perf_event_intel_ds.c+12−1

@@ -314,10 +314,11 @@ int intel_pmu_drain_bts_buffer(void) · 313 unmodified lines
314	314	if (top <= at)
315	315	return 0;
316	316
	317	+ memset(&regs, 0, sizeof(regs));
	318	+
317	319	ds->bts_index = ds->bts_buffer_base;
318	320
319	321	perf_sample_data_init(&data, 0, event->hw.last_period);
320		− regs.ip = 0;
321	322
322	323	/*
323	324	* Prepare a generic sample, i.e. fill in the invariant fields.
@@ -729,3 +730,13 @@ void intel_ds_init(void) · 405 unmodified lines
729	730	}
730	731	}
731	732	}
	733	+
	734	+void perf_restore_debug_store(void)
	735	+{
	736	+ struct debug_store *ds = __this_cpu_read(cpu_hw_events.ds);
	737	+
	738	+ if (!x86_pmu.bts && !x86_pmu.pebs)
	739	+ return;
	740	+
	741	+ wrmsrl(MSR_IA32_DS_AREA, (unsigned long)ds);
	742	+}

arch/x86/kernel/kprobes/core.c+4−1

@@ -375,6 +375,9 @@ static void __kprobes arch_copy_kprobe(struct kprobe *p) · 374 unmodified lines
375	375	else
376	376	p->ainsn.boostable = -1;
377	377
	378	+ /* Check whether the instruction modifies Interrupt Flag or not */
	379	+ p->ainsn.if_modifier = is_IF_modifier(p->ainsn.insn);
	380	+
378	381	/* Also, displacement change doesn't affect the first byte */
379	382	p->opcode = p->ainsn.insn[0];
380	383	}
@@ -434,7 +437,7 @@ static void __kprobes set_current_kprobe(struct kprobe p, struct pt_regs regs, · 53 unmodified lines
434	437	__this_cpu_write(current_kprobe, p);
435	438	kcb->kprobe_saved_flags = kcb->kprobe_old_flags
436	439	= (regs->flags & (X86_EFLAGS_TF \| X86_EFLAGS_IF));
437		− if (is_IF_modifier(p->ainsn.insn))
	440	+ if (p->ainsn.if_modifier)
438	441	kcb->kprobe_saved_flags &= ~X86_EFLAGS_IF;
439	442	}
440	443

arch/x86/kernel/microcode_core_early.c+31−7

@@ -45,9 +45,6 @@ static int __cpuinit x86_vendor(void) · 44 unmodified lines
45	45	u32 eax = 0x00000000;
46	46	u32 ebx, ecx = 0, edx;
47	47
48		− if (!have_cpuid_p())
49		− return X86_VENDOR_UNKNOWN;
50		−
51	48	native_cpuid(&eax, &ebx, &ecx, &edx);
52	49
53	50	if (CPUID_IS(CPUID_INTEL1, CPUID_INTEL2, CPUID_INTEL3, ebx, ecx, edx))
@@ -59,18 +56,45 @@ static int __cpuinit x86_vendor(void) · 5 unmodified lines
59	56	return X86_VENDOR_UNKNOWN;
60	57	}
61	58
	59	+static int __cpuinit x86_family(void)
	60	+{
	61	+ u32 eax = 0x00000001;
	62	+ u32 ebx, ecx = 0, edx;
	63	+ int x86;
	64	+
	65	+ native_cpuid(&eax, &ebx, &ecx, &edx);
	66	+
	67	+ x86 = (eax >> 8) & 0xf;
	68	+ if (x86 == 15)
	69	+ x86 += (eax >> 20) & 0xff;
	70	+
	71	+ return x86;
	72	+}
	73	+
62	74	void __init load_ucode_bsp(void)
63	75	{
64		− int vendor = x86_vendor();
	76	+ int vendor, x86;
	77	+
	78	+ if (!have_cpuid_p())
	79	+ return;
65	80
66		− if (vendor == X86_VENDOR_INTEL)
	81	+ vendor = x86_vendor();
	82	+ x86 = x86_family();
	83	+
	84	+ if (vendor == X86_VENDOR_INTEL && x86 >= 6)
67	85	load_ucode_intel_bsp();
68	86	}
69	87
70	88	void __cpuinit load_ucode_ap(void)
71	89	{
72		− int vendor = x86_vendor();
	90	+ int vendor, x86;
	91	+
	92	+ if (!have_cpuid_p())
	93	+ return;
	94	+
	95	+ vendor = x86_vendor();
	96	+ x86 = x86_family();
73	97
74		− if (vendor == X86_VENDOR_INTEL)
	98	+ if (vendor == X86_VENDOR_INTEL && x86 >= 6)
75	99	load_ucode_intel_ap();
76	100	}

arch/x86/kernel/microcode_intel_early.c+15−15

@@ -90,13 +90,13 @@ microcode_phys(struct microcode_intel **mc_saved_tmp, · 89 unmodified lines
90	90	struct microcode_intel ***mc_saved;
91	91
92	92	mc_saved = (struct microcode_intel ***)
93		− __pa_symbol(&mc_saved_data->mc_saved);
	93	+ __pa_nodebug(&mc_saved_data->mc_saved);
94	94	for (i = 0; i < mc_saved_data->mc_saved_count; i++) {
95	95	struct microcode_intel *p;
96	96
97	97	p = (struct microcode_intel *)
98		− __pa(mc_saved_data->mc_saved + i);
99		− mc_saved_tmp[i] = (struct microcode_intel *)__pa(p);
	98	+ __pa_nodebug(mc_saved_data->mc_saved + i);
	99	+ mc_saved_tmp[i] = (struct microcode_intel *)__pa_nodebug(p);
100	100	}
101	101	}
102	102	#endif
@@ -562,7 +562,7 @@ scan_microcode(unsigned long start, unsigned long end, · 459 unmodified lines
562	562	struct cpio_data cd;
563	563	long offset = 0;
564	564	#ifdef CONFIG_X86_32
565		− char p = (char )__pa_symbol(ucode_name);
	565	+ char p = (char )__pa_nodebug(ucode_name);
566	566	#else
567	567	char *p = ucode_name;
568	568	#endif
@@ -630,8 +630,8 @@ static void __cpuinit print_ucode(struct ucode_cpu_info *uci) · 61 unmodified lines
630	630	if (mc_intel == NULL)
631	631	return;
632	632
633		− delay_ucode_info_p = (int *)__pa_symbol(&delay_ucode_info);
634		− current_mc_date_p = (int *)__pa_symbol(&current_mc_date);
	633	+ delay_ucode_info_p = (int *)__pa_nodebug(&delay_ucode_info);
	634	+ current_mc_date_p = (int *)__pa_nodebug(&current_mc_date);
635	635
636	636	*delay_ucode_info_p = 1;
637	637	*current_mc_date_p = mc_intel->hdr.date;
@@ -659,8 +659,8 @@ static inline void __cpuinit print_ucode(struct ucode_cpu_info *uci) · 21 unmodified lines
659	659	}
660	660	#endif
661	661
662		−static int apply_microcode_early(struct mc_saved_data *mc_saved_data,
663		− struct ucode_cpu_info *uci)
	662	+static int __cpuinit apply_microcode_early(struct mc_saved_data *mc_saved_data,
	663	+ struct ucode_cpu_info *uci)
664	664	{
665	665	struct microcode_intel *mc_intel;
666	666	unsigned int val[2];
@@ -741,15 +741,15 @@ load_ucode_intel_bsp(void) · 74 unmodified lines
741	741	#ifdef CONFIG_X86_32
742	742	struct boot_params *boot_params_p;
743	743
744		− boot_params_p = (struct boot_params *)__pa_symbol(&boot_params);
	744	+ boot_params_p = (struct boot_params *)__pa_nodebug(&boot_params);
745	745	ramdisk_image = boot_params_p->hdr.ramdisk_image;
746	746	ramdisk_size = boot_params_p->hdr.ramdisk_size;
747	747	initrd_start_early = ramdisk_image;
748	748	initrd_end_early = initrd_start_early + ramdisk_size;
749	749
750	750	_load_ucode_intel_bsp(
751		− (struct mc_saved_data *)__pa_symbol(&mc_saved_data),
752		− (unsigned long *)__pa_symbol(&mc_saved_in_initrd),
	751	+ (struct mc_saved_data *)__pa_nodebug(&mc_saved_data),
	752	+ (unsigned long *)__pa_nodebug(&mc_saved_in_initrd),
753	753	initrd_start_early, initrd_end_early, &uci);
754	754	#else
755	755	ramdisk_image = boot_params.hdr.ramdisk_image;
@@ -772,10 +772,10 @@ void __cpuinit load_ucode_intel_ap(void) · 16 unmodified lines
772	772	unsigned long *initrd_start_p;
773	773
774	774	mc_saved_in_initrd_p =
775		− (unsigned long *)__pa_symbol(mc_saved_in_initrd);
776		− mc_saved_data_p = (struct mc_saved_data *)__pa_symbol(&mc_saved_data);
777		− initrd_start_p = (unsigned long *)__pa_symbol(&initrd_start);
778		− initrd_start_addr = (unsigned long)__pa_symbol(*initrd_start_p);
	775	+ (unsigned long *)__pa_nodebug(mc_saved_in_initrd);
	776	+ mc_saved_data_p = (struct mc_saved_data *)__pa_nodebug(&mc_saved_data);
	777	+ initrd_start_p = (unsigned long *)__pa_nodebug(&initrd_start);
	778	+ initrd_start_addr = (unsigned long)__pa_nodebug(*initrd_start_p);
779	779	#else
780	780	mc_saved_data_p = &mc_saved_data;
781	781	mc_saved_in_initrd_p = mc_saved_in_initrd;

arch/x86/kernel/paravirt.c+13−12

@@ -263,6 +263,18 @@ void paravirt_leave_lazy_mmu(void) · 262 unmodified lines
263	263	leave_lazy(PARAVIRT_LAZY_MMU);
264	264	}
265	265
	266	+void paravirt_flush_lazy_mmu(void)
	267	+{
	268	+ preempt_disable();
	269	+
	270	+ if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) {
	271	+ arch_leave_lazy_mmu_mode();
	272	+ arch_enter_lazy_mmu_mode();
	273	+ }
	274	+
	275	+ preempt_enable();
	276	+}
	277	+
266	278	void paravirt_start_context_switch(struct task_struct *prev)
267	279	{
268	280	BUG_ON(preemptible());
@@ -292,18 +304,6 @@ enum paravirt_lazy_mode paravirt_get_lazy_mode(void) · 23 unmodified lines
292	304	return this_cpu_read(paravirt_lazy_mode);
293	305	}
294	306
295		−void arch_flush_lazy_mmu_mode(void)
296		−{
297		− preempt_disable();
298		−
299		− if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) {
300		− arch_leave_lazy_mmu_mode();
301		− arch_enter_lazy_mmu_mode();
302		− }
303		−
304		− preempt_enable();
305		−}
306		−
307	307	struct pv_info pv_info = {
308	308	.name = "bare hardware",
309	309	.paravirt_enabled = 0,
@@ -475,6 +475,7 @@ struct pv_mmu_ops pv_mmu_ops = { · 165 unmodified lines
475	475	.lazy_mode = {
476	476	.enter = paravirt_nop,
477	477	.leave = paravirt_nop,
	478	+ .flush = paravirt_nop,
478	479	},
479	480
480	481	.set_fixmap = native_set_fixmap,

arch/x86/kernel/setup.c+37−8

@@ -507,11 +507,14 @@ static void __init memblock_x86_reserve_range_setup_data(void) · 506 unmodified lines
507	507	/*
508	508	* Keep the crash kernel below this limit. On 32 bits earlier kernels
509	509	* would limit the kernel to the low 512 MiB due to mapping restrictions.
	510	+ * On 64bit, old kexec-tools need to under 896MiB.
510	511	*/
511	512	#ifdef CONFIG_X86_32
512		−# define CRASH_KERNEL_ADDR_MAX (512 << 20)
	513	+# define CRASH_KERNEL_ADDR_LOW_MAX (512 << 20)
	514	+# define CRASH_KERNEL_ADDR_HIGH_MAX (512 << 20)
513	515	#else
514		−# define CRASH_KERNEL_ADDR_MAX MAXMEM
	516	+# define CRASH_KERNEL_ADDR_LOW_MAX (896UL<<20)
	517	+# define CRASH_KERNEL_ADDR_HIGH_MAX MAXMEM
515	518	#endif
516	519
517	520	static void __init reserve_crashkernel_low(void)
@@ -521,19 +524,35 @@ static void __init reserve_crashkernel_low(void) · 3 unmodified lines
521	524	unsigned long long low_base = 0, low_size = 0;
522	525	unsigned long total_low_mem;
523	526	unsigned long long base;
	527	+ bool auto_set = false;
524	528	int ret;
525	529
526	530	total_low_mem = memblock_mem_size(1UL<<(32-PAGE_SHIFT));
	531	+ /* crashkernel=Y,low */
527	532	ret = parse_crashkernel_low(boot_command_line, total_low_mem,
528	533	&low_size, &base);
529		− if (ret != 0 \|\| low_size <= 0)
530		− return;
	534	+ if (ret != 0) {
	535	+ /*
	536	+ * two parts from lib/swiotlb.c:
	537	+ * swiotlb size: user specified with swiotlb= or default.
	538	+ * swiotlb overflow buffer: now is hardcoded to 32k.
	539	+ * We round it to 8M for other buffers that
	540	+ * may need to stay low too.
	541	+ */
	542	+ low_size = swiotlb_size_or_default() + (8UL<<20);
	543	+ auto_set = true;
	544	+ } else {
	545	+ /* passed with crashkernel=0,low ? */
	546	+ if (!low_size)
	547	+ return;
	548	+ }
531	549
532	550	low_base = memblock_find_in_range(low_size, (1ULL<<32),
533	551	low_size, alignment);
534	552
535	553	if (!low_base) {
536		− pr_info("crashkernel low reservation failed - No suitable area found.\n");
	554	+ if (!auto_set)
	555	+ pr_info("crashkernel low reservation failed - No suitable area found.\n");
537	556
538	557	return;
539	558	}
@@ -554,14 +573,22 @@ static void __init reserve_crashkernel(void) · 14 unmodified lines
554	573	const unsigned long long alignment = 16<<20; /* 16M */
555	574	unsigned long long total_mem;
556	575	unsigned long long crash_size, crash_base;
	576	+ bool high = false;
557	577	int ret;
558	578
559	579	total_mem = memblock_phys_mem_size();
560	580
	581	+ /* crashkernel=XM */
561	582	ret = parse_crashkernel(boot_command_line, total_mem,
562	583	&crash_size, &crash_base);
563		− if (ret != 0 \|\| crash_size <= 0)
564		− return;
	584	+ if (ret != 0 \|\| crash_size <= 0) {
	585	+ /* crashkernel=X,high */
	586	+ ret = parse_crashkernel_high(boot_command_line, total_mem,
	587	+ &crash_size, &crash_base);
	588	+ if (ret != 0 \|\| crash_size <= 0)
	589	+ return;
	590	+ high = true;
	591	+ }
565	592
566	593	/* 0 means: find the address automatically */
567	594	if (crash_base <= 0) {
@@ -569,7 +596,9 @@ static void __init reserve_crashkernel(void) · 1 unmodified line
569	596	* kexec want bzImage is below CRASH_KERNEL_ADDR_MAX
570	597	*/
571	598	crash_base = memblock_find_in_range(alignment,
572		− CRASH_KERNEL_ADDR_MAX, crash_size, alignment);
	599	+ high ? CRASH_KERNEL_ADDR_HIGH_MAX :
	600	+ CRASH_KERNEL_ADDR_LOW_MAX,
	601	+ crash_size, alignment);
573	602
574	603	if (!crash_base) {
575	604	pr_info("crashkernel reservation failed - No suitable area found.\n");

arch/x86/kvm/lapic.c+1−1

@@ -1857,7 +1857,7 @@ int kvm_lapic_enable_pv_eoi(struct kvm_vcpu *vcpu, u64 data) · 1856 unmodified lines
1857	1857	if (!pv_eoi_enabled(vcpu))
1858	1858	return 0;
1859	1859	return kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.pv_eoi.data,
1860		− addr);
	1860	+ addr, sizeof(u8));
1861	1861	}
1862	1862
1863	1863	void kvm_lapic_init(void)

arch/x86/kvm/x86.c+33−36

@@ -1406,25 +1406,15 @@ static int kvm_guest_time_update(struct kvm_vcpu *v) · 1405 unmodified lines
1406	1406	unsigned long flags, this_tsc_khz;
1407	1407	struct kvm_vcpu_arch *vcpu = &v->arch;
1408	1408	struct kvm_arch *ka = &v->kvm->arch;
1409		− void *shared_kaddr;
1410	1409	s64 kernel_ns, max_kernel_ns;
1411	1410	u64 tsc_timestamp, host_tsc;
1412		− struct pvclock_vcpu_time_info *guest_hv_clock;
	1411	+ struct pvclock_vcpu_time_info guest_hv_clock;
1413	1412	u8 pvclock_flags;
1414	1413	bool use_master_clock;
1415	1414
1416	1415	kernel_ns = 0;
1417	1416	host_tsc = 0;
1418	1417
1419		− /* Keep irq disabled to prevent changes to the clock */
1420		− local_irq_save(flags);
1421		− this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1422		− if (unlikely(this_tsc_khz == 0)) {
1423		− local_irq_restore(flags);
1424		− kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1425		− return 1;
1426		− }
1427		−
1428	1418	/*
1429	1419	* If the host uses TSC clock, then passthrough TSC as stable
1430	1420	* to the guest.
@@ -1436,6 +1426,15 @@ static int kvm_guest_time_update(struct kvm_vcpu *v) · 5 unmodified lines
1436	1426	kernel_ns = ka->master_kernel_ns;
1437	1427	}
1438	1428	spin_unlock(&ka->pvclock_gtod_sync_lock);
	1429	+
	1430	+ /* Keep irq disabled to prevent changes to the clock */
	1431	+ local_irq_save(flags);
	1432	+ this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
	1433	+ if (unlikely(this_tsc_khz == 0)) {
	1434	+ local_irq_restore(flags);
	1435	+ kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
	1436	+ return 1;
	1437	+ }
1439	1438	if (!use_master_clock) {
1440	1439	host_tsc = native_read_tsc();
1441	1440	kernel_ns = get_kernel_ns();
@@ -1463,7 +1462,7 @@ static int kvm_guest_time_update(struct kvm_vcpu *v) · 21 unmodified lines
1463	1462
1464	1463	local_irq_restore(flags);
1465	1464
1466		− if (!vcpu->time_page)
	1465	+ if (!vcpu->pv_time_enabled)
1467	1466	return 0;
1468	1467
1469	1468	/*
@@ -1525,12 +1524,12 @@ static int kvm_guest_time_update(struct kvm_vcpu *v) · 55 unmodified lines
1525	1524	*/
1526	1525	vcpu->hv_clock.version += 2;
1527	1526
1528		− shared_kaddr = kmap_atomic(vcpu->time_page);
1529		−
1530		− guest_hv_clock = shared_kaddr + vcpu->time_offset;
	1527	+ if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
	1528	+ &guest_hv_clock, sizeof(guest_hv_clock))))
	1529	+ return 0;
1531	1530
1532	1531	/* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1533		− pvclock_flags = (guest_hv_clock->flags & PVCLOCK_GUEST_STOPPED);
	1532	+ pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1534	1533
1535	1534	if (vcpu->pvclock_set_guest_stopped_request) {
1536	1535	pvclock_flags \|= PVCLOCK_GUEST_STOPPED;
@@ -1543,12 +1542,9 @@ static int kvm_guest_time_update(struct kvm_vcpu *v) · 6 unmodified lines
1543	1542
1544	1543	vcpu->hv_clock.flags = pvclock_flags;
1545	1544
1546		− memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1547		− sizeof(vcpu->hv_clock));
1548		−
1549		− kunmap_atomic(shared_kaddr);
1550		−
1551		− mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
	1545	+ kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
	1546	+ &vcpu->hv_clock,
	1547	+ sizeof(vcpu->hv_clock));
1552	1548	return 0;
1553	1549	}
1554	1550
@@ -1827,7 +1823,8 @@ static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data) · 272 unmodified lines
1827	1823	return 0;
1828	1824	}
1829	1825
1830		− if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
	1826	+ if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
	1827	+ sizeof(u32)))
1831	1828	return 1;
1832	1829
1833	1830	vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
@@ -1837,10 +1834,7 @@ static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data) · 3 unmodified lines
1837	1834
1838	1835	static void kvmclock_reset(struct kvm_vcpu *vcpu)
1839	1836	{
1840		− if (vcpu->arch.time_page) {
1841		− kvm_release_page_dirty(vcpu->arch.time_page);
1842		− vcpu->arch.time_page = NULL;
1843		− }
	1837	+ vcpu->arch.pv_time_enabled = false;
1844	1838	}
1845	1839
1846	1840	static void accumulate_steal_time(struct kvm_vcpu *vcpu)
@@ -1947,6 +1941,7 @@ int kvm_set_msr_common(struct kvm_vcpu vcpu, struct msr_data msr_info) · 100 unmodified lines
1947	1941	break;
1948	1942	case MSR_KVM_SYSTEM_TIME_NEW:
1949	1943	case MSR_KVM_SYSTEM_TIME: {
	1944	+ u64 gpa_offset;
1950	1945	kvmclock_reset(vcpu);
1951	1946
1952	1947	vcpu->arch.time = data;
@@ -1956,14 +1951,14 @@ int kvm_set_msr_common(struct kvm_vcpu vcpu, struct msr_data msr_info) · 3 unmodified lines
1956	1951	if (!(data & 1))
1957	1952	break;
1958	1953
1959		− /* ...but clean it before doing the actual write */
1960		− vcpu->arch.time_offset = data & ~(PAGE_MASK \| 1);
1961		−
1962		− vcpu->arch.time_page =
1963		− gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
	1954	+ gpa_offset = data & ~(PAGE_MASK \| 1);
1964	1955
1965		− if (is_error_page(vcpu->arch.time_page))
1966		− vcpu->arch.time_page = NULL;
	1956	+ if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
	1957	+ &vcpu->arch.pv_time, data & ~1ULL,
	1958	+ sizeof(struct pvclock_vcpu_time_info)))
	1959	+ vcpu->arch.pv_time_enabled = false;
	1960	+ else
	1961	+ vcpu->arch.pv_time_enabled = true;
1967	1962
1968	1963	break;
1969	1964	}
@@ -1980,7 +1975,8 @@ int kvm_set_msr_common(struct kvm_vcpu vcpu, struct msr_data msr_info) · 10 unmodified lines
1980	1975	return 1;
1981	1976
1982	1977	if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1983		− data & KVM_STEAL_VALID_BITS))
	1978	+ data & KVM_STEAL_VALID_BITS,
	1979	+ sizeof(struct kvm_steal_time)))
1984	1980	return 1;
1985	1981
1986	1982	vcpu->arch.st.msr_val = data;
@@ -2967,7 +2963,7 @@ static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu, · 980 unmodified lines
2967	2963	*/
2968	2964	static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
2969	2965	{
2970		− if (!vcpu->arch.time_page)
	2966	+ if (!vcpu->arch.pv_time_enabled)
2971	2967	return -EINVAL;
2972	2968	vcpu->arch.pvclock_set_guest_stopped_request = true;
2973	2969	kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
@@ -6718,6 +6714,7 @@ int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu) · 3744 unmodified lines
6718	6714	goto fail_free_wbinvd_dirty_mask;
6719	6715
6720	6716	vcpu->arch.ia32_tsc_adjust_msr = 0x0;
	6717	+ vcpu->arch.pv_time_enabled = false;
6721	6718	kvm_async_pf_hash_reset(vcpu);
6722	6719	kvm_pmu_init(vcpu);
6723	6720

arch/x86/lguest/boot.c+1−0

@@ -1334,6 +1334,7 @@ __init void lguest_init(void) · 1333 unmodified lines
1334	1334	pv_mmu_ops.read_cr3 = lguest_read_cr3;
1335	1335	pv_mmu_ops.lazy_mode.enter = paravirt_enter_lazy_mmu;
1336	1336	pv_mmu_ops.lazy_mode.leave = lguest_leave_lazy_mmu_mode;
	1337	+ pv_mmu_ops.lazy_mode.flush = paravirt_flush_lazy_mmu;
1337	1338	pv_mmu_ops.pte_update = lguest_pte_update;
1338	1339	pv_mmu_ops.pte_update_defer = lguest_pte_update;
1339	1340

arch/x86/lib/usercopy_64.c+2−2

@@ -74,10 +74,10 @@ copy_user_handle_tail(char to, char from, unsigned len, unsigned zerorest) · 73 unmodified lines
74	74	char c;
75	75	unsigned zero_len;
76	76
77		− for (; len; --len) {
	77	+ for (; len; --len, to++) {
78	78	if (__get_user_nocheck(c, from++, sizeof(char)))
79	79	break;
80		− if (__put_user_nocheck(c, to++, sizeof(char)))
	80	+ if (__put_user_nocheck(c, to, sizeof(char)))
81	81	break;
82	82	}
83	83

arch/x86/mm/fault.c+4−2

@@ -378,10 +378,12 @@ static noinline __kprobes int vmalloc_fault(unsigned long address) · 377 unmodified lines
378	378	if (pgd_none(*pgd_ref))
379	379	return -1;
380	380
381		− if (pgd_none(*pgd))
	381	+ if (pgd_none(*pgd)) {
382	382	set_pgd(pgd, *pgd_ref);
383		− else
	383	+ arch_flush_lazy_mmu_mode();
	384	+ } else {
384	385	BUG_ON(pgd_page_vaddr(pgd) != pgd_page_vaddr(pgd_ref));
	386	+ }
385	387
386	388	/*
387	389	* Below here mismatches are bugs because these lower tables

arch/x86/mm/pageattr-test.c+1−1

@@ -68,7 +68,7 @@ static int print_split(struct split_state *s) · 67 unmodified lines
68	68	s->gpg++;
69	69	i += GPS/PAGE_SIZE;
70	70	} else if (level == PG_LEVEL_2M) {
71		− if (!(pte_val(*pte) & _PAGE_PSE)) {
	71	+ if ((pte_val(pte) & _PAGE_PRESENT) && !(pte_val(pte) & _PAGE_PSE)) {
72	72	printk(KERN_ERR
73	73	"%lx level %d but not PSE %Lx\n",
74	74	addr, level, (u64)pte_val(*pte));

arch/x86/mm/pageattr.c+7−5

@@ -467,7 +467,7 @@ try_preserve_large_page(pte_t *kpte, unsigned long address, · 466 unmodified lines
467	467	* We are safe now. Check whether the new pgprot is the same:
468	468	*/
469	469	old_pte = *kpte;
470		− old_prot = new_prot = req_prot = pte_pgprot(old_pte);
	470	+ old_prot = req_prot = pte_pgprot(old_pte);
471	471
472	472	pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
473	473	pgprot_val(req_prot) \|= pgprot_val(cpa->mask_set);
@@ -478,12 +478,12 @@ try_preserve_large_page(pte_t *kpte, unsigned long address, · 4 unmodified lines
478	478	* a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL
479	479	* for the ancient hardware that doesn't support it.
480	480	*/
481		− if (pgprot_val(new_prot) & _PAGE_PRESENT)
482		− pgprot_val(new_prot) \|= _PAGE_PSE \| _PAGE_GLOBAL;
	481	+ if (pgprot_val(req_prot) & _PAGE_PRESENT)
	482	+ pgprot_val(req_prot) \|= _PAGE_PSE \| _PAGE_GLOBAL;
483	483	else
484		− pgprot_val(new_prot) &= ~(_PAGE_PSE \| _PAGE_GLOBAL);
	484	+ pgprot_val(req_prot) &= ~(_PAGE_PSE \| _PAGE_GLOBAL);
485	485
486		− new_prot = canon_pgprot(new_prot);
	486	+ req_prot = canon_pgprot(req_prot);
487	487
488	488	/*
489	489	* old_pte points to the large page base address. So we need
@@ -1413,6 +1413,8 @@ void kernel_map_pages(struct page *page, int numpages, int enable) · 923 unmodified lines
1413	1413	* but that can deadlock->flush only current cpu:
1414	1414	*/
1415	1415	__flush_tlb_all();
	1416	+
	1417	+ arch_flush_lazy_mmu_mode();
1416	1418	}
1417	1419
1418	1420	#ifdef CONFIG_HIBERNATION

arch/x86/mm/pgtable.c+7−0

@@ -58,6 +58,13 @@ void ___pte_free_tlb(struct mmu_gather tlb, struct page pte) · 57 unmodified lines
58	58	void ___pmd_free_tlb(struct mmu_gather tlb, pmd_t pmd)
59	59	{
60	60	paravirt_release_pmd(__pa(pmd) >> PAGE_SHIFT);
	61	+ /*
	62	+ * NOTE! For PAE, any changes to the top page-directory-pointer-table
	63	+ * entries need a full cr3 reload to flush.
	64	+ */
	65	+#ifdef CONFIG_X86_PAE
	66	+ tlb->need_flush_all = 1;
	67	+#endif
61	68	tlb_remove_page(tlb, virt_to_page(pmd));
62	69	}
63	70

arch/x86/platform/efi/efi.c+163−5

@@ -41,6 +41,7 @@ · 40 unmodified lines
41	41	#include <linux/io.h>
42	42	#include <linux/reboot.h>
43	43	#include <linux/bcd.h>
	44	+#include <linux/ucs2_string.h>
44	45
45	46	#include <asm/setup.h>
46	47	#include <asm/efi.h>
@@ -52,6 +53,13 @@ · 5 unmodified lines
52	53
53	54	#define EFI_DEBUG 1
54	55
	56	+/*
	57	+ * There's some additional metadata associated with each
	58	+ * variable. Intel's reference implementation is 60 bytes - bump that
	59	+ * to account for potential alignment constraints
	60	+ */
	61	+#define VAR_METADATA_SIZE 64
	62	+
55	63	struct efi __read_mostly efi = {
56	64	.mps = EFI_INVALID_TABLE_ADDR,
57	65	.acpi = EFI_INVALID_TABLE_ADDR,
@@ -70,6 +78,13 @@ struct efi_memory_map memmap; · 12 unmodified lines
70	78	static struct efi efi_phys __initdata;
71	79	static efi_system_table_t efi_systab __initdata;
72	80
	81	+static u64 efi_var_store_size;
	82	+static u64 efi_var_remaining_size;
	83	+static u64 efi_var_max_var_size;
	84	+static u64 boot_used_size;
	85	+static u64 boot_var_size;
	86	+static u64 active_size;
	87	+
73	88	unsigned long x86_efi_facility;
74	89
75	90	/*
@@ -99,6 +114,15 @@ static int __init setup_add_efi_memmap(char *arg) · 23 unmodified lines
99	114	}
100	115	early_param("add_efi_memmap", setup_add_efi_memmap);
101	116
	117	+static bool efi_no_storage_paranoia;
	118	+
	119	+static int __init setup_storage_paranoia(char *arg)
	120	+{
	121	+ efi_no_storage_paranoia = true;
	122	+ return 0;
	123	+}
	124	+early_param("efi_no_storage_paranoia", setup_storage_paranoia);
	125	+
102	126
103	127	static efi_status_t virt_efi_get_time(efi_time_t tm, efi_time_cap_t tc)
104	128	{
@@ -163,8 +187,53 @@ static efi_status_t virt_efi_get_next_variable(unsigned long *name_size, · 58 unmodified lines
163	187	efi_char16_t *name,
164	188	efi_guid_t *vendor)
165	189	{
166		− return efi_call_virt3(get_next_variable,
167		− name_size, name, vendor);
	190	+ efi_status_t status;
	191	+ static bool finished = false;
	192	+ static u64 var_size;
	193	+
	194	+ status = efi_call_virt3(get_next_variable,
	195	+ name_size, name, vendor);
	196	+
	197	+ if (status == EFI_NOT_FOUND) {
	198	+ finished = true;
	199	+ if (var_size < boot_used_size) {
	200	+ boot_var_size = boot_used_size - var_size;
	201	+ active_size += boot_var_size;
	202	+ } else {
	203	+ printk(KERN_WARNING FW_BUG "efi: Inconsistent initial sizes\n");
	204	+ }
	205	+ }
	206	+
	207	+ if (boot_used_size && !finished) {
	208	+ unsigned long size;
	209	+ u32 attr;
	210	+ efi_status_t s;
	211	+ void *tmp;
	212	+
	213	+ s = virt_efi_get_variable(name, vendor, &attr, &size, NULL);
	214	+
	215	+ if (s != EFI_BUFFER_TOO_SMALL \|\| !size)
	216	+ return status;
	217	+
	218	+ tmp = kmalloc(size, GFP_ATOMIC);
	219	+
	220	+ if (!tmp)
	221	+ return status;
	222	+
	223	+ s = virt_efi_get_variable(name, vendor, &attr, &size, tmp);
	224	+
	225	+ if (s == EFI_SUCCESS && (attr & EFI_VARIABLE_NON_VOLATILE)) {
	226	+ var_size += size;
	227	+ var_size += ucs2_strsize(name, 1024);
	228	+ active_size += size;
	229	+ active_size += VAR_METADATA_SIZE;
	230	+ active_size += ucs2_strsize(name, 1024);
	231	+ }
	232	+
	233	+ kfree(tmp);
	234	+ }
	235	+
	236	+ return status;
168	237	}
169	238
170	239	static efi_status_t virt_efi_set_variable(efi_char16_t *name,
@@ -173,9 +242,34 @@ static efi_status_t virt_efi_set_variable(efi_char16_t *name, · 2 unmodified lines
173	242	unsigned long data_size,
174	243	void *data)
175	244	{
176		− return efi_call_virt5(set_variable,
177		− name, vendor, attr,
178		− data_size, data);
	245	+ efi_status_t status;
	246	+ u32 orig_attr = 0;
	247	+ unsigned long orig_size = 0;
	248	+
	249	+ status = virt_efi_get_variable(name, vendor, &orig_attr, &orig_size,
	250	+ NULL);
	251	+
	252	+ if (status != EFI_BUFFER_TOO_SMALL)
	253	+ orig_size = 0;
	254	+
	255	+ status = efi_call_virt5(set_variable,
	256	+ name, vendor, attr,
	257	+ data_size, data);
	258	+
	259	+ if (status == EFI_SUCCESS) {
	260	+ if (orig_size) {
	261	+ active_size -= orig_size;
	262	+ active_size -= ucs2_strsize(name, 1024);
	263	+ active_size -= VAR_METADATA_SIZE;
	264	+ }
	265	+ if (data_size) {
	266	+ active_size += data_size;
	267	+ active_size += ucs2_strsize(name, 1024);
	268	+ active_size += VAR_METADATA_SIZE;
	269	+ }
	270	+ }
	271	+
	272	+ return status;
179	273	}
180	274
181	275	static efi_status_t virt_efi_query_variable_info(u32 attr,
@@ -690,6 +784,9 @@ void __init efi_init(void) · 508 unmodified lines
690	784	char vendor[100] = "unknown";
691	785	int i = 0;
692	786	void *tmp;
	787	+ struct setup_data *data;
	788	+ struct efi_var_bootdata *efi_var_data;
	789	+ u64 pa_data;
693	790
694	791	#ifdef CONFIG_X86_32
695	792	if (boot_params.efi_info.efi_systab_hi \|\|
@@ -707,6 +804,22 @@ void __init efi_init(void) · 11 unmodified lines
707	804	if (efi_systab_init(efi_phys.systab))
708	805	return;
709	806
	807	+ pa_data = boot_params.hdr.setup_data;
	808	+ while (pa_data) {
	809	+ data = early_ioremap(pa_data, sizeof(*efi_var_data));
	810	+ if (data->type == SETUP_EFI_VARS) {
	811	+ efi_var_data = (struct efi_var_bootdata *)data;
	812	+
	813	+ efi_var_store_size = efi_var_data->store_size;
	814	+ efi_var_remaining_size = efi_var_data->remaining_size;
	815	+ efi_var_max_var_size = efi_var_data->max_var_size;
	816	+ }
	817	+ pa_data = data->next;
	818	+ early_iounmap(data, sizeof(*efi_var_data));
	819	+ }
	820	+
	821	+ boot_used_size = efi_var_store_size - efi_var_remaining_size;
	822	+
710	823	set_bit(EFI_SYSTEM_TABLES, &x86_efi_facility);
711	824
712	825	/*
@@ -1007,3 +1120,48 @@ u64 efi_mem_attributes(unsigned long phys_addr) · 294 unmodified lines
1007	1120	}
1008	1121	return 0;
1009	1122	}
	1123	+
	1124	+/*
	1125	+ * Some firmware has serious problems when using more than 50% of the EFI
	1126	+ * variable store, i.e. it triggers bugs that can brick machines. Ensure that
	1127	+ * we never use more than this safe limit.
	1128	+ *
	1129	+ * Return EFI_SUCCESS if it is safe to write 'size' bytes to the variable
	1130	+ * store.
	1131	+ */
	1132	+efi_status_t efi_query_variable_store(u32 attributes, unsigned long size)
	1133	+{
	1134	+ efi_status_t status;
	1135	+ u64 storage_size, remaining_size, max_size;
	1136	+
	1137	+ status = efi.query_variable_info(attributes, &storage_size,
	1138	+ &remaining_size, &max_size);
	1139	+ if (status != EFI_SUCCESS)
	1140	+ return status;
	1141	+
	1142	+ if (!max_size && remaining_size > size)
	1143	+ printk_once(KERN_ERR FW_BUG "Broken EFI implementation"
	1144	+ " is returning MaxVariableSize=0\n");
	1145	+ /*
	1146	+ * Some firmware implementations refuse to boot if there's insufficient
	1147	+ * space in the variable store. We account for that by refusing the
	1148	+ * write if permitting it would reduce the available space to under
	1149	+ * 50%. However, some firmware won't reclaim variable space until
	1150	+ * after the used (not merely the actively used) space drops below
	1151	+ * a threshold. We can approximate that case with the value calculated
	1152	+ * above. If both the firmware and our calculations indicate that the
	1153	+ * available space would drop below 50%, refuse the write.
	1154	+ */
	1155	+
	1156	+ if (!storage_size \|\| size > remaining_size \|\|
	1157	+ (max_size && size > max_size))
	1158	+ return EFI_OUT_OF_RESOURCES;
	1159	+
	1160	+ if (!efi_no_storage_paranoia &&
	1161	+ ((active_size + size + VAR_METADATA_SIZE > storage_size / 2) &&
	1162	+ (remaining_size - size < storage_size / 2)))
	1163	+ return EFI_OUT_OF_RESOURCES;
	1164	+
	1165	+ return EFI_SUCCESS;
	1166	+}
	1167	+EXPORT_SYMBOL_GPL(efi_query_variable_store);

arch/x86/power/cpu.c+2−0

@@ -11,6 +11,7 @@ · 10 unmodified lines
11	11	#include <linux/suspend.h>
12	12	#include <linux/export.h>
13	13	#include <linux/smp.h>
	14	+#include <linux/perf_event.h>
14	15
15	16	#include <asm/pgtable.h>
16	17	#include <asm/proto.h>
@@ -228,6 +229,7 @@ static void __restore_processor_state(struct saved_context *ctxt) · 211 unmodified lines
228	229	do_fpu_end();
229	230	x86_platform.restore_sched_clock_state();
230	231	mtrr_bp_restore();
	232	+ perf_restore_debug_store();
231	233	}
232	234
233	235	/* Needed by apm.c */

arch/x86/xen/mmu.c+10−6

@@ -1467,8 +1467,6 @@ static void __init xen_write_cr3_init(unsigned long cr3) · 1466 unmodified lines
1467	1467	__xen_write_cr3(true, cr3);
1468	1468
1469	1469	xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
1470		−
1471		− pv_mmu_ops.write_cr3 = &xen_write_cr3;
1472	1470	}
1473	1471	#endif
1474	1472
@@ -1750,14 +1748,18 @@ static void *m2v(phys_addr_t maddr) · 275 unmodified lines
1750	1748	}
1751	1749
1752	1750	/* Set the page permissions on an identity-mapped pages */
1753		−static void set_page_prot(void *addr, pgprot_t prot)
	1751	+static void set_page_prot_flags(void *addr, pgprot_t prot, unsigned long flags)
1754	1752	{
1755	1753	unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1756	1754	pte_t pte = pfn_pte(pfn, prot);
1757	1755
1758		− if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0))
	1756	+ if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, flags))
1759	1757	BUG();
1760	1758	}
	1759	+static void set_page_prot(void *addr, pgprot_t prot)
	1760	+{
	1761	+ return set_page_prot_flags(addr, prot, UVMF_NONE);
	1762	+}
1761	1763	#ifdef CONFIG_X86_32
1762	1764	static void __init xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
1763	1765	{
@@ -1841,12 +1843,12 @@ static void __init check_pt_base(unsigned long pt_base, unsigned long pt_end, · 77 unmodified lines
1841	1843	unsigned long addr)
1842	1844	{
1843	1845	if (*pt_base == PFN_DOWN(__pa(addr))) {
1844		− set_page_prot((void *)addr, PAGE_KERNEL);
	1846	+ set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
1845	1847	clear_page((void *)addr);
1846	1848	(*pt_base)++;
1847	1849	}
1848	1850	if (*pt_end == PFN_DOWN(__pa(addr))) {
1849		− set_page_prot((void *)addr, PAGE_KERNEL);
	1851	+ set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
1850	1852	clear_page((void *)addr);
1851	1853	(*pt_end)--;
1852	1854	}
@@ -2122,6 +2124,7 @@ static void __init xen_post_allocator_init(void) · 269 unmodified lines
2122	2124	#endif
2123	2125
2124	2126	#ifdef CONFIG_X86_64
	2127	+ pv_mmu_ops.write_cr3 = &xen_write_cr3;
2125	2128	SetPagePinned(virt_to_page(level3_user_vsyscall));
2126	2129	#endif
2127	2130	xen_mark_init_mm_pinned();
@@ -2197,6 +2200,7 @@ static const struct pv_mmu_ops xen_mmu_ops __initconst = { · 69 unmodified lines
2197	2200	.lazy_mode = {
2198	2201	.enter = paravirt_enter_lazy_mmu,
2199	2202	.leave = xen_leave_lazy_mmu,
	2203	+ .flush = paravirt_flush_lazy_mmu,
2200	2204	},
2201	2205
2202	2206	.set_fixmap = xen_set_fixmap,

arch/xtensa/Kconfig+1−1

@@ -9,7 +9,7 @@ config XTENSA · 8 unmodified lines
9	9	select HAVE_IDE
10	10	select GENERIC_ATOMIC64
11	11	select HAVE_GENERIC_HARDIRQS
12		− select HAVE_VIRT_TO_BUS
	12	+ select VIRT_TO_BUS
13	13	select GENERIC_IRQ_SHOW
14	14	select GENERIC_CPU_DEVICES
15	15	select MODULES_USE_ELF_RELA

block/blk-core.c+1−0

@@ -39,6 +39,7 @@ · 38 unmodified lines
39	39
40	40	EXPORT_TRACEPOINT_SYMBOL_GPL(block_bio_remap);
41	41	EXPORT_TRACEPOINT_SYMBOL_GPL(block_rq_remap);
	42	+EXPORT_TRACEPOINT_SYMBOL_GPL(block_bio_complete);
42	43	EXPORT_TRACEPOINT_SYMBOL_GPL(block_unplug);
43	44
44	45	DEFINE_IDA(blk_queue_ida);

block/blk-flush.c+1−1

@@ -444,7 +444,7 @@ int blkdev_issue_flush(struct block_device *bdev, gfp_t gfp_mask, · 443 unmodified lines
444	444	* copied from blk_rq_pos(rq).
445	445	*/
446	446	if (error_sector)
447		− *error_sector = bio->bi_sector;
	447	+ *error_sector = bio->bi_sector;
448	448
449	449	if (!bio_flagged(bio, BIO_UPTODATE))
450	450	ret = -EIO;

block/blk-sysfs.c+2−0

@@ -229,6 +229,8 @@ queue_store_##name(struct request_queue q, const char page, size_t count) \ · 228 unmodified lines
229	229	unsigned long val; \
230	230	ssize_t ret; \
231	231	ret = queue_var_store(&val, page, count); \
	232	+ if (ret < 0) \
	233	+ return ret; \
232	234	if (neg) \
233	235	val = !val; \
234	236	\

crypto/gcm.c+14−3

@@ -44,6 +44,7 @@ struct crypto_rfc4543_ctx { · 43 unmodified lines
44	44
45	45	struct crypto_rfc4543_req_ctx {
46	46	u8 auth_tag[16];
	47	+ u8 assocbuf[32];
47	48	struct scatterlist cipher[1];
48	49	struct scatterlist payload[2];
49	50	struct scatterlist assoc[2];
@@ -1133,9 +1134,19 @@ static struct aead_request crypto_rfc4543_crypt(struct aead_request req, · 1083 unmodified lines
1133	1134	scatterwalk_crypto_chain(payload, dst, vdst == req->iv + 8, 2);
1134	1135	assoclen += 8 + req->cryptlen - (enc ? 0 : authsize);
1135	1136
1136		− sg_init_table(assoc, 2);
1137		− sg_set_page(assoc, sg_page(req->assoc), req->assoc->length,
1138		− req->assoc->offset);
	1137	+ if (req->assoc->length == req->assoclen) {
	1138	+ sg_init_table(assoc, 2);
	1139	+ sg_set_page(assoc, sg_page(req->assoc), req->assoc->length,
	1140	+ req->assoc->offset);
	1141	+ } else {
	1142	+ BUG_ON(req->assoclen > sizeof(rctx->assocbuf));
	1143	+
	1144	+ scatterwalk_map_and_copy(rctx->assocbuf, req->assoc, 0,
	1145	+ req->assoclen, 0);
	1146	+
	1147	+ sg_init_table(assoc, 2);
	1148	+ sg_set_buf(assoc, rctx->assocbuf, req->assoclen);
	1149	+ }
1139	1150	scatterwalk_crypto_chain(assoc, payload, 0, 2);
1140	1151
1141	1152	aead_request_set_tfm(subreq, ctx->child);

drivers/acpi/Kconfig+1−1

@@ -396,7 +396,7 @@ config ACPI_CUSTOM_METHOD · 395 unmodified lines
396	396
397	397	config ACPI_BGRT
398	398	bool "Boottime Graphics Resource Table support"
399		− depends on EFI
	399	+ depends on EFI && X86
400	400	help
401	401	This driver adds support for exposing the ACPI Boottime Graphics
402	402	Resource Table, which allows the operating system to obtain

drivers/acpi/acpi_i2c.c+1−1

@@ -90,7 +90,7 @@ void acpi_i2c_register_devices(struct i2c_adapter *adapter) · 89 unmodified lines
90	90	acpi_handle handle;
91	91	acpi_status status;
92	92
93		− handle = ACPI_HANDLE(&adapter->dev);
	93	+ handle = ACPI_HANDLE(adapter->dev.parent);
94	94	if (!handle)
95	95	return;
96	96

drivers/acpi/apei/cper.c+1−1

@@ -405,7 +405,7 @@ int apei_estatus_check(const struct acpi_hest_generic_status *estatus) · 404 unmodified lines
405	405	return rc;
406	406	data_len = estatus->data_length;
407	407	gdata = (struct acpi_hest_generic_data *)(estatus + 1);
408		− while (data_len > sizeof(*gdata)) {
	408	+ while (data_len >= sizeof(*gdata)) {
409	409	gedata_len = gdata->error_data_length;
410	410	if (gedata_len > data_len - sizeof(*gdata))
411	411	return -EINVAL;

drivers/acpi/pci_root.c+44−41

@@ -415,7 +415,6 @@ static int acpi_pci_root_add(struct acpi_device *device, · 414 unmodified lines
415	415	struct acpi_pci_root *root;
416	416	struct acpi_pci_driver *driver;
417	417	u32 flags, base_flags;
418		− bool is_osc_granted = false;
419	418
420	419	root = kzalloc(sizeof(struct acpi_pci_root), GFP_KERNEL);
421	420	if (!root)
@@ -476,6 +475,30 @@ static int acpi_pci_root_add(struct acpi_device *device, · 54 unmodified lines
476	475	flags = base_flags = OSC_PCI_SEGMENT_GROUPS_SUPPORT;
477	476	acpi_pci_osc_support(root, flags);
478	477
	478	+ /*
	479	+ * TBD: Need PCI interface for enumeration/configuration of roots.
	480	+ */
	481	+
	482	+ mutex_lock(&acpi_pci_root_lock);
	483	+ list_add_tail(&root->node, &acpi_pci_roots);
	484	+ mutex_unlock(&acpi_pci_root_lock);
	485	+
	486	+ /*
	487	+ * Scan the Root Bridge
	488	+ * --------------------
	489	+ * Must do this prior to any attempt to bind the root device, as the
	490	+ * PCI namespace does not get created until this call is made (and
	491	+ * thus the root bridge's pci_dev does not exist).
	492	+ */
	493	+ root->bus = pci_acpi_scan_root(root);
	494	+ if (!root->bus) {
	495	+ printk(KERN_ERR PREFIX
	496	+ "Bus %04x:%02x not present in PCI namespace\n",
	497	+ root->segment, (unsigned int)root->secondary.start);
	498	+ result = -ENODEV;
	499	+ goto out_del_root;
	500	+ }
	501	+
479	502	/* Indicate support for various _OSC capabilities. */
480	503	if (pci_ext_cfg_avail())
481	504	flags \|= OSC_EXT_PCI_CONFIG_SUPPORT;
@@ -494,6 +517,7 @@ static int acpi_pci_root_add(struct acpi_device *device, · 12 unmodified lines
494	517	flags = base_flags;
495	518	}
496	519	}
	520	+
497	521	if (!pcie_ports_disabled
498	522	&& (flags & ACPI_PCIE_REQ_SUPPORT) == ACPI_PCIE_REQ_SUPPORT) {
499	523	flags = OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL
@@ -514,54 +538,28 @@ static int acpi_pci_root_add(struct acpi_device *device, · 14 unmodified lines
514	538	status = acpi_pci_osc_control_set(device->handle, &flags,
515	539	OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL);
516	540	if (ACPI_SUCCESS(status)) {
517		− is_osc_granted = true;
518	541	dev_info(&device->dev,
519	542	"ACPI _OSC control (0x%02x) granted\n", flags);
	543	+ if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) {
	544	+ /*
	545	+ * We have ASPM control, but the FADT indicates
	546	+ * that it's unsupported. Clear it.
	547	+ */
	548	+ pcie_clear_aspm(root->bus);
	549	+ }
520	550	} else {
521		− is_osc_granted = false;
522	551	dev_info(&device->dev,
523	552	"ACPI _OSC request failed (%s), "
524	553	"returned control mask: 0x%02x\n",
525	554	acpi_format_exception(status), flags);
	555	+ pr_info("ACPI _OSC control for PCIe not granted, "
	556	+ "disabling ASPM\n");
	557	+ pcie_no_aspm();
526	558	}
527	559	} else {
528	560	dev_info(&device->dev,
529		− "Unable to request _OSC control "
530		− "(_OSC support mask: 0x%02x)\n", flags);
531		− }
532		−
533		− /*
534		− * TBD: Need PCI interface for enumeration/configuration of roots.
535		− */
536		−
537		− mutex_lock(&acpi_pci_root_lock);
538		− list_add_tail(&root->node, &acpi_pci_roots);
539		− mutex_unlock(&acpi_pci_root_lock);
540		−
541		− /*
542		− * Scan the Root Bridge
543		− * --------------------
544		− * Must do this prior to any attempt to bind the root device, as the
545		− * PCI namespace does not get created until this call is made (and
546		− * thus the root bridge's pci_dev does not exist).
547		− */
548		− root->bus = pci_acpi_scan_root(root);
549		− if (!root->bus) {
550		− printk(KERN_ERR PREFIX
551		− "Bus %04x:%02x not present in PCI namespace\n",
552		− root->segment, (unsigned int)root->secondary.start);
553		− result = -ENODEV;
554		− goto out_del_root;
555		− }
556		−
557		− /* ASPM setting */
558		− if (is_osc_granted) {
559		− if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM)
560		− pcie_clear_aspm(root->bus);
561		− } else {
562		− pr_info("ACPI _OSC control for PCIe not granted, "
563		− "disabling ASPM\n");
564		− pcie_no_aspm();
	561	+ "Unable to request _OSC control "
	562	+ "(_OSC support mask: 0x%02x)\n", flags);
565	563	}
566	564
567	565	pci_acpi_add_bus_pm_notifier(device, root->bus);
@@ -646,6 +644,7 @@ static void handle_root_bridge_insertion(acpi_handle handle) · 78 unmodified lines
646	644
647	645	static void handle_root_bridge_removal(struct acpi_device *device)
648	646	{
	647	+ acpi_status status;
649	648	struct acpi_eject_event *ej_event;
650	649
651	650	ej_event = kmalloc(sizeof(*ej_event), GFP_KERNEL);
@@ -661,7 +660,9 @@ static void handle_root_bridge_removal(struct acpi_device *device) · 9 unmodified lines
661	660	ej_event->device = device;
662	661	ej_event->event = ACPI_NOTIFY_EJECT_REQUEST;
663	662
664		− acpi_bus_hot_remove_device(ej_event);
	663	+ status = acpi_os_hotplug_execute(acpi_bus_hot_remove_device, ej_event);
	664	+ if (ACPI_FAILURE(status))
	665	+ kfree(ej_event);
665	666	}
666	667
667	668	static void _handle_hotplug_event_root(struct work_struct *work)
@@ -676,8 +677,9 @@ static void _handle_hotplug_event_root(struct work_struct *work) · 8 unmodified lines
676	677	handle = hp_work->handle;
677	678	type = hp_work->type;
678	679
679		− root = acpi_pci_find_root(handle);
	680	+ acpi_scan_lock_acquire();
680	681
	682	+ root = acpi_pci_find_root(handle);
681	683	acpi_get_name(handle, ACPI_FULL_PATHNAME, &buffer);
682	684
683	685	switch (type) {
@@ -711,6 +713,7 @@ static void _handle_hotplug_event_root(struct work_struct *work) · 27 unmodified lines
711	713	break;
712	714	}
713	715
	716	+ acpi_scan_lock_release();
714	717	kfree(hp_work); /* allocated in handle_hotplug_event_bridge */
715	718	kfree(buffer.pointer);
716	719	}

drivers/acpi/processor_idle.c+7−6

@@ -66,7 +66,8 @@ module_param(latency_factor, uint, 0644); · 65 unmodified lines
66	66
67	67	static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device);
68	68
69		−static struct acpi_processor_cx *acpi_cstate[CPUIDLE_STATE_MAX];
	69	+static DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX],
	70	+ acpi_cstate);
70	71
71	72	static int disabled_by_idle_boot_param(void)
72	73	{
@@ -722,7 +723,7 @@ static int acpi_idle_enter_c1(struct cpuidle_device *dev, · 649 unmodified lines
722	723	struct cpuidle_driver *drv, int index)
723	724	{
724	725	struct acpi_processor *pr;
725		− struct acpi_processor_cx *cx = acpi_cstate[index];
	726	+ struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
726	727
727	728	pr = __this_cpu_read(processors);
728	729
@@ -745,7 +746,7 @@ static int acpi_idle_enter_c1(struct cpuidle_device *dev, · 16 unmodified lines
745	746	*/
746	747	static int acpi_idle_play_dead(struct cpuidle_device *dev, int index)
747	748	{
748		− struct acpi_processor_cx *cx = acpi_cstate[index];
	749	+ struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
749	750
750	751	ACPI_FLUSH_CPU_CACHE();
751	752
@@ -775,7 +776,7 @@ static int acpi_idle_enter_simple(struct cpuidle_device *dev, · 23 unmodified lines
775	776	struct cpuidle_driver *drv, int index)
776	777	{
777	778	struct acpi_processor *pr;
778		− struct acpi_processor_cx *cx = acpi_cstate[index];
	779	+ struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
779	780
780	781	pr = __this_cpu_read(processors);
781	782
@@ -833,7 +834,7 @@ static int acpi_idle_enter_bm(struct cpuidle_device *dev, · 51 unmodified lines
833	834	struct cpuidle_driver *drv, int index)
834	835	{
835	836	struct acpi_processor *pr;
836		− struct acpi_processor_cx *cx = acpi_cstate[index];
	837	+ struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
837	838
838	839	pr = __this_cpu_read(processors);
839	840
@@ -960,7 +961,7 @@ static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr, · 120 unmodified lines
960	961	!(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
961	962	continue;
962	963	#endif
963		− acpi_cstate[count] = cx;
	964	+ per_cpu(acpi_cstate[count], dev->cpu) = cx;
964	965
965	966	count++;
966	967	if (count == CPUIDLE_STATE_MAX)

drivers/acpi/processor_perflib.c+2−2

@@ -465,7 +465,7 @@ static int acpi_processor_get_performance_states(struct acpi_processor *pr) · 464 unmodified lines
465	465	return result;
466	466	}
467	467
468		−static int acpi_processor_get_performance_info(struct acpi_processor *pr)
	468	+int acpi_processor_get_performance_info(struct acpi_processor *pr)
469	469	{
470	470	int result = 0;
471	471	acpi_status status = AE_OK;
@@ -509,7 +509,7 @@ static int acpi_processor_get_performance_info(struct acpi_processor *pr) · 37 unmodified lines
509	509	#endif
510	510	return result;
511	511	}
512		−
	512	+EXPORT_SYMBOL_GPL(acpi_processor_get_performance_info);
513	513	int acpi_processor_notify_smm(struct module *calling_module)
514	514	{
515	515	acpi_status status;

drivers/acpi/sleep.c+8−0

@@ -193,6 +193,14 @@ static struct dmi_system_id __initdata acpisleep_dmi_table[] = { · 192 unmodified lines
193	193	},
194	194	{
195	195	.callback = init_nvs_nosave,
	196	+ .ident = "Sony Vaio VGN-FW21M",
	197	+ .matches = {
	198	+ DMI_MATCH(DMI_SYS_VENDOR, "Sony Corporation"),
	199	+ DMI_MATCH(DMI_PRODUCT_NAME, "VGN-FW21M"),
	200	+ },
	201	+ },
	202	+ {
	203	+ .callback = init_nvs_nosave,
196	204	.ident = "Sony Vaio VPCEB17FX",
197	205	.matches = {
198	206	DMI_MATCH(DMI_SYS_VENDOR, "Sony Corporation"),

drivers/amba/tegra-ahb.c+1−1

@@ -158,7 +158,7 @@ int tegra_ahb_enable_smmu(struct device_node *dn) · 157 unmodified lines
158	158	EXPORT_SYMBOL(tegra_ahb_enable_smmu);
159	159	#endif
160	160
161		−#ifdef CONFIG_PM_SLEEP
	161	+#ifdef CONFIG_PM
162	162	static int tegra_ahb_suspend(struct device *dev)
163	163	{
164	164	int i;

drivers/ata/Kconfig+7−6

@@ -59,15 +59,16 @@ config ATA_ACPI · 58 unmodified lines
59	59	option libata.noacpi=1
60	60
61	61	config SATA_ZPODD
62		− bool "SATA Zero Power ODD Support"
	62	+ bool "SATA Zero Power Optical Disc Drive (ZPODD) support"
63	63	depends on ATA_ACPI
64	64	default n
65	65	help
66		− This option adds support for SATA ZPODD. It requires both
67		− ODD and the platform support, and if enabled, will automatically
68		− power on/off the ODD when certain condition is satisfied. This
69		− does not impact user's experience of the ODD, only power is saved
70		− when ODD is not in use(i.e. no disc inside).
	66	+ This option adds support for SATA Zero Power Optical Disc
	67	+ Drive (ZPODD). It requires both the ODD and the platform
	68	+ support, and if enabled, will automatically power on/off the
	69	+ ODD when certain condition is satisfied. This does not impact
	70	+ end user's experience of the ODD, only power is saved when
	71	+ the ODD is not in use (i.e. no disc inside).
71	72
72	73	If unsure, say N.
73	74

drivers/ata/ahci.c+2−0

@@ -281,6 +281,8 @@ static const struct pci_device_id ahci_pci_tbl[] = { · 280 unmodified lines
281	281	{ PCI_VDEVICE(INTEL, 0x1f37), board_ahci }, /* Avoton RAID */
282	282	{ PCI_VDEVICE(INTEL, 0x1f3e), board_ahci }, /* Avoton RAID */
283	283	{ PCI_VDEVICE(INTEL, 0x1f3f), board_ahci }, /* Avoton RAID */
	284	+ { PCI_VDEVICE(INTEL, 0x2823), board_ahci }, /* Wellsburg RAID */
	285	+ { PCI_VDEVICE(INTEL, 0x2827), board_ahci }, /* Wellsburg RAID */
284	286	{ PCI_VDEVICE(INTEL, 0x8d02), board_ahci }, /* Wellsburg AHCI */
285	287	{ PCI_VDEVICE(INTEL, 0x8d04), board_ahci }, /* Wellsburg RAID */
286	288	{ PCI_VDEVICE(INTEL, 0x8d06), board_ahci }, /* Wellsburg RAID */

drivers/ata/ata_piix.c+17−1

@@ -150,6 +150,7 @@ enum piix_controller_ids { · 149 unmodified lines
150	150	tolapai_sata,
151	151	piix_pata_vmw, /* PIIX4 for VMware, spurious DMA_ERR */
152	152	ich8_sata_snb,
	153	+ ich8_2port_sata_snb,
153	154	};
154	155
155	156	struct piix_map_db {
@@ -304,7 +305,7 @@ static const struct pci_device_id piix_pci_tbl[] = { · 148 unmodified lines
304	305	/* SATA Controller IDE (Lynx Point) */
305	306	{ 0x8086, 0x8c01, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
306	307	/* SATA Controller IDE (Lynx Point) */
307		− { 0x8086, 0x8c08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
	308	+ { 0x8086, 0x8c08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata_snb },
308	309	/* SATA Controller IDE (Lynx Point) */
309	310	{ 0x8086, 0x8c09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
310	311	/* SATA Controller IDE (Lynx Point-LP) */
@@ -439,6 +440,7 @@ static const struct piix_map_db *piix_map_db_table[] = { · 128 unmodified lines
439	440	[ich8m_apple_sata] = &ich8m_apple_map_db,
440	441	[tolapai_sata] = &tolapai_map_db,
441	442	[ich8_sata_snb] = &ich8_map_db,
	443	+ [ich8_2port_sata_snb] = &ich8_2port_map_db,
442	444	};
443	445
444	446	static struct pci_bits piix_enable_bits[] = {
@@ -1242,6 +1244,16 @@ static struct ata_port_info piix_port_info[] = { · 797 unmodified lines
1242	1244	.udma_mask = ATA_UDMA6,
1243	1245	.port_ops = &piix_sata_ops,
1244	1246	},
	1247	+
	1248	+ [ich8_2port_sata_snb] =
	1249	+ {
	1250	+ .flags = PIIX_SATA_FLAGS \| PIIX_FLAG_SIDPR
	1251	+ \| PIIX_FLAG_PIO16,
	1252	+ .pio_mask = ATA_PIO4,
	1253	+ .mwdma_mask = ATA_MWDMA2,
	1254	+ .udma_mask = ATA_UDMA6,
	1255	+ .port_ops = &piix_sata_ops,
	1256	+ },
1245	1257	};
1246	1258
1247	1259	#define AHCI_PCI_BAR 5
@@ -1547,6 +1559,10 @@ static bool piix_broken_system_poweroff(struct pci_dev *pdev) · 299 unmodified lines
1547	1559
1548	1560	static int prefer_ms_hyperv = 1;
1549	1561	module_param(prefer_ms_hyperv, int, 0);
	1562	+MODULE_PARM_DESC(prefer_ms_hyperv,
	1563	+ "Prefer Hyper-V paravirtualization drivers instead of ATA, "
	1564	+ "0 - Use ATA drivers, "
	1565	+ "1 (Default) - Use the paravirtualization drivers.");
1550	1566
1551	1567	static void piix_ignore_devices_quirk(struct ata_host *host)
1552	1568	{

drivers/ata/libata-acpi.c+1−1

@@ -1027,7 +1027,7 @@ static void ata_acpi_register_power_resource(struct ata_device *dev) · 1026 unmodified lines
1027	1027
1028	1028	handle = ata_dev_acpi_handle(dev);
1029	1029	if (handle)
1030		− acpi_dev_pm_remove_dependent(handle, &sdev->sdev_gendev);
	1030	+ acpi_dev_pm_add_dependent(handle, &sdev->sdev_gendev);
1031	1031	}
1032	1032
1033	1033	static void ata_acpi_unregister_power_resource(struct ata_device *dev)

drivers/ata/libata-core.c+5−1

@@ -2329,7 +2329,7 @@ int ata_dev_configure(struct ata_device *dev) · 2328 unmodified lines
2329	2329	* from SATA Settings page of Identify Device Data Log.
2330	2330	*/
2331	2331	if (ata_id_has_devslp(dev->id)) {
2332		− u8 sata_setting[ATA_SECT_SIZE];
	2332	+ u8 *sata_setting = ap->sector_buf;
2333	2333	int i, j;
2334	2334
2335	2335	dev->flags \|= ATA_DFLAG_DEVSLP;
@@ -2439,6 +2439,9 @@ int ata_dev_configure(struct ata_device *dev) · 103 unmodified lines
2439	2439	dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_128,
2440	2440	dev->max_sectors);
2441	2441
	2442	+ if (dev->horkage & ATA_HORKAGE_MAX_SEC_LBA48)
	2443	+ dev->max_sectors = ATA_MAX_SECTORS_LBA48;
	2444	+
2442	2445	if (ap->ops->dev_config)
2443	2446	ap->ops->dev_config(dev);
2444	2447
@@ -4100,6 +4103,7 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = { · 1655 unmodified lines
4100	4103	/* Weird ATAPI devices */
4101	4104	{ "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 },
4102	4105	{ "QUANTUM DAT DAT72-000", NULL, ATA_HORKAGE_ATAPI_MOD16_DMA },
	4106	+ { "Slimtype DVD A DS8A8SH", NULL, ATA_HORKAGE_MAX_SEC_LBA48 },
4103	4107
4104	4108	/* Devices we expect to fail diagnostics */
4105	4109

drivers/ata/libata-scsi.c+4−4

@@ -532,8 +532,8 @@ int ata_cmd_ioctl(struct scsi_device scsidev, void __user arg) · 531 unmodified lines
532	532	struct scsi_sense_hdr sshdr;
533	533	scsi_normalize_sense(sensebuf, SCSI_SENSE_BUFFERSIZE,
534	534	&sshdr);
535		− if (sshdr.sense_key == 0 &&
536		− sshdr.asc == 0 && sshdr.ascq == 0)
	535	+ if (sshdr.sense_key == RECOVERED_ERROR &&
	536	+ sshdr.asc == 0 && sshdr.ascq == 0x1d)
537	537	cmd_result &= ~SAM_STAT_CHECK_CONDITION;
538	538	}
539	539
@@ -618,8 +618,8 @@ int ata_task_ioctl(struct scsi_device scsidev, void __user arg) · 78 unmodified lines
618	618	struct scsi_sense_hdr sshdr;
619	619	scsi_normalize_sense(sensebuf, SCSI_SENSE_BUFFERSIZE,
620	620	&sshdr);
621		− if (sshdr.sense_key == 0 &&
622		− sshdr.asc == 0 && sshdr.ascq == 0)
	621	+ if (sshdr.sense_key == RECOVERED_ERROR &&
	622	+ sshdr.asc == 0 && sshdr.ascq == 0x1d)
623	623	cmd_result &= ~SAM_STAT_CHECK_CONDITION;
624	624	}
625	625

drivers/ata/pata_samsung_cf.c+1−12

@@ -661,18 +661,7 @@ static struct platform_driver pata_s3c_driver = { · 660 unmodified lines
661	661	},
662	662	};
663	663
664		−static int __init pata_s3c_init(void)
665		−{
666		− return platform_driver_probe(&pata_s3c_driver, pata_s3c_probe);
667		−}
668		−
669		−static void __exit pata_s3c_exit(void)
670		−{
671		− platform_driver_unregister(&pata_s3c_driver);
672		−}
673		−
674		−module_init(pata_s3c_init);
675		−module_exit(pata_s3c_exit);
	664	+module_platform_driver_probe(pata_s3c_driver, pata_s3c_probe);
676	665
677	666	MODULE_AUTHOR("Abhilash Kesavan, <a.kesavan@samsung.com>");
678	667	MODULE_DESCRIPTION("low-level driver for Samsung PATA controller");

drivers/ata/sata_fsl.c+1−2

@@ -1511,8 +1511,7 @@ error_exit_with_cleanup: · 1510 unmodified lines
1511	1511
1512	1512	if (hcr_base)
1513	1513	iounmap(hcr_base);
1514		− if (host_priv)
1515		− kfree(host_priv);
	1514	+ kfree(host_priv);
1516	1515
1517	1516	return retval;
1518	1517	}

drivers/base/power/qos.c+47−13

@@ -46,6 +46,7 @@ · 45 unmodified lines
46	46	#include "power.h"
47	47
48	48	static DEFINE_MUTEX(dev_pm_qos_mtx);
	49	+static DEFINE_MUTEX(dev_pm_qos_sysfs_mtx);
49	50
50	51	static BLOCKING_NOTIFIER_HEAD(dev_pm_notifiers);
51	52
@@ -216,12 +217,17 @@ void dev_pm_qos_constraints_destroy(struct device *dev) · 164 unmodified lines
216	217	struct pm_qos_constraints *c;
217	218	struct pm_qos_flags *f;
218	219
219		− mutex_lock(&dev_pm_qos_mtx);
	220	+ mutex_lock(&dev_pm_qos_sysfs_mtx);
220	221
221	222	/*
222	223	* If the device's PM QoS resume latency limit or PM QoS flags have been
223	224	* exposed to user space, they have to be hidden at this point.
224	225	*/
	226	+ pm_qos_sysfs_remove_latency(dev);
	227	+ pm_qos_sysfs_remove_flags(dev);
	228	+
	229	+ mutex_lock(&dev_pm_qos_mtx);
	230	+
225	231	__dev_pm_qos_hide_latency_limit(dev);
226	232	__dev_pm_qos_hide_flags(dev);
227	233
@@ -254,6 +260,8 @@ void dev_pm_qos_constraints_destroy(struct device *dev) · 26 unmodified lines
254	260
255	261	out:
256	262	mutex_unlock(&dev_pm_qos_mtx);
	263	+
	264	+ mutex_unlock(&dev_pm_qos_sysfs_mtx);
257	265	}
258	266
259	267	/**
@@ -558,6 +566,14 @@ static void __dev_pm_qos_drop_user_request(struct device *dev, · 298 unmodified lines
558	566	kfree(req);
559	567	}
560	568
	569	+static void dev_pm_qos_drop_user_request(struct device *dev,
	570	+ enum dev_pm_qos_req_type type)
	571	+{
	572	+ mutex_lock(&dev_pm_qos_mtx);
	573	+ __dev_pm_qos_drop_user_request(dev, type);
	574	+ mutex_unlock(&dev_pm_qos_mtx);
	575	+}
	576	+
561	577	/**
562	578	* dev_pm_qos_expose_latency_limit - Expose PM QoS latency limit to user space.
563	579	* @dev: Device whose PM QoS latency limit is to be exposed to user space.
@@ -581,6 +597,8 @@ int dev_pm_qos_expose_latency_limit(struct device *dev, s32 value) · 17 unmodified lines
581	597	return ret;
582	598	}
583	599
	600	+ mutex_lock(&dev_pm_qos_sysfs_mtx);
	601	+
584	602	mutex_lock(&dev_pm_qos_mtx);
585	603
586	604	if (IS_ERR_OR_NULL(dev->power.qos))
@@ -591,26 +609,27 @@ int dev_pm_qos_expose_latency_limit(struct device *dev, s32 value) · 4 unmodified lines
591	609	if (ret < 0) {
592	610	__dev_pm_qos_remove_request(req);
593	611	kfree(req);
	612	+ mutex_unlock(&dev_pm_qos_mtx);
594	613	goto out;
595	614	}
596		−
597	615	dev->power.qos->latency_req = req;
	616	+
	617	+ mutex_unlock(&dev_pm_qos_mtx);
	618	+
598	619	ret = pm_qos_sysfs_add_latency(dev);
599	620	if (ret)
600		− __dev_pm_qos_drop_user_request(dev, DEV_PM_QOS_LATENCY);
	621	+ dev_pm_qos_drop_user_request(dev, DEV_PM_QOS_LATENCY);
601	622
602	623	out:
603		− mutex_unlock(&dev_pm_qos_mtx);
	624	+ mutex_unlock(&dev_pm_qos_sysfs_mtx);
604	625	return ret;
605	626	}
606	627	EXPORT_SYMBOL_GPL(dev_pm_qos_expose_latency_limit);
607	628
608	629	static void __dev_pm_qos_hide_latency_limit(struct device *dev)
609	630	{
610		− if (!IS_ERR_OR_NULL(dev->power.qos) && dev->power.qos->latency_req) {
611		− pm_qos_sysfs_remove_latency(dev);
	631	+ if (!IS_ERR_OR_NULL(dev->power.qos) && dev->power.qos->latency_req)
612	632	__dev_pm_qos_drop_user_request(dev, DEV_PM_QOS_LATENCY);
613		− }
614	633	}
615	634
616	635	/**
@@ -619,9 +638,15 @@ static void __dev_pm_qos_hide_latency_limit(struct device *dev) · 2 unmodified lines
619	638	*/
620	639	void dev_pm_qos_hide_latency_limit(struct device *dev)
621	640	{
	641	+ mutex_lock(&dev_pm_qos_sysfs_mtx);
	642	+
	643	+ pm_qos_sysfs_remove_latency(dev);
	644	+
622	645	mutex_lock(&dev_pm_qos_mtx);
623	646	__dev_pm_qos_hide_latency_limit(dev);
624	647	mutex_unlock(&dev_pm_qos_mtx);
	648	+
	649	+ mutex_unlock(&dev_pm_qos_sysfs_mtx);
625	650	}
626	651	EXPORT_SYMBOL_GPL(dev_pm_qos_hide_latency_limit);
627	652
@@ -649,6 +674,8 @@ int dev_pm_qos_expose_flags(struct device *dev, s32 val) · 21 unmodified lines
649	674	}
650	675
651	676	pm_runtime_get_sync(dev);
	677	+ mutex_lock(&dev_pm_qos_sysfs_mtx);
	678	+
652	679	mutex_lock(&dev_pm_qos_mtx);
653	680
654	681	if (IS_ERR_OR_NULL(dev->power.qos))
@@ -659,16 +686,19 @@ int dev_pm_qos_expose_flags(struct device *dev, s32 val) · 4 unmodified lines
659	686	if (ret < 0) {
660	687	__dev_pm_qos_remove_request(req);
661	688	kfree(req);
	689	+ mutex_unlock(&dev_pm_qos_mtx);
662	690	goto out;
663	691	}
664		−
665	692	dev->power.qos->flags_req = req;
	693	+
	694	+ mutex_unlock(&dev_pm_qos_mtx);
	695	+
666	696	ret = pm_qos_sysfs_add_flags(dev);
667	697	if (ret)
668		− __dev_pm_qos_drop_user_request(dev, DEV_PM_QOS_FLAGS);
	698	+ dev_pm_qos_drop_user_request(dev, DEV_PM_QOS_FLAGS);
669	699
670	700	out:
671		− mutex_unlock(&dev_pm_qos_mtx);
	701	+ mutex_unlock(&dev_pm_qos_sysfs_mtx);
672	702	pm_runtime_put(dev);
673	703	return ret;
674	704	}
@@ -676,10 +706,8 @@ EXPORT_SYMBOL_GPL(dev_pm_qos_expose_flags); · 1 unmodified line
676	706
677	707	static void __dev_pm_qos_hide_flags(struct device *dev)
678	708	{
679		− if (!IS_ERR_OR_NULL(dev->power.qos) && dev->power.qos->flags_req) {
680		− pm_qos_sysfs_remove_flags(dev);
	709	+ if (!IS_ERR_OR_NULL(dev->power.qos) && dev->power.qos->flags_req)
681	710	__dev_pm_qos_drop_user_request(dev, DEV_PM_QOS_FLAGS);
682		− }
683	711	}
684	712
685	713	/**
@@ -689,9 +717,15 @@ static void __dev_pm_qos_hide_flags(struct device *dev) · 3 unmodified lines
689	717	void dev_pm_qos_hide_flags(struct device *dev)
690	718	{
691	719	pm_runtime_get_sync(dev);
	720	+ mutex_lock(&dev_pm_qos_sysfs_mtx);
	721	+
	722	+ pm_qos_sysfs_remove_flags(dev);
	723	+
692	724	mutex_lock(&dev_pm_qos_mtx);
693	725	__dev_pm_qos_hide_flags(dev);
694	726	mutex_unlock(&dev_pm_qos_mtx);
	727	+
	728	+ mutex_unlock(&dev_pm_qos_sysfs_mtx);
695	729	pm_runtime_put(dev);
696	730	}
697	731	EXPORT_SYMBOL_GPL(dev_pm_qos_hide_flags);

drivers/base/regmap/regcache-rbtree.c+1−1

@@ -398,7 +398,7 @@ static int regcache_rbtree_sync(struct regmap *map, unsigned int min, · 397 unmodified lines
398	398	base = 0;
399	399
400	400	if (max < rbnode->base_reg + rbnode->blklen)
401		− end = rbnode->base_reg + rbnode->blklen - max;
	401	+ end = max - rbnode->base_reg + 1;
402	402	else
403	403	end = rbnode->blklen;
404	404

drivers/base/regmap/regmap.c+4−2

@@ -710,12 +710,12 @@ skip_format_initialization: · 709 unmodified lines
710	710	}
711	711	}
712	712
	713	+ regmap_debugfs_init(map, config->name);
	714	+
713	715	ret = regcache_init(map, config);
714	716	if (ret != 0)
715	717	goto err_range;
716	718
717		− regmap_debugfs_init(map, config->name);
718		−
719	719	/* Add a devres resource for dev_get_regmap() */
720	720	m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
721	721	if (!m) {
@@ -1036,6 +1036,8 @@ static int _regmap_raw_write(struct regmap *map, unsigned int reg, · 314 unmodified lines
1036	1036	kfree(async->work_buf);
1037	1037	kfree(async);
1038	1038	}
	1039	+
	1040	+ return ret;
1039	1041	}
1040	1042
1041	1043	trace_regmap_hw_write_start(map->dev, reg,

drivers/block/Kconfig+2−2

@@ -532,11 +532,11 @@ config BLK_DEV_RBD · 531 unmodified lines
532	532	If unsure, say N.
533	533
534	534	config BLK_DEV_RSXX
535		− tristate "RamSam PCIe Flash SSD Device Driver"
	535	+ tristate "IBM FlashSystem 70/80 PCIe SSD Device Driver"
536	536	depends on PCI
537	537	help
538	538	Device driver for IBM's high speed PCIe SSD
539		− storage devices: RamSan-70 and RamSan-80.
	539	+ storage devices: FlashSystem-70 and FlashSystem-80.
540	540
541	541	To compile this driver as a module, choose M here: the
542	542	module will be called rsxx.

drivers/block/aoe/aoecmd.c+2−1

@@ -51,8 +51,9 @@ new_skb(ulong len) · 50 unmodified lines
51	51	{
52	52	struct sk_buff *skb;
53	53
54		− skb = alloc_skb(len, GFP_ATOMIC);
	54	+ skb = alloc_skb(len + MAX_HEADER, GFP_ATOMIC);
55	55	if (skb) {
	56	+ skb_reserve(skb, MAX_HEADER);
56	57	skb_reset_mac_header(skb);
57	58	skb_reset_network_header(skb);
58	59	skb->protocol = __constant_htons(ETH_P_AOE);

drivers/block/cciss.c+1−1

@@ -4206,7 +4206,7 @@ static int cciss_find_cfgtables(ctlr_info_t *h) · 4205 unmodified lines
4206	4206	if (rc)
4207	4207	return rc;
4208	4208	h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
4209		− cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable));
	4209	+ cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
4210	4210	if (!h->cfgtable)
4211	4211	return -ENOMEM;
4212	4212	rc = write_driver_ver_to_cfgtable(h->cfgtable);

drivers/block/loop.c+9−1

@@ -922,6 +922,11 @@ static int loop_set_fd(struct loop_device *lo, fmode_t mode, · 921 unmodified lines
922	922	lo->lo_flags \|= LO_FLAGS_PARTSCAN;
923	923	if (lo->lo_flags & LO_FLAGS_PARTSCAN)
924	924	ioctl_by_bdev(bdev, BLKRRPART, 0);
	925	+
	926	+ /* Grab the block_device to prevent its destruction after we
	927	+ * put /dev/loopXX inode. Later in loop_clr_fd() we bdput(bdev).
	928	+ */
	929	+ bdgrab(bdev);
925	930	return 0;
926	931
927	932	out_clr:
@@ -1031,8 +1036,10 @@ static int loop_clr_fd(struct loop_device *lo) · 103 unmodified lines
1031	1036	memset(lo->lo_encrypt_key, 0, LO_KEY_SIZE);
1032	1037	memset(lo->lo_crypt_name, 0, LO_NAME_SIZE);
1033	1038	memset(lo->lo_file_name, 0, LO_NAME_SIZE);
1034		− if (bdev)
	1039	+ if (bdev) {
	1040	+ bdput(bdev);
1035	1041	invalidate_bdev(bdev);
	1042	+ }
1036	1043	set_capacity(lo->lo_disk, 0);
1037	1044	loop_sysfs_exit(lo);
1038	1045	if (bdev) {
@@ -1623,6 +1630,7 @@ static int loop_add(struct loop_device **l, int i) · 584 unmodified lines
1623	1630	goto out_free_dev;
1624	1631	i = err;
1625	1632
	1633	+ err = -ENOMEM;
1626	1634	lo->lo_queue = blk_alloc_queue(GFP_KERNEL);
1627	1635	if (!lo->lo_queue)
1628	1636	goto out_free_dev;

drivers/block/mg_disk.c+3−1

@@ -890,8 +890,10 @@ static int mg_probe(struct platform_device *plat_dev) · 889 unmodified lines
890	890	gpio_direction_output(host->rst, 1);
891	891
892	892	/* reset out pin */
893		− if (!(prv_data->dev_attr & MG_DEV_MASK))
	893	+ if (!(prv_data->dev_attr & MG_DEV_MASK)) {
	894	+ err = -EINVAL;
894	895	goto probe_err_3a;
	896	+ }
895	897
896	898	if (prv_data->dev_attr != MG_BOOT_DEV) {
897	899	rsc = platform_get_resource_byname(plat_dev, IORESOURCE_IO,

drivers/block/mtip32xx/mtip32xx.c+235−96

@@ -81,12 +81,17 @@ · 80 unmodified lines
81	81	/* Device instance number, incremented each time a device is probed. */
82	82	static int instance;
83	83
	84	+struct list_head online_list;
	85	+struct list_head removing_list;
	86	+spinlock_t dev_lock;
	87	+
84	88	/*
85	89	* Global variable used to hold the major block device number
86	90	* allocated in mtip_init().
87	91	*/
88	92	static int mtip_major;
89	93	static struct dentry *dfs_parent;
	94	+static struct dentry *dfs_device_status;
90	95
91	96	static u32 cpu_use[NR_CPUS];
92	97
@@ -243,40 +248,31 @@ static inline void release_slot(struct mtip_port *port, int tag) · 150 unmodified lines
243	248	/*
244	249	* Reset the HBA (without sleeping)
245	250	*
246		− * Just like hba_reset, except does not call sleep, so can be
247		− * run from interrupt/tasklet context.
248		− *
249	251	* @dd Pointer to the driver data structure.
250	252	*
251	253	* return value
252	254	* 0 The reset was successful.
253	255	* -1 The HBA Reset bit did not clear.
254	256	*/
255		−static int hba_reset_nosleep(struct driver_data *dd)
	257	+static int mtip_hba_reset(struct driver_data *dd)
256	258	{
257	259	unsigned long timeout;
258	260
259		− /* Chip quirk: quiesce any chip function */
260		− mdelay(10);
261		−
262	261	/* Set the reset bit */
263	262	writel(HOST_RESET, dd->mmio + HOST_CTL);
264	263
265	264	/* Flush */
266	265	readl(dd->mmio + HOST_CTL);
267	266
268		− /*
269		− * Wait 10ms then spin for up to 1 second
270		− * waiting for reset acknowledgement
271		− */
272		− timeout = jiffies + msecs_to_jiffies(1000);
273		− mdelay(10);
274		− while ((readl(dd->mmio + HOST_CTL) & HOST_RESET)
275		− && time_before(jiffies, timeout))
276		− mdelay(1);
	267	+ /* Spin for up to 2 seconds, waiting for reset acknowledgement */
	268	+ timeout = jiffies + msecs_to_jiffies(2000);
	269	+ do {
	270	+ mdelay(10);
	271	+ if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))
	272	+ return -1;
277	273
278		− if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))
279		− return -1;
	274	+ } while ((readl(dd->mmio + HOST_CTL) & HOST_RESET)
	275	+ && time_before(jiffies, timeout));
280	276
281	277	if (readl(dd->mmio + HOST_CTL) & HOST_RESET)
282	278	return -1;
@@ -481,7 +477,7 @@ static void mtip_restart_port(struct mtip_port *port) · 198 unmodified lines
481	477	dev_warn(&port->dd->pdev->dev,
482	478	"PxCMD.CR not clear, escalating reset\n");
483	479
484		− if (hba_reset_nosleep(port->dd))
	480	+ if (mtip_hba_reset(port->dd))
485	481	dev_err(&port->dd->pdev->dev,
486	482	"HBA reset escalation failed.\n");
487	483
@@ -527,6 +523,26 @@ static void mtip_restart_port(struct mtip_port *port) · 39 unmodified lines
527	523
528	524	}
529	525
	526	+static int mtip_device_reset(struct driver_data *dd)
	527	+{
	528	+ int rv = 0;
	529	+
	530	+ if (mtip_check_surprise_removal(dd->pdev))
	531	+ return 0;
	532	+
	533	+ if (mtip_hba_reset(dd) < 0)
	534	+ rv = -EFAULT;
	535	+
	536	+ mdelay(1);
	537	+ mtip_init_port(dd->port);
	538	+ mtip_start_port(dd->port);
	539	+
	540	+ /* Enable interrupts on the HBA. */
	541	+ writel(readl(dd->mmio + HOST_CTL) \| HOST_IRQ_EN,
	542	+ dd->mmio + HOST_CTL);
	543	+ return rv;
	544	+}
	545	+
530	546	/*
531	547	* Helper function for tag logging
532	548	*/
@@ -632,7 +648,7 @@ static void mtip_timeout_function(unsigned long int data) · 99 unmodified lines
632	648	if (cmdto_cnt) {
633	649	print_tags(port->dd, "timed out", tagaccum, cmdto_cnt);
634	650	if (!test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) {
635		− mtip_restart_port(port);
	651	+ mtip_device_reset(port->dd);
636	652	wake_up_interruptible(&port->svc_wait);
637	653	}
638	654	clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
@@ -1283,11 +1299,11 @@ static int mtip_exec_internal_command(struct mtip_port *port, · 644 unmodified lines
1283	1299	int rv = 0, ready2go = 1;
1284	1300	struct mtip_cmd *int_cmd = &port->commands[MTIP_TAG_INTERNAL];
1285	1301	unsigned long to;
	1302	+ struct driver_data *dd = port->dd;
1286	1303
1287	1304	/* Make sure the buffer is 8 byte aligned. This is asic specific. */
1288	1305	if (buffer & 0x00000007) {
1289		− dev_err(&port->dd->pdev->dev,
1290		− "SG buffer is not 8 byte aligned\n");
	1306	+ dev_err(&dd->pdev->dev, "SG buffer is not 8 byte aligned\n");
1291	1307	return -EFAULT;
1292	1308	}
1293	1309
@@ -1300,23 +1316,21 @@ static int mtip_exec_internal_command(struct mtip_port *port, · 6 unmodified lines
1300	1316	mdelay(100);
1301	1317	} while (time_before(jiffies, to));
1302	1318	if (!ready2go) {
1303		− dev_warn(&port->dd->pdev->dev,
	1319	+ dev_warn(&dd->pdev->dev,
1304	1320	"Internal cmd active. new cmd [%02X]\n", fis->command);
1305	1321	return -EBUSY;
1306	1322	}
1307	1323	set_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1308	1324	port->ic_pause_timer = 0;
1309	1325
1310		− if (fis->command == ATA_CMD_SEC_ERASE_UNIT)
1311		− clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
1312		− else if (fis->command == ATA_CMD_DOWNLOAD_MICRO)
1313		− clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
	1326	+ clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
	1327	+ clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
1314	1328
1315	1329	if (atomic == GFP_KERNEL) {
1316	1330	if (fis->command != ATA_CMD_STANDBYNOW1) {
1317	1331	/* wait for io to complete if non atomic */
1318	1332	if (mtip_quiesce_io(port, 5000) < 0) {
1319		− dev_warn(&port->dd->pdev->dev,
	1333	+ dev_warn(&dd->pdev->dev,
1320	1334	"Failed to quiesce IO\n");
1321	1335	release_slot(port, MTIP_TAG_INTERNAL);
1322	1336	clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
@@ -1361,58 +1375,84 @@ static int mtip_exec_internal_command(struct mtip_port *port, · 38 unmodified lines
1361	1375	/* Issue the command to the hardware */
1362	1376	mtip_issue_non_ncq_command(port, MTIP_TAG_INTERNAL);
1363	1377
1364		− /* Poll if atomic, wait_for_completion otherwise */
1365	1378	if (atomic == GFP_KERNEL) {
1366	1379	/* Wait for the command to complete or timeout. */
1367		− if (wait_for_completion_timeout(
	1380	+ if (wait_for_completion_interruptible_timeout(
1368	1381	&wait,
1369		− msecs_to_jiffies(timeout)) == 0) {
1370		− dev_err(&port->dd->pdev->dev,
1371		− "Internal command did not complete [%d] "
1372		− "within timeout of %lu ms\n",
1373		− atomic, timeout);
1374		− if (mtip_check_surprise_removal(port->dd->pdev) \|\|
	1382	+ msecs_to_jiffies(timeout)) <= 0) {
	1383	+ if (rv == -ERESTARTSYS) { /* interrupted */
	1384	+ dev_err(&dd->pdev->dev,
	1385	+ "Internal command [%02X] was interrupted after %lu ms\n",
	1386	+ fis->command, timeout);
	1387	+ rv = -EINTR;
	1388	+ goto exec_ic_exit;
	1389	+ } else if (rv == 0) /* timeout */
	1390	+ dev_err(&dd->pdev->dev,
	1391	+ "Internal command did not complete [%02X] within timeout of %lu ms\n",
	1392	+ fis->command, timeout);
	1393	+ else
	1394	+ dev_err(&dd->pdev->dev,
	1395	+ "Internal command [%02X] wait returned code [%d] after %lu ms - unhandled\n",
	1396	+ fis->command, rv, timeout);
	1397	+
	1398	+ if (mtip_check_surprise_removal(dd->pdev) \|\|
1375	1399	test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1376		− &port->dd->dd_flag)) {
	1400	+ &dd->dd_flag)) {
	1401	+ dev_err(&dd->pdev->dev,
	1402	+ "Internal command [%02X] wait returned due to SR\n",
	1403	+ fis->command);
1377	1404	rv = -ENXIO;
1378	1405	goto exec_ic_exit;
1379	1406	}
	1407	+ mtip_device_reset(dd); /* recover from timeout issue */
1380	1408	rv = -EAGAIN;
	1409	+ goto exec_ic_exit;
1381	1410	}
1382	1411	} else {
	1412	+ u32 hba_stat, port_stat;
	1413	+
1383	1414	/* Spin for <timeout> checking if command still outstanding */
1384	1415	timeout = jiffies + msecs_to_jiffies(timeout);
1385	1416	while ((readl(port->cmd_issue[MTIP_TAG_INTERNAL])
1386	1417	& (1 << MTIP_TAG_INTERNAL))
1387	1418	&& time_before(jiffies, timeout)) {
1388		− if (mtip_check_surprise_removal(port->dd->pdev)) {
	1419	+ if (mtip_check_surprise_removal(dd->pdev)) {
1389	1420	rv = -ENXIO;
1390	1421	goto exec_ic_exit;
1391	1422	}
1392	1423	if ((fis->command != ATA_CMD_STANDBYNOW1) &&
1393	1424	test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1394		− &port->dd->dd_flag)) {
	1425	+ &dd->dd_flag)) {
1395	1426	rv = -ENXIO;
1396	1427	goto exec_ic_exit;
1397	1428	}
1398		− if (readl(port->mmio + PORT_IRQ_STAT) & PORT_IRQ_ERR) {
1399		− atomic_inc(&int_cmd->active); /* error */
1400		− break;
	1429	+ port_stat = readl(port->mmio + PORT_IRQ_STAT);
	1430	+ if (!port_stat)
	1431	+ continue;
	1432	+
	1433	+ if (port_stat & PORT_IRQ_ERR) {
	1434	+ dev_err(&dd->pdev->dev,
	1435	+ "Internal command [%02X] failed\n",
	1436	+ fis->command);
	1437	+ mtip_device_reset(dd);
	1438	+ rv = -EIO;
	1439	+ goto exec_ic_exit;
	1440	+ } else {
	1441	+ writel(port_stat, port->mmio + PORT_IRQ_STAT);
	1442	+ hba_stat = readl(dd->mmio + HOST_IRQ_STAT);
	1443	+ if (hba_stat)
	1444	+ writel(hba_stat,
	1445	+ dd->mmio + HOST_IRQ_STAT);
1401	1446	}
	1447	+ break;
1402	1448	}
1403	1449	}
1404	1450
1405		− if (atomic_read(&int_cmd->active) > 1) {
1406		− dev_err(&port->dd->pdev->dev,
1407		− "Internal command [%02X] failed\n", fis->command);
1408		− rv = -EIO;
1409		− }
1410	1451	if (readl(port->cmd_issue[MTIP_TAG_INTERNAL])
1411	1452	& (1 << MTIP_TAG_INTERNAL)) {
1412	1453	rv = -ENXIO;
1413		− if (!test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1414		− &port->dd->dd_flag)) {
1415		− mtip_restart_port(port);
	1454	+ if (!test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) {
	1455	+ mtip_device_reset(dd);
1416	1456	rv = -EAGAIN;
1417	1457	}
1418	1458	}
@@ -1724,7 +1764,8 @@ static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id, · 305 unmodified lines
1724	1764	* -EINVAL Invalid parameters passed in, trim not supported
1725	1765	* -EIO Error submitting trim request to hw
1726	1766	*/
1727		−static int mtip_send_trim(struct driver_data *dd, unsigned int lba, unsigned int len)
	1767	+static int mtip_send_trim(struct driver_data *dd, unsigned int lba,
	1768	+ unsigned int len)
1728	1769	{
1729	1770	int i, rv = 0;
1730	1771	u64 tlba, tlen, sect_left;
@@ -1810,45 +1851,6 @@ static bool mtip_hw_get_capacity(struct driver_data dd, sector_t sectors) · 79 unmodified lines
1810	1851	return (bool) !!port->identify_valid;
1811	1852	}
1812	1853
1813		−/*
1814		− * Reset the HBA.
1815		− *
1816		− * Resets the HBA by setting the HBA Reset bit in the Global
1817		− * HBA Control register. After setting the HBA Reset bit the
1818		− * function waits for 1 second before reading the HBA Reset
1819		− * bit to make sure it has cleared. If HBA Reset is not clear
1820		− * an error is returned. Cannot be used in non-blockable
1821		− * context.
1822		− *
1823		− * @dd Pointer to the driver data structure.
1824		− *
1825		− * return value
1826		− * 0 The reset was successful.
1827		− * -1 The HBA Reset bit did not clear.
1828		− */
1829		−static int mtip_hba_reset(struct driver_data *dd)
1830		−{
1831		− mtip_deinit_port(dd->port);
1832		−
1833		− /* Set the reset bit */
1834		− writel(HOST_RESET, dd->mmio + HOST_CTL);
1835		−
1836		− /* Flush */
1837		− readl(dd->mmio + HOST_CTL);
1838		−
1839		− /* Wait for reset to clear */
1840		− ssleep(1);
1841		−
1842		− /* Check the bit has cleared */
1843		− if (readl(dd->mmio + HOST_CTL) & HOST_RESET) {
1844		− dev_err(&dd->pdev->dev,
1845		− "Reset bit did not clear.\n");
1846		− return -1;
1847		− }
1848		−
1849		− return 0;
1850		−}
1851		−
1852	1854	/*
1853	1855	* Display the identify command data.
1854	1856	*
@@ -2710,6 +2712,100 @@ static ssize_t mtip_hw_show_status(struct device *dev, · 855 unmodified lines
2710	2712
2711	2713	static DEVICE_ATTR(status, S_IRUGO, mtip_hw_show_status, NULL);
2712	2714
	2715	+/* debugsfs entries */
	2716	+
	2717	+static ssize_t show_device_status(struct device_driver drv, char buf)
	2718	+{
	2719	+ int size = 0;
	2720	+ struct driver_data dd, tmp;
	2721	+ unsigned long flags;
	2722	+ char id_buf[42];
	2723	+ u16 status = 0;
	2724	+
	2725	+ spin_lock_irqsave(&dev_lock, flags);
	2726	+ size += sprintf(&buf[size], "Devices Present:\n");
	2727	+ list_for_each_entry_safe(dd, tmp, &online_list, online_list) {
	2728	+ if (dd->pdev) {
	2729	+ if (dd->port &&
	2730	+ dd->port->identify &&
	2731	+ dd->port->identify_valid) {
	2732	+ strlcpy(id_buf,
	2733	+ (char *) (dd->port->identify + 10), 21);
	2734	+ status = *(dd->port->identify + 141);
	2735	+ } else {
	2736	+ memset(id_buf, 0, 42);
	2737	+ status = 0;
	2738	+ }
	2739	+
	2740	+ if (dd->port &&
	2741	+ test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) {
	2742	+ size += sprintf(&buf[size],
	2743	+ " device %s %s (ftl rebuild %d %%)\n",
	2744	+ dev_name(&dd->pdev->dev),
	2745	+ id_buf,
	2746	+ status);
	2747	+ } else {
	2748	+ size += sprintf(&buf[size],
	2749	+ " device %s %s\n",
	2750	+ dev_name(&dd->pdev->dev),
	2751	+ id_buf);
	2752	+ }
	2753	+ }
	2754	+ }
	2755	+
	2756	+ size += sprintf(&buf[size], "Devices Being Removed:\n");
	2757	+ list_for_each_entry_safe(dd, tmp, &removing_list, remove_list) {
	2758	+ if (dd->pdev) {
	2759	+ if (dd->port &&
	2760	+ dd->port->identify &&
	2761	+ dd->port->identify_valid) {
	2762	+ strlcpy(id_buf,
	2763	+ (char *) (dd->port->identify+10), 21);
	2764	+ status = *(dd->port->identify + 141);
	2765	+ } else {
	2766	+ memset(id_buf, 0, 42);
	2767	+ status = 0;
	2768	+ }
	2769	+
	2770	+ if (dd->port &&
	2771	+ test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) {
	2772	+ size += sprintf(&buf[size],
	2773	+ " device %s %s (ftl rebuild %d %%)\n",
	2774	+ dev_name(&dd->pdev->dev),
	2775	+ id_buf,
	2776	+ status);
	2777	+ } else {
	2778	+ size += sprintf(&buf[size],
	2779	+ " device %s %s\n",
	2780	+ dev_name(&dd->pdev->dev),
	2781	+ id_buf);
	2782	+ }
	2783	+ }
	2784	+ }
	2785	+ spin_unlock_irqrestore(&dev_lock, flags);
	2786	+
	2787	+ return size;
	2788	+}
	2789	+
	2790	+static ssize_t mtip_hw_read_device_status(struct file f, char __user ubuf,
	2791	+ size_t len, loff_t *offset)
	2792	+{
	2793	+ int size = *offset;
	2794	+ char buf[MTIP_DFS_MAX_BUF_SIZE];
	2795	+
	2796	+ if (!len \|\| *offset)
	2797	+ return 0;
	2798	+
	2799	+ size += show_device_status(NULL, buf);
	2800	+
	2801	+ *offset = size <= len ? size : len;
	2802	+ size = copy_to_user(ubuf, buf, *offset);
	2803	+ if (size)
	2804	+ return -EFAULT;
	2805	+
	2806	+ return *offset;
	2807	+}
	2808	+
2713	2809	static ssize_t mtip_hw_read_registers(struct file f, char __user ubuf,
2714	2810	size_t len, loff_t *offset)
2715	2811	{
@@ -2804,6 +2900,13 @@ static ssize_t mtip_hw_read_flags(struct file f, char __user ubuf, · 88 unmodified lines
2804	2900	return *offset;
2805	2901	}
2806	2902
	2903	+static const struct file_operations mtip_device_status_fops = {
	2904	+ .owner = THIS_MODULE,
	2905	+ .open = simple_open,
	2906	+ .read = mtip_hw_read_device_status,
	2907	+ .llseek = no_llseek,
	2908	+};
	2909	+
2807	2910	static const struct file_operations mtip_regs_fops = {
2808	2911	.owner = THIS_MODULE,
2809	2912	.open = simple_open,
@@ -4161,6 +4264,7 @@ static int mtip_pci_probe(struct pci_dev *pdev, · 1351 unmodified lines
4161	4264	const struct cpumask *node_mask;
4162	4265	int cpu, i = 0, j = 0;
4163	4266	int my_node = NUMA_NO_NODE;
	4267	+ unsigned long flags;
4164	4268
4165	4269	/* Allocate memory for this devices private data. */
4166	4270	my_node = pcibus_to_node(pdev->bus);
@@ -4218,12 +4322,16 @@ static int mtip_pci_probe(struct pci_dev *pdev, · 51 unmodified lines
4218	4322	dd->pdev = pdev;
4219	4323	dd->numa_node = my_node;
4220	4324
	4325	+ INIT_LIST_HEAD(&dd->online_list);
	4326	+ INIT_LIST_HEAD(&dd->remove_list);
	4327	+
4221	4328	memset(dd->workq_name, 0, 32);
4222	4329	snprintf(dd->workq_name, 31, "mtipq%d", dd->instance);
4223	4330
4224	4331	dd->isr_workq = create_workqueue(dd->workq_name);
4225	4332	if (!dd->isr_workq) {
4226	4333	dev_warn(&pdev->dev, "Can't create wq %d\n", dd->instance);
	4334	+ rv = -ENOMEM;
4227	4335	goto block_initialize_err;
4228	4336	}
4229	4337
@@ -4282,7 +4390,8 @@ static int mtip_pci_probe(struct pci_dev *pdev, · 52 unmodified lines
4282	4390	INIT_WORK(&dd->work[7].work, mtip_workq_sdbf7);
4283	4391
4284	4392	pci_set_master(pdev);
4285		− if (pci_enable_msi(pdev)) {
	4393	+ rv = pci_enable_msi(pdev);
	4394	+ if (rv) {
4286	4395	dev_warn(&pdev->dev,
4287	4396	"Unable to enable MSI interrupt.\n");
4288	4397	goto block_initialize_err;
@@ -4303,6 +4412,14 @@ static int mtip_pci_probe(struct pci_dev *pdev, · 14 unmodified lines
4303	4412	instance++;
4304	4413	if (rv != MTIP_FTL_REBUILD_MAGIC)
4305	4414	set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
	4415	+ else
	4416	+ rv = 0; /* device in rebuild state, return 0 from probe */
	4417	+
	4418	+ /* Add to online list even if in ftl rebuild */
	4419	+ spin_lock_irqsave(&dev_lock, flags);
	4420	+ list_add(&dd->online_list, &online_list);
	4421	+ spin_unlock_irqrestore(&dev_lock, flags);
	4422	+
4306	4423	goto done;
4307	4424
4308	4425	block_initialize_err:
@@ -4336,9 +4453,15 @@ static void mtip_pci_remove(struct pci_dev *pdev) · 27 unmodified lines
4336	4453	{
4337	4454	struct driver_data *dd = pci_get_drvdata(pdev);
4338	4455	int counter = 0;
	4456	+ unsigned long flags;
4339	4457
4340	4458	set_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag);
4341	4459
	4460	+ spin_lock_irqsave(&dev_lock, flags);
	4461	+ list_del_init(&dd->online_list);
	4462	+ list_add(&dd->remove_list, &removing_list);
	4463	+ spin_unlock_irqrestore(&dev_lock, flags);
	4464	+
4342	4465	if (mtip_check_surprise_removal(pdev)) {
4343	4466	while (!test_bit(MTIP_DDF_CLEANUP_BIT, &dd->dd_flag)) {
4344	4467	counter++;
@@ -4364,6 +4487,10 @@ static void mtip_pci_remove(struct pci_dev *pdev) · 19 unmodified lines
4364	4487
4365	4488	pci_disable_msi(pdev);
4366	4489
	4490	+ spin_lock_irqsave(&dev_lock, flags);
	4491	+ list_del_init(&dd->remove_list);
	4492	+ spin_unlock_irqrestore(&dev_lock, flags);
	4493	+
4367	4494	kfree(dd);
4368	4495	pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
4369	4496	}
@@ -4511,6 +4638,11 @@ static int __init mtip_init(void) · 141 unmodified lines
4511	4638
4512	4639	pr_info(MTIP_DRV_NAME " Version " MTIP_DRV_VERSION "\n");
4513	4640
	4641	+ spin_lock_init(&dev_lock);
	4642	+
	4643	+ INIT_LIST_HEAD(&online_list);
	4644	+ INIT_LIST_HEAD(&removing_list);
	4645	+
4514	4646	/* Allocate a major block device number to use with this driver. */
4515	4647	error = register_blkdev(0, MTIP_DRV_NAME);
4516	4648	if (error <= 0) {
@@ -4520,11 +4652,18 @@ static int __init mtip_init(void) · 3 unmodified lines
4520	4652	}
4521	4653	mtip_major = error;
4522	4654
4523		− if (!dfs_parent) {
4524		− dfs_parent = debugfs_create_dir("rssd", NULL);
4525		− if (IS_ERR_OR_NULL(dfs_parent)) {
4526		− pr_warn("Error creating debugfs parent\n");
4527		− dfs_parent = NULL;
	4655	+ dfs_parent = debugfs_create_dir("rssd", NULL);
	4656	+ if (IS_ERR_OR_NULL(dfs_parent)) {
	4657	+ pr_warn("Error creating debugfs parent\n");
	4658	+ dfs_parent = NULL;
	4659	+ }
	4660	+ if (dfs_parent) {
	4661	+ dfs_device_status = debugfs_create_file("device_status",
	4662	+ S_IRUGO, dfs_parent, NULL,
	4663	+ &mtip_device_status_fops);
	4664	+ if (IS_ERR_OR_NULL(dfs_device_status)) {
	4665	+ pr_err("Error creating device_status node\n");
	4666	+ dfs_device_status = NULL;
4528	4667	}
4529	4668	}
4530	4669

drivers/block/mtip32xx/mtip32xx.h+11−7

@@ -129,9 +129,9 @@ enum { · 128 unmodified lines
129	129	MTIP_PF_EH_ACTIVE_BIT = 1, /* error handling */
130	130	MTIP_PF_SE_ACTIVE_BIT = 2, /* secure erase */
131	131	MTIP_PF_DM_ACTIVE_BIT = 3, /* download microcde */
132		− MTIP_PF_PAUSE_IO = ((1 << MTIP_PF_IC_ACTIVE_BIT) \| \
133		− (1 << MTIP_PF_EH_ACTIVE_BIT) \| \
134		− (1 << MTIP_PF_SE_ACTIVE_BIT) \| \
	132	+ MTIP_PF_PAUSE_IO = ((1 << MTIP_PF_IC_ACTIVE_BIT) \|
	133	+ (1 << MTIP_PF_EH_ACTIVE_BIT) \|
	134	+ (1 << MTIP_PF_SE_ACTIVE_BIT) \|
135	135	(1 << MTIP_PF_DM_ACTIVE_BIT)),
136	136
137	137	MTIP_PF_SVC_THD_ACTIVE_BIT = 4,
@@ -144,9 +144,9 @@ enum { · 6 unmodified lines
144	144	MTIP_DDF_REMOVE_PENDING_BIT = 1,
145	145	MTIP_DDF_OVER_TEMP_BIT = 2,
146	146	MTIP_DDF_WRITE_PROTECT_BIT = 3,
147		− MTIP_DDF_STOP_IO = ((1 << MTIP_DDF_REMOVE_PENDING_BIT) \| \
148		− (1 << MTIP_DDF_SEC_LOCK_BIT) \| \
149		− (1 << MTIP_DDF_OVER_TEMP_BIT) \| \
	147	+ MTIP_DDF_STOP_IO = ((1 << MTIP_DDF_REMOVE_PENDING_BIT) \|
	148	+ (1 << MTIP_DDF_SEC_LOCK_BIT) \|
	149	+ (1 << MTIP_DDF_OVER_TEMP_BIT) \|
150	150	(1 << MTIP_DDF_WRITE_PROTECT_BIT)),
151	151
152	152	MTIP_DDF_CLEANUP_BIT = 5,
@@ -180,7 +180,7 @@ struct mtip_work { · 27 unmodified lines
180	180
181	181	#define MTIP_TRIM_TIMEOUT_MS 240000
182	182	#define MTIP_MAX_TRIM_ENTRIES 8
183		−#define MTIP_MAX_TRIM_ENTRY_LEN 0xfff8
	183	+#define MTIP_MAX_TRIM_ENTRY_LEN 0xfff8
184	184
185	185	struct mtip_trim_entry {
186	186	u32 lba; /* starting lba of region */
@@ -501,6 +501,10 @@ struct driver_data { · 314 unmodified lines
501	501	atomic_t irq_workers_active;
502	502
503	503	int isr_binding;
	504	+
	505	+ struct list_head online_list; /* linkage for online list */
	506	+
	507	+ struct list_head remove_list; /* linkage for removing list */
504	508	};
505	509
506	510	#endif

drivers/block/nvme.c+24−9

@@ -135,6 +135,7 @@ static inline void _nvme_check_size(void) · 134 unmodified lines
135	135	BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
136	136	BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
137	137	BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
	138	+ BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
138	139	}
139	140
140	141	typedef void (nvme_completion_fn)(struct nvme_dev , void *,
@@ -237,7 +238,8 @@ static void free_cmdid(struct nvme_queue nvmeq, int cmdid, · 96 unmodified lines
237	238	*fn = special_completion;
238	239	return CMD_CTX_INVALID;
239	240	}
240		− *fn = info[cmdid].fn;
	241	+ if (fn)
	242	+ *fn = info[cmdid].fn;
241	243	ctx = info[cmdid].ctx;
242	244	info[cmdid].fn = special_completion;
243	245	info[cmdid].ctx = CMD_CTX_COMPLETED;
@@ -335,6 +337,7 @@ nvme_alloc_iod(unsigned nseg, unsigned nbytes, gfp_t gfp) · 91 unmodified lines
335	337	iod->offset = offsetof(struct nvme_iod, sg[nseg]);
336	338	iod->npages = -1;
337	339	iod->length = nbytes;
	340	+ iod->nents = 0;
338	341	}
339	342
340	343	return iod;
@@ -375,7 +378,8 @@ static void bio_completion(struct nvme_dev dev, void ctx, · 34 unmodified lines
375	378	struct bio *bio = iod->private;
376	379	u16 status = le16_to_cpup(&cqe->status) >> 1;
377	380
378		− dma_unmap_sg(&dev->pci_dev->dev, iod->sg, iod->nents,
	381	+ if (iod->nents)
	382	+ dma_unmap_sg(&dev->pci_dev->dev, iod->sg, iod->nents,
379	383	bio_data_dir(bio) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
380	384	nvme_free_iod(dev, iod);
381	385	if (status) {
@@ -589,7 +593,7 @@ static int nvme_submit_bio_queue(struct nvme_queue nvmeq, struct nvme_ns ns, · 207 unmodified lines
589	593
590	594	result = nvme_map_bio(nvmeq->q_dmadev, iod, bio, dma_dir, psegs);
591	595	if (result < 0)
592		− goto free_iod;
	596	+ goto free_cmdid;
593	597	length = result;
594	598
595	599	cmnd->rw.command_id = cmdid;
@@ -609,6 +613,8 @@ static int nvme_submit_bio_queue(struct nvme_queue nvmeq, struct nvme_ns ns, · 13 unmodified lines
609	613
610	614	return 0;
611	615
	616	+ free_cmdid:
	617	+ free_cmdid(nvmeq, cmdid, NULL);
612	618	free_iod:
613	619	nvme_free_iod(nvmeq->dev, iod);
614	620	nomem:
@@ -835,8 +841,8 @@ static int nvme_identify(struct nvme_dev *dev, unsigned nsid, unsigned cns, · 220 unmodified lines
835	841	return nvme_submit_admin_cmd(dev, &c, NULL);
836	842	}
837	843
838		−static int nvme_get_features(struct nvme_dev *dev, unsigned fid,
839		− unsigned nsid, dma_addr_t dma_addr)
	844	+static int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
	845	+ dma_addr_t dma_addr, u32 *result)
840	846	{
841	847	struct nvme_command c;
842	848
@@ -846,7 +852,7 @@ static int nvme_get_features(struct nvme_dev *dev, unsigned fid, · 3 unmodified lines
846	852	c.features.prp1 = cpu_to_le64(dma_addr);
847	853	c.features.fid = cpu_to_le32(fid);
848	854
849		− return nvme_submit_admin_cmd(dev, &c, NULL);
	855	+ return nvme_submit_admin_cmd(dev, &c, result);
850	856	}
851	857
852	858	static int nvme_set_features(struct nvme_dev *dev, unsigned fid,
@@ -906,6 +912,10 @@ static void nvme_free_queue(struct nvme_dev *dev, int qid) · 53 unmodified lines
906	912
907	913	spin_lock_irq(&nvmeq->q_lock);
908	914	nvme_cancel_ios(nvmeq, false);
	915	+ while (bio_list_peek(&nvmeq->sq_cong)) {
	916	+ struct bio *bio = bio_list_pop(&nvmeq->sq_cong);
	917	+ bio_endio(bio, -EIO);
	918	+ }
909	919	spin_unlock_irq(&nvmeq->q_lock);
910	920
911	921	irq_set_affinity_hint(vector, NULL);
@@ -1230,12 +1240,17 @@ static int nvme_user_admin_cmd(struct nvme_dev *dev, · 318 unmodified lines
1230	1240	if (length != cmd.data_len)
1231	1241	status = -ENOMEM;
1232	1242	else
1233		− status = nvme_submit_admin_cmd(dev, &c, NULL);
	1243	+ status = nvme_submit_admin_cmd(dev, &c, &cmd.result);
1234	1244
1235	1245	if (cmd.data_len) {
1236	1246	nvme_unmap_user_pages(dev, cmd.opcode & 1, iod);
1237	1247	nvme_free_iod(dev, iod);
1238	1248	}
	1249	+
	1250	+ if (!status && copy_to_user(&ucmd->result, &cmd.result,
	1251	+ sizeof(cmd.result)))
	1252	+ status = -EFAULT;
	1253	+
1239	1254	return status;
1240	1255	}
1241	1256
@@ -1523,9 +1538,9 @@ static int nvme_dev_add(struct nvme_dev *dev) · 281 unmodified lines
1523	1538	continue;
1524	1539
1525	1540	res = nvme_get_features(dev, NVME_FEAT_LBA_RANGE, i,
1526		− dma_addr + 4096);
	1541	+ dma_addr + 4096, NULL);
1527	1542	if (res)
1528		− continue;
	1543	+ memset(mem + 4096, 0, 4096);
1529	1544
1530	1545	ns = nvme_alloc_ns(dev, i, mem, mem + 4096);
1531	1546	if (ns)

drivers/block/rbd.c+32−18

@@ -1264,6 +1264,32 @@ static bool obj_request_done_test(struct rbd_obj_request *obj_request) · 1263 unmodified lines
1264	1264	return atomic_read(&obj_request->done) != 0;
1265	1265	}
1266	1266
	1267	+static void
	1268	+rbd_img_obj_request_read_callback(struct rbd_obj_request *obj_request)
	1269	+{
	1270	+ dout("%s: obj %p img %p result %d %llu/%llu\n", __func__,
	1271	+ obj_request, obj_request->img_request, obj_request->result,
	1272	+ obj_request->xferred, obj_request->length);
	1273	+ /*
	1274	+ * ENOENT means a hole in the image. We zero-fill the
	1275	+ * entire length of the request. A short read also implies
	1276	+ * zero-fill to the end of the request. Either way we
	1277	+ * update the xferred count to indicate the whole request
	1278	+ * was satisfied.
	1279	+ */
	1280	+ BUG_ON(obj_request->type != OBJ_REQUEST_BIO);
	1281	+ if (obj_request->result == -ENOENT) {
	1282	+ zero_bio_chain(obj_request->bio_list, 0);
	1283	+ obj_request->result = 0;
	1284	+ obj_request->xferred = obj_request->length;
	1285	+ } else if (obj_request->xferred < obj_request->length &&
	1286	+ !obj_request->result) {
	1287	+ zero_bio_chain(obj_request->bio_list, obj_request->xferred);
	1288	+ obj_request->xferred = obj_request->length;
	1289	+ }
	1290	+ obj_request_done_set(obj_request);
	1291	+}
	1292	+
1267	1293	static void rbd_obj_request_complete(struct rbd_obj_request *obj_request)
1268	1294	{
1269	1295	dout("%s: obj %p cb %p\n", __func__, obj_request,
@@ -1284,23 +1310,10 @@ static void rbd_osd_read_callback(struct rbd_obj_request *obj_request) · 14 unmodified lines
1284	1310	{
1285	1311	dout("%s: obj %p result %d %llu/%llu\n", __func__, obj_request,
1286	1312	obj_request->result, obj_request->xferred, obj_request->length);
1287		− /*
1288		− * ENOENT means a hole in the object. We zero-fill the
1289		− * entire length of the request. A short read also implies
1290		− * zero-fill to the end of the request. Either way we
1291		− * update the xferred count to indicate the whole request
1292		− * was satisfied.
1293		− */
1294		− if (obj_request->result == -ENOENT) {
1295		− zero_bio_chain(obj_request->bio_list, 0);
1296		− obj_request->result = 0;
1297		− obj_request->xferred = obj_request->length;
1298		− } else if (obj_request->xferred < obj_request->length &&
1299		− !obj_request->result) {
1300		− zero_bio_chain(obj_request->bio_list, obj_request->xferred);
1301		− obj_request->xferred = obj_request->length;
1302		− }
1303		− obj_request_done_set(obj_request);
	1313	+ if (obj_request->img_request)
	1314	+ rbd_img_obj_request_read_callback(obj_request);
	1315	+ else
	1316	+ obj_request_done_set(obj_request);
1304	1317	}
1305	1318
1306	1319	static void rbd_osd_write_callback(struct rbd_obj_request *obj_request)
@@ -1729,9 +1742,10 @@ static int rbd_img_request_submit(struct rbd_img_request *img_request) · 422 unmodified lines
1729	1742	struct rbd_device *rbd_dev = img_request->rbd_dev;
1730	1743	struct ceph_osd_client *osdc = &rbd_dev->rbd_client->client->osdc;
1731	1744	struct rbd_obj_request *obj_request;
	1745	+ struct rbd_obj_request *next_obj_request;
1732	1746
1733	1747	dout("%s: img %p\n", __func__, img_request);
1734		− for_each_obj_request(img_request, obj_request) {
	1748	+ for_each_obj_request_safe(img_request, obj_request, next_obj_request) {
1735	1749	int ret;
1736	1750
1737	1751	obj_request->callback = rbd_img_obj_callback;

drivers/block/rsxx/Makefile+1−1

@@ -1,2 +1,2 @@
1	1	obj-$(CONFIG_BLK_DEV_RSXX) += rsxx.o
2		−rsxx-y := config.o core.o cregs.o dev.o dma.o
	2	+rsxx-objs := config.o core.o cregs.o dev.o dma.o

drivers/block/rsxx/config.c+3−5

@@ -29,15 +29,13 @@ · 28 unmodified lines
29	29	#include "rsxx_priv.h"
30	30	#include "rsxx_cfg.h"
31	31
32		−static void initialize_config(void *config)
	32	+static void initialize_config(struct rsxx_card_cfg *cfg)
33	33	{
34		− struct rsxx_card_cfg *cfg = config;
35		−
36	34	cfg->hdr.version = RSXX_CFG_VERSION;
37	35
38	36	cfg->data.block_size = RSXX_HW_BLK_SIZE;
39	37	cfg->data.stripe_size = RSXX_HW_BLK_SIZE;
40		− cfg->data.vendor_id = RSXX_VENDOR_ID_TMS_IBM;
	38	+ cfg->data.vendor_id = RSXX_VENDOR_ID_IBM;
41	39	cfg->data.cache_order = (-1);
42	40	cfg->data.intr_coal.mode = RSXX_INTR_COAL_DISABLED;
43	41	cfg->data.intr_coal.count = 0;
@@ -181,7 +179,7 @@ int rsxx_load_config(struct rsxx_cardinfo *card) · 137 unmodified lines
181	179	} else {
182	180	dev_info(CARD_TO_DEV(card),
183	181	"Initializing card configuration.\n");
184		− initialize_config(card);
	182	+ initialize_config(&card->config);
185	183	st = rsxx_save_config(card);
186	184	if (st)
187	185	return st;

drivers/block/rsxx/core.c+224−13

@@ -30,6 +30,7 @@ · 29 unmodified lines
30	30	#include <linux/reboot.h>
31	31	#include <linux/slab.h>
32	32	#include <linux/bitops.h>
	33	+#include <linux/delay.h>
33	34
34	35	#include <linux/genhd.h>
35	36	#include <linux/idr.h>
@@ -39,8 +40,8 @@ · 3 unmodified lines
39	40
40	41	#define NO_LEGACY 0
41	42
42		−MODULE_DESCRIPTION("IBM RamSan PCIe Flash SSD Device Driver");
43		−MODULE_AUTHOR("IBM <support@ramsan.com>");
	43	+MODULE_DESCRIPTION("IBM FlashSystem 70/80 PCIe SSD Device Driver");
	44	+MODULE_AUTHOR("Joshua Morris/Philip Kelleher, IBM");
44	45	MODULE_LICENSE("GPL");
45	46	MODULE_VERSION(DRIVER_VERSION);
46	47
@@ -52,6 +53,13 @@ static DEFINE_IDA(rsxx_disk_ida); · 5 unmodified lines
52	53	static DEFINE_SPINLOCK(rsxx_ida_lock);
53	54
54	55	/----------------- Interrupt Control & Handling -------------------/
	56	+
	57	+static void rsxx_mask_interrupts(struct rsxx_cardinfo *card)
	58	+{
	59	+ card->isr_mask = 0;
	60	+ card->ier_mask = 0;
	61	+}
	62	+
55	63	static void __enable_intr(unsigned int *mask, unsigned int intr)
56	64	{
57	65	*mask \|= intr;
@@ -71,7 +79,8 @@ static void __disable_intr(unsigned int *mask, unsigned int intr) · 13 unmodified lines
71	79	*/
72	80	void rsxx_enable_ier(struct rsxx_cardinfo *card, unsigned int intr)
73	81	{
74		− if (unlikely(card->halt))
	82	+ if (unlikely(card->halt) \|\|
	83	+ unlikely(card->eeh_state))
75	84	return;
76	85
77	86	__enable_intr(&card->ier_mask, intr);
@@ -80,6 +89,9 @@ void rsxx_enable_ier(struct rsxx_cardinfo *card, unsigned int intr) · 2 unmodified lines
80	89
81	90	void rsxx_disable_ier(struct rsxx_cardinfo *card, unsigned int intr)
82	91	{
	92	+ if (unlikely(card->eeh_state))
	93	+ return;
	94	+
83	95	__disable_intr(&card->ier_mask, intr);
84	96	iowrite32(card->ier_mask, card->regmap + IER);
85	97	}
@@ -87,7 +99,8 @@ void rsxx_disable_ier(struct rsxx_cardinfo *card, unsigned int intr) · 1 unmodified line
87	99	void rsxx_enable_ier_and_isr(struct rsxx_cardinfo *card,
88	100	unsigned int intr)
89	101	{
90		− if (unlikely(card->halt))
	102	+ if (unlikely(card->halt) \|\|
	103	+ unlikely(card->eeh_state))
91	104	return;
92	105
93	106	__enable_intr(&card->isr_mask, intr);
@@ -97,6 +110,9 @@ void rsxx_enable_ier_and_isr(struct rsxx_cardinfo *card, · 3 unmodified lines
97	110	void rsxx_disable_ier_and_isr(struct rsxx_cardinfo *card,
98	111	unsigned int intr)
99	112	{
	113	+ if (unlikely(card->eeh_state))
	114	+ return;
	115	+
100	116	__disable_intr(&card->isr_mask, intr);
101	117	__disable_intr(&card->ier_mask, intr);
102	118	iowrite32(card->ier_mask, card->regmap + IER);
@@ -115,6 +131,9 @@ static irqreturn_t rsxx_isr(int irq, void *pdata) · 12 unmodified lines
115	131	do {
116	132	reread_isr = 0;
117	133
	134	+ if (unlikely(card->eeh_state))
	135	+ break;
	136	+
118	137	isr = ioread32(card->regmap + ISR);
119	138	if (isr == 0xffffffff) {
120	139	/*
@@ -161,9 +180,9 @@ static irqreturn_t rsxx_isr(int irq, void *pdata) · 40 unmodified lines
161	180	}
162	181
163	182	/----------------- Card Event Handler -------------------/
164		−static char *rsxx_card_state_to_str(unsigned int state)
	183	+static const char * const rsxx_card_state_to_str(unsigned int state)
165	184	{
166		− static char *state_strings[] = {
	185	+ static const char * const state_strings[] = {
167	186	"Unknown", "Shutdown", "Starting", "Formatting",
168	187	"Uninitialized", "Good", "Shutting Down",
169	188	"Fault", "Read Only Fault", "dStroying"
@@ -304,6 +323,192 @@ static int card_shutdown(struct rsxx_cardinfo *card) · 134 unmodified lines
304	323	return 0;
305	324	}
306	325
	326	+static int rsxx_eeh_frozen(struct pci_dev *dev)
	327	+{
	328	+ struct rsxx_cardinfo *card = pci_get_drvdata(dev);
	329	+ int i;
	330	+ int st;
	331	+
	332	+ dev_warn(&dev->dev, "IBM FlashSystem PCI: preparing for slot reset.\n");
	333	+
	334	+ card->eeh_state = 1;
	335	+ rsxx_mask_interrupts(card);
	336	+
	337	+ /*
	338	+ * We need to guarantee that the write for eeh_state and masking
	339	+ * interrupts does not become reordered. This will prevent a possible
	340	+ * race condition with the EEH code.
	341	+ */
	342	+ wmb();
	343	+
	344	+ pci_disable_device(dev);
	345	+
	346	+ st = rsxx_eeh_save_issued_dmas(card);
	347	+ if (st)
	348	+ return st;
	349	+
	350	+ rsxx_eeh_save_issued_creg(card);
	351	+
	352	+ for (i = 0; i < card->n_targets; i++) {
	353	+ if (card->ctrl[i].status.buf)
	354	+ pci_free_consistent(card->dev, STATUS_BUFFER_SIZE8,
	355	+ card->ctrl[i].status.buf,
	356	+ card->ctrl[i].status.dma_addr);
	357	+ if (card->ctrl[i].cmd.buf)
	358	+ pci_free_consistent(card->dev, COMMAND_BUFFER_SIZE8,
	359	+ card->ctrl[i].cmd.buf,
	360	+ card->ctrl[i].cmd.dma_addr);
	361	+ }
	362	+
	363	+ return 0;
	364	+}
	365	+
	366	+static void rsxx_eeh_failure(struct pci_dev *dev)
	367	+{
	368	+ struct rsxx_cardinfo *card = pci_get_drvdata(dev);
	369	+ int i;
	370	+
	371	+ dev_err(&dev->dev, "IBM FlashSystem PCI: disabling failed card.\n");
	372	+
	373	+ card->eeh_state = 1;
	374	+
	375	+ for (i = 0; i < card->n_targets; i++)
	376	+ del_timer_sync(&card->ctrl[i].activity_timer);
	377	+
	378	+ rsxx_eeh_cancel_dmas(card);
	379	+}
	380	+
	381	+static int rsxx_eeh_fifo_flush_poll(struct rsxx_cardinfo *card)
	382	+{
	383	+ unsigned int status;
	384	+ int iter = 0;
	385	+
	386	+ /* We need to wait for the hardware to reset */
	387	+ while (iter++ < 10) {
	388	+ status = ioread32(card->regmap + PCI_RECONFIG);
	389	+
	390	+ if (status & RSXX_FLUSH_BUSY) {
	391	+ ssleep(1);
	392	+ continue;
	393	+ }
	394	+
	395	+ if (status & RSXX_FLUSH_TIMEOUT)
	396	+ dev_warn(CARD_TO_DEV(card), "HW: flash controller timeout\n");
	397	+ return 0;
	398	+ }
	399	+
	400	+ /* Hardware failed resetting itself. */
	401	+ return -1;
	402	+}
	403	+
	404	+static pci_ers_result_t rsxx_error_detected(struct pci_dev *dev,
	405	+ enum pci_channel_state error)
	406	+{
	407	+ int st;
	408	+
	409	+ if (dev->revision < RSXX_EEH_SUPPORT)
	410	+ return PCI_ERS_RESULT_NONE;
	411	+
	412	+ if (error == pci_channel_io_perm_failure) {
	413	+ rsxx_eeh_failure(dev);
	414	+ return PCI_ERS_RESULT_DISCONNECT;
	415	+ }
	416	+
	417	+ st = rsxx_eeh_frozen(dev);
	418	+ if (st) {
	419	+ dev_err(&dev->dev, "Slot reset setup failed\n");
	420	+ rsxx_eeh_failure(dev);
	421	+ return PCI_ERS_RESULT_DISCONNECT;
	422	+ }
	423	+
	424	+ return PCI_ERS_RESULT_NEED_RESET;
	425	+}
	426	+
	427	+static pci_ers_result_t rsxx_slot_reset(struct pci_dev *dev)
	428	+{
	429	+ struct rsxx_cardinfo *card = pci_get_drvdata(dev);
	430	+ unsigned long flags;
	431	+ int i;
	432	+ int st;
	433	+
	434	+ dev_warn(&dev->dev,
	435	+ "IBM FlashSystem PCI: recovering from slot reset.\n");
	436	+
	437	+ st = pci_enable_device(dev);
	438	+ if (st)
	439	+ goto failed_hw_setup;
	440	+
	441	+ pci_set_master(dev);
	442	+
	443	+ st = rsxx_eeh_fifo_flush_poll(card);
	444	+ if (st)
	445	+ goto failed_hw_setup;
	446	+
	447	+ rsxx_dma_queue_reset(card);
	448	+
	449	+ for (i = 0; i < card->n_targets; i++) {
	450	+ st = rsxx_hw_buffers_init(dev, &card->ctrl[i]);
	451	+ if (st)
	452	+ goto failed_hw_buffers_init;
	453	+ }
	454	+
	455	+ if (card->config_valid)
	456	+ rsxx_dma_configure(card);
	457	+
	458	+ /* Clears the ISR register from spurious interrupts */
	459	+ st = ioread32(card->regmap + ISR);
	460	+
	461	+ card->eeh_state = 0;
	462	+
	463	+ st = rsxx_eeh_remap_dmas(card);
	464	+ if (st)
	465	+ goto failed_remap_dmas;
	466	+
	467	+ spin_lock_irqsave(&card->irq_lock, flags);
	468	+ if (card->n_targets & RSXX_MAX_TARGETS)
	469	+ rsxx_enable_ier_and_isr(card, CR_INTR_ALL_G);
	470	+ else
	471	+ rsxx_enable_ier_and_isr(card, CR_INTR_ALL_C);
	472	+ spin_unlock_irqrestore(&card->irq_lock, flags);
	473	+
	474	+ rsxx_kick_creg_queue(card);
	475	+
	476	+ for (i = 0; i < card->n_targets; i++) {
	477	+ spin_lock(&card->ctrl[i].queue_lock);
	478	+ if (list_empty(&card->ctrl[i].queue)) {
	479	+ spin_unlock(&card->ctrl[i].queue_lock);
	480	+ continue;
	481	+ }
	482	+ spin_unlock(&card->ctrl[i].queue_lock);
	483	+
	484	+ queue_work(card->ctrl[i].issue_wq,
	485	+ &card->ctrl[i].issue_dma_work);
	486	+ }
	487	+
	488	+ dev_info(&dev->dev, "IBM FlashSystem PCI: recovery complete.\n");
	489	+
	490	+ return PCI_ERS_RESULT_RECOVERED;
	491	+
	492	+failed_hw_buffers_init:
	493	+failed_remap_dmas:
	494	+ for (i = 0; i < card->n_targets; i++) {
	495	+ if (card->ctrl[i].status.buf)
	496	+ pci_free_consistent(card->dev,
	497	+ STATUS_BUFFER_SIZE8,
	498	+ card->ctrl[i].status.buf,
	499	+ card->ctrl[i].status.dma_addr);
	500	+ if (card->ctrl[i].cmd.buf)
	501	+ pci_free_consistent(card->dev,
	502	+ COMMAND_BUFFER_SIZE8,
	503	+ card->ctrl[i].cmd.buf,
	504	+ card->ctrl[i].cmd.dma_addr);
	505	+ }
	506	+failed_hw_setup:
	507	+ rsxx_eeh_failure(dev);
	508	+ return PCI_ERS_RESULT_DISCONNECT;
	509	+
	510	+}
	511	+
307	512	/----------------- Driver Initialization & Setup -------------------/
308	513	/* Returns: 0 if the driver is compatible with the device
309	514	-1 if the driver is NOT compatible with the device */
@@ -383,6 +588,7 @@ static int rsxx_pci_probe(struct pci_dev *dev, · 73 unmodified lines
383	588
384	589	spin_lock_init(&card->irq_lock);
385	590	card->halt = 0;
	591	+ card->eeh_state = 0;
386	592
387	593	spin_lock_irq(&card->irq_lock);
388	594	rsxx_disable_ier_and_isr(card, CR_INTR_ALL);
@@ -538,9 +744,6 @@ static void rsxx_pci_remove(struct pci_dev *dev) · 149 unmodified lines
538	744	rsxx_disable_ier_and_isr(card, CR_INTR_EVENT);
539	745	spin_unlock_irqrestore(&card->irq_lock, flags);
540	746
541		− /* Prevent work_structs from re-queuing themselves. */
542		− card->halt = 1;
543		−
544	747	cancel_work_sync(&card->event_work);
545	748
546	749	rsxx_destroy_dev(card);
@@ -549,6 +752,10 @@ static void rsxx_pci_remove(struct pci_dev *dev) · 2 unmodified lines
549	752	spin_lock_irqsave(&card->irq_lock, flags);
550	753	rsxx_disable_ier_and_isr(card, CR_INTR_ALL);
551	754	spin_unlock_irqrestore(&card->irq_lock, flags);
	755	+
	756	+ /* Prevent work_structs from re-queuing themselves. */
	757	+ card->halt = 1;
	758	+
552	759	free_irq(dev->irq, card);
553	760
554	761	if (!force_legacy)
@@ -592,11 +799,14 @@ static void rsxx_pci_shutdown(struct pci_dev *dev) · 37 unmodified lines
592	799	card_shutdown(card);
593	800	}
594	801
	802	+static const struct pci_error_handlers rsxx_err_handler = {
	803	+ .error_detected = rsxx_error_detected,
	804	+ .slot_reset = rsxx_slot_reset,
	805	+};
	806	+
595	807	static DEFINE_PCI_DEVICE_TABLE(rsxx_pci_ids) = {
596		− {PCI_DEVICE(PCI_VENDOR_ID_TMS_IBM, PCI_DEVICE_ID_RS70_FLASH)},
597		− {PCI_DEVICE(PCI_VENDOR_ID_TMS_IBM, PCI_DEVICE_ID_RS70D_FLASH)},
598		− {PCI_DEVICE(PCI_VENDOR_ID_TMS_IBM, PCI_DEVICE_ID_RS80_FLASH)},
599		− {PCI_DEVICE(PCI_VENDOR_ID_TMS_IBM, PCI_DEVICE_ID_RS81_FLASH)},
	808	+ {PCI_DEVICE(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_FS70_FLASH)},
	809	+ {PCI_DEVICE(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_FS80_FLASH)},
600	810	{0,},
601	811	};
602	812
@@ -609,6 +819,7 @@ static struct pci_driver rsxx_pci_driver = { · 6 unmodified lines
609	819	.remove = rsxx_pci_remove,
610	820	.suspend = rsxx_pci_suspend,
611	821	.shutdown = rsxx_pci_shutdown,
	822	+ .err_handler = &rsxx_err_handler,
612	823	};
613	824
614	825	static int __init rsxx_core_init(void)

drivers/block/rsxx/cregs.c+72−40

@@ -58,7 +58,7 @@ static struct kmem_cache *creg_cmd_pool; · 57 unmodified lines
58	58	#error Unknown endianess!!! Aborting...
59	59	#endif
60	60
61		−static void copy_to_creg_data(struct rsxx_cardinfo *card,
	61	+static int copy_to_creg_data(struct rsxx_cardinfo *card,
62	62	int cnt8,
63	63	void *buf,
64	64	unsigned int stream)
@@ -66,6 +66,9 @@ static void copy_to_creg_data(struct rsxx_cardinfo *card, · 1 unmodified line
66	66	int i = 0;
67	67	u32 *data = buf;
68	68
	69	+ if (unlikely(card->eeh_state))
	70	+ return -EIO;
	71	+
69	72	for (i = 0; cnt8 > 0; i++, cnt8 -= 4) {
70	73	/*
71	74	* Firmware implementation makes it necessary to byte swap on
@@ -76,10 +79,12 @@ static void copy_to_creg_data(struct rsxx_cardinfo *card, · 4 unmodified lines
76	79	else
77	80	iowrite32(data[i], card->regmap + CREG_DATA(i));
78	81	}
	82	+
	83	+ return 0;
79	84	}
80	85
81	86
82		−static void copy_from_creg_data(struct rsxx_cardinfo *card,
	87	+static int copy_from_creg_data(struct rsxx_cardinfo *card,
83	88	int cnt8,
84	89	void *buf,
85	90	unsigned int stream)
@@ -87,6 +92,9 @@ static void copy_from_creg_data(struct rsxx_cardinfo *card, · 1 unmodified line
87	92	int i = 0;
88	93	u32 *data = buf;
89	94
	95	+ if (unlikely(card->eeh_state))
	96	+ return -EIO;
	97	+
90	98	for (i = 0; cnt8 > 0; i++, cnt8 -= 4) {
91	99	/*
92	100	* Firmware implementation makes it necessary to byte swap on
@@ -97,41 +105,31 @@ static void copy_from_creg_data(struct rsxx_cardinfo *card, · 4 unmodified lines
97	105	else
98	106	data[i] = ioread32(card->regmap + CREG_DATA(i));
99	107	}
100		−}
101		−
102		−static struct creg_cmd pop_active_cmd(struct rsxx_cardinfo card)
103		−{
104		− struct creg_cmd *cmd;
105	108
106		− /*
107		− * Spin lock is needed because this can be called in atomic/interrupt
108		− * context.
109		− */
110		− spin_lock_bh(&card->creg_ctrl.lock);
111		− cmd = card->creg_ctrl.active_cmd;
112		− card->creg_ctrl.active_cmd = NULL;
113		− spin_unlock_bh(&card->creg_ctrl.lock);
114		−
115		− return cmd;
	109	+ return 0;
116	110	}
117	111
118	112	static void creg_issue_cmd(struct rsxx_cardinfo card, struct creg_cmd cmd)
119	113	{
	114	+ int st;
	115	+
	116	+ if (unlikely(card->eeh_state))
	117	+ return;
	118	+
120	119	iowrite32(cmd->addr, card->regmap + CREG_ADD);
121	120	iowrite32(cmd->cnt8, card->regmap + CREG_CNT);
122	121
123	122	if (cmd->op == CREG_OP_WRITE) {
124		− if (cmd->buf)
125		− copy_to_creg_data(card, cmd->cnt8,
126		− cmd->buf, cmd->stream);
	123	+ if (cmd->buf) {
	124	+ st = copy_to_creg_data(card, cmd->cnt8,
	125	+ cmd->buf, cmd->stream);
	126	+ if (st)
	127	+ return;
	128	+ }
127	129	}
128	130
129		− /*
130		− * Data copy must complete before initiating the command. This is
131		− * needed for weakly ordered processors (i.e. PowerPC), so that all
132		− * neccessary registers are written before we kick the hardware.
133		− */
134		− wmb();
	131	+ if (unlikely(card->eeh_state))
	132	+ return;
135	133
136	134	/* Setting the valid bit will kick off the command. */
137	135	iowrite32(cmd->op, card->regmap + CREG_CMD);
@@ -196,11 +194,11 @@ static int creg_queue_cmd(struct rsxx_cardinfo *card, · 58 unmodified lines
196	194	cmd->cb_private = cb_private;
197	195	cmd->status = 0;
198	196
199		− spin_lock(&card->creg_ctrl.lock);
	197	+ spin_lock_bh(&card->creg_ctrl.lock);
200	198	list_add_tail(&cmd->list, &card->creg_ctrl.queue);
201	199	card->creg_ctrl.q_depth++;
202	200	creg_kick_queue(card);
203		− spin_unlock(&card->creg_ctrl.lock);
	201	+ spin_unlock_bh(&card->creg_ctrl.lock);
204	202
205	203	return 0;
206	204	}
@@ -210,7 +208,11 @@ static void creg_cmd_timed_out(unsigned long data) · 3 unmodified lines
210	208	struct rsxx_cardinfo card = (struct rsxx_cardinfo ) data;
211	209	struct creg_cmd *cmd;
212	210
213		− cmd = pop_active_cmd(card);
	211	+ spin_lock(&card->creg_ctrl.lock);
	212	+ cmd = card->creg_ctrl.active_cmd;
	213	+ card->creg_ctrl.active_cmd = NULL;
	214	+ spin_unlock(&card->creg_ctrl.lock);
	215	+
214	216	if (cmd == NULL) {
215	217	card->creg_ctrl.creg_stats.creg_timeout++;
216	218	dev_warn(CARD_TO_DEV(card),
@@ -247,7 +249,11 @@ static void creg_cmd_done(struct work_struct *work) · 30 unmodified lines
247	249	if (del_timer_sync(&card->creg_ctrl.cmd_timer) == 0)
248	250	card->creg_ctrl.creg_stats.failed_cancel_timer++;
249	251
250		− cmd = pop_active_cmd(card);
	252	+ spin_lock_bh(&card->creg_ctrl.lock);
	253	+ cmd = card->creg_ctrl.active_cmd;
	254	+ card->creg_ctrl.active_cmd = NULL;
	255	+ spin_unlock_bh(&card->creg_ctrl.lock);
	256	+
251	257	if (cmd == NULL) {
252	258	dev_err(CARD_TO_DEV(card),
253	259	"Spurious creg interrupt!\n");
@@ -287,7 +293,7 @@ static void creg_cmd_done(struct work_struct *work) · 33 unmodified lines
287	293	goto creg_done;
288	294	}
289	295
290		− copy_from_creg_data(card, cnt8, cmd->buf, cmd->stream);
	296	+ st = copy_from_creg_data(card, cnt8, cmd->buf, cmd->stream);
291	297	}
292	298
293	299	creg_done:
@@ -296,10 +302,10 @@ creg_done: · 2 unmodified lines
296	302
297	303	kmem_cache_free(creg_cmd_pool, cmd);
298	304
299		− spin_lock(&card->creg_ctrl.lock);
	305	+ spin_lock_bh(&card->creg_ctrl.lock);
300	306	card->creg_ctrl.active = 0;
301	307	creg_kick_queue(card);
302		− spin_unlock(&card->creg_ctrl.lock);
	308	+ spin_unlock_bh(&card->creg_ctrl.lock);
303	309	}
304	310
305	311	static void creg_reset(struct rsxx_cardinfo *card)
@@ -324,7 +330,7 @@ static void creg_reset(struct rsxx_cardinfo *card) · 18 unmodified lines
324	330	"Resetting creg interface for recovery\n");
325	331
326	332	/* Cancel outstanding commands */
327		− spin_lock(&card->creg_ctrl.lock);
	333	+ spin_lock_bh(&card->creg_ctrl.lock);
328	334	list_for_each_entry_safe(cmd, tmp, &card->creg_ctrl.queue, list) {
329	335	list_del(&cmd->list);
330	336	card->creg_ctrl.q_depth--;
@@ -345,7 +351,7 @@ static void creg_reset(struct rsxx_cardinfo *card) · 14 unmodified lines
345	351
346	352	card->creg_ctrl.active = 0;
347	353	}
348		− spin_unlock(&card->creg_ctrl.lock);
	354	+ spin_unlock_bh(&card->creg_ctrl.lock);
349	355
350	356	card->creg_ctrl.reset = 0;
351	357	spin_lock_irqsave(&card->irq_lock, flags);
@@ -399,12 +405,12 @@ static int __issue_creg_rw(struct rsxx_cardinfo *card, · 47 unmodified lines
399	405	return st;
400	406
401	407	/*
402		− * This timeout is neccessary for unresponsive hardware. The additional
	408	+ * This timeout is necessary for unresponsive hardware. The additional
403	409	* 20 seconds to used to guarantee that each cregs requests has time to
404	410	* complete.
405	411	*/
406		− timeout = msecs_to_jiffies((CREG_TIMEOUT_MSEC *
407		− card->creg_ctrl.q_depth) + 20000);
	412	+ timeout = msecs_to_jiffies(CREG_TIMEOUT_MSEC *
	413	+ card->creg_ctrl.q_depth + 20000);
408	414
409	415	/*
410	416	* The creg interface is guaranteed to complete. It has a timeout
@@ -690,6 +696,32 @@ int rsxx_reg_access(struct rsxx_cardinfo *card, · 279 unmodified lines
690	696	return 0;
691	697	}
692	698
	699	+void rsxx_eeh_save_issued_creg(struct rsxx_cardinfo *card)
	700	+{
	701	+ struct creg_cmd *cmd = NULL;
	702	+
	703	+ cmd = card->creg_ctrl.active_cmd;
	704	+ card->creg_ctrl.active_cmd = NULL;
	705	+
	706	+ if (cmd) {
	707	+ del_timer_sync(&card->creg_ctrl.cmd_timer);
	708	+
	709	+ spin_lock_bh(&card->creg_ctrl.lock);
	710	+ list_add(&cmd->list, &card->creg_ctrl.queue);
	711	+ card->creg_ctrl.q_depth++;
	712	+ card->creg_ctrl.active = 0;
	713	+ spin_unlock_bh(&card->creg_ctrl.lock);
	714	+ }
	715	+}
	716	+
	717	+void rsxx_kick_creg_queue(struct rsxx_cardinfo *card)
	718	+{
	719	+ spin_lock_bh(&card->creg_ctrl.lock);
	720	+ if (!list_empty(&card->creg_ctrl.queue))
	721	+ creg_kick_queue(card);
	722	+ spin_unlock_bh(&card->creg_ctrl.lock);
	723	+}
	724	+
693	725	/------------ Initialization & Setup --------------/
694	726	int rsxx_creg_setup(struct rsxx_cardinfo *card)
695	727	{
@@ -712,7 +744,7 @@ void rsxx_creg_destroy(struct rsxx_cardinfo *card) · 16 unmodified lines
712	744	int cnt = 0;
713	745
714	746	/* Cancel outstanding commands */
715		− spin_lock(&card->creg_ctrl.lock);
	747	+ spin_lock_bh(&card->creg_ctrl.lock);
716	748	list_for_each_entry_safe(cmd, tmp, &card->creg_ctrl.queue, list) {
717	749	list_del(&cmd->list);
718	750	if (cmd->cb)
@@ -737,7 +769,7 @@ void rsxx_creg_destroy(struct rsxx_cardinfo *card) · 18 unmodified lines
737	769	"Canceled active creg command\n");
738	770	kmem_cache_free(creg_cmd_pool, cmd);
739	771	}
740		− spin_unlock(&card->creg_ctrl.lock);
	772	+ spin_unlock_bh(&card->creg_ctrl.lock);
741	773
742	774	cancel_work_sync(&card->creg_ctrl.done_work);
743	775	}

drivers/block/rsxx/dma.c+168−71

@@ -28,7 +28,7 @@ · 27 unmodified lines
28	28	struct rsxx_dma {
29	29	struct list_head list;
30	30	u8 cmd;
31		− unsigned int laddr; /* Logical address on the ramsan */
	31	+ unsigned int laddr; /* Logical address */
32	32	struct {
33	33	u32 off;
34	34	u32 cnt;
@@ -81,9 +81,6 @@ enum rsxx_hw_status { · 46 unmodified lines
81	81	HW_STATUS_FAULT = 0x08,
82	82	};
83	83
84		−#define STATUS_BUFFER_SIZE8 4096
85		−#define COMMAND_BUFFER_SIZE8 4096
86		−
87	84	static struct kmem_cache *rsxx_dma_pool;
88	85
89	86	struct dma_tracker {
@@ -122,7 +119,7 @@ static unsigned int rsxx_get_dma_tgt(struct rsxx_cardinfo *card, u64 addr8) · 32 unmodified lines
122	119	return tgt;
123	120	}
124	121
125		−static void rsxx_dma_queue_reset(struct rsxx_cardinfo *card)
	122	+void rsxx_dma_queue_reset(struct rsxx_cardinfo *card)
126	123	{
127	124	/* Reset all DMA Command/Status Queues */
128	125	iowrite32(DMA_QUEUE_RESET, card->regmap + RESET);
@@ -210,7 +207,8 @@ static void dma_intr_coal_auto_tune(struct rsxx_cardinfo *card) · 81 unmodified lines
210	207	u32 q_depth = 0;
211	208	u32 intr_coal;
212	209
213		− if (card->config.data.intr_coal.mode != RSXX_INTR_COAL_AUTO_TUNE)
	210	+ if (card->config.data.intr_coal.mode != RSXX_INTR_COAL_AUTO_TUNE \|\|
	211	+ unlikely(card->eeh_state))
214	212	return;
215	213
216	214	for (i = 0; i < card->n_targets; i++)
@@ -223,31 +221,26 @@ static void dma_intr_coal_auto_tune(struct rsxx_cardinfo *card) · 6 unmodified lines
223	221	}
224	222
225	223	/----------------- RSXX DMA Handling -------------------/
226		−static void rsxx_complete_dma(struct rsxx_cardinfo *card,
	224	+static void rsxx_complete_dma(struct rsxx_dma_ctrl *ctrl,
227	225	struct rsxx_dma *dma,
228	226	unsigned int status)
229	227	{
230	228	if (status & DMA_SW_ERR)
231		− printk_ratelimited(KERN_ERR
232		− "SW Error in DMA(cmd x%02x, laddr x%08x)\n",
233		− dma->cmd, dma->laddr);
	229	+ ctrl->stats.dma_sw_err++;
234	230	if (status & DMA_HW_FAULT)
235		− printk_ratelimited(KERN_ERR
236		− "HW Fault in DMA(cmd x%02x, laddr x%08x)\n",
237		− dma->cmd, dma->laddr);
	231	+ ctrl->stats.dma_hw_fault++;
238	232	if (status & DMA_CANCELLED)
239		− printk_ratelimited(KERN_ERR
240		− "DMA Cancelled(cmd x%02x, laddr x%08x)\n",
241		− dma->cmd, dma->laddr);
	233	+ ctrl->stats.dma_cancelled++;
242	234
243	235	if (dma->dma_addr)
244		− pci_unmap_page(card->dev, dma->dma_addr, get_dma_size(dma),
	236	+ pci_unmap_page(ctrl->card->dev, dma->dma_addr,
	237	+ get_dma_size(dma),
245	238	dma->cmd == HW_CMD_BLK_WRITE ?
246	239	PCI_DMA_TODEVICE :
247	240	PCI_DMA_FROMDEVICE);
248	241
249	242	if (dma->cb)
250		− dma->cb(card, dma->cb_data, status ? 1 : 0);
	243	+ dma->cb(ctrl->card, dma->cb_data, status ? 1 : 0);
251	244
252	245	kmem_cache_free(rsxx_dma_pool, dma);
253	246	}
@@ -330,14 +323,15 @@ static void rsxx_handle_dma_error(struct rsxx_dma_ctrl *ctrl, · 76 unmodified lines
330	323	if (requeue_cmd)
331	324	rsxx_requeue_dma(ctrl, dma);
332	325	else
333		− rsxx_complete_dma(ctrl->card, dma, status);
	326	+ rsxx_complete_dma(ctrl, dma, status);
334	327	}
335	328
336	329	static void dma_engine_stalled(unsigned long data)
337	330	{
338	331	struct rsxx_dma_ctrl ctrl = (struct rsxx_dma_ctrl )data;
339	332
340		− if (atomic_read(&ctrl->stats.hw_q_depth) == 0)
	333	+ if (atomic_read(&ctrl->stats.hw_q_depth) == 0 \|\|
	334	+ unlikely(ctrl->card->eeh_state))
341	335	return;
342	336
343	337	if (ctrl->cmd.idx != ioread32(ctrl->regmap + SW_CMD_IDX)) {
@@ -369,7 +363,8 @@ static void rsxx_issue_dmas(struct work_struct *work) · 25 unmodified lines
369	363	ctrl = container_of(work, struct rsxx_dma_ctrl, issue_dma_work);
370	364	hw_cmd_buf = ctrl->cmd.buf;
371	365
372		− if (unlikely(ctrl->card->halt))
	366	+ if (unlikely(ctrl->card->halt) \|\|
	367	+ unlikely(ctrl->card->eeh_state))
373	368	return;
374	369
375	370	while (1) {
@@ -397,7 +392,7 @@ static void rsxx_issue_dmas(struct work_struct *work) · 21 unmodified lines
397	392	*/
398	393	if (unlikely(ctrl->card->dma_fault)) {
399	394	push_tracker(ctrl->trackers, tag);
400		− rsxx_complete_dma(ctrl->card, dma, DMA_CANCELLED);
	395	+ rsxx_complete_dma(ctrl, dma, DMA_CANCELLED);
401	396	continue;
402	397	}
403	398
@@ -432,19 +427,15 @@ static void rsxx_issue_dmas(struct work_struct *work) · 28 unmodified lines
432	427
433	428	/* Let HW know we've queued commands. */
434	429	if (cmds_pending) {
435		− /*
436		− * We must guarantee that the CPU writes to 'ctrl->cmd.buf'
437		− * (which is in PCI-consistent system-memory) from the loop
438		− * above make it into the coherency domain before the
439		− * following PIO "trigger" updating the cmd.idx. A WMB is
440		− * sufficient. We need not explicitly CPU cache-flush since
441		− * the memory is a PCI-consistent (ie; coherent) mapping.
442		− */
443		− wmb();
444		−
445	430	atomic_add(cmds_pending, &ctrl->stats.hw_q_depth);
446	431	mod_timer(&ctrl->activity_timer,
447	432	jiffies + DMA_ACTIVITY_TIMEOUT);
	433	+
	434	+ if (unlikely(ctrl->card->eeh_state)) {
	435	+ del_timer_sync(&ctrl->activity_timer);
	436	+ return;
	437	+ }
	438	+
448	439	iowrite32(ctrl->cmd.idx, ctrl->regmap + SW_CMD_IDX);
449	440	}
450	441	}
@@ -463,7 +454,8 @@ static void rsxx_dma_done(struct work_struct *work) · 12 unmodified lines
463	454	hw_st_buf = ctrl->status.buf;
464	455
465	456	if (unlikely(ctrl->card->halt) \|\|
466		− unlikely(ctrl->card->dma_fault))
	457	+ unlikely(ctrl->card->dma_fault) \|\|
	458	+ unlikely(ctrl->card->eeh_state))
467	459	return;
468	460
469	461	count = le16_to_cpu(hw_st_buf[ctrl->status.idx].count);
@@ -508,7 +500,7 @@ static void rsxx_dma_done(struct work_struct *work) · 38 unmodified lines
508	500	if (status)
509	501	rsxx_handle_dma_error(ctrl, dma, status);
510	502	else
511		− rsxx_complete_dma(ctrl->card, dma, 0);
	503	+ rsxx_complete_dma(ctrl, dma, 0);
512	504
513	505	push_tracker(ctrl->trackers, tag);
514	506
@@ -727,20 +719,54 @@ bvec_err: · 212 unmodified lines
727	719
728	720
729	721	/----------------- DMA Engine Initialization & Setup -------------------/
	722	+int rsxx_hw_buffers_init(struct pci_dev dev, struct rsxx_dma_ctrl ctrl)
	723	+{
	724	+ ctrl->status.buf = pci_alloc_consistent(dev, STATUS_BUFFER_SIZE8,
	725	+ &ctrl->status.dma_addr);
	726	+ ctrl->cmd.buf = pci_alloc_consistent(dev, COMMAND_BUFFER_SIZE8,
	727	+ &ctrl->cmd.dma_addr);
	728	+ if (ctrl->status.buf == NULL \|\| ctrl->cmd.buf == NULL)
	729	+ return -ENOMEM;
	730	+
	731	+ memset(ctrl->status.buf, 0xac, STATUS_BUFFER_SIZE8);
	732	+ iowrite32(lower_32_bits(ctrl->status.dma_addr),
	733	+ ctrl->regmap + SB_ADD_LO);
	734	+ iowrite32(upper_32_bits(ctrl->status.dma_addr),
	735	+ ctrl->regmap + SB_ADD_HI);
	736	+
	737	+ memset(ctrl->cmd.buf, 0x83, COMMAND_BUFFER_SIZE8);
	738	+ iowrite32(lower_32_bits(ctrl->cmd.dma_addr), ctrl->regmap + CB_ADD_LO);
	739	+ iowrite32(upper_32_bits(ctrl->cmd.dma_addr), ctrl->regmap + CB_ADD_HI);
	740	+
	741	+ ctrl->status.idx = ioread32(ctrl->regmap + HW_STATUS_CNT);
	742	+ if (ctrl->status.idx > RSXX_MAX_OUTSTANDING_CMDS) {
	743	+ dev_crit(&dev->dev, "Failed reading status cnt x%x\n",
	744	+ ctrl->status.idx);
	745	+ return -EINVAL;
	746	+ }
	747	+ iowrite32(ctrl->status.idx, ctrl->regmap + HW_STATUS_CNT);
	748	+ iowrite32(ctrl->status.idx, ctrl->regmap + SW_STATUS_CNT);
	749	+
	750	+ ctrl->cmd.idx = ioread32(ctrl->regmap + HW_CMD_IDX);
	751	+ if (ctrl->cmd.idx > RSXX_MAX_OUTSTANDING_CMDS) {
	752	+ dev_crit(&dev->dev, "Failed reading cmd cnt x%x\n",
	753	+ ctrl->status.idx);
	754	+ return -EINVAL;
	755	+ }
	756	+ iowrite32(ctrl->cmd.idx, ctrl->regmap + HW_CMD_IDX);
	757	+ iowrite32(ctrl->cmd.idx, ctrl->regmap + SW_CMD_IDX);
	758	+
	759	+ return 0;
	760	+}
	761	+
730	762	static int rsxx_dma_ctrl_init(struct pci_dev *dev,
731	763	struct rsxx_dma_ctrl *ctrl)
732	764	{
733	765	int i;
	766	+ int st;
734	767
735	768	memset(&ctrl->stats, 0, sizeof(ctrl->stats));
736	769
737		− ctrl->status.buf = pci_alloc_consistent(dev, STATUS_BUFFER_SIZE8,
738		− &ctrl->status.dma_addr);
739		− ctrl->cmd.buf = pci_alloc_consistent(dev, COMMAND_BUFFER_SIZE8,
740		− &ctrl->cmd.dma_addr);
741		− if (ctrl->status.buf == NULL \|\| ctrl->cmd.buf == NULL)
742		− return -ENOMEM;
743		−
744	770	ctrl->trackers = vmalloc(DMA_TRACKER_LIST_SIZE8);
745	771	if (!ctrl->trackers)
746	772	return -ENOMEM;
@@ -770,35 +796,9 @@ static int rsxx_dma_ctrl_init(struct pci_dev *dev, · 23 unmodified lines
770	796	INIT_WORK(&ctrl->issue_dma_work, rsxx_issue_dmas);
771	797	INIT_WORK(&ctrl->dma_done_work, rsxx_dma_done);
772	798
773		− memset(ctrl->status.buf, 0xac, STATUS_BUFFER_SIZE8);
774		− iowrite32(lower_32_bits(ctrl->status.dma_addr),
775		− ctrl->regmap + SB_ADD_LO);
776		− iowrite32(upper_32_bits(ctrl->status.dma_addr),
777		− ctrl->regmap + SB_ADD_HI);
778		−
779		− memset(ctrl->cmd.buf, 0x83, COMMAND_BUFFER_SIZE8);
780		− iowrite32(lower_32_bits(ctrl->cmd.dma_addr), ctrl->regmap + CB_ADD_LO);
781		− iowrite32(upper_32_bits(ctrl->cmd.dma_addr), ctrl->regmap + CB_ADD_HI);
782		−
783		− ctrl->status.idx = ioread32(ctrl->regmap + HW_STATUS_CNT);
784		− if (ctrl->status.idx > RSXX_MAX_OUTSTANDING_CMDS) {
785		− dev_crit(&dev->dev, "Failed reading status cnt x%x\n",
786		− ctrl->status.idx);
787		− return -EINVAL;
788		− }
789		− iowrite32(ctrl->status.idx, ctrl->regmap + HW_STATUS_CNT);
790		− iowrite32(ctrl->status.idx, ctrl->regmap + SW_STATUS_CNT);
791		−
792		− ctrl->cmd.idx = ioread32(ctrl->regmap + HW_CMD_IDX);
793		− if (ctrl->cmd.idx > RSXX_MAX_OUTSTANDING_CMDS) {
794		− dev_crit(&dev->dev, "Failed reading cmd cnt x%x\n",
795		− ctrl->status.idx);
796		− return -EINVAL;
797		− }
798		− iowrite32(ctrl->cmd.idx, ctrl->regmap + HW_CMD_IDX);
799		− iowrite32(ctrl->cmd.idx, ctrl->regmap + SW_CMD_IDX);
800		−
801		− wmb();
	799	+ st = rsxx_hw_buffers_init(dev, ctrl);
	800	+ if (st)
	801	+ return st;
802	802
803	803	return 0;
804	804	}
@@ -834,7 +834,7 @@ static int rsxx_dma_stripe_setup(struct rsxx_cardinfo *card, · 29 unmodified lines
834	834	return 0;
835	835	}
836	836
837		−static int rsxx_dma_configure(struct rsxx_cardinfo *card)
	837	+int rsxx_dma_configure(struct rsxx_cardinfo *card)
838	838	{
839	839	u32 intr_coal;
840	840
@@ -980,6 +980,103 @@ void rsxx_dma_destroy(struct rsxx_cardinfo *card) · 139 unmodified lines
980	980	}
981	981	}
982	982
	983	+int rsxx_eeh_save_issued_dmas(struct rsxx_cardinfo *card)
	984	+{
	985	+ int i;
	986	+ int j;
	987	+ int cnt;
	988	+ struct rsxx_dma *dma;
	989	+ struct list_head *issued_dmas;
	990	+
	991	+ issued_dmas = kzalloc(sizeof(issued_dmas) card->n_targets,
	992	+ GFP_KERNEL);
	993	+ if (!issued_dmas)
	994	+ return -ENOMEM;
	995	+
	996	+ for (i = 0; i < card->n_targets; i++) {
	997	+ INIT_LIST_HEAD(&issued_dmas[i]);
	998	+ cnt = 0;
	999	+ for (j = 0; j < RSXX_MAX_OUTSTANDING_CMDS; j++) {
	1000	+ dma = get_tracker_dma(card->ctrl[i].trackers, j);
	1001	+ if (dma == NULL)
	1002	+ continue;
	1003	+
	1004	+ if (dma->cmd == HW_CMD_BLK_WRITE)
	1005	+ card->ctrl[i].stats.writes_issued--;
	1006	+ else if (dma->cmd == HW_CMD_BLK_DISCARD)
	1007	+ card->ctrl[i].stats.discards_issued--;
	1008	+ else
	1009	+ card->ctrl[i].stats.reads_issued--;
	1010	+
	1011	+ list_add_tail(&dma->list, &issued_dmas[i]);
	1012	+ push_tracker(card->ctrl[i].trackers, j);
	1013	+ cnt++;
	1014	+ }
	1015	+
	1016	+ spin_lock(&card->ctrl[i].queue_lock);
	1017	+ list_splice(&issued_dmas[i], &card->ctrl[i].queue);
	1018	+
	1019	+ atomic_sub(cnt, &card->ctrl[i].stats.hw_q_depth);
	1020	+ card->ctrl[i].stats.sw_q_depth += cnt;
	1021	+ card->ctrl[i].e_cnt = 0;
	1022	+
	1023	+ list_for_each_entry(dma, &card->ctrl[i].queue, list) {
	1024	+ if (dma->dma_addr)
	1025	+ pci_unmap_page(card->dev, dma->dma_addr,
	1026	+ get_dma_size(dma),
	1027	+ dma->cmd == HW_CMD_BLK_WRITE ?
	1028	+ PCI_DMA_TODEVICE :
	1029	+ PCI_DMA_FROMDEVICE);
	1030	+ }
	1031	+ spin_unlock(&card->ctrl[i].queue_lock);
	1032	+ }
	1033	+
	1034	+ kfree(issued_dmas);
	1035	+
	1036	+ return 0;
	1037	+}
	1038	+
	1039	+void rsxx_eeh_cancel_dmas(struct rsxx_cardinfo *card)
	1040	+{
	1041	+ struct rsxx_dma *dma;
	1042	+ struct rsxx_dma *tmp;
	1043	+ int i;
	1044	+
	1045	+ for (i = 0; i < card->n_targets; i++) {
	1046	+ spin_lock(&card->ctrl[i].queue_lock);
	1047	+ list_for_each_entry_safe(dma, tmp, &card->ctrl[i].queue, list) {
	1048	+ list_del(&dma->list);
	1049	+
	1050	+ rsxx_complete_dma(&card->ctrl[i], dma, DMA_CANCELLED);
	1051	+ }
	1052	+ spin_unlock(&card->ctrl[i].queue_lock);
	1053	+ }
	1054	+}
	1055	+
	1056	+int rsxx_eeh_remap_dmas(struct rsxx_cardinfo *card)
	1057	+{
	1058	+ struct rsxx_dma *dma;
	1059	+ int i;
	1060	+
	1061	+ for (i = 0; i < card->n_targets; i++) {
	1062	+ spin_lock(&card->ctrl[i].queue_lock);
	1063	+ list_for_each_entry(dma, &card->ctrl[i].queue, list) {
	1064	+ dma->dma_addr = pci_map_page(card->dev, dma->page,
	1065	+ dma->pg_off, get_dma_size(dma),
	1066	+ dma->cmd == HW_CMD_BLK_WRITE ?
	1067	+ PCI_DMA_TODEVICE :
	1068	+ PCI_DMA_FROMDEVICE);
	1069	+ if (!dma->dma_addr) {
	1070	+ spin_unlock(&card->ctrl[i].queue_lock);
	1071	+ kmem_cache_free(rsxx_dma_pool, dma);
	1072	+ return -ENOMEM;
	1073	+ }
	1074	+ }
	1075	+ spin_unlock(&card->ctrl[i].queue_lock);
	1076	+ }
	1077	+
	1078	+ return 0;
	1079	+}
983	1080
984	1081	int rsxx_dma_init(void)
985	1082	{

drivers/block/rsxx/rsxx.h+4−2

@@ -27,15 +27,17 @@ · 26 unmodified lines
27	27
28	28	/----------------- IOCTL Definitions -------------------/
29	29
	30	+#define RSXX_MAX_DATA 8
	31	+
30	32	struct rsxx_reg_access {
31	33	__u32 addr;
32	34	__u32 cnt;
33	35	__u32 stat;
34	36	__u32 stream;
35		− __u32 data[8];
	37	+ __u32 data[RSXX_MAX_DATA];
36	38	};
37	39
38		−#define RSXX_MAX_REG_CNT (8 * (sizeof(__u32)))
	40	+#define RSXX_MAX_REG_CNT (RSXX_MAX_DATA * (sizeof(__u32)))
39	41
40	42	#define RSXX_IOC_MAGIC 'r'
41	43

drivers/block/rsxx/rsxx_cfg.h+1−1

@@ -58,7 +58,7 @@ struct rsxx_card_cfg { · 57 unmodified lines
58	58	};
59	59
60	60	/* Vendor ID Values */
61		−#define RSXX_VENDOR_ID_TMS_IBM 0
	61	+#define RSXX_VENDOR_ID_IBM 0
62	62	#define RSXX_VENDOR_ID_DSI 1
63	63	#define RSXX_VENDOR_COUNT 2
64	64

drivers/block/rsxx/rsxx_priv.h+27−7

@@ -45,16 +45,13 @@ · 44 unmodified lines
45	45
46	46	struct proc_cmd;
47	47
48		−#define PCI_VENDOR_ID_TMS_IBM 0x15B6
49		−#define PCI_DEVICE_ID_RS70_FLASH 0x0019
50		−#define PCI_DEVICE_ID_RS70D_FLASH 0x001A
51		−#define PCI_DEVICE_ID_RS80_FLASH 0x001C
52		−#define PCI_DEVICE_ID_RS81_FLASH 0x001E
	48	+#define PCI_DEVICE_ID_FS70_FLASH 0x04A9
	49	+#define PCI_DEVICE_ID_FS80_FLASH 0x04AA
53	50
54	51	#define RS70_PCI_REV_SUPPORTED 4
55	52
56	53	#define DRIVER_NAME "rsxx"
57		−#define DRIVER_VERSION "3.7"
	54	+#define DRIVER_VERSION "4.0"
58	55
59	56	/* Block size is 4096 */
60	57	#define RSXX_HW_BLK_SHIFT 12
@@ -67,6 +64,9 @@ struct proc_cmd; · 6 unmodified lines
67	64	#define RSXX_MAX_OUTSTANDING_CMDS 255
68	65	#define RSXX_CS_IDX_MASK 0xff
69	66
	67	+#define STATUS_BUFFER_SIZE8 4096
	68	+#define COMMAND_BUFFER_SIZE8 4096
	69	+
70	70	#define RSXX_MAX_TARGETS 8
71	71
72	72	struct dma_tracker_list;
@@ -91,6 +91,9 @@ struct rsxx_dma_stats { · 18 unmodified lines
91	91	u32 discards_failed;
92	92	u32 done_rescheduled;
93	93	u32 issue_rescheduled;
	94	+ u32 dma_sw_err;
	95	+ u32 dma_hw_fault;
	96	+ u32 dma_cancelled;
94	97	u32 sw_q_depth; /* Number of DMAs on the SW queue. */
95	98	atomic_t hw_q_depth; /* Number of DMAs queued to HW. */
96	99	};
@@ -116,6 +119,7 @@ struct rsxx_dma_ctrl { · 19 unmodified lines
116	119	struct rsxx_cardinfo {
117	120	struct pci_dev *dev;
118	121	unsigned int halt;
	122	+ unsigned int eeh_state;
119	123
120	124	void __iomem *regmap;
121	125	spinlock_t irq_lock;
@@ -224,6 +228,7 @@ enum rsxx_pci_regmap { · 102 unmodified lines
224	228	PERF_RD512_HI = 0xac,
225	229	PERF_WR512_LO = 0xb0,
226	230	PERF_WR512_HI = 0xb4,
	231	+ PCI_RECONFIG = 0xb8,
227	232	};
228	233
229	234	enum rsxx_intr {
@@ -237,6 +242,8 @@ enum rsxx_intr { · 7 unmodified lines
237	242	CR_INTR_DMA5 = 0x00000080,
238	243	CR_INTR_DMA6 = 0x00000100,
239	244	CR_INTR_DMA7 = 0x00000200,
	245	+ CR_INTR_ALL_C = 0x0000003f,
	246	+ CR_INTR_ALL_G = 0x000003ff,
240	247	CR_INTR_DMA_ALL = 0x000003f5,
241	248	CR_INTR_ALL = 0xffffffff,
242	249	};
@@ -253,8 +260,14 @@ enum rsxx_pci_reset { · 10 unmodified lines
253	260	DMA_QUEUE_RESET = 0x00000001,
254	261	};
255	262
	263	+enum rsxx_hw_fifo_flush {
	264	+ RSXX_FLUSH_BUSY = 0x00000002,
	265	+ RSXX_FLUSH_TIMEOUT = 0x00000004,
	266	+};
	267	+
256	268	enum rsxx_pci_revision {
257	269	RSXX_DISCARD_SUPPORT = 2,
	270	+ RSXX_EEH_SUPPORT = 3,
258	271	};
259	272
260	273	enum rsxx_creg_cmd {
@@ -360,11 +373,17 @@ int rsxx_dma_setup(struct rsxx_cardinfo *card); · 99 unmodified lines
360	373	void rsxx_dma_destroy(struct rsxx_cardinfo *card);
361	374	int rsxx_dma_init(void);
362	375	void rsxx_dma_cleanup(void);
	376	+void rsxx_dma_queue_reset(struct rsxx_cardinfo *card);
	377	+int rsxx_dma_configure(struct rsxx_cardinfo *card);
363	378	int rsxx_dma_queue_bio(struct rsxx_cardinfo *card,
364	379	struct bio *bio,
365	380	atomic_t *n_dmas,
366	381	rsxx_dma_cb cb,
367	382	void *cb_data);
	383	+int rsxx_hw_buffers_init(struct pci_dev dev, struct rsxx_dma_ctrl ctrl);
	384	+int rsxx_eeh_save_issued_dmas(struct rsxx_cardinfo *card);
	385	+void rsxx_eeh_cancel_dmas(struct rsxx_cardinfo *card);
	386	+int rsxx_eeh_remap_dmas(struct rsxx_cardinfo *card);
368	387
369	388	/*** cregs.c ***/
370	389	int rsxx_creg_write(struct rsxx_cardinfo *card, u32 addr,
@@ -389,10 +408,11 @@ int rsxx_creg_setup(struct rsxx_cardinfo *card); · 18 unmodified lines
389	408	void rsxx_creg_destroy(struct rsxx_cardinfo *card);
390	409	int rsxx_creg_init(void);
391	410	void rsxx_creg_cleanup(void);
392		−
393	411	int rsxx_reg_access(struct rsxx_cardinfo *card,
394	412	struct rsxx_reg_access __user *ucmd,
395	413	int read);
	414	+void rsxx_eeh_save_issued_creg(struct rsxx_cardinfo *card);
	415	+void rsxx_kick_creg_queue(struct rsxx_cardinfo *card);
396	416
397	417
398	418

drivers/block/xen-blkback/blkback.c+39−29

@@ -164,7 +164,7 @@ static void make_response(struct xen_blkif *blkif, u64 id, · 163 unmodified lines
164	164
165	165	#define foreach_grant_safe(pos, n, rbtree, node) \
166	166	for ((pos) = container_of(rb_first((rbtree)), typeof(*(pos)), node), \
167		− (n) = rb_next(&(pos)->node); \
	167	+ (n) = (&(pos)->node != NULL) ? rb_next(&(pos)->node) : NULL; \
168	168	&(pos)->node != NULL; \
169	169	(pos) = container_of(n, typeof(*(pos)), node), \
170	170	(n) = (&(pos)->node != NULL) ? rb_next(&(pos)->node) : NULL)
@@ -381,8 +381,8 @@ irqreturn_t xen_blkif_be_int(int irq, void *dev_id) · 210 unmodified lines
381	381
382	382	static void print_stats(struct xen_blkif *blkif)
383	383	{
384		− pr_info("xen-blkback (%s): oo %3d \| rd %4d \| wr %4d \| f %4d"
385		− " \| ds %4d\n",
	384	+ pr_info("xen-blkback (%s): oo %3llu \| rd %4llu \| wr %4llu \| f %4llu"
	385	+ " \| ds %4llu\n",
386	386	current->comm, blkif->st_oo_req,
387	387	blkif->st_rd_req, blkif->st_wr_req,
388	388	blkif->st_f_req, blkif->st_ds_req);
@@ -442,7 +442,7 @@ int xen_blkif_schedule(void *arg) · 53 unmodified lines
442	442	}
443	443
444	444	struct seg_buf {
445		− unsigned long buf;
	445	+ unsigned int offset;
446	446	unsigned int nsec;
447	447	};
448	448	/*
@@ -621,30 +621,21 @@ static int xen_blkbk_map(struct blkif_request *req, · 172 unmodified lines
621	621	* If this is a new persistent grant
622	622	* save the handler
623	623	*/
624		− persistent_gnts[i]->handle = map[j].handle;
625		− persistent_gnts[i]->dev_bus_addr =
626		− map[j++].dev_bus_addr;
	624	+ persistent_gnts[i]->handle = map[j++].handle;
627	625	}
628	626	pending_handle(pending_req, i) =
629	627	persistent_gnts[i]->handle;
630	628
631	629	if (ret)
632	630	continue;
633		−
634		− seg[i].buf = persistent_gnts[i]->dev_bus_addr \|
635		− (req->u.rw.seg[i].first_sect << 9);
636	631	} else {
637		− pending_handle(pending_req, i) = map[j].handle;
	632	+ pending_handle(pending_req, i) = map[j++].handle;
638	633	bitmap_set(pending_req->unmap_seg, i, 1);
639	634
640		− if (ret) {
641		− j++;
	635	+ if (ret)
642	636	continue;
643		− }
644		−
645		− seg[i].buf = map[j++].dev_bus_addr \|
646		− (req->u.rw.seg[i].first_sect << 9);
647	637	}
	638	+ seg[i].offset = (req->u.rw.seg[i].first_sect << 9);
648	639	}
649	640	return ret;
650	641	}
@@ -679,6 +670,16 @@ static int dispatch_discard_io(struct xen_blkif *blkif, · 28 unmodified lines
679	670	return err;
680	671	}
681	672
	673	+static int dispatch_other_io(struct xen_blkif *blkif,
	674	+ struct blkif_request *req,
	675	+ struct pending_req *pending_req)
	676	+{
	677	+ free_req(pending_req);
	678	+ make_response(blkif, req->u.other.id, req->operation,
	679	+ BLKIF_RSP_EOPNOTSUPP);
	680	+ return -EIO;
	681	+}
	682	+
682	683	static void xen_blk_drain_io(struct xen_blkif *blkif)
683	684	{
684	685	atomic_set(&blkif->drain, 1);
@@ -800,17 +801,30 @@ __do_block_io_op(struct xen_blkif *blkif) · 115 unmodified lines
800	801
801	802	/* Apply all sanity checks to /private copy/ of request. */
802	803	barrier();
803		− if (unlikely(req.operation == BLKIF_OP_DISCARD)) {
	804	+
	805	+ switch (req.operation) {
	806	+ case BLKIF_OP_READ:
	807	+ case BLKIF_OP_WRITE:
	808	+ case BLKIF_OP_WRITE_BARRIER:
	809	+ case BLKIF_OP_FLUSH_DISKCACHE:
	810	+ if (dispatch_rw_block_io(blkif, &req, pending_req))
	811	+ goto done;
	812	+ break;
	813	+ case BLKIF_OP_DISCARD:
804	814	free_req(pending_req);
805	815	if (dispatch_discard_io(blkif, &req))
806		− break;
807		− } else if (dispatch_rw_block_io(blkif, &req, pending_req))
	816	+ goto done;
808	817	break;
	818	+ default:
	819	+ if (dispatch_other_io(blkif, &req, pending_req))
	820	+ goto done;
	821	+ break;
	822	+ }
809	823
810	824	/* Yield point for this unbounded loop. */
811	825	cond_resched();
812	826	}
813		−
	827	+done:
814	828	return more_to_do;
815	829	}
816	830
@@ -904,7 +918,8 @@ static int dispatch_rw_block_io(struct xen_blkif *blkif, · 87 unmodified lines
904	918	pr_debug(DRV_PFX "access denied: %s of [%llu,%llu] on dev=%04x\n",
905	919	operation == READ ? "read" : "write",
906	920	preq.sector_number,
907		− preq.sector_number + preq.nr_sects, preq.dev);
	921	+ preq.sector_number + preq.nr_sects,
	922	+ blkif->vbd.pdevice);
908	923	goto fail_response;
909	924	}
910	925
@@ -947,7 +962,7 @@ static int dispatch_rw_block_io(struct xen_blkif *blkif, · 36 unmodified lines
947	962	(bio_add_page(bio,
948	963	pages[i],
949	964	seg[i].nsec << 9,
950		− seg[i].buf & ~PAGE_MASK) == 0)) {
	965	+ seg[i].offset) == 0)) {
951	966
952	967	bio = bio_alloc(GFP_KERNEL, nseg-i);
953	968	if (unlikely(bio == NULL))
@@ -977,13 +992,7 @@ static int dispatch_rw_block_io(struct xen_blkif *blkif, · 23 unmodified lines
977	992	bio->bi_end_io = end_block_io_op;
978	993	}
979	994
980		− /*
981		− * We set it one so that the last submit_bio does not have to call
982		− * atomic_inc.
983		− */
984	995	atomic_set(&pending_req->pendcnt, nbio);
985		−
986		− /* Get a reference count for the disk queue and start sending I/O */
987	996	blk_start_plug(&plug);
988	997
989	998	for (i = 0; i < nbio; i++)
@@ -1011,6 +1020,7 @@ static int dispatch_rw_block_io(struct xen_blkif *blkif, · 21 unmodified lines
1011	1020	fail_put_bio:
1012	1021	for (i = 0; i < nbio; i++)
1013	1022	bio_put(biolist[i]);
	1023	+ atomic_set(&pending_req->pendcnt, 1);
1014	1024	__end_block_io_op(pending_req, -EINVAL);
1015	1025	msleep(1); /* back off a bit */
1016	1026	return -EIO;

drivers/block/xen-blkback/common.h+32−8

@@ -77,11 +77,18 @@ struct blkif_x86_32_request_discard { · 76 unmodified lines
77	77	uint64_t nr_sectors;
78	78	} __attribute__((__packed__));
79	79
	80	+struct blkif_x86_32_request_other {
	81	+ uint8_t _pad1;
	82	+ blkif_vdev_t _pad2;
	83	+ uint64_t id; /* private guest value, echoed in resp */
	84	+} __attribute__((__packed__));
	85	+
80	86	struct blkif_x86_32_request {
81	87	uint8_t operation; /* BLKIF_OP_??? */
82	88	union {
83	89	struct blkif_x86_32_request_rw rw;
84	90	struct blkif_x86_32_request_discard discard;
	91	+ struct blkif_x86_32_request_other other;
85	92	} u;
86	93	} __attribute__((__packed__));
87	94
@@ -113,11 +120,19 @@ struct blkif_x86_64_request_discard { · 25 unmodified lines
113	120	uint64_t nr_sectors;
114	121	} __attribute__((__packed__));
115	122
	123	+struct blkif_x86_64_request_other {
	124	+ uint8_t _pad1;
	125	+ blkif_vdev_t _pad2;
	126	+ uint32_t _pad3; /* offsetof(blkif_..,u.discard.id)==8 */
	127	+ uint64_t id; /* private guest value, echoed in resp */
	128	+} __attribute__((__packed__));
	129	+
116	130	struct blkif_x86_64_request {
117	131	uint8_t operation; /* BLKIF_OP_??? */
118	132	union {
119	133	struct blkif_x86_64_request_rw rw;
120	134	struct blkif_x86_64_request_discard discard;
	135	+ struct blkif_x86_64_request_other other;
121	136	} u;
122	137	} __attribute__((__packed__));
123	138
@@ -172,7 +187,6 @@ struct persistent_gnt { · 48 unmodified lines
172	187	struct page *page;
173	188	grant_ref_t gnt;
174	189	grant_handle_t handle;
175		− uint64_t dev_bus_addr;
176	190	struct rb_node node;
177	191	};
178	192
@@ -208,13 +222,13 @@ struct xen_blkif { · 29 unmodified lines
208	222
209	223	/* statistics */
210	224	unsigned long st_print;
211		− int st_rd_req;
212		− int st_wr_req;
213		− int st_oo_req;
214		− int st_f_req;
215		− int st_ds_req;
216		− int st_rd_sect;
217		− int st_wr_sect;
	225	+ unsigned long long st_rd_req;
	226	+ unsigned long long st_wr_req;
	227	+ unsigned long long st_oo_req;
	228	+ unsigned long long st_f_req;
	229	+ unsigned long long st_ds_req;
	230	+ unsigned long long st_rd_sect;
	231	+ unsigned long long st_wr_sect;
218	232
219	233	wait_queue_head_t waiting_to_free;
220	234	};
@@ -278,6 +292,11 @@ static inline void blkif_get_x86_32_req(struct blkif_request *dst, · 57 unmodified lines
278	292	dst->u.discard.nr_sectors = src->u.discard.nr_sectors;
279	293	break;
280	294	default:
	295	+ /*
	296	+ * Don't know how to translate this op. Only get the
	297	+ * ID so failure can be reported to the frontend.
	298	+ */
	299	+ dst->u.other.id = src->u.other.id;
281	300	break;
282	301	}
283	302	}
@@ -309,6 +328,11 @@ static inline void blkif_get_x86_64_req(struct blkif_request *dst, · 25 unmodified lines
309	328	dst->u.discard.nr_sectors = src->u.discard.nr_sectors;
310	329	break;
311	330	default:
	331	+ /*
	332	+ * Don't know how to translate this op. Only get the
	333	+ * ID so failure can be reported to the frontend.
	334	+ */
	335	+ dst->u.other.id = src->u.other.id;
312	336	break;
313	337	}
314	338	}

drivers/block/xen-blkback/xenbus.c+7−7

@@ -230,13 +230,13 @@ int __init xen_blkif_interface_init(void) · 229 unmodified lines
230	230	} \
231	231	static DEVICE_ATTR(name, S_IRUGO, show_##name, NULL)
232	232
233		−VBD_SHOW(oo_req, "%d\n", be->blkif->st_oo_req);
234		−VBD_SHOW(rd_req, "%d\n", be->blkif->st_rd_req);
235		−VBD_SHOW(wr_req, "%d\n", be->blkif->st_wr_req);
236		−VBD_SHOW(f_req, "%d\n", be->blkif->st_f_req);
237		−VBD_SHOW(ds_req, "%d\n", be->blkif->st_ds_req);
238		−VBD_SHOW(rd_sect, "%d\n", be->blkif->st_rd_sect);
239		−VBD_SHOW(wr_sect, "%d\n", be->blkif->st_wr_sect);
	233	+VBD_SHOW(oo_req, "%llu\n", be->blkif->st_oo_req);
	234	+VBD_SHOW(rd_req, "%llu\n", be->blkif->st_rd_req);
	235	+VBD_SHOW(wr_req, "%llu\n", be->blkif->st_wr_req);
	236	+VBD_SHOW(f_req, "%llu\n", be->blkif->st_f_req);
	237	+VBD_SHOW(ds_req, "%llu\n", be->blkif->st_ds_req);
	238	+VBD_SHOW(rd_sect, "%llu\n", be->blkif->st_rd_sect);
	239	+VBD_SHOW(wr_sect, "%llu\n", be->blkif->st_wr_sect);
240	240
241	241	static struct attribute *xen_vbdstat_attrs[] = {
242	242	&dev_attr_oo_req.attr,

drivers/block/xen-blkfront.c+91−63

@@ -44,7 +44,7 @@ · 43 unmodified lines
44	44	#include <linux/mutex.h>
45	45	#include <linux/scatterlist.h>
46	46	#include <linux/bitmap.h>
47		−#include <linux/llist.h>
	47	+#include <linux/list.h>
48	48
49	49	#include <xen/xen.h>
50	50	#include <xen/xenbus.h>
@@ -68,13 +68,12 @@ enum blkif_state { · 17 unmodified lines
68	68	struct grant {
69	69	grant_ref_t gref;
70	70	unsigned long pfn;
71		− struct llist_node node;
	71	+ struct list_head node;
72	72	};
73	73
74	74	struct blk_shadow {
75	75	struct blkif_request req;
76	76	struct request *request;
77		− unsigned long frame[BLKIF_MAX_SEGMENTS_PER_REQUEST];
78	77	struct grant *grants_used[BLKIF_MAX_SEGMENTS_PER_REQUEST];
79	78	};
80	79
@@ -105,7 +104,7 @@ struct blkfront_info · 24 unmodified lines
105	104	struct work_struct work;
106	105	struct gnttab_free_callback callback;
107	106	struct blk_shadow shadow[BLK_RING_SIZE];
108		− struct llist_head persistent_gnts;
	107	+ struct list_head persistent_gnts;
109	108	unsigned int persistent_gnts_c;
110	109	unsigned long shadow_free;
111	110	unsigned int feature_flush;
@@ -165,6 +164,69 @@ static int add_id_to_freelist(struct blkfront_info *info, · 53 unmodified lines
165	164	return 0;
166	165	}
167	166
	167	+static int fill_grant_buffer(struct blkfront_info *info, int num)
	168	+{
	169	+ struct page *granted_page;
	170	+ struct grant gnt_list_entry, n;
	171	+ int i = 0;
	172	+
	173	+ while(i < num) {
	174	+ gnt_list_entry = kzalloc(sizeof(struct grant), GFP_NOIO);
	175	+ if (!gnt_list_entry)
	176	+ goto out_of_memory;
	177	+
	178	+ granted_page = alloc_page(GFP_NOIO);
	179	+ if (!granted_page) {
	180	+ kfree(gnt_list_entry);
	181	+ goto out_of_memory;
	182	+ }
	183	+
	184	+ gnt_list_entry->pfn = page_to_pfn(granted_page);
	185	+ gnt_list_entry->gref = GRANT_INVALID_REF;
	186	+ list_add(&gnt_list_entry->node, &info->persistent_gnts);
	187	+ i++;
	188	+ }
	189	+
	190	+ return 0;
	191	+
	192	+out_of_memory:
	193	+ list_for_each_entry_safe(gnt_list_entry, n,
	194	+ &info->persistent_gnts, node) {
	195	+ list_del(&gnt_list_entry->node);
	196	+ __free_page(pfn_to_page(gnt_list_entry->pfn));
	197	+ kfree(gnt_list_entry);
	198	+ i--;
	199	+ }
	200	+ BUG_ON(i != 0);
	201	+ return -ENOMEM;
	202	+}
	203	+
	204	+static struct grant get_grant(grant_ref_t gref_head,
	205	+ struct blkfront_info *info)
	206	+{
	207	+ struct grant *gnt_list_entry;
	208	+ unsigned long buffer_mfn;
	209	+
	210	+ BUG_ON(list_empty(&info->persistent_gnts));
	211	+ gnt_list_entry = list_first_entry(&info->persistent_gnts, struct grant,
	212	+ node);
	213	+ list_del(&gnt_list_entry->node);
	214	+
	215	+ if (gnt_list_entry->gref != GRANT_INVALID_REF) {
	216	+ info->persistent_gnts_c--;
	217	+ return gnt_list_entry;
	218	+ }
	219	+
	220	+ /* Assign a gref to this page */
	221	+ gnt_list_entry->gref = gnttab_claim_grant_reference(gref_head);
	222	+ BUG_ON(gnt_list_entry->gref == -ENOSPC);
	223	+ buffer_mfn = pfn_to_mfn(gnt_list_entry->pfn);
	224	+ gnttab_grant_foreign_access_ref(gnt_list_entry->gref,
	225	+ info->xbdev->otherend_id,
	226	+ buffer_mfn, 0);
	227	+ return gnt_list_entry;
	228	+}
	229	+
168	230	static const char *op_name(int op)
169	231	{
170	232	static const char *const names[] = {
@@ -293,7 +355,6 @@ static int blkif_ioctl(struct block_device *bdev, fmode_t mode, · 122 unmodified lines
293	355	static int blkif_queue_request(struct request *req)
294	356	{
295	357	struct blkfront_info *info = req->rq_disk->private_data;
296		− unsigned long buffer_mfn;
297	358	struct blkif_request *ring_req;
298	359	unsigned long id;
299	360	unsigned int fsect, lsect;
@@ -306,7 +367,6 @@ static int blkif_queue_request(struct request *req) · 6 unmodified lines
306	367	*/
307	368	bool new_persistent_gnts;
308	369	grant_ref_t gref_head;
309		− struct page *granted_page;
310	370	struct grant *gnt_list_entry = NULL;
311	371	struct scatterlist *sg;
312	372
@@ -370,41 +430,8 @@ static int blkif_queue_request(struct request *req) · 57 unmodified lines
370	430	fsect = sg->offset >> 9;
371	431	lsect = fsect + (sg->length >> 9) - 1;
372	432
373		− if (info->persistent_gnts_c) {
374		− BUG_ON(llist_empty(&info->persistent_gnts));
375		− gnt_list_entry = llist_entry(
376		− llist_del_first(&info->persistent_gnts),
377		− struct grant, node);
378		−
379		− ref = gnt_list_entry->gref;
380		− buffer_mfn = pfn_to_mfn(gnt_list_entry->pfn);
381		− info->persistent_gnts_c--;
382		− } else {
383		− ref = gnttab_claim_grant_reference(&gref_head);
384		− BUG_ON(ref == -ENOSPC);
385		−
386		− gnt_list_entry =
387		− kmalloc(sizeof(struct grant),
388		− GFP_ATOMIC);
389		− if (!gnt_list_entry)
390		− return -ENOMEM;
391		−
392		− granted_page = alloc_page(GFP_ATOMIC);
393		− if (!granted_page) {
394		− kfree(gnt_list_entry);
395		− return -ENOMEM;
396		− }
397		−
398		− gnt_list_entry->pfn =
399		− page_to_pfn(granted_page);
400		− gnt_list_entry->gref = ref;
401		−
402		− buffer_mfn = pfn_to_mfn(page_to_pfn(
403		− granted_page));
404		− gnttab_grant_foreign_access_ref(ref,
405		− info->xbdev->otherend_id,
406		− buffer_mfn, 0);
407		− }
	433	+ gnt_list_entry = get_grant(&gref_head, info);
	434	+ ref = gnt_list_entry->gref;
408	435
409	436	info->shadow[id].grants_used[i] = gnt_list_entry;
410	437
@@ -435,7 +462,6 @@ static int blkif_queue_request(struct request *req) · 24 unmodified lines
435	462	kunmap_atomic(shared_data);
436	463	}
437	464
438		− info->shadow[id].frame[i] = mfn_to_pfn(buffer_mfn);
439	465	ring_req->u.rw.seg[i] =
440	466	(struct blkif_request_segment) {
441	467	.gref = ref,
@@ -790,9 +816,8 @@ static void blkif_restart_queue(struct work_struct *work) · 348 unmodified lines
790	816
791	817	static void blkif_free(struct blkfront_info *info, int suspend)
792	818	{
793		− struct llist_node *all_gnts;
794		− struct grant persistent_gnt, tmp;
795		− struct llist_node *n;
	819	+ struct grant *persistent_gnt;
	820	+ struct grant *n;
796	821
797	822	/* Prevent new requests being issued until we fix things up. */
798	823	spin_lock_irq(&info->io_lock);
@@ -803,22 +828,20 @@ static void blkif_free(struct blkfront_info *info, int suspend) · 4 unmodified lines
803	828	blk_stop_queue(info->rq);
804	829
805	830	/* Remove all persistent grants */
806		− if (info->persistent_gnts_c) {
807		− all_gnts = llist_del_all(&info->persistent_gnts);
808		− persistent_gnt = llist_entry(all_gnts, typeof(*(persistent_gnt)), node);
809		− while (persistent_gnt) {
810		− gnttab_end_foreign_access(persistent_gnt->gref, 0, 0UL);
	831	+ if (!list_empty(&info->persistent_gnts)) {
	832	+ list_for_each_entry_safe(persistent_gnt, n,
	833	+ &info->persistent_gnts, node) {
	834	+ list_del(&persistent_gnt->node);
	835	+ if (persistent_gnt->gref != GRANT_INVALID_REF) {
	836	+ gnttab_end_foreign_access(persistent_gnt->gref,
	837	+ 0, 0UL);
	838	+ info->persistent_gnts_c--;
	839	+ }
811	840	__free_page(pfn_to_page(persistent_gnt->pfn));
812		− tmp = persistent_gnt;
813		− n = persistent_gnt->node.next;
814		− if (n)
815		− persistent_gnt = llist_entry(n, typeof(*(persistent_gnt)), node);
816		− else
817		− persistent_gnt = NULL;
818		− kfree(tmp);
	841	+ kfree(persistent_gnt);
819	842	}
820		− info->persistent_gnts_c = 0;
821	843	}
	844	+ BUG_ON(info->persistent_gnts_c != 0);
822	845
823	846	/* No more gnttab callback work. */
824	847	gnttab_cancel_free_callback(&info->callback);
@@ -875,7 +898,7 @@ static void blkif_completion(struct blk_shadow s, struct blkfront_info info, · 50 unmodified lines
875	898	}
876	899	/* Add the persistent grant into the list of free grants */
877	900	for (i = 0; i < s->req.u.rw.nr_segments; i++) {
878		− llist_add(&s->grants_used[i]->node, &info->persistent_gnts);
	901	+ list_add(&s->grants_used[i]->node, &info->persistent_gnts);
879	902	info->persistent_gnts_c++;
880	903	}
881	904	}
@@ -1013,6 +1036,12 @@ static int setup_blkring(struct xenbus_device *dev, · 131 unmodified lines
1013	1036
1014	1037	sg_init_table(info->sg, BLKIF_MAX_SEGMENTS_PER_REQUEST);
1015	1038
	1039	+ /* Allocate memory for grants */
	1040	+ err = fill_grant_buffer(info, BLK_RING_SIZE *
	1041	+ BLKIF_MAX_SEGMENTS_PER_REQUEST);
	1042	+ if (err)
	1043	+ goto fail;
	1044	+
1016	1045	err = xenbus_grant_ring(dev, virt_to_mfn(info->ring.sring));
1017	1046	if (err < 0) {
1018	1047	free_page((unsigned long)sring);
@@ -1171,7 +1200,7 @@ static int blkfront_probe(struct xenbus_device *dev, · 152 unmodified lines
1171	1200	spin_lock_init(&info->io_lock);
1172	1201	info->xbdev = dev;
1173	1202	info->vdevice = vdevice;
1174		− init_llist_head(&info->persistent_gnts);
	1203	+ INIT_LIST_HEAD(&info->persistent_gnts);
1175	1204	info->persistent_gnts_c = 0;
1176	1205	info->connected = BLKIF_STATE_DISCONNECTED;
1177	1206	INIT_WORK(&info->work, blkif_restart_queue);
@@ -1203,11 +1232,10 @@ static int blkif_recover(struct blkfront_info *info) · 25 unmodified lines
1203	1232	int j;
1204	1233
1205	1234	/* Stage 1: Make a safe copy of the shadow state. */
1206		− copy = kmalloc(sizeof(info->shadow),
	1235	+ copy = kmemdup(info->shadow, sizeof(info->shadow),
1207	1236	GFP_NOIO \| __GFP_REPEAT \| __GFP_HIGH);
1208	1237	if (!copy)
1209	1238	return -ENOMEM;
1210		− memcpy(copy, info->shadow, sizeof(info->shadow));
1211	1239
1212	1240	/* Stage 2: Set up free list. */
1213	1241	memset(&info->shadow, 0, sizeof(info->shadow));
@@ -1236,7 +1264,7 @@ static int blkif_recover(struct blkfront_info *info) · 22 unmodified lines
1236	1264	gnttab_grant_foreign_access_ref(
1237	1265	req->u.rw.seg[j].gref,
1238	1266	info->xbdev->otherend_id,
1239		− pfn_to_mfn(info->shadow[req->u.rw.id].frame[j]),
	1267	+ pfn_to_mfn(copy[i].grants_used[j]->pfn),
1240	1268	0);
1241	1269	}
1242	1270	info->shadow[req->u.rw.id].req = *req;

drivers/bluetooth/ath3k.c+8−0

@@ -73,9 +73,13 @@ static struct usb_device_id ath3k_table[] = { · 72 unmodified lines
73	73	{ USB_DEVICE(0x03F0, 0x311D) },
74	74
75	75	/* Atheros AR3012 with sflash firmware*/
	76	+ { USB_DEVICE(0x0CF3, 0x0036) },
76	77	{ USB_DEVICE(0x0CF3, 0x3004) },
	78	+ { USB_DEVICE(0x0CF3, 0x3008) },
77	79	{ USB_DEVICE(0x0CF3, 0x311D) },
	80	+ { USB_DEVICE(0x0CF3, 0x817a) },
78	81	{ USB_DEVICE(0x13d3, 0x3375) },
	82	+ { USB_DEVICE(0x04CA, 0x3004) },
79	83	{ USB_DEVICE(0x04CA, 0x3005) },
80	84	{ USB_DEVICE(0x04CA, 0x3006) },
81	85	{ USB_DEVICE(0x04CA, 0x3008) },
@@ -105,9 +109,13 @@ MODULE_DEVICE_TABLE(usb, ath3k_table); · 23 unmodified lines
105	109	static struct usb_device_id ath3k_blist_tbl[] = {
106	110
107	111	/* Atheros AR3012 with sflash firmware*/
	112	+ { USB_DEVICE(0x0CF3, 0x0036), .driver_info = BTUSB_ATH3012 },
108	113	{ USB_DEVICE(0x0cf3, 0x3004), .driver_info = BTUSB_ATH3012 },
	114	+ { USB_DEVICE(0x0cf3, 0x3008), .driver_info = BTUSB_ATH3012 },
109	115	{ USB_DEVICE(0x0cf3, 0x311D), .driver_info = BTUSB_ATH3012 },
	116	+ { USB_DEVICE(0x0CF3, 0x817a), .driver_info = BTUSB_ATH3012 },
110	117	{ USB_DEVICE(0x13d3, 0x3375), .driver_info = BTUSB_ATH3012 },
	118	+ { USB_DEVICE(0x04ca, 0x3004), .driver_info = BTUSB_ATH3012 },
111	119	{ USB_DEVICE(0x04ca, 0x3005), .driver_info = BTUSB_ATH3012 },
112	120	{ USB_DEVICE(0x04ca, 0x3006), .driver_info = BTUSB_ATH3012 },
113	121	{ USB_DEVICE(0x04ca, 0x3008), .driver_info = BTUSB_ATH3012 },

drivers/bluetooth/btusb.c+4−0

@@ -131,9 +131,13 @@ static struct usb_device_id blacklist_table[] = { · 130 unmodified lines
131	131	{ USB_DEVICE(0x03f0, 0x311d), .driver_info = BTUSB_IGNORE },
132	132
133	133	/* Atheros 3012 with sflash firmware */
	134	+ { USB_DEVICE(0x0cf3, 0x0036), .driver_info = BTUSB_ATH3012 },
134	135	{ USB_DEVICE(0x0cf3, 0x3004), .driver_info = BTUSB_ATH3012 },
	136	+ { USB_DEVICE(0x0cf3, 0x3008), .driver_info = BTUSB_ATH3012 },
135	137	{ USB_DEVICE(0x0cf3, 0x311d), .driver_info = BTUSB_ATH3012 },
	138	+ { USB_DEVICE(0x0cf3, 0x817a), .driver_info = BTUSB_ATH3012 },
136	139	{ USB_DEVICE(0x13d3, 0x3375), .driver_info = BTUSB_ATH3012 },
	140	+ { USB_DEVICE(0x04ca, 0x3004), .driver_info = BTUSB_ATH3012 },
137	141	{ USB_DEVICE(0x04ca, 0x3005), .driver_info = BTUSB_ATH3012 },
138	142	{ USB_DEVICE(0x04ca, 0x3006), .driver_info = BTUSB_ATH3012 },
139	143	{ USB_DEVICE(0x04ca, 0x3008), .driver_info = BTUSB_ATH3012 },

drivers/char/hpet.c+1−13

@@ -373,26 +373,14 @@ static int hpet_mmap(struct file file, struct vm_area_struct vma) · 372 unmodified lines
373	373	struct hpet_dev *devp;
374	374	unsigned long addr;
375	375
376		− if (((vma->vm_end - vma->vm_start) != PAGE_SIZE) \|\| vma->vm_pgoff)
377		− return -EINVAL;
378		−
379	376	devp = file->private_data;
380	377	addr = devp->hd_hpets->hp_hpet_phys;
381	378
382	379	if (addr & (PAGE_SIZE - 1))
383	380	return -ENOSYS;
384	381
385		− vma->vm_flags \|= VM_IO;
386	382	vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
387		−
388		− if (io_remap_pfn_range(vma, vma->vm_start, addr >> PAGE_SHIFT,
389		− PAGE_SIZE, vma->vm_page_prot)) {
390		− printk(KERN_ERR "%s: io_remap_pfn_range failed\n",
391		− __func__);
392		− return -EAGAIN;
393		− }
394		−
395		− return 0;
	383	+ return vm_iomap_memory(vma, addr, PAGE_SIZE);
396	384	#else
397	385	return -ENOSYS;
398	386	#endif

drivers/char/hw_random/core.c+9−0

@@ -380,6 +380,15 @@ void hwrng_unregister(struct hwrng *rng) · 379 unmodified lines
380	380	}
381	381	EXPORT_SYMBOL_GPL(hwrng_unregister);
382	382
	383	+static void __exit hwrng_exit(void)
	384	+{
	385	+ mutex_lock(&rng_mutex);
	386	+ BUG_ON(current_rng);
	387	+ kfree(rng_buffer);
	388	+ mutex_unlock(&rng_mutex);
	389	+}
	390	+
	391	+module_exit(hwrng_exit);
383	392
384	393	MODULE_DESCRIPTION("H/W Random Number Generator (RNG) driver");
385	394	MODULE_LICENSE("GPL");

drivers/char/hw_random/virtio-rng.c+11−2

@@ -92,14 +92,22 @@ static int probe_common(struct virtio_device *vdev) · 91 unmodified lines
92	92	{
93	93	int err;
94	94
	95	+ if (vq) {
	96	+ /* We only support one device for now */
	97	+ return -EBUSY;
	98	+ }
95	99	/* We expect a single virtqueue. */
96	100	vq = virtio_find_single_vq(vdev, random_recv_done, "input");
97		− if (IS_ERR(vq))
98		− return PTR_ERR(vq);
	101	+ if (IS_ERR(vq)) {
	102	+ err = PTR_ERR(vq);
	103	+ vq = NULL;
	104	+ return err;
	105	+ }
99	106
100	107	err = hwrng_register(&virtio_hwrng);
101	108	if (err) {
102	109	vdev->config->del_vqs(vdev);
	110	+ vq = NULL;
103	111	return err;
104	112	}
105	113
@@ -112,6 +120,7 @@ static void remove_common(struct virtio_device *vdev) · 6 unmodified lines
112	120	busy = false;
113	121	hwrng_unregister(&virtio_hwrng);
114	122	vdev->config->del_vqs(vdev);
	123	+ vq = NULL;
115	124	}
116	125
117	126	static int virtrng_probe(struct virtio_device *vdev)

drivers/char/virtio_console.c+30−14

@@ -149,7 +149,8 @@ struct ports_device { · 148 unmodified lines
149	149	spinlock_t ports_lock;
150	150
151	151	/* To protect the vq operations for the control channel */
152		− spinlock_t cvq_lock;
	152	+ spinlock_t c_ivq_lock;
	153	+ spinlock_t c_ovq_lock;
153	154
154	155	/* The current config space is stored here */
155	156	struct virtio_console_config config;
@@ -569,11 +570,14 @@ static ssize_t __send_control_msg(struct ports_device *portdev, u32 port_id, · 413 unmodified lines
569	570	vq = portdev->c_ovq;
570	571
571	572	sg_init_one(sg, &cpkt, sizeof(cpkt));
	573	+
	574	+ spin_lock(&portdev->c_ovq_lock);
572	575	if (virtqueue_add_buf(vq, sg, 1, 0, &cpkt, GFP_ATOMIC) == 0) {
573	576	virtqueue_kick(vq);
574	577	while (!virtqueue_get_buf(vq, &len))
575	578	cpu_relax();
576	579	}
	580	+ spin_unlock(&portdev->c_ovq_lock);
577	581	return 0;
578	582	}
579	583
@@ -1436,7 +1440,7 @@ static int add_port(struct ports_device *portdev, u32 id) · 856 unmodified lines
1436	1440	* rproc_serial does not want the console port, only
1437	1441	* the generic port implementation.
1438	1442	*/
1439		− port->host_connected = port->guest_connected = true;
	1443	+ port->host_connected = true;
1440	1444	else if (!use_multiport(port->portdev)) {
1441	1445	/*
1442	1446	* If we're not using multiport support,
@@ -1709,23 +1713,23 @@ static void control_work_handler(struct work_struct *work) · 266 unmodified lines
1709	1713	portdev = container_of(work, struct ports_device, control_work);
1710	1714	vq = portdev->c_ivq;
1711	1715
1712		− spin_lock(&portdev->cvq_lock);
	1716	+ spin_lock(&portdev->c_ivq_lock);
1713	1717	while ((buf = virtqueue_get_buf(vq, &len))) {
1714		− spin_unlock(&portdev->cvq_lock);
	1718	+ spin_unlock(&portdev->c_ivq_lock);
1715	1719
1716	1720	buf->len = len;
1717	1721	buf->offset = 0;
1718	1722
1719	1723	handle_control_message(portdev, buf);
1720	1724
1721		− spin_lock(&portdev->cvq_lock);
	1725	+ spin_lock(&portdev->c_ivq_lock);
1722	1726	if (add_inbuf(portdev->c_ivq, buf) < 0) {
1723	1727	dev_warn(&portdev->vdev->dev,
1724	1728	"Error adding buffer to queue\n");
1725	1729	free_buf(buf, false);
1726	1730	}
1727	1731	}
1728		− spin_unlock(&portdev->cvq_lock);
	1732	+ spin_unlock(&portdev->c_ivq_lock);
1729	1733	}
1730	1734
1731	1735	static void out_intr(struct virtqueue *vq)
@@ -1752,13 +1756,23 @@ static void in_intr(struct virtqueue *vq) · 20 unmodified lines
1752	1756	port->inbuf = get_inbuf(port);
1753	1757
1754	1758	/*
1755		− * Don't queue up data when port is closed. This condition
	1759	+ * Normally the port should not accept data when the port is
	1760	+ * closed. For generic serial ports, the host won't (shouldn't)
	1761	+ * send data till the guest is connected. But this condition
1756	1762	* can be reached when a console port is not yet connected (no
1757		− * tty is spawned) and the host sends out data to console
1758		− * ports. For generic serial ports, the host won't
1759		− * (shouldn't) send data till the guest is connected.
	1763	+ * tty is spawned) and the other side sends out data over the
	1764	+ * vring, or when a remote devices start sending data before
	1765	+ * the ports are opened.
	1766	+ *
	1767	+ * A generic serial port will discard data if not connected,
	1768	+ * while console ports and rproc-serial ports accepts data at
	1769	+ * any time. rproc-serial is initiated with guest_connected to
	1770	+ * false because port_fops_open expects this. Console ports are
	1771	+ * hooked up with an HVC console and is initialized with
	1772	+ * guest_connected to true.
1760	1773	*/
1761		− if (!port->guest_connected)
	1774	+
	1775	+ if (!port->guest_connected && !is_rproc_serial(port->portdev->vdev))
1762	1776	discard_port_data(port);
1763	1777
1764	1778	spin_unlock_irqrestore(&port->inbuf_lock, flags);
@@ -1986,10 +2000,12 @@ static int virtcons_probe(struct virtio_device *vdev) · 221 unmodified lines
1986	2000	if (multiport) {
1987	2001	unsigned int nr_added_bufs;
1988	2002
1989		− spin_lock_init(&portdev->cvq_lock);
	2003	+ spin_lock_init(&portdev->c_ivq_lock);
	2004	+ spin_lock_init(&portdev->c_ovq_lock);
1990	2005	INIT_WORK(&portdev->control_work, &control_work_handler);
1991	2006
1992		− nr_added_bufs = fill_queue(portdev->c_ivq, &portdev->cvq_lock);
	2007	+ nr_added_bufs = fill_queue(portdev->c_ivq,
	2008	+ &portdev->c_ivq_lock);
1993	2009	if (!nr_added_bufs) {
1994	2010	dev_err(&vdev->dev,
1995	2011	"Error allocating buffers for control queue\n");
@@ -2140,7 +2156,7 @@ static int virtcons_restore(struct virtio_device *vdev) · 144 unmodified lines
2140	2156	return ret;
2141	2157
2142	2158	if (use_multiport(portdev))
2143		− fill_queue(portdev->c_ivq, &portdev->cvq_lock);
	2159	+ fill_queue(portdev->c_ivq, &portdev->c_ivq_lock);
2144	2160
2145	2161	list_for_each_entry(port, &portdev->ports, list) {
2146	2162	port->in_vq = portdev->in_vqs[port->id];

drivers/clk/clk-vt8500.c+1−1

@@ -157,7 +157,7 @@ static int vt8500_dclk_set_rate(struct clk_hw *hw, unsigned long rate, · 156 unmodified lines
157	157	divisor = parent_rate / rate;
158	158
159	159	/* If prate / rate would be decimal, incr the divisor */
160		− if (rate * divisor < *prate)
	160	+ if (rate * divisor < parent_rate)
161	161	divisor++;
162	162
163	163	if (divisor == cdev->div_mask + 1)

drivers/clk/tegra/clk-tegra20.c+1−2

@@ -703,7 +703,7 @@ static void tegra20_pll_init(void) · 702 unmodified lines
703	703	clks[pll_a_out0] = clk;
704	704
705	705	/* PLLE */
706		− clk = tegra_clk_register_plle("pll_e", "pll_ref", clk_base, NULL,
	706	+ clk = tegra_clk_register_plle("pll_e", "pll_ref", clk_base, pmc_base,
707	707	0, 100000000, &pll_e_params,
708	708	0, pll_e_freq_table, NULL);
709	709	clk_register_clkdev(clk, "pll_e", NULL);
@@ -1292,7 +1292,6 @@ static struct tegra_clk_duplicate tegra_clk_duplicates[] = { · 582 unmodified lines
1292	1292	TEGRA_CLK_DUPLICATE(usbd, "tegra-ehci.0", NULL),
1293	1293	TEGRA_CLK_DUPLICATE(usbd, "tegra-otg", NULL),
1294	1294	TEGRA_CLK_DUPLICATE(cclk, NULL, "cpu"),
1295		− TEGRA_CLK_DUPLICATE(twd, "smp_twd", NULL),
1296	1295	TEGRA_CLK_DUPLICATE(clk_max, NULL, NULL), /* Must be the last entry */
1297	1296	};
1298	1297

drivers/clk/tegra/clk-tegra30.c+0−1

@@ -1931,7 +1931,6 @@ static struct tegra_clk_duplicate tegra_clk_duplicates[] = { · 1930 unmodified lines
1931	1931	TEGRA_CLK_DUPLICATE(cml1, "tegra_sata_cml", NULL),
1932	1932	TEGRA_CLK_DUPLICATE(cml0, "tegra_pcie", "cml"),
1933	1933	TEGRA_CLK_DUPLICATE(pciex, "tegra_pcie", "pciex"),
1934		− TEGRA_CLK_DUPLICATE(twd, "smp_twd", NULL),
1935	1934	TEGRA_CLK_DUPLICATE(vcp, "nvavp", "vcp"),
1936	1935	TEGRA_CLK_DUPLICATE(clk_max, NULL, NULL), /* MUST be the last entry */
1937	1936	};

drivers/cpufreq/acpi-cpufreq.c+0−2

@@ -730,7 +730,6 @@ static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy) · 729 unmodified lines
730	730	policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
731	731	cpumask_copy(policy->cpus, perf->shared_cpu_map);
732	732	}
733		− cpumask_copy(policy->related_cpus, perf->shared_cpu_map);
734	733
735	734	#ifdef CONFIG_SMP
736	735	dmi_check_system(sw_any_bug_dmi_table);
@@ -742,7 +741,6 @@ static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy) · 5 unmodified lines
742	741	if (check_amd_hwpstate_cpu(cpu) && !acpi_pstate_strict) {
743	742	cpumask_clear(policy->cpus);
744	743	cpumask_set_cpu(cpu, policy->cpus);
745		− cpumask_copy(policy->related_cpus, cpu_sibling_mask(cpu));
746	744	policy->shared_type = CPUFREQ_SHARED_TYPE_HW;
747	745	pr_info_once(PFX "overriding BIOS provided _PSD data\n");
748	746	}

drivers/cpufreq/cpufreq-cpu0.c+8−2

@@ -178,10 +178,16 @@ static struct cpufreq_driver cpu0_cpufreq_driver = { · 177 unmodified lines
178	178
179	179	static int cpu0_cpufreq_probe(struct platform_device *pdev)
180	180	{
181		− struct device_node *np;
	181	+ struct device_node np, parent;
182	182	int ret;
183	183
184		− for_each_child_of_node(of_find_node_by_path("/cpus"), np) {
	184	+ parent = of_find_node_by_path("/cpus");
	185	+ if (!parent) {
	186	+ pr_err("failed to find OF /cpus\n");
	187	+ return -ENOENT;
	188	+ }
	189	+
	190	+ for_each_child_of_node(parent, np) {
185	191	if (of_get_property(np, "operating-points", NULL))
186	192	break;
187	193	}

drivers/cpufreq/cpufreq_governor.h+3−3

@@ -14,8 +14,8 @@ · 13 unmodified lines
14	14	* published by the Free Software Foundation.
15	15	*/
16	16
17		−#ifndef _CPUFREQ_GOVERNER_H
18		−#define _CPUFREQ_GOVERNER_H
	17	+#ifndef _CPUFREQ_GOVERNOR_H
	18	+#define _CPUFREQ_GOVERNOR_H
19	19
20	20	#include <linux/cpufreq.h>
21	21	#include <linux/kobject.h>
@@ -175,4 +175,4 @@ bool need_load_eval(struct cpu_dbs_common_info *cdbs, · 153 unmodified lines
175	175	unsigned int sampling_rate);
176	176	int cpufreq_governor_dbs(struct dbs_data *dbs_data,
177	177	struct cpufreq_policy *policy, unsigned int event);
178		−#endif /* _CPUFREQ_GOVERNER_H */
	178	+#endif /* _CPUFREQ_GOVERNOR_H */

drivers/cpufreq/cpufreq_stats.c+8−4

@@ -180,15 +180,19 @@ static void cpufreq_stats_free_sysfs(unsigned int cpu) · 179 unmodified lines
180	180	{
181	181	struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);
182	182
183		− if (!cpufreq_frequency_get_table(cpu))
	183	+ if (!policy)
184	184	return;
185	185
186		− if (policy && !policy_is_shared(policy)) {
	186	+ if (!cpufreq_frequency_get_table(cpu))
	187	+ goto put_ref;
	188	+
	189	+ if (!policy_is_shared(policy)) {
187	190	pr_debug("%s: Free sysfs stat\n", __func__);
188	191	sysfs_remove_group(&policy->kobj, &stats_attr_group);
189	192	}
190		− if (policy)
191		− cpufreq_cpu_put(policy);
	193	+
	194	+put_ref:
	195	+ cpufreq_cpu_put(policy);
192	196	}
193	197
194	198	static int cpufreq_stats_create_table(struct cpufreq_policy *policy,

drivers/cpufreq/intel_pstate.c+30−5

@@ -358,14 +358,14 @@ static void intel_pstate_sysfs_expose_params(void) · 357 unmodified lines
358	358	static int intel_pstate_min_pstate(void)
359	359	{
360	360	u64 value;
361		− rdmsrl(0xCE, value);
	361	+ rdmsrl(MSR_PLATFORM_INFO, value);
362	362	return (value >> 40) & 0xFF;
363	363	}
364	364
365	365	static int intel_pstate_max_pstate(void)
366	366	{
367	367	u64 value;
368		− rdmsrl(0xCE, value);
	368	+ rdmsrl(MSR_PLATFORM_INFO, value);
369	369	return (value >> 8) & 0xFF;
370	370	}
371	371
@@ -373,7 +373,7 @@ static int intel_pstate_turbo_pstate(void) · 1 unmodified line
373	373	{
374	374	u64 value;
375	375	int nont, ret;
376		− rdmsrl(0x1AD, value);
	376	+ rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value);
377	377	nont = intel_pstate_max_pstate();
378	378	ret = ((value) & 255);
379	379	if (ret <= nont)
@@ -454,7 +454,7 @@ static inline void intel_pstate_calc_busy(struct cpudata *cpu, · 74 unmodified lines
454	454	sample->idletime_us * 100,
455	455	sample->duration_us);
456	456	core_pct = div64_u64(sample->aperf * 100, sample->mperf);
457		− sample->freq = cpu->pstate.turbo_pstate * core_pct * 1000;
	457	+ sample->freq = cpu->pstate.max_pstate * core_pct * 1000;
458	458
459	459	sample->core_pct_busy = div_s64((sample->pstate_pct_busy * core_pct),
460	460	100);
@@ -502,7 +502,6 @@ static inline void intel_pstate_set_sample_time(struct cpudata *cpu) · 41 unmodified lines
502	502
503	503	sample_time = cpu->pstate_policy->sample_rate_ms;
504	504	delay = msecs_to_jiffies(sample_time);
505		− delay -= jiffies % delay;
506	505	mod_timer_pinned(&cpu->timer, jiffies + delay);
507	506	}
508	507
@@ -752,6 +751,29 @@ static struct cpufreq_driver intel_pstate_driver = { · 243 unmodified lines
752	751
753	752	static int __initdata no_load;
754	753
	754	+static int intel_pstate_msrs_not_valid(void)
	755	+{
	756	+ /* Check that all the msr's we are using are valid. */
	757	+ u64 aperf, mperf, tmp;
	758	+
	759	+ rdmsrl(MSR_IA32_APERF, aperf);
	760	+ rdmsrl(MSR_IA32_MPERF, mperf);
	761	+
	762	+ if (!intel_pstate_min_pstate() \|\|
	763	+ !intel_pstate_max_pstate() \|\|
	764	+ !intel_pstate_turbo_pstate())
	765	+ return -ENODEV;
	766	+
	767	+ rdmsrl(MSR_IA32_APERF, tmp);
	768	+ if (!(tmp - aperf))
	769	+ return -ENODEV;
	770	+
	771	+ rdmsrl(MSR_IA32_MPERF, tmp);
	772	+ if (!(tmp - mperf))
	773	+ return -ENODEV;
	774	+
	775	+ return 0;
	776	+}
755	777	static int __init intel_pstate_init(void)
756	778	{
757	779	int cpu, rc = 0;
@@ -764,6 +786,9 @@ static int __init intel_pstate_init(void) · 6 unmodified lines
764	786	if (!id)
765	787	return -ENODEV;
766	788
	789	+ if (intel_pstate_msrs_not_valid())
	790	+ return -ENODEV;
	791	+
767	792	pr_info("Intel P-state driver initializing.\n");
768	793
769	794	all_cpu_data = vmalloc(sizeof(void ) num_possible_cpus());

drivers/crypto/caam/caamalg.c+2−25

@@ -1650,11 +1650,7 @@ struct caam_alg_template { · 1649 unmodified lines
1650	1650	};
1651	1651
1652	1652	static struct caam_alg_template driver_algs[] = {
1653		− /*
1654		− * single-pass ipsec_esp descriptor
1655		− * authencesn(,) is also registered, although not present
1656		− * explicitly here.
1657		− */
	1653	+ /* single-pass ipsec_esp descriptor */
1658	1654	{
1659	1655	.name = "authenc(hmac(md5),cbc(aes))",
1660	1656	.driver_name = "authenc-hmac-md5-cbc-aes-caam",
@@ -2217,9 +2213,7 @@ static int __init caam_algapi_init(void) · 556 unmodified lines
2217	2213	for (i = 0; i < ARRAY_SIZE(driver_algs); i++) {
2218	2214	/* TODO: check if h/w supports alg */
2219	2215	struct caam_crypto_alg *t_alg;
2220		− bool done = false;
2221	2216
2222		−authencesn:
2223	2217	t_alg = caam_alg_alloc(ctrldev, &driver_algs[i]);
2224	2218	if (IS_ERR(t_alg)) {
2225	2219	err = PTR_ERR(t_alg);
@@ -2233,25 +2227,8 @@ authencesn: · 7 unmodified lines
2233	2227	dev_warn(ctrldev, "%s alg registration failed\n",
2234	2228	t_alg->crypto_alg.cra_driver_name);
2235	2229	kfree(t_alg);
2236		− } else {
	2230	+ } else
2237	2231	list_add_tail(&t_alg->entry, &priv->alg_list);
2238		− if (driver_algs[i].type == CRYPTO_ALG_TYPE_AEAD &&
2239		− !memcmp(driver_algs[i].name, "authenc", 7) &&
2240		− !done) {
2241		− char *name;
2242		−
2243		− name = driver_algs[i].name;
2244		− memmove(name + 10, name + 7, strlen(name) - 7);
2245		− memcpy(name + 7, "esn", 3);
2246		−
2247		− name = driver_algs[i].driver_name;
2248		− memmove(name + 10, name + 7, strlen(name) - 7);
2249		− memcpy(name + 7, "esn", 3);
2250		−
2251		− done = true;
2252		− goto authencesn;
2253		− }
2254		− }
2255	2232	}
2256	2233	if (!list_empty(&priv->alg_list))
2257	2234	dev_info(ctrldev, "%s algorithms registered in /proc/crypto\n",

drivers/crypto/caam/compat.h+0−1

@@ -23,7 +23,6 @@ · 22 unmodified lines
23	23	#include <linux/types.h>
24	24	#include <linux/debugfs.h>
25	25	#include <linux/circ_buf.h>
26		−#include <linux/string.h>
27	26	#include <net/xfrm.h>
28	27
29	28	#include <crypto/algapi.h>

drivers/crypto/talitos.c+2−28

@@ -38,7 +38,6 @@ · 37 unmodified lines
38	38	#include <linux/spinlock.h>
39	39	#include <linux/rtnetlink.h>
40	40	#include <linux/slab.h>
41		−#include <linux/string.h>
42	41
43	42	#include <crypto/algapi.h>
44	43	#include <crypto/aes.h>
@@ -1974,11 +1973,7 @@ struct talitos_alg_template { · 1929 unmodified lines
1974	1973	};
1975	1974
1976	1975	static struct talitos_alg_template driver_algs[] = {
1977		− /*
1978		− * AEAD algorithms. These use a single-pass ipsec_esp descriptor.
1979		− * authencesn(,) is also registered, although not present
1980		− * explicitly here.
1981		− */
	1976	+ /* AEAD algorithms. These use a single-pass ipsec_esp descriptor */
1982	1977	{ .type = CRYPTO_ALG_TYPE_AEAD,
1983	1978	.alg.crypto = {
1984	1979	.cra_name = "authenc(hmac(sha1),cbc(aes))",
@@ -2820,9 +2815,7 @@ static int talitos_probe(struct platform_device *ofdev) · 835 unmodified lines
2820	2815	if (hw_supports(dev, driver_algs[i].desc_hdr_template)) {
2821	2816	struct talitos_crypto_alg *t_alg;
2822	2817	char *name = NULL;
2823		− bool authenc = false;
2824	2818
2825		−authencesn:
2826	2819	t_alg = talitos_alg_alloc(dev, &driver_algs[i]);
2827	2820	if (IS_ERR(t_alg)) {
2828	2821	err = PTR_ERR(t_alg);
@@ -2837,8 +2830,6 @@ authencesn: · 8 unmodified lines
2837	2830	err = crypto_register_alg(
2838	2831	&t_alg->algt.alg.crypto);
2839	2832	name = t_alg->algt.alg.crypto.cra_driver_name;
2840		− authenc = authenc ? !authenc :
2841		− !(bool)memcmp(name, "authenc", 7);
2842	2833	break;
2843	2834	case CRYPTO_ALG_TYPE_AHASH:
2844	2835	err = crypto_register_ahash(
@@ -2851,25 +2842,8 @@ authencesn: · 6 unmodified lines
2851	2842	dev_err(dev, "%s alg registration failed\n",
2852	2843	name);
2853	2844	kfree(t_alg);
2854		− } else {
	2845	+ } else
2855	2846	list_add_tail(&t_alg->entry, &priv->alg_list);
2856		− if (authenc) {
2857		− struct crypto_alg *alg =
2858		− &driver_algs[i].alg.crypto;
2859		−
2860		− name = alg->cra_name;
2861		− memmove(name + 10, name + 7,
2862		− strlen(name) - 7);
2863		− memcpy(name + 7, "esn", 3);
2864		−
2865		− name = alg->cra_driver_name;
2866		− memmove(name + 10, name + 7,
2867		− strlen(name) - 7);
2868		− memcpy(name + 7, "esn", 3);
2869		−
2870		− goto authencesn;
2871		− }
2872		− }
2873	2847	}
2874	2848	}
2875	2849	if (!list_empty(&priv->alg_list))

drivers/crypto/ux500/cryp/cryp_core.c+1−1

@@ -1750,7 +1750,7 @@ static struct platform_driver cryp_driver = { · 1749 unmodified lines
1750	1750	.shutdown = ux500_cryp_shutdown,
1751	1751	.driver = {
1752	1752	.owner = THIS_MODULE,
1753		− .name = "cryp1"
	1753	+ .name = "cryp1",
1754	1754	.pm = &ux500_cryp_pm,
1755	1755	}
1756	1756	};

drivers/dma/Kconfig+1−0

@@ -83,6 +83,7 @@ config INTEL_IOP_ADMA · 82 unmodified lines
83	83
84	84	config DW_DMAC
85	85	tristate "Synopsys DesignWare AHB DMA support"
	86	+ depends on GENERIC_HARDIRQS
86	87	select DMA_ENGINE
87	88	default y if CPU_AT32AP7000
88	89	help

drivers/dma/at_hdmac.c+4−5

@@ -310,8 +310,6 @@ static void atc_complete_all(struct at_dma_chan *atchan) · 309 unmodified lines
310	310
311	311	dev_vdbg(chan2dev(&atchan->chan_common), "complete all\n");
312	312
313		− BUG_ON(atc_chan_is_enabled(atchan));
314		−
315	313	/*
316	314	* Submit queued descriptors ASAP, i.e. before we go through
317	315	* the completed ones.
@@ -368,6 +366,9 @@ static void atc_advance_work(struct at_dma_chan *atchan) · 50 unmodified lines
368	366	{
369	367	dev_vdbg(chan2dev(&atchan->chan_common), "advance_work\n");
370	368
	369	+ if (atc_chan_is_enabled(atchan))
	370	+ return;
	371	+
371	372	if (list_empty(&atchan->active_list) \|\|
372	373	list_is_singular(&atchan->active_list)) {
373	374	atc_complete_all(atchan);
@@ -1078,9 +1079,7 @@ static void atc_issue_pending(struct dma_chan *chan) · 704 unmodified lines
1078	1079	return;
1079	1080
1080	1081	spin_lock_irqsave(&atchan->lock, flags);
1081		− if (!atc_chan_is_enabled(atchan)) {
1082		− atc_advance_work(atchan);
1083		− }
	1082	+ atc_advance_work(atchan);
1084	1083	spin_unlock_irqrestore(&atchan->lock, flags);
1085	1084	}
1086	1085

drivers/dma/dw_dmac.c+19−4

@@ -1001,6 +1001,13 @@ static inline void convert_burst(u32 *maxburst) · 1000 unmodified lines
1001	1001	*maxburst = 0;
1002	1002	}
1003	1003
	1004	+static inline void convert_slave_id(struct dw_dma_chan *dwc)
	1005	+{
	1006	+ struct dw_dma *dw = to_dw_dma(dwc->chan.device);
	1007	+
	1008	+ dwc->dma_sconfig.slave_id -= dw->request_line_base;
	1009	+}
	1010	+
1004	1011	static int
1005	1012	set_runtime_config(struct dma_chan chan, struct dma_slave_config sconfig)
1006	1013	{
@@ -1015,6 +1022,7 @@ set_runtime_config(struct dma_chan chan, struct dma_slave_config sconfig) · 8 unmodified lines
1015	1022
1016	1023	convert_burst(&dwc->dma_sconfig.src_maxburst);
1017	1024	convert_burst(&dwc->dma_sconfig.dst_maxburst);
	1025	+ convert_slave_id(dwc);
1018	1026
1019	1027	return 0;
1020	1028	}
@@ -1276,9 +1284,9 @@ static struct dma_chan dw_dma_xlate(struct of_phandle_args dma_spec, · 255 unmodified lines
1276	1284	if (dma_spec->args_count != 3)
1277	1285	return NULL;
1278	1286
1279		− fargs.req = be32_to_cpup(dma_spec->args+0);
1280		− fargs.src = be32_to_cpup(dma_spec->args+1);
1281		− fargs.dst = be32_to_cpup(dma_spec->args+2);
	1287	+ fargs.req = dma_spec->args[0];
	1288	+ fargs.src = dma_spec->args[1];
	1289	+ fargs.dst = dma_spec->args[2];
1282	1290
1283	1291	if (WARN_ON(fargs.req >= DW_DMA_MAX_NR_REQUESTS \|\|
1284	1292	fargs.src >= dw->nr_masters \|\|
@@ -1628,6 +1636,7 @@ dw_dma_parse_dt(struct platform_device *pdev) · 343 unmodified lines
1628	1636
1629	1637	static int dw_probe(struct platform_device *pdev)
1630	1638	{
	1639	+ const struct platform_device_id *match;
1631	1640	struct dw_dma_platform_data *pdata;
1632	1641	struct resource *io;
1633	1642	struct dw_dma *dw;
@@ -1711,6 +1720,11 @@ static int dw_probe(struct platform_device *pdev) · 77 unmodified lines
1711	1720	memcpy(dw->data_width, pdata->data_width, 4);
1712	1721	}
1713	1722
	1723	+ /* Get the base request line if set */
	1724	+ match = platform_get_device_id(pdev);
	1725	+ if (match)
	1726	+ dw->request_line_base = (unsigned int)match->driver_data;
	1727	+
1714	1728	/* Calculate all channel mask before DMA setup */
1715	1729	dw->all_chan_mask = (1 << nr_channels) - 1;
1716	1730
@@ -1906,7 +1920,8 @@ MODULE_DEVICE_TABLE(of, dw_dma_id_table); · 189 unmodified lines
1906	1920	#endif
1907	1921
1908	1922	static const struct platform_device_id dw_dma_ids[] = {
1909		− { "INTL9C60", 0 },
	1923	+ /* Name, Request Line Base */
	1924	+ { "INTL9C60", (kernel_ulong_t)16 },
1910	1925	{ }
1911	1926	};
1912	1927

drivers/dma/dw_dmac_regs.h+1−0

@@ -247,6 +247,7 @@ struct dw_dma { · 246 unmodified lines
247	247	/* hardware configuration */
248	248	unsigned char nr_masters;
249	249	unsigned char data_width[4];
	250	+ unsigned int request_line_base;
250	251
251	252	struct dw_dma_chan chan[0];
252	253	};

drivers/dma/omap-dma.c+14−6

@@ -276,12 +276,20 @@ static void omap_dma_issue_pending(struct dma_chan *chan) · 275 unmodified lines
276	276
277	277	spin_lock_irqsave(&c->vc.lock, flags);
278	278	if (vchan_issue_pending(&c->vc) && !c->desc) {
279		− struct omap_dmadev *d = to_omap_dma_dev(chan->device);
280		− spin_lock(&d->lock);
281		− if (list_empty(&c->node))
282		− list_add_tail(&c->node, &d->pending);
283		− spin_unlock(&d->lock);
284		− tasklet_schedule(&d->task);
	279	+ /*
	280	+ * c->cyclic is used only by audio and in this case the DMA need
	281	+ * to be started without delay.
	282	+ */
	283	+ if (!c->cyclic) {
	284	+ struct omap_dmadev *d = to_omap_dma_dev(chan->device);
	285	+ spin_lock(&d->lock);
	286	+ if (list_empty(&c->node))
	287	+ list_add_tail(&c->node, &d->pending);
	288	+ spin_unlock(&d->lock);
	289	+ tasklet_schedule(&d->task);
	290	+ } else {
	291	+ omap_dma_start_desc(c);
	292	+ }
285	293	}
286	294	spin_unlock_irqrestore(&c->vc.lock, flags);
287	295	}

drivers/dma/pl330.c+27−11

@@ -2882,7 +2882,7 @@ pl330_probe(struct amba_device adev, const struct amba_id id) · 2881 unmodified lines
2882	2882	{
2883	2883	struct dma_pl330_platdata *pdat;
2884	2884	struct dma_pl330_dmac *pdmac;
2885		− struct dma_pl330_chan *pch;
	2885	+ struct dma_pl330_chan pch, _p;
2886	2886	struct pl330_info *pi;
2887	2887	struct dma_device *pd;
2888	2888	struct resource *res;
@@ -2984,7 +2984,16 @@ pl330_probe(struct amba_device adev, const struct amba_id id) · 95 unmodified lines
2984	2984	ret = dma_async_device_register(pd);
2985	2985	if (ret) {
2986	2986	dev_err(&adev->dev, "unable to register DMAC\n");
2987		− goto probe_err2;
	2987	+ goto probe_err3;
	2988	+ }
	2989	+
	2990	+ if (adev->dev.of_node) {
	2991	+ ret = of_dma_controller_register(adev->dev.of_node,
	2992	+ of_dma_pl330_xlate, pdmac);
	2993	+ if (ret) {
	2994	+ dev_err(&adev->dev,
	2995	+ "unable to register DMA to the generic DT DMA helpers\n");
	2996	+ }
2988	2997	}
2989	2998
2990	2999	dev_info(&adev->dev,
@@ -2995,16 +3004,21 @@ pl330_probe(struct amba_device adev, const struct amba_id id) · 4 unmodified lines
2995	3004	pi->pcfg.data_bus_width / 8, pi->pcfg.num_chan,
2996	3005	pi->pcfg.num_peri, pi->pcfg.num_events);
2997	3006
2998		− ret = of_dma_controller_register(adev->dev.of_node,
2999		− of_dma_pl330_xlate, pdmac);
3000		− if (ret) {
3001		− dev_err(&adev->dev,
3002		− "unable to register DMA to the generic DT DMA helpers\n");
3003		− goto probe_err2;
3004		− }
3005		−
3006	3007	return 0;
	3008	+probe_err3:
	3009	+ amba_set_drvdata(adev, NULL);
3007	3010
	3011	+ /* Idle the DMAC */
	3012	+ list_for_each_entry_safe(pch, _p, &pdmac->ddma.channels,
	3013	+ chan.device_node) {
	3014	+
	3015	+ /* Remove the channel */
	3016	+ list_del(&pch->chan.device_node);
	3017	+
	3018	+ /* Flush the channel */
	3019	+ pl330_control(&pch->chan, DMA_TERMINATE_ALL, 0);
	3020	+ pl330_free_chan_resources(&pch->chan);
	3021	+ }
3008	3022	probe_err2:
3009	3023	pl330_del(pi);
3010	3024	probe_err1:
@@ -3023,8 +3037,10 @@ static int pl330_remove(struct amba_device *adev) · 12 unmodified lines
3023	3037	if (!pdmac)
3024	3038	return 0;
3025	3039
3026		− of_dma_controller_free(adev->dev.of_node);
	3040	+ if (adev->dev.of_node)
	3041	+ of_dma_controller_free(adev->dev.of_node);
3027	3042
	3043	+ dma_async_device_unregister(&pdmac->ddma);
3028	3044	amba_set_drvdata(adev, NULL);
3029	3045
3030	3046	/* Idle the DMAC */

drivers/edac/amd64_edac.c+9−6

@@ -2048,12 +2048,18 @@ static int init_csrows(struct mem_ctl_info *mci) · 2047 unmodified lines
2048	2048	edac_dbg(1, "MC node: %d, csrow: %d\n",
2049	2049	pvt->mc_node_id, i);
2050	2050
2051		− if (row_dct0)
	2051	+ if (row_dct0) {
2052	2052	nr_pages = amd64_csrow_nr_pages(pvt, 0, i);
	2053	+ csrow->channels[0]->dimm->nr_pages = nr_pages;
	2054	+ }
2053	2055
2054	2056	/* K8 has only one DCT */
2055		− if (boot_cpu_data.x86 != 0xf && row_dct1)
2056		− nr_pages += amd64_csrow_nr_pages(pvt, 1, i);
	2057	+ if (boot_cpu_data.x86 != 0xf && row_dct1) {
	2058	+ int row_dct1_pages = amd64_csrow_nr_pages(pvt, 1, i);
	2059	+
	2060	+ csrow->channels[1]->dimm->nr_pages = row_dct1_pages;
	2061	+ nr_pages += row_dct1_pages;
	2062	+ }
2057	2063
2058	2064	mtype = amd64_determine_memory_type(pvt, i);
2059	2065
@@ -2072,9 +2078,7 @@ static int init_csrows(struct mem_ctl_info *mci) · 12 unmodified lines
2072	2078	dimm = csrow->channels[j]->dimm;
2073	2079	dimm->mtype = mtype;
2074	2080	dimm->edac_mode = edac_mode;
2075		− dimm->nr_pages = nr_pages;
2076	2081	}
2077		− csrow->nr_pages = nr_pages;
2078	2082	}
2079	2083
2080	2084	return empty;
@@ -2419,7 +2423,6 @@ static int amd64_init_one_instance(struct pci_dev *F2) · 338 unmodified lines
2419	2423
2420	2424	mci->pvt_info = pvt;
2421	2425	mci->pdev = &pvt->F2->dev;
2422		− mci->csbased = 1;
2423	2426
2424	2427	setup_mci_misc_attrs(mci, fam_type);
2425	2428

drivers/edac/edac_mc.c+3−3

@@ -86,7 +86,7 @@ static void edac_mc_dump_dimm(struct dimm_info *dimm, int number) · 85 unmodified lines
86	86	edac_dimm_info_location(dimm, location, sizeof(location));
87	87
88	88	edac_dbg(4, "%s%i: %smapped as virtual row %d, chan %d\n",
89		− dimm->mci->mem_is_per_rank ? "rank" : "dimm",
	89	+ dimm->mci->csbased ? "rank" : "dimm",
90	90	number, location, dimm->csrow, dimm->cschannel);
91	91	edac_dbg(4, " dimm = %p\n", dimm);
92	92	edac_dbg(4, " dimm->label = '%s'\n", dimm->label);
@@ -341,7 +341,7 @@ struct mem_ctl_info *edac_mc_alloc(unsigned mc_num, · 248 unmodified lines
341	341	memcpy(mci->layers, layers, sizeof(layer) n_layers);
342	342	mci->nr_csrows = tot_csrows;
343	343	mci->num_cschannel = tot_channels;
344		− mci->mem_is_per_rank = per_rank;
	344	+ mci->csbased = per_rank;
345	345
346	346	/*
347	347	* Alocate and fill the csrow/channels structs
@@ -1235,7 +1235,7 @@ void edac_mc_handle_error(const enum hw_event_mc_err_type type, · 887 unmodified lines
1235	1235	* incrementing the compat API counters
1236	1236	*/
1237	1237	edac_dbg(4, "%s csrows map: (%d,%d)\n",
1238		− mci->mem_is_per_rank ? "rank" : "dimm",
	1238	+ mci->csbased ? "rank" : "dimm",
1239	1239	dimm->csrow, dimm->cschannel);
1240	1240	if (row == -1)
1241	1241	row = dimm->csrow;

drivers/edac/edac_mc_sysfs.c+5−12

@@ -143,7 +143,7 @@ static const char *edac_caps[] = { · 142 unmodified lines
143	143	* and the per-dimm/per-rank one
144	144	*/
145	145	#define DEVICE_ATTR_LEGACY(_name, _mode, _show, _store) \
146		− struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store)
	146	+ static struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store)
147	147
148	148	struct dev_ch_attribute {
149	149	struct device_attribute attr;
@@ -180,9 +180,6 @@ static ssize_t csrow_size_show(struct device *dev, · 30 unmodified lines
180	180	int i;
181	181	u32 nr_pages = 0;
182	182
183		− if (csrow->mci->csbased)
184		− return sprintf(data, "%u\n", PAGES_TO_MiB(csrow->nr_pages));
185		−
186	183	for (i = 0; i < csrow->nr_channels; i++)
187	184	nr_pages += csrow->channels[i]->dimm->nr_pages;
188	185	return sprintf(data, "%u\n", PAGES_TO_MiB(nr_pages));
@@ -612,7 +609,7 @@ static int edac_create_dimm_object(struct mem_ctl_info *mci, · 423 unmodified lines
612	609	device_initialize(&dimm->dev);
613	610
614	611	dimm->dev.parent = &mci->dev;
615		− if (mci->mem_is_per_rank)
	612	+ if (mci->csbased)
616	613	dev_set_name(&dimm->dev, "rank%d", index);
617	614	else
618	615	dev_set_name(&dimm->dev, "dimm%d", index);
@@ -778,14 +775,10 @@ static ssize_t mci_size_mb_show(struct device *dev, · 159 unmodified lines
778	775	for (csrow_idx = 0; csrow_idx < mci->nr_csrows; csrow_idx++) {
779	776	struct csrow_info *csrow = mci->csrows[csrow_idx];
780	777
781		− if (csrow->mci->csbased) {
782		− total_pages += csrow->nr_pages;
783		− } else {
784		− for (j = 0; j < csrow->nr_channels; j++) {
785		− struct dimm_info *dimm = csrow->channels[j]->dimm;
	778	+ for (j = 0; j < csrow->nr_channels; j++) {
	779	+ struct dimm_info *dimm = csrow->channels[j]->dimm;
786	780
787		− total_pages += dimm->nr_pages;
788		− }
	781	+ total_pages += dimm->nr_pages;
789	782	}
790	783	}
791	784

drivers/eisa/pci_eisa.c+46−21

@@ -19,10 +19,10 @@ · 18 unmodified lines
19	19	/* There is only one pci_eisa device per machine, right ? */
20	20	static struct eisa_root_device pci_eisa_root;
21	21
22		−static int __init pci_eisa_init(struct pci_dev *pdev,
23		− const struct pci_device_id *ent)
	22	+static int __init pci_eisa_init(struct pci_dev *pdev)
24	23	{
25		− int rc;
	24	+ int rc, i;
	25	+ struct resource res, bus_res = NULL;
26	26
27	27	if ((rc = pci_enable_device (pdev))) {
28	28	printk (KERN_ERR "pci_eisa : Could not enable device %s\n",
@@ -30,9 +30,30 @@ static int __init pci_eisa_init(struct pci_dev *pdev, · 1 unmodified line
30	30	return rc;
31	31	}
32	32
	33	+ /*
	34	+ * The Intel 82375 PCI-EISA bridge is a subtractive-decode PCI
	35	+ * device, so the resources available on EISA are the same as those
	36	+ * available on the 82375 bus. This works the same as a PCI-PCI
	37	+ * bridge in subtractive-decode mode (see pci_read_bridge_bases()).
	38	+ * We assume other PCI-EISA bridges are similar.
	39	+ *
	40	+ * eisa_root_register() can only deal with a single io port resource,
	41	+ * so we use the first valid io port resource.
	42	+ */
	43	+ pci_bus_for_each_resource(pdev->bus, res, i)
	44	+ if (res && (res->flags & IORESOURCE_IO)) {
	45	+ bus_res = res;
	46	+ break;
	47	+ }
	48	+
	49	+ if (!bus_res) {
	50	+ dev_err(&pdev->dev, "No resources available\n");
	51	+ return -1;
	52	+ }
	53	+
33	54	pci_eisa_root.dev = &pdev->dev;
34		− pci_eisa_root.res = pdev->bus->resource[0];
35		− pci_eisa_root.bus_base_addr = pdev->bus->resource[0]->start;
	55	+ pci_eisa_root.res = bus_res;
	56	+ pci_eisa_root.bus_base_addr = bus_res->start;
36	57	pci_eisa_root.slots = EISA_MAX_SLOTS;
37	58	pci_eisa_root.dma_mask = pdev->dma_mask;
38	59	dev_set_drvdata(pci_eisa_root.dev, &pci_eisa_root);
@@ -45,22 +66,26 @@ static int __init pci_eisa_init(struct pci_dev *pdev, · 6 unmodified lines
45	66	return 0;
46	67	}
47	68
48		−static struct pci_device_id pci_eisa_pci_tbl[] = {
49		− { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
50		− PCI_CLASS_BRIDGE_EISA << 8, 0xffff00, 0 },
51		− { 0, }
52		−};
	69	+/*
	70	+ * We have to call pci_eisa_init_early() before pnpacpi_init()/isapnp_init().
	71	+ * Otherwise pnp resource will get enabled early and could prevent eisa
	72	+ * to be initialized.
	73	+ * Also need to make sure pci_eisa_init_early() is called after
	74	+ * x86/pci_subsys_init().
	75	+ * So need to use subsys_initcall_sync with it.
	76	+ */
	77	+static int __init pci_eisa_init_early(void)
	78	+{
	79	+ struct pci_dev *dev = NULL;
	80	+ int ret;
53	81
54		−static struct pci_driver __refdata pci_eisa_driver = {
55		− .name = "pci_eisa",
56		− .id_table = pci_eisa_pci_tbl,
57		− .probe = pci_eisa_init,
58		−};
	82	+ for_each_pci_dev(dev)
	83	+ if ((dev->class >> 8) == PCI_CLASS_BRIDGE_EISA) {
	84	+ ret = pci_eisa_init(dev);
	85	+ if (ret)
	86	+ return ret;
	87	+ }
59	88
60		−static int __init pci_eisa_init_module (void)
61		−{
62		− return pci_register_driver (&pci_eisa_driver);
	89	+ return 0;
63	90	}
64		−
65		−device_initcall(pci_eisa_init_module);
66		−MODULE_DEVICE_TABLE(pci, pci_eisa_pci_tbl);
	91	+subsys_initcall_sync(pci_eisa_init_early);

drivers/extcon/extcon-max77693.c+80−23

@@ -32,6 +32,38 @@ · 31 unmodified lines
32	32	#define DEV_NAME "max77693-muic"
33	33	#define DELAY_MS_DEFAULT 20000 /* unit: millisecond */
34	34
	35	+/*
	36	+ * Default value of MAX77693 register to bring up MUIC device.
	37	+ * If user don't set some initial value for MUIC device through platform data,
	38	+ * extcon-max77693 driver use 'default_init_data' to bring up base operation
	39	+ * of MAX77693 MUIC device.
	40	+ */
	41	+struct max77693_reg_data default_init_data[] = {
	42	+ {
	43	+ /* STATUS2 - [3]ChgDetRun */
	44	+ .addr = MAX77693_MUIC_REG_STATUS2,
	45	+ .data = STATUS2_CHGDETRUN_MASK,
	46	+ }, {
	47	+ /* INTMASK1 - Unmask [3]ADC1KM,[0]ADCM */
	48	+ .addr = MAX77693_MUIC_REG_INTMASK1,
	49	+ .data = INTMASK1_ADC1K_MASK
	50	+ \| INTMASK1_ADC_MASK,
	51	+ }, {
	52	+ /* INTMASK2 - Unmask [0]ChgTypM */
	53	+ .addr = MAX77693_MUIC_REG_INTMASK2,
	54	+ .data = INTMASK2_CHGTYP_MASK,
	55	+ }, {
	56	+ /* INTMASK3 - Mask all of interrupts */
	57	+ .addr = MAX77693_MUIC_REG_INTMASK3,
	58	+ .data = 0x0,
	59	+ }, {
	60	+ /* CDETCTRL2 */
	61	+ .addr = MAX77693_MUIC_REG_CDETCTRL2,
	62	+ .data = CDETCTRL2_VIDRMEN_MASK
	63	+ \| CDETCTRL2_DXOVPEN_MASK,
	64	+ },
	65	+};
	66	+
35	67	enum max77693_muic_adc_debounce_time {
36	68	ADC_DEBOUNCE_TIME_5MS = 0,
37	69	ADC_DEBOUNCE_TIME_10MS,
@@ -1045,8 +1077,9 @@ static int max77693_muic_probe(struct platform_device *pdev) · 1007 unmodified lines
1045	1077	{
1046	1078	struct max77693_dev *max77693 = dev_get_drvdata(pdev->dev.parent);
1047	1079	struct max77693_platform_data *pdata = dev_get_platdata(max77693->dev);
1048		− struct max77693_muic_platform_data *muic_pdata = pdata->muic_data;
1049	1080	struct max77693_muic_info *info;
	1081	+ struct max77693_reg_data *init_data;
	1082	+ int num_init_data;
1050	1083	int delay_jiffies;
1051	1084	int ret;
1052	1085	int i;
@@ -1145,15 +1178,25 @@ static int max77693_muic_probe(struct platform_device *pdev) · 92 unmodified lines
1145	1178	goto err_irq;
1146	1179	}
1147	1180
1148		− /* Initialize MUIC register by using platform data */
1149		− for (i = 0 ; i < muic_pdata->num_init_data ; i++) {
1150		− enum max77693_irq_source irq_src = MAX77693_IRQ_GROUP_NR;
	1181	+
	1182	+ /* Initialize MUIC register by using platform data or default data */
	1183	+ if (pdata->muic_data) {
	1184	+ init_data = pdata->muic_data->init_data;
	1185	+ num_init_data = pdata->muic_data->num_init_data;
	1186	+ } else {
	1187	+ init_data = default_init_data;
	1188	+ num_init_data = ARRAY_SIZE(default_init_data);
	1189	+ }
	1190	+
	1191	+ for (i = 0 ; i < num_init_data ; i++) {
	1192	+ enum max77693_irq_source irq_src
	1193	+ = MAX77693_IRQ_GROUP_NR;
1151	1194
1152	1195	max77693_write_reg(info->max77693->regmap_muic,
1153		− muic_pdata->init_data[i].addr,
1154		− muic_pdata->init_data[i].data);
	1196	+ init_data[i].addr,
	1197	+ init_data[i].data);
1155	1198
1156		− switch (muic_pdata->init_data[i].addr) {
	1199	+ switch (init_data[i].addr) {
1157	1200	case MAX77693_MUIC_REG_INTMASK1:
1158	1201	irq_src = MUIC_INT1;
1159	1202	break;
@@ -1167,22 +1210,40 @@ static int max77693_muic_probe(struct platform_device *pdev) · 7 unmodified lines
1167	1210
1168	1211	if (irq_src < MAX77693_IRQ_GROUP_NR)
1169	1212	info->max77693->irq_masks_cur[irq_src]
1170		− = muic_pdata->init_data[i].data;
	1213	+ = init_data[i].data;
1171	1214	}
1172	1215
1173		− /*
1174		− * Default usb/uart path whether UART/USB or AUX_UART/AUX_USB
1175		− * h/w path of COMP2/COMN1 on CONTROL1 register.
1176		− */
1177		− if (muic_pdata->path_uart)
1178		− info->path_uart = muic_pdata->path_uart;
1179		− else
1180		− info->path_uart = CONTROL1_SW_UART;
	1216	+ if (pdata->muic_data) {
	1217	+ struct max77693_muic_platform_data *muic_pdata = pdata->muic_data;
1181	1218
1182		− if (muic_pdata->path_usb)
1183		− info->path_usb = muic_pdata->path_usb;
1184		− else
	1219	+ /*
	1220	+ * Default usb/uart path whether UART/USB or AUX_UART/AUX_USB
	1221	+ * h/w path of COMP2/COMN1 on CONTROL1 register.
	1222	+ */
	1223	+ if (muic_pdata->path_uart)
	1224	+ info->path_uart = muic_pdata->path_uart;
	1225	+ else
	1226	+ info->path_uart = CONTROL1_SW_UART;
	1227	+
	1228	+ if (muic_pdata->path_usb)
	1229	+ info->path_usb = muic_pdata->path_usb;
	1230	+ else
	1231	+ info->path_usb = CONTROL1_SW_USB;
	1232	+
	1233	+ /*
	1234	+ * Default delay time for detecting cable state
	1235	+ * after certain time.
	1236	+ */
	1237	+ if (muic_pdata->detcable_delay_ms)
	1238	+ delay_jiffies =
	1239	+ msecs_to_jiffies(muic_pdata->detcable_delay_ms);
	1240	+ else
	1241	+ delay_jiffies = msecs_to_jiffies(DELAY_MS_DEFAULT);
	1242	+ } else {
1185	1243	info->path_usb = CONTROL1_SW_USB;
	1244	+ info->path_uart = CONTROL1_SW_UART;
	1245	+ delay_jiffies = msecs_to_jiffies(DELAY_MS_DEFAULT);
	1246	+ }
1186	1247
1187	1248	/* Set initial path for UART */
1188	1249	max77693_muic_set_path(info, info->path_uart, true);
@@ -1208,10 +1269,6 @@ static int max77693_muic_probe(struct platform_device *pdev) · 19 unmodified lines
1208	1269	* driver should notify cable state to upper layer.
1209	1270	*/
1210	1271	INIT_DELAYED_WORK(&info->wq_detcable, max77693_muic_detect_cable_wq);
1211		− if (muic_pdata->detcable_delay_ms)
1212		− delay_jiffies = msecs_to_jiffies(muic_pdata->detcable_delay_ms);
1213		− else
1214		− delay_jiffies = msecs_to_jiffies(DELAY_MS_DEFAULT);
1215	1272	schedule_delayed_work(&info->wq_detcable, delay_jiffies);
1216	1273
1217	1274	return ret;

drivers/extcon/extcon-max8997.c+34−22

@@ -712,29 +712,45 @@ static int max8997_muic_probe(struct platform_device *pdev) · 711 unmodified lines
712	712	goto err_irq;
713	713	}
714	714
715		− /* Initialize registers according to platform data */
716	715	if (pdata->muic_pdata) {
717		− struct max8997_muic_platform_data *mdata = info->muic_pdata;
718		−
719		− for (i = 0; i < mdata->num_init_data; i++) {
720		− max8997_write_reg(info->muic, mdata->init_data[i].addr,
721		− mdata->init_data[i].data);
	716	+ struct max8997_muic_platform_data *muic_pdata
	717	+ = pdata->muic_pdata;
	718	+
	719	+ /* Initialize registers according to platform data */
	720	+ for (i = 0; i < muic_pdata->num_init_data; i++) {
	721	+ max8997_write_reg(info->muic,
	722	+ muic_pdata->init_data[i].addr,
	723	+ muic_pdata->init_data[i].data);
722	724	}
723		− }
724	725
725		− /*
726		− * Default usb/uart path whether UART/USB or AUX_UART/AUX_USB
727		− * h/w path of COMP2/COMN1 on CONTROL1 register.
728		− */
729		− if (pdata->muic_pdata->path_uart)
730		− info->path_uart = pdata->muic_pdata->path_uart;
731		− else
732		− info->path_uart = CONTROL1_SW_UART;
	726	+ /*
	727	+ * Default usb/uart path whether UART/USB or AUX_UART/AUX_USB
	728	+ * h/w path of COMP2/COMN1 on CONTROL1 register.
	729	+ */
	730	+ if (muic_pdata->path_uart)
	731	+ info->path_uart = muic_pdata->path_uart;
	732	+ else
	733	+ info->path_uart = CONTROL1_SW_UART;
733	734
734		− if (pdata->muic_pdata->path_usb)
735		− info->path_usb = pdata->muic_pdata->path_usb;
736		− else
	735	+ if (muic_pdata->path_usb)
	736	+ info->path_usb = muic_pdata->path_usb;
	737	+ else
	738	+ info->path_usb = CONTROL1_SW_USB;
	739	+
	740	+ /*
	741	+ * Default delay time for detecting cable state
	742	+ * after certain time.
	743	+ */
	744	+ if (muic_pdata->detcable_delay_ms)
	745	+ delay_jiffies =
	746	+ msecs_to_jiffies(muic_pdata->detcable_delay_ms);
	747	+ else
	748	+ delay_jiffies = msecs_to_jiffies(DELAY_MS_DEFAULT);
	749	+ } else {
	750	+ info->path_uart = CONTROL1_SW_UART;
737	751	info->path_usb = CONTROL1_SW_USB;
	752	+ delay_jiffies = msecs_to_jiffies(DELAY_MS_DEFAULT);
	753	+ }
738	754
739	755	/* Set initial path for UART */
740	756	max8997_muic_set_path(info, info->path_uart, true);
@@ -751,10 +767,6 @@ static int max8997_muic_probe(struct platform_device *pdev) · 10 unmodified lines
751	767	* driver should notify cable state to upper layer.
752	768	*/
753	769	INIT_DELAYED_WORK(&info->wq_detcable, max8997_muic_detect_cable_wq);
754		− if (pdata->muic_pdata->detcable_delay_ms)
755		− delay_jiffies = msecs_to_jiffies(pdata->muic_pdata->detcable_delay_ms);
756		− else
757		− delay_jiffies = msecs_to_jiffies(DELAY_MS_DEFAULT);
758	770	schedule_delayed_work(&info->wq_detcable, delay_jiffies);
759	771
760	772	return 0;

drivers/firmware/Kconfig+19−0

@@ -39,6 +39,7 @@ config FIRMWARE_MEMMAP · 38 unmodified lines
39	39	config EFI_VARS
40	40	tristate "EFI Variable Support via sysfs"
41	41	depends on EFI
	42	+ select UCS2_STRING
42	43	default n
43	44	help
44	45	If you say Y here, you are able to get EFI (Extensible Firmware
@@ -53,6 +54,24 @@ config EFI_VARS · 8 unmodified lines
53	54	Subsequent efibootmgr releases may be found at:
54	55	<http://linux.dell.com/efibootmgr>
55	56
	57	+config EFI_VARS_PSTORE
	58	+ bool "Register efivars backend for pstore"
	59	+ depends on EFI_VARS && PSTORE
	60	+ default y
	61	+ help
	62	+ Say Y here to enable use efivars as a backend to pstore. This
	63	+ will allow writing console messages, crash dumps, or anything
	64	+ else supported by pstore to EFI variables.
	65	+
	66	+config EFI_VARS_PSTORE_DEFAULT_DISABLE
	67	+ bool "Disable using efivars as a pstore backend by default"
	68	+ depends on EFI_VARS_PSTORE
	69	+ default n
	70	+ help
	71	+ Saying Y here will disable the use of efivars as a storage
	72	+ backend for pstore by default. This setting can be overridden
	73	+ using the efivars module's pstore_disable parameter.
	74	+
56	75	config EFI_PCDP
57	76	bool "Console device selection via EFI PCDP or HCDP table"
58	77	depends on ACPI && EFI && IA64

drivers/firmware/efivars.c+125−123

@@ -80,6 +80,7 @@ · 79 unmodified lines
80	80	#include <linux/slab.h>
81	81	#include <linux/pstore.h>
82	82	#include <linux/ctype.h>
	83	+#include <linux/ucs2_string.h>
83	84
84	85	#include <linux/fs.h>
85	86	#include <linux/ramfs.h>
@@ -103,6 +104,11 @@ MODULE_VERSION(EFIVARS_VERSION); · 17 unmodified lines
103	104	*/
104	105	#define GUID_LEN 36
105	106
	107	+static bool efivars_pstore_disable =
	108	+ IS_ENABLED(CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE);
	109	+
	110	+module_param_named(pstore_disable, efivars_pstore_disable, bool, 0644);
	111	+
106	112	/*
107	113	* The maximum size of VariableName + Data = 1024
108	114	* Therefore, it's reasonable to save that much
@@ -165,51 +171,7 @@ efivar_create_sysfs_entry(struct efivars *efivars, · 56 unmodified lines
165	171
166	172	static void efivar_update_sysfs_entries(struct work_struct *);
167	173	static DECLARE_WORK(efivar_work, efivar_update_sysfs_entries);
168		−
169		−/* Return the number of unicode characters in data */
170		−static unsigned long
171		−utf16_strnlen(efi_char16_t *s, size_t maxlength)
172		−{
173		− unsigned long length = 0;
174		−
175		− while (*s++ != 0 && length < maxlength)
176		− length++;
177		− return length;
178		−}
179		−
180		−static inline unsigned long
181		−utf16_strlen(efi_char16_t *s)
182		−{
183		− return utf16_strnlen(s, ~0UL);
184		−}
185		−
186		−/*
187		− * Return the number of bytes is the length of this string
188		− * Note: this is NOT the same as the number of unicode characters
189		− */
190		−static inline unsigned long
191		−utf16_strsize(efi_char16_t *data, unsigned long maxlength)
192		−{
193		− return utf16_strnlen(data, maxlength/sizeof(efi_char16_t)) * sizeof(efi_char16_t);
194		−}
195		−
196		−static inline int
197		−utf16_strncmp(const efi_char16_t a, const efi_char16_t b, size_t len)
198		−{
199		− while (1) {
200		− if (len == 0)
201		− return 0;
202		− if (a < b)
203		− return -1;
204		− if (a > b)
205		− return 1;
206		− if (a == 0) / implies b == 0 /
207		− return 0;
208		− a++;
209		− b++;
210		− len--;
211		− }
212		−}
	174	+static bool efivar_wq_enabled = true;
213	175
214	176	static bool
215	177	validate_device_path(struct efi_variable var, int match, u8 buffer,
@@ -262,7 +224,7 @@ validate_load_option(struct efi_variable var, int match, u8 buffer, · 46 unmodified lines
262	224	u16 filepathlength;
263	225	int i, desclength = 0, namelen;
264	226
265		− namelen = utf16_strnlen(var->VariableName, sizeof(var->VariableName));
	227	+ namelen = ucs2_strnlen(var->VariableName, sizeof(var->VariableName));
266	228
267	229	/* Either "Boot" or "Driver" followed by four digits of hex */
268	230	for (i = match; i < match+4; i++) {
@@ -285,7 +247,7 @@ validate_load_option(struct efi_variable var, int match, u8 buffer, · 16 unmodified lines
285	247	* There's no stored length for the description, so it has to be
286	248	* found by hand
287	249	*/
288		− desclength = utf16_strsize((efi_char16_t *)(buffer + 6), len - 6) + 2;
	250	+ desclength = ucs2_strsize((efi_char16_t *)(buffer + 6), len - 6) + 2;
289	251
290	252	/* Each boot entry must have a descriptor */
291	253	if (!desclength)
@@ -430,24 +392,12 @@ static efi_status_t · 138 unmodified lines
430	392	check_var_size_locked(struct efivars *efivars, u32 attributes,
431	393	unsigned long size)
432	394	{
433		− u64 storage_size, remaining_size, max_size;
434		− efi_status_t status;
435	395	const struct efivar_operations *fops = efivars->ops;
436	396
437		− if (!efivars->ops->query_variable_info)
	397	+ if (!efivars->ops->query_variable_store)
438	398	return EFI_UNSUPPORTED;
439	399
440		− status = fops->query_variable_info(attributes, &storage_size,
441		− &remaining_size, &max_size);
442		−
443		− if (status != EFI_SUCCESS)
444		− return status;
445		−
446		− if (!storage_size \|\| size > remaining_size \|\| size > max_size \|\|
447		− (remaining_size - size) < (storage_size / 2))
448		− return EFI_OUT_OF_RESOURCES;
449		−
450		− return status;
	400	+ return fops->query_variable_store(attributes, size);
451	401	}
452	402
453	403
@@ -587,7 +537,7 @@ efivar_store_raw(struct efivar_entry entry, const char buf, size_t count) · 133 unmodified lines
587	537	spin_lock_irq(&efivars->lock);
588	538
589	539	status = check_var_size_locked(efivars, new_var->Attributes,
590		− new_var->DataSize + utf16_strsize(new_var->VariableName, 1024));
	540	+ new_var->DataSize + ucs2_strsize(new_var->VariableName, 1024));
591	541
592	542	if (status == EFI_SUCCESS \|\| status == EFI_UNSUPPORTED)
593	543	status = efivars->ops->set_variable(new_var->VariableName,
@@ -765,7 +715,7 @@ static ssize_t efivarfs_file_write(struct file *file, · 171 unmodified lines
765	715	* QueryVariableInfo() isn't supported by the firmware.
766	716	*/
767	717
768		− varsize = datasize + utf16_strsize(var->var.VariableName, 1024);
	718	+ varsize = datasize + ucs2_strsize(var->var.VariableName, 1024);
769	719	status = check_var_size(efivars, attributes, varsize);
770	720
771	721	if (status != EFI_SUCCESS) {
@@ -1217,7 +1167,7 @@ static int efivarfs_fill_super(struct super_block sb, void data, int silent) · 445 unmodified lines
1217	1167
1218	1168	inode = NULL;
1219	1169
1220		− len = utf16_strlen(entry->var.VariableName);
	1170	+ len = ucs2_strlen(entry->var.VariableName);
1221	1171
1222	1172	/* name, plus '-', plus GUID, plus NUL*/
1223	1173	name = kmalloc(len + 1 + GUID_LEN + 1, GFP_ATOMIC);
@@ -1309,9 +1259,7 @@ static const struct inode_operations efivarfs_dir_inode_operations = { · 85 unmodified lines
1309	1259	.create = efivarfs_create,
1310	1260	};
1311	1261
1312		−static struct pstore_info efi_pstore_info;
1313		−
1314		−#ifdef CONFIG_PSTORE
	1262	+#ifdef CONFIG_EFI_VARS_PSTORE
1315	1263
1316	1264	static int efi_pstore_open(struct pstore_info *psi)
1317	1265	{
@@ -1441,7 +1389,7 @@ static int efi_pstore_write(enum pstore_type_id type, · 123 unmodified lines
1441	1389
1442	1390	spin_unlock_irqrestore(&efivars->lock, flags);
1443	1391
1444		− if (reason == KMSG_DUMP_OOPS)
	1392	+ if (reason == KMSG_DUMP_OOPS && efivar_wq_enabled)
1445	1393	schedule_work(&efivar_work);
1446	1394
1447	1395	*id = part;
@@ -1477,8 +1425,8 @@ static int efi_pstore_erase(enum pstore_type_id type, u64 id, int count, · 29 unmodified lines
1477	1425
1478	1426	if (efi_guidcmp(entry->var.VendorGuid, vendor))
1479	1427	continue;
1480		− if (utf16_strncmp(entry->var.VariableName, efi_name,
1481		− utf16_strlen(efi_name))) {
	1428	+ if (ucs2_strncmp(entry->var.VariableName, efi_name,
	1429	+ ucs2_strlen(efi_name))) {
1482	1430	/*
1483	1431	* Check if an old format,
1484	1432	* which doesn't support holding
@@ -1490,8 +1438,8 @@ static int efi_pstore_erase(enum pstore_type_id type, u64 id, int count, · 5 unmodified lines
1490	1438	for (i = 0; i < DUMP_NAME_LEN; i++)
1491	1439	efi_name_old[i] = name_old[i];
1492	1440
1493		− if (utf16_strncmp(entry->var.VariableName, efi_name_old,
1494		− utf16_strlen(efi_name_old)))
	1441	+ if (ucs2_strncmp(entry->var.VariableName, efi_name_old,
	1442	+ ucs2_strlen(efi_name_old)))
1495	1443	continue;
1496	1444	}
1497	1445
@@ -1514,38 +1462,6 @@ static int efi_pstore_erase(enum pstore_type_id type, u64 id, int count, · 16 unmodified lines
1514	1462
1515	1463	return 0;
1516	1464	}
1517		−#else
1518		−static int efi_pstore_open(struct pstore_info *psi)
1519		−{
1520		− return 0;
1521		−}
1522		−
1523		−static int efi_pstore_close(struct pstore_info *psi)
1524		−{
1525		− return 0;
1526		−}
1527		−
1528		−static ssize_t efi_pstore_read(u64 id, enum pstore_type_id type, int *count,
1529		− struct timespec *timespec,
1530		− char *buf, struct pstore_info psi)
1531		−{
1532		− return -1;
1533		−}
1534		−
1535		−static int efi_pstore_write(enum pstore_type_id type,
1536		− enum kmsg_dump_reason reason, u64 *id,
1537		− unsigned int part, int count, size_t size,
1538		− struct pstore_info *psi)
1539		−{
1540		− return 0;
1541		−}
1542		−
1543		−static int efi_pstore_erase(enum pstore_type_id type, u64 id, int count,
1544		− struct timespec time, struct pstore_info *psi)
1545		−{
1546		− return 0;
1547		−}
1548		−#endif
1549	1465
1550	1466	static struct pstore_info efi_pstore_info = {
1551	1467	.owner = THIS_MODULE,
@@ -1557,6 +1473,24 @@ static struct pstore_info efi_pstore_info = { · 5 unmodified lines
1557	1473	.erase = efi_pstore_erase,
1558	1474	};
1559	1475
	1476	+static void efivar_pstore_register(struct efivars *efivars)
	1477	+{
	1478	+ efivars->efi_pstore_info = efi_pstore_info;
	1479	+ efivars->efi_pstore_info.buf = kmalloc(4096, GFP_KERNEL);
	1480	+ if (efivars->efi_pstore_info.buf) {
	1481	+ efivars->efi_pstore_info.bufsize = 1024;
	1482	+ efivars->efi_pstore_info.data = efivars;
	1483	+ spin_lock_init(&efivars->efi_pstore_info.buf_lock);
	1484	+ pstore_register(&efivars->efi_pstore_info);
	1485	+ }
	1486	+}
	1487	+#else
	1488	+static void efivar_pstore_register(struct efivars *efivars)
	1489	+{
	1490	+ return;
	1491	+}
	1492	+#endif
	1493	+
1560	1494	static ssize_t efivar_create(struct file filp, struct kobject kobj,
1561	1495	struct bin_attribute *bin_attr,
1562	1496	char *buf, loff_t pos, size_t count)
@@ -1583,8 +1517,8 @@ static ssize_t efivar_create(struct file filp, struct kobject kobj, · 20 unmodified lines
1583	1517	* Does this variable already exist?
1584	1518	*/
1585	1519	list_for_each_entry_safe(search_efivar, n, &efivars->list, list) {
1586		− strsize1 = utf16_strsize(search_efivar->var.VariableName, 1024);
1587		− strsize2 = utf16_strsize(new_var->VariableName, 1024);
	1520	+ strsize1 = ucs2_strsize(search_efivar->var.VariableName, 1024);
	1521	+ strsize2 = ucs2_strsize(new_var->VariableName, 1024);
1588	1522	if (strsize1 == strsize2 &&
1589	1523	!memcmp(&(search_efivar->var.VariableName),
1590	1524	new_var->VariableName, strsize1) &&
@@ -1600,7 +1534,7 @@ static ssize_t efivar_create(struct file filp, struct kobject kobj, · 9 unmodified lines
1600	1534	}
1601	1535
1602	1536	status = check_var_size_locked(efivars, new_var->Attributes,
1603		− new_var->DataSize + utf16_strsize(new_var->VariableName, 1024));
	1537	+ new_var->DataSize + ucs2_strsize(new_var->VariableName, 1024));
1604	1538
1605	1539	if (status && status != EFI_UNSUPPORTED) {
1606	1540	spin_unlock_irq(&efivars->lock);
@@ -1624,7 +1558,7 @@ static ssize_t efivar_create(struct file filp, struct kobject kobj, · 17 unmodified lines
1624	1558
1625	1559	/* Create the entry in sysfs. Locking is not required here */
1626	1560	status = efivar_create_sysfs_entry(efivars,
1627		− utf16_strsize(new_var->VariableName,
	1561	+ ucs2_strsize(new_var->VariableName,
1628	1562	1024),
1629	1563	new_var->VariableName,
1630	1564	&new_var->VendorGuid);
@@ -1654,8 +1588,8 @@ static ssize_t efivar_delete(struct file filp, struct kobject kobj, · 23 unmodified lines
1654	1588	* Does this variable already exist?
1655	1589	*/
1656	1590	list_for_each_entry_safe(search_efivar, n, &efivars->list, list) {
1657		− strsize1 = utf16_strsize(search_efivar->var.VariableName, 1024);
1658		− strsize2 = utf16_strsize(del_var->VariableName, 1024);
	1591	+ strsize1 = ucs2_strsize(search_efivar->var.VariableName, 1024);
	1592	+ strsize2 = ucs2_strsize(del_var->VariableName, 1024);
1659	1593	if (strsize1 == strsize2 &&
1660	1594	!memcmp(&(search_efivar->var.VariableName),
1661	1595	del_var->VariableName, strsize1) &&
@@ -1701,9 +1635,9 @@ static bool variable_is_present(efi_char16_t variable_name, efi_guid_t vendor) · 39 unmodified lines
1701	1635	unsigned long strsize1, strsize2;
1702	1636	bool found = false;
1703	1637
1704		− strsize1 = utf16_strsize(variable_name, 1024);
	1638	+ strsize1 = ucs2_strsize(variable_name, 1024);
1705	1639	list_for_each_entry_safe(entry, n, &efivars->list, list) {
1706		− strsize2 = utf16_strsize(entry->var.VariableName, 1024);
	1640	+ strsize2 = ucs2_strsize(entry->var.VariableName, 1024);
1707	1641	if (strsize1 == strsize2 &&
1708	1642	!memcmp(variable_name, &(entry->var.VariableName),
1709	1643	strsize2) &&
@@ -1716,6 +1650,31 @@ static bool variable_is_present(efi_char16_t variable_name, efi_guid_t vendor) · 6 unmodified lines
1716	1650	return found;
1717	1651	}
1718	1652
	1653	+/*
	1654	+ * Returns the size of variable_name, in bytes, including the
	1655	+ * terminating NULL character, or variable_name_size if no NULL
	1656	+ * character is found among the first variable_name_size bytes.
	1657	+ */
	1658	+static unsigned long var_name_strnsize(efi_char16_t *variable_name,
	1659	+ unsigned long variable_name_size)
	1660	+{
	1661	+ unsigned long len;
	1662	+ efi_char16_t c;
	1663	+
	1664	+ /*
	1665	+ * The variable name is, by definition, a NULL-terminated
	1666	+ * string, so make absolutely sure that variable_name_size is
	1667	+ * the value we expect it to be. If not, return the real size.
	1668	+ */
	1669	+ for (len = 2; len <= variable_name_size; len += sizeof(c)) {
	1670	+ c = variable_name[(len / sizeof(c)) - 1];
	1671	+ if (!c)
	1672	+ break;
	1673	+ }
	1674	+
	1675	+ return min(len, variable_name_size);
	1676	+}
	1677	+
1719	1678	static void efivar_update_sysfs_entries(struct work_struct *work)
1720	1679	{
1721	1680	struct efivars *efivars = &__efivars;
@@ -1756,10 +1715,13 @@ static void efivar_update_sysfs_entries(struct work_struct *work) · 34 unmodified lines
1756	1715	if (!found) {
1757	1716	kfree(variable_name);
1758	1717	break;
1759		− } else
	1718	+ } else {
	1719	+ variable_name_size = var_name_strnsize(variable_name,
	1720	+ variable_name_size);
1760	1721	efivar_create_sysfs_entry(efivars,
1761	1722	variable_name_size,
1762	1723	variable_name, &vendor);
	1724	+ }
1763	1725	}
1764	1726	}
1765	1727
@@ -1958,6 +1920,35 @@ void unregister_efivars(struct efivars *efivars) · 192 unmodified lines
1958	1920	}
1959	1921	EXPORT_SYMBOL_GPL(unregister_efivars);
1960	1922
	1923	+/*
	1924	+ * Print a warning when duplicate EFI variables are encountered and
	1925	+ * disable the sysfs workqueue since the firmware is buggy.
	1926	+ */
	1927	+static void dup_variable_bug(efi_char16_t s16, efi_guid_t vendor_guid,
	1928	+ unsigned long len16)
	1929	+{
	1930	+ size_t i, len8 = len16 / sizeof(efi_char16_t);
	1931	+ char *s8;
	1932	+
	1933	+ /*
	1934	+ * Disable the workqueue since the algorithm it uses for
	1935	+ * detecting new variables won't work with this buggy
	1936	+ * implementation of GetNextVariableName().
	1937	+ */
	1938	+ efivar_wq_enabled = false;
	1939	+
	1940	+ s8 = kzalloc(len8, GFP_KERNEL);
	1941	+ if (!s8)
	1942	+ return;
	1943	+
	1944	+ for (i = 0; i < len8; i++)
	1945	+ s8[i] = s16[i];
	1946	+
	1947	+ printk(KERN_WARNING "efivars: duplicate variable: %s-%pUl\n",
	1948	+ s8, vendor_guid);
	1949	+ kfree(s8);
	1950	+}
	1951	+
1961	1952	int register_efivars(struct efivars *efivars,
1962	1953	const struct efivar_operations *ops,
1963	1954	struct kobject *parent_kobj)
@@ -2006,6 +1997,24 @@ int register_efivars(struct efivars *efivars, · 42 unmodified lines
2006	1997	&vendor_guid);
2007	1998	switch (status) {
2008	1999	case EFI_SUCCESS:
	2000	+ variable_name_size = var_name_strnsize(variable_name,
	2001	+ variable_name_size);
	2002	+
	2003	+ /*
	2004	+ * Some firmware implementations return the
	2005	+ * same variable name on multiple calls to
	2006	+ * get_next_variable(). Terminate the loop
	2007	+ * immediately as there is no guarantee that
	2008	+ * we'll ever see a different variable name,
	2009	+ * and may end up looping here forever.
	2010	+ */
	2011	+ if (variable_is_present(variable_name, &vendor_guid)) {
	2012	+ dup_variable_bug(variable_name, &vendor_guid,
	2013	+ variable_name_size);
	2014	+ status = EFI_NOT_FOUND;
	2015	+ break;
	2016	+ }
	2017	+
2009	2018	efivar_create_sysfs_entry(efivars,
2010	2019	variable_name_size,
2011	2020	variable_name,
@@ -2025,15 +2034,8 @@ int register_efivars(struct efivars *efivars, · 13 unmodified lines
2025	2034	if (error)
2026	2035	unregister_efivars(efivars);
2027	2036
2028		− efivars->efi_pstore_info = efi_pstore_info;
2029		−
2030		− efivars->efi_pstore_info.buf = kmalloc(4096, GFP_KERNEL);
2031		− if (efivars->efi_pstore_info.buf) {
2032		− efivars->efi_pstore_info.bufsize = 1024;
2033		− efivars->efi_pstore_info.data = efivars;
2034		− spin_lock_init(&efivars->efi_pstore_info.buf_lock);
2035		− pstore_register(&efivars->efi_pstore_info);
2036		− }
	2037	+ if (!efivars_pstore_disable)
	2038	+ efivar_pstore_register(efivars);
2037	2039
2038	2040	register_filesystem(&efivarfs_type);
2039	2041
@@ -2073,7 +2075,7 @@ efivars_init(void) · 33 unmodified lines
2073	2075	ops.get_variable = efi.get_variable;
2074	2076	ops.set_variable = efi.set_variable;
2075	2077	ops.get_next_variable = efi.get_next_variable;
2076		− ops.query_variable_info = efi.query_variable_info;
	2078	+ ops.query_variable_store = efi_query_variable_store;
2077	2079
2078	2080	error = register_efivars(&__efivars, &ops, efi_kobj);
2079	2081	if (error)

drivers/gpio/gpio-ich.c+1−1

@@ -214,7 +214,7 @@ static int ichx_gpio_request(struct gpio_chip *chip, unsigned nr) · 213 unmodified lines
214	214	* If it can't be trusted, assume that the pin can be used as a GPIO.
215	215	*/
216	216	if (ichx_priv.desc->use_sel_ignore[nr / 32] & (1 << (nr & 0x1f)))
217		− return 1;
	217	+ return 0;
218	218
219	219	return ichx_read_bit(GPIO_USE_SEL, nr) ? 0 : -ENODEV;
220	220	}

drivers/gpio/gpio-mvebu.c+7−0

@@ -42,6 +42,7 @@ · 41 unmodified lines
42	42	#include <linux/io.h>
43	43	#include <linux/of_irq.h>
44	44	#include <linux/of_device.h>
	45	+#include <linux/clk.h>
45	46	#include <linux/pinctrl/consumer.h>
46	47
47	48	/*
@@ -496,6 +497,7 @@ static int mvebu_gpio_probe(struct platform_device *pdev) · 448 unmodified lines
496	497	struct resource *res;
497	498	struct irq_chip_generic *gc;
498	499	struct irq_chip_type *ct;
	500	+ struct clk *clk;
499	501	unsigned int ngpios;
500	502	int soc_variant;
501	503	int i, cpu, id;
@@ -529,6 +531,11 @@ static int mvebu_gpio_probe(struct platform_device *pdev) · 27 unmodified lines
529	531	return id;
530	532	}
531	533
	534	+ clk = devm_clk_get(&pdev->dev, NULL);
	535	+ /* Not all SoCs require a clock.*/
	536	+ if (!IS_ERR(clk))
	537	+ clk_prepare_enable(clk);
	538	+
532	539	mvchip->soc_variant = soc_variant;
533	540	mvchip->chip.label = dev_name(&pdev->dev);
534	541	mvchip->chip.dev = &pdev->dev;

drivers/gpio/gpio-pca953x.c+1−1

@@ -575,7 +575,7 @@ static int pca953x_irq_setup(struct pca953x_chip *chip, · 574 unmodified lines
575	575	chip->gpio_chip.ngpio,
576	576	irq_base,
577	577	&pca953x_irq_simple_ops,
578		− NULL);
	578	+ chip);
579	579	if (!chip->domain)
580	580	return -ENODEV;
581	581

drivers/gpio/gpio-stmpe.c+11−4

@@ -307,11 +307,15 @@ static const struct irq_domain_ops stmpe_gpio_irq_simple_ops = { · 306 unmodified lines
307	307	.xlate = irq_domain_xlate_twocell,
308	308	};
309	309
310		−static int stmpe_gpio_irq_init(struct stmpe_gpio *stmpe_gpio)
	310	+static int stmpe_gpio_irq_init(struct stmpe_gpio *stmpe_gpio,
	311	+ struct device_node *np)
311	312	{
312		− int base = stmpe_gpio->irq_base;
	313	+ int base = 0;
313	314
314		− stmpe_gpio->domain = irq_domain_add_simple(NULL,
	315	+ if (!np)
	316	+ base = stmpe_gpio->irq_base;
	317	+
	318	+ stmpe_gpio->domain = irq_domain_add_simple(np,
315	319	stmpe_gpio->chip.ngpio, base,
316	320	&stmpe_gpio_irq_simple_ops, stmpe_gpio);
317	321	if (!stmpe_gpio->domain) {
@@ -346,6 +350,9 @@ static int stmpe_gpio_probe(struct platform_device *pdev) · 28 unmodified lines
346	350	stmpe_gpio->chip = template_chip;
347	351	stmpe_gpio->chip.ngpio = stmpe->num_gpios;
348	352	stmpe_gpio->chip.dev = &pdev->dev;
	353	+#ifdef CONFIG_OF
	354	+ stmpe_gpio->chip.of_node = np;
	355	+#endif
349	356	stmpe_gpio->chip.base = pdata ? pdata->gpio_base : -1;
350	357
351	358	if (pdata)
@@ -366,7 +373,7 @@ static int stmpe_gpio_probe(struct platform_device *pdev) · 14 unmodified lines
366	373	goto out_free;
367	374
368	375	if (irq >= 0) {
369		− ret = stmpe_gpio_irq_init(stmpe_gpio);
	376	+ ret = stmpe_gpio_irq_init(stmpe_gpio, np);
370	377	if (ret)
371	378	goto out_disable;
372	379

drivers/gpio/gpiolib-of.c+2−3

@@ -193,7 +193,7 @@ static void of_gpiochip_add_pin_range(struct gpio_chip *chip) · 192 unmodified lines
193	193	if (!np)
194	194	return;
195	195
196		− do {
	196	+ for (;; index++) {
197	197	ret = of_parse_phandle_with_args(np, "gpio-ranges",
198	198	"#gpio-range-cells", index, &pinspec);
199	199	if (ret)
@@ -222,8 +222,7 @@ static void of_gpiochip_add_pin_range(struct gpio_chip *chip) · 22 unmodified lines
222	222
223	223	if (ret)
224	224	break;
225		−
226		− } while (index++);
	225	+ }
227	226	}
228	227
229	228	#else

drivers/gpu/drm/drm_crtc.c+0−2

@@ -2326,7 +2326,6 @@ int drm_mode_addfb(struct drm_device *dev, · 2325 unmodified lines
2326	2326	fb = dev->mode_config.funcs->fb_create(dev, file_priv, &r);
2327	2327	if (IS_ERR(fb)) {
2328	2328	DRM_DEBUG_KMS("could not create framebuffer\n");
2329		− drm_modeset_unlock_all(dev);
2330	2329	return PTR_ERR(fb);
2331	2330	}
2332	2331
@@ -2506,7 +2505,6 @@ int drm_mode_addfb2(struct drm_device *dev, · 173 unmodified lines
2506	2505	fb = dev->mode_config.funcs->fb_create(dev, file_priv, r);
2507	2506	if (IS_ERR(fb)) {
2508	2507	DRM_DEBUG_KMS("could not create framebuffer\n");
2509		− drm_modeset_unlock_all(dev);
2510	2508	return PTR_ERR(fb);
2511	2509	}
2512	2510

drivers/gpu/drm/drm_edid.c+2−1

@@ -1634,7 +1634,7 @@ static struct drm_display_mode drm_mode_detailed(struct drm_device dev, · 1633 unmodified lines
1634	1634	unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 \| pt->vblank_lo;
1635	1635	unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 \| pt->hsync_offset_lo;
1636	1636	unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 \| pt->hsync_pulse_width_lo;
1637		− unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 \| pt->vsync_offset_pulse_width_lo >> 4;
	1637	+ unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 \| pt->vsync_offset_pulse_width_lo >> 4;
1638	1638	unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 \| (pt->vsync_offset_pulse_width_lo & 0xf);
1639	1639
1640	1640	/* ignore tiny modes */
@@ -1715,6 +1715,7 @@ set_size: · 74 unmodified lines
1715	1715	}
1716	1716
1717	1717	mode->type = DRM_MODE_TYPE_DRIVER;
	1718	+ mode->vrefresh = drm_mode_vrefresh(mode);
1718	1719	drm_mode_set_name(mode);
1719	1720
1720	1721	return mode;

drivers/gpu/drm/drm_fb_helper.c+5−3

@@ -1544,10 +1544,10 @@ int drm_fb_helper_hotplug_event(struct drm_fb_helper *fb_helper) · 1543 unmodified lines
1544	1544	if (!fb_helper->fb)
1545	1545	return 0;
1546	1546
1547		− drm_modeset_lock_all(dev);
	1547	+ mutex_lock(&fb_helper->dev->mode_config.mutex);
1548	1548	if (!drm_fb_helper_is_bound(fb_helper)) {
1549	1549	fb_helper->delayed_hotplug = true;
1550		− drm_modeset_unlock_all(dev);
	1550	+ mutex_unlock(&fb_helper->dev->mode_config.mutex);
1551	1551	return 0;
1552	1552	}
1553	1553	DRM_DEBUG_KMS("\n");
@@ -1558,9 +1558,11 @@ int drm_fb_helper_hotplug_event(struct drm_fb_helper *fb_helper) · 4 unmodified lines
1558	1558
1559	1559	count = drm_fb_helper_probe_connector_modes(fb_helper, max_width,
1560	1560	max_height);
	1561	+ mutex_unlock(&fb_helper->dev->mode_config.mutex);
	1562	+
	1563	+ drm_modeset_lock_all(dev);
1561	1564	drm_setup_crtcs(fb_helper);
1562	1565	drm_modeset_unlock_all(dev);
1563		−
1564	1566	drm_fb_helper_set_par(fb_helper->fbdev);
1565	1567
1566	1568	return 0;

drivers/gpu/drm/drm_fops.c+4−2

@@ -123,6 +123,7 @@ int drm_open(struct inode inode, struct file filp) · 122 unmodified lines
123	123	int retcode = 0;
124	124	int need_setup = 0;
125	125	struct address_space *old_mapping;
	126	+ struct address_space *old_imapping;
126	127
127	128	minor = idr_find(&drm_minors_idr, minor_id);
128	129	if (!minor)
@@ -137,6 +138,7 @@ int drm_open(struct inode inode, struct file filp) · 8 unmodified lines
137	138	if (!dev->open_count++)
138	139	need_setup = 1;
139	140	mutex_lock(&dev->struct_mutex);
	141	+ old_imapping = inode->i_mapping;
140	142	old_mapping = dev->dev_mapping;
141	143	if (old_mapping == NULL)
142	144	dev->dev_mapping = &inode->i_data;
@@ -159,8 +161,8 @@ int drm_open(struct inode inode, struct file filp) · 16 unmodified lines
159	161
160	162	err_undo:
161	163	mutex_lock(&dev->struct_mutex);
162		− filp->f_mapping = old_mapping;
163		− inode->i_mapping = old_mapping;
	164	+ filp->f_mapping = old_imapping;
	165	+ inode->i_mapping = old_imapping;
164	166	iput(container_of(dev->dev_mapping, struct inode, i_data));
165	167	dev->dev_mapping = old_mapping;
166	168	mutex_unlock(&dev->struct_mutex);

drivers/gpu/drm/exynos/exynos_drm_fimd.c+11−10

@@ -38,11 +38,12 @@ · 37 unmodified lines
38	38	/* position control register for hardware window 0, 2 ~ 4.*/
39	39	#define VIDOSD_A(win) (VIDOSD_BASE + 0x00 + (win) * 16)
40	40	#define VIDOSD_B(win) (VIDOSD_BASE + 0x04 + (win) * 16)
41		−/* size control register for hardware window 0. */
42		−#define VIDOSD_C_SIZE_W0 (VIDOSD_BASE + 0x08)
43		−/* alpha control register for hardware window 1 ~ 4. */
44		−#define VIDOSD_C(win) (VIDOSD_BASE + 0x18 + (win) * 16)
45		−/* size control register for hardware window 1 ~ 4. */
	41	+/*
	42	+ * size control register for hardware windows 0 and alpha control register
	43	+ * for hardware windows 1 ~ 4
	44	+ */
	45	+#define VIDOSD_C(win) (VIDOSD_BASE + 0x08 + (win) * 16)
	46	+/* size control register for hardware windows 1 ~ 2. */
46	47	#define VIDOSD_D(win) (VIDOSD_BASE + 0x0C + (win) * 16)
47	48
48	49	#define VIDWx_BUF_START(win, buf) (VIDW_BUF_START(buf) + (win) * 8)
@@ -50,9 +51,9 @@ · 1 unmodified line
50	51	#define VIDWx_BUF_SIZE(win, buf) (VIDW_BUF_SIZE(buf) + (win) * 4)
51	52
52	53	/* color key control register for hardware window 1 ~ 4. */
53		−#define WKEYCON0_BASE(x) ((WKEYCON0 + 0x140) + (x * 8))
	54	+#define WKEYCON0_BASE(x) ((WKEYCON0 + 0x140) + ((x - 1) * 8))
54	55	/* color key value register for hardware window 1 ~ 4. */
55		−#define WKEYCON1_BASE(x) ((WKEYCON1 + 0x140) + (x * 8))
	56	+#define WKEYCON1_BASE(x) ((WKEYCON1 + 0x140) + ((x - 1) * 8))
56	57
57	58	/* FIMD has totally five hardware windows. */
58	59	#define WINDOWS_NR 5
@@ -109,9 +110,9 @@ struct fimd_context { · 50 unmodified lines
109	110
110	111	#ifdef CONFIG_OF
111	112	static const struct of_device_id fimd_driver_dt_match[] = {
112		− { .compatible = "samsung,exynos4-fimd",
	113	+ { .compatible = "samsung,exynos4210-fimd",
113	114	.data = &exynos4_fimd_driver_data },
114		− { .compatible = "samsung,exynos5-fimd",
	115	+ { .compatible = "samsung,exynos5250-fimd",
115	116	.data = &exynos5_fimd_driver_data },
116	117	{},
117	118	};
@@ -581,7 +582,7 @@ static void fimd_win_commit(struct device *dev, int zpos) · 463 unmodified lines
581	582	if (win != 3 && win != 4) {
582	583	u32 offset = VIDOSD_D(win);
583	584	if (win == 0)
584		− offset = VIDOSD_C_SIZE_W0;
	585	+ offset = VIDOSD_C(win);
585	586	val = win_data->ovl_width * win_data->ovl_height;
586	587	writel(val, ctx->regs + offset);
587	588

drivers/gpu/drm/exynos/exynos_drm_g2d.c+325−45

@@ -48,8 +48,14 @@ · 47 unmodified lines
48	48
49	49	/* registers for base address */
50	50	#define G2D_SRC_BASE_ADDR 0x0304
	51	+#define G2D_SRC_COLOR_MODE 0x030C
	52	+#define G2D_SRC_LEFT_TOP 0x0310
	53	+#define G2D_SRC_RIGHT_BOTTOM 0x0314
51	54	#define G2D_SRC_PLANE2_BASE_ADDR 0x0318
52	55	#define G2D_DST_BASE_ADDR 0x0404
	56	+#define G2D_DST_COLOR_MODE 0x040C
	57	+#define G2D_DST_LEFT_TOP 0x0410
	58	+#define G2D_DST_RIGHT_BOTTOM 0x0414
53	59	#define G2D_DST_PLANE2_BASE_ADDR 0x0418
54	60	#define G2D_PAT_BASE_ADDR 0x0500
55	61	#define G2D_MSK_BASE_ADDR 0x0520
@@ -82,7 +88,7 @@ · 26 unmodified lines
82	88	#define G2D_DMA_LIST_DONE_COUNT_OFFSET 17
83	89
84	90	/* G2D_DMA_HOLD_CMD */
85		−#define G2D_USET_HOLD (1 << 2)
	91	+#define G2D_USER_HOLD (1 << 2)
86	92	#define G2D_LIST_HOLD (1 << 1)
87	93	#define G2D_BITBLT_HOLD (1 << 0)
88	94
@@ -91,13 +97,27 @@ · 2 unmodified lines
91	97	#define G2D_START_NHOLT (1 << 1)
92	98	#define G2D_START_BITBLT (1 << 0)
93	99
	100	+/* buffer color format */
	101	+#define G2D_FMT_XRGB8888 0
	102	+#define G2D_FMT_ARGB8888 1
	103	+#define G2D_FMT_RGB565 2
	104	+#define G2D_FMT_XRGB1555 3
	105	+#define G2D_FMT_ARGB1555 4
	106	+#define G2D_FMT_XRGB4444 5
	107	+#define G2D_FMT_ARGB4444 6
	108	+#define G2D_FMT_PACKED_RGB888 7
	109	+#define G2D_FMT_A8 11
	110	+#define G2D_FMT_L8 12
	111	+
	112	+/* buffer valid length */
	113	+#define G2D_LEN_MIN 1
	114	+#define G2D_LEN_MAX 8000
	115	+
94	116	#define G2D_CMDLIST_SIZE (PAGE_SIZE / 4)
95	117	#define G2D_CMDLIST_NUM 64
96	118	#define G2D_CMDLIST_POOL_SIZE (G2D_CMDLIST_SIZE * G2D_CMDLIST_NUM)
97	119	#define G2D_CMDLIST_DATA_NUM (G2D_CMDLIST_SIZE / sizeof(u32) - 2)
98	120
99		−#define MAX_BUF_ADDR_NR 6
100		−
101	121	/* maximum buffer pool size of userptr is 64MB as default */
102	122	#define MAX_POOL (64 * 1024 * 1024)
103	123
@@ -106,6 +126,17 @@ enum { · 2 unmodified lines
106	126	BUF_TYPE_USERPTR,
107	127	};
108	128
	129	+enum g2d_reg_type {
	130	+ REG_TYPE_NONE = -1,
	131	+ REG_TYPE_SRC,
	132	+ REG_TYPE_SRC_PLANE2,
	133	+ REG_TYPE_DST,
	134	+ REG_TYPE_DST_PLANE2,
	135	+ REG_TYPE_PAT,
	136	+ REG_TYPE_MSK,
	137	+ MAX_REG_TYPE_NR
	138	+};
	139	+
109	140	/* cmdlist data structure */
110	141	struct g2d_cmdlist {
111	142	u32 head;
@@ -113,6 +144,42 @@ struct g2d_cmdlist { · 1 unmodified line
113	144	u32 last; /* last data offset */
114	145	};
115	146
	147	+/*
	148	+ * A structure of buffer description
	149	+ *
	150	+ * @format: color format
	151	+ * @left_x: the x coordinates of left top corner
	152	+ * @top_y: the y coordinates of left top corner
	153	+ * @right_x: the x coordinates of right bottom corner
	154	+ * @bottom_y: the y coordinates of right bottom corner
	155	+ *
	156	+ */
	157	+struct g2d_buf_desc {
	158	+ unsigned int format;
	159	+ unsigned int left_x;
	160	+ unsigned int top_y;
	161	+ unsigned int right_x;
	162	+ unsigned int bottom_y;
	163	+};
	164	+
	165	+/*
	166	+ * A structure of buffer information
	167	+ *
	168	+ * @map_nr: manages the number of mapped buffers
	169	+ * @reg_types: stores regitster type in the order of requested command
	170	+ * @handles: stores buffer handle in its reg_type position
	171	+ * @types: stores buffer type in its reg_type position
	172	+ * @descs: stores buffer description in its reg_type position
	173	+ *
	174	+ */
	175	+struct g2d_buf_info {
	176	+ unsigned int map_nr;
	177	+ enum g2d_reg_type reg_types[MAX_REG_TYPE_NR];
	178	+ unsigned long handles[MAX_REG_TYPE_NR];
	179	+ unsigned int types[MAX_REG_TYPE_NR];
	180	+ struct g2d_buf_desc descs[MAX_REG_TYPE_NR];
	181	+};
	182	+
116	183	struct drm_exynos_pending_g2d_event {
117	184	struct drm_pending_event base;
118	185	struct drm_exynos_g2d_event event;
@@ -131,14 +198,11 @@ struct g2d_cmdlist_userptr { · 12 unmodified lines
131	198	bool in_pool;
132	199	bool out_of_list;
133	200	};
134		−
135	201	struct g2d_cmdlist_node {
136	202	struct list_head list;
137	203	struct g2d_cmdlist *cmdlist;
138		− unsigned int map_nr;
139		− unsigned long handles[MAX_BUF_ADDR_NR];
140		− unsigned int obj_type[MAX_BUF_ADDR_NR];
141	204	dma_addr_t dma_addr;
	205	+ struct g2d_buf_info buf_info;
142	206
143	207	struct drm_exynos_pending_g2d_event *event;
144	208	};
@@ -188,6 +252,7 @@ static int g2d_init_cmdlist(struct g2d_data *g2d) · 43 unmodified lines
188	252	struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
189	253	int nr;
190	254	int ret;
	255	+ struct g2d_buf_info *buf_info;
191	256
192	257	init_dma_attrs(&g2d->cmdlist_dma_attrs);
193	258	dma_set_attr(DMA_ATTR_WRITE_COMBINE, &g2d->cmdlist_dma_attrs);
@@ -209,11 +274,17 @@ static int g2d_init_cmdlist(struct g2d_data *g2d) · 15 unmodified lines
209	274	}
210	275
211	276	for (nr = 0; nr < G2D_CMDLIST_NUM; nr++) {
	277	+ unsigned int i;
	278	+
212	279	node[nr].cmdlist =
213	280	g2d->cmdlist_pool_virt + nr * G2D_CMDLIST_SIZE;
214	281	node[nr].dma_addr =
215	282	g2d->cmdlist_pool + nr * G2D_CMDLIST_SIZE;
216	283
	284	+ buf_info = &node[nr].buf_info;
	285	+ for (i = 0; i < MAX_REG_TYPE_NR; i++)
	286	+ buf_info->reg_types[i] = REG_TYPE_NONE;
	287	+
217	288	list_add_tail(&node[nr].list, &g2d->free_cmdlist);
218	289	}
219	290
@@ -450,7 +521,7 @@ static dma_addr_t g2d_userptr_get_dma_addr(struct drm_device drm_dev, · 230 unmodified lines
450	521	DMA_BIDIRECTIONAL);
451	522	if (ret < 0) {
452	523	DRM_ERROR("failed to map sgt with dma region.\n");
453		− goto err_free_sgt;
	524	+ goto err_sg_free_table;
454	525	}
455	526
456	527	g2d_userptr->dma_addr = sgt->sgl[0].dma_address;
@@ -467,8 +538,10 @@ static dma_addr_t g2d_userptr_get_dma_addr(struct drm_device drm_dev, · 10 unmodified lines
467	538
468	539	return &g2d_userptr->dma_addr;
469	540
470		−err_free_sgt:
	541	+err_sg_free_table:
471	542	sg_free_table(sgt);
	543	+
	544	+err_free_sgt:
472	545	kfree(sgt);
473	546	sgt = NULL;
474	547
@@ -506,36 +579,172 @@ static void g2d_userptr_free_all(struct drm_device *drm_dev, · 31 unmodified lines
506	579	g2d->current_pool = 0;
507	580	}
508	581
	582	+static enum g2d_reg_type g2d_get_reg_type(int reg_offset)
	583	+{
	584	+ enum g2d_reg_type reg_type;
	585	+
	586	+ switch (reg_offset) {
	587	+ case G2D_SRC_BASE_ADDR:
	588	+ case G2D_SRC_COLOR_MODE:
	589	+ case G2D_SRC_LEFT_TOP:
	590	+ case G2D_SRC_RIGHT_BOTTOM:
	591	+ reg_type = REG_TYPE_SRC;
	592	+ break;
	593	+ case G2D_SRC_PLANE2_BASE_ADDR:
	594	+ reg_type = REG_TYPE_SRC_PLANE2;
	595	+ break;
	596	+ case G2D_DST_BASE_ADDR:
	597	+ case G2D_DST_COLOR_MODE:
	598	+ case G2D_DST_LEFT_TOP:
	599	+ case G2D_DST_RIGHT_BOTTOM:
	600	+ reg_type = REG_TYPE_DST;
	601	+ break;
	602	+ case G2D_DST_PLANE2_BASE_ADDR:
	603	+ reg_type = REG_TYPE_DST_PLANE2;
	604	+ break;
	605	+ case G2D_PAT_BASE_ADDR:
	606	+ reg_type = REG_TYPE_PAT;
	607	+ break;
	608	+ case G2D_MSK_BASE_ADDR:
	609	+ reg_type = REG_TYPE_MSK;
	610	+ break;
	611	+ default:
	612	+ reg_type = REG_TYPE_NONE;
	613	+ DRM_ERROR("Unknown register offset![%d]\n", reg_offset);
	614	+ break;
	615	+ };
	616	+
	617	+ return reg_type;
	618	+}
	619	+
	620	+static unsigned long g2d_get_buf_bpp(unsigned int format)
	621	+{
	622	+ unsigned long bpp;
	623	+
	624	+ switch (format) {
	625	+ case G2D_FMT_XRGB8888:
	626	+ case G2D_FMT_ARGB8888:
	627	+ bpp = 4;
	628	+ break;
	629	+ case G2D_FMT_RGB565:
	630	+ case G2D_FMT_XRGB1555:
	631	+ case G2D_FMT_ARGB1555:
	632	+ case G2D_FMT_XRGB4444:
	633	+ case G2D_FMT_ARGB4444:
	634	+ bpp = 2;
	635	+ break;
	636	+ case G2D_FMT_PACKED_RGB888:
	637	+ bpp = 3;
	638	+ break;
	639	+ default:
	640	+ bpp = 1;
	641	+ break;
	642	+ }
	643	+
	644	+ return bpp;
	645	+}
	646	+
	647	+static bool g2d_check_buf_desc_is_valid(struct g2d_buf_desc *buf_desc,
	648	+ enum g2d_reg_type reg_type,
	649	+ unsigned long size)
	650	+{
	651	+ unsigned int width, height;
	652	+ unsigned long area;
	653	+
	654	+ /*
	655	+ * check source and destination buffers only.
	656	+ * so the others are always valid.
	657	+ */
	658	+ if (reg_type != REG_TYPE_SRC && reg_type != REG_TYPE_DST)
	659	+ return true;
	660	+
	661	+ width = buf_desc->right_x - buf_desc->left_x;
	662	+ if (width < G2D_LEN_MIN \|\| width > G2D_LEN_MAX) {
	663	+ DRM_ERROR("width[%u] is out of range!\n", width);
	664	+ return false;
	665	+ }
	666	+
	667	+ height = buf_desc->bottom_y - buf_desc->top_y;
	668	+ if (height < G2D_LEN_MIN \|\| height > G2D_LEN_MAX) {
	669	+ DRM_ERROR("height[%u] is out of range!\n", height);
	670	+ return false;
	671	+ }
	672	+
	673	+ area = (unsigned long)width * (unsigned long)height *
	674	+ g2d_get_buf_bpp(buf_desc->format);
	675	+ if (area > size) {
	676	+ DRM_ERROR("area[%lu] is out of range[%lu]!\n", area, size);
	677	+ return false;
	678	+ }
	679	+
	680	+ return true;
	681	+}
	682	+
509	683	static int g2d_map_cmdlist_gem(struct g2d_data *g2d,
510	684	struct g2d_cmdlist_node *node,
511	685	struct drm_device *drm_dev,
512	686	struct drm_file *file)
513	687	{
514	688	struct g2d_cmdlist *cmdlist = node->cmdlist;
	689	+ struct g2d_buf_info *buf_info = &node->buf_info;
515	690	int offset;
	691	+ int ret;
516	692	int i;
517	693
518		− for (i = 0; i < node->map_nr; i++) {
	694	+ for (i = 0; i < buf_info->map_nr; i++) {
	695	+ struct g2d_buf_desc *buf_desc;
	696	+ enum g2d_reg_type reg_type;
	697	+ int reg_pos;
519	698	unsigned long handle;
520	699	dma_addr_t *addr;
521	700
522		− offset = cmdlist->last - (i * 2 + 1);
523		− handle = cmdlist->data[offset];
	701	+ reg_pos = cmdlist->last - 2 * (i + 1);
	702	+
	703	+ offset = cmdlist->data[reg_pos];
	704	+ handle = cmdlist->data[reg_pos + 1];
	705	+
	706	+ reg_type = g2d_get_reg_type(offset);
	707	+ if (reg_type == REG_TYPE_NONE) {
	708	+ ret = -EFAULT;
	709	+ goto err;
	710	+ }
	711	+
	712	+ buf_desc = &buf_info->descs[reg_type];
	713	+
	714	+ if (buf_info->types[reg_type] == BUF_TYPE_GEM) {
	715	+ unsigned long size;
	716	+
	717	+ size = exynos_drm_gem_get_size(drm_dev, handle, file);
	718	+ if (!size) {
	719	+ ret = -EFAULT;
	720	+ goto err;
	721	+ }
	722	+
	723	+ if (!g2d_check_buf_desc_is_valid(buf_desc, reg_type,
	724	+ size)) {
	725	+ ret = -EFAULT;
	726	+ goto err;
	727	+ }
524	728
525		− if (node->obj_type[i] == BUF_TYPE_GEM) {
526	729	addr = exynos_drm_gem_get_dma_addr(drm_dev, handle,
527	730	file);
528	731	if (IS_ERR(addr)) {
529		− node->map_nr = i;
530		− return -EFAULT;
	732	+ ret = -EFAULT;
	733	+ goto err;
531	734	}
532	735	} else {
533	736	struct drm_exynos_g2d_userptr g2d_userptr;
534	737
535	738	if (copy_from_user(&g2d_userptr, (void __user *)handle,
536	739	sizeof(struct drm_exynos_g2d_userptr))) {
537		− node->map_nr = i;
538		− return -EFAULT;
	740	+ ret = -EFAULT;
	741	+ goto err;
	742	+ }
	743	+
	744	+ if (!g2d_check_buf_desc_is_valid(buf_desc, reg_type,
	745	+ g2d_userptr.size)) {
	746	+ ret = -EFAULT;
	747	+ goto err;
539	748	}
540	749
541	750	addr = g2d_userptr_get_dma_addr(drm_dev,
@@ -544,16 +753,21 @@ static int g2d_map_cmdlist_gem(struct g2d_data *g2d, · 2 unmodified lines
544	753	file,
545	754	&handle);
546	755	if (IS_ERR(addr)) {
547		− node->map_nr = i;
548		− return -EFAULT;
	756	+ ret = -EFAULT;
	757	+ goto err;
549	758	}
550	759	}
551	760
552		− cmdlist->data[offset] = *addr;
553		− node->handles[i] = handle;
	761	+ cmdlist->data[reg_pos + 1] = *addr;
	762	+ buf_info->reg_types[i] = reg_type;
	763	+ buf_info->handles[reg_type] = handle;
554	764	}
555	765
556	766	return 0;
	767	+
	768	+err:
	769	+ buf_info->map_nr = i;
	770	+ return ret;
557	771	}
558	772
559	773	static void g2d_unmap_cmdlist_gem(struct g2d_data *g2d,
@@ -561,22 +775,33 @@ static void g2d_unmap_cmdlist_gem(struct g2d_data *g2d, · 1 unmodified line
561	775	struct drm_file *filp)
562	776	{
563	777	struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
	778	+ struct g2d_buf_info *buf_info = &node->buf_info;
564	779	int i;
565	780
566		− for (i = 0; i < node->map_nr; i++) {
567		− unsigned long handle = node->handles[i];
	781	+ for (i = 0; i < buf_info->map_nr; i++) {
	782	+ struct g2d_buf_desc *buf_desc;
	783	+ enum g2d_reg_type reg_type;
	784	+ unsigned long handle;
	785	+
	786	+ reg_type = buf_info->reg_types[i];
	787	+
	788	+ buf_desc = &buf_info->descs[reg_type];
	789	+ handle = buf_info->handles[reg_type];
568	790
569		− if (node->obj_type[i] == BUF_TYPE_GEM)
	791	+ if (buf_info->types[reg_type] == BUF_TYPE_GEM)
570	792	exynos_drm_gem_put_dma_addr(subdrv->drm_dev, handle,
571	793	filp);
572	794	else
573	795	g2d_userptr_put_dma_addr(subdrv->drm_dev, handle,
574	796	false);
575	797
576		− node->handles[i] = 0;
	798	+ buf_info->reg_types[i] = REG_TYPE_NONE;
	799	+ buf_info->handles[reg_type] = 0;
	800	+ buf_info->types[reg_type] = 0;
	801	+ memset(buf_desc, 0x00, sizeof(*buf_desc));
577	802	}
578	803
579		− node->map_nr = 0;
	804	+ buf_info->map_nr = 0;
580	805	}
581	806
582	807	static void g2d_dma_start(struct g2d_data *g2d,
@@ -589,10 +814,6 @@ static void g2d_dma_start(struct g2d_data *g2d, · 6 unmodified lines
589	814	pm_runtime_get_sync(g2d->dev);
590	815	clk_enable(g2d->gate_clk);
591	816
592		− /* interrupt enable */
593		− writel_relaxed(G2D_INTEN_ACF \| G2D_INTEN_UCF \| G2D_INTEN_GCF,
594		− g2d->regs + G2D_INTEN);
595		−
596	817	writel_relaxed(node->dma_addr, g2d->regs + G2D_DMA_SFR_BASE_ADDR);
597	818	writel_relaxed(G2D_DMA_START, g2d->regs + G2D_DMA_COMMAND);
598	819	}
@@ -643,7 +864,6 @@ static void g2d_runqueue_worker(struct work_struct *work) · 44 unmodified lines
643	864	struct g2d_data *g2d = container_of(work, struct g2d_data,
644	865	runqueue_work);
645	866
646		−
647	867	mutex_lock(&g2d->runqueue_mutex);
648	868	clk_disable(g2d->gate_clk);
649	869	pm_runtime_put_sync(g2d->dev);
@@ -724,20 +944,14 @@ static int g2d_check_reg_offset(struct device *dev, · 74 unmodified lines
724	944	int i;
725	945
726	946	for (i = 0; i < nr; i++) {
727		− index = cmdlist->last - 2 * (i + 1);
	947	+ struct g2d_buf_info *buf_info = &node->buf_info;
	948	+ struct g2d_buf_desc *buf_desc;
	949	+ enum g2d_reg_type reg_type;
	950	+ unsigned long value;
728	951
729		− if (for_addr) {
730		− /* check userptr buffer type. */
731		− reg_offset = (cmdlist->data[index] &
732		− ~0x7fffffff) >> 31;
733		− if (reg_offset) {
734		− node->obj_type[i] = BUF_TYPE_USERPTR;
735		− cmdlist->data[index] &= ~G2D_BUF_USERPTR;
736		− }
737		− }
	952	+ index = cmdlist->last - 2 * (i + 1);
738	953
739	954	reg_offset = cmdlist->data[index] & ~0xfffff000;
740		−
741	955	if (reg_offset < G2D_VALID_START \|\| reg_offset > G2D_VALID_END)
742	956	goto err;
743	957	if (reg_offset % 4)
@@ -753,8 +967,60 @@ static int g2d_check_reg_offset(struct device *dev, · 9 unmodified lines
753	967	if (!for_addr)
754	968	goto err;
755	969
756		− if (node->obj_type[i] != BUF_TYPE_USERPTR)
757		− node->obj_type[i] = BUF_TYPE_GEM;
	970	+ reg_type = g2d_get_reg_type(reg_offset);
	971	+ if (reg_type == REG_TYPE_NONE)
	972	+ goto err;
	973	+
	974	+ /* check userptr buffer type. */
	975	+ if ((cmdlist->data[index] & ~0x7fffffff) >> 31) {
	976	+ buf_info->types[reg_type] = BUF_TYPE_USERPTR;
	977	+ cmdlist->data[index] &= ~G2D_BUF_USERPTR;
	978	+ } else
	979	+ buf_info->types[reg_type] = BUF_TYPE_GEM;
	980	+ break;
	981	+ case G2D_SRC_COLOR_MODE:
	982	+ case G2D_DST_COLOR_MODE:
	983	+ if (for_addr)
	984	+ goto err;
	985	+
	986	+ reg_type = g2d_get_reg_type(reg_offset);
	987	+ if (reg_type == REG_TYPE_NONE)
	988	+ goto err;
	989	+
	990	+ buf_desc = &buf_info->descs[reg_type];
	991	+ value = cmdlist->data[index + 1];
	992	+
	993	+ buf_desc->format = value & 0xf;
	994	+ break;
	995	+ case G2D_SRC_LEFT_TOP:
	996	+ case G2D_DST_LEFT_TOP:
	997	+ if (for_addr)
	998	+ goto err;
	999	+
	1000	+ reg_type = g2d_get_reg_type(reg_offset);
	1001	+ if (reg_type == REG_TYPE_NONE)
	1002	+ goto err;
	1003	+
	1004	+ buf_desc = &buf_info->descs[reg_type];
	1005	+ value = cmdlist->data[index + 1];
	1006	+
	1007	+ buf_desc->left_x = value & 0x1fff;
	1008	+ buf_desc->top_y = (value & 0x1fff0000) >> 16;
	1009	+ break;
	1010	+ case G2D_SRC_RIGHT_BOTTOM:
	1011	+ case G2D_DST_RIGHT_BOTTOM:
	1012	+ if (for_addr)
	1013	+ goto err;
	1014	+
	1015	+ reg_type = g2d_get_reg_type(reg_offset);
	1016	+ if (reg_type == REG_TYPE_NONE)
	1017	+ goto err;
	1018	+
	1019	+ buf_desc = &buf_info->descs[reg_type];
	1020	+ value = cmdlist->data[index + 1];
	1021	+
	1022	+ buf_desc->right_x = value & 0x1fff;
	1023	+ buf_desc->bottom_y = (value & 0x1fff0000) >> 16;
758	1024	break;
759	1025	default:
760	1026	if (for_addr)
@@ -860,9 +1126,23 @@ int exynos_g2d_set_cmdlist_ioctl(struct drm_device drm_dev, void data, · 99 unmodified lines
860	1126	cmdlist->data[cmdlist->last++] = G2D_SRC_BASE_ADDR;
861	1127	cmdlist->data[cmdlist->last++] = 0;
862	1128
	1129	+ /*
	1130	+ * 'LIST_HOLD' command should be set to the DMA_HOLD_CMD_REG
	1131	+ * and GCF bit should be set to INTEN register if user wants
	1132	+ * G2D interrupt event once current command list execution is
	1133	+ * finished.
	1134	+ * Otherwise only ACF bit should be set to INTEN register so
	1135	+ * that one interrupt is occured after all command lists
	1136	+ * have been completed.
	1137	+ */
863	1138	if (node->event) {
	1139	+ cmdlist->data[cmdlist->last++] = G2D_INTEN;
	1140	+ cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF \| G2D_INTEN_GCF;
864	1141	cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
865	1142	cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
	1143	+ } else {
	1144	+ cmdlist->data[cmdlist->last++] = G2D_INTEN;
	1145	+ cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF;
866	1146	}
867	1147
868	1148	/* Check size of cmdlist: last 2 is about G2D_BITBLT_START */
@@ -887,7 +1167,7 @@ int exynos_g2d_set_cmdlist_ioctl(struct drm_device drm_dev, void data, · 18 unmodified lines
887	1167	if (ret < 0)
888	1168	goto err_free_event;
889	1169
890		− node->map_nr = req->cmd_buf_nr;
	1170	+ node->buf_info.map_nr = req->cmd_buf_nr;
891	1171	if (req->cmd_buf_nr) {
892	1172	struct drm_exynos_g2d_cmd *cmd_buf;
893	1173

drivers/gpu/drm/exynos/exynos_drm_gem.c+21−0

@@ -164,6 +164,27 @@ out: · 163 unmodified lines
164	164	exynos_gem_obj = NULL;
165	165	}
166	166
	167	+unsigned long exynos_drm_gem_get_size(struct drm_device *dev,
	168	+ unsigned int gem_handle,
	169	+ struct drm_file *file_priv)
	170	+{
	171	+ struct exynos_drm_gem_obj *exynos_gem_obj;
	172	+ struct drm_gem_object *obj;
	173	+
	174	+ obj = drm_gem_object_lookup(dev, file_priv, gem_handle);
	175	+ if (!obj) {
	176	+ DRM_ERROR("failed to lookup gem object.\n");
	177	+ return 0;
	178	+ }
	179	+
	180	+ exynos_gem_obj = to_exynos_gem_obj(obj);
	181	+
	182	+ drm_gem_object_unreference_unlocked(obj);
	183	+
	184	+ return exynos_gem_obj->buffer->size;
	185	+}
	186	+
	187	+
167	188	struct exynos_drm_gem_obj exynos_drm_gem_init(struct drm_device dev,
168	189	unsigned long size)
169	190	{

drivers/gpu/drm/exynos/exynos_drm_gem.h+5−0

@@ -130,6 +130,11 @@ int exynos_drm_gem_userptr_ioctl(struct drm_device dev, void data, · 129 unmodified lines
130	130	int exynos_drm_gem_get_ioctl(struct drm_device dev, void data,
131	131	struct drm_file *file_priv);
132	132
	133	+/* get buffer size to gem handle. */
	134	+unsigned long exynos_drm_gem_get_size(struct drm_device *dev,
	135	+ unsigned int gem_handle,
	136	+ struct drm_file *file_priv);
	137	+
133	138	/* initialize gem object. */
134	139	int exynos_drm_gem_init_object(struct drm_gem_object *obj);
135	140

drivers/gpu/drm/exynos/exynos_drm_vidi.c+2−4

@@ -117,13 +117,12 @@ static struct edid vidi_get_edid(struct device dev, · 116 unmodified lines
117	117	}
118	118
119	119	edid_len = (1 + ctx->raw_edid->extensions) * EDID_LENGTH;
120		− edid = kzalloc(edid_len, GFP_KERNEL);
	120	+ edid = kmemdup(ctx->raw_edid, edid_len, GFP_KERNEL);
121	121	if (!edid) {
122	122	DRM_DEBUG_KMS("failed to allocate edid\n");
123	123	return ERR_PTR(-ENOMEM);
124	124	}
125	125
126		− memcpy(edid, ctx->raw_edid, edid_len);
127	126	return edid;
128	127	}
129	128
@@ -563,12 +562,11 @@ int vidi_connection_ioctl(struct drm_device drm_dev, void data, · 433 unmodified lines
563	562	return -EINVAL;
564	563	}
565	564	edid_len = (1 + raw_edid->extensions) * EDID_LENGTH;
566		− ctx->raw_edid = kzalloc(edid_len, GFP_KERNEL);
	565	+ ctx->raw_edid = kmemdup(raw_edid, edid_len, GFP_KERNEL);
567	566	if (!ctx->raw_edid) {
568	567	DRM_DEBUG_KMS("failed to allocate raw_edid.\n");
569	568	return -ENOMEM;
570	569	}
571		− memcpy(ctx->raw_edid, raw_edid, edid_len);
572	570	} else {
573	571	/*
574	572	* with connection = 0, free raw_edid

drivers/gpu/drm/exynos/exynos_mixer.c+1−1

@@ -818,7 +818,7 @@ static void mixer_win_disable(void *ctx, int win) · 817 unmodified lines
818	818	mixer_ctx->win_data[win].enabled = false;
819	819	}
820	820
821		−int mixer_check_timing(void ctx, struct fb_videomode timing)
	821	+static int mixer_check_timing(void ctx, struct fb_videomode timing)
822	822	{
823	823	struct mixer_context *mixer_ctx = ctx;
824	824	u32 w, h;

drivers/gpu/drm/i915/i915_debugfs.c+1−1

@@ -103,7 +103,7 @@ static const char *cache_level_str(int type) · 102 unmodified lines
103	103	static void
104	104	describe_obj(struct seq_file m, struct drm_i915_gem_object obj)
105	105	{
106		− seq_printf(m, "%p: %s%s %8zdKiB %02x %02x %d %d %d%s%s%s",
	106	+ seq_printf(m, "%pK: %s%s %8zdKiB %02x %02x %d %d %d%s%s%s",
107	107	&obj->base,
108	108	get_pin_flag(obj),
109	109	get_tiling_flag(obj),

drivers/gpu/drm/i915/i915_drv.c+5−0

@@ -125,6 +125,11 @@ MODULE_PARM_DESC(preliminary_hw_support, · 124 unmodified lines
125	125	"Enable Haswell and ValleyView Support. "
126	126	"(default: false)");
127	127
	128	+int i915_disable_power_well __read_mostly = 0;
	129	+module_param_named(disable_power_well, i915_disable_power_well, int, 0600);
	130	+MODULE_PARM_DESC(disable_power_well,
	131	+ "Disable the power well when possible (default: false)");
	132	+
128	133	static struct drm_driver driver;
129	134	extern int intel_agp_enabled;
130	135

drivers/gpu/drm/i915/i915_drv.h+1−0

@@ -1398,6 +1398,7 @@ extern int i915_enable_fbc __read_mostly; · 1397 unmodified lines
1398	1398	extern bool i915_enable_hangcheck __read_mostly;
1399	1399	extern int i915_enable_ppgtt __read_mostly;
1400	1400	extern unsigned int i915_preliminary_hw_support __read_mostly;
	1401	+extern int i915_disable_power_well __read_mostly;
1401	1402
1402	1403	extern int i915_suspend(struct drm_device *dev, pm_message_t state);
1403	1404	extern int i915_resume(struct drm_device *dev);

drivers/gpu/drm/i915/i915_gem_execbuffer.c+9−4

@@ -57,7 +57,7 @@ eb_create(struct drm_i915_gem_execbuffer2 *args) · 56 unmodified lines
57	57	if (eb == NULL) {
58	58	int size = args->buffer_count;
59	59	int count = PAGE_SIZE / sizeof(struct hlist_head) / 2;
60		− BUILD_BUG_ON(!is_power_of_2(PAGE_SIZE / sizeof(struct hlist_head)));
	60	+ BUILD_BUG_ON_NOT_POWER_OF_2(PAGE_SIZE / sizeof(struct hlist_head));
61	61	while (count > 2*size)
62	62	count >>= 1;
63	63	eb = kzalloc(count*sizeof(struct hlist_head) +
@@ -732,6 +732,8 @@ validate_exec_list(struct drm_i915_gem_exec_object2 *exec, · 668 unmodified lines
732	732	int count)
733	733	{
734	734	int i;
	735	+ int relocs_total = 0;
	736	+ int relocs_max = INT_MAX / sizeof(struct drm_i915_gem_relocation_entry);
735	737
736	738	for (i = 0; i < count; i++) {
737	739	char __user ptr = (char __user )(uintptr_t)exec[i].relocs_ptr;
@@ -740,10 +742,13 @@ validate_exec_list(struct drm_i915_gem_exec_object2 *exec, · 2 unmodified lines
740	742	if (exec[i].flags & __EXEC_OBJECT_UNKNOWN_FLAGS)
741	743	return -EINVAL;
742	744
743		− /* First check for malicious input causing overflow */
744		− if (exec[i].relocation_count >
745		− INT_MAX / sizeof(struct drm_i915_gem_relocation_entry))
	745	+ /* First check for malicious input causing overflow in
	746	+ * the worst case where we need to allocate the entire
	747	+ * relocation tree as a single array.
	748	+ */
	749	+ if (exec[i].relocation_count > relocs_max - relocs_total)
746	750	return -EINVAL;
	751	+ relocs_total += exec[i].relocation_count;
747	752
748	753	length = exec[i].relocation_count *
749	754	sizeof(struct drm_i915_gem_relocation_entry);

drivers/gpu/drm/i915/intel_crt.c+17−23

@@ -45,6 +45,9 @@ · 44 unmodified lines
45	45
46	46	struct intel_crt {
47	47	struct intel_encoder base;
	48	+ /* DPMS state is stored in the connector, which we need in the
	49	+ * encoder's enable/disable callbacks */
	50	+ struct intel_connector *connector;
48	51	bool force_hotplug_required;
49	52	u32 adpa_reg;
50	53	};
@@ -81,29 +84,6 @@ static bool intel_crt_get_hw_state(struct intel_encoder *encoder, · 30 unmodified lines
81	84	return true;
82	85	}
83	86
84		−static void intel_disable_crt(struct intel_encoder *encoder)
85		−{
86		− struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
87		− struct intel_crt *crt = intel_encoder_to_crt(encoder);
88		− u32 temp;
89		−
90		− temp = I915_READ(crt->adpa_reg);
91		− temp \|= ADPA_HSYNC_CNTL_DISABLE \| ADPA_VSYNC_CNTL_DISABLE;
92		− temp &= ~ADPA_DAC_ENABLE;
93		− I915_WRITE(crt->adpa_reg, temp);
94		−}
95		−
96		−static void intel_enable_crt(struct intel_encoder *encoder)
97		−{
98		− struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
99		− struct intel_crt *crt = intel_encoder_to_crt(encoder);
100		− u32 temp;
101		−
102		− temp = I915_READ(crt->adpa_reg);
103		− temp \|= ADPA_DAC_ENABLE;
104		− I915_WRITE(crt->adpa_reg, temp);
105		−}
106		−
107	87	/* Note: The caller is required to filter out dpms modes not supported by the
108	88	* platform. */
109	89	static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
@@ -135,6 +115,19 @@ static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode) · 25 unmodified lines
135	115	I915_WRITE(crt->adpa_reg, temp);
136	116	}
137	117
	118	+static void intel_disable_crt(struct intel_encoder *encoder)
	119	+{
	120	+ intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF);
	121	+}
	122	+
	123	+static void intel_enable_crt(struct intel_encoder *encoder)
	124	+{
	125	+ struct intel_crt *crt = intel_encoder_to_crt(encoder);
	126	+
	127	+ intel_crt_set_dpms(encoder, crt->connector->base.dpms);
	128	+}
	129	+
	130	+
138	131	static void intel_crt_dpms(struct drm_connector *connector, int mode)
139	132	{
140	133	struct drm_device *dev = connector->dev;
@@ -746,6 +739,7 @@ void intel_crt_init(struct drm_device *dev) · 605 unmodified lines
746	739	}
747	740
748	741	connector = &intel_connector->base;
	742	+ crt->connector = intel_connector;
749	743	drm_connector_init(dev, &intel_connector->base,
750	744	&intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
751	745

drivers/gpu/drm/i915/intel_display.c+5−5

@@ -5771,6 +5771,11 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc, · 5770 unmodified lines
5771	5771	num_connectors++;
5772	5772	}
5773	5773
	5774	+ if (is_cpu_edp)
	5775	+ intel_crtc->cpu_transcoder = TRANSCODER_EDP;
	5776	+ else
	5777	+ intel_crtc->cpu_transcoder = pipe;
	5778	+
5774	5779	/* We are not sure yet this won't happen. */
5775	5780	WARN(!HAS_PCH_LPT(dev), "Unexpected PCH type %d\n",
5776	5781	INTEL_PCH_TYPE(dev));
@@ -5837,11 +5842,6 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, · 60 unmodified lines
5837	5842	int pipe = intel_crtc->pipe;
5838	5843	int ret;
5839	5844
5840		− if (IS_HASWELL(dev) && intel_pipe_has_type(crtc, INTEL_OUTPUT_EDP))
5841		− intel_crtc->cpu_transcoder = TRANSCODER_EDP;
5842		− else
5843		− intel_crtc->cpu_transcoder = pipe;
5844		−
5845	5845	drm_vblank_pre_modeset(dev, pipe);
5846	5846
5847	5847	ret = dev_priv->display.crtc_mode_set(crtc, mode, adjusted_mode,

drivers/gpu/drm/i915/intel_dp.c+15−2

@@ -820,6 +820,7 @@ intel_dp_set_m_n(struct drm_crtc crtc, struct drm_display_mode mode, · 819 unmodified lines
820	820	struct intel_link_m_n m_n;
821	821	int pipe = intel_crtc->pipe;
822	822	enum transcoder cpu_transcoder = intel_crtc->cpu_transcoder;
	823	+ int target_clock;
823	824
824	825	/*
825	826	* Find the lane count in the intel_encoder private
@@ -835,13 +836,22 @@ intel_dp_set_m_n(struct drm_crtc crtc, struct drm_display_mode mode, · 9 unmodified lines
835	836	}
836	837	}
837	838
	839	+ target_clock = mode->clock;
	840	+ for_each_encoder_on_crtc(dev, crtc, intel_encoder) {
	841	+ if (intel_encoder->type == INTEL_OUTPUT_EDP) {
	842	+ target_clock = intel_edp_target_clock(intel_encoder,
	843	+ mode);
	844	+ break;
	845	+ }
	846	+ }
	847	+
838	848	/*
839	849	* Compute the GMCH and Link ratios. The '3' here is
840	850	* the number of bytes_per_pixel post-LUT, which we always
841	851	* set up for 8-bits of R/G/B, or 3 bytes total.
842	852	*/
843	853	intel_link_compute_m_n(intel_crtc->bpp, lane_count,
844		− mode->clock, adjusted_mode->clock, &m_n);
	854	+ target_clock, adjusted_mode->clock, &m_n);
845	855
846	856	if (IS_HASWELL(dev)) {
847	857	I915_WRITE(PIPE_DATA_M1(cpu_transcoder),
@@ -1930,7 +1940,7 @@ intel_dp_start_link_train(struct intel_dp *intel_dp) · 1082 unmodified lines
1930	1940	for (i = 0; i < intel_dp->lane_count; i++)
1931	1941	if ((intel_dp->train_set[i] & DP_TRAIN_MAX_SWING_REACHED) == 0)
1932	1942	break;
1933		− if (i == intel_dp->lane_count && voltage_tries == 5) {
	1943	+ if (i == intel_dp->lane_count) {
1934	1944	++loop_tries;
1935	1945	if (loop_tries == 5) {
1936	1946	DRM_DEBUG_KMS("too many full retries, give up\n");
@@ -2549,12 +2559,15 @@ void intel_dp_encoder_destroy(struct drm_encoder *encoder) · 612 unmodified lines
2549	2559	{
2550	2560	struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder);
2551	2561	struct intel_dp *intel_dp = &intel_dig_port->dp;
	2562	+ struct drm_device *dev = intel_dp_to_dev(intel_dp);
2552	2563
2553	2564	i2c_del_adapter(&intel_dp->adapter);
2554	2565	drm_encoder_cleanup(encoder);
2555	2566	if (is_edp(intel_dp)) {
2556	2567	cancel_delayed_work_sync(&intel_dp->panel_vdd_work);
	2568	+ mutex_lock(&dev->mode_config.mutex);
2557	2569	ironlake_panel_vdd_off_sync(intel_dp);
	2570	+ mutex_unlock(&dev->mode_config.mutex);
2558	2571	}
2559	2572	kfree(intel_dig_port);
2560	2573	}

drivers/gpu/drm/i915/intel_i2c.c+10−1

@@ -203,7 +203,13 @@ intel_gpio_setup(struct intel_gmbus *bus, u32 pin) · 202 unmodified lines
203	203	algo->data = bus;
204	204	}
205	205
206		−#define HAS_GMBUS_IRQ(dev) (INTEL_INFO(dev)->gen >= 4)
	206	+/*
	207	+ * gmbus on gen4 seems to be able to generate legacy interrupts even when in MSI
	208	+ * mode. This results in spurious interrupt warnings if the legacy irq no. is
	209	+ * shared with another device. The kernel then disables that interrupt source
	210	+ * and so prevents the other device from working properly.
	211	+ */
	212	+#define HAS_GMBUS_IRQ(dev) (INTEL_INFO(dev)->gen >= 5)
207	213	static int
208	214	gmbus_wait_hw_status(struct drm_i915_private *dev_priv,
209	215	u32 gmbus2_status,
@@ -214,6 +220,9 @@ gmbus_wait_hw_status(struct drm_i915_private *dev_priv, · 4 unmodified lines
214	220	u32 gmbus2 = 0;
215	221	DEFINE_WAIT(wait);
216	222
	223	+ if (!HAS_GMBUS_IRQ(dev_priv->dev))
	224	+ gmbus4_irq_en = 0;
	225	+
217	226	/* Important: The hw handles only the first bit, so set only one! Since
218	227	* we also need to check for NAKs besides the hw ready/idle signal, we
219	228	* need to wake up periodically and check that ourselves. */

drivers/gpu/drm/i915/intel_panel.c+5−8

@@ -321,9 +321,6 @@ void intel_panel_enable_backlight(struct drm_device *dev, · 320 unmodified lines
321	321	if (dev_priv->backlight_level == 0)
322	322	dev_priv->backlight_level = intel_panel_get_max_backlight(dev);
323	323
324		− dev_priv->backlight_enabled = true;
325		− intel_panel_actually_set_backlight(dev, dev_priv->backlight_level);
326		−
327	324	if (INTEL_INFO(dev)->gen >= 4) {
328	325	uint32_t reg, tmp;
329	326
@@ -359,12 +356,12 @@ void intel_panel_enable_backlight(struct drm_device *dev, · 29 unmodified lines
359	356	}
360	357
361	358	set_level:
362		− /* Check the current backlight level and try to set again if it's zero.
363		− * On some machines, BLC_PWM_CPU_CTL is cleared to zero automatically
364		− * when BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1 are written.
	359	+ /* Call below after setting BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1.
	360	+ * BLC_PWM_CPU_CTL may be cleared to zero automatically when these
	361	+ * registers are set.
365	362	*/
366		− if (!intel_panel_get_backlight(dev))
367		− intel_panel_actually_set_backlight(dev, dev_priv->backlight_level);
	363	+ dev_priv->backlight_enabled = true;
	364	+ intel_panel_actually_set_backlight(dev, dev_priv->backlight_level);
368	365	}
369	366
370	367	static void intel_panel_init_backlight(struct drm_device *dev)

drivers/gpu/drm/i915/intel_pm.c+3−0

@@ -4079,6 +4079,9 @@ void intel_set_power_well(struct drm_device *dev, bool enable) · 4078 unmodified lines
4079	4079	if (!IS_HASWELL(dev))
4080	4080	return;
4081	4081
	4082	+ if (!i915_disable_power_well && !enable)
	4083	+ return;
	4084	+
4082	4085	tmp = I915_READ(HSW_PWR_WELL_DRIVER);
4083	4086	is_enabled = tmp & HSW_PWR_WELL_STATE;
4084	4087	enable_requested = tmp & HSW_PWR_WELL_ENABLE;

drivers/gpu/drm/mgag200/mgag200_mode.c+8−15

@@ -382,19 +382,19 @@ static int mga_g200eh_set_plls(struct mga_device *mdev, long clock) · 381 unmodified lines
382	382	m = n = p = 0;
383	383	vcomax = 800000;
384	384	vcomin = 400000;
385		− pllreffreq = 3333;
	385	+ pllreffreq = 33333;
386	386
387	387	delta = 0xffffffff;
388	388	permitteddelta = clock * 5 / 1000;
389	389
390		− for (testp = 16; testp > 0; testp--) {
	390	+ for (testp = 16; testp > 0; testp >>= 1) {
391	391	if (clock * testp > vcomax)
392	392	continue;
393	393	if (clock * testp < vcomin)
394	394	continue;
395	395
396	396	for (testm = 1; testm < 33; testm++) {
397		− for (testn = 1; testn < 257; testn++) {
	397	+ for (testn = 17; testn < 257; testn++) {
398	398	computed = (pllreffreq * testn) /
399	399	(testm * testp);
400	400	if (computed > clock)
@@ -404,11 +404,11 @@ static int mga_g200eh_set_plls(struct mga_device *mdev, long clock) · 3 unmodified lines
404	404	if (tmpdelta < delta) {
405	405	delta = tmpdelta;
406	406	n = testn - 1;
407		− m = (testm - 1) \| ((n >> 1) & 0x80);
	407	+ m = (testm - 1);
408	408	p = testp - 1;
409	409	}
410	410	if ((clock * testp) >= 600000)
411		− p \|= 80;
	411	+ p \|= 0x80;
412	412	}
413	413	}
414	414	}
@@ -751,8 +751,6 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, · 336 unmodified lines
751	751	int i;
752	752	unsigned char misc = 0;
753	753	unsigned char ext_vga[6];
754		− unsigned char ext_vga_index24;
755		− unsigned char dac_index90 = 0;
756	754	u8 bppshift;
757	755
758	756	static unsigned char dacvalue[] = {
@@ -803,7 +801,6 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, · 44 unmodified lines
803	801	option2 = 0x0000b000;
804	802	break;
805	803	case G200_ER:
806		− dac_index90 = 0;
807	804	break;
808	805	}
809	806
@@ -852,10 +849,8 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, · 42 unmodified lines
852	849	WREG_DAC(i, dacvalue[i]);
853	850	}
854	851
855		− if (mdev->type == G200_ER) {
856		− WREG_DAC(0x90, dac_index90);
857		− }
858		−
	852	+ if (mdev->type == G200_ER)
	853	+ WREG_DAC(0x90, 0);
859	854
860	855	if (option)
861	856	pci_write_config_dword(dev->pdev, PCI_MGA_OPTION, option);
@@ -952,8 +947,6 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, · 90 unmodified lines
952	947	if (mdev->type == G200_WB)
953	948	ext_vga[1] \|= 0x88;
954	949
955		− ext_vga_index24 = 0x05;
956		−
957	950	/* Set pixel clocks */
958	951	misc = 0x2d;
959	952	WREG8(MGA_MISC_OUT, misc);
@@ -965,7 +958,7 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc, · 5 unmodified lines
965	958	}
966	959
967	960	if (mdev->type == G200_ER)
968		− WREG_ECRT(24, ext_vga_index24);
	961	+ WREG_ECRT(0x24, 0x5);
969	962
970	963	if (mdev->type == G200_EV) {
971	964	WREG_ECRT(6, 0);

drivers/gpu/drm/nouveau/core/core/object.c+1−2

@@ -278,7 +278,6 @@ nouveau_object_del(struct nouveau_object *client, u32 _parent, u32 _handle) · 277 unmodified lines
278	278	struct nouveau_object *parent = NULL;
279	279	struct nouveau_object *namedb = NULL;
280	280	struct nouveau_handle *handle = NULL;
281		− int ret = -EINVAL;
282	281
283	282	parent = nouveau_handle_ref(client, _parent);
284	283	if (!parent)
@@ -295,7 +294,7 @@ nouveau_object_del(struct nouveau_object *client, u32 _parent, u32 _handle) · 10 unmodified lines
295	294	}
296	295
297	296	nouveau_object_ref(NULL, &parent);
298		− return ret;
	297	+ return handle ? 0 : -EINVAL;
299	298	}
300	299
301	300	int

drivers/gpu/drm/nouveau/core/engine/disp/nv50.c+2−2

@@ -544,13 +544,13 @@ nv50_disp_curs_ofuncs = { · 543 unmodified lines
544	544	static void
545	545	nv50_disp_base_vblank_enable(struct nouveau_event *event, int head)
546	546	{
547		− nv_mask(event->priv, 0x61002c, (1 << head), (1 << head));
	547	+ nv_mask(event->priv, 0x61002c, (4 << head), (4 << head));
548	548	}
549	549
550	550	static void
551	551	nv50_disp_base_vblank_disable(struct nouveau_event *event, int head)
552	552	{
553		− nv_mask(event->priv, 0x61002c, (1 << head), (0 << head));
	553	+ nv_mask(event->priv, 0x61002c, (4 << head), 0);
554	554	}
555	555
556	556	static int

drivers/gpu/drm/nouveau/core/include/subdev/therm.h+1−1

@@ -4,7 +4,7 @@ · 3 unmodified lines
4	4	#include <core/device.h>
5	5	#include <core/subdev.h>
6	6
7		−enum nouveau_therm_mode {
	7	+enum nouveau_therm_fan_mode {
8	8	NOUVEAU_THERM_CTRL_NONE = 0,
9	9	NOUVEAU_THERM_CTRL_MANUAL = 1,
10	10	NOUVEAU_THERM_CTRL_AUTO = 2,

drivers/gpu/drm/nouveau/core/subdev/bios/base.c+17−0

@@ -248,6 +248,22 @@ nouveau_bios_shadow_pci(struct nouveau_bios *bios) · 247 unmodified lines
248	248	}
249	249	}
250	250
	251	+static void
	252	+nouveau_bios_shadow_platform(struct nouveau_bios *bios)
	253	+{
	254	+ struct pci_dev *pdev = nv_device(bios)->pdev;
	255	+ size_t size;
	256	+
	257	+ void __iomem *rom = pci_platform_rom(pdev, &size);
	258	+ if (rom && size) {
	259	+ bios->data = kmalloc(size, GFP_KERNEL);
	260	+ if (bios->data) {
	261	+ memcpy_fromio(bios->data, rom, size);
	262	+ bios->size = size;
	263	+ }
	264	+ }
	265	+}
	266	+
251	267	static int
252	268	nouveau_bios_score(struct nouveau_bios *bios, const bool writeable)
253	269	{
@@ -288,6 +304,7 @@ nouveau_bios_shadow(struct nouveau_bios *bios) · 34 unmodified lines
288	304	{ "PROM", nouveau_bios_shadow_prom, false, 0, 0, NULL },
289	305	{ "ACPI", nouveau_bios_shadow_acpi, true, 0, 0, NULL },
290	306	{ "PCIROM", nouveau_bios_shadow_pci, true, 0, 0, NULL },
	307	+ { "PLATFORM", nouveau_bios_shadow_platform, true, 0, 0, NULL },
291	308	{}
292	309	};
293	310	struct methods mthd, best;

drivers/gpu/drm/nouveau/core/subdev/therm/base.c+12−6

@@ -134,7 +134,7 @@ nouveau_therm_alarm(struct nouveau_alarm *alarm) · 133 unmodified lines
134	134	}
135	135
136	136	int
137		−nouveau_therm_mode(struct nouveau_therm *therm, int mode)
	137	+nouveau_therm_fan_mode(struct nouveau_therm *therm, int mode)
138	138	{
139	139	struct nouveau_therm_priv priv = (void )therm;
140	140	struct nouveau_device *device = nv_device(therm);
@@ -149,10 +149,15 @@ nouveau_therm_mode(struct nouveau_therm *therm, int mode) · 8 unmodified lines
149	149	(mode != NOUVEAU_THERM_CTRL_NONE && device->card_type >= NV_C0))
150	150	return -EINVAL;
151	151
	152	+ /* do not allow automatic fan management if the thermal sensor is
	153	+ * not available */
	154	+ if (priv->mode == 2 && therm->temp_get(therm) < 0)
	155	+ return -EINVAL;
	156	+
152	157	if (priv->mode == mode)
153	158	return 0;
154	159
155		− nv_info(therm, "Thermal management: %s\n", name[mode]);
	160	+ nv_info(therm, "fan management: %s\n", name[mode]);
156	161	nouveau_therm_update(therm, mode);
157	162	return 0;
158	163	}
@@ -213,7 +218,7 @@ nouveau_therm_attr_set(struct nouveau_therm *therm, · 54 unmodified lines
213	218	priv->fan->bios.max_duty = value;
214	219	return 0;
215	220	case NOUVEAU_THERM_ATTR_FAN_MODE:
216		− return nouveau_therm_mode(therm, value);
	221	+ return nouveau_therm_fan_mode(therm, value);
217	222	case NOUVEAU_THERM_ATTR_THRS_FAN_BOOST:
218	223	priv->bios_sensor.thrs_fan_boost.temp = value;
219	224	priv->sensor.program_alarms(therm);
@@ -263,7 +268,7 @@ _nouveau_therm_init(struct nouveau_object *object) · 43 unmodified lines
263	268	return ret;
264	269
265	270	if (priv->suspend >= 0)
266		− nouveau_therm_mode(therm, priv->mode);
	271	+ nouveau_therm_fan_mode(therm, priv->mode);
267	272	priv->sensor.program_alarms(therm);
268	273	return 0;
269	274	}
@@ -313,11 +318,12 @@ nouveau_therm_create_(struct nouveau_object *parent, · 43 unmodified lines
313	318	int
314	319	nouveau_therm_preinit(struct nouveau_therm *therm)
315	320	{
316		− nouveau_therm_ic_ctor(therm);
317	321	nouveau_therm_sensor_ctor(therm);
	322	+ nouveau_therm_ic_ctor(therm);
318	323	nouveau_therm_fan_ctor(therm);
319	324
320		− nouveau_therm_mode(therm, NOUVEAU_THERM_CTRL_NONE);
	325	+ nouveau_therm_fan_mode(therm, NOUVEAU_THERM_CTRL_NONE);
	326	+ nouveau_therm_sensor_preinit(therm);
321	327	return 0;
322	328	}
323	329

drivers/gpu/drm/nouveau/core/subdev/therm/ic.c+4−2

@@ -32,6 +32,7 @@ probe_monitoring_device(struct nouveau_i2c_port *i2c, · 31 unmodified lines
32	32	struct i2c_board_info *info)
33	33	{
34	34	struct nouveau_therm_priv priv = (void )nouveau_therm(i2c);
	35	+ struct nvbios_therm_sensor *sensor = &priv->bios_sensor;
35	36	struct i2c_client *client;
36	37
37	38	request_module("%s%s", I2C_MODULE_PREFIX, info->type);
@@ -46,8 +47,9 @@ probe_monitoring_device(struct nouveau_i2c_port *i2c, · 8 unmodified lines
46	47	}
47	48
48	49	nv_info(priv,
49		− "Found an %s at address 0x%x (controlled by lm_sensors)\n",
50		− info->type, info->addr);
	50	+ "Found an %s at address 0x%x (controlled by lm_sensors, "
	51	+ "temp offset %+i C)\n",
	52	+ info->type, info->addr, sensor->offset_constant);
51	53	priv->ic = client;
52	54
53	55	return true;

drivers/gpu/drm/nouveau/core/subdev/therm/nv40.c+48−19

@@ -29,54 +29,83 @@ struct nv40_therm_priv { · 28 unmodified lines
29	29	struct nouveau_therm_priv base;
30	30	};
31	31
	32	+enum nv40_sensor_style { INVALID_STYLE = -1, OLD_STYLE = 0, NEW_STYLE = 1 };
	33	+
	34	+static enum nv40_sensor_style
	35	+nv40_sensor_style(struct nouveau_therm *therm)
	36	+{
	37	+ struct nouveau_device *device = nv_device(therm);
	38	+
	39	+ switch (device->chipset) {
	40	+ case 0x43:
	41	+ case 0x44:
	42	+ case 0x4a:
	43	+ case 0x47:
	44	+ return OLD_STYLE;
	45	+
	46	+ case 0x46:
	47	+ case 0x49:
	48	+ case 0x4b:
	49	+ case 0x4e:
	50	+ case 0x4c:
	51	+ case 0x67:
	52	+ case 0x68:
	53	+ case 0x63:
	54	+ return NEW_STYLE;
	55	+ default:
	56	+ return INVALID_STYLE;
	57	+ }
	58	+}
	59	+
32	60	static int
33	61	nv40_sensor_setup(struct nouveau_therm *therm)
34	62	{
35		− struct nouveau_device *device = nv_device(therm);
	63	+ enum nv40_sensor_style style = nv40_sensor_style(therm);
36	64
37	65	/* enable ADC readout and disable the ALARM threshold */
38		− if (device->chipset >= 0x46) {
	66	+ if (style == NEW_STYLE) {
39	67	nv_mask(therm, 0x15b8, 0x80000000, 0);
40	68	nv_wr32(therm, 0x15b0, 0x80003fff);
41		− mdelay(10); /* wait for the temperature to stabilize */
	69	+ mdelay(20); /* wait for the temperature to stabilize */
42	70	return nv_rd32(therm, 0x15b4) & 0x3fff;
43		− } else {
	71	+ } else if (style == OLD_STYLE) {
44	72	nv_wr32(therm, 0x15b0, 0xff);
	73	+ mdelay(20); /* wait for the temperature to stabilize */
45	74	return nv_rd32(therm, 0x15b4) & 0xff;
46		− }
	75	+ } else
	76	+ return -ENODEV;
47	77	}
48	78
49	79	static int
50	80	nv40_temp_get(struct nouveau_therm *therm)
51	81	{
52	82	struct nouveau_therm_priv priv = (void )therm;
53		− struct nouveau_device *device = nv_device(therm);
54	83	struct nvbios_therm_sensor *sensor = &priv->bios_sensor;
	84	+ enum nv40_sensor_style style = nv40_sensor_style(therm);
55	85	int core_temp;
56	86
57		− if (device->chipset >= 0x46) {
	87	+ if (style == NEW_STYLE) {
58	88	nv_wr32(therm, 0x15b0, 0x80003fff);
59	89	core_temp = nv_rd32(therm, 0x15b4) & 0x3fff;
60		− } else {
	90	+ } else if (style == OLD_STYLE) {
61	91	nv_wr32(therm, 0x15b0, 0xff);
62	92	core_temp = nv_rd32(therm, 0x15b4) & 0xff;
63		− }
64		−
65		− /* Setup the sensor if the temperature is 0 */
66		− if (core_temp == 0)
67		− core_temp = nv40_sensor_setup(therm);
	93	+ } else
	94	+ return -ENODEV;
68	95
69		− if (sensor->slope_div == 0)
70		− sensor->slope_div = 1;
71		− if (sensor->offset_den == 0)
72		− sensor->offset_den = 1;
73		− if (sensor->slope_mult < 1)
74		− sensor->slope_mult = 1;
	96	+ /* if the slope or the offset is unset, do no use the sensor */
	97	+ if (!sensor->slope_div \|\| !sensor->slope_mult \|\|
	98	+ !sensor->offset_num \|\| !sensor->offset_den)
	99	+ return -ENODEV;
75	100
76	101	core_temp = core_temp * sensor->slope_mult / sensor->slope_div;
77	102	core_temp = core_temp + sensor->offset_num / sensor->offset_den;
78	103	core_temp = core_temp + sensor->offset_constant - 8;
79	104
	105	+ /* reserve negative temperatures for errors */
	106	+ if (core_temp < 0)
	107	+ core_temp = 0;
	108	+
80	109	return core_temp;
81	110	}
82	111

drivers/gpu/drm/nouveau/core/subdev/therm/priv.h+2−1

@@ -102,7 +102,7 @@ struct nouveau_therm_priv { · 101 unmodified lines
102	102	struct i2c_client *ic;
103	103	};
104	104
105		−int nouveau_therm_mode(struct nouveau_therm *therm, int mode);
	105	+int nouveau_therm_fan_mode(struct nouveau_therm *therm, int mode);
106	106	int nouveau_therm_attr_get(struct nouveau_therm *therm,
107	107	enum nouveau_therm_attr_type type);
108	108	int nouveau_therm_attr_set(struct nouveau_therm *therm,
@@ -122,6 +122,7 @@ int nouveau_therm_fan_sense(struct nouveau_therm *therm); · 13 unmodified lines
122	122
123	123	int nouveau_therm_preinit(struct nouveau_therm *);
124	124
	125	+void nouveau_therm_sensor_preinit(struct nouveau_therm *);
125	126	void nouveau_therm_sensor_set_threshold_state(struct nouveau_therm *therm,
126	127	enum nouveau_therm_thrs thrs,
127	128	enum nouveau_therm_thrs_state st);

drivers/gpu/drm/nouveau/core/subdev/therm/temp.c+16−14

@@ -34,10 +34,6 @@ nouveau_therm_temp_set_defaults(struct nouveau_therm *therm) · 33 unmodified lines
34	34	{
35	35	struct nouveau_therm_priv priv = (void )therm;
36	36
37		− priv->bios_sensor.slope_mult = 1;
38		− priv->bios_sensor.slope_div = 1;
39		− priv->bios_sensor.offset_num = 0;
40		− priv->bios_sensor.offset_den = 1;
41	37	priv->bios_sensor.offset_constant = 0;
42	38
43	39	priv->bios_sensor.thrs_fan_boost.temp = 90;
@@ -60,11 +56,6 @@ nouveau_therm_temp_safety_checks(struct nouveau_therm *therm) · 16 unmodified lines
60	56	struct nouveau_therm_priv priv = (void )therm;
61	57	struct nvbios_therm_sensor *s = &priv->bios_sensor;
62	58
63		− if (!priv->bios_sensor.slope_div)
64		− priv->bios_sensor.slope_div = 1;
65		− if (!priv->bios_sensor.offset_den)
66		− priv->bios_sensor.offset_den = 1;
67		−
68	59	/* enforce a minimum hysteresis on thresholds */
69	60	s->thrs_fan_boost.hysteresis = max_t(u8, s->thrs_fan_boost.hysteresis, 2);
70	61	s->thrs_down_clock.hysteresis = max_t(u8, s->thrs_down_clock.hysteresis, 2);
@@ -106,16 +97,16 @@ void nouveau_therm_sensor_event(struct nouveau_therm *therm, · 35 unmodified lines
106	97	const char *thresolds[] = {
107	98	"fanboost", "downclock", "critical", "shutdown"
108	99	};
109		− uint8_t temperature = therm->temp_get(therm);
	100	+ int temperature = therm->temp_get(therm);
110	101
111	102	if (thrs < 0 \|\| thrs > 3)
112	103	return;
113	104
114	105	if (dir == NOUVEAU_THERM_THRS_FALLING)
115		− nv_info(therm, "temperature (%u C) went below the '%s' threshold\n",
	106	+ nv_info(therm, "temperature (%i C) went below the '%s' threshold\n",
116	107	temperature, thresolds[thrs]);
117	108	else
118		− nv_info(therm, "temperature (%u C) hit the '%s' threshold\n",
	109	+ nv_info(therm, "temperature (%i C) hit the '%s' threshold\n",
119	110	temperature, thresolds[thrs]);
120	111
121	112	active = (dir == NOUVEAU_THERM_THRS_RISING);
@@ -123,7 +114,7 @@ void nouveau_therm_sensor_event(struct nouveau_therm *therm, · 1 unmodified line
123	114	case NOUVEAU_THERM_THRS_FANBOOST:
124	115	if (active) {
125	116	nouveau_therm_fan_set(therm, true, 100);
126		− nouveau_therm_mode(therm, NOUVEAU_THERM_CTRL_AUTO);
	117	+ nouveau_therm_fan_mode(therm, NOUVEAU_THERM_CTRL_AUTO);
127	118	}
128	119	break;
129	120	case NOUVEAU_THERM_THRS_DOWNCLOCK:
@@ -202,7 +193,7 @@ alarm_timer_callback(struct nouveau_alarm *alarm) · 72 unmodified lines
202	193	NOUVEAU_THERM_THRS_SHUTDOWN);
203	194
204	195	/* schedule the next poll in one second */
205		− if (list_empty(&alarm->head))
	196	+ if (therm->temp_get(therm) >= 0 && list_empty(&alarm->head))
206	197	ptimer->alarm(ptimer, 1000 * 1000 * 1000, alarm);
207	198
208	199	spin_unlock_irqrestore(&priv->sensor.alarm_program_lock, flags);
@@ -225,6 +216,17 @@ nouveau_therm_program_alarms_polling(struct nouveau_therm *therm) · 16 unmodified lines
225	216	alarm_timer_callback(&priv->sensor.therm_poll_alarm);
226	217	}
227	218
	219	+void
	220	+nouveau_therm_sensor_preinit(struct nouveau_therm *therm)
	221	+{
	222	+ const char *sensor_avail = "yes";
	223	+
	224	+ if (therm->temp_get(therm) < 0)
	225	+ sensor_avail = "no";
	226	+
	227	+ nv_info(therm, "internal sensor: %s\n", sensor_avail);
	228	+}
	229	+
228	230	int
229	231	nouveau_therm_sensor_ctor(struct nouveau_therm *therm)
230	232	{

drivers/gpu/drm/nouveau/nouveau_abi16.c+15−8

@@ -116,6 +116,11 @@ nouveau_abi16_chan_fini(struct nouveau_abi16 *abi16, · 115 unmodified lines
116	116	{
117	117	struct nouveau_abi16_ntfy ntfy, temp;
118	118
	119	+ /* wait for all activity to stop before releasing notify object, which
	120	+ * may be still in use */
	121	+ if (chan->chan && chan->ntfy)
	122	+ nouveau_channel_idle(chan->chan);
	123	+
119	124	/* cleanup notifier state */
120	125	list_for_each_entry_safe(ntfy, temp, &chan->notifiers, head) {
121	126	nouveau_abi16_ntfy_fini(chan, ntfy);
@@ -386,7 +391,7 @@ nouveau_abi16_ioctl_notifierobj_alloc(ABI16_IOCTL_ARGS) · 264 unmodified lines
386	391	struct nouveau_drm *drm = nouveau_drm(dev);
387	392	struct nouveau_device *device = nv_device(drm->device);
388	393	struct nouveau_abi16 *abi16 = nouveau_abi16_get(file_priv, dev);
389		− struct nouveau_abi16_chan chan, temp;
	394	+ struct nouveau_abi16_chan chan = NULL, temp;
390	395	struct nouveau_abi16_ntfy *ntfy;
391	396	struct nouveau_object *object;
392	397	struct nv_dma_class args = {};
@@ -399,10 +404,11 @@ nouveau_abi16_ioctl_notifierobj_alloc(ABI16_IOCTL_ARGS) · 6 unmodified lines
399	404	if (unlikely(nv_device(abi16->device)->card_type >= NV_C0))
400	405	return nouveau_abi16_put(abi16, -EINVAL);
401	406
402		− list_for_each_entry_safe(chan, temp, &abi16->channels, head) {
403		− if (chan->chan->handle == (NVDRM_CHAN \| info->channel))
	407	+ list_for_each_entry(temp, &abi16->channels, head) {
	408	+ if (temp->chan->handle == (NVDRM_CHAN \| info->channel)) {
	409	+ chan = temp;
404	410	break;
405		− chan = NULL;
	411	+ }
406	412	}
407	413
408	414	if (!chan)
@@ -454,17 +460,18 @@ nouveau_abi16_ioctl_gpuobj_free(ABI16_IOCTL_ARGS) · 45 unmodified lines
454	460	{
455	461	struct drm_nouveau_gpuobj_free *fini = data;
456	462	struct nouveau_abi16 *abi16 = nouveau_abi16_get(file_priv, dev);
457		− struct nouveau_abi16_chan chan, temp;
	463	+ struct nouveau_abi16_chan chan = NULL, temp;
458	464	struct nouveau_abi16_ntfy *ntfy;
459	465	int ret;
460	466
461	467	if (unlikely(!abi16))
462	468	return -ENOMEM;
463	469
464		− list_for_each_entry_safe(chan, temp, &abi16->channels, head) {
465		− if (chan->chan->handle == (NVDRM_CHAN \| fini->channel))
	470	+ list_for_each_entry(temp, &abi16->channels, head) {
	471	+ if (temp->chan->handle == (NVDRM_CHAN \| fini->channel)) {
	472	+ chan = temp;
466	473	break;
467		− chan = NULL;
	474	+ }
468	475	}
469	476
470	477	if (!chan)

drivers/gpu/drm/nouveau/nouveau_bo.c+2−2

@@ -801,7 +801,7 @@ nv50_bo_move_m2mf(struct nouveau_channel chan, struct ttm_buffer_object bo, · 800 unmodified lines
801	801	stride = 16 * 4;
802	802	height = amount / stride;
803	803
804		− if (new_mem->mem_type == TTM_PL_VRAM &&
	804	+ if (old_mem->mem_type == TTM_PL_VRAM &&
805	805	nouveau_bo_tile_layout(nvbo)) {
806	806	ret = RING_SPACE(chan, 8);
807	807	if (ret)
@@ -823,7 +823,7 @@ nv50_bo_move_m2mf(struct nouveau_channel chan, struct ttm_buffer_object bo, · 15 unmodified lines
823	823	BEGIN_NV04(chan, NvSubCopy, 0x0200, 1);
824	824	OUT_RING (chan, 1);
825	825	}
826		− if (old_mem->mem_type == TTM_PL_VRAM &&
	826	+ if (new_mem->mem_type == TTM_PL_VRAM &&
827	827	nouveau_bo_tile_layout(nvbo)) {
828	828	ret = RING_SPACE(chan, 8);
829	829	if (ret)

drivers/gpu/drm/nouveau/nouveau_drm.c+20−12

@@ -71,12 +71,26 @@ module_param_named(modeset, nouveau_modeset, int, 0400); · 70 unmodified lines
71	71
72	72	static struct drm_driver driver;
73	73
	74	+static int
	75	+nouveau_drm_vblank_handler(struct nouveau_eventh *event, int head)
	76	+{
	77	+ struct nouveau_drm *drm =
	78	+ container_of(event, struct nouveau_drm, vblank[head]);
	79	+ drm_handle_vblank(drm->dev, head);
	80	+ return NVKM_EVENT_KEEP;
	81	+}
	82	+
74	83	static int
75	84	nouveau_drm_vblank_enable(struct drm_device *dev, int head)
76	85	{
77	86	struct nouveau_drm *drm = nouveau_drm(dev);
78	87	struct nouveau_disp *pdisp = nouveau_disp(drm->device);
79		− nouveau_event_get(pdisp->vblank, head, &drm->vblank);
	88	+
	89	+ if (WARN_ON_ONCE(head > ARRAY_SIZE(drm->vblank)))
	90	+ return -EIO;
	91	+ WARN_ON_ONCE(drm->vblank[head].func);
	92	+ drm->vblank[head].func = nouveau_drm_vblank_handler;
	93	+ nouveau_event_get(pdisp->vblank, head, &drm->vblank[head]);
80	94	return 0;
81	95	}
82	96
@@ -85,16 +99,11 @@ nouveau_drm_vblank_disable(struct drm_device *dev, int head) · 2 unmodified lines
85	99	{
86	100	struct nouveau_drm *drm = nouveau_drm(dev);
87	101	struct nouveau_disp *pdisp = nouveau_disp(drm->device);
88		− nouveau_event_put(pdisp->vblank, head, &drm->vblank);
89		−}
90		−
91		−static int
92		−nouveau_drm_vblank_handler(struct nouveau_eventh *event, int head)
93		−{
94		− struct nouveau_drm *drm =
95		− container_of(event, struct nouveau_drm, vblank);
96		− drm_handle_vblank(drm->dev, head);
97		− return NVKM_EVENT_KEEP;
	102	+ if (drm->vblank[head].func)
	103	+ nouveau_event_put(pdisp->vblank, head, &drm->vblank[head]);
	104	+ else
	105	+ WARN_ON_ONCE(1);
	106	+ drm->vblank[head].func = NULL;
98	107	}
99	108
100	109	static u64
@@ -292,7 +301,6 @@ nouveau_drm_load(struct drm_device *dev, unsigned long flags) · 191 unmodified lines
292	301
293	302	dev->dev_private = drm;
294	303	drm->dev = dev;
295		− drm->vblank.func = nouveau_drm_vblank_handler;
296	304
297	305	INIT_LIST_HEAD(&drm->clients);
298	306	spin_lock_init(&drm->tile.lock);

drivers/gpu/drm/nouveau/nouveau_drm.h+1−1

@@ -113,7 +113,7 @@ struct nouveau_drm { · 112 unmodified lines
113	113	struct nvbios vbios;
114	114	struct nouveau_display *display;
115	115	struct backlight_device *backlight;
116		− struct nouveau_eventh vblank;
	116	+ struct nouveau_eventh vblank[4];
117	117
118	118	/* power management */
119	119	struct nouveau_pm *pm;

drivers/gpu/drm/nouveau/nouveau_pm.c+31−13

@@ -402,8 +402,12 @@ nouveau_hwmon_show_temp(struct device d, struct device_attribute a, char *buf) · 401 unmodified lines
402	402	struct drm_device *dev = dev_get_drvdata(d);
403	403	struct nouveau_drm *drm = nouveau_drm(dev);
404	404	struct nouveau_therm *therm = nouveau_therm(drm->device);
	405	+ int temp = therm->temp_get(therm);
405	406
406		− return snprintf(buf, PAGE_SIZE, "%d\n", therm->temp_get(therm) * 1000);
	407	+ if (temp < 0)
	408	+ return temp;
	409	+
	410	+ return snprintf(buf, PAGE_SIZE, "%d\n", temp * 1000);
407	411	}
408	412	static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, nouveau_hwmon_show_temp,
409	413	NULL, 0);
@@ -871,7 +875,12 @@ static SENSOR_DEVICE_ATTR(pwm1_max, S_IRUGO \| S_IWUSR, · 461 unmodified lines
871	875	nouveau_hwmon_get_pwm1_max,
872	876	nouveau_hwmon_set_pwm1_max, 0);
873	877
874		−static struct attribute *hwmon_attributes[] = {
	878	+static struct attribute *hwmon_default_attributes[] = {
	879	+ &sensor_dev_attr_name.dev_attr.attr,
	880	+ &sensor_dev_attr_update_rate.dev_attr.attr,
	881	+ NULL
	882	+};
	883	+static struct attribute *hwmon_temp_attributes[] = {
875	884	&sensor_dev_attr_temp1_input.dev_attr.attr,
876	885	&sensor_dev_attr_temp1_auto_point1_pwm.dev_attr.attr,
877	886	&sensor_dev_attr_temp1_auto_point1_temp.dev_attr.attr,
@@ -882,8 +891,6 @@ static struct attribute *hwmon_attributes[] = { · 4 unmodified lines
882	891	&sensor_dev_attr_temp1_crit_hyst.dev_attr.attr,
883	892	&sensor_dev_attr_temp1_emergency.dev_attr.attr,
884	893	&sensor_dev_attr_temp1_emergency_hyst.dev_attr.attr,
885		− &sensor_dev_attr_name.dev_attr.attr,
886		− &sensor_dev_attr_update_rate.dev_attr.attr,
887	894	NULL
888	895	};
889	896	static struct attribute *hwmon_fan_rpm_attributes[] = {
@@ -898,8 +905,11 @@ static struct attribute *hwmon_pwm_fan_attributes[] = { · 8 unmodified lines
898	905	NULL
899	906	};
900	907
901		−static const struct attribute_group hwmon_attrgroup = {
902		− .attrs = hwmon_attributes,
	908	+static const struct attribute_group hwmon_default_attrgroup = {
	909	+ .attrs = hwmon_default_attributes,
	910	+};
	911	+static const struct attribute_group hwmon_temp_attrgroup = {
	912	+ .attrs = hwmon_temp_attributes,
903	913	};
904	914	static const struct attribute_group hwmon_fan_rpm_attrgroup = {
905	915	.attrs = hwmon_fan_rpm_attributes,
@@ -931,13 +941,22 @@ nouveau_hwmon_init(struct drm_device *dev) · 25 unmodified lines
931	941	}
932	942	dev_set_drvdata(hwmon_dev, dev);
933	943
934		− /* default sysfs entries */
935		− ret = sysfs_create_group(&hwmon_dev->kobj, &hwmon_attrgroup);
	944	+ /* set the default attributes */
	945	+ ret = sysfs_create_group(&hwmon_dev->kobj, &hwmon_default_attrgroup);
936	946	if (ret) {
937	947	if (ret)
938	948	goto error;
939	949	}
940	950
	951	+ /* if the card has a working thermal sensor */
	952	+ if (therm->temp_get(therm) >= 0) {
	953	+ ret = sysfs_create_group(&hwmon_dev->kobj, &hwmon_temp_attrgroup);
	954	+ if (ret) {
	955	+ if (ret)
	956	+ goto error;
	957	+ }
	958	+ }
	959	+
941	960	/* if the card has a pwm fan */
942	961	/*XXX: incorrect, need better detection for this, some boards have
943	962	* the gpio entries for pwm fan control even when there's no
@@ -979,11 +998,10 @@ nouveau_hwmon_fini(struct drm_device *dev) · 35 unmodified lines
979	998	struct nouveau_pm *pm = nouveau_pm(dev);
980	999
981	1000	if (pm->hwmon) {
982		− sysfs_remove_group(&pm->hwmon->kobj, &hwmon_attrgroup);
983		− sysfs_remove_group(&pm->hwmon->kobj,
984		− &hwmon_pwm_fan_attrgroup);
985		− sysfs_remove_group(&pm->hwmon->kobj,
986		− &hwmon_fan_rpm_attrgroup);
	1001	+ sysfs_remove_group(&pm->hwmon->kobj, &hwmon_default_attrgroup);
	1002	+ sysfs_remove_group(&pm->hwmon->kobj, &hwmon_temp_attrgroup);
	1003	+ sysfs_remove_group(&pm->hwmon->kobj, &hwmon_pwm_fan_attrgroup);
	1004	+ sysfs_remove_group(&pm->hwmon->kobj, &hwmon_fan_rpm_attrgroup);
987	1005
988	1006	hwmon_device_unregister(pm->hwmon);
989	1007	}

drivers/gpu/drm/nouveau/nv50_display.c+4−3

@@ -479,7 +479,7 @@ nv50_display_flip_wait(void *data) · 478 unmodified lines
479	479	{
480	480	struct nv50_display_flip *flip = data;
481	481	if (nouveau_bo_rd32(flip->disp->sync, flip->chan->addr / 4) ==
482		− flip->chan->data);
	482	+ flip->chan->data)
483	483	return true;
484	484	usleep_range(1, 2);
485	485	return false;
@@ -524,6 +524,8 @@ nv50_display_flip_next(struct drm_crtc crtc, struct drm_framebuffer fb, · 38 unmodified lines
524	524	swap_interval <<= 4;
525	525	if (swap_interval == 0)
526	526	swap_interval \|= 0x100;
	527	+ if (chan == NULL)
	528	+ evo_sync(crtc->dev);
527	529
528	530	push = evo_wait(sync, 128);
529	531	if (unlikely(push == NULL))
@@ -586,8 +588,6 @@ nv50_display_flip_next(struct drm_crtc crtc, struct drm_framebuffer fb, · 56 unmodified lines
586	588	sync->addr ^= 0x10;
587	589	sync->data++;
588	590	FIRE_RING (chan);
589		− } else {
590		− evo_sync(crtc->dev);
591	591	}
592	592
593	593	/* queue the flip */
@@ -2276,6 +2276,7 @@ nv50_display_create(struct drm_device *dev) · 1682 unmodified lines
2276	2276	NV_WARN(drm, "failed to create encoder %d/%d/%d: %d\n",
2277	2277	dcbe->location, dcbe->type,
2278	2278	ffs(dcbe->or) - 1, ret);
	2279	+ ret = 0;
2279	2280	}
2280	2281	}
2281	2282

drivers/gpu/drm/radeon/ni.c+27−6

@@ -468,13 +468,19 @@ static void cayman_gpu_init(struct radeon_device *rdev) · 467 unmodified lines
468	468	(rdev->pdev->device == 0x9907) \|\|
469	469	(rdev->pdev->device == 0x9908) \|\|
470	470	(rdev->pdev->device == 0x9909) \|\|
	471	+ (rdev->pdev->device == 0x990B) \|\|
	472	+ (rdev->pdev->device == 0x990C) \|\|
	473	+ (rdev->pdev->device == 0x990F) \|\|
471	474	(rdev->pdev->device == 0x9910) \|\|
472		− (rdev->pdev->device == 0x9917)) {
	475	+ (rdev->pdev->device == 0x9917) \|\|
	476	+ (rdev->pdev->device == 0x9999)) {
473	477	rdev->config.cayman.max_simds_per_se = 6;
474	478	rdev->config.cayman.max_backends_per_se = 2;
475	479	} else if ((rdev->pdev->device == 0x9903) \|\|
476	480	(rdev->pdev->device == 0x9904) \|\|
477	481	(rdev->pdev->device == 0x990A) \|\|
	482	+ (rdev->pdev->device == 0x990D) \|\|
	483	+ (rdev->pdev->device == 0x990E) \|\|
478	484	(rdev->pdev->device == 0x9913) \|\|
479	485	(rdev->pdev->device == 0x9918)) {
480	486	rdev->config.cayman.max_simds_per_se = 4;
@@ -483,6 +489,9 @@ static void cayman_gpu_init(struct radeon_device *rdev) · 2 unmodified lines
483	489	(rdev->pdev->device == 0x9990) \|\|
484	490	(rdev->pdev->device == 0x9991) \|\|
485	491	(rdev->pdev->device == 0x9994) \|\|
	492	+ (rdev->pdev->device == 0x9995) \|\|
	493	+ (rdev->pdev->device == 0x9996) \|\|
	494	+ (rdev->pdev->device == 0x999A) \|\|
486	495	(rdev->pdev->device == 0x99A0)) {
487	496	rdev->config.cayman.max_simds_per_se = 3;
488	497	rdev->config.cayman.max_backends_per_se = 1;
@@ -616,11 +625,22 @@ static void cayman_gpu_init(struct radeon_device *rdev) · 127 unmodified lines
616	625	WREG32(DMA_TILING_CONFIG + DMA0_REGISTER_OFFSET, gb_addr_config);
617	626	WREG32(DMA_TILING_CONFIG + DMA1_REGISTER_OFFSET, gb_addr_config);
618	627
619		− tmp = gb_addr_config & NUM_PIPES_MASK;
620		− tmp = r6xx_remap_render_backend(rdev, tmp,
621		− rdev->config.cayman.max_backends_per_se *
622		− rdev->config.cayman.max_shader_engines,
623		− CAYMAN_MAX_BACKENDS, disabled_rb_mask);
	628	+ if ((rdev->config.cayman.max_backends_per_se == 1) &&
	629	+ (rdev->flags & RADEON_IS_IGP)) {
	630	+ if ((disabled_rb_mask & 3) == 1) {
	631	+ /* RB0 disabled, RB1 enabled */
	632	+ tmp = 0x11111111;
	633	+ } else {
	634	+ /* RB1 disabled, RB0 enabled */
	635	+ tmp = 0x00000000;
	636	+ }
	637	+ } else {
	638	+ tmp = gb_addr_config & NUM_PIPES_MASK;
	639	+ tmp = r6xx_remap_render_backend(rdev, tmp,
	640	+ rdev->config.cayman.max_backends_per_se *
	641	+ rdev->config.cayman.max_shader_engines,
	642	+ CAYMAN_MAX_BACKENDS, disabled_rb_mask);
	643	+ }
624	644	WREG32(GB_BACKEND_MAP, tmp);
625	645
626	646	cgts_tcc_disable = 0xffff0000;
@@ -1771,6 +1791,7 @@ int cayman_resume(struct radeon_device *rdev) · 1144 unmodified lines
1771	1791	int cayman_suspend(struct radeon_device *rdev)
1772	1792	{
1773	1793	r600_audio_fini(rdev);
	1794	+ radeon_vm_manager_fini(rdev);
1774	1795	cayman_cp_enable(rdev, false);
1775	1796	cayman_dma_stop(rdev);
1776	1797	evergreen_irq_suspend(rdev);

drivers/gpu/drm/radeon/radeon_benchmark.c+10−11

@@ -122,10 +122,7 @@ static void radeon_benchmark_move(struct radeon_device *rdev, unsigned size, · 121 unmodified lines
122	122	goto out_cleanup;
123	123	}
124	124
125		− /* r100 doesn't have dma engine so skip the test */
126		− /* also, VRAM-to-VRAM test doesn't make much sense for DMA */
127		− /* skip it as well if domains are the same */
128		− if ((rdev->asic->copy.dma) && (sdomain != ddomain)) {
	125	+ if (rdev->asic->copy.dma) {
129	126	time = radeon_benchmark_do_move(rdev, size, saddr, daddr,
130	127	RADEON_BENCHMARK_COPY_DMA, n);
131	128	if (time < 0)
@@ -135,13 +132,15 @@ static void radeon_benchmark_move(struct radeon_device *rdev, unsigned size, · 3 unmodified lines
135	132	sdomain, ddomain, "dma");
136	133	}
137	134
138		− time = radeon_benchmark_do_move(rdev, size, saddr, daddr,
139		− RADEON_BENCHMARK_COPY_BLIT, n);
140		− if (time < 0)
141		− goto out_cleanup;
142		− if (time > 0)
143		− radeon_benchmark_log_results(n, size, time,
144		− sdomain, ddomain, "blit");
	135	+ if (rdev->asic->copy.blit) {
	136	+ time = radeon_benchmark_do_move(rdev, size, saddr, daddr,
	137	+ RADEON_BENCHMARK_COPY_BLIT, n);
	138	+ if (time < 0)
	139	+ goto out_cleanup;
	140	+ if (time > 0)
	141	+ radeon_benchmark_log_results(n, size, time,
	142	+ sdomain, ddomain, "blit");
	143	+ }
145	144
146	145	out_cleanup:
147	146	if (sobj) {

drivers/gpu/drm/radeon/radeon_bios.c+26−0

@@ -99,6 +99,29 @@ static bool radeon_read_bios(struct radeon_device *rdev) · 98 unmodified lines
99	99	return true;
100	100	}
101	101
	102	+static bool radeon_read_platform_bios(struct radeon_device *rdev)
	103	+{
	104	+ uint8_t __iomem *bios;
	105	+ size_t size;
	106	+
	107	+ rdev->bios = NULL;
	108	+
	109	+ bios = pci_platform_rom(rdev->pdev, &size);
	110	+ if (!bios) {
	111	+ return false;
	112	+ }
	113	+
	114	+ if (size == 0 \|\| bios[0] != 0x55 \|\| bios[1] != 0xaa) {
	115	+ return false;
	116	+ }
	117	+ rdev->bios = kmemdup(bios, size, GFP_KERNEL);
	118	+ if (rdev->bios == NULL) {
	119	+ return false;
	120	+ }
	121	+
	122	+ return true;
	123	+}
	124	+
102	125	#ifdef CONFIG_ACPI
103	126	/* ATRM is used to get the BIOS on the discrete cards in
104	127	* dual-gpu systems.
@@ -620,6 +643,9 @@ bool radeon_get_bios(struct radeon_device *rdev) · 515 unmodified lines
620	643	if (r == false) {
621	644	r = radeon_read_disabled_bios(rdev);
622	645	}
	646	+ if (r == false) {
	647	+ r = radeon_read_platform_bios(rdev);
	648	+ }
623	649	if (r == false \|\| rdev->bios == NULL) {
624	650	DRM_ERROR("Unable to locate a BIOS ROM\n");
625	651	rdev->bios = NULL;

drivers/gpu/drm/radeon/si.c+1−0

@@ -4469,6 +4469,7 @@ int si_resume(struct radeon_device *rdev) · 4468 unmodified lines
4469	4469
4470	4470	int si_suspend(struct radeon_device *rdev)
4471	4471	{
	4472	+ radeon_vm_manager_fini(rdev);
4472	4473	si_cp_enable(rdev, false);
4473	4474	cayman_dma_stop(rdev);
4474	4475	si_irq_suspend(rdev);

drivers/gpu/drm/udl/udl_connector.c+4−0

@@ -61,6 +61,10 @@ static int udl_get_modes(struct drm_connector *connector) · 60 unmodified lines
61	61	int ret;
62	62
63	63	edid = (struct edid *)udl_get_edid(udl);
	64	+ if (!edid) {
	65	+ drm_mode_connector_update_edid_property(connector, NULL);
	66	+ return 0;
	67	+ }
64	68
65	69	/*
66	70	* We only read the main block, but if the monitor reports extension

drivers/hid/hid-core.c+12−1

@@ -2077,7 +2077,6 @@ static const struct hid_device_id hid_ignore_list[] = { · 2076 unmodified lines
2077	2077	{ HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_HYBRID) },
2078	2078	{ HID_USB_DEVICE(USB_VENDOR_ID_LD, USB_DEVICE_ID_LD_HEATCONTROL) },
2079	2079	{ HID_USB_DEVICE(USB_VENDOR_ID_MADCATZ, USB_DEVICE_ID_MADCATZ_BEATPAD) },
2080		− { HID_USB_DEVICE(USB_VENDOR_ID_MASTERKIT, USB_DEVICE_ID_MASTERKIT_MA901RADIO) },
2081	2080	{ HID_USB_DEVICE(USB_VENDOR_ID_MCC, USB_DEVICE_ID_MCC_PMD1024LS) },
2082	2081	{ HID_USB_DEVICE(USB_VENDOR_ID_MCC, USB_DEVICE_ID_MCC_PMD1208LS) },
2083	2082	{ HID_USB_DEVICE(USB_VENDOR_ID_MICROCHIP, USB_DEVICE_ID_PICKIT1) },
@@ -2244,6 +2243,18 @@ bool hid_ignore(struct hid_device *hdev) · 160 unmodified lines
2244	2243	hdev->product <= USB_DEVICE_ID_VELLEMAN_K8061_LAST))
2245	2244	return true;
2246	2245	break;
	2246	+ case USB_VENDOR_ID_ATMEL_V_USB:
	2247	+ /* Masterkit MA901 usb radio based on Atmel tiny85 chip and
	2248	+ * it has the same USB ID as many Atmel V-USB devices. This
	2249	+ * usb radio is handled by radio-ma901.c driver so we want
	2250	+ * ignore the hid. Check the name, bus, product and ignore
	2251	+ * if we have MA901 usb radio.
	2252	+ */
	2253	+ if (hdev->product == USB_DEVICE_ID_ATMEL_V_USB &&
	2254	+ hdev->bus == BUS_USB &&
	2255	+ strncmp(hdev->name, "www.masterkit.ru MA901", 22) == 0)
	2256	+ return true;
	2257	+ break;
2247	2258	}
2248	2259
2249	2260	if (hdev->type == HID_TYPE_USBMOUSE &&

drivers/hid/hid-ids.h+8−3

@@ -158,6 +158,8 @@ · 157 unmodified lines
158	158	#define USB_VENDOR_ID_ATMEL 0x03eb
159	159	#define USB_DEVICE_ID_ATMEL_MULTITOUCH 0x211c
160	160	#define USB_DEVICE_ID_ATMEL_MXT_DIGITIZER 0x2118
	161	+#define USB_VENDOR_ID_ATMEL_V_USB 0x16c0
	162	+#define USB_DEVICE_ID_ATMEL_V_USB 0x05df
161	163
162	164	#define USB_VENDOR_ID_AUREAL 0x0755
163	165	#define USB_DEVICE_ID_AUREAL_W01RN 0x2626
@@ -557,9 +559,6 @@ · 393 unmodified lines
557	559	#define USB_VENDOR_ID_MADCATZ 0x0738
558	560	#define USB_DEVICE_ID_MADCATZ_BEATPAD 0x4540
559	561
560		−#define USB_VENDOR_ID_MASTERKIT 0x16c0
561		−#define USB_DEVICE_ID_MASTERKIT_MA901RADIO 0x05df
562		−
563	562	#define USB_VENDOR_ID_MCC 0x09db
564	563	#define USB_DEVICE_ID_MCC_PMD1024LS 0x0076
565	564	#define USB_DEVICE_ID_MCC_PMD1208LS 0x007a
@@ -590,6 +589,9 @@ · 24 unmodified lines
590	589	#define USB_VENDOR_ID_MONTEREY 0x0566
591	590	#define USB_DEVICE_ID_GENIUS_KB29E 0x3004
592	591
	592	+#define USB_VENDOR_ID_MSI 0x1770
	593	+#define USB_DEVICE_ID_MSI_GX680R_LED_PANEL 0xff00
	594	+
593	595	#define USB_VENDOR_ID_NATIONAL_SEMICONDUCTOR 0x0400
594	596	#define USB_DEVICE_ID_N_S_HARMONY 0xc359
595	597
@@ -684,6 +686,9 @@ · 88 unmodified lines
684	686	#define USB_DEVICE_ID_QUANTA_OPTICAL_TOUCH_3001 0x3001
685	687	#define USB_DEVICE_ID_QUANTA_OPTICAL_TOUCH_3008 0x3008
686	688
	689	+#define USB_VENDOR_ID_REALTEK 0x0bda
	690	+#define USB_DEVICE_ID_REALTEK_READER 0x0152
	691	+
687	692	#define USB_VENDOR_ID_ROCCAT 0x1e7d
688	693	#define USB_DEVICE_ID_ROCCAT_ARVO 0x30d4
689	694	#define USB_DEVICE_ID_ROCCAT_ISKU 0x319c

drivers/hid/hid-magicmouse.c+20−9

@@ -462,6 +462,21 @@ static int magicmouse_input_mapping(struct hid_device *hdev, · 461 unmodified lines
462	462	return 0;
463	463	}
464	464
	465	+static void magicmouse_input_configured(struct hid_device *hdev,
	466	+ struct hid_input *hi)
	467	+
	468	+{
	469	+ struct magicmouse_sc *msc = hid_get_drvdata(hdev);
	470	+
	471	+ int ret = magicmouse_setup_input(msc->input, hdev);
	472	+ if (ret) {
	473	+ hid_err(hdev, "magicmouse setup input failed (%d)\n", ret);
	474	+ /* clean msc->input to notify probe() of the failure */
	475	+ msc->input = NULL;
	476	+ }
	477	+}
	478	+
	479	+
465	480	static int magicmouse_probe(struct hid_device *hdev,
466	481	const struct hid_device_id *id)
467	482	{
@@ -493,15 +508,10 @@ static int magicmouse_probe(struct hid_device *hdev, · 25 unmodified lines
493	508	goto err_free;
494	509	}
495	510
496		− /* We do this after hid-input is done parsing reports so that
497		− * hid-input uses the most natural button and axis IDs.
498		− */
499		− if (msc->input) {
500		− ret = magicmouse_setup_input(msc->input, hdev);
501		− if (ret) {
502		− hid_err(hdev, "magicmouse setup input failed (%d)\n", ret);
503		− goto err_stop_hw;
504		− }
	511	+ if (!msc->input) {
	512	+ hid_err(hdev, "magicmouse input not registered\n");
	513	+ ret = -ENOMEM;
	514	+ goto err_stop_hw;
505	515	}
506	516
507	517	if (id->product == USB_DEVICE_ID_APPLE_MAGICMOUSE)
@@ -568,6 +578,7 @@ static struct hid_driver magicmouse_driver = { · 60 unmodified lines
568	578	.remove = magicmouse_remove,
569	579	.raw_event = magicmouse_raw_event,
570	580	.input_mapping = magicmouse_input_mapping,
	581	+ .input_configured = magicmouse_input_configured,
571	582	};
572	583	module_hid_driver(magicmouse_driver);
573	584

drivers/hid/hid-multitouch.c+5−1

@@ -621,6 +621,7 @@ static void mt_process_mt_event(struct hid_device hid, struct hid_field field, · 620 unmodified lines
621	621	{
622	622	struct mt_device *td = hid_get_drvdata(hid);
623	623	__s32 quirks = td->mtclass.quirks;
	624	+ struct input_dev *input = field->hidinput->input;
624	625
625	626	if (hid->claimed & HID_CLAIMED_INPUT) {
626	627	switch (usage->hid) {
@@ -670,13 +671,16 @@ static void mt_process_mt_event(struct hid_device hid, struct hid_field field, · 43 unmodified lines
670	671	break;
671	672
672	673	default:
	674	+ if (usage->type)
	675	+ input_event(input, usage->type, usage->code,
	676	+ value);
673	677	return;
674	678	}
675	679
676	680	if (usage->usage_index + 1 == field->report_count) {
677	681	/* we only take into account the last report. */
678	682	if (usage->hid == td->last_slot_field)
679		− mt_complete_slot(td, field->hidinput->input);
	683	+ mt_complete_slot(td, input);
680	684
681	685	if (field->index == td->last_field_index
682	686	&& td->num_received >= td->num_expected)

drivers/hid/usbhid/hid-quirks.c+2−0

@@ -73,6 +73,7 @@ static const struct hid_blacklist { · 72 unmodified lines
73	73	{ USB_VENDOR_ID_FORMOSA, USB_DEVICE_ID_FORMOSA_IR_RECEIVER, HID_QUIRK_NO_INIT_REPORTS },
74	74	{ USB_VENDOR_ID_FREESCALE, USB_DEVICE_ID_FREESCALE_MX28, HID_QUIRK_NOGET },
75	75	{ USB_VENDOR_ID_MGE, USB_DEVICE_ID_MGE_UPS, HID_QUIRK_NOGET },
	76	+ { USB_VENDOR_ID_MSI, USB_DEVICE_ID_MSI_GX680R_LED_PANEL, HID_QUIRK_NO_INIT_REPORTS },
76	77	{ USB_VENDOR_ID_NOVATEK, USB_DEVICE_ID_NOVATEK_MOUSE, HID_QUIRK_NO_INIT_REPORTS },
77	78	{ USB_VENDOR_ID_PIXART, USB_DEVICE_ID_PIXART_OPTICAL_TOUCH_SCREEN, HID_QUIRK_NO_INIT_REPORTS },
78	79	{ USB_VENDOR_ID_PIXART, USB_DEVICE_ID_PIXART_OPTICAL_TOUCH_SCREEN1, HID_QUIRK_NO_INIT_REPORTS },
@@ -80,6 +81,7 @@ static const struct hid_blacklist { · 1 unmodified line
80	81	{ USB_VENDOR_ID_PRODIGE, USB_DEVICE_ID_PRODIGE_CORDLESS, HID_QUIRK_NOGET },
81	82	{ USB_VENDOR_ID_QUANTA, USB_DEVICE_ID_QUANTA_OPTICAL_TOUCH_3001, HID_QUIRK_NOGET },
82	83	{ USB_VENDOR_ID_QUANTA, USB_DEVICE_ID_QUANTA_OPTICAL_TOUCH_3008, HID_QUIRK_NOGET },
	84	+ { USB_VENDOR_ID_REALTEK, USB_DEVICE_ID_REALTEK_READER, HID_QUIRK_NO_INIT_REPORTS },
83	85	{ USB_VENDOR_ID_SENNHEISER, USB_DEVICE_ID_SENNHEISER_BTD500USB, HID_QUIRK_NOGET },
84	86	{ USB_VENDOR_ID_SIGMATEL, USB_DEVICE_ID_SIGMATEL_STMP3780, HID_QUIRK_NOGET },
85	87	{ USB_VENDOR_ID_SUN, USB_DEVICE_ID_RARITAN_KVM_DONGLE, HID_QUIRK_NOGET },

drivers/hwmon/lineage-pem.c+2−0

@@ -422,6 +422,7 @@ static struct attribute *pem_input_attributes[] = { · 421 unmodified lines
422	422	&sensor_dev_attr_in2_input.dev_attr.attr,
423	423	&sensor_dev_attr_curr1_input.dev_attr.attr,
424	424	&sensor_dev_attr_power1_input.dev_attr.attr,
	425	+ NULL
425	426	};
426	427
427	428	static const struct attribute_group pem_input_group = {
@@ -432,6 +433,7 @@ static struct attribute *pem_fan_attributes[] = { · 4 unmodified lines
432	433	&sensor_dev_attr_fan1_input.dev_attr.attr,
433	434	&sensor_dev_attr_fan2_input.dev_attr.attr,
434	435	&sensor_dev_attr_fan3_input.dev_attr.attr,
	436	+ NULL
435	437	};
436	438
437	439	static const struct attribute_group pem_fan_group = {

drivers/hwmon/lm75.h+1−1

@@ -25,7 +25,7 @@ · 24 unmodified lines
25	25	which contains this code, we don't worry about the wasted space.
26	26	*/
27	27
28		−#include <linux/hwmon.h>
	28	+#include <linux/kernel.h>
29	29
30	30	/* straight from the datasheet */
31	31	#define LM75_TEMP_MIN (-55000)

drivers/hwmon/pmbus/ltc2978.c+8−6

@@ -59,7 +59,7 @@ enum chips { ltc2978, ltc3880 }; · 58 unmodified lines
59	59	struct ltc2978_data {
60	60	enum chips id;
61	61	int vin_min, vin_max;
62		− int temp_min, temp_max;
	62	+ int temp_min, temp_max[2];
63	63	int vout_min[8], vout_max[8];
64	64	int iout_max[2];
65	65	int temp2_max;
@@ -113,9 +113,10 @@ static int ltc2978_read_word_data_common(struct i2c_client *client, int page, · 47 unmodified lines
113	113	ret = pmbus_read_word_data(client, page,
114	114	LTC2978_MFR_TEMPERATURE_PEAK);
115	115	if (ret >= 0) {
116		− if (lin11_to_val(ret) > lin11_to_val(data->temp_max))
117		− data->temp_max = ret;
118		− ret = data->temp_max;
	116	+ if (lin11_to_val(ret)
	117	+ > lin11_to_val(data->temp_max[page]))
	118	+ data->temp_max[page] = ret;
	119	+ ret = data->temp_max[page];
119	120	}
120	121	break;
121	122	case PMBUS_VIRT_RESET_VOUT_HISTORY:
@@ -266,7 +267,7 @@ static int ltc2978_write_word_data(struct i2c_client *client, int page, · 144 unmodified lines
266	267	break;
267	268	case PMBUS_VIRT_RESET_TEMP_HISTORY:
268	269	data->temp_min = 0x7bff;
269		− data->temp_max = 0x7c00;
	270	+ data->temp_max[page] = 0x7c00;
270	271	ret = ltc2978_clear_peaks(client, page, data->id);
271	272	break;
272	273	default:
@@ -323,7 +324,8 @@ static int ltc2978_probe(struct i2c_client *client, · 50 unmodified lines
323	324	data->vin_min = 0x7bff;
324	325	data->vin_max = 0x7c00;
325	326	data->temp_min = 0x7bff;
326		− data->temp_max = 0x7c00;
	327	+ for (i = 0; i < ARRAY_SIZE(data->temp_max); i++)
	328	+ data->temp_max[i] = 0x7c00;
327	329	data->temp2_max = 0x7c00;
328	330
329	331	switch (data->id) {

drivers/hwmon/pmbus/pmbus_core.c+7−5

@@ -766,12 +766,14 @@ static ssize_t pmbus_show_label(struct device *dev, · 765 unmodified lines
766	766	static int pmbus_add_attribute(struct pmbus_data data, struct attribute attr)
767	767	{
768	768	if (data->num_attributes >= data->max_attributes - 1) {
769		− data->max_attributes += PMBUS_ATTR_ALLOC_SIZE;
770		− data->group.attrs = krealloc(data->group.attrs,
771		− sizeof(struct attribute )
772		− data->max_attributes, GFP_KERNEL);
773		− if (data->group.attrs == NULL)
	769	+ int new_max_attrs = data->max_attributes + PMBUS_ATTR_ALLOC_SIZE;
	770	+ void *new_attrs = krealloc(data->group.attrs,
	771	+ new_max_attrs * sizeof(void *),
	772	+ GFP_KERNEL);
	773	+ if (!new_attrs)
774	774	return -ENOMEM;
	775	+ data->group.attrs = new_attrs;
	776	+ data->max_attributes = new_max_attrs;
775	777	}
776	778
777	779	data->group.attrs[data->num_attributes++] = attr;

drivers/hwspinlock/hwspinlock_core.c+2−0

@@ -416,6 +416,8 @@ static int __hwspin_lock_request(struct hwspinlock *hwlock) · 415 unmodified lines
416	416	ret = pm_runtime_get_sync(dev);
417	417	if (ret < 0) {
418	418	dev_err(dev, "%s: can't power on device\n", __func__);
	419	+ pm_runtime_put_noidle(dev);
	420	+ module_put(dev->driver->owner);
419	421	return ret;
420	422	}
421	423

drivers/i2c/Kconfig+1−1

@@ -4,7 +4,6 @@ · 3 unmodified lines
4	4
5	5	menuconfig I2C
6	6	tristate "I2C support"
7		− depends on !S390
8	7	select RT_MUTEXES
9	8	---help---
10	9	I2C (pronounce: I-squared-C) is a slow serial bus protocol used in
@@ -76,6 +75,7 @@ config I2C_HELPER_AUTO · 65 unmodified lines
76	75
77	76	config I2C_SMBUS
78	77	tristate "SMBus-specific protocols" if !I2C_HELPER_AUTO
	78	+ depends on GENERIC_HARDIRQS
79	79	help
80	80	Say Y here if you want support for SMBus extensions to the I2C
81	81	specification. At the moment, the only supported extension is

drivers/i2c/busses/Kconfig+4−2

@@ -114,7 +114,7 @@ config I2C_I801 · 113 unmodified lines
114	114
115	115	config I2C_ISCH
116	116	tristate "Intel SCH SMBus 1.0"
117		− depends on PCI
	117	+ depends on PCI && GENERIC_HARDIRQS
118	118	select LPC_SCH
119	119	help
120	120	Say Y here if you want to use SMBus controller on the Intel SCH
@@ -543,6 +543,7 @@ config I2C_NUC900 · 422 unmodified lines
543	543
544	544	config I2C_OCORES
545	545	tristate "OpenCores I2C Controller"
	546	+ depends on GENERIC_HARDIRQS
546	547	help
547	548	If you say yes to this option, support will be included for the
548	549	OpenCores I2C controller. For details see
@@ -777,7 +778,7 @@ config I2C_DIOLAN_U2C · 228 unmodified lines
777	778
778	779	config I2C_PARPORT
779	780	tristate "Parallel port adapter"
780		− depends on PARPORT
	781	+ depends on PARPORT && GENERIC_HARDIRQS
781	782	select I2C_ALGOBIT
782	783	select I2C_SMBUS
783	784	help
@@ -802,6 +803,7 @@ config I2C_PARPORT · 18 unmodified lines
802	803
803	804	config I2C_PARPORT_LIGHT
804	805	tristate "Parallel port adapter (light)"
	806	+ depends on GENERIC_HARDIRQS
805	807	select I2C_ALGOBIT
806	808	select I2C_SMBUS
807	809	help

drivers/i2c/busses/i2c-designware-platdrv.c+0−1

@@ -182,7 +182,6 @@ static int dw_i2c_probe(struct platform_device *pdev) · 181 unmodified lines
182	182	adap->algo = &i2c_dw_algo;
183	183	adap->dev.parent = &pdev->dev;
184	184	adap->dev.of_node = pdev->dev.of_node;
185		− ACPI_HANDLE_SET(&adap->dev, ACPI_HANDLE(&pdev->dev));
186	185
187	186	r = i2c_add_numbered_adapter(adap);
188	187	if (r) {

drivers/i2c/busses/i2c-ismt.c+2−0

@@ -80,6 +80,7 @@ · 79 unmodified lines
80	80	/* PCI DIDs for the Intel SMBus Message Transport (SMT) Devices */
81	81	#define PCI_DEVICE_ID_INTEL_S1200_SMT0 0x0c59
82	82	#define PCI_DEVICE_ID_INTEL_S1200_SMT1 0x0c5a
	83	+#define PCI_DEVICE_ID_INTEL_AVOTON_SMT 0x1f15
83	84
84	85	#define ISMT_DESC_ENTRIES 32 /* number of descriptor entries */
85	86	#define ISMT_MAX_RETRIES 3 /* number of SMBus retries to attempt */
@@ -185,6 +186,7 @@ struct ismt_priv { · 99 unmodified lines
185	186	static const DEFINE_PCI_DEVICE_TABLE(ismt_ids) = {
186	187	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_S1200_SMT0) },
187	188	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_S1200_SMT1) },
	189	+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_AVOTON_SMT) },
188	190	{ 0, }
189	191	};
190	192

drivers/i2c/busses/i2c-tegra.c+11−2

@@ -411,7 +411,11 @@ static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev) · 410 unmodified lines
411	411	int clk_multiplier = I2C_CLK_MULTIPLIER_STD_FAST_MODE;
412	412	u32 clk_divisor;
413	413
414		− tegra_i2c_clock_enable(i2c_dev);
	414	+ err = tegra_i2c_clock_enable(i2c_dev);
	415	+ if (err < 0) {
	416	+ dev_err(i2c_dev->dev, "Clock enable failed %d\n", err);
	417	+ return err;
	418	+ }
415	419
416	420	tegra_periph_reset_assert(i2c_dev->div_clk);
417	421	udelay(2);
@@ -628,7 +632,12 @@ static int tegra_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], · 210 unmodified lines
628	632	if (i2c_dev->is_suspended)
629	633	return -EBUSY;
630	634
631		− tegra_i2c_clock_enable(i2c_dev);
	635	+ ret = tegra_i2c_clock_enable(i2c_dev);
	636	+ if (ret < 0) {
	637	+ dev_err(i2c_dev->dev, "Clock enable failed %d\n", ret);
	638	+ return ret;
	639	+ }
	640	+
632	641	for (i = 0; i < num; i++) {
633	642	enum msg_end_type end_type = MSG_END_STOP;
634	643	if (i < (num - 1)) {

drivers/i2c/muxes/i2c-mux-pca9541.c+1−1

@@ -3,7 +3,7 @@ · 2 unmodified lines
3	3	*
4	4	* Copyright (c) 2010 Ericsson AB.
5	5	*
6		− * Author: Guenter Roeck <guenter.roeck@ericsson.com>
	6	+ * Author: Guenter Roeck <linux@roeck-us.net>
7	7	*
8	8	* Derived from:
9	9	* pca954x.c

drivers/idle/intel_idle.c+1−0

@@ -465,6 +465,7 @@ static const struct x86_cpu_id intel_idle_ids[] = { · 464 unmodified lines
465	465	ICPU(0x3c, idle_cpu_hsw),
466	466	ICPU(0x3f, idle_cpu_hsw),
467	467	ICPU(0x45, idle_cpu_hsw),
	468	+ ICPU(0x46, idle_cpu_hsw),
468	469	{}
469	470	};
470	471	MODULE_DEVICE_TABLE(x86cpu, intel_idle_ids);

drivers/iio/common/st_sensors/st_sensors_core.c+4−5

@@ -62,7 +62,7 @@ st_sensors_match_odr_error: · 61 unmodified lines
62	62	int st_sensors_set_odr(struct iio_dev *indio_dev, unsigned int odr)
63	63	{
64	64	int err;
65		− struct st_sensor_odr_avl odr_out;
	65	+ struct st_sensor_odr_avl odr_out = {0, 0};
66	66	struct st_sensor_data *sdata = iio_priv(indio_dev);
67	67
68	68	err = st_sensors_match_odr(sdata->sensor, odr, &odr_out);
@@ -114,7 +114,7 @@ st_sensors_match_odr_error: · 45 unmodified lines
114	114
115	115	static int st_sensors_set_fullscale(struct iio_dev *indio_dev, unsigned int fs)
116	116	{
117		− int err, i;
	117	+ int err, i = 0;
118	118	struct st_sensor_data *sdata = iio_priv(indio_dev);
119	119
120	120	err = st_sensors_match_fs(sdata->sensor, fs, &i);
@@ -139,14 +139,13 @@ st_accel_set_fullscale_error: · 18 unmodified lines
139	139
140	140	int st_sensors_set_enable(struct iio_dev *indio_dev, bool enable)
141	141	{
142		− bool found;
143	142	u8 tmp_value;
144	143	int err = -EINVAL;
145		− struct st_sensor_odr_avl odr_out;
	144	+ bool found = false;
	145	+ struct st_sensor_odr_avl odr_out = {0, 0};
146	146	struct st_sensor_data *sdata = iio_priv(indio_dev);
147	147
148	148	if (enable) {
149		− found = false;
150	149	tmp_value = sdata->sensor->pw.value_on;
151	150	if ((sdata->sensor->odr.addr == sdata->sensor->pw.addr) &&
152	151	(sdata->sensor->odr.mask == sdata->sensor->pw.mask)) {

drivers/iio/dac/ad5064.c+38−26

@@ -27,7 +27,6 @@ · 26 unmodified lines
27	27	#define AD5064_ADDR(x) ((x) << 20)
28	28	#define AD5064_CMD(x) ((x) << 24)
29	29
30		−#define AD5064_ADDR_DAC(chan) (chan)
31	30	#define AD5064_ADDR_ALL_DAC 0xF
32	31
33	32	#define AD5064_CMD_WRITE_INPUT_N 0x0
@@ -131,15 +130,15 @@ static int ad5064_write(struct ad5064_state *st, unsigned int cmd, · 97 unmodified lines
131	130	}
132	131
133	132	static int ad5064_sync_powerdown_mode(struct ad5064_state *st,
134		− unsigned int channel)
	133	+ const struct iio_chan_spec *chan)
135	134	{
136	135	unsigned int val;
137	136	int ret;
138	137
139		− val = (0x1 << channel);
	138	+ val = (0x1 << chan->address);
140	139
141		− if (st->pwr_down[channel])
142		− val \|= st->pwr_down_mode[channel] << 8;
	140	+ if (st->pwr_down[chan->channel])
	141	+ val \|= st->pwr_down_mode[chan->channel] << 8;
143	142
144	143	ret = ad5064_write(st, AD5064_CMD_POWERDOWN_DAC, 0, val, 0);
145	144
@@ -169,7 +168,7 @@ static int ad5064_set_powerdown_mode(struct iio_dev *indio_dev, · 23 unmodified lines
169	168	mutex_lock(&indio_dev->mlock);
170	169	st->pwr_down_mode[chan->channel] = mode + 1;
171	170
172		− ret = ad5064_sync_powerdown_mode(st, chan->channel);
	171	+ ret = ad5064_sync_powerdown_mode(st, chan);
173	172	mutex_unlock(&indio_dev->mlock);
174	173
175	174	return ret;
@@ -205,7 +204,7 @@ static ssize_t ad5064_write_dac_powerdown(struct iio_dev *indio_dev, · 29 unmodified lines
205	204	mutex_lock(&indio_dev->mlock);
206	205	st->pwr_down[chan->channel] = pwr_down;
207	206
208		− ret = ad5064_sync_powerdown_mode(st, chan->channel);
	207	+ ret = ad5064_sync_powerdown_mode(st, chan);
209	208	mutex_unlock(&indio_dev->mlock);
210	209	return ret ? ret : len;
211	210	}
@@ -258,7 +257,7 @@ static int ad5064_write_raw(struct iio_dev *indio_dev, · 46 unmodified lines
258	257
259	258	switch (mask) {
260	259	case IIO_CHAN_INFO_RAW:
261		− if (val > (1 << chan->scan_type.realbits) \|\| val < 0)
	260	+ if (val >= (1 << chan->scan_type.realbits) \|\| val < 0)
262	261	return -EINVAL;
263	262
264	263	mutex_lock(&indio_dev->mlock);
@@ -292,34 +291,44 @@ static const struct iio_chan_spec_ext_info ad5064_ext_info[] = { · 27 unmodified lines
292	291	{ },
293	292	};
294	293
295		−#define AD5064_CHANNEL(chan, bits) { \
	294	+#define AD5064_CHANNEL(chan, addr, bits) { \
296	295	.type = IIO_VOLTAGE, \
297	296	.indexed = 1, \
298	297	.output = 1, \
299	298	.channel = (chan), \
300	299	.info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT \| \
301	300	IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \
302		− .address = AD5064_ADDR_DAC(chan), \
	301	+ .address = addr, \
303	302	.scan_type = IIO_ST('u', (bits), 16, 20 - (bits)), \
304	303	.ext_info = ad5064_ext_info, \
305	304	}
306	305
307	306	#define DECLARE_AD5064_CHANNELS(name, bits) \
308	307	const struct iio_chan_spec name[] = { \
309		− AD5064_CHANNEL(0, bits), \
310		− AD5064_CHANNEL(1, bits), \
311		− AD5064_CHANNEL(2, bits), \
312		− AD5064_CHANNEL(3, bits), \
313		− AD5064_CHANNEL(4, bits), \
314		− AD5064_CHANNEL(5, bits), \
315		− AD5064_CHANNEL(6, bits), \
316		− AD5064_CHANNEL(7, bits), \
	308	+ AD5064_CHANNEL(0, 0, bits), \
	309	+ AD5064_CHANNEL(1, 1, bits), \
	310	+ AD5064_CHANNEL(2, 2, bits), \
	311	+ AD5064_CHANNEL(3, 3, bits), \
	312	+ AD5064_CHANNEL(4, 4, bits), \
	313	+ AD5064_CHANNEL(5, 5, bits), \
	314	+ AD5064_CHANNEL(6, 6, bits), \
	315	+ AD5064_CHANNEL(7, 7, bits), \
	316	+}
	317	+
	318	+#define DECLARE_AD5065_CHANNELS(name, bits) \
	319	+const struct iio_chan_spec name[] = { \
	320	+ AD5064_CHANNEL(0, 0, bits), \
	321	+ AD5064_CHANNEL(1, 3, bits), \
317	322	}
318	323
319	324	static DECLARE_AD5064_CHANNELS(ad5024_channels, 12);
320	325	static DECLARE_AD5064_CHANNELS(ad5044_channels, 14);
321	326	static DECLARE_AD5064_CHANNELS(ad5064_channels, 16);
322	327
	328	+static DECLARE_AD5065_CHANNELS(ad5025_channels, 12);
	329	+static DECLARE_AD5065_CHANNELS(ad5045_channels, 14);
	330	+static DECLARE_AD5065_CHANNELS(ad5065_channels, 16);
	331	+
323	332	static const struct ad5064_chip_info ad5064_chip_info_tbl[] = {
324	333	[ID_AD5024] = {
325	334	.shared_vref = false,
@@ -328,7 +337,7 @@ static const struct ad5064_chip_info ad5064_chip_info_tbl[] = { · 2 unmodified lines
328	337	},
329	338	[ID_AD5025] = {
330	339	.shared_vref = false,
331		− .channels = ad5024_channels,
	340	+ .channels = ad5025_channels,
332	341	.num_channels = 2,
333	342	},
334	343	[ID_AD5044] = {
@@ -338,7 +347,7 @@ static const struct ad5064_chip_info ad5064_chip_info_tbl[] = { · 3 unmodified lines
338	347	},
339	348	[ID_AD5045] = {
340	349	.shared_vref = false,
341		− .channels = ad5044_channels,
	350	+ .channels = ad5045_channels,
342	351	.num_channels = 2,
343	352	},
344	353	[ID_AD5064] = {
@@ -353,7 +362,7 @@ static const struct ad5064_chip_info ad5064_chip_info_tbl[] = { · 8 unmodified lines
353	362	},
354	363	[ID_AD5065] = {
355	364	.shared_vref = false,
356		− .channels = ad5064_channels,
	365	+ .channels = ad5065_channels,
357	366	.num_channels = 2,
358	367	},
359	368	[ID_AD5628_1] = {
@@ -429,6 +438,7 @@ static int ad5064_probe(struct device *dev, enum ad5064_type type, · 69 unmodified lines
429	438	{
430	439	struct iio_dev *indio_dev;
431	440	struct ad5064_state *st;
	441	+ unsigned int midscale;
432	442	unsigned int i;
433	443	int ret;
434	444
@@ -465,11 +475,6 @@ static int ad5064_probe(struct device *dev, enum ad5064_type type, · 30 unmodified lines
465	475	goto error_free_reg;
466	476	}
467	477
468		− for (i = 0; i < st->chip_info->num_channels; ++i) {
469		− st->pwr_down_mode[i] = AD5064_LDAC_PWRDN_1K;
470		− st->dac_cache[i] = 0x8000;
471		− }
472		−
473	478	indio_dev->dev.parent = dev;
474	479	indio_dev->name = name;
475	480	indio_dev->info = &ad5064_info;
@@ -477,6 +482,13 @@ static int ad5064_probe(struct device *dev, enum ad5064_type type, · 1 unmodified line
477	482	indio_dev->channels = st->chip_info->channels;
478	483	indio_dev->num_channels = st->chip_info->num_channels;
479	484
	485	+ midscale = (1 << indio_dev->channels[0].scan_type.realbits) / 2;
	486	+
	487	+ for (i = 0; i < st->chip_info->num_channels; ++i) {
	488	+ st->pwr_down_mode[i] = AD5064_LDAC_PWRDN_1K;
	489	+ st->dac_cache[i] = midscale;
	490	+ }
	491	+
480	492	ret = iio_device_register(indio_dev);
481	493	if (ret)
482	494	goto error_disable_reg;

drivers/iio/imu/inv_mpu6050/Kconfig+1−0

@@ -5,6 +5,7 @@ · 4 unmodified lines
5	5	config INV_MPU6050_IIO
6	6	tristate "Invensense MPU6050 devices"
7	7	depends on I2C && SYSFS
	8	+ select IIO_BUFFER
8	9	select IIO_TRIGGERED_BUFFER
9	10	help
10	11	This driver supports the Invensense MPU6050 devices.

drivers/infiniband/hw/cxgb4/cm.c+12−0

@@ -1575,6 +1575,12 @@ static int c4iw_reconnect(struct c4iw_ep *ep) · 1574 unmodified lines
1575	1575
1576	1576	neigh = dst_neigh_lookup(ep->dst,
1577	1577	&ep->com.cm_id->remote_addr.sin_addr.s_addr);
	1578	+ if (!neigh) {
	1579	+ pr_err("%s - cannot alloc neigh.\n", __func__);
	1580	+ err = -ENOMEM;
	1581	+ goto fail4;
	1582	+ }
	1583	+
1578	1584	/* get a l2t entry */
1579	1585	if (neigh->dev->flags & IFF_LOOPBACK) {
1580	1586	PDBG("%s LOOPBACK\n", __func__);
@@ -3053,6 +3059,12 @@ static int rx_pkt(struct c4iw_dev dev, struct sk_buff skb) · 1472 unmodified lines
3053	3059	dst = &rt->dst;
3054	3060	neigh = dst_neigh_lookup_skb(dst, skb);
3055	3061
	3062	+ if (!neigh) {
	3063	+ pr_err("%s - failed to allocate neigh!\n",
	3064	+ __func__);
	3065	+ goto free_dst;
	3066	+ }
	3067	+
3056	3068	if (neigh->dev->flags & IFF_LOOPBACK) {
3057	3069	pdev = ip_dev_find(&init_net, iph->daddr);
3058	3070	e = cxgb4_l2t_get(dev->rdev.lldi.l2t, neigh,

drivers/infiniband/hw/cxgb4/qp.c+3−1

@@ -186,8 +186,10 @@ static int create_qp(struct c4iw_rdev rdev, struct t4_wq wq, · 185 unmodified lines
186	186	wq->rq.queue = dma_alloc_coherent(&(rdev->lldi.pdev->dev),
187	187	wq->rq.memsize, &(wq->rq.dma_addr),
188	188	GFP_KERNEL);
189		− if (!wq->rq.queue)
	189	+ if (!wq->rq.queue) {
	190	+ ret = -ENOMEM;
190	191	goto free_sq;
	192	+ }
191	193	PDBG("%s sq base va 0x%p pa 0x%llx rq base va 0x%p pa 0x%llx\n",
192	194	__func__, wq->sq.queue,
193	195	(unsigned long long)virt_to_phys(wq->sq.queue),

drivers/infiniband/hw/ipath/ipath_verbs.c+1−1

@@ -620,7 +620,7 @@ void ipath_ib_rcv(struct ipath_ibdev dev, void rhdr, void *data, · 619 unmodified lines
620	620	goto bail;
621	621	}
622	622
623		− opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
	623	+ opcode = (be32_to_cpu(ohdr->bth[0]) >> 24) & 0x7f;
624	624	dev->opstats[opcode].n_bytes += tlen;
625	625	dev->opstats[opcode].n_packets++;
626	626

drivers/infiniband/hw/mlx4/cm.c+0−1

@@ -362,7 +362,6 @@ void mlx4_ib_cm_paravirt_init(struct mlx4_ib_dev *dev) · 361 unmodified lines
362	362	INIT_LIST_HEAD(&dev->sriov.cm_list);
363	363	dev->sriov.sl_id_map = RB_ROOT;
364	364	idr_init(&dev->sriov.pv_id_table);
365		− idr_pre_get(&dev->sriov.pv_id_table, GFP_KERNEL);
366	365	}
367	366
368	367	/* slave = -1 ==> all slaves */

drivers/infiniband/hw/qib/Kconfig+3−3

@@ -1,7 +1,7 @@
1	1	config INFINIBAND_QIB
2		− tristate "QLogic PCIe HCA support"
	2	+ tristate "Intel PCIe HCA support"
3	3	depends on 64BIT
4	4	---help---
5		− This is a low-level driver for QLogic PCIe QLE InfiniBand host
6		− channel adapters. This driver does not support the QLogic
	5	+ This is a low-level driver for Intel PCIe QLE InfiniBand host
	6	+ channel adapters. This driver does not support the Intel
7	7	HyperTransport card (model QHT7140).

drivers/infiniband/hw/qib/qib_driver.c+3−2

@@ -1,4 +1,5 @@
1	1	/*
	2	+ * Copyright (c) 2013 Intel Corporation. All rights reserved.
2	3	* Copyright (c) 2006, 2007, 2008, 2009 QLogic Corporation. All rights reserved.
3	4	* Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
4	5	*
@@ -63,8 +64,8 @@ MODULE_PARM_DESC(compat_ddr_negotiate, · 58 unmodified lines
63	64	"Attempt pre-IBTA 1.2 DDR speed negotiation");
64	65
65	66	MODULE_LICENSE("Dual BSD/GPL");
66		−MODULE_AUTHOR("QLogic <support@qlogic.com>");
67		−MODULE_DESCRIPTION("QLogic IB driver");
	67	+MODULE_AUTHOR("Intel <ibsupport@intel.com>");
	68	+MODULE_DESCRIPTION("Intel IB driver");
68	69	MODULE_VERSION(QIB_DRIVER_VERSION);
69	70
70	71	/*

drivers/infiniband/hw/qib/qib_iba6120.c+2−1

@@ -1,4 +1,5 @@
1	1	/*
	2	+ * Copyright (c) 2013 Intel Corporation. All rights reserved.
2	3	* Copyright (c) 2006, 2007, 2008, 2009, 2010 QLogic Corporation.
3	4	* All rights reserved.
4	5	* Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
@@ -51,7 +52,7 @@ static u32 qib_6120_iblink_state(u64); · 46 unmodified lines
51	52
52	53	/*
53	54	* This file contains all the chip-specific register information and
54		− * access functions for the QLogic QLogic_IB PCI-Express chip.
	55	+ * access functions for the Intel Intel_IB PCI-Express chip.
55	56	*
56	57	*/
57	58

drivers/infiniband/hw/qib/qib_init.c+4−4

@@ -1,5 +1,5 @@
1	1	/*
2		− * Copyright (c) 2012 Intel Corporation. All rights reserved.
	2	+ * Copyright (c) 2012, 2013 Intel Corporation. All rights reserved.
3	3	* Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved.
4	4	* Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
5	5	*
@@ -1138,7 +1138,7 @@ void qib_disable_after_error(struct qib_devdata *dd) · 1132 unmodified lines
1138	1138	static void qib_remove_one(struct pci_dev *);
1139	1139	static int qib_init_one(struct pci_dev , const struct pci_device_id );
1140	1140
1141		−#define DRIVER_LOAD_MSG "QLogic " QIB_DRV_NAME " loaded: "
	1141	+#define DRIVER_LOAD_MSG "Intel " QIB_DRV_NAME " loaded: "
1142	1142	#define PFX QIB_DRV_NAME ": "
1143	1143
1144	1144	static DEFINE_PCI_DEVICE_TABLE(qib_pci_tbl) = {
@@ -1355,7 +1355,7 @@ static int qib_init_one(struct pci_dev pdev, const struct pci_device_id ent) · 210 unmodified lines
1355	1355	dd = qib_init_iba6120_funcs(pdev, ent);
1356	1356	#else
1357	1357	qib_early_err(&pdev->dev,
1358		− "QLogic PCIE device 0x%x cannot work if CONFIG_PCI_MSI is not enabled\n",
	1358	+ "Intel PCIE device 0x%x cannot work if CONFIG_PCI_MSI is not enabled\n",
1359	1359	ent->device);
1360	1360	dd = ERR_PTR(-ENODEV);
1361	1361	#endif
@@ -1371,7 +1371,7 @@ static int qib_init_one(struct pci_dev pdev, const struct pci_device_id ent) · 9 unmodified lines
1371	1371
1372	1372	default:
1373	1373	qib_early_err(&pdev->dev,
1374		− "Failing on unknown QLogic deviceid 0x%x\n",
	1374	+ "Failing on unknown Intel deviceid 0x%x\n",
1375	1375	ent->device);
1376	1376	ret = -ENODEV;
1377	1377	}

drivers/infiniband/hw/qib/qib_sd7220.c+1−1

@@ -1,5 +1,5 @@
1	1	/*
2		− * Copyright (c) 2012 Intel Corporation. All rights reserved.
	2	+ * Copyright (c) 2013 Intel Corporation. All rights reserved.
3	3	* Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved.
4	4	* Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
5	5	*

drivers/infiniband/hw/qib/qib_verbs.c+2−2

@@ -1,5 +1,5 @@
1	1	/*
2		− * Copyright (c) 2012 Intel Corporation. All rights reserved.
	2	+ * Copyright (c) 2012, 2013 Intel Corporation. All rights reserved.
3	3	* Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved.
4	4	* Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
5	5	*
@@ -2224,7 +2224,7 @@ int qib_register_ib_device(struct qib_devdata *dd) · 2218 unmodified lines
2224	2224	ibdev->dma_ops = &qib_dma_mapping_ops;
2225	2225
2226	2226	snprintf(ibdev->node_desc, sizeof(ibdev->node_desc),
2227		− "QLogic Infiniband HCA %s", init_utsname()->nodename);
	2227	+ "Intel Infiniband HCA %s", init_utsname()->nodename);
2228	2228
2229	2229	ret = ib_register_device(ibdev, qib_create_port_files);
2230	2230	if (ret)

drivers/infiniband/ulp/ipoib/ipoib_cm.c+6−2

@@ -758,9 +758,13 @@ void ipoib_cm_send(struct net_device dev, struct sk_buff skb, struct ipoib_cm_ · 757 unmodified lines
758	758	if (++priv->tx_outstanding == ipoib_sendq_size) {
759	759	ipoib_dbg(priv, "TX ring 0x%x full, stopping kernel net queue\n",
760	760	tx->qp->qp_num);
761		− if (ib_req_notify_cq(priv->send_cq, IB_CQ_NEXT_COMP))
762		− ipoib_warn(priv, "request notify on send CQ failed\n");
763	761	netif_stop_queue(dev);
	762	+ rc = ib_req_notify_cq(priv->send_cq,
	763	+ IB_CQ_NEXT_COMP \| IB_CQ_REPORT_MISSED_EVENTS);
	764	+ if (rc < 0)
	765	+ ipoib_warn(priv, "request notify on send CQ failed\n");
	766	+ else if (rc)
	767	+ ipoib_send_comp_handler(priv->send_cq, dev);
764	768	}
765	769	}
766	770	}

drivers/input/joystick/analog.c+2−6

@@ -158,14 +158,10 @@ static unsigned int get_time_pit(void) · 157 unmodified lines
158	158	#define GET_TIME(x) rdtscl(x)
159	159	#define DELTA(x,y) ((y)-(x))
160	160	#define TIME_NAME "TSC"
161		−#elif defined(__alpha__)
	161	+#elif defined(__alpha__) \|\| defined(CONFIG_MN10300) \|\| defined(CONFIG_ARM) \|\| defined(CONFIG_TILE)
162	162	#define GET_TIME(x) do { x = get_cycles(); } while (0)
163	163	#define DELTA(x,y) ((y)-(x))
164		−#define TIME_NAME "PCC"
165		−#elif defined(CONFIG_MN10300) \|\| defined(CONFIG_TILE)
166		−#define GET_TIME(x) do { x = get_cycles(); } while (0)
167		−#define DELTA(x, y) ((x) - (y))
168		−#define TIME_NAME "TSC"
	164	+#define TIME_NAME "get_cycles"
169	165	#else
170	166	#define FAKE_TIME
171	167	static unsigned long analog_faketime = 0;

drivers/input/tablet/wacom_wac.c+4−4

@@ -359,7 +359,7 @@ static int wacom_intuos_inout(struct wacom_wac *wacom) · 358 unmodified lines
359	359	case 0x802: /* Intuos4 General Pen */
360	360	case 0x804: /* Intuos4 Marker Pen */
361	361	case 0x40802: /* Intuos4 Classic Pen */
362		− case 0x18803: /* DTH2242 Grip Pen */
	362	+ case 0x18802: /* DTH2242 Grip Pen */
363	363	case 0x022:
364	364	wacom->tool[idx] = BTN_TOOL_PEN;
365	365	break;
@@ -1912,7 +1912,7 @@ static const struct wacom_features wacom_features_0xBB = · 1546 unmodified lines
1912	1912	{ "Wacom Intuos4 12x19", WACOM_PKGLEN_INTUOS, 97536, 60960, 2047,
1913	1913	63, INTUOS4L, WACOM_INTUOS3_RES, WACOM_INTUOS3_RES };
1914	1914	static const struct wacom_features wacom_features_0xBC =
1915		− { "Wacom Intuos4 WL", WACOM_PKGLEN_INTUOS, 40840, 25400, 2047,
	1915	+ { "Wacom Intuos4 WL", WACOM_PKGLEN_INTUOS, 40640, 25400, 2047,
1916	1916	63, INTUOS4, WACOM_INTUOS3_RES, WACOM_INTUOS3_RES };
1917	1917	static const struct wacom_features wacom_features_0x26 =
1918	1918	{ "Wacom Intuos5 touch S", WACOM_PKGLEN_INTUOS, 31496, 19685, 2047,
@@ -2144,7 +2144,7 @@ const struct usb_device_id wacom_ids[] = { · 225 unmodified lines
2144	2144	{ USB_DEVICE_WACOM(0x44) },
2145	2145	{ USB_DEVICE_WACOM(0x45) },
2146	2146	{ USB_DEVICE_WACOM(0x59) },
2147		− { USB_DEVICE_WACOM(0x5D) },
	2147	+ { USB_DEVICE_DETAILED(0x5D, USB_CLASS_HID, 0, 0) },
2148	2148	{ USB_DEVICE_WACOM(0xB0) },
2149	2149	{ USB_DEVICE_WACOM(0xB1) },
2150	2150	{ USB_DEVICE_WACOM(0xB2) },
@@ -2209,7 +2209,7 @@ const struct usb_device_id wacom_ids[] = { · 58 unmodified lines
2209	2209	{ USB_DEVICE_WACOM(0x47) },
2210	2210	{ USB_DEVICE_WACOM(0xF4) },
2211	2211	{ USB_DEVICE_WACOM(0xF8) },
2212		− { USB_DEVICE_WACOM(0xF6) },
	2212	+ { USB_DEVICE_DETAILED(0xF6, USB_CLASS_HID, 0, 0) },
2213	2213	{ USB_DEVICE_WACOM(0xFA) },
2214	2214	{ USB_DEVICE_LENOVO(0x6004) },
2215	2215	{ }

drivers/iommu/Kconfig+1−1

@@ -130,7 +130,7 @@ config IRQ_REMAP · 129 unmodified lines
130	130	# OMAP IOMMU support
131	131	config OMAP_IOMMU
132	132	bool "OMAP IOMMU Support"
133		− depends on ARCH_OMAP
	133	+ depends on ARCH_OMAP2PLUS
134	134	select IOMMU_API
135	135
136	136	config OMAP_IOVMM

drivers/iommu/amd_iommu.c+10−12

@@ -2466,18 +2466,16 @@ static int device_change_notifier(struct notifier_block *nb, · 2465 unmodified lines
2466	2466
2467	2467	/* allocate a protection domain if a device is added */
2468	2468	dma_domain = find_protection_domain(devid);
2469		− if (dma_domain)
2470		− goto out;
2471		− dma_domain = dma_ops_domain_alloc();
2472		− if (!dma_domain)
2473		− goto out;
2474		− dma_domain->target_dev = devid;
2475		−
2476		− spin_lock_irqsave(&iommu_pd_list_lock, flags);
2477		− list_add_tail(&dma_domain->list, &iommu_pd_list);
2478		− spin_unlock_irqrestore(&iommu_pd_list_lock, flags);
2479		−
2480		− dev_data = get_dev_data(dev);
	2469	+ if (!dma_domain) {
	2470	+ dma_domain = dma_ops_domain_alloc();
	2471	+ if (!dma_domain)
	2472	+ goto out;
	2473	+ dma_domain->target_dev = devid;
	2474	+
	2475	+ spin_lock_irqsave(&iommu_pd_list_lock, flags);
	2476	+ list_add_tail(&dma_domain->list, &iommu_pd_list);
	2477	+ spin_unlock_irqrestore(&iommu_pd_list_lock, flags);
	2478	+ }
2481	2479
2482	2480	dev->archdata.dma_ops = &amd_iommu_dma_ops;
2483	2481

drivers/iommu/amd_iommu_init.c+1−1

@@ -980,7 +980,7 @@ static void __init free_iommu_all(void) · 979 unmodified lines
980	980	* BIOS should disable L2B micellaneous clock gating by setting
981	981	* L2_L2B_CK_GATE_CONTROL[CKGateL2BMiscDisable](D0F2xF4_x90[2]) = 1b
982	982	*/
983		−static void __init amd_iommu_erratum_746_workaround(struct amd_iommu *iommu)
	983	+static void amd_iommu_erratum_746_workaround(struct amd_iommu *iommu)
984	984	{
985	985	u32 value;
986	986

drivers/iommu/irq_remapping.c+0−1

@@ -2,7 +2,6 @@ · 1 unmodified line
2	2	#include <linux/cpumask.h>
3	3	#include <linux/kernel.h>
4	4	#include <linux/string.h>
5		−#include <linux/cpumask.h>
6	5	#include <linux/errno.h>
7	6	#include <linux/msi.h>
8	7	#include <linux/irq.h>

drivers/irqchip/irq-gic.c+3−2

@@ -236,7 +236,8 @@ static int gic_retrigger(struct irq_data *d) · 235 unmodified lines
236	236	if (gic_arch_extn.irq_retrigger)
237	237	return gic_arch_extn.irq_retrigger(d);
238	238
239		− return -ENXIO;
	239	+ /* the genirq layer expects 0 if we can't retrigger in hardware */
	240	+ return 0;
240	241	}
241	242
242	243	#ifdef CONFIG_SMP
@@ -648,7 +649,7 @@ void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) · 405 unmodified lines
648	649
649	650	/* Convert our logical CPU mask into a physical one. */
650	651	for_each_cpu(cpu, mask)
651		− map \|= 1 << cpu_logical_map(cpu);
	652	+ map \|= gic_cpu_map[cpu];
652	653
653	654	/*
654	655	* Ensure that stores to Normal memory are visible to the

drivers/isdn/hisax/Kconfig+4−2

@@ -237,7 +237,8 @@ config HISAX_MIC · 236 unmodified lines
237	237
238	238	config HISAX_NETJET
239	239	bool "NETjet card"
240		− depends on PCI && (BROKEN \|\| !(SPARC \|\| PPC \|\| PARISC \|\| M68K \|\| (MIPS && !CPU_LITTLE_ENDIAN) \|\| FRV \|\| (XTENSA && !CPU_LITTLE_ENDIAN)))
	240	+ depends on PCI && (BROKEN \|\| !(PPC \|\| PARISC \|\| M68K \|\| (MIPS && !CPU_LITTLE_ENDIAN) \|\| FRV \|\| (XTENSA && !CPU_LITTLE_ENDIAN)))
	241	+ depends on VIRT_TO_BUS
241	242	help
242	243	This enables HiSax support for the NetJet from Traverse
243	244	Technologies.
@@ -248,7 +249,8 @@ config HISAX_NETJET · 4 unmodified lines
248	249
249	250	config HISAX_NETJET_U
250	251	bool "NETspider U card"
251		− depends on PCI && (BROKEN \|\| !(SPARC \|\| PPC \|\| PARISC \|\| M68K \|\| (MIPS && !CPU_LITTLE_ENDIAN) \|\| FRV \|\| (XTENSA && !CPU_LITTLE_ENDIAN)))
	252	+ depends on PCI && (BROKEN \|\| !(PPC \|\| PARISC \|\| M68K \|\| (MIPS && !CPU_LITTLE_ENDIAN) \|\| FRV \|\| (XTENSA && !CPU_LITTLE_ENDIAN)))
	253	+ depends on VIRT_TO_BUS
252	254	help
253	255	This enables HiSax support for the Netspider U interface ISDN card
254	256	from Traverse Technologies.

drivers/md/dm-bufio.c+2−0

@@ -1025,6 +1025,8 @@ void dm_bufio_prefetch(struct dm_bufio_client *c, · 1024 unmodified lines
1025	1025	{
1026	1026	struct blk_plug plug;
1027	1027
	1028	+ BUG_ON(dm_bufio_in_request());
	1029	+
1028	1030	blk_start_plug(&plug);
1029	1031	dm_bufio_lock(c);
1030	1032

drivers/md/dm-cache-metadata.c+51−13

@@ -83,6 +83,8 @@ struct cache_disk_superblock { · 82 unmodified lines
83	83	__le32 read_misses;
84	84	__le32 write_hits;
85	85	__le32 write_misses;
	86	+
	87	+ __le32 policy_version[CACHE_POLICY_VERSION_SIZE];
86	88	} __packed;
87	89
88	90	struct dm_cache_metadata {
@@ -109,6 +111,7 @@ struct dm_cache_metadata { · 20 unmodified lines
109	111	bool clean_when_opened:1;
110	112
111	113	char policy_name[CACHE_POLICY_NAME_SIZE];
	114	+ unsigned policy_version[CACHE_POLICY_VERSION_SIZE];
112	115	size_t policy_hint_size;
113	116	struct dm_cache_statistics stats;
114	117	};
@@ -268,7 +271,8 @@ static int __write_initial_superblock(struct dm_cache_metadata *cmd) · 153 unmodified lines
268	271	memset(disk_super->uuid, 0, sizeof(disk_super->uuid));
269	272	disk_super->magic = cpu_to_le64(CACHE_SUPERBLOCK_MAGIC);
270	273	disk_super->version = cpu_to_le32(CACHE_VERSION);
271		− memset(disk_super->policy_name, 0, CACHE_POLICY_NAME_SIZE);
	274	+ memset(disk_super->policy_name, 0, sizeof(disk_super->policy_name));
	275	+ memset(disk_super->policy_version, 0, sizeof(disk_super->policy_version));
272	276	disk_super->policy_hint_size = 0;
273	277
274	278	r = dm_sm_copy_root(cmd->metadata_sm, &disk_super->metadata_space_map_root,
@@ -284,7 +288,6 @@ static int __write_initial_superblock(struct dm_cache_metadata *cmd) · 9 unmodified lines
284	288	disk_super->metadata_block_size = cpu_to_le32(DM_CACHE_METADATA_BLOCK_SIZE >> SECTOR_SHIFT);
285	289	disk_super->data_block_size = cpu_to_le32(cmd->data_block_size);
286	290	disk_super->cache_blocks = cpu_to_le32(0);
287		− memset(disk_super->policy_name, 0, sizeof(disk_super->policy_name));
288	291
289	292	disk_super->read_hits = cpu_to_le32(0);
290	293	disk_super->read_misses = cpu_to_le32(0);
@@ -478,6 +481,9 @@ static void read_superblock_fields(struct dm_cache_metadata *cmd, · 187 unmodified lines
478	481	cmd->data_block_size = le32_to_cpu(disk_super->data_block_size);
479	482	cmd->cache_blocks = to_cblock(le32_to_cpu(disk_super->cache_blocks));
480	483	strncpy(cmd->policy_name, disk_super->policy_name, sizeof(cmd->policy_name));
	484	+ cmd->policy_version[0] = le32_to_cpu(disk_super->policy_version[0]);
	485	+ cmd->policy_version[1] = le32_to_cpu(disk_super->policy_version[1]);
	486	+ cmd->policy_version[2] = le32_to_cpu(disk_super->policy_version[2]);
481	487	cmd->policy_hint_size = le32_to_cpu(disk_super->policy_hint_size);
482	488
483	489	cmd->stats.read_hits = le32_to_cpu(disk_super->read_hits);
@@ -572,6 +578,9 @@ static int __commit_transaction(struct dm_cache_metadata *cmd, · 88 unmodified lines
572	578	disk_super->discard_nr_blocks = cpu_to_le64(from_dblock(cmd->discard_nr_blocks));
573	579	disk_super->cache_blocks = cpu_to_le32(from_cblock(cmd->cache_blocks));
574	580	strncpy(disk_super->policy_name, cmd->policy_name, sizeof(disk_super->policy_name));
	581	+ disk_super->policy_version[0] = cpu_to_le32(cmd->policy_version[0]);
	582	+ disk_super->policy_version[1] = cpu_to_le32(cmd->policy_version[1]);
	583	+ disk_super->policy_version[2] = cpu_to_le32(cmd->policy_version[2]);
575	584
576	585	disk_super->read_hits = cpu_to_le32(cmd->stats.read_hits);
577	586	disk_super->read_misses = cpu_to_le32(cmd->stats.read_misses);
@@ -854,18 +863,43 @@ struct thunk { · 276 unmodified lines
854	863	bool hints_valid;
855	864	};
856	865
	866	+static bool policy_unchanged(struct dm_cache_metadata *cmd,
	867	+ struct dm_cache_policy *policy)
	868	+{
	869	+ const char *policy_name = dm_cache_policy_get_name(policy);
	870	+ const unsigned *policy_version = dm_cache_policy_get_version(policy);
	871	+ size_t policy_hint_size = dm_cache_policy_get_hint_size(policy);
	872	+
	873	+ /*
	874	+ * Ensure policy names match.
	875	+ */
	876	+ if (strncmp(cmd->policy_name, policy_name, sizeof(cmd->policy_name)))
	877	+ return false;
	878	+
	879	+ /*
	880	+ * Ensure policy major versions match.
	881	+ */
	882	+ if (cmd->policy_version[0] != policy_version[0])
	883	+ return false;
	884	+
	885	+ /*
	886	+ * Ensure policy hint sizes match.
	887	+ */
	888	+ if (cmd->policy_hint_size != policy_hint_size)
	889	+ return false;
	890	+
	891	+ return true;
	892	+}
	893	+
857	894	static bool hints_array_initialized(struct dm_cache_metadata *cmd)
858	895	{
859	896	return cmd->hint_root && cmd->policy_hint_size;
860	897	}
861	898
862	899	static bool hints_array_available(struct dm_cache_metadata *cmd,
863		− const char *policy_name)
	900	+ struct dm_cache_policy *policy)
864	901	{
865		− bool policy_names_match = !strncmp(cmd->policy_name, policy_name,
866		− sizeof(cmd->policy_name));
867		−
868		− return cmd->clean_when_opened && policy_names_match &&
	902	+ return cmd->clean_when_opened && policy_unchanged(cmd, policy) &&
869	903	hints_array_initialized(cmd);
870	904	}
871	905
@@ -899,7 +933,8 @@ static int __load_mapping(void context, uint64_t cblock, void leaf) · 27 unmodified lines
899	933	return r;
900	934	}
901	935
902		−static int __load_mappings(struct dm_cache_metadata cmd, const char policy_name,
	936	+static int __load_mappings(struct dm_cache_metadata *cmd,
	937	+ struct dm_cache_policy *policy,
903	938	load_mapping_fn fn, void *context)
904	939	{
905	940	struct thunk thunk;
@@ -909,18 +944,19 @@ static int __load_mappings(struct dm_cache_metadata cmd, const char policy_nam · 3 unmodified lines
909	944
910	945	thunk.cmd = cmd;
911	946	thunk.respect_dirty_flags = cmd->clean_when_opened;
912		− thunk.hints_valid = hints_array_available(cmd, policy_name);
	947	+ thunk.hints_valid = hints_array_available(cmd, policy);
913	948
914	949	return dm_array_walk(&cmd->info, cmd->root, __load_mapping, &thunk);
915	950	}
916	951
917		−int dm_cache_load_mappings(struct dm_cache_metadata cmd, const char policy_name,
	952	+int dm_cache_load_mappings(struct dm_cache_metadata *cmd,
	953	+ struct dm_cache_policy *policy,
918	954	load_mapping_fn fn, void *context)
919	955	{
920	956	int r;
921	957
922	958	down_read(&cmd->root_lock);
923		− r = __load_mappings(cmd, policy_name, fn, context);
	959	+ r = __load_mappings(cmd, policy, fn, context);
924	960	up_read(&cmd->root_lock);
925	961
926	962	return r;
@@ -979,7 +1015,7 @@ static int __dirty(struct dm_cache_metadata *cmd, dm_cblock_t cblock, bool dirty · 52 unmodified lines
979	1015	/* nothing to be done */
980	1016	return 0;
981	1017
982		− value = pack_value(oblock, flags \| (dirty ? M_DIRTY : 0));
	1018	+ value = pack_value(oblock, (flags & ~M_DIRTY) \| (dirty ? M_DIRTY : 0));
983	1019	__dm_bless_for_disk(&value);
984	1020
985	1021	r = dm_array_set_value(&cmd->info, cmd->root, from_cblock(cblock),
@@ -1070,13 +1106,15 @@ static int begin_hints(struct dm_cache_metadata cmd, struct dm_cache_policy po · 84 unmodified lines
1070	1106	__le32 value;
1071	1107	size_t hint_size;
1072	1108	const char *policy_name = dm_cache_policy_get_name(policy);
	1109	+ const unsigned *policy_version = dm_cache_policy_get_version(policy);
1073	1110
1074	1111	if (!policy_name[0] \|\|
1075	1112	(strlen(policy_name) > sizeof(cmd->policy_name) - 1))
1076	1113	return -EINVAL;
1077	1114
1078		− if (strcmp(cmd->policy_name, policy_name)) {
	1115	+ if (!policy_unchanged(cmd, policy)) {
1079	1116	strncpy(cmd->policy_name, policy_name, sizeof(cmd->policy_name));
	1117	+ memcpy(cmd->policy_version, policy_version, sizeof(cmd->policy_version));
1080	1118
1081	1119	hint_size = dm_cache_policy_get_hint_size(policy);
1082	1120	if (!hint_size)

drivers/md/dm-cache-metadata.h+1−1

@@ -89,7 +89,7 @@ typedef int (load_mapping_fn)(void context, dm_oblock_t oblock, · 88 unmodified lines
89	89	dm_cblock_t cblock, bool dirty,
90	90	uint32_t hint, bool hint_valid);
91	91	int dm_cache_load_mappings(struct dm_cache_metadata *cmd,
92		− const char *policy_name,
	92	+ struct dm_cache_policy *policy,
93	93	load_mapping_fn fn,
94	94	void *context);
95	95

drivers/md/dm-cache-policy-cleaner.c+5−2

@@ -17,7 +17,6 @@ · 16 unmodified lines
17	17	/----------------------------------------------------------------/
18	18
19	19	#define DM_MSG_PREFIX "cache cleaner"
20		−#define CLEANER_VERSION "1.0.0"
21	20
22	21	/* Cache entry struct. */
23	22	struct wb_cache_entry {
@@ -434,6 +433,7 @@ static struct dm_cache_policy *wb_create(dm_cblock_t cache_size, · 410 unmodified lines
434	433
435	434	static struct dm_cache_policy_type wb_policy_type = {
436	435	.name = "cleaner",
	436	+ .version = {1, 0, 0},
437	437	.hint_size = 0,
438	438	.owner = THIS_MODULE,
439	439	.create = wb_create
@@ -446,7 +446,10 @@ static int __init wb_init(void) · 6 unmodified lines
446	446	if (r < 0)
447	447	DMERR("register failed %d", r);
448	448	else
449		− DMINFO("version " CLEANER_VERSION " loaded");
	449	+ DMINFO("version %u.%u.%u loaded",
	450	+ wb_policy_type.version[0],
	451	+ wb_policy_type.version[1],
	452	+ wb_policy_type.version[2]);
450	453
451	454	return r;
452	455	}

drivers/md/dm-cache-policy-internal.h+2−0

@@ -117,6 +117,8 @@ void dm_cache_policy_destroy(struct dm_cache_policy *p); · 116 unmodified lines
117	117	*/
118	118	const char dm_cache_policy_get_name(struct dm_cache_policy p);
119	119
	120	+const unsigned dm_cache_policy_get_version(struct dm_cache_policy p);
	121	+
120	122	size_t dm_cache_policy_get_hint_size(struct dm_cache_policy *p);
121	123
122	124	/----------------------------------------------------------------/

drivers/md/dm-cache-policy-mq.c+6−2

@@ -14,7 +14,6 @@ · 13 unmodified lines
14	14	#include <linux/vmalloc.h>
15	15
16	16	#define DM_MSG_PREFIX "cache-policy-mq"
17		−#define MQ_VERSION "1.0.0"
18	17
19	18	static struct kmem_cache *mq_entry_cache;
20	19
@@ -1133,6 +1132,7 @@ bad_cache_alloc: · 1112 unmodified lines
1133	1132
1134	1133	static struct dm_cache_policy_type mq_policy_type = {
1135	1134	.name = "mq",
	1135	+ .version = {1, 0, 0},
1136	1136	.hint_size = 4,
1137	1137	.owner = THIS_MODULE,
1138	1138	.create = mq_create
@@ -1140,6 +1140,7 @@ static struct dm_cache_policy_type mq_policy_type = { · 1 unmodified line
1140	1140
1141	1141	static struct dm_cache_policy_type default_policy_type = {
1142	1142	.name = "default",
	1143	+ .version = {1, 0, 0},
1143	1144	.hint_size = 4,
1144	1145	.owner = THIS_MODULE,
1145	1146	.create = mq_create
@@ -1164,7 +1165,10 @@ static int __init mq_init(void) · 18 unmodified lines
1164	1165
1165	1166	r = dm_cache_policy_register(&default_policy_type);
1166	1167	if (!r) {
1167		− DMINFO("version " MQ_VERSION " loaded");
	1168	+ DMINFO("version %u.%u.%u loaded",
	1169	+ mq_policy_type.version[0],
	1170	+ mq_policy_type.version[1],
	1171	+ mq_policy_type.version[2]);
1168	1172	return 0;
1169	1173	}
1170	1174

drivers/md/dm-cache-policy.c+8−0

@@ -150,6 +150,14 @@ const char dm_cache_policy_get_name(struct dm_cache_policy p) · 149 unmodified lines
150	150	}
151	151	EXPORT_SYMBOL_GPL(dm_cache_policy_get_name);
152	152
	153	+const unsigned dm_cache_policy_get_version(struct dm_cache_policy p)
	154	+{
	155	+ struct dm_cache_policy_type *t = p->private;
	156	+
	157	+ return t->version;
	158	+}
	159	+EXPORT_SYMBOL_GPL(dm_cache_policy_get_version);
	160	+
153	161	size_t dm_cache_policy_get_hint_size(struct dm_cache_policy *p)
154	162	{
155	163	struct dm_cache_policy_type *t = p->private;

drivers/md/dm-cache-policy.h+2−0

@@ -196,6 +196,7 @@ struct dm_cache_policy { · 195 unmodified lines
196	196	* We maintain a little register of the different policy types.
197	197	*/
198	198	#define CACHE_POLICY_NAME_SIZE 16
	199	+#define CACHE_POLICY_VERSION_SIZE 3
199	200
200	201	struct dm_cache_policy_type {
201	202	/* For use by the register code only. */
@@ -206,6 +207,7 @@ struct dm_cache_policy_type { · 4 unmodified lines
206	207	* what gets passed on the target line to select your policy.
207	208	*/
208	209	char name[CACHE_POLICY_NAME_SIZE];
	210	+ unsigned version[CACHE_POLICY_VERSION_SIZE];
209	211
210	212	/*
211	213	* Policies may store a hint for each each cache block.

drivers/md/dm-cache-target.c+144−70

@@ -6,6 +6,7 @@ · 5 unmodified lines
6	6
7	7	#include "dm.h"
8	8	#include "dm-bio-prison.h"
	9	+#include "dm-bio-record.h"
9	10	#include "dm-cache-metadata.h"
10	11
11	12	#include <linux/dm-io.h>
@@ -142,6 +143,7 @@ struct cache { · 130 unmodified lines
142	143	spinlock_t lock;
143	144	struct bio_list deferred_bios;
144	145	struct bio_list deferred_flush_bios;
	146	+ struct bio_list deferred_writethrough_bios;
145	147	struct list_head quiesced_migrations;
146	148	struct list_head completed_migrations;
147	149	struct list_head need_commit_migrations;
@@ -158,7 +160,7 @@ struct cache { · 10 unmodified lines
158	160	/*
159	161	* origin_blocks entries, discarded if set.
160	162	*/
161		− sector_t discard_block_size; /* a power of 2 times sectors per block */
	163	+ uint32_t discard_block_size; /* a power of 2 times sectors per block */
162	164	dm_dblock_t discard_nr_blocks;
163	165	unsigned long *discard_bitset;
164	166
@@ -199,6 +201,16 @@ struct per_bio_data { · 34 unmodified lines
199	201	bool tick:1;
200	202	unsigned req_nr:2;
201	203	struct dm_deferred_entry *all_io_entry;
	204	+
	205	+ /*
	206	+ * writethrough fields. These MUST remain at the end of this
	207	+ * structure and the 'cache' member must be the first as it
	208	+ * is used to determine the offsetof the writethrough fields.
	209	+ */
	210	+ struct cache *cache;
	211	+ dm_cblock_t cblock;
	212	+ bio_end_io_t *saved_bi_end_io;
	213	+ struct dm_bio_details bio_details;
202	214	};
203	215
204	216	struct dm_cache_migration {
@@ -412,17 +424,24 @@ static bool block_size_is_power_of_two(struct cache *cache) · 207 unmodified lines
412	424	return cache->sectors_per_block_shift >= 0;
413	425	}
414	426
	427	+static dm_block_t block_div(dm_block_t b, uint32_t n)
	428	+{
	429	+ do_div(b, n);
	430	+
	431	+ return b;
	432	+}
	433	+
415	434	static dm_dblock_t oblock_to_dblock(struct cache *cache, dm_oblock_t oblock)
416	435	{
417		− sector_t discard_blocks = cache->discard_block_size;
	436	+ uint32_t discard_blocks = cache->discard_block_size;
418	437	dm_block_t b = from_oblock(oblock);
419	438
420	439	if (!block_size_is_power_of_two(cache))
421		− (void) sector_div(discard_blocks, cache->sectors_per_block);
	440	+ discard_blocks = discard_blocks / cache->sectors_per_block;
422	441	else
423	442	discard_blocks >>= cache->sectors_per_block_shift;
424	443
425		− (void) sector_div(b, discard_blocks);
	444	+ b = block_div(b, discard_blocks);
426	445
427	446	return to_dblock(b);
428	447	}
@@ -500,16 +519,28 @@ static void save_stats(struct cache *cache) · 71 unmodified lines
500	519	/*----------------------------------------------------------------
501	520	* Per bio data
502	521	--------------------------------------------------------------/
503		−static struct per_bio_data get_per_bio_data(struct bio bio)
	522	+
	523	+/*
	524	+ * If using writeback, leave out struct per_bio_data's writethrough fields.
	525	+ */
	526	+#define PB_DATA_SIZE_WB (offsetof(struct per_bio_data, cache))
	527	+#define PB_DATA_SIZE_WT (sizeof(struct per_bio_data))
	528	+
	529	+static size_t get_per_bio_data_size(struct cache *cache)
504	530	{
505		− struct per_bio_data *pb = dm_per_bio_data(bio, sizeof(struct per_bio_data));
	531	+ return cache->features.write_through ? PB_DATA_SIZE_WT : PB_DATA_SIZE_WB;
	532	+}
	533	+
	534	+static struct per_bio_data get_per_bio_data(struct bio bio, size_t data_size)
	535	+{
	536	+ struct per_bio_data *pb = dm_per_bio_data(bio, data_size);
506	537	BUG_ON(!pb);
507	538	return pb;
508	539	}
509	540
510		−static struct per_bio_data init_per_bio_data(struct bio bio)
	541	+static struct per_bio_data init_per_bio_data(struct bio bio, size_t data_size)
511	542	{
512		− struct per_bio_data *pb = get_per_bio_data(bio);
	543	+ struct per_bio_data *pb = get_per_bio_data(bio, data_size);
513	544
514	545	pb->tick = false;
515	546	pb->req_nr = dm_bio_get_target_bio_nr(bio);
@@ -543,7 +574,8 @@ static void remap_to_cache(struct cache cache, struct bio bio, · 27 unmodified lines
543	574	static void check_if_tick_bio_needed(struct cache cache, struct bio bio)
544	575	{
545	576	unsigned long flags;
546		− struct per_bio_data *pb = get_per_bio_data(bio);
	577	+ size_t pb_data_size = get_per_bio_data_size(cache);
	578	+ struct per_bio_data *pb = get_per_bio_data(bio, pb_data_size);
547	579
548	580	spin_lock_irqsave(&cache->lock, flags);
549	581	if (cache->need_tick_bio &&
@@ -609,6 +641,58 @@ static void issue(struct cache cache, struct bio bio) · 59 unmodified lines
609	641	spin_unlock_irqrestore(&cache->lock, flags);
610	642	}
611	643
	644	+static void defer_writethrough_bio(struct cache cache, struct bio bio)
	645	+{
	646	+ unsigned long flags;
	647	+
	648	+ spin_lock_irqsave(&cache->lock, flags);
	649	+ bio_list_add(&cache->deferred_writethrough_bios, bio);
	650	+ spin_unlock_irqrestore(&cache->lock, flags);
	651	+
	652	+ wake_worker(cache);
	653	+}
	654	+
	655	+static void writethrough_endio(struct bio *bio, int err)
	656	+{
	657	+ struct per_bio_data *pb = get_per_bio_data(bio, PB_DATA_SIZE_WT);
	658	+ bio->bi_end_io = pb->saved_bi_end_io;
	659	+
	660	+ if (err) {
	661	+ bio_endio(bio, err);
	662	+ return;
	663	+ }
	664	+
	665	+ dm_bio_restore(&pb->bio_details, bio);
	666	+ remap_to_cache(pb->cache, bio, pb->cblock);
	667	+
	668	+ /*
	669	+ * We can't issue this bio directly, since we're in interrupt
	670	+ * context. So it get's put on a bio list for processing by the
	671	+ * worker thread.
	672	+ */
	673	+ defer_writethrough_bio(pb->cache, bio);
	674	+}
	675	+
	676	+/*
	677	+ * When running in writethrough mode we need to send writes to clean blocks
	678	+ * to both the cache and origin devices. In future we'd like to clone the
	679	+ * bio and send them in parallel, but for now we're doing them in
	680	+ * series as this is easier.
	681	+ */
	682	+static void remap_to_origin_then_cache(struct cache cache, struct bio bio,
	683	+ dm_oblock_t oblock, dm_cblock_t cblock)
	684	+{
	685	+ struct per_bio_data *pb = get_per_bio_data(bio, PB_DATA_SIZE_WT);
	686	+
	687	+ pb->cache = cache;
	688	+ pb->cblock = cblock;
	689	+ pb->saved_bi_end_io = bio->bi_end_io;
	690	+ dm_bio_record(&pb->bio_details, bio);
	691	+ bio->bi_end_io = writethrough_endio;
	692	+
	693	+ remap_to_origin_clear_discard(pb->cache, bio, oblock);
	694	+}
	695	+
612	696	/*----------------------------------------------------------------
613	697	* Migration processing
614	698	*
@@ -972,7 +1056,8 @@ static void defer_bio(struct cache cache, struct bio bio) · 357 unmodified lines
972	1056
973	1057	static void process_flush_bio(struct cache cache, struct bio bio)
974	1058	{
975		− struct per_bio_data *pb = get_per_bio_data(bio);
	1059	+ size_t pb_data_size = get_per_bio_data_size(cache);
	1060	+ struct per_bio_data *pb = get_per_bio_data(bio, pb_data_size);
976	1061
977	1062	BUG_ON(bio->bi_size);
978	1063	if (!pb->req_nr)
@@ -1002,7 +1087,7 @@ static void process_discard_bio(struct cache cache, struct bio bio) · 23 unmodified lines
1002	1087	dm_block_t end_block = bio->bi_sector + bio_sectors(bio);
1003	1088	dm_block_t b;
1004	1089
1005		− (void) sector_div(end_block, cache->discard_block_size);
	1090	+ end_block = block_div(end_block, cache->discard_block_size);
1006	1091
1007	1092	for (b = start_block; b < end_block; b++)
1008	1093	set_discard(cache, to_dblock(b));
@@ -1044,7 +1129,8 @@ static void process_bio(struct cache cache, struct prealloc structs, · 35 unmodified lines
1044	1129	dm_oblock_t block = get_bio_block(cache, bio);
1045	1130	struct dm_bio_prison_cell cell_prealloc, old_ocell, *new_ocell;
1046	1131	struct policy_result lookup_result;
1047		− struct per_bio_data *pb = get_per_bio_data(bio);
	1132	+ size_t pb_data_size = get_per_bio_data_size(cache);
	1133	+ struct per_bio_data *pb = get_per_bio_data(bio, pb_data_size);
1048	1134	bool discarded_block = is_discarded_oblock(cache, block);
1049	1135	bool can_migrate = discarded_block \|\| spare_migration_bandwidth(cache);
1050	1136
@@ -1070,14 +1156,9 @@ static void process_bio(struct cache cache, struct prealloc structs, · 19 unmodified lines
1070	1156	inc_hit_counter(cache, bio);
1071	1157	pb->all_io_entry = dm_deferred_entry_inc(cache->all_io_ds);
1072	1158
1073		− if (is_writethrough_io(cache, bio, lookup_result.cblock)) {
1074		− /*
1075		− * No need to mark anything dirty in write through mode.
1076		− */
1077		− pb->req_nr == 0 ?
1078		− remap_to_cache(cache, bio, lookup_result.cblock) :
1079		− remap_to_origin_clear_discard(cache, bio, block);
1080		− } else
	1159	+ if (is_writethrough_io(cache, bio, lookup_result.cblock))
	1160	+ remap_to_origin_then_cache(cache, bio, block, lookup_result.cblock);
	1161	+ else
1081	1162	remap_to_cache_dirty(cache, bio, block, lookup_result.cblock);
1082	1163
1083	1164	issue(cache, bio);
@@ -1086,17 +1167,8 @@ static void process_bio(struct cache cache, struct prealloc structs, · 2 unmodified lines
1086	1167	case POLICY_MISS:
1087	1168	inc_miss_counter(cache, bio);
1088	1169	pb->all_io_entry = dm_deferred_entry_inc(cache->all_io_ds);
1089		−
1090		− if (pb->req_nr != 0) {
1091		− /*
1092		− * This is a duplicate writethrough io that is no
1093		− * longer needed because the block has been demoted.
1094		− */
1095		− bio_endio(bio, 0);
1096		− } else {
1097		− remap_to_origin_clear_discard(cache, bio, block);
1098		− issue(cache, bio);
1099		− }
	1170	+ remap_to_origin_clear_discard(cache, bio, block);
	1171	+ issue(cache, bio);
1100	1172	break;
1101	1173
1102	1174	case POLICY_NEW:
@@ -1217,6 +1289,23 @@ static void process_deferred_flush_bios(struct cache *cache, bool submit_bios) · 114 unmodified lines
1217	1289	submit_bios ? generic_make_request(bio) : bio_io_error(bio);
1218	1290	}
1219	1291
	1292	+static void process_deferred_writethrough_bios(struct cache *cache)
	1293	+{
	1294	+ unsigned long flags;
	1295	+ struct bio_list bios;
	1296	+ struct bio *bio;
	1297	+
	1298	+ bio_list_init(&bios);
	1299	+
	1300	+ spin_lock_irqsave(&cache->lock, flags);
	1301	+ bio_list_merge(&bios, &cache->deferred_writethrough_bios);
	1302	+ bio_list_init(&cache->deferred_writethrough_bios);
	1303	+ spin_unlock_irqrestore(&cache->lock, flags);
	1304	+
	1305	+ while ((bio = bio_list_pop(&bios)))
	1306	+ generic_make_request(bio);
	1307	+}
	1308	+
1220	1309	static void writeback_some_dirty_blocks(struct cache *cache)
1221	1310	{
1222	1311	int r = 0;
@@ -1313,6 +1402,7 @@ static int more_work(struct cache *cache) · 90 unmodified lines
1313	1402	else
1314	1403	return !bio_list_empty(&cache->deferred_bios) \|\|
1315	1404	!bio_list_empty(&cache->deferred_flush_bios) \|\|
	1405	+ !bio_list_empty(&cache->deferred_writethrough_bios) \|\|
1316	1406	!list_empty(&cache->quiesced_migrations) \|\|
1317	1407	!list_empty(&cache->completed_migrations) \|\|
1318	1408	!list_empty(&cache->need_commit_migrations);
@@ -1331,6 +1421,8 @@ static void do_worker(struct work_struct *ws) · 12 unmodified lines
1331	1421
1332	1422	writeback_some_dirty_blocks(cache);
1333	1423
	1424	+ process_deferred_writethrough_bios(cache);
	1425	+
1334	1426	if (commit_if_needed(cache)) {
1335	1427	process_deferred_flush_bios(cache, false);
1336	1428
@@ -1756,8 +1848,11 @@ static int create_cache_policy(struct cache cache, struct cache_args ca, · 419 unmodified lines
1756	1848	}
1757	1849
1758	1850	r = set_config_values(cache->policy, ca->policy_argc, ca->policy_argv);
1759		− if (r)
	1851	+ if (r) {
	1852	+ *error = "Error setting cache policy's config values";
1760	1853	dm_cache_policy_destroy(cache->policy);
	1854	+ cache->policy = NULL;
	1855	+ }
1761	1856
1762	1857	return r;
1763	1858	}
@@ -1793,8 +1888,6 @@ static sector_t calculate_discard_block_size(sector_t cache_block_size, · 29 unmodified lines
1793	1888
1794	1889	#define DEFAULT_MIGRATION_THRESHOLD (2048 * 100)
1795	1890
1796		−static unsigned cache_num_write_bios(struct dm_target ti, struct bio bio);
1797		−
1798	1891	static int cache_create(struct cache_args ca, struct cache *result)
1799	1892	{
1800	1893	int r = 0;
@@ -1811,7 +1904,6 @@ static int cache_create(struct cache_args ca, struct cache *result) · 10 unmodified lines
1811	1904
1812	1905	cache->ti = ca->ti;
1813	1906	ti->private = cache;
1814		− ti->per_bio_data_size = sizeof(struct per_bio_data);
1815	1907	ti->num_flush_bios = 2;
1816	1908	ti->flush_supported = true;
1817	1909
@@ -1820,9 +1912,7 @@ static int cache_create(struct cache_args ca, struct cache *result) · 2 unmodified lines
1820	1912	ti->discard_zeroes_data_unsupported = true;
1821	1913
1822	1914	memcpy(&cache->features, &ca->features, sizeof(cache->features));
1823		−
1824		− if (cache->features.write_through)
1825		− ti->num_write_bios = cache_num_write_bios;
	1915	+ ti->per_bio_data_size = get_per_bio_data_size(cache);
1826	1916
1827	1917	cache->callbacks.congested_fn = cache_is_congested;
1828	1918	dm_table_add_target_callbacks(ti->table, &cache->callbacks);
@@ -1835,7 +1925,7 @@ static int cache_create(struct cache_args ca, struct cache *result) · 6 unmodified lines
1835	1925
1836	1926	/* FIXME: factor out this whole section */
1837	1927	origin_blocks = cache->origin_sectors = ca->origin_sectors;
1838		− (void) sector_div(origin_blocks, ca->block_size);
	1928	+ origin_blocks = block_div(origin_blocks, ca->block_size);
1839	1929	cache->origin_blocks = to_oblock(origin_blocks);
1840	1930
1841	1931	cache->sectors_per_block = ca->block_size;
@@ -1848,7 +1938,7 @@ static int cache_create(struct cache_args ca, struct cache *result) · 6 unmodified lines
1848	1938	dm_block_t cache_size = ca->cache_sectors;
1849	1939
1850	1940	cache->sectors_per_block_shift = -1;
1851		− (void) sector_div(cache_size, ca->block_size);
	1941	+ cache_size = block_div(cache_size, ca->block_size);
1852	1942	cache->cache_size = to_cblock(cache_size);
1853	1943	} else {
1854	1944	cache->sectors_per_block_shift = __ffs(ca->block_size);
@@ -1873,6 +1963,7 @@ static int cache_create(struct cache_args ca, struct cache *result) · 18 unmodified lines
1873	1963	spin_lock_init(&cache->lock);
1874	1964	bio_list_init(&cache->deferred_bios);
1875	1965	bio_list_init(&cache->deferred_flush_bios);
	1966	+ bio_list_init(&cache->deferred_writethrough_bios);
1876	1967	INIT_LIST_HEAD(&cache->quiesced_migrations);
1877	1968	INIT_LIST_HEAD(&cache->completed_migrations);
1878	1969	INIT_LIST_HEAD(&cache->need_commit_migrations);
@@ -2002,6 +2093,8 @@ static int cache_ctr(struct dm_target ti, unsigned argc, char *argv) · 123 unmodified lines
2002	2093	goto out;
2003	2094
2004	2095	r = cache_create(ca, &cache);
	2096	+ if (r)
	2097	+ goto out;
2005	2098
2006	2099	r = copy_ctr_args(cache, argc - 3, (const char **)argv + 3);
2007	2100	if (r) {
@@ -2016,26 +2109,13 @@ out: · 8 unmodified lines
2016	2109	return r;
2017	2110	}
2018	2111
2019		−static unsigned cache_num_write_bios(struct dm_target ti, struct bio bio)
2020		−{
2021		− int r;
2022		− struct cache *cache = ti->private;
2023		− dm_oblock_t block = get_bio_block(cache, bio);
2024		− dm_cblock_t cblock;
2025		−
2026		− r = policy_lookup(cache->policy, block, &cblock);
2027		− if (r < 0)
2028		− return 2; /* assume the worst */
2029		−
2030		− return (!r && !is_dirty(cache, cblock)) ? 2 : 1;
2031		−}
2032		−
2033	2112	static int cache_map(struct dm_target ti, struct bio bio)
2034	2113	{
2035	2114	struct cache *cache = ti->private;
2036	2115
2037	2116	int r;
2038	2117	dm_oblock_t block = get_bio_block(cache, bio);
	2118	+ size_t pb_data_size = get_per_bio_data_size(cache);
2039	2119	bool can_migrate = false;
2040	2120	bool discarded_block;
2041	2121	struct dm_bio_prison_cell *cell;
@@ -2052,7 +2132,7 @@ static int cache_map(struct dm_target ti, struct bio bio) · 10 unmodified lines
2052	2132	return DM_MAPIO_REMAPPED;
2053	2133	}
2054	2134
2055		− pb = init_per_bio_data(bio);
	2135	+ pb = init_per_bio_data(bio, pb_data_size);
2056	2136
2057	2137	if (bio->bi_rw & (REQ_FLUSH \| REQ_FUA \| REQ_DISCARD)) {
2058	2138	defer_bio(cache, bio);
@@ -2097,18 +2177,12 @@ static int cache_map(struct dm_target ti, struct bio bio) · 38 unmodified lines
2097	2177	inc_hit_counter(cache, bio);
2098	2178	pb->all_io_entry = dm_deferred_entry_inc(cache->all_io_ds);
2099	2179
2100		− if (is_writethrough_io(cache, bio, lookup_result.cblock)) {
2101		− /*
2102		− * No need to mark anything dirty in write through mode.
2103		− */
2104		− pb->req_nr == 0 ?
2105		− remap_to_cache(cache, bio, lookup_result.cblock) :
2106		− remap_to_origin_clear_discard(cache, bio, block);
2107		− cell_defer(cache, cell, false);
2108		− } else {
	2180	+ if (is_writethrough_io(cache, bio, lookup_result.cblock))
	2181	+ remap_to_origin_then_cache(cache, bio, block, lookup_result.cblock);
	2182	+ else
2109	2183	remap_to_cache_dirty(cache, bio, block, lookup_result.cblock);
2110		− cell_defer(cache, cell, false);
2111		− }
	2184	+
	2185	+ cell_defer(cache, cell, false);
2112	2186	break;
2113	2187
2114	2188	case POLICY_MISS:
@@ -2143,7 +2217,8 @@ static int cache_end_io(struct dm_target ti, struct bio bio, int error) · 28 unmodified lines
2143	2217	{
2144	2218	struct cache *cache = ti->private;
2145	2219	unsigned long flags;
2146		− struct per_bio_data *pb = get_per_bio_data(bio);
	2220	+ size_t pb_data_size = get_per_bio_data_size(cache);
	2221	+ struct per_bio_data *pb = get_per_bio_data(bio, pb_data_size);
2147	2222
2148	2223	if (pb->tick) {
2149	2224	policy_tick(cache->policy);
@@ -2319,8 +2394,7 @@ static int cache_preresume(struct dm_target *ti) · 169 unmodified lines
2319	2394	}
2320	2395
2321	2396	if (!cache->loaded_mappings) {
2322		− r = dm_cache_load_mappings(cache->cmd,
2323		− dm_cache_policy_get_name(cache->policy),
	2397	+ r = dm_cache_load_mappings(cache->cmd, cache->policy,
2324	2398	load_mapping, cache);
2325	2399	if (r) {
2326	2400	DMERR("could not load cache mappings");
@@ -2535,7 +2609,7 @@ static void cache_io_hints(struct dm_target ti, struct queue_limits limits) · 208 unmodified lines
2535	2609
2536	2610	static struct target_type cache_target = {
2537	2611	.name = "cache",
2538		− .version = {1, 0, 0},
	2612	+ .version = {1, 1, 0},
2539	2613	.module = THIS_MODULE,
2540	2614	.ctr = cache_ctr,
2541	2615	.dtr = cache_dtr,

drivers/md/dm-thin.c+8−3

@@ -1577,6 +1577,11 @@ static bool data_dev_supports_discard(struct pool_c *pt) · 1576 unmodified lines
1577	1577	return q && blk_queue_discard(q);
1578	1578	}
1579	1579
	1580	+static bool is_factor(sector_t block_size, uint32_t n)
	1581	+{
	1582	+ return !sector_div(block_size, n);
	1583	+}
	1584	+
1580	1585	/*
1581	1586	* If discard_passdown was enabled verify that the data device
1582	1587	* supports discards. Disable discard_passdown if not.
@@ -1602,7 +1607,7 @@ static void disable_passdown_if_not_supported(struct pool_c *pt) · 19 unmodified lines
1602	1607	else if (data_limits->discard_granularity > block_size)
1603	1608	reason = "discard granularity larger than a block";
1604	1609
1605		− else if (block_size & (data_limits->discard_granularity - 1))
	1610	+ else if (!is_factor(block_size, data_limits->discard_granularity))
1606	1611	reason = "discard granularity not a factor of block size";
1607	1612
1608	1613	if (reason) {
@@ -2544,7 +2549,7 @@ static struct target_type pool_target = { · 935 unmodified lines
2544	2549	.name = "thin-pool",
2545	2550	.features = DM_TARGET_SINGLETON \| DM_TARGET_ALWAYS_WRITEABLE \|
2546	2551	DM_TARGET_IMMUTABLE,
2547		− .version = {1, 6, 1},
	2552	+ .version = {1, 7, 0},
2548	2553	.module = THIS_MODULE,
2549	2554	.ctr = pool_ctr,
2550	2555	.dtr = pool_dtr,
@@ -2831,7 +2836,7 @@ static int thin_iterate_devices(struct dm_target *ti, · 280 unmodified lines
2831	2836
2832	2837	static struct target_type thin_target = {
2833	2838	.name = "thin",
2834		− .version = {1, 7, 1},
	2839	+ .version = {1, 8, 0},
2835	2840	.module = THIS_MODULE,
2836	2841	.ctr = thin_ctr,
2837	2842	.dtr = thin_dtr,

drivers/md/dm-verity.c+34−5

@@ -93,6 +93,13 @@ struct dm_verity_io { · 92 unmodified lines
93	93	*/
94	94	};
95	95
	96	+struct dm_verity_prefetch_work {
	97	+ struct work_struct work;
	98	+ struct dm_verity *v;
	99	+ sector_t block;
	100	+ unsigned n_blocks;
	101	+};
	102	+
96	103	static struct shash_desc io_hash_desc(struct dm_verity v, struct dm_verity_io *io)
97	104	{
98	105	return (struct shash_desc *)(io + 1);
@@ -424,15 +431,18 @@ static void verity_end_io(struct bio *bio, int error) · 325 unmodified lines
424	431	* The root buffer is not prefetched, it is assumed that it will be cached
425	432	* all the time.
426	433	*/
427		−static void verity_prefetch_io(struct dm_verity v, struct dm_verity_io io)
	434	+static void verity_prefetch_io(struct work_struct *work)
428	435	{
	436	+ struct dm_verity_prefetch_work *pw =
	437	+ container_of(work, struct dm_verity_prefetch_work, work);
	438	+ struct dm_verity *v = pw->v;
429	439	int i;
430	440
431	441	for (i = v->levels - 2; i >= 0; i--) {
432	442	sector_t hash_block_start;
433	443	sector_t hash_block_end;
434		− verity_hash_at_level(v, io->block, i, &hash_block_start, NULL);
435		− verity_hash_at_level(v, io->block + io->n_blocks - 1, i, &hash_block_end, NULL);
	444	+ verity_hash_at_level(v, pw->block, i, &hash_block_start, NULL);
	445	+ verity_hash_at_level(v, pw->block + pw->n_blocks - 1, i, &hash_block_end, NULL);
436	446	if (!i) {
437	447	unsigned cluster = ACCESS_ONCE(dm_verity_prefetch_cluster);
438	448
@@ -452,6 +462,25 @@ no_prefetch_cluster: · 13 unmodified lines
452	462	dm_bufio_prefetch(v->bufio, hash_block_start,
453	463	hash_block_end - hash_block_start + 1);
454	464	}
	465	+
	466	+ kfree(pw);
	467	+}
	468	+
	469	+static void verity_submit_prefetch(struct dm_verity v, struct dm_verity_io io)
	470	+{
	471	+ struct dm_verity_prefetch_work *pw;
	472	+
	473	+ pw = kmalloc(sizeof(struct dm_verity_prefetch_work),
	474	+ GFP_NOIO \| __GFP_NORETRY \| __GFP_NOMEMALLOC \| __GFP_NOWARN);
	475	+
	476	+ if (!pw)
	477	+ return;
	478	+
	479	+ INIT_WORK(&pw->work, verity_prefetch_io);
	480	+ pw->v = v;
	481	+ pw->block = io->block;
	482	+ pw->n_blocks = io->n_blocks;
	483	+ queue_work(v->verify_wq, &pw->work);
455	484	}
456	485
457	486	/*
@@ -498,7 +527,7 @@ static int verity_map(struct dm_target ti, struct bio bio) · 40 unmodified lines
498	527	memcpy(io->io_vec, bio_iovec(bio),
499	528	io->io_vec_size * sizeof(struct bio_vec));
500	529
501		− verity_prefetch_io(v, io);
	530	+ verity_submit_prefetch(v, io);
502	531
503	532	generic_make_request(bio);
504	533
@@ -858,7 +887,7 @@ bad: · 353 unmodified lines
858	887
859	888	static struct target_type verity_target = {
860	889	.name = "verity",
861		− .version = {1, 1, 1},
	890	+ .version = {1, 2, 0},
862	891	.module = THIS_MODULE,
863	892	.ctr = verity_ctr,
864	893	.dtr = verity_dtr,

drivers/md/dm.c+1−0

@@ -611,6 +611,7 @@ static void dec_pending(struct dm_io *io, int error) · 610 unmodified lines
611	611	queue_io(md, bio);
612	612	} else {
613	613	/* done with normal IO or empty flush */
	614	+ trace_block_bio_complete(md->queue, bio, io_error);
614	615	bio_endio(bio, io_error);
615	616	}
616	617	}

drivers/md/md.c+2−4

@@ -7663,10 +7663,8 @@ static int remove_and_add_spares(struct mddev *mddev) · 7662 unmodified lines
7663	7663	removed++;
7664	7664	}
7665	7665	}
7666		− if (removed)
7667		− sysfs_notify(&mddev->kobj, NULL,
7668		− "degraded");
7669		−
	7666	+ if (removed && mddev->kobj.sd)
	7667	+ sysfs_notify(&mddev->kobj, NULL, "degraded");
7670	7668
7671	7669	rdev_for_each(rdev, mddev) {
7672	7670	if (rdev->raid_disk >= 0 &&

drivers/md/md.h+2−2

@@ -506,7 +506,7 @@ static inline char * mdname (struct mddev * mddev) · 505 unmodified lines
506	506	static inline int sysfs_link_rdev(struct mddev mddev, struct md_rdev rdev)
507	507	{
508	508	char nm[20];
509		− if (!test_bit(Replacement, &rdev->flags)) {
	509	+ if (!test_bit(Replacement, &rdev->flags) && mddev->kobj.sd) {
510	510	sprintf(nm, "rd%d", rdev->raid_disk);
511	511	return sysfs_create_link(&mddev->kobj, &rdev->kobj, nm);
512	512	} else
@@ -516,7 +516,7 @@ static inline int sysfs_link_rdev(struct mddev mddev, struct md_rdev rdev) · 3 unmodified lines
516	516	static inline void sysfs_unlink_rdev(struct mddev mddev, struct md_rdev rdev)
517	517	{
518	518	char nm[20];
519		− if (!test_bit(Replacement, &rdev->flags)) {
	519	+ if (!test_bit(Replacement, &rdev->flags) && mddev->kobj.sd) {
520	520	sprintf(nm, "rd%d", rdev->raid_disk);
521	521	sysfs_remove_link(&mddev->kobj, nm);
522	522	}

drivers/md/persistent-data/dm-btree-remove.c+24−22

@@ -139,15 +139,8 @@ struct child { · 138 unmodified lines
139	139	struct btree_node *n;
140	140	};
141	141
142		−static struct dm_btree_value_type le64_type = {
143		− .context = NULL,
144		− .size = sizeof(__le64),
145		− .inc = NULL,
146		− .dec = NULL,
147		− .equal = NULL
148		−};
149		−
150		−static int init_child(struct dm_btree_info info, struct btree_node parent,
	142	+static int init_child(struct dm_btree_info info, struct dm_btree_value_type vt,
	143	+ struct btree_node *parent,
151	144	unsigned index, struct child *result)
152	145	{
153	146	int r, inc;
@@ -164,7 +157,7 @@ static int init_child(struct dm_btree_info info, struct btree_node parent, · 10 unmodified lines
164	157	result->n = dm_block_data(result->block);
165	158
166	159	if (inc)
167		− inc_children(info->tm, result->n, &le64_type);
	160	+ inc_children(info->tm, result->n, vt);
168	161
169	162	((__le64 ) value_ptr(parent, index)) =
170	163	cpu_to_le64(dm_block_location(result->block));
@@ -236,7 +229,7 @@ static void __rebalance2(struct dm_btree_info info, struct btree_node parent, · 65 unmodified lines
236	229	}
237	230
238	231	static int rebalance2(struct shadow_spine s, struct dm_btree_info info,
239		− unsigned left_index)
	232	+ struct dm_btree_value_type *vt, unsigned left_index)
240	233	{
241	234	int r;
242	235	struct btree_node *parent;
@@ -244,11 +237,11 @@ static int rebalance2(struct shadow_spine s, struct dm_btree_info info, · 1 unmodified line
244	237
245	238	parent = dm_block_data(shadow_current(s));
246	239
247		− r = init_child(info, parent, left_index, &left);
	240	+ r = init_child(info, vt, parent, left_index, &left);
248	241	if (r)
249	242	return r;
250	243
251		− r = init_child(info, parent, left_index + 1, &right);
	244	+ r = init_child(info, vt, parent, left_index + 1, &right);
252	245	if (r) {
253	246	exit_child(info, &left);
254	247	return r;
@@ -368,7 +361,7 @@ static void __rebalance3(struct dm_btree_info info, struct btree_node parent, · 113 unmodified lines
368	361	}
369	362
370	363	static int rebalance3(struct shadow_spine s, struct dm_btree_info info,
371		− unsigned left_index)
	364	+ struct dm_btree_value_type *vt, unsigned left_index)
372	365	{
373	366	int r;
374	367	struct btree_node *parent = dm_block_data(shadow_current(s));
@@ -377,17 +370,17 @@ static int rebalance3(struct shadow_spine s, struct dm_btree_info info, · 2 unmodified lines
377	370	/*
378	371	* FIXME: fill out an array?
379	372	*/
380		− r = init_child(info, parent, left_index, &left);
	373	+ r = init_child(info, vt, parent, left_index, &left);
381	374	if (r)
382	375	return r;
383	376
384		− r = init_child(info, parent, left_index + 1, &center);
	377	+ r = init_child(info, vt, parent, left_index + 1, &center);
385	378	if (r) {
386	379	exit_child(info, &left);
387	380	return r;
388	381	}
389	382
390		− r = init_child(info, parent, left_index + 2, &right);
	383	+ r = init_child(info, vt, parent, left_index + 2, &right);
391	384	if (r) {
392	385	exit_child(info, &left);
393	386	exit_child(info, &center);
@@ -434,7 +427,8 @@ static int get_nr_entries(struct dm_transaction_manager *tm, · 40 unmodified lines
434	427	}
435	428
436	429	static int rebalance_children(struct shadow_spine *s,
437		− struct dm_btree_info *info, uint64_t key)
	430	+ struct dm_btree_info *info,
	431	+ struct dm_btree_value_type *vt, uint64_t key)
438	432	{
439	433	int i, r, has_left_sibling, has_right_sibling;
440	434	uint32_t child_entries;
@@ -472,13 +466,13 @@ static int rebalance_children(struct shadow_spine *s, · 31 unmodified lines
472	466	has_right_sibling = i < (le32_to_cpu(n->header.nr_entries) - 1);
473	467
474	468	if (!has_left_sibling)
475		− r = rebalance2(s, info, i);
	469	+ r = rebalance2(s, info, vt, i);
476	470
477	471	else if (!has_right_sibling)
478		− r = rebalance2(s, info, i - 1);
	472	+ r = rebalance2(s, info, vt, i - 1);
479	473
480	474	else
481		− r = rebalance3(s, info, i - 1);
	475	+ r = rebalance3(s, info, vt, i - 1);
482	476
483	477	return r;
484	478	}
@@ -529,7 +523,7 @@ static int remove_raw(struct shadow_spine s, struct dm_btree_info info, · 44 unmodified lines
529	523	if (le32_to_cpu(n->header.flags) & LEAF_NODE)
530	524	return do_leaf(n, key, index);
531	525
532		− r = rebalance_children(s, info, key);
	526	+ r = rebalance_children(s, info, vt, key);
533	527	if (r)
534	528	break;
535	529
@@ -550,6 +544,14 @@ static int remove_raw(struct shadow_spine s, struct dm_btree_info info, · 14 unmodified lines
550	544	return r;
551	545	}
552	546
	547	+static struct dm_btree_value_type le64_type = {
	548	+ .context = NULL,
	549	+ .size = sizeof(__le64),
	550	+ .inc = NULL,
	551	+ .dec = NULL,
	552	+ .equal = NULL
	553	+};
	554	+
553	555	int dm_btree_remove(struct dm_btree_info *info, dm_block_t root,
554	556	uint64_t keys, dm_block_t new_root)
555	557	{

drivers/md/raid5.c+91−36

@@ -184,6 +184,8 @@ static void return_io(struct bio *return_bi) · 183 unmodified lines
184	184	return_bi = bi->bi_next;
185	185	bi->bi_next = NULL;
186	186	bi->bi_size = 0;
	187	+ trace_block_bio_complete(bdev_get_queue(bi->bi_bdev),
	188	+ bi, 0);
187	189	bio_endio(bi, 0);
188	190	bi = return_bi;
189	191	}
@@ -671,9 +673,11 @@ static void ops_run_io(struct stripe_head sh, struct stripe_head_state s) · 481 unmodified lines
671	673	bi->bi_next = NULL;
672	674	if (rrdev)
673	675	set_bit(R5_DOUBLE_LOCKED, &sh->dev[i].flags);
674		− trace_block_bio_remap(bdev_get_queue(bi->bi_bdev),
675		− bi, disk_devt(conf->mddev->gendisk),
676		− sh->dev[i].sector);
	676	+
	677	+ if (conf->mddev->gendisk)
	678	+ trace_block_bio_remap(bdev_get_queue(bi->bi_bdev),
	679	+ bi, disk_devt(conf->mddev->gendisk),
	680	+ sh->dev[i].sector);
677	681	generic_make_request(bi);
678	682	}
679	683	if (rrdev) {
@@ -701,9 +705,10 @@ static void ops_run_io(struct stripe_head sh, struct stripe_head_state s) · 21 unmodified lines
701	705	rbi->bi_io_vec[0].bv_offset = 0;
702	706	rbi->bi_size = STRIPE_SIZE;
703	707	rbi->bi_next = NULL;
704		− trace_block_bio_remap(bdev_get_queue(rbi->bi_bdev),
705		− rbi, disk_devt(conf->mddev->gendisk),
706		− sh->dev[i].sector);
	708	+ if (conf->mddev->gendisk)
	709	+ trace_block_bio_remap(bdev_get_queue(rbi->bi_bdev),
	710	+ rbi, disk_devt(conf->mddev->gendisk),
	711	+ sh->dev[i].sector);
707	712	generic_make_request(rbi);
708	713	}
709	714	if (!rdev && !rrdev) {
@@ -2280,17 +2285,6 @@ schedule_reconstruction(struct stripe_head sh, struct stripe_head_state s, · 1570 unmodified lines
2280	2285	int level = conf->level;
2281	2286
2282	2287	if (rcw) {
2283		− /* if we are not expanding this is a proper write request, and
2284		− * there will be bios with new data to be drained into the
2285		− * stripe cache
2286		− */
2287		− if (!expand) {
2288		− sh->reconstruct_state = reconstruct_state_drain_run;
2289		− set_bit(STRIPE_OP_BIODRAIN, &s->ops_request);
2290		− } else
2291		− sh->reconstruct_state = reconstruct_state_run;
2292		−
2293		− set_bit(STRIPE_OP_RECONSTRUCT, &s->ops_request);
2294	2288
2295	2289	for (i = disks; i--; ) {
2296	2290	struct r5dev *dev = &sh->dev[i];
@@ -2303,6 +2297,21 @@ schedule_reconstruction(struct stripe_head sh, struct stripe_head_state s, · 6 unmodified lines
2303	2297	s->locked++;
2304	2298	}
2305	2299	}
	2300	+ /* if we are not expanding this is a proper write request, and
	2301	+ * there will be bios with new data to be drained into the
	2302	+ * stripe cache
	2303	+ */
	2304	+ if (!expand) {
	2305	+ if (!s->locked)
	2306	+ /* False alarm, nothing to do */
	2307	+ return;
	2308	+ sh->reconstruct_state = reconstruct_state_drain_run;
	2309	+ set_bit(STRIPE_OP_BIODRAIN, &s->ops_request);
	2310	+ } else
	2311	+ sh->reconstruct_state = reconstruct_state_run;
	2312	+
	2313	+ set_bit(STRIPE_OP_RECONSTRUCT, &s->ops_request);
	2314	+
2306	2315	if (s->locked + conf->max_degraded == disks)
2307	2316	if (!test_and_set_bit(STRIPE_FULL_WRITE, &sh->state))
2308	2317	atomic_inc(&conf->pending_full_writes);
@@ -2311,11 +2320,6 @@ schedule_reconstruction(struct stripe_head sh, struct stripe_head_state s, · 2 unmodified lines
2311	2320	BUG_ON(!(test_bit(R5_UPTODATE, &sh->dev[pd_idx].flags) \|\|
2312	2321	test_bit(R5_Wantcompute, &sh->dev[pd_idx].flags)));
2313	2322
2314		− sh->reconstruct_state = reconstruct_state_prexor_drain_run;
2315		− set_bit(STRIPE_OP_PREXOR, &s->ops_request);
2316		− set_bit(STRIPE_OP_BIODRAIN, &s->ops_request);
2317		− set_bit(STRIPE_OP_RECONSTRUCT, &s->ops_request);
2318		−
2319	2323	for (i = disks; i--; ) {
2320	2324	struct r5dev *dev = &sh->dev[i];
2321	2325	if (i == pd_idx)
@@ -2330,6 +2334,13 @@ schedule_reconstruction(struct stripe_head sh, struct stripe_head_state s, · 8 unmodified lines
2330	2334	s->locked++;
2331	2335	}
2332	2336	}
	2337	+ if (!s->locked)
	2338	+ /* False alarm - nothing to do */
	2339	+ return;
	2340	+ sh->reconstruct_state = reconstruct_state_prexor_drain_run;
	2341	+ set_bit(STRIPE_OP_PREXOR, &s->ops_request);
	2342	+ set_bit(STRIPE_OP_BIODRAIN, &s->ops_request);
	2343	+ set_bit(STRIPE_OP_RECONSTRUCT, &s->ops_request);
2333	2344	}
2334	2345
2335	2346	/* keep the parity disk(s) locked while asynchronous operations
@@ -2564,6 +2575,8 @@ handle_failed_sync(struct r5conf conf, struct stripe_head sh, · 228 unmodified lines
2564	2575	int i;
2565	2576
2566	2577	clear_bit(STRIPE_SYNCING, &sh->state);
	2578	+ if (test_and_clear_bit(R5_Overlap, &sh->dev[sh->pd_idx].flags))
	2579	+ wake_up(&conf->wait_for_overlap);
2567	2580	s->syncing = 0;
2568	2581	s->replacing = 0;
2569	2582	/* There is nothing more to do for sync/check/repair.
@@ -2737,6 +2750,7 @@ static void handle_stripe_clean_event(struct r5conf *conf, · 167 unmodified lines
2737	2750	{
2738	2751	int i;
2739	2752	struct r5dev *dev;
	2753	+ int discard_pending = 0;
2740	2754
2741	2755	for (i = disks; i--; )
2742	2756	if (sh->dev[i].written) {
@@ -2765,9 +2779,23 @@ static void handle_stripe_clean_event(struct r5conf *conf, · 22 unmodified lines
2765	2779	STRIPE_SECTORS,
2766	2780	!test_bit(STRIPE_DEGRADED, &sh->state),
2767	2781	0);
2768		− }
2769		− } else if (test_bit(R5_Discard, &sh->dev[i].flags))
2770		− clear_bit(R5_Discard, &sh->dev[i].flags);
	2782	+ } else if (test_bit(R5_Discard, &dev->flags))
	2783	+ discard_pending = 1;
	2784	+ }
	2785	+ if (!discard_pending &&
	2786	+ test_bit(R5_Discard, &sh->dev[sh->pd_idx].flags)) {
	2787	+ clear_bit(R5_Discard, &sh->dev[sh->pd_idx].flags);
	2788	+ clear_bit(R5_UPTODATE, &sh->dev[sh->pd_idx].flags);
	2789	+ if (sh->qd_idx >= 0) {
	2790	+ clear_bit(R5_Discard, &sh->dev[sh->qd_idx].flags);
	2791	+ clear_bit(R5_UPTODATE, &sh->dev[sh->qd_idx].flags);
	2792	+ }
	2793	+ /* now that discard is done we can proceed with any sync */
	2794	+ clear_bit(STRIPE_DISCARD, &sh->state);
	2795	+ if (test_bit(STRIPE_SYNC_REQUESTED, &sh->state))
	2796	+ set_bit(STRIPE_HANDLE, &sh->state);
	2797	+
	2798	+ }
2771	2799
2772	2800	if (test_and_clear_bit(STRIPE_FULL_WRITE, &sh->state))
2773	2801	if (atomic_dec_and_test(&conf->pending_full_writes))
@@ -2826,8 +2854,10 @@ static void handle_stripe_dirtying(struct r5conf *conf, · 52 unmodified lines
2826	2854	set_bit(STRIPE_HANDLE, &sh->state);
2827	2855	if (rmw < rcw && rmw > 0) {
2828	2856	/* prefer read-modify-write, but need to get some data */
2829		− blk_add_trace_msg(conf->mddev->queue, "raid5 rmw %llu %d",
2830		− (unsigned long long)sh->sector, rmw);
	2857	+ if (conf->mddev->queue)
	2858	+ blk_add_trace_msg(conf->mddev->queue,
	2859	+ "raid5 rmw %llu %d",
	2860	+ (unsigned long long)sh->sector, rmw);
2831	2861	for (i = disks; i--; ) {
2832	2862	struct r5dev *dev = &sh->dev[i];
2833	2863	if ((dev->towrite \|\| i == sh->pd_idx) &&
@@ -2877,7 +2907,7 @@ static void handle_stripe_dirtying(struct r5conf *conf, · 43 unmodified lines
2877	2907	}
2878	2908	}
2879	2909	}
2880		− if (rcw)
	2910	+ if (rcw && conf->mddev->queue)
2881	2911	blk_add_trace_msg(conf->mddev->queue, "raid5 rcw %llu %d %d %d",
2882	2912	(unsigned long long)sh->sector,
2883	2913	rcw, qread, test_bit(STRIPE_DELAYED, &sh->state));
@@ -3417,9 +3447,15 @@ static void handle_stripe(struct stripe_head *sh) · 533 unmodified lines
3417	3447	return;
3418	3448	}
3419	3449
3420		− if (test_and_clear_bit(STRIPE_SYNC_REQUESTED, &sh->state)) {
3421		− set_bit(STRIPE_SYNCING, &sh->state);
3422		− clear_bit(STRIPE_INSYNC, &sh->state);
	3450	+ if (test_bit(STRIPE_SYNC_REQUESTED, &sh->state)) {
	3451	+ spin_lock(&sh->stripe_lock);
	3452	+ /* Cannot process 'sync' concurrently with 'discard' */
	3453	+ if (!test_bit(STRIPE_DISCARD, &sh->state) &&
	3454	+ test_and_clear_bit(STRIPE_SYNC_REQUESTED, &sh->state)) {
	3455	+ set_bit(STRIPE_SYNCING, &sh->state);
	3456	+ clear_bit(STRIPE_INSYNC, &sh->state);
	3457	+ }
	3458	+ spin_unlock(&sh->stripe_lock);
3423	3459	}
3424	3460	clear_bit(STRIPE_DELAYED, &sh->state);
3425	3461
@@ -3579,6 +3615,8 @@ static void handle_stripe(struct stripe_head *sh) · 153 unmodified lines
3579	3615	test_bit(STRIPE_INSYNC, &sh->state)) {
3580	3616	md_done_sync(conf->mddev, STRIPE_SECTORS, 1);
3581	3617	clear_bit(STRIPE_SYNCING, &sh->state);
	3618	+ if (test_and_clear_bit(R5_Overlap, &sh->dev[sh->pd_idx].flags))
	3619	+ wake_up(&conf->wait_for_overlap);
3582	3620	}
3583	3621
3584	3622	/* If the failed drives are just a ReadError, then we might need
@@ -3878,6 +3916,8 @@ static void raid5_align_endio(struct bio *bi, int error) · 293 unmodified lines
3878	3916	rdev_dec_pending(rdev, conf->mddev);
3879	3917
3880	3918	if (!error && uptodate) {
	3919	+ trace_block_bio_complete(bdev_get_queue(raid_bi->bi_bdev),
	3920	+ raid_bi, 0);
3881	3921	bio_endio(raid_bi, 0);
3882	3922	if (atomic_dec_and_test(&conf->active_aligned_reads))
3883	3923	wake_up(&conf->wait_for_stripe);
@@ -3982,9 +4022,10 @@ static int chunk_aligned_read(struct mddev mddev, struct bio raid_bio) · 98 unmodified lines
3982	4022	atomic_inc(&conf->active_aligned_reads);
3983	4023	spin_unlock_irq(&conf->device_lock);
3984	4024
3985		− trace_block_bio_remap(bdev_get_queue(align_bi->bi_bdev),
3986		− align_bi, disk_devt(mddev->gendisk),
3987		− raid_bio->bi_sector);
	4025	+ if (mddev->gendisk)
	4026	+ trace_block_bio_remap(bdev_get_queue(align_bi->bi_bdev),
	4027	+ align_bi, disk_devt(mddev->gendisk),
	4028	+ raid_bio->bi_sector);
3988	4029	generic_make_request(align_bi);
3989	4030	return 1;
3990	4031	} else {
@@ -4078,7 +4119,8 @@ static void raid5_unplug(struct blk_plug_cb *blk_cb, bool from_schedule) · 87 unmodified lines
4078	4119	}
4079	4120	spin_unlock_irq(&conf->device_lock);
4080	4121	}
4081		− trace_block_unplug(mddev->queue, cnt, !from_schedule);
	4122	+ if (mddev->queue)
	4123	+ trace_block_unplug(mddev->queue, cnt, !from_schedule);
4082	4124	kfree(cb);
4083	4125	}
4084	4126
@@ -4141,6 +4183,13 @@ static void make_discard_request(struct mddev mddev, struct bio bi) · 56 unmodified lines
4141	4183	sh = get_active_stripe(conf, logical_sector, 0, 0, 0);
4142	4184	prepare_to_wait(&conf->wait_for_overlap, &w,
4143	4185	TASK_UNINTERRUPTIBLE);
	4186	+ set_bit(R5_Overlap, &sh->dev[sh->pd_idx].flags);
	4187	+ if (test_bit(STRIPE_SYNCING, &sh->state)) {
	4188	+ release_stripe(sh);
	4189	+ schedule();
	4190	+ goto again;
	4191	+ }
	4192	+ clear_bit(R5_Overlap, &sh->dev[sh->pd_idx].flags);
4144	4193	spin_lock_irq(&sh->stripe_lock);
4145	4194	for (d = 0; d < conf->raid_disks; d++) {
4146	4195	if (d == sh->pd_idx \|\| d == sh->qd_idx)
@@ -4153,6 +4202,7 @@ static void make_discard_request(struct mddev mddev, struct bio bi) · 6 unmodified lines
4153	4202	goto again;
4154	4203	}
4155	4204	}
	4205	+ set_bit(STRIPE_DISCARD, &sh->state);
4156	4206	finish_wait(&conf->wait_for_overlap, &w);
4157	4207	for (d = 0; d < conf->raid_disks; d++) {
4158	4208	if (d == sh->pd_idx \|\| d == sh->qd_idx)
@@ -4336,6 +4386,8 @@ static void make_request(struct mddev mddev, struct bio bi) · 177 unmodified lines
4336	4386	if ( rw == WRITE )
4337	4387	md_write_end(mddev);
4338	4388
	4389	+ trace_block_bio_complete(bdev_get_queue(bi->bi_bdev),
	4390	+ bi, 0);
4339	4391	bio_endio(bi, 0);
4340	4392	}
4341	4393	}
@@ -4712,8 +4764,11 @@ static int retry_aligned_read(struct r5conf conf, struct bio raid_bio) · 370 unmodified lines
4712	4764	handled++;
4713	4765	}
4714	4766	remaining = raid5_dec_bi_active_stripes(raid_bio);
4715		− if (remaining == 0)
	4767	+ if (remaining == 0) {
	4768	+ trace_block_bio_complete(bdev_get_queue(raid_bio->bi_bdev),
	4769	+ raid_bio, 0);
4716	4770	bio_endio(raid_bio, 0);
	4771	+ }
4717	4772	if (atomic_dec_and_test(&conf->active_aligned_reads))
4718	4773	wake_up(&conf->wait_for_stripe);
4719	4774	return handled;

drivers/md/raid5.h+1−4

@@ -221,10 +221,6 @@ struct stripe_head { · 220 unmodified lines
221	221	struct stripe_operations {
222	222	int target, target2;
223	223	enum sum_check_flags zero_sum_result;
224		− #ifdef CONFIG_MULTICORE_RAID456
225		− unsigned long request;
226		− wait_queue_head_t wait_for_ops;
227		− #endif
228	224	} ops;
229	225	struct r5dev {
230	226	/* rreq and rvec are used for the replacement device when
@@ -323,6 +319,7 @@ enum { · 92 unmodified lines
323	319	STRIPE_COMPUTE_RUN,
324	320	STRIPE_OPS_REQ_PENDING,
325	321	STRIPE_ON_UNPLUG_LIST,
	322	+ STRIPE_DISCARD,
326	323	};
327	324
328	325	/*

drivers/media/i2c/m5mols/m5mols_core.c+1−1

@@ -724,7 +724,7 @@ static int m5mols_s_stream(struct v4l2_subdev *sd, int enable) · 723 unmodified lines
724	724	if (enable) {
725	725	if (is_code(code, M5MOLS_RESTYPE_MONITOR))
726	726	ret = m5mols_start_monitor(info);
727		− if (is_code(code, M5MOLS_RESTYPE_CAPTURE))
	727	+ else if (is_code(code, M5MOLS_RESTYPE_CAPTURE))
728	728	ret = m5mols_start_capture(info);
729	729	else
730	730	ret = -EINVAL;

drivers/media/pci/bt8xx/bttv-driver.c+15−5

@@ -250,17 +250,19 @@ static u8 SRAM_Table[][60] = · 249 unmodified lines
250	250	vdelay start of active video in 2 * field lines relative to
251	251	trailing edge of /VRESET pulse (VDELAY register).
252	252	sheight height of active video in 2 * field lines.
	253	+ extraheight Added to sheight for cropcap.bounds.height only
253	254	videostart0 ITU-R frame line number of the line corresponding
254	255	to vdelay in the first field. */
255	256	#define CROPCAP(minhdelayx1, hdelayx1, swidth, totalwidth, sqwidth, \
256		− vdelay, sheight, videostart0) \
	257	+ vdelay, sheight, extraheight, videostart0) \
257	258	.cropcap.bounds.left = minhdelayx1, \
258	259	/* * 2 because vertically we count field lines times two, */ \
259	260	/* e.g. 23 * 2 to 23 * 2 + 576 in PAL-BGHI defrect. */ \
260	261	.cropcap.bounds.top = (videostart0) * 2 - (vdelay) + MIN_VDELAY, \
261	262	/* 4 is a safety margin at the end of the line. */ \
262	263	.cropcap.bounds.width = (totalwidth) - (minhdelayx1) - 4, \
263		− .cropcap.bounds.height = (sheight) + (vdelay) - MIN_VDELAY, \
	264	+ .cropcap.bounds.height = (sheight) + (extraheight) + (vdelay) - \
	265	+ MIN_VDELAY, \
264	266	.cropcap.defrect.left = hdelayx1, \
265	267	.cropcap.defrect.top = (videostart0) * 2, \
266	268	.cropcap.defrect.width = swidth, \
@@ -301,9 +303,10 @@ const struct bttv_tvnorm bttv_tvnorms[] = { · 34 unmodified lines
301	303	/* totalwidth */ 1135,
302	304	/* sqwidth */ 944,
303	305	/* vdelay */ 0x20,
304		− /* bt878 (and bt848?) can capture another
305		− line below active video. */
306		− /* sheight */ (576 + 2) + 0x20 - 2,
	306	+ /* sheight */ 576,
	307	+ /* bt878 (and bt848?) can capture another
	308	+ line below active video. */
	309	+ /* extraheight */ 2,
307	310	/* videostart0 */ 23)
308	311	},{
309	312	.v4l2_id = V4L2_STD_NTSC_M \| V4L2_STD_NTSC_M_KR,
@@ -330,6 +333,7 @@ const struct bttv_tvnorm bttv_tvnorms[] = { · 20 unmodified lines
330	333	/* sqwidth */ 780,
331	334	/* vdelay */ 0x1a,
332	335	/* sheight */ 480,
	336	+ /* extraheight */ 0,
333	337	/* videostart0 */ 23)
334	338	},{
335	339	.v4l2_id = V4L2_STD_SECAM,
@@ -355,6 +359,7 @@ const struct bttv_tvnorm bttv_tvnorms[] = { · 19 unmodified lines
355	359	/* sqwidth */ 944,
356	360	/* vdelay */ 0x20,
357	361	/* sheight */ 576,
	362	+ /* extraheight */ 0,
358	363	/* videostart0 */ 23)
359	364	},{
360	365	.v4l2_id = V4L2_STD_PAL_Nc,
@@ -380,6 +385,7 @@ const struct bttv_tvnorm bttv_tvnorms[] = { · 19 unmodified lines
380	385	/* sqwidth */ 780,
381	386	/* vdelay */ 0x1a,
382	387	/* sheight */ 576,
	388	+ /* extraheight */ 0,
383	389	/* videostart0 */ 23)
384	390	},{
385	391	.v4l2_id = V4L2_STD_PAL_M,
@@ -405,6 +411,7 @@ const struct bttv_tvnorm bttv_tvnorms[] = { · 19 unmodified lines
405	411	/* sqwidth */ 780,
406	412	/* vdelay */ 0x1a,
407	413	/* sheight */ 480,
	414	+ /* extraheight */ 0,
408	415	/* videostart0 */ 23)
409	416	},{
410	417	.v4l2_id = V4L2_STD_PAL_N,
@@ -430,6 +437,7 @@ const struct bttv_tvnorm bttv_tvnorms[] = { · 19 unmodified lines
430	437	/* sqwidth */ 944,
431	438	/* vdelay */ 0x20,
432	439	/* sheight */ 576,
	440	+ /* extraheight */ 0,
433	441	/* videostart0 */ 23)
434	442	},{
435	443	.v4l2_id = V4L2_STD_NTSC_M_JP,
@@ -455,6 +463,7 @@ const struct bttv_tvnorm bttv_tvnorms[] = { · 19 unmodified lines
455	463	/* sqwidth */ 780,
456	464	/* vdelay */ 0x16,
457	465	/* sheight */ 480,
	466	+ /* extraheight */ 0,
458	467	/* videostart0 */ 23)
459	468	},{
460	469	/* that one hopefully works with the strange timing
@@ -484,6 +493,7 @@ const struct bttv_tvnorm bttv_tvnorms[] = { · 23 unmodified lines
484	493	/* sqwidth */ 944,
485	494	/* vdelay */ 0x1a,
486	495	/* sheight */ 480,
	496	+ /* extraheight */ 0,
487	497	/* videostart0 */ 23)
488	498	}
489	499	};

drivers/media/platform/Kconfig+1−1

@@ -204,7 +204,7 @@ config VIDEO_SAMSUNG_EXYNOS_GSC · 203 unmodified lines
204	204
205	205	config VIDEO_SH_VEU
206	206	tristate "SuperH VEU mem2mem video processing driver"
207		− depends on VIDEO_DEV && VIDEO_V4L2
	207	+ depends on VIDEO_DEV && VIDEO_V4L2 && GENERIC_HARDIRQS
208	208	select VIDEOBUF2_DMA_CONTIG
209	209	select V4L2_MEM2MEM_DEV
210	210	help

drivers/media/platform/exynos-gsc/gsc-core.c+5−3

@@ -1054,16 +1054,18 @@ static int gsc_m2m_suspend(struct gsc_dev *gsc) · 1053 unmodified lines
1054	1054
1055	1055	static int gsc_m2m_resume(struct gsc_dev *gsc)
1056	1056	{
	1057	+ struct gsc_ctx *ctx;
1057	1058	unsigned long flags;
1058	1059
1059	1060	spin_lock_irqsave(&gsc->slock, flags);
1060	1061	/* Clear for full H/W setup in first run after resume */
	1062	+ ctx = gsc->m2m.ctx;
1061	1063	gsc->m2m.ctx = NULL;
1062	1064	spin_unlock_irqrestore(&gsc->slock, flags);
1063	1065
1064	1066	if (test_and_clear_bit(ST_M2M_SUSPENDED, &gsc->state))
1065		− gsc_m2m_job_finish(gsc->m2m.ctx,
1066		− VB2_BUF_STATE_ERROR);
	1067	+ gsc_m2m_job_finish(ctx, VB2_BUF_STATE_ERROR);
	1068	+
1067	1069	return 0;
1068	1070	}
1069	1071
@@ -1204,7 +1206,7 @@ static int gsc_resume(struct device *dev) · 134 unmodified lines
1204	1206	/* Do not resume if the device was idle before system suspend */
1205	1207	spin_lock_irqsave(&gsc->slock, flags);
1206	1208	if (!test_and_clear_bit(ST_SUSPEND, &gsc->state) \|\|
1207		− !gsc_m2m_active(gsc)) {
	1209	+ !gsc_m2m_opened(gsc)) {
1208	1210	spin_unlock_irqrestore(&gsc->slock, flags);
1209	1211	return 0;
1210	1212	}

drivers/media/platform/s5p-fimc/fimc-core.c+4−2

@@ -850,16 +850,18 @@ static int fimc_m2m_suspend(struct fimc_dev *fimc) · 849 unmodified lines
850	850
851	851	static int fimc_m2m_resume(struct fimc_dev *fimc)
852	852	{
	853	+ struct fimc_ctx *ctx;
853	854	unsigned long flags;
854	855
855	856	spin_lock_irqsave(&fimc->slock, flags);
856	857	/* Clear for full H/W setup in first run after resume */
	858	+ ctx = fimc->m2m.ctx;
857	859	fimc->m2m.ctx = NULL;
858	860	spin_unlock_irqrestore(&fimc->slock, flags);
859	861
860	862	if (test_and_clear_bit(ST_M2M_SUSPENDED, &fimc->state))
861		− fimc_m2m_job_finish(fimc->m2m.ctx,
862		− VB2_BUF_STATE_ERROR);
	863	+ fimc_m2m_job_finish(ctx, VB2_BUF_STATE_ERROR);
	864	+
863	865	return 0;
864	866	}
865	867

drivers/media/platform/s5p-fimc/fimc-lite-reg.c+4−4

@@ -128,10 +128,10 @@ static const u32 src_pixfmt_map[8][3] = { · 127 unmodified lines
128	128	void flite_hw_set_source_format(struct fimc_lite dev, struct flite_frame f)
129	129	{
130	130	enum v4l2_mbus_pixelcode pixelcode = dev->fmt->mbus_code;
131		− unsigned int i = ARRAY_SIZE(src_pixfmt_map);
	131	+ int i = ARRAY_SIZE(src_pixfmt_map);
132	132	u32 cfg;
133	133
134		− while (i-- >= 0) {
	134	+ while (--i >= 0) {
135	135	if (src_pixfmt_map[i][0] == pixelcode)
136	136	break;
137	137	}
@@ -224,9 +224,9 @@ static void flite_hw_set_out_order(struct fimc_lite dev, struct flite_frame f) · 86 unmodified lines
224	224	{ V4L2_MBUS_FMT_VYUY8_2X8, FLITE_REG_CIODMAFMT_CRYCBY },
225	225	};
226	226	u32 cfg = readl(dev->regs + FLITE_REG_CIODMAFMT);
227		− unsigned int i = ARRAY_SIZE(pixcode);
	227	+ int i = ARRAY_SIZE(pixcode);
228	228
229		− while (i-- >= 0)
	229	+ while (--i >= 0)
230	230	if (pixcode[i][0] == dev->fmt->mbus_code)
231	231	break;
232	232	cfg &= ~FLITE_REG_CIODMAFMT_YCBCR_ORDER_MASK;

drivers/media/platform/s5p-fimc/fimc-lite.c+1−0

@@ -1408,6 +1408,7 @@ static const struct v4l2_ctrl_config fimc_lite_ctrl = { · 1407 unmodified lines
1408	1408	.id = V4L2_CTRL_CLASS_USER \| 0x1001,
1409	1409	.type = V4L2_CTRL_TYPE_BOOLEAN,
1410	1410	.name = "Test Pattern 640x480",
	1411	+ .step = 1,
1411	1412	};
1412	1413
1413	1414	static int fimc_lite_create_capture_subdev(struct fimc_lite *fimc)

drivers/media/platform/s5p-fimc/fimc-mdevice.c+19−20

@@ -827,7 +827,7 @@ static int fimc_md_link_notify(struct media_pad *source, · 826 unmodified lines
827	827	struct fimc_pipeline *pipeline;
828	828	struct v4l2_subdev *sd;
829	829	struct mutex *lock;
830		− int ret = 0;
	830	+ int i, ret = 0;
831	831	int ref_count;
832	832
833	833	if (media_entity_type(sink->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
@@ -854,29 +854,28 @@ static int fimc_md_link_notify(struct media_pad *source, · 20 unmodified lines
854	854	return 0;
855	855	}
856	856
	857	+ mutex_lock(lock);
	858	+ ref_count = fimc ? fimc->vid_cap.refcnt : fimc_lite->ref_count;
	859	+
857	860	if (!(flags & MEDIA_LNK_FL_ENABLED)) {
858		− int i;
859		− mutex_lock(lock);
860		− ret = __fimc_pipeline_close(pipeline);
	861	+ if (ref_count > 0) {
	862	+ ret = __fimc_pipeline_close(pipeline);
	863	+ if (!ret && fimc)
	864	+ fimc_ctrls_delete(fimc->vid_cap.ctx);
	865	+ }
861	866	for (i = 0; i < IDX_MAX; i++)
862	867	pipeline->subdevs[i] = NULL;
863		− if (fimc)
864		− fimc_ctrls_delete(fimc->vid_cap.ctx);
865		− mutex_unlock(lock);
866		− return ret;
	868	+ } else if (ref_count > 0) {
	869	+ /*
	870	+ * Link activation. Enable power of pipeline elements only if
	871	+ * the pipeline is already in use, i.e. its video node is open.
	872	+ * Recreate the controls destroyed during the link deactivation.
	873	+ */
	874	+ ret = __fimc_pipeline_open(pipeline,
	875	+ source->entity, true);
	876	+ if (!ret && fimc)
	877	+ ret = fimc_capture_ctrls_create(fimc);
867	878	}
868		− /*
869		− * Link activation. Enable power of pipeline elements only if the
870		− * pipeline is already in use, i.e. its video node is opened.
871		− * Recreate the controls destroyed during the link deactivation.
872		− */
873		− mutex_lock(lock);
874		−
875		− ref_count = fimc ? fimc->vid_cap.refcnt : fimc_lite->ref_count;
876		− if (ref_count > 0)
877		− ret = __fimc_pipeline_open(pipeline, source->entity, true);
878		− if (!ret && fimc)
879		− ret = fimc_capture_ctrls_create(fimc);
880	879
881	880	mutex_unlock(lock);
882	881	return ret ? -EPIPE : ret;

drivers/media/platform/s5p-mfc/s5p_mfc.c+1−1

@@ -276,7 +276,7 @@ static void s5p_mfc_handle_frame_new(struct s5p_mfc_ctx *ctx, unsigned int err) · 275 unmodified lines
276	276	unsigned int frame_type;
277	277
278	278	dspl_y_addr = s5p_mfc_hw_call(dev->mfc_ops, get_dspl_y_adr, dev);
279		− frame_type = s5p_mfc_hw_call(dev->mfc_ops, get_dec_frame_type, dev);
	279	+ frame_type = s5p_mfc_hw_call(dev->mfc_ops, get_disp_frame_type, ctx);
280	280
281	281	/* If frame is same as previous then skip and do not dequeue */
282	282	if (frame_type == S5P_FIMV_DECODE_FRAME_SKIPPED) {

drivers/media/platform/s5p-mfc/s5p_mfc_enc.c+1−0

@@ -232,6 +232,7 @@ static struct mfc_control controls[] = { · 231 unmodified lines
232	232	.minimum = 0,
233	233	.maximum = 1,
234	234	.default_value = 0,
	235	+ .step = 1,
235	236	.menu_skip_mask = 0,
236	237	},
237	238	{

drivers/media/radio/radio-ma901.c+11−0

@@ -347,9 +347,20 @@ static void usb_ma901radio_release(struct v4l2_device *v4l2_dev) · 346 unmodified lines
347	347	static int usb_ma901radio_probe(struct usb_interface *intf,
348	348	const struct usb_device_id *id)
349	349	{
	350	+ struct usb_device *dev = interface_to_usbdev(intf);
350	351	struct ma901radio_device *radio;
351	352	int retval = 0;
352	353
	354	+ /* Masterkit MA901 usb radio has the same USB ID as many others
	355	+ * Atmel V-USB devices. Let's make additional checks to be sure
	356	+ * that this is our device.
	357	+ */
	358	+
	359	+ if (dev->product && dev->manufacturer &&
	360	+ (strncmp(dev->product, "MA901", 5) != 0
	361	+ \|\| strncmp(dev->manufacturer, "www.masterkit.ru", 16) != 0))
	362	+ return -ENODEV;
	363	+
353	364	radio = kzalloc(sizeof(struct ma901radio_device), GFP_KERNEL);
354	365	if (!radio) {
355	366	dev_err(&intf->dev, "kzalloc for ma901radio_device failed\n");

drivers/media/rc/Kconfig+1−1

@@ -291,7 +291,7 @@ config IR_TTUSBIR · 290 unmodified lines
291	291
292	292	config IR_RX51
293	293	tristate "Nokia N900 IR transmitter diode"
294		− depends on OMAP_DM_TIMER && LIRC && !ARCH_MULTIPLATFORM
	294	+ depends on OMAP_DM_TIMER && ARCH_OMAP2PLUS && LIRC && !ARCH_MULTIPLATFORM
295	295	---help---
296	296	Say Y or M here if you want to enable support for the IR
297	297	transmitter diode built in the Nokia N900 (RX51) device.

drivers/media/v4l2-core/Makefile+1−1

@@ -10,7 +10,7 @@ ifeq ($(CONFIG_COMPAT),y) · 9 unmodified lines
10	10	videodev-objs += v4l2-compat-ioctl32.o
11	11	endif
12	12
13		−obj-$(CONFIG_VIDEO_DEV) += videodev.o
	13	+obj-$(CONFIG_VIDEO_V4L2) += videodev.o
14	14	obj-$(CONFIG_VIDEO_V4L2_INT_DEVICE) += v4l2-int-device.o
15	15	obj-$(CONFIG_VIDEO_V4L2) += v4l2-common.o
16	16

drivers/mfd/Kconfig+1−0

@@ -858,6 +858,7 @@ config EZX_PCAP · 857 unmodified lines
858	858	config AB8500_CORE
859	859	bool "ST-Ericsson AB8500 Mixed Signal Power Management chip"
860	860	depends on GENERIC_HARDIRQS && ABX500_CORE && MFD_DB8500_PRCMU
	861	+ select POWER_SUPPLY
861	862	select MFD_CORE
862	863	select IRQ_DOMAIN
863	864	help

drivers/mfd/ab8500-gpadc.c+13−4

@@ -594,9 +594,12 @@ static int ab8500_gpadc_runtime_suspend(struct device *dev) · 593 unmodified lines
594	594	static int ab8500_gpadc_runtime_resume(struct device *dev)
595	595	{
596	596	struct ab8500_gpadc *gpadc = dev_get_drvdata(dev);
	597	+ int ret;
597	598
598		− regulator_enable(gpadc->regu);
599		− return 0;
	599	+ ret = regulator_enable(gpadc->regu);
	600	+ if (ret)
	601	+ dev_err(dev, "Failed to enable vtvout LDO: %d\n", ret);
	602	+ return ret;
600	603	}
601	604
602	605	static int ab8500_gpadc_runtime_idle(struct device *dev)
@@ -643,7 +646,7 @@ static int ab8500_gpadc_probe(struct platform_device *pdev) · 40 unmodified lines
643	646	}
644	647
645	648	/* VTVout LDO used to power up ab8500-GPADC */
646		− gpadc->regu = regulator_get(&pdev->dev, "vddadc");
	649	+ gpadc->regu = devm_regulator_get(&pdev->dev, "vddadc");
647	650	if (IS_ERR(gpadc->regu)) {
648	651	ret = PTR_ERR(gpadc->regu);
649	652	dev_err(gpadc->dev, "failed to get vtvout LDO\n");
@@ -652,7 +655,11 @@ static int ab8500_gpadc_probe(struct platform_device *pdev) · 2 unmodified lines
652	655
653	656	platform_set_drvdata(pdev, gpadc);
654	657
655		− regulator_enable(gpadc->regu);
	658	+ ret = regulator_enable(gpadc->regu);
	659	+ if (ret) {
	660	+ dev_err(gpadc->dev, "Failed to enable vtvout LDO: %d\n", ret);
	661	+ goto fail_enable;
	662	+ }
656	663
657	664	pm_runtime_set_autosuspend_delay(gpadc->dev, GPADC_AUDOSUSPEND_DELAY);
658	665	pm_runtime_use_autosuspend(gpadc->dev);
@@ -663,6 +670,8 @@ static int ab8500_gpadc_probe(struct platform_device *pdev) · 4 unmodified lines
663	670	list_add_tail(&gpadc->node, &ab8500_gpadc_list);
664	671	dev_dbg(gpadc->dev, "probe success\n");
665	672	return 0;
	673	+
	674	+fail_enable:
666	675	fail_irq:
667	676	free_irq(gpadc->irq, gpadc);
668	677	fail:

drivers/mfd/omap-usb-host.c+3−3

@@ -460,15 +460,15 @@ static void omap_usbhs_init(struct device *dev) · 459 unmodified lines
460	460
461	461	switch (omap->usbhs_rev) {
462	462	case OMAP_USBHS_REV1:
463		− omap_usbhs_rev1_hostconfig(omap, reg);
	463	+ reg = omap_usbhs_rev1_hostconfig(omap, reg);
464	464	break;
465	465
466	466	case OMAP_USBHS_REV2:
467		− omap_usbhs_rev2_hostconfig(omap, reg);
	467	+ reg = omap_usbhs_rev2_hostconfig(omap, reg);
468	468	break;
469	469
470	470	default: /* newer revisions */
471		− omap_usbhs_rev2_hostconfig(omap, reg);
	471	+ reg = omap_usbhs_rev2_hostconfig(omap, reg);
472	472	break;
473	473	}
474	474

drivers/mfd/palmas.c+33−3

@@ -257,9 +257,24 @@ static struct regmap_irq_chip palmas_irq_chip = { · 256 unmodified lines
257	257	PALMAS_INT1_MASK),
258	258	};
259	259
260		−static void palmas_dt_to_pdata(struct device_node *node,
	260	+static int palmas_set_pdata_irq_flag(struct i2c_client *i2c,
261	261	struct palmas_platform_data *pdata)
262	262	{
	263	+ struct irq_data *irq_data = irq_get_irq_data(i2c->irq);
	264	+ if (!irq_data) {
	265	+ dev_err(&i2c->dev, "Invalid IRQ: %d\n", i2c->irq);
	266	+ return -EINVAL;
	267	+ }
	268	+
	269	+ pdata->irq_flags = irqd_get_trigger_type(irq_data);
	270	+ dev_info(&i2c->dev, "Irq flag is 0x%08x\n", pdata->irq_flags);
	271	+ return 0;
	272	+}
	273	+
	274	+static void palmas_dt_to_pdata(struct i2c_client *i2c,
	275	+ struct palmas_platform_data *pdata)
	276	+{
	277	+ struct device_node *node = i2c->dev.of_node;
263	278	int ret;
264	279	u32 prop;
265	280
@@ -283,6 +298,8 @@ static void palmas_dt_to_pdata(struct device_node *node, · 17 unmodified lines
283	298	pdata->power_ctrl = PALMAS_POWER_CTRL_NSLEEP_MASK \|
284	299	PALMAS_POWER_CTRL_ENABLE1_MASK \|
285	300	PALMAS_POWER_CTRL_ENABLE2_MASK;
	301	+ if (i2c->irq)
	302	+ palmas_set_pdata_irq_flag(i2c, pdata);
286	303	}
287	304
288	305	static int palmas_i2c_probe(struct i2c_client *i2c,
@@ -304,7 +321,7 @@ static int palmas_i2c_probe(struct i2c_client *i2c, · 15 unmodified lines
304	321	if (!pdata)
305	322	return -ENOMEM;
306	323
307		− palmas_dt_to_pdata(node, pdata);
	324	+ palmas_dt_to_pdata(i2c, pdata);
308	325	}
309	326
310	327	if (!pdata)
@@ -344,6 +361,19 @@ static int palmas_i2c_probe(struct i2c_client *i2c, · 33 unmodified lines
344	361	}
345	362	}
346	363
	364	+ /* Change interrupt line output polarity */
	365	+ if (pdata->irq_flags & IRQ_TYPE_LEVEL_HIGH)
	366	+ reg = PALMAS_POLARITY_CTRL_INT_POLARITY;
	367	+ else
	368	+ reg = 0;
	369	+ ret = palmas_update_bits(palmas, PALMAS_PU_PD_OD_BASE,
	370	+ PALMAS_POLARITY_CTRL, PALMAS_POLARITY_CTRL_INT_POLARITY,
	371	+ reg);
	372	+ if (ret < 0) {
	373	+ dev_err(palmas->dev, "POLARITY_CTRL updat failed: %d\n", ret);
	374	+ goto err;
	375	+ }
	376	+
347	377	/* Change IRQ into clear on read mode for efficiency */
348	378	slave = PALMAS_BASE_TO_SLAVE(PALMAS_INTERRUPT_BASE);
349	379	addr = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE, PALMAS_INT_CTRL);
@@ -352,7 +382,7 @@ static int palmas_i2c_probe(struct i2c_client *i2c, · 2 unmodified lines
352	382	regmap_write(palmas->regmap[slave], addr, reg);
353	383
354	384	ret = regmap_add_irq_chip(palmas->regmap[slave], palmas->irq,
355		− IRQF_ONESHOT \| IRQF_TRIGGER_LOW, 0, &palmas_irq_chip,
	385	+ IRQF_ONESHOT \| pdata->irq_flags, 0, &palmas_irq_chip,
356	386	&palmas->irq_data);
357	387	if (ret < 0)
358	388	goto err;

drivers/mfd/tps65912-core.c+1−0

@@ -169,6 +169,7 @@ err: · 168 unmodified lines
169	169	void tps65912_device_exit(struct tps65912 *tps65912)
170	170	{
171	171	mfd_remove_devices(tps65912->dev);
	172	+ tps65912_irq_exit(tps65912);
172	173	kfree(tps65912);
173	174	}
174	175

drivers/mfd/twl4030-audio.c+1−1

@@ -118,7 +118,7 @@ EXPORT_SYMBOL_GPL(twl4030_audio_enable_resource); · 117 unmodified lines
118	118	* Disable the resource.
119	119	* The function returns with error or the content of the register
120	120	*/
121		−int twl4030_audio_disable_resource(unsigned id)
	121	+int twl4030_audio_disable_resource(enum twl4030_audio_res id)
122	122	{
123	123	struct twl4030_audio *audio = platform_get_drvdata(twl4030_audio_dev);
124	124	int val;

drivers/mfd/twl4030-madc.c+1−1

@@ -800,7 +800,7 @@ static int twl4030_madc_remove(struct platform_device *pdev) · 799 unmodified lines
800	800
801	801	static struct platform_driver twl4030_madc_driver = {
802	802	.probe = twl4030_madc_probe,
803		− .remove = __exit_p(twl4030_madc_remove),
	803	+ .remove = twl4030_madc_remove,
804	804	.driver = {
805	805	.name = "twl4030_madc",
806	806	.owner = THIS_MODULE,

drivers/misc/mei/hw-me.c+20−9

@@ -151,6 +151,20 @@ static void mei_me_intr_disable(struct mei_device *dev) · 150 unmodified lines
151	151	mei_hcsr_set(hw, hcsr);
152	152	}
153	153
	154	+/**
	155	+ * mei_me_hw_reset_release - release device from the reset
	156	+ *
	157	+ * @dev: the device structure
	158	+ */
	159	+static void mei_me_hw_reset_release(struct mei_device *dev)
	160	+{
	161	+ struct mei_me_hw *hw = to_me_hw(dev);
	162	+ u32 hcsr = mei_hcsr_read(hw);
	163	+
	164	+ hcsr \|= H_IG;
	165	+ hcsr &= ~H_RST;
	166	+ mei_hcsr_set(hw, hcsr);
	167	+}
154	168	/**
155	169	* mei_me_hw_reset - resets fw via mei csr register.
156	170	*
@@ -169,18 +183,14 @@ static void mei_me_hw_reset(struct mei_device *dev, bool intr_enable) · 12 unmodified lines
169	183	if (intr_enable)
170	184	hcsr \|= H_IE;
171	185	else
172		− hcsr &= ~H_IE;
173		−
174		− mei_hcsr_set(hw, hcsr);
175		−
176		− hcsr = mei_hcsr_read(hw) \| H_IG;
177		− hcsr &= ~H_RST;
	186	+ hcsr \|= ~H_IE;
178	187
179	188	mei_hcsr_set(hw, hcsr);
180	189
181		− hcsr = mei_hcsr_read(hw);
	190	+ if (dev->dev_state == MEI_DEV_POWER_DOWN)
	191	+ mei_me_hw_reset_release(dev);
182	192
183		− dev_dbg(&dev->pdev->dev, "current HCSR = 0x%08x.\n", hcsr);
	193	+ dev_dbg(&dev->pdev->dev, "current HCSR = 0x%08x.\n", mei_hcsr_read(hw));
184	194	}
185	195
186	196	/**
@@ -466,7 +476,8 @@ irqreturn_t mei_me_irq_thread_handler(int irq, void *dev_id) · 279 unmodified lines
466	476	mutex_unlock(&dev->device_lock);
467	477	return IRQ_HANDLED;
468	478	} else {
469		− dev_dbg(&dev->pdev->dev, "FW not ready.\n");
	479	+ dev_dbg(&dev->pdev->dev, "Reset Completed.\n");
	480	+ mei_me_hw_reset_release(dev);
470	481	mutex_unlock(&dev->device_lock);
471	482	return IRQ_HANDLED;
472	483	}

drivers/misc/mei/init.c+18−0

@@ -183,6 +183,24 @@ void mei_reset(struct mei_device *dev, int interrupts_enabled) · 182 unmodified lines
183	183	mei_cl_all_write_clear(dev);
184	184	}
185	185
	186	+void mei_stop(struct mei_device *dev)
	187	+{
	188	+ dev_dbg(&dev->pdev->dev, "stopping the device.\n");
	189	+
	190	+ mutex_lock(&dev->device_lock);
	191	+
	192	+ cancel_delayed_work(&dev->timer_work);
	193	+
	194	+ mei_wd_stop(dev);
	195	+
	196	+ dev->dev_state = MEI_DEV_POWER_DOWN;
	197	+ mei_reset(dev, 0);
	198	+
	199	+ mutex_unlock(&dev->device_lock);
	200	+
	201	+ flush_scheduled_work();
	202	+}
	203	+
186	204
187	205
188	206

drivers/misc/mei/mei_dev.h+1−0

@@ -381,6 +381,7 @@ static inline unsigned long mei_secs_to_jiffies(unsigned long sec) · 380 unmodified lines
381	381	void mei_device_init(struct mei_device *dev);
382	382	void mei_reset(struct mei_device *dev, int interrupts);
383	383	int mei_hw_init(struct mei_device *dev);
	384	+void mei_stop(struct mei_device *dev);
384	385
385	386	/*
386	387	* MEI interrupt functions prototype

drivers/misc/mei/pci-me.c+7−45

@@ -247,44 +247,14 @@ static void mei_remove(struct pci_dev *pdev) · 246 unmodified lines
247	247
248	248	hw = to_me_hw(dev);
249	249
250		− mutex_lock(&dev->device_lock);
251		−
252		− cancel_delayed_work(&dev->timer_work);
253	250
254		− mei_wd_stop(dev);
	251	+ dev_err(&pdev->dev, "stop\n");
	252	+ mei_stop(dev);
255	253
256	254	mei_pdev = NULL;
257	255
258		− if (dev->iamthif_cl.state == MEI_FILE_CONNECTED) {
259		− dev->iamthif_cl.state = MEI_FILE_DISCONNECTING;
260		− mei_cl_disconnect(&dev->iamthif_cl);
261		− }
262		− if (dev->wd_cl.state == MEI_FILE_CONNECTED) {
263		− dev->wd_cl.state = MEI_FILE_DISCONNECTING;
264		− mei_cl_disconnect(&dev->wd_cl);
265		− }
266		−
267		− /* Unregistering watchdog device */
268	256	mei_watchdog_unregister(dev);
269	257
270		− /* remove entry if already in list */
271		− dev_dbg(&pdev->dev, "list del iamthif and wd file list.\n");
272		−
273		− if (dev->open_handle_count > 0)
274		− dev->open_handle_count--;
275		− mei_cl_unlink(&dev->wd_cl);
276		−
277		− if (dev->open_handle_count > 0)
278		− dev->open_handle_count--;
279		− mei_cl_unlink(&dev->iamthif_cl);
280		−
281		− dev->iamthif_current_cb = NULL;
282		− dev->me_clients_num = 0;
283		−
284		− mutex_unlock(&dev->device_lock);
285		−
286		− flush_scheduled_work();
287		−
288	258	/* disable interrupts */
289	259	mei_disable_interrupts(dev);
290	260
@@ -308,28 +278,20 @@ static int mei_pci_suspend(struct device *device) · 17 unmodified lines
308	278	{
309	279	struct pci_dev *pdev = to_pci_dev(device);
310	280	struct mei_device *dev = pci_get_drvdata(pdev);
311		− int err;
312	281
313	282	if (!dev)
314	283	return -ENODEV;
315		− mutex_lock(&dev->device_lock);
316	284
317		− cancel_delayed_work(&dev->timer_work);
	285	+ dev_err(&pdev->dev, "suspend\n");
318	286
319		− /* Stop watchdog if exists */
320		− err = mei_wd_stop(dev);
321		− /* Set new mei state */
322		− if (dev->dev_state == MEI_DEV_ENABLED \|\|
323		− dev->dev_state == MEI_DEV_RECOVERING_FROM_RESET) {
324		− dev->dev_state = MEI_DEV_POWER_DOWN;
325		− mei_reset(dev, 0);
326		− }
327		− mutex_unlock(&dev->device_lock);
	287	+ mei_stop(dev);
	288	+
	289	+ mei_disable_interrupts(dev);
328	290
329	291	free_irq(pdev->irq, dev);
330	292	pci_disable_msi(pdev);
331	293
332		− return err;
	294	+ return 0;
333	295	}
334	296
335	297	static int mei_pci_resume(struct device *device)

drivers/misc/vmw_vmci/Kconfig+1−1

@@ -4,7 +4,7 @@ · 3 unmodified lines
4	4
5	5	config VMWARE_VMCI
6	6	tristate "VMware VMCI Driver"
7		− depends on X86 && PCI
	7	+ depends on X86 && PCI && NET
8	8	help
9	9	This is VMware's Virtual Machine Communication Interface. It enables
10	10	high-speed communication between host and guest in a virtual

drivers/misc/vmw_vmci/vmci_datagram.c+3−1

@@ -42,9 +42,11 @@ struct datagram_entry { · 41 unmodified lines
42	42
43	43	struct delayed_datagram_info {
44	44	struct datagram_entry *entry;
45		− struct vmci_datagram msg;
46	45	struct work_struct work;
47	46	bool in_dg_host_queue;
	47	+ /* msg and msg_payload must be together. */
	48	+ struct vmci_datagram msg;
	49	+ u8 msg_payload[];
48	50	};
49	51
50	52	/* Number of in-flight host->host datagrams */

drivers/mtd/bcm47xxpart.c+33−19

@@ -19,6 +19,12 @@ · 18 unmodified lines
19	19	/* 10 parts were found on sflash on Netgear WNDR4500 */
20	20	#define BCM47XXPART_MAX_PARTS 12
21	21
	22	+/*
	23	+ * Amount of bytes we read when analyzing each block of flash memory.
	24	+ * Set it big enough to allow detecting partition and reading important data.
	25	+ */
	26	+#define BCM47XXPART_BYTES_TO_READ 0x404
	27	+
22	28	/* Magics */
23	29	#define BOARD_DATA_MAGIC 0x5246504D /* MPFR */
24	30	#define POT_MAGIC1 0x54544f50 /* POTT */
@@ -57,17 +63,15 @@ static int bcm47xxpart_parse(struct mtd_info *master, · 32 unmodified lines
57	63	struct trx_header *trx;
58	64	int trx_part = -1;
59	65	int last_trx_part = -1;
60		− int max_bytes_to_read = 0x8004;
	66	+ int possible_nvram_sizes[] = { 0x8000, 0xF000, 0x10000, };
61	67
62	68	if (blocksize <= 0x10000)
63	69	blocksize = 0x10000;
64		− if (blocksize == 0x20000)
65		− max_bytes_to_read = 0x18004;
66	70
67	71	/* Alloc */
68	72	parts = kzalloc(sizeof(struct mtd_partition) * BCM47XXPART_MAX_PARTS,
69	73	GFP_KERNEL);
70		− buf = kzalloc(max_bytes_to_read, GFP_KERNEL);
	74	+ buf = kzalloc(BCM47XXPART_BYTES_TO_READ, GFP_KERNEL);
71	75
72	76	/* Parse block by block looking for magics */
73	77	for (offset = 0; offset <= master->size - blocksize;
@@ -82,7 +86,7 @@ static int bcm47xxpart_parse(struct mtd_info *master, · 8 unmodified lines
82	86	}
83	87
84	88	/* Read beginning of the block */
85		− if (mtd_read(master, offset, max_bytes_to_read,
	89	+ if (mtd_read(master, offset, BCM47XXPART_BYTES_TO_READ,
86	90	&bytes_read, (uint8_t *)buf) < 0) {
87	91	pr_err("mtd_read error while parsing (offset: 0x%X)!\n",
88	92	offset);
@@ -96,20 +100,6 @@ static int bcm47xxpart_parse(struct mtd_info *master, · 7 unmodified lines
96	100	continue;
97	101	}
98	102
99		− /* Standard NVRAM */
100		− if (buf[0x000 / 4] == NVRAM_HEADER \|\|
101		− buf[0x1000 / 4] == NVRAM_HEADER \|\|
102		− buf[0x8000 / 4] == NVRAM_HEADER \|\|
103		− (blocksize == 0x20000 && (
104		− buf[0x10000 / 4] == NVRAM_HEADER \|\|
105		− buf[0x11000 / 4] == NVRAM_HEADER \|\|
106		− buf[0x18000 / 4] == NVRAM_HEADER))) {
107		− bcm47xxpart_add_part(&parts[curr_part++], "nvram",
108		− offset, 0);
109		− offset = rounddown(offset, blocksize);
110		− continue;
111		− }
112		−
113	103	/*
114	104	* board_data starts with board_id which differs across boards,
115	105	* but we can use 'MPFR' (hopefully) magic at 0x100
@@ -178,6 +168,30 @@ static int bcm47xxpart_parse(struct mtd_info *master, · 62 unmodified lines
178	168	continue;
179	169	}
180	170	}
	171	+
	172	+ /* Look for NVRAM at the end of the last block. */
	173	+ for (i = 0; i < ARRAY_SIZE(possible_nvram_sizes); i++) {
	174	+ if (curr_part > BCM47XXPART_MAX_PARTS) {
	175	+ pr_warn("Reached maximum number of partitions, scanning stopped!\n");
	176	+ break;
	177	+ }
	178	+
	179	+ offset = master->size - possible_nvram_sizes[i];
	180	+ if (mtd_read(master, offset, 0x4, &bytes_read,
	181	+ (uint8_t *)buf) < 0) {
	182	+ pr_err("mtd_read error while reading at offset 0x%X!\n",
	183	+ offset);
	184	+ continue;
	185	+ }
	186	+
	187	+ /* Standard NVRAM */
	188	+ if (buf[0] == NVRAM_HEADER) {
	189	+ bcm47xxpart_add_part(&parts[curr_part++], "nvram",
	190	+ master->size - blocksize, 0);
	191	+ break;
	192	+ }
	193	+ }
	194	+
181	195	kfree(buf);
182	196
183	197	/*

drivers/mtd/mtdchar.c+2−57

@@ -1123,33 +1123,6 @@ static unsigned long mtdchar_get_unmapped_area(struct file *file, · 1122 unmodified lines
1123	1123	}
1124	1124	#endif
1125	1125
1126		−static inline unsigned long get_vm_size(struct vm_area_struct *vma)
1127		−{
1128		− return vma->vm_end - vma->vm_start;
1129		−}
1130		−
1131		−static inline resource_size_t get_vm_offset(struct vm_area_struct *vma)
1132		−{
1133		− return (resource_size_t) vma->vm_pgoff << PAGE_SHIFT;
1134		−}
1135		−
1136		−/*
1137		− * Set a new vm offset.
1138		− *
1139		− * Verify that the incoming offset really works as a page offset,
1140		− * and that the offset and size fit in a resource_size_t.
1141		− */
1142		−static inline int set_vm_offset(struct vm_area_struct *vma, resource_size_t off)
1143		−{
1144		− pgoff_t pgoff = off >> PAGE_SHIFT;
1145		− if (off != (resource_size_t) pgoff << PAGE_SHIFT)
1146		− return -EINVAL;
1147		− if (off + get_vm_size(vma) - 1 < off)
1148		− return -EINVAL;
1149		− vma->vm_pgoff = pgoff;
1150		− return 0;
1151		−}
1152		−
1153	1126	/*
1154	1127	* set up a mapping for shared memory segments
1155	1128	*/
@@ -1159,45 +1132,17 @@ static int mtdchar_mmap(struct file file, struct vm_area_struct vma) · 3 unmodified lines
1159	1132	struct mtd_file_info *mfi = file->private_data;
1160	1133	struct mtd_info *mtd = mfi->mtd;
1161	1134	struct map_info *map = mtd->priv;
1162		− resource_size_t start, off;
1163		− unsigned long len, vma_len;
1164	1135
1165	1136	/* This is broken because it assumes the MTD device is map-based
1166	1137	and that mtd->priv is a valid struct map_info. It should be
1167	1138	replaced with something that uses the mtd_get_unmapped_area()
1168	1139	operation properly. */
1169	1140	if (0 /mtd->type == MTD_RAM \|\| mtd->type == MTD_ROM/) {
1170		− off = get_vm_offset(vma);
1171		− start = map->phys;
1172		− len = PAGE_ALIGN((start & ~PAGE_MASK) + map->size);
1173		− start &= PAGE_MASK;
1174		− vma_len = get_vm_size(vma);
1175		−
1176		− /* Overflow in off+len? */
1177		− if (vma_len + off < off)
1178		− return -EINVAL;
1179		− /* Does it fit in the mapping? */
1180		− if (vma_len + off > len)
1181		− return -EINVAL;
1182		−
1183		− off += start;
1184		− /* Did that overflow? */
1185		− if (off < start)
1186		− return -EINVAL;
1187		− if (set_vm_offset(vma, off) < 0)
1188		− return -EINVAL;
1189		− vma->vm_flags \|= VM_IO \| VM_DONTEXPAND \| VM_DONTDUMP;
1190		−
1191	1141	#ifdef pgprot_noncached
1192		− if (file->f_flags & O_DSYNC \|\| off >= __pa(high_memory))
	1142	+ if (file->f_flags & O_DSYNC \|\| map->phys >= __pa(high_memory))
1193	1143	vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1194	1144	#endif
1195		− if (io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT,
1196		− vma->vm_end - vma->vm_start,
1197		− vma->vm_page_prot))
1198		− return -EAGAIN;
1199		−
1200		− return 0;
	1145	+ return vm_iomap_memory(vma, map->phys, map->size);
1201	1146	}
1202	1147	return -ENOSYS;
1203	1148	#else

drivers/mtd/nand/nand_base.c+16−0

@@ -1523,6 +1523,14 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from, · 1522 unmodified lines
1523	1523	oobreadlen -= toread;
1524	1524	}
1525	1525	}
	1526	+
	1527	+ if (chip->options & NAND_NEED_READRDY) {
	1528	+ /* Apply delay or wait for ready/busy pin */
	1529	+ if (!chip->dev_ready)
	1530	+ udelay(chip->chip_delay);
	1531	+ else
	1532	+ nand_wait_ready(mtd);
	1533	+ }
1526	1534	} else {
1527	1535	memcpy(buf, chip->buffers->databuf + col, bytes);
1528	1536	buf += bytes;
@@ -1787,6 +1795,14 @@ static int nand_do_read_oob(struct mtd_info *mtd, loff_t from, · 258 unmodified lines
1787	1795	len = min(len, readlen);
1788	1796	buf = nand_transfer_oob(chip, buf, ops, len);
1789	1797
	1798	+ if (chip->options & NAND_NEED_READRDY) {
	1799	+ /* Apply delay or wait for ready/busy pin */
	1800	+ if (!chip->dev_ready)
	1801	+ udelay(chip->chip_delay);
	1802	+ else
	1803	+ nand_wait_ready(mtd);
	1804	+ }
	1805	+
1790	1806	readlen -= len;
1791	1807	if (!readlen)
1792	1808	break;

drivers/mtd/nand/nand_ids.c+41−39

@@ -22,49 +22,51 @@ · 21 unmodified lines
22	22	* 512 512 Byte page size
23	23	*/
24	24	struct nand_flash_dev nand_flash_ids[] = {
	25	+#define SP_OPTIONS NAND_NEED_READRDY
	26	+#define SP_OPTIONS16 (SP_OPTIONS \| NAND_BUSWIDTH_16)
25	27
26	28	#ifdef CONFIG_MTD_NAND_MUSEUM_IDS
27		− {"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0},
28		− {"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0},
29		− {"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, 0},
30		− {"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, 0},
31		− {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, 0},
32		− {"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, 0},
33		− {"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, 0},
34		− {"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, 0},
35		− {"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, 0},
36		− {"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, 0},
37		−
38		− {"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, 0},
39		− {"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, 0},
40		− {"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16},
41		− {"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16},
	29	+ {"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, SP_OPTIONS},
	30	+ {"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, SP_OPTIONS},
	31	+ {"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, SP_OPTIONS},
	32	+ {"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, SP_OPTIONS},
	33	+ {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, SP_OPTIONS},
	34	+ {"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, SP_OPTIONS},
	35	+ {"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, SP_OPTIONS},
	36	+ {"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, SP_OPTIONS},
	37	+ {"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, SP_OPTIONS},
	38	+ {"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, SP_OPTIONS},
	39	+
	40	+ {"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, SP_OPTIONS},
	41	+ {"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, SP_OPTIONS},
	42	+ {"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, SP_OPTIONS16},
	43	+ {"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, SP_OPTIONS16},
42	44	#endif
43	45
44		− {"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, 0},
45		− {"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, 0},
46		− {"NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16},
47		− {"NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16},
48		−
49		− {"NAND 32MiB 1,8V 8-bit", 0x35, 512, 32, 0x4000, 0},
50		− {"NAND 32MiB 3,3V 8-bit", 0x75, 512, 32, 0x4000, 0},
51		− {"NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16},
52		− {"NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16},
53		−
54		− {"NAND 64MiB 1,8V 8-bit", 0x36, 512, 64, 0x4000, 0},
55		− {"NAND 64MiB 3,3V 8-bit", 0x76, 512, 64, 0x4000, 0},
56		− {"NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16},
57		− {"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16},
58		−
59		− {"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, 0},
60		− {"NAND 128MiB 1,8V 8-bit", 0x39, 512, 128, 0x4000, 0},
61		− {"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, 0},
62		− {"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16},
63		− {"NAND 128MiB 1,8V 16-bit", 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16},
64		− {"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16},
65		− {"NAND 128MiB 3,3V 16-bit", 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16},
66		−
67		− {"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, 0},
	46	+ {"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, SP_OPTIONS},
	47	+ {"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, SP_OPTIONS},
	48	+ {"NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, SP_OPTIONS16},
	49	+ {"NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, SP_OPTIONS16},
	50	+
	51	+ {"NAND 32MiB 1,8V 8-bit", 0x35, 512, 32, 0x4000, SP_OPTIONS},
	52	+ {"NAND 32MiB 3,3V 8-bit", 0x75, 512, 32, 0x4000, SP_OPTIONS},
	53	+ {"NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, SP_OPTIONS16},
	54	+ {"NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, SP_OPTIONS16},
	55	+
	56	+ {"NAND 64MiB 1,8V 8-bit", 0x36, 512, 64, 0x4000, SP_OPTIONS},
	57	+ {"NAND 64MiB 3,3V 8-bit", 0x76, 512, 64, 0x4000, SP_OPTIONS},
	58	+ {"NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, SP_OPTIONS16},
	59	+ {"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, SP_OPTIONS16},
	60	+
	61	+ {"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, SP_OPTIONS},
	62	+ {"NAND 128MiB 1,8V 8-bit", 0x39, 512, 128, 0x4000, SP_OPTIONS},
	63	+ {"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, SP_OPTIONS},
	64	+ {"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, SP_OPTIONS16},
	65	+ {"NAND 128MiB 1,8V 16-bit", 0x49, 512, 128, 0x4000, SP_OPTIONS16},
	66	+ {"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, SP_OPTIONS16},
	67	+ {"NAND 128MiB 3,3V 16-bit", 0x59, 512, 128, 0x4000, SP_OPTIONS16},
	68	+
	69	+ {"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, SP_OPTIONS},
68	70
69	71	/*
70	72	* These are the new chips with large page size. The pagesize and the

drivers/net/bonding/bond_main.c+75−33

@@ -846,8 +846,10 @@ static void bond_mc_swap(struct bonding bond, struct slave new_active, · 845 unmodified lines
846	846	if (bond->dev->flags & IFF_ALLMULTI)
847	847	dev_set_allmulti(old_active->dev, -1);
848	848
	849	+ netif_addr_lock_bh(bond->dev);
849	850	netdev_for_each_mc_addr(ha, bond->dev)
850	851	dev_mc_del(old_active->dev, ha->addr);
	852	+ netif_addr_unlock_bh(bond->dev);
851	853	}
852	854
853	855	if (new_active) {
@@ -858,8 +860,10 @@ static void bond_mc_swap(struct bonding bond, struct slave new_active, · 4 unmodified lines
858	860	if (bond->dev->flags & IFF_ALLMULTI)
859	861	dev_set_allmulti(new_active->dev, 1);
860	862
	863	+ netif_addr_lock_bh(bond->dev);
861	864	netdev_for_each_mc_addr(ha, bond->dev)
862	865	dev_mc_add(new_active->dev, ha->addr);
	866	+ netif_addr_unlock_bh(bond->dev);
863	867	}
864	868	}
865	869
@@ -1746,6 +1750,8 @@ int bond_enslave(struct net_device bond_dev, struct net_device slave_dev) · 880 unmodified lines
1746	1750
1747	1751	bond_compute_features(bond);
1748	1752
	1753	+ bond_update_speed_duplex(new_slave);
	1754	+
1749	1755	read_lock(&bond->lock);
1750	1756
1751	1757	new_slave->last_arp_rx = jiffies -
@@ -1798,8 +1804,6 @@ int bond_enslave(struct net_device bond_dev, struct net_device slave_dev) · 46 unmodified lines
1798	1804	new_slave->link == BOND_LINK_DOWN ? "DOWN" :
1799	1805	(new_slave->link == BOND_LINK_UP ? "UP" : "BACK"));
1800	1806
1801		− bond_update_speed_duplex(new_slave);
1802		−
1803	1807	if (USES_PRIMARY(bond->params.mode) && bond->params.primary[0]) {
1804	1808	/* if there is a primary slave, remember it */
1805	1809	if (strcmp(bond->params.primary, new_slave->dev->name) == 0) {
@@ -1901,11 +1905,29 @@ err_dest_symlinks: · 95 unmodified lines
1901	1905	bond_destroy_slave_symlinks(bond_dev, slave_dev);
1902	1906
1903	1907	err_detach:
	1908	+ if (!USES_PRIMARY(bond->params.mode)) {
	1909	+ netif_addr_lock_bh(bond_dev);
	1910	+ bond_mc_list_flush(bond_dev, slave_dev);
	1911	+ netif_addr_unlock_bh(bond_dev);
	1912	+ }
	1913	+ bond_del_vlans_from_slave(bond, slave_dev);
1904	1914	write_lock_bh(&bond->lock);
1905	1915	bond_detach_slave(bond, new_slave);
	1916	+ if (bond->primary_slave == new_slave)
	1917	+ bond->primary_slave = NULL;
1906	1918	write_unlock_bh(&bond->lock);
	1919	+ if (bond->curr_active_slave == new_slave) {
	1920	+ read_lock(&bond->lock);
	1921	+ write_lock_bh(&bond->curr_slave_lock);
	1922	+ bond_change_active_slave(bond, NULL);
	1923	+ bond_select_active_slave(bond);
	1924	+ write_unlock_bh(&bond->curr_slave_lock);
	1925	+ read_unlock(&bond->lock);
	1926	+ }
	1927	+ slave_disable_netpoll(new_slave);
1907	1928
1908	1929	err_close:
	1930	+ slave_dev->priv_flags &= ~IFF_BONDING;
1909	1931	dev_close(slave_dev);
1910	1932
1911	1933	err_unset_master:
@@ -1976,12 +1998,11 @@ static int __bond_release_one(struct net_device *bond_dev, · 64 unmodified lines
1976	1998	return -EINVAL;
1977	1999	}
1978	2000
	2001	+ write_unlock_bh(&bond->lock);
1979	2002	/* unregister rx_handler early so bond_handle_frame wouldn't be called
1980	2003	* for this slave anymore.
1981	2004	*/
1982	2005	netdev_rx_handler_unregister(slave_dev);
1983		− write_unlock_bh(&bond->lock);
1984		− synchronize_net();
1985	2006	write_lock_bh(&bond->lock);
1986	2007
1987	2008	if (!all && !bond->params.fail_over_mac) {
@@ -2374,8 +2395,6 @@ static void bond_miimon_commit(struct bonding *bond) · 386 unmodified lines
2374	2395	bond_set_backup_slave(slave);
2375	2396	}
2376	2397
2377		− bond_update_speed_duplex(slave);
2378		−
2379	2398	pr_info("%s: link status definitely up for interface %s, %u Mbps %s duplex.\n",
2380	2399	bond->dev->name, slave->dev->name,
2381	2400	slave->speed, slave->duplex ? "full" : "half");
@@ -3171,11 +3190,20 @@ static int bond_slave_netdev_event(unsigned long event, · 789 unmodified lines
3171	3190	struct net_device *slave_dev)
3172	3191	{
3173	3192	struct slave *slave = bond_slave_get_rtnl(slave_dev);
3174		− struct bonding *bond = slave->bond;
3175		− struct net_device *bond_dev = slave->bond->dev;
	3193	+ struct bonding *bond;
	3194	+ struct net_device *bond_dev;
3176	3195	u32 old_speed;
3177	3196	u8 old_duplex;
3178	3197
	3198	+ /* A netdev event can be generated while enslaving a device
	3199	+ * before netdev_rx_handler_register is called in which case
	3200	+ * slave will be NULL
	3201	+ */
	3202	+ if (!slave)
	3203	+ return NOTIFY_DONE;
	3204	+ bond_dev = slave->bond->dev;
	3205	+ bond = slave->bond;
	3206	+
3179	3207	switch (event) {
3180	3208	case NETDEV_UNREGISTER:
3181	3209	if (bond->setup_by_slave)
@@ -3289,20 +3317,22 @@ static int bond_xmit_hash_policy_l2(struct sk_buff *skb, int count) · 107 unmodified lines
3289	3317	*/
3290	3318	static int bond_xmit_hash_policy_l23(struct sk_buff *skb, int count)
3291	3319	{
3292		− struct ethhdr data = (struct ethhdr )skb->data;
3293		− struct iphdr *iph;
3294		− struct ipv6hdr *ipv6h;
	3320	+ const struct ethhdr *data;
	3321	+ const struct iphdr *iph;
	3322	+ const struct ipv6hdr *ipv6h;
3295	3323	u32 v6hash;
3296		− __be32 s, d;
	3324	+ const __be32 s, d;
3297	3325
3298	3326	if (skb->protocol == htons(ETH_P_IP) &&
3299		− skb_network_header_len(skb) >= sizeof(*iph)) {
	3327	+ pskb_network_may_pull(skb, sizeof(*iph))) {
3300	3328	iph = ip_hdr(skb);
	3329	+ data = (struct ethhdr *)skb->data;
3301	3330	return ((ntohl(iph->saddr ^ iph->daddr) & 0xffff) ^
3302	3331	(data->h_dest[5] ^ data->h_source[5])) % count;
3303	3332	} else if (skb->protocol == htons(ETH_P_IPV6) &&
3304		− skb_network_header_len(skb) >= sizeof(*ipv6h)) {
	3333	+ pskb_network_may_pull(skb, sizeof(*ipv6h))) {
3305	3334	ipv6h = ipv6_hdr(skb);
	3335	+ data = (struct ethhdr *)skb->data;
3306	3336	s = &ipv6h->saddr.s6_addr32[0];
3307	3337	d = &ipv6h->daddr.s6_addr32[0];
3308	3338	v6hash = (s[1] ^ d[1]) ^ (s[2] ^ d[2]) ^ (s[3] ^ d[3]);
@@ -3321,33 +3351,36 @@ static int bond_xmit_hash_policy_l23(struct sk_buff *skb, int count) · 12 unmodified lines
3321	3351	static int bond_xmit_hash_policy_l34(struct sk_buff *skb, int count)
3322	3352	{
3323	3353	u32 layer4_xor = 0;
3324		− struct iphdr *iph;
3325		− struct ipv6hdr *ipv6h;
3326		− __be32 s, d;
3327		− __be16 *layer4hdr;
	3354	+ const struct iphdr *iph;
	3355	+ const struct ipv6hdr *ipv6h;
	3356	+ const __be32 s, d;
	3357	+ const __be16 *l4 = NULL;
	3358	+ __be16 _l4[2];
	3359	+ int noff = skb_network_offset(skb);
	3360	+ int poff;
3328	3361
3329	3362	if (skb->protocol == htons(ETH_P_IP) &&
3330		− skb_network_header_len(skb) >= sizeof(*iph)) {
	3363	+ pskb_may_pull(skb, noff + sizeof(*iph))) {
3331	3364	iph = ip_hdr(skb);
3332		− if (!ip_is_fragment(iph) &&
3333		− (iph->protocol == IPPROTO_TCP \|\|
3334		− iph->protocol == IPPROTO_UDP) &&
3335		− (skb_headlen(skb) - skb_network_offset(skb) >=
3336		− iph->ihl * sizeof(u32) + sizeof(layer4hdr) 2)) {
3337		− layer4hdr = (__be16 )((u32 )iph + iph->ihl);
3338		− layer4_xor = ntohs(layer4hdr ^ (layer4hdr + 1));
	3365	+ poff = proto_ports_offset(iph->protocol);
	3366	+
	3367	+ if (!ip_is_fragment(iph) && poff >= 0) {
	3368	+ l4 = skb_header_pointer(skb, noff + (iph->ihl << 2) + poff,
	3369	+ sizeof(_l4), &_l4);
	3370	+ if (l4)
	3371	+ layer4_xor = ntohs(l4[0] ^ l4[1]);
3339	3372	}
3340	3373	return (layer4_xor ^
3341	3374	((ntohl(iph->saddr ^ iph->daddr)) & 0xffff)) % count;
3342	3375	} else if (skb->protocol == htons(ETH_P_IPV6) &&
3343		− skb_network_header_len(skb) >= sizeof(*ipv6h)) {
	3376	+ pskb_may_pull(skb, noff + sizeof(*ipv6h))) {
3344	3377	ipv6h = ipv6_hdr(skb);
3345		− if ((ipv6h->nexthdr == IPPROTO_TCP \|\|
3346		− ipv6h->nexthdr == IPPROTO_UDP) &&
3347		− (skb_headlen(skb) - skb_network_offset(skb) >=
3348		− sizeof(ipv6h) + sizeof(layer4hdr) * 2)) {
3349		− layer4hdr = (__be16 *)(ipv6h + 1);
3350		− layer4_xor = ntohs(layer4hdr ^ (layer4hdr + 1));
	3378	+ poff = proto_ports_offset(ipv6h->nexthdr);
	3379	+ if (poff >= 0) {
	3380	+ l4 = skb_header_pointer(skb, noff + sizeof(*ipv6h) + poff,
	3381	+ sizeof(_l4), &_l4);
	3382	+ if (l4)
	3383	+ layer4_xor = ntohs(l4[0] ^ l4[1]);
3351	3384	}
3352	3385	s = &ipv6h->saddr.s6_addr32[0];
3353	3386	d = &ipv6h->daddr.s6_addr32[0];
@@ -4849,9 +4882,18 @@ static int __net_init bond_net_init(struct net *net) · 1495 unmodified lines
4849	4882	static void __net_exit bond_net_exit(struct net *net)
4850	4883	{
4851	4884	struct bond_net *bn = net_generic(net, bond_net_id);
	4885	+ struct bonding bond, tmp_bond;
	4886	+ LIST_HEAD(list);
4852	4887
4853	4888	bond_destroy_sysfs(bn);
4854	4889	bond_destroy_proc_dir(bn);
	4890	+
	4891	+ /* Kill off any bonds created after unregistering bond rtnl ops */
	4892	+ rtnl_lock();
	4893	+ list_for_each_entry_safe(bond, tmp_bond, &bn->dev_list, bond_list)
	4894	+ unregister_netdevice_queue(bond->dev, &list);
	4895	+ unregister_netdevice_many(&list);
	4896	+ rtnl_unlock();
4855	4897	}
4856	4898
4857	4899	static struct pernet_operations bond_net_ops = {

drivers/net/bonding/bond_sysfs.c+53−44

@@ -183,6 +183,11 @@ int bond_create_slave_symlinks(struct net_device *master, · 182 unmodified lines
183	183	sprintf(linkname, "slave_%s", slave->name);
184	184	ret = sysfs_create_link(&(master->dev.kobj), &(slave->dev.kobj),
185	185	linkname);
	186	+
	187	+ /* free the master link created earlier in case of error */
	188	+ if (ret)
	189	+ sysfs_remove_link(&(slave->dev.kobj), "master");
	190	+
186	191	return ret;
187	192
188	193	}
@@ -522,7 +527,7 @@ static ssize_t bonding_store_arp_interval(struct device *d, · 333 unmodified lines
522	527	goto out;
523	528	}
524	529	if (new_value < 0) {
525		− pr_err("%s: Invalid arp_interval value %d not in range 1-%d; rejected.\n",
	530	+ pr_err("%s: Invalid arp_interval value %d not in range 0-%d; rejected.\n",
526	531	bond->dev->name, new_value, INT_MAX);
527	532	ret = -EINVAL;
528	533	goto out;
@@ -537,14 +542,15 @@ static ssize_t bonding_store_arp_interval(struct device *d, · 8 unmodified lines
537	542	pr_info("%s: Setting ARP monitoring interval to %d.\n",
538	543	bond->dev->name, new_value);
539	544	bond->params.arp_interval = new_value;
540		− if (bond->params.miimon) {
541		− pr_info("%s: ARP monitoring cannot be used with MII monitoring. %s Disabling MII monitoring.\n",
542		− bond->dev->name, bond->dev->name);
543		− bond->params.miimon = 0;
544		− }
545		− if (!bond->params.arp_targets[0]) {
546		− pr_info("%s: ARP monitoring has been set up, but no ARP targets have been specified.\n",
547		− bond->dev->name);
	545	+ if (new_value) {
	546	+ if (bond->params.miimon) {
	547	+ pr_info("%s: ARP monitoring cannot be used with MII monitoring. %s Disabling MII monitoring.\n",
	548	+ bond->dev->name, bond->dev->name);
	549	+ bond->params.miimon = 0;
	550	+ }
	551	+ if (!bond->params.arp_targets[0])
	552	+ pr_info("%s: ARP monitoring has been set up, but no ARP targets have been specified.\n",
	553	+ bond->dev->name);
548	554	}
549	555	if (bond->dev->flags & IFF_UP) {
550	556	/* If the interface is up, we may need to fire off
@@ -552,10 +558,13 @@ static ssize_t bonding_store_arp_interval(struct device *d, · 1 unmodified line
552	558	* timer will get fired off when the open function
553	559	* is called.
554	560	*/
555		− cancel_delayed_work_sync(&bond->mii_work);
556		− queue_delayed_work(bond->wq, &bond->arp_work, 0);
	561	+ if (!new_value) {
	562	+ cancel_delayed_work_sync(&bond->arp_work);
	563	+ } else {
	564	+ cancel_delayed_work_sync(&bond->mii_work);
	565	+ queue_delayed_work(bond->wq, &bond->arp_work, 0);
	566	+ }
557	567	}
558		−
559	568	out:
560	569	rtnl_unlock();
561	570	return ret;
@@ -697,7 +706,7 @@ static ssize_t bonding_store_downdelay(struct device *d, · 135 unmodified lines
697	706	}
698	707	if (new_value < 0) {
699	708	pr_err("%s: Invalid down delay value %d not in range %d-%d; rejected.\n",
700		− bond->dev->name, new_value, 1, INT_MAX);
	709	+ bond->dev->name, new_value, 0, INT_MAX);
701	710	ret = -EINVAL;
702	711	goto out;
703	712	} else {
@@ -752,8 +761,8 @@ static ssize_t bonding_store_updelay(struct device *d, · 48 unmodified lines
752	761	goto out;
753	762	}
754	763	if (new_value < 0) {
755		− pr_err("%s: Invalid down delay value %d not in range %d-%d; rejected.\n",
756		− bond->dev->name, new_value, 1, INT_MAX);
	764	+ pr_err("%s: Invalid up delay value %d not in range %d-%d; rejected.\n",
	765	+ bond->dev->name, new_value, 0, INT_MAX);
757	766	ret = -EINVAL;
758	767	goto out;
759	768	} else {
@@ -963,37 +972,37 @@ static ssize_t bonding_store_miimon(struct device *d, · 203 unmodified lines
963	972	}
964	973	if (new_value < 0) {
965	974	pr_err("%s: Invalid miimon value %d not in range %d-%d; rejected.\n",
966		− bond->dev->name, new_value, 1, INT_MAX);
	975	+ bond->dev->name, new_value, 0, INT_MAX);
967	976	ret = -EINVAL;
968	977	goto out;
969		− } else {
970		− pr_info("%s: Setting MII monitoring interval to %d.\n",
971		− bond->dev->name, new_value);
972		− bond->params.miimon = new_value;
973		− if (bond->params.updelay)
974		− pr_info("%s: Note: Updating updelay (to %d) since it is a multiple of the miimon value.\n",
975		− bond->dev->name,
976		− bond->params.updelay * bond->params.miimon);
977		− if (bond->params.downdelay)
978		− pr_info("%s: Note: Updating downdelay (to %d) since it is a multiple of the miimon value.\n",
979		− bond->dev->name,
980		− bond->params.downdelay * bond->params.miimon);
981		− if (bond->params.arp_interval) {
982		− pr_info("%s: MII monitoring cannot be used with ARP monitoring. Disabling ARP monitoring...\n",
983		− bond->dev->name);
984		− bond->params.arp_interval = 0;
985		− if (bond->params.arp_validate) {
986		− bond->params.arp_validate =
987		− BOND_ARP_VALIDATE_NONE;
988		− }
989		− }
990		−
991		− if (bond->dev->flags & IFF_UP) {
992		− /* If the interface is up, we may need to fire off
993		− * the MII timer. If the interface is down, the
994		− * timer will get fired off when the open function
995		− * is called.
996		− */
	978	+ }
	979	+ pr_info("%s: Setting MII monitoring interval to %d.\n",
	980	+ bond->dev->name, new_value);
	981	+ bond->params.miimon = new_value;
	982	+ if (bond->params.updelay)
	983	+ pr_info("%s: Note: Updating updelay (to %d) since it is a multiple of the miimon value.\n",
	984	+ bond->dev->name,
	985	+ bond->params.updelay * bond->params.miimon);
	986	+ if (bond->params.downdelay)
	987	+ pr_info("%s: Note: Updating downdelay (to %d) since it is a multiple of the miimon value.\n",
	988	+ bond->dev->name,
	989	+ bond->params.downdelay * bond->params.miimon);
	990	+ if (new_value && bond->params.arp_interval) {
	991	+ pr_info("%s: MII monitoring cannot be used with ARP monitoring. Disabling ARP monitoring...\n",
	992	+ bond->dev->name);
	993	+ bond->params.arp_interval = 0;
	994	+ if (bond->params.arp_validate)
	995	+ bond->params.arp_validate = BOND_ARP_VALIDATE_NONE;
	996	+ }
	997	+ if (bond->dev->flags & IFF_UP) {
	998	+ /* If the interface is up, we may need to fire off
	999	+ * the MII timer. If the interface is down, the
	1000	+ * timer will get fired off when the open function
	1001	+ * is called.
	1002	+ */
	1003	+ if (!new_value) {
	1004	+ cancel_delayed_work_sync(&bond->mii_work);
	1005	+ } else {
997	1006	cancel_delayed_work_sync(&bond->arp_work);
998	1007	queue_delayed_work(bond->wq, &bond->mii_work, 0);
999	1008	}

drivers/net/can/mcp251x.c+8−2

@@ -929,6 +929,7 @@ static int mcp251x_open(struct net_device *net) · 928 unmodified lines
929	929	struct mcp251x_priv *priv = netdev_priv(net);
930	930	struct spi_device *spi = priv->spi;
931	931	struct mcp251x_platform_data *pdata = spi->dev.platform_data;
	932	+ unsigned long flags;
932	933	int ret;
933	934
934	935	ret = open_candev(net);
@@ -945,9 +946,14 @@ static int mcp251x_open(struct net_device *net) · 10 unmodified lines
945	946	priv->tx_skb = NULL;
946	947	priv->tx_len = 0;
947	948
	949	+ flags = IRQF_ONESHOT;
	950	+ if (pdata->irq_flags)
	951	+ flags \|= pdata->irq_flags;
	952	+ else
	953	+ flags \|= IRQF_TRIGGER_FALLING;
	954	+
948	955	ret = request_threaded_irq(spi->irq, NULL, mcp251x_can_ist,
949		− pdata->irq_flags ? pdata->irq_flags : IRQF_TRIGGER_FALLING,
950		− DEVICE_NAME, priv);
	956	+ flags, DEVICE_NAME, priv);
951	957	if (ret) {
952	958	dev_err(&spi->dev, "failed to acquire irq %d\n", spi->irq);
953	959	if (pdata->transceiver_enable)

drivers/net/can/sja1000/Kconfig+1−0

@@ -46,6 +46,7 @@ config CAN_EMS_PCI · 45 unmodified lines
46	46	config CAN_PEAK_PCMCIA
47	47	tristate "PEAK PCAN-PC Card"
48	48	depends on PCMCIA
	49	+ depends on HAS_IOPORT
49	50	---help---
50	51	This driver is for the PCAN-PC Card PCMCIA adapter (1 or 2 channels)
51	52	from PEAK-System (http://www.peak-system.com). To compile this

drivers/net/can/sja1000/plx_pci.c+2−2

@@ -348,7 +348,7 @@ static inline int plx_pci_check_sja1000(const struct sja1000_priv *priv) · 347 unmodified lines
348	348	*/
349	349	if ((priv->read_reg(priv, REG_CR) & REG_CR_BASICCAN_INITIAL_MASK) ==
350	350	REG_CR_BASICCAN_INITIAL &&
351		− (priv->read_reg(priv, REG_SR) == REG_SR_BASICCAN_INITIAL) &&
	351	+ (priv->read_reg(priv, SJA1000_REG_SR) == REG_SR_BASICCAN_INITIAL) &&
352	352	(priv->read_reg(priv, REG_IR) == REG_IR_BASICCAN_INITIAL))
353	353	flag = 1;
354	354
@@ -360,7 +360,7 @@ static inline int plx_pci_check_sja1000(const struct sja1000_priv *priv) · 5 unmodified lines
360	360	* See states on p. 23 of the Datasheet.
361	361	*/
362	362	if (priv->read_reg(priv, REG_MOD) == REG_MOD_PELICAN_INITIAL &&
363		− priv->read_reg(priv, REG_SR) == REG_SR_PELICAN_INITIAL &&
	363	+ priv->read_reg(priv, SJA1000_REG_SR) == REG_SR_PELICAN_INITIAL &&
364	364	priv->read_reg(priv, REG_IR) == REG_IR_PELICAN_INITIAL)
365	365	return flag;
366	366

drivers/net/can/sja1000/sja1000.c+3−3

@@ -92,7 +92,7 @@ static void sja1000_write_cmdreg(struct sja1000_priv *priv, u8 val) · 91 unmodified lines
92	92	*/
93	93	spin_lock_irqsave(&priv->cmdreg_lock, flags);
94	94	priv->write_reg(priv, REG_CMR, val);
95		− priv->read_reg(priv, REG_SR);
	95	+ priv->read_reg(priv, SJA1000_REG_SR);
96	96	spin_unlock_irqrestore(&priv->cmdreg_lock, flags);
97	97	}
98	98
@@ -502,7 +502,7 @@ irqreturn_t sja1000_interrupt(int irq, void *dev_id) · 403 unmodified lines
502	502
503	503	while ((isrc = priv->read_reg(priv, REG_IR)) && (n < SJA1000_MAX_IRQ)) {
504	504	n++;
505		− status = priv->read_reg(priv, REG_SR);
	505	+ status = priv->read_reg(priv, SJA1000_REG_SR);
506	506	/* check for absent controller due to hw unplug */
507	507	if (status == 0xFF && sja1000_is_absent(priv))
508	508	return IRQ_NONE;
@@ -530,7 +530,7 @@ irqreturn_t sja1000_interrupt(int irq, void *dev_id) · 21 unmodified lines
530	530	/* receive interrupt */
531	531	while (status & SR_RBS) {
532	532	sja1000_rx(dev);
533		− status = priv->read_reg(priv, REG_SR);
	533	+ status = priv->read_reg(priv, SJA1000_REG_SR);
534	534	/* check for absent controller */
535	535	if (status == 0xFF && sja1000_is_absent(priv))
536	536	return IRQ_NONE;

drivers/net/can/sja1000/sja1000.h+1−1

@@ -56,7 +56,7 @@ · 55 unmodified lines
56	56	/* SJA1000 registers - manual section 6.4 (Pelican Mode) */
57	57	#define REG_MOD 0x00
58	58	#define REG_CMR 0x01
59		−#define REG_SR 0x02
	59	+#define SJA1000_REG_SR 0x02
60	60	#define REG_IR 0x03
61	61	#define REG_IER 0x04
62	62	#define REG_ALC 0x0B

drivers/net/can/sja1000/sja1000_of_platform.c+15−16

@@ -96,8 +96,8 @@ static int sja1000_ofp_probe(struct platform_device *ofdev) · 95 unmodified lines
96	96	struct net_device *dev;
97	97	struct sja1000_priv *priv;
98	98	struct resource res;
99		− const u32 *prop;
100		− int err, irq, res_size, prop_size;
	99	+ u32 prop;
	100	+ int err, irq, res_size;
101	101	void __iomem *base;
102	102
103	103	err = of_address_to_resource(np, 0, &res);
@@ -138,27 +138,27 @@ static int sja1000_ofp_probe(struct platform_device *ofdev) · 34 unmodified lines
138	138	priv->read_reg = sja1000_ofp_read_reg;
139	139	priv->write_reg = sja1000_ofp_write_reg;
140	140
141		− prop = of_get_property(np, "nxp,external-clock-frequency", &prop_size);
142		− if (prop && (prop_size == sizeof(u32)))
143		− priv->can.clock.freq = *prop / 2;
	141	+ err = of_property_read_u32(np, "nxp,external-clock-frequency", &prop);
	142	+ if (!err)
	143	+ priv->can.clock.freq = prop / 2;
144	144	else
145	145	priv->can.clock.freq = SJA1000_OFP_CAN_CLOCK; /* default */
146	146
147		− prop = of_get_property(np, "nxp,tx-output-mode", &prop_size);
148		− if (prop && (prop_size == sizeof(u32)))
149		− priv->ocr \|= *prop & OCR_MODE_MASK;
	147	+ err = of_property_read_u32(np, "nxp,tx-output-mode", &prop);
	148	+ if (!err)
	149	+ priv->ocr \|= prop & OCR_MODE_MASK;
150	150	else
151	151	priv->ocr \|= OCR_MODE_NORMAL; /* default */
152	152
153		− prop = of_get_property(np, "nxp,tx-output-config", &prop_size);
154		− if (prop && (prop_size == sizeof(u32)))
155		− priv->ocr \|= (*prop << OCR_TX_SHIFT) & OCR_TX_MASK;
	153	+ err = of_property_read_u32(np, "nxp,tx-output-config", &prop);
	154	+ if (!err)
	155	+ priv->ocr \|= (prop << OCR_TX_SHIFT) & OCR_TX_MASK;
156	156	else
157	157	priv->ocr \|= OCR_TX0_PULLDOWN; /* default */
158	158
159		− prop = of_get_property(np, "nxp,clock-out-frequency", &prop_size);
160		− if (prop && (prop_size == sizeof(u32)) && *prop) {
161		− u32 divider = priv->can.clock.freq * 2 / *prop;
	159	+ err = of_property_read_u32(np, "nxp,clock-out-frequency", &prop);
	160	+ if (!err && prop) {
	161	+ u32 divider = priv->can.clock.freq * 2 / prop;
162	162
163	163	if (divider > 1)
164	164	priv->cdr \|= divider / 2 - 1;
@@ -168,8 +168,7 @@ static int sja1000_ofp_probe(struct platform_device *ofdev) · 3 unmodified lines
168	168	priv->cdr \|= CDR_CLK_OFF; /* default */
169	169	}
170	170
171		− prop = of_get_property(np, "nxp,no-comparator-bypass", NULL);
172		− if (!prop)
	171	+ if (!of_property_read_bool(np, "nxp,no-comparator-bypass"))
173	172	priv->cdr \|= CDR_CBP; /* default */
174	173
175	174	priv->irq_flags = IRQF_SHARED;

drivers/net/ethernet/8390/ax88796.c+1−1

@@ -828,7 +828,7 @@ static int ax_probe(struct platform_device *pdev) · 827 unmodified lines
828	828	struct ei_device *ei_local;
829	829	struct ax_device *ax;
830	830	struct resource irq, mem, *mem2;
831		− resource_size_t mem_size, mem2_size = 0;
	831	+ unsigned long mem_size, mem2_size = 0;
832	832	int ret = 0;
833	833
834	834	dev = ax__alloc_ei_netdev(sizeof(struct ax_device));

drivers/net/ethernet/atheros/atl1e/atl1e.h+1−2

@@ -186,7 +186,7 @@ struct atl1e_tpd_desc { · 185 unmodified lines
186	186	/* how about 0x2000 */
187	187	#define MAX_TX_BUF_LEN 0x2000
188	188	#define MAX_TX_BUF_SHIFT 13
189		−/#define MAX_TX_BUF_LEN 0x3000 /
	189	+#define MAX_TSO_SEG_SIZE 0x3c00
190	190
191	191	/* rrs word 1 bit 0:31 */
192	192	#define RRS_RX_CSUM_MASK 0xFFFF
@@ -438,7 +438,6 @@ struct atl1e_adapter { · 245 unmodified lines
438	438	struct atl1e_hw hw;
439	439	struct atl1e_hw_stats hw_stats;
440	440
441		− bool have_msi;
442	441	u32 wol;
443	442	u16 link_speed;
444	443	u16 link_duplex;

drivers/net/ethernet/atheros/atl1e/atl1e_main.c+3−17

@@ -1849,34 +1849,19 @@ static void atl1e_free_irq(struct atl1e_adapter *adapter) · 1848 unmodified lines
1849	1849	struct net_device *netdev = adapter->netdev;
1850	1850
1851	1851	free_irq(adapter->pdev->irq, netdev);
1852		−
1853		− if (adapter->have_msi)
1854		− pci_disable_msi(adapter->pdev);
1855	1852	}
1856	1853
1857	1854	static int atl1e_request_irq(struct atl1e_adapter *adapter)
1858	1855	{
1859	1856	struct pci_dev *pdev = adapter->pdev;
1860	1857	struct net_device *netdev = adapter->netdev;
1861		− int flags = 0;
1862	1858	int err = 0;
1863	1859
1864		− adapter->have_msi = true;
1865		− err = pci_enable_msi(pdev);
1866		− if (err) {
1867		− netdev_dbg(netdev,
1868		− "Unable to allocate MSI interrupt Error: %d\n", err);
1869		− adapter->have_msi = false;
1870		− }
1871		−
1872		− if (!adapter->have_msi)
1873		− flags \|= IRQF_SHARED;
1874		− err = request_irq(pdev->irq, atl1e_intr, flags, netdev->name, netdev);
	1860	+ err = request_irq(pdev->irq, atl1e_intr, IRQF_SHARED, netdev->name,
	1861	+ netdev);
1875	1862	if (err) {
1876	1863	netdev_dbg(adapter->netdev,
1877	1864	"Unable to allocate interrupt Error: %d\n", err);
1878		− if (adapter->have_msi)
1879		− pci_disable_msi(pdev);
1880	1865	return err;
1881	1866	}
1882	1867	netdev_dbg(netdev, "atl1e_request_irq OK\n");
@@ -2344,6 +2329,7 @@ static int atl1e_probe(struct pci_dev pdev, const struct pci_device_id ent) · 461 unmodified lines
2344	2329
2345	2330	INIT_WORK(&adapter->reset_task, atl1e_reset_task);
2346	2331	INIT_WORK(&adapter->link_chg_task, atl1e_link_chg_task);
	2332	+ netif_set_gso_max_size(netdev, MAX_TSO_SEG_SIZE);
2347	2333	err = register_netdev(netdev);
2348	2334	if (err) {
2349	2335	netdev_err(netdev, "register netdevice failed\n");

drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c+6−2

@@ -2614,6 +2614,9 @@ int bnx2x_nic_load(struct bnx2x *bp, int load_mode) · 2613 unmodified lines
2614	2614	}
2615	2615	}
2616	2616
	2617	+ /* initialize FW coalescing state machines in RAM */
	2618	+ bnx2x_update_coalesce(bp);
	2619	+
2617	2620	/* setup the leading queue */
2618	2621	rc = bnx2x_setup_leading(bp);
2619	2622	if (rc) {
@@ -2760,6 +2763,7 @@ load_error2: · 140 unmodified lines
2760	2763	bp->port.pmf = 0;
2761	2764	load_error1:
2762	2765	bnx2x_napi_disable(bp);
	2766	+ bnx2x_del_all_napi(bp);
2763	2767
2764	2768	/* clear pf_load status, as it was already set */
2765	2769	if (IS_PF(bp))
@@ -4579,11 +4583,11 @@ static void storm_memset_hc_disable(struct bnx2x *bp, u8 port, · 1813 unmodified lines
4579	4583	u32 enable_flag = disable ? 0 : (1 << HC_INDEX_DATA_HC_ENABLED_SHIFT);
4580	4584	u32 addr = BAR_CSTRORM_INTMEM +
4581	4585	CSTORM_STATUS_BLOCK_DATA_FLAGS_OFFSET(fw_sb_id, sb_index);
4582		− u16 flags = REG_RD16(bp, addr);
	4586	+ u8 flags = REG_RD8(bp, addr);
4583	4587	/* clear and set */
4584	4588	flags &= ~HC_INDEX_DATA_HC_ENABLED;
4585	4589	flags \|= enable_flag;
4586		− REG_WR16(bp, addr, flags);
	4590	+ REG_WR8(bp, addr, flags);
4587	4591	DP(NETIF_MSG_IFUP,
4588	4592	"port %x fw_sb_id %d sb_index %d disable %d\n",
4589	4593	port, fw_sb_id, sb_index, disable);

drivers/net/ethernet/broadcom/bnx2x/bnx2x_dcb.c+9−9

@@ -2139,12 +2139,12 @@ static u8 bnx2x_dcbnl_get_cap(struct net_device netdev, int capid, u8 cap) · 2138 unmodified lines
2139	2139	break;
2140	2140	default:
2141	2141	BNX2X_ERR("Non valid capability ID\n");
2142		− rval = -EINVAL;
	2142	+ rval = 1;
2143	2143	break;
2144	2144	}
2145	2145	} else {
2146	2146	DP(BNX2X_MSG_DCB, "DCB disabled\n");
2147		− rval = -EINVAL;
	2147	+ rval = 1;
2148	2148	}
2149	2149
2150	2150	DP(BNX2X_MSG_DCB, "capid %d:%x\n", capid, *cap);
@@ -2170,12 +2170,12 @@ static int bnx2x_dcbnl_get_numtcs(struct net_device netdev, int tcid, u8 num) · 19 unmodified lines
2170	2170	break;
2171	2171	default:
2172	2172	BNX2X_ERR("Non valid TC-ID\n");
2173		− rval = -EINVAL;
	2173	+ rval = 1;
2174	2174	break;
2175	2175	}
2176	2176	} else {
2177	2177	DP(BNX2X_MSG_DCB, "DCB disabled\n");
2178		− rval = -EINVAL;
	2178	+ rval = 1;
2179	2179	}
2180	2180
2181	2181	return rval;
@@ -2188,7 +2188,7 @@ static int bnx2x_dcbnl_set_numtcs(struct net_device *netdev, int tcid, u8 num) · 6 unmodified lines
2188	2188	return -EINVAL;
2189	2189	}
2190	2190
2191		−static u8 bnx2x_dcbnl_get_pfc_state(struct net_device *netdev)
	2191	+static u8 bnx2x_dcbnl_get_pfc_state(struct net_device *netdev)
2192	2192	{
2193	2193	struct bnx2x *bp = netdev_priv(netdev);
2194	2194	DP(BNX2X_MSG_DCB, "state = %d\n", bp->dcbx_local_feat.pfc.enabled);
@@ -2390,12 +2390,12 @@ static u8 bnx2x_dcbnl_get_featcfg(struct net_device *netdev, int featid, · 195 unmodified lines
2390	2390	break;
2391	2391	default:
2392	2392	BNX2X_ERR("Non valid featrue-ID\n");
2393		− rval = -EINVAL;
	2393	+ rval = 1;
2394	2394	break;
2395	2395	}
2396	2396	} else {
2397	2397	DP(BNX2X_MSG_DCB, "DCB disabled\n");
2398		− rval = -EINVAL;
	2398	+ rval = 1;
2399	2399	}
2400	2400
2401	2401	return rval;
@@ -2431,12 +2431,12 @@ static u8 bnx2x_dcbnl_set_featcfg(struct net_device *netdev, int featid, · 29 unmodified lines
2431	2431	break;
2432	2432	default:
2433	2433	BNX2X_ERR("Non valid featrue-ID\n");
2434		− rval = -EINVAL;
	2434	+ rval = 1;
2435	2435	break;
2436	2436	}
2437	2437	} else {
2438	2438	DP(BNX2X_MSG_DCB, "dcbnl call not valid\n");
2439		− rval = -EINVAL;
	2439	+ rval = 1;
2440	2440	}
2441	2441
2442	2442	return rval;

drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c+11−7

@@ -13437,13 +13437,7 @@ static void bnx2x_check_kr2_wa(struct link_params *params, · 13436 unmodified lines
13437	13437	{
13438	13438	struct bnx2x *bp = params->bp;
13439	13439	u16 base_page, next_page, not_kr2_device, lane;
13440		− int sigdet = bnx2x_warpcore_get_sigdet(phy, params);
13441		−
13442		− if (!sigdet) {
13443		− if (!(vars->link_attr_sync & LINK_ATTR_SYNC_KR2_ENABLE))
13444		− bnx2x_kr2_recovery(params, vars, phy);
13445		− return;
13446		− }
	13440	+ int sigdet;
13447	13441
13448	13442	/* Once KR2 was disabled, wait 5 seconds before checking KR2 recovery
13449	13443	* since some switches tend to reinit the AN process and clear the
@@ -13454,6 +13448,16 @@ static void bnx2x_check_kr2_wa(struct link_params *params, · 4 unmodified lines
13454	13448	vars->check_kr2_recovery_cnt--;
13455	13449	return;
13456	13450	}
	13451	+
	13452	+ sigdet = bnx2x_warpcore_get_sigdet(phy, params);
	13453	+ if (!sigdet) {
	13454	+ if (!(vars->link_attr_sync & LINK_ATTR_SYNC_KR2_ENABLE)) {
	13455	+ bnx2x_kr2_recovery(params, vars, phy);
	13456	+ DP(NETIF_MSG_LINK, "No sigdet\n");
	13457	+ }
	13458	+ return;
	13459	+ }
	13460	+
13457	13461	lane = bnx2x_get_warpcore_lane(phy, params);
13458	13462	CL22_WR_OVER_CL45(bp, phy, MDIO_REG_BANK_AER_BLOCK,
13459	13463	MDIO_AER_BLOCK_AER_REG, lane);

drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c+6−1

@@ -4947,7 +4947,7 @@ static void bnx2x_after_function_update(struct bnx2x *bp) · 4946 unmodified lines
4947	4947	q);
4948	4948	}
4949	4949
4950		− if (!NO_FCOE(bp)) {
	4950	+ if (!NO_FCOE(bp) && CNIC_ENABLED(bp)) {
4951	4951	fp = &bp->fp[FCOE_IDX(bp)];
4952	4952	queue_params.q_obj = &bnx2x_sp_obj(bp, fp).q_obj;
4953	4953
@@ -9878,6 +9878,10 @@ static int bnx2x_prev_unload_common(struct bnx2x *bp) · 4924 unmodified lines
9878	9878	REG_RD(bp, NIG_REG_NIG_INT_STS_CLR_0);
9879	9879	}
9880	9880	}
	9881	+ if (!CHIP_IS_E1x(bp))
	9882	+ /* block FW from writing to host */
	9883	+ REG_WR(bp, PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER, 0);
	9884	+
9881	9885	/* wait until BRB is empty */
9882	9886	tmp_reg = REG_RD(bp, BRB1_REG_NUM_OF_FULL_BLOCKS);
9883	9887	while (timer_count) {
@@ -13354,6 +13358,7 @@ static int bnx2x_unregister_cnic(struct net_device *dev) · 3470 unmodified lines
13354	13358	RCU_INIT_POINTER(bp->cnic_ops, NULL);
13355	13359	mutex_unlock(&bp->cnic_mutex);
13356	13360	synchronize_rcu();
	13361	+ bp->cnic_enabled = false;
13357	13362	kfree(bp->cnic_kwq);
13358	13363	bp->cnic_kwq = NULL;
13359	13364

drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.h+2−1

@@ -459,8 +459,9 @@ struct bnx2x_fw_port_stats_old { · 458 unmodified lines
459	459
460	460	#define UPDATE_QSTAT(s, t) \
461	461	do { \
462		− qstats->t##_hi = qstats_old->t##_hi + le32_to_cpu(s.hi); \
463	462	qstats->t##_lo = qstats_old->t##_lo + le32_to_cpu(s.lo); \
	463	+ qstats->t##_hi = qstats_old->t##_hi + le32_to_cpu(s.hi) \
	464	+ + ((qstats->t##_lo < qstats_old->t##_lo) ? 1 : 0); \
464	465	} while (0)
465	466
466	467	#define UPDATE_QSTAT_OLD(f) \

drivers/net/ethernet/broadcom/tg3.c+13−2

@@ -4130,6 +4130,14 @@ static void tg3_phy_copper_begin(struct tg3 *tp) · 4129 unmodified lines
4130	4130	tp->link_config.active_speed = tp->link_config.speed;
4131	4131	tp->link_config.active_duplex = tp->link_config.duplex;
4132	4132
	4133	+ if (tg3_asic_rev(tp) == ASIC_REV_5714) {
	4134	+ /* With autoneg disabled, 5715 only links up when the
	4135	+ * advertisement register has the configured speed
	4136	+ * enabled.
	4137	+ */
	4138	+ tg3_writephy(tp, MII_ADVERTISE, ADVERTISE_ALL);
	4139	+ }
	4140	+
4133	4141	bmcr = 0;
4134	4142	switch (tp->link_config.speed) {
4135	4143	default:
@@ -14596,8 +14604,11 @@ static void tg3_read_vpd(struct tg3 *tp) · 10460 unmodified lines
14596	14604	if (j + len > block_end)
14597	14605	goto partno;
14598	14606
14599		− memcpy(tp->fw_ver, &vpd_data[j], len);
14600		− strncat(tp->fw_ver, " bc ", vpdlen - len - 1);
	14607	+ if (len >= sizeof(tp->fw_ver))
	14608	+ len = sizeof(tp->fw_ver) - 1;
	14609	+ memset(tp->fw_ver, 0, sizeof(tp->fw_ver));
	14610	+ snprintf(tp->fw_ver, sizeof(tp->fw_ver), "%.*s bc ", len,
	14611	+ &vpd_data[j]);
14601	14612	}
14602	14613
14603	14614	partno:

drivers/net/ethernet/calxeda/xgmac.c+8−1

@@ -163,6 +163,7 @@ · 162 unmodified lines
163	163	#define XGMAC_FLOW_CTRL_FCB_BPA 0x00000001 /* Flow Control Busy ... */
164	164
165	165	/* XGMAC_INT_STAT reg */
	166	+#define XGMAC_INT_STAT_PMTIM 0x00800000 /* PMT Interrupt Mask */
166	167	#define XGMAC_INT_STAT_PMT 0x0080 /* PMT Interrupt Status */
167	168	#define XGMAC_INT_STAT_LPI 0x0040 /* LPI Interrupt Status */
168	169
@@ -960,6 +961,9 @@ static int xgmac_hw_init(struct net_device *dev) · 791 unmodified lines
960	961	writel(DMA_INTR_DEFAULT_MASK, ioaddr + XGMAC_DMA_STATUS);
961	962	writel(DMA_INTR_DEFAULT_MASK, ioaddr + XGMAC_DMA_INTR_ENA);
962	963
	964	+ /* Mask power mgt interrupt */
	965	+ writel(XGMAC_INT_STAT_PMTIM, ioaddr + XGMAC_INT_STAT);
	966	+
963	967	/* XGMAC requires AXI bus init. This is a 'magic number' for now */
964	968	writel(0x0077000E, ioaddr + XGMAC_DMA_AXI_BUS);
965	969
@@ -1141,6 +1145,9 @@ static int xgmac_rx(struct xgmac_priv *priv, int limit) · 175 unmodified lines
1141	1145	struct sk_buff *skb;
1142	1146	int frame_len;
1143	1147
	1148	+ if (!dma_ring_cnt(priv->rx_head, priv->rx_tail, DMA_RX_RING_SZ))
	1149	+ break;
	1150	+
1144	1151	entry = priv->rx_tail;
1145	1152	p = priv->dma_rx + entry;
1146	1153	if (desc_get_owner(p))
@@ -1825,7 +1832,7 @@ static void xgmac_pmt(void __iomem *ioaddr, unsigned long mode) · 678 unmodified lines
1825	1832	unsigned int pmt = 0;
1826	1833
1827	1834	if (mode & WAKE_MAGIC)
1828		− pmt \|= XGMAC_PMT_POWERDOWN \| XGMAC_PMT_MAGIC_PKT;
	1835	+ pmt \|= XGMAC_PMT_POWERDOWN \| XGMAC_PMT_MAGIC_PKT_EN;
1829	1836	if (mode & WAKE_UCAST)
1830	1837	pmt \|= XGMAC_PMT_POWERDOWN \| XGMAC_PMT_GLBL_UNICAST;
1831	1838

drivers/net/ethernet/chelsio/cxgb4/t4_hw.c+9−3

@@ -497,8 +497,9 @@ int t4_memory_write(struct adapter *adap, int mtype, u32 addr, u32 len, · 496 unmodified lines
497	497	}
498	498
499	499	#define EEPROM_STAT_ADDR 0x7bfc
500		−#define VPD_BASE 0
501	500	#define VPD_LEN 512
	501	+#define VPD_BASE 0x400
	502	+#define VPD_BASE_OLD 0
502	503
503	504	/**
504	505	* t4_seeprom_wp - enable/disable EEPROM write protection
@@ -524,7 +525,7 @@ int t4_seeprom_wp(struct adapter *adapter, bool enable) · 19 unmodified lines
524	525	int get_vpd_params(struct adapter adapter, struct vpd_params p)
525	526	{
526	527	u32 cclk_param, cclk_val;
527		− int i, ret;
	528	+ int i, ret, addr;
528	529	int ec, sn;
529	530	u8 *vpd, csum;
530	531	unsigned int vpdr_len, kw_offset, id_len;
@@ -533,7 +534,12 @@ int get_vpd_params(struct adapter adapter, struct vpd_params p) · 2 unmodified lines
533	534	if (!vpd)
534	535	return -ENOMEM;
535	536
536		− ret = pci_read_vpd(adapter->pdev, VPD_BASE, VPD_LEN, vpd);
	537	+ ret = pci_read_vpd(adapter->pdev, VPD_BASE, sizeof(u32), vpd);
	538	+ if (ret < 0)
	539	+ goto out;
	540	+ addr = *vpd == 0x82 ? VPD_BASE : VPD_BASE_OLD;
	541	+
	542	+ ret = pci_read_vpd(adapter->pdev, addr, VPD_LEN, vpd);
537	543	if (ret < 0)
538	544	goto out;
539	545

drivers/net/ethernet/davicom/dm9000.c+110−104

@@ -257,6 +257,107 @@ static void dm9000_dumpblk_32bit(void __iomem *reg, int count) · 256 unmodified lines
257	257	tmp = readl(reg);
258	258	}
259	259
	260	+/*
	261	+ * Sleep, either by using msleep() or if we are suspending, then
	262	+ * use mdelay() to sleep.
	263	+ */
	264	+static void dm9000_msleep(board_info_t *db, unsigned int ms)
	265	+{
	266	+ if (db->in_suspend)
	267	+ mdelay(ms);
	268	+ else
	269	+ msleep(ms);
	270	+}
	271	+
	272	+/* Read a word from phyxcer */
	273	+static int
	274	+dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg)
	275	+{
	276	+ board_info_t *db = netdev_priv(dev);
	277	+ unsigned long flags;
	278	+ unsigned int reg_save;
	279	+ int ret;
	280	+
	281	+ mutex_lock(&db->addr_lock);
	282	+
	283	+ spin_lock_irqsave(&db->lock, flags);
	284	+
	285	+ /* Save previous register address */
	286	+ reg_save = readb(db->io_addr);
	287	+
	288	+ /* Fill the phyxcer register into REG_0C */
	289	+ iow(db, DM9000_EPAR, DM9000_PHY \| reg);
	290	+
	291	+ /* Issue phyxcer read command */
	292	+ iow(db, DM9000_EPCR, EPCR_ERPRR \| EPCR_EPOS);
	293	+
	294	+ writeb(reg_save, db->io_addr);
	295	+ spin_unlock_irqrestore(&db->lock, flags);
	296	+
	297	+ dm9000_msleep(db, 1); /* Wait read complete */
	298	+
	299	+ spin_lock_irqsave(&db->lock, flags);
	300	+ reg_save = readb(db->io_addr);
	301	+
	302	+ iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
	303	+
	304	+ /* The read data keeps on REG_0D & REG_0E */
	305	+ ret = (ior(db, DM9000_EPDRH) << 8) \| ior(db, DM9000_EPDRL);
	306	+
	307	+ /* restore the previous address */
	308	+ writeb(reg_save, db->io_addr);
	309	+ spin_unlock_irqrestore(&db->lock, flags);
	310	+
	311	+ mutex_unlock(&db->addr_lock);
	312	+
	313	+ dm9000_dbg(db, 5, "phy_read[%02x] -> %04x\n", reg, ret);
	314	+ return ret;
	315	+}
	316	+
	317	+/* Write a word to phyxcer */
	318	+static void
	319	+dm9000_phy_write(struct net_device *dev,
	320	+ int phyaddr_unused, int reg, int value)
	321	+{
	322	+ board_info_t *db = netdev_priv(dev);
	323	+ unsigned long flags;
	324	+ unsigned long reg_save;
	325	+
	326	+ dm9000_dbg(db, 5, "phy_write[%02x] = %04x\n", reg, value);
	327	+ mutex_lock(&db->addr_lock);
	328	+
	329	+ spin_lock_irqsave(&db->lock, flags);
	330	+
	331	+ /* Save previous register address */
	332	+ reg_save = readb(db->io_addr);
	333	+
	334	+ /* Fill the phyxcer register into REG_0C */
	335	+ iow(db, DM9000_EPAR, DM9000_PHY \| reg);
	336	+
	337	+ /* Fill the written data into REG_0D & REG_0E */
	338	+ iow(db, DM9000_EPDRL, value);
	339	+ iow(db, DM9000_EPDRH, value >> 8);
	340	+
	341	+ /* Issue phyxcer write command */
	342	+ iow(db, DM9000_EPCR, EPCR_EPOS \| EPCR_ERPRW);
	343	+
	344	+ writeb(reg_save, db->io_addr);
	345	+ spin_unlock_irqrestore(&db->lock, flags);
	346	+
	347	+ dm9000_msleep(db, 1); /* Wait write complete */
	348	+
	349	+ spin_lock_irqsave(&db->lock, flags);
	350	+ reg_save = readb(db->io_addr);
	351	+
	352	+ iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */
	353	+
	354	+ /* restore the previous address */
	355	+ writeb(reg_save, db->io_addr);
	356	+
	357	+ spin_unlock_irqrestore(&db->lock, flags);
	358	+ mutex_unlock(&db->addr_lock);
	359	+}
	360	+
260	361	/* dm9000_set_io
261	362	*
262	363	* select the specified set of io routines to use with the
@@ -795,6 +896,9 @@ dm9000_init_dm9000(struct net_device *dev) · 532 unmodified lines
795	896
796	897	iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */
797	898
	899	+ dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */
	900	+ dm9000_phy_write(dev, 0, MII_DM_DSPCR, DSPCR_INIT_PARAM); /* Init */
	901	+
798	902	ncr = (db->flags & DM9000_PLATF_EXT_PHY) ? NCR_EXT_PHY : 0;
799	903
800	904	/* if wol is needed, then always set NCR_WAKEEN otherwise we end
@@ -1201,109 +1305,6 @@ dm9000_open(struct net_device *dev) · 400 unmodified lines
1201	1305	return 0;
1202	1306	}
1203	1307
1204		−/*
1205		− * Sleep, either by using msleep() or if we are suspending, then
1206		− * use mdelay() to sleep.
1207		− */
1208		−static void dm9000_msleep(board_info_t *db, unsigned int ms)
1209		−{
1210		− if (db->in_suspend)
1211		− mdelay(ms);
1212		− else
1213		− msleep(ms);
1214		−}
1215		−
1216		−/*
1217		− * Read a word from phyxcer
1218		− */
1219		−static int
1220		−dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg)
1221		−{
1222		− board_info_t *db = netdev_priv(dev);
1223		− unsigned long flags;
1224		− unsigned int reg_save;
1225		− int ret;
1226		−
1227		− mutex_lock(&db->addr_lock);
1228		−
1229		− spin_lock_irqsave(&db->lock,flags);
1230		−
1231		− /* Save previous register address */
1232		− reg_save = readb(db->io_addr);
1233		−
1234		− /* Fill the phyxcer register into REG_0C */
1235		− iow(db, DM9000_EPAR, DM9000_PHY \| reg);
1236		−
1237		− iow(db, DM9000_EPCR, EPCR_ERPRR \| EPCR_EPOS); /* Issue phyxcer read command */
1238		−
1239		− writeb(reg_save, db->io_addr);
1240		− spin_unlock_irqrestore(&db->lock,flags);
1241		−
1242		− dm9000_msleep(db, 1); /* Wait read complete */
1243		−
1244		− spin_lock_irqsave(&db->lock,flags);
1245		− reg_save = readb(db->io_addr);
1246		−
1247		− iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
1248		−
1249		− /* The read data keeps on REG_0D & REG_0E */
1250		− ret = (ior(db, DM9000_EPDRH) << 8) \| ior(db, DM9000_EPDRL);
1251		−
1252		− /* restore the previous address */
1253		− writeb(reg_save, db->io_addr);
1254		− spin_unlock_irqrestore(&db->lock,flags);
1255		−
1256		− mutex_unlock(&db->addr_lock);
1257		−
1258		− dm9000_dbg(db, 5, "phy_read[%02x] -> %04x\n", reg, ret);
1259		− return ret;
1260		−}
1261		−
1262		−/*
1263		− * Write a word to phyxcer
1264		− */
1265		−static void
1266		−dm9000_phy_write(struct net_device *dev,
1267		− int phyaddr_unused, int reg, int value)
1268		−{
1269		− board_info_t *db = netdev_priv(dev);
1270		− unsigned long flags;
1271		− unsigned long reg_save;
1272		−
1273		− dm9000_dbg(db, 5, "phy_write[%02x] = %04x\n", reg, value);
1274		− mutex_lock(&db->addr_lock);
1275		−
1276		− spin_lock_irqsave(&db->lock,flags);
1277		−
1278		− /* Save previous register address */
1279		− reg_save = readb(db->io_addr);
1280		−
1281		− /* Fill the phyxcer register into REG_0C */
1282		− iow(db, DM9000_EPAR, DM9000_PHY \| reg);
1283		−
1284		− /* Fill the written data into REG_0D & REG_0E */
1285		− iow(db, DM9000_EPDRL, value);
1286		− iow(db, DM9000_EPDRH, value >> 8);
1287		−
1288		− iow(db, DM9000_EPCR, EPCR_EPOS \| EPCR_ERPRW); /* Issue phyxcer write command */
1289		−
1290		− writeb(reg_save, db->io_addr);
1291		− spin_unlock_irqrestore(&db->lock, flags);
1292		−
1293		− dm9000_msleep(db, 1); /* Wait write complete */
1294		−
1295		− spin_lock_irqsave(&db->lock,flags);
1296		− reg_save = readb(db->io_addr);
1297		−
1298		− iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */
1299		−
1300		− /* restore the previous address */
1301		− writeb(reg_save, db->io_addr);
1302		−
1303		− spin_unlock_irqrestore(&db->lock, flags);
1304		− mutex_unlock(&db->addr_lock);
1305		−}
1306		−
1307	1308	static void
1308	1309	dm9000_shutdown(struct net_device *dev)
1309	1310	{
@@ -1502,7 +1503,12 @@ dm9000_probe(struct platform_device *pdev) · 192 unmodified lines
1502	1503	db->flags \|= DM9000_PLATF_SIMPLE_PHY;
1503	1504	#endif
1504	1505
1505		− dm9000_reset(db);
	1506	+ /* Fixing bug on dm9000_probe, takeover dm9000_reset(db),
	1507	+ * Need 'NCR_MAC_LBK' bit to indeed stable our DM9000 fifo
	1508	+ * while probe stage.
	1509	+ */
	1510	+
	1511	+ iow(db, DM9000_NCR, NCR_MAC_LBK \| NCR_RST);
1506	1512
1507	1513	/* try multiple times, DM9000 sometimes gets the read wrong */
1508	1514	for (i = 0; i < 8; i++) {

drivers/net/ethernet/davicom/dm9000.h+10−1

@@ -69,7 +69,9 @@ · 68 unmodified lines
69	69	#define NCR_WAKEEN (1<<6)
70	70	#define NCR_FCOL (1<<4)
71	71	#define NCR_FDX (1<<3)
72		−#define NCR_LBK (3<<1)
	72	+
	73	+#define NCR_RESERVED (3<<1)
	74	+#define NCR_MAC_LBK (1<<1)
73	75	#define NCR_RST (1<<0)
74	76
75	77	#define NSR_SPEED (1<<7)
@@ -167,5 +169,12 @@ · 91 unmodified lines
167	169	#define ISR_LNKCHNG (1<<5)
168	170	#define ISR_UNDERRUN (1<<4)
169	171
	172	+/* Davicom MII registers.
	173	+ */
	174	+
	175	+#define MII_DM_DSPCR 0x1b /* DSP Control Register */
	176	+
	177	+#define DSPCR_INIT_PARAM 0xE100 /* DSP init parameter */
	178	+
170	179	#endif /* _DM9000X_H_ */
171	180

drivers/net/ethernet/dec/tulip/Kconfig+1−0

@@ -108,6 +108,7 @@ config TULIP_DM910X · 107 unmodified lines
108	108	config DE4X5
109	109	tristate "Generic DECchip & DIGITAL EtherWORKS PCI/EISA"
110	110	depends on (PCI \|\| EISA)
	111	+ depends on VIRT_TO_BUS \|\| ALPHA \|\| PPC \|\| SPARC
111	112	select CRC32
112	113	---help---
113	114	This is support for the DIGITAL series of PCI/EISA Ethernet cards.

drivers/net/ethernet/emulex/benet/be_main.c+3−2

@@ -759,8 +759,9 @@ static struct sk_buff be_insert_vlan_in_pkt(struct be_adapter adapter, · 758 unmodified lines
759	759
760	760	if (vlan_tx_tag_present(skb)) {
761	761	vlan_tag = be_get_tx_vlan_tag(adapter, skb);
762		− __vlan_put_tag(skb, vlan_tag);
763		− skb->vlan_tci = 0;
	762	+ skb = __vlan_put_tag(skb, vlan_tag);
	763	+ if (skb)
	764	+ skb->vlan_tci = 0;
764	765	}
765	766
766	767	return skb;

drivers/net/ethernet/freescale/fec.c+69−45

@@ -345,6 +345,53 @@ fec_enet_start_xmit(struct sk_buff skb, struct net_device ndev) · 344 unmodified lines
345	345	return NETDEV_TX_OK;
346	346	}
347	347
	348	+/* Init RX & TX buffer descriptors
	349	+ */
	350	+static void fec_enet_bd_init(struct net_device *dev)
	351	+{
	352	+ struct fec_enet_private *fep = netdev_priv(dev);
	353	+ struct bufdesc *bdp;
	354	+ unsigned int i;
	355	+
	356	+ /* Initialize the receive buffer descriptors. */
	357	+ bdp = fep->rx_bd_base;
	358	+ for (i = 0; i < RX_RING_SIZE; i++) {
	359	+
	360	+ /* Initialize the BD for every fragment in the page. */
	361	+ if (bdp->cbd_bufaddr)
	362	+ bdp->cbd_sc = BD_ENET_RX_EMPTY;
	363	+ else
	364	+ bdp->cbd_sc = 0;
	365	+ bdp = fec_enet_get_nextdesc(bdp, fep->bufdesc_ex);
	366	+ }
	367	+
	368	+ /* Set the last buffer to wrap */
	369	+ bdp = fec_enet_get_prevdesc(bdp, fep->bufdesc_ex);
	370	+ bdp->cbd_sc \|= BD_SC_WRAP;
	371	+
	372	+ fep->cur_rx = fep->rx_bd_base;
	373	+
	374	+ /* ...and the same for transmit */
	375	+ bdp = fep->tx_bd_base;
	376	+ fep->cur_tx = bdp;
	377	+ for (i = 0; i < TX_RING_SIZE; i++) {
	378	+
	379	+ /* Initialize the BD for every fragment in the page. */
	380	+ bdp->cbd_sc = 0;
	381	+ if (bdp->cbd_bufaddr && fep->tx_skbuff[i]) {
	382	+ dev_kfree_skb_any(fep->tx_skbuff[i]);
	383	+ fep->tx_skbuff[i] = NULL;
	384	+ }
	385	+ bdp->cbd_bufaddr = 0;
	386	+ bdp = fec_enet_get_nextdesc(bdp, fep->bufdesc_ex);
	387	+ }
	388	+
	389	+ /* Set the last buffer to wrap */

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drivers/staging/comedi/drivers/usbduxfast.c+18−12

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drivers/staging/comedi/drivers/usbduxsigma.c+17−10

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drivers/staging/imx-drm/ipuv3-crtc.c+12−11

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drivers/staging/tidspbridge/rmgr/drv.c+26−44

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drivers/staging/vt6656/card.c+1−1

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drivers/staging/vt6656/main_usb.c+0−4

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drivers/staging/zcache/ramster/tcp.c+10−15

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drivers/target/iscsi/iscsi_target_auth.c+4−1

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drivers/target/target_core_alua.c+3−0

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drivers/target/target_core_file.h+1−1

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drivers/target/target_core_pscsi.c+8−3

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drivers/target/target_core_sbc.c+5−2

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drivers/thermal/rcar_thermal.c+14−15

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drivers/tty/mxser.c+4−4

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drivers/tty/serial/8250/8250_core.crenamed from drivers/tty/serial/8250/8250.c+53−1

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drivers/tty/serial/vt8500_serial.c+1−8

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drivers/tty/serial/xilinx_uartps.c+2−0

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drivers/tty/vt/vc_screen.c+4−2

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drivers/usb/Makefile+1−1

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drivers/usb/c67x00/c67x00-sched.c+2−2

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drivers/usb/chipidea/udc.c+3−3

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drivers/usb/class/cdc-acm.c+19−3

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drivers/usb/class/cdc-wdm.c+20−3

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drivers/usb/core/hcd-pci.c+14−9

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drivers/usb/core/port.c+0−1

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drivers/usb/core/usb-acpi.c+7−1

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drivers/usb/dwc3/core.c+1−0

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drivers/usb/dwc3/dwc3-exynos.c+0−2

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drivers/usb/dwc3/dwc3-pci.c+0−2

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drivers/usb/dwc3/ep0.c+4−3

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drivers/usb/dwc3/gadget.c+0−3

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drivers/usb/gadget/imx_udc.c+8−12

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drivers/usb/gadget/net2272.c+8−1

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drivers/usb/gadget/net2280.c+7−1

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drivers/usb/gadget/omap_udc.c+2−1

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drivers/usb/gadget/pxa25x_udc.c+15−9

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drivers/usb/gadget/pxa27x_udc.c+12−6

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drivers/usb/gadget/s3c2410_udc.c+12−16

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drivers/usb/host/ehci-hcd.c+3−4

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drivers/usb/host/ehci-hub.c+1−1

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drivers/usb/host/ehci-q.c+40−9

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drivers/usb/host/ehci-sched.c+2−0

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drivers/usb/host/ehci-timer.c+1−1

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drivers/usb/host/xhci-mem.c+8−28

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drivers/usb/host/xhci-ring.c+35−26

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drivers/usb/host/xhci.h+7−2

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drivers/usb/musb/Kconfig+0−5

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drivers/usb/musb/da8xx.c+1−1

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drivers/usb/musb/musb_core.c+0−6

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drivers/usb/musb/musb_gadget.c+7−2

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drivers/usb/musb/omap2430.c+8−4

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drivers/usb/otg/otg.c+7−3

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drivers/usb/phy/omap-control-usb.c+9−15

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drivers/usb/phy/omap-usb3.c+3−5

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drivers/usb/phy/samsung-usbphy.c+3−5

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drivers/usb/serial/ark3116.c+6−4

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drivers/usb/serial/cp210x.c+20−0

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drivers/usb/serial/cypress_m8.c+8−6

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drivers/usb/serial/f81232.c+5−4

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drivers/usb/serial/ftdi_sio.c+9−11

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drivers/usb/serial/ftdi_sio_ids.h+7−0

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drivers/usb/serial/garmin_gps.c+1−6

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drivers/usb/serial/io_edgeport.c+7−5

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drivers/usb/serial/io_ti.c+7−6

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drivers/usb/serial/mct_u232.c+7−6

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drivers/usb/serial/mos7840.c+10−6

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drivers/usb/serial/option.c+5−0

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drivers/usb/serial/oti6858.c+6−4

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drivers/usb/serial/pl2303.c+6−5

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drivers/usb/serial/qcaux.c+1−0

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drivers/usb/serial/quatech2.c+12−7

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drivers/usb/serial/spcp8x5.c+5−4

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drivers/usb/serial/ssu100.c+7−5

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drivers/usb/serial/ti_usb_3410_5052.c+6−4

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drivers/usb/serial/usb-serial.c+3−1

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drivers/usb/storage/initializers.c+2−74

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drivers/usb/storage/initializers.h+2−2

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drivers/usb/storage/unusual_devs.h+342−2

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drivers/vfio/pci/vfio_pci.c+2−1

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drivers/vfio/pci/vfio_pci_config.c+1−0

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drivers/vfio/pci/vfio_pci_intrs.c+1−0

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drivers/vhost/net.c+2−1

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drivers/vhost/tcm_vhost.c+148−72

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drivers/video/atmel_lcdfb.c+15−7

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drivers/video/ep93xx-fb.c+1−0

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drivers/video/fbmem.c+14−25

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drivers/video/fbmon.c+1−1

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drivers/video/mmp/core.c+0−2

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drivers/video/mxsfb.c+5−2

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drivers/video/omap/lcd_ams_delta.c+1−0

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drivers/video/omap/lcd_osk.c+3−0

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drivers/video/omap/omapfb_main.c+2−0

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drivers/video/omap2/displays/panel-tpo-td043mtea1.c+11−2

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drivers/video/omap2/dss/dss_features.c+2−4

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drivers/video/sh_mobile_lcdcfb.c+1−0

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drivers/video/uvesafb.c+2−1

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drivers/w1/masters/w1-gpio.c+4−2

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drivers/w1/w1.c+2−1

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drivers/watchdog/Kconfig+1−1

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drivers/watchdog/sp5100_tco.c+6−120

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drivers/watchdog/sp5100_tco.h+1−1

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drivers/xen/Kconfig+1−1

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drivers/xen/events.c+30−9

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drivers/xen/fallback.c+2−1

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drivers/xen/xen-acpi-processor.c+7−4

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drivers/xen/xen-pciback/pci_stub.c+44−15

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drivers/xen/xen-pciback/pciback_ops.c+2−1

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drivers/xen/xen-stub.c+0−1

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fs/binfmt_elf.c+1−0

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fs/bio.c+0−2

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fs/btrfs/disk-io.c+10−4

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fs/btrfs/extent-tree.c+76−13

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fs/btrfs/file-item.c+3−3

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fs/btrfs/inode.c+21−4

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fs/btrfs/locking.h+0−1

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fs/btrfs/qgroup.c+7−6

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fs/btrfs/scrub.c+2−1

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fs/btrfs/send.c+4−6

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fs/btrfs/transaction.c+5−6

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fs/btrfs/tree-log.c+42−6

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fs/btrfs/volumes.c+18−1

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fs/cifs/asn1.c+5−48

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fs/cifs/cifsfs.c+25−0

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fs/cifs/cifsfs.h+4−0

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fs/cifs/connect.c+13−3

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fs/cifs/file.c+5−1

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fs/cifs/inode.c+4−6

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fs/cifs/netmisc.c+1−1

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fs/compat.c+7−8

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fs/dcache.c+11−5

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fs/ecryptfs/miscdev.c+2−12

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fs/ext2/ialloc.c+0−1

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fs/ext4/extents.c+87−21

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fs/ext4/extents_status.c+207−5

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fs/ext4/extents_status.h+9−0

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fs/ext4/ialloc.c+2−2

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fs/ext4/indirect.c+2−2

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fs/ext4/inode.c+174−8

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fs/ext4/mballoc.c+8−15

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fs/ext4/move_extent.c+27−16

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fs/ext4/page-io.c+11−1

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fs/ext4/resize.c+2−2

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fs/ext4/super.c+4−2

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fs/freevxfs/vxfs_super.c+1−0

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fs/gfs2/file.c+4−1

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fs/gfs2/incore.h+1−0

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fs/gfs2/lock_dlm.c+20−19

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fs/gfs2/rgrp.c+14−18

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fs/hfsplus/extents.c+1−1

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fs/hostfs/hostfs_kern.c+1−0

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fs/hugetlbfs/inode.c+1−1

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fs/internal.h+5−0

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fs/jbd2/transaction.c+10−5

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fs/namespace.c+54−2

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fs/nfs/blocklayout/blocklayoutdm.c+2−2

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fs/nfs/idmap.c+8−5

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fs/nfs/nfs4client.c+29−16

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fs/nfs/nfs4filelayout.c+0−1

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fs/nfs/nfs4proc.c+2−15

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fs/nfs/nfs4state.c+7−1

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fs/nfs/pnfs.c+72−9

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fs/nfsd/nfs4state.c+2−34

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fs/nfsd/nfs4xdr.c+1−1

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fs/nfsd/nfscache.c+6−5

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fs/nfsd/vfs.c+2−1

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fs/proc/generic.c+89−30

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fs/splice.c+3−1

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fs/xfs/xfs_iomap.c+2−2

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include/acpi/processor.h+3−0

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include/asm-generic/atomic.h+0−6

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include/asm-generic/cmpxchg.h+10−0

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include/asm-generic/tlb.h+6−1

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include/drm/drm_pciids.h+12−1

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include/linux/ata.h+1−1

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include/linux/blktrace_api.h+0−1

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include/linux/capability.h+2−0

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net/wireless/wext-sme.c+6−0

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security/yama/yama_lsm.c+1−3

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sound/oss/sequencer.c+6−0

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sound/pci/asihpi/asihpi.c+2−1

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sound/pci/hda/patch_cirrus.c+6−2

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sound/soc/codecs/max98090.c+0−0

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