lael-labs/linux

.mailmap+3−1

 Oleksij Rempel <linux@rempel-privat.de> <ore@pengutronix.de>
 Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it>
 Patrick Mochel <mochel@digitalimplant.org>
-Paul Burton <paul.burton@mips.com> <paul.burton@imgtec.com>
+Paul Burton <paulburton@kernel.org> <paul.burton@imgtec.com>
+Paul Burton <paulburton@kernel.org> <paul.burton@mips.com>
 Peter A Jonsson <pj@ludd.ltu.se>
 Peter Oruba <peter@oruba.de>
 Peter Oruba <peter.oruba@amd.com>
 Shuah Khan <shuah@kernel.org> <shuah.khan@hp.com>
 Shuah Khan <shuah@kernel.org> <shuahkh@osg.samsung.com>
 Shuah Khan <shuah@kernel.org> <shuah.kh@samsung.com>
+Simon Arlott <simon@octiron.net> <simon@fire.lp0.eu>
 Simon Kelley <simon@thekelleys.org.uk>
 Stéphane Witzmann <stephane.witzmann@ubpmes.univ-bpclermont.fr>
 Stephen Hemminger <shemminger@osdl.org>

Documentation/arm64/silicon-errata.rst+2−0

 +----------------+-----------------+-----------------+-----------------------------+
 | Cavium         | ThunderX2 SMMUv3| #126            | N/A                         |
 +----------------+-----------------+-----------------+-----------------------------+
+| Cavium         | ThunderX2 Core  | #219            | CAVIUM_TX2_ERRATUM_219      |
++----------------+-----------------+-----------------+-----------------------------+
 +----------------+-----------------+-----------------+-----------------------------+
 | Freescale/NXP  | LS2080A/LS1043A | A-008585        | FSL_ERRATUM_A008585         |
 +----------------+-----------------+-----------------+-----------------------------+

Documentation/dev-tools/kasan.rst+3−0

@@ -41,6 +41,9 @@ smaller binary while the latter is 1.1 - 2 times faster. · 40 unmodified lines
41	Both KASAN modes work with both SLUB and SLAB memory allocators.	41	Both KASAN modes work with both SLUB and SLAB memory allocators.
42	For better bug detection and nicer reporting, enable CONFIG_STACKTRACE.	42	For better bug detection and nicer reporting, enable CONFIG_STACKTRACE.
43		43
		44	To augment reports with last allocation and freeing stack of the physical page,
		45	it is recommended to enable also CONFIG_PAGE_OWNER and boot with page_owner=on.
		46
44	To disable instrumentation for specific files or directories, add a line	47	To disable instrumentation for specific files or directories, add a line
45	similar to the following to the respective kernel Makefile:	48	similar to the following to the respective kernel Makefile:
46		49

Documentation/devicetree/bindings/arm/rockchip.yaml+2−2

@@ -496,12 +496,12 @@ properties: · 495 unmodified lines
496		496
497	- description: Theobroma Systems RK3368-uQ7 with Haikou baseboard	497	- description: Theobroma Systems RK3368-uQ7 with Haikou baseboard
498	items:	498	items:
499	- const: tsd,rk3368-uq7-haikou	499	- const: tsd,rk3368-lion-haikou
500	- const: rockchip,rk3368	500	- const: rockchip,rk3368
501		501
502	- description: Theobroma Systems RK3399-Q7 with Haikou baseboard	502	- description: Theobroma Systems RK3399-Q7 with Haikou baseboard
503	items:	503	items:
504	- const: tsd,rk3399-q7-haikou	504	- const: tsd,rk3399-puma-haikou
505	- const: rockchip,rk3399	505	- const: rockchip,rk3399
506		506
507	- description: Tronsmart Orion R68 Meta	507	- description: Tronsmart Orion R68 Meta

Documentation/devicetree/bindings/interrupt-controller/atmel,aic.txt+5−2

 * Advanced Interrupt Controller (AIC)
 Required properties:
-- compatible: Should be "atmel,<chip>-aic"
+- compatible: Should be:
-  <chip> can be "at91rm9200", "sama5d2", "sama5d3" or "sama5d4"
+    - "atmel,<chip>-aic" where  <chip> can be "at91rm9200", "sama5d2",
+      "sama5d3" or "sama5d4"
+    - "microchip,<chip>-aic" where <chip> can be "sam9x60"
 - interrupt-controller: Identifies the node as an interrupt controller.
 - #interrupt-cells: The number of cells to define the interrupts. It should be 3.
   The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet).

Documentation/devicetree/bindings/media/allwinner,sun4i-a10-csi.yaml+3−6

 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
 %YAML 1.2
 ---
-$id: http://devicetree.org/schemas/arm/allwinner,sun4i-a10-csi.yaml#
+$id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-csi.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 title: Allwinner A10 CMOS Sensor Interface (CSI) Device Tree Bindings
   clocks:
     items:
       - description: The CSI interface clock
-      - description: The CSI module clock
       - description: The CSI ISP clock
       - description: The CSI DRAM clock
   clock-names:
     items:
       - const: bus
-      - const: mod
       - const: isp
       - const: ram
         compatible = "allwinner,sun7i-a20-csi0";
         reg = <0x01c09000 0x1000>;
         interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
-        clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI0>,
+        clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>;
-                 <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>;
+        clock-names = "bus", "isp", "ram";
-        clock-names = "bus", "mod", "isp", "ram";
         resets = <&ccu RST_CSI0>;
         port {

Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml+42−44

@@ -33,13 +33,13 @@ patternProperties: · 32 unmodified lines
33	allOf:	33	allOf:
34	- $ref: "/schemas/types.yaml#/definitions/string"	34	- $ref: "/schemas/types.yaml#/definitions/string"
35	- enum: [ ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14, ADC15,	35	- enum: [ ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14, ADC15,
36	ADC2, ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, ESPI,	36	ADC2, ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, EMMC,
37	ESPIALT, FSI1, FSI2, FWSPIABR, FWSPID, FWSPIWP, GPIT0, GPIT1,	37	ESPI, ESPIALT, FSI1, FSI2, FWSPIABR, FWSPID, FWSPIWP, GPIT0,
38	GPIT2, GPIT3, GPIT4, GPIT5, GPIT6, GPIT7, GPIU0, GPIU1, GPIU2,	38	GPIT1, GPIT2, GPIT3, GPIT4, GPIT5, GPIT6, GPIT7, GPIU0, GPIU1,
39	GPIU3, GPIU4, GPIU5, GPIU6, GPIU7, I2C1, I2C10, I2C11, I2C12,	39	GPIU2, GPIU3, GPIU4, GPIU5, GPIU6, GPIU7, I2C1, I2C10, I2C11,
40	I2C13, I2C14, I2C15, I2C16, I2C2, I2C3, I2C4, I2C5, I2C6, I2C7,	40	I2C12, I2C13, I2C14, I2C15, I2C16, I2C2, I2C3, I2C4, I2C5, I2C6,
41	I2C8, I2C9, I3C3, I3C4, I3C5, I3C6, JTAGM, LHPD, LHSIRQ, LPC,	41	I2C7, I2C8, I2C9, I3C3, I3C4, I3C5, I3C6, JTAGM, LHPD, LHSIRQ,
42	LPCHC, LPCPD, LPCPME, LPCSMI, LSIRQ, MACLINK1, MACLINK2,	42	LPC, LPCHC, LPCPD, LPCPME, LPCSMI, LSIRQ, MACLINK1, MACLINK2,
43	MACLINK3, MACLINK4, MDIO1, MDIO2, MDIO3, MDIO4, NCTS1, NCTS2,	43	MACLINK3, MACLINK4, MDIO1, MDIO2, MDIO3, MDIO4, NCTS1, NCTS2,
44	NCTS3, NCTS4, NDCD1, NDCD2, NDCD3, NDCD4, NDSR1, NDSR2, NDSR3,	44	NCTS3, NCTS4, NDCD1, NDCD2, NDCD3, NDCD4, NDSR1, NDSR2, NDSR3,
45	NDSR4, NDTR1, NDTR2, NDTR3, NDTR4, NRI1, NRI2, NRI3, NRI4, NRTS1,	45	NDSR4, NDTR1, NDTR2, NDTR3, NDTR4, NRI1, NRI2, NRI3, NRI4, NRTS1,
@@ -48,47 +48,45 @@ patternProperties: · 2 unmodified lines
48	PWM8, PWM9, RGMII1, RGMII2, RGMII3, RGMII4, RMII1, RMII2, RMII3,	48	PWM8, PWM9, RGMII1, RGMII2, RGMII3, RGMII4, RMII1, RMII2, RMII3,
49	RMII4, RXD1, RXD2, RXD3, RXD4, SALT1, SALT10, SALT11, SALT12,	49	RMII4, RXD1, RXD2, RXD3, RXD4, SALT1, SALT10, SALT11, SALT12,
50	SALT13, SALT14, SALT15, SALT16, SALT2, SALT3, SALT4, SALT5,	50	SALT13, SALT14, SALT15, SALT16, SALT2, SALT3, SALT4, SALT5,
51	SALT6, SALT7, SALT8, SALT9, SD1, SD2, SD3, SD3DAT4, SD3DAT5,	51	SALT6, SALT7, SALT8, SALT9, SD1, SD2, SGPM1, SGPS1, SIOONCTRL,
52	SD3DAT6, SD3DAT7, SGPM1, SGPS1, SIOONCTRL, SIOPBI, SIOPBO,	52	SIOPBI, SIOPBO, SIOPWREQ, SIOPWRGD, SIOS3, SIOS5, SIOSCI, SPI1,
53	SIOPWREQ, SIOPWRGD, SIOS3, SIOS5, SIOSCI, SPI1, SPI1ABR, SPI1CS1,	53	SPI1ABR, SPI1CS1, SPI1WP, SPI2, SPI2CS1, SPI2CS2, TACH0, TACH1,
54	SPI1WP, SPI2, SPI2CS1, SPI2CS2, TACH0, TACH1, TACH10, TACH11,	54	TACH10, TACH11, TACH12, TACH13, TACH14, TACH15, TACH2, TACH3,
55	TACH12, TACH13, TACH14, TACH15, TACH2, TACH3, TACH4, TACH5,	55	TACH4, TACH5, TACH6, TACH7, TACH8, TACH9, THRU0, THRU1, THRU2,
56	TACH6, TACH7, TACH8, TACH9, THRU0, THRU1, THRU2, THRU3, TXD1,	56	THRU3, TXD1, TXD2, TXD3, TXD4, UART10, UART11, UART12, UART13,
57	TXD2, TXD3, TXD4, UART10, UART11, UART12, UART13, UART6, UART7,	57	UART6, UART7, UART8, UART9, VB, VGAHS, VGAVS, WDTRST1, WDTRST2,
58	UART8, UART9, VB, VGAHS, VGAVS, WDTRST1, WDTRST2, WDTRST3,	58	WDTRST3, WDTRST4, ]
59	WDTRST4, ]
60	groups:	59	groups:
61	allOf:	60	allOf:
62	- $ref: "/schemas/types.yaml#/definitions/string"	61	- $ref: "/schemas/types.yaml#/definitions/string"
63	- enum: [ ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14, ADC15,	62	- enum: [ ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14, ADC15,
64	ADC2, ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, ESPI,	63	ADC2, ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, EMMCG1,
65	ESPIALT, FSI1, FSI2, FWSPIABR, FWSPID, FWQSPID, FWSPIWP, GPIT0,	64	EMMCG4, EMMCG8, ESPI, ESPIALT, FSI1, FSI2, FWSPIABR, FWSPID,
66	GPIT1, GPIT2, GPIT3, GPIT4, GPIT5, GPIT6, GPIT7, GPIU0, GPIU1,	65	FWQSPID, FWSPIWP, GPIT0, GPIT1, GPIT2, GPIT3, GPIT4, GPIT5,
67	GPIU2, GPIU3, GPIU4, GPIU5, GPIU6, GPIU7, HVI3C3, HVI3C4, I2C1,	66	GPIT6, GPIT7, GPIU0, GPIU1, GPIU2, GPIU3, GPIU4, GPIU5, GPIU6,
68	I2C10, I2C11, I2C12, I2C13, I2C14, I2C15, I2C16, I2C2, I2C3,	67	GPIU7, HVI3C3, HVI3C4, I2C1, I2C10, I2C11, I2C12, I2C13, I2C14,
69	I2C4, I2C5, I2C6, I2C7, I2C8, I2C9, I3C3, I3C4, I3C5, I3C6,	68	I2C15, I2C16, I2C2, I2C3, I2C4, I2C5, I2C6, I2C7, I2C8, I2C9,
70	JTAGM, LHPD, LHSIRQ, LPC, LPCHC, LPCPD, LPCPME, LPCSMI, LSIRQ,	69	I3C3, I3C4, I3C5, I3C6, JTAGM, LHPD, LHSIRQ, LPC, LPCHC, LPCPD,
71	MACLINK1, MACLINK2, MACLINK3, MACLINK4, MDIO1, MDIO2, MDIO3,	70	LPCPME, LPCSMI, LSIRQ, MACLINK1, MACLINK2, MACLINK3, MACLINK4,
72	MDIO4, NCTS1, NCTS2, NCTS3, NCTS4, NDCD1, NDCD2, NDCD3, NDCD4,	71	MDIO1, MDIO2, MDIO3, MDIO4, NCTS1, NCTS2, NCTS3, NCTS4, NDCD1,
73	NDSR1, NDSR2, NDSR3, NDSR4, NDTR1, NDTR2, NDTR3, NDTR4, NRI1,	72	NDCD2, NDCD3, NDCD4, NDSR1, NDSR2, NDSR3, NDSR4, NDTR1, NDTR2,
74	NRI2, NRI3, NRI4, NRTS1, NRTS2, NRTS3, NRTS4, OSCCLK, PEWAKE,	73	NDTR3, NDTR4, NRI1, NRI2, NRI3, NRI4, NRTS1, NRTS2, NRTS3, NRTS4,
75	PWM0, PWM1, PWM10G0, PWM10G1, PWM11G0, PWM11G1, PWM12G0, PWM12G1,	74	OSCCLK, PEWAKE, PWM0, PWM1, PWM10G0, PWM10G1, PWM11G0, PWM11G1,
76	PWM13G0, PWM13G1, PWM14G0, PWM14G1, PWM15G0, PWM15G1, PWM2, PWM3,	75	PWM12G0, PWM12G1, PWM13G0, PWM13G1, PWM14G0, PWM14G1, PWM15G0,
77	PWM4, PWM5, PWM6, PWM7, PWM8G0, PWM8G1, PWM9G0, PWM9G1, QSPI1,	76	PWM15G1, PWM2, PWM3, PWM4, PWM5, PWM6, PWM7, PWM8G0, PWM8G1,
78	QSPI2, RGMII1, RGMII2, RGMII3, RGMII4, RMII1, RMII2, RMII3,	77	PWM9G0, PWM9G1, QSPI1, QSPI2, RGMII1, RGMII2, RGMII3, RGMII4,
79	RMII4, RXD1, RXD2, RXD3, RXD4, SALT1, SALT10G0, SALT10G1,	78	RMII1, RMII2, RMII3, RMII4, RXD1, RXD2, RXD3, RXD4, SALT1,
80	SALT11G0, SALT11G1, SALT12G0, SALT12G1, SALT13G0, SALT13G1,	79	SALT10G0, SALT10G1, SALT11G0, SALT11G1, SALT12G0, SALT12G1,
81	SALT14G0, SALT14G1, SALT15G0, SALT15G1, SALT16G0, SALT16G1,	80	SALT13G0, SALT13G1, SALT14G0, SALT14G1, SALT15G0, SALT15G1,
82	SALT2, SALT3, SALT4, SALT5, SALT6, SALT7, SALT8, SALT9G0,	81	SALT16G0, SALT16G1, SALT2, SALT3, SALT4, SALT5, SALT6, SALT7,
83	SALT9G1, SD1, SD2, SD3, SD3DAT4, SD3DAT5, SD3DAT6, SD3DAT7,	82	SALT8, SALT9G0, SALT9G1, SD1, SD2, SD3, SGPM1, SGPS1, SIOONCTRL,
84	SGPM1, SGPS1, SIOONCTRL, SIOPBI, SIOPBO, SIOPWREQ, SIOPWRGD,	83	SIOPBI, SIOPBO, SIOPWREQ, SIOPWRGD, SIOS3, SIOS5, SIOSCI, SPI1,
85	SIOS3, SIOS5, SIOSCI, SPI1, SPI1ABR, SPI1CS1, SPI1WP, SPI2,	84	SPI1ABR, SPI1CS1, SPI1WP, SPI2, SPI2CS1, SPI2CS2, TACH0, TACH1,
86	SPI2CS1, SPI2CS2, TACH0, TACH1, TACH10, TACH11, TACH12, TACH13,	85	TACH10, TACH11, TACH12, TACH13, TACH14, TACH15, TACH2, TACH3,
87	TACH14, TACH15, TACH2, TACH3, TACH4, TACH5, TACH6, TACH7, TACH8,	86	TACH4, TACH5, TACH6, TACH7, TACH8, TACH9, THRU0, THRU1, THRU2,
88	TACH9, THRU0, THRU1, THRU2, THRU3, TXD1, TXD2, TXD3, TXD4,	87	THRU3, TXD1, TXD2, TXD3, TXD4, UART10, UART11, UART12G0,
89	UART10, UART11, UART12G0, UART12G1, UART13G0, UART13G1, UART6,	88	UART12G1, UART13G0, UART13G1, UART6, UART7, UART8, UART9, VB,
90	UART7, UART8, UART9, VB, VGAHS, VGAVS, WDTRST1, WDTRST2, WDTRST3,	89	VGAHS, VGAVS, WDTRST1, WDTRST2, WDTRST3, WDTRST4, ]
91	WDTRST4, ]
92		90
93	required:	91	required:
94	- compatible	92	- compatible

Documentation/devicetree/bindings/regulator/fixed-regulator.yaml+2−2

@@ -30,8 +30,8 @@ if: · 29 unmodified lines
30	properties:	30	properties:
31	compatible:	31	compatible:
32	enum:	32	enum:
33	- const: regulator-fixed	33	- regulator-fixed
34	- const: regulator-fixed-clock	34	- regulator-fixed-clock
35		35
36	regulator-name: true	36	regulator-name: true
37		37

Documentation/devicetree/bindings/riscv/cpus.yaml+13−16

 properties:
   compatible:
-    items:
+    oneOf:
-      - enum:
+      - items:
-          - sifive,rocket0
+          - enum:
-          - sifive,e5
+              - sifive,rocket0
-          - sifive,e51
+              - sifive,e5
-          - sifive,u54-mc
+              - sifive,e51
-          - sifive,u54
+              - sifive,u54-mc
-          - sifive,u5
+              - sifive,u54
-      - const: riscv
+              - sifive,u5
+          - const: riscv
+      - const: riscv    # Simulator only
     description:
       Identifies that the hart uses the RISC-V instruction set
       and identifies the type of the hart.
       insensitive, letters in the riscv,isa string must be all
       lowercase to simplify parsing.
-  timebase-frequency:
+  # RISC-V requires 'timebase-frequency' in /cpus, so disallow it here
-    type: integer
+  timebase-frequency: false
-    minimum: 1
-    description:
-      Specifies the clock frequency of the system timer in Hz.
-      This value is common to all harts on a single system image.
   interrupt-controller:
     type: object
 required:
   - riscv,isa
-  - timebase-frequency
   - interrupt-controller
 examples:

Documentation/networking/device_drivers/pensando/ionic.rst+3−1

@@ -36,8 +36,10 @@ Support · 35 unmodified lines
36	=======	36	=======
37	For general Linux networking support, please use the netdev mailing	37	For general Linux networking support, please use the netdev mailing
38	list, which is monitored by Pensando personnel::	38	list, which is monitored by Pensando personnel::
		39
39	netdev@vger.kernel.org	40	netdev@vger.kernel.org
40		41
41	For more specific support needs, please use the Pensando driver support	42	For more specific support needs, please use the Pensando driver support
42	email::	43	email::
43	drivers@pensando.io	44
		45	drivers@pensando.io

Documentation/networking/net_dim.txt+18−18

@@ -92,16 +92,16 @@ under some conditions. · 91 unmodified lines
92	Part III: Registering a Network Device to DIM	92	Part III: Registering a Network Device to DIM
93	==============================================	93	==============================================
94		94
95	Net DIM API exposes the main function net_dim(struct net_dim *dim,	95	Net DIM API exposes the main function net_dim(struct dim *dim,
96	struct net_dim_sample end_sample). This function is the entry point to the Net	96	struct dim_sample end_sample). This function is the entry point to the Net
97	DIM algorithm and has to be called every time the driver would like to check if	97	DIM algorithm and has to be called every time the driver would like to check if
98	it should change interrupt moderation parameters. The driver should provide two	98	it should change interrupt moderation parameters. The driver should provide two
99	data structures: struct net_dim and struct net_dim_sample. Struct net_dim	99	data structures: struct dim and struct dim_sample. Struct dim
100	describes the state of DIM for a specific object (RX queue, TX queue,	100	describes the state of DIM for a specific object (RX queue, TX queue,
101	other queues, etc.). This includes the current selected profile, previous data	101	other queues, etc.). This includes the current selected profile, previous data
102	samples, the callback function provided by the driver and more.	102	samples, the callback function provided by the driver and more.
103	Struct net_dim_sample describes a data sample, which will be compared to the	103	Struct dim_sample describes a data sample, which will be compared to the
104	data sample stored in struct net_dim in order to decide on the algorithm's next	104	data sample stored in struct dim in order to decide on the algorithm's next
105	step. The sample should include bytes, packets and interrupts, measured by	105	step. The sample should include bytes, packets and interrupts, measured by
106	the driver.	106	the driver.
107		107
@@ -110,9 +110,9 @@ main net_dim() function. The recommended method is to call net_dim() on each · 2 unmodified lines
110	interrupt. Since Net DIM has a built-in moderation and it might decide to skip	110	interrupt. Since Net DIM has a built-in moderation and it might decide to skip
111	iterations under certain conditions, there is no need to moderate the net_dim()	111	iterations under certain conditions, there is no need to moderate the net_dim()
112	calls as well. As mentioned above, the driver needs to provide an object of type	112	calls as well. As mentioned above, the driver needs to provide an object of type
113	struct net_dim to the net_dim() function call. It is advised for each entity	113	struct dim to the net_dim() function call. It is advised for each entity
114	using Net DIM to hold a struct net_dim as part of its data structure and use it	114	using Net DIM to hold a struct dim as part of its data structure and use it
115	as the main Net DIM API object. The struct net_dim_sample should hold the latest	115	as the main Net DIM API object. The struct dim_sample should hold the latest
116	bytes, packets and interrupts count. No need to perform any calculations, just	116	bytes, packets and interrupts count. No need to perform any calculations, just
117	include the raw data.	117	include the raw data.
118		118
@@ -132,19 +132,19 @@ usage is not complete but it should make the outline of the usage clear. · 13 unmodified lines
132		132
133	my_driver.c:	133	my_driver.c:
134		134
135	#include <linux/net_dim.h>	135	#include <linux/dim.h>
136		136
137	/* Callback for net DIM to schedule on a decision to change moderation */	137	/* Callback for net DIM to schedule on a decision to change moderation */
138	void my_driver_do_dim_work(struct work_struct *work)	138	void my_driver_do_dim_work(struct work_struct *work)
139	{	139	{
140	/* Get struct net_dim from struct work_struct */	140	/* Get struct dim from struct work_struct */
141	struct net_dim *dim = container_of(work, struct net_dim,	141	struct dim *dim = container_of(work, struct dim,
142	work);	142	work);
143	/* Do interrupt moderation related stuff */	143	/* Do interrupt moderation related stuff */
144	...	144	...
145		145
146	/* Signal net DIM work is done and it should move to next iteration */	146	/* Signal net DIM work is done and it should move to next iteration */
147	dim->state = NET_DIM_START_MEASURE;	147	dim->state = DIM_START_MEASURE;
148	}	148	}
149		149
150	/* My driver's interrupt handler */	150	/* My driver's interrupt handler */
@@ -152,13 +152,13 @@ int my_driver_handle_interrupt(struct my_driver_entity *my_entity, ...) · 1 unmodified line
152	{	152	{
153	...	153	...
154	/* A struct to hold current measured data */	154	/* A struct to hold current measured data */
155	struct net_dim_sample dim_sample;	155	struct dim_sample dim_sample;
156	...	156	...
157	/* Initiate data sample struct with current data */	157	/* Initiate data sample struct with current data */
158	net_dim_sample(my_entity->events,	158	dim_update_sample(my_entity->events,
159	my_entity->packets,	159	my_entity->packets,
160	my_entity->bytes,	160	my_entity->bytes,
161	&dim_sample);	161	&dim_sample);
162	/* Call net DIM */	162	/* Call net DIM */
163	net_dim(&my_entity->dim, dim_sample);	163	net_dim(&my_entity->dim, dim_sample);
164	...	164	...

MAINTAINERS+17−13

 ARM/SPREADTRUM SoC SUPPORT
 M:	Orson Zhai <orsonzhai@gmail.com>
-M:	Baolin Wang <baolin.wang@linaro.org>
+M:	Baolin Wang <baolin.wang7@gmail.com>
 M:	Chunyan Zhang <zhang.lyra@gmail.com>
 S:	Maintained
 F:	arch/arm64/boot/dts/sprd
 N:	sprd
+N:	sc27xx
+N:	sc2731
 ARM/STI ARCHITECTURE
 M:	Patrice Chotard <patrice.chotard@st.com>
 F:	arch/arm64/net/
 BPF JIT for MIPS (32-BIT AND 64-BIT)
-M:	Paul Burton <paul.burton@mips.com>
+M:	Paul Burton <paulburton@kernel.org>
 L:	netdev@vger.kernel.org
 L:	bpf@vger.kernel.org
 S:	Maintained
 N:	kona
 F:	arch/arm/mach-bcm/
-BROADCOM BCM2835 ARM ARCHITECTURE
+BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE
 M:	Eric Anholt <eric@anholt.net>
 M:	Stefan Wahren <wahrenst@gmx.net>
 L:	bcm-kernel-feedback-list@broadcom.com
 L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 T:	git git://github.com/anholt/linux
 S:	Maintained
+N:	bcm2711
 N:	bcm2835
 F:	drivers/staging/vc04_services
 F:	drivers/usb/gadget/udc/bcm63xx_udc.*
 BROADCOM BCM7XXX ARM ARCHITECTURE
-M:	Brian Norris <computersforpeace@gmail.com>
-M:	Gregory Fong <gregory.0xf0@gmail.com>
 M:	Florian Fainelli <f.fainelli@gmail.com>
 M:	bcm-kernel-feedback-list@broadcom.com
 L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 F:	drivers/usb/atm/ueagle-atm.c
 IMGTEC ASCII LCD DRIVER
-M:	Paul Burton <paul.burton@mips.com>
+M:	Paul Burton <paulburton@kernel.org>
 S:	Maintained
 F:	Documentation/devicetree/bindings/auxdisplay/img-ascii-lcd.txt
 F:	drivers/auxdisplay/img-ascii-lcd.c
 F:	include/linux/ks0108.h
 L3MDEV
-M:	David Ahern <dsa@cumulusnetworks.com>
+M:	David Ahern <dsahern@kernel.org>
 L:	netdev@vger.kernel.org
 S:	Maintained
 F:	net/l3mdev
 M:	Felix Fietkau <nbd@openwrt.org>
 M:	John Crispin <john@phrozen.org>
 M:	Sean Wang <sean.wang@mediatek.com>
-M:	Nelson Chang <nelson.chang@mediatek.com>
+M:	Mark Lee <Mark-MC.Lee@mediatek.com>
 L:	netdev@vger.kernel.org
 S:	Maintained
 F:	drivers/net/ethernet/mediatek/
 MIPS
 M:	Ralf Baechle <ralf@linux-mips.org>
-M:	Paul Burton <paul.burton@mips.com>
+M:	Paul Burton <paulburton@kernel.org>
 M:	James Hogan <jhogan@kernel.org>
 L:	linux-mips@vger.kernel.org
 W:	http://www.linux-mips.org/
 F:	drivers/platform/mips/
 MIPS BOSTON DEVELOPMENT BOARD
-M:	Paul Burton <paul.burton@mips.com>
+M:	Paul Burton <paulburton@kernel.org>
 L:	linux-mips@vger.kernel.org
 S:	Maintained
 F:	Documentation/devicetree/bindings/clock/img,boston-clock.txt
 F:	include/dt-bindings/clock/boston-clock.h
 MIPS GENERIC PLATFORM
-M:	Paul Burton <paul.burton@mips.com>
+M:	Paul Burton <paulburton@kernel.org>
 L:	linux-mips@vger.kernel.org
 S:	Supported
 F:	Documentation/devicetree/bindings/power/mti,mips-cpc.txt
 F:	Documentation/parisc/
 F:	drivers/parisc/
 F:	drivers/char/agp/parisc-agp.c
+F:	drivers/input/misc/hp_sdc_rtc.c
 F:	drivers/input/serio/gscps2.c
+F:	drivers/input/serio/hp_sdc*
 F:	drivers/parport/parport_gsc.*
 F:	drivers/tty/serial/8250/8250_gsc.c
 F:	drivers/video/fbdev/sti*
 F:	drivers/video/console/sti*
 F:	drivers/video/logo/logo_parisc*
+F:	include/linux/hp_sdc.h
 PARMAN
 M:	Jiri Pirko <jiri@mellanox.com>
 F:	drivers/scsi/qla1280.[ch]
 QLOGIC QLA2XXX FC-SCSI DRIVER
-M:	qla2xxx-upstream@qlogic.com
+M:	hmadhani@marvell.com
 L:	linux-scsi@vger.kernel.org
 S:	Supported
 F:	Documentation/scsi/LICENSE.qla2xxx
 K:	regulator_get_optional
 VRF
-M:	David Ahern <dsa@cumulusnetworks.com>
+M:	David Ahern <dsahern@kernel.org>
 M:	Shrijeet Mukherjee <shrijeet@gmail.com>
 L:	netdev@vger.kernel.org
 S:	Maintained

Makefile+3−3

@@ -2,8 +2,8 @@ · 1 unmodified line
2	VERSION = 5	2	VERSION = 5
3	PATCHLEVEL = 4	3	PATCHLEVEL = 4
4	SUBLEVEL = 0	4	SUBLEVEL = 0
5	EXTRAVERSION = -rc3	5	EXTRAVERSION = -rc5
6	NAME = Nesting Opossum	6	NAME = Kleptomaniac Octopus
7		7
8	# DOCUMENTATION	8	# DOCUMENTATION
9	# To see a list of typical targets execute "make help"	9	# To see a list of typical targets execute "make help"
@@ -1037,7 +1037,7 @@ export KBUILD_VMLINUX_OBJS := $(head-y) $(init-y) $(core-y) $(libs-y2) \ · 1027 unmodified lines
1037	export KBUILD_VMLINUX_LIBS := $(libs-y1)	1037	export KBUILD_VMLINUX_LIBS := $(libs-y1)
1038	export KBUILD_LDS := arch/$(SRCARCH)/kernel/vmlinux.lds	1038	export KBUILD_LDS := arch/$(SRCARCH)/kernel/vmlinux.lds
1039	export LDFLAGS_vmlinux	1039	export LDFLAGS_vmlinux
1040	# used by scripts/package/Makefile	1040	# used by scripts/Makefile.package
1041	export KBUILD_ALLDIRS := $(sort $(filter-out arch/%,$(vmlinux-alldirs)) LICENSES arch include scripts tools)	1041	export KBUILD_ALLDIRS := $(sort $(filter-out arch/%,$(vmlinux-alldirs)) LICENSES arch include scripts tools)
1042		1042
1043	vmlinux-deps := $(KBUILD_LDS) $(KBUILD_VMLINUX_OBJS) $(KBUILD_VMLINUX_LIBS)	1043	vmlinux-deps := $(KBUILD_LDS) $(KBUILD_VMLINUX_OBJS) $(KBUILD_VMLINUX_LIBS)

arch/arm/boot/dts/am3874-iceboard.dts+1−8

 		reg = <0x70>;
 		#address-cells = <1>;
 		#size-cells = <0>;
+		i2c-mux-idle-disconnect;
 		i2c@0 {
 			/* FMC A */
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <0>;
-			i2c-mux-idle-disconnect;
 		};
 		i2c@1 {
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <1>;
-			i2c-mux-idle-disconnect;
 		};
 		i2c@2 {
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <2>;
-			i2c-mux-idle-disconnect;
 		};
 		i2c@3 {
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <3>;
-			i2c-mux-idle-disconnect;
 		};
 		i2c@4 {
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <4>;
-			i2c-mux-idle-disconnect;
 		};
 		i2c@5 {
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <5>;
-			i2c-mux-idle-disconnect;
 			ina230@40 { compatible = "ti,ina230"; reg = <0x40>; shunt-resistor = <5000>; };
 			ina230@41 { compatible = "ti,ina230"; reg = <0x41>; shunt-resistor = <5000>; };
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <6>;
-			i2c-mux-idle-disconnect;
 		};
 		i2c@7 {
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <7>;
-			i2c-mux-idle-disconnect;
 			u41: pca9575@20 {
 				compatible = "nxp,pca9575";

arch/arm/boot/dts/bcm2835-rpi-zero-w.dts+1−0

@@ -113,6 +113,7 @@ · 112 unmodified lines
113	#address-cells = <1>;	113	#address-cells = <1>;
114	#size-cells = <0>;	114	#size-cells = <0>;
115	pinctrl-0 = <&emmc_gpio34 &gpclk2_gpio43>;	115	pinctrl-0 = <&emmc_gpio34 &gpclk2_gpio43>;
		116	bus-width = <4>;
116	mmc-pwrseq = <&wifi_pwrseq>;	117	mmc-pwrseq = <&wifi_pwrseq>;
117	non-removable;	118	non-removable;
118	status = "okay";	119	status = "okay";

arch/arm/boot/dts/bcm2837-rpi-cm3.dtsi+8−0

@@ -9,6 +9,14 @@ · 8 unmodified lines
9	reg = <0 0x40000000>;	9	reg = <0 0x40000000>;
10	};	10	};
11		11
		12	leds {
		13	/*
		14	* Since there is no upstream GPIO driver yet,
		15	* remove the incomplete node.
		16	*/
		17	/delete-node/ act;
		18	};
		19
12	reg_3v3: fixed-regulator {	20	reg_3v3: fixed-regulator {
13	compatible = "regulator-fixed";	21	compatible = "regulator-fixed";
14	regulator-name = "3V3";	22	regulator-name = "3V3";

arch/arm/boot/dts/imx6-logicpd-som.dtsi+4−0

 	vin-supply = <&sw1c_reg>;
 };
+&snvs_poweroff {
+	status = "okay";
+};
 &iomuxc {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;

arch/arm/boot/dts/imx7s.dtsi+4−4

@@ -448,7 +448,7 @@ · 447 unmodified lines
448	compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";	448	compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
449	reg = <0x302d0000 0x10000>;	449	reg = <0x302d0000 0x10000>;
450	interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;	450	interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
451	clocks = <&clks IMX7D_CLK_DUMMY>,	451	clocks = <&clks IMX7D_GPT1_ROOT_CLK>,
452	<&clks IMX7D_GPT1_ROOT_CLK>;	452	<&clks IMX7D_GPT1_ROOT_CLK>;
453	clock-names = "ipg", "per";	453	clock-names = "ipg", "per";
454	};	454	};
@@ -457,7 +457,7 @@ · 2 unmodified lines
457	compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";	457	compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
458	reg = <0x302e0000 0x10000>;	458	reg = <0x302e0000 0x10000>;
459	interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;	459	interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
460	clocks = <&clks IMX7D_CLK_DUMMY>,	460	clocks = <&clks IMX7D_GPT2_ROOT_CLK>,
461	<&clks IMX7D_GPT2_ROOT_CLK>;	461	<&clks IMX7D_GPT2_ROOT_CLK>;
462	clock-names = "ipg", "per";	462	clock-names = "ipg", "per";
463	status = "disabled";	463	status = "disabled";
@@ -467,7 +467,7 @@ · 3 unmodified lines
467	compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";	467	compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
468	reg = <0x302f0000 0x10000>;	468	reg = <0x302f0000 0x10000>;
469	interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;	469	interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
470	clocks = <&clks IMX7D_CLK_DUMMY>,	470	clocks = <&clks IMX7D_GPT3_ROOT_CLK>,
471	<&clks IMX7D_GPT3_ROOT_CLK>;	471	<&clks IMX7D_GPT3_ROOT_CLK>;
472	clock-names = "ipg", "per";	472	clock-names = "ipg", "per";
473	status = "disabled";	473	status = "disabled";
@@ -477,7 +477,7 @@ · 3 unmodified lines
477	compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";	477	compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
478	reg = <0x30300000 0x10000>;	478	reg = <0x30300000 0x10000>;
479	interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;	479	interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
480	clocks = <&clks IMX7D_CLK_DUMMY>,	480	clocks = <&clks IMX7D_GPT4_ROOT_CLK>,
481	<&clks IMX7D_GPT4_ROOT_CLK>;	481	<&clks IMX7D_GPT4_ROOT_CLK>;
482	clock-names = "ipg", "per";	482	clock-names = "ipg", "per";
483	status = "disabled";	483	status = "disabled";

arch/arm/boot/dts/logicpd-torpedo-som.dtsi+4−0

@@ -192,3 +192,7 @@ · 191 unmodified lines
192	&twl_gpio {	192	&twl_gpio {
193	ti,use-leds;	193	ti,use-leds;
194	};	194	};
		195
		196	&twl_keypad {
		197	status = "disabled";
		198	};

arch/arm/boot/dts/mt7629-rfb.dts+12−1

 	pinctrl-1 = <&ephy_leds_pins>;
 	status = "okay";
+	gmac0: mac@0 {
+		compatible = "mediatek,eth-mac";
+		reg = <0>;
+		phy-mode = "2500base-x";
+		fixed-link {
+			speed = <2500>;
+			full-duplex;
+			pause;
+		};
+	};
 	gmac1: mac@1 {
 		compatible = "mediatek,eth-mac";
 		reg = <1>;
+		phy-mode = "gmii";
 		phy-handle = <&phy0>;
 	};
 		phy0: ethernet-phy@0 {
 			reg = <0>;
-			phy-mode = "gmii";
 		};
 	};
 };

arch/arm/boot/dts/mt7629.dtsi+0−2

 			compatible = "mediatek,mt7629-sgmiisys", "syscon";
 			reg = <0x1b128000 0x3000>;
 			#clock-cells = <1>;
-			mediatek,physpeed = "2500";
 		};
 		sgmiisys1: syscon@1b130000 {
 			compatible = "mediatek,mt7629-sgmiisys", "syscon";
 			reg = <0x1b130000 0x3000>;
 			#clock-cells = <1>;
-			mediatek,physpeed = "2500";
 		};
 	};
 };

arch/arm/boot/dts/omap4-droid4-xt894.dts+1−1

@@ -369,7 +369,7 @@ · 368 unmodified lines
369	compatible = "ti,wl1285", "ti,wl1283";	369	compatible = "ti,wl1285", "ti,wl1283";
370	reg = <2>;	370	reg = <2>;
371	/* gpio_100 with gpmc_wait2 pad as wakeirq */	371	/* gpio_100 with gpmc_wait2 pad as wakeirq */
372	interrupts-extended = <&gpio4 4 IRQ_TYPE_EDGE_RISING>,	372	interrupts-extended = <&gpio4 4 IRQ_TYPE_LEVEL_HIGH>,
373	<&omap4_pmx_core 0x4e>;	373	<&omap4_pmx_core 0x4e>;
374	interrupt-names = "irq", "wakeup";	374	interrupt-names = "irq", "wakeup";
375	ref-clock-frequency = <26000000>;	375	ref-clock-frequency = <26000000>;

arch/arm/boot/dts/omap4-panda-common.dtsi+1−1

@@ -474,7 +474,7 @@ · 473 unmodified lines
474	compatible = "ti,wl1271";	474	compatible = "ti,wl1271";
475	reg = <2>;	475	reg = <2>;
476	/* gpio_53 with gpmc_ncs3 pad as wakeup */	476	/* gpio_53 with gpmc_ncs3 pad as wakeup */
477	interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_RISING>,	477	interrupts-extended = <&gpio2 21 IRQ_TYPE_LEVEL_HIGH>,
478	<&omap4_pmx_core 0x3a>;	478	<&omap4_pmx_core 0x3a>;
479	interrupt-names = "irq", "wakeup";	479	interrupt-names = "irq", "wakeup";
480	ref-clock-frequency = <38400000>;	480	ref-clock-frequency = <38400000>;

arch/arm/boot/dts/omap4-sdp.dts+1−1

@@ -512,7 +512,7 @@ · 511 unmodified lines
512	compatible = "ti,wl1281";	512	compatible = "ti,wl1281";
513	reg = <2>;	513	reg = <2>;
514	interrupt-parent = <&gpio1>;	514	interrupt-parent = <&gpio1>;
515	interrupts = <21 IRQ_TYPE_EDGE_RISING>; /* gpio 53 */	515	interrupts = <21 IRQ_TYPE_LEVEL_HIGH>; /* gpio 53 */
516	ref-clock-frequency = <26000000>;	516	ref-clock-frequency = <26000000>;
517	tcxo-clock-frequency = <26000000>;	517	tcxo-clock-frequency = <26000000>;
518	};	518	};

arch/arm/boot/dts/omap4-var-som-om44-wlan.dtsi+1−1

@@ -69,7 +69,7 @@ · 68 unmodified lines
69	compatible = "ti,wl1271";	69	compatible = "ti,wl1271";
70	reg = <2>;	70	reg = <2>;
71	interrupt-parent = <&gpio2>;	71	interrupt-parent = <&gpio2>;
72	interrupts = <9 IRQ_TYPE_EDGE_RISING>; /* gpio 41 */	72	interrupts = <9 IRQ_TYPE_LEVEL_HIGH>; /* gpio 41 */
73	ref-clock-frequency = <38400000>;	73	ref-clock-frequency = <38400000>;
74	};	74	};
75	};	75	};

arch/arm/boot/dts/omap5-board-common.dtsi+1−1

@@ -362,7 +362,7 @@ · 361 unmodified lines
362	pinctrl-names = "default";	362	pinctrl-names = "default";
363	pinctrl-0 = <&wlcore_irq_pin>;	363	pinctrl-0 = <&wlcore_irq_pin>;
364	interrupt-parent = <&gpio1>;	364	interrupt-parent = <&gpio1>;
365	interrupts = <14 IRQ_TYPE_EDGE_RISING>; /* gpio 14 */	365	interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; /* gpio 14 */
366	ref-clock-frequency = <26000000>;	366	ref-clock-frequency = <26000000>;
367	};	367	};
368	};	368	};

arch/arm/boot/dts/omap54xx-clocks.dtsi+1−1

@@ -1146,7 +1146,7 @@ · 1145 unmodified lines
1146	};	1146	};
1147	};	1147	};
1148		1148
1149	gpu_cm: clock-controller@1500 {	1149	gpu_cm: gpu_cm@1500 {
1150	compatible = "ti,omap4-cm";	1150	compatible = "ti,omap4-cm";
1151	reg = <0x1500 0x100>;	1151	reg = <0x1500 0x100>;
1152	#address-cells = <1>;	1152	#address-cells = <1>;

arch/arm/boot/dts/stm32mp157-pinctrl.dtsi+4−4

@@ -609,13 +609,13 @@ · 608 unmodified lines
609	<STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */	609	<STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */
610	bias-disable;	610	bias-disable;
611	drive-push-pull;	611	drive-push-pull;
612	slew-rate = <3>;	612	slew-rate = <1>;
613	};	613	};
614	pins2 {	614	pins2 {
615	pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */	615	pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
616	bias-pull-up;	616	bias-pull-up;
617	drive-push-pull;	617	drive-push-pull;
618	slew-rate = <3>;	618	slew-rate = <1>;
619	};	619	};
620	};	620	};
621		621
@@ -637,13 +637,13 @@ · 15 unmodified lines
637	<STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */	637	<STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */
638	bias-disable;	638	bias-disable;
639	drive-push-pull;	639	drive-push-pull;
640	slew-rate = <3>;	640	slew-rate = <1>;
641	};	641	};
642	pins2 {	642	pins2 {
643	pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */	643	pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
644	bias-pull-up;	644	bias-pull-up;
645	drive-push-pull;	645	drive-push-pull;
646	slew-rate = <3>;	646	slew-rate = <1>;
647	};	647	};
648	};	648	};
649		649

arch/arm/boot/dts/sun7i-a20.dtsi+2−3

 			compatible = "allwinner,sun7i-a20-csi0";
 			reg = <0x01c09000 0x1000>;
 			interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI0>,
+			clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>;
-				 <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>;
+			clock-names = "bus", "isp", "ram";
-			clock-names = "bus", "mod", "isp", "ram";
 			resets = <&ccu RST_CSI0>;
 			status = "disabled";
 		};

arch/arm/boot/dts/vf610-zii-scu4-aib.dts+2−0

 		#address-cells = <1>;
 		#size-cells = <0>;
 		reg = <0x70>;
+		i2c-mux-idle-disconnect;
 		sff0_i2c: i2c@1 {
 			#address-cells = <1>;
 		reg = <0x71>;
 		#address-cells = <1>;
 		#size-cells = <0>;
+		i2c-mux-idle-disconnect;
 		sff5_i2c: i2c@1 {
 			#address-cells = <1>;

arch/arm/configs/davinci_all_defconfig+1−0

@@ -167,6 +167,7 @@ CONFIG_FB=y · 166 unmodified lines
167	CONFIG_FIRMWARE_EDID=y	167	CONFIG_FIRMWARE_EDID=y
168	CONFIG_FB_DA8XX=y	168	CONFIG_FB_DA8XX=y
169	CONFIG_BACKLIGHT_PWM=m	169	CONFIG_BACKLIGHT_PWM=m
		170	CONFIG_BACKLIGHT_GPIO=m
170	CONFIG_FRAMEBUFFER_CONSOLE=y	171	CONFIG_FRAMEBUFFER_CONSOLE=y
171	CONFIG_LOGO=y	172	CONFIG_LOGO=y
172	CONFIG_SOUND=m	173	CONFIG_SOUND=m

arch/arm/configs/imx_v6_v7_defconfig+1−0

@@ -276,6 +276,7 @@ CONFIG_VIDEO_OV5640=m · 275 unmodified lines
276	CONFIG_VIDEO_OV5645=m	276	CONFIG_VIDEO_OV5645=m
277	CONFIG_IMX_IPUV3_CORE=y	277	CONFIG_IMX_IPUV3_CORE=y
278	CONFIG_DRM=y	278	CONFIG_DRM=y
		279	CONFIG_DRM_MSM=y
279	CONFIG_DRM_PANEL_LVDS=y	280	CONFIG_DRM_PANEL_LVDS=y
280	CONFIG_DRM_PANEL_SIMPLE=y	281	CONFIG_DRM_PANEL_SIMPLE=y
281	CONFIG_DRM_PANEL_SEIKO_43WVF1G=y	282	CONFIG_DRM_PANEL_SEIKO_43WVF1G=y

arch/arm/configs/omap2plus_defconfig+6−6

 CONFIG_DRM_OMAP_CONNECTOR_ANALOG_TV=m
 CONFIG_DRM_OMAP_PANEL_DPI=m
 CONFIG_DRM_OMAP_PANEL_DSI_CM=m
-CONFIG_DRM_OMAP_PANEL_SONY_ACX565AKM=m
-CONFIG_DRM_OMAP_PANEL_LGPHILIPS_LB035Q02=m
-CONFIG_DRM_OMAP_PANEL_SHARP_LS037V7DW01=m
-CONFIG_DRM_OMAP_PANEL_TPO_TD028TTEC1=m
-CONFIG_DRM_OMAP_PANEL_TPO_TD043MTEA1=m
-CONFIG_DRM_OMAP_PANEL_NEC_NL8048HL11=m
 CONFIG_DRM_TILCDC=m
 CONFIG_DRM_PANEL_SIMPLE=m
 CONFIG_DRM_TI_TFP410=m
+CONFIG_DRM_PANEL_LG_LB035Q02=m
+CONFIG_DRM_PANEL_NEC_NL8048HL11=m
+CONFIG_DRM_PANEL_SHARP_LS037V7DW01=m
+CONFIG_DRM_PANEL_SONY_ACX565AKM=m
+CONFIG_DRM_PANEL_TPO_TD028TTEC1=m
+CONFIG_DRM_PANEL_TPO_TD043MTEA1=m
 CONFIG_FB=y
 CONFIG_FIRMWARE_EDID=y
 CONFIG_FB_MODE_HELPERS=y

arch/arm/include/asm/domain.h+4−4

@@ -82,7 +82,7 @@ · 81 unmodified lines
82	#ifndef __ASSEMBLY__	82	#ifndef __ASSEMBLY__
83		83
84	#ifdef CONFIG_CPU_CP15_MMU	84	#ifdef CONFIG_CPU_CP15_MMU
85	static inline unsigned int get_domain(void)	85	static __always_inline unsigned int get_domain(void)
86	{	86	{
87	unsigned int domain;	87	unsigned int domain;
88		88
@@ -94,7 +94,7 @@ static inline unsigned int get_domain(void) · 5 unmodified lines
94	return domain;	94	return domain;
95	}	95	}
96		96
97	static inline void set_domain(unsigned val)	97	static __always_inline void set_domain(unsigned int val)
98	{	98	{
99	asm volatile(	99	asm volatile(
100	"mcr p15, 0, %0, c3, c0 @ set domain"	100	"mcr p15, 0, %0, c3, c0 @ set domain"
@@ -102,12 +102,12 @@ static inline void set_domain(unsigned val) · 1 unmodified line
102	isb();	102	isb();
103	}	103	}
104	#else	104	#else
105	static inline unsigned int get_domain(void)	105	static __always_inline unsigned int get_domain(void)
106	{	106	{
107	return 0;	107	return 0;
108	}	108	}
109		109
110	static inline void set_domain(unsigned val)	110	static __always_inline void set_domain(unsigned int val)
111	{	111	{
112	}	112	}
113	#endif	113	#endif

arch/arm/include/asm/uaccess.h+2−2

@@ -22,7 +22,7 @@ · 21 unmodified lines
22	* perform such accesses (eg, via list poison values) which could then	22	* perform such accesses (eg, via list poison values) which could then
23	* be exploited for priviledge escalation.	23	* be exploited for priviledge escalation.
24	*/	24	*/
25	static inline unsigned int uaccess_save_and_enable(void)	25	static __always_inline unsigned int uaccess_save_and_enable(void)
26	{	26	{
27	#ifdef CONFIG_CPU_SW_DOMAIN_PAN	27	#ifdef CONFIG_CPU_SW_DOMAIN_PAN
28	unsigned int old_domain = get_domain();	28	unsigned int old_domain = get_domain();
@@ -37,7 +37,7 @@ static inline unsigned int uaccess_save_and_enable(void) · 8 unmodified lines
37	#endif	37	#endif
38	}	38	}
39		39
40	static inline void uaccess_restore(unsigned int flags)	40	static __always_inline void uaccess_restore(unsigned int flags)
41	{	41	{
42	#ifdef CONFIG_CPU_SW_DOMAIN_PAN	42	#ifdef CONFIG_CPU_SW_DOMAIN_PAN
43	/* Restore the user access mask */	43	/* Restore the user access mask */

arch/arm/kernel/head-common.S+3−2

  * The following fragment of code is executed with the MMU on in MMU mode,
  * and uses absolute addresses; this is not position independent.
  *
- *  r0  = cp#15 control register
+ *  r0  = cp#15 control register (exc_ret for M-class)
  *  r1  = machine ID
  *  r2  = atags/dtb pointer
  *  r9  = processor ID
 #ifdef CONFIG_CPU_CP15
 	.long	cr_alignment			@ r3
 #else
-	.long	0				@ r3
+M_CLASS(.long	exc_ret)			@ r3
+AR_CLASS(.long	0)				@ r3
 #endif
 	.size	__mmap_switched_data, . - __mmap_switched_data

arch/arm/kernel/head-nommu.S+2−0

 	bic	r0, r0, #V7M_SCB_CCR_IC
 #endif
 	str	r0, [r12, V7M_SCB_CCR]
+	/* Pass exc_ret to __mmap_switched */
+	mov	r0, r10
 #endif /* CONFIG_CPU_CP15 elif CONFIG_CPU_V7M */
 	ret	lr
 ENDPROC(__after_proc_init)

arch/arm/mach-davinci/dm365.c+2−2

@@ -462,8 +462,8 @@ static s8 dm365_queue_priority_mapping[][2] = { · 461 unmodified lines
462	};	462	};
463		463
464	static const struct dma_slave_map dm365_edma_map[] = {	464	static const struct dma_slave_map dm365_edma_map[] = {
465	{ "davinci-mcbsp.0", "tx", EDMA_FILTER_PARAM(0, 2) },	465	{ "davinci-mcbsp", "tx", EDMA_FILTER_PARAM(0, 2) },
466	{ "davinci-mcbsp.0", "rx", EDMA_FILTER_PARAM(0, 3) },	466	{ "davinci-mcbsp", "rx", EDMA_FILTER_PARAM(0, 3) },
467	{ "davinci_voicecodec", "tx", EDMA_FILTER_PARAM(0, 2) },	467	{ "davinci_voicecodec", "tx", EDMA_FILTER_PARAM(0, 2) },
468	{ "davinci_voicecodec", "rx", EDMA_FILTER_PARAM(0, 3) },	468	{ "davinci_voicecodec", "rx", EDMA_FILTER_PARAM(0, 3) },
469	{ "spi_davinci.2", "tx", EDMA_FILTER_PARAM(0, 10) },	469	{ "spi_davinci.2", "tx", EDMA_FILTER_PARAM(0, 10) },

arch/arm/mach-omap2/pdata-quirks.c+11−0

 	.reset_name = "mmu",
 	.assert_reset = omap_device_assert_hardreset,
 	.deassert_reset = omap_device_deassert_hardreset,
+	.device_enable = omap_device_enable,
+	.device_idle = omap_device_idle,
+};
+static struct iommu_platform_data omap3_iommu_isp_pdata = {
+	.device_enable = omap_device_enable,
+	.device_idle = omap_device_idle,
 };
 static int omap3_sbc_t3730_twl_callback(struct device *dev,
 	.reset_name = "mmu_cache",
 	.assert_reset = omap_device_assert_hardreset,
 	.deassert_reset = omap_device_deassert_hardreset,
+	.device_enable = omap_device_enable,
+	.device_idle = omap_device_idle,
 };
 #endif
 #ifdef CONFIG_ARCH_OMAP3
 	OF_DEV_AUXDATA("ti,omap2-iommu", 0x5d000000, "5d000000.mmu",
 		       &omap3_iommu_pdata),
+	OF_DEV_AUXDATA("ti,omap2-iommu", 0x480bd400, "480bd400.mmu",
+		       &omap3_iommu_isp_pdata),
 	OF_DEV_AUXDATA("ti,omap3-smartreflex-core", 0x480cb000,
 		       "480cb000.smartreflex", &omap_sr_pdata[OMAP_SR_CORE]),
 	OF_DEV_AUXDATA("ti,omap3-smartreflex-mpu-iva", 0x480c9000,

arch/arm/mm/alignment.c+49−21

@@ -324,7 +324,7 @@ union offset_union { · 323 unmodified lines
324	__put32_unaligned_check("strbt", val, addr)	324	__put32_unaligned_check("strbt", val, addr)
325		325
326	static void	326	static void
327	do_alignment_finish_ldst(unsigned long addr, unsigned long instr, struct pt_regs *regs, union offset_union offset)	327	do_alignment_finish_ldst(unsigned long addr, u32 instr, struct pt_regs *regs, union offset_union offset)
328	{	328	{
329	if (!LDST_U_BIT(instr))	329	if (!LDST_U_BIT(instr))
330	offset.un = -offset.un;	330	offset.un = -offset.un;
@@ -337,7 +337,7 @@ do_alignment_finish_ldst(unsigned long addr, unsigned long instr, struct pt_regs · 6 unmodified lines
337	}	337	}
338		338
339	static int	339	static int
340	do_alignment_ldrhstrh(unsigned long addr, unsigned long instr, struct pt_regs *regs)	340	do_alignment_ldrhstrh(unsigned long addr, u32 instr, struct pt_regs *regs)
341	{	341	{
342	unsigned int rd = RD_BITS(instr);	342	unsigned int rd = RD_BITS(instr);
343		343
@@ -386,8 +386,7 @@ do_alignment_ldrhstrh(unsigned long addr, unsigned long instr, struct pt_regs *r · 42 unmodified lines
386	}	386	}
387		387
388	static int	388	static int
389	do_alignment_ldrdstrd(unsigned long addr, unsigned long instr,	389	do_alignment_ldrdstrd(unsigned long addr, u32 instr, struct pt_regs *regs)
390	struct pt_regs *regs)
391	{	390	{
392	unsigned int rd = RD_BITS(instr);	391	unsigned int rd = RD_BITS(instr);
393	unsigned int rd2;	392	unsigned int rd2;
@@ -449,7 +448,7 @@ do_alignment_ldrdstrd(unsigned long addr, unsigned long instr, · 55 unmodified lines
449	}	448	}
450		449
451	static int	450	static int
452	do_alignment_ldrstr(unsigned long addr, unsigned long instr, struct pt_regs *regs)	451	do_alignment_ldrstr(unsigned long addr, u32 instr, struct pt_regs *regs)
453	{	452	{
454	unsigned int rd = RD_BITS(instr);	453	unsigned int rd = RD_BITS(instr);
455		454
@@ -498,7 +497,7 @@ do_alignment_ldrstr(unsigned long addr, unsigned long instr, struct pt_regs *reg · 42 unmodified lines
498	* PU = 10 A B	497	* PU = 10 A B
499	*/	498	*/
500	static int	499	static int
501	do_alignment_ldmstm(unsigned long addr, unsigned long instr, struct pt_regs *regs)	500	do_alignment_ldmstm(unsigned long addr, u32 instr, struct pt_regs *regs)
502	{	501	{
503	unsigned int rd, rn, correction, nr_regs, regbits;	502	unsigned int rd, rn, correction, nr_regs, regbits;
504	unsigned long eaddr, newaddr;	503	unsigned long eaddr, newaddr;
@@ -539,7 +538,7 @@ do_alignment_ldmstm(unsigned long addr, unsigned long instr, struct pt_regs *reg · 34 unmodified lines
539	* processor for us.	538	* processor for us.
540	*/	539	*/
541	if (addr != eaddr) {	540	if (addr != eaddr) {
542	pr_err("LDMSTM: PC = %08lx, instr = %08lx, "	541	pr_err("LDMSTM: PC = %08lx, instr = %08x, "
543	"addr = %08lx, eaddr = %08lx\n",	542	"addr = %08lx, eaddr = %08lx\n",
544	instruction_pointer(regs), instr, addr, eaddr);	543	instruction_pointer(regs), instr, addr, eaddr);
545	show_regs(regs);	544	show_regs(regs);
@@ -716,10 +715,10 @@ thumb2arm(u16 tinstr) · 170 unmodified lines
716	* 2. Register name Rt from ARMv7 is same as Rd from ARMv6 (Rd is Rt)	715	* 2. Register name Rt from ARMv7 is same as Rd from ARMv6 (Rd is Rt)
717	*/	716	*/
718	static void *	717	static void *
719	do_alignment_t32_to_handler(unsigned long pinstr, struct pt_regs regs,	718	do_alignment_t32_to_handler(u32 pinstr, struct pt_regs regs,
720	union offset_union *poffset)	719	union offset_union *poffset)
721	{	720	{
722	unsigned long instr = *pinstr;	721	u32 instr = *pinstr;
723	u16 tinst1 = (instr >> 16) & 0xffff;	722	u16 tinst1 = (instr >> 16) & 0xffff;
724	u16 tinst2 = instr & 0xffff;	723	u16 tinst2 = instr & 0xffff;
725		724
@@ -767,17 +766,48 @@ do_alignment_t32_to_handler(unsigned long pinstr, struct pt_regs regs, · 41 unmodified lines
767	return NULL;	766	return NULL;
768	}	767	}
769		768
		769	static int alignment_get_arm(struct pt_regs regs, u32 ip, u32 *inst)
		770	{
		771	u32 instr = 0;
		772	int fault;
		773
		774	if (user_mode(regs))
		775	fault = get_user(instr, ip);
		776	else
		777	fault = probe_kernel_address(ip, instr);
		778
		779	*inst = __mem_to_opcode_arm(instr);
		780
		781	return fault;
		782	}
		783
		784	static int alignment_get_thumb(struct pt_regs regs, u16 ip, u16 *inst)
		785	{
		786	u16 instr = 0;
		787	int fault;
		788
		789	if (user_mode(regs))
		790	fault = get_user(instr, ip);
		791	else
		792	fault = probe_kernel_address(ip, instr);
		793
		794	*inst = __mem_to_opcode_thumb16(instr);
		795
		796	return fault;
		797	}
		798
770	static int	799	static int
771	do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)	800	do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
772	{	801	{
773	union offset_union uninitialized_var(offset);	802	union offset_union uninitialized_var(offset);
774	unsigned long instr = 0, instrptr;	803	unsigned long instrptr;
775	int (handler)(unsigned long addr, unsigned long instr, struct pt_regs regs);	804	int (handler)(unsigned long addr, u32 instr, struct pt_regs regs);
776	unsigned int type;	805	unsigned int type;
777	unsigned int fault;	806	u32 instr = 0;
778	u16 tinstr = 0;	807	u16 tinstr = 0;
779	int isize = 4;	808	int isize = 4;
780	int thumb2_32b = 0;	809	int thumb2_32b = 0;
		810	int fault;
781		811
782	if (interrupts_enabled(regs))	812	if (interrupts_enabled(regs))
783	local_irq_enable();	813	local_irq_enable();
@@ -786,15 +816,14 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs) · 2 unmodified lines
786		816
787	if (thumb_mode(regs)) {	817	if (thumb_mode(regs)) {
788	u16 ptr = (u16 )(instrptr & ~1);	818	u16 ptr = (u16 )(instrptr & ~1);
789	fault = probe_kernel_address(ptr, tinstr);	819
790	tinstr = __mem_to_opcode_thumb16(tinstr);	820	fault = alignment_get_thumb(regs, ptr, &tinstr);
791	if (!fault) {	821	if (!fault) {
792	if (cpu_architecture() >= CPU_ARCH_ARMv7 &&	822	if (cpu_architecture() >= CPU_ARCH_ARMv7 &&
793	IS_T32(tinstr)) {	823	IS_T32(tinstr)) {
794	/* Thumb-2 32-bit */	824	/* Thumb-2 32-bit */
795	u16 tinst2 = 0;	825	u16 tinst2;
796	fault = probe_kernel_address(ptr + 1, tinst2);	826	fault = alignment_get_thumb(regs, ptr + 1, &tinst2);
797	tinst2 = __mem_to_opcode_thumb16(tinst2);
798	instr = __opcode_thumb32_compose(tinstr, tinst2);	827	instr = __opcode_thumb32_compose(tinstr, tinst2);
799	thumb2_32b = 1;	828	thumb2_32b = 1;
800	} else {	829	} else {
@@ -803,8 +832,7 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs) · 2 unmodified lines
803	}	832	}
804	}	833	}
805	} else {	834	} else {
806	fault = probe_kernel_address((void *)instrptr, instr);	835	fault = alignment_get_arm(regs, (void *)instrptr, &instr);
807	instr = __mem_to_opcode_arm(instr);
808	}	836	}
809		837
810	if (fault) {	838	if (fault) {
@@ -926,7 +954,7 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs) · 115 unmodified lines
926	* Oops, we didn't handle the instruction.	954	* Oops, we didn't handle the instruction.
927	*/	955	*/
928	pr_err("Alignment trap: not handling instruction "	956	pr_err("Alignment trap: not handling instruction "
929	"%0*lx at [<%08lx>]\n",	957	"%0*x at [<%08lx>]\n",
930	isize << 1,	958	isize << 1,
931	isize == 2 ? tinstr : instr, instrptr);	959	isize == 2 ? tinstr : instr, instrptr);
932	ai_skipped += 1;	960	ai_skipped += 1;
@@ -936,7 +964,7 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs) · 3 unmodified lines
936	ai_user += 1;	964	ai_user += 1;
937		965
938	if (ai_usermode & UM_WARN)	966	if (ai_usermode & UM_WARN)
939	printk("Alignment trap: %s (%d) PC=0x%08lx Instr=0x%0*lx "	967	printk("Alignment trap: %s (%d) PC=0x%08lx Instr=0x%0*x "
940	"Address=0x%08lx FSR 0x%03x\n", current->comm,	968	"Address=0x%08lx FSR 0x%03x\n", current->comm,
941	task_pid_nr(current), instrptr,	969	task_pid_nr(current), instrptr,
942	isize << 1,	970	isize << 1,

arch/arm/mm/proc-v7m.S+2−4

 	dsb
 	mov	r6, lr			@ save LR
 	ldr	sp, =init_thread_union + THREAD_START_SP
-	stmia	sp, {r0-r3, r12}
 	cpsie	i
 	svc	#0
 1:	cpsid	i
-	ldr	r0, =exc_ret
+	/* Calculate exc_ret */
-	orr	lr, lr, #EXC_RET_THREADMODE_PROCESSSTACK
+	orr	r10, lr, #EXC_RET_THREADMODE_PROCESSSTACK
-	str	lr, [r0]
 	ldmia	sp, {r0-r3, r12}
 	str	r5, [r12, #11 * 4]	@ restore the original SVC vector entry
 	mov	lr, r6			@ restore LR

arch/arm64/Kconfig+17−0

@@ -616,6 +616,23 @@ config CAVIUM_ERRATUM_30115 · 615 unmodified lines
616		616
617	If unsure, say Y.	617	If unsure, say Y.
618		618
		619	config CAVIUM_TX2_ERRATUM_219
		620	bool "Cavium ThunderX2 erratum 219: PRFM between TTBR change and ISB fails"
		621	default y
		622	help
		623	On Cavium ThunderX2, a load, store or prefetch instruction between a
		624	TTBR update and the corresponding context synchronizing operation can
		625	cause a spurious Data Abort to be delivered to any hardware thread in
		626	the CPU core.
		627
		628	Work around the issue by avoiding the problematic code sequence and
		629	trapping KVM guest TTBRx_EL1 writes to EL2 when SMT is enabled. The
		630	trap handler performs the corresponding register access, skips the
		631	instruction and ensures context synchronization by virtue of the
		632	exception return.
		633
		634	If unsure, say Y.
		635
619	config QCOM_FALKOR_ERRATUM_1003	636	config QCOM_FALKOR_ERRATUM_1003
620	bool "Falkor E1003: Incorrect translation due to ASID change"	637	bool "Falkor E1003: Incorrect translation due to ASID change"
621	default y	638	default y

arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts+9−0

@@ -63,3 +63,12 @@ · 62 unmodified lines
63	reg = <1>;	63	reg = <1>;
64	};	64	};
65	};	65	};
		66
		67	&reg_dc1sw {
		68	/*
		69	* Ethernet PHY needs 30ms to properly power up and some more
		70	* to initialize. 100ms should be plenty of time to finish
		71	* whole process.
		72	*/
		73	regulator-enable-ramp-delay = <100000>;
		74	};

arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts+6−0

 };
 &reg_dc1sw {
+	/*
+	 * Ethernet PHY needs 30ms to properly power up and some more
+	 * to initialize. 100ms should be plenty of time to finish
+	 * whole process.
+	 */
+	regulator-enable-ramp-delay = <100000>;
 	regulator-name = "vcc-phy";
 };

arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi+0−9

@@ -142,15 +142,6 @@ · 141 unmodified lines
142	clock-output-names = "ext-osc32k";	142	clock-output-names = "ext-osc32k";
143	};	143	};
144		144
145	pmu {
146	compatible = "arm,cortex-a53-pmu";
147	interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
148	<GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
149	<GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
150	<GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
151	interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
152	};
153
154	psci {	145	psci {
155	compatible = "arm,psci-0.2";	146	compatible = "arm,psci-0.2";
156	method = "smc";	147	method = "smc";

arch/arm64/boot/dts/broadcom/stingray/stingray-pinctrl.dtsi+3−2

 		pinmux: pinmux@14029c {
 			compatible = "pinctrl-single";
-			reg = <0x0014029c 0x250>;
+			reg = <0x0014029c 0x26c>;
 			#address-cells = <1>;
 			#size-cells = <1>;
 			pinctrl-single,register-width = <32>;
 			pinctrl-single,function-mask = <0xf>;
 			pinctrl-single,gpio-range = <
-				&range 0 154 MODE_GPIO
+				&range 0  91 MODE_GPIO
+				&range 95 60 MODE_GPIO
 				>;
 			range: gpio-range {
 				#pinctrl-single,gpio-range-cells = <3>;

arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi+1−2

@@ -464,8 +464,7 @@ · 463 unmodified lines
464	<&pinmux 108 16 27>,	464	<&pinmux 108 16 27>,
465	<&pinmux 135 77 6>,	465	<&pinmux 135 77 6>,
466	<&pinmux 141 67 4>,	466	<&pinmux 141 67 4>,
467	<&pinmux 145 149 6>,	467	<&pinmux 145 149 6>;
468	<&pinmux 151 91 4>;
469	};	468	};
470		469
471	i2c1: i2c@e0000 {	470	i2c1: i2c@e0000 {

arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi+18−18

@@ -33,7 +33,7 @@ · 32 unmodified lines
33	i-cache-line-size = <64>;	33	i-cache-line-size = <64>;
34	i-cache-sets = <192>;	34	i-cache-sets = <192>;
35	next-level-cache = <&cluster0_l2>;	35	next-level-cache = <&cluster0_l2>;
36	cpu-idle-states = <&cpu_pw20>;	36	cpu-idle-states = <&cpu_pw15>;
37	};	37	};
38		38
39	cpu@1 {	39	cpu@1 {
@@ -49,7 +49,7 @@ · 9 unmodified lines
49	i-cache-line-size = <64>;	49	i-cache-line-size = <64>;
50	i-cache-sets = <192>;	50	i-cache-sets = <192>;
51	next-level-cache = <&cluster0_l2>;	51	next-level-cache = <&cluster0_l2>;
52	cpu-idle-states = <&cpu_pw20>;	52	cpu-idle-states = <&cpu_pw15>;
53	};	53	};
54		54
55	cpu@100 {	55	cpu@100 {
@@ -65,7 +65,7 @@ · 9 unmodified lines
65	i-cache-line-size = <64>;	65	i-cache-line-size = <64>;
66	i-cache-sets = <192>;	66	i-cache-sets = <192>;
67	next-level-cache = <&cluster1_l2>;	67	next-level-cache = <&cluster1_l2>;
68	cpu-idle-states = <&cpu_pw20>;	68	cpu-idle-states = <&cpu_pw15>;
69	};	69	};
70		70
71	cpu@101 {	71	cpu@101 {
@@ -81,7 +81,7 @@ · 9 unmodified lines
81	i-cache-line-size = <64>;	81	i-cache-line-size = <64>;
82	i-cache-sets = <192>;	82	i-cache-sets = <192>;
83	next-level-cache = <&cluster1_l2>;	83	next-level-cache = <&cluster1_l2>;
84	cpu-idle-states = <&cpu_pw20>;	84	cpu-idle-states = <&cpu_pw15>;
85	};	85	};
86		86
87	cpu@200 {	87	cpu@200 {
@@ -97,7 +97,7 @@ · 9 unmodified lines
97	i-cache-line-size = <64>;	97	i-cache-line-size = <64>;
98	i-cache-sets = <192>;	98	i-cache-sets = <192>;
99	next-level-cache = <&cluster2_l2>;	99	next-level-cache = <&cluster2_l2>;
100	cpu-idle-states = <&cpu_pw20>;	100	cpu-idle-states = <&cpu_pw15>;
101	};	101	};
102		102
103	cpu@201 {	103	cpu@201 {
@@ -113,7 +113,7 @@ · 9 unmodified lines
113	i-cache-line-size = <64>;	113	i-cache-line-size = <64>;
114	i-cache-sets = <192>;	114	i-cache-sets = <192>;
115	next-level-cache = <&cluster2_l2>;	115	next-level-cache = <&cluster2_l2>;
116	cpu-idle-states = <&cpu_pw20>;	116	cpu-idle-states = <&cpu_pw15>;
117	};	117	};
118		118
119	cpu@300 {	119	cpu@300 {
@@ -129,7 +129,7 @@ · 9 unmodified lines
129	i-cache-line-size = <64>;	129	i-cache-line-size = <64>;
130	i-cache-sets = <192>;	130	i-cache-sets = <192>;
131	next-level-cache = <&cluster3_l2>;	131	next-level-cache = <&cluster3_l2>;
132	cpu-idle-states = <&cpu_pw20>;	132	cpu-idle-states = <&cpu_pw15>;
133	};	133	};
134		134
135	cpu@301 {	135	cpu@301 {
@@ -145,7 +145,7 @@ · 9 unmodified lines
145	i-cache-line-size = <64>;	145	i-cache-line-size = <64>;
146	i-cache-sets = <192>;	146	i-cache-sets = <192>;
147	next-level-cache = <&cluster3_l2>;	147	next-level-cache = <&cluster3_l2>;
148	cpu-idle-states = <&cpu_pw20>;	148	cpu-idle-states = <&cpu_pw15>;
149	};	149	};
150		150
151	cpu@400 {	151	cpu@400 {
@@ -161,7 +161,7 @@ · 9 unmodified lines
161	i-cache-line-size = <64>;	161	i-cache-line-size = <64>;
162	i-cache-sets = <192>;	162	i-cache-sets = <192>;
163	next-level-cache = <&cluster4_l2>;	163	next-level-cache = <&cluster4_l2>;
164	cpu-idle-states = <&cpu_pw20>;	164	cpu-idle-states = <&cpu_pw15>;
165	};	165	};
166		166
167	cpu@401 {	167	cpu@401 {
@@ -177,7 +177,7 @@ · 9 unmodified lines
177	i-cache-line-size = <64>;	177	i-cache-line-size = <64>;
178	i-cache-sets = <192>;	178	i-cache-sets = <192>;
179	next-level-cache = <&cluster4_l2>;	179	next-level-cache = <&cluster4_l2>;
180	cpu-idle-states = <&cpu_pw20>;	180	cpu-idle-states = <&cpu_pw15>;
181	};	181	};
182		182
183	cpu@500 {	183	cpu@500 {
@@ -193,7 +193,7 @@ · 9 unmodified lines
193	i-cache-line-size = <64>;	193	i-cache-line-size = <64>;
194	i-cache-sets = <192>;	194	i-cache-sets = <192>;
195	next-level-cache = <&cluster5_l2>;	195	next-level-cache = <&cluster5_l2>;
196	cpu-idle-states = <&cpu_pw20>;	196	cpu-idle-states = <&cpu_pw15>;
197	};	197	};
198		198
199	cpu@501 {	199	cpu@501 {
@@ -209,7 +209,7 @@ · 9 unmodified lines
209	i-cache-line-size = <64>;	209	i-cache-line-size = <64>;
210	i-cache-sets = <192>;	210	i-cache-sets = <192>;
211	next-level-cache = <&cluster5_l2>;	211	next-level-cache = <&cluster5_l2>;
212	cpu-idle-states = <&cpu_pw20>;	212	cpu-idle-states = <&cpu_pw15>;
213	};	213	};
214		214
215	cpu@600 {	215	cpu@600 {
@@ -225,7 +225,7 @@ · 9 unmodified lines
225	i-cache-line-size = <64>;	225	i-cache-line-size = <64>;
226	i-cache-sets = <192>;	226	i-cache-sets = <192>;
227	next-level-cache = <&cluster6_l2>;	227	next-level-cache = <&cluster6_l2>;
228	cpu-idle-states = <&cpu_pw20>;	228	cpu-idle-states = <&cpu_pw15>;
229	};	229	};
230		230
231	cpu@601 {	231	cpu@601 {
@@ -241,7 +241,7 @@ · 9 unmodified lines
241	i-cache-line-size = <64>;	241	i-cache-line-size = <64>;
242	i-cache-sets = <192>;	242	i-cache-sets = <192>;
243	next-level-cache = <&cluster6_l2>;	243	next-level-cache = <&cluster6_l2>;
244	cpu-idle-states = <&cpu_pw20>;	244	cpu-idle-states = <&cpu_pw15>;
245	};	245	};
246		246
247	cpu@700 {	247	cpu@700 {
@@ -257,7 +257,7 @@ · 9 unmodified lines
257	i-cache-line-size = <64>;	257	i-cache-line-size = <64>;
258	i-cache-sets = <192>;	258	i-cache-sets = <192>;
259	next-level-cache = <&cluster7_l2>;	259	next-level-cache = <&cluster7_l2>;
260	cpu-idle-states = <&cpu_pw20>;	260	cpu-idle-states = <&cpu_pw15>;
261	};	261	};
262		262
263	cpu@701 {	263	cpu@701 {
@@ -273,7 +273,7 @@ · 9 unmodified lines
273	i-cache-line-size = <64>;	273	i-cache-line-size = <64>;
274	i-cache-sets = <192>;	274	i-cache-sets = <192>;
275	next-level-cache = <&cluster7_l2>;	275	next-level-cache = <&cluster7_l2>;
276	cpu-idle-states = <&cpu_pw20>;	276	cpu-idle-states = <&cpu_pw15>;
277	};	277	};
278		278
279	cluster0_l2: l2-cache0 {	279	cluster0_l2: l2-cache0 {
@@ -340,9 +340,9 @@ · 60 unmodified lines
340	cache-level = <2>;	340	cache-level = <2>;
341	};	341	};
342		342
343	cpu_pw20: cpu-pw20 {	343	cpu_pw15: cpu-pw15 {
344	compatible = "arm,idle-state";	344	compatible = "arm,idle-state";
345	idle-state-name = "PW20";	345	idle-state-name = "PW15";
346	arm,psci-suspend-param = <0x0>;	346	arm,psci-suspend-param = <0x0>;
347	entry-latency-us = <2000>;	347	entry-latency-us = <2000>;
348	exit-latency-us = <2000>;	348	exit-latency-us = <2000>;

arch/arm64/boot/dts/freescale/imx8mm.dtsi+3−3

arch/arm64/boot/dts/freescale/imx8mn.dtsi+3−3

arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi+2−2

@@ -89,8 +89,8 @@ · 88 unmodified lines
89	regulator-min-microvolt = <900000>;	89	regulator-min-microvolt = <900000>;
90	regulator-max-microvolt = <1000000>;	90	regulator-max-microvolt = <1000000>;
91	gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;	91	gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
92	states = <1000000 0x0	92	states = <1000000 0x1
93	900000 0x1>;	93	900000 0x0>;
94	regulator-always-on;	94	regulator-always-on;
95	};	95	};
96	};	96	};

arch/arm64/boot/dts/freescale/imx8mq.dtsi+2−2

@@ -850,7 +850,7 @@ · 849 unmodified lines
850	"fsl,imx7d-usdhc";	850	"fsl,imx7d-usdhc";
851	reg = <0x30b40000 0x10000>;	851	reg = <0x30b40000 0x10000>;
852	interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;	852	interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
853	clocks = <&clk IMX8MQ_CLK_DUMMY>,	853	clocks = <&clk IMX8MQ_CLK_IPG_ROOT>,
854	<&clk IMX8MQ_CLK_NAND_USDHC_BUS>,	854	<&clk IMX8MQ_CLK_NAND_USDHC_BUS>,
855	<&clk IMX8MQ_CLK_USDHC1_ROOT>;	855	<&clk IMX8MQ_CLK_USDHC1_ROOT>;
856	clock-names = "ipg", "ahb", "per";	856	clock-names = "ipg", "ahb", "per";
@@ -867,7 +867,7 @@ · 10 unmodified lines
867	"fsl,imx7d-usdhc";	867	"fsl,imx7d-usdhc";
868	reg = <0x30b50000 0x10000>;	868	reg = <0x30b50000 0x10000>;
869	interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;	869	interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
870	clocks = <&clk IMX8MQ_CLK_DUMMY>,	870	clocks = <&clk IMX8MQ_CLK_IPG_ROOT>,
871	<&clk IMX8MQ_CLK_NAND_USDHC_BUS>,	871	<&clk IMX8MQ_CLK_NAND_USDHC_BUS>,
872	<&clk IMX8MQ_CLK_USDHC2_ROOT>;	872	<&clk IMX8MQ_CLK_USDHC2_ROOT>;
873	clock-names = "ipg", "ahb", "per";	873	clock-names = "ipg", "ahb", "per";

arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts+7−6

 		gpio = <&gpiosb 0 GPIO_ACTIVE_HIGH>;
 	};
-	usb3_phy: usb3-phy {
-		compatible = "usb-nop-xceiv";
-		vcc-supply = <&exp_usb3_vbus>;
-	};
 	vsdc_reg: vsdc-reg {
 		compatible = "regulator-gpio";
 		regulator-name = "vsdc";
 	status = "okay";
 };
+&comphy2 {
+	connector {
+		compatible = "usb-a-connector";
+		phy-supply = <&exp_usb3_vbus>;
+	};
+};
 &usb3 {
 	status = "okay";
 	phys = <&comphy2 0>;
-	usb-phy = <&usb3_phy>;
 };
 &mdio {

arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dts+1−1

@@ -44,7 +44,7 @@ · 43 unmodified lines
44	power-supply = <&pp3300_disp>;	44	power-supply = <&pp3300_disp>;
45		45
46	panel-timing {	46	panel-timing {
47	clock-frequency = <266604720>;	47	clock-frequency = <266666667>;
48	hactive = <2400>;	48	hactive = <2400>;
49	hfront-porch = <48>;	49	hfront-porch = <48>;
50	hback-porch = <84>;	50	hback-porch = <84>;

arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts+2−2

@@ -644,7 +644,7 @@ · 643 unmodified lines
644	status = "okay";	644	status = "okay";
645		645
646	u2phy0_host: host-port {	646	u2phy0_host: host-port {
647	phy-supply = <&vcc5v0_host>;	647	phy-supply = <&vcc5v0_typec>;
648	status = "okay";	648	status = "okay";
649	};	649	};
650		650
@@ -712,7 +712,7 @@ · 61 unmodified lines
712		712
713	&usbdrd_dwc3_0 {	713	&usbdrd_dwc3_0 {
714	status = "okay";	714	status = "okay";
715	dr_mode = "otg";	715	dr_mode = "host";
716	};	716	};
717		717
718	&usbdrd3_1 {	718	&usbdrd3_1 {

arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts+5−7

 		regulator-always-on;
 		regulator-boot-on;
 		regulator-min-microvolt = <800000>;
-		regulator-max-microvolt = <1400000>;
+		regulator-max-microvolt = <1700000>;
 		vin-supply = <&vcc5v0_sys>;
 	};
 };
 	rk808: pmic@1b {
 		compatible = "rockchip,rk808";
 		reg = <0x1b>;
-		interrupt-parent = <&gpio1>;
+		interrupt-parent = <&gpio3>;
-		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
+		interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
 		#clock-cells = <1>;
 		clock-output-names = "xin32k", "rk808-clkout2";
 		pinctrl-names = "default";
 	pmic {
 		pmic_int_l: pmic-int-l {
-			rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
+			rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
 		};
 		vsel1_gpio: vsel1-gpio {
 &sdmmc {
 	bus-width = <4>;
-	cap-mmc-highspeed;
 	cap-sd-highspeed;
 	cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
 	disable-wp;
 &sdhci {
 	bus-width = <8>;
-	mmc-hs400-1_8v;
+	mmc-hs200-1_8v;
-	mmc-hs400-enhanced-strobe;
 	non-removable;
 	status = "okay";
 };

arch/arm64/include/asm/asm-uaccess.h+3−4

 /*
  * Remove the address tag from a virtual address, if present.
  */
-	.macro	clear_address_tag, dst, addr
+	.macro	untagged_addr, dst, addr
-	tst	\addr, #(1 << 55)
+	sbfx	\dst, \addr, #0, #56
-	bic	\dst, \addr, #(0xff << 56)
+	and	\dst, \dst, \addr
-	csel	\dst, \dst, \addr, eq
 	.endm
 #endif

arch/arm64/include/asm/cpucaps.h+3−1

@@ -52,7 +52,9 @@ · 51 unmodified lines
52	#define ARM64_HAS_IRQ_PRIO_MASKING 42	52	#define ARM64_HAS_IRQ_PRIO_MASKING 42
53	#define ARM64_HAS_DCPODP 43	53	#define ARM64_HAS_DCPODP 43
54	#define ARM64_WORKAROUND_1463225 44	54	#define ARM64_WORKAROUND_1463225 44
		55	#define ARM64_WORKAROUND_CAVIUM_TX2_219_TVM 45
		56	#define ARM64_WORKAROUND_CAVIUM_TX2_219_PRFM 46
55		57
56	#define ARM64_NCAPS 45	58	#define ARM64_NCAPS 47
57		59
58	#endif /* __ASM_CPUCAPS_H */	60	#endif /* __ASM_CPUCAPS_H */

arch/arm64/include/asm/memory.h+8−2

  * up with a tagged userland pointer. Clear the tag to get a sane pointer to
  * pass on to access_ok(), for instance.
  */
-#define untagged_addr(addr)	\
+#define __untagged_addr(addr)	\
 	((__force __typeof__(addr))sign_extend64((__force u64)(addr), 55))
+#define untagged_addr(addr)	({					\
+	u64 __addr = (__force u64)addr;					\
+	__addr &= __untagged_addr(__addr);				\
+	(__force __typeof__(addr))__addr;				\
+})
 #ifdef CONFIG_KASAN_SW_TAGS
 #define __tag_shifted(tag)	((u64)(tag) << 56)
-#define __tag_reset(addr)	untagged_addr(addr)
+#define __tag_reset(addr)	__untagged_addr(addr)
 #define __tag_get(addr)		(__u8)((u64)(addr) >> 56)
 #else
 #define __tag_shifted(tag)	0UL

arch/arm64/include/asm/pgtable.h+0−3

@@ -876,9 +876,6 @@ static inline void update_mmu_cache(struct vm_area_struct *vma, · 875 unmodified lines
876		876
877	#define update_mmu_cache_pmd(vma, address, pmd) do { } while (0)	877	#define update_mmu_cache_pmd(vma, address, pmd) do { } while (0)
878		878
879	#define kc_vaddr_to_offset(v) ((v) & ~PAGE_END)
880	#define kc_offset_to_vaddr(o) ((o) \| PAGE_END)
881
882	#ifdef CONFIG_ARM64_PA_BITS_52	879	#ifdef CONFIG_ARM64_PA_BITS_52
883	#define phys_to_ttbr(addr) (((addr) \| ((addr) >> 46)) & TTBR_BADDR_MASK_52)	880	#define phys_to_ttbr(addr) (((addr) \| ((addr) >> 46)) & TTBR_BADDR_MASK_52)
884	#else	881	#else

arch/arm64/include/asm/sysreg.h+1−1

@@ -212,7 +212,7 @@ · 211 unmodified lines
212	#define SYS_FAR_EL1 sys_reg(3, 0, 6, 0, 0)	212	#define SYS_FAR_EL1 sys_reg(3, 0, 6, 0, 0)
213	#define SYS_PAR_EL1 sys_reg(3, 0, 7, 4, 0)	213	#define SYS_PAR_EL1 sys_reg(3, 0, 7, 4, 0)
214		214
215	#define SYS_PAR_EL1_F BIT(1)	215	#define SYS_PAR_EL1_F BIT(0)
216	#define SYS_PAR_EL1_FST GENMASK(6, 1)	216	#define SYS_PAR_EL1_FST GENMASK(6, 1)
217		217
218	/* Statistical Profiling Extension */	218	/* Statistical Profiling Extension */

arch/arm64/kernel/cpu_errata.c+38−0

@@ -12,6 +12,7 @@ · 11 unmodified lines
12	#include <asm/cpu.h>	12	#include <asm/cpu.h>
13	#include <asm/cputype.h>	13	#include <asm/cputype.h>
14	#include <asm/cpufeature.h>	14	#include <asm/cpufeature.h>
		15	#include <asm/smp_plat.h>
15		16
16	static bool __maybe_unused	17	static bool __maybe_unused
17	is_affected_midr_range(const struct arm64_cpu_capabilities *entry, int scope)	18	is_affected_midr_range(const struct arm64_cpu_capabilities *entry, int scope)
@@ -623,6 +624,30 @@ check_branch_predictor(const struct arm64_cpu_capabilities *entry, int scope) · 605 unmodified lines
623	return (need_wa > 0);	624	return (need_wa > 0);
624	}	625	}
625		626
		627	static const __maybe_unused struct midr_range tx2_family_cpus[] = {
		628	MIDR_ALL_VERSIONS(MIDR_BRCM_VULCAN),
		629	MIDR_ALL_VERSIONS(MIDR_CAVIUM_THUNDERX2),
		630	{},
		631	};
		632
		633	static bool __maybe_unused
		634	needs_tx2_tvm_workaround(const struct arm64_cpu_capabilities *entry,
		635	int scope)
		636	{
		637	int i;
		638
		639	if (!is_affected_midr_range_list(entry, scope) \|\|
		640	!is_hyp_mode_available())
		641	return false;
		642
		643	for_each_possible_cpu(i) {
		644	if (MPIDR_AFFINITY_LEVEL(cpu_logical_map(i), 0) != 0)
		645	return true;
		646	}
		647
		648	return false;
		649	}
		650
626	#ifdef CONFIG_HARDEN_EL2_VECTORS	651	#ifdef CONFIG_HARDEN_EL2_VECTORS
627		652
628	static const struct midr_range arm64_harden_el2_vectors[] = {	653	static const struct midr_range arm64_harden_el2_vectors[] = {
@@ -851,6 +876,19 @@ const struct arm64_cpu_capabilities arm64_errata[] = { · 222 unmodified lines
851	.type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM,	876	.type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM,
852	.matches = has_cortex_a76_erratum_1463225,	877	.matches = has_cortex_a76_erratum_1463225,
853	},	878	},
		879	#endif
		880	#ifdef CONFIG_CAVIUM_TX2_ERRATUM_219
		881	{
		882	.desc = "Cavium ThunderX2 erratum 219 (KVM guest sysreg trapping)",
		883	.capability = ARM64_WORKAROUND_CAVIUM_TX2_219_TVM,
		884	ERRATA_MIDR_RANGE_LIST(tx2_family_cpus),
		885	.matches = needs_tx2_tvm_workaround,
		886	},
		887	{
		888	.desc = "Cavium ThunderX2 erratum 219 (PRFM removal)",
		889	.capability = ARM64_WORKAROUND_CAVIUM_TX2_219_PRFM,
		890	ERRATA_MIDR_RANGE_LIST(tx2_family_cpus),
		891	},
854	#endif	892	#endif
855	{	893	{
856	}	894	}

arch/arm64/kernel/cpufeature.c+10−5

 };
 static const struct arm64_ftr_bits ftr_id_aa64zfr0[] = {
-	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ZFR0_SM4_SHIFT, 4, 0),
+	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_SVE),
-	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ZFR0_SHA3_SHIFT, 4, 0),
+		       FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ZFR0_SM4_SHIFT, 4, 0),
-	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ZFR0_BITPERM_SHIFT, 4, 0),
+	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_SVE),
-	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ZFR0_AES_SHIFT, 4, 0),
+		       FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ZFR0_SHA3_SHIFT, 4, 0),
-	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ZFR0_SVEVER_SHIFT, 4, 0),
+	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_SVE),
+		       FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ZFR0_BITPERM_SHIFT, 4, 0),
+	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_SVE),
+		       FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ZFR0_AES_SHIFT, 4, 0),
+	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_SVE),
+		       FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ZFR0_SVEVER_SHIFT, 4, 0),
 	ARM64_FTR_END,
 };

arch/arm64/kernel/entry.S+5−3

 	 */
 	mrs	x3, far_el1
 	inherit_daif	pstate=x23, tmp=x2
-	clear_address_tag x0, x3
+	untagged_addr	x0, x3
 	mov	x2, sp				// struct pt_regs
 	bl	do_mem_abort
 	orr	x24, x24, x0
 alternative_else_nop_endif
 	cbnz	x24, 1f				// preempt count != 0 || NMI return path
-	bl	preempt_schedule_irq		// irq en/disable is done inside
+	bl	arm64_preempt_schedule_irq	// irq en/disable is done inside
 1:
 #endif
 	mrs	x26, far_el1
 	ct_user_exit_irqoff
 	enable_daif
-	clear_address_tag x0, x26
+	untagged_addr	x0, x26
 	mov	x1, x25
 	mov	x2, sp
 	bl	do_mem_abort
 #else
 	ldr	x30, =vectors
 #endif
+alternative_if_not ARM64_WORKAROUND_CAVIUM_TX2_219_PRFM
 	prfm	plil1strm, [x30, #(1b - tramp_vectors)]
+alternative_else_nop_endif
 	msr	vbar_el1, x30
 	add	x30, x30, #(1b - tramp_vectors)
 	isb

arch/arm64/kernel/hibernate.c+8−1

 				 gfp_t mask)
 {
 	int rc = 0;
+	pgd_t *trans_pgd;
 	pgd_t *pgdp;
 	pud_t *pudp;
 	pmd_t *pmdp;
 	memcpy((void *)dst, src_start, length);
 	__flush_icache_range(dst, dst + length);
-	pgdp = pgd_offset_raw(allocator(mask), dst_addr);
+	trans_pgd = allocator(mask);
+	if (!trans_pgd) {
+		rc = -ENOMEM;
+		goto out;
+	}
+	pgdp = pgd_offset_raw(trans_pgd, dst_addr);
 	if (pgd_none(READ_ONCE(*pgdp))) {
 		pudp = allocator(mask);
 		if (!pudp) {

arch/arm64/kernel/process.c+18−0

@@ -17,6 +17,7 @@ · 16 unmodified lines
17	#include <linux/sched/task.h>	17	#include <linux/sched/task.h>
18	#include <linux/sched/task_stack.h>	18	#include <linux/sched/task_stack.h>
19	#include <linux/kernel.h>	19	#include <linux/kernel.h>
		20	#include <linux/lockdep.h>
20	#include <linux/mm.h>	21	#include <linux/mm.h>
21	#include <linux/stddef.h>	22	#include <linux/stddef.h>
22	#include <linux/sysctl.h>	23	#include <linux/sysctl.h>
@@ -44,6 +45,7 @@ · 21 unmodified lines
44	#include <asm/alternative.h>	45	#include <asm/alternative.h>
45	#include <asm/arch_gicv3.h>	46	#include <asm/arch_gicv3.h>
46	#include <asm/compat.h>	47	#include <asm/compat.h>
		48	#include <asm/cpufeature.h>
47	#include <asm/cacheflush.h>	49	#include <asm/cacheflush.h>
48	#include <asm/exec.h>	50	#include <asm/exec.h>
49	#include <asm/fpsimd.h>	51	#include <asm/fpsimd.h>
@@ -631,3 +633,19 @@ static int __init tagged_addr_init(void) · 581 unmodified lines
631		633
632	core_initcall(tagged_addr_init);	634	core_initcall(tagged_addr_init);
633	#endif /* CONFIG_ARM64_TAGGED_ADDR_ABI */	635	#endif /* CONFIG_ARM64_TAGGED_ADDR_ABI */
		636
		637	asmlinkage void __sched arm64_preempt_schedule_irq(void)
		638	{
		639	lockdep_assert_irqs_disabled();
		640
		641	/*
		642	* Preempting a task from an IRQ means we leave copies of PSTATE
		643	* on the stack. cpufeature's enable calls may modify PSTATE, but
		644	* resuming one of these preempted tasks would undo those changes.
		645	*
		646	* Only allow a task to be preempted once cpufeatures have been
		647	* enabled.
		648	*/
		649	if (static_branch_likely(&arm64_const_caps_ready))
		650	preempt_schedule_irq();
		651	}

arch/arm64/kvm/hyp/switch.c+67−2

@@ -124,6 +124,9 @@ static void __hyp_text __activate_traps(struct kvm_vcpu *vcpu) · 123 unmodified lines
124	{	124	{
125	u64 hcr = vcpu->arch.hcr_el2;	125	u64 hcr = vcpu->arch.hcr_el2;
126		126
		127	if (cpus_have_const_cap(ARM64_WORKAROUND_CAVIUM_TX2_219_TVM))
		128	hcr \|= HCR_TVM;
		129
127	write_sysreg(hcr, hcr_el2);	130	write_sysreg(hcr, hcr_el2);
128		131
129	if (cpus_have_const_cap(ARM64_HAS_RAS_EXTN) && (hcr & HCR_VSE))	132	if (cpus_have_const_cap(ARM64_HAS_RAS_EXTN) && (hcr & HCR_VSE))
@@ -174,8 +177,10 @@ static void __hyp_text __deactivate_traps(struct kvm_vcpu *vcpu) · 44 unmodified lines
174	* the crucial bit is "On taking a vSError interrupt,	177	* the crucial bit is "On taking a vSError interrupt,
175	* HCR_EL2.VSE is cleared to 0."	178	* HCR_EL2.VSE is cleared to 0."
176	*/	179	*/
177	if (vcpu->arch.hcr_el2 & HCR_VSE)	180	if (vcpu->arch.hcr_el2 & HCR_VSE) {
178	vcpu->arch.hcr_el2 = read_sysreg(hcr_el2);	181	vcpu->arch.hcr_el2 &= ~HCR_VSE;
		182	vcpu->arch.hcr_el2 \|= read_sysreg(hcr_el2) & HCR_VSE;
		183	}
179		184
180	if (has_vhe())	185	if (has_vhe())
181	deactivate_traps_vhe();	186	deactivate_traps_vhe();
@@ -380,6 +385,61 @@ static bool __hyp_text __hyp_handle_fpsimd(struct kvm_vcpu *vcpu) · 198 unmodified lines
380	return true;	385	return true;
381	}	386	}
382		387
		388	static bool __hyp_text handle_tx2_tvm(struct kvm_vcpu *vcpu)
		389	{
		390	u32 sysreg = esr_sys64_to_sysreg(kvm_vcpu_get_hsr(vcpu));
		391	int rt = kvm_vcpu_sys_get_rt(vcpu);
		392	u64 val = vcpu_get_reg(vcpu, rt);
		393
		394	/*
		395	* The normal sysreg handling code expects to see the traps,
		396	* let's not do anything here.
		397	*/
		398	if (vcpu->arch.hcr_el2 & HCR_TVM)
		399	return false;
		400
		401	switch (sysreg) {
		402	case SYS_SCTLR_EL1:
		403	write_sysreg_el1(val, SYS_SCTLR);
		404	break;
		405	case SYS_TTBR0_EL1:
		406	write_sysreg_el1(val, SYS_TTBR0);
		407	break;
		408	case SYS_TTBR1_EL1:
		409	write_sysreg_el1(val, SYS_TTBR1);
		410	break;
		411	case SYS_TCR_EL1:
		412	write_sysreg_el1(val, SYS_TCR);
		413	break;
		414	case SYS_ESR_EL1:
		415	write_sysreg_el1(val, SYS_ESR);
		416	break;
		417	case SYS_FAR_EL1:
		418	write_sysreg_el1(val, SYS_FAR);
		419	break;
		420	case SYS_AFSR0_EL1:
		421	write_sysreg_el1(val, SYS_AFSR0);
		422	break;
		423	case SYS_AFSR1_EL1:
		424	write_sysreg_el1(val, SYS_AFSR1);
		425	break;
		426	case SYS_MAIR_EL1:
		427	write_sysreg_el1(val, SYS_MAIR);
		428	break;
		429	case SYS_AMAIR_EL1:
		430	write_sysreg_el1(val, SYS_AMAIR);
		431	break;
		432	case SYS_CONTEXTIDR_EL1:
		433	write_sysreg_el1(val, SYS_CONTEXTIDR);
		434	break;
		435	default:
		436	return false;
		437	}
		438
		439	__kvm_skip_instr(vcpu);
		440	return true;
		441	}
		442
383	/*	443	/*
384	* Return true when we were able to fixup the guest exit and should return to	444	* Return true when we were able to fixup the guest exit and should return to
385	* the guest, false when we should restore the host state and return to the	445	* the guest, false when we should restore the host state and return to the
@@ -399,6 +459,11 @@ static bool __hyp_text fixup_guest_exit(struct kvm_vcpu vcpu, u64 exit_code) · 13 unmodified lines
399	if (*exit_code != ARM_EXCEPTION_TRAP)	459	if (*exit_code != ARM_EXCEPTION_TRAP)
400	goto exit;	460	goto exit;
401		461
		462	if (cpus_have_const_cap(ARM64_WORKAROUND_CAVIUM_TX2_219_TVM) &&
		463	kvm_vcpu_trap_get_class(vcpu) == ESR_ELx_EC_SYS64 &&
		464	handle_tx2_tvm(vcpu))
		465	return true;
		466
402	/*	467	/*
403	* We trap the first access to the FP/SIMD to save the host context	468	* We trap the first access to the FP/SIMD to save the host context
404	* and restore the guest context lazily.	469	* and restore the guest context lazily.

arch/arm64/kvm/sys_regs.c+4−0

 	 */
 	val = ((pmcr & ~ARMV8_PMU_PMCR_MASK)
 	       | (ARMV8_PMU_PMCR_MASK & 0xdecafbad)) & (~ARMV8_PMU_PMCR_E);
+	if (!system_supports_32bit_el0())
+		val |= ARMV8_PMU_PMCR_LC;
 	__vcpu_sys_reg(vcpu, r->reg) = val;
 }
 		val = __vcpu_sys_reg(vcpu, PMCR_EL0);
 		val &= ~ARMV8_PMU_PMCR_MASK;
 		val |= p->regval & ARMV8_PMU_PMCR_MASK;
+		if (!system_supports_32bit_el0())
+			val |= ARMV8_PMU_PMCR_LC;
 		__vcpu_sys_reg(vcpu, PMCR_EL0) = val;
 		kvm_pmu_handle_pmcr(vcpu, val);
 		kvm_vcpu_pmu_restore_guest(vcpu);

arch/arm64/mm/fault.c+5−1

 	par = read_sysreg(par_el1);
 	local_irq_restore(flags);
+	/*
+	 * If we now have a valid translation, treat the translation fault as
+	 * spurious.
+	 */
 	if (!(par & SYS_PAR_EL1_F))
-		return false;
+		return true;
 	/*
 	 * If we got a different type of fault from the AT instruction,

arch/mips/bcm63xx/prom.c+1−1

@@ -84,7 +84,7 @@ void __init prom_init(void) · 83 unmodified lines
84	* Here we will start up CPU1 in the background and ask it to	84	* Here we will start up CPU1 in the background and ask it to
85	* reconfigure itself then go back to sleep.	85	* reconfigure itself then go back to sleep.
86	*/	86	*/
87	memcpy((void *)0xa0000200, &bmips_smp_movevec, 0x20);	87	memcpy((void *)0xa0000200, bmips_smp_movevec, 0x20);
88	__sync();	88	__sync();
89	set_c0_cause(C_SW0);	89	set_c0_cause(C_SW0);
90	cpumask_set_cpu(1, &bmips_booted_mask);	90	cpumask_set_cpu(1, &bmips_booted_mask);

arch/mips/include/asm/bmips.h+5−5

@@ -75,11 +75,11 @@ static inline int register_bmips_smp_ops(void) · 74 unmodified lines
75	#endif	75	#endif
76	}	76	}
77		77
78	extern char bmips_reset_nmi_vec;	78	extern char bmips_reset_nmi_vec[];
79	extern char bmips_reset_nmi_vec_end;	79	extern char bmips_reset_nmi_vec_end[];
80	extern char bmips_smp_movevec;	80	extern char bmips_smp_movevec[];
81	extern char bmips_smp_int_vec;	81	extern char bmips_smp_int_vec[];
82	extern char bmips_smp_int_vec_end;	82	extern char bmips_smp_int_vec_end[];
83		83
84	extern int bmips_smp_enabled;	84	extern int bmips_smp_enabled;
85	extern int bmips_cpu_offset;	85	extern int bmips_cpu_offset;

arch/mips/include/asm/vdso/gettimeofday.h+3−1

 #define VDSO_HAS_CLOCK_GETRES		1
+#define __VDSO_USE_SYSCALL		ULLONG_MAX
 #ifdef CONFIG_MIPS_CLOCK_VSYSCALL
 static __always_inline long gettimeofday_fallback(
 		break;
 #endif
 	default:
-		cycle_now = 0;
+		cycle_now = __VDSO_USE_SYSCALL;
 		break;
 	}

arch/mips/kernel/smp-bmips.c+4−4

@@ -464,10 +464,10 @@ static void bmips_wr_vec(unsigned long dst, char start, char end) · 463 unmodified lines
464		464
465	static inline void bmips_nmi_handler_setup(void)	465	static inline void bmips_nmi_handler_setup(void)
466	{	466	{
467	bmips_wr_vec(BMIPS_NMI_RESET_VEC, &bmips_reset_nmi_vec,	467	bmips_wr_vec(BMIPS_NMI_RESET_VEC, bmips_reset_nmi_vec,
468	&bmips_reset_nmi_vec_end);	468	bmips_reset_nmi_vec_end);
469	bmips_wr_vec(BMIPS_WARM_RESTART_VEC, &bmips_smp_int_vec,	469	bmips_wr_vec(BMIPS_WARM_RESTART_VEC, bmips_smp_int_vec,
470	&bmips_smp_int_vec_end);	470	bmips_smp_int_vec_end);
471	}	471	}
472		472
473	struct reset_vec_info {	473	struct reset_vec_info {

arch/mips/mm/tlbex.c+15−8

 				   int restore_scratch)
 {
 	if (restore_scratch) {
+		/*
+		 * Ensure the MFC0 below observes the value written to the
+		 * KScratch register by the prior MTC0.
+		 */
+		if (scratch_reg >= 0)
+			uasm_i_ehb(p);
 		/* Reset default page size */
 		if (PM_DEFAULT_MASK >> 16) {
 			uasm_i_lui(p, tmp, PM_DEFAULT_MASK >> 16);
 			uasm_i_mtc0(p, 0, C0_PAGEMASK);
 			uasm_il_b(p, r, lid);
 		}
-		if (scratch_reg >= 0) {
+		if (scratch_reg >= 0)
-			uasm_i_ehb(p);
 			UASM_i_MFC0(p, 1, c0_kscratch(), scratch_reg);
-		} else {
+		else
 			UASM_i_LW(p, 1, scratchpad_offset(0), 0);
-		}
 	} else {
 		/* Reset default page size */
 		if (PM_DEFAULT_MASK >> 16) {
 	}
 	if (mode != not_refill && check_for_high_segbits) {
 		uasm_l_large_segbits_fault(l, *p);
+		if (mode == refill_scratch && scratch_reg >= 0)
+			uasm_i_ehb(p);
 		/*
 		 * We get here if we are an xsseg address, or if we are
 		 * an xuseg address above (PGDIR_SHIFT+PGDIR_BITS) boundary.
 		uasm_i_jr(p, ptr);
 		if (mode == refill_scratch) {
-			if (scratch_reg >= 0) {
+			if (scratch_reg >= 0)
-				uasm_i_ehb(p);
 				UASM_i_MFC0(p, 1, c0_kscratch(), scratch_reg);
-			} else {
+			else
 				UASM_i_LW(p, 1, scratchpad_offset(0), 0);
-			}
 		} else {
 			uasm_i_nop(p);
 		}

arch/parisc/include/asm/cache.h+1−1

@@ -22,7 +22,7 @@ · 21 unmodified lines
22		22
23	#define ARCH_DMA_MINALIGN L1_CACHE_BYTES	23	#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
24		24
25	#define __read_mostly __attribute__((__section__(".data..read_mostly")))	25	#define __read_mostly __section(.data..read_mostly)
26		26
27	void parisc_cache_init(void); /* initializes cache-flushing */	27	void parisc_cache_init(void); /* initializes cache-flushing */
28	void disable_sr_hashing_asm(int); /* low level support for above */	28	void disable_sr_hashing_asm(int); /* low level support for above */

arch/parisc/include/asm/ldcw.h+1−1

@@ -52,7 +52,7 @@ · 51 unmodified lines
52	})	52	})
53		53
54	#ifdef CONFIG_SMP	54	#ifdef CONFIG_SMP
55	# define __lock_aligned __attribute__((__section__(".data..lock_aligned")))	55	# define __lock_aligned __section(.data..lock_aligned)
56	#endif	56	#endif
57		57
58	#endif /* __PARISC_LDCW_H */	58	#endif /* __PARISC_LDCW_H */

arch/parisc/mm/ioremap.c+7−5

@@ -3,7 +3,7 @@ · 2 unmodified lines
3	* arch/parisc/mm/ioremap.c	3	* arch/parisc/mm/ioremap.c
4	*	4	*
5	* (C) Copyright 1995 1996 Linus Torvalds	5	* (C) Copyright 1995 1996 Linus Torvalds
6	* (C) Copyright 2001-2006 Helge Deller <deller@gmx.de>	6	* (C) Copyright 2001-2019 Helge Deller <deller@gmx.de>
7	* (C) Copyright 2005 Kyle McMartin <kyle@parisc-linux.org>	7	* (C) Copyright 2005 Kyle McMartin <kyle@parisc-linux.org>
8	*/	8	*/
9		9
@@ -84,7 +84,7 @@ void __iomem * __ioremap(unsigned long phys_addr, unsigned long size, unsigned l · 74 unmodified lines
84	addr = (void __iomem *) area->addr;	84	addr = (void __iomem *) area->addr;
85	if (ioremap_page_range((unsigned long)addr, (unsigned long)addr + size,	85	if (ioremap_page_range((unsigned long)addr, (unsigned long)addr + size,
86	phys_addr, pgprot)) {	86	phys_addr, pgprot)) {
87	vfree(addr);	87	vunmap(addr);
88	return NULL;	88	return NULL;
89	}	89	}
90		90
@@ -92,9 +92,11 @@ void __iomem * __ioremap(unsigned long phys_addr, unsigned long size, unsigned l · 1 unmodified line
92	}	92	}
93	EXPORT_SYMBOL(__ioremap);	93	EXPORT_SYMBOL(__ioremap);
94		94
95	void iounmap(const volatile void __iomem *addr)	95	void iounmap(const volatile void __iomem *io_addr)
96	{	96	{
97	if (addr > high_memory)	97	unsigned long addr = (unsigned long)io_addr & PAGE_MASK;
98	return vfree((void *) (PAGE_MASK & (unsigned long __force) addr));	98
		99	if (is_vmalloc_addr((void *)addr))
		100	vunmap((void *)addr);
99	}	101	}
100	EXPORT_SYMBOL(iounmap);	102	EXPORT_SYMBOL(iounmap);

arch/powerpc/kvm/book3s_xive.c+16−8

 	struct kvmppc_xive *xive = dev->private;
 	struct kvmppc_xive_vcpu *xc;
 	int i, r = -EBUSY;
+	u32 vp_id;
 	pr_devel("connect_vcpu(cpu=%d)\n", cpu);
 		return -EPERM;
 	if (vcpu->arch.irq_type != KVMPPC_IRQ_DEFAULT)
 		return -EBUSY;
-	if (kvmppc_xive_find_server(vcpu->kvm, cpu)) {
-		pr_devel("Duplicate !\n");
-		return -EEXIST;
-	}
 	if (cpu >= (KVM_MAX_VCPUS * vcpu->kvm->arch.emul_smt_mode)) {
 		pr_devel("Out of bounds !\n");
 		return -EINVAL;
 	}
-	xc = kzalloc(sizeof(*xc), GFP_KERNEL);
-	if (!xc)
-		return -ENOMEM;
 	/* We need to synchronize with queue provisioning */
 	mutex_lock(&xive->lock);
+	vp_id = kvmppc_xive_vp(xive, cpu);
+	if (kvmppc_xive_vp_in_use(xive->kvm, vp_id)) {
+		pr_devel("Duplicate !\n");
+		r = -EEXIST;
+		goto bail;
+	}
+	xc = kzalloc(sizeof(*xc), GFP_KERNEL);
+	if (!xc) {
+		r = -ENOMEM;
+		goto bail;
+	}
 	vcpu->arch.xive_vcpu = xc;
 	xc->xive = xive;
 	xc->vcpu = vcpu;
 	xc->server_num = cpu;
-	xc->vp_id = kvmppc_xive_vp(xive, cpu);
+	xc->vp_id = vp_id;
 	xc->mfrr = 0xff;
 	xc->valid = true;

arch/powerpc/kvm/book3s_xive.h+12−0

@@ -220,6 +220,18 @@ static inline u32 kvmppc_xive_vp(struct kvmppc_xive *xive, u32 server) · 219 unmodified lines
220	return xive->vp_base + kvmppc_pack_vcpu_id(xive->kvm, server);	220	return xive->vp_base + kvmppc_pack_vcpu_id(xive->kvm, server);
221	}	221	}
222		222
		223	static inline bool kvmppc_xive_vp_in_use(struct kvm *kvm, u32 vp_id)
		224	{
		225	struct kvm_vcpu *vcpu = NULL;
		226	int i;
		227
		228	kvm_for_each_vcpu(i, vcpu, kvm) {
		229	if (vcpu->arch.xive_vcpu && vp_id == vcpu->arch.xive_vcpu->vp_id)
		230	return true;
		231	}
		232	return false;
		233	}
		234
223	/*	235	/*
224	* Mapping between guest priorities and host priorities	236	* Mapping between guest priorities and host priorities
225	* is as follow.	237	* is as follow.

arch/powerpc/kvm/book3s_xive_native.c+4−2

 	struct kvmppc_xive *xive = dev->private;
 	struct kvmppc_xive_vcpu *xc = NULL;
 	int rc;
+	u32 vp_id;
 	pr_devel("native_connect_vcpu(server=%d)\n", server_num);
 	mutex_lock(&xive->lock);
-	if (kvmppc_xive_find_server(vcpu->kvm, server_num)) {
+	vp_id = kvmppc_xive_vp(xive, server_num);
+	if (kvmppc_xive_vp_in_use(xive->kvm, vp_id)) {
 		pr_devel("Duplicate !\n");
 		rc = -EEXIST;
 		goto bail;
 	xc->vcpu = vcpu;
 	xc->server_num = server_num;
-	xc->vp_id = kvmppc_xive_vp(xive, server_num);
+	xc->vp_id = vp_id;
 	xc->valid = true;
 	vcpu->arch.irq_type = KVMPPC_IRQ_XIVE;

arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts+1−0

@@ -13,6 +13,7 @@ · 12 unmodified lines
13	compatible = "sifive,hifive-unleashed-a00", "sifive,fu540-c000";	13	compatible = "sifive,hifive-unleashed-a00", "sifive,fu540-c000";
14		14
15	chosen {	15	chosen {
		16	stdout-path = "serial0";
16	};	17	};
17		18
18	cpus {	19	cpus {

arch/riscv/include/asm/bug.h+3−13

 #include <asm/asm.h>
-#ifdef CONFIG_GENERIC_BUG
 #define __INSN_LENGTH_MASK  _UL(0x3)
 #define __INSN_LENGTH_32    _UL(0x3)
 #define __COMPRESSED_INSN_MASK	_UL(0xffff)
 #define __BUG_INSN_32	_UL(0x00100073) /* ebreak */
 #define __BUG_INSN_16	_UL(0x9002) /* c.ebreak */
-#ifndef __ASSEMBLY__
 typedef u32 bug_insn_t;
 #ifdef CONFIG_GENERIC_BUG_RELATIVE_POINTERS
 	RISCV_SHORT " %2"
 #endif
+#ifdef CONFIG_GENERIC_BUG
 #define __BUG_FLAGS(flags)					\
 do {								\
 	__asm__ __volatile__ (					\
 		  "i" (flags),					\
 		  "i" (sizeof(struct bug_entry)));              \
 } while (0)
-#endif /* !__ASSEMBLY__ */
 #else /* CONFIG_GENERIC_BUG */
-#ifndef __ASSEMBLY__
 #define __BUG_FLAGS(flags) do {					\
 	__asm__ __volatile__ ("ebreak\n");			\
 } while (0)
-#endif /* !__ASSEMBLY__ */
 #endif /* CONFIG_GENERIC_BUG */
 #define BUG() do {						\
 #include <asm-generic/bug.h>
-#ifndef __ASSEMBLY__
 struct pt_regs;
 struct task_struct;
-extern void die(struct pt_regs *regs, const char *str);
+void die(struct pt_regs *regs, const char *str);
-extern void do_trap(struct pt_regs *regs, int signo, int code,
+void do_trap(struct pt_regs *regs, int signo, int code, unsigned long addr);
-	unsigned long addr);
-#endif /* !__ASSEMBLY__ */
 #endif /* _ASM_RISCV_BUG_H */

arch/riscv/include/asm/pgtable.h+9−14

 #define VMALLOC_END      (PAGE_OFFSET - 1)
 #define VMALLOC_START    (PAGE_OFFSET - VMALLOC_SIZE)
-#define FIXADDR_TOP      VMALLOC_START
-#ifdef CONFIG_64BIT
-#define FIXADDR_SIZE     PMD_SIZE
-#else
-#define FIXADDR_SIZE     PGDIR_SIZE
-#endif
-#define FIXADDR_START    (FIXADDR_TOP - FIXADDR_SIZE)
 /*
  * Roughly size the vmemmap space to be large enough to fit enough
  * struct pages to map half the virtual address space. Then
 #define vmemmap		((struct page *)VMEMMAP_START)
+#define FIXADDR_TOP      (VMEMMAP_START)
+#ifdef CONFIG_64BIT
+#define FIXADDR_SIZE     PMD_SIZE
+#else
+#define FIXADDR_SIZE     PGDIR_SIZE
+#endif
+#define FIXADDR_START    (FIXADDR_TOP - FIXADDR_SIZE)
 /*
  * ZERO_PAGE is a global shared page that is always zero,
  * used for zero-mapped memory areas, etc.
 	return __pte((pfn << _PAGE_PFN_SHIFT) | pgprot_val(prot));
 }
-static inline pte_t mk_pte(struct page *page, pgprot_t prot)
+#define mk_pte(page, prot)       pfn_pte(page_to_pfn(page), prot)
-{
-	return pfn_pte(page_to_pfn(page), prot);
-}
 #define pte_index(addr) (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
 #define __pte_to_swp_entry(pte)	((swp_entry_t) { pte_val(pte) })
 #define __swp_entry_to_pte(x)	((pte_t) { (x).val })
-#ifdef CONFIG_FLATMEM
 #define kern_addr_valid(addr)   (1) /* FIXME */
-#endif
 extern void *dtb_early_va;
 extern void setup_bootmem(void);

arch/riscv/include/asm/tlbflush.h+0−4

 #include <linux/mm_types.h>
 #include <asm/smp.h>
-/*
- * Flush entire local TLB.  'sfence.vma' implicitly fences with the instruction
- * cache as well, so a 'fence.i' is not necessary.
- */
 static inline void local_flush_tlb_all(void)
 {
 	__asm__ __volatile__ ("sfence.vma" : : : "memory");

arch/riscv/kernel/traps.c+6−20

@@ -111,7 +111,6 @@ DO_ERROR_INFO(do_trap_ecall_s, · 110 unmodified lines
111	DO_ERROR_INFO(do_trap_ecall_m,	111	DO_ERROR_INFO(do_trap_ecall_m,
112	SIGILL, ILL_ILLTRP, "environment call from M-mode");	112	SIGILL, ILL_ILLTRP, "environment call from M-mode");
113		113
114	#ifdef CONFIG_GENERIC_BUG
115	static inline unsigned long get_break_insn_length(unsigned long pc)	114	static inline unsigned long get_break_insn_length(unsigned long pc)
116	{	115	{
117	bug_insn_t insn;	116	bug_insn_t insn;
@@ -120,28 +119,15 @@ static inline unsigned long get_break_insn_length(unsigned long pc) · 2 unmodified lines
120	return 0;	119	return 0;
121	return (((insn & __INSN_LENGTH_MASK) == __INSN_LENGTH_32) ? 4UL : 2UL);	120	return (((insn & __INSN_LENGTH_MASK) == __INSN_LENGTH_32) ? 4UL : 2UL);
122	}	121	}
123	#endif /* CONFIG_GENERIC_BUG */
124		122
125	asmlinkage void do_trap_break(struct pt_regs *regs)	123	asmlinkage void do_trap_break(struct pt_regs *regs)
126	{	124	{
127	if (!user_mode(regs)) {	125	if (user_mode(regs))
128	enum bug_trap_type type;	126	force_sig_fault(SIGTRAP, TRAP_BRKPT, (void __user *)regs->sepc);
129		127	else if (report_bug(regs->sepc, regs) == BUG_TRAP_TYPE_WARN)
130	type = report_bug(regs->sepc, regs);	128	regs->sepc += get_break_insn_length(regs->sepc);
131	switch (type) {	129	else
132	#ifdef CONFIG_GENERIC_BUG	130	die(regs, "Kernel BUG");
133	case BUG_TRAP_TYPE_WARN:
134	regs->sepc += get_break_insn_length(regs->sepc);
135	return;
136	case BUG_TRAP_TYPE_BUG:
137	#endif /* CONFIG_GENERIC_BUG */
138	default:
139	die(regs, "Kernel BUG");
140	}
141	} else {
142	force_sig_fault(SIGTRAP, TRAP_BRKPT,
143	(void __user *)(regs->sepc));
144	}
145	}	131	}
146		132
147	#ifdef CONFIG_GENERIC_BUG	133	#ifdef CONFIG_GENERIC_BUG

arch/riscv/mm/init.c+1−1

@@ -458,7 +458,7 @@ void __init paging_init(void) · 457 unmodified lines
458	zone_sizes_init();	458	zone_sizes_init();
459	}	459	}
460		460
461	#ifdef CONFIG_SPARSEMEM	461	#ifdef CONFIG_SPARSEMEM_VMEMMAP
462	int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,	462	int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
463	struct vmem_altmap *altmap)	463	struct vmem_altmap *altmap)
464	{	464	{

arch/s390/boot/startup.c+11−3

 	dynsym = (Elf64_Sym *) vmlinux.dynsym_start;
 	for (rela = rela_start; rela < rela_end; rela++) {
 		loc = rela->r_offset + offset;
-		val = rela->r_addend + offset;
+		val = rela->r_addend;
 		r_sym = ELF64_R_SYM(rela->r_info);
-		if (r_sym)
+		if (r_sym) {
-			val += dynsym[r_sym].st_value;
+			if (dynsym[r_sym].st_shndx != SHN_UNDEF)
+				val += dynsym[r_sym].st_value + offset;
+		} else {
+			/*
+			 * 0 == undefined symbol table index (STN_UNDEF),
+			 * used for R_390_RELATIVE, only add KASLR offset
+			 */
+			val += offset;
+		}
 		r_type = ELF64_R_TYPE(rela->r_info);
 		rc = arch_kexec_do_relocs(r_type, (void *) loc, val, 0);
 		if (rc)

arch/s390/kernel/machine_kexec_reloc.c+1−0

@@ -27,6 +27,7 @@ int arch_kexec_do_relocs(int r_type, void *loc, unsigned long val, · 26 unmodified lines
27	(u32 )loc = val;	27	(u32 )loc = val;
28	break;	28	break;
29	case R_390_64: /* Direct 64 bit. */	29	case R_390_64: /* Direct 64 bit. */
		30	case R_390_GLOB_DAT:
30	(u64 )loc = val;	31	(u64 )loc = val;
31	break;	32	break;
32	case R_390_PC16: /* PC relative 16 bit. */	33	case R_390_PC16: /* PC relative 16 bit. */

arch/sparc/Kconfig+0−1

@@ -29,7 +29,6 @@ config SPARC · 28 unmodified lines
29	select RTC_DRV_M48T59	29	select RTC_DRV_M48T59
30	select RTC_SYSTOHC	30	select RTC_SYSTOHC
31	select HAVE_ARCH_JUMP_LABEL if SPARC64	31	select HAVE_ARCH_JUMP_LABEL if SPARC64
32	select HAVE_FAST_GUP if SPARC64
33	select GENERIC_IRQ_SHOW	32	select GENERIC_IRQ_SHOW
34	select ARCH_WANT_IPC_PARSE_VERSION	33	select ARCH_WANT_IPC_PARSE_VERSION
35	select GENERIC_PCI_IOMAP	34	select GENERIC_PCI_IOMAP

arch/x86/boot/compressed/acpi.c+24−24

  */
 struct mem_vector immovable_mem[MAX_NUMNODES*2];
-/*
- * Max length of 64-bit hex address string is 19, prefix "0x" + 16 hex
- * digits, and '\0' for termination.
- */
-#define MAX_ADDR_LEN 19
-static acpi_physical_address get_cmdline_acpi_rsdp(void)
-{
-	acpi_physical_address addr = 0;
-#ifdef CONFIG_KEXEC
-	char val[MAX_ADDR_LEN] = { };
-	int ret;
-	ret = cmdline_find_option("acpi_rsdp", val, MAX_ADDR_LEN);
-	if (ret < 0)
-		return 0;
-	if (kstrtoull(val, 16, &addr))
-		return 0;
-#endif
-	return addr;
-}
 /*
  * Search EFI system tables for RSDP.  If both ACPI_20_TABLE_GUID and
  * ACPI_TABLE_GUID are found, take the former, which has more features.
 }
 #if defined(CONFIG_RANDOMIZE_BASE) && defined(CONFIG_MEMORY_HOTREMOVE)
+/*
+ * Max length of 64-bit hex address string is 19, prefix "0x" + 16 hex
+ * digits, and '\0' for termination.
+ */
+#define MAX_ADDR_LEN 19
+static acpi_physical_address get_cmdline_acpi_rsdp(void)
+{
+	acpi_physical_address addr = 0;
+#ifdef CONFIG_KEXEC
+	char val[MAX_ADDR_LEN] = { };
+	int ret;
+	ret = cmdline_find_option("acpi_rsdp", val, MAX_ADDR_LEN);
+	if (ret < 0)
+		return 0;
+	if (kstrtoull(val, 16, &addr))
+		return 0;
+#endif
+	return addr;
+}
 /* Compute SRAT address from RSDP. */
 static unsigned long get_acpi_srat_table(void)
 {

arch/x86/boot/compressed/misc.c+19−6

 {
 	const unsigned long kernel_total_size = VO__end - VO__text;
 	unsigned long virt_addr = LOAD_PHYSICAL_ADDR;
+	unsigned long needed_size;
 	/* Retain x86 boot parameters pointer passed from startup_32/64. */
 	boot_params = rmode;
 	free_mem_ptr     = heap;	/* Heap */
 	free_mem_end_ptr = heap + BOOT_HEAP_SIZE;
+	/*
+	 * The memory hole needed for the kernel is the larger of either
+	 * the entire decompressed kernel plus relocation table, or the
+	 * entire decompressed kernel plus .bss and .brk sections.
+	 *
+	 * On X86_64, the memory is mapped with PMD pages. Round the
+	 * size up so that the full extent of PMD pages mapped is
+	 * included in the check against the valid memory table
+	 * entries. This ensures the full mapped area is usable RAM
+	 * and doesn't include any reserved areas.
+	 */
+	needed_size = max(output_len, kernel_total_size);
+#ifdef CONFIG_X86_64
+	needed_size = ALIGN(needed_size, MIN_KERNEL_ALIGN);
+#endif
 	/* Report initial kernel position details. */
 	debug_putaddr(input_data);
 	debug_putaddr(input_len);
 	debug_putaddr(output);
 	debug_putaddr(output_len);
 	debug_putaddr(kernel_total_size);
+	debug_putaddr(needed_size);
 #ifdef CONFIG_X86_64
 	/* Report address of 32-bit trampoline */
 	debug_putaddr(trampoline_32bit);
 #endif
-	/*
-	 * The memory hole needed for the kernel is the larger of either
-	 * the entire decompressed kernel plus relocation table, or the
-	 * entire decompressed kernel plus .bss and .brk sections.
-	 */
 	choose_random_location((unsigned long)input_data, input_len,
 				(unsigned long *)&output,
-				max(output_len, kernel_total_size),
+				needed_size,
 				&virt_addr);
 	/* Validate memory location choices. */

arch/x86/events/amd/ibs.c+5−3

 					  struct hw_perf_event *hwc, u64 config)
 {
 	config &= ~perf_ibs->cnt_mask;
-	wrmsrl(hwc->config_base, config);
+	if (boot_cpu_data.x86 == 0x10)
+		wrmsrl(hwc->config_base, config);
 	config &= ~perf_ibs->enable_mask;
 	wrmsrl(hwc->config_base, config);
 }
 	},
 	.msr			= MSR_AMD64_IBSOPCTL,
 	.config_mask		= IBS_OP_CONFIG_MASK,
-	.cnt_mask		= IBS_OP_MAX_CNT,
+	.cnt_mask		= IBS_OP_MAX_CNT | IBS_OP_CUR_CNT |
+				  IBS_OP_CUR_CNT_RAND,
 	.enable_mask		= IBS_OP_ENABLE,
 	.valid_mask		= IBS_OP_VAL,
 	.max_period		= IBS_OP_MAX_CNT << 4,
 	if (event->attr.sample_type & PERF_SAMPLE_RAW)
 		offset_max = perf_ibs->offset_max;
 	else if (check_rip)
-		offset_max = 2;
+		offset_max = 3;
 	else
 		offset_max = 1;
 	do {

arch/x86/events/intel/uncore.c+38−6

@@ -502,10 +502,8 @@ void uncore_pmu_event_start(struct perf_event *event, int flags) · 501 unmodified lines
502	local64_set(&event->hw.prev_count, uncore_read_counter(box, event));	502	local64_set(&event->hw.prev_count, uncore_read_counter(box, event));
503	uncore_enable_event(box, event);	503	uncore_enable_event(box, event);
504		504
505	if (box->n_active == 1) {	505	if (box->n_active == 1)
506	uncore_enable_box(box);
507	uncore_pmu_start_hrtimer(box);	506	uncore_pmu_start_hrtimer(box);
508	}
509	}	507	}
510		508
511	void uncore_pmu_event_stop(struct perf_event *event, int flags)	509	void uncore_pmu_event_stop(struct perf_event *event, int flags)
@@ -529,10 +527,8 @@ void uncore_pmu_event_stop(struct perf_event *event, int flags) · 17 unmodified lines
529	WARN_ON_ONCE(hwc->state & PERF_HES_STOPPED);	527	WARN_ON_ONCE(hwc->state & PERF_HES_STOPPED);
530	hwc->state \|= PERF_HES_STOPPED;	528	hwc->state \|= PERF_HES_STOPPED;
531		529
532	if (box->n_active == 0) {	530	if (box->n_active == 0)
533	uncore_disable_box(box);
534	uncore_pmu_cancel_hrtimer(box);	531	uncore_pmu_cancel_hrtimer(box);
535	}
536	}	532	}
537		533
538	if ((flags & PERF_EF_UPDATE) && !(hwc->state & PERF_HES_UPTODATE)) {	534	if ((flags & PERF_EF_UPDATE) && !(hwc->state & PERF_HES_UPTODATE)) {
@@ -778,6 +774,40 @@ static int uncore_pmu_event_init(struct perf_event *event) · 239 unmodified lines
778	return ret;	774	return ret;
779	}	775	}
780		776
		777	static void uncore_pmu_enable(struct pmu *pmu)
		778	{
		779	struct intel_uncore_pmu *uncore_pmu;
		780	struct intel_uncore_box *box;
		781
		782	uncore_pmu = container_of(pmu, struct intel_uncore_pmu, pmu);
		783	if (!uncore_pmu)
		784	return;
		785
		786	box = uncore_pmu_to_box(uncore_pmu, smp_processor_id());
		787	if (!box)
		788	return;
		789
		790	if (uncore_pmu->type->ops->enable_box)
		791	uncore_pmu->type->ops->enable_box(box);
		792	}
		793
		794	static void uncore_pmu_disable(struct pmu *pmu)
		795	{
		796	struct intel_uncore_pmu *uncore_pmu;
		797	struct intel_uncore_box *box;
		798
		799	uncore_pmu = container_of(pmu, struct intel_uncore_pmu, pmu);
		800	if (!uncore_pmu)
		801	return;
		802
		803	box = uncore_pmu_to_box(uncore_pmu, smp_processor_id());
		804	if (!box)
		805	return;
		806
		807	if (uncore_pmu->type->ops->disable_box)
		808	uncore_pmu->type->ops->disable_box(box);
		809	}
		810
781	static ssize_t uncore_get_attr_cpumask(struct device *dev,	811	static ssize_t uncore_get_attr_cpumask(struct device *dev,
782	struct device_attribute attr, char buf)	812	struct device_attribute attr, char buf)
783	{	813	{
@@ -803,6 +833,8 @@ static int uncore_pmu_register(struct intel_uncore_pmu *pmu) · 19 unmodified lines
803	pmu->pmu = (struct pmu) {	833	pmu->pmu = (struct pmu) {
804	.attr_groups = pmu->type->attr_groups,	834	.attr_groups = pmu->type->attr_groups,
805	.task_ctx_nr = perf_invalid_context,	835	.task_ctx_nr = perf_invalid_context,
		836	.pmu_enable = uncore_pmu_enable,
		837	.pmu_disable = uncore_pmu_disable,
806	.event_init = uncore_pmu_event_init,	838	.event_init = uncore_pmu_event_init,
807	.add = uncore_pmu_event_add,	839	.add = uncore_pmu_event_add,
808	.del = uncore_pmu_event_del,	840	.del = uncore_pmu_event_del,

arch/x86/events/intel/uncore.h+0−12

@@ -441,18 +441,6 @@ static inline int uncore_freerunning_hw_config(struct intel_uncore_box *box, · 440 unmodified lines
441	return -EINVAL;	441	return -EINVAL;
442	}	442	}
443		443
444	static inline void uncore_disable_box(struct intel_uncore_box *box)
445	{
446	if (box->pmu->type->ops->disable_box)
447	box->pmu->type->ops->disable_box(box);
448	}
449
450	static inline void uncore_enable_box(struct intel_uncore_box *box)
451	{
452	if (box->pmu->type->ops->enable_box)
453	box->pmu->type->ops->enable_box(box);
454	}
455
456	static inline void uncore_disable_event(struct intel_uncore_box *box,	444	static inline void uncore_disable_event(struct intel_uncore_box *box,
457	struct perf_event *event)	445	struct perf_event *event)
458	{	446	{

arch/x86/hyperv/hv_apic.c+15−5

 	}
 	if (ms_hyperv.hints & HV_X64_APIC_ACCESS_RECOMMENDED) {
-		pr_info("Hyper-V: Using MSR based APIC access\n");
+		pr_info("Hyper-V: Using enlightened APIC (%s mode)",
+			x2apic_enabled() ? "x2apic" : "xapic");
+		/*
+		 * With x2apic, architectural x2apic MSRs are equivalent to the
+		 * respective synthetic MSRs, so there's no need to override
+		 * the apic accessors.  The only exception is
+		 * hv_apic_eoi_write, because it benefits from lazy EOI when
+		 * available, but it works for both xapic and x2apic modes.
+		 */
 		apic_set_eoi_write(hv_apic_eoi_write);
-		apic->read      = hv_apic_read;
+		if (!x2apic_enabled()) {
-		apic->write     = hv_apic_write;
+			apic->read      = hv_apic_read;
-		apic->icr_write = hv_apic_icr_write;
+			apic->write     = hv_apic_write;
-		apic->icr_read  = hv_apic_icr_read;
+			apic->icr_write = hv_apic_icr_write;
+			apic->icr_read  = hv_apic_icr_read;
+		}
 	}
 }

arch/x86/include/asm/kvm_host.h+1−1

@@ -1189,7 +1189,7 @@ struct kvm_x86_ops { · 1188 unmodified lines
1189	int (set_nested_state)(struct kvm_vcpu vcpu,	1189	int (set_nested_state)(struct kvm_vcpu vcpu,
1190	struct kvm_nested_state __user *user_kvm_nested_state,	1190	struct kvm_nested_state __user *user_kvm_nested_state,
1191	struct kvm_nested_state *kvm_state);	1191	struct kvm_nested_state *kvm_state);
1192	void (get_vmcs12_pages)(struct kvm_vcpu vcpu);	1192	bool (get_vmcs12_pages)(struct kvm_vcpu vcpu);
1193		1193
1194	int (smi_allowed)(struct kvm_vcpu vcpu);	1194	int (smi_allowed)(struct kvm_vcpu vcpu);
1195	int (pre_enter_smm)(struct kvm_vcpu vcpu, char *smstate);	1195	int (pre_enter_smm)(struct kvm_vcpu vcpu, char *smstate);

arch/x86/include/asm/vmware.h+9−5

 #include <asm/cpufeatures.h>
 #include <asm/alternative.h>
+#include <linux/stringify.h>
 /*
  * The hypercall definitions differ in the low word of the %edx argument
  */
 /* Old port-based version */
-#define VMWARE_HYPERVISOR_PORT    "0x5658"
+#define VMWARE_HYPERVISOR_PORT    0x5658
-#define VMWARE_HYPERVISOR_PORT_HB "0x5659"
+#define VMWARE_HYPERVISOR_PORT_HB 0x5659
 /* Current vmcall / vmmcall version */
 #define VMWARE_HYPERVISOR_HB   BIT(0)
 /* The low bandwidth call. The low word of edx is presumed clear. */
 #define VMWARE_HYPERCALL						\
-	ALTERNATIVE_2("movw $" VMWARE_HYPERVISOR_PORT ", %%dx; inl (%%dx)", \
+	ALTERNATIVE_2("movw $" __stringify(VMWARE_HYPERVISOR_PORT) ", %%dx; " \
+		      "inl (%%dx), %%eax",				\
 		      "vmcall", X86_FEATURE_VMCALL,			\
 		      "vmmcall", X86_FEATURE_VMW_VMMCALL)
  * HB and OUT bits set.
  */
 #define VMWARE_HYPERCALL_HB_OUT						\
-	ALTERNATIVE_2("movw $" VMWARE_HYPERVISOR_PORT_HB ", %%dx; rep outsb", \
+	ALTERNATIVE_2("movw $" __stringify(VMWARE_HYPERVISOR_PORT_HB) ", %%dx; " \
+		      "rep outsb",					\
 		      "vmcall", X86_FEATURE_VMCALL,			\
 		      "vmmcall", X86_FEATURE_VMW_VMMCALL)
  * HB bit set.
  */
 #define VMWARE_HYPERCALL_HB_IN						\
-	ALTERNATIVE_2("movw $" VMWARE_HYPERVISOR_PORT_HB ", %%dx; rep insb", \
+	ALTERNATIVE_2("movw $" __stringify(VMWARE_HYPERVISOR_PORT_HB) ", %%dx; " \
+		      "rep insb",					\
 		      "vmcall", X86_FEATURE_VMCALL,			\
 		      "vmmcall", X86_FEATURE_VMW_VMMCALL)
 #endif

arch/x86/kernel/apic/x2apic_cluster.c+2−1

@@ -156,7 +156,8 @@ static int x2apic_dead_cpu(unsigned int dead_cpu) · 155 unmodified lines
156	{	156	{
157	struct cluster_mask *cmsk = per_cpu(cluster_masks, dead_cpu);	157	struct cluster_mask *cmsk = per_cpu(cluster_masks, dead_cpu);
158		158
159	cpumask_clear_cpu(dead_cpu, &cmsk->mask);	159	if (cmsk)
		160	cpumask_clear_cpu(dead_cpu, &cmsk->mask);
160	free_cpumask_var(per_cpu(ipi_mask, dead_cpu));	161	free_cpumask_var(per_cpu(ipi_mask, dead_cpu));
161	return 0;	162	return 0;
162	}	163	}

arch/x86/kernel/cpu/mshyperv.c+4−0

 	int hv_host_info_ecx;
 	int hv_host_info_edx;
+#ifdef CONFIG_PARAVIRT
+	pv_info.name = "Hyper-V";
+#endif
 	/*
 	 * Extract the features and hints
 	 */

arch/x86/kernel/head64.c+20−2

@@ -222,13 +222,31 @@ unsigned long __head __startup_64(unsigned long physaddr, · 221 unmodified lines
222	* we might write invalid pmds, when the kernel is relocated	222	* we might write invalid pmds, when the kernel is relocated
223	* cleanup_highmap() fixes this up along with the mappings	223	* cleanup_highmap() fixes this up along with the mappings
224	* beyond _end.	224	* beyond _end.
		225	*
		226	* Only the region occupied by the kernel image has so far
		227	* been checked against the table of usable memory regions
		228	* provided by the firmware, so invalidate pages outside that
		229	* region. A page table entry that maps to a reserved area of
		230	* memory would allow processor speculation into that area,
		231	* and on some hardware (particularly the UV platform) even
		232	* speculative access to some reserved areas is caught as an
		233	* error, causing the BIOS to halt the system.
225	*/	234	*/
226		235
227	pmd = fixup_pointer(level2_kernel_pgt, physaddr);	236	pmd = fixup_pointer(level2_kernel_pgt, physaddr);
228	for (i = 0; i < PTRS_PER_PMD; i++) {	237
		238	/* invalidate pages before the kernel image */
		239	for (i = 0; i < pmd_index((unsigned long)_text); i++)
		240	pmd[i] &= ~_PAGE_PRESENT;
		241
		242	/* fixup pages that are part of the kernel image */
		243	for (; i <= pmd_index((unsigned long)_end); i++)
229	if (pmd[i] & _PAGE_PRESENT)	244	if (pmd[i] & _PAGE_PRESENT)
230	pmd[i] += load_delta;	245	pmd[i] += load_delta;
231	}	246
		247	/* invalidate pages after the kernel image */
		248	for (; i < PTRS_PER_PMD; i++)
		249	pmd[i] &= ~_PAGE_PRESENT;
232		250
233	/*	251	/*
234	* Fixup phys_base - remove the memory encryption mask to obtain	252	* Fixup phys_base - remove the memory encryption mask to obtain

arch/x86/kvm/cpuid.c+1−1

@@ -363,7 +363,7 @@ static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2 *entry, int index) · 362 unmodified lines
363		363
364	/* cpuid 7.0.ecx*/	364	/* cpuid 7.0.ecx*/
365	const u32 kvm_cpuid_7_0_ecx_x86_features =	365	const u32 kvm_cpuid_7_0_ecx_x86_features =
366	F(AVX512VBMI) \| F(LA57) \| F(PKU) \| 0 /OSPKE/ \|	366	F(AVX512VBMI) \| F(LA57) \| F(PKU) \| 0 /OSPKE/ \| F(RDPID) \|
367	F(AVX512_VPOPCNTDQ) \| F(UMIP) \| F(AVX512_VBMI2) \| F(GFNI) \|	367	F(AVX512_VPOPCNTDQ) \| F(UMIP) \| F(AVX512_VBMI2) \| F(GFNI) \|
368	F(VAES) \| F(VPCLMULQDQ) \| F(AVX512_VNNI) \| F(AVX512_BITALG) \|	368	F(VAES) \| F(VPCLMULQDQ) \| F(AVX512_VNNI) \| F(AVX512_BITALG) \|
369	F(CLDEMOTE) \| F(MOVDIRI) \| F(MOVDIR64B) \| 0 /WAITPKG/;	369	F(CLDEMOTE) \| F(MOVDIRI) \| F(MOVDIR64B) \| 0 /WAITPKG/;

arch/x86/kvm/lapic.c+0−5

 	(LVT_MASK | APIC_MODE_MASK | APIC_INPUT_POLARITY | \
 	 APIC_LVT_REMOTE_IRR | APIC_LVT_LEVEL_TRIGGER)
-static inline u8 kvm_xapic_id(struct kvm_lapic *apic)
-{
-	return kvm_lapic_get_reg(apic, APIC_ID) >> 24;
-}
 static inline u32 kvm_x2apic_id(struct kvm_lapic *apic)
 {
 	return apic->vcpu->vcpu_id;

arch/x86/kvm/lapic.h+5−0

@@ -242,4 +242,9 @@ static inline enum lapic_mode kvm_apic_mode(u64 apic_base) · 241 unmodified lines
242	return apic_base & (MSR_IA32_APICBASE_ENABLE \| X2APIC_ENABLE);	242	return apic_base & (MSR_IA32_APICBASE_ENABLE \| X2APIC_ENABLE);
243	}	243	}
244		244
		245	static inline u8 kvm_xapic_id(struct kvm_lapic *apic)
		246	{
		247	return kvm_lapic_get_reg(apic, APIC_ID) >> 24;
		248	}
		249
245	#endif	250	#endif

arch/x86/kvm/svm.c+3−3

 	int ret = 0;
 	struct vcpu_svm *svm = to_svm(vcpu);
 	u32 ldr = kvm_lapic_get_reg(vcpu->arch.apic, APIC_LDR);
+	u32 id = kvm_xapic_id(vcpu->arch.apic);
 	if (ldr == svm->ldr_reg)
 		return 0;
 	avic_invalidate_logical_id_entry(vcpu);
 	if (ldr)
-		ret = avic_ldr_write(vcpu, vcpu->vcpu_id, ldr);
+		ret = avic_ldr_write(vcpu, id, ldr);
 	if (!ret)
 		svm->ldr_reg = ldr;
 {
 	u64 *old, *new;
 	struct vcpu_svm *svm = to_svm(vcpu);
-	u32 apic_id_reg = kvm_lapic_get_reg(vcpu->arch.apic, APIC_ID);
+	u32 id = kvm_xapic_id(vcpu->arch.apic);
-	u32 id = (apic_id_reg >> 24) & 0xff;
 	if (vcpu->vcpu_id == id)
 		return 0;

arch/x86/kvm/vmx/nested.c+36−28

 static inline bool nested_vmx_prepare_msr_bitmap(struct kvm_vcpu *vcpu,
 						 struct vmcs12 *vmcs12);
-static void nested_get_vmcs12_pages(struct kvm_vcpu *vcpu)
+static bool nested_get_vmcs12_pages(struct kvm_vcpu *vcpu)
 {
 	struct vmcs12 *vmcs12 = get_vmcs12(vcpu);
 	struct vcpu_vmx *vmx = to_vmx(vcpu);
 			vmx->nested.apic_access_page = NULL;
 		}
 		page = kvm_vcpu_gpa_to_page(vcpu, vmcs12->apic_access_addr);
-		/*
-		 * If translation failed, no matter: This feature asks
-		 * to exit when accessing the given address, and if it
-		 * can never be accessed, this feature won't do
-		 * anything anyway.
-		 */
 		if (!is_error_page(page)) {
 			vmx->nested.apic_access_page = page;
 			hpa = page_to_phys(vmx->nested.apic_access_page);
 			vmcs_write64(APIC_ACCESS_ADDR, hpa);
 		} else {
-			secondary_exec_controls_clearbit(vmx,
+			pr_debug_ratelimited("%s: no backing 'struct page' for APIC-access address in vmcs12\n",
-				SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES);
+					     __func__);
+			vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
+			vcpu->run->internal.suberror =
+				KVM_INTERNAL_ERROR_EMULATION;
+			vcpu->run->internal.ndata = 0;
+			return false;
 		}
 	}
 		exec_controls_setbit(vmx, CPU_BASED_USE_MSR_BITMAPS);
 	else
 		exec_controls_clearbit(vmx, CPU_BASED_USE_MSR_BITMAPS);
+	return true;
 }
 /*
 /*
  * If from_vmentry is false, this is being called from state restore (either RSM
  * or KVM_SET_NESTED_STATE).  Otherwise it's called from vmlaunch/vmresume.
-+ *
+ *
-+ * Returns:
+ * Returns:
-+ *   0 - success, i.e. proceed with actual VMEnter
+ *	NVMX_ENTRY_SUCCESS: Entered VMX non-root mode
-+ *   1 - consistency check VMExit
+ *	NVMX_ENTRY_VMFAIL:  Consistency check VMFail
-+ *  -1 - consistency check VMFail
+ *	NVMX_ENTRY_VMEXIT:  Consistency check VMExit
+ *	NVMX_ENTRY_KVM_INTERNAL_ERROR: KVM internal error
  */
-int nested_vmx_enter_non_root_mode(struct kvm_vcpu *vcpu, bool from_vmentry)
+enum nvmx_vmentry_status nested_vmx_enter_non_root_mode(struct kvm_vcpu *vcpu,
+							bool from_vmentry)
 {
 	struct vcpu_vmx *vmx = to_vmx(vcpu);
 	struct vmcs12 *vmcs12 = get_vmcs12(vcpu);
 	prepare_vmcs02_early(vmx, vmcs12);
 	if (from_vmentry) {
-		nested_get_vmcs12_pages(vcpu);
+		if (unlikely(!nested_get_vmcs12_pages(vcpu)))
+			return NVMX_VMENTRY_KVM_INTERNAL_ERROR;
 		if (nested_vmx_check_vmentry_hw(vcpu)) {
 			vmx_switch_vmcs(vcpu, &vmx->vmcs01);
-			return -1;
+			return NVMX_VMENTRY_VMFAIL;
 		}
 		if (nested_vmx_check_guest_state(vcpu, vmcs12, &exit_qual))
 	 * returned as far as L1 is concerned. It will only return (and set
 	 * the success flag) when L2 exits (see nested_vmx_vmexit()).
 	 */
-	return 0;
+	return NVMX_VMENTRY_SUCCESS;
 	/*
 	 * A failed consistency check that leads to a VMExit during L1's
 	vmx_switch_vmcs(vcpu, &vmx->vmcs01);
 	if (!from_vmentry)
-		return 1;
+		return NVMX_VMENTRY_VMEXIT;
 	load_vmcs12_host_state(vcpu, vmcs12);
 	vmcs12->vm_exit_reason = exit_reason | VMX_EXIT_REASONS_FAILED_VMENTRY;
 	vmcs12->exit_qualification = exit_qual;
 	if (enable_shadow_vmcs || vmx->nested.hv_evmcs)
 		vmx->nested.need_vmcs12_to_shadow_sync = true;
-	return 1;
+	return NVMX_VMENTRY_VMEXIT;
 }
 /*
 static int nested_vmx_run(struct kvm_vcpu *vcpu, bool launch)
 {
 	struct vmcs12 *vmcs12;
+	enum nvmx_vmentry_status status;
 	struct vcpu_vmx *vmx = to_vmx(vcpu);
 	u32 interrupt_shadow = vmx_get_interrupt_shadow(vcpu);
-	int ret;
 	if (!nested_vmx_check_permission(vcpu))
 		return 1;
 	 * the nested entry.
 	 */
 	vmx->nested.nested_run_pending = 1;
-	ret = nested_vmx_enter_non_root_mode(vcpu, true);
+	status = nested_vmx_enter_non_root_mode(vcpu, true);
-	vmx->nested.nested_run_pending = !ret;
+	if (unlikely(status != NVMX_VMENTRY_SUCCESS))
-	if (ret > 0)
+		goto vmentry_failed;
-		return 1;
-	else if (ret)
-		return nested_vmx_failValid(vcpu,
-			VMXERR_ENTRY_INVALID_CONTROL_FIELD);
 	/* Hide L1D cache contents from the nested guest.  */
 	vmx->vcpu.arch.l1tf_flush_l1d = true;
 		return kvm_vcpu_halt(vcpu);
 	}
 	return 1;
+vmentry_failed:
+	vmx->nested.nested_run_pending = 0;
+	if (status == NVMX_VMENTRY_KVM_INTERNAL_ERROR)
+		return 0;
+	if (status == NVMX_VMENTRY_VMEXIT)
+		return 1;
+	WARN_ON_ONCE(status != NVMX_VMENTRY_VMFAIL);
+	return nested_vmx_failValid(vcpu, VMXERR_ENTRY_INVALID_CONTROL_FIELD);
 }
 /*

arch/x86/kvm/vmx/nested.h+12−1

 #include "vmcs12.h"
 #include "vmx.h"
+/*
+ * Status returned by nested_vmx_enter_non_root_mode():
+ */
+enum nvmx_vmentry_status {
+	NVMX_VMENTRY_SUCCESS,		/* Entered VMX non-root mode */
+	NVMX_VMENTRY_VMFAIL,		/* Consistency check VMFail */
+	NVMX_VMENTRY_VMEXIT,		/* Consistency check VMExit */
+	NVMX_VMENTRY_KVM_INTERNAL_ERROR,/* KVM internal error */
+};
 void vmx_leave_nested(struct kvm_vcpu *vcpu);
 void nested_vmx_setup_ctls_msrs(struct nested_vmx_msrs *msrs, u32 ept_caps,
 				bool apicv);
 __init int nested_vmx_hardware_setup(int (*exit_handlers[])(struct kvm_vcpu *));
 void nested_vmx_vcpu_setup(void);
 void nested_vmx_free_vcpu(struct kvm_vcpu *vcpu);
-int nested_vmx_enter_non_root_mode(struct kvm_vcpu *vcpu, bool from_vmentry);
+enum nvmx_vmentry_status nested_vmx_enter_non_root_mode(struct kvm_vcpu *vcpu,
+						     bool from_vmentry);
 bool nested_vmx_exit_reflected(struct kvm_vcpu *vcpu, u32 exit_reason);
 void nested_vmx_vmexit(struct kvm_vcpu *vcpu, u32 exit_reason,
 		       u32 exit_intr_info, unsigned long exit_qualification);

arch/x86/kvm/vmx/vmx.c+0−12

 	return 1;
 }
-static int handle_unexpected_vmexit(struct kvm_vcpu *vcpu)
-{
-	kvm_skip_emulated_instruction(vcpu);
-	WARN_ONCE(1, "Unexpected VM-Exit Reason = 0x%x",
-		vmcs_read32(VM_EXIT_REASON));
-	return 1;
-}
 /*
  * The exit handlers return 1 if the exit was handled fully and guest execution
  * may resume.  Otherwise they set the kvm_run parameter to indicate what needs
 	[EXIT_REASON_INVVPID]                 = handle_vmx_instruction,
 	[EXIT_REASON_RDRAND]                  = handle_invalid_op,
 	[EXIT_REASON_RDSEED]                  = handle_invalid_op,
-	[EXIT_REASON_XSAVES]                  = handle_unexpected_vmexit,
-	[EXIT_REASON_XRSTORS]                 = handle_unexpected_vmexit,
 	[EXIT_REASON_PML_FULL]		      = handle_pml_full,
 	[EXIT_REASON_INVPCID]                 = handle_invpcid,
 	[EXIT_REASON_VMFUNC]		      = handle_vmx_instruction,
 	[EXIT_REASON_PREEMPTION_TIMER]	      = handle_preemption_timer,
 	[EXIT_REASON_ENCLS]		      = handle_encls,
-	[EXIT_REASON_UMWAIT]                  = handle_unexpected_vmexit,
-	[EXIT_REASON_TPAUSE]                  = handle_unexpected_vmexit,
 };
 static const int kvm_vmx_max_exit_handlers =

arch/x86/kvm/x86.c+10−9

 asmlinkage __visible void kvm_spurious_fault(void)
 {
 	/* Fault while not rebooting.  We want the trace. */
-	if (!kvm_rebooting)
+	BUG_ON(!kvm_rebooting);
-		BUG();
 }
 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 static void kvmclock_reset(struct kvm_vcpu *vcpu)
 {
 	vcpu->arch.pv_time_enabled = false;
+	vcpu->arch.time = 0;
 }
 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa)
 	case MSR_KVM_SYSTEM_TIME: {
 		struct kvm_arch *ka = &vcpu->kvm->arch;
-		kvmclock_reset(vcpu);
 		if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
 			bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
 		kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
 		/* we verify if the enable bit is set... */
+		vcpu->arch.pv_time_enabled = false;
 		if (!(data & 1))
 			break;
-		if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
+		if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
 		     &vcpu->arch.pv_time, data & ~1ULL,
 		     sizeof(struct pvclock_vcpu_time_info)))
-			vcpu->arch.pv_time_enabled = false;
-		else
 			vcpu->arch.pv_time_enabled = true;
 		break;
 	bool req_immediate_exit = false;
 	if (kvm_request_pending(vcpu)) {
-		if (kvm_check_request(KVM_REQ_GET_VMCS12_PAGES, vcpu))
+		if (kvm_check_request(KVM_REQ_GET_VMCS12_PAGES, vcpu)) {
-			kvm_x86_ops->get_vmcs12_pages(vcpu);
+			if (unlikely(!kvm_x86_ops->get_vmcs12_pages(vcpu))) {
+				r = 0;
+				goto out;
+			}
+		}
 		if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
 			kvm_mmu_unload(vcpu);
 		if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))

arch/x86/xen/enlighten_pv.c+8−0

@@ -117,6 +117,14 @@ static void __init xen_banner(void) · 116 unmodified lines
117	printk(KERN_INFO "Xen version: %d.%d%s%s\n",	117	printk(KERN_INFO "Xen version: %d.%d%s%s\n",
118	version >> 16, version & 0xffff, extra.extraversion,	118	version >> 16, version & 0xffff, extra.extraversion,
119	xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");	119	xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
		120
		121	#ifdef CONFIG_X86_32
		122	pr_warn("WARNING! WARNING! WARNING! WARNING! WARNING! WARNING! WARNING!\n"
		123	"Support for running as 32-bit PV-guest under Xen will soon be removed\n"
		124	"from the Linux kernel!\n"
		125	"Please use either a 64-bit kernel or switch to HVM or PVH mode!\n"
		126	"WARNING! WARNING! WARNING! WARNING! WARNING! WARNING! WARNING!\n");
		127	#endif
120	}	128	}
121		129
122	static void __init xen_pv_init_platform(void)	130	static void __init xen_pv_init_platform(void)

arch/xtensa/boot/dts/virt.dts+1−1

@@ -56,7 +56,7 @@ · 55 unmodified lines
56	reg = <0xf0100000 0x03f00000>;	56	reg = <0xf0100000 0x03f00000>;
57		57
58	// BUS_ADDRESS(3) CPU_PHYSICAL(1) SIZE(2)	58	// BUS_ADDRESS(3) CPU_PHYSICAL(1) SIZE(2)
59	ranges = <0x01000000 0x0 0xf0000000 0xf0000000 0x0 0x00010000>,	59	ranges = <0x01000000 0x0 0x00000000 0xf0000000 0x0 0x00010000>,
60	<0x02000000 0x0 0xf4000000 0xf4000000 0x0 0x08000000>;	60	<0x02000000 0x0 0xf4000000 0xf4000000 0x0 0x08000000>;
61		61
62	// PCI_DEVICE(3) INT#(1) CONTROLLER(PHANDLE) CONTROLLER_DATA(2)	62	// PCI_DEVICE(3) INT#(1) CONTROLLER(PHANDLE) CONTROLLER_DATA(2)

arch/xtensa/include/asm/bitops.h+1−1

@@ -148,7 +148,7 @@ static inline void change_bit(unsigned int bit, volatile unsigned long *p) · 147 unmodified lines
148	" getex %0\n"	148	" getex %0\n"
149	" beqz %0, 1b\n"	149	" beqz %0, 1b\n"
150	: "=&a" (tmp)	150	: "=&a" (tmp)
151	: "a" (~mask), "a" (p)	151	: "a" (mask), "a" (p)
152	: "memory");	152	: "memory");
153	}	153	}
154		154

arch/xtensa/include/asm/uaccess.h+53−41

@@ -100,7 +100,7 @@ do { \ · 99 unmodified lines
100	case 4: __put_user_asm(x, ptr, retval, 4, "s32i", __cb); break; \	100	case 4: __put_user_asm(x, ptr, retval, 4, "s32i", __cb); break; \
101	case 8: { \	101	case 8: { \
102	__typeof__(*ptr) __v64 = x; \	102	__typeof__(*ptr) __v64 = x; \
103	retval = __copy_to_user(ptr, &__v64, 8); \	103	retval = __copy_to_user(ptr, &__v64, 8) ? -EFAULT : 0; \
104	break; \	104	break; \
105	} \	105	} \
106	default: __put_user_bad(); \	106	default: __put_user_bad(); \
@@ -132,14 +132,14 @@ do { \ · 25 unmodified lines
132	#define __check_align_1 ""	132	#define __check_align_1 ""
133		133
134	#define __check_align_2 \	134	#define __check_align_2 \
135	" _bbci.l %3, 0, 1f \n" \	135	" _bbci.l %[addr], 0, 1f \n" \
136	" movi %0, %4 \n" \	136	" movi %[err], %[efault] \n" \
137	" _j 2f \n"	137	" _j 2f \n"
138		138
139	#define __check_align_4 \	139	#define __check_align_4 \
140	" _bbsi.l %3, 0, 0f \n" \	140	" _bbsi.l %[addr], 0, 0f \n" \
141	" _bbci.l %3, 1, 1f \n" \	141	" _bbci.l %[addr], 1, 1f \n" \
142	"0: movi %0, %4 \n" \	142	"0: movi %[err], %[efault] \n" \
143	" _j 2f \n"	143	" _j 2f \n"
144		144
145		145
@@ -151,40 +151,40 @@ do { \ · 5 unmodified lines
151	* WARNING: If you modify this macro at all, verify that the	151	* WARNING: If you modify this macro at all, verify that the
152	* __check_align_* macros still work.	152	* __check_align_* macros still work.
153	*/	153	*/
154	#define __put_user_asm(x, addr, err, align, insn, cb) \	154	#define __put_user_asm(x_, addr_, err_, align, insn, cb)\
155	__asm__ __volatile__( \	155	__asm__ __volatile__( \
156	__check_align_##align \	156	__check_align_##align \
157	"1: "insn" %2, %3, 0 \n" \	157	"1: "insn" %[x], %[addr], 0 \n" \
158	"2: \n" \	158	"2: \n" \
159	" .section .fixup,\"ax\" \n" \	159	" .section .fixup,\"ax\" \n" \
160	" .align 4 \n" \	160	" .align 4 \n" \
161	" .literal_position \n" \	161	" .literal_position \n" \
162	"5: \n" \	162	"5: \n" \
163	" movi %1, 2b \n" \	163	" movi %[tmp], 2b \n" \
164	" movi %0, %4 \n" \	164	" movi %[err], %[efault] \n" \
165	" jx %1 \n" \	165	" jx %[tmp] \n" \
166	" .previous \n" \	166	" .previous \n" \
167	" .section __ex_table,\"a\" \n" \	167	" .section __ex_table,\"a\" \n" \
168	" .long 1b, 5b \n" \	168	" .long 1b, 5b \n" \
169	" .previous" \	169	" .previous" \
170	:"=r" (err), "=r" (cb) \	170	:[err] "+r"(err_), [tmp] "=r"(cb) \
171	:"r" ((int)(x)), "r" (addr), "i" (-EFAULT), "0" (err))	171	:[x] "r"(x_), [addr] "r"(addr_), [efault] "i"(-EFAULT))
172		172
173	#define __get_user_nocheck(x, ptr, size) \	173	#define __get_user_nocheck(x, ptr, size) \
174	({ \	174	({ \
175	long __gu_err, __gu_val; \	175	long __gu_err; \
176	__get_user_size(__gu_val, (ptr), (size), __gu_err); \	176	__get_user_size((x), (ptr), (size), __gu_err); \
177	(x) = (__force __typeof__(*(ptr)))__gu_val; \
178	__gu_err; \	177	__gu_err; \
179	})	178	})
180		179
181	#define __get_user_check(x, ptr, size) \	180	#define __get_user_check(x, ptr, size) \
182	({ \	181	({ \
183	long __gu_err = -EFAULT, __gu_val = 0; \	182	long __gu_err = -EFAULT; \
184	const __typeof__((ptr)) __gu_addr = (ptr); \	183	const __typeof__((ptr)) __gu_addr = (ptr); \
185	if (access_ok(__gu_addr, size)) \	184	if (access_ok(__gu_addr, size)) \
186	__get_user_size(__gu_val, __gu_addr, (size), __gu_err); \	185	__get_user_size((x), __gu_addr, (size), __gu_err); \
187	(x) = (__force __typeof__(*(ptr)))__gu_val; \	186	else \
		187	(x) = 0; \
188	__gu_err; \	188	__gu_err; \
189	})	189	})
190		190
@@ -198,8 +198,17 @@ do { \ · 7 unmodified lines
198	case 1: __get_user_asm(x, ptr, retval, 1, "l8ui", __cb); break;\	198	case 1: __get_user_asm(x, ptr, retval, 1, "l8ui", __cb); break;\
199	case 2: __get_user_asm(x, ptr, retval, 2, "l16ui", __cb); break;\	199	case 2: __get_user_asm(x, ptr, retval, 2, "l16ui", __cb); break;\
200	case 4: __get_user_asm(x, ptr, retval, 4, "l32i", __cb); break;\	200	case 4: __get_user_asm(x, ptr, retval, 4, "l32i", __cb); break;\
201	case 8: retval = __copy_from_user(&x, ptr, 8); break; \	201	case 8: { \
202	default: (x) = __get_user_bad(); \	202	u64 __x; \
		203	if (unlikely(__copy_from_user(&__x, ptr, 8))) { \
		204	retval = -EFAULT; \
		205	(x) = 0; \
		206	} else { \
		207	(x) = *(__force __typeof__((ptr)))&__x; \
		208	} \
		209	break; \
		210	} \
		211	default: (x) = 0; __get_user_bad(); \
203	} \	212	} \
204	} while (0)	213	} while (0)
205		214
@@ -208,25 +217,28 @@ do { \ · 2 unmodified lines
208	* WARNING: If you modify this macro at all, verify that the	217	* WARNING: If you modify this macro at all, verify that the
209	* __check_align_* macros still work.	218	* __check_align_* macros still work.
210	*/	219	*/
211	#define __get_user_asm(x, addr, err, align, insn, cb) \	220	#define __get_user_asm(x_, addr_, err_, align, insn, cb) \
212	__asm__ __volatile__( \	221	do { \
213	__check_align_##align \	222	u32 __x = 0; \
214	"1: "insn" %2, %3, 0 \n" \	223	__asm__ __volatile__( \
215	"2: \n" \	224	__check_align_##align \
216	" .section .fixup,\"ax\" \n" \	225	"1: "insn" %[x], %[addr], 0 \n" \
217	" .align 4 \n" \	226	"2: \n" \
218	" .literal_position \n" \	227	" .section .fixup,\"ax\" \n" \
219	"5: \n" \	228	" .align 4 \n" \
220	" movi %1, 2b \n" \	229	" .literal_position \n" \
221	" movi %2, 0 \n" \	230	"5: \n" \
222	" movi %0, %4 \n" \	231	" movi %[tmp], 2b \n" \
223	" jx %1 \n" \	232	" movi %[err], %[efault] \n" \
224	" .previous \n" \	233	" jx %[tmp] \n" \
225	" .section __ex_table,\"a\" \n" \	234	" .previous \n" \
226	" .long 1b, 5b \n" \	235	" .section __ex_table,\"a\" \n" \
227	" .previous" \	236	" .long 1b, 5b \n" \
228	:"=r" (err), "=r" (cb), "=r" (x) \	237	" .previous" \
229	:"r" (addr), "i" (-EFAULT), "0" (err))	238	:[err] "+r"(err_), [tmp] "=r"(cb), [x] "+r"(__x) \
		239	:[addr] "r"(addr_), [efault] "i"(-EFAULT)); \
		240	(x_) = (__force __typeof__(*(addr_)))__x; \
		241	} while (0)
230		242
231		243
232	/*	244	/*

arch/xtensa/kernel/xtensa_ksyms.c+0−7

@@ -119,13 +119,6 @@ EXPORT_SYMBOL(__invalidate_icache_range); · 118 unmodified lines
119	// FIXME EXPORT_SYMBOL(screen_info);	119	// FIXME EXPORT_SYMBOL(screen_info);
120	#endif	120	#endif
121		121
122	EXPORT_SYMBOL(outsb);
123	EXPORT_SYMBOL(outsw);
124	EXPORT_SYMBOL(outsl);
125	EXPORT_SYMBOL(insb);
126	EXPORT_SYMBOL(insw);
127	EXPORT_SYMBOL(insl);
128
129	extern long common_exception_return;	122	extern long common_exception_return;
130	EXPORT_SYMBOL(common_exception_return);	123	EXPORT_SYMBOL(common_exception_return);
131		124

block/blk-cgroup.c+51−18

@@ -1362,7 +1362,7 @@ int blkcg_activate_policy(struct request_queue *q, · 1361 unmodified lines
1362	const struct blkcg_policy *pol)	1362	const struct blkcg_policy *pol)
1363	{	1363	{
1364	struct blkg_policy_data *pd_prealloc = NULL;	1364	struct blkg_policy_data *pd_prealloc = NULL;
1365	struct blkcg_gq *blkg;	1365	struct blkcg_gq blkg, pinned_blkg = NULL;
1366	int ret;	1366	int ret;
1367		1367
1368	if (blkcg_policy_enabled(q, pol))	1368	if (blkcg_policy_enabled(q, pol))
@@ -1370,49 +1370,82 @@ int blkcg_activate_policy(struct request_queue *q, · 1 unmodified line
1370		1370
1371	if (queue_is_mq(q))	1371	if (queue_is_mq(q))
1372	blk_mq_freeze_queue(q);	1372	blk_mq_freeze_queue(q);
1373	pd_prealloc:	1373	retry:
1374	if (!pd_prealloc) {
1375	pd_prealloc = pol->pd_alloc_fn(GFP_KERNEL, q, &blkcg_root);
1376	if (!pd_prealloc) {
1377	ret = -ENOMEM;
1378	goto out_bypass_end;
1379	}
1380	}
1381
1382	spin_lock_irq(&q->queue_lock);	1374	spin_lock_irq(&q->queue_lock);
1383		1375
1384	/* blkg_list is pushed at the head, reverse walk to init parents first */	1376	/* blkg_list is pushed at the head, reverse walk to allocate parents first */
1385	list_for_each_entry_reverse(blkg, &q->blkg_list, q_node) {	1377	list_for_each_entry_reverse(blkg, &q->blkg_list, q_node) {
1386	struct blkg_policy_data *pd;	1378	struct blkg_policy_data *pd;
1387		1379
1388	if (blkg->pd[pol->plid])	1380	if (blkg->pd[pol->plid])
1389	continue;	1381	continue;
1390		1382
1391	pd = pol->pd_alloc_fn(GFP_NOWAIT \| __GFP_NOWARN, q, &blkcg_root);	1383	/* If prealloc matches, use it; otherwise try GFP_NOWAIT */
1392	if (!pd)	1384	if (blkg == pinned_blkg) {
1393	swap(pd, pd_prealloc);	1385	pd = pd_prealloc;
		1386	pd_prealloc = NULL;
		1387	} else {
		1388	pd = pol->pd_alloc_fn(GFP_NOWAIT \| __GFP_NOWARN, q,
		1389	blkg->blkcg);
		1390	}
		1391
1394	if (!pd) {	1392	if (!pd) {
		1393	/*
		1394	* GFP_NOWAIT failed. Free the existing one and
		1395	* prealloc for @blkg w/ GFP_KERNEL.
		1396	*/
		1397	if (pinned_blkg)
		1398	blkg_put(pinned_blkg);
		1399	blkg_get(blkg);
		1400	pinned_blkg = blkg;
		1401
1395	spin_unlock_irq(&q->queue_lock);	1402	spin_unlock_irq(&q->queue_lock);
1396	goto pd_prealloc;	1403
		1404	if (pd_prealloc)
		1405	pol->pd_free_fn(pd_prealloc);
		1406	pd_prealloc = pol->pd_alloc_fn(GFP_KERNEL, q,
		1407	blkg->blkcg);
		1408	if (pd_prealloc)
		1409	goto retry;
		1410	else
		1411	goto enomem;
1397	}	1412	}
1398		1413
1399	blkg->pd[pol->plid] = pd;	1414	blkg->pd[pol->plid] = pd;
1400	pd->blkg = blkg;	1415	pd->blkg = blkg;
1401	pd->plid = pol->plid;	1416	pd->plid = pol->plid;
1402	if (pol->pd_init_fn)
1403	pol->pd_init_fn(pd);
1404	}	1417	}
1405		1418
		1419	/* all allocated, init in the same order */
		1420	if (pol->pd_init_fn)
		1421	list_for_each_entry_reverse(blkg, &q->blkg_list, q_node)
		1422	pol->pd_init_fn(blkg->pd[pol->plid]);
		1423
1406	__set_bit(pol->plid, q->blkcg_pols);	1424	__set_bit(pol->plid, q->blkcg_pols);
1407	ret = 0;	1425	ret = 0;
1408		1426
1409	spin_unlock_irq(&q->queue_lock);	1427	spin_unlock_irq(&q->queue_lock);
1410	out_bypass_end:	1428	out:
1411	if (queue_is_mq(q))	1429	if (queue_is_mq(q))
1412	blk_mq_unfreeze_queue(q);	1430	blk_mq_unfreeze_queue(q);
		1431	if (pinned_blkg)
		1432	blkg_put(pinned_blkg);
1413	if (pd_prealloc)	1433	if (pd_prealloc)
1414	pol->pd_free_fn(pd_prealloc);	1434	pol->pd_free_fn(pd_prealloc);
1415	return ret;	1435	return ret;
		1436
		1437	enomem:
		1438	/* alloc failed, nothing's initialized yet, free everything */
		1439	spin_lock_irq(&q->queue_lock);
		1440	list_for_each_entry(blkg, &q->blkg_list, q_node) {
		1441	if (blkg->pd[pol->plid]) {
		1442	pol->pd_free_fn(blkg->pd[pol->plid]);
		1443	blkg->pd[pol->plid] = NULL;
		1444	}
		1445	}
		1446	spin_unlock_irq(&q->queue_lock);
		1447	ret = -ENOMEM;
		1448	goto out;
1416	}	1449	}
1417	EXPORT_SYMBOL_GPL(blkcg_activate_policy);	1450	EXPORT_SYMBOL_GPL(blkcg_activate_policy);
1418		1451

block/blk-rq-qos.h+5−8

@@ -108,16 +108,13 @@ static inline void rq_qos_add(struct request_queue q, struct rq_qos rqos) · 107 unmodified lines
108		108
109	static inline void rq_qos_del(struct request_queue q, struct rq_qos rqos)	109	static inline void rq_qos_del(struct request_queue q, struct rq_qos rqos)
110	{	110	{
111	struct rq_qos cur, prev = NULL;	111	struct rq_qos **cur;
112	for (cur = q->rq_qos; cur; cur = cur->next) {	112
113	if (cur == rqos) {	113	for (cur = &q->rq_qos; cur; cur = &(cur)->next) {
114	if (prev)	114	if (*cur == rqos) {
115	prev->next = rqos->next;	115	*cur = rqos->next;
116	else
117	q->rq_qos = cur;
118	break;	116	break;
119	}	117	}
120	prev = cur;
121	}	118	}
122		119
123	blk_mq_debugfs_unregister_rqos(rqos);	120	blk_mq_debugfs_unregister_rqos(rqos);

block/elevator.c+2−1

@@ -616,7 +616,8 @@ out: · 615 unmodified lines
616		616
617	static inline bool elv_support_iosched(struct request_queue *q)	617	static inline bool elv_support_iosched(struct request_queue *q)
618	{	618	{
619	if (q->tag_set && (q->tag_set->flags & BLK_MQ_F_NO_SCHED))	619	if (!q->mq_ops \|\|
		620	(q->tag_set && (q->tag_set->flags & BLK_MQ_F_NO_SCHED)))
620	return false;	621	return false;
621	return true;	622	return true;
622	}	623	}

drivers/acpi/cppc_acpi.c+1−1

 			pcc_data[pcc_ss_id]->refcount--;
 			if (!pcc_data[pcc_ss_id]->refcount) {
 				pcc_mbox_free_channel(pcc_data[pcc_ss_id]->pcc_channel);
-				pcc_data[pcc_ss_id]->pcc_channel_acquired = 0;
 				kfree(pcc_data[pcc_ss_id]);
+				pcc_data[pcc_ss_id] = NULL;
 			}
 		}
 	}

drivers/acpi/hmat/hmat.c+1−1

@@ -403,7 +403,7 @@ static int __init hmat_parse_proximity_domain(union acpi_subtable_headers *heade · 402 unmodified lines
403	pr_info("HMAT: Memory Flags:%04x Processor Domain:%d Memory Domain:%d\n",	403	pr_info("HMAT: Memory Flags:%04x Processor Domain:%d Memory Domain:%d\n",
404	p->flags, p->processor_PD, p->memory_PD);	404	p->flags, p->processor_PD, p->memory_PD);
405		405
406	if (p->flags & ACPI_HMAT_MEMORY_PD_VALID) {	406	if (p->flags & ACPI_HMAT_MEMORY_PD_VALID && hmat_revision == 1) {
407	target = find_mem_target(p->memory_PD);	407	target = find_mem_target(p->memory_PD);
408	if (!target) {	408	if (!target) {
409	pr_debug("HMAT: Memory Domain missing from SRAT\n");	409	pr_debug("HMAT: Memory Domain missing from SRAT\n");

drivers/acpi/nfit/core.c+1−1

@@ -1322,7 +1322,7 @@ static ssize_t scrub_show(struct device *dev, · 1321 unmodified lines
1322	nfit_device_lock(dev);	1322	nfit_device_lock(dev);
1323	nd_desc = dev_get_drvdata(dev);	1323	nd_desc = dev_get_drvdata(dev);
1324	if (!nd_desc) {	1324	if (!nd_desc) {
1325	device_unlock(dev);	1325	nfit_device_unlock(dev);
1326	return rc;	1326	return rc;
1327	}	1327	}
1328	acpi_desc = to_acpi_desc(nd_desc);	1328	acpi_desc = to_acpi_desc(nd_desc);

drivers/acpi/processor_driver.c+4−5

 				   unsigned long event, void *data)
 {
 	struct cpufreq_policy *policy = data;
-	int cpu = policy->cpu;
 	if (event == CPUFREQ_CREATE_POLICY) {
-		acpi_thermal_cpufreq_init(cpu);
+		acpi_thermal_cpufreq_init(policy);
-		acpi_processor_ppc_init(cpu);
+		acpi_processor_ppc_init(policy);
 	} else if (event == CPUFREQ_REMOVE_POLICY) {
-		acpi_processor_ppc_exit(cpu);
+		acpi_processor_ppc_exit(policy);
-		acpi_thermal_cpufreq_exit(cpu);
+		acpi_thermal_cpufreq_exit(policy);
 	}
 	return 0;

drivers/acpi/processor_perflib.c+14−12

@@ -81,10 +81,10 @@ static int acpi_processor_get_platform_limit(struct acpi_processor *pr) · 80 unmodified lines
81	pr->performance_platform_limit = (int)ppc;	81	pr->performance_platform_limit = (int)ppc;
82		82
83	if (ppc >= pr->performance->state_count \|\|	83	if (ppc >= pr->performance->state_count \|\|
84	unlikely(!dev_pm_qos_request_active(&pr->perflib_req)))	84	unlikely(!freq_qos_request_active(&pr->perflib_req)))
85	return 0;	85	return 0;
86		86
87	ret = dev_pm_qos_update_request(&pr->perflib_req,	87	ret = freq_qos_update_request(&pr->perflib_req,
88	pr->performance->states[ppc].core_frequency * 1000);	88	pr->performance->states[ppc].core_frequency * 1000);
89	if (ret < 0) {	89	if (ret < 0) {
90	pr_warn("Failed to update perflib freq constraint: CPU%d (%d)\n",	90	pr_warn("Failed to update perflib freq constraint: CPU%d (%d)\n",
@@ -157,26 +157,28 @@ void acpi_processor_ignore_ppc_init(void) · 66 unmodified lines
157	ignore_ppc = 0;	157	ignore_ppc = 0;
158	}	158	}
159		159
160	void acpi_processor_ppc_init(int cpu)	160	void acpi_processor_ppc_init(struct cpufreq_policy *policy)
161	{	161	{
		162	int cpu = policy->cpu;
162	struct acpi_processor *pr = per_cpu(processors, cpu);	163	struct acpi_processor *pr = per_cpu(processors, cpu);
163	int ret;	164	int ret;
164		165
165	ret = dev_pm_qos_add_request(get_cpu_device(cpu),	166	if (!pr)
166	&pr->perflib_req, DEV_PM_QOS_MAX_FREQUENCY,	167	return;
167	INT_MAX);	168
168	if (ret < 0) {	169	ret = freq_qos_add_request(&policy->constraints, &pr->perflib_req,
		170	FREQ_QOS_MAX, INT_MAX);
		171	if (ret < 0)
169	pr_err("Failed to add freq constraint for CPU%d (%d)\n", cpu,	172	pr_err("Failed to add freq constraint for CPU%d (%d)\n", cpu,
170	ret);	173	ret);
171	return;
172	}
173	}	174	}
174		175
175	void acpi_processor_ppc_exit(int cpu)	176	void acpi_processor_ppc_exit(struct cpufreq_policy *policy)
176	{	177	{
177	struct acpi_processor *pr = per_cpu(processors, cpu);	178	struct acpi_processor *pr = per_cpu(processors, policy->cpu);
178		179
179	dev_pm_qos_remove_request(&pr->perflib_req);	180	if (pr)
		181	freq_qos_remove_request(&pr->perflib_req);
180	}	182	}
181		183
182	static int acpi_processor_get_performance_control(struct acpi_processor *pr)	184	static int acpi_processor_get_performance_control(struct acpi_processor *pr)

drivers/acpi/processor_thermal.c+14−12

@@ -105,7 +105,7 @@ static int cpufreq_set_cur_state(unsigned int cpu, int state) · 104 unmodified lines
105		105
106	pr = per_cpu(processors, i);	106	pr = per_cpu(processors, i);
107		107
108	if (unlikely(!dev_pm_qos_request_active(&pr->thermal_req)))	108	if (unlikely(!freq_qos_request_active(&pr->thermal_req)))
109	continue;	109	continue;
110		110
111	policy = cpufreq_cpu_get(i);	111	policy = cpufreq_cpu_get(i);
@@ -116,7 +116,7 @@ static int cpufreq_set_cur_state(unsigned int cpu, int state) · 4 unmodified lines
116		116
117	cpufreq_cpu_put(policy);	117	cpufreq_cpu_put(policy);
118		118
119	ret = dev_pm_qos_update_request(&pr->thermal_req, max_freq);	119	ret = freq_qos_update_request(&pr->thermal_req, max_freq);
120	if (ret < 0) {	120	if (ret < 0) {
121	pr_warn("Failed to update thermal freq constraint: CPU%d (%d)\n",	121	pr_warn("Failed to update thermal freq constraint: CPU%d (%d)\n",
122	pr->id, ret);	122	pr->id, ret);
@@ -125,26 +125,28 @@ static int cpufreq_set_cur_state(unsigned int cpu, int state) · 2 unmodified lines
125	return 0;	125	return 0;
126	}	126	}
127		127
128	void acpi_thermal_cpufreq_init(int cpu)	128	void acpi_thermal_cpufreq_init(struct cpufreq_policy *policy)
129	{	129	{
		130	int cpu = policy->cpu;
130	struct acpi_processor *pr = per_cpu(processors, cpu);	131	struct acpi_processor *pr = per_cpu(processors, cpu);
131	int ret;	132	int ret;
132		133
133	ret = dev_pm_qos_add_request(get_cpu_device(cpu),	134	if (!pr)
134	&pr->thermal_req, DEV_PM_QOS_MAX_FREQUENCY,	135	return;
135	INT_MAX);	136
136	if (ret < 0) {	137	ret = freq_qos_add_request(&policy->constraints, &pr->thermal_req,
		138	FREQ_QOS_MAX, INT_MAX);
		139	if (ret < 0)
137	pr_err("Failed to add freq constraint for CPU%d (%d)\n", cpu,	140	pr_err("Failed to add freq constraint for CPU%d (%d)\n", cpu,
138	ret);	141	ret);
139	return;
140	}
141	}	142	}
142		143
143	void acpi_thermal_cpufreq_exit(int cpu)	144	void acpi_thermal_cpufreq_exit(struct cpufreq_policy *policy)
144	{	145	{
145	struct acpi_processor *pr = per_cpu(processors, cpu);	146	struct acpi_processor *pr = per_cpu(processors, policy->cpu);
146		147
147	dev_pm_qos_remove_request(&pr->thermal_req);	148	if (pr)
		149	freq_qos_remove_request(&pr->thermal_req);
148	}	150	}
149	#else /* ! CONFIG_CPU_FREQ */	151	#else /* ! CONFIG_CPU_FREQ */
150	static int cpufreq_get_max_state(unsigned int cpu)	152	static int cpufreq_get_max_state(unsigned int cpu)

drivers/acpi/sleep.c+0−13

@@ -361,19 +361,6 @@ static const struct dmi_system_id acpisleep_dmi_table[] __initconst = { · 360 unmodified lines
361	DMI_MATCH(DMI_PRODUCT_NAME, "80E3"),	361	DMI_MATCH(DMI_PRODUCT_NAME, "80E3"),
362	},	362	},
363	},	363	},
364	/*
365	* https://bugzilla.kernel.org/show_bug.cgi?id=196907
366	* Some Dell XPS13 9360 cannot do suspend-to-idle using the Low Power
367	* S0 Idle firmware interface.
368	*/
369	{
370	.callback = init_default_s3,
371	.ident = "Dell XPS13 9360",
372	.matches = {
373	DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
374	DMI_MATCH(DMI_PRODUCT_NAME, "XPS 13 9360"),
375	},
376	},
377	/*	364	/*
378	* ThinkPad X1 Tablet(2016) cannot do suspend-to-idle using	365	* ThinkPad X1 Tablet(2016) cannot do suspend-to-idle using
379	* the Low Power S0 Idle firmware interface (see	366	* the Low Power S0 Idle firmware interface (see

drivers/amba/bus.c+11−3

 		 */
 		rstc = of_reset_control_array_get_optional_shared(dev->dev.of_node);
 		if (IS_ERR(rstc)) {
-			if (PTR_ERR(rstc) != -EPROBE_DEFER)
+			ret = PTR_ERR(rstc);
-				dev_err(&dev->dev, "Can't get amba reset!\n");
+			if (ret != -EPROBE_DEFER)
-			return PTR_ERR(rstc);
+				dev_err(&dev->dev, "can't get reset: %d\n",
+					ret);
+			goto err_reset;
 		}
 		reset_control_deassert(rstc);
 		reset_control_put(rstc);
 	release_resource(&dev->res);
  err_out:
 	return ret;
+ err_reset:
+	amba_put_disable_pclk(dev);
+	iounmap(tmp);
+	dev_pm_domain_detach(&dev->dev, true);
+	goto err_release;
 }
 /*

drivers/android/binder.c+0−7

 #define SZ_1K                               0x400
 #endif
-#ifndef SZ_4M
-#define SZ_4M                               0x400000
-#endif
 #define FORBIDDEN_MMAP_FLAGS                (VM_WRITE)
 enum {
 	if (proc->tsk != current->group_leader)
 		return -EINVAL;
-	if ((vma->vm_end - vma->vm_start) > SZ_4M)
-		vma->vm_end = vma->vm_start + SZ_4M;
 	binder_debug(BINDER_DEBUG_OPEN_CLOSE,
 		     "%s: %d %lx-%lx (%ld K) vma %lx pagep %lx\n",
 		     __func__, proc->pid, vma->vm_start, vma->vm_end,

drivers/android/binder_alloc.c+4−2

 #include <asm/cacheflush.h>
 #include <linux/uaccess.h>
 #include <linux/highmem.h>
+#include <linux/sizes.h>
 #include "binder_alloc.h"
 #include "binder_trace.h"
 	alloc->buffer = (void __user *)vma->vm_start;
 	mutex_unlock(&binder_alloc_mmap_lock);
-	alloc->pages = kcalloc((vma->vm_end - vma->vm_start) / PAGE_SIZE,
+	alloc->buffer_size = min_t(unsigned long, vma->vm_end - vma->vm_start,
+				   SZ_4M);
+	alloc->pages = kcalloc(alloc->buffer_size / PAGE_SIZE,
 			       sizeof(alloc->pages[0]),
 			       GFP_KERNEL);
 	if (alloc->pages == NULL) {
 		failure_string = "alloc page array";
 		goto err_alloc_pages_failed;
 	}
-	alloc->buffer_size = vma->vm_end - vma->vm_start;
 	buffer = kzalloc(sizeof(*buffer), GFP_KERNEL);
 	if (!buffer) {

drivers/ata/ahci.c+3−1

@@ -1600,7 +1600,9 @@ static void ahci_intel_pcs_quirk(struct pci_dev pdev, struct ahci_host_priv hp · 1599 unmodified lines
1600	*/	1600	*/
1601	if (!id \|\| id->vendor != PCI_VENDOR_ID_INTEL)	1601	if (!id \|\| id->vendor != PCI_VENDOR_ID_INTEL)
1602	return;	1602	return;
1603	if (((enum board_ids) id->driver_data) < board_ahci_pcs7)	1603
		1604	/* Skip applying the quirk on Denverton and beyond */
		1605	if (((enum board_ids) id->driver_data) >= board_ahci_pcs7)
1604	return;	1606	return;
1605		1607
1606	/*	1608	/*

drivers/ata/libahci_platform.c+14−24

 {
 	int rc, i;
-	if (hpriv->ahci_regulator) {
+	rc = regulator_enable(hpriv->ahci_regulator);
-		rc = regulator_enable(hpriv->ahci_regulator);
+	if (rc)
-		if (rc)
+		return rc;
-			return rc;
-	}
-	if (hpriv->phy_regulator) {
+	rc = regulator_enable(hpriv->phy_regulator);
-		rc = regulator_enable(hpriv->phy_regulator);
+	if (rc)
-		if (rc)
+		goto disable_ahci_pwrs;
-			goto disable_ahci_pwrs;
-	}
 	for (i = 0; i < hpriv->nports; i++) {
 		if (!hpriv->target_pwrs[i])
 		if (hpriv->target_pwrs[i])
 			regulator_disable(hpriv->target_pwrs[i]);
-	if (hpriv->phy_regulator)
+	regulator_disable(hpriv->phy_regulator);
-		regulator_disable(hpriv->phy_regulator);
 disable_ahci_pwrs:
-	if (hpriv->ahci_regulator)
+	regulator_disable(hpriv->ahci_regulator);
-		regulator_disable(hpriv->ahci_regulator);
 	return rc;
 }
 EXPORT_SYMBOL_GPL(ahci_platform_enable_regulators);
 		regulator_disable(hpriv->target_pwrs[i]);
 	}
-	if (hpriv->ahci_regulator)
+	regulator_disable(hpriv->ahci_regulator);
-		regulator_disable(hpriv->ahci_regulator);
+	regulator_disable(hpriv->phy_regulator);
-	if (hpriv->phy_regulator)
-		regulator_disable(hpriv->phy_regulator);
 }
 EXPORT_SYMBOL_GPL(ahci_platform_disable_regulators);
 /**
 	struct regulator *target_pwr;
 	int rc = 0;
-	target_pwr = regulator_get_optional(dev, "target");
+	target_pwr = regulator_get(dev, "target");
 	if (!IS_ERR(target_pwr))
 		hpriv->target_pwrs[port] = target_pwr;
 		hpriv->clks[i] = clk;
 	}
-	hpriv->ahci_regulator = devm_regulator_get_optional(dev, "ahci");
+	hpriv->ahci_regulator = devm_regulator_get(dev, "ahci");
 	if (IS_ERR(hpriv->ahci_regulator)) {
 		rc = PTR_ERR(hpriv->ahci_regulator);
-		if (rc == -EPROBE_DEFER)
+		if (rc != 0)
 			goto err_out;
-		rc = 0;
-		hpriv->ahci_regulator = NULL;
 	}
-	hpriv->phy_regulator = devm_regulator_get_optional(dev, "phy");
+	hpriv->phy_regulator = devm_regulator_get(dev, "phy");
 	if (IS_ERR(hpriv->phy_regulator)) {
 		rc = PTR_ERR(hpriv->phy_regulator);
 		if (rc == -EPROBE_DEFER)

drivers/base/core.c+3−0

  */
 #include <linux/acpi.h>
+#include <linux/cpufreq.h>
 #include <linux/device.h>
 #include <linux/err.h>
 #include <linux/fwnode.h>
 	wait_for_device_probe();
 	device_block_probing();
+	cpufreq_suspend();
 	spin_lock(&devices_kset->list_lock);
 	/*
 	 * Walk the devices list backward, shutting down each in turn.

drivers/base/memory.c+3−0

 	pfn >>= PAGE_SHIFT;
 	if (!pfn_valid(pfn))
 		return -ENXIO;
+	/* Only online pages can be soft-offlined (esp., not ZONE_DEVICE). */
+	if (!pfn_to_online_page(pfn))
+		return -EIO;
 	ret = soft_offline_page(pfn_to_page(pfn), 0);
 	return ret == 0 ? count : ret;
 }

drivers/base/power/qos.c+2−68

@@ -115,20 +115,10 @@ s32 dev_pm_qos_read_value(struct device *dev, enum dev_pm_qos_req_type type) · 114 unmodified lines
115		115
116	spin_lock_irqsave(&dev->power.lock, flags);	116	spin_lock_irqsave(&dev->power.lock, flags);
117		117
118	switch (type) {	118	if (type == DEV_PM_QOS_RESUME_LATENCY) {
119	case DEV_PM_QOS_RESUME_LATENCY:
120	ret = IS_ERR_OR_NULL(qos) ? PM_QOS_RESUME_LATENCY_NO_CONSTRAINT	119	ret = IS_ERR_OR_NULL(qos) ? PM_QOS_RESUME_LATENCY_NO_CONSTRAINT
121	: pm_qos_read_value(&qos->resume_latency);	120	: pm_qos_read_value(&qos->resume_latency);
122	break;	121	} else {
123	case DEV_PM_QOS_MIN_FREQUENCY:
124	ret = IS_ERR_OR_NULL(qos) ? PM_QOS_MIN_FREQUENCY_DEFAULT_VALUE
125	: pm_qos_read_value(&qos->min_frequency);
126	break;
127	case DEV_PM_QOS_MAX_FREQUENCY:
128	ret = IS_ERR_OR_NULL(qos) ? PM_QOS_MAX_FREQUENCY_DEFAULT_VALUE
129	: pm_qos_read_value(&qos->max_frequency);
130	break;
131	default:
132	WARN_ON(1);	122	WARN_ON(1);
133	ret = 0;	123	ret = 0;
134	}	124	}
@@ -169,14 +159,6 @@ static int apply_constraint(struct dev_pm_qos_request *req, · 34 unmodified lines
169	req->dev->power.set_latency_tolerance(req->dev, value);	159	req->dev->power.set_latency_tolerance(req->dev, value);
170	}	160	}
171	break;	161	break;
172	case DEV_PM_QOS_MIN_FREQUENCY:
173	ret = pm_qos_update_target(&qos->min_frequency,
174	&req->data.pnode, action, value);
175	break;
176	case DEV_PM_QOS_MAX_FREQUENCY:
177	ret = pm_qos_update_target(&qos->max_frequency,
178	&req->data.pnode, action, value);
179	break;
180	case DEV_PM_QOS_FLAGS:	162	case DEV_PM_QOS_FLAGS:
181	ret = pm_qos_update_flags(&qos->flags, &req->data.flr,	163	ret = pm_qos_update_flags(&qos->flags, &req->data.flr,
182	action, value);	164	action, value);
@@ -227,24 +209,6 @@ static int dev_pm_qos_constraints_allocate(struct device *dev) · 44 unmodified lines
227	c->no_constraint_value = PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT;	209	c->no_constraint_value = PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT;
228	c->type = PM_QOS_MIN;	210	c->type = PM_QOS_MIN;
229		211
230	c = &qos->min_frequency;
231	plist_head_init(&c->list);
232	c->target_value = PM_QOS_MIN_FREQUENCY_DEFAULT_VALUE;
233	c->default_value = PM_QOS_MIN_FREQUENCY_DEFAULT_VALUE;
234	c->no_constraint_value = PM_QOS_MIN_FREQUENCY_DEFAULT_VALUE;
235	c->type = PM_QOS_MAX;
236	c->notifiers = ++n;
237	BLOCKING_INIT_NOTIFIER_HEAD(n);
238
239	c = &qos->max_frequency;
240	plist_head_init(&c->list);
241	c->target_value = PM_QOS_MAX_FREQUENCY_DEFAULT_VALUE;
242	c->default_value = PM_QOS_MAX_FREQUENCY_DEFAULT_VALUE;
243	c->no_constraint_value = PM_QOS_MAX_FREQUENCY_DEFAULT_VALUE;
244	c->type = PM_QOS_MIN;
245	c->notifiers = ++n;
246	BLOCKING_INIT_NOTIFIER_HEAD(n);
247
248	INIT_LIST_HEAD(&qos->flags.list);	212	INIT_LIST_HEAD(&qos->flags.list);
249		213
250	spin_lock_irq(&dev->power.lock);	214	spin_lock_irq(&dev->power.lock);
@@ -305,18 +269,6 @@ void dev_pm_qos_constraints_destroy(struct device *dev) · 54 unmodified lines
305	memset(req, 0, sizeof(*req));	269	memset(req, 0, sizeof(*req));
306	}	270	}
307		271
308	c = &qos->min_frequency;
309	plist_for_each_entry_safe(req, tmp, &c->list, data.pnode) {
310	apply_constraint(req, PM_QOS_REMOVE_REQ, PM_QOS_MIN_FREQUENCY_DEFAULT_VALUE);
311	memset(req, 0, sizeof(*req));
312	}
313
314	c = &qos->max_frequency;
315	plist_for_each_entry_safe(req, tmp, &c->list, data.pnode) {
316	apply_constraint(req, PM_QOS_REMOVE_REQ, PM_QOS_MAX_FREQUENCY_DEFAULT_VALUE);
317	memset(req, 0, sizeof(*req));
318	}
319
320	f = &qos->flags;	272	f = &qos->flags;
321	list_for_each_entry_safe(req, tmp, &f->list, data.flr.node) {	273	list_for_each_entry_safe(req, tmp, &f->list, data.flr.node) {
322	apply_constraint(req, PM_QOS_REMOVE_REQ, PM_QOS_DEFAULT_VALUE);	274	apply_constraint(req, PM_QOS_REMOVE_REQ, PM_QOS_DEFAULT_VALUE);
@@ -428,8 +380,6 @@ static int __dev_pm_qos_update_request(struct dev_pm_qos_request *req, · 105 unmodified lines
428	switch(req->type) {	380	switch(req->type) {
429	case DEV_PM_QOS_RESUME_LATENCY:	381	case DEV_PM_QOS_RESUME_LATENCY:
430	case DEV_PM_QOS_LATENCY_TOLERANCE:	382	case DEV_PM_QOS_LATENCY_TOLERANCE:
431	case DEV_PM_QOS_MIN_FREQUENCY:
432	case DEV_PM_QOS_MAX_FREQUENCY:
433	curr_value = req->data.pnode.prio;	383	curr_value = req->data.pnode.prio;
434	break;	384	break;
435	case DEV_PM_QOS_FLAGS:	385	case DEV_PM_QOS_FLAGS:
@@ -557,14 +507,6 @@ int dev_pm_qos_add_notifier(struct device dev, struct notifier_block notifier, · 121 unmodified lines
557	ret = blocking_notifier_chain_register(dev->power.qos->resume_latency.notifiers,	507	ret = blocking_notifier_chain_register(dev->power.qos->resume_latency.notifiers,
558	notifier);	508	notifier);
559	break;	509	break;
560	case DEV_PM_QOS_MIN_FREQUENCY:
561	ret = blocking_notifier_chain_register(dev->power.qos->min_frequency.notifiers,
562	notifier);
563	break;
564	case DEV_PM_QOS_MAX_FREQUENCY:
565	ret = blocking_notifier_chain_register(dev->power.qos->max_frequency.notifiers,
566	notifier);
567	break;
568	default:	510	default:
569	WARN_ON(1);	511	WARN_ON(1);
570	ret = -EINVAL;	512	ret = -EINVAL;
@@ -604,14 +546,6 @@ int dev_pm_qos_remove_notifier(struct device *dev, · 33 unmodified lines
604	ret = blocking_notifier_chain_unregister(dev->power.qos->resume_latency.notifiers,	546	ret = blocking_notifier_chain_unregister(dev->power.qos->resume_latency.notifiers,
605	notifier);	547	notifier);
606	break;	548	break;
607	case DEV_PM_QOS_MIN_FREQUENCY:
608	ret = blocking_notifier_chain_unregister(dev->power.qos->min_frequency.notifiers,
609	notifier);
610	break;
611	case DEV_PM_QOS_MAX_FREQUENCY:
612	ret = blocking_notifier_chain_unregister(dev->power.qos->max_frequency.notifiers,
613	notifier);
614	break;
615	default:	549	default:
616	WARN_ON(1);	550	WARN_ON(1);
617	ret = -EINVAL;	551	ret = -EINVAL;

drivers/block/nbd.c+34−7

 	struct nbd_device *nbd = cmd->nbd;
 	struct nbd_config *config;
+	if (!mutex_trylock(&cmd->lock))
+		return BLK_EH_RESET_TIMER;
 	if (!refcount_inc_not_zero(&nbd->config_refs)) {
 		cmd->status = BLK_STS_TIMEOUT;
+		mutex_unlock(&cmd->lock);
 		goto done;
 	}
 	config = nbd->config;
-	if (!mutex_trylock(&cmd->lock)) {
-		nbd_config_put(nbd);
-		return BLK_EH_RESET_TIMER;
-	}
 	if (config->num_connections > 1) {
 		dev_err_ratelimited(nbd_to_dev(nbd),
 				    "Connection timed out, retrying (%d/%d alive)\n",
 		ret = -ENOENT;
 		goto out;
 	}
+	if (cmd->status != BLK_STS_OK) {
+		dev_err(disk_to_dev(nbd->disk), "Command already handled %p\n",
+			req);
+		ret = -ENOENT;
+		goto out;
+	}
 	if (test_bit(NBD_CMD_REQUEUED, &cmd->flags)) {
 		dev_err(disk_to_dev(nbd->disk), "Raced with timeout on req %p\n",
 			req);
 {
 	struct nbd_cmd *cmd = blk_mq_rq_to_pdu(req);
+	mutex_lock(&cmd->lock);
 	cmd->status = BLK_STS_IOERR;
+	mutex_unlock(&cmd->lock);
 	blk_mq_complete_request(req);
 	return true;
 }
 	return ret;
 }
+static struct socket *nbd_get_socket(struct nbd_device *nbd, unsigned long fd,
+				     int *err)
+{
+	struct socket *sock;
+	*err = 0;
+	sock = sockfd_lookup(fd, err);
+	if (!sock)
+		return NULL;
+	if (sock->ops->shutdown == sock_no_shutdown) {
+		dev_err(disk_to_dev(nbd->disk), "Unsupported socket: shutdown callout must be supported.\n");
+		*err = -EINVAL;
+		return NULL;
+	}
+	return sock;
+}
 static int nbd_add_socket(struct nbd_device *nbd, unsigned long arg,
 			  bool netlink)
 {
 	struct nbd_sock *nsock;
 	int err;
-	sock = sockfd_lookup(arg, &err);
+	sock = nbd_get_socket(nbd, arg, &err);
 	if (!sock)
 		return err;
 	int i;
 	int err;
-	sock = sockfd_lookup(arg, &err);
+	sock = nbd_get_socket(nbd, arg, &err);
 	if (!sock)
 		return err;

drivers/block/rbd.c+6−3

 	queue_delayed_work(rbd_dev->task_wq, &rbd_dev->lock_dwork, 0);
 	ret = wait_for_completion_killable_timeout(&rbd_dev->acquire_wait,
 			    ceph_timeout_jiffies(rbd_dev->opts->lock_timeout));
-	if (ret > 0)
+	if (ret > 0) {
 		ret = rbd_dev->acquire_err;
-	else if (!ret)
+	} else {
-		ret = -ETIMEDOUT;
+		cancel_delayed_work_sync(&rbd_dev->lock_dwork);
+		if (!ret)
+			ret = -ETIMEDOUT;
+	}
 	if (ret) {
 		rbd_warn(rbd_dev, "failed to acquire exclusive lock: %ld", ret);

drivers/block/zram/zram_drv.c+3−2

 static ssize_t backing_dev_show(struct device *dev,
 		struct device_attribute *attr, char *buf)
 {
+	struct file *file;
 	struct zram *zram = dev_to_zram(dev);
-	struct file *file = zram->backing_dev;
 	char *p;
 	ssize_t ret;
 	down_read(&zram->init_lock);
-	if (!zram->backing_dev) {
+	file = zram->backing_dev;
+	if (!file) {
 		memcpy(buf, "none\n", 5);
 		up_read(&zram->init_lock);
 		return 5;

drivers/bus/ti-sysc.c+14−4

  * @clk_disable_quirk: module specific clock disable quirk
  * @reset_done_quirk: module specific reset done quirk
  * @module_enable_quirk: module specific enable quirk
+ * @module_disable_quirk: module specific disable quirk
  */
 struct sysc {
 	struct device *dev;
 	void (*clk_disable_quirk)(struct sysc *sysc);
 	void (*reset_done_quirk)(struct sysc *sysc);
 	void (*module_enable_quirk)(struct sysc *sysc);
+	void (*module_disable_quirk)(struct sysc *sysc);
 };
 static void sysc_parse_dts_quirks(struct sysc *ddata, struct device_node *np,
 	if (ddata->offsets[SYSC_SYSCONFIG] == -ENODEV)
 		return 0;
+	if (ddata->module_disable_quirk)
+		ddata->module_disable_quirk(ddata);
 	regbits = ddata->cap->regbits;
 	reg = sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]);
 		   SYSC_MODULE_QUIRK_SGX),
 	SYSC_QUIRK("wdt", 0, 0, 0x10, 0x14, 0x502a0500, 0xfffff0f0,
 		   SYSC_MODULE_QUIRK_WDT),
+	/* Watchdog on am3 and am4 */
+	SYSC_QUIRK("wdt", 0x44e35000, 0, 0x10, 0x14, 0x502a0500, 0xfffff0f0,
+		   SYSC_MODULE_QUIRK_WDT | SYSC_QUIRK_SWSUP_SIDLE),
 #ifdef DEBUG
 	SYSC_QUIRK("adc", 0, 0, 0x10, -1, 0x47300001, 0xffffffff, 0),
 				   !(val & 0x10), 100,
 				   MAX_MODULE_SOFTRESET_WAIT);
 	if (error)
-		dev_warn(ddata->dev, "wdt disable spr failed\n");
+		dev_warn(ddata->dev, "wdt disable step1 failed\n");
-	sysc_write(ddata, wps, 0x5555);
+	sysc_write(ddata, spr, 0x5555);
 	error = readl_poll_timeout(ddata->module_va + wps, val,
 				   !(val & 0x10), 100,
 				   MAX_MODULE_SOFTRESET_WAIT);
 	if (error)
-		dev_warn(ddata->dev, "wdt disable wps failed\n");
+		dev_warn(ddata->dev, "wdt disable step2 failed\n");
 }
 static void sysc_init_module_quirks(struct sysc *ddata)
 	if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_SGX)
 		ddata->module_enable_quirk = sysc_module_enable_quirk_sgx;
-	if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_WDT)
+	if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_WDT) {
 		ddata->reset_done_quirk = sysc_reset_done_quirk_wdt;
+		ddata->module_disable_quirk = sysc_reset_done_quirk_wdt;
+	}
 }
 static int sysc_clockdomain_init(struct sysc *ddata)

drivers/cpufreq/cpufreq.c+29−43

 	if (ret != 1)							\
 		return -EINVAL;						\
 									\
-	ret = dev_pm_qos_update_request(policy->object##_freq_req, val);\
+	ret = freq_qos_update_request(policy->object##_freq_req, val);\
 	return ret >= 0 ? count : ret;					\
 }
 		goto err_free_real_cpus;
 	}
+	freq_constraints_init(&policy->constraints);
 	policy->nb_min.notifier_call = cpufreq_notifier_min;
 	policy->nb_max.notifier_call = cpufreq_notifier_max;
-	ret = dev_pm_qos_add_notifier(dev, &policy->nb_min,
+	ret = freq_qos_add_notifier(&policy->constraints, FREQ_QOS_MIN,
-				      DEV_PM_QOS_MIN_FREQUENCY);
+				    &policy->nb_min);
 	if (ret) {
 		dev_err(dev, "Failed to register MIN QoS notifier: %d (%*pbl)\n",
 			ret, cpumask_pr_args(policy->cpus));
 		goto err_kobj_remove;
 	}
-	ret = dev_pm_qos_add_notifier(dev, &policy->nb_max,
+	ret = freq_qos_add_notifier(&policy->constraints, FREQ_QOS_MAX,
-				      DEV_PM_QOS_MAX_FREQUENCY);
+				    &policy->nb_max);
 	if (ret) {
 		dev_err(dev, "Failed to register MAX QoS notifier: %d (%*pbl)\n",
 			ret, cpumask_pr_args(policy->cpus));
 	return policy;
 err_min_qos_notifier:
-	dev_pm_qos_remove_notifier(dev, &policy->nb_min,
+	freq_qos_remove_notifier(&policy->constraints, FREQ_QOS_MIN,
-				   DEV_PM_QOS_MIN_FREQUENCY);
+				 &policy->nb_min);
 err_kobj_remove:
 	cpufreq_policy_put_kobj(policy);
 err_free_real_cpus:
 static void cpufreq_policy_free(struct cpufreq_policy *policy)
 {
-	struct device *dev = get_cpu_device(policy->cpu);
 	unsigned long flags;
 	int cpu;
 		per_cpu(cpufreq_cpu_data, cpu) = NULL;
 	write_unlock_irqrestore(&cpufreq_driver_lock, flags);
-	dev_pm_qos_remove_notifier(dev, &policy->nb_max,
+	freq_qos_remove_notifier(&policy->constraints, FREQ_QOS_MAX,
-				   DEV_PM_QOS_MAX_FREQUENCY);
+				 &policy->nb_max);
-	dev_pm_qos_remove_notifier(dev, &policy->nb_min,
+	freq_qos_remove_notifier(&policy->constraints, FREQ_QOS_MIN,
-				   DEV_PM_QOS_MIN_FREQUENCY);
+				 &policy->nb_min);
+	/* Cancel any pending policy->update work before freeing the policy. */
+	cancel_work_sync(&policy->update);
 	if (policy->max_freq_req) {
 		/*
 		 */
 		blocking_notifier_call_chain(&cpufreq_policy_notifier_list,
 					     CPUFREQ_REMOVE_POLICY, policy);
-		dev_pm_qos_remove_request(policy->max_freq_req);
+		freq_qos_remove_request(policy->max_freq_req);
 	}
-	dev_pm_qos_remove_request(policy->min_freq_req);
+	freq_qos_remove_request(policy->min_freq_req);
 	kfree(policy->min_freq_req);
 	cpufreq_policy_put_kobj(policy);
 	cpumask_and(policy->cpus, policy->cpus, cpu_online_mask);
 	if (new_policy) {
-		struct device *dev = get_cpu_device(cpu);
 		for_each_cpu(j, policy->related_cpus) {
 			per_cpu(cpufreq_cpu_data, j) = policy;
 			add_cpu_dev_symlink(policy, j);
 		if (!policy->min_freq_req)
 			goto out_destroy_policy;
-		ret = dev_pm_qos_add_request(dev, policy->min_freq_req,
+		ret = freq_qos_add_request(&policy->constraints,
-					     DEV_PM_QOS_MIN_FREQUENCY,
+					   policy->min_freq_req, FREQ_QOS_MIN,
-					     policy->min);
+					   policy->min);
 		if (ret < 0) {
 			/*
-			 * So we don't call dev_pm_qos_remove_request() for an
+			 * So we don't call freq_qos_remove_request() for an
 			 * uninitialized request.
 			 */
 			kfree(policy->min_freq_req);
 			policy->min_freq_req = NULL;
-			dev_err(dev, "Failed to add min-freq constraint (%d)\n",
-				ret);
 			goto out_destroy_policy;
 		}
 		/*
 		 * This must be initialized right here to avoid calling
-		 * dev_pm_qos_remove_request() on uninitialized request in case
+		 * freq_qos_remove_request() on uninitialized request in case
 		 * of errors.
 		 */
 		policy->max_freq_req = policy->min_freq_req + 1;
-		ret = dev_pm_qos_add_request(dev, policy->max_freq_req,
+		ret = freq_qos_add_request(&policy->constraints,
-					     DEV_PM_QOS_MAX_FREQUENCY,
+					   policy->max_freq_req, FREQ_QOS_MAX,
-					     policy->max);
+					   policy->max);
 		if (ret < 0) {
 			policy->max_freq_req = NULL;
-			dev_err(dev, "Failed to add max-freq constraint (%d)\n",
-				ret);
 			goto out_destroy_policy;
 		}
 		       struct cpufreq_policy *new_policy)
 {
 	struct cpufreq_governor *old_gov;
-	struct device *cpu_dev = get_cpu_device(policy->cpu);
 	int ret;
 	pr_debug("setting new policy for CPU %u: %u - %u kHz\n",
 	 * PM QoS framework collects all the requests from users and provide us
 	 * the final aggregated value here.
 	 */
-	new_policy->min = dev_pm_qos_read_value(cpu_dev, DEV_PM_QOS_MIN_FREQUENCY);
+	new_policy->min = freq_qos_read_value(&policy->constraints, FREQ_QOS_MIN);
-	new_policy->max = dev_pm_qos_read_value(cpu_dev, DEV_PM_QOS_MAX_FREQUENCY);
+	new_policy->max = freq_qos_read_value(&policy->constraints, FREQ_QOS_MAX);
 	/* verify the cpu speed can be set within this limit */
 	ret = cpufreq_driver->verify(new_policy);
 			break;
 		}
-		ret = dev_pm_qos_update_request(policy->max_freq_req, policy->max);
+		ret = freq_qos_update_request(policy->max_freq_req, policy->max);
 		if (ret < 0)
 			break;
 	}
 }
 EXPORT_SYMBOL_GPL(cpufreq_unregister_driver);
-/*
- * Stop cpufreq at shutdown to make sure it isn't holding any locks
- * or mutexes when secondary CPUs are halted.
- */
-static struct syscore_ops cpufreq_syscore_ops = {
-	.shutdown = cpufreq_suspend,
-};
 struct kobject *cpufreq_global_kobject;
 EXPORT_SYMBOL(cpufreq_global_kobject);
 	cpufreq_global_kobject = kobject_create_and_add("cpufreq", &cpu_subsys.dev_root->kobj);
 	BUG_ON(!cpufreq_global_kobject);
-	register_syscore_ops(&cpufreq_syscore_ops);
 	return 0;
 }
 module_param(off, int, 0444);

drivers/cpufreq/intel_pstate.c+15−15

@@ -1088,10 +1088,10 @@ static ssize_t store_no_turbo(struct kobject a, struct kobj_attribute b, · 1087 unmodified lines
1088		1088
1089	static struct cpufreq_driver intel_pstate;	1089	static struct cpufreq_driver intel_pstate;
1090		1090
1091	static void update_qos_request(enum dev_pm_qos_req_type type)	1091	static void update_qos_request(enum freq_qos_req_type type)
1092	{	1092	{
1093	int max_state, turbo_max, freq, i, perf_pct;	1093	int max_state, turbo_max, freq, i, perf_pct;
1094	struct dev_pm_qos_request *req;	1094	struct freq_qos_request *req;
1095	struct cpufreq_policy *policy;	1095	struct cpufreq_policy *policy;
1096		1096
1097	for_each_possible_cpu(i) {	1097	for_each_possible_cpu(i) {
@@ -1112,7 +1112,7 @@ static void update_qos_request(enum dev_pm_qos_req_type type) · 14 unmodified lines
1112	else	1112	else
1113	turbo_max = cpu->pstate.turbo_pstate;	1113	turbo_max = cpu->pstate.turbo_pstate;
1114		1114
1115	if (type == DEV_PM_QOS_MIN_FREQUENCY) {	1115	if (type == FREQ_QOS_MIN) {
1116	perf_pct = global.min_perf_pct;	1116	perf_pct = global.min_perf_pct;
1117	} else {	1117	} else {
1118	req++;	1118	req++;
@@ -1122,7 +1122,7 @@ static void update_qos_request(enum dev_pm_qos_req_type type) · 3 unmodified lines
1122	freq = DIV_ROUND_UP(turbo_max * perf_pct, 100);	1122	freq = DIV_ROUND_UP(turbo_max * perf_pct, 100);
1123	freq *= cpu->pstate.scaling;	1123	freq *= cpu->pstate.scaling;
1124		1124
1125	if (dev_pm_qos_update_request(req, freq) < 0)	1125	if (freq_qos_update_request(req, freq) < 0)
1126	pr_warn("Failed to update freq constraint: CPU%d\n", i);	1126	pr_warn("Failed to update freq constraint: CPU%d\n", i);
1127	}	1127	}
1128	}	1128	}
@@ -1153,7 +1153,7 @@ static ssize_t store_max_perf_pct(struct kobject a, struct kobj_attribute b, · 24 unmodified lines
1153	if (intel_pstate_driver == &intel_pstate)	1153	if (intel_pstate_driver == &intel_pstate)
1154	intel_pstate_update_policies();	1154	intel_pstate_update_policies();
1155	else	1155	else
1156	update_qos_request(DEV_PM_QOS_MAX_FREQUENCY);	1156	update_qos_request(FREQ_QOS_MAX);
1157		1157
1158	mutex_unlock(&intel_pstate_driver_lock);	1158	mutex_unlock(&intel_pstate_driver_lock);
1159		1159
@@ -1187,7 +1187,7 @@ static ssize_t store_min_perf_pct(struct kobject a, struct kobj_attribute b, · 27 unmodified lines
1187	if (intel_pstate_driver == &intel_pstate)	1187	if (intel_pstate_driver == &intel_pstate)
1188	intel_pstate_update_policies();	1188	intel_pstate_update_policies();
1189	else	1189	else
1190	update_qos_request(DEV_PM_QOS_MIN_FREQUENCY);	1190	update_qos_request(FREQ_QOS_MIN);
1191		1191
1192	mutex_unlock(&intel_pstate_driver_lock);	1192	mutex_unlock(&intel_pstate_driver_lock);
1193		1193
@@ -2381,7 +2381,7 @@ static unsigned int intel_cpufreq_fast_switch(struct cpufreq_policy *policy, · 1187 unmodified lines
2381	static int intel_cpufreq_cpu_init(struct cpufreq_policy *policy)	2381	static int intel_cpufreq_cpu_init(struct cpufreq_policy *policy)
2382	{	2382	{
2383	int max_state, turbo_max, min_freq, max_freq, ret;	2383	int max_state, turbo_max, min_freq, max_freq, ret;
2384	struct dev_pm_qos_request *req;	2384	struct freq_qos_request *req;
2385	struct cpudata *cpu;	2385	struct cpudata *cpu;
2386	struct device *dev;	2386	struct device *dev;
2387		2387
@@ -2416,15 +2416,15 @@ static int intel_cpufreq_cpu_init(struct cpufreq_policy *policy) · 28 unmodified lines
2416	max_freq = DIV_ROUND_UP(turbo_max * global.max_perf_pct, 100);	2416	max_freq = DIV_ROUND_UP(turbo_max * global.max_perf_pct, 100);
2417	max_freq *= cpu->pstate.scaling;	2417	max_freq *= cpu->pstate.scaling;
2418		2418
2419	ret = dev_pm_qos_add_request(dev, req, DEV_PM_QOS_MIN_FREQUENCY,	2419	ret = freq_qos_add_request(&policy->constraints, req, FREQ_QOS_MIN,
2420	min_freq);	2420	min_freq);
2421	if (ret < 0) {	2421	if (ret < 0) {
2422	dev_err(dev, "Failed to add min-freq constraint (%d)\n", ret);	2422	dev_err(dev, "Failed to add min-freq constraint (%d)\n", ret);
2423	goto free_req;	2423	goto free_req;
2424	}	2424	}
2425		2425
2426	ret = dev_pm_qos_add_request(dev, req + 1, DEV_PM_QOS_MAX_FREQUENCY,	2426	ret = freq_qos_add_request(&policy->constraints, req + 1, FREQ_QOS_MAX,
2427	max_freq);	2427	max_freq);
2428	if (ret < 0) {	2428	if (ret < 0) {
2429	dev_err(dev, "Failed to add max-freq constraint (%d)\n", ret);	2429	dev_err(dev, "Failed to add max-freq constraint (%d)\n", ret);
2430	goto remove_min_req;	2430	goto remove_min_req;
@@ -2435,7 +2435,7 @@ static int intel_cpufreq_cpu_init(struct cpufreq_policy *policy) · 4 unmodified lines
2435	return 0;	2435	return 0;
2436		2436
2437	remove_min_req:	2437	remove_min_req:
2438	dev_pm_qos_remove_request(req);	2438	freq_qos_remove_request(req);
2439	free_req:	2439	free_req:
2440	kfree(req);	2440	kfree(req);
2441	pstate_exit:	2441	pstate_exit:
@@ -2446,12 +2446,12 @@ pstate_exit: · 4 unmodified lines
2446		2446
2447	static int intel_cpufreq_cpu_exit(struct cpufreq_policy *policy)	2447	static int intel_cpufreq_cpu_exit(struct cpufreq_policy *policy)
2448	{	2448	{
2449	struct dev_pm_qos_request *req;	2449	struct freq_qos_request *req;
2450		2450
2451	req = policy->driver_data;	2451	req = policy->driver_data;
2452		2452
2453	dev_pm_qos_remove_request(req + 1);	2453	freq_qos_remove_request(req + 1);
2454	dev_pm_qos_remove_request(req);	2454	freq_qos_remove_request(req);
2455	kfree(req);	2455	kfree(req);
2456		2456
2457	return intel_pstate_cpu_exit(policy);	2457	return intel_pstate_cpu_exit(policy);

drivers/cpufreq/ppc_cbe_cpufreq_pmi.c+7−8

 static void cbe_cpufreq_handle_pmi(pmi_message_t pmi_msg)
 {
 	struct cpufreq_policy *policy;
-	struct dev_pm_qos_request *req;
+	struct freq_qos_request *req;
 	u8 node, slow_mode;
 	int cpu, ret;
 	req = policy->driver_data;
-	ret = dev_pm_qos_update_request(req,
+	ret = freq_qos_update_request(req,
 			policy->freq_table[slow_mode].frequency);
 	if (ret < 0)
 		pr_warn("Failed to update freq constraint: %d\n", ret);
 void cbe_cpufreq_pmi_policy_init(struct cpufreq_policy *policy)
 {
-	struct dev_pm_qos_request *req;
+	struct freq_qos_request *req;
 	int ret;
 	if (!cbe_cpufreq_has_pmi)
 	if (!req)
 		return;
-	ret = dev_pm_qos_add_request(get_cpu_device(policy->cpu), req,
+	ret = freq_qos_add_request(&policy->constraints, req, FREQ_QOS_MAX,
-				     DEV_PM_QOS_MAX_FREQUENCY,
+				   policy->freq_table[0].frequency);
-				     policy->freq_table[0].frequency);
 	if (ret < 0) {
 		pr_err("Failed to add freq constraint (%d)\n", ret);
 		kfree(req);
 void cbe_cpufreq_pmi_policy_exit(struct cpufreq_policy *policy)
 {
-	struct dev_pm_qos_request *req = policy->driver_data;
+	struct freq_qos_request *req = policy->driver_data;
 	if (cbe_cpufreq_has_pmi) {
-		dev_pm_qos_remove_request(req);
+		freq_qos_remove_request(req);
 		kfree(req);
 	}
 }

drivers/cpuidle/cpuidle-haltpoll.c+4−0

@@ -95,6 +95,10 @@ static int __init haltpoll_init(void) · 94 unmodified lines
95	int ret;	95	int ret;
96	struct cpuidle_driver *drv = &haltpoll_driver;	96	struct cpuidle_driver *drv = &haltpoll_driver;
97		97
		98	/* Do not load haltpoll if idle= is passed */
		99	if (boot_option_idle_override != IDLE_NO_OVERRIDE)
		100	return -ENODEV;
		101
98	cpuidle_poll_state_init(drv);	102	cpuidle_poll_state_init(drv);
99		103
100	if (!kvm_para_available() \|\|	104	if (!kvm_para_available() \|\|

drivers/dma-buf/dma-resv.c+1−1

@@ -471,7 +471,7 @@ unlock: · 470 unmodified lines
471	if (pfence_excl)	471	if (pfence_excl)
472	*pfence_excl = fence_excl;	472	*pfence_excl = fence_excl;
473	else if (fence_excl)	473	else if (fence_excl)
474	shared[++shared_count] = fence_excl;	474	shared[shared_count++] = fence_excl;
475		475
476	if (!shared_count) {	476	if (!shared_count) {
477	kfree(shared);	477	kfree(shared);

drivers/edac/ghes_edac.c+4−0

 	if (!ghes_pvt)
 		return;
+	if (atomic_dec_return(&ghes_init))
+		return;
 	mci = ghes_pvt->mci;
+	ghes_pvt = NULL;
 	edac_mc_del_mc(mci->pdev);
 	edac_mc_free(mci);
 }

drivers/firmware/dmi_scan.c+1−1

@@ -408,7 +408,7 @@ static void __init save_mem_devices(const struct dmi_header dm, void v) · 407 unmodified lines
408	bytes = ~0ull;	408	bytes = ~0ull;
409	else if (size & 0x8000)	409	else if (size & 0x8000)
410	bytes = (u64)(size & 0x7fff) << 10;	410	bytes = (u64)(size & 0x7fff) << 10;
411	else if (size != 0x7fff)	411	else if (size != 0x7fff \|\| dm->length < 0x20)
412	bytes = (u64)size << 20;	412	bytes = (u64)size << 20;
413	else	413	else
414	bytes = (u64)get_unaligned((u32 *)&d[0x1C]) << 20;	414	bytes = (u64)get_unaligned((u32 *)&d[0x1C]) << 20;

drivers/gpio/gpio-intel-mid.c+6−3

 	chip->irq_eoi(data);
 }
-static void intel_mid_irq_init_hw(struct intel_mid_gpio *priv)
+static int intel_mid_irq_init_hw(struct gpio_chip *chip)
 {
+	struct intel_mid_gpio *priv = gpiochip_get_data(chip);
 	void __iomem *reg;
 	unsigned base;
 		reg = gpio_reg(&priv->chip, base, GEDR);
 		writel(~0, reg);
 	}
+	return 0;
 }
 static int __maybe_unused intel_gpio_runtime_idle(struct device *dev)
 	girq = &priv->chip.irq;
 	girq->chip = &intel_mid_irqchip;
+	girq->init_hw = intel_mid_irq_init_hw;
 	girq->parent_handler = intel_mid_irq_handler;
 	girq->num_parents = 1;
 	girq->parents = devm_kcalloc(&pdev->dev, girq->num_parents,
 	girq->default_type = IRQ_TYPE_NONE;
 	girq->handler = handle_simple_irq;
-	intel_mid_irq_init_hw(priv);
 	pci_set_drvdata(pdev, priv);
 	retval = devm_gpiochip_add_data(&pdev->dev, &priv->chip, priv);
 	if (retval) {
 		dev_err(&pdev->dev, "gpiochip_add error %d\n", retval);

drivers/gpio/gpio-lynxpoint.c+6−4

 	.flags = IRQCHIP_SKIP_SET_WAKE,
 };
-static void lp_gpio_irq_init_hw(struct lp_gpio *lg)
+static int lp_gpio_irq_init_hw(struct gpio_chip *chip)
 {
+	struct lp_gpio *lg = gpiochip_get_data(chip);
 	unsigned long reg;
 	unsigned base;
 		reg = lp_gpio_reg(&lg->chip, base, LP_INT_STAT);
 		outl(0xffffffff, reg);
 	}
+	return 0;
 }
 static int lp_gpio_probe(struct platform_device *pdev)
 		girq = &gc->irq;
 		girq->chip = &lp_irqchip;
+		girq->init_hw = lp_gpio_irq_init_hw;
 		girq->parent_handler = lp_gpio_irq_handler;
 		girq->num_parents = 1;
 		girq->parents = devm_kcalloc(&pdev->dev, girq->num_parents,
 			return -ENOMEM;
 		girq->parents[0] = (unsigned)irq_rc->start;
 		girq->default_type = IRQ_TYPE_NONE;
-		girq->handler = handle_simple_irq;
+		girq->handler = handle_bad_irq;
-		lp_gpio_irq_init_hw(lg);
 	}
 	ret = devm_gpiochip_add_data(dev, gc, lg);

drivers/gpio/gpio-merrifield.c+6−3

 	chained_irq_exit(irqchip, desc);
 }
-static void mrfld_irq_init_hw(struct mrfld_gpio *priv)
+static int mrfld_irq_init_hw(struct gpio_chip *chip)
 {
+	struct mrfld_gpio *priv = gpiochip_get_data(chip);
 	void __iomem *reg;
 	unsigned int base;
 		reg = gpio_reg(&priv->chip, base, GFER);
 		writel(0, reg);
 	}
+	return 0;
 }
 static const char *mrfld_gpio_get_pinctrl_dev_name(struct mrfld_gpio *priv)
 	girq = &priv->chip.irq;
 	girq->chip = &mrfld_irqchip;
+	girq->init_hw = mrfld_irq_init_hw;
 	girq->parent_handler = mrfld_irq_handler;
 	girq->num_parents = 1;
 	girq->parents = devm_kcalloc(&pdev->dev, girq->num_parents,
 	if (!girq->parents)
 		return -ENOMEM;
 	girq->parents[0] = pdev->irq;
+	girq->first = irq_base;
 	girq->default_type = IRQ_TYPE_NONE;
 	girq->handler = handle_bad_irq;
-	mrfld_irq_init_hw(priv);
 	pci_set_drvdata(pdev, priv);
 	retval = devm_gpiochip_add_data(&pdev->dev, &priv->chip, priv);
 	if (retval) {

drivers/gpio/gpiolib.c+21−1

 				struct lock_class_key *lock_key,
 				struct lock_class_key *request_key);
 static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip);
+static int gpiochip_irqchip_init_hw(struct gpio_chip *gpiochip);
 static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip);
 static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip);
 	machine_gpiochip_add(chip);
+	ret = gpiochip_irqchip_init_hw(chip);
+	if (ret)
+		goto err_remove_acpi_chip;
 	ret = gpiochip_irqchip_init_valid_mask(chip);
 	if (ret)
 		goto err_remove_acpi_chip;
  * The following is irqchip helper code for gpiochips.
  */
+static int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
+{
+	struct gpio_irq_chip *girq = &gc->irq;
+	if (!girq->init_hw)
+		return 0;
+	return girq->init_hw(gc);
+}
 static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
 {
 	struct gpio_irq_chip *girq = &gc->irq;
 {
 	return 0;
 }
 static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip) {}
+static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gpiochip)
+{
+	return 0;
+}
 static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip)
 {
 	return 0;

drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c+6−1

 	return 0;
 error_free:
-	while (i--) {
+	for (i = 0; i < last_entry; ++i) {
+		struct amdgpu_bo *bo = ttm_to_amdgpu_bo(array[i].tv.bo);
+		amdgpu_bo_unref(&bo);
+	}
+	for (i = first_userptr; i < num_entries; ++i) {
 		struct amdgpu_bo *bo = ttm_to_amdgpu_bo(array[i].tv.bo);
 		amdgpu_bo_unref(&bo);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c+2−6

 	list_for_each_entry(lobj, validated, tv.head) {
 		struct amdgpu_bo *bo = ttm_to_amdgpu_bo(lobj->tv.bo);
-		bool binding_userptr = false;
 		struct mm_struct *usermm;
 		usermm = amdgpu_ttm_tt_get_usermm(bo->tbo.ttm);
 			amdgpu_ttm_tt_set_user_pages(bo->tbo.ttm,
 						     lobj->user_pages);
-			binding_userptr = true;
 		}
 		if (p->evictable == lobj)
 		if (r)
 			return r;
-		if (binding_userptr) {
+		kvfree(lobj->user_pages);
-			kvfree(lobj->user_pages);
+		lobj->user_pages = NULL;
-			lobj->user_pages = NULL;
-		}
 	}
 	return 0;
 }

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c+35−0

@@ -1048,6 +1048,41 @@ static int amdgpu_pci_probe(struct pci_dev *pdev, · 1047 unmodified lines
1048	return -ENODEV;	1048	return -ENODEV;
1049	}	1049	}
1050		1050
		1051	#ifdef CONFIG_DRM_AMDGPU_SI
		1052	if (!amdgpu_si_support) {
		1053	switch (flags & AMD_ASIC_MASK) {
		1054	case CHIP_TAHITI:
		1055	case CHIP_PITCAIRN:
		1056	case CHIP_VERDE:
		1057	case CHIP_OLAND:
		1058	case CHIP_HAINAN:
		1059	dev_info(&pdev->dev,
		1060	"SI support provided by radeon.\n");
		1061	dev_info(&pdev->dev,
		1062	"Use radeon.si_support=0 amdgpu.si_support=1 to override.\n"
		1063	);
		1064	return -ENODEV;
		1065	}
		1066	}
		1067	#endif
		1068	#ifdef CONFIG_DRM_AMDGPU_CIK
		1069	if (!amdgpu_cik_support) {
		1070	switch (flags & AMD_ASIC_MASK) {
		1071	case CHIP_KAVERI:
		1072	case CHIP_BONAIRE:
		1073	case CHIP_HAWAII:
		1074	case CHIP_KABINI:
		1075	case CHIP_MULLINS:
		1076	dev_info(&pdev->dev,
		1077	"CIK support provided by radeon.\n");
		1078	dev_info(&pdev->dev,
		1079	"Use radeon.cik_support=0 amdgpu.cik_support=1 to override.\n"
		1080	);
		1081	return -ENODEV;
		1082	}
		1083	}
		1084	#endif
		1085
1051	/* Get rid of things like offb */	1086	/* Get rid of things like offb */
1052	ret = drm_fb_helper_remove_conflicting_pci_framebuffers(pdev, 0, "amdgpudrmfb");	1087	ret = drm_fb_helper_remove_conflicting_pci_framebuffers(pdev, 0, "amdgpudrmfb");
1053	if (ret)	1088	if (ret)

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c+0−35

@@ -144,41 +144,6 @@ int amdgpu_driver_load_kms(struct drm_device *dev, unsigned long flags) · 143 unmodified lines
144	struct amdgpu_device *adev;	144	struct amdgpu_device *adev;
145	int r, acpi_status;	145	int r, acpi_status;
146		146
147	#ifdef CONFIG_DRM_AMDGPU_SI
148	if (!amdgpu_si_support) {
149	switch (flags & AMD_ASIC_MASK) {
150	case CHIP_TAHITI:
151	case CHIP_PITCAIRN:
152	case CHIP_VERDE:
153	case CHIP_OLAND:
154	case CHIP_HAINAN:
155	dev_info(dev->dev,
156	"SI support provided by radeon.\n");
157	dev_info(dev->dev,
158	"Use radeon.si_support=0 amdgpu.si_support=1 to override.\n"
159	);
160	return -ENODEV;
161	}
162	}
163	#endif
164	#ifdef CONFIG_DRM_AMDGPU_CIK
165	if (!amdgpu_cik_support) {
166	switch (flags & AMD_ASIC_MASK) {
167	case CHIP_KAVERI:
168	case CHIP_BONAIRE:
169	case CHIP_HAWAII:
170	case CHIP_KABINI:
171	case CHIP_MULLINS:
172	dev_info(dev->dev,
173	"CIK support provided by radeon.\n");
174	dev_info(dev->dev,
175	"Use radeon.cik_support=0 amdgpu.cik_support=1 to override.\n"
176	);
177	return -ENODEV;
178	}
179	}
180	#endif
181
182	adev = kzalloc(sizeof(struct amdgpu_device), GFP_KERNEL);	147	adev = kzalloc(sizeof(struct amdgpu_device), GFP_KERNEL);
183	if (adev == NULL) {	148	if (adev == NULL) {
184	return -ENOMEM;	149	return -ENOMEM;

drivers/gpu/drm/amd/amdgpu/amdgpu_object.c+2−1

 		.interruptible = (bp->type != ttm_bo_type_kernel),
 		.no_wait_gpu = false,
 		.resv = bp->resv,
-		.flags = TTM_OPT_FLAG_ALLOW_RES_EVICT
+		.flags = bp->type != ttm_bo_type_kernel ?
+			TTM_OPT_FLAG_ALLOW_RES_EVICT : 0
 	};
 	struct amdgpu_bo *bo;
 	unsigned long page_align, size = bp->size;

drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c+15−5

  * Open up a stream for HW test
  */
 int amdgpu_vce_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
+			      struct amdgpu_bo *bo,
 			      struct dma_fence **fence)
 {
 	const unsigned ib_size_dw = 1024;
 	struct amdgpu_job *job;
 	struct amdgpu_ib *ib;
 	struct dma_fence *f = NULL;
-	uint64_t dummy;
+	uint64_t addr;
 	int i, r;
 	r = amdgpu_job_alloc_with_ib(ring->adev, ib_size_dw * 4, &job);
 	ib = &job->ibs[0];
-	dummy = ib->gpu_addr + 1024;
+	addr = amdgpu_bo_gpu_offset(bo);
 	/* stitch together an VCE create msg */
 	ib->length_dw = 0;
 	ib->ptr[ib->length_dw++] = 0x00000014; /* len */
 	ib->ptr[ib->length_dw++] = 0x05000005; /* feedback buffer */
-	ib->ptr[ib->length_dw++] = upper_32_bits(dummy);
+	ib->ptr[ib->length_dw++] = upper_32_bits(addr);
-	ib->ptr[ib->length_dw++] = dummy;
+	ib->ptr[ib->length_dw++] = addr;
 	ib->ptr[ib->length_dw++] = 0x00000001;
 	for (i = ib->length_dw; i < ib_size_dw; ++i)
 int amdgpu_vce_ring_test_ib(struct amdgpu_ring *ring, long timeout)
 {
 	struct dma_fence *fence = NULL;
+	struct amdgpu_bo *bo = NULL;
 	long r;
 	/* skip vce ring1/2 ib test for now, since it's not reliable */
 	if (ring != &ring->adev->vce.ring[0])
 		return 0;
-	r = amdgpu_vce_get_create_msg(ring, 1, NULL);
+	r = amdgpu_bo_create_reserved(ring->adev, 512, PAGE_SIZE,
+				      AMDGPU_GEM_DOMAIN_VRAM,
+				      &bo, NULL, NULL);
+	if (r)
+		return r;
+	r = amdgpu_vce_get_create_msg(ring, 1, bo, NULL);
 	if (r)
 		goto error;
 error:
 	dma_fence_put(fence);
+	amdgpu_bo_unreserve(bo);
+	amdgpu_bo_unref(&bo);
 	return r;
 }

drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h+1−0

@@ -59,6 +59,7 @@ int amdgpu_vce_entity_init(struct amdgpu_device *adev); · 58 unmodified lines
59	int amdgpu_vce_suspend(struct amdgpu_device *adev);	59	int amdgpu_vce_suspend(struct amdgpu_device *adev);
60	int amdgpu_vce_resume(struct amdgpu_device *adev);	60	int amdgpu_vce_resume(struct amdgpu_device *adev);
61	int amdgpu_vce_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,	61	int amdgpu_vce_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
		62	struct amdgpu_bo *bo,
62	struct dma_fence **fence);	63	struct dma_fence **fence);
63	int amdgpu_vce_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,	64	int amdgpu_vce_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
64	bool direct, struct dma_fence **fence);	65	bool direct, struct dma_fence **fence);

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c+23−12

 }
 static int amdgpu_vcn_enc_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
-			      struct dma_fence **fence)
+					 struct amdgpu_bo *bo,
+					 struct dma_fence **fence)
 {
 	const unsigned ib_size_dw = 16;
 	struct amdgpu_job *job;
 	struct amdgpu_ib *ib;
 	struct dma_fence *f = NULL;
-	uint64_t dummy;
+	uint64_t addr;
 	int i, r;
 	r = amdgpu_job_alloc_with_ib(ring->adev, ib_size_dw * 4, &job);
 		return r;
 	ib = &job->ibs[0];
-	dummy = ib->gpu_addr + 1024;
+	addr = amdgpu_bo_gpu_offset(bo);
 	ib->length_dw = 0;
 	ib->ptr[ib->length_dw++] = 0x00000018;
 	ib->ptr[ib->length_dw++] = 0x00000001; /* session info */
 	ib->ptr[ib->length_dw++] = handle;
-	ib->ptr[ib->length_dw++] = upper_32_bits(dummy);
+	ib->ptr[ib->length_dw++] = upper_32_bits(addr);
-	ib->ptr[ib->length_dw++] = dummy;
+	ib->ptr[ib->length_dw++] = addr;
 	ib->ptr[ib->length_dw++] = 0x0000000b;
 	ib->ptr[ib->length_dw++] = 0x00000014;
 }
 static int amdgpu_vcn_enc_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
-				struct dma_fence **fence)
+					  struct amdgpu_bo *bo,
+					  struct dma_fence **fence)
 {
 	const unsigned ib_size_dw = 16;
 	struct amdgpu_job *job;
 	struct amdgpu_ib *ib;
 	struct dma_fence *f = NULL;
-	uint64_t dummy;
+	uint64_t addr;
 	int i, r;
 	r = amdgpu_job_alloc_with_ib(ring->adev, ib_size_dw * 4, &job);
 		return r;
 	ib = &job->ibs[0];
-	dummy = ib->gpu_addr + 1024;
+	addr = amdgpu_bo_gpu_offset(bo);
 	ib->length_dw = 0;
 	ib->ptr[ib->length_dw++] = 0x00000018;
 	ib->ptr[ib->length_dw++] = 0x00000001;
 	ib->ptr[ib->length_dw++] = handle;
-	ib->ptr[ib->length_dw++] = upper_32_bits(dummy);
+	ib->ptr[ib->length_dw++] = upper_32_bits(addr);
-	ib->ptr[ib->length_dw++] = dummy;
+	ib->ptr[ib->length_dw++] = addr;
 	ib->ptr[ib->length_dw++] = 0x0000000b;
 	ib->ptr[ib->length_dw++] = 0x00000014;
 int amdgpu_vcn_enc_ring_test_ib(struct amdgpu_ring *ring, long timeout)
 {
 	struct dma_fence *fence = NULL;
+	struct amdgpu_bo *bo = NULL;
 	long r;
-	r = amdgpu_vcn_enc_get_create_msg(ring, 1, NULL);
+	r = amdgpu_bo_create_reserved(ring->adev, 128 * 1024, PAGE_SIZE,
+				      AMDGPU_GEM_DOMAIN_VRAM,
+				      &bo, NULL, NULL);
+	if (r)
+		return r;
+	r = amdgpu_vcn_enc_get_create_msg(ring, 1, bo, NULL);
 	if (r)
 		goto error;
-	r = amdgpu_vcn_enc_get_destroy_msg(ring, 1, &fence);
+	r = amdgpu_vcn_enc_get_destroy_msg(ring, 1, bo, &fence);
 	if (r)
 		goto error;
 error:
 	dma_fence_put(fence);
+	amdgpu_bo_unreserve(bo);
+	amdgpu_bo_unref(&bo);
 	return r;
 }

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c+1−1

@@ -1129,7 +1129,7 @@ static void sdma_v5_0_ring_emit_pipeline_sync(struct amdgpu_ring *ring) · 1128 unmodified lines
1129	amdgpu_ring_write(ring, addr & 0xfffffffc);	1129	amdgpu_ring_write(ring, addr & 0xfffffffc);
1130	amdgpu_ring_write(ring, upper_32_bits(addr) & 0xffffffff);	1130	amdgpu_ring_write(ring, upper_32_bits(addr) & 0xffffffff);
1131	amdgpu_ring_write(ring, seq); /* reference */	1131	amdgpu_ring_write(ring, seq); /* reference */
1132	amdgpu_ring_write(ring, 0xfffffff); /* mask */	1132	amdgpu_ring_write(ring, 0xffffffff); /* mask */
1133	amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) \|	1133	amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) \|
1134	SDMA_PKT_POLL_REGMEM_DW5_INTERVAL(4)); /* retry count, poll interval */	1134	SDMA_PKT_POLL_REGMEM_DW5_INTERVAL(4)); /* retry count, poll interval */
1135	}	1135	}

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c+21−10

  * Open up a stream for HW test
  */
 static int uvd_v6_0_enc_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
+				       struct amdgpu_bo *bo,
 				       struct dma_fence **fence)
 {
 	const unsigned ib_size_dw = 16;
 	struct amdgpu_job *job;
 	struct amdgpu_ib *ib;
 	struct dma_fence *f = NULL;
-	uint64_t dummy;
+	uint64_t addr;
 	int i, r;
 	r = amdgpu_job_alloc_with_ib(ring->adev, ib_size_dw * 4, &job);
 		return r;
 	ib = &job->ibs[0];
-	dummy = ib->gpu_addr + 1024;
+	addr = amdgpu_bo_gpu_offset(bo);
 	ib->length_dw = 0;
 	ib->ptr[ib->length_dw++] = 0x00000018;
 	ib->ptr[ib->length_dw++] = 0x00000001; /* session info */
 	ib->ptr[ib->length_dw++] = handle;
 	ib->ptr[ib->length_dw++] = 0x00010000;
-	ib->ptr[ib->length_dw++] = upper_32_bits(dummy);
+	ib->ptr[ib->length_dw++] = upper_32_bits(addr);
-	ib->ptr[ib->length_dw++] = dummy;
+	ib->ptr[ib->length_dw++] = addr;
 	ib->ptr[ib->length_dw++] = 0x00000014;
 	ib->ptr[ib->length_dw++] = 0x00000002; /* task info */
  */
 static int uvd_v6_0_enc_get_destroy_msg(struct amdgpu_ring *ring,
 					uint32_t handle,
+					struct amdgpu_bo *bo,
 					struct dma_fence **fence)
 {
 	const unsigned ib_size_dw = 16;
 	struct amdgpu_job *job;
 	struct amdgpu_ib *ib;
 	struct dma_fence *f = NULL;
-	uint64_t dummy;
+	uint64_t addr;
 	int i, r;
 	r = amdgpu_job_alloc_with_ib(ring->adev, ib_size_dw * 4, &job);
 		return r;
 	ib = &job->ibs[0];
-	dummy = ib->gpu_addr + 1024;
+	addr = amdgpu_bo_gpu_offset(bo);
 	ib->length_dw = 0;
 	ib->ptr[ib->length_dw++] = 0x00000018;
 	ib->ptr[ib->length_dw++] = 0x00000001; /* session info */
 	ib->ptr[ib->length_dw++] = handle;
 	ib->ptr[ib->length_dw++] = 0x00010000;
-	ib->ptr[ib->length_dw++] = upper_32_bits(dummy);
+	ib->ptr[ib->length_dw++] = upper_32_bits(addr);
-	ib->ptr[ib->length_dw++] = dummy;
+	ib->ptr[ib->length_dw++] = addr;
 	ib->ptr[ib->length_dw++] = 0x00000014;
 	ib->ptr[ib->length_dw++] = 0x00000002; /* task info */
 static int uvd_v6_0_enc_ring_test_ib(struct amdgpu_ring *ring, long timeout)
 {
 	struct dma_fence *fence = NULL;
+	struct amdgpu_bo *bo = NULL;
 	long r;
-	r = uvd_v6_0_enc_get_create_msg(ring, 1, NULL);
+	r = amdgpu_bo_create_reserved(ring->adev, 128 * 1024, PAGE_SIZE,
+				      AMDGPU_GEM_DOMAIN_VRAM,
+				      &bo, NULL, NULL);
+	if (r)
+		return r;
+	r = uvd_v6_0_enc_get_create_msg(ring, 1, bo, NULL);
 	if (r)
 		goto error;
-	r = uvd_v6_0_enc_get_destroy_msg(ring, 1, &fence);
+	r = uvd_v6_0_enc_get_destroy_msg(ring, 1, bo, &fence);
 	if (r)
 		goto error;
 error:
 	dma_fence_put(fence);
+	amdgpu_bo_unreserve(bo);
+	amdgpu_bo_unref(&bo);
 	return r;
 }

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c+22−11

  * Open up a stream for HW test
  */
 static int uvd_v7_0_enc_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
+				       struct amdgpu_bo *bo,
 				       struct dma_fence **fence)
 {
 	const unsigned ib_size_dw = 16;
 	struct amdgpu_job *job;
 	struct amdgpu_ib *ib;
 	struct dma_fence *f = NULL;
-	uint64_t dummy;
+	uint64_t addr;
 	int i, r;
 	r = amdgpu_job_alloc_with_ib(ring->adev, ib_size_dw * 4, &job);
 		return r;
 	ib = &job->ibs[0];
-	dummy = ib->gpu_addr + 1024;
+	addr = amdgpu_bo_gpu_offset(bo);
 	ib->length_dw = 0;
 	ib->ptr[ib->length_dw++] = 0x00000018;
 	ib->ptr[ib->length_dw++] = 0x00000001; /* session info */
 	ib->ptr[ib->length_dw++] = handle;
 	ib->ptr[ib->length_dw++] = 0x00000000;
-	ib->ptr[ib->length_dw++] = upper_32_bits(dummy);
+	ib->ptr[ib->length_dw++] = upper_32_bits(addr);
-	ib->ptr[ib->length_dw++] = dummy;
+	ib->ptr[ib->length_dw++] = addr;
 	ib->ptr[ib->length_dw++] = 0x00000014;
 	ib->ptr[ib->length_dw++] = 0x00000002; /* task info */
  * Close up a stream for HW test or if userspace failed to do so
  */
 static int uvd_v7_0_enc_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
-				struct dma_fence **fence)
+					struct amdgpu_bo *bo,
+					struct dma_fence **fence)
 {
 	const unsigned ib_size_dw = 16;
 	struct amdgpu_job *job;
 	struct amdgpu_ib *ib;
 	struct dma_fence *f = NULL;
-	uint64_t dummy;
+	uint64_t addr;
 	int i, r;
 	r = amdgpu_job_alloc_with_ib(ring->adev, ib_size_dw * 4, &job);
 		return r;
 	ib = &job->ibs[0];
-	dummy = ib->gpu_addr + 1024;
+	addr = amdgpu_bo_gpu_offset(bo);
 	ib->length_dw = 0;
 	ib->ptr[ib->length_dw++] = 0x00000018;
 	ib->ptr[ib->length_dw++] = 0x00000001;
 	ib->ptr[ib->length_dw++] = handle;
 	ib->ptr[ib->length_dw++] = 0x00000000;
-	ib->ptr[ib->length_dw++] = upper_32_bits(dummy);
+	ib->ptr[ib->length_dw++] = upper_32_bits(addr);
-	ib->ptr[ib->length_dw++] = dummy;
+	ib->ptr[ib->length_dw++] = addr;
 	ib->ptr[ib->length_dw++] = 0x00000014;
 	ib->ptr[ib->length_dw++] = 0x00000002;
 static int uvd_v7_0_enc_ring_test_ib(struct amdgpu_ring *ring, long timeout)
 {
 	struct dma_fence *fence = NULL;
+	struct amdgpu_bo *bo = NULL;
 	long r;
-	r = uvd_v7_0_enc_get_create_msg(ring, 1, NULL);
+	r = amdgpu_bo_create_reserved(ring->adev, 128 * 1024, PAGE_SIZE,
+				      AMDGPU_GEM_DOMAIN_VRAM,
+				      &bo, NULL, NULL);
+	if (r)
+		return r;
+	r = uvd_v7_0_enc_get_create_msg(ring, 1, bo, NULL);
 	if (r)
 		goto error;
-	r = uvd_v7_0_enc_get_destroy_msg(ring, 1, &fence);
+	r = uvd_v7_0_enc_get_destroy_msg(ring, 1, bo, &fence);
 	if (r)
 		goto error;
 error:
 	dma_fence_put(fence);
+	amdgpu_bo_unreserve(bo);
+	amdgpu_bo_unref(&bo);
 	return r;
 }

drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c+1−1

@@ -655,7 +655,7 @@ static int polaris10_populate_smc_mvdd_table(struct pp_hwmgr *hwmgr, · 654 unmodified lines
655	count = SMU_MAX_SMIO_LEVELS;	655	count = SMU_MAX_SMIO_LEVELS;
656	for (level = 0; level < count; level++) {	656	for (level = 0; level < count; level++) {
657	table->SmioTable2.Pattern[level].Voltage =	657	table->SmioTable2.Pattern[level].Voltage =
658	PP_HOST_TO_SMC_US(data->mvdd_voltage_table.entries[count].value * VOLTAGE_SCALE);	658	PP_HOST_TO_SMC_US(data->mvdd_voltage_table.entries[level].value * VOLTAGE_SCALE);
659	/* Index into DpmTable.Smio. Drive bits from Smio entry to get this voltage level.*/	659	/* Index into DpmTable.Smio. Drive bits from Smio entry to get this voltage level.*/
660	table->SmioTable2.Pattern[level].Smio =	660	table->SmioTable2.Pattern[level].Smio =
661	(uint8_t) level;	661	(uint8_t) level;

drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c+1−1

@@ -456,7 +456,7 @@ static int vegam_populate_smc_mvdd_table(struct pp_hwmgr *hwmgr, · 455 unmodified lines
456	count = SMU_MAX_SMIO_LEVELS;	456	count = SMU_MAX_SMIO_LEVELS;
457	for (level = 0; level < count; level++) {	457	for (level = 0; level < count; level++) {
458	table->SmioTable2.Pattern[level].Voltage = PP_HOST_TO_SMC_US(	458	table->SmioTable2.Pattern[level].Voltage = PP_HOST_TO_SMC_US(
459	data->mvdd_voltage_table.entries[count].value * VOLTAGE_SCALE);	459	data->mvdd_voltage_table.entries[level].value * VOLTAGE_SCALE);
460	/* Index into DpmTable.Smio. Drive bits from Smio entry to get this voltage level.*/	460	/* Index into DpmTable.Smio. Drive bits from Smio entry to get this voltage level.*/
461	table->SmioTable2.Pattern[level].Smio =	461	table->SmioTable2.Pattern[level].Smio =
462	(uint8_t) level;	462	(uint8_t) level;

drivers/gpu/drm/arm/display/komeda/komeda_kms.c+2−1

@@ -82,7 +82,8 @@ static void komeda_kms_commit_tail(struct drm_atomic_state *old_state) · 81 unmodified lines
82		82
83	drm_atomic_helper_commit_modeset_disables(dev, old_state);	83	drm_atomic_helper_commit_modeset_disables(dev, old_state);
84		84
85	drm_atomic_helper_commit_planes(dev, old_state, 0);	85	drm_atomic_helper_commit_planes(dev, old_state,
		86	DRM_PLANE_COMMIT_ACTIVE_ONLY);
86		87
87	drm_atomic_helper_commit_modeset_enables(dev, old_state);	88	drm_atomic_helper_commit_modeset_enables(dev, old_state);
88		89

drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c+2−2

@@ -564,8 +564,8 @@ komeda_splitter_validate(struct komeda_splitter *splitter, · 563 unmodified lines
564	}	564	}
565		565
566	if (!in_range(&splitter->vsize, dflow->in_h)) {	566	if (!in_range(&splitter->vsize, dflow->in_h)) {
567	DRM_DEBUG_ATOMIC("split in_in: %d exceed the acceptable range.\n",	567	DRM_DEBUG_ATOMIC("split in_h: %d exceeds the acceptable range.\n",
568	dflow->in_w);	568	dflow->in_h);
569	return -EINVAL;	569	return -EINVAL;
570	}	570	}
571		571

drivers/gpu/drm/drm_edid.c+3−0

@@ -159,6 +159,9 @@ static const struct edid_quirk { · 158 unmodified lines
159	/* Medion MD 30217 PG */	159	/* Medion MD 30217 PG */
160	{ "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 },	160	{ "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 },
161		161
		162	/* Lenovo G50 */
		163	{ "SDC", 18514, EDID_QUIRK_FORCE_6BPC },
		164
162	/* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */	165	/* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */
163	{ "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC },	166	{ "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC },
164		167

drivers/gpu/drm/i915/display/intel_bios.c+16−6

 		DRM_DEBUG_KMS("port %c trying to use the same DDC pin (0x%x) as port %c, "
 			      "disabling port %c DVI/HDMI support\n",
 			      port_name(port), info->alternate_ddc_pin,
-			      port_name(p), port_name(port));
+			      port_name(p), port_name(p));
 		/*
 		 * If we have multiple ports supposedly sharing the
 		 * port. Otherwise they share the same ddc bin and
 		 * system couldn't communicate with them separately.
 		 *
-		 * Give child device order the priority, first come first
+		 * Give inverse child device order the priority,
-		 * served.
+		 * last one wins. Yes, there are real machines
+		 * (eg. Asrock B250M-HDV) where VBT has both
+		 * port A and port E with the same AUX ch and
+		 * we must pick port E :(
 		 */
+		info = &dev_priv->vbt.ddi_port_info[p];
 		info->supports_dvi = false;
 		info->supports_hdmi = false;
 		info->alternate_ddc_pin = 0;
 		DRM_DEBUG_KMS("port %c trying to use the same AUX CH (0x%x) as port %c, "
 			      "disabling port %c DP support\n",
 			      port_name(port), info->alternate_aux_channel,
-			      port_name(p), port_name(port));
+			      port_name(p), port_name(p));
 		/*
 		 * If we have multiple ports supposedlt sharing the
 		 * port. Otherwise they share the same aux channel
 		 * and system couldn't communicate with them separately.
 		 *
-		 * Give child device order the priority, first come first
+		 * Give inverse child device order the priority,
-		 * served.
+		 * last one wins. Yes, there are real machines
+		 * (eg. Asrock B250M-HDV) where VBT has both
+		 * port A and port E with the same AUX ch and
+		 * we must pick port E :(
 		 */
+		info = &dev_priv->vbt.ddi_port_info[p];
 		info->supports_dp = false;
 		info->alternate_aux_channel = 0;
 	}

drivers/gpu/drm/i915/gem/i915_gem_mman.c+7−0

 		return VM_FAULT_OOM;
 	case -ENOSPC:
 	case -EFAULT:
+	case -ENODEV: /* bad object, how did you get here! */
 		return VM_FAULT_SIGBUS;
 	default:
 		WARN_ONCE(ret, "unhandled error in %s: %i\n", __func__, ret);
 	if (!obj)
 		return -ENOENT;
+	if (i915_gem_object_never_bind_ggtt(obj)) {
+		ret = -ENODEV;
+		goto out;
+	}
 	ret = create_mmap_offset(obj);
 	if (ret == 0)
 		*offset = drm_vma_node_offset_addr(&obj->base.vma_node);
+out:
 	i915_gem_object_put(obj);
 	return ret;
 }

drivers/gpu/drm/i915/gem/i915_gem_object.h+6−0

 	return obj->ops->flags & I915_GEM_OBJECT_IS_PROXY;
 }
+static inline bool
+i915_gem_object_never_bind_ggtt(const struct drm_i915_gem_object *obj)
+{
+	return obj->ops->flags & I915_GEM_OBJECT_NO_GGTT;
+}
 static inline bool
 i915_gem_object_needs_async_cancel(const struct drm_i915_gem_object *obj)
 {

drivers/gpu/drm/i915/gem/i915_gem_object_types.h+2−1

@@ -32,7 +32,8 @@ struct drm_i915_gem_object_ops { · 31 unmodified lines
32	#define I915_GEM_OBJECT_HAS_STRUCT_PAGE BIT(0)	32	#define I915_GEM_OBJECT_HAS_STRUCT_PAGE BIT(0)
33	#define I915_GEM_OBJECT_IS_SHRINKABLE BIT(1)	33	#define I915_GEM_OBJECT_IS_SHRINKABLE BIT(1)
34	#define I915_GEM_OBJECT_IS_PROXY BIT(2)	34	#define I915_GEM_OBJECT_IS_PROXY BIT(2)
35	#define I915_GEM_OBJECT_ASYNC_CANCEL BIT(3)	35	#define I915_GEM_OBJECT_NO_GGTT BIT(3)
		36	#define I915_GEM_OBJECT_ASYNC_CANCEL BIT(4)
36		37
37	/* Interface between the GEM object and its backing storage.	38	/* Interface between the GEM object and its backing storage.
38	* get_pages() is called once prior to the use of the associated set	39	* get_pages() is called once prior to the use of the associated set

drivers/gpu/drm/i915/gem/i915_gem_userptr.c+1−0

@@ -702,6 +702,7 @@ i915_gem_userptr_dmabuf_export(struct drm_i915_gem_object *obj) · 701 unmodified lines
702	static const struct drm_i915_gem_object_ops i915_gem_userptr_ops = {	702	static const struct drm_i915_gem_object_ops i915_gem_userptr_ops = {
703	.flags = I915_GEM_OBJECT_HAS_STRUCT_PAGE \|	703	.flags = I915_GEM_OBJECT_HAS_STRUCT_PAGE \|
704	I915_GEM_OBJECT_IS_SHRINKABLE \|	704	I915_GEM_OBJECT_IS_SHRINKABLE \|
		705	I915_GEM_OBJECT_NO_GGTT \|
705	I915_GEM_OBJECT_ASYNC_CANCEL,	706	I915_GEM_OBJECT_ASYNC_CANCEL,
706	.get_pages = i915_gem_userptr_get_pages,	707	.get_pages = i915_gem_userptr_get_pages,
707	.put_pages = i915_gem_userptr_put_pages,	708	.put_pages = i915_gem_userptr_put_pages,

drivers/gpu/drm/i915/gt/intel_lrc.c+43−20

@@ -234,6 +234,13 @@ static void execlists_init_reg_state(u32 *reg_state, · 233 unmodified lines
234	struct intel_engine_cs *engine,	234	struct intel_engine_cs *engine,
235	struct intel_ring *ring);	235	struct intel_ring *ring);
236		236
		237	static void mark_eio(struct i915_request *rq)
		238	{
		239	if (!i915_request_signaled(rq))
		240	dma_fence_set_error(&rq->fence, -EIO);
		241	i915_request_mark_complete(rq);
		242	}
		243
237	static inline u32 intel_hws_preempt_address(struct intel_engine_cs *engine)	244	static inline u32 intel_hws_preempt_address(struct intel_engine_cs *engine)
238	{	245	{
239	return (i915_ggtt_offset(engine->status_page.vma) +	246	return (i915_ggtt_offset(engine->status_page.vma) +
@@ -1236,6 +1243,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine) · 996 unmodified lines
1236	submit = true;	1243	submit = true;
1237	last = rq;	1244	last = rq;
1238	}	1245	}
		1246	i915_request_put(rq);
1239		1247
1240	/*	1248	/*
1241	* Hmm, we have a bunch of virtual engine requests,	1249	* Hmm, we have a bunch of virtual engine requests,
@@ -2574,12 +2582,8 @@ static void execlists_cancel_requests(struct intel_engine_cs *engine) · 1332 unmodified lines
2574	__execlists_reset(engine, true);	2582	__execlists_reset(engine, true);
2575		2583
2576	/* Mark all executing requests as skipped. */	2584	/* Mark all executing requests as skipped. */
2577	list_for_each_entry(rq, &engine->active.requests, sched.link) {	2585	list_for_each_entry(rq, &engine->active.requests, sched.link)
2578	if (!i915_request_signaled(rq))	2586	mark_eio(rq);
2579	dma_fence_set_error(&rq->fence, -EIO);
2580
2581	i915_request_mark_complete(rq);
2582	}
2583		2587
2584	/* Flush the queued requests to the timeline list (for retiring). */	2588	/* Flush the queued requests to the timeline list (for retiring). */
2585	while ((rb = rb_first_cached(&execlists->queue))) {	2589	while ((rb = rb_first_cached(&execlists->queue))) {
@@ -2587,9 +2591,8 @@ static void execlists_cancel_requests(struct intel_engine_cs *engine) · 1 unmodified line
2587	int i;	2591	int i;
2588		2592
2589	priolist_for_each_request_consume(rq, rn, p, i) {	2593	priolist_for_each_request_consume(rq, rn, p, i) {
		2594	mark_eio(rq);
2590	__i915_request_submit(rq);	2595	__i915_request_submit(rq);
2591	dma_fence_set_error(&rq->fence, -EIO);
2592	i915_request_mark_complete(rq);
2593	}	2596	}
2594		2597
2595	rb_erase_cached(&p->node, &execlists->queue);	2598	rb_erase_cached(&p->node, &execlists->queue);
@@ -2605,13 +2608,15 @@ static void execlists_cancel_requests(struct intel_engine_cs *engine) · 9 unmodified lines
2605	RB_CLEAR_NODE(rb);	2608	RB_CLEAR_NODE(rb);
2606		2609
2607	spin_lock(&ve->base.active.lock);	2610	spin_lock(&ve->base.active.lock);
2608	if (ve->request) {	2611	rq = fetch_and_zero(&ve->request);
2609	ve->request->engine = engine;	2612	if (rq) {
2610	__i915_request_submit(ve->request);	2613	mark_eio(rq);
2611	dma_fence_set_error(&ve->request->fence, -EIO);	2614
2612	i915_request_mark_complete(ve->request);	2615	rq->engine = engine;
		2616	__i915_request_submit(rq);
		2617	i915_request_put(rq);
		2618
2613	ve->base.execlists.queue_priority_hint = INT_MIN;	2619	ve->base.execlists.queue_priority_hint = INT_MIN;
2614	ve->request = NULL;
2615	}	2620	}
2616	spin_unlock(&ve->base.active.lock);	2621	spin_unlock(&ve->base.active.lock);
2617	}	2622	}
@@ -3615,6 +3620,8 @@ submit_engine: · 997 unmodified lines
3615	static void virtual_submit_request(struct i915_request *rq)	3620	static void virtual_submit_request(struct i915_request *rq)
3616	{	3621	{
3617	struct virtual_engine *ve = to_virtual_engine(rq->engine);	3622	struct virtual_engine *ve = to_virtual_engine(rq->engine);
		3623	struct i915_request *old;
		3624	unsigned long flags;
3618		3625
3619	GEM_TRACE("%s: rq=%llx:%lld\n",	3626	GEM_TRACE("%s: rq=%llx:%lld\n",
3620	ve->base.name,	3627	ve->base.name,
@@ -3623,15 +3630,31 @@ static void virtual_submit_request(struct i915_request *rq) · 2 unmodified lines
3623		3630
3624	GEM_BUG_ON(ve->base.submit_request != virtual_submit_request);	3631	GEM_BUG_ON(ve->base.submit_request != virtual_submit_request);
3625		3632
3626	GEM_BUG_ON(ve->request);	3633	spin_lock_irqsave(&ve->base.active.lock, flags);
3627	GEM_BUG_ON(!list_empty(virtual_queue(ve)));	3634
		3635	old = ve->request;
		3636	if (old) { /* background completion event from preempt-to-busy */
		3637	GEM_BUG_ON(!i915_request_completed(old));
		3638	__i915_request_submit(old);
		3639	i915_request_put(old);
		3640	}
3628		3641
3629	ve->base.execlists.queue_priority_hint = rq_prio(rq);	3642	if (i915_request_completed(rq)) {
3630	WRITE_ONCE(ve->request, rq);	3643	__i915_request_submit(rq);
3631		3644
3632	list_move_tail(&rq->sched.link, virtual_queue(ve));	3645	ve->base.execlists.queue_priority_hint = INT_MIN;
		3646	ve->request = NULL;
		3647	} else {
		3648	ve->base.execlists.queue_priority_hint = rq_prio(rq);
		3649	ve->request = i915_request_get(rq);
		3650
		3651	GEM_BUG_ON(!list_empty(virtual_queue(ve)));
		3652	list_move_tail(&rq->sched.link, virtual_queue(ve));
		3653
		3654	tasklet_schedule(&ve->base.execlists.tasklet);
		3655	}
3633		3656
3634	tasklet_schedule(&ve->base.execlists.tasklet);	3657	spin_unlock_irqrestore(&ve->base.active.lock, flags);
3635	}	3658	}
3636		3659
3637	static struct ve_bond *	3660	static struct ve_bond *

drivers/gpu/drm/i915/i915_gem.c+3−0

@@ -969,6 +969,9 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj, · 968 unmodified lines
969		969
970	lockdep_assert_held(&obj->base.dev->struct_mutex);	970	lockdep_assert_held(&obj->base.dev->struct_mutex);
971		971
		972	if (i915_gem_object_never_bind_ggtt(obj))
		973	return ERR_PTR(-ENODEV);
		974
972	if (flags & PIN_MAPPABLE &&	975	if (flags & PIN_MAPPABLE &&
973	(!view \|\| view->type == I915_GGTT_VIEW_NORMAL)) {	976	(!view \|\| view->type == I915_GGTT_VIEW_NORMAL)) {
974	/* If the required space is larger than the available	977	/* If the required space is larger than the available

drivers/gpu/drm/msm/dsi/dsi_host.c+4−2

 #include "dsi_cfg.h"
 #include "msm_kms.h"
+#define DSI_RESET_TOGGLE_DELAY_MS 20
 static int dsi_get_version(const void __iomem *base, u32 *major, u32 *minor)
 {
 	u32 ver;
 	wmb(); /* clocks need to be enabled before reset */
 	dsi_write(msm_host, REG_DSI_RESET, 1);
-	wmb(); /* make sure reset happen */
+	msleep(DSI_RESET_TOGGLE_DELAY_MS); /* make sure reset happen */
 	dsi_write(msm_host, REG_DSI_RESET, 0);
 }
 	/* dsi controller can only be reset while clocks are running */
 	dsi_write(msm_host, REG_DSI_RESET, 1);
-	wmb();	/* make sure reset happen */
+	msleep(DSI_RESET_TOGGLE_DELAY_MS); /* make sure reset happen */
 	dsi_write(msm_host, REG_DSI_RESET, 0);
 	wmb();	/* controller out of reset */
 	dsi_write(msm_host, REG_DSI_CTRL, data0);

drivers/gpu/drm/panfrost/panfrost_gpu.c+3−0

 	pfdev->features.mem_features = gpu_read(pfdev, GPU_MEM_FEATURES);
 	pfdev->features.mmu_features = gpu_read(pfdev, GPU_MMU_FEATURES);
 	pfdev->features.thread_features = gpu_read(pfdev, GPU_THREAD_FEATURES);
+	pfdev->features.max_threads = gpu_read(pfdev, GPU_THREAD_MAX_THREADS);
+	pfdev->features.thread_max_workgroup_sz = gpu_read(pfdev, GPU_THREAD_MAX_WORKGROUP_SIZE);
+	pfdev->features.thread_max_barrier_sz = gpu_read(pfdev, GPU_THREAD_MAX_BARRIER_SIZE);
 	pfdev->features.coherency_features = gpu_read(pfdev, GPU_COHERENCY_FEATURES);
 	for (i = 0; i < 4; i++)
 		pfdev->features.texture_features[i] = gpu_read(pfdev, GPU_TEXTURE_FEATURES(i));

drivers/gpu/drm/panfrost/panfrost_job.c+11−5

 		job_read(pfdev, JS_TAIL_LO(js)),
 		sched_job);
-	mutex_lock(&pfdev->reset_lock);
+	if (!mutex_trylock(&pfdev->reset_lock))
+		return;
-	for (i = 0; i < NUM_JOB_SLOTS; i++)
+	for (i = 0; i < NUM_JOB_SLOTS; i++) {
-		drm_sched_stop(&pfdev->js->queue[i].sched, sched_job);
+		struct drm_gpu_scheduler *sched = &pfdev->js->queue[i].sched;
+		drm_sched_stop(sched, sched_job);
+		if (js != i)
+			/* Ensure any timeouts on other slots have finished */
+			cancel_delayed_work_sync(&sched->work_tdr);
+	}
-	if (sched_job)
+	drm_sched_increase_karma(sched_job);
-		drm_sched_increase_karma(sched_job);
 	spin_lock_irqsave(&pfdev->js->job_lock, flags);
 	for (i = 0; i < NUM_JOB_SLOTS; i++) {

drivers/gpu/drm/radeon/radeon_drv.c+0−8

 static void
 radeon_pci_shutdown(struct pci_dev *pdev)
 {
-	struct drm_device *ddev = pci_get_drvdata(pdev);
 	/* if we are running in a VM, make sure the device
 	 * torn down properly on reboot/shutdown
 	 */
 	if (radeon_device_is_virtual())
 		radeon_pci_remove(pdev);
-	/* Some adapters need to be suspended before a
-	* shutdown occurs in order to prevent an error
-	* during kexec.
-	*/
-	radeon_suspend_kms(ddev, true, true, false);
 }
 static int radeon_pmops_suspend(struct device *dev)

drivers/gpu/drm/tiny/Kconfig+0−1

@@ -63,7 +63,6 @@ config TINYDRM_REPAPER · 62 unmodified lines
63	depends on DRM && SPI	63	depends on DRM && SPI
64	select DRM_KMS_HELPER	64	select DRM_KMS_HELPER
65	select DRM_KMS_CMA_HELPER	65	select DRM_KMS_CMA_HELPER
66	depends on THERMAL \|\| !THERMAL
67	help	66	help
68	DRM driver for the following Pervasive Displays panels:	67	DRM driver for the following Pervasive Displays panels:
69	1.44" TFT EPD Panel (E1144CS021)	68	1.44" TFT EPD Panel (E1144CS021)

drivers/gpu/drm/ttm/ttm_bo.c+5−4

 	list_add_tail(&bo->lru, &man->lru[bo->priority]);
 	kref_get(&bo->list_kref);
-	if (bo->ttm && !(bo->ttm->page_flags &
+	if (!(man->flags & TTM_MEMTYPE_FLAG_FIXED) && bo->ttm &&
-			 (TTM_PAGE_FLAG_SG | TTM_PAGE_FLAG_SWAPPED))) {
+	    !(bo->ttm->page_flags & (TTM_PAGE_FLAG_SG |
+				     TTM_PAGE_FLAG_SWAPPED))) {
 		list_add_tail(&bo->swap, &bdev->glob->swap_lru[bo->priority]);
 		kref_get(&bo->list_kref);
 	}
 	if (!bo) {
 		if (busy_bo)
-			ttm_bo_get(busy_bo);
+			kref_get(&busy_bo->list_kref);
 		spin_unlock(&glob->lru_lock);
 		ret = ttm_mem_evict_wait_busy(busy_bo, ctx, ticket);
 		if (busy_bo)
-			ttm_bo_put(busy_bo);
+			kref_put(&busy_bo->list_kref, ttm_bo_release_list);
 		return ret;
 	}

drivers/gpu/drm/ttm/ttm_bo_vm.c+7−9

@@ -278,15 +278,13 @@ static vm_fault_t ttm_bo_vm_fault(struct vm_fault *vmf) · 277 unmodified lines
278	else	278	else
279	ret = vmf_insert_pfn(&cvma, address, pfn);	279	ret = vmf_insert_pfn(&cvma, address, pfn);
280		280
281	/*	281	/* Never error on prefaulted PTEs */
282	* Somebody beat us to this PTE or prefaulting to	282	if (unlikely((ret & VM_FAULT_ERROR))) {
283	* an already populated PTE, or prefaulting error.	283	if (i == 0)
284	*/	284	goto out_io_unlock;
285		285	else
286	if (unlikely((ret == VM_FAULT_NOPAGE && i > 0)))	286	break;
287	break;	287	}
288	else if (unlikely(ret & VM_FAULT_ERROR))
289	goto out_io_unlock;
290		288
291	address += PAGE_SIZE;	289	address += PAGE_SIZE;
292	if (unlikely(++page_offset >= page_last))	290	if (unlikely(++page_offset >= page_last))

drivers/i2c/busses/i2c-aspeed.c+34−20

 #define ASPEED_I2CD_S_TX_CMD				BIT(2)
 #define ASPEED_I2CD_M_TX_CMD				BIT(1)
 #define ASPEED_I2CD_M_START_CMD				BIT(0)
+#define ASPEED_I2CD_MASTER_CMDS_MASK					       \
+		(ASPEED_I2CD_M_STOP_CMD |				       \
+		 ASPEED_I2CD_M_S_RX_CMD_LAST |				       \
+		 ASPEED_I2CD_M_RX_CMD |					       \
+		 ASPEED_I2CD_M_TX_CMD |					       \
+		 ASPEED_I2CD_M_START_CMD)
 /* 0x18 : I2CD Slave Device Address Register   */
 #define ASPEED_I2CD_DEV_ADDR_MASK			GENMASK(6, 0)
 	struct i2c_msg *msg = &bus->msgs[bus->msgs_index];
 	u8 slave_addr = i2c_8bit_addr_from_msg(msg);
-	bus->master_state = ASPEED_I2C_MASTER_START;
 #if IS_ENABLED(CONFIG_I2C_SLAVE)
 	/*
 	 * If it's requested in the middle of a slave session, set the master
 	 * state to 'pending' then H/W will continue handling this master
 	 * command when the bus comes back to the idle state.
 	 */
-	if (bus->slave_state != ASPEED_I2C_SLAVE_INACTIVE)
+	if (bus->slave_state != ASPEED_I2C_SLAVE_INACTIVE) {
 		bus->master_state = ASPEED_I2C_MASTER_PENDING;
+		return;
+	}
 #endif /* CONFIG_I2C_SLAVE */
+	bus->master_state = ASPEED_I2C_MASTER_START;
 	bus->buf_index = 0;
 	if (msg->flags & I2C_M_RD) {
 		}
 	}
-#if IS_ENABLED(CONFIG_I2C_SLAVE)
-	/*
-	 * A pending master command will be started by H/W when the bus comes
-	 * back to idle state after completing a slave operation so change the
-	 * master state from 'pending' to 'start' at here if slave is inactive.
-	 */
-	if (bus->master_state == ASPEED_I2C_MASTER_PENDING) {
-		if (bus->slave_state != ASPEED_I2C_SLAVE_INACTIVE)
-			goto out_no_complete;
-		bus->master_state = ASPEED_I2C_MASTER_START;
-	}
-#endif /* CONFIG_I2C_SLAVE */
 	/* Master is not currently active, irq was for someone else. */
 	if (bus->master_state == ASPEED_I2C_MASTER_INACTIVE ||
 	    bus->master_state == ASPEED_I2C_MASTER_PENDING)
 #if IS_ENABLED(CONFIG_I2C_SLAVE)
 		/*
 		 * If a peer master starts a xfer immediately after it queues a
-		 * master command, change its state to 'pending' then H/W will
+		 * master command, clear the queued master command and change
-		 * continue the queued master xfer just after completing the
+		 * its state to 'pending'. To simplify handling of pending
-		 * slave mode session.
+		 * cases, it uses S/W solution instead of H/W command queue
+		 * handling.
 		 */
 		if (unlikely(irq_status & ASPEED_I2CD_INTR_SLAVE_MATCH)) {
+			writel(readl(bus->base + ASPEED_I2C_CMD_REG) &
+				~ASPEED_I2CD_MASTER_CMDS_MASK,
+			       bus->base + ASPEED_I2C_CMD_REG);
 			bus->master_state = ASPEED_I2C_MASTER_PENDING;
 			dev_dbg(bus->dev,
 				"master goes pending due to a slave start\n");
 			irq_handled |= aspeed_i2c_master_irq(bus,
 							     irq_remaining);
 	}
+	/*
+	 * Start a pending master command at here if a slave operation is
+	 * completed.
+	 */
+	if (bus->master_state == ASPEED_I2C_MASTER_PENDING &&
+	    bus->slave_state == ASPEED_I2C_SLAVE_INACTIVE)
+		aspeed_i2c_do_start(bus);
 #else
 	irq_handled = aspeed_i2c_master_irq(bus, irq_remaining);
 #endif /* CONFIG_I2C_SLAVE */
 		     ASPEED_I2CD_BUS_BUSY_STS))
 			aspeed_i2c_recover_bus(bus);
+		/*
+		 * If timed out and the state is still pending, drop the pending
+		 * master command.
+		 */
+		spin_lock_irqsave(&bus->lock, flags);
+		if (bus->master_state == ASPEED_I2C_MASTER_PENDING)
+			bus->master_state = ASPEED_I2C_MASTER_INACTIVE;
+		spin_unlock_irqrestore(&bus->lock, flags);
 		return -ETIMEDOUT;
 	}

drivers/i2c/busses/i2c-mt65xx.c+1−1

@@ -875,7 +875,7 @@ static irqreturn_t mtk_i2c_irq(int irqno, void *dev_id) · 874 unmodified lines
875		875
876	static u32 mtk_i2c_functionality(struct i2c_adapter *adap)	876	static u32 mtk_i2c_functionality(struct i2c_adapter *adap)
877	{	877	{
878	if (adap->quirks->flags & I2C_AQ_NO_ZERO_LEN)	878	if (i2c_check_quirks(adap, I2C_AQ_NO_ZERO_LEN))
879	return I2C_FUNC_I2C \|	879	return I2C_FUNC_I2C \|
880	(I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK);	880	(I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK);
881	else	881	else

drivers/i2c/busses/i2c-stm32f7.c+13−8

 	struct regmap *regmap;
 };
-/**
+/*
  * All these values are coming from I2C Specification, Version 6.0, 4th of
  * April 2014.
  *
 			STM32F7_I2C_CR1_TXIE;
 		stm32f7_i2c_set_bits(base + STM32F7_I2C_CR1, mask);
+		/* Write 1st data byte */
+		writel_relaxed(value, base + STM32F7_I2C_TXDR);
 	} else {
 		/* Notify i2c slave that new write transfer is starting */
 		i2c_slave_event(slave, I2C_SLAVE_WRITE_REQUESTED, &value);
 	void __iomem *base = i2c_dev->base;
 	struct device *dev = i2c_dev->dev;
 	struct stm32_i2c_dma *dma = i2c_dev->dma;
-	u32 mask, status;
+	u32 status;
 	status = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR);
 		f7_msg->result = -EINVAL;
 	}
-	/* Disable interrupts */
+	if (!i2c_dev->slave_running) {
-	if (stm32f7_i2c_is_slave_registered(i2c_dev))
+		u32 mask;
-		mask = STM32F7_I2C_XFER_IRQ_MASK;
+		/* Disable interrupts */
-	else
+		if (stm32f7_i2c_is_slave_registered(i2c_dev))
-		mask = STM32F7_I2C_ALL_IRQ_MASK;
+			mask = STM32F7_I2C_XFER_IRQ_MASK;
-	stm32f7_i2c_disable_irq(i2c_dev, mask);
+		else
+			mask = STM32F7_I2C_ALL_IRQ_MASK;
+		stm32f7_i2c_disable_irq(i2c_dev, mask);
+	}
 	/* Disable dma */
 	if (i2c_dev->use_dma) {

drivers/input/misc/da9063_onkey.c+1−4

@@ -232,10 +232,7 @@ static int da9063_onkey_probe(struct platform_device *pdev) · 231 unmodified lines
232	onkey->input->phys = onkey->phys;	232	onkey->input->phys = onkey->phys;
233	onkey->input->dev.parent = &pdev->dev;	233	onkey->input->dev.parent = &pdev->dev;
234		234
235	if (onkey->key_power)	235	input_set_capability(onkey->input, EV_KEY, KEY_POWER);
236	input_set_capability(onkey->input, EV_KEY, KEY_POWER);
237
238	input_set_capability(onkey->input, EV_KEY, KEY_SLEEP);
239		236
240	INIT_DELAYED_WORK(&onkey->work, da9063_poll_on);	237	INIT_DELAYED_WORK(&onkey->work, da9063_poll_on);
241		238

drivers/input/misc/soc_button_array.c+12−5

 			continue;
 		gpio = soc_button_lookup_gpio(&pdev->dev, info->acpi_index);
-		if (gpio < 0 && gpio != -ENOENT) {
+		if (!gpio_is_valid(gpio)) {
-			error = gpio;
+			/*
-			goto err_free_mem;
+			 * Skip GPIO if not present. Note we deliberately
-		} else if (!gpio_is_valid(gpio)) {
+			 * ignore -EPROBE_DEFER errors here. On some devices
-			/* Skip GPIO if not present */
+			 * Intel is using so called virtual GPIOs which are not
+			 * GPIOs at all but some way for AML code to check some
+			 * random status bits without need a custom opregion.
+			 * In some cases the resources table we parse points to
+			 * such a virtual GPIO, since these are not real GPIOs
+			 * we do not have a driver for these so they will never
+			 * show up, therefore we ignore -EPROBE_DEFER.
+			 */
 			continue;
 		}

drivers/input/mouse/elantech.c+29−26

 				  leave_breadcrumbs);
 }
-static bool elantech_use_host_notify(struct psmouse *psmouse,
-				     struct elantech_device_info *info)
-{
-	if (ETP_NEW_IC_SMBUS_HOST_NOTIFY(info->fw_version))
-		return true;
-	switch (info->bus) {
-	case ETP_BUS_PS2_ONLY:
-		/* expected case */
-		break;
-	case ETP_BUS_SMB_HST_NTFY_ONLY:
-	case ETP_BUS_PS2_SMB_HST_NTFY:
-		/* SMbus implementation is stable since 2018 */
-		if (dmi_get_bios_year() >= 2018)
-			return true;
-		/* fall through */
-	default:
-		psmouse_dbg(psmouse,
-			    "Ignoring SMBus bus provider %d\n", info->bus);
-		break;
-	}
-	return false;
-}
 /**
  * elantech_setup_smbus - called once the PS/2 devices are enumerated
  * and decides to instantiate a SMBus InterTouch device.
 		 * i2c_blacklist_pnp_ids.
 		 * Old ICs are up to the user to decide.
 		 */
-		if (!elantech_use_host_notify(psmouse, info) ||
+		if (!ETP_NEW_IC_SMBUS_HOST_NOTIFY(info->fw_version) ||
 		    psmouse_matches_pnp_id(psmouse, i2c_blacklist_pnp_ids))
 			return -ENXIO;
 	}
 	return 0;
 }
+static bool elantech_use_host_notify(struct psmouse *psmouse,
+				     struct elantech_device_info *info)
+{
+	if (ETP_NEW_IC_SMBUS_HOST_NOTIFY(info->fw_version))
+		return true;
+	switch (info->bus) {
+	case ETP_BUS_PS2_ONLY:
+		/* expected case */
+		break;
+	case ETP_BUS_SMB_ALERT_ONLY:
+		/* fall-through  */
+	case ETP_BUS_PS2_SMB_ALERT:
+		psmouse_dbg(psmouse, "Ignoring SMBus provider through alert protocol.\n");
+		break;
+	case ETP_BUS_SMB_HST_NTFY_ONLY:
+		/* fall-through  */
+	case ETP_BUS_PS2_SMB_HST_NTFY:
+		return true;
+	default:
+		psmouse_dbg(psmouse,
+			    "Ignoring SMBus bus provider %d.\n",
+			    info->bus);
+	}
+	return false;
+}
 int elantech_init_smbus(struct psmouse *psmouse)
 {
 	struct elantech_device_info info;

drivers/input/rmi4/rmi_driver.c+5−1

 	}
 	mutex_lock(&data->irq_mutex);
-	bitmap_and(data->irq_status, data->irq_status, data->current_irq_mask,
+	bitmap_and(data->irq_status, data->irq_status, data->fn_irq_bits,
 	       data->irq_count);
 	/*
 	 * At this point, irq_status has all bits that are set in the
 	bitmap_copy(data->current_irq_mask, data->new_irq_mask,
 		    data->num_of_irq_regs);
+	bitmap_or(data->fn_irq_bits, data->fn_irq_bits, mask, data->irq_count);
 error_unlock:
 	mutex_unlock(&data->irq_mutex);
 	return error;
 	struct device *dev = &rmi_dev->dev;
 	mutex_lock(&data->irq_mutex);
+	bitmap_andnot(data->fn_irq_bits,
+		      data->fn_irq_bits, mask, data->irq_count);
 	bitmap_andnot(data->new_irq_mask,
 		  data->current_irq_mask, mask, data->irq_count);

drivers/input/touchscreen/goodix.c+50−8

 	const char *cfg_name;
 	struct completion firmware_loading_complete;
 	unsigned long irq_flags;
+	unsigned int contact_size;
 };
 #define GOODIX_GPIO_INT_NAME		"irq"
 #define GOODIX_MAX_WIDTH		4096
 #define GOODIX_INT_TRIGGER		1
 #define GOODIX_CONTACT_SIZE		8
+#define GOODIX_MAX_CONTACT_SIZE		9
 #define GOODIX_MAX_CONTACTS		10
 #define GOODIX_CONFIG_MAX_LENGTH	240
 	{}
 };
+static const struct dmi_system_id nine_bytes_report[] = {
+#if defined(CONFIG_DMI) && defined(CONFIG_X86)
+	{
+		.ident = "Lenovo YogaBook",
+		/* YB1-X91L/F and YB1-X90L/F */
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "Lenovo YB1-X9")
+		}
+	},
+#endif
+	{}
+};
 /**
  * goodix_i2c_read - read data from a register of the i2c slave device.
  *
 	max_timeout = jiffies + msecs_to_jiffies(GOODIX_BUFFER_STATUS_TIMEOUT);
 	do {
 		error = goodix_i2c_read(ts->client, GOODIX_READ_COOR_ADDR,
-					data, GOODIX_CONTACT_SIZE + 1);
+					data, ts->contact_size + 1);
 		if (error) {
 			dev_err(&ts->client->dev, "I2C transfer error: %d\n",
 					error);
 				return -EPROTO;
 			if (touch_num > 1) {
-				data += 1 + GOODIX_CONTACT_SIZE;
+				data += 1 + ts->contact_size;
 				error = goodix_i2c_read(ts->client,
 						GOODIX_READ_COOR_ADDR +
-							1 + GOODIX_CONTACT_SIZE,
+							1 + ts->contact_size,
 						data,
-						GOODIX_CONTACT_SIZE *
+						ts->contact_size *
 							(touch_num - 1));
 				if (error)
 					return error;
 	return 0;
 }
-static void goodix_ts_report_touch(struct goodix_ts_data *ts, u8 *coor_data)
+static void goodix_ts_report_touch_8b(struct goodix_ts_data *ts, u8 *coor_data)
 {
 	int id = coor_data[0] & 0x0F;
 	int input_x = get_unaligned_le16(&coor_data[1]);
 	input_report_abs(ts->input_dev, ABS_MT_WIDTH_MAJOR, input_w);
 }
+static void goodix_ts_report_touch_9b(struct goodix_ts_data *ts, u8 *coor_data)
+{
+	int id = coor_data[1] & 0x0F;
+	int input_x = get_unaligned_le16(&coor_data[3]);
+	int input_y = get_unaligned_le16(&coor_data[5]);
+	int input_w = get_unaligned_le16(&coor_data[7]);
+	input_mt_slot(ts->input_dev, id);
+	input_mt_report_slot_state(ts->input_dev, MT_TOOL_FINGER, true);
+	touchscreen_report_pos(ts->input_dev, &ts->prop,
+			       input_x, input_y, true);
+	input_report_abs(ts->input_dev, ABS_MT_TOUCH_MAJOR, input_w);
+	input_report_abs(ts->input_dev, ABS_MT_WIDTH_MAJOR, input_w);
+}
 /**
  * goodix_process_events - Process incoming events
  *
  */
 static void goodix_process_events(struct goodix_ts_data *ts)
 {
-	u8  point_data[1 + GOODIX_CONTACT_SIZE * GOODIX_MAX_CONTACTS];
+	u8  point_data[1 + GOODIX_MAX_CONTACT_SIZE * GOODIX_MAX_CONTACTS];
 	int touch_num;
 	int i;
 	input_report_key(ts->input_dev, KEY_LEFTMETA, point_data[0] & BIT(4));
 	for (i = 0; i < touch_num; i++)
-		goodix_ts_report_touch(ts,
+		if (ts->contact_size == 9)
-				&point_data[1 + GOODIX_CONTACT_SIZE * i]);
+			goodix_ts_report_touch_9b(ts,
+				&point_data[1 + ts->contact_size * i]);
+		else
+			goodix_ts_report_touch_8b(ts,
+				&point_data[1 + ts->contact_size * i]);
 	input_mt_sync_frame(ts->input_dev);
 	input_sync(ts->input_dev);
 			"Applying '180 degrees rotated screen' quirk\n");
 	}
+	if (dmi_check_system(nine_bytes_report)) {
+		ts->contact_size = 9;
+		dev_dbg(&ts->client->dev,
+			"Non-standard 9-bytes report format quirk\n");
+	}
 	error = input_mt_init_slots(ts->input_dev, ts->max_touch_num,
 				    INPUT_MT_DIRECT | INPUT_MT_DROP_UNUSED);
 	if (error) {
 	ts->client = client;
 	i2c_set_clientdata(client, ts);
 	init_completion(&ts->firmware_loading_complete);
+	ts->contact_size = GOODIX_CONTACT_SIZE;
 	error = goodix_get_gpio_config(ts);
 	if (error)

drivers/input/touchscreen/st1232.c+4−2

 	for (i = 0, y = 0; i < ts->chip_info->max_fingers; i++, y += 3) {
 		finger[i].is_valid = buf[i + y] >> 7;
 		if (finger[i].is_valid) {
-			finger[i].x = ((buf[i + y] & 0x0070) << 4) | buf[i + 1];
+			finger[i].x = ((buf[i + y] & 0x0070) << 4) |
-			finger[i].y = ((buf[i + y] & 0x0007) << 8) | buf[i + 2];
+					buf[i + y + 1];
+			finger[i].y = ((buf[i + y] & 0x0007) << 8) |
+					buf[i + y + 2];
 			/* st1232 includes a z-axis / touch strength */
 			if (ts->chip_info->have_z)

drivers/iommu/amd_iommu.c+7−5

 retry:
 	type    = (event[1] >> EVENT_TYPE_SHIFT)  & EVENT_TYPE_MASK;
 	devid   = (event[0] >> EVENT_DEVID_SHIFT) & EVENT_DEVID_MASK;
-	pasid   = PPR_PASID(*(u64 *)&event[0]);
+	pasid   = (event[0] & EVENT_DOMID_MASK_HI) |
+		  (event[1] & EVENT_DOMID_MASK_LO);
 	flags   = (event[1] >> EVENT_FLAGS_SHIFT) & EVENT_FLAGS_MASK;
 	address = (u64)(((u64)event[3]) << 32) | event[2];
 			address, flags);
 		break;
 	case EVENT_TYPE_PAGE_TAB_ERR:
-		dev_err(dev, "Event logged [PAGE_TAB_HARDWARE_ERROR device=%02x:%02x.%x domain=0x%04x address=0x%llx flags=0x%04x]\n",
+		dev_err(dev, "Event logged [PAGE_TAB_HARDWARE_ERROR device=%02x:%02x.%x pasid=0x%04x address=0x%llx flags=0x%04x]\n",
 			PCI_BUS_NUM(devid), PCI_SLOT(devid), PCI_FUNC(devid),
 			pasid, address, flags);
 		break;
  * to 64 bits.
  */
 static bool increase_address_space(struct protection_domain *domain,
+				   unsigned long address,
 				   gfp_t gfp)
 {
 	unsigned long flags;
 	spin_lock_irqsave(&domain->lock, flags);
-	if (WARN_ON_ONCE(domain->mode == PAGE_MODE_6_LEVEL))
+	if (address <= PM_LEVEL_SIZE(domain->mode) ||
-		/* address space already 64 bit large */
+	    WARN_ON_ONCE(domain->mode == PAGE_MODE_6_LEVEL))
 		goto out;
 	pte = (void *)get_zeroed_page(gfp);
 	BUG_ON(!is_power_of_2(page_size));
 	while (address > PM_LEVEL_SIZE(domain->mode))
-		*updated = increase_address_space(domain, gfp) || *updated;
+		*updated = increase_address_space(domain, address, gfp) || *updated;
 	level   = domain->mode - 1;
 	pte     = &domain->pt_root[PM_LEVEL_INDEX(level, address)];

drivers/iommu/amd_iommu_types.h+2−2

@@ -130,8 +130,8 @@ · 129 unmodified lines
130	#define EVENT_TYPE_INV_PPR_REQ 0x9	130	#define EVENT_TYPE_INV_PPR_REQ 0x9
131	#define EVENT_DEVID_MASK 0xffff	131	#define EVENT_DEVID_MASK 0xffff
132	#define EVENT_DEVID_SHIFT 0	132	#define EVENT_DEVID_SHIFT 0
133	#define EVENT_DOMID_MASK 0xffff	133	#define EVENT_DOMID_MASK_LO 0xffff
134	#define EVENT_DOMID_SHIFT 0	134	#define EVENT_DOMID_MASK_HI 0xf0000
135	#define EVENT_FLAGS_MASK 0xfff	135	#define EVENT_FLAGS_MASK 0xfff
136	#define EVENT_FLAGS_SHIFT 0x10	136	#define EVENT_FLAGS_SHIFT 0x10
137		137

drivers/iommu/arm-smmu.c+1−0

@@ -812,6 +812,7 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain, · 811 unmodified lines
812	return 0;	812	return 0;
813		813
814	out_clear_smmu:	814	out_clear_smmu:
		815	__arm_smmu_free_bitmap(smmu->context_map, cfg->cbndx);
815	smmu_domain->smmu = NULL;	816	smmu_domain->smmu = NULL;
816	out_unlock:	817	out_unlock:
817	mutex_unlock(&smmu_domain->init_mutex);	818	mutex_unlock(&smmu_domain->init_mutex);

drivers/iommu/intel-iommu.c+9−1

 		if (dev->coherent_dma_mask && dev->coherent_dma_mask < dma_mask)
 			dma_mask = dev->coherent_dma_mask;
-		if (dma_mask >= dma_get_required_mask(dev))
+		if (dma_mask >= dma_direct_get_required_mask(dev))
 			return false;
 		/*
 	return nelems;
 }
+static u64 intel_get_required_mask(struct device *dev)
+{
+	if (!iommu_need_mapping(dev))
+		return dma_direct_get_required_mask(dev);
+	return DMA_BIT_MASK(32);
+}
 static const struct dma_map_ops intel_dma_ops = {
 	.alloc = intel_alloc_coherent,
 	.free = intel_free_coherent,
 	.dma_supported = dma_direct_supported,
 	.mmap = dma_common_mmap,
 	.get_sgtable = dma_common_get_sgtable,
+	.get_required_mask = intel_get_required_mask,
 };
 static void

drivers/iommu/io-pgtable-arm.c+45−13

@@ -166,6 +166,9 @@ · 165 unmodified lines
166	#define ARM_MALI_LPAE_TTBR_READ_INNER BIT(2)	166	#define ARM_MALI_LPAE_TTBR_READ_INNER BIT(2)
167	#define ARM_MALI_LPAE_TTBR_SHARE_OUTER BIT(4)	167	#define ARM_MALI_LPAE_TTBR_SHARE_OUTER BIT(4)
168		168
		169	#define ARM_MALI_LPAE_MEMATTR_IMP_DEF 0x88ULL
		170	#define ARM_MALI_LPAE_MEMATTR_WRITE_ALLOC 0x8DULL
		171
169	/* IOPTE accessors */	172	/* IOPTE accessors */
170	#define iopte_deref(pte,d) __va(iopte_to_paddr(pte, d))	173	#define iopte_deref(pte,d) __va(iopte_to_paddr(pte, d))
171		174
@@ -1015,27 +1018,56 @@ arm_32_lpae_alloc_pgtable_s2(struct io_pgtable_cfg cfg, void cookie) · 843 unmodified lines
1015	static struct io_pgtable *	1018	static struct io_pgtable *
1016	arm_mali_lpae_alloc_pgtable(struct io_pgtable_cfg cfg, void cookie)	1019	arm_mali_lpae_alloc_pgtable(struct io_pgtable_cfg cfg, void cookie)
1017	{	1020	{
1018	struct io_pgtable *iop;	1021	struct arm_lpae_io_pgtable *data;
1019		1022
1020	if (cfg->ias != 48 \|\| cfg->oas > 40)	1023	/* No quirks for Mali (hopefully) */
		1024	if (cfg->quirks)
		1025	return NULL;
		1026
		1027	if (cfg->ias > 48 \|\| cfg->oas > 40)
1021	return NULL;	1028	return NULL;
1022		1029
1023	cfg->pgsize_bitmap &= (SZ_4K \| SZ_2M \| SZ_1G);	1030	cfg->pgsize_bitmap &= (SZ_4K \| SZ_2M \| SZ_1G);
1024	iop = arm_64_lpae_alloc_pgtable_s1(cfg, cookie);
1025	if (iop) {
1026	u64 mair, ttbr;
1027		1031
1028	/* Copy values as union fields overlap */	1032	data = arm_lpae_alloc_pgtable(cfg);
1029	mair = cfg->arm_lpae_s1_cfg.mair[0];	1033	if (!data)
1030	ttbr = cfg->arm_lpae_s1_cfg.ttbr[0];	1034	return NULL;
1031		1035
1032	cfg->arm_mali_lpae_cfg.memattr = mair;	1036	/* Mali seems to need a full 4-level table regardless of IAS */
1033	cfg->arm_mali_lpae_cfg.transtab = ttbr \|	1037	if (data->levels < ARM_LPAE_MAX_LEVELS) {
1034	ARM_MALI_LPAE_TTBR_READ_INNER \|	1038	data->levels = ARM_LPAE_MAX_LEVELS;
1035	ARM_MALI_LPAE_TTBR_ADRMODE_TABLE;	1039	data->pgd_size = sizeof(arm_lpae_iopte);
1036	}	1040	}
		1041	/*
		1042	* MEMATTR: Mali has no actual notion of a non-cacheable type, so the
		1043	* best we can do is mimic the out-of-tree driver and hope that the
		1044	* "implementation-defined caching policy" is good enough. Similarly,
		1045	* we'll use it for the sake of a valid attribute for our 'device'
		1046	* index, although callers should never request that in practice.
		1047	*/
		1048	cfg->arm_mali_lpae_cfg.memattr =
		1049	(ARM_MALI_LPAE_MEMATTR_IMP_DEF
		1050	<< ARM_LPAE_MAIR_ATTR_SHIFT(ARM_LPAE_MAIR_ATTR_IDX_NC)) \|
		1051	(ARM_MALI_LPAE_MEMATTR_WRITE_ALLOC
		1052	<< ARM_LPAE_MAIR_ATTR_SHIFT(ARM_LPAE_MAIR_ATTR_IDX_CACHE)) \|
		1053	(ARM_MALI_LPAE_MEMATTR_IMP_DEF
		1054	<< ARM_LPAE_MAIR_ATTR_SHIFT(ARM_LPAE_MAIR_ATTR_IDX_DEV));
1037		1055
1038	return iop;	1056	data->pgd = __arm_lpae_alloc_pages(data->pgd_size, GFP_KERNEL, cfg);
		1057	if (!data->pgd)
		1058	goto out_free_data;
		1059
		1060	/* Ensure the empty pgd is visible before TRANSTAB can be written */
		1061	wmb();
		1062
		1063	cfg->arm_mali_lpae_cfg.transtab = virt_to_phys(data->pgd) \|
		1064	ARM_MALI_LPAE_TTBR_READ_INNER \|
		1065	ARM_MALI_LPAE_TTBR_ADRMODE_TABLE;
		1066	return &data->iop;
		1067
		1068	out_free_data:
		1069	kfree(data);
		1070	return NULL;
1039	}	1071	}
1040		1072
1041	struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s1_init_fns = {	1073	struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s1_init_fns = {

drivers/iommu/ipmmu-vmsa.c+1−2

 	mmu->num_ctx = min(IPMMU_CTX_MAX, mmu->features->number_of_contexts);
-	irq = platform_get_irq(pdev, 0);
 	/*
 	 * Determine if this IPMMU instance is a root device by checking for
 	 * the lack of has_cache_leaf_nodes flag or renesas,ipmmu-main property.
 	/* Root devices have mandatory IRQs */
 	if (ipmmu_is_root(mmu)) {
+		irq = platform_get_irq(pdev, 0);
 		if (irq < 0) {
 			dev_err(&pdev->dev, "no IRQ found\n");
 			return irq;

drivers/iommu/rockchip-iommu.c+14−5

 	struct device *dev;
 	void __iomem **bases;
 	int num_mmu;
+	int num_irq;
 	struct clk_bulk_data *clocks;
 	int num_clocks;
 	bool reset_disabled;
 	struct rk_iommu *iommu;
 	struct resource *res;
 	int num_res = pdev->num_resources;
-	int err, i, irq;
+	int err, i;
 	iommu = devm_kzalloc(dev, sizeof(*iommu), GFP_KERNEL);
 	if (!iommu)
 	if (iommu->num_mmu == 0)
 		return PTR_ERR(iommu->bases[0]);
+	iommu->num_irq = platform_irq_count(pdev);
+	if (iommu->num_irq < 0)
+		return iommu->num_irq;
 	iommu->reset_disabled = device_property_read_bool(dev,
 					"rockchip,disable-mmu-reset");
 	pm_runtime_enable(dev);
-	i = 0;
+	for (i = 0; i < iommu->num_irq; i++) {
-	while ((irq = platform_get_irq(pdev, i++)) != -ENXIO) {
+		int irq = platform_get_irq(pdev, i);
 		if (irq < 0)
 			return irq;
 static void rk_iommu_shutdown(struct platform_device *pdev)
 {
 	struct rk_iommu *iommu = platform_get_drvdata(pdev);
-	int i = 0, irq;
+	int i;
+	for (i = 0; i < iommu->num_irq; i++) {
+		int irq = platform_get_irq(pdev, i);
-	while ((irq = platform_get_irq(pdev, i++)) != -ENXIO)
 		devm_free_irq(iommu->dev, irq, iommu);
+	}
 	pm_runtime_force_suspend(&pdev->dev);
 }

drivers/irqchip/irq-al-fic.c+12−0

 /* FIC Registers */
 #define AL_FIC_CAUSE		0x00
+#define AL_FIC_SET_CAUSE	0x08
 #define AL_FIC_MASK		0x10
 #define AL_FIC_CONTROL		0x28
 	chained_irq_exit(irqchip, desc);
 }
+static int al_fic_irq_retrigger(struct irq_data *data)
+{
+	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data);
+	struct al_fic *fic = gc->private;
+	writel_relaxed(BIT(data->hwirq), fic->base + AL_FIC_SET_CAUSE);
+	return 1;
+}
 static int al_fic_register(struct device_node *node,
 			   struct al_fic *fic)
 {
 	gc->chip_types->chip.irq_unmask = irq_gc_mask_clr_bit;
 	gc->chip_types->chip.irq_ack = irq_gc_ack_clr_bit;
 	gc->chip_types->chip.irq_set_type = al_fic_irq_set_type;
+	gc->chip_types->chip.irq_retrigger = al_fic_irq_retrigger;
 	gc->chip_types->chip.flags = IRQCHIP_SKIP_SET_WAKE;
 	gc->private = fic;

drivers/irqchip/irq-atmel-aic5.c+10−0

@@ -313,6 +313,7 @@ static void __init sama5d3_aic_irq_fixup(void) · 312 unmodified lines
313	static const struct of_device_id aic5_irq_fixups[] __initconst = {	313	static const struct of_device_id aic5_irq_fixups[] __initconst = {
314	{ .compatible = "atmel,sama5d3", .data = sama5d3_aic_irq_fixup },	314	{ .compatible = "atmel,sama5d3", .data = sama5d3_aic_irq_fixup },
315	{ .compatible = "atmel,sama5d4", .data = sama5d3_aic_irq_fixup },	315	{ .compatible = "atmel,sama5d4", .data = sama5d3_aic_irq_fixup },
		316	{ .compatible = "microchip,sam9x60", .data = sama5d3_aic_irq_fixup },
316	{ /* sentinel */ },	317	{ /* sentinel */ },
317	};	318	};
318		319
@@ -390,3 +391,12 @@ static int __init sama5d4_aic5_of_init(struct device_node *node, · 71 unmodified lines
390	return aic5_of_init(node, parent, NR_SAMA5D4_IRQS);	391	return aic5_of_init(node, parent, NR_SAMA5D4_IRQS);
391	}	392	}
392	IRQCHIP_DECLARE(sama5d4_aic5, "atmel,sama5d4-aic", sama5d4_aic5_of_init);	393	IRQCHIP_DECLARE(sama5d4_aic5, "atmel,sama5d4-aic", sama5d4_aic5_of_init);
		394
		395	#define NR_SAM9X60_IRQS 50
		396
		397	static int __init sam9x60_aic5_of_init(struct device_node *node,
		398	struct device_node *parent)
		399	{
		400	return aic5_of_init(node, parent, NR_SAM9X60_IRQS);
		401	}
		402	IRQCHIP_DECLARE(sam9x60_aic5, "microchip,sam9x60-aic", sam9x60_aic5_of_init);

drivers/irqchip/irq-gic-v3-its.c+18−3

 #define gic_data_rdist_rd_base()	(gic_data_rdist()->rd_base)
 #define gic_data_rdist_vlpi_base()	(gic_data_rdist_rd_base() + SZ_128K)
+static u16 get_its_list(struct its_vm *vm)
+{
+	struct its_node *its;
+	unsigned long its_list = 0;
+	list_for_each_entry(its, &its_nodes, entry) {
+		if (!its->is_v4)
+			continue;
+		if (vm->vlpi_count[its->list_nr])
+			__set_bit(its->list_nr, &its_list);
+	}
+	return (u16)its_list;
+}
 static struct its_collection *dev_event_to_col(struct its_device *its_dev,
 					       u32 event)
 {
 static void its_send_vmovp(struct its_vpe *vpe)
 {
-	struct its_cmd_desc desc;
+	struct its_cmd_desc desc = {};
 	struct its_node *its;
 	unsigned long flags;
 	int col_id = vpe->col_idx;
 	desc.its_vmovp_cmd.vpe = vpe;
-	desc.its_vmovp_cmd.its_list = (u16)its_list_map;
 	if (!its_list_map) {
 		its = list_first_entry(&its_nodes, struct its_node, entry);
-		desc.its_vmovp_cmd.seq_num = 0;
 		desc.its_vmovp_cmd.col = &its->collections[col_id];
 		its_send_single_vcommand(its, its_build_vmovp_cmd, &desc);
 		return;
 	raw_spin_lock_irqsave(&vmovp_lock, flags);
 	desc.its_vmovp_cmd.seq_num = vmovp_seq_num++;
+	desc.its_vmovp_cmd.its_list = get_its_list(vpe->its_vm);
 	/* Emit VMOVPs */
 	list_for_each_entry(its, &its_nodes, entry) {

drivers/irqchip/irq-gic-v3.c+1−1

@@ -59,7 +59,7 @@ static struct gic_chip_data gic_data __read_mostly; · 58 unmodified lines
59	static DEFINE_STATIC_KEY_TRUE(supports_deactivate_key);	59	static DEFINE_STATIC_KEY_TRUE(supports_deactivate_key);
60		60
61	#define GIC_ID_NR (1U << GICD_TYPER_ID_BITS(gic_data.rdists.gicd_typer))	61	#define GIC_ID_NR (1U << GICD_TYPER_ID_BITS(gic_data.rdists.gicd_typer))
62	#define GIC_LINE_NR max(GICD_TYPER_SPIS(gic_data.rdists.gicd_typer), 1020U)	62	#define GIC_LINE_NR min(GICD_TYPER_SPIS(gic_data.rdists.gicd_typer), 1020U)
63	#define GIC_ESPI_NR GICD_TYPER_ESPIS(gic_data.rdists.gicd_typer)	63	#define GIC_ESPI_NR GICD_TYPER_ESPIS(gic_data.rdists.gicd_typer)
64		64
65	/*	65	/*

drivers/irqchip/irq-sifive-plic.c+17−16

 	}
 }
-static void plic_irq_enable(struct irq_data *d)
+static void plic_irq_unmask(struct irq_data *d)
 {
 	unsigned int cpu = cpumask_any_and(irq_data_get_affinity_mask(d),
 					   cpu_online_mask);
 	plic_irq_toggle(cpumask_of(cpu), d->hwirq, 1);
 }
-static void plic_irq_disable(struct irq_data *d)
+static void plic_irq_mask(struct irq_data *d)
 {
 	plic_irq_toggle(cpu_possible_mask, d->hwirq, 0);
 }
 	if (cpu >= nr_cpu_ids)
 		return -EINVAL;
-	if (!irqd_irq_disabled(d)) {
+	plic_irq_toggle(cpu_possible_mask, d->hwirq, 0);
-		plic_irq_toggle(cpu_possible_mask, d->hwirq, 0);
+	plic_irq_toggle(cpumask_of(cpu), d->hwirq, 1);
-		plic_irq_toggle(cpumask_of(cpu), d->hwirq, 1);
-	}
 	irq_data_update_effective_affinity(d, cpumask_of(cpu));
 }
 #endif
+static void plic_irq_eoi(struct irq_data *d)
+{
+	struct plic_handler *handler = this_cpu_ptr(&plic_handlers);
+	writel(d->hwirq, handler->hart_base + CONTEXT_CLAIM);
+}
 static struct irq_chip plic_chip = {
 	.name		= "SiFive PLIC",
-	/*
+	.irq_mask	= plic_irq_mask,
-	 * There is no need to mask/unmask PLIC interrupts.  They are "masked"
+	.irq_unmask	= plic_irq_unmask,
-	 * by reading claim and "unmasked" when writing it back.
+	.irq_eoi	= plic_irq_eoi,
-	 */
-	.irq_enable	= plic_irq_enable,
-	.irq_disable	= plic_irq_disable,
 #ifdef CONFIG_SMP
 	.irq_set_affinity = plic_set_affinity,
 #endif
 static int plic_irqdomain_map(struct irq_domain *d, unsigned int irq,
 			      irq_hw_number_t hwirq)
 {
-	irq_set_chip_and_handler(irq, &plic_chip, handle_simple_irq);
+	irq_set_chip_and_handler(irq, &plic_chip, handle_fasteoi_irq);
 	irq_set_chip_data(irq, NULL);
 	irq_set_noprobe(irq);
 	return 0;
 					hwirq);
 		else
 			generic_handle_irq(irq);
-		writel(hwirq, claim);
 	}
 	csr_set(sie, SIE_SEIE);
 }
 			continue;
 		}
-		/* skip context holes */
+		/* skip contexts other than supervisor external interrupt */
-		if (parent.args[0] == -1)
+		if (parent.args[0] != IRQ_S_EXT)
 			continue;
 		hartid = plic_find_hart_id(parent.np);

drivers/macintosh/windfarm_cpufreq_clamp.c+22−16

@@ -18,7 +18,7 @@ · 17 unmodified lines
18		18
19	static int clamped;	19	static int clamped;
20	static struct wf_control *clamp_control;	20	static struct wf_control *clamp_control;
21	static struct dev_pm_qos_request qos_req;	21	static struct freq_qos_request qos_req;
22	static unsigned int min_freq, max_freq;	22	static unsigned int min_freq, max_freq;
23		23
24	static int clamp_set(struct wf_control *ct, s32 value)	24	static int clamp_set(struct wf_control *ct, s32 value)
@@ -35,7 +35,7 @@ static int clamp_set(struct wf_control *ct, s32 value) · 10 unmodified lines
35	}	35	}
36	clamped = value;	36	clamped = value;
37		37
38	return dev_pm_qos_update_request(&qos_req, freq);	38	return freq_qos_update_request(&qos_req, freq);
39	}	39	}
40		40
41	static int clamp_get(struct wf_control ct, s32 value)	41	static int clamp_get(struct wf_control ct, s32 value)
@@ -77,38 +77,44 @@ static int __init wf_cpufreq_clamp_init(void) · 35 unmodified lines
77		77
78	min_freq = policy->cpuinfo.min_freq;	78	min_freq = policy->cpuinfo.min_freq;
79	max_freq = policy->cpuinfo.max_freq;	79	max_freq = policy->cpuinfo.max_freq;
		80
		81	ret = freq_qos_add_request(&policy->constraints, &qos_req, FREQ_QOS_MAX,
		82	max_freq);
		83
80	cpufreq_cpu_put(policy);	84	cpufreq_cpu_put(policy);
81		85
		86	if (ret < 0) {
		87	pr_err("%s: Failed to add freq constraint (%d)\n", __func__,
		88	ret);
		89	return ret;
		90	}
		91
82	dev = get_cpu_device(0);	92	dev = get_cpu_device(0);
83	if (unlikely(!dev)) {	93	if (unlikely(!dev)) {
84	pr_warn("%s: No cpu device for cpu0\n", __func__);	94	pr_warn("%s: No cpu device for cpu0\n", __func__);
85	return -ENODEV;	95	ret = -ENODEV;
		96	goto fail;
86	}	97	}
87		98
88	clamp = kmalloc(sizeof(struct wf_control), GFP_KERNEL);	99	clamp = kmalloc(sizeof(struct wf_control), GFP_KERNEL);
89	if (clamp == NULL)	100	if (clamp == NULL) {
90	return -ENOMEM;	101	ret = -ENOMEM;
91		102	goto fail;
92	ret = dev_pm_qos_add_request(dev, &qos_req, DEV_PM_QOS_MAX_FREQUENCY,
93	max_freq);
94	if (ret < 0) {
95	pr_err("%s: Failed to add freq constraint (%d)\n", __func__,
96	ret);
97	goto free;
98	}	103	}
99		104
100	clamp->ops = &clamp_ops;	105	clamp->ops = &clamp_ops;
101	clamp->name = "cpufreq-clamp";	106	clamp->name = "cpufreq-clamp";
102	ret = wf_register_control(clamp);	107	ret = wf_register_control(clamp);
103	if (ret)	108	if (ret)
104	goto fail;	109	goto free;
		110
105	clamp_control = clamp;	111	clamp_control = clamp;
106	return 0;	112	return 0;
107	fail:
108	dev_pm_qos_remove_request(&qos_req);
109		113
110	free:	114	free:
111	kfree(clamp);	115	kfree(clamp);
		116	fail:
		117	freq_qos_remove_request(&qos_req);
112	return ret;	118	return ret;
113	}	119	}
114		120
@@ -116,7 +122,7 @@ static void __exit wf_cpufreq_clamp_exit(void) · 1 unmodified line
116	{	122	{
117	if (clamp_control) {	123	if (clamp_control) {
118	wf_unregister_control(clamp_control);	124	wf_unregister_control(clamp_control);
119	dev_pm_qos_remove_request(&qos_req);	125	freq_qos_remove_request(&qos_req);
120	}	126	}
121	}	127	}
122		128

drivers/md/dm-cache-target.c+2−26

 static struct dm_bio_prison_cell_v2 *alloc_prison_cell(struct cache *cache)
 {
-	return dm_bio_prison_alloc_cell_v2(cache->prison, GFP_NOWAIT);
+	return dm_bio_prison_alloc_cell_v2(cache->prison, GFP_NOIO);
 }
 static void free_prison_cell(struct cache *cache, struct dm_bio_prison_cell_v2 *cell)
 {
 	struct dm_cache_migration *mg;
-	mg = mempool_alloc(&cache->migration_pool, GFP_NOWAIT);
+	mg = mempool_alloc(&cache->migration_pool, GFP_NOIO);
-	if (!mg)
-		return NULL;
 	memset(mg, 0, sizeof(*mg));
 	struct dm_bio_prison_cell_v2 *cell_prealloc, *cell;
 	cell_prealloc = alloc_prison_cell(cache); /* FIXME: allow wait if calling from worker */
-	if (!cell_prealloc) {
-		defer_bio(cache, bio);
-		return false;
-	}
 	build_key(oblock, end, &key);
 	r = dm_cell_get_v2(cache->prison, &key, lock_level(bio), bio, cell_prealloc, &cell);
 	struct dm_bio_prison_cell_v2 *prealloc;
 	prealloc = alloc_prison_cell(cache);
-	if (!prealloc) {
-		DMERR_LIMIT("%s: alloc_prison_cell failed", cache_device_name(cache));
-		mg_complete(mg, false);
-		return -ENOMEM;
-	}
 	/*
 	 * Prevent writes to the block, but allow reads to continue.
 	}
 	mg = alloc_migration(cache);
-	if (!mg) {
-		policy_complete_background_work(cache->policy, op, false);
-		background_work_end(cache);
-		return -ENOMEM;
-	}
 	mg->op = op;
 	mg->overwrite_bio = bio;
 	struct dm_bio_prison_cell_v2 *prealloc;
 	prealloc = alloc_prison_cell(cache);
-	if (!prealloc) {
-		invalidate_complete(mg, false);
-		return -ENOMEM;
-	}
 	build_key(mg->invalidate_oblock, oblock_succ(mg->invalidate_oblock), &key);
 	r = dm_cell_lock_v2(cache->prison, &key,
 		return -EPERM;
 	mg = alloc_migration(cache);
-	if (!mg) {
-		background_work_end(cache);
-		return -ENOMEM;
-	}
 	mg->overwrite_bio = bio;
 	mg->invalidate_cblock = cblock;

drivers/md/dm-clone-target.c+2−2

@@ -591,8 +591,8 @@ static struct hash_table_bucket get_hash_table_bucket(struct clone clone, · 590 unmodified lines
591	*	591	*
592	* NOTE: Must be called with the bucket lock held	592	* NOTE: Must be called with the bucket lock held
593	*/	593	*/
594	struct dm_clone_region_hydration __hash_find(struct hash_table_bucket bucket,	594	static struct dm_clone_region_hydration __hash_find(struct hash_table_bucket bucket,
595	unsigned long region_nr)	595	unsigned long region_nr)
596	{	596	{
597	struct dm_clone_region_hydration *hd;	597	struct dm_clone_region_hydration *hd;
598		598

drivers/md/dm-snap.c+77−17

 #include <linux/vmalloc.h>
 #include <linux/log2.h>
 #include <linux/dm-kcopyd.h>
-#include <linux/semaphore.h>
 #include "dm.h"
 	/* The on disk metadata handler */
 	struct dm_exception_store *store;
-	/* Maximum number of in-flight COW jobs. */
+	unsigned in_progress;
-	struct semaphore cow_count;
+	struct wait_queue_head in_progress_wait;
 	struct dm_kcopyd_client *kcopyd_client;
  */
 #define DEFAULT_COW_THRESHOLD 2048
-static int cow_threshold = DEFAULT_COW_THRESHOLD;
+static unsigned cow_threshold = DEFAULT_COW_THRESHOLD;
-module_param_named(snapshot_cow_threshold, cow_threshold, int, 0644);
+module_param_named(snapshot_cow_threshold, cow_threshold, uint, 0644);
 MODULE_PARM_DESC(snapshot_cow_threshold, "Maximum number of chunks being copied on write");
 DECLARE_DM_KCOPYD_THROTTLE_WITH_MODULE_PARM(snapshot_copy_throttle,
 		goto bad_hash_tables;
 	}
-	sema_init(&s->cow_count, (cow_threshold > 0) ? cow_threshold : INT_MAX);
+	init_waitqueue_head(&s->in_progress_wait);
 	s->kcopyd_client = dm_kcopyd_client_create(&dm_kcopyd_throttle);
 	if (IS_ERR(s->kcopyd_client)) {
 	dm_put_device(ti, s->origin);
+	WARN_ON(s->in_progress);
 	kfree(s);
 }
+static void account_start_copy(struct dm_snapshot *s)
+{
+	spin_lock(&s->in_progress_wait.lock);
+	s->in_progress++;
+	spin_unlock(&s->in_progress_wait.lock);
+}
+static void account_end_copy(struct dm_snapshot *s)
+{
+	spin_lock(&s->in_progress_wait.lock);
+	BUG_ON(!s->in_progress);
+	s->in_progress--;
+	if (likely(s->in_progress <= cow_threshold) &&
+	    unlikely(waitqueue_active(&s->in_progress_wait)))
+		wake_up_locked(&s->in_progress_wait);
+	spin_unlock(&s->in_progress_wait.lock);
+}
+static bool wait_for_in_progress(struct dm_snapshot *s, bool unlock_origins)
+{
+	if (unlikely(s->in_progress > cow_threshold)) {
+		spin_lock(&s->in_progress_wait.lock);
+		if (likely(s->in_progress > cow_threshold)) {
+			/*
+			 * NOTE: this throttle doesn't account for whether
+			 * the caller is servicing an IO that will trigger a COW
+			 * so excess throttling may result for chunks not required
+			 * to be COW'd.  But if cow_threshold was reached, extra
+			 * throttling is unlikely to negatively impact performance.
+			 */
+			DECLARE_WAITQUEUE(wait, current);
+			__add_wait_queue(&s->in_progress_wait, &wait);
+			__set_current_state(TASK_UNINTERRUPTIBLE);
+			spin_unlock(&s->in_progress_wait.lock);
+			if (unlock_origins)
+				up_read(&_origins_lock);
+			io_schedule();
+			remove_wait_queue(&s->in_progress_wait, &wait);
+			return false;
+		}
+		spin_unlock(&s->in_progress_wait.lock);
+	}
+	return true;
+}
 /*
  * Flush a list of buffers.
  */
 	}
 }
-static int do_origin(struct dm_dev *origin, struct bio *bio);
+static int do_origin(struct dm_dev *origin, struct bio *bio, bool limit);
 /*
  * Flush a list of buffers.
 	while (bio) {
 		n = bio->bi_next;
 		bio->bi_next = NULL;
-		r = do_origin(s->origin, bio);
+		r = do_origin(s->origin, bio, false);
 		if (r == DM_MAPIO_REMAPPED)
 			generic_make_request(bio);
 		bio = n;
 		rb_link_node(&pe->out_of_order_node, parent, p);
 		rb_insert_color(&pe->out_of_order_node, &s->out_of_order_tree);
 	}
-	up(&s->cow_count);
+	account_end_copy(s);
 }
 /*
 	dest.count = src.count;
 	/* Hand over to kcopyd */
-	down(&s->cow_count);
+	account_start_copy(s);
 	dm_kcopyd_copy(s->kcopyd_client, &src, 1, &dest, 0, copy_callback, pe);
 }
 	pe->full_bio = bio;
 	pe->full_bio_end_io = bio->bi_end_io;
-	down(&s->cow_count);
+	account_start_copy(s);
 	callback_data = dm_kcopyd_prepare_callback(s->kcopyd_client,
 						   copy_callback, pe);
 	struct bio *bio = context;
 	struct dm_snapshot *s = bio->bi_private;
-	up(&s->cow_count);
+	account_end_copy(s);
 	bio->bi_status = write_err ? BLK_STS_IOERR : 0;
 	bio_endio(bio);
 }
 	dest.sector = bio->bi_iter.bi_sector;
 	dest.count = s->store->chunk_size;
-	down(&s->cow_count);
+	account_start_copy(s);
 	WARN_ON_ONCE(bio->bi_private);
 	bio->bi_private = s;
 	dm_kcopyd_zero(s->kcopyd_client, 1, &dest, 0, zero_callback, bio);
 	if (!s->valid)
 		return DM_MAPIO_KILL;
+	if (bio_data_dir(bio) == WRITE) {
+		while (unlikely(!wait_for_in_progress(s, false)))
+			; /* wait_for_in_progress() has slept */
+	}
 	down_read(&s->lock);
 	dm_exception_table_lock(&lock);
 	if (bio_data_dir(bio) == WRITE) {
 		up_write(&s->lock);
-		return do_origin(s->origin, bio);
+		return do_origin(s->origin, bio, false);
 	}
 out_unlock:
 /*
  * Called on a write from the origin driver.
  */
-static int do_origin(struct dm_dev *origin, struct bio *bio)
+static int do_origin(struct dm_dev *origin, struct bio *bio, bool limit)
 {
 	struct origin *o;
 	int r = DM_MAPIO_REMAPPED;
+again:
 	down_read(&_origins_lock);
 	o = __lookup_origin(origin->bdev);
-	if (o)
+	if (o) {
+		if (limit) {
+			struct dm_snapshot *s;
+			list_for_each_entry(s, &o->snapshots, list)
+				if (unlikely(!wait_for_in_progress(s, true)))
+					goto again;
+		}
 		r = __origin_write(&o->snapshots, bio->bi_iter.bi_sector, bio);
+	}
 	up_read(&_origins_lock);
 	return r;
 		dm_accept_partial_bio(bio, available_sectors);
 	/* Only tell snapshots if this is a write */
-	return do_origin(o->dev, bio);
+	return do_origin(o->dev, bio, true);
 }
 /*

drivers/md/raid0.c+1−1

@@ -154,7 +154,7 @@ static int create_strip_zones(struct mddev mddev, struct r0conf *private_conf) · 153 unmodified lines
154	} else {	154	} else {
155	pr_err("md/raid0:%s: cannot assemble multi-zone RAID0 with default_layout setting\n",	155	pr_err("md/raid0:%s: cannot assemble multi-zone RAID0 with default_layout setting\n",
156	mdname(mddev));	156	mdname(mddev));
157	pr_err("md/raid0: please set raid.default_layout to 1 or 2\n");	157	pr_err("md/raid0: please set raid0.default_layout to 1 or 2\n");
158	err = -ENOTSUPP;	158	err = -ENOTSUPP;
159	goto abort;	159	goto abort;
160	}	160	}

drivers/memstick/host/jmb38x_ms.c+1−1

@@ -941,7 +941,7 @@ static int jmb38x_ms_probe(struct pci_dev *pdev, · 940 unmodified lines
941	if (!cnt) {	941	if (!cnt) {
942	rc = -ENODEV;	942	rc = -ENODEV;
943	pci_dev_busy = 1;	943	pci_dev_busy = 1;
944	goto err_out;	944	goto err_out_int;
945	}	945	}
946		946
947	jm = kzalloc(sizeof(struct jmb38x_ms)	947	jm = kzalloc(sizeof(struct jmb38x_ms)

drivers/mfd/mt6397-core.c+40−24

 static SIMPLE_DEV_PM_OPS(mt6397_pm_ops, mt6397_irq_suspend,
 			mt6397_irq_resume);
+struct chip_data {
+	u32 cid_addr;
+	u32 cid_shift;
+};
+static const struct chip_data mt6323_core = {
+	.cid_addr = MT6323_CID,
+	.cid_shift = 0,
+};
+static const struct chip_data mt6397_core = {
+	.cid_addr = MT6397_CID,
+	.cid_shift = 0,
+};
 static int mt6397_probe(struct platform_device *pdev)
 {
 	int ret;
 	unsigned int id;
 	struct mt6397_chip *pmic;
+	const struct chip_data *pmic_core;
 	pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
 	if (!pmic)
 	if (!pmic->regmap)
 		return -ENODEV;
-	platform_set_drvdata(pdev, pmic);
+	pmic_core = of_device_get_match_data(&pdev->dev);
+	if (!pmic_core)
+		return -ENODEV;
-	ret = regmap_read(pmic->regmap, MT6397_CID, &id);
+	ret = regmap_read(pmic->regmap, pmic_core->cid_addr, &id);
 	if (ret) {
-		dev_err(pmic->dev, "Failed to read chip id: %d\n", ret);
+		dev_err(&pdev->dev, "Failed to read chip id: %d\n", ret);
 		return ret;
 	}
+	pmic->chip_id = (id >> pmic_core->cid_shift) & 0xff;
+	platform_set_drvdata(pdev, pmic);
 	pmic->irq = platform_get_irq(pdev, 0);
 	if (pmic->irq <= 0)
 		return pmic->irq;
-	switch (id & 0xff) {
+	ret = mt6397_irq_init(pmic);
-	case MT6323_CHIP_ID:
+	if (ret)
-		pmic->int_con[0] = MT6323_INT_CON0;
+		return ret;
-		pmic->int_con[1] = MT6323_INT_CON1;
-		pmic->int_status[0] = MT6323_INT_STATUS0;
-		pmic->int_status[1] = MT6323_INT_STATUS1;
-		ret = mt6397_irq_init(pmic);
-		if (ret)
-			return ret;
+	switch (pmic->chip_id) {
+	case MT6323_CHIP_ID:
 		ret = devm_mfd_add_devices(&pdev->dev, -1, mt6323_devs,
 					   ARRAY_SIZE(mt6323_devs), NULL,
 					   0, pmic->irq_domain);
 	case MT6391_CHIP_ID:
 	case MT6397_CHIP_ID:
-		pmic->int_con[0] = MT6397_INT_CON0;
-		pmic->int_con[1] = MT6397_INT_CON1;
-		pmic->int_status[0] = MT6397_INT_STATUS0;
-		pmic->int_status[1] = MT6397_INT_STATUS1;
-		ret = mt6397_irq_init(pmic);
-		if (ret)
-			return ret;
 		ret = devm_mfd_add_devices(&pdev->dev, -1, mt6397_devs,
 					   ARRAY_SIZE(mt6397_devs), NULL,
 					   0, pmic->irq_domain);
 		break;
 	default:
-		dev_err(&pdev->dev, "unsupported chip: %d\n", id);
+		dev_err(&pdev->dev, "unsupported chip: %d\n", pmic->chip_id);
 		return -ENODEV;
 	}
 }
 static const struct of_device_id mt6397_of_match[] = {
-	{ .compatible = "mediatek,mt6397" },
+	{
-	{ .compatible = "mediatek,mt6323" },
+		.compatible = "mediatek,mt6323",
-	{ }
+		.data = &mt6323_core,
+	}, {
+		.compatible = "mediatek,mt6397",
+		.data = &mt6397_core,
+	}, {
+		/* sentinel */
+	}
 };
 MODULE_DEVICE_TABLE(of, mt6397_of_match);

drivers/mmc/host/cqhci.c+2−1

@@ -611,7 +611,8 @@ static int cqhci_request(struct mmc_host mmc, struct mmc_request mrq) · 610 unmodified lines
611	cq_host->slot[tag].flags = 0;	611	cq_host->slot[tag].flags = 0;
612		612
613	cq_host->qcnt += 1;	613	cq_host->qcnt += 1;
614		614	/* Make sure descriptors are ready before ringing the doorbell */
		615	wmb();
615	cqhci_writel(cq_host, 1 << tag, CQHCI_TDBR);	616	cqhci_writel(cq_host, 1 << tag, CQHCI_TDBR);
616	if (!(cqhci_readl(cq_host, CQHCI_TDBR) & (1 << tag)))	617	if (!(cqhci_readl(cq_host, CQHCI_TDBR) & (1 << tag)))
617	pr_debug("%s: cqhci: doorbell not set for tag %d\n",	618	pr_debug("%s: cqhci: doorbell not set for tag %d\n",

drivers/mmc/host/mxs-mmc.c+4−3

 #include <linux/interrupt.h>
 #include <linux/dma-mapping.h>
 #include <linux/dmaengine.h>
+#include <linux/dma/mxs-dma.h>
 #include <linux/highmem.h>
 #include <linux/clk.h>
 #include <linux/err.h>
 	ssp->ssp_pio_words[2] = cmd1;
 	ssp->dma_dir = DMA_NONE;
 	ssp->slave_dirn = DMA_TRANS_NONE;
-	desc = mxs_mmc_prep_dma(host, DMA_CTRL_ACK);
+	desc = mxs_mmc_prep_dma(host, MXS_DMA_CTRL_WAIT4END);
 	if (!desc)
 		goto out;
 	ssp->ssp_pio_words[2] = cmd1;
 	ssp->dma_dir = DMA_NONE;
 	ssp->slave_dirn = DMA_TRANS_NONE;
-	desc = mxs_mmc_prep_dma(host, DMA_CTRL_ACK);
+	desc = mxs_mmc_prep_dma(host, MXS_DMA_CTRL_WAIT4END);
 	if (!desc)
 		goto out;
 	host->data = data;
 	ssp->dma_dir = dma_data_dir;
 	ssp->slave_dirn = slave_dirn;
-	desc = mxs_mmc_prep_dma(host, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
+	desc = mxs_mmc_prep_dma(host, DMA_PREP_INTERRUPT | MXS_DMA_CTRL_WAIT4END);
 	if (!desc)
 		goto out;

drivers/mmc/host/renesas_sdhi_core.c+19−12

 	struct tmio_mmc_dma *dma_priv;
 	struct tmio_mmc_host *host;
 	struct renesas_sdhi *priv;
+	int num_irqs, irq, ret, i;
 	struct resource *res;
-	int irq, ret, i;
 	u16 ver;
 	of_data = of_device_get_match_data(&pdev->dev);
 		host->hs400_complete = renesas_sdhi_hs400_complete;
 	}
-	i = 0;
+	num_irqs = platform_irq_count(pdev);
-	while (1) {
+	if (num_irqs < 0) {
+		ret = num_irqs;
+		goto eirq;
+	}
+	/* There must be at least one IRQ source */
+	if (!num_irqs) {
+		ret = -ENXIO;
+		goto eirq;
+	}
+	for (i = 0; i < num_irqs; i++) {
 		irq = platform_get_irq(pdev, i);
-		if (irq < 0)
+		if (irq < 0) {
-			break;
+			ret = irq;
-		i++;
+			goto eirq;
+		}
 		ret = devm_request_irq(&pdev->dev, irq, tmio_mmc_irq, 0,
 				       dev_name(&pdev->dev), host);
 		if (ret)
 			goto eirq;
 	}
-	/* There must be at least one IRQ source */
-	if (!i) {
-		ret = irq;
-		goto eirq;
-	}
 	dev_info(&pdev->dev, "%s base at 0x%08lx max clock rate %u MHz\n",
 		 mmc_hostname(host->mmc), (unsigned long)
 		 (platform_get_resource(pdev, IORESOURCE_MEM, 0)->start),

drivers/mmc/host/sdhci-iproc.c+1−0

@@ -262,6 +262,7 @@ static const struct sdhci_iproc_data bcm2835_data = { · 261 unmodified lines
262	};	262	};
263		263
264	static const struct sdhci_pltfm_data sdhci_bcm2711_pltfm_data = {	264	static const struct sdhci_pltfm_data sdhci_bcm2711_pltfm_data = {
		265	.quirks = SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12,
265	.ops = &sdhci_iproc_32only_ops,	266	.ops = &sdhci_iproc_32only_ops,
266	};	267	};
267		268

drivers/mmc/host/sdhci-omap.c+1−1

@@ -372,7 +372,7 @@ static int sdhci_omap_execute_tuning(struct mmc_host *mmc, u32 opcode) · 371 unmodified lines
372	* on temperature	372	* on temperature
373	*/	373	*/
374	if (temperature < -20000)	374	if (temperature < -20000)
375	phase_delay = min(max_window + 4 * max_len - 24,	375	phase_delay = min(max_window + 4 * (max_len - 1) - 24,
376	max_window +	376	max_window +
377	DIV_ROUND_UP(13 * max_len, 16) * 4);	377	DIV_ROUND_UP(13 * max_len, 16) * 4);
378	else if (temperature < 20000)	378	else if (temperature < 20000)

drivers/mmc/host/sh_mmcif.c+2−4

 	const char *name;
 	irq[0] = platform_get_irq(pdev, 0);
-	irq[1] = platform_get_irq(pdev, 1);
+	irq[1] = platform_get_irq_optional(pdev, 1);
-	if (irq[0] < 0) {
+	if (irq[0] < 0)
-		dev_err(dev, "Get irq error\n");
 		return -ENXIO;
-	}
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	reg = devm_ioremap_resource(dev, res);

drivers/net/bonding/bond_main.c+1−1

@@ -4039,7 +4039,7 @@ out: · 4038 unmodified lines
4039	* this to-be-skipped slave to send a packet out.	4039	* this to-be-skipped slave to send a packet out.
4040	*/	4040	*/
4041	old_arr = rtnl_dereference(bond->slave_arr);	4041	old_arr = rtnl_dereference(bond->slave_arr);
4042	for (idx = 0; idx < old_arr->count; idx++) {	4042	for (idx = 0; old_arr != NULL && idx < old_arr->count; idx++) {
4043	if (skipslave == old_arr->arr[idx]) {	4043	if (skipslave == old_arr->arr[idx]) {
4044	old_arr->arr[idx] =	4044	old_arr->arr[idx] =
4045	old_arr->arr[old_arr->count-1];	4045	old_arr->arr[old_arr->count-1];

drivers/net/dsa/b53/b53_common.c+0−1

@@ -1845,7 +1845,6 @@ int b53_mirror_add(struct dsa_switch *ds, int port, · 1844 unmodified lines
1845	loc = B53_EG_MIR_CTL;	1845	loc = B53_EG_MIR_CTL;
1846		1846
1847	b53_read16(dev, B53_MGMT_PAGE, loc, &reg);	1847	b53_read16(dev, B53_MGMT_PAGE, loc, &reg);
1848	reg &= ~MIRROR_MASK;
1849	reg \|= BIT(port);	1848	reg \|= BIT(port);
1850	b53_write16(dev, B53_MGMT_PAGE, loc, reg);	1849	b53_write16(dev, B53_MGMT_PAGE, loc, reg);
1851		1850

drivers/net/dsa/microchip/ksz8795.c+0−4

@@ -1224,10 +1224,6 @@ static int ksz8795_switch_init(struct ksz_device *dev) · 1223 unmodified lines
1224	{	1224	{
1225	int i;	1225	int i;
1226		1226
1227	mutex_init(&dev->stats_mutex);
1228	mutex_init(&dev->alu_mutex);
1229	mutex_init(&dev->vlan_mutex);
1230
1231	dev->ds->ops = &ksz8795_switch_ops;	1227	dev->ds->ops = &ksz8795_switch_ops;
1232		1228
1233	for (i = 0; i < ARRAY_SIZE(ksz8795_switch_chips); i++) {	1229	for (i = 0; i < ARRAY_SIZE(ksz8795_switch_chips); i++) {

drivers/net/dsa/microchip/ksz8795_spi.c+4−3

 static int ksz8795_spi_probe(struct spi_device *spi)
 {
+	struct regmap_config rc;
 	struct ksz_device *dev;
 	int i, ret;
 		return -ENOMEM;
 	for (i = 0; i < ARRAY_SIZE(ksz8795_regmap_config); i++) {
-		dev->regmap[i] = devm_regmap_init_spi(spi,
+		rc = ksz8795_regmap_config[i];
-						      &ksz8795_regmap_config
+		rc.lock_arg = &dev->regmap_mutex;
-						      [i]);
+		dev->regmap[i] = devm_regmap_init_spi(spi, &rc);
 		if (IS_ERR(dev->regmap[i])) {
 			ret = PTR_ERR(dev->regmap[i]);
 			dev_err(&spi->dev,

drivers/net/dsa/microchip/ksz9477_i2c.c+4−2

 static int ksz9477_i2c_probe(struct i2c_client *i2c,
 			     const struct i2c_device_id *i2c_id)
 {
+	struct regmap_config rc;
 	struct ksz_device *dev;
 	int i, ret;
 		return -ENOMEM;
 	for (i = 0; i < ARRAY_SIZE(ksz9477_regmap_config); i++) {
-		dev->regmap[i] = devm_regmap_init_i2c(i2c,
+		rc = ksz9477_regmap_config[i];
-					&ksz9477_regmap_config[i]);
+		rc.lock_arg = &dev->regmap_mutex;
+		dev->regmap[i] = devm_regmap_init_i2c(i2c, &rc);
 		if (IS_ERR(dev->regmap[i])) {
 			ret = PTR_ERR(dev->regmap[i]);
 			dev_err(&i2c->dev,

drivers/net/dsa/microchip/ksz9477_reg.h+2−2

@@ -1,5 +1,5 @@
1	/* SPDX-License-Identifier: GPL-2.0	1	/* SPDX-License-Identifier: GPL-2.0 */
2	*	2	/*
3	* Microchip KSZ9477 register definitions	3	* Microchip KSZ9477 register definitions
4	*	4	*
5	* Copyright (C) 2017-2018 Microchip Technology Inc.	5	* Copyright (C) 2017-2018 Microchip Technology Inc.

drivers/net/dsa/microchip/ksz9477_spi.c+4−2

 static int ksz9477_spi_probe(struct spi_device *spi)
 {
+	struct regmap_config rc;
 	struct ksz_device *dev;
 	int i, ret;
 		return -ENOMEM;
 	for (i = 0; i < ARRAY_SIZE(ksz9477_regmap_config); i++) {
-		dev->regmap[i] = devm_regmap_init_spi(spi,
+		rc = ksz9477_regmap_config[i];
-					&ksz9477_regmap_config[i]);
+		rc.lock_arg = &dev->regmap_mutex;
+		dev->regmap[i] = devm_regmap_init_spi(spi, &rc);
 		if (IS_ERR(dev->regmap[i])) {
 			ret = PTR_ERR(dev->regmap[i]);
 			dev_err(&spi->dev,

drivers/net/dsa/microchip/ksz_common.c+1−1

@@ -436,7 +436,7 @@ int ksz_switch_register(struct ksz_device *dev, · 435 unmodified lines
436	}	436	}
437		437
438	mutex_init(&dev->dev_mutex);	438	mutex_init(&dev->dev_mutex);
439	mutex_init(&dev->stats_mutex);	439	mutex_init(&dev->regmap_mutex);
440	mutex_init(&dev->alu_mutex);	440	mutex_init(&dev->alu_mutex);
441	mutex_init(&dev->vlan_mutex);	441	mutex_init(&dev->vlan_mutex);
442		442

drivers/net/dsa/microchip/ksz_common.h+17−3

-/* SPDX-License-Identifier: GPL-2.0
+/* SPDX-License-Identifier: GPL-2.0 */
- * Microchip switch driver common header
+/* Microchip switch driver common header
  *
  * Copyright (C) 2017-2019 Microchip Technology Inc.
  */
 	const char *name;
 	struct mutex dev_mutex;		/* device access */
-	struct mutex stats_mutex;	/* status access */
+	struct mutex regmap_mutex;	/* regmap access */
 	struct mutex alu_mutex;		/* ALU access */
 	struct mutex vlan_mutex;	/* vlan access */
 	const struct ksz_dev_ops *dev_ops;
 	ksz_write32(dev, dev->dev_ops->get_port_addr(port, offset), data);
 }
+static inline void ksz_regmap_lock(void *__mtx)
+{
+	struct mutex *mtx = __mtx;
+	mutex_lock(mtx);
+}
+static inline void ksz_regmap_unlock(void *__mtx)
+{
+	struct mutex *mtx = __mtx;
+	mutex_unlock(mtx);
+}
 /* Regmap tables generation */
 #define KSZ_SPI_OP_RD		3
 #define KSZ_SPI_OP_WR		2
 		.write_flag_mask =					\
 			KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_WR, swp,	\
 					     regbits, regpad),		\
+		.lock = ksz_regmap_lock,				\
+		.unlock = ksz_regmap_unlock,				\
 		.reg_format_endian = REGMAP_ENDIAN_BIG,			\
 		.val_format_endian = REGMAP_ENDIAN_BIG			\
 	}

drivers/net/dsa/sja1105/sja1105.h+2−2

@@ -1,5 +1,5 @@
1	/* SPDX-License-Identifier: GPL-2.0	1	/* SPDX-License-Identifier: GPL-2.0 */
2	* Copyright (c) 2018, Sensor-Technik Wiedemann GmbH	2	/* Copyright (c) 2018, Sensor-Technik Wiedemann GmbH
3	* Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com>	3	* Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com>
4	*/	4	*/
5	#ifndef _SJA1105_H	5	#ifndef _SJA1105_H

drivers/net/dsa/sja1105/sja1105_dynamic_config.h+2−2

@@ -1,5 +1,5 @@
1	/* SPDX-License-Identifier: GPL-2.0	1	/* SPDX-License-Identifier: GPL-2.0 */
2	* Copyright (c) 2019, Vladimir Oltean <olteanv@gmail.com>	2	/* Copyright (c) 2019, Vladimir Oltean <olteanv@gmail.com>
3	*/	3	*/
4	#ifndef _SJA1105_DYNAMIC_CONFIG_H	4	#ifndef _SJA1105_DYNAMIC_CONFIG_H
5	#define _SJA1105_DYNAMIC_CONFIG_H	5	#define _SJA1105_DYNAMIC_CONFIG_H

drivers/net/dsa/sja1105/sja1105_ptp.h+2−2

@@ -1,5 +1,5 @@
1	/* SPDX-License-Identifier: GPL-2.0	1	/* SPDX-License-Identifier: GPL-2.0 */
2	* Copyright (c) 2019, Vladimir Oltean <olteanv@gmail.com>	2	/* Copyright (c) 2019, Vladimir Oltean <olteanv@gmail.com>
3	*/	3	*/
4	#ifndef _SJA1105_PTP_H	4	#ifndef _SJA1105_PTP_H
5	#define _SJA1105_PTP_H	5	#define _SJA1105_PTP_H

drivers/net/dsa/sja1105/sja1105_static_config.h+2−2

@@ -1,5 +1,5 @@
1	/* SPDX-License-Identifier: BSD-3-Clause	1	/* SPDX-License-Identifier: BSD-3-Clause */
2	* Copyright (c) 2016-2018, NXP Semiconductors	2	/* Copyright (c) 2016-2018, NXP Semiconductors
3	* Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com>	3	* Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com>
4	*/	4	*/
5	#ifndef _SJA1105_STATIC_CONFIG_H	5	#ifndef _SJA1105_STATIC_CONFIG_H

drivers/net/dsa/sja1105/sja1105_tas.h+2−2

@@ -1,5 +1,5 @@
1	/* SPDX-License-Identifier: GPL-2.0	1	/* SPDX-License-Identifier: GPL-2.0 */
2	* Copyright (c) 2019, Vladimir Oltean <olteanv@gmail.com>	2	/* Copyright (c) 2019, Vladimir Oltean <olteanv@gmail.com>
3	*/	3	*/
4	#ifndef _SJA1105_TAS_H	4	#ifndef _SJA1105_TAS_H
5	#define _SJA1105_TAS_H	5	#define _SJA1105_TAS_H

drivers/net/ethernet/aquantia/atlantic/aq_main.c+1−3

@@ -194,9 +194,7 @@ static void aq_ndev_set_multicast_settings(struct net_device *ndev) · 193 unmodified lines
194	{	194	{
195	struct aq_nic_s *aq_nic = netdev_priv(ndev);	195	struct aq_nic_s *aq_nic = netdev_priv(ndev);
196		196
197	aq_nic_set_packet_filter(aq_nic, ndev->flags);	197	(void)aq_nic_set_multicast_list(aq_nic, ndev);
198
199	aq_nic_set_multicast_list(aq_nic, ndev);
200	}	198	}
201		199
202	static int aq_ndo_vlan_rx_add_vid(struct net_device *ndev, __be16 proto,	200	static int aq_ndo_vlan_rx_add_vid(struct net_device *ndev, __be16 proto,

drivers/net/ethernet/aquantia/atlantic/aq_nic.c+18−16

@@ -631,9 +631,12 @@ err_exit: · 630 unmodified lines
631		631
632	int aq_nic_set_multicast_list(struct aq_nic_s self, struct net_device ndev)	632	int aq_nic_set_multicast_list(struct aq_nic_s self, struct net_device ndev)
633	{	633	{
634	unsigned int packet_filter = self->packet_filter;	634	const struct aq_hw_ops *hw_ops = self->aq_hw_ops;
		635	struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
		636	unsigned int packet_filter = ndev->flags;
635	struct netdev_hw_addr *ha = NULL;	637	struct netdev_hw_addr *ha = NULL;
636	unsigned int i = 0U;	638	unsigned int i = 0U;
		639	int err = 0;
637		640
638	self->mc_list.count = 0;	641	self->mc_list.count = 0;
639	if (netdev_uc_count(ndev) > AQ_HW_MULTICAST_ADDRESS_MAX) {	642	if (netdev_uc_count(ndev) > AQ_HW_MULTICAST_ADDRESS_MAX) {
@@ -641,29 +644,28 @@ int aq_nic_set_multicast_list(struct aq_nic_s self, struct net_device ndev) · 1 unmodified line
641	} else {	644	} else {
642	netdev_for_each_uc_addr(ha, ndev) {	645	netdev_for_each_uc_addr(ha, ndev) {
643	ether_addr_copy(self->mc_list.ar[i++], ha->addr);	646	ether_addr_copy(self->mc_list.ar[i++], ha->addr);
644
645	if (i >= AQ_HW_MULTICAST_ADDRESS_MAX)
646	break;
647	}	647	}
648	}	648	}
649		649
650	if (i + netdev_mc_count(ndev) > AQ_HW_MULTICAST_ADDRESS_MAX) {	650	cfg->is_mc_list_enabled = !!(packet_filter & IFF_MULTICAST);
651	packet_filter \|= IFF_ALLMULTI;	651	if (cfg->is_mc_list_enabled) {
652	} else {	652	if (i + netdev_mc_count(ndev) > AQ_HW_MULTICAST_ADDRESS_MAX) {
653	netdev_for_each_mc_addr(ha, ndev) {	653	packet_filter \|= IFF_ALLMULTI;
654	ether_addr_copy(self->mc_list.ar[i++], ha->addr);	654	} else {
655		655	netdev_for_each_mc_addr(ha, ndev) {
656	if (i >= AQ_HW_MULTICAST_ADDRESS_MAX)	656	ether_addr_copy(self->mc_list.ar[i++],
657	break;	657	ha->addr);
		658	}
658	}	659	}
659	}	660	}
660		661
661	if (i > 0 && i <= AQ_HW_MULTICAST_ADDRESS_MAX) {	662	if (i > 0 && i <= AQ_HW_MULTICAST_ADDRESS_MAX) {
662	packet_filter \|= IFF_MULTICAST;
663	self->mc_list.count = i;	663	self->mc_list.count = i;
664	self->aq_hw_ops->hw_multicast_list_set(self->aq_hw,	664	err = hw_ops->hw_multicast_list_set(self->aq_hw,
665	self->mc_list.ar,	665	self->mc_list.ar,
666	self->mc_list.count);	666	self->mc_list.count);
		667	if (err < 0)
		668	return err;
667	}	669	}
668	return aq_nic_set_packet_filter(self, packet_filter);	670	return aq_nic_set_packet_filter(self, packet_filter);
669	}	671	}

drivers/net/ethernet/aquantia/atlantic/aq_ring.c+2−1

 					break;
 				buff->is_error |= buff_->is_error;
+				buff->is_cso_err |= buff_->is_cso_err;
 			} while (!buff_->is_eop);
 				err = 0;
 				goto err_exit;
 			}
-			if (buff->is_error) {
+			if (buff->is_error || buff->is_cso_err) {
 				buff_ = buff;
 				do {
 					next_ = buff_->next,

drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c+18−5

 				     cfg->is_vlan_force_promisc);
 	hw_atl_rpfl2multicast_flr_en_set(self,
-					 IS_FILTER_ENABLED(IFF_ALLMULTI), 0);
+					 IS_FILTER_ENABLED(IFF_ALLMULTI) &&
+					 IS_FILTER_ENABLED(IFF_MULTICAST), 0);
 	hw_atl_rpfl2_accept_all_mc_packets_set(self,
-					       IS_FILTER_ENABLED(IFF_ALLMULTI));
+					      IS_FILTER_ENABLED(IFF_ALLMULTI) &&
+					      IS_FILTER_ENABLED(IFF_MULTICAST));
 	hw_atl_rpfl2broadcast_en_set(self, IS_FILTER_ENABLED(IFF_BROADCAST));
-	cfg->is_mc_list_enabled = IS_FILTER_ENABLED(IFF_MULTICAST);
 	for (i = HW_ATL_B0_MAC_MIN; i < HW_ATL_B0_MAC_MAX; ++i)
 		hw_atl_rpfl2_uc_flr_en_set(self,
 static int hw_atl_b0_hw_stop(struct aq_hw_s *self)
 {
+	int err;
+	u32 val;
 	hw_atl_b0_hw_irq_disable(self, HW_ATL_B0_INT_MASK);
 	/* Invalidate Descriptor Cache to prevent writing to the cached
 	 * descriptors and to the data pointer of those descriptors
 	 */
-	hw_atl_rdm_rx_dma_desc_cache_init_set(self, 1);
+	hw_atl_rdm_rx_dma_desc_cache_init_tgl(self);
-	return aq_hw_err_from_flags(self);
+	err = aq_hw_err_from_flags(self);
+	if (err)
+		goto err_exit;
+	readx_poll_timeout_atomic(hw_atl_rdm_rx_dma_desc_cache_init_done_get,
+				  self, val, val == 1, 1000U, 10000U);
+err_exit:
+	return err;
 }
 static int hw_atl_b0_hw_ring_tx_stop(struct aq_hw_s *self,

drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh.c+15−2

@@ -606,12 +606,25 @@ void hw_atl_rpb_rx_flow_ctl_mode_set(struct aq_hw_s *aq_hw, u32 rx_flow_ctl_mode · 605 unmodified lines
606	HW_ATL_RPB_RX_FC_MODE_SHIFT, rx_flow_ctl_mode);	606	HW_ATL_RPB_RX_FC_MODE_SHIFT, rx_flow_ctl_mode);
607	}	607	}
608		608
609	void hw_atl_rdm_rx_dma_desc_cache_init_set(struct aq_hw_s *aq_hw, u32 init)	609	void hw_atl_rdm_rx_dma_desc_cache_init_tgl(struct aq_hw_s *aq_hw)
610	{	610	{
		611	u32 val;
		612
		613	val = aq_hw_read_reg_bit(aq_hw, HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_ADR,
		614	HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_MSK,
		615	HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_SHIFT);
		616
611	aq_hw_write_reg_bit(aq_hw, HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_ADR,	617	aq_hw_write_reg_bit(aq_hw, HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_ADR,
612	HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_MSK,	618	HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_MSK,
613	HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_SHIFT,	619	HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_SHIFT,
614	init);	620	val ^ 1);
		621	}
		622
		623	u32 hw_atl_rdm_rx_dma_desc_cache_init_done_get(struct aq_hw_s *aq_hw)
		624	{
		625	return aq_hw_read_reg_bit(aq_hw, RDM_RX_DMA_DESC_CACHE_INIT_DONE_ADR,
		626	RDM_RX_DMA_DESC_CACHE_INIT_DONE_MSK,
		627	RDM_RX_DMA_DESC_CACHE_INIT_DONE_SHIFT);
615	}	628	}
616		629
617	void hw_atl_rpb_rx_pkt_buff_size_per_tc_set(struct aq_hw_s *aq_hw,	630	void hw_atl_rpb_rx_pkt_buff_size_per_tc_set(struct aq_hw_s *aq_hw,

drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh.h+5−2

 					    u32 rx_pkt_buff_size_per_tc,
 					    u32 buffer);
-/* set rdm rx dma descriptor cache init */
+/* toggle rdm rx dma descriptor cache init */
-void hw_atl_rdm_rx_dma_desc_cache_init_set(struct aq_hw_s *aq_hw, u32 init);
+void hw_atl_rdm_rx_dma_desc_cache_init_tgl(struct aq_hw_s *aq_hw);
+/* get rdm rx dma descriptor cache init done */
+u32 hw_atl_rdm_rx_dma_desc_cache_init_done_get(struct aq_hw_s *aq_hw);
 /* set rx xoff enable (per tc) */
 void hw_atl_rpb_rx_xoff_en_per_tc_set(struct aq_hw_s *aq_hw, u32 rx_xoff_en_per_tc,

drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh_internal.h+19−0

@@ -318,6 +318,25 @@ · 317 unmodified lines
318	/* default value of bitfield rdm_desc_init_i */	318	/* default value of bitfield rdm_desc_init_i */
319	#define HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_DEFAULT 0x0	319	#define HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_DEFAULT 0x0
320		320
		321	/* rdm_desc_init_done_i bitfield definitions
		322	* preprocessor definitions for the bitfield rdm_desc_init_done_i.
		323	* port="pif_rdm_desc_init_done_i"
		324	*/
		325
		326	/* register address for bitfield rdm_desc_init_done_i */
		327	#define RDM_RX_DMA_DESC_CACHE_INIT_DONE_ADR 0x00005a10
		328	/* bitmask for bitfield rdm_desc_init_done_i */
		329	#define RDM_RX_DMA_DESC_CACHE_INIT_DONE_MSK 0x00000001U
		330	/* inverted bitmask for bitfield rdm_desc_init_done_i */
		331	#define RDM_RX_DMA_DESC_CACHE_INIT_DONE_MSKN 0xfffffffe
		332	/* lower bit position of bitfield rdm_desc_init_done_i */
		333	#define RDM_RX_DMA_DESC_CACHE_INIT_DONE_SHIFT 0U
		334	/* width of bitfield rdm_desc_init_done_i */
		335	#define RDM_RX_DMA_DESC_CACHE_INIT_DONE_WIDTH 1
		336	/* default value of bitfield rdm_desc_init_done_i */
		337	#define RDM_RX_DMA_DESC_CACHE_INIT_DONE_DEFAULT 0x0
		338
		339
321	/* rx int_desc_wrb_en bitfield definitions	340	/* rx int_desc_wrb_en bitfield definitions
322	* preprocessor definitions for the bitfield "int_desc_wrb_en".	341	* preprocessor definitions for the bitfield "int_desc_wrb_en".
323	* port="pif_rdm_int_desc_wrb_en_i"	342	* port="pif_rdm_int_desc_wrb_en_i"

drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils_fw2x.c+1−1

@@ -337,7 +337,7 @@ static int aq_fw2x_get_phy_temp(struct aq_hw_s self, int temp) · 336 unmodified lines
337	/* Convert PHY temperature from 1/256 degree Celsius	337	/* Convert PHY temperature from 1/256 degree Celsius
338	* to 1/1000 degree Celsius.	338	* to 1/1000 degree Celsius.
339	*/	339	*/
340	temp = temp_res 1000 / 256;	340	temp = (temp_res & 0xFFFF) 1000 / 256;
341		341
342	return 0;	342	return 0;
343	}	343	}

drivers/net/ethernet/broadcom/Kconfig+3−1

 	default y
 	depends on (SSB_POSSIBLE && HAS_DMA) || PCI || BCM63XX || \
 		   SIBYTE_SB1xxx_SOC
-	select DIMLIB
 	---help---
 	  If you have a network (Ethernet) chipset belonging to this class,
 	  say Y.
 	select FIXED_PHY
 	select BCM7XXX_PHY
 	select MDIO_BCM_UNIMAC
+	select DIMLIB
 	help
 	  This driver supports the built-in Ethernet MACs found in the
 	  Broadcom BCM7xxx Set Top Box family chipset.
 	select MII
 	select PHYLIB
 	select FIXED_PHY
+	select DIMLIB
 	help
 	  This driver supports the built-in Ethernet MACs found in the
 	  Broadcom BCM7xxx Set Top Box family chipset using an internal
 	select LIBCRC32C
 	select NET_DEVLINK
 	select PAGE_POOL
+	select DIMLIB
 	---help---
 	  This driver supports Broadcom NetXtreme-C/E 10/25/40/50 gigabit
 	  Ethernet cards.  To compile this driver as a module, choose M here:

drivers/net/ethernet/broadcom/genet/bcmgenet.c+26−15

@@ -2018,6 +2018,8 @@ static void bcmgenet_link_intr_enable(struct bcmgenet_priv *priv) · 2017 unmodified lines
2018	*/	2018	*/
2019	if (priv->internal_phy) {	2019	if (priv->internal_phy) {
2020	int0_enable \|= UMAC_IRQ_LINK_EVENT;	2020	int0_enable \|= UMAC_IRQ_LINK_EVENT;
		2021	if (GENET_IS_V1(priv) \|\| GENET_IS_V2(priv) \|\| GENET_IS_V3(priv))
		2022	int0_enable \|= UMAC_IRQ_PHY_DET_R;
2021	} else if (priv->ext_phy) {	2023	} else if (priv->ext_phy) {
2022	int0_enable \|= UMAC_IRQ_LINK_EVENT;	2024	int0_enable \|= UMAC_IRQ_LINK_EVENT;
2023	} else if (priv->phy_interface == PHY_INTERFACE_MODE_MOCA) {	2025	} else if (priv->phy_interface == PHY_INTERFACE_MODE_MOCA) {
@@ -2611,11 +2613,14 @@ static void bcmgenet_irq_task(struct work_struct *work) · 587 unmodified lines
2611	priv->irq0_stat = 0;	2613	priv->irq0_stat = 0;
2612	spin_unlock_irq(&priv->lock);	2614	spin_unlock_irq(&priv->lock);
2613		2615
		2616	if (status & UMAC_IRQ_PHY_DET_R &&
		2617	priv->dev->phydev->autoneg != AUTONEG_ENABLE)
		2618	phy_init_hw(priv->dev->phydev);
		2619
2614	/* Link UP/DOWN event */	2620	/* Link UP/DOWN event */
2615	if (status & UMAC_IRQ_LINK_EVENT) {	2621	if (status & UMAC_IRQ_LINK_EVENT)
2616	priv->dev->phydev->link = !!(status & UMAC_IRQ_LINK_UP);
2617	phy_mac_interrupt(priv->dev->phydev);	2622	phy_mac_interrupt(priv->dev->phydev);
2618	}	2623
2619	}	2624	}
2620		2625
2621	/* bcmgenet_isr1: handle Rx and Tx priority queues */	2626	/* bcmgenet_isr1: handle Rx and Tx priority queues */
@@ -2710,7 +2715,7 @@ static irqreturn_t bcmgenet_isr0(int irq, void *dev_id) · 88 unmodified lines
2710	}	2715	}
2711		2716
2712	/* all other interested interrupts handled in bottom half */	2717	/* all other interested interrupts handled in bottom half */
2713	status &= UMAC_IRQ_LINK_EVENT;	2718	status &= (UMAC_IRQ_LINK_EVENT \| UMAC_IRQ_PHY_DET_R);
2714	if (status) {	2719	if (status) {
2715	/* Save irq status for bottom-half processing. */	2720	/* Save irq status for bottom-half processing. */
2716	spin_lock_irqsave(&priv->lock, flags);	2721	spin_lock_irqsave(&priv->lock, flags);
@@ -2874,6 +2879,12 @@ static int bcmgenet_open(struct net_device *dev) · 157 unmodified lines
2874	if (priv->internal_phy)	2879	if (priv->internal_phy)
2875	bcmgenet_power_up(priv, GENET_POWER_PASSIVE);	2880	bcmgenet_power_up(priv, GENET_POWER_PASSIVE);
2876		2881
		2882	ret = bcmgenet_mii_connect(dev);
		2883	if (ret) {
		2884	netdev_err(dev, "failed to connect to PHY\n");
		2885	goto err_clk_disable;
		2886	}
		2887
2877	/* take MAC out of reset */	2888	/* take MAC out of reset */
2878	bcmgenet_umac_reset(priv);	2889	bcmgenet_umac_reset(priv);
2879		2890
@@ -2883,6 +2894,12 @@ static int bcmgenet_open(struct net_device *dev) · 3 unmodified lines
2883	reg = bcmgenet_umac_readl(priv, UMAC_CMD);	2894	reg = bcmgenet_umac_readl(priv, UMAC_CMD);
2884	priv->crc_fwd_en = !!(reg & CMD_CRC_FWD);	2895	priv->crc_fwd_en = !!(reg & CMD_CRC_FWD);
2885		2896
		2897	ret = bcmgenet_mii_config(dev, true);
		2898	if (ret) {
		2899	netdev_err(dev, "unsupported PHY\n");
		2900	goto err_disconnect_phy;
		2901	}
		2902
2886	bcmgenet_set_hw_addr(priv, dev->dev_addr);	2903	bcmgenet_set_hw_addr(priv, dev->dev_addr);
2887		2904
2888	if (priv->internal_phy) {	2905	if (priv->internal_phy) {
@@ -2898,7 +2915,7 @@ static int bcmgenet_open(struct net_device *dev) · 9 unmodified lines
2898	ret = bcmgenet_init_dma(priv);	2915	ret = bcmgenet_init_dma(priv);
2899	if (ret) {	2916	if (ret) {
2900	netdev_err(dev, "failed to initialize DMA\n");	2917	netdev_err(dev, "failed to initialize DMA\n");
2901	goto err_clk_disable;	2918	goto err_disconnect_phy;
2902	}	2919	}
2903		2920
2904	/* Always enable ring 16 - descriptor ring */	2921	/* Always enable ring 16 - descriptor ring */
@@ -2921,25 +2938,19 @@ static int bcmgenet_open(struct net_device *dev) · 16 unmodified lines
2921	goto err_irq0;	2938	goto err_irq0;
2922	}	2939	}
2923		2940
2924	ret = bcmgenet_mii_probe(dev);
2925	if (ret) {
2926	netdev_err(dev, "failed to connect to PHY\n");
2927	goto err_irq1;
2928	}
2929
2930	bcmgenet_netif_start(dev);	2941	bcmgenet_netif_start(dev);
2931		2942
2932	netif_tx_start_all_queues(dev);	2943	netif_tx_start_all_queues(dev);
2933		2944
2934	return 0;	2945	return 0;
2935		2946
2936	err_irq1:
2937	free_irq(priv->irq1, priv);
2938	err_irq0:	2947	err_irq0:
2939	free_irq(priv->irq0, priv);	2948	free_irq(priv->irq0, priv);
2940	err_fini_dma:	2949	err_fini_dma:
2941	bcmgenet_dma_teardown(priv);	2950	bcmgenet_dma_teardown(priv);
2942	bcmgenet_fini_dma(priv);	2951	bcmgenet_fini_dma(priv);
		2952	err_disconnect_phy:
		2953	phy_disconnect(dev->phydev);
2943	err_clk_disable:	2954	err_clk_disable:
2944	if (priv->internal_phy)	2955	if (priv->internal_phy)
2945	bcmgenet_power_down(priv, GENET_POWER_PASSIVE);	2956	bcmgenet_power_down(priv, GENET_POWER_PASSIVE);
@@ -3620,6 +3631,8 @@ static int bcmgenet_resume(struct device *d) · 674 unmodified lines
3620	if (priv->internal_phy)	3631	if (priv->internal_phy)
3621	bcmgenet_power_up(priv, GENET_POWER_PASSIVE);	3632	bcmgenet_power_up(priv, GENET_POWER_PASSIVE);
3622		3633
		3634	phy_init_hw(dev->phydev);
		3635
3623	bcmgenet_umac_reset(priv);	3636	bcmgenet_umac_reset(priv);
3624		3637
3625	init_umac(priv);	3638	init_umac(priv);
@@ -3628,8 +3641,6 @@ static int bcmgenet_resume(struct device *d) · 2 unmodified lines
3628	if (priv->wolopts)	3641	if (priv->wolopts)
3629	clk_disable_unprepare(priv->clk_wol);	3642	clk_disable_unprepare(priv->clk_wol);
3630		3643
3631	phy_init_hw(dev->phydev);
3632
3633	/* Speed settings must be restored */	3644	/* Speed settings must be restored */
3634	bcmgenet_mii_config(priv->dev, false);	3645	bcmgenet_mii_config(priv->dev, false);
3635		3646

drivers/net/ethernet/broadcom/genet/bcmgenet.h+2−1

 #define  EXT_PWR_DOWN_PHY_EN		(1 << 20)
 #define EXT_RGMII_OOB_CTRL		0x0C
+#define  RGMII_MODE_EN_V123		(1 << 0)
 #define  RGMII_LINK			(1 << 4)
 #define  OOB_DISABLE			(1 << 5)
 #define  RGMII_MODE_EN			(1 << 6)
 /* MDIO routines */
 int bcmgenet_mii_init(struct net_device *dev);
+int bcmgenet_mii_connect(struct net_device *dev);
 int bcmgenet_mii_config(struct net_device *dev, bool init);
-int bcmgenet_mii_probe(struct net_device *dev);
 void bcmgenet_mii_exit(struct net_device *dev);
 void bcmgenet_phy_power_set(struct net_device *dev, bool enable);
 void bcmgenet_mii_setup(struct net_device *dev);

drivers/net/ethernet/broadcom/genet/bcmmii.c+56−61

 					  bcmgenet_fixed_phy_link_update);
 }
+int bcmgenet_mii_connect(struct net_device *dev)
+{
+	struct bcmgenet_priv *priv = netdev_priv(dev);
+	struct device_node *dn = priv->pdev->dev.of_node;
+	struct phy_device *phydev;
+	u32 phy_flags = 0;
+	int ret;
+	/* Communicate the integrated PHY revision */
+	if (priv->internal_phy)
+		phy_flags = priv->gphy_rev;
+	/* Initialize link state variables that bcmgenet_mii_setup() uses */
+	priv->old_link = -1;
+	priv->old_speed = -1;
+	priv->old_duplex = -1;
+	priv->old_pause = -1;
+	if (dn) {
+		phydev = of_phy_connect(dev, priv->phy_dn, bcmgenet_mii_setup,
+					phy_flags, priv->phy_interface);
+		if (!phydev) {
+			pr_err("could not attach to PHY\n");
+			return -ENODEV;
+		}
+	} else {
+		phydev = dev->phydev;
+		phydev->dev_flags = phy_flags;
+		ret = phy_connect_direct(dev, phydev, bcmgenet_mii_setup,
+					 priv->phy_interface);
+		if (ret) {
+			pr_err("could not attach to PHY\n");
+			return -ENODEV;
+		}
+	}
+	return 0;
+}
 int bcmgenet_mii_config(struct net_device *dev, bool init)
 {
 	struct bcmgenet_priv *priv = netdev_priv(dev);
 	 */
 	if (priv->ext_phy) {
 		reg = bcmgenet_ext_readl(priv, EXT_RGMII_OOB_CTRL);
-		reg |= RGMII_MODE_EN | id_mode_dis;
+		reg |= id_mode_dis;
+		if (GENET_IS_V1(priv) || GENET_IS_V2(priv) || GENET_IS_V3(priv))
+			reg |= RGMII_MODE_EN_V123;
+		else
+			reg |= RGMII_MODE_EN;
 		bcmgenet_ext_writel(priv, reg, EXT_RGMII_OOB_CTRL);
 	}
-	if (init)
+	if (init) {
-		dev_info(kdev, "configuring instance for %s\n", phy_name);
+		linkmode_copy(phydev->advertising, phydev->supported);
-	return 0;
-}
-int bcmgenet_mii_probe(struct net_device *dev)
-{
-	struct bcmgenet_priv *priv = netdev_priv(dev);
-	struct device_node *dn = priv->pdev->dev.of_node;
-	struct phy_device *phydev;
-	u32 phy_flags;
-	int ret;
-	/* Communicate the integrated PHY revision */
-	phy_flags = priv->gphy_rev;
-	/* Initialize link state variables that bcmgenet_mii_setup() uses */
-	priv->old_link = -1;
-	priv->old_speed = -1;
-	priv->old_duplex = -1;
-	priv->old_pause = -1;
-	if (dn) {
-		phydev = of_phy_connect(dev, priv->phy_dn, bcmgenet_mii_setup,
-					phy_flags, priv->phy_interface);
-		if (!phydev) {
-			pr_err("could not attach to PHY\n");
-			return -ENODEV;
-		}
-	} else {
-		phydev = dev->phydev;
-		phydev->dev_flags = phy_flags;
-		ret = phy_connect_direct(dev, phydev, bcmgenet_mii_setup,
+		/* The internal PHY has its link interrupts routed to the
-					 priv->phy_interface);
+		 * Ethernet MAC ISRs. On GENETv5 there is a hardware issue
-		if (ret) {
+		 * that prevents the signaling of link UP interrupts when
-			pr_err("could not attach to PHY\n");
+		 * the link operates at 10Mbps, so fallback to polling for
-			return -ENODEV;
+		 * those versions of GENET.
-		}
+		 */
-	}
+		if (priv->internal_phy && !GENET_IS_V5(priv))
+			phydev->irq = PHY_IGNORE_INTERRUPT;
-	/* Configure port multiplexer based on what the probed PHY device since
+		dev_info(kdev, "configuring instance for %s\n", phy_name);
-	 * reading the 'max-speed' property determines the maximum supported
-	 * PHY speed which is needed for bcmgenet_mii_config() to configure
-	 * things appropriately.
-	 */
-	ret = bcmgenet_mii_config(dev, true);
-	if (ret) {
-		phy_disconnect(dev->phydev);
-		return ret;
 	}
-	linkmode_copy(phydev->advertising, phydev->supported);
-	/* The internal PHY has its link interrupts routed to the
-	 * Ethernet MAC ISRs. On GENETv5 there is a hardware issue
-	 * that prevents the signaling of link UP interrupts when
-	 * the link operates at 10Mbps, so fallback to polling for
-	 * those versions of GENET.
-	 */
-	if (priv->internal_phy && !GENET_IS_V5(priv))
-		dev->phydev->irq = PHY_IGNORE_INTERRUPT;
 	return 0;
 }

drivers/net/ethernet/cadence/macb_main.c+6−6

@@ -3405,17 +3405,17 @@ static int macb_clk_init(struct platform_device pdev, struct clk *pclk, · 3404 unmodified lines
3405	return err;	3405	return err;
3406	}	3406	}
3407		3407
3408	*tx_clk = devm_clk_get(&pdev->dev, "tx_clk");	3408	*tx_clk = devm_clk_get_optional(&pdev->dev, "tx_clk");
3409	if (IS_ERR(*tx_clk))	3409	if (IS_ERR(*tx_clk))
3410	*tx_clk = NULL;	3410	return PTR_ERR(*tx_clk);
3411		3411
3412	*rx_clk = devm_clk_get(&pdev->dev, "rx_clk");	3412	*rx_clk = devm_clk_get_optional(&pdev->dev, "rx_clk");
3413	if (IS_ERR(*rx_clk))	3413	if (IS_ERR(*rx_clk))
3414	*rx_clk = NULL;	3414	return PTR_ERR(*rx_clk);
3415		3415
3416	*tsu_clk = devm_clk_get(&pdev->dev, "tsu_clk");	3416	*tsu_clk = devm_clk_get_optional(&pdev->dev, "tsu_clk");
3417	if (IS_ERR(*tsu_clk))	3417	if (IS_ERR(*tsu_clk))
3418	*tsu_clk = NULL;	3418	return PTR_ERR(*tsu_clk);
3419		3419
3420	err = clk_prepare_enable(*pclk);	3420	err = clk_prepare_enable(*pclk);
3421	if (err) {	3421	if (err) {

drivers/net/ethernet/cavium/common/cavium_ptp.h+1−1

@@ -1,4 +1,4 @@
1	// SPDX-License-Identifier: GPL-2.0	1	/* SPDX-License-Identifier: GPL-2.0 */
2	/* cavium_ptp.h - PTP 1588 clock on Cavium hardware	2	/* cavium_ptp.h - PTP 1588 clock on Cavium hardware
3	* Copyright (c) 2003-2015, 2017 Cavium, Inc.	3	* Copyright (c) 2003-2015, 2017 Cavium, Inc.
4	*/	4	*/

drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c+49−1

@@ -1235,6 +1235,8 @@ static void dpaa2_eth_set_rx_taildrop(struct dpaa2_eth_priv *priv, bool enable) · 1234 unmodified lines
1235	priv->rx_td_enabled = enable;	1235	priv->rx_td_enabled = enable;
1236	}	1236	}
1237		1237
		1238	static void update_tx_fqids(struct dpaa2_eth_priv *priv);
		1239
1238	static int link_state_update(struct dpaa2_eth_priv *priv)	1240	static int link_state_update(struct dpaa2_eth_priv *priv)
1239	{	1241	{
1240	struct dpni_link_state state = {0};	1242	struct dpni_link_state state = {0};
@@ -1261,6 +1263,7 @@ static int link_state_update(struct dpaa2_eth_priv *priv) · 20 unmodified lines
1261	goto out;	1263	goto out;
1262		1264
1263	if (state.up) {	1265	if (state.up) {
		1266	update_tx_fqids(priv);
1264	netif_carrier_on(priv->net_dev);	1267	netif_carrier_on(priv->net_dev);
1265	netif_tx_start_all_queues(priv->net_dev);	1268	netif_tx_start_all_queues(priv->net_dev);
1266	} else {	1269	} else {
@@ -2533,6 +2536,47 @@ static int set_pause(struct dpaa2_eth_priv *priv) · 1266 unmodified lines
2533	return 0;	2536	return 0;
2534	}	2537	}
2535		2538
		2539	static void update_tx_fqids(struct dpaa2_eth_priv *priv)
		2540	{
		2541	struct dpni_queue_id qid = {0};
		2542	struct dpaa2_eth_fq *fq;
		2543	struct dpni_queue queue;
		2544	int i, j, err;
		2545
		2546	/* We only use Tx FQIDs for FQID-based enqueue, so check
		2547	* if DPNI version supports it before updating FQIDs
		2548	*/
		2549	if (dpaa2_eth_cmp_dpni_ver(priv, DPNI_ENQUEUE_FQID_VER_MAJOR,
		2550	DPNI_ENQUEUE_FQID_VER_MINOR) < 0)
		2551	return;
		2552
		2553	for (i = 0; i < priv->num_fqs; i++) {
		2554	fq = &priv->fq[i];
		2555	if (fq->type != DPAA2_TX_CONF_FQ)
		2556	continue;
		2557	for (j = 0; j < dpaa2_eth_tc_count(priv); j++) {
		2558	err = dpni_get_queue(priv->mc_io, 0, priv->mc_token,
		2559	DPNI_QUEUE_TX, j, fq->flowid,
		2560	&queue, &qid);
		2561	if (err)
		2562	goto out_err;
		2563
		2564	fq->tx_fqid[j] = qid.fqid;
		2565	if (fq->tx_fqid[j] == 0)
		2566	goto out_err;
		2567	}
		2568	}
		2569
		2570	priv->enqueue = dpaa2_eth_enqueue_fq;
		2571
		2572	return;
		2573
		2574	out_err:
		2575	netdev_info(priv->net_dev,
		2576	"Error reading Tx FQID, fallback to QDID-based enqueue\n");
		2577	priv->enqueue = dpaa2_eth_enqueue_qd;
		2578	}
		2579
2536	/* Configure the DPNI object this interface is associated with */	2580	/* Configure the DPNI object this interface is associated with */
2537	static int setup_dpni(struct fsl_mc_device *ls_dev)	2581	static int setup_dpni(struct fsl_mc_device *ls_dev)
2538	{	2582	{
@@ -3306,6 +3350,9 @@ static irqreturn_t dpni_irq0_handler_thread(int irq_num, void *arg) · 767 unmodified lines
3306	if (status & DPNI_IRQ_EVENT_LINK_CHANGED)	3350	if (status & DPNI_IRQ_EVENT_LINK_CHANGED)
3307	link_state_update(netdev_priv(net_dev));	3351	link_state_update(netdev_priv(net_dev));
3308		3352
		3353	if (status & DPNI_IRQ_EVENT_ENDPOINT_CHANGED)
		3354	set_mac_addr(netdev_priv(net_dev));
		3355
3309	return IRQ_HANDLED;	3356	return IRQ_HANDLED;
3310	}	3357	}
3311		3358
@@ -3331,7 +3378,8 @@ static int setup_irqs(struct fsl_mc_device *ls_dev) · 19 unmodified lines
3331	}	3378	}
3332		3379
3333	err = dpni_set_irq_mask(ls_dev->mc_io, 0, ls_dev->mc_handle,	3380	err = dpni_set_irq_mask(ls_dev->mc_io, 0, ls_dev->mc_handle,
3334	DPNI_IRQ_INDEX, DPNI_IRQ_EVENT_LINK_CHANGED);	3381	DPNI_IRQ_INDEX, DPNI_IRQ_EVENT_LINK_CHANGED \|
		3382	DPNI_IRQ_EVENT_ENDPOINT_CHANGED);
3335	if (err < 0) {	3383	if (err < 0) {
3336	dev_err(&ls_dev->dev, "dpni_set_irq_mask(): %d\n", err);	3384	dev_err(&ls_dev->dev, "dpni_set_irq_mask(): %d\n", err);
3337	goto free_irq;	3385	goto free_irq;

drivers/net/ethernet/freescale/dpaa2/dpni.h+4−1

  */
 #define DPNI_IRQ_INDEX				0
 /**
- * IRQ event - indicates a change in link state
+ * IRQ events:
+ *       indicates a change in link state
+ *       indicates a change in endpoint
  */
 #define DPNI_IRQ_EVENT_LINK_CHANGED		0x00000001
+#define DPNI_IRQ_EVENT_ENDPOINT_CHANGED		0x00000002
 int dpni_set_irq_enable(struct fsl_mc_io	*mc_io,
 			u32			cmd_flags,

drivers/net/ethernet/hisilicon/hns3/hnae3.h+2−0

@@ -32,6 +32,8 @@ · 31 unmodified lines
32		32
33	#define HNAE3_MOD_VERSION "1.0"	33	#define HNAE3_MOD_VERSION "1.0"
34		34
		35	#define HNAE3_MIN_VECTOR_NUM 2 /* first one for misc, another for IO */
		36
35	/* Device IDs */	37	/* Device IDs */
36	#define HNAE3_DEV_ID_GE 0xA220	38	#define HNAE3_DEV_ID_GE 0xA220
37	#define HNAE3_DEV_ID_25GE 0xA221	39	#define HNAE3_DEV_ID_25GE 0xA221

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c+20−1

 		hnae3_get_field(__le16_to_cpu(req->pf_intr_vector_number),
 				HCLGE_PF_VEC_NUM_M, HCLGE_PF_VEC_NUM_S);
+		/* nic's msix numbers is always equals to the roce's. */
+		hdev->num_nic_msi = hdev->num_roce_msi;
 		/* PF should have NIC vectors and Roce vectors,
 		 * NIC vectors are queued before Roce vectors.
 		 */
 		hdev->num_msi =
 		hnae3_get_field(__le16_to_cpu(req->pf_intr_vector_number),
 				HCLGE_PF_VEC_NUM_M, HCLGE_PF_VEC_NUM_S);
+		hdev->num_nic_msi = hdev->num_msi;
+	}
+	if (hdev->num_nic_msi < HNAE3_MIN_VECTOR_NUM) {
+		dev_err(&hdev->pdev->dev,
+			"Just %u msi resources, not enough for pf(min:2).\n",
+			hdev->num_nic_msi);
+		return -EINVAL;
 	}
 	return 0;
 	kinfo->rss_size = min_t(u16, hdev->rss_size_max,
 				vport->alloc_tqps / hdev->tm_info.num_tc);
+	/* ensure one to one mapping between irq and queue at default */
+	kinfo->rss_size = min_t(u16, kinfo->rss_size,
+				(hdev->num_nic_msi - 1) / hdev->tm_info.num_tc);
 	return 0;
 }
 	int vectors;
 	int i;
-	vectors = pci_alloc_irq_vectors(pdev, 1, hdev->num_msi,
+	vectors = pci_alloc_irq_vectors(pdev, HNAE3_MIN_VECTOR_NUM,
+					hdev->num_msi,
 					PCI_IRQ_MSI | PCI_IRQ_MSIX);
 	if (vectors < 0) {
 		dev_err(&pdev->dev,
 	hdev->num_msi = vectors;
 	hdev->num_msi_left = vectors;
 	hdev->base_msi_vector = pdev->irq;
 	hdev->roce_base_vector = hdev->base_msi_vector +
 				hdev->roce_base_msix_offset;
 	int alloc = 0;
 	int i, j;
+	vector_num = min_t(u16, hdev->num_nic_msi - 1, vector_num);
 	vector_num = min(hdev->num_msi_left, vector_num);
 	for (j = 0; j < vector_num; j++) {

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h+1−0

@@ -763,6 +763,7 @@ struct hclge_dev { · 762 unmodified lines
763	u32 base_msi_vector;	763	u32 base_msi_vector;
764	u16 *vector_status;	764	u16 *vector_status;
765	int *vector_irq;	765	int *vector_irq;
		766	u16 num_nic_msi; /* Num of nic vectors for this PF */
766	u16 num_roce_msi; /* Num of roce vectors for this PF */	767	u16 num_roce_msi; /* Num of roce vectors for this PF */
767	int roce_base_vector;	768	int roce_base_vector;
768		769

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c+9−2

 		kinfo->rss_size = kinfo->req_rss_size;
 	} else if (kinfo->rss_size > max_rss_size ||
 		   (!kinfo->req_rss_size && kinfo->rss_size < max_rss_size)) {
+		/* if user not set rss, the rss_size should compare with the
+		 * valid msi numbers to ensure one to one map between tqp and
+		 * irq as default.
+		 */
+		if (!kinfo->req_rss_size)
+			max_rss_size = min_t(u16, max_rss_size,
+					     (hdev->num_nic_msi - 1) /
+					     kinfo->num_tc);
 		/* Set to the maximum specification value (max_rss_size). */
-		dev_info(&hdev->pdev->dev, "rss changes from %d to %d\n",
-			 kinfo->rss_size, max_rss_size);
 		kinfo->rss_size = max_rss_size;
 	}

drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c+25−3

 		kinfo->tqp[i] = &hdev->htqp[i].q;
 	}
+	/* after init the max rss_size and tqps, adjust the default tqp numbers
+	 * and rss size with the actual vector numbers
+	 */
+	kinfo->num_tqps = min_t(u16, hdev->num_nic_msix - 1, kinfo->num_tqps);
+	kinfo->rss_size = min_t(u16, kinfo->num_tqps / kinfo->num_tc,
+				kinfo->rss_size);
 	return 0;
 }
 	int alloc = 0;
 	int i, j;
+	vector_num = min_t(u16, hdev->num_nic_msix - 1, vector_num);
 	vector_num = min(hdev->num_msi_left, vector_num);
 	for (j = 0; j < vector_num; j++) {
 	int vectors;
 	int i;
-	if (hnae3_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B))
+	if (hnae3_dev_roce_supported(hdev))
 		vectors = pci_alloc_irq_vectors(pdev,
 						hdev->roce_base_msix_offset + 1,
 						hdev->num_msi,
 						PCI_IRQ_MSIX);
 	else
-		vectors = pci_alloc_irq_vectors(pdev, 1, hdev->num_msi,
+		vectors = pci_alloc_irq_vectors(pdev, HNAE3_MIN_VECTOR_NUM,
+						hdev->num_msi,
 						PCI_IRQ_MSI | PCI_IRQ_MSIX);
 	if (vectors < 0) {
 	hdev->num_msi = vectors;
 	hdev->num_msi_left = vectors;
 	hdev->base_msi_vector = pdev->irq;
 	hdev->roce_base_vector = pdev->irq + hdev->roce_base_msix_offset;
 	req = (struct hclgevf_query_res_cmd *)desc.data;
-	if (hnae3_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B)) {
+	if (hnae3_dev_roce_supported(hdev)) {
 		hdev->roce_base_msix_offset =
 		hnae3_get_field(__le16_to_cpu(req->msixcap_localid_ba_rocee),
 				HCLGEVF_MSIX_OFT_ROCEE_M,
 		hnae3_get_field(__le16_to_cpu(req->vf_intr_vector_number),
 				HCLGEVF_VEC_NUM_M, HCLGEVF_VEC_NUM_S);
+		/* nic's msix numbers is always equals to the roce's. */
+		hdev->num_nic_msix = hdev->num_roce_msix;
 		/* VF should have NIC vectors and Roce vectors, NIC vectors
 		 * are queued before Roce vectors. The offset is fixed to 64.
 		 */
 		hdev->num_msi =
 		hnae3_get_field(__le16_to_cpu(req->vf_intr_vector_number),
 				HCLGEVF_VEC_NUM_M, HCLGEVF_VEC_NUM_S);
+		hdev->num_nic_msix = hdev->num_msi;
+	}
+	if (hdev->num_nic_msix < HNAE3_MIN_VECTOR_NUM) {
+		dev_err(&hdev->pdev->dev,
+			"Just %u msi resources, not enough for vf(min:2).\n",
+			hdev->num_nic_msix);
+		return -EINVAL;
 	}
 	return 0;

drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h+1−0

@@ -270,6 +270,7 @@ struct hclgevf_dev { · 269 unmodified lines
270	u16 num_msi;	270	u16 num_msi;
271	u16 num_msi_left;	271	u16 num_msi_left;
272	u16 num_msi_used;	272	u16 num_msi_used;
		273	u16 num_nic_msix; /* Num of nic vectors for this VF */
273	u16 num_roce_msix; /* Num of roce vectors for this VF */	274	u16 num_roce_msix; /* Num of roce vectors for this VF */
274	u16 roce_base_msix_offset;	275	u16 roce_base_msix_offset;
275	int roce_base_vector;	276	int roce_base_vector;

drivers/net/ethernet/i825xx/lasi_82596.c+3−1

 #define OPT_SWAP_PORT	0x0001	/* Need to wordswp on the MPU port */
+#define LIB82596_DMA_ATTR	DMA_ATTR_NON_CONSISTENT
 #define DMA_WBACK(ndev, addr, len) \
 	do { dma_cache_sync((ndev)->dev.parent, (void *)addr, len, DMA_TO_DEVICE); } while (0)
 	unregister_netdev (dev);
 	dma_free_attrs(&pdev->dev, sizeof(struct i596_private), lp->dma,
-		       lp->dma_addr, DMA_ATTR_NON_CONSISTENT);
+		       lp->dma_addr, LIB82596_DMA_ATTR);
 	free_netdev (dev);
 	return 0;
 }

drivers/net/ethernet/i825xx/lib82596.c+2−2

@@ -1065,7 +1065,7 @@ static int i82596_probe(struct net_device *dev) · 1064 unmodified lines
1065		1065
1066	dma = dma_alloc_attrs(dev->dev.parent, sizeof(struct i596_dma),	1066	dma = dma_alloc_attrs(dev->dev.parent, sizeof(struct i596_dma),
1067	&lp->dma_addr, GFP_KERNEL,	1067	&lp->dma_addr, GFP_KERNEL,
1068	DMA_ATTR_NON_CONSISTENT);	1068	LIB82596_DMA_ATTR);
1069	if (!dma) {	1069	if (!dma) {
1070	printk(KERN_ERR "%s: Couldn't get shared memory\n", __FILE__);	1070	printk(KERN_ERR "%s: Couldn't get shared memory\n", __FILE__);
1071	return -ENOMEM;	1071	return -ENOMEM;
@@ -1087,7 +1087,7 @@ static int i82596_probe(struct net_device *dev) · 15 unmodified lines
1087	i = register_netdev(dev);	1087	i = register_netdev(dev);
1088	if (i) {	1088	if (i) {
1089	dma_free_attrs(dev->dev.parent, sizeof(struct i596_dma),	1089	dma_free_attrs(dev->dev.parent, sizeof(struct i596_dma),
1090	dma, lp->dma_addr, DMA_ATTR_NON_CONSISTENT);	1090	dma, lp->dma_addr, LIB82596_DMA_ATTR);
1091	return i;	1091	return i;
1092	}	1092	}
1093		1093

drivers/net/ethernet/i825xx/sni_82596.c+3−1

 static const char sni_82596_string[] = "snirm_82596";
+#define LIB82596_DMA_ATTR	0
 #define DMA_WBACK(priv, addr, len)     do { } while (0)
 #define DMA_INV(priv, addr, len)       do { } while (0)
 #define DMA_WBACK_INV(priv, addr, len) do { } while (0)
 	unregister_netdev(dev);
 	dma_free_attrs(dev->dev.parent, sizeof(struct i596_private), lp->dma,
-		       lp->dma_addr, DMA_ATTR_NON_CONSISTENT);
+		       lp->dma_addr, LIB82596_DMA_ATTR);
 	iounmap(lp->ca);
 	iounmap(lp->mpu_port);
 	free_netdev (dev);

drivers/net/ethernet/ibm/ibmvnic.c+3−5

 	if (test_bit(0, &adapter->resetting) &&
 	    adapter->reset_reason == VNIC_RESET_MOBILITY) {
-		u64 val = (0xff000000) | scrq->hw_irq;
+		struct irq_desc *desc = irq_to_desc(scrq->irq);
+		struct irq_chip *chip = irq_desc_get_chip(desc);
-		rc = plpar_hcall_norets(H_EOI, val);
+		chip->irq_eoi(&desc->irq_data);
-		if (rc)
-			dev_err(dev, "H_EOI FAILED irq 0x%llx. rc=%ld\n",
-				val, rc);
 	}
 	rc = plpar_hcall_norets(H_VIOCTL, adapter->vdev->unit_address,

drivers/net/ethernet/mediatek/mtk_eth_soc.c+1−0

@@ -261,6 +261,7 @@ static void mtk_mac_config(struct phylink_config *config, unsigned int mode, · 260 unmodified lines
261	ge_mode = 0;	261	ge_mode = 0;
262	switch (state->interface) {	262	switch (state->interface) {
263	case PHY_INTERFACE_MODE_MII:	263	case PHY_INTERFACE_MODE_MII:
		264	case PHY_INTERFACE_MODE_GMII:
264	ge_mode = 1;	265	ge_mode = 1;
265	break;	266	break;
266	case PHY_INTERFACE_MODE_REVMII:	267	case PHY_INTERFACE_MODE_REVMII:

drivers/net/ethernet/mellanox/mlx5/core/steering/dr_rule.c+4−6

@@ -788,12 +788,10 @@ again: · 787 unmodified lines
788	* it means that all the previous stes are the same,	788	* it means that all the previous stes are the same,
789	* if so, this rule is duplicated.	789	* if so, this rule is duplicated.
790	*/	790	*/
791	if (mlx5dr_ste_is_last_in_rule(nic_matcher,	791	if (!mlx5dr_ste_is_last_in_rule(nic_matcher, ste_location))
792	matched_ste->ste_chain_location)) {	792	return matched_ste;
793	mlx5dr_info(dmn, "Duplicate rule inserted, aborting!!\n");	793
794	return NULL;	794	mlx5dr_dbg(dmn, "Duplicate rule inserted\n");
795	}
796	return matched_ste;
797	}	795	}
798		796
799	if (!skip_rehash && dr_rule_need_enlarge_hash(cur_htbl, dmn, nic_dmn)) {	797	if (!skip_rehash && dr_rule_need_enlarge_hash(cur_htbl, dmn, nic_dmn)) {

drivers/net/ethernet/mellanox/mlxsw/spectrum_trap.c+1−0

@@ -99,6 +99,7 @@ static void mlxsw_sp_rx_drop_listener(struct sk_buff *skb, u8 local_port, · 98 unmodified lines
99	devlink = priv_to_devlink(mlxsw_sp->core);	99	devlink = priv_to_devlink(mlxsw_sp->core);
100	in_devlink_port = mlxsw_core_port_devlink_port_get(mlxsw_sp->core,	100	in_devlink_port = mlxsw_core_port_devlink_port_get(mlxsw_sp->core,
101	local_port);	101	local_port);
		102	skb_push(skb, ETH_HLEN);
102	devlink_trap_report(devlink, skb, trap_ctx, in_devlink_port);	103	devlink_trap_report(devlink, skb, trap_ctx, in_devlink_port);
103	consume_skb(skb);	104	consume_skb(skb);
104	}	105	}

drivers/net/ethernet/nxp/lpc_eth.c+0−3

@@ -1356,9 +1356,6 @@ static int lpc_eth_drv_probe(struct platform_device *pdev) · 1355 unmodified lines
1356	if (!is_valid_ether_addr(ndev->dev_addr))	1356	if (!is_valid_ether_addr(ndev->dev_addr))
1357	eth_hw_addr_random(ndev);	1357	eth_hw_addr_random(ndev);
1358		1358
1359	/* Reset the ethernet controller */
1360	__lpc_eth_reset(pldat);
1361
1362	/* then shut everything down to save power */	1359	/* then shut everything down to save power */
1363	__lpc_eth_shutdown(pldat);	1360	__lpc_eth_shutdown(pldat);
1364		1361

drivers/net/ethernet/pensando/ionic/ionic_lif.h+2−0

@@ -182,6 +182,8 @@ struct ionic_lif { · 181 unmodified lines
182		182
183	#define lif_to_txqcq(lif, i) ((lif)->txqcqs[i].qcq)	183	#define lif_to_txqcq(lif, i) ((lif)->txqcqs[i].qcq)
184	#define lif_to_rxqcq(lif, i) ((lif)->rxqcqs[i].qcq)	184	#define lif_to_rxqcq(lif, i) ((lif)->rxqcqs[i].qcq)
		185	#define lif_to_txstats(lif, i) ((lif)->txqcqs[i].stats->tx)
		186	#define lif_to_rxstats(lif, i) ((lif)->rxqcqs[i].stats->rx)
185	#define lif_to_txq(lif, i) (&lif_to_txqcq((lif), i)->q)	187	#define lif_to_txq(lif, i) (&lif_to_txqcq((lif), i)->q)
186	#define lif_to_rxq(lif, i) (&lif_to_txqcq((lif), i)->q)	188	#define lif_to_rxq(lif, i) (&lif_to_txqcq((lif), i)->q)
187		189

drivers/net/ethernet/pensando/ionic/ionic_stats.c+19−10

 	/* rx stats */
 	total += MAX_Q(lif) * IONIC_NUM_RX_STATS;
-	if (test_bit(IONIC_LIF_SW_DEBUG_STATS, lif->state)) {
+	if (test_bit(IONIC_LIF_UP, lif->state) &&
+	    test_bit(IONIC_LIF_SW_DEBUG_STATS, lif->state)) {
 		/* tx debug stats */
 		total += MAX_Q(lif) * (IONIC_NUM_DBG_CQ_STATS +
 				      IONIC_NUM_TX_Q_STATS +
 			*buf += ETH_GSTRING_LEN;
 		}
-		if (test_bit(IONIC_LIF_SW_DEBUG_STATS, lif->state)) {
+		if (test_bit(IONIC_LIF_UP, lif->state) &&
+		    test_bit(IONIC_LIF_SW_DEBUG_STATS, lif->state)) {
 			for (i = 0; i < IONIC_NUM_TX_Q_STATS; i++) {
 				snprintf(*buf, ETH_GSTRING_LEN,
 					 "txq_%d_%s",
 			*buf += ETH_GSTRING_LEN;
 		}
-		if (test_bit(IONIC_LIF_SW_DEBUG_STATS, lif->state)) {
+		if (test_bit(IONIC_LIF_UP, lif->state) &&
+		    test_bit(IONIC_LIF_SW_DEBUG_STATS, lif->state)) {
 			for (i = 0; i < IONIC_NUM_DBG_CQ_STATS; i++) {
 				snprintf(*buf, ETH_GSTRING_LEN,
 					 "rxq_%d_cq_%s",
 {
 	struct ionic_lif_sw_stats lif_stats;
 	struct ionic_qcq *txqcq, *rxqcq;
+	struct ionic_tx_stats *txstats;
+	struct ionic_rx_stats *rxstats;
 	int i, q_num;
 	ionic_get_lif_stats(lif, &lif_stats);
 	}
 	for (q_num = 0; q_num < MAX_Q(lif); q_num++) {
-		txqcq = lif_to_txqcq(lif, q_num);
+		txstats = &lif_to_txstats(lif, q_num);
 		for (i = 0; i < IONIC_NUM_TX_STATS; i++) {
-			**buf = IONIC_READ_STAT64(&txqcq->stats->tx,
+			**buf = IONIC_READ_STAT64(txstats,
 						  &ionic_tx_stats_desc[i]);
 			(*buf)++;
 		}
-		if (test_bit(IONIC_LIF_SW_DEBUG_STATS, lif->state)) {
+		if (test_bit(IONIC_LIF_UP, lif->state) &&
+		    test_bit(IONIC_LIF_SW_DEBUG_STATS, lif->state)) {
+			txqcq = lif_to_txqcq(lif, q_num);
 			for (i = 0; i < IONIC_NUM_TX_Q_STATS; i++) {
 				**buf = IONIC_READ_STAT64(&txqcq->q,
 						      &ionic_txq_stats_desc[i]);
 				(*buf)++;
 			}
 			for (i = 0; i < IONIC_MAX_NUM_SG_CNTR; i++) {
-				**buf = txqcq->stats->tx.sg_cntr[i];
+				**buf = txstats->sg_cntr[i];
 				(*buf)++;
 			}
 		}
 	}
 	for (q_num = 0; q_num < MAX_Q(lif); q_num++) {
-		rxqcq = lif_to_rxqcq(lif, q_num);
+		rxstats = &lif_to_rxstats(lif, q_num);
 		for (i = 0; i < IONIC_NUM_RX_STATS; i++) {
-			**buf = IONIC_READ_STAT64(&rxqcq->stats->rx,
+			**buf = IONIC_READ_STAT64(rxstats,
 						  &ionic_rx_stats_desc[i]);
 			(*buf)++;
 		}
-		if (test_bit(IONIC_LIF_SW_DEBUG_STATS, lif->state)) {
+		if (test_bit(IONIC_LIF_UP, lif->state) &&
+		    test_bit(IONIC_LIF_SW_DEBUG_STATS, lif->state)) {
+			rxqcq = lif_to_rxqcq(lif, q_num);
 			for (i = 0; i < IONIC_NUM_DBG_CQ_STATS; i++) {
 				**buf = IONIC_READ_STAT64(&rxqcq->cq,
 						   &ionic_dbg_cq_stats_desc[i]);

drivers/net/ethernet/realtek/r8169_main.c+11−24

 	rtl_lock_config_regs(tp);
 }
+static void rtl_jumbo_config(struct rtl8169_private *tp, int mtu)
+{
+	if (mtu > ETH_DATA_LEN)
+		rtl_hw_jumbo_enable(tp);
+	else
+		rtl_hw_jumbo_disable(tp);
+}
 DECLARE_RTL_COND(rtl_chipcmd_cond)
 {
 	return RTL_R8(tp, ChipCmd) & CmdReset;
 static void rtl_hw_start_8168bb(struct rtl8169_private *tp)
 {
 	RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
-	if (tp->dev->mtu <= ETH_DATA_LEN) {
-		rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B |
-					 PCI_EXP_DEVCTL_NOSNOOP_EN);
-	}
 }
 static void rtl_hw_start_8168bef(struct rtl8169_private *tp)
 	RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
-	if (tp->dev->mtu <= ETH_DATA_LEN)
-		rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
 	rtl_disable_clock_request(tp);
 }
 	rtl_set_def_aspm_entry_latency(tp);
 	RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
-	if (tp->dev->mtu <= ETH_DATA_LEN)
-		rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
 }
 static void rtl_hw_start_8168cp_3(struct rtl8169_private *tp)
 	/* Magic. */
 	RTL_W8(tp, DBG_REG, 0x20);
-	if (tp->dev->mtu <= ETH_DATA_LEN)
-		rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
 }
 static void rtl_hw_start_8168c_1(struct rtl8169_private *tp)
 	rtl_ephy_init(tp, e_info_8168e_1);
-	if (tp->dev->mtu <= ETH_DATA_LEN)
-		rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
 	rtl_disable_clock_request(tp);
 	/* Reset tx FIFO pointer */
 	rtl_ephy_init(tp, e_info_8168e_2);
-	if (tp->dev->mtu <= ETH_DATA_LEN)
-		rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
 	rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000);
 	rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000);
 	rtl_set_fifo_size(tp, 0x10, 0x10, 0x02, 0x06);
 	rtl_set_rx_tx_desc_registers(tp);
 	rtl_lock_config_regs(tp);
+	rtl_jumbo_config(tp, tp->dev->mtu);
 	/* Initially a 10 us delay. Turned it into a PCI commit. - FR */
 	RTL_R16(tp, CPlusCmd);
 	RTL_W8(tp, ChipCmd, CmdTxEnb | CmdRxEnb);
 {
 	struct rtl8169_private *tp = netdev_priv(dev);
-	if (new_mtu > ETH_DATA_LEN)
+	rtl_jumbo_config(tp, new_mtu);
-		rtl_hw_jumbo_enable(tp);
-	else
-		rtl_hw_jumbo_disable(tp);
 	dev->mtu = new_mtu;
 	netdev_update_features(dev);

drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c+2−1

@@ -651,7 +651,8 @@ static void sun8i_dwmac_set_filter(struct mac_device_info *hw, · 650 unmodified lines
651	}	651	}
652	}	652	}
653	} else {	653	} else {
654	netdev_info(dev, "Too many address, switching to promiscuous\n");	654	if (!(readl(ioaddr + EMAC_RX_FRM_FLT) & EMAC_FRM_FLT_RXALL))
		655	netdev_info(dev, "Too many address, switching to promiscuous\n");
655	v = EMAC_FRM_FLT_RXALL;	656	v = EMAC_FRM_FLT_RXALL;
656	}	657	}
657		658

drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c+1−1

@@ -448,7 +448,7 @@ static void dwmac4_set_filter(struct mac_device_info *hw, · 447 unmodified lines
448	value \|= GMAC_PACKET_FILTER_HPF;	448	value \|= GMAC_PACKET_FILTER_HPF;
449		449
450	/* Handle multiple unicast addresses */	450	/* Handle multiple unicast addresses */
451	if (netdev_uc_count(dev) > GMAC_MAX_PERFECT_ADDRESSES) {	451	if (netdev_uc_count(dev) > hw->unicast_filter_entries) {
452	/* Switch to promiscuous mode if more than 128 addrs	452	/* Switch to promiscuous mode if more than 128 addrs
453	* are required	453	* are required
454	*/	454	*/

drivers/net/ethernet/stmicro/stmmac/dwmac5.c+1−0

@@ -515,6 +515,7 @@ int dwmac5_flex_pps_config(void __iomem *ioaddr, int index, · 514 unmodified lines
515		515
516	if (!enable) {	516	if (!enable) {
517	val \|= PPSCMDx(index, 0x5);	517	val \|= PPSCMDx(index, 0x5);
		518	val \|= PPSEN0;
518	writel(val, ioaddr + MAC_PPS_CONTROL);	519	writel(val, ioaddr + MAC_PPS_CONTROL);
519	return 0;	520	return 0;
520	}	521	}

drivers/net/ethernet/stmicro/stmmac/stmmac_main.c+9−5

 	}
 	if (priv->hw->pcs)
-		stmmac_pcs_ctrl_ane(priv, priv->hw, 1, priv->hw->ps, 0);
+		stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 1, priv->hw->ps, 0);
 	/* set TX and RX rings length */
 	stmmac_set_rings_length(priv);
 		stmmac_mac_set(priv, priv->ioaddr, false);
 		pinctrl_pm_select_sleep_state(priv->device);
 		/* Disable clock in case of PWM is off */
-		clk_disable(priv->plat->pclk);
+		if (priv->plat->clk_ptp_ref)
-		clk_disable(priv->plat->stmmac_clk);
+			clk_disable_unprepare(priv->plat->clk_ptp_ref);
+		clk_disable_unprepare(priv->plat->pclk);
+		clk_disable_unprepare(priv->plat->stmmac_clk);
 	}
 	mutex_unlock(&priv->lock);
 	} else {
 		pinctrl_pm_select_default_state(priv->device);
 		/* enable the clk previously disabled */
-		clk_enable(priv->plat->stmmac_clk);
+		clk_prepare_enable(priv->plat->stmmac_clk);
-		clk_enable(priv->plat->pclk);
+		clk_prepare_enable(priv->plat->pclk);
+		if (priv->plat->clk_ptp_ref)
+			clk_prepare_enable(priv->plat->clk_ptp_ref);
 		/* reset the phy so that it's ready */
 		if (priv->mii)
 			stmmac_mdio_reset(priv->mii);

drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c+1−1

@@ -164,7 +164,7 @@ static int stmmac_enable(struct ptp_clock_info *ptp, · 163 unmodified lines
164	/* structure describing a PTP hardware clock */	164	/* structure describing a PTP hardware clock */
165	static struct ptp_clock_info stmmac_ptp_clock_ops = {	165	static struct ptp_clock_info stmmac_ptp_clock_ops = {
166	.owner = THIS_MODULE,	166	.owner = THIS_MODULE,
167	.name = "stmmac_ptp_clock",	167	.name = "stmmac ptp",
168	.max_adj = 62500000,	168	.max_adj = 62500000,
169	.n_alarm = 0,	169	.n_alarm = 0,
170	.n_ext_ts = 0,	170	.n_ext_ts = 0,

drivers/net/ethernet/stmicro/stmmac/stmmac_selftests.c+9−2

 static int stmmac_test_hfilt(struct stmmac_priv *priv)
 {
-	unsigned char gd_addr[ETH_ALEN] = {0x01, 0x00, 0xcc, 0xcc, 0xdd, 0xdd};
+	unsigned char gd_addr[ETH_ALEN] = {0x01, 0xee, 0xdd, 0xcc, 0xbb, 0xaa};
-	unsigned char bd_addr[ETH_ALEN] = {0x09, 0x00, 0xaa, 0xaa, 0xbb, 0xbb};
+	unsigned char bd_addr[ETH_ALEN] = {0x01, 0x01, 0x02, 0x03, 0x04, 0x05};
 	struct stmmac_packet_attrs attr = { };
 	int ret;
 	if (ret)
 		return ret;
+	if (netdev_mc_count(priv->dev) >= priv->hw->multicast_filter_bins)
+		return -EOPNOTSUPP;
 	ret = dev_mc_add(priv->dev, gd_addr);
 	if (ret)
 		return ret;
 	if (stmmac_filter_check(priv))
 		return -EOPNOTSUPP;
+	if (!priv->hw->multicast_filter_bins)
+		return -EOPNOTSUPP;
 	/* Remove all MC addresses */
 	__dev_mc_unsync(priv->dev, NULL);
 	if (stmmac_filter_check(priv))
 		return -EOPNOTSUPP;
+	if (!priv->hw->multicast_filter_bins)
+		return -EOPNOTSUPP;
 	/* Remove all UC addresses */
 	__dev_uc_unsync(priv->dev, NULL);

drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c+1−1

@@ -510,7 +510,7 @@ static struct stmmac_flow_entry tc_find_flow(struct stmmac_priv priv, · 509 unmodified lines
510	return NULL;	510	return NULL;
511	}	511	}
512		512
513	struct {	513	static struct {
514	int (fn)(struct stmmac_priv priv, struct flow_cls_offload *cls,	514	int (fn)(struct stmmac_priv priv, struct flow_cls_offload *cls,
515	struct stmmac_flow_entry *entry);	515	struct stmmac_flow_entry *entry);
516	} tc_flow_parsers[] = {	516	} tc_flow_parsers[] = {

drivers/net/ethernet/ti/davinci_cpdma.c+1−1

@@ -722,7 +722,7 @@ static void cpdma_chan_set_descs(struct cpdma_ctlr *ctlr, · 721 unmodified lines
722	* cpdma_chan_split_pool - Splits ctrl pool between all channels.	722	* cpdma_chan_split_pool - Splits ctrl pool between all channels.
723	* Has to be called under ctlr lock	723	* Has to be called under ctlr lock
724	*/	724	*/
725	int cpdma_chan_split_pool(struct cpdma_ctlr *ctlr)	725	static int cpdma_chan_split_pool(struct cpdma_ctlr *ctlr)
726	{	726	{
727	int tx_per_ch_desc = 0, rx_per_ch_desc = 0;	727	int tx_per_ch_desc = 0, rx_per_ch_desc = 0;
728	int free_rx_num = 0, free_tx_num = 0;	728	int free_rx_num = 0, free_tx_num = 0;

drivers/net/netdevsim/fib.c+2−1

 void nsim_fib_exit(void)
 {
-	unregister_pernet_subsys(&nsim_fib_net_ops);
 	unregister_fib_notifier(&nsim_fib_nb);
+	unregister_pernet_subsys(&nsim_fib_net_ops);
 }
 int nsim_fib_init(void)
 	err = register_fib_notifier(&nsim_fib_nb, nsim_fib_dump_inconsistent);
 	if (err < 0) {
 		pr_err("Failed to register fib notifier\n");
+		unregister_pernet_subsys(&nsim_fib_net_ops);
 		goto err_out;
 	}

drivers/net/phy/bcm7xxx.c+1−0

@@ -572,6 +572,7 @@ static int bcm7xxx_28nm_probe(struct phy_device *phydev) · 571 unmodified lines
572	.name = _name, \	572	.name = _name, \
573	/* PHY_BASIC_FEATURES */ \	573	/* PHY_BASIC_FEATURES */ \
574	.flags = PHY_IS_INTERNAL, \	574	.flags = PHY_IS_INTERNAL, \
		575	.soft_reset = genphy_soft_reset, \
575	.config_init = bcm7xxx_config_init, \	576	.config_init = bcm7xxx_config_init, \
576	.suspend = bcm7xxx_suspend, \	577	.suspend = bcm7xxx_suspend, \
577	.resume = bcm7xxx_config_init, \	578	.resume = bcm7xxx_config_init, \

drivers/net/phy/micrel.c+37−5

 	return genphy_config_aneg(phydev);
 }
+static int ksz8051_ksz8795_match_phy_device(struct phy_device *phydev,
+					    const u32 ksz_phy_id)
+{
+	int ret;
+	if ((phydev->phy_id & MICREL_PHY_ID_MASK) != ksz_phy_id)
+		return 0;
+	ret = phy_read(phydev, MII_BMSR);
+	if (ret < 0)
+		return ret;
+	/* KSZ8051 PHY and KSZ8794/KSZ8795/KSZ8765 switch share the same
+	 * exact PHY ID. However, they can be told apart by the extended
+	 * capability registers presence. The KSZ8051 PHY has them while
+	 * the switch does not.
+	 */
+	ret &= BMSR_ERCAP;
+	if (ksz_phy_id == PHY_ID_KSZ8051)
+		return ret;
+	else
+		return !ret;
+}
+static int ksz8051_match_phy_device(struct phy_device *phydev)
+{
+	return ksz8051_ksz8795_match_phy_device(phydev, PHY_ID_KSZ8051);
+}
 static int ksz8081_config_init(struct phy_device *phydev)
 {
 	/* KSZPHY_OMSO_FACTORY_TEST is set at de-assertion of the reset line
 	return kszphy_config_init(phydev);
 }
+static int ksz8795_match_phy_device(struct phy_device *phydev)
+{
+	return ksz8051_ksz8795_match_phy_device(phydev, PHY_ID_KSZ87XX);
+}
 static int ksz9021_load_values_from_of(struct phy_device *phydev,
 				       const struct device_node *of_node,
 				       u16 reg,
 	.suspend	= genphy_suspend,
 	.resume		= genphy_resume,
 }, {
-	.phy_id		= PHY_ID_KSZ8051,
-	.phy_id_mask	= MICREL_PHY_ID_MASK,
 	.name		= "Micrel KSZ8051",
 	/* PHY_BASIC_FEATURES */
 	.driver_data	= &ksz8051_type,
 	.get_sset_count = kszphy_get_sset_count,
 	.get_strings	= kszphy_get_strings,
 	.get_stats	= kszphy_get_stats,
+	.match_phy_device = ksz8051_match_phy_device,
 	.suspend	= genphy_suspend,
 	.resume		= genphy_resume,
 }, {
 	.suspend	= genphy_suspend,
 	.resume		= genphy_resume,
 }, {
-	.phy_id		= PHY_ID_KSZ8795,
+	.name		= "Micrel KSZ87XX Switch",
-	.phy_id_mask	= MICREL_PHY_ID_MASK,
-	.name		= "Micrel KSZ8795",
 	/* PHY_BASIC_FEATURES */
 	.config_init	= kszphy_config_init,
 	.config_aneg	= ksz8873mll_config_aneg,
 	.read_status	= ksz8873mll_read_status,
+	.match_phy_device = ksz8795_match_phy_device,
 	.suspend	= genphy_suspend,
 	.resume		= genphy_resume,
 }, {

drivers/net/phy/phy-c45.c+2−0

@@ -323,6 +323,8 @@ int genphy_c45_read_pma(struct phy_device *phydev) · 322 unmodified lines
323	{	323	{
324	int val;	324	int val;
325		325
		326	linkmode_zero(phydev->lp_advertising);
		327
326	val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1);	328	val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1);
327	if (val < 0)	329	if (val < 0)
328	return val;	330	return val;

drivers/net/phy/phy.c+0−3

@@ -572,9 +572,6 @@ int phy_start_aneg(struct phy_device *phydev) · 571 unmodified lines
572	if (AUTONEG_DISABLE == phydev->autoneg)	572	if (AUTONEG_DISABLE == phydev->autoneg)
573	phy_sanitize_settings(phydev);	573	phy_sanitize_settings(phydev);
574		574
575	/* Invalidate LP advertising flags */
576	linkmode_zero(phydev->lp_advertising);
577
578	err = phy_config_aneg(phydev);	575	err = phy_config_aneg(phydev);
579	if (err < 0)	576	if (err < 0)
580	goto out_unlock;	577	goto out_unlock;

drivers/net/phy/phy_device.c+10−1

 {
 	int lpa, lpagb;
-	if (phydev->autoneg == AUTONEG_ENABLE && phydev->autoneg_complete) {
+	if (phydev->autoneg == AUTONEG_ENABLE) {
+		if (!phydev->autoneg_complete) {
+			mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising,
+							0);
+			mii_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
+			return 0;
+		}
 		if (phydev->is_gigabit_capable) {
 			lpagb = phy_read(phydev, MII_STAT1000);
 			if (lpagb < 0)
 			return lpa;
 		mii_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
+	} else {
+		linkmode_zero(phydev->lp_advertising);
 	}
 	return 0;

drivers/net/phy/phylink.c+1−1

@@ -576,7 +576,7 @@ static int phylink_register_sfp(struct phylink *pl, · 575 unmodified lines
576		576
577	/**	577	/**
578	* phylink_create() - create a phylink instance	578	* phylink_create() - create a phylink instance
579	* @ndev: a pointer to the &struct net_device	579	* @config: a pointer to the target &struct phylink_config
580	* @fwnode: a pointer to a &struct fwnode_handle describing the network	580	* @fwnode: a pointer to a &struct fwnode_handle describing the network
581	* interface	581	* interface
582	* @iface: the desired link mode defined by &typedef phy_interface_t	582	* @iface: the desired link mode defined by &typedef phy_interface_t

drivers/net/tun.c+2−2

@@ -526,8 +526,8 @@ static void tun_flow_update(struct tun_struct *tun, u32 rxhash, · 525 unmodified lines
526	e = tun_flow_find(head, rxhash);	526	e = tun_flow_find(head, rxhash);
527	if (likely(e)) {	527	if (likely(e)) {
528	/* TODO: keep queueing to old queue until it's empty? */	528	/* TODO: keep queueing to old queue until it's empty? */
529	if (e->queue_index != queue_index)	529	if (READ_ONCE(e->queue_index) != queue_index)
530	e->queue_index = queue_index;	530	WRITE_ONCE(e->queue_index, queue_index);
531	if (e->updated != jiffies)	531	if (e->updated != jiffies)
532	e->updated = jiffies;	532	e->updated = jiffies;
533	sock_rps_record_flow_hash(e->rps_rxhash);	533	sock_rps_record_flow_hash(e->rps_rxhash);

drivers/net/usb/hso.c+9−4

 	int    intr_completed;
 	struct usb_endpoint_descriptor *endp;
 	struct urb *urb;
-	struct hso_serial_state_notification serial_state_notification;
+	struct hso_serial_state_notification *serial_state_notification;
 	u16    prev_UART_state_bitmap;
 	struct uart_icount icount;
 };
 			 usb_rcvintpipe(usb,
 					tiocmget->endp->
 					bEndpointAddress & 0x7F),
-			 &tiocmget->serial_state_notification,
+			 tiocmget->serial_state_notification,
 			 sizeof(struct hso_serial_state_notification),
 			 tiocmget_intr_callback, serial,
 			 tiocmget->endp->bInterval);
 	/* wIndex should be the USB interface number of the port to which the
 	 * notification applies, which should always be the Modem port.
 	 */
-	serial_state_notification = &tiocmget->serial_state_notification;
+	serial_state_notification = tiocmget->serial_state_notification;
 	if (serial_state_notification->bmRequestType != BM_REQUEST_TYPE ||
 	    serial_state_notification->bNotification != B_NOTIFICATION ||
 	    le16_to_cpu(serial_state_notification->wValue) != W_VALUE ||
 		usb_free_urb(tiocmget->urb);
 		tiocmget->urb = NULL;
 		serial->tiocmget = NULL;
+		kfree(tiocmget->serial_state_notification);
+		tiocmget->serial_state_notification = NULL;
 		kfree(tiocmget);
 	}
 }
 		num_urbs = 2;
 		serial->tiocmget = kzalloc(sizeof(struct hso_tiocmget),
 					   GFP_KERNEL);
+		serial->tiocmget->serial_state_notification
+			= kzalloc(sizeof(struct hso_serial_state_notification),
+					   GFP_KERNEL);
 		/* it isn't going to break our heart if serial->tiocmget
 		 *  allocation fails don't bother checking this.
 		 */
-		if (serial->tiocmget) {
+		if (serial->tiocmget && serial->tiocmget->serial_state_notification) {
 			tiocmget = serial->tiocmget;
 			tiocmget->endp = hso_get_ep(interface,
 						    USB_ENDPOINT_XFER_INT,

drivers/net/usb/lan78xx.c+6−6

 	/* driver requires remote-wakeup capability during autosuspend. */
 	intf->needs_remote_wakeup = 1;
+	ret = lan78xx_phy_init(dev);
+	if (ret < 0)
+		goto out4;
 	ret = register_netdev(netdev);
 	if (ret != 0) {
 		netif_err(dev, probe, netdev, "couldn't register the device\n");
-		goto out4;
+		goto out5;
 	}
 	usb_set_intfdata(intf, dev);
 	pm_runtime_set_autosuspend_delay(&udev->dev,
 					 DEFAULT_AUTOSUSPEND_DELAY);
-	ret = lan78xx_phy_init(dev);
-	if (ret < 0)
-		goto out5;
 	return 0;
 out5:
-	unregister_netdev(netdev);
+	phy_disconnect(netdev->phydev);
 out4:
 	usb_free_urb(dev->urb_intr);
 out3:

drivers/net/usb/qmi_wwan.c+1−0

@@ -1327,6 +1327,7 @@ static const struct usb_device_id products[] = { · 1326 unmodified lines
1327	{QMI_FIXED_INTF(0x2357, 0x0201, 4)}, /* TP-LINK HSUPA Modem MA180 */	1327	{QMI_FIXED_INTF(0x2357, 0x0201, 4)}, /* TP-LINK HSUPA Modem MA180 */
1328	{QMI_FIXED_INTF(0x2357, 0x9000, 4)}, /* TP-LINK MA260 */	1328	{QMI_FIXED_INTF(0x2357, 0x9000, 4)}, /* TP-LINK MA260 */
1329	{QMI_QUIRK_SET_DTR(0x1bc7, 0x1040, 2)}, /* Telit LE922A */	1329	{QMI_QUIRK_SET_DTR(0x1bc7, 0x1040, 2)}, /* Telit LE922A */
		1330	{QMI_QUIRK_SET_DTR(0x1bc7, 0x1050, 2)}, /* Telit FN980 */
1330	{QMI_FIXED_INTF(0x1bc7, 0x1100, 3)}, /* Telit ME910 */	1331	{QMI_FIXED_INTF(0x1bc7, 0x1100, 3)}, /* Telit ME910 */
1331	{QMI_FIXED_INTF(0x1bc7, 0x1101, 3)}, /* Telit ME910 dual modem */	1332	{QMI_FIXED_INTF(0x1bc7, 0x1101, 3)}, /* Telit ME910 dual modem */
1332	{QMI_FIXED_INTF(0x1bc7, 0x1200, 5)}, /* Telit LE920 */	1333	{QMI_FIXED_INTF(0x1bc7, 0x1200, 5)}, /* Telit LE920 */

drivers/net/usb/sr9800.c+1−1

@@ -335,7 +335,7 @@ static void sr_set_multicast(struct net_device *net) · 334 unmodified lines
335	static int sr_mdio_read(struct net_device *net, int phy_id, int loc)	335	static int sr_mdio_read(struct net_device *net, int phy_id, int loc)
336	{	336	{
337	struct usbnet *dev = netdev_priv(net);	337	struct usbnet *dev = netdev_priv(net);
338	__le16 res;	338	__le16 res = 0;
339		339
340	mutex_lock(&dev->phy_mutex);	340	mutex_lock(&dev->phy_mutex);
341	sr_set_sw_mii(dev);	341	sr_set_sw_mii(dev);

drivers/net/wireless/ath/ath10k/core.c+9−6

@@ -2118,12 +2118,15 @@ static int ath10k_init_uart(struct ath10k *ar) · 2117 unmodified lines
2118	return ret;	2118	return ret;
2119	}	2119	}
2120		2120
2121	if (!uart_print && ar->hw_params.uart_pin_workaround) {	2121	if (!uart_print) {
2122	ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin,	2122	if (ar->hw_params.uart_pin_workaround) {
2123	ar->hw_params.uart_pin);	2123	ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin,
2124	if (ret) {	2124	ar->hw_params.uart_pin);
2125	ath10k_warn(ar, "failed to set UART TX pin: %d", ret);	2125	if (ret) {
2126	return ret;	2126	ath10k_warn(ar, "failed to set UART TX pin: %d",
		2127	ret);
		2128	return ret;
		2129	}
2127	}	2130	}
2128		2131
2129	return 0;	2132	return 0;

drivers/net/wireless/intel/iwlwifi/fw/acpi.c+6−4

 	wifi_pkg = iwl_acpi_get_wifi_pkg(dev, data, ACPI_WRDD_WIFI_DATA_SIZE,
 					 &tbl_rev);
-	if (IS_ERR(wifi_pkg) || tbl_rev != 0) {
+	if (IS_ERR(wifi_pkg)) {
 		ret = PTR_ERR(wifi_pkg);
 		goto out_free;
 	}
-	if (wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) {
+	if (wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER ||
+	    tbl_rev != 0) {
 		ret = -EINVAL;
 		goto out_free;
 	}
 	wifi_pkg = iwl_acpi_get_wifi_pkg(dev, data, ACPI_ECKV_WIFI_DATA_SIZE,
 					 &tbl_rev);
-	if (IS_ERR(wifi_pkg) || tbl_rev != 0) {
+	if (IS_ERR(wifi_pkg)) {
 		ret = PTR_ERR(wifi_pkg);
 		goto out_free;
 	}
-	if (wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) {
+	if (wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER ||
+	    tbl_rev != 0) {
 		ret = -EINVAL;
 		goto out_free;
 	}

drivers/net/wireless/intel/iwlwifi/fw/dbg.c+1−0

@@ -646,6 +646,7 @@ static struct scatterlist *alloc_sgtable(int size) · 645 unmodified lines
646	if (new_page)	646	if (new_page)
647	__free_page(new_page);	647	__free_page(new_page);
648	}	648	}
		649	kfree(table);
649	return NULL;	650	return NULL;
650	}	651	}
651	alloc_size = min_t(int, size, PAGE_SIZE);	652	alloc_size = min_t(int, size, PAGE_SIZE);

drivers/net/wireless/intel/iwlwifi/iwl-io.h+6−6

@@ -112,38 +112,38 @@ int iwl_dump_fh(struct iwl_trans trans, char *buf); · 111 unmodified lines
112	*/	112	*/
113	static inline u32 iwl_umac_prph(struct iwl_trans *trans, u32 ofs)	113	static inline u32 iwl_umac_prph(struct iwl_trans *trans, u32 ofs)
114	{	114	{
115	return ofs + trans->cfg->trans.umac_prph_offset;	115	return ofs + trans->trans_cfg->umac_prph_offset;
116	}	116	}
117		117
118	static inline u32 iwl_read_umac_prph_no_grab(struct iwl_trans *trans, u32 ofs)	118	static inline u32 iwl_read_umac_prph_no_grab(struct iwl_trans *trans, u32 ofs)
119	{	119	{
120	return iwl_read_prph_no_grab(trans, ofs +	120	return iwl_read_prph_no_grab(trans, ofs +
121	trans->cfg->trans.umac_prph_offset);	121	trans->trans_cfg->umac_prph_offset);
122	}	122	}
123		123
124	static inline u32 iwl_read_umac_prph(struct iwl_trans *trans, u32 ofs)	124	static inline u32 iwl_read_umac_prph(struct iwl_trans *trans, u32 ofs)
125	{	125	{
126	return iwl_read_prph(trans, ofs + trans->cfg->trans.umac_prph_offset);	126	return iwl_read_prph(trans, ofs + trans->trans_cfg->umac_prph_offset);
127	}	127	}
128		128
129	static inline void iwl_write_umac_prph_no_grab(struct iwl_trans *trans, u32 ofs,	129	static inline void iwl_write_umac_prph_no_grab(struct iwl_trans *trans, u32 ofs,
130	u32 val)	130	u32 val)
131	{	131	{
132	iwl_write_prph_no_grab(trans, ofs + trans->cfg->trans.umac_prph_offset,	132	iwl_write_prph_no_grab(trans, ofs + trans->trans_cfg->umac_prph_offset,
133	val);	133	val);
134	}	134	}
135		135
136	static inline void iwl_write_umac_prph(struct iwl_trans *trans, u32 ofs,	136	static inline void iwl_write_umac_prph(struct iwl_trans *trans, u32 ofs,
137	u32 val)	137	u32 val)
138	{	138	{
139	iwl_write_prph(trans, ofs + trans->cfg->trans.umac_prph_offset, val);	139	iwl_write_prph(trans, ofs + trans->trans_cfg->umac_prph_offset, val);
140	}	140	}
141		141
142	static inline int iwl_poll_umac_prph_bit(struct iwl_trans *trans, u32 addr,	142	static inline int iwl_poll_umac_prph_bit(struct iwl_trans *trans, u32 addr,
143	u32 bits, u32 mask, int timeout)	143	u32 bits, u32 mask, int timeout)
144	{	144	{
145	return iwl_poll_prph_bit(trans, addr +	145	return iwl_poll_prph_bit(trans, addr +
146	trans->cfg->trans.umac_prph_offset,	146	trans->trans_cfg->umac_prph_offset,
147	bits, mask, timeout);	147	bits, mask, timeout);
148	}	148	}
149		149

drivers/net/wireless/intel/iwlwifi/mvm/fw.c+30−13

 	};
 	int ret;
+	if (mvm->trans->cfg->tx_with_siso_diversity)
+		init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY));
 	lockdep_assert_held(&mvm->mutex);
 	mvm->rfkill_safe_init_done = false;
 	wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
 					 ACPI_WRDS_WIFI_DATA_SIZE, &tbl_rev);
-	if (IS_ERR(wifi_pkg) || tbl_rev != 0) {
+	if (IS_ERR(wifi_pkg)) {
 		ret = PTR_ERR(wifi_pkg);
 		goto out_free;
 	}
-	if (wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) {
+	if (wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER ||
+	    tbl_rev != 0) {
 		ret = -EINVAL;
 		goto out_free;
 	}
 	wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
 					 ACPI_EWRD_WIFI_DATA_SIZE, &tbl_rev);
-	if (IS_ERR(wifi_pkg) || tbl_rev != 0) {
+	if (IS_ERR(wifi_pkg)) {
 		ret = PTR_ERR(wifi_pkg);
 		goto out_free;
 	}
 	if ((wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) ||
-	    (wifi_pkg->package.elements[2].type != ACPI_TYPE_INTEGER)) {
+	    (wifi_pkg->package.elements[2].type != ACPI_TYPE_INTEGER) ||
+	    tbl_rev != 0) {
 		ret = -EINVAL;
 		goto out_free;
 	}
 	wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
 					 ACPI_WGDS_WIFI_DATA_SIZE, &tbl_rev);
-	if (IS_ERR(wifi_pkg) || tbl_rev > 1) {
+	if (IS_ERR(wifi_pkg)) {
 		ret = PTR_ERR(wifi_pkg);
 		goto out_free;
 	}
+	if (tbl_rev != 0) {
+		ret = -EINVAL;
+		goto out_free;
+	}
 	mvm->geo_rev = tbl_rev;
 	for (i = 0; i < ACPI_NUM_GEO_PROFILES; i++) {
 		for (j = 0; j < ACPI_GEO_TABLE_SIZE; j++) {
 	 * firmware versions.  Unfortunately, we don't have a TLV API
 	 * flag to rely on, so rely on the major version which is in
 	 * the first byte of ucode_ver.  This was implemented
-	 * initially on version 38 and then backported to29 and 17.
+	 * initially on version 38 and then backported to 17.  It was
-	 * The intention was to have it in 36 as well, but not all
+	 * also backported to 29, but only for 7265D devices.  The
-	 * 8000 family got this feature enabled.  The 8000 family is
+	 * intention was to have it in 36 as well, but not all 8000
-	 * the only one using version 36, so skip this version
+	 * family got this feature enabled.  The 8000 family is the
-	 * entirely.
+	 * only one using version 36, so skip this version entirely.
 	 */
 	return IWL_UCODE_SERIAL(mvm->fw->ucode_ver) >= 38 ||
-	       IWL_UCODE_SERIAL(mvm->fw->ucode_ver) == 29 ||
+	       IWL_UCODE_SERIAL(mvm->fw->ucode_ver) == 17 ||
-	       IWL_UCODE_SERIAL(mvm->fw->ucode_ver) == 17;
+	       (IWL_UCODE_SERIAL(mvm->fw->ucode_ver) == 29 &&
+		((mvm->trans->hw_rev & CSR_HW_REV_TYPE_MSK) ==
+		 CSR_HW_REV_TYPE_7265D));
 }
 int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
 	wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
 					 ACPI_PPAG_WIFI_DATA_SIZE, &tbl_rev);
-	if (IS_ERR(wifi_pkg) || tbl_rev != 0) {
+	if (IS_ERR(wifi_pkg)) {
 		ret = PTR_ERR(wifi_pkg);
 		goto out_free;
 	}
+	if (tbl_rev != 0) {
+		ret = -EINVAL;
+		goto out_free;
+	}
 	enabled = &wifi_pkg->package.elements[1];
 	if (enabled->type != ACPI_TYPE_INTEGER ||
 	    (enabled->integer.value != 0 && enabled->integer.value != 1)) {

drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c+5−4

@@ -4881,11 +4881,11 @@ void iwl_mvm_sync_rx_queues_internal(struct iwl_mvm *mvm, · 4880 unmodified lines
4881	if (!iwl_mvm_has_new_rx_api(mvm))	4881	if (!iwl_mvm_has_new_rx_api(mvm))
4882	return;	4882	return;
4883		4883
4884	notif->cookie = mvm->queue_sync_cookie;	4884	if (notif->sync) {
4885		4885	notif->cookie = mvm->queue_sync_cookie;
4886	if (notif->sync)
4887	atomic_set(&mvm->queue_sync_counter,	4886	atomic_set(&mvm->queue_sync_counter,
4888	mvm->trans->num_rx_queues);	4887	mvm->trans->num_rx_queues);
		4888	}
4889		4889
4890	ret = iwl_mvm_notify_rx_queue(mvm, qmask, (u8 *)notif,	4890	ret = iwl_mvm_notify_rx_queue(mvm, qmask, (u8 *)notif,
4891	size, !notif->sync);	4891	size, !notif->sync);
@@ -4905,7 +4905,8 @@ void iwl_mvm_sync_rx_queues_internal(struct iwl_mvm *mvm, · 13 unmodified lines
4905		4905
4906	out:	4906	out:
4907	atomic_set(&mvm->queue_sync_counter, 0);	4907	atomic_set(&mvm->queue_sync_counter, 0);
4908	mvm->queue_sync_cookie++;	4908	if (notif->sync)
		4909	mvm->queue_sync_cookie++;
4909	}	4910	}
4910		4911
4911	static void iwl_mvm_sync_rx_queues(struct ieee80211_hw *hw)	4912	static void iwl_mvm_sync_rx_queues(struct ieee80211_hw *hw)

drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info-gen3.c+25−11

@@ -107,13 +107,9 @@ int iwl_pcie_ctxt_info_gen3_init(struct iwl_trans *trans, · 106 unmodified lines
107		107
108	/* allocate ucode sections in dram and set addresses */	108	/* allocate ucode sections in dram and set addresses */
109	ret = iwl_pcie_init_fw_sec(trans, fw, &prph_scratch->dram);	109	ret = iwl_pcie_init_fw_sec(trans, fw, &prph_scratch->dram);
110	if (ret) {	110	if (ret)
111	dma_free_coherent(trans->dev,	111	goto err_free_prph_scratch;
112	sizeof(*prph_scratch),	112
113	prph_scratch,
114	trans_pcie->prph_scratch_dma_addr);
115	return ret;
116	}
117		113
118	/* Allocate prph information	114	/* Allocate prph information
119	* currently we don't assign to the prph info anything, but it would get	115	* currently we don't assign to the prph info anything, but it would get
@@ -121,16 +117,20 @@ int iwl_pcie_ctxt_info_gen3_init(struct iwl_trans *trans, · 1 unmodified line
121	prph_info = dma_alloc_coherent(trans->dev, sizeof(*prph_info),	117	prph_info = dma_alloc_coherent(trans->dev, sizeof(*prph_info),
122	&trans_pcie->prph_info_dma_addr,	118	&trans_pcie->prph_info_dma_addr,
123	GFP_KERNEL);	119	GFP_KERNEL);
124	if (!prph_info)	120	if (!prph_info) {
125	return -ENOMEM;	121	ret = -ENOMEM;
		122	goto err_free_prph_scratch;
		123	}
126		124
127	/* Allocate context info */	125	/* Allocate context info */
128	ctxt_info_gen3 = dma_alloc_coherent(trans->dev,	126	ctxt_info_gen3 = dma_alloc_coherent(trans->dev,
129	sizeof(*ctxt_info_gen3),	127	sizeof(*ctxt_info_gen3),
130	&trans_pcie->ctxt_info_dma_addr,	128	&trans_pcie->ctxt_info_dma_addr,
131	GFP_KERNEL);	129	GFP_KERNEL);
132	if (!ctxt_info_gen3)	130	if (!ctxt_info_gen3) {
133	return -ENOMEM;	131	ret = -ENOMEM;
		132	goto err_free_prph_info;
		133	}
134		134
135	ctxt_info_gen3->prph_info_base_addr =	135	ctxt_info_gen3->prph_info_base_addr =
136	cpu_to_le64(trans_pcie->prph_info_dma_addr);	136	cpu_to_le64(trans_pcie->prph_info_dma_addr);
@@ -186,6 +186,20 @@ int iwl_pcie_ctxt_info_gen3_init(struct iwl_trans *trans, · 49 unmodified lines
186	iwl_set_bit(trans, CSR_GP_CNTRL, CSR_AUTO_FUNC_INIT);	186	iwl_set_bit(trans, CSR_GP_CNTRL, CSR_AUTO_FUNC_INIT);
187		187
188	return 0;	188	return 0;
		189
		190	err_free_prph_info:
		191	dma_free_coherent(trans->dev,
		192	sizeof(*prph_info),
		193	prph_info,
		194	trans_pcie->prph_info_dma_addr);
		195
		196	err_free_prph_scratch:
		197	dma_free_coherent(trans->dev,
		198	sizeof(*prph_scratch),
		199	prph_scratch,
		200	trans_pcie->prph_scratch_dma_addr);
		201	return ret;
		202
189	}	203	}
190		204
191	void iwl_pcie_ctxt_info_gen3_free(struct iwl_trans *trans)	205	void iwl_pcie_ctxt_info_gen3_free(struct iwl_trans *trans)

drivers/net/wireless/intel/iwlwifi/pcie/drv.c+137−137

@@ -513,31 +513,33 @@ static const struct pci_device_id iwl_hw_card_ids[] = { · 512 unmodified lines
513	{IWL_PCI_DEVICE(0x24FD, 0x9074, iwl8265_2ac_cfg)},	513	{IWL_PCI_DEVICE(0x24FD, 0x9074, iwl8265_2ac_cfg)},
514		514
515	/* 9000 Series */	515	/* 9000 Series */
516	{IWL_PCI_DEVICE(0x02F0, 0x0030, iwl9560_2ac_160_cfg_quz_a0_jf_b0_soc)},	516	{IWL_PCI_DEVICE(0x02F0, 0x0030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
517	{IWL_PCI_DEVICE(0x02F0, 0x0034, iwl9560_2ac_cfg_quz_a0_jf_b0_soc)},	517	{IWL_PCI_DEVICE(0x02F0, 0x0034, iwl9560_2ac_cfg_qu_b0_jf_b0)},
518	{IWL_PCI_DEVICE(0x02F0, 0x0038, iwl9560_2ac_160_cfg_quz_a0_jf_b0_soc)},	518	{IWL_PCI_DEVICE(0x02F0, 0x0038, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
519	{IWL_PCI_DEVICE(0x02F0, 0x003C, iwl9560_2ac_160_cfg_quz_a0_jf_b0_soc)},	519	{IWL_PCI_DEVICE(0x02F0, 0x003C, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
520	{IWL_PCI_DEVICE(0x02F0, 0x0060, iwl9461_2ac_cfg_quz_a0_jf_b0_soc)},	520	{IWL_PCI_DEVICE(0x02F0, 0x0060, iwl9461_2ac_cfg_qu_b0_jf_b0)},
521	{IWL_PCI_DEVICE(0x02F0, 0x0064, iwl9461_2ac_cfg_quz_a0_jf_b0_soc)},	521	{IWL_PCI_DEVICE(0x02F0, 0x0064, iwl9461_2ac_cfg_qu_b0_jf_b0)},
522	{IWL_PCI_DEVICE(0x02F0, 0x00A0, iwl9462_2ac_cfg_quz_a0_jf_b0_soc)},	522	{IWL_PCI_DEVICE(0x02F0, 0x00A0, iwl9462_2ac_cfg_qu_b0_jf_b0)},
523	{IWL_PCI_DEVICE(0x02F0, 0x00A4, iwl9462_2ac_cfg_quz_a0_jf_b0_soc)},	523	{IWL_PCI_DEVICE(0x02F0, 0x00A4, iwl9462_2ac_cfg_qu_b0_jf_b0)},
524	{IWL_PCI_DEVICE(0x02F0, 0x0230, iwl9560_2ac_cfg_quz_a0_jf_b0_soc)},	524	{IWL_PCI_DEVICE(0x02F0, 0x0230, iwl9560_2ac_cfg_qu_b0_jf_b0)},
525	{IWL_PCI_DEVICE(0x02F0, 0x0234, iwl9560_2ac_cfg_quz_a0_jf_b0_soc)},	525	{IWL_PCI_DEVICE(0x02F0, 0x0234, iwl9560_2ac_cfg_qu_b0_jf_b0)},
526	{IWL_PCI_DEVICE(0x02F0, 0x0238, iwl9560_2ac_cfg_quz_a0_jf_b0_soc)},	526	{IWL_PCI_DEVICE(0x02F0, 0x0238, iwl9560_2ac_cfg_qu_b0_jf_b0)},
527	{IWL_PCI_DEVICE(0x02F0, 0x023C, iwl9560_2ac_cfg_quz_a0_jf_b0_soc)},	527	{IWL_PCI_DEVICE(0x02F0, 0x023C, iwl9560_2ac_cfg_qu_b0_jf_b0)},
528	{IWL_PCI_DEVICE(0x02F0, 0x0260, iwl9461_2ac_cfg_quz_a0_jf_b0_soc)},	528	{IWL_PCI_DEVICE(0x02F0, 0x0260, iwl9461_2ac_cfg_qu_b0_jf_b0)},
529	{IWL_PCI_DEVICE(0x02F0, 0x0264, iwl9461_2ac_cfg_quz_a0_jf_b0_soc)},	529	{IWL_PCI_DEVICE(0x02F0, 0x0264, iwl9461_2ac_cfg_qu_b0_jf_b0)},
530	{IWL_PCI_DEVICE(0x02F0, 0x02A0, iwl9462_2ac_cfg_quz_a0_jf_b0_soc)},	530	{IWL_PCI_DEVICE(0x02F0, 0x02A0, iwl9462_2ac_cfg_qu_b0_jf_b0)},
531	{IWL_PCI_DEVICE(0x02F0, 0x02A4, iwl9462_2ac_cfg_quz_a0_jf_b0_soc)},	531	{IWL_PCI_DEVICE(0x02F0, 0x02A4, iwl9462_2ac_cfg_qu_b0_jf_b0)},
532	{IWL_PCI_DEVICE(0x02F0, 0x1551, iwl9560_killer_s_2ac_cfg_quz_a0_jf_b0_soc)},	532	{IWL_PCI_DEVICE(0x02F0, 0x1030, iwl9560_2ac_cfg_qu_b0_jf_b0)},
533	{IWL_PCI_DEVICE(0x02F0, 0x1552, iwl9560_killer_i_2ac_cfg_quz_a0_jf_b0_soc)},	533	{IWL_PCI_DEVICE(0x02F0, 0x1551, killer1550s_2ac_cfg_qu_b0_jf_b0)},
534	{IWL_PCI_DEVICE(0x02F0, 0x2030, iwl9560_2ac_160_cfg_quz_a0_jf_b0_soc)},	534	{IWL_PCI_DEVICE(0x02F0, 0x1552, killer1550i_2ac_cfg_qu_b0_jf_b0)},
535	{IWL_PCI_DEVICE(0x02F0, 0x2034, iwl9560_2ac_160_cfg_quz_a0_jf_b0_soc)},	535	{IWL_PCI_DEVICE(0x02F0, 0x2030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
536	{IWL_PCI_DEVICE(0x02F0, 0x4030, iwl9560_2ac_160_cfg_quz_a0_jf_b0_soc)},	536	{IWL_PCI_DEVICE(0x02F0, 0x2034, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
537	{IWL_PCI_DEVICE(0x02F0, 0x4034, iwl9560_2ac_160_cfg_quz_a0_jf_b0_soc)},	537	{IWL_PCI_DEVICE(0x02F0, 0x4030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
538	{IWL_PCI_DEVICE(0x02F0, 0x40A4, iwl9462_2ac_cfg_quz_a0_jf_b0_soc)},	538	{IWL_PCI_DEVICE(0x02F0, 0x4034, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
539	{IWL_PCI_DEVICE(0x02F0, 0x4234, iwl9560_2ac_cfg_quz_a0_jf_b0_soc)},	539	{IWL_PCI_DEVICE(0x02F0, 0x40A4, iwl9462_2ac_cfg_qu_b0_jf_b0)},
540	{IWL_PCI_DEVICE(0x02F0, 0x42A4, iwl9462_2ac_cfg_quz_a0_jf_b0_soc)},	540	{IWL_PCI_DEVICE(0x02F0, 0x4234, iwl9560_2ac_cfg_qu_b0_jf_b0)},
		541	{IWL_PCI_DEVICE(0x02F0, 0x42A4, iwl9462_2ac_cfg_qu_b0_jf_b0)},
		542
541	{IWL_PCI_DEVICE(0x06F0, 0x0030, iwl9560_2ac_160_cfg_quz_a0_jf_b0_soc)},	543	{IWL_PCI_DEVICE(0x06F0, 0x0030, iwl9560_2ac_160_cfg_quz_a0_jf_b0_soc)},
542	{IWL_PCI_DEVICE(0x06F0, 0x0034, iwl9560_2ac_cfg_quz_a0_jf_b0_soc)},	544	{IWL_PCI_DEVICE(0x06F0, 0x0034, iwl9560_2ac_cfg_quz_a0_jf_b0_soc)},
543	{IWL_PCI_DEVICE(0x06F0, 0x0038, iwl9560_2ac_160_cfg_quz_a0_jf_b0_soc)},	545	{IWL_PCI_DEVICE(0x06F0, 0x0038, iwl9560_2ac_160_cfg_quz_a0_jf_b0_soc)},
@@ -643,34 +645,34 @@ static const struct pci_device_id iwl_hw_card_ids[] = { · 99 unmodified lines
643	{IWL_PCI_DEVICE(0x2720, 0x40A4, iwl9462_2ac_cfg_soc)},	645	{IWL_PCI_DEVICE(0x2720, 0x40A4, iwl9462_2ac_cfg_soc)},
644	{IWL_PCI_DEVICE(0x2720, 0x4234, iwl9560_2ac_cfg_soc)},	646	{IWL_PCI_DEVICE(0x2720, 0x4234, iwl9560_2ac_cfg_soc)},
645	{IWL_PCI_DEVICE(0x2720, 0x42A4, iwl9462_2ac_cfg_soc)},	647	{IWL_PCI_DEVICE(0x2720, 0x42A4, iwl9462_2ac_cfg_soc)},
646	{IWL_PCI_DEVICE(0x30DC, 0x0030, iwl9560_2ac_160_cfg_soc)},	648
647	{IWL_PCI_DEVICE(0x30DC, 0x0034, iwl9560_2ac_cfg_soc)},	649	{IWL_PCI_DEVICE(0x30DC, 0x0030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
648	{IWL_PCI_DEVICE(0x30DC, 0x0038, iwl9560_2ac_160_cfg_soc)},	650	{IWL_PCI_DEVICE(0x30DC, 0x0034, iwl9560_2ac_cfg_qu_b0_jf_b0)},
649	{IWL_PCI_DEVICE(0x30DC, 0x003C, iwl9560_2ac_160_cfg_soc)},	651	{IWL_PCI_DEVICE(0x30DC, 0x0038, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
650	{IWL_PCI_DEVICE(0x30DC, 0x0060, iwl9460_2ac_cfg_soc)},	652	{IWL_PCI_DEVICE(0x30DC, 0x003C, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
651	{IWL_PCI_DEVICE(0x30DC, 0x0064, iwl9461_2ac_cfg_soc)},	653	{IWL_PCI_DEVICE(0x30DC, 0x0060, iwl9461_2ac_cfg_qu_b0_jf_b0)},
652	{IWL_PCI_DEVICE(0x30DC, 0x00A0, iwl9462_2ac_cfg_soc)},	654	{IWL_PCI_DEVICE(0x30DC, 0x0064, iwl9461_2ac_cfg_qu_b0_jf_b0)},
653	{IWL_PCI_DEVICE(0x30DC, 0x00A4, iwl9462_2ac_cfg_soc)},	655	{IWL_PCI_DEVICE(0x30DC, 0x00A0, iwl9462_2ac_cfg_qu_b0_jf_b0)},
654	{IWL_PCI_DEVICE(0x30DC, 0x0230, iwl9560_2ac_cfg_soc)},	656	{IWL_PCI_DEVICE(0x30DC, 0x00A4, iwl9462_2ac_cfg_qu_b0_jf_b0)},
655	{IWL_PCI_DEVICE(0x30DC, 0x0234, iwl9560_2ac_cfg_soc)},	657	{IWL_PCI_DEVICE(0x30DC, 0x0230, iwl9560_2ac_cfg_qu_b0_jf_b0)},
656	{IWL_PCI_DEVICE(0x30DC, 0x0238, iwl9560_2ac_cfg_soc)},	658	{IWL_PCI_DEVICE(0x30DC, 0x0234, iwl9560_2ac_cfg_qu_b0_jf_b0)},
657	{IWL_PCI_DEVICE(0x30DC, 0x023C, iwl9560_2ac_cfg_soc)},	659	{IWL_PCI_DEVICE(0x30DC, 0x0238, iwl9560_2ac_cfg_qu_b0_jf_b0)},
658	{IWL_PCI_DEVICE(0x30DC, 0x0260, iwl9461_2ac_cfg_soc)},	660	{IWL_PCI_DEVICE(0x30DC, 0x023C, iwl9560_2ac_cfg_qu_b0_jf_b0)},
659	{IWL_PCI_DEVICE(0x30DC, 0x0264, iwl9461_2ac_cfg_soc)},	661	{IWL_PCI_DEVICE(0x30DC, 0x0260, iwl9461_2ac_cfg_qu_b0_jf_b0)},
660	{IWL_PCI_DEVICE(0x30DC, 0x02A0, iwl9462_2ac_cfg_soc)},	662	{IWL_PCI_DEVICE(0x30DC, 0x0264, iwl9461_2ac_cfg_qu_b0_jf_b0)},
661	{IWL_PCI_DEVICE(0x30DC, 0x02A4, iwl9462_2ac_cfg_soc)},	663	{IWL_PCI_DEVICE(0x30DC, 0x02A0, iwl9462_2ac_cfg_qu_b0_jf_b0)},
662	{IWL_PCI_DEVICE(0x30DC, 0x1010, iwl9260_2ac_cfg)},	664	{IWL_PCI_DEVICE(0x30DC, 0x02A4, iwl9462_2ac_cfg_qu_b0_jf_b0)},
663	{IWL_PCI_DEVICE(0x30DC, 0x1030, iwl9560_2ac_cfg_soc)},	665	{IWL_PCI_DEVICE(0x30DC, 0x1030, iwl9560_2ac_cfg_qu_b0_jf_b0)},
664	{IWL_PCI_DEVICE(0x30DC, 0x1210, iwl9260_2ac_cfg)},	666	{IWL_PCI_DEVICE(0x30DC, 0x1551, killer1550s_2ac_cfg_qu_b0_jf_b0)},
665	{IWL_PCI_DEVICE(0x30DC, 0x1551, iwl9560_killer_s_2ac_cfg_soc)},	667	{IWL_PCI_DEVICE(0x30DC, 0x1552, killer1550i_2ac_cfg_qu_b0_jf_b0)},
666	{IWL_PCI_DEVICE(0x30DC, 0x1552, iwl9560_killer_2ac_cfg_soc)},	668	{IWL_PCI_DEVICE(0x30DC, 0x2030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
667	{IWL_PCI_DEVICE(0x30DC, 0x2030, iwl9560_2ac_160_cfg_soc)},	669	{IWL_PCI_DEVICE(0x30DC, 0x2034, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
668	{IWL_PCI_DEVICE(0x30DC, 0x2034, iwl9560_2ac_160_cfg_soc)},	670	{IWL_PCI_DEVICE(0x30DC, 0x4030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
669	{IWL_PCI_DEVICE(0x30DC, 0x4030, iwl9560_2ac_160_cfg_soc)},	671	{IWL_PCI_DEVICE(0x30DC, 0x4034, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
670	{IWL_PCI_DEVICE(0x30DC, 0x4034, iwl9560_2ac_160_cfg_soc)},	672	{IWL_PCI_DEVICE(0x30DC, 0x40A4, iwl9462_2ac_cfg_qu_b0_jf_b0)},
671	{IWL_PCI_DEVICE(0x30DC, 0x40A4, iwl9462_2ac_cfg_soc)},	673	{IWL_PCI_DEVICE(0x30DC, 0x4234, iwl9560_2ac_cfg_qu_b0_jf_b0)},
672	{IWL_PCI_DEVICE(0x30DC, 0x4234, iwl9560_2ac_cfg_soc)},	674	{IWL_PCI_DEVICE(0x30DC, 0x42A4, iwl9462_2ac_cfg_qu_b0_jf_b0)},
673	{IWL_PCI_DEVICE(0x30DC, 0x42A4, iwl9462_2ac_cfg_soc)},	675
674	{IWL_PCI_DEVICE(0x31DC, 0x0030, iwl9560_2ac_160_cfg_shared_clk)},	676	{IWL_PCI_DEVICE(0x31DC, 0x0030, iwl9560_2ac_160_cfg_shared_clk)},
675	{IWL_PCI_DEVICE(0x31DC, 0x0034, iwl9560_2ac_cfg_shared_clk)},	677	{IWL_PCI_DEVICE(0x31DC, 0x0034, iwl9560_2ac_cfg_shared_clk)},
676	{IWL_PCI_DEVICE(0x31DC, 0x0038, iwl9560_2ac_160_cfg_shared_clk)},	678	{IWL_PCI_DEVICE(0x31DC, 0x0038, iwl9560_2ac_160_cfg_shared_clk)},
@@ -726,62 +728,60 @@ static const struct pci_device_id iwl_hw_card_ids[] = { · 49 unmodified lines
726	{IWL_PCI_DEVICE(0x34F0, 0x4234, iwl9560_2ac_cfg_qu_b0_jf_b0)},	728	{IWL_PCI_DEVICE(0x34F0, 0x4234, iwl9560_2ac_cfg_qu_b0_jf_b0)},
727	{IWL_PCI_DEVICE(0x34F0, 0x42A4, iwl9462_2ac_cfg_qu_b0_jf_b0)},	729	{IWL_PCI_DEVICE(0x34F0, 0x42A4, iwl9462_2ac_cfg_qu_b0_jf_b0)},
728		730
729	{IWL_PCI_DEVICE(0x3DF0, 0x0030, iwl9560_2ac_160_cfg_soc)},	731	{IWL_PCI_DEVICE(0x3DF0, 0x0030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
730	{IWL_PCI_DEVICE(0x3DF0, 0x0034, iwl9560_2ac_cfg_soc)},	732	{IWL_PCI_DEVICE(0x3DF0, 0x0034, iwl9560_2ac_cfg_qu_b0_jf_b0)},
731	{IWL_PCI_DEVICE(0x3DF0, 0x0038, iwl9560_2ac_160_cfg_soc)},	733	{IWL_PCI_DEVICE(0x3DF0, 0x0038, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
732	{IWL_PCI_DEVICE(0x3DF0, 0x003C, iwl9560_2ac_160_cfg_soc)},	734	{IWL_PCI_DEVICE(0x3DF0, 0x003C, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
733	{IWL_PCI_DEVICE(0x3DF0, 0x0060, iwl9461_2ac_cfg_soc)},	735	{IWL_PCI_DEVICE(0x3DF0, 0x0060, iwl9461_2ac_cfg_qu_b0_jf_b0)},
734	{IWL_PCI_DEVICE(0x3DF0, 0x0064, iwl9461_2ac_cfg_soc)},	736	{IWL_PCI_DEVICE(0x3DF0, 0x0064, iwl9461_2ac_cfg_qu_b0_jf_b0)},
735	{IWL_PCI_DEVICE(0x3DF0, 0x00A0, iwl9462_2ac_cfg_soc)},	737	{IWL_PCI_DEVICE(0x3DF0, 0x00A0, iwl9462_2ac_cfg_qu_b0_jf_b0)},
736	{IWL_PCI_DEVICE(0x3DF0, 0x00A4, iwl9462_2ac_cfg_soc)},	738	{IWL_PCI_DEVICE(0x3DF0, 0x00A4, iwl9462_2ac_cfg_qu_b0_jf_b0)},
737	{IWL_PCI_DEVICE(0x3DF0, 0x0230, iwl9560_2ac_cfg_soc)},	739	{IWL_PCI_DEVICE(0x3DF0, 0x0230, iwl9560_2ac_cfg_qu_b0_jf_b0)},
738	{IWL_PCI_DEVICE(0x3DF0, 0x0234, iwl9560_2ac_cfg_soc)},	740	{IWL_PCI_DEVICE(0x3DF0, 0x0234, iwl9560_2ac_cfg_qu_b0_jf_b0)},
739	{IWL_PCI_DEVICE(0x3DF0, 0x0238, iwl9560_2ac_cfg_soc)},	741	{IWL_PCI_DEVICE(0x3DF0, 0x0238, iwl9560_2ac_cfg_qu_b0_jf_b0)},
740	{IWL_PCI_DEVICE(0x3DF0, 0x023C, iwl9560_2ac_cfg_soc)},	742	{IWL_PCI_DEVICE(0x3DF0, 0x023C, iwl9560_2ac_cfg_qu_b0_jf_b0)},
741	{IWL_PCI_DEVICE(0x3DF0, 0x0260, iwl9461_2ac_cfg_soc)},	743	{IWL_PCI_DEVICE(0x3DF0, 0x0260, iwl9461_2ac_cfg_qu_b0_jf_b0)},
742	{IWL_PCI_DEVICE(0x3DF0, 0x0264, iwl9461_2ac_cfg_soc)},	744	{IWL_PCI_DEVICE(0x3DF0, 0x0264, iwl9461_2ac_cfg_qu_b0_jf_b0)},
743	{IWL_PCI_DEVICE(0x3DF0, 0x02A0, iwl9462_2ac_cfg_soc)},	745	{IWL_PCI_DEVICE(0x3DF0, 0x02A0, iwl9462_2ac_cfg_qu_b0_jf_b0)},
744	{IWL_PCI_DEVICE(0x3DF0, 0x02A4, iwl9462_2ac_cfg_soc)},	746	{IWL_PCI_DEVICE(0x3DF0, 0x02A4, iwl9462_2ac_cfg_qu_b0_jf_b0)},
745	{IWL_PCI_DEVICE(0x3DF0, 0x1010, iwl9260_2ac_cfg)},	747	{IWL_PCI_DEVICE(0x3DF0, 0x1030, iwl9560_2ac_cfg_qu_b0_jf_b0)},
746	{IWL_PCI_DEVICE(0x3DF0, 0x1030, iwl9560_2ac_cfg_soc)},	748	{IWL_PCI_DEVICE(0x3DF0, 0x1551, killer1550s_2ac_cfg_qu_b0_jf_b0)},
747	{IWL_PCI_DEVICE(0x3DF0, 0x1210, iwl9260_2ac_cfg)},	749	{IWL_PCI_DEVICE(0x3DF0, 0x1552, killer1550i_2ac_cfg_qu_b0_jf_b0)},
748	{IWL_PCI_DEVICE(0x3DF0, 0x1551, iwl9560_killer_s_2ac_cfg_soc)},	750	{IWL_PCI_DEVICE(0x3DF0, 0x2030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
749	{IWL_PCI_DEVICE(0x3DF0, 0x1552, iwl9560_killer_2ac_cfg_soc)},	751	{IWL_PCI_DEVICE(0x3DF0, 0x2034, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
750	{IWL_PCI_DEVICE(0x3DF0, 0x2030, iwl9560_2ac_160_cfg_soc)},	752	{IWL_PCI_DEVICE(0x3DF0, 0x4030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
751	{IWL_PCI_DEVICE(0x3DF0, 0x2034, iwl9560_2ac_160_cfg_soc)},	753	{IWL_PCI_DEVICE(0x3DF0, 0x4034, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
752	{IWL_PCI_DEVICE(0x3DF0, 0x4030, iwl9560_2ac_160_cfg_soc)},	754	{IWL_PCI_DEVICE(0x3DF0, 0x40A4, iwl9462_2ac_cfg_qu_b0_jf_b0)},
753	{IWL_PCI_DEVICE(0x3DF0, 0x4034, iwl9560_2ac_160_cfg_soc)},	755	{IWL_PCI_DEVICE(0x3DF0, 0x4234, iwl9560_2ac_cfg_qu_b0_jf_b0)},
754	{IWL_PCI_DEVICE(0x3DF0, 0x40A4, iwl9462_2ac_cfg_soc)},	756	{IWL_PCI_DEVICE(0x3DF0, 0x42A4, iwl9462_2ac_cfg_qu_b0_jf_b0)},
755	{IWL_PCI_DEVICE(0x3DF0, 0x4234, iwl9560_2ac_cfg_soc)},	757
756	{IWL_PCI_DEVICE(0x3DF0, 0x42A4, iwl9462_2ac_cfg_soc)},	758	{IWL_PCI_DEVICE(0x43F0, 0x0030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
757	{IWL_PCI_DEVICE(0x43F0, 0x0030, iwl9560_2ac_160_cfg_soc)},	759	{IWL_PCI_DEVICE(0x43F0, 0x0034, iwl9560_2ac_cfg_qu_b0_jf_b0)},
758	{IWL_PCI_DEVICE(0x43F0, 0x0034, iwl9560_2ac_cfg_soc)},	760	{IWL_PCI_DEVICE(0x43F0, 0x0038, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
759	{IWL_PCI_DEVICE(0x43F0, 0x0038, iwl9560_2ac_160_cfg_soc)},	761	{IWL_PCI_DEVICE(0x43F0, 0x003C, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
760	{IWL_PCI_DEVICE(0x43F0, 0x003C, iwl9560_2ac_160_cfg_soc)},	762	{IWL_PCI_DEVICE(0x43F0, 0x0060, iwl9461_2ac_cfg_qu_b0_jf_b0)},
761	{IWL_PCI_DEVICE(0x43F0, 0x0060, iwl9461_2ac_cfg_soc)},	763	{IWL_PCI_DEVICE(0x43F0, 0x0064, iwl9461_2ac_cfg_qu_b0_jf_b0)},
762	{IWL_PCI_DEVICE(0x43F0, 0x0064, iwl9461_2ac_cfg_soc)},	764	{IWL_PCI_DEVICE(0x43F0, 0x00A0, iwl9462_2ac_cfg_qu_b0_jf_b0)},
763	{IWL_PCI_DEVICE(0x43F0, 0x00A0, iwl9462_2ac_cfg_soc)},	765	{IWL_PCI_DEVICE(0x43F0, 0x00A4, iwl9462_2ac_cfg_qu_b0_jf_b0)},
764	{IWL_PCI_DEVICE(0x43F0, 0x00A4, iwl9462_2ac_cfg_soc)},	766	{IWL_PCI_DEVICE(0x43F0, 0x0230, iwl9560_2ac_cfg_qu_b0_jf_b0)},
765	{IWL_PCI_DEVICE(0x43F0, 0x0230, iwl9560_2ac_cfg_soc)},	767	{IWL_PCI_DEVICE(0x43F0, 0x0234, iwl9560_2ac_cfg_qu_b0_jf_b0)},
766	{IWL_PCI_DEVICE(0x43F0, 0x0234, iwl9560_2ac_cfg_soc)},	768	{IWL_PCI_DEVICE(0x43F0, 0x0238, iwl9560_2ac_cfg_qu_b0_jf_b0)},
767	{IWL_PCI_DEVICE(0x43F0, 0x0238, iwl9560_2ac_cfg_soc)},	769	{IWL_PCI_DEVICE(0x43F0, 0x023C, iwl9560_2ac_cfg_qu_b0_jf_b0)},
768	{IWL_PCI_DEVICE(0x43F0, 0x023C, iwl9560_2ac_cfg_soc)},	770	{IWL_PCI_DEVICE(0x43F0, 0x0260, iwl9461_2ac_cfg_qu_b0_jf_b0)},
769	{IWL_PCI_DEVICE(0x43F0, 0x0260, iwl9461_2ac_cfg_soc)},	771	{IWL_PCI_DEVICE(0x43F0, 0x0264, iwl9461_2ac_cfg_qu_b0_jf_b0)},
770	{IWL_PCI_DEVICE(0x43F0, 0x0264, iwl9461_2ac_cfg_soc)},	772	{IWL_PCI_DEVICE(0x43F0, 0x02A0, iwl9462_2ac_cfg_qu_b0_jf_b0)},
771	{IWL_PCI_DEVICE(0x43F0, 0x02A0, iwl9462_2ac_cfg_soc)},	773	{IWL_PCI_DEVICE(0x43F0, 0x02A4, iwl9462_2ac_cfg_qu_b0_jf_b0)},
772	{IWL_PCI_DEVICE(0x43F0, 0x02A4, iwl9462_2ac_cfg_soc)},	774	{IWL_PCI_DEVICE(0x43F0, 0x1030, iwl9560_2ac_cfg_qu_b0_jf_b0)},
773	{IWL_PCI_DEVICE(0x43F0, 0x1010, iwl9260_2ac_cfg)},	775	{IWL_PCI_DEVICE(0x43F0, 0x1551, killer1550s_2ac_cfg_qu_b0_jf_b0)},
774	{IWL_PCI_DEVICE(0x43F0, 0x1030, iwl9560_2ac_cfg_soc)},	776	{IWL_PCI_DEVICE(0x43F0, 0x1552, killer1550i_2ac_cfg_qu_b0_jf_b0)},
775	{IWL_PCI_DEVICE(0x43F0, 0x1210, iwl9260_2ac_cfg)},	777	{IWL_PCI_DEVICE(0x43F0, 0x2030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
776	{IWL_PCI_DEVICE(0x43F0, 0x1551, iwl9560_killer_s_2ac_cfg_soc)},	778	{IWL_PCI_DEVICE(0x43F0, 0x2034, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
777	{IWL_PCI_DEVICE(0x43F0, 0x1552, iwl9560_killer_2ac_cfg_soc)},	779	{IWL_PCI_DEVICE(0x43F0, 0x4030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
778	{IWL_PCI_DEVICE(0x43F0, 0x2030, iwl9560_2ac_160_cfg_soc)},	780	{IWL_PCI_DEVICE(0x43F0, 0x4034, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
779	{IWL_PCI_DEVICE(0x43F0, 0x2034, iwl9560_2ac_160_cfg_soc)},	781	{IWL_PCI_DEVICE(0x43F0, 0x40A4, iwl9462_2ac_cfg_qu_b0_jf_b0)},
780	{IWL_PCI_DEVICE(0x43F0, 0x4030, iwl9560_2ac_160_cfg_soc)},	782	{IWL_PCI_DEVICE(0x43F0, 0x4234, iwl9560_2ac_cfg_qu_b0_jf_b0)},
781	{IWL_PCI_DEVICE(0x43F0, 0x4034, iwl9560_2ac_160_cfg_soc)},	783	{IWL_PCI_DEVICE(0x43F0, 0x42A4, iwl9462_2ac_cfg_qu_b0_jf_b0)},
782	{IWL_PCI_DEVICE(0x43F0, 0x40A4, iwl9462_2ac_cfg_soc)},	784
783	{IWL_PCI_DEVICE(0x43F0, 0x4234, iwl9560_2ac_cfg_soc)},
784	{IWL_PCI_DEVICE(0x43F0, 0x42A4, iwl9462_2ac_cfg_soc)},
785	{IWL_PCI_DEVICE(0x9DF0, 0x0000, iwl9460_2ac_cfg_soc)},	785	{IWL_PCI_DEVICE(0x9DF0, 0x0000, iwl9460_2ac_cfg_soc)},
786	{IWL_PCI_DEVICE(0x9DF0, 0x0010, iwl9460_2ac_cfg_soc)},	786	{IWL_PCI_DEVICE(0x9DF0, 0x0010, iwl9460_2ac_cfg_soc)},
787	{IWL_PCI_DEVICE(0x9DF0, 0x0030, iwl9560_2ac_160_cfg_soc)},	787	{IWL_PCI_DEVICE(0x9DF0, 0x0030, iwl9560_2ac_160_cfg_soc)},
@@ -821,34 +821,34 @@ static const struct pci_device_id iwl_hw_card_ids[] = { · 33 unmodified lines
821	{IWL_PCI_DEVICE(0x9DF0, 0x40A4, iwl9462_2ac_cfg_soc)},	821	{IWL_PCI_DEVICE(0x9DF0, 0x40A4, iwl9462_2ac_cfg_soc)},
822	{IWL_PCI_DEVICE(0x9DF0, 0x4234, iwl9560_2ac_cfg_soc)},	822	{IWL_PCI_DEVICE(0x9DF0, 0x4234, iwl9560_2ac_cfg_soc)},
823	{IWL_PCI_DEVICE(0x9DF0, 0x42A4, iwl9462_2ac_cfg_soc)},	823	{IWL_PCI_DEVICE(0x9DF0, 0x42A4, iwl9462_2ac_cfg_soc)},
824	{IWL_PCI_DEVICE(0xA0F0, 0x0030, iwl9560_2ac_160_cfg_soc)},	824
825	{IWL_PCI_DEVICE(0xA0F0, 0x0034, iwl9560_2ac_cfg_soc)},	825	{IWL_PCI_DEVICE(0xA0F0, 0x0030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
826	{IWL_PCI_DEVICE(0xA0F0, 0x0038, iwl9560_2ac_160_cfg_soc)},	826	{IWL_PCI_DEVICE(0xA0F0, 0x0034, iwl9560_2ac_cfg_qu_b0_jf_b0)},
827	{IWL_PCI_DEVICE(0xA0F0, 0x003C, iwl9560_2ac_160_cfg_soc)},	827	{IWL_PCI_DEVICE(0xA0F0, 0x0038, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
828	{IWL_PCI_DEVICE(0xA0F0, 0x0060, iwl9461_2ac_cfg_soc)},	828	{IWL_PCI_DEVICE(0xA0F0, 0x003C, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
829	{IWL_PCI_DEVICE(0xA0F0, 0x0064, iwl9461_2ac_cfg_soc)},	829	{IWL_PCI_DEVICE(0xA0F0, 0x0060, iwl9461_2ac_cfg_qu_b0_jf_b0)},
830	{IWL_PCI_DEVICE(0xA0F0, 0x00A0, iwl9462_2ac_cfg_soc)},	830	{IWL_PCI_DEVICE(0xA0F0, 0x0064, iwl9461_2ac_cfg_qu_b0_jf_b0)},
831	{IWL_PCI_DEVICE(0xA0F0, 0x00A4, iwl9462_2ac_cfg_soc)},	831	{IWL_PCI_DEVICE(0xA0F0, 0x00A0, iwl9462_2ac_cfg_qu_b0_jf_b0)},
832	{IWL_PCI_DEVICE(0xA0F0, 0x0230, iwl9560_2ac_cfg_soc)},	832	{IWL_PCI_DEVICE(0xA0F0, 0x00A4, iwl9462_2ac_cfg_qu_b0_jf_b0)},
833	{IWL_PCI_DEVICE(0xA0F0, 0x0234, iwl9560_2ac_cfg_soc)},	833	{IWL_PCI_DEVICE(0xA0F0, 0x0230, iwl9560_2ac_cfg_qu_b0_jf_b0)},
834	{IWL_PCI_DEVICE(0xA0F0, 0x0238, iwl9560_2ac_cfg_soc)},	834	{IWL_PCI_DEVICE(0xA0F0, 0x0234, iwl9560_2ac_cfg_qu_b0_jf_b0)},
835	{IWL_PCI_DEVICE(0xA0F0, 0x023C, iwl9560_2ac_cfg_soc)},	835	{IWL_PCI_DEVICE(0xA0F0, 0x0238, iwl9560_2ac_cfg_qu_b0_jf_b0)},
836	{IWL_PCI_DEVICE(0xA0F0, 0x0260, iwl9461_2ac_cfg_soc)},	836	{IWL_PCI_DEVICE(0xA0F0, 0x023C, iwl9560_2ac_cfg_qu_b0_jf_b0)},
837	{IWL_PCI_DEVICE(0xA0F0, 0x0264, iwl9461_2ac_cfg_soc)},	837	{IWL_PCI_DEVICE(0xA0F0, 0x0260, iwl9461_2ac_cfg_qu_b0_jf_b0)},
838	{IWL_PCI_DEVICE(0xA0F0, 0x02A0, iwl9462_2ac_cfg_soc)},	838	{IWL_PCI_DEVICE(0xA0F0, 0x0264, iwl9461_2ac_cfg_qu_b0_jf_b0)},
839	{IWL_PCI_DEVICE(0xA0F0, 0x02A4, iwl9462_2ac_cfg_soc)},	839	{IWL_PCI_DEVICE(0xA0F0, 0x02A0, iwl9462_2ac_cfg_qu_b0_jf_b0)},
840	{IWL_PCI_DEVICE(0xA0F0, 0x1010, iwl9260_2ac_cfg)},	840	{IWL_PCI_DEVICE(0xA0F0, 0x02A4, iwl9462_2ac_cfg_qu_b0_jf_b0)},
841	{IWL_PCI_DEVICE(0xA0F0, 0x1030, iwl9560_2ac_cfg_soc)},	841	{IWL_PCI_DEVICE(0xA0F0, 0x1030, iwl9560_2ac_cfg_qu_b0_jf_b0)},
842	{IWL_PCI_DEVICE(0xA0F0, 0x1210, iwl9260_2ac_cfg)},	842	{IWL_PCI_DEVICE(0xA0F0, 0x1551, killer1550s_2ac_cfg_qu_b0_jf_b0)},
843	{IWL_PCI_DEVICE(0xA0F0, 0x1551, iwl9560_killer_s_2ac_cfg_soc)},	843	{IWL_PCI_DEVICE(0xA0F0, 0x1552, killer1550i_2ac_cfg_qu_b0_jf_b0)},
844	{IWL_PCI_DEVICE(0xA0F0, 0x1552, iwl9560_killer_2ac_cfg_soc)},	844	{IWL_PCI_DEVICE(0xA0F0, 0x2030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
845	{IWL_PCI_DEVICE(0xA0F0, 0x2030, iwl9560_2ac_160_cfg_soc)},	845	{IWL_PCI_DEVICE(0xA0F0, 0x2034, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
846	{IWL_PCI_DEVICE(0xA0F0, 0x2034, iwl9560_2ac_160_cfg_soc)},	846	{IWL_PCI_DEVICE(0xA0F0, 0x4030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
847	{IWL_PCI_DEVICE(0xA0F0, 0x4030, iwl9560_2ac_160_cfg_soc)},	847	{IWL_PCI_DEVICE(0xA0F0, 0x4034, iwl9560_2ac_160_cfg_qu_b0_jf_b0)},
848	{IWL_PCI_DEVICE(0xA0F0, 0x4034, iwl9560_2ac_160_cfg_soc)},	848	{IWL_PCI_DEVICE(0xA0F0, 0x40A4, iwl9462_2ac_cfg_qu_b0_jf_b0)},
849	{IWL_PCI_DEVICE(0xA0F0, 0x40A4, iwl9462_2ac_cfg_soc)},	849	{IWL_PCI_DEVICE(0xA0F0, 0x4234, iwl9560_2ac_cfg_qu_b0_jf_b0)},
850	{IWL_PCI_DEVICE(0xA0F0, 0x4234, iwl9560_2ac_cfg_soc)},	850	{IWL_PCI_DEVICE(0xA0F0, 0x42A4, iwl9462_2ac_cfg_qu_b0_jf_b0)},
851	{IWL_PCI_DEVICE(0xA0F0, 0x42A4, iwl9462_2ac_cfg_soc)},	851
852	{IWL_PCI_DEVICE(0xA370, 0x0030, iwl9560_2ac_160_cfg_soc)},	852	{IWL_PCI_DEVICE(0xA370, 0x0030, iwl9560_2ac_160_cfg_soc)},
853	{IWL_PCI_DEVICE(0xA370, 0x0034, iwl9560_2ac_cfg_soc)},	853	{IWL_PCI_DEVICE(0xA370, 0x0034, iwl9560_2ac_cfg_soc)},
854	{IWL_PCI_DEVICE(0xA370, 0x0038, iwl9560_2ac_160_cfg_soc)},	854	{IWL_PCI_DEVICE(0xA370, 0x0038, iwl9560_2ac_160_cfg_soc)},

drivers/net/wireless/intel/iwlwifi/pcie/trans.c+19−6

 		ptr = cmdq->write_ptr;
 		for (i = 0; i < cmdq->n_window; i++) {
 			u8 idx = iwl_pcie_get_cmd_index(cmdq, ptr);
+			u8 tfdidx;
 			u32 caplen, cmdlen;
+			if (trans->trans_cfg->use_tfh)
+				tfdidx = idx;
+			else
+				tfdidx = ptr;
 			cmdlen = iwl_trans_pcie_get_cmdlen(trans,
-							   cmdq->tfds +
+							   (u8 *)cmdq->tfds +
-							   tfd_size * ptr);
+							   tfd_size * tfdidx);
 			caplen = min_t(u32, TFD_MAX_PAYLOAD_SIZE, cmdlen);
 			if (cmdlen) {
 	spin_lock_init(&trans_pcie->reg_lock);
 	mutex_init(&trans_pcie->mutex);
 	init_waitqueue_head(&trans_pcie->ucode_write_waitq);
+	trans_pcie->rba.alloc_wq = alloc_workqueue("rb_allocator",
+						   WQ_HIGHPRI | WQ_UNBOUND, 1);
+	if (!trans_pcie->rba.alloc_wq) {
+		ret = -ENOMEM;
+		goto out_free_trans;
+	}
+	INIT_WORK(&trans_pcie->rba.rx_alloc, iwl_pcie_rx_allocator_work);
 	trans_pcie->tso_hdr_page = alloc_percpu(struct iwl_tso_hdr_page);
 	if (!trans_pcie->tso_hdr_page) {
 		ret = -ENOMEM;
 		trans_pcie->inta_mask = CSR_INI_SET_MASK;
 	 }
-	trans_pcie->rba.alloc_wq = alloc_workqueue("rb_allocator",
-						   WQ_HIGHPRI | WQ_UNBOUND, 1);
-	INIT_WORK(&trans_pcie->rba.rx_alloc, iwl_pcie_rx_allocator_work);
 #ifdef CONFIG_IWLWIFI_DEBUGFS
 	trans_pcie->fw_mon_data.state = IWL_FW_MON_DBGFS_STATE_CLOSED;
 	mutex_init(&trans_pcie->fw_mon_data.mutex);
 	iwl_pcie_free_ict(trans);
 out_no_pci:
 	free_percpu(trans_pcie->tso_hdr_page);
+	destroy_workqueue(trans_pcie->rba.alloc_wq);
+out_free_trans:
 	iwl_trans_free(trans);
 	return ERR_PTR(ret);
 }

drivers/net/wireless/mac80211_hwsim.c+1−1

@@ -4026,7 +4026,7 @@ static int __init init_mac80211_hwsim(void) · 4025 unmodified lines
4026	err = dev_alloc_name(hwsim_mon, hwsim_mon->name);	4026	err = dev_alloc_name(hwsim_mon, hwsim_mon->name);
4027	if (err < 0) {	4027	if (err < 0) {
4028	rtnl_unlock();	4028	rtnl_unlock();
4029	goto out_free_radios;	4029	goto out_free_mon;
4030	}	4030	}
4031		4031
4032	err = register_netdevice(hwsim_mon);	4032	err = register_netdevice(hwsim_mon);

drivers/net/wireless/ralink/rt2x00/rt2x00.h+0−1

@@ -23,7 +23,6 @@ · 22 unmodified lines
23	#include <linux/leds.h>	23	#include <linux/leds.h>
24	#include <linux/mutex.h>	24	#include <linux/mutex.h>
25	#include <linux/etherdevice.h>	25	#include <linux/etherdevice.h>
26	#include <linux/input-polldev.h>
27	#include <linux/kfifo.h>	26	#include <linux/kfifo.h>
28	#include <linux/hrtimer.h>	27	#include <linux/hrtimer.h>
29	#include <linux/average.h>	28	#include <linux/average.h>

drivers/net/wireless/ralink/rt2x00/rt2x00debug.c+1−1

@@ -555,7 +555,7 @@ static ssize_t rt2x00debug_write_restart_hw(struct file *file, · 554 unmodified lines
555	{	555	{
556	struct rt2x00debug_intf *intf = file->private_data;	556	struct rt2x00debug_intf *intf = file->private_data;
557	struct rt2x00_dev *rt2x00dev = intf->rt2x00dev;	557	struct rt2x00_dev *rt2x00dev = intf->rt2x00dev;
558	static unsigned long last_reset;	558	static unsigned long last_reset = INITIAL_JIFFIES;
559		559
560	if (!rt2x00_has_cap_restart_hw(rt2x00dev))	560	if (!rt2x00_has_cap_restart_hw(rt2x00dev))
561	return -EOPNOTSUPP;	561	return -EOPNOTSUPP;

drivers/net/xen-netback/interface.c+0−1

@@ -719,7 +719,6 @@ err_unmap: · 718 unmodified lines
719	xenvif_unmap_frontend_data_rings(queue);	719	xenvif_unmap_frontend_data_rings(queue);
720	netif_napi_del(&queue->napi);	720	netif_napi_del(&queue->napi);
721	err:	721	err:
722	module_put(THIS_MODULE);
723	return err;	722	return err;
724	}	723	}
725		724

drivers/nfc/pn533/usb.c+8−1

 	rc = pn533_finalize_setup(priv);
 	if (rc)
-		goto error;
+		goto err_deregister;
 	usb_set_intfdata(interface, phy);
 	return 0;
+err_deregister:
+	pn533_unregister_device(phy->priv);
 error:
+	usb_kill_urb(phy->in_urb);
+	usb_kill_urb(phy->out_urb);
+	usb_kill_urb(phy->ack_urb);
 	usb_free_urb(phy->in_urb);
 	usb_free_urb(phy->out_urb);
 	usb_free_urb(phy->ack_urb);
 	usb_put_dev(phy->udev);
 	kfree(in_buf);
+	kfree(phy->ack_buffer);
 	return rc;
 }

drivers/nvme/host/core.c+68−26

 	/*
 	 * Only new queue scan work when admin and IO queues are both alive
 	 */
-	if (ctrl->state == NVME_CTRL_LIVE)
+	if (ctrl->state == NVME_CTRL_LIVE && ctrl->tagset)
 		queue_work(nvme_wq, &ctrl->scan_work);
 }
+/*
+ * Use this function to proceed with scheduling reset_work for a controller
+ * that had previously been set to the resetting state. This is intended for
+ * code paths that can't be interrupted by other reset attempts. A hot removal
+ * may prevent this from succeeding.
+ */
+int nvme_try_sched_reset(struct nvme_ctrl *ctrl)
+{
+	if (ctrl->state != NVME_CTRL_RESETTING)
+		return -EBUSY;
+	if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
+		return -EBUSY;
+	return 0;
+}
+EXPORT_SYMBOL_GPL(nvme_try_sched_reset);
 int nvme_reset_ctrl(struct nvme_ctrl *ctrl)
 {
 	if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING))
 	ret = nvme_reset_ctrl(ctrl);
 	if (!ret) {
 		flush_work(&ctrl->reset_work);
-		if (ctrl->state != NVME_CTRL_LIVE &&
+		if (ctrl->state != NVME_CTRL_LIVE)
-		    ctrl->state != NVME_CTRL_ADMIN_ONLY)
 			ret = -ENETRESET;
 	}
 	old_state = ctrl->state;
 	switch (new_state) {
-	case NVME_CTRL_ADMIN_ONLY:
-		switch (old_state) {
-		case NVME_CTRL_CONNECTING:
-			changed = true;
-			/* FALLTHRU */
-		default:
-			break;
-		}
-		break;
 	case NVME_CTRL_LIVE:
 		switch (old_state) {
 		case NVME_CTRL_NEW:
 		switch (old_state) {
 		case NVME_CTRL_NEW:
 		case NVME_CTRL_LIVE:
-		case NVME_CTRL_ADMIN_ONLY:
 			changed = true;
 			/* FALLTHRU */
 		default:
 	case NVME_CTRL_DELETING:
 		switch (old_state) {
 		case NVME_CTRL_LIVE:
-		case NVME_CTRL_ADMIN_ONLY:
 		case NVME_CTRL_RESETTING:
 		case NVME_CTRL_CONNECTING:
 			changed = true;
 		break;
 	}
-	if (changed)
+	if (changed) {
 		ctrl->state = new_state;
+		wake_up_all(&ctrl->state_wq);
+	}
 	spin_unlock_irqrestore(&ctrl->lock, flags);
 	if (changed && ctrl->state == NVME_CTRL_LIVE)
 }
 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
+/*
+ * Returns true for sink states that can't ever transition back to live.
+ */
+static bool nvme_state_terminal(struct nvme_ctrl *ctrl)
+{
+	switch (ctrl->state) {
+	case NVME_CTRL_NEW:
+	case NVME_CTRL_LIVE:
+	case NVME_CTRL_RESETTING:
+	case NVME_CTRL_CONNECTING:
+		return false;
+	case NVME_CTRL_DELETING:
+	case NVME_CTRL_DEAD:
+		return true;
+	default:
+		WARN_ONCE(1, "Unhandled ctrl state:%d", ctrl->state);
+		return true;
+	}
+}
+/*
+ * Waits for the controller state to be resetting, or returns false if it is
+ * not possible to ever transition to that state.
+ */
+bool nvme_wait_reset(struct nvme_ctrl *ctrl)
+{
+	wait_event(ctrl->state_wq,
+		   nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) ||
+		   nvme_state_terminal(ctrl));
+	return ctrl->state == NVME_CTRL_RESETTING;
+}
+EXPORT_SYMBOL_GPL(nvme_wait_reset);
 static void nvme_free_ns_head(struct kref *ref)
 {
 	struct nvme_ns_head *head =
 		if (ns->disk && nvme_revalidate_disk(ns->disk))
 			nvme_set_queue_dying(ns);
 	up_read(&ctrl->namespaces_rwsem);
-	nvme_remove_invalid_namespaces(ctrl, NVME_NSID_ALL);
 }
 static void nvme_passthru_end(struct nvme_ctrl *ctrl, u32 effects)
 		nvme_unfreeze(ctrl);
 		nvme_mpath_unfreeze(ctrl->subsys);
 		mutex_unlock(&ctrl->subsys->lock);
+		nvme_remove_invalid_namespaces(ctrl, NVME_NSID_ALL);
 		mutex_unlock(&ctrl->scan_lock);
 	}
 	if (effects & NVME_CMD_EFFECTS_CCC)
 	switch (ctrl->state) {
 	case NVME_CTRL_LIVE:
-	case NVME_CTRL_ADMIN_ONLY:
 		break;
 	default:
 		return -EWOULDBLOCK;
 	static const char *const state_name[] = {
 		[NVME_CTRL_NEW]		= "new",
 		[NVME_CTRL_LIVE]	= "live",
-		[NVME_CTRL_ADMIN_ONLY]	= "only-admin",
 		[NVME_CTRL_RESETTING]	= "resetting",
 		[NVME_CTRL_CONNECTING]	= "connecting",
 		[NVME_CTRL_DELETING]	= "deleting",
 	struct nvme_id_ctrl *id;
 	unsigned nn;
-	if (ctrl->state != NVME_CTRL_LIVE)
+	/* No tagset on a live ctrl means IO queues could not created */
+	if (ctrl->state != NVME_CTRL_LIVE || !ctrl->tagset)
 		return;
-	WARN_ON_ONCE(!ctrl->tagset);
 	if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) {
 		dev_info(ctrl->device, "rescanning namespaces.\n");
 		nvme_clear_changed_ns_log(ctrl);
 		if (time_after(jiffies, fw_act_timeout)) {
 			dev_warn(ctrl->device,
 				"Fw activation timeout, reset controller\n");
-			nvme_reset_ctrl(ctrl);
+			nvme_try_sched_reset(ctrl);
-			break;
+			return;
 		}
 		msleep(100);
 	}
-	if (ctrl->state != NVME_CTRL_LIVE)
+	if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE))
 		return;
 	nvme_start_queues(ctrl);
 		nvme_queue_scan(ctrl);
 		break;
 	case NVME_AER_NOTICE_FW_ACT_STARTING:
-		queue_work(nvme_wq, &ctrl->fw_act_work);
+		/*
+		 * We are (ab)using the RESETTING state to prevent subsequent
+		 * recovery actions from interfering with the controller's
+		 * firmware activation.
+		 */
+		if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING))
+			queue_work(nvme_wq, &ctrl->fw_act_work);
 		break;
 #ifdef CONFIG_NVME_MULTIPATH
 	case NVME_AER_NOTICE_ANA:
 	INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
 	INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work);
 	INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work);
+	init_waitqueue_head(&ctrl->state_wq);
 	INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work);
 	memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd));

drivers/nvme/host/fabrics.h+1−2

 static inline bool nvmf_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
 		bool queue_live)
 {
-	if (likely(ctrl->state == NVME_CTRL_LIVE ||
+	if (likely(ctrl->state == NVME_CTRL_LIVE))
-		   ctrl->state == NVME_CTRL_ADMIN_ONLY))
 		return true;
 	return __nvmf_check_ready(ctrl, rq, queue_live);
 }

drivers/nvme/host/nvme.h+4−1

 #include <linux/sed-opal.h>
 #include <linux/fault-inject.h>
 #include <linux/rcupdate.h>
+#include <linux/wait.h>
 #include <trace/events/block.h>
 enum nvme_ctrl_state {
 	NVME_CTRL_NEW,
 	NVME_CTRL_LIVE,
-	NVME_CTRL_ADMIN_ONLY,    /* Only admin queue live */
 	NVME_CTRL_RESETTING,
 	NVME_CTRL_CONNECTING,
 	NVME_CTRL_DELETING,
 	struct cdev cdev;
 	struct work_struct reset_work;
 	struct work_struct delete_work;
+	wait_queue_head_t state_wq;
 	struct nvme_subsystem *subsys;
 	struct list_head subsys_entry;
 bool nvme_cancel_request(struct request *req, void *data, bool reserved);
 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
 		enum nvme_ctrl_state new_state);
+bool nvme_wait_reset(struct nvme_ctrl *ctrl);
 int nvme_disable_ctrl(struct nvme_ctrl *ctrl);
 int nvme_enable_ctrl(struct nvme_ctrl *ctrl);
 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl);
 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
 int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl);
+int nvme_try_sched_reset(struct nvme_ctrl *ctrl);
 int nvme_delete_ctrl(struct nvme_ctrl *ctrl);
 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp,

drivers/nvme/host/pci.c+49−34

@@ -773,7 +773,8 @@ static blk_status_t nvme_setup_prp_simple(struct nvme_dev *dev, · 772 unmodified lines
773	struct bio_vec *bv)	773	struct bio_vec *bv)
774	{	774	{
775	struct nvme_iod *iod = blk_mq_rq_to_pdu(req);	775	struct nvme_iod *iod = blk_mq_rq_to_pdu(req);
776	unsigned int first_prp_len = dev->ctrl.page_size - bv->bv_offset;	776	unsigned int offset = bv->bv_offset & (dev->ctrl.page_size - 1);
		777	unsigned int first_prp_len = dev->ctrl.page_size - offset;
777		778
778	iod->first_dma = dma_map_bvec(dev->dev, bv, rq_dma_dir(req), 0);	779	iod->first_dma = dma_map_bvec(dev->dev, bv, rq_dma_dir(req), 0);
779	if (dma_mapping_error(dev->dev, iod->first_dma))	780	if (dma_mapping_error(dev->dev, iod->first_dma))
@@ -2263,10 +2264,7 @@ static bool __nvme_disable_io_queues(struct nvme_dev *dev, u8 opcode) · 1483 unmodified lines
2263	return true;	2264	return true;
2264	}	2265	}
2265		2266
2266	/*	2267	static void nvme_dev_add(struct nvme_dev *dev)
2267	* return error value only when tagset allocation failed
2268	*/
2269	static int nvme_dev_add(struct nvme_dev *dev)
2270	{	2268	{
2271	int ret;	2269	int ret;
2272		2270
@@ -2296,7 +2294,7 @@ static int nvme_dev_add(struct nvme_dev *dev) · 23 unmodified lines
2296	if (ret) {	2294	if (ret) {
2297	dev_warn(dev->ctrl.device,	2295	dev_warn(dev->ctrl.device,
2298	"IO queues tagset allocation failed %d\n", ret);	2296	"IO queues tagset allocation failed %d\n", ret);
2299	return ret;	2297	return;
2300	}	2298	}
2301	dev->ctrl.tagset = &dev->tagset;	2299	dev->ctrl.tagset = &dev->tagset;
2302	} else {	2300	} else {
@@ -2307,7 +2305,6 @@ static int nvme_dev_add(struct nvme_dev *dev) · 4 unmodified lines
2307	}	2305	}
2308		2306
2309	nvme_dbbuf_set(dev);	2307	nvme_dbbuf_set(dev);
2310	return 0;
2311	}	2308	}
2312		2309
2313	static int nvme_pci_enable(struct nvme_dev *dev)	2310	static int nvme_pci_enable(struct nvme_dev *dev)
@@ -2467,6 +2464,14 @@ static void nvme_dev_disable(struct nvme_dev *dev, bool shutdown) · 153 unmodified lines
2467	mutex_unlock(&dev->shutdown_lock);	2464	mutex_unlock(&dev->shutdown_lock);
2468	}	2465	}
2469		2466
		2467	static int nvme_disable_prepare_reset(struct nvme_dev *dev, bool shutdown)
		2468	{
		2469	if (!nvme_wait_reset(&dev->ctrl))
		2470	return -EBUSY;
		2471	nvme_dev_disable(dev, shutdown);
		2472	return 0;
		2473	}
		2474
2470	static int nvme_setup_prp_pools(struct nvme_dev *dev)	2475	static int nvme_setup_prp_pools(struct nvme_dev *dev)
2471	{	2476	{
2472	dev->prp_page_pool = dma_pool_create("prp list page", dev->dev,	2477	dev->prp_page_pool = dma_pool_create("prp list page", dev->dev,
@@ -2490,14 +2495,20 @@ static void nvme_release_prp_pools(struct nvme_dev *dev) · 17 unmodified lines
2490	dma_pool_destroy(dev->prp_small_pool);	2495	dma_pool_destroy(dev->prp_small_pool);
2491	}	2496	}
2492		2497
		2498	static void nvme_free_tagset(struct nvme_dev *dev)
		2499	{
		2500	if (dev->tagset.tags)
		2501	blk_mq_free_tag_set(&dev->tagset);
		2502	dev->ctrl.tagset = NULL;
		2503	}
		2504
2493	static void nvme_pci_free_ctrl(struct nvme_ctrl *ctrl)	2505	static void nvme_pci_free_ctrl(struct nvme_ctrl *ctrl)
2494	{	2506	{
2495	struct nvme_dev *dev = to_nvme_dev(ctrl);	2507	struct nvme_dev *dev = to_nvme_dev(ctrl);
2496		2508
2497	nvme_dbbuf_dma_free(dev);	2509	nvme_dbbuf_dma_free(dev);
2498	put_device(dev->dev);	2510	put_device(dev->dev);
2499	if (dev->tagset.tags)	2511	nvme_free_tagset(dev);
2500	blk_mq_free_tag_set(&dev->tagset);
2501	if (dev->ctrl.admin_q)	2512	if (dev->ctrl.admin_q)
2502	blk_put_queue(dev->ctrl.admin_q);	2513	blk_put_queue(dev->ctrl.admin_q);
2503	kfree(dev->queues);	2514	kfree(dev->queues);
@@ -2508,6 +2519,11 @@ static void nvme_pci_free_ctrl(struct nvme_ctrl *ctrl) · 4 unmodified lines
2508		2519
2509	static void nvme_remove_dead_ctrl(struct nvme_dev *dev)	2520	static void nvme_remove_dead_ctrl(struct nvme_dev *dev)
2510	{	2521	{
		2522	/*
		2523	* Set state to deleting now to avoid blocking nvme_wait_reset(), which
		2524	* may be holding this pci_dev's device lock.
		2525	*/
		2526	nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_DELETING);
2511	nvme_get_ctrl(&dev->ctrl);	2527	nvme_get_ctrl(&dev->ctrl);
2512	nvme_dev_disable(dev, false);	2528	nvme_dev_disable(dev, false);
2513	nvme_kill_queues(&dev->ctrl);	2529	nvme_kill_queues(&dev->ctrl);
@@ -2521,7 +2537,6 @@ static void nvme_reset_work(struct work_struct *work) · 7 unmodified lines
2521	container_of(work, struct nvme_dev, ctrl.reset_work);	2537	container_of(work, struct nvme_dev, ctrl.reset_work);
2522	bool was_suspend = !!(dev->ctrl.ctrl_config & NVME_CC_SHN_NORMAL);	2538	bool was_suspend = !!(dev->ctrl.ctrl_config & NVME_CC_SHN_NORMAL);
2523	int result;	2539	int result;
2524	enum nvme_ctrl_state new_state = NVME_CTRL_LIVE;
2525		2540
2526	if (WARN_ON(dev->ctrl.state != NVME_CTRL_RESETTING)) {	2541	if (WARN_ON(dev->ctrl.state != NVME_CTRL_RESETTING)) {
2527	result = -ENODEV;	2542	result = -ENODEV;
@@ -2615,13 +2630,11 @@ static void nvme_reset_work(struct work_struct *work) · 87 unmodified lines
2615	dev_warn(dev->ctrl.device, "IO queues not created\n");	2630	dev_warn(dev->ctrl.device, "IO queues not created\n");
2616	nvme_kill_queues(&dev->ctrl);	2631	nvme_kill_queues(&dev->ctrl);
2617	nvme_remove_namespaces(&dev->ctrl);	2632	nvme_remove_namespaces(&dev->ctrl);
2618	new_state = NVME_CTRL_ADMIN_ONLY;	2633	nvme_free_tagset(dev);
2619	} else {	2634	} else {
2620	nvme_start_queues(&dev->ctrl);	2635	nvme_start_queues(&dev->ctrl);
2621	nvme_wait_freeze(&dev->ctrl);	2636	nvme_wait_freeze(&dev->ctrl);
2622	/* hit this only when allocate tagset fails */	2637	nvme_dev_add(dev);
2623	if (nvme_dev_add(dev))
2624	new_state = NVME_CTRL_ADMIN_ONLY;
2625	nvme_unfreeze(&dev->ctrl);	2638	nvme_unfreeze(&dev->ctrl);
2626	}	2639	}
2627		2640
@@ -2629,9 +2642,9 @@ static void nvme_reset_work(struct work_struct *work) · 1 unmodified line
2629	* If only admin queue live, keep it to do further investigation or	2642	* If only admin queue live, keep it to do further investigation or
2630	* recovery.	2643	* recovery.
2631	*/	2644	*/
2632	if (!nvme_change_ctrl_state(&dev->ctrl, new_state)) {	2645	if (!nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_LIVE)) {
2633	dev_warn(dev->ctrl.device,	2646	dev_warn(dev->ctrl.device,
2634	"failed to mark controller state %d\n", new_state);	2647	"failed to mark controller live state\n");
2635	result = -ENODEV;	2648	result = -ENODEV;
2636	goto out;	2649	goto out;
2637	}	2650	}
@@ -2672,7 +2685,7 @@ static int nvme_pci_reg_write32(struct nvme_ctrl *ctrl, u32 off, u32 val) · 34 unmodified lines
2672		2685
2673	static int nvme_pci_reg_read64(struct nvme_ctrl ctrl, u32 off, u64 val)	2686	static int nvme_pci_reg_read64(struct nvme_ctrl ctrl, u32 off, u64 val)
2674	{	2687	{
2675	*val = readq(to_nvme_dev(ctrl)->bar + off);	2688	*val = lo_hi_readq(to_nvme_dev(ctrl)->bar + off);
2676	return 0;	2689	return 0;
2677	}	2690	}
2678		2691
@@ -2836,19 +2849,28 @@ static int nvme_probe(struct pci_dev pdev, const struct pci_device_id id) · 157 unmodified lines
2836	static void nvme_reset_prepare(struct pci_dev *pdev)	2849	static void nvme_reset_prepare(struct pci_dev *pdev)
2837	{	2850	{
2838	struct nvme_dev *dev = pci_get_drvdata(pdev);	2851	struct nvme_dev *dev = pci_get_drvdata(pdev);
2839	nvme_dev_disable(dev, false);	2852
		2853	/*
		2854	* We don't need to check the return value from waiting for the reset
		2855	* state as pci_dev device lock is held, making it impossible to race
		2856	* with ->remove().
		2857	*/
		2858	nvme_disable_prepare_reset(dev, false);
		2859	nvme_sync_queues(&dev->ctrl);
2840	}	2860	}
2841		2861
2842	static void nvme_reset_done(struct pci_dev *pdev)	2862	static void nvme_reset_done(struct pci_dev *pdev)
2843	{	2863	{
2844	struct nvme_dev *dev = pci_get_drvdata(pdev);	2864	struct nvme_dev *dev = pci_get_drvdata(pdev);
2845	nvme_reset_ctrl_sync(&dev->ctrl);	2865
		2866	if (!nvme_try_sched_reset(&dev->ctrl))
		2867	flush_work(&dev->ctrl.reset_work);
2846	}	2868	}
2847		2869
2848	static void nvme_shutdown(struct pci_dev *pdev)	2870	static void nvme_shutdown(struct pci_dev *pdev)
2849	{	2871	{
2850	struct nvme_dev *dev = pci_get_drvdata(pdev);	2872	struct nvme_dev *dev = pci_get_drvdata(pdev);
2851	nvme_dev_disable(dev, true);	2873	nvme_disable_prepare_reset(dev, true);
2852	}	2874	}
2853		2875
2854	/*	2876	/*
@@ -2901,7 +2923,7 @@ static int nvme_resume(struct device *dev) · 46 unmodified lines
2901		2923
2902	if (ndev->last_ps == U32_MAX \|\|	2924	if (ndev->last_ps == U32_MAX \|\|
2903	nvme_set_power_state(ctrl, ndev->last_ps) != 0)	2925	nvme_set_power_state(ctrl, ndev->last_ps) != 0)
2904	nvme_reset_ctrl(ctrl);	2926	return nvme_try_sched_reset(&ndev->ctrl);
2905	return 0;	2927	return 0;
2906	}	2928	}
2907		2929
@@ -2929,17 +2951,14 @@ static int nvme_suspend(struct device *dev) · 21 unmodified lines
2929	*/	2951	*/
2930	if (pm_suspend_via_firmware() \|\| !ctrl->npss \|\|	2952	if (pm_suspend_via_firmware() \|\| !ctrl->npss \|\|
2931	!pcie_aspm_enabled(pdev) \|\|	2953	!pcie_aspm_enabled(pdev) \|\|
2932	(ndev->ctrl.quirks & NVME_QUIRK_SIMPLE_SUSPEND)) {	2954	(ndev->ctrl.quirks & NVME_QUIRK_SIMPLE_SUSPEND))
2933	nvme_dev_disable(ndev, true);	2955	return nvme_disable_prepare_reset(ndev, true);
2934	return 0;
2935	}
2936		2956
2937	nvme_start_freeze(ctrl);	2957	nvme_start_freeze(ctrl);
2938	nvme_wait_freeze(ctrl);	2958	nvme_wait_freeze(ctrl);
2939	nvme_sync_queues(ctrl);	2959	nvme_sync_queues(ctrl);
2940		2960
2941	if (ctrl->state != NVME_CTRL_LIVE &&	2961	if (ctrl->state != NVME_CTRL_LIVE)
2942	ctrl->state != NVME_CTRL_ADMIN_ONLY)
2943	goto unfreeze;	2962	goto unfreeze;
2944		2963
2945	ret = nvme_get_power_state(ctrl, &ndev->last_ps);	2964	ret = nvme_get_power_state(ctrl, &ndev->last_ps);
@@ -2965,9 +2984,8 @@ static int nvme_suspend(struct device *dev) · 19 unmodified lines
2965	* Clearing npss forces a controller reset on resume. The	2984	* Clearing npss forces a controller reset on resume. The
2966	* correct value will be resdicovered then.	2985	* correct value will be resdicovered then.
2967	*/	2986	*/
2968	nvme_dev_disable(ndev, true);	2987	ret = nvme_disable_prepare_reset(ndev, true);
2969	ctrl->npss = 0;	2988	ctrl->npss = 0;
2970	ret = 0;
2971	}	2989	}
2972	unfreeze:	2990	unfreeze:
2973	nvme_unfreeze(ctrl);	2991	nvme_unfreeze(ctrl);
@@ -2977,9 +2995,7 @@ unfreeze: · 3 unmodified lines
2977	static int nvme_simple_suspend(struct device *dev)	2995	static int nvme_simple_suspend(struct device *dev)
2978	{	2996	{
2979	struct nvme_dev *ndev = pci_get_drvdata(to_pci_dev(dev));	2997	struct nvme_dev *ndev = pci_get_drvdata(to_pci_dev(dev));
2980		2998	return nvme_disable_prepare_reset(ndev, true);
2981	nvme_dev_disable(ndev, true);
2982	return 0;
2983	}	2999	}
2984		3000
2985	static int nvme_simple_resume(struct device *dev)	3001	static int nvme_simple_resume(struct device *dev)
@@ -2987,8 +3003,7 @@ static int nvme_simple_resume(struct device *dev) · 1 unmodified line
2987	struct pci_dev *pdev = to_pci_dev(dev);	3003	struct pci_dev *pdev = to_pci_dev(dev);
2988	struct nvme_dev *ndev = pci_get_drvdata(pdev);	3004	struct nvme_dev *ndev = pci_get_drvdata(pdev);
2989		3005
2990	nvme_reset_ctrl(&ndev->ctrl);	3006	return nvme_try_sched_reset(&ndev->ctrl);
2991	return 0;
2992	}	3007	}
2993		3008
2994	static const struct dev_pm_ops nvme_dev_pm_ops = {	3009	static const struct dev_pm_ops nvme_dev_pm_ops = {

drivers/nvme/host/rdma.c+8−0

@@ -1701,6 +1701,14 @@ nvme_rdma_timeout(struct request *rq, bool reserved) · 1700 unmodified lines
1701	dev_warn(ctrl->ctrl.device, "I/O %d QID %d timeout\n",	1701	dev_warn(ctrl->ctrl.device, "I/O %d QID %d timeout\n",
1702	rq->tag, nvme_rdma_queue_idx(queue));	1702	rq->tag, nvme_rdma_queue_idx(queue));
1703		1703
		1704	/*
		1705	* Restart the timer if a controller reset is already scheduled. Any
		1706	* timed out commands would be handled before entering the connecting
		1707	* state.
		1708	*/
		1709	if (ctrl->ctrl.state == NVME_CTRL_RESETTING)
		1710	return BLK_EH_RESET_TIMER;
		1711
1704	if (ctrl->ctrl.state != NVME_CTRL_LIVE) {	1712	if (ctrl->ctrl.state != NVME_CTRL_LIVE) {
1705	/*	1713	/*
1706	* Teardown immediately if controller times out while starting	1714	* Teardown immediately if controller times out while starting

drivers/nvme/host/tcp.c+11−0

 	queue->sock->sk->sk_data_ready = nvme_tcp_data_ready;
 	queue->sock->sk->sk_state_change = nvme_tcp_state_change;
 	queue->sock->sk->sk_write_space = nvme_tcp_write_space;
+#ifdef CONFIG_NET_RX_BUSY_POLL
 	queue->sock->sk->sk_ll_usec = 1;
+#endif
 	write_unlock_bh(&queue->sock->sk->sk_callback_lock);
 	return 0;
 	struct nvme_tcp_ctrl *ctrl = req->queue->ctrl;
 	struct nvme_tcp_cmd_pdu *pdu = req->pdu;
+	/*
+	 * Restart the timer if a controller reset is already scheduled. Any
+	 * timed out commands would be handled before entering the connecting
+	 * state.
+	 */
+	if (ctrl->ctrl.state == NVME_CTRL_RESETTING)
+		return BLK_EH_RESET_TIMER;
 	dev_warn(ctrl->ctrl.device,
 		"queue %d: timeout request %#x type %d\n",
 		nvme_tcp_queue_id(req->queue), rq->tag, pdu->hdr.type);
 	ret = nvme_tcp_map_data(queue, rq);
 	if (unlikely(ret)) {
+		nvme_cleanup_cmd(rq);
 		dev_err(queue->ctrl->ctrl.device,
 			"Failed to map data (%d)\n", ret);
 		return ret;

drivers/nvme/target/loop.c+3−1

 		iod->sg_table.sgl = iod->first_sgl;
 		if (sg_alloc_table_chained(&iod->sg_table,
 				blk_rq_nr_phys_segments(req),
-				iod->sg_table.sgl, SG_CHUNK_SIZE))
+				iod->sg_table.sgl, SG_CHUNK_SIZE)) {
+			nvme_cleanup_cmd(req);
 			return BLK_STS_RESOURCE;
+		}
 		iod->req.sg = iod->sg_table.sgl;
 		iod->req.sg_cnt = blk_rq_map_sg(req->q, req, iod->sg_table.sgl);

drivers/of/of_reserved_mem.c+3−1

 	if (!target)
 		return -ENODEV;
-	if (!of_device_is_available(target))
+	if (!of_device_is_available(target)) {
+		of_node_put(target);
 		return 0;
+	}
 	rmem = __find_rmem(target);
 	of_node_put(target);

drivers/of/unittest.c+1−0

@@ -1207,6 +1207,7 @@ static int __init unittest_data_add(void) · 1206 unmodified lines
1207	of_fdt_unflatten_tree(unittest_data, NULL, &unittest_data_node);	1207	of_fdt_unflatten_tree(unittest_data, NULL, &unittest_data_node);
1208	if (!unittest_data_node) {	1208	if (!unittest_data_node) {
1209	pr_warn("%s: No tree to attach; not running tests\n", __func__);	1209	pr_warn("%s: No tree to attach; not running tests\n", __func__);
		1210	kfree(unittest_data);
1210	return -ENODATA;	1211	return -ENODATA;
1211	}	1212	}
1212		1213

drivers/opp/core.c+3−13

 			goto free_regulators;
 		}
-		ret = regulator_enable(reg);
-		if (ret < 0) {
-			regulator_put(reg);
-			goto free_regulators;
-		}
 		opp_table->regulators[i] = reg;
 	}
 	return opp_table;
 free_regulators:
-	while (i--) {
+	while (i != 0)
-		regulator_disable(opp_table->regulators[i]);
+		regulator_put(opp_table->regulators[--i]);
-		regulator_put(opp_table->regulators[i]);
-	}
 	kfree(opp_table->regulators);
 	opp_table->regulators = NULL;
 	/* Make sure there are no concurrent readers while updating opp_table */
 	WARN_ON(!list_empty(&opp_table->opp_list));
-	for (i = opp_table->regulator_count - 1; i >= 0; i--) {
+	for (i = opp_table->regulator_count - 1; i >= 0; i--)
-		regulator_disable(opp_table->regulators[i]);
 		regulator_put(opp_table->regulators[i]);
-	}
 	_free_set_opp_data(opp_table);

drivers/opp/of.c+7−2

 {
 	struct dev_pm_opp *opp;
-	lockdep_assert_held(&opp_table_lock);
 	mutex_lock(&opp_table->lock);
 	list_for_each_entry(opp, &opp_table->opp_list, node) {
 		return 0;
 	}
+	/*
+	 * Re-initialize list_kref every time we add static OPPs to the OPP
+	 * table as the reference count may be 0 after the last tie static OPPs
+	 * were removed.
+	 */
+	kref_init(&opp_table->list_kref);
 	/* We have opp-table node now, iterate over it and add OPPs */
 	for_each_available_child_of_node(opp_table->np, np) {
 		opp = _opp_add_static_v2(opp_table, dev, np);

drivers/parisc/sba_iommu.c+0−8

@@ -678,14 +678,6 @@ static int sba_dma_supported( struct device *dev, u64 mask) · 677 unmodified lines
678	return(0);	678	return(0);
679	}	679	}
680		680
681	/* Documentation/DMA-API-HOWTO.txt tells drivers to try 64-bit
682	* first, then fall back to 32-bit if that fails.
683	* We are just "encouraging" 32-bit DMA masks here since we can
684	* never allow IOMMU bypass unless we add special support for ZX1.
685	*/
686	if (mask > ~0U)
687	return 0;
688
689	ioc = GET_IOC(dev);	681	ioc = GET_IOC(dev);
690	if (!ioc)	682	if (!ioc)
691	return 0;	683	return 0;

drivers/pci/pci.c+11−13

 	pci_update_current_state(dev, dev->current_state);
 }
-/**
- * pci_power_up - Put the given device into D0 forcibly
- * @dev: PCI device to power up
- */
-void pci_power_up(struct pci_dev *dev)
-{
-	if (platform_pci_power_manageable(dev))
-		platform_pci_set_power_state(dev, PCI_D0);
-	pci_raw_set_power_state(dev, PCI_D0);
-	pci_update_current_state(dev, PCI_D0);
-}
 /**
  * pci_platform_power_transition - Use platform to change device power state
  * @dev: PCI device to handle.
 }
 EXPORT_SYMBOL(pci_set_power_state);
+/**
+ * pci_power_up - Put the given device into D0 forcibly
+ * @dev: PCI device to power up
+ */
+void pci_power_up(struct pci_dev *dev)
+{
+	__pci_start_power_transition(dev, PCI_D0);
+	pci_raw_set_power_state(dev, PCI_D0);
+	pci_update_current_state(dev, PCI_D0);
+}
 /**
  * pci_choose_state - Choose the power state of a PCI device
  * @dev: PCI device to be suspended

drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c+54−70

@@ -87,7 +87,7 @@ FUNC_GROUP_DECL(MACLINK3, L23); · 86 unmodified lines
87		87
88	#define K25 7	88	#define K25 7
89	SIG_EXPR_LIST_DECL_SESG(K25, MACLINK4, MACLINK4, SIG_DESC_SET(SCU410, 7));	89	SIG_EXPR_LIST_DECL_SESG(K25, MACLINK4, MACLINK4, SIG_DESC_SET(SCU410, 7));
90	SIG_EXPR_LIST_DECL_SESG(K25, SDA14, SDA14, SIG_DESC_SET(SCU4B0, 7));	90	SIG_EXPR_LIST_DECL_SESG(K25, SDA14, I2C14, SIG_DESC_SET(SCU4B0, 7));
91	PIN_DECL_2(K25, GPIOA7, MACLINK4, SDA14);	91	PIN_DECL_2(K25, GPIOA7, MACLINK4, SDA14);
92	FUNC_GROUP_DECL(MACLINK4, K25);	92	FUNC_GROUP_DECL(MACLINK4, K25);
93		93
@@ -1262,13 +1262,13 @@ GROUP_DECL(SPI1, AB11, AC11, AA11); · 1168 unmodified lines
1262	#define AD11 206	1262	#define AD11 206
1263	SIG_EXPR_LIST_DECL_SEMG(AD11, SPI1DQ2, QSPI1, SPI1, SIG_DESC_SET(SCU438, 14));	1263	SIG_EXPR_LIST_DECL_SEMG(AD11, SPI1DQ2, QSPI1, SPI1, SIG_DESC_SET(SCU438, 14));
1264	SIG_EXPR_LIST_DECL_SEMG(AD11, TXD13, UART13G1, UART13,	1264	SIG_EXPR_LIST_DECL_SEMG(AD11, TXD13, UART13G1, UART13,
1265	SIG_DESC_SET(SCU438, 14));	1265	SIG_DESC_CLEAR(SCU4B8, 2), SIG_DESC_SET(SCU4D8, 14));
1266	PIN_DECL_2(AD11, GPIOZ6, SPI1DQ2, TXD13);	1266	PIN_DECL_2(AD11, GPIOZ6, SPI1DQ2, TXD13);
1267		1267
1268	#define AF10 207	1268	#define AF10 207
1269	SIG_EXPR_LIST_DECL_SEMG(AF10, SPI1DQ3, QSPI1, SPI1, SIG_DESC_SET(SCU438, 15));	1269	SIG_EXPR_LIST_DECL_SEMG(AF10, SPI1DQ3, QSPI1, SPI1, SIG_DESC_SET(SCU438, 15));
1270	SIG_EXPR_LIST_DECL_SEMG(AF10, RXD13, UART13G1, UART13,	1270	SIG_EXPR_LIST_DECL_SEMG(AF10, RXD13, UART13G1, UART13,
1271	SIG_DESC_SET(SCU438, 15));	1271	SIG_DESC_CLEAR(SCU4B8, 3), SIG_DESC_SET(SCU4D8, 15));
1272	PIN_DECL_2(AF10, GPIOZ7, SPI1DQ3, RXD13);	1272	PIN_DECL_2(AF10, GPIOZ7, SPI1DQ3, RXD13);
1273		1273
1274	GROUP_DECL(QSPI1, AB11, AC11, AA11, AD11, AF10);	1274	GROUP_DECL(QSPI1, AB11, AC11, AA11, AD11, AF10);
@@ -1440,91 +1440,85 @@ FUNC_GROUP_DECL(RGMII2, D4, C2, C1, D3, E4, F5, D2, E3, D1, F4, E2, E1); · 165 unmodified lines
1440	FUNC_GROUP_DECL(RMII2, D4, C2, C1, D3, D2, D1, F4, E2, E1);	1440	FUNC_GROUP_DECL(RMII2, D4, C2, C1, D3, D2, D1, F4, E2, E1);
1441		1441
1442	#define AB4 232	1442	#define AB4 232
1443	SIG_EXPR_LIST_DECL_SESG(AB4, SD3CLK, SD3, SIG_DESC_SET(SCU400, 24));	1443	SIG_EXPR_LIST_DECL_SEMG(AB4, EMMCCLK, EMMCG1, EMMC, SIG_DESC_SET(SCU400, 24));
1444	PIN_DECL_1(AB4, GPIO18D0, SD3CLK);	1444	PIN_DECL_1(AB4, GPIO18D0, EMMCCLK);
1445		1445
1446	#define AA4 233	1446	#define AA4 233
1447	SIG_EXPR_LIST_DECL_SESG(AA4, SD3CMD, SD3, SIG_DESC_SET(SCU400, 25));	1447	SIG_EXPR_LIST_DECL_SEMG(AA4, EMMCCMD, EMMCG1, EMMC, SIG_DESC_SET(SCU400, 25));
1448	PIN_DECL_1(AA4, GPIO18D1, SD3CMD);	1448	PIN_DECL_1(AA4, GPIO18D1, EMMCCMD);
1449		1449
1450	#define AC4 234	1450	#define AC4 234
1451	SIG_EXPR_LIST_DECL_SESG(AC4, SD3DAT0, SD3, SIG_DESC_SET(SCU400, 26));	1451	SIG_EXPR_LIST_DECL_SEMG(AC4, EMMCDAT0, EMMCG1, EMMC, SIG_DESC_SET(SCU400, 26));
1452	PIN_DECL_1(AC4, GPIO18D2, SD3DAT0);	1452	PIN_DECL_1(AC4, GPIO18D2, EMMCDAT0);
1453		1453
1454	#define AA5 235	1454	#define AA5 235
1455	SIG_EXPR_LIST_DECL_SESG(AA5, SD3DAT1, SD3, SIG_DESC_SET(SCU400, 27));	1455	SIG_EXPR_LIST_DECL_SEMG(AA5, EMMCDAT1, EMMCG4, EMMC, SIG_DESC_SET(SCU400, 27));
1456	PIN_DECL_1(AA5, GPIO18D3, SD3DAT1);	1456	PIN_DECL_1(AA5, GPIO18D3, EMMCDAT1);
1457		1457
1458	#define Y5 236	1458	#define Y5 236
1459	SIG_EXPR_LIST_DECL_SESG(Y5, SD3DAT2, SD3, SIG_DESC_SET(SCU400, 28));	1459	SIG_EXPR_LIST_DECL_SEMG(Y5, EMMCDAT2, EMMCG4, EMMC, SIG_DESC_SET(SCU400, 28));
1460	PIN_DECL_1(Y5, GPIO18D4, SD3DAT2);	1460	PIN_DECL_1(Y5, GPIO18D4, EMMCDAT2);
1461		1461
1462	#define AB5 237	1462	#define AB5 237
1463	SIG_EXPR_LIST_DECL_SESG(AB5, SD3DAT3, SD3, SIG_DESC_SET(SCU400, 29));	1463	SIG_EXPR_LIST_DECL_SEMG(AB5, EMMCDAT3, EMMCG4, EMMC, SIG_DESC_SET(SCU400, 29));
1464	PIN_DECL_1(AB5, GPIO18D5, SD3DAT3);	1464	PIN_DECL_1(AB5, GPIO18D5, EMMCDAT3);
1465		1465
1466	#define AB6 238	1466	#define AB6 238
1467	SIG_EXPR_LIST_DECL_SESG(AB6, SD3CD, SD3, SIG_DESC_SET(SCU400, 30));	1467	SIG_EXPR_LIST_DECL_SEMG(AB6, EMMCCD, EMMCG1, EMMC, SIG_DESC_SET(SCU400, 30));
1468	PIN_DECL_1(AB6, GPIO18D6, SD3CD);	1468	PIN_DECL_1(AB6, GPIO18D6, EMMCCD);
1469		1469
1470	#define AC5 239	1470	#define AC5 239
1471	SIG_EXPR_LIST_DECL_SESG(AC5, SD3WP, SD3, SIG_DESC_SET(SCU400, 31));	1471	SIG_EXPR_LIST_DECL_SEMG(AC5, EMMCWP, EMMCG1, EMMC, SIG_DESC_SET(SCU400, 31));
1472	PIN_DECL_1(AC5, GPIO18D7, SD3WP);	1472	PIN_DECL_1(AC5, GPIO18D7, EMMCWP);
1473		1473
1474	FUNC_GROUP_DECL(SD3, AB4, AA4, AC4, AA5, Y5, AB5, AB6, AC5);	1474	GROUP_DECL(EMMCG1, AB4, AA4, AC4, AB6, AC5);
		1475	GROUP_DECL(EMMCG4, AB4, AA4, AC4, AA5, Y5, AB5, AB6, AC5);
1475		1476
1476	#define Y1 240	1477	#define Y1 240
1477	SIG_EXPR_LIST_DECL_SEMG(Y1, FWSPIDCS, FWSPID, FWSPID, SIG_DESC_SET(SCU500, 3));	1478	SIG_EXPR_LIST_DECL_SEMG(Y1, FWSPIDCS, FWSPID, FWSPID, SIG_DESC_SET(SCU500, 3));
1478	SIG_EXPR_LIST_DECL_SESG(Y1, VBCS, VB, SIG_DESC_SET(SCU500, 5));	1479	SIG_EXPR_LIST_DECL_SESG(Y1, VBCS, VB, SIG_DESC_SET(SCU500, 5));
1479	SIG_EXPR_LIST_DECL_SESG(Y1, SD3DAT4, SD3DAT4, SIG_DESC_SET(SCU404, 0));	1480	SIG_EXPR_LIST_DECL_SEMG(Y1, EMMCDAT4, EMMCG8, EMMC, SIG_DESC_SET(SCU404, 0));
1480	PIN_DECL_3(Y1, GPIO18E0, FWSPIDCS, VBCS, SD3DAT4);	1481	PIN_DECL_3(Y1, GPIO18E0, FWSPIDCS, VBCS, EMMCDAT4);
1481	FUNC_GROUP_DECL(SD3DAT4, Y1);
1482		1482
1483	#define Y2 241	1483	#define Y2 241
1484	SIG_EXPR_LIST_DECL_SEMG(Y2, FWSPIDCK, FWSPID, FWSPID, SIG_DESC_SET(SCU500, 3));	1484	SIG_EXPR_LIST_DECL_SEMG(Y2, FWSPIDCK, FWSPID, FWSPID, SIG_DESC_SET(SCU500, 3));
1485	SIG_EXPR_LIST_DECL_SESG(Y2, VBCK, VB, SIG_DESC_SET(SCU500, 5));	1485	SIG_EXPR_LIST_DECL_SESG(Y2, VBCK, VB, SIG_DESC_SET(SCU500, 5));
1486	SIG_EXPR_LIST_DECL_SESG(Y2, SD3DAT5, SD3DAT5, SIG_DESC_SET(SCU404, 1));	1486	SIG_EXPR_LIST_DECL_SEMG(Y2, EMMCDAT5, EMMCG8, EMMC, SIG_DESC_SET(SCU404, 1));
1487	PIN_DECL_3(Y2, GPIO18E1, FWSPIDCK, VBCK, SD3DAT5);	1487	PIN_DECL_3(Y2, GPIO18E1, FWSPIDCK, VBCK, EMMCDAT5);
1488	FUNC_GROUP_DECL(SD3DAT5, Y2);
1489		1488
1490	#define Y3 242	1489	#define Y3 242
1491	SIG_EXPR_LIST_DECL_SEMG(Y3, FWSPIDMOSI, FWSPID, FWSPID,	1490	SIG_EXPR_LIST_DECL_SEMG(Y3, FWSPIDMOSI, FWSPID, FWSPID,
1492	SIG_DESC_SET(SCU500, 3));	1491	SIG_DESC_SET(SCU500, 3));
1493	SIG_EXPR_LIST_DECL_SESG(Y3, VBMOSI, VB, SIG_DESC_SET(SCU500, 5));	1492	SIG_EXPR_LIST_DECL_SESG(Y3, VBMOSI, VB, SIG_DESC_SET(SCU500, 5));
1494	SIG_EXPR_LIST_DECL_SESG(Y3, SD3DAT6, SD3DAT6, SIG_DESC_SET(SCU404, 2));	1493	SIG_EXPR_LIST_DECL_SEMG(Y3, EMMCDAT6, EMMCG8, EMMC, SIG_DESC_SET(SCU404, 2));
1495	PIN_DECL_3(Y3, GPIO18E2, FWSPIDMOSI, VBMOSI, SD3DAT6);	1494	PIN_DECL_3(Y3, GPIO18E2, FWSPIDMOSI, VBMOSI, EMMCDAT6);
1496	FUNC_GROUP_DECL(SD3DAT6, Y3);
1497		1495
1498	#define Y4 243	1496	#define Y4 243
1499	SIG_EXPR_LIST_DECL_SEMG(Y4, FWSPIDMISO, FWSPID, FWSPID,	1497	SIG_EXPR_LIST_DECL_SEMG(Y4, FWSPIDMISO, FWSPID, FWSPID,
1500	SIG_DESC_SET(SCU500, 3));	1498	SIG_DESC_SET(SCU500, 3));
1501	SIG_EXPR_LIST_DECL_SESG(Y4, VBMISO, VB, SIG_DESC_SET(SCU500, 5));	1499	SIG_EXPR_LIST_DECL_SESG(Y4, VBMISO, VB, SIG_DESC_SET(SCU500, 5));
1502	SIG_EXPR_LIST_DECL_SESG(Y4, SD3DAT7, SD3DAT7, SIG_DESC_SET(SCU404, 3));	1500	SIG_EXPR_LIST_DECL_SEMG(Y4, EMMCDAT7, EMMCG8, EMMC, SIG_DESC_SET(SCU404, 3));
1503	PIN_DECL_3(Y4, GPIO18E3, FWSPIDMISO, VBMISO, SD3DAT7);	1501	PIN_DECL_3(Y4, GPIO18E3, FWSPIDMISO, VBMISO, EMMCDAT7);
1504	FUNC_GROUP_DECL(SD3DAT7, Y4);
1505		1502
1506	GROUP_DECL(FWSPID, Y1, Y2, Y3, Y4);	1503	GROUP_DECL(FWSPID, Y1, Y2, Y3, Y4);
1507	GROUP_DECL(FWQSPID, Y1, Y2, Y3, Y4, AE12, AF12);	1504	GROUP_DECL(FWQSPID, Y1, Y2, Y3, Y4, AE12, AF12);
		1505	GROUP_DECL(EMMCG8, AB4, AA4, AC4, AA5, Y5, AB5, AB6, AC5, Y1, Y2, Y3, Y4);
1508	FUNC_DECL_2(FWSPID, FWSPID, FWQSPID);	1506	FUNC_DECL_2(FWSPID, FWSPID, FWQSPID);
1509	FUNC_GROUP_DECL(VB, Y1, Y2, Y3, Y4);	1507	FUNC_GROUP_DECL(VB, Y1, Y2, Y3, Y4);
1510		1508	FUNC_DECL_3(EMMC, EMMCG1, EMMCG4, EMMCG8);
1511	/*	1509	/*
1512	* FIXME: Confirm bits and priorities are the right way around for the	1510	* FIXME: Confirm bits and priorities are the right way around for the
1513	* following 4 pins	1511	* following 4 pins
1514	*/	1512	*/
1515	#define AF25 244	1513	#define AF25 244
1516	SIG_EXPR_LIST_DECL_SEMG(AF25, I3C3SCL, I3C3, I3C3, SIG_DESC_SET(SCU438, 20),	1514	SIG_EXPR_LIST_DECL_SEMG(AF25, I3C3SCL, I3C3, I3C3, SIG_DESC_SET(SCU438, 20));
1517	SIG_DESC_SET(SCU4D8, 20));	1515	SIG_EXPR_LIST_DECL_SESG(AF25, FSI1CLK, FSI1, SIG_DESC_SET(SCU4D8, 20));
1518	SIG_EXPR_LIST_DECL_SESG(AF25, FSI1CLK, FSI1, SIG_DESC_CLEAR(SCU438, 20),
1519	SIG_DESC_SET(SCU4D8, 20));
1520	PIN_DECL_(AF25, SIG_EXPR_LIST_PTR(AF25, I3C3SCL),	1516	PIN_DECL_(AF25, SIG_EXPR_LIST_PTR(AF25, I3C3SCL),
1521	SIG_EXPR_LIST_PTR(AF25, FSI1CLK));	1517	SIG_EXPR_LIST_PTR(AF25, FSI1CLK));
1522		1518
1523	#define AE26 245	1519	#define AE26 245
1524	SIG_EXPR_LIST_DECL_SEMG(AE26, I3C3SDA, I3C3, I3C3, SIG_DESC_SET(SCU438, 21),	1520	SIG_EXPR_LIST_DECL_SEMG(AE26, I3C3SDA, I3C3, I3C3, SIG_DESC_SET(SCU438, 21));
1525	SIG_DESC_SET(SCU4D8, 21));	1521	SIG_EXPR_LIST_DECL_SESG(AE26, FSI1DATA, FSI1, SIG_DESC_SET(SCU4D8, 21));
1526	SIG_EXPR_LIST_DECL_SESG(AE26, FSI1DATA, FSI1, SIG_DESC_CLEAR(SCU438, 21),
1527	SIG_DESC_SET(SCU4D8, 21));
1528	PIN_DECL_(AE26, SIG_EXPR_LIST_PTR(AE26, I3C3SDA),	1522	PIN_DECL_(AE26, SIG_EXPR_LIST_PTR(AE26, I3C3SDA),
1529	SIG_EXPR_LIST_PTR(AE26, FSI1DATA));	1523	SIG_EXPR_LIST_PTR(AE26, FSI1DATA));
1530		1524
@@ -1533,18 +1527,14 @@ FUNC_DECL_2(I3C3, HVI3C3, I3C3); · 2 unmodified lines
1533	FUNC_GROUP_DECL(FSI1, AF25, AE26);	1527	FUNC_GROUP_DECL(FSI1, AF25, AE26);
1534		1528
1535	#define AE25 246	1529	#define AE25 246
1536	SIG_EXPR_LIST_DECL_SEMG(AE25, I3C4SCL, I3C4, I3C4, SIG_DESC_SET(SCU438, 22),	1530	SIG_EXPR_LIST_DECL_SEMG(AE25, I3C4SCL, I3C4, I3C4, SIG_DESC_SET(SCU438, 22));
1537	SIG_DESC_SET(SCU4D8, 22));	1531	SIG_EXPR_LIST_DECL_SESG(AE25, FSI2CLK, FSI2, SIG_DESC_SET(SCU4D8, 22));
1538	SIG_EXPR_LIST_DECL_SESG(AE25, FSI2CLK, FSI2, SIG_DESC_CLEAR(SCU438, 22),
1539	SIG_DESC_SET(SCU4D8, 22));
1540	PIN_DECL_(AE25, SIG_EXPR_LIST_PTR(AE25, I3C4SCL),	1532	PIN_DECL_(AE25, SIG_EXPR_LIST_PTR(AE25, I3C4SCL),
1541	SIG_EXPR_LIST_PTR(AE25, FSI2CLK));	1533	SIG_EXPR_LIST_PTR(AE25, FSI2CLK));
1542		1534
1543	#define AF24 247	1535	#define AF24 247
1544	SIG_EXPR_LIST_DECL_SEMG(AF24, I3C4SDA, I3C4, I3C4, SIG_DESC_SET(SCU438, 23),	1536	SIG_EXPR_LIST_DECL_SEMG(AF24, I3C4SDA, I3C4, I3C4, SIG_DESC_SET(SCU438, 23));
1545	SIG_DESC_SET(SCU4D8, 23));	1537	SIG_EXPR_LIST_DECL_SESG(AF24, FSI2DATA, FSI2, SIG_DESC_SET(SCU4D8, 23));
1546	SIG_EXPR_LIST_DECL_SESG(AF24, FSI2DATA, FSI2, SIG_DESC_CLEAR(SCU438, 23),
1547	SIG_DESC_SET(SCU4D8, 23));
1548	PIN_DECL_(AF24, SIG_EXPR_LIST_PTR(AF24, I3C4SDA),	1538	PIN_DECL_(AF24, SIG_EXPR_LIST_PTR(AF24, I3C4SDA),
1549	SIG_EXPR_LIST_PTR(AF24, FSI2DATA));	1539	SIG_EXPR_LIST_PTR(AF24, FSI2DATA));
1550		1540
@@ -1574,6 +1564,8 @@ static struct pinctrl_pin_desc aspeed_g6_pins[ASPEED_G6_NR_PINS] = { · 23 unmodified lines
1574	ASPEED_PINCTRL_PIN(A3),	1564	ASPEED_PINCTRL_PIN(A3),
1575	ASPEED_PINCTRL_PIN(AA11),	1565	ASPEED_PINCTRL_PIN(AA11),
1576	ASPEED_PINCTRL_PIN(AA12),	1566	ASPEED_PINCTRL_PIN(AA12),
		1567	ASPEED_PINCTRL_PIN(AA16),
		1568	ASPEED_PINCTRL_PIN(AA17),
1577	ASPEED_PINCTRL_PIN(AA23),	1569	ASPEED_PINCTRL_PIN(AA23),
1578	ASPEED_PINCTRL_PIN(AA24),	1570	ASPEED_PINCTRL_PIN(AA24),
1579	ASPEED_PINCTRL_PIN(AA25),	1571	ASPEED_PINCTRL_PIN(AA25),
@@ -1585,6 +1577,8 @@ static struct pinctrl_pin_desc aspeed_g6_pins[ASPEED_G6_NR_PINS] = { · 5 unmodified lines
1585	ASPEED_PINCTRL_PIN(AB11),	1577	ASPEED_PINCTRL_PIN(AB11),
1586	ASPEED_PINCTRL_PIN(AB12),	1578	ASPEED_PINCTRL_PIN(AB12),
1587	ASPEED_PINCTRL_PIN(AB15),	1579	ASPEED_PINCTRL_PIN(AB15),
		1580	ASPEED_PINCTRL_PIN(AB16),
		1581	ASPEED_PINCTRL_PIN(AB17),
1588	ASPEED_PINCTRL_PIN(AB18),	1582	ASPEED_PINCTRL_PIN(AB18),
1589	ASPEED_PINCTRL_PIN(AB19),	1583	ASPEED_PINCTRL_PIN(AB19),
1590	ASPEED_PINCTRL_PIN(AB22),	1584	ASPEED_PINCTRL_PIN(AB22),
@@ -1602,6 +1596,7 @@ static struct pinctrl_pin_desc aspeed_g6_pins[ASPEED_G6_NR_PINS] = { · 11 unmodified lines
1602	ASPEED_PINCTRL_PIN(AC11),	1596	ASPEED_PINCTRL_PIN(AC11),
1603	ASPEED_PINCTRL_PIN(AC12),	1597	ASPEED_PINCTRL_PIN(AC12),
1604	ASPEED_PINCTRL_PIN(AC15),	1598	ASPEED_PINCTRL_PIN(AC15),
		1599	ASPEED_PINCTRL_PIN(AC16),
1605	ASPEED_PINCTRL_PIN(AC17),	1600	ASPEED_PINCTRL_PIN(AC17),
1606	ASPEED_PINCTRL_PIN(AC18),	1601	ASPEED_PINCTRL_PIN(AC18),
1607	ASPEED_PINCTRL_PIN(AC19),	1602	ASPEED_PINCTRL_PIN(AC19),
@@ -1619,6 +1614,7 @@ static struct pinctrl_pin_desc aspeed_g6_pins[ASPEED_G6_NR_PINS] = { · 11 unmodified lines
1619	ASPEED_PINCTRL_PIN(AD12),	1614	ASPEED_PINCTRL_PIN(AD12),
1620	ASPEED_PINCTRL_PIN(AD14),	1615	ASPEED_PINCTRL_PIN(AD14),
1621	ASPEED_PINCTRL_PIN(AD15),	1616	ASPEED_PINCTRL_PIN(AD15),
		1617	ASPEED_PINCTRL_PIN(AD16),
1622	ASPEED_PINCTRL_PIN(AD19),	1618	ASPEED_PINCTRL_PIN(AD19),
1623	ASPEED_PINCTRL_PIN(AD20),	1619	ASPEED_PINCTRL_PIN(AD20),
1624	ASPEED_PINCTRL_PIN(AD22),	1620	ASPEED_PINCTRL_PIN(AD22),
@@ -1634,8 +1630,11 @@ static struct pinctrl_pin_desc aspeed_g6_pins[ASPEED_G6_NR_PINS] = { · 9 unmodified lines
1634	ASPEED_PINCTRL_PIN(AE12),	1630	ASPEED_PINCTRL_PIN(AE12),
1635	ASPEED_PINCTRL_PIN(AE14),	1631	ASPEED_PINCTRL_PIN(AE14),
1636	ASPEED_PINCTRL_PIN(AE15),	1632	ASPEED_PINCTRL_PIN(AE15),
		1633	ASPEED_PINCTRL_PIN(AE16),
1637	ASPEED_PINCTRL_PIN(AE18),	1634	ASPEED_PINCTRL_PIN(AE18),
1638	ASPEED_PINCTRL_PIN(AE19),	1635	ASPEED_PINCTRL_PIN(AE19),
		1636	ASPEED_PINCTRL_PIN(AE25),
		1637	ASPEED_PINCTRL_PIN(AE26),
1639	ASPEED_PINCTRL_PIN(AE7),	1638	ASPEED_PINCTRL_PIN(AE7),
1640	ASPEED_PINCTRL_PIN(AE8),	1639	ASPEED_PINCTRL_PIN(AE8),
1641	ASPEED_PINCTRL_PIN(AF10),	1640	ASPEED_PINCTRL_PIN(AF10),
@@ -1643,6 +1642,8 @@ static struct pinctrl_pin_desc aspeed_g6_pins[ASPEED_G6_NR_PINS] = { · 1 unmodified line
1643	ASPEED_PINCTRL_PIN(AF12),	1642	ASPEED_PINCTRL_PIN(AF12),
1644	ASPEED_PINCTRL_PIN(AF14),	1643	ASPEED_PINCTRL_PIN(AF14),
1645	ASPEED_PINCTRL_PIN(AF15),	1644	ASPEED_PINCTRL_PIN(AF15),
		1645	ASPEED_PINCTRL_PIN(AF24),
		1646	ASPEED_PINCTRL_PIN(AF25),
1646	ASPEED_PINCTRL_PIN(AF7),	1647	ASPEED_PINCTRL_PIN(AF7),
1647	ASPEED_PINCTRL_PIN(AF8),	1648	ASPEED_PINCTRL_PIN(AF8),
1648	ASPEED_PINCTRL_PIN(AF9),	1649	ASPEED_PINCTRL_PIN(AF9),
@@ -1792,17 +1793,6 @@ static struct pinctrl_pin_desc aspeed_g6_pins[ASPEED_G6_NR_PINS] = { · 143 unmodified lines
1792	ASPEED_PINCTRL_PIN(Y3),	1793	ASPEED_PINCTRL_PIN(Y3),
1793	ASPEED_PINCTRL_PIN(Y4),	1794	ASPEED_PINCTRL_PIN(Y4),
1794	ASPEED_PINCTRL_PIN(Y5),	1795	ASPEED_PINCTRL_PIN(Y5),
1795	ASPEED_PINCTRL_PIN(AB16),
1796	ASPEED_PINCTRL_PIN(AA17),
1797	ASPEED_PINCTRL_PIN(AB17),
1798	ASPEED_PINCTRL_PIN(AE16),
1799	ASPEED_PINCTRL_PIN(AC16),
1800	ASPEED_PINCTRL_PIN(AA16),
1801	ASPEED_PINCTRL_PIN(AD16),
1802	ASPEED_PINCTRL_PIN(AF25),
1803	ASPEED_PINCTRL_PIN(AE26),
1804	ASPEED_PINCTRL_PIN(AE25),
1805	ASPEED_PINCTRL_PIN(AF24),
1806	};	1796	};
1807		1797
1808	static const struct aspeed_pin_group aspeed_g6_groups[] = {	1798	static const struct aspeed_pin_group aspeed_g6_groups[] = {
@@ -1976,11 +1966,9 @@ static const struct aspeed_pin_group aspeed_g6_groups[] = { · 167 unmodified lines
1976	ASPEED_PINCTRL_GROUP(SALT9G1),	1966	ASPEED_PINCTRL_GROUP(SALT9G1),
1977	ASPEED_PINCTRL_GROUP(SD1),	1967	ASPEED_PINCTRL_GROUP(SD1),
1978	ASPEED_PINCTRL_GROUP(SD2),	1968	ASPEED_PINCTRL_GROUP(SD2),
1979	ASPEED_PINCTRL_GROUP(SD3),	1969	ASPEED_PINCTRL_GROUP(EMMCG1),
1980	ASPEED_PINCTRL_GROUP(SD3DAT4),	1970	ASPEED_PINCTRL_GROUP(EMMCG4),
1981	ASPEED_PINCTRL_GROUP(SD3DAT5),	1971	ASPEED_PINCTRL_GROUP(EMMCG8),
1982	ASPEED_PINCTRL_GROUP(SD3DAT6),
1983	ASPEED_PINCTRL_GROUP(SD3DAT7),
1984	ASPEED_PINCTRL_GROUP(SGPM1),	1972	ASPEED_PINCTRL_GROUP(SGPM1),
1985	ASPEED_PINCTRL_GROUP(SGPS1),	1973	ASPEED_PINCTRL_GROUP(SGPS1),
1986	ASPEED_PINCTRL_GROUP(SIOONCTRL),	1974	ASPEED_PINCTRL_GROUP(SIOONCTRL),
@@ -2059,6 +2047,7 @@ static const struct aspeed_pin_function aspeed_g6_functions[] = { · 72 unmodified lines
2059	ASPEED_PINCTRL_FUNC(ADC8),	2047	ASPEED_PINCTRL_FUNC(ADC8),
2060	ASPEED_PINCTRL_FUNC(ADC9),	2048	ASPEED_PINCTRL_FUNC(ADC9),
2061	ASPEED_PINCTRL_FUNC(BMCINT),	2049	ASPEED_PINCTRL_FUNC(BMCINT),
		2050	ASPEED_PINCTRL_FUNC(EMMC),
2062	ASPEED_PINCTRL_FUNC(ESPI),	2051	ASPEED_PINCTRL_FUNC(ESPI),
2063	ASPEED_PINCTRL_FUNC(ESPIALT),	2052	ASPEED_PINCTRL_FUNC(ESPIALT),
2064	ASPEED_PINCTRL_FUNC(FSI1),	2053	ASPEED_PINCTRL_FUNC(FSI1),
@@ -2191,11 +2180,6 @@ static const struct aspeed_pin_function aspeed_g6_functions[] = { · 126 unmodified lines
2191	ASPEED_PINCTRL_FUNC(SALT9),	2180	ASPEED_PINCTRL_FUNC(SALT9),
2192	ASPEED_PINCTRL_FUNC(SD1),	2181	ASPEED_PINCTRL_FUNC(SD1),
2193	ASPEED_PINCTRL_FUNC(SD2),	2182	ASPEED_PINCTRL_FUNC(SD2),
2194	ASPEED_PINCTRL_FUNC(SD3),
2195	ASPEED_PINCTRL_FUNC(SD3DAT4),
2196	ASPEED_PINCTRL_FUNC(SD3DAT5),
2197	ASPEED_PINCTRL_FUNC(SD3DAT6),
2198	ASPEED_PINCTRL_FUNC(SD3DAT7),
2199	ASPEED_PINCTRL_FUNC(SGPM1),	2183	ASPEED_PINCTRL_FUNC(SGPM1),
2200	ASPEED_PINCTRL_FUNC(SGPS1),	2184	ASPEED_PINCTRL_FUNC(SGPS1),
2201	ASPEED_PINCTRL_FUNC(SIOONCTRL),	2185	ASPEED_PINCTRL_FUNC(SIOONCTRL),

drivers/pinctrl/aspeed/pinmux-aspeed.h+2−1

  * @idx: The bit index in the register
  */
 #define SIG_DESC_SET(reg, idx) SIG_DESC_IP_BIT(ASPEED_IP_SCU, reg, idx, 1)
-#define SIG_DESC_CLEAR(reg, idx) SIG_DESC_IP_BIT(ASPEED_IP_SCU, reg, idx, 0)
+#define SIG_DESC_CLEAR(reg, idx) { ASPEED_IP_SCU, reg, BIT_MASK(idx), 0, 0 }
 #define SIG_DESC_LIST_SYM(sig, group) sig_descs_ ## sig ## _ ## group
 #define SIG_DESC_LIST_DECL(sig, group, ...) \
 	static const char *FUNC_SYM(func)[] = { __VA_ARGS__ }
 #define FUNC_DECL_2(func, one, two) FUNC_DECL_(func, #one, #two)
+#define FUNC_DECL_3(func, one, two, three) FUNC_DECL_(func, #one, #two, #three)
 #define FUNC_GROUP_DECL(func, ...) \
 	GROUP_DECL(func, __VA_ARGS__); \

drivers/pinctrl/bcm/pinctrl-iproc-gpio.c+2−10

+// SPDX-License-Identifier: GPL-2.0-only
 /*
  * Copyright (C) 2014-2017 Broadcom
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
  */
 /*
 	/* optional GPIO interrupt support */
 	irq = platform_get_irq(pdev, 0);
-	if (irq) {
+	if (irq > 0) {
 		struct irq_chip *irqc;
 		struct gpio_irq_chip *girq;

drivers/pinctrl/bcm/pinctrl-ns2-mux.c+2−2

@@ -640,8 +640,8 @@ static int ns2_pinmux_enable(struct pinctrl_dev *pctrl_dev, · 639 unmodified lines
640	const struct ns2_pin_function *func;	640	const struct ns2_pin_function *func;
641	const struct ns2_pin_group *grp;	641	const struct ns2_pin_group *grp;
642		642
643	if (grp_select > pinctrl->num_groups \|\|	643	if (grp_select >= pinctrl->num_groups \|\|
644	func_select > pinctrl->num_functions)	644	func_select >= pinctrl->num_functions)
645	return -EINVAL;	645	return -EINVAL;
646		646
647	func = &pinctrl->functions[func_select];	647	func = &pinctrl->functions[func_select];

drivers/pinctrl/berlin/pinctrl-as370.c+1−1

@@ -43,7 +43,7 @@ static const struct berlin_desc_group as370_soc_pinctrl_groups[] = { · 42 unmodified lines
43	BERLIN_PINCTRL_FUNCTION(0x0, "gpio"), /* GPIO5 */	43	BERLIN_PINCTRL_FUNCTION(0x0, "gpio"), /* GPIO5 */
44	BERLIN_PINCTRL_FUNCTION(0x1, "i2s1"), /* DO3 */	44	BERLIN_PINCTRL_FUNCTION(0x1, "i2s1"), /* DO3 */
45	BERLIN_PINCTRL_FUNCTION(0x2, "pwm"), /* PWM5 */	45	BERLIN_PINCTRL_FUNCTION(0x2, "pwm"), /* PWM5 */
46	BERLIN_PINCTRL_FUNCTION(0x3, "spififib"), /* SPDIFIB */	46	BERLIN_PINCTRL_FUNCTION(0x3, "spdifib"), /* SPDIFIB */
47	BERLIN_PINCTRL_FUNCTION(0x4, "spdifo"), /* SPDIFO */	47	BERLIN_PINCTRL_FUNCTION(0x4, "spdifo"), /* SPDIFO */
48	BERLIN_PINCTRL_FUNCTION(0x5, "phy")), /* DBG5 */	48	BERLIN_PINCTRL_FUNCTION(0x5, "phy")), /* DBG5 */
49	BERLIN_PINCTRL_GROUP("I2S1_MCLK", 0x0, 0x3, 0x12,	49	BERLIN_PINCTRL_GROUP("I2S1_MCLK", 0x0, 0x3, 0x12,

drivers/pinctrl/intel/pinctrl-cherryview.c+0−4

 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
 			DMI_MATCH(DMI_PRODUCT_FAMILY, "Intel_Strago"),
-			DMI_MATCH(DMI_PRODUCT_VERSION, "1.0"),
 		},
 	},
 	{
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "HP"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "Setzer"),
-			DMI_MATCH(DMI_PRODUCT_VERSION, "1.0"),
 		},
 	},
 	{
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "Cyan"),
-			DMI_MATCH(DMI_PRODUCT_VERSION, "1.0"),
 		},
 	},
 	{
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
 			DMI_MATCH(DMI_PRODUCT_NAME, "Celes"),
-			DMI_MATCH(DMI_PRODUCT_VERSION, "1.0"),
 		},
 	},
 	{}

drivers/pinctrl/intel/pinctrl-intel.c+14−13

  * @pctldesc: Pin controller description
  * @pctldev: Pointer to the pin controller device
  * @chip: GPIO chip in this pin controller
+ * @irqchip: IRQ chip in this pin controller
  * @soc: SoC/PCH specific pin configuration data
  * @communities: All communities in this pin controller
  * @ncommunities: Number of communities in this pin controller
 	struct pinctrl_desc pctldesc;
 	struct pinctrl_dev *pctldev;
 	struct gpio_chip chip;
+	struct irq_chip irqchip;
 	const struct intel_pinctrl_soc_data *soc;
 	struct intel_community *communities;
 	size_t ncommunities;
 	return ret;
 }
-static struct irq_chip intel_gpio_irqchip = {
-	.name = "intel-gpio",
-	.irq_ack = intel_gpio_irq_ack,
-	.irq_mask = intel_gpio_irq_mask,
-	.irq_unmask = intel_gpio_irq_unmask,
-	.irq_set_type = intel_gpio_irq_type,
-	.irq_set_wake = intel_gpio_irq_wake,
-	.flags = IRQCHIP_MASK_ON_SUSPEND,
-};
 static int intel_gpio_add_pin_ranges(struct intel_pinctrl *pctrl,
 				     const struct intel_community *community)
 {
 	pctrl->chip = intel_gpio_chip;
+	/* Setup GPIO chip */
 	pctrl->chip.ngpio = intel_gpio_ngpio(pctrl);
 	pctrl->chip.label = dev_name(pctrl->dev);
 	pctrl->chip.parent = pctrl->dev;
 	pctrl->chip.base = -1;
 	pctrl->irq = irq;
+	/* Setup IRQ chip */
+	pctrl->irqchip.name = dev_name(pctrl->dev);
+	pctrl->irqchip.irq_ack = intel_gpio_irq_ack;
+	pctrl->irqchip.irq_mask = intel_gpio_irq_mask;
+	pctrl->irqchip.irq_unmask = intel_gpio_irq_unmask;
+	pctrl->irqchip.irq_set_type = intel_gpio_irq_type;
+	pctrl->irqchip.irq_set_wake = intel_gpio_irq_wake;
+	pctrl->irqchip.flags = IRQCHIP_MASK_ON_SUSPEND;
 	ret = devm_gpiochip_add_data(pctrl->dev, &pctrl->chip, pctrl);
 	if (ret) {
 		dev_err(pctrl->dev, "failed to register gpiochip\n");
 		return ret;
 	}
-	ret = gpiochip_irqchip_add(&pctrl->chip, &intel_gpio_irqchip, 0,
+	ret = gpiochip_irqchip_add(&pctrl->chip, &pctrl->irqchip, 0,
 				   handle_bad_irq, IRQ_TYPE_NONE);
 	if (ret) {
 		dev_err(pctrl->dev, "failed to add irqchip\n");
 		return ret;
 	}
-	gpiochip_set_chained_irqchip(&pctrl->chip, &intel_gpio_irqchip, irq,
+	gpiochip_set_chained_irqchip(&pctrl->chip, &pctrl->irqchip, irq, NULL);
-				     NULL);
 	return 0;
 }

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c+13−13

@@ -183,10 +183,10 @@ static struct armada_37xx_pin_group armada_37xx_nb_groups[] = { · 182 unmodified lines
183	PIN_GRP_EXTRA("uart2", 9, 2, BIT(1) \| BIT(13) \| BIT(14) \| BIT(19),	183	PIN_GRP_EXTRA("uart2", 9, 2, BIT(1) \| BIT(13) \| BIT(14) \| BIT(19),
184	BIT(1) \| BIT(13) \| BIT(14), BIT(1) \| BIT(19),	184	BIT(1) \| BIT(13) \| BIT(14), BIT(1) \| BIT(19),
185	18, 2, "gpio", "uart"),	185	18, 2, "gpio", "uart"),
186	PIN_GRP_GPIO("led0_od", 11, 1, BIT(20), "led"),	186	PIN_GRP_GPIO_2("led0_od", 11, 1, BIT(20), BIT(20), 0, "led"),
187	PIN_GRP_GPIO("led1_od", 12, 1, BIT(21), "led"),	187	PIN_GRP_GPIO_2("led1_od", 12, 1, BIT(21), BIT(21), 0, "led"),
188	PIN_GRP_GPIO("led2_od", 13, 1, BIT(22), "led"),	188	PIN_GRP_GPIO_2("led2_od", 13, 1, BIT(22), BIT(22), 0, "led"),
189	PIN_GRP_GPIO("led3_od", 14, 1, BIT(23), "led"),	189	PIN_GRP_GPIO_2("led3_od", 14, 1, BIT(23), BIT(23), 0, "led"),
190		190
191	};	191	};
192		192
@@ -221,11 +221,11 @@ static const struct armada_37xx_pin_data armada_37xx_pin_sb = { · 28 unmodified lines
221	};	221	};
222		222
223	static inline void armada_37xx_update_reg(unsigned int *reg,	223	static inline void armada_37xx_update_reg(unsigned int *reg,
224	unsigned int offset)	224	unsigned int *offset)
225	{	225	{
226	/* We never have more than 2 registers */	226	/* We never have more than 2 registers */
227	if (offset >= GPIO_PER_REG) {	227	if (*offset >= GPIO_PER_REG) {
228	offset -= GPIO_PER_REG;	228	*offset -= GPIO_PER_REG;
229	*reg += sizeof(u32);	229	*reg += sizeof(u32);
230	}	230	}
231	}	231	}
@@ -376,7 +376,7 @@ static inline void armada_37xx_irq_update_reg(unsigned int *reg, · 144 unmodified lines
376	{	376	{
377	int offset = irqd_to_hwirq(d);	377	int offset = irqd_to_hwirq(d);
378		378
379	armada_37xx_update_reg(reg, offset);	379	armada_37xx_update_reg(reg, &offset);
380	}	380	}
381		381
382	static int armada_37xx_gpio_direction_input(struct gpio_chip *chip,	382	static int armada_37xx_gpio_direction_input(struct gpio_chip *chip,
@@ -386,7 +386,7 @@ static int armada_37xx_gpio_direction_input(struct gpio_chip *chip, · 3 unmodified lines
386	unsigned int reg = OUTPUT_EN;	386	unsigned int reg = OUTPUT_EN;
387	unsigned int mask;	387	unsigned int mask;
388		388
389	armada_37xx_update_reg(&reg, offset);	389	armada_37xx_update_reg(&reg, &offset);
390	mask = BIT(offset);	390	mask = BIT(offset);
391		391
392	return regmap_update_bits(info->regmap, reg, mask, 0);	392	return regmap_update_bits(info->regmap, reg, mask, 0);
@@ -399,7 +399,7 @@ static int armada_37xx_gpio_get_direction(struct gpio_chip *chip, · 6 unmodified lines
399	unsigned int reg = OUTPUT_EN;	399	unsigned int reg = OUTPUT_EN;
400	unsigned int val, mask;	400	unsigned int val, mask;
401		401
402	armada_37xx_update_reg(&reg, offset);	402	armada_37xx_update_reg(&reg, &offset);
403	mask = BIT(offset);	403	mask = BIT(offset);
404	regmap_read(info->regmap, reg, &val);	404	regmap_read(info->regmap, reg, &val);
405		405
@@ -413,7 +413,7 @@ static int armada_37xx_gpio_direction_output(struct gpio_chip *chip, · 7 unmodified lines
413	unsigned int reg = OUTPUT_EN;	413	unsigned int reg = OUTPUT_EN;
414	unsigned int mask, val, ret;	414	unsigned int mask, val, ret;
415		415
416	armada_37xx_update_reg(&reg, offset);	416	armada_37xx_update_reg(&reg, &offset);
417	mask = BIT(offset);	417	mask = BIT(offset);
418		418
419	ret = regmap_update_bits(info->regmap, reg, mask, mask);	419	ret = regmap_update_bits(info->regmap, reg, mask, mask);
@@ -434,7 +434,7 @@ static int armada_37xx_gpio_get(struct gpio_chip *chip, unsigned int offset) · 14 unmodified lines
434	unsigned int reg = INPUT_VAL;	434	unsigned int reg = INPUT_VAL;
435	unsigned int val, mask;	435	unsigned int val, mask;
436		436
437	armada_37xx_update_reg(&reg, offset);	437	armada_37xx_update_reg(&reg, &offset);
438	mask = BIT(offset);	438	mask = BIT(offset);
439		439
440	regmap_read(info->regmap, reg, &val);	440	regmap_read(info->regmap, reg, &val);
@@ -449,7 +449,7 @@ static void armada_37xx_gpio_set(struct gpio_chip *chip, unsigned int offset, · 8 unmodified lines
449	unsigned int reg = OUTPUT_VAL;	449	unsigned int reg = OUTPUT_VAL;
450	unsigned int mask, val;	450	unsigned int mask, val;
451		451
452	armada_37xx_update_reg(&reg, offset);	452	armada_37xx_update_reg(&reg, &offset);
453	mask = BIT(offset);	453	mask = BIT(offset);
454	val = value ? mask : 0;	454	val = value ? mask : 0;
455		455

drivers/pinctrl/pinctrl-stmfx.c+1−1

@@ -705,7 +705,7 @@ static int stmfx_pinctrl_probe(struct platform_device *pdev) · 704 unmodified lines
705		705
706	static int stmfx_pinctrl_remove(struct platform_device *pdev)	706	static int stmfx_pinctrl_remove(struct platform_device *pdev)
707	{	707	{
708	struct stmfx *stmfx = dev_get_platdata(&pdev->dev);	708	struct stmfx *stmfx = dev_get_drvdata(pdev->dev.parent);
709		709
710	return stmfx_function_disable(stmfx,	710	return stmfx_function_disable(stmfx,
711	STMFX_FUNC_GPIO \|	711	STMFX_FUNC_GPIO \|

drivers/platform/x86/classmate-laptop.c+0−12

 static int cmpc_accel_remove_v4(struct acpi_device *acpi)
 {
-	struct input_dev *inputdev;
-	struct cmpc_accel *accel;
-	inputdev = dev_get_drvdata(&acpi->dev);
-	accel = dev_get_drvdata(&inputdev->dev);
 	device_remove_file(&acpi->dev, &cmpc_accel_sensitivity_attr_v4);
 	device_remove_file(&acpi->dev, &cmpc_accel_g_select_attr_v4);
 	return cmpc_remove_acpi_notify_device(acpi);
 static int cmpc_accel_remove(struct acpi_device *acpi)
 {
-	struct input_dev *inputdev;
-	struct cmpc_accel *accel;
-	inputdev = dev_get_drvdata(&acpi->dev);
-	accel = dev_get_drvdata(&inputdev->dev);
 	device_remove_file(&acpi->dev, &cmpc_accel_sensitivity_attr);
 	return cmpc_remove_acpi_notify_device(acpi);
 }

drivers/platform/x86/i2c-multi-instantiate.c+1−0

@@ -108,6 +108,7 @@ static int i2c_multi_inst_probe(struct platform_device *pdev) · 107 unmodified lines
108	if (ret < 0) {	108	if (ret < 0) {
109	dev_dbg(dev, "Error requesting irq at index %d: %d\n",	109	dev_dbg(dev, "Error requesting irq at index %d: %d\n",
110	inst_data[i].irq_idx, ret);	110	inst_data[i].irq_idx, ret);
		111	goto error;
111	}	112	}
112	board_info.irq = ret;	113	board_info.irq = ret;
113	break;	114	break;

drivers/platform/x86/intel_punit_ipc.c+1−2

@@ -293,9 +293,8 @@ static int intel_punit_ipc_probe(struct platform_device *pdev) · 292 unmodified lines
293		293
294	platform_set_drvdata(pdev, punit_ipcdev);	294	platform_set_drvdata(pdev, punit_ipcdev);
295		295
296	irq = platform_get_irq(pdev, 0);	296	irq = platform_get_irq_optional(pdev, 0);
297	if (irq < 0) {	297	if (irq < 0) {
298	punit_ipcdev->irq = 0;
299	dev_warn(&pdev->dev, "Invalid IRQ, using polling mode\n");	298	dev_warn(&pdev->dev, "Invalid IRQ, using polling mode\n");
300	} else {	299	} else {
301	ret = devm_request_irq(&pdev->dev, irq, intel_punit_ioc,	300	ret = devm_request_irq(&pdev->dev, irq, intel_punit_ioc,

drivers/ptp/Kconfig+2−2

@@ -97,8 +97,8 @@ config PTP_1588_CLOCK_PCH · 96 unmodified lines
97	help	97	help
98	This driver adds support for using the PCH EG20T as a PTP	98	This driver adds support for using the PCH EG20T as a PTP
99	clock. The hardware supports time stamping of PTP packets	99	clock. The hardware supports time stamping of PTP packets
100	when using the end-to-end delay (E2E) mechansim. The peer	100	when using the end-to-end delay (E2E) mechanism. The peer
101	delay mechansim (P2P) is not supported.	101	delay mechanism (P2P) is not supported.
102		102
103	This clock is only useful if your PTP programs are getting	103	This clock is only useful if your PTP programs are getting
104	hardware time stamps on the PTP Ethernet packets using the	104	hardware time stamps on the PTP Ethernet packets using the

drivers/regulator/core.c+13−0

@@ -5053,6 +5053,19 @@ regulator_register(const struct regulator_desc *regulator_desc, · 5052 unmodified lines
5053		5053
5054	init_data = regulator_of_get_init_data(dev, regulator_desc, config,	5054	init_data = regulator_of_get_init_data(dev, regulator_desc, config,
5055	&rdev->dev.of_node);	5055	&rdev->dev.of_node);
		5056
		5057	/*
		5058	* Sometimes not all resources are probed already so we need to take
		5059	* that into account. This happens most the time if the ena_gpiod comes
		5060	* from a gpio extender or something else.
		5061	*/
		5062	if (PTR_ERR(init_data) == -EPROBE_DEFER) {
		5063	kfree(config);
		5064	kfree(rdev);
		5065	ret = -EPROBE_DEFER;
		5066	goto rinse;
		5067	}
		5068
5056	/*	5069	/*
5057	* We need to keep track of any GPIO descriptor coming from the	5070	* We need to keep track of any GPIO descriptor coming from the
5058	* device tree until we have handled it over to the core. If the	5071	* device tree until we have handled it over to the core. If the

drivers/regulator/da9062-regulator.c+47−71

 static unsigned da9062_buck_get_mode(struct regulator_dev *rdev)
 {
 	struct da9062_regulator *regl = rdev_get_drvdata(rdev);
-	struct regmap_field *field;
 	unsigned int val, mode = 0;
 	int ret;
 		return REGULATOR_MODE_NORMAL;
 	}
-	/* Detect current regulator state */
+	ret = regmap_field_read(regl->sleep, &val);
-	ret = regmap_field_read(regl->suspend, &val);
-	if (ret < 0)
-		return 0;
-	/* Read regulator mode from proper register, depending on state */
-	if (val)
-		field = regl->suspend_sleep;
-	else
-		field = regl->sleep;
-	ret = regmap_field_read(field, &val);
 	if (ret < 0)
 		return 0;
 static unsigned da9062_ldo_get_mode(struct regulator_dev *rdev)
 {
 	struct da9062_regulator *regl = rdev_get_drvdata(rdev);
-	struct regmap_field *field;
 	int ret, val;
-	/* Detect current regulator state */
+	ret = regmap_field_read(regl->sleep, &val);
-	ret = regmap_field_read(regl->suspend, &val);
-	if (ret < 0)
-		return 0;
-	/* Read regulator mode from proper register, depending on state */
-	if (val)
-		field = regl->suspend_sleep;
-	else
-		field = regl->sleep;
-	ret = regmap_field_read(field, &val);
 	if (ret < 0)
 		return 0;
 			__builtin_ffs((int)DA9062AA_BUCK1_MODE_MASK) - 1,
 			sizeof(unsigned int) * 8 -
 			__builtin_clz((DA9062AA_BUCK1_MODE_MASK)) - 1),
-		.suspend = REG_FIELD(DA9062AA_DVC_1,
+		.suspend = REG_FIELD(DA9062AA_BUCK1_CONT,
-			__builtin_ffs((int)DA9062AA_VBUCK1_SEL_MASK) - 1,
+			__builtin_ffs((int)DA9062AA_BUCK1_CONF_MASK) - 1,
 			sizeof(unsigned int) * 8 -
-			__builtin_clz((DA9062AA_VBUCK1_SEL_MASK)) - 1),
+			__builtin_clz(DA9062AA_BUCK1_CONF_MASK) - 1),
 	},
 	{
 		.desc.id = DA9061_ID_BUCK2,
 			__builtin_ffs((int)DA9062AA_BUCK3_MODE_MASK) - 1,
 			sizeof(unsigned int) * 8 -
 			__builtin_clz((DA9062AA_BUCK3_MODE_MASK)) - 1),
-		.suspend = REG_FIELD(DA9062AA_DVC_1,
+		.suspend = REG_FIELD(DA9062AA_BUCK3_CONT,
-			__builtin_ffs((int)DA9062AA_VBUCK3_SEL_MASK) - 1,
+			__builtin_ffs((int)DA9062AA_BUCK3_CONF_MASK) - 1,
 			sizeof(unsigned int) * 8 -
-			__builtin_clz((DA9062AA_VBUCK3_SEL_MASK)) - 1),
+			__builtin_clz(DA9062AA_BUCK3_CONF_MASK) - 1),
 	},
 	{
 		.desc.id = DA9061_ID_BUCK3,
 			__builtin_ffs((int)DA9062AA_BUCK4_MODE_MASK) - 1,
 			sizeof(unsigned int) * 8 -
 			__builtin_clz((DA9062AA_BUCK4_MODE_MASK)) - 1),
-		.suspend = REG_FIELD(DA9062AA_DVC_1,
+		.suspend = REG_FIELD(DA9062AA_BUCK4_CONT,
-			__builtin_ffs((int)DA9062AA_VBUCK4_SEL_MASK) - 1,
+			__builtin_ffs((int)DA9062AA_BUCK4_CONF_MASK) - 1,
 			sizeof(unsigned int) * 8 -
-			__builtin_clz((DA9062AA_VBUCK4_SEL_MASK)) - 1),
+			__builtin_clz(DA9062AA_BUCK4_CONF_MASK) - 1),
 	},
 	{
 		.desc.id = DA9061_ID_LDO1,
 			sizeof(unsigned int) * 8 -
 			__builtin_clz((DA9062AA_LDO1_SL_B_MASK)) - 1),
 		.suspend_vsel_reg = DA9062AA_VLDO1_B,
-		.suspend = REG_FIELD(DA9062AA_DVC_1,
+		.suspend = REG_FIELD(DA9062AA_LDO1_CONT,
-			__builtin_ffs((int)DA9062AA_VLDO1_SEL_MASK) - 1,
+			__builtin_ffs((int)DA9062AA_LDO1_CONF_MASK) - 1,
 			sizeof(unsigned int) * 8 -
-			__builtin_clz((DA9062AA_VLDO1_SEL_MASK)) - 1),
+			__builtin_clz(DA9062AA_LDO1_CONF_MASK) - 1),
 		.oc_event = REG_FIELD(DA9062AA_STATUS_D,
 			__builtin_ffs((int)DA9062AA_LDO1_ILIM_MASK) - 1,
 			sizeof(unsigned int) * 8 -
 			sizeof(unsigned int) * 8 -
 			__builtin_clz((DA9062AA_LDO2_SL_B_MASK)) - 1),
 		.suspend_vsel_reg = DA9062AA_VLDO2_B,
-		.suspend = REG_FIELD(DA9062AA_DVC_1,
+		.suspend = REG_FIELD(DA9062AA_LDO2_CONT,
-			__builtin_ffs((int)DA9062AA_VLDO2_SEL_MASK) - 1,
+			__builtin_ffs((int)DA9062AA_LDO2_CONF_MASK) - 1,
 			sizeof(unsigned int) * 8 -
-			__builtin_clz((DA9062AA_VLDO2_SEL_MASK)) - 1),
+			__builtin_clz(DA9062AA_LDO2_CONF_MASK) - 1),
 		.oc_event = REG_FIELD(DA9062AA_STATUS_D,
 			__builtin_ffs((int)DA9062AA_LDO2_ILIM_MASK) - 1,
 			sizeof(unsigned int) * 8 -
 			sizeof(unsigned int) * 8 -
 			__builtin_clz((DA9062AA_LDO3_SL_B_MASK)) - 1),
 		.suspend_vsel_reg = DA9062AA_VLDO3_B,
-		.suspend = REG_FIELD(DA9062AA_DVC_1,
+		.suspend = REG_FIELD(DA9062AA_LDO3_CONT,
-			__builtin_ffs((int)DA9062AA_VLDO3_SEL_MASK) - 1,
+			__builtin_ffs((int)DA9062AA_LDO3_CONF_MASK) - 1,
 			sizeof(unsigned int) * 8 -
-			__builtin_clz((DA9062AA_VLDO3_SEL_MASK)) - 1),
+			__builtin_clz(DA9062AA_LDO3_CONF_MASK) - 1),
 		.oc_event = REG_FIELD(DA9062AA_STATUS_D,
 			__builtin_ffs((int)DA9062AA_LDO3_ILIM_MASK) - 1,
 			sizeof(unsigned int) * 8 -
 			sizeof(unsigned int) * 8 -
 			__builtin_clz((DA9062AA_LDO4_SL_B_MASK)) - 1),
 		.suspend_vsel_reg = DA9062AA_VLDO4_B,
-		.suspend = REG_FIELD(DA9062AA_DVC_1,
+		.suspend = REG_FIELD(DA9062AA_LDO4_CONT,
-			__builtin_ffs((int)DA9062AA_VLDO4_SEL_MASK) - 1,
+			__builtin_ffs((int)DA9062AA_LDO4_CONF_MASK) - 1,
 			sizeof(unsigned int) * 8 -
-			__builtin_clz((DA9062AA_VLDO4_SEL_MASK)) - 1),
+			__builtin_clz(DA9062AA_LDO4_CONF_MASK) - 1),
 		.oc_event = REG_FIELD(DA9062AA_STATUS_D,
 			__builtin_ffs((int)DA9062AA_LDO4_ILIM_MASK) - 1,
 			sizeof(unsigned int) * 8 -
 			__builtin_ffs((int)DA9062AA_BUCK1_MODE_MASK) - 1,
 			sizeof(unsigned int) * 8 -
 			__builtin_clz((DA9062AA_BUCK1_MODE_MASK)) - 1),
-		.suspend = REG_FIELD(DA9062AA_DVC_1,
+		.suspend = REG_FIELD(DA9062AA_BUCK1_CONT,
-			__builtin_ffs((int)DA9062AA_VBUCK1_SEL_MASK) - 1,
+			__builtin_ffs((int)DA9062AA_BUCK1_CONF_MASK) - 1,
 			sizeof(unsigned int) * 8 -
-			__builtin_clz((DA9062AA_VBUCK1_SEL_MASK)) - 1),
+			__builtin_clz(DA9062AA_BUCK1_CONF_MASK) - 1),
 	},
 	{
 		.desc.id = DA9062_ID_BUCK2,
 			__builtin_ffs((int)DA9062AA_BUCK2_MODE_MASK) - 1,
 			sizeof(unsigned int) * 8 -
 			__builtin_clz((DA9062AA_BUCK2_MODE_MASK)) - 1),
-		.suspend = REG_FIELD(DA9062AA_DVC_1,
+		.suspend = REG_FIELD(DA9062AA_BUCK2_CONT,
-			__builtin_ffs((int)DA9062AA_VBUCK2_SEL_MASK) - 1,
+			__builtin_ffs((int)DA9062AA_BUCK2_CONF_MASK) - 1,
 			sizeof(unsigned int) * 8 -
-			__builtin_clz((DA9062AA_VBUCK2_SEL_MASK)) - 1),
+			__builtin_clz(DA9062AA_BUCK2_CONF_MASK) - 1),
 	},
 	{
 		.desc.id = DA9062_ID_BUCK3,
 			__builtin_ffs((int)DA9062AA_BUCK3_MODE_MASK) - 1,
 			sizeof(unsigned int) * 8 -
 			__builtin_clz((DA9062AA_BUCK3_MODE_MASK)) - 1),
-		.suspend = REG_FIELD(DA9062AA_DVC_1,
+		.suspend = REG_FIELD(DA9062AA_BUCK3_CONT,
-			__builtin_ffs((int)DA9062AA_VBUCK3_SEL_MASK) - 1,
+			__builtin_ffs((int)DA9062AA_BUCK3_CONF_MASK) - 1,
 			sizeof(unsigned int) * 8 -
-			__builtin_clz((DA9062AA_VBUCK3_SEL_MASK)) - 1),
+			__builtin_clz(DA9062AA_BUCK3_CONF_MASK) - 1),
 	},
 	{
 		.desc.id = DA9062_ID_BUCK4,
 			__builtin_ffs((int)DA9062AA_BUCK4_MODE_MASK) - 1,
 			sizeof(unsigned int) * 8 -
 			__builtin_clz((DA9062AA_BUCK4_MODE_MASK)) - 1),
-		.suspend = REG_FIELD(DA9062AA_DVC_1,
+		.suspend = REG_FIELD(DA9062AA_BUCK4_CONT,
-			__builtin_ffs((int)DA9062AA_VBUCK4_SEL_MASK) - 1,
+			__builtin_ffs((int)DA9062AA_BUCK4_CONF_MASK) - 1,
 			sizeof(unsigned int) * 8 -
-			__builtin_clz((DA9062AA_VBUCK4_SEL_MASK)) - 1),
+			__builtin_clz(DA9062AA_BUCK4_CONF_MASK) - 1),
 	},
 	{
 		.desc.id = DA9062_ID_LDO1,
 			sizeof(unsigned int) * 8 -
 			__builtin_clz((DA9062AA_LDO1_SL_B_MASK)) - 1),
 		.suspend_vsel_reg = DA9062AA_VLDO1_B,
-		.suspend = REG_FIELD(DA9062AA_DVC_1,
+		.suspend = REG_FIELD(DA9062AA_LDO1_CONT,
-			__builtin_ffs((int)DA9062AA_VLDO1_SEL_MASK) - 1,
+			__builtin_ffs((int)DA9062AA_LDO1_CONF_MASK) - 1,
 			sizeof(unsigned int) * 8 -
-			__builtin_clz((DA9062AA_VLDO1_SEL_MASK)) - 1),
+			__builtin_clz(DA9062AA_LDO1_CONF_MASK) - 1),
 		.oc_event = REG_FIELD(DA9062AA_STATUS_D,
 			__builtin_ffs((int)DA9062AA_LDO1_ILIM_MASK) - 1,
 			sizeof(unsigned int) * 8 -
 			sizeof(unsigned int) * 8 -
 			__builtin_clz((DA9062AA_LDO2_SL_B_MASK)) - 1),
 		.suspend_vsel_reg = DA9062AA_VLDO2_B,
-		.suspend = REG_FIELD(DA9062AA_DVC_1,
+		.suspend = REG_FIELD(DA9062AA_LDO2_CONT,
-			__builtin_ffs((int)DA9062AA_VLDO2_SEL_MASK) - 1,
+			__builtin_ffs((int)DA9062AA_LDO2_CONF_MASK) - 1,
 			sizeof(unsigned int) * 8 -
-			__builtin_clz((DA9062AA_VLDO2_SEL_MASK)) - 1),
+			__builtin_clz(DA9062AA_LDO2_CONF_MASK) - 1),
 		.oc_event = REG_FIELD(DA9062AA_STATUS_D,
 			__builtin_ffs((int)DA9062AA_LDO2_ILIM_MASK) - 1,
 			sizeof(unsigned int) * 8 -
 			sizeof(unsigned int) * 8 -
 			__builtin_clz((DA9062AA_LDO3_SL_B_MASK)) - 1),
 		.suspend_vsel_reg = DA9062AA_VLDO3_B,
-		.suspend = REG_FIELD(DA9062AA_DVC_1,
+		.suspend = REG_FIELD(DA9062AA_LDO3_CONT,
-			__builtin_ffs((int)DA9062AA_VLDO3_SEL_MASK) - 1,
+			__builtin_ffs((int)DA9062AA_LDO3_CONF_MASK) - 1,
 			sizeof(unsigned int) * 8 -
-			__builtin_clz((DA9062AA_VLDO3_SEL_MASK)) - 1),
+			__builtin_clz(DA9062AA_LDO3_CONF_MASK) - 1),
 		.oc_event = REG_FIELD(DA9062AA_STATUS_D,
 			__builtin_ffs((int)DA9062AA_LDO3_ILIM_MASK) - 1,
 			sizeof(unsigned int) * 8 -
 			sizeof(unsigned int) * 8 -
 			__builtin_clz((DA9062AA_LDO4_SL_B_MASK)) - 1),
 		.suspend_vsel_reg = DA9062AA_VLDO4_B,
-		.suspend = REG_FIELD(DA9062AA_DVC_1,
+		.suspend = REG_FIELD(DA9062AA_LDO4_CONT,
-			__builtin_ffs((int)DA9062AA_VLDO4_SEL_MASK) - 1,
+			__builtin_ffs((int)DA9062AA_LDO4_CONF_MASK) - 1,
 			sizeof(unsigned int) * 8 -
-			__builtin_clz((DA9062AA_VLDO4_SEL_MASK)) - 1),
+			__builtin_clz(DA9062AA_LDO4_CONF_MASK) - 1),
 		.oc_event = REG_FIELD(DA9062AA_STATUS_D,
 			__builtin_ffs((int)DA9062AA_LDO4_ILIM_MASK) - 1,
 			sizeof(unsigned int) * 8 -

drivers/regulator/fixed.c+2−3

 	struct device *dev = &pdev->dev;
 	struct fixed_voltage_config *config;
 	struct fixed_voltage_data *drvdata;
-	const struct fixed_dev_type *drvtype =
+	const struct fixed_dev_type *drvtype = of_device_get_match_data(dev);
-		of_match_device(dev->driver->of_match_table, dev)->data;
 	struct regulator_config cfg = { };
 	enum gpiod_flags gflags;
 	int ret;
 	drvdata->desc.type = REGULATOR_VOLTAGE;
 	drvdata->desc.owner = THIS_MODULE;
-	if (drvtype->has_enable_clock) {
+	if (drvtype && drvtype->has_enable_clock) {
 		drvdata->desc.ops = &fixed_voltage_clkenabled_ops;
 		drvdata->enable_clock = devm_clk_get(dev, NULL);

drivers/regulator/lochnagar-regulator.c+1−0

@@ -210,6 +210,7 @@ static const struct regulator_desc lochnagar_regulators[] = { · 209 unmodified lines
210		210
211	.enable_time = 3000,	211	.enable_time = 3000,
212	.ramp_delay = 1000,	212	.ramp_delay = 1000,
		213	.off_on_delay = 15000,
213		214
214	.owner = THIS_MODULE,	215	.owner = THIS_MODULE,
215	},	216	},

drivers/regulator/of_regulator.c+18−9

@@ -231,12 +231,12 @@ static int of_get_regulation_constraints(struct device *dev, · 230 unmodified lines
231	"regulator-off-in-suspend"))	231	"regulator-off-in-suspend"))
232	suspend_state->enabled = DISABLE_IN_SUSPEND;	232	suspend_state->enabled = DISABLE_IN_SUSPEND;
233		233
234	if (!of_property_read_u32(np, "regulator-suspend-min-microvolt",	234	if (!of_property_read_u32(suspend_np,
235	&pval))	235	"regulator-suspend-min-microvolt", &pval))
236	suspend_state->min_uV = pval;	236	suspend_state->min_uV = pval;
237		237
238	if (!of_property_read_u32(np, "regulator-suspend-max-microvolt",	238	if (!of_property_read_u32(suspend_np,
239	&pval))	239	"regulator-suspend-max-microvolt", &pval))
240	suspend_state->max_uV = pval;	240	suspend_state->max_uV = pval;
241		241
242	if (!of_property_read_u32(suspend_np,	242	if (!of_property_read_u32(suspend_np,
@@ -445,11 +445,20 @@ struct regulator_init_data regulator_of_get_init_data(struct device dev, · 202 unmodified lines
445	goto error;	445	goto error;
446	}	446	}
447		447
448	if (desc->of_parse_cb && desc->of_parse_cb(child, desc, config)) {	448	if (desc->of_parse_cb) {
449	dev_err(dev,	449	int ret;
450	"driver callback failed to parse DT for regulator %pOFn\n",	450
451	child);	451	ret = desc->of_parse_cb(child, desc, config);
452	goto error;	452	if (ret) {
		453	if (ret == -EPROBE_DEFER) {
		454	of_node_put(child);
		455	return ERR_PTR(-EPROBE_DEFER);
		456	}
		457	dev_err(dev,
		458	"driver callback failed to parse DT for regulator %pOFn\n",
		459	child);
		460	goto error;
		461	}
453	}	462	}
454		463
455	*node = child;	464	*node = child;

drivers/regulator/pfuze100-regulator.c+7−1

 		/* SW2~SW4 high bit check and modify the voltage value table */
 		if (i >= sw_check_start && i <= sw_check_end) {
-			regmap_read(pfuze_chip->regmap, desc->vsel_reg, &val);
+			ret = regmap_read(pfuze_chip->regmap,
+						desc->vsel_reg, &val);
+			if (ret) {
+				dev_err(&client->dev, "Fails to read from the register.\n");
+				return ret;
+			}
 			if (val & sw_hi) {
 				if (pfuze_chip->chip_id == PFUZE3000 ||
 					pfuze_chip->chip_id == PFUZE3001) {

drivers/regulator/qcom-rpmh-regulator.c+2−2

@@ -735,8 +735,8 @@ static const struct rpmh_vreg_hw_data pmic5_hfsmps515 = { · 734 unmodified lines
735	static const struct rpmh_vreg_hw_data pmic5_bob = {	735	static const struct rpmh_vreg_hw_data pmic5_bob = {
736	.regulator_type = VRM,	736	.regulator_type = VRM,
737	.ops = &rpmh_regulator_vrm_bypass_ops,	737	.ops = &rpmh_regulator_vrm_bypass_ops,
738	.voltage_range = REGULATOR_LINEAR_RANGE(300000, 0, 135, 32000),	738	.voltage_range = REGULATOR_LINEAR_RANGE(3000000, 0, 31, 32000),
739	.n_voltages = 136,	739	.n_voltages = 32,
740	.pmic_mode_map = pmic_mode_map_pmic5_bob,	740	.pmic_mode_map = pmic_mode_map_pmic5_bob,
741	.of_map_mode = rpmh_regulator_pmic4_bob_of_map_mode,	741	.of_map_mode = rpmh_regulator_pmic4_bob_of_map_mode,
742	};	742	};

drivers/regulator/ti-abb-regulator.c+8−18

 	while (timeout++ <= abb->settling_time) {
 		status = ti_abb_check_txdone(abb);
 		if (status)
-			break;
+			return 0;
 		udelay(1);
 	}
-	if (timeout > abb->settling_time) {
+	dev_warn_ratelimited(dev, "%s:TRANXDONE timeout(%duS) int=0x%08x\n",
-		dev_warn_ratelimited(dev,
+			     __func__, timeout, readl(abb->int_base));
-				     "%s:TRANXDONE timeout(%duS) int=0x%08x\n",
+	return -ETIMEDOUT;
-				     __func__, timeout, readl(abb->int_base));
-		return -ETIMEDOUT;
-	}
-	return 0;
 }
 /**
 		status = ti_abb_check_txdone(abb);
 		if (!status)
-			break;
+			return 0;
 		udelay(1);
 	}
-	if (timeout > abb->settling_time) {
+	dev_warn_ratelimited(dev, "%s:TRANXDONE timeout(%duS) int=0x%08x\n",
-		dev_warn_ratelimited(dev,
+			     __func__, timeout, readl(abb->int_base));
-				     "%s:TRANXDONE timeout(%duS) int=0x%08x\n",
+	return -ETIMEDOUT;
-				     __func__, timeout, readl(abb->int_base));
-		return -ETIMEDOUT;
-	}
-	return 0;
 }
 /**

drivers/s390/crypto/zcrypt_api.c+1−2

@@ -522,8 +522,7 @@ static int zcrypt_release(struct inode inode, struct file filp) · 521 unmodified lines
522	if (filp->f_inode->i_cdev == &zcrypt_cdev) {	522	if (filp->f_inode->i_cdev == &zcrypt_cdev) {
523	struct zcdn_device *zcdndev;	523	struct zcdn_device *zcdndev;
524		524
525	if (mutex_lock_interruptible(&ap_perms_mutex))	525	mutex_lock(&ap_perms_mutex);
526	return -ERESTARTSYS;
527	zcdndev = find_zcdndev_by_devt(filp->f_inode->i_rdev);	526	zcdndev = find_zcdndev_by_devt(filp->f_inode->i_rdev);
528	mutex_unlock(&ap_perms_mutex);	527	mutex_unlock(&ap_perms_mutex);
529	if (zcdndev) {	528	if (zcdndev) {

drivers/s390/net/qeth_l2_main.c+15−8

 static void qeth_l2_vnicc_init(struct qeth_card *card)
 {
 	u32 *timeout = &card->options.vnicc.learning_timeout;
+	bool enable, error = false;
 	unsigned int chars_len, i;
 	unsigned long chars_tmp;
 	u32 sup_cmds, vnicc;
-	bool enable, error;
 	QETH_CARD_TEXT(card, 2, "vniccini");
 	/* reset rx_bcast */
 	chars_len = sizeof(card->options.vnicc.sup_chars) * BITS_PER_BYTE;
 	for_each_set_bit(i, &chars_tmp, chars_len) {
 		vnicc = BIT(i);
-		qeth_l2_vnicc_query_cmds(card, vnicc, &sup_cmds);
+		if (qeth_l2_vnicc_query_cmds(card, vnicc, &sup_cmds)) {
-		if (!(sup_cmds & IPA_VNICC_SET_TIMEOUT) ||
+			sup_cmds = 0;
-		    !(sup_cmds & IPA_VNICC_GET_TIMEOUT))
+			error = true;
+		}
+		if ((sup_cmds & IPA_VNICC_SET_TIMEOUT) &&
+		    (sup_cmds & IPA_VNICC_GET_TIMEOUT))
+			card->options.vnicc.getset_timeout_sup |= vnicc;
+		else
 			card->options.vnicc.getset_timeout_sup &= ~vnicc;
-		if (!(sup_cmds & IPA_VNICC_ENABLE) ||
+		if ((sup_cmds & IPA_VNICC_ENABLE) &&
-		    !(sup_cmds & IPA_VNICC_DISABLE))
+		    (sup_cmds & IPA_VNICC_DISABLE))
+			card->options.vnicc.set_char_sup |= vnicc;
+		else
 			card->options.vnicc.set_char_sup &= ~vnicc;
 	}
 	/* enforce assumed default values and recover settings, if changed  */
-	error = qeth_l2_vnicc_recover_timeout(card, QETH_VNICC_LEARNING,
+	error |= qeth_l2_vnicc_recover_timeout(card, QETH_VNICC_LEARNING,
-					      timeout);
+					       timeout);
 	chars_tmp = card->options.vnicc.wanted_chars ^ QETH_VNICC_DEFAULT;
 	chars_tmp |= QETH_VNICC_BRIDGE_INVISIBLE;
 	chars_len = sizeof(card->options.vnicc.wanted_chars) * BITS_PER_BYTE;

drivers/s390/scsi/zfcp_fsf.c+13−3

 struct kmem_cache *zfcp_fsf_qtcb_cache;
+static bool ber_stop = true;
+module_param(ber_stop, bool, 0600);
+MODULE_PARM_DESC(ber_stop,
+		 "Shuts down FCP devices for FCP channels that report a bit-error count in excess of its threshold (default on)");
 static void zfcp_fsf_request_timeout_handler(struct timer_list *t)
 {
 	struct zfcp_fsf_req *fsf_req = from_timer(fsf_req, t, timer);
 	case FSF_STATUS_READ_SENSE_DATA_AVAIL:
 		break;
 	case FSF_STATUS_READ_BIT_ERROR_THRESHOLD:
-		dev_warn(&adapter->ccw_device->dev,
-			 "The error threshold for checksum statistics "
-			 "has been exceeded\n");
 		zfcp_dbf_hba_bit_err("fssrh_3", req);
+		if (ber_stop) {
+			dev_warn(&adapter->ccw_device->dev,
+				 "All paths over this FCP device are disused because of excessive bit errors\n");
+			zfcp_erp_adapter_shutdown(adapter, 0, "fssrh_b");
+		} else {
+			dev_warn(&adapter->ccw_device->dev,
+				 "The error threshold for checksum statistics has been exceeded\n");
+		}
 		break;
 	case FSF_STATUS_READ_LINK_DOWN:
 		zfcp_fsf_status_read_link_down(req);

drivers/scsi/Kconfig+1−1

@@ -898,7 +898,7 @@ config SCSI_SNI_53C710 · 897 unmodified lines
898		898
899	config 53C700_LE_ON_BE	899	config 53C700_LE_ON_BE
900	bool	900	bool
901	depends on SCSI_LASI700	901	depends on SCSI_LASI700 \|\| SCSI_SNI_53C710
902	default y	902	default y
903		903
904	config SCSI_STEX	904	config SCSI_STEX

drivers/scsi/ch.c+0−1

@@ -579,7 +579,6 @@ ch_release(struct inode inode, struct file file) · 578 unmodified lines
579	scsi_changer *ch = file->private_data;	579	scsi_changer *ch = file->private_data;
580		580
581	scsi_device_put(ch->device);	581	scsi_device_put(ch->device);
582	ch->device = NULL;
583	file->private_data = NULL;	582	file->private_data = NULL;
584	kref_put(&ch->ref, ch_destroy);	583	kref_put(&ch->ref, ch_destroy);
585	return 0;	584	return 0;

drivers/scsi/device_handler/scsi_dh_alua.c+16−5

 	unsigned int tpg_desc_tbl_off;
 	unsigned char orig_transition_tmo;
 	unsigned long flags;
+	bool transitioning_sense = false;
 	if (!pg->expiry) {
 		unsigned long transition_tmo = ALUA_FAILOVER_TIMEOUT * HZ;
 			goto retry;
 		}
 		/*
-		 * Retry on ALUA state transition or if any
+		 * If the array returns with 'ALUA state transition'
-		 * UNIT ATTENTION occurred.
+		 * sense code here it cannot return RTPG data during
+		 * transition. So set the state to 'transitioning' directly.
 		 */
 		if (sense_hdr.sense_key == NOT_READY &&
-		    sense_hdr.asc == 0x04 && sense_hdr.ascq == 0x0a)
+		    sense_hdr.asc == 0x04 && sense_hdr.ascq == 0x0a) {
-			err = SCSI_DH_RETRY;
+			transitioning_sense = true;
-		else if (sense_hdr.sense_key == UNIT_ATTENTION)
+			goto skip_rtpg;
+		}
+		/*
+		 * Retry on any other UNIT ATTENTION occurred.
+		 */
+		if (sense_hdr.sense_key == UNIT_ATTENTION)
 			err = SCSI_DH_RETRY;
 		if (err == SCSI_DH_RETRY &&
 		    pg->expiry != 0 && time_before(jiffies, pg->expiry)) {
 		off = 8 + (desc[7] * 4);
 	}
+ skip_rtpg:
 	spin_lock_irqsave(&pg->lock, flags);
+	if (transitioning_sense)
+		pg->state = SCSI_ACCESS_STATE_TRANSITIONING;
 	sdev_printk(KERN_INFO, sdev,
 		    "%s: port group %02x state %c %s supports %c%c%c%c%c%c%c\n",
 		    ALUA_DH_NAME, pg->group_id, print_alua_state(pg->state),

drivers/scsi/hpsa.c+4−0

 		return SCSI_MLQUEUE_HOST_BUSY;
 	}
+	c->device = dev;
 	enqueue_cmd_and_start_io(h, c);
 	/* the cmd'll come back via intr handler in complete_scsi_command()  */
 	return 0;
 		hpsa_cmd_init(h, c->cmdindex, c);
 		c->cmd_type = CMD_SCSI;
 		c->scsi_cmd = cmd;
+		c->device = dev;
 		rc = hpsa_scsi_ioaccel_raid_map(h, c);
 		if (rc < 0)     /* scsi_dma_map failed. */
 			rc = SCSI_MLQUEUE_HOST_BUSY;
 		hpsa_cmd_init(h, c->cmdindex, c);
 		c->cmd_type = CMD_SCSI;
 		c->scsi_cmd = cmd;
+		c->device = dev;
 		rc = hpsa_scsi_ioaccel_direct_map(h, c);
 		if (rc < 0)     /* scsi_dma_map failed. */
 			rc = SCSI_MLQUEUE_HOST_BUSY;

drivers/scsi/lpfc/lpfc_init.c+0−2

 		}
 	}
-#if defined(BUILD_NVME)
 	/* Clear NVME stats */
 	if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
 		for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
 			       sizeof(phba->sli4_hba.hdwq[idx].nvme_cstat));
 		}
 	}
-#endif
 	/* Clear SCSI stats */
 	if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {

drivers/scsi/lpfc/lpfc_scsi.c+0−2

 			list_del_init(&psb->list);
 			psb->exch_busy = 0;
 			psb->status = IOSTAT_SUCCESS;
-#ifdef BUILD_NVME
 			if (psb->cur_iocbq.iocb_flag == LPFC_IO_NVME) {
 				qp->abts_nvme_io_bufs--;
 				spin_unlock(&qp->abts_io_buf_list_lock);
 				lpfc_sli4_nvme_xri_aborted(phba, axri, psb);
 				return;
 			}
-#endif
 			qp->abts_scsi_io_bufs--;
 			spin_unlock(&qp->abts_io_buf_list_lock);

drivers/scsi/qla2xxx/qla_isr.c+0−2

@@ -2837,8 +2837,6 @@ qla2x00_status_cont_entry(struct rsp_que rsp, sts_cont_entry_t pkt) · 2836 unmodified lines
2837	if (sense_len == 0) {	2837	if (sense_len == 0) {
2838	rsp->status_srb = NULL;	2838	rsp->status_srb = NULL;
2839	sp->done(sp, cp->result);	2839	sp->done(sp, cp->result);
2840	} else {
2841	WARN_ON_ONCE(true);
2842	}	2840	}
2843	}	2841	}
2844		2842

drivers/scsi/qla2xxx/qla_os.c+4−0

 	    req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
 	ha->wq = alloc_workqueue("qla2xxx_wq", 0, 0);
+	if (unlikely(!ha->wq)) {
+		ret = -ENOMEM;
+		goto probe_failed;
+	}
 	if (ha->isp_ops->initialize_adapter(base_vha)) {
 		ql_log(ql_log_fatal, base_vha, 0x00d6,

drivers/scsi/scsi_error.c+3−0

 	ses->data_direction = scmd->sc_data_direction;
 	ses->sdb = scmd->sdb;
 	ses->result = scmd->result;
+	ses->resid_len = scmd->req.resid_len;
 	ses->underflow = scmd->underflow;
 	ses->prot_op = scmd->prot_op;
 	ses->eh_eflags = scmd->eh_eflags;
 	memset(scmd->cmnd, 0, BLK_MAX_CDB);
 	memset(&scmd->sdb, 0, sizeof(scmd->sdb));
 	scmd->result = 0;
+	scmd->req.resid_len = 0;
 	if (sense_bytes) {
 		scmd->sdb.length = min_t(unsigned, SCSI_SENSE_BUFFERSIZE,
 	scmd->sc_data_direction = ses->data_direction;
 	scmd->sdb = ses->sdb;
 	scmd->result = ses->result;
+	scmd->req.resid_len = ses->resid_len;
 	scmd->underflow = ses->underflow;
 	scmd->prot_op = ses->prot_op;
 	scmd->eh_eflags = ses->eh_eflags;

drivers/scsi/scsi_lib.c+3−1

 	.init_request	= scsi_mq_init_request,
 	.exit_request	= scsi_mq_exit_request,
 	.initialize_rq_fn = scsi_initialize_rq,
+	.cleanup_rq	= scsi_cleanup_rq,
 	.busy		= scsi_mq_lld_busy,
 	.map_queues	= scsi_map_queues,
 };
 {
 	struct scsi_device *sdev = NULL;
-	if (q->mq_ops == &scsi_mq_ops)
+	if (q->mq_ops == &scsi_mq_ops_no_commit ||
+	    q->mq_ops == &scsi_mq_ops)
 		sdev = q->queuedata;
 	if (!sdev || !get_device(&sdev->sdev_gendev))
 		sdev = NULL;

drivers/scsi/scsi_sysfs.c+10−1

 		  const char *buf, size_t count)
 {
 	struct kernfs_node *kn;
+	struct scsi_device *sdev = to_scsi_device(dev);
+	/*
+	 * We need to try to get module, avoiding the module been removed
+	 * during delete.
+	 */
+	if (scsi_device_get(sdev))
+		return -ENODEV;
 	kn = sysfs_break_active_protection(&dev->kobj, &attr->attr);
 	WARN_ON_ONCE(!kn);
 	 * state into SDEV_DEL.
 	 */
 	device_remove_file(dev, attr);
-	scsi_remove_device(to_scsi_device(dev));
+	scsi_remove_device(sdev);
 	if (kn)
 		sysfs_unbreak_active_protection(kn);
+	scsi_device_put(sdev);
 	return count;
 };
 static DEVICE_ATTR(delete, S_IWUSR, NULL, sdev_store_delete);

drivers/scsi/sd.c+2−1

@@ -1654,7 +1654,8 @@ static int sd_sync_cache(struct scsi_disk sdkp, struct scsi_sense_hdr sshdr) · 1653 unmodified lines
1654	/* we need to evaluate the error return */	1654	/* we need to evaluate the error return */
1655	if (scsi_sense_valid(sshdr) &&	1655	if (scsi_sense_valid(sshdr) &&
1656	(sshdr->asc == 0x3a \|\| /* medium not present */	1656	(sshdr->asc == 0x3a \|\| /* medium not present */
1657	sshdr->asc == 0x20)) /* invalid command */	1657	sshdr->asc == 0x20 \|\| /* invalid command */
		1658	(sshdr->asc == 0x74 && sshdr->ascq == 0x71))) /* drive is password locked */
1658	/* this is no error here */	1659	/* this is no error here */
1659	return 0;	1660	return 0;
1660		1661

drivers/scsi/sni_53c710.c+1−3

 	base = res->start;
 	hostdata = kzalloc(sizeof(*hostdata), GFP_KERNEL);
-	if (!hostdata) {
+	if (!hostdata)
-		dev_printk(KERN_ERR, dev, "Failed to allocate host data\n");
 		return -ENOMEM;
-	}
 	hostdata->dev = &dev->dev;
 	dma_set_mask(&dev->dev, DMA_BIT_MASK(32));

drivers/soc/imx/soc-imx-scu.c+1−1

@@ -46,7 +46,7 @@ static ssize_t soc_uid_show(struct device *dev, · 45 unmodified lines
46	hdr->func = IMX_SC_MISC_FUNC_UNIQUE_ID;	46	hdr->func = IMX_SC_MISC_FUNC_UNIQUE_ID;
47	hdr->size = 1;	47	hdr->size = 1;
48		48
49	ret = imx_scu_call_rpc(soc_ipc_handle, &msg, false);	49	ret = imx_scu_call_rpc(soc_ipc_handle, &msg, true);
50	if (ret) {	50	if (ret) {
51	pr_err("%s: get soc uid failed, ret %d\n", __func__, ret);	51	pr_err("%s: get soc uid failed, ret %d\n", __func__, ret);
52	return ret;	52	return ret;

drivers/staging/wlan-ng/cfg80211.c+2−4

 	/* Set the encryption - we only support wep */
 	if (is_wep) {
 		if (sme->key) {
-			if (sme->key_idx >= NUM_WEPKEYS) {
+			if (sme->key_idx >= NUM_WEPKEYS)
-				err = -EINVAL;
+				return -EINVAL;
-				goto exit;
-			}
 			result = prism2_domibset_uint32(wlandev,
 				DIDMIB_DOT11SMT_PRIVACYTABLE_WEPDEFAULTKEYID,

drivers/target/target_core_device.c+0−21

@@ -1074,27 +1074,6 @@ passthrough_parse_cdb(struct se_cmd *cmd, · 1073 unmodified lines
1074	struct se_device *dev = cmd->se_dev;	1074	struct se_device *dev = cmd->se_dev;
1075	unsigned int size;	1075	unsigned int size;
1076		1076
1077	/*
1078	* Clear a lun set in the cdb if the initiator talking to use spoke
1079	* and old standards version, as we can't assume the underlying device
1080	* won't choke up on it.
1081	*/
1082	switch (cdb[0]) {
1083	case READ_10: /* SBC - RDProtect */
1084	case READ_12: /* SBC - RDProtect */
1085	case READ_16: /* SBC - RDProtect */
1086	case SEND_DIAGNOSTIC: /* SPC - SELF-TEST Code */
1087	case VERIFY: /* SBC - VRProtect */
1088	case VERIFY_16: /* SBC - VRProtect */
1089	case WRITE_VERIFY: /* SBC - VRProtect */
1090	case WRITE_VERIFY_12: /* SBC - VRProtect */
1091	case MAINTENANCE_IN: /* SPC - Parameter Data Format for SA RTPG */
1092	break;
1093	default:
1094	cdb[1] &= 0x1f; /* clear logical unit number */
1095	break;
1096	}
1097
1098	/*	1077	/*
1099	* For REPORT LUNS we always need to emulate the response, for everything	1078	* For REPORT LUNS we always need to emulate the response, for everything
1100	* else, pass it up.	1079	* else, pass it up.

drivers/thermal/cpu_cooling.c+7−7

@@ -88,7 +88,7 @@ struct cpufreq_cooling_device { · 87 unmodified lines
88	struct cpufreq_policy *policy;	88	struct cpufreq_policy *policy;
89	struct list_head node;	89	struct list_head node;
90	struct time_in_idle *idle_time;	90	struct time_in_idle *idle_time;
91	struct dev_pm_qos_request qos_req;	91	struct freq_qos_request qos_req;
92	};	92	};
93		93
94	static DEFINE_IDA(cpufreq_ida);	94	static DEFINE_IDA(cpufreq_ida);
@@ -331,7 +331,7 @@ static int cpufreq_set_cur_state(struct thermal_cooling_device *cdev, · 236 unmodified lines
331		331
332	cpufreq_cdev->cpufreq_state = state;	332	cpufreq_cdev->cpufreq_state = state;
333		333
334	return dev_pm_qos_update_request(&cpufreq_cdev->qos_req,	334	return freq_qos_update_request(&cpufreq_cdev->qos_req,
335	cpufreq_cdev->freq_table[state].frequency);	335	cpufreq_cdev->freq_table[state].frequency);
336	}	336	}
337		337
@@ -615,9 +615,9 @@ __cpufreq_cooling_register(struct device_node *np, · 277 unmodified lines
615	cooling_ops = &cpufreq_cooling_ops;	615	cooling_ops = &cpufreq_cooling_ops;
616	}	616	}
617		617
618	ret = dev_pm_qos_add_request(dev, &cpufreq_cdev->qos_req,	618	ret = freq_qos_add_request(&policy->constraints,
619	DEV_PM_QOS_MAX_FREQUENCY,	619	&cpufreq_cdev->qos_req, FREQ_QOS_MAX,
620	cpufreq_cdev->freq_table[0].frequency);	620	cpufreq_cdev->freq_table[0].frequency);
621	if (ret < 0) {	621	if (ret < 0) {
622	pr_err("%s: Failed to add freq constraint (%d)\n", __func__,	622	pr_err("%s: Failed to add freq constraint (%d)\n", __func__,
623	ret);	623	ret);
@@ -637,7 +637,7 @@ __cpufreq_cooling_register(struct device_node *np, · 13 unmodified lines
637	return cdev;	637	return cdev;
638		638
639	remove_qos_req:	639	remove_qos_req:
640	dev_pm_qos_remove_request(&cpufreq_cdev->qos_req);	640	freq_qos_remove_request(&cpufreq_cdev->qos_req);
641	remove_ida:	641	remove_ida:
642	ida_simple_remove(&cpufreq_ida, cpufreq_cdev->id);	642	ida_simple_remove(&cpufreq_ida, cpufreq_cdev->id);
643	free_table:	643	free_table:
@@ -736,7 +736,7 @@ void cpufreq_cooling_unregister(struct thermal_cooling_device *cdev) · 92 unmodified lines
736	mutex_unlock(&cooling_list_lock);	736	mutex_unlock(&cooling_list_lock);
737		737
738	thermal_cooling_device_unregister(cdev);	738	thermal_cooling_device_unregister(cdev);
739	dev_pm_qos_remove_request(&cpufreq_cdev->qos_req);	739	freq_qos_remove_request(&cpufreq_cdev->qos_req);
740	ida_simple_remove(&cpufreq_ida, cpufreq_cdev->id);	740	ida_simple_remove(&cpufreq_ida, cpufreq_cdev->id);
741	kfree(cpufreq_cdev->idle_time);	741	kfree(cpufreq_cdev->idle_time);
742	kfree(cpufreq_cdev->freq_table);	742	kfree(cpufreq_cdev->freq_table);

drivers/tty/serial/8250/8250_men_mcb.c+4−4

@@ -72,8 +72,8 @@ static int serial_8250_men_mcb_probe(struct mcb_device *mdev, · 71 unmodified lines
72	{	72	{
73	struct serial_8250_men_mcb_data *data;	73	struct serial_8250_men_mcb_data *data;
74	struct resource *mem;	74	struct resource *mem;
75	unsigned int num_ports;	75	int num_ports;
76	unsigned int i;	76	int i;
77	void __iomem *membase;	77	void __iomem *membase;
78		78
79	mem = mcb_get_resource(mdev, IORESOURCE_MEM);	79	mem = mcb_get_resource(mdev, IORESOURCE_MEM);
@@ -88,7 +88,7 @@ static int serial_8250_men_mcb_probe(struct mcb_device *mdev, · 8 unmodified lines
88	dev_dbg(&mdev->dev, "found a 16z%03u with %u ports\n",	88	dev_dbg(&mdev->dev, "found a 16z%03u with %u ports\n",
89	mdev->id, num_ports);	89	mdev->id, num_ports);
90		90
91	if (num_ports == 0 \|\| num_ports > 4) {	91	if (num_ports <= 0 \|\| num_ports > 4) {
92	dev_err(&mdev->dev, "unexpected number of ports: %u\n",	92	dev_err(&mdev->dev, "unexpected number of ports: %u\n",
93	num_ports);	93	num_ports);
94	return -ENODEV;	94	return -ENODEV;
@@ -133,7 +133,7 @@ static int serial_8250_men_mcb_probe(struct mcb_device *mdev, · 38 unmodified lines
133		133
134	static void serial_8250_men_mcb_remove(struct mcb_device *mdev)	134	static void serial_8250_men_mcb_remove(struct mcb_device *mdev)
135	{	135	{
136	unsigned int num_ports, i;	136	int num_ports, i;
137	struct serial_8250_men_mcb_data *data = mcb_get_drvdata(mdev);	137	struct serial_8250_men_mcb_data *data = mcb_get_drvdata(mdev);
138		138
139	if (!data)	139	if (!data)

drivers/usb/cdns3/core.c+3−1

 		goto err;
 	switch (cdns->dr_mode) {
-	case USB_DR_MODE_UNKNOWN:
 	case USB_DR_MODE_OTG:
 		ret = cdns3_hw_role_switch(cdns);
 		if (ret)
 		if (ret)
 			goto err;
 		break;
+	default:
+		ret = -EINVAL;
+		goto err;
 	}
 	return ret;

drivers/usb/cdns3/gadget.c+20−15

@@ -1145,6 +1145,14 @@ static void cdns3_transfer_completed(struct cdns3_device *priv_dev, · 1144 unmodified lines
1145	request = cdns3_next_request(&priv_ep->pending_req_list);	1145	request = cdns3_next_request(&priv_ep->pending_req_list);
1146	priv_req = to_cdns3_request(request);	1146	priv_req = to_cdns3_request(request);
1147		1147
		1148	trb = priv_ep->trb_pool + priv_ep->dequeue;
		1149
		1150	/* Request was dequeued and TRB was changed to TRB_LINK. */
		1151	if (TRB_FIELD_TO_TYPE(trb->control) == TRB_LINK) {
		1152	trace_cdns3_complete_trb(priv_ep, trb);
		1153	cdns3_move_deq_to_next_trb(priv_req);
		1154	}
		1155
1148	/* Re-select endpoint. It could be changed by other CPU during	1156	/* Re-select endpoint. It could be changed by other CPU during
1149	* handling usb_gadget_giveback_request.	1157	* handling usb_gadget_giveback_request.
1150	*/	1158	*/
@@ -2067,6 +2075,7 @@ int cdns3_gadget_ep_dequeue(struct usb_ep *ep, · 916 unmodified lines
2067	struct usb_request req, req_temp;	2075	struct usb_request req, req_temp;
2068	struct cdns3_request *priv_req;	2076	struct cdns3_request *priv_req;
2069	struct cdns3_trb *link_trb;	2077	struct cdns3_trb *link_trb;
		2078	u8 req_on_hw_ring = 0;
2070	unsigned long flags;	2079	unsigned long flags;
2071	int ret = 0;	2080	int ret = 0;
2072		2081
@@ -2083,8 +2092,10 @@ int cdns3_gadget_ep_dequeue(struct usb_ep *ep, · 10 unmodified lines
2083		2092
2084	list_for_each_entry_safe(req, req_temp, &priv_ep->pending_req_list,	2093	list_for_each_entry_safe(req, req_temp, &priv_ep->pending_req_list,
2085	list) {	2094	list) {
2086	if (request == req)	2095	if (request == req) {
		2096	req_on_hw_ring = 1;
2087	goto found;	2097	goto found;
		2098	}
2088	}	2099	}
2089		2100
2090	list_for_each_entry_safe(req, req_temp, &priv_ep->deferred_req_list,	2101	list_for_each_entry_safe(req, req_temp, &priv_ep->deferred_req_list,
@@ -2096,27 +2107,21 @@ int cdns3_gadget_ep_dequeue(struct usb_ep *ep, · 5 unmodified lines
2096	goto not_found;	2107	goto not_found;
2097		2108
2098	found:	2109	found:
2099
2100	if (priv_ep->wa1_trb == priv_req->trb)
2101	cdns3_wa1_restore_cycle_bit(priv_ep);
2102
2103	link_trb = priv_req->trb;	2110	link_trb = priv_req->trb;
2104	cdns3_move_deq_to_next_trb(priv_req);
2105	cdns3_gadget_giveback(priv_ep, priv_req, -ECONNRESET);
2106
2107	/* Update ring */
2108	request = cdns3_next_request(&priv_ep->deferred_req_list);
2109	if (request) {
2110	priv_req = to_cdns3_request(request);
2111		2111
		2112	/* Update ring only if removed request is on pending_req_list list */
		2113	if (req_on_hw_ring) {
2112	link_trb->buffer = TRB_BUFFER(priv_ep->trb_pool_dma +	2114	link_trb->buffer = TRB_BUFFER(priv_ep->trb_pool_dma +
2113	(priv_req->start_trb * TRB_SIZE));	2115	(priv_req->start_trb * TRB_SIZE));
2114	link_trb->control = (link_trb->control & TRB_CYCLE) \|	2116	link_trb->control = (link_trb->control & TRB_CYCLE) \|
2115	TRB_TYPE(TRB_LINK) \| TRB_CHAIN \| TRB_TOGGLE;	2117	TRB_TYPE(TRB_LINK) \| TRB_CHAIN;
2116	} else {	2118
2117	priv_ep->flags \|= EP_UPDATE_EP_TRBADDR;	2119	if (priv_ep->wa1_trb == priv_req->trb)
		2120	cdns3_wa1_restore_cycle_bit(priv_ep);
2118	}	2121	}
2119		2122
		2123	cdns3_gadget_giveback(priv_ep, priv_req, -ECONNRESET);
		2124
2120	not_found:	2125	not_found:
2121	spin_unlock_irqrestore(&priv_dev->lock, flags);	2126	spin_unlock_irqrestore(&priv_dev->lock, flags);
2122	return ret;	2127	return ret;

drivers/usb/class/usblp.c+3−1

 	kfree(usblp->readbuf);
 	kfree(usblp->device_id_string);
 	kfree(usblp->statusbuf);
+	usb_put_intf(usblp->intf);
 	kfree(usblp);
 }
 	init_waitqueue_head(&usblp->wwait);
 	init_usb_anchor(&usblp->urbs);
 	usblp->ifnum = intf->cur_altsetting->desc.bInterfaceNumber;
-	usblp->intf = intf;
+	usblp->intf = usb_get_intf(intf);
 	/* Malloc device ID string buffer to the largest expected length,
 	 * since we can re-query it on an ioctl and a dynamic string
 	kfree(usblp->readbuf);
 	kfree(usblp->statusbuf);
 	kfree(usblp->device_id_string);
+	usb_put_intf(usblp->intf);
 	kfree(usblp);
 abort_ret:
 	return retval;

drivers/usb/gadget/udc/lpc32xx_udc.c+3−3

@@ -1177,11 +1177,11 @@ static void udc_pop_fifo(struct lpc32xx_udc udc, u8 data, u32 bytes) · 1176 unmodified lines
1177	tmp = readl(USBD_RXDATA(udc->udp_baseaddr));	1177	tmp = readl(USBD_RXDATA(udc->udp_baseaddr));
1178		1178
1179	bl = bytes - n;	1179	bl = bytes - n;
1180	if (bl > 3)	1180	if (bl > 4)
1181	bl = 3;	1181	bl = 4;
1182		1182
1183	for (i = 0; i < bl; i++)	1183	for (i = 0; i < bl; i++)
1184	data[n + i] = (u8) ((tmp >> (n * 8)) & 0xFF);	1184	data[n + i] = (u8) ((tmp >> (i * 8)) & 0xFF);
1185	}	1185	}
1186	break;	1186	break;
1187		1187

drivers/usb/misc/ldusb.c+12−11

@@ -380,10 +380,7 @@ static int ld_usb_release(struct inode inode, struct file file) · 379 unmodified lines
380	goto exit;	380	goto exit;
381	}	381	}
382		382
383	if (mutex_lock_interruptible(&dev->mutex)) {	383	mutex_lock(&dev->mutex);
384	retval = -ERESTARTSYS;
385	goto exit;
386	}
387		384
388	if (dev->open_count != 1) {	385	if (dev->open_count != 1) {
389	retval = -ENODEV;	386	retval = -ENODEV;
@@ -467,7 +464,7 @@ static ssize_t ld_usb_read(struct file file, char __user buffer, size_t count, · 77 unmodified lines
467		464
468	/* wait for data */	465	/* wait for data */
469	spin_lock_irq(&dev->rbsl);	466	spin_lock_irq(&dev->rbsl);
470	if (dev->ring_head == dev->ring_tail) {	467	while (dev->ring_head == dev->ring_tail) {
471	dev->interrupt_in_done = 0;	468	dev->interrupt_in_done = 0;
472	spin_unlock_irq(&dev->rbsl);	469	spin_unlock_irq(&dev->rbsl);
473	if (file->f_flags & O_NONBLOCK) {	470	if (file->f_flags & O_NONBLOCK) {
@@ -477,12 +474,17 @@ static ssize_t ld_usb_read(struct file file, char __user buffer, size_t count, · 3 unmodified lines
477	retval = wait_event_interruptible(dev->read_wait, dev->interrupt_in_done);	474	retval = wait_event_interruptible(dev->read_wait, dev->interrupt_in_done);
478	if (retval < 0)	475	if (retval < 0)
479	goto unlock_exit;	476	goto unlock_exit;
480	} else {	477
481	spin_unlock_irq(&dev->rbsl);	478	spin_lock_irq(&dev->rbsl);
482	}	479	}
		480	spin_unlock_irq(&dev->rbsl);
483		481
484	/* actual_buffer contains actual_length + interrupt_in_buffer */	482	/* actual_buffer contains actual_length + interrupt_in_buffer */
485	actual_buffer = (size_t )(dev->ring_buffer + dev->ring_tail (sizeof(size_t)+dev->interrupt_in_endpoint_size));	483	actual_buffer = (size_t )(dev->ring_buffer + dev->ring_tail (sizeof(size_t)+dev->interrupt_in_endpoint_size));
		484	if (*actual_buffer > dev->interrupt_in_endpoint_size) {
		485	retval = -EIO;
		486	goto unlock_exit;
		487	}
486	bytes_to_read = min(count, *actual_buffer);	488	bytes_to_read = min(count, *actual_buffer);
487	if (bytes_to_read < *actual_buffer)	489	if (bytes_to_read < *actual_buffer)
488	dev_warn(&dev->intf->dev, "Read buffer overflow, %zd bytes dropped\n",	490	dev_warn(&dev->intf->dev, "Read buffer overflow, %zd bytes dropped\n",
@@ -693,10 +695,9 @@ static int ld_usb_probe(struct usb_interface intf, const struct usb_device_id · 204 unmodified lines
693	dev_warn(&intf->dev, "Interrupt out endpoint not found (using control endpoint instead)\n");	695	dev_warn(&intf->dev, "Interrupt out endpoint not found (using control endpoint instead)\n");
694		696
695	dev->interrupt_in_endpoint_size = usb_endpoint_maxp(dev->interrupt_in_endpoint);	697	dev->interrupt_in_endpoint_size = usb_endpoint_maxp(dev->interrupt_in_endpoint);
696	dev->ring_buffer =	698	dev->ring_buffer = kcalloc(ring_buffer_size,
697	kmalloc_array(ring_buffer_size,	699	sizeof(size_t) + dev->interrupt_in_endpoint_size,
698	sizeof(size_t) + dev->interrupt_in_endpoint_size,	700	GFP_KERNEL);
699	GFP_KERNEL);
700	if (!dev->ring_buffer)	701	if (!dev->ring_buffer)
701	goto error;	702	goto error;
702	dev->interrupt_in_buffer = kmalloc(dev->interrupt_in_endpoint_size, GFP_KERNEL);	703	dev->interrupt_in_buffer = kmalloc(dev->interrupt_in_endpoint_size, GFP_KERNEL);

drivers/usb/misc/legousbtower.c+2−5

 		goto exit;
 	}
-	if (mutex_lock_interruptible(&dev->lock)) {
+	mutex_lock(&dev->lock);
-	        retval = -ERESTARTSYS;
-		goto exit;
-	}
 	if (dev->open_count != 1) {
 		dev_dbg(&dev->udev->dev, "%s: device not opened exactly once\n",
 				  get_version_reply,
 				  sizeof(*get_version_reply),
 				  1000);
-	if (result < sizeof(*get_version_reply)) {
+	if (result != sizeof(*get_version_reply)) {
 		if (result >= 0)
 			result = -EIO;
 		dev_err(idev, "get version request failed: %d\n", result);

drivers/usb/serial/ti_usb_3410_5052.c+4−8

 	struct ti_port *tport;
 	int port_number;
 	int status;
-	int do_unlock;
 	unsigned long flags;
 	tdev = usb_get_serial_data(port->serial);
 			"%s - cannot send close port command, %d\n"
 							, __func__, status);
-	/* if mutex_lock is interrupted, continue anyway */
+	mutex_lock(&tdev->td_open_close_lock);
-	do_unlock = !mutex_lock_interruptible(&tdev->td_open_close_lock);
+	--tdev->td_open_port_count;
-	--tport->tp_tdev->td_open_port_count;
+	if (tdev->td_open_port_count == 0) {
-	if (tport->tp_tdev->td_open_port_count <= 0) {
 		/* last port is closed, shut down interrupt urb */
 		usb_kill_urb(port->serial->port[0]->interrupt_in_urb);
-		tport->tp_tdev->td_open_port_count = 0;
 	}
-	if (do_unlock)
+	mutex_unlock(&tdev->td_open_close_lock);
-		mutex_unlock(&tdev->td_open_close_lock);
 }

drivers/vfio/vfio_iommu_type1.c+1−1

@@ -1658,7 +1658,7 @@ static int vfio_iommu_type1_attach_group(void *iommu_data, · 1657 unmodified lines
1658	struct bus_type *bus = NULL;	1658	struct bus_type *bus = NULL;
1659	int ret;	1659	int ret;
1660	bool resv_msi, msi_remap;	1660	bool resv_msi, msi_remap;
1661	phys_addr_t resv_msi_base;	1661	phys_addr_t resv_msi_base = 0;
1662	struct iommu_domain_geometry geo;	1662	struct iommu_domain_geometry geo;
1663	LIST_HEAD(iova_copy);	1663	LIST_HEAD(iova_copy);
1664	LIST_HEAD(group_resv_regions);	1664	LIST_HEAD(group_resv_regions);

drivers/vhost/test.c+2−0

 	vhost_test_stop(n, &private);
 	vhost_test_flush(n);
+	vhost_dev_stop(&n->dev);
 	vhost_dev_cleanup(&n->dev);
 	/* We do an extra flush before freeing memory,
 	 * since jobs can re-queue themselves. */
 	}
 	vhost_test_stop(n, &priv);
 	vhost_test_flush(n);
+	vhost_dev_stop(&n->dev);
 	vhost_dev_reset_owner(&n->dev, umem);
 done:
 	mutex_unlock(&n->dev.mutex);

drivers/xen/pvcalls-back.c+1−1

@@ -775,7 +775,7 @@ static int pvcalls_back_poll(struct xenbus_device *dev, · 774 unmodified lines
775	mappass->reqcopy = *req;	775	mappass->reqcopy = *req;
776	icsk = inet_csk(mappass->sock->sk);	776	icsk = inet_csk(mappass->sock->sk);
777	queue = &icsk->icsk_accept_queue;	777	queue = &icsk->icsk_accept_queue;
778	data = queue->rskq_accept_head != NULL;	778	data = READ_ONCE(queue->rskq_accept_head) != NULL;
779	if (data) {	779	if (data) {
780	mappass->reqcopy.cmd = 0;	780	mappass->reqcopy.cmd = 0;
781	ret = 0;	781	ret = 0;

fs/btrfs/block-group.c+1−0

@@ -1761,6 +1761,7 @@ int btrfs_read_block_groups(struct btrfs_fs_info *info) · 1760 unmodified lines
1761	btrfs_err(info,	1761	btrfs_err(info,
1762	"bg %llu is a mixed block group but filesystem hasn't enabled mixed block groups",	1762	"bg %llu is a mixed block group but filesystem hasn't enabled mixed block groups",
1763	cache->key.objectid);	1763	cache->key.objectid);
		1764	btrfs_put_block_group(cache);
1764	ret = -EINVAL;	1765	ret = -EINVAL;
1765	goto error;	1766	goto error;
1766	}	1767	}

fs/btrfs/ctree.h+1−4

 	struct btrfs_workqueue *fixup_workers;
 	struct btrfs_workqueue *delayed_workers;
-	/* the extent workers do delayed refs on the extent allocation tree */
-	struct btrfs_workqueue *extent_workers;
 	struct task_struct *transaction_kthread;
 	struct task_struct *cleaner_kthread;
 	u32 thread_pool_size;
 				     int nitems, bool use_global_rsv);
 void btrfs_subvolume_release_metadata(struct btrfs_fs_info *fs_info,
 				      struct btrfs_block_rsv *rsv);
-void btrfs_delalloc_release_extents(struct btrfs_inode *inode, u64 num_bytes,
+void btrfs_delalloc_release_extents(struct btrfs_inode *inode, u64 num_bytes);
-				    bool qgroup_free);
 int btrfs_delalloc_reserve_metadata(struct btrfs_inode *inode, u64 num_bytes);
 u64 btrfs_account_ro_block_groups_free_space(struct btrfs_space_info *sinfo);

fs/btrfs/delalloc-space.c+2−5

 out_qgroup:
 	btrfs_qgroup_free_meta_prealloc(root, qgroup_reserve);
 out_fail:
-	btrfs_inode_rsv_release(inode, true);
 	if (delalloc_lock)
 		mutex_unlock(&inode->delalloc_mutex);
 	return ret;
  * btrfs_delalloc_release_extents - release our outstanding_extents
  * @inode: the inode to balance the reservation for.
  * @num_bytes: the number of bytes we originally reserved with
- * @qgroup_free: do we need to free qgroup meta reservation or convert them.
  *
  * When we reserve space we increase outstanding_extents for the extents we may
  * add.  Once we've set the range as delalloc or created our ordered extents we
  * temporarily tracked outstanding_extents.  This _must_ be used in conjunction
  * with btrfs_delalloc_reserve_metadata.
  */
-void btrfs_delalloc_release_extents(struct btrfs_inode *inode, u64 num_bytes,
+void btrfs_delalloc_release_extents(struct btrfs_inode *inode, u64 num_bytes)
-				    bool qgroup_free)
 {
 	struct btrfs_fs_info *fs_info = inode->root->fs_info;
 	unsigned num_extents;
 	if (btrfs_is_testing(fs_info))
 		return;
-	btrfs_inode_rsv_release(inode, qgroup_free);
+	btrfs_inode_rsv_release(inode, true);
 }
 /**

fs/btrfs/disk-io.c+0−6

 	btrfs_destroy_workqueue(fs_info->readahead_workers);
 	btrfs_destroy_workqueue(fs_info->flush_workers);
 	btrfs_destroy_workqueue(fs_info->qgroup_rescan_workers);
-	btrfs_destroy_workqueue(fs_info->extent_workers);
 	/*
 	 * Now that all other work queues are destroyed, we can safely destroy
 	 * the queues used for metadata I/O, since tasks from those other work
 				      max_active, 2);
 	fs_info->qgroup_rescan_workers =
 		btrfs_alloc_workqueue(fs_info, "qgroup-rescan", flags, 1, 0);
-	fs_info->extent_workers =
-		btrfs_alloc_workqueue(fs_info, "extent-refs", flags,
-				      min_t(u64, fs_devices->num_devices,
-					    max_active), 8);
 	if (!(fs_info->workers && fs_info->delalloc_workers &&
 	      fs_info->submit_workers && fs_info->flush_workers &&
 	      fs_info->endio_freespace_worker && fs_info->rmw_workers &&
 	      fs_info->caching_workers && fs_info->readahead_workers &&
 	      fs_info->fixup_workers && fs_info->delayed_workers &&
-	      fs_info->extent_workers &&
 	      fs_info->qgroup_rescan_workers)) {
 		return -ENOMEM;
 	}

fs/btrfs/file.c+20−23

 				    force_page_uptodate);
 		if (ret) {
 			btrfs_delalloc_release_extents(BTRFS_I(inode),
-						       reserve_bytes, true);
+						       reserve_bytes);
 			break;
 		}
 			if (extents_locked == -EAGAIN)
 				goto again;
 			btrfs_delalloc_release_extents(BTRFS_I(inode),
-						       reserve_bytes, true);
+						       reserve_bytes);
 			ret = extents_locked;
 			break;
 		}
 		else
 			free_extent_state(cached_state);
-		btrfs_delalloc_release_extents(BTRFS_I(inode), reserve_bytes,
+		btrfs_delalloc_release_extents(BTRFS_I(inode), reserve_bytes);
-					       true);
 		if (ret) {
 			btrfs_drop_pages(pages, num_pages);
 			break;
 	struct btrfs_trans_handle *trans;
 	struct btrfs_log_ctx ctx;
 	int ret = 0, err;
-	u64 len;
-	/*
-	 * If the inode needs a full sync, make sure we use a full range to
-	 * avoid log tree corruption, due to hole detection racing with ordered
-	 * extent completion for adjacent ranges, and assertion failures during
-	 * hole detection.
-	 */
-	if (test_bit(BTRFS_INODE_NEEDS_FULL_SYNC,
-		     &BTRFS_I(inode)->runtime_flags)) {
-		start = 0;
-		end = LLONG_MAX;
-	}
-	/*
-	 * The range length can be represented by u64, we have to do the typecasts
-	 * to avoid signed overflow if it's [0, LLONG_MAX] eg. from fsync()
-	 */
-	len = (u64)end - (u64)start + 1;
 	trace_btrfs_sync_file(file, datasync);
 	btrfs_init_log_ctx(&ctx, inode);
 	atomic_inc(&root->log_batch);
+	/*
+	 * If the inode needs a full sync, make sure we use a full range to
+	 * avoid log tree corruption, due to hole detection racing with ordered
+	 * extent completion for adjacent ranges, and assertion failures during
+	 * hole detection. Do this while holding the inode lock, to avoid races
+	 * with other tasks.
+	 */
+	if (test_bit(BTRFS_INODE_NEEDS_FULL_SYNC,
+		     &BTRFS_I(inode)->runtime_flags)) {
+		start = 0;
+		end = LLONG_MAX;
+	}
 	/*
 	 * Before we acquired the inode's lock, someone may have dirtied more
 	 * pages in the target range. We need to make sure that writeback for
 	/*
 	 * We have to do this here to avoid the priority inversion of waiting on
 	 * IO of a lower priority task while holding a transaction open.
+	 *
+	 * Also, the range length can be represented by u64, we have to do the
+	 * typecasts to avoid signed overflow if it's [0, LLONG_MAX].
 	 */
-	ret = btrfs_wait_ordered_range(inode, start, len);
+	ret = btrfs_wait_ordered_range(inode, start, (u64)end - (u64)start + 1);
 	if (ret) {
 		up_write(&BTRFS_I(inode)->dio_sem);
 		inode_unlock(inode);

fs/btrfs/inode-map.c+2−2

@@ -501,13 +501,13 @@ again: · 500 unmodified lines
501	ret = btrfs_prealloc_file_range_trans(inode, trans, 0, 0, prealloc,	501	ret = btrfs_prealloc_file_range_trans(inode, trans, 0, 0, prealloc,
502	prealloc, prealloc, &alloc_hint);	502	prealloc, prealloc, &alloc_hint);
503	if (ret) {	503	if (ret) {
504	btrfs_delalloc_release_extents(BTRFS_I(inode), prealloc, true);	504	btrfs_delalloc_release_extents(BTRFS_I(inode), prealloc);
505	btrfs_delalloc_release_metadata(BTRFS_I(inode), prealloc, true);	505	btrfs_delalloc_release_metadata(BTRFS_I(inode), prealloc, true);
506	goto out_put;	506	goto out_put;
507	}	507	}
508		508
509	ret = btrfs_write_out_ino_cache(root, trans, path, inode);	509	ret = btrfs_write_out_ino_cache(root, trans, path, inode);
510	btrfs_delalloc_release_extents(BTRFS_I(inode), prealloc, false);	510	btrfs_delalloc_release_extents(BTRFS_I(inode), prealloc);
511	out_put:	511	out_put:
512	iput(inode);	512	iput(inode);
513	out_release:	513	out_release:

fs/btrfs/inode.c+6−6

@@ -2206,7 +2206,7 @@ again: · 2205 unmodified lines
2206		2206
2207	ClearPageChecked(page);	2207	ClearPageChecked(page);
2208	set_page_dirty(page);	2208	set_page_dirty(page);
2209	btrfs_delalloc_release_extents(BTRFS_I(inode), PAGE_SIZE, false);	2209	btrfs_delalloc_release_extents(BTRFS_I(inode), PAGE_SIZE);
2210	out:	2210	out:
2211	unlock_extent_cached(&BTRFS_I(inode)->io_tree, page_start, page_end,	2211	unlock_extent_cached(&BTRFS_I(inode)->io_tree, page_start, page_end,
2212	&cached_state);	2212	&cached_state);
@@ -4951,7 +4951,7 @@ again: · 2738 unmodified lines
4951	if (!page) {	4951	if (!page) {
4952	btrfs_delalloc_release_space(inode, data_reserved,	4952	btrfs_delalloc_release_space(inode, data_reserved,
4953	block_start, blocksize, true);	4953	block_start, blocksize, true);
4954	btrfs_delalloc_release_extents(BTRFS_I(inode), blocksize, true);	4954	btrfs_delalloc_release_extents(BTRFS_I(inode), blocksize);
4955	ret = -ENOMEM;	4955	ret = -ENOMEM;
4956	goto out;	4956	goto out;
4957	}	4957	}
@@ -5018,7 +5018,7 @@ out_unlock: · 60 unmodified lines
5018	if (ret)	5018	if (ret)
5019	btrfs_delalloc_release_space(inode, data_reserved, block_start,	5019	btrfs_delalloc_release_space(inode, data_reserved, block_start,
5020	blocksize, true);	5020	blocksize, true);
5021	btrfs_delalloc_release_extents(BTRFS_I(inode), blocksize, (ret != 0));	5021	btrfs_delalloc_release_extents(BTRFS_I(inode), blocksize);
5022	unlock_page(page);	5022	unlock_page(page);
5023	put_page(page);	5023	put_page(page);
5024	out:	5024	out:
@@ -8709,7 +8709,7 @@ static ssize_t btrfs_direct_IO(struct kiocb iocb, struct iov_iter iter) · 3684 unmodified lines
8709	} else if (ret >= 0 && (size_t)ret < count)	8709	} else if (ret >= 0 && (size_t)ret < count)
8710	btrfs_delalloc_release_space(inode, data_reserved,	8710	btrfs_delalloc_release_space(inode, data_reserved,
8711	offset, count - (size_t)ret, true);	8711	offset, count - (size_t)ret, true);
8712	btrfs_delalloc_release_extents(BTRFS_I(inode), count, false);	8712	btrfs_delalloc_release_extents(BTRFS_I(inode), count);
8713	}	8713	}
8714	out:	8714	out:
8715	if (wakeup)	8715	if (wakeup)
@@ -9059,7 +9059,7 @@ again: · 343 unmodified lines
9059	unlock_extent_cached(io_tree, page_start, page_end, &cached_state);	9059	unlock_extent_cached(io_tree, page_start, page_end, &cached_state);
9060		9060
9061	if (!ret2) {	9061	if (!ret2) {
9062	btrfs_delalloc_release_extents(BTRFS_I(inode), PAGE_SIZE, true);	9062	btrfs_delalloc_release_extents(BTRFS_I(inode), PAGE_SIZE);
9063	sb_end_pagefault(inode->i_sb);	9063	sb_end_pagefault(inode->i_sb);
9064	extent_changeset_free(data_reserved);	9064	extent_changeset_free(data_reserved);
9065	return VM_FAULT_LOCKED;	9065	return VM_FAULT_LOCKED;
@@ -9068,7 +9068,7 @@ again: · 2 unmodified lines
9068	out_unlock:	9068	out_unlock:
9069	unlock_page(page);	9069	unlock_page(page);
9070	out:	9070	out:
9071	btrfs_delalloc_release_extents(BTRFS_I(inode), PAGE_SIZE, (ret != 0));	9071	btrfs_delalloc_release_extents(BTRFS_I(inode), PAGE_SIZE);
9072	btrfs_delalloc_release_space(inode, data_reserved, page_start,	9072	btrfs_delalloc_release_space(inode, data_reserved, page_start,
9073	reserved_space, (ret != 0));	9073	reserved_space, (ret != 0));
9074	out_noreserve:	9074	out_noreserve:

fs/btrfs/ioctl.c+2−4

 		unlock_page(pages[i]);
 		put_page(pages[i]);
 	}
-	btrfs_delalloc_release_extents(BTRFS_I(inode), page_cnt << PAGE_SHIFT,
+	btrfs_delalloc_release_extents(BTRFS_I(inode), page_cnt << PAGE_SHIFT);
-				       false);
 	extent_changeset_free(data_reserved);
 	return i_done;
 out:
 	btrfs_delalloc_release_space(inode, data_reserved,
 			start_index << PAGE_SHIFT,
 			page_cnt << PAGE_SHIFT, true);
-	btrfs_delalloc_release_extents(BTRFS_I(inode), page_cnt << PAGE_SHIFT,
+	btrfs_delalloc_release_extents(BTRFS_I(inode), page_cnt << PAGE_SHIFT);
-				       true);
 	extent_changeset_free(data_reserved);
 	return ret;

fs/btrfs/qgroup.c+2−2

@@ -3629,7 +3629,7 @@ int __btrfs_qgroup_reserve_meta(struct btrfs_root *root, int num_bytes, · 3628 unmodified lines
3629	return 0;	3629	return 0;
3630		3630
3631	BUG_ON(num_bytes != round_down(num_bytes, fs_info->nodesize));	3631	BUG_ON(num_bytes != round_down(num_bytes, fs_info->nodesize));
3632	trace_qgroup_meta_reserve(root, type, (s64)num_bytes);	3632	trace_qgroup_meta_reserve(root, (s64)num_bytes, type);
3633	ret = qgroup_reserve(root, num_bytes, enforce, type);	3633	ret = qgroup_reserve(root, num_bytes, enforce, type);
3634	if (ret < 0)	3634	if (ret < 0)
3635	return ret;	3635	return ret;
@@ -3676,7 +3676,7 @@ void __btrfs_qgroup_free_meta(struct btrfs_root *root, int num_bytes, · 40 unmodified lines
3676	*/	3676	*/
3677	num_bytes = sub_root_meta_rsv(root, num_bytes, type);	3677	num_bytes = sub_root_meta_rsv(root, num_bytes, type);
3678	BUG_ON(num_bytes != round_down(num_bytes, fs_info->nodesize));	3678	BUG_ON(num_bytes != round_down(num_bytes, fs_info->nodesize));
3679	trace_qgroup_meta_reserve(root, type, -(s64)num_bytes);	3679	trace_qgroup_meta_reserve(root, -(s64)num_bytes, type);
3680	btrfs_qgroup_free_refroot(fs_info, root->root_key.objectid,	3680	btrfs_qgroup_free_refroot(fs_info, root->root_key.objectid,
3681	num_bytes, type);	3681	num_bytes, type);
3682	}	3682	}

fs/btrfs/relocation.c+5−4

 			if (!page) {
 				btrfs_delalloc_release_metadata(BTRFS_I(inode),
 							PAGE_SIZE, true);
+				btrfs_delalloc_release_extents(BTRFS_I(inode),
+							PAGE_SIZE);
 				ret = -ENOMEM;
 				goto out;
 			}
 				btrfs_delalloc_release_metadata(BTRFS_I(inode),
 							PAGE_SIZE, true);
 				btrfs_delalloc_release_extents(BTRFS_I(inode),
-							       PAGE_SIZE, true);
+							       PAGE_SIZE);
 				ret = -EIO;
 				goto out;
 			}
 			btrfs_delalloc_release_metadata(BTRFS_I(inode),
 							 PAGE_SIZE, true);
 			btrfs_delalloc_release_extents(BTRFS_I(inode),
-			                               PAGE_SIZE, true);
+			                               PAGE_SIZE);
 			clear_extent_bits(&BTRFS_I(inode)->io_tree,
 					  page_start, page_end,
 		put_page(page);
 		index++;
-		btrfs_delalloc_release_extents(BTRFS_I(inode), PAGE_SIZE,
+		btrfs_delalloc_release_extents(BTRFS_I(inode), PAGE_SIZE);
-					       false);
 		balance_dirty_pages_ratelimited(inode->i_mapping);
 		btrfs_throttle(fs_info);
 	}

fs/ceph/mds_client.c+11−10

 	}
 done:
-	if (*p != end)
+	/* Skip over any unrecognized fields */
-		goto bad;
+	*p = end;
 	return 0;
 bad:
 		goto bad;
 	info->filelock_reply = *p;
-	*p += sizeof(*info->filelock_reply);
-	if (unlikely(*p != end))
+	/* Skip over any unrecognized fields */
-		goto bad;
+	*p = end;
 	return 0;
 bad:
 	return -EIO;
 }
 {
 	if (features == (u64)-1 ||
 	    (features & CEPH_FEATURE_REPLY_CREATE_INODE)) {
+		/* Malformed reply? */
 		if (*p == end) {
 			info->has_create_ino = false;
 		} else {
 			info->has_create_ino = true;
-			info->ino = ceph_decode_64(p);
+			ceph_decode_64_safe(p, end, info->ino, bad);
 		}
+	} else {
+		if (*p != end)
+			goto bad;
 	}
-	if (unlikely(*p != end))
+	/* Skip over any unrecognized fields */
-		goto bad;
+	*p = end;
 	return 0;
 bad:
 	return -EIO;
 }

fs/cifs/cifsfs.c+7−1

 	else
 		sb->s_maxbytes = MAX_NON_LFS;
-	/* Some very old servers like DOS and OS/2 used 2 second granularity */
+	/*
+	 * Some very old servers like DOS and OS/2 used 2 second granularity
+	 * (while all current servers use 100ns granularity - see MS-DTYP)
+	 * but 1 second is the maximum allowed granularity for the VFS
+	 * so for old servers set time granularity to 1 second while for
+	 * everything else (current servers) set it to 100ns.
+	 */
 	if ((tcon->ses->server->vals->protocol_id == SMB10_PROT_ID) &&
 	    ((tcon->ses->capabilities &
 	      tcon->ses->server->vals->cap_nt_find) == 0) &&

fs/cifs/cifsglob.h+5−0

 struct cifsInodeInfo {
 	bool can_cache_brlcks;
 	struct list_head llist;	/* locks helb by this inode */
+	/*
+	 * NOTE: Some code paths call down_read(lock_sem) twice, so
+	 * we must always use use cifs_down_write() instead of down_write()
+	 * for this semaphore to avoid deadlocks.
+	 */
 	struct rw_semaphore lock_sem;	/* protect the fields above */
 	/* BB add in lists for dirty pages i.e. write caching info for oplock */
 	struct list_head openFileList;

fs/cifs/cifsproto.h+1−0

@@ -170,6 +170,7 @@ extern int cifs_unlock_range(struct cifsFileInfo *cfile, · 169 unmodified lines
170	struct file_lock *flock, const unsigned int xid);	170	struct file_lock *flock, const unsigned int xid);
171	extern int cifs_push_mandatory_locks(struct cifsFileInfo *cfile);	171	extern int cifs_push_mandatory_locks(struct cifsFileInfo *cfile);
172		172
		173	extern void cifs_down_write(struct rw_semaphore *sem);
173	extern struct cifsFileInfo cifs_new_fileinfo(struct cifs_fid fid,	174	extern struct cifsFileInfo cifs_new_fileinfo(struct cifs_fid fid,
174	struct file *file,	175	struct file *file,
175	struct tcon_link *tlink,	176	struct tcon_link *tlink,

fs/cifs/connect.c+15−3

@@ -564,9 +564,11 @@ cifs_reconnect(struct TCP_Server_Info *server) · 563 unmodified lines
564	spin_lock(&GlobalMid_Lock);	564	spin_lock(&GlobalMid_Lock);
565	list_for_each_safe(tmp, tmp2, &server->pending_mid_q) {	565	list_for_each_safe(tmp, tmp2, &server->pending_mid_q) {
566	mid_entry = list_entry(tmp, struct mid_q_entry, qhead);	566	mid_entry = list_entry(tmp, struct mid_q_entry, qhead);
		567	kref_get(&mid_entry->refcount);
567	if (mid_entry->mid_state == MID_REQUEST_SUBMITTED)	568	if (mid_entry->mid_state == MID_REQUEST_SUBMITTED)
568	mid_entry->mid_state = MID_RETRY_NEEDED;	569	mid_entry->mid_state = MID_RETRY_NEEDED;
569	list_move(&mid_entry->qhead, &retry_list);	570	list_move(&mid_entry->qhead, &retry_list);
		571	mid_entry->mid_flags \|= MID_DELETED;
570	}	572	}
571	spin_unlock(&GlobalMid_Lock);	573	spin_unlock(&GlobalMid_Lock);
572	mutex_unlock(&server->srv_mutex);	574	mutex_unlock(&server->srv_mutex);
@@ -576,6 +578,7 @@ cifs_reconnect(struct TCP_Server_Info *server) · 3 unmodified lines
576	mid_entry = list_entry(tmp, struct mid_q_entry, qhead);	578	mid_entry = list_entry(tmp, struct mid_q_entry, qhead);
577	list_del_init(&mid_entry->qhead);	579	list_del_init(&mid_entry->qhead);
578	mid_entry->callback(mid_entry);	580	mid_entry->callback(mid_entry);
		581	cifs_mid_q_entry_release(mid_entry);
579	}	582	}
580		583
581	if (cifs_rdma_enabled(server)) {	584	if (cifs_rdma_enabled(server)) {
@@ -895,8 +898,10 @@ dequeue_mid(struct mid_q_entry *mid, bool malformed) · 313 unmodified lines
895	if (mid->mid_flags & MID_DELETED)	898	if (mid->mid_flags & MID_DELETED)
896	printk_once(KERN_WARNING	899	printk_once(KERN_WARNING
897	"trying to dequeue a deleted mid\n");	900	"trying to dequeue a deleted mid\n");
898	else	901	else {
899	list_del_init(&mid->qhead);	902	list_del_init(&mid->qhead);
		903	mid->mid_flags \|= MID_DELETED;
		904	}
900	spin_unlock(&GlobalMid_Lock);	905	spin_unlock(&GlobalMid_Lock);
901	}	906	}
902		907
@@ -966,8 +971,10 @@ static void clean_demultiplex_info(struct TCP_Server_Info *server) · 63 unmodified lines
966	list_for_each_safe(tmp, tmp2, &server->pending_mid_q) {	971	list_for_each_safe(tmp, tmp2, &server->pending_mid_q) {
967	mid_entry = list_entry(tmp, struct mid_q_entry, qhead);	972	mid_entry = list_entry(tmp, struct mid_q_entry, qhead);
968	cifs_dbg(FYI, "Clearing mid 0x%llx\n", mid_entry->mid);	973	cifs_dbg(FYI, "Clearing mid 0x%llx\n", mid_entry->mid);
		974	kref_get(&mid_entry->refcount);
969	mid_entry->mid_state = MID_SHUTDOWN;	975	mid_entry->mid_state = MID_SHUTDOWN;
970	list_move(&mid_entry->qhead, &dispose_list);	976	list_move(&mid_entry->qhead, &dispose_list);
		977	mid_entry->mid_flags \|= MID_DELETED;
971	}	978	}
972	spin_unlock(&GlobalMid_Lock);	979	spin_unlock(&GlobalMid_Lock);
973		980
@@ -977,6 +984,7 @@ static void clean_demultiplex_info(struct TCP_Server_Info *server) · 3 unmodified lines
977	cifs_dbg(FYI, "Callback mid 0x%llx\n", mid_entry->mid);	984	cifs_dbg(FYI, "Callback mid 0x%llx\n", mid_entry->mid);
978	list_del_init(&mid_entry->qhead);	985	list_del_init(&mid_entry->qhead);
979	mid_entry->callback(mid_entry);	986	mid_entry->callback(mid_entry);
		987	cifs_mid_q_entry_release(mid_entry);
980	}	988	}
981	/* 1/8th of sec is more than enough time for them to exit */	989	/* 1/8th of sec is more than enough time for them to exit */
982	msleep(125);	990	msleep(125);
@@ -3882,8 +3890,12 @@ generic_ip_connect(struct TCP_Server_Info *server) · 2899 unmodified lines
3882		3890
3883	rc = socket->ops->connect(socket, saddr, slen,	3891	rc = socket->ops->connect(socket, saddr, slen,
3884	server->noblockcnt ? O_NONBLOCK : 0);	3892	server->noblockcnt ? O_NONBLOCK : 0);
3885		3893	/*
3886	if (rc == -EINPROGRESS)	3894	* When mounting SMB root file systems, we do not want to block in
		3895	* connect. Otherwise bail out and then let cifs_reconnect() perform
		3896	* reconnect failover - if possible.
		3897	*/
		3898	if (server->noblockcnt && rc == -EINPROGRESS)
3887	rc = 0;	3899	rc = 0;
3888	if (rc < 0) {	3900	if (rc < 0) {
3889	cifs_dbg(FYI, "Error %d connecting to server\n", rc);	3901	cifs_dbg(FYI, "Error %d connecting to server\n", rc);

fs/cifs/file.c+18−11

@@ -281,6 +281,13 @@ cifs_has_mand_locks(struct cifsInodeInfo *cinode) · 280 unmodified lines
281	return has_locks;	281	return has_locks;
282	}	282	}
283		283
		284	void
		285	cifs_down_write(struct rw_semaphore *sem)
		286	{
		287	while (!down_write_trylock(sem))
		288	msleep(10);
		289	}
		290
284	struct cifsFileInfo *	291	struct cifsFileInfo *
285	cifs_new_fileinfo(struct cifs_fid fid, struct file file,	292	cifs_new_fileinfo(struct cifs_fid fid, struct file file,
286	struct tcon_link *tlink, __u32 oplock)	293	struct tcon_link *tlink, __u32 oplock)
@@ -306,7 +313,7 @@ cifs_new_fileinfo(struct cifs_fid fid, struct file file, · 19 unmodified lines
306	INIT_LIST_HEAD(&fdlocks->locks);	313	INIT_LIST_HEAD(&fdlocks->locks);
307	fdlocks->cfile = cfile;	314	fdlocks->cfile = cfile;
308	cfile->llist = fdlocks;	315	cfile->llist = fdlocks;
309	down_write(&cinode->lock_sem);	316	cifs_down_write(&cinode->lock_sem);
310	list_add(&fdlocks->llist, &cinode->llist);	317	list_add(&fdlocks->llist, &cinode->llist);
311	up_write(&cinode->lock_sem);	318	up_write(&cinode->lock_sem);
312		319
@@ -405,10 +412,11 @@ void _cifsFileInfo_put(struct cifsFileInfo *cifs_file, bool wait_oplock_handler) · 92 unmodified lines
405	bool oplock_break_cancelled;	412	bool oplock_break_cancelled;
406		413
407	spin_lock(&tcon->open_file_lock);	414	spin_lock(&tcon->open_file_lock);
408		415	spin_lock(&cifsi->open_file_lock);
409	spin_lock(&cifs_file->file_info_lock);	416	spin_lock(&cifs_file->file_info_lock);
410	if (--cifs_file->count > 0) {	417	if (--cifs_file->count > 0) {
411	spin_unlock(&cifs_file->file_info_lock);	418	spin_unlock(&cifs_file->file_info_lock);
		419	spin_unlock(&cifsi->open_file_lock);
412	spin_unlock(&tcon->open_file_lock);	420	spin_unlock(&tcon->open_file_lock);
413	return;	421	return;
414	}	422	}
@@ -421,9 +429,7 @@ void _cifsFileInfo_put(struct cifsFileInfo *cifs_file, bool wait_oplock_handler) · 6 unmodified lines
421	cifs_add_pending_open_locked(&fid, cifs_file->tlink, &open);	429	cifs_add_pending_open_locked(&fid, cifs_file->tlink, &open);
422		430
423	/* remove it from the lists */	431	/* remove it from the lists */
424	spin_lock(&cifsi->open_file_lock);
425	list_del(&cifs_file->flist);	432	list_del(&cifs_file->flist);
426	spin_unlock(&cifsi->open_file_lock);
427	list_del(&cifs_file->tlist);	433	list_del(&cifs_file->tlist);
428	atomic_dec(&tcon->num_local_opens);	434	atomic_dec(&tcon->num_local_opens);
429		435
@@ -440,6 +446,7 @@ void _cifsFileInfo_put(struct cifsFileInfo *cifs_file, bool wait_oplock_handler) · 10 unmodified lines
440	cifs_set_oplock_level(cifsi, 0);	446	cifs_set_oplock_level(cifsi, 0);
441	}	447	}
442		448
		449	spin_unlock(&cifsi->open_file_lock);
443	spin_unlock(&tcon->open_file_lock);	450	spin_unlock(&tcon->open_file_lock);
444		451
445	oplock_break_cancelled = wait_oplock_handler ?	452	oplock_break_cancelled = wait_oplock_handler ?
@@ -464,7 +471,7 @@ void _cifsFileInfo_put(struct cifsFileInfo *cifs_file, bool wait_oplock_handler) · 18 unmodified lines
464	* Delete any outstanding lock records. We'll lose them when the file	471	* Delete any outstanding lock records. We'll lose them when the file
465	* is closed anyway.	472	* is closed anyway.
466	*/	473	*/
467	down_write(&cifsi->lock_sem);	474	cifs_down_write(&cifsi->lock_sem);
468	list_for_each_entry_safe(li, tmp, &cifs_file->llist->locks, llist) {	475	list_for_each_entry_safe(li, tmp, &cifs_file->llist->locks, llist) {
469	list_del(&li->llist);	476	list_del(&li->llist);
470	cifs_del_lock_waiters(li);	477	cifs_del_lock_waiters(li);
@@ -1027,7 +1034,7 @@ static void · 556 unmodified lines
1027	cifs_lock_add(struct cifsFileInfo cfile, struct cifsLockInfo lock)	1034	cifs_lock_add(struct cifsFileInfo cfile, struct cifsLockInfo lock)
1028	{	1035	{
1029	struct cifsInodeInfo *cinode = CIFS_I(d_inode(cfile->dentry));	1036	struct cifsInodeInfo *cinode = CIFS_I(d_inode(cfile->dentry));
1030	down_write(&cinode->lock_sem);	1037	cifs_down_write(&cinode->lock_sem);
1031	list_add_tail(&lock->llist, &cfile->llist->locks);	1038	list_add_tail(&lock->llist, &cfile->llist->locks);
1032	up_write(&cinode->lock_sem);	1039	up_write(&cinode->lock_sem);
1033	}	1040	}
@@ -1049,7 +1056,7 @@ cifs_lock_add_if(struct cifsFileInfo cfile, struct cifsLockInfo lock, · 15 unmodified lines
1049		1056
1050	try_again:	1057	try_again:
1051	exist = false;	1058	exist = false;
1052	down_write(&cinode->lock_sem);	1059	cifs_down_write(&cinode->lock_sem);
1053		1060
1054	exist = cifs_find_lock_conflict(cfile, lock->offset, lock->length,	1061	exist = cifs_find_lock_conflict(cfile, lock->offset, lock->length,
1055	lock->type, lock->flags, &conf_lock,	1062	lock->type, lock->flags, &conf_lock,
@@ -1072,7 +1079,7 @@ try_again: · 16 unmodified lines
1072	(lock->blist.next == &lock->blist));	1079	(lock->blist.next == &lock->blist));
1073	if (!rc)	1080	if (!rc)
1074	goto try_again;	1081	goto try_again;
1075	down_write(&cinode->lock_sem);	1082	cifs_down_write(&cinode->lock_sem);
1076	list_del_init(&lock->blist);	1083	list_del_init(&lock->blist);
1077	}	1084	}
1078		1085
@@ -1125,7 +1132,7 @@ cifs_posix_lock_set(struct file file, struct file_lock flock) · 46 unmodified lines
1125	return rc;	1132	return rc;
1126		1133
1127	try_again:	1134	try_again:
1128	down_write(&cinode->lock_sem);	1135	cifs_down_write(&cinode->lock_sem);
1129	if (!cinode->can_cache_brlcks) {	1136	if (!cinode->can_cache_brlcks) {
1130	up_write(&cinode->lock_sem);	1137	up_write(&cinode->lock_sem);
1131	return rc;	1138	return rc;
@@ -1331,7 +1338,7 @@ cifs_push_locks(struct cifsFileInfo *cfile) · 199 unmodified lines
1331	int rc = 0;	1338	int rc = 0;
1332		1339
1333	/* we are going to update can_cache_brlcks here - need a write access */	1340	/* we are going to update can_cache_brlcks here - need a write access */
1334	down_write(&cinode->lock_sem);	1341	cifs_down_write(&cinode->lock_sem);
1335	if (!cinode->can_cache_brlcks) {	1342	if (!cinode->can_cache_brlcks) {
1336	up_write(&cinode->lock_sem);	1343	up_write(&cinode->lock_sem);
1337	return rc;	1344	return rc;
@@ -1522,7 +1529,7 @@ cifs_unlock_range(struct cifsFileInfo cfile, struct file_lock flock, · 184 unmodified lines
1522	if (!buf)	1529	if (!buf)
1523	return -ENOMEM;	1530	return -ENOMEM;
1524		1531
1525	down_write(&cinode->lock_sem);	1532	cifs_down_write(&cinode->lock_sem);
1526	for (i = 0; i < 2; i++) {	1533	for (i = 0; i < 2; i++) {
1527	cur = buf;	1534	cur = buf;
1528	num = 0;	1535	num = 0;

fs/cifs/inode.c+2−2

@@ -2475,9 +2475,9 @@ cifs_setattr_nounix(struct dentry direntry, struct iattr attrs) · 2474 unmodified lines
2475	rc = tcon->ses->server->ops->flush(xid, tcon, &wfile->fid);	2475	rc = tcon->ses->server->ops->flush(xid, tcon, &wfile->fid);
2476	cifsFileInfo_put(wfile);	2476	cifsFileInfo_put(wfile);
2477	if (rc)	2477	if (rc)
2478	return rc;	2478	goto cifs_setattr_exit;
2479	} else if (rc != -EBADF)	2479	} else if (rc != -EBADF)
2480	return rc;	2480	goto cifs_setattr_exit;
2481	else	2481	else
2482	rc = 0;	2482	rc = 0;
2483	}	2483	}

fs/cifs/smb1ops.c+3−0

 	/* we do not want to loop forever */
 	last_mid = cur_mid;
 	cur_mid++;
+	/* avoid 0xFFFF MID */
+	if (cur_mid == 0xffff)
+		cur_mid++;
 	/*
 	 * This nested loop looks more expensive than it is.

fs/cifs/smb2file.c+1−1

@@ -145,7 +145,7 @@ smb2_unlock_range(struct cifsFileInfo cfile, struct file_lock flock, · 144 unmodified lines
145		145
146	cur = buf;	146	cur = buf;
147		147
148	down_write(&cinode->lock_sem);	148	cifs_down_write(&cinode->lock_sem);
149	list_for_each_entry_safe(li, tmp, &cfile->llist->locks, llist) {	149	list_for_each_entry_safe(li, tmp, &cfile->llist->locks, llist) {
150	if (flock->fl_start > li->offset \|\|	150	if (flock->fl_start > li->offset \|\|
151	(flock->fl_start + length) <	151	(flock->fl_start + length) <

fs/cifs/transport.c+23−19

 static void _cifs_mid_q_entry_release(struct kref *refcount)
 {
-	struct mid_q_entry *mid = container_of(refcount, struct mid_q_entry,
+	struct mid_q_entry *midEntry =
-					       refcount);
+			container_of(refcount, struct mid_q_entry, refcount);
-	mempool_free(mid, cifs_mid_poolp);
-}
-void cifs_mid_q_entry_release(struct mid_q_entry *midEntry)
-{
-	spin_lock(&GlobalMid_Lock);
-	kref_put(&midEntry->refcount, _cifs_mid_q_entry_release);
-	spin_unlock(&GlobalMid_Lock);
-}
-void
-DeleteMidQEntry(struct mid_q_entry *midEntry)
-{
 #ifdef CONFIG_CIFS_STATS2
 	__le16 command = midEntry->server->vals->lock_cmd;
 	__u16 smb_cmd = le16_to_cpu(midEntry->command);
 		}
 	}
 #endif
+	mempool_free(midEntry, cifs_mid_poolp);
+}
+void cifs_mid_q_entry_release(struct mid_q_entry *midEntry)
+{
+	spin_lock(&GlobalMid_Lock);
+	kref_put(&midEntry->refcount, _cifs_mid_q_entry_release);
+	spin_unlock(&GlobalMid_Lock);
+}
+void DeleteMidQEntry(struct mid_q_entry *midEntry)
+{
 	cifs_mid_q_entry_release(midEntry);
 }
 cifs_delete_mid(struct mid_q_entry *mid)
 {
 	spin_lock(&GlobalMid_Lock);
-	list_del_init(&mid->qhead);
+	if (!(mid->mid_flags & MID_DELETED)) {
-	mid->mid_flags |= MID_DELETED;
+		list_del_init(&mid->qhead);
+		mid->mid_flags |= MID_DELETED;
+	}
 	spin_unlock(&GlobalMid_Lock);
 	DeleteMidQEntry(mid);
 		rc = -EHOSTDOWN;
 		break;
 	default:
-		list_del_init(&mid->qhead);
+		if (!(mid->mid_flags & MID_DELETED)) {
+			list_del_init(&mid->qhead);
+			mid->mid_flags |= MID_DELETED;
+		}
 		cifs_server_dbg(VFS, "%s: invalid mid state mid=%llu state=%d\n",
 			 __func__, mid->mid, mid->mid_state);
 		rc = -EIO;

fs/dax.c+3−2

 	for (;;) {
 		entry = xas_find_conflict(xas);
+		if (!entry || WARN_ON_ONCE(!xa_is_value(entry)))
+			return entry;
 		if (dax_entry_order(entry) < order)
 			return XA_RETRY_ENTRY;
-		if (!entry || WARN_ON_ONCE(!xa_is_value(entry)) ||
+		if (!dax_is_locked(entry))
-				!dax_is_locked(entry))
 			return entry;
 		wq = dax_entry_waitqueue(xas, entry, &ewait.key);

fs/direct-io.c+1−2

 	}
 }
-/**
+/*
  * dio_complete() - called when all DIO BIO I/O has been completed
- * @offset: the byte offset in the file of the completed operation
  *
  * This drops i_dio_count, lets interested parties know that a DIO operation
  * has completed, and calculates the resulting return code for the operation.

fs/fs-writeback.c+1−1

@@ -905,7 +905,7 @@ restart: · 904 unmodified lines
905	* cgroup_writeback_by_id - initiate cgroup writeback from bdi and memcg IDs	905	* cgroup_writeback_by_id - initiate cgroup writeback from bdi and memcg IDs
906	* @bdi_id: target bdi id	906	* @bdi_id: target bdi id
907	* @memcg_id: target memcg css id	907	* @memcg_id: target memcg css id
908	* @nr_pages: number of pages to write, 0 for best-effort dirty flushing	908	* @nr: number of pages to write, 0 for best-effort dirty flushing
909	* @reason: reason why some writeback work initiated	909	* @reason: reason why some writeback work initiated
910	* @done: target wb_completion	910	* @done: target wb_completion
911	*	911	*

fs/gfs2/ops_fstype.c+1−0

@@ -1600,6 +1600,7 @@ static int gfs2_meta_get_tree(struct fs_context *fc) · 1599 unmodified lines
1600	}	1600	}
1601		1601
1602	static const struct fs_context_operations gfs2_meta_context_ops = {	1602	static const struct fs_context_operations gfs2_meta_context_ops = {
		1603	.free = gfs2_fc_free,
1603	.get_tree = gfs2_meta_get_tree,	1604	.get_tree = gfs2_meta_get_tree,
1604	};	1605	};
1605		1606

fs/io_uring.c+172−117

@@ -197,6 +197,7 @@ struct io_ring_ctx { · 196 unmodified lines
197	unsigned sq_entries;	197	unsigned sq_entries;
198	unsigned sq_mask;	198	unsigned sq_mask;
199	unsigned sq_thread_idle;	199	unsigned sq_thread_idle;
		200	unsigned cached_sq_dropped;
200	struct io_uring_sqe *sq_sqes;	201	struct io_uring_sqe *sq_sqes;
201		202
202	struct list_head defer_list;	203	struct list_head defer_list;
@@ -212,6 +213,7 @@ struct io_ring_ctx { · 9 unmodified lines
212		213
213	struct {	214	struct {
214	unsigned cached_cq_tail;	215	unsigned cached_cq_tail;
		216	atomic_t cached_cq_overflow;
215	unsigned cq_entries;	217	unsigned cq_entries;
216	unsigned cq_mask;	218	unsigned cq_mask;
217	struct wait_queue_head cq_wait;	219	struct wait_queue_head cq_wait;
@@ -322,6 +324,8 @@ struct io_kiocb { · 104 unmodified lines
322	#define REQ_F_FAIL_LINK 256 /* fail rest of links */	324	#define REQ_F_FAIL_LINK 256 /* fail rest of links */
323	#define REQ_F_SHADOW_DRAIN 512 /* link-drain shadow req */	325	#define REQ_F_SHADOW_DRAIN 512 /* link-drain shadow req */
324	#define REQ_F_TIMEOUT 1024 /* timeout request */	326	#define REQ_F_TIMEOUT 1024 /* timeout request */
		327	#define REQ_F_ISREG 2048 /* regular file */
		328	#define REQ_F_MUST_PUNT 4096 /* must be punted even for NONBLOCK */
325	u64 user_data;	329	u64 user_data;
326	u32 result;	330	u32 result;
327	u32 sequence;	331	u32 sequence;
@@ -418,7 +422,8 @@ static struct io_ring_ctx io_ring_ctx_alloc(struct io_uring_params p) · 90 unmodified lines
418	static inline bool __io_sequence_defer(struct io_ring_ctx *ctx,	422	static inline bool __io_sequence_defer(struct io_ring_ctx *ctx,
419	struct io_kiocb *req)	423	struct io_kiocb *req)
420	{	424	{
421	return req->sequence != ctx->cached_cq_tail + ctx->rings->sq_dropped;	425	return req->sequence != ctx->cached_cq_tail + ctx->cached_sq_dropped
		426	+ atomic_read(&ctx->cached_cq_overflow);
422	}	427	}
423		428
424	static inline bool io_sequence_defer(struct io_ring_ctx *ctx,	429	static inline bool io_sequence_defer(struct io_ring_ctx *ctx,
@@ -565,9 +570,8 @@ static void io_cqring_fill_event(struct io_ring_ctx *ctx, u64 ki_user_data, · 140 unmodified lines
565	WRITE_ONCE(cqe->res, res);	570	WRITE_ONCE(cqe->res, res);
566	WRITE_ONCE(cqe->flags, 0);	571	WRITE_ONCE(cqe->flags, 0);
567	} else {	572	} else {
568	unsigned overflow = READ_ONCE(ctx->rings->cq_overflow);	573	WRITE_ONCE(ctx->rings->cq_overflow,
569		574	atomic_inc_return(&ctx->cached_cq_overflow));
570	WRITE_ONCE(ctx->rings->cq_overflow, overflow + 1);
571	}	575	}
572	}	576	}
573		577
@@ -733,6 +737,14 @@ static unsigned io_cqring_events(struct io_rings *rings) · 159 unmodified lines
733	return READ_ONCE(rings->cq.tail) - READ_ONCE(rings->cq.head);	737	return READ_ONCE(rings->cq.tail) - READ_ONCE(rings->cq.head);
734	}	738	}
735		739
		740	static inline unsigned int io_sqring_entries(struct io_ring_ctx *ctx)
		741	{
		742	struct io_rings *rings = ctx->rings;
		743
		744	/* make sure SQ entry isn't read before tail */
		745	return smp_load_acquire(&rings->sq.tail) - ctx->cached_sq_head;
		746	}
		747
736	/*	748	/*
737	* Find and free completed poll iocbs	749	* Find and free completed poll iocbs
738	*/	750	*/
@@ -862,19 +874,11 @@ static void io_iopoll_reap_events(struct io_ring_ctx *ctx) · 123 unmodified lines
862	mutex_unlock(&ctx->uring_lock);	874	mutex_unlock(&ctx->uring_lock);
863	}	875	}
864		876
865	static int io_iopoll_check(struct io_ring_ctx ctx, unsigned nr_events,	877	static int __io_iopoll_check(struct io_ring_ctx ctx, unsigned nr_events,
866	long min)	878	long min)
867	{	879	{
868	int iters, ret = 0;	880	int iters = 0, ret = 0;
869		881
870	/*
871	* We disallow the app entering submit/complete with polling, but we
872	* still need to lock the ring to prevent racing with polled issue
873	* that got punted to a workqueue.
874	*/
875	mutex_lock(&ctx->uring_lock);
876
877	iters = 0;
878	do {	882	do {
879	int tmin = 0;	883	int tmin = 0;
880		884
@@ -910,30 +914,45 @@ static int io_iopoll_check(struct io_ring_ctx ctx, unsigned nr_events, · 29 unmodified lines
910	ret = 0;	914	ret = 0;
911	} while (min && !*nr_events && !need_resched());	915	} while (min && !*nr_events && !need_resched());
912		916
		917	return ret;
		918	}
		919
		920	static int io_iopoll_check(struct io_ring_ctx ctx, unsigned nr_events,
		921	long min)
		922	{
		923	int ret;
		924
		925	/*
		926	* We disallow the app entering submit/complete with polling, but we
		927	* still need to lock the ring to prevent racing with polled issue
		928	* that got punted to a workqueue.
		929	*/
		930	mutex_lock(&ctx->uring_lock);
		931	ret = __io_iopoll_check(ctx, nr_events, min);
913	mutex_unlock(&ctx->uring_lock);	932	mutex_unlock(&ctx->uring_lock);
914	return ret;	933	return ret;
915	}	934	}
916		935
917	static void kiocb_end_write(struct kiocb *kiocb)	936	static void kiocb_end_write(struct io_kiocb *req)
918	{	937	{
919	if (kiocb->ki_flags & IOCB_WRITE) {	938	/*
920	struct inode *inode = file_inode(kiocb->ki_filp);	939	* Tell lockdep we inherited freeze protection from submission
		940	* thread.
		941	*/
		942	if (req->flags & REQ_F_ISREG) {
		943	struct inode *inode = file_inode(req->file);
921		944
922	/*	945	__sb_writers_acquired(inode->i_sb, SB_FREEZE_WRITE);
923	* Tell lockdep we inherited freeze protection from submission
924	* thread.
925	*/
926	if (S_ISREG(inode->i_mode))
927	__sb_writers_acquired(inode->i_sb, SB_FREEZE_WRITE);
928	file_end_write(kiocb->ki_filp);
929	}	946	}
		947	file_end_write(req->file);
930	}	948	}
931		949
932	static void io_complete_rw(struct kiocb *kiocb, long res, long res2)	950	static void io_complete_rw(struct kiocb *kiocb, long res, long res2)
933	{	951	{
934	struct io_kiocb *req = container_of(kiocb, struct io_kiocb, rw);	952	struct io_kiocb *req = container_of(kiocb, struct io_kiocb, rw);
935		953
936	kiocb_end_write(kiocb);	954	if (kiocb->ki_flags & IOCB_WRITE)
		955	kiocb_end_write(req);
937		956
938	if ((req->flags & REQ_F_LINK) && res != req->result)	957	if ((req->flags & REQ_F_LINK) && res != req->result)
939	req->flags \|= REQ_F_FAIL_LINK;	958	req->flags \|= REQ_F_FAIL_LINK;
@@ -945,7 +964,8 @@ static void io_complete_rw_iopoll(struct kiocb *kiocb, long res, long res2) · 5 unmodified lines
945	{	964	{
946	struct io_kiocb *req = container_of(kiocb, struct io_kiocb, rw);	965	struct io_kiocb *req = container_of(kiocb, struct io_kiocb, rw);
947		966
948	kiocb_end_write(kiocb);	967	if (kiocb->ki_flags & IOCB_WRITE)
		968	kiocb_end_write(req);
949		969
950	if ((req->flags & REQ_F_LINK) && res != req->result)	970	if ((req->flags & REQ_F_LINK) && res != req->result)
951	req->flags \|= REQ_F_FAIL_LINK;	971	req->flags \|= REQ_F_FAIL_LINK;
@@ -1059,8 +1079,17 @@ static int io_prep_rw(struct io_kiocb req, const struct sqe_submit s, · 107 unmodified lines
1059	if (!req->file)	1079	if (!req->file)
1060	return -EBADF;	1080	return -EBADF;
1061		1081
1062	if (force_nonblock && !io_file_supports_async(req->file))	1082	if (S_ISREG(file_inode(req->file)->i_mode))
1063	force_nonblock = false;	1083	req->flags \|= REQ_F_ISREG;
		1084
		1085	/*
		1086	* If the file doesn't support async, mark it as REQ_F_MUST_PUNT so
		1087	* we know to async punt it even if it was opened O_NONBLOCK
		1088	*/
		1089	if (force_nonblock && !io_file_supports_async(req->file)) {
		1090	req->flags \|= REQ_F_MUST_PUNT;
		1091	return -EAGAIN;
		1092	}
1064		1093
1065	kiocb->ki_pos = READ_ONCE(sqe->off);	1094	kiocb->ki_pos = READ_ONCE(sqe->off);
1066	kiocb->ki_flags = iocb_flags(kiocb->ki_filp);	1095	kiocb->ki_flags = iocb_flags(kiocb->ki_filp);
@@ -1081,7 +1110,8 @@ static int io_prep_rw(struct io_kiocb req, const struct sqe_submit s, · 14 unmodified lines
1081	return ret;	1110	return ret;
1082		1111
1083	/* don't allow async punt if RWF_NOWAIT was requested */	1112	/* don't allow async punt if RWF_NOWAIT was requested */
1084	if (kiocb->ki_flags & IOCB_NOWAIT)	1113	if ((kiocb->ki_flags & IOCB_NOWAIT) \|\|
		1114	(req->file->f_flags & O_NONBLOCK))
1085	req->flags \|= REQ_F_NOWAIT;	1115	req->flags \|= REQ_F_NOWAIT;
1086		1116
1087	if (force_nonblock)	1117	if (force_nonblock)
@@ -1382,7 +1412,9 @@ static int io_read(struct io_kiocb req, const struct sqe_submit s, · 294 unmodified lines
1382	* need async punt anyway, so it's more efficient to do it	1412	* need async punt anyway, so it's more efficient to do it
1383	* here.	1413	* here.
1384	*/	1414	*/
1385	if (force_nonblock && ret2 > 0 && ret2 < read_size)	1415	if (force_nonblock && !(req->flags & REQ_F_NOWAIT) &&
		1416	(req->flags & REQ_F_ISREG) &&
		1417	ret2 > 0 && ret2 < read_size)
1386	ret2 = -EAGAIN;	1418	ret2 = -EAGAIN;
1387	/* Catch -EAGAIN return for forced non-blocking submission */	1419	/* Catch -EAGAIN return for forced non-blocking submission */
1388	if (!force_nonblock \|\| ret2 != -EAGAIN) {	1420	if (!force_nonblock \|\| ret2 != -EAGAIN) {
@@ -1447,7 +1479,7 @@ static int io_write(struct io_kiocb req, const struct sqe_submit s, · 58 unmodified lines
1447	* released so that it doesn't complain about the held lock when	1479	* released so that it doesn't complain about the held lock when
1448	* we return to userspace.	1480	* we return to userspace.
1449	*/	1481	*/
1450	if (S_ISREG(file_inode(file)->i_mode)) {	1482	if (req->flags & REQ_F_ISREG) {
1451	__sb_start_write(file_inode(file)->i_sb,	1483	__sb_start_write(file_inode(file)->i_sb,
1452	SB_FREEZE_WRITE, true);	1484	SB_FREEZE_WRITE, true);
1453	__sb_writers_release(file_inode(file)->i_sb,	1485	__sb_writers_release(file_inode(file)->i_sb,
@@ -1862,7 +1894,7 @@ static int io_poll_add(struct io_kiocb req, const struct io_uring_sqe sqe) · 408 unmodified lines
1862	static enum hrtimer_restart io_timeout_fn(struct hrtimer *timer)	1894	static enum hrtimer_restart io_timeout_fn(struct hrtimer *timer)
1863	{	1895	{
1864	struct io_ring_ctx *ctx;	1896	struct io_ring_ctx *ctx;
1865	struct io_kiocb *req;	1897	struct io_kiocb req, prev;
1866	unsigned long flags;	1898	unsigned long flags;
1867		1899
1868	req = container_of(timer, struct io_kiocb, timeout.timer);	1900	req = container_of(timer, struct io_kiocb, timeout.timer);
@@ -1870,6 +1902,15 @@ static enum hrtimer_restart io_timeout_fn(struct hrtimer *timer) · 1 unmodified line
1870	atomic_inc(&ctx->cq_timeouts);	1902	atomic_inc(&ctx->cq_timeouts);
1871		1903
1872	spin_lock_irqsave(&ctx->completion_lock, flags);	1904	spin_lock_irqsave(&ctx->completion_lock, flags);
		1905	/*
		1906	* Adjust the reqs sequence before the current one because it
		1907	* will consume a slot in the cq_ring and the the cq_tail pointer
		1908	* will be increased, otherwise other timeout reqs may return in
		1909	* advance without waiting for enough wait_nr.
		1910	*/
		1911	prev = req;
		1912	list_for_each_entry_continue_reverse(prev, &ctx->timeout_list, list)
		1913	prev->sequence++;
1873	list_del(&req->list);	1914	list_del(&req->list);
1874		1915
1875	io_cqring_fill_event(ctx, req->user_data, -ETIME);	1916	io_cqring_fill_event(ctx, req->user_data, -ETIME);
@@ -1884,10 +1925,11 @@ static enum hrtimer_restart io_timeout_fn(struct hrtimer *timer) · 8 unmodified lines
1884		1925
1885	static int io_timeout(struct io_kiocb req, const struct io_uring_sqe sqe)	1926	static int io_timeout(struct io_kiocb req, const struct io_uring_sqe sqe)
1886	{	1927	{
1887	unsigned count, req_dist, tail_index;	1928	unsigned count;
1888	struct io_ring_ctx *ctx = req->ctx;	1929	struct io_ring_ctx *ctx = req->ctx;
1889	struct list_head *entry;	1930	struct list_head *entry;
1890	struct timespec64 ts;	1931	struct timespec64 ts;
		1932	unsigned span = 0;
1891		1933
1892	if (unlikely(ctx->flags & IORING_SETUP_IOPOLL))	1934	if (unlikely(ctx->flags & IORING_SETUP_IOPOLL))
1893	return -EINVAL;	1935	return -EINVAL;
@@ -1907,23 +1949,46 @@ static int io_timeout(struct io_kiocb req, const struct io_uring_sqe sqe) · 13 unmodified lines
1907	count = 1;	1949	count = 1;
1908		1950
1909	req->sequence = ctx->cached_sq_head + count - 1;	1951	req->sequence = ctx->cached_sq_head + count - 1;
		1952	/* reuse it to store the count */
		1953	req->submit.sequence = count;
1910	req->flags \|= REQ_F_TIMEOUT;	1954	req->flags \|= REQ_F_TIMEOUT;
1911		1955
1912	/*	1956	/*
1913	* Insertion sort, ensuring the first entry in the list is always	1957	* Insertion sort, ensuring the first entry in the list is always
1914	* the one we need first.	1958	* the one we need first.
1915	*/	1959	*/
1916	tail_index = ctx->cached_cq_tail - ctx->rings->sq_dropped;
1917	req_dist = req->sequence - tail_index;
1918	spin_lock_irq(&ctx->completion_lock);	1960	spin_lock_irq(&ctx->completion_lock);
1919	list_for_each_prev(entry, &ctx->timeout_list) {	1961	list_for_each_prev(entry, &ctx->timeout_list) {
1920	struct io_kiocb *nxt = list_entry(entry, struct io_kiocb, list);	1962	struct io_kiocb *nxt = list_entry(entry, struct io_kiocb, list);
1921	unsigned dist;	1963	unsigned nxt_sq_head;
		1964	long long tmp, tmp_nxt;
		1965
		1966	/*
		1967	* Since cached_sq_head + count - 1 can overflow, use type long
		1968	* long to store it.
		1969	*/
		1970	tmp = (long long)ctx->cached_sq_head + count - 1;
		1971	nxt_sq_head = nxt->sequence - nxt->submit.sequence + 1;
		1972	tmp_nxt = (long long)nxt_sq_head + nxt->submit.sequence - 1;
1922		1973
1923	dist = nxt->sequence - tail_index;	1974	/*
1924	if (req_dist >= dist)	1975	* cached_sq_head may overflow, and it will never overflow twice
		1976	* once there is some timeout req still be valid.
		1977	*/
		1978	if (ctx->cached_sq_head < nxt_sq_head)
		1979	tmp += UINT_MAX;
		1980
		1981	if (tmp > tmp_nxt)
1925	break;	1982	break;
		1983
		1984	/*
		1985	* Sequence of reqs after the insert one and itself should
		1986	* be adjusted because each timeout req consumes a slot.
		1987	*/
		1988	span++;
		1989	nxt->sequence++;
1926	}	1990	}
		1991	req->sequence -= span;
1927	list_add(&req->list, entry);	1992	list_add(&req->list, entry);
1928	spin_unlock_irq(&ctx->completion_lock);	1993	spin_unlock_irq(&ctx->completion_lock);
1929		1994
@@ -2262,12 +2327,18 @@ static int io_req_set_file(struct io_ring_ctx ctx, const struct sqe_submit s, · 332 unmodified lines
2262	}	2327	}
2263		2328
2264	static int __io_queue_sqe(struct io_ring_ctx ctx, struct io_kiocb req,	2329	static int __io_queue_sqe(struct io_ring_ctx ctx, struct io_kiocb req,
2265	struct sqe_submit *s, bool force_nonblock)	2330	struct sqe_submit *s)
2266	{	2331	{
2267	int ret;	2332	int ret;
2268		2333
2269	ret = __io_submit_sqe(ctx, req, s, force_nonblock);	2334	ret = __io_submit_sqe(ctx, req, s, true);
2270	if (ret == -EAGAIN && !(req->flags & REQ_F_NOWAIT)) {	2335
		2336	/*
		2337	* We async punt it if the file wasn't marked NOWAIT, or if the file
		2338	* doesn't support non-blocking read/write attempts
		2339	*/
		2340	if (ret == -EAGAIN && (!(req->flags & REQ_F_NOWAIT) \|\|
		2341	(req->flags & REQ_F_MUST_PUNT))) {
2271	struct io_uring_sqe *sqe_copy;	2342	struct io_uring_sqe *sqe_copy;
2272		2343
2273	sqe_copy = kmemdup(s->sqe, sizeof(*sqe_copy), GFP_KERNEL);	2344	sqe_copy = kmemdup(s->sqe, sizeof(*sqe_copy), GFP_KERNEL);
@@ -2307,7 +2378,7 @@ static int __io_queue_sqe(struct io_ring_ctx ctx, struct io_kiocb req, · 33 unmodified lines
2307	}	2378	}
2308		2379
2309	static int io_queue_sqe(struct io_ring_ctx ctx, struct io_kiocb req,	2380	static int io_queue_sqe(struct io_ring_ctx ctx, struct io_kiocb req,
2310	struct sqe_submit *s, bool force_nonblock)	2381	struct sqe_submit *s)
2311	{	2382	{
2312	int ret;	2383	int ret;
2313		2384
@@ -2320,18 +2391,17 @@ static int io_queue_sqe(struct io_ring_ctx ctx, struct io_kiocb req, · 6 unmodified lines
2320	return 0;	2391	return 0;
2321	}	2392	}
2322		2393
2323	return __io_queue_sqe(ctx, req, s, force_nonblock);	2394	return __io_queue_sqe(ctx, req, s);
2324	}	2395	}
2325		2396
2326	static int io_queue_link_head(struct io_ring_ctx ctx, struct io_kiocb req,	2397	static int io_queue_link_head(struct io_ring_ctx ctx, struct io_kiocb req,
2327	struct sqe_submit s, struct io_kiocb shadow,	2398	struct sqe_submit s, struct io_kiocb shadow)
2328	bool force_nonblock)
2329	{	2399	{
2330	int ret;	2400	int ret;
2331	int need_submit = false;	2401	int need_submit = false;
2332		2402
2333	if (!shadow)	2403	if (!shadow)
2334	return io_queue_sqe(ctx, req, s, force_nonblock);	2404	return io_queue_sqe(ctx, req, s);
2335		2405
2336	/*	2406	/*
2337	* Mark the first IO in link list as DRAIN, let all the following	2407	* Mark the first IO in link list as DRAIN, let all the following
@@ -2360,7 +2430,7 @@ static int io_queue_link_head(struct io_ring_ctx ctx, struct io_kiocb req, · 22 unmodified lines
2360	spin_unlock_irq(&ctx->completion_lock);	2430	spin_unlock_irq(&ctx->completion_lock);
2361		2431
2362	if (need_submit)	2432	if (need_submit)
2363	return __io_queue_sqe(ctx, req, s, force_nonblock);	2433	return __io_queue_sqe(ctx, req, s);
2364		2434
2365	return 0;	2435	return 0;
2366	}	2436	}
@@ -2368,8 +2438,7 @@ static int io_queue_link_head(struct io_ring_ctx ctx, struct io_kiocb req, · 1 unmodified line
2368	#define SQE_VALID_FLAGS (IOSQE_FIXED_FILE\|IOSQE_IO_DRAIN\|IOSQE_IO_LINK)	2438	#define SQE_VALID_FLAGS (IOSQE_FIXED_FILE\|IOSQE_IO_DRAIN\|IOSQE_IO_LINK)
2369		2439
2370	static void io_submit_sqe(struct io_ring_ctx ctx, struct sqe_submit s,	2440	static void io_submit_sqe(struct io_ring_ctx ctx, struct sqe_submit s,
2371	struct io_submit_state state, struct io_kiocb *link,	2441	struct io_submit_state state, struct io_kiocb *link)
2372	bool force_nonblock)
2373	{	2442	{
2374	struct io_uring_sqe *sqe_copy;	2443	struct io_uring_sqe *sqe_copy;
2375	struct io_kiocb *req;	2444	struct io_kiocb *req;
@@ -2396,6 +2465,8 @@ err: · 20 unmodified lines
2396	return;	2465	return;
2397	}	2466	}
2398		2467
		2468	req->user_data = s->sqe->user_data;
		2469
2399	/*	2470	/*
2400	* If we already have a head request, queue this one for async	2471	* If we already have a head request, queue this one for async
2401	* submittal once the head completes. If we don't have a head but	2472	* submittal once the head completes. If we don't have a head but
@@ -2422,7 +2493,7 @@ err: · 20 unmodified lines
2422	INIT_LIST_HEAD(&req->link_list);	2493	INIT_LIST_HEAD(&req->link_list);
2423	*link = req;	2494	*link = req;
2424	} else {	2495	} else {
2425	io_queue_sqe(ctx, req, s, force_nonblock);	2496	io_queue_sqe(ctx, req, s);
2426	}	2497	}
2427	}	2498	}
2428		2499
@@ -2502,12 +2573,13 @@ static bool io_get_sqring(struct io_ring_ctx ctx, struct sqe_submit s) · 73 unmodified lines
2502		2573
2503	/* drop invalid entries */	2574	/* drop invalid entries */
2504	ctx->cached_sq_head++;	2575	ctx->cached_sq_head++;
2505	rings->sq_dropped++;	2576	ctx->cached_sq_dropped++;
		2577	WRITE_ONCE(rings->sq_dropped, ctx->cached_sq_dropped);
2506	return false;	2578	return false;
2507	}	2579	}
2508		2580
2509	static int io_submit_sqes(struct io_ring_ctx ctx, struct sqe_submit sqes,	2581	static int io_submit_sqes(struct io_ring_ctx *ctx, unsigned int nr,
2510	unsigned int nr, bool has_user, bool mm_fault)	2582	bool has_user, bool mm_fault)
2511	{	2583	{
2512	struct io_submit_state state, *statep = NULL;	2584	struct io_submit_state state, *statep = NULL;
2513	struct io_kiocb *link = NULL;	2585	struct io_kiocb *link = NULL;
@@ -2521,19 +2593,23 @@ static int io_submit_sqes(struct io_ring_ctx ctx, struct sqe_submit sqes, · 7 unmodified lines
2521	}	2593	}
2522		2594
2523	for (i = 0; i < nr; i++) {	2595	for (i = 0; i < nr; i++) {
		2596	struct sqe_submit s;
		2597
		2598	if (!io_get_sqring(ctx, &s))
		2599	break;
		2600
2524	/*	2601	/*
2525	* If previous wasn't linked and we have a linked command,	2602	* If previous wasn't linked and we have a linked command,
2526	* that's the end of the chain. Submit the previous link.	2603	* that's the end of the chain. Submit the previous link.
2527	*/	2604	*/
2528	if (!prev_was_link && link) {	2605	if (!prev_was_link && link) {
2529	io_queue_link_head(ctx, link, &link->submit, shadow_req,	2606	io_queue_link_head(ctx, link, &link->submit, shadow_req);
2530	true);
2531	link = NULL;	2607	link = NULL;
2532	shadow_req = NULL;	2608	shadow_req = NULL;
2533	}	2609	}
2534	prev_was_link = (sqes[i].sqe->flags & IOSQE_IO_LINK) != 0;	2610	prev_was_link = (s.sqe->flags & IOSQE_IO_LINK) != 0;
2535		2611
2536	if (link && (sqes[i].sqe->flags & IOSQE_IO_DRAIN)) {	2612	if (link && (s.sqe->flags & IOSQE_IO_DRAIN)) {
2537	if (!shadow_req) {	2613	if (!shadow_req) {
2538	shadow_req = io_get_req(ctx, NULL);	2614	shadow_req = io_get_req(ctx, NULL);
2539	if (unlikely(!shadow_req))	2615	if (unlikely(!shadow_req))
@@ -2541,24 +2617,24 @@ static int io_submit_sqes(struct io_ring_ctx ctx, struct sqe_submit sqes, · 1 unmodified line
2541	shadow_req->flags \|= (REQ_F_IO_DRAIN \| REQ_F_SHADOW_DRAIN);	2617	shadow_req->flags \|= (REQ_F_IO_DRAIN \| REQ_F_SHADOW_DRAIN);
2542	refcount_dec(&shadow_req->refs);	2618	refcount_dec(&shadow_req->refs);
2543	}	2619	}
2544	shadow_req->sequence = sqes[i].sequence;	2620	shadow_req->sequence = s.sequence;
2545	}	2621	}
2546		2622
2547	out:	2623	out:
2548	if (unlikely(mm_fault)) {	2624	if (unlikely(mm_fault)) {
2549	io_cqring_add_event(ctx, sqes[i].sqe->user_data,	2625	io_cqring_add_event(ctx, s.sqe->user_data,
2550	-EFAULT);	2626	-EFAULT);
2551	} else {	2627	} else {
2552	sqes[i].has_user = has_user;	2628	s.has_user = has_user;
2553	sqes[i].needs_lock = true;	2629	s.needs_lock = true;
2554	sqes[i].needs_fixed_file = true;	2630	s.needs_fixed_file = true;
2555	io_submit_sqe(ctx, &sqes[i], statep, &link, true);	2631	io_submit_sqe(ctx, &s, statep, &link);
2556	submitted++;	2632	submitted++;
2557	}	2633	}
2558	}	2634	}
2559		2635
2560	if (link)	2636	if (link)
2561	io_queue_link_head(ctx, link, &link->submit, shadow_req, true);	2637	io_queue_link_head(ctx, link, &link->submit, shadow_req);
2562	if (statep)	2638	if (statep)
2563	io_submit_state_end(&state);	2639	io_submit_state_end(&state);
2564		2640
@@ -2567,7 +2643,6 @@ out: · 2 unmodified lines
2567		2643
2568	static int io_sq_thread(void *data)	2644	static int io_sq_thread(void *data)
2569	{	2645	{
2570	struct sqe_submit sqes[IO_IOPOLL_BATCH];
2571	struct io_ring_ctx *ctx = data;	2646	struct io_ring_ctx *ctx = data;
2572	struct mm_struct *cur_mm = NULL;	2647	struct mm_struct *cur_mm = NULL;
2573	mm_segment_t old_fs;	2648	mm_segment_t old_fs;
@@ -2582,14 +2657,27 @@ static int io_sq_thread(void *data) · 8 unmodified lines
2582		2657
2583	timeout = inflight = 0;	2658	timeout = inflight = 0;
2584	while (!kthread_should_park()) {	2659	while (!kthread_should_park()) {
2585	bool all_fixed, mm_fault = false;	2660	bool mm_fault = false;
2586	int i;	2661	unsigned int to_submit;
2587		2662
2588	if (inflight) {	2663	if (inflight) {
2589	unsigned nr_events = 0;	2664	unsigned nr_events = 0;
2590		2665
2591	if (ctx->flags & IORING_SETUP_IOPOLL) {	2666	if (ctx->flags & IORING_SETUP_IOPOLL) {
2592	io_iopoll_check(ctx, &nr_events, 0);	2667	/*
		2668	* inflight is the count of the maximum possible
		2669	* entries we submitted, but it can be smaller
		2670	* if we dropped some of them. If we don't have
		2671	* poll entries available, then we know that we
		2672	* have nothing left to poll for. Reset the
		2673	* inflight count to zero in that case.
		2674	*/
		2675	mutex_lock(&ctx->uring_lock);
		2676	if (!list_empty(&ctx->poll_list))
		2677	__io_iopoll_check(ctx, &nr_events, 0);
		2678	else
		2679	inflight = 0;
		2680	mutex_unlock(&ctx->uring_lock);
2593	} else {	2681	} else {
2594	/*	2682	/*
2595	* Normal IO, just pretend everything completed.	2683	* Normal IO, just pretend everything completed.
@@ -2603,7 +2691,8 @@ static int io_sq_thread(void *data) · 7 unmodified lines
2603	timeout = jiffies + ctx->sq_thread_idle;	2691	timeout = jiffies + ctx->sq_thread_idle;
2604	}	2692	}
2605		2693
2606	if (!io_get_sqring(ctx, &sqes[0])) {	2694	to_submit = io_sqring_entries(ctx);
		2695	if (!to_submit) {
2607	/*	2696	/*
2608	* We're polling. If we're within the defined idle	2697	* We're polling. If we're within the defined idle
2609	* period, then let us spin without work before going	2698	* period, then let us spin without work before going
@@ -2634,7 +2723,8 @@ static int io_sq_thread(void *data) · 24 unmodified lines
2634	/* make sure to read SQ tail after writing flags */	2723	/* make sure to read SQ tail after writing flags */
2635	smp_mb();	2724	smp_mb();
2636		2725
2637	if (!io_get_sqring(ctx, &sqes[0])) {	2726	to_submit = io_sqring_entries(ctx);
		2727	if (!to_submit) {
2638	if (kthread_should_park()) {	2728	if (kthread_should_park()) {
2639	finish_wait(&ctx->sqo_wait, &wait);	2729	finish_wait(&ctx->sqo_wait, &wait);
2640	break;	2730	break;
@@ -2652,19 +2742,8 @@ static int io_sq_thread(void *data) · 11 unmodified lines
2652	ctx->rings->sq_flags &= ~IORING_SQ_NEED_WAKEUP;	2742	ctx->rings->sq_flags &= ~IORING_SQ_NEED_WAKEUP;
2653	}	2743	}
2654		2744
2655	i = 0;
2656	all_fixed = true;
2657	do {
2658	if (all_fixed && io_sqe_needs_user(sqes[i].sqe))
2659	all_fixed = false;
2660
2661	i++;
2662	if (i == ARRAY_SIZE(sqes))
2663	break;
2664	} while (io_get_sqring(ctx, &sqes[i]));
2665
2666	/* Unless all new commands are FIXED regions, grab mm */	2745	/* Unless all new commands are FIXED regions, grab mm */
2667	if (!all_fixed && !cur_mm) {	2746	if (!cur_mm) {
2668	mm_fault = !mmget_not_zero(ctx->sqo_mm);	2747	mm_fault = !mmget_not_zero(ctx->sqo_mm);
2669	if (!mm_fault) {	2748	if (!mm_fault) {
2670	use_mm(ctx->sqo_mm);	2749	use_mm(ctx->sqo_mm);
@@ -2672,8 +2751,9 @@ static int io_sq_thread(void *data) · 1 unmodified line
2672	}	2751	}
2673	}	2752	}
2674		2753
2675	inflight += io_submit_sqes(ctx, sqes, i, cur_mm != NULL,	2754	to_submit = min(to_submit, ctx->sq_entries);
2676	mm_fault);	2755	inflight += io_submit_sqes(ctx, to_submit, cur_mm != NULL,
		2756	mm_fault);
2677		2757
2678	/* Commit SQ ring head once we've consumed all SQEs */	2758	/* Commit SQ ring head once we've consumed all SQEs */
2679	io_commit_sqring(ctx);	2759	io_commit_sqring(ctx);
@@ -2690,8 +2770,7 @@ static int io_sq_thread(void *data) · 10 unmodified lines
2690	return 0;	2770	return 0;
2691	}	2771	}
2692		2772
2693	static int io_ring_submit(struct io_ring_ctx *ctx, unsigned int to_submit,	2773	static int io_ring_submit(struct io_ring_ctx *ctx, unsigned int to_submit)
2694	bool block_for_last)
2695	{	2774	{
2696	struct io_submit_state state, *statep = NULL;	2775	struct io_submit_state state, *statep = NULL;
2697	struct io_kiocb *link = NULL;	2776	struct io_kiocb *link = NULL;
@@ -2705,7 +2784,6 @@ static int io_ring_submit(struct io_ring_ctx *ctx, unsigned int to_submit, · 7 unmodified lines
2705	}	2784	}
2706		2785
2707	for (i = 0; i < to_submit; i++) {	2786	for (i = 0; i < to_submit; i++) {
2708	bool force_nonblock = true;
2709	struct sqe_submit s;	2787	struct sqe_submit s;
2710		2788
2711	if (!io_get_sqring(ctx, &s))	2789	if (!io_get_sqring(ctx, &s))
@@ -2716,8 +2794,7 @@ static int io_ring_submit(struct io_ring_ctx *ctx, unsigned int to_submit, · 4 unmodified lines
2716	* that's the end of the chain. Submit the previous link.	2794	* that's the end of the chain. Submit the previous link.
2717	*/	2795	*/
2718	if (!prev_was_link && link) {	2796	if (!prev_was_link && link) {
2719	io_queue_link_head(ctx, link, &link->submit, shadow_req,	2797	io_queue_link_head(ctx, link, &link->submit, shadow_req);
2720	force_nonblock);
2721	link = NULL;	2798	link = NULL;
2722	shadow_req = NULL;	2799	shadow_req = NULL;
2723	}	2800	}
@@ -2739,27 +2816,16 @@ out: · 15 unmodified lines
2739	s.needs_lock = false;	2816	s.needs_lock = false;
2740	s.needs_fixed_file = false;	2817	s.needs_fixed_file = false;
2741	submit++;	2818	submit++;
2742		2819	io_submit_sqe(ctx, &s, statep, &link);
2743	/*
2744	* The caller will block for events after submit, submit the
2745	* last IO non-blocking. This is either the only IO it's
2746	* submitting, or it already submitted the previous ones. This
2747	* improves performance by avoiding an async punt that we don't
2748	* need to do.
2749	*/
2750	if (block_for_last && submit == to_submit)
2751	force_nonblock = false;
2752
2753	io_submit_sqe(ctx, &s, statep, &link, force_nonblock);
2754	}	2820	}
2755	io_commit_sqring(ctx);
2756		2821
2757	if (link)	2822	if (link)
2758	io_queue_link_head(ctx, link, &link->submit, shadow_req,	2823	io_queue_link_head(ctx, link, &link->submit, shadow_req);
2759	!block_for_last);
2760	if (statep)	2824	if (statep)
2761	io_submit_state_end(statep);	2825	io_submit_state_end(statep);
2762		2826
		2827	io_commit_sqring(ctx);
		2828
2763	return submit;	2829	return submit;
2764	}	2830	}
2765		2831
@@ -3600,21 +3666,10 @@ SYSCALL_DEFINE6(io_uring_enter, unsigned int, fd, u32, to_submit, · 834 unmodified lines
3600	wake_up(&ctx->sqo_wait);	3666	wake_up(&ctx->sqo_wait);
3601	submitted = to_submit;	3667	submitted = to_submit;
3602	} else if (to_submit) {	3668	} else if (to_submit) {
3603	bool block_for_last = false;
3604
3605	to_submit = min(to_submit, ctx->sq_entries);	3669	to_submit = min(to_submit, ctx->sq_entries);
3606		3670
3607	/*
3608	* Allow last submission to block in a series, IFF the caller
3609	* asked to wait for events and we don't currently have
3610	* enough. This potentially avoids an async punt.
3611	*/
3612	if (to_submit == min_complete &&
3613	io_cqring_events(ctx->rings) < min_complete)
3614	block_for_last = true;
3615
3616	mutex_lock(&ctx->uring_lock);	3671	mutex_lock(&ctx->uring_lock);
3617	submitted = io_ring_submit(ctx, to_submit, block_for_last);	3672	submitted = io_ring_submit(ctx, to_submit);
3618	mutex_unlock(&ctx->uring_lock);	3673	mutex_unlock(&ctx->uring_lock);
3619	}	3674	}
3620	if (flags & IORING_ENTER_GETEVENTS) {	3675	if (flags & IORING_ENTER_GETEVENTS) {

fs/libfs.c+1−2

@@ -473,8 +473,7 @@ EXPORT_SYMBOL(simple_write_begin); · 472 unmodified lines
473		473
474	/**	474	/**
475	* simple_write_end - .write_end helper for non-block-device FSes	475	* simple_write_end - .write_end helper for non-block-device FSes
476	* @available: See .write_end of address_space_operations	476	* @file: See .write_end of address_space_operations
477	* @file: "
478	* @mapping: "	477	* @mapping: "
479	* @pos: "	478	* @pos: "
480	* @len: "	479	* @len: "

fs/ocfs2/file.c+2−0

 			transfer_to[USRQUOTA] = dqget(sb, make_kqid_uid(attr->ia_uid));
 			if (IS_ERR(transfer_to[USRQUOTA])) {
 				status = PTR_ERR(transfer_to[USRQUOTA]);
+				transfer_to[USRQUOTA] = NULL;
 				goto bail_unlock;
 			}
 		}
 			transfer_to[GRPQUOTA] = dqget(sb, make_kqid_gid(attr->ia_gid));
 			if (IS_ERR(transfer_to[GRPQUOTA])) {
 				status = PTR_ERR(transfer_to[GRPQUOTA]);
+				transfer_to[GRPQUOTA] = NULL;
 				goto bail_unlock;
 			}
 		}

fs/ocfs2/journal.c+2−1

@@ -217,7 +217,8 @@ void ocfs2_recovery_exit(struct ocfs2_super *osb) · 216 unmodified lines
217	/* At this point, we know that no more recovery threads can be	217	/* At this point, we know that no more recovery threads can be
218	* launched, so wait for any recovery completion work to	218	* launched, so wait for any recovery completion work to
219	* complete. */	219	* complete. */
220	flush_workqueue(osb->ocfs2_wq);	220	if (osb->ocfs2_wq)
		221	flush_workqueue(osb->ocfs2_wq);
221		222
222	/*	223	/*
223	* Now that recovery is shut down, and the osb is about to be	224	* Now that recovery is shut down, and the osb is about to be

fs/ocfs2/localalloc.c+2−1

@@ -377,7 +377,8 @@ void ocfs2_shutdown_local_alloc(struct ocfs2_super *osb) · 376 unmodified lines
377	struct ocfs2_dinode *alloc = NULL;	377	struct ocfs2_dinode *alloc = NULL;
378		378
379	cancel_delayed_work(&osb->la_enable_wq);	379	cancel_delayed_work(&osb->la_enable_wq);
380	flush_workqueue(osb->ocfs2_wq);	380	if (osb->ocfs2_wq)
		381	flush_workqueue(osb->ocfs2_wq);
381		382
382	if (osb->local_alloc_state == OCFS2_LA_UNUSED)	383	if (osb->local_alloc_state == OCFS2_LA_UNUSED)
383	goto out;	384	goto out;

fs/proc/meminfo.c+2−2

@@ -132,9 +132,9 @@ static int meminfo_proc_show(struct seq_file m, void v) · 131 unmodified lines
132	global_node_page_state(NR_SHMEM_THPS) * HPAGE_PMD_NR);	132	global_node_page_state(NR_SHMEM_THPS) * HPAGE_PMD_NR);
133	show_val_kb(m, "ShmemPmdMapped: ",	133	show_val_kb(m, "ShmemPmdMapped: ",
134	global_node_page_state(NR_SHMEM_PMDMAPPED) * HPAGE_PMD_NR);	134	global_node_page_state(NR_SHMEM_PMDMAPPED) * HPAGE_PMD_NR);
135	show_val_kb(m, "FileHugePages: ",	135	show_val_kb(m, "FileHugePages: ",
136	global_node_page_state(NR_FILE_THPS) * HPAGE_PMD_NR);	136	global_node_page_state(NR_FILE_THPS) * HPAGE_PMD_NR);
137	show_val_kb(m, "FilePmdMapped: ",	137	show_val_kb(m, "FilePmdMapped: ",
138	global_node_page_state(NR_FILE_PMDMAPPED) * HPAGE_PMD_NR);	138	global_node_page_state(NR_FILE_PMDMAPPED) * HPAGE_PMD_NR);
139	#endif	139	#endif
140		140

fs/proc/page.c+16−12

@@ -42,10 +42,12 @@ static ssize_t kpagecount_read(struct file file, char __user buf, · 41 unmodified lines
42	return -EINVAL;	42	return -EINVAL;
43		43
44	while (count > 0) {	44	while (count > 0) {
45	if (pfn_valid(pfn))	45	/*
46	ppage = pfn_to_page(pfn);	46	* TODO: ZONE_DEVICE support requires to identify
47	else	47	* memmaps that were actually initialized.
48	ppage = NULL;	48	*/
		49	ppage = pfn_to_online_page(pfn);
		50
49	if (!ppage \|\| PageSlab(ppage) \|\| page_has_type(ppage))	51	if (!ppage \|\| PageSlab(ppage) \|\| page_has_type(ppage))
50	pcount = 0;	52	pcount = 0;
51	else	53	else
@@ -216,10 +218,11 @@ static ssize_t kpageflags_read(struct file file, char __user buf, · 164 unmodified lines
216	return -EINVAL;	218	return -EINVAL;
217		219
218	while (count > 0) {	220	while (count > 0) {
219	if (pfn_valid(pfn))	221	/*
220	ppage = pfn_to_page(pfn);	222	* TODO: ZONE_DEVICE support requires to identify
221	else	223	* memmaps that were actually initialized.
222	ppage = NULL;	224	*/
		225	ppage = pfn_to_online_page(pfn);
223		226
224	if (put_user(stable_page_flags(ppage), out)) {	227	if (put_user(stable_page_flags(ppage), out)) {
225	ret = -EFAULT;	228	ret = -EFAULT;
@@ -261,10 +264,11 @@ static ssize_t kpagecgroup_read(struct file file, char __user buf, · 35 unmodified lines
261	return -EINVAL;	264	return -EINVAL;
262		265
263	while (count > 0) {	266	while (count > 0) {
264	if (pfn_valid(pfn))	267	/*
265	ppage = pfn_to_page(pfn);	268	* TODO: ZONE_DEVICE support requires to identify
266	else	269	* memmaps that were actually initialized.
267	ppage = NULL;	270	*/
		271	ppage = pfn_to_online_page(pfn);
268		272
269	if (ppage)	273	if (ppage)
270	ino = page_cgroup_ino(ppage);	274	ino = page_cgroup_ino(ppage);

fs/readdir.c+2−2

@@ -105,9 +105,9 @@ EXPORT_SYMBOL(iterate_dir); · 104 unmodified lines
105	*/	105	*/
106	static int verify_dirent_name(const char *name, int len)	106	static int verify_dirent_name(const char *name, int len)
107	{	107	{
108	if (WARN_ON_ONCE(!len))	108	if (!len)
109	return -EIO;	109	return -EIO;
110	if (WARN_ON_ONCE(memchr(name, '/', len)))	110	if (memchr(name, '/', len))
111	return -EIO;	111	return -EIO;
112	return 0;	112	return 0;
113	}	113	}

fs/xfs/libxfs/xfs_fs.h+4−4

@@ -366,11 +366,11 @@ struct xfs_bulkstat { · 365 unmodified lines
366	uint64_t bs_blocks; /* number of blocks */	366	uint64_t bs_blocks; /* number of blocks */
367	uint64_t bs_xflags; /* extended flags */	367	uint64_t bs_xflags; /* extended flags */
368		368
369	uint64_t bs_atime; /* access time, seconds */	369	int64_t bs_atime; /* access time, seconds */
370	uint64_t bs_mtime; /* modify time, seconds */	370	int64_t bs_mtime; /* modify time, seconds */
371		371
372	uint64_t bs_ctime; /* inode change time, seconds */	372	int64_t bs_ctime; /* inode change time, seconds */
373	uint64_t bs_btime; /* creation time, seconds */	373	int64_t bs_btime; /* creation time, seconds */
374		374
375	uint32_t bs_gen; /* generation count */	375	uint32_t bs_gen; /* generation count */
376	uint32_t bs_uid; /* user id */	376	uint32_t bs_uid; /* user id */

include/acpi/processor.h+10−10

@@ -232,8 +232,8 @@ struct acpi_processor { · 231 unmodified lines
232	struct acpi_processor_limit limit;	232	struct acpi_processor_limit limit;
233	struct thermal_cooling_device *cdev;	233	struct thermal_cooling_device *cdev;
234	struct device dev; / Processor device. */	234	struct device dev; / Processor device. */
235	struct dev_pm_qos_request perflib_req;	235	struct freq_qos_request perflib_req;
236	struct dev_pm_qos_request thermal_req;	236	struct freq_qos_request thermal_req;
237	};	237	};
238		238
239	struct acpi_processor_errata {	239	struct acpi_processor_errata {
@@ -302,8 +302,8 @@ static inline void acpi_processor_ffh_cstate_enter(struct acpi_processor_cx · 62 unmodified lines
302	#ifdef CONFIG_CPU_FREQ	302	#ifdef CONFIG_CPU_FREQ
303	extern bool acpi_processor_cpufreq_init;	303	extern bool acpi_processor_cpufreq_init;
304	void acpi_processor_ignore_ppc_init(void);	304	void acpi_processor_ignore_ppc_init(void);
305	void acpi_processor_ppc_init(int cpu);	305	void acpi_processor_ppc_init(struct cpufreq_policy *policy);
306	void acpi_processor_ppc_exit(int cpu);	306	void acpi_processor_ppc_exit(struct cpufreq_policy *policy);
307	void acpi_processor_ppc_has_changed(struct acpi_processor *pr, int event_flag);	307	void acpi_processor_ppc_has_changed(struct acpi_processor *pr, int event_flag);
308	extern int acpi_processor_get_bios_limit(int cpu, unsigned int *limit);	308	extern int acpi_processor_get_bios_limit(int cpu, unsigned int *limit);
309	#else	309	#else
@@ -311,11 +311,11 @@ static inline void acpi_processor_ignore_ppc_init(void) · 1 unmodified line
311	{	311	{
312	return;	312	return;
313	}	313	}
314	static inline void acpi_processor_ppc_init(int cpu)	314	static inline void acpi_processor_ppc_init(struct cpufreq_policy *policy)
315	{	315	{
316	return;	316	return;
317	}	317	}
318	static inline void acpi_processor_ppc_exit(int cpu)	318	static inline void acpi_processor_ppc_exit(struct cpufreq_policy *policy)
319	{	319	{
320	return;	320	return;
321	}	321	}
@@ -431,14 +431,14 @@ static inline int acpi_processor_hotplug(struct acpi_processor *pr) · 109 unmodified lines
431	int acpi_processor_get_limit_info(struct acpi_processor *pr);	431	int acpi_processor_get_limit_info(struct acpi_processor *pr);
432	extern const struct thermal_cooling_device_ops processor_cooling_ops;	432	extern const struct thermal_cooling_device_ops processor_cooling_ops;
433	#if defined(CONFIG_ACPI_CPU_FREQ_PSS) & defined(CONFIG_CPU_FREQ)	433	#if defined(CONFIG_ACPI_CPU_FREQ_PSS) & defined(CONFIG_CPU_FREQ)
434	void acpi_thermal_cpufreq_init(int cpu);	434	void acpi_thermal_cpufreq_init(struct cpufreq_policy *policy);
435	void acpi_thermal_cpufreq_exit(int cpu);	435	void acpi_thermal_cpufreq_exit(struct cpufreq_policy *policy);
436	#else	436	#else
437	static inline void acpi_thermal_cpufreq_init(int cpu)	437	static inline void acpi_thermal_cpufreq_init(struct cpufreq_policy *policy)
438	{	438	{
439	return;	439	return;
440	}	440	}
441	static inline void acpi_thermal_cpufreq_exit(int cpu)	441	static inline void acpi_thermal_cpufreq_exit(struct cpufreq_policy *policy)
442	{	442	{
443	return;	443	return;
444	}	444	}

include/linux/bitmap.h+2−1

 }
 /**
- * bitmap_or_equal - Check whether the or of two bitnaps is equal to a third
+ * bitmap_or_equal - Check whether the or of two bitmaps is equal to a third
  * @src1:	Pointer to bitmap 1
  * @src2:	Pointer to bitmap 2 will be or'ed with bitmap 1
  * @src3:	Pointer to bitmap 3. Compare to the result of *@src1 | *@src2
+ * @nbits:	number of bits in each of these bitmaps
  *
  * Returns: True if (*@src1 | *@src2) == *@src3, false otherwise
  */

include/linux/cpufreq.h+5−2

 #include <linux/completion.h>
 #include <linux/kobject.h>
 #include <linux/notifier.h>
+#include <linux/pm_qos.h>
 #include <linux/spinlock.h>
 #include <linux/sysfs.h>
 	struct work_struct	update; /* if update_policy() needs to be
 					 * called, but you're in IRQ context */
-	struct dev_pm_qos_request *min_freq_req;
+	struct freq_constraints	constraints;
-	struct dev_pm_qos_request *max_freq_req;
+	struct freq_qos_request	*min_freq_req;
+	struct freq_qos_request	*max_freq_req;
 	struct cpufreq_frequency_table	*freq_table;
 	enum cpufreq_table_sorting freq_table_sorted;

include/linux/export.h+5−9

 #define THIS_MODULE ((struct module *)0)
 #endif
-#define NS_SEPARATOR "."
 #ifdef CONFIG_MODVERSIONS
 /* Mark the CRC weak since genksyms apparently decides not to
  * generate a checksums for some symbols */
  * absolute relocations that require runtime processing on relocatable
  * kernels.
  */
-#define __KSYMTAB_ENTRY_NS(sym, sec, ns)				\
+#define __KSYMTAB_ENTRY_NS(sym, sec)					\
 	__ADDRESSABLE(sym)						\
 	asm("	.section \"___ksymtab" sec "+" #sym "\", \"a\"	\n"	\
 	    "	.balign	4					\n"	\
-	    "__ksymtab_" #ns NS_SEPARATOR #sym ":		\n"	\
+	    "__ksymtab_" #sym ":				\n"	\
 	    "	.long	" #sym "- .				\n"	\
 	    "	.long	__kstrtab_" #sym "- .			\n"	\
 	    "	.long	__kstrtabns_" #sym "- .			\n"	\
 	int namespace_offset;
 };
 #else
-#define __KSYMTAB_ENTRY_NS(sym, sec, ns)				\
+#define __KSYMTAB_ENTRY_NS(sym, sec)					\
-	static const struct kernel_symbol __ksymtab_##sym##__##ns	\
+	static const struct kernel_symbol __ksymtab_##sym		\
-	asm("__ksymtab_" #ns NS_SEPARATOR #sym)				\
 	__attribute__((section("___ksymtab" sec "+" #sym), used))	\
 	__aligned(sizeof(void *))					\
 	= { (unsigned long)&sym, __kstrtab_##sym, __kstrtabns_##sym }
 #define __KSYMTAB_ENTRY(sym, sec)					\
 	static const struct kernel_symbol __ksymtab_##sym		\
-	asm("__ksymtab_" #sym)						\
 	__attribute__((section("___ksymtab" sec "+" #sym), used))	\
 	__aligned(sizeof(void *))					\
 	= { (unsigned long)&sym, __kstrtab_##sym, NULL }
 	static const char __kstrtabns_##sym[]				\
 	__attribute__((section("__ksymtab_strings"), used, aligned(1)))	\
 	= #ns;								\
-	__KSYMTAB_ENTRY_NS(sym, sec, ns)
+	__KSYMTAB_ENTRY_NS(sym, sec)
 #define ___EXPORT_SYMBOL(sym, sec)					\
 	___export_symbol_common(sym, sec);				\

include/linux/gpio/driver.h+8−0

@@ -201,6 +201,14 @@ struct gpio_irq_chip { · 200 unmodified lines
201	*/	201	*/
202	bool threaded;	202	bool threaded;
203		203
		204	/**
		205	* @init_hw: optional routine to initialize hardware before
		206	* an IRQ chip will be added. This is quite useful when
		207	* a particular driver wants to clear IRQ related registers
		208	* in order to avoid undesired events.
		209	*/
		210	int (init_hw)(struct gpio_chip chip);
		211
204	/**	212	/**
205	* @init_valid_mask: optional routine to initialize @valid_mask, to be	213	* @init_valid_mask: optional routine to initialize @valid_mask, to be
206	* used if not all GPIO lines are valid interrupts. Sometimes some	214	* used if not all GPIO lines are valid interrupts. Sometimes some

include/linux/micrel_phy.h+1−1

@@ -31,7 +31,7 @@ · 30 unmodified lines
31	#define PHY_ID_KSZ886X 0x00221430	31	#define PHY_ID_KSZ886X 0x00221430
32	#define PHY_ID_KSZ8863 0x00221435	32	#define PHY_ID_KSZ8863 0x00221435
33		33
34	#define PHY_ID_KSZ8795 0x00221550	34	#define PHY_ID_KSZ87XX 0x00221550
35		35
36	#define PHY_ID_KSZ9477 0x00221631	36	#define PHY_ID_KSZ9477 0x00221631
37		37

include/linux/page_ext.h+9−1

 enum page_ext_flags {
 	PAGE_EXT_OWNER,
-	PAGE_EXT_OWNER_ACTIVE,
+	PAGE_EXT_OWNER_ALLOCATED,
 #if defined(CONFIG_IDLE_PAGE_TRACKING) && !defined(CONFIG_64BIT)
 	PAGE_EXT_YOUNG,
 	PAGE_EXT_IDLE,
 	unsigned long flags;
 };
+extern unsigned long page_ext_size;
 extern void pgdat_page_ext_init(struct pglist_data *pgdat);
 #ifdef CONFIG_SPARSEMEM
 struct page_ext *lookup_page_ext(const struct page *page);
+static inline struct page_ext *page_ext_next(struct page_ext *curr)
+{
+	void *next = curr;
+	next += page_ext_size;
+	return next;
+}
 #else /* !CONFIG_PAGE_EXTENSION */
 struct page_ext;

include/linux/perf_event.h+1−1

@@ -293,7 +293,7 @@ struct pmu { · 292 unmodified lines
293	* -EBUSY -- @event is for this PMU but PMU temporarily unavailable	293	* -EBUSY -- @event is for this PMU but PMU temporarily unavailable
294	* -EINVAL -- @event is for this PMU but @event is not valid	294	* -EINVAL -- @event is for this PMU but @event is not valid
295	* -EOPNOTSUPP -- @event is for this PMU, @event is valid, but not supported	295	* -EOPNOTSUPP -- @event is for this PMU, @event is valid, but not supported
296	* -EACCESS -- @event is for this PMU, @event is valid, but no privilidges	296	* -EACCES -- @event is for this PMU, @event is valid, but no privileges
297	*	297	*
298	* 0 -- @event is for this PMU and valid	298	* 0 -- @event is for this PMU and valid
299	*	299	*

include/linux/pm_qos.h+44−12

 #define PM_QOS_RESUME_LATENCY_NO_CONSTRAINT	PM_QOS_LATENCY_ANY
 #define PM_QOS_RESUME_LATENCY_NO_CONSTRAINT_NS	PM_QOS_LATENCY_ANY_NS
 #define PM_QOS_LATENCY_TOLERANCE_DEFAULT_VALUE	0
-#define PM_QOS_MIN_FREQUENCY_DEFAULT_VALUE	0
-#define PM_QOS_MAX_FREQUENCY_DEFAULT_VALUE	(-1)
 #define PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT	(-1)
 #define PM_QOS_FLAG_NO_POWER_OFF	(1 << 0)
 enum dev_pm_qos_req_type {
 	DEV_PM_QOS_RESUME_LATENCY = 1,
 	DEV_PM_QOS_LATENCY_TOLERANCE,
-	DEV_PM_QOS_MIN_FREQUENCY,
-	DEV_PM_QOS_MAX_FREQUENCY,
 	DEV_PM_QOS_FLAGS,
 };
 struct dev_pm_qos {
 	struct pm_qos_constraints resume_latency;
 	struct pm_qos_constraints latency_tolerance;
-	struct pm_qos_constraints min_frequency;
-	struct pm_qos_constraints max_frequency;
 	struct pm_qos_flags flags;
 	struct dev_pm_qos_request *resume_latency_req;
 	struct dev_pm_qos_request *latency_tolerance_req;
 	struct dev_pm_qos_request *flags_req;
-	struct dev_pm_qos_request *min_frequency_req;
-	struct dev_pm_qos_request *max_frequency_req;
 };
 /* Action requested to pm_qos_update_target */
 	switch (type) {
 	case DEV_PM_QOS_RESUME_LATENCY:
 		return PM_QOS_RESUME_LATENCY_NO_CONSTRAINT;
-	case DEV_PM_QOS_MIN_FREQUENCY:
-		return PM_QOS_MIN_FREQUENCY_DEFAULT_VALUE;
-	case DEV_PM_QOS_MAX_FREQUENCY:
-		return PM_QOS_MAX_FREQUENCY_DEFAULT_VALUE;
 	default:
 		WARN_ON(1);
 		return 0;
 }
 #endif
+#define FREQ_QOS_MIN_DEFAULT_VALUE	0
+#define FREQ_QOS_MAX_DEFAULT_VALUE	(-1)
+enum freq_qos_req_type {
+	FREQ_QOS_MIN = 1,
+	FREQ_QOS_MAX,
+};
+struct freq_constraints {
+	struct pm_qos_constraints min_freq;
+	struct blocking_notifier_head min_freq_notifiers;
+	struct pm_qos_constraints max_freq;
+	struct blocking_notifier_head max_freq_notifiers;
+};
+struct freq_qos_request {
+	enum freq_qos_req_type type;
+	struct plist_node pnode;
+	struct freq_constraints *qos;
+};
+static inline int freq_qos_request_active(struct freq_qos_request *req)
+{
+	return !IS_ERR_OR_NULL(req->qos);
+}
+void freq_constraints_init(struct freq_constraints *qos);
+s32 freq_qos_read_value(struct freq_constraints *qos,
+			enum freq_qos_req_type type);
+int freq_qos_add_request(struct freq_constraints *qos,
+			 struct freq_qos_request *req,
+			 enum freq_qos_req_type type, s32 value);
+int freq_qos_update_request(struct freq_qos_request *req, s32 new_value);
+int freq_qos_remove_request(struct freq_qos_request *req);
+int freq_qos_add_notifier(struct freq_constraints *qos,
+			  enum freq_qos_req_type type,
+			  struct notifier_block *notifier);
+int freq_qos_remove_notifier(struct freq_constraints *qos,
+			     enum freq_qos_req_type type,
+			     struct notifier_block *notifier);
 #endif

include/linux/sched.h+1−0

@@ -223,6 +223,7 @@ extern long schedule_timeout_uninterruptible(long timeout); · 222 unmodified lines
223	extern long schedule_timeout_idle(long timeout);	223	extern long schedule_timeout_idle(long timeout);
224	asmlinkage void schedule(void);	224	asmlinkage void schedule(void);
225	extern void schedule_preempt_disabled(void);	225	extern void schedule_preempt_disabled(void);
		226	asmlinkage void preempt_schedule_irq(void);
226		227
227	extern int __must_check io_schedule_prepare(void);	228	extern int __must_check io_schedule_prepare(void);
228	extern void io_schedule_finish(int token);	229	extern void io_schedule_finish(int token);

include/linux/skbuff.h+3−2

 int __skb_vlan_pop(struct sk_buff *skb, u16 *vlan_tci);
 int skb_vlan_pop(struct sk_buff *skb);
 int skb_vlan_push(struct sk_buff *skb, __be16 vlan_proto, u16 vlan_tci);
-int skb_mpls_push(struct sk_buff *skb, __be32 mpls_lse, __be16 mpls_proto);
+int skb_mpls_push(struct sk_buff *skb, __be32 mpls_lse, __be16 mpls_proto,
-int skb_mpls_pop(struct sk_buff *skb, __be16 next_proto);
+		  int mac_len);
+int skb_mpls_pop(struct sk_buff *skb, __be16 next_proto, int mac_len);
 int skb_mpls_update_lse(struct sk_buff *skb, __be32 mpls_lse);
 int skb_mpls_dec_ttl(struct sk_buff *skb);
 struct sk_buff *pskb_extract(struct sk_buff *skb, int off, int to_copy,

include/linux/sysfs.h+2−2

@@ -196,9 +196,9 @@ struct bin_attribute { · 195 unmodified lines
196	.size = _size, \	196	.size = _size, \
197	}	197	}
198		198
199	#define __BIN_ATTR_WO(_name) { \	199	#define __BIN_ATTR_WO(_name, _size) { \
200	.attr = { .name = __stringify(_name), .mode = 0200 }, \	200	.attr = { .name = __stringify(_name), .mode = 0200 }, \
201	.store = _name##_store, \	201	.write = _name##_write, \
202	.size = _size, \	202	.size = _size, \
203	}	203	}
204		204

include/linux/tcp.h+3−3

@@ -393,7 +393,7 @@ struct tcp_sock { · 392 unmodified lines
393	/* fastopen_rsk points to request_sock that resulted in this big	393	/* fastopen_rsk points to request_sock that resulted in this big
394	* socket. Used to retransmit SYNACKs etc.	394	* socket. Used to retransmit SYNACKs etc.
395	*/	395	*/
396	struct request_sock *fastopen_rsk;	396	struct request_sock __rcu *fastopen_rsk;
397	u32 *saved_syn;	397	u32 *saved_syn;
398	};	398	};
399		399
@@ -447,8 +447,8 @@ static inline struct tcp_timewait_sock tcp_twsk(const struct sock sk) · 47 unmodified lines
447		447
448	static inline bool tcp_passive_fastopen(const struct sock *sk)	448	static inline bool tcp_passive_fastopen(const struct sock *sk)
449	{	449	{
450	return (sk->sk_state == TCP_SYN_RECV &&	450	return sk->sk_state == TCP_SYN_RECV &&
451	tcp_sk(sk)->fastopen_rsk != NULL);	451	rcu_access_pointer(tcp_sk(sk)->fastopen_rsk) != NULL;
452	}	452	}
453		453
454	static inline void fastopen_queue_tune(struct sock *sk, int backlog)	454	static inline void fastopen_queue_tune(struct sock *sk, int backlog)

include/linux/xarray.h+2−2

@@ -230,8 +230,8 @@ static inline int xa_err(void *entry) · 229 unmodified lines
230	* This structure is used either directly or via the XA_LIMIT() macro	230	* This structure is used either directly or via the XA_LIMIT() macro
231	* to communicate the range of IDs that are valid for allocation.	231	* to communicate the range of IDs that are valid for allocation.
232	* Two common ranges are predefined for you:	232	* Two common ranges are predefined for you:
233	* * xa_limit_32b - [0 - UINT_MAX]	233	* * xa_limit_32b - [0 - UINT_MAX]
234	* * xa_limit_31b - [0 - INT_MAX]	234	* * xa_limit_31b - [0 - INT_MAX]
235	*/	235	*/
236	struct xa_limit {	236	struct xa_limit {
237	u32 max;	237	u32 max;

include/net/cfg80211.h+8−0

@@ -5549,6 +5549,14 @@ const struct ieee80211_reg_rule freq_reg_info(struct wiphy wiphy, · 5548 unmodified lines
5549	*/	5549	*/
5550	const char *reg_initiator_name(enum nl80211_reg_initiator initiator);	5550	const char *reg_initiator_name(enum nl80211_reg_initiator initiator);
5551		5551
		5552	/**
		5553	* regulatory_pre_cac_allowed - check if pre-CAC allowed in the current regdom
		5554	* @wiphy: wiphy for which pre-CAC capability is checked.
		5555	*
		5556	* Pre-CAC is allowed only in some regdomains (notable ETSI).
		5557	*/
		5558	bool regulatory_pre_cac_allowed(struct wiphy *wiphy);
		5559
5552	/**	5560	/**
5553	* DOC: Internal regulatory db functions	5561	* DOC: Internal regulatory db functions
5554	*	5562	*

include/net/llc_conn.h+1−1

@@ -104,7 +104,7 @@ void llc_sk_reset(struct sock *sk); · 103 unmodified lines
104		104
105	/* Access to a connection */	105	/* Access to a connection */
106	int llc_conn_state_process(struct sock sk, struct sk_buff skb);	106	int llc_conn_state_process(struct sock sk, struct sk_buff skb);
107	int llc_conn_send_pdu(struct sock sk, struct sk_buff skb);	107	void llc_conn_send_pdu(struct sock sk, struct sk_buff skb);
108	void llc_conn_rtn_pdu(struct sock sk, struct sk_buff skb);	108	void llc_conn_rtn_pdu(struct sock sk, struct sk_buff skb);
109	void llc_conn_resend_i_pdu_as_cmd(struct sock *sk, u8 nr, u8 first_p_bit);	109	void llc_conn_resend_i_pdu_as_cmd(struct sock *sk, u8 nr, u8 first_p_bit);
110	void llc_conn_resend_i_pdu_as_rsp(struct sock *sk, u8 nr, u8 first_f_bit);	110	void llc_conn_resend_i_pdu_as_rsp(struct sock *sk, u8 nr, u8 first_f_bit);

include/net/net_namespace.h+17−8

 #define NETDEV_HASHENTRIES (1 << NETDEV_HASHBITS)
 struct net {
+	/* First cache line can be often dirtied.
+	 * Do not place here read-mostly fields.
+	 */
 	refcount_t		passive;	/* To decide when the network
 						 * namespace should be freed.
 						 */
 						 */
 	spinlock_t		rules_mod_lock;
-	u32			hash_mix;
+	unsigned int		dev_unreg_count;
+	unsigned int		dev_base_seq;	/* protected by rtnl_mutex */
+	int			ifindex;
+	spinlock_t		nsid_lock;
+	atomic_t		fnhe_genid;
 	struct list_head	list;		/* list of network namespaces */
 	struct list_head	exit_list;	/* To linked to call pernet exit
 #endif
 	struct user_namespace   *user_ns;	/* Owning user namespace */
 	struct ucounts		*ucounts;
-	spinlock_t		nsid_lock;
 	struct idr		netns_ids;
 	struct ns_common	ns;
+	struct list_head 	dev_base_head;
 	struct proc_dir_entry 	*proc_net;
 	struct proc_dir_entry 	*proc_net_stat;
 	struct uevent_sock	*uevent_sock;		/* uevent socket */
-	struct list_head 	dev_base_head;
 	struct hlist_head 	*dev_name_head;
 	struct hlist_head	*dev_index_head;
-	unsigned int		dev_base_seq;	/* protected by rtnl_mutex */
+	/* Note that @hash_mix can be read millions times per second,
-	int			ifindex;
+	 * it is critical that it is on a read_mostly cache line.
-	unsigned int		dev_unreg_count;
+	 */
+	u32			hash_mix;
+	struct net_device       *loopback_dev;          /* The loopback */
 	/* core fib_rules */
 	struct list_head	rules_ops;
-	struct net_device       *loopback_dev;          /* The loopback */
 	struct netns_core	core;
 	struct netns_mib	mib;
 	struct netns_packet	packet;
 	struct sock		*crypto_nlsk;
 #endif
 	struct sock		*diag_nlsk;
-	atomic_t		fnhe_genid;
 } __randomize_layout;
 #include <linux/seq_file_net.h>

include/net/request_sock.h+2−2

@@ -185,7 +185,7 @@ void reqsk_fastopen_remove(struct sock sk, struct request_sock req, · 184 unmodified lines
185		185
186	static inline bool reqsk_queue_empty(const struct request_sock_queue *queue)	186	static inline bool reqsk_queue_empty(const struct request_sock_queue *queue)
187	{	187	{
188	return queue->rskq_accept_head == NULL;	188	return READ_ONCE(queue->rskq_accept_head) == NULL;
189	}	189	}
190		190
191	static inline struct request_sock reqsk_queue_remove(struct request_sock_queue queue,	191	static inline struct request_sock reqsk_queue_remove(struct request_sock_queue queue,
@@ -197,7 +197,7 @@ static inline struct request_sock *reqsk_queue_remove(struct request_sock_queue · 5 unmodified lines
197	req = queue->rskq_accept_head;	197	req = queue->rskq_accept_head;
198	if (req) {	198	if (req) {
199	sk_acceptq_removed(parent);	199	sk_acceptq_removed(parent);
200	queue->rskq_accept_head = req->dl_next;	200	WRITE_ONCE(queue->rskq_accept_head, req->dl_next);
201	if (queue->rskq_accept_head == NULL)	201	if (queue->rskq_accept_head == NULL)
202	queue->rskq_accept_tail = NULL;	202	queue->rskq_accept_tail = NULL;
203	}	203	}

include/net/sctp/sctp.h+5−0

@@ -610,4 +610,9 @@ static inline __u32 sctp_min_frag_point(struct sctp_sock *sp, __u16 datasize) · 609 unmodified lines
610	return sctp_mtu_payload(sp, SCTP_DEFAULT_MINSEGMENT, datasize);	610	return sctp_mtu_payload(sp, SCTP_DEFAULT_MINSEGMENT, datasize);
611	}	611	}
612		612
		613	static inline bool sctp_newsk_ready(const struct sock *sk)
		614	{
		615	return sock_flag(sk, SOCK_DEAD) \|\| sk->sk_socket;
		616	}
		617
613	#endif /* __net_sctp_h__ */	618	#endif /* __net_sctp_h__ */

include/net/sock.h+22−11

@@ -878,12 +878,17 @@ static inline bool sk_acceptq_is_full(const struct sock *sk) · 877 unmodified lines
878	*/	878	*/
879	static inline int sk_stream_min_wspace(const struct sock *sk)	879	static inline int sk_stream_min_wspace(const struct sock *sk)
880	{	880	{
881	return sk->sk_wmem_queued >> 1;	881	return READ_ONCE(sk->sk_wmem_queued) >> 1;
882	}	882	}
883		883
884	static inline int sk_stream_wspace(const struct sock *sk)	884	static inline int sk_stream_wspace(const struct sock *sk)
885	{	885	{
886	return sk->sk_sndbuf - sk->sk_wmem_queued;	886	return READ_ONCE(sk->sk_sndbuf) - READ_ONCE(sk->sk_wmem_queued);
		887	}
		888
		889	static inline void sk_wmem_queued_add(struct sock *sk, int val)
		890	{
		891	WRITE_ONCE(sk->sk_wmem_queued, sk->sk_wmem_queued + val);
887	}	892	}
888		893
889	void sk_stream_write_space(struct sock *sk);	894	void sk_stream_write_space(struct sock *sk);
@@ -1207,7 +1212,7 @@ static inline void sk_refcnt_debug_release(const struct sock *sk) · 317 unmodified lines
1207		1212
1208	static inline bool __sk_stream_memory_free(const struct sock *sk, int wake)	1213	static inline bool __sk_stream_memory_free(const struct sock *sk, int wake)
1209	{	1214	{
1210	if (sk->sk_wmem_queued >= sk->sk_sndbuf)	1215	if (READ_ONCE(sk->sk_wmem_queued) >= READ_ONCE(sk->sk_sndbuf))
1211	return false;	1216	return false;
1212		1217
1213	return sk->sk_prot->stream_memory_free ?	1218	return sk->sk_prot->stream_memory_free ?
@@ -1467,7 +1472,7 @@ DECLARE_STATIC_KEY_FALSE(tcp_tx_skb_cache_key); · 253 unmodified lines
1467	static inline void sk_wmem_free_skb(struct sock sk, struct sk_buff skb)	1472	static inline void sk_wmem_free_skb(struct sock sk, struct sk_buff skb)
1468	{	1473	{
1469	sock_set_flag(sk, SOCK_QUEUE_SHRUNK);	1474	sock_set_flag(sk, SOCK_QUEUE_SHRUNK);
1470	sk->sk_wmem_queued -= skb->truesize;	1475	sk_wmem_queued_add(sk, -skb->truesize);
1471	sk_mem_uncharge(sk, skb->truesize);	1476	sk_mem_uncharge(sk, skb->truesize);
1472	if (static_branch_unlikely(&tcp_tx_skb_cache_key) &&	1477	if (static_branch_unlikely(&tcp_tx_skb_cache_key) &&
1473	!sk->sk_tx_skb_cache && !skb_cloned(skb)) {	1478	!sk->sk_tx_skb_cache && !skb_cloned(skb)) {
@@ -2014,7 +2019,7 @@ static inline int skb_copy_to_page_nocache(struct sock sk, struct iov_iter fro · 540 unmodified lines
2014	skb->len += copy;	2019	skb->len += copy;
2015	skb->data_len += copy;	2020	skb->data_len += copy;
2016	skb->truesize += copy;	2021	skb->truesize += copy;
2017	sk->sk_wmem_queued += copy;	2022	sk_wmem_queued_add(sk, copy);
2018	sk_mem_charge(sk, copy);	2023	sk_mem_charge(sk, copy);
2019	return 0;	2024	return 0;
2020	}	2025	}
@@ -2220,10 +2225,14 @@ static inline void sk_wake_async(const struct sock *sk, int how, int band) · 199 unmodified lines
2220		2225
2221	static inline void sk_stream_moderate_sndbuf(struct sock *sk)	2226	static inline void sk_stream_moderate_sndbuf(struct sock *sk)
2222	{	2227	{
2223	if (!(sk->sk_userlocks & SOCK_SNDBUF_LOCK)) {	2228	u32 val;
2224	sk->sk_sndbuf = min(sk->sk_sndbuf, sk->sk_wmem_queued >> 1);	2229
2225	sk->sk_sndbuf = max_t(u32, sk->sk_sndbuf, SOCK_MIN_SNDBUF);	2230	if (sk->sk_userlocks & SOCK_SNDBUF_LOCK)
2226	}	2231	return;
		2232
		2233	val = min(sk->sk_sndbuf, sk->sk_wmem_queued >> 1);
		2234
		2235	WRITE_ONCE(sk->sk_sndbuf, max_t(u32, val, SOCK_MIN_SNDBUF));
2227	}	2236	}
2228		2237
2229	struct sk_buff sk_stream_alloc_skb(struct sock sk, int size, gfp_t gfp,	2238	struct sk_buff sk_stream_alloc_skb(struct sock sk, int size, gfp_t gfp,
@@ -2251,7 +2260,7 @@ bool sk_page_frag_refill(struct sock sk, struct page_frag pfrag); · 21 unmodified lines
2251	*/	2260	*/
2252	static inline bool sock_writeable(const struct sock *sk)	2261	static inline bool sock_writeable(const struct sock *sk)
2253	{	2262	{
2254	return refcount_read(&sk->sk_wmem_alloc) < (sk->sk_sndbuf >> 1);	2263	return refcount_read(&sk->sk_wmem_alloc) < (READ_ONCE(sk->sk_sndbuf) >> 1);
2255	}	2264	}
2256		2265
2257	static inline gfp_t gfp_any(void)	2266	static inline gfp_t gfp_any(void)
@@ -2271,7 +2280,9 @@ static inline long sock_sndtimeo(const struct sock *sk, bool noblock) · 13 unmodified lines
2271		2280
2272	static inline int sock_rcvlowat(const struct sock *sk, int waitall, int len)	2281	static inline int sock_rcvlowat(const struct sock *sk, int waitall, int len)
2273	{	2282	{
2274	return (waitall ? len : min_t(int, sk->sk_rcvlowat, len)) ? : 1;	2283	int v = waitall ? len : min_t(int, READ_ONCE(sk->sk_rcvlowat), len);
		2284
		2285	return v ?: 1;
2275	}	2286	}
2276		2287
2277	/* Alas, with timeout socket operations are not restartable.	2288	/* Alas, with timeout socket operations are not restartable.

include/net/tcp.h+6−4

 	    mem_cgroup_under_socket_pressure(sk->sk_memcg))
 		return true;
-	return tcp_memory_pressure;
+	return READ_ONCE(tcp_memory_pressure);
 }
 /*
  * The next routines deal with comparing 32 bit unsigned ints
 /* Note: caller must be prepared to deal with negative returns */
 static inline int tcp_space(const struct sock *sk)
 {
-	return tcp_win_from_space(sk, sk->sk_rcvbuf - sk->sk_backlog.len -
+	return tcp_win_from_space(sk, READ_ONCE(sk->sk_rcvbuf) -
+				  READ_ONCE(sk->sk_backlog.len) -
 				  atomic_read(&sk->sk_rmem_alloc));
 }
 static inline int tcp_full_space(const struct sock *sk)
 {
-	return tcp_win_from_space(sk, sk->sk_rcvbuf);
+	return tcp_win_from_space(sk, READ_ONCE(sk->sk_rcvbuf));
 }
 extern void tcp_openreq_init_rwin(struct request_sock *req,
 static inline bool tcp_stream_memory_free(const struct sock *sk, int wake)
 {
 	const struct tcp_sock *tp = tcp_sk(sk);
-	u32 notsent_bytes = tp->write_seq - tp->snd_nxt;
+	u32 notsent_bytes = READ_ONCE(tp->write_seq) -
+			    READ_ONCE(tp->snd_nxt);
 	return (notsent_bytes << wake) < tcp_notsent_lowat(tp);
 }

include/scsi/scsi_eh.h+1−0

@@ -32,6 +32,7 @@ extern int scsi_ioctl_reset(struct scsi_device , int __user ); · 31 unmodified lines
32	struct scsi_eh_save {	32	struct scsi_eh_save {
33	/* saved state */	33	/* saved state */
34	int result;	34	int result;
		35	unsigned int resid_len;
35	int eh_eflags;	36	int eh_eflags;
36	enum dma_data_direction data_direction;	37	enum dma_data_direction data_direction;
37	unsigned underflow;	38	unsigned underflow;

include/sound/hda_register.h+3−0

@@ -264,6 +264,9 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 }; · 263 unmodified lines
264	#define AZX_REG_ML_LOUTPAY 0x20	264	#define AZX_REG_ML_LOUTPAY 0x20
265	#define AZX_REG_ML_LINPAY 0x30	265	#define AZX_REG_ML_LINPAY 0x30
266		266
		267	/* bit0 is reserved, with BIT(1) mapping to stream1 */
		268	#define ML_LOSIDV_STREAM_MASK 0xFFFE
		269
267	#define ML_LCTL_SCF_MASK 0xF	270	#define ML_LCTL_SCF_MASK 0xF
268	#define AZX_MLCTL_SPA (0x1 << 16)	271	#define AZX_MLCTL_SPA (0x1 << 16)
269	#define AZX_MLCTL_CPA (0x1 << 23)	272	#define AZX_MLCTL_CPA (0x1 << 23)

include/sound/simple_card_utils.h+4−4

@@ -135,9 +135,9 @@ int asoc_simple_init_priv(struct asoc_simple_priv *priv, · 134 unmodified lines
135	struct link_info *li);	135	struct link_info *li);
136		136
137	#ifdef DEBUG	137	#ifdef DEBUG
138	inline void asoc_simple_debug_dai(struct asoc_simple_priv *priv,	138	static inline void asoc_simple_debug_dai(struct asoc_simple_priv *priv,
139	char *name,	139	char *name,
140	struct asoc_simple_dai *dai)	140	struct asoc_simple_dai *dai)
141	{	141	{
142	struct device *dev = simple_priv_to_dev(priv);	142	struct device *dev = simple_priv_to_dev(priv);
143		143
@@ -167,7 +167,7 @@ inline void asoc_simple_debug_dai(struct asoc_simple_priv *priv, · 23 unmodified lines
167	dev_dbg(dev, "%s clk %luHz\n", name, clk_get_rate(dai->clk));	167	dev_dbg(dev, "%s clk %luHz\n", name, clk_get_rate(dai->clk));
168	}	168	}
169		169
170	inline void asoc_simple_debug_info(struct asoc_simple_priv *priv)	170	static inline void asoc_simple_debug_info(struct asoc_simple_priv *priv)
171	{	171	{
172	struct snd_soc_card *card = simple_priv_to_card(priv);	172	struct snd_soc_card *card = simple_priv_to_card(priv);
173	struct device *dev = simple_priv_to_dev(priv);	173	struct device *dev = simple_priv_to_dev(priv);

include/trace/events/btrfs.h+2−1

 		__entry->qgid		= qgroup->qgroupid;
 		__entry->cur_reserved	= qgroup->rsv.values[type];
 		__entry->diff		= diff;
+		__entry->type		= type;
 	),
 	TP_printk_btrfs("qgid=%llu type=%s cur_reserved=%llu diff=%lld",
 	TP_fast_assign_btrfs(root->fs_info,
 		__entry->refroot	= root->root_key.objectid;
 		__entry->diff		= diff;
+		__entry->type		= type;
 	),
 	TP_printk_btrfs("refroot=%llu(%s) type=%s diff=%lld",
 	TP_STRUCT__entry_btrfs(
 		__field(	u64,	refroot			)
 		__field(	s64,	diff			)
-		__field(	int,	type			)
 	),
 	TP_fast_assign_btrfs(root->fs_info,

include/trace/events/rxrpc.h+9−9

@@ -519,10 +519,10 @@ TRACE_EVENT(rxrpc_local, · 518 unmodified lines
519	);	519	);
520		520
521	TRACE_EVENT(rxrpc_peer,	521	TRACE_EVENT(rxrpc_peer,
522	TP_PROTO(struct rxrpc_peer *peer, enum rxrpc_peer_trace op,	522	TP_PROTO(unsigned int peer_debug_id, enum rxrpc_peer_trace op,
523	int usage, const void *where),	523	int usage, const void *where),
524		524
525	TP_ARGS(peer, op, usage, where),	525	TP_ARGS(peer_debug_id, op, usage, where),
526		526
527	TP_STRUCT__entry(	527	TP_STRUCT__entry(
528	__field(unsigned int, peer )	528	__field(unsigned int, peer )
@@ -532,7 +532,7 @@ TRACE_EVENT(rxrpc_peer, · 3 unmodified lines
532	),	532	),
533		533
534	TP_fast_assign(	534	TP_fast_assign(
535	__entry->peer = peer->debug_id;	535	__entry->peer = peer_debug_id;
536	__entry->op = op;	536	__entry->op = op;
537	__entry->usage = usage;	537	__entry->usage = usage;
538	__entry->where = where;	538	__entry->where = where;
@@ -546,10 +546,10 @@ TRACE_EVENT(rxrpc_peer, · 7 unmodified lines
546	);	546	);
547		547
548	TRACE_EVENT(rxrpc_conn,	548	TRACE_EVENT(rxrpc_conn,
549	TP_PROTO(struct rxrpc_connection *conn, enum rxrpc_conn_trace op,	549	TP_PROTO(unsigned int conn_debug_id, enum rxrpc_conn_trace op,
550	int usage, const void *where),	550	int usage, const void *where),
551		551
552	TP_ARGS(conn, op, usage, where),	552	TP_ARGS(conn_debug_id, op, usage, where),
553		553
554	TP_STRUCT__entry(	554	TP_STRUCT__entry(
555	__field(unsigned int, conn )	555	__field(unsigned int, conn )
@@ -559,7 +559,7 @@ TRACE_EVENT(rxrpc_conn, · 3 unmodified lines
559	),	559	),
560		560
561	TP_fast_assign(	561	TP_fast_assign(
562	__entry->conn = conn->debug_id;	562	__entry->conn = conn_debug_id;
563	__entry->op = op;	563	__entry->op = op;
564	__entry->usage = usage;	564	__entry->usage = usage;
565	__entry->where = where;	565	__entry->where = where;
@@ -606,10 +606,10 @@ TRACE_EVENT(rxrpc_client, · 40 unmodified lines
606	);	606	);
607		607
608	TRACE_EVENT(rxrpc_call,	608	TRACE_EVENT(rxrpc_call,
609	TP_PROTO(struct rxrpc_call *call, enum rxrpc_call_trace op,	609	TP_PROTO(unsigned int call_debug_id, enum rxrpc_call_trace op,
610	int usage, const void where, const void aux),	610	int usage, const void where, const void aux),
611		611
612	TP_ARGS(call, op, usage, where, aux),	612	TP_ARGS(call_debug_id, op, usage, where, aux),
613		613
614	TP_STRUCT__entry(	614	TP_STRUCT__entry(
615	__field(unsigned int, call )	615	__field(unsigned int, call )
@@ -620,7 +620,7 @@ TRACE_EVENT(rxrpc_call, · 4 unmodified lines
620	),	620	),
621		621
622	TP_fast_assign(	622	TP_fast_assign(
623	__entry->call = call->debug_id;	623	__entry->call = call_debug_id;
624	__entry->op = op;	624	__entry->op = op;
625	__entry->usage = usage;	625	__entry->usage = usage;
626	__entry->where = where;	626	__entry->where = where;

include/trace/events/sock.h+2−2

@@ -82,7 +82,7 @@ TRACE_EVENT(sock_rcvqueue_full, · 81 unmodified lines
82	TP_fast_assign(	82	TP_fast_assign(
83	__entry->rmem_alloc = atomic_read(&sk->sk_rmem_alloc);	83	__entry->rmem_alloc = atomic_read(&sk->sk_rmem_alloc);
84	__entry->truesize = skb->truesize;	84	__entry->truesize = skb->truesize;
85	__entry->sk_rcvbuf = sk->sk_rcvbuf;	85	__entry->sk_rcvbuf = READ_ONCE(sk->sk_rcvbuf);
86	),	86	),
87		87
88	TP_printk("rmem_alloc=%d truesize=%u sk_rcvbuf=%d",	88	TP_printk("rmem_alloc=%d truesize=%u sk_rcvbuf=%d",
@@ -115,7 +115,7 @@ TRACE_EVENT(sock_exceed_buf_limit, · 26 unmodified lines
115	__entry->rmem_alloc = atomic_read(&sk->sk_rmem_alloc);	115	__entry->rmem_alloc = atomic_read(&sk->sk_rmem_alloc);
116	__entry->sysctl_wmem = sk_get_wmem0(sk, prot);	116	__entry->sysctl_wmem = sk_get_wmem0(sk, prot);
117	__entry->wmem_alloc = refcount_read(&sk->sk_wmem_alloc);	117	__entry->wmem_alloc = refcount_read(&sk->sk_wmem_alloc);
118	__entry->wmem_queued = sk->sk_wmem_queued;	118	__entry->wmem_queued = READ_ONCE(sk->sk_wmem_queued);
119	__entry->kind = kind;	119	__entry->kind = kind;
120	),	120	),
121		121

kernel/events/core.c+2−2

@@ -6965,7 +6965,7 @@ static void __perf_event_output_stop(struct perf_event event, void data) · 6964 unmodified lines
6965	static int __perf_pmu_output_stop(void *info)	6965	static int __perf_pmu_output_stop(void *info)
6966	{	6966	{
6967	struct perf_event *event = info;	6967	struct perf_event *event = info;
6968	struct pmu *pmu = event->pmu;	6968	struct pmu *pmu = event->ctx->pmu;
6969	struct perf_cpu_context *cpuctx = this_cpu_ptr(pmu->pmu_cpu_context);	6969	struct perf_cpu_context *cpuctx = this_cpu_ptr(pmu->pmu_cpu_context);
6970	struct remote_output ro = {	6970	struct remote_output ro = {
6971	.rb = event->rb,	6971	.rb = event->rb,
@@ -10660,7 +10660,7 @@ static int perf_copy_attr(struct perf_event_attr __user *uattr, · 3688 unmodified lines
10660		10660
10661	attr->size = size;	10661	attr->size = size;
10662		10662
10663	if (attr->__reserved_1)	10663	if (attr->__reserved_1 \|\| attr->__reserved_2)
10664	return -EINVAL;	10664	return -EINVAL;
10665		10665
10666	if (attr->sample_type & ~(PERF_SAMPLE_MAX-1))	10666	if (attr->sample_type & ~(PERF_SAMPLE_MAX-1))

kernel/events/uprobes.c+11−2

 	struct vm_area_struct *vma;
 	int ret, is_register, ref_ctr_updated = 0;
 	bool orig_page_huge = false;
+	unsigned int gup_flags = FOLL_FORCE;
 	is_register = is_swbp_insn(&opcode);
 	uprobe = container_of(auprobe, struct uprobe, arch);
 retry:
+	if (is_register)
+		gup_flags |= FOLL_SPLIT_PMD;
 	/* Read the page with vaddr into memory */
-	ret = get_user_pages_remote(NULL, mm, vaddr, 1,
+	ret = get_user_pages_remote(NULL, mm, vaddr, 1, gup_flags,
-			FOLL_FORCE | FOLL_SPLIT_PMD, &old_page, &vma, NULL);
+				    &old_page, &vma, NULL);
 	if (ret <= 0)
 		return ret;
 	if (ret <= 0)
 		goto put_old;
+	if (WARN(!is_register && PageCompound(old_page),
+		 "uprobe unregister should never work on compound page\n")) {
+		ret = -EINVAL;
+		goto put_old;
+	}
 	/* We are going to replace instruction, update ref_ctr. */
 	if (!ref_ctr_updated && uprobe->ref_ctr_offset) {
 		ret = update_ref_ctr(uprobe, mm, is_register ? 1 : -1);

kernel/gen_kheaders.sh+7−4

 find $cpio_dir -type f -print0 |
 	xargs -0 -P8 -n1 perl -pi -e 'BEGIN {undef $/;}; s/\/\*((?!SPDX).)*?\*\///smg;'
-# Create archive and try to normalize metadata for reproducibility
+# Create archive and try to normalize metadata for reproducibility.
-tar "${KBUILD_BUILD_TIMESTAMP:+--mtime=$KBUILD_BUILD_TIMESTAMP}" \
+# For compatibility with older versions of tar, files are fed to tar
-    --owner=0 --group=0 --sort=name --numeric-owner \
+# pre-sorted, as --sort=name might not be available.
-    -Jcf $tarfile -C $cpio_dir/ . > /dev/null
+find $cpio_dir -printf "./%P\n" | LC_ALL=C sort | \
+    tar "${KBUILD_BUILD_TIMESTAMP:+--mtime=$KBUILD_BUILD_TIMESTAMP}" \
+    --owner=0 --group=0 --numeric-owner --no-recursion \
+    -Jcf $tarfile -C $cpio_dir/ -T - > /dev/null
 echo "$src_files_md5" >  kernel/kheaders.md5
 echo "$obj_files_md5" >> kernel/kheaders.md5

kernel/kthread.c+3−3

@@ -866,9 +866,9 @@ void kthread_delayed_work_timer_fn(struct timer_list *t) · 865 unmodified lines
866	}	866	}
867	EXPORT_SYMBOL(kthread_delayed_work_timer_fn);	867	EXPORT_SYMBOL(kthread_delayed_work_timer_fn);
868		868
869	void __kthread_queue_delayed_work(struct kthread_worker *worker,	869	static void __kthread_queue_delayed_work(struct kthread_worker *worker,
870	struct kthread_delayed_work *dwork,	870	struct kthread_delayed_work *dwork,
871	unsigned long delay)	871	unsigned long delay)
872	{	872	{
873	struct timer_list *timer = &dwork->timer;	873	struct timer_list *timer = &dwork->timer;
874	struct kthread_work *work = &dwork->work;	874	struct kthread_work *work = &dwork->work;

kernel/power/main.c+1−0

@@ -15,6 +15,7 @@ · 14 unmodified lines
15	#include <linux/seq_file.h>	15	#include <linux/seq_file.h>
16	#include <linux/suspend.h>	16	#include <linux/suspend.h>
17	#include <linux/syscalls.h>	17	#include <linux/syscalls.h>
		18	#include <linux/pm_runtime.h>
18		19
19	#include "power.h"	20	#include "power.h"
20		21

kernel/power/qos.c+240−0

@@ -650,3 +650,243 @@ static int __init pm_qos_power_init(void) · 649 unmodified lines
650	}	650	}
651		651
652	late_initcall(pm_qos_power_init);	652	late_initcall(pm_qos_power_init);
		653
		654	/* Definitions related to the frequency QoS below. */
		655
		656	/**
		657	* freq_constraints_init - Initialize frequency QoS constraints.
		658	* @qos: Frequency QoS constraints to initialize.
		659	*/
		660	void freq_constraints_init(struct freq_constraints *qos)
		661	{
		662	struct pm_qos_constraints *c;
		663
		664	c = &qos->min_freq;
		665	plist_head_init(&c->list);
		666	c->target_value = FREQ_QOS_MIN_DEFAULT_VALUE;
		667	c->default_value = FREQ_QOS_MIN_DEFAULT_VALUE;
		668	c->no_constraint_value = FREQ_QOS_MIN_DEFAULT_VALUE;
		669	c->type = PM_QOS_MAX;
		670	c->notifiers = &qos->min_freq_notifiers;
		671	BLOCKING_INIT_NOTIFIER_HEAD(c->notifiers);
		672
		673	c = &qos->max_freq;
		674	plist_head_init(&c->list);
		675	c->target_value = FREQ_QOS_MAX_DEFAULT_VALUE;
		676	c->default_value = FREQ_QOS_MAX_DEFAULT_VALUE;
		677	c->no_constraint_value = FREQ_QOS_MAX_DEFAULT_VALUE;
		678	c->type = PM_QOS_MIN;
		679	c->notifiers = &qos->max_freq_notifiers;
		680	BLOCKING_INIT_NOTIFIER_HEAD(c->notifiers);
		681	}
		682
		683	/**
		684	* freq_qos_read_value - Get frequency QoS constraint for a given list.
		685	* @qos: Constraints to evaluate.
		686	* @type: QoS request type.
		687	*/
		688	s32 freq_qos_read_value(struct freq_constraints *qos,
		689	enum freq_qos_req_type type)
		690	{
		691	s32 ret;
		692
		693	switch (type) {
		694	case FREQ_QOS_MIN:
		695	ret = IS_ERR_OR_NULL(qos) ?
		696	FREQ_QOS_MIN_DEFAULT_VALUE :
		697	pm_qos_read_value(&qos->min_freq);
		698	break;
		699	case FREQ_QOS_MAX:
		700	ret = IS_ERR_OR_NULL(qos) ?
		701	FREQ_QOS_MAX_DEFAULT_VALUE :
		702	pm_qos_read_value(&qos->max_freq);
		703	break;
		704	default:
		705	WARN_ON(1);
		706	ret = 0;
		707	}
		708
		709	return ret;
		710	}
		711
		712	/**
		713	* freq_qos_apply - Add/modify/remove frequency QoS request.
		714	* @req: Constraint request to apply.
		715	* @action: Action to perform (add/update/remove).
		716	* @value: Value to assign to the QoS request.
		717	*/
		718	static int freq_qos_apply(struct freq_qos_request *req,
		719	enum pm_qos_req_action action, s32 value)
		720	{
		721	int ret;
		722
		723	switch(req->type) {
		724	case FREQ_QOS_MIN:
		725	ret = pm_qos_update_target(&req->qos->min_freq, &req->pnode,
		726	action, value);
		727	break;
		728	case FREQ_QOS_MAX:
		729	ret = pm_qos_update_target(&req->qos->max_freq, &req->pnode,
		730	action, value);
		731	break;
		732	default:
		733	ret = -EINVAL;
		734	}
		735
		736	return ret;
		737	}
		738
		739	/**
		740	* freq_qos_add_request - Insert new frequency QoS request into a given list.
		741	* @qos: Constraints to update.
		742	* @req: Preallocated request object.
		743	* @type: Request type.
		744	* @value: Request value.
		745	*
		746	* Insert a new entry into the @qos list of requests, recompute the effective
		747	* QoS constraint value for that list and initialize the @req object. The
		748	* caller needs to save that object for later use in updates and removal.
		749	*
		750	* Return 1 if the effective constraint value has changed, 0 if the effective
		751	* constraint value has not changed, or a negative error code on failures.
		752	*/
		753	int freq_qos_add_request(struct freq_constraints *qos,
		754	struct freq_qos_request *req,
		755	enum freq_qos_req_type type, s32 value)
		756	{
		757	int ret;
		758
		759	if (IS_ERR_OR_NULL(qos) \|\| !req)
		760	return -EINVAL;
		761
		762	if (WARN(freq_qos_request_active(req),
		763	"%s() called for active request\n", __func__))
		764	return -EINVAL;
		765
		766	req->qos = qos;
		767	req->type = type;
		768	ret = freq_qos_apply(req, PM_QOS_ADD_REQ, value);
		769	if (ret < 0) {
		770	req->qos = NULL;
		771	req->type = 0;
		772	}
		773
		774	return ret;
		775	}
		776	EXPORT_SYMBOL_GPL(freq_qos_add_request);
		777
		778	/**
		779	* freq_qos_update_request - Modify existing frequency QoS request.
		780	* @req: Request to modify.
		781	* @new_value: New request value.
		782	*
		783	* Update an existing frequency QoS request along with the effective constraint
		784	* value for the list of requests it belongs to.
		785	*
		786	* Return 1 if the effective constraint value has changed, 0 if the effective
		787	* constraint value has not changed, or a negative error code on failures.
		788	*/
		789	int freq_qos_update_request(struct freq_qos_request *req, s32 new_value)
		790	{
		791	if (!req)
		792	return -EINVAL;
		793
		794	if (WARN(!freq_qos_request_active(req),
		795	"%s() called for unknown object\n", __func__))
		796	return -EINVAL;
		797
		798	if (req->pnode.prio == new_value)
		799	return 0;
		800
		801	return freq_qos_apply(req, PM_QOS_UPDATE_REQ, new_value);
		802	}
		803	EXPORT_SYMBOL_GPL(freq_qos_update_request);
		804
		805	/**
		806	* freq_qos_remove_request - Remove frequency QoS request from its list.
		807	* @req: Request to remove.
		808	*
		809	* Remove the given frequency QoS request from the list of constraints it
		810	* belongs to and recompute the effective constraint value for that list.
		811	*
		812	* Return 1 if the effective constraint value has changed, 0 if the effective
		813	* constraint value has not changed, or a negative error code on failures.
		814	*/
		815	int freq_qos_remove_request(struct freq_qos_request *req)
		816	{
		817	if (!req)
		818	return -EINVAL;
		819
		820	if (WARN(!freq_qos_request_active(req),
		821	"%s() called for unknown object\n", __func__))
		822	return -EINVAL;
		823
		824	return freq_qos_apply(req, PM_QOS_REMOVE_REQ, PM_QOS_DEFAULT_VALUE);
		825	}
		826	EXPORT_SYMBOL_GPL(freq_qos_remove_request);
		827
		828	/**
		829	* freq_qos_add_notifier - Add frequency QoS change notifier.
		830	* @qos: List of requests to add the notifier to.
		831	* @type: Request type.
		832	* @notifier: Notifier block to add.
		833	*/
		834	int freq_qos_add_notifier(struct freq_constraints *qos,
		835	enum freq_qos_req_type type,
		836	struct notifier_block *notifier)
		837	{
		838	int ret;
		839
		840	if (IS_ERR_OR_NULL(qos) \|\| !notifier)
		841	return -EINVAL;
		842
		843	switch (type) {
		844	case FREQ_QOS_MIN:
		845	ret = blocking_notifier_chain_register(qos->min_freq.notifiers,
		846	notifier);
		847	break;
		848	case FREQ_QOS_MAX:
		849	ret = blocking_notifier_chain_register(qos->max_freq.notifiers,
		850	notifier);
		851	break;
		852	default:
		853	WARN_ON(1);
		854	ret = -EINVAL;
		855	}
		856
		857	return ret;
		858	}
		859	EXPORT_SYMBOL_GPL(freq_qos_add_notifier);
		860
		861	/**
		862	* freq_qos_remove_notifier - Remove frequency QoS change notifier.
		863	* @qos: List of requests to remove the notifier from.
		864	* @type: Request type.
		865	* @notifier: Notifier block to remove.
		866	*/
		867	int freq_qos_remove_notifier(struct freq_constraints *qos,
		868	enum freq_qos_req_type type,
		869	struct notifier_block *notifier)
		870	{
		871	int ret;
		872
		873	if (IS_ERR_OR_NULL(qos) \|\| !notifier)
		874	return -EINVAL;
		875
		876	switch (type) {
		877	case FREQ_QOS_MIN:
		878	ret = blocking_notifier_chain_unregister(qos->min_freq.notifiers,
		879	notifier);
		880	break;
		881	case FREQ_QOS_MAX:
		882	ret = blocking_notifier_chain_unregister(qos->max_freq.notifiers,
		883	notifier);
		884	break;
		885	default:
		886	WARN_ON(1);
		887	ret = -EINVAL;
		888	}
		889
		890	return ret;
		891	}
		892	EXPORT_SYMBOL_GPL(freq_qos_remove_notifier);

kernel/stop_machine.c+6−4

  * Copyright (C) 2010		SUSE Linux Products GmbH
  * Copyright (C) 2010		Tejun Heo <tj@kernel.org>
  */
+#include <linux/compiler.h>
 #include <linux/completion.h>
 #include <linux/cpu.h>
 #include <linux/init.h>
 	/* Reset ack counter. */
 	atomic_set(&msdata->thread_ack, msdata->num_threads);
 	smp_wmb();
-	msdata->state = newstate;
+	WRITE_ONCE(msdata->state, newstate);
 }
 /* Last one to ack a state moves to the next state. */
 static int multi_cpu_stop(void *data)
 {
 	struct multi_stop_data *msdata = data;
-	enum multi_stop_state curstate = MULTI_STOP_NONE;
+	enum multi_stop_state newstate, curstate = MULTI_STOP_NONE;
 	int cpu = smp_processor_id(), err = 0;
 	const struct cpumask *cpumask;
 	unsigned long flags;
 	do {
 		/* Chill out and ensure we re-read multi_stop_state. */
 		stop_machine_yield(cpumask);
-		if (msdata->state != curstate) {
+		newstate = READ_ONCE(msdata->state);
-			curstate = msdata->state;
+		if (newstate != curstate) {
+			curstate = newstate;
 			switch (curstate) {
 			case MULTI_STOP_DISABLE_IRQ:
 				local_irq_disable();

kernel/sysctl.c+2−2

@@ -163,7 +163,7 @@ static unsigned long hung_task_timeout_max = (LONG_MAX/HZ); · 162 unmodified lines
163	#ifdef CONFIG_SPARC	163	#ifdef CONFIG_SPARC
164	#endif	164	#endif
165		165
166	#ifdef __hppa__	166	#ifdef CONFIG_PARISC
167	extern int pwrsw_enabled;	167	extern int pwrsw_enabled;
168	#endif	168	#endif
169		169
@@ -620,7 +620,7 @@ static struct ctl_table kern_table[] = { · 450 unmodified lines
620	.proc_handler = proc_dointvec,	620	.proc_handler = proc_dointvec,
621	},	621	},
622	#endif	622	#endif
623	#ifdef __hppa__	623	#ifdef CONFIG_PARISC
624	{	624	{
625	.procname = "soft-power",	625	.procname = "soft-power",
626	.data = &pwrsw_enabled,	626	.data = &pwrsw_enabled,

kernel/time/hrtimer.c+4−4

@@ -164,7 +164,7 @@ struct hrtimer_clock_base lock_hrtimer_base(const struct hrtimer timer, · 163 unmodified lines
164	struct hrtimer_clock_base *base;	164	struct hrtimer_clock_base *base;
165		165
166	for (;;) {	166	for (;;) {
167	base = timer->base;	167	base = READ_ONCE(timer->base);
168	if (likely(base != &migration_base)) {	168	if (likely(base != &migration_base)) {
169	raw_spin_lock_irqsave(&base->cpu_base->lock, *flags);	169	raw_spin_lock_irqsave(&base->cpu_base->lock, *flags);
170	if (likely(base == timer->base))	170	if (likely(base == timer->base))
@@ -244,7 +244,7 @@ again: · 73 unmodified lines
244	return base;	244	return base;
245		245
246	/* See the comment in lock_hrtimer_base() */	246	/* See the comment in lock_hrtimer_base() */
247	timer->base = &migration_base;	247	WRITE_ONCE(timer->base, &migration_base);
248	raw_spin_unlock(&base->cpu_base->lock);	248	raw_spin_unlock(&base->cpu_base->lock);
249	raw_spin_lock(&new_base->cpu_base->lock);	249	raw_spin_lock(&new_base->cpu_base->lock);
250		250
@@ -253,10 +253,10 @@ again: · 2 unmodified lines
253	raw_spin_unlock(&new_base->cpu_base->lock);	253	raw_spin_unlock(&new_base->cpu_base->lock);
254	raw_spin_lock(&base->cpu_base->lock);	254	raw_spin_lock(&base->cpu_base->lock);
255	new_cpu_base = this_cpu_base;	255	new_cpu_base = this_cpu_base;
256	timer->base = base;	256	WRITE_ONCE(timer->base, base);
257	goto again;	257	goto again;
258	}	258	}
259	timer->base = new_base;	259	WRITE_ONCE(timer->base, new_base);
260	} else {	260	} else {
261	if (new_cpu_base != this_cpu_base &&	261	if (new_cpu_base != this_cpu_base &&
262	hrtimer_check_target(timer, new_base)) {	262	hrtimer_check_target(timer, new_base)) {

kernel/time/posix-cpu-timers.c+3−3

@@ -266,7 +266,7 @@ static void update_gt_cputime(struct task_cputime_atomic *cputime_atomic, · 265 unmodified lines
266	/**	266	/**
267	* thread_group_sample_cputime - Sample cputime for a given task	267	* thread_group_sample_cputime - Sample cputime for a given task
268	* @tsk: Task for which cputime needs to be started	268	* @tsk: Task for which cputime needs to be started
269	* @iimes: Storage for time samples	269	* @samples: Storage for time samples
270	*	270	*
271	* Called from sys_getitimer() to calculate the expiry time of an active	271	* Called from sys_getitimer() to calculate the expiry time of an active
272	* timer. That means group cputime accounting is already active. Called	272	* timer. That means group cputime accounting is already active. Called
@@ -1038,12 +1038,12 @@ unlock: · 765 unmodified lines
1038	* member of @pct->bases[CLK].nextevt. False otherwise	1038	* member of @pct->bases[CLK].nextevt. False otherwise
1039	*/	1039	*/
1040	static inline bool	1040	static inline bool
1041	task_cputimers_expired(const u64 sample, struct posix_cputimers pct)	1041	task_cputimers_expired(const u64 samples, struct posix_cputimers pct)
1042	{	1042	{
1043	int i;	1043	int i;
1044		1044
1045	for (i = 0; i < CPUCLOCK_MAX; i++) {	1045	for (i = 0; i < CPUCLOCK_MAX; i++) {
1046	if (sample[i] >= pct->bases[i].nextevt)	1046	if (samples[i] >= pct->bases[i].nextevt)
1047	return true;	1047	return true;
1048	}	1048	}
1049	return false;	1049	return false;

kernel/time/sched_clock.c+2−0

@@ -17,6 +17,8 @@ · 16 unmodified lines
17	#include <linux/seqlock.h>	17	#include <linux/seqlock.h>
18	#include <linux/bitops.h>	18	#include <linux/bitops.h>
19		19
		20	#include "timekeeping.h"
		21
20	/**	22	/**
21	* struct clock_read_data - data required to read from sched_clock()	23	* struct clock_read_data - data required to read from sched_clock()
22	*	24	*

kernel/trace/trace_event_perf.c+4−0

 		goto out;
 	}
+	mutex_lock(&event_mutex);
 	ret = perf_trace_event_init(tp_event, p_event);
 	if (ret)
 		destroy_local_trace_kprobe(tp_event);
+	mutex_unlock(&event_mutex);
 out:
 	kfree(func);
 	return ret;
 void perf_kprobe_destroy(struct perf_event *p_event)
 {
+	mutex_lock(&event_mutex);
 	perf_trace_event_close(p_event);
 	perf_trace_event_unreg(p_event);
+	mutex_unlock(&event_mutex);
 	destroy_local_trace_kprobe(p_event->tp_event);
 }

kernel/trace/trace_events_hist.c+2−0

@@ -679,6 +679,8 @@ static bool synth_field_signed(char *type) · 678 unmodified lines
679	{	679	{
680	if (str_has_prefix(type, "u"))	680	if (str_has_prefix(type, "u"))
681	return false;	681	return false;
		682	if (strcmp(type, "gfp_t") == 0)
		683	return false;
682		684
683	return true;	685	return true;
684	}	686	}

lib/generic-radix-tree.c+26−6

 #include <linux/export.h>
 #include <linux/generic-radix-tree.h>
 #include <linux/gfp.h>
+#include <linux/kmemleak.h>
 #define GENRADIX_ARY		(PAGE_SIZE / sizeof(struct genradix_node *))
 #define GENRADIX_ARY_SHIFT	ilog2(GENRADIX_ARY)
 }
 EXPORT_SYMBOL(__genradix_ptr);
+static inline struct genradix_node *genradix_alloc_node(gfp_t gfp_mask)
+{
+	struct genradix_node *node;
+	node = (struct genradix_node *)__get_free_page(gfp_mask|__GFP_ZERO);
+	/*
+	 * We're using pages (not slab allocations) directly for kernel data
+	 * structures, so we need to explicitly inform kmemleak of them in order
+	 * to avoid false positive memory leak reports.
+	 */
+	kmemleak_alloc(node, PAGE_SIZE, 1, gfp_mask);
+	return node;
+}
+static inline void genradix_free_node(struct genradix_node *node)
+{
+	kmemleak_free(node);
+	free_page((unsigned long)node);
+}
 /*
  * Returns pointer to the specified byte @offset within @radix, allocating it if
  * necessary - newly allocated slots are always zeroed out:
 			break;
 		if (!new_node) {
-			new_node = (void *)
+			new_node = genradix_alloc_node(gfp_mask);
-				__get_free_page(gfp_mask|__GFP_ZERO);
 			if (!new_node)
 				return NULL;
 		}
 		n = READ_ONCE(*p);
 		if (!n) {
 			if (!new_node) {
-				new_node = (void *)
+				new_node = genradix_alloc_node(gfp_mask);
-					__get_free_page(gfp_mask|__GFP_ZERO);
 				if (!new_node)
 					return NULL;
 			}
 	}
 	if (new_node)
-		free_page((unsigned long) new_node);
+		genradix_free_node(new_node);
 	return &n->data[offset];
 }
 				genradix_free_recurse(n->children[i], level - 1);
 	}
-	free_page((unsigned long) n);
+	genradix_free_node(n);
 }
 int __genradix_prealloc(struct __genradix *radix, size_t size,

lib/test_meminit.c+27−0

@@ -297,6 +297,32 @@ out: · 296 unmodified lines
297	return 1;	297	return 1;
298	}	298	}
299		299
		300	static int __init do_kmem_cache_size_bulk(int size, int *total_failures)
		301	{
		302	struct kmem_cache *c;
		303	int i, iter, maxiter = 1024;
		304	int num, bytes;
		305	bool fail = false;
		306	void *objects[10];
		307
		308	c = kmem_cache_create("test_cache", size, size, 0, NULL);
		309	for (iter = 0; (iter < maxiter) && !fail; iter++) {
		310	num = kmem_cache_alloc_bulk(c, GFP_KERNEL, ARRAY_SIZE(objects),
		311	objects);
		312	for (i = 0; i < num; i++) {
		313	bytes = count_nonzero_bytes(objects[i], size);
		314	if (bytes)
		315	fail = true;
		316	fill_with_garbage(objects[i], size);
		317	}
		318
		319	if (num)
		320	kmem_cache_free_bulk(c, num, objects);
		321	}
		322	*total_failures += fail;
		323	return 1;
		324	}
		325
300	/*	326	/*
301	* Test kmem_cache allocation by creating caches of different sizes, with and	327	* Test kmem_cache allocation by creating caches of different sizes, with and
302	* without constructors, with and without SLAB_TYPESAFE_BY_RCU.	328	* without constructors, with and without SLAB_TYPESAFE_BY_RCU.
@@ -318,6 +344,7 @@ static int __init test_kmemcache(int *total_failures) · 15 unmodified lines
318	num_tests += do_kmem_cache_size(size, ctor, rcu, zero,	344	num_tests += do_kmem_cache_size(size, ctor, rcu, zero,
319	&failures);	345	&failures);
320	}	346	}
		347	num_tests += do_kmem_cache_size_bulk(size, &failures);
321	}	348	}
322	REPORT_FAILURES_IN_FN();	349	REPORT_FAILURES_IN_FN();
323	*total_failures += failures;	350	*total_failures += failures;

lib/test_user_copy.c+28−9

@@ -47,18 +47,35 @@ static bool is_zeroed(void *from, size_t size) · 46 unmodified lines
47	static int test_check_nonzero_user(char kmem, char __user umem, size_t size)	47	static int test_check_nonzero_user(char kmem, char __user umem, size_t size)
48	{	48	{
49	int ret = 0;	49	int ret = 0;
50	size_t start, end, i;	50	size_t start, end, i, zero_start, zero_end;
51	size_t zero_start = size / 4;	51
52	size_t zero_end = size - zero_start;	52	if (test(size < 2 * PAGE_SIZE, "buffer too small"))
		53	return -EINVAL;
		54
		55	/*
		56	* We want to cross a page boundary to exercise the code more
		57	* effectively. We also don't want to make the size we scan too large,
		58	* otherwise the test can take a long time and cause soft lockups. So
		59	* scan a 1024 byte region across the page boundary.
		60	*/
		61	size = 1024;
		62	start = PAGE_SIZE - (size / 2);
		63
		64	kmem += start;
		65	umem += start;
		66
		67	zero_start = size / 4;
		68	zero_end = size - zero_start;
53		69
54	/*	70	/*
55	* We conduct a series of check_nonzero_user() tests on a block of memory	71	* We conduct a series of check_nonzero_user() tests on a block of
56	* with the following byte-pattern (trying every possible [start,end]	72	* memory with the following byte-pattern (trying every possible
57	* pair):	73	* [start,end] pair):
58	*	74	*
59	* [ 00 ff 00 ff ... 00 00 00 00 ... ff 00 ff 00 ]	75	* [ 00 ff 00 ff ... 00 00 00 00 ... ff 00 ff 00 ]
60	*	76	*
61	* And we verify that check_nonzero_user() acts identically to memchr_inv().	77	* And we verify that check_nonzero_user() acts identically to
		78	* memchr_inv().
62	*/	79	*/
63		80
64	memset(kmem, 0x0, size);	81	memset(kmem, 0x0, size);
@@ -93,11 +110,13 @@ static int test_copy_struct_from_user(char kmem, char __user umem, · 28 unmodified lines
93	size_t ksize, usize;	110	size_t ksize, usize;
94		111
95	umem_src = kmalloc(size, GFP_KERNEL);	112	umem_src = kmalloc(size, GFP_KERNEL);
96	if ((ret \|= test(umem_src == NULL, "kmalloc failed")))	113	ret = test(umem_src == NULL, "kmalloc failed");
		114	if (ret)
97	goto out_free;	115	goto out_free;
98		116
99	expected = kmalloc(size, GFP_KERNEL);	117	expected = kmalloc(size, GFP_KERNEL);
100	if ((ret \|= test(expected == NULL, "kmalloc failed")))	118	ret = test(expected == NULL, "kmalloc failed");
		119	if (ret)
101	goto out_free;	120	goto out_free;
102		121
103	/* Fill umem with a fixed byte pattern. */	122	/* Fill umem with a fixed byte pattern. */

lib/vdso/gettimeofday.c+5−4

@@ -214,9 +214,10 @@ int __cvdso_clock_getres_common(clockid_t clock, struct __kernel_timespec *res) · 213 unmodified lines
214	return -1;	214	return -1;
215	}	215	}
216		216
217	res->tv_sec = 0;	217	if (likely(res)) {
218	res->tv_nsec = ns;	218	res->tv_sec = 0;
219		219	res->tv_nsec = ns;
		220	}
220	return 0;	221	return 0;
221	}	222	}
222		223
@@ -245,7 +246,7 @@ __cvdso_clock_getres_time32(clockid_t clock, struct old_timespec32 *res) · 22 unmodified lines
245	ret = clock_getres_fallback(clock, &ts);	246	ret = clock_getres_fallback(clock, &ts);
246	#endif	247	#endif
247		248
248	if (likely(!ret)) {	249	if (likely(!ret && res)) {
249	res->tv_sec = ts.tv_sec;	250	res->tv_sec = ts.tv_sec;
250	res->tv_nsec = ts.tv_nsec;	251	res->tv_nsec = ts.tv_nsec;
251	}	252	}

mm/compaction.c+4−3

 	/* Ensure the start of the pageblock or zone is online and valid */
 	block_pfn = pageblock_start_pfn(pfn);
-	block_page = pfn_to_online_page(max(block_pfn, zone->zone_start_pfn));
+	block_pfn = max(block_pfn, zone->zone_start_pfn);
+	block_page = pfn_to_online_page(block_pfn);
 	if (block_page) {
 		page = block_page;
 		pfn = block_pfn;
 	}
 	/* Ensure the end of the pageblock or zone is online and valid */
-	block_pfn += pageblock_nr_pages;
+	block_pfn = pageblock_end_pfn(pfn) - 1;
 	block_pfn = min(block_pfn, zone_end_pfn(zone) - 1);
 	end_page = pfn_to_online_page(block_pfn);
 	if (!end_page)
 		page += (1 << PAGE_ALLOC_COSTLY_ORDER);
 		pfn += (1 << PAGE_ALLOC_COSTLY_ORDER);
-	} while (page < end_page);
+	} while (page <= end_page);
 	return false;
 }

mm/filemap.c+1−0

@@ -40,6 +40,7 @@ · 39 unmodified lines
40	#include <linux/rmap.h>	40	#include <linux/rmap.h>
41	#include <linux/delayacct.h>	41	#include <linux/delayacct.h>
42	#include <linux/psi.h>	42	#include <linux/psi.h>
		43	#include <linux/ramfs.h>
43	#include "internal.h"	44	#include "internal.h"
44		45
45	#define CREATE_TRACE_POINTS	46	#define CREATE_TRACE_POINTS

mm/gup.c+8−6

 }
 static int gup_hugepte(pte_t *ptep, unsigned long sz, unsigned long addr,
-		       unsigned long end, int write, struct page **pages, int *nr)
+		       unsigned long end, unsigned int flags,
+		       struct page **pages, int *nr)
 {
 	unsigned long pte_end;
 	struct page *head, *page;
 	pte = READ_ONCE(*ptep);
-	if (!pte_access_permitted(pte, write))
+	if (!pte_access_permitted(pte, flags & FOLL_WRITE))
 		return 0;
 	/* hugepages are never "special" */
 }
 static int gup_huge_pd(hugepd_t hugepd, unsigned long addr,
-		unsigned int pdshift, unsigned long end, int write,
+		unsigned int pdshift, unsigned long end, unsigned int flags,
 		struct page **pages, int *nr)
 {
 	pte_t *ptep;
 	ptep = hugepte_offset(hugepd, addr, pdshift);
 	do {
 		next = hugepte_addr_end(addr, end, sz);
-		if (!gup_hugepte(ptep, sz, addr, end, write, pages, nr))
+		if (!gup_hugepte(ptep, sz, addr, end, flags, pages, nr))
 			return 0;
 	} while (ptep++, addr = next, addr != end);
 }
 #else
 static inline int gup_huge_pd(hugepd_t hugepd, unsigned long addr,
-		unsigned pdshift, unsigned long end, int write,
+		unsigned int pdshift, unsigned long end, unsigned int flags,
 		struct page **pages, int *nr)
 {
 	return 0;
 #endif /* CONFIG_ARCH_HAS_HUGEPD */
 static int gup_huge_pmd(pmd_t orig, pmd_t *pmdp, unsigned long addr,
-		unsigned long end, unsigned int flags, struct page **pages, int *nr)
+			unsigned long end, unsigned int flags,
+			struct page **pages, int *nr)
 {
 	struct page *head, *page;
 	int refs;

mm/huge_memory.c+7−2

 			ds_queue->split_queue_len--;
 			list_del(page_deferred_list(head));
 		}
-		if (mapping)
+		if (mapping) {
-			__dec_node_page_state(page, NR_SHMEM_THPS);
+			if (PageSwapBacked(page))
+				__dec_node_page_state(page, NR_SHMEM_THPS);
+			else
+				__dec_node_page_state(page, NR_FILE_THPS);
+		}
 		spin_unlock(&ds_queue->split_queue_lock);
 		__split_huge_page(page, list, end, flags);
 		if (PageSwapCache(head)) {

mm/hugetlb.c+2−3

 	struct page *page;
 	for (i = start_pfn; i < end_pfn; i++) {
-		if (!pfn_valid(i))
+		page = pfn_to_online_page(i);
+		if (!page)
 			return false;
-		page = pfn_to_page(i);
 		if (page_zone(page) != z)
 			return false;

mm/init-mm.c+1−0

@@ -5,6 +5,7 @@ · 4 unmodified lines
5	#include <linux/spinlock.h>	5	#include <linux/spinlock.h>
6	#include <linux/list.h>	6	#include <linux/list.h>
7	#include <linux/cpumask.h>	7	#include <linux/cpumask.h>
		8	#include <linux/mman.h>
8		9
9	#include <linux/atomic.h>	10	#include <linux/atomic.h>
10	#include <linux/user_namespace.h>	11	#include <linux/user_namespace.h>

mm/kmemleak.c+21−9

 	return object;
 }
+/*
+ * Remove an object from the object_tree_root and object_list. Must be called
+ * with the kmemleak_lock held _if_ kmemleak is still enabled.
+ */
+static void __remove_object(struct kmemleak_object *object)
+{
+	rb_erase(&object->rb_node, &object_tree_root);
+	list_del_rcu(&object->object_list);
+}
 /*
  * Look up an object in the object search tree and remove it from both
  * object_tree_root and object_list. The returned object's use_count should be
 	write_lock_irqsave(&kmemleak_lock, flags);
 	object = lookup_object(ptr, alias);
-	if (object) {
+	if (object)
-		rb_erase(&object->rb_node, &object_tree_root);
+		__remove_object(object);
-		list_del_rcu(&object->object_list);
-	}
 	write_unlock_irqrestore(&kmemleak_lock, flags);
 	return object;
 static void __kmemleak_do_cleanup(void)
 {
-	struct kmemleak_object *object;
+	struct kmemleak_object *object, *tmp;
-	rcu_read_lock();
+	/*
-	list_for_each_entry_rcu(object, &object_list, object_list)
+	 * Kmemleak has already been disabled, no need for RCU list traversal
-		delete_object_full(object->pointer);
+	 * or kmemleak_lock held.
-	rcu_read_unlock();
+	 */
+	list_for_each_entry_safe(object, tmp, &object_list, object_list) {
+		__remove_object(object);
+		__delete_object(object);
+	}
 }
 /*

mm/memblock.c+3−3

 		align = SMP_CACHE_BYTES;
 	}
-	if (end > memblock.current_limit)
-		end = memblock.current_limit;
 again:
 	found = memblock_find_in_range_node(size, align, start, end, nid,
 					    flags);
 	if (WARN_ON_ONCE(slab_is_available()))
 		return kzalloc_node(size, GFP_NOWAIT, nid);
+	if (max_addr > memblock.current_limit)
+		max_addr = memblock.current_limit;
 	alloc = memblock_alloc_range_nid(size, align, min_addr, max_addr, nid);
 	/* retry allocation without lower limit */

mm/memcontrol.c+12−6

 				   struct mem_cgroup *from,
 				   struct mem_cgroup *to)
 {
+	struct lruvec *from_vec, *to_vec;
+	struct pglist_data *pgdat;
 	unsigned long flags;
 	unsigned int nr_pages = compound ? hpage_nr_pages(page) : 1;
 	int ret;
 	anon = PageAnon(page);
+	pgdat = page_pgdat(page);
+	from_vec = mem_cgroup_lruvec(pgdat, from);
+	to_vec = mem_cgroup_lruvec(pgdat, to);
 	spin_lock_irqsave(&from->move_lock, flags);
 	if (!anon && page_mapped(page)) {
-		__mod_memcg_state(from, NR_FILE_MAPPED, -nr_pages);
+		__mod_lruvec_state(from_vec, NR_FILE_MAPPED, -nr_pages);
-		__mod_memcg_state(to, NR_FILE_MAPPED, nr_pages);
+		__mod_lruvec_state(to_vec, NR_FILE_MAPPED, nr_pages);
 	}
 	/*
 		struct address_space *mapping = page_mapping(page);
 		if (mapping_cap_account_dirty(mapping)) {
-			__mod_memcg_state(from, NR_FILE_DIRTY, -nr_pages);
+			__mod_lruvec_state(from_vec, NR_FILE_DIRTY, -nr_pages);
-			__mod_memcg_state(to, NR_FILE_DIRTY, nr_pages);
+			__mod_lruvec_state(to_vec, NR_FILE_DIRTY, nr_pages);
 		}
 	}
 	if (PageWriteback(page)) {
-		__mod_memcg_state(from, NR_WRITEBACK, -nr_pages);
+		__mod_lruvec_state(from_vec, NR_WRITEBACK, -nr_pages);
-		__mod_memcg_state(to, NR_WRITEBACK, nr_pages);
+		__mod_lruvec_state(to_vec, NR_WRITEBACK, nr_pages);
 	}
 #ifdef CONFIG_TRANSPARENT_HUGEPAGE

mm/memory-failure.c+21−15

 	struct task_struct *tsk;
 	unsigned long addr;
 	short size_shift;
-	char addr_valid;
 };
 /*
 		}
 	}
 	tk->addr = page_address_in_vma(p, vma);
-	tk->addr_valid = 1;
 	if (is_zone_device_page(p))
 		tk->size_shift = dev_pagemap_mapping_shift(p, vma);
 	else
 		tk->size_shift = compound_order(compound_head(p)) + PAGE_SHIFT;
 	/*
-	 * In theory we don't have to kill when the page was
+	 * Send SIGKILL if "tk->addr == -EFAULT". Also, as
-	 * munmaped. But it could be also a mremap. Since that's
+	 * "tk->size_shift" is always non-zero for !is_zone_device_page(),
-	 * likely very rare kill anyways just out of paranoia, but use
+	 * so "tk->size_shift == 0" effectively checks no mapping on
-	 * a SIGKILL because the error is not contained anymore.
+	 * ZONE_DEVICE. Indeed, when a devdax page is mmapped N times
+	 * to a process' address space, it's possible not all N VMAs
+	 * contain mappings for the page, but at least one VMA does.
+	 * Only deliver SIGBUS with payload derived from the VMA that
+	 * has a mapping for the page.
 	 */
-	if (tk->addr == -EFAULT || tk->size_shift == 0) {
+	if (tk->addr == -EFAULT) {
 		pr_info("Memory failure: Unable to find user space address %lx in %s\n",
 			page_to_pfn(p), tsk->comm);
-		tk->addr_valid = 0;
+	} else if (tk->size_shift == 0) {
+		kfree(tk);
+		return;
 	}
 	get_task_struct(tsk);
 	tk->tsk = tsk;
 			 * make sure the process doesn't catch the
 			 * signal and then access the memory. Just kill it.
 			 */
-			if (fail || tk->addr_valid == 0) {
+			if (fail || tk->addr == -EFAULT) {
 				pr_err("Memory failure: %#lx: forcibly killing %s:%d because of failure to unmap corrupted page\n",
 				       pfn, tk->tsk->comm, tk->tsk->pid);
 				do_send_sig_info(SIGKILL, SEND_SIG_PRIV,
 	if (!sysctl_memory_failure_recovery)
 		panic("Memory failure on page %lx", pfn);
-	if (!pfn_valid(pfn)) {
+	p = pfn_to_online_page(pfn);
+	if (!p) {
+		if (pfn_valid(pfn)) {
+			pgmap = get_dev_pagemap(pfn, NULL);
+			if (pgmap)
+				return memory_failure_dev_pagemap(pfn, flags,
+								  pgmap);
+		}
 		pr_err("Memory failure: %#lx: memory outside kernel control\n",
 			pfn);
 		return -ENXIO;
 	}
-	pgmap = get_dev_pagemap(pfn, NULL);
-	if (pgmap)
-		return memory_failure_dev_pagemap(pfn, flags, pgmap);
-	p = pfn_to_page(pfn);
 	if (PageHuge(p))
 		return memory_failure_hugetlb(pfn, flags);
 	if (TestSetPageHWPoison(p)) {

mm/memory_hotplug.c+15−57

@@ -436,67 +436,25 @@ static void shrink_zone_span(struct zone *zone, unsigned long start_pfn, · 435 unmodified lines
436	zone_span_writeunlock(zone);	436	zone_span_writeunlock(zone);
437	}	437	}
438		438
439	static void shrink_pgdat_span(struct pglist_data *pgdat,	439	static void update_pgdat_span(struct pglist_data *pgdat)
440	unsigned long start_pfn, unsigned long end_pfn)
441	{	440	{
442	unsigned long pgdat_start_pfn = pgdat->node_start_pfn;	441	unsigned long node_start_pfn = 0, node_end_pfn = 0;
443	unsigned long p = pgdat_end_pfn(pgdat); /* pgdat_end_pfn namespace clash */	442	struct zone *zone;
444	unsigned long pgdat_end_pfn = p;
445	unsigned long pfn;
446	int nid = pgdat->node_id;
447
448	if (pgdat_start_pfn == start_pfn) {
449	/*
450	* If the section is smallest section in the pgdat, it need
451	* shrink pgdat->node_start_pfn and pgdat->node_spanned_pages.
452	* In this case, we find second smallest valid mem_section
453	* for shrinking zone.
454	*/
455	pfn = find_smallest_section_pfn(nid, NULL, end_pfn,
456	pgdat_end_pfn);
457	if (pfn) {
458	pgdat->node_start_pfn = pfn;
459	pgdat->node_spanned_pages = pgdat_end_pfn - pfn;
460	}
461	} else if (pgdat_end_pfn == end_pfn) {
462	/*
463	* If the section is biggest section in the pgdat, it need
464	* shrink pgdat->node_spanned_pages.
465	* In this case, we find second biggest valid mem_section for
466	* shrinking zone.
467	*/
468	pfn = find_biggest_section_pfn(nid, NULL, pgdat_start_pfn,
469	start_pfn);
470	if (pfn)
471	pgdat->node_spanned_pages = pfn - pgdat_start_pfn + 1;
472	}
473
474	/*
475	* If the section is not biggest or smallest mem_section in the pgdat,
476	* it only creates a hole in the pgdat. So in this case, we need not
477	* change the pgdat.
478	* But perhaps, the pgdat has only hole data. Thus it check the pgdat
479	* has only hole or not.
480	*/
481	pfn = pgdat_start_pfn;
482	for (; pfn < pgdat_end_pfn; pfn += PAGES_PER_SUBSECTION) {
483	if (unlikely(!pfn_valid(pfn)))
484	continue;
485
486	if (pfn_to_nid(pfn) != nid)
487	continue;
488		443
489	/* Skip range to be removed */	444	for (zone = pgdat->node_zones;
490	if (pfn >= start_pfn && pfn < end_pfn)	445	zone < pgdat->node_zones + MAX_NR_ZONES; zone++) {
491	continue;	446	unsigned long zone_end_pfn = zone->zone_start_pfn +
		447	zone->spanned_pages;
492		448
493	/* If we find valid section, we have nothing to do */	449	/* No need to lock the zones, they can't change. */
494	return;	450	if (zone_end_pfn > node_end_pfn)
		451	node_end_pfn = zone_end_pfn;
		452	if (zone->zone_start_pfn < node_start_pfn)
		453	node_start_pfn = zone->zone_start_pfn;
495	}	454	}
496		455
497	/* The pgdat has no valid section */	456	pgdat->node_start_pfn = node_start_pfn;
498	pgdat->node_start_pfn = 0;	457	pgdat->node_spanned_pages = node_end_pfn - node_start_pfn;
499	pgdat->node_spanned_pages = 0;
500	}	458	}
501		459
502	static void __remove_zone(struct zone *zone, unsigned long start_pfn,	460	static void __remove_zone(struct zone *zone, unsigned long start_pfn,
@@ -507,7 +465,7 @@ static void __remove_zone(struct zone *zone, unsigned long start_pfn, · 4 unmodified lines
507		465
508	pgdat_resize_lock(zone->zone_pgdat, &flags);	466	pgdat_resize_lock(zone->zone_pgdat, &flags);
509	shrink_zone_span(zone, start_pfn, start_pfn + nr_pages);	467	shrink_zone_span(zone, start_pfn, start_pfn + nr_pages);
510	shrink_pgdat_span(pgdat, start_pfn, start_pfn + nr_pages);	468	update_pgdat_span(pgdat);
511	pgdat_resize_unlock(zone->zone_pgdat, &flags);	469	pgdat_resize_unlock(zone->zone_pgdat, &flags);
512	}	470	}
513		471

mm/memremap.c+7−4

 void memunmap_pages(struct dev_pagemap *pgmap)
 {
 	struct resource *res = &pgmap->res;
+	struct page *first_page;
 	unsigned long pfn;
 	int nid;
 		put_page(pfn_to_page(pfn));
 	dev_pagemap_cleanup(pgmap);
+	/* make sure to access a memmap that was actually initialized */
+	first_page = pfn_to_page(pfn_first(pgmap));
 	/* pages are dead and unused, undo the arch mapping */
-	nid = page_to_nid(pfn_to_page(PHYS_PFN(res->start)));
+	nid = page_to_nid(first_page);
 	mem_hotplug_begin();
 	if (pgmap->type == MEMORY_DEVICE_PRIVATE) {
-		pfn = PHYS_PFN(res->start);
+		__remove_pages(page_zone(first_page), PHYS_PFN(res->start),
-		__remove_pages(page_zone(pfn_to_page(pfn)), pfn,
+			       PHYS_PFN(resource_size(res)), NULL);
-				 PHYS_PFN(resource_size(res)), NULL);
 	} else {
 		arch_remove_memory(nid, res->start, resource_size(res),
 				pgmap_altmap(pgmap));

mm/page_alloc.c+4−2

 		if (page)
 			goto got_pg;
-		 if (order >= pageblock_order && (gfp_mask & __GFP_IO)) {
+		 if (order >= pageblock_order && (gfp_mask & __GFP_IO) &&
+		     !(gfp_mask & __GFP_RETRY_MAYFAIL)) {
 			/*
 			 * If allocating entire pageblock(s) and compaction
 			 * failed because all zones are below low watermarks
 			 * or is prohibited because it recently failed at this
-			 * order, fail immediately.
+			 * order, fail immediately unless the allocator has
+			 * requested compaction and reclaim retry.
 			 *
 			 * Reclaim is
 			 *  - potentially very expensive because zones are far

mm/page_ext.c+9−14

 #endif
 };
+unsigned long page_ext_size = sizeof(struct page_ext);
 static unsigned long total_usage;
-static unsigned long extra_mem;
 static bool __init invoke_need_callbacks(void)
 {
 	for (i = 0; i < entries; i++) {
 		if (page_ext_ops[i]->need && page_ext_ops[i]->need()) {
-			page_ext_ops[i]->offset = sizeof(struct page_ext) +
+			page_ext_ops[i]->offset = page_ext_size;
-						extra_mem;
+			page_ext_size += page_ext_ops[i]->size;
-			extra_mem += page_ext_ops[i]->size;
 			need = true;
 		}
 	}
 	}
 }
-static unsigned long get_entry_size(void)
-{
-	return sizeof(struct page_ext) + extra_mem;
-}
 static inline struct page_ext *get_entry(void *base, unsigned long index)
 {
-	return base + get_entry_size() * index;
+	return base + page_ext_size * index;
 }
 #if !defined(CONFIG_SPARSEMEM)
 		!IS_ALIGNED(node_end_pfn(nid), MAX_ORDER_NR_PAGES))
 		nr_pages += MAX_ORDER_NR_PAGES;
-	table_size = get_entry_size() * nr_pages;
+	table_size = page_ext_size * nr_pages;
 	base = memblock_alloc_try_nid(
 			table_size, PAGE_SIZE, __pa(MAX_DMA_ADDRESS),
 	if (section->page_ext)
 		return 0;
-	table_size = get_entry_size() * PAGES_PER_SECTION;
+	table_size = page_ext_size * PAGES_PER_SECTION;
 	base = alloc_page_ext(table_size, nid);
 	/*
 	 * we need to apply a mask.
 	 */
 	pfn &= PAGE_SECTION_MASK;
-	section->page_ext = (void *)base - get_entry_size() * pfn;
+	section->page_ext = (void *)base - page_ext_size * pfn;
 	total_usage += table_size;
 	return 0;
 }
 		struct page *page = virt_to_page(addr);
 		size_t table_size;
-		table_size = get_entry_size() * PAGES_PER_SECTION;
+		table_size = page_ext_size * PAGES_PER_SECTION;
 		BUG_ON(PageReserved(page));
 		kmemleak_free(addr);

mm/page_owner.c+23−37

 	short last_migrate_reason;
 	gfp_t gfp_mask;
 	depot_stack_handle_t handle;
-#ifdef CONFIG_DEBUG_PAGEALLOC
 	depot_stack_handle_t free_handle;
-#endif
 };
-static bool page_owner_disabled = true;
+static bool page_owner_enabled = false;
 DEFINE_STATIC_KEY_FALSE(page_owner_inited);
 static depot_stack_handle_t dummy_handle;
 		return -EINVAL;
 	if (strcmp(buf, "on") == 0)
-		page_owner_disabled = false;
+		page_owner_enabled = true;
 	return 0;
 }
 static bool need_page_owner(void)
 {
-	if (page_owner_disabled)
+	return page_owner_enabled;
-		return false;
-	return true;
 }
 static __always_inline depot_stack_handle_t create_dummy_stack(void)
 static void init_page_owner(void)
 {
-	if (page_owner_disabled)
+	if (!page_owner_enabled)
 		return;
 	register_dummy_stack();
 {
 	int i;
 	struct page_ext *page_ext;
-#ifdef CONFIG_DEBUG_PAGEALLOC
 	depot_stack_handle_t handle = 0;
 	struct page_owner *page_owner;
-	if (debug_pagealloc_enabled())
+	handle = save_stack(GFP_NOWAIT | __GFP_NOWARN);
-		handle = save_stack(GFP_NOWAIT | __GFP_NOWARN);
-#endif
+	page_ext = lookup_page_ext(page);
+	if (unlikely(!page_ext))
+		return;
 	for (i = 0; i < (1 << order); i++) {
-		page_ext = lookup_page_ext(page + i);
+		__clear_bit(PAGE_EXT_OWNER_ALLOCATED, &page_ext->flags);
-		if (unlikely(!page_ext))
+		page_owner = get_page_owner(page_ext);
-			continue;
+		page_owner->free_handle = handle;
-		__clear_bit(PAGE_EXT_OWNER_ACTIVE, &page_ext->flags);
+		page_ext = page_ext_next(page_ext);
-#ifdef CONFIG_DEBUG_PAGEALLOC
-		if (debug_pagealloc_enabled()) {
-			page_owner = get_page_owner(page_ext);
-			page_owner->free_handle = handle;
-		}
-#endif
 	}
 }
 		page_owner->gfp_mask = gfp_mask;
 		page_owner->last_migrate_reason = -1;
 		__set_bit(PAGE_EXT_OWNER, &page_ext->flags);
-		__set_bit(PAGE_EXT_OWNER_ACTIVE, &page_ext->flags);
+		__set_bit(PAGE_EXT_OWNER_ALLOCATED, &page_ext->flags);
-		page_ext = lookup_page_ext(page + i);
+		page_ext = page_ext_next(page_ext);
 	}
 }
 	if (unlikely(!page_ext))
 		return;
-	page_owner = get_page_owner(page_ext);
+	for (i = 0; i < (1 << order); i++) {
-	page_owner->order = 0;
-	for (i = 1; i < (1 << order); i++) {
-		page_ext = lookup_page_ext(page + i);
 		page_owner = get_page_owner(page_ext);
 		page_owner->order = 0;
+		page_ext = page_ext_next(page_ext);
 	}
 }
 	 * the new page, which will be freed.
 	 */
 	__set_bit(PAGE_EXT_OWNER, &new_ext->flags);
-	__set_bit(PAGE_EXT_OWNER_ACTIVE, &new_ext->flags);
+	__set_bit(PAGE_EXT_OWNER_ALLOCATED, &new_ext->flags);
 }
 void pagetypeinfo_showmixedcount_print(struct seq_file *m,
 	 * not matter as the mixed block count will still be correct
 	 */
 	for (; pfn < end_pfn; ) {
-		if (!pfn_valid(pfn)) {
+		page = pfn_to_online_page(pfn);
+		if (!page) {
 			pfn = ALIGN(pfn + 1, MAX_ORDER_NR_PAGES);
 			continue;
 		}
 		block_end_pfn = ALIGN(pfn + 1, pageblock_nr_pages);
 		block_end_pfn = min(block_end_pfn, end_pfn);
-		page = pfn_to_page(pfn);
 		pageblock_mt = get_pageblock_migratetype(page);
 		for (; pfn < block_end_pfn; pfn++) {
 			if (!pfn_valid_within(pfn))
 				continue;
+			/* The pageblock is online, no need to recheck. */
 			page = pfn_to_page(pfn);
 			if (page_zone(page) != zone)
 			if (unlikely(!page_ext))
 				continue;
-			if (!test_bit(PAGE_EXT_OWNER_ACTIVE, &page_ext->flags))
+			if (!test_bit(PAGE_EXT_OWNER_ALLOCATED, &page_ext->flags))
 				continue;
 			page_owner = get_page_owner(page_ext);
 		return;
 	}
-	if (test_bit(PAGE_EXT_OWNER_ACTIVE, &page_ext->flags))
+	if (test_bit(PAGE_EXT_OWNER_ALLOCATED, &page_ext->flags))
 		pr_alert("page_owner tracks the page as allocated\n");
 	else
 		pr_alert("page_owner tracks the page as freed\n");
 		stack_trace_print(entries, nr_entries, 0);
 	}
-#ifdef CONFIG_DEBUG_PAGEALLOC
 	handle = READ_ONCE(page_owner->free_handle);
 	if (!handle) {
 		pr_alert("page_owner free stack trace missing\n");
 		pr_alert("page last free stack trace:\n");
 		stack_trace_print(entries, nr_entries, 0);
 	}
-#endif
 	if (page_owner->last_migrate_reason != -1)
 		pr_alert("page has been migrated, last migrate reason: %s\n",
 		 * Although we do have the info about past allocation of free
 		 * pages, it's not relevant for current memory usage.
 		 */
-		if (!test_bit(PAGE_EXT_OWNER_ACTIVE, &page_ext->flags))
+		if (!test_bit(PAGE_EXT_OWNER_ALLOCATED, &page_ext->flags))
 			continue;
 		page_owner = get_page_owner(page_ext);

mm/rmap.c+1−0

@@ -61,6 +61,7 @@ · 60 unmodified lines
61	#include <linux/mmu_notifier.h>	61	#include <linux/mmu_notifier.h>
62	#include <linux/migrate.h>	62	#include <linux/migrate.h>
63	#include <linux/hugetlb.h>	63	#include <linux/hugetlb.h>
		64	#include <linux/huge_mm.h>
64	#include <linux/backing-dev.h>	65	#include <linux/backing-dev.h>
65	#include <linux/page_idle.h>	66	#include <linux/page_idle.h>
66	#include <linux/memremap.h>	67	#include <linux/memremap.h>

mm/slab.c+3−0

 /**
  * __ksize -- Uninstrumented ksize.
+ * @objp: pointer to the object
  *
  * Unlike ksize(), __ksize() is uninstrumented, and does not provide the same
  * safety checks as ksize() with KASAN instrumentation enabled.
+ *
+ * Return: size of the actual memory used by @objp in bytes
  */
 size_t __ksize(const void *objp)
 {

mm/slab_common.c+5−4

 static void destroy_memcg_params(struct kmem_cache *s)
 {
-	if (is_root_cache(s))
+	if (is_root_cache(s)) {
 		kvfree(rcu_access_pointer(s->memcg_params.memcg_caches));
-	else
+	} else {
+		mem_cgroup_put(s->memcg_params.memcg);
+		WRITE_ONCE(s->memcg_params.memcg, NULL);
 		percpu_ref_exit(&s->memcg_params.refcnt);
+	}
 }
 static void free_memcg_params(struct rcu_head *rcu)
 	} else {
 		list_del(&s->memcg_params.children_node);
 		list_del(&s->memcg_params.kmem_caches_node);
-		mem_cgroup_put(s->memcg_params.memcg);
-		WRITE_ONCE(s->memcg_params.memcg, NULL);
 	}
 }
 #else

mm/slub.c+27−8

@@ -2671,6 +2671,17 @@ static void __slab_alloc(struct kmem_cache s, gfp_t gfpflags, int node, · 2670 unmodified lines
2671	return p;	2671	return p;
2672	}	2672	}
2673		2673
		2674	/*
		2675	* If the object has been wiped upon free, make sure it's fully initialized by
		2676	* zeroing out freelist pointer.
		2677	*/
		2678	static __always_inline void maybe_wipe_obj_freeptr(struct kmem_cache *s,
		2679	void *obj)
		2680	{
		2681	if (unlikely(slab_want_init_on_free(s)) && obj)
		2682	memset((void )((char )obj + s->offset), 0, sizeof(void *));
		2683	}
		2684
2674	/*	2685	/*
2675	* Inlined fastpath so that allocation functions (kmalloc, kmem_cache_alloc)	2686	* Inlined fastpath so that allocation functions (kmalloc, kmem_cache_alloc)
2676	* have the fastpath folded into their functions. So no function call	2687	* have the fastpath folded into their functions. So no function call
@@ -2759,12 +2770,8 @@ redo: · 82 unmodified lines
2759	prefetch_freepointer(s, next_object);	2770	prefetch_freepointer(s, next_object);
2760	stat(s, ALLOC_FASTPATH);	2771	stat(s, ALLOC_FASTPATH);
2761	}	2772	}
2762	/*	2773
2763	* If the object has been wiped upon free, make sure it's fully	2774	maybe_wipe_obj_freeptr(s, object);
2764	* initialized by zeroing out freelist pointer.
2765	*/
2766	if (unlikely(slab_want_init_on_free(s)) && object)
2767	memset(object + s->offset, 0, sizeof(void *));
2768		2775
2769	if (unlikely(slab_want_init_on_alloc(gfpflags, s)) && object)	2776	if (unlikely(slab_want_init_on_alloc(gfpflags, s)) && object)
2770	memset(object, 0, s->object_size);	2777	memset(object, 0, s->object_size);
@@ -3178,10 +3185,13 @@ int kmem_cache_alloc_bulk(struct kmem_cache *s, gfp_t flags, size_t size, · 407 unmodified lines
3178	goto error;	3185	goto error;
3179		3186
3180	c = this_cpu_ptr(s->cpu_slab);	3187	c = this_cpu_ptr(s->cpu_slab);
		3188	maybe_wipe_obj_freeptr(s, p[i]);
		3189
3181	continue; /* goto for-loop */	3190	continue; /* goto for-loop */
3182	}	3191	}
3183	c->freelist = get_freepointer(s, object);	3192	c->freelist = get_freepointer(s, object);
3184	p[i] = object;	3193	p[i] = object;
		3194	maybe_wipe_obj_freeptr(s, p[i]);
3185	}	3195	}
3186	c->tid = next_tid(c->tid);	3196	c->tid = next_tid(c->tid);
3187	local_irq_enable();	3197	local_irq_enable();
@@ -4846,7 +4856,17 @@ static ssize_t show_slab_objects(struct kmem_cache *s, · 1658 unmodified lines
4846	}	4856	}
4847	}	4857	}
4848		4858
4849	get_online_mems();	4859	/*
		4860	* It is impossible to take "mem_hotplug_lock" here with "kernfs_mutex"
		4861	* already held which will conflict with an existing lock order:
		4862	*
		4863	* mem_hotplug_lock->slab_mutex->kernfs_mutex
		4864	*
		4865	* We don't really need mem_hotplug_lock (to hold off
		4866	* slab_mem_going_offline_callback) here because slab's memory hot
		4867	* unplug code doesn't destroy the kmem_cache->node[] data.
		4868	*/
		4869
4850	#ifdef CONFIG_SLUB_DEBUG	4870	#ifdef CONFIG_SLUB_DEBUG
4851	if (flags & SO_ALL) {	4871	if (flags & SO_ALL) {
4852	struct kmem_cache_node *n;	4872	struct kmem_cache_node *n;
@@ -4887,7 +4907,6 @@ static ssize_t show_slab_objects(struct kmem_cache *s, · 34 unmodified lines
4887	x += sprintf(buf + x, " N%d=%lu",	4907	x += sprintf(buf + x, " N%d=%lu",
4888	node, nodes[node]);	4908	node, nodes[node]);
4889	#endif	4909	#endif
4890	put_online_mems();
4891	kfree(nodes);	4910	kfree(nodes);
4892	return x + sprintf(buf + x, "\n");	4911	return x + sprintf(buf + x, "\n");
4893	}	4912	}

mm/truncate.c+12−0

 					unlock_page(page);
 					continue;
 				}
+				/* Take a pin outside pagevec */
+				get_page(page);
+				/*
+				 * Drop extra pins before trying to invalidate
+				 * the huge page.
+				 */
+				pagevec_remove_exceptionals(&pvec);
+				pagevec_release(&pvec);
 			}
 			ret = invalidate_inode_page(page);
 			 */
 			if (!ret)
 				deactivate_file_page(page);
+			if (PageTransHuge(page))
+				put_page(page);
 			count += ret;
 		}
 		pagevec_remove_exceptionals(&pvec);

mm/vmscan.c+6−8

  */
 unsigned long lruvec_lru_size(struct lruvec *lruvec, enum lru_list lru, int zone_idx)
 {
-	unsigned long lru_size;
+	unsigned long lru_size = 0;
 	int zid;
-	if (!mem_cgroup_disabled())
+	if (!mem_cgroup_disabled()) {
-		lru_size = lruvec_page_state_local(lruvec, NR_LRU_BASE + lru);
+		for (zid = 0; zid < MAX_NR_ZONES; zid++)
-	else
+			lru_size += mem_cgroup_get_zone_lru_size(lruvec, lru, zid);
+	} else
 		lru_size = node_page_state(lruvec_pgdat(lruvec), NR_LRU_BASE + lru);
 	for (zid = zone_idx + 1; zid < MAX_NR_ZONES; zid++) {
 	 * Note that if SetPageDirty is always performed via set_page_dirty,
 	 * and thus under the i_pages lock, then this ordering is not required.
 	 */
-	if (unlikely(PageTransHuge(page)) && PageSwapCache(page))
+	refcount = 1 + compound_nr(page);
-		refcount = 1 + HPAGE_PMD_NR;
-	else
-		refcount = 2;
 	if (!page_ref_freeze(page, refcount))
 		goto cannot_free;
 	/* note: atomic_cmpxchg in page_ref_freeze provides the smp_rmb */

net/bridge/netfilter/nf_conntrack_bridge.c+3−0

 {
 	int frag_max_size = BR_INPUT_SKB_CB(skb)->frag_max_size;
 	unsigned int hlen, ll_rs, mtu;
+	ktime_t tstamp = skb->tstamp;
 	struct ip_frag_state state;
 	struct iphdr *iph;
 	int err;
 			if (iter.frag)
 				ip_fraglist_prepare(skb, &iter);
+			skb->tstamp = tstamp;
 			err = output(net, sk, data, skb);
 			if (err || !iter.frag)
 				break;
 			goto blackhole;
 		}
+		skb2->tstamp = tstamp;
 		err = output(net, sk, data, skb2);
 		if (err)
 			goto blackhole;

net/core/datagram.c+1−1

@@ -640,7 +640,7 @@ int __zerocopy_sg_from_iter(struct sock sk, struct sk_buff skb, · 639 unmodified lines
640	skb->len += copied;	640	skb->len += copied;
641	skb->truesize += truesize;	641	skb->truesize += truesize;
642	if (sk && sk->sk_type == SOCK_STREAM) {	642	if (sk && sk->sk_type == SOCK_STREAM) {
643	sk->sk_wmem_queued += truesize;	643	sk_wmem_queued_add(sk, truesize);
644	sk_mem_charge(sk, truesize);	644	sk_mem_charge(sk, truesize);
645	} else {	645	} else {
646	refcount_add(truesize, &skb->sk->sk_wmem_alloc);	646	refcount_add(truesize, &skb->sk->sk_wmem_alloc);

net/core/filter.c+5−3

 		case SO_RCVBUF:
 			val = min_t(u32, val, sysctl_rmem_max);
 			sk->sk_userlocks |= SOCK_RCVBUF_LOCK;
-			sk->sk_rcvbuf = max_t(int, val * 2, SOCK_MIN_RCVBUF);
+			WRITE_ONCE(sk->sk_rcvbuf,
+				   max_t(int, val * 2, SOCK_MIN_RCVBUF));
 			break;
 		case SO_SNDBUF:
 			val = min_t(u32, val, sysctl_wmem_max);
 			sk->sk_userlocks |= SOCK_SNDBUF_LOCK;
-			sk->sk_sndbuf = max_t(int, val * 2, SOCK_MIN_SNDBUF);
+			WRITE_ONCE(sk->sk_sndbuf,
+				   max_t(int, val * 2, SOCK_MIN_SNDBUF));
 			break;
 		case SO_MAX_PACING_RATE: /* 32bit version */
 			if (val != ~0U)
 		case SO_RCVLOWAT:
 			if (val < 0)
 				val = INT_MAX;
-			sk->sk_rcvlowat = val ? : 1;
+			WRITE_ONCE(sk->sk_rcvlowat, val ? : 1);
 			break;
 		case SO_MARK:
 			if (sk->sk_mark != val) {

net/core/net_namespace.c+11−6

 	return __peernet2id_alloc(net, peer, &no);
 }
-static void rtnl_net_notifyid(struct net *net, int cmd, int id);
+static void rtnl_net_notifyid(struct net *net, int cmd, int id, u32 portid,
+			      struct nlmsghdr *nlh);
 /* This function returns the id of a peer netns. If no id is assigned, one will
  * be allocated and returned.
  */
 	id = __peernet2id_alloc(net, peer, &alloc);
 	spin_unlock_bh(&net->nsid_lock);
 	if (alloc && id >= 0)
-		rtnl_net_notifyid(net, RTM_NEWNSID, id);
+		rtnl_net_notifyid(net, RTM_NEWNSID, id, 0, NULL);
 	if (alive)
 		put_net(peer);
 	return id;
 			idr_remove(&tmp->netns_ids, id);
 		spin_unlock_bh(&tmp->nsid_lock);
 		if (id >= 0)
-			rtnl_net_notifyid(tmp, RTM_DELNSID, id);
+			rtnl_net_notifyid(tmp, RTM_DELNSID, id, 0, NULL);
 		if (tmp == last)
 			break;
 	}
 	err = alloc_netid(net, peer, nsid);
 	spin_unlock_bh(&net->nsid_lock);
 	if (err >= 0) {
-		rtnl_net_notifyid(net, RTM_NEWNSID, err);
+		rtnl_net_notifyid(net, RTM_NEWNSID, err, NETLINK_CB(skb).portid,
+				  nlh);
 		err = 0;
 	} else if (err == -ENOSPC && nsid >= 0) {
 		err = -EEXIST;
 	return err < 0 ? err : skb->len;
 }
-static void rtnl_net_notifyid(struct net *net, int cmd, int id)
+static void rtnl_net_notifyid(struct net *net, int cmd, int id, u32 portid,
+			      struct nlmsghdr *nlh)
 {
 	struct net_fill_args fillargs = {
+		.portid = portid,
+		.seq = nlh ? nlh->nlmsg_seq : 0,
 		.cmd = cmd,
 		.nsid = id,
 	};
 	if (err < 0)
 		goto err_out;
-	rtnl_notify(msg, net, 0, RTNLGRP_NSID, NULL, 0);
+	rtnl_notify(msg, net, portid, RTNLGRP_NSID, nlh, 0);
 	return;
 err_out:

net/core/request_sock.c+1−1

@@ -96,7 +96,7 @@ void reqsk_fastopen_remove(struct sock sk, struct request_sock req, · 95 unmodified lines
96		96
97	fastopenq = &inet_csk(lsk)->icsk_accept_queue.fastopenq;	97	fastopenq = &inet_csk(lsk)->icsk_accept_queue.fastopenq;
98		98
99	tcp_sk(sk)->fastopen_rsk = NULL;	99	RCU_INIT_POINTER(tcp_sk(sk)->fastopen_rsk, NULL);
100	spin_lock_bh(&fastopenq->lock);	100	spin_lock_bh(&fastopenq->lock);
101	fastopenq->qlen--;	101	fastopenq->qlen--;
102	tcp_rsk(req)->tfo_listener = false;	102	tcp_rsk(req)->tfo_listener = false;

net/core/skbuff.c+13−10

 int sock_queue_err_skb(struct sock *sk, struct sk_buff *skb)
 {
 	if (atomic_read(&sk->sk_rmem_alloc) + skb->truesize >=
-	    (unsigned int)sk->sk_rcvbuf)
+	    (unsigned int)READ_ONCE(sk->sk_rcvbuf))
 		return -ENOMEM;
 	skb_orphan(skb);
  * @skb: buffer
  * @mpls_lse: MPLS label stack entry to push
  * @mpls_proto: ethertype of the new MPLS header (expects 0x8847 or 0x8848)
+ * @mac_len: length of the MAC header
  *
  * Expects skb->data at mac header.
  *
  * Returns 0 on success, -errno otherwise.
  */
-int skb_mpls_push(struct sk_buff *skb, __be32 mpls_lse, __be16 mpls_proto)
+int skb_mpls_push(struct sk_buff *skb, __be32 mpls_lse, __be16 mpls_proto,
+		  int mac_len)
 {
 	struct mpls_shim_hdr *lse;
 	int err;
 		return err;
 	if (!skb->inner_protocol) {
-		skb_set_inner_network_header(skb, skb->mac_len);
+		skb_set_inner_network_header(skb, mac_len);
 		skb_set_inner_protocol(skb, skb->protocol);
 	}
 	skb_push(skb, MPLS_HLEN);
 	memmove(skb_mac_header(skb) - MPLS_HLEN, skb_mac_header(skb),
-		skb->mac_len);
+		mac_len);
 	skb_reset_mac_header(skb);
-	skb_set_network_header(skb, skb->mac_len);
+	skb_set_network_header(skb, mac_len);
 	lse = mpls_hdr(skb);
 	lse->label_stack_entry = mpls_lse;
  *
  * @skb: buffer
  * @next_proto: ethertype of header after popped MPLS header
+ * @mac_len: length of the MAC header
  *
  * Expects skb->data at mac header.
  *
  * Returns 0 on success, -errno otherwise.
  */
-int skb_mpls_pop(struct sk_buff *skb, __be16 next_proto)
+int skb_mpls_pop(struct sk_buff *skb, __be16 next_proto, int mac_len)
 {
 	int err;
 	if (unlikely(!eth_p_mpls(skb->protocol)))
-		return -EINVAL;
+		return 0;
-	err = skb_ensure_writable(skb, skb->mac_len + MPLS_HLEN);
+	err = skb_ensure_writable(skb, mac_len + MPLS_HLEN);
 	if (unlikely(err))
 		return err;
 	skb_postpull_rcsum(skb, mpls_hdr(skb), MPLS_HLEN);
 	memmove(skb_mac_header(skb) + MPLS_HLEN, skb_mac_header(skb),
-		skb->mac_len);
+		mac_len);
 	__skb_pull(skb, MPLS_HLEN);
 	skb_reset_mac_header(skb);
-	skb_set_network_header(skb, skb->mac_len);
+	skb_set_network_header(skb, mac_len);
 	if (skb->dev && skb->dev->type == ARPHRD_ETHER) {
 		struct ethhdr *hdr;

net/core/sock.c+18−14

 		rc = sk_backlog_rcv(sk, skb);
 		mutex_release(&sk->sk_lock.dep_map, 1, _RET_IP_);
-	} else if (sk_add_backlog(sk, skb, sk->sk_rcvbuf)) {
+	} else if (sk_add_backlog(sk, skb, READ_ONCE(sk->sk_rcvbuf))) {
 		bh_unlock_sock(sk);
 		atomic_inc(&sk->sk_drops);
 		goto discard_and_relse;
 		 */
 		val = min_t(int, val, INT_MAX / 2);
 		sk->sk_userlocks |= SOCK_SNDBUF_LOCK;
-		sk->sk_sndbuf = max_t(int, val * 2, SOCK_MIN_SNDBUF);
+		WRITE_ONCE(sk->sk_sndbuf,
+			   max_t(int, val * 2, SOCK_MIN_SNDBUF));
 		/* Wake up sending tasks if we upped the value. */
 		sk->sk_write_space(sk);
 		break;
 		 * returning the value we actually used in getsockopt
 		 * is the most desirable behavior.
 		 */
-		sk->sk_rcvbuf = max_t(int, val * 2, SOCK_MIN_RCVBUF);
+		WRITE_ONCE(sk->sk_rcvbuf,
+			   max_t(int, val * 2, SOCK_MIN_RCVBUF));
 		break;
 	case SO_RCVBUFFORCE:
 		if (sock->ops->set_rcvlowat)
 			ret = sock->ops->set_rcvlowat(sk, val);
 		else
-			sk->sk_rcvlowat = val ? : 1;
+			WRITE_ONCE(sk->sk_rcvlowat, val ? : 1);
 		break;
 	case SO_RCVTIMEO_OLD:
 struct sk_buff *sock_wmalloc(struct sock *sk, unsigned long size, int force,
 			     gfp_t priority)
 {
-	if (force || refcount_read(&sk->sk_wmem_alloc) < sk->sk_sndbuf) {
+	if (force ||
+	    refcount_read(&sk->sk_wmem_alloc) < READ_ONCE(sk->sk_sndbuf)) {
 		struct sk_buff *skb = alloc_skb(size, priority);
 		if (skb) {
 			skb_set_owner_w(skb, sk);
 			return skb;
 			break;
 		set_bit(SOCK_NOSPACE, &sk->sk_socket->flags);
 		prepare_to_wait(sk_sleep(sk), &wait, TASK_INTERRUPTIBLE);
-		if (refcount_read(&sk->sk_wmem_alloc) < sk->sk_sndbuf)
+		if (refcount_read(&sk->sk_wmem_alloc) < READ_ONCE(sk->sk_sndbuf))
 			break;
 		if (sk->sk_shutdown & SEND_SHUTDOWN)
 			break;
 		if (sk->sk_shutdown & SEND_SHUTDOWN)
 			goto failure;
-		if (sk_wmem_alloc_get(sk) < sk->sk_sndbuf)
+		if (sk_wmem_alloc_get(sk) < READ_ONCE(sk->sk_sndbuf))
 			break;
 		sk_set_bit(SOCKWQ_ASYNC_NOSPACE, sk);
 	} else {
 		unsigned long *memory_pressure = sk->sk_prot->memory_pressure;
-		if (memory_pressure && *memory_pressure)
+		if (memory_pressure && READ_ONCE(*memory_pressure))
-			*memory_pressure = 0;
+			WRITE_ONCE(*memory_pressure, 0);
 	}
 }
 	/* Do not wake up a writer until he can make "significant"
 	 * progress.  --DaveM
 	 */
-	if ((refcount_read(&sk->sk_wmem_alloc) << 1) <= sk->sk_sndbuf) {
+	if ((refcount_read(&sk->sk_wmem_alloc) << 1) <= READ_ONCE(sk->sk_sndbuf)) {
 		wq = rcu_dereference(sk->sk_wq);
 		if (skwq_has_sleeper(wq))
 			wake_up_interruptible_sync_poll(&wq->wait, EPOLLOUT |
 	memset(mem, 0, sizeof(*mem) * SK_MEMINFO_VARS);
 	mem[SK_MEMINFO_RMEM_ALLOC] = sk_rmem_alloc_get(sk);
-	mem[SK_MEMINFO_RCVBUF] = sk->sk_rcvbuf;
+	mem[SK_MEMINFO_RCVBUF] = READ_ONCE(sk->sk_rcvbuf);
 	mem[SK_MEMINFO_WMEM_ALLOC] = sk_wmem_alloc_get(sk);
-	mem[SK_MEMINFO_SNDBUF] = sk->sk_sndbuf;
+	mem[SK_MEMINFO_SNDBUF] = READ_ONCE(sk->sk_sndbuf);
 	mem[SK_MEMINFO_FWD_ALLOC] = sk->sk_forward_alloc;
-	mem[SK_MEMINFO_WMEM_QUEUED] = sk->sk_wmem_queued;
+	mem[SK_MEMINFO_WMEM_QUEUED] = READ_ONCE(sk->sk_wmem_queued);
 	mem[SK_MEMINFO_OPTMEM] = atomic_read(&sk->sk_omem_alloc);
-	mem[SK_MEMINFO_BACKLOG] = sk->sk_backlog.len;
+	mem[SK_MEMINFO_BACKLOG] = READ_ONCE(sk->sk_backlog.len);
 	mem[SK_MEMINFO_DROPS] = atomic_read(&sk->sk_drops);
 }

net/dsa/dsa2.c+1−1

@@ -46,7 +46,7 @@ static struct dsa_switch_tree *dsa_tree_alloc(int index) · 45 unmodified lines
46	dst->index = index;	46	dst->index = index;
47		47
48	INIT_LIST_HEAD(&dst->list);	48	INIT_LIST_HEAD(&dst->list);
49	list_add_tail(&dsa_tree_list, &dst->list);	49	list_add_tail(&dst->list, &dsa_tree_list);
50		50
51	kref_init(&dst->refcount);	51	kref_init(&dst->refcount);
52		52

net/ipv4/inet_connection_sock.c+3−3

@@ -906,7 +906,7 @@ static void inet_child_forget(struct sock sk, struct request_sock req, · 905 unmodified lines
906	percpu_counter_inc(sk->sk_prot->orphan_count);	906	percpu_counter_inc(sk->sk_prot->orphan_count);
907		907
908	if (sk->sk_protocol == IPPROTO_TCP && tcp_rsk(req)->tfo_listener) {	908	if (sk->sk_protocol == IPPROTO_TCP && tcp_rsk(req)->tfo_listener) {
909	BUG_ON(tcp_sk(child)->fastopen_rsk != req);	909	BUG_ON(rcu_access_pointer(tcp_sk(child)->fastopen_rsk) != req);
910	BUG_ON(sk != req->rsk_listener);	910	BUG_ON(sk != req->rsk_listener);
911		911
912	/* Paranoid, to prevent race condition if	912	/* Paranoid, to prevent race condition if
@@ -915,7 +915,7 @@ static void inet_child_forget(struct sock sk, struct request_sock req, · 2 unmodified lines
915	* Also to satisfy an assertion in	915	* Also to satisfy an assertion in
916	* tcp_v4_destroy_sock().	916	* tcp_v4_destroy_sock().
917	*/	917	*/
918	tcp_sk(child)->fastopen_rsk = NULL;	918	RCU_INIT_POINTER(tcp_sk(child)->fastopen_rsk, NULL);
919	}	919	}
920	inet_csk_destroy_sock(child);	920	inet_csk_destroy_sock(child);
921	}	921	}
@@ -934,7 +934,7 @@ struct sock inet_csk_reqsk_queue_add(struct sock sk, · 12 unmodified lines
934	req->sk = child;	934	req->sk = child;
935	req->dl_next = NULL;	935	req->dl_next = NULL;
936	if (queue->rskq_accept_head == NULL)	936	if (queue->rskq_accept_head == NULL)
937	queue->rskq_accept_head = req;	937	WRITE_ONCE(queue->rskq_accept_head, req);
938	else	938	else
939	queue->rskq_accept_tail->dl_next = req;	939	queue->rskq_accept_tail->dl_next = req;
940	queue->rskq_accept_tail = req;	940	queue->rskq_accept_tail = req;

net/ipv4/inet_diag.c+1−1

@@ -193,7 +193,7 @@ int inet_sk_diag_fill(struct sock sk, struct inet_connection_sock icsk, · 192 unmodified lines
193	if (ext & (1 << (INET_DIAG_MEMINFO - 1))) {	193	if (ext & (1 << (INET_DIAG_MEMINFO - 1))) {
194	struct inet_diag_meminfo minfo = {	194	struct inet_diag_meminfo minfo = {
195	.idiag_rmem = sk_rmem_alloc_get(sk),	195	.idiag_rmem = sk_rmem_alloc_get(sk),
196	.idiag_wmem = sk->sk_wmem_queued,	196	.idiag_wmem = READ_ONCE(sk->sk_wmem_queued),
197	.idiag_fmem = sk->sk_forward_alloc,	197	.idiag_fmem = sk->sk_forward_alloc,
198	.idiag_tmem = sk_wmem_alloc_get(sk),	198	.idiag_tmem = sk_wmem_alloc_get(sk),
199	};	199	};

net/ipv4/ip_output.c+3−0

 	struct rtable *rt = skb_rtable(skb);
 	unsigned int mtu, hlen, ll_rs;
 	struct ip_fraglist_iter iter;
+	ktime_t tstamp = skb->tstamp;
 	struct ip_frag_state state;
 	int err = 0;
 				ip_fraglist_prepare(skb, &iter);
 			}
+			skb->tstamp = tstamp;
 			err = output(net, sk, skb);
 			if (!err)
 		/*
 		 *	Put this fragment into the sending queue.
 		 */
+		skb2->tstamp = tstamp;
 		err = output(net, sk, skb2);
 		if (err)
 			goto fail;

net/ipv4/route.c+7−4

 	prev = cmpxchg(p, orig, rt);
 	if (prev == orig) {
 		if (orig) {
-			dst_dev_put(&orig->dst);
+			rt_add_uncached_list(orig);
 			dst_release(&orig->dst);
 		}
 	} else {
 	int orig_oif = fl4->flowi4_oif;
 	unsigned int flags = 0;
 	struct rtable *rth;
-	int err = -ENETUNREACH;
+	int err;
 	if (fl4->saddr) {
-		rth = ERR_PTR(-EINVAL);
 		if (ipv4_is_multicast(fl4->saddr) ||
 		    ipv4_is_lbcast(fl4->saddr) ||
-		    ipv4_is_zeronet(fl4->saddr))
+		    ipv4_is_zeronet(fl4->saddr)) {
+			rth = ERR_PTR(-EINVAL);
 			goto out;
+		}
+		rth = ERR_PTR(-ENETUNREACH);
 		/* I removed check for oif == dev_out->oif here.
 		   It was wrong for two reasons:

net/ipv4/tcp.c+45−30

@@ -326,7 +326,7 @@ void tcp_enter_memory_pressure(struct sock *sk) · 325 unmodified lines
326	{	326	{
327	unsigned long val;	327	unsigned long val;
328		328
329	if (tcp_memory_pressure)	329	if (READ_ONCE(tcp_memory_pressure))
330	return;	330	return;
331	val = jiffies;	331	val = jiffies;
332		332
@@ -341,7 +341,7 @@ void tcp_leave_memory_pressure(struct sock *sk) · 8 unmodified lines
341	{	341	{
342	unsigned long val;	342	unsigned long val;
343		343
344	if (!tcp_memory_pressure)	344	if (!READ_ONCE(tcp_memory_pressure))
345	return;	345	return;
346	val = xchg(&tcp_memory_pressure, 0);	346	val = xchg(&tcp_memory_pressure, 0);
347	if (val)	347	if (val)
@@ -450,8 +450,8 @@ void tcp_init_sock(struct sock *sk) · 102 unmodified lines
450		450
451	icsk->icsk_sync_mss = tcp_sync_mss;	451	icsk->icsk_sync_mss = tcp_sync_mss;
452		452
453	sk->sk_sndbuf = sock_net(sk)->ipv4.sysctl_tcp_wmem[1];	453	WRITE_ONCE(sk->sk_sndbuf, sock_net(sk)->ipv4.sysctl_tcp_wmem[1]);
454	sk->sk_rcvbuf = sock_net(sk)->ipv4.sysctl_tcp_rmem[1];	454	WRITE_ONCE(sk->sk_rcvbuf, sock_net(sk)->ipv4.sysctl_tcp_rmem[1]);
455		455
456	sk_sockets_allocated_inc(sk);	456	sk_sockets_allocated_inc(sk);
457	sk->sk_route_forced_caps = NETIF_F_GSO;	457	sk->sk_route_forced_caps = NETIF_F_GSO;
@@ -477,7 +477,7 @@ static void tcp_tx_timestamp(struct sock *sk, u16 tsflags) · 19 unmodified lines
477	static inline bool tcp_stream_is_readable(const struct tcp_sock *tp,	477	static inline bool tcp_stream_is_readable(const struct tcp_sock *tp,
478	int target, struct sock *sk)	478	int target, struct sock *sk)
479	{	479	{
480	return (tp->rcv_nxt - tp->copied_seq >= target) \|\|	480	return (READ_ONCE(tp->rcv_nxt) - READ_ONCE(tp->copied_seq) >= target) \|\|
481	(sk->sk_prot->stream_memory_read ?	481	(sk->sk_prot->stream_memory_read ?
482	sk->sk_prot->stream_memory_read(sk) : false);	482	sk->sk_prot->stream_memory_read(sk) : false);
483	}	483	}
@@ -543,10 +543,10 @@ __poll_t tcp_poll(struct file file, struct socket sock, poll_table *wait) · 59 unmodified lines
543		543
544	/* Connected or passive Fast Open socket? */	544	/* Connected or passive Fast Open socket? */
545	if (state != TCP_SYN_SENT &&	545	if (state != TCP_SYN_SENT &&
546	(state != TCP_SYN_RECV \|\| tp->fastopen_rsk)) {	546	(state != TCP_SYN_RECV \|\| rcu_access_pointer(tp->fastopen_rsk))) {
547	int target = sock_rcvlowat(sk, 0, INT_MAX);	547	int target = sock_rcvlowat(sk, 0, INT_MAX);
548		548
549	if (tp->urg_seq == tp->copied_seq &&	549	if (READ_ONCE(tp->urg_seq) == READ_ONCE(tp->copied_seq) &&
550	!sock_flag(sk, SOCK_URGINLINE) &&	550	!sock_flag(sk, SOCK_URGINLINE) &&
551	tp->urg_data)	551	tp->urg_data)
552	target++;	552	target++;
@@ -607,7 +607,8 @@ int tcp_ioctl(struct sock *sk, int cmd, unsigned long arg) · 54 unmodified lines
607	unlock_sock_fast(sk, slow);	607	unlock_sock_fast(sk, slow);
608	break;	608	break;
609	case SIOCATMARK:	609	case SIOCATMARK:
610	answ = tp->urg_data && tp->urg_seq == tp->copied_seq;	610	answ = tp->urg_data &&
		611	READ_ONCE(tp->urg_seq) == READ_ONCE(tp->copied_seq);
611	break;	612	break;
612	case SIOCOUTQ:	613	case SIOCOUTQ:
613	if (sk->sk_state == TCP_LISTEN)	614	if (sk->sk_state == TCP_LISTEN)
@@ -616,7 +617,7 @@ int tcp_ioctl(struct sock *sk, int cmd, unsigned long arg) · 2 unmodified lines
616	if ((1 << sk->sk_state) & (TCPF_SYN_SENT \| TCPF_SYN_RECV))	617	if ((1 << sk->sk_state) & (TCPF_SYN_SENT \| TCPF_SYN_RECV))
617	answ = 0;	618	answ = 0;
618	else	619	else
619	answ = tp->write_seq - tp->snd_una;	620	answ = READ_ONCE(tp->write_seq) - tp->snd_una;
620	break;	621	break;
621	case SIOCOUTQNSD:	622	case SIOCOUTQNSD:
622	if (sk->sk_state == TCP_LISTEN)	623	if (sk->sk_state == TCP_LISTEN)
@@ -625,7 +626,8 @@ int tcp_ioctl(struct sock *sk, int cmd, unsigned long arg) · 2 unmodified lines
625	if ((1 << sk->sk_state) & (TCPF_SYN_SENT \| TCPF_SYN_RECV))	626	if ((1 << sk->sk_state) & (TCPF_SYN_SENT \| TCPF_SYN_RECV))
626	answ = 0;	627	answ = 0;
627	else	628	else
628	answ = tp->write_seq - tp->snd_nxt;	629	answ = READ_ONCE(tp->write_seq) -
		630	READ_ONCE(tp->snd_nxt);
629	break;	631	break;
630	default:	632	default:
631	return -ENOIOCTLCMD;	633	return -ENOIOCTLCMD;
@@ -657,7 +659,7 @@ static void skb_entail(struct sock sk, struct sk_buff skb) · 25 unmodified lines
657	tcb->sacked = 0;	659	tcb->sacked = 0;
658	__skb_header_release(skb);	660	__skb_header_release(skb);
659	tcp_add_write_queue_tail(sk, skb);	661	tcp_add_write_queue_tail(sk, skb);
660	sk->sk_wmem_queued += skb->truesize;	662	sk_wmem_queued_add(sk, skb->truesize);
661	sk_mem_charge(sk, skb->truesize);	663	sk_mem_charge(sk, skb->truesize);
662	if (tp->nonagle & TCP_NAGLE_PUSH)	664	if (tp->nonagle & TCP_NAGLE_PUSH)
663	tp->nonagle &= ~TCP_NAGLE_PUSH;	665	tp->nonagle &= ~TCP_NAGLE_PUSH;
@@ -1032,10 +1034,10 @@ new_segment: · 368 unmodified lines
1032	skb->len += copy;	1034	skb->len += copy;
1033	skb->data_len += copy;	1035	skb->data_len += copy;
1034	skb->truesize += copy;	1036	skb->truesize += copy;
1035	sk->sk_wmem_queued += copy;	1037	sk_wmem_queued_add(sk, copy);
1036	sk_mem_charge(sk, copy);	1038	sk_mem_charge(sk, copy);
1037	skb->ip_summed = CHECKSUM_PARTIAL;	1039	skb->ip_summed = CHECKSUM_PARTIAL;
1038	tp->write_seq += copy;	1040	WRITE_ONCE(tp->write_seq, tp->write_seq + copy);
1039	TCP_SKB_CB(skb)->end_seq += copy;	1041	TCP_SKB_CB(skb)->end_seq += copy;
1040	tcp_skb_pcount_set(skb, 0);	1042	tcp_skb_pcount_set(skb, 0);
1041		1043
@@ -1362,7 +1364,7 @@ new_segment: · 320 unmodified lines
1362	if (!copied)	1364	if (!copied)
1363	TCP_SKB_CB(skb)->tcp_flags &= ~TCPHDR_PSH;	1365	TCP_SKB_CB(skb)->tcp_flags &= ~TCPHDR_PSH;
1364		1366
1365	tp->write_seq += copy;	1367	WRITE_ONCE(tp->write_seq, tp->write_seq + copy);
1366	TCP_SKB_CB(skb)->end_seq += copy;	1368	TCP_SKB_CB(skb)->end_seq += copy;
1367	tcp_skb_pcount_set(skb, 0);	1369	tcp_skb_pcount_set(skb, 0);
1368		1370
@@ -1668,9 +1670,9 @@ int tcp_read_sock(struct sock sk, read_descriptor_t desc, · 299 unmodified lines
1668	sk_eat_skb(sk, skb);	1670	sk_eat_skb(sk, skb);
1669	if (!desc->count)	1671	if (!desc->count)
1670	break;	1672	break;
1671	tp->copied_seq = seq;	1673	WRITE_ONCE(tp->copied_seq, seq);
1672	}	1674	}
1673	tp->copied_seq = seq;	1675	WRITE_ONCE(tp->copied_seq, seq);
1674		1676
1675	tcp_rcv_space_adjust(sk);	1677	tcp_rcv_space_adjust(sk);
1676		1678
@@ -1699,7 +1701,7 @@ int tcp_set_rcvlowat(struct sock *sk, int val) · 22 unmodified lines
1699	else	1701	else
1700	cap = sock_net(sk)->ipv4.sysctl_tcp_rmem[2] >> 1;	1702	cap = sock_net(sk)->ipv4.sysctl_tcp_rmem[2] >> 1;
1701	val = min(val, cap);	1703	val = min(val, cap);
1702	sk->sk_rcvlowat = val ? : 1;	1704	WRITE_ONCE(sk->sk_rcvlowat, val ? : 1);
1703		1705
1704	/* Check if we need to signal EPOLLIN right now */	1706	/* Check if we need to signal EPOLLIN right now */
1705	tcp_data_ready(sk);	1707	tcp_data_ready(sk);
@@ -1709,7 +1711,7 @@ int tcp_set_rcvlowat(struct sock *sk, int val) · 3 unmodified lines
1709		1711
1710	val <<= 1;	1712	val <<= 1;
1711	if (val > sk->sk_rcvbuf) {	1713	if (val > sk->sk_rcvbuf) {
1712	sk->sk_rcvbuf = val;	1714	WRITE_ONCE(sk->sk_rcvbuf, val);
1713	tcp_sk(sk)->window_clamp = tcp_win_from_space(sk, val);	1715	tcp_sk(sk)->window_clamp = tcp_win_from_space(sk, val);
1714	}	1716	}
1715	return 0;	1717	return 0;
@@ -1819,7 +1821,7 @@ static int tcp_zerocopy_receive(struct sock *sk, · 103 unmodified lines
1819	out:	1821	out:
1820	up_read(&current->mm->mmap_sem);	1822	up_read(&current->mm->mmap_sem);
1821	if (length) {	1823	if (length) {
1822	tp->copied_seq = seq;	1824	WRITE_ONCE(tp->copied_seq, seq);
1823	tcp_rcv_space_adjust(sk);	1825	tcp_rcv_space_adjust(sk);
1824		1826
1825	/* Clean up data we have read: This will do ACK frames. */	1827	/* Clean up data we have read: This will do ACK frames. */
@@ -2117,7 +2119,7 @@ found_ok_skb: · 291 unmodified lines
2117	if (urg_offset < used) {	2119	if (urg_offset < used) {
2118	if (!urg_offset) {	2120	if (!urg_offset) {
2119	if (!sock_flag(sk, SOCK_URGINLINE)) {	2121	if (!sock_flag(sk, SOCK_URGINLINE)) {
2120	++*seq;	2122	WRITE_ONCE(seq, seq + 1);
2121	urg_hole++;	2123	urg_hole++;
2122	offset++;	2124	offset++;
2123	used--;	2125	used--;
@@ -2139,7 +2141,7 @@ found_ok_skb: · 15 unmodified lines
2139	}	2141	}
2140	}	2142	}
2141		2143
2142	*seq += used;	2144	WRITE_ONCE(seq, seq + used);
2143	copied += used;	2145	copied += used;
2144	len -= used;	2146	len -= used;
2145		2147
@@ -2166,7 +2168,7 @@ skip_copy: · 20 unmodified lines
2166		2168
2167	found_fin_ok:	2169	found_fin_ok:
2168	/* Process the FIN. */	2170	/* Process the FIN. */
2169	++*seq;	2171	WRITE_ONCE(seq, seq + 1);
2170	if (!(flags & MSG_PEEK))	2172	if (!(flags & MSG_PEEK))
2171	sk_eat_skb(sk, skb);	2173	sk_eat_skb(sk, skb);
2172	break;	2174	break;
@@ -2487,7 +2489,10 @@ adjudge_to_death: · 314 unmodified lines
2487	}	2489	}
2488		2490
2489	if (sk->sk_state == TCP_CLOSE) {	2491	if (sk->sk_state == TCP_CLOSE) {
2490	struct request_sock *req = tcp_sk(sk)->fastopen_rsk;	2492	struct request_sock *req;
		2493
		2494	req = rcu_dereference_protected(tcp_sk(sk)->fastopen_rsk,
		2495	lockdep_sock_is_held(sk));
2491	/* We could get here with a non-NULL req if the socket is	2496	/* We could get here with a non-NULL req if the socket is
2492	* aborted (e.g., closed with unread data) before 3WHS	2497	* aborted (e.g., closed with unread data) before 3WHS
2493	* finishes.	2498	* finishes.
@@ -2559,6 +2564,7 @@ int tcp_disconnect(struct sock *sk, int flags) · 65 unmodified lines
2559	struct inet_connection_sock *icsk = inet_csk(sk);	2564	struct inet_connection_sock *icsk = inet_csk(sk);
2560	struct tcp_sock *tp = tcp_sk(sk);	2565	struct tcp_sock *tp = tcp_sk(sk);
2561	int old_state = sk->sk_state;	2566	int old_state = sk->sk_state;
		2567	u32 seq;
2562		2568
2563	if (old_state != TCP_CLOSE)	2569	if (old_state != TCP_CLOSE)
2564	tcp_set_state(sk, TCP_CLOSE);	2570	tcp_set_state(sk, TCP_CLOSE);
@@ -2585,7 +2591,7 @@ int tcp_disconnect(struct sock *sk, int flags) · 20 unmodified lines
2585	__kfree_skb(sk->sk_rx_skb_cache);	2591	__kfree_skb(sk->sk_rx_skb_cache);
2586	sk->sk_rx_skb_cache = NULL;	2592	sk->sk_rx_skb_cache = NULL;
2587	}	2593	}
2588	tp->copied_seq = tp->rcv_nxt;	2594	WRITE_ONCE(tp->copied_seq, tp->rcv_nxt);
2589	tp->urg_data = 0;	2595	tp->urg_data = 0;
2590	tcp_write_queue_purge(sk);	2596	tcp_write_queue_purge(sk);
2591	tcp_fastopen_active_disable_ofo_check(sk);	2597	tcp_fastopen_active_disable_ofo_check(sk);
@@ -2601,9 +2607,12 @@ int tcp_disconnect(struct sock *sk, int flags) · 9 unmodified lines
2601	tp->srtt_us = 0;	2607	tp->srtt_us = 0;
2602	tp->mdev_us = jiffies_to_usecs(TCP_TIMEOUT_INIT);	2608	tp->mdev_us = jiffies_to_usecs(TCP_TIMEOUT_INIT);
2603	tp->rcv_rtt_last_tsecr = 0;	2609	tp->rcv_rtt_last_tsecr = 0;
2604	tp->write_seq += tp->max_window + 2;	2610
2605	if (tp->write_seq == 0)	2611	seq = tp->write_seq + tp->max_window + 2;
2606	tp->write_seq = 1;	2612	if (!seq)
		2613	seq = 1;
		2614	WRITE_ONCE(tp->write_seq, seq);
		2615
2607	icsk->icsk_backoff = 0;	2616	icsk->icsk_backoff = 0;
2608	tp->snd_cwnd = 2;	2617	tp->snd_cwnd = 2;
2609	icsk->icsk_probes_out = 0;	2618	icsk->icsk_probes_out = 0;
@@ -2930,9 +2939,9 @@ static int do_tcp_setsockopt(struct sock *sk, int level, · 320 unmodified lines
2930	if (sk->sk_state != TCP_CLOSE)	2939	if (sk->sk_state != TCP_CLOSE)
2931	err = -EPERM;	2940	err = -EPERM;
2932	else if (tp->repair_queue == TCP_SEND_QUEUE)	2941	else if (tp->repair_queue == TCP_SEND_QUEUE)
2933	tp->write_seq = val;	2942	WRITE_ONCE(tp->write_seq, val);
2934	else if (tp->repair_queue == TCP_RECV_QUEUE)	2943	else if (tp->repair_queue == TCP_RECV_QUEUE)
2935	tp->rcv_nxt = val;	2944	WRITE_ONCE(tp->rcv_nxt, val);
2936	else	2945	else
2937	err = -EINVAL;	2946	err = -EINVAL;
2938	break;	2947	break;
@@ -3831,7 +3840,13 @@ EXPORT_SYMBOL(tcp_md5_hash_key); · 892 unmodified lines
3831		3840
3832	void tcp_done(struct sock *sk)	3841	void tcp_done(struct sock *sk)
3833	{	3842	{
3834	struct request_sock *req = tcp_sk(sk)->fastopen_rsk;	3843	struct request_sock *req;
		3844
		3845	/* We might be called with a new socket, after
		3846	* inet_csk_prepare_forced_close() has been called
		3847	* so we can not use lockdep_sock_is_held(sk)
		3848	*/
		3849	req = rcu_dereference_protected(tcp_sk(sk)->fastopen_rsk, 1);
3835		3850
3836	if (sk->sk_state == TCP_SYN_SENT \|\| sk->sk_state == TCP_SYN_RECV)	3851	if (sk->sk_state == TCP_SYN_SENT \|\| sk->sk_state == TCP_SYN_RECV)
3837	TCP_INC_STATS(sock_net(sk), TCP_MIB_ATTEMPTFAILS);	3852	TCP_INC_STATS(sock_net(sk), TCP_MIB_ATTEMPTFAILS);

net/ipv4/tcp_diag.c+3−2

 	} else if (sk->sk_type == SOCK_STREAM) {
 		const struct tcp_sock *tp = tcp_sk(sk);
-		r->idiag_rqueue = max_t(int, tp->rcv_nxt - tp->copied_seq, 0);
+		r->idiag_rqueue = max_t(int, READ_ONCE(tp->rcv_nxt) -
-		r->idiag_wqueue = tp->write_seq - tp->snd_una;
+					     READ_ONCE(tp->copied_seq), 0);
+		r->idiag_wqueue = READ_ONCE(tp->write_seq) - tp->snd_una;
 	}
 	if (info)
 		tcp_get_info(sk, info);

net/ipv4/tcp_fastopen.c+1−1

@@ -253,7 +253,7 @@ static struct sock tcp_fastopen_create_child(struct sock sk, · 252 unmodified lines
253	*/	253	*/
254	tp = tcp_sk(child);	254	tp = tcp_sk(child);
255		255
256	tp->fastopen_rsk = req;	256	rcu_assign_pointer(tp->fastopen_rsk, req);
257	tcp_rsk(req)->tfo_listener = true;	257	tcp_rsk(req)->tfo_listener = true;
258		258
259	/* RFC1323: The window in SYN & SYN/ACK segments is never	259	/* RFC1323: The window in SYN & SYN/ACK segments is never

net/ipv4/tcp_input.c+22−15

 	sndmem *= nr_segs * per_mss;
 	if (sk->sk_sndbuf < sndmem)
-		sk->sk_sndbuf = min(sndmem, sock_net(sk)->ipv4.sysctl_tcp_wmem[2]);
+		WRITE_ONCE(sk->sk_sndbuf,
+			   min(sndmem, sock_net(sk)->ipv4.sysctl_tcp_wmem[2]));
 }
 /* 2. Tuning advertised window (window_clamp, rcv_ssthresh)
 	    !(sk->sk_userlocks & SOCK_RCVBUF_LOCK) &&
 	    !tcp_under_memory_pressure(sk) &&
 	    sk_memory_allocated(sk) < sk_prot_mem_limits(sk, 0)) {
-		sk->sk_rcvbuf = min(atomic_read(&sk->sk_rmem_alloc),
+		WRITE_ONCE(sk->sk_rcvbuf,
-				    net->ipv4.sysctl_tcp_rmem[2]);
+			   min(atomic_read(&sk->sk_rmem_alloc),
+			       net->ipv4.sysctl_tcp_rmem[2]));
 	}
 	if (atomic_read(&sk->sk_rmem_alloc) > sk->sk_rcvbuf)
 		tp->rcv_ssthresh = min(tp->window_clamp, 2U * tp->advmss);
 		rcvbuf = min_t(u64, rcvwin * rcvmem,
 			       sock_net(sk)->ipv4.sysctl_tcp_rmem[2]);
 		if (rcvbuf > sk->sk_rcvbuf) {
-			sk->sk_rcvbuf = rcvbuf;
+			WRITE_ONCE(sk->sk_rcvbuf, rcvbuf);
 			/* Make the window clamp follow along.  */
 			tp->window_clamp = tcp_win_from_space(sk, rcvbuf);
 	struct tcp_sock *tp = tcp_sk(sk);
 	bool recovered = !before(tp->snd_una, tp->high_seq);
-	if ((flag & FLAG_SND_UNA_ADVANCED || tp->fastopen_rsk) &&
+	if ((flag & FLAG_SND_UNA_ADVANCED || rcu_access_pointer(tp->fastopen_rsk)) &&
 	    tcp_try_undo_loss(sk, false))
 		return;
 	/* If the retrans timer is currently being used by Fast Open
 	 * for SYN-ACK retrans purpose, stay put.
 	 */
-	if (tp->fastopen_rsk)
+	if (rcu_access_pointer(tp->fastopen_rsk))
 		return;
 	if (!tp->packets_out) {
 	sock_owned_by_me((struct sock *)tp);
 	tp->bytes_received += delta;
-	tp->rcv_nxt = seq;
+	WRITE_ONCE(tp->rcv_nxt, seq);
 }
 /* Update our send window.
 	}
 	tp->urg_data = TCP_URG_NOTYET;
-	tp->urg_seq = ptr;
+	WRITE_ONCE(tp->urg_seq, ptr);
 	/* Disable header prediction. */
 	tp->pred_flags = 0;
 		/* Ok.. it's good. Set up sequence numbers and
 		 * move to established.
 		 */
-		tp->rcv_nxt = TCP_SKB_CB(skb)->seq + 1;
+		WRITE_ONCE(tp->rcv_nxt, TCP_SKB_CB(skb)->seq + 1);
 		tp->rcv_wup = TCP_SKB_CB(skb)->seq + 1;
 		/* RFC1323: The window in SYN & SYN/ACK segments is
 		/* Remember, tcp_poll() does not lock socket!
 		 * Change state from SYN-SENT only after copied_seq
 		 * is initialized. */
-		tp->copied_seq = tp->rcv_nxt;
+		WRITE_ONCE(tp->copied_seq, tp->rcv_nxt);
 		smc_check_reset_syn(tp);
 			tp->tcp_header_len = sizeof(struct tcphdr);
 		}
-		tp->rcv_nxt = TCP_SKB_CB(skb)->seq + 1;
+		WRITE_ONCE(tp->rcv_nxt, TCP_SKB_CB(skb)->seq + 1);
-		tp->copied_seq = tp->rcv_nxt;
+		WRITE_ONCE(tp->copied_seq, tp->rcv_nxt);
 		tp->rcv_wup = TCP_SKB_CB(skb)->seq + 1;
 		/* RFC1323: The window in SYN & SYN/ACK segments is
 static void tcp_rcv_synrecv_state_fastopen(struct sock *sk)
 {
+	struct request_sock *req;
 	tcp_try_undo_loss(sk, false);
 	/* Reset rtx states to prevent spurious retransmits_timed_out() */
 	/* Once we leave TCP_SYN_RECV or TCP_FIN_WAIT_1,
 	 * we no longer need req so release it.
 	 */
-	reqsk_fastopen_remove(sk, tcp_sk(sk)->fastopen_rsk, false);
+	req = rcu_dereference_protected(tcp_sk(sk)->fastopen_rsk,
+					lockdep_sock_is_held(sk));
+	reqsk_fastopen_remove(sk, req, false);
 	/* Re-arm the timer because data may have been sent out.
 	 * This is similar to the regular data transmission case
 	tcp_mstamp_refresh(tp);
 	tp->rx_opt.saw_tstamp = 0;
-	req = tp->fastopen_rsk;
+	req = rcu_dereference_protected(tp->fastopen_rsk,
+					lockdep_sock_is_held(sk));
 	if (req) {
 		bool req_stolen;
 			tcp_try_undo_spurious_syn(sk);
 			tp->retrans_stamp = 0;
 			tcp_init_transfer(sk, BPF_SOCK_OPS_PASSIVE_ESTABLISHED_CB);
-			tp->copied_seq = tp->rcv_nxt;
+			WRITE_ONCE(tp->copied_seq, tp->rcv_nxt);
 		}
 		smp_mb();
 		tcp_set_state(sk, TCP_ESTABLISHED);

net/ipv4/tcp_ipv4.c+17−13

@@ -164,9 +164,11 @@ int tcp_twsk_unique(struct sock sk, struct sock sktw, void *twp) · 163 unmodified lines
164	* without appearing to create any others.	164	* without appearing to create any others.
165	*/	165	*/
166	if (likely(!tp->repair)) {	166	if (likely(!tp->repair)) {
167	tp->write_seq = tcptw->tw_snd_nxt + 65535 + 2;	167	u32 seq = tcptw->tw_snd_nxt + 65535 + 2;
168	if (tp->write_seq == 0)	168
169	tp->write_seq = 1;	169	if (!seq)
		170	seq = 1;
		171	WRITE_ONCE(tp->write_seq, seq);
170	tp->rx_opt.ts_recent = tcptw->tw_ts_recent;	172	tp->rx_opt.ts_recent = tcptw->tw_ts_recent;
171	tp->rx_opt.ts_recent_stamp = tcptw->tw_ts_recent_stamp;	173	tp->rx_opt.ts_recent_stamp = tcptw->tw_ts_recent_stamp;
172	}	174	}
@@ -253,7 +255,7 @@ int tcp_v4_connect(struct sock sk, struct sockaddr uaddr, int addr_len) · 80 unmodified lines
253	tp->rx_opt.ts_recent = 0;	255	tp->rx_opt.ts_recent = 0;
254	tp->rx_opt.ts_recent_stamp = 0;	256	tp->rx_opt.ts_recent_stamp = 0;
255	if (likely(!tp->repair))	257	if (likely(!tp->repair))
256	tp->write_seq = 0;	258	WRITE_ONCE(tp->write_seq, 0);
257	}	259	}
258		260
259	inet->inet_dport = usin->sin_port;	261	inet->inet_dport = usin->sin_port;
@@ -291,10 +293,11 @@ int tcp_v4_connect(struct sock sk, struct sockaddr uaddr, int addr_len) · 31 unmodified lines
291		293
292	if (likely(!tp->repair)) {	294	if (likely(!tp->repair)) {
293	if (!tp->write_seq)	295	if (!tp->write_seq)
294	tp->write_seq = secure_tcp_seq(inet->inet_saddr,	296	WRITE_ONCE(tp->write_seq,
295	inet->inet_daddr,	297	secure_tcp_seq(inet->inet_saddr,
296	inet->inet_sport,	298	inet->inet_daddr,
297	usin->sin_port);	299	inet->inet_sport,
		300	usin->sin_port));
298	tp->tsoffset = secure_tcp_ts_off(sock_net(sk),	301	tp->tsoffset = secure_tcp_ts_off(sock_net(sk),
299	inet->inet_saddr,	302	inet->inet_saddr,
300	inet->inet_daddr);	303	inet->inet_daddr);
@@ -478,7 +481,7 @@ int tcp_v4_err(struct sk_buff *icmp_skb, u32 info) · 177 unmodified lines
478	icsk = inet_csk(sk);	481	icsk = inet_csk(sk);
479	tp = tcp_sk(sk);	482	tp = tcp_sk(sk);
480	/* XXX (TFO) - tp->snd_una should be ISN (tcp_create_openreq_child() */	483	/* XXX (TFO) - tp->snd_una should be ISN (tcp_create_openreq_child() */
481	fastopen = tp->fastopen_rsk;	484	fastopen = rcu_dereference(tp->fastopen_rsk);
482	snd_una = fastopen ? tcp_rsk(fastopen)->snt_isn : tp->snd_una;	485	snd_una = fastopen ? tcp_rsk(fastopen)->snt_isn : tp->snd_una;
483	if (sk->sk_state != TCP_LISTEN &&	486	if (sk->sk_state != TCP_LISTEN &&
484	!between(seq, snd_una, tp->snd_nxt)) {	487	!between(seq, snd_una, tp->snd_nxt)) {
@@ -1644,7 +1647,7 @@ int tcp_v4_early_demux(struct sk_buff *skb) · 1159 unmodified lines
1644		1647
1645	bool tcp_add_backlog(struct sock sk, struct sk_buff skb)	1648	bool tcp_add_backlog(struct sock sk, struct sk_buff skb)
1646	{	1649	{
1647	u32 limit = sk->sk_rcvbuf + sk->sk_sndbuf;	1650	u32 limit = READ_ONCE(sk->sk_rcvbuf) + READ_ONCE(sk->sk_sndbuf);
1648	struct skb_shared_info *shinfo;	1651	struct skb_shared_info *shinfo;
1649	const struct tcphdr *th;	1652	const struct tcphdr *th;
1650	struct tcphdr *thtail;	1653	struct tcphdr *thtail;
@@ -2121,7 +2124,7 @@ void tcp_v4_destroy_sock(struct sock *sk) · 470 unmodified lines
2121	if (inet_csk(sk)->icsk_bind_hash)	2124	if (inet_csk(sk)->icsk_bind_hash)
2122	inet_put_port(sk);	2125	inet_put_port(sk);
2123		2126
2124	BUG_ON(tp->fastopen_rsk);	2127	BUG_ON(rcu_access_pointer(tp->fastopen_rsk));
2125		2128
2126	/* If socket is aborted during connect operation */	2129	/* If socket is aborted during connect operation */
2127	tcp_free_fastopen_req(tp);	2130	tcp_free_fastopen_req(tp);
@@ -2455,12 +2458,13 @@ static void get_tcp4_sock(struct sock sk, struct seq_file f, int i) · 327 unmodified lines
2455	/* Because we don't lock the socket,	2458	/* Because we don't lock the socket,
2456	* we might find a transient negative value.	2459	* we might find a transient negative value.
2457	*/	2460	*/
2458	rx_queue = max_t(int, tp->rcv_nxt - tp->copied_seq, 0);	2461	rx_queue = max_t(int, READ_ONCE(tp->rcv_nxt) -
		2462	READ_ONCE(tp->copied_seq), 0);
2459		2463
2460	seq_printf(f, "%4d: %08X:%04X %08X:%04X %02X %08X:%08X %02X:%08lX "	2464	seq_printf(f, "%4d: %08X:%04X %08X:%04X %02X %08X:%08X %02X:%08lX "
2461	"%08X %5u %8d %lu %d %pK %lu %lu %u %u %d",	2465	"%08X %5u %8d %lu %d %pK %lu %lu %u %u %d",
2462	i, src, srcp, dest, destp, state,	2466	i, src, srcp, dest, destp, state,
2463	tp->write_seq - tp->snd_una,	2467	READ_ONCE(tp->write_seq) - tp->snd_una,
2464	rx_queue,	2468	rx_queue,
2465	timer_active,	2469	timer_active,
2466	jiffies_delta_to_clock_t(timer_expires - jiffies),	2470	jiffies_delta_to_clock_t(timer_expires - jiffies),

net/ipv4/tcp_minisocks.c+11−6

 	struct tcp_request_sock *treq = tcp_rsk(req);
 	struct inet_connection_sock *newicsk;
 	struct tcp_sock *oldtp, *newtp;
+	u32 seq;
 	if (!newsk)
 		return NULL;
 	/* Now setup tcp_sock */
 	newtp->pred_flags = 0;
-	newtp->rcv_wup = newtp->copied_seq =
+	seq = treq->rcv_isn + 1;
-	newtp->rcv_nxt = treq->rcv_isn + 1;
+	newtp->rcv_wup = seq;
+	WRITE_ONCE(newtp->copied_seq, seq);
+	WRITE_ONCE(newtp->rcv_nxt, seq);
 	newtp->segs_in = 1;
-	newtp->snd_sml = newtp->snd_una =
+	seq = treq->snt_isn + 1;
-	newtp->snd_nxt = newtp->snd_up = treq->snt_isn + 1;
+	newtp->snd_sml = newtp->snd_una = seq;
+	WRITE_ONCE(newtp->snd_nxt, seq);
+	newtp->snd_up = seq;
 	INIT_LIST_HEAD(&newtp->tsq_node);
 	INIT_LIST_HEAD(&newtp->tsorted_sent_queue);
 	newtp->total_retrans = req->num_retrans;
 	tcp_init_xmit_timers(newsk);
-	newtp->write_seq = newtp->pushed_seq = treq->snt_isn + 1;
+	WRITE_ONCE(newtp->write_seq, newtp->pushed_seq = treq->snt_isn + 1);
 	if (sock_flag(newsk, SOCK_KEEPOPEN))
 		inet_csk_reset_keepalive_timer(newsk,
 	newtp->rx_opt.mss_clamp = req->mss;
 	tcp_ecn_openreq_child(newtp, req);
 	newtp->fastopen_req = NULL;
-	newtp->fastopen_rsk = NULL;
+	RCU_INIT_POINTER(newtp->fastopen_rsk, NULL);
 	__TCP_INC_STATS(sock_net(sk), TCP_MIB_PASSIVEOPENS);

net/ipv4/tcp_output.c+16−16

@@ -67,7 +67,7 @@ static void tcp_event_new_data_sent(struct sock sk, struct sk_buff skb) · 66 unmodified lines
67	struct tcp_sock *tp = tcp_sk(sk);	67	struct tcp_sock *tp = tcp_sk(sk);
68	unsigned int prior_packets = tp->packets_out;	68	unsigned int prior_packets = tp->packets_out;
69		69
70	tp->snd_nxt = TCP_SKB_CB(skb)->end_seq;	70	WRITE_ONCE(tp->snd_nxt, TCP_SKB_CB(skb)->end_seq);
71		71
72	__skb_unlink(skb, &sk->sk_write_queue);	72	__skb_unlink(skb, &sk->sk_write_queue);
73	tcp_rbtree_insert(&sk->tcp_rtx_queue, skb);	73	tcp_rbtree_insert(&sk->tcp_rtx_queue, skb);
@@ -1196,10 +1196,10 @@ static void tcp_queue_skb(struct sock sk, struct sk_buff skb) · 1122 unmodified lines
1196	struct tcp_sock *tp = tcp_sk(sk);	1196	struct tcp_sock *tp = tcp_sk(sk);
1197		1197
1198	/* Advance write_seq and place onto the write_queue. */	1198	/* Advance write_seq and place onto the write_queue. */
1199	tp->write_seq = TCP_SKB_CB(skb)->end_seq;	1199	WRITE_ONCE(tp->write_seq, TCP_SKB_CB(skb)->end_seq);
1200	__skb_header_release(skb);	1200	__skb_header_release(skb);
1201	tcp_add_write_queue_tail(sk, skb);	1201	tcp_add_write_queue_tail(sk, skb);
1202	sk->sk_wmem_queued += skb->truesize;	1202	sk_wmem_queued_add(sk, skb->truesize);
1203	sk_mem_charge(sk, skb->truesize);	1203	sk_mem_charge(sk, skb->truesize);
1204	}	1204	}
1205		1205
@@ -1333,7 +1333,7 @@ int tcp_fragment(struct sock *sk, enum tcp_queue tcp_queue, · 127 unmodified lines
1333	return -ENOMEM; /* We'll just try again later. */	1333	return -ENOMEM; /* We'll just try again later. */
1334	skb_copy_decrypted(buff, skb);	1334	skb_copy_decrypted(buff, skb);
1335		1335
1336	sk->sk_wmem_queued += buff->truesize;	1336	sk_wmem_queued_add(sk, buff->truesize);
1337	sk_mem_charge(sk, buff->truesize);	1337	sk_mem_charge(sk, buff->truesize);
1338	nlen = skb->len - len - nsize;	1338	nlen = skb->len - len - nsize;
1339	buff->truesize += nlen;	1339	buff->truesize += nlen;
@@ -1443,7 +1443,7 @@ int tcp_trim_head(struct sock sk, struct sk_buff skb, u32 len) · 103 unmodified lines
1443		1443
1444	if (delta_truesize) {	1444	if (delta_truesize) {
1445	skb->truesize -= delta_truesize;	1445	skb->truesize -= delta_truesize;
1446	sk->sk_wmem_queued -= delta_truesize;	1446	sk_wmem_queued_add(sk, -delta_truesize);
1447	sk_mem_uncharge(sk, delta_truesize);	1447	sk_mem_uncharge(sk, delta_truesize);
1448	sock_set_flag(sk, SOCK_QUEUE_SHRUNK);	1448	sock_set_flag(sk, SOCK_QUEUE_SHRUNK);
1449	}	1449	}
@@ -1888,7 +1888,7 @@ static int tso_fragment(struct sock sk, struct sk_buff skb, unsigned int len, · 438 unmodified lines
1888	return -ENOMEM;	1888	return -ENOMEM;
1889	skb_copy_decrypted(buff, skb);	1889	skb_copy_decrypted(buff, skb);
1890		1890
1891	sk->sk_wmem_queued += buff->truesize;	1891	sk_wmem_queued_add(sk, buff->truesize);
1892	sk_mem_charge(sk, buff->truesize);	1892	sk_mem_charge(sk, buff->truesize);
1893	buff->truesize += nlen;	1893	buff->truesize += nlen;
1894	skb->truesize -= nlen;	1894	skb->truesize -= nlen;
@@ -2152,7 +2152,7 @@ static int tcp_mtu_probe(struct sock *sk) · 257 unmodified lines
2152	nskb = sk_stream_alloc_skb(sk, probe_size, GFP_ATOMIC, false);	2152	nskb = sk_stream_alloc_skb(sk, probe_size, GFP_ATOMIC, false);
2153	if (!nskb)	2153	if (!nskb)
2154	return -1;	2154	return -1;
2155	sk->sk_wmem_queued += nskb->truesize;	2155	sk_wmem_queued_add(sk, nskb->truesize);
2156	sk_mem_charge(sk, nskb->truesize);	2156	sk_mem_charge(sk, nskb->truesize);
2157		2157
2158	skb = tcp_send_head(sk);	2158	skb = tcp_send_head(sk);
@@ -2482,7 +2482,7 @@ bool tcp_schedule_loss_probe(struct sock *sk, bool advancing_rto) · 323 unmodified lines
2482	/* Don't do any loss probe on a Fast Open connection before 3WHS	2482	/* Don't do any loss probe on a Fast Open connection before 3WHS
2483	* finishes.	2483	* finishes.
2484	*/	2484	*/
2485	if (tp->fastopen_rsk)	2485	if (rcu_access_pointer(tp->fastopen_rsk))
2486	return false;	2486	return false;
2487		2487
2488	early_retrans = sock_net(sk)->ipv4.sysctl_tcp_early_retrans;	2488	early_retrans = sock_net(sk)->ipv4.sysctl_tcp_early_retrans;
@@ -3142,7 +3142,7 @@ void tcp_send_fin(struct sock *sk) · 653 unmodified lines
3142	* if FIN had been sent. This is because retransmit path	3142	* if FIN had been sent. This is because retransmit path
3143	* does not change tp->snd_nxt.	3143	* does not change tp->snd_nxt.
3144	*/	3144	*/
3145	tp->snd_nxt++;	3145	WRITE_ONCE(tp->snd_nxt, tp->snd_nxt + 1);
3146	return;	3146	return;
3147	}	3147	}
3148	} else {	3148	} else {
@@ -3222,7 +3222,7 @@ int tcp_send_synack(struct sock *sk) · 73 unmodified lines
3222	tcp_rtx_queue_unlink_and_free(skb, sk);	3222	tcp_rtx_queue_unlink_and_free(skb, sk);
3223	__skb_header_release(nskb);	3223	__skb_header_release(nskb);
3224	tcp_rbtree_insert(&sk->tcp_rtx_queue, nskb);	3224	tcp_rbtree_insert(&sk->tcp_rtx_queue, nskb);
3225	sk->sk_wmem_queued += nskb->truesize;	3225	sk_wmem_queued_add(sk, nskb->truesize);
3226	sk_mem_charge(sk, nskb->truesize);	3226	sk_mem_charge(sk, nskb->truesize);
3227	skb = nskb;	3227	skb = nskb;
3228	}	3228	}
@@ -3426,14 +3426,14 @@ static void tcp_connect_init(struct sock *sk) · 197 unmodified lines
3426	tp->snd_una = tp->write_seq;	3426	tp->snd_una = tp->write_seq;
3427	tp->snd_sml = tp->write_seq;	3427	tp->snd_sml = tp->write_seq;
3428	tp->snd_up = tp->write_seq;	3428	tp->snd_up = tp->write_seq;
3429	tp->snd_nxt = tp->write_seq;	3429	WRITE_ONCE(tp->snd_nxt, tp->write_seq);
3430		3430
3431	if (likely(!tp->repair))	3431	if (likely(!tp->repair))
3432	tp->rcv_nxt = 0;	3432	tp->rcv_nxt = 0;
3433	else	3433	else
3434	tp->rcv_tstamp = tcp_jiffies32;	3434	tp->rcv_tstamp = tcp_jiffies32;
3435	tp->rcv_wup = tp->rcv_nxt;	3435	tp->rcv_wup = tp->rcv_nxt;
3436	tp->copied_seq = tp->rcv_nxt;	3436	WRITE_ONCE(tp->copied_seq, tp->rcv_nxt);
3437		3437
3438	inet_csk(sk)->icsk_rto = tcp_timeout_init(sk);	3438	inet_csk(sk)->icsk_rto = tcp_timeout_init(sk);
3439	inet_csk(sk)->icsk_retransmits = 0;	3439	inet_csk(sk)->icsk_retransmits = 0;
@@ -3447,9 +3447,9 @@ static void tcp_connect_queue_skb(struct sock sk, struct sk_buff skb) · 7 unmodified lines
3447		3447
3448	tcb->end_seq += skb->len;	3448	tcb->end_seq += skb->len;
3449	__skb_header_release(skb);	3449	__skb_header_release(skb);
3450	sk->sk_wmem_queued += skb->truesize;	3450	sk_wmem_queued_add(sk, skb->truesize);
3451	sk_mem_charge(sk, skb->truesize);	3451	sk_mem_charge(sk, skb->truesize);
3452	tp->write_seq = tcb->end_seq;	3452	WRITE_ONCE(tp->write_seq, tcb->end_seq);
3453	tp->packets_out += tcp_skb_pcount(skb);	3453	tp->packets_out += tcp_skb_pcount(skb);
3454	}	3454	}
3455		3455
@@ -3586,11 +3586,11 @@ int tcp_connect(struct sock *sk) · 130 unmodified lines
3586	/* We change tp->snd_nxt after the tcp_transmit_skb() call	3586	/* We change tp->snd_nxt after the tcp_transmit_skb() call
3587	* in order to make this packet get counted in tcpOutSegs.	3587	* in order to make this packet get counted in tcpOutSegs.
3588	*/	3588	*/
3589	tp->snd_nxt = tp->write_seq;	3589	WRITE_ONCE(tp->snd_nxt, tp->write_seq);
3590	tp->pushed_seq = tp->write_seq;	3590	tp->pushed_seq = tp->write_seq;
3591	buff = tcp_send_head(sk);	3591	buff = tcp_send_head(sk);
3592	if (unlikely(buff)) {	3592	if (unlikely(buff)) {
3593	tp->snd_nxt = TCP_SKB_CB(buff)->seq;	3593	WRITE_ONCE(tp->snd_nxt, TCP_SKB_CB(buff)->seq);
3594	tp->pushed_seq = TCP_SKB_CB(buff)->seq;	3594	tp->pushed_seq = TCP_SKB_CB(buff)->seq;
3595	}	3595	}
3596	TCP_INC_STATS(sock_net(sk), TCP_MIB_ACTIVEOPENS);	3596	TCP_INC_STATS(sock_net(sk), TCP_MIB_ACTIVEOPENS);

net/ipv4/tcp_timer.c+6−5

  *	Timer for Fast Open socket to retransmit SYNACK. Note that the
  *	sk here is the child socket, not the parent (listener) socket.
  */
-static void tcp_fastopen_synack_timer(struct sock *sk)
+static void tcp_fastopen_synack_timer(struct sock *sk, struct request_sock *req)
 {
 	struct inet_connection_sock *icsk = inet_csk(sk);
 	int max_retries = icsk->icsk_syn_retries ? :
 	    sock_net(sk)->ipv4.sysctl_tcp_synack_retries + 1; /* add one more retry for fastopen */
 	struct tcp_sock *tp = tcp_sk(sk);
-	struct request_sock *req;
-	req = tcp_sk(sk)->fastopen_rsk;
 	req->rsk_ops->syn_ack_timeout(req);
 	if (req->num_timeout >= max_retries) {
 	struct tcp_sock *tp = tcp_sk(sk);
 	struct net *net = sock_net(sk);
 	struct inet_connection_sock *icsk = inet_csk(sk);
+	struct request_sock *req;
-	if (tp->fastopen_rsk) {
+	req = rcu_dereference_protected(tp->fastopen_rsk,
+					lockdep_sock_is_held(sk));
+	if (req) {
 		WARN_ON_ONCE(sk->sk_state != TCP_SYN_RECV &&
 			     sk->sk_state != TCP_FIN_WAIT1);
-		tcp_fastopen_synack_timer(sk);
+		tcp_fastopen_synack_timer(sk, req);
 		/* Before we receive ACK to our SYN-ACK don't retransmit
 		 * anything else (e.g., data or FIN segments).
 		 */

net/ipv6/ip6_gre.c+1−0

@@ -2192,6 +2192,7 @@ static void ip6erspan_tap_setup(struct net_device *dev) · 2191 unmodified lines
2192	{	2192	{
2193	ether_setup(dev);	2193	ether_setup(dev);
2194		2194
		2195	dev->max_mtu = 0;
2195	dev->netdev_ops = &ip6erspan_netdev_ops;	2196	dev->netdev_ops = &ip6erspan_netdev_ops;
2196	dev->needs_free_netdev = true;	2197	dev->needs_free_netdev = true;
2197	dev->priv_destructor = ip6gre_dev_free;	2198	dev->priv_destructor = ip6gre_dev_free;

net/ipv6/ip6_output.c+3−0

 				inet6_sk(skb->sk) : NULL;
 	struct ip6_frag_state state;
 	unsigned int mtu, hlen, nexthdr_offset;
+	ktime_t tstamp = skb->tstamp;
 	int hroom, err = 0;
 	__be32 frag_id;
 	u8 *prevhdr, nexthdr = 0;
 			if (iter.frag)
 				ip6_fraglist_prepare(skb, &iter);
+			skb->tstamp = tstamp;
 			err = output(net, sk, skb);
 			if (!err)
 				IP6_INC_STATS(net, ip6_dst_idev(&rt->dst),
 		/*
 		 *	Put this fragment into the sending queue.
 		 */
+		frag->tstamp = tstamp;
 		err = output(net, sk, frag);
 		if (err)
 			goto fail;

net/ipv6/netfilter.c+3−0

 				  struct sk_buff *))
 {
 	int frag_max_size = BR_INPUT_SKB_CB(skb)->frag_max_size;
+	ktime_t tstamp = skb->tstamp;
 	struct ip6_frag_state state;
 	u8 *prevhdr, nexthdr = 0;
 	unsigned int mtu, hlen;
 			if (iter.frag)
 				ip6_fraglist_prepare(skb, &iter);
+			skb->tstamp = tstamp;
 			err = output(net, sk, data, skb);
 			if (err || !iter.frag)
 				break;
 			goto blackhole;
 		}
+		skb2->tstamp = tstamp;
 		err = output(net, sk, data, skb2);
 		if (err)
 			goto blackhole;

net/ipv6/tcp_ipv6.c+10−8

 	    !ipv6_addr_equal(&sk->sk_v6_daddr, &usin->sin6_addr)) {
 		tp->rx_opt.ts_recent = 0;
 		tp->rx_opt.ts_recent_stamp = 0;
-		tp->write_seq = 0;
+		WRITE_ONCE(tp->write_seq, 0);
 	}
 	sk->sk_v6_daddr = usin->sin6_addr;
 	if (likely(!tp->repair)) {
 		if (!tp->write_seq)
-			tp->write_seq = secure_tcpv6_seq(np->saddr.s6_addr32,
+			WRITE_ONCE(tp->write_seq,
-							 sk->sk_v6_daddr.s6_addr32,
+				   secure_tcpv6_seq(np->saddr.s6_addr32,
-							 inet->inet_sport,
+						    sk->sk_v6_daddr.s6_addr32,
-							 inet->inet_dport);
+						    inet->inet_sport,
+						    inet->inet_dport));
 		tp->tsoffset = secure_tcpv6_ts_off(sock_net(sk),
 						   np->saddr.s6_addr32,
 						   sk->sk_v6_daddr.s6_addr32);
 	tp = tcp_sk(sk);
 	/* XXX (TFO) - tp->snd_una should be ISN (tcp_create_openreq_child() */
-	fastopen = tp->fastopen_rsk;
+	fastopen = rcu_dereference(tp->fastopen_rsk);
 	snd_una = fastopen ? tcp_rsk(fastopen)->snt_isn : tp->snd_una;
 	if (sk->sk_state != TCP_LISTEN &&
 	    !between(seq, snd_una, tp->snd_nxt)) {
 		/* Because we don't lock the socket,
 		 * we might find a transient negative value.
 		 */
-		rx_queue = max_t(int, tp->rcv_nxt - tp->copied_seq, 0);
+		rx_queue = max_t(int, READ_ONCE(tp->rcv_nxt) -
+				      READ_ONCE(tp->copied_seq), 0);
 	seq_printf(seq,
 		   "%4d: %08X%08X%08X%08X:%04X %08X%08X%08X%08X:%04X "
 		   dest->s6_addr32[0], dest->s6_addr32[1],
 		   dest->s6_addr32[2], dest->s6_addr32[3], destp,
 		   state,
-		   tp->write_seq - tp->snd_una,
+		   READ_ONCE(tp->write_seq) - tp->snd_una,
 		   rx_queue,
 		   timer_active,
 		   jiffies_delta_to_clock_t(timer_expires - jiffies),

net/llc/af_llc.c+20−14

  *
  *	Send data via reliable llc2 connection.
  *	Returns 0 upon success, non-zero if action did not succeed.
+ *
+ *	This function always consumes a reference to the skb.
  */
 static int llc_ui_send_data(struct sock* sk, struct sk_buff *skb, int noblock)
 {
 	struct llc_sock* llc = llc_sk(sk);
-	int rc = 0;
 	if (unlikely(llc_data_accept_state(llc->state) ||
 		     llc->remote_busy_flag ||
 		     llc->p_flag)) {
 		long timeout = sock_sndtimeo(sk, noblock);
+		int rc;
 		rc = llc_ui_wait_for_busy_core(sk, timeout);
+		if (rc) {
+			kfree_skb(skb);
+			return rc;
+		}
 	}
-	if (unlikely(!rc))
+	return llc_build_and_send_pkt(sk, skb);
-		rc = llc_build_and_send_pkt(sk, skb);
-	return rc;
 }
 static void llc_ui_sk_init(struct socket *sock, struct sock *sk)
 	DECLARE_SOCKADDR(struct sockaddr_llc *, addr, msg->msg_name);
 	int flags = msg->msg_flags;
 	int noblock = flags & MSG_DONTWAIT;
-	struct sk_buff *skb;
+	struct sk_buff *skb = NULL;
 	size_t size = 0;
 	int rc = -EINVAL, copied = 0, hdrlen;
 	lock_sock(sk);
 	if (addr) {
 		if (msg->msg_namelen < sizeof(*addr))
-			goto release;
+			goto out;
 	} else {
 		if (llc_ui_addr_null(&llc->addr))
-			goto release;
+			goto out;
 		addr = &llc->addr;
 	}
 	/* must bind connection to sap if user hasn't done it. */
 		/* bind to sap with null dev, exclusive. */
 		rc = llc_ui_autobind(sock, addr);
 		if (rc)
-			goto release;
+			goto out;
 	}
 	hdrlen = llc->dev->hard_header_len + llc_ui_header_len(sk, addr);
 	size = hdrlen + len;
 	copied = size - hdrlen;
 	rc = -EINVAL;
 	if (copied < 0)
-		goto release;
+		goto out;
 	release_sock(sk);
 	skb = sock_alloc_send_skb(sk, size, noblock, &rc);
 	lock_sock(sk);
 	if (!skb)
-		goto release;
+		goto out;
 	skb->dev      = llc->dev;
 	skb->protocol = llc_proto_type(addr->sllc_arphrd);
 	skb_reserve(skb, hdrlen);
 	if (sk->sk_type == SOCK_DGRAM || addr->sllc_ua) {
 		llc_build_and_send_ui_pkt(llc->sap, skb, addr->sllc_mac,
 					  addr->sllc_sap);
+		skb = NULL;
 		goto out;
 	}
 	if (addr->sllc_test) {
 		llc_build_and_send_test_pkt(llc->sap, skb, addr->sllc_mac,
 					    addr->sllc_sap);
+		skb = NULL;
 		goto out;
 	}
 	if (addr->sllc_xid) {
 		llc_build_and_send_xid_pkt(llc->sap, skb, addr->sllc_mac,
 					   addr->sllc_sap);
+		skb = NULL;
 		goto out;
 	}
 	rc = -ENOPROTOOPT;
 	if (!(sk->sk_type == SOCK_STREAM && !addr->sllc_ua))
 		goto out;
 	rc = llc_ui_send_data(sk, skb, noblock);
+	skb = NULL;
 out:
-	if (rc) {
+	kfree_skb(skb);
-		kfree_skb(skb);
+	if (rc)
-release:
 		dprintk("%s: failed sending from %02X to %02X: %d\n",
 			__func__, llc->laddr.lsap, llc->daddr.lsap, rc);
-	}
 	release_sock(sk);
 	return rc ? : copied;
 }

net/llc/llc_c_ac.c+6−2

 	llc_pdu_init_as_i_cmd(skb, 1, llc->vS, llc->vR);
 	rc = llc_mac_hdr_init(skb, llc->dev->dev_addr, llc->daddr.mac);
 	if (likely(!rc)) {
+		skb_get(skb);
 		llc_conn_send_pdu(sk, skb);
 		llc_conn_ac_inc_vs_by_1(sk, skb);
 	}
 	llc_pdu_init_as_i_cmd(skb, 0, llc->vS, llc->vR);
 	rc = llc_mac_hdr_init(skb, llc->dev->dev_addr, llc->daddr.mac);
 	if (likely(!rc)) {
-		rc = llc_conn_send_pdu(sk, skb);
+		skb_get(skb);
+		llc_conn_send_pdu(sk, skb);
 		llc_conn_ac_inc_vs_by_1(sk, skb);
 	}
 	return rc;
 	llc_pdu_init_as_i_cmd(skb, 0, llc->vS, llc->vR);
 	rc = llc_mac_hdr_init(skb, llc->dev->dev_addr, llc->daddr.mac);
 	if (likely(!rc)) {
+		skb_get(skb);
 		llc_conn_send_pdu(sk, skb);
 		llc_conn_ac_inc_vs_by_1(sk, skb);
 	}
 	llc_pdu_init_as_i_cmd(skb, llc->ack_pf, llc->vS, llc->vR);
 	rc = llc_mac_hdr_init(skb, llc->dev->dev_addr, llc->daddr.mac);
 	if (likely(!rc)) {
-		rc = llc_conn_send_pdu(sk, skb);
+		skb_get(skb);
+		llc_conn_send_pdu(sk, skb);
 		llc_conn_ac_inc_vs_by_1(sk, skb);
 	}
 	return rc;

net/llc/llc_conn.c+18−51

 #endif
 static int llc_find_offset(int state, int ev_type);
-static int llc_conn_send_pdus(struct sock *sk, struct sk_buff *skb);
+static void llc_conn_send_pdus(struct sock *sk);
 static int llc_conn_service(struct sock *sk, struct sk_buff *skb);
 static int llc_exec_conn_trans_actions(struct sock *sk,
 				       struct llc_conn_state_trans *trans,
  *	(executing it's actions and changing state), upper layer will be
  *	indicated or confirmed, if needed. Returns 0 for success, 1 for
  *	failure. The socket lock has to be held before calling this function.
+ *
+ *	This function always consumes a reference to the skb.
  */
 int llc_conn_state_process(struct sock *sk, struct sk_buff *skb)
 {
 	struct llc_sock *llc = llc_sk(skb->sk);
 	struct llc_conn_state_ev *ev = llc_conn_ev(skb);
-	/*
-	 * We have to hold the skb, because llc_conn_service will kfree it in
-	 * the sending path and we need to look at the skb->cb, where we encode
-	 * llc_conn_state_ev.
-	 */
-	skb_get(skb);
 	ev->ind_prim = ev->cfm_prim = 0;
 	/*
 	 * Send event to state machine
 	rc = llc_conn_service(skb->sk, skb);
 	if (unlikely(rc != 0)) {
 		printk(KERN_ERR "%s: llc_conn_service failed\n", __func__);
-		goto out_kfree_skb;
-	}
-	if (unlikely(!ev->ind_prim && !ev->cfm_prim)) {
-		/* indicate or confirm not required */
-		if (!skb->next)
-			goto out_kfree_skb;
 		goto out_skb_put;
 	}
-	if (unlikely(ev->ind_prim && ev->cfm_prim)) /* Paranoia */
-		skb_get(skb);
 	switch (ev->ind_prim) {
 	case LLC_DATA_PRIM:
+		skb_get(skb);
 		llc_save_primitive(sk, skb, LLC_DATA_PRIM);
 		if (unlikely(sock_queue_rcv_skb(sk, skb))) {
 			/*
 		 * skb->sk pointing to the newly created struct sock in
 		 * llc_conn_handler. -acme
 		 */
+		skb_get(skb);
 		skb_queue_tail(&sk->sk_receive_queue, skb);
 		sk->sk_state_change(sk);
 		break;
 				sk->sk_state_change(sk);
 			}
 		}
-		kfree_skb(skb);
 		sock_put(sk);
 		break;
 	case LLC_RESET_PRIM:
 		 * RESET is not being notified to upper layers for now
 		 */
 		printk(KERN_INFO "%s: received a reset ind!\n", __func__);
-		kfree_skb(skb);
 		break;
 	default:
-		if (ev->ind_prim) {
+		if (ev->ind_prim)
 			printk(KERN_INFO "%s: received unknown %d prim!\n",
 				__func__, ev->ind_prim);
-			kfree_skb(skb);
-		}
 		/* No indication */
 		break;
 	}
 		printk(KERN_INFO "%s: received a reset conf!\n", __func__);
 		break;
 	default:
-		if (ev->cfm_prim) {
+		if (ev->cfm_prim)
 			printk(KERN_INFO "%s: received unknown %d prim!\n",
 					__func__, ev->cfm_prim);
-			break;
+		/* No confirmation */
-		}
+		break;
-		goto out_skb_put; /* No confirmation */
 	}
-out_kfree_skb:
-	kfree_skb(skb);
 out_skb_put:
 	kfree_skb(skb);
 	return rc;
 }
-int llc_conn_send_pdu(struct sock *sk, struct sk_buff *skb)
+void llc_conn_send_pdu(struct sock *sk, struct sk_buff *skb)
 {
 	/* queue PDU to send to MAC layer */
 	skb_queue_tail(&sk->sk_write_queue, skb);
-	return llc_conn_send_pdus(sk, skb);
+	llc_conn_send_pdus(sk);
 }
 /**
 	if (howmany_resend > 0)
 		llc->vS = (llc->vS + 1) % LLC_2_SEQ_NBR_MODULO;
 	/* any PDUs to re-send are queued up; start sending to MAC */
-	llc_conn_send_pdus(sk, NULL);
+	llc_conn_send_pdus(sk);
 out:;
 }
 	if (howmany_resend > 0)
 		llc->vS = (llc->vS + 1) % LLC_2_SEQ_NBR_MODULO;
 	/* any PDUs to re-send are queued up; start sending to MAC */
-	llc_conn_send_pdus(sk, NULL);
+	llc_conn_send_pdus(sk);
 out:;
 }
 /**
  *	llc_conn_send_pdus - Sends queued PDUs
  *	@sk: active connection
- *	@hold_skb: the skb held by caller, or NULL if does not care
  *
- *	Sends queued pdus to MAC layer for transmission. When @hold_skb is
+ *	Sends queued pdus to MAC layer for transmission.
- *	NULL, always return 0. Otherwise, return 0 if @hold_skb is sent
- *	successfully, or 1 for failure.
  */
-static int llc_conn_send_pdus(struct sock *sk, struct sk_buff *hold_skb)
+static void llc_conn_send_pdus(struct sock *sk)
 {
 	struct sk_buff *skb;
-	int ret = 0;
 	while ((skb = skb_dequeue(&sk->sk_write_queue)) != NULL) {
 		struct llc_pdu_sn *pdu = llc_pdu_sn_hdr(skb);
 			skb_queue_tail(&llc_sk(sk)->pdu_unack_q, skb);
 			if (!skb2)
 				break;
-			dev_queue_xmit(skb2);
+			skb = skb2;
-		} else {
-			bool is_target = skb == hold_skb;
-			int rc;
-			if (is_target)
-				skb_get(skb);
-			rc = dev_queue_xmit(skb);
-			if (is_target)
-				ret = rc;
 		}
+		dev_queue_xmit(skb);
 	}
-	return ret;
 }
 /**
 	else {
 		dprintk("%s: adding to backlog...\n", __func__);
 		llc_set_backlog_type(skb, LLC_PACKET);
-		if (sk_add_backlog(sk, skb, sk->sk_rcvbuf))
+		if (sk_add_backlog(sk, skb, READ_ONCE(sk->sk_rcvbuf)))
 			goto drop_unlock;
 	}
 out:

net/llc/llc_if.c+8−4

@@ -38,6 +38,8 @@ · 37 unmodified lines
38	* closed and -EBUSY when sending data is not permitted in this state or	38	* closed and -EBUSY when sending data is not permitted in this state or
39	* LLC has send an I pdu with p bit set to 1 and is waiting for it's	39	* LLC has send an I pdu with p bit set to 1 and is waiting for it's
40	* response.	40	* response.
		41	*
		42	* This function always consumes a reference to the skb.
41	*/	43	*/
42	int llc_build_and_send_pkt(struct sock sk, struct sk_buff skb)	44	int llc_build_and_send_pkt(struct sock sk, struct sk_buff skb)
43	{	45	{
@@ -46,20 +48,22 @@ int llc_build_and_send_pkt(struct sock sk, struct sk_buff skb) · 2 unmodified lines
46	struct llc_sock *llc = llc_sk(sk);	48	struct llc_sock *llc = llc_sk(sk);
47		49
48	if (unlikely(llc->state == LLC_CONN_STATE_ADM))	50	if (unlikely(llc->state == LLC_CONN_STATE_ADM))
49	goto out;	51	goto out_free;
50	rc = -EBUSY;	52	rc = -EBUSY;
51	if (unlikely(llc_data_accept_state(llc->state) \|\| /* data_conn_refuse */	53	if (unlikely(llc_data_accept_state(llc->state) \|\| /* data_conn_refuse */
52	llc->p_flag)) {	54	llc->p_flag)) {
53	llc->failed_data_req = 1;	55	llc->failed_data_req = 1;
54	goto out;	56	goto out_free;
55	}	57	}
56	ev = llc_conn_ev(skb);	58	ev = llc_conn_ev(skb);
57	ev->type = LLC_CONN_EV_TYPE_PRIM;	59	ev->type = LLC_CONN_EV_TYPE_PRIM;
58	ev->prim = LLC_DATA_PRIM;	60	ev->prim = LLC_DATA_PRIM;
59	ev->prim_type = LLC_PRIM_TYPE_REQ;	61	ev->prim_type = LLC_PRIM_TYPE_REQ;
60	skb->dev = llc->dev;	62	skb->dev = llc->dev;
61	rc = llc_conn_state_process(sk, skb);	63	return llc_conn_state_process(sk, skb);
62	out:	64
		65	out_free:
		66	kfree_skb(skb);
63	return rc;	67	return rc;
64	}	68	}
65		69

net/llc/llc_s_ac.c+9−3

 			    ev->daddr.lsap, LLC_PDU_CMD);
 	llc_pdu_init_as_ui_cmd(skb);
 	rc = llc_mac_hdr_init(skb, ev->saddr.mac, ev->daddr.mac);
-	if (likely(!rc))
+	if (likely(!rc)) {
+		skb_get(skb);
 		rc = dev_queue_xmit(skb);
+	}
 	return rc;
 }
 			    ev->daddr.lsap, LLC_PDU_CMD);
 	llc_pdu_init_as_xid_cmd(skb, LLC_XID_NULL_CLASS_2, 0);
 	rc = llc_mac_hdr_init(skb, ev->saddr.mac, ev->daddr.mac);
-	if (likely(!rc))
+	if (likely(!rc)) {
+		skb_get(skb);
 		rc = dev_queue_xmit(skb);
+	}
 	return rc;
 }
 			    ev->daddr.lsap, LLC_PDU_CMD);
 	llc_pdu_init_as_test_cmd(skb);
 	rc = llc_mac_hdr_init(skb, ev->saddr.mac, ev->daddr.mac);
-	if (likely(!rc))
+	if (likely(!rc)) {
+		skb_get(skb);
 		rc = dev_queue_xmit(skb);
+	}
 	return rc;
 }

net/llc/llc_sap.c+8−15

@@ -197,29 +197,22 @@ out: · 196 unmodified lines
197	* After executing actions of the event, upper layer will be indicated	197	* After executing actions of the event, upper layer will be indicated
198	* if needed(on receiving an UI frame). sk can be null for the	198	* if needed(on receiving an UI frame). sk can be null for the
199	* datalink_proto case.	199	* datalink_proto case.
		200	*
		201	* This function always consumes a reference to the skb.
200	*/	202	*/
201	static void llc_sap_state_process(struct llc_sap sap, struct sk_buff skb)	203	static void llc_sap_state_process(struct llc_sap sap, struct sk_buff skb)
202	{	204	{
203	struct llc_sap_state_ev *ev = llc_sap_ev(skb);	205	struct llc_sap_state_ev *ev = llc_sap_ev(skb);
204		206
205	/*
206	* We have to hold the skb, because llc_sap_next_state
207	* will kfree it in the sending path and we need to
208	* look at the skb->cb, where we encode llc_sap_state_ev.
209	*/
210	skb_get(skb);
211	ev->ind_cfm_flag = 0;	207	ev->ind_cfm_flag = 0;
212	llc_sap_next_state(sap, skb);	208	llc_sap_next_state(sap, skb);
213	if (ev->ind_cfm_flag == LLC_IND) {
214	if (skb->sk->sk_state == TCP_LISTEN)
215	kfree_skb(skb);
216	else {
217	llc_save_primitive(skb->sk, skb, ev->prim);
218		209
219	/* queue skb to the user. */	210	if (ev->ind_cfm_flag == LLC_IND && skb->sk->sk_state != TCP_LISTEN) {
220	if (sock_queue_rcv_skb(skb->sk, skb))	211	llc_save_primitive(skb->sk, skb, ev->prim);
221	kfree_skb(skb);	212
222	}	213	/* queue skb to the user. */
		214	if (sock_queue_rcv_skb(skb->sk, skb) == 0)
		215	return;
223	}	216	}
224	kfree_skb(skb);	217	kfree_skb(skb);
225	}	218	}

net/mac80211/mlme.c+3−2

 	rcu_read_lock();
 	ssid = ieee80211_bss_get_ie(cbss, WLAN_EID_SSID);
-	if (WARN_ON_ONCE(ssid == NULL))
+	if (WARN_ONCE(!ssid || ssid[1] > IEEE80211_MAX_SSID_LEN,
+		      "invalid SSID element (len=%d)", ssid ? ssid[1] : -1))
 		ssid_len = 0;
 	else
 		ssid_len = ssid[1];
 	rcu_read_lock();
 	ssidie = ieee80211_bss_get_ie(req->bss, WLAN_EID_SSID);
-	if (!ssidie) {
+	if (!ssidie || ssidie[1] > sizeof(assoc_data->ssid)) {
 		rcu_read_unlock();
 		kfree(assoc_data);
 		return -EINVAL;

net/mac80211/rx.c+10−1

@@ -3467,9 +3467,18 @@ ieee80211_rx_h_mgmt(struct ieee80211_rx_data *rx) · 3466 unmodified lines
3467	case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):	3467	case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
3468	/* process for all: mesh, mlme, ibss */	3468	/* process for all: mesh, mlme, ibss */
3469	break;	3469	break;
		3470	case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
		3471	if (is_multicast_ether_addr(mgmt->da) &&
		3472	!is_broadcast_ether_addr(mgmt->da))
		3473	return RX_DROP_MONITOR;
		3474
		3475	/* process only for station/IBSS */
		3476	if (sdata->vif.type != NL80211_IFTYPE_STATION &&
		3477	sdata->vif.type != NL80211_IFTYPE_ADHOC)
		3478	return RX_DROP_MONITOR;
		3479	break;
3470	case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):	3480	case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
3471	case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):	3481	case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
3472	case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
3473	case cpu_to_le16(IEEE80211_STYPE_DISASSOC):	3482	case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
3474	if (is_multicast_ether_addr(mgmt->da) &&	3483	if (is_multicast_ether_addr(mgmt->da) &&
3475	!is_broadcast_ether_addr(mgmt->da))	3484	!is_broadcast_ether_addr(mgmt->da))

net/mac80211/scan.c+28−2

@@ -520,10 +520,33 @@ static int ieee80211_start_sw_scan(struct ieee80211_local *local, · 519 unmodified lines
520	return 0;	520	return 0;
521	}	521	}
522		522
		523	static bool __ieee80211_can_leave_ch(struct ieee80211_sub_if_data *sdata)
		524	{
		525	struct ieee80211_local *local = sdata->local;
		526	struct ieee80211_sub_if_data *sdata_iter;
		527
		528	if (!ieee80211_is_radar_required(local))
		529	return true;
		530
		531	if (!regulatory_pre_cac_allowed(local->hw.wiphy))
		532	return false;
		533
		534	mutex_lock(&local->iflist_mtx);
		535	list_for_each_entry(sdata_iter, &local->interfaces, list) {
		536	if (sdata_iter->wdev.cac_started) {
		537	mutex_unlock(&local->iflist_mtx);
		538	return false;
		539	}
		540	}
		541	mutex_unlock(&local->iflist_mtx);
		542
		543	return true;
		544	}
		545
523	static bool ieee80211_can_scan(struct ieee80211_local *local,	546	static bool ieee80211_can_scan(struct ieee80211_local *local,
524	struct ieee80211_sub_if_data *sdata)	547	struct ieee80211_sub_if_data *sdata)
525	{	548	{
526	if (ieee80211_is_radar_required(local))	549	if (!__ieee80211_can_leave_ch(sdata))
527	return false;	550	return false;
528		551
529	if (!list_empty(&local->roc_list))	552	if (!list_empty(&local->roc_list))
@@ -630,7 +653,10 @@ static int __ieee80211_start_scan(struct ieee80211_sub_if_data *sdata, · 100 unmodified lines
630		653
631	lockdep_assert_held(&local->mtx);	654	lockdep_assert_held(&local->mtx);
632		655
633	if (local->scan_req \|\| ieee80211_is_radar_required(local))	656	if (local->scan_req)
		657	return -EBUSY;
		658
		659	if (!__ieee80211_can_leave_ch(sdata))
634	return -EBUSY;	660	return -EBUSY;
635		661
636	if (!ieee80211_can_scan(local, sdata)) {	662	if (!ieee80211_can_scan(local, sdata)) {

net/netfilter/nf_conntrack_core.c+2−2

@@ -1792,8 +1792,8 @@ void __nf_ct_refresh_acct(struct nf_conn *ct, · 1791 unmodified lines
1792	if (nf_ct_is_confirmed(ct))	1792	if (nf_ct_is_confirmed(ct))
1793	extra_jiffies += nfct_time_stamp;	1793	extra_jiffies += nfct_time_stamp;
1794		1794
1795	if (ct->timeout != extra_jiffies)	1795	if (READ_ONCE(ct->timeout) != extra_jiffies)
1796	ct->timeout = extra_jiffies;	1796	WRITE_ONCE(ct->timeout, extra_jiffies);
1797	acct:	1797	acct:
1798	if (do_acct)	1798	if (do_acct)
1799	nf_ct_acct_update(ct, ctinfo, skb->len);	1799	nf_ct_acct_update(ct, ctinfo, skb->len);

net/openvswitch/actions.c+3−2

 {
 	int err;
-	err = skb_mpls_push(skb, mpls->mpls_lse, mpls->mpls_ethertype);
+	err = skb_mpls_push(skb, mpls->mpls_lse, mpls->mpls_ethertype,
+			    skb->mac_len);
 	if (err)
 		return err;
 {
 	int err;
-	err = skb_mpls_pop(skb, ethertype);
+	err = skb_mpls_pop(skb, ethertype, skb->mac_len);
 	if (err)
 		return err;

net/rxrpc/ar-internal.h+1−0

@@ -556,6 +556,7 @@ struct rxrpc_call { · 555 unmodified lines
556	struct rxrpc_peer peer; / Peer record for remote address */	556	struct rxrpc_peer peer; / Peer record for remote address */
557	struct rxrpc_sock __rcu socket; / socket responsible */	557	struct rxrpc_sock __rcu socket; / socket responsible */
558	struct rxrpc_net rxnet; / Network namespace to which call belongs */	558	struct rxrpc_net rxnet; / Network namespace to which call belongs */
		559	const struct rxrpc_security security; / applied security module */
559	struct mutex user_mutex; /* User access mutex */	560	struct mutex user_mutex; /* User access mutex */
560	unsigned long ack_at; /* When deferred ACK needs to happen */	561	unsigned long ack_at; /* When deferred ACK needs to happen */
561	unsigned long ack_lost_at; /* When ACK is figured as lost */	562	unsigned long ack_lost_at; /* When ACK is figured as lost */

net/rxrpc/call_accept.c+3−2

 		smp_store_release(&b->conn_backlog_head,
 				  (head + 1) & (size - 1));
-		trace_rxrpc_conn(conn, rxrpc_conn_new_service,
+		trace_rxrpc_conn(conn->debug_id, rxrpc_conn_new_service,
 				 atomic_read(&conn->usage), here);
 	}
 	call->flags |= (1 << RXRPC_CALL_IS_SERVICE);
 	call->state = RXRPC_CALL_SERVER_PREALLOC;
-	trace_rxrpc_call(call, rxrpc_call_new_service,
+	trace_rxrpc_call(call->debug_id, rxrpc_call_new_service,
 			 atomic_read(&call->usage),
 			 here, (const void *)user_call_ID);
 	rxrpc_see_call(call);
 	call->conn = conn;
+	call->security = conn->security;
 	call->peer = rxrpc_get_peer(conn->params.peer);
 	call->cong_cwnd = call->peer->cong_cwnd;
 	return call;

net/rxrpc/call_object.c+20−14

 	if (p->intr)
 		__set_bit(RXRPC_CALL_IS_INTR, &call->flags);
 	call->tx_total_len = p->tx_total_len;
-	trace_rxrpc_call(call, rxrpc_call_new_client, atomic_read(&call->usage),
+	trace_rxrpc_call(call->debug_id, rxrpc_call_new_client,
+			 atomic_read(&call->usage),
 			 here, (const void *)p->user_call_ID);
 	/* We need to protect a partially set up call against the user as we
 	if (ret < 0)
 		goto error;
-	trace_rxrpc_call(call, rxrpc_call_connected, atomic_read(&call->usage),
+	trace_rxrpc_call(call->debug_id, rxrpc_call_connected,
-			 here, NULL);
+			 atomic_read(&call->usage), here, NULL);
 	rxrpc_start_call_timer(call);
 error:
 	__rxrpc_set_call_completion(call, RXRPC_CALL_LOCAL_ERROR,
 				    RX_CALL_DEAD, ret);
-	trace_rxrpc_call(call, rxrpc_call_error, atomic_read(&call->usage),
+	trace_rxrpc_call(call->debug_id, rxrpc_call_error,
-			 here, ERR_PTR(ret));
+			 atomic_read(&call->usage), here, ERR_PTR(ret));
 	rxrpc_release_call(rx, call);
 	mutex_unlock(&call->user_mutex);
 	rxrpc_put_call(call, rxrpc_call_put);
 	if (n == 0)
 		return false;
 	if (rxrpc_queue_work(&call->processor))
-		trace_rxrpc_call(call, rxrpc_call_queued, n + 1, here, NULL);
+		trace_rxrpc_call(call->debug_id, rxrpc_call_queued, n + 1,
+				 here, NULL);
 	else
 		rxrpc_put_call(call, rxrpc_call_put_noqueue);
 	return true;
 	int n = atomic_read(&call->usage);
 	ASSERTCMP(n, >=, 1);
 	if (rxrpc_queue_work(&call->processor))
-		trace_rxrpc_call(call, rxrpc_call_queued_ref, n, here, NULL);
+		trace_rxrpc_call(call->debug_id, rxrpc_call_queued_ref, n,
+				 here, NULL);
 	else
 		rxrpc_put_call(call, rxrpc_call_put_noqueue);
 	return true;
 	if (call) {
 		int n = atomic_read(&call->usage);
-		trace_rxrpc_call(call, rxrpc_call_seen, n, here, NULL);
+		trace_rxrpc_call(call->debug_id, rxrpc_call_seen, n,
+				 here, NULL);
 	}
 }
 	const void *here = __builtin_return_address(0);
 	int n = atomic_inc_return(&call->usage);
-	trace_rxrpc_call(call, op, n, here, NULL);
+	trace_rxrpc_call(call->debug_id, op, n, here, NULL);
 }
 /*
 	_enter("{%d,%d}", call->debug_id, atomic_read(&call->usage));
-	trace_rxrpc_call(call, rxrpc_call_release, atomic_read(&call->usage),
+	trace_rxrpc_call(call->debug_id, rxrpc_call_release,
+			 atomic_read(&call->usage),
 			 here, (const void *)call->flags);
 	ASSERTCMP(call->state, ==, RXRPC_CALL_COMPLETE);
 	_debug("RELEASE CALL %p (%d CONN %p)", call, call->debug_id, conn);
-	if (conn) {
+	if (conn)
 		rxrpc_disconnect_call(call);
-		conn->security->free_call_crypto(call);
+	if (call->security)
-	}
+		call->security->free_call_crypto(call);
 	rxrpc_cleanup_ring(call);
 	_leave("");
 {
 	struct rxrpc_net *rxnet = call->rxnet;
 	const void *here = __builtin_return_address(0);
+	unsigned int debug_id = call->debug_id;
 	int n;
 	ASSERT(call != NULL);
 	n = atomic_dec_return(&call->usage);
-	trace_rxrpc_call(call, op, n, here, NULL);
+	trace_rxrpc_call(debug_id, op, n, here, NULL);
 	ASSERTCMP(n, >=, 0);
 	if (n == 0) {
 		_debug("call %d dead", call->debug_id);

net/rxrpc/conn_client.c+7−2

 	rxrpc_get_local(conn->params.local);
 	key_get(conn->params.key);
-	trace_rxrpc_conn(conn, rxrpc_conn_new_client, atomic_read(&conn->usage),
+	trace_rxrpc_conn(conn->debug_id, rxrpc_conn_new_client,
+			 atomic_read(&conn->usage),
 			 __builtin_return_address(0));
 	trace_rxrpc_client(conn, -1, rxrpc_client_alloc);
 	_leave(" = %p", conn);
 	if (cp->exclusive) {
 		call->conn = candidate;
+		call->security = candidate->security;
 		call->security_ix = candidate->security_ix;
 		call->service_id = candidate->service_id;
 		_leave(" = 0 [exclusive %d]", candidate->debug_id);
 candidate_published:
 	set_bit(RXRPC_CONN_IN_CLIENT_CONNS, &candidate->flags);
 	call->conn = candidate;
+	call->security = candidate->security;
 	call->security_ix = candidate->security_ix;
 	call->service_id = candidate->service_id;
 	spin_unlock(&local->client_conns_lock);
 	spin_lock(&conn->channel_lock);
 	call->conn = conn;
+	call->security = conn->security;
 	call->security_ix = conn->security_ix;
 	call->service_id = conn->service_id;
 	list_add_tail(&call->chan_wait_link, &conn->waiting_calls);
 void rxrpc_put_client_conn(struct rxrpc_connection *conn)
 {
 	const void *here = __builtin_return_address(0);
+	unsigned int debug_id = conn->debug_id;
 	int n;
 	do {
 		n = atomic_dec_return(&conn->usage);
-		trace_rxrpc_conn(conn, rxrpc_conn_put_client, n, here);
+		trace_rxrpc_conn(debug_id, rxrpc_conn_put_client, n, here);
 		if (n > 0)
 			return;
 		ASSERTCMP(n, >=, 0);

net/rxrpc/conn_object.c+7−6

 	if (n == 0)
 		return false;
 	if (rxrpc_queue_work(&conn->processor))
-		trace_rxrpc_conn(conn, rxrpc_conn_queued, n + 1, here);
+		trace_rxrpc_conn(conn->debug_id, rxrpc_conn_queued, n + 1, here);
 	else
 		rxrpc_put_connection(conn);
 	return true;
 	if (conn) {
 		int n = atomic_read(&conn->usage);
-		trace_rxrpc_conn(conn, rxrpc_conn_seen, n, here);
+		trace_rxrpc_conn(conn->debug_id, rxrpc_conn_seen, n, here);
 	}
 }
 	const void *here = __builtin_return_address(0);
 	int n = atomic_inc_return(&conn->usage);
-	trace_rxrpc_conn(conn, rxrpc_conn_got, n, here);
+	trace_rxrpc_conn(conn->debug_id, rxrpc_conn_got, n, here);
 }
 /*
 	if (conn) {
 		int n = atomic_fetch_add_unless(&conn->usage, 1, 0);
 		if (n > 0)
-			trace_rxrpc_conn(conn, rxrpc_conn_got, n + 1, here);
+			trace_rxrpc_conn(conn->debug_id, rxrpc_conn_got, n + 1, here);
 		else
 			conn = NULL;
 	}
 void rxrpc_put_service_conn(struct rxrpc_connection *conn)
 {
 	const void *here = __builtin_return_address(0);
+	unsigned int debug_id = conn->debug_id;
 	int n;
 	n = atomic_dec_return(&conn->usage);
-	trace_rxrpc_conn(conn, rxrpc_conn_put_service, n, here);
+	trace_rxrpc_conn(debug_id, rxrpc_conn_put_service, n, here);
 	ASSERTCMP(n, >=, 0);
 	if (n == 1)
 		rxrpc_set_service_reap_timer(conn->params.local->rxnet,
 		 */
 		if (atomic_cmpxchg(&conn->usage, 1, 0) != 1)
 			continue;
-		trace_rxrpc_conn(conn, rxrpc_conn_reap_service, 0, NULL);
+		trace_rxrpc_conn(conn->debug_id, rxrpc_conn_reap_service, 0, NULL);
 		if (rxrpc_conn_is_client(conn))
 			BUG();

net/rxrpc/conn_service.c+1−1

@@ -134,7 +134,7 @@ struct rxrpc_connection rxrpc_prealloc_service_connection(struct rxrpc_net rxn · 133 unmodified lines
134	list_add_tail(&conn->proc_link, &rxnet->conn_proc_list);	134	list_add_tail(&conn->proc_link, &rxnet->conn_proc_list);
135	write_unlock(&rxnet->conn_lock);	135	write_unlock(&rxnet->conn_lock);
136		136
137	trace_rxrpc_conn(conn, rxrpc_conn_new_service,	137	trace_rxrpc_conn(conn->debug_id, rxrpc_conn_new_service,
138	atomic_read(&conn->usage),	138	atomic_read(&conn->usage),
139	__builtin_return_address(0));	139	__builtin_return_address(0));
140	}	140	}

net/rxrpc/peer_event.c+9−2

 {
 	struct sock_exterr_skb *serr;
 	struct sockaddr_rxrpc srx;
-	struct rxrpc_local *local = sk->sk_user_data;
+	struct rxrpc_local *local;
 	struct rxrpc_peer *peer;
 	struct sk_buff *skb;
+	rcu_read_lock();
+	local = rcu_dereference_sk_user_data(sk);
+	if (unlikely(!local)) {
+		rcu_read_unlock();
+		return;
+	}
 	_enter("%p{%d}", sk, local->debug_id);
 	/* Clear the outstanding error value on the socket so that it doesn't
 	skb = sock_dequeue_err_skb(sk);
 	if (!skb) {
+		rcu_read_unlock();
 		_leave("UDP socket errqueue empty");
 		return;
 	}
 	serr = SKB_EXT_ERR(skb);
 	if (!skb->len && serr->ee.ee_origin == SO_EE_ORIGIN_TIMESTAMPING) {
 		_leave("UDP empty message");
+		rcu_read_unlock();
 		rxrpc_free_skb(skb, rxrpc_skb_freed);
 		return;
 	}
-	rcu_read_lock();
 	peer = rxrpc_lookup_peer_icmp_rcu(local, skb, &srx);
 	if (peer && !rxrpc_get_peer_maybe(peer))
 		peer = NULL;

net/rxrpc/peer_object.c+10−6

 	peer = kzalloc(sizeof(struct rxrpc_peer), gfp);
 	if (peer) {
 		atomic_set(&peer->usage, 1);
-		peer->local = local;
+		peer->local = rxrpc_get_local(local);
 		INIT_HLIST_HEAD(&peer->error_targets);
 		peer->service_conns = RB_ROOT;
 		seqlock_init(&peer->service_conn_lock);
 	unsigned long hash_key;
 	hash_key = rxrpc_peer_hash_key(local, &peer->srx);
-	peer->local = local;
 	rxrpc_init_peer(rx, peer, hash_key);
 	spin_lock(&rxnet->peer_hash_lock);
 	int n;
 	n = atomic_inc_return(&peer->usage);
-	trace_rxrpc_peer(peer, rxrpc_peer_got, n, here);
+	trace_rxrpc_peer(peer->debug_id, rxrpc_peer_got, n, here);
 	return peer;
 }
 	if (peer) {
 		int n = atomic_fetch_add_unless(&peer->usage, 1, 0);
 		if (n > 0)
-			trace_rxrpc_peer(peer, rxrpc_peer_got, n + 1, here);
+			trace_rxrpc_peer(peer->debug_id, rxrpc_peer_got, n + 1, here);
 		else
 			peer = NULL;
 	}
 	list_del_init(&peer->keepalive_link);
 	spin_unlock_bh(&rxnet->peer_hash_lock);
+	rxrpc_put_local(peer->local);
 	kfree_rcu(peer, rcu);
 }
 void rxrpc_put_peer(struct rxrpc_peer *peer)
 {
 	const void *here = __builtin_return_address(0);
+	unsigned int debug_id;
 	int n;
 	if (peer) {
+		debug_id = peer->debug_id;
 		n = atomic_dec_return(&peer->usage);
-		trace_rxrpc_peer(peer, rxrpc_peer_put, n, here);
+		trace_rxrpc_peer(debug_id, rxrpc_peer_put, n, here);
 		if (n == 0)
 			__rxrpc_put_peer(peer);
 	}
 void rxrpc_put_peer_locked(struct rxrpc_peer *peer)
 {
 	const void *here = __builtin_return_address(0);
+	unsigned int debug_id = peer->debug_id;
 	int n;
 	n = atomic_dec_return(&peer->usage);
-	trace_rxrpc_peer(peer, rxrpc_peer_put, n, here);
+	trace_rxrpc_peer(debug_id, rxrpc_peer_put, n, here);
 	if (n == 0) {
 		hash_del_rcu(&peer->hash_link);
 		list_del_init(&peer->keepalive_link);
+		rxrpc_put_local(peer->local);
 		kfree_rcu(peer, rcu);
 	}
 }

net/rxrpc/recvmsg.c+3−3

@@ -251,8 +251,8 @@ static int rxrpc_verify_packet(struct rxrpc_call call, struct sk_buff skb, · 250 unmodified lines
251	seq += subpacket;	251	seq += subpacket;
252	}	252	}
253		253
254	return call->conn->security->verify_packet(call, skb, offset, len,	254	return call->security->verify_packet(call, skb, offset, len,
255	seq, cksum);	255	seq, cksum);
256	}	256	}
257		257
258	/*	258	/*
@@ -291,7 +291,7 @@ static int rxrpc_locate_data(struct rxrpc_call call, struct sk_buff skb, · 32 unmodified lines
291		291
292	*_offset = offset;	292	*_offset = offset;
293	*_len = len;	293	*_len = len;
294	call->conn->security->locate_data(call, skb, _offset, _len);	294	call->security->locate_data(call, skb, _offset, _len);
295	return 0;	295	return 0;
296	}	296	}
297		297

net/rxrpc/sendmsg.c+2−1

 				 call->tx_winsize)
 				sp->hdr.flags |= RXRPC_MORE_PACKETS;
-			ret = conn->security->secure_packet(
+			ret = call->security->secure_packet(
 				call, skb, skb->mark, skb->head);
 			if (ret < 0)
 				goto out;
 		case RXRPC_CALL_SERVER_PREALLOC:
 		case RXRPC_CALL_SERVER_SECURING:
 		case RXRPC_CALL_SERVER_ACCEPTING:
+			rxrpc_put_call(call, rxrpc_call_put);
 			ret = -EBUSY;
 			goto error_release_sock;
 		default:

net/sched/act_api.c+13−10

@@ -832,8 +832,7 @@ static struct tc_cookie nla_memdup_cookie(struct nlattr *tb) · 831 unmodified lines
832	}	832	}
833		833
834	static const struct nla_policy tcf_action_policy[TCA_ACT_MAX + 1] = {	834	static const struct nla_policy tcf_action_policy[TCA_ACT_MAX + 1] = {
835	[TCA_ACT_KIND] = { .type = NLA_NUL_STRING,	835	[TCA_ACT_KIND] = { .type = NLA_STRING },
836	.len = IFNAMSIZ - 1 },
837	[TCA_ACT_INDEX] = { .type = NLA_U32 },	836	[TCA_ACT_INDEX] = { .type = NLA_U32 },
838	[TCA_ACT_COOKIE] = { .type = NLA_BINARY,	837	[TCA_ACT_COOKIE] = { .type = NLA_BINARY,
839	.len = TC_COOKIE_MAX_SIZE },	838	.len = TC_COOKIE_MAX_SIZE },
@@ -865,8 +864,10 @@ struct tc_action tcf_action_init_1(struct net net, struct tcf_proto *tp, · 25 unmodified lines
865	NL_SET_ERR_MSG(extack, "TC action kind must be specified");	864	NL_SET_ERR_MSG(extack, "TC action kind must be specified");
866	goto err_out;	865	goto err_out;
867	}	866	}
868	nla_strlcpy(act_name, kind, IFNAMSIZ);	867	if (nla_strlcpy(act_name, kind, IFNAMSIZ) >= IFNAMSIZ) {
869		868	NL_SET_ERR_MSG(extack, "TC action name too long");
		869	goto err_out;
		870	}
870	if (tb[TCA_ACT_COOKIE]) {	871	if (tb[TCA_ACT_COOKIE]) {
871	cookie = nla_memdup_cookie(tb);	872	cookie = nla_memdup_cookie(tb);
872	if (!cookie) {	873	if (!cookie) {
@@ -1352,11 +1353,16 @@ static int tcf_action_add(struct net net, struct nlattr nla, · 479 unmodified lines
1352	struct netlink_ext_ack *extack)	1353	struct netlink_ext_ack *extack)
1353	{	1354	{
1354	size_t attr_size = 0;	1355	size_t attr_size = 0;
1355	int ret = 0;	1356	int loop, ret;
1356	struct tc_action *actions[TCA_ACT_MAX_PRIO] = {};	1357	struct tc_action *actions[TCA_ACT_MAX_PRIO] = {};
1357		1358
1358	ret = tcf_action_init(net, NULL, nla, NULL, NULL, ovr, 0, actions,	1359	for (loop = 0; loop < 10; loop++) {
1359	&attr_size, true, extack);	1360	ret = tcf_action_init(net, NULL, nla, NULL, NULL, ovr, 0,
		1361	actions, &attr_size, true, extack);
		1362	if (ret != -EAGAIN)
		1363	break;
		1364	}
		1365
1360	if (ret < 0)	1366	if (ret < 0)
1361	return ret;	1367	return ret;
1362	ret = tcf_add_notify(net, n, actions, portid, attr_size, extack);	1368	ret = tcf_add_notify(net, n, actions, portid, attr_size, extack);
@@ -1406,11 +1412,8 @@ static int tc_ctl_action(struct sk_buff skb, struct nlmsghdr n, · 43 unmodified lines
1406	*/	1412	*/
1407	if (n->nlmsg_flags & NLM_F_REPLACE)	1413	if (n->nlmsg_flags & NLM_F_REPLACE)
1408	ovr = 1;	1414	ovr = 1;
1409	replay:
1410	ret = tcf_action_add(net, tca[TCA_ACT_TAB], n, portid, ovr,	1415	ret = tcf_action_add(net, tca[TCA_ACT_TAB], n, portid, ovr,
1411	extack);	1416	extack);
1412	if (ret == -EAGAIN)
1413	goto replay;
1414	break;	1417	break;
1415	case RTM_DELACTION:	1418	case RTM_DELACTION:
1416	ret = tca_action_gd(net, tca[TCA_ACT_TAB], n,	1419	ret = tca_action_gd(net, tca[TCA_ACT_TAB], n,

net/sched/act_mirred.c+5−1

 		return err;
 	pr_info("Mirror/redirect action on\n");
-	return tcf_register_action(&act_mirred_ops, &mirred_net_ops);
+	err = tcf_register_action(&act_mirred_ops, &mirred_net_ops);
+	if (err)
+		unregister_netdevice_notifier(&mirred_device_notifier);
+	return err;
 }
 static void __exit mirred_cleanup_module(void)

net/sched/act_mpls.c+8−4

 	struct tcf_mpls *m = to_mpls(a);
 	struct tcf_mpls_params *p;
 	__be32 new_lse;
-	int ret;
+	int ret, mac_len;
 	tcf_lastuse_update(&m->tcf_tm);
 	bstats_cpu_update(this_cpu_ptr(m->common.cpu_bstats), skb);
 	/* Ensure 'data' points at mac_header prior calling mpls manipulating
 	 * functions.
 	 */
-	if (skb_at_tc_ingress(skb))
+	if (skb_at_tc_ingress(skb)) {
 		skb_push_rcsum(skb, skb->mac_len);
+		mac_len = skb->mac_len;
+	} else {
+		mac_len = skb_network_header(skb) - skb_mac_header(skb);
+	}
 	ret = READ_ONCE(m->tcf_action);
 	switch (p->tcfm_action) {
 	case TCA_MPLS_ACT_POP:
-		if (skb_mpls_pop(skb, p->tcfm_proto))
+		if (skb_mpls_pop(skb, p->tcfm_proto, mac_len))
 			goto drop;
 		break;
 	case TCA_MPLS_ACT_PUSH:
 		new_lse = tcf_mpls_get_lse(NULL, p, !eth_p_mpls(skb->protocol));
-		if (skb_mpls_push(skb, new_lse, p->tcfm_proto))
+		if (skb_mpls_push(skb, new_lse, p->tcfm_proto, mac_len))
 			goto drop;
 		break;
 	case TCA_MPLS_ACT_MODIFY:

net/sched/cls_api.c+33−3

 	return TC_H_MAJ(first);
 }
+static bool tcf_proto_check_kind(struct nlattr *kind, char *name)
+{
+	if (kind)
+		return nla_strlcpy(name, kind, IFNAMSIZ) >= IFNAMSIZ;
+	memset(name, 0, IFNAMSIZ);
+	return false;
+}
 static bool tcf_proto_is_unlocked(const char *kind)
 {
 	const struct tcf_proto_ops *ops;
 	bool ret;
+	if (strlen(kind) == 0)
+		return false;
 	ops = tcf_proto_lookup_ops(kind, false, NULL);
 	/* On error return false to take rtnl lock. Proto lookup/create
 	 * functions will perform lookup again and properly handle errors.
 {
 	struct net *net = sock_net(skb->sk);
 	struct nlattr *tca[TCA_MAX + 1];
+	char name[IFNAMSIZ];
 	struct tcmsg *t;
 	u32 protocol;
 	u32 prio;
 	if (err)
 		return err;
+	if (tcf_proto_check_kind(tca[TCA_KIND], name)) {
+		NL_SET_ERR_MSG(extack, "Specified TC filter name too long");
+		err = -EINVAL;
+		goto errout;
+	}
 	/* Take rtnl mutex if rtnl_held was set to true on previous iteration,
 	 * block is shared (no qdisc found), qdisc is not unlocked, classifier
 	 * type is not specified, classifier is not unlocked.
 	 */
 	if (rtnl_held ||
 	    (q && !(q->ops->cl_ops->flags & QDISC_CLASS_OPS_DOIT_UNLOCKED)) ||
-	    !tca[TCA_KIND] || !tcf_proto_is_unlocked(nla_data(tca[TCA_KIND]))) {
+	    !tcf_proto_is_unlocked(name)) {
 		rtnl_held = true;
 		rtnl_lock();
 	}
 {
 	struct net *net = sock_net(skb->sk);
 	struct nlattr *tca[TCA_MAX + 1];
+	char name[IFNAMSIZ];
 	struct tcmsg *t;
 	u32 protocol;
 	u32 prio;
 	if (err)
 		return err;
+	if (tcf_proto_check_kind(tca[TCA_KIND], name)) {
+		NL_SET_ERR_MSG(extack, "Specified TC filter name too long");
+		err = -EINVAL;
+		goto errout;
+	}
 	/* Take rtnl mutex if flushing whole chain, block is shared (no qdisc
 	 * found), qdisc is not unlocked, classifier type is not specified,
 	 * classifier is not unlocked.
 	 */
 	if (!prio ||
 	    (q && !(q->ops->cl_ops->flags & QDISC_CLASS_OPS_DOIT_UNLOCKED)) ||
-	    !tca[TCA_KIND] || !tcf_proto_is_unlocked(nla_data(tca[TCA_KIND]))) {
+	    !tcf_proto_is_unlocked(name)) {
 		rtnl_held = true;
 		rtnl_lock();
 	}
 {
 	struct net *net = sock_net(skb->sk);
 	struct nlattr *tca[TCA_MAX + 1];
+	char name[IFNAMSIZ];
 	struct tcmsg *t;
 	u32 protocol;
 	u32 prio;
 	if (err)
 		return err;
+	if (tcf_proto_check_kind(tca[TCA_KIND], name)) {
+		NL_SET_ERR_MSG(extack, "Specified TC filter name too long");
+		err = -EINVAL;
+		goto errout;
+	}
 	/* Take rtnl mutex if block is shared (no qdisc found), qdisc is not
 	 * unlocked, classifier type is not specified, classifier is not
 	 * unlocked.
 	 */
 	if ((q && !(q->ops->cl_ops->flags & QDISC_CLASS_OPS_DOIT_UNLOCKED)) ||
-	    !tca[TCA_KIND] || !tcf_proto_is_unlocked(nla_data(tca[TCA_KIND]))) {
+	    !tcf_proto_is_unlocked(name)) {
 		rtnl_held = true;
 		rtnl_lock();
 	}

net/sched/em_meta.c+2−2

@@ -446,7 +446,7 @@ META_COLLECTOR(int_sk_wmem_queued) · 445 unmodified lines
446	*err = -1;	446	*err = -1;
447	return;	447	return;
448	}	448	}
449	dst->value = sk->sk_wmem_queued;	449	dst->value = READ_ONCE(sk->sk_wmem_queued);
450	}	450	}
451		451
452	META_COLLECTOR(int_sk_fwd_alloc)	452	META_COLLECTOR(int_sk_fwd_alloc)
@@ -554,7 +554,7 @@ META_COLLECTOR(int_sk_rcvlowat) · 101 unmodified lines
554	*err = -1;	554	*err = -1;
555	return;	555	return;
556	}	556	}
557	dst->value = sk->sk_rcvlowat;	557	dst->value = READ_ONCE(sk->sk_rcvlowat);
558	}	558	}
559		559
560	META_COLLECTOR(int_sk_rcvtimeo)	560	META_COLLECTOR(int_sk_rcvtimeo)

net/sched/sch_api.c+1−2

@@ -1390,8 +1390,7 @@ check_loop_fn(struct Qdisc q, unsigned long cl, struct qdisc_walker w) · 1389 unmodified lines
1390	}	1390	}
1391		1391
1392	const struct nla_policy rtm_tca_policy[TCA_MAX + 1] = {	1392	const struct nla_policy rtm_tca_policy[TCA_MAX + 1] = {
1393	[TCA_KIND] = { .type = NLA_NUL_STRING,	1393	[TCA_KIND] = { .type = NLA_STRING },
1394	.len = IFNAMSIZ - 1 },
1395	[TCA_RATE] = { .type = NLA_BINARY,	1394	[TCA_RATE] = { .type = NLA_BINARY,
1396	.len = sizeof(struct tc_estimator) },	1395	.len = sizeof(struct tc_estimator) },
1397	[TCA_STAB] = { .type = NLA_NESTED },	1396	[TCA_STAB] = { .type = NLA_NESTED },

net/sched/sch_etf.c+1−1

@@ -177,7 +177,7 @@ static int etf_enqueue_timesortedlist(struct sk_buff nskb, struct Qdisc sch, · 176 unmodified lines
177		177
178	parent = *p;	178	parent = *p;
179	skb = rb_to_skb(parent);	179	skb = rb_to_skb(parent);
180	if (ktime_after(txtime, skb->tstamp)) {	180	if (ktime_compare(txtime, skb->tstamp) >= 0) {
181	p = &parent->rb_right;	181	p = &parent->rb_right;
182	leftmost = false;	182	leftmost = false;
183	} else {	183	} else {

net/sched/sch_netem.c+8−3

 		if (skb->ip_summed == CHECKSUM_PARTIAL &&
 		    skb_checksum_help(skb)) {
 			qdisc_drop(skb, sch, to_free);
+			skb = NULL;
 			goto finish_segs;
 		}
 finish_segs:
 	if (segs) {
 		unsigned int len, last_len;
-		int nb = 0;
+		int nb;
-		len = skb->len;
+		len = skb ? skb->len : 0;
+		nb = skb ? 1 : 0;
 		while (segs) {
 			skb2 = segs->next;
 			}
 			segs = skb2;
 		}
-		qdisc_tree_reduce_backlog(sch, -nb, prev_len - len);
+		/* Parent qdiscs accounted for 1 skb of size @prev_len */
+		qdisc_tree_reduce_backlog(sch, -(nb - 1), -(len - prev_len));
+	} else if (!skb) {
+		return NET_XMIT_DROP;
 	}
 	return NET_XMIT_SUCCESS;
 }

net/sched/sch_taprio.c+4−0

 		NL_SET_ERR_MSG(extack, "Specifying a 'clockid' is mandatory");
 		goto out;
 	}
+	/* Everything went ok, return success. */
+	err = 0;
 out:
 	return err;
 }

net/sctp/diag.c+1−1

@@ -175,7 +175,7 @@ static int inet_sctp_diag_fill(struct sock sk, struct sctp_association asoc, · 174 unmodified lines
175	mem[SK_MEMINFO_FWD_ALLOC] = sk->sk_forward_alloc;	175	mem[SK_MEMINFO_FWD_ALLOC] = sk->sk_forward_alloc;
176	mem[SK_MEMINFO_WMEM_QUEUED] = sk->sk_wmem_queued;	176	mem[SK_MEMINFO_WMEM_QUEUED] = sk->sk_wmem_queued;
177	mem[SK_MEMINFO_OPTMEM] = atomic_read(&sk->sk_omem_alloc);	177	mem[SK_MEMINFO_OPTMEM] = atomic_read(&sk->sk_omem_alloc);
178	mem[SK_MEMINFO_BACKLOG] = sk->sk_backlog.len;	178	mem[SK_MEMINFO_BACKLOG] = READ_ONCE(sk->sk_backlog.len);
179	mem[SK_MEMINFO_DROPS] = atomic_read(&sk->sk_drops);	179	mem[SK_MEMINFO_DROPS] = atomic_read(&sk->sk_drops);
180		180
181	if (nla_put(skb, INET_DIAG_SKMEMINFO, sizeof(mem), &mem) < 0)	181	if (nla_put(skb, INET_DIAG_SKMEMINFO, sizeof(mem), &mem) < 0)

net/sctp/input.c+11−5

 		bh_lock_sock(sk);
 	}
-	if (sock_owned_by_user(sk)) {
+	if (sock_owned_by_user(sk) || !sctp_newsk_ready(sk)) {
 		if (sctp_add_backlog(sk, skb)) {
 			bh_unlock_sock(sk);
 			sctp_chunk_free(chunk);
 		local_bh_disable();
 		bh_lock_sock(sk);
-		if (sock_owned_by_user(sk)) {
+		if (sock_owned_by_user(sk) || !sctp_newsk_ready(sk)) {
-			if (sk_add_backlog(sk, skb, sk->sk_rcvbuf))
+			if (sk_add_backlog(sk, skb, READ_ONCE(sk->sk_rcvbuf)))
 				sctp_chunk_free(chunk);
 			else
 				backloged = 1;
 		if (backloged)
 			return 0;
 	} else {
-		sctp_inq_push(inqueue, chunk);
+		if (!sctp_newsk_ready(sk)) {
+			if (!sk_add_backlog(sk, skb, READ_ONCE(sk->sk_rcvbuf)))
+				return 0;
+			sctp_chunk_free(chunk);
+		} else {
+			sctp_inq_push(inqueue, chunk);
+		}
 	}
 done:
 	struct sctp_ep_common *rcvr = chunk->rcvr;
 	int ret;
-	ret = sk_add_backlog(sk, skb, sk->sk_rcvbuf);
+	ret = sk_add_backlog(sk, skb, READ_ONCE(sk->sk_rcvbuf));
 	if (!ret) {
 		/* Hold the assoc/ep while hanging on the backlog queue.
 		 * This way, we know structures we need will not disappear

net/sctp/socket.c+2−2

@@ -9500,7 +9500,7 @@ struct proto sctp_prot = { · 9499 unmodified lines
9500	.backlog_rcv = sctp_backlog_rcv,	9500	.backlog_rcv = sctp_backlog_rcv,
9501	.hash = sctp_hash,	9501	.hash = sctp_hash,
9502	.unhash = sctp_unhash,	9502	.unhash = sctp_unhash,
9503	.get_port = sctp_get_port,	9503	.no_autobind = true,
9504	.obj_size = sizeof(struct sctp_sock),	9504	.obj_size = sizeof(struct sctp_sock),
9505	.useroffset = offsetof(struct sctp_sock, subscribe),	9505	.useroffset = offsetof(struct sctp_sock, subscribe),
9506	.usersize = offsetof(struct sctp_sock, initmsg) -	9506	.usersize = offsetof(struct sctp_sock, initmsg) -
@@ -9542,7 +9542,7 @@ struct proto sctpv6_prot = { · 35 unmodified lines
9542	.backlog_rcv = sctp_backlog_rcv,	9542	.backlog_rcv = sctp_backlog_rcv,
9543	.hash = sctp_hash,	9543	.hash = sctp_hash,
9544	.unhash = sctp_unhash,	9544	.unhash = sctp_unhash,
9545	.get_port = sctp_get_port,	9545	.no_autobind = true,
9546	.obj_size = sizeof(struct sctp6_sock),	9546	.obj_size = sizeof(struct sctp6_sock),
9547	.useroffset = offsetof(struct sctp6_sock, sctp.subscribe),	9547	.useroffset = offsetof(struct sctp6_sock, sctp.subscribe),
9548	.usersize = offsetof(struct sctp6_sock, sctp.initmsg) -	9548	.usersize = offsetof(struct sctp6_sock, sctp.initmsg) -

net/smc/smc_core.c+4−1

 	lgr = kzalloc(sizeof(*lgr), GFP_KERNEL);
 	if (!lgr) {
 		rc = SMC_CLC_DECL_MEM;
-		goto out;
+		goto ism_put_vlan;
 	}
 	lgr->is_smcd = ini->is_smcd;
 	lgr->sync_err = 0;
 	smc_llc_link_clear(lnk);
 free_lgr:
 	kfree(lgr);
+ism_put_vlan:
+	if (ini->is_smcd && ini->vlan_id)
+		smc_ism_put_vlan(ini->ism_dev, ini->vlan_id);
 out:
 	if (rc < 0) {
 		if (rc == -ENOMEM)

net/smc/smc_rx.c+21−8

 	rc = sk_wait_event(sk, timeo,
 			   sk->sk_err ||
 			   sk->sk_shutdown & RCV_SHUTDOWN ||
-			   fcrit(conn) ||
+			   fcrit(conn),
-			   smc_cdc_rxed_any_close_or_senddone(conn),
 			   &wait);
 	remove_wait_queue(sk_sleep(sk), &wait);
 	sk_clear_bit(SOCKWQ_ASYNC_WAITDATA, sk);
 	return -EAGAIN;
 }
+static bool smc_rx_recvmsg_data_available(struct smc_sock *smc)
+{
+	struct smc_connection *conn = &smc->conn;
+	if (smc_rx_data_available(conn))
+		return true;
+	else if (conn->urg_state == SMC_URG_VALID)
+		/* we received a single urgent Byte - skip */
+		smc_rx_update_cons(smc, 0);
+	return false;
+}
 /* smc_rx_recvmsg - receive data from RMBE
  * @msg:	copy data to receive buffer
  * @pipe:	copy data to pipe if set - indicates splice() call
 		if (read_done >= target || (pipe && read_done))
 			break;
-		if (atomic_read(&conn->bytes_to_rcv))
+		if (smc_rx_recvmsg_data_available(smc))
 			goto copy;
-		else if (conn->urg_state == SMC_URG_VALID)
-			/* we received a single urgent Byte - skip */
-			smc_rx_update_cons(smc, 0);
 		if (sk->sk_shutdown & RCV_SHUTDOWN ||
-		    smc_cdc_rxed_any_close_or_senddone(conn) ||
+		    conn->local_tx_ctrl.conn_state_flags.peer_conn_abort) {
-		    conn->local_tx_ctrl.conn_state_flags.peer_conn_abort)
+			/* smc_cdc_msg_recv_action() could have run after
+			 * above smc_rx_recvmsg_data_available()
+			 */
+			if (smc_rx_recvmsg_data_available(smc))
+				goto copy;
 			break;
+		}
 		if (read_done) {
 			if (sk->sk_err ||

net/tipc/socket.c+4−4

net/vmw_vsock/virtio_transport_common.c+14−3

 	return virtio_transport_get_ops()->send_pkt(pkt);
 }
-static void virtio_transport_inc_rx_pkt(struct virtio_vsock_sock *vvs,
+static bool virtio_transport_inc_rx_pkt(struct virtio_vsock_sock *vvs,
 					struct virtio_vsock_pkt *pkt)
 {
+	if (vvs->rx_bytes + pkt->len > vvs->buf_alloc)
+		return false;
 	vvs->rx_bytes += pkt->len;
+	return true;
 }
 static void virtio_transport_dec_rx_pkt(struct virtio_vsock_sock *vvs,
 		vvs->buf_size_max = val;
 	vvs->buf_size = val;
 	vvs->buf_alloc = val;
+	virtio_transport_send_credit_update(vsk, VIRTIO_VSOCK_TYPE_STREAM,
+					    NULL);
 }
 EXPORT_SYMBOL_GPL(virtio_transport_set_buffer_size);
 			      struct virtio_vsock_pkt *pkt)
 {
 	struct virtio_vsock_sock *vvs = vsk->trans;
-	bool free_pkt = false;
+	bool can_enqueue, free_pkt = false;
 	pkt->len = le32_to_cpu(pkt->hdr.len);
 	pkt->off = 0;
 	spin_lock_bh(&vvs->rx_lock);
-	virtio_transport_inc_rx_pkt(vvs, pkt);
+	can_enqueue = virtio_transport_inc_rx_pkt(vvs, pkt);
+	if (!can_enqueue) {
+		free_pkt = true;
+		goto out;
+	}
 	/* Try to copy small packets into the buffer of last packet queued,
 	 * to avoid wasting memory queueing the entire buffer with a small

net/wireless/nl80211.c+1−1

@@ -13682,7 +13682,7 @@ static int nl80211_get_ftm_responder_stats(struct sk_buff *skb, · 13681 unmodified lines
13682	hdr = nl80211hdr_put(msg, info->snd_portid, info->snd_seq, 0,	13682	hdr = nl80211hdr_put(msg, info->snd_portid, info->snd_seq, 0,
13683	NL80211_CMD_GET_FTM_RESPONDER_STATS);	13683	NL80211_CMD_GET_FTM_RESPONDER_STATS);
13684	if (!hdr)	13684	if (!hdr)
13685	return -ENOBUFS;	13685	goto nla_put_failure;
13686		13686
13687	if (nla_put_u32(msg, NL80211_ATTR_IFINDEX, dev->ifindex))	13687	if (nla_put_u32(msg, NL80211_ATTR_IFINDEX, dev->ifindex))
13688	goto nla_put_failure;	13688	goto nla_put_failure;

net/wireless/reg.c+1−0

@@ -3883,6 +3883,7 @@ bool regulatory_pre_cac_allowed(struct wiphy *wiphy) · 3882 unmodified lines
3883		3883
3884	return pre_cac_allowed;	3884	return pre_cac_allowed;
3885	}	3885	}
		3886	EXPORT_SYMBOL(regulatory_pre_cac_allowed);
3886		3887
3887	void regulatory_propagate_dfs_state(struct wiphy *wiphy,	3888	void regulatory_propagate_dfs_state(struct wiphy *wiphy,
3888	struct cfg80211_chan_def *chandef,	3889	struct cfg80211_chan_def *chandef,

net/wireless/reg.h+0−8

@@ -155,14 +155,6 @@ bool regulatory_indoor_allowed(void); · 154 unmodified lines
155	*/	155	*/
156	#define REG_PRE_CAC_EXPIRY_GRACE_MS 2000	156	#define REG_PRE_CAC_EXPIRY_GRACE_MS 2000
157		157
158	/**
159	* regulatory_pre_cac_allowed - if pre-CAC allowed in the current dfs domain
160	* @wiphy: wiphy for which pre-CAC capability is checked.
161
162	* Pre-CAC is allowed only in ETSI domain.
163	*/
164	bool regulatory_pre_cac_allowed(struct wiphy *wiphy);
165
166	/**	158	/**
167	* regulatory_propagate_dfs_state - Propagate DFS channel state to other wiphys	159	* regulatory_propagate_dfs_state - Propagate DFS channel state to other wiphys
168	* @wiphy - wiphy on which radar is detected and the event will be propagated	160	* @wiphy - wiphy on which radar is detected and the event will be propagated

net/wireless/scan.c+13−10

@@ -1703,8 +1703,7 @@ cfg80211_parse_mbssid_frame_data(struct wiphy *wiphy, · 1702 unmodified lines
1703	static void	1703	static void
1704	cfg80211_update_notlisted_nontrans(struct wiphy *wiphy,	1704	cfg80211_update_notlisted_nontrans(struct wiphy *wiphy,
1705	struct cfg80211_bss *nontrans_bss,	1705	struct cfg80211_bss *nontrans_bss,
1706	struct ieee80211_mgmt *mgmt, size_t len,	1706	struct ieee80211_mgmt *mgmt, size_t len)
1707	gfp_t gfp)
1708	{	1707	{
1709	u8 ie, new_ie, *pos;	1708	u8 ie, new_ie, *pos;
1710	const u8 nontrans_ssid, trans_ssid, *mbssid;	1709	const u8 nontrans_ssid, trans_ssid, *mbssid;
@@ -1715,6 +1714,8 @@ cfg80211_update_notlisted_nontrans(struct wiphy *wiphy, · 4 unmodified lines
1715	const struct cfg80211_bss_ies *old;	1714	const struct cfg80211_bss_ies *old;
1716	u8 cpy_len;	1715	u8 cpy_len;
1717		1716
		1717	lockdep_assert_held(&wiphy_to_rdev(wiphy)->bss_lock);
		1718
1718	ie = mgmt->u.probe_resp.variable;	1719	ie = mgmt->u.probe_resp.variable;
1719		1720
1720	new_ie_len = ielen;	1721	new_ie_len = ielen;
@@ -1731,23 +1732,22 @@ cfg80211_update_notlisted_nontrans(struct wiphy *wiphy, · 10 unmodified lines
1731	if (!mbssid \|\| mbssid < trans_ssid)	1732	if (!mbssid \|\| mbssid < trans_ssid)
1732	return;	1733	return;
1733	new_ie_len -= mbssid[1];	1734	new_ie_len -= mbssid[1];
1734	rcu_read_lock();	1735
1735	nontrans_ssid = ieee80211_bss_get_ie(nontrans_bss, WLAN_EID_SSID);	1736	nontrans_ssid = ieee80211_bss_get_ie(nontrans_bss, WLAN_EID_SSID);
1736	if (!nontrans_ssid) {	1737	if (!nontrans_ssid)
1737	rcu_read_unlock();
1738	return;	1738	return;
1739	}	1739
1740	new_ie_len += nontrans_ssid[1];	1740	new_ie_len += nontrans_ssid[1];
1741	rcu_read_unlock();
1742		1741
1743	/* generate new ie for nontrans BSS	1742	/* generate new ie for nontrans BSS
1744	* 1. replace SSID with nontrans BSS' SSID	1743	* 1. replace SSID with nontrans BSS' SSID
1745	* 2. skip MBSSID IE	1744	* 2. skip MBSSID IE
1746	*/	1745	*/
1747	new_ie = kzalloc(new_ie_len, gfp);	1746	new_ie = kzalloc(new_ie_len, GFP_ATOMIC);
1748	if (!new_ie)	1747	if (!new_ie)
1749	return;	1748	return;
1750	new_ies = kzalloc(sizeof(*new_ies) + new_ie_len, gfp);	1749
		1750	new_ies = kzalloc(sizeof(*new_ies) + new_ie_len, GFP_ATOMIC);
1751	if (!new_ies)	1751	if (!new_ies)
1752	goto out_free;	1752	goto out_free;
1753		1753
@@ -1901,6 +1901,8 @@ cfg80211_inform_bss_frame_data(struct wiphy *wiphy, · 147 unmodified lines
1901	cfg80211_parse_mbssid_frame_data(wiphy, data, mgmt, len,	1901	cfg80211_parse_mbssid_frame_data(wiphy, data, mgmt, len,
1902	&non_tx_data, gfp);	1902	&non_tx_data, gfp);
1903		1903
		1904	spin_lock_bh(&wiphy_to_rdev(wiphy)->bss_lock);
		1905
1904	/* check if the res has other nontransmitting bss which is not	1906	/* check if the res has other nontransmitting bss which is not
1905	* in MBSSID IE	1907	* in MBSSID IE
1906	*/	1908	*/
@@ -1915,8 +1917,9 @@ cfg80211_inform_bss_frame_data(struct wiphy *wiphy, · 8 unmodified lines
1915	ies2 = rcu_access_pointer(tmp_bss->ies);	1917	ies2 = rcu_access_pointer(tmp_bss->ies);
1916	if (ies2->tsf < ies1->tsf)	1918	if (ies2->tsf < ies1->tsf)
1917	cfg80211_update_notlisted_nontrans(wiphy, tmp_bss,	1919	cfg80211_update_notlisted_nontrans(wiphy, tmp_bss,
1918	mgmt, len, gfp);	1920	mgmt, len);
1919	}	1921	}
		1922	spin_unlock_bh(&wiphy_to_rdev(wiphy)->bss_lock);
1920		1923
1921	return res;	1924	return res;
1922	}	1925	}

net/wireless/wext-sme.c+6−2

 			       struct iw_point *data, char *ssid)
 {
 	struct wireless_dev *wdev = dev->ieee80211_ptr;
+	int ret = 0;
 	/* call only for station! */
 	if (WARN_ON(wdev->iftype != NL80211_IFTYPE_STATION))
 		if (ie) {
 			data->flags = 1;
 			data->length = ie[1];
-			memcpy(ssid, ie + 2, data->length);
+			if (data->length > IW_ESSID_MAX_SIZE)
+				ret = -EINVAL;
+			else
+				memcpy(ssid, ie + 2, data->length);
 		}
 		rcu_read_unlock();
 	} else if (wdev->wext.connect.ssid && wdev->wext.connect.ssid_len) {
 	}
 	wdev_unlock(wdev);
-	return 0;
+	return ret;
 }
 int cfg80211_mgd_wext_siwap(struct net_device *dev,

net/x25/x25_dev.c+1−1

@@ -55,7 +55,7 @@ static int x25_receive_data(struct sk_buff skb, struct x25_neigh nb) · 54 unmodified lines
55	if (!sock_owned_by_user(sk)) {	55	if (!sock_owned_by_user(sk)) {
56	queued = x25_process_rx_frame(sk, skb);	56	queued = x25_process_rx_frame(sk, skb);
57	} else {	57	} else {
58	queued = !sk_add_backlog(sk, skb, sk->sk_rcvbuf);	58	queued = !sk_add_backlog(sk, skb, READ_ONCE(sk->sk_rcvbuf));
59	}	59	}
60	bh_unlock_sock(sk);	60	bh_unlock_sock(sk);
61	sock_put(sk);	61	sock_put(sk);

net/xdp/xsk.c+27−15

 }
 EXPORT_SYMBOL(xsk_umem_consume_tx);
-static int xsk_zc_xmit(struct sock *sk)
+static int xsk_zc_xmit(struct xdp_sock *xs)
 {
-	struct xdp_sock *xs = xdp_sk(sk);
 	struct net_device *dev = xs->dev;
 	return dev->netdev_ops->ndo_xsk_wakeup(dev, xs->queue_id,
 	sock_wfree(skb);
 }
-static int xsk_generic_xmit(struct sock *sk, struct msghdr *m,
+static int xsk_generic_xmit(struct sock *sk)
-			    size_t total_len)
 {
-	u32 max_batch = TX_BATCH_SIZE;
 	struct xdp_sock *xs = xdp_sk(sk);
+	u32 max_batch = TX_BATCH_SIZE;
 	bool sent_frame = false;
 	struct xdp_desc desc;
 	struct sk_buff *skb;
 	return err;
 }
+static int __xsk_sendmsg(struct sock *sk)
+{
+	struct xdp_sock *xs = xdp_sk(sk);
+	if (unlikely(!(xs->dev->flags & IFF_UP)))
+		return -ENETDOWN;
+	if (unlikely(!xs->tx))
+		return -ENOBUFS;
+	return xs->zc ? xsk_zc_xmit(xs) : xsk_generic_xmit(sk);
+}
 static int xsk_sendmsg(struct socket *sock, struct msghdr *m, size_t total_len)
 {
 	bool need_wait = !(m->msg_flags & MSG_DONTWAIT);
 	if (unlikely(!xsk_is_bound(xs)))
 		return -ENXIO;
-	if (unlikely(!(xs->dev->flags & IFF_UP)))
+	if (unlikely(need_wait))
-		return -ENETDOWN;
-	if (unlikely(!xs->tx))
-		return -ENOBUFS;
-	if (need_wait)
 		return -EOPNOTSUPP;
-	return (xs->zc) ? xsk_zc_xmit(sk) : xsk_generic_xmit(sk, m, total_len);
+	return __xsk_sendmsg(sk);
 }
 static unsigned int xsk_poll(struct file *file, struct socket *sock,
 			     struct poll_table_struct *wait)
 {
 	unsigned int mask = datagram_poll(file, sock, wait);
-	struct xdp_sock *xs = xdp_sk(sock->sk);
+	struct sock *sk = sock->sk;
+	struct xdp_sock *xs = xdp_sk(sk);
 	struct net_device *dev;
 	struct xdp_umem *umem;
 	dev = xs->dev;
 	umem = xs->umem;
-	if (umem->need_wakeup)
+	if (umem->need_wakeup) {
-		dev->netdev_ops->ndo_xsk_wakeup(dev, xs->queue_id,
+		if (dev->netdev_ops->ndo_xsk_wakeup)
-						umem->need_wakeup);
+			dev->netdev_ops->ndo_xsk_wakeup(dev, xs->queue_id,
+							umem->need_wakeup);
+		else
+			/* Poll needs to drive Tx also in copy mode */
+			__xsk_sendmsg(sk);
+	}
 	if (xs->rx && !xskq_empty_desc(xs->rx))
 		mask |= POLLIN | POLLRDNORM;

samples/bpf/asm_goto_workaround.h+12−1

 #ifndef __ASM_GOTO_WORKAROUND_H
 #define __ASM_GOTO_WORKAROUND_H
-/* this will bring in asm_volatile_goto macro definition
+/*
+ * This will bring in asm_volatile_goto and asm_inline macro definitions
  * if enabled by compiler and config options.
  */
 #include <linux/types.h>
 #define asm_volatile_goto(x...) asm volatile("invalid use of asm_volatile_goto")
 #endif
+/*
+ * asm_inline is defined as asm __inline in "include/linux/compiler_types.h"
+ * if supported by the kernel's CC (i.e CONFIG_CC_HAS_ASM_INLINE) which is not
+ * supported by CLANG.
+ */
+#ifdef asm_inline
+#undef asm_inline
+#define asm_inline asm
+#endif
 #define volatile(x...) volatile("")
 #endif

samples/bpf/task_fd_query_user.c+1−0

@@ -13,6 +13,7 @@ · 12 unmodified lines
13	#include <sys/resource.h>	13	#include <sys/resource.h>
14	#include <sys/types.h>	14	#include <sys/types.h>
15	#include <sys/stat.h>	15	#include <sys/stat.h>
		16	#include <linux/perf_event.h>
16		17
17	#include "libbpf.h"	18	#include "libbpf.h"
18	#include "bpf_load.h"	19	#include "bpf_load.h"

scripts/coccinelle/api/devm_platform_ioremap_resource.cocci+0−60

@@ -1,60 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0
2	/// Use devm_platform_ioremap_resource helper which wraps
3	/// platform_get_resource() and devm_ioremap_resource() together.
4	///
5	// Confidence: High
6	// Copyright: (C) 2019 Himanshu Jha GPLv2.
7	// Copyright: (C) 2019 Julia Lawall, Inria/LIP6. GPLv2.
8	// Keywords: platform_get_resource, devm_ioremap_resource,
9	// Keywords: devm_platform_ioremap_resource
10
11	virtual patch
12	virtual report
13
14	@r depends on patch && !report@
15	expression e1, e2, arg1, arg2, arg3;
16	identifier id;
17	@@
18
19	(
20	- id = platform_get_resource(arg1, IORESOURCE_MEM, arg2);
21	\|
22	- struct resource *id = platform_get_resource(arg1, IORESOURCE_MEM, arg2);
23	)
24	... when != id
25	- e1 = devm_ioremap_resource(arg3, id);
26	+ e1 = devm_platform_ioremap_resource(arg1, arg2);
27	... when != id
28	? id = e2
29
30	@r1 depends on patch && !report@
31	identifier r.id;
32	type T;
33	@@
34
35	- T *id;
36	...when != id
37
38	@r2 depends on report && !patch@
39	identifier id;
40	expression e1, e2, arg1, arg2, arg3;
41	position j0;
42	@@
43
44	(
45	id = platform_get_resource(arg1, IORESOURCE_MEM, arg2);
46	\|
47	struct resource *id = platform_get_resource(arg1, IORESOURCE_MEM, arg2);
48	)
49	... when != id
50	e1@j0 = devm_ioremap_resource(arg3, id);
51	... when != id
52	? id = e2
53
54	@script:python depends on report && !patch@
55	e1 << r2.e1;
56	j0 << r2.j0;
57	@@
58
59	msg = "WARNING: Use devm_platform_ioremap_resource for %s" % (e1)
60	coccilib.report.print_report(j0[0], msg)

scripts/gdb/linux/dmesg.py+12−4

 from linux import utils
+printk_log_type = utils.CachedType("struct printk_log")
 class LxDmesg(gdb.Command):
     """Print Linux kernel log buffer."""
             b = utils.read_memoryview(inf, log_buf_addr, log_next_idx)
             log_buf = a.tobytes() + b.tobytes()
+        length_offset = printk_log_type.get_type()['len'].bitpos // 8
+        text_len_offset = printk_log_type.get_type()['text_len'].bitpos // 8
+        time_stamp_offset = printk_log_type.get_type()['ts_nsec'].bitpos // 8
+        text_offset = printk_log_type.get_type().sizeof
         pos = 0
         while pos < log_buf.__len__():
-            length = utils.read_u16(log_buf[pos + 8:pos + 10])
+            length = utils.read_u16(log_buf, pos + length_offset)
             if length == 0:
                 if log_buf_2nd_half == -1:
                     gdb.write("Corrupted log buffer!\n")
                 pos = log_buf_2nd_half
                 continue
-            text_len = utils.read_u16(log_buf[pos + 10:pos + 12])
+            text_len = utils.read_u16(log_buf, pos + text_len_offset)
-            text = log_buf[pos + 16:pos + 16 + text_len].decode(
+            text_start = pos + text_offset
+            text = log_buf[text_start:text_start + text_len].decode(
                 encoding='utf8', errors='replace')
-            time_stamp = utils.read_u64(log_buf[pos:pos + 8])
+            time_stamp = utils.read_u64(log_buf, pos + time_stamp_offset)
             for line in text.splitlines():
                 msg = u"[{time:12.6f}] {line}\n".format(

scripts/gdb/linux/symbols.py+7−1

 import os
 import re
-from linux import modules
+from linux import modules, utils
 if hasattr(gdb, 'Breakpoint'):
             module_file = self._get_module_file(module_name)
         if module_file:
+            if utils.is_target_arch('s390'):
+                # Module text is preceded by PLT stubs on s390.
+                module_arch = module['arch']
+                plt_offset = int(module_arch['plt_offset'])
+                plt_size = int(module_arch['plt_size'])
+                module_addr = hex(int(module_addr, 0) + plt_offset + plt_size)
             gdb.write("loading @{addr}: {filename}\n".format(
                 addr=module_addr, filename=module_file))
             cmdline = "add-symbol-file {filename} {addr}{sections}".format(

scripts/gdb/linux/utils.py+13−12

@@ -92,15 +92,16 @@ def read_memoryview(inf, start, length): · 91 unmodified lines
92	return memoryview(inf.read_memory(start, length))	92	return memoryview(inf.read_memory(start, length))
93		93
94		94
95	def read_u16(buffer):	95	def read_u16(buffer, offset):
		96	buffer_val = buffer[offset:offset + 2]
96	value = [0, 0]	97	value = [0, 0]
97		98
98	if type(buffer[0]) is str:	99	if type(buffer_val[0]) is str:
99	value[0] = ord(buffer[0])	100	value[0] = ord(buffer_val[0])
100	value[1] = ord(buffer[1])	101	value[1] = ord(buffer_val[1])
101	else:	102	else:
102	value[0] = buffer[0]	103	value[0] = buffer_val[0]
103	value[1] = buffer[1]	104	value[1] = buffer_val[1]
104		105
105	if get_target_endianness() == LITTLE_ENDIAN:	106	if get_target_endianness() == LITTLE_ENDIAN:
106	return value[0] + (value[1] << 8)	107	return value[0] + (value[1] << 8)
@@ -108,18 +109,18 @@ def read_u16(buffer): · 1 unmodified line
108	return value[1] + (value[0] << 8)	109	return value[1] + (value[0] << 8)
109		110
110		111
111	def read_u32(buffer):	112	def read_u32(buffer, offset):
112	if get_target_endianness() == LITTLE_ENDIAN:	113	if get_target_endianness() == LITTLE_ENDIAN:
113	return read_u16(buffer[0:2]) + (read_u16(buffer[2:4]) << 16)	114	return read_u16(buffer, offset) + (read_u16(buffer, offset + 2) << 16)
114	else:	115	else:
115	return read_u16(buffer[2:4]) + (read_u16(buffer[0:2]) << 16)	116	return read_u16(buffer, offset + 2) + (read_u16(buffer, offset) << 16)
116		117
117		118
118	def read_u64(buffer):	119	def read_u64(buffer, offset):
119	if get_target_endianness() == LITTLE_ENDIAN:	120	if get_target_endianness() == LITTLE_ENDIAN:
120	return read_u32(buffer[0:4]) + (read_u32(buffer[4:8]) << 32)	121	return read_u32(buffer, offset) + (read_u32(buffer, offset + 4) << 32)
121	else:	122	else:
122	return read_u32(buffer[4:8]) + (read_u32(buffer[0:4]) << 32)	123	return read_u32(buffer, offset + 4) + (read_u32(buffer, offset) << 32)
123		124
124		125
125	target_arch = None	126	target_arch = None

scripts/mod/modpost.c+40−19

 		return export_unknown;
 }
-static char *sym_extract_namespace(const char **symname)
+static const char *namespace_from_kstrtabns(struct elf_info *info,
+					    Elf_Sym *kstrtabns)
 {
-	char *namespace = NULL;
+	char *value = info->ksymtab_strings + kstrtabns->st_value;
-	char *ns_separator;
+	return value[0] ? value : NULL;
+}
+static void sym_update_namespace(const char *symname, const char *namespace)
+{
+	struct symbol *s = find_symbol(symname);
-	ns_separator = strchr(*symname, '.');
+	/*
-	if (ns_separator) {
+	 * That symbol should have been created earlier and thus this is
-		namespace = NOFAIL(strndup(*symname, ns_separator - *symname));
+	 * actually an assertion.
-		*symname = ns_separator + 1;
+	 */
+	if (!s) {
+		merror("Could not update namespace(%s) for symbol %s\n",
+		       namespace, symname);
+		return;
 	}
-	return namespace;
+	free(s->namespace);
+	s->namespace =
+		namespace && namespace[0] ? NOFAIL(strdup(namespace)) : NULL;
 }
 /**
  * Add an exported symbol - it may have already been added without a
  * CRC, in this case just update the CRC
  **/
-static struct symbol *sym_add_exported(const char *name, const char *namespace,
+static struct symbol *sym_add_exported(const char *name, struct module *mod,
-				       struct module *mod, enum export export)
+				       enum export export)
 {
 	struct symbol *s = find_symbol(name);
 			s->module = mod;
 		}
 	}
-	free(s->namespace);
-	s->namespace = namespace ? strdup(namespace) : NULL;
 	s->preloaded = 0;
 	s->vmlinux   = is_vmlinux(mod->name);
 	s->kernel    = 0;
 			info->export_unused_gpl_sec = i;
 		else if (strcmp(secname, "__ksymtab_gpl_future") == 0)
 			info->export_gpl_future_sec = i;
+		else if (strcmp(secname, "__ksymtab_strings") == 0)
+			info->ksymtab_strings = (void *)hdr +
+						sechdrs[i].sh_offset -
+						sechdrs[i].sh_addr;
 		if (sechdrs[i].sh_type == SHT_SYMTAB) {
 			unsigned int sh_link_idx;
 	enum export export;
 	bool is_crc = false;
 	const char *name;
-	char *namespace;
 	if ((!is_vmlinux(mod->name) || mod->is_dot_o) &&
 	    strstarts(symname, "__ksymtab"))
 		/* All exported symbols */
 		if (strstarts(symname, "__ksymtab_")) {
 			name = symname + strlen("__ksymtab_");
-			namespace = sym_extract_namespace(&name);
+			sym_add_exported(name, mod, export);
-			sym_add_exported(name, namespace, mod, export);
-			free(namespace);
 		}
 		if (strcmp(symname, "init_module") == 0)
 			mod->has_init = 1;
 		handle_moddevtable(mod, &info, sym, symname);
 	}
+	/* Apply symbol namespaces from __kstrtabns_<symbol> entries. */
+	for (sym = info.symtab_start; sym < info.symtab_stop; sym++) {
+		symname = remove_dot(info.strtab + sym->st_name);
+		if (strstarts(symname, "__kstrtabns_"))
+			sym_update_namespace(symname + strlen("__kstrtabns_"),
+					     namespace_from_kstrtabns(&info,
+								      sym));
+	}
 	// check for static EXPORT_SYMBOL_* functions && global vars
 	for (sym = info.symtab_start; sym < info.symtab_stop; sym++) {
 		unsigned char bind = ELF_ST_BIND(sym->st_info);
 		else
 			basename = mod->name;
-		if (exp->namespace && exp->namespace[0]) {
+		if (exp->namespace) {
 			add_namespace(&mod->required_namespaces,
 				      exp->namespace);
 			mod = new_module(modname);
 			mod->skip = 1;
 		}
-		s = sym_add_exported(symname, namespace, mod,
+		s = sym_add_exported(symname, mod, export_no(export));
-				     export_no(export));
 		s->kernel    = kernel;
 		s->preloaded = 1;
 		s->is_static = 0;
 		sym_update_crc(symname, mod, crc, export_no(export));
+		sym_update_namespace(symname, namespace);
 	}
 	release_file(file, size);
 	return;

scripts/mod/modpost.h+1−0

@@ -143,6 +143,7 @@ struct elf_info { · 142 unmodified lines
143	Elf_Section export_gpl_sec;	143	Elf_Section export_gpl_sec;
144	Elf_Section export_unused_gpl_sec;	144	Elf_Section export_unused_gpl_sec;
145	Elf_Section export_gpl_future_sec;	145	Elf_Section export_gpl_future_sec;
		146	char *ksymtab_strings;
146	char *strtab;	147	char *strtab;
147	char *modinfo;	148	char *modinfo;
148	unsigned int modinfo_len;	149	unsigned int modinfo_len;

scripts/nsdeps+1−1

@@ -33,7 +33,7 @@ generate_deps() { · 32 unmodified lines
33	if [ ! -f "$ns_deps_file" ]; then return; fi	33	if [ ! -f "$ns_deps_file" ]; then return; fi
34	local mod_source_files=`cat $mod_file \| sed -n 1p \	34	local mod_source_files=`cat $mod_file \| sed -n 1p \
35	\| sed -e 's/\.o/\.c/g' \	35	\| sed -e 's/\.o/\.c/g' \
36	\| sed "s/[^ ]* */${srctree}\/&/g"`	36	\| sed "s\|[^ ]* *\|${srctree}/&\|g"`
37	for ns in `cat $ns_deps_file`; do	37	for ns in `cat $ns_deps_file`; do
38	echo "Adding namespace $ns to module $mod_name (if needed)."	38	echo "Adding namespace $ns to module $mod_name (if needed)."
39	generate_deps_for_ns $ns $mod_source_files	39	generate_deps_for_ns $ns $mod_source_files

scripts/setlocalversion+1−1

@@ -93,7 +93,7 @@ scm_version() · 92 unmodified lines
93	# Check for mercurial and a mercurial repo.	93	# Check for mercurial and a mercurial repo.
94	if test -d .hg && hgid=`hg id 2>/dev/null`; then	94	if test -d .hg && hgid=`hg id 2>/dev/null`; then
95	# Do we have an tagged version? If so, latesttagdistance == 1	95	# Do we have an tagged version? If so, latesttagdistance == 1
96	if [ "`hg log -r . --template '{latesttagdistance}'`" == "1" ]; then	96	if [ "`hg log -r . --template '{latesttagdistance}'`" = "1" ]; then
97	id=`hg log -r . --template '{latesttag}'`	97	id=`hg log -r . --template '{latesttag}'`
98	printf '%s%s' -hg "$id"	98	printf '%s%s' -hg "$id"
99	else	99	else

sound/hda/ext/hdac_ext_controller.c+5−0

 		ret = snd_hdac_ext_bus_link_power_up(link);
+		/*
+		 * clear the register to invalidate all the output streams
+		 */
+		snd_hdac_updatew(link->ml_addr, AZX_REG_ML_LOSIDV,
+				 ML_LOSIDV_STREAM_MASK, 0);
 		/*
 		 *  wait for 521usec for codec to report status
 		 *  HDA spec section 4.3 - Codec Discovery

sound/pci/hda/hda_intel.c+6−0

 	/* Icelake */
 	{ PCI_DEVICE(0x8086, 0x34c8),
 	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
+	/* Jasperlake */
+	{ PCI_DEVICE(0x8086, 0x38c8),
+	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
+	/* Tigerlake */
+	{ PCI_DEVICE(0x8086, 0xa0c8),
+	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
 	/* Elkhart Lake */
 	{ PCI_DEVICE(0x8086, 0x4b55),
 	  .driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},

sound/pci/hda/patch_hdmi.c+2−0

@@ -3474,6 +3474,8 @@ static int patch_nvhdmi(struct hda_codec *codec) · 3473 unmodified lines
3474	nvhdmi_chmap_cea_alloc_validate_get_type;	3474	nvhdmi_chmap_cea_alloc_validate_get_type;
3475	spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;	3475	spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3476		3476
		3477	codec->link_down_at_suspend = 1;
		3478
3477	generic_acomp_init(codec, &nvhdmi_audio_ops, nvhdmi_port2pin);	3479	generic_acomp_init(codec, &nvhdmi_audio_ops, nvhdmi_port2pin);
3478		3480
3479	return 0;	3481	return 0;

sound/pci/hda/patch_realtek.c+35−3

 	case 0x10ec0700:
 	case 0x10ec0701:
 	case 0x10ec0703:
+	case 0x10ec0711:
 		alc_update_coef_idx(codec, 0x10, 1<<15, 0);
 		break;
 	case 0x10ec0662:
 	}
 }
+static void alc256_fixup_dell_xps_13_headphone_noise2(struct hda_codec *codec,
+						      const struct hda_fixup *fix,
+						      int action)
+{
+	if (action != HDA_FIXUP_ACT_PRE_PROBE)
+		return;
+	snd_hda_codec_amp_stereo(codec, 0x1a, HDA_INPUT, 0, HDA_AMP_VOLMASK, 1);
+	snd_hda_override_wcaps(codec, 0x1a, get_wcaps(codec, 0x1a) & ~AC_WCAP_IN_AMP);
+}
 static void alc269_fixup_limit_int_mic_boost(struct hda_codec *codec,
 					     const struct hda_fixup *fix,
 					     int action)
 	ALC298_FIXUP_DELL_AIO_MIC_NO_PRESENCE,
 	ALC275_FIXUP_DELL_XPS,
 	ALC256_FIXUP_DELL_XPS_13_HEADPHONE_NOISE,
+	ALC256_FIXUP_DELL_XPS_13_HEADPHONE_NOISE2,
 	ALC293_FIXUP_LENOVO_SPK_NOISE,
 	ALC233_FIXUP_LENOVO_LINE2_MIC_HOTKEY,
 	ALC255_FIXUP_DELL_SPK_NOISE,
 	ALC225_FIXUP_WYSE_AUTO_MUTE,
 	ALC225_FIXUP_WYSE_DISABLE_MIC_VREF,
 	ALC286_FIXUP_ACER_AIO_HEADSET_MIC,
+	ALC256_FIXUP_ASUS_HEADSET_MIC,
 	ALC256_FIXUP_ASUS_MIC_NO_PRESENCE,
 	ALC299_FIXUP_PREDATOR_SPK,
 	ALC294_FIXUP_ASUS_INTSPK_HEADSET_MIC,
 		.chained = true,
 		.chain_id = ALC255_FIXUP_DELL1_MIC_NO_PRESENCE
 	},
+	[ALC256_FIXUP_DELL_XPS_13_HEADPHONE_NOISE2] = {
+		.type = HDA_FIXUP_FUNC,
+		.v.func = alc256_fixup_dell_xps_13_headphone_noise2,
+		.chained = true,
+		.chain_id = ALC256_FIXUP_DELL_XPS_13_HEADPHONE_NOISE
+	},
 	[ALC293_FIXUP_LENOVO_SPK_NOISE] = {
 		.type = HDA_FIXUP_FUNC,
 		.v.func = alc_fixup_disable_aamix,
 		.chained = true,
 		.chain_id = ALC286_FIXUP_ACER_AIO_MIC_NO_PRESENCE
 	},
+	[ALC256_FIXUP_ASUS_HEADSET_MIC] = {
+		.type = HDA_FIXUP_PINS,
+		.v.pins = (const struct hda_pintbl[]) {
+			{ 0x19, 0x03a11020 }, /* headset mic with jack detect */
+			{ }
+		},
+		.chained = true,
+		.chain_id = ALC256_FIXUP_ASUS_HEADSET_MODE
+	},
 	[ALC256_FIXUP_ASUS_MIC_NO_PRESENCE] = {
 		.type = HDA_FIXUP_PINS,
 		.v.pins = (const struct hda_pintbl[]) {
 	SND_PCI_QUIRK(0x1028, 0x06de, "Dell", ALC293_FIXUP_DISABLE_AAMIX_MULTIJACK),
 	SND_PCI_QUIRK(0x1028, 0x06df, "Dell", ALC293_FIXUP_DISABLE_AAMIX_MULTIJACK),
 	SND_PCI_QUIRK(0x1028, 0x06e0, "Dell", ALC293_FIXUP_DISABLE_AAMIX_MULTIJACK),
-	SND_PCI_QUIRK(0x1028, 0x0704, "Dell XPS 13 9350", ALC256_FIXUP_DELL_XPS_13_HEADPHONE_NOISE),
+	SND_PCI_QUIRK(0x1028, 0x0704, "Dell XPS 13 9350", ALC256_FIXUP_DELL_XPS_13_HEADPHONE_NOISE2),
 	SND_PCI_QUIRK(0x1028, 0x0706, "Dell Inspiron 7559", ALC256_FIXUP_DELL_INSPIRON_7559_SUBWOOFER),
 	SND_PCI_QUIRK(0x1028, 0x0725, "Dell Inspiron 3162", ALC255_FIXUP_DELL_SPK_NOISE),
 	SND_PCI_QUIRK(0x1028, 0x0738, "Dell Precision 5820", ALC269_FIXUP_NO_SHUTUP),
-	SND_PCI_QUIRK(0x1028, 0x075b, "Dell XPS 13 9360", ALC256_FIXUP_DELL_XPS_13_HEADPHONE_NOISE),
+	SND_PCI_QUIRK(0x1028, 0x075b, "Dell XPS 13 9360", ALC256_FIXUP_DELL_XPS_13_HEADPHONE_NOISE2),
 	SND_PCI_QUIRK(0x1028, 0x075c, "Dell XPS 27 7760", ALC298_FIXUP_SPK_VOLUME),
 	SND_PCI_QUIRK(0x1028, 0x075d, "Dell AIO", ALC298_FIXUP_SPK_VOLUME),
 	SND_PCI_QUIRK(0x1028, 0x07b0, "Dell Precision 7520", ALC295_FIXUP_DISABLE_DAC3),
 	SND_PCI_QUIRK(0x1028, 0x0798, "Dell Inspiron 17 7000 Gaming", ALC256_FIXUP_DELL_INSPIRON_7559_SUBWOOFER),
 	SND_PCI_QUIRK(0x1028, 0x080c, "Dell WYSE", ALC225_FIXUP_DELL_WYSE_MIC_NO_PRESENCE),
-	SND_PCI_QUIRK(0x1028, 0x082a, "Dell XPS 13 9360", ALC256_FIXUP_DELL_XPS_13_HEADPHONE_NOISE),
+	SND_PCI_QUIRK(0x1028, 0x082a, "Dell XPS 13 9360", ALC256_FIXUP_DELL_XPS_13_HEADPHONE_NOISE2),
 	SND_PCI_QUIRK(0x1028, 0x084b, "Dell", ALC274_FIXUP_DELL_AIO_LINEOUT_VERB),
 	SND_PCI_QUIRK(0x1028, 0x084e, "Dell", ALC274_FIXUP_DELL_AIO_LINEOUT_VERB),
 	SND_PCI_QUIRK(0x1028, 0x0871, "Dell Precision 3630", ALC255_FIXUP_DELL_HEADSET_MIC),
 	SND_PCI_QUIRK(0x1043, 0x1517, "Asus Zenbook UX31A", ALC269VB_FIXUP_ASUS_ZENBOOK_UX31A),
 	SND_PCI_QUIRK(0x1043, 0x16e3, "ASUS UX50", ALC269_FIXUP_STEREO_DMIC),
 	SND_PCI_QUIRK(0x1043, 0x17d1, "ASUS UX431FL", ALC294_FIXUP_ASUS_INTSPK_HEADSET_MIC),
+	SND_PCI_QUIRK(0x1043, 0x18b1, "Asus MJ401TA", ALC256_FIXUP_ASUS_HEADSET_MIC),
 	SND_PCI_QUIRK(0x1043, 0x1a13, "Asus G73Jw", ALC269_FIXUP_ASUS_G73JW),
 	SND_PCI_QUIRK(0x1043, 0x1a30, "ASUS X705UD", ALC256_FIXUP_ASUS_MIC),
 	SND_PCI_QUIRK(0x1043, 0x1b13, "Asus U41SV", ALC269_FIXUP_INV_DMIC),
 	case 0x10ec0700:
 	case 0x10ec0701:
 	case 0x10ec0703:
+	case 0x10ec0711:
 		spec->codec_variant = ALC269_TYPE_ALC700;
 		spec->gen.mixer_nid = 0; /* ALC700 does not have any loopback mixer path */
 		alc_update_coef_idx(codec, 0x4a, 1 << 15, 0); /* Combo jack auto trigger control */
 	HDA_CODEC_ENTRY(0x10ec0700, "ALC700", patch_alc269),
 	HDA_CODEC_ENTRY(0x10ec0701, "ALC701", patch_alc269),
 	HDA_CODEC_ENTRY(0x10ec0703, "ALC703", patch_alc269),
+	HDA_CODEC_ENTRY(0x10ec0711, "ALC711", patch_alc269),
 	HDA_CODEC_ENTRY(0x10ec0867, "ALC891", patch_alc662),
 	HDA_CODEC_ENTRY(0x10ec0880, "ALC880", patch_alc880),
 	HDA_CODEC_ENTRY(0x10ec0882, "ALC882", patch_alc882),

sound/soc/codecs/max98373.c+12−8

@@ -901,16 +901,20 @@ static void max98373_slot_config(struct i2c_client *i2c, · 900 unmodified lines
901	max98373->i_slot = value & 0xF;	901	max98373->i_slot = value & 0xF;
902	else	902	else
903	max98373->i_slot = 1;	903	max98373->i_slot = 1;
904		904	if (dev->of_node) {
905	max98373->reset_gpio = of_get_named_gpio(dev->of_node,	905	max98373->reset_gpio = of_get_named_gpio(dev->of_node,
906	"maxim,reset-gpio", 0);	906	"maxim,reset-gpio", 0);
907	if (!gpio_is_valid(max98373->reset_gpio)) {	907	if (!gpio_is_valid(max98373->reset_gpio)) {
908	dev_err(dev, "Looking up %s property in node %s failed %d\n",	908	dev_err(dev, "Looking up %s property in node %s failed %d\n",
909	"maxim,reset-gpio", dev->of_node->full_name,	909	"maxim,reset-gpio", dev->of_node->full_name,
910	max98373->reset_gpio);	910	max98373->reset_gpio);
		911	} else {
		912	dev_dbg(dev, "maxim,reset-gpio=%d",
		913	max98373->reset_gpio);
		914	}
911	} else {	915	} else {
912	dev_dbg(dev, "maxim,reset-gpio=%d",	916	/* this makes reset_gpio as invalid */
913	max98373->reset_gpio);	917	max98373->reset_gpio = -1;
914	}	918	}
915		919
916	if (!device_property_read_u32(dev, "maxim,spkfb-slot-no", &value))	920	if (!device_property_read_u32(dev, "maxim,spkfb-slot-no", &value))

sound/soc/codecs/msm8916-wcd-digital.c+22−0

 	"ZERO", "IIR1", "IIR2", "RX1", "RX2", "RX3"
 };
+static const char * const rx_mix2_text[] = {
+	"ZERO", "IIR1", "IIR2"
+};
 static const char *const dec_mux_text[] = {
 	"ZERO", "ADC1", "ADC2", "ADC3", "DMIC1", "DMIC2"
 };
 	SOC_ENUM_SINGLE(LPASS_CDC_CONN_RX3_B2_CTL, 0, 6, rx_mix1_text),
 };
+/* RX1 MIX2 */
+static const struct soc_enum rx_mix2_inp1_chain_enum =
+	SOC_ENUM_SINGLE(LPASS_CDC_CONN_RX1_B3_CTL,
+		0, 3, rx_mix2_text);
+/* RX2 MIX2 */
+static const struct soc_enum rx2_mix2_inp1_chain_enum =
+	SOC_ENUM_SINGLE(LPASS_CDC_CONN_RX2_B3_CTL,
+		0, 3, rx_mix2_text);
 /* DEC */
 static const struct soc_enum dec1_mux_enum = SOC_ENUM_SINGLE(
 				LPASS_CDC_CONN_TX_B1_CTL, 0, 6, dec_mux_text);
 				"RX3 MIX1 INP2 Mux", rx3_mix1_inp_enum[1]);
 static const struct snd_kcontrol_new rx3_mix1_inp3_mux = SOC_DAPM_ENUM(
 				"RX3 MIX1 INP3 Mux", rx3_mix1_inp_enum[2]);
+static const struct snd_kcontrol_new rx1_mix2_inp1_mux = SOC_DAPM_ENUM(
+				"RX1 MIX2 INP1 Mux", rx_mix2_inp1_chain_enum);
+static const struct snd_kcontrol_new rx2_mix2_inp1_mux = SOC_DAPM_ENUM(
+				"RX2 MIX2 INP1 Mux", rx2_mix2_inp1_chain_enum);
 /* Digital Gain control -38.4 dB to +38.4 dB in 0.3 dB steps */
 static const DECLARE_TLV_DB_SCALE(digital_gain, -3840, 30, 0);
 			 &rx3_mix1_inp2_mux),
 	SND_SOC_DAPM_MUX("RX3 MIX1 INP3", SND_SOC_NOPM, 0, 0,
 			 &rx3_mix1_inp3_mux),
+	SND_SOC_DAPM_MUX("RX1 MIX2 INP1", SND_SOC_NOPM, 0, 0,
+			 &rx1_mix2_inp1_mux),
+	SND_SOC_DAPM_MUX("RX2 MIX2 INP1", SND_SOC_NOPM, 0, 0,
+			 &rx2_mix2_inp1_mux),
 	SND_SOC_DAPM_MUX("CIC1 MUX", SND_SOC_NOPM, 0, 0, &cic1_mux),
 	SND_SOC_DAPM_MUX("CIC2 MUX", SND_SOC_NOPM, 0, 0, &cic2_mux),

sound/soc/codecs/rt5651.c+3−0

@@ -1770,6 +1770,9 @@ static int rt5651_detect_headset(struct snd_soc_component *component) · 1769 unmodified lines
1770		1770
1771	static bool rt5651_support_button_press(struct rt5651_priv *rt5651)	1771	static bool rt5651_support_button_press(struct rt5651_priv *rt5651)
1772	{	1772	{
		1773	if (!rt5651->hp_jack)
		1774	return false;
		1775
1773	/* Button press support only works with internal jack-detection */	1776	/* Button press support only works with internal jack-detection */
1774	return (rt5651->hp_jack->status & SND_JACK_MICROPHONE) &&	1777	return (rt5651->hp_jack->status & SND_JACK_MICROPHONE) &&
1775	rt5651->gpiod_hp_det == NULL;	1778	rt5651->gpiod_hp_det == NULL;

sound/soc/codecs/rt5682.c+10−2

 {
 	struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
+	rt5682->hs_jack = hs_jack;
+	if (!hs_jack) {
+		regmap_update_bits(rt5682->regmap, RT5682_IRQ_CTRL_2,
+				   RT5682_JD1_EN_MASK, RT5682_JD1_DIS);
+		regmap_update_bits(rt5682->regmap, RT5682_RC_CLK_CTRL,
+				   RT5682_POW_JDH | RT5682_POW_JDL, 0);
+		return 0;
+	}
 	switch (rt5682->pdata.jd_src) {
 	case RT5682_JD1:
 		snd_soc_component_update_bits(component, RT5682_CBJ_CTRL_2,
 		break;
 	}
-	rt5682->hs_jack = hs_jack;
 	return 0;
 }

sound/soc/codecs/wm8994.c+26−17

 static SOC_ENUM_SINGLE_DECL(adc_osr,
 			    WM8994_OVERSAMPLING, 1, osr_text);
-static const struct snd_kcontrol_new wm8994_snd_controls[] = {
+static const struct snd_kcontrol_new wm8994_common_snd_controls[] = {
 SOC_DOUBLE_R_TLV("AIF1ADC1 Volume", WM8994_AIF1_ADC1_LEFT_VOLUME,
 		 WM8994_AIF1_ADC1_RIGHT_VOLUME,
 		 1, 119, 0, digital_tlv),
-SOC_DOUBLE_R_TLV("AIF1ADC2 Volume", WM8994_AIF1_ADC2_LEFT_VOLUME,
-		 WM8994_AIF1_ADC2_RIGHT_VOLUME,
-		 1, 119, 0, digital_tlv),
 SOC_DOUBLE_R_TLV("AIF2ADC Volume", WM8994_AIF2_ADC_LEFT_VOLUME,
 		 WM8994_AIF2_ADC_RIGHT_VOLUME,
 		 1, 119, 0, digital_tlv),
 SOC_DOUBLE_R_TLV("AIF1DAC1 Volume", WM8994_AIF1_DAC1_LEFT_VOLUME,
 		 WM8994_AIF1_DAC1_RIGHT_VOLUME, 1, 96, 0, digital_tlv),
-SOC_DOUBLE_R_TLV("AIF1DAC2 Volume", WM8994_AIF1_DAC2_LEFT_VOLUME,
-		 WM8994_AIF1_DAC2_RIGHT_VOLUME, 1, 96, 0, digital_tlv),
 SOC_DOUBLE_R_TLV("AIF2DAC Volume", WM8994_AIF2_DAC_LEFT_VOLUME,
 		 WM8994_AIF2_DAC_RIGHT_VOLUME, 1, 96, 0, digital_tlv),
 SOC_SINGLE_TLV("AIF2 Boost Volume", WM8994_AIF2_CONTROL_2, 10, 3, 0, aif_tlv),
 SOC_SINGLE("AIF1DAC1 EQ Switch", WM8994_AIF1_DAC1_EQ_GAINS_1, 0, 1, 0),
-SOC_SINGLE("AIF1DAC2 EQ Switch", WM8994_AIF1_DAC2_EQ_GAINS_1, 0, 1, 0),
 SOC_SINGLE("AIF2 EQ Switch", WM8994_AIF2_EQ_GAINS_1, 0, 1, 0),
 WM8994_DRC_SWITCH("AIF1DAC1 DRC Switch", WM8994_AIF1_DRC1_1, 2),
 WM8994_DRC_SWITCH("AIF1ADC1L DRC Switch", WM8994_AIF1_DRC1_1, 1),
 WM8994_DRC_SWITCH("AIF1ADC1R DRC Switch", WM8994_AIF1_DRC1_1, 0),
-WM8994_DRC_SWITCH("AIF1DAC2 DRC Switch", WM8994_AIF1_DRC2_1, 2),
-WM8994_DRC_SWITCH("AIF1ADC2L DRC Switch", WM8994_AIF1_DRC2_1, 1),
-WM8994_DRC_SWITCH("AIF1ADC2R DRC Switch", WM8994_AIF1_DRC2_1, 0),
 WM8994_DRC_SWITCH("AIF2DAC DRC Switch", WM8994_AIF2_DRC_1, 2),
 WM8994_DRC_SWITCH("AIF2ADCL DRC Switch", WM8994_AIF2_DRC_1, 1),
 WM8994_DRC_SWITCH("AIF2ADCR DRC Switch", WM8994_AIF2_DRC_1, 0),
 SOC_ENUM("AIF1ADC1 HPF Mode", aif1adc1_hpf),
 SOC_DOUBLE("AIF1ADC1 HPF Switch", WM8994_AIF1_ADC1_FILTERS, 12, 11, 1, 0),
-SOC_ENUM("AIF1ADC2 HPF Mode", aif1adc2_hpf),
-SOC_DOUBLE("AIF1ADC2 HPF Switch", WM8994_AIF1_ADC2_FILTERS, 12, 11, 1, 0),
 SOC_ENUM("AIF2ADC HPF Mode", aif2adc_hpf),
 SOC_DOUBLE("AIF2ADC HPF Switch", WM8994_AIF2_ADC_FILTERS, 12, 11, 1, 0),
 	   8, 1, 0),
 };
+/* Controls not available on WM1811 */
+static const struct snd_kcontrol_new wm8994_snd_controls[] = {
+SOC_DOUBLE_R_TLV("AIF1ADC2 Volume", WM8994_AIF1_ADC2_LEFT_VOLUME,
+		 WM8994_AIF1_ADC2_RIGHT_VOLUME,
+		 1, 119, 0, digital_tlv),
+SOC_DOUBLE_R_TLV("AIF1DAC2 Volume", WM8994_AIF1_DAC2_LEFT_VOLUME,
+		 WM8994_AIF1_DAC2_RIGHT_VOLUME, 1, 96, 0, digital_tlv),
+SOC_SINGLE("AIF1DAC2 EQ Switch", WM8994_AIF1_DAC2_EQ_GAINS_1, 0, 1, 0),
+WM8994_DRC_SWITCH("AIF1DAC2 DRC Switch", WM8994_AIF1_DRC2_1, 2),
+WM8994_DRC_SWITCH("AIF1ADC2L DRC Switch", WM8994_AIF1_DRC2_1, 1),
+WM8994_DRC_SWITCH("AIF1ADC2R DRC Switch", WM8994_AIF1_DRC2_1, 0),
+SOC_ENUM("AIF1ADC2 HPF Mode", aif1adc2_hpf),
+SOC_DOUBLE("AIF1ADC2 HPF Switch", WM8994_AIF1_ADC2_FILTERS, 12, 11, 1, 0),
+};
 static const struct snd_kcontrol_new wm8994_eq_controls[] = {
 SOC_SINGLE_TLV("AIF1DAC1 EQ1 Volume", WM8994_AIF1_DAC1_EQ_GAINS_1, 11, 31, 0,
 	       eq_tlv),
 	wm8994_handle_pdata(wm8994);
 	wm_hubs_add_analogue_controls(component);
-	snd_soc_add_component_controls(component, wm8994_snd_controls,
+	snd_soc_add_component_controls(component, wm8994_common_snd_controls,
-			     ARRAY_SIZE(wm8994_snd_controls));
+				       ARRAY_SIZE(wm8994_common_snd_controls));
 	snd_soc_dapm_new_controls(dapm, wm8994_dapm_widgets,
 				  ARRAY_SIZE(wm8994_dapm_widgets));
 	switch (control->type) {
 	case WM8994:
+		snd_soc_add_component_controls(component, wm8994_snd_controls,
+					       ARRAY_SIZE(wm8994_snd_controls));
 		snd_soc_dapm_new_controls(dapm, wm8994_specific_dapm_widgets,
 					  ARRAY_SIZE(wm8994_specific_dapm_widgets));
 		if (control->revision < 4) {
 		}
 		break;
 	case WM8958:
+		snd_soc_add_component_controls(component, wm8994_snd_controls,
+					       ARRAY_SIZE(wm8994_snd_controls));
 		snd_soc_add_component_controls(component, wm8958_snd_controls,
-				     ARRAY_SIZE(wm8958_snd_controls));
+					       ARRAY_SIZE(wm8958_snd_controls));
 		snd_soc_dapm_new_controls(dapm, wm8958_dapm_widgets,
 					  ARRAY_SIZE(wm8958_dapm_widgets));
 		if (control->revision < 1) {

sound/soc/codecs/wm_adsp.c+7−3

 	}
 	if (in) {
-		if (in & WMFW_CTL_FLAG_READABLE)
+		out |= rd;
-			out |= rd;
 		if (in & WMFW_CTL_FLAG_WRITEABLE)
 			out |= wr;
 		if (in & WMFW_CTL_FLAG_VOLATILE)
 	u32 xmalg, addr, magic;
 	int i, ret;
+	alg_region = wm_adsp_find_alg_region(dsp, WMFW_ADSP2_XM, dsp->fw_id);
+	if (!alg_region) {
+		adsp_err(dsp, "No algorithm region found\n");
+		return -EINVAL;
+	}
 	buf = wm_adsp_buffer_alloc(dsp);
 	if (!buf)
 		return -ENOMEM;
-	alg_region = wm_adsp_find_alg_region(dsp, WMFW_ADSP2_XM, dsp->fw_id);
 	xmalg = dsp->ops->sys_config_size / sizeof(__be32);
 	addr = alg_region->base + xmalg + ALG_XM_FIELD(magic);

sound/soc/intel/boards/sof_rt5682.c+56−4

@@ -308,6 +308,9 @@ static const struct snd_soc_dapm_widget sof_widgets[] = { · 307 unmodified lines
308	SND_SOC_DAPM_HP("Headphone Jack", NULL),	308	SND_SOC_DAPM_HP("Headphone Jack", NULL),
309	SND_SOC_DAPM_MIC("Headset Mic", NULL),	309	SND_SOC_DAPM_MIC("Headset Mic", NULL),
310	SND_SOC_DAPM_SPK("Spk", NULL),	310	SND_SOC_DAPM_SPK("Spk", NULL),
		311	};
		312
		313	static const struct snd_soc_dapm_widget dmic_widgets[] = {
311	SND_SOC_DAPM_MIC("SoC DMIC", NULL),	314	SND_SOC_DAPM_MIC("SoC DMIC", NULL),
312	};	315	};
313		316
@@ -318,10 +321,6 @@ static const struct snd_soc_dapm_route sof_map[] = { · 4 unmodified lines
318		321
319	/* other jacks */	322	/* other jacks */
320	{ "IN1P", NULL, "Headset Mic" },	323	{ "IN1P", NULL, "Headset Mic" },
321
322	/* digital mics */
323	{"DMic", NULL, "SoC DMIC"},
324
325	};	324	};
326		325
327	static const struct snd_soc_dapm_route speaker_map[] = {	326	static const struct snd_soc_dapm_route speaker_map[] = {
@@ -329,6 +328,11 @@ static const struct snd_soc_dapm_route speaker_map[] = { · 1 unmodified line
329	{ "Spk", NULL, "Speaker" },	328	{ "Spk", NULL, "Speaker" },
330	};	329	};
331		330
		331	static const struct snd_soc_dapm_route dmic_map[] = {
		332	/* digital mics */
		333	{"DMic", NULL, "SoC DMIC"},
		334	};
		335
332	static int speaker_codec_init(struct snd_soc_pcm_runtime *rtd)	336	static int speaker_codec_init(struct snd_soc_pcm_runtime *rtd)
333	{	337	{
334	struct snd_soc_card *card = rtd->card;	338	struct snd_soc_card *card = rtd->card;
@@ -342,6 +346,28 @@ static int speaker_codec_init(struct snd_soc_pcm_runtime *rtd) · 7 unmodified lines
342	return ret;	346	return ret;
343	}	347	}
344		348
		349	static int dmic_init(struct snd_soc_pcm_runtime *rtd)
		350	{
		351	struct snd_soc_card *card = rtd->card;
		352	int ret;
		353
		354	ret = snd_soc_dapm_new_controls(&card->dapm, dmic_widgets,
		355	ARRAY_SIZE(dmic_widgets));
		356	if (ret) {
		357	dev_err(card->dev, "DMic widget addition failed: %d\n", ret);
		358	/* Don't need to add routes if widget addition failed */
		359	return ret;
		360	}
		361
		362	ret = snd_soc_dapm_add_routes(&card->dapm, dmic_map,
		363	ARRAY_SIZE(dmic_map));
		364
		365	if (ret)
		366	dev_err(card->dev, "DMic map addition failed: %d\n", ret);
		367
		368	return ret;
		369	}
		370
345	/* sof audio machine driver for rt5682 codec */	371	/* sof audio machine driver for rt5682 codec */
346	static struct snd_soc_card sof_audio_card_rt5682 = {	372	static struct snd_soc_card sof_audio_card_rt5682 = {
347	.name = "sof_rt5682",	373	.name = "sof_rt5682",
@@ -445,6 +471,7 @@ static struct snd_soc_dai_link sof_card_dai_links_create(struct device dev, · 97 unmodified lines
445	links[id].name = "dmic01";	471	links[id].name = "dmic01";
446	links[id].cpus = &cpus[id];	472	links[id].cpus = &cpus[id];
447	links[id].cpus->dai_name = "DMIC01 Pin";	473	links[id].cpus->dai_name = "DMIC01 Pin";
		474	links[id].init = dmic_init;
448	if (dmic_be_num > 1) {	475	if (dmic_be_num > 1) {
449	/* set up 2 BE links at most */	476	/* set up 2 BE links at most */
450	links[id + 1].name = "dmic16k";	477	links[id + 1].name = "dmic16k";
@@ -576,6 +603,15 @@ static int sof_audio_probe(struct platform_device *pdev) · 125 unmodified lines
576	/* need to get main clock from pmc */	603	/* need to get main clock from pmc */
577	if (sof_rt5682_quirk & SOF_RT5682_MCLK_BYTCHT_EN) {	604	if (sof_rt5682_quirk & SOF_RT5682_MCLK_BYTCHT_EN) {
578	ctx->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");	605	ctx->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
		606	if (IS_ERR(ctx->mclk)) {
		607	ret = PTR_ERR(ctx->mclk);
		608
		609	dev_err(&pdev->dev,
		610	"Failed to get MCLK from pmc_plt_clk_3: %d\n",
		611	ret);
		612	return ret;
		613	}
		614
579	ret = clk_prepare_enable(ctx->mclk);	615	ret = clk_prepare_enable(ctx->mclk);
580	if (ret < 0) {	616	if (ret < 0) {
581	dev_err(&pdev->dev,	617	dev_err(&pdev->dev,
@@ -621,8 +657,24 @@ static int sof_audio_probe(struct platform_device *pdev) · 39 unmodified lines
621	&sof_audio_card_rt5682);	657	&sof_audio_card_rt5682);
622	}	658	}
623		659
		660	static int sof_rt5682_remove(struct platform_device *pdev)
		661	{
		662	struct snd_soc_card *card = platform_get_drvdata(pdev);
		663	struct snd_soc_component *component = NULL;
		664
		665	for_each_card_components(card, component) {
		666	if (!strcmp(component->name, rt5682_component[0].name)) {
		667	snd_soc_component_set_jack(component, NULL, NULL);
		668	break;
		669	}
		670	}
		671
		672	return 0;
		673	}
		674
624	static struct platform_driver sof_audio = {	675	static struct platform_driver sof_audio = {
625	.probe = sof_audio_probe,	676	.probe = sof_audio_probe,
		677	.remove = sof_rt5682_remove,
626	.driver = {	678	.driver = {
627	.name = "sof_rt5682",	679	.name = "sof_rt5682",
628	.pm = &snd_soc_pm_ops,	680	.pm = &snd_soc_pm_ops,

sound/soc/rockchip/rockchip_i2s.c+1−1

@@ -677,7 +677,7 @@ static int rockchip_i2s_probe(struct platform_device *pdev) · 676 unmodified lines
677	ret = rockchip_pcm_platform_register(&pdev->dev);	677	ret = rockchip_pcm_platform_register(&pdev->dev);
678	if (ret) {	678	if (ret) {
679	dev_err(&pdev->dev, "Could not register PCM\n");	679	dev_err(&pdev->dev, "Could not register PCM\n");
680	return ret;	680	goto err_suspend;
681	}	681	}
682		682
683	return 0;	683	return 0;

sound/soc/samsung/arndale_rt5631.c+30−4

 //  Author: Claude <claude@insginal.co.kr>
 #include <linux/module.h>
+#include <linux/of_device.h>
 #include <linux/platform_device.h>
 #include <linux/clk.h>
 	.num_links = ARRAY_SIZE(arndale_rt5631_dai),
 };
+static void arndale_put_of_nodes(struct snd_soc_card *card)
+{
+	struct snd_soc_dai_link *dai_link;
+	int i;
+	for_each_card_prelinks(card, i, dai_link) {
+		of_node_put(dai_link->cpus->of_node);
+		of_node_put(dai_link->codecs->of_node);
+	}
+}
 static int arndale_audio_probe(struct platform_device *pdev)
 {
 	int n, ret;
 		if (!arndale_rt5631_dai[0].codecs->of_node) {
 			dev_err(&pdev->dev,
 			"Property 'samsung,audio-codec' missing or invalid\n");
-			return -EINVAL;
+			ret = -EINVAL;
+			goto err_put_of_nodes;
 		}
 	}
 	ret = devm_snd_soc_register_card(card->dev, card);
+	if (ret) {
+		dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", ret);
+		goto err_put_of_nodes;
+	}
+	return 0;
-	if (ret)
+err_put_of_nodes:
-		dev_err(&pdev->dev, "snd_soc_register_card() failed:%d\n", ret);
+	arndale_put_of_nodes(card);
 	return ret;
 }
+static int arndale_audio_remove(struct platform_device *pdev)
+{
+	struct snd_soc_card *card = platform_get_drvdata(pdev);
+	arndale_put_of_nodes(card);
+	return 0;
+}
 static const struct of_device_id samsung_arndale_rt5631_of_match[] __maybe_unused = {
 	{ .compatible = "samsung,arndale-rt5631", },
 	{ .compatible = "samsung,arndale-alc5631", },
 		.of_match_table = of_match_ptr(samsung_arndale_rt5631_of_match),
 	},
 	.probe = arndale_audio_probe,
+	.remove = arndale_audio_remove,
 };
 module_platform_driver(arndale_audio_driver);

sound/soc/sh/rcar/core.c+1−0

@@ -761,6 +761,7 @@ static int rsnd_soc_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) · 760 unmodified lines
761	}	761	}
762		762
763	/* set format */	763	/* set format */
		764	rdai->bit_clk_inv = 0;
764	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {	765	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
765	case SND_SOC_DAIFMT_I2S:	766	case SND_SOC_DAIFMT_I2S:
766	rdai->sys_delay = 0;	767	rdai->sys_delay = 0;

sound/soc/soc-pcm.c+12−5

 			return ret;
 	}
-	snd_soc_dai_trigger(cpu_dai, substream, cmd);
+	ret = snd_soc_dai_trigger(cpu_dai, substream, cmd);
 	if (ret < 0)
 		return ret;
 			return ret;
 	}
-	snd_soc_dai_bespoke_trigger(cpu_dai, substream, cmd);
+	ret = snd_soc_dai_bespoke_trigger(cpu_dai, substream, cmd);
 	if (ret < 0)
 		return ret;
 {
 	struct snd_soc_dpcm *dpcm;
 	unsigned long flags;
+	char *name;
 	/* only add new dpcms */
 	for_each_dpcm_be(fe, stream, dpcm) {
 			stream ? "<-" : "->", be->dai_link->name);
 #ifdef CONFIG_DEBUG_FS
-	dpcm->debugfs_state = debugfs_create_dir(be->dai_link->name,
+	name = kasprintf(GFP_KERNEL, "%s:%s", be->dai_link->name,
-						 fe->debugfs_dpcm_root);
+			 stream ? "capture" : "playback");
-	debugfs_create_u32("state", 0644, dpcm->debugfs_state, &dpcm->state);
+	if (name) {
+		dpcm->debugfs_state = debugfs_create_dir(name,
+							 fe->debugfs_dpcm_root);
+		debugfs_create_u32("state", 0644, dpcm->debugfs_state,
+				   &dpcm->state);
+		kfree(name);
+	}
 #endif
 	return 1;
 }

sound/soc/soc-topology.c+1−1

@@ -1582,7 +1582,7 @@ static int soc_tplg_dapm_widget_create(struct soc_tplg *tplg, · 1581 unmodified lines
1582		1582
1583	/* map user to kernel widget ID */	1583	/* map user to kernel widget ID */
1584	template.id = get_widget_id(le32_to_cpu(w->id));	1584	template.id = get_widget_id(le32_to_cpu(w->id));
1585	if (template.id < 0)	1585	if ((int)template.id < 0)
1586	return template.id;	1586	return template.id;
1587		1587
1588	/* strings are allocated here, but used and freed by the widget */	1588	/* strings are allocated here, but used and freed by the widget */

sound/soc/sof/control.c+18−8

@@ -60,13 +60,16 @@ int snd_sof_volume_put(struct snd_kcontrol *kcontrol, · 59 unmodified lines
60	struct snd_sof_dev *sdev = scontrol->sdev;	60	struct snd_sof_dev *sdev = scontrol->sdev;
61	struct sof_ipc_ctrl_data *cdata = scontrol->control_data;	61	struct sof_ipc_ctrl_data *cdata = scontrol->control_data;
62	unsigned int i, channels = scontrol->num_channels;	62	unsigned int i, channels = scontrol->num_channels;
		63	bool change = false;
		64	u32 value;
63		65
64	/* update each channel */	66	/* update each channel */
65	for (i = 0; i < channels; i++) {	67	for (i = 0; i < channels; i++) {
66	cdata->chanv[i].value =	68	value = mixer_to_ipc(ucontrol->value.integer.value[i],
67	mixer_to_ipc(ucontrol->value.integer.value[i],
68	scontrol->volume_table, sm->max + 1);	69	scontrol->volume_table, sm->max + 1);
		70	change = change \|\| (value != cdata->chanv[i].value);
69	cdata->chanv[i].channel = i;	71	cdata->chanv[i].channel = i;
		72	cdata->chanv[i].value = value;
70	}	73	}
71		74
72	/* notify DSP of mixer updates */	75	/* notify DSP of mixer updates */
@@ -76,8 +79,7 @@ int snd_sof_volume_put(struct snd_kcontrol *kcontrol, · 3 unmodified lines
76	SOF_CTRL_TYPE_VALUE_CHAN_GET,	79	SOF_CTRL_TYPE_VALUE_CHAN_GET,
77	SOF_CTRL_CMD_VOLUME,	80	SOF_CTRL_CMD_VOLUME,
78	true);	81	true);
79		82	return change;
80	return 0;
81	}	83	}
82		84
83	int snd_sof_switch_get(struct snd_kcontrol *kcontrol,	85	int snd_sof_switch_get(struct snd_kcontrol *kcontrol,
@@ -105,11 +107,15 @@ int snd_sof_switch_put(struct snd_kcontrol *kcontrol, · 21 unmodified lines
105	struct snd_sof_dev *sdev = scontrol->sdev;	107	struct snd_sof_dev *sdev = scontrol->sdev;
106	struct sof_ipc_ctrl_data *cdata = scontrol->control_data;	108	struct sof_ipc_ctrl_data *cdata = scontrol->control_data;
107	unsigned int i, channels = scontrol->num_channels;	109	unsigned int i, channels = scontrol->num_channels;
		110	bool change = false;
		111	u32 value;
108		112
109	/* update each channel */	113	/* update each channel */
110	for (i = 0; i < channels; i++) {	114	for (i = 0; i < channels; i++) {
111	cdata->chanv[i].value = ucontrol->value.integer.value[i];	115	value = ucontrol->value.integer.value[i];
		116	change = change \|\| (value != cdata->chanv[i].value);
112	cdata->chanv[i].channel = i;	117	cdata->chanv[i].channel = i;
		118	cdata->chanv[i].value = value;
113	}	119	}
114		120
115	/* notify DSP of mixer updates */	121	/* notify DSP of mixer updates */
@@ -120,7 +126,7 @@ int snd_sof_switch_put(struct snd_kcontrol *kcontrol, · 4 unmodified lines
120	SOF_CTRL_CMD_SWITCH,	126	SOF_CTRL_CMD_SWITCH,
121	true);	127	true);
122		128
123	return 0;	129	return change;
124	}	130	}
125		131
126	int snd_sof_enum_get(struct snd_kcontrol *kcontrol,	132	int snd_sof_enum_get(struct snd_kcontrol *kcontrol,
@@ -148,11 +154,15 @@ int snd_sof_enum_put(struct snd_kcontrol *kcontrol, · 21 unmodified lines
148	struct snd_sof_dev *sdev = scontrol->sdev;	154	struct snd_sof_dev *sdev = scontrol->sdev;
149	struct sof_ipc_ctrl_data *cdata = scontrol->control_data;	155	struct sof_ipc_ctrl_data *cdata = scontrol->control_data;
150	unsigned int i, channels = scontrol->num_channels;	156	unsigned int i, channels = scontrol->num_channels;
		157	bool change = false;
		158	u32 value;
151		159
152	/* update each channel */	160	/* update each channel */
153	for (i = 0; i < channels; i++) {	161	for (i = 0; i < channels; i++) {
154	cdata->chanv[i].value = ucontrol->value.enumerated.item[i];	162	value = ucontrol->value.enumerated.item[i];
		163	change = change \|\| (value != cdata->chanv[i].value);
155	cdata->chanv[i].channel = i;	164	cdata->chanv[i].channel = i;
		165	cdata->chanv[i].value = value;
156	}	166	}
157		167
158	/* notify DSP of enum updates */	168	/* notify DSP of enum updates */
@@ -163,7 +173,7 @@ int snd_sof_enum_put(struct snd_kcontrol *kcontrol, · 4 unmodified lines
163	SOF_CTRL_CMD_ENUM,	173	SOF_CTRL_CMD_ENUM,
164	true);	174	true);
165		175
166	return 0;	176	return change;
167	}	177	}
168		178
169	int snd_sof_bytes_get(struct snd_kcontrol *kcontrol,	179	int snd_sof_bytes_get(struct snd_kcontrol *kcontrol,

sound/soc/sof/intel/Kconfig+10−0

@@ -273,6 +273,16 @@ config SND_SOC_SOF_HDA_AUDIO_CODEC · 272 unmodified lines
273	Say Y if you want to enable HDAudio codecs with SOF.	273	Say Y if you want to enable HDAudio codecs with SOF.
274	If unsure select "N".	274	If unsure select "N".
275		275
		276	config SND_SOC_SOF_HDA_ALWAYS_ENABLE_DMI_L1
		277	bool "SOF enable DMI Link L1"
		278	help
		279	This option enables DMI L1 for both playback and capture
		280	and disables known workarounds for specific HDaudio platforms.
		281	Only use to look into power optimizations on platforms not
		282	affected by DMI L1 issues. This option is not recommended.
		283	Say Y if you want to enable DMI Link L1
		284	If unsure, select "N".
		285
276	endif ## SND_SOC_SOF_HDA_COMMON	286	endif ## SND_SOC_SOF_HDA_COMMON
277		287
278	config SND_SOC_SOF_HDA_LINK_BASELINE	288	config SND_SOC_SOF_HDA_LINK_BASELINE

sound/soc/sof/intel/bdw.c+7−0

 #define MBOX_SIZE       0x1000
 #define MBOX_DUMP_SIZE 0x30
 #define EXCEPT_OFFSET	0x800
+#define EXCEPT_MAX_HDR_SIZE	0x400
 /* DSP peripherals */
 #define DMAC0_OFFSET    0xFE000
 	/* note: variable AR register array is not read */
 	/* then get panic info */
+	if (xoops->arch_hdr.totalsize > EXCEPT_MAX_HDR_SIZE) {
+		dev_err(sdev->dev, "invalid header size 0x%x. FW oops is bogus\n",
+			xoops->arch_hdr.totalsize);
+		return;
+	}
 	offset += xoops->arch_hdr.totalsize;
 	sof_mailbox_read(sdev, offset, panic_info, sizeof(*panic_info));
 	/* TODO: add offsets */
 	sdev->mmio_bar = BDW_DSP_BAR;
 	sdev->mailbox_bar = BDW_DSP_BAR;
+	sdev->dsp_oops_offset = MBOX_OFFSET;
 	/* PCI base */
 	mmio = platform_get_resource(pdev, IORESOURCE_MEM,

sound/soc/sof/intel/byt.c+6−0

@@ -28,6 +28,7 @@ · 27 unmodified lines
28	#define MBOX_OFFSET 0x144000	28	#define MBOX_OFFSET 0x144000

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sound/soc/sof/intel/hda-ctrl.c+4−8

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sound/soc/sof/intel/hda-loader.c+1−0

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sound/soc/sof/intel/hda-stream.c+38−7

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sound/soc/sof/intel/hda.c+7−0

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sound/soc/sof/intel/hda.h+4−1

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sound/soc/sof/loader.c+2−2

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sound/soc/sof/pcm.c+24−11

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sound/soc/sof/topology.c+3−1

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sound/soc/stm/stm32_sai_sub.c+11−10

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sound/usb/pcm.c+3−0

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sound/usb/validate.c+1−1

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tools/bpf/Makefile+5−1

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tools/lib/bpf/xsk.c+2−2

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tools/testing/selftests/bpf/prog_tests/sockopt_inherit.c+1−1

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Merge branch 'perf/urgent' into perf/core, to pick up fixes

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@@ -694,7 +694,7 @@ · 693 unmodified lines
694	compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";	694	compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
695	reg = <0x30b40000 0x10000>;	695	reg = <0x30b40000 0x10000>;
696	interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;	696	interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
697	clocks = <&clk IMX8MM_CLK_DUMMY>,	697	clocks = <&clk IMX8MM_CLK_IPG_ROOT>,
698	<&clk IMX8MM_CLK_NAND_USDHC_BUS>,	698	<&clk IMX8MM_CLK_NAND_USDHC_BUS>,
699	<&clk IMX8MM_CLK_USDHC1_ROOT>;	699	<&clk IMX8MM_CLK_USDHC1_ROOT>;
700	clock-names = "ipg", "ahb", "per";	700	clock-names = "ipg", "ahb", "per";
@@ -710,7 +710,7 @@ · 9 unmodified lines
710	compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";	710	compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
711	reg = <0x30b50000 0x10000>;	711	reg = <0x30b50000 0x10000>;
712	interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;	712	interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
713	clocks = <&clk IMX8MM_CLK_DUMMY>,	713	clocks = <&clk IMX8MM_CLK_IPG_ROOT>,
714	<&clk IMX8MM_CLK_NAND_USDHC_BUS>,	714	<&clk IMX8MM_CLK_NAND_USDHC_BUS>,
715	<&clk IMX8MM_CLK_USDHC2_ROOT>;	715	<&clk IMX8MM_CLK_USDHC2_ROOT>;
716	clock-names = "ipg", "ahb", "per";	716	clock-names = "ipg", "ahb", "per";
@@ -724,7 +724,7 @@ · 7 unmodified lines
724	compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";	724	compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
725	reg = <0x30b60000 0x10000>;	725	reg = <0x30b60000 0x10000>;
726	interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;	726	interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
727	clocks = <&clk IMX8MM_CLK_DUMMY>,	727	clocks = <&clk IMX8MM_CLK_IPG_ROOT>,
728	<&clk IMX8MM_CLK_NAND_USDHC_BUS>,	728	<&clk IMX8MM_CLK_NAND_USDHC_BUS>,
729	<&clk IMX8MM_CLK_USDHC3_ROOT>;	729	<&clk IMX8MM_CLK_USDHC3_ROOT>;
730	clock-names = "ipg", "ahb", "per";	730	clock-names = "ipg", "ahb", "per";

@@ -569,7 +569,7 @@ · 568 unmodified lines
569	compatible = "fsl,imx8mn-usdhc", "fsl,imx7d-usdhc";	569	compatible = "fsl,imx8mn-usdhc", "fsl,imx7d-usdhc";
570	reg = <0x30b40000 0x10000>;	570	reg = <0x30b40000 0x10000>;
571	interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;	571	interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
572	clocks = <&clk IMX8MN_CLK_DUMMY>,	572	clocks = <&clk IMX8MN_CLK_IPG_ROOT>,
573	<&clk IMX8MN_CLK_NAND_USDHC_BUS>,	573	<&clk IMX8MN_CLK_NAND_USDHC_BUS>,
574	<&clk IMX8MN_CLK_USDHC1_ROOT>;	574	<&clk IMX8MN_CLK_USDHC1_ROOT>;
575	clock-names = "ipg", "ahb", "per";	575	clock-names = "ipg", "ahb", "per";
@@ -585,7 +585,7 @@ · 9 unmodified lines
585	compatible = "fsl,imx8mn-usdhc", "fsl,imx7d-usdhc";	585	compatible = "fsl,imx8mn-usdhc", "fsl,imx7d-usdhc";
586	reg = <0x30b50000 0x10000>;	586	reg = <0x30b50000 0x10000>;
587	interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;	587	interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
588	clocks = <&clk IMX8MN_CLK_DUMMY>,	588	clocks = <&clk IMX8MN_CLK_IPG_ROOT>,
589	<&clk IMX8MN_CLK_NAND_USDHC_BUS>,	589	<&clk IMX8MN_CLK_NAND_USDHC_BUS>,
590	<&clk IMX8MN_CLK_USDHC2_ROOT>;	590	<&clk IMX8MN_CLK_USDHC2_ROOT>;
591	clock-names = "ipg", "ahb", "per";	591	clock-names = "ipg", "ahb", "per";
@@ -599,7 +599,7 @@ · 7 unmodified lines
599	compatible = "fsl,imx8mn-usdhc", "fsl,imx7d-usdhc";	599	compatible = "fsl,imx8mn-usdhc", "fsl,imx7d-usdhc";
600	reg = <0x30b60000 0x10000>;	600	reg = <0x30b60000 0x10000>;
601	interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;	601	interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
602	clocks = <&clk IMX8MN_CLK_DUMMY>,	602	clocks = <&clk IMX8MN_CLK_IPG_ROOT>,
603	<&clk IMX8MN_CLK_NAND_USDHC_BUS>,	603	<&clk IMX8MN_CLK_NAND_USDHC_BUS>,
604	<&clk IMX8MN_CLK_USDHC3_ROOT>;	604	<&clk IMX8MN_CLK_USDHC3_ROOT>;
605	clock-names = "ipg", "ahb", "per";	605	clock-names = "ipg", "ahb", "per";

@@ -2119,13 +2119,13 @@ static unsigned int rcvbuf_limit(struct sock sk, struct sk_buff skb) · 2118 unmodified lines
2119	struct tipc_msg *hdr = buf_msg(skb);	2119	struct tipc_msg *hdr = buf_msg(skb);
2120		2120
2121	if (unlikely(msg_in_group(hdr)))	2121	if (unlikely(msg_in_group(hdr)))
2122	return sk->sk_rcvbuf;	2122	return READ_ONCE(sk->sk_rcvbuf);
2123		2123
2124	if (unlikely(!msg_connected(hdr)))	2124	if (unlikely(!msg_connected(hdr)))
2125	return sk->sk_rcvbuf << msg_importance(hdr);	2125	return READ_ONCE(sk->sk_rcvbuf) << msg_importance(hdr);
2126		2126
2127	if (likely(tsk->peer_caps & TIPC_BLOCK_FLOWCTL))	2127	if (likely(tsk->peer_caps & TIPC_BLOCK_FLOWCTL))
2128	return sk->sk_rcvbuf;	2128	return READ_ONCE(sk->sk_rcvbuf);
2129		2129
2130	return FLOWCTL_MSG_LIM;	2130	return FLOWCTL_MSG_LIM;
2131	}	2131	}
@@ -3790,7 +3790,7 @@ int tipc_sk_dump(struct sock sk, u16 dqueues, char buf) · 1658 unmodified lines
3790	i += scnprintf(buf + i, sz - i, " %d", sk->sk_sndbuf);	3790	i += scnprintf(buf + i, sz - i, " %d", sk->sk_sndbuf);
3791	i += scnprintf(buf + i, sz - i, " \| %d", sk_rmem_alloc_get(sk));	3791	i += scnprintf(buf + i, sz - i, " \| %d", sk_rmem_alloc_get(sk));
3792	i += scnprintf(buf + i, sz - i, " %d", sk->sk_rcvbuf);	3792	i += scnprintf(buf + i, sz - i, " %d", sk->sk_rcvbuf);
3793	i += scnprintf(buf + i, sz - i, " \| %d\n", sk->sk_backlog.len);	3793	i += scnprintf(buf + i, sz - i, " \| %d\n", READ_ONCE(sk->sk_backlog.len));
3794		3794
3795	if (dqueues & TIPC_DUMP_SK_SNDQ) {	3795	if (dqueues & TIPC_DUMP_SK_SNDQ) {
3796	i += scnprintf(buf + i, sz - i, "sk_write_queue: ");	3796	i += scnprintf(buf + i, sz - i, "sk_write_queue: ");