Merge tag 'ti-k3-soc-for-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux into arm/late

Texas Instruments K3 SoC family changes for 5.4 - Typo fixes for gic-its unit addresses for both am654 and j721e - HW spinlock nodes added for both am654 and j721e - GPIO support for j721e - power-domain cells update for both am654 / j721e for exclusive only access * tag 'ti-k3-soc-for-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux: arm64: dts: ti: k3-j721e-main: Fix gic-its node unit-address arm64: dts: ti: k3-am65-main: Fix gic-its node unit-address arm64: dts: ti: k3-j721e-main: Add hwspinlock node arm64: dts: ti: k3-am65-main: Add hwspinlock node arm64: dts: k3-j721e: Add gpio-keys on common processor board dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721E arm64: dts: ti: k3-j721e-common-proc-board: Disable unused gpio modules arm64: dts: ti: k3-j721e: Add gpio nodes in wakeup domain arm64: dts: ti: k3-j721e: Add gpio nodes in main domain arm64: dts: ti: k3-j721e: Update the power domain cells arm64: dts: ti: k3-am654: Update the power domain cells soc: ti: ti_sci_pm_domains: Add support for exclusive and shared access dt-bindings: ti_sci_pm_domains: Add support for exclusive and shared access firmware: ti_sci: Allow for device shared and exclusive requests

Arnd Bergmann committed 7 years ago

Commit 65ab0db2 parents 1fb2e59 d6dabd616 files · +384 −51Browse files

Unified · Split

16 files

Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt +9 −2
MAINTAINERS +1 −0
arch/arm64/boot/dts/ti/k3-am65-main.dtsi +29 −23
arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi +5 −5
arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi +3 −3
arch/arm64/boot/dts/ti/k3-am65.dtsi +1 −0
arch/arm64/boot/dts/ti/k3-am654-base-board.dts +1 −0
arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +69 −0
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +149 −11
arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi +37 −3
arch/arm64/boot/dts/ti/k3-j721e.dtsi +1 −0
drivers/firmware/ti_sci.c +43 −2
drivers/soc/ti/ti_sci_pm_domains.c +21 −2
include/dt-bindings/pinctrl/k3.h +3 −0
include/dt-bindings/soc/ti,sci_pm_domain.h +9 −0
include/linux/soc/ti/ti_sci_protocol.h +3 −0

Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt+9−2

@@ -19,8 +19,15 @@ child of the pmmc node. · 18 unmodified lines
19	19	Required Properties:
20	20	--------------------
21	21	- compatible: should be "ti,sci-pm-domain"
22		−- #power-domain-cells: Must be 1 so that an id can be provided in each
23		− device node.
	22	+- #power-domain-cells: Can be one of the following:
	23	+ 1: Containing the device id of each node
	24	+ 2: First entry should be device id
	25	+ Second entry should be one of the floowing:
	26	+ TI_SCI_PD_EXCLUSIVE: To allow device to be
	27	+ exclusively controlled by
	28	+ the requesting hosts.
	29	+ TI_SCI_PD_SHARED: To allow device to be shared
	30	+ by multiple hosts.
24	31
25	32	Example (K2G):
26	33	-------------

MAINTAINERS+1−0

@@ -15885,6 +15885,7 @@ F: drivers/firmware/ti_sci* · 15884 unmodified lines
15885	15885	F: include/linux/soc/ti/ti_sci_protocol.h
15886	15886	F: Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt
15887	15887	F: drivers/soc/ti/ti_sci_pm_domains.c
	15888	+F: include/dt-bindings/soc/ti,sci_pm_domain.h
15888	15889	F: Documentation/devicetree/bindings/reset/ti,sci-reset.txt
15889	15890	F: Documentation/devicetree/bindings/clock/ti,sci-clk.txt
15890	15891	F: drivers/clk/keystone/sci-clk.c

arch/arm64/boot/dts/ti/k3-am65-main.dtsi+29−23

@@ -42,7 +42,7 @@ · 41 unmodified lines
42	42	*/
43	43	interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
44	44
45		− gic_its: gic-its@18200000 {
	45	+ gic_its: gic-its@1820000 {
46	46	compatible = "arm,gic-v3-its";
47	47	reg = <0x00 0x01820000 0x00 0x10000>;
48	48	socionext,synquacer-pre-its = <0x1000000 0x400000>;
@@ -67,7 +67,7 @@ · 18 unmodified lines
67	67	reg = <0x0 0x900000 0x0 0x2000>;
68	68	reg-names = "serdes";
69	69	#phy-cells = <2>;
70		− power-domains = <&k3_pds 153>;
	70	+ power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
71	71	clocks = <&k3_clks 153 4>, <&k3_clks 153 1>, <&serdes1 AM654_SERDES_LO_REFCLK>;
72	72	clock-output-names = "serdes0_cmu_refclk", "serdes0_lo_refclk", "serdes0_ro_refclk";
73	73	assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>;
@@ -82,7 +82,7 @@ · 8 unmodified lines
82	82	reg = <0x0 0x910000 0x0 0x2000>;
83	83	reg-names = "serdes";
84	84	#phy-cells = <2>;
85		− power-domains = <&k3_pds 154>;
	85	+ power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
86	86	clocks = <&serdes0 AM654_SERDES_RO_REFCLK>, <&k3_clks 154 1>, <&k3_clks 154 5>;
87	87	clock-output-names = "serdes1_cmu_refclk", "serdes1_lo_refclk", "serdes1_ro_refclk";
88	88	assigned-clocks = <&k3_clks 154 5>, <&serdes1 AM654_SERDES_CMU_REFCLK>;
@@ -100,7 +100,7 @@ · 11 unmodified lines
100	100	interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
101	101	clock-frequency = <48000000>;
102	102	current-speed = <115200>;
103		− power-domains = <&k3_pds 146>;
	103	+ power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
104	104	};
105	105
106	106	main_uart1: serial@2810000 {
@@ -110,7 +110,7 @@ · 3 unmodified lines
110	110	reg-io-width = <4>;
111	111	interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
112	112	clock-frequency = <48000000>;
113		− power-domains = <&k3_pds 147>;
	113	+ power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;
114	114	};
115	115
116	116	main_uart2: serial@2820000 {
@@ -120,7 +120,7 @@ · 3 unmodified lines
120	120	reg-io-width = <4>;
121	121	interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
122	122	clock-frequency = <48000000>;
123		− power-domains = <&k3_pds 148>;
	123	+ power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
124	124	};
125	125
126	126	main_pmx0: pinmux@11c000 {
@@ -147,7 +147,7 @@ · 20 unmodified lines
147	147	#size-cells = <0>;
148	148	clock-names = "fck";
149	149	clocks = <&k3_clks 110 1>;
150		− power-domains = <&k3_pds 110>;
	150	+ power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>;
151	151	};
152	152
153	153	main_i2c1: i2c@2010000 {
@@ -158,7 +158,7 @@ · 4 unmodified lines
158	158	#size-cells = <0>;
159	159	clock-names = "fck";
160	160	clocks = <&k3_clks 111 1>;
161		− power-domains = <&k3_pds 111>;
	161	+ power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
162	162	};
163	163
164	164	main_i2c2: i2c@2020000 {
@@ -169,7 +169,7 @@ · 4 unmodified lines
169	169	#size-cells = <0>;
170	170	clock-names = "fck";
171	171	clocks = <&k3_clks 112 1>;
172		− power-domains = <&k3_pds 112>;
	172	+ power-domains = <&k3_pds 112 TI_SCI_PD_EXCLUSIVE>;
173	173	};
174	174
175	175	main_i2c3: i2c@2030000 {
@@ -180,14 +180,14 @@ · 4 unmodified lines
180	180	#size-cells = <0>;
181	181	clock-names = "fck";
182	182	clocks = <&k3_clks 113 1>;
183		− power-domains = <&k3_pds 113>;
	183	+ power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
184	184	};
185	185
186	186	ecap0: pwm@3100000 {
187	187	compatible = "ti,am654-ecap", "ti,am3352-ecap";
188	188	#pwm-cells = <3>;
189	189	reg = <0x0 0x03100000 0x0 0x60>;
190		− power-domains = <&k3_pds 39>;
	190	+ power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
191	191	clocks = <&k3_clks 39 0>;
192	192	clock-names = "fck";
193	193	};
@@ -197,7 +197,7 @@ · 3 unmodified lines
197	197	reg = <0x0 0x2100000 0x0 0x400>;
198	198	interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
199	199	clocks = <&k3_clks 137 1>;
200		− power-domains = <&k3_pds 137>;
	200	+ power-domains = <&k3_pds 137 TI_SCI_PD_EXCLUSIVE>;
201	201	#address-cells = <1>;
202	202	#size-cells = <0>;
203	203	};
@@ -207,7 +207,7 @@ · 3 unmodified lines
207	207	reg = <0x0 0x2110000 0x0 0x400>;
208	208	interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
209	209	clocks = <&k3_clks 138 1>;
210		− power-domains = <&k3_pds 138>;
	210	+ power-domains = <&k3_pds 138 TI_SCI_PD_EXCLUSIVE>;
211	211	#address-cells = <1>;
212	212	#size-cells = <0>;
213	213	assigned-clocks = <&k3_clks 137 1>;
@@ -219,7 +219,7 @@ · 5 unmodified lines
219	219	reg = <0x0 0x2120000 0x0 0x400>;
220	220	interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
221	221	clocks = <&k3_clks 139 1>;
222		− power-domains = <&k3_pds 139>;
	222	+ power-domains = <&k3_pds 139 TI_SCI_PD_EXCLUSIVE>;
223	223	#address-cells = <1>;
224	224	#size-cells = <0>;
225	225	};
@@ -229,7 +229,7 @@ · 3 unmodified lines
229	229	reg = <0x0 0x2130000 0x0 0x400>;
230	230	interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
231	231	clocks = <&k3_clks 140 1>;
232		− power-domains = <&k3_pds 140>;
	232	+ power-domains = <&k3_pds 140 TI_SCI_PD_EXCLUSIVE>;
233	233	#address-cells = <1>;
234	234	#size-cells = <0>;
235	235	};
@@ -239,7 +239,7 @@ · 3 unmodified lines
239	239	reg = <0x0 0x2140000 0x0 0x400>;
240	240	interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
241	241	clocks = <&k3_clks 141 1>;
242		− power-domains = <&k3_pds 141>;
	242	+ power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
243	243	#address-cells = <1>;
244	244	#size-cells = <0>;
245	245	};
@@ -247,7 +247,7 @@ · 1 unmodified line
247	247	sdhci0: sdhci@4f80000 {
248	248	compatible = "ti,am654-sdhci-5.1";
249	249	reg = <0x0 0x4f80000 0x0 0x260>, <0x0 0x4f90000 0x0 0x134>;
250		− power-domains = <&k3_pds 47>;
	250	+ power-domains = <&k3_pds 47 TI_SCI_PD_EXCLUSIVE>;
251	251	clocks = <&k3_clks 47 0>, <&k3_clks 47 1>;
252	252	clock-names = "clk_ahb", "clk_xin";
253	253	interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
@@ -306,7 +306,7 @@ · 52 unmodified lines
306	306	ranges = <0x0 0x0 0x4000000 0x20000>;
307	307	interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
308	308	dma-coherent;
309		− power-domains = <&k3_pds 151>;
	309	+ power-domains = <&k3_pds 151 TI_SCI_PD_EXCLUSIVE>;
310	310	assigned-clocks = <&k3_clks 151 2>, <&k3_clks 151 7>;
311	311	assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
312	312	<&k3_clks 151 9>; /* set PIPE3_TXB_CLK to CLK_12M_RC/256 (for HS only) */
@@ -345,7 +345,7 @@ · 32 unmodified lines
345	345	ranges = <0x0 0x0 0x4020000 0x20000>;
346	346	interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
347	347	dma-coherent;
348		− power-domains = <&k3_pds 152>;
	348	+ power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
349	349	assigned-clocks = <&k3_clks 152 2>;
350	350	assigned-clock-parents = <&k3_clks 152 4>; /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
351	351
@@ -413,6 +413,12 @@ · 61 unmodified lines
413	413	ti,sci-rm-range-vint = <0x0>;
414	414	ti,sci-rm-range-global-event = <0x1>;
415	415	};
	416	+
	417	+ hwspinlock: spinlock@30e00000 {
	418	+ compatible = "ti,am654-hwspinlock";
	419	+ reg = <0x00 0x30e00000 0x00 0x1000>;
	420	+ #hwlock-cells = <1>;
	421	+ };
416	422	};
417	423
418	424	main_gpio0: main_gpio0@600000 {
@@ -451,7 +457,7 @@ · 32 unmodified lines
451	457	compatible = "ti,am654-pcie-rc";
452	458	reg = <0x0 0x5500000 0x0 0x1000>, <0x0 0x5501000 0x0 0x1000>, <0x0 0x10000000 0x0 0x2000>, <0x0 0x5506000 0x0 0x1000>;
453	459	reg-names = "app", "dbics", "config", "atu";
454		− power-domains = <&k3_pds 120>;
	460	+ power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
455	461	#address-cells = <3>;
456	462	#size-cells = <2>;
457	463	ranges = <0x81000000 0 0 0x0 0x10020000 0 0x00010000
@@ -470,7 +476,7 @@ · 12 unmodified lines
470	476	compatible = "ti,am654-pcie-ep";
471	477	reg = <0x0 0x5500000 0x0 0x1000>, <0x0 0x5501000 0x0 0x1000>, <0x0 0x10000000 0x0 0x8000000>, <0x0 0x5506000 0x0 0x1000>;
472	478	reg-names = "app", "dbics", "addr_space", "atu";
473		− power-domains = <&k3_pds 120>;
	479	+ power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
474	480	ti,syscon-pcie-mode = <&pcie0_mode>;
475	481	num-ib-windows = <16>;
476	482	num-ob-windows = <16>;
@@ -483,7 +489,7 @@ · 6 unmodified lines
483	489	compatible = "ti,am654-pcie-rc";
484	490	reg = <0x0 0x5600000 0x0 0x1000>, <0x0 0x5601000 0x0 0x1000>, <0x0 0x18000000 0x0 0x2000>, <0x0 0x5606000 0x0 0x1000>;
485	491	reg-names = "app", "dbics", "config", "atu";
486		− power-domains = <&k3_pds 121>;
	492	+ power-domains = <&k3_pds 121 TI_SCI_PD_EXCLUSIVE>;
487	493	#address-cells = <3>;
488	494	#size-cells = <2>;
489	495	ranges = <0x81000000 0 0 0x0 0x18020000 0 0x00010000
@@ -502,7 +508,7 @@ · 12 unmodified lines
502	508	compatible = "ti,am654-pcie-ep";
503	509	reg = <0x0 0x5600000 0x0 0x1000>, <0x0 0x5601000 0x0 0x1000>, <0x0 0x18000000 0x0 0x4000000>, <0x0 0x5606000 0x0 0x1000>;
504	510	reg-names = "app", "dbics", "addr_space", "atu";
505		− power-domains = <&k3_pds 121>;
	511	+ power-domains = <&k3_pds 121 TI_SCI_PD_EXCLUSIVE>;
506	512	ti,syscon-pcie-mode = <&pcie1_mode>;
507	513	num-ib-windows = <16>;
508	514	num-ob-windows = <16>;

arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi+5−5

@@ -14,7 +14,7 @@ · 13 unmodified lines
14	14	interrupts = <GIC_SPI 565 IRQ_TYPE_LEVEL_HIGH>;
15	15	clock-frequency = <96000000>;
16	16	current-speed = <115200>;
17		− power-domains = <&k3_pds 149>;
	17	+ power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
18	18	};
19	19
20	20	mcu_ram: sram@41c00000 {
@@ -33,7 +33,7 @@ · 12 unmodified lines
33	33	#size-cells = <0>;
34	34	clock-names = "fck";
35	35	clocks = <&k3_clks 114 1>;
36		− power-domains = <&k3_pds 114>;
	36	+ power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
37	37	};
38	38
39	39	mcu_spi0: spi@40300000 {
@@ -41,7 +41,7 @@ · 1 unmodified line
41	41	reg = <0x0 0x40300000 0x0 0x400>;
42	42	interrupts = <GIC_SPI 560 IRQ_TYPE_LEVEL_HIGH>;
43	43	clocks = <&k3_clks 142 1>;
44		− power-domains = <&k3_pds 142>;
	44	+ power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
45	45	#address-cells = <1>;
46	46	#size-cells = <0>;
47	47	};
@@ -51,7 +51,7 @@ · 3 unmodified lines
51	51	reg = <0x0 0x40310000 0x0 0x400>;
52	52	interrupts = <GIC_SPI 561 IRQ_TYPE_LEVEL_HIGH>;
53	53	clocks = <&k3_clks 143 1>;
54		− power-domains = <&k3_pds 143>;
	54	+ power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
55	55	#address-cells = <1>;
56	56	#size-cells = <0>;
57	57	};
@@ -61,7 +61,7 @@ · 3 unmodified lines
61	61	reg = <0x0 0x40320000 0x0 0x400>;
62	62	interrupts = <GIC_SPI 562 IRQ_TYPE_LEVEL_HIGH>;
63	63	clocks = <&k3_clks 144 1>;
64		− power-domains = <&k3_pds 144>;
	64	+ power-domains = <&k3_pds 144 TI_SCI_PD_EXCLUSIVE>;
65	65	#address-cells = <1>;
66	66	#size-cells = <0>;
67	67	};

arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi+3−3

@@ -20,7 +20,7 @@ · 19 unmodified lines
20	20
21	21	k3_pds: power-controller {
22	22	compatible = "ti,sci-pm-domain";
23		− #power-domain-cells = <1>;
	23	+ #power-domain-cells = <2>;
24	24	};
25	25
26	26	k3_clks: clocks {
@@ -50,7 +50,7 @@ · 23 unmodified lines
50	50	interrupts = <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>;
51	51	clock-frequency = <48000000>;
52	52	current-speed = <115200>;
53		− power-domains = <&k3_pds 150>;
	53	+ power-domains = <&k3_pds 150 TI_SCI_PD_EXCLUSIVE>;
54	54	};
55	55
56	56	wkup_i2c0: i2c@42120000 {
@@ -61,7 +61,7 @@ · 4 unmodified lines
61	61	#size-cells = <0>;
62	62	clock-names = "fck";
63	63	clocks = <&k3_clks 115 1>;
64		− power-domains = <&k3_pds 115>;
	64	+ power-domains = <&k3_pds 115 TI_SCI_PD_EXCLUSIVE>;
65	65	};
66	66
67	67	intr_wkup_gpio: interrupt-controller2 {

arch/arm64/boot/dts/ti/k3-am65.dtsi+1−0

@@ -9,6 +9,7 @@ · 8 unmodified lines
9	9	#include <dt-bindings/interrupt-controller/irq.h>
10	10	#include <dt-bindings/interrupt-controller/arm-gic.h>
11	11	#include <dt-bindings/pinctrl/k3.h>
	12	+#include <dt-bindings/soc/ti,sci_pm_domain.h>
12	13
13	14	/ {
14	15	model = "Texas Instruments K3 AM654 SoC";

arch/arm64/boot/dts/ti/k3-am654-base-board.dts+1−0

@@ -151,6 +151,7 @@ · 150 unmodified lines
151	151	&main_uart0 {
152	152	pinctrl-names = "default";
153	153	pinctrl-0 = <&main_uart0_pins_default>;
	154	+ power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
154	155	};
155	156
156	157	&wkup_i2c0 {

arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts+69−0

@@ -6,12 +6,49 @@ · 5 unmodified lines
6	6	/dts-v1/;
7	7
8	8	#include "k3-j721e-som-p0.dtsi"
	9	+#include <dt-bindings/gpio/gpio.h>
	10	+#include <dt-bindings/input/input.h>
9	11
10	12	/ {
11	13	chosen {
12	14	stdout-path = "serial2:115200n8";
13	15	bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
14	16	};
	17	+
	18	+ gpio_keys: gpio-keys {
	19	+ compatible = "gpio-keys";
	20	+ autorepeat;
	21	+ pinctrl-names = "default";
	22	+ pinctrl-0 = <&sw10_button_pins_default &sw11_button_pins_default>;
	23	+
	24	+ sw10: sw10 {
	25	+ label = "GPIO Key USER1";
	26	+ linux,code = <BTN_0>;
	27	+ gpios = <&main_gpio0 0 GPIO_ACTIVE_LOW>;
	28	+ };
	29	+
	30	+ sw11: sw11 {
	31	+ label = "GPIO Key USER2";
	32	+ linux,code = <BTN_1>;
	33	+ gpios = <&wkup_gpio0 7 GPIO_ACTIVE_LOW>;
	34	+ };
	35	+ };
	36	+};
	37	+
	38	+&main_pmx0 {
	39	+ sw10_button_pins_default: sw10_button_pins_default {
	40	+ pinctrl-single,pins = <
	41	+ J721E_IOPAD(0x0, PIN_INPUT, 7) /* (AC18) EXTINTn.GPIO0_0 */
	42	+ >;
	43	+ };
	44	+};
	45	+
	46	+&wkup_pmx0 {
	47	+ sw11_button_pins_default: sw11_button_pins_default {
	48	+ pinctrl-single,pins = <
	49	+ J721E_WKUP_IOPAD(0xcc, PIN_INPUT, 7) /* (G28) WKUP_GPIO0_7 */
	50	+ >;
	51	+ };
15	52	};
16	53
17	54	&wkup_uart0 {
@@ -19,6 +56,10 @@ · 1 unmodified line
19	56	status = "disabled";
20	57	};
21	58
	59	+&main_uart0 {
	60	+ power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
	61	+};
	62	+
22	63	&main_uart3 {
23	64	/* UART not brought out */
24	65	status = "disabled";
@@ -48,3 +89,31 @@ · 23 unmodified lines
48	89	/* UART not brought out */
49	90	status = "disabled";
50	91	};
	92	+
	93	+&main_gpio2 {
	94	+ status = "disabled";
	95	+};
	96	+
	97	+&main_gpio3 {
	98	+ status = "disabled";
	99	+};
	100	+
	101	+&main_gpio4 {
	102	+ status = "disabled";
	103	+};
	104	+
	105	+&main_gpio5 {
	106	+ status = "disabled";
	107	+};
	108	+
	109	+&main_gpio6 {
	110	+ status = "disabled";
	111	+};
	112	+
	113	+&main_gpio7 {
	114	+ status = "disabled";
	115	+};
	116	+
	117	+&wkup_gpio1 {
	118	+ status = "disabled";
	119	+};

arch/arm64/boot/dts/ti/k3-j721e-main.dtsi+149−11

@@ -31,7 +31,7 @@ · 30 unmodified lines
31	31	/* vcpumntirq: virtual CPU interface maintenance interrupt */
32	32	interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
33	33
34		− gic_its: gic-its@18200000 {
	34	+ gic_its: gic-its@1820000 {
35	35	compatible = "arm,gic-v3-its";
36	36	reg = <0x00 0x01820000 0x00 0x10000>;
37	37	socionext,synquacer-pre-its = <0x1000000 0x400000>;
@@ -89,6 +89,12 @@ · 51 unmodified lines
89	89	ti,sci-rm-range-vint = <0xa>;
90	90	ti,sci-rm-range-global-event = <0xd>;
91	91	};
	92	+
	93	+ hwspinlock: spinlock@30e00000 {
	94	+ compatible = "ti,am654-hwspinlock";
	95	+ reg = <0x00 0x30e00000 0x00 0x1000>;
	96	+ #hwlock-cells = <1>;
	97	+ };
92	98	};
93	99
94	100	secure_proxy_main: mailbox@32c00000 {
@@ -119,7 +125,7 @@ · 24 unmodified lines
119	125	interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
120	126	clock-frequency = <48000000>;
121	127	current-speed = <115200>;
122		− power-domains = <&k3_pds 146>;
	128	+ power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
123	129	clocks = <&k3_clks 146 0>;
124	130	clock-names = "fclk";
125	131	};
@@ -132,7 +138,7 @@ · 6 unmodified lines
132	138	interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
133	139	clock-frequency = <48000000>;
134	140	current-speed = <115200>;
135		− power-domains = <&k3_pds 278>;
	141	+ power-domains = <&k3_pds 278 TI_SCI_PD_EXCLUSIVE>;
136	142	clocks = <&k3_clks 278 0>;
137	143	clock-names = "fclk";
138	144	};
@@ -145,7 +151,7 @@ · 6 unmodified lines
145	151	interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
146	152	clock-frequency = <48000000>;
147	153	current-speed = <115200>;
148		− power-domains = <&k3_pds 279>;
	154	+ power-domains = <&k3_pds 279 TI_SCI_PD_EXCLUSIVE>;
149	155	clocks = <&k3_clks 279 0>;
150	156	clock-names = "fclk";
151	157	};
@@ -158,7 +164,7 @@ · 6 unmodified lines
158	164	interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
159	165	clock-frequency = <48000000>;
160	166	current-speed = <115200>;
161		− power-domains = <&k3_pds 280>;
	167	+ power-domains = <&k3_pds 280 TI_SCI_PD_EXCLUSIVE>;
162	168	clocks = <&k3_clks 280 0>;
163	169	clock-names = "fclk";
164	170	};
@@ -171,7 +177,7 @@ · 6 unmodified lines
171	177	interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
172	178	clock-frequency = <48000000>;
173	179	current-speed = <115200>;
174		− power-domains = <&k3_pds 281>;
	180	+ power-domains = <&k3_pds 281 TI_SCI_PD_EXCLUSIVE>;
175	181	clocks = <&k3_clks 281 0>;
176	182	clock-names = "fclk";
177	183	};
@@ -184,7 +190,7 @@ · 6 unmodified lines
184	190	interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
185	191	clock-frequency = <48000000>;
186	192	current-speed = <115200>;
187		− power-domains = <&k3_pds 282>;
	193	+ power-domains = <&k3_pds 282 TI_SCI_PD_EXCLUSIVE>;
188	194	clocks = <&k3_clks 282 0>;
189	195	clock-names = "fclk";
190	196	};
@@ -197,7 +203,7 @@ · 6 unmodified lines
197	203	interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>;
198	204	clock-frequency = <48000000>;
199	205	current-speed = <115200>;
200		− power-domains = <&k3_pds 283>;
	206	+ power-domains = <&k3_pds 283 TI_SCI_PD_EXCLUSIVE>;
201	207	clocks = <&k3_clks 283 0>;
202	208	clock-names = "fclk";
203	209	};
@@ -210,7 +216,7 @@ · 6 unmodified lines
210	216	interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
211	217	clock-frequency = <48000000>;
212	218	current-speed = <115200>;
213		− power-domains = <&k3_pds 284>;
	219	+ power-domains = <&k3_pds 284 TI_SCI_PD_EXCLUSIVE>;
214	220	clocks = <&k3_clks 284 0>;
215	221	clock-names = "fclk";
216	222	};
@@ -223,7 +229,7 @@ · 6 unmodified lines
223	229	interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>;
224	230	clock-frequency = <48000000>;
225	231	current-speed = <115200>;
226		− power-domains = <&k3_pds 285>;
	232	+ power-domains = <&k3_pds 285 TI_SCI_PD_EXCLUSIVE>;
227	233	clocks = <&k3_clks 285 0>;
228	234	clock-names = "fclk";
229	235	};
@@ -236,8 +242,140 @@ · 6 unmodified lines
236	242	interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
237	243	clock-frequency = <48000000>;
238	244	current-speed = <115200>;
239		− power-domains = <&k3_pds 286>;
	245	+ power-domains = <&k3_pds 286 TI_SCI_PD_EXCLUSIVE>;
240	246	clocks = <&k3_clks 286 0>;
241	247	clock-names = "fclk";
242	248	};
	249	+
	250	+ main_gpio0: gpio@600000 {
	251	+ compatible = "ti,j721e-gpio", "ti,keystone-gpio";
	252	+ reg = <0x0 0x00600000 0x0 0x100>;
	253	+ gpio-controller;
	254	+ #gpio-cells = <2>;
	255	+ interrupt-parent = <&main_gpio_intr>;
	256	+ interrupts = <105 0>, <105 1>, <105 2>, <105 3>,
	257	+ <105 4>, <105 5>, <105 6>, <105 7>;
	258	+ interrupt-controller;
	259	+ #interrupt-cells = <2>;
	260	+ ti,ngpio = <128>;
	261	+ ti,davinci-gpio-unbanked = <0>;
	262	+ power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
	263	+ clocks = <&k3_clks 105 0>;
	264	+ clock-names = "gpio";
	265	+ };
	266	+
	267	+ main_gpio1: gpio@601000 {
	268	+ compatible = "ti,j721e-gpio", "ti,keystone-gpio";
	269	+ reg = <0x0 0x00601000 0x0 0x100>;
	270	+ gpio-controller;
	271	+ #gpio-cells = <2>;
	272	+ interrupt-parent = <&main_gpio_intr>;
	273	+ interrupts = <106 0>, <106 1>, <106 2>;
	274	+ interrupt-controller;
	275	+ #interrupt-cells = <2>;
	276	+ ti,ngpio = <36>;
	277	+ ti,davinci-gpio-unbanked = <0>;
	278	+ power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>;
	279	+ clocks = <&k3_clks 106 0>;
	280	+ clock-names = "gpio";
	281	+ };
	282	+
	283	+ main_gpio2: gpio@610000 {
	284	+ compatible = "ti,j721e-gpio", "ti,keystone-gpio";
	285	+ reg = <0x0 0x00610000 0x0 0x100>;
	286	+ gpio-controller;
	287	+ #gpio-cells = <2>;
	288	+ interrupt-parent = <&main_gpio_intr>;
	289	+ interrupts = <107 0>, <107 1>, <107 2>, <107 3>,
	290	+ <107 4>, <107 5>, <107 6>, <107 7>;
	291	+ interrupt-controller;
	292	+ #interrupt-cells = <2>;
	293	+ ti,ngpio = <128>;
	294	+ ti,davinci-gpio-unbanked = <0>;
	295	+ power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>;
	296	+ clocks = <&k3_clks 107 0>;
	297	+ clock-names = "gpio";
	298	+ };
	299	+
	300	+ main_gpio3: gpio@611000 {
	301	+ compatible = "ti,j721e-gpio", "ti,keystone-gpio";
	302	+ reg = <0x0 0x00611000 0x0 0x100>;
	303	+ gpio-controller;
	304	+ #gpio-cells = <2>;
	305	+ interrupt-parent = <&main_gpio_intr>;
	306	+ interrupts = <108 0>, <108 1>, <108 2>;
	307	+ interrupt-controller;
	308	+ #interrupt-cells = <2>;
	309	+ ti,ngpio = <36>;
	310	+ ti,davinci-gpio-unbanked = <0>;
	311	+ power-domains = <&k3_pds 108 TI_SCI_PD_EXCLUSIVE>;
	312	+ clocks = <&k3_clks 108 0>;
	313	+ clock-names = "gpio";
	314	+ };
	315	+
	316	+ main_gpio4: gpio@620000 {
	317	+ compatible = "ti,j721e-gpio", "ti,keystone-gpio";
	318	+ reg = <0x0 0x00620000 0x0 0x100>;
	319	+ gpio-controller;
	320	+ #gpio-cells = <2>;
	321	+ interrupt-parent = <&main_gpio_intr>;
	322	+ interrupts = <109 0>, <109 1>, <109 2>, <109 3>,
	323	+ <109 4>, <109 5>, <109 6>, <109 7>;
	324	+ interrupt-controller;
	325	+ #interrupt-cells = <2>;
	326	+ ti,ngpio = <128>;
	327	+ ti,davinci-gpio-unbanked = <0>;
	328	+ power-domains = <&k3_pds 109 TI_SCI_PD_EXCLUSIVE>;
	329	+ clocks = <&k3_clks 109 0>;
	330	+ clock-names = "gpio";
	331	+ };
	332	+
	333	+ main_gpio5: gpio@621000 {
	334	+ compatible = "ti,j721e-gpio", "ti,keystone-gpio";
	335	+ reg = <0x0 0x00621000 0x0 0x100>;
	336	+ gpio-controller;
	337	+ #gpio-cells = <2>;
	338	+ interrupt-parent = <&main_gpio_intr>;
	339	+ interrupts = <110 0>, <110 1>, <110 2>;
	340	+ interrupt-controller;
	341	+ #interrupt-cells = <2>;
	342	+ ti,ngpio = <36>;
	343	+ ti,davinci-gpio-unbanked = <0>;
	344	+ power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>;
	345	+ clocks = <&k3_clks 110 0>;
	346	+ clock-names = "gpio";
	347	+ };
	348	+
	349	+ main_gpio6: gpio@630000 {
	350	+ compatible = "ti,j721e-gpio", "ti,keystone-gpio";
	351	+ reg = <0x0 0x00630000 0x0 0x100>;
	352	+ gpio-controller;
	353	+ #gpio-cells = <2>;
	354	+ interrupt-parent = <&main_gpio_intr>;
	355	+ interrupts = <111 0>, <111 1>, <111 2>, <111 3>,
	356	+ <111 4>, <111 5>, <111 6>, <111 7>;
	357	+ interrupt-controller;
	358	+ #interrupt-cells = <2>;
	359	+ ti,ngpio = <128>;
	360	+ ti,davinci-gpio-unbanked = <0>;
	361	+ power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
	362	+ clocks = <&k3_clks 111 0>;
	363	+ clock-names = "gpio";
	364	+ };
	365	+
	366	+ main_gpio7: gpio@631000 {
	367	+ compatible = "ti,j721e-gpio", "ti,keystone-gpio";
	368	+ reg = <0x0 0x00631000 0x0 0x100>;
	369	+ gpio-controller;
	370	+ #gpio-cells = <2>;
	371	+ interrupt-parent = <&main_gpio_intr>;
	372	+ interrupts = <112 0>, <112 1>, <112 2>;
	373	+ interrupt-controller;
	374	+ #interrupt-cells = <2>;
	375	+ ti,ngpio = <36>;
	376	+ ti,davinci-gpio-unbanked = <0>;
	377	+ power-domains = <&k3_pds 112 TI_SCI_PD_EXCLUSIVE>;
	378	+ clocks = <&k3_clks 112 0>;
	379	+ clock-names = "gpio";
	380	+ };
243	381	};

arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi+37−3

@@ -20,7 +20,7 @@ · 19 unmodified lines
20	20
21	21	k3_pds: power-controller {
22	22	compatible = "ti,sci-pm-domain";
23		− #power-domain-cells = <1>;
	23	+ #power-domain-cells = <2>;
24	24	};
25	25
26	26	k3_clks: clocks {
@@ -59,7 +59,7 @@ · 32 unmodified lines
59	59	interrupts = <GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH>;
60	60	clock-frequency = <48000000>;
61	61	current-speed = <115200>;
62		− power-domains = <&k3_pds 287>;
	62	+ power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>;
63	63	clocks = <&k3_clks 287 0>;
64	64	clock-names = "fclk";
65	65	};
@@ -72,7 +72,7 @@ · 6 unmodified lines
72	72	interrupts = <GIC_SPI 846 IRQ_TYPE_LEVEL_HIGH>;
73	73	clock-frequency = <96000000>;
74	74	current-speed = <115200>;
75		− power-domains = <&k3_pds 149>;
	75	+ power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
76	76	clocks = <&k3_clks 149 0>;
77	77	clock-names = "fclk";
78	78	};
@@ -87,4 +87,38 @@ · 8 unmodified lines
87	87	ti,sci-dst-id = <14>;
88	88	ti,sci-rm-range-girq = <0x5>;
89	89	};
	90	+
	91	+ wkup_gpio0: gpio@42110000 {
	92	+ compatible = "ti,j721e-gpio", "ti,keystone-gpio";
	93	+ reg = <0x0 0x42110000 0x0 0x100>;
	94	+ gpio-controller;
	95	+ #gpio-cells = <2>;
	96	+ interrupt-parent = <&wkup_gpio_intr>;
	97	+ interrupts = <113 0>, <113 1>, <113 2>,
	98	+ <113 3>, <113 4>, <113 5>;
	99	+ interrupt-controller;
	100	+ #interrupt-cells = <2>;
	101	+ ti,ngpio = <84>;
	102	+ ti,davinci-gpio-unbanked = <0>;
	103	+ power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
	104	+ clocks = <&k3_clks 113 0>;
	105	+ clock-names = "gpio";
	106	+ };
	107	+
	108	+ wkup_gpio1: gpio@42100000 {
	109	+ compatible = "ti,j721e-gpio", "ti,keystone-gpio";
	110	+ reg = <0x0 0x42100000 0x0 0x100>;
	111	+ gpio-controller;
	112	+ #gpio-cells = <2>;
	113	+ interrupt-parent = <&wkup_gpio_intr>;
	114	+ interrupts = <114 0>, <114 1>, <114 2>,
	115	+ <114 3>, <114 4>, <114 5>;
	116	+ interrupt-controller;
	117	+ #interrupt-cells = <2>;
	118	+ ti,ngpio = <84>;
	119	+ ti,davinci-gpio-unbanked = <0>;
	120	+ power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
	121	+ clocks = <&k3_clks 114 0>;
	122	+ clock-names = "gpio";
	123	+ };
90	124	};

arch/arm64/boot/dts/ti/k3-j721e.dtsi+1−0

@@ -8,6 +8,7 @@ · 7 unmodified lines
8	8	#include <dt-bindings/interrupt-controller/irq.h>
9	9	#include <dt-bindings/interrupt-controller/arm-gic.h>
10	10	#include <dt-bindings/pinctrl/k3.h>
	11	+#include <dt-bindings/soc/ti,sci_pm_domain.h>
11	12
12	13	/ {
13	14	model = "Texas Instruments K3 J721E SoC";

drivers/firmware/ti_sci.c+43−2

@@ -635,6 +635,7 @@ fail: · 634 unmodified lines
635	635
636	636	/**
637	637	* ti_sci_cmd_get_device() - command to request for device managed by TISCI
	638	+ * that can be shared with other hosts.
638	639	* @handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle
639	640	* @id: Device Identifier
640	641	*
@@ -642,11 +643,29 @@ fail: · 1 unmodified line
642	643	* usage count by balancing get_device with put_device. No refcounting is
643	644	* managed by driver for that purpose.
644	645	*
645		− * NOTE: The request is for exclusive access for the processor.
646		− *
647	646	* Return: 0 if all went fine, else return appropriate error.
648	647	*/
649	648	static int ti_sci_cmd_get_device(const struct ti_sci_handle *handle, u32 id)
	649	+{
	650	+ return ti_sci_set_device_state(handle, id, 0,
	651	+ MSG_DEVICE_SW_STATE_ON);
	652	+}
	653	+
	654	+/**
	655	+ * ti_sci_cmd_get_device_exclusive() - command to request for device managed by
	656	+ * TISCI that is exclusively owned by the
	657	+ * requesting host.
	658	+ * @handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle
	659	+ * @id: Device Identifier
	660	+ *
	661	+ * Request for the device - NOTE: the client MUST maintain integrity of
	662	+ * usage count by balancing get_device with put_device. No refcounting is
	663	+ * managed by driver for that purpose.
	664	+ *
	665	+ * Return: 0 if all went fine, else return appropriate error.
	666	+ */
	667	+static int ti_sci_cmd_get_device_exclusive(const struct ti_sci_handle *handle,
	668	+ u32 id)
650	669	{
651	670	return ti_sci_set_device_state(handle, id,
652	671	MSG_FLAG_DEVICE_EXCLUSIVE,
@@ -665,6 +684,26 @@ static int ti_sci_cmd_get_device(const struct ti_sci_handle *handle, u32 id) · 12 unmodified lines
665	684	* Return: 0 if all went fine, else return appropriate error.
666	685	*/
667	686	static int ti_sci_cmd_idle_device(const struct ti_sci_handle *handle, u32 id)
	687	+{
	688	+ return ti_sci_set_device_state(handle, id, 0,
	689	+ MSG_DEVICE_SW_STATE_RETENTION);
	690	+}
	691	+
	692	+/**
	693	+ * ti_sci_cmd_idle_device_exclusive() - Command to idle a device managed by
	694	+ * TISCI that is exclusively owned by
	695	+ * requesting host.
	696	+ * @handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle
	697	+ * @id: Device Identifier
	698	+ *
	699	+ * Request for the device - NOTE: the client MUST maintain integrity of
	700	+ * usage count by balancing get_device with put_device. No refcounting is
	701	+ * managed by driver for that purpose.
	702	+ *
	703	+ * Return: 0 if all went fine, else return appropriate error.
	704	+ */
	705	+static int ti_sci_cmd_idle_device_exclusive(const struct ti_sci_handle *handle,
	706	+ u32 id)
668	707	{
669	708	return ti_sci_set_device_state(handle, id,
670	709	MSG_FLAG_DEVICE_EXCLUSIVE,
@@ -2894,7 +2933,9 @@ static void ti_sci_setup_ops(struct ti_sci_info *info) · 2223 unmodified lines
2894	2933	core_ops->reboot_device = ti_sci_cmd_core_reboot;
2895	2934
2896	2935	dops->get_device = ti_sci_cmd_get_device;
	2936	+ dops->get_device_exclusive = ti_sci_cmd_get_device_exclusive;
2897	2937	dops->idle_device = ti_sci_cmd_idle_device;
	2938	+ dops->idle_device_exclusive = ti_sci_cmd_idle_device_exclusive;
2898	2939	dops->put_device = ti_sci_cmd_put_device;
2899	2940
2900	2941	dops->is_valid = ti_sci_cmd_dev_is_valid;

drivers/soc/ti/ti_sci_pm_domains.c+21−2

@@ -15,15 +15,19 @@ · 14 unmodified lines
15	15	#include <linux/pm_domain.h>
16	16	#include <linux/slab.h>
17	17	#include <linux/soc/ti/ti_sci_protocol.h>
	18	+#include <dt-bindings/soc/ti,sci_pm_domain.h>
18	19
19	20	/**
20	21	* struct ti_sci_genpd_dev_data: holds data needed for every device attached
21	22	* to this genpd
22	23	* @idx: index of the device that identifies it with the system
23	24	* control processor.
	25	+ * @exclusive: Permissions for exclusive request or shared request of the
	26	+ * device.
24	27	*/
25	28	struct ti_sci_genpd_dev_data {
26	29	int idx;
	30	+ u8 exclusive;
27	31	};
28	32
29	33	/**
@@ -55,6 +59,14 @@ static int ti_sci_dev_id(struct device *dev) · 25 unmodified lines
55	59	return sci_dev_data->idx;
56	60	}
57	61
	62	+static u8 is_ti_sci_dev_exclusive(struct device *dev)
	63	+{
	64	+ struct generic_pm_domain_data *genpd_data = dev_gpd_data(dev);
	65	+ struct ti_sci_genpd_dev_data *sci_dev_data = genpd_data->data;
	66	+
	67	+ return sci_dev_data->exclusive;
	68	+}
	69	+
58	70	/**
59	71	* ti_sci_dev_to_sci_handle(): get pointer to ti_sci_handle
60	72	* @dev: pointer to device associated with this genpd
@@ -79,7 +91,10 @@ static int ti_sci_dev_start(struct device *dev) · 18 unmodified lines
79	91	const struct ti_sci_handle *ti_sci = ti_sci_dev_to_sci_handle(dev);
80	92	int idx = ti_sci_dev_id(dev);
81	93
82		− return ti_sci->ops.dev_ops.get_device(ti_sci, idx);
	94	+ if (is_ti_sci_dev_exclusive(dev))
	95	+ return ti_sci->ops.dev_ops.get_device_exclusive(ti_sci, idx);
	96	+ else
	97	+ return ti_sci->ops.dev_ops.get_device(ti_sci, idx);
83	98	}
84	99
85	100	/**
@@ -110,7 +125,7 @@ static int ti_sci_pd_attach_dev(struct generic_pm_domain *domain, · 24 unmodified lines
110	125	if (ret < 0)
111	126	return ret;
112	127
113		− if (pd_args.args_count != 1)
	128	+ if (pd_args.args_count != 1 && pd_args.args_count != 2)
114	129	return -EINVAL;
115	130
116	131	idx = pd_args.args[0];
@@ -128,6 +143,10 @@ static int ti_sci_pd_attach_dev(struct generic_pm_domain *domain, · 11 unmodified lines
128	143	return -ENOMEM;
129	144
130	145	sci_dev_data->idx = idx;
	146	+ /* Enable the exclusive permissions by default */
	147	+ sci_dev_data->exclusive = TI_SCI_PD_EXCLUSIVE;
	148	+ if (pd_args.args_count == 2)
	149	+ sci_dev_data->exclusive = pd_args.args[1] & 0x1;
131	150
132	151	genpd_data = dev_gpd_data(dev);
133	152	genpd_data->data = sci_dev_data;

include/dt-bindings/pinctrl/k3.h+3−0

@@ -32,4 +32,7 @@ · 31 unmodified lines
32	32	#define AM65X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) \| (muxmode))
33	33	#define AM65X_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) \| (muxmode))
34	34
	35	+#define J721E_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) \| (muxmode))
	36	+#define J721E_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) \| (muxmode))
	37	+
35	38	#endif

include/dt-bindings/soc/ti,sci_pm_domain.h+9−0

@@ -0,0 +1,9 @@
	1	+/* SPDX-License-Identifier: GPL-2.0 */
	2	+
	3	+#ifndef __DT_BINDINGS_TI_SCI_PM_DOMAIN_H
	4	+#define __DT_BINDINGS_TI_SCI_PM_DOMAIN_H
	5	+
	6	+#define TI_SCI_PD_EXCLUSIVE 1
	7	+#define TI_SCI_PD_SHARED 0
	8	+
	9	+#endif /* __DT_BINDINGS_TI_SCI_PM_DOMAIN_H */

include/linux/soc/ti/ti_sci_protocol.h+3−0

@@ -97,7 +97,10 @@ struct ti_sci_core_ops { · 96 unmodified lines
97	97	*/
98	98	struct ti_sci_dev_ops {
99	99	int (get_device)(const struct ti_sci_handle handle, u32 id);
	100	+ int (get_device_exclusive)(const struct ti_sci_handle handle, u32 id);
100	101	int (idle_device)(const struct ti_sci_handle handle, u32 id);
	102	+ int (idle_device_exclusive)(const struct ti_sci_handle handle,
	103	+ u32 id);
101	104	int (put_device)(const struct ti_sci_handle handle, u32 id);
102	105	int (is_valid)(const struct ti_sci_handle handle, u32 id);
103	106	int (get_context_loss_count)(const struct ti_sci_handle handle,

Merge tag 'ti-k3-soc-for-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux into arm/late

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