History

Merge branch 'pci/config-errs'

- Simplify config accessor error checking (Ilpo Järvinen) * pci/config-errs: scsi: ipr: Do PCI error checks on own line PCI: xgene: Do PCI error check on own line & keep return value PCI: Do error check on own line to split long "if" conditions atm: iphase: Do PCI error checks on own line sh: pci: Do PCI error check on own line alpha: Streamline convoluted PCI error handling

Bjorn Helgaas committed 3 years ago

Commit 65de3fd2 parents d100de0 87576098 files · +50 −38Browse files

Unified · Split

8 files
  1. arch/alpha/kernel/sys_miata.c +9 −8
  2. arch/sh/drivers/pci/common.c +6 −5
  3. drivers/atm/iphase.c +11 −9
  4. drivers/pci/controller/pci-xgene.c +4 −3
  5. drivers/pci/pci.c +6 −3
  6. drivers/pci/probe.c +3 −3
  7. drivers/pci/quirks.c +3 −3
  8. drivers/scsi/ipr.c +8 −4
arch/alpha/kernel/sys_miata.c+9−8
@@ -183,16 +183,17 @@ miata_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) · 182 unmodified lines
183 the 2nd 8259 controller. So we have to check for it first. */183 the 2nd 8259 controller. So we have to check for it first. */
184 184
185 if((slot == 7) && (PCI_FUNC(dev->devfn) == 3)) {185 if((slot == 7) && (PCI_FUNC(dev->devfn) == 3)) {
186 u8 irq=0;
187 struct pci_dev *pdev = pci_get_slot(dev->bus, dev->devfn & ~7);186 struct pci_dev *pdev = pci_get_slot(dev->bus, dev->devfn & ~7);
188 if(pdev == NULL || pci_read_config_byte(pdev, 0x40,&irq) != PCIBIOS_SUCCESSFUL) {187 u8 irq = 0;
189 pci_dev_put(pdev);188 int ret;
189
190 if (!pdev)
190 return -1;191 return -1;
191 }192
192 else {193 ret = pci_read_config_byte(pdev, 0x40, &irq);
193 pci_dev_put(pdev);194 pci_dev_put(pdev);
194 return irq;195
195 }196 return ret == PCIBIOS_SUCCESSFUL ? irq : -1;
196 }197 }
197 198
198 return COMMON_TABLE_LOOKUP;199 return COMMON_TABLE_LOOKUP;
arch/sh/drivers/pci/common.c+6−5
@@ -50,20 +50,21 @@ int __init pci_is_66mhz_capable(struct pci_channel *hose, · 49 unmodified lines
50 int top_bus, int current_bus)50 int top_bus, int current_bus)
51{51{
52 u32 pci_devfn;52 u32 pci_devfn;
53 unsigned short vid;53 u16 vid;
54 int cap66 = -1;54 int cap66 = -1;
55 u16 stat;55 u16 stat;
56 int ret;
56 57
57 pr_info("PCI: Checking 66MHz capabilities...\n");58 pr_info("PCI: Checking 66MHz capabilities...\n");
58 59
59 for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {60 for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
60 if (PCI_FUNC(pci_devfn))61 if (PCI_FUNC(pci_devfn))
61 continue;62 continue;
62 if (early_read_config_word(hose, top_bus, current_bus,63 ret = early_read_config_word(hose, top_bus, current_bus,
63 pci_devfn, PCI_VENDOR_ID, &vid) !=64 pci_devfn, PCI_VENDOR_ID, &vid);
64 PCIBIOS_SUCCESSFUL)65 if (ret != PCIBIOS_SUCCESSFUL)
65 continue;66 continue;
66 if (vid == 0xffff)67 if (PCI_POSSIBLE_ERROR(vid))
67 continue;68 continue;
68 69
69 /* check 66MHz capability */70 /* check 66MHz capability */
drivers/atm/iphase.c+11−9
@@ -2291,19 +2291,21 @@ static int get_esi(struct atm_dev *dev) · 2290 unmodified lines
2291static int reset_sar(struct atm_dev *dev) 2291static int reset_sar(struct atm_dev *dev)
2292{ 2292{
2293 IADEV *iadev; 2293 IADEV *iadev;
2294 int i, error = 1; 2294 int i, error;
2295 unsigned int pci[64]; 2295 unsigned int pci[64];
2296 2296
2297 iadev = INPH_IA_DEV(dev); 2297 iadev = INPH_IA_DEV(dev);
2298 for(i=0; i<64; i++) 2298 for (i = 0; i < 64; i++) {
2299 if ((error = pci_read_config_dword(iadev->pci, 2299 error = pci_read_config_dword(iadev->pci, i * 4, &pci[i]);
2300 i*4, &pci[i])) != PCIBIOS_SUCCESSFUL) 2300 if (error != PCIBIOS_SUCCESSFUL)
2301 return error; 2301 return error;
2302 }
2302 writel(0, iadev->reg+IPHASE5575_EXT_RESET); 2303 writel(0, iadev->reg+IPHASE5575_EXT_RESET);
2303 for(i=0; i<64; i++) 2304 for (i = 0; i < 64; i++) {
2304 if ((error = pci_write_config_dword(iadev->pci, 2305 error = pci_write_config_dword(iadev->pci, i * 4, pci[i]);
2305 i*4, pci[i])) != PCIBIOS_SUCCESSFUL) 2306 if (error != PCIBIOS_SUCCESSFUL)
2306 return error; 2307 return error;
2308 }
2307 udelay(5); 2309 udelay(5);
2308 return 0; 2310 return 0;
2309} 2311}
drivers/pci/controller/pci-xgene.c+4−3
@@ -163,10 +163,11 @@ static int xgene_pcie_config_read32(struct pci_bus *bus, unsigned int devfn, · 162 unmodified lines
163 int where, int size, u32 *val)163 int where, int size, u32 *val)
164{164{
165 struct xgene_pcie *port = pcie_bus_to_port(bus);165 struct xgene_pcie *port = pcie_bus_to_port(bus);
166 int ret;
166 167
167 if (pci_generic_config_read32(bus, devfn, where & ~0x3, 4, val) !=168 ret = pci_generic_config_read32(bus, devfn, where & ~0x3, 4, val);
168 PCIBIOS_SUCCESSFUL)169 if (ret != PCIBIOS_SUCCESSFUL)
169 return PCIBIOS_DEVICE_NOT_FOUND;170 return ret;
170 171
171 /*172 /*
172 * The v1 controller has a bug in its Configuration Request Retry173 * The v1 controller has a bug in its Configuration Request Retry
drivers/pci/pci.c+6−3
@@ -732,15 +732,18 @@ u16 pci_find_vsec_capability(struct pci_dev *dev, u16 vendor, int cap) · 731 unmodified lines
732{732{
733 u16 vsec = 0;733 u16 vsec = 0;
734 u32 header;734 u32 header;
735 int ret;
735 736
736 if (vendor != dev->vendor)737 if (vendor != dev->vendor)
737 return 0;738 return 0;
738 739
739 while ((vsec = pci_find_next_ext_capability(dev, vsec,740 while ((vsec = pci_find_next_ext_capability(dev, vsec,
740 PCI_EXT_CAP_ID_VNDR))) {741 PCI_EXT_CAP_ID_VNDR))) {
741 if (pci_read_config_dword(dev, vsec + PCI_VNDR_HEADER,742 ret = pci_read_config_dword(dev, vsec + PCI_VNDR_HEADER, &header);
742 &header) == PCIBIOS_SUCCESSFUL &&743 if (ret != PCIBIOS_SUCCESSFUL)
743 PCI_VNDR_HEADER_ID(header) == cap)744 continue;
745
746 if (PCI_VNDR_HEADER_ID(header) == cap)
744 return vsec;747 return vsec;
745 }748 }
746 749
drivers/pci/probe.c+3−3
@@ -1652,15 +1652,15 @@ static void pci_set_removable(struct pci_dev *dev) · 1651 unmodified lines
1652static bool pci_ext_cfg_is_aliased(struct pci_dev *dev)1652static bool pci_ext_cfg_is_aliased(struct pci_dev *dev)
1653{1653{
1654#ifdef CONFIG_PCI_QUIRKS1654#ifdef CONFIG_PCI_QUIRKS
1655 int pos;1655 int pos, ret;
1656 u32 header, tmp;1656 u32 header, tmp;
1657 1657
1658 pci_read_config_dword(dev, PCI_VENDOR_ID, &header);1658 pci_read_config_dword(dev, PCI_VENDOR_ID, &header);
1659 1659
1660 for (pos = PCI_CFG_SPACE_SIZE;1660 for (pos = PCI_CFG_SPACE_SIZE;
1661 pos < PCI_CFG_SPACE_EXP_SIZE; pos += PCI_CFG_SPACE_SIZE) {1661 pos < PCI_CFG_SPACE_EXP_SIZE; pos += PCI_CFG_SPACE_SIZE) {
1662 if (pci_read_config_dword(dev, pos, &tmp) != PCIBIOS_SUCCESSFUL1662 ret = pci_read_config_dword(dev, pos, &tmp);
1663 || header != tmp)1663 if ((ret != PCIBIOS_SUCCESSFUL) || (header != tmp))
1664 return false;1664 return false;
1665 }1665 }
1666 1666
drivers/pci/quirks.c+3−3
@@ -5383,7 +5383,7 @@ int pci_dev_specific_disable_acs_redir(struct pci_dev *dev) · 5382 unmodified lines
5383 */5383 */
5384static void quirk_intel_qat_vf_cap(struct pci_dev *pdev)5384static void quirk_intel_qat_vf_cap(struct pci_dev *pdev)
5385{5385{
5386 int pos, i = 0;5386 int pos, i = 0, ret;
5387 u8 next_cap;5387 u8 next_cap;
5388 u16 reg16, *cap;5388 u16 reg16, *cap;
5389 struct pci_cap_saved_state *state;5389 struct pci_cap_saved_state *state;
@@ -5429,8 +5429,8 @@ static void quirk_intel_qat_vf_cap(struct pci_dev *pdev) · 39 unmodified lines
5429 pdev->pcie_mpss = reg16 & PCI_EXP_DEVCAP_PAYLOAD;5429 pdev->pcie_mpss = reg16 & PCI_EXP_DEVCAP_PAYLOAD;
5430 5430
5431 pdev->cfg_size = PCI_CFG_SPACE_EXP_SIZE;5431 pdev->cfg_size = PCI_CFG_SPACE_EXP_SIZE;
5432 if (pci_read_config_dword(pdev, PCI_CFG_SPACE_SIZE, &status) !=5432 ret = pci_read_config_dword(pdev, PCI_CFG_SPACE_SIZE, &status);
5433 PCIBIOS_SUCCESSFUL || (status == 0xffffffff))5433 if ((ret != PCIBIOS_SUCCESSFUL) || (PCI_POSSIBLE_ERROR(status)))
5434 pdev->cfg_size = PCI_CFG_SPACE_SIZE;5434 pdev->cfg_size = PCI_CFG_SPACE_SIZE;
5435 5435
5436 if (pci_find_saved_cap(pdev, PCI_CAP_ID_EXP))5436 if (pci_find_saved_cap(pdev, PCI_CAP_ID_EXP))
drivers/scsi/ipr.c+8−4
@@ -761,12 +761,14 @@ static void ipr_mask_and_clear_interrupts(struct ipr_ioa_cfg *ioa_cfg, · 760 unmodified lines
761static int ipr_save_pcix_cmd_reg(struct ipr_ioa_cfg *ioa_cfg)761static int ipr_save_pcix_cmd_reg(struct ipr_ioa_cfg *ioa_cfg)
762{762{
763 int pcix_cmd_reg = pci_find_capability(ioa_cfg->pdev, PCI_CAP_ID_PCIX);763 int pcix_cmd_reg = pci_find_capability(ioa_cfg->pdev, PCI_CAP_ID_PCIX);
764 int rc;
764 765
765 if (pcix_cmd_reg == 0)766 if (pcix_cmd_reg == 0)
766 return 0;767 return 0;
767 768
768 if (pci_read_config_word(ioa_cfg->pdev, pcix_cmd_reg + PCI_X_CMD,769 rc = pci_read_config_word(ioa_cfg->pdev, pcix_cmd_reg + PCI_X_CMD,
769 &ioa_cfg->saved_pcix_cmd_reg) != PCIBIOS_SUCCESSFUL) {770 &ioa_cfg->saved_pcix_cmd_reg);
771 if (rc != PCIBIOS_SUCCESSFUL) {
770 dev_err(&ioa_cfg->pdev->dev, "Failed to save PCI-X command register\n");772 dev_err(&ioa_cfg->pdev->dev, "Failed to save PCI-X command register\n");
771 return -EIO;773 return -EIO;
772 }774 }
@@ -785,10 +787,12 @@ static int ipr_save_pcix_cmd_reg(struct ipr_ioa_cfg *ioa_cfg) · 12 unmodified lines
785static int ipr_set_pcix_cmd_reg(struct ipr_ioa_cfg *ioa_cfg)787static int ipr_set_pcix_cmd_reg(struct ipr_ioa_cfg *ioa_cfg)
786{788{
787 int pcix_cmd_reg = pci_find_capability(ioa_cfg->pdev, PCI_CAP_ID_PCIX);789 int pcix_cmd_reg = pci_find_capability(ioa_cfg->pdev, PCI_CAP_ID_PCIX);
790 int rc;
788 791
789 if (pcix_cmd_reg) {792 if (pcix_cmd_reg) {
790 if (pci_write_config_word(ioa_cfg->pdev, pcix_cmd_reg + PCI_X_CMD,793 rc = pci_write_config_word(ioa_cfg->pdev, pcix_cmd_reg + PCI_X_CMD,
791 ioa_cfg->saved_pcix_cmd_reg) != PCIBIOS_SUCCESSFUL) {794 ioa_cfg->saved_pcix_cmd_reg);
795 if (rc != PCIBIOS_SUCCESSFUL) {
792 dev_err(&ioa_cfg->pdev->dev, "Failed to setup PCI-X command register\n");796 dev_err(&ioa_cfg->pdev->dev, "Failed to setup PCI-X command register\n");
793 return -EIO;797 return -EIO;
794 }798 }

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