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amdgpu: use drm sync objects for shared semaphores (v6)

This creates a new command submission chunk for amdgpu to add in and out sync objects around the submission. Sync objects are managed via the drm syncobj ioctls. The command submission interface is enhanced with two new chunks, one for syncobj pre submission dependencies, and one for post submission sync obj signalling, and just takes a list of handles for each. This is based on work originally done by David Zhou at AMD, with input from Christian Konig on what things should look like. In theory VkFences could be backed with sync objects and just get passed into the cs as syncobj handles as well. NOTE: this interface addition needs a version bump to expose it to userspace. TODO: update to dep_sync when rebasing onto amdgpu master. (with this - r-b from Christian) v1.1: keep file reference on import. v2: move to using syncobjs v2.1: change some APIs to just use p pointer. v3: make more robust against CS failures, we now add the wait sems but only remove them once the CS job has been submitted. v4: rewrite names of API and base on new syncobj code. v5: move post deps earlier, rename some apis v6: lookup post deps earlier, and just replace fences in post deps stage (Christian)

Dave Airlie committed 9 years ago

Commit 660e8551 parent 6f0308e4 files · +97 −2Browse files

Showing the changes to include/uapi (1 of 4 files). Show all

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include/uapi/drm/amdgpu_drm.h+6−0
@@ -440,6 +440,8 @@ struct drm_amdgpu_gem_va { · 439 unmodified lines
440#define AMDGPU_CHUNK_ID_IB 0x01440#define AMDGPU_CHUNK_ID_IB 0x01
441#define AMDGPU_CHUNK_ID_FENCE 0x02441#define AMDGPU_CHUNK_ID_FENCE 0x02
442#define AMDGPU_CHUNK_ID_DEPENDENCIES 0x03442#define AMDGPU_CHUNK_ID_DEPENDENCIES 0x03
443#define AMDGPU_CHUNK_ID_SYNCOBJ_IN 0x04
444#define AMDGPU_CHUNK_ID_SYNCOBJ_OUT 0x05
443 445
444struct drm_amdgpu_cs_chunk {446struct drm_amdgpu_cs_chunk {
445 __u32 chunk_id;447 __u32 chunk_id;
@@ -507,6 +509,10 @@ struct drm_amdgpu_cs_chunk_fence { · 61 unmodified lines
507 __u32 offset;509 __u32 offset;
508};510};
509 511
512struct drm_amdgpu_cs_chunk_sem {
513 __u32 handle;
514};
515
510struct drm_amdgpu_cs_chunk_data {516struct drm_amdgpu_cs_chunk_data {
511 union {517 union {
512 struct drm_amdgpu_cs_chunk_ib ib_data;518 struct drm_amdgpu_cs_chunk_ib ib_data;

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