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drm/amdgpu: add ctx_id to the WAIT_CS IOCTL (v4)

It is required to support fence per context. v2: add amdgpu_ctx_get/put v3: improve get/put v4: squash hlock fix

Jammy Zhou committed 11 years ago

Commit 66b3cf21 parent 74a5d164 files · +39 −1Browse files

Unified · Split

4 files
  1. drivers/gpu/drm/amd/amdgpu/amdgpu.h +2 −0
  2. drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +6 −0
  3. drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c +30 −0
  4. include/uapi/drm/amdgpu_drm.h +1 −1
drivers/gpu/drm/amd/amdgpu/amdgpu.h+2−0
@@ -1902,6 +1902,8 @@ int amdgpu_ctx_query(struct amdgpu_device *adev, struct amdgpu_fpriv *fpriv, · 1901 unmodified lines
1902 uint32_t id,struct amdgpu_ctx_state *state);1902 uint32_t id,struct amdgpu_ctx_state *state);
1903 1903
1904void amdgpu_ctx_fini(struct amdgpu_fpriv *fpriv);1904void amdgpu_ctx_fini(struct amdgpu_fpriv *fpriv);
1905struct amdgpu_ctx *amdgpu_ctx_get(struct amdgpu_fpriv *fpriv, uint32_t id);
1906int amdgpu_ctx_put(struct amdgpu_ctx *ctx);
1905 1907
1906extern int amdgpu_ctx_ioctl(struct drm_device *dev, void *data,1908extern int amdgpu_ctx_ioctl(struct drm_device *dev, void *data,
1907 struct drm_file *filp);1909 struct drm_file *filp);
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c+6−0
@@ -768,8 +768,13 @@ int amdgpu_cs_wait_ioctl(struct drm_device *dev, void *data, · 767 unmodified lines
768 uint64_t seq[AMDGPU_MAX_RINGS] = {0};768 uint64_t seq[AMDGPU_MAX_RINGS] = {0};
769 struct amdgpu_ring *ring = NULL;769 struct amdgpu_ring *ring = NULL;
770 unsigned long timeout = amdgpu_gem_timeout(wait->in.timeout);770 unsigned long timeout = amdgpu_gem_timeout(wait->in.timeout);
771 struct amdgpu_ctx *ctx;
771 long r;772 long r;
772 773
774 ctx = amdgpu_ctx_get(filp->driver_priv, wait->in.ctx_id);
775 if (ctx == NULL)
776 return -EINVAL;
777
773 r = amdgpu_cs_get_ring(adev, wait->in.ip_type, wait->in.ip_instance,778 r = amdgpu_cs_get_ring(adev, wait->in.ip_type, wait->in.ip_instance,
774 wait->in.ring, &ring);779 wait->in.ring, &ring);
775 if (r)780 if (r)
@@ -778,6 +783,7 @@ int amdgpu_cs_wait_ioctl(struct drm_device *dev, void *data, · 2 unmodified lines
778 seq[ring->idx] = wait->in.handle;783 seq[ring->idx] = wait->in.handle;
779 784
780 r = amdgpu_fence_wait_seq_timeout(adev, seq, true, timeout);785 r = amdgpu_fence_wait_seq_timeout(adev, seq, true, timeout);
786 amdgpu_ctx_put(ctx);
781 if (r < 0)787 if (r < 0)
782 return r;788 return r;
783 789
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c+30−0
@@ -151,3 +151,33 @@ int amdgpu_ctx_ioctl(struct drm_device *dev, void *data, · 150 unmodified lines
151 151
152 return r;152 return r;
153}153}
154
155struct amdgpu_ctx *amdgpu_ctx_get(struct amdgpu_fpriv *fpriv, uint32_t id)
156{
157 struct amdgpu_ctx *ctx;
158 struct amdgpu_ctx_mgr *mgr = &fpriv->ctx_mgr;
159
160 mutex_lock(&mgr->lock);
161 ctx = idr_find(&mgr->ctx_handles, id);
162 if (ctx)
163 kref_get(&ctx->refcount);
164 mutex_unlock(&mgr->lock);
165 return ctx;
166}
167
168int amdgpu_ctx_put(struct amdgpu_ctx *ctx)
169{
170 struct amdgpu_fpriv *fpriv;
171 struct amdgpu_ctx_mgr *mgr;
172
173 if (ctx == NULL)
174 return -EINVAL;
175
176 fpriv = ctx->fpriv;
177 mgr = &fpriv->ctx_mgr;
178 mutex_lock(&mgr->lock);
179 kref_put(&ctx->refcount, amdgpu_ctx_do_release);
180 mutex_unlock(&mgr->lock);
181
182 return 0;
183}
include/uapi/drm/amdgpu_drm.h+1−1
@@ -260,7 +260,7 @@ struct drm_amdgpu_wait_cs_in { · 259 unmodified lines
260 uint32_t ip_type;260 uint32_t ip_type;
261 uint32_t ip_instance;261 uint32_t ip_instance;
262 uint32_t ring;262 uint32_t ring;
263 uint32_t _pad;263 uint32_t ctx_id;
264};264};
265 265
266struct drm_amdgpu_wait_cs_out {266struct drm_amdgpu_wait_cs_out {