History

Merge branch 'for-6.14/constify-bin-attribute' into for-linus

- constification of 'struct bin_attribute' in various HID driver (Thomas Weißschuh)

Jiri Kosina committed 1 year ago

Commit 670af652 parents 53078a7 1b1d8654875 files · +126039 −111686Browse files

Unified · Split

3483 files
  1. .clippy.toml +9 −0
  2. .gitignore +2 −0
  3. Documentation/ABI/testing/configfs-usb-gadget-uvc +64 −0
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  7. Documentation/ABI/testing/sysfs-bus-iio-adc-ad4130 +0 −46
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  280. arch/loongarch/Kconfig +3 −0
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  1947. drivers/macintosh/windfarm_pm121.c +1 −1
  1948. drivers/macintosh/windfarm_pm72.c +1 −1
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  1986. drivers/md/dm-cache-metadata.h +0 −3
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  1988. drivers/md/dm-table.c +0 −5
  1989. drivers/md/dm-thin.c +1 −0
  1990. drivers/md/dm-vdo/Kconfig +1 −0
  1991. drivers/md/dm-vdo/block-map.c +0 −2
  1992. drivers/md/dm-vdo/data-vio.c +4 −32
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  1994. drivers/md/dm-vdo/dedupe.c +5 −4
  1995. drivers/md/dm-vdo/encodings.c +1 −1
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  2000. drivers/md/dm-vdo/murmurhash3.c +2 −5
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  2002. drivers/md/dm-vdo/physical-zone.c +1 −1
  2003. drivers/md/dm-vdo/recovery-journal.c +1 −1
  2004. drivers/md/dm-vdo/repair.c +1 −1
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  3248. drivers/tty/serial/8250/8250_omap.c +5 −5
  3249. drivers/tty/serial/8250/8250_pci.c +1 −1
  3250. drivers/tty/serial/8250/8250_pci1xxxx.c +1 −1
  3251. drivers/tty/serial/8250/8250_pcilib.c +2 −2
  3252. drivers/tty/serial/8250/8250_platform.c +1 −1
  3253. drivers/tty/serial/8250/8250_pxa.c +1 −1
  3254. drivers/tty/serial/8250/8250_tegra.c +1 −1
  3255. drivers/tty/serial/8250/8250_uniphier.c +1 −1
  3256. drivers/tty/serial/8250/Kconfig +1 −0
  3257. drivers/tty/serial/altera_jtaguart.c +3 −3
  3258. drivers/tty/serial/altera_uart.c +3 −3
  3259. drivers/tty/serial/amba-pl011.c +8 −1
  3260. drivers/tty/serial/ar933x_uart.c +1 −1
  3261. drivers/tty/serial/atmel_serial.c +5 −11
  3262. drivers/tty/serial/bcm63xx_uart.c +1 −1
  3263. drivers/tty/serial/clps711x.c +1 −1
  3264. drivers/tty/serial/cpm_uart.c +1 −1
  3265. drivers/tty/serial/digicolor-usart.c +1 −1
  3266. drivers/tty/serial/esp32_acm.c +1 −1
  3267. drivers/tty/serial/esp32_uart.c +1 −1
  3268. drivers/tty/serial/fsl_linflexuart.c +1 −1
  3269. drivers/tty/serial/fsl_lpuart.c +17 −6
  3270. drivers/tty/serial/imx.c +117 −20
  3271. drivers/tty/serial/lantiq.c +1 −1
  3272. drivers/tty/serial/liteuart.c +1 −1
  3273. drivers/tty/serial/lpc32xx_hs.c +1 −1
  3274. drivers/tty/serial/ma35d1_serial.c +1 −1
  3275. drivers/tty/serial/mcf.c +1 −1
  3276. drivers/tty/serial/men_z135_uart.c +1 −1
  3277. drivers/tty/serial/meson_uart.c +1 −1
  3278. drivers/tty/serial/milbeaut_usio.c +1 −1
  3279. drivers/tty/serial/mpc52xx_uart.c +1 −1
  3280. drivers/tty/serial/msm_serial.c +1 −1
  3281. drivers/tty/serial/mxs-auart.c +1 −1
  3282. drivers/tty/serial/omap-serial.c +1 −1
  3283. drivers/tty/serial/owl-uart.c +1 −1
  3284. drivers/tty/serial/pic32_uart.c +1 −1
  3285. drivers/tty/serial/pmac_zilog.c +1 −1
  3286. drivers/tty/serial/qcom_geni_serial.c +1 −1
  3287. drivers/tty/serial/rda-uart.c +1 −1
  3288. drivers/tty/serial/rp2.c +7 −5
  3289. drivers/tty/serial/sa1100.c +1 −1
  3290. drivers/tty/serial/samsung_tty.c +14 −1
  3291. drivers/tty/serial/sc16is7xx.c +2 −2
  3292. drivers/tty/serial/sc16is7xx_i2c.c +1 −1
  3293. drivers/tty/serial/sc16is7xx_spi.c +1 −1
  3294. drivers/tty/serial/sccnxp.c +1 −1
  3295. drivers/tty/serial/serial-tegra.c +1 −1
  3296. drivers/tty/serial/serial_txx9.c +1 −1
  3297. drivers/tty/serial/sh-sci.c +1 −1
  3298. drivers/tty/serial/sifive.c +1 −1
  3299. drivers/tty/serial/sprd_serial.c +37 −6
  3300. drivers/tty/serial/st-asc.c +1 −1
  3301. drivers/tty/serial/stm32-usart.c +1 −1
  3302. drivers/tty/serial/sunhv.c +1 −1
  3303. drivers/tty/serial/sunplus-uart.c +1 −1
  3304. drivers/tty/serial/sunsab.c +1 −1
  3305. drivers/tty/serial/sunsu.c +1 −1
  3306. drivers/tty/serial/sunzilog.c +1 −1
  3307. drivers/tty/serial/tegra-tcu.c +1 −1
  3308. drivers/tty/serial/timbuart.c +1 −1
  3309. drivers/tty/serial/uartlite.c +1 −1
  3310. drivers/tty/serial/ucc_uart.c +1 −1
  3311. drivers/tty/serial/xilinx_uartps.c +1 −1
  3312. drivers/tty/tty_io.c +1 −1
  3313. drivers/ufs/core/ufs-mcq.c +17 −13
  3314. drivers/ufs/core/ufshcd.c +302 −269
  3315. drivers/ufs/host/cdns-pltfrm.c +1 −1
  3316. drivers/ufs/host/tc-dwc-g210-pci.c +3 −5
  3317. drivers/ufs/host/tc-dwc-g210-pltfrm.c +1 −1
  3318. drivers/ufs/host/ti-j721e-ufs.c +1 −1
  3319. drivers/ufs/host/ufs-exynos.c +74 −64
  3320. drivers/ufs/host/ufs-exynos.h +1 −1
  3321. drivers/ufs/host/ufs-hisi.c +1 −1
  3322. drivers/ufs/host/ufs-mediatek.c +11 −1
  3323. drivers/ufs/host/ufs-qcom.c +23 −5
  3324. drivers/ufs/host/ufs-renesas.c +9 −2
  3325. drivers/ufs/host/ufs-sprd.c +1 −1
  3326. drivers/ufs/host/ufshcd-pci.c +3 −5
  3327. drivers/uio/uio_dmem_genirq.c +1 −4
  3328. drivers/uio/uio_fsl_elbc_gpcm.c +1 −1
  3329. drivers/uio/uio_hv_generic.c +1 −1
  3330. drivers/uio/uio_pdrv_genirq.c +1 −4
  3331. drivers/usb/atm/ueagle-atm.c +3 −3
  3332. drivers/usb/atm/usbatm.c +1 −1
  3333. drivers/usb/c67x00/c67x00-drv.c +1 −1
  3334. drivers/usb/cdns3/cdns3-imx.c +1 −1
  3335. drivers/usb/cdns3/cdns3-pci-wrap.c +1 −3
  3336. drivers/usb/cdns3/cdns3-plat.c +1 −1
  3337. drivers/usb/cdns3/cdns3-starfive.c +1 −1
  3338. drivers/usb/cdns3/cdns3-ti.c +1 −1
  3339. drivers/usb/cdns3/cdnsp-pci.c +10 −16
  3340. drivers/usb/chipidea/ci.h +2 −0
  3341. drivers/usb/chipidea/ci_hdrc_imx.c +2 −1
  3342. drivers/usb/chipidea/ci_hdrc_msm.c +1 −1
  3343. drivers/usb/chipidea/ci_hdrc_npcm.c +1 −1
  3344. drivers/usb/chipidea/ci_hdrc_tegra.c +1 −1
  3345. drivers/usb/chipidea/ci_hdrc_usb2.c +1 −1
  3346. drivers/usb/chipidea/core.c +4 −2
  3347. drivers/usb/chipidea/udc.c +172 −6
  3348. drivers/usb/chipidea/udc.h +2 −0
  3349. drivers/usb/chipidea/usbmisc_imx.c +4 −0
  3350. drivers/usb/common/common.c +3 −0
  3351. drivers/usb/common/usb-conn-gpio.c +1 −1
  3352. drivers/usb/core/config.c +1 −1
  3353. drivers/usb/core/devio.c +4 −1
  3354. drivers/usb/core/driver.c +10 −14
  3355. drivers/usb/core/endpoint.c +6 −5
  3356. drivers/usb/core/ledtrig-usbport.c +2 −1
  3357. drivers/usb/core/port.c +6 −5
  3358. drivers/usb/core/sysfs.c +1 −1
  3359. drivers/usb/core/usb.h +1 −1
  3360. drivers/usb/dwc2/Kconfig +1 −1
  3361. drivers/usb/dwc2/platform.c +1 −1
  3362. drivers/usb/dwc3/Kconfig +1 −1
  3363. drivers/usb/dwc3/core.c +10 −6
  3364. drivers/usb/dwc3/core.h +6 −8
  3365. drivers/usb/dwc3/dwc3-am62.c +1 −1
  3366. drivers/usb/dwc3/dwc3-exynos.c +1 −1
  3367. drivers/usb/dwc3/dwc3-imx8mp.c +1 −1
  3368. drivers/usb/dwc3/dwc3-keystone.c +1 −1
  3369. drivers/usb/dwc3/dwc3-meson-g12a.c +1 −1
  3370. drivers/usb/dwc3/dwc3-octeon.c +1 −1
  3371. drivers/usb/dwc3/dwc3-of-simple.c +1 −1
  3372. drivers/usb/dwc3/dwc3-omap.c +2 −2
  3373. drivers/usb/dwc3/dwc3-qcom.c +2 −2
  3374. drivers/usb/dwc3/dwc3-rtk.c +1 −1
  3375. drivers/usb/dwc3/dwc3-st.c +1 −1
  3376. drivers/usb/dwc3/dwc3-xilinx.c +1 −1
  3377. drivers/usb/dwc3/ep0.c +2 −2
  3378. drivers/usb/dwc3/gadget.c +90 −62
  3379. drivers/usb/dwc3/host.c +1 −1
  3380. drivers/usb/fotg210/fotg210-core.c +1 −1
  3381. drivers/usb/gadget/composite.c +21 −9
  3382. drivers/usb/gadget/config.c +2 −2
  3383. drivers/usb/gadget/configfs.c +1 −1
  3384. drivers/usb/gadget/function/Makefile +4 −0
  3385. drivers/usb/gadget/function/f_fs.c +4 −4
  3386. drivers/usb/gadget/function/f_mass_storage.c +4 −4
  3387. drivers/usb/gadget/function/f_midi.c +4 −4
  3388. drivers/usb/gadget/function/f_midi2.c +1 −3
  3389. drivers/usb/gadget/function/f_uvc.c +3 −1
  3390. drivers/usb/gadget/function/uvc.h +13 −0
  3391. drivers/usb/gadget/function/uvc_configfs.c +337 −11
  3392. drivers/usb/gadget/function/uvc_configfs.h +16 −0
  3393. drivers/usb/gadget/function/uvc_queue.c +11 −15
  3394. drivers/usb/gadget/function/uvc_queue.h +2 −0
  3395. drivers/usb/gadget/function/uvc_trace.c +11 −0
  3396. drivers/usb/gadget/function/uvc_trace.h +60 −0
  3397. drivers/usb/gadget/function/uvc_v4l2.c +65 −1
  3398. drivers/usb/gadget/function/uvc_video.c +161 −107
  3399. drivers/usb/gadget/legacy/hid.c +1 −1
  3400. drivers/usb/gadget/legacy/raw_gadget.c +2 −2
  3401. drivers/usb/gadget/udc/aspeed-vhub/core.c +1 −1
  3402. drivers/usb/gadget/udc/aspeed_udc.c +2 −2
  3403. drivers/usb/gadget/udc/at91_udc.c +1 −1
  3404. drivers/usb/gadget/udc/atmel_usba_udc.c +1 −1
  3405. drivers/usb/gadget/udc/bcm63xx_udc.c +1 −1
  3406. drivers/usb/gadget/udc/bdc/bdc_core.c +1 −1
  3407. drivers/usb/gadget/udc/cdns2/cdns2-pci.c +1 −2
  3408. drivers/usb/gadget/udc/dummy_hcd.c +3 −3
  3409. drivers/usb/gadget/udc/fsl_qe_udc.c +4 −4
  3410. drivers/usb/gadget/udc/fsl_udc_core.c +1 −1
  3411. drivers/usb/gadget/udc/fusb300_udc.c +2 −2
  3412. drivers/usb/gadget/udc/gr_udc.c +1 −1
  3413. drivers/usb/gadget/udc/lpc32xx_udc.c +1 −1
  3414. drivers/usb/gadget/udc/m66592-udc.c +1 −1
  3415. drivers/usb/gadget/udc/mv_u3d_core.c +1 −1
  3416. drivers/usb/gadget/udc/mv_udc_core.c +1 −1
  3417. drivers/usb/gadget/udc/net2272.c +2 −2
  3418. drivers/usb/gadget/udc/omap_udc.c +3 −3
  3419. drivers/usb/gadget/udc/pxa25x_udc.c +1 −1
  3420. drivers/usb/gadget/udc/pxa27x_udc.c +1 −1
  3421. drivers/usb/gadget/udc/r8a66597-udc.c +1 −1
  3422. drivers/usb/gadget/udc/renesas_usb3.c +1 −1
  3423. drivers/usb/gadget/udc/renesas_usbf.c +2 −2
  3424. drivers/usb/gadget/udc/rzv2m_usb3drd.c +1 −1
  3425. drivers/usb/gadget/udc/snps_udc_core.c +1 −1
  3426. drivers/usb/gadget/udc/snps_udc_plat.c +1 −1
  3427. drivers/usb/gadget/udc/tegra-xudc.c +1 −1
  3428. drivers/usb/gadget/udc/udc-xilinx.c +1 −1
  3429. drivers/usb/gadget/usbstring.c +1 −1
  3430. drivers/usb/host/bcma-hcd.c +0 −1
  3431. drivers/usb/host/ehci-atmel.c +1 −1
  3432. drivers/usb/host/ehci-brcm.c +1 −1
  3433. drivers/usb/host/ehci-exynos.c +1 −1
  3434. drivers/usb/host/ehci-fsl.c +1 −1
  3435. drivers/usb/host/ehci-grlib.c +1 −1
  3436. drivers/usb/host/ehci-hcd.c +1 −1
  3437. drivers/usb/host/ehci-mv.c +1 −1
  3438. drivers/usb/host/ehci-npcm7xx.c +1 −1
  3439. drivers/usb/host/ehci-omap.c +1 −1
  3440. drivers/usb/host/ehci-orion.c +1 −1
  3441. drivers/usb/host/ehci-platform.c +1 −1
  3442. drivers/usb/host/ehci-ppc-of.c +1 −1
  3443. drivers/usb/host/ehci-sh.c +1 −1
  3444. drivers/usb/host/ehci-spear.c +5 −4
  3445. drivers/usb/host/ehci-st.c +1 −1
  3446. drivers/usb/host/ehci-xilinx-of.c +1 −1
  3447. drivers/usb/host/fhci-hcd.c +1 −1
  3448. drivers/usb/host/fhci-sched.c +2 −2
  3449. drivers/usb/host/fsl-mph-dr-of.c +1 −1
  3450. drivers/usb/host/isp116x-hcd.c +1 −1
  3451. drivers/usb/host/isp1362-hcd.c +1 −1
  3452. drivers/usb/host/octeon-hcd.c +3 −3
  3453. drivers/usb/host/ohci-at91.c +1 −1
  3454. drivers/usb/host/ohci-da8xx.c +1 −1
  3455. drivers/usb/host/ohci-exynos.c +1 −1
  3456. drivers/usb/host/ohci-nxp.c +1 −1
  3457. drivers/usb/host/ohci-omap.c +2 −2
  3458. drivers/usb/host/ohci-platform.c +1 −1
  3459. drivers/usb/host/ohci-ppc-of.c +1 −1
  3460. drivers/usb/host/ohci-pxa27x.c +1 −1
  3461. drivers/usb/host/ohci-s3c2410.c +1 −1
  3462. drivers/usb/host/ohci-sm501.c +1 −1
  3463. drivers/usb/host/ohci-spear.c +1 −1
  3464. drivers/usb/host/ohci-st.c +1 −1
  3465. drivers/usb/host/oxu210hp-hcd.c +4 −4
  3466. drivers/usb/host/r8a66597-hcd.c +3 −3
  3467. drivers/usb/host/sl811-hcd.c +1 −1
  3468. drivers/usb/host/uhci-grlib.c +1 −1
  3469. drivers/usb/host/uhci-platform.c +1 −1
  3470. drivers/usb/host/xhci-dbgcap.c +8 −5
  3471. drivers/usb/host/xhci-debugfs.c +4 −6
  3472. drivers/usb/host/xhci-histb.c +1 −1
  3473. drivers/usb/host/xhci-hub.c +3 −3
  3474. drivers/usb/host/xhci-mem.c +112 −123
  3475. drivers/usb/host/xhci-mtk.c +1 −1
  3476. drivers/usb/host/xhci-pci-renesas.c +1 −1
  3477. drivers/usb/host/xhci-pci.c +22 −27
  3478. drivers/usb/host/xhci-plat.c +1 −1
  3479. drivers/usb/host/xhci-rcar.c +1 −1
  3480. drivers/usb/host/xhci-ring.c +178 −124
  3481. drivers/usb/host/xhci-tegra.c +1 −1
  3482. drivers/usb/host/xhci-trace.h +55 −24
  3483. drivers/usb/host/xhci.c +96 −27
.clippy.toml+9−0
@@ -0,0 +1,9 @@
1# SPDX-License-Identifier: GPL-2.0
2
3check-private-items = true
4
5disallowed-macros = [
6 # The `clippy::dbg_macro` lint only works with `std::dbg!`, thus we simulate
7 # it here, see: https://github.com/rust-lang/rust-clippy/issues/11303.
8 { path = "kernel::dbg", reason = "the `dbg!` macro is intended as a debugging tool" },
9]
.gitignore+2−0
@@ -103,6 +103,7 @@ modules.order · 102 unmodified lines
103# We don't want to ignore the following even if they are dot-files103# We don't want to ignore the following even if they are dot-files
104#104#
105!.clang-format105!.clang-format
106!.clippy.toml
106!.cocciconfig107!.cocciconfig
107!.editorconfig108!.editorconfig
108!.get_maintainer.ignore109!.get_maintainer.ignore
@@ -128,6 +129,7 @@ series · 19 unmodified lines
128 129
129# ctags files130# ctags files
130tags131tags
132!tags/
131TAGS133TAGS
132 134
133# cscope files135# cscope files
Documentation/ABI/testing/configfs-usb-gadget-uvc+64−0
@@ -342,6 +342,70 @@ Description: Specific uncompressed frame descriptors · 341 unmodified lines
342 support342 support
343 ========================= =====================================343 ========================= =====================================
344 344
345What: /config/usb-gadget/gadget/functions/uvc.name/streaming/framebased
346Date: Sept 2024
347KernelVersion: 5.15
348Description: Framebased format descriptors
349
350What: /config/usb-gadget/gadget/functions/uvc.name/streaming/framebased/name
351Date: Sept 2024
352KernelVersion: 5.15
353Description: Specific framebased format descriptors
354
355 ================== =======================================
356 bFormatIndex unique id for this format descriptor;
357 only defined after parent header is
358 linked into the streaming class;
359 read-only
360 bmaControls this format's data for bmaControls in
361 the streaming header
362 bmInterlaceFlags specifies interlace information,
363 read-only
364 bAspectRatioY the X dimension of the picture aspect
365 ratio, read-only
366 bAspectRatioX the Y dimension of the picture aspect
367 ratio, read-only
368 bDefaultFrameIndex optimum frame index for this stream
369 bBitsPerPixel number of bits per pixel used to
370 specify color in the decoded video
371 frame
372 guidFormat globally unique id used to identify
373 stream-encoding format
374 ================== =======================================
375
376What: /config/usb-gadget/gadget/functions/uvc.name/streaming/framebased/name/name
377Date: Sept 2024
378KernelVersion: 5.15
379Description: Specific framebased frame descriptors
380
381 ========================= =====================================
382 bFrameIndex unique id for this framedescriptor;
383 only defined after parent format is
384 linked into the streaming header;
385 read-only
386 dwFrameInterval indicates how frame interval can be
387 programmed; a number of values
388 separated by newline can be specified
389 dwDefaultFrameInterval the frame interval the device would
390 like to use as default
391 dwBytesPerLine Specifies the number of bytes per line
392 of video for packed fixed frame size
393 formats, allowing the receiver to
394 perform stride alignment of the video.
395 If the bVariableSize value (above) is
396 TRUE (1), or if the format does not
397 permit such alignment, this value shall
398 be set to zero (0).
399 dwMaxBitRate the maximum bit rate at the shortest
400 frame interval in bps
401 dwMinBitRate the minimum bit rate at the longest
402 frame interval in bps
403 wHeight height of decoded bitmap frame in px
404 wWidth width of decoded bitmam frame in px
405 bmCapabilities still image support, fixed frame-rate
406 support
407 ========================= =====================================
408
345What: /config/usb-gadget/gadget/functions/uvc.name/streaming/header409What: /config/usb-gadget/gadget/functions/uvc.name/streaming/header
346Date: Dec 2014410Date: Dec 2014
347KernelVersion: 4.0411KernelVersion: 4.0
Documentation/ABI/testing/debugfs-hisi-migration+25−0
@@ -0,0 +1,25 @@
1What: /sys/kernel/debug/vfio/<device>/migration/hisi_acc/dev_data
2Date: Jan 2025
3KernelVersion: 6.13
4Contact: Longfang Liu <liulongfang@huawei.com>
5Description: Read the configuration data and some status data
6 required for device live migration. These data include device
7 status data, queue configuration data, some task configuration
8 data and device attribute data. The output format of the data
9 is defined by the live migration driver.
10
11What: /sys/kernel/debug/vfio/<device>/migration/hisi_acc/migf_data
12Date: Jan 2025
13KernelVersion: 6.13
14Contact: Longfang Liu <liulongfang@huawei.com>
15Description: Read the data from the last completed live migration.
16 This data includes the same device status data as in "dev_data".
17 The migf_data is the dev_data that is migrated.
18
19What: /sys/kernel/debug/vfio/<device>/migration/hisi_acc/cmd_state
20Date: Jan 2025
21KernelVersion: 6.13
22Contact: Longfang Liu <liulongfang@huawei.com>
23Description: Used to obtain the device command sending and receiving
24 channel status. Returns failure or success logs based on the
25 results.
Documentation/ABI/testing/sysfs-bus-event_source-devices-vpa-pmu+8−7
@@ -8,17 +8,18 @@ Description: Read-only. Attribute group to describe the magic bits · 7 unmodified lines
8 Each attribute under this group defines a bit range of the8 Each attribute under this group defines a bit range of the
9 perf_event_attr.config. Supported attribute are listed9 perf_event_attr.config. Supported attribute are listed
10 below::10 below::
11 event = "config:0-31" - event ID
12 11
13 For example::12 event = "config:0-31" - event ID
14 13
15 l1_to_l2_lat = "event=0x1"14 For example::
15
16 l1_to_l2_lat = "event=0x1"
16 17
17What: /sys/bus/event_source/devices/vpa_pmu/events18What: /sys/bus/event_source/devices/vpa_pmu/events
18Date: November 202419Date: November 2024
19Contact: Linux on PowerPC Developer List <linuxppc-dev@lists.ozlabs.org>20Contact: Linux on PowerPC Developer List <linuxppc-dev@lists.ozlabs.org>
20Description: Read-only. Attribute group to describe performance monitoring21Description: Read-only. Attribute group to describe performance monitoring
21 events for the Virtual Processor Area events. Each attribute22 events for the Virtual Processor Area events. Each attribute
22 in this group describes a single performance monitoring event23 in this group describes a single performance monitoring event
23 supported by vpa_pmu. The name of the file is the name of24 supported by vpa_pmu. The name of the file is the name of
24 the event (See ABI/testing/sysfs-bus-event_source-devices-events).25 the event (See ABI/testing/sysfs-bus-event_source-devices-events).
Documentation/ABI/testing/sysfs-bus-iio+32−0
@@ -2268,6 +2268,30 @@ Description: · 2267 unmodified lines
2268 An example format is 16-bytes, 2-digits-per-byte, HEX-string2268 An example format is 16-bytes, 2-digits-per-byte, HEX-string
2269 representing the sensor unique ID number.2269 representing the sensor unique ID number.
2270 2270
2271What: /sys/bus/iio/devices/iio:deviceX/filter_type_available
2272What: /sys/bus/iio/devices/iio:deviceX/in_voltage-voltage_filter_mode_available
2273KernelVersion: 6.1
2274Contact: linux-iio@vger.kernel.org
2275Description:
2276 Reading returns a list with the possible filter modes. Options
2277 for the attribute:
2278
2279 * "sinc3" - The digital sinc3 filter. Moderate 1st
2280 conversion time. Good noise performance.
2281 * "sinc4" - Sinc 4. Excellent noise performance. Long
2282 1st conversion time.
2283 * "sinc5" - The digital sinc5 filter. Excellent noise
2284 performance
2285 * "sinc4+sinc1" - Sinc4 + averaging by 8. Low 1st conversion
2286 time.
2287 * "sinc3+rej60" - Sinc3 + 60Hz rejection.
2288 * "sinc3+sinc1" - Sinc3 + averaging by 8. Low 1st conversion
2289 time.
2290 * "sinc3+pf1" - Sinc3 + device specific Post Filter 1.
2291 * "sinc3+pf2" - Sinc3 + device specific Post Filter 2.
2292 * "sinc3+pf3" - Sinc3 + device specific Post Filter 3.
2293 * "sinc3+pf4" - Sinc3 + device specific Post Filter 4.
2294
2271What: /sys/.../events/in_proximity_thresh_either_runningperiod2295What: /sys/.../events/in_proximity_thresh_either_runningperiod
2272KernelVersion: 6.62296KernelVersion: 6.6
2273Contact: linux-iio@vger.kernel.org2297Contact: linux-iio@vger.kernel.org
@@ -2339,3 +2363,11 @@ KernelVersion: 6.10 · 65 unmodified lines
2339Contact: linux-iio@vger.kernel.org2363Contact: linux-iio@vger.kernel.org
2340Description:2364Description:
2341 The value of current sense resistor in Ohms.2365 The value of current sense resistor in Ohms.
2366
2367What: /sys/.../iio:deviceX/in_attention_input
2368KernelVersion: 6.13
2369Contact: linux-iio@vger.kernel.org
2370Description:
2371 Value representing the user's attention to the system expressed
2372 in units as percentage. This usually means if the user is
2373 looking at the screen or not.
Documentation/ABI/testing/sysfs-bus-iio-adc-ad4130+0−46
@@ -1,46 +0,0 @@
1What: /sys/bus/iio/devices/iio:deviceX/in_voltage-voltage_filter_mode_available
2KernelVersion: 6.2
3Contact: linux-iio@vger.kernel.org
4Description:
5 Reading returns a list with the possible filter modes.
6
7 * "sinc4" - Sinc 4. Excellent noise performance. Long
8 1st conversion time. No natural 50/60Hz rejection.
9
10 * "sinc4+sinc1" - Sinc4 + averaging by 8. Low 1st conversion
11 time.
12
13 * "sinc3" - Sinc3. Moderate 1st conversion time.
14 Good noise performance.
15
16 * "sinc3+rej60" - Sinc3 + 60Hz rejection. At a sampling
17 frequency of 50Hz, achieves simultaneous 50Hz and 60Hz
18 rejection.
19
20 * "sinc3+sinc1" - Sinc3 + averaging by 8. Low 1st conversion
21 time. Best used with a sampling frequency of at least
22 216.19Hz.
23
24 * "sinc3+pf1" - Sinc3 + Post Filter 1. 53dB rejection @
25 50Hz, 58dB rejection @ 60Hz.
26
27 * "sinc3+pf2" - Sinc3 + Post Filter 2. 70dB rejection @
28 50Hz, 70dB rejection @ 60Hz.
29
30 * "sinc3+pf3" - Sinc3 + Post Filter 3. 99dB rejection @
31 50Hz, 103dB rejection @ 60Hz.
32
33 * "sinc3+pf4" - Sinc3 + Post Filter 4. 103dB rejection @
34 50Hz, 109dB rejection @ 60Hz.
35
36What: /sys/bus/iio/devices/iio:deviceX/in_voltageY-voltageZ_filter_mode
37KernelVersion: 6.2
38Contact: linux-iio@vger.kernel.org
39Description:
40 Set the filter mode of the differential channel. When the filter
41 mode changes, the in_voltageY-voltageZ_sampling_frequency and
42 in_voltageY-voltageZ_sampling_frequency_available attributes
43 might also change to accommodate the new filter mode.
44 If the current sampling frequency is out of range for the new
45 filter mode, the sampling frequency will be changed to the
46 closest valid one.
Documentation/ABI/testing/sysfs-bus-pci+11−0
@@ -163,6 +163,17 @@ Description: · 162 unmodified lines
163 will be present in sysfs. Writing 1 to this file163 will be present in sysfs. Writing 1 to this file
164 will perform reset.164 will perform reset.
165 165
166What: /sys/bus/pci/devices/.../reset_subordinate
167Date: October 2024
168Contact: linux-pci@vger.kernel.org
169Description:
170 This is visible only for bridge devices. If you want to reset
171 all devices attached through the subordinate bus of a specific
172 bridge device, writing 1 to this will try to do it. This will
173 affect all devices attached to the system through this bridge
174 similiar to writing 1 to their individual "reset" file, so use
175 with caution.
176
166What: /sys/bus/pci/devices/.../vpd177What: /sys/bus/pci/devices/.../vpd
167Date: February 2008178Date: February 2008
168Contact: Ben Hutchings <bwh@kernel.org>179Contact: Ben Hutchings <bwh@kernel.org>
Documentation/ABI/testing/sysfs-class-typec+27−0
@@ -149,6 +149,19 @@ Description: · 148 unmodified lines
149 advertise to the partner. The currently used capabilities are in149 advertise to the partner. The currently used capabilities are in
150 brackets. Selection happens by writing to the file.150 brackets. Selection happens by writing to the file.
151 151
152What: /sys/class/typec/<port>/usb_capability
153Date: November 2024
154Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com>
155Description: Lists the supported USB Modes. The default USB mode that is used
156 next time with the Enter_USB Message is in brackets. The default
157 mode can be changed by writing to the file when supported by the
158 driver.
159
160 Valid values:
161 - usb2 (USB 2.0)
162 - usb3 (USB 3.2)
163 - usb4 (USB4)
164
152USB Type-C partner devices (eg. /sys/class/typec/port0-partner/)165USB Type-C partner devices (eg. /sys/class/typec/port0-partner/)
153 166
154What: /sys/class/typec/<port>-partner/accessory_mode167What: /sys/class/typec/<port>-partner/accessory_mode
@@ -220,6 +233,20 @@ Description: · 65 unmodified lines
220 directory exists, it will have an attribute file for every VDO233 directory exists, it will have an attribute file for every VDO
221 in Discover Identity command result.234 in Discover Identity command result.
222 235
236What: /sys/class/typec/<port>-partner/usb_mode
237Date: November 2024
238Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com>
239Description: The USB Modes that the partner device supports. The active mode
240 is displayed in brackets. The active USB mode can be changed by
241 writing to this file when the port driver is able to send Data
242 Reset Message to the partner. That requires USB Power Delivery
243 contract between the partner and the port.
244
245 Valid values:
246 - usb2 (USB 2.0)
247 - usb3 (USB 3.2)
248 - usb4 (USB4)
249
223USB Type-C cable devices (eg. /sys/class/typec/port0-cable/)250USB Type-C cable devices (eg. /sys/class/typec/port0-cable/)
224 251
225Note: Electronically Marked Cables will have a device also for one cable plug252Note: Electronically Marked Cables will have a device also for one cable plug
Documentation/ABI/testing/sysfs-class-watchdog+1−1
@@ -76,7 +76,7 @@ Description: · 75 unmodified lines
76 timeout when the pretimeout interrupt is delivered. Pretimeout76 timeout when the pretimeout interrupt is delivered. Pretimeout
77 is an optional feature.77 is an optional feature.
78 78
79What: /sys/class/watchdog/watchdogn/pretimeout_avaialable_governors79What: /sys/class/watchdog/watchdogn/pretimeout_available_governors
80Date: February 201780Date: February 2017
81Contact: Wim Van Sebroeck <wim@iguana.be>81Contact: Wim Van Sebroeck <wim@iguana.be>
82Description:82Description:
Documentation/ABI/testing/sysfs-fs-f2fs+11−2
@@ -311,10 +311,13 @@ Description: Do background GC aggressively when set. Set to 0 by default. · 310 unmodified lines
311 GC approach and turns SSR mode on.311 GC approach and turns SSR mode on.
312 gc urgent low(2): lowers the bar of checking I/O idling in312 gc urgent low(2): lowers the bar of checking I/O idling in
313 order to process outstanding discard commands and GC a313 order to process outstanding discard commands and GC a
314 little bit aggressively. uses cost benefit GC approach.314 little bit aggressively. always uses cost benefit GC approach,
315 and will override age-threshold GC approach if ATGC is enabled
316 at the same time.
315 gc urgent mid(3): does GC forcibly in a period of given317 gc urgent mid(3): does GC forcibly in a period of given
316 gc_urgent_sleep_time and executes a mid level of I/O idling check.318 gc_urgent_sleep_time and executes a mid level of I/O idling check.
317 uses cost benefit GC approach.319 always uses cost benefit GC approach, and will override
320 age-threshold GC approach if ATGC is enabled at the same time.
318 321
319What: /sys/fs/f2fs/<disk>/gc_urgent_sleep_time322What: /sys/fs/f2fs/<disk>/gc_urgent_sleep_time
320Date: August 2017323Date: August 2017
@@ -819,3 +822,9 @@ Description: It controls the valid block ratio threshold not to trigger excessiv · 498 unmodified lines
819 for zoned deivces. The initial value of it is 95(%). F2FS will stop the822 for zoned deivces. The initial value of it is 95(%). F2FS will stop the
820 background GC thread from intiating GC for sections having valid blocks823 background GC thread from intiating GC for sections having valid blocks
821 exceeding the ratio.824 exceeding the ratio.
825
826What: /sys/fs/f2fs/<disk>/max_read_extent_count
827Date: November 2024
828Contact: "Chao Yu" <chao@kernel.org>
829Description: It controls max read extent count for per-inode, the value of threshold
830 is 10240 by default.
Documentation/PCI/endpoint/pci-endpoint.rst+29−0
@@ -117,6 +117,35 @@ by the PCI endpoint function driver. · 116 unmodified lines
117 The PCI endpoint function driver should use pci_epc_mem_free_addr() to117 The PCI endpoint function driver should use pci_epc_mem_free_addr() to
118 free the memory space allocated using pci_epc_mem_alloc_addr().118 free the memory space allocated using pci_epc_mem_alloc_addr().
119 119
120* pci_epc_map_addr()
121
122 A PCI endpoint function driver should use pci_epc_map_addr() to map to a RC
123 PCI address the CPU address of local memory obtained with
124 pci_epc_mem_alloc_addr().
125
126* pci_epc_unmap_addr()
127
128 A PCI endpoint function driver should use pci_epc_unmap_addr() to unmap the
129 CPU address of local memory mapped to a RC address with pci_epc_map_addr().
130
131* pci_epc_mem_map()
132
133 A PCI endpoint controller may impose constraints on the RC PCI addresses that
134 can be mapped. The function pci_epc_mem_map() allows endpoint function
135 drivers to allocate and map controller memory while handling such
136 constraints. This function will determine the size of the memory that must be
137 allocated with pci_epc_mem_alloc_addr() for successfully mapping a RC PCI
138 address range. This function will also indicate the size of the PCI address
139 range that was actually mapped, which can be less than the requested size, as
140 well as the offset into the allocated memory to use for accessing the mapped
141 RC PCI address range.
142
143* pci_epc_mem_unmap()
144
145 A PCI endpoint function driver can use pci_epc_mem_unmap() to unmap and free
146 controller memory that was allocated and mapped using pci_epc_mem_map().
147
148
120Other EPC APIs149Other EPC APIs
121~~~~~~~~~~~~~~150~~~~~~~~~~~~~~
122 151
Documentation/PCI/index.rst+1−0
@@ -18,3 +18,4 @@ PCI Bus Subsystem · 17 unmodified lines
18 pcieaer-howto18 pcieaer-howto
19 endpoint/index19 endpoint/index
20 boot-interrupts20 boot-interrupts
21 tph
Documentation/PCI/pciebus-howto.rst+9−5
@@ -217,8 +217,12 @@ capability structure except the PCI Express capability structure, · 216 unmodified lines
217that is shared between many drivers including the service drivers.217that is shared between many drivers including the service drivers.
218RMW Capability accessors (pcie_capability_clear_and_set_word(),218RMW Capability accessors (pcie_capability_clear_and_set_word(),
219pcie_capability_set_word(), and pcie_capability_clear_word()) protect219pcie_capability_set_word(), and pcie_capability_clear_word()) protect
220a selected set of PCI Express Capability Registers (Link Control220a selected set of PCI Express Capability Registers:
221Register and Root Control Register). Any change to those registers221
222should be performed using RMW accessors to avoid problems due to222* Link Control Register
223concurrent updates. For the up-to-date list of protected registers,223* Root Control Register
224see pcie_capability_clear_and_set_word().224* Link Control 2 Register
225
226Any change to those registers should be performed using RMW accessors to
227avoid problems due to concurrent updates. For the up-to-date list of
228protected registers, see pcie_capability_clear_and_set_word().
Documentation/PCI/tph.rst+132−0
@@ -0,0 +1,132 @@
1.. SPDX-License-Identifier: GPL-2.0
2
3
4===========
5TPH Support
6===========
7
8:Copyright: 2024 Advanced Micro Devices, Inc.
9:Authors: - Eric van Tassell <eric.vantassell@amd.com>
10 - Wei Huang <wei.huang2@amd.com>
11
12
13Overview
14========
15
16TPH (TLP Processing Hints) is a PCIe feature that allows endpoint devices
17to provide optimization hints for requests that target memory space.
18These hints, in a format called Steering Tags (STs), are embedded in the
19requester's TLP headers, enabling the system hardware, such as the Root
20Complex, to better manage platform resources for these requests.
21
22For example, on platforms with TPH-based direct data cache injection
23support, an endpoint device can include appropriate STs in its DMA
24traffic to specify which cache the data should be written to. This allows
25the CPU core to have a higher probability of getting data from cache,
26potentially improving performance and reducing latency in data
27processing.
28
29
30How to Use TPH
31==============
32
33TPH is presented as an optional extended capability in PCIe. The Linux
34kernel handles TPH discovery during boot, but it is up to the device
35driver to request TPH enablement if it is to be utilized. Once enabled,
36the driver uses the provided API to obtain the Steering Tag for the
37target memory and to program the ST into the device's ST table.
38
39Enable TPH support in Linux
40---------------------------
41
42To support TPH, the kernel must be built with the CONFIG_PCIE_TPH option
43enabled.
44
45Manage TPH
46----------
47
48To enable TPH for a device, use the following function::
49
50 int pcie_enable_tph(struct pci_dev *pdev, int mode);
51
52This function enables TPH support for device with a specific ST mode.
53Current supported modes include:
54
55 * PCI_TPH_ST_NS_MODE - NO ST Mode
56 * PCI_TPH_ST_IV_MODE - Interrupt Vector Mode
57 * PCI_TPH_ST_DS_MODE - Device Specific Mode
58
59`pcie_enable_tph()` checks whether the requested mode is actually
60supported by the device before enabling. The device driver can figure out
61which TPH mode is supported and can be properly enabled based on the
62return value of `pcie_enable_tph()`.
63
64To disable TPH, use the following function::
65
66 void pcie_disable_tph(struct pci_dev *pdev);
67
68Manage ST
69---------
70
71Steering Tags are platform specific. PCIe spec does not specify where STs
72are from. Instead PCI Firmware Specification defines an ACPI _DSM method
73(see the `Revised _DSM for Cache Locality TPH Features ECN
74<https://members.pcisig.com/wg/PCI-SIG/document/15470>`_) for retrieving
75STs for a target memory of various properties. This method is what is
76supported in this implementation.
77
78To retrieve a Steering Tag for a target memory associated with a specific
79CPU, use the following function::
80
81 int pcie_tph_get_cpu_st(struct pci_dev *pdev, enum tph_mem_type type,
82 unsigned int cpu_uid, u16 *tag);
83
84The `type` argument is used to specify the memory type, either volatile
85or persistent, of the target memory. The `cpu_uid` argument specifies the
86CPU where the memory is associated to.
87
88After the ST value is retrieved, the device driver can use the following
89function to write the ST into the device::
90
91 int pcie_tph_set_st_entry(struct pci_dev *pdev, unsigned int index,
92 u16 tag);
93
94The `index` argument is the ST table entry index the ST tag will be
95written into. `pcie_tph_set_st_entry()` will figure out the proper
96location of ST table, either in the MSI-X table or in the TPH Extended
97Capability space, and write the Steering Tag into the ST entry pointed by
98the `index` argument.
99
100It is completely up to the driver to decide how to use these TPH
101functions. For example a network device driver can use the TPH APIs above
102to update the Steering Tag when interrupt affinity of a RX/TX queue has
103been changed. Here is a sample code for IRQ affinity notifier:
104
105.. code-block:: c
106
107 static void irq_affinity_notified(struct irq_affinity_notify *notify,
108 const cpumask_t *mask)
109 {
110 struct drv_irq *irq;
111 unsigned int cpu_id;
112 u16 tag;
113
114 irq = container_of(notify, struct drv_irq, affinity_notify);
115 cpumask_copy(irq->cpu_mask, mask);
116
117 /* Pick a right CPU as the target - here is just an example */
118 cpu_id = cpumask_first(irq->cpu_mask);
119
120 if (pcie_tph_get_cpu_st(irq->pdev, TPH_MEM_TYPE_VM, cpu_id,
121 &tag))
122 return;
123
124 if (pcie_tph_set_st_entry(irq->pdev, irq->msix_nr, tag))
125 return;
126 }
127
128Disable TPH system-wide
129-----------------------
130
131There is a kernel command line option available to control TPH feature:
132 * "notph": TPH will be disabled for all endpoint devices.
Documentation/admin-guide/LSM/apparmor.rst+5−2
@@ -18,8 +18,11 @@ set ``CONFIG_SECURITY_APPARMOR=y`` · 17 unmodified lines
18 18
19If AppArmor should be selected as the default security module then set::19If AppArmor should be selected as the default security module then set::
20 20
21 CONFIG_DEFAULT_SECURITY="apparmor"21 CONFIG_DEFAULT_SECURITY_APPARMOR=y
22 CONFIG_SECURITY_APPARMOR_BOOTPARAM_VALUE=122
23The CONFIG_LSM parameter manages the order and selection of LSMs.
24Specify apparmor as the first "major" module (e.g. AppArmor, SELinux, Smack)
25in the list.
23 26
24Build the kernel27Build the kernel
25 28
Documentation/admin-guide/kernel-parameters.rst+1−0
@@ -174,6 +174,7 @@ is applicable:: · 173 unmodified lines
174 SCSI Appropriate SCSI support is enabled.174 SCSI Appropriate SCSI support is enabled.
175 A lot of drivers have their options described inside175 A lot of drivers have their options described inside
176 the Documentation/scsi/ sub-directory.176 the Documentation/scsi/ sub-directory.
177 SDW SoundWire support is enabled.
177 SECURITY Different security models are enabled.178 SECURITY Different security models are enabled.
178 SELINUX SELinux support is enabled.179 SELINUX SELinux support is enabled.
179 SERIAL Serial support is enabled.180 SERIAL Serial support is enabled.
Documentation/admin-guide/kernel-parameters.txt+18−0
@@ -4686,6 +4686,10 @@ · 4685 unmodified lines
4686 nomio [S390] Do not use MIO instructions.4686 nomio [S390] Do not use MIO instructions.
4687 norid [S390] ignore the RID field and force use of4687 norid [S390] ignore the RID field and force use of
4688 one PCI domain per PCI function4688 one PCI domain per PCI function
4689 notph [PCIE] If the PCIE_TPH kernel config parameter
4690 is enabled, this kernel boot option can be used
4691 to disable PCIe TLP Processing Hints support
4692 system-wide.
4689 4693
4690 pcie_aspm= [PCIE] Forcibly enable or ignore PCIe Active State Power4694 pcie_aspm= [PCIE] Forcibly enable or ignore PCIe Active State Power
4691 Management.4695 Management.
@@ -6071,6 +6075,10 @@ · 1379 unmodified lines
6071 non-zero "wait" parameter. See weight_single6075 non-zero "wait" parameter. See weight_single
6072 and weight_many.6076 and weight_many.
6073 6077
6078 sdw_mclk_divider=[SDW]
6079 Specify the MCLK divider for Intel SoundWire buses in
6080 case the BIOS does not provide the clock rate properly.
6081
6074 skew_tick= [KNL,EARLY] Offset the periodic timer tick per cpu to mitigate6082 skew_tick= [KNL,EARLY] Offset the periodic timer tick per cpu to mitigate
6075 xtime_lock contention on larger systems, and/or RCU lock6083 xtime_lock contention on larger systems, and/or RCU lock
6076 contention on all systems with CONFIG_MAXSMP set.6084 contention on all systems with CONFIG_MAXSMP set.
@@ -6158,6 +6166,16 @@ · 81 unmodified lines
6158 For more information see Documentation/mm/slub.rst.6166 For more information see Documentation/mm/slub.rst.
6159 (slub_nomerge legacy name also accepted for now)6167 (slub_nomerge legacy name also accepted for now)
6160 6168
6169 slab_strict_numa [MM]
6170 Support memory policies on a per object level
6171 in the slab allocator. The default is for memory
6172 policies to be applied at the folio level when
6173 a new folio is needed or a partial folio is
6174 retrieved from the lists. Increases overhead
6175 in the slab fastpaths but gains more accurate
6176 NUMA kernel object placement which helps with slow
6177 interconnects in NUMA systems.
6178
6161 slram= [HW,MTD]6179 slram= [HW,MTD]
6162 6180
6163 smart2= [HW]6181 smart2= [HW]
Documentation/admin-guide/media/index.rst+5−0
@@ -20,6 +20,11 @@ Documentation/driver-api/media/index.rst · 19 unmodified lines
20 - for driver development information and Kernel APIs used by20 - for driver development information and Kernel APIs used by
21 media devices;21 media devices;
22 22
23Documentation/process/debugging/media_specific_debugging_guide.rst
24
25 - for advice about essential tools and techniques to debug drivers on this
26 subsystem
27
23.. toctree::28.. toctree::
24 :caption: Table of Contents29 :caption: Table of Contents
25 :maxdepth: 230 :maxdepth: 2
Documentation/admin-guide/sysctl/fs.rst+10−0
@@ -337,3 +337,13 @@ Each "watch" costs roughly 90 bytes on a 32-bit kernel, and roughly 160 bytes · 336 unmodified lines
337on a 64-bit one.337on a 64-bit one.
338The current default value for ``max_user_watches`` is 4% of the338The current default value for ``max_user_watches`` is 4% of the
339available low memory, divided by the "watch" cost in bytes.339available low memory, divided by the "watch" cost in bytes.
340
3415. /proc/sys/fs/fuse - Configuration options for FUSE filesystems
342=====================================================================
343
344This directory contains the following configuration options for FUSE
345filesystems:
346
347``/proc/sys/fs/fuse/max_pages_limit`` is a read/write file for
348setting/getting the maximum number of pages that can be used for servicing
349requests in FUSE.
Documentation/admin-guide/sysctl/kernel.rst+9−0
@@ -401,6 +401,15 @@ The upper bound on the number of tasks that are checked. · 400 unmodified lines
401This file shows up if ``CONFIG_DETECT_HUNG_TASK`` is enabled.401This file shows up if ``CONFIG_DETECT_HUNG_TASK`` is enabled.
402 402
403 403
404hung_task_detect_count
405======================
406
407Indicates the total number of tasks that have been detected as hung since
408the system boot.
409
410This file shows up if ``CONFIG_DETECT_HUNG_TASK`` is enabled.
411
412
404hung_task_timeout_secs413hung_task_timeout_secs
405======================414======================
406 415
Documentation/arch/arm64/silicon-errata.rst+2−0
@@ -258,6 +258,8 @@ stable kernels. · 257 unmodified lines
258| Hisilicon | Hip{08,09,10,10C| #162001900 | N/A |258| Hisilicon | Hip{08,09,10,10C| #162001900 | N/A |
259| | ,11} SMMU PMCG | | |259| | ,11} SMMU PMCG | | |
260+----------------+-----------------+-----------------+-----------------------------+260+----------------+-----------------+-----------------+-----------------------------+
261| Hisilicon | Hip09 | #162100801 | HISILICON_ERRATUM_162100801 |
262+----------------+-----------------+-----------------+-----------------------------+
261+----------------+-----------------+-----------------+-----------------------------+263+----------------+-----------------+-----------------+-----------------------------+
262| Qualcomm Tech. | Kryo/Falkor v1 | E1003 | QCOM_FALKOR_ERRATUM_1003 |264| Qualcomm Tech. | Kryo/Falkor v1 | E1003 | QCOM_FALKOR_ERRATUM_1003 |
263+----------------+-----------------+-----------------+-----------------------------+265+----------------+-----------------+-----------------+-----------------------------+
Documentation/arch/riscv/hwprobe.rst+19−0
@@ -239,6 +239,9 @@ The following keys are defined: · 238 unmodified lines
239 ratified in commit 98918c844281 ("Merge pull request #1217 from239 ratified in commit 98918c844281 ("Merge pull request #1217 from
240 riscv/zawrs") of riscv-isa-manual.240 riscv/zawrs") of riscv-isa-manual.
241 241
242 * :c:macro:`RISCV_HWPROBE_EXT_SUPM`: The Supm extension is supported as
243 defined in version 1.0 of the RISC-V Pointer Masking extensions.
244
242* :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: Deprecated. Returns similar values to245* :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: Deprecated. Returns similar values to
243 :c:macro:`RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF`, but the key was246 :c:macro:`RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF`, but the key was
244 mistakenly classified as a bitmask rather than a value.247 mistakenly classified as a bitmask rather than a value.
@@ -274,3 +277,19 @@ The following keys are defined: · 29 unmodified lines
274 represent the highest userspace virtual address usable.277 represent the highest userspace virtual address usable.
275 278
276* :c:macro:`RISCV_HWPROBE_KEY_TIME_CSR_FREQ`: Frequency (in Hz) of `time CSR`.279* :c:macro:`RISCV_HWPROBE_KEY_TIME_CSR_FREQ`: Frequency (in Hz) of `time CSR`.
280
281* :c:macro:`RISCV_HWPROBE_KEY_MISALIGNED_VECTOR_PERF`: An enum value describing the
282 performance of misaligned vector accesses on the selected set of processors.
283
284 * :c:macro:`RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN`: The performance of misaligned
285 vector accesses is unknown.
286
287 * :c:macro:`RISCV_HWPROBE_MISALIGNED_VECTOR_SLOW`: 32-bit misaligned accesses using vector
288 registers are slower than the equivalent quantity of byte accesses via vector registers.
289 Misaligned accesses may be supported directly in hardware, or trapped and emulated by software.
290
291 * :c:macro:`RISCV_HWPROBE_MISALIGNED_VECTOR_FAST`: 32-bit misaligned accesses using vector
292 registers are faster than the equivalent quantity of byte accesses via vector registers.
293
294 * :c:macro:`RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED`: Misaligned vector accesses are
295 not supported at all and will generate a misaligned address fault.
Documentation/arch/riscv/uabi.rst+16−0
@@ -68,3 +68,19 @@ Misaligned accesses · 67 unmodified lines
68Misaligned scalar accesses are supported in userspace, but they may perform68Misaligned scalar accesses are supported in userspace, but they may perform
69poorly. Misaligned vector accesses are only supported if the Zicclsm extension69poorly. Misaligned vector accesses are only supported if the Zicclsm extension
70is supported.70is supported.
71
72Pointer masking
73---------------
74
75Support for pointer masking in userspace (the Supm extension) is provided via
76the ``PR_SET_TAGGED_ADDR_CTRL`` and ``PR_GET_TAGGED_ADDR_CTRL`` ``prctl()``
77operations. Pointer masking is disabled by default. To enable it, userspace
78must call ``PR_SET_TAGGED_ADDR_CTRL`` with the ``PR_PMLEN`` field set to the
79number of mask/tag bits needed by the application. ``PR_PMLEN`` is interpreted
80as a lower bound; if the kernel is unable to satisfy the request, the
81``PR_SET_TAGGED_ADDR_CTRL`` operation will fail. The actual number of tag bits
82is returned in ``PR_PMLEN`` by the ``PR_GET_TAGGED_ADDR_CTRL`` operation.
83
84Additionally, when pointer masking is enabled (``PR_PMLEN`` is greater than 0),
85a tagged address ABI is supported, with the same interface and behavior as
86documented for AArch64 (Documentation/arch/arm64/tagged-address-abi.rst).
Documentation/arch/x86/boot.rst+13−4
@@ -896,10 +896,19 @@ Offset/size: 0x260/4 · 895 unmodified lines
896 896
897 The kernel runtime start address is determined by the following algorithm::897 The kernel runtime start address is determined by the following algorithm::
898 898
899 if (relocatable_kernel)899 if (relocatable_kernel) {
900 runtime_start = align_up(load_address, kernel_alignment)900 if (load_address < pref_address)
901 else901 load_address = pref_address;
902 runtime_start = pref_address902 runtime_start = align_up(load_address, kernel_alignment);
903 } else {
904 runtime_start = pref_address;
905 }
906
907Hence the necessary memory window location and size can be estimated by
908a boot loader as::
909
910 memory_window_start = runtime_start;
911 memory_window_size = init_size;
903 912
904============ ===============913============ ===============
905Field name: handover_offset914Field name: handover_offset
Documentation/core-api/gfp_mask-from-fs-io.rst+11−9
@@ -55,14 +55,16 @@ scope. · 54 unmodified lines
55What about __vmalloc(GFP_NOFS)55What about __vmalloc(GFP_NOFS)
56==============================56==============================
57 57
58vmalloc doesn't support GFP_NOFS semantic because there are hardcoded58Since v5.17, and specifically after the commit 451769ebb7e79 ("mm/vmalloc:
59GFP_KERNEL allocations deep inside the allocator which are quite non-trivial59alloc GFP_NO{FS,IO} for vmalloc"), GFP_NOFS/GFP_NOIO are now supported in
60to fix up. That means that calling ``vmalloc`` with GFP_NOFS/GFP_NOIO is60``[k]vmalloc`` by implicitly using scope API.
61almost always a bug. The good news is that the NOFS/NOIO semantic can be61
62achieved by the scope API.62In earlier kernels ``vmalloc`` didn't support GFP_NOFS semantic because there
63were hardcoded GFP_KERNEL allocations deep inside the allocator. That means
64that calling ``vmalloc`` with GFP_NOFS/GFP_NOIO was almost always a bug.
63 65
64In the ideal world, upper layers should already mark dangerous contexts66In the ideal world, upper layers should already mark dangerous contexts
65and so no special care is required and vmalloc should be called without67and so no special care is required and ``vmalloc`` should be called without any
66any problems. Sometimes if the context is not really clear or there are68problems. Sometimes if the context is not really clear or there are layering
67layering violations then the recommended way around that is to wrap ``vmalloc``69violations then the recommended way around that (on pre-v5.17 kernels) is to
68by the scope API with a comment explaining the problem.70wrap ``vmalloc`` by the scope API with a comment explaining the problem.
Documentation/core-api/index.rst+1−0
@@ -52,6 +52,7 @@ Library functionality that is used throughout the kernel. · 51 unmodified lines
52 wrappers/atomic_bitops52 wrappers/atomic_bitops
53 floating-point53 floating-point
54 union_find54 union_find
55 min_heap
55 56
56Low level entry and exit57Low level entry and exit
57========================58========================
Documentation/core-api/min_heap.rst+300−0
@@ -0,0 +1,300 @@
1.. SPDX-License-Identifier: GPL-2.0
2
3============
4Min Heap API
5============
6
7Introduction
8============
9
10The Min Heap API provides a set of functions and macros for managing min-heaps
11in the Linux kernel. A min-heap is a binary tree structure where the value of
12each node is less than or equal to the values of its children, ensuring that
13the smallest element is always at the root.
14
15This document provides a guide to the Min Heap API, detailing how to define and
16use min-heaps. Users should not directly call functions with **__min_heap_*()**
17prefixes, but should instead use the provided macro wrappers.
18
19In addition to the standard version of the functions, the API also includes a
20set of inline versions for performance-critical scenarios. These inline
21functions have the same names as their non-inline counterparts but include an
22**_inline** suffix. For example, **__min_heap_init_inline** and its
23corresponding macro wrapper **min_heap_init_inline**. The inline versions allow
24custom comparison and swap functions to be called directly, rather than through
25indirect function calls. This can significantly reduce overhead, especially
26when CONFIG_MITIGATION_RETPOLINE is enabled, as indirect function calls become
27more expensive. As with the non-inline versions, it is important to use the
28macro wrappers for inline functions instead of directly calling the functions
29themselves.
30
31Data Structures
32===============
33
34Min-Heap Definition
35-------------------
36
37The core data structure for representing a min-heap is defined using the
38**MIN_HEAP_PREALLOCATED** and **DEFINE_MIN_HEAP** macros. These macros allow
39you to define a min-heap with a preallocated buffer or dynamically allocated
40memory.
41
42Example:
43
44.. code-block:: c
45
46 #define MIN_HEAP_PREALLOCATED(_type, _name, _nr)
47 struct _name {
48 int nr; /* Number of elements in the heap */
49 int size; /* Maximum number of elements that can be held */
50 _type *data; /* Pointer to the heap data */
51 _type preallocated[_nr]; /* Static preallocated array */
52 }
53
54 #define DEFINE_MIN_HEAP(_type, _name) MIN_HEAP_PREALLOCATED(_type, _name, 0)
55
56A typical heap structure will include a counter for the number of elements
57(`nr`), the maximum capacity of the heap (`size`), and a pointer to an array of
58elements (`data`). Optionally, you can specify a static array for preallocated
59heap storage using **MIN_HEAP_PREALLOCATED**.
60
61Min Heap Callbacks
62------------------
63
64The **struct min_heap_callbacks** provides customization options for ordering
65elements in the heap and swapping them. It contains two function pointers:
66
67.. code-block:: c
68
69 struct min_heap_callbacks {
70 bool (*less)(const void *lhs, const void *rhs, void *args);
71 void (*swp)(void *lhs, void *rhs, void *args);
72 };
73
74- **less** is the comparison function used to establish the order of elements.
75- **swp** is a function for swapping elements in the heap. If swp is set to
76 NULL, the default swap function will be used, which swaps the elements based on their size
77
78Macro Wrappers
79==============
80
81The following macro wrappers are provided for interacting with the heap in a
82user-friendly manner. Each macro corresponds to a function that operates on the
83heap, and they abstract away direct calls to internal functions.
84
85Each macro accepts various parameters that are detailed below.
86
87Heap Initialization
88--------------------
89
90.. code-block:: c
91
92 min_heap_init(heap, data, size);
93
94- **heap**: A pointer to the min-heap structure to be initialized.
95- **data**: A pointer to the buffer where the heap elements will be stored. If
96 `NULL`, the preallocated buffer within the heap structure will be used.
97- **size**: The maximum number of elements the heap can hold.
98
99This macro initializes the heap, setting its initial state. If `data` is
100`NULL`, the preallocated memory inside the heap structure will be used for
101storage. Otherwise, the user-provided buffer is used. The operation is **O(1)**.
102
103**Inline Version:** min_heap_init_inline(heap, data, size)
104
105Accessing the Top Element
106-------------------------
107
108.. code-block:: c
109
110 element = min_heap_peek(heap);
111
112- **heap**: A pointer to the min-heap from which to retrieve the smallest
113 element.
114
115This macro returns a pointer to the smallest element (the root) of the heap, or
116`NULL` if the heap is empty. The operation is **O(1)**.
117
118**Inline Version:** min_heap_peek_inline(heap)
119
120Heap Insertion
121--------------
122
123.. code-block:: c
124
125 success = min_heap_push(heap, element, callbacks, args);
126
127- **heap**: A pointer to the min-heap into which the element should be inserted.
128- **element**: A pointer to the element to be inserted into the heap.
129- **callbacks**: A pointer to a `struct min_heap_callbacks` providing the
130 `less` and `swp` functions.
131- **args**: Optional arguments passed to the `less` and `swp` functions.
132
133This macro inserts an element into the heap. It returns `true` if the insertion
134was successful and `false` if the heap is full. The operation is **O(log n)**.
135
136**Inline Version:** min_heap_push_inline(heap, element, callbacks, args)
137
138Heap Removal
139------------
140
141.. code-block:: c
142
143 success = min_heap_pop(heap, callbacks, args);
144
145- **heap**: A pointer to the min-heap from which to remove the smallest element.
146- **callbacks**: A pointer to a `struct min_heap_callbacks` providing the
147 `less` and `swp` functions.
148- **args**: Optional arguments passed to the `less` and `swp` functions.
149
150This macro removes the smallest element (the root) from the heap. It returns
151`true` if the element was successfully removed, or `false` if the heap is
152empty. The operation is **O(log n)**.
153
154**Inline Version:** min_heap_pop_inline(heap, callbacks, args)
155
156Heap Maintenance
157----------------
158
159You can use the following macros to maintain the heap's structure:
160
161.. code-block:: c
162
163 min_heap_sift_down(heap, pos, callbacks, args);
164
165- **heap**: A pointer to the min-heap.
166- **pos**: The index from which to start sifting down.
167- **callbacks**: A pointer to a `struct min_heap_callbacks` providing the
168 `less` and `swp` functions.
169- **args**: Optional arguments passed to the `less` and `swp` functions.
170
171This macro restores the heap property by moving the element at the specified
172index (`pos`) down the heap until it is in the correct position. The operation
173is **O(log n)**.
174
175**Inline Version:** min_heap_sift_down_inline(heap, pos, callbacks, args)
176
177.. code-block:: c
178
179 min_heap_sift_up(heap, idx, callbacks, args);
180
181- **heap**: A pointer to the min-heap.
182- **idx**: The index of the element to sift up.
183- **callbacks**: A pointer to a `struct min_heap_callbacks` providing the
184 `less` and `swp` functions.
185- **args**: Optional arguments passed to the `less` and `swp` functions.
186
187This macro restores the heap property by moving the element at the specified
188index (`idx`) up the heap. The operation is **O(log n)**.
189
190**Inline Version:** min_heap_sift_up_inline(heap, idx, callbacks, args)
191
192.. code-block:: c
193
194 min_heapify_all(heap, callbacks, args);
195
196- **heap**: A pointer to the min-heap.
197- **callbacks**: A pointer to a `struct min_heap_callbacks` providing the
198 `less` and `swp` functions.
199- **args**: Optional arguments passed to the `less` and `swp` functions.
200
201This macro ensures that the entire heap satisfies the heap property. It is
202called when the heap is built from scratch or after many modifications. The
203operation is **O(n)**.
204
205**Inline Version:** min_heapify_all_inline(heap, callbacks, args)
206
207Removing Specific Elements
208--------------------------
209
210.. code-block:: c
211
212 success = min_heap_del(heap, idx, callbacks, args);
213
214- **heap**: A pointer to the min-heap.
215- **idx**: The index of the element to delete.
216- **callbacks**: A pointer to a `struct min_heap_callbacks` providing the
217 `less` and `swp` functions.
218- **args**: Optional arguments passed to the `less` and `swp` functions.
219
220This macro removes an element at the specified index (`idx`) from the heap and
221restores the heap property. The operation is **O(log n)**.
222
223**Inline Version:** min_heap_del_inline(heap, idx, callbacks, args)
224
225Other Utilities
226===============
227
228- **min_heap_full(heap)**: Checks whether the heap is full.
229 Complexity: **O(1)**.
230
231.. code-block:: c
232
233 bool full = min_heap_full(heap);
234
235- `heap`: A pointer to the min-heap to check.
236
237This macro returns `true` if the heap is full, otherwise `false`.
238
239**Inline Version:** min_heap_full_inline(heap)
240
241- **min_heap_empty(heap)**: Checks whether the heap is empty.
242 Complexity: **O(1)**.
243
244.. code-block:: c
245
246 bool empty = min_heap_empty(heap);
247
248- `heap`: A pointer to the min-heap to check.
249
250This macro returns `true` if the heap is empty, otherwise `false`.
251
252**Inline Version:** min_heap_empty_inline(heap)
253
254Example Usage
255=============
256
257An example usage of the min-heap API would involve defining a heap structure,
258initializing it, and inserting and removing elements as needed.
259
260.. code-block:: c
261
262 #include <linux/min_heap.h>
263
264 int my_less_function(const void *lhs, const void *rhs, void *args) {
265 return (*(int *)lhs < *(int *)rhs);
266 }
267
268 struct min_heap_callbacks heap_cb = {
269 .less = my_less_function, /* Comparison function for heap order */
270 .swp = NULL, /* Use default swap function */
271 };
272
273 void example_usage(void) {
274 /* Pre-populate the buffer with elements */
275 int buffer[5] = {5, 2, 8, 1, 3};
276 /* Declare a min-heap */
277 DEFINE_MIN_HEAP(int, my_heap);
278
279 /* Initialize the heap with preallocated buffer and size */
280 min_heap_init(&my_heap, buffer, 5);
281
282 /* Build the heap using min_heapify_all */
283 my_heap.nr = 5; /* Set the number of elements in the heap */
284 min_heapify_all(&my_heap, &heap_cb, NULL);
285
286 /* Peek at the top element (should be 1 in this case) */
287 int *top = min_heap_peek(&my_heap);
288 pr_info("Top element: %d\n", *top);
289
290 /* Pop the top element (1) and get the new top (2) */
291 min_heap_pop(&my_heap, &heap_cb, NULL);
292 top = min_heap_peek(&my_heap);
293 pr_info("New top element: %d\n", *top);
294
295 /* Insert a new element (0) and recheck the top */
296 int new_element = 0;
297 min_heap_push(&my_heap, &new_element, &heap_cb, NULL);
298 top = min_heap_peek(&my_heap);
299 pr_info("Top element after insertion: %d\n", *top);
300 }
Documentation/core-api/symbol-namespaces.rst+4−4
@@ -46,7 +46,7 @@ Please note that due to macro expansion that argument needs to be a · 45 unmodified lines
46preprocessor symbol. E.g. to export the symbol ``usb_stor_suspend`` into the46preprocessor symbol. E.g. to export the symbol ``usb_stor_suspend`` into the
47namespace ``USB_STORAGE``, use::47namespace ``USB_STORAGE``, use::
48 48
49 EXPORT_SYMBOL_NS(usb_stor_suspend, USB_STORAGE);49 EXPORT_SYMBOL_NS(usb_stor_suspend, "USB_STORAGE");
50 50
51The corresponding ksymtab entry struct ``kernel_symbol`` will have the member51The corresponding ksymtab entry struct ``kernel_symbol`` will have the member
52``namespace`` set accordingly. A symbol that is exported without a namespace will52``namespace`` set accordingly. A symbol that is exported without a namespace will
@@ -68,7 +68,7 @@ is to define the default namespace in the ``Makefile`` of the subsystem. E.g. to · 15 unmodified lines
68export all symbols defined in usb-common into the namespace USB_COMMON, add a68export all symbols defined in usb-common into the namespace USB_COMMON, add a
69line like this to drivers/usb/common/Makefile::69line like this to drivers/usb/common/Makefile::
70 70
71 ccflags-y += -DDEFAULT_SYMBOL_NAMESPACE=USB_COMMON71 ccflags-y += -DDEFAULT_SYMBOL_NAMESPACE='"USB_COMMON"'
72 72
73That will affect all EXPORT_SYMBOL() and EXPORT_SYMBOL_GPL() statements. A73That will affect all EXPORT_SYMBOL() and EXPORT_SYMBOL_GPL() statements. A
74symbol exported with EXPORT_SYMBOL_NS() while this definition is present, will74symbol exported with EXPORT_SYMBOL_NS() while this definition is present, will
@@ -79,7 +79,7 @@ A second option to define the default namespace is directly in the compilation · 4 unmodified lines
79unit as preprocessor statement. The above example would then read::79unit as preprocessor statement. The above example would then read::
80 80
81 #undef DEFAULT_SYMBOL_NAMESPACE81 #undef DEFAULT_SYMBOL_NAMESPACE
82 #define DEFAULT_SYMBOL_NAMESPACE USB_COMMON82 #define DEFAULT_SYMBOL_NAMESPACE "USB_COMMON"
83 83
84within the corresponding compilation unit before any EXPORT_SYMBOL macro is84within the corresponding compilation unit before any EXPORT_SYMBOL macro is
85used.85used.
@@ -94,7 +94,7 @@ for the namespaces it uses symbols from. E.g. a module using the · 8 unmodified lines
94usb_stor_suspend symbol from above, needs to import the namespace USB_STORAGE94usb_stor_suspend symbol from above, needs to import the namespace USB_STORAGE
95using a statement like::95using a statement like::
96 96
97 MODULE_IMPORT_NS(USB_STORAGE);97 MODULE_IMPORT_NS("USB_STORAGE");
98 98
99This will create a ``modinfo`` tag in the module for each imported namespace.99This will create a ``modinfo`` tag in the module for each imported namespace.
100This has the side effect, that the imported namespaces of a module can be100This has the side effect, that the imported namespaces of a module can be
Documentation/dev-tools/autofdo.rst+168−0
@@ -0,0 +1,168 @@
1.. SPDX-License-Identifier: GPL-2.0
2
3===================================
4Using AutoFDO with the Linux kernel
5===================================
6
7This enables AutoFDO build support for the kernel when using
8the Clang compiler. AutoFDO (Auto-Feedback-Directed Optimization)
9is a type of profile-guided optimization (PGO) used to enhance the
10performance of binary executables. It gathers information about the
11frequency of execution of various code paths within a binary using
12hardware sampling. This data is then used to guide the compiler's
13optimization decisions, resulting in a more efficient binary. AutoFDO
14is a powerful optimization technique, and data indicates that it can
15significantly improve kernel performance. It's especially beneficial
16for workloads affected by front-end stalls.
17
18For AutoFDO builds, unlike non-FDO builds, the user must supply a
19profile. Acquiring an AutoFDO profile can be done in several ways.
20AutoFDO profiles are created by converting hardware sampling using
21the "perf" tool. It is crucial that the workload used to create these
22perf files is representative; they must exhibit runtime
23characteristics similar to the workloads that are intended to be
24optimized. Failure to do so will result in the compiler optimizing
25for the wrong objective.
26
27The AutoFDO profile often encapsulates the program's behavior. If the
28performance-critical codes are architecture-independent, the profile
29can be applied across platforms to achieve performance gains. For
30instance, using the profile generated on Intel architecture to build
31a kernel for AMD architecture can also yield performance improvements.
32
33There are two methods for acquiring a representative profile:
34(1) Sample real workloads using a production environment.
35(2) Generate the profile using a representative load test.
36When enabling the AutoFDO build configuration without providing an
37AutoFDO profile, the compiler only modifies the dwarf information in
38the kernel without impacting runtime performance. It's advisable to
39use a kernel binary built with the same AutoFDO configuration to
40collect the perf profile. While it's possible to use a kernel built
41with different options, it may result in inferior performance.
42
43One can collect profiles using AutoFDO build for the previous kernel.
44AutoFDO employs relative line numbers to match the profiles, offering
45some tolerance for source changes. This mode is commonly used in a
46production environment for profile collection.
47
48In a profile collection based on a load test, the AutoFDO collection
49process consists of the following steps:
50
51#. Initial build: The kernel is built with AutoFDO options
52 without a profile.
53
54#. Profiling: The above kernel is then run with a representative
55 workload to gather execution frequency data. This data is
56 collected using hardware sampling, via perf. AutoFDO is most
57 effective on platforms supporting advanced PMU features like
58 LBR on Intel machines.
59
60#. AutoFDO profile generation: Perf output file is converted to
61 the AutoFDO profile via offline tools.
62
63The support requires a Clang compiler LLVM 17 or later.
64
65Preparation
66===========
67
68Configure the kernel with::
69
70 CONFIG_AUTOFDO_CLANG=y
71
72Customization
73=============
74
75The default CONFIG_AUTOFDO_CLANG setting covers kernel space objects for
76AutoFDO builds. One can, however, enable or disable AutoFDO build for
77individual files and directories by adding a line similar to the following
78to the respective kernel Makefile:
79
80- For enabling a single file (e.g. foo.o) ::
81
82 AUTOFDO_PROFILE_foo.o := y
83
84- For enabling all files in one directory ::
85
86 AUTOFDO_PROFILE := y
87
88- For disabling one file ::
89
90 AUTOFDO_PROFILE_foo.o := n
91
92- For disabling all files in one directory ::
93
94 AUTOFDO_PROFILE := n
95
96Workflow
97========
98
99Here is an example workflow for AutoFDO kernel:
100
1011) Build the kernel on the host machine with LLVM enabled,
102 for example, ::
103
104 $ make menuconfig LLVM=1
105
106 Turn on AutoFDO build config::
107
108 CONFIG_AUTOFDO_CLANG=y
109
110 With a configuration that with LLVM enabled, use the following command::
111
112 $ scripts/config -e AUTOFDO_CLANG
113
114 After getting the config, build with ::
115
116 $ make LLVM=1
117
1182) Install the kernel on the test machine.
119
1203) Run the load tests. The '-c' option in perf specifies the sample
121 event period. We suggest using a suitable prime number, like 500009,
122 for this purpose.
123
124 - For Intel platforms::
125
126 $ perf record -e BR_INST_RETIRED.NEAR_TAKEN:k -a -N -b -c <count> -o <perf_file> -- <loadtest>
127
128 - For AMD platforms:
129
130 The supported systems are: Zen3 with BRS, or Zen4 with amd_lbr_v2. To check,
131
132 For Zen3::
133
134 $ cat proc/cpuinfo | grep " brs"
135
136 For Zen4::
137
138 $ cat proc/cpuinfo | grep amd_lbr_v2
139
140 The following command generated the perf data file::
141
142 $ perf record --pfm-events RETIRED_TAKEN_BRANCH_INSTRUCTIONS:k -a -N -b -c <count> -o <perf_file> -- <loadtest>
143
1444) (Optional) Download the raw perf file to the host machine.
145
1465) To generate an AutoFDO profile, two offline tools are available:
147 create_llvm_prof and llvm_profgen. The create_llvm_prof tool is part
148 of the AutoFDO project and can be found on GitHub
149 (https://github.com/google/autofdo), version v0.30.1 or later.
150 The llvm_profgen tool is included in the LLVM compiler itself. It's
151 important to note that the version of llvm_profgen doesn't need to match
152 the version of Clang. It needs to be the LLVM 19 release of Clang
153 or later, or just from the LLVM trunk. ::
154
155 $ llvm-profgen --kernel --binary=<vmlinux> --perfdata=<perf_file> -o <profile_file>
156
157 or ::
158
159 $ create_llvm_prof --binary=<vmlinux> --profile=<perf_file> --format=extbinary --out=<profile_file>
160
161 Note that multiple AutoFDO profile files can be merged into one via::
162
163 $ llvm-profdata merge -o <profile_file> <profile_1> <profile_2> ... <profile_n>
164
1656) Rebuild the kernel using the AutoFDO profile file with the same config as step 1,
166 (Note CONFIG_AUTOFDO_CLANG needs to be enabled)::
167
168 $ make LLVM=1 CLANG_AUTOFDO_PROFILE=<profile_file>
Documentation/dev-tools/coccinelle.rst+7−15
@@ -250,25 +250,17 @@ variables for .cocciconfig is as follows: · 249 unmodified lines
250- Your directory from which spatch is called is processed next250- Your directory from which spatch is called is processed next
251- The directory provided with the ``--dir`` option is processed last, if used251- The directory provided with the ``--dir`` option is processed last, if used
252 252
253Since coccicheck runs through make, it naturally runs from the kernel
254proper dir; as such the second rule above would be implied for picking up a
255.cocciconfig when using ``make coccicheck``.
256
257``make coccicheck`` also supports using M= targets. If you do not supply253``make coccicheck`` also supports using M= targets. If you do not supply
258any M= target, it is assumed you want to target the entire kernel.254any M= target, it is assumed you want to target the entire kernel.
259The kernel coccicheck script has::255The kernel coccicheck script has::
260 256
261 if [ "$KBUILD_EXTMOD" = "" ] ; then257 OPTIONS="--dir $srcroot $COCCIINCLUDE"
262 OPTIONS="--dir $srctree $COCCIINCLUDE"258
263 else259Here, $srcroot refers to the source directory of the target: it points to the
264 OPTIONS="--dir $KBUILD_EXTMOD $COCCIINCLUDE"260external module's source directory when M= used, and otherwise, to the kernel
265 fi261source directory. The third rule ensures the spatch reads the .cocciconfig from
266 262the target directory, allowing external modules to have their own .cocciconfig
267KBUILD_EXTMOD is set when an explicit target with M= is used. For both cases263file.
268the spatch ``--dir`` argument is used, as such third rule applies when whether
269M= is used or not, and when M= is used the target directory can have its own
270.cocciconfig file. When M= is not passed as an argument to coccicheck the
271target directory is the same as the directory from where spatch was called.
272 264
273If not using the kernel's coccicheck target, keep the above precedence265If not using the kernel's coccicheck target, keep the above precedence
274order logic of .cocciconfig reading. If using the kernel's coccicheck target,266order logic of .cocciconfig reading. If using the kernel's coccicheck target,
Documentation/dev-tools/index.rst+2−0
@@ -34,6 +34,8 @@ Documentation/dev-tools/testing-overview.rst · 33 unmodified lines
34 ktap34 ktap
35 checkuapi35 checkuapi
36 gpio-sloppy-logic-analyzer36 gpio-sloppy-logic-analyzer
37 autofdo
38 propeller
37 39
38 40
39.. only:: subproject and html41.. only:: subproject and html
Documentation/dev-tools/propeller.rst+162−0
@@ -0,0 +1,162 @@
1.. SPDX-License-Identifier: GPL-2.0
2
3=====================================
4Using Propeller with the Linux kernel
5=====================================
6
7This enables Propeller build support for the kernel when using Clang
8compiler. Propeller is a profile-guided optimization (PGO) method used
9to optimize binary executables. Like AutoFDO, it utilizes hardware
10sampling to gather information about the frequency of execution of
11different code paths within a binary. Unlike AutoFDO, this information
12is then used right before linking phase to optimize (among others)
13block layout within and across functions.
14
15A few important notes about adopting Propeller optimization:
16
17#. Although it can be used as a standalone optimization step, it is
18 strongly recommended to apply Propeller on top of AutoFDO,
19 AutoFDO+ThinLTO or Instrument FDO. The rest of this document
20 assumes this paradigm.
21
22#. Propeller uses another round of profiling on top of
23 AutoFDO/AutoFDO+ThinLTO/iFDO. The whole build process involves
24 "build-afdo - train-afdo - build-propeller - train-propeller -
25 build-optimized".
26
27#. Propeller requires LLVM 19 release or later for Clang/Clang++
28 and the linker(ld.lld).
29
30#. In addition to LLVM toolchain, Propeller requires a profiling
31 conversion tool: https://github.com/google/autofdo with a release
32 after v0.30.1: https://github.com/google/autofdo/releases/tag/v0.30.1.
33
34The Propeller optimization process involves the following steps:
35
36#. Initial building: Build the AutoFDO or AutoFDO+ThinLTO binary as
37 you would normally do, but with a set of compile-time / link-time
38 flags, so that a special metadata section is created within the
39 kernel binary. The special section is only intend to be used by the
40 profiling tool, it is not part of the runtime image, nor does it
41 change kernel run time text sections.
42
43#. Profiling: The above kernel is then run with a representative
44 workload to gather execution frequency data. This data is collected
45 using hardware sampling, via perf. Propeller is most effective on
46 platforms supporting advanced PMU features like LBR on Intel
47 machines. This step is the same as profiling the kernel for AutoFDO
48 (the exact perf parameters can be different).
49
50#. Propeller profile generation: Perf output file is converted to a
51 pair of Propeller profiles via an offline tool.
52
53#. Optimized build: Build the AutoFDO or AutoFDO+ThinLTO optimized
54 binary as you would normally do, but with a compile-time /
55 link-time flag to pick up the Propeller compile time and link time
56 profiles. This build step uses 3 profiles - the AutoFDO profile,
57 the Propeller compile-time profile and the Propeller link-time
58 profile.
59
60#. Deployment: The optimized kernel binary is deployed and used
61 in production environments, providing improved performance
62 and reduced latency.
63
64Preparation
65===========
66
67Configure the kernel with::
68
69 CONFIG_AUTOFDO_CLANG=y
70 CONFIG_PROPELLER_CLANG=y
71
72Customization
73=============
74
75The default CONFIG_PROPELLER_CLANG setting covers kernel space objects
76for Propeller builds. One can, however, enable or disable Propeller build
77for individual files and directories by adding a line similar to the
78following to the respective kernel Makefile:
79
80- For enabling a single file (e.g. foo.o)::
81
82 PROPELLER_PROFILE_foo.o := y
83
84- For enabling all files in one directory::
85
86 PROPELLER_PROFILE := y
87
88- For disabling one file::
89
90 PROPELLER_PROFILE_foo.o := n
91
92- For disabling all files in one directory::
93
94 PROPELLER__PROFILE := n
95
96
97Workflow
98========
99
100Here is an example workflow for building an AutoFDO+Propeller kernel:
101
1021) Assuming an AutoFDO profile is already collected following
103 instructions in the AutoFDO document, build the kernel on the host
104 machine, with AutoFDO and Propeller build configs ::
105
106 CONFIG_AUTOFDO_CLANG=y
107 CONFIG_PROPELLER_CLANG=y
108
109 and ::
110
111 $ make LLVM=1 CLANG_AUTOFDO_PROFILE=<autofdo-profile-name>
112
1132) Install the kernel on the test machine.
114
1153) Run the load tests. The '-c' option in perf specifies the sample
116 event period. We suggest using a suitable prime number, like 500009,
117 for this purpose.
118
119 - For Intel platforms::
120
121 $ perf record -e BR_INST_RETIRED.NEAR_TAKEN:k -a -N -b -c <count> -o <perf_file> -- <loadtest>
122
123 - For AMD platforms::
124
125 $ perf record --pfm-event RETIRED_TAKEN_BRANCH_INSTRUCTIONS:k -a -N -b -c <count> -o <perf_file> -- <loadtest>
126
127 Note you can repeat the above steps to collect multiple <perf_file>s.
128
1294) (Optional) Download the raw perf file(s) to the host machine.
130
1315) Use the create_llvm_prof tool (https://github.com/google/autofdo) to
132 generate Propeller profile. ::
133
134 $ create_llvm_prof --binary=<vmlinux> --profile=<perf_file>
135 --format=propeller --propeller_output_module_name
136 --out=<propeller_profile_prefix>_cc_profile.txt
137 --propeller_symorder=<propeller_profile_prefix>_ld_profile.txt
138
139 "<propeller_profile_prefix>" can be something like "/home/user/dir/any_string".
140
141 This command generates a pair of Propeller profiles:
142 "<propeller_profile_prefix>_cc_profile.txt" and
143 "<propeller_profile_prefix>_ld_profile.txt".
144
145 If there are more than 1 perf_file collected in the previous step,
146 you can create a temp list file "<perf_file_list>" with each line
147 containing one perf file name and run::
148
149 $ create_llvm_prof --binary=<vmlinux> --profile=@<perf_file_list>
150 --format=propeller --propeller_output_module_name
151 --out=<propeller_profile_prefix>_cc_profile.txt
152 --propeller_symorder=<propeller_profile_prefix>_ld_profile.txt
153
1546) Rebuild the kernel using the AutoFDO and Propeller
155 profiles. ::
156
157 CONFIG_AUTOFDO_CLANG=y
158 CONFIG_PROPELLER_CLANG=y
159
160 and ::
161
162 $ make LLVM=1 CLANG_AUTOFDO_PROFILE=<profile_file> CLANG_PROPELLER_PROFILE_PREFIX=<propeller_profile_prefix>
Documentation/devicetree/bindings/arm/airoha,en7581-chip-scu.yaml+42−0
@@ -0,0 +1,42 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/arm/airoha,en7581-chip-scu.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Airoha Chip SCU Controller for EN7581 SoC
8
9maintainers:
10 - Lorenzo Bianconi <lorenzo@kernel.org>
11
12description:
13 The airoha chip-scu block provides a configuration interface for clock,
14 io-muxing and other functionalities used by multiple controllers (e.g. clock,
15 pinctrl, ecc) on EN7581 SoC.
16
17properties:
18 compatible:
19 items:
20 - enum:
21 - airoha,en7581-chip-scu
22 - const: syscon
23
24 reg:
25 maxItems: 1
26
27required:
28 - compatible
29 - reg
30
31additionalProperties: false
32
33examples:
34 - |
35 soc {
36 #address-cells = <2>;
37 #size-cells = <2>;
38 syscon@1fa20000 {
39 compatible = "airoha,en7581-chip-scu", "syscon";
40 reg = <0x0 0x1fa20000 0x0 0x388>;
41 };
42 };
Documentation/devicetree/bindings/connector/usb-connector.yaml+45−1
@@ -253,6 +253,46 @@ properties: · 252 unmodified lines
253 253
254 additionalProperties: false254 additionalProperties: false
255 255
256 sink-wait-cap-time-ms:
257 description: Represents the max time in ms that USB Type-C port (in sink
258 role) should wait for the port partner (source role) to send source caps.
259 SinkWaitCap timer starts when port in sink role attaches to the source.
260 This timer will stop when sink receives PD source cap advertisement before
261 timeout in which case it'll move to capability negotiation stage. A
262 timeout leads to a hard reset message by the port.
263 minimum: 310
264 maximum: 620
265 default: 310
266
267 ps-source-off-time-ms:
268 description: Represents the max time in ms that a DRP in source role should
269 take to turn off power after the PsSourceOff timer starts. PsSourceOff
270 timer starts when a sink's PHY layer receives EOP of the GoodCRC message
271 (corresponding to an Accept message sent in response to a PR_Swap or a
272 FR_Swap request). This timer stops when last bit of GoodCRC EOP
273 corresponding to the received PS_RDY message is transmitted by the PHY
274 layer. A timeout shall lead to error recovery in the type-c port.
275 minimum: 750
276 maximum: 920
277 default: 920
278
279 cc-debounce-time-ms:
280 description: Represents the max time in ms that a port shall wait to
281 determine if it's attached to a partner.
282 minimum: 100
283 maximum: 200
284 default: 200
285
286 sink-bc12-completion-time-ms:
287 description: Represents the max time in ms that a port in sink role takes
288 to complete Battery Charger (BC1.2) Detection. BC1.2 detection is a
289 hardware mechanism, which in some TCPC implementations, can run in
290 parallel once the Type-C connection state machine reaches the "potential
291 connect as sink" state. In TCPCs where this causes delays to respond to
292 the incoming PD messages, sink-bc12-completion-time-ms is used to delay
293 PD negotiation till BC1.2 detection completes.
294 default: 0
295
256dependencies:296dependencies:
257 sink-vdos-v1: [ sink-vdos ]297 sink-vdos-v1: [ sink-vdos ]
258 sink-vdos: [ sink-vdos-v1 ]298 sink-vdos: [ sink-vdos-v1 ]
@@ -380,7 +420,7 @@ examples: · 121 unmodified lines
380 };420 };
381 421
382 # USB-C connector attached to a typec port controller(ptn5110), which has422 # USB-C connector attached to a typec port controller(ptn5110), which has
383 # power delivery support and enables drp.423 # power delivery support, explicitly defines time properties and enables drp.
384 - |424 - |
385 #include <dt-bindings/usb/pd.h>425 #include <dt-bindings/usb/pd.h>
386 typec: ptn5110 {426 typec: ptn5110 {
@@ -393,6 +433,10 @@ examples: · 6 unmodified lines
393 sink-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)433 sink-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)
394 PDO_VAR(5000, 12000, 2000)>;434 PDO_VAR(5000, 12000, 2000)>;
395 op-sink-microwatt = <10000000>;435 op-sink-microwatt = <10000000>;
436 sink-wait-cap-time-ms = <465>;
437 ps-source-off-time-ms = <835>;
438 cc-debounce-time-ms = <101>;
439 sink-bc12-completion-time-ms = <500>;
396 };440 };
397 };441 };
398 442
Documentation/devicetree/bindings/dma/qcom,gpi.yaml+1−0
@@ -26,6 +26,7 @@ properties: · 25 unmodified lines
26 - enum:26 - enum:
27 - qcom,qcm2290-gpi-dma27 - qcom,qcm2290-gpi-dma
28 - qcom,qdu1000-gpi-dma28 - qcom,qdu1000-gpi-dma
29 - qcom,sar2130p-gpi-dma
29 - qcom,sc7280-gpi-dma30 - qcom,sc7280-gpi-dma
30 - qcom,sdx75-gpi-dma31 - qcom,sdx75-gpi-dma
31 - qcom,sm6115-gpi-dma32 - qcom,sm6115-gpi-dma
Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml+20−9
@@ -4,18 +4,16 @@ · 3 unmodified lines
4$id: http://devicetree.org/schemas/dma/renesas,rz-dmac.yaml#4$id: http://devicetree.org/schemas/dma/renesas,rz-dmac.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7title: Renesas RZ/{G2L,G2UL,V2L} DMA Controller7title: Renesas RZ DMA Controller
8 8
9maintainers:9maintainers:
10 - Biju Das <biju.das.jz@bp.renesas.com>10 - Biju Das <biju.das.jz@bp.renesas.com>
11 11
12allOf:
13 - $ref: dma-controller.yaml#
14
15properties:12properties:
16 compatible:13 compatible:
17 items:14 items:
18 - enum:15 - enum:
16 - renesas,r7s72100-dmac # RZ/A1H
19 - renesas,r9a07g043-dmac # RZ/G2UL and RZ/Five17 - renesas,r9a07g043-dmac # RZ/G2UL and RZ/Five
20 - renesas,r9a07g044-dmac # RZ/G2{L,LC}18 - renesas,r9a07g044-dmac # RZ/G2{L,LC}
21 - renesas,r9a07g054-dmac # RZ/V2L19 - renesas,r9a07g054-dmac # RZ/V2L
@@ -93,13 +91,26 @@ required: · 71 unmodified lines
93 - reg91 - reg
94 - interrupts92 - interrupts
95 - interrupt-names93 - interrupt-names
96 - clocks
97 - clock-names
98 - '#dma-cells'94 - '#dma-cells'
99 - dma-channels95 - dma-channels
100 - power-domains96
101 - resets97allOf:
102 - reset-names98 - $ref: dma-controller.yaml#
99
100 - if:
101 not:
102 properties:
103 compatible:
104 contains:
105 enum:
106 - renesas,r7s72100-dmac
107 then:
108 required:
109 - clocks
110 - clock-names
111 - power-domains
112 - resets
113 - reset-names
103 114
104additionalProperties: false115additionalProperties: false
105 116
Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml+10−5
@@ -27,11 +27,16 @@ allOf: · 26 unmodified lines
27 27
28properties:28properties:
29 compatible:29 compatible:
30 items:30 oneOf:
31 - enum:31 - items:
32 - microchip,mpfs-pdma32 - const: microchip,pic64gx-pdma
33 - sifive,fu540-c000-pdma33 - const: microchip,mpfs-pdma
34 - const: sifive,pdma034 - const: sifive,pdma0
35 - items:
36 - enum:
37 - microchip,mpfs-pdma
38 - sifive,fu540-c000-pdma
39 - const: sifive,pdma0
35 description:40 description:
36 Should be "sifive,<chip>-pdma" and "sifive,pdma<version>".41 Should be "sifive,<chip>-pdma" and "sifive,pdma<version>".
37 Supported compatible strings are -42 Supported compatible strings are -
Documentation/devicetree/bindings/dma/stm32/st,stm32-dma3.yaml+6−0
@@ -96,6 +96,12 @@ properties: · 95 unmodified lines
96 including the update of the LLI if any96 including the update of the LLI if any
97 0x3: at channel level, the transfer complete event is generated at the97 0x3: at channel level, the transfer complete event is generated at the
98 end of the last LLI98 end of the last LLI
99 -bit 16: Prevent packing/unpacking mode
100 0x0: pack/unpack enabled when source data width/burst != destination data width/burst
101 0x1: memory data width/burst forced to peripheral data width/burst to prevent pack/unpack
102 -bit 17: Prevent additional transfers due to linked-list refactoring
103 0x0: don't prevent additional transfers for optimal performance
104 0x1: prevent additional transfer to accommodate user constraints such as single transfer
99 105
100required:106required:
101 - compatible107 - compatible
Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml+1−0
@@ -33,6 +33,7 @@ properties: · 32 unmodified lines
33 - allwinner,sun50i-a100-i2c33 - allwinner,sun50i-a100-i2c
34 - allwinner,sun50i-h616-i2c34 - allwinner,sun50i-h616-i2c
35 - allwinner,sun50i-r329-i2c35 - allwinner,sun50i-r329-i2c
36 - allwinner,sun55i-a523-i2c
36 - const: allwinner,sun8i-v536-i2c37 - const: allwinner,sun8i-v536-i2c
37 - const: allwinner,sun6i-a31-i2c38 - const: allwinner,sun6i-a31-i2c
38 - const: marvell,mv64xxx-i2c39 - const: marvell,mv64xxx-i2c
Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml+18−0
@@ -97,6 +97,22 @@ properties: · 96 unmodified lines
97 - const: tx97 - const: tx
98 - const: rx98 - const: rx
99 99
100 snps,bus-capacitance-pf:
101 $ref: /schemas/types.yaml#/definitions/uint32
102 description:
103 This property indicates the bus capacitance in picofarads (pF).
104 This value is used to compute the tHIGH and tLOW periods for high speed
105 mode.
106 enum: [100, 400]
107 default: 100
108
109 snps,clk-freq-optimized:
110 description:
111 This property indicates whether the hardware reduce its clock frequency
112 by reducing the internal latency required to generate the high period and
113 low period of SCL line.
114 type: boolean
115
100unevaluatedProperties: false116unevaluatedProperties: false
101 117
102required:118required:
@@ -121,6 +137,8 @@ examples: · 18 unmodified lines
121 i2c-sda-hold-time-ns = <300>;137 i2c-sda-hold-time-ns = <300>;
122 i2c-sda-falling-time-ns = <300>;138 i2c-sda-falling-time-ns = <300>;
123 i2c-scl-falling-time-ns = <300>;139 i2c-scl-falling-time-ns = <300>;
140 snps,bus-capacitance-pf = <400>;
141 snps,clk-freq-optimized;
124 };142 };
125 - |143 - |
126 i2c@2000 {144 i2c@2000 {
Documentation/devicetree/bindings/i2c/st,nomadik-i2c.yaml+7−6
@@ -22,6 +22,7 @@ select: · 21 unmodified lines
22 enum:22 enum:
23 - st,nomadik-i2c23 - st,nomadik-i2c
24 - mobileye,eyeq5-i2c24 - mobileye,eyeq5-i2c
25 - mobileye,eyeq6h-i2c
25 required:26 required:
26 - compatible27 - compatible
27 28
@@ -29,15 +30,15 @@ properties: · 1 unmodified line
29 compatible:30 compatible:
30 oneOf:31 oneOf:
31 - items:32 - items:
32 - const: st,nomadik-i2c33 - enum:
34 - st,nomadik-i2c
35 - mobileye,eyeq5-i2c
36 - mobileye,eyeq6h-i2c
33 - const: arm,primecell37 - const: arm,primecell
34 - items:38 - items:
35 - const: stericsson,db8500-i2c39 - const: stericsson,db8500-i2c
36 - const: st,nomadik-i2c40 - const: st,nomadik-i2c
37 - const: arm,primecell41 - const: arm,primecell
38 - items:
39 - const: mobileye,eyeq5-i2c
40 - const: arm,primecell
41 42
42 reg:43 reg:
43 maxItems: 144 maxItems: 1
@@ -54,7 +55,7 @@ properties: · 10 unmodified lines
54 - items:55 - items:
55 - const: mclk56 - const: mclk
56 - const: apb_pclk57 - const: apb_pclk
57 # Clock name in DB8500 or EyeQ558 # Clock name in DB8500 or EyeQ
58 - items:59 - items:
59 - const: i2cclk60 - const: i2cclk
60 - const: apb_pclk61 - const: apb_pclk
@@ -67,7 +68,7 @@ properties: · 6 unmodified lines
67 68
68 clock-frequency:69 clock-frequency:
69 minimum: 170 minimum: 1
70 maximum: 40000071 maximum: 3400000
71 72
72 mobileye,olb:73 mobileye,olb:
73 $ref: /schemas/types.yaml#/definitions/phandle-array74 $ref: /schemas/types.yaml#/definitions/phandle-array
Documentation/devicetree/bindings/iio/adc/adc.yaml+4−0
@@ -37,6 +37,10 @@ properties: · 36 unmodified lines
37 to both the positive and negative inputs of a differential ADC.37 to both the positive and negative inputs of a differential ADC.
38 The first value specifies the positive input pin, the second38 The first value specifies the positive input pin, the second
39 specifies the negative input pin.39 specifies the negative input pin.
40 There are also some ADCs, where the differential channel has dedicated
41 positive and negative inputs which can be used to measure differential
42 voltage levels. For those setups, this property can be configured with
43 the 'reg' property for both inputs (i.e. diff-channels = <reg reg>).
40 44
41 single-channel:45 single-channel:
42 $ref: /schemas/types.yaml#/definitions/uint3246 $ref: /schemas/types.yaml#/definitions/uint32
Documentation/devicetree/bindings/iio/adc/adi,ad7173.yaml+3−0
@@ -28,6 +28,7 @@ description: | · 27 unmodified lines
28 Datasheets for supported chips:28 Datasheets for supported chips:
29 https://www.analog.com/media/en/technical-documentation/data-sheets/AD4111.pdf29 https://www.analog.com/media/en/technical-documentation/data-sheets/AD4111.pdf
30 https://www.analog.com/media/en/technical-documentation/data-sheets/AD4112.pdf30 https://www.analog.com/media/en/technical-documentation/data-sheets/AD4112.pdf
31 <AD4113: not released yet>
31 https://www.analog.com/media/en/technical-documentation/data-sheets/AD4114.pdf32 https://www.analog.com/media/en/technical-documentation/data-sheets/AD4114.pdf
32 https://www.analog.com/media/en/technical-documentation/data-sheets/AD4115.pdf33 https://www.analog.com/media/en/technical-documentation/data-sheets/AD4115.pdf
33 https://www.analog.com/media/en/technical-documentation/data-sheets/AD4116.pdf34 https://www.analog.com/media/en/technical-documentation/data-sheets/AD4116.pdf
@@ -44,6 +45,7 @@ properties: · 10 unmodified lines
44 enum:45 enum:
45 - adi,ad411146 - adi,ad4111
46 - adi,ad411247 - adi,ad4112
48 - adi,ad4113
47 - adi,ad411449 - adi,ad4114
48 - adi,ad411550 - adi,ad4115
49 - adi,ad411651 - adi,ad4116
@@ -331,6 +333,7 @@ allOf: · 281 unmodified lines
331 enum:333 enum:
332 - adi,ad4111334 - adi,ad4111
333 - adi,ad4112335 - adi,ad4112
336 - adi,ad4113
334 - adi,ad4114337 - adi,ad4114
335 - adi,ad4115338 - adi,ad4115
336 - adi,ad4116339 - adi,ad4116
Documentation/devicetree/bindings/iio/adc/adi,ad7380.yaml+120−0
@@ -25,6 +25,8 @@ description: | · 24 unmodified lines
25 * https://www.analog.com/en/products/ad7386-4.html25 * https://www.analog.com/en/products/ad7386-4.html
26 * https://www.analog.com/en/products/ad7387-4.html26 * https://www.analog.com/en/products/ad7387-4.html
27 * https://www.analog.com/en/products/ad7388-4.html27 * https://www.analog.com/en/products/ad7388-4.html
28 * https://www.analog.com/en/products/adaq4370-4.html
29 * https://www.analog.com/en/products/adaq4380-4.html
28 30
29 31
30$ref: /schemas/spi/spi-peripheral-props.yaml#32$ref: /schemas/spi/spi-peripheral-props.yaml#
@@ -46,6 +48,8 @@ properties: · 15 unmodified lines
46 - adi,ad7386-448 - adi,ad7386-4
47 - adi,ad7387-449 - adi,ad7387-4
48 - adi,ad7388-450 - adi,ad7388-4
51 - adi,adaq4370-4
52 - adi,adaq4380-4
49 53
50 reg:54 reg:
51 maxItems: 155 maxItems: 1
@@ -70,6 +74,20 @@ properties: · 18 unmodified lines
70 refin-supply:74 refin-supply:
71 description:75 description:
72 A 2.5V to 3.3V supply for external reference voltage, for ad7380-4 only.76 A 2.5V to 3.3V supply for external reference voltage, for ad7380-4 only.
77 For adaq devices, a 5V supply voltage. A 3.3V internal reference is
78 derived from it. Connect to vs-p-supply for normal operation.
79
80 vs-p-supply:
81 description:
82 Amplifiers positive supply.
83
84 vs-n-supply:
85 description:
86 Amplifiers negative supply.
87
88 ldo-supply:
89 description:
90 LDO supply. Connect to vs-p-supply or a 3.6 to 5.5 V supply.
73 91
74 aina-supply:92 aina-supply:
75 description:93 description:
@@ -97,12 +115,45 @@ properties: · 21 unmodified lines
97 specify the ALERT interrupt.115 specify the ALERT interrupt.
98 maxItems: 1116 maxItems: 1
99 117
118 "#address-cells":
119 const: 1
120
121 "#size-cells":
122 const: 0
123
100required:124required:
101 - compatible125 - compatible
102 - reg126 - reg
103 - vcc-supply127 - vcc-supply
104 - vlogic-supply128 - vlogic-supply
105 129
130patternProperties:
131 "^channel@[0-3]$":
132 $ref: adc.yaml
133 type: object
134
135 properties:
136 reg:
137 description:
138 The channel number. From 0 to 3 corresponding to channels A,B,C,D
139 minimum: 0
140 maximum: 3
141
142 adi,gain-milli:
143 description:
144 The hardware gain applied to the ADC input (in milli units).
145 If not present, default to 1000 (no actual gain applied).
146 Refer to the typical connection diagrams section of the datasheet for
147 pin wiring.
148 $ref: /schemas/types.yaml#/definitions/uint16
149 enum: [300, 600, 1000, 1600]
150 default: 1000
151
152 required:
153 - reg
154
155 additionalProperties: false
156
106unevaluatedProperties: false157unevaluatedProperties: false
107 158
108allOf:159allOf:
@@ -140,6 +191,7 @@ allOf: · 31 unmodified lines
140 aind-supply: false191 aind-supply: false
141 192
142 # ad7380-4 uses refin-supply as external reference.193 # ad7380-4 uses refin-supply as external reference.
194 # adaq devices use internal reference only, derived from refin-supply
143 # All other chips from ad738x family use refio as optional external reference.195 # All other chips from ad738x family use refio as optional external reference.
144 # When refio-supply is omitted, internal reference is used.196 # When refio-supply is omitted, internal reference is used.
145 - if:197 - if:
@@ -147,6 +199,8 @@ allOf: · 1 unmodified line
147 compatible:199 compatible:
148 enum:200 enum:
149 - adi,ad7380-4201 - adi,ad7380-4
202 - adi,adaq4370-4
203 - adi,adaq4380-4
150 then:204 then:
151 properties:205 properties:
152 refio-supply: false206 refio-supply: false
@@ -156,6 +210,27 @@ allOf: · 3 unmodified lines
156 properties:210 properties:
157 refin-supply: false211 refin-supply: false
158 212
213 # adaq devices need more supplies and using channel to declare gain property
214 # only applies to adaq devices
215 - if:
216 properties:
217 compatible:
218 enum:
219 - adi,adaq4370-4
220 - adi,adaq4380-4
221 then:
222 required:
223 - vs-p-supply
224 - vs-n-supply
225 - ldo-supply
226 else:
227 properties:
228 vs-p-supply: false
229 vs-n-supply: false
230 ldo-supply: false
231 patternProperties:
232 "^channel@[0-3]$": false
233
159examples:234examples:
160 - |235 - |
161 #include <dt-bindings/interrupt-controller/irq.h>236 #include <dt-bindings/interrupt-controller/irq.h>
@@ -180,3 +255,48 @@ examples: · 18 unmodified lines
180 refio-supply = <&supply_2_5V>;255 refio-supply = <&supply_2_5V>;
181 };256 };
182 };257 };
258
259 - |
260 #include <dt-bindings/interrupt-controller/irq.h>
261
262 spi {
263 #address-cells = <1>;
264 #size-cells = <0>;
265
266 adc@0 {
267 compatible = "adi,adaq4380-4";
268 reg = <0>;
269
270 spi-cpol;
271 spi-cpha;
272 spi-max-frequency = <80000000>;
273
274 interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
275 interrupt-parent = <&gpio0>;
276
277 vcc-supply = <&supply_3_3V>;
278 vlogic-supply = <&supply_3_3V>;
279 refin-supply = <&supply_5V>;
280 vs-p-supply = <&supply_5V>;
281 vs-n-supply = <&supply_0V>;
282 ldo-supply = <&supply_5V>;
283
284 #address-cells = <1>;
285 #size-cells = <0>;
286
287 channel@0 {
288 reg = <0>;
289 adi,gain-milli = /bits/ 16 <300>;
290 };
291
292 channel@2 {
293 reg = <2>;
294 adi,gain-milli = /bits/ 16 <600>;
295 };
296
297 channel@3 {
298 reg = <3>;
299 adi,gain-milli = /bits/ 16 <1000>;
300 };
301 };
302 };
Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml+195−4
@@ -14,6 +14,11 @@ description: | · 13 unmodified lines
14 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7605-4.pdf14 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7605-4.pdf
15 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606_7606-6_7606-4.pdf15 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606_7606-6_7606-4.pdf
16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7606B.pdf16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7606B.pdf
17 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606c-16.pdf
18 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606c-18.pdf
19 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7607.pdf
20 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7608.pdf
21 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7609.pdf
17 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7616.pdf22 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7616.pdf
18 23
19properties:24properties:
@@ -24,11 +29,27 @@ properties: · 4 unmodified lines
24 - adi,ad7606-629 - adi,ad7606-6
25 - adi,ad7606-8 # Referred to as AD7606 (without -8) in the datasheet30 - adi,ad7606-8 # Referred to as AD7606 (without -8) in the datasheet
26 - adi,ad7606b31 - adi,ad7606b
32 - adi,ad7606c-16
33 - adi,ad7606c-18
34 - adi,ad7607
35 - adi,ad7608
36 - adi,ad7609
27 - adi,ad761637 - adi,ad7616
28 38
29 reg:39 reg:
30 maxItems: 140 maxItems: 1
31 41
42 "#address-cells":
43 const: 1
44
45 "#size-cells":
46 const: 0
47
48 # According to the datasheet, "Data is clocked in from SDI on the falling
49 # edge of SCLK, while data is clocked out on DOUTA on the rising edge of
50 # SCLK". Also, even if not stated textually in the datasheet, it is made
51 # clear on the diagrams that sclk idles at high. Subsequently, in case SPI
52 # interface is used, the correct way is to only set spi-cpol.
32 spi-cpha: true53 spi-cpha: true
33 54
34 spi-cpol: true55 spi-cpol: true
@@ -114,18 +135,91 @@ properties: · 79 unmodified lines
114 assumed that the pins are hardwired to VDD.135 assumed that the pins are hardwired to VDD.
115 type: boolean136 type: boolean
116 137
138 pwms:
139 description:
140 In case the conversion is triggered by a PWM instead of a GPIO plugged to
141 the CONVST pin, the PWM must be referenced.
142 The first is the PWM connected to CONVST or CONVST1 for the chips with the
143 2nd PWM connected to CONVST2, if CONVST2 is available and not shorted to
144 CONVST1.
145 minItems: 1
146 maxItems: 2
147
148 pwm-names:
149 items:
150 - const: convst1
151 - const: convst2
152
153 io-backends:
154 description:
155 A reference to the iio-backend, which is responsible handling the BUSY
156 pin's falling edge and communication.
157 An example of backend can be found at
158 http://analogdevicesinc.github.io/hdl/library/axi_ad7606x/index.html
159
160
161patternProperties:
162 "^channel@[1-8]$":
163 type: object
164 $ref: adc.yaml
165 unevaluatedProperties: false
166
167 properties:
168 reg:
169 description:
170 The channel number, as specified in the datasheet (from 1 to 8).
171 minimum: 1
172 maximum: 8
173
174 diff-channels:
175 description:
176 Each channel can be configured as a bipolar differential channel.
177 The ADC uses the same positive and negative inputs for this.
178 This property must be specified as 'reg' (or the channel number) for
179 both positive and negative inputs (i.e. diff-channels = <reg reg>).
180 Since the configuration is bipolar differential, the 'bipolar'
181 property is required.
182 items:
183 minimum: 1
184 maximum: 8
185
186 bipolar:
187 description:
188 The ADC channels can be configured as
189 * Bipolar single-ended
190 * Unipolar single-ended
191 * Bipolar differential
192 Therefore in the DT, if no channel node is specified, it is considered
193 'unipolar single-ended'. So for the other configurations the 'bipolar'
194 property must be specified. If 'diff-channels' is specified, it is
195 considered a bipolar differential channel. Otherwise it is bipolar
196 single-ended.
197
198 required:
199 - reg
200 - bipolar
201
117required:202required:
118 - compatible203 - compatible
119 - reg204 - reg
120 - spi-cpha
121 - avcc-supply205 - avcc-supply
122 - vdrive-supply206 - vdrive-supply
123 - interrupts
124 - adi,conversion-start-gpios
125 207
126allOf:208allOf:
127 - $ref: /schemas/spi/spi-peripheral-props.yaml#209 - $ref: /schemas/spi/spi-peripheral-props.yaml#
128 210
211 - oneOf:
212 - required:
213 - adi,conversion-start-gpios
214 - required:
215 - pwms
216
217 - oneOf:
218 - required:
219 - interrupts
220 - required:
221 - io-backends
222
129 - if:223 - if:
130 properties:224 properties:
131 compatible:225 compatible:
@@ -162,17 +256,66 @@ allOf: · 30 unmodified lines
162 - adi,ad7606-4256 - adi,ad7606-4
163 - adi,ad7606-6257 - adi,ad7606-6
164 - adi,ad7606-8258 - adi,ad7606-8
259 - adi,ad7607
260 - adi,ad7608
261 - adi,ad7609
165 then:262 then:
166 properties:263 properties:
167 adi,sw-mode: false264 adi,sw-mode: false
168 else:265 else:
169 properties:266 properties:
267 pwms:
268 maxItems: 1
269 pwm-names:
270 maxItems: 1
170 adi,conversion-start-gpios:271 adi,conversion-start-gpios:
171 maxItems: 1272 maxItems: 1
172 273
274 - if:
275 not:
276 required:
277 - adi,sw-mode
278 then:
279 patternProperties:
280 "^channel@[1-8]$": false
281
282 - if:
283 not:
284 properties:
285 compatible:
286 enum:
287 - adi,ad7606c-16
288 - adi,ad7606c-18
289 then:
290 patternProperties:
291 "^channel@[1-8]$": false
292
173unevaluatedProperties: false293unevaluatedProperties: false
174 294
175examples:295examples:
296 - |
297 #include <dt-bindings/gpio/gpio.h>
298 iio-backend {
299 #address-cells = <1>;
300 #size-cells = <0>;
301 adi_adc@0 {
302 compatible = "adi,ad7606b";
303 reg = <0>;
304 pwms = <&axi_pwm_gen 0 0>;
305
306 avcc-supply = <&adc_vref>;
307 vdrive-supply = <&vdd_supply>;
308
309 reset-gpios = <&gpio0 91 GPIO_ACTIVE_HIGH>;
310 standby-gpios = <&gpio0 90 GPIO_ACTIVE_LOW>;
311 adi,range-gpios = <&gpio0 89 GPIO_ACTIVE_HIGH>;
312 adi,oversampling-ratio-gpios = <&gpio0 88 GPIO_ACTIVE_HIGH
313 &gpio0 87 GPIO_ACTIVE_HIGH
314 &gpio0 86 GPIO_ACTIVE_HIGH>;
315 io-backends = <&iio_backend>;
316 };
317 };
318
176 - |319 - |
177 #include <dt-bindings/gpio/gpio.h>320 #include <dt-bindings/gpio/gpio.h>
178 #include <dt-bindings/interrupt-controller/irq.h>321 #include <dt-bindings/interrupt-controller/irq.h>
@@ -185,7 +328,6 @@ examples: · 6 unmodified lines
185 reg = <0>;328 reg = <0>;
186 spi-max-frequency = <1000000>;329 spi-max-frequency = <1000000>;
187 spi-cpol;330 spi-cpol;
188 spi-cpha;
189 331
190 avcc-supply = <&adc_vref>;332 avcc-supply = <&adc_vref>;
191 vdrive-supply = <&vdd_supply>;333 vdrive-supply = <&vdd_supply>;
@@ -202,4 +344,53 @@ examples: · 10 unmodified lines
202 standby-gpios = <&gpio 24 GPIO_ACTIVE_LOW>;344 standby-gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
203 };345 };
204 };346 };
347 - |
348 #include <dt-bindings/gpio/gpio.h>
349 #include <dt-bindings/interrupt-controller/irq.h>
350 spi {
351 #address-cells = <1>;
352 #size-cells = <0>;
353
354 adc@0 {
355 compatible = "adi,ad7606c-18";
356 reg = <0>;
357
358 #address-cells = <1>;
359 #size-cells = <0>;
360
361 spi-max-frequency = <1000000>;
362 spi-cpol;
363
364 avcc-supply = <&adc_vref>;
365 vdrive-supply = <&vdd_supply>;
366
367 interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
368 interrupt-parent = <&gpio>;
369
370 adi,conversion-start-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
371 reset-gpios = <&gpio 27 GPIO_ACTIVE_HIGH>;
372 adi,first-data-gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
373 standby-gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
374
375 adi,sw-mode;
376
377 channel@1 {
378 reg = <1>;
379 diff-channels = <1 1>;
380 bipolar;
381 };
382
383 channel@3 {
384 reg = <3>;
385 bipolar;
386 };
387
388 channel@8 {
389 reg = <8>;
390 diff-channels = <8 8>;
391 bipolar;
392 };
393
394 };
395 };
205...396...
Documentation/devicetree/bindings/iio/adc/adi,ad7625.yaml+176−0
@@ -0,0 +1,176 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/adc/adi,ad7625.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Analog Devices Fast PulSAR Analog to Digital Converters
8
9maintainers:
10 - Michael Hennerich <Michael.Hennerich@analog.com>
11 - Nuno Sá <nuno.sa@analog.com>
12
13description: |
14 A family of single channel differential analog to digital converters.
15
16 * https://www.analog.com/en/products/ad7625.html
17 * https://www.analog.com/en/products/ad7626.html
18 * https://www.analog.com/en/products/ad7960.html
19 * https://www.analog.com/en/products/ad7961.html
20
21properties:
22 compatible:
23 enum:
24 - adi,ad7625
25 - adi,ad7626
26 - adi,ad7960
27 - adi,ad7961
28
29 vdd1-supply: true
30 vdd2-supply: true
31 vio-supply: true
32
33 ref-supply:
34 description:
35 Voltage regulator for the external reference voltage (REF).
36
37 refin-supply:
38 description:
39 Voltage regulator for the reference buffer input (REFIN).
40
41 clocks:
42 description:
43 The clock connected to the CLK pins, gated by the clk_gate PWM.
44 maxItems: 1
45
46 pwms:
47 items:
48 - description: PWM connected to the CNV input on the ADC.
49 - description: PWM that gates the clock connected to the ADC's CLK input.
50
51 pwm-names:
52 items:
53 - const: cnv
54 - const: clk_gate
55
56 io-backends:
57 description:
58 The AXI ADC IP block connected to the D+/- and DCO+/- lines of the
59 ADC. An example backend can be found at
60 http://analogdevicesinc.github.io/hdl/projects/pulsar_lvds/index.html.
61 maxItems: 1
62
63 adi,no-dco:
64 $ref: /schemas/types.yaml#/definitions/flag
65 description:
66 Indicates the wiring of the DCO+/- lines. If true, then they are
67 grounded and the device is in self-clocked mode. If this is not
68 present, then the device is in echoed clock mode.
69
70 adi,en0-always-on:
71 $ref: /schemas/types.yaml#/definitions/flag
72 description:
73 Indicates if EN0 is hard-wired to the high state. If neither this
74 nor en0-gpios are present, then EN0 is hard-wired low.
75
76 adi,en1-always-on:
77 $ref: /schemas/types.yaml#/definitions/flag
78 description:
79 Indicates if EN1 is hard-wired to the high state. If neither this
80 nor en1-gpios are present, then EN1 is hard-wired low.
81
82 adi,en2-always-on:
83 $ref: /schemas/types.yaml#/definitions/flag
84 description:
85 Indicates if EN2 is hard-wired to the high state. If neither this
86 nor en2-gpios are present, then EN2 is hard-wired low.
87
88 adi,en3-always-on:
89 $ref: /schemas/types.yaml#/definitions/flag
90 description:
91 Indicates if EN3 is hard-wired to the high state. If neither this
92 nor en3-gpios are present, then EN3 is hard-wired low.
93
94 en0-gpios:
95 description:
96 Configurable EN0 pin.
97
98 en1-gpios:
99 description:
100 Configurable EN1 pin.
101
102 en2-gpios:
103 description:
104 Configurable EN2 pin.
105
106 en3-gpios:
107 description:
108 Configurable EN3 pin.
109
110required:
111 - compatible
112 - vdd1-supply
113 - vdd2-supply
114 - vio-supply
115 - clocks
116 - pwms
117 - pwm-names
118 - io-backends
119
120allOf:
121 - if:
122 required:
123 - ref-supply
124 then:
125 properties:
126 refin-supply: false
127 - if:
128 required:
129 - refin-supply
130 then:
131 properties:
132 ref-supply: false
133 - if:
134 properties:
135 compatible:
136 contains:
137 enum:
138 - adi,ad7625
139 - adi,ad7626
140 then:
141 properties:
142 en2-gpios: false
143 en3-gpios: false
144 adi,en2-always-on: false
145 adi,en3-always-on: false
146
147 - if:
148 properties:
149 compatible:
150 contains:
151 enum:
152 - adi,ad7960
153 - adi,ad7961
154 then:
155 # ad796x parts must have one of the two supplies
156 oneOf:
157 - required: [ref-supply]
158 - required: [refin-supply]
159
160additionalProperties: false
161
162examples:
163 - |
164 #include <dt-bindings/gpio/gpio.h>
165 adc {
166 compatible = "adi,ad7625";
167 vdd1-supply = <&supply_5V>;
168 vdd2-supply = <&supply_2_5V>;
169 vio-supply = <&supply_2_5V>;
170 io-backends = <&axi_adc>;
171 clocks = <&ref_clk>;
172 pwms = <&axi_pwm_gen 0 0>, <&axi_pwm_gen 1 0>;
173 pwm-names = "cnv", "clk_gate";
174 en0-gpios = <&gpio0 86 GPIO_ACTIVE_HIGH>;
175 en1-gpios = <&gpio0 87 GPIO_ACTIVE_HIGH>;
176 };
Documentation/devicetree/bindings/iio/adc/adi,ad7779.yaml+110−0
@@ -0,0 +1,110 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/adc/adi,ad7779.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Analog Devices AD777X family 8-Channel, 24-Bit, Simultaneous Sampling ADCs
8
9maintainers:
10 - Ramona Nechita <ramona.nechita@analog.com>
11
12description: |
13 The AD777X family consist of 8-channel, simultaneous sampling analog-to-
14 digital converter (ADC). Eight full Σ-Δ ADCs are on-chip. The
15 AD7771 provides an ultralow input current to allow direct sensor
16 connection. Each input channel has a programmable gain stage
17 allowing gains of 1, 2, 4, and 8 to map lower amplitude sensor
18 outputs into the full-scale ADC input range, maximizing the
19 dynamic range of the signal chain.
20
21 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7770.pdf
22 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7771.pdf
23 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7779.pdf
24
25$ref: /schemas/spi/spi-peripheral-props.yaml#
26
27properties:
28 compatible:
29 enum:
30 - adi,ad7770
31 - adi,ad7771
32 - adi,ad7779
33
34 reg:
35 maxItems: 1
36
37 '#address-cells':
38 const: 1
39
40 '#size-cells':
41 const: 0
42
43 clocks:
44 maxItems: 1
45
46 avdd1-supply:
47 description: Front-End analog supply AVDD1. Can be used as conversion ref.
48
49 avdd2-supply:
50 description: AVDD2 Analog Supply from 2.2 V to 3.6 V.
51
52 avdd4-supply:
53 description: AVDD4 SAR Analog Supply and Reference Source.
54
55 interrupts:
56 minItems: 1
57 items:
58 - description: |
59 adc_rdy: Interrupt line for DRDY signal which indicates the end of
60 conversion independently of the interface selected to read back the
61 Σ-∆ conversion.
62 - description: |
63 Alert: The chip includes self diagnostic features to guarantee the
64 correct operation. If an error is detected, the ALERT pin is pulled
65 high to generate an external interruption to the controller.
66
67 interrupt-names:
68 minItems: 1
69 maxItems: 2
70 items:
71 enum:
72 - adc_rdy
73 - alert
74
75 start-gpios:
76 description:
77 Pin that controls start synchronization pulse.
78 maxItems: 1
79
80 reset-gpios:
81 maxItems: 1
82
83required:
84 - compatible
85 - reg
86 - clocks
87 - interrupts
88
89unevaluatedProperties: false
90
91examples:
92 - |
93 #include <dt-bindings/gpio/gpio.h>
94 #include <dt-bindings/interrupt-controller/irq.h>
95 spi {
96 #address-cells = <1>;
97 #size-cells = <0>;
98
99 adc@0 {
100 compatible = "adi,ad7779";
101 reg = <0>;
102 start-gpios = <&gpio0 87 GPIO_ACTIVE_LOW>;
103 reset-gpios = <&gpio0 93 GPIO_ACTIVE_LOW>;
104 interrupt-parent = <&intc>;
105 interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
106 interrupt-names = "adc_rdy";
107 clocks = <&adc_clk>;
108 };
109 };
110...
Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml+1−0
@@ -98,6 +98,7 @@ allOf: · 97 unmodified lines
98 compatible:98 compatible:
99 contains:99 contains:
100 enum:100 enum:
101 - amlogic,meson8-saradc
101 - amlogic,meson8b-saradc102 - amlogic,meson8b-saradc
102 - amlogic,meson8m2-saradc103 - amlogic,meson8m2-saradc
103 then:104 then:
Documentation/devicetree/bindings/iio/adc/gehc,pmc-adc.yaml+86−0
@@ -0,0 +1,86 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/adc/gehc,pmc-adc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: GE HealthCare PMC Analog to Digital Converter (ADC)
8
9maintainers:
10 - Herve Codina <herve.codina@bootlin.com>
11
12description:
13 The GE HealthCare PMC ADC is a 16-Channel (voltage and current), 16-Bit ADC
14 with an I2C Interface.
15
16properties:
17 compatible:
18 const: gehc,pmc-adc
19
20 reg:
21 maxItems: 1
22
23 vdd-supply:
24 description:
25 Regulator for the VDD power supply.
26
27 vdda-supply:
28 description:
29 Regulator for the VDD analog (VDDA) power supply.
30
31 vddio-supply:
32 description:
33 Regulator for the VDD IO (VDDIO) power supply.
34
35 vref-supply:
36 description:
37 Regulator for the voltage reference power supply.
38
39 clocks:
40 maxItems: 1
41 description:
42 The component uses an external oscillator (osc) if an external oscillator
43 is connected to its clock pins. Otherwise, it uses an internal reference
44 clock.
45
46 clock-names:
47 items:
48 - const: osc
49
50 "#io-channel-cells":
51 const: 2
52 description: |
53 The first cell is the channel type (dt-bindings/iio/adc/gehc,pmc-adc.h
54 defines these values):
55 - 0: voltage
56 - 1: current
57 The second cell is the channel number from 0 to 15.
58
59required:
60 - compatible
61 - reg
62 - vdd-supply
63 - vdda-supply
64 - vddio-supply
65 - vref-supply
66 - '#io-channel-cells'
67
68additionalProperties: false
69
70examples:
71 - |
72 i2c {
73 #address-cells = <1>;
74 #size-cells = <0>;
75
76 adc@14 {
77 compatible = "gehc,pmc-adc";
78 reg = <0x14>;
79 vdd-supply = <&reg_vdd>;
80 vdda-supply = <&reg_vdda>;
81 vddio-supply = <&reg_vddio>;
82 vref-supply = <&reg_vref>;
83 #io-channel-cells = <2>;
84 };
85 };
86...
Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml+8−1
@@ -30,7 +30,7 @@ properties: · 29 unmodified lines
30 maxItems: 130 maxItems: 1
31 31
32 spi-max-frequency:32 spi-max-frequency:
33 maximum: 3000000033 maximum: 66000000
34 34
35 reset-gpios:35 reset-gpios:
36 maxItems: 136 maxItems: 1
@@ -60,6 +60,12 @@ properties: · 23 unmodified lines
60 $ref: /schemas/types.yaml#/definitions/uint3260 $ref: /schemas/types.yaml#/definitions/uint32
61 enum: [0, 1, 2, 3]61 enum: [0, 1, 2, 3]
62 62
63 io-backends:
64 description: The iio backend reference.
65 Device can be optionally connected to the "axi-ad3552r IP" fpga-based
66 QSPI + DDR (Double Data Rate) controller to reach high speed transfers.
67 maxItems: 1
68
63 '#address-cells':69 '#address-cells':
64 const: 170 const: 1
65 71
@@ -128,6 +134,7 @@ patternProperties: · 62 unmodified lines
128 - custom-output-range-config134 - custom-output-range-config
129 135
130allOf:136allOf:
137 - $ref: /schemas/spi/spi-peripheral-props.yaml#
131 - if:138 - if:
132 properties:139 properties:
133 compatible:140 compatible:
Documentation/devicetree/bindings/iio/dac/adi,ad5791.yaml+39−0
@@ -26,16 +26,47 @@ properties: · 25 unmodified lines
26 vdd-supply: true26 vdd-supply: true
27 vss-supply: true27 vss-supply: true
28 28
29 vcc-supply:
30 description:
31 Supply that powers the chip.
32
33 iovcc-supply:
34 description:
35 Supply for the digital interface.
36
37 vrefp-supply:
38 description:
39 Positive referance input voltage range. From 5v to (vdd - 2.5)
40
41 vrefn-supply:
42 description:
43 Negative referance input voltage range. From (vss + 2.5) to 0.
44
29 adi,rbuf-gain2-en:45 adi,rbuf-gain2-en:
30 description: Specify to allow an external amplifier to be connected in a46 description: Specify to allow an external amplifier to be connected in a
31 gain of two configuration.47 gain of two configuration.
32 type: boolean48 type: boolean
33 49
50 reset-gpios:
51 maxItems: 1
52
53 clear-gpios:
54 maxItems: 1
55
56 ldac-gpios:
57 description:
58 LDAC pin to be used as a hardware trigger to update the DAC channels.
59 maxItems: 1
60
34required:61required:
35 - compatible62 - compatible
36 - reg63 - reg
37 - vdd-supply64 - vdd-supply
38 - vss-supply65 - vss-supply
66 - vcc-supply
67 - iovcc-supply
68 - vrefp-supply
69 - vrefn-supply
39 70
40allOf:71allOf:
41 - $ref: /schemas/spi/spi-peripheral-props.yaml#72 - $ref: /schemas/spi/spi-peripheral-props.yaml#
@@ -44,6 +75,7 @@ unevaluatedProperties: false · 2 unmodified lines
44 75
45examples:76examples:
46 - |77 - |
78 #include <dt-bindings/gpio/gpio.h>
47 spi {79 spi {
48 #address-cells = <1>;80 #address-cells = <1>;
49 #size-cells = <0>;81 #size-cells = <0>;
@@ -53,6 +85,13 @@ examples: · 3 unmodified lines
53 reg = <0>;85 reg = <0>;
54 vss-supply = <&dac_vss>;86 vss-supply = <&dac_vss>;
55 vdd-supply = <&dac_vdd>;87 vdd-supply = <&dac_vdd>;
88 vcc-supply = <&dac_vcc>;
89 iovcc-supply = <&dac_iovcc>;
90 vrefp-supply = <&dac_vrefp>;
91 vrefn-supply = <&dac_vrefn>;
92 reset-gpios = <&gpio_bd 16 GPIO_ACTIVE_LOW>;
93 clear-gpios = <&gpio_bd 17 GPIO_ACTIVE_LOW>;
94 ldac-gpios = <&gpio_bd 18 GPIO_ACTIVE_HIGH>;
56 };95 };
57 };96 };
58...97...
Documentation/devicetree/bindings/iio/dac/adi,ad8460.yaml+164−0
@@ -0,0 +1,164 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2# Copyright 2024 Analog Devices Inc.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/iio/dac/adi,ad8460.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Analog Devices AD8460 DAC
9
10maintainers:
11 - Mariel Tinaco <mariel.tinaco@analog.com>
12
13description: |
14 Analog Devices AD8460 110 V High Voltage, 1 A High Current,
15 Arbitrary Waveform Generator with Integrated 14-Bit High Speed DAC
16 https://www.analog.com/media/en/technical-documentation/data-sheets/ad8460.pdf
17
18properties:
19 compatible:
20 enum:
21 - adi,ad8460
22
23 reg:
24 maxItems: 1
25
26 clocks:
27 maxItems: 1
28
29 dmas:
30 maxItems: 1
31
32 dma-names:
33 items:
34 - const: tx
35
36 spi-max-frequency:
37 maximum: 20000000
38
39 hvcc-supply:
40 description: Positive high voltage power supply line
41
42 hvee-supply:
43 description: Negative high voltage power supply line
44
45 vcc-5v-supply:
46 description: Low voltage power supply
47
48 vref-5v-supply:
49 description: Reference voltage for analog low voltage
50
51 dvdd-3p3v-supply:
52 description: Digital supply bypass
53
54 avdd-3p3v-supply:
55 description: Analog supply bypass
56
57 refio-1p2v-supply:
58 description: Drive voltage in the range of 1.2V maximum to as low as
59 low as 0.12V through the REF_IO pin to adjust full scale output span
60
61 adi,external-resistor-ohms:
62 description: Specify value of external resistor connected to FS_ADJ pin
63 to establish internal HVDAC's reference current I_REF
64 minimum: 2000
65 maximum: 20000
66 default: 2000
67
68 adi,range-microvolt:
69 description: Voltage output range specified as <minimum, maximum>
70 items:
71 - minimum: -55000000
72 maximum: 0
73 default: 0
74 - minimum: 0
75 maximum: 55000000
76 default: 0
77
78 adi,range-microamp:
79 description: Current output range specified as <minimum, maximum>
80 items:
81 - minimum: -1000000
82 maximum: 0
83 default: 0
84 - minimum: 0
85 maximum: 1000000
86 default: 0
87
88 adi,max-millicelsius:
89 description: Overtemperature threshold
90 minimum: 0
91 maximum: 150000
92 default: 0
93
94 shutdown-reset-gpios:
95 description: Corresponds to SDN_RESET pin. To exit shutdown
96 or sleep mode, pulse SDN_RESET HIGH, then leave LOW.
97 maxItems: 1
98
99 reset-gpios:
100 description: Manual Power On Reset (POR). Pull this GPIO pin
101 LOW and then HIGH to reset all digital registers to default
102 maxItems: 1
103
104 shutdown-gpios:
105 description: Corresponds to SDN_IO pin. Shutdown may be
106 initiated by the user, by pulsing SDN_IO high. To exit shutdown,
107 pulse SDN_IO low, then float.
108 maxItems: 1
109
110required:
111 - compatible
112 - reg
113 - clocks
114 - hvcc-supply
115 - hvee-supply
116 - vcc-5v-supply
117 - vref-5v-supply
118 - dvdd-3p3v-supply
119 - avdd-3p3v-supply
120 - refio-1p2v-supply
121
122allOf:
123 - $ref: /schemas/spi/spi-peripheral-props.yaml#
124
125unevaluatedProperties: false
126
127examples:
128 - |
129 #include <dt-bindings/gpio/gpio.h>
130
131 spi {
132 #address-cells = <1>;
133 #size-cells = <0>;
134
135 dac@0 {
136 compatible = "adi,ad8460";
137 reg = <0>;
138 spi-max-frequency = <8000000>;
139
140 dmas = <&tx_dma 0>;
141 dma-names = "tx";
142
143 shutdown-reset-gpios = <&gpio 86 GPIO_ACTIVE_HIGH>;
144 reset-gpios = <&gpio 91 GPIO_ACTIVE_LOW>;
145 shutdown-gpios = <&gpio 88 GPIO_ACTIVE_HIGH>;
146
147 clocks = <&sync_ext_clk>;
148
149 hvcc-supply = <&hvcc>;
150 hvee-supply = <&hvee>;
151 vcc-5v-supply = <&vcc_5>;
152 vref-5v-supply = <&vref_5>;
153 dvdd-3p3v-supply = <&dvdd_3_3>;
154 avdd-3p3v-supply = <&avdd_3_3>;
155 refio-1p2v-supply = <&refio_1_2>;
156
157 adi,external-resistor-ohms = <2000>;
158 adi,range-microvolt = <(-40000000) 40000000>;
159 adi,range-microamp = <0 50000>;
160 adi,max-millicelsius = <50000>;
161 };
162 };
163
164...
Documentation/devicetree/bindings/iio/dac/adi,axi-dac.yaml+66−3
@@ -19,11 +19,13 @@ description: | · 18 unmodified lines
19 memory via DMA into the DAC.19 memory via DMA into the DAC.
20 20
21 https://wiki.analog.com/resources/fpga/docs/axi_dac_ip21 https://wiki.analog.com/resources/fpga/docs/axi_dac_ip
22 https://analogdevicesinc.github.io/hdl/library/axi_ad3552r/index.html
22 23
23properties:24properties:
24 compatible:25 compatible:
25 enum:26 enum:
26 - adi,axi-dac-9.1.b27 - adi,axi-dac-9.1.b
28 - adi,axi-ad3552r
27 29
28 reg:30 reg:
29 maxItems: 131 maxItems: 1
@@ -36,7 +38,14 @@ properties: · 6 unmodified lines
36 - const: tx38 - const: tx
37 39
38 clocks:40 clocks:
39 maxItems: 141 minItems: 1
42 maxItems: 2
43
44 clock-names:
45 items:
46 - const: s_axi_aclk
47 - const: dac_clk
48 minItems: 1
40 49
41 '#io-backend-cells':50 '#io-backend-cells':
42 const: 051 const: 0
@@ -47,7 +56,29 @@ required: · 4 unmodified lines
47 - reg56 - reg
48 - clocks57 - clocks
49 58
50additionalProperties: false59allOf:
60 - if:
61 properties:
62 compatible:
63 contains:
64 const: adi,axi-ad3552r
65 then:
66 $ref: /schemas/spi/spi-controller.yaml#
67 properties:
68 clocks:
69 minItems: 2
70 clock-names:
71 minItems: 2
72 required:
73 - clock-names
74 else:
75 properties:
76 clocks:
77 maxItems: 1
78 clock-names:
79 maxItems: 1
80
81unevaluatedProperties: false
51 82
52examples:83examples:
53 - |84 - |
@@ -57,6 +88,38 @@ examples: · 3 unmodified lines
57 dmas = <&tx_dma 0>;88 dmas = <&tx_dma 0>;
58 dma-names = "tx";89 dma-names = "tx";
59 #io-backend-cells = <0>;90 #io-backend-cells = <0>;
60 clocks = <&axi_clk>;91 clocks = <&clkc 15>;
92 clock-names = "s_axi_aclk";
93 };
94
95 - |
96 #include <dt-bindings/gpio/gpio.h>
97 axi_dac: spi@44a70000 {
98 compatible = "adi,axi-ad3552r";
99 reg = <0x44a70000 0x1000>;
100 dmas = <&dac_tx_dma 0>;
101 dma-names = "tx";
102 #io-backend-cells = <0>;
103 clocks = <&clkc 15>, <&ref_clk>;
104 clock-names = "s_axi_aclk", "dac_clk";
105
106 #address-cells = <1>;
107 #size-cells = <0>;
108
109 dac@0 {
110 compatible = "adi,ad3552r";
111 reg = <0>;
112 reset-gpios = <&gpio0 92 GPIO_ACTIVE_HIGH>;
113 io-backends = <&axi_dac>;
114 spi-max-frequency = <20000000>;
115
116 #address-cells = <1>;
117 #size-cells = <0>;
118
119 channel@0 {
120 reg = <0>;
121 adi,output-range-microvolt = <(-10000000) (10000000)>;
122 };
123 };
61 };124 };
62...125...
Documentation/devicetree/bindings/iio/imu/bosch,bmi270.yaml+79−0
@@ -0,0 +1,79 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/imu/bosch,bmi270.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Bosch BMI270 6-Axis IMU
8
9maintainers:
10 - Alex Lanzano <lanzano.alex@gmail.com>
11
12description: |
13 BMI270 is a 6-axis inertial measurement unit that can measure acceleration and
14 angular velocity. The sensor also supports configurable interrupt events such
15 as motion, step counter, and wrist motion gestures. The sensor can communicate
16 I2C or SPI.
17 https://www.bosch-sensortec.com/products/motion-sensors/imus/bmi270/
18
19properties:
20 compatible:
21 enum:
22 - bosch,bmi260
23 - bosch,bmi270
24
25 reg:
26 maxItems: 1
27
28 vdd-supply: true
29 vddio-supply: true
30
31 interrupts:
32 minItems: 1
33 maxItems: 2
34
35 interrupt-names:
36 minItems: 1
37 maxItems: 2
38 items:
39 enum:
40 - INT1
41 - INT2
42
43 drive-open-drain:
44 description:
45 set if the specified interrupt pins should be configured as
46 open drain. If not set, defaults to push-pull.
47
48 mount-matrix:
49 description:
50 an optional 3x3 mounting rotation matrix.
51
52required:
53 - compatible
54 - reg
55 - vdd-supply
56 - vddio-supply
57
58allOf:
59 - $ref: /schemas/spi/spi-peripheral-props.yaml#
60
61unevaluatedProperties: false
62
63examples:
64 - |
65 #include <dt-bindings/interrupt-controller/irq.h>
66 i2c {
67 #address-cells = <1>;
68 #size-cells = <0>;
69
70 imu@68 {
71 compatible = "bosch,bmi270";
72 reg = <0x68>;
73 vdd-supply = <&vdd>;
74 vddio-supply = <&vddio>;
75 interrupt-parent = <&gpio1>;
76 interrupts = <16 IRQ_TYPE_EDGE_RISING>;
77 interrupt-names = "INT1";
78 };
79 };
Documentation/devicetree/bindings/iio/imu/bosch,smi240.yaml+51−0
@@ -0,0 +1,51 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/imu/bosch,smi240.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Bosch smi240 imu
8
9maintainers:
10 - Jianping Shen <Jianping.Shen@de.bosch.com>
11
12description:
13 Inertial Measurement Unit with Accelerometer and Gyroscope
14 with a measurement range of +/-300°/s and up to 16g.
15 https://www.bosch-semiconductors.com/mems-sensors/highly-automated-driving/smi240/
16
17properties:
18 compatible:
19 const: bosch,smi240
20
21 reg:
22 maxItems: 1
23
24 vdd-supply: true
25 vddio-supply: true
26
27required:
28 - compatible
29 - reg
30 - vdd-supply
31 - vddio-supply
32
33allOf:
34 - $ref: /schemas/spi/spi-peripheral-props.yaml#
35
36unevaluatedProperties: false
37
38examples:
39 - |
40 spi {
41 #address-cells = <1>;
42 #size-cells = <0>;
43
44 imu@0 {
45 compatible = "bosch,smi240";
46 reg = <0>;
47 vdd-supply = <&vdd>;
48 vddio-supply = <&vddio>;
49 spi-max-frequency = <10000000>;
50 };
51 };
Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
7title: InvenSense ICM-426xx Inertial Measurement Unit7title: InvenSense ICM-426xx Inertial Measurement Unit
8 8
9maintainers:9maintainers:
10 - Jean-Baptiste Maneyrol <jmaneyrol@invensense.com>10 - Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com>
11 11
12description: |12description: |
13 6-axis MotionTracking device that combines a 3-axis gyroscope and a 3-axis13 6-axis MotionTracking device that combines a 3-axis gyroscope and a 3-axis
Documentation/devicetree/bindings/iio/imu/invensense,mpu6050.yaml+6−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
7title: InvenSense MPU-6050 Six-Axis (Gyro + Accelerometer) MEMS MotionTracking Device7title: InvenSense MPU-6050 Six-Axis (Gyro + Accelerometer) MEMS MotionTracking Device
8 8
9maintainers:9maintainers:
10 - Jean-Baptiste Maneyrol <jmaneyrol@invensense.com>10 - Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com>
11 11
12description: |12description: |
13 These devices support both I2C and SPI bus interfaces.13 These devices support both I2C and SPI bus interfaces.
@@ -36,6 +36,11 @@ properties: · 22 unmodified lines
36 - items:36 - items:
37 - const: invensense,icm20608d37 - const: invensense,icm20608d
38 - const: invensense,icm2060838 - const: invensense,icm20608
39 - items:
40 - enum:
41 - invensense,iam20680hp
42 - invensense,iam20680ht
43 - const: invensense,iam20680
39 44
40 reg:45 reg:
41 maxItems: 146 maxItems: 1
Documentation/devicetree/bindings/iio/light/ti,opt3001.yaml+3−1
@@ -15,7 +15,9 @@ description: | · 14 unmodified lines
15 15
16properties:16properties:
17 compatible:17 compatible:
18 const: ti,opt300118 enum:
19 - ti,opt3001
20 - ti,opt3002
19 21
20 reg:22 reg:
21 maxItems: 123 maxItems: 1
Documentation/devicetree/bindings/iio/light/veml6030.yaml+0−64
@@ -1,64 +0,0 @@
1# SPDX-License-Identifier: GPL-2.0+
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/light/veml6030.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: VEML6030 Ambient Light Sensor (ALS)
8
9maintainers:
10 - Rishi Gupta <gupt21@gmail.com>
11
12description: |
13 Bindings for the ambient light sensor veml6030 from Vishay
14 Semiconductors over an i2c interface.
15
16 Irrespective of whether interrupt is used or not, application
17 can get the ALS and White channel reading from IIO raw interface.
18
19 If the interrupts are used, application will receive an IIO event
20 whenever configured threshold is crossed.
21
22 Specifications about the sensor can be found at:
23 https://www.vishay.com/docs/84366/veml6030.pdf
24
25properties:
26 compatible:
27 enum:
28 - vishay,veml6030
29
30 reg:
31 description:
32 I2C address of the device.
33 enum:
34 - 0x10 # ADDR pin pulled down
35 - 0x48 # ADDR pin pulled up
36
37 interrupts:
38 description:
39 interrupt mapping for IRQ. Configure with IRQ_TYPE_LEVEL_LOW.
40 Refer to interrupt-controller/interrupts.txt for generic
41 interrupt client node bindings.
42 maxItems: 1
43
44required:
45 - compatible
46 - reg
47
48additionalProperties: false
49
50examples:
51 - |
52 #include <dt-bindings/interrupt-controller/irq.h>
53
54 i2c {
55 #address-cells = <1>;
56 #size-cells = <0>;
57
58 light-sensor@10 {
59 compatible = "vishay,veml6030";
60 reg = <0x10>;
61 interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
62 };
63 };
64...
Documentation/devicetree/bindings/iio/light/vishay,veml6030.yaml+107−0
@@ -0,0 +1,107 @@
1# SPDX-License-Identifier: GPL-2.0+
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/light/vishay,veml6030.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: VEML3235, VEML6030, VEML6035 and VEML7700 Ambient Light Sensors (ALS)
8
9maintainers:
10 - Rishi Gupta <gupt21@gmail.com>
11
12description: |
13 Bindings for the ambient light sensors veml6030 and veml6035 from
14 Vishay Semiconductors over an i2c interface.
15
16 Irrespective of whether interrupt is used or not, application
17 can get the ALS and White channel reading from IIO raw interface.
18
19 If the interrupts are used, application will receive an IIO event
20 whenever configured threshold is crossed.
21
22 Specifications about the sensors can be found at:
23 https://www.vishay.com/docs/80131/veml3235.pdf
24 https://www.vishay.com/docs/84366/veml6030.pdf
25 https://www.vishay.com/docs/84889/veml6035.pdf
26 https://www.vishay.com/docs/84286/veml7700.pdf
27
28properties:
29 compatible:
30 enum:
31 - vishay,veml3235
32 - vishay,veml6030
33 - vishay,veml6035
34 - vishay,veml7700
35
36 reg:
37 maxItems: 1
38
39 interrupts:
40 description:
41 interrupt mapping for IRQ. Configure with IRQ_TYPE_LEVEL_LOW.
42 Refer to interrupt-controller/interrupts.txt for generic
43 interrupt client node bindings.
44 maxItems: 1
45
46 vdd-supply: true
47
48required:
49 - compatible
50 - reg
51 - vdd-supply
52
53allOf:
54 - if:
55 properties:
56 compatible:
57 enum:
58 - vishay,veml6030
59 then:
60 properties:
61 reg:
62 enum:
63 - 0x10 # ADDR pin pulled down
64 - 0x48 # ADDR pin pulled up
65
66 - if:
67 properties:
68 compatible:
69 enum:
70 - vishay,veml6035
71 then:
72 properties:
73 reg:
74 enum:
75 - 0x29
76
77 - if:
78 properties:
79 compatible:
80 enum:
81 - vishay,veml3235
82 - vishay,veml7700
83 then:
84 properties:
85 reg:
86 enum:
87 - 0x10
88 interrupts: false
89
90additionalProperties: false
91
92examples:
93 - |
94 #include <dt-bindings/interrupt-controller/irq.h>
95
96 i2c {
97 #address-cells = <1>;
98 #size-cells = <0>;
99
100 light-sensor@10 {
101 compatible = "vishay,veml6030";
102 reg = <0x10>;
103 interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
104 vdd-supply = <&vdd>;
105 };
106 };
107...
Documentation/devicetree/bindings/iio/light/vishay,veml6075.yaml+20−1
@@ -4,7 +4,7 @@ · 3 unmodified lines
4$id: http://devicetree.org/schemas/iio/light/vishay,veml6075.yaml#4$id: http://devicetree.org/schemas/iio/light/vishay,veml6075.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7title: Vishay VEML6075 UVA/B and VEML6040 RGBW sensors7title: Vishay VEML6070 UVA, VEML6075 UVA/B and VEML6040 RGBW sensors
8 8
9maintainers:9maintainers:
10 - Javier Carrasco <javier.carrasco.cruz@gmail.com>10 - Javier Carrasco <javier.carrasco.cruz@gmail.com>
@@ -16,11 +16,19 @@ properties: · 5 unmodified lines
16 compatible:16 compatible:
17 enum:17 enum:
18 - vishay,veml604018 - vishay,veml6040
19 - vishay,veml6070
19 - vishay,veml607520 - vishay,veml6075
20 21
21 reg:22 reg:
22 maxItems: 123 maxItems: 1
23 24
25 vishay,rset-ohms:
26 description:
27 Resistor used to select the integration time.
28 default: 270000
29 minimum: 75000
30 maximum: 1200000
31
24 vdd-supply: true32 vdd-supply: true
25 33
26required:34required:
@@ -28,6 +36,17 @@ required: · 1 unmodified line
28 - reg36 - reg
29 - vdd-supply37 - vdd-supply
30 38
39allOf:
40 - if:
41 properties:
42 compatible:
43 enum:
44 - vishay,veml6040
45 - vishay,veml6075
46 then:
47 properties:
48 vishay,rset-ohms: false
49
31additionalProperties: false50additionalProperties: false
32 51
33examples:52examples:
Documentation/devicetree/bindings/iio/magnetometer/allegromicro,als31300.yaml+46−0
@@ -0,0 +1,46 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/magnetometer/allegromicro,als31300.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allegro MicroSystems ALS31300 3-D Linear Hall Effect sensor
8
9maintainers:
10 - Neil Armstrong <neil.armstrong@linaro.org>
11
12properties:
13 $nodename:
14 pattern: '^magnetometer@[0-9a-f]+$'
15
16 compatible:
17 enum:
18 - allegromicro,als31300-500 # Factory configured at 500 Gauss input range
19 - allegromicro,als31300-1000 # Factory configured at 1000 Gauss input range
20 - allegromicro,als31300-2000 # Factory configured at 2000 Gauss input range
21
22 reg:
23 maxItems: 1
24
25 vcc-supply:
26 description: 5.5V supply
27
28 interrupts:
29 maxItems: 1
30
31required:
32 - compatible
33
34additionalProperties: false
35
36examples:
37 - |
38 i2c {
39 #address-cells = <1>;
40 #size-cells = <0>;
41 magnetometer@61 {
42 compatible = "allegromicro,als31300-500";
43 reg = <0x61>;
44 vcc-supply = <&hall_vcc>;
45 };
46 };
Documentation/devicetree/bindings/iio/pressure/bmp085.yaml+20−2
@@ -47,15 +47,33 @@ properties: · 46 unmodified lines
47 maxItems: 147 maxItems: 1
48 48
49 interrupts:49 interrupts:
50 description:
51 interrupt mapping for IRQ (BMP085 only)
52 maxItems: 150 maxItems: 1
53 51
52 drive-open-drain:
53 description:
54 set if the interrupt pin should be configured as open drain.
55 If not set, defaults to push-pull configuration.
56 type: boolean
57
54required:58required:
55 - compatible59 - compatible
56 - vddd-supply60 - vddd-supply
57 - vdda-supply61 - vdda-supply
58 62
63allOf:
64 - if:
65 properties:
66 compatible:
67 not:
68 contains:
69 enum:
70 - bosch,bmp085
71 - bosch,bmp380
72 - bosch,bmp580
73 then:
74 properties:
75 interrupts: false
76
59additionalProperties: false77additionalProperties: false
60 78
61examples:79examples:
Documentation/devicetree/bindings/iio/temperature/ti,tmp006.yaml+6−0
@@ -23,6 +23,9 @@ properties: · 22 unmodified lines
23 vdd-supply:23 vdd-supply:
24 description: provide VDD power to the sensor.24 description: provide VDD power to the sensor.
25 25
26 interrupts:
27 maxItems: 1
28
26required:29required:
27 - compatible30 - compatible
28 - reg31 - reg
@@ -31,6 +34,7 @@ additionalProperties: false · 2 unmodified lines
31 34
32examples:35examples:
33 - |36 - |
37 #include <dt-bindings/interrupt-controller/irq.h>
34 i2c {38 i2c {
35 #address-cells = <1>;39 #address-cells = <1>;
36 #size-cells = <0>;40 #size-cells = <0>;
@@ -38,5 +42,7 @@ examples: · 1 unmodified line
38 compatible = "ti,tmp006";42 compatible = "ti,tmp006";
39 reg = <0x40>;43 reg = <0x40>;
40 vdd-supply = <&ldo4_reg>;44 vdd-supply = <&ldo4_reg>;
45 interrupt-parent = <&gpio1>;
46 interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
41 };47 };
42 };48 };
Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml+1−0
@@ -28,6 +28,7 @@ properties: · 27 unmodified lines
28 - mediatek,mt6331-keys28 - mediatek,mt6331-keys
29 - mediatek,mt6357-keys29 - mediatek,mt6357-keys
30 - mediatek,mt6358-keys30 - mediatek,mt6358-keys
31 - mediatek,mt6359-keys
31 - mediatek,mt6397-keys32 - mediatek,mt6397-keys
32 33
33 power-off-time-sec: true34 power-off-time-sec: true
Documentation/devicetree/bindings/input/rotary-encoder.yaml+1−1
@@ -41,7 +41,7 @@ properties: · 40 unmodified lines
41 device, hence no steps need to be passed.41 device, hence no steps need to be passed.
42 42
43 rotary-encoder,rollover:43 rotary-encoder,rollover:
44 $ref: /schemas/types.yaml#/definitions/int3244 $ref: /schemas/types.yaml#/definitions/flag
45 description:45 description:
46 Automatic rollover when the rotary value becomes46 Automatic rollover when the rotary value becomes
47 greater than the specified steps or smaller than 0. For absolute axis only.47 greater than the specified steps or smaller than 0. For absolute axis only.
Documentation/devicetree/bindings/input/touchscreen/novatek,nvt-ts.yaml+62−0
@@ -0,0 +1,62 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/input/touchscreen/novatek,nvt-ts.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Novatek NVT Touchscreen Controller
8
9maintainers:
10 - Hans de Goede <hdegoede@redhat.com>
11
12allOf:
13 - $ref: touchscreen.yaml#
14
15properties:
16 compatible:
17 enum:
18 - novatek,nt11205-ts
19 - novatek,nt36672a-ts
20
21 reg:
22 maxItems: 1
23
24 interrupts:
25 maxItems: 1
26
27 reset-gpios:
28 maxItems: 1
29
30 vcc-supply: true
31 iovcc-supply: true
32
33required:
34 - compatible
35 - reg
36 - interrupts
37
38unevaluatedProperties: false
39
40examples:
41 - |
42 #include <dt-bindings/gpio/gpio.h>
43 #include <dt-bindings/interrupt-controller/arm-gic.h>
44 i2c {
45 #address-cells = <1>;
46 #size-cells = <0>;
47 touchscreen@1 {
48 compatible = "novatek,nt36672a-ts";
49 reg = <0x01>;
50 interrupts-extended = <&tlmm 31 IRQ_TYPE_EDGE_RISING>;
51 reset-gpios = <&tlmm 32 GPIO_ACTIVE_LOW>;
52 vcc-supply = <&vreg_l22a_2p85>;
53 iovcc-supply = <&vreg_l14a_1p8>;
54 pinctrl-0 = <&ts_int_default &ts_reset_default>;
55 pinctrl-1 = <&ts_int_sleep &ts_reset_sleep>;
56 pinctrl-names = "default", "sleep";
57 touchscreen-size-x = <1080>;
58 touchscreen-size-y = <2246>;
59 };
60 };
61
62...
Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml+2−0
@@ -26,6 +26,7 @@ properties: · 25 unmodified lines
26 - items:26 - items:
27 - enum:27 - enum:
28 - qcom,qcm2290-cpu-bwmon28 - qcom,qcm2290-cpu-bwmon
29 - qcom,qcs8300-cpu-bwmon
29 - qcom,sa8775p-cpu-bwmon30 - qcom,sa8775p-cpu-bwmon
30 - qcom,sc7180-cpu-bwmon31 - qcom,sc7180-cpu-bwmon
31 - qcom,sc7280-cpu-bwmon32 - qcom,sc7280-cpu-bwmon
@@ -40,6 +41,7 @@ properties: · 8 unmodified lines
40 - const: qcom,sdm845-bwmon # BWMON v4, unified register space41 - const: qcom,sdm845-bwmon # BWMON v4, unified register space
41 - items:42 - items:
42 - enum:43 - enum:
44 - qcom,qcs8300-llcc-bwmon
43 - qcom,sa8775p-llcc-bwmon45 - qcom,sa8775p-llcc-bwmon
44 - qcom,sc7180-llcc-bwmon46 - qcom,sc7180-llcc-bwmon
45 - qcom,sc8280xp-llcc-bwmon47 - qcom,sc8280xp-llcc-bwmon
Documentation/devicetree/bindings/interconnect/qcom,qcs615-rpmh.yaml+73−0
@@ -0,0 +1,73 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interconnect/qcom,qcs615-rpmh.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm RPMh Network-On-Chip Interconnect on QCS615
8
9maintainers:
10 - Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
11
12description: |
13 RPMh interconnect providers support system bandwidth requirements through
14 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
15 able to communicate with the BCM through the Resource State Coordinator (RSC)
16 associated with each execution environment. Provider nodes must point to at
17 least one RPMh device child node pertaining to their RSC and each provider
18 can map to multiple RPMh resources.
19
20 See also: include/dt-bindings/interconnect/qcom,qcs615-rpmh.h
21
22properties:
23 compatible:
24 enum:
25 - qcom,qcs615-aggre1-noc
26 - qcom,qcs615-camnoc-virt
27 - qcom,qcs615-config-noc
28 - qcom,qcs615-dc-noc
29 - qcom,qcs615-gem-noc
30 - qcom,qcs615-ipa-virt
31 - qcom,qcs615-mc-virt
32 - qcom,qcs615-mmss-noc
33 - qcom,qcs615-system-noc
34
35 reg:
36 maxItems: 1
37
38required:
39 - compatible
40
41allOf:
42 - $ref: qcom,rpmh-common.yaml#
43 - if:
44 properties:
45 compatible:
46 contains:
47 enum:
48 - qcom,qcs615-camnoc-virt
49 - qcom,qcs615-ipa-virt
50 - qcom,qcs615-mc-virt
51 then:
52 properties:
53 reg: false
54 else:
55 required:
56 - reg
57
58unevaluatedProperties: false
59
60examples:
61 - |
62 gem_noc: interconnect@9680000 {
63 compatible = "qcom,qcs615-gem-noc";
64 reg = <0x9680000 0x3e200>;
65 #interconnect-cells = <2>;
66 qcom,bcm-voters = <&apps_bcm_voter>;
67 };
68
69 mc_virt: interconnect-2 {
70 compatible = "qcom,qcs615-mc-virt";
71 #interconnect-cells = <2>;
72 qcom,bcm-voters = <&apps_bcm_voter>;
73 };
Documentation/devicetree/bindings/interconnect/qcom,qcs8300-rpmh.yaml+72−0
@@ -0,0 +1,72 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interconnect/qcom,qcs8300-rpmh.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm RPMh Network-On-Chip Interconnect on QCS8300
8
9maintainers:
10 - Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
11
12description: |
13 RPMh interconnect providers support system bandwidth requirements through
14 RPMh hardware accelerators known as Bus Clock Manager (BCM).
15
16 See also: include/dt-bindings/interconnect/qcom,qcs8300-rpmh.h
17
18properties:
19 compatible:
20 enum:
21 - qcom,qcs8300-aggre1-noc
22 - qcom,qcs8300-aggre2-noc
23 - qcom,qcs8300-clk-virt
24 - qcom,qcs8300-config-noc
25 - qcom,qcs8300-dc-noc
26 - qcom,qcs8300-gem-noc
27 - qcom,qcs8300-gpdsp-anoc
28 - qcom,qcs8300-lpass-ag-noc
29 - qcom,qcs8300-mc-virt
30 - qcom,qcs8300-mmss-noc
31 - qcom,qcs8300-nspa-noc
32 - qcom,qcs8300-pcie-anoc
33 - qcom,qcs8300-system-noc
34
35 reg:
36 maxItems: 1
37
38required:
39 - compatible
40
41allOf:
42 - $ref: qcom,rpmh-common.yaml#
43 - if:
44 properties:
45 compatible:
46 contains:
47 enum:
48 - qcom,qcs8300-clk-virt
49 - qcom,qcs8300-mc-virt
50 then:
51 properties:
52 reg: false
53 else:
54 required:
55 - reg
56
57unevaluatedProperties: false
58
59examples:
60 - |
61 gem_noc: interconnect@9100000 {
62 compatible = "qcom,qcs8300-gem-noc";
63 reg = <0x9100000 0xf7080>;
64 #interconnect-cells = <2>;
65 qcom,bcm-voters = <&apps_bcm_voter>;
66 };
67
68 clk_virt: interconnect-0 {
69 compatible = "qcom,qcs8300-clk-virt";
70 #interconnect-cells = <2>;
71 qcom,bcm-voters = <&apps_bcm_voter>;
72 };
Documentation/devicetree/bindings/interconnect/qcom,sar2130p-rpmh.yaml+117−0
@@ -0,0 +1,117 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interconnect/qcom,sar2130p-rpmh.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm RPMh Network-On-Chip Interconnect on SAR2130P
8
9maintainers:
10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
11 - Georgi Djakov <djakov@kernel.org>
12
13description: |
14 RPMh interconnect providers support system bandwidth requirements through
15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
16 able to communicate with the BCM through the Resource State Coordinator (RSC)
17 associated with each execution environment. Provider nodes must point to at
18 least one RPMh device child node pertaining to their RSC and each provider
19 can map to multiple RPMh resources.
20
21 See also:: include/dt-bindings/interconnect/qcom,sar2130p-rpmh.h
22
23properties:
24 compatible:
25 enum:
26 - qcom,sar2130p-clk-virt
27 - qcom,sar2130p-config-noc
28 - qcom,sar2130p-gem-noc
29 - qcom,sar2130p-lpass-ag-noc
30 - qcom,sar2130p-mc-virt
31 - qcom,sar2130p-mmss-noc
32 - qcom,sar2130p-nsp-noc
33 - qcom,sar2130p-pcie-anoc
34 - qcom,sar2130p-system-noc
35
36 reg:
37 maxItems: 1
38
39 clocks:
40 minItems: 1
41 maxItems: 2
42
43required:
44 - compatible
45
46allOf:
47 - $ref: qcom,rpmh-common.yaml#
48 - if:
49 properties:
50 compatible:
51 contains:
52 enum:
53 - qcom,sar2130p-clk-virt
54 - qcom,sar2130p-mc-virt
55 then:
56 properties:
57 reg: false
58 else:
59 required:
60 - reg
61
62 - if:
63 properties:
64 compatible:
65 contains:
66 enum:
67 - qcom,sar2130p-pcie-anoc
68 then:
69 properties:
70 clocks:
71 items:
72 - description: aggre-NOC PCIe AXI clock
73 - description: cfg-NOC PCIe a-NOC AHB clock
74
75 - if:
76 properties:
77 compatible:
78 contains:
79 enum:
80 - qcom,sar2130p-system-noc
81 then:
82 properties:
83 clocks:
84 items:
85 - description: aggre USB3 PRIM AXI clock
86
87 - if:
88 properties:
89 compatible:
90 contains:
91 enum:
92 - qcom,sar2130p-system-noc
93 - qcom,sar2130p-pcie-anoc
94 then:
95 required:
96 - clocks
97 else:
98 properties:
99 clocks: false
100
101unevaluatedProperties: false
102
103examples:
104 - |
105 clk_virt: interconnect-0 {
106 compatible = "qcom,sar2130p-clk-virt";
107 #interconnect-cells = <2>;
108 qcom,bcm-voters = <&apps_bcm_voter>;
109 };
110
111 aggre1_noc: interconnect@1680000 {
112 compatible = "qcom,sar2130p-system-noc";
113 reg = <0x01680000 0x29080>;
114 #interconnect-cells = <2>;
115 clocks = <&gcc_prim_axi_clk>;
116 qcom,bcm-voters = <&apps_bcm_voter>;
117 };
Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml+8−5
@@ -15,6 +15,8 @@ properties: · 14 unmodified lines
15 15
16 reg:16 reg:
17 oneOf:17 oneOf:
18 - items:
19 - description: mailbox data registers
18 - items:20 - items:
19 - description: mailbox control & data registers21 - description: mailbox control & data registers
20 - description: mailbox interrupt registers22 - description: mailbox interrupt registers
@@ -23,6 +25,7 @@ properties: · 2 unmodified lines
23 - description: mailbox control registers25 - description: mailbox control registers
24 - description: mailbox interrupt registers26 - description: mailbox interrupt registers
25 - description: mailbox data registers27 - description: mailbox data registers
28 deprecated: true
26 29
27 interrupts:30 interrupts:
28 maxItems: 131 maxItems: 1
@@ -41,12 +44,12 @@ additionalProperties: false · 12 unmodified lines
41examples:44examples:
42 - |45 - |
43 soc {46 soc {
44 #address-cells = <2>;47 #address-cells = <1>;
45 #size-cells = <2>;48 #size-cells = <1>;
46 mbox: mailbox@37020000 {49
50 mailbox@37020800 {
47 compatible = "microchip,mpfs-mailbox";51 compatible = "microchip,mpfs-mailbox";
48 reg = <0x0 0x37020000 0x0 0x58>, <0x0 0x2000318C 0x0 0x40>,52 reg = <0x37020800 0x100>;
49 <0x0 0x37020800 0x0 0x100>;
50 interrupt-parent = <&L1>;53 interrupt-parent = <&L1>;
51 interrupts = <96>;54 interrupts = <96>;
52 #mbox-cells = <1>;55 #mbox-cells = <1>;
Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml+7−6
@@ -165,12 +165,13 @@ allOf: · 164 unmodified lines
165 - if:165 - if:
166 properties:166 properties:
167 compatible:167 compatible:
168 enum:168 contains:
169 - qcom,msm8953-apcs-kpss-global169 enum:
170 - qcom,msm8994-apcs-kpss-global170 - qcom,msm8953-apcs-kpss-global
171 - qcom,msm8996-apcs-hmss-global171 - qcom,msm8994-apcs-kpss-global
172 - qcom,qcm2290-apcs-hmss-global172 - qcom,msm8996-apcs-hmss-global
173 - qcom,sdm845-apss-shared173 - qcom,qcm2290-apcs-hmss-global
174 - qcom,sdm845-apss-shared
174 then:175 then:
175 properties:176 properties:
176 clocks: false177 clocks: false
Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml+2−0
@@ -28,6 +28,7 @@ properties: · 27 unmodified lines
28 - qcom,qdu1000-ipcc28 - qcom,qdu1000-ipcc
29 - qcom,sa8255p-ipcc29 - qcom,sa8255p-ipcc
30 - qcom,sa8775p-ipcc30 - qcom,sa8775p-ipcc
31 - qcom,sar2130p-ipcc
31 - qcom,sc7280-ipcc32 - qcom,sc7280-ipcc
32 - qcom,sc8280xp-ipcc33 - qcom,sc8280xp-ipcc
33 - qcom,sdx75-ipcc34 - qcom,sdx75-ipcc
@@ -38,6 +39,7 @@ properties: · 4 unmodified lines
38 - qcom,sm8450-ipcc39 - qcom,sm8450-ipcc
39 - qcom,sm8550-ipcc40 - qcom,sm8550-ipcc
40 - qcom,sm8650-ipcc41 - qcom,sm8650-ipcc
42 - qcom,sm8750-ipcc
41 - qcom,x1e80100-ipcc43 - qcom,x1e80100-ipcc
42 - const: qcom,ipcc44 - const: qcom,ipcc
43 45
Documentation/devicetree/bindings/mailbox/thead,th1520-mbox.yaml+89−0
@@ -0,0 +1,89 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mailbox/thead,th1520-mbox.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: T-head TH1520 Mailbox Controller
8
9description:
10 The T-head mailbox controller enables communication and coordination between
11 cores within the SoC by passing messages (e.g., data, status, and control)
12 through mailbox channels. It also allows one core to signal another processor
13 using interrupts via the Interrupt Controller Unit (ICU).
14
15maintainers:
16 - Michal Wilczynski <m.wilczynski@samsung.com>
17
18properties:
19 compatible:
20 const: thead,th1520-mbox
21
22 clocks:
23 items:
24 - description: Clock for the local mailbox
25 - description: Clock for remote ICU 0
26 - description: Clock for remote ICU 1
27 - description: Clock for remote ICU 2
28
29 clock-names:
30 items:
31 - const: clk-local
32 - const: clk-remote-icu0
33 - const: clk-remote-icu1
34 - const: clk-remote-icu2
35
36 reg:
37 items:
38 - description: Mailbox local base address
39 - description: Remote ICU 0 base address
40 - description: Remote ICU 1 base address
41 - description: Remote ICU 2 base address
42
43 reg-names:
44 items:
45 - const: local
46 - const: remote-icu0
47 - const: remote-icu1
48 - const: remote-icu2
49
50 interrupts:
51 maxItems: 1
52
53 '#mbox-cells':
54 const: 1
55 description:
56 The one and only cell describes destination CPU ID.
57
58required:
59 - compatible
60 - clocks
61 - clock-names
62 - reg
63 - reg-names
64 - interrupts
65 - '#mbox-cells'
66
67additionalProperties: false
68
69examples:
70 - |
71 #include <dt-bindings/clock/thead,th1520-clk-ap.h>
72 soc {
73 #address-cells = <2>;
74 #size-cells = <2>;
75 mailbox@ffffc38000 {
76 compatible = "thead,th1520-mbox";
77 reg = <0xff 0xffc38000 0x0 0x4000>,
78 <0xff 0xffc44000 0x0 0x1000>,
79 <0xff 0xffc4c000 0x0 0x1000>,
80 <0xff 0xffc54000 0x0 0x1000>;
81 reg-names = "local", "remote-icu0", "remote-icu1", "remote-icu2";
82 clocks = <&clk CLK_MBOX0>, <&clk CLK_MBOX1>, <&clk CLK_MBOX2>,
83 <&clk CLK_MBOX3>;
84 clock-names = "clk-local", "clk-remote-icu0", "clk-remote-icu1",
85 "clk-remote-icu2";
86 interrupts = <28>;
87 #mbox-cells = <1>;
88 };
89 };
Documentation/devicetree/bindings/mfd/airoha,en7581-gpio-sysctl.yaml+90−0
@@ -0,0 +1,90 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mfd/airoha,en7581-gpio-sysctl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Airoha EN7581 GPIO System Controller
8
9maintainers:
10 - Christian Marangi <ansuelsmth@gmail.com>
11 - Lorenzo Bianconi <lorenzo@kernel.org>
12
13description:
14 Airoha EN7581 SoC GPIO system controller which provided a register map
15 for controlling the GPIO, pins and PWM of the SoC.
16
17properties:
18 compatible:
19 items:
20 - const: airoha,en7581-gpio-sysctl
21 - const: syscon
22 - const: simple-mfd
23
24 reg:
25 maxItems: 1
26
27 pinctrl:
28 type: object
29 $ref: /schemas/pinctrl/airoha,en7581-pinctrl.yaml
30 description:
31 Child node definition for EN7581 Pin controller
32
33 pwm:
34 type: object
35 $ref: /schemas/pwm/airoha,en7581-pwm.yaml
36 description:
37 Child node definition for EN7581 PWM controller
38
39required:
40 - compatible
41 - reg
42
43additionalProperties: false
44
45examples:
46 - |
47 #include <dt-bindings/interrupt-controller/arm-gic.h>
48
49 system-controller@1fbf0200 {
50 compatible = "airoha,en7581-gpio-sysctl", "syscon", "simple-mfd";
51 reg = <0x1fbf0200 0xc0>;
52
53 pinctrl {
54 compatible = "airoha,en7581-pinctrl";
55
56 interrupt-parent = <&gic>;
57 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
58
59 gpio-controller;
60 #gpio-cells = <2>;
61
62 interrupt-controller;
63 #interrupt-cells = <2>;
64
65 mmc-pins {
66 mux {
67 function = "emmc";
68 groups = "emmc";
69 };
70 };
71
72 mdio-pins {
73 mux {
74 function = "mdio";
75 groups = "mdio";
76 };
77
78 conf {
79 pins = "gpio2";
80 output-enable;
81 };
82 };
83 };
84
85 pwm {
86 compatible = "airoha,en7581-pwm";
87
88 #pwm-cells = <3>;
89 };
90 };
Documentation/devicetree/bindings/nvmem/renesas,rcar-efuse.yamlrenamed from Documentation/devicetree/bindings/fuse/renesas,rcar-efuse.yaml+24−11
@@ -1,7 +1,7 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.22%YAML 1.2
3---3---
4$id: http://devicetree.org/schemas/fuse/renesas,rcar-efuse.yaml#4$id: http://devicetree.org/schemas/nvmem/renesas,rcar-efuse.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7title: R-Car E-FUSE connected to PFC7title: R-Car E-FUSE connected to PFC
@@ -13,6 +13,9 @@ description: · 5 unmodified lines
13 The E-FUSE is a type of non-volatile memory, which is accessible through the13 The E-FUSE is a type of non-volatile memory, which is accessible through the
14 Pin Function Controller (PFC) on some R-Car Gen4 SoCs.14 Pin Function Controller (PFC) on some R-Car Gen4 SoCs.
15 15
16allOf:
17 - $ref: nvmem.yaml#
18
16properties:19properties:
17 compatible:20 compatible:
18 enum:21 enum:
@@ -39,17 +42,27 @@ required: · 20 unmodified lines
39 - power-domains42 - power-domains
40 - resets43 - resets
41 44
42additionalProperties: false45unevaluatedProperties: false
43 46
44examples:47examples:
45 - |48 - |
46 #include <dt-bindings/clock/r8a779a0-cpg-mssr.h>49 #include <dt-bindings/clock/r8a779f0-cpg-mssr.h>
47 #include <dt-bindings/power/r8a779a0-sysc.h>50 #include <dt-bindings/power/r8a779f0-sysc.h>
48 51
49 fuse: fuse@e6078800 {52 fuse@e6078800 {
50 compatible = "renesas,r8a779a0-efuse";53 compatible = "renesas,r8a779f0-efuse";
51 reg = <0xe6078800 0x100>;54 reg = <0xe6078800 0x200>;
52 clocks = <&cpg CPG_MOD 916>;55 clocks = <&cpg CPG_MOD 915>;
53 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;56 power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
54 resets = <&cpg 916>;57 resets = <&cpg 915>;
58
59 nvmem-layout {
60 compatible = "fixed-layout";
61 #address-cells = <1>;
62 #size-cells = <1>;
63
64 calib@144 {
65 reg = <0x144 0x08>;
66 };
67 };
55 };68 };
Documentation/devicetree/bindings/nvmem/renesas,rcar-otp.yamlrenamed from Documentation/devicetree/bindings/fuse/renesas,rcar-otp.yaml+11−6
@@ -1,7 +1,7 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.22%YAML 1.2
3---3---
4$id: http://devicetree.org/schemas/fuse/renesas,rcar-otp.yaml#4$id: http://devicetree.org/schemas/nvmem/renesas,rcar-otp.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7title: R-Car E-FUSE connected to OTP_MEM7title: R-Car E-FUSE connected to OTP_MEM
@@ -13,6 +13,9 @@ description: · 5 unmodified lines
13 The E-FUSE is a type of non-volatile memory, which is accessible through the13 The E-FUSE is a type of non-volatile memory, which is accessible through the
14 One-Time Programmable Memory (OTP_MEM) module on some R-Car Gen4 SoCs.14 One-Time Programmable Memory (OTP_MEM) module on some R-Car Gen4 SoCs.
15 15
16allOf:
17 - $ref: nvmem.yaml#
18
16properties:19properties:
17 compatible:20 compatible:
18 enum:21 enum:
@@ -22,17 +25,19 @@ properties: · 3 unmodified lines
22 reg:25 reg:
23 items:26 items:
24 - description: OTP_MEM_027 - description: OTP_MEM_0
25 - description: OTP_MEM_128 - description: OTP_MEM_1.
29 The addresses of cells defined under the optional nvmem-layout
30 subnode are relative to this register bank.
26 31
27required:32required:
28 - compatible33 - compatible
29 - reg34 - reg
30 35
31additionalProperties: false36unevaluatedProperties: false
32 37
33examples:38examples:
34 - |39 - |
35 otp: otp@e61be000 {40 otp@e61be000 {
36 compatible = "renesas,r8a779g0-otp";41 compatible = "renesas,r8a779g0-otp";
37 reg = <0xe61be000 0x1000>, <0xe61bf000 0x1000>;42 reg = <0xe61be000 0x1000>, <0xe61bf000 0x1000>;
38 };43 };
Documentation/devicetree/bindings/nvmem/sc27xx-efuse.txt+0−52
@@ -1,52 +0,0 @@
1= Spreadtrum SC27XX PMIC eFuse device tree bindings =
2
3Required properties:
4- compatible: Should be one of the following.
5 "sprd,sc2720-efuse"
6 "sprd,sc2721-efuse"
7 "sprd,sc2723-efuse"
8 "sprd,sc2730-efuse"
9 "sprd,sc2731-efuse"
10- reg: Specify the address offset of efuse controller.
11- hwlocks: Reference to a phandle of a hwlock provider node.
12
13= Data cells =
14Are child nodes of eFuse, bindings of which as described in
15bindings/nvmem/nvmem.txt
16
17Example:
18
19 sc2731_pmic: pmic@0 {
20 compatible = "sprd,sc2731";
21 reg = <0>;
22 spi-max-frequency = <26000000>;
23 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
24 interrupt-controller;
25 #interrupt-cells = <2>;
26 #address-cells = <1>;
27 #size-cells = <0>;
28
29 efuse@380 {
30 compatible = "sprd,sc2731-efuse";
31 reg = <0x380>;
32 #address-cells = <1>;
33 #size-cells = <1>;
34 hwlocks = <&hwlock 12>;
35
36 /* Data cells */
37 thermal_calib: calib@10 {
38 reg = <0x10 0x2>;
39 };
40 };
41 };
42
43= Data consumers =
44Are device nodes which consume nvmem data cells.
45
46Example:
47
48 thermal {
49 ...
50 nvmem-cells = <&thermal_calib>;
51 nvmem-cell-names = "calibration";
52 };
Documentation/devicetree/bindings/nvmem/sprd,sc2731-efuse.yaml+68−0
@@ -0,0 +1,68 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/nvmem/sprd,sc2731-efuse.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Spreadtrum SC27XX PMIC eFuse
8
9maintainers:
10 - Orson Zhai <orsonzhai@gmail.com>
11 - Baolin Wang <baolin.wang7@gmail.com>
12 - Chunyan Zhang <zhang.lyra@gmail.com>
13
14properties:
15 compatible:
16 enum:
17 - sprd,sc2720-efuse
18 - sprd,sc2721-efuse
19 - sprd,sc2723-efuse
20 - sprd,sc2730-efuse
21 - sprd,sc2731-efuse
22
23 reg:
24 maxItems: 1
25
26 hwlocks:
27 maxItems: 1
28
29required:
30 - compatible
31 - reg
32 - hwlocks
33
34allOf:
35 - $ref: nvmem.yaml#
36 - $ref: nvmem-deprecated-cells.yaml#
37
38unevaluatedProperties: false
39
40examples:
41 - |
42 pmic {
43 #address-cells = <1>;
44 #size-cells = <0>;
45
46 efuse@380 {
47 compatible = "sprd,sc2731-efuse";
48 reg = <0x380>;
49 hwlocks = <&hwlock 12>;
50 #address-cells = <1>;
51 #size-cells = <1>;
52
53 /* Data cells */
54 fgu_calib: calib@6 {
55 reg = <0x6 0x2>;
56 bits = <0 9>;
57 };
58
59 adc_big_scale: calib@24 {
60 reg = <0x24 0x2>;
61 };
62
63 adc_small_scale: calib@26 {
64 reg = <0x26 0x2>;
65 };
66 };
67 };
68...
Documentation/devicetree/bindings/nvmem/sprd,ums312-efuse.yaml+61−0
@@ -0,0 +1,61 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/nvmem/sprd,ums312-efuse.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Spreadtrum UMS312 eFuse
8
9maintainers:
10 - Orson Zhai <orsonzhai@gmail.com>
11 - Baolin Wang <baolin.wang7@gmail.com>
12 - Chunyan Zhang <zhang.lyra@gmail.com>
13
14properties:
15 compatible:
16 const: sprd,ums312-efuse
17
18 reg:
19 maxItems: 1
20
21 clocks:
22 maxItems: 1
23
24 clock-names:
25 const: enable
26
27 hwlocks:
28 maxItems: 1
29
30required:
31 - compatible
32 - reg
33 - clocks
34 - clock-names
35 - hwlocks
36
37allOf:
38 - $ref: nvmem.yaml#
39 - $ref: nvmem-deprecated-cells.yaml#
40
41unevaluatedProperties: false
42
43examples:
44 - |
45 #include <dt-bindings/clock/sprd,ums512-clk.h>
46
47 efuse@32240000 {
48 compatible = "sprd,ums312-efuse";
49 reg = <0x32240000 0x10000>;
50 clocks = <&aonapb_gate CLK_EFUSE_EB>;
51 clock-names = "enable";
52 hwlocks = <&hwlock 8>;
53 #address-cells = <1>;
54 #size-cells = <1>;
55
56 /* Data cells */
57 thermal_calib: calib@10 {
58 reg = <0x10 0x2>;
59 };
60 };
61...
Documentation/devicetree/bindings/nvmem/sprd-efuse.txt+0−39
@@ -1,39 +0,0 @@
1= Spreadtrum eFuse device tree bindings =
2
3Required properties:
4- compatible: Should be "sprd,ums312-efuse".
5- reg: Specify the address offset of efuse controller.
6- clock-names: Should be "enable".
7- clocks: The phandle and specifier referencing the controller's clock.
8- hwlocks: Reference to a phandle of a hwlock provider node.
9
10= Data cells =
11Are child nodes of eFuse, bindings of which as described in
12bindings/nvmem/nvmem.txt
13
14Example:
15
16 ap_efuse: efuse@32240000 {
17 compatible = "sprd,ums312-efuse";
18 reg = <0 0x32240000 0 0x10000>;
19 clock-names = "enable";
20 hwlocks = <&hwlock 8>;
21 clocks = <&aonapb_gate CLK_EFUSE_EB>;
22
23 /* Data cells */
24 thermal_calib: calib@10 {
25 reg = <0x10 0x2>;
26 };
27 };
28
29= Data consumers =
30Are device nodes which consume nvmem data cells.
31
32Example:
33
34 thermal {
35 ...
36
37 nvmem-cells = <&thermal_calib>;
38 nvmem-cell-names = "calibration";
39 };
Documentation/devicetree/bindings/nvmem/zii,rave-sp-eeprom.txt+0−40
@@ -1,40 +0,0 @@
1Zodiac Inflight Innovations RAVE EEPROM Bindings
2
3RAVE SP EEPROM device is a "MFD cell" device exposing physical EEPROM
4attached to RAVE Supervisory Processor. It is expected that its Device
5Tree node is specified as a child of the node corresponding to the
6parent RAVE SP device (as documented in
7Documentation/devicetree/bindings/mfd/zii,rave-sp.txt)
8
9Required properties:
10
11- compatible: Should be "zii,rave-sp-eeprom"
12
13Optional properties:
14
15- zii,eeprom-name: Unique EEPROM identifier describing its function in the
16 system. Will be used as created NVMEM deivce's name.
17
18Data cells:
19
20Data cells are child nodes of eerpom node, bindings for which are
21documented in Documentation/devicetree/bindings/nvmem/nvmem.txt
22
23Example:
24
25 rave-sp {
26 compatible = "zii,rave-sp-rdu1";
27 current-speed = <38400>;
28
29 eeprom@a4 {
30 compatible = "zii,rave-sp-eeprom";
31 reg = <0xa4 0x4000>;
32 #address-cells = <1>;
33 #size-cells = <1>;
34 zii,eeprom-name = "main-eeprom";
35
36 wdt_timeout: wdt-timeout@81 {
37 reg = <0x81 2>;
38 };
39 };
40 }
Documentation/devicetree/bindings/nvmem/zii,rave-sp-eeprom.yaml+54−0
@@ -0,0 +1,54 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/nvmem/zii,rave-sp-eeprom.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Zodiac Inflight Innovations RAVE EEPROM
8
9maintainers:
10 - Frank Li <Frank.Li@nxp.com>
11
12description:
13 RAVE SP EEPROM device is a "MFD cell" device exposing physical EEPROM
14 attached to RAVE Supervisory Processor. It is expected that its Device
15 Tree node is specified as a child of the node corresponding to the
16 parent RAVE SP device (as documented in
17 Documentation/devicetree/bindings/mfd/zii,rave-sp.yaml)
18
19properties:
20 compatible:
21 const: zii,rave-sp-eeprom
22
23 reg:
24 maxItems: 1
25
26 zii,eeprom-name:
27 $ref: /schemas/types.yaml#/definitions/string
28 description:
29 Unique EEPROM identifier describing its function in the
30 system. Will be used as created NVMEM deivce's name.
31
32required:
33 - compatible
34
35allOf:
36 - $ref: nvmem.yaml#
37 - $ref: nvmem-deprecated-cells.yaml#
38
39unevaluatedProperties: false
40
41examples:
42 - |
43 eeprom@a4 {
44 compatible = "zii,rave-sp-eeprom";
45 reg = <0xa4 0x4000>;
46 #address-cells = <1>;
47 #size-cells = <1>;
48 zii,eeprom-name = "main-eeprom";
49
50 wdt-timeout@81 {
51 reg = <0x81 2>;
52 };
53 };
54
Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml+19−1
@@ -45,7 +45,25 @@ patternProperties: · 44 unmodified lines
45 clock-latency-ns: true45 clock-latency-ns: true
46 opp-hz: true46 opp-hz: true
47 opp-microvolt: true47 opp-microvolt: true
48 opp-supported-hw: true48 opp-supported-hw:
49 items:
50 items:
51 - description:
52 The revision of the SoC the OPP is supported by.
53 This can be easily obtained from the datasheet of the
54 part being ordered/used. For example, it will be 0x01 for SR1.0
55
56 - description:
57 The eFuse bits that indicate the particular OPP is available.
58 The device datasheet has a table talking about Device Speed Grades.
59 This table is to be sorted with only the unique elements of the
60 MAXIMUM OPERATING FREQUENCY starting from the first row which
61 tells the lowest OPP, to the highest. The corresponding bits
62 need to be set based on N elements of speed grade the device supports.
63 So, if there are 3 possible unique MAXIMUM OPERATING FREQUENCY
64 in the table, then BIT(0) | (1) | (2) will be set, which means
65 the value shall be 0x7.
66
49 opp-suspend: true67 opp-suspend: true
50 turbo-mode: true68 turbo-mode: true
51 69
Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml+3−2
@@ -149,7 +149,7 @@ allOf: · 148 unmodified lines
149 then:149 then:
150 properties:150 properties:
151 clocks:151 clocks:
152 minItems: 4152 minItems: 6
153 153
154 clock-names:154 clock-names:
155 items:155 items:
@@ -178,7 +178,7 @@ allOf: · 22 unmodified lines
178 then:178 then:
179 properties:179 properties:
180 clocks:180 clocks:
181 minItems: 4181 minItems: 6
182 182
183 clock-names:183 clock-names:
184 items:184 items:
@@ -207,6 +207,7 @@ allOf: · 22 unmodified lines
207 properties:207 properties:
208 clocks:208 clocks:
209 minItems: 4209 minItems: 4
210 maxItems: 4
210 211
211 clock-names:212 clock-names:
212 items:213 items:
Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml+9−2
@@ -17,6 +17,12 @@ properties: · 16 unmodified lines
17 compatible:17 compatible:
18 const: microchip,pcie-host-1.0 # PolarFire18 const: microchip,pcie-host-1.0 # PolarFire
19 19
20 reg:
21 minItems: 3
22
23 reg-names:
24 minItems: 3
25
20 clocks:26 clocks:
21 description:27 description:
22 Fabric Interface Controllers, FICs, are the interface between the FPGA28 Fabric Interface Controllers, FICs, are the interface between the FPGA
@@ -62,8 +68,9 @@ examples: · 39 unmodified lines
62 pcie0: pcie@2030000000 {68 pcie0: pcie@2030000000 {
63 compatible = "microchip,pcie-host-1.0";69 compatible = "microchip,pcie-host-1.0";
64 reg = <0x0 0x70000000 0x0 0x08000000>,70 reg = <0x0 0x70000000 0x0 0x08000000>,
65 <0x0 0x43000000 0x0 0x00010000>;71 <0x0 0x43008000 0x0 0x00002000>,
66 reg-names = "cfg", "apb";72 <0x0 0x4300a000 0x0 0x00002000>;
73 reg-names = "cfg", "bridge", "ctrl";
67 device_type = "pci";74 device_type = "pci";
68 #address-cells = <3>;75 #address-cells = <3>;
69 #size-cells = <2>;76 #size-cells = <2>;
Documentation/devicetree/bindings/pci/plda,xpressrich3-axi-common.yaml+10−4
@@ -18,12 +18,18 @@ allOf: · 17 unmodified lines
18 18
19properties:19properties:
20 reg:20 reg:
21 maxItems: 221 maxItems: 3
22 minItems: 2
22 23
23 reg-names:24 reg-names:
24 items:25 oneOf:
25 - const: cfg26 - items:
26 - const: apb27 - const: cfg
28 - const: apb
29 - items:
30 - const: cfg
31 - const: bridge
32 - const: ctrl
27 33
28 interrupts:34 interrupts:
29 minItems: 135 minItems: 1
Documentation/devicetree/bindings/pci/qcom,pcie-common.yaml+4−0
@@ -81,6 +81,10 @@ properties: · 80 unmodified lines
81 vddpe-3v3-supply:81 vddpe-3v3-supply:
82 description: PCIe endpoint power supply82 description: PCIe endpoint power supply
83 83
84 operating-points-v2: true
85 opp-table:
86 type: object
87
84required:88required:
85 - reg89 - reg
86 - reg-names90 - reg-names
Documentation/devicetree/bindings/pci/qcom,pcie-sm8450.yaml+0−4
@@ -70,10 +70,6 @@ properties: · 69 unmodified lines
70 - const: msi770 - const: msi7
71 - const: global71 - const: global
72 72
73 operating-points-v2: true
74 opp-table:
75 type: object
76
77 resets:73 resets:
78 maxItems: 174 maxItems: 1
79 75
Documentation/devicetree/bindings/pci/qcom,pcie-sm8550.yaml+3−1
@@ -20,6 +20,7 @@ properties: · 19 unmodified lines
20 - const: qcom,pcie-sm855020 - const: qcom,pcie-sm8550
21 - items:21 - items:
22 - enum:22 - enum:
23 - qcom,sar2130p-pcie
23 - qcom,pcie-sm865024 - qcom,pcie-sm8650
24 - const: qcom,pcie-sm855025 - const: qcom,pcie-sm8550
25 26
@@ -39,7 +40,7 @@ properties: · 13 unmodified lines
39 40
40 clocks:41 clocks:
41 minItems: 742 minItems: 7
42 maxItems: 843 maxItems: 9
43 44
44 clock-names:45 clock-names:
45 minItems: 746 minItems: 7
@@ -52,6 +53,7 @@ properties: · 6 unmodified lines
52 - const: ddrss_sf_tbu # PCIe SF TBU clock53 - const: ddrss_sf_tbu # PCIe SF TBU clock
53 - const: noc_aggr # Aggre NoC PCIe AXI clock54 - const: noc_aggr # Aggre NoC PCIe AXI clock
54 - const: cnoc_sf_axi # Config NoC PCIe1 AXI clock55 - const: cnoc_sf_axi # Config NoC PCIe1 AXI clock
56 - const: qmip_pcie_ahb # QMIP PCIe AHB clock
55 57
56 interrupts:58 interrupts:
57 minItems: 859 minItems: 8
Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml+6−3
@@ -47,9 +47,10 @@ properties: · 46 unmodified lines
47 47
48 interrupts:48 interrupts:
49 minItems: 849 minItems: 8
50 maxItems: 850 maxItems: 9
51 51
52 interrupt-names:52 interrupt-names:
53 minItems: 8
53 items:54 items:
54 - const: msi055 - const: msi0
55 - const: msi156 - const: msi1
@@ -59,6 +60,7 @@ properties: · 3 unmodified lines
59 - const: msi560 - const: msi5
60 - const: msi661 - const: msi6
61 - const: msi762 - const: msi7
63 - const: global
62 64
63 resets:65 resets:
64 minItems: 166 minItems: 1
@@ -130,9 +132,10 @@ examples: · 65 unmodified lines
130 <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,132 <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
131 <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,133 <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
132 <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,134 <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
133 <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;135 <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
136 <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
134 interrupt-names = "msi0", "msi1", "msi2", "msi3",137 interrupt-names = "msi0", "msi1", "msi2", "msi3",
135 "msi4", "msi5", "msi6", "msi7";138 "msi4", "msi5", "msi6", "msi7", "global";
136 #interrupt-cells = <1>;139 #interrupt-cells = <1>;
137 interrupt-map-mask = <0 0 0 0x7>;140 interrupt-map-mask = <0 0 0 0x7>;
138 interrupt-map = <0 0 0 1 &intc 0 0 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */141 interrupt-map = <0 0 0 1 &intc 0 0 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
Documentation/devicetree/bindings/pci/qcom,pcie.yaml+50−0
@@ -26,6 +26,7 @@ properties: · 25 unmodified lines
26 - qcom,pcie-ipq8064-v226 - qcom,pcie-ipq8064-v2
27 - qcom,pcie-ipq807427 - qcom,pcie-ipq8074
28 - qcom,pcie-ipq8074-gen328 - qcom,pcie-ipq8074-gen3
29 - qcom,pcie-ipq9574
29 - qcom,pcie-msm899630 - qcom,pcie-msm8996
30 - qcom,pcie-qcs40431 - qcom,pcie-qcs404
31 - qcom,pcie-sdm84532 - qcom,pcie-sdm845
@@ -164,6 +165,7 @@ allOf: · 132 unmodified lines
164 enum:165 enum:
165 - qcom,pcie-ipq6018166 - qcom,pcie-ipq6018
166 - qcom,pcie-ipq8074-gen3167 - qcom,pcie-ipq8074-gen3
168 - qcom,pcie-ipq9574
167 then:169 then:
168 properties:170 properties:
169 reg:171 reg:
@@ -400,6 +402,53 @@ allOf: · 230 unmodified lines
400 - const: axi_m_sticky # AXI Master Sticky reset402 - const: axi_m_sticky # AXI Master Sticky reset
401 - const: axi_s_sticky # AXI Slave Sticky reset403 - const: axi_s_sticky # AXI Slave Sticky reset
402 404
405 - if:
406 properties:
407 compatible:
408 contains:
409 enum:
410 - qcom,pcie-ipq9574
411 then:
412 properties:
413 clocks:
414 minItems: 6
415 maxItems: 6
416 clock-names:
417 items:
418 - const: axi_m # AXI Master clock
419 - const: axi_s # AXI Slave clock
420 - const: axi_bridge
421 - const: rchng
422 - const: ahb
423 - const: aux
424
425 resets:
426 minItems: 8
427 maxItems: 8
428 reset-names:
429 items:
430 - const: pipe # PIPE reset
431 - const: sticky # Core Sticky reset
432 - const: axi_s_sticky # AXI Slave Sticky reset
433 - const: axi_s # AXI Slave reset
434 - const: axi_m_sticky # AXI Master Sticky reset
435 - const: axi_m # AXI Master reset
436 - const: aux # AUX Reset
437 - const: ahb # AHB Reset
438
439 interrupts:
440 minItems: 8
441 interrupt-names:
442 items:
443 - const: msi0
444 - const: msi1
445 - const: msi2
446 - const: msi3
447 - const: msi4
448 - const: msi5
449 - const: msi6
450 - const: msi7
451
403 - if:452 - if:
404 properties:453 properties:
405 compatible:454 compatible:
@@ -510,6 +559,7 @@ allOf: · 104 unmodified lines
510 - qcom,pcie-ipq8064v2559 - qcom,pcie-ipq8064v2
511 - qcom,pcie-ipq8074560 - qcom,pcie-ipq8074
512 - qcom,pcie-ipq8074-gen3561 - qcom,pcie-ipq8074-gen3
562 - qcom,pcie-ipq9574
513 - qcom,pcie-qcs404563 - qcom,pcie-qcs404
514 then:564 then:
515 required:565 required:
Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml+0−1
@@ -230,7 +230,6 @@ examples: · 229 unmodified lines
230 230
231 interrupts = <25>, <24>;231 interrupts = <25>, <24>;
232 interrupt-names = "msi", "hp";232 interrupt-names = "msi", "hp";
233 #interrupt-cells = <1>;
234 233
235 reset-gpios = <&port0 0 1>;234 reset-gpios = <&port0 0 1>;
236 235
Documentation/devicetree/bindings/pci/starfive,jh7110-pcie.yaml+7−0
@@ -16,6 +16,13 @@ properties: · 15 unmodified lines
16 compatible:16 compatible:
17 const: starfive,jh7110-pcie17 const: starfive,jh7110-pcie
18 18
19
20 reg:
21 maxItems: 2
22
23 reg-names:
24 maxItems: 2
25
19 clocks:26 clocks:
20 items:27 items:
21 - description: NOC bus clock28 - description: NOC bus clock
Documentation/devicetree/bindings/phy/bcm-ns-usb2-phy.yaml+3−16
@@ -18,16 +18,8 @@ properties: · 17 unmodified lines
18 const: brcm,ns-usb2-phy18 const: brcm,ns-usb2-phy
19 19
20 reg:20 reg:
21 anyOf:21 maxItems: 1
22 - maxItems: 122 description: PHY control register
23 description: PHY control register
24 - maxItems: 1
25 description: iomem address range of DMU (Device Management Unit)
26 deprecated: true
27
28 reg-names:
29 items:
30 - const: dmu
31 23
32 brcm,syscon-clkset:24 brcm,syscon-clkset:
33 description: phandle to syscon for clkset register25 description: phandle to syscon for clkset register
@@ -50,12 +42,7 @@ required: · 16 unmodified lines
50 - clocks42 - clocks
51 - clock-names43 - clock-names
52 - "#phy-cells"44 - "#phy-cells"
53 45 - brcm,syscon-clkset
54oneOf:
55 - required:
56 - brcm,syscon-clkset
57 - required:
58 - reg-names
59 46
60additionalProperties: false47additionalProperties: false
61 48
Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml+37−5
@@ -11,12 +11,17 @@ maintainers: · 10 unmodified lines
11 11
12properties:12properties:
13 compatible:13 compatible:
14 enum:14 oneOf:
15 - fsl,imx8mq-usb-phy15 - enum:
16 - fsl,imx8mp-usb-phy16 - fsl,imx8mq-usb-phy
17 - fsl,imx8mp-usb-phy
18 - items:
19 - const: fsl,imx95-usb-phy
20 - const: fsl,imx8mp-usb-phy
17 21
18 reg:22 reg:
19 maxItems: 123 minItems: 1
24 maxItems: 2
20 25
21 "#phy-cells":26 "#phy-cells":
22 const: 027 const: 0
@@ -89,7 +94,34 @@ required: · 66 unmodified lines
89 - clocks94 - clocks
90 - clock-names95 - clock-names
91 96
92additionalProperties: false97allOf:
98 - if:
99 properties:
100 compatible:
101 contains:
102 enum:
103 - fsl,imx95-usb-phy
104 then:
105 properties:
106 reg:
107 items:
108 - description: USB PHY Control range
109 - description: USB PHY TCA Block range
110 else:
111 properties:
112 reg:
113 maxItems: 1
114
115 - if:
116 properties:
117 compatible:
118 contains:
119 enum:
120 - fsl,imx95-usb-phy
121 then:
122 $ref: /schemas/usb/usb-switch.yaml#
123
124unevaluatedProperties: false
93 125
94examples:126examples:
95 - |127 - |
Documentation/devicetree/bindings/phy/fsl,mxs-usbphy.yaml+1−0
@@ -32,6 +32,7 @@ properties: · 31 unmodified lines
32 - enum:32 - enum:
33 - fsl,imx8dxl-usbphy33 - fsl,imx8dxl-usbphy
34 - fsl,imx8qm-usbphy34 - fsl,imx8qm-usbphy
35 - fsl,imx8qxp-usbphy
35 - fsl,imx8ulp-usbphy36 - fsl,imx8ulp-usbphy
36 - const: fsl,imx7ulp-usbphy37 - const: fsl,imx7ulp-usbphy
37 38
Documentation/devicetree/bindings/phy/mediatek,tphy.yaml+10−0
@@ -125,6 +125,16 @@ properties: · 124 unmodified lines
125 $ref: /schemas/types.yaml#/definitions/uint32125 $ref: /schemas/types.yaml#/definitions/uint32
126 default: 28126 default: 28
127 127
128 power-domains:
129 description:
130 The TPHY of MediaTek should exist within a power domain. The
131 developer should be aware that the hardware design of MediaTek TPHY
132 does not require the addition of MTCMOS. If the power to the TPHY
133 is turned off, it will impact other functions. From the current
134 perspective of USB hardware design, even if MTCMOS is added to the
135 TPHY, it should remain always on.
136 maxItems: 1
137
128# Required child node:138# Required child node:
129patternProperties:139patternProperties:
130 "^(usb|pcie|sata)-phy@[0-9a-f]+$":140 "^(usb|pcie|sata)-phy@[0-9a-f]+$":
Documentation/devicetree/bindings/phy/microchip,sparx5-serdes.yaml+16−1
@@ -8,6 +8,7 @@ title: Microchip Sparx5 Serdes controller · 7 unmodified lines
8 8
9maintainers:9maintainers:
10 - Steen Hegelund <steen.hegelund@microchip.com>10 - Steen Hegelund <steen.hegelund@microchip.com>
11 - Daniel Machon <daniel.machon@microchip.com>
11 12
12description: |13description: |
13 The Sparx5 SERDES interfaces share the same basic functionality, but14 The Sparx5 SERDES interfaces share the same basic functionality, but
@@ -62,12 +63,26 @@ description: | · 48 unmodified lines
62 * 10.3125 Gbps (10GBASE-R/10GBASE-KR/USXGMII)63 * 10.3125 Gbps (10GBASE-R/10GBASE-KR/USXGMII)
63 * 25.78125 Gbps (25GBASE-KR/25GBASE-CR/25GBASE-SR/25GBASE-LR/25GBASE-ER)64 * 25.78125 Gbps (25GBASE-KR/25GBASE-CR/25GBASE-SR/25GBASE-LR/25GBASE-ER)
64 65
66 lan969x has ten SERDES10G interfaces that share the same features, operating
67 modes and data rates as the equivalent Sparx5 SERDES10G interfaces.
68
65properties:69properties:
66 $nodename:70 $nodename:
67 pattern: "^serdes@[0-9a-f]+$"71 pattern: "^serdes@[0-9a-f]+$"
68 72
69 compatible:73 compatible:
70 const: microchip,sparx5-serdes74 oneOf:
75 - enum:
76 - microchip,sparx5-serdes
77 - microchip,lan9691-serdes
78 - items:
79 - enum:
80 - microchip,lan9698-serdes
81 - microchip,lan9696-serdes
82 - microchip,lan9694-serdes
83 - microchip,lan9693-serdes
84 - microchip,lan9692-serdes
85 - const: microchip,lan9691-serdes
71 86
72 reg:87 reg:
73 minItems: 188 minItems: 1
Documentation/devicetree/bindings/phy/nxp,ptn3222.yaml+55−0
@@ -0,0 +1,55 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/nxp,ptn3222.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NXP PTN3222 1-port eUSB2 to USB2 redriver
8
9maintainers:
10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
11
12properties:
13 compatible:
14 enum:
15 - nxp,ptn3222
16
17 reg:
18 maxItems: 1
19
20 "#phy-cells":
21 const: 0
22
23 vdd1v8-supply:
24 description: power supply (1.8V)
25
26 vdd3v3-supply:
27 description: power supply (3.3V)
28
29 reset-gpios: true
30
31required:
32 - compatible
33 - reg
34 - '#phy-cells'
35
36additionalProperties: false
37
38examples:
39 - |
40 #include <dt-bindings/gpio/gpio.h>
41
42 i2c {
43 #address-cells = <1>;
44 #size-cells = <0>;
45
46 redriver@4f {
47 compatible = "nxp,ptn3222";
48 reg = <0x4f>;
49 #phy-cells = <0>;
50 vdd3v3-supply = <&vreg_3p3>;
51 vdd1v8-supply = <&vreg_1p8>;
52 reset-gpios = <&gpio_reset GPIO_ACTIVE_LOW>;
53 };
54 };
55...
Documentation/devicetree/bindings/phy/phy-cadence-sierra.yaml+1−1
@@ -96,7 +96,7 @@ patternProperties: · 95 unmodified lines
96 Specifies the type of PHY for which the group of PHY lanes is used.96 Specifies the type of PHY for which the group of PHY lanes is used.
97 Refer include/dt-bindings/phy/phy.h. Constants from the header should be used.97 Refer include/dt-bindings/phy/phy.h. Constants from the header should be used.
98 $ref: /schemas/types.yaml#/definitions/uint3298 $ref: /schemas/types.yaml#/definitions/uint32
99 enum: [2, 4]99 enum: [2, 4, 8, 9]
100 100
101 cdns,num-lanes:101 cdns,num-lanes:
102 description:102 description:
Documentation/devicetree/bindings/phy/phy-rockchip-inno-hdmi.txt+0−43
@@ -1,43 +0,0 @@
1ROCKCHIP HDMI PHY WITH INNO IP BLOCK
2
3Required properties:
4 - compatible : should be one of the listed compatibles:
5 * "rockchip,rk3228-hdmi-phy",
6 * "rockchip,rk3328-hdmi-phy";
7 - reg : Address and length of the hdmi phy control register set
8 - clocks : phandle + clock specifier for the phy clocks
9 - clock-names : string, clock name, must contain "sysclk" for system
10 control and register configuration, "refoclk" for crystal-
11 oscillator reference PLL clock input and "refpclk" for pclk-
12 based refeference PLL clock input.
13 - #clock-cells: should be 0.
14 - clock-output-names : shall be the name for the output clock.
15 - interrupts : phandle + interrupt specified for the hdmiphy interrupt
16 - #phy-cells : must be 0. See ./phy-bindings.txt for details.
17
18Optional properties for rk3328-hdmi-phy:
19 - nvmem-cells = phandle + nvmem specifier for the cpu-version efuse
20 - nvmem-cell-names : "cpu-version" to read the chip version, required
21 for adjustment to some frequency settings
22
23Example:
24 hdmi_phy: hdmi-phy@12030000 {
25 compatible = "rockchip,rk3228-hdmi-phy";
26 reg = <0x12030000 0x10000>;
27 #phy-cells = <0>;
28 clocks = <&cru PCLK_HDMI_PHY>, <&xin24m>, <&cru DCLK_HDMIPHY>;
29 clock-names = "sysclk", "refoclk", "refpclk";
30 #clock-cells = <0>;
31 clock-output-names = "hdmi_phy";
32 status = "disabled";
33 };
34
35Then the PHY can be used in other nodes such as:
36
37 hdmi: hdmi@200a0000 {
38 compatible = "rockchip,rk3228-dw-hdmi";
39 ...
40 phys = <&hdmi_phy>;
41 phy-names = "hdmi";
42 ...
43 };
Documentation/devicetree/bindings/phy/phy-rockchip-usbdp.yaml+1−0
@@ -13,6 +13,7 @@ maintainers: · 12 unmodified lines
13properties:13properties:
14 compatible:14 compatible:
15 enum:15 enum:
16 - rockchip,rk3576-usbdp-phy
16 - rockchip,rk3588-usbdp-phy17 - rockchip,rk3588-usbdp-phy
17 18
18 reg:19 reg:
Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml+1−0
@@ -17,6 +17,7 @@ description: · 16 unmodified lines
17properties:17properties:
18 compatible:18 compatible:
19 enum:19 enum:
20 - qcom,sa8775p-edp-phy
20 - qcom,sc7280-edp-phy21 - qcom,sc7280-edp-phy
21 - qcom,sc8180x-edp-phy22 - qcom,sc8180x-edp-phy
22 - qcom,sc8280xp-dp-phy23 - qcom,sc8280xp-dp-phy
Documentation/devicetree/bindings/phy/qcom,msm8998-qmp-usb3-phy.yaml+2−0
@@ -18,6 +18,7 @@ properties: · 17 unmodified lines
18 enum:18 enum:
19 - qcom,msm8998-qmp-usb3-phy19 - qcom,msm8998-qmp-usb3-phy
20 - qcom,qcm2290-qmp-usb3-phy20 - qcom,qcm2290-qmp-usb3-phy
21 - qcom,qcs615-qmp-usb3-phy
21 - qcom,sdm660-qmp-usb3-phy22 - qcom,sdm660-qmp-usb3-phy
22 - qcom,sm6115-qmp-usb3-phy23 - qcom,sm6115-qmp-usb3-phy
23 24
@@ -96,6 +97,7 @@ allOf: · 72 unmodified lines
96 contains:97 contains:
97 enum:98 enum:
98 - qcom,msm8998-qmp-usb3-phy99 - qcom,msm8998-qmp-usb3-phy
100 - qcom,qcs615-qmp-usb3-phy
99 - qcom,sdm660-qmp-usb3-phy101 - qcom,sdm660-qmp-usb3-phy
100 then:102 then:
101 properties:103 properties:
Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml+1−0
@@ -25,6 +25,7 @@ properties: · 24 unmodified lines
25 - qcom,msm8996-qusb2-phy25 - qcom,msm8996-qusb2-phy
26 - qcom,msm8998-qusb2-phy26 - qcom,msm8998-qusb2-phy
27 - qcom,qcm2290-qusb2-phy27 - qcom,qcm2290-qusb2-phy
28 - qcom,qcs615-qusb2-phy
28 - qcom,sdm660-qusb2-phy29 - qcom,sdm660-qusb2-phy
29 - qcom,sm4250-qusb2-phy30 - qcom,sm4250-qusb2-phy
30 - qcom,sm6115-qusb2-phy31 - qcom,sm6115-qusb2-phy
Documentation/devicetree/bindings/phy/qcom,sa8775p-dwmac-sgmii-phy.yaml+6−1
@@ -15,7 +15,12 @@ description: · 14 unmodified lines
15 15
16properties:16properties:
17 compatible:17 compatible:
18 const: qcom,sa8775p-dwmac-sgmii-phy18 oneOf:
19 - items:
20 - enum:
21 - qcom,qcs8300-dwmac-sgmii-phy
22 - const: qcom,sa8775p-dwmac-sgmii-phy
23 - const: qcom,sa8775p-dwmac-sgmii-phy
19 24
20 reg:25 reg:
21 items:26 items:
Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml+3−0
@@ -41,6 +41,7 @@ properties: · 40 unmodified lines
41 - qcom,x1e80100-qmp-gen3x2-pcie-phy41 - qcom,x1e80100-qmp-gen3x2-pcie-phy
42 - qcom,x1e80100-qmp-gen4x2-pcie-phy42 - qcom,x1e80100-qmp-gen4x2-pcie-phy
43 - qcom,x1e80100-qmp-gen4x4-pcie-phy43 - qcom,x1e80100-qmp-gen4x4-pcie-phy
44 - qcom,x1e80100-qmp-gen4x8-pcie-phy
44 45
45 reg:46 reg:
46 minItems: 147 minItems: 1
@@ -172,6 +173,7 @@ allOf: · 125 unmodified lines
172 - qcom,x1e80100-qmp-gen3x2-pcie-phy173 - qcom,x1e80100-qmp-gen3x2-pcie-phy
173 - qcom,x1e80100-qmp-gen4x2-pcie-phy174 - qcom,x1e80100-qmp-gen4x2-pcie-phy
174 - qcom,x1e80100-qmp-gen4x4-pcie-phy175 - qcom,x1e80100-qmp-gen4x4-pcie-phy
176 - qcom,x1e80100-qmp-gen4x8-pcie-phy
175 then:177 then:
176 properties:178 properties:
177 clocks:179 clocks:
@@ -202,6 +204,7 @@ allOf: · 24 unmodified lines
202 - qcom,sm8650-qmp-gen4x2-pcie-phy204 - qcom,sm8650-qmp-gen4x2-pcie-phy
203 - qcom,x1e80100-qmp-gen4x2-pcie-phy205 - qcom,x1e80100-qmp-gen4x2-pcie-phy
204 - qcom,x1e80100-qmp-gen4x4-pcie-phy206 - qcom,x1e80100-qmp-gen4x4-pcie-phy
207 - qcom,x1e80100-qmp-gen4x8-pcie-phy
205 then:208 then:
206 properties:209 properties:
207 resets:210 resets:
Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml+29−20
@@ -15,26 +15,35 @@ description: · 14 unmodified lines
15 15
16properties:16properties:
17 compatible:17 compatible:
18 enum:18 oneOf:
19 - qcom,msm8996-qmp-ufs-phy19 - items:
20 - qcom,msm8998-qmp-ufs-phy20 - enum:
21 - qcom,sa8775p-qmp-ufs-phy21 - qcom,qcs615-qmp-ufs-phy
22 - qcom,sc7180-qmp-ufs-phy22 - const: qcom,sm6115-qmp-ufs-phy
23 - qcom,sc7280-qmp-ufs-phy23 - items:
24 - qcom,sc8180x-qmp-ufs-phy24 - enum:
25 - qcom,sc8280xp-qmp-ufs-phy25 - qcom,qcs8300-qmp-ufs-phy
26 - qcom,sdm845-qmp-ufs-phy26 - const: qcom,sa8775p-qmp-ufs-phy
27 - qcom,sm6115-qmp-ufs-phy27 - enum:
28 - qcom,sm6125-qmp-ufs-phy28 - qcom,msm8996-qmp-ufs-phy
29 - qcom,sm6350-qmp-ufs-phy29 - qcom,msm8998-qmp-ufs-phy
30 - qcom,sm7150-qmp-ufs-phy30 - qcom,sa8775p-qmp-ufs-phy
31 - qcom,sm8150-qmp-ufs-phy31 - qcom,sc7180-qmp-ufs-phy
32 - qcom,sm8250-qmp-ufs-phy32 - qcom,sc7280-qmp-ufs-phy
33 - qcom,sm8350-qmp-ufs-phy33 - qcom,sc8180x-qmp-ufs-phy
34 - qcom,sm8450-qmp-ufs-phy34 - qcom,sc8280xp-qmp-ufs-phy
35 - qcom,sm8475-qmp-ufs-phy35 - qcom,sdm845-qmp-ufs-phy
36 - qcom,sm8550-qmp-ufs-phy36 - qcom,sm6115-qmp-ufs-phy
37 - qcom,sm8650-qmp-ufs-phy37 - qcom,sm6125-qmp-ufs-phy
38 - qcom,sm6350-qmp-ufs-phy
39 - qcom,sm7150-qmp-ufs-phy
40 - qcom,sm8150-qmp-ufs-phy
41 - qcom,sm8250-qmp-ufs-phy
42 - qcom,sm8350-qmp-ufs-phy
43 - qcom,sm8450-qmp-ufs-phy
44 - qcom,sm8475-qmp-ufs-phy
45 - qcom,sm8550-qmp-ufs-phy
46 - qcom,sm8650-qmp-ufs-phy
38 47
39 reg:48 reg:
40 maxItems: 149 maxItems: 1
Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml+2−0
@@ -20,6 +20,7 @@ properties: · 19 unmodified lines
20 - qcom,ipq8074-qmp-usb3-phy20 - qcom,ipq8074-qmp-usb3-phy
21 - qcom,ipq9574-qmp-usb3-phy21 - qcom,ipq9574-qmp-usb3-phy
22 - qcom,msm8996-qmp-usb3-phy22 - qcom,msm8996-qmp-usb3-phy
23 - qcom,qcs8300-qmp-usb3-uni-phy
23 - qcom,qdu1000-qmp-usb3-uni-phy24 - qcom,qdu1000-qmp-usb3-uni-phy
24 - qcom,sa8775p-qmp-usb3-uni-phy25 - qcom,sa8775p-qmp-usb3-uni-phy
25 - qcom,sc8180x-qmp-usb3-uni-phy26 - qcom,sc8180x-qmp-usb3-uni-phy
@@ -111,6 +112,7 @@ allOf: · 85 unmodified lines
111 compatible:112 compatible:
112 contains:113 contains:
113 enum:114 enum:
115 - qcom,qcs8300-qmp-usb3-uni-phy
114 - qcom,qdu1000-qmp-usb3-uni-phy116 - qcom,qdu1000-qmp-usb3-uni-phy
115 - qcom,sa8775p-qmp-usb3-uni-phy117 - qcom,sa8775p-qmp-usb3-uni-phy
116 - qcom,sc8180x-qmp-usb3-uni-phy118 - qcom,sc8180x-qmp-usb3-uni-phy
Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml+1−0
@@ -17,6 +17,7 @@ properties: · 16 unmodified lines
17 oneOf:17 oneOf:
18 - items:18 - items:
19 - enum:19 - enum:
20 - qcom,sar2130p-snps-eusb2-phy
20 - qcom,sdx75-snps-eusb2-phy21 - qcom,sdx75-snps-eusb2-phy
21 - qcom,sm8650-snps-eusb2-phy22 - qcom,sm8650-snps-eusb2-phy
22 - qcom,x1e80100-snps-eusb2-phy23 - qcom,x1e80100-snps-eusb2-phy
Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml+1−0
@@ -22,6 +22,7 @@ properties: · 21 unmodified lines
22 - const: qcom,usb-snps-hs-5nm-phy22 - const: qcom,usb-snps-hs-5nm-phy
23 - items:23 - items:
24 - enum:24 - enum:
25 - qcom,qcs8300-usb-hs-phy
25 - qcom,qdu1000-usb-hs-phy26 - qcom,qdu1000-usb-hs-phy
26 - qcom,sc7280-usb-hs-phy27 - qcom,sc7280-usb-hs-phy
27 - qcom,sc8180x-usb-hs-phy28 - qcom,sc8180x-usb-hs-phy
Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml+43−2
@@ -20,6 +20,7 @@ properties: · 19 unmodified lines
20 - rockchip,rk3366-usb2phy20 - rockchip,rk3366-usb2phy
21 - rockchip,rk3399-usb2phy21 - rockchip,rk3399-usb2phy
22 - rockchip,rk3568-usb2phy22 - rockchip,rk3568-usb2phy
23 - rockchip,rk3576-usb2phy
23 - rockchip,rk3588-usb2phy24 - rockchip,rk3588-usb2phy
24 - rockchip,rv1108-usb2phy25 - rockchip,rv1108-usb2phy
25 26
@@ -34,10 +35,15 @@ properties: · 8 unmodified lines
34 const: 035 const: 0
35 36
36 clocks:37 clocks:
37 maxItems: 138 minItems: 1
39 maxItems: 3
38 40
39 clock-names:41 clock-names:
40 const: phyclk42 minItems: 1
43 items:
44 - const: phyclk
45 - const: aclk
46 - const: aclk_slv
41 47
42 assigned-clocks:48 assigned-clocks:
43 description:49 description:
@@ -172,6 +178,41 @@ allOf: · 128 unmodified lines
172 - interrupts178 - interrupts
173 - interrupt-names179 - interrupt-names
174 180
181 - if:
182 properties:
183 compatible:
184 contains:
185 enum:
186 - rockchip,px30-usb2phy
187 - rockchip,rk3128-usb2phy
188 - rockchip,rk3228-usb2phy
189 - rockchip,rk3308-usb2phy
190 - rockchip,rk3328-usb2phy
191 - rockchip,rk3366-usb2phy
192 - rockchip,rk3399-usb2phy
193 - rockchip,rk3568-usb2phy
194 - rockchip,rk3588-usb2phy
195 - rockchip,rv1108-usb2phy
196 then:
197 properties:
198 clocks:
199 maxItems: 1
200 clock-names:
201 maxItems: 1
202
203 - if:
204 properties:
205 compatible:
206 contains:
207 enum:
208 - rockchip,rk3576-usb2phy
209 then:
210 properties:
211 clocks:
212 minItems: 3
213 clock-names:
214 minItems: 3
215
175additionalProperties: false216additionalProperties: false
176 217
177examples:218examples:
Documentation/devicetree/bindings/phy/rockchip,rk3228-hdmi-phy.yaml+97−0
@@ -0,0 +1,97 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/rockchip,rk3228-hdmi-phy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip HDMI PHY with Innosilicon IP block
8
9maintainers:
10 - Heiko Stuebner <heiko@sntech.de>
11
12properties:
13 compatible:
14 enum:
15 - rockchip,rk3228-hdmi-phy
16 - rockchip,rk3328-hdmi-phy
17
18 reg:
19 maxItems: 1
20
21 clocks:
22 maxItems: 3
23
24 clock-names:
25 items:
26 - const: sysclk
27 - const: refoclk
28 - const: refpclk
29
30 clock-output-names:
31 description:
32 The hdmiphy output clock name, that gets fed back to the CRU.
33
34 "#clock-cells":
35 const: 0
36
37 interrupts:
38 maxItems: 1
39
40 nvmem-cells:
41 maxItems: 1
42 description: A phandle + nvmem specifier for the cpu-version efuse
43 for adjustment to some frequency settings, depending on cpu-version
44
45 nvmem-cell-names:
46 items:
47 - const: cpu-version
48
49 '#phy-cells':
50 const: 0
51
52required:
53 - compatible
54 - reg
55 - clocks
56 - clock-names
57 - clock-output-names
58 - '#clock-cells'
59 - '#phy-cells'
60
61allOf:
62 - if:
63 properties:
64 compatible:
65 contains:
66 const: rockchip,rk3228-hdmi-phy
67
68 then:
69 properties:
70 interrupts: false
71
72 - if:
73 properties:
74 compatible:
75 contains:
76 const: rockchip,rk3328-hdmi-phy
77
78 then:
79 required:
80 - interrupts
81
82additionalProperties: false
83
84examples:
85 - |
86
87 #include <dt-bindings/clock/rk3228-cru.h>
88 hdmi_phy: phy@12030000 {
89 compatible = "rockchip,rk3228-hdmi-phy";
90 reg = <0x12030000 0x10000>;
91 #phy-cells = <0>;
92 clocks = <&cru PCLK_HDMI_PHY>, <&xin24m>, <&cru DCLK_HDMI_PHY>;
93 clock-names = "sysclk", "refoclk", "refpclk";
94 #clock-cells = <0>;
95
96 clock-output-names = "hdmi_phy";
97 };
Documentation/devicetree/bindings/phy/st,stm32mp25-combophy.yaml+119−0
@@ -0,0 +1,119 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/st,stm32mp25-combophy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: STMicroelectronics STM32MP25 USB3/PCIe COMBOPHY
8
9maintainers:
10 - Christian Bruel <christian.bruel@foss.st.com>
11
12description:
13 Single lane PHY shared (exclusive) between the USB3 and PCIe controllers.
14 Supports 5Gbit/s for USB3 and PCIe gen2 or 2.5Gbit/s for PCIe gen1.
15
16properties:
17 compatible:
18 const: st,stm32mp25-combophy
19
20 reg:
21 maxItems: 1
22
23 "#phy-cells":
24 const: 1
25
26 clocks:
27 minItems: 2
28 items:
29 - description: apb Bus clock mandatory to access registers.
30 - description: ker Internal RCC reference clock for USB3 or PCIe
31 - description: pad Optional on board clock input for PCIe only. Typically an
32 external 100Mhz oscillator wired on dedicated CLKIN pad. Used as reference
33 clock input instead of the ker
34
35 clock-names:
36 minItems: 2
37 items:
38 - const: apb
39 - const: ker
40 - const: pad
41
42 resets:
43 maxItems: 1
44
45 reset-names:
46 const: phy
47
48 power-domains:
49 maxItems: 1
50
51 wakeup-source: true
52
53 interrupts:
54 maxItems: 1
55 description: interrupt used for wakeup
56
57 access-controllers:
58 maxItems: 1
59 description: Phandle to the rifsc device to check access right.
60
61 st,ssc-on:
62 $ref: /schemas/types.yaml#/definitions/flag
63 description:
64 A property whose presence indicates that the Spread Spectrum Clocking is active.
65
66 st,rx-equalizer:
67 $ref: /schemas/types.yaml#/definitions/uint32
68 minimum: 0
69 maximum: 7
70 default: 2
71 description:
72 A 3 bit value to tune the RX fixed equalizer setting for optimal eye compliance
73
74 st,output-micro-ohms:
75 minimum: 3999000
76 maximum: 6090000
77 default: 4968000
78 description:
79 A value property to tune the Single Ended Output Impedance, simulations results
80 at 25C for a VDDP=0.8V. The hardware accepts discrete values in this range.
81
82 st,output-vswing-microvolt:
83 minimum: 442000
84 maximum: 803000
85 default: 803000
86 description:
87 A value property in microvolt to tune the Single Ended Output Voltage Swing to change the
88 Vlo, Vhi for a VDDP = 0.8V. The hardware accepts discrete values in this range.
89
90required:
91 - compatible
92 - reg
93 - "#phy-cells"
94 - clocks
95 - clock-names
96 - resets
97 - reset-names
98
99additionalProperties: false
100
101examples:
102 - |
103 #include <dt-bindings/clock/st,stm32mp25-rcc.h>
104 #include <dt-bindings/interrupt-controller/arm-gic.h>
105 #include <dt-bindings/reset/st,stm32mp25-rcc.h>
106
107 phy@480c0000 {
108 compatible = "st,stm32mp25-combophy";
109 reg = <0x480c0000 0x1000>;
110 #phy-cells = <1>;
111 clocks = <&rcc CK_BUS_USB3PCIEPHY>, <&rcc CK_KER_USB3PCIEPHY>;
112 clock-names = "apb", "ker";
113 resets = <&rcc USB3PCIEPHY_R>;
114 reset-names = "phy";
115 access-controllers = <&rifsc 67>;
116 power-domains = <&CLUSTER_PD>;
117 wakeup-source;
118 interrupts-extended = <&exti1 45 IRQ_TYPE_EDGE_FALLING>;
119 };
Documentation/devicetree/bindings/phy/ti,tcan104x-can.yaml+9−4
@@ -14,10 +14,15 @@ properties: · 13 unmodified lines
14 pattern: "^can-phy"14 pattern: "^can-phy"
15 15
16 compatible:16 compatible:
17 enum:17 oneOf:
18 - nxp,tjr144318 - items:
19 - ti,tcan104219 - enum:
20 - ti,tcan104320 - microchip,ata6561
21 - const: ti,tcan1042
22 - enum:
23 - ti,tcan1042
24 - ti,tcan1043
25 - nxp,tjr1443
21 26
22 '#phy-cells':27 '#phy-cells':
23 const: 028 const: 0
Documentation/devicetree/bindings/pinctrl/airoha,en7581-pinctrl.yaml+400−0
@@ -0,0 +1,400 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/airoha,en7581-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Airoha EN7581 Pin Controller
8
9maintainers:
10 - Lorenzo Bianconi <lorenzo@kernel.org>
11
12description:
13 The Airoha's EN7581 Pin controller is used to control SoC pins.
14
15properties:
16 compatible:
17 const: airoha,en7581-pinctrl
18
19 interrupts:
20 maxItems: 1
21
22 gpio-controller: true
23
24 '#gpio-cells':
25 const: 2
26
27 interrupt-controller: true
28
29 '#interrupt-cells':
30 const: 2
31
32allOf:
33 - $ref: pinctrl.yaml#
34
35required:
36 - compatible
37 - interrupts
38 - gpio-controller
39 - "#gpio-cells"
40 - interrupt-controller
41 - "#interrupt-cells"
42
43patternProperties:
44 '-pins$':
45 type: object
46
47 patternProperties:
48 '^mux(-|$)':
49 type: object
50
51 description:
52 pinmux configuration nodes.
53
54 $ref: /schemas/pinctrl/pinmux-node.yaml
55
56 properties:
57 function:
58 description:
59 A string containing the name of the function to mux to the group.
60 enum: [pon, tod_1pps, sipo, mdio, uart, i2c, jtag, pcm, spi,
61 pcm_spi, i2s, emmc, pnand, pcie_reset, pwm, phy1_led0,
62 phy2_led0, phy3_led0, phy4_led0, phy1_led1, phy2_led1,
63 phy3_led1, phy4_led1]
64
65 groups:
66 description:
67 An array of strings. Each string contains the name of a group.
68
69 required:
70 - function
71 - groups
72
73 allOf:
74 - if:
75 properties:
76 function:
77 const: pon
78 then:
79 properties:
80 groups:
81 enum: [pon]
82 - if:
83 properties:
84 function:
85 const: tod_1pps
86 then:
87 properties:
88 groups:
89 enum: [pon_tod_1pps, gsw_tod_1pps]
90 - if:
91 properties:
92 function:
93 const: sipo
94 then:
95 properties:
96 groups:
97 enum: [sipo, sipo_rclk]
98 - if:
99 properties:
100 function:
101 const: mdio
102 then:
103 properties:
104 groups:
105 enum: [mdio]
106 - if:
107 properties:
108 function:
109 const: uart
110 then:
111 properties:
112 groups:
113 items:
114 enum: [uart2, uart2_cts_rts, hsuart, hsuart_cts_rts,
115 uart4, uart5]
116 maxItems: 2
117 - if:
118 properties:
119 function:
120 const: i2c
121 then:
122 properties:
123 groups:
124 enum: [i2c1]
125 - if:
126 properties:
127 function:
128 const: jtag
129 then:
130 properties:
131 groups:
132 enum: [jtag_udi, jtag_dfd]
133 - if:
134 properties:
135 function:
136 const: pcm
137 then:
138 properties:
139 groups:
140 enum: [pcm1, pcm2]
141 - if:
142 properties:
143 function:
144 const: spi
145 then:
146 properties:
147 groups:
148 items:
149 enum: [spi_quad, spi_cs1]
150 maxItems: 2
151 - if:
152 properties:
153 function:
154 const: pcm_spi
155 then:
156 properties:
157 groups:
158 items:
159 enum: [pcm_spi, pcm_spi_int, pcm_spi_rst, pcm_spi_cs1,
160 pcm_spi_cs2_p156, pcm_spi_cs2_p128, pcm_spi_cs3,
161 pcm_spi_cs4]
162 maxItems: 7
163 - if:
164 properties:
165 function:
166 const: i2c
167 then:
168 properties:
169 groups:
170 enum: [i2s]
171 - if:
172 properties:
173 function:
174 const: emmc
175 then:
176 properties:
177 groups:
178 enum: [emmc]
179 - if:
180 properties:
181 function:
182 const: pnand
183 then:
184 properties:
185 groups:
186 enum: [pnand]
187 - if:
188 properties:
189 function:
190 const: pcie_reset
191 then:
192 properties:
193 groups:
194 enum: [pcie_reset0, pcie_reset1, pcie_reset2]
195 - if:
196 properties:
197 function:
198 const: pwm
199 then:
200 properties:
201 groups:
202 enum: [gpio0, gpio1, gpio2, gpio3, gpio4, gpio5, gpio6,
203 gpio7, gpio8, gpio9, gpio10, gpio11, gpio12, gpio13,
204 gpio14, gpio15, gpio16, gpio17, gpio18, gpio19,
205 gpio20, gpio21, gpio22, gpio23, gpio24, gpio25,
206 gpio26, gpio27, gpio28, gpio29, gpio30, gpio31,
207 gpio36, gpio37, gpio38, gpio39, gpio40, gpio41,
208 gpio42, gpio43, gpio44, gpio45, gpio46, gpio47]
209 - if:
210 properties:
211 function:
212 const: phy1_led0
213 then:
214 properties:
215 groups:
216 enum: [gpio33, gpio34, gpio35, gpio42]
217 - if:
218 properties:
219 function:
220 const: phy2_led0
221 then:
222 properties:
223 groups:
224 enum: [gpio33, gpio34, gpio35, gpio42]
225 - if:
226 properties:
227 function:
228 const: phy3_led0
229 then:
230 properties:
231 groups:
232 enum: [gpio33, gpio34, gpio35, gpio42]
233 - if:
234 properties:
235 function:
236 const: phy4_led0
237 then:
238 properties:
239 groups:
240 enum: [gpio33, gpio34, gpio35, gpio42]
241 - if:
242 properties:
243 function:
244 const: phy1_led1
245 then:
246 properties:
247 groups:
248 enum: [gpio43, gpio44, gpio45, gpio46]
249 - if:
250 properties:
251 function:
252 const: phy2_led1
253 then:
254 properties:
255 groups:
256 enum: [gpio43, gpio44, gpio45, gpio46]
257 - if:
258 properties:
259 function:
260 const: phy3_led1
261 then:
262 properties:
263 groups:
264 enum: [gpio43, gpio44, gpio45, gpio46]
265 - if:
266 properties:
267 function:
268 const: phy4_led1
269 then:
270 properties:
271 groups:
272 enum: [gpio43, gpio44, gpio45, gpio46]
273
274 additionalProperties: false
275
276 '^conf(-|$)':
277 type: object
278
279 description:
280 pinconf configuration nodes.
281
282 $ref: /schemas/pinctrl/pincfg-node.yaml
283
284 properties:
285 pins:
286 description:
287 An array of strings. Each string contains the name of a pin.
288 items:
289 enum: [uart1_txd, uart1_rxd, i2c_scl, i2c_sda, spi_cs0, spi_clk,
290 spi_mosi, spi_miso, gpio0, gpio1, gpio2, gpio3, gpio4,
291 gpio5, gpio6, gpio7, gpio8, gpio9, gpio10, gpio11, gpio12,
292 gpio13, gpio14, gpio15, gpio16, gpio17, gpio18, gpio19,
293 gpio20, gpio21, gpio22, gpio23, gpio24, gpio25, gpio26,
294 gpio27, gpio28, gpio29, gpio30, gpio31, gpio32, gpio33,
295 gpio34, gpio35, gpio36, gpio37, gpio38, gpio39, gpio40,
296 gpio41, gpio42, gpio43, gpio44, gpio45, gpio46,
297 pcie_reset0, pcie_reset1, pcie_reset2]
298 minItems: 1
299 maxItems: 58
300
301 bias-disable: true
302
303 bias-pull-up: true
304
305 bias-pull-down: true
306
307 input-enable: true
308
309 output-enable: true
310
311 output-low: true
312
313 output-high: true
314
315 drive-open-drain: true
316
317 drive-strength:
318 description:
319 Selects the drive strength for MIO pins, in mA.
320 enum: [2, 4, 6, 8]
321
322 required:
323 - pins
324
325 additionalProperties: false
326
327 additionalProperties: false
328
329additionalProperties: false
330
331examples:
332 - |
333 #include <dt-bindings/interrupt-controller/arm-gic.h>
334
335 pinctrl {
336 compatible = "airoha,en7581-pinctrl";
337
338 interrupt-parent = <&gic>;
339 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
340
341 gpio-controller;
342 #gpio-cells = <2>;
343
344 interrupt-controller;
345 #interrupt-cells = <2>;
346
347 pcie1-rst-pins {
348 conf {
349 pins = "pcie_reset1";
350 drive-open-drain = <1>;
351 };
352 };
353
354 pwm-pins {
355 mux {
356 function = "pwm";
357 groups = "gpio18";
358 };
359 };
360
361 spi-pins {
362 mux {
363 function = "spi";
364 groups = "spi_quad", "spi_cs1";
365 };
366 };
367
368 uart2-pins {
369 mux {
370 function = "uart";
371 groups = "uart2", "uart2_cts_rts";
372 };
373 };
374
375 uar5-pins {
376 mux {
377 function = "uart";
378 groups = "uart5";
379 };
380 };
381
382 mmc-pins {
383 mux {
384 function = "emmc";
385 groups = "emmc";
386 };
387 };
388
389 mdio-pins {
390 mux {
391 function = "mdio";
392 groups = "mdio";
393 };
394
395 conf {
396 pins = "gpio2";
397 output-enable;
398 };
399 };
400 };
Documentation/devicetree/bindings/pinctrl/amlogic,meson8-pinctrl-cbus.yaml+1−1
@@ -46,7 +46,7 @@ patternProperties: · 45 unmodified lines
46 - const: gpio46 - const: gpio
47 47
48 gpio-line-names:48 gpio-line-names:
49 minItems: 86 # AXG49 minItems: 83 # Meson8b
50 maxItems: 120 # Meson850 maxItems: 120 # Meson8
51 51
52unevaluatedProperties:52unevaluatedProperties:
Documentation/devicetree/bindings/pinctrl/canaan,k230-pinctrl.yaml+127−0
@@ -0,0 +1,127 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/canaan,k230-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Canaan Kendryte K230 Pin Controller
8
9maintainers:
10 - Ze Huang <18771902331@163.com>
11
12description:
13 The Canaan Kendryte K230 platform includes 64 IO pins, each capable of
14 multiplexing up to 5 different functions. Pin function configuration is
15 performed on a per-pin basis.
16
17properties:
18 compatible:
19 const: canaan,k230-pinctrl
20
21 reg:
22 maxItems: 1
23
24patternProperties:
25 '-pins$':
26 type: object
27 additionalProperties: false
28 description:
29 A pinctrl node should contain at least one subnode representing the
30 pinctrl groups available on the machine.
31
32 patternProperties:
33 '-cfg$':
34 type: object
35 allOf:
36 - $ref: /schemas/pinctrl/pincfg-node.yaml
37 - $ref: /schemas/pinctrl/pinmux-node.yaml
38 additionalProperties: false
39 description:
40 Each subnode will list the pins it needs, and how they should
41 be configured, with regard to muxer configuration, bias, input
42 enable/disable, input schmitt trigger, slew-rate enable/disable,
43 slew-rate, drive strength.
44
45 properties:
46 pinmux:
47 description:
48 The list of GPIOs and their mux settings that properties in
49 the node apply to. This should be set with the macro
50 'K230_PINMUX(pin, mode)'
51
52 bias-disable: true
53
54 bias-pull-up: true
55
56 bias-pull-down: true
57
58 drive-strength:
59 minimum: 0
60 maximum: 15
61
62 input-enable: true
63
64 output-enable: true
65
66 input-schmitt-enable: true
67
68 slew-rate:
69 description: |
70 slew rate control enable
71 0: disable
72 1: enable
73
74 enum: [0, 1]
75
76 power-source:
77 description: |
78 Specifies the power source voltage for the IO bank that the
79 pin belongs to. Each bank of IO pins operate at a specific,
80 fixed voltage levels. Incorrect voltage configuration can
81 damage the chip. The defined constants represent the
82 possible voltage configurations:
83
84 - K230_MSC_3V3 (value 0): 3.3V power supply
85 - K230_MSC_1V8 (value 1): 1.8V power supply
86
87 The following banks have the corresponding voltage
88 configurations:
89
90 - bank IO0 to IO1: Fixed at 1.8V
91 - bank IO2 to IO13: Fixed at 1.8V
92 - bank IO14 to IO25: Fixed at 1.8V
93 - bank IO26 to IO37: Fixed at 1.8V
94 - bank IO38 to IO49: Fixed at 1.8V
95 - bank IO50 to IO61: Fixed at 3.3V
96 - bank IO62 to IO63: Fixed at 1.8V
97
98 enum: [0, 1]
99
100 required:
101 - pinmux
102
103required:
104 - compatible
105 - reg
106
107additionalProperties: false
108
109examples:
110 - |
111 pinctrl@91105000 {
112 compatible = "canaan,k230-pinctrl";
113 reg = <0x91105000 0x100>;
114
115 uart2-pins {
116 uart2-pins-cfg {
117 pinmux = <0x503>, /* uart2 txd */
118 <0x603>; /* uart2 rxd */
119 slew-rate = <0>;
120 drive-strength = <4>;
121 power-source = <1>;
122 input-enable;
123 output-enable;
124 bias-disable;
125 };
126 };
127 };
Documentation/devicetree/bindings/pinctrl/fsl,imx35-pinctrl.txt+0−33
@@ -1,33 +0,0 @@
1* Freescale IMX35 IOMUX Controller
2
3Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
4and usage.
5
6Required properties:
7- compatible: "fsl,imx35-iomuxc"
8- fsl,pins: two integers array, represents a group of pins mux and config
9 setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a
10 pin working on a specific function, CONFIG is the pad setting value like
11 pull-up for this pin. Please refer to imx35 datasheet for the valid pad
12 config settings.
13
14CONFIG bits definition:
15PAD_CTL_DRIVE_VOLAGAGE_18 (1 << 13)
16PAD_CTL_DRIVE_VOLAGAGE_33 (0 << 13)
17PAD_CTL_HYS (1 << 8)
18PAD_CTL_PKE (1 << 7)
19PAD_CTL_PUE (1 << 6)
20PAD_CTL_PUS_100K_DOWN (0 << 4)
21PAD_CTL_PUS_47K_UP (1 << 4)
22PAD_CTL_PUS_100K_UP (2 << 4)
23PAD_CTL_PUS_22K_UP (3 << 4)
24PAD_CTL_ODE_CMOS (0 << 3)
25PAD_CTL_ODE_OPENDRAIN (1 << 3)
26PAD_CTL_DSE_NOMINAL (0 << 1)
27PAD_CTL_DSE_HIGH (1 << 1)
28PAD_CTL_DSE_MAX (2 << 1)
29PAD_CTL_SRE_FAST (1 << 0)
30PAD_CTL_SRE_SLOW (0 << 0)
31
32Refer to imx35-pinfunc.h in device tree source folder for all available
33imx35 PIN_FUNC_ID.
Documentation/devicetree/bindings/pinctrl/fsl,imx35-pinctrl.yamlrenamed from Documentation/devicetree/bindings/pinctrl/fsl,imx6ul-pinctrl.yaml+78−10
@@ -1,10 +1,10 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.22%YAML 1.2
3---3---
4$id: http://devicetree.org/schemas/pinctrl/fsl,imx6ul-pinctrl.yaml#4$id: http://devicetree.org/schemas/pinctrl/fsl,imx35-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7title: Freescale IMX6UL IOMUX Controller7title: Freescale IMX35/IMX5x/IMX6 IOMUX Controller
8 8
9maintainers:9maintainers:
10 - Dong Aisheng <aisheng.dong@nxp.com>10 - Dong Aisheng <aisheng.dong@nxp.com>
@@ -18,9 +18,21 @@ allOf: · 7 unmodified lines
18 18
19properties:19properties:
20 compatible:20 compatible:
21 enum:21 oneOf:
22 - fsl,imx6ul-iomuxc22 - enum:
23 - fsl,imx6ull-iomuxc-snvs23 - fsl,imx35-iomuxc
24 - fsl,imx51-iomuxc
25 - fsl,imx53-iomuxc
26 - fsl,imx6dl-iomuxc
27 - fsl,imx6q-iomuxc
28 - fsl,imx6sl-iomuxc
29 - fsl,imx6sll-iomuxc
30 - fsl,imx6sx-iomuxc
31 - fsl,imx6ul-iomuxc
32 - fsl,imx6ull-iomuxc-snvs
33 - items:
34 - const: fsl,imx50-iomuxc
35 - const: fsl,imx53-iomuxc
24 36
25 reg:37 reg:
26 maxItems: 138 maxItems: 1
@@ -39,9 +51,9 @@ patternProperties: · 12 unmodified lines
39 each entry consists of 6 integers and represents the mux and config51 each entry consists of 6 integers and represents the mux and config
40 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg52 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
41 mux_val input_val> are specified using a PIN_FUNC_ID macro, which can53 mux_val input_val> are specified using a PIN_FUNC_ID macro, which can
42 be found in <arch/arm/boot/dts/imx6ul-pinfunc.h>. The last integer54 be found in <arch/arm/boot/dts/nxp/imx/imx*-pinfunc.h>. The last integer
43 CONFIG is the pad setting value like pull-up on this pin. Please55 CONFIG is the pad setting value like pull-up on this pin. Please
44 refer to i.MX6UL Reference Manual for detailed CONFIG settings.56 refer to matching i.MX Reference Manual for detailed CONFIG settings.
45 $ref: /schemas/types.yaml#/definitions/uint32-matrix57 $ref: /schemas/types.yaml#/definitions/uint32-matrix
46 items:58 items:
47 items:59 items:
@@ -56,7 +68,41 @@ patternProperties: · 8 unmodified lines
56 - description: |68 - description: |
57 "input_val" indicates the select input value to be applied.69 "input_val" indicates the select input value to be applied.
58 - description: |70 - description: |
59 "pad_setting" indicates the pad configuration value to be applied:71 "pad_setting" indicates the pad configuration value to be applied.
72 Common i.MX35
73 PAD_CTL_DRIVE_VOLAGAGE_18 (1 << 13)
74 PAD_CTL_DRIVE_VOLAGAGE_33 (0 << 13)
75 PAD_CTL_HYS (1 << 8)
76 PAD_CTL_PKE (1 << 7)
77 PAD_CTL_PUE (1 << 6)
78 PAD_CTL_PUS_100K_DOWN (0 << 4)
79 PAD_CTL_PUS_47K_UP (1 << 4)
80 PAD_CTL_PUS_100K_UP (2 << 4)
81 PAD_CTL_PUS_22K_UP (3 << 4)
82 PAD_CTL_ODE_CMOS (0 << 3)
83 PAD_CTL_ODE_OPENDRAIN (1 << 3)
84 PAD_CTL_DSE_NOMINAL (0 << 1)
85 PAD_CTL_DSE_HIGH (1 << 1)
86 PAD_CTL_DSE_MAX (2 << 1)
87 PAD_CTL_SRE_FAST (1 << 0)
88 PAD_CTL_SRE_SLOW (0 << 0)
89 Common i.MX50/i.MX51/i.MX53 bits
90 PAD_CTL_HVE (1 << 13)
91 PAD_CTL_HYS (1 << 8)
92 PAD_CTL_PKE (1 << 7)
93 PAD_CTL_PUE (1 << 6)
94 PAD_CTL_PUS_100K_DOWN (0 << 4)
95 PAD_CTL_PUS_47K_UP (1 << 4)
96 PAD_CTL_PUS_100K_UP (2 << 4)
97 PAD_CTL_PUS_22K_UP (3 << 4)
98 PAD_CTL_ODE (1 << 3)
99 PAD_CTL_DSE_LOW (0 << 1)
100 PAD_CTL_DSE_MED (1 << 1)
101 PAD_CTL_DSE_HIGH (2 << 1)
102 PAD_CTL_DSE_MAX (3 << 1)
103 PAD_CTL_SRE_FAST (1 << 0)
104 PAD_CTL_SRE_SLOW (0 << 0)
105 Common i.MX6 bits
60 PAD_CTL_HYS (1 << 16)106 PAD_CTL_HYS (1 << 16)
61 PAD_CTL_PUS_100K_DOWN (0 << 14)107 PAD_CTL_PUS_100K_DOWN (0 << 14)
62 PAD_CTL_PUS_47K_UP (1 << 14)108 PAD_CTL_PUS_47K_UP (1 << 14)
@@ -69,6 +115,11 @@ patternProperties: · 6 unmodified lines
69 PAD_CTL_SPEED_MED (1 << 6)115 PAD_CTL_SPEED_MED (1 << 6)
70 PAD_CTL_SPEED_HIGH (3 << 6)116 PAD_CTL_SPEED_HIGH (3 << 6)
71 PAD_CTL_DSE_DISABLE (0 << 3)117 PAD_CTL_DSE_DISABLE (0 << 3)
118 PAD_CTL_SRE_FAST (1 << 0)
119 PAD_CTL_SRE_SLOW (0 << 0)
120 i.MX6SL/MX6SLL specific bits
121 PAD_CTL_LVE (1 << 22) (MX6SL/SLL only)
122 i.MX6SLL/i.MX6SX/i.MX6UL/i.MX6ULL specific bits
72 PAD_CTL_DSE_260ohm (1 << 3)123 PAD_CTL_DSE_260ohm (1 << 3)
73 PAD_CTL_DSE_130ohm (2 << 3)124 PAD_CTL_DSE_130ohm (2 << 3)
74 PAD_CTL_DSE_87ohm (3 << 3)125 PAD_CTL_DSE_87ohm (3 << 3)
@@ -76,8 +127,14 @@ patternProperties: · 1 unmodified line
76 PAD_CTL_DSE_52ohm (5 << 3)127 PAD_CTL_DSE_52ohm (5 << 3)
77 PAD_CTL_DSE_43ohm (6 << 3)128 PAD_CTL_DSE_43ohm (6 << 3)
78 PAD_CTL_DSE_37ohm (7 << 3)129 PAD_CTL_DSE_37ohm (7 << 3)
79 PAD_CTL_SRE_FAST (1 << 0)130 i.MX6DL/i.MX6Q/i.MX6SL specific bits
80 PAD_CTL_SRE_SLOW (0 << 0)131 PAD_CTL_DSE_240ohm (1 << 3)
132 PAD_CTL_DSE_120ohm (2 << 3)
133 PAD_CTL_DSE_80ohm (3 << 3)
134 PAD_CTL_DSE_60ohm (4 << 3)
135 PAD_CTL_DSE_48ohm (5 << 3)
136 PAD_CTL_DSE_40ohm (6 << 3)
137 PAD_CTL_DSE_34ohm (7 << 3)
81 138
82 required:139 required:
83 - fsl,pins140 - fsl,pins
@@ -114,3 +171,14 @@ examples: · 30 unmodified lines
114 >;171 >;
115 };172 };
116 };173 };
174 - |
175 iomuxc_mx6q: pinctrl@20e0000 {
176 compatible = "fsl,imx6q-iomuxc";
177 reg = <0x20e0000 0x4000>;
178
179 pinctrl_uart4: uart4grp {
180 fsl,pins =
181 <0x288 0x658 0x000 0x3 0x0 0x140>,
182 <0x28c 0x65c 0x938 0x3 0x3 0x140>;
183 };
184 };
Documentation/devicetree/bindings/pinctrl/fsl,imx50-pinctrl.txt+0−32
@@ -1,32 +0,0 @@
1* Freescale IMX50 IOMUX Controller
2
3Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
4and usage.
5
6Required properties:
7- compatible: "fsl,imx50-iomuxc"
8- fsl,pins: two integers array, represents a group of pins mux and config
9 setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a
10 pin working on a specific function, CONFIG is the pad setting value like
11 pull-up for this pin. Please refer to imx50 datasheet for the valid pad
12 config settings.
13
14CONFIG bits definition:
15PAD_CTL_HVE (1 << 13)
16PAD_CTL_HYS (1 << 8)
17PAD_CTL_PKE (1 << 7)
18PAD_CTL_PUE (1 << 6)
19PAD_CTL_PUS_100K_DOWN (0 << 4)
20PAD_CTL_PUS_47K_UP (1 << 4)
21PAD_CTL_PUS_100K_UP (2 << 4)
22PAD_CTL_PUS_22K_UP (3 << 4)
23PAD_CTL_ODE (1 << 3)
24PAD_CTL_DSE_LOW (0 << 1)
25PAD_CTL_DSE_MED (1 << 1)
26PAD_CTL_DSE_HIGH (2 << 1)
27PAD_CTL_DSE_MAX (3 << 1)
28PAD_CTL_SRE_FAST (1 << 0)
29PAD_CTL_SRE_SLOW (0 << 0)
30
31Refer to imx50-pinfunc.h in device tree source folder for all available
32imx50 PIN_FUNC_ID.
Documentation/devicetree/bindings/pinctrl/fsl,imx51-pinctrl.txt+0−32
@@ -1,32 +0,0 @@
1* Freescale IMX51 IOMUX Controller
2
3Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
4and usage.
5
6Required properties:
7- compatible: "fsl,imx51-iomuxc"
8- fsl,pins: two integers array, represents a group of pins mux and config
9 setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a
10 pin working on a specific function, CONFIG is the pad setting value like
11 pull-up for this pin. Please refer to imx51 datasheet for the valid pad
12 config settings.
13
14CONFIG bits definition:
15PAD_CTL_HVE (1 << 13)
16PAD_CTL_HYS (1 << 8)
17PAD_CTL_PKE (1 << 7)
18PAD_CTL_PUE (1 << 6)
19PAD_CTL_PUS_100K_DOWN (0 << 4)
20PAD_CTL_PUS_47K_UP (1 << 4)
21PAD_CTL_PUS_100K_UP (2 << 4)
22PAD_CTL_PUS_22K_UP (3 << 4)
23PAD_CTL_ODE (1 << 3)
24PAD_CTL_DSE_LOW (0 << 1)
25PAD_CTL_DSE_MED (1 << 1)
26PAD_CTL_DSE_HIGH (2 << 1)
27PAD_CTL_DSE_MAX (3 << 1)
28PAD_CTL_SRE_FAST (1 << 0)
29PAD_CTL_SRE_SLOW (0 << 0)
30
31Refer to imx51-pinfunc.h in device tree source folder for all available
32imx51 PIN_FUNC_ID.
Documentation/devicetree/bindings/pinctrl/fsl,imx53-pinctrl.txt+0−32
@@ -1,32 +0,0 @@
1* Freescale IMX53 IOMUX Controller
2
3Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
4and usage.
5
6Required properties:
7- compatible: "fsl,imx53-iomuxc"
8- fsl,pins: two integers array, represents a group of pins mux and config
9 setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a
10 pin working on a specific function, CONFIG is the pad setting value like
11 pull-up for this pin. Please refer to imx53 datasheet for the valid pad
12 config settings.
13
14CONFIG bits definition:
15PAD_CTL_HVE (1 << 13)
16PAD_CTL_HYS (1 << 8)
17PAD_CTL_PKE (1 << 7)
18PAD_CTL_PUE (1 << 6)
19PAD_CTL_PUS_100K_DOWN (0 << 4)
20PAD_CTL_PUS_47K_UP (1 << 4)
21PAD_CTL_PUS_100K_UP (2 << 4)
22PAD_CTL_PUS_22K_UP (3 << 4)
23PAD_CTL_ODE (1 << 3)
24PAD_CTL_DSE_LOW (0 << 1)
25PAD_CTL_DSE_MED (1 << 1)
26PAD_CTL_DSE_HIGH (2 << 1)
27PAD_CTL_DSE_MAX (3 << 1)
28PAD_CTL_SRE_FAST (1 << 0)
29PAD_CTL_SRE_SLOW (0 << 0)
30
31Refer to imx53-pinfunc.h in device tree source folder for all available
32imx53 PIN_FUNC_ID.
Documentation/devicetree/bindings/pinctrl/fsl,imx6dl-pinctrl.txt+0−38
@@ -1,38 +0,0 @@
1* Freescale IMX6 DualLite/Solo IOMUX Controller
2
3Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
4and usage.
5
6Required properties:
7- compatible: "fsl,imx6dl-iomuxc"
8- fsl,pins: two integers array, represents a group of pins mux and config
9 setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a
10 pin working on a specific function, CONFIG is the pad setting value like
11 pull-up for this pin. Please refer to imx6dl datasheet for the valid pad
12 config settings.
13
14CONFIG bits definition:
15PAD_CTL_HYS (1 << 16)
16PAD_CTL_PUS_100K_DOWN (0 << 14)
17PAD_CTL_PUS_47K_UP (1 << 14)
18PAD_CTL_PUS_100K_UP (2 << 14)
19PAD_CTL_PUS_22K_UP (3 << 14)
20PAD_CTL_PUE (1 << 13)
21PAD_CTL_PKE (1 << 12)
22PAD_CTL_ODE (1 << 11)
23PAD_CTL_SPEED_LOW (1 << 6)
24PAD_CTL_SPEED_MED (2 << 6)
25PAD_CTL_SPEED_HIGH (3 << 6)
26PAD_CTL_DSE_DISABLE (0 << 3)
27PAD_CTL_DSE_240ohm (1 << 3)
28PAD_CTL_DSE_120ohm (2 << 3)
29PAD_CTL_DSE_80ohm (3 << 3)
30PAD_CTL_DSE_60ohm (4 << 3)
31PAD_CTL_DSE_48ohm (5 << 3)
32PAD_CTL_DSE_40ohm (6 << 3)
33PAD_CTL_DSE_34ohm (7 << 3)
34PAD_CTL_SRE_FAST (1 << 0)
35PAD_CTL_SRE_SLOW (0 << 0)
36
37Refer to imx6dl-pinfunc.h in device tree source folder for all available
38imx6dl PIN_FUNC_ID.
Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt+0−38
@@ -1,38 +0,0 @@
1* Freescale IMX6Q IOMUX Controller
2
3Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
4and usage.
5
6Required properties:
7- compatible: "fsl,imx6q-iomuxc"
8- fsl,pins: two integers array, represents a group of pins mux and config
9 setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a
10 pin working on a specific function, CONFIG is the pad setting value like
11 pull-up for this pin. Please refer to imx6q datasheet for the valid pad
12 config settings.
13
14CONFIG bits definition:
15PAD_CTL_HYS (1 << 16)
16PAD_CTL_PUS_100K_DOWN (0 << 14)
17PAD_CTL_PUS_47K_UP (1 << 14)
18PAD_CTL_PUS_100K_UP (2 << 14)
19PAD_CTL_PUS_22K_UP (3 << 14)
20PAD_CTL_PUE (1 << 13)
21PAD_CTL_PKE (1 << 12)
22PAD_CTL_ODE (1 << 11)
23PAD_CTL_SPEED_LOW (1 << 6)
24PAD_CTL_SPEED_MED (2 << 6)
25PAD_CTL_SPEED_HIGH (3 << 6)
26PAD_CTL_DSE_DISABLE (0 << 3)
27PAD_CTL_DSE_240ohm (1 << 3)
28PAD_CTL_DSE_120ohm (2 << 3)
29PAD_CTL_DSE_80ohm (3 << 3)
30PAD_CTL_DSE_60ohm (4 << 3)
31PAD_CTL_DSE_48ohm (5 << 3)
32PAD_CTL_DSE_40ohm (6 << 3)
33PAD_CTL_DSE_34ohm (7 << 3)
34PAD_CTL_SRE_FAST (1 << 0)
35PAD_CTL_SRE_SLOW (0 << 0)
36
37Refer to imx6q-pinfunc.h in device tree source folder for all available
38imx6q PIN_FUNC_ID.
Documentation/devicetree/bindings/pinctrl/fsl,imx6sl-pinctrl.txt+0−39
@@ -1,39 +0,0 @@
1* Freescale IMX6 SoloLite IOMUX Controller
2
3Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
4and usage.
5
6Required properties:
7- compatible: "fsl,imx6sl-iomuxc"
8- fsl,pins: two integers array, represents a group of pins mux and config
9 setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a
10 pin working on a specific function, CONFIG is the pad setting value like
11 pull-up for this pin. Please refer to imx6sl datasheet for the valid pad
12 config settings.
13
14CONFIG bits definition:
15PAD_CTL_LVE (1 << 22)
16PAD_CTL_HYS (1 << 16)
17PAD_CTL_PUS_100K_DOWN (0 << 14)
18PAD_CTL_PUS_47K_UP (1 << 14)
19PAD_CTL_PUS_100K_UP (2 << 14)
20PAD_CTL_PUS_22K_UP (3 << 14)
21PAD_CTL_PUE (1 << 13)
22PAD_CTL_PKE (1 << 12)
23PAD_CTL_ODE (1 << 11)
24PAD_CTL_SPEED_LOW (1 << 6)
25PAD_CTL_SPEED_MED (2 << 6)
26PAD_CTL_SPEED_HIGH (3 << 6)
27PAD_CTL_DSE_DISABLE (0 << 3)
28PAD_CTL_DSE_240ohm (1 << 3)
29PAD_CTL_DSE_120ohm (2 << 3)
30PAD_CTL_DSE_80ohm (3 << 3)
31PAD_CTL_DSE_60ohm (4 << 3)
32PAD_CTL_DSE_48ohm (5 << 3)
33PAD_CTL_DSE_40ohm (6 << 3)
34PAD_CTL_DSE_34ohm (7 << 3)
35PAD_CTL_SRE_FAST (1 << 0)
36PAD_CTL_SRE_SLOW (0 << 0)
37
38Refer to imx6sl-pinfunc.h in device tree source folder for all available
39imx6sl PIN_FUNC_ID.
Documentation/devicetree/bindings/pinctrl/fsl,imx6sll-pinctrl.txt+0−40
@@ -1,40 +0,0 @@
1* Freescale i.MX6 SLL IOMUX Controller
2
3Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
4and usage.
5
6Required properties:
7- compatible: "fsl,imx6sll-iomuxc"
8- fsl,pins: each entry consists of 6 integers and represents the mux and config
9 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
10 input_val> are specified using a PIN_FUNC_ID macro, which can be found in
11 imx6sll-pinfunc.h under device tree source folder. The last integer CONFIG is
12 the pad setting value like pull-up on this pin. Please refer to i.MX6SLL
13 Reference Manual for detailed CONFIG settings.
14
15CONFIG bits definition:
16PAD_CTL_LVE (1 << 22)
17PAD_CTL_HYS (1 << 16)
18PAD_CTL_PUS_100K_DOWN (0 << 14)
19PAD_CTL_PUS_47K_UP (1 << 14)
20PAD_CTL_PUS_100K_UP (2 << 14)
21PAD_CTL_PUS_22K_UP (3 << 14)
22PAD_CTL_PUE (1 << 13)
23PAD_CTL_PKE (1 << 12)
24PAD_CTL_ODE (1 << 11)
25PAD_CTL_SPEED_LOW (0 << 6)
26PAD_CTL_SPEED_MED (1 << 6)
27PAD_CTL_SPEED_HIGH (3 << 6)
28PAD_CTL_DSE_DISABLE (0 << 3)
29PAD_CTL_DSE_260ohm (1 << 3)
30PAD_CTL_DSE_130ohm (2 << 3)
31PAD_CTL_DSE_87ohm (3 << 3)
32PAD_CTL_DSE_65ohm (4 << 3)
33PAD_CTL_DSE_52ohm (5 << 3)
34PAD_CTL_DSE_43ohm (6 << 3)
35PAD_CTL_DSE_37ohm (7 << 3)
36PAD_CTL_SRE_FAST (1 << 0)
37PAD_CTL_SRE_SLOW (0 << 0)
38
39Refer to imx6sll-pinfunc.h in device tree source folder for all available
40imx6sll PIN_FUNC_ID.
Documentation/devicetree/bindings/pinctrl/fsl,imx6sx-pinctrl.txt+0−36
@@ -1,36 +0,0 @@
1* Freescale i.MX6 SoloX IOMUX Controller
2
3Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
4and usage.
5
6Required properties:
7- compatible: "fsl,imx6sx-iomuxc"
8- fsl,pins: each entry consists of 6 integers and represents the mux and config
9 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
10 input_val> are specified using a PIN_FUNC_ID macro, which can be found in
11 imx6sx-pinfunc.h under device tree source folder. The last integer CONFIG is
12 the pad setting value like pull-up on this pin. Please refer to i.MX6 SoloX
13 Reference Manual for detailed CONFIG settings.
14
15CONFIG bits definition:
16PAD_CTL_HYS (1 << 16)
17PAD_CTL_PUS_100K_DOWN (0 << 14)
18PAD_CTL_PUS_47K_UP (1 << 14)
19PAD_CTL_PUS_100K_UP (2 << 14)
20PAD_CTL_PUS_22K_UP (3 << 14)
21PAD_CTL_PUE (1 << 13)
22PAD_CTL_PKE (1 << 12)
23PAD_CTL_ODE (1 << 11)
24PAD_CTL_SPEED_LOW (0 << 6)
25PAD_CTL_SPEED_MED (1 << 6)
26PAD_CTL_SPEED_HIGH (3 << 6)
27PAD_CTL_DSE_DISABLE (0 << 3)
28PAD_CTL_DSE_260ohm (1 << 3)
29PAD_CTL_DSE_130ohm (2 << 3)
30PAD_CTL_DSE_87ohm (3 << 3)
31PAD_CTL_DSE_65ohm (4 << 3)
32PAD_CTL_DSE_52ohm (5 << 3)
33PAD_CTL_DSE_43ohm (6 << 3)
34PAD_CTL_DSE_37ohm (7 << 3)
35PAD_CTL_SRE_FAST (1 << 0)
36PAD_CTL_SRE_SLOW (0 << 0)
Documentation/devicetree/bindings/pinctrl/microchip,mcp23s08.yaml+161−0
@@ -0,0 +1,161 @@
1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/microchip,mcp23s08.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Microchip I/O expander with serial interface (I2C/SPI)
8
9maintainers:
10 - Himanshu Bhavani <himanshu.bhavani@siliconsignals.io>
11
12description:
13 Microchip MCP23008, MCP23017, MCP23S08, MCP23S17, MCP23S18 GPIO expander
14 chips.These chips provide 8 or 16 GPIO pins with either I2C or SPI interface.
15
16allOf:
17 - $ref: /schemas/spi/spi-peripheral-props.yaml#
18
19properties:
20 compatible:
21 enum:
22 - microchip,mcp23s08
23 - microchip,mcp23s17
24 - microchip,mcp23s18
25 - microchip,mcp23008
26 - microchip,mcp23017
27 - microchip,mcp23018
28
29 reg:
30 maxItems: 1
31
32 gpio-controller: true
33
34 '#gpio-cells':
35 const: 2
36
37 interrupt-controller: true
38
39 '#interrupt-cells':
40 const: 2
41
42 interrupts:
43 maxItems: 1
44
45 reset-gpios:
46 description: GPIO specifier for active-low reset pin.
47 maxItems: 1
48
49 microchip,spi-present-mask:
50 description:
51 Multiple SPI chips can share the same SPI chipselect. Set a bit in
52 bit0-7 in this mask to 1 if there is a chip connected with the
53 corresponding spi address set. For example if you have a chip with
54 address 3 connected, you have to set bit3 to 1, which is 0x08. mcp23s08
55 chip variant only supports bits 0-3. It is not possible to mix mcp23s08
56 and mcp23s17 on the same chipselect. Set at least one bit to 1 for SPI
57 chips.
58 $ref: /schemas/types.yaml#/definitions/uint8
59
60 microchip,irq-mirror:
61 type: boolean
62 description:
63 Sets the mirror flag in the IOCON register. Devices with two interrupt
64 outputs (these are the devices ending with 17 and those that have 16 IOs)
65 have two IO banks IO 0-7 form bank 1 and IO 8-15 are bank 2. These chips
66 have two different interrupt outputs One for bank 1 and another for
67 bank 2. If irq-mirror is set, both interrupts are generated regardless of
68 the bank that an input change occurred on. If it is not set,the interrupt
69 are only generated for the bank they belong to.
70
71 microchip,irq-active-high:
72 type: boolean
73 description:
74 Sets the INTPOL flag in the IOCON register.This configures the IRQ output
75 polarity as active high.
76
77 drive-open-drain:
78 type: boolean
79 description:
80 Sets the ODR flag in the IOCON register. This configures the IRQ output as
81 open drain active low.
82
83 pinmux:
84 type: object
85 properties:
86 pins:
87 description:
88 The list of GPIO pins controlled by this node. Each pin name
89 corresponds to a physical pin on the GPIO expander.
90 items:
91 pattern: '^gpio([0-9]|[1][0-5])$'
92 maxItems: 16
93
94 bias-pull-up:
95 type: boolean
96 description:
97 Configures pull-up resistors for the GPIO pins. Absence of this
98 property will leave the configuration in its default state.
99
100 required:
101 - pins
102
103 additionalProperties: false
104
105required:
106 - compatible
107 - reg
108 - gpio-controller
109 - '#gpio-cells'
110
111unevaluatedProperties: false
112
113examples:
114 - |
115 #include <dt-bindings/interrupt-controller/irq.h>
116 #include <dt-bindings/gpio/gpio.h>
117
118 i2c {
119 #address-cells = <1>;
120 #size-cells = <0>;
121
122 gpio@21 {
123 compatible = "microchip,mcp23017";
124 reg = <0x21>;
125 gpio-controller;
126 #gpio-cells = <2>;
127
128 interrupt-parent = <&gpio1>;
129 interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
130 interrupt-controller;
131 #interrupt-cells = <2>;
132
133 microchip,irq-mirror;
134 pinctrl-names = "default";
135 pinctrl-0 = <&pinctrl_i2c_gpio0>, <&gpiopullups>;
136 reset-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>;
137
138 gpiopullups: pinmux {
139 pins = "gpio0", "gpio1", "gpio2", "gpio3",
140 "gpio4", "gpio5", "gpio6", "gpio7",
141 "gpio8", "gpio9", "gpio10", "gpio11",
142 "gpio12", "gpio13", "gpio14", "gpio15";
143 bias-pull-up;
144 };
145 };
146 };
147
148 - |
149 spi {
150 #address-cells = <1>;
151 #size-cells = <0>;
152
153 gpio@0 {
154 compatible = "microchip,mcp23s17";
155 reg = <0>;
156 gpio-controller;
157 #gpio-cells = <2>;
158 spi-max-frequency = <1000000>;
159 microchip,spi-present-mask = /bits/ 8 <0x01>;
160 };
161 };
Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml+19−8
@@ -12,14 +12,24 @@ maintainers: · 11 unmodified lines
12 12
13properties:13properties:
14 compatible:14 compatible:
15 enum:15 oneOf:
16 - microchip,lan966x-pinctrl16 - enum:
17 - microchip,sparx5-pinctrl17 - microchip,lan966x-pinctrl
18 - mscc,jaguar2-pinctrl18 - microchip,lan9691-pinctrl
19 - mscc,luton-pinctrl19 - microchip,sparx5-pinctrl
20 - mscc,ocelot-pinctrl20 - mscc,jaguar2-pinctrl
21 - mscc,serval-pinctrl21 - mscc,luton-pinctrl
22 - mscc,servalt-pinctrl22 - mscc,ocelot-pinctrl
23 - mscc,serval-pinctrl
24 - mscc,servalt-pinctrl
25 - items:
26 - enum:
27 - microchip,lan9698-pinctrl
28 - microchip,lan9696-pinctrl
29 - microchip,lan9694-pinctrl
30 - microchip,lan9693-pinctrl
31 - microchip,lan9692-pinctrl
32 - const: microchip,lan9691-pinctrl
23 33
24 reg:34 reg:
25 items:35 items:
@@ -85,6 +95,7 @@ allOf: · 59 unmodified lines
85 contains:95 contains:
86 enum:96 enum:
87 - microchip,lan966x-pinctrl97 - microchip,lan966x-pinctrl
98 - microchip,lan9691-pinctrl
88 - microchip,sparx5-pinctrl99 - microchip,sparx5-pinctrl
89 then:100 then:
90 properties:101 properties:
Documentation/devicetree/bindings/pinctrl/pinctrl-mcp23s08.txt+0−148
@@ -1,148 +0,0 @@
1Microchip MCP2308/MCP23S08/MCP23017/MCP23S17 driver for
28-/16-bit I/O expander with serial interface (I2C/SPI)
3
4Required properties:
5- compatible : Should be
6 - "mcp,mcp23s08" (DEPRECATED) for 8 GPIO SPI version
7 - "mcp,mcp23s17" (DEPRECATED) for 16 GPIO SPI version
8 - "mcp,mcp23008" (DEPRECATED) for 8 GPIO I2C version or
9 - "mcp,mcp23017" (DEPRECATED) for 16 GPIO I2C version of the chip
10
11 - "microchip,mcp23s08" for 8 GPIO SPI version
12 - "microchip,mcp23s17" for 16 GPIO SPI version
13 - "microchip,mcp23s18" for 16 GPIO SPI version
14 - "microchip,mcp23008" for 8 GPIO I2C version or
15 - "microchip,mcp23017" for 16 GPIO I2C version of the chip
16 - "microchip,mcp23018" for 16 GPIO I2C version
17 NOTE: Do not use the old mcp prefix any more. It is deprecated and will be
18 removed.
19- #gpio-cells : Should be two.
20 - first cell is the pin number
21 - second cell is used to specify flags as described in
22 'Documentation/devicetree/bindings/gpio/gpio.txt'. Allowed values defined by
23 'include/dt-bindings/gpio/gpio.h' (e.g. GPIO_ACTIVE_LOW).
24- gpio-controller : Marks the device node as a GPIO controller.
25- reg : For an address on its bus. I2C uses this a the I2C address of the chip.
26 SPI uses this to specify the chipselect line which the chip is
27 connected to. The driver and the SPI variant of the chip support
28 multiple chips on the same chipselect. Have a look at
29 microchip,spi-present-mask below.
30
31Required device specific properties (only for SPI chips):
32- mcp,spi-present-mask (DEPRECATED)
33- microchip,spi-present-mask : This is a present flag, that makes only sense for SPI
34 chips - as the name suggests. Multiple SPI chips can share the same
35 SPI chipselect. Set a bit in bit0-7 in this mask to 1 if there is a
36 chip connected with the corresponding spi address set. For example if
37 you have a chip with address 3 connected, you have to set bit3 to 1,
38 which is 0x08. mcp23s08 chip variant only supports bits 0-3. It is not
39 possible to mix mcp23s08 and mcp23s17 on the same chipselect. Set at
40 least one bit to 1 for SPI chips.
41 NOTE: Do not use the old mcp prefix any more. It is deprecated and will be
42 removed.
43- spi-max-frequency = The maximum frequency this chip is able to handle
44
45Optional properties:
46- #interrupt-cells : Should be two.
47 - first cell is the pin number
48 - second cell is used to specify flags.
49- interrupt-controller: Marks the device node as a interrupt controller.
50- drive-open-drain: Sets the ODR flag in the IOCON register. This configures
51 the IRQ output as open drain active low.
52- reset-gpios: Corresponds to the active-low RESET# pin for the chip
53
54Optional device specific properties:
55- microchip,irq-mirror: Sets the mirror flag in the IOCON register. Devices
56 with two interrupt outputs (these are the devices ending with 17 and
57 those that have 16 IOs) have two IO banks: IO 0-7 form bank 1 and
58 IO 8-15 are bank 2. These chips have two different interrupt outputs:
59 One for bank 1 and another for bank 2. If irq-mirror is set, both
60 interrupts are generated regardless of the bank that an input change
61 occurred on. If it is not set, the interrupt are only generated for the
62 bank they belong to.
63 On devices with only one interrupt output this property is useless.
64- microchip,irq-active-high: Sets the INTPOL flag in the IOCON register. This
65 configures the IRQ output polarity as active high.
66
67Example I2C (with interrupt):
68gpiom1: gpio@20 {
69 compatible = "microchip,mcp23017";
70 gpio-controller;
71 #gpio-cells = <2>;
72 reg = <0x20>;
73
74 interrupt-parent = <&gpio1>;
75 interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
76 interrupt-controller;
77 #interrupt-cells=<2>;
78 microchip,irq-mirror;
79};
80
81Example SPI:
82gpiom1: gpio@0 {
83 compatible = "microchip,mcp23s17";
84 gpio-controller;
85 #gpio-cells = <2>;
86 microchip,spi-present-mask = <0x01>;
87 reg = <0>;
88 spi-max-frequency = <1000000>;
89};
90
91Pull-up configuration
92=====================
93
94If pins are used as output, they can also be configured with pull-ups. This is
95done with pinctrl.
96
97Please refer file <devicetree/bindings/pinctrl/pinctrl-bindings.txt>
98for details of the common pinctrl bindings used by client devices,
99including the meaning of the phrase "pin configuration node".
100
101Optional Pinmux properties:
102--------------------------
103Following properties are required if default setting of pins are required
104at boot.
105- pinctrl-names: A pinctrl state named per <pinctrl-bindings.txt>.
106- pinctrl[0...n]: Properties to contain the phandle for pinctrl states per
107 <pinctrl-bindings.txt>.
108
109The pin configurations are defined as child of the pinctrl states node. Each
110sub-node have following properties:
111
112Required properties:
113------------------
114- pins: List of pins. Valid values of pins properties are:
115 gpio0 ... gpio7 for the devices with 8 GPIO pins and
116 gpio0 ... gpio15 for the devices with 16 GPIO pins.
117
118Optional properties:
119-------------------
120The following optional property is defined in the pinmux DT binding document
121<pinctrl-bindings.txt>. Absence of this property will leave the configuration
122in its default state.
123 bias-pull-up
124
125Example with pinctrl to pull-up output pins:
126gpio21: gpio@21 {
127 compatible = "microchip,mcp23017";
128 gpio-controller;
129 #gpio-cells = <0x2>;
130 reg = <0x21>;
131 interrupt-parent = <&socgpio>;
132 interrupts = <0x17 0x8>;
133 interrupt-names = "mcp23017@21 irq";
134 interrupt-controller;
135 #interrupt-cells = <0x2>;
136 microchip,irq-mirror;
137 pinctrl-names = "default";
138 pinctrl-0 = <&i2cgpio0irq>, <&gpio21pullups>;
139 reset-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>;
140
141 gpio21pullups: pinmux {
142 pins = "gpio0", "gpio1", "gpio2", "gpio3",
143 "gpio4", "gpio5", "gpio6", "gpio7",
144 "gpio8", "gpio9", "gpio10", "gpio11",
145 "gpio12", "gpio13", "gpio14", "gpio15";
146 bias-pull-up;
147 };
148};
Documentation/devicetree/bindings/pinctrl/pinctrl-single.yaml+4−0
@@ -33,6 +33,10 @@ properties: · 32 unmodified lines
33 - ti,omap5-padconf33 - ti,omap5-padconf
34 - ti,j7200-padconf34 - ti,j7200-padconf
35 - const: pinctrl-single35 - const: pinctrl-single
36 - items:
37 - enum:
38 - marvell,pxa1908-padconf
39 - const: pinconf-single
36 40
37 reg:41 reg:
38 maxItems: 142 maxItems: 1
Documentation/devicetree/bindings/pinctrl/qcom,ipq5424-tlmm.yaml+114−0
@@ -0,0 +1,114 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/qcom,ipq5424-tlmm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm IPQ5424 TLMM pin controller
8
9maintainers:
10 - Bjorn Andersson <andersson@kernel.org>
11
12description:
13 Top Level Mode Multiplexer pin controller in Qualcomm IPQ5424 SoC.
14
15allOf:
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
17
18properties:
19 compatible:
20 const: qcom,ipq5424-tlmm
21
22 reg:
23 maxItems: 1
24
25 interrupts:
26 maxItems: 1
27
28 gpio-reserved-ranges:
29 minItems: 1
30 maxItems: 25
31
32 gpio-line-names:
33 maxItems: 50
34
35patternProperties:
36 "-state$":
37 oneOf:
38 - $ref: "#/$defs/qcom-ipq5424-tlmm-state"
39 - patternProperties:
40 "-pins$":
41 $ref: "#/$defs/qcom-ipq5424-tlmm-state"
42 additionalProperties: false
43
44$defs:
45 qcom-ipq5424-tlmm-state:
46 type: object
47 description:
48 Pinctrl node's client devices use subnodes for desired pin configuration.
49 Client device subnodes use below standard properties.
50 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
51 unevaluatedProperties: false
52
53 properties:
54 pins:
55 description:
56 List of gpio pins affected by the properties specified in this
57 subnode.
58 items:
59 pattern: "^gpio([0-9]|[1-4][0-9])$"
60 minItems: 1
61 maxItems: 50
62
63 function:
64 description:
65 Specify the alternative function to be configured for the specified
66 pins.
67
68 enum: [ atest_char, atest_char0, atest_char1, atest_char2, atest_char3,
69 atest_tic, audio_pri, audio_pri0, audio_pri1, audio_sec,
70 audio_sec0, audio_sec1, core_voltage, cri_trng0, cri_trng1,
71 cri_trng2, cri_trng3, cxc_clk, cxc_data, dbg_out, gcc_plltest,
72 gcc_tlmm, gpio, i2c0_scl, i2c0_sda, i2c1_scl, i2c1_sda, i2c11,
73 mac0, mac1, mdc_mst, mdc_slv, mdio_mst, mdio_slv, pcie0_clk,
74 pcie0_wake, pcie1_clk, pcie1_wake, pcie2_clk, pcie2_wake,
75 pcie3_clk, pcie3_wake, pll_test, prng_rosc0, prng_rosc1,
76 prng_rosc2, prng_rosc3, PTA0_0, PTA0_1, PTA0_2, PTA10, PTA11,
77 pwm0, pwm1, pwm2, qdss_cti_trig_in_a0, qdss_cti_trig_out_a0,
78 qdss_cti_trig_in_a1, qdss_cti_trig_out_a1, qdss_cti_trig_in_b0,
79 qdss_cti_trig_out_b0, qdss_cti_trig_in_b1, qdss_cti_trig_out_b1,
80 qdss_traceclk_a, qdss_tracectl_a, qdss_tracedata_a, qspi_clk,
81 qspi_cs, qspi_data, resout, rx0, rx1, rx2, sdc_clk, sdc_cmd,
82 sdc_data, spi0, spi1, spi10, spi11, tsens_max, uart0, uart1,
83 wci_txd, wci_rxd, wsi_clk, wsi_data ]
84
85 required:
86 - pins
87
88required:
89 - compatible
90 - reg
91
92unevaluatedProperties: false
93
94examples:
95 - |
96 #include <dt-bindings/interrupt-controller/arm-gic.h>
97
98 tlmm: pinctrl@1000000 {
99 compatible = "qcom,ipq5424-tlmm";
100 reg = <0x01000000 0x300000>;
101 gpio-controller;
102 #gpio-cells = <0x2>;
103 gpio-ranges = <&tlmm 0 0 50>;
104 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
105 interrupt-controller;
106 #interrupt-cells = <0x2>;
107
108 uart1_pins: uart1-state {
109 pins = "gpio43", "gpio44";
110 function = "uart1";
111 drive-strength = <8>;
112 bias-pull-up;
113 };
114 };
Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml+3−0
@@ -48,6 +48,7 @@ properties: · 47 unmodified lines
48 - qcom,pm8916-gpio48 - qcom,pm8916-gpio
49 - qcom,pm8917-gpio49 - qcom,pm8917-gpio
50 - qcom,pm8921-gpio50 - qcom,pm8921-gpio
51 - qcom,pm8937-gpio
51 - qcom,pm8941-gpio52 - qcom,pm8941-gpio
52 - qcom,pm8950-gpio53 - qcom,pm8950-gpio
53 - qcom,pm8953-gpio54 - qcom,pm8953-gpio
@@ -184,6 +185,7 @@ allOf: · 130 unmodified lines
184 - qcom,pm8226-gpio185 - qcom,pm8226-gpio
185 - qcom,pm8350b-gpio186 - qcom,pm8350b-gpio
186 - qcom,pm8550ve-gpio187 - qcom,pm8550ve-gpio
188 - qcom,pm8937-gpio
187 - qcom,pm8950-gpio189 - qcom,pm8950-gpio
188 - qcom,pm8953-gpio190 - qcom,pm8953-gpio
189 - qcom,pmi632-gpio191 - qcom,pmi632-gpio
@@ -468,6 +470,7 @@ $defs: · 278 unmodified lines
468 - gpio1-gpio6 for pm8550vs470 - gpio1-gpio6 for pm8550vs
469 - gpio1-gpio38 for pm8917471 - gpio1-gpio38 for pm8917
470 - gpio1-gpio44 for pm8921472 - gpio1-gpio44 for pm8921
473 - gpio1-gpio8 for pm8937 (hole on gpio3, gpio4 and gpio6)
471 - gpio1-gpio36 for pm8941474 - gpio1-gpio36 for pm8941
472 - gpio1-gpio8 for pm8950 (hole on gpio3)475 - gpio1-gpio8 for pm8950 (hole on gpio3)
473 - gpio1-gpio8 for pm8953 (hole on gpio3 and gpio6)476 - gpio1-gpio8 for pm8953 (hole on gpio3 and gpio6)
Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.yaml+2−0
@@ -22,6 +22,7 @@ properties: · 21 unmodified lines
22 - qcom,pm8226-mpp22 - qcom,pm8226-mpp
23 - qcom,pm8841-mpp23 - qcom,pm8841-mpp
24 - qcom,pm8916-mpp24 - qcom,pm8916-mpp
25 - qcom,pm8937-mpp
25 - qcom,pm8941-mpp26 - qcom,pm8941-mpp
26 - qcom,pm8950-mpp27 - qcom,pm8950-mpp
27 - qcom,pmi8950-mpp28 - qcom,pmi8950-mpp
@@ -92,6 +93,7 @@ $defs: · 64 unmodified lines
92 this subnode. Valid pins are93 this subnode. Valid pins are
93 - mpp1-mpp4 for pm884194 - mpp1-mpp4 for pm8841
94 - mpp1-mpp4 for pm891695 - mpp1-mpp4 for pm8916
96 - mpp1-mpp4 for pm8937
95 - mpp1-mpp8 for pm894197 - mpp1-mpp8 for pm8941
96 - mpp1-mpp4 for pm895098 - mpp1-mpp4 for pm8950
97 - mpp1-mpp4 for pmi895099 - mpp1-mpp4 for pmi8950
Documentation/devicetree/bindings/pinctrl/qcom,qcs615-tlmm.yaml+124−0
@@ -0,0 +1,124 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/qcom,qcs615-tlmm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Technologies, Inc. QCS615 TLMM block
8
9maintainers:
10 - Lijuan Gao <quic_lijuang@quicinc.com>
11
12description:
13 Top Level Mode Multiplexer pin controller in Qualcomm QCS615 SoC.
14
15allOf:
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
17
18properties:
19 compatible:
20 const: qcom,qcs615-tlmm
21
22 reg:
23 maxItems: 3
24
25 reg-names:
26 items:
27 - const: east
28 - const: west
29 - const: south
30
31 interrupts:
32 maxItems: 1
33
34 gpio-reserved-ranges:
35 minItems: 1
36 maxItems: 62
37
38 gpio-line-names:
39 maxItems: 123
40
41patternProperties:
42 "-state$":
43 oneOf:
44 - $ref: "#/$defs/qcom-qcs615-tlmm-state"
45 - type: object
46 patternProperties:
47 "-pins$":
48 $ref: "#/$defs/qcom-qcs615-tlmm-state"
49 additionalProperties: false
50
51$defs:
52 qcom-qcs615-tlmm-state:
53 type: object
54 description:
55 Pinctrl node's client devices use subnodes for desired pin configuration.
56 Client device subnodes use below standard properties.
57 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
58 unevaluatedProperties: false
59
60 properties:
61 pins:
62 description:
63 List of gpio pins affected by the properties specified in this
64 subnode.
65 items:
66 oneOf:
67 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-9]|12[0-2])$"
68 - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk,
69 sdc2_clk, sdc2_cmd, sdc2_data, ufs_reset ]
70 minItems: 1
71 maxItems: 36
72
73 function:
74 description:
75 Specify the alternative function to be configured for the specified
76 pins.
77 enum: [ gpio, adsp_ext, agera_pll, aoss_cti, atest_char, atest_tsens,
78 atest_usb, cam_mclk, cci_async, cci_i2c, cci_timer, copy_gp,
79 copy_phase, cri_trng, dbg_out_clk, ddr_bist, ddr_pxi, dp_hot,
80 edp_hot, edp_lcd, emac_gcc, emac_phy_intr, forced_usb, gcc_gp,
81 gp_pdm, gps_tx, hs0_mi2s, hs1_mi2s, jitter_bist, ldo_en,
82 ldo_update, m_voc, mclk1, mclk2, mdp_vsync, mdp_vsync0_out,
83 mdp_vsync1_out, mdp_vsync2_out, mdp_vsync3_out, mdp_vsync4_out,
84 mdp_vsync5_out, mi2s_1, mss_lte, nav_pps_in, nav_pps_out,
85 pa_indicator_or, pcie_clk_req, pcie_ep_rst, phase_flag, pll_bist,
86 pll_bypassnl, pll_reset_n, prng_rosc, qdss_cti, qdss_gpio,
87 qlink_enable, qlink_request, qspi, qup0, qup1, rgmii,
88 sd_write_protect, sp_cmu, ter_mi2s, tgu_ch, uim1, uim2, usb0_hs,
89 usb1_hs, usb_phy_ps, vfr_1, vsense_trigger_mirnat, wlan, wsa_clk,
90 wsa_data ]
91
92 required:
93 - pins
94
95required:
96 - compatible
97 - reg
98 - reg-names
99
100unevaluatedProperties: false
101
102examples:
103 - |
104 #include <dt-bindings/interrupt-controller/arm-gic.h>
105
106 tlmm: pinctrl@3000000 {
107 compatible = "qcom,qcs615-tlmm";
108 reg = <0x03100000 0x300000>,
109 <0x03500000 0x300000>,
110 <0x03c00000 0x300000>;
111 reg-names = "east", "west", "south";
112 interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
113 gpio-ranges = <&tlmm 0 0 123>;
114 gpio-controller;
115 #gpio-cells = <2>;
116 interrupt-controller;
117 #interrupt-cells = <2>;
118
119 qup3-uart2-state {
120 pins ="gpio16", "gpio17";
121 function = "qup0";
122 };
123 };
124...
Documentation/devicetree/bindings/pinctrl/qcom,qcs8300-tlmm.yaml+118−0
@@ -0,0 +1,118 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/qcom,qcs8300-tlmm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Technologies, Inc. QCS8300 TLMM block
8
9maintainers:
10 - Jingyi Wang <quic_jingyw@quicinc.com>
11
12description: |
13 Top Level Mode Multiplexer pin controller in Qualcomm QCS8300 SoC.
14
15allOf:
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
17
18properties:
19 compatible:
20 const: qcom,qcs8300-tlmm
21
22 reg:
23 maxItems: 1
24
25 interrupts:
26 maxItems: 1
27
28 gpio-reserved-ranges:
29 minItems: 1
30 maxItems: 67
31
32 gpio-line-names:
33 maxItems: 133
34
35patternProperties:
36 "-state$":
37 oneOf:
38 - $ref: "#/$defs/qcom-qcs8300-tlmm-state"
39 - patternProperties:
40 "-pins$":
41 $ref: "#/$defs/qcom-qcs8300-tlmm-state"
42 additionalProperties: false
43
44$defs:
45 qcom-qcs8300-tlmm-state:
46 type: object
47 description:
48 Pinctrl node's client devices use subnodes for desired pin configuration.
49 Client device subnodes use below standard properties.
50 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
51 unevaluatedProperties: false
52
53 properties:
54 pins:
55 description:
56 List of gpio pins affected by the properties specified in this
57 subnode.
58 items:
59 oneOf:
60 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-2][0-9]|13[0-2])$"
61 - enum: [ ufs_reset, sdc1_rclk, sdc1_clk, sdc1_cmd, sdc1_data ]
62 minItems: 1
63 maxItems: 36
64
65 function:
66 description:
67 Specify the alternative function to be configured for the specified
68 pins.
69
70 enum: [ aoss_cti, atest_char, atest_usb2, audio_ref, cam_mclk,
71 cci_async, cci_i2c_scl, cci_i2c_sda, cci_timer, cri_trng,
72 dbg_out, ddr_bist, ddr_pxi0, ddr_pxi1, ddr_pxi2, ddr_pxi3,
73 edp0_hot, edp0_lcd, edp1_lcd, egpio, emac0_mcg0, emac0_mcg1,
74 emac0_mcg2, emac0_mcg3, emac0_mdc, emac0_mdio, emac0_ptp_aux,
75 emac0_ptp_pps, gcc_gp1, gcc_gp2, gcc_gp3, gcc_gp4, gcc_gp5,
76 gpio, hs0_mi2s, hs1_mi2s, hs2_mi2s, ibi_i3c, jitter_bist,
77 mdp0_vsync0, mdp0_vsync1, mdp0_vsync3, mdp0_vsync6, mdp0_vsync7,
78 mdp_vsync, mi2s1_data0, mi2s1_data1, mi2s1_sck, mi2s1_ws,
79 mi2s2_data0, mi2s2_data1, mi2s2_sck, mi2s2_ws, mi2s_mclk0,
80 mi2s_mclk1, pcie0_clkreq, pcie1_clkreq, phase_flag, pll_bist,
81 pll_clk, prng_rosc0, prng_rosc1, prng_rosc2, prng_rosc3,
82 qdss_cti, qdss_gpio, qup0_se0, qup0_se1, qup0_se2, qup0_se3,
83 qup0_se4, qup0_se5, qup0_se6, qup0_se7, qup1_se0, qup1_se1,
84 qup1_se2, qup1_se3, qup1_se4, qup1_se5, qup1_se6, qup1_se7,
85 qup2_se0, sailss_emac0, sailss_ospi, sail_top, sgmii_phy,
86 tb_trig, tgu_ch0, tgu_ch1, tgu_ch2, tgu_ch3, tsense_pwm1,
87 tsense_pwm2, tsense_pwm3, tsense_pwm4, usb2phy_ac,
88 vsense_trigger ]
89
90 required:
91 - pins
92
93required:
94 - compatible
95 - reg
96
97unevaluatedProperties: false
98
99examples:
100 - |
101 #include <dt-bindings/interrupt-controller/arm-gic.h>
102
103 tlmm: pinctrl@f100000 {
104 compatible = "qcom,qcs8300-tlmm";
105 reg = <0x0f100000 0x300000>;
106 interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
107 gpio-controller;
108 #gpio-cells = <2>;
109 gpio-ranges = <&tlmm 0 0 133>;
110 interrupt-controller;
111 #interrupt-cells = <2>;
112
113 qup-uart7-state {
114 pins = "gpio43", "gpio44";
115 function = "qup0_se7";
116 };
117 };
118...
Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-tlmm.yaml+7−1
@@ -17,7 +17,13 @@ allOf: · 16 unmodified lines
17 17
18properties:18properties:
19 compatible:19 compatible:
20 const: qcom,sa8775p-tlmm20 oneOf:
21 - items:
22 - enum:
23 - qcom,sa8255p-tlmm
24 - const: qcom,sa8775p-tlmm
25 - items:
26 - const: qcom,sa8775p-tlmm
21 27
22 reg:28 reg:
23 maxItems: 129 maxItems: 1
Documentation/devicetree/bindings/pinctrl/qcom,sar2130p-tlmm.yaml+138−0
@@ -0,0 +1,138 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/qcom,sar2130p-tlmm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Technologies, Inc. SAR2130P TLMM block
8
9maintainers:
10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
11
12description:
13 Top Level Mode Multiplexer pin controller in Qualcomm SAR2130P SoC.
14
15allOf:
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
17
18properties:
19 compatible:
20 const: qcom,sar2130p-tlmm
21
22 reg:
23 maxItems: 1
24
25 interrupts:
26 maxItems: 1
27
28 gpio-reserved-ranges:
29 minItems: 1
30 maxItems: 78
31
32 gpio-line-names:
33 maxItems: 156
34
35patternProperties:
36 "-state$":
37 oneOf:
38 - $ref: "#/$defs/qcom-sar2130p-tlmm-state"
39 - patternProperties:
40 "-pins$":
41 $ref: "#/$defs/qcom-sar2130p-tlmm-state"
42 additionalProperties: false
43
44$defs:
45 qcom-sar2130p-tlmm-state:
46 type: object
47 description:
48 Pinctrl node's client devices use subnodes for desired pin configuration.
49 Client device subnodes use below standard properties.
50 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
51 unevaluatedProperties: false
52
53 properties:
54 pins:
55 description:
56 List of gpio pins affected by the properties specified in this
57 subnode.
58 items:
59 oneOf:
60 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-5])$"
61 - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk ]
62 minItems: 1
63 maxItems: 36
64
65 function:
66 description:
67 Specify the alternative function to be configured for the specified
68 pins.
69 enum: [ aoss_cti, atest_char, atest_char0, atest_char1, atest_char2,
70 atest_char3, atest_usb0, atest_usb00, atest_usb01, atest_usb02,
71 atest_usb03, audio_ref, cam_mclk, cci_async, cci_i2c,
72 cci_timer0, cci_timer1, cci_timer2, cci_timer3, cci_timer4,
73 cri_trng, cri_trng0, cri_trng1, dbg_out, ddr_bist, ddr_pxi0,
74 ddr_pxi1, ddr_pxi2, ddr_pxi3, dp0_hot, ext_mclk0, ext_mclk1,
75 gcc_gp1, gcc_gp2, gcc_gp3, gpio, host2wlan_sol, i2s0_data0,
76 i2s0_data1, i2s0_sck, i2s0_ws, ibi_i3c, jitter_bist, mdp_vsync,
77 mdp_vsync0, mdp_vsync1, mdp_vsync2, mdp_vsync3, pcie0_clkreqn,
78 pcie1_clkreqn, phase_flag0, phase_flag1, phase_flag10,
79 phase_flag11, phase_flag12, phase_flag13, phase_flag14,
80 phase_flag15, phase_flag16, phase_flag17, phase_flag18,
81 phase_flag19, phase_flag2, phase_flag20, phase_flag21,
82 phase_flag22, phase_flag23, phase_flag24, phase_flag25,
83 phase_flag26, phase_flag27, phase_flag28, phase_flag29,
84 phase_flag3, phase_flag30, phase_flag31, phase_flag4,
85 phase_flag5, phase_flag6, phase_flag7, phase_flag8,
86 phase_flag9, pll_bist, pll_clk, prng_rosc0, prng_rosc1,
87 prng_rosc2, prng_rosc3, qdss_cti, qdss_gpio, qdss_gpio0,
88 qdss_gpio1, qdss_gpio10, qdss_gpio11, qdss_gpio12, qdss_gpio13,
89 qdss_gpio14, qdss_gpio15, qdss_gpio2, qdss_gpio3, qdss_gpio4,
90 qdss_gpio5, qdss_gpio6, qdss_gpio7, qdss_gpio8, qdss_gpio9,
91 qspi0, qspi1, qspi2, qspi3, qspi_clk, qspi_cs0, qspi_cs1, qup0,
92 qup1, qup2, qup3, qup4, qup5, qup6, qup7, qup8, qup9, qup10,
93 qup11, tb_trig, tgu_ch0, tgu_ch1, tgu_ch2, tgu_ch3,
94 tmess_prng0, tmess_prng1, tmess_prng2, tmess_prng3,
95 tsense_pwm1, tsense_pwm2, usb0_phy, vsense_trigger ]
96
97 required:
98 - pins
99
100required:
101 - compatible
102 - reg
103
104unevaluatedProperties: false
105
106examples:
107 - |
108 #include <dt-bindings/interrupt-controller/arm-gic.h>
109 pinctrl@f100000 {
110 compatible = "qcom,sar2130p-tlmm";
111 reg = <0x0f100000 0x300000>;
112 gpio-controller;
113 #gpio-cells = <2>;
114 gpio-ranges = <&tlmm 0 0 156>;
115 interrupt-controller;
116 #interrupt-cells = <2>;
117 interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
118
119 gpio-wo-state {
120 pins = "gpio1";
121 function = "gpio";
122 };
123
124 uart-w-state {
125 rx-pins {
126 pins = "gpio26";
127 function = "qup7";
128 bias-pull-up;
129 };
130
131 tx-pins {
132 pins = "gpio27";
133 function = "qup7";
134 bias-disable;
135 };
136 };
137 };
138...
Documentation/devicetree/bindings/pinctrl/qcom,sm8650-lpass-lpi-pinctrl.yaml+5−1
@@ -16,7 +16,11 @@ description: · 15 unmodified lines
16 16
17properties:17properties:
18 compatible:18 compatible:
19 const: qcom,sm8650-lpass-lpi-pinctrl19 oneOf:
20 - const: qcom,sm8650-lpass-lpi-pinctrl
21 - items:
22 - const: qcom,sm8750-lpass-lpi-pinctrl
23 - const: qcom,sm8650-lpass-lpi-pinctrl
20 24
21 reg:25 reg:
22 items:26 items:
Documentation/devicetree/bindings/pinctrl/qcom,sm8750-tlmm.yaml+138−0
@@ -0,0 +1,138 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/qcom,sm8750-tlmm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Technologies, Inc. SM8750 TLMM block
8
9maintainers:
10 - Melody Olvera <quic_molvera@quicinc.com>
11
12description:
13 Top Level Mode Multiplexer pin controller in Qualcomm SM8750 SoC.
14
15allOf:
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
17
18properties:
19 compatible:
20 const: qcom,sm8750-tlmm
21
22 reg:
23 maxItems: 1
24
25 interrupts:
26 maxItems: 1
27
28 gpio-reserved-ranges:
29 minItems: 1
30 maxItems: 108
31
32 gpio-line-names:
33 maxItems: 215
34
35patternProperties:
36 "-state$":
37 oneOf:
38 - $ref: "#/$defs/qcom-sm8750-tlmm-state"
39 - patternProperties:
40 "-pins$":
41 $ref: "#/$defs/qcom-sm8750-tlmm-state"
42 additionalProperties: false
43
44$defs:
45 qcom-sm8750-tlmm-state:
46 type: object
47 description:
48 Pinctrl node's client devices use subnodes for desired pin configuration.
49 Client device subnodes use below standard properties.
50 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
51 unevaluatedProperties: false
52
53 properties:
54 pins:
55 description:
56 List of gpio pins affected by the properties specified in this
57 subnode.
58 items:
59 oneOf:
60 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-9]|21[0-4])$"
61 - enum: [ ufs_reset, sdc2_clk, sdc2_cmd, sdc2_data ]
62 minItems: 1
63 maxItems: 36
64
65 function:
66 description:
67 Specify the alternative function to be configured for the specified
68 pins.
69 enum: [ gpio, aoss_cti, atest_char, atest_usb, audio_ext_mclk0,
70 audio_ext_mclk1, audio_ref_clk, cam_aon_mclk2, cam_aon_mclk4,
71 cam_mclk, cci_async_in, cci_i2c_scl, cci_i2c_sda, cci_timer,
72 cmu_rng, coex_uart1_rx, coex_uart1_tx, coex_uart2_rx,
73 coex_uart2_tx, dbg_out_clk, ddr_bist_complete, ddr_bist_fail,
74 ddr_bist_start, ddr_bist_stop, ddr_pxi0, ddr_pxi1, ddr_pxi2,
75 ddr_pxi3, dp_hot, egpio, gcc_gp1, gcc_gp2, gcc_gp3, gnss_adc0,
76 gnss_adc1, i2chub0_se0, i2chub0_se1, i2chub0_se2, i2chub0_se3,
77 i2chub0_se4, i2chub0_se5, i2chub0_se6, i2chub0_se7, i2chub0_se8,
78 i2chub0_se9, i2s0_data0, i2s0_data1, i2s0_sck, i2s0_ws,
79 i2s1_data0, i2s1_data1, i2s1_sck, i2s1_ws, ibi_i3c, jitter_bist,
80 mdp_esync0_out, mdp_esync1_out, mdp_vsync, mdp_vsync0_out,
81 mdp_vsync1_out, mdp_vsync2_out, mdp_vsync3_out, mdp_vsync5_out,
82 mdp_vsync_e, nav_gpio0, nav_gpio1, nav_gpio2, nav_gpio3,
83 pcie0_clk_req_n, phase_flag, pll_bist_sync, pll_clk_aux,
84 prng_rosc0, prng_rosc1, prng_rosc2, prng_rosc3, qdss_cti,
85 qlink_big_enable, qlink_big_request, qlink_little_enable,
86 qlink_little_request, qlink_wmss, qspi0, qspi1, qspi2, qspi3,
87 qspi_clk, qspi_cs, qup1_se0, qup1_se1, qup1_se2, qup1_se3,
88 qup1_se4, qup1_se5, qup1_se6, qup1_se7, qup2_se0, qup2_se1,
89 qup2_se2, qup2_se3, qup2_se4, qup2_se5, qup2_se6, qup2_se7,
90 sd_write_protect, sdc40, sdc41, sdc42, sdc43, sdc4_clk,
91 sdc4_cmd, tb_trig_sdc2, tb_trig_sdc4, tmess_prng0, tmess_prng1,
92 tmess_prng2, tmess_prng3, tsense_pwm1, tsense_pwm2, tsense_pwm3,
93 tsense_pwm4, uim0_clk, uim0_data, uim0_present, uim0_reset,
94 uim1_clk, uim1_data, uim1_present, uim1_reset, usb1_hs, usb_phy,
95 vfr_0, vfr_1, vsense_trigger_mirnat, wcn_sw, wcn_sw_ctrl ]
96
97 required:
98 - pins
99
100required:
101 - compatible
102 - reg
103
104unevaluatedProperties: false
105
106examples:
107 - |
108 #include <dt-bindings/interrupt-controller/arm-gic.h>
109 tlmm: pinctrl@f100000 {
110 compatible = "qcom,sm8750-tlmm";
111 reg = <0x0f100000 0x300000>;
112 gpio-controller;
113 #gpio-cells = <2>;
114 gpio-ranges = <&tlmm 0 0 216>;
115 interrupt-controller;
116 #interrupt-cells = <2>;
117 interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
118
119 gpio-wo-state {
120 pins = "gpio1";
121 function = "gpio";
122 };
123
124 uart-w-state {
125 rx-pins {
126 pins = "gpio60";
127 function = "qup1_se7";
128 bias-pull-up;
129 };
130
131 tx-pins {
132 pins = "gpio61";
133 function = "qup1_se7";
134 bias-disable;
135 };
136 };
137 };
138...
Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml+4−0
@@ -119,6 +119,10 @@ additionalProperties: · 118 unmodified lines
119 bias-disable: true119 bias-disable: true
120 bias-pull-down: true120 bias-pull-down: true
121 bias-pull-up: true121 bias-pull-up: true
122 input-schmitt-enable: true
123 input-schmitt-disable: true
124 drive-open-drain: true
125 drive-push-pull: true
122 renesas,output-impedance:126 renesas,output-impedance:
123 description:127 description:
124 Output impedance for pins on the RZ/V2H(P) SoC. The value provided by this128 Output impedance for pins on the RZ/V2H(P) SoC. The value provided by this
Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml+15−8
@@ -42,10 +42,13 @@ properties: · 41 unmodified lines
42 - samsung,exynos5433-wakeup-eint42 - samsung,exynos5433-wakeup-eint
43 - samsung,exynos7885-wakeup-eint43 - samsung,exynos7885-wakeup-eint
44 - samsung,exynos850-wakeup-eint44 - samsung,exynos850-wakeup-eint
45 - samsung,exynos8895-wakeup-eint
45 - const: samsung,exynos7-wakeup-eint46 - const: samsung,exynos7-wakeup-eint
46 - items:47 - items:
47 - enum:48 - enum:
48 - google,gs101-wakeup-eint49 - google,gs101-wakeup-eint
50 - samsung,exynos9810-wakeup-eint
51 - samsung,exynos990-wakeup-eint
49 - samsung,exynosautov9-wakeup-eint52 - samsung,exynosautov9-wakeup-eint
50 - const: samsung,exynos850-wakeup-eint53 - const: samsung,exynos850-wakeup-eint
51 - const: samsung,exynos7-wakeup-eint54 - const: samsung,exynos7-wakeup-eint
@@ -91,14 +94,18 @@ allOf: · 39 unmodified lines
91 - if:94 - if:
92 properties:95 properties:
93 compatible:96 compatible:
94 # Match without "contains", to skip newer variants which are still97 oneOf:
95 # compatible with samsung,exynos7-wakeup-eint98 # Match without "contains", to skip newer variants which are still
96 enum:99 # compatible with samsung,exynos7-wakeup-eint
97 - samsung,s5pv210-wakeup-eint100 - enum:
98 - samsung,exynos4210-wakeup-eint101 - samsung,exynos4210-wakeup-eint
99 - samsung,exynos5433-wakeup-eint102 - samsung,exynos7-wakeup-eint
100 - samsung,exynos7-wakeup-eint103 - samsung,s5pv210-wakeup-eint
101 - samsung,exynos7885-wakeup-eint104 - contains:
105 enum:
106 - samsung,exynos5433-wakeup-eint
107 - samsung,exynos7885-wakeup-eint
108 - samsung,exynos8895-wakeup-eint
102 then:109 then:
103 properties:110 properties:
104 interrupts:111 interrupts:
Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml+3−0
@@ -53,6 +53,9 @@ properties: · 52 unmodified lines
53 - samsung,exynos7-pinctrl53 - samsung,exynos7-pinctrl
54 - samsung,exynos7885-pinctrl54 - samsung,exynos7885-pinctrl
55 - samsung,exynos850-pinctrl55 - samsung,exynos850-pinctrl
56 - samsung,exynos8895-pinctrl
57 - samsung,exynos9810-pinctrl
58 - samsung,exynos990-pinctrl
56 - samsung,exynosautov9-pinctrl59 - samsung,exynosautov9-pinctrl
57 - samsung,exynosautov920-pinctrl60 - samsung,exynosautov920-pinctrl
58 - tesla,fsd-pinctrl61 - tesla,fsd-pinctrl
Documentation/devicetree/bindings/pinctrl/semtech,sx1501q.yaml+43−0
@@ -26,6 +26,10 @@ properties: · 25 unmodified lines
26 reg:26 reg:
27 maxItems: 127 maxItems: 1
28 28
29 gpio-line-names:
30 minItems: 5
31 maxItems: 17
32
29 interrupts:33 interrupts:
30 maxItems: 134 maxItems: 1
31 35
@@ -87,6 +91,45 @@ required: · 55 unmodified lines
87 91
88allOf:92allOf:
89 - $ref: pinctrl.yaml#93 - $ref: pinctrl.yaml#
94 - if:
95 properties:
96 compatible:
97 contains:
98 enum:
99 - semtech,sx1501q
100 - semtech,sx1504q
101 - semtech,sx1507q
102 then:
103 properties:
104 gpio-line-names:
105 minItems: 5
106 maxItems: 5
107 - if:
108 properties:
109 compatible:
110 contains:
111 enum:
112 - semtech,sx1502q
113 - semtech,sx1505q
114 - semtech,sx1508q
115 then:
116 properties:
117 gpio-line-names:
118 minItems: 9
119 maxItems: 9
120 - if:
121 properties:
122 compatible:
123 contains:
124 enum:
125 - semtech,sx1503q
126 - semtech,sx1506q
127 - semtech,sx1509q
128 then:
129 properties:
130 gpio-line-names:
131 minItems: 17
132 maxItems: 17
90 - if:133 - if:
91 not:134 not:
92 properties:135 properties:
Documentation/devicetree/bindings/pinctrl/sophgo,cv1800-pinctrl.yaml+1−1
@@ -58,7 +58,7 @@ patternProperties: · 57 unmodified lines
58 pinmux:58 pinmux:
59 description: |59 description: |
60 The list of GPIOs and their mux settings that properties in the60 The list of GPIOs and their mux settings that properties in the
61 node apply to. This should be set using the GPIOMUX or GPIOMUX261 node apply to. This should be set using the PINMUX or PINMUX2
62 macro.62 macro.
63 63
64 bias-pull-up:64 bias-pull-up:
Documentation/devicetree/bindings/pinctrl/spacemit,k1-pinctrl.yaml+124−0
@@ -0,0 +1,124 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/spacemit,k1-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: SpacemiT K1 SoC Pin Controller
8
9maintainers:
10 - Yixun Lan <dlan@gentoo.org>
11
12properties:
13 compatible:
14 const: spacemit,k1-pinctrl
15
16 reg:
17 items:
18 - description: pinctrl io memory base
19
20patternProperties:
21 '-cfg$':
22 type: object
23 additionalProperties: false
24
25 description:
26 A pinctrl node should contain at least one subnode representing the
27 pinctrl groups available on the machine.
28
29 patternProperties:
30 '-pins$':
31 type: object
32 additionalProperties: false
33
34 description:
35 Each subnode will list the pins it needs, and how they should
36 be configured, with regard to muxer configuration, bias pull,
37 drive strength, input schmitt trigger, slew rate, power source.
38
39 allOf:
40 - $ref: pincfg-node.yaml#
41 - $ref: pinmux-node.yaml#
42
43 properties:
44 pinmux:
45 description:
46 The list of GPIOs and their mux settings that properties in the
47 node apply to. This should be set using the K1_PADCONF macro to
48 construct the value.
49
50 bias-disable: true
51
52 bias-pull-down: true
53
54 bias-pull-up:
55 description: |
56 typical value for selecting bias pull up or strong pull up.
57 0: normal bias pull up
58 1: strong bias pull up
59 enum: [ 0, 1 ]
60
61 drive-strength:
62 description: |
63 typical current when output high level.
64 1.8V output: 11, 21, 32, 42 (mA)
65 3.3V output: 7, 10, 13, 16, 19, 23, 26, 29 (mA)
66
67 input-schmitt:
68 description: |
69 typical threshold for schmitt trigger.
70 0: buffer mode
71 1: trigger mode
72 2, 3: trigger mode
73 $ref: /schemas/types.yaml#/definitions/uint32
74 enum: [ 0, 1, 2, 3 ]
75
76 power-source:
77 description: external power supplies at 1.8v or 3.3v.
78 enum: [ 1800, 3300 ]
79
80 slew-rate:
81 description: |
82 slew rate for output buffer.
83 0: disable it
84 1: enable it (via bundled value from drive strength)
85 2: slow speed 0
86 3: slow speed 1
87 4: medium speed
88 5: fast speed
89 enum: [ 0, 1, 2, 3, 4, 5 ]
90
91 required:
92 - pinmux
93
94required:
95 - compatible
96 - reg
97
98additionalProperties: false
99
100examples:
101 - |
102 #define K1_PADCONF(pin, func) (((pin) << 16) | (func))
103
104 soc {
105 #address-cells = <2>;
106 #size-cells = <2>;
107
108 pinctrl@d401e000 {
109 compatible = "spacemit,k1-pinctrl";
110 reg = <0x0 0xd401e000 0x0 0x400>;
111
112 uart0_2_cfg: uart0-2-cfg {
113 uart0-2-pins {
114 pinmux = <K1_PADCONF(68, 2)>,
115 <K1_PADCONF(69, 2)>;
116
117 bias-pull-up = <0>;
118 drive-strength = <32>;
119 };
120 };
121 };
122 };
123
124...
Documentation/devicetree/bindings/pinctrl/thead,th1520-pinctrl.yaml+176−0
@@ -0,0 +1,176 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/thead,th1520-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: T-Head TH1520 SoC pin controller
8
9maintainers:
10 - Emil Renner Berthing <emil.renner.berthing@canonical.com>
11
12description: |
13 Pinmux and pinconf controller in the T-Head TH1520 RISC-V SoC.
14
15 The TH1520 has 3 groups of pads each controlled from different memory ranges.
16 Confusingly the memory ranges are named
17 PADCTRL_AOSYS -> PAD Group 1
18 PADCTRL1_APSYS -> PAD Group 2
19 PADCTRL0_APSYS -> PAD Group 3
20
21 Each pad can be muxed individually to up to 6 different functions. For most
22 pads only a few of those 6 configurations are valid though, and a few pads in
23 group 1 does not support muxing at all.
24
25 Pinconf is fairly regular except for a few pads in group 1 that either can't
26 be configured or has some special functions. The rest have configurable drive
27 strength, input enable, schmitt trigger, slew rate, pull-up and pull-down in
28 addition to a special strong pull up.
29
30 Certain pads in group 1 can be muxed to AUDIO_PA0 - AUDIO_PA30 functions and
31 are then meant to be used by the audio co-processor. Each such pad can then
32 be further muxed to either audio GPIO or one of 4 functions such as UART, I2C
33 and I2S. If the audio pad is muxed to one of the 4 functions then pinconf is
34 also configured in different registers. All of this is done from a different
35 AUDIO_IOCTRL memory range and is left to the audio co-processor for now.
36
37properties:
38 compatible:
39 enum:
40 - thead,th1520-pinctrl
41 reg:
42 maxItems: 1
43
44 clocks:
45 maxItems: 1
46
47 thead,pad-group:
48 description: |
49 Select the pad group that is associated with the pin controller instance.
50
51 Base Address Name Group
52 0xFF_FFF4_A000 PADCTRL_AOSYS 1
53 0xFF_E7F3_C000 PADCTRL1_APSYS 2
54 0xFF_EC00_7000 PADCTRL0_APSYS 3
55
56 $ref: /schemas/types.yaml#/definitions/uint32
57 enum: [1, 2, 3]
58
59required:
60 - compatible
61 - reg
62 - clocks
63
64patternProperties:
65 '-[0-9]+$':
66 type: object
67 additionalProperties: false
68
69 patternProperties:
70 '-pins$':
71 type: object
72 allOf:
73 - $ref: /schemas/pinctrl/pincfg-node.yaml#
74 - $ref: /schemas/pinctrl/pinmux-node.yaml#
75
76 additionalProperties: false
77
78 description:
79 A pinctrl node should contain at least one subnode describing one
80 or more pads and their associated pinmux and pinconf settings.
81
82 properties:
83 pins:
84 description: List of pads that properties in the node apply to.
85
86 function:
87 enum: [ gpio, pwm, uart, ir, i2c, spi, qspi, sdio, audio, i2s,
88 gmac0, gmac1, dpu0, dpu1, isp, hdmi, bootsel, debug,
89 clock, jtag, iso7816, efuse, reset ]
90 description: The mux function to select for the given pins.
91
92 bias-disable: true
93
94 bias-pull-up:
95 oneOf:
96 - type: boolean
97 description: Enable the regular 48kOhm pull-up
98 - enum: [ 2100, 48000 ]
99 description: Enable the strong 2.1kOhm pull-up or regular 48kOhm pull-up
100
101 bias-pull-down:
102 oneOf:
103 - type: boolean
104 - const: 44000
105 description: Enable the regular 44kOhm pull-down
106
107 drive-strength:
108 enum: [ 1, 2, 3, 5, 7, 8, 10, 12, 13, 15, 16, 18, 20, 21, 23, 25 ]
109 description: Drive strength in mA
110
111 input-enable: true
112
113 input-disable: true
114
115 input-schmitt-enable: true
116
117 input-schmitt-disable: true
118
119 slew-rate:
120 maximum: 1
121
122 required:
123 - pins
124
125additionalProperties: false
126
127examples:
128 - |
129 padctrl0_apsys: pinctrl@ec007000 {
130 compatible = "thead,th1520-pinctrl";
131 reg = <0xec007000 0x1000>;
132 clocks = <&apb_clk>;
133 thead,pad-group = <3>;
134
135 uart0_pins: uart0-0 {
136 tx-pins {
137 pins = "UART0_TXD";
138 function = "uart";
139 bias-disable;
140 drive-strength = <3>;
141 input-disable;
142 input-schmitt-disable;
143 slew-rate = <0>;
144 };
145
146 rx-pins {
147 pins = "UART0_RXD";
148 function = "uart";
149 bias-disable;
150 drive-strength = <1>;
151 input-enable;
152 input-schmitt-enable;
153 slew-rate = <0>;
154 };
155 };
156 };
157
158 padctrl1_apsys: pinctrl@e7f3c000 {
159 compatible = "thead,th1520-pinctrl";
160 reg = <0xe7f3c000 0x1000>;
161 clocks = <&apb_clk>;
162 thead,pad-group = <2>;
163
164 i2c5_pins: i2c5-0 {
165 i2c-pins {
166 pins = "QSPI1_CSN0", /* I2C5_SCL */
167 "QSPI1_D0_MOSI"; /* I2C5_SDA */
168 function = "i2c";
169 bias-pull-up = <2100>;
170 drive-strength = <7>;
171 input-enable;
172 input-schmitt-enable;
173 slew-rate = <0>;
174 };
175 };
176 };
Documentation/devicetree/bindings/pinctrl/xlnx,versal-pinctrl.yaml+278−0
@@ -0,0 +1,278 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/xlnx,versal-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Xilinx Versal Pinctrl
8
9maintainers:
10 - Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
11
12description: |
13 Please refer to pinctrl-bindings.txt in this directory for details of the
14 common pinctrl bindings used by client devices, including the meaning of the
15 phrase "pin configuration node".
16
17 Versal's pin configuration nodes act as a container for an arbitrary number of
18 subnodes. Each of these subnodes represents some desired configuration for a
19 pin, a group, or a list of pins or groups. This configuration can include the
20 mux function to select on those pin(s)/group(s), and various pin configuration
21 parameters, such as pull-up, slew rate, etc.
22
23 Each configuration node can consist of multiple nodes describing the pinmux and
24 pinconf options. Those nodes can be pinmux nodes or pinconf nodes.
25
26properties:
27 compatible:
28 const: xlnx,versal-pinctrl
29
30patternProperties:
31 '^(.*-)?(default|gpio-grp)$':
32 type: object
33 patternProperties:
34 '^mux':
35 type: object
36 description:
37 Pinctrl node's client devices use subnodes for pin muxes,
38 which in turn use below standard properties.
39 $ref: pinmux-node.yaml#
40
41 properties:
42 pins:
43 description:
44 List of pins to select (either this or "groups" must be specified)
45 $ref: "#/$defs/pins/properties/pins"
46
47 groups:
48 description:
49 List of groups to select (either this or "pins" must be
50 specified), available groups for this subnode.
51 anyOf:
52 - pattern: '^((LPD|PMC)_)MIO([0-9]|[1-6][0-9]|7[0-7])$'
53 - $ref: "#/$defs/pins/properties/groups"
54
55 function:
56 description:
57 Specify the alternative function to be configured for the
58 given pin groups.
59 enum: [spi0, spi0_ss, spi1, spi1_ss, can0, can1, i2c0, i2c1, i2c_pmc, ttc0_clk,
60 ttc0_wav, ttc1_clk, ttc1_wav, ttc2_clk, ttc2_wav, ttc3_clk, ttc3_wav, wwdt0,
61 wwdt1, sysmon_i2c0, sysmon_i2c0_alrt, uart0, uart0_ctrl, uart1, uart1_ctrl,
62 gpio0, gpio1, gpio2, emio0, gem0, gem1, trace0, trace0_clk, mdio0, mdio1, gem_tsu0,
63 pcie0, smap0, usb0, sd0, sd0_pc, sd0_cd, sd0_wp, sd1, sd1_pc, sd1_wp, sd1_cd,
64 ospi0, ospi0_ss, qspi0, qspi0_fbclk, qspi0_ss, test_clk, test_scan, tamper_trigger]
65
66 required:
67 - function
68
69 oneOf:
70 - required: [ groups ]
71 - required: [ pins ]
72
73 additionalProperties: false
74
75 '^conf':
76 type: object
77 description:
78 Pinctrl node's client devices use subnodes for pin configurations,
79 which in turn use the standard properties below.
80 allOf:
81 - $ref: pincfg-node.yaml#
82 - $ref: "#/$defs/pins"
83
84 additionalProperties: false
85
86allOf:
87 - $ref: pinctrl.yaml#
88
89required:
90 - compatible
91
92additionalProperties: false
93
94$defs:
95 pins:
96 properties:
97 groups:
98 description:
99 List of pin groups to select in this subnode.
100 items:
101 enum: [spi0_0_grp, spi0_1_grp, spi0_2_grp, spi0_3_grp, spi0_4_grp, spi0_5_grp,
102 spi0_ss_0_grp, spi0_ss_1_grp, spi0_ss_2_grp, spi0_ss_3_grp, spi0_ss_4_grp,
103 spi0_ss_5_grp, spi0_ss_6_grp, spi0_ss_7_grp, spi0_ss_8_grp, spi0_ss_9_grp,
104 spi0_ss_10_grp, spi0_ss_11_grp, spi0_ss_12_grp, spi0_ss_13_grp, spi0_ss_14_grp,
105 spi0_ss_15_grp, spi0_ss_16_grp, spi0_ss_17_grp, spi1_0_grp, spi1_1_grp,
106 spi1_2_grp, spi1_3_grp, spi1_4_grp, spi1_5_grp, spi1_ss_0_grp, spi1_ss_1_grp,
107 spi1_ss_2_grp, spi1_ss_3_grp, spi1_ss_4_grp, spi1_ss_5_grp, spi1_ss_6_grp,
108 spi1_ss_7_grp, spi1_ss_8_grp, spi1_ss_9_grp, spi1_ss_10_grp, spi1_ss_11_grp,
109 spi1_ss_12_grp, spi1_ss_13_grp, spi1_ss_14_grp, spi1_ss_15_grp, spi1_ss_16_grp
110 spi1_ss_17_grp, can0_0_grp, can0_1_grp, can0_2_grp, can0_3_grp, can0_4_grp,
111 can0_5_grp, can0_6_grp, can0_7_grp, can0_8_grp, can0_9_grp, can0_10_grp,
112 can0_11_grp, can0_12_grp, can0_13_grp, can0_14_grp, can0_15_grp, can0_16_grp,
113 can0_17_grp, can1_0_grp, can1_1_grp, can1_2_grp, can1_3_grp, can1_4_grp,
114 can1_5_grp, can1_6_grp, can1_7_grp, can1_8_grp, can1_9_grp, can1_10_grp,
115 can1_11_grp, can1_12_grp, can1_13_grp, can1_14_grp, can1_15_grp, can1_16_grp,
116 can1_17_grp, can1_18_grp, i2c0_0_grp, i2c0_1_grp, i2c0_2_grp, i2c0_3_grp,
117 i2c0_4_grp, i2c0_5_grp, i2c0_6_grp, i2c0_7_grp, i2c0_8_grp, i2c0_9_grp,
118 i2c0_10_grp, i2c0_11_grp, i2c0_12_grp, i2c0_13_grp, i2c0_14_grp, i2c0_15_grp,
119 i2c0_16_grp, i2c0_17_grp, i2c1_0_grp, i2c1_1_grp, i2c1_2_grp, i2c1_3_grp,
120 i2c1_4_grp, i2c1_5_grp, i2c1_6_grp, i2c1_7_grp, i2c1_8_grp, i2c1_9_grp,
121 i2c1_10_grp, i2c1_11_grp, i2c1_12_grp, i2c1_13_grp, i2c1_14_grp, i2c1_15_grp,
122 i2c1_16_grp, i2c1_17_grp, i2c1_18_grp, i2c_pmc_0_grp, i2c_pmc_1_grp,
123 i2c_pmc_2_grp, i2c_pmc_3_grp, i2c_pmc_4_grp, i2c_pmc_5_grp, i2c_pmc_6_grp,
124 i2c_pmc_7_grp, i2c_pmc_8_grp, i2c_pmc_9_grp, i2c_pmc_10_grp, i2c_pmc_11_grp,
125 i2c_pmc_12_grp, ttc0_clk_0_grp, ttc0_clk_1_grp, ttc0_clk_2_grp, ttc0_clk_3_grp,
126 ttc0_clk_4_grp, ttc0_clk_5_grp, ttc0_clk_6_grp, ttc0_clk_7_grp, ttc0_clk_8_grp,
127 ttc0_wav_0_grp, ttc0_wav_1_grp, ttc0_wav_2_grp, ttc0_wav_3_grp, ttc0_wav_4_grp,
128 ttc0_wav_5_grp, ttc0_wav_6_grp, ttc0_wav_7_grp, ttc0_wav_8_grp, ttc1_clk_0_grp,
129 ttc1_clk_1_grp, ttc1_clk_2_grp, ttc1_clk_3_grp, ttc1_clk_4_grp, ttc1_clk_5_grp,
130 ttc1_clk_6_grp, ttc1_clk_7_grp, ttc1_clk_8_grp, ttc1_wav_0_grp, ttc1_wav_1_grp,
131 ttc1_wav_2_grp, ttc1_wav_3_grp, ttc1_wav_4_grp, ttc1_wav_5_grp, ttc1_wav_6_grp,
132 ttc1_wav_7_grp, ttc1_wav_8_grp, ttc2_clk_0_grp, ttc2_clk_1_grp, ttc2_clk_2_grp,
133 ttc2_clk_3_grp, ttc2_clk_4_grp, ttc2_clk_5_grp, ttc2_clk_6_grp, ttc2_clk_7_grp,
134 ttc2_clk_8_grp, ttc2_wav_0_grp, ttc2_wav_1_grp, ttc2_wav_2_grp, ttc2_wav_3_grp,
135 ttc2_wav_4_grp, ttc2_wav_5_grp, ttc2_wav_6_grp, ttc2_wav_7_grp, ttc2_wav_8_grp,
136 ttc3_clk_0_grp, ttc3_clk_1_grp, ttc3_clk_2_grp, ttc3_clk_3_grp, ttc3_clk_4_grp,
137 ttc3_clk_5_grp, ttc3_clk_6_grp, ttc3_clk_7_grp, ttc3_clk_8_grp, ttc3_wav_0_grp,
138 ttc3_wav_1_grp, ttc3_wav_2_grp, ttc3_wav_3_grp, ttc3_wav_4_grp, ttc3_wav_5_grp,
139 ttc3_wav_6_grp, ttc3_wav_7_grp, ttc3_wav_8_grp, wwdt0_0_grp, wwdt0_1_grp,
140 wwdt0_2_grp, wwdt0_3_grp, wwdt0_4_grp, wwdt0_5_grp, wwdt1_0_grp, wwdt1_1_grp,
141 wwdt1_2_grp, wwdt1_3_grp, wwdt1_4_grp, wwdt1_5_grp, sysmon_i2c0_0_grp,
142 sysmon_i2c0_1_grp, sysmon_i2c0_2_grp, sysmon_i2c0_3_grp, sysmon_i2c0_4_grp,
143 sysmon_i2c0_5_grp, sysmon_i2c0_6_grp, sysmon_i2c0_7_grp, sysmon_i2c0_8_grp,
144 sysmon_i2c0_9_grp, sysmon_i2c0_10_grp, sysmon_i2c0_11_grp, sysmon_i2c0_12_grp,
145 sysmon_i2c0_13_grp, sysmon_i2c0_14_grp, sysmon_i2c0_15_grp,
146 sysmon_i2c0_16_grp, sysmon_i2c0_17_grp, sysmon_i2c0_alrt_0_grp,
147 sysmon_i2c0_alrt_1_grp, sysmon_i2c0_alrt_2_grp, sysmon_i2c0_alrt_3_grp,
148 sysmon_i2c0_alrt_4_grp, sysmon_i2c0_alrt_5_grp, sysmon_i2c0_alrt_6_grp,
149 sysmon_i2c0_alrt_7_grp, sysmon_i2c0_alrt_8_grp, sysmon_i2c0_alrt_9_grp,
150 sysmon_i2c0_alrt_10_grp, sysmon_i2c0_alrt_11_grp, sysmon_i2c0_alrt_12_grp,
151 sysmon_i2c0_alrt_13_grp, sysmon_i2c0_alrt_14_grp, sysmon_i2c0_alrt_15_grp,
152 sysmon_i2c0_alrt_16_grp, sysmon_i2c0_alrt_17_grp, uart0_0_grp, uart0_1_grp,
153 uart0_2_grp, uart0_3_grp, uart0_4_grp, uart0_5_grp, uart0_6_grp, uart0_7_grp,
154 uart0_8_grp, uart0_ctrl_0_grp, uart0_ctrl_1_grp, uart0_ctrl_2_grp,
155 uart0_ctrl_3_grp, uart0_ctrl_4_grp, uart0_ctrl_5_grp, uart0_ctrl_6_grp,
156 uart0_ctrl_7_grp, uart0_ctrl_8_grp, uart1_0_grp, uart1_1_grp, uart1_2_grp,
157 uart1_3_grp, uart1_4_grp, uart1_5_grp, uart1_6_grp, uart1_7_grp, uart1_8_grp,
158 uart1_ctrl_0_grp, uart1_ctrl_1_grp, uart1_ctrl_2_grp, uart1_ctrl_3_grp,
159 uart1_ctrl_4_grp, uart1_ctrl_5_grp, uart1_ctrl_6_grp, uart1_ctrl_7_grp,
160 uart1_ctrl_8_grp, gpio0_0_grp, gpio0_1_grp, gpio0_2_grp, gpio0_3_grp,
161 gpio0_4_grp, gpio0_5_grp, gpio0_6_grp, gpio0_7_grp, gpio0_8_grp, gpio0_9_grp,
162 gpio0_10_grp, gpio0_11_grp, gpio0_12_grp, gpio0_13_grp, gpio0_14_grp,
163 gpio0_15_grp, gpio0_16_grp, gpio0_17_grp, gpio0_18_grp, gpio0_19_grp,
164 gpio0_20_grp, gpio0_21_grp, gpio0_22_grp, gpio0_23_grp, gpio0_24_grp,
165 gpio0_25_grp, gpio1_0_grp, gpio1_1_grp, gpio1_2_grp, gpio1_3_grp, gpio1_4_grp,
166 gpio1_5_grp, gpio1_6_grp, gpio1_7_grp, gpio1_8_grp, gpio1_9_grp,
167 gpio1_10_grp, gpio1_11_grp, gpio1_12_grp, gpio1_13_grp, gpio1_14_grp,
168 gpio1_15_grp, gpio1_16_grp, gpio1_17_grp, gpio1_18_grp, gpio1_19_grp,
169 gpio1_20_grp, gpio1_21_grp, gpio1_22_grp, gpio1_23_grp, gpio1_24_grp,
170 gpio1_25_grp, gpio2_0_grp, gpio2_1_grp, gpio2_2_grp, gpio2_3_grp, gpio2_4_grp,
171 gpio2_5_grp, gpio2_6_grp, gpio2_7_grp, gpio2_8_grp, gpio2_9_grp, gpio2_10_grp,
172 gpio2_11_grp, gpio2_12_grp, gpio2_13_grp, gpio2_14_grp, gpio2_15_grp,
173 gpio2_16_grp, gpio2_17_grp, gpio2_18_grp, gpio2_19_grp, gpio2_20_grp,
174 gpio2_21_grp, gpio2_22_grp, gpio2_23_grp, gpio2_24_grp, gpio2_25_grp,
175 emio0_0_grp, emio0_1_grp, emio0_2_grp, emio0_3_grp, emio0_4_grp, emio0_5_grp,
176 emio0_6_grp, emio0_7_grp, emio0_8_grp, emio0_9_grp, emio0_10_grp,
177 emio0_11_grp, emio0_12_grp, emio0_13_grp, emio0_14_grp, emio0_15_grp,
178 emio0_16_grp, emio0_17_grp, emio0_18_grp, emio0_19_grp, emio0_20_grp,
179 emio0_21_grp, emio0_22_grp, emio0_23_grp, emio0_24_grp, emio0_25_grp,
180 emio0_26_grp, emio0_27_grp, emio0_28_grp, emio0_29_grp, emio0_30_grp,
181 emio0_31_grp, emio0_32_grp, emio0_33_grp, emio0_34_grp, emio0_35_grp,
182 emio0_36_grp, emio0_37_grp, emio0_38_grp, emio0_39_grp, emio0_40_grp,
183 emio0_41_grp, emio0_42_grp, emio0_43_grp, emio0_44_grp, emio0_45_grp,
184 emio0_46_grp, emio0_47_grp, emio0_48_grp, emio0_49_grp, emio0_50_grp,
185 emio0_51_grp, emio0_52_grp, emio0_53_grp, emio0_54_grp, emio0_55_grp,
186 emio0_56_grp, emio0_57_grp, emio0_58_grp, emio0_59_grp, emio0_60_grp,
187 emio0_61_grp, emio0_62_grp, emio0_63_grp, emio0_64_grp, emio0_65_grp,
188 emio0_66_grp, emio0_67_grp, emio0_68_grp, emio0_69_grp, emio0_70_grp,
189 emio0_71_grp, emio0_72_grp, emio0_73_grp, emio0_74_grp, emio0_75_grp,
190 emio0_76_grp, emio0_77_grp, gem0_0_grp, gem0_1_grp, gem1_0_grp, gem1_1_grp,
191 trace0_0_grp, trace0_1_grp, trace0_2_grp, trace0_clk_0_grp, trace0_clk_1_grp,
192 trace0_clk_2_grp, mdio0_0_grp, mdio0_1_grp, mdio1_0_grp, mdio1_1_grp,
193 gem_tsu0_0_grp, gem_tsu0_1_grp, gem_tsu0_2_grp, gem_tsu0_3_grp, pcie0_0_grp,
194 pcie0_1_grp, pcie0_2_grp, smap0_0_grp, usb0_0_grp, sd0_0_grp, sd0_1_grp,
195 sd0_2_grp, sd0_3_grp, sd0_4_grp, sd0_5_grp, sd0_6_grp, sd0_7_grp, sd0_8_grp,
196 sd0_9_grp, sd0_10_grp, sd0_11_grp, sd0_12_grp, sd0_13_grp, sd0_14_grp,
197 sd0_15_grp, sd0_16_grp, sd0_17_grp, sd0_18_grp, sd0_19_grp, sd0_20_grp,
198 sd0_21_grp, sd0_pc_0_grp, sd0_pc_1_grp, sd0_cd_0_grp, sd0_cd_1_grp,
199 sd0_wp_0_grp, sd0_wp_1_grp, sd1_0_grp, sd1_1_grp, sd1_2_grp, sd1_3_grp,
200 sd1_4_grp, sd1_5_grp, sd1_6_grp, sd1_7_grp, sd1_8_grp, sd1_9_grp, sd1_10_grp,
201 sd1_11_grp, sd1_12_grp, sd1_13_grp, sd1_14_grp, sd1_15_grp, sd1_16_grp,
202 sd1_17_grp, sd1_18_grp, sd1_19_grp, sd1_20_grp, sd1_21_grp, sd1_pc_0_grp,
203 sd1_pc_1_grp, sd1_cd_0_grp, sd1_cd_1_grp, sd1_wp_0_grp, sd1_wp_1_grp,
204 ospi0_0_grp, ospi0_ss_0_grp, qspi0_0_grp, qspi0_fbclk_0_grp, qspi0_ss_0_grp,
205 test_clk_0_grp, test_scan_0_grp, tamper_trigger_0_grp]
206 minItems: 1
207 maxItems: 78
208
209 pins:
210 description:
211 List of pin names to select in this subnode.
212 items:
213 pattern: '^((LPD|PMC)_)MIO([0-9]|[1-6][0-9]|7[0-7])$'
214 minItems: 1
215 maxItems: 78
216
217 bias-pull-up: true
218 bias-pull-down: true
219 bias-disable: true
220 input-schmitt-enable: true
221 input-schmitt-disable: true
222 bias-high-impedance: true
223 low-power-enable: true
224 low-power-disable: true
225
226 slew-rate:
227 enum: [0, 1]
228
229 output-enable:
230 description:
231 This will internally disable the tri-state for MIO pins.
232
233 drive-strength:
234 description:
235 Selects the drive strength for MIO pins, in mA.
236 enum: [2, 4, 8, 12]
237
238 power-source:
239 enum: [0, 1]
240
241 oneOf:
242 - required: [ groups ]
243 - required: [ pins ]
244
245 additionalProperties: false
246
247examples:
248 - |
249 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
250 pinctrl {
251 compatible = "xlnx,versal-pinctrl";
252
253 uart0-default {
254 mux {
255 groups = "uart0_4_grp", "uart0_5_grp";
256 function = "uart0";
257 };
258
259 conf {
260 groups = "uart0_4_grp";
261 slew-rate = <SLEW_RATE_SLOW>;
262 power-source = <IO_STANDARD_LVCMOS18>;
263 };
264
265 conf-rx {
266 pins = "PMC_MIO42";
267 bias-pull-up;
268 };
269
270 conf-tx {
271 pins = "PMC_MIO43";
272 bias-disable;
273 input-schmitt-disable;
274 };
275 };
276 };
277
278...
Documentation/devicetree/bindings/power/reset/nvmem-reboot-mode.yaml+4−0
@@ -31,6 +31,10 @@ properties: · 30 unmodified lines
31allOf:31allOf:
32 - $ref: reboot-mode.yaml#32 - $ref: reboot-mode.yaml#
33 33
34patternProperties:
35 "^mode-.*$":
36 maxItems: 1
37
34required:38required:
35 - compatible39 - compatible
36 - nvmem-cells40 - nvmem-cells
Documentation/devicetree/bindings/power/reset/qcom,pon.yaml+7−0
@@ -54,6 +54,10 @@ required: · 53 unmodified lines
54 - compatible54 - compatible
55 - reg55 - reg
56 56
57patternProperties:
58 "^mode-.*$":
59 maxItems: 1
60
57unevaluatedProperties: false61unevaluatedProperties: false
58 62
59allOf:63allOf:
@@ -75,6 +79,9 @@ allOf: · 15 unmodified lines
75 reg-names:79 reg-names:
76 items:80 items:
77 - const: pon81 - const: pon
82 else:
83 patternProperties:
84 "^mode-.*$": false
78 85
79 # Special case for pm8941, which doesn't store reset mode86 # Special case for pm8941, which doesn't store reset mode
80 - if:87 - if:
Documentation/devicetree/bindings/power/reset/reboot-mode.yaml+2−2
@@ -28,13 +28,13 @@ description: | · 27 unmodified lines
28 28
29properties:29properties:
30 mode-normal:30 mode-normal:
31 $ref: /schemas/types.yaml#/definitions/uint3231 $ref: /schemas/types.yaml#/definitions/uint32-array
32 description:32 description:
33 Default value to set on a reboot if no command was provided.33 Default value to set on a reboot if no command was provided.
34 34
35patternProperties:35patternProperties:
36 "^mode-.*$":36 "^mode-.*$":
37 $ref: /schemas/types.yaml#/definitions/uint3237 $ref: /schemas/types.yaml#/definitions/uint32-array
38 38
39additionalProperties: true39additionalProperties: true
40 40
Documentation/devicetree/bindings/power/reset/syscon-reboot-mode.yaml+4−0
@@ -32,6 +32,10 @@ properties: · 31 unmodified lines
32allOf:32allOf:
33 - $ref: reboot-mode.yaml#33 - $ref: reboot-mode.yaml#
34 34
35patternProperties:
36 "^mode-.*$":
37 maxItems: 1
38
35unevaluatedProperties: false39unevaluatedProperties: false
36 40
37required:41required:
Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml+10−1
@@ -31,6 +31,10 @@ properties: · 30 unmodified lines
31 $ref: /schemas/types.yaml#/definitions/uint3231 $ref: /schemas/types.yaml#/definitions/uint32
32 description: Offset in the register map for the reboot register (in bytes).32 description: Offset in the register map for the reboot register (in bytes).
33 33
34 reg:
35 maxItems: 1
36 description: Base address and size for the reboot register.
37
34 regmap:38 regmap:
35 $ref: /schemas/types.yaml#/definitions/phandle39 $ref: /schemas/types.yaml#/definitions/phandle
36 deprecated: true40 deprecated: true
@@ -45,9 +49,14 @@ properties: · 8 unmodified lines
45 priority:49 priority:
46 default: 19250 default: 192
47 51
52oneOf:
53 - required:
54 - offset
55 - required:
56 - reg
57
48required:58required:
49 - compatible59 - compatible
50 - offset
51 60
52additionalProperties: false61additionalProperties: false
53 62
Documentation/devicetree/bindings/power/supply/qcom,pmi8998-charger.yaml+0−1
@@ -60,7 +60,6 @@ examples: · 59 unmodified lines
60 pmic {60 pmic {
61 #address-cells = <1>;61 #address-cells = <1>;
62 #size-cells = <0>;62 #size-cells = <0>;
63 #interrupt-cells = <4>;
64 63
65 charger@1000 {64 charger@1000 {
66 compatible = "qcom,pmi8998-charger";65 compatible = "qcom,pmi8998-charger";
Documentation/devicetree/bindings/power/supply/sc27xx-fg.yaml+5−0
@@ -27,6 +27,11 @@ properties: · 26 unmodified lines
27 battery-detect-gpios:27 battery-detect-gpios:
28 maxItems: 128 maxItems: 1
29 29
30 bat-detect-gpio:
31 maxItems: 1
32 deprecated: true
33 description: use battery-detect-gpios instead
34
30 interrupts:35 interrupts:
31 maxItems: 136 maxItems: 1
32 37
Documentation/devicetree/bindings/power/supply/ti,twl6030-charger.yaml+48−0
@@ -0,0 +1,48 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/power/supply/ti,twl6030-charger.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: TWL6030/32 BCI (Battery Charger Interface)
8
9description:
10 The battery charger needs to be configured to do any charging besides of
11 precharging. The GPADC in the PMIC has to be used to get the related
12 voltages.
13
14maintainers:
15 - Andreas Kemnade <andreas@kemnade.info>
16
17allOf:
18 - $ref: power-supply.yaml#
19
20properties:
21 compatible:
22 oneOf:
23 - const: ti,twl6030-charger
24 - items:
25 - const: ti,twl6032-charger
26 - const: ti,twl6030-charger
27
28 interrupts:
29 items:
30 - description: Charger Control Interrupt
31 - description: Charger Fault Interrupt
32
33 io-channels:
34 items:
35 - description: VBUS Voltage Channel
36
37 io-channel-names:
38 items:
39 - const: vusb
40
41 monitored-battery: true
42
43required:
44 - compatible
45 - interrupts
46 - monitored-battery
47
48additionalProperties: false
Documentation/devicetree/bindings/pwm/airoha,en7581-pwm.yaml+34−0
@@ -0,0 +1,34 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pwm/airoha,en7581-pwm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Airoha EN7581 PWM Controller
8
9maintainers:
10 - Lorenzo Bianconi <lorenzo@kernel.org>
11
12allOf:
13 - $ref: pwm.yaml#
14
15properties:
16 compatible:
17 const: airoha,en7581-pwm
18
19 "#pwm-cells":
20 const: 3
21
22required:
23 - compatible
24 - "#pwm-cells"
25
26additionalProperties: false
27
28examples:
29 - |
30 pwm {
31 compatible = "airoha,en7581-pwm";
32
33 #pwm-cells = <3>;
34 };
Documentation/devicetree/bindings/regulator/qcom-labibb-regulator.yaml+6−1
@@ -16,7 +16,12 @@ description: · 15 unmodified lines
16 16
17properties:17properties:
18 compatible:18 compatible:
19 const: qcom,pmi8998-lab-ibb19 oneOf:
20 - const: qcom,pmi8998-lab-ibb
21 - items:
22 - enum:
23 - qcom,pmi8950-lab-ibb
24 - const: qcom,pmi8998-lab-ibb
20 25
21 lab:26 lab:
22 type: object27 type: object
Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml+3−0
@@ -16,6 +16,7 @@ description: · 15 unmodified lines
16properties:16properties:
17 compatible:17 compatible:
18 enum:18 enum:
19 - qcom,sar2130p-adsp-pas
19 - qcom,sm8350-adsp-pas20 - qcom,sm8350-adsp-pas
20 - qcom,sm8350-cdsp-pas21 - qcom,sm8350-cdsp-pas
21 - qcom,sm8350-slpi-pas22 - qcom,sm8350-slpi-pas
@@ -61,6 +62,7 @@ allOf: · 39 unmodified lines
61 properties:62 properties:
62 compatible:63 compatible:
63 enum:64 enum:
65 - qcom,sar2130p-adsp-pas
64 - qcom,sm8350-adsp-pas66 - qcom,sm8350-adsp-pas
65 - qcom,sm8350-cdsp-pas67 - qcom,sm8350-cdsp-pas
66 - qcom,sm8350-slpi-pas68 - qcom,sm8350-slpi-pas
@@ -101,6 +103,7 @@ allOf: · 34 unmodified lines
101 properties:103 properties:
102 compatible:104 compatible:
103 enum:105 enum:
106 - qcom,sar2130p-adsp-pas
104 - qcom,sm8350-adsp-pas107 - qcom,sm8350-adsp-pas
105 - qcom,sm8350-slpi-pas108 - qcom,sm8350-slpi-pas
106 - qcom,sm8450-adsp-pas109 - qcom,sm8450-adsp-pas
Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml+34−14
@@ -15,16 +15,20 @@ description: · 14 unmodified lines
15 15
16properties:16properties:
17 compatible:17 compatible:
18 enum:18 oneOf:
19 - qcom,sdx75-mpss-pas19 - enum:
20 - qcom,sm8550-adsp-pas20 - qcom,sdx75-mpss-pas
21 - qcom,sm8550-cdsp-pas21 - qcom,sm8550-adsp-pas
22 - qcom,sm8550-mpss-pas22 - qcom,sm8550-cdsp-pas
23 - qcom,sm8650-adsp-pas23 - qcom,sm8550-mpss-pas
24 - qcom,sm8650-cdsp-pas24 - qcom,sm8650-adsp-pas
25 - qcom,sm8650-mpss-pas25 - qcom,sm8650-cdsp-pas
26 - qcom,x1e80100-adsp-pas26 - qcom,sm8650-mpss-pas
27 - qcom,x1e80100-cdsp-pas27 - qcom,x1e80100-adsp-pas
28 - qcom,x1e80100-cdsp-pas
29 - items:
30 - const: qcom,sm8750-adsp-pas
31 - const: qcom,sm8550-adsp-pas
28 32
29 reg:33 reg:
30 maxItems: 134 maxItems: 1
@@ -82,6 +86,20 @@ allOf: · 51 unmodified lines
82 maxItems: 586 maxItems: 5
83 memory-region:87 memory-region:
84 maxItems: 288 maxItems: 2
89 - if:
90 properties:
91 compatible:
92 contains:
93 enum:
94 - qcom,sm8750-adsp-pas
95 then:
96 properties:
97 interrupts:
98 maxItems: 6
99 interrupt-names:
100 maxItems: 6
101 memory-region:
102 maxItems: 2
85 - if:103 - if:
86 properties:104 properties:
87 compatible:105 compatible:
@@ -129,10 +147,12 @@ allOf: · 41 unmodified lines
129 - if:147 - if:
130 properties:148 properties:
131 compatible:149 compatible:
132 enum:150 contains:
133 - qcom,sm8550-adsp-pas151 enum:
134 - qcom,sm8650-adsp-pas152 - qcom,sm8550-adsp-pas
135 - qcom,x1e80100-adsp-pas153 - qcom,sm8650-adsp-pas
154 - qcom,sm8750-adsp-pas
155 - qcom,x1e80100-adsp-pas
136 then:156 then:
137 properties:157 properties:
138 power-domains:158 power-domains:
Documentation/devicetree/bindings/riscv/extensions.yaml+58−0
@@ -128,6 +128,18 @@ properties: · 127 unmodified lines
128 changes to interrupts as frozen at commit ccbddab ("Merge pull128 changes to interrupts as frozen at commit ccbddab ("Merge pull
129 request #42 from riscv/jhauser-2023-RC4") of riscv-aia.129 request #42 from riscv/jhauser-2023-RC4") of riscv-aia.
130 130
131 - const: smmpm
132 description: |
133 The standard Smmpm extension for M-mode pointer masking as
134 ratified at commit d70011dde6c2 ("Update to ratified state")
135 of riscv-j-extension.
136
137 - const: smnpm
138 description: |
139 The standard Smnpm extension for next-mode pointer masking as
140 ratified at commit d70011dde6c2 ("Update to ratified state")
141 of riscv-j-extension.
142
131 - const: smstateen143 - const: smstateen
132 description: |144 description: |
133 The standard Smstateen extension for controlling access to CSRs145 The standard Smstateen extension for controlling access to CSRs
@@ -147,12 +159,46 @@ properties: · 13 unmodified lines
147 and mode-based filtering as ratified at commit 01d1df0 ("Add ability159 and mode-based filtering as ratified at commit 01d1df0 ("Add ability
148 to manually trigger workflow. (#2)") of riscv-count-overflow.160 to manually trigger workflow. (#2)") of riscv-count-overflow.
149 161
162 - const: ssnpm
163 description: |
164 The standard Ssnpm extension for next-mode pointer masking as
165 ratified at commit d70011dde6c2 ("Update to ratified state")
166 of riscv-j-extension.
167
150 - const: sstc168 - const: sstc
151 description: |169 description: |
152 The standard Sstc supervisor-level extension for time compare as170 The standard Sstc supervisor-level extension for time compare as
153 ratified at commit 3f9ed34 ("Add ability to manually trigger171 ratified at commit 3f9ed34 ("Add ability to manually trigger
154 workflow. (#2)") of riscv-time-compare.172 workflow. (#2)") of riscv-time-compare.
155 173
174 - const: svade
175 description: |
176 The standard Svade supervisor-level extension for SW-managed PTE A/D
177 bit updates as ratified in the 20240213 version of the privileged
178 ISA specification.
179
180 Both Svade and Svadu extensions control the hardware behavior when
181 the PTE A/D bits need to be set. The default behavior for the four
182 possible combinations of these extensions in the device tree are:
183 1) Neither Svade nor Svadu present in DT => It is technically
184 unknown whether the platform uses Svade or Svadu. Supervisor
185 software should be prepared to handle either hardware updating
186 of the PTE A/D bits or page faults when they need updated.
187 2) Only Svade present in DT => Supervisor must assume Svade to be
188 always enabled.
189 3) Only Svadu present in DT => Supervisor must assume Svadu to be
190 always enabled.
191 4) Both Svade and Svadu present in DT => Supervisor must assume
192 Svadu turned-off at boot time. To use Svadu, supervisor must
193 explicitly enable it using the SBI FWFT extension.
194
195 - const: svadu
196 description: |
197 The standard Svadu supervisor-level extension for hardware updating
198 of PTE A/D bits as ratified in the 20240528 version of the
199 privileged ISA specification. Please refer to Svade dt-binding
200 description for more details.
201
156 - const: svinval202 - const: svinval
157 description:203 description:
158 The standard Svinval supervisor-level extension for fine-grained204 The standard Svinval supervisor-level extension for fine-grained
@@ -178,6 +224,12 @@ properties: · 19 unmodified lines
178 as ratified at commit 4a69197e5617 ("Update to ratified state") of224 as ratified at commit 4a69197e5617 ("Update to ratified state") of
179 riscv-svvptc.225 riscv-svvptc.
180 226
227 - const: zabha
228 description: |
229 The Zabha extension for Byte and Halfword Atomic Memory Operations
230 as ratified at commit 49f49c842ff9 ("Update to Rafified state") of
231 riscv-zabha.
232
181 - const: zacas233 - const: zacas
182 description: |234 description: |
183 The Zacas extension for Atomic Compare-and-Swap (CAS) instructions235 The Zacas extension for Atomic Compare-and-Swap (CAS) instructions
@@ -290,6 +342,12 @@ properties: · 106 unmodified lines
290 in commit 64074bc ("Update version numbers for Zfh/Zfinx") of342 in commit 64074bc ("Update version numbers for Zfh/Zfinx") of
291 riscv-isa-manual.343 riscv-isa-manual.
292 344
345 - const: ziccrse
346 description:
347 The standard Ziccrse extension which provides forward progress
348 guarantee on LR/SC sequences, as ratified in commit b1d806605f87
349 ("Updated to ratified state.") of the riscv profiles specification.
350
293 - const: zk351 - const: zk
294 description:352 description:
295 The standard Zk Standard Scalar cryptography extension as ratified353 The standard Zk Standard Scalar cryptography extension as ratified
Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml+3−1
@@ -30,7 +30,9 @@ properties: · 29 unmodified lines
30 - const: allwinner,sun50i-a64-rtc30 - const: allwinner,sun50i-a64-rtc
31 - const: allwinner,sun8i-h3-rtc31 - const: allwinner,sun8i-h3-rtc
32 - items:32 - items:
33 - const: allwinner,sun20i-d1-rtc33 - enum:
34 - allwinner,sun20i-d1-rtc
35 - allwinner,sun55i-a523-rtc
34 - const: allwinner,sun50i-r329-rtc36 - const: allwinner,sun50i-r329-rtc
35 37
36 reg:38 reg:
Documentation/devicetree/bindings/rtc/amlogic,a4-rtc.yaml+63−0
@@ -0,0 +1,63 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (C) 2024 Amlogic, Inc. All rights reserved
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/rtc/amlogic,a4-rtc.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Amlogic A4 and A5 RTC
9
10maintainers:
11 - Yiting Deng <yiting.deng@amlogic.com>
12 - Xianwei Zhao <xianwei.zhao@amlogic.com>
13
14allOf:
15 - $ref: rtc.yaml#
16
17properties:
18 compatible:
19 enum:
20 - amlogic,a4-rtc
21 - amlogic,a5-rtc
22
23 reg:
24 maxItems: 1
25
26 clocks:
27 items:
28 - description: RTC clock source, available 24M or 32K crystal
29 oscillator source. when using 24M, need to divide 24M into 32K.
30 - description: RTC module accesses the clock of the apb bus.
31
32 clock-names:
33 items:
34 - const: osc
35 - const: sys
36
37 interrupts:
38 maxItems: 1
39
40required:
41 - compatible
42 - reg
43 - clocks
44 - clock-names
45 - interrupts
46
47additionalProperties: false
48
49examples:
50 - |
51 #include <dt-bindings/interrupt-controller/arm-gic.h>
52 apb {
53 #address-cells = <2>;
54 #size-cells = <2>;
55
56 rtc@8e600 {
57 compatible = "amlogic,a4-rtc";
58 reg = <0x0 0x8e600 0x0 0x38>;
59 clocks = <&xtal_32k>, <&clkc_periphs 1>;
60 clock-names = "osc", "sys";
61 interrupts = <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>;
62 };
63 };
Documentation/devicetree/bindings/rtc/microchip,mpfs-rtc.yamlrenamed from Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml+6−4
@@ -1,7 +1,7 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.22%YAML 1.2
3---3---
4$id: http://devicetree.org/schemas/rtc/microchip,mfps-rtc.yaml#4$id: http://devicetree.org/schemas/rtc/microchip,mpfs-rtc.yaml#
5 5
6$schema: http://devicetree.org/meta-schemas/core.yaml#6$schema: http://devicetree.org/meta-schemas/core.yaml#
7 7
@@ -12,12 +12,14 @@ allOf: · 4 unmodified lines
12 12
13maintainers:13maintainers:
14 - Daire McNamara <daire.mcnamara@microchip.com>14 - Daire McNamara <daire.mcnamara@microchip.com>
15 - Lewis Hanly <lewis.hanly@microchip.com>
16 15
17properties:16properties:
18 compatible:17 compatible:
19 enum:18 oneOf:
20 - microchip,mpfs-rtc19 - items:
20 - const: microchip,pic64gx-rtc
21 - const: microchip,mpfs-rtc
22 - const: microchip,mpfs-rtc
21 23
22 reg:24 reg:
23 maxItems: 125 maxItems: 1
Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml+84−0
@@ -0,0 +1,84 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/rtc/renesas,rz-rtca3.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas RTCA-3 Real Time Clock
8
9maintainers:
10 - Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
11
12allOf:
13 - $ref: rtc.yaml#
14
15properties:
16 compatible:
17 items:
18 - enum:
19 - renesas,r9a08g045-rtca3 # RZ/G3S
20 - const: renesas,rz-rtca3
21
22 reg:
23 maxItems: 1
24
25 interrupts:
26 items:
27 - description: Alarm interrupt
28 - description: Periodic interrupt
29 - description: Carry interrupt
30
31 interrupt-names:
32 items:
33 - const: alarm
34 - const: period
35 - const: carry
36
37 clocks:
38 items:
39 - description: RTC bus clock
40 - description: RTC counter clock
41
42 clock-names:
43 items:
44 - const: bus
45 - const: counter
46
47 power-domains:
48 maxItems: 1
49
50 resets:
51 items:
52 - description: VBATTB module reset
53
54required:
55 - compatible
56 - reg
57 - interrupts
58 - interrupt-names
59 - clocks
60 - clock-names
61 - power-domains
62 - resets
63
64additionalProperties: false
65
66examples:
67 - |
68 #include <dt-bindings/clock/r9a08g045-cpg.h>
69 #include <dt-bindings/clock/renesas,r9a08g045-vbattb.h>
70 #include <dt-bindings/interrupt-controller/arm-gic.h>
71 #include <dt-bindings/interrupt-controller/irq.h>
72
73 rtc@1004ec00 {
74 compatible = "renesas,r9a08g045-rtca3", "renesas,rz-rtca3";
75 reg = <0x1004ec00 0x400>;
76 interrupts = <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
77 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
78 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>;
79 interrupt-names = "alarm", "period", "carry";
80 clocks = <&cpg CPG_MOD R9A08G045_VBAT_BCLK>, <&vbattclk VBATTB_VBATTCLK>;
81 clock-names = "bus", "counter";
82 power-domains = <&cpg>;
83 resets = <&cpg R9A08G045_VBAT_BRESETN>;
84 };
Documentation/devicetree/bindings/serial/rs485.yaml+9−10
@@ -18,16 +18,15 @@ properties: · 17 unmodified lines
18 description: prop-encoded-array <a b>18 description: prop-encoded-array <a b>
19 $ref: /schemas/types.yaml#/definitions/uint32-array19 $ref: /schemas/types.yaml#/definitions/uint32-array
20 items:20 items:
21 items:21 - description: Delay between rts signal and beginning of data sent in
22 - description: Delay between rts signal and beginning of data sent in22 milliseconds. It corresponds to the delay before sending data.
23 milliseconds. It corresponds to the delay before sending data.23 default: 0
24 default: 024 maximum: 100
25 maximum: 10025 - description: Delay between end of data sent and rts signal in milliseconds.
26 - description: Delay between end of data sent and rts signal in milliseconds.26 It corresponds to the delay after sending data and actual release
27 It corresponds to the delay after sending data and actual release27 of the line.
28 of the line.28 default: 0
29 default: 029 maximum: 100
30 maximum: 100
31 30
32 rs485-rts-active-high:31 rs485-rts-active-high:
33 description: drive RTS high when sending (this is the default).32 description: drive RTS high when sending (this is the default).
Documentation/devicetree/bindings/serial/samsung_uart.yaml+12−2
@@ -27,6 +27,7 @@ properties: · 26 unmodified lines
27 - samsung,exynos4210-uart27 - samsung,exynos4210-uart
28 - samsung,exynos5433-uart28 - samsung,exynos5433-uart
29 - samsung,exynos850-uart29 - samsung,exynos850-uart
30 - samsung,exynos8895-uart
30 - items:31 - items:
31 - enum:32 - enum:
32 - samsung,exynos7-uart33 - samsung,exynos7-uart
@@ -160,18 +161,27 @@ allOf: · 127 unmodified lines
160 contains:161 contains:
161 enum:162 enum:
162 - google,gs101-uart163 - google,gs101-uart
164 - samsung,exynos8895-uart
163 then:165 then:
164 required:166 required:
165 - samsung,uart-fifosize167 - samsung,uart-fifosize
166 properties:168 properties:
167 reg-io-width: false
168
169 clocks:169 clocks:
170 maxItems: 2170 maxItems: 2
171 171
172 clock-names:172 clock-names:
173 maxItems: 2173 maxItems: 2
174 174
175 - if:
176 properties:
177 compatible:
178 contains:
179 enum:
180 - google,gs101-uart
181 then:
182 properties:
183 reg-io-width: false
184
175unevaluatedProperties: false185unevaluatedProperties: false
176 186
177examples:187examples:
Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml+5−8
@@ -37,6 +37,8 @@ properties: · 36 unmodified lines
37 - const: renesas,rzn1-uart37 - const: renesas,rzn1-uart
38 - items:38 - items:
39 - enum:39 - enum:
40 - brcm,bcm11351-dw-apb-uart
41 - brcm,bcm21664-dw-apb-uart
40 - rockchip,px30-uart42 - rockchip,px30-uart
41 - rockchip,rk1808-uart43 - rockchip,rk1808-uart
42 - rockchip,rk3036-uart44 - rockchip,rk3036-uart
@@ -48,18 +50,13 @@ properties: · 5 unmodified lines
48 - rockchip,rk3328-uart50 - rockchip,rk3328-uart
49 - rockchip,rk3368-uart51 - rockchip,rk3368-uart
50 - rockchip,rk3399-uart52 - rockchip,rk3399-uart
53 - rockchip,rk3528-uart
51 - rockchip,rk3568-uart54 - rockchip,rk3568-uart
55 - rockchip,rk3576-uart
52 - rockchip,rk3588-uart56 - rockchip,rk3588-uart
53 - rockchip,rv1108-uart57 - rockchip,rv1108-uart
54 - rockchip,rv1126-uart58 - rockchip,rv1126-uart
55 - const: snps,dw-apb-uart59 - sophgo,sg2044-uart
56 - items:
57 - enum:
58 - brcm,bcm11351-dw-apb-uart
59 - brcm,bcm21664-dw-apb-uart
60 - const: snps,dw-apb-uart
61 - items:
62 - enum:
63 - starfive,jh7100-hsuart60 - starfive,jh7100-hsuart
64 - starfive,jh7100-uart61 - starfive,jh7100-uart
65 - starfive,jh7110-uart62 - starfive,jh7110-uart
Documentation/devicetree/bindings/serial/sprd-uart.yaml+1−0
@@ -17,6 +17,7 @@ properties: · 16 unmodified lines
17 oneOf:17 oneOf:
18 - items:18 - items:
19 - enum:19 - enum:
20 - sprd,sc9632-uart
20 - sprd,sc9860-uart21 - sprd,sc9860-uart
21 - sprd,sc9863a-uart22 - sprd,sc9863a-uart
22 - sprd,ums512-uart23 - sprd,ums512-uart
Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml+1−0
@@ -25,6 +25,7 @@ properties: · 24 unmodified lines
25 - items:25 - items:
26 - enum:26 - enum:
27 - mediatek,mt8186-spmi27 - mediatek,mt8186-spmi
28 - mediatek,mt8188-spmi
28 - const: mediatek,mt8195-spmi29 - const: mediatek,mt8195-spmi
29 30
30 reg:31 reg:
Documentation/devicetree/bindings/spmi/qcom,x1e80100-spmi-pmic-arb.yaml+5−1
@@ -19,7 +19,11 @@ description: | · 18 unmodified lines
19 19
20properties:20properties:
21 compatible:21 compatible:
22 const: qcom,x1e80100-spmi-pmic-arb22 oneOf:
23 - items:
24 - const: qcom,sar2130p-spmi-pmic-arb
25 - const: qcom,x1e80100-spmi-pmic-arb
26 - const: qcom,x1e80100-spmi-pmic-arb
23 27
24 reg:28 reg:
25 items:29 items:
Documentation/devicetree/bindings/ufs/qcom,ufs.yaml+2−0
@@ -26,6 +26,7 @@ properties: · 25 unmodified lines
26 - qcom,msm8994-ufshc26 - qcom,msm8994-ufshc
27 - qcom,msm8996-ufshc27 - qcom,msm8996-ufshc
28 - qcom,msm8998-ufshc28 - qcom,msm8998-ufshc
29 - qcom,qcs8300-ufshc
29 - qcom,sa8775p-ufshc30 - qcom,sa8775p-ufshc
30 - qcom,sc7180-ufshc31 - qcom,sc7180-ufshc
31 - qcom,sc7280-ufshc32 - qcom,sc7280-ufshc
@@ -146,6 +147,7 @@ allOf: · 114 unmodified lines
146 contains:147 contains:
147 enum:148 enum:
148 - qcom,msm8998-ufshc149 - qcom,msm8998-ufshc
150 - qcom,qcs8300-ufshc
149 - qcom,sa8775p-ufshc151 - qcom,sa8775p-ufshc
150 - qcom,sc7280-ufshc152 - qcom,sc7280-ufshc
151 - qcom,sc8180x-ufshc153 - qcom,sc8180x-ufshc
Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml+1−0
@@ -25,6 +25,7 @@ properties: · 24 unmodified lines
25 - allwinner,sun20i-d1-musb25 - allwinner,sun20i-d1-musb
26 - allwinner,sun50i-a100-musb26 - allwinner,sun50i-a100-musb
27 - allwinner,sun50i-h6-musb27 - allwinner,sun50i-h6-musb
28 - allwinner,sun55i-a523-musb
28 - const: allwinner,sun8i-a33-musb29 - const: allwinner,sun8i-a33-musb
29 - items:30 - items:
30 - const: allwinner,sun50i-h616-musb31 - const: allwinner,sun50i-h616-musb
Documentation/devicetree/bindings/usb/cypress,cypd4226.yaml+1−4
@@ -61,18 +61,15 @@ additionalProperties: false · 60 unmodified lines
61 61
62examples:62examples:
63 - |63 - |
64 #include <dt-bindings/gpio/tegra194-gpio.h>
65 #include <dt-bindings/interrupt-controller/arm-gic.h>64 #include <dt-bindings/interrupt-controller/arm-gic.h>
66 i2c {65 i2c {
67 #address-cells = <1>;66 #address-cells = <1>;
68 #size-cells = <0>;67 #size-cells = <0>;
69 #interrupt-cells = <2>;
70 68
71 typec@8 {69 typec@8 {
72 compatible = "cypress,cypd4226";70 compatible = "cypress,cypd4226";
73 reg = <0x08>;71 reg = <0x08>;
74 interrupt-parent = <&gpio_aon>;72 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
75 interrupts = <TEGRA194_AON_GPIO(BB, 2) IRQ_TYPE_LEVEL_LOW>;
76 firmware-name = "nvidia,jetson-agx-xavier";73 firmware-name = "nvidia,jetson-agx-xavier";
77 #address-cells = <1>;74 #address-cells = <1>;
78 #size-cells = <0>;75 #size-cells = <0>;
Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml+5−1
@@ -12,7 +12,11 @@ maintainers: · 11 unmodified lines
12 12
13properties:13properties:
14 compatible:14 compatible:
15 const: fsl,imx8mp-dwc315 oneOf:
16 - items:
17 - const: fsl,imx95-dwc3
18 - const: fsl,imx8mp-dwc3
19 - const: fsl,imx8mp-dwc3
16 20
17 reg:21 reg:
18 items:22 items:
Documentation/devicetree/bindings/usb/generic-ehci.yaml+1−0
@@ -32,6 +32,7 @@ properties: · 31 unmodified lines
32 - allwinner,sun50i-a64-ehci32 - allwinner,sun50i-a64-ehci
33 - allwinner,sun50i-h6-ehci33 - allwinner,sun50i-h6-ehci
34 - allwinner,sun50i-h616-ehci34 - allwinner,sun50i-h616-ehci
35 - allwinner,sun55i-a523-ehci
35 - allwinner,sun5i-a13-ehci36 - allwinner,sun5i-a13-ehci
36 - allwinner,sun6i-a31-ehci37 - allwinner,sun6i-a31-ehci
37 - allwinner,sun7i-a20-ehci38 - allwinner,sun7i-a20-ehci
Documentation/devicetree/bindings/usb/generic-ohci.yaml+1−0
@@ -19,6 +19,7 @@ properties: · 18 unmodified lines
19 - allwinner,sun50i-a64-ohci19 - allwinner,sun50i-a64-ohci
20 - allwinner,sun50i-h6-ohci20 - allwinner,sun50i-h6-ohci
21 - allwinner,sun50i-h616-ohci21 - allwinner,sun50i-h616-ohci
22 - allwinner,sun55i-a523-ohci
22 - allwinner,sun5i-a13-ohci23 - allwinner,sun5i-a13-ohci
23 - allwinner,sun6i-a31-ohci24 - allwinner,sun6i-a31-ohci
24 - allwinner,sun7i-a20-ohci25 - allwinner,sun7i-a20-ohci
Documentation/devicetree/bindings/usb/genesys,gl850g.yaml+8−1
@@ -62,7 +62,14 @@ allOf: · 61 unmodified lines
62 peer-hub: true62 peer-hub: true
63 vdd-supply: true63 vdd-supply: true
64 64
65additionalProperties: false65patternProperties:
66 "^.*@[0-9a-f]{1,2}$":
67 description: The hard wired USB devices
68 type: object
69 $ref: /schemas/usb/usb-device.yaml
70 additionalProperties: true
71
72unevaluatedProperties: false
66 73
67examples:74examples:
68 - |75 - |
Documentation/devicetree/bindings/usb/maxim,max33359.yaml+1−0
@@ -69,6 +69,7 @@ examples: · 68 unmodified lines
69 PDO_FIXED_DATA_SWAP |69 PDO_FIXED_DATA_SWAP |
70 PDO_FIXED_DUAL_ROLE)70 PDO_FIXED_DUAL_ROLE)
71 PDO_FIXED(9000, 2000, 0)>;71 PDO_FIXED(9000, 2000, 0)>;
72 sink-bc12-completion-time-ms = <500>;
72 };73 };
73 };74 };
74 };75 };
Documentation/devicetree/bindings/usb/microchip,mpfs-musb.yaml+5−2
@@ -14,8 +14,11 @@ maintainers: · 13 unmodified lines
14 14
15properties:15properties:
16 compatible:16 compatible:
17 enum:17 oneOf:
18 - microchip,mpfs-musb18 - items:
19 - const: microchip,pic64gx-musb
20 - const: microchip,mpfs-musb
21 - const: microchip,mpfs-musb
19 22
20 dr_mode: true23 dr_mode: true
21 24
Documentation/devicetree/bindings/usb/qcom,dwc3.yaml+6−0
@@ -26,8 +26,10 @@ properties: · 25 unmodified lines
26 - qcom,msm8998-dwc326 - qcom,msm8998-dwc3
27 - qcom,qcm2290-dwc327 - qcom,qcm2290-dwc3
28 - qcom,qcs404-dwc328 - qcom,qcs404-dwc3
29 - qcom,qcs8300-dwc3
29 - qcom,qdu1000-dwc330 - qcom,qdu1000-dwc3
30 - qcom,sa8775p-dwc331 - qcom,sa8775p-dwc3
32 - qcom,sar2130p-dwc3
31 - qcom,sc7180-dwc333 - qcom,sc7180-dwc3
32 - qcom,sc7280-dwc334 - qcom,sc7280-dwc3
33 - qcom,sc8180x-dwc335 - qcom,sc8180x-dwc3
@@ -201,6 +203,7 @@ allOf: · 167 unmodified lines
201 - qcom,msm8953-dwc3203 - qcom,msm8953-dwc3
202 - qcom,msm8996-dwc3204 - qcom,msm8996-dwc3
203 - qcom,msm8998-dwc3205 - qcom,msm8998-dwc3
206 - qcom,qcs8300-dwc3
204 - qcom,sa8775p-dwc3207 - qcom,sa8775p-dwc3
205 - qcom,sc7180-dwc3208 - qcom,sc7180-dwc3
206 - qcom,sc7280-dwc3209 - qcom,sc7280-dwc3
@@ -338,6 +341,7 @@ allOf: · 131 unmodified lines
338 contains:341 contains:
339 enum:342 enum:
340 - qcom,qcm2290-dwc3343 - qcom,qcm2290-dwc3
344 - qcom,sar2130p-dwc3
341 - qcom,sc8180x-dwc3345 - qcom,sc8180x-dwc3
342 - qcom,sc8180x-dwc3-mp346 - qcom,sc8180x-dwc3-mp
343 - qcom,sm6115-dwc3347 - qcom,sm6115-dwc3
@@ -465,6 +469,7 @@ allOf: · 121 unmodified lines
465 - qcom,ipq4019-dwc3469 - qcom,ipq4019-dwc3
466 - qcom,ipq8064-dwc3470 - qcom,ipq8064-dwc3
467 - qcom,msm8994-dwc3471 - qcom,msm8994-dwc3
472 - qcom,qcs8300-dwc3
468 - qcom,qdu1000-dwc3473 - qcom,qdu1000-dwc3
469 - qcom,sa8775p-dwc3474 - qcom,sa8775p-dwc3
470 - qcom,sc7180-dwc3475 - qcom,sc7180-dwc3
@@ -490,6 +495,7 @@ allOf: · 19 unmodified lines
490 minItems: 4495 minItems: 4
491 maxItems: 5496 maxItems: 5
492 interrupt-names:497 interrupt-names:
498 minItems: 4
493 items:499 items:
494 - const: pwr_event500 - const: pwr_event
495 - const: hs_phy_irq501 - const: hs_phy_irq
Documentation/devicetree/bindings/usb/renesas,usbhs.yaml+4−0
@@ -76,6 +76,10 @@ properties: · 75 unmodified lines
76 Integer to use BUSWAIT register.76 Integer to use BUSWAIT register.
77 77
78 renesas,enable-gpio:78 renesas,enable-gpio:
79 deprecated: true
80 maxItems: 1
81
82 renesas,enable-gpios:
79 maxItems: 183 maxItems: 1
80 description: |84 description: |
81 gpio specifier to check GPIO determining if USB function should be85 gpio specifier to check GPIO determining if USB function should be
Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml+5−1
@@ -27,6 +27,7 @@ select: · 26 unmodified lines
27 enum:27 enum:
28 - rockchip,rk3328-dwc328 - rockchip,rk3328-dwc3
29 - rockchip,rk3568-dwc329 - rockchip,rk3568-dwc3
30 - rockchip,rk3576-dwc3
30 - rockchip,rk3588-dwc331 - rockchip,rk3588-dwc3
31 required:32 required:
32 - compatible33 - compatible
@@ -37,6 +38,7 @@ properties: · 4 unmodified lines
37 - enum:38 - enum:
38 - rockchip,rk3328-dwc339 - rockchip,rk3328-dwc3
39 - rockchip,rk3568-dwc340 - rockchip,rk3568-dwc3
41 - rockchip,rk3576-dwc3
40 - rockchip,rk3588-dwc342 - rockchip,rk3588-dwc3
41 - const: snps,dwc343 - const: snps,dwc3
42 44
@@ -113,7 +115,9 @@ allOf: · 70 unmodified lines
113 properties:115 properties:
114 compatible:116 compatible:
115 contains:117 contains:
116 const: rockchip,rk3568-dwc3118 enum:
119 - rockchip,rk3568-dwc3
120 - rockchip,rk3576-dwc3
117 then:121 then:
118 properties:122 properties:
119 clocks:123 clocks:
Documentation/devicetree/bindings/usb/ti,tusb1046.yaml+49−0
@@ -0,0 +1,49 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/usb/ti,tusb1046.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Texas Instruments TUSB1046-DCI Type-C crosspoint switch
8
9maintainers:
10 - Romain Gantois <romain.gantois@bootlin.com>
11
12allOf:
13 - $ref: usb-switch.yaml#
14
15properties:
16 compatible:
17 const: ti,tusb1046
18
19 reg:
20 maxItems: 1
21
22required:
23 - compatible
24 - reg
25 - port
26
27unevaluatedProperties: false
28
29examples:
30 - |
31 i2c {
32 #address-cells = <1>;
33 #size-cells = <0>;
34
35 typec-mux@44 {
36 compatible = "ti,tusb1046";
37 reg = <0x44>;
38
39 mode-switch;
40 orientation-switch;
41
42 port {
43 endpoint {
44 remote-endpoint = <&typec_controller>;
45 };
46 };
47 };
48 };
49...
Documentation/devicetree/bindings/usb/ti,tusb73x0-pci.yaml+55−0
@@ -0,0 +1,55 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/usb/ti,tusb73x0-pci.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: TUSB73x0 USB 3.0 xHCI Host Controller (PCIe)
8
9maintainers:
10 - Francesco Dolcini <francesco.dolcini@toradex.com>
11
12description:
13 TUSB73x0 USB 3.0 xHCI Host Controller via PCIe x1 Gen2 interface.
14 The TUSB7320 supports up to two downstream ports, the TUSB7340 supports up
15 to four downstream ports, both variants share the same PCI device ID.
16
17properties:
18 compatible:
19 const: pci104c,8241
20
21 reg:
22 maxItems: 1
23
24 ti,pwron-active-high:
25 $ref: /schemas/types.yaml#/definitions/flag
26 description:
27 Configure the polarity of the PWRONx# signals. When this is present, the
28 PWRONx# pins are active high and their internal pull-down resistors are
29 disabled. When this is absent, the PWRONx# pins are active low (default)
30 and their internal pull-down resistors are enabled.
31
32required:
33 - compatible
34 - reg
35
36allOf:
37 - $ref: usb-xhci.yaml
38
39additionalProperties: false
40
41examples:
42 - |
43 pcie@0 {
44 reg = <0x0 0x1000>;
45 ranges = <0x02000000 0x0 0x100000 0x10000000 0x0 0x0>;
46 #address-cells = <3>;
47 #size-cells = <2>;
48 device_type = "pci";
49
50 usb@0 {
51 compatible = "pci104c,8241";
52 reg = <0x0 0x0 0x0 0x0 0x0>;
53 ti,pwron-active-high;
54 };
55 };
Documentation/devicetree/bindings/vendor-prefixes.yaml+4−0
@@ -83,6 +83,8 @@ patternProperties: · 82 unmodified lines
83 description: ALFA Network Inc.83 description: ALFA Network Inc.
84 "^allegro,.*":84 "^allegro,.*":
85 description: Allegro DVT85 description: Allegro DVT
86 "^allegromicro,.*":
87 description: Allegro MicroSystems, Inc.
86 "^alliedvision,.*":88 "^alliedvision,.*":
87 description: Allied Vision Technologies GmbH89 description: Allied Vision Technologies GmbH
88 "^allo,.*":90 "^allo,.*":
@@ -565,6 +567,8 @@ patternProperties: · 476 unmodified lines
565 description: GE Fanuc Intelligent Platforms Embedded Systems, Inc.567 description: GE Fanuc Intelligent Platforms Embedded Systems, Inc.
566 "^GEFanuc,.*":568 "^GEFanuc,.*":
567 description: GE Fanuc Intelligent Platforms Embedded Systems, Inc.569 description: GE Fanuc Intelligent Platforms Embedded Systems, Inc.
570 "^gehc,.*":
571 description: GE HealthCare
568 "^gemei,.*":572 "^gemei,.*":
569 description: Gemei Digital Technology Co., Ltd.573 description: Gemei Digital Technology Co., Ltd.
570 "^gemtek,.*":574 "^gemtek,.*":
Documentation/devicetree/bindings/watchdog/airoha,en7581-wdt.yaml+47−0
@@ -0,0 +1,47 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/watchdog/airoha,en7581-wdt.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Airoha EN7581 Watchdog Timer
8
9maintainers:
10 - Christian Marangi <ansuelsmth@gmail.com>
11
12allOf:
13 - $ref: watchdog.yaml#
14
15properties:
16 compatible:
17 const: airoha,en7581-wdt
18
19 reg:
20 maxItems: 1
21
22 clocks:
23 description: BUS clock (timer ticks at half the BUS clock)
24 maxItems: 1
25
26 clock-names:
27 const: bus
28
29required:
30 - compatible
31 - reg
32 - clocks
33 - clock-names
34
35unevaluatedProperties: false
36
37examples:
38 - |
39 #include <dt-bindings/clock/en7523-clk.h>
40
41 watchdog@1fbf0100 {
42 compatible = "airoha,en7581-wdt";
43 reg = <0x1fbf0100 0x3c>;
44
45 clocks = <&scuclk EN7523_CLK_BUS>;
46 clock-names = "bus";
47 };
Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.yaml+14−0
@@ -48,6 +48,8 @@ properties: · 47 unmodified lines
48 clocks:48 clocks:
49 maxItems: 149 maxItems: 1
50 50
51 big-endian: true
52
51 fsl,ext-reset-output:53 fsl,ext-reset-output:
52 $ref: /schemas/types.yaml#/definitions/flag54 $ref: /schemas/types.yaml#/definitions/flag
53 description: |55 description: |
@@ -93,6 +95,18 @@ allOf: · 39 unmodified lines
93 properties:95 properties:
94 fsl,suspend-in-wait: false96 fsl,suspend-in-wait: false
95 97
98 - if:
99 not:
100 properties:
101 compatible:
102 contains:
103 enum:
104 - fsl,ls1012a-wdt
105 - fsl,ls1043a-wdt
106 then:
107 properties:
108 big-endian: false
109
96unevaluatedProperties: false110unevaluatedProperties: false
97 111
98examples:112examples:
Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml+2−0
@@ -26,6 +26,8 @@ properties: · 25 unmodified lines
26 - qcom,apss-wdt-msm899426 - qcom,apss-wdt-msm8994
27 - qcom,apss-wdt-qcm229027 - qcom,apss-wdt-qcm2290
28 - qcom,apss-wdt-qcs40428 - qcom,apss-wdt-qcs404
29 - qcom,apss-wdt-qcs615
30 - qcom,apss-wdt-qcs8300
29 - qcom,apss-wdt-sa8255p31 - qcom,apss-wdt-sa8255p
30 - qcom,apss-wdt-sa8775p32 - qcom,apss-wdt-sa8775p
31 - qcom,apss-wdt-sc718033 - qcom,apss-wdt-sc7180
Documentation/devicetree/bindings/watchdog/samsung-wdt.yaml+3−0
@@ -26,6 +26,7 @@ properties: · 25 unmodified lines
26 - samsung,exynos7-wdt # for Exynos726 - samsung,exynos7-wdt # for Exynos7
27 - samsung,exynos850-wdt # for Exynos85027 - samsung,exynos850-wdt # for Exynos850
28 - samsung,exynosautov9-wdt # for Exynosautov928 - samsung,exynosautov9-wdt # for Exynosautov9
29 - samsung,exynosautov920-wdt # for Exynosautov920
29 - items:30 - items:
30 - enum:31 - enum:
31 - tesla,fsd-wdt32 - tesla,fsd-wdt
@@ -77,6 +78,7 @@ allOf: · 45 unmodified lines
77 - samsung,exynos7-wdt78 - samsung,exynos7-wdt
78 - samsung,exynos850-wdt79 - samsung,exynos850-wdt
79 - samsung,exynosautov9-wdt80 - samsung,exynosautov9-wdt
81 - samsung,exynosautov920-wdt
80 then:82 then:
81 required:83 required:
82 - samsung,syscon-phandle84 - samsung,syscon-phandle
@@ -88,6 +90,7 @@ allOf: · 5 unmodified lines
88 - google,gs101-wdt90 - google,gs101-wdt
89 - samsung,exynos850-wdt91 - samsung,exynos850-wdt
90 - samsung,exynosautov9-wdt92 - samsung,exynosautov9-wdt
93 - samsung,exynosautov920-wdt
91 then:94 then:
92 properties:95 properties:
93 clocks:96 clocks:
Documentation/doc-guide/kernel-doc.rst+1−0
@@ -533,6 +533,7 @@ identifiers: *[ function/type ...]* · 532 unmodified lines
533 Include documentation for each *function* and *type* in *source*.533 Include documentation for each *function* and *type* in *source*.
534 If no *function* is specified, the documentation for all functions534 If no *function* is specified, the documentation for all functions
535 and types in the *source* will be included.535 and types in the *source* will be included.
536 *type* can be a struct, union, enum, or typedef identifier.
536 537
537 Examples::538 Examples::
538 539
Documentation/driver-api/auxiliary_bus.rst+0−1
@@ -24,7 +24,6 @@ Auxiliary Device Creation · 23 unmodified lines
24 24
25.. kernel-doc:: drivers/base/auxiliary.c25.. kernel-doc:: drivers/base/auxiliary.c
26 :identifiers: auxiliary_device_init __auxiliary_device_add26 :identifiers: auxiliary_device_init __auxiliary_device_add
27 auxiliary_find_device
28 27
29Auxiliary Device Memory Model and Lifespan28Auxiliary Device Memory Model and Lifespan
30------------------------------------------29------------------------------------------
Documentation/driver-api/driver-model/devres.rst+0−2
@@ -394,7 +394,6 @@ PCI · 393 unmodified lines
394 pcim_enable_device() : after success, some PCI ops become managed394 pcim_enable_device() : after success, some PCI ops become managed
395 pcim_iomap() : do iomap() on a single BAR395 pcim_iomap() : do iomap() on a single BAR
396 pcim_iomap_regions() : do request_region() and iomap() on multiple BARs396 pcim_iomap_regions() : do request_region() and iomap() on multiple BARs
397 pcim_iomap_regions_request_all() : do request_region() on all and iomap() on multiple BARs
398 pcim_iomap_table() : array of mapped addresses indexed by BAR397 pcim_iomap_table() : array of mapped addresses indexed by BAR
399 pcim_iounmap() : do iounmap() on a single BAR398 pcim_iounmap() : do iounmap() on a single BAR
400 pcim_iounmap_regions() : do iounmap() and release_region() on multiple BARs399 pcim_iounmap_regions() : do iounmap() and release_region() on multiple BARs
@@ -459,7 +458,6 @@ SERDEV · 58 unmodified lines
459 458
460SLAVE DMA ENGINE459SLAVE DMA ENGINE
461 devm_acpi_dma_controller_register()460 devm_acpi_dma_controller_register()
462 devm_acpi_dma_controller_free()
463 461
464SPI462SPI
465 devm_spi_alloc_host()463 devm_spi_alloc_host()
Documentation/driver-api/pci/pci.rst+3−0
@@ -46,6 +46,9 @@ PCI Support Library · 45 unmodified lines
46.. kernel-doc:: drivers/pci/pci-sysfs.c46.. kernel-doc:: drivers/pci/pci-sysfs.c
47 :internal:47 :internal:
48 48
49.. kernel-doc:: drivers/pci/tph.c
50 :export:
51
49PCI Hotplug Support Library52PCI Hotplug Support Library
50---------------------------53---------------------------
51 54
Documentation/driver-api/pwrseq.rst+4−4
@@ -11,7 +11,7 @@ Introduction · 10 unmodified lines
11============11============
12 12
13This framework is designed to abstract complex power-up sequences that are13This framework is designed to abstract complex power-up sequences that are
14shared between multiple logical devices in the linux kernel.14shared between multiple logical devices in the Linux kernel.
15 15
16The intention is to allow consumers to obtain a power sequencing handle16The intention is to allow consumers to obtain a power sequencing handle
17exposed by the power sequence provider and delegate the actual requesting and17exposed by the power sequence provider and delegate the actual requesting and
@@ -25,7 +25,7 @@ The power sequencing API uses a number of terms specific to the subsystem: · 7 unmodified lines
25 25
26Unit26Unit
27 27
28 A unit is a discreet chunk of a power sequence. For instance one unit may28 A unit is a discrete chunk of a power sequence. For instance one unit may
29 enable a set of regulators, another may enable a specific GPIO. Units can29 enable a set of regulators, another may enable a specific GPIO. Units can
30 define dependencies in the form of other units that must be enabled before30 define dependencies in the form of other units that must be enabled before
31 it itself can be.31 it itself can be.
@@ -62,7 +62,7 @@ Provider interface · 30 unmodified lines
62The provider API is admittedly not nearly as straightforward as the one for62The provider API is admittedly not nearly as straightforward as the one for
63consumers but it makes up for it in flexibility.63consumers but it makes up for it in flexibility.
64 64
65Each provider can logically split the power-up sequence into descrete chunks65Each provider can logically split the power-up sequence into discrete chunks
66(units) and define their dependencies. They can then expose named targets that66(units) and define their dependencies. They can then expose named targets that
67consumers may use as the final point in the sequence that they wish to reach.67consumers may use as the final point in the sequence that they wish to reach.
68 68
@@ -72,7 +72,7 @@ register with the pwrseq subsystem by calling pwrseq_device_register(). · 3 unmodified lines
72Dynamic consumer matching72Dynamic consumer matching
73-------------------------73-------------------------
74 74
75The main difference between pwrseq and other linux kernel providers is the75The main difference between pwrseq and other Linux kernel providers is the
76mechanism for dynamic matching of consumers and providers. Every power sequence76mechanism for dynamic matching of consumers and providers. Every power sequence
77provider driver must implement the `match()` callback and pass it to the pwrseq77provider driver must implement the `match()` callback and pass it to the pwrseq
78core when registering with the subsystems.78core when registering with the subsystems.
Documentation/features/locking/queued-spinlocks/arch-support.txt+1−1
@@ -20,7 +20,7 @@ · 19 unmodified lines
20 | openrisc: | ok |20 | openrisc: | ok |
21 | parisc: | TODO |21 | parisc: | TODO |
22 | powerpc: | ok |22 | powerpc: | ok |
23 | riscv: | TODO |23 | riscv: | ok |
24 | s390: | TODO |24 | s390: | TODO |
25 | sh: | TODO |25 | sh: | TODO |
26 | sparc: | ok |26 | sparc: | ok |
Documentation/filesystems/autofs.rst+1−1
@@ -442,7 +442,7 @@ which can be used to communicate directly with the autofs filesystem. · 441 unmodified lines
442It requires CAP_SYS_ADMIN for access.442It requires CAP_SYS_ADMIN for access.
443 443
444The 'ioctl's that can be used on this device are described in a separate444The 'ioctl's that can be used on this device are described in a separate
445document `autofs-mount-control.txt`, and are summarised briefly here.445document `autofs-mount-control.rst`, and are summarised briefly here.
446Each ioctl is passed a pointer to an `autofs_dev_ioctl` structure::446Each ioctl is passed a pointer to an `autofs_dev_ioctl` structure::
447 447
448 struct autofs_dev_ioctl {448 struct autofs_dev_ioctl {
Documentation/filesystems/dlmfs.rst+1−1
@@ -36,7 +36,7 @@ None · 35 unmodified lines
36Usage36Usage
37=====37=====
38 38
39If you're just interested in OCFS2, then please see ocfs2.txt. The39If you're just interested in OCFS2, then please see ocfs2.rst. The
40rest of this document will be geared towards those who want to use40rest of this document will be geared towards those who want to use
41dlmfs for easy to setup and easy to use clustered locking in41dlmfs for easy to setup and easy to use clustered locking in
42userspace.42userspace.
Documentation/filesystems/f2fs.rst+44−0
@@ -943,3 +943,47 @@ NVMe Zoned Namespace devices · 942 unmodified lines
943 can start before the zone-capacity and span across zone-capacity boundary.943 can start before the zone-capacity and span across zone-capacity boundary.
944 Such spanning segments are also considered as usable segments. All blocks944 Such spanning segments are also considered as usable segments. All blocks
945 past the zone-capacity are considered unusable in these segments.945 past the zone-capacity are considered unusable in these segments.
946
947Device aliasing feature
948-----------------------
949
950f2fs can utilize a special file called a "device aliasing file." This file allows
951the entire storage device to be mapped with a single, large extent, not using
952the usual f2fs node structures. This mapped area is pinned and primarily intended
953for holding the space.
954
955Essentially, this mechanism allows a portion of the f2fs area to be temporarily
956reserved and used by another filesystem or for different purposes. Once that
957external usage is complete, the device aliasing file can be deleted, releasing
958the reserved space back to F2FS for its own use.
959
960<use-case>
961
962# ls /dev/vd*
963/dev/vdb (32GB) /dev/vdc (32GB)
964# mkfs.ext4 /dev/vdc
965# mkfs.f2fs -c /dev/vdc@vdc.file /dev/vdb
966# mount /dev/vdb /mnt/f2fs
967# ls -l /mnt/f2fs
968vdc.file
969# df -h
970/dev/vdb 64G 33G 32G 52% /mnt/f2fs
971
972# mount -o loop /dev/vdc /mnt/ext4
973# df -h
974/dev/vdb 64G 33G 32G 52% /mnt/f2fs
975/dev/loop7 32G 24K 30G 1% /mnt/ext4
976# umount /mnt/ext4
977
978# f2fs_io getflags /mnt/f2fs/vdc.file
979get a flag on /mnt/f2fs/vdc.file ret=0, flags=nocow(pinned),immutable
980# f2fs_io setflags noimmutable /mnt/f2fs/vdc.file
981get a flag on noimmutable ret=0, flags=800010
982set a flag on /mnt/f2fs/vdc.file ret=0, flags=noimmutable
983# rm /mnt/f2fs/vdc.file
984# df -h
985/dev/vdb 64G 753M 64G 2% /mnt/f2fs
986
987So, the key idea is, user can do any file operations on /dev/vdc, and
988reclaim the space after the use, while the space is counted as /data.
989That doesn't require modifying partition size and filesystem format.
Documentation/filesystems/fsverity.rst+1−1
@@ -16,7 +16,7 @@ btrfs filesystems. Like fscrypt, not too much filesystem-specific · 15 unmodified lines
16code is needed to support fs-verity.16code is needed to support fs-verity.
17 17
18fs-verity is similar to `dm-verity18fs-verity is similar to `dm-verity
19<https://www.kernel.org/doc/Documentation/device-mapper/verity.txt>`_19<https://www.kernel.org/doc/Documentation/admin-guide/device-mapper/verity.rst>`_
20but works on files rather than block devices. On regular files on20but works on files rather than block devices. On regular files on
21filesystems supporting fs-verity, userspace can execute an ioctl that21filesystems supporting fs-verity, userspace can execute an ioctl that
22causes the filesystem to build a Merkle tree for the file and persist22causes the filesystem to build a Merkle tree for the file and persist
Documentation/filesystems/mount_api.rst+2−1
@@ -770,7 +770,8 @@ process the parameters it is given. · 769 unmodified lines
770 770
771 * ::771 * ::
772 772
773 bool fs_validate_description(const struct fs_parameter_description *desc);773 bool fs_validate_description(const char *name,
774 const struct fs_parameter_description *desc);
774 775
775 This performs some validation checks on a parameter description. It776 This performs some validation checks on a parameter description. It
776 returns true if the description is good and false if it is not. It will777 returns true if the description is good and false if it is not. It will
Documentation/filesystems/path-lookup.rst+1−1
@@ -531,7 +531,7 @@ this retry process in the next article. · 530 unmodified lines
531Automount points are locations in the filesystem where an attempt to531Automount points are locations in the filesystem where an attempt to
532lookup a name can trigger changes to how that lookup should be532lookup a name can trigger changes to how that lookup should be
533handled, in particular by mounting a filesystem there. These are533handled, in particular by mounting a filesystem there. These are
534covered in greater detail in autofs.txt in the Linux documentation534covered in greater detail in autofs.rst in the Linux documentation
535tree, but a few notes specifically related to path lookup are in order535tree, but a few notes specifically related to path lookup are in order
536here.536here.
537 537
Documentation/filesystems/path-lookup.txt+1−1
@@ -379,4 +379,4 @@ Papers and other documentation on dcache locking · 378 unmodified lines
379 379
3802. http://lse.sourceforge.net/locking/dcache/dcache.html3802. http://lse.sourceforge.net/locking/dcache/dcache.html
381 381
3823. path-lookup.md in this directory.3823. path-lookup.rst in this directory.
Documentation/filesystems/ramfs-rootfs-initramfs.rst+1−1
@@ -315,7 +315,7 @@ the above threads) is: · 314 unmodified lines
3152) The cpio archive format chosen by the kernel is simpler and cleaner (and3152) The cpio archive format chosen by the kernel is simpler and cleaner (and
316 thus easier to create and parse) than any of the (literally dozens of)316 thus easier to create and parse) than any of the (literally dozens of)
317 various tar archive formats. The complete initramfs archive format is317 various tar archive formats. The complete initramfs archive format is
318 explained in buffer-format.txt, created in usr/gen_init_cpio.c, and318 explained in buffer-format.rst, created in usr/gen_init_cpio.c, and
319 extracted in init/initramfs.c. All three together come to less than 26k319 extracted in init/initramfs.c. All three together come to less than 26k
320 total of human-readable text.320 total of human-readable text.
321 321
Documentation/iio/ad7380.rst+16−0
@@ -27,6 +27,8 @@ The following chips are supported by this driver: · 26 unmodified lines
27* `AD7386-4 <https://www.analog.com/en/products/ad7386-4.html>`_27* `AD7386-4 <https://www.analog.com/en/products/ad7386-4.html>`_
28* `AD7387-4 <https://www.analog.com/en/products/ad7387-4.html>`_28* `AD7387-4 <https://www.analog.com/en/products/ad7387-4.html>`_
29* `AD7388-4 <https://www.analog.com/en/products/ad7388-4.html>`_29* `AD7388-4 <https://www.analog.com/en/products/ad7388-4.html>`_
30* `ADAQ4370-4 <https://www.analog.com/en/products/adaq4370-4.html>`_
31* `ADAQ4380-4 <https://www.analog.com/en/products/adaq4380-4.html>`_
30 32
31 33
32Supported features34Supported features
@@ -47,6 +49,12 @@ ad7380-4 · 14 unmodified lines
47ad7380-4 supports only an external reference voltage (2.5V to 3.3V). It must be49ad7380-4 supports only an external reference voltage (2.5V to 3.3V). It must be
48declared in the device tree as ``refin-supply``.50declared in the device tree as ``refin-supply``.
49 51
52ADAQ devices
53~~~~~~~~~~~~
54
55adaq4370-4 and adaq4380-4 don't have an external reference, but use a 3.3V
56internal reference derived from one of its supplies (``refin-supply``)
57
50All other devices from ad738x family58All other devices from ad738x family
51~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~59~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
52 60
@@ -121,6 +129,14 @@ Example for AD7386/7/8 (2 channels parts): · 68 unmodified lines
121 129
122When enabling sequencer mode, the effective sampling rate is divided by two.130When enabling sequencer mode, the effective sampling rate is divided by two.
123 131
132Gain (ADAQ devices only)
133~~~~~~~~~~~~~~~~~~~~~~~~
134
135ADAQ devices have a pin selectable gain in front of each ADC. The appropriate
136gain is selectable from device tree using the ``adi,gain-milli`` property.
137Refer to the typical connection diagrams section of the datasheet for pin
138wiring.
139
124Unimplemented features140Unimplemented features
125----------------------141----------------------
126 142
Documentation/iio/ad7606.rst+144−0
@@ -0,0 +1,144 @@
1.. SPDX-License-Identifier: GPL-2.0-only
2
3=============
4AD7606 driver
5=============
6
7ADC driver for Analog Devices Inc. AD7606 and similar devices. The module name
8is ``ad7606``.
9
10Supported devices
11=================
12
13The following chips are supported by this driver:
14
15* `AD7605 <https://www.analog.com/en/products/ad7605.html>`_
16* `AD7606 <https://www.analog.com/en/products/ad7606.html>`_
17* `AD7606B <https://www.analog.com/en/products/ad7606b.html>`_
18* `AD7616 <https://www.analog.com/en/products/ad7616.html>`_
19
20Supported features
21==================
22
23SPI wiring modes
24----------------
25
26These ADCs can output data on several SDO lines (1/2/4/8). The driver
27currently supports only 1 SDO line.
28
29Parallel wiring mode
30--------------------
31
32There is also a parallel interface, with 16 lines (that can be reduced to 8 in
33byte mode). The parallel interface is selected by declaring the device as
34platform in the device tree (with no io-backends node defined, see below).
35
36IIO-backend mode
37----------------
38
39This mode allows to reach the best sample rates, but it requires an external
40hardware (eg HDL or APU) to handle the low level communication.
41The backend mode is enabled when through the definition of the "io-backends"
42property in the device tree.
43
44The reference configuration for the current implementation of IIO-backend mode
45is the HDL reference provided by ADI:
46https://wiki.analog.com/resources/eval/user-guides/ad7606x-fmc/hdl
47
48This implementation embeds an IIO-backend compatible IP (adi-axi-adc) and a PWM
49connected to the conversion trigger pin.
50
51.. code-block::
52
53 +---+ +----------------------------
54 | | +-------+ |AD76xx
55 | A | controls | | |
56 | D |-------------->| PWM |-------------->| cnvst
57 | 7 | | | |
58 | 6 | +-------+ |
59 | 0 | controls +-----------+-----------+ |
60 | 6 |---------->| | |<--| frstdata
61 | | | Backend | Backend |<--| busy
62 | D | | Driver | | |
63 | R | | | |-->| clk
64 | I | requests |+---------+| DMA | |
65 | V |----------->| Buffer ||<---- |<=>| DATA
66 | E | |+---------+| | |
67 | R | +-----------+-----------+ |
68 | |-------------------------------------->| reset/configuration gpios
69 +---+ +-----------------------------
70
71
72Software and hardware modes
73---------------------------
74
75While all the AD7606/AD7616 series parts can be configured using GPIOs, some of
76them can be configured using register.
77
78The chips that support software mode have more values available for configuring
79the device, as well as more settings, and allow to control the range and
80calibration per channel.
81
82The following settings are available per channel in software mode:
83 - Scale
84
85Also, there is a broader choice of oversampling ratios in software mode.
86
87Conversion triggering
88---------------------
89
90The conversion can be triggered by two distinct ways:
91
92 - A GPIO is connected to the conversion trigger pin, and this GPIO is controlled
93 by the driver directly. In this configuration, the driver sets back the
94 conversion trigger pin to high as soon as it has read all the conversions.
95
96 - An external source is connected to the conversion trigger pin. In the
97 current implementation, it must be a PWM. In this configuration, the driver
98 does not control directly the conversion trigger pin. Instead, it can
99 control the PWM's frequency. This trigger is enabled only for iio-backend.
100
101Reference voltage
102-----------------
103
1042 possible reference voltage sources are supported:
105
106 - Internal reference (2.5V)
107 - External reference (2.5V)
108
109The source is determined by the device tree. If ``refin-supply`` is present,
110then the external reference is used, otherwise the internal reference is used.
111
112Oversampling
113------------
114
115This family supports oversampling to improve SNR.
116In software mode, the following ratios are available:
1171 (oversampling disabled)/2/4/8/16/32/64/128/256.
118
119Unimplemented features
120----------------------
121
122- 2/4/8 SDO lines
123- CRC indication
124- Calibration
125
126Device buffers
127==============
128
129IIO triggered buffer
130--------------------
131
132This driver supports IIO triggered buffers, with a "built in" trigger, i.e the
133trigger is allocated and linked by the driver, and a new conversion is triggered
134as soon as the samples are transferred, and a timestamp channel is added to make
135up for the potential jitter induced by the delays in the interrupt handling.
136
137IIO backend buffer
138------------------
139
140When IIO backend is used, the trigger is not needed, and the sample rate is
141considered as stable. There is no timestamp channel. The communication is
142delegated to an external logic, called a backend, and the backend's driver
143handles the buffer. When this mode is enabled, the driver cannot control the
144conversion pin, because the busy pin is bound to the backend.
Documentation/iio/ad7625.rst+91−0
@@ -0,0 +1,91 @@
1.. SPDX-License-Identifier: GPL-2.0-only
2
3====================
4AD7625 driver
5====================
6
7ADC driver for Analog Devices Inc. AD7625, AD7626, AD7960, and AD7961
8devices. The module name is ``ad7625``.
9
10Supported devices
11=================
12
13The following chips are supported by this driver:
14
15* `AD7625 <https://www.analog.com/AD7625>`_
16* `AD7626 <https://www.analog.com/AD7626>`_
17* `AD7960 <https://www.analog.com/AD7960>`_
18* `AD7961 <https://www.analog.com/AD7961>`_
19
20The driver requires use of the Pulsar LVDS HDL project:
21
22* `Pulsar LVDS HDL <http://analogdevicesinc.github.io/hdl/projects/pulsar_lvds/index.html>`_
23
24To trigger conversions and enable subsequent data transfer, the devices
25require coupled PWM signals with a phase offset.
26
27Supported features
28==================
29
30Conversion control modes
31------------------------
32
33The driver currently supports one of two possible LVDS conversion control methods.
34
35Echoed-Clock interface mode
36^^^^^^^^^^^^^^^^^^^^^^^^^^^
37
38.. code-block::
39
40 +----------------+
41 +xxxxxxxxxxxxxxxxxxxxxxxxxx| CNV |
42 X | |
43 v | HOST |
44 +----------------------------+ | |
45 | CNV+/CNV- DCO+/DCO- |xxxxxxx>| CLK_IN |
46 | | | |
47 | | | |
48 | AD7625 D+/D- |xxxxxxx>| DATA_IN |
49 | | | |
50 | | | |
51 | CLK+/CLK- |<xxxxxxx| CLK & CLK_GATE |
52 +----------------------------+ | |
53 +----------------+
54
55Reference voltage
56-----------------
57
58Three possible reference voltage sources are supported:
59
60- Internal reference (only available on AD7625 and AD7626)
61- External reference and internal buffer
62- External reference
63
64The source is determined by the device tree. If ``ref-supply`` is present, then
65the external reference is used. If ``refin-supply`` is present, then the internal
66buffer is used. If neither is present, then the internal reference is used.
67
68Unimplemented features
69----------------------
70
71- Self-clocked mode
72
73
74Device attributes
75=================
76
77The AD762x is a fully-differential ADC and has the following attributes:
78
79+---------------------------------------+--------------------------------------------------------------+
80| Attribute | Description |
81+=======================================+==============================================================+
82| ``scale`` | Scale factor to convert raw value from buffered reads to mV. |
83+---------------------------------------+--------------------------------------------------------------+
84
85
86Device buffers
87==============
88
89This driver supports IIO triggered buffers.
90
91See :doc:`iio_devbuf` for more information.
Documentation/iio/bno055.rst+1−1
@@ -22,7 +22,7 @@ This driver supports also IIO buffers. · 21 unmodified lines
22 22
23The IMU continuously performs an autocalibration procedure if (and only if)23The IMU continuously performs an autocalibration procedure if (and only if)
24operating in fusion mode. The magnetometer autocalibration can however be24operating in fusion mode. The magnetometer autocalibration can however be
25disabled writing 0 in the sysfs in_magn_calibration_fast_enable attribute.25disabled by writing 0 in the sysfs in_magn_calibration_fast_enable attribute.
26 26
27The driver provides access to autocalibration flags (i.e. you can known if27The driver provides access to autocalibration flags (i.e. you can known if
28the IMU has successfully autocalibrated) and to the calibration data blob.28the IMU has successfully autocalibrated) and to the calibration data blob.
Documentation/iio/index.rst+2−0
@@ -21,6 +21,8 @@ Industrial I/O Kernel Drivers · 20 unmodified lines
21 ad400021 ad4000
22 ad469522 ad4695
23 ad738023 ad7380
24 ad7606
25 ad7625
24 ad794426 ad7944
25 adis1647527 adis16475
26 adis1648028 adis16480
Documentation/input/input.rst+1−1
@@ -264,7 +264,7 @@ events on a read. Their layout is:: · 263 unmodified lines
264 struct timeval time;264 struct timeval time;
265 unsigned short type;265 unsigned short type;
266 unsigned short code;266 unsigned short code;
267 unsigned int value;267 int value;
268 };268 };
269 269
270``time`` is the timestamp, it returns the time at which the event happened.270``time`` is the timestamp, it returns the time at which the event happened.
Documentation/kbuild/kbuild.rst+7−1
@@ -137,12 +137,18 @@ Specify the output directory when building the kernel. · 136 unmodified lines
137This variable can also be used to point to the kernel output directory when137This variable can also be used to point to the kernel output directory when
138building external modules against a pre-built kernel in a separate build138building external modules against a pre-built kernel in a separate build
139directory. Please note that this does NOT specify the output directory for the139directory. Please note that this does NOT specify the output directory for the
140external modules themselves.140external modules themselves. (Use KBUILD_EXTMOD_OUTPUT for that purpose.)
141 141
142The output directory can also be specified using "O=...".142The output directory can also be specified using "O=...".
143 143
144Setting "O=..." takes precedence over KBUILD_OUTPUT.144Setting "O=..." takes precedence over KBUILD_OUTPUT.
145 145
146KBUILD_EXTMOD_OUTPUT
147--------------------
148Specify the output directory for external modules.
149
150Setting "MO=..." takes precedence over KBUILD_EXTMOD_OUTPUT.
151
146KBUILD_EXTRA_WARN152KBUILD_EXTRA_WARN
147-----------------153-----------------
148Specify the extra build checks. The same value can be assigned by passing154Specify the extra build checks. The same value can be assigned by passing
Documentation/kbuild/kconfig-language.rst+2−2
@@ -412,8 +412,8 @@ choices:: · 411 unmodified lines
412 <choice block>412 <choice block>
413 "endchoice"413 "endchoice"
414 414
415This defines a choice group and accepts any of the above attributes as415This defines a choice group and accepts "prompt", "default", "depends on", and
416options.416"help" attributes as options.
417 417
418A choice only allows a single config entry to be selected.418A choice only allows a single config entry to be selected.
419 419
Documentation/kbuild/llvm.rst+3−0
@@ -179,6 +179,9 @@ yet. Bug reports are always welcome at the issue tracker below! · 178 unmodified lines
179 * - s390179 * - s390
180 - Maintained180 - Maintained
181 - ``LLVM=1`` (LLVM >= 18.1.0), ``CC=clang`` (LLVM < 18.1.0)181 - ``LLVM=1`` (LLVM >= 18.1.0), ``CC=clang`` (LLVM < 18.1.0)
182 * - sparc (sparc64 only)
183 - Maintained
184 - ``CC=clang LLVM_IAS=0`` (LLVM >= 20)
182 * - um (User Mode)185 * - um (User Mode)
183 - Maintained186 - Maintained
184 - ``LLVM=1``187 - ``LLVM=1``
Documentation/kbuild/makefiles.rst+14−0
@@ -449,6 +449,20 @@ $(obj) · 448 unmodified lines
449 to prerequisites are referenced with $(src) (because they are not449 to prerequisites are referenced with $(src) (because they are not
450 generated files).450 generated files).
451 451
452$(srcroot)
453 $(srcroot) refers to the root of the source you are building, which can be
454 either the kernel source or the external modules source, depending on whether
455 KBUILD_EXTMOD is set. This can be either a relative or an absolute path, but
456 if KBUILD_ABS_SRCTREE=1 is set, it is always an absolute path.
457
458$(srctree)
459 $(srctree) refers to the root of the kernel source tree. When building the
460 kernel, this is the same as $(srcroot).
461
462$(objtree)
463 $(objtree) refers to the root of the kernel object tree. It is ``.`` when
464 building the kernel, but it is different when building external modules.
465
452$(kecho)466$(kecho)
453 echoing information to user in a rule is often a good practice467 echoing information to user in a rule is often a good practice
454 but when execution ``make -s`` one does not expect to see any output468 but when execution ``make -s`` one does not expect to see any output
Documentation/kbuild/modules.rst+28−1
@@ -59,6 +59,12 @@ Command Syntax · 58 unmodified lines
59 59
60 $ make -C /lib/modules/`uname -r`/build M=$PWD modules_install60 $ make -C /lib/modules/`uname -r`/build M=$PWD modules_install
61 61
62 Starting from Linux 6.13, you can use the -f option instead of -C. This
63 will avoid unnecessary change of the working directory. The external
64 module will be output to the directory where you invoke make.
65
66 $ make -f /lib/modules/`uname -r`/build/Makefile M=$PWD
67
62Options68Options
63-------69-------
64 70
@@ -66,7 +72,10 @@ Options · 1 unmodified line
66 of the kernel output directory if the kernel was built in a separate72 of the kernel output directory if the kernel was built in a separate
67 build directory.)73 build directory.)
68 74
69 make -C $KDIR M=$PWD75 You can optionally pass MO= option if you want to build the modules in
76 a separate directory.
77
78 make -C $KDIR M=$PWD [MO=$BUILD_DIR]
70 79
71 -C $KDIR80 -C $KDIR
72 The directory that contains the kernel and relevant build81 The directory that contains the kernel and relevant build
@@ -80,6 +89,9 @@ Options · 7 unmodified lines
80 directory where the external module (kbuild file) is89 directory where the external module (kbuild file) is
81 located.90 located.
82 91
92 MO=$BUILD_DIR
93 Specifies a separate output directory for the external module.
94
83Targets95Targets
84-------96-------
85 97
@@ -215,6 +227,21 @@ Separate Kbuild File and Makefile · 129 unmodified lines
215 consisting of several hundred lines, and here it really pays227 consisting of several hundred lines, and here it really pays
216 off to separate the kbuild part from the rest.228 off to separate the kbuild part from the rest.
217 229
230 Linux 6.13 and later support another way. The external module Makefile
231 can include the kernel Makefile directly, rather than invoking sub Make.
232
233 Example 3::
234
235 --> filename: Kbuild
236 obj-m := 8123.o
237 8123-y := 8123_if.o 8123_pci.o
238
239 --> filename: Makefile
240 KDIR ?= /lib/modules/$(shell uname -r)/build
241 export KBUILD_EXTMOD := $(realpath $(dir $(lastword $(MAKEFILE_LIST))))
242 include $(KDIR)/Makefile
243
244
218Building Multiple Modules245Building Multiple Modules
219-------------------------246-------------------------
220 247
Documentation/kernel-hacking/hacking.rst+1−1
@@ -587,7 +587,7 @@ Defined in ``include/linux/export.h`` · 586 unmodified lines
587 587
588Similar to :c:func:`EXPORT_SYMBOL()` except that the symbols588Similar to :c:func:`EXPORT_SYMBOL()` except that the symbols
589exported by :c:func:`EXPORT_SYMBOL_GPL()` can only be seen by589exported by :c:func:`EXPORT_SYMBOL_GPL()` can only be seen by
590modules with a :c:func:`MODULE_LICENSE()` that specifies a GPL590modules with a :c:func:`MODULE_LICENSE()` that specifies a GPLv2
591compatible license. It implies that the function is considered an591compatible license. It implies that the function is considered an
592internal implementation issue, and not really an interface. Some592internal implementation issue, and not really an interface. Some
593maintainers and developers may however require EXPORT_SYMBOL_GPL()593maintainers and developers may however require EXPORT_SYMBOL_GPL()
Documentation/mm/slub.rst+9−0
@@ -175,6 +175,15 @@ can be influenced by kernel parameters: · 174 unmodified lines
175 ``slab_max_order`` to 0, what cause minimum possible order of175 ``slab_max_order`` to 0, what cause minimum possible order of
176 slabs allocation.176 slabs allocation.
177 177
178``slab_strict_numa``
179 Enables the application of memory policies on each
180 allocation. This results in more accurate placement of
181 objects which may result in the reduction of accesses
182 to remote nodes. The default is to only apply memory
183 policies at the folio level when a new folio is acquired
184 or a folio is retrieved from the lists. Enabling this
185 option reduces the fastpath performance of the slab allocator.
186
178SLUB Debug output187SLUB Debug output
179=================188=================
180 189
Documentation/networking/cdc_mbim.rst+1−1
@@ -51,7 +51,7 @@ Such userspace applications includes, but are not limited to: · 50 unmodified lines
51 - mbimcli (included with the libmbim [3] library), and51 - mbimcli (included with the libmbim [3] library), and
52 - ModemManager [4]52 - ModemManager [4]
53 53
54Establishing a MBIM IP session reequires at least these actions by the54Establishing a MBIM IP session requires at least these actions by the
55management application:55management application:
56 56
57 - open the control channel57 - open the control channel
Documentation/networking/tls-offload.rst+15−14
@@ -51,7 +51,7 @@ and send them to the device for encryption and transmission. · 50 unmodified lines
51RX51RX
52--52--
53 53
54On the receive side if the device handled decryption and authentication54On the receive side, if the device handled decryption and authentication
55successfully, the driver will set the decrypted bit in the associated55successfully, the driver will set the decrypted bit in the associated
56:c:type:`struct sk_buff <sk_buff>`. The packets reach the TCP stack and56:c:type:`struct sk_buff <sk_buff>`. The packets reach the TCP stack and
57are handled normally. ``ktls`` is informed when data is queued to the socket57are handled normally. ``ktls`` is informed when data is queued to the socket
@@ -120,8 +120,9 @@ before installing the connection state in the kernel. · 62 unmodified lines
120RX120RX
121--121--
122 122
123In RX direction local networking stack has little control over the segmentation,123In the RX direction, the local networking stack has little control over
124so the initial records' TCP sequence number may be anywhere inside the segment.124segmentation, so the initial records' TCP sequence number may be anywhere
125inside the segment.
125 126
126Normal operation127Normal operation
127================128================
@@ -138,8 +139,8 @@ There are no guarantees on record length or record segmentation. In particular · 10 unmodified lines
138segments may start at any point of a record and contain any number of records.139segments may start at any point of a record and contain any number of records.
139Assuming segments are received in order, the device should be able to perform140Assuming segments are received in order, the device should be able to perform
140crypto operations and authentication regardless of segmentation. For this141crypto operations and authentication regardless of segmentation. For this
141to be possible device has to keep small amount of segment-to-segment state.142to be possible, the device has to keep a small amount of segment-to-segment
142This includes at least:143state. This includes at least:
143 144
144 * partial headers (if a segment carried only a part of the TLS header)145 * partial headers (if a segment carried only a part of the TLS header)
145 * partial data block146 * partial data block
@@ -175,12 +176,12 @@ and packet transformation functions) the device validates the Layer 4 · 29 unmodified lines
175checksum and performs a 5-tuple lookup to find any TLS connection the packet176checksum and performs a 5-tuple lookup to find any TLS connection the packet
176may belong to (technically a 4-tuple177may belong to (technically a 4-tuple
177lookup is sufficient - IP addresses and TCP port numbers, as the protocol178lookup is sufficient - IP addresses and TCP port numbers, as the protocol
178is always TCP). If connection is matched device confirms if the TCP sequence179is always TCP). If the packet is matched to a connection, the device confirms
179number is the expected one and proceeds to TLS handling (record delineation,180if the TCP sequence number is the expected one and proceeds to TLS handling
180decryption, authentication for each record in the packet). The device leaves181(record delineation, decryption, authentication for each record in the packet).
181the record framing unmodified, the stack takes care of record decapsulation.182The device leaves the record framing unmodified, the stack takes care of record
182Device indicates successful handling of TLS offload in the per-packet context183decapsulation. Device indicates successful handling of TLS offload in the
183(descriptor) passed to the host.184per-packet context (descriptor) passed to the host.
184 185
185Upon reception of a TLS offloaded packet, the driver sets186Upon reception of a TLS offloaded packet, the driver sets
186the :c:member:`decrypted` mark in :c:type:`struct sk_buff <sk_buff>`187the :c:member:`decrypted` mark in :c:type:`struct sk_buff <sk_buff>`
@@ -439,7 +440,7 @@ by the driver: · 252 unmodified lines
439 * ``rx_tls_resync_req_end`` - number of times the TLS async resync request440 * ``rx_tls_resync_req_end`` - number of times the TLS async resync request
440 properly ended with providing the HW tracked tcp-seq.441 properly ended with providing the HW tracked tcp-seq.
441 * ``rx_tls_resync_req_skip`` - number of times the TLS async resync request442 * ``rx_tls_resync_req_skip`` - number of times the TLS async resync request
442 procedure was started by not properly ended.443 procedure was started but not properly ended.
443 * ``rx_tls_resync_res_ok`` - number of times the TLS resync response call to444 * ``rx_tls_resync_res_ok`` - number of times the TLS resync response call to
444 the driver was successfully handled.445 the driver was successfully handled.
445 * ``rx_tls_resync_res_skip`` - number of times the TLS resync response call to446 * ``rx_tls_resync_res_skip`` - number of times the TLS resync response call to
@@ -507,8 +508,8 @@ in packets as seen on the wire. · 61 unmodified lines
507Transport layer transparency508Transport layer transparency
508----------------------------509----------------------------
509 510
510The device should not modify any packet headers for the purpose511For the purpose of simplifying TLS offload, the device should not modify any
511of the simplifying TLS offload.512packet headers.
512 513
513The device should not depend on any packet headers beyond what is strictly514The device should not depend on any packet headers beyond what is strictly
514necessary for TLS offload.515necessary for TLS offload.
Documentation/process/debugging/driver_development_debugging_guide.rst+223−0
@@ -0,0 +1,223 @@
1.. SPDX-License-Identifier: GPL-2.0
2
3========================================
4Debugging advice for driver development
5========================================
6
7This document serves as a general starting point and lookup for debugging
8device drivers.
9While this guide focuses on debugging that requires re-compiling the
10module/kernel, the :doc:`userspace debugging guide
11</process/debugging/userspace_debugging_guide>` will guide
12you through tools like dynamic debug, ftrace and other tools useful for
13debugging issues and behavior.
14For general debugging advice, see the :doc:`general advice document
15</process/debugging/index>`.
16
17.. contents::
18 :depth: 3
19
20The following sections show you the available tools.
21
22printk() & friends
23------------------
24
25These are derivatives of printf() with varying destinations and support for
26being dynamically turned on or off, or lack thereof.
27
28Simple printk()
29~~~~~~~~~~~~~~~
30
31The classic, can be used to great effect for quick and dirty development
32of new modules or to extract arbitrary necessary data for troubleshooting.
33
34Prerequisite: ``CONFIG_PRINTK`` (usually enabled by default)
35
36**Pros**:
37
38- No need to learn anything, simple to use
39- Easy to modify exactly to your needs (formatting of the data (See:
40 :doc:`/core-api/printk-formats`), visibility in the log)
41- Can cause delays in the execution of the code (beneficial to confirm whether
42 timing is a factor)
43
44**Cons**:
45
46- Requires rebuilding the kernel/module
47- Can cause delays in the execution of the code (which can cause issues to be
48 not reproducible)
49
50For the full documentation see :doc:`/core-api/printk-basics`
51
52Trace_printk
53~~~~~~~~~~~~
54
55Prerequisite: ``CONFIG_DYNAMIC_FTRACE`` & ``#include <linux/ftrace.h>``
56
57It is a tiny bit less comfortable to use than printk(), because you will have
58to read the messages from the trace file (See: :ref:`read_ftrace_log`
59instead of from the kernel log, but very useful when printk() adds unwanted
60delays into the code execution, causing issues to be flaky or hidden.)
61
62If the processing of this still causes timing issues then you can try
63trace_puts().
64
65For the full Documentation see trace_printk()
66
67dev_dbg
68~~~~~~~
69
70Print statement, which can be targeted by
71:ref:`process/debugging/userspace_debugging_guide:dynamic debug` that contains
72additional information about the device used within the context.
73
74**When is it appropriate to leave a debug print in the code?**
75
76Permanent debug statements have to be useful for a developer to troubleshoot
77driver misbehavior. Judging that is a bit more of an art than a science, but
78some guidelines are in the :ref:`Coding style guidelines
79<process/coding-style:13) printing kernel messages>`. In almost all cases the
80debug statements shouldn't be upstreamed, as a working driver is supposed to be
81silent.
82
83Custom printk
84~~~~~~~~~~~~~
85
86Example::
87
88 #define core_dbg(fmt, arg...) do { \
89 if (core_debug) \
90 printk(KERN_DEBUG pr_fmt("core: " fmt), ## arg); \
91 } while (0)
92
93**When should you do this?**
94
95It is better to just use a pr_debug(), which can later be turned on/off with
96dynamic debug. Additionally, a lot of drivers activate these prints via a
97variable like ``core_debug`` set by a module parameter. However, Module
98parameters `are not recommended anymore
99<https://lore.kernel.org/all/2024032757-surcharge-grime-d3dd@gregkh>`_.
100
101Ftrace
102------
103
104Creating a custom Ftrace tracepoint
105~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
106
107A tracepoint adds a hook into your code that will be called and logged when the
108tracepoint is enabled. This can be used, for example, to trace hitting a
109conditional branch or to dump the internal state at specific points of the code
110flow during a debugging session.
111
112Here is a basic description of :ref:`how to implement new tracepoints
113<trace/tracepoints:usage>`.
114
115For the full event tracing documentation see :doc:`/trace/events`
116
117For the full Ftrace documentation see :doc:`/trace/ftrace`
118
119DebugFS
120-------
121
122Prerequisite: ``CONFIG_DEBUG_FS` & `#include <linux/debugfs.h>``
123
124DebugFS differs from the other approaches of debugging, as it doesn't write
125messages to the kernel log nor add traces to the code. Instead it allows the
126developer to handle a set of files.
127With these files you can either store values of variables or make
128register/memory dumps or you can make these files writable and modify
129values/settings in the driver.
130
131Possible use-cases among others:
132
133- Store register values
134- Keep track of variables
135- Store errors
136- Store settings
137- Toggle a setting like debug on/off
138- Error injection
139
140This is especially useful, when the size of a data dump would be hard to digest
141as part of the general kernel log (for example when dumping raw bitstream data)
142or when you are not interested in all the values all the time, but with the
143possibility to inspect them.
144
145The general idea is:
146
147- Create a directory during probe (``struct dentry *parent =
148 debugfs_create_dir("my_driver", NULL);``)
149- Create a file (``debugfs_create_u32("my_value", 444, parent, &my_variable);``)
150
151 - In this example the file is found in
152 ``/sys/kernel/debug/my_driver/my_value`` (with read permissions for
153 user/group/all)
154 - any read of the file will return the current contents of the variable
155 ``my_variable``
156
157- Clean up the directory when removing the device
158 (``debugfs_remove_recursive(parent);``)
159
160For the full documentation see :doc:`/filesystems/debugfs`.
161
162KASAN, UBSAN, lockdep and other error checkers
163----------------------------------------------
164
165KASAN (Kernel Address Sanitizer)
166~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
167
168Prerequisite: ``CONFIG_KASAN``
169
170KASAN is a dynamic memory error detector that helps to find use-after-free and
171out-of-bounds bugs. It uses compile-time instrumentation to check every memory
172access.
173
174For the full documentation see :doc:`/dev-tools/kasan`.
175
176UBSAN (Undefined Behavior Sanitizer)
177~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
178
179Prerequisite: ``CONFIG_UBSAN``
180
181UBSAN relies on compiler instrumentation and runtime checks to detect undefined
182behavior. It is designed to find a variety of issues, including signed integer
183overflow, array index out of bounds, and more.
184
185For the full documentation see :doc:`/dev-tools/ubsan`
186
187lockdep (Lock Dependency Validator)
188~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
189
190Prerequisite: ``CONFIG_DEBUG_LOCKDEP``
191
192lockdep is a runtime lock dependency validator that detects potential deadlocks
193and other locking-related issues in the kernel.
194It tracks lock acquisitions and releases, building a dependency graph that is
195analyzed for potential deadlocks.
196lockdep is especially useful for validating the correctness of lock ordering in
197the kernel.
198
199PSI (Pressure stall information tracking)
200~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
201
202Prerequisite: ``CONFIG_PSI``
203
204PSI is a measurement tool to identify excessive overcommits on hardware
205resources, that can cause performance disruptions or even OOM kills.
206
207device coredump
208---------------
209
210Prerequisite: ``#include <linux/devcoredump.h>``
211
212Provides the infrastructure for a driver to provide arbitrary data to userland.
213It is most often used in conjunction with udev or similar userland application
214to listen for kernel uevents, which indicate that the dump is ready. Udev has
215rules to copy that file somewhere for long-term storage and analysis, as by
216default, the data for the dump is automatically cleaned up after 5 minutes.
217That data is analyzed with driver-specific tools or GDB.
218
219You can find an example implementation at:
220`drivers/media/platform/qcom/venus/core.c
221<https://elixir.bootlin.com/linux/v6.11.6/source/drivers/media/platform/qcom/venus/core.c#L30>`__
222
223**Copyright** ©2024 : Collabora
Documentation/process/debugging/index.rst+78−0
@@ -0,0 +1,78 @@
1.. SPDX-License-Identifier: GPL-2.0
2
3============================================
4Debugging advice for Linux Kernel developers
5============================================
6
7general guides
8--------------
9
10.. toctree::
11 :maxdepth: 1
12
13 driver_development_debugging_guide
14 userspace_debugging_guide
15
16.. only:: subproject and html
17
18subsystem specific guides
19-------------------------
20
21.. toctree::
22 :maxdepth: 1
23
24 media_specific_debugging_guide
25
26.. only:: subproject and html
27
28 Indices
29 =======
30
31 * :ref:`genindex`
32
33General debugging advice
34========================
35
36Depending on the issue, a different set of tools is available to track down the
37problem or even to realize whether there is one in the first place.
38
39As a first step you have to figure out what kind of issue you want to debug.
40Depending on the answer, your methodology and choice of tools may vary.
41
42Do I need to debug with limited access?
43---------------------------------------
44
45Do you have limited access to the machine or are you unable to stop the running
46execution?
47
48In this case your debugging capability depends on built-in debugging support of
49provided distribution kernel.
50The :doc:`/process/debugging/userspace_debugging_guide` provides a brief
51overview over a range of possible debugging tools in that situation. You can
52check the capability of your kernel, in most cases, by looking into config file
53within the /boot directory.
54
55Do I have root access to the system?
56------------------------------------
57
58Are you easily able to replace the module in question or to install a new
59kernel?
60
61In that case your range of available tools is a lot bigger, you can find the
62tools in the :doc:`/process/debugging/driver_development_debugging_guide`.
63
64Is timing a factor?
65-------------------
66
67It is important to understand if the problem you want to debug manifests itself
68consistently (i.e. given a set of inputs you always get the same, incorrect
69output), or inconsistently. If it manifests itself inconsistently, some timing
70factor might be at play. If inserting delays into the code does change the
71behavior, then quite likely timing is a factor.
72
73When timing does alter the outcome of the code execution using a simple
74printk() for debugging purposes may not work, a similar alternative is to use
75trace_printk() , which logs the debug messages to the trace file instead of the
76kernel log.
77
78**Copyright** ©2024 : Collabora
Documentation/process/debugging/media_specific_debugging_guide.rst+180−0
@@ -0,0 +1,180 @@
1.. SPDX-License-Identifier: GPL-2.0
2
3============================================
4Debugging and tracing in the media subsystem
5============================================
6
7This document serves as a starting point and lookup for debugging device
8drivers in the media subsystem and to debug these drivers from userspace.
9
10.. contents::
11 :depth: 3
12
13General debugging advice
14------------------------
15
16For general advice see the :doc:`general advice document
17</process/debugging/index>`.
18
19The following sections show you some of the available tools.
20
21dev_debug module parameter
22--------------------------
23
24Every video device provides a ``dev_debug`` parameter, which allows to get
25further insights into the IOCTLs in the background.::
26
27 # cat /sys/class/video4linux/video3/name
28 rkvdec
29 # echo 0xff > /sys/class/video4linux/video3/dev_debug
30 # dmesg -wH
31 [...] videodev: v4l2_open: video3: open (0)
32 [ +0.000036] video3: VIDIOC_QUERYCAP: driver=rkvdec, card=rkvdec,
33 bus=platform:rkvdec, version=0x00060900, capabilities=0x84204000,
34 device_caps=0x04204000
35
36For the full documentation see :ref:`driver-api/media/v4l2-dev:video device
37debugging`
38
39dev_dbg() / v4l2_dbg()
40----------------------
41
42Two debug print statements, which are specific for devices and for the v4l2
43subsystem, avoid adding these to your final submission unless they have
44long-term value for investigations.
45
46For a general overview please see the
47:ref:`process/debugging/driver_development_debugging_guide:printk() & friends`
48guide.
49
50- Difference between both?
51
52 - v4l2_dbg() utilizes v4l2_printk() under the hood, which further uses
53 printk() directly, thus it cannot be targeted by dynamic debug
54 - dev_dbg() can be targeted by dynamic debug
55 - v4l2_dbg() has a more specific prefix format for the media subsystem, while
56 dev_dbg only highlights the driver name and the location of the log
57
58Dynamic debug
59-------------
60
61A method to trim down the debug output to your needs.
62
63For general advice see the
64:ref:`process/debugging/userspace_debugging_guide:dynamic debug` guide.
65
66Here is one example, that enables all available pr_debug()'s within the file::
67
68 $ alias ddcmd='echo $* > /proc/dynamic_debug/control'
69 $ ddcmd '-p; file v4l2-h264.c +p'
70 $ grep =p /proc/dynamic_debug/control
71 drivers/media/v4l2-core/v4l2-h264.c:372 [v4l2_h264]print_ref_list_b =p
72 "ref_pic_list_b%u (cur_poc %u%c) %s"
73 drivers/media/v4l2-core/v4l2-h264.c:333 [v4l2_h264]print_ref_list_p =p
74 "ref_pic_list_p (cur_poc %u%c) %s\n"
75
76Ftrace
77------
78
79An internal kernel tracer that can trace static predefined events, function
80calls, etc. Very useful for debugging problems without changing the kernel and
81understanding the behavior of subsystems.
82
83For general advice see the
84:ref:`process/debugging/userspace_debugging_guide:ftrace` guide.
85
86DebugFS
87-------
88
89This tool allows you to dump or modify internal values of your driver to files
90in a custom filesystem.
91
92For general advice see the
93:ref:`process/debugging/driver_development_debugging_guide:debugfs` guide.
94
95Perf & alternatives
96-------------------
97
98Tools to measure the various stats on a running system to diagnose issues.
99
100For general advice see the
101:ref:`process/debugging/userspace_debugging_guide:perf & alternatives` guide.
102
103Example for media devices:
104
105Gather statistics data for a decoding job: (This example is on a RK3399 SoC
106with the rkvdec codec driver using the `fluster test suite
107<https://github.com/fluendo/fluster>`__)::
108
109 perf stat -d python3 fluster.py run -d GStreamer-H.264-V4L2SL-Gst1.0 -ts
110 JVT-AVC_V1 -tv AUD_MW_E -j1
111 ...
112 Performance counter stats for 'python3 fluster.py run -d
113 GStreamer-H.264-V4L2SL-Gst1.0 -ts JVT-AVC_V1 -tv AUD_MW_E -j1 -v':
114
115 7794.23 msec task-clock:u # 0.697 CPUs utilized
116 0 context-switches:u # 0.000 /sec
117 0 cpu-migrations:u # 0.000 /sec
118 11901 page-faults:u # 1.527 K/sec
119 882671556 cycles:u # 0.113 GHz (95.79%)
120 711708695 instructions:u # 0.81 insn per cycle (95.79%)
121 10581935 branches:u # 1.358 M/sec (15.13%)
122 6871144 branch-misses:u # 64.93% of all branches (95.79%)
123 281716547 L1-dcache-loads:u # 36.144 M/sec (95.79%)
124 9019581 L1-dcache-load-misses:u # 3.20% of all L1-dcache accesses (95.79%)
125 <not supported> LLC-loads:u
126 <not supported> LLC-load-misses:u
127
128 11.180830431 seconds time elapsed
129
130 1.502318000 seconds user
131 6.377221000 seconds sys
132
133The availability of events and metrics depends on the system you are running.
134
135Error checking & panic analysis
136-------------------------------
137
138Various Kernel configuration options to enhance error detection of the Linux
139Kernel with the cost of lowering performance.
140
141For general advice see the
142:ref:`process/debugging/driver_development_debugging_guide:kasan, ubsan,
143lockdep and other error checkers` guide.
144
145Driver verification with v4l2-compliance
146----------------------------------------
147
148To verify, that a driver adheres to the v4l2 API, the tool v4l2-compliance is
149used, which is part of the `v4l_utils
150<https://git.linuxtv.org/v4l-utils.git>`__, a suite of userspace tools to work
151with the media subsystem.
152
153To see the detailed media topology (and check it) use::
154
155 v4l2-compliance -M /dev/mediaX --verbose
156
157You can also run a full compliance check for all devices referenced in the
158media topology with::
159
160 v4l2-compliance -m /dev/mediaX
161
162Debugging problems with receiving video
163---------------------------------------
164
165Implementing vidioc_log_status in the driver: this can log the current status
166to the kernel log. It's called by v4l2-ctl --log-status. Very useful for
167debugging problems with receiving video (TV/S-Video/HDMI/etc) since the video
168signal is external (so unpredictable). Less useful with camera sensor inputs
169since you have control over what the camera sensor does.
170
171Usually you can just assign the default::
172
173 .vidioc_log_status = v4l2_ctrl_log_status,
174
175But you can also create your own callback, to create a custom status log.
176
177You can find an example in the cobalt driver
178(`drivers/media/pci/cobalt/cobalt-v4l2.c <https://elixir.bootlin.com/linux/v6.11.6/source/drivers/media/pci/cobalt/cobalt-v4l2.c#L567>`__).
179
180**Copyright** ©2024 : Collabora
Documentation/process/debugging/userspace_debugging_guide.rst+280−0
@@ -0,0 +1,280 @@
1.. SPDX-License-Identifier: GPL-2.0
2
3==========================
4Userspace debugging advice
5==========================
6
7This document provides a brief overview of common tools to debug the Linux
8Kernel from userspace.
9For debugging advice aimed at driver developers go :doc:`here
10</process/debugging/driver_development_debugging_guide>`.
11For general debugging advice, see :doc:`general advice document
12</process/debugging/index>`.
13
14.. contents::
15 :depth: 3
16
17The following sections show you the available tools.
18
19Dynamic debug
20-------------
21
22Mechanism to filter what ends up in the kernel log by dis-/en-abling log
23messages.
24
25Prerequisite: ``CONFIG_DYNAMIC_DEBUG``
26
27Dynamic debug is only able to target:
28
29- pr_debug()
30- dev_dbg()
31- print_hex_dump_debug()
32- print_hex_dump_bytes()
33
34Therefore the usability of this tool is, as of now, quite limited as there is
35no uniform rule for adding debug prints to the codebase, resulting in a variety
36of ways these prints are implemented.
37
38Also, note that most debug statements are implemented as a variation of
39dprintk(), which have to be activated via a parameter in respective module,
40dynamic debug is unable to do that step for you.
41
42Here is one example, that enables all available pr_debug()'s within the file::
43
44 $ alias ddcmd='echo $* > /proc/dynamic_debug/control'
45 $ ddcmd '-p; file v4l2-h264.c +p'
46 $ grep =p /proc/dynamic_debug/control
47 drivers/media/v4l2-core/v4l2-h264.c:372 [v4l2_h264]print_ref_list_b =p
48 "ref_pic_list_b%u (cur_poc %u%c) %s"
49 drivers/media/v4l2-core/v4l2-h264.c:333 [v4l2_h264]print_ref_list_p =p
50 "ref_pic_list_p (cur_poc %u%c) %s\n"
51
52**When should you use this over Ftrace ?**
53
54- When the code contains one of the valid print statements (see above) or when
55 you have added multiple pr_debug() statements during development
56- When timing is not an issue, meaning if multiple pr_debug() statements in
57 the code won't cause delays
58- When you care more about receiving specific log messages than tracing the
59 pattern of how a function is called
60
61For the full documentation see :doc:`/admin-guide/dynamic-debug-howto`
62
63Ftrace
64------
65
66Prerequisite: ``CONFIG_DYNAMIC_FTRACE``
67
68This tool uses the tracefs file system for the control files and output files.
69That file system will be mounted as a ``tracing`` directory, which can be found
70in either ``/sys/kernel/`` or ``/sys/debug/kernel/``.
71
72Some of the most important operations for debugging are:
73
74- You can perform a function trace by adding a function name to the
75 ``set_ftrace_filter`` file (which accepts any function name found within the
76 ``available_filter_functions`` file) or you can specifically disable certain
77 functions by adding their names to the ``set_ftrace_notrace`` file (more info
78 at: :ref:`trace/ftrace:dynamic ftrace`).
79- In order to find out where calls originate from you can activate the
80 ``func_stack_trace`` option under ``options/func_stack_trace``.
81- Tracing the children of a function call and showing the return values are
82 possible by adding the desired function in the ``set_graph_function`` file
83 (requires config ``FUNCTION_GRAPH_RETVAL``); more info at
84 :ref:`trace/ftrace:dynamic ftrace with the function graph tracer`.
85
86For the full Ftrace documentation see :doc:`/trace/ftrace`
87
88Or you could also trace for specific events by :ref:`using event tracing
89<trace/events:2. using event tracing>`, which can be defined as described here:
90:ref:`Creating a custom Ftrace tracepoint
91<process/debugging/driver_development_debugging_guide:ftrace>`.
92
93For the full Ftrace event tracing documentation see :doc:`/trace/events`
94
95.. _read_ftrace_log:
96
97Reading the ftrace log
98~~~~~~~~~~~~~~~~~~~~~~
99
100The ``trace`` file can be read just like any other file (``cat``, ``tail``,
101``head``, ``vim``, etc.), the size of the file is limited by the
102``buffer_size_kb`` (``echo 1000 > buffer_size_kb``). The
103:ref:`trace/ftrace:trace_pipe` will behave similarly to the ``trace`` file, but
104whenever you read from the file the content is consumed.
105
106Kernelshark
107~~~~~~~~~~~
108
109A GUI interface to visualize the traces as a graph and list view from the
110output of the `trace-cmd
111<https://git.kernel.org/pub/scm/utils/trace-cmd/trace-cmd.git/>`__ application.
112
113For the full documentation see `<https://kernelshark.org/Documentation.html>`__
114
115Perf & alternatives
116-------------------
117
118The tools mentioned above provide ways to inspect kernel code, results,
119variable values, etc. Sometimes you have to find out first where to look and
120for those cases, a box of performance tracking tools can help you to frame the
121issue.
122
123Why should you do a performance analysis?
124~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
125
126A performance analysis is a good first step when among other reasons:
127
128- you cannot define the issue
129- you do not know where it occurs
130- the running system should not be interrupted or it is a remote system, where
131 you cannot install a new module/kernel
132
133How to do a simple analysis with linux tools?
134~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
135
136For the start of a performance analysis, you can start with the usual tools
137like:
138
139- ``top`` / ``htop`` / ``atop`` (*get an overview of the system load, see
140 spikes on specific processes*)
141- ``mpstat -P ALL`` (*look at the load distribution among CPUs*)
142- ``iostat -x`` (*observe input and output devices utilization and performance*)
143- ``vmstat`` (*overview of memory usage on the system*)
144- ``pidstat`` (*similar to* ``vmstat`` *but per process, to dial it down to the
145 target*)
146- ``strace -tp $PID`` (*once you know the process, you can figure out how it
147 communicates with the Kernel*)
148
149These should help to narrow down the areas to look at sufficiently.
150
151Diving deeper with perf
152~~~~~~~~~~~~~~~~~~~~~~~
153
154The **perf** tool provides a series of metrics and events to further dial down
155on issues.
156
157Prerequisite: build or install perf on your system
158
159Gather statistics data for finding all files starting with ``gcc`` in ``/usr``::
160
161 # perf stat -d find /usr -name 'gcc*' | wc -l
162
163 Performance counter stats for 'find /usr -name gcc*':
164
165 1277.81 msec task-clock # 0.997 CPUs utilized
166 9 context-switches # 7.043 /sec
167 1 cpu-migrations # 0.783 /sec
168 704 page-faults # 550.943 /sec
169 766548897 cycles # 0.600 GHz (97.15%)
170 798285467 instructions # 1.04 insn per cycle (97.15%)
171 57582731 branches # 45.064 M/sec (2.85%)
172 3842573 branch-misses # 6.67% of all branches (97.15%)
173 281616097 L1-dcache-loads # 220.390 M/sec (97.15%)
174 4220975 L1-dcache-load-misses # 1.50% of all L1-dcache accesses (97.15%)
175 <not supported> LLC-loads
176 <not supported> LLC-load-misses
177
178 1.281746009 seconds time elapsed
179
180 0.508796000 seconds user
181 0.773209000 seconds sys
182
183
184 52
185
186The availability of events and metrics depends on the system you are running.
187
188For the full documentation see
189`<https://perf.wiki.kernel.org/index.php/Main_Page>`__
190
191Perfetto
192~~~~~~~~
193
194A set of tools to measure and analyze how well applications and systems perform.
195You can use it to:
196
197* identify bottlenecks
198* optimize code
199* make software run faster and more efficiently.
200
201**What is the difference between perfetto and perf?**
202
203* perf is tool as part of and specialized for the Linux Kernel and has CLI user
204 interface.
205* perfetto cross-platform performance analysis stack, has extended
206 functionality into userspace and provides a WEB user interface.
207
208For the full documentation see `<https://perfetto.dev/docs/>`__
209
210Kernel panic analysis tools
211---------------------------
212
213 To capture the crash dump please use ``Kdump`` & ``Kexec``. Below you can find
214 some advice for analysing the data.
215
216 For the full documentation see the :doc:`/admin-guide/kdump/kdump`
217
218 In order to find the corresponding line in the code you can use `faddr2line
219 <https://elixir.bootlin.com/linux/v6.11.6/source/scripts/faddr2line>`__; note
220 that you need to enable ``CONFIG_DEBUG_INFO`` for that to work.
221
222 An alternative to using ``faddr2line`` is the use of ``objdump`` (and its
223 derivatives for the different platforms like ``aarch64-linux-gnu-objdump``).
224 Take this line as an example:
225
226 ``[ +0.000240] rkvdec_device_run+0x50/0x138 [rockchip_vdec]``.
227
228 We can find the corresponding line of code by executing::
229
230 aarch64-linux-gnu-objdump -dS drivers/staging/media/rkvdec/rockchip-vdec.ko | grep rkvdec_device_run\>: -A 40
231 0000000000000ac8 <rkvdec_device_run>:
232 ac8: d503201f nop
233 acc: d503201f nop
234 {
235 ad0: d503233f paciasp
236 ad4: a9bd7bfd stp x29, x30, [sp, #-48]!
237 ad8: 910003fd mov x29, sp
238 adc: a90153f3 stp x19, x20, [sp, #16]
239 ae0: a9025bf5 stp x21, x22, [sp, #32]
240 const struct rkvdec_coded_fmt_desc *desc = ctx->coded_fmt_desc;
241 ae4: f9411814 ldr x20, [x0, #560]
242 struct rkvdec_dev *rkvdec = ctx->dev;
243 ae8: f9418015 ldr x21, [x0, #768]
244 if (WARN_ON(!desc))
245 aec: b4000654 cbz x20, bb4 <rkvdec_device_run+0xec>
246 ret = pm_runtime_resume_and_get(rkvdec->dev);
247 af0: f943d2b6 ldr x22, [x21, #1952]
248 ret = __pm_runtime_resume(dev, RPM_GET_PUT);
249 af4: aa0003f3 mov x19, x0
250 af8: 52800081 mov w1, #0x4 // #4
251 afc: aa1603e0 mov x0, x22
252 b00: 94000000 bl 0 <__pm_runtime_resume>
253 if (ret < 0) {
254 b04: 37f80340 tbnz w0, #31, b6c <rkvdec_device_run+0xa4>
255 dev_warn(rkvdec->dev, "Not good\n");
256 b08: f943d2a0 ldr x0, [x21, #1952]
257 b0c: 90000001 adrp x1, 0 <rkvdec_try_ctrl-0x8>
258 b10: 91000021 add x1, x1, #0x0
259 b14: 94000000 bl 0 <_dev_warn>
260 *bad = 1;
261 b18: d2800001 mov x1, #0x0 // #0
262 ...
263
264 Meaning, in this line from the crash dump::
265
266 [ +0.000240] rkvdec_device_run+0x50/0x138 [rockchip_vdec]
267
268 I can take the ``0x50`` as offset, which I have to add to the base address
269 of the corresponding function, which I find in this line::
270
271 0000000000000ac8 <rkvdec_device_run>:
272
273 The result of ``0xac8 + 0x50 = 0xb18``
274 And when I search for that address within the function I get the
275 following line::
276
277 *bad = 1;
278 b18: d2800001 mov x1, #0x0
279
280**Copyright** ©2024 : Collabora
Documentation/process/index.rst+5−3
@@ -72,13 +72,15 @@ beyond). · 71 unmodified lines
72Dealing with bugs72Dealing with bugs
73-----------------73-----------------
74 74
75Bugs are a fact of life; it is important that we handle them properly.75Bugs are a fact of life; it is important that we handle them properly. The
76The documents below describe our policies around the handling of a couple76documents below provide general advice about debugging and describe our
77of special classes of bugs: regressions and security problems.77policies around the handling of a couple of special classes of bugs:
78regressions and security problems.
78 79
79.. toctree::80.. toctree::
80 :maxdepth: 181 :maxdepth: 1
81 82
83 debugging/index
82 handling-regressions84 handling-regressions
83 security-bugs85 security-bugs
84 cve86 cve
Documentation/process/license-rules.rst+10−8
@@ -471,14 +471,16 @@ _`MODULE_LICENSE` · 470 unmodified lines
471 source files.471 source files.
472 472
473 "Proprietary" The module is under a proprietary license.473 "Proprietary" The module is under a proprietary license.
474 This string is solely for proprietary third474 "Proprietary" is to be understood only as
475 party modules and cannot be used for modules475 "The license is not compatible to GPLv2".
476 which have their source code in the kernel476 This string is solely for non-GPL2 compatible
477 tree. Modules tagged that way are tainting477 third party modules and cannot be used for
478 the kernel with the 'P' flag when loaded and478 modules which have their source code in the
479 the kernel module loader refuses to link such479 kernel tree. Modules tagged that way are
480 modules against symbols which are exported480 tainting the kernel with the 'P' flag when
481 with EXPORT_SYMBOL_GPL().481 loaded and the kernel module loader refuses
482 to link such modules against symbols which
483 are exported with EXPORT_SYMBOL_GPL().
482 ============================= =============================================484 ============================= =============================================
483 485
484 486
Documentation/rust/coding-guidelines.rst+146−0
@@ -227,3 +227,149 @@ The equivalent in Rust may look like (ignoring documentation): · 226 unmodified lines
227That is, the equivalent of ``GPIO_LINE_DIRECTION_IN`` would be referred to as227That is, the equivalent of ``GPIO_LINE_DIRECTION_IN`` would be referred to as
228``gpio::LineDirection::In``. In particular, it should not be named228``gpio::LineDirection::In``. In particular, it should not be named
229``gpio::gpio_line_direction::GPIO_LINE_DIRECTION_IN``.229``gpio::gpio_line_direction::GPIO_LINE_DIRECTION_IN``.
230
231
232Lints
233-----
234
235In Rust, it is possible to ``allow`` particular warnings (diagnostics, lints)
236locally, making the compiler ignore instances of a given warning within a given
237function, module, block, etc.
238
239It is similar to ``#pragma GCC diagnostic push`` + ``ignored`` + ``pop`` in C
240[#]_:
241
242.. code-block:: c
243
244 #pragma GCC diagnostic push
245 #pragma GCC diagnostic ignored "-Wunused-function"
246 static void f(void) {}
247 #pragma GCC diagnostic pop
248
249.. [#] In this particular case, the kernel's ``__{always,maybe}_unused``
250 attributes (C23's ``[[maybe_unused]]``) may be used; however, the example
251 is meant to reflect the equivalent lint in Rust discussed afterwards.
252
253But way less verbose:
254
255.. code-block:: rust
256
257 #[allow(dead_code)]
258 fn f() {}
259
260By that virtue, it makes it possible to comfortably enable more diagnostics by
261default (i.e. outside ``W=`` levels). In particular, those that may have some
262false positives but that are otherwise quite useful to keep enabled to catch
263potential mistakes.
264
265On top of that, Rust provides the ``expect`` attribute which takes this further.
266It makes the compiler warn if the warning was not produced. For instance, the
267following will ensure that, when ``f()`` is called somewhere, we will have to
268remove the attribute:
269
270.. code-block:: rust
271
272 #[expect(dead_code)]
273 fn f() {}
274
275If we do not, we get a warning from the compiler::
276
277 warning: this lint expectation is unfulfilled
278 --> x.rs:3:10
279 |
280 3 | #[expect(dead_code)]
281 | ^^^^^^^^^
282 |
283 = note: `#[warn(unfulfilled_lint_expectations)]` on by default
284
285This means that ``expect``\ s do not get forgotten when they are not needed, which
286may happen in several situations, e.g.:
287
288- Temporary attributes added while developing.
289
290- Improvements in lints in the compiler, Clippy or custom tools which may
291 remove a false positive.
292
293- When the lint is not needed anymore because it was expected that it would be
294 removed at some point, such as the ``dead_code`` example above.
295
296It also increases the visibility of the remaining ``allow``\ s and reduces the
297chance of misapplying one.
298
299Thus prefer ``expect`` over ``allow`` unless:
300
301- Conditional compilation triggers the warning in some cases but not others.
302
303 If there are only a few cases where the warning triggers (or does not
304 trigger) compared to the total number of cases, then one may consider using
305 a conditional ``expect`` (i.e. ``cfg_attr(..., expect(...))``). Otherwise,
306 it is likely simpler to just use ``allow``.
307
308- Inside macros, when the different invocations may create expanded code that
309 triggers the warning in some cases but not in others.
310
311- When code may trigger a warning for some architectures but not others, such
312 as an ``as`` cast to a C FFI type.
313
314As a more developed example, consider for instance this program:
315
316.. code-block:: rust
317
318 fn g() {}
319
320 fn main() {
321 #[cfg(CONFIG_X)]
322 g();
323 }
324
325Here, function ``g()`` is dead code if ``CONFIG_X`` is not set. Can we use
326``expect`` here?
327
328.. code-block:: rust
329
330 #[expect(dead_code)]
331 fn g() {}
332
333 fn main() {
334 #[cfg(CONFIG_X)]
335 g();
336 }
337
338This would emit a lint if ``CONFIG_X`` is set, since it is not dead code in that
339configuration. Therefore, in cases like this, we cannot use ``expect`` as-is.
340
341A simple possibility is using ``allow``:
342
343.. code-block:: rust
344
345 #[allow(dead_code)]
346 fn g() {}
347
348 fn main() {
349 #[cfg(CONFIG_X)]
350 g();
351 }
352
353An alternative would be using a conditional ``expect``:
354
355.. code-block:: rust
356
357 #[cfg_attr(not(CONFIG_X), expect(dead_code))]
358 fn g() {}
359
360 fn main() {
361 #[cfg(CONFIG_X)]
362 g();
363 }
364
365This would ensure that, if someone introduces another call to ``g()`` somewhere
366(e.g. unconditionally), then it would be spotted that it is not dead code
367anymore. However, the ``cfg_attr`` is more complex than a simple ``allow``.
368
369Therefore, it is likely that it is not worth using conditional ``expect``\ s when
370more than one or two configurations are involved or when the lint may be
371triggered due to non-local changes (such as ``dead_code``).
372
373For more information about diagnostics in Rust, please see:
374
375 https://doc.rust-lang.org/stable/reference/attributes/diagnostics.html
Documentation/rust/quick-start.rst+17−0
@@ -87,6 +87,23 @@ they should generally work out of the box, e.g.:: · 86 unmodified lines
87 zypper install rust rust1.79-src rust-bindgen clang87 zypper install rust rust1.79-src rust-bindgen clang
88 88
89 89
90Ubuntu
91******
92
93Ubuntu LTS and non-LTS (interim) releases provide recent Rust releases and thus
94they should generally work out of the box, e.g.::
95
96 apt install rustc-1.80 rust-1.80-src bindgen-0.65 rustfmt-1.80 rust-1.80-clippy
97
98``RUST_LIB_SRC`` needs to be set when using the versioned packages, e.g.::
99
100 RUST_LIB_SRC=/usr/src/rustc-$(rustc-1.80 --version | cut -d' ' -f2)/library
101
102In addition, ``bindgen-0.65`` is available in newer releases (24.04 LTS and
10324.10), but it may not be available in older ones (20.04 LTS and 22.04 LTS),
104thus ``bindgen`` may need to be built manually (please see below).
105
106
90Requirements: Building107Requirements: Building
91----------------------108----------------------
92 109
Documentation/sound/hd-audio/notes.rst+1−1
@@ -42,7 +42,7 @@ If you are interested in the deep debugging of HD-audio, read the · 41 unmodified lines
42HD-audio specification at first. The specification is found on42HD-audio specification at first. The specification is found on
43Intel's web page, for example:43Intel's web page, for example:
44 44
45* https://www.intel.com/standards/hdaudio/45* https://www.intel.com/content/www/us/en/standards/high-definition-audio-specification.html
46 46
47 47
48HD-Audio Controller48HD-Audio Controller
Documentation/sound/soc/dapm.rst+3−0
@@ -35,6 +35,9 @@ The graph for the STM32MP1-DK1 sound card is shown in picture: · 34 unmodified lines
35 :alt: Example DAPM graph35 :alt: Example DAPM graph
36 :align: center36 :align: center
37 37
38You can also generate compatible graph for your sound card using
39`tools/sound/dapm-graph` utility.
40
38DAPM power domains41DAPM power domains
39==================42==================
40 43
Documentation/trace/ftrace.rst+4−0
@@ -1033,9 +1033,13 @@ explains which is which. · 1032 unmodified lines
1033 irqs-off: 'd' interrupts are disabled. '.' otherwise.1033 irqs-off: 'd' interrupts are disabled. '.' otherwise.
1034 1034
1035 need-resched:1035 need-resched:
1036 - 'B' all, TIF_NEED_RESCHED, PREEMPT_NEED_RESCHED and TIF_RESCHED_LAZY is set,
1036 - 'N' both TIF_NEED_RESCHED and PREEMPT_NEED_RESCHED is set,1037 - 'N' both TIF_NEED_RESCHED and PREEMPT_NEED_RESCHED is set,
1037 - 'n' only TIF_NEED_RESCHED is set,1038 - 'n' only TIF_NEED_RESCHED is set,
1038 - 'p' only PREEMPT_NEED_RESCHED is set,1039 - 'p' only PREEMPT_NEED_RESCHED is set,
1040 - 'L' both PREEMPT_NEED_RESCHED and TIF_RESCHED_LAZY is set,
1041 - 'b' both TIF_NEED_RESCHED and TIF_RESCHED_LAZY is set,
1042 - 'l' only TIF_RESCHED_LAZY is set
1039 - '.' otherwise.1043 - '.' otherwise.
1040 1044
1041 hardirq/softirq:1045 hardirq/softirq:
Documentation/translations/it_IT/core-api/symbol-namespaces.rst+4−4
@@ -43,7 +43,7 @@ Tenete presente che per via dell'espansione delle macro questo argomento deve · 42 unmodified lines
43essere un simbolo di preprocessore. Per esempio per esportare il43essere un simbolo di preprocessore. Per esempio per esportare il
44simbolo ``usb_stor_suspend`` nello spazio dei nomi ``USB_STORAGE`` usate::44simbolo ``usb_stor_suspend`` nello spazio dei nomi ``USB_STORAGE`` usate::
45 45
46 EXPORT_SYMBOL_NS(usb_stor_suspend, USB_STORAGE);46 EXPORT_SYMBOL_NS(usb_stor_suspend, "USB_STORAGE");
47 47
48Di conseguenza, nella tabella dei simboli del kernel ci sarà una voce48Di conseguenza, nella tabella dei simboli del kernel ci sarà una voce
49rappresentata dalla struttura ``kernel_symbol`` che avrà il campo49rappresentata dalla struttura ``kernel_symbol`` che avrà il campo
@@ -69,7 +69,7 @@ Per esempio per esportare tutti i simboli definiti in usb-common nello spazio · 19 unmodified lines
69dei nomi USB_COMMON, si può aggiungere la seguente linea in69dei nomi USB_COMMON, si può aggiungere la seguente linea in
70drivers/usb/common/Makefile::70drivers/usb/common/Makefile::
71 71
72 ccflags-y += -DDEFAULT_SYMBOL_NAMESPACE=USB_COMMON72 ccflags-y += -DDEFAULT_SYMBOL_NAMESPACE='"USB_COMMON"'
73 73
74Questo cambierà tutte le macro EXPORT_SYMBOL() ed EXPORT_SYMBOL_GPL(). Invece,74Questo cambierà tutte le macro EXPORT_SYMBOL() ed EXPORT_SYMBOL_GPL(). Invece,
75un simbolo esportato con EXPORT_SYMBOL_NS() non verrà cambiato e il simbolo75un simbolo esportato con EXPORT_SYMBOL_NS() non verrà cambiato e il simbolo
@@ -79,7 +79,7 @@ Una seconda possibilità è quella di definire il simbolo di preprocessore · 3 unmodified lines
79direttamente nei file da compilare. L'esempio precedente diventerebbe::79direttamente nei file da compilare. L'esempio precedente diventerebbe::
80 80
81 #undef DEFAULT_SYMBOL_NAMESPACE81 #undef DEFAULT_SYMBOL_NAMESPACE
82 #define DEFAULT_SYMBOL_NAMESPACE USB_COMMON82 #define DEFAULT_SYMBOL_NAMESPACE "USB_COMMON"
83 83
84Questo va messo prima di un qualsiasi uso di EXPORT_SYMBOL.84Questo va messo prima di un qualsiasi uso di EXPORT_SYMBOL.
85 85
@@ -94,7 +94,7 @@ dei nomi che contiene i simboli desiderati. Per esempio un modulo che · 8 unmodified lines
94usa il simbolo usb_stor_suspend deve importare lo spazio dei nomi94usa il simbolo usb_stor_suspend deve importare lo spazio dei nomi
95USB_STORAGE usando la seguente dichiarazione::95USB_STORAGE usando la seguente dichiarazione::
96 96
97 MODULE_IMPORT_NS(USB_STORAGE);97 MODULE_IMPORT_NS("USB_STORAGE");
98 98
99Questo creerà un'etichetta ``modinfo`` per ogni spazio dei nomi99Questo creerà un'etichetta ``modinfo`` per ogni spazio dei nomi
100importato. Un risvolto di questo fatto è che gli spazi dei100importato. Un risvolto di questo fatto è che gli spazi dei
Documentation/translations/zh_CN/core-api/symbol-namespaces.rst+4−4
@@ -48,7 +48,7 @@ · 47 unmodified lines
48要是一个预处理器符号。例如,要把符号 ``usb_stor_suspend`` 导出到命名空间 ``USB_STORAGE``,48要是一个预处理器符号。例如,要把符号 ``usb_stor_suspend`` 导出到命名空间 ``USB_STORAGE``,
49请使用::49请使用::
50 50
51 EXPORT_SYMBOL_NS(usb_stor_suspend, USB_STORAGE);51 EXPORT_SYMBOL_NS(usb_stor_suspend, "USB_STORAGE");
52 52
53相应的 ksymtab 条目结构体 ``kernel_symbol`` 将有相应的成员 ``命名空间`` 集。53相应的 ksymtab 条目结构体 ``kernel_symbol`` 将有相应的成员 ``命名空间`` 集。
54导出时未指明命名空间的符号将指向 ``NULL`` 。如果没有定义命名空间,则默认没有。54导出时未指明命名空间的符号将指向 ``NULL`` 。如果没有定义命名空间,则默认没有。
@@ -66,7 +66,7 @@ · 11 unmodified lines
66子系统的 ``Makefile`` 中定义默认命名空间。例如,如果要将usb-common中定义的所有符号导66子系统的 ``Makefile`` 中定义默认命名空间。例如,如果要将usb-common中定义的所有符号导
67出到USB_COMMON命名空间,可以在drivers/usb/common/Makefile中添加这样一行::67出到USB_COMMON命名空间,可以在drivers/usb/common/Makefile中添加这样一行::
68 68
69 ccflags-y += -DDEFAULT_SYMBOL_NAMESPACE=USB_COMMON69 ccflags-y += -DDEFAULT_SYMBOL_NAMESPACE='"USB_COMMON"'
70 70
71这将影响所有 EXPORT_SYMBOL() 和 EXPORT_SYMBOL_GPL() 语句。当这个定义存在时,71这将影响所有 EXPORT_SYMBOL() 和 EXPORT_SYMBOL_GPL() 语句。当这个定义存在时,
72用EXPORT_SYMBOL_NS()导出的符号仍然会被导出到作为命名空间参数传递的命名空间中,72用EXPORT_SYMBOL_NS()导出的符号仍然会被导出到作为命名空间参数传递的命名空间中,
@@ -76,7 +76,7 @@ · 3 unmodified lines
76成::76成::
77 77
78 #undef DEFAULT_SYMBOL_NAMESPACE78 #undef DEFAULT_SYMBOL_NAMESPACE
79 #define DEFAULT_SYMBOL_NAMESPACE USB_COMMON79 #define DEFAULT_SYMBOL_NAMESPACE "USB_COMMON"
80 80
81应置于相关编译单元中任何 EXPORT_SYMBOL 宏之前81应置于相关编译单元中任何 EXPORT_SYMBOL 宏之前
82 82
@@ -88,7 +88,7 @@ · 5 unmodified lines
88表示它所使用的命名空间的符号。例如,一个使用usb_stor_suspend符号的88表示它所使用的命名空间的符号。例如,一个使用usb_stor_suspend符号的
89模块,需要使用如下语句导入命名空间USB_STORAGE::89模块,需要使用如下语句导入命名空间USB_STORAGE::
90 90
91 MODULE_IMPORT_NS(USB_STORAGE);91 MODULE_IMPORT_NS("USB_STORAGE");
92 92
93这将在模块中为每个导入的命名空间创建一个 ``modinfo`` 标签。这也顺带93这将在模块中为每个导入的命名空间创建一个 ``modinfo`` 标签。这也顺带
94使得可以用modinfo检查模块已导入的命名空间::94使得可以用modinfo检查模块已导入的命名空间::
Documentation/watchdog/watchdog-parameters.rst+0−10
@@ -120,16 +120,6 @@ coh901327_wdt: · 119 unmodified lines
120 120
121-------------------------------------------------121-------------------------------------------------
122 122
123cpu5wdt:
124 port:
125 base address of watchdog card, default is 0x91
126 verbose:
127 be verbose, default is 0 (no)
128 ticks:
129 count down ticks, default is 10000
130
131-------------------------------------------------
132
133cpwd:123cpwd:
134 wd0_timeout:124 wd0_timeout:
135 Default watchdog0 timeout in 1/10secs125 Default watchdog0 timeout in 1/10secs
MAINTAINERS+172−38
@@ -1218,6 +1218,14 @@ F: Documentation/devicetree/bindings/perf/amlogic,g12-ddr-pmu.yaml · 1217 unmodified lines
1218F: drivers/perf/amlogic/1218F: drivers/perf/amlogic/
1219F: include/soc/amlogic/1219F: include/soc/amlogic/
1220 1220
1221AMLOGIC RTC DRIVER
1222M: Yiting Deng <yiting.deng@amlogic.com>
1223M: Xianwei Zhao <xianwei.zhao@amlogic.com>
1224L: linux-amlogic@lists.infradead.org
1225S: Maintained
1226F: Documentation/devicetree/bindings/rtc/amlogic,a4-rtc.yaml
1227F: drivers/rtc/rtc-amlogic-a4.c
1228
1221AMPHENOL CHIPCAP 2 HUMIDITY-TEMPERATURE IIO DRIVER1229AMPHENOL CHIPCAP 2 HUMIDITY-TEMPERATURE IIO DRIVER
1222M: Javier Carrasco <javier.carrasco.cruz@gmail.com>1230M: Javier Carrasco <javier.carrasco.cruz@gmail.com>
1223L: linux-hwmon@vger.kernel.org1231L: linux-hwmon@vger.kernel.org
@@ -1271,7 +1279,6 @@ M: Cosmin Tanislav <cosmin.tanislav@analog.com> · 47 unmodified lines
1271L: linux-iio@vger.kernel.org1279L: linux-iio@vger.kernel.org
1272S: Supported1280S: Supported
1273W: https://ez.analog.com/linux-software-drivers1281W: https://ez.analog.com/linux-software-drivers
1274F: Documentation/ABI/testing/sysfs-bus-iio-adc-ad4130
1275F: Documentation/devicetree/bindings/iio/adc/adi,ad4130.yaml1282F: Documentation/devicetree/bindings/iio/adc/adi,ad4130.yaml
1276F: drivers/iio/adc/ad4130.c1283F: drivers/iio/adc/ad4130.c
1277 1284
@@ -1336,6 +1343,17 @@ F: Documentation/devicetree/bindings/iio/addac/adi,ad74413r.yaml · 58 unmodified lines
1336F: drivers/iio/addac/ad74413r.c1343F: drivers/iio/addac/ad74413r.c
1337F: include/dt-bindings/iio/addac/adi,ad74413r.h1344F: include/dt-bindings/iio/addac/adi,ad74413r.h
1338 1345
1346ANALOG DEVICES INC AD7625 DRIVER
1347M: Michael Hennerich <Michael.Hennerich@analog.com>
1348M: Nuno Sá <nuno.sa@analog.com>
1349R: Trevor Gamblin <tgamblin@baylibre.com>
1350S: Supported
1351W: https://ez.analog.com/linux-software-drivers
1352W: http://analogdevicesinc.github.io/hdl/projects/pulsar_lvds/index.html
1353F: Documentation/devicetree/bindings/iio/adc/adi,ad7625.yaml
1354F: Documentation/iio/ad7625.rst
1355F: drivers/iio/adc/ad7625.c
1356
1339ANALOG DEVICES INC AD7768-1 DRIVER1357ANALOG DEVICES INC AD7768-1 DRIVER
1340M: Michael Hennerich <Michael.Hennerich@analog.com>1358M: Michael Hennerich <Michael.Hennerich@analog.com>
1341L: linux-iio@vger.kernel.org1359L: linux-iio@vger.kernel.org
@@ -1363,6 +1381,14 @@ F: Documentation/ABI/testing/debugfs-iio-ad9467 · 21 unmodified lines
1363F: Documentation/devicetree/bindings/iio/adc/adi,ad9467.yaml1381F: Documentation/devicetree/bindings/iio/adc/adi,ad9467.yaml
1364F: drivers/iio/adc/ad9467.c1382F: drivers/iio/adc/ad9467.c
1365 1383
1384ANALOG DEVICES INC AD8460 DRIVER
1385M: Mariel Tinaco <Mariel.Tinaco@analog.com>
1386L: linux-iio@vger.kernel.org
1387S: Supported
1388W: https://ez.analog.com/linux-software-drivers
1389F: Documentation/devicetree/bindings/iio/dac/adi,ad8460.yaml
1390F: drivers/iio/dac/ad8460.c
1391
1366ANALOG DEVICES INC AD9739a DRIVER1392ANALOG DEVICES INC AD9739a DRIVER
1367M: Nuno Sa <nuno.sa@analog.com>1393M: Nuno Sa <nuno.sa@analog.com>
1368M: Dragos Bogdan <dragos.bogdan@analog.com>1394M: Dragos Bogdan <dragos.bogdan@analog.com>
@@ -1563,6 +1589,7 @@ F: Documentation/ABI/testing/sysfs-bus-iio-frequency-adf4350 · 194 unmodified lines
1563F: Documentation/devicetree/bindings/iio/*/adi,*1589F: Documentation/devicetree/bindings/iio/*/adi,*
1564F: Documentation/devicetree/bindings/iio/adc/lltc,ltc2496.yaml1590F: Documentation/devicetree/bindings/iio/adc/lltc,ltc2496.yaml
1565F: Documentation/devicetree/bindings/iio/adc/lltc,ltc2497.yaml1591F: Documentation/devicetree/bindings/iio/adc/lltc,ltc2497.yaml
1592F: Documentation/iio/ad7606.rst
1566F: drivers/iio/*/ad*1593F: drivers/iio/*/ad*
1567F: drivers/iio/adc/ltc249*1594F: drivers/iio/adc/ltc249*
1568F: drivers/iio/amplifiers/hmc425a.c1595F: drivers/iio/amplifiers/hmc425a.c
@@ -2213,7 +2240,7 @@ F: drivers/mmc/host/usdhi6rol0.c · 644 unmodified lines
2213F: drivers/pinctrl/pinctrl-artpec*2240F: drivers/pinctrl/pinctrl-artpec*
2214 2241
2215ARM/ASPEED I2C DRIVER2242ARM/ASPEED I2C DRIVER
2216M: Brendan Higgins <brendanhiggins@google.com>2243M: Ryan Chen <ryan_chen@aspeedtech.com>
2217R: Benjamin Herrenschmidt <benh@kernel.crashing.org>2244R: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2218R: Joel Stanley <joel@jms.id.au>2245R: Joel Stanley <joel@jms.id.au>
2219L: linux-i2c@vger.kernel.org2246L: linux-i2c@vger.kernel.org
@@ -2924,6 +2951,7 @@ Q: http://patchwork.kernel.org/project/linux-renesas-soc/list/ · 704 unmodified lines
2924C: irc://irc.libera.chat/renesas-soc2951C: irc://irc.libera.chat/renesas-soc
2925T: git git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git next2952T: git git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git next
2926F: Documentation/devicetree/bindings/hwinfo/renesas,prr.yaml2953F: Documentation/devicetree/bindings/hwinfo/renesas,prr.yaml
2954F: Documentation/devicetree/bindings/nvmem/renesas,*
2927F: Documentation/devicetree/bindings/soc/renesas/2955F: Documentation/devicetree/bindings/soc/renesas/
2928F: arch/arm/boot/dts/renesas/2956F: arch/arm/boot/dts/renesas/
2929F: arch/arm/configs/shmobile_defconfig2957F: arch/arm/configs/shmobile_defconfig
@@ -2931,6 +2959,7 @@ F: arch/arm/include/debug/renesas-scif.S · 1 unmodified line
2931F: arch/arm/mach-shmobile/2959F: arch/arm/mach-shmobile/
2932F: arch/arm64/boot/dts/renesas/2960F: arch/arm64/boot/dts/renesas/
2933F: arch/riscv/boot/dts/renesas/2961F: arch/riscv/boot/dts/renesas/
2962F: drivers/nvmem/rcar-efuse.c
2934F: drivers/pmdomain/renesas/2963F: drivers/pmdomain/renesas/
2935F: drivers/soc/renesas/2964F: drivers/soc/renesas/
2936F: include/linux/soc/renesas/2965F: include/linux/soc/renesas/
@@ -3686,6 +3715,13 @@ F: kernel/audit* · 749 unmodified lines
3686F: lib/*audit.c3715F: lib/*audit.c
3687K: \baudit_[a-z_0-9]\+\b3716K: \baudit_[a-z_0-9]\+\b
3688 3717
3718AUTOFDO BUILD
3719M: Rong Xu <xur@google.com>
3720M: Han Shen <shenhan@google.com>
3721S: Supported
3722F: Documentation/dev-tools/autofdo.rst
3723F: scripts/Makefile.autofdo
3724
3689AUXILIARY BUS DRIVER3725AUXILIARY BUS DRIVER
3690M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>3726M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3691R: Dave Ertman <david.m.ertman@intel.com>3727R: Dave Ertman <david.m.ertman@intel.com>
@@ -4036,6 +4072,13 @@ S: Maintained · 344 unmodified lines
4036F: Documentation/devicetree/bindings/iio/accel/bosch,bma400.yaml4072F: Documentation/devicetree/bindings/iio/accel/bosch,bma400.yaml
4037F: drivers/iio/accel/bma400*4073F: drivers/iio/accel/bma400*
4038 4074
4075BOSCH SENSORTEC BMI270 IMU IIO DRIVER
4076M: Alex Lanzano <lanzano.alex@gmail.com>
4077L: linux-iio@vger.kernel.org
4078S: Maintained
4079F: Documentation/devicetree/bindings/iio/imu/bosch,bmi270.yaml
4080F: drivers/iio/imu/bmi270/
4081
4039BOSCH SENSORTEC BMI323 IMU IIO DRIVER4082BOSCH SENSORTEC BMI323 IMU IIO DRIVER
4040M: Jagath Jog J <jagathjog1996@gmail.com>4083M: Jagath Jog J <jagathjog1996@gmail.com>
4041L: linux-iio@vger.kernel.org4084L: linux-iio@vger.kernel.org
@@ -9483,6 +9526,14 @@ M: Kieran Bingham <kbingham@kernel.org> · 5441 unmodified lines
9483S: Supported9526S: Supported
9484F: scripts/gdb/9527F: scripts/gdb/
9485 9528
9529GE HEALTHCARE PMC ADC DRIVER
9530M: Herve Codina <herve.codina@bootlin.com>
9531L: linux-iio@vger.kernel.org
9532S: Maintained
9533F: Documentation/devicetree/bindings/iio/adc/gehc,pmc-adc.yaml
9534F: drivers/iio/adc/gehc-pmc-adc.c
9535F: include/dt-bindings/iio/adc/gehc,pmc-adc.h
9536
9486GEMINI CRYPTO DRIVER9537GEMINI CRYPTO DRIVER
9487M: Corentin Labbe <clabbe@baylibre.com>9538M: Corentin Labbe <clabbe@baylibre.com>
9488L: linux-crypto@vger.kernel.org9539L: linux-crypto@vger.kernel.org
@@ -9718,6 +9769,11 @@ L: platform-driver-x86@vger.kernel.org · 229 unmodified lines
9718S: Maintained9769S: Maintained
9719F: drivers/platform/x86/gpd-pocket-fan.c9770F: drivers/platform/x86/gpd-pocket-fan.c
9720 9771
9772GPIB DRIVERS
9773M: Dave Penkler <dpenkler@gmail.com>
9774S: Maintained
9775F: drivers/staging/gpib/
9776
9721GPIO ACPI SUPPORT9777GPIO ACPI SUPPORT
9722M: Mika Westerberg <mika.westerberg@linux.intel.com>9778M: Mika Westerberg <mika.westerberg@linux.intel.com>
9723M: Andy Shevchenko <andriy.shevchenko@linux.intel.com>9779M: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
@@ -10702,6 +10758,14 @@ S: Maintained · 978 unmodified lines
10702F: Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml10758F: Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml
10703F: drivers/i2c/busses/i2c-mv64xxx.c10759F: drivers/i2c/busses/i2c-mv64xxx.c
10704 10760
10761I2C OF COMPONENT PROBER
10762M: Chen-Yu Tsai <wenst@chromium.org>
10763L: linux-i2c@vger.kernel.org
10764L: devicetree@vger.kernel.org
10765S: Maintained
10766F: drivers/i2c/i2c-core-of-prober.c
10767F: include/linux/i2c-of-prober.h
10768
10705I2C OVER PARALLEL PORT10769I2C OVER PARALLEL PORT
10706M: Jean Delvare <jdelvare@suse.com>10770M: Jean Delvare <jdelvare@suse.com>
10707L: linux-i2c@vger.kernel.org10771L: linux-i2c@vger.kernel.org
@@ -11641,7 +11705,7 @@ F: drivers/usb/misc/usb-ljca.c · 933 unmodified lines
11641F: include/linux/usb/ljca.h11705F: include/linux/usb/ljca.h
11642 11706
11643INTEL MANAGEMENT ENGINE (mei)11707INTEL MANAGEMENT ENGINE (mei)
11644M: Tomas Winkler <tomas.winkler@intel.com>11708M: Alexander Usyskin <alexander.usyskin@intel.com>
11645L: linux-kernel@vger.kernel.org11709L: linux-kernel@vger.kernel.org
11646S: Supported11710S: Supported
11647F: Documentation/driver-api/mei/*11711F: Documentation/driver-api/mei/*
@@ -11922,7 +11986,7 @@ F: Documentation/devicetree/bindings/media/i2c/isil,isl79987.yaml · 274 unmodified lines
11922F: drivers/media/i2c/isl7998x.c11986F: drivers/media/i2c/isl7998x.c
11923 11987
11924INVENSENSE ICM-426xx IMU DRIVER11988INVENSENSE ICM-426xx IMU DRIVER
11925M: Jean-Baptiste Maneyrol <jmaneyrol@invensense.com>11989M: Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com>
11926L: linux-iio@vger.kernel.org11990L: linux-iio@vger.kernel.org
11927S: Maintained11991S: Maintained
11928W: https://invensense.tdk.com/11992W: https://invensense.tdk.com/
@@ -11937,6 +12001,14 @@ S: Maintained · 8 unmodified lines
11937F: Documentation/devicetree/bindings/iio/gyroscope/invensense,mpu3050.yaml12001F: Documentation/devicetree/bindings/iio/gyroscope/invensense,mpu3050.yaml
11938F: drivers/iio/gyro/mpu3050*12002F: drivers/iio/gyro/mpu3050*
11939 12003
12004INVENSENSE MPU-6050 IMU DRIVER
12005M: Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com>
12006L: linux-iio@vger.kernel.org
12007S: Maintained
12008W: https://invensense.tdk.com/
12009F: Documentation/devicetree/bindings/iio/imu/invensense,mpu6050.yaml
12010F: drivers/iio/imu/inv_mpu6050/
12011
11940IOC3 ETHERNET DRIVER12012IOC3 ETHERNET DRIVER
11941M: Thomas Bogendoerfer <tsbogend@alpha.franken.de>12013M: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
11942L: linux-mips@vger.kernel.org12014L: linux-mips@vger.kernel.org
@@ -12403,7 +12475,7 @@ F: mm/usercopy.c · 460 unmodified lines
12403F: security/Kconfig.hardening12475F: security/Kconfig.hardening
12404K: \b(add|choose)_random_kstack_offset\b12476K: \b(add|choose)_random_kstack_offset\b
12405K: \b__check_(object_size|heap_object)\b12477K: \b__check_(object_size|heap_object)\b
12406K: \b__counted_by\b12478K: \b__counted_by(_le|_be)?\b
12407 12479
12408KERNEL JANITORS12480KERNEL JANITORS
12409L: kernel-janitors@vger.kernel.org12481L: kernel-janitors@vger.kernel.org
@@ -12436,6 +12508,7 @@ F: include/trace/misc/sunrpc.h · 26 unmodified lines
12436F: include/uapi/linux/nfsd/12508F: include/uapi/linux/nfsd/
12437F: include/uapi/linux/sunrpc/12509F: include/uapi/linux/sunrpc/
12438F: net/sunrpc/12510F: net/sunrpc/
12511F: tools/net/sunrpc/
12439 12512
12440KERNEL PACMAN PACKAGING (in addition to generic KERNEL BUILD)12513KERNEL PACMAN PACKAGING (in addition to generic KERNEL BUILD)
12441M: Thomas Weißschuh <linux@weissschuh.net>12514M: Thomas Weißschuh <linux@weissschuh.net>
@@ -13407,12 +13480,12 @@ S: Maintained · 965 unmodified lines
13407F: Documentation/devicetree/bindings/gpio/loongson,ls-gpio.yaml13480F: Documentation/devicetree/bindings/gpio/loongson,ls-gpio.yaml
13408F: drivers/gpio/gpio-loongson-64bit.c13481F: drivers/gpio/gpio-loongson-64bit.c
13409 13482
13410LOONGSON LS2X APB DMA DRIVER13483LOONGSON-2 APB DMA DRIVER
13411M: Binbin Zhou <zhoubinbin@loongson.cn>13484M: Binbin Zhou <zhoubinbin@loongson.cn>
13412L: dmaengine@vger.kernel.org13485L: dmaengine@vger.kernel.org
13413S: Maintained13486S: Maintained
13414F: Documentation/devicetree/bindings/dma/loongson,ls2x-apbdma.yaml13487F: Documentation/devicetree/bindings/dma/loongson,ls2x-apbdma.yaml
13415F: drivers/dma/ls2x-apb-dma.c13488F: drivers/dma/loongson2-apb-dma.c
13416 13489
13417LOONGSON LS2X I2C DRIVER13490LOONGSON LS2X I2C DRIVER
13418M: Binbin Zhou <zhoubinbin@loongson.cn>13491M: Binbin Zhou <zhoubinbin@loongson.cn>
@@ -13744,6 +13817,7 @@ F: Documentation/devicetree/bindings/mfd/marvell,88pm886-a1.yaml · 325 unmodified lines
13744F: drivers/input/misc/88pm886-onkey.c13817F: drivers/input/misc/88pm886-onkey.c
13745F: drivers/mfd/88pm886.c13818F: drivers/mfd/88pm886.c
13746F: drivers/regulator/88pm886-regulator.c13819F: drivers/regulator/88pm886-regulator.c
13820F: drivers/rtc/rtc-88pm886.c
13747F: include/linux/mfd/88pm886.h13821F: include/linux/mfd/88pm886.h
13748 13822
13749MARVELL ARMADA 3700 PHY DRIVERS13823MARVELL ARMADA 3700 PHY DRIVERS
@@ -13926,6 +14000,12 @@ R: schalla@marvell.com · 176 unmodified lines
13926R: vattunuru@marvell.com14000R: vattunuru@marvell.com
13927F: drivers/vdpa/octeon_ep/14001F: drivers/vdpa/octeon_ep/
13928 14002
14003MARVELL OCTEON HOTPLUG DRIVER
14004R: Shijith Thotton <sthotton@marvell.com>
14005R: Vamsi Attunuru <vattunuru@marvell.com>
14006S: Supported
14007F: drivers/pci/hotplug/octep_hp.c
14008
13929MATROX FRAMEBUFFER DRIVER14009MATROX FRAMEBUFFER DRIVER
13930L: linux-fbdev@vger.kernel.org14010L: linux-fbdev@vger.kernel.org
13931S: Orphan14011S: Orphan
@@ -15585,6 +15665,15 @@ F: arch/arm/boot/dts/marvell/armada-xp-crs326-24g-2s.dts · 1653 unmodified lines
15585F: arch/arm/boot/dts/marvell/armada-xp-crs328-4c-20s-4s-bit.dts15665F: arch/arm/boot/dts/marvell/armada-xp-crs328-4c-20s-4s-bit.dts
15586F: arch/arm/boot/dts/marvell/armada-xp-crs328-4c-20s-4s.dts15666F: arch/arm/boot/dts/marvell/armada-xp-crs328-4c-20s-4s.dts
15587 15667
15668MIN HEAP
15669M: Kuan-Wei Chiu <visitorckw@gmail.com>
15670L: linux-kernel@vger.kernel.org
15671S: Maintained
15672F: Documentation/core-api/min_heap.rst
15673F: include/linux/min_heap.h
15674F: lib/min_heap.c
15675F: lib/test_min_heap.c
15676
15588MIPI CCS, SMIA AND SMIA++ IMAGE SENSOR DRIVER15677MIPI CCS, SMIA AND SMIA++ IMAGE SENSOR DRIVER
15589M: Sakari Ailus <sakari.ailus@linux.intel.com>15678M: Sakari Ailus <sakari.ailus@linux.intel.com>
15590L: linux-media@vger.kernel.org15679L: linux-media@vger.kernel.org
@@ -16288,6 +16377,7 @@ X: include/net/wext.h · 697 unmodified lines
16288X: net/9p/16377X: net/9p/
16289X: net/bluetooth/16378X: net/bluetooth/
16290X: net/can/16379X: net/can/
16380X: net/ceph/
16291X: net/mac80211/16381X: net/mac80211/
16292X: net/rfkill/16382X: net/rfkill/
16293X: net/wireless/16383X: net/wireless/
@@ -16570,6 +16660,7 @@ NOVATEK NVT-TS I2C TOUCHSCREEN DRIVER · 276 unmodified lines
16570M: Hans de Goede <hdegoede@redhat.com>16660M: Hans de Goede <hdegoede@redhat.com>
16571L: linux-input@vger.kernel.org16661L: linux-input@vger.kernel.org
16572S: Maintained16662S: Maintained
16663F: Documentation/devicetree/bindings/input/touchscreen/novatek,nvt-ts.yaml
16573F: drivers/input/touchscreen/novatek-nvt-ts.c16664F: drivers/input/touchscreen/novatek-nvt-ts.c
16574 16665
16575NSDEPS16666NSDEPS
@@ -17983,8 +18074,8 @@ M: Bartosz Golaszewski <brgl@bgdev.pl> · 1407 unmodified lines
17983L: linux-pci@vger.kernel.org18074L: linux-pci@vger.kernel.org
17984S: Maintained18075S: Maintained
17985T: git git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git18076T: git git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git
17986F: drivers/pci/pwrctl/*18077F: drivers/pci/pwrctrl/*
17987F: include/linux/pci-pwrctl.h18078F: include/linux/pci-pwrctrl.h
17988 18079
17989PCI SUBSYSTEM18080PCI SUBSYSTEM
17990M: Bjorn Helgaas <bhelgaas@google.com>18081M: Bjorn Helgaas <bhelgaas@google.com>
@@ -18006,6 +18097,15 @@ F: include/linux/of_pci.h · 15 unmodified lines
18006F: include/linux/pci*18097F: include/linux/pci*
18007F: include/uapi/linux/pci*18098F: include/uapi/linux/pci*
18008 18099
18100PCIE BANDWIDTH CONTROLLER
18101M: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
18102L: linux-pci@vger.kernel.org
18103S: Supported
18104F: drivers/pci/pcie/bwctrl.c
18105F: drivers/thermal/pcie_cooling.c
18106F: include/linux/pci-bwctrl.h
18107F: tools/testing/selftests/pcie_bwctrl/
18108
18009PCIE DRIVER FOR AMAZON ANNAPURNA LABS18109PCIE DRIVER FOR AMAZON ANNAPURNA LABS
18010M: Jonathan Chocron <jonnyc@amazon.com>18110M: Jonathan Chocron <jonnyc@amazon.com>
18011L: linux-pci@vger.kernel.org18111L: linux-pci@vger.kernel.org
@@ -18305,6 +18405,13 @@ F: drivers/pinctrl/ · 293 unmodified lines
18305F: include/dt-bindings/pinctrl/18405F: include/dt-bindings/pinctrl/
18306F: include/linux/pinctrl/18406F: include/linux/pinctrl/
18307 18407
18408PIN CONTROLLER - AIROHA
18409M: Lorenzo Bianconi <lorenzo@kernel.org>
18410L: linux-mediatek@lists.infradead.org (moderated for non-subscribers)
18411S: Maintained
18412F: Documentation/devicetree/bindings/pinctrl/airoha,en7581-pinctrl.yaml
18413F: drivers/pinctrl/mediatek/pinctrl-airoha.c
18414
18308PIN CONTROLLER - AMD18415PIN CONTROLLER - AMD
18309M: Basavaraj Natikar <Basavaraj.Natikar@amd.com>18416M: Basavaraj Natikar <Basavaraj.Natikar@amd.com>
18310M: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>18417M: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
@@ -18616,6 +18723,13 @@ S: Maintained · 305 unmodified lines
18616F: include/linux/psi*18723F: include/linux/psi*
18617F: kernel/sched/psi.c18724F: kernel/sched/psi.c
18618 18725
18726PROPELLER BUILD
18727M: Rong Xu <xur@google.com>
18728M: Han Shen <shenhan@google.com>
18729S: Supported
18730F: Documentation/dev-tools/propeller.rst
18731F: scripts/Makefile.propeller
18732
18619PRINTK18733PRINTK
18620M: Petr Mladek <pmladek@suse.com>18734M: Petr Mladek <pmladek@suse.com>
18621R: Steven Rostedt <rostedt@goodmis.org>18735R: Steven Rostedt <rostedt@goodmis.org>
@@ -19832,6 +19946,14 @@ S: Supported · 1210 unmodified lines
19832F: Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml19946F: Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml
19833F: drivers/counter/rz-mtu3-cnt.c19947F: drivers/counter/rz-mtu3-cnt.c
19834 19948
19949RENESAS RTCA-3 RTC DRIVER
19950M: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
19951L: linux-rtc@vger.kernel.org
19952L: linux-renesas-soc@vger.kernel.org
19953S: Supported
19954F: Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml
19955F: drivers/rtc/rtc-renesas-rtca3.c
19956
19835RENESAS RZ/N1 A5PSW SWITCH DRIVER19957RENESAS RZ/N1 A5PSW SWITCH DRIVER
19836M: Clément Léger <clement.leger@bootlin.com>19958M: Clément Léger <clement.leger@bootlin.com>
19837L: linux-renesas-soc@vger.kernel.org19959L: linux-renesas-soc@vger.kernel.org
@@ -20062,10 +20184,14 @@ L: linux-riscv@lists.infradead.org · 224 unmodified lines
20062S: Maintained20184S: Maintained
20063T: git https://github.com/pdp7/linux.git20185T: git https://github.com/pdp7/linux.git
20064F: Documentation/devicetree/bindings/clock/thead,th1520-clk-ap.yaml20186F: Documentation/devicetree/bindings/clock/thead,th1520-clk-ap.yaml
20187F: Documentation/devicetree/bindings/mailbox/thead,th1520-mbox.yaml
20065F: Documentation/devicetree/bindings/net/thead,th1520-gmac.yaml20188F: Documentation/devicetree/bindings/net/thead,th1520-gmac.yaml
20189F: Documentation/devicetree/bindings/pinctrl/thead,th1520-pinctrl.yaml
20066F: arch/riscv/boot/dts/thead/20190F: arch/riscv/boot/dts/thead/
20067F: drivers/clk/thead/clk-th1520-ap.c20191F: drivers/clk/thead/clk-th1520-ap.c
20192F: drivers/mailbox/mailbox-th1520.c
20068F: drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c20193F: drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c
20194F: drivers/pinctrl/pinctrl-th1520.c
20069F: include/dt-bindings/clock/thead,th1520-clk-ap.h20195F: include/dt-bindings/clock/thead,th1520-clk-ap.h
20070 20196
20071RNBD BLOCK DRIVERS20197RNBD BLOCK DRIVERS
@@ -20346,13 +20472,22 @@ B: https://github.com/Rust-for-Linux/linux/issues · 274 unmodified lines
20346C: zulip://rust-for-linux.zulipchat.com20472C: zulip://rust-for-linux.zulipchat.com
20347P: https://rust-for-linux.com/contributing20473P: https://rust-for-linux.com/contributing
20348T: git https://github.com/Rust-for-Linux/linux.git rust-next20474T: git https://github.com/Rust-for-Linux/linux.git rust-next
20475F: .clippy.toml
20349F: Documentation/rust/20476F: Documentation/rust/
20477F: include/trace/events/rust_sample.h
20350F: rust/20478F: rust/
20351F: samples/rust/20479F: samples/rust/
20352F: scripts/*rust*20480F: scripts/*rust*
20353F: tools/testing/selftests/rust/20481F: tools/testing/selftests/rust/
20354K: \b(?i:rust)\b20482K: \b(?i:rust)\b
20355 20483
20484RUST [ALLOC]
20485M: Danilo Krummrich <dakr@kernel.org>
20486L: rust-for-linux@vger.kernel.org
20487S: Maintained
20488F: rust/kernel/alloc.rs
20489F: rust/kernel/alloc/
20490
20356RXRPC SOCKETS (AF_RXRPC)20491RXRPC SOCKETS (AF_RXRPC)
20357M: David Howells <dhowells@redhat.com>20492M: David Howells <dhowells@redhat.com>
20358M: Marc Dionne <marc.dionne@auristor.com>20493M: Marc Dionne <marc.dionne@auristor.com>
@@ -22089,17 +22224,6 @@ L: linux-media@vger.kernel.org · 1730 unmodified lines
22089S: Maintained22224S: Maintained
22090F: drivers/staging/media/atomisp/22225F: drivers/staging/media/atomisp/
22091 22226
22092STAGING - FIELDBUS SUBSYSTEM
22093M: Sven Van Asbroeck <TheSven73@gmail.com>
22094S: Maintained
22095F: drivers/staging/fieldbus/*
22096F: drivers/staging/fieldbus/Documentation/
22097
22098STAGING - HMS ANYBUS-S BUS
22099M: Sven Van Asbroeck <TheSven73@gmail.com>
22100S: Maintained
22101F: drivers/staging/fieldbus/anybuss/
22102
22103STAGING - INDUSTRIAL IO22227STAGING - INDUSTRIAL IO
22104M: Jonathan Cameron <jic23@kernel.org>22228M: Jonathan Cameron <jic23@kernel.org>
22105L: linux-iio@vger.kernel.org22229L: linux-iio@vger.kernel.org
@@ -22114,18 +22238,6 @@ L: linux-tegra@vger.kernel.org · 8 unmodified lines
22114S: Maintained22238S: Maintained
22115F: drivers/staging/nvec/22239F: drivers/staging/nvec/
22116 22240
22117STAGING - OLPC SECONDARY DISPLAY CONTROLLER (DCON)
22118M: Jens Frederich <jfrederich@gmail.com>
22119M: Jon Nettleton <jon.nettleton@gmail.com>
22120S: Maintained
22121W: http://wiki.laptop.org/go/DCON
22122F: drivers/staging/olpc_dcon/
22123
22124STAGING - REALTEK RTL8712U DRIVERS
22125M: Florian Schilhabel <florian.c.schilhabel@googlemail.com>.
22126S: Odd Fixes
22127F: drivers/staging/rtl8712/
22128
22129STAGING - SEPS525 LCD CONTROLLER DRIVERS22241STAGING - SEPS525 LCD CONTROLLER DRIVERS
22130M: Michael Hennerich <michael.hennerich@analog.com>22242M: Michael Hennerich <michael.hennerich@analog.com>
22131L: linux-fbdev@vger.kernel.org22243L: linux-fbdev@vger.kernel.org
@@ -22141,11 +22253,6 @@ L: linux-fbdev@vger.kernel.org · 9 unmodified lines
22141S: Maintained22253S: Maintained
22142F: drivers/staging/sm750fb/22254F: drivers/staging/sm750fb/
22143 22255
22144STAGING - VIA VT665X DRIVERS
22145M: Philipp Hortmann <philipp.g.hortmann@gmail.com>
22146S: Odd Fixes
22147F: drivers/staging/vt665?/
22148
22149STAGING SUBSYSTEM22256STAGING SUBSYSTEM
22150M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>22257M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
22151L: linux-staging@lists.linux.dev22258L: linux-staging@lists.linux.dev
@@ -22300,7 +22407,7 @@ F: drivers/char/hw_random/jh7110-trng.c · 148 unmodified lines
22300 22407
22301STARFIVE WATCHDOG DRIVER22408STARFIVE WATCHDOG DRIVER
22302M: Xingyu Wu <xingyu.wu@starfivetech.com>22409M: Xingyu Wu <xingyu.wu@starfivetech.com>
22303M: Samin Guo <samin.guo@starfivetech.com>22410M: Ziv Xu <ziv.xu@starfivetech.com>
22304S: Supported22411S: Supported
22305F: Documentation/devicetree/bindings/watchdog/starfive*22412F: Documentation/devicetree/bindings/watchdog/starfive*
22306F: drivers/watchdog/starfive-wdt.c22413F: drivers/watchdog/starfive-wdt.c
@@ -22382,6 +22489,12 @@ F: drivers/*/stm32-*timer* · 75 unmodified lines
22382F: drivers/pwm/pwm-stm32*22489F: drivers/pwm/pwm-stm32*
22383F: include/linux/*/stm32-*tim*22490F: include/linux/*/stm32-*tim*
22384 22491
22492STM32MP25 USB3/PCIE COMBOPHY DRIVER
22493M: Christian Bruel <christian.bruel@foss.st.com>
22494S: Maintained
22495F: Documentation/devicetree/bindings/phy/st,stm32mp25-combophy.yaml
22496F: drivers/phy/st/phy-stm32-combophy.c
22497
22385STMMAC ETHERNET DRIVER22498STMMAC ETHERNET DRIVER
22386M: Alexandre Torgue <alexandre.torgue@foss.st.com>22499M: Alexandre Torgue <alexandre.torgue@foss.st.com>
22387M: Jose Abreu <joabreu@synopsys.com>22500M: Jose Abreu <joabreu@synopsys.com>
@@ -23971,7 +24084,9 @@ F: drivers/ufs/host/*dwc* · 1583 unmodified lines
23971 24084
23972UNIVERSAL FLASH STORAGE HOST CONTROLLER DRIVER EXYNOS HOOKS24085UNIVERSAL FLASH STORAGE HOST CONTROLLER DRIVER EXYNOS HOOKS
23973M: Alim Akhtar <alim.akhtar@samsung.com>24086M: Alim Akhtar <alim.akhtar@samsung.com>
24087R: Peter Griffin <peter.griffin@linaro.org>
23974L: linux-scsi@vger.kernel.org24088L: linux-scsi@vger.kernel.org
24089L: linux-samsung-soc@vger.kernel.org
23975S: Maintained24090S: Maintained
23976F: drivers/ufs/host/ufs-exynos*24091F: drivers/ufs/host/ufs-exynos*
23977 24092
@@ -24298,6 +24413,13 @@ L: linux-usb@vger.kernel.org · 320 unmodified lines
24298S: Orphan24413S: Orphan
24299F: drivers/usb/typec/tcpm/24414F: drivers/usb/typec/tcpm/
24300 24415
24416USB TYPEC TUSB1046 MUX DRIVER
24417M: Romain Gantois <romain.gantois@bootlin.com>
24418L: linux-usb@vger.kernel.org
24419S: Maintained
24420F: Documentation/devicetree/bindings/usb/ti,tusb1046.yaml
24421F: drivers/usb/typec/mux/tusb1046.c
24422
24301USB UHCI DRIVER24423USB UHCI DRIVER
24302M: Alan Stern <stern@rowland.harvard.edu>24424M: Alan Stern <stern@rowland.harvard.edu>
24303L: linux-usb@vger.kernel.org24425L: linux-usb@vger.kernel.org
@@ -24851,6 +24973,18 @@ S: Maintained · 547 unmodified lines
24851F: drivers/input/serio/userio.c24973F: drivers/input/serio/userio.c
24852F: include/uapi/linux/userio.h24974F: include/uapi/linux/userio.h
24853 24975
24976VISHAY VEML3235 AMBIENT LIGHT SENSOR DRIVER
24977M: Javier Carrasco <javier.carrasco.cruz@gmail.com>
24978S: Maintained
24979F: Documentation/devicetree/bindings/iio/light/vishay,veml6030.yaml
24980F: drivers/iio/light/veml3235.c
24981
24982VISHAY VEML6030 AMBIENT LIGHT SENSOR DRIVER
24983M: Javier Carrasco <javier.carrasco.cruz@gmail.com>
24984S: Maintained
24985F: Documentation/devicetree/bindings/iio/light/vishay,veml6030.yaml
24986F: drivers/iio/light/veml6030.c
24987
24854VISHAY VEML6075 UVA AND UVB LIGHT SENSOR DRIVER24988VISHAY VEML6075 UVA AND UVB LIGHT SENSOR DRIVER
24855M: Javier Carrasco <javier.carrasco.cruz@gmail.com>24989M: Javier Carrasco <javier.carrasco.cruz@gmail.com>
24856S: Maintained24990S: Maintained
Makefile+152−97
@@ -1,8 +1,8 @@
1# SPDX-License-Identifier: GPL-2.01# SPDX-License-Identifier: GPL-2.0
2VERSION = 62VERSION = 6
3PATCHLEVEL = 123PATCHLEVEL = 13
4SUBLEVEL = 04SUBLEVEL = 0
5EXTRAVERSION =5EXTRAVERSION = -rc1
6NAME = Baby Opossum Posse6NAME = Baby Opossum Posse
7 7
8# *DOCUMENTATION*8# *DOCUMENTATION*
@@ -40,7 +40,7 @@ __all: · 31 unmodified lines
40 40
41this-makefile := $(lastword $(MAKEFILE_LIST))41this-makefile := $(lastword $(MAKEFILE_LIST))
42abs_srctree := $(realpath $(dir $(this-makefile)))42abs_srctree := $(realpath $(dir $(this-makefile)))
43abs_objtree := $(CURDIR)43abs_output := $(CURDIR)
44 44
45ifneq ($(sub_make_done),1)45ifneq ($(sub_make_done),1)
46 46
@@ -134,6 +134,10 @@ ifeq ("$(origin M)", "command line") · 87 unmodified lines
134 KBUILD_EXTMOD := $(M)134 KBUILD_EXTMOD := $(M)
135endif135endif
136 136
137ifeq ("$(origin MO)", "command line")
138 KBUILD_EXTMOD_OUTPUT := $(MO)
139endif
140
137$(if $(word 2, $(KBUILD_EXTMOD)), \141$(if $(word 2, $(KBUILD_EXTMOD)), \
138 $(error building multiple external modules is not supported))142 $(error building multiple external modules is not supported))
139 143
@@ -176,18 +180,41 @@ export KBUILD_EXTRA_WARN · 36 unmodified lines
176# The O= assignment takes precedence over the KBUILD_OUTPUT environment180# The O= assignment takes precedence over the KBUILD_OUTPUT environment
177# variable.181# variable.
178 182
179# Do we want to change the working directory?
180ifeq ("$(origin O)", "command line")183ifeq ("$(origin O)", "command line")
181 KBUILD_OUTPUT := $(O)184 KBUILD_OUTPUT := $(O)
182endif185endif
183 186
184ifneq ($(KBUILD_OUTPUT),)187ifdef KBUILD_EXTMOD
188 ifdef KBUILD_OUTPUT
189 objtree := $(realpath $(KBUILD_OUTPUT))
190 $(if $(objtree),,$(error specified kernel directory "$(KBUILD_OUTPUT)" does not exist))
191 else
192 objtree := $(abs_srctree)
193 endif
194 # If Make is invoked from the kernel directory (either kernel
195 # source directory or kernel build directory), external modules
196 # are built in $(KBUILD_EXTMOD) for backward compatibility,
197 # otherwise, built in the current directory.
198 output := $(or $(KBUILD_EXTMOD_OUTPUT),$(if $(filter $(CURDIR),$(objtree) $(abs_srctree)),$(KBUILD_EXTMOD)))
199 # KBUILD_EXTMOD might be a relative path. Remember its absolute path before
200 # Make changes the working directory.
201 srcroot := $(realpath $(KBUILD_EXTMOD))
202 $(if $(srcroot),,$(error specified external module directory "$(KBUILD_EXTMOD)" does not exist))
203else
204 objtree := .
205 output := $(KBUILD_OUTPUT)
206endif
207
208export objtree srcroot
209
210# Do we want to change the working directory?
211ifneq ($(output),)
185# $(realpath ...) gets empty if the path does not exist. Run 'mkdir -p' first.212# $(realpath ...) gets empty if the path does not exist. Run 'mkdir -p' first.
186$(shell mkdir -p "$(KBUILD_OUTPUT)")213$(shell mkdir -p "$(output)")
187# $(realpath ...) resolves symlinks214# $(realpath ...) resolves symlinks
188abs_objtree := $(realpath $(KBUILD_OUTPUT))215abs_output := $(realpath $(output))
189$(if $(abs_objtree),,$(error failed to create output directory "$(KBUILD_OUTPUT)"))216$(if $(abs_output),,$(error failed to create output directory "$(output)"))
190endif # ifneq ($(KBUILD_OUTPUT),)217endif
191 218
192ifneq ($(words $(subst :, ,$(abs_srctree))), 1)219ifneq ($(words $(subst :, ,$(abs_srctree))), 1)
193$(error source directory cannot contain spaces or colons)220$(error source directory cannot contain spaces or colons)
@@ -197,7 +224,7 @@ export sub_make_done := 1 · 3 unmodified lines
197 224
198endif # sub_make_done225endif # sub_make_done
199 226
200ifeq ($(abs_objtree),$(CURDIR))227ifeq ($(abs_output),$(CURDIR))
201# Suppress "Entering directory ..." if we are at the final work directory.228# Suppress "Entering directory ..." if we are at the final work directory.
202no-print-directory := --no-print-directory229no-print-directory := --no-print-directory
203else230else
@@ -221,43 +248,41 @@ $(filter-out $(this-makefile), $(MAKECMDGOALS)) __all: __sub-make · 17 unmodified lines
221 248
222# Invoke a second make in the output directory, passing relevant variables249# Invoke a second make in the output directory, passing relevant variables
223__sub-make:250__sub-make:
224 $(Q)$(MAKE) $(no-print-directory) -C $(abs_objtree) \251 $(Q)$(MAKE) $(no-print-directory) -C $(abs_output) \
225 -f $(abs_srctree)/Makefile $(MAKECMDGOALS)252 -f $(abs_srctree)/Makefile $(MAKECMDGOALS)
226 253
227else # need-sub-make254else # need-sub-make
228 255
229# We process the rest of the Makefile if this is the final invocation of make256# We process the rest of the Makefile if this is the final invocation of make
230 257
231ifeq ($(abs_srctree),$(abs_objtree))258ifndef KBUILD_EXTMOD
232 # building in the source tree259srcroot := $(abs_srctree)
233 srctree := .
234 building_out_of_srctree :=
235else
236 ifeq ($(abs_srctree)/,$(dir $(abs_objtree)))
237 # building in a subdirectory of the source tree
238 srctree := ..
239 else
240 srctree := $(abs_srctree)
241 endif
242 building_out_of_srctree := 1
243endif260endif
244 261
245ifneq ($(KBUILD_ABS_SRCTREE),)262ifeq ($(srcroot),$(CURDIR))
246srctree := $(abs_srctree)263building_out_of_srctree :=
264else
265export building_out_of_srctree := 1
247endif266endif
248 267
249objtree := .268ifdef KBUILD_ABS_SRCTREE
269 # Do nothing. Use the absolute path.
270else ifeq ($(srcroot),$(CURDIR))
271 # Building in the source.
272 srcroot := .
273else ifeq ($(srcroot)/,$(dir $(CURDIR)))
274 # Building in a subdirectory of the source.
275 srcroot := ..
276endif
250 277
251VPATH :=278export srctree := $(if $(KBUILD_EXTMOD),$(abs_srctree),$(srcroot))
252 279
253ifeq ($(KBUILD_EXTMOD),)
254ifdef building_out_of_srctree280ifdef building_out_of_srctree
255VPATH := $(srctree)281export VPATH := $(srcroot)
256endif282else
283VPATH :=
257endif284endif
258 285
259export building_out_of_srctree srctree objtree VPATH
260
261# To make sure we do not include .config for any of the *config targets286# To make sure we do not include .config for any of the *config targets
262# catch them early, and hand them over to scripts/kconfig/Makefile287# catch them early, and hand them over to scripts/kconfig/Makefile
263# It is allowed to specify more targets when calling make, including288# It is allowed to specify more targets when calling make, including
@@ -276,7 +301,7 @@ no-dot-config-targets := $(clean-targets) \ · 12 unmodified lines
276 outputmakefile rustavailable rustfmt rustfmtcheck301 outputmakefile rustavailable rustfmt rustfmtcheck
277no-sync-config-targets := $(no-dot-config-targets) %install modules_sign kernelrelease \302no-sync-config-targets := $(no-dot-config-targets) %install modules_sign kernelrelease \
278 image_name303 image_name
279single-targets := %.a %.i %.ko %.lds %.ll %.lst %.mod %.o %.rsi %.s %.symtypes %/304single-targets := %.a %.i %.ko %.lds %.ll %.lst %.mod %.o %.rsi %.s %/
280 305
281config-build :=306config-build :=
282mixed-build :=307mixed-build :=
@@ -354,7 +379,7 @@ else # !mixed-build · 71 unmodified lines
354include $(srctree)/scripts/Kbuild.include379include $(srctree)/scripts/Kbuild.include
355 380
356# Read KERNELRELEASE from include/config/kernel.release (if it exists)381# Read KERNELRELEASE from include/config/kernel.release (if it exists)
357KERNELRELEASE = $(call read-file, include/config/kernel.release)382KERNELRELEASE = $(call read-file, $(objtree)/include/config/kernel.release)
358KERNELVERSION = $(VERSION)$(if $(PATCHLEVEL),.$(PATCHLEVEL)$(if $(SUBLEVEL),.$(SUBLEVEL)))$(EXTRAVERSION)383KERNELVERSION = $(VERSION)$(if $(PATCHLEVEL),.$(PATCHLEVEL)$(if $(SUBLEVEL),.$(SUBLEVEL)))$(EXTRAVERSION)
359export VERSION PATCHLEVEL SUBLEVEL KERNELRELEASE KERNELVERSION384export VERSION PATCHLEVEL SUBLEVEL KERNELRELEASE KERNELVERSION
360 385
@@ -446,18 +471,23 @@ KBUILD_USERLDFLAGS := $(USERLDFLAGS) · 85 unmodified lines
446export rust_common_flags := --edition=2021 \471export rust_common_flags := --edition=2021 \
447 -Zbinary_dep_depinfo=y \472 -Zbinary_dep_depinfo=y \
448 -Astable_features \473 -Astable_features \
449 -Dunsafe_op_in_unsafe_fn \
450 -Dnon_ascii_idents \474 -Dnon_ascii_idents \
475 -Dunsafe_op_in_unsafe_fn \
476 -Wmissing_docs \
451 -Wrust_2018_idioms \477 -Wrust_2018_idioms \
452 -Wunreachable_pub \478 -Wunreachable_pub \
453 -Wmissing_docs \
454 -Wrustdoc::missing_crate_level_docs \
455 -Wclippy::all \479 -Wclippy::all \
480 -Wclippy::ignored_unit_patterns \
456 -Wclippy::mut_mut \481 -Wclippy::mut_mut \
457 -Wclippy::needless_bitwise_bool \482 -Wclippy::needless_bitwise_bool \
458 -Wclippy::needless_continue \483 -Wclippy::needless_continue \
484 -Aclippy::needless_lifetimes \
459 -Wclippy::no_mangle_with_rust_abi \485 -Wclippy::no_mangle_with_rust_abi \
460 -Wclippy::dbg_macro486 -Wclippy::undocumented_unsafe_blocks \
487 -Wclippy::unnecessary_safety_comment \
488 -Wclippy::unnecessary_safety_doc \
489 -Wrustdoc::missing_crate_level_docs \
490 -Wrustdoc::unescaped_backticks
461 491
462KBUILD_HOSTCFLAGS := $(KBUILD_USERHOSTCFLAGS) $(HOST_LFS_CFLAGS) \492KBUILD_HOSTCFLAGS := $(KBUILD_USERHOSTCFLAGS) $(HOST_LFS_CFLAGS) \
463 $(HOSTCFLAGS) -I $(srctree)/scripts/include493 $(HOSTCFLAGS) -I $(srctree)/scripts/include
@@ -508,7 +538,7 @@ KGZIP = gzip · 44 unmodified lines
508KBZIP2 = bzip2538KBZIP2 = bzip2
509KLZOP = lzop539KLZOP = lzop
510LZMA = lzma540LZMA = lzma
511LZ4 = lz4c541LZ4 = lz4
512XZ = xz542XZ = xz
513ZSTD = zstd543ZSTD = zstd
514 544
@@ -538,7 +568,7 @@ USERINCLUDE := \ · 23 unmodified lines
538LINUXINCLUDE := \568LINUXINCLUDE := \
539 -I$(srctree)/arch/$(SRCARCH)/include \569 -I$(srctree)/arch/$(SRCARCH)/include \
540 -I$(objtree)/arch/$(SRCARCH)/include/generated \570 -I$(objtree)/arch/$(SRCARCH)/include/generated \
541 $(if $(building_out_of_srctree),-I$(srctree)/include) \571 -I$(srctree)/include \
542 -I$(objtree)/include \572 -I$(objtree)/include \
543 $(USERINCLUDE)573 $(USERINCLUDE)
544 574
@@ -582,6 +612,9 @@ endif · 37 unmodified lines
582# Allows the usage of unstable features in stable compilers.612# Allows the usage of unstable features in stable compilers.
583export RUSTC_BOOTSTRAP := 1613export RUSTC_BOOTSTRAP := 1
584 614
615# Allows finding `.clippy.toml` in out-of-srctree builds.
616export CLIPPY_CONF_DIR := $(srctree)
617
585export ARCH SRCARCH CONFIG_SHELL BASH HOSTCC KBUILD_HOSTCFLAGS CROSS_COMPILE LD CC HOSTPKG_CONFIG618export ARCH SRCARCH CONFIG_SHELL BASH HOSTCC KBUILD_HOSTCFLAGS CROSS_COMPILE LD CC HOSTPKG_CONFIG
586export RUSTC RUSTDOC RUSTFMT RUSTC_OR_CLIPPY_QUIET RUSTC_OR_CLIPPY BINDGEN619export RUSTC RUSTDOC RUSTFMT RUSTC_OR_CLIPPY_QUIET RUSTC_OR_CLIPPY BINDGEN
587export HOSTRUSTC KBUILD_HOSTRUSTFLAGS620export HOSTRUSTC KBUILD_HOSTRUSTFLAGS
@@ -621,13 +654,25 @@ ifdef building_out_of_srctree · 33 unmodified lines
621# At the same time when output Makefile generated, generate .gitignore to654# At the same time when output Makefile generated, generate .gitignore to
622# ignore whole output directory655# ignore whole output directory
623 656
657ifdef KBUILD_EXTMOD
658print_env_for_makefile = \
659 echo "export KBUILD_OUTPUT = $(objtree)"; \
660 echo "export KBUILD_EXTMOD = $(realpath $(srcroot))" ; \
661 echo "export KBUILD_EXTMOD_OUTPUT = $(CURDIR)"
662else
663print_env_for_makefile = \
664 echo "export KBUILD_OUTPUT = $(CURDIR)"
665endif
666
624quiet_cmd_makefile = GEN Makefile667quiet_cmd_makefile = GEN Makefile
625 cmd_makefile = { \668 cmd_makefile = { \
626 echo "\# Automatically generated by $(srctree)/Makefile: don't edit"; \669 echo "\# Automatically generated by $(abs_srctree)/Makefile: don't edit"; \
627 echo "include $(srctree)/Makefile"; \670 $(print_env_for_makefile); \
671 echo "include $(abs_srctree)/Makefile"; \
628 } > Makefile672 } > Makefile
629 673
630outputmakefile:674outputmakefile:
675ifeq ($(KBUILD_EXTMOD),)
631 @if [ -f $(srctree)/.config -o \676 @if [ -f $(srctree)/.config -o \
632 -d $(srctree)/include/config -o \677 -d $(srctree)/include/config -o \
633 -d $(srctree)/arch/$(SRCARCH)/include/generated ]; then \678 -d $(srctree)/arch/$(SRCARCH)/include/generated ]; then \
@@ -637,7 +682,16 @@ outputmakefile: · 3 unmodified lines
637 echo >&2 "***"; \682 echo >&2 "***"; \
638 false; \683 false; \
639 fi684 fi
640 $(Q)ln -fsn $(srctree) source685else
686 @if [ -f $(srcroot)/modules.order ]; then \
687 echo >&2 "***"; \
688 echo >&2 "*** The external module source tree is not clean."; \
689 echo >&2 "*** Please run 'make -C $(abs_srctree) M=$(realpath $(srcroot)) clean'"; \
690 echo >&2 "***"; \
691 false; \
692 fi
693endif
694 $(Q)ln -fsn $(srcroot) source
641 $(call cmd,makefile)695 $(call cmd,makefile)
642 $(Q)test -e .gitignore || \696 $(Q)test -e .gitignore || \
643 { echo "# this is build directory, ignore it"; echo "*"; } > .gitignore697 { echo "# this is build directory, ignore it"; echo "*"; } > .gitignore
@@ -709,7 +763,7 @@ endif · 65 unmodified lines
709# in addition to whatever we do anyway.763# in addition to whatever we do anyway.
710# Just "make" or "make all" shall build modules as well764# Just "make" or "make all" shall build modules as well
711 765
712ifneq ($(filter all modules nsdeps %compile_commands.json clang-%,$(MAKECMDGOALS)),)766ifneq ($(filter all modules nsdeps compile_commands.json clang-%,$(MAKECMDGOALS)),)
713 KBUILD_MODULES := 1767 KBUILD_MODULES := 1
714endif768endif
715 769
@@ -720,7 +774,7 @@ endif · 4 unmodified lines
720export KBUILD_MODULES KBUILD_BUILTIN774export KBUILD_MODULES KBUILD_BUILTIN
721 775
722ifdef need-config776ifdef need-config
723include include/config/auto.conf777include $(objtree)/include/config/auto.conf
724endif778endif
725 779
726ifeq ($(KBUILD_EXTMOD),)780ifeq ($(KBUILD_EXTMOD),)
@@ -781,17 +835,22 @@ $(KCONFIG_CONFIG): · 54 unmodified lines
781else # !may-sync-config835else # !may-sync-config
782# External modules and some install targets need include/generated/autoconf.h836# External modules and some install targets need include/generated/autoconf.h
783# and include/config/auto.conf but do not care if they are up-to-date.837# and include/config/auto.conf but do not care if they are up-to-date.
784# Use auto.conf to trigger the test838# Use auto.conf to show the error message
785PHONY += include/config/auto.conf839
786 840checked-configs := $(addprefix $(objtree)/, include/generated/autoconf.h include/generated/rustc_cfg include/config/auto.conf)
787include/config/auto.conf:841missing-configs := $(filter-out $(wildcard $(checked-configs)), $(checked-configs))
788 @test -e include/generated/autoconf.h -a -e $@ || ( \842
789 echo >&2; \843ifdef missing-configs
790 echo >&2 " ERROR: Kernel configuration is invalid."; \844PHONY += $(objtree)/include/config/auto.conf
791 echo >&2 " include/generated/autoconf.h or $@ are missing.";\845
792 echo >&2 " Run 'make oldconfig && make prepare' on kernel src to fix it."; \846$(objtree)/include/config/auto.conf:
793 echo >&2 ; \847 @echo >&2 '***'
794 /bin/false)848 @echo >&2 '*** ERROR: Kernel configuration is invalid. The following files are missing:'
849 @printf >&2 '*** - %s\n' $(missing-configs)
850 @echo >&2 '*** Run "make oldconfig && make prepare" on kernel source to fix it.'
851 @echo >&2 '***'
852 @/bin/false
853endif
795 854
796endif # may-sync-config855endif # may-sync-config
797endif # need-config856endif # need-config
@@ -1005,8 +1064,10 @@ ifdef CONFIG_CC_IS_GCC · 207 unmodified lines
1005KBUILD_CFLAGS += -fconserve-stack1064KBUILD_CFLAGS += -fconserve-stack
1006endif1065endif
1007 1066
1008# change __FILE__ to the relative path from the srctree1067# change __FILE__ to the relative path to the source directory
1009KBUILD_CPPFLAGS += $(call cc-option,-fmacro-prefix-map=$(srctree)/=)1068ifdef building_out_of_srctree
1069KBUILD_CPPFLAGS += $(call cc-option,-fmacro-prefix-map=$(srcroot)/=)
1070endif
1010 1071
1011# include additional Makefiles when needed1072# include additional Makefiles when needed
1012include-y := scripts/Makefile.extrawarn1073include-y := scripts/Makefile.extrawarn
@@ -1018,6 +1079,8 @@ include-$(CONFIG_KMSAN) += scripts/Makefile.kmsan · 5 unmodified lines
1018include-$(CONFIG_UBSAN) += scripts/Makefile.ubsan1079include-$(CONFIG_UBSAN) += scripts/Makefile.ubsan
1019include-$(CONFIG_KCOV) += scripts/Makefile.kcov1080include-$(CONFIG_KCOV) += scripts/Makefile.kcov
1020include-$(CONFIG_RANDSTRUCT) += scripts/Makefile.randstruct1081include-$(CONFIG_RANDSTRUCT) += scripts/Makefile.randstruct
1082include-$(CONFIG_AUTOFDO_CLANG) += scripts/Makefile.autofdo
1083include-$(CONFIG_PROPELLER_CLANG) += scripts/Makefile.propeller
1021include-$(CONFIG_GCC_PLUGINS) += scripts/Makefile.gcc-plugins1084include-$(CONFIG_GCC_PLUGINS) += scripts/Makefile.gcc-plugins
1022 1085
1023include $(addprefix $(srctree)/, $(include-y))1086include $(addprefix $(srctree)/, $(include-y))
@@ -1098,10 +1161,6 @@ export MODLIB · 74 unmodified lines
1098 1161
1099PHONY += prepare01162PHONY += prepare0
1100 1163
1101export extmod_prefix = $(if $(KBUILD_EXTMOD),$(KBUILD_EXTMOD)/)
1102export MODORDER := $(extmod_prefix)modules.order
1103export MODULES_NSDEPS := $(extmod_prefix)modules.nsdeps
1104
1105ifeq ($(KBUILD_EXTMOD),)1164ifeq ($(KBUILD_EXTMOD),)
1106 1165
1107build-dir := .1166build-dir := .
@@ -1196,7 +1255,8 @@ PHONY += prepare archprepare · 88 unmodified lines
1196 1255
1197archprepare: outputmakefile archheaders archscripts scripts include/config/kernel.release \1256archprepare: outputmakefile archheaders archscripts scripts include/config/kernel.release \
1198 asm-generic $(version_h) include/generated/utsrelease.h \1257 asm-generic $(version_h) include/generated/utsrelease.h \
1199 include/generated/compile.h include/generated/autoconf.h remove-stale-files1258 include/generated/compile.h include/generated/autoconf.h \
1259 include/generated/rustc_cfg remove-stale-files
1200 1260
1201prepare0: archprepare1261prepare0: archprepare
1202 $(Q)$(MAKE) $(build)=scripts/mod1262 $(Q)$(MAKE) $(build)=scripts/mod
@@ -1427,6 +1487,10 @@ ifdef CONFIG_OF_EARLY_FLATTREE · 224 unmodified lines
1427all: dtbs1487all: dtbs
1428endif1488endif
1429 1489
1490ifdef CONFIG_GENERIC_BUILTIN_DTB
1491vmlinux: dtbs
1492endif
1493
1430endif1494endif
1431 1495
1432PHONY += scripts_dtc1496PHONY += scripts_dtc
@@ -1494,7 +1558,8 @@ CLEAN_FILES += vmlinux.symvers modules-only.symvers \ · 61 unmodified lines
1494 modules.builtin modules.builtin.modinfo modules.nsdeps \1558 modules.builtin modules.builtin.modinfo modules.nsdeps \
1495 modules.builtin.ranges vmlinux.o.map \1559 modules.builtin.ranges vmlinux.o.map \
1496 compile_commands.json rust/test \1560 compile_commands.json rust/test \
1497 rust-project.json .vmlinux.objs .vmlinux.export.c1561 rust-project.json .vmlinux.objs .vmlinux.export.c \
1562 .builtin-dtbs-list .builtin-dtb.S
1498 1563
1499# Directories & files removed with 'make mrproper'1564# Directories & files removed with 'make mrproper'
1500MRPROPER_FILES += include/config include/generated \1565MRPROPER_FILES += include/config include/generated \
@@ -1602,7 +1667,6 @@ help: · 101 unmodified lines
1602 @echo ' with a stack size larger than MINSTACKSIZE (default: 100)'1667 @echo ' with a stack size larger than MINSTACKSIZE (default: 100)'
1603 @echo ' versioncheck - Sanity check on version.h usage'1668 @echo ' versioncheck - Sanity check on version.h usage'
1604 @echo ' includecheck - Check for duplicate included header files'1669 @echo ' includecheck - Check for duplicate included header files'
1605 @echo ' export_report - List the usages of all exported symbols'
1606 @echo ' headerdep - Detect inclusion cycles in headers'1670 @echo ' headerdep - Detect inclusion cycles in headers'
1607 @echo ' coccicheck - Check with Coccinelle'1671 @echo ' coccicheck - Check with Coccinelle'
1608 @echo ' clang-analyzer - Check with clang static analyzer'1672 @echo ' clang-analyzer - Check with clang static analyzer'
@@ -1743,18 +1807,9 @@ rusttest: prepare · 134 unmodified lines
1743# Formatting targets1807# Formatting targets
1744PHONY += rustfmt rustfmtcheck1808PHONY += rustfmt rustfmtcheck
1745 1809
1746# We skip `rust/alloc` since we want to minimize the diff w.r.t. upstream.
1747#
1748# We match using absolute paths since `find` does not resolve them
1749# when matching, which is a problem when e.g. `srctree` is `..`.
1750# We `grep` afterwards in order to remove the directory entry itself.
1751rustfmt:1810rustfmt:
1752 $(Q)find $(abs_srctree) -type f -name '*.rs' \1811 $(Q)find $(srctree) $(RCS_FIND_IGNORE) \
1753 -o -path $(abs_srctree)/rust/alloc -prune \1812 -type f -a -name '*.rs' -a ! -name '*generated*' -print \
1754 -o -path $(abs_objtree)/rust/test -prune \
1755 | grep -Fv $(abs_srctree)/rust/alloc \
1756 | grep -Fv $(abs_objtree)/rust/test \
1757 | grep -Fv generated \
1758 | xargs $(RUSTFMT) $(rustfmt_flags)1813 | xargs $(RUSTFMT) $(rustfmt_flags)
1759 1814
1760rustfmtcheck: rustfmt_flags = --check1815rustfmtcheck: rustfmt_flags = --check
@@ -1793,14 +1848,10 @@ filechk_kernel.release = echo $(KERNELRELEASE) · 32 unmodified lines
1793KBUILD_BUILTIN :=1848KBUILD_BUILTIN :=
1794KBUILD_MODULES := 11849KBUILD_MODULES := 1
1795 1850
1796build-dir := $(KBUILD_EXTMOD)1851build-dir := .
1797 1852
1798compile_commands.json: $(extmod_prefix)compile_commands.json1853clean-dirs := .
1799PHONY += compile_commands.json1854clean: private rm-files := Module.symvers modules.nsdeps compile_commands.json
1800
1801clean-dirs := $(KBUILD_EXTMOD)
1802clean: private rm-files := $(KBUILD_EXTMOD)/Module.symvers $(KBUILD_EXTMOD)/modules.nsdeps \
1803 $(KBUILD_EXTMOD)/compile_commands.json
1804 1855
1805PHONY += prepare1856PHONY += prepare
1806# now expand this into a simple variable to reduce the cost of shell evaluations1857# now expand this into a simple variable to reduce the cost of shell evaluations
@@ -1859,7 +1910,7 @@ endif · 52 unmodified lines
1859 1910
1860ifdef CONFIG_MODULES1911ifdef CONFIG_MODULES
1861 1912
1862$(MODORDER): $(build-dir)1913modules.order: $(build-dir)
1863 @:1914 @:
1864 1915
1865# KBUILD_MODPOST_NOFINAL can be set to skip the final link of modules.1916# KBUILD_MODPOST_NOFINAL can be set to skip the final link of modules.
@@ -1870,7 +1921,7 @@ ifneq ($(KBUILD_MODPOST_NOFINAL),1) · 4 unmodified lines
1870endif1921endif
1871 1922
1872PHONY += modules_check1923PHONY += modules_check
1873modules_check: $(MODORDER)1924modules_check: modules.order
1874 $(Q)$(CONFIG_SHELL) $(srctree)/scripts/modules-check.sh $<1925 $(Q)$(CONFIG_SHELL) $(srctree)/scripts/modules-check.sh $<
1875 1926
1876else # CONFIG_MODULES1927else # CONFIG_MODULES
@@ -1911,15 +1962,15 @@ $(single-ko): single_modules · 34 unmodified lines
1911$(single-no-ko): $(build-dir)1962$(single-no-ko): $(build-dir)
1912 @:1963 @:
1913 1964
1914# Remove MODORDER when done because it is not the real one.1965# Remove modules.order when done because it is not the real one.
1915PHONY += single_modules1966PHONY += single_modules
1916single_modules: $(single-no-ko) modules_prepare1967single_modules: $(single-no-ko) modules_prepare
1917 $(Q){ $(foreach m, $(single-ko), echo $(extmod_prefix)$(m:%.ko=%.o);) } > $(MODORDER)1968 $(Q){ $(foreach m, $(single-ko), echo $(m:%.ko=%.o);) } > modules.order
1918 $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modpost1969 $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modpost
1919ifneq ($(KBUILD_MODPOST_NOFINAL),1)1970ifneq ($(KBUILD_MODPOST_NOFINAL),1)
1920 $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modfinal1971 $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modfinal
1921endif1972endif
1922 $(Q)rm -f $(MODORDER)1973 $(Q)rm -f modules.order
1923 1974
1924single-goals := $(addprefix $(build-dir)/, $(single-no-ko))1975single-goals := $(addprefix $(build-dir)/, $(single-no-ko))
1925 1976
@@ -1927,6 +1978,8 @@ KBUILD_MODULES := 1 · 1 unmodified line
1927 1978
1928endif1979endif
1929 1980
1981prepare: outputmakefile
1982
1930# Preset locale variables to speed up the build process. Limit locale1983# Preset locale variables to speed up the build process. Limit locale
1931# tweaks to this spot to avoid wrong language settings when running1984# tweaks to this spot to avoid wrong language settings when running
1932# make menuconfig etc.1985# make menuconfig etc.
@@ -1942,7 +1995,7 @@ $(clean-dirs): · 9 unmodified lines
1942 1995
1943clean: $(clean-dirs)1996clean: $(clean-dirs)
1944 $(call cmd,rmfiles)1997 $(call cmd,rmfiles)
1945 @find $(or $(KBUILD_EXTMOD), .) $(RCS_FIND_IGNORE) \1998 @find . $(RCS_FIND_IGNORE) \
1946 \( -name '*.[aios]' -o -name '*.rsi' -o -name '*.ko' -o -name '.*.cmd' \1999 \( -name '*.[aios]' -o -name '*.rsi' -o -name '*.ko' -o -name '.*.cmd' \
1947 -o -name '*.ko.*' \2000 -o -name '*.ko.*' \
1948 -o -name '*.dtb' -o -name '*.dtbo' \2001 -o -name '*.dtb' -o -name '*.dtbo' \
@@ -1975,7 +2028,12 @@ tags TAGS cscope gtags: FORCE · 26 unmodified lines
1975PHONY += rust-analyzer2028PHONY += rust-analyzer
1976rust-analyzer:2029rust-analyzer:
1977 +$(Q)$(CONFIG_SHELL) $(srctree)/scripts/rust_is_available.sh2030 +$(Q)$(CONFIG_SHELL) $(srctree)/scripts/rust_is_available.sh
2031ifdef KBUILD_EXTMOD
2032# FIXME: external modules must not descend into a sub-directory of the kernel
2033 $(Q)$(MAKE) $(build)=$(objtree)/rust src=$(srctree)/rust $@
2034else
1978 $(Q)$(MAKE) $(build)=rust $@2035 $(Q)$(MAKE) $(build)=rust $@
2036endif
1979 2037
1980# Script to generate missing namespace dependencies2038# Script to generate missing namespace dependencies
1981# ---------------------------------------------------------------------------2039# ---------------------------------------------------------------------------
@@ -1991,12 +2049,12 @@ nsdeps: modules · 9 unmodified lines
1991quiet_cmd_gen_compile_commands = GEN $@2049quiet_cmd_gen_compile_commands = GEN $@
1992 cmd_gen_compile_commands = $(PYTHON3) $< -a $(AR) -o $@ $(filter-out $<, $(real-prereqs))2050 cmd_gen_compile_commands = $(PYTHON3) $< -a $(AR) -o $@ $(filter-out $<, $(real-prereqs))
1993 2051
1994$(extmod_prefix)compile_commands.json: $(srctree)/scripts/clang-tools/gen_compile_commands.py \2052compile_commands.json: $(srctree)/scripts/clang-tools/gen_compile_commands.py \
1995 $(if $(KBUILD_EXTMOD),, vmlinux.a $(KBUILD_VMLINUX_LIBS)) \2053 $(if $(KBUILD_EXTMOD),, vmlinux.a $(KBUILD_VMLINUX_LIBS)) \
1996 $(if $(CONFIG_MODULES), $(MODORDER)) FORCE2054 $(if $(CONFIG_MODULES), modules.order) FORCE
1997 $(call if_changed,gen_compile_commands)2055 $(call if_changed,gen_compile_commands)
1998 2056
1999targets += $(extmod_prefix)compile_commands.json2057targets += compile_commands.json
2000 2058
2001PHONY += clang-tidy clang-analyzer2059PHONY += clang-tidy clang-analyzer
2002 2060
@@ -2004,7 +2062,7 @@ ifdef CONFIG_CC_IS_CLANG · 1 unmodified line
2004quiet_cmd_clang_tools = CHECK $<2062quiet_cmd_clang_tools = CHECK $<
2005 cmd_clang_tools = $(PYTHON3) $(srctree)/scripts/clang-tools/run-clang-tools.py $@ $<2063 cmd_clang_tools = $(PYTHON3) $(srctree)/scripts/clang-tools/run-clang-tools.py $@ $<
2006 2064
2007clang-tidy clang-analyzer: $(extmod_prefix)compile_commands.json2065clang-tidy clang-analyzer: compile_commands.json
2008 $(call cmd,clang_tools)2066 $(call cmd,clang_tools)
2009else2067else
2010clang-tidy clang-analyzer:2068clang-tidy clang-analyzer:
@@ -2015,7 +2073,7 @@ endif · 4 unmodified lines
2015# Scripts to check various things for consistency2073# Scripts to check various things for consistency
2016# ---------------------------------------------------------------------------2074# ---------------------------------------------------------------------------
2017 2075
2018PHONY += includecheck versioncheck coccicheck export_report2076PHONY += includecheck versioncheck coccicheck
2019 2077
2020includecheck:2078includecheck:
2021 find $(srctree)/* $(RCS_FIND_IGNORE) \2079 find $(srctree)/* $(RCS_FIND_IGNORE) \
@@ -2030,9 +2088,6 @@ versioncheck: · 8 unmodified lines
2030coccicheck:2088coccicheck:
2031 $(Q)$(BASH) $(srctree)/scripts/$@2089 $(Q)$(BASH) $(srctree)/scripts/$@
2032 2090
2033export_report:
2034 $(PERL) $(srctree)/scripts/export_report.pl
2035
2036PHONY += checkstack kernelrelease kernelversion image_name2091PHONY += checkstack kernelrelease kernelversion image_name
2037 2092
2038# UML needs a little special treatment here. It wants to use the host2093# UML needs a little special treatment here. It wants to use the host
arch/Kconfig+39−0
@@ -812,6 +812,45 @@ config LTO_CLANG_THIN · 811 unmodified lines
812 If unsure, say Y.812 If unsure, say Y.
813endchoice813endchoice
814 814
815config ARCH_SUPPORTS_AUTOFDO_CLANG
816 bool
817
818config AUTOFDO_CLANG
819 bool "Enable Clang's AutoFDO build (EXPERIMENTAL)"
820 depends on ARCH_SUPPORTS_AUTOFDO_CLANG
821 depends on CC_IS_CLANG && CLANG_VERSION >= 170000
822 help
823 This option enables Clang’s AutoFDO build. When
824 an AutoFDO profile is specified in variable
825 CLANG_AUTOFDO_PROFILE during the build process,
826 Clang uses the profile to optimize the kernel.
827
828 If no profile is specified, AutoFDO options are
829 still passed to Clang to facilitate the collection
830 of perf data for creating an AutoFDO profile in
831 subsequent builds.
832
833 If unsure, say N.
834
835config ARCH_SUPPORTS_PROPELLER_CLANG
836 bool
837
838config PROPELLER_CLANG
839 bool "Enable Clang's Propeller build"
840 depends on ARCH_SUPPORTS_PROPELLER_CLANG
841 depends on CC_IS_CLANG && CLANG_VERSION >= 190000
842 help
843 This option enables Clang’s Propeller build. When the Propeller
844 profiles is specified in variable CLANG_PROPELLER_PROFILE_PREFIX
845 during the build process, Clang uses the profiles to optimize
846 the kernel.
847
848 If no profile is specified, Propeller options are still passed
849 to Clang to facilitate the collection of perf data for creating
850 the Propeller profiles in subsequent builds.
851
852 If unsure, say N.
853
815config ARCH_SUPPORTS_CFI_CLANG854config ARCH_SUPPORTS_CFI_CLANG
816 bool855 bool
817 help856 help
arch/alpha/include/asm/spinlock_types.h+1−1
@@ -3,7 +3,7 @@ · 2 unmodified lines
3#define _ALPHA_SPINLOCK_TYPES_H3#define _ALPHA_SPINLOCK_TYPES_H
4 4
5#ifndef __LINUX_SPINLOCK_TYPES_RAW_H5#ifndef __LINUX_SPINLOCK_TYPES_RAW_H
6# error "please don't include this file directly"6# error "Please do not include this file directly."
7#endif7#endif
8 8
9typedef struct {9typedef struct {
arch/alpha/kernel/pci-sysfs.c+3−3
@@ -64,7 +64,7 @@ static int __pci_mmap_fits(struct pci_dev *pdev, int num, · 63 unmodified lines
64 * Return: %0 on success, negative error code otherwise64 * Return: %0 on success, negative error code otherwise
65 */65 */
66static int pci_mmap_resource(struct kobject *kobj,66static int pci_mmap_resource(struct kobject *kobj,
67 struct bin_attribute *attr,67 const struct bin_attribute *attr,
68 struct vm_area_struct *vma, int sparse)68 struct vm_area_struct *vma, int sparse)
69{69{
70 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));70 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
@@ -93,14 +93,14 @@ static int pci_mmap_resource(struct kobject *kobj, · 22 unmodified lines
93}93}
94 94
95static int pci_mmap_resource_sparse(struct file *filp, struct kobject *kobj,95static int pci_mmap_resource_sparse(struct file *filp, struct kobject *kobj,
96 struct bin_attribute *attr,96 const struct bin_attribute *attr,
97 struct vm_area_struct *vma)97 struct vm_area_struct *vma)
98{98{
99 return pci_mmap_resource(kobj, attr, vma, 1);99 return pci_mmap_resource(kobj, attr, vma, 1);
100}100}
101 101
102static int pci_mmap_resource_dense(struct file *filp, struct kobject *kobj,102static int pci_mmap_resource_dense(struct file *filp, struct kobject *kobj,
103 struct bin_attribute *attr,103 const struct bin_attribute *attr,
104 struct vm_area_struct *vma)104 struct vm_area_struct *vma)
105{105{
106 return pci_mmap_resource(kobj, attr, vma, 0);106 return pci_mmap_resource(kobj, attr, vma, 0);
arch/arm/Makefile+2−2
@@ -264,13 +264,13 @@ stack_protector_prepare: prepare0 · 263 unmodified lines
264 -mstack-protector-guard=tls \264 -mstack-protector-guard=tls \
265 -mstack-protector-guard-offset=$(shell \265 -mstack-protector-guard-offset=$(shell \
266 awk '{if ($$2 == "TSK_STACK_CANARY") print $$3;}'\266 awk '{if ($$2 == "TSK_STACK_CANARY") print $$3;}'\
267 include/generated/asm-offsets.h))267 $(objtree)/include/generated/asm-offsets.h))
268else268else
269stack_protector_prepare: prepare0269stack_protector_prepare: prepare0
270 $(eval SSP_PLUGIN_CFLAGS := \270 $(eval SSP_PLUGIN_CFLAGS := \
271 -fplugin-arg-arm_ssp_per_task_plugin-offset=$(shell \271 -fplugin-arg-arm_ssp_per_task_plugin-offset=$(shell \
272 awk '{if ($$2 == "TSK_STACK_CANARY") print $$3;}'\272 awk '{if ($$2 == "TSK_STACK_CANARY") print $$3;}'\
273 include/generated/asm-offsets.h))273 $(objtree)/include/generated/asm-offsets.h))
274 $(eval KBUILD_CFLAGS += $(SSP_PLUGIN_CFLAGS))274 $(eval KBUILD_CFLAGS += $(SSP_PLUGIN_CFLAGS))
275 $(eval GCC_PLUGINS_CFLAGS += $(SSP_PLUGIN_CFLAGS))275 $(eval GCC_PLUGINS_CFLAGS += $(SSP_PLUGIN_CFLAGS))
276endif276endif
arch/arm/common/locomo.c+1−1
@@ -516,7 +516,7 @@ static void locomo_remove(struct platform_device *dev) · 515 unmodified lines
516 */516 */
517static struct platform_driver locomo_device_driver = {517static struct platform_driver locomo_device_driver = {
518 .probe = locomo_probe,518 .probe = locomo_probe,
519 .remove_new = locomo_remove,519 .remove = locomo_remove,
520#ifdef CONFIG_PM520#ifdef CONFIG_PM
521 .suspend = locomo_suspend,521 .suspend = locomo_suspend,
522 .resume = locomo_resume,522 .resume = locomo_resume,
arch/arm/common/sa1111.c+1−1
@@ -1154,7 +1154,7 @@ static struct dev_pm_ops sa1111_pm_ops = { · 1153 unmodified lines
1154 */1154 */
1155static struct platform_driver sa1111_device_driver = {1155static struct platform_driver sa1111_device_driver = {
1156 .probe = sa1111_probe,1156 .probe = sa1111_probe,
1157 .remove_new = sa1111_remove,1157 .remove = sa1111_remove,
1158 .driver = {1158 .driver = {
1159 .name = "sa1111",1159 .name = "sa1111",
1160 .pm = &sa1111_pm_ops,1160 .pm = &sa1111_pm_ops,
arch/arm/common/scoop.c+1−1
@@ -250,7 +250,7 @@ static void scoop_remove(struct platform_device *pdev) · 249 unmodified lines
250 250
251static struct platform_driver scoop_driver = {251static struct platform_driver scoop_driver = {
252 .probe = scoop_probe,252 .probe = scoop_probe,
253 .remove_new = scoop_remove,253 .remove = scoop_remove,
254 .suspend = scoop_suspend,254 .suspend = scoop_suspend,
255 .resume = scoop_resume,255 .resume = scoop_resume,
256 .driver = {256 .driver = {
arch/arm/include/asm/jump_label.h+9−5
@@ -9,13 +9,17 @@ · 8 unmodified lines
9 9
10#define JUMP_LABEL_NOP_SIZE 410#define JUMP_LABEL_NOP_SIZE 4
11 11
12/* This macro is also expanded on the Rust side. */
13#define ARCH_STATIC_BRANCH_ASM(key, label) \
14 "1:\n\t" \
15 WASM(nop) "\n\t" \
16 ".pushsection __jump_table, \"aw\"\n\t" \
17 ".word 1b, " label ", " key "\n\t" \
18 ".popsection\n\t" \
19
12static __always_inline bool arch_static_branch(struct static_key *key, bool branch)20static __always_inline bool arch_static_branch(struct static_key *key, bool branch)
13{21{
14 asm goto("1:\n\t"22 asm goto(ARCH_STATIC_BRANCH_ASM("%c0", "%l[l_yes]")
15 WASM(nop) "\n\t"
16 ".pushsection __jump_table, \"aw\"\n\t"
17 ".word 1b, %l[l_yes], %c0\n\t"
18 ".popsection\n\t"
19 : : "i" (&((char *)key)[branch]) : : l_yes);23 : : "i" (&((char *)key)[branch]) : : l_yes);
20 24
21 return false;25 return false;
arch/arm/include/asm/spinlock_types.h+1−1
@@ -3,7 +3,7 @@ · 2 unmodified lines
3#define __ASM_SPINLOCK_TYPES_H3#define __ASM_SPINLOCK_TYPES_H
4 4
5#ifndef __LINUX_SPINLOCK_TYPES_RAW_H5#ifndef __LINUX_SPINLOCK_TYPES_RAW_H
6# error "please don't include this file directly"6# error "Please do not include this file directly."
7#endif7#endif
8 8
9#define TICKET_SHIFT 169#define TICKET_SHIFT 16
arch/arm/kernel/entry-armv.S+8−0
@@ -25,6 +25,7 @@ · 24 unmodified lines
25#include <asm/tls.h>25#include <asm/tls.h>
26#include <asm/system_info.h>26#include <asm/system_info.h>
27#include <asm/uaccess-asm.h>27#include <asm/uaccess-asm.h>
28#include <asm/kasan_def.h>
28 29
29#include "entry-header.S"30#include "entry-header.S"
30#include <asm/probes.h>31#include <asm/probes.h>
@@ -561,6 +562,13 @@ ENTRY(__switch_to) · 530 unmodified lines
561 @ entries covering the vmalloc region.562 @ entries covering the vmalloc region.
562 @563 @
563 ldr r2, [ip]564 ldr r2, [ip]
565#ifdef CONFIG_KASAN_VMALLOC
566 @ Also dummy read from the KASAN shadow memory for the new stack if we
567 @ are using KASAN
568 mov_l r2, KASAN_SHADOW_OFFSET
569 add r2, r2, ip, lsr #KASAN_SHADOW_SCALE_SHIFT
570 ldr r2, [r2]
571#endif
564#endif572#endif
565 573
566 @ When CONFIG_THREAD_INFO_IN_TASK=n, the update of SP itself is what574 @ When CONFIG_THREAD_INFO_IN_TASK=n, the update of SP itself is what
arch/arm/mach-imx/Kconfig+0−16
@@ -6,7 +6,6 @@ menuconfig ARCH_MXC · 5 unmodified lines
6 select CLKSRC_IMX_GPT6 select CLKSRC_IMX_GPT
7 select GENERIC_IRQ_CHIP7 select GENERIC_IRQ_CHIP
8 select GPIOLIB8 select GPIOLIB
9 select PINCTRL
10 select PM_OPP if PM9 select PM_OPP if PM
11 select SOC_BUS10 select SOC_BUS
12 select SRAM11 select SRAM
@@ -49,7 +48,6 @@ config SOC_IMX31 · 36 unmodified lines
49config SOC_IMX3548config SOC_IMX35
50 bool "i.MX35 support"49 bool "i.MX35 support"
51 select MXC_AVIC50 select MXC_AVIC
52 select PINCTRL_IMX35
53 help51 help
54 This enables support for Freescale i.MX35 processor52 This enables support for Freescale i.MX35 processor
55 53
@@ -61,7 +59,6 @@ config SOC_IMX1 · 5 unmodified lines
61 bool "i.MX1 support"59 bool "i.MX1 support"
62 select CPU_ARM920T60 select CPU_ARM920T
63 select MXC_AVIC61 select MXC_AVIC
64 select PINCTRL_IMX1
65 help62 help
66 This enables support for Freescale i.MX1 processor63 This enables support for Freescale i.MX1 processor
67 64
@@ -73,7 +70,6 @@ config SOC_IMX25 · 5 unmodified lines
73 bool "i.MX25 support"70 bool "i.MX25 support"
74 select CPU_ARM926T71 select CPU_ARM926T
75 select MXC_AVIC72 select MXC_AVIC
76 select PINCTRL_IMX25
77 help73 help
78 This enables support for Freescale i.MX25 processor74 This enables support for Freescale i.MX25 processor
79 75
@@ -81,7 +77,6 @@ config SOC_IMX27 · 1 unmodified line
81 bool "i.MX27 support"77 bool "i.MX27 support"
82 select CPU_ARM926T78 select CPU_ARM926T
83 select MXC_AVIC79 select MXC_AVIC
84 select PINCTRL_IMX27
85 help80 help
86 This enables support for Freescale i.MX27 processor81 This enables support for Freescale i.MX27 processor
87 82
@@ -98,7 +93,6 @@ config SOC_IMX5 · 10 unmodified lines
98 93
99config SOC_IMX5094config SOC_IMX50
100 bool "i.MX50 support"95 bool "i.MX50 support"
101 select PINCTRL_IMX50
102 select SOC_IMX596 select SOC_IMX5
103 97
104 help98 help
@@ -106,14 +100,12 @@ config SOC_IMX50 · 1 unmodified line
106 100
107config SOC_IMX51101config SOC_IMX51
108 bool "i.MX51 support"102 bool "i.MX51 support"
109 select PINCTRL_IMX51
110 select SOC_IMX5103 select SOC_IMX5
111 help104 help
112 This enables support for Freescale i.MX51 processor105 This enables support for Freescale i.MX51 processor
113 106
114config SOC_IMX53107config SOC_IMX53
115 bool "i.MX53 support"108 bool "i.MX53 support"
116 select PINCTRL_IMX53
117 select SOC_IMX5109 select SOC_IMX5
118 110
119 help111 help
@@ -137,7 +129,6 @@ config SOC_IMX6Q · 17 unmodified lines
137 select ARM_ERRATA_775420129 select ARM_ERRATA_775420
138 select HAVE_ARM_SCU if SMP130 select HAVE_ARM_SCU if SMP
139 select HAVE_ARM_TWD131 select HAVE_ARM_TWD
140 select PINCTRL_IMX6Q
141 select SOC_IMX6132 select SOC_IMX6
142 133
143 help134 help
@@ -147,7 +138,6 @@ config SOC_IMX6SL · 3 unmodified lines
147 bool "i.MX6 SoloLite support"138 bool "i.MX6 SoloLite support"
148 select ARM_ERRATA_754322139 select ARM_ERRATA_754322
149 select ARM_ERRATA_775420140 select ARM_ERRATA_775420
150 select PINCTRL_IMX6SL
151 select SOC_IMX6141 select SOC_IMX6
152 142
153 help143 help
@@ -157,7 +147,6 @@ config SOC_IMX6SLL · 3 unmodified lines
157 bool "i.MX6 SoloLiteLite support"147 bool "i.MX6 SoloLiteLite support"
158 select ARM_ERRATA_754322148 select ARM_ERRATA_754322
159 select ARM_ERRATA_775420149 select ARM_ERRATA_775420
160 select PINCTRL_IMX6SLL
161 select SOC_IMX6150 select SOC_IMX6
162 151
163 help152 help
@@ -167,7 +156,6 @@ config SOC_IMX6SX · 3 unmodified lines
167 bool "i.MX6 SoloX support"156 bool "i.MX6 SoloX support"
168 select ARM_ERRATA_754322157 select ARM_ERRATA_754322
169 select ARM_ERRATA_775420158 select ARM_ERRATA_775420
170 select PINCTRL_IMX6SX
171 select SOC_IMX6159 select SOC_IMX6
172 160
173 help161 help
@@ -175,7 +163,6 @@ config SOC_IMX6SX · 1 unmodified line
175 163
176config SOC_IMX6UL164config SOC_IMX6UL
177 bool "i.MX6 UltraLite support"165 bool "i.MX6 UltraLite support"
178 select PINCTRL_IMX6UL
179 select SOC_IMX6166 select SOC_IMX6
180 select ARM_ERRATA_814220167 select ARM_ERRATA_814220
181 168
@@ -211,7 +198,6 @@ config SOC_IMX7D_CM4 · 29 unmodified lines
211 198
212config SOC_IMX7D199config SOC_IMX7D
213 bool "i.MX7 Dual support"200 bool "i.MX7 Dual support"
214 select PINCTRL_IMX7D
215 select SOC_IMX7D_CA7 if ARCH_MULTI_V7201 select SOC_IMX7D_CA7 if ARCH_MULTI_V7
216 select SOC_IMX7D_CM4 if ARM_SINGLE_ARMV7M202 select SOC_IMX7D_CM4 if ARM_SINGLE_ARMV7M
217 select ARM_ERRATA_814220 if ARCH_MULTI_V7203 select ARM_ERRATA_814220 if ARCH_MULTI_V7
@@ -221,7 +207,6 @@ config SOC_IMX7D · 3 unmodified lines
221config SOC_IMX7ULP207config SOC_IMX7ULP
222 bool "i.MX7ULP support"208 bool "i.MX7ULP support"
223 select CLKSRC_IMX_TPM209 select CLKSRC_IMX_TPM
224 select PINCTRL_IMX7ULP
225 select SOC_IMX7D_CA7 if ARCH_MULTI_V7210 select SOC_IMX7D_CA7 if ARCH_MULTI_V7
226 select SOC_IMX7D_CM4 if ARM_SINGLE_ARMV7M211 select SOC_IMX7D_CM4 if ARM_SINGLE_ARMV7M
227 help212 help
@@ -237,7 +222,6 @@ config SOC_IMXRT · 9 unmodified lines
237config SOC_VF610222config SOC_VF610
238 bool "Vybrid Family VF610 support"223 bool "Vybrid Family VF610 support"
239 select ARM_GIC if ARCH_MULTI_V7224 select ARM_GIC if ARCH_MULTI_V7
240 select PINCTRL_VF610
241 225
242 help226 help
243 This enables support for Freescale Vybrid VF610 processor.227 This enables support for Freescale Vybrid VF610 processor.
arch/arm/mach-imx/mmdc.c+1−1
@@ -596,7 +596,7 @@ static struct platform_driver imx_mmdc_driver = { · 595 unmodified lines
596 .of_match_table = imx_mmdc_dt_ids,596 .of_match_table = imx_mmdc_dt_ids,
597 },597 },
598 .probe = imx_mmdc_probe,598 .probe = imx_mmdc_probe,
599 .remove_new = imx_mmdc_remove,599 .remove = imx_mmdc_remove,
600};600};
601 601
602static int __init imx_mmdc_init(void)602static int __init imx_mmdc_init(void)
arch/arm/mach-omap1/omap-dma.c+1−1
@@ -832,7 +832,7 @@ static void omap_system_dma_remove(struct platform_device *pdev) · 831 unmodified lines
832 832
833static struct platform_driver omap_system_dma_driver = {833static struct platform_driver omap_system_dma_driver = {
834 .probe = omap_system_dma_probe,834 .probe = omap_system_dma_probe,
835 .remove_new = omap_system_dma_remove,835 .remove = omap_system_dma_remove,
836 .driver = {836 .driver = {
837 .name = "omap_dma_system"837 .name = "omap_dma_system"
838 },838 },
arch/arm/mach-pxa/sharpsl_pm.c+1−1
@@ -919,7 +919,7 @@ static void sharpsl_pm_remove(struct platform_device *pdev) · 918 unmodified lines
919 919
920static struct platform_driver sharpsl_pm_driver = {920static struct platform_driver sharpsl_pm_driver = {
921 .probe = sharpsl_pm_probe,921 .probe = sharpsl_pm_probe,
922 .remove_new = sharpsl_pm_remove,922 .remove = sharpsl_pm_remove,
923 .suspend = sharpsl_pm_suspend,923 .suspend = sharpsl_pm_suspend,
924 .resume = sharpsl_pm_resume,924 .resume = sharpsl_pm_resume,
925 .driver = {925 .driver = {
arch/arm/mach-sa1100/jornada720_ssp.c+1−1
@@ -188,7 +188,7 @@ static void jornada_ssp_remove(struct platform_device *dev) · 187 unmodified lines
188 188
189struct platform_driver jornadassp_driver = {189struct platform_driver jornadassp_driver = {
190 .probe = jornada_ssp_probe,190 .probe = jornada_ssp_probe,
191 .remove_new = jornada_ssp_remove,191 .remove = jornada_ssp_remove,
192 .driver = {192 .driver = {
193 .name = "jornada_ssp",193 .name = "jornada_ssp",
194 },194 },
arch/arm/mach-sa1100/neponset.c+1−1
@@ -423,7 +423,7 @@ static const struct dev_pm_ops neponset_pm_ops = { · 422 unmodified lines
423 423
424static struct platform_driver neponset_device_driver = {424static struct platform_driver neponset_device_driver = {
425 .probe = neponset_probe,425 .probe = neponset_probe,
426 .remove_new = neponset_remove,426 .remove = neponset_remove,
427 .driver = {427 .driver = {
428 .name = "neponset",428 .name = "neponset",
429 .pm = PM_OPS,429 .pm = PM_OPS,
arch/arm/mm/ioremap.c+30−5
@@ -23,6 +23,7 @@ · 22 unmodified lines
23 */23 */
24#include <linux/module.h>24#include <linux/module.h>
25#include <linux/errno.h>25#include <linux/errno.h>
26#include <linux/kasan.h>
26#include <linux/mm.h>27#include <linux/mm.h>
27#include <linux/vmalloc.h>28#include <linux/vmalloc.h>
28#include <linux/io.h>29#include <linux/io.h>
@@ -115,16 +116,40 @@ int ioremap_page(unsigned long virt, unsigned long phys, · 86 unmodified lines
115}116}
116EXPORT_SYMBOL(ioremap_page);117EXPORT_SYMBOL(ioremap_page);
117 118
119#ifdef CONFIG_KASAN
120static unsigned long arm_kasan_mem_to_shadow(unsigned long addr)
121{
122 return (unsigned long)kasan_mem_to_shadow((void *)addr);
123}
124#else
125static unsigned long arm_kasan_mem_to_shadow(unsigned long addr)
126{
127 return 0;
128}
129#endif
130
131static void memcpy_pgd(struct mm_struct *mm, unsigned long start,
132 unsigned long end)
133{
134 end = ALIGN(end, PGDIR_SIZE);
135 memcpy(pgd_offset(mm, start), pgd_offset_k(start),
136 sizeof(pgd_t) * (pgd_index(end) - pgd_index(start)));
137}
138
118void __check_vmalloc_seq(struct mm_struct *mm)139void __check_vmalloc_seq(struct mm_struct *mm)
119{140{
120 int seq;141 int seq;
121 142
122 do {143 do {
123 seq = atomic_read(&init_mm.context.vmalloc_seq);144 seq = atomic_read_acquire(&init_mm.context.vmalloc_seq);
124 memcpy(pgd_offset(mm, VMALLOC_START),145 memcpy_pgd(mm, VMALLOC_START, VMALLOC_END);
125 pgd_offset_k(VMALLOC_START),146 if (IS_ENABLED(CONFIG_KASAN_VMALLOC)) {
126 sizeof(pgd_t) * (pgd_index(VMALLOC_END) -147 unsigned long start =
127 pgd_index(VMALLOC_START)));148 arm_kasan_mem_to_shadow(VMALLOC_START);
149 unsigned long end =
150 arm_kasan_mem_to_shadow(VMALLOC_END);
151 memcpy_pgd(mm, start, end);
152 }
128 /*153 /*
129 * Use a store-release so that other CPUs that observe the154 * Use a store-release so that other CPUs that observe the
130 * counter's new value are guaranteed to see the results of the155 * counter's new value are guaranteed to see the results of the
arch/arm/vfp/vfpmodule.c+53−21
@@ -55,6 +55,34 @@ extern unsigned int VFP_arch_feroceon __alias(VFP_arch); · 54 unmodified lines
55 */55 */
56union vfp_state *vfp_current_hw_state[NR_CPUS];56union vfp_state *vfp_current_hw_state[NR_CPUS];
57 57
58/*
59 * Claim ownership of the VFP unit.
60 *
61 * The caller may change VFP registers until vfp_state_release() is called.
62 *
63 * local_bh_disable() is used to disable preemption and to disable VFP
64 * processing in softirq context. On PREEMPT_RT kernels local_bh_disable() is
65 * not sufficient because it only serializes soft interrupt related sections
66 * via a local lock, but stays preemptible. Disabling preemption is the right
67 * choice here as bottom half processing is always in thread context on RT
68 * kernels so it implicitly prevents bottom half processing as well.
69 */
70static void vfp_state_hold(void)
71{
72 if (!IS_ENABLED(CONFIG_PREEMPT_RT))
73 local_bh_disable();
74 else
75 preempt_disable();
76}
77
78static void vfp_state_release(void)
79{
80 if (!IS_ENABLED(CONFIG_PREEMPT_RT))
81 local_bh_enable();
82 else
83 preempt_enable();
84}
85
58/*86/*
59 * Is 'thread's most up to date state stored in this CPUs hardware?87 * Is 'thread's most up to date state stored in this CPUs hardware?
60 * Must be called from non-preemptible context.88 * Must be called from non-preemptible context.
@@ -240,7 +268,7 @@ static void vfp_panic(char *reason, u32 inst) · 179 unmodified lines
240/*268/*
241 * Process bitmask of exception conditions.269 * Process bitmask of exception conditions.
242 */270 */
243static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_regs *regs)271static int vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr)
244{272{
245 int si_code = 0;273 int si_code = 0;
246 274
@@ -248,8 +276,7 @@ static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_ · 1 unmodified line
248 276
249 if (exceptions == VFP_EXCEPTION_ERROR) {277 if (exceptions == VFP_EXCEPTION_ERROR) {
250 vfp_panic("unhandled bounce", inst);278 vfp_panic("unhandled bounce", inst);
251 vfp_raise_sigfpe(FPE_FLTINV, regs);279 return FPE_FLTINV;
252 return;
253 }280 }
254 281
255 /*282 /*
@@ -277,8 +304,7 @@ static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_ · 21 unmodified lines
277 RAISE(FPSCR_OFC, FPSCR_OFE, FPE_FLTOVF);304 RAISE(FPSCR_OFC, FPSCR_OFE, FPE_FLTOVF);
278 RAISE(FPSCR_IOC, FPSCR_IOE, FPE_FLTINV);305 RAISE(FPSCR_IOC, FPSCR_IOE, FPE_FLTINV);
279 306
280 if (si_code)307 return si_code;
281 vfp_raise_sigfpe(si_code, regs);
282}308}
283 309
284/*310/*
@@ -324,6 +350,8 @@ static u32 vfp_emulate_instruction(u32 inst, u32 fpscr, struct pt_regs *regs) · 39 unmodified lines
324static void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)350static void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)
325{351{
326 u32 fpscr, orig_fpscr, fpsid, exceptions;352 u32 fpscr, orig_fpscr, fpsid, exceptions;
353 int si_code2 = 0;
354 int si_code = 0;
327 355
328 pr_debug("VFP: bounce: trigger %08x fpexc %08x\n", trigger, fpexc);356 pr_debug("VFP: bounce: trigger %08x fpexc %08x\n", trigger, fpexc);
329 357
@@ -369,8 +397,8 @@ static void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs) · 39 unmodified lines
369 * unallocated VFP instruction but with FPSCR.IXE set and not397 * unallocated VFP instruction but with FPSCR.IXE set and not
370 * on VFP subarch 1.398 * on VFP subarch 1.
371 */399 */
372 vfp_raise_exceptions(VFP_EXCEPTION_ERROR, trigger, fpscr, regs);400 si_code = vfp_raise_exceptions(VFP_EXCEPTION_ERROR, trigger, fpscr);
373 return;401 goto exit;
374 }402 }
375 403
376 /*404 /*
@@ -394,14 +422,14 @@ static void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs) · 17 unmodified lines
394 */422 */
395 exceptions = vfp_emulate_instruction(trigger, fpscr, regs);423 exceptions = vfp_emulate_instruction(trigger, fpscr, regs);
396 if (exceptions)424 if (exceptions)
397 vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs);425 si_code2 = vfp_raise_exceptions(exceptions, trigger, orig_fpscr);
398 426
399 /*427 /*
400 * If there isn't a second FP instruction, exit now. Note that428 * If there isn't a second FP instruction, exit now. Note that
401 * the FPEXC.FP2V bit is valid only if FPEXC.EX is 1.429 * the FPEXC.FP2V bit is valid only if FPEXC.EX is 1.
402 */430 */
403 if ((fpexc & (FPEXC_EX | FPEXC_FP2V)) != (FPEXC_EX | FPEXC_FP2V))431 if ((fpexc & (FPEXC_EX | FPEXC_FP2V)) != (FPEXC_EX | FPEXC_FP2V))
404 return;432 goto exit;
405 433
406 /*434 /*
407 * The barrier() here prevents fpinst2 being read435 * The barrier() here prevents fpinst2 being read
@@ -413,7 +441,13 @@ static void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs) · 5 unmodified lines
413 emulate:441 emulate:
414 exceptions = vfp_emulate_instruction(trigger, orig_fpscr, regs);442 exceptions = vfp_emulate_instruction(trigger, orig_fpscr, regs);
415 if (exceptions)443 if (exceptions)
416 vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs);444 si_code = vfp_raise_exceptions(exceptions, trigger, orig_fpscr);
445exit:
446 vfp_state_release();
447 if (si_code2)
448 vfp_raise_sigfpe(si_code2, regs);
449 if (si_code)
450 vfp_raise_sigfpe(si_code, regs);
417}451}
418 452
419static void vfp_enable(void *unused)453static void vfp_enable(void *unused)
@@ -512,11 +546,9 @@ static inline void vfp_pm_init(void) { } · 92 unmodified lines
512 */546 */
513void vfp_sync_hwstate(struct thread_info *thread)547void vfp_sync_hwstate(struct thread_info *thread)
514{548{
515 unsigned int cpu = get_cpu();549 vfp_state_hold();
516 550
517 local_bh_disable();551 if (vfp_state_in_hw(raw_smp_processor_id(), thread)) {
518
519 if (vfp_state_in_hw(cpu, thread)) {
520 u32 fpexc = fmrx(FPEXC);552 u32 fpexc = fmrx(FPEXC);
521 553
522 /*554 /*
@@ -527,8 +559,7 @@ void vfp_sync_hwstate(struct thread_info *thread) · 4 unmodified lines
527 fmxr(FPEXC, fpexc);559 fmxr(FPEXC, fpexc);
528 }560 }
529 561
530 local_bh_enable();562 vfp_state_release();
531 put_cpu();
532}563}
533 564
534/* Ensure that the thread reloads the hardware VFP state on the next use. */565/* Ensure that the thread reloads the hardware VFP state on the next use. */
@@ -683,7 +714,7 @@ static int vfp_support_entry(struct pt_regs *regs, u32 trigger) · 148 unmodified lines
683 if (!user_mode(regs))714 if (!user_mode(regs))
684 return vfp_kmode_exception(regs, trigger);715 return vfp_kmode_exception(regs, trigger);
685 716
686 local_bh_disable();717 vfp_state_hold();
687 fpexc = fmrx(FPEXC);718 fpexc = fmrx(FPEXC);
688 719
689 /*720 /*
@@ -748,6 +779,7 @@ static int vfp_support_entry(struct pt_regs *regs, u32 trigger) · 58 unmodified lines
748 * replay the instruction that trapped.779 * replay the instruction that trapped.
749 */780 */
750 fmxr(FPEXC, fpexc);781 fmxr(FPEXC, fpexc);
782 vfp_state_release();
751 } else {783 } else {
752 /* Check for synchronous or asynchronous exceptions */784 /* Check for synchronous or asynchronous exceptions */
753 if (!(fpexc & (FPEXC_EX | FPEXC_DEX))) {785 if (!(fpexc & (FPEXC_EX | FPEXC_DEX))) {
@@ -762,17 +794,17 @@ static int vfp_support_entry(struct pt_regs *regs, u32 trigger) · 8 unmodified lines
762 if (!(fpscr & FPSCR_IXE)) {794 if (!(fpscr & FPSCR_IXE)) {
763 if (!(fpscr & FPSCR_LENGTH_MASK)) {795 if (!(fpscr & FPSCR_LENGTH_MASK)) {
764 pr_debug("not VFP\n");796 pr_debug("not VFP\n");
765 local_bh_enable();797 vfp_state_release();
766 return -ENOEXEC;798 return -ENOEXEC;
767 }799 }
768 fpexc |= FPEXC_DEX;800 fpexc |= FPEXC_DEX;
769 }801 }
770 }802 }
771bounce: regs->ARM_pc += 4;803bounce: regs->ARM_pc += 4;
804 /* VFP_bounce() will invoke vfp_state_release() */
772 VFP_bounce(trigger, fpexc, regs);805 VFP_bounce(trigger, fpexc, regs);
773 }806 }
774 807
775 local_bh_enable();
776 return 0;808 return 0;
777}809}
778 810
@@ -837,7 +869,7 @@ void kernel_neon_begin(void) · 58 unmodified lines
837 unsigned int cpu;869 unsigned int cpu;
838 u32 fpexc;870 u32 fpexc;
839 871
840 local_bh_disable();872 vfp_state_hold();
841 873
842 /*874 /*
843 * Kernel mode NEON is only allowed outside of hardirq context with875 * Kernel mode NEON is only allowed outside of hardirq context with
@@ -868,7 +900,7 @@ void kernel_neon_end(void) · 24 unmodified lines
868{900{
869 /* Disable the NEON/VFP unit. */901 /* Disable the NEON/VFP unit. */
870 fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);902 fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
871 local_bh_enable();903 vfp_state_release();
872}904}
873EXPORT_SYMBOL(kernel_neon_end);905EXPORT_SYMBOL(kernel_neon_end);
874 906
arch/arm64/Kconfig+11−1
@@ -14,7 +14,6 @@ config ARM64 · 13 unmodified lines
14 select ARCH_HAS_DEBUG_WX14 select ARCH_HAS_DEBUG_WX
15 select ARCH_BINFMT_ELF_EXTRA_PHDRS15 select ARCH_BINFMT_ELF_EXTRA_PHDRS
16 select ARCH_BINFMT_ELF_STATE16 select ARCH_BINFMT_ELF_STATE
17 select ARCH_CORRECT_STACKTRACE_ON_KRETPROBE
18 select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION17 select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION
19 select ARCH_ENABLE_MEMORY_HOTPLUG18 select ARCH_ENABLE_MEMORY_HOTPLUG
20 select ARCH_ENABLE_MEMORY_HOTREMOVE19 select ARCH_ENABLE_MEMORY_HOTREMOVE
@@ -1236,6 +1235,17 @@ config HISILICON_ERRATUM_161600802 · 1215 unmodified lines
1236 1235
1237 If unsure, say Y.1236 If unsure, say Y.
1238 1237
1238config HISILICON_ERRATUM_162100801
1239 bool "Hip09 162100801 erratum support"
1240 default y
1241 help
1242 When enabling GICv4.1 in hip09, VMAPP will fail to clear some caches
1243 during unmapping operation, which will cause some vSGIs lost.
1244 To fix the issue, invalidate related vPE cache through GICR_INVALLR
1245 after VMOVP.
1246
1247 If unsure, say Y.
1248
1239config QCOM_FALKOR_ERRATUM_10031249config QCOM_FALKOR_ERRATUM_1003
1240 bool "Falkor E1003: Incorrect translation due to ASID change"1250 bool "Falkor E1003: Incorrect translation due to ASID change"
1241 default y1251 default y
arch/arm64/Makefile+1−1
@@ -71,7 +71,7 @@ stack_protector_prepare: prepare0 · 70 unmodified lines
71 -mstack-protector-guard-reg=sp_el0 \71 -mstack-protector-guard-reg=sp_el0 \
72 -mstack-protector-guard-offset=$(shell \72 -mstack-protector-guard-offset=$(shell \
73 awk '{if ($$2 == "TSK_STACK_CANARY") print $$3;}' \73 awk '{if ($$2 == "TSK_STACK_CANARY") print $$3;}' \
74 include/generated/asm-offsets.h))74 $(objtree)/include/generated/asm-offsets.h))
75endif75endif
76 76
77ifeq ($(CONFIG_ARM64_BTI_KERNEL),y)77ifeq ($(CONFIG_ARM64_BTI_KERNEL),y)
arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dtsi+14−0
@@ -14,6 +14,7 @@ · 13 unmodified lines
14 compatible = "melfas,mip4_ts";14 compatible = "melfas,mip4_ts";
15 reg = <0x34>;15 reg = <0x34>;
16 interrupts-extended = <&pio 88 IRQ_TYPE_LEVEL_LOW>;16 interrupts-extended = <&pio 88 IRQ_TYPE_LEVEL_LOW>;
17 status = "fail-needs-probe";
17 };18 };
18 19
19 /*20 /*
@@ -26,6 +27,7 @@ · 6 unmodified lines
26 reg = <0x20>;27 reg = <0x20>;
27 hid-descr-addr = <0x0020>;28 hid-descr-addr = <0x0020>;
28 interrupts-extended = <&pio 88 IRQ_TYPE_LEVEL_LOW>;29 interrupts-extended = <&pio 88 IRQ_TYPE_LEVEL_LOW>;
30 status = "fail-needs-probe";
29 };31 };
30 32
31 /* Lenovo Ideapad C330 uses G2Touch touchscreen as a 2nd source touchscreen */33 /* Lenovo Ideapad C330 uses G2Touch touchscreen as a 2nd source touchscreen */
@@ -35,6 +37,7 @@ · 3 unmodified lines
35 hid-descr-addr = <0x0001>;37 hid-descr-addr = <0x0001>;
36 interrupt-parent = <&pio>;38 interrupt-parent = <&pio>;
37 interrupts = <88 IRQ_TYPE_LEVEL_LOW>;39 interrupts = <88 IRQ_TYPE_LEVEL_LOW>;
40 status = "fail-needs-probe";
38 };41 };
39};42};
40 43
@@ -47,6 +50,8 @@ · 6 unmodified lines
47 trackpad2: trackpad@2c {50 trackpad2: trackpad@2c {
48 compatible = "hid-over-i2c";51 compatible = "hid-over-i2c";
49 interrupts-extended = <&pio 117 IRQ_TYPE_LEVEL_LOW>;52 interrupts-extended = <&pio 117 IRQ_TYPE_LEVEL_LOW>;
53 pinctrl-names = "default";
54 pinctrl-0 = <&trackpad_irq>;
50 reg = <0x2c>;55 reg = <0x2c>;
51 hid-descr-addr = <0x0020>;56 hid-descr-addr = <0x0020>;
52 /*57 /*
@@ -58,6 +63,7 @@ · 5 unmodified lines
58 */63 */
59 vdd-supply = <&mt6397_vgp6_reg>;64 vdd-supply = <&mt6397_vgp6_reg>;
60 wakeup-source;65 wakeup-source;
66 status = "fail-needs-probe";
61 };67 };
62};68};
63 69
@@ -82,3 +88,11 @@ · 18 unmodified lines
82 };88 };
83 };89 };
84};90};
91
92&touchscreen {
93 status = "fail-needs-probe";
94};
95
96&trackpad {
97 status = "fail-needs-probe";
98};
arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi+2−2
@@ -358,12 +358,12 @@ · 357 unmodified lines
358&i2c4 {358&i2c4 {
359 clock-frequency = <400000>;359 clock-frequency = <400000>;
360 status = "okay";360 status = "okay";
361 pinctrl-names = "default";
362 pinctrl-0 = <&trackpad_irq>;
363 361
364 trackpad: trackpad@15 {362 trackpad: trackpad@15 {
365 compatible = "elan,ekth3000";363 compatible = "elan,ekth3000";
366 interrupts-extended = <&pio 117 IRQ_TYPE_LEVEL_LOW>;364 interrupts-extended = <&pio 117 IRQ_TYPE_LEVEL_LOW>;
365 pinctrl-names = "default";
366 pinctrl-0 = <&trackpad_irq>;
367 reg = <0x15>;367 reg = <0x15>;
368 vcc-supply = <&mt6397_vgp6_reg>;368 vcc-supply = <&mt6397_vgp6_reg>;
369 wakeup-source;369 wakeup-source;
arch/arm64/crypto/aes-ce-ccm-glue.c+1−1
@@ -18,7 +18,7 @@ · 17 unmodified lines
18 18
19#include "aes-ce-setkey.h"19#include "aes-ce-setkey.h"
20 20
21MODULE_IMPORT_NS(CRYPTO_INTERNAL);21MODULE_IMPORT_NS("CRYPTO_INTERNAL");
22 22
23static int num_rounds(struct crypto_aes_ctx *ctx)23static int num_rounds(struct crypto_aes_ctx *ctx)
24{24{
arch/arm64/crypto/aes-glue.c+1−1
@@ -1048,7 +1048,7 @@ unregister_ciphers: · 1047 unmodified lines
1048 1048
1049#ifdef USE_V8_CRYPTO_EXTENSIONS1049#ifdef USE_V8_CRYPTO_EXTENSIONS
1050module_cpu_feature_match(AES, aes_init);1050module_cpu_feature_match(AES, aes_init);
1051EXPORT_SYMBOL_NS(ce_aes_mac_update, CRYPTO_INTERNAL);1051EXPORT_SYMBOL_NS(ce_aes_mac_update, "CRYPTO_INTERNAL");
1052#else1052#else
1053module_init(aes_init);1053module_init(aes_init);
1054EXPORT_SYMBOL(neon_aes_ecb_encrypt);1054EXPORT_SYMBOL(neon_aes_ecb_encrypt);
arch/arm64/include/asm/jump_label.h+13−7
@@ -19,10 +19,14 @@ · 18 unmodified lines
19#define JUMP_TABLE_ENTRY(key, label) \19#define JUMP_TABLE_ENTRY(key, label) \
20 ".pushsection __jump_table, \"aw\"\n\t" \20 ".pushsection __jump_table, \"aw\"\n\t" \
21 ".align 3\n\t" \21 ".align 3\n\t" \
22 ".long 1b - ., %l["#label"] - .\n\t" \22 ".long 1b - ., " label " - .\n\t" \
23 ".quad %c0 - .\n\t" \23 ".quad " key " - .\n\t" \
24 ".popsection\n\t" \24 ".popsection\n\t"
25 : : "i"(key) : : label25
26/* This macro is also expanded on the Rust side. */
27#define ARCH_STATIC_BRANCH_ASM(key, label) \
28 "1: nop\n\t" \
29 JUMP_TABLE_ENTRY(key, label)
26 30
27static __always_inline bool arch_static_branch(struct static_key * const key,31static __always_inline bool arch_static_branch(struct static_key * const key,
28 const bool branch)32 const bool branch)
@@ -30,8 +34,8 @@ static __always_inline bool arch_static_branch(struct static_key * const key, · 1 unmodified line
30 char *k = &((char *)key)[branch];34 char *k = &((char *)key)[branch];
31 35
32 asm goto(36 asm goto(
33 "1: nop \n\t"37 ARCH_STATIC_BRANCH_ASM("%c0", "%l[l_yes]")
34 JUMP_TABLE_ENTRY(k, l_yes)38 : : "i"(k) : : l_yes
35 );39 );
36 40
37 return false;41 return false;
@@ -43,9 +47,11 @@ static __always_inline bool arch_static_branch_jump(struct static_key * const ke · 5 unmodified lines
43 const bool branch)47 const bool branch)
44{48{
45 char *k = &((char *)key)[branch];49 char *k = &((char *)key)[branch];
50
46 asm goto(51 asm goto(
47 "1: b %l[l_yes] \n\t"52 "1: b %l[l_yes] \n\t"
48 JUMP_TABLE_ENTRY(k, l_yes)53 JUMP_TABLE_ENTRY("%c0", "%l[l_yes]")
54 : : "i"(k) : : l_yes
49 );55 );
50 return false;56 return false;
51l_yes:57l_yes:
arch/arm64/include/asm/spinlock_types.h+1−1
@@ -6,7 +6,7 @@ · 5 unmodified lines
6#define __ASM_SPINLOCK_TYPES_H6#define __ASM_SPINLOCK_TYPES_H
7 7
8#if !defined(__LINUX_SPINLOCK_TYPES_RAW_H) && !defined(__ASM_SPINLOCK_H)8#if !defined(__LINUX_SPINLOCK_TYPES_RAW_H) && !defined(__ASM_SPINLOCK_H)
9# error "please don't include this file directly"9# error "Please do not include this file directly."
10#endif10#endif
11 11
12#include <asm-generic/qspinlock_types.h>12#include <asm-generic/qspinlock_types.h>
arch/arm64/kvm/nested.c+1−1
@@ -951,7 +951,7 @@ u64 kvm_vcpu_apply_reg_masks(const struct kvm_vcpu *vcpu, · 950 unmodified lines
951 return v;951 return v;
952}952}
953 953
954static void set_sysreg_masks(struct kvm *kvm, int sr, u64 res0, u64 res1)954static __always_inline void set_sysreg_masks(struct kvm *kvm, int sr, u64 res0, u64 res1)
955{955{
956 int i = sr - __SANITISED_REG_START__;956 int i = sr - __SANITISED_REG_START__;
957 957
arch/arm64/kvm/pmu-emul.c+45−17
@@ -274,12 +274,23 @@ void kvm_pmu_vcpu_destroy(struct kvm_vcpu *vcpu) · 273 unmodified lines
274 irq_work_sync(&vcpu->arch.pmu.overflow_work);274 irq_work_sync(&vcpu->arch.pmu.overflow_work);
275}275}
276 276
277bool kvm_pmu_counter_is_hyp(struct kvm_vcpu *vcpu, unsigned int idx)277static u64 kvm_pmu_hyp_counter_mask(struct kvm_vcpu *vcpu)
278{278{
279 unsigned int hpmn;279 unsigned int hpmn, n;
280 280
281 if (!vcpu_has_nv(vcpu) || idx == ARMV8_PMU_CYCLE_IDX)281 if (!vcpu_has_nv(vcpu))
282 return false;282 return 0;
283
284 hpmn = SYS_FIELD_GET(MDCR_EL2, HPMN, __vcpu_sys_reg(vcpu, MDCR_EL2));
285 n = vcpu->kvm->arch.pmcr_n;
286
287 /*
288 * Programming HPMN to a value greater than PMCR_EL0.N is
289 * CONSTRAINED UNPREDICTABLE. Make the implementation choice that an
290 * UNKNOWN number of counters (in our case, zero) are reserved for EL2.
291 */
292 if (hpmn >= n)
293 return 0;
283 294
284 /*295 /*
285 * Programming HPMN=0 is CONSTRAINED UNPREDICTABLE if FEAT_HPMN0 isn't296 * Programming HPMN=0 is CONSTRAINED UNPREDICTABLE if FEAT_HPMN0 isn't
@@ -288,20 +299,22 @@ bool kvm_pmu_counter_is_hyp(struct kvm_vcpu *vcpu, unsigned int idx) · 2 unmodified lines
288 * implementation choice that all counters are included in the second299 * implementation choice that all counters are included in the second
289 * range reserved for EL2/EL3.300 * range reserved for EL2/EL3.
290 */301 */
291 hpmn = SYS_FIELD_GET(MDCR_EL2, HPMN, __vcpu_sys_reg(vcpu, MDCR_EL2));302 return GENMASK(n - 1, hpmn);
292 return idx >= hpmn;303}
304
305bool kvm_pmu_counter_is_hyp(struct kvm_vcpu *vcpu, unsigned int idx)
306{
307 return kvm_pmu_hyp_counter_mask(vcpu) & BIT(idx);
293}308}
294 309
295u64 kvm_pmu_accessible_counter_mask(struct kvm_vcpu *vcpu)310u64 kvm_pmu_accessible_counter_mask(struct kvm_vcpu *vcpu)
296{311{
297 u64 mask = kvm_pmu_implemented_counter_mask(vcpu);312 u64 mask = kvm_pmu_implemented_counter_mask(vcpu);
298 u64 hpmn;
299 313
300 if (!vcpu_has_nv(vcpu) || vcpu_is_el2(vcpu))314 if (!vcpu_has_nv(vcpu) || vcpu_is_el2(vcpu))
301 return mask;315 return mask;
302 316
303 hpmn = SYS_FIELD_GET(MDCR_EL2, HPMN, __vcpu_sys_reg(vcpu, MDCR_EL2));317 return mask & ~kvm_pmu_hyp_counter_mask(vcpu);
304 return mask & ~GENMASK(vcpu->kvm->arch.pmcr_n - 1, hpmn);
305}318}
306 319
307u64 kvm_pmu_implemented_counter_mask(struct kvm_vcpu *vcpu)320u64 kvm_pmu_implemented_counter_mask(struct kvm_vcpu *vcpu)
@@ -375,15 +388,30 @@ void kvm_pmu_disable_counter_mask(struct kvm_vcpu *vcpu, u64 val) · 67 unmodified lines
375 }388 }
376}389}
377 390
378static u64 kvm_pmu_overflow_status(struct kvm_vcpu *vcpu)391/*
392 * Returns the PMU overflow state, which is true if there exists an event
393 * counter where the values of the global enable control, PMOVSSET_EL0[n], and
394 * PMINTENSET_EL1[n] are all 1.
395 */
396static bool kvm_pmu_overflow_status(struct kvm_vcpu *vcpu)
379{397{
380 u64 reg = 0;398 u64 reg = __vcpu_sys_reg(vcpu, PMOVSSET_EL0);
381 399
382 if ((kvm_vcpu_read_pmcr(vcpu) & ARMV8_PMU_PMCR_E)) {400 reg &= __vcpu_sys_reg(vcpu, PMINTENSET_EL1);
383 reg = __vcpu_sys_reg(vcpu, PMOVSSET_EL0);401
384 reg &= __vcpu_sys_reg(vcpu, PMCNTENSET_EL0);402 /*
385 reg &= __vcpu_sys_reg(vcpu, PMINTENSET_EL1);403 * PMCR_EL0.E is the global enable control for event counters available
386 }404 * to EL0 and EL1.
405 */
406 if (!(kvm_vcpu_read_pmcr(vcpu) & ARMV8_PMU_PMCR_E))
407 reg &= kvm_pmu_hyp_counter_mask(vcpu);
408
409 /*
410 * Otherwise, MDCR_EL2.HPME is the global enable control for event
411 * counters reserved for EL2.
412 */
413 if (!(vcpu_read_sys_reg(vcpu, MDCR_EL2) & MDCR_EL2_HPME))
414 reg &= ~kvm_pmu_hyp_counter_mask(vcpu);
387 415
388 return reg;416 return reg;
389}417}
@@ -396,7 +424,7 @@ static void kvm_pmu_update_state(struct kvm_vcpu *vcpu) · 6 unmodified lines
396 if (!kvm_vcpu_has_pmu(vcpu))424 if (!kvm_vcpu_has_pmu(vcpu))
397 return;425 return;
398 426
399 overflow = !!kvm_pmu_overflow_status(vcpu);427 overflow = kvm_pmu_overflow_status(vcpu);
400 if (pmu->irq_level == overflow)428 if (pmu->irq_level == overflow)
401 return;429 return;
402 430
arch/arm64/kvm/vgic/vgic-debug.c+4−1
@@ -287,7 +287,10 @@ static int vgic_debug_show(struct seq_file *s, void *v) · 286 unmodified lines
287 * Expect this to succeed, as iter_mark_lpis() takes a reference on287 * Expect this to succeed, as iter_mark_lpis() takes a reference on
288 * every LPI to be visited.288 * every LPI to be visited.
289 */289 */
290 irq = vgic_get_irq(kvm, vcpu, iter->intid);290 if (iter->intid < VGIC_NR_PRIVATE_IRQS)
291 irq = vgic_get_vcpu_irq(vcpu, iter->intid);
292 else
293 irq = vgic_get_irq(kvm, iter->intid);
291 if (WARN_ON_ONCE(!irq))294 if (WARN_ON_ONCE(!irq))
292 return -EINVAL;295 return -EINVAL;
293 296
arch/arm64/kvm/vgic/vgic-init.c+1−1
@@ -322,7 +322,7 @@ int vgic_init(struct kvm *kvm) · 321 unmodified lines
322 goto out;322 goto out;
323 323
324 for (i = 0; i < VGIC_NR_PRIVATE_IRQS; i++) {324 for (i = 0; i < VGIC_NR_PRIVATE_IRQS; i++) {
325 struct vgic_irq *irq = vgic_get_irq(kvm, vcpu, i);325 struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, i);
326 326
327 switch (dist->vgic_model) {327 switch (dist->vgic_model) {
328 case KVM_DEV_TYPE_ARM_VGIC_V3:328 case KVM_DEV_TYPE_ARM_VGIC_V3:
arch/arm64/kvm/vgic/vgic-its.c+54−23
@@ -31,6 +31,41 @@ static int vgic_its_commit_v0(struct vgic_its *its); · 30 unmodified lines
31static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq,31static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq,
32 struct kvm_vcpu *filter_vcpu, bool needs_inv);32 struct kvm_vcpu *filter_vcpu, bool needs_inv);
33 33
34#define vgic_its_read_entry_lock(i, g, valp, t) \
35 ({ \
36 int __sz = vgic_its_get_abi(i)->t##_esz; \
37 struct kvm *__k = (i)->dev->kvm; \
38 int __ret; \
39 \
40 BUILD_BUG_ON(NR_ITS_ABIS == 1 && \
41 sizeof(*(valp)) != ABI_0_ESZ); \
42 if (NR_ITS_ABIS > 1 && \
43 KVM_BUG_ON(__sz != sizeof(*(valp)), __k)) \
44 __ret = -EINVAL; \
45 else \
46 __ret = kvm_read_guest_lock(__k, (g), \
47 valp, __sz); \
48 __ret; \
49 })
50
51#define vgic_its_write_entry_lock(i, g, val, t) \
52 ({ \
53 int __sz = vgic_its_get_abi(i)->t##_esz; \
54 struct kvm *__k = (i)->dev->kvm; \
55 typeof(val) __v = (val); \
56 int __ret; \
57 \
58 BUILD_BUG_ON(NR_ITS_ABIS == 1 && \
59 sizeof(__v) != ABI_0_ESZ); \
60 if (NR_ITS_ABIS > 1 && \
61 KVM_BUG_ON(__sz != sizeof(__v), __k)) \
62 __ret = -EINVAL; \
63 else \
64 __ret = vgic_write_guest_lock(__k, (g), \
65 &__v, __sz); \
66 __ret; \
67 })
68
34/*69/*
35 * Creates a new (reference to a) struct vgic_irq for a given LPI.70 * Creates a new (reference to a) struct vgic_irq for a given LPI.
36 * If this LPI is already mapped on another ITS, we increase its refcount71 * If this LPI is already mapped on another ITS, we increase its refcount
@@ -42,7 +77,7 @@ static struct vgic_irq *vgic_add_lpi(struct kvm *kvm, u32 intid, · 5 unmodified lines
42 struct kvm_vcpu *vcpu)77 struct kvm_vcpu *vcpu)
43{78{
44 struct vgic_dist *dist = &kvm->arch.vgic;79 struct vgic_dist *dist = &kvm->arch.vgic;
45 struct vgic_irq *irq = vgic_get_irq(kvm, NULL, intid), *oldirq;80 struct vgic_irq *irq = vgic_get_irq(kvm, intid), *oldirq;
46 unsigned long flags;81 unsigned long flags;
47 int ret;82 int ret;
48 83
@@ -419,7 +454,7 @@ static int its_sync_lpi_pending_table(struct kvm_vcpu *vcpu) · 370 unmodified lines
419 last_byte_offset = byte_offset;454 last_byte_offset = byte_offset;
420 }455 }
421 456
422 irq = vgic_get_irq(vcpu->kvm, NULL, intid);457 irq = vgic_get_irq(vcpu->kvm, intid);
423 if (!irq)458 if (!irq)
424 continue;459 continue;
425 460
@@ -794,7 +829,7 @@ static int vgic_its_cmd_handle_discard(struct kvm *kvm, struct vgic_its *its, · 368 unmodified lines
794 829
795 its_free_ite(kvm, ite);830 its_free_ite(kvm, ite);
796 831
797 return vgic_its_write_entry_lock(its, gpa, 0, ite_esz);832 return vgic_its_write_entry_lock(its, gpa, 0ULL, ite);
798 }833 }
799 834
800 return E_ITS_DISCARD_UNMAPPED_INTERRUPT;835 return E_ITS_DISCARD_UNMAPPED_INTERRUPT;
@@ -1143,7 +1178,6 @@ static int vgic_its_cmd_handle_mapd(struct kvm *kvm, struct vgic_its *its, · 342 unmodified lines
1143 bool valid = its_cmd_get_validbit(its_cmd);1178 bool valid = its_cmd_get_validbit(its_cmd);
1144 u8 num_eventid_bits = its_cmd_get_size(its_cmd);1179 u8 num_eventid_bits = its_cmd_get_size(its_cmd);
1145 gpa_t itt_addr = its_cmd_get_ittaddr(its_cmd);1180 gpa_t itt_addr = its_cmd_get_ittaddr(its_cmd);
1146 int dte_esz = vgic_its_get_abi(its)->dte_esz;
1147 struct its_device *device;1181 struct its_device *device;
1148 gpa_t gpa;1182 gpa_t gpa;
1149 1183
@@ -1168,7 +1202,7 @@ static int vgic_its_cmd_handle_mapd(struct kvm *kvm, struct vgic_its *its, · 18 unmodified lines
1168 * is an error, so we are done in any case.1202 * is an error, so we are done in any case.
1169 */1203 */
1170 if (!valid)1204 if (!valid)
1171 return vgic_its_write_entry_lock(its, gpa, 0, dte_esz);1205 return vgic_its_write_entry_lock(its, gpa, 0ULL, dte);
1172 1206
1173 device = vgic_its_alloc_device(its, device_id, itt_addr,1207 device = vgic_its_alloc_device(its, device_id, itt_addr,
1174 num_eventid_bits);1208 num_eventid_bits);
@@ -1288,7 +1322,7 @@ int vgic_its_invall(struct kvm_vcpu *vcpu) · 113 unmodified lines
1288 unsigned long intid;1322 unsigned long intid;
1289 1323
1290 xa_for_each(&dist->lpi_xa, intid, irq) {1324 xa_for_each(&dist->lpi_xa, intid, irq) {
1291 irq = vgic_get_irq(kvm, NULL, intid);1325 irq = vgic_get_irq(kvm, intid);
1292 if (!irq)1326 if (!irq)
1293 continue;1327 continue;
1294 1328
@@ -1354,7 +1388,7 @@ static int vgic_its_cmd_handle_movall(struct kvm *kvm, struct vgic_its *its, · 59 unmodified lines
1354 return 0;1388 return 0;
1355 1389
1356 xa_for_each(&dist->lpi_xa, intid, irq) {1390 xa_for_each(&dist->lpi_xa, intid, irq) {
1357 irq = vgic_get_irq(kvm, NULL, intid);1391 irq = vgic_get_irq(kvm, intid);
1358 if (!irq)1392 if (!irq)
1359 continue;1393 continue;
1360 1394
@@ -2090,7 +2124,7 @@ static int scan_its_table(struct vgic_its *its, gpa_t base, int size, u32 esz, · 729 unmodified lines
2090 * vgic_its_save_ite - Save an interrupt translation entry at @gpa2124 * vgic_its_save_ite - Save an interrupt translation entry at @gpa
2091 */2125 */
2092static int vgic_its_save_ite(struct vgic_its *its, struct its_device *dev,2126static int vgic_its_save_ite(struct vgic_its *its, struct its_device *dev,
2093 struct its_ite *ite, gpa_t gpa, int ite_esz)2127 struct its_ite *ite, gpa_t gpa)
2094{2128{
2095 u32 next_offset;2129 u32 next_offset;
2096 u64 val;2130 u64 val;
@@ -2101,7 +2135,7 @@ static int vgic_its_save_ite(struct vgic_its *its, struct its_device *dev, · 4 unmodified lines
2101 ite->collection->collection_id;2135 ite->collection->collection_id;
2102 val = cpu_to_le64(val);2136 val = cpu_to_le64(val);
2103 2137
2104 return vgic_its_write_entry_lock(its, gpa, val, ite_esz);2138 return vgic_its_write_entry_lock(its, gpa, val, ite);
2105}2139}
2106 2140
2107/**2141/**
@@ -2201,7 +2235,7 @@ static int vgic_its_save_itt(struct vgic_its *its, struct its_device *device) · 93 unmodified lines
2201 if (ite->irq->hw && !kvm_vgic_global_state.has_gicv4_1)2235 if (ite->irq->hw && !kvm_vgic_global_state.has_gicv4_1)
2202 return -EACCES;2236 return -EACCES;
2203 2237
2204 ret = vgic_its_save_ite(its, device, ite, gpa, ite_esz);2238 ret = vgic_its_save_ite(its, device, ite, gpa);
2205 if (ret)2239 if (ret)
2206 return ret;2240 return ret;
2207 }2241 }
@@ -2240,10 +2274,9 @@ static int vgic_its_restore_itt(struct vgic_its *its, struct its_device *dev) · 32 unmodified lines
2240 * @its: ITS handle2274 * @its: ITS handle
2241 * @dev: ITS device2275 * @dev: ITS device
2242 * @ptr: GPA2276 * @ptr: GPA
2243 * @dte_esz: device table entry size
2244 */2277 */
2245static int vgic_its_save_dte(struct vgic_its *its, struct its_device *dev,2278static int vgic_its_save_dte(struct vgic_its *its, struct its_device *dev,
2246 gpa_t ptr, int dte_esz)2279 gpa_t ptr)
2247{2280{
2248 u64 val, itt_addr_field;2281 u64 val, itt_addr_field;
2249 u32 next_offset;2282 u32 next_offset;
@@ -2256,7 +2289,7 @@ static int vgic_its_save_dte(struct vgic_its *its, struct its_device *dev, · 6 unmodified lines
2256 (dev->num_eventid_bits - 1));2289 (dev->num_eventid_bits - 1));
2257 val = cpu_to_le64(val);2290 val = cpu_to_le64(val);
2258 2291
2259 return vgic_its_write_entry_lock(its, ptr, val, dte_esz);2292 return vgic_its_write_entry_lock(its, ptr, val, dte);
2260}2293}
2261 2294
2262/**2295/**
@@ -2332,10 +2365,8 @@ static int vgic_its_device_cmp(void *priv, const struct list_head *a, · 69 unmodified lines
2332 */2365 */
2333static int vgic_its_save_device_tables(struct vgic_its *its)2366static int vgic_its_save_device_tables(struct vgic_its *its)
2334{2367{
2335 const struct vgic_its_abi *abi = vgic_its_get_abi(its);
2336 u64 baser = its->baser_device_table;2368 u64 baser = its->baser_device_table;
2337 struct its_device *dev;2369 struct its_device *dev;
2338 int dte_esz = abi->dte_esz;
2339 2370
2340 if (!(baser & GITS_BASER_VALID))2371 if (!(baser & GITS_BASER_VALID))
2341 return 0;2372 return 0;
@@ -2354,7 +2385,7 @@ static int vgic_its_save_device_tables(struct vgic_its *its) · 12 unmodified lines
2354 if (ret)2385 if (ret)
2355 return ret;2386 return ret;
2356 2387
2357 ret = vgic_its_save_dte(its, dev, eaddr, dte_esz);2388 ret = vgic_its_save_dte(its, dev, eaddr);
2358 if (ret)2389 if (ret)
2359 return ret;2390 return ret;
2360 }2391 }
@@ -2435,7 +2466,7 @@ static int vgic_its_restore_device_tables(struct vgic_its *its) · 74 unmodified lines
2435 2466
2436static int vgic_its_save_cte(struct vgic_its *its,2467static int vgic_its_save_cte(struct vgic_its *its,
2437 struct its_collection *collection,2468 struct its_collection *collection,
2438 gpa_t gpa, int esz)2469 gpa_t gpa)
2439{2470{
2440 u64 val;2471 u64 val;
2441 2472
@@ -2444,7 +2475,7 @@ static int vgic_its_save_cte(struct vgic_its *its, · 2 unmodified lines
2444 collection->collection_id);2475 collection->collection_id);
2445 val = cpu_to_le64(val);2476 val = cpu_to_le64(val);
2446 2477
2447 return vgic_its_write_entry_lock(its, gpa, val, esz);2478 return vgic_its_write_entry_lock(its, gpa, val, cte);
2448}2479}
2449 2480
2450/*2481/*
@@ -2452,7 +2483,7 @@ static int vgic_its_save_cte(struct vgic_its *its, · 1 unmodified line
2452 * Return +1 on success, 0 if the entry was invalid (which should be2483 * Return +1 on success, 0 if the entry was invalid (which should be
2453 * interpreted as end-of-table), and a negative error value for generic errors.2484 * interpreted as end-of-table), and a negative error value for generic errors.
2454 */2485 */
2455static int vgic_its_restore_cte(struct vgic_its *its, gpa_t gpa, int esz)2486static int vgic_its_restore_cte(struct vgic_its *its, gpa_t gpa)
2456{2487{
2457 struct its_collection *collection;2488 struct its_collection *collection;
2458 struct kvm *kvm = its->dev->kvm;2489 struct kvm *kvm = its->dev->kvm;
@@ -2460,7 +2491,7 @@ static int vgic_its_restore_cte(struct vgic_its *its, gpa_t gpa, int esz) · 1 unmodified line
2460 u64 val;2491 u64 val;
2461 int ret;2492 int ret;
2462 2493
2463 ret = vgic_its_read_entry_lock(its, gpa, &val, esz);2494 ret = vgic_its_read_entry_lock(its, gpa, &val, cte);
2464 if (ret)2495 if (ret)
2465 return ret;2496 return ret;
2466 val = le64_to_cpu(val);2497 val = le64_to_cpu(val);
@@ -2507,7 +2538,7 @@ static int vgic_its_save_collection_table(struct vgic_its *its) · 40 unmodified lines
2507 max_size = GITS_BASER_NR_PAGES(baser) * SZ_64K;2538 max_size = GITS_BASER_NR_PAGES(baser) * SZ_64K;
2508 2539
2509 list_for_each_entry(collection, &its->collection_list, coll_list) {2540 list_for_each_entry(collection, &its->collection_list, coll_list) {
2510 ret = vgic_its_save_cte(its, collection, gpa, cte_esz);2541 ret = vgic_its_save_cte(its, collection, gpa);
2511 if (ret)2542 if (ret)
2512 return ret;2543 return ret;
2513 gpa += cte_esz;2544 gpa += cte_esz;
@@ -2521,7 +2552,7 @@ static int vgic_its_save_collection_table(struct vgic_its *its) · 7 unmodified lines
2521 * table is not fully filled, add a last dummy element2552 * table is not fully filled, add a last dummy element
2522 * with valid bit unset2553 * with valid bit unset
2523 */2554 */
2524 return vgic_its_write_entry_lock(its, gpa, 0, cte_esz);2555 return vgic_its_write_entry_lock(its, gpa, 0ULL, cte);
2525}2556}
2526 2557
2527/*2558/*
@@ -2546,7 +2577,7 @@ static int vgic_its_restore_collection_table(struct vgic_its *its) · 18 unmodified lines
2546 max_size = GITS_BASER_NR_PAGES(baser) * SZ_64K;2577 max_size = GITS_BASER_NR_PAGES(baser) * SZ_64K;
2547 2578
2548 while (read < max_size) {2579 while (read < max_size) {
2549 ret = vgic_its_restore_cte(its, gpa, cte_esz);2580 ret = vgic_its_restore_cte(its, gpa);
2550 if (ret <= 0)2581 if (ret <= 0)
2551 break;2582 break;
2552 gpa += cte_esz;2583 gpa += cte_esz;
arch/arm64/kvm/vgic/vgic-mmio-v2.c+6−6
@@ -148,7 +148,7 @@ static void vgic_mmio_write_sgir(struct kvm_vcpu *source_vcpu, · 147 unmodified lines
148 if (!(targets & (1U << c)))148 if (!(targets & (1U << c)))
149 continue;149 continue;
150 150
151 irq = vgic_get_irq(source_vcpu->kvm, vcpu, intid);151 irq = vgic_get_vcpu_irq(vcpu, intid);
152 152
153 raw_spin_lock_irqsave(&irq->irq_lock, flags);153 raw_spin_lock_irqsave(&irq->irq_lock, flags);
154 irq->pending_latch = true;154 irq->pending_latch = true;
@@ -167,7 +167,7 @@ static unsigned long vgic_mmio_read_target(struct kvm_vcpu *vcpu, · 12 unmodified lines
167 u64 val = 0;167 u64 val = 0;
168 168
169 for (i = 0; i < len; i++) {169 for (i = 0; i < len; i++) {
170 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);170 struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);
171 171
172 val |= (u64)irq->targets << (i * 8);172 val |= (u64)irq->targets << (i * 8);
173 173
@@ -191,7 +191,7 @@ static void vgic_mmio_write_target(struct kvm_vcpu *vcpu, · 17 unmodified lines
191 return;191 return;
192 192
193 for (i = 0; i < len; i++) {193 for (i = 0; i < len; i++) {
194 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, NULL, intid + i);194 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, intid + i);
195 int target;195 int target;
196 196
197 raw_spin_lock_irqsave(&irq->irq_lock, flags);197 raw_spin_lock_irqsave(&irq->irq_lock, flags);
@@ -213,7 +213,7 @@ static unsigned long vgic_mmio_read_sgipend(struct kvm_vcpu *vcpu, · 15 unmodified lines
213 u64 val = 0;213 u64 val = 0;
214 214
215 for (i = 0; i < len; i++) {215 for (i = 0; i < len; i++) {
216 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);216 struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);
217 217
218 val |= (u64)irq->source << (i * 8);218 val |= (u64)irq->source << (i * 8);
219 219
@@ -231,7 +231,7 @@ static void vgic_mmio_write_sgipendc(struct kvm_vcpu *vcpu, · 11 unmodified lines
231 unsigned long flags;231 unsigned long flags;
232 232
233 for (i = 0; i < len; i++) {233 for (i = 0; i < len; i++) {
234 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);234 struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);
235 235
236 raw_spin_lock_irqsave(&irq->irq_lock, flags);236 raw_spin_lock_irqsave(&irq->irq_lock, flags);
237 237
@@ -253,7 +253,7 @@ static void vgic_mmio_write_sgipends(struct kvm_vcpu *vcpu, · 15 unmodified lines
253 unsigned long flags;253 unsigned long flags;
254 254
255 for (i = 0; i < len; i++) {255 for (i = 0; i < len; i++) {
256 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);256 struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);
257 257
258 raw_spin_lock_irqsave(&irq->irq_lock, flags);258 raw_spin_lock_irqsave(&irq->irq_lock, flags);
259 259
arch/arm64/kvm/vgic/vgic-mmio-v3.c+9−4
@@ -194,7 +194,7 @@ static unsigned long vgic_mmio_read_irouter(struct kvm_vcpu *vcpu, · 193 unmodified lines
194 gpa_t addr, unsigned int len)194 gpa_t addr, unsigned int len)
195{195{
196 int intid = VGIC_ADDR_TO_INTID(addr, 64);196 int intid = VGIC_ADDR_TO_INTID(addr, 64);
197 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, NULL, intid);197 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, intid);
198 unsigned long ret = 0;198 unsigned long ret = 0;
199 199
200 if (!irq)200 if (!irq)
@@ -220,7 +220,7 @@ static void vgic_mmio_write_irouter(struct kvm_vcpu *vcpu, · 19 unmodified lines
220 if (addr & 4)220 if (addr & 4)
221 return;221 return;
222 222
223 irq = vgic_get_irq(vcpu->kvm, NULL, intid);223 irq = vgic_get_irq(vcpu->kvm, intid);
224 224
225 if (!irq)225 if (!irq)
226 return;226 return;
@@ -530,6 +530,7 @@ static void vgic_mmio_write_invlpi(struct kvm_vcpu *vcpu, · 303 unmodified lines
530 unsigned long val)530 unsigned long val)
531{531{
532 struct vgic_irq *irq;532 struct vgic_irq *irq;
533 u32 intid;
533 534
534 /*535 /*
535 * If the guest wrote only to the upper 32bit part of the536 * If the guest wrote only to the upper 32bit part of the
@@ -541,9 +542,13 @@ static void vgic_mmio_write_invlpi(struct kvm_vcpu *vcpu, · 5 unmodified lines
541 if ((addr & 4) || !vgic_lpis_enabled(vcpu))542 if ((addr & 4) || !vgic_lpis_enabled(vcpu))
542 return;543 return;
543 544
545 intid = lower_32_bits(val);
546 if (intid < VGIC_MIN_LPI)
547 return;
548
544 vgic_set_rdist_busy(vcpu, true);549 vgic_set_rdist_busy(vcpu, true);
545 550
546 irq = vgic_get_irq(vcpu->kvm, NULL, lower_32_bits(val));551 irq = vgic_get_irq(vcpu->kvm, intid);
547 if (irq) {552 if (irq) {
548 vgic_its_inv_lpi(vcpu->kvm, irq);553 vgic_its_inv_lpi(vcpu->kvm, irq);
549 vgic_put_irq(vcpu->kvm, irq);554 vgic_put_irq(vcpu->kvm, irq);
@@ -1020,7 +1025,7 @@ int vgic_v3_has_attr_regs(struct kvm_device *dev, struct kvm_device_attr *attr) · 470 unmodified lines
1020 1025
1021static void vgic_v3_queue_sgi(struct kvm_vcpu *vcpu, u32 sgi, bool allow_group1)1026static void vgic_v3_queue_sgi(struct kvm_vcpu *vcpu, u32 sgi, bool allow_group1)
1022{1027{
1023 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, sgi);1028 struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, sgi);
1024 unsigned long flags;1029 unsigned long flags;
1025 1030
1026 raw_spin_lock_irqsave(&irq->irq_lock, flags);1031 raw_spin_lock_irqsave(&irq->irq_lock, flags);
arch/arm64/kvm/vgic/vgic-mmio.c+19−19
@@ -50,7 +50,7 @@ unsigned long vgic_mmio_read_group(struct kvm_vcpu *vcpu, · 49 unmodified lines
50 50
51 /* Loop over all IRQs affected by this read */51 /* Loop over all IRQs affected by this read */
52 for (i = 0; i < len * 8; i++) {52 for (i = 0; i < len * 8; i++) {
53 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);53 struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);
54 54
55 if (irq->group)55 if (irq->group)
56 value |= BIT(i);56 value |= BIT(i);
@@ -74,7 +74,7 @@ void vgic_mmio_write_group(struct kvm_vcpu *vcpu, gpa_t addr, · 17 unmodified lines
74 unsigned long flags;74 unsigned long flags;
75 75
76 for (i = 0; i < len * 8; i++) {76 for (i = 0; i < len * 8; i++) {
77 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);77 struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);
78 78
79 raw_spin_lock_irqsave(&irq->irq_lock, flags);79 raw_spin_lock_irqsave(&irq->irq_lock, flags);
80 irq->group = !!(val & BIT(i));80 irq->group = !!(val & BIT(i));
@@ -102,7 +102,7 @@ unsigned long vgic_mmio_read_enable(struct kvm_vcpu *vcpu, · 21 unmodified lines
102 102
103 /* Loop over all IRQs affected by this read */103 /* Loop over all IRQs affected by this read */
104 for (i = 0; i < len * 8; i++) {104 for (i = 0; i < len * 8; i++) {
105 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);105 struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);
106 106
107 if (irq->enabled)107 if (irq->enabled)
108 value |= (1U << i);108 value |= (1U << i);
@@ -122,7 +122,7 @@ void vgic_mmio_write_senable(struct kvm_vcpu *vcpu, · 13 unmodified lines
122 unsigned long flags;122 unsigned long flags;
123 123
124 for_each_set_bit(i, &val, len * 8) {124 for_each_set_bit(i, &val, len * 8) {
125 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);125 struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);
126 126
127 raw_spin_lock_irqsave(&irq->irq_lock, flags);127 raw_spin_lock_irqsave(&irq->irq_lock, flags);
128 if (irq->hw && vgic_irq_is_sgi(irq->intid)) {128 if (irq->hw && vgic_irq_is_sgi(irq->intid)) {
@@ -171,7 +171,7 @@ void vgic_mmio_write_cenable(struct kvm_vcpu *vcpu, · 42 unmodified lines
171 unsigned long flags;171 unsigned long flags;
172 172
173 for_each_set_bit(i, &val, len * 8) {173 for_each_set_bit(i, &val, len * 8) {
174 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);174 struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);
175 175
176 raw_spin_lock_irqsave(&irq->irq_lock, flags);176 raw_spin_lock_irqsave(&irq->irq_lock, flags);
177 if (irq->hw && vgic_irq_is_sgi(irq->intid) && irq->enabled)177 if (irq->hw && vgic_irq_is_sgi(irq->intid) && irq->enabled)
@@ -193,7 +193,7 @@ int vgic_uaccess_write_senable(struct kvm_vcpu *vcpu, · 15 unmodified lines
193 unsigned long flags;193 unsigned long flags;
194 194
195 for_each_set_bit(i, &val, len * 8) {195 for_each_set_bit(i, &val, len * 8) {
196 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);196 struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);
197 197
198 raw_spin_lock_irqsave(&irq->irq_lock, flags);198 raw_spin_lock_irqsave(&irq->irq_lock, flags);
199 irq->enabled = true;199 irq->enabled = true;
@@ -214,7 +214,7 @@ int vgic_uaccess_write_cenable(struct kvm_vcpu *vcpu, · 14 unmodified lines
214 unsigned long flags;214 unsigned long flags;
215 215
216 for_each_set_bit(i, &val, len * 8) {216 for_each_set_bit(i, &val, len * 8) {
217 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);217 struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);
218 218
219 raw_spin_lock_irqsave(&irq->irq_lock, flags);219 raw_spin_lock_irqsave(&irq->irq_lock, flags);
220 irq->enabled = false;220 irq->enabled = false;
@@ -236,7 +236,7 @@ static unsigned long __read_pending(struct kvm_vcpu *vcpu, · 15 unmodified lines
236 236
237 /* Loop over all IRQs affected by this read */237 /* Loop over all IRQs affected by this read */
238 for (i = 0; i < len * 8; i++) {238 for (i = 0; i < len * 8; i++) {
239 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);239 struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);
240 unsigned long flags;240 unsigned long flags;
241 bool val;241 bool val;
242 242
@@ -309,7 +309,7 @@ static void __set_pending(struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, · 66 unmodified lines
309 unsigned long flags;309 unsigned long flags;
310 310
311 for_each_set_bit(i, &val, len * 8) {311 for_each_set_bit(i, &val, len * 8) {
312 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);312 struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);
313 313
314 /* GICD_ISPENDR0 SGI bits are WI when written from the guest. */314 /* GICD_ISPENDR0 SGI bits are WI when written from the guest. */
315 if (is_vgic_v2_sgi(vcpu, irq) && !is_user) {315 if (is_vgic_v2_sgi(vcpu, irq) && !is_user) {
@@ -395,7 +395,7 @@ static void __clear_pending(struct kvm_vcpu *vcpu, · 79 unmodified lines
395 unsigned long flags;395 unsigned long flags;
396 396
397 for_each_set_bit(i, &val, len * 8) {397 for_each_set_bit(i, &val, len * 8) {
398 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);398 struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);
399 399
400 /* GICD_ICPENDR0 SGI bits are WI when written from the guest. */400 /* GICD_ICPENDR0 SGI bits are WI when written from the guest. */
401 if (is_vgic_v2_sgi(vcpu, irq) && !is_user) {401 if (is_vgic_v2_sgi(vcpu, irq) && !is_user) {
@@ -494,7 +494,7 @@ static unsigned long __vgic_mmio_read_active(struct kvm_vcpu *vcpu, · 92 unmodified lines
494 494
495 /* Loop over all IRQs affected by this read */495 /* Loop over all IRQs affected by this read */
496 for (i = 0; i < len * 8; i++) {496 for (i = 0; i < len * 8; i++) {
497 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);497 struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);
498 498
499 /*499 /*
500 * Even for HW interrupts, don't evaluate the HW state as500 * Even for HW interrupts, don't evaluate the HW state as
@@ -598,7 +598,7 @@ static void __vgic_mmio_write_cactive(struct kvm_vcpu *vcpu, · 97 unmodified lines
598 int i;598 int i;
599 599
600 for_each_set_bit(i, &val, len * 8) {600 for_each_set_bit(i, &val, len * 8) {
601 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);601 struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);
602 vgic_mmio_change_active(vcpu, irq, false);602 vgic_mmio_change_active(vcpu, irq, false);
603 vgic_put_irq(vcpu->kvm, irq);603 vgic_put_irq(vcpu->kvm, irq);
604 }604 }
@@ -635,7 +635,7 @@ static void __vgic_mmio_write_sactive(struct kvm_vcpu *vcpu, · 30 unmodified lines
635 int i;635 int i;
636 636
637 for_each_set_bit(i, &val, len * 8) {637 for_each_set_bit(i, &val, len * 8) {
638 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);638 struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);
639 vgic_mmio_change_active(vcpu, irq, true);639 vgic_mmio_change_active(vcpu, irq, true);
640 vgic_put_irq(vcpu->kvm, irq);640 vgic_put_irq(vcpu->kvm, irq);
641 }641 }
@@ -672,7 +672,7 @@ unsigned long vgic_mmio_read_priority(struct kvm_vcpu *vcpu, · 30 unmodified lines
672 u64 val = 0;672 u64 val = 0;
673 673
674 for (i = 0; i < len; i++) {674 for (i = 0; i < len; i++) {
675 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);675 struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);
676 676
677 val |= (u64)irq->priority << (i * 8);677 val |= (u64)irq->priority << (i * 8);
678 678
@@ -698,7 +698,7 @@ void vgic_mmio_write_priority(struct kvm_vcpu *vcpu, · 19 unmodified lines
698 unsigned long flags;698 unsigned long flags;
699 699
700 for (i = 0; i < len; i++) {700 for (i = 0; i < len; i++) {
701 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);701 struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);
702 702
703 raw_spin_lock_irqsave(&irq->irq_lock, flags);703 raw_spin_lock_irqsave(&irq->irq_lock, flags);
704 /* Narrow the priority range to what we actually support */704 /* Narrow the priority range to what we actually support */
@@ -719,7 +719,7 @@ unsigned long vgic_mmio_read_config(struct kvm_vcpu *vcpu, · 14 unmodified lines
719 int i;719 int i;
720 720
721 for (i = 0; i < len * 4; i++) {721 for (i = 0; i < len * 4; i++) {
722 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);722 struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, intid + i);
723 723
724 if (irq->config == VGIC_CONFIG_EDGE)724 if (irq->config == VGIC_CONFIG_EDGE)
725 value |= (2U << (i * 2));725 value |= (2U << (i * 2));
@@ -750,7 +750,7 @@ void vgic_mmio_write_config(struct kvm_vcpu *vcpu, · 24 unmodified lines
750 if (intid + i < VGIC_NR_PRIVATE_IRQS)750 if (intid + i < VGIC_NR_PRIVATE_IRQS)
751 continue;751 continue;
752 752
753 irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);753 irq = vgic_get_irq(vcpu->kvm, intid + i);
754 raw_spin_lock_irqsave(&irq->irq_lock, flags);754 raw_spin_lock_irqsave(&irq->irq_lock, flags);
755 755
756 if (test_bit(i * 2 + 1, &val))756 if (test_bit(i * 2 + 1, &val))
@@ -775,7 +775,7 @@ u32 vgic_read_irq_line_level_info(struct kvm_vcpu *vcpu, u32 intid) · 18 unmodified lines
775 if ((intid + i) < VGIC_NR_SGIS || (intid + i) >= nr_irqs)775 if ((intid + i) < VGIC_NR_SGIS || (intid + i) >= nr_irqs)
776 continue;776 continue;
777 777
778 irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);778 irq = vgic_get_vcpu_irq(vcpu, intid + i);
779 if (irq->config == VGIC_CONFIG_LEVEL && irq->line_level)779 if (irq->config == VGIC_CONFIG_LEVEL && irq->line_level)
780 val |= (1U << i);780 val |= (1U << i);
781 781
@@ -799,7 +799,7 @@ void vgic_write_irq_line_level_info(struct kvm_vcpu *vcpu, u32 intid, · 17 unmodified lines
799 if ((intid + i) < VGIC_NR_SGIS || (intid + i) >= nr_irqs)799 if ((intid + i) < VGIC_NR_SGIS || (intid + i) >= nr_irqs)
800 continue;800 continue;
801 801
802 irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);802 irq = vgic_get_vcpu_irq(vcpu, intid + i);
803 803
804 /*804 /*
805 * Line level is set irrespective of irq type805 * Line level is set irrespective of irq type
arch/arm64/kvm/vgic/vgic-v2.c+1−1
@@ -72,7 +72,7 @@ void vgic_v2_fold_lr_state(struct kvm_vcpu *vcpu) · 71 unmodified lines
72 kvm_notify_acked_irq(vcpu->kvm, 0,72 kvm_notify_acked_irq(vcpu->kvm, 0,
73 intid - VGIC_NR_PRIVATE_IRQS);73 intid - VGIC_NR_PRIVATE_IRQS);
74 74
75 irq = vgic_get_irq(vcpu->kvm, vcpu, intid);75 irq = vgic_get_vcpu_irq(vcpu, intid);
76 76
77 raw_spin_lock(&irq->irq_lock);77 raw_spin_lock(&irq->irq_lock);
78 78
arch/arm64/kvm/vgic/vgic-v3.c+1−1
@@ -65,7 +65,7 @@ void vgic_v3_fold_lr_state(struct kvm_vcpu *vcpu) · 64 unmodified lines
65 kvm_notify_acked_irq(vcpu->kvm, 0,65 kvm_notify_acked_irq(vcpu->kvm, 0,
66 intid - VGIC_NR_PRIVATE_IRQS);66 intid - VGIC_NR_PRIVATE_IRQS);
67 67
68 irq = vgic_get_irq(vcpu->kvm, vcpu, intid);68 irq = vgic_get_vcpu_irq(vcpu, intid);
69 if (!irq) /* An LPI could have been unmapped. */69 if (!irq) /* An LPI could have been unmapped. */
70 continue;70 continue;
71 71
arch/arm64/kvm/vgic/vgic-v4.c+2−2
@@ -123,7 +123,7 @@ static void vgic_v4_enable_vsgis(struct kvm_vcpu *vcpu) · 122 unmodified lines
123 * IRQ. The SGI code will do its magic.123 * IRQ. The SGI code will do its magic.
124 */124 */
125 for (i = 0; i < VGIC_NR_SGIS; i++) {125 for (i = 0; i < VGIC_NR_SGIS; i++) {
126 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, i);126 struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, i);
127 struct irq_desc *desc;127 struct irq_desc *desc;
128 unsigned long flags;128 unsigned long flags;
129 int ret;129 int ret;
@@ -160,7 +160,7 @@ static void vgic_v4_disable_vsgis(struct kvm_vcpu *vcpu) · 30 unmodified lines
160 int i;160 int i;
161 161
162 for (i = 0; i < VGIC_NR_SGIS; i++) {162 for (i = 0; i < VGIC_NR_SGIS; i++) {
163 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, i);163 struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, i);
164 struct irq_desc *desc;164 struct irq_desc *desc;
165 unsigned long flags;165 unsigned long flags;
166 int ret;166 int ret;
arch/arm64/kvm/vgic/vgic.c+27−16
@@ -84,17 +84,11 @@ static struct vgic_irq *vgic_get_lpi(struct kvm *kvm, u32 intid) · 83 unmodified lines
84 * struct vgic_irq. It also increases the refcount, so any caller is expected84 * struct vgic_irq. It also increases the refcount, so any caller is expected
85 * to call vgic_put_irq() once it's finished with this IRQ.85 * to call vgic_put_irq() once it's finished with this IRQ.
86 */86 */
87struct vgic_irq *vgic_get_irq(struct kvm *kvm, struct kvm_vcpu *vcpu,87struct vgic_irq *vgic_get_irq(struct kvm *kvm, u32 intid)
88 u32 intid)
89{88{
90 /* SGIs and PPIs */
91 if (intid <= VGIC_MAX_PRIVATE) {
92 intid = array_index_nospec(intid, VGIC_MAX_PRIVATE + 1);
93 return &vcpu->arch.vgic_cpu.private_irqs[intid];
94 }
95
96 /* SPIs */89 /* SPIs */
97 if (intid < (kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS)) {90 if (intid >= VGIC_NR_PRIVATE_IRQS &&
91 intid < (kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS)) {
98 intid = array_index_nospec(intid, kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS);92 intid = array_index_nospec(intid, kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS);
99 return &kvm->arch.vgic.spis[intid - VGIC_NR_PRIVATE_IRQS];93 return &kvm->arch.vgic.spis[intid - VGIC_NR_PRIVATE_IRQS];
100 }94 }
@@ -106,6 +100,20 @@ struct vgic_irq *vgic_get_irq(struct kvm *kvm, struct kvm_vcpu *vcpu, · 5 unmodified lines
106 return NULL;100 return NULL;
107}101}
108 102
103struct vgic_irq *vgic_get_vcpu_irq(struct kvm_vcpu *vcpu, u32 intid)
104{
105 if (WARN_ON(!vcpu))
106 return NULL;
107
108 /* SGIs and PPIs */
109 if (intid < VGIC_NR_PRIVATE_IRQS) {
110 intid = array_index_nospec(intid, VGIC_NR_PRIVATE_IRQS);
111 return &vcpu->arch.vgic_cpu.private_irqs[intid];
112 }
113
114 return vgic_get_irq(vcpu->kvm, intid);
115}
116
109/*117/*
110 * We can't do anything in here, because we lack the kvm pointer to118 * We can't do anything in here, because we lack the kvm pointer to
111 * lock and remove the item from the lpi_list. So we keep this function119 * lock and remove the item from the lpi_list. So we keep this function
@@ -437,7 +445,10 @@ int kvm_vgic_inject_irq(struct kvm *kvm, struct kvm_vcpu *vcpu, · 325 unmodified lines
437 445
438 trace_vgic_update_irq_pending(vcpu ? vcpu->vcpu_idx : 0, intid, level);446 trace_vgic_update_irq_pending(vcpu ? vcpu->vcpu_idx : 0, intid, level);
439 447
440 irq = vgic_get_irq(kvm, vcpu, intid);448 if (intid < VGIC_NR_PRIVATE_IRQS)
449 irq = vgic_get_vcpu_irq(vcpu, intid);
450 else
451 irq = vgic_get_irq(kvm, intid);
441 if (!irq)452 if (!irq)
442 return -EINVAL;453 return -EINVAL;
443 454
@@ -499,7 +510,7 @@ static inline void kvm_vgic_unmap_irq(struct vgic_irq *irq) · 55 unmodified lines
499int kvm_vgic_map_phys_irq(struct kvm_vcpu *vcpu, unsigned int host_irq,510int kvm_vgic_map_phys_irq(struct kvm_vcpu *vcpu, unsigned int host_irq,
500 u32 vintid, struct irq_ops *ops)511 u32 vintid, struct irq_ops *ops)
501{512{
502 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, vintid);513 struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, vintid);
503 unsigned long flags;514 unsigned long flags;
504 int ret;515 int ret;
505 516
@@ -524,7 +535,7 @@ int kvm_vgic_map_phys_irq(struct kvm_vcpu *vcpu, unsigned int host_irq, · 18 unmodified lines
524 */535 */
525void kvm_vgic_reset_mapped_irq(struct kvm_vcpu *vcpu, u32 vintid)536void kvm_vgic_reset_mapped_irq(struct kvm_vcpu *vcpu, u32 vintid)
526{537{
527 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, vintid);538 struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, vintid);
528 unsigned long flags;539 unsigned long flags;
529 540
530 if (!irq->hw)541 if (!irq->hw)
@@ -547,7 +558,7 @@ int kvm_vgic_unmap_phys_irq(struct kvm_vcpu *vcpu, unsigned int vintid) · 16 unmodified lines
547 if (!vgic_initialized(vcpu->kvm))558 if (!vgic_initialized(vcpu->kvm))
548 return -EAGAIN;559 return -EAGAIN;
549 560
550 irq = vgic_get_irq(vcpu->kvm, vcpu, vintid);561 irq = vgic_get_vcpu_irq(vcpu, vintid);
551 BUG_ON(!irq);562 BUG_ON(!irq);
552 563
553 raw_spin_lock_irqsave(&irq->irq_lock, flags);564 raw_spin_lock_irqsave(&irq->irq_lock, flags);
@@ -560,7 +571,7 @@ int kvm_vgic_unmap_phys_irq(struct kvm_vcpu *vcpu, unsigned int vintid) · 6 unmodified lines
560 571
561int kvm_vgic_get_map(struct kvm_vcpu *vcpu, unsigned int vintid)572int kvm_vgic_get_map(struct kvm_vcpu *vcpu, unsigned int vintid)
562{573{
563 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, vintid);574 struct vgic_irq *irq = vgic_get_vcpu_irq(vcpu, vintid);
564 unsigned long flags;575 unsigned long flags;
565 int ret = -1;576 int ret = -1;
566 577
@@ -596,7 +607,7 @@ int kvm_vgic_set_owner(struct kvm_vcpu *vcpu, unsigned int intid, void *owner) · 29 unmodified lines
596 if (!irq_is_ppi(intid) && !vgic_valid_spi(vcpu->kvm, intid))607 if (!irq_is_ppi(intid) && !vgic_valid_spi(vcpu->kvm, intid))
597 return -EINVAL;608 return -EINVAL;
598 609
599 irq = vgic_get_irq(vcpu->kvm, vcpu, intid);610 irq = vgic_get_vcpu_irq(vcpu, intid);
600 raw_spin_lock_irqsave(&irq->irq_lock, flags);611 raw_spin_lock_irqsave(&irq->irq_lock, flags);
601 if (irq->owner && irq->owner != owner)612 if (irq->owner && irq->owner != owner)
602 ret = -EEXIST;613 ret = -EEXIST;
@@ -1008,7 +1019,7 @@ bool kvm_vgic_map_is_active(struct kvm_vcpu *vcpu, unsigned int vintid) · 405 unmodified lines
1008 if (!vgic_initialized(vcpu->kvm))1019 if (!vgic_initialized(vcpu->kvm))
1009 return false;1020 return false;
1010 1021
1011 irq = vgic_get_irq(vcpu->kvm, vcpu, vintid);1022 irq = vgic_get_vcpu_irq(vcpu, vintid);
1012 raw_spin_lock_irqsave(&irq->irq_lock, flags);1023 raw_spin_lock_irqsave(&irq->irq_lock, flags);
1013 map_is_active = irq->hw && irq->active;1024 map_is_active = irq->hw && irq->active;
1014 raw_spin_unlock_irqrestore(&irq->irq_lock, flags);1025 raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
arch/arm64/kvm/vgic/vgic.h+2−25
@@ -146,29 +146,6 @@ static inline int vgic_write_guest_lock(struct kvm *kvm, gpa_t gpa, · 145 unmodified lines
146 return ret;146 return ret;
147}147}
148 148
149static inline int vgic_its_read_entry_lock(struct vgic_its *its, gpa_t eaddr,
150 u64 *eval, unsigned long esize)
151{
152 struct kvm *kvm = its->dev->kvm;
153
154 if (KVM_BUG_ON(esize != sizeof(*eval), kvm))
155 return -EINVAL;
156
157 return kvm_read_guest_lock(kvm, eaddr, eval, esize);
158
159}
160
161static inline int vgic_its_write_entry_lock(struct vgic_its *its, gpa_t eaddr,
162 u64 eval, unsigned long esize)
163{
164 struct kvm *kvm = its->dev->kvm;
165
166 if (KVM_BUG_ON(esize != sizeof(eval), kvm))
167 return -EINVAL;
168
169 return vgic_write_guest_lock(kvm, eaddr, &eval, esize);
170}
171
172/*149/*
173 * This struct provides an intermediate representation of the fields contained150 * This struct provides an intermediate representation of the fields contained
174 * in the GICH_VMCR and ICH_VMCR registers, such that code exporting the GIC151 * in the GICH_VMCR and ICH_VMCR registers, such that code exporting the GIC
@@ -202,8 +179,8 @@ int vgic_v2_parse_attr(struct kvm_device *dev, struct kvm_device_attr *attr, · 27 unmodified lines
202const struct vgic_register_region *179const struct vgic_register_region *
203vgic_get_mmio_region(struct kvm_vcpu *vcpu, struct vgic_io_device *iodev,180vgic_get_mmio_region(struct kvm_vcpu *vcpu, struct vgic_io_device *iodev,
204 gpa_t addr, int len);181 gpa_t addr, int len);
205struct vgic_irq *vgic_get_irq(struct kvm *kvm, struct kvm_vcpu *vcpu,182struct vgic_irq *vgic_get_irq(struct kvm *kvm, u32 intid);
206 u32 intid);183struct vgic_irq *vgic_get_vcpu_irq(struct kvm_vcpu *vcpu, u32 intid);
207void vgic_put_irq(struct kvm *kvm, struct vgic_irq *irq);184void vgic_put_irq(struct kvm *kvm, struct vgic_irq *irq);
208bool vgic_get_phys_line_level(struct vgic_irq *irq);185bool vgic_get_phys_line_level(struct vgic_irq *irq);
209void vgic_irq_set_phys_pending(struct vgic_irq *irq, bool pending);186void vgic_irq_set_phys_pending(struct vgic_irq *irq, bool pending);
arch/hexagon/include/asm/spinlock_types.h+1−1
@@ -9,7 +9,7 @@ · 8 unmodified lines
9#define _ASM_SPINLOCK_TYPES_H9#define _ASM_SPINLOCK_TYPES_H
10 10
11#ifndef __LINUX_SPINLOCK_TYPES_RAW_H11#ifndef __LINUX_SPINLOCK_TYPES_RAW_H
12# error "please don't include this file directly"12# error "Please do not include this file directly."
13#endif13#endif
14 14
15typedef struct {15typedef struct {
arch/loongarch/Kconfig+3−0
@@ -23,6 +23,7 @@ config LOONGARCH · 22 unmodified lines
23 select ARCH_HAS_KERNEL_FPU_SUPPORT if CPU_HAS_FPU23 select ARCH_HAS_KERNEL_FPU_SUPPORT if CPU_HAS_FPU
24 select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS24 select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS
25 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE25 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE
26 select ARCH_HAS_PREEMPT_LAZY
26 select ARCH_HAS_PTE_DEVMAP27 select ARCH_HAS_PTE_DEVMAP
27 select ARCH_HAS_PTE_SPECIAL28 select ARCH_HAS_PTE_SPECIAL
28 select ARCH_HAS_SET_MEMORY29 select ARCH_HAS_SET_MEMORY
@@ -66,6 +67,7 @@ config LOONGARCH · 37 unmodified lines
66 select ARCH_SUPPORTS_LTO_CLANG67 select ARCH_SUPPORTS_LTO_CLANG
67 select ARCH_SUPPORTS_LTO_CLANG_THIN68 select ARCH_SUPPORTS_LTO_CLANG_THIN
68 select ARCH_SUPPORTS_NUMA_BALANCING69 select ARCH_SUPPORTS_NUMA_BALANCING
70 select ARCH_SUPPORTS_RT
69 select ARCH_USE_BUILTIN_BSWAP71 select ARCH_USE_BUILTIN_BSWAP
70 select ARCH_USE_CMPXCHG_LOCKREF72 select ARCH_USE_CMPXCHG_LOCKREF
71 select ARCH_USE_QUEUED_RWLOCKS73 select ARCH_USE_QUEUED_RWLOCKS
@@ -155,6 +157,7 @@ config LOONGARCH · 83 unmodified lines
155 select HAVE_PERF_EVENTS157 select HAVE_PERF_EVENTS
156 select HAVE_PERF_REGS158 select HAVE_PERF_REGS
157 select HAVE_PERF_USER_STACK_DUMP159 select HAVE_PERF_USER_STACK_DUMP
160 select HAVE_POSIX_CPU_TIMERS_TASK_WORK
158 select HAVE_PREEMPT_DYNAMIC_KEY161 select HAVE_PREEMPT_DYNAMIC_KEY
159 select HAVE_REGS_AND_STACK_ACCESS_API162 select HAVE_REGS_AND_STACK_ACCESS_API
160 select HAVE_RELIABLE_STACKTRACE if UNWINDER_ORC163 select HAVE_RELIABLE_STACKTRACE if UNWINDER_ORC
arch/loongarch/Makefile+2−2
@@ -59,7 +59,7 @@ endif · 58 unmodified lines
59 59
60ifdef CONFIG_64BIT60ifdef CONFIG_64BIT
61ld-emul = $(64bit-emul)61ld-emul = $(64bit-emul)
62cflags-y += -mabi=lp64s62cflags-y += -mabi=lp64s -mcmodel=normal
63endif63endif
64 64
65cflags-y += -pipe $(CC_FLAGS_NO_FPU)65cflags-y += -pipe $(CC_FLAGS_NO_FPU)
@@ -104,7 +104,7 @@ ifdef CONFIG_OBJTOOL · 38 unmodified lines
104KBUILD_CFLAGS += -fno-jump-tables104KBUILD_CFLAGS += -fno-jump-tables
105endif105endif
106 106
107KBUILD_RUSTFLAGS += --target=loongarch64-unknown-none-softfloat107KBUILD_RUSTFLAGS += --target=loongarch64-unknown-none-softfloat -Ccode-model=small
108KBUILD_RUSTFLAGS_KERNEL += -Zdirect-access-external-data=yes108KBUILD_RUSTFLAGS_KERNEL += -Zdirect-access-external-data=yes
109KBUILD_RUSTFLAGS_MODULE += -Zdirect-access-external-data=no109KBUILD_RUSTFLAGS_MODULE += -Zdirect-access-external-data=no
110 110
arch/loongarch/boot/dts/loongson-2k1000.dtsi+15−2
@@ -266,7 +266,7 @@ · 265 unmodified lines
266 status = "disabled";266 status = "disabled";
267 };267 };
268 268
269 dma-controller@1fe00c20 {269 apbdma2: dma-controller@1fe00c20 {
270 compatible = "loongson,ls2k1000-apbdma";270 compatible = "loongson,ls2k1000-apbdma";
271 reg = <0x0 0x1fe00c20 0x0 0x8>;271 reg = <0x0 0x1fe00c20 0x0 0x8>;
272 interrupt-parent = <&liointc1>;272 interrupt-parent = <&liointc1>;
@@ -276,7 +276,7 @@ · 3 unmodified lines
276 status = "disabled";276 status = "disabled";
277 };277 };
278 278
279 dma-controller@1fe00c30 {279 apbdma3: dma-controller@1fe00c30 {
280 compatible = "loongson,ls2k1000-apbdma";280 compatible = "loongson,ls2k1000-apbdma";
281 reg = <0x0 0x1fe00c30 0x0 0x8>;281 reg = <0x0 0x1fe00c30 0x0 0x8>;
282 interrupt-parent = <&liointc1>;282 interrupt-parent = <&liointc1>;
@@ -352,6 +352,19 @@ · 69 unmodified lines
352 status = "disabled";352 status = "disabled";
353 };353 };
354 354
355 i2s: i2s@1fe2d000 {
356 compatible = "loongson,ls2k1000-i2s";
357 reg = <0 0x1fe2d000 0 0x14>,
358 <0 0x1fe00438 0 0x8>;
359 interrupt-parent = <&liointc0>;
360 interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
361 clocks = <&clk LOONGSON2_APB_CLK>;
362 dmas = <&apbdma2 0>, <&apbdma3 0>;
363 dma-names = "tx", "rx";
364 #sound-dai-cells = <0>;
365 status = "disabled";
366 };
367
355 spi0: spi@1fff0220 {368 spi0: spi@1fff0220 {
356 compatible = "loongson,ls2k1000-spi";369 compatible = "loongson,ls2k1000-spi";
357 reg = <0x0 0x1fff0220 0x0 0x10>;370 reg = <0x0 0x1fff0220 0x0 0x10>;
arch/loongarch/boot/dts/loongson-2k2000.dtsi+20−2
@@ -173,6 +173,22 @@ · 172 unmodified lines
173 status = "disabled";173 status = "disabled";
174 };174 };
175 175
176 i2c@1fe00120 {
177 compatible = "loongson,ls2k-i2c";
178 reg = <0x0 0x1fe00120 0x0 0x8>;
179 interrupt-parent = <&liointc>;
180 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
181 status = "disabled";
182 };
183
184 i2c@1fe00130 {
185 compatible = "loongson,ls2k-i2c";
186 reg = <0x0 0x1fe00130 0x0 0x8>;
187 interrupt-parent = <&liointc>;
188 interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
189 status = "disabled";
190 };
191
176 uart0: serial@1fe001e0 {192 uart0: serial@1fe001e0 {
177 compatible = "ns16550a";193 compatible = "ns16550a";
178 reg = <0x0 0x1fe001e0 0x0 0x10>;194 reg = <0x0 0x1fe001e0 0x0 0x10>;
@@ -243,9 +259,11 @@ · 64 unmodified lines
243 status = "disabled";259 status = "disabled";
244 };260 };
245 261
246 hda@7,0 {262 i2s@7,0 {
247 reg = <0x3800 0x0 0x0 0x0 0x0>;263 reg = <0x3800 0x0 0x0 0x0 0x0>;
248 interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;264 interrupts = <78 IRQ_TYPE_LEVEL_HIGH>,
265 <79 IRQ_TYPE_LEVEL_HIGH>;
266 interrupt-names = "tx", "rx";
249 interrupt-parent = <&pic>;267 interrupt-parent = <&pic>;
250 status = "disabled";268 status = "disabled";
251 };269 };
arch/loongarch/configs/loongson3_defconfig+82−11
@@ -1,4 +1,5 @@
1# CONFIG_LOCALVERSION_AUTO is not set1# CONFIG_LOCALVERSION_AUTO is not set
2CONFIG_KERNEL_ZSTD=y
2CONFIG_SYSVIPC=y3CONFIG_SYSVIPC=y
3CONFIG_POSIX_MQUEUE=y4CONFIG_POSIX_MQUEUE=y
4CONFIG_NO_HZ=y5CONFIG_NO_HZ=y
@@ -70,6 +71,14 @@ CONFIG_ACPI_IPMI=m · 65 unmodified lines
70CONFIG_ACPI_HOTPLUG_CPU=y71CONFIG_ACPI_HOTPLUG_CPU=y
71CONFIG_ACPI_PCI_SLOT=y72CONFIG_ACPI_PCI_SLOT=y
72CONFIG_ACPI_HOTPLUG_MEMORY=y73CONFIG_ACPI_HOTPLUG_MEMORY=y
74CONFIG_ACPI_BGRT=y
75CONFIG_CPU_FREQ=y
76CONFIG_CPU_FREQ_GOV_POWERSAVE=y
77CONFIG_CPU_FREQ_GOV_USERSPACE=y
78CONFIG_CPU_FREQ_GOV_ONDEMAND=y
79CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
80CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
81CONFIG_LOONGSON3_CPUFREQ=m
73CONFIG_VIRTUALIZATION=y82CONFIG_VIRTUALIZATION=y
74CONFIG_KVM=m83CONFIG_KVM=m
75CONFIG_JUMP_LABEL=y84CONFIG_JUMP_LABEL=y
@@ -78,6 +87,9 @@ CONFIG_MODULE_FORCE_LOAD=y · 2 unmodified lines
78CONFIG_MODULE_UNLOAD=y87CONFIG_MODULE_UNLOAD=y
79CONFIG_MODULE_FORCE_UNLOAD=y88CONFIG_MODULE_FORCE_UNLOAD=y
80CONFIG_MODVERSIONS=y89CONFIG_MODVERSIONS=y
90CONFIG_MODULE_COMPRESS=y
91CONFIG_MODULE_COMPRESS_ZSTD=y
92CONFIG_MODULE_DECOMPRESS=y
81CONFIG_BLK_DEV_ZONED=y93CONFIG_BLK_DEV_ZONED=y
82CONFIG_BLK_DEV_THROTTLING=y94CONFIG_BLK_DEV_THROTTLING=y
83CONFIG_BLK_WBT=y95CONFIG_BLK_WBT=y
@@ -85,6 +97,8 @@ CONFIG_BLK_CGROUP_IOLATENCY=y · 1 unmodified line
85CONFIG_BLK_CGROUP_FC_APPID=y97CONFIG_BLK_CGROUP_FC_APPID=y
86CONFIG_BLK_CGROUP_IOCOST=y98CONFIG_BLK_CGROUP_IOCOST=y
87CONFIG_BLK_CGROUP_IOPRIO=y99CONFIG_BLK_CGROUP_IOPRIO=y
100CONFIG_BLK_INLINE_ENCRYPTION=y
101CONFIG_BLK_INLINE_ENCRYPTION_FALLBACK=y
88CONFIG_PARTITION_ADVANCED=y102CONFIG_PARTITION_ADVANCED=y
89CONFIG_BSD_DISKLABEL=y103CONFIG_BSD_DISKLABEL=y
90CONFIG_UNIXWARE_DISKLABEL=y104CONFIG_UNIXWARE_DISKLABEL=y
@@ -413,7 +427,16 @@ CONFIG_PARPORT_PC=y · 322 unmodified lines
413CONFIG_PARPORT_SERIAL=y427CONFIG_PARPORT_SERIAL=y
414CONFIG_PARPORT_PC_FIFO=y428CONFIG_PARPORT_PC_FIFO=y
415CONFIG_ZRAM=m429CONFIG_ZRAM=m
430CONFIG_ZRAM_BACKEND_LZ4=y
431CONFIG_ZRAM_BACKEND_LZ4HC=y
432CONFIG_ZRAM_BACKEND_ZSTD=y
433CONFIG_ZRAM_BACKEND_DEFLATE=y
434CONFIG_ZRAM_BACKEND_842=y
435CONFIG_ZRAM_BACKEND_LZO=y
416CONFIG_ZRAM_DEF_COMP_ZSTD=y436CONFIG_ZRAM_DEF_COMP_ZSTD=y
437CONFIG_ZRAM_WRITEBACK=y
438CONFIG_ZRAM_MEMORY_TRACKING=y
439CONFIG_ZRAM_MULTI_COMP=y
417CONFIG_BLK_DEV_LOOP=y440CONFIG_BLK_DEV_LOOP=y
418CONFIG_BLK_DEV_DRBD=m441CONFIG_BLK_DEV_DRBD=m
419CONFIG_BLK_DEV_NBD=m442CONFIG_BLK_DEV_NBD=m
@@ -433,6 +456,9 @@ CONFIG_NVME_TARGET_RDMA=m · 13 unmodified lines
433CONFIG_NVME_TARGET_FC=m456CONFIG_NVME_TARGET_FC=m
434CONFIG_NVME_TARGET_TCP=m457CONFIG_NVME_TARGET_TCP=m
435CONFIG_EEPROM_AT24=m458CONFIG_EEPROM_AT24=m
459CONFIG_PVPANIC=y
460CONFIG_PVPANIC_MMIO=m
461CONFIG_PVPANIC_PCI=m
436CONFIG_BLK_DEV_SD=y462CONFIG_BLK_DEV_SD=y
437CONFIG_BLK_DEV_SR=y463CONFIG_BLK_DEV_SR=y
438CONFIG_CHR_DEV_SG=y464CONFIG_CHR_DEV_SG=y
@@ -470,12 +496,10 @@ CONFIG_PATA_ATIIXP=y · 31 unmodified lines
470CONFIG_PATA_PCMCIA=m496CONFIG_PATA_PCMCIA=m
471CONFIG_MD=y497CONFIG_MD=y
472CONFIG_BLK_DEV_MD=m498CONFIG_BLK_DEV_MD=m
473CONFIG_MD_LINEAR=m
474CONFIG_MD_RAID0=m499CONFIG_MD_RAID0=m
475CONFIG_MD_RAID1=m500CONFIG_MD_RAID1=m
476CONFIG_MD_RAID10=m501CONFIG_MD_RAID10=m
477CONFIG_MD_RAID456=m502CONFIG_MD_RAID456=m
478CONFIG_MD_MULTIPATH=m
479CONFIG_BCACHE=m503CONFIG_BCACHE=m
480CONFIG_BLK_DEV_DM=y504CONFIG_BLK_DEV_DM=y
481CONFIG_DM_CRYPT=m505CONFIG_DM_CRYPT=m
@@ -489,6 +513,16 @@ CONFIG_DM_ZERO=m · 7 unmodified lines
489CONFIG_DM_MULTIPATH=m513CONFIG_DM_MULTIPATH=m
490CONFIG_DM_MULTIPATH_QL=m514CONFIG_DM_MULTIPATH_QL=m
491CONFIG_DM_MULTIPATH_ST=m515CONFIG_DM_MULTIPATH_ST=m
516CONFIG_DM_MULTIPATH_HST=m
517CONFIG_DM_MULTIPATH_IOA=m
518CONFIG_DM_INIT=y
519CONFIG_DM_UEVENT=y
520CONFIG_DM_VERITY=m
521CONFIG_DM_VERITY_VERIFY_ROOTHASH_SIG=y
522CONFIG_DM_VERITY_FEC=y
523CONFIG_DM_INTEGRITY=m
524CONFIG_DM_ZONED=m
525CONFIG_DM_VDO=m
492CONFIG_TARGET_CORE=m526CONFIG_TARGET_CORE=m
493CONFIG_TCM_IBLOCK=m527CONFIG_TCM_IBLOCK=m
494CONFIG_TCM_FILEIO=m528CONFIG_TCM_FILEIO=m
@@ -500,6 +534,13 @@ CONFIG_NETDEVICES=y · 5 unmodified lines
500CONFIG_BONDING=m534CONFIG_BONDING=m
501CONFIG_DUMMY=y535CONFIG_DUMMY=y
502CONFIG_WIREGUARD=m536CONFIG_WIREGUARD=m
537CONFIG_IFB=m
538CONFIG_NET_TEAM=m
539CONFIG_NET_TEAM_MODE_BROADCAST=m
540CONFIG_NET_TEAM_MODE_ROUNDROBIN=m
541CONFIG_NET_TEAM_MODE_RANDOM=m
542CONFIG_NET_TEAM_MODE_ACTIVEBACKUP=m
543CONFIG_NET_TEAM_MODE_LOADBALANCE=m
503CONFIG_MACVLAN=m544CONFIG_MACVLAN=m
504CONFIG_MACVTAP=m545CONFIG_MACVTAP=m
505CONFIG_IPVLAN=m546CONFIG_IPVLAN=m
@@ -580,12 +621,14 @@ CONFIG_PPP_ASYNC=m · 74 unmodified lines
580CONFIG_PPP_SYNC_TTY=m621CONFIG_PPP_SYNC_TTY=m
581CONFIG_USB_RTL8150=m622CONFIG_USB_RTL8150=m
582CONFIG_USB_RTL8152=m623CONFIG_USB_RTL8152=m
624CONFIG_USB_USBNET=m
583# CONFIG_USB_NET_AX8817X is not set625# CONFIG_USB_NET_AX8817X is not set
584# CONFIG_USB_NET_AX88179_178A is not set626# CONFIG_USB_NET_AX88179_178A is not set
585CONFIG_USB_NET_CDC_EEM=m627CONFIG_USB_NET_CDC_EEM=m
586CONFIG_USB_NET_HUAWEI_CDC_NCM=m628CONFIG_USB_NET_HUAWEI_CDC_NCM=m
587CONFIG_USB_NET_CDC_MBIM=m629CONFIG_USB_NET_CDC_MBIM=m
588# CONFIG_USB_NET_NET1080 is not set630# CONFIG_USB_NET_NET1080 is not set
631CONFIG_USB_NET_RNDIS_HOST=m
589# CONFIG_USB_BELKIN is not set632# CONFIG_USB_BELKIN is not set
590# CONFIG_USB_ARMLINUX is not set633# CONFIG_USB_ARMLINUX is not set
591# CONFIG_USB_NET_ZAURUS is not set634# CONFIG_USB_NET_ZAURUS is not set
@@ -594,10 +637,11 @@ CONFIG_ATH9K_HTC=m · 2 unmodified lines
594CONFIG_IWLWIFI=m637CONFIG_IWLWIFI=m
595CONFIG_IWLDVM=m638CONFIG_IWLDVM=m
596CONFIG_IWLMVM=m639CONFIG_IWLMVM=m
597CONFIG_HOSTAP=m
598CONFIG_MT7601U=m640CONFIG_MT7601U=m
599CONFIG_RT2X00=m641CONFIG_RT2X00=m
600CONFIG_RT2800USB=m642CONFIG_RT2800USB=m
643CONFIG_RTL8180=m
644CONFIG_RTL8187=m
601CONFIG_RTL8192CE=m645CONFIG_RTL8192CE=m
602CONFIG_RTL8192SE=m646CONFIG_RTL8192SE=m
603CONFIG_RTL8192DE=m647CONFIG_RTL8192DE=m
@@ -607,18 +651,26 @@ CONFIG_RTL8188EE=m · 3 unmodified lines
607CONFIG_RTL8192EE=m651CONFIG_RTL8192EE=m
608CONFIG_RTL8821AE=m652CONFIG_RTL8821AE=m
609CONFIG_RTL8192CU=m653CONFIG_RTL8192CU=m
654CONFIG_RTL8192DU=m
610# CONFIG_RTLWIFI_DEBUG is not set655# CONFIG_RTLWIFI_DEBUG is not set
611CONFIG_RTL8XXXU=m656CONFIG_RTL8XXXU=m
612CONFIG_RTW88=m657CONFIG_RTW88=m
613CONFIG_RTW88_8822BE=m658CONFIG_RTW88_8822BE=m
659CONFIG_RTW88_8822BU=m
614CONFIG_RTW88_8822CE=m660CONFIG_RTW88_8822CE=m
661CONFIG_RTW88_8822CU=m
615CONFIG_RTW88_8723DE=m662CONFIG_RTW88_8723DE=m
663CONFIG_RTW88_8723DU=m
616CONFIG_RTW88_8821CE=m664CONFIG_RTW88_8821CE=m
665CONFIG_RTW88_8821CU=m
617CONFIG_RTW89=m666CONFIG_RTW89=m
667CONFIG_RTW89_8851BE=m
618CONFIG_RTW89_8852AE=m668CONFIG_RTW89_8852AE=m
669CONFIG_RTW89_8852BE=m
670CONFIG_RTW89_8852BTE=m
619CONFIG_RTW89_8852CE=m671CONFIG_RTW89_8852CE=m
672CONFIG_RTW89_8922AE=m
620CONFIG_ZD1211RW=m673CONFIG_ZD1211RW=m
621CONFIG_USB_NET_RNDIS_WLAN=m
622CONFIG_USB4_NET=m674CONFIG_USB4_NET=m
623CONFIG_INPUT_MOUSEDEV=y675CONFIG_INPUT_MOUSEDEV=y
624CONFIG_INPUT_MOUSEDEV_PSAUX=y676CONFIG_INPUT_MOUSEDEV_PSAUX=y
@@ -651,6 +703,9 @@ CONFIG_HW_RANDOM=y · 26 unmodified lines
651CONFIG_HW_RANDOM_VIRTIO=m703CONFIG_HW_RANDOM_VIRTIO=m
652CONFIG_I2C_CHARDEV=y704CONFIG_I2C_CHARDEV=y
653CONFIG_I2C_PIIX4=y705CONFIG_I2C_PIIX4=y
706CONFIG_I2C_DESIGNWARE_CORE=y
707CONFIG_I2C_DESIGNWARE_SLAVE=y
708CONFIG_I2C_DESIGNWARE_PCI=y
654CONFIG_I2C_GPIO=y709CONFIG_I2C_GPIO=y
655CONFIG_I2C_LS2X=y710CONFIG_I2C_LS2X=y
656CONFIG_SPI=y711CONFIG_SPI=y
@@ -727,11 +782,22 @@ CONFIG_SND_HDA_CODEC_CONEXANT=y · 70 unmodified lines
727CONFIG_SND_USB_AUDIO=m782CONFIG_SND_USB_AUDIO=m
728CONFIG_SND_SOC=m783CONFIG_SND_SOC=m
729CONFIG_SND_SOC_LOONGSON_CARD=m784CONFIG_SND_SOC_LOONGSON_CARD=m
785CONFIG_SND_SOC_ES7134=m
786CONFIG_SND_SOC_ES7241=m
787CONFIG_SND_SOC_ES8311=m
788CONFIG_SND_SOC_ES8316=m
789CONFIG_SND_SOC_ES8323=m
790CONFIG_SND_SOC_ES8326=m
791CONFIG_SND_SOC_ES8328_I2C=m
792CONFIG_SND_SOC_ES8328_SPI=m
793CONFIG_SND_SOC_UDA1334=m
794CONFIG_SND_SOC_UDA1342=m
730CONFIG_SND_VIRTIO=m795CONFIG_SND_VIRTIO=m
731CONFIG_HIDRAW=y796CONFIG_HIDRAW=y
732CONFIG_UHID=m797CONFIG_UHID=m
733CONFIG_HID_A4TECH=m798CONFIG_HID_A4TECH=m
734CONFIG_HID_CHERRY=m799CONFIG_HID_CHERRY=m
800CONFIG_HID_ELAN=m
735CONFIG_HID_LOGITECH=m801CONFIG_HID_LOGITECH=m
736CONFIG_HID_LOGITECH_DJ=m802CONFIG_HID_LOGITECH_DJ=m
737CONFIG_LOGITECH_FF=y803CONFIG_LOGITECH_FF=y
@@ -740,7 +806,11 @@ CONFIG_LOGIG940_FF=y · 2 unmodified lines
740CONFIG_HID_MICROSOFT=m806CONFIG_HID_MICROSOFT=m
741CONFIG_HID_MULTITOUCH=m807CONFIG_HID_MULTITOUCH=m
742CONFIG_HID_SUNPLUS=m808CONFIG_HID_SUNPLUS=m
809CONFIG_HID_WACOM=m
743CONFIG_USB_HIDDEV=y810CONFIG_USB_HIDDEV=y
811CONFIG_I2C_HID_ACPI=m
812CONFIG_I2C_HID_OF=m
813CONFIG_I2C_HID_OF_ELAN=m
744CONFIG_USB=y814CONFIG_USB=y
745CONFIG_USB_OTG=y815CONFIG_USB_OTG=y
746CONFIG_USB_MON=y816CONFIG_USB_MON=y
@@ -775,7 +845,7 @@ CONFIG_RTC_CLASS=y · 28 unmodified lines
775CONFIG_RTC_DRV_EFI=y845CONFIG_RTC_DRV_EFI=y
776CONFIG_RTC_DRV_LOONGSON=y846CONFIG_RTC_DRV_LOONGSON=y
777CONFIG_DMADEVICES=y847CONFIG_DMADEVICES=y
778CONFIG_LS2X_APB_DMA=y848CONFIG_LOONGSON2_APB_DMA=y
779CONFIG_UDMABUF=y849CONFIG_UDMABUF=y
780CONFIG_DMABUF_HEAPS=y850CONFIG_DMABUF_HEAPS=y
781CONFIG_DMABUF_HEAPS_SYSTEM=y851CONFIG_DMABUF_HEAPS_SYSTEM=y
@@ -852,6 +922,9 @@ CONFIG_F2FS_FS=m · 70 unmodified lines
852CONFIG_F2FS_FS_SECURITY=y922CONFIG_F2FS_FS_SECURITY=y
853CONFIG_F2FS_CHECK_FS=y923CONFIG_F2FS_CHECK_FS=y
854CONFIG_F2FS_FS_COMPRESSION=y924CONFIG_F2FS_FS_COMPRESSION=y
925CONFIG_FS_ENCRYPTION=y
926CONFIG_FS_ENCRYPTION_INLINE_CRYPT=y
927CONFIG_FS_VERITY=y
855CONFIG_FANOTIFY=y928CONFIG_FANOTIFY=y
856CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y929CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
857CONFIG_QUOTA=y930CONFIG_QUOTA=y
@@ -904,16 +977,14 @@ CONFIG_SQUASHFS_ZSTD=y · 46 unmodified lines
904CONFIG_MINIX_FS=m977CONFIG_MINIX_FS=m
905CONFIG_ROMFS_FS=m978CONFIG_ROMFS_FS=m
906CONFIG_PSTORE=m979CONFIG_PSTORE=m
907CONFIG_PSTORE_LZO_COMPRESS=m980CONFIG_PSTORE_COMPRESS=y
908CONFIG_PSTORE_LZ4_COMPRESS=m
909CONFIG_PSTORE_LZ4HC_COMPRESS=m
910CONFIG_PSTORE_842_COMPRESS=y
911CONFIG_PSTORE_ZSTD_COMPRESS=y
912CONFIG_PSTORE_ZSTD_COMPRESS_DEFAULT=y
913CONFIG_SYSV_FS=m981CONFIG_SYSV_FS=m
914CONFIG_UFS_FS=m982CONFIG_UFS_FS=m
915CONFIG_EROFS_FS=m983CONFIG_EROFS_FS=m
916CONFIG_EROFS_FS_ZIP_LZMA=y984CONFIG_EROFS_FS_ZIP_LZMA=y
985CONFIG_EROFS_FS_ZIP_DEFLATE=y
986CONFIG_EROFS_FS_ZIP_ZSTD=y
987CONFIG_EROFS_FS_ONDEMAND=y
917CONFIG_EROFS_FS_PCPU_KTHREAD=y988CONFIG_EROFS_FS_PCPU_KTHREAD=y
918CONFIG_NFS_FS=y989CONFIG_NFS_FS=y
919CONFIG_NFS_V3_ACL=y990CONFIG_NFS_V3_ACL=y
arch/loongarch/include/asm/hugetlb.h+10−0
@@ -24,6 +24,16 @@ static inline int prepare_hugepage_range(struct file *file, · 23 unmodified lines
24 return 0;24 return 0;
25}25}
26 26
27#define __HAVE_ARCH_HUGE_PTE_CLEAR
28static inline void huge_pte_clear(struct mm_struct *mm, unsigned long addr,
29 pte_t *ptep, unsigned long sz)
30{
31 pte_t clear;
32
33 pte_val(clear) = (unsigned long)invalid_pte_table;
34 set_pte_at(mm, addr, ptep, clear);
35}
36
27#define __HAVE_ARCH_HUGE_PTEP_GET_AND_CLEAR37#define __HAVE_ARCH_HUGE_PTEP_GET_AND_CLEAR
28static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm,38static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm,
29 unsigned long addr, pte_t *ptep)39 unsigned long addr, pte_t *ptep)
arch/loongarch/include/asm/inst.h+11−1
@@ -683,7 +683,17 @@ DEF_EMIT_REG2I16_FORMAT(blt, blt_op) · 682 unmodified lines
683DEF_EMIT_REG2I16_FORMAT(bge, bge_op)683DEF_EMIT_REG2I16_FORMAT(bge, bge_op)
684DEF_EMIT_REG2I16_FORMAT(bltu, bltu_op)684DEF_EMIT_REG2I16_FORMAT(bltu, bltu_op)
685DEF_EMIT_REG2I16_FORMAT(bgeu, bgeu_op)685DEF_EMIT_REG2I16_FORMAT(bgeu, bgeu_op)
686DEF_EMIT_REG2I16_FORMAT(jirl, jirl_op)686
687static inline void emit_jirl(union loongarch_instruction *insn,
688 enum loongarch_gpr rd,
689 enum loongarch_gpr rj,
690 int offset)
691{
692 insn->reg2i16_format.opcode = jirl_op;
693 insn->reg2i16_format.immediate = offset;
694 insn->reg2i16_format.rd = rd;
695 insn->reg2i16_format.rj = rj;
696}
687 697
688#define DEF_EMIT_REG2BSTRD_FORMAT(NAME, OP) \698#define DEF_EMIT_REG2BSTRD_FORMAT(NAME, OP) \
689static inline void emit_##NAME(union loongarch_instruction *insn, \699static inline void emit_##NAME(union loongarch_instruction *insn, \
arch/loongarch/include/asm/jump_label.h+10−6
@@ -13,18 +13,22 @@ · 12 unmodified lines
13 13
14#define JUMP_LABEL_NOP_SIZE 414#define JUMP_LABEL_NOP_SIZE 4
15 15
16#define JUMP_TABLE_ENTRY \16/* This macro is also expanded on the Rust side. */
17#define JUMP_TABLE_ENTRY(key, label) \
17 ".pushsection __jump_table, \"aw\" \n\t" \18 ".pushsection __jump_table, \"aw\" \n\t" \
18 ".align 3 \n\t" \19 ".align 3 \n\t" \
19 ".long 1b - ., %l[l_yes] - . \n\t" \20 ".long 1b - ., " label " - . \n\t" \
20 ".quad %0 - . \n\t" \21 ".quad " key " - . \n\t" \
21 ".popsection \n\t"22 ".popsection \n\t"
22 23
24#define ARCH_STATIC_BRANCH_ASM(key, label) \
25 "1: nop \n\t" \
26 JUMP_TABLE_ENTRY(key, label)
27
23static __always_inline bool arch_static_branch(struct static_key * const key, const bool branch)28static __always_inline bool arch_static_branch(struct static_key * const key, const bool branch)
24{29{
25 asm goto(30 asm goto(
26 "1: nop \n\t"31 ARCH_STATIC_BRANCH_ASM("%0", "%l[l_yes]")
27 JUMP_TABLE_ENTRY
28 : : "i"(&((char *)key)[branch]) : : l_yes);32 : : "i"(&((char *)key)[branch]) : : l_yes);
29 33
30 return false;34 return false;
@@ -37,7 +41,7 @@ static __always_inline bool arch_static_branch_jump(struct static_key * const ke · 6 unmodified lines
37{41{
38 asm goto(42 asm goto(
39 "1: b %l[l_yes] \n\t"43 "1: b %l[l_yes] \n\t"
40 JUMP_TABLE_ENTRY44 JUMP_TABLE_ENTRY("%0", "%l[l_yes]")
41 : : "i"(&((char *)key)[branch]) : : l_yes);45 : : "i"(&((char *)key)[branch]) : : l_yes);
42 46
43 return false;47 return false;
arch/loongarch/include/asm/thread_info.h+5−3
@@ -66,8 +66,9 @@ register unsigned long current_stack_pointer __asm__("$sp"); · 65 unmodified lines
66 * - pending work-to-be-done flags are in LSW66 * - pending work-to-be-done flags are in LSW
67 * - other flags in MSW67 * - other flags in MSW
68 */68 */
69#define TIF_SIGPENDING 1 /* signal pending */69#define TIF_NEED_RESCHED 0 /* rescheduling necessary */
70#define TIF_NEED_RESCHED 2 /* rescheduling necessary */70#define TIF_NEED_RESCHED_LAZY 1 /* lazy rescheduling necessary */
71#define TIF_SIGPENDING 2 /* signal pending */
71#define TIF_NOTIFY_RESUME 3 /* callback before returning to user */72#define TIF_NOTIFY_RESUME 3 /* callback before returning to user */
72#define TIF_NOTIFY_SIGNAL 4 /* signal notifications exist */73#define TIF_NOTIFY_SIGNAL 4 /* signal notifications exist */
73#define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */74#define TIF_RESTORE_SIGMASK 5 /* restore signal mask in do_signal() */
@@ -88,8 +89,9 @@ register unsigned long current_stack_pointer __asm__("$sp"); · 14 unmodified lines
88#define TIF_LBT_CTX_LIVE 20 /* LBT context must be preserved */89#define TIF_LBT_CTX_LIVE 20 /* LBT context must be preserved */
89#define TIF_PATCH_PENDING 21 /* pending live patching update */90#define TIF_PATCH_PENDING 21 /* pending live patching update */
90 91
91#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
92#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)92#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
93#define _TIF_NEED_RESCHED_LAZY (1<<TIF_NEED_RESCHED_LAZY)
94#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
93#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)95#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
94#define _TIF_NOTIFY_SIGNAL (1<<TIF_NOTIFY_SIGNAL)96#define _TIF_NOTIFY_SIGNAL (1<<TIF_NOTIFY_SIGNAL)
95#define _TIF_NOHZ (1<<TIF_NOHZ)97#define _TIF_NOHZ (1<<TIF_NOHZ)
arch/loongarch/kernel/efi.c+1−1
@@ -95,7 +95,7 @@ static void __init init_screen_info(void) · 94 unmodified lines
95 memset(si, 0, sizeof(*si));95 memset(si, 0, sizeof(*si));
96 early_memunmap(si, sizeof(*si));96 early_memunmap(si, sizeof(*si));
97 97
98 memblock_reserve(screen_info.lfb_base, screen_info.lfb_size);98 memblock_reserve(__screen_info_lfb_base(&screen_info), screen_info.lfb_size);
99}99}
100 100
101void __init efi_init(void)101void __init efi_init(void)
arch/loongarch/kernel/inst.c+1−1
@@ -332,7 +332,7 @@ u32 larch_insn_gen_jirl(enum loongarch_gpr rd, enum loongarch_gpr rj, int imm) · 331 unmodified lines
332 return INSN_BREAK;332 return INSN_BREAK;
333 }333 }
334 334
335 emit_jirl(&insn, rj, rd, imm >> 2);335 emit_jirl(&insn, rd, rj, imm >> 2);
336 336
337 return insn.word;337 return insn.word;
338}338}
arch/loongarch/kernel/smp.c+1−1
@@ -82,7 +82,7 @@ void show_ipi_list(struct seq_file *p, int prec) · 81 unmodified lines
82 for (i = 0; i < NR_IPI; i++) {82 for (i = 0; i < NR_IPI; i++) {
83 seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i, prec >= 4 ? " " : "");83 seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i, prec >= 4 ? " " : "");
84 for_each_online_cpu(cpu)84 for_each_online_cpu(cpu)
85 seq_printf(p, "%10u ", per_cpu(irq_stat, cpu).ipi_irqs[i]);85 seq_put_decimal_ull_width(p, " ", per_cpu(irq_stat, cpu).ipi_irqs[i], 10);
86 seq_printf(p, " LoongArch %d %s\n", i + 1, ipi_types[i]);86 seq_printf(p, " LoongArch %d %s\n", i + 1, ipi_types[i]);
87 }87 }
88}88}
arch/loongarch/kernel/time.c+5−1
@@ -127,7 +127,11 @@ void sync_counter(void) · 126 unmodified lines
127int constant_clockevent_init(void)127int constant_clockevent_init(void)
128{128{
129 unsigned int cpu = smp_processor_id();129 unsigned int cpu = smp_processor_id();
130 unsigned long min_delta = 0x600;130#ifdef CONFIG_PREEMPT_RT
131 unsigned long min_delta = 100;
132#else
133 unsigned long min_delta = 1000;
134#endif
131 unsigned long max_delta = (1UL << 48) - 1;135 unsigned long max_delta = (1UL << 48) - 1;
132 struct clock_event_device *cd;136 struct clock_event_device *cd;
133 static int irq = 0, timer_irq_installed = 0;137 static int irq = 0, timer_irq_installed = 0;
arch/loongarch/kvm/exit.c+21−10
@@ -156,7 +156,7 @@ static int kvm_handle_csr(struct kvm_vcpu *vcpu, larch_inst inst) · 155 unmodified lines
156 156
157int kvm_emu_iocsr(larch_inst inst, struct kvm_run *run, struct kvm_vcpu *vcpu)157int kvm_emu_iocsr(larch_inst inst, struct kvm_run *run, struct kvm_vcpu *vcpu)
158{158{
159 int ret;159 int idx, ret;
160 unsigned long *val;160 unsigned long *val;
161 u32 addr, rd, rj, opcode;161 u32 addr, rd, rj, opcode;
162 162
@@ -167,7 +167,6 @@ int kvm_emu_iocsr(larch_inst inst, struct kvm_run *run, struct kvm_vcpu *vcpu) · 4 unmodified lines
167 rj = inst.reg2_format.rj;167 rj = inst.reg2_format.rj;
168 opcode = inst.reg2_format.opcode;168 opcode = inst.reg2_format.opcode;
169 addr = vcpu->arch.gprs[rj];169 addr = vcpu->arch.gprs[rj];
170 ret = EMULATE_DO_IOCSR;
171 run->iocsr_io.phys_addr = addr;170 run->iocsr_io.phys_addr = addr;
172 run->iocsr_io.is_write = 0;171 run->iocsr_io.is_write = 0;
173 val = &vcpu->arch.gprs[rd];172 val = &vcpu->arch.gprs[rd];
@@ -207,20 +206,28 @@ int kvm_emu_iocsr(larch_inst inst, struct kvm_run *run, struct kvm_vcpu *vcpu) · 33 unmodified lines
207 }206 }
208 207
209 if (run->iocsr_io.is_write) {208 if (run->iocsr_io.is_write) {
210 if (!kvm_io_bus_write(vcpu, KVM_IOCSR_BUS, addr, run->iocsr_io.len, val))209 idx = srcu_read_lock(&vcpu->kvm->srcu);
210 ret = kvm_io_bus_write(vcpu, KVM_IOCSR_BUS, addr, run->iocsr_io.len, val);
211 srcu_read_unlock(&vcpu->kvm->srcu, idx);
212 if (ret == 0)
211 ret = EMULATE_DONE;213 ret = EMULATE_DONE;
212 else214 else {
215 ret = EMULATE_DO_IOCSR;
213 /* Save data and let user space to write it */216 /* Save data and let user space to write it */
214 memcpy(run->iocsr_io.data, val, run->iocsr_io.len);217 memcpy(run->iocsr_io.data, val, run->iocsr_io.len);
215 218 }
216 trace_kvm_iocsr(KVM_TRACE_IOCSR_WRITE, run->iocsr_io.len, addr, val);219 trace_kvm_iocsr(KVM_TRACE_IOCSR_WRITE, run->iocsr_io.len, addr, val);
217 } else {220 } else {
218 if (!kvm_io_bus_read(vcpu, KVM_IOCSR_BUS, addr, run->iocsr_io.len, val))221 idx = srcu_read_lock(&vcpu->kvm->srcu);
222 ret = kvm_io_bus_read(vcpu, KVM_IOCSR_BUS, addr, run->iocsr_io.len, val);
223 srcu_read_unlock(&vcpu->kvm->srcu, idx);
224 if (ret == 0)
219 ret = EMULATE_DONE;225 ret = EMULATE_DONE;
220 else226 else {
227 ret = EMULATE_DO_IOCSR;
221 /* Save register id for iocsr read completion */228 /* Save register id for iocsr read completion */
222 vcpu->arch.io_gpr = rd;229 vcpu->arch.io_gpr = rd;
223 230 }
224 trace_kvm_iocsr(KVM_TRACE_IOCSR_READ, run->iocsr_io.len, addr, NULL);231 trace_kvm_iocsr(KVM_TRACE_IOCSR_READ, run->iocsr_io.len, addr, NULL);
225 }232 }
226 233
@@ -359,7 +366,7 @@ static int kvm_handle_gspr(struct kvm_vcpu *vcpu) · 132 unmodified lines
359 366
360int kvm_emu_mmio_read(struct kvm_vcpu *vcpu, larch_inst inst)367int kvm_emu_mmio_read(struct kvm_vcpu *vcpu, larch_inst inst)
361{368{
362 int ret;369 int idx, ret;
363 unsigned int op8, opcode, rd;370 unsigned int op8, opcode, rd;
364 struct kvm_run *run = vcpu->run;371 struct kvm_run *run = vcpu->run;
365 372
@@ -464,8 +471,10 @@ int kvm_emu_mmio_read(struct kvm_vcpu *vcpu, larch_inst inst) · 98 unmodified lines
464 * it need not return to user space to handle the mmio471 * it need not return to user space to handle the mmio
465 * exception.472 * exception.
466 */473 */
474 idx = srcu_read_lock(&vcpu->kvm->srcu);
467 ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, vcpu->arch.badv,475 ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, vcpu->arch.badv,
468 run->mmio.len, &vcpu->arch.gprs[rd]);476 run->mmio.len, &vcpu->arch.gprs[rd]);
477 srcu_read_unlock(&vcpu->kvm->srcu, idx);
469 if (!ret) {478 if (!ret) {
470 update_pc(&vcpu->arch);479 update_pc(&vcpu->arch);
471 vcpu->mmio_needed = 0;480 vcpu->mmio_needed = 0;
@@ -531,7 +540,7 @@ int kvm_complete_mmio_read(struct kvm_vcpu *vcpu, struct kvm_run *run) · 59 unmodified lines
531 540
532int kvm_emu_mmio_write(struct kvm_vcpu *vcpu, larch_inst inst)541int kvm_emu_mmio_write(struct kvm_vcpu *vcpu, larch_inst inst)
533{542{
534 int ret;543 int idx, ret;
535 unsigned int rd, op8, opcode;544 unsigned int rd, op8, opcode;
536 unsigned long curr_pc, rd_val = 0;545 unsigned long curr_pc, rd_val = 0;
537 struct kvm_run *run = vcpu->run;546 struct kvm_run *run = vcpu->run;
@@ -631,7 +640,9 @@ int kvm_emu_mmio_write(struct kvm_vcpu *vcpu, larch_inst inst) · 93 unmodified lines
631 * it need not return to user space to handle the mmio640 * it need not return to user space to handle the mmio
632 * exception.641 * exception.
633 */642 */
643 idx = srcu_read_lock(&vcpu->kvm->srcu);
634 ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, vcpu->arch.badv, run->mmio.len, data);644 ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, vcpu->arch.badv, run->mmio.len, data);
645 srcu_read_unlock(&vcpu->kvm->srcu, idx);
635 if (!ret)646 if (!ret)
636 return EMULATE_DONE;647 return EMULATE_DONE;
637 648
arch/loongarch/kvm/intc/ipi.c+5−1
@@ -98,7 +98,7 @@ static void write_mailbox(struct kvm_vcpu *vcpu, int offset, uint64_t data, int · 97 unmodified lines
98 98
99static int send_ipi_data(struct kvm_vcpu *vcpu, gpa_t addr, uint64_t data)99static int send_ipi_data(struct kvm_vcpu *vcpu, gpa_t addr, uint64_t data)
100{100{
101 int i, ret;101 int i, idx, ret;
102 uint32_t val = 0, mask = 0;102 uint32_t val = 0, mask = 0;
103 103
104 /*104 /*
@@ -107,7 +107,9 @@ static int send_ipi_data(struct kvm_vcpu *vcpu, gpa_t addr, uint64_t data) · 2 unmodified lines
107 */107 */
108 if ((data >> 27) & 0xf) {108 if ((data >> 27) & 0xf) {
109 /* Read the old val */109 /* Read the old val */
110 idx = srcu_read_lock(&vcpu->kvm->srcu);
110 ret = kvm_io_bus_read(vcpu, KVM_IOCSR_BUS, addr, sizeof(val), &val);111 ret = kvm_io_bus_read(vcpu, KVM_IOCSR_BUS, addr, sizeof(val), &val);
112 srcu_read_unlock(&vcpu->kvm->srcu, idx);
111 if (unlikely(ret)) {113 if (unlikely(ret)) {
112 kvm_err("%s: : read date from addr %llx failed\n", __func__, addr);114 kvm_err("%s: : read date from addr %llx failed\n", __func__, addr);
113 return ret;115 return ret;
@@ -121,7 +123,9 @@ static int send_ipi_data(struct kvm_vcpu *vcpu, gpa_t addr, uint64_t data) · 7 unmodified lines
121 val &= mask;123 val &= mask;
122 }124 }
123 val |= ((uint32_t)(data >> 32) & ~mask);125 val |= ((uint32_t)(data >> 32) & ~mask);
126 idx = srcu_read_lock(&vcpu->kvm->srcu);
124 ret = kvm_io_bus_write(vcpu, KVM_IOCSR_BUS, addr, sizeof(val), &val);127 ret = kvm_io_bus_write(vcpu, KVM_IOCSR_BUS, addr, sizeof(val), &val);
128 srcu_read_unlock(&vcpu->kvm->srcu, idx);
125 if (unlikely(ret))129 if (unlikely(ret))
126 kvm_err("%s: : write date to addr %llx failed\n", __func__, addr);130 kvm_err("%s: : write date to addr %llx failed\n", __func__, addr);
127 131
arch/loongarch/kvm/vcpu.c+3−1
@@ -240,7 +240,7 @@ static void kvm_late_check_requests(struct kvm_vcpu *vcpu) · 239 unmodified lines
240 */240 */
241static int kvm_enter_guest_check(struct kvm_vcpu *vcpu)241static int kvm_enter_guest_check(struct kvm_vcpu *vcpu)
242{242{
243 int ret;243 int idx, ret;
244 244
245 /*245 /*
246 * Check conditions before entering the guest246 * Check conditions before entering the guest
@@ -249,7 +249,9 @@ static int kvm_enter_guest_check(struct kvm_vcpu *vcpu) · 2 unmodified lines
249 if (ret < 0)249 if (ret < 0)
250 return ret;250 return ret;
251 251
252 idx = srcu_read_lock(&vcpu->kvm->srcu);
252 ret = kvm_check_requests(vcpu);253 ret = kvm_check_requests(vcpu);
254 srcu_read_unlock(&vcpu->kvm->srcu, idx);
253 255
254 return ret;256 return ret;
255}257}
arch/loongarch/mm/tlb.c+1−1
@@ -289,7 +289,7 @@ static void setup_tlb_handler(int cpu) · 288 unmodified lines
289 /* Avoid lockdep warning */289 /* Avoid lockdep warning */
290 rcutree_report_cpu_starting(cpu);290 rcutree_report_cpu_starting(cpu);
291 291
292#ifdef CONFIG_NUMA292#if defined(CONFIG_NUMA) && !defined(CONFIG_PREEMPT_RT)
293 vec_sz = sizeof(exception_handlers);293 vec_sz = sizeof(exception_handlers);
294 294
295 if (pcpu_handlers[cpu])295 if (pcpu_handlers[cpu])
arch/loongarch/net/bpf_jit.c+4−4
@@ -179,15 +179,15 @@ static void __build_epilogue(struct jit_ctx *ctx, bool is_tail_call) · 178 unmodified lines
179 179
180 if (!is_tail_call) {180 if (!is_tail_call) {
181 /* Set return value */181 /* Set return value */
182 move_reg(ctx, LOONGARCH_GPR_A0, regmap[BPF_REG_0]);182 emit_insn(ctx, addiw, LOONGARCH_GPR_A0, regmap[BPF_REG_0], 0);
183 /* Return to the caller */183 /* Return to the caller */
184 emit_insn(ctx, jirl, LOONGARCH_GPR_RA, LOONGARCH_GPR_ZERO, 0);184 emit_insn(ctx, jirl, LOONGARCH_GPR_ZERO, LOONGARCH_GPR_RA, 0);
185 } else {185 } else {
186 /*186 /*
187 * Call the next bpf prog and skip the first instruction187 * Call the next bpf prog and skip the first instruction
188 * of TCC initialization.188 * of TCC initialization.
189 */189 */
190 emit_insn(ctx, jirl, LOONGARCH_GPR_T3, LOONGARCH_GPR_ZERO, 1);190 emit_insn(ctx, jirl, LOONGARCH_GPR_ZERO, LOONGARCH_GPR_T3, 1);
191 }191 }
192}192}
193 193
@@ -904,7 +904,7 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext · 710 unmodified lines
904 return ret;904 return ret;
905 905
906 move_addr(ctx, t1, func_addr);906 move_addr(ctx, t1, func_addr);
907 emit_insn(ctx, jirl, t1, LOONGARCH_GPR_RA, 0);907 emit_insn(ctx, jirl, LOONGARCH_GPR_RA, t1, 0);
908 move_reg(ctx, regmap[BPF_REG_0], LOONGARCH_GPR_A0);908 move_reg(ctx, regmap[BPF_REG_0], LOONGARCH_GPR_A0);
909 break;909 break;
910 910
arch/loongarch/vdso/Makefile+1−1
@@ -19,7 +19,7 @@ ccflags-vdso := \ · 18 unmodified lines
19cflags-vdso := $(ccflags-vdso) \19cflags-vdso := $(ccflags-vdso) \
20 -isystem $(shell $(CC) -print-file-name=include) \20 -isystem $(shell $(CC) -print-file-name=include) \
21 $(filter -W%,$(filter-out -Wa$(comma)%,$(KBUILD_CFLAGS))) \21 $(filter -W%,$(filter-out -Wa$(comma)%,$(KBUILD_CFLAGS))) \
22 -O2 -g -fno-strict-aliasing -fno-common -fno-builtin \22 -std=gnu11 -O2 -g -fno-strict-aliasing -fno-common -fno-builtin \
23 -fno-stack-protector -fno-jump-tables -DDISABLE_BRANCH_PROFILING \23 -fno-stack-protector -fno-jump-tables -DDISABLE_BRANCH_PROFILING \
24 $(call cc-option, -fno-asynchronous-unwind-tables) \24 $(call cc-option, -fno-asynchronous-unwind-tables) \
25 $(call cc-option, -fno-stack-protector)25 $(call cc-option, -fno-stack-protector)
arch/m68k/coldfire/device.c+4−4
@@ -93,7 +93,7 @@ static struct platform_device mcf_uart = { · 92 unmodified lines
93 .dev.platform_data = mcf_uart_platform_data,93 .dev.platform_data = mcf_uart_platform_data,
94};94};
95 95
96#if IS_ENABLED(CONFIG_FEC)96#ifdef MCFFEC_BASE0
97 97
98#ifdef CONFIG_M5441x98#ifdef CONFIG_M5441x
99#define FEC_NAME "enet-fec"99#define FEC_NAME "enet-fec"
@@ -145,6 +145,7 @@ static struct platform_device mcf_fec0 = { · 45 unmodified lines
145 .platform_data = FEC_PDATA,145 .platform_data = FEC_PDATA,
146 }146 }
147};147};
148#endif /* MCFFEC_BASE0 */
148 149
149#ifdef MCFFEC_BASE1150#ifdef MCFFEC_BASE1
150static struct resource mcf_fec1_resources[] = {151static struct resource mcf_fec1_resources[] = {
@@ -182,7 +183,6 @@ static struct platform_device mcf_fec1 = { · 31 unmodified lines
182 }183 }
183};184};
184#endif /* MCFFEC_BASE1 */185#endif /* MCFFEC_BASE1 */
185#endif /* CONFIG_FEC */
186 186
187#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)187#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
188/*188/*
@@ -624,12 +624,12 @@ static struct platform_device mcf_flexcan0 = { · 435 unmodified lines
624 624
625static struct platform_device *mcf_devices[] __initdata = {625static struct platform_device *mcf_devices[] __initdata = {
626 &mcf_uart,626 &mcf_uart,
627#if IS_ENABLED(CONFIG_FEC)627#ifdef MCFFEC_BASE0
628 &mcf_fec0,628 &mcf_fec0,
629#endif
629#ifdef MCFFEC_BASE1630#ifdef MCFFEC_BASE1
630 &mcf_fec1,631 &mcf_fec1,
631#endif632#endif
632#endif
633#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)633#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
634 &mcf_qspi,634 &mcf_qspi,
635#endif635#endif
arch/m68k/configs/multi_defconfig+1−0
@@ -503,6 +503,7 @@ CONFIG_UHID=m · 502 unmodified lines
503# CONFIG_USB_SUPPORT is not set503# CONFIG_USB_SUPPORT is not set
504CONFIG_RTC_CLASS=y504CONFIG_RTC_CLASS=y
505# CONFIG_RTC_NVMEM is not set505# CONFIG_RTC_NVMEM is not set
506CONFIG_RTC_DRV_M48T59=m
506CONFIG_RTC_DRV_MSM6242=m507CONFIG_RTC_DRV_MSM6242=m
507CONFIG_RTC_DRV_RP5C01=m508CONFIG_RTC_DRV_RP5C01=m
508CONFIG_RTC_DRV_GENERIC=m509CONFIG_RTC_DRV_GENERIC=m
arch/m68k/configs/mvme147_defconfig+1−0
@@ -391,6 +391,7 @@ CONFIG_UHID=m · 390 unmodified lines
391# CONFIG_USB_SUPPORT is not set391# CONFIG_USB_SUPPORT is not set
392CONFIG_RTC_CLASS=y392CONFIG_RTC_CLASS=y
393# CONFIG_RTC_NVMEM is not set393# CONFIG_RTC_NVMEM is not set
394CONFIG_RTC_DRV_M48T59=y
394CONFIG_RTC_DRV_GENERIC=m395CONFIG_RTC_DRV_GENERIC=m
395# CONFIG_VIRTIO_MENU is not set396# CONFIG_VIRTIO_MENU is not set
396# CONFIG_VHOST_MENU is not set397# CONFIG_VHOST_MENU is not set
arch/m68k/configs/mvme16x_defconfig+1−0
@@ -392,6 +392,7 @@ CONFIG_UHID=m · 391 unmodified lines
392# CONFIG_USB_SUPPORT is not set392# CONFIG_USB_SUPPORT is not set
393CONFIG_RTC_CLASS=y393CONFIG_RTC_CLASS=y
394# CONFIG_RTC_NVMEM is not set394# CONFIG_RTC_NVMEM is not set
395CONFIG_RTC_DRV_M48T59=y
395CONFIG_RTC_DRV_GENERIC=m396CONFIG_RTC_DRV_GENERIC=m
396# CONFIG_VIRTIO_MENU is not set397# CONFIG_VIRTIO_MENU is not set
397# CONFIG_VHOST_MENU is not set398# CONFIG_VHOST_MENU is not set
arch/m68k/include/asm/mcfgpio.h+1−1
@@ -136,7 +136,7 @@ static inline void gpio_free(unsigned gpio) · 135 unmodified lines
136 * read-modify-write as well as those controlled by the EPORT and GPIO modules.136 * read-modify-write as well as those controlled by the EPORT and GPIO modules.
137 */137 */
138#define MCFGPIO_SCR_START 40138#define MCFGPIO_SCR_START 40
139#elif defined(CONFIGM5441x)139#elif defined(CONFIG_M5441x)
140/* The m5441x EPORT doesn't have its own GPIO port, uses PORT C */140/* The m5441x EPORT doesn't have its own GPIO port, uses PORT C */
141#define MCFGPIO_SCR_START 0141#define MCFGPIO_SCR_START 0
142#else142#else
arch/m68k/include/asm/mvme147hw.h+1−18
@@ -4,24 +4,7 @@ · 3 unmodified lines
4 4
5#include <asm/irq.h>5#include <asm/irq.h>
6 6
7typedef struct {7#define MVME147_RTC_BASE 0xfffe0000
8 unsigned char
9 ctrl,
10 bcd_sec,
11 bcd_min,
12 bcd_hr,
13 bcd_dow,
14 bcd_dom,
15 bcd_mth,
16 bcd_year;
17} MK48T02;
18
19#define RTC_WRITE 0x80
20#define RTC_READ 0x40
21#define RTC_STOP 0x20
22
23#define m147_rtc ((MK48T02 * volatile)0xfffe07f8)
24
25 8
26struct pcc_regs {9struct pcc_regs {
27 volatile u_long dma_tadr;10 volatile u_long dma_tadr;
arch/m68k/include/asm/mvme16xhw.h+1−17
@@ -24,23 +24,7 @@ typedef struct { · 23 unmodified lines
24 24
25#define mvmelp ((*(volatile MVMElpPtr)(MVME_LPR_BASE)))25#define mvmelp ((*(volatile MVMElpPtr)(MVME_LPR_BASE)))
26 26
27typedef struct {27#define MVME_RTC_BASE 0xfffc0000
28 unsigned char
29 ctrl,
30 bcd_sec,
31 bcd_min,
32 bcd_hr,
33 bcd_dow,
34 bcd_dom,
35 bcd_mth,
36 bcd_year;
37} MK48T08_t, *MK48T08ptr_t;
38
39#define RTC_WRITE 0x80
40#define RTC_READ 0x40
41#define RTC_STOP 0x20
42
43#define MVME_RTC_BASE 0xfffc1ff8
44 28
45#define MVME_I596_BASE 0xfff4600029#define MVME_I596_BASE 0xfff46000
46 30
arch/m68k/mvme147/config.c+24−31
@@ -19,8 +19,9 @@ · 18 unmodified lines
19#include <linux/linkage.h>19#include <linux/linkage.h>
20#include <linux/init.h>20#include <linux/init.h>
21#include <linux/major.h>21#include <linux/major.h>
22#include <linux/rtc.h>
23#include <linux/interrupt.h>22#include <linux/interrupt.h>
23#include <linux/platform_device.h>
24#include <linux/rtc/m48t59.h>
24 25
25#include <asm/bootinfo.h>26#include <asm/bootinfo.h>
26#include <asm/bootinfo-vme.h>27#include <asm/bootinfo-vme.h>
@@ -36,13 +37,9 @@ · 9 unmodified lines
36 37
37static void mvme147_get_model(char *model);38static void mvme147_get_model(char *model);
38static void __init mvme147_sched_init(void);39static void __init mvme147_sched_init(void);
39extern int mvme147_hwclk (int, struct rtc_time *);
40extern void mvme147_reset (void);40extern void mvme147_reset (void);
41 41
42 42
43static int bcd2int (unsigned char b);
44
45
46int __init mvme147_parse_bootinfo(const struct bi_record *bi)43int __init mvme147_parse_bootinfo(const struct bi_record *bi)
47{44{
48 uint16_t tag = be16_to_cpu(bi->tag);45 uint16_t tag = be16_to_cpu(bi->tag);
@@ -80,7 +77,6 @@ void __init config_mvme147(void) · 31 unmodified lines
80{77{
81 mach_sched_init = mvme147_sched_init;78 mach_sched_init = mvme147_sched_init;
82 mach_init_IRQ = mvme147_init_IRQ;79 mach_init_IRQ = mvme147_init_IRQ;
83 mach_hwclk = mvme147_hwclk;
84 mach_reset = mvme147_reset;80 mach_reset = mvme147_reset;
85 mach_get_model = mvme147_get_model;81 mach_get_model = mvme147_get_model;
86 82
@@ -89,6 +85,28 @@ void __init config_mvme147(void) · 2 unmodified lines
89 vme_brdtype = VME_TYPE_MVME147;85 vme_brdtype = VME_TYPE_MVME147;
90}86}
91 87
88static struct resource m48t59_rsrc[] = {
89 DEFINE_RES_MEM(MVME147_RTC_BASE, 0x800),
90};
91
92static struct m48t59_plat_data m48t59_data = {
93 .type = M48T59RTC_TYPE_M48T02,
94 .yy_offset = 70,
95};
96
97static int __init mvme147_platform_init(void)
98{
99 if (!MACH_IS_MVME147)
100 return 0;
101
102 platform_device_register_resndata(NULL, "rtc-m48t59", -1,
103 m48t59_rsrc, ARRAY_SIZE(m48t59_rsrc),
104 &m48t59_data, sizeof(m48t59_data));
105 return 0;
106}
107
108arch_initcall(mvme147_platform_init);
109
92static u64 mvme147_read_clk(struct clocksource *cs);110static u64 mvme147_read_clk(struct clocksource *cs);
93 111
94static struct clocksource mvme147_clk = {112static struct clocksource mvme147_clk = {
@@ -162,31 +180,6 @@ static u64 mvme147_read_clk(struct clocksource *cs) · 67 unmodified lines
162 return ticks;180 return ticks;
163}181}
164 182
165static int bcd2int (unsigned char b)
166{
167 return ((b>>4)*10 + (b&15));
168}
169
170int mvme147_hwclk(int op, struct rtc_time *t)
171{
172 if (!op) {
173 m147_rtc->ctrl = RTC_READ;
174 t->tm_year = bcd2int (m147_rtc->bcd_year);
175 t->tm_mon = bcd2int(m147_rtc->bcd_mth) - 1;
176 t->tm_mday = bcd2int (m147_rtc->bcd_dom);
177 t->tm_hour = bcd2int (m147_rtc->bcd_hr);
178 t->tm_min = bcd2int (m147_rtc->bcd_min);
179 t->tm_sec = bcd2int (m147_rtc->bcd_sec);
180 m147_rtc->ctrl = 0;
181 if (t->tm_year < 70)
182 t->tm_year += 100;
183 } else {
184 /* FIXME Setting the time is not yet supported */
185 return -EOPNOTSUPP;
186 }
187 return 0;
188}
189
190static void scc_delay(void)183static void scc_delay(void)
191{184{
192 __asm__ __volatile__ ("nop; nop;");185 __asm__ __volatile__ ("nop; nop;");
arch/m68k/mvme16x/Makefile+1−1
@@ -3,4 +3,4 @@ · 2 unmodified lines
3# Makefile for Linux arch/m68k/mvme16x source directory3# Makefile for Linux arch/m68k/mvme16x source directory
4#4#
5 5
6obj-y := config.o rtc.o6obj-y := config.o
arch/m68k/mvme16x/config.c+24−33
@@ -21,9 +21,10 @@ · 20 unmodified lines
21#include <linux/linkage.h>21#include <linux/linkage.h>
22#include <linux/init.h>22#include <linux/init.h>
23#include <linux/major.h>23#include <linux/major.h>
24#include <linux/rtc.h>
25#include <linux/interrupt.h>24#include <linux/interrupt.h>
26#include <linux/module.h>25#include <linux/module.h>
26#include <linux/platform_device.h>
27#include <linux/rtc/m48t59.h>
27 28
28#include <asm/bootinfo.h>29#include <asm/bootinfo.h>
29#include <asm/bootinfo-vme.h>30#include <asm/bootinfo-vme.h>
@@ -39,16 +40,10 @@ · 9 unmodified lines
39 40
40extern t_bdid mvme_bdid;41extern t_bdid mvme_bdid;
41 42
42static MK48T08ptr_t volatile rtc = (MK48T08ptr_t)MVME_RTC_BASE;
43
44static void mvme16x_get_model(char *model);43static void mvme16x_get_model(char *model);
45extern void mvme16x_sched_init(void);44extern void mvme16x_sched_init(void);
46extern int mvme16x_hwclk (int, struct rtc_time *);
47extern void mvme16x_reset (void);45extern void mvme16x_reset (void);
48 46
49int bcd2int (unsigned char b);
50
51
52unsigned short mvme16x_config;47unsigned short mvme16x_config;
53EXPORT_SYMBOL(mvme16x_config);48EXPORT_SYMBOL(mvme16x_config);
54 49
@@ -268,7 +263,6 @@ void __init config_mvme16x(void) · 213 unmodified lines
268 263
269 mach_sched_init = mvme16x_sched_init;264 mach_sched_init = mvme16x_sched_init;
270 mach_init_IRQ = mvme16x_init_IRQ;265 mach_init_IRQ = mvme16x_init_IRQ;
271 mach_hwclk = mvme16x_hwclk;
272 mach_reset = mvme16x_reset;266 mach_reset = mvme16x_reset;
273 mach_get_model = mvme16x_get_model;267 mach_get_model = mvme16x_get_model;
274 mach_get_hardware_list = mvme16x_get_hardware_list;268 mach_get_hardware_list = mvme16x_get_hardware_list;
@@ -312,6 +306,28 @@ void __init config_mvme16x(void) · 37 unmodified lines
312 }306 }
313}307}
314 308
309static struct resource m48t59_rsrc[] = {
310 DEFINE_RES_MEM(MVME_RTC_BASE, 0x2000),
311};
312
313static struct m48t59_plat_data m48t59_data = {
314 .type = M48T59RTC_TYPE_M48T08,
315 .yy_offset = 70,
316};
317
318static int __init mvme16x_platform_init(void)
319{
320 if (!MACH_IS_MVME16x)
321 return 0;
322
323 platform_device_register_resndata(NULL, "rtc-m48t59", -1,
324 m48t59_rsrc, ARRAY_SIZE(m48t59_rsrc),
325 &m48t59_data, sizeof(m48t59_data));
326 return 0;
327}
328
329arch_initcall(mvme16x_platform_init);
330
315static irqreturn_t mvme16x_abort_int (int irq, void *dev_id)331static irqreturn_t mvme16x_abort_int (int irq, void *dev_id)
316{332{
317 unsigned long *new = (unsigned long *)vectors;333 unsigned long *new = (unsigned long *)vectors;
@@ -426,28 +442,3 @@ static u64 mvme16x_read_clk(struct clocksource *cs) · 108 unmodified lines
426 442
427 return ticks;443 return ticks;
428}444}
429
430int bcd2int (unsigned char b)
431{
432 return ((b>>4)*10 + (b&15));
433}
434
435int mvme16x_hwclk(int op, struct rtc_time *t)
436{
437 if (!op) {
438 rtc->ctrl = RTC_READ;
439 t->tm_year = bcd2int (rtc->bcd_year);
440 t->tm_mon = bcd2int(rtc->bcd_mth) - 1;
441 t->tm_mday = bcd2int (rtc->bcd_dom);
442 t->tm_hour = bcd2int (rtc->bcd_hr);
443 t->tm_min = bcd2int (rtc->bcd_min);
444 t->tm_sec = bcd2int (rtc->bcd_sec);
445 rtc->ctrl = 0;
446 if (t->tm_year < 70)
447 t->tm_year += 100;
448 } else {
449 /* FIXME Setting the time is not yet supported */
450 return -EOPNOTSUPP;
451 }
452 return 0;
453}
arch/m68k/mvme16x/rtc.c+0−165
@@ -1,165 +0,0 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Real Time Clock interface for Linux on the MVME16x
4 *
5 * Based on the PC driver by Paul Gortmaker.
6 */
7
8#define RTC_VERSION "1.00"
9
10#include <linux/types.h>
11#include <linux/errno.h>
12#include <linux/miscdevice.h>
13#include <linux/ioport.h>
14#include <linux/capability.h>
15#include <linux/fcntl.h>
16#include <linux/init.h>
17#include <linux/poll.h>
18#include <linux/rtc.h> /* For struct rtc_time and ioctls, etc */
19#include <linux/bcd.h>
20#include <asm/mvme16xhw.h>
21
22#include <asm/io.h>
23#include <linux/uaccess.h>
24#include <asm/setup.h>
25
26/*
27 * We sponge a minor off of the misc major. No need slurping
28 * up another valuable major dev number for this. If you add
29 * an ioctl, make sure you don't conflict with SPARC's RTC
30 * ioctls.
31 */
32
33static const unsigned char days_in_mo[] =
34{0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
35
36static atomic_t rtc_ready = ATOMIC_INIT(1);
37
38static long rtc_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
39{
40 volatile MK48T08ptr_t rtc = (MK48T08ptr_t)MVME_RTC_BASE;
41 unsigned long flags;
42 struct rtc_time wtime;
43 void __user *argp = (void __user *)arg;
44
45 switch (cmd) {
46 case RTC_RD_TIME: /* Read the time/date from RTC */
47 {
48 local_irq_save(flags);
49 /* Ensure clock and real-time-mode-register are accessible */
50 rtc->ctrl = RTC_READ;
51 memset(&wtime, 0, sizeof(struct rtc_time));
52 wtime.tm_sec = bcd2bin(rtc->bcd_sec);
53 wtime.tm_min = bcd2bin(rtc->bcd_min);
54 wtime.tm_hour = bcd2bin(rtc->bcd_hr);
55 wtime.tm_mday = bcd2bin(rtc->bcd_dom);
56 wtime.tm_mon = bcd2bin(rtc->bcd_mth)-1;
57 wtime.tm_year = bcd2bin(rtc->bcd_year);
58 if (wtime.tm_year < 70)
59 wtime.tm_year += 100;
60 wtime.tm_wday = bcd2bin(rtc->bcd_dow)-1;
61 rtc->ctrl = 0;
62 local_irq_restore(flags);
63 return copy_to_user(argp, &wtime, sizeof wtime) ?
64 -EFAULT : 0;
65 }
66 case RTC_SET_TIME: /* Set the RTC */
67 {
68 struct rtc_time rtc_tm;
69 unsigned char mon, day, hrs, min, sec, leap_yr;
70 unsigned int yrs;
71
72 if (!capable(CAP_SYS_ADMIN))
73 return -EACCES;
74
75 if (copy_from_user(&rtc_tm, argp, sizeof(struct rtc_time)))
76 return -EFAULT;
77
78 yrs = rtc_tm.tm_year;
79 if (yrs < 1900)
80 yrs += 1900;
81 mon = rtc_tm.tm_mon + 1; /* tm_mon starts at zero */
82 day = rtc_tm.tm_mday;
83 hrs = rtc_tm.tm_hour;
84 min = rtc_tm.tm_min;
85 sec = rtc_tm.tm_sec;
86
87 leap_yr = ((!(yrs % 4) && (yrs % 100)) || !(yrs % 400));
88
89 if ((mon > 12) || (day == 0))
90 return -EINVAL;
91
92 if (day > (days_in_mo[mon] + ((mon == 2) && leap_yr)))
93 return -EINVAL;
94
95 if ((hrs >= 24) || (min >= 60) || (sec >= 60))
96 return -EINVAL;
97
98 if (yrs >= 2070)
99 return -EINVAL;
100
101 local_irq_save(flags);
102 rtc->ctrl = RTC_WRITE;
103
104 rtc->bcd_sec = bin2bcd(sec);
105 rtc->bcd_min = bin2bcd(min);
106 rtc->bcd_hr = bin2bcd(hrs);
107 rtc->bcd_dom = bin2bcd(day);
108 rtc->bcd_mth = bin2bcd(mon);
109 rtc->bcd_year = bin2bcd(yrs%100);
110
111 rtc->ctrl = 0;
112 local_irq_restore(flags);
113 return 0;
114 }
115 default:
116 return -EINVAL;
117 }
118}
119
120/*
121 * We enforce only one user at a time here with the open/close.
122 */
123static int rtc_open(struct inode *inode, struct file *file)
124{
125 if( !atomic_dec_and_test(&rtc_ready) )
126 {
127 atomic_inc( &rtc_ready );
128 return -EBUSY;
129 }
130 return 0;
131}
132
133static int rtc_release(struct inode *inode, struct file *file)
134{
135 atomic_inc( &rtc_ready );
136 return 0;
137}
138
139/*
140 * The various file operations we support.
141 */
142
143static const struct file_operations rtc_fops = {
144 .unlocked_ioctl = rtc_ioctl,
145 .open = rtc_open,
146 .release = rtc_release,
147 .llseek = noop_llseek,
148};
149
150static struct miscdevice rtc_dev=
151{
152 .minor = RTC_MINOR,
153 .name = "rtc",
154 .fops = &rtc_fops
155};
156
157static int __init rtc_MK48T08_init(void)
158{
159 if (!MACH_IS_MVME16x)
160 return -ENODEV;
161
162 pr_info("MK48T08 Real Time Clock Driver v%s\n", RTC_VERSION);
163 return misc_register(&rtc_dev);
164}
165device_initcall(rtc_MK48T08_init);
arch/mips/boot/dts/loongson/ls7a-pch.dtsi+60−13
@@ -70,7 +70,6 @@ · 69 unmodified lines
70 device_type = "pci";70 device_type = "pci";
71 #address-cells = <3>;71 #address-cells = <3>;
72 #size-cells = <2>;72 #size-cells = <2>;
73 #interrupt-cells = <2>;
74 msi-parent = <&msi>;73 msi-parent = <&msi>;
75 74
76 reg = <0 0x1a000000 0 0x02000000>,75 reg = <0 0x1a000000 0 0x02000000>,
@@ -234,7 +233,7 @@ · 157 unmodified lines
234 };233 };
235 };234 };
236 235
237 pci_bridge@9,0 {236 pcie@9,0 {
238 compatible = "pci0014,7a19.1",237 compatible = "pci0014,7a19.1",
239 "pci0014,7a19",238 "pci0014,7a19",
240 "pciclass060400",239 "pciclass060400",
@@ -244,12 +243,16 @@ · 3 unmodified lines
244 interrupts = <32 IRQ_TYPE_LEVEL_HIGH>;243 interrupts = <32 IRQ_TYPE_LEVEL_HIGH>;
245 interrupt-parent = <&pic>;244 interrupt-parent = <&pic>;
246 245
246 #address-cells = <3>;
247 #size-cells = <2>;
248 device_type = "pci";
247 #interrupt-cells = <1>;249 #interrupt-cells = <1>;
248 interrupt-map-mask = <0 0 0 0>;250 interrupt-map-mask = <0 0 0 0>;
249 interrupt-map = <0 0 0 0 &pic 32 IRQ_TYPE_LEVEL_HIGH>;251 interrupt-map = <0 0 0 0 &pic 32 IRQ_TYPE_LEVEL_HIGH>;
252 ranges;
250 };253 };
251 254
252 pci_bridge@a,0 {255 pcie@a,0 {
253 compatible = "pci0014,7a09.1",256 compatible = "pci0014,7a09.1",
254 "pci0014,7a09",257 "pci0014,7a09",
255 "pciclass060400",258 "pciclass060400",
@@ -259,12 +262,16 @@ · 3 unmodified lines
259 interrupts = <33 IRQ_TYPE_LEVEL_HIGH>;262 interrupts = <33 IRQ_TYPE_LEVEL_HIGH>;
260 interrupt-parent = <&pic>;263 interrupt-parent = <&pic>;
261 264
265 #address-cells = <3>;
266 #size-cells = <2>;
267 device_type = "pci";
262 #interrupt-cells = <1>;268 #interrupt-cells = <1>;
263 interrupt-map-mask = <0 0 0 0>;269 interrupt-map-mask = <0 0 0 0>;
264 interrupt-map = <0 0 0 0 &pic 33 IRQ_TYPE_LEVEL_HIGH>;270 interrupt-map = <0 0 0 0 &pic 33 IRQ_TYPE_LEVEL_HIGH>;
271 ranges;
265 };272 };
266 273
267 pci_bridge@b,0 {274 pcie@b,0 {
268 compatible = "pci0014,7a09.1",275 compatible = "pci0014,7a09.1",
269 "pci0014,7a09",276 "pci0014,7a09",
270 "pciclass060400",277 "pciclass060400",
@@ -274,12 +281,16 @@ · 3 unmodified lines
274 interrupts = <34 IRQ_TYPE_LEVEL_HIGH>;281 interrupts = <34 IRQ_TYPE_LEVEL_HIGH>;
275 interrupt-parent = <&pic>;282 interrupt-parent = <&pic>;
276 283
284 #address-cells = <3>;
285 #size-cells = <2>;
286 device_type = "pci";
277 #interrupt-cells = <1>;287 #interrupt-cells = <1>;
278 interrupt-map-mask = <0 0 0 0>;288 interrupt-map-mask = <0 0 0 0>;
279 interrupt-map = <0 0 0 0 &pic 34 IRQ_TYPE_LEVEL_HIGH>;289 interrupt-map = <0 0 0 0 &pic 34 IRQ_TYPE_LEVEL_HIGH>;
290 ranges;
280 };291 };
281 292
282 pci_bridge@c,0 {293 pcie@c,0 {
283 compatible = "pci0014,7a09.1",294 compatible = "pci0014,7a09.1",
284 "pci0014,7a09",295 "pci0014,7a09",
285 "pciclass060400",296 "pciclass060400",
@@ -289,12 +300,16 @@ · 3 unmodified lines
289 interrupts = <35 IRQ_TYPE_LEVEL_HIGH>;300 interrupts = <35 IRQ_TYPE_LEVEL_HIGH>;
290 interrupt-parent = <&pic>;301 interrupt-parent = <&pic>;
291 302
303 #address-cells = <3>;
304 #size-cells = <2>;
305 device_type = "pci";
292 #interrupt-cells = <1>;306 #interrupt-cells = <1>;
293 interrupt-map-mask = <0 0 0 0>;307 interrupt-map-mask = <0 0 0 0>;
294 interrupt-map = <0 0 0 0 &pic 35 IRQ_TYPE_LEVEL_HIGH>;308 interrupt-map = <0 0 0 0 &pic 35 IRQ_TYPE_LEVEL_HIGH>;
309 ranges;
295 };310 };
296 311
297 pci_bridge@d,0 {312 pcie@d,0 {
298 compatible = "pci0014,7a19.1",313 compatible = "pci0014,7a19.1",
299 "pci0014,7a19",314 "pci0014,7a19",
300 "pciclass060400",315 "pciclass060400",
@@ -304,12 +319,16 @@ · 3 unmodified lines
304 interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;319 interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
305 interrupt-parent = <&pic>;320 interrupt-parent = <&pic>;
306 321
322 #address-cells = <3>;
323 #size-cells = <2>;
324 device_type = "pci";
307 #interrupt-cells = <1>;325 #interrupt-cells = <1>;
308 interrupt-map-mask = <0 0 0 0>;326 interrupt-map-mask = <0 0 0 0>;
309 interrupt-map = <0 0 0 0 &pic 36 IRQ_TYPE_LEVEL_HIGH>;327 interrupt-map = <0 0 0 0 &pic 36 IRQ_TYPE_LEVEL_HIGH>;
328 ranges;
310 };329 };
311 330
312 pci_bridge@e,0 {331 pcie@e,0 {
313 compatible = "pci0014,7a09.1",332 compatible = "pci0014,7a09.1",
314 "pci0014,7a09",333 "pci0014,7a09",
315 "pciclass060400",334 "pciclass060400",
@@ -319,12 +338,16 @@ · 3 unmodified lines
319 interrupts = <37 IRQ_TYPE_LEVEL_HIGH>;338 interrupts = <37 IRQ_TYPE_LEVEL_HIGH>;
320 interrupt-parent = <&pic>;339 interrupt-parent = <&pic>;
321 340
341 #address-cells = <3>;
342 #size-cells = <2>;
343 device_type = "pci";
322 #interrupt-cells = <1>;344 #interrupt-cells = <1>;
323 interrupt-map-mask = <0 0 0 0>;345 interrupt-map-mask = <0 0 0 0>;
324 interrupt-map = <0 0 0 0 &pic 37 IRQ_TYPE_LEVEL_HIGH>;346 interrupt-map = <0 0 0 0 &pic 37 IRQ_TYPE_LEVEL_HIGH>;
347 ranges;
325 };348 };
326 349
327 pci_bridge@f,0 {350 pcie@f,0 {
328 compatible = "pci0014,7a29.1",351 compatible = "pci0014,7a29.1",
329 "pci0014,7a29",352 "pci0014,7a29",
330 "pciclass060400",353 "pciclass060400",
@@ -334,12 +357,16 @@ · 3 unmodified lines
334 interrupts = <40 IRQ_TYPE_LEVEL_HIGH>;357 interrupts = <40 IRQ_TYPE_LEVEL_HIGH>;
335 interrupt-parent = <&pic>;358 interrupt-parent = <&pic>;
336 359
360 #address-cells = <3>;
361 #size-cells = <2>;
362 device_type = "pci";
337 #interrupt-cells = <1>;363 #interrupt-cells = <1>;
338 interrupt-map-mask = <0 0 0 0>;364 interrupt-map-mask = <0 0 0 0>;
339 interrupt-map = <0 0 0 0 &pic 40 IRQ_TYPE_LEVEL_HIGH>;365 interrupt-map = <0 0 0 0 &pic 40 IRQ_TYPE_LEVEL_HIGH>;
366 ranges;
340 };367 };
341 368
342 pci_bridge@10,0 {369 pcie@10,0 {
343 compatible = "pci0014,7a19.1",370 compatible = "pci0014,7a19.1",
344 "pci0014,7a19",371 "pci0014,7a19",
345 "pciclass060400",372 "pciclass060400",
@@ -349,12 +376,16 @@ · 3 unmodified lines
349 interrupts = <41 IRQ_TYPE_LEVEL_HIGH>;376 interrupts = <41 IRQ_TYPE_LEVEL_HIGH>;
350 interrupt-parent = <&pic>;377 interrupt-parent = <&pic>;
351 378
379 #address-cells = <3>;
380 #size-cells = <2>;
381 device_type = "pci";
352 #interrupt-cells = <1>;382 #interrupt-cells = <1>;
353 interrupt-map-mask = <0 0 0 0>;383 interrupt-map-mask = <0 0 0 0>;
354 interrupt-map = <0 0 0 0 &pic 41 IRQ_TYPE_LEVEL_HIGH>;384 interrupt-map = <0 0 0 0 &pic 41 IRQ_TYPE_LEVEL_HIGH>;
385 ranges;
355 };386 };
356 387
357 pci_bridge@11,0 {388 pcie@11,0 {
358 compatible = "pci0014,7a29.1",389 compatible = "pci0014,7a29.1",
359 "pci0014,7a29",390 "pci0014,7a29",
360 "pciclass060400",391 "pciclass060400",
@@ -364,12 +395,16 @@ · 3 unmodified lines
364 interrupts = <42 IRQ_TYPE_LEVEL_HIGH>;395 interrupts = <42 IRQ_TYPE_LEVEL_HIGH>;
365 interrupt-parent = <&pic>;396 interrupt-parent = <&pic>;
366 397
398 #address-cells = <3>;
399 #size-cells = <2>;
400 device_type = "pci";
367 #interrupt-cells = <1>;401 #interrupt-cells = <1>;
368 interrupt-map-mask = <0 0 0 0>;402 interrupt-map-mask = <0 0 0 0>;
369 interrupt-map = <0 0 0 0 &pic 42 IRQ_TYPE_LEVEL_HIGH>;403 interrupt-map = <0 0 0 0 &pic 42 IRQ_TYPE_LEVEL_HIGH>;
404 ranges;
370 };405 };
371 406
372 pci_bridge@12,0 {407 pcie@12,0 {
373 compatible = "pci0014,7a19.1",408 compatible = "pci0014,7a19.1",
374 "pci0014,7a19",409 "pci0014,7a19",
375 "pciclass060400",410 "pciclass060400",
@@ -379,12 +414,16 @@ · 3 unmodified lines
379 interrupts = <43 IRQ_TYPE_LEVEL_HIGH>;414 interrupts = <43 IRQ_TYPE_LEVEL_HIGH>;
380 interrupt-parent = <&pic>;415 interrupt-parent = <&pic>;
381 416
417 #address-cells = <3>;
418 #size-cells = <2>;
419 device_type = "pci";
382 #interrupt-cells = <1>;420 #interrupt-cells = <1>;
383 interrupt-map-mask = <0 0 0 0>;421 interrupt-map-mask = <0 0 0 0>;
384 interrupt-map = <0 0 0 0 &pic 43 IRQ_TYPE_LEVEL_HIGH>;422 interrupt-map = <0 0 0 0 &pic 43 IRQ_TYPE_LEVEL_HIGH>;
423 ranges;
385 };424 };
386 425
387 pci_bridge@13,0 {426 pcie@13,0 {
388 compatible = "pci0014,7a29.1",427 compatible = "pci0014,7a29.1",
389 "pci0014,7a29",428 "pci0014,7a29",
390 "pciclass060400",429 "pciclass060400",
@@ -394,12 +433,16 @@ · 3 unmodified lines
394 interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;433 interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
395 interrupt-parent = <&pic>;434 interrupt-parent = <&pic>;
396 435
436 #address-cells = <3>;
437 #size-cells = <2>;
438 device_type = "pci";
397 #interrupt-cells = <1>;439 #interrupt-cells = <1>;
398 interrupt-map-mask = <0 0 0 0>;440 interrupt-map-mask = <0 0 0 0>;
399 interrupt-map = <0 0 0 0 &pic 38 IRQ_TYPE_LEVEL_HIGH>;441 interrupt-map = <0 0 0 0 &pic 38 IRQ_TYPE_LEVEL_HIGH>;
442 ranges;
400 };443 };
401 444
402 pci_bridge@14,0 {445 pcie@14,0 {
403 compatible = "pci0014,7a19.1",446 compatible = "pci0014,7a19.1",
404 "pci0014,7a19",447 "pci0014,7a19",
405 "pciclass060400",448 "pciclass060400",
@@ -409,9 +452,13 @@ · 3 unmodified lines
409 interrupts = <39 IRQ_TYPE_LEVEL_HIGH>;452 interrupts = <39 IRQ_TYPE_LEVEL_HIGH>;
410 interrupt-parent = <&pic>;453 interrupt-parent = <&pic>;
411 454
455 #address-cells = <3>;
456 #size-cells = <2>;
457 device_type = "pci";
412 #interrupt-cells = <1>;458 #interrupt-cells = <1>;
413 interrupt-map-mask = <0 0 0 0>;459 interrupt-map-mask = <0 0 0 0>;
414 interrupt-map = <0 0 0 0 &pic 39 IRQ_TYPE_LEVEL_HIGH>;460 interrupt-map = <0 0 0 0 &pic 39 IRQ_TYPE_LEVEL_HIGH>;
461 ranges;
415 };462 };
416 };463 };
417 464
arch/mips/boot/dts/mobileye/eyeq5-clocks.dtsi+0−270
@@ -1,270 +0,0 @@
1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2/*
3 * Copyright 2023 Mobileye Vision Technologies Ltd.
4 */
5
6#include <dt-bindings/clock/mobileye,eyeq5-clk.h>
7
8/ {
9 /* Fixed clock */
10 xtal: xtal {
11 compatible = "fixed-clock";
12 #clock-cells = <0>;
13 clock-frequency = <30000000>;
14 };
15
16/* PLL_CPU derivatives */
17 occ_cpu: occ-cpu {
18 compatible = "fixed-factor-clock";
19 clocks = <&olb EQ5C_PLL_CPU>;
20 #clock-cells = <0>;
21 clock-div = <1>;
22 clock-mult = <1>;
23 };
24 si_css0_ref_clk: si-css0-ref-clk { /* gate ClkRstGen_si_css0_ref */
25 compatible = "fixed-factor-clock";
26 clocks = <&occ_cpu>;
27 #clock-cells = <0>;
28 clock-div = <1>;
29 clock-mult = <1>;
30 };
31 cpc_clk: cpc-clk {
32 compatible = "fixed-factor-clock";
33 clocks = <&si_css0_ref_clk>;
34 #clock-cells = <0>;
35 clock-div = <1>;
36 clock-mult = <1>;
37 };
38 core0_clk: core0-clk {
39 compatible = "fixed-factor-clock";
40 clocks = <&si_css0_ref_clk>;
41 #clock-cells = <0>;
42 clock-div = <1>;
43 clock-mult = <1>;
44 };
45 core1_clk: core1-clk {
46 compatible = "fixed-factor-clock";
47 clocks = <&si_css0_ref_clk>;
48 #clock-cells = <0>;
49 clock-div = <1>;
50 clock-mult = <1>;
51 };
52 core2_clk: core2-clk {
53 compatible = "fixed-factor-clock";
54 clocks = <&si_css0_ref_clk>;
55 #clock-cells = <0>;
56 clock-div = <1>;
57 clock-mult = <1>;
58 };
59 core3_clk: core3-clk {
60 compatible = "fixed-factor-clock";
61 clocks = <&si_css0_ref_clk>;
62 #clock-cells = <0>;
63 clock-div = <1>;
64 clock-mult = <1>;
65 };
66 cm_clk: cm-clk {
67 compatible = "fixed-factor-clock";
68 clocks = <&si_css0_ref_clk>;
69 #clock-cells = <0>;
70 clock-div = <1>;
71 clock-mult = <1>;
72 };
73 mem_clk: mem-clk {
74 compatible = "fixed-factor-clock";
75 clocks = <&si_css0_ref_clk>;
76 #clock-cells = <0>;
77 clock-div = <1>;
78 clock-mult = <1>;
79 };
80 occ_isram: occ-isram {
81 compatible = "fixed-factor-clock";
82 clocks = <&olb EQ5C_PLL_CPU>;
83 #clock-cells = <0>;
84 clock-div = <2>;
85 clock-mult = <1>;
86 };
87 isram_clk: isram-clk { /* gate ClkRstGen_isram */
88 compatible = "fixed-factor-clock";
89 clocks = <&occ_isram>;
90 #clock-cells = <0>;
91 clock-div = <1>;
92 clock-mult = <1>;
93 };
94 occ_dbu: occ-dbu {
95 compatible = "fixed-factor-clock";
96 clocks = <&olb EQ5C_PLL_CPU>;
97 #clock-cells = <0>;
98 clock-div = <10>;
99 clock-mult = <1>;
100 };
101 si_dbu_tp_pclk: si-dbu-tp-pclk { /* gate ClkRstGen_dbu */
102 compatible = "fixed-factor-clock";
103 clocks = <&occ_dbu>;
104 #clock-cells = <0>;
105 clock-div = <1>;
106 clock-mult = <1>;
107 };
108/* PLL_VDI derivatives */
109 occ_vdi: occ-vdi {
110 compatible = "fixed-factor-clock";
111 clocks = <&olb EQ5C_PLL_VDI>;
112 #clock-cells = <0>;
113 clock-div = <2>;
114 clock-mult = <1>;
115 };
116 vdi_clk: vdi-clk { /* gate ClkRstGen_vdi */
117 compatible = "fixed-factor-clock";
118 clocks = <&occ_vdi>;
119 #clock-cells = <0>;
120 clock-div = <1>;
121 clock-mult = <1>;
122 };
123 occ_can_ser: occ-can-ser {
124 compatible = "fixed-factor-clock";
125 clocks = <&olb EQ5C_PLL_VDI>;
126 #clock-cells = <0>;
127 clock-div = <16>;
128 clock-mult = <1>;
129 };
130 can_ser_clk: can-ser-clk { /* gate ClkRstGen_can_ser */
131 compatible = "fixed-factor-clock";
132 clocks = <&occ_can_ser>;
133 #clock-cells = <0>;
134 clock-div = <1>;
135 clock-mult = <1>;
136 };
137 i2c_ser_clk: i2c-ser-clk {
138 compatible = "fixed-factor-clock";
139 clocks = <&olb EQ5C_PLL_VDI>;
140 #clock-cells = <0>;
141 clock-div = <20>;
142 clock-mult = <1>;
143 };
144/* PLL_PER derivatives */
145 occ_periph: occ-periph {
146 compatible = "fixed-factor-clock";
147 clocks = <&olb EQ5C_PLL_PER>;
148 #clock-cells = <0>;
149 clock-div = <16>;
150 clock-mult = <1>;
151 };
152 periph_clk: periph-clk {
153 compatible = "fixed-factor-clock";
154 clocks = <&occ_periph>;
155 #clock-cells = <0>;
156 clock-div = <1>;
157 clock-mult = <1>;
158 };
159 can_clk: can-clk {
160 compatible = "fixed-factor-clock";
161 clocks = <&occ_periph>;
162 #clock-cells = <0>;
163 clock-div = <1>;
164 clock-mult = <1>;
165 };
166 spi_clk: spi-clk {
167 compatible = "fixed-factor-clock";
168 clocks = <&occ_periph>;
169 #clock-cells = <0>;
170 clock-div = <1>;
171 clock-mult = <1>;
172 };
173 uart_clk: uart-clk {
174 compatible = "fixed-factor-clock";
175 clocks = <&occ_periph>;
176 #clock-cells = <0>;
177 clock-div = <1>;
178 clock-mult = <1>;
179 };
180 i2c_clk: i2c-clk {
181 compatible = "fixed-factor-clock";
182 clocks = <&occ_periph>;
183 #clock-cells = <0>;
184 clock-div = <1>;
185 clock-mult = <1>;
186 clock-output-names = "i2c_clk";
187 };
188 timer_clk: timer-clk {
189 compatible = "fixed-factor-clock";
190 clocks = <&occ_periph>;
191 #clock-cells = <0>;
192 clock-div = <1>;
193 clock-mult = <1>;
194 clock-output-names = "timer_clk";
195 };
196 gpio_clk: gpio-clk {
197 compatible = "fixed-factor-clock";
198 clocks = <&occ_periph>;
199 #clock-cells = <0>;
200 clock-div = <1>;
201 clock-mult = <1>;
202 clock-output-names = "gpio_clk";
203 };
204 emmc_sys_clk: emmc-sys-clk {
205 compatible = "fixed-factor-clock";
206 clocks = <&olb EQ5C_PLL_PER>;
207 #clock-cells = <0>;
208 clock-div = <10>;
209 clock-mult = <1>;
210 clock-output-names = "emmc_sys_clk";
211 };
212 ccf_ctrl_clk: ccf-ctrl-clk {
213 compatible = "fixed-factor-clock";
214 clocks = <&olb EQ5C_PLL_PER>;
215 #clock-cells = <0>;
216 clock-div = <4>;
217 clock-mult = <1>;
218 clock-output-names = "ccf_ctrl_clk";
219 };
220 occ_mjpeg_core: occ-mjpeg-core {
221 compatible = "fixed-factor-clock";
222 clocks = <&olb EQ5C_PLL_PER>;
223 #clock-cells = <0>;
224 clock-div = <2>;
225 clock-mult = <1>;
226 clock-output-names = "occ_mjpeg_core";
227 };
228 hsm_clk: hsm-clk { /* gate ClkRstGen_hsm */
229 compatible = "fixed-factor-clock";
230 clocks = <&occ_mjpeg_core>;
231 #clock-cells = <0>;
232 clock-div = <1>;
233 clock-mult = <1>;
234 clock-output-names = "hsm_clk";
235 };
236 mjpeg_core_clk: mjpeg-core-clk { /* gate ClkRstGen_mjpeg_gen */
237 compatible = "fixed-factor-clock";
238 clocks = <&occ_mjpeg_core>;
239 #clock-cells = <0>;
240 clock-div = <1>;
241 clock-mult = <1>;
242 clock-output-names = "mjpeg_core_clk";
243 };
244 fcmu_a_clk: fcmu-a-clk {
245 compatible = "fixed-factor-clock";
246 clocks = <&olb EQ5C_PLL_PER>;
247 #clock-cells = <0>;
248 clock-div = <20>;
249 clock-mult = <1>;
250 clock-output-names = "fcmu_a_clk";
251 };
252 occ_pci_sys: occ-pci-sys {
253 compatible = "fixed-factor-clock";
254 clocks = <&olb EQ5C_PLL_PER>;
255 #clock-cells = <0>;
256 clock-div = <8>;
257 clock-mult = <1>;
258 clock-output-names = "occ_pci_sys";
259 };
260 pclk: pclk {
261 compatible = "fixed-clock";
262 #clock-cells = <0>;
263 clock-frequency = <250000000>; /* 250MHz */
264 };
265 tsu_clk: tsu-clk {
266 compatible = "fixed-clock";
267 #clock-cells = <0>;
268 clock-frequency = <125000000>; /* 125MHz */
269 };
270};
arch/mips/boot/dts/mobileye/eyeq5.dtsi+24−6
@@ -5,7 +5,7 @@ · 4 unmodified lines
5 5
6#include <dt-bindings/interrupt-controller/mips-gic.h>6#include <dt-bindings/interrupt-controller/mips-gic.h>
7 7
8#include "eyeq5-clocks.dtsi"8#include <dt-bindings/clock/mobileye,eyeq5-clk.h>
9 9
10/ {10/ {
11 #address-cells = <2>;11 #address-cells = <2>;
@@ -17,7 +17,7 @@ · 5 unmodified lines
17 device_type = "cpu";17 device_type = "cpu";
18 compatible = "img,i6500";18 compatible = "img,i6500";
19 reg = <0>;19 reg = <0>;
20 clocks = <&core0_clk>;20 clocks = <&olb EQ5C_CPU_CORE0>;
21 };21 };
22 };22 };
23 23
@@ -64,6 +64,24 @@ · 40 unmodified lines
64 #interrupt-cells = <1>;64 #interrupt-cells = <1>;
65 };65 };
66 66
67 xtal: xtal {
68 compatible = "fixed-clock";
69 #clock-cells = <0>;
70 clock-frequency = <30000000>;
71 };
72
73 pclk: pclk {
74 compatible = "fixed-clock";
75 #clock-cells = <0>;
76 clock-frequency = <250000000>; /* 250MHz */
77 };
78
79 tsu_clk: tsu-clk {
80 compatible = "fixed-clock";
81 #clock-cells = <0>;
82 clock-frequency = <125000000>; /* 125MHz */
83 };
84
67 soc: soc {85 soc: soc {
68 #address-cells = <2>;86 #address-cells = <2>;
69 #size-cells = <2>;87 #size-cells = <2>;
@@ -76,7 +94,7 @@ · 6 unmodified lines
76 reg-io-width = <4>;94 reg-io-width = <4>;
77 interrupt-parent = <&gic>;95 interrupt-parent = <&gic>;
78 interrupts = <GIC_SHARED 6 IRQ_TYPE_LEVEL_HIGH>;96 interrupts = <GIC_SHARED 6 IRQ_TYPE_LEVEL_HIGH>;
79 clocks = <&uart_clk>, <&occ_periph>;97 clocks = <&olb EQ5C_PER_UART>, <&olb EQ5C_PER_OCC>;
80 clock-names = "uartclk", "apb_pclk";98 clock-names = "uartclk", "apb_pclk";
81 resets = <&olb 0 10>;99 resets = <&olb 0 10>;
82 pinctrl-names = "default";100 pinctrl-names = "default";
@@ -89,7 +107,7 @@ · 6 unmodified lines
89 reg-io-width = <4>;107 reg-io-width = <4>;
90 interrupt-parent = <&gic>;108 interrupt-parent = <&gic>;
91 interrupts = <GIC_SHARED 6 IRQ_TYPE_LEVEL_HIGH>;109 interrupts = <GIC_SHARED 6 IRQ_TYPE_LEVEL_HIGH>;
92 clocks = <&uart_clk>, <&occ_periph>;110 clocks = <&olb EQ5C_PER_UART>, <&olb EQ5C_PER_OCC>;
93 clock-names = "uartclk", "apb_pclk";111 clock-names = "uartclk", "apb_pclk";
94 resets = <&olb 0 11>;112 resets = <&olb 0 11>;
95 pinctrl-names = "default";113 pinctrl-names = "default";
@@ -102,7 +120,7 @@ · 6 unmodified lines
102 reg-io-width = <4>;120 reg-io-width = <4>;
103 interrupt-parent = <&gic>;121 interrupt-parent = <&gic>;
104 interrupts = <GIC_SHARED 6 IRQ_TYPE_LEVEL_HIGH>;122 interrupts = <GIC_SHARED 6 IRQ_TYPE_LEVEL_HIGH>;
105 clocks = <&uart_clk>, <&occ_periph>;123 clocks = <&olb EQ5C_PER_UART>, <&olb EQ5C_PER_OCC>;
106 clock-names = "uartclk", "apb_pclk";124 clock-names = "uartclk", "apb_pclk";
107 resets = <&olb 0 12>;125 resets = <&olb 0 12>;
108 pinctrl-names = "default";126 pinctrl-names = "default";
@@ -135,7 +153,7 @@ · 26 unmodified lines
135 timer {153 timer {
136 compatible = "mti,gic-timer";154 compatible = "mti,gic-timer";
137 interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;155 interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
138 clocks = <&core0_clk>;156 clocks = <&olb EQ5C_CPU_CORE0>;
139 };157 };
140 };158 };
141 };159 };
arch/mips/boot/dts/mobileye/eyeq6h-fixed-clocks.dtsi+0−52
@@ -1,52 +0,0 @@
1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2/*
3 * Copyright 2023 Mobileye Vision Technologies Ltd.
4 */
5
6#include <dt-bindings/clock/mobileye,eyeq5-clk.h>
7
8/ {
9 xtal: clock-30000000 {
10 compatible = "fixed-clock";
11 #clock-cells = <0>;
12 clock-frequency = <30000000>;
13 };
14
15 pll_west: clock-2000000000-west {
16 compatible = "fixed-clock";
17 #clock-cells = <0>;
18 clock-frequency = <2000000000>;
19 };
20
21 pll_cpu: clock-2000000000-cpu {
22 compatible = "fixed-clock";
23 #clock-cells = <0>;
24 clock-frequency = <2000000000>;
25 };
26
27 /* pll-cpu derivatives */
28 occ_cpu: clock-2000000000-occ-cpu {
29 compatible = "fixed-factor-clock";
30 clocks = <&pll_cpu>;
31 #clock-cells = <0>;
32 clock-div = <1>;
33 clock-mult = <1>;
34 };
35
36 /* pll-west derivatives */
37 occ_periph_w: clock-200000000 {
38 compatible = "fixed-factor-clock";
39 clocks = <&pll_west>;
40 #clock-cells = <0>;
41 clock-div = <10>;
42 clock-mult = <1>;
43 };
44 uart_clk: clock-200000000-uart {
45 compatible = "fixed-factor-clock";
46 clocks = <&occ_periph_w>;
47 #clock-cells = <0>;
48 clock-div = <1>;
49 clock-mult = <1>;
50 };
51
52};
arch/mips/boot/dts/mobileye/eyeq6h.dtsi+69−4
@@ -5,7 +5,7 @@ · 4 unmodified lines
5 5
6#include <dt-bindings/interrupt-controller/mips-gic.h>6#include <dt-bindings/interrupt-controller/mips-gic.h>
7 7
8#include "eyeq6h-fixed-clocks.dtsi"8#include <dt-bindings/clock/mobileye,eyeq5-clk.h>
9 9
10/ {10/ {
11 #address-cells = <2>;11 #address-cells = <2>;
@@ -17,7 +17,7 @@ · 5 unmodified lines
17 device_type = "cpu";17 device_type = "cpu";
18 compatible = "img,i6500";18 compatible = "img,i6500";
19 reg = <0>;19 reg = <0>;
20 clocks = <&occ_cpu>;20 clocks = <&olb_central EQ6HC_CENTRAL_CPU_OCC>;
21 };21 };
22 };22 };
23 23
@@ -32,19 +32,42 @@ · 8 unmodified lines
32 #interrupt-cells = <1>;32 #interrupt-cells = <1>;
33 };33 };
34 34
35 xtal: clock-30000000 {
36 compatible = "fixed-clock";
37 #clock-cells = <0>;
38 clock-frequency = <30000000>;
39 };
40
35 soc: soc {41 soc: soc {
36 compatible = "simple-bus";42 compatible = "simple-bus";
37 #address-cells = <2>;43 #address-cells = <2>;
38 #size-cells = <2>;44 #size-cells = <2>;
39 ranges;45 ranges;
40 46
47 olb_acc: system-controller@d2003000 {
48 compatible = "mobileye,eyeq6h-acc-olb", "syscon";
49 reg = <0x0 0xd2003000 0x0 0x1000>;
50 #reset-cells = <1>;
51 #clock-cells = <1>;
52 clocks = <&xtal>;
53 clock-names = "ref";
54 };
55
56 olb_central: system-controller@d3100000 {
57 compatible = "mobileye,eyeq6h-central-olb", "syscon";
58 reg = <0x0 0xd3100000 0x0 0x1000>;
59 #clock-cells = <1>;
60 clocks = <&xtal>;
61 clock-names = "ref";
62 };
63
41 uart0: serial@d3331000 {64 uart0: serial@d3331000 {
42 compatible = "arm,pl011", "arm,primecell";65 compatible = "arm,pl011", "arm,primecell";
43 reg = <0 0xd3331000 0x0 0x1000>;66 reg = <0 0xd3331000 0x0 0x1000>;
44 reg-io-width = <4>;67 reg-io-width = <4>;
45 interrupt-parent = <&gic>;68 interrupt-parent = <&gic>;
46 interrupts = <GIC_SHARED 43 IRQ_TYPE_LEVEL_HIGH>;69 interrupts = <GIC_SHARED 43 IRQ_TYPE_LEVEL_HIGH>;
47 clocks = <&occ_periph_w>, <&occ_periph_w>;70 clocks = <&olb_west EQ6HC_WEST_PER_UART>, <&olb_west EQ6HC_WEST_PER_OCC>;
48 clock-names = "uartclk", "apb_pclk";71 clock-names = "uartclk", "apb_pclk";
49 };72 };
50 73
@@ -56,6 +79,15 @@ · 5 unmodified lines
56 pinctrl-single,function-mask = <0xffff>;79 pinctrl-single,function-mask = <0xffff>;
57 };80 };
58 81
82 olb_west: system-controller@d3338000 {
83 compatible = "mobileye,eyeq6h-west-olb", "syscon";
84 reg = <0x0 0xd3338000 0x0 0x1000>;
85 #reset-cells = <1>;
86 #clock-cells = <1>;
87 clocks = <&xtal>;
88 clock-names = "ref";
89 };
90
59 pinctrl_east: pinctrl@d3357000 {91 pinctrl_east: pinctrl@d3357000 {
60 compatible = "pinctrl-single";92 compatible = "pinctrl-single";
61 reg = <0x0 0xd3357000 0x0 0xb0>;93 reg = <0x0 0xd3357000 0x0 0xb0>;
@@ -64,6 +96,23 @@ · 2 unmodified lines
64 pinctrl-single,function-mask = <0xffff>;96 pinctrl-single,function-mask = <0xffff>;
65 };97 };
66 98
99 olb_east: system-controller@d3358000 {
100 compatible = "mobileye,eyeq6h-east-olb", "syscon";
101 reg = <0x0 0xd3358000 0x0 0x1000>;
102 #reset-cells = <1>;
103 #clock-cells = <1>;
104 clocks = <&xtal>;
105 clock-names = "ref";
106 };
107
108 olb_south: system-controller@d8013000 {
109 compatible = "mobileye,eyeq6h-south-olb", "syscon";
110 reg = <0x0 0xd8013000 0x0 0x1000>;
111 #clock-cells = <1>;
112 clocks = <&xtal>;
113 clock-names = "ref";
114 };
115
67 pinctrl_south: pinctrl@d8014000 {116 pinctrl_south: pinctrl@d8014000 {
68 compatible = "pinctrl-single";117 compatible = "pinctrl-single";
69 reg = <0x0 0xd8014000 0x0 0xf8>;118 reg = <0x0 0xd8014000 0x0 0xf8>;
@@ -72,6 +121,22 @@ · 2 unmodified lines
72 pinctrl-single,function-mask = <0xffff>;121 pinctrl-single,function-mask = <0xffff>;
73 };122 };
74 123
124 olb_ddr0: system-controller@e4080000 {
125 compatible = "mobileye,eyeq6h-ddr0-olb", "syscon";
126 reg = <0x0 0xe4080000 0x0 0x1000>;
127 #clock-cells = <1>;
128 clocks = <&xtal>;
129 clock-names = "ref";
130 };
131
132 olb_ddr1: system-controller@e4081000 {
133 compatible = "mobileye,eyeq6h-ddr1-olb", "syscon";
134 reg = <0x0 0xe4081000 0x0 0x1000>;
135 #clock-cells = <1>;
136 clocks = <&xtal>;
137 clock-names = "ref";
138 };
139
75 gic: interrupt-controller@f0920000 {140 gic: interrupt-controller@f0920000 {
76 compatible = "mti,gic";141 compatible = "mti,gic";
77 reg = <0x0 0xf0920000 0x0 0x20000>;142 reg = <0x0 0xf0920000 0x0 0x20000>;
@@ -89,7 +154,7 @@ · 11 unmodified lines
89 timer {154 timer {
90 compatible = "mti,gic-timer";155 compatible = "mti,gic-timer";
91 interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;156 interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
92 clocks = <&occ_cpu>;157 clocks = <&olb_central EQ6HC_CENTRAL_CPU_OCC>;
93 };158 };
94 };159 };
95 };160 };
arch/mips/boot/dts/realtek/rtl930x.dtsi+13−0
@@ -61,6 +61,8 @@ · 60 unmodified lines
61};61};
62 62
63&soc {63&soc {
64 ranges = <0x0 0x18000000 0x20000>;
65
64 intc: interrupt-controller@3000 {66 intc: interrupt-controller@3000 {
65 compatible = "realtek,rtl9300-intc", "realtek,rtl-intc";67 compatible = "realtek,rtl9300-intc", "realtek,rtl-intc";
66 reg = <0x3000 0x18>, <0x3018 0x18>;68 reg = <0x3000 0x18>, <0x3018 0x18>;
@@ -88,6 +90,17 @@ · 21 unmodified lines
88 interrupts = <7>, <8>, <9>, <10>, <11>;90 interrupts = <7>, <8>, <9>, <10>, <11>;
89 clocks = <&lx_clk>;91 clocks = <&lx_clk>;
90 };92 };
93
94 snand: spi@1a400 {
95 compatible = "realtek,rtl9301-snand";
96 reg = <0x1a400 0x44>;
97 interrupt-parent = <&intc>;
98 interrupts = <19>;
99 clocks = <&lx_clk>;
100 #address-cells = <1>;
101 #size-cells = <0>;
102 status = "disabled";
103 };
91};104};
92 105
93&uart0 {106&uart0 {
arch/mips/kernel/head.S+1−0
@@ -59,6 +59,7 @@ · 58 unmodified lines
59#endif59#endif
60 .endm60 .endm
61 61
62 __HEAD
62#ifndef CONFIG_NO_EXCEPT_FILL63#ifndef CONFIG_NO_EXCEPT_FILL
63 /*64 /*
64 * Reserved space for exception handlers.65 * Reserved space for exception handlers.
arch/mips/kernel/vmlinux.lds.S+1−0
@@ -61,6 +61,7 @@ SECTIONS · 60 unmodified lines
61 /* read-only */61 /* read-only */
62 _text = .; /* Text and read-only data */62 _text = .; /* Text and read-only data */
63 .text : {63 .text : {
64 HEAD_TEXT
64 TEXT_TEXT65 TEXT_TEXT
65 SCHED_TEXT66 SCHED_TEXT
66 LOCK_TEXT67 LOCK_TEXT
arch/mips/pci/pci-xtalk-bridge.c+1−1
@@ -749,7 +749,7 @@ static void bridge_remove(struct platform_device *pdev) · 748 unmodified lines
749 749
750static struct platform_driver bridge_driver = {750static struct platform_driver bridge_driver = {
751 .probe = bridge_probe,751 .probe = bridge_probe,
752 .remove_new = bridge_remove,752 .remove = bridge_remove,
753 .driver = {753 .driver = {
754 .name = "xtalk-bridge",754 .name = "xtalk-bridge",
755 }755 }
arch/parisc/kernel/ftrace.c+1−1
@@ -87,7 +87,7 @@ int ftrace_enable_ftrace_graph_caller(void) · 86 unmodified lines
87 87
88int ftrace_disable_ftrace_graph_caller(void)88int ftrace_disable_ftrace_graph_caller(void)
89{89{
90 static_key_enable(&ftrace_graph_enable.key);90 static_key_disable(&ftrace_graph_enable.key);
91 return 0;91 return 0;
92}92}
93#endif93#endif
arch/powerpc/Makefile+4−2
@@ -403,10 +403,12 @@ PHONY += stack_protector_prepare · 402 unmodified lines
403stack_protector_prepare: prepare0403stack_protector_prepare: prepare0
404ifdef CONFIG_PPC64404ifdef CONFIG_PPC64
405 $(eval KBUILD_CFLAGS += -mstack-protector-guard=tls -mstack-protector-guard-reg=r13 \405 $(eval KBUILD_CFLAGS += -mstack-protector-guard=tls -mstack-protector-guard-reg=r13 \
406 -mstack-protector-guard-offset=$(shell awk '{if ($$2 == "PACA_CANARY") print $$3;}' include/generated/asm-offsets.h))406 -mstack-protector-guard-offset=$(shell awk '{if ($$2 == "PACA_CANARY") print $$3;}' \
407 $(objtree)/include/generated/asm-offsets.h))
407else408else
408 $(eval KBUILD_CFLAGS += -mstack-protector-guard=tls -mstack-protector-guard-reg=r2 \409 $(eval KBUILD_CFLAGS += -mstack-protector-guard=tls -mstack-protector-guard-reg=r2 \
409 -mstack-protector-guard-offset=$(shell awk '{if ($$2 == "TASK_CANARY") print $$3;}' include/generated/asm-offsets.h))410 -mstack-protector-guard-offset=$(shell awk '{if ($$2 == "TASK_CANARY") print $$3;}' \
411 $(objtree)/include/generated/asm-offsets.h))
410endif412endif
411endif413endif
412 414
arch/powerpc/crypto/vmx.c+1−1
@@ -74,4 +74,4 @@ MODULE_DESCRIPTION("IBM VMX cryptographic acceleration instructions " · 73 unmodified lines
74 "support on Power 8");74 "support on Power 8");
75MODULE_LICENSE("GPL");75MODULE_LICENSE("GPL");
76MODULE_VERSION("1.0.0");76MODULE_VERSION("1.0.0");
77MODULE_IMPORT_NS(CRYPTO_INTERNAL);77MODULE_IMPORT_NS("CRYPTO_INTERNAL");
arch/powerpc/include/asm/simple_spinlock_types.h+1−1
@@ -3,7 +3,7 @@ · 2 unmodified lines
3#define _ASM_POWERPC_SIMPLE_SPINLOCK_TYPES_H3#define _ASM_POWERPC_SIMPLE_SPINLOCK_TYPES_H
4 4
5#ifndef __LINUX_SPINLOCK_TYPES_RAW_H5#ifndef __LINUX_SPINLOCK_TYPES_RAW_H
6# error "please don't include this file directly"6# error "Please do not include this file directly."
7#endif7#endif
8 8
9typedef struct {9typedef struct {
arch/powerpc/include/asm/spinlock_types.h+1−1
@@ -3,7 +3,7 @@ · 2 unmodified lines
3#define _ASM_POWERPC_SPINLOCK_TYPES_H3#define _ASM_POWERPC_SPINLOCK_TYPES_H
4 4
5#ifndef __LINUX_SPINLOCK_TYPES_RAW_H5#ifndef __LINUX_SPINLOCK_TYPES_RAW_H
6# error "please don't include this file directly"6# error "Please do not include this file directly."
7#endif7#endif
8 8
9#ifdef CONFIG_PPC_QUEUED_SPINLOCKS9#ifdef CONFIG_PPC_QUEUED_SPINLOCKS
arch/powerpc/kernel/prom_init.c+27−2
@@ -2848,7 +2848,7 @@ static void __init fixup_device_tree_chrp(void) · 2847 unmodified lines
2848#endif2848#endif
2849 2849
2850#if defined(CONFIG_PPC64) && defined(CONFIG_PPC_PMAC)2850#if defined(CONFIG_PPC64) && defined(CONFIG_PPC_PMAC)
2851static void __init fixup_device_tree_pmac(void)2851static void __init fixup_device_tree_pmac64(void)
2852{2852{
2853 phandle u3, i2c, mpic;2853 phandle u3, i2c, mpic;
2854 u32 u3_rev;2854 u32 u3_rev;
@@ -2888,7 +2888,31 @@ static void __init fixup_device_tree_pmac(void) · 33 unmodified lines
2888 &parent, sizeof(parent));2888 &parent, sizeof(parent));
2889}2889}
2890#else2890#else
2891#define fixup_device_tree_pmac()2891#define fixup_device_tree_pmac64()
2892#endif
2893
2894#ifdef CONFIG_PPC_PMAC
2895static void __init fixup_device_tree_pmac(void)
2896{
2897 __be32 val = 1;
2898 char type[8];
2899 phandle node;
2900
2901 // Some pmacs are missing #size-cells on escc nodes
2902 for (node = 0; prom_next_node(&node); ) {
2903 type[0] = '\0';
2904 prom_getprop(node, "device_type", type, sizeof(type));
2905 if (prom_strcmp(type, "escc"))
2906 continue;
2907
2908 if (prom_getproplen(node, "#size-cells") != PROM_ERROR)
2909 continue;
2910
2911 prom_setprop(node, NULL, "#size-cells", &val, sizeof(val));
2912 }
2913}
2914#else
2915static inline void fixup_device_tree_pmac(void) { }
2892#endif2916#endif
2893 2917
2894#ifdef CONFIG_PPC_EFIKA2918#ifdef CONFIG_PPC_EFIKA
@@ -3111,6 +3135,7 @@ static void __init fixup_device_tree(void) · 216 unmodified lines
3111{3135{
3112 fixup_device_tree_chrp();3136 fixup_device_tree_chrp();
3113 fixup_device_tree_pmac();3137 fixup_device_tree_pmac();
3138 fixup_device_tree_pmac64();
3114 fixup_device_tree_efika();3139 fixup_device_tree_efika();
3115 fixup_device_tree_pasemi();3140 fixup_device_tree_pasemi();
3116}3141}
arch/powerpc/platforms/pseries/svm.c+0−1
@@ -10,7 +10,6 @@ · 9 unmodified lines
10#include <linux/memblock.h>10#include <linux/memblock.h>
11#include <linux/mem_encrypt.h>11#include <linux/mem_encrypt.h>
12#include <linux/cc_platform.h>12#include <linux/cc_platform.h>
13#include <linux/mem_encrypt.h>
14#include <asm/machdep.h>13#include <asm/machdep.h>
15#include <asm/svm.h>14#include <asm/svm.h>
16#include <asm/swiotlb.h>15#include <asm/swiotlb.h>
arch/riscv/Kconfig+137−2
@@ -32,6 +32,7 @@ config RISCV · 31 unmodified lines
32 select ARCH_HAS_FORTIFY_SOURCE32 select ARCH_HAS_FORTIFY_SOURCE
33 select ARCH_HAS_GCOV_PROFILE_ALL33 select ARCH_HAS_GCOV_PROFILE_ALL
34 select ARCH_HAS_GIGANTIC_PAGE34 select ARCH_HAS_GIGANTIC_PAGE
35 select ARCH_HAS_HW_PTE_YOUNG
35 select ARCH_HAS_KCOV36 select ARCH_HAS_KCOV
36 select ARCH_HAS_KERNEL_FPU_SUPPORT if 64BIT && FPU37 select ARCH_HAS_KERNEL_FPU_SUPPORT if 64BIT && FPU
37 select ARCH_HAS_MEMBARRIER_CALLBACKS38 select ARCH_HAS_MEMBARRIER_CALLBACKS
@@ -83,6 +84,7 @@ config RISCV · 45 unmodified lines
83 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP84 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP
84 select ARCH_WANTS_NO_INSTR85 select ARCH_WANTS_NO_INSTR
85 select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE86 select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE
87 select ARCH_WEAK_RELEASE_ACQUIRE if ARCH_USE_QUEUED_SPINLOCKS
86 select BINFMT_FLAT_NO_DATA_START_OFFSET if !MMU88 select BINFMT_FLAT_NO_DATA_START_OFFSET if !MMU
87 select BUILDTIME_TABLE_SORT if MMU89 select BUILDTIME_TABLE_SORT if MMU
88 select CLINT_TIMER if RISCV_M_MODE90 select CLINT_TIMER if RISCV_M_MODE
@@ -116,6 +118,7 @@ config RISCV · 27 unmodified lines
116 select GENERIC_VDSO_TIME_NS if HAVE_GENERIC_VDSO118 select GENERIC_VDSO_TIME_NS if HAVE_GENERIC_VDSO
117 select HARDIRQS_SW_RESEND119 select HARDIRQS_SW_RESEND
118 select HAS_IOPORT if MMU120 select HAS_IOPORT if MMU
121 select HAVE_ALIGNED_STRUCT_PAGE
119 select HAVE_ARCH_AUDITSYSCALL122 select HAVE_ARCH_AUDITSYSCALL
120 select HAVE_ARCH_HUGE_VMALLOC if HAVE_ARCH_HUGE_VMAP123 select HAVE_ARCH_HUGE_VMALLOC if HAVE_ARCH_HUGE_VMAP
121 select HAVE_ARCH_HUGE_VMAP if MMU && 64BIT124 select HAVE_ARCH_HUGE_VMAP if MMU && 64BIT
@@ -507,6 +510,39 @@ config NODES_SHIFT · 385 unmodified lines
507 Specify the maximum number of NUMA Nodes available on the target510 Specify the maximum number of NUMA Nodes available on the target
508 system. Increases memory reserved to accommodate various tables.511 system. Increases memory reserved to accommodate various tables.
509 512
513choice
514 prompt "RISC-V spinlock type"
515 default RISCV_COMBO_SPINLOCKS
516
517config RISCV_TICKET_SPINLOCKS
518 bool "Using ticket spinlock"
519
520config RISCV_QUEUED_SPINLOCKS
521 bool "Using queued spinlock"
522 depends on SMP && MMU && NONPORTABLE
523 select ARCH_USE_QUEUED_SPINLOCKS
524 help
525 The queued spinlock implementation requires the forward progress
526 guarantee of cmpxchg()/xchg() atomic operations: CAS with Zabha or
527 LR/SC with Ziccrse provide such guarantee.
528
529 Select this if and only if Zabha or Ziccrse is available on your
530 platform, RISCV_QUEUED_SPINLOCKS must not be selected for platforms
531 without one of those extensions.
532
533 If unsure, select RISCV_COMBO_SPINLOCKS, which will use qspinlocks
534 when supported and otherwise ticket spinlocks.
535
536config RISCV_COMBO_SPINLOCKS
537 bool "Using combo spinlock"
538 depends on SMP && MMU
539 select ARCH_USE_QUEUED_SPINLOCKS
540 help
541 Embed both queued spinlock and ticket lock so that the spinlock
542 implementation can be chosen at runtime.
543
544endchoice
545
510config RISCV_ALTERNATIVE546config RISCV_ALTERNATIVE
511 bool547 bool
512 depends on !XIP_KERNEL548 depends on !XIP_KERNEL
@@ -532,6 +568,17 @@ config RISCV_ISA_C · 19 unmodified lines
532 568
533 If you don't know what to do here, say Y.569 If you don't know what to do here, say Y.
534 570
571config RISCV_ISA_SUPM
572 bool "Supm extension for userspace pointer masking"
573 depends on 64BIT
574 default y
575 help
576 Add support for pointer masking in userspace (Supm) when the
577 underlying hardware extension (Smnpm or Ssnpm) is detected at boot.
578
579 If this option is disabled, userspace will be unable to use
580 the prctl(PR_{SET,GET}_TAGGED_ADDR_CTRL) API.
581
535config RISCV_ISA_SVNAPOT582config RISCV_ISA_SVNAPOT
536 bool "Svnapot extension support for supervisor mode NAPOT pages"583 bool "Svnapot extension support for supervisor mode NAPOT pages"
537 depends on 64BIT && MMU584 depends on 64BIT && MMU
@@ -633,6 +680,40 @@ config RISCV_ISA_ZAWRS · 95 unmodified lines
633 use of these instructions in the kernel when the Zawrs extension is680 use of these instructions in the kernel when the Zawrs extension is
634 detected at boot.681 detected at boot.
635 682
683config TOOLCHAIN_HAS_ZABHA
684 bool
685 default y
686 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zabha)
687 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zabha)
688 depends on AS_HAS_OPTION_ARCH
689
690config RISCV_ISA_ZABHA
691 bool "Zabha extension support for atomic byte/halfword operations"
692 depends on TOOLCHAIN_HAS_ZABHA
693 depends on RISCV_ALTERNATIVE
694 default y
695 help
696 Enable the use of the Zabha ISA-extension to implement kernel
697 byte/halfword atomic memory operations when it is detected at boot.
698
699 If you don't know what to do here, say Y.
700
701config TOOLCHAIN_HAS_ZACAS
702 bool
703 default y
704 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zacas)
705 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zacas)
706 depends on AS_HAS_OPTION_ARCH
707
708config RISCV_ISA_ZACAS
709 bool "Zacas extension support for atomic CAS"
710 depends on TOOLCHAIN_HAS_ZACAS
711 depends on RISCV_ALTERNATIVE
712 default y
713 help
714 Enable the use of the Zacas ISA-extension to implement kernel atomic
715 cmpxchg operations when it is detected at boot.
716
636 If you don't know what to do here, say Y.717 If you don't know what to do here, say Y.
637 718
638config TOOLCHAIN_HAS_ZBB719config TOOLCHAIN_HAS_ZBB
@@ -786,10 +867,24 @@ config THREAD_SIZE_ORDER · 147 unmodified lines
786 867
787config RISCV_MISALIGNED868config RISCV_MISALIGNED
788 bool869 bool
870 help
871 Embed support for detecting and emulating misaligned
872 scalar or vector loads and stores.
873
874config RISCV_SCALAR_MISALIGNED
875 bool
876 select RISCV_MISALIGNED
789 select SYSCTL_ARCH_UNALIGN_ALLOW877 select SYSCTL_ARCH_UNALIGN_ALLOW
790 help878 help
791 Embed support for emulating misaligned loads and stores.879 Embed support for emulating misaligned loads and stores.
792 880
881config RISCV_VECTOR_MISALIGNED
882 bool
883 select RISCV_MISALIGNED
884 depends on RISCV_ISA_V
885 help
886 Enable detecting support for vector misaligned loads and stores.
887
793choice888choice
794 prompt "Unaligned Accesses Support"889 prompt "Unaligned Accesses Support"
795 default RISCV_PROBE_UNALIGNED_ACCESS890 default RISCV_PROBE_UNALIGNED_ACCESS
@@ -801,7 +896,7 @@ choice · 5 unmodified lines
801 896
802config RISCV_PROBE_UNALIGNED_ACCESS897config RISCV_PROBE_UNALIGNED_ACCESS
803 bool "Probe for hardware unaligned access support"898 bool "Probe for hardware unaligned access support"
804 select RISCV_MISALIGNED899 select RISCV_SCALAR_MISALIGNED
805 help900 help
806 During boot, the kernel will run a series of tests to determine the901 During boot, the kernel will run a series of tests to determine the
807 speed of unaligned accesses. This probing will dynamically determine902 speed of unaligned accesses. This probing will dynamically determine
@@ -812,7 +907,7 @@ config RISCV_PROBE_UNALIGNED_ACCESS · 4 unmodified lines
812 907
813config RISCV_EMULATED_UNALIGNED_ACCESS908config RISCV_EMULATED_UNALIGNED_ACCESS
814 bool "Emulate unaligned access where system support is missing"909 bool "Emulate unaligned access where system support is missing"
815 select RISCV_MISALIGNED910 select RISCV_SCALAR_MISALIGNED
816 help911 help
817 If unaligned memory accesses trap into the kernel as they are not912 If unaligned memory accesses trap into the kernel as they are not
818 supported by the system, the kernel will emulate the unaligned913 supported by the system, the kernel will emulate the unaligned
@@ -841,6 +936,46 @@ config RISCV_EFFICIENT_UNALIGNED_ACCESS · 22 unmodified lines
841 936
842endchoice937endchoice
843 938
939choice
940 prompt "Vector unaligned Accesses Support"
941 depends on RISCV_ISA_V
942 default RISCV_PROBE_VECTOR_UNALIGNED_ACCESS
943 help
944 This determines the level of support for vector unaligned accesses. This
945 information is used by the kernel to perform optimizations. It is also
946 exposed to user space via the hwprobe syscall. The hardware will be
947 probed at boot by default.
948
949config RISCV_PROBE_VECTOR_UNALIGNED_ACCESS
950 bool "Probe speed of vector unaligned accesses"
951 select RISCV_VECTOR_MISALIGNED
952 depends on RISCV_ISA_V
953 help
954 During boot, the kernel will run a series of tests to determine the
955 speed of vector unaligned accesses if they are supported. This probing
956 will dynamically determine the speed of vector unaligned accesses on
957 the underlying system if they are supported.
958
959config RISCV_SLOW_VECTOR_UNALIGNED_ACCESS
960 bool "Assume the system supports slow vector unaligned memory accesses"
961 depends on NONPORTABLE
962 help
963 Assume that the system supports slow vector unaligned memory accesses. The
964 kernel and userspace programs may not be able to run at all on systems
965 that do not support unaligned memory accesses.
966
967config RISCV_EFFICIENT_VECTOR_UNALIGNED_ACCESS
968 bool "Assume the system supports fast vector unaligned memory accesses"
969 depends on NONPORTABLE
970 help
971 Assume that the system supports fast vector unaligned memory accesses. When
972 enabled, this option improves the performance of the kernel on such
973 systems. However, the kernel and userspace programs will run much more
974 slowly, or will not be able to run at all, on systems that do not
975 support efficient unaligned memory accesses.
976
977endchoice
978
844source "arch/riscv/Kconfig.vendor"979source "arch/riscv/Kconfig.vendor"
845 980
846endmenu # "Platform type"981endmenu # "Platform type"
arch/riscv/Makefile+7−1
@@ -82,6 +82,12 @@ else · 81 unmodified lines
82riscv-march-$(CONFIG_TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI) := $(riscv-march-y)_zicsr_zifencei82riscv-march-$(CONFIG_TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI) := $(riscv-march-y)_zicsr_zifencei
83endif83endif
84 84
85# Check if the toolchain supports Zacas
86riscv-march-$(CONFIG_TOOLCHAIN_HAS_ZACAS) := $(riscv-march-y)_zacas
87
88# Check if the toolchain supports Zabha
89riscv-march-$(CONFIG_TOOLCHAIN_HAS_ZABHA) := $(riscv-march-y)_zabha
90
85# Remove F,D,V from isa string for all. Keep extensions between "fd" and "v" by91# Remove F,D,V from isa string for all. Keep extensions between "fd" and "v" by
86# matching non-v and non-multi-letter extensions out with the filter ([^v_]*)92# matching non-v and non-multi-letter extensions out with the filter ([^v_]*)
87KBUILD_CFLAGS += -march=$(shell echo $(riscv-march-y) | sed -E 's/(rv32ima|rv64ima)fd([^v_]*)v?/\1\2/')93KBUILD_CFLAGS += -march=$(shell echo $(riscv-march-y) | sed -E 's/(rv32ima|rv64ima)fd([^v_]*)v?/\1\2/')
@@ -129,7 +135,7 @@ stack_protector_prepare: prepare0 · 41 unmodified lines
129 -mstack-protector-guard-reg=tp \135 -mstack-protector-guard-reg=tp \
130 -mstack-protector-guard-offset=$(shell \136 -mstack-protector-guard-offset=$(shell \
131 awk '{if ($$2 == "TSK_STACK_CANARY") print $$3;}' \137 awk '{if ($$2 == "TSK_STACK_CANARY") print $$3;}' \
132 include/generated/asm-offsets.h))138 $(objtree)/include/generated/asm-offsets.h))
133endif139endif
134 140
135# arch specific predefines for sparse141# arch specific predefines for sparse
arch/riscv/configs/defconfig+1−0
@@ -167,6 +167,7 @@ CONFIG_PINCTRL_SOPHGO_CV1800B=y · 166 unmodified lines
167CONFIG_PINCTRL_SOPHGO_CV1812H=y167CONFIG_PINCTRL_SOPHGO_CV1812H=y
168CONFIG_PINCTRL_SOPHGO_SG2000=y168CONFIG_PINCTRL_SOPHGO_SG2000=y
169CONFIG_PINCTRL_SOPHGO_SG2002=y169CONFIG_PINCTRL_SOPHGO_SG2002=y
170CONFIG_GPIO_DWAPB=y
170CONFIG_GPIO_SIFIVE=y171CONFIG_GPIO_SIFIVE=y
171CONFIG_POWER_RESET_GPIO_RESTART=y172CONFIG_POWER_RESET_GPIO_RESTART=y
172CONFIG_SENSORS_SFCTEMP=m173CONFIG_SENSORS_SFCTEMP=m
arch/riscv/include/asm/Kbuild+3−1
@@ -6,10 +6,12 @@ generic-y += early_ioremap.h · 5 unmodified lines
6generic-y += flat.h6generic-y += flat.h
7generic-y += kvm_para.h7generic-y += kvm_para.h
8generic-y += mmzone.h8generic-y += mmzone.h
9generic-y += mcs_spinlock.h
9generic-y += parport.h10generic-y += parport.h
10generic-y += spinlock.h
11generic-y += spinlock_types.h11generic-y += spinlock_types.h
12generic-y += ticket_spinlock.h
12generic-y += qrwlock.h13generic-y += qrwlock.h
13generic-y += qrwlock_types.h14generic-y += qrwlock_types.h
15generic-y += qspinlock.h
14generic-y += user.h16generic-y += user.h
15generic-y += vmlinux.lds.h17generic-y += vmlinux.lds.h
arch/riscv/include/asm/cmpxchg.h+208−78
@@ -12,30 +12,43 @@ · 11 unmodified lines
12#include <asm/fence.h>12#include <asm/fence.h>
13#include <asm/hwcap.h>13#include <asm/hwcap.h>
14#include <asm/insn-def.h>14#include <asm/insn-def.h>
15 15#include <asm/cpufeature-macros.h>
16#define __arch_xchg_masked(sc_sfx, prepend, append, r, p, n) \16
17({ \17#define __arch_xchg_masked(sc_sfx, swap_sfx, prepend, sc_append, \
18 u32 *__ptr32b = (u32 *)((ulong)(p) & ~0x3); \18 swap_append, r, p, n) \
19 ulong __s = ((ulong)(p) & (0x4 - sizeof(*p))) * BITS_PER_BYTE; \19({ \
20 ulong __mask = GENMASK(((sizeof(*p)) * BITS_PER_BYTE) - 1, 0) \20 if (IS_ENABLED(CONFIG_RISCV_ISA_ZABHA) && \
21 << __s; \21 riscv_has_extension_unlikely(RISCV_ISA_EXT_ZABHA)) { \
22 ulong __newx = (ulong)(n) << __s; \22 __asm__ __volatile__ ( \
23 ulong __retx; \23 prepend \
24 ulong __rc; \24 " amoswap" swap_sfx " %0, %z2, %1\n" \
25 \25 swap_append \
26 __asm__ __volatile__ ( \26 : "=&r" (r), "+A" (*(p)) \
27 prepend \27 : "rJ" (n) \
28 "0: lr.w %0, %2\n" \28 : "memory"); \
29 " and %1, %0, %z4\n" \29 } else { \
30 " or %1, %1, %z3\n" \30 u32 *__ptr32b = (u32 *)((ulong)(p) & ~0x3); \
31 " sc.w" sc_sfx " %1, %1, %2\n" \31 ulong __s = ((ulong)(p) & (0x4 - sizeof(*p))) * BITS_PER_BYTE; \
32 " bnez %1, 0b\n" \32 ulong __mask = GENMASK(((sizeof(*p)) * BITS_PER_BYTE) - 1, 0) \
33 append \33 << __s; \
34 : "=&r" (__retx), "=&r" (__rc), "+A" (*(__ptr32b)) \34 ulong __newx = (ulong)(n) << __s; \
35 : "rJ" (__newx), "rJ" (~__mask) \35 ulong __retx; \
36 : "memory"); \36 ulong __rc; \
37 \37 \
38 r = (__typeof__(*(p)))((__retx & __mask) >> __s); \38 __asm__ __volatile__ ( \
39 prepend \
40 "0: lr.w %0, %2\n" \
41 " and %1, %0, %z4\n" \
42 " or %1, %1, %z3\n" \
43 " sc.w" sc_sfx " %1, %1, %2\n" \
44 " bnez %1, 0b\n" \
45 sc_append \
46 : "=&r" (__retx), "=&r" (__rc), "+A" (*(__ptr32b)) \
47 : "rJ" (__newx), "rJ" (~__mask) \
48 : "memory"); \
49 \
50 r = (__typeof__(*(p)))((__retx & __mask) >> __s); \
51 } \
39})52})
40 53
41#define __arch_xchg(sfx, prepend, append, r, p, n) \54#define __arch_xchg(sfx, prepend, append, r, p, n) \
@@ -58,8 +71,13 @@ · 16 unmodified lines
58 \71 \
59 switch (sizeof(*__ptr)) { \72 switch (sizeof(*__ptr)) { \
60 case 1: \73 case 1: \
74 __arch_xchg_masked(sc_sfx, ".b" swap_sfx, \
75 prepend, sc_append, swap_append, \
76 __ret, __ptr, __new); \
77 break; \
61 case 2: \78 case 2: \
62 __arch_xchg_masked(sc_sfx, prepend, sc_append, \79 __arch_xchg_masked(sc_sfx, ".h" swap_sfx, \
80 prepend, sc_append, swap_append, \
63 __ret, __ptr, __new); \81 __ret, __ptr, __new); \
64 break; \82 break; \
65 case 4: \83 case 4: \
@@ -106,55 +124,90 @@ · 40 unmodified lines
106 * store NEW in MEM. Return the initial value in MEM. Success is124 * store NEW in MEM. Return the initial value in MEM. Success is
107 * indicated by comparing RETURN with OLD.125 * indicated by comparing RETURN with OLD.
108 */126 */
109 127#define __arch_cmpxchg_masked(sc_sfx, cas_sfx, \
110#define __arch_cmpxchg_masked(sc_sfx, prepend, append, r, p, o, n) \128 sc_prepend, sc_append, \
111({ \129 cas_prepend, cas_append, \
112 u32 *__ptr32b = (u32 *)((ulong)(p) & ~0x3); \130 r, p, o, n) \
113 ulong __s = ((ulong)(p) & (0x4 - sizeof(*p))) * BITS_PER_BYTE; \131({ \
114 ulong __mask = GENMASK(((sizeof(*p)) * BITS_PER_BYTE) - 1, 0) \132 if (IS_ENABLED(CONFIG_RISCV_ISA_ZABHA) && \
115 << __s; \133 IS_ENABLED(CONFIG_RISCV_ISA_ZACAS) && \
116 ulong __newx = (ulong)(n) << __s; \134 riscv_has_extension_unlikely(RISCV_ISA_EXT_ZABHA) && \
117 ulong __oldx = (ulong)(o) << __s; \135 riscv_has_extension_unlikely(RISCV_ISA_EXT_ZACAS)) { \
118 ulong __retx; \136 r = o; \
119 ulong __rc; \137 \
120 \138 __asm__ __volatile__ ( \
121 __asm__ __volatile__ ( \139 cas_prepend \
122 prepend \140 " amocas" cas_sfx " %0, %z2, %1\n" \
123 "0: lr.w %0, %2\n" \141 cas_append \
124 " and %1, %0, %z5\n" \142 : "+&r" (r), "+A" (*(p)) \
125 " bne %1, %z3, 1f\n" \143 : "rJ" (n) \
126 " and %1, %0, %z6\n" \144 : "memory"); \
127 " or %1, %1, %z4\n" \145 } else { \
128 " sc.w" sc_sfx " %1, %1, %2\n" \146 u32 *__ptr32b = (u32 *)((ulong)(p) & ~0x3); \
129 " bnez %1, 0b\n" \147 ulong __s = ((ulong)(p) & (0x4 - sizeof(*p))) * BITS_PER_BYTE; \
130 append \148 ulong __mask = GENMASK(((sizeof(*p)) * BITS_PER_BYTE) - 1, 0) \
131 "1:\n" \149 << __s; \
132 : "=&r" (__retx), "=&r" (__rc), "+A" (*(__ptr32b)) \150 ulong __newx = (ulong)(n) << __s; \
133 : "rJ" ((long)__oldx), "rJ" (__newx), \151 ulong __oldx = (ulong)(o) << __s; \
134 "rJ" (__mask), "rJ" (~__mask) \152 ulong __retx; \
135 : "memory"); \153 ulong __rc; \
136 \154 \
137 r = (__typeof__(*(p)))((__retx & __mask) >> __s); \155 __asm__ __volatile__ ( \
156 sc_prepend \
157 "0: lr.w %0, %2\n" \
158 " and %1, %0, %z5\n" \
159 " bne %1, %z3, 1f\n" \
160 " and %1, %0, %z6\n" \
161 " or %1, %1, %z4\n" \
162 " sc.w" sc_sfx " %1, %1, %2\n" \
163 " bnez %1, 0b\n" \
164 sc_append \
165 "1:\n" \
166 : "=&r" (__retx), "=&r" (__rc), "+A" (*(__ptr32b)) \
167 : "rJ" ((long)__oldx), "rJ" (__newx), \
168 "rJ" (__mask), "rJ" (~__mask) \
169 : "memory"); \
170 \
171 r = (__typeof__(*(p)))((__retx & __mask) >> __s); \
172 } \
138})173})
139 174
140#define __arch_cmpxchg(lr_sfx, sc_sfx, prepend, append, r, p, co, o, n) \175#define __arch_cmpxchg(lr_sfx, sc_sfx, cas_sfx, \
176 sc_prepend, sc_append, \
177 cas_prepend, cas_append, \
178 r, p, co, o, n) \
141({ \179({ \
142 register unsigned int __rc; \180 if (IS_ENABLED(CONFIG_RISCV_ISA_ZACAS) && \
181 riscv_has_extension_unlikely(RISCV_ISA_EXT_ZACAS)) { \
182 r = o; \
143 \183 \
144 __asm__ __volatile__ ( \184 __asm__ __volatile__ ( \
145 prepend \185 cas_prepend \
146 "0: lr" lr_sfx " %0, %2\n" \186 " amocas" cas_sfx " %0, %z2, %1\n" \
147 " bne %0, %z3, 1f\n" \187 cas_append \
148 " sc" sc_sfx " %1, %z4, %2\n" \188 : "+&r" (r), "+A" (*(p)) \
149 " bnez %1, 0b\n" \189 : "rJ" (n) \
150 append \190 : "memory"); \
151 "1:\n" \191 } else { \
152 : "=&r" (r), "=&r" (__rc), "+A" (*(p)) \192 register unsigned int __rc; \
153 : "rJ" (co o), "rJ" (n) \193 \
154 : "memory"); \194 __asm__ __volatile__ ( \
195 sc_prepend \
196 "0: lr" lr_sfx " %0, %2\n" \
197 " bne %0, %z3, 1f\n" \
198 " sc" sc_sfx " %1, %z4, %2\n" \
199 " bnez %1, 0b\n" \
200 sc_append \
201 "1:\n" \
202 : "=&r" (r), "=&r" (__rc), "+A" (*(p)) \
203 : "rJ" (co o), "rJ" (n) \
204 : "memory"); \
205 } \
155})206})
156 207
157#define _arch_cmpxchg(ptr, old, new, sc_sfx, prepend, append) \208#define _arch_cmpxchg(ptr, old, new, sc_sfx, cas_sfx, \
209 sc_prepend, sc_append, \
210 cas_prepend, cas_append) \
158({ \211({ \
159 __typeof__(ptr) __ptr = (ptr); \212 __typeof__(ptr) __ptr = (ptr); \
160 __typeof__(*(__ptr)) __old = (old); \213 __typeof__(*(__ptr)) __old = (old); \
@@ -163,17 +216,28 @@ · 2 unmodified lines
163 \216 \
164 switch (sizeof(*__ptr)) { \217 switch (sizeof(*__ptr)) { \
165 case 1: \218 case 1: \
219 __arch_cmpxchg_masked(sc_sfx, ".b" cas_sfx, \
220 sc_prepend, sc_append, \
221 cas_prepend, cas_append, \
222 __ret, __ptr, __old, __new); \
223 break; \
166 case 2: \224 case 2: \
167 __arch_cmpxchg_masked(sc_sfx, prepend, append, \225 __arch_cmpxchg_masked(sc_sfx, ".h" cas_sfx, \
168 __ret, __ptr, __old, __new); \226 sc_prepend, sc_append, \
227 cas_prepend, cas_append, \
228 __ret, __ptr, __old, __new); \
169 break; \229 break; \
170 case 4: \230 case 4: \
171 __arch_cmpxchg(".w", ".w" sc_sfx, prepend, append, \231 __arch_cmpxchg(".w", ".w" sc_sfx, ".w" cas_sfx, \
172 __ret, __ptr, (long), __old, __new); \232 sc_prepend, sc_append, \
233 cas_prepend, cas_append, \
234 __ret, __ptr, (long), __old, __new); \
173 break; \235 break; \
174 case 8: \236 case 8: \
175 __arch_cmpxchg(".d", ".d" sc_sfx, prepend, append, \237 __arch_cmpxchg(".d", ".d" sc_sfx, ".d" cas_sfx, \
176 __ret, __ptr, /**/, __old, __new); \238 sc_prepend, sc_append, \
239 cas_prepend, cas_append, \
240 __ret, __ptr, /**/, __old, __new); \
177 break; \241 break; \
178 default: \242 default: \
179 BUILD_BUG(); \243 BUILD_BUG(); \
@@ -181,17 +245,40 @@ · 1 unmodified line
181 (__typeof__(*(__ptr)))__ret; \245 (__typeof__(*(__ptr)))__ret; \
182})246})
183 247
248/*
249 * These macros are here to improve the readability of the arch_cmpxchg_XXX()
250 * macros.
251 */
252#define SC_SFX(x) x
253#define CAS_SFX(x) x
254#define SC_PREPEND(x) x
255#define SC_APPEND(x) x
256#define CAS_PREPEND(x) x
257#define CAS_APPEND(x) x
258
184#define arch_cmpxchg_relaxed(ptr, o, n) \259#define arch_cmpxchg_relaxed(ptr, o, n) \
185 _arch_cmpxchg((ptr), (o), (n), "", "", "")260 _arch_cmpxchg((ptr), (o), (n), \
261 SC_SFX(""), CAS_SFX(""), \
262 SC_PREPEND(""), SC_APPEND(""), \
263 CAS_PREPEND(""), CAS_APPEND(""))
186 264
187#define arch_cmpxchg_acquire(ptr, o, n) \265#define arch_cmpxchg_acquire(ptr, o, n) \
188 _arch_cmpxchg((ptr), (o), (n), "", "", RISCV_ACQUIRE_BARRIER)266 _arch_cmpxchg((ptr), (o), (n), \
267 SC_SFX(""), CAS_SFX(""), \
268 SC_PREPEND(""), SC_APPEND(RISCV_ACQUIRE_BARRIER), \
269 CAS_PREPEND(""), CAS_APPEND(RISCV_ACQUIRE_BARRIER))
189 270
190#define arch_cmpxchg_release(ptr, o, n) \271#define arch_cmpxchg_release(ptr, o, n) \
191 _arch_cmpxchg((ptr), (o), (n), "", RISCV_RELEASE_BARRIER, "")272 _arch_cmpxchg((ptr), (o), (n), \
273 SC_SFX(""), CAS_SFX(""), \
274 SC_PREPEND(RISCV_RELEASE_BARRIER), SC_APPEND(""), \
275 CAS_PREPEND(RISCV_RELEASE_BARRIER), CAS_APPEND(""))
192 276
193#define arch_cmpxchg(ptr, o, n) \277#define arch_cmpxchg(ptr, o, n) \
194 _arch_cmpxchg((ptr), (o), (n), ".rl", "", " fence rw, rw\n")278 _arch_cmpxchg((ptr), (o), (n), \
279 SC_SFX(".rl"), CAS_SFX(".aqrl"), \
280 SC_PREPEND(""), SC_APPEND(RISCV_FULL_BARRIER), \
281 CAS_PREPEND(""), CAS_APPEND(""))
195 282
196#define arch_cmpxchg_local(ptr, o, n) \283#define arch_cmpxchg_local(ptr, o, n) \
197 arch_cmpxchg_relaxed((ptr), (o), (n))284 arch_cmpxchg_relaxed((ptr), (o), (n))
@@ -226,6 +313,44 @@ · 28 unmodified lines
226 arch_cmpxchg_release((ptr), (o), (n)); \313 arch_cmpxchg_release((ptr), (o), (n)); \
227})314})
228 315
316#if defined(CONFIG_64BIT) && defined(CONFIG_RISCV_ISA_ZACAS)
317
318#define system_has_cmpxchg128() riscv_has_extension_unlikely(RISCV_ISA_EXT_ZACAS)
319
320union __u128_halves {
321 u128 full;
322 struct {
323 u64 low, high;
324 };
325};
326
327#define __arch_cmpxchg128(p, o, n, cas_sfx) \
328({ \
329 __typeof__(*(p)) __o = (o); \
330 union __u128_halves __hn = { .full = (n) }; \
331 union __u128_halves __ho = { .full = (__o) }; \
332 register unsigned long t1 asm ("t1") = __hn.low; \
333 register unsigned long t2 asm ("t2") = __hn.high; \
334 register unsigned long t3 asm ("t3") = __ho.low; \
335 register unsigned long t4 asm ("t4") = __ho.high; \
336 \
337 __asm__ __volatile__ ( \
338 " amocas.q" cas_sfx " %0, %z3, %2" \
339 : "+&r" (t3), "+&r" (t4), "+A" (*(p)) \
340 : "rJ" (t1), "rJ" (t2) \
341 : "memory"); \
342 \
343 ((u128)t4 << 64) | t3; \
344})
345
346#define arch_cmpxchg128(ptr, o, n) \
347 __arch_cmpxchg128((ptr), (o), (n), ".aqrl")
348
349#define arch_cmpxchg128_local(ptr, o, n) \
350 __arch_cmpxchg128((ptr), (o), (n), "")
351
352#endif /* CONFIG_64BIT && CONFIG_RISCV_ISA_ZACAS */
353
229#ifdef CONFIG_RISCV_ISA_ZAWRS354#ifdef CONFIG_RISCV_ISA_ZAWRS
230/*355/*
231 * Despite wrs.nto being "WRS-with-no-timeout", in the absence of changes to356 * Despite wrs.nto being "WRS-with-no-timeout", in the absence of changes to
@@ -245,6 +370,11 @@ static __always_inline void __cmpwait(volatile void *ptr, · 13 unmodified lines
245 : : : : no_zawrs);370 : : : : no_zawrs);
246 371
247 switch (size) {372 switch (size) {
373 case 1:
374 fallthrough;
375 case 2:
376 /* RISC-V doesn't have lr instructions on byte and half-word. */
377 goto no_zawrs;
248 case 4:378 case 4:
249 asm volatile(379 asm volatile(
250 " lr.w %0, %1\n"380 " lr.w %0, %1\n"
arch/riscv/include/asm/compat.h+0−1
@@ -9,7 +9,6 @@ · 8 unmodified lines
9 */9 */
10#include <linux/types.h>10#include <linux/types.h>
11#include <linux/sched.h>11#include <linux/sched.h>
12#include <linux/sched/task_stack.h>
13#include <asm-generic/compat.h>12#include <asm-generic/compat.h>
14 13
15static inline int is_compat_task(void)14static inline int is_compat_task(void)
arch/riscv/include/asm/cpufeature-macros.h+66−0
@@ -0,0 +1,66 @@
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright 2022-2024 Rivos, Inc
4 */
5
6#ifndef _ASM_CPUFEATURE_MACROS_H
7#define _ASM_CPUFEATURE_MACROS_H
8
9#include <asm/hwcap.h>
10#include <asm/alternative-macros.h>
11
12#define STANDARD_EXT 0
13
14bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, unsigned int bit);
15#define riscv_isa_extension_available(isa_bitmap, ext) \
16 __riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_##ext)
17
18static __always_inline bool __riscv_has_extension_likely(const unsigned long vendor,
19 const unsigned long ext)
20{
21 asm goto(ALTERNATIVE("j %l[l_no]", "nop", %[vendor], %[ext], 1)
22 :
23 : [vendor] "i" (vendor), [ext] "i" (ext)
24 :
25 : l_no);
26
27 return true;
28l_no:
29 return false;
30}
31
32static __always_inline bool __riscv_has_extension_unlikely(const unsigned long vendor,
33 const unsigned long ext)
34{
35 asm goto(ALTERNATIVE("nop", "j %l[l_yes]", %[vendor], %[ext], 1)
36 :
37 : [vendor] "i" (vendor), [ext] "i" (ext)
38 :
39 : l_yes);
40
41 return false;
42l_yes:
43 return true;
44}
45
46static __always_inline bool riscv_has_extension_unlikely(const unsigned long ext)
47{
48 compiletime_assert(ext < RISCV_ISA_EXT_MAX, "ext must be < RISCV_ISA_EXT_MAX");
49
50 if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE))
51 return __riscv_has_extension_unlikely(STANDARD_EXT, ext);
52
53 return __riscv_isa_extension_available(NULL, ext);
54}
55
56static __always_inline bool riscv_has_extension_likely(const unsigned long ext)
57{
58 compiletime_assert(ext < RISCV_ISA_EXT_MAX, "ext must be < RISCV_ISA_EXT_MAX");
59
60 if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE))
61 return __riscv_has_extension_likely(STANDARD_EXT, ext);
62
63 return __riscv_isa_extension_available(NULL, ext);
64}
65
66#endif /* _ASM_CPUFEATURE_MACROS_H */
arch/riscv/include/asm/cpufeature.h+14−59
@@ -8,9 +8,12 @@ · 7 unmodified lines
8 8
9#include <linux/bitmap.h>9#include <linux/bitmap.h>
10#include <linux/jump_label.h>10#include <linux/jump_label.h>
11#include <linux/workqueue.h>
12#include <linux/kconfig.h>
13#include <linux/percpu-defs.h>
14#include <linux/threads.h>
11#include <asm/hwcap.h>15#include <asm/hwcap.h>
12#include <asm/alternative-macros.h>16#include <asm/cpufeature-macros.h>
13#include <asm/errno.h>
14 17
15/*18/*
16 * These are probed via a device_initcall(), via either the SBI or directly19 * These are probed via a device_initcall(), via either the SBI or directly
@@ -31,7 +34,7 @@ DECLARE_PER_CPU(struct riscv_cpuinfo, riscv_cpuinfo); · 14 unmodified lines
31/* Per-cpu ISA extensions. */34/* Per-cpu ISA extensions. */
32extern struct riscv_isainfo hart_isa[NR_CPUS];35extern struct riscv_isainfo hart_isa[NR_CPUS];
33 36
34void riscv_user_isa_enable(void);37void __init riscv_user_isa_enable(void);
35 38
36#define _RISCV_ISA_EXT_DATA(_name, _id, _subset_exts, _subset_exts_size, _validate) { \39#define _RISCV_ISA_EXT_DATA(_name, _id, _subset_exts, _subset_exts_size, _validate) { \
37 .name = #_name, \40 .name = #_name, \
@@ -58,8 +61,9 @@ void riscv_user_isa_enable(void); · 20 unmodified lines
58#define __RISCV_ISA_EXT_SUPERSET_VALIDATE(_name, _id, _sub_exts, _validate) \61#define __RISCV_ISA_EXT_SUPERSET_VALIDATE(_name, _id, _sub_exts, _validate) \
59 _RISCV_ISA_EXT_DATA(_name, _id, _sub_exts, ARRAY_SIZE(_sub_exts), _validate)62 _RISCV_ISA_EXT_DATA(_name, _id, _sub_exts, ARRAY_SIZE(_sub_exts), _validate)
60 63
61#if defined(CONFIG_RISCV_MISALIGNED)
62bool check_unaligned_access_emulated_all_cpus(void);64bool check_unaligned_access_emulated_all_cpus(void);
65#if defined(CONFIG_RISCV_SCALAR_MISALIGNED)
66void check_unaligned_access_emulated(struct work_struct *work __always_unused);
63void unaligned_emulation_finish(void);67void unaligned_emulation_finish(void);
64bool unaligned_ctl_available(void);68bool unaligned_ctl_available(void);
65DECLARE_PER_CPU(long, misaligned_access_speed);69DECLARE_PER_CPU(long, misaligned_access_speed);
@@ -70,6 +74,12 @@ static inline bool unaligned_ctl_available(void) · 4 unmodified lines
70}74}
71#endif75#endif
72 76
77bool check_vector_unaligned_access_emulated_all_cpus(void);
78#if defined(CONFIG_RISCV_VECTOR_MISALIGNED)
79void check_vector_unaligned_access_emulated(struct work_struct *work __always_unused);
80DECLARE_PER_CPU(long, vector_misaligned_access);
81#endif
82
73#if defined(CONFIG_RISCV_PROBE_UNALIGNED_ACCESS)83#if defined(CONFIG_RISCV_PROBE_UNALIGNED_ACCESS)
74DECLARE_STATIC_KEY_FALSE(fast_unaligned_access_speed_key);84DECLARE_STATIC_KEY_FALSE(fast_unaligned_access_speed_key);
75 85
@@ -103,61 +113,6 @@ extern const size_t riscv_isa_ext_count; · 27 unmodified lines
103extern bool riscv_isa_fallback;113extern bool riscv_isa_fallback;
104 114
105unsigned long riscv_isa_extension_base(const unsigned long *isa_bitmap);115unsigned long riscv_isa_extension_base(const unsigned long *isa_bitmap);
106
107#define STANDARD_EXT 0
108
109bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, unsigned int bit);
110#define riscv_isa_extension_available(isa_bitmap, ext) \
111 __riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_##ext)
112
113static __always_inline bool __riscv_has_extension_likely(const unsigned long vendor,
114 const unsigned long ext)
115{
116 asm goto(ALTERNATIVE("j %l[l_no]", "nop", %[vendor], %[ext], 1)
117 :
118 : [vendor] "i" (vendor), [ext] "i" (ext)
119 :
120 : l_no);
121
122 return true;
123l_no:
124 return false;
125}
126
127static __always_inline bool __riscv_has_extension_unlikely(const unsigned long vendor,
128 const unsigned long ext)
129{
130 asm goto(ALTERNATIVE("nop", "j %l[l_yes]", %[vendor], %[ext], 1)
131 :
132 : [vendor] "i" (vendor), [ext] "i" (ext)
133 :
134 : l_yes);
135
136 return false;
137l_yes:
138 return true;
139}
140
141static __always_inline bool riscv_has_extension_unlikely(const unsigned long ext)
142{
143 compiletime_assert(ext < RISCV_ISA_EXT_MAX, "ext must be < RISCV_ISA_EXT_MAX");
144
145 if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE))
146 return __riscv_has_extension_unlikely(STANDARD_EXT, ext);
147
148 return __riscv_isa_extension_available(NULL, ext);
149}
150
151static __always_inline bool riscv_has_extension_likely(const unsigned long ext)
152{
153 compiletime_assert(ext < RISCV_ISA_EXT_MAX, "ext must be < RISCV_ISA_EXT_MAX");
154
155 if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE))
156 return __riscv_has_extension_likely(STANDARD_EXT, ext);
157
158 return __riscv_isa_extension_available(NULL, ext);
159}
160
161static __always_inline bool riscv_cpu_has_extension_likely(int cpu, const unsigned long ext)116static __always_inline bool riscv_cpu_has_extension_likely(int cpu, const unsigned long ext)
162{117{
163 compiletime_assert(ext < RISCV_ISA_EXT_MAX, "ext must be < RISCV_ISA_EXT_MAX");118 compiletime_assert(ext < RISCV_ISA_EXT_MAX, "ext must be < RISCV_ISA_EXT_MAX");
arch/riscv/include/asm/csr.h+17−0
@@ -119,6 +119,10 @@ · 118 unmodified lines
119 119
120/* HSTATUS flags */120/* HSTATUS flags */
121#ifdef CONFIG_64BIT121#ifdef CONFIG_64BIT
122#define HSTATUS_HUPMM _AC(0x3000000000000, UL)
123#define HSTATUS_HUPMM_PMLEN_0 _AC(0x0000000000000, UL)
124#define HSTATUS_HUPMM_PMLEN_7 _AC(0x2000000000000, UL)
125#define HSTATUS_HUPMM_PMLEN_16 _AC(0x3000000000000, UL)
122#define HSTATUS_VSXL _AC(0x300000000, UL)126#define HSTATUS_VSXL _AC(0x300000000, UL)
123#define HSTATUS_VSXL_SHIFT 32127#define HSTATUS_VSXL_SHIFT 32
124#endif128#endif
@@ -195,6 +199,11 @@ · 70 unmodified lines
195/* xENVCFG flags */199/* xENVCFG flags */
196#define ENVCFG_STCE (_AC(1, ULL) << 63)200#define ENVCFG_STCE (_AC(1, ULL) << 63)
197#define ENVCFG_PBMTE (_AC(1, ULL) << 62)201#define ENVCFG_PBMTE (_AC(1, ULL) << 62)
202#define ENVCFG_ADUE (_AC(1, ULL) << 61)
203#define ENVCFG_PMM (_AC(0x3, ULL) << 32)
204#define ENVCFG_PMM_PMLEN_0 (_AC(0x0, ULL) << 32)
205#define ENVCFG_PMM_PMLEN_7 (_AC(0x2, ULL) << 32)
206#define ENVCFG_PMM_PMLEN_16 (_AC(0x3, ULL) << 32)
198#define ENVCFG_CBZE (_AC(1, UL) << 7)207#define ENVCFG_CBZE (_AC(1, UL) << 7)
199#define ENVCFG_CBCFE (_AC(1, UL) << 6)208#define ENVCFG_CBCFE (_AC(1, UL) << 6)
200#define ENVCFG_CBIE_SHIFT 4209#define ENVCFG_CBIE_SHIFT 4
@@ -216,6 +225,12 @@ · 15 unmodified lines
216#define SMSTATEEN0_SSTATEEN0_SHIFT 63225#define SMSTATEEN0_SSTATEEN0_SHIFT 63
217#define SMSTATEEN0_SSTATEEN0 (_ULL(1) << SMSTATEEN0_SSTATEEN0_SHIFT)226#define SMSTATEEN0_SSTATEEN0 (_ULL(1) << SMSTATEEN0_SSTATEEN0_SHIFT)
218 227
228/* mseccfg bits */
229#define MSECCFG_PMM ENVCFG_PMM
230#define MSECCFG_PMM_PMLEN_0 ENVCFG_PMM_PMLEN_0
231#define MSECCFG_PMM_PMLEN_7 ENVCFG_PMM_PMLEN_7
232#define MSECCFG_PMM_PMLEN_16 ENVCFG_PMM_PMLEN_16
233
219/* symbolic CSR names: */234/* symbolic CSR names: */
220#define CSR_CYCLE 0xc00235#define CSR_CYCLE 0xc00
221#define CSR_TIME 0xc01236#define CSR_TIME 0xc01
@@ -382,6 +397,8 @@ · 160 unmodified lines
382#define CSR_MIP 0x344397#define CSR_MIP 0x344
383#define CSR_PMPCFG0 0x3a0398#define CSR_PMPCFG0 0x3a0
384#define CSR_PMPADDR0 0x3b0399#define CSR_PMPADDR0 0x3b0
400#define CSR_MSECCFG 0x747
401#define CSR_MSECCFGH 0x757
385#define CSR_MVENDORID 0xf11402#define CSR_MVENDORID 0xf11
386#define CSR_MARCHID 0xf12403#define CSR_MARCHID 0xf12
387#define CSR_MIMPID 0xf13404#define CSR_MIMPID 0xf13
arch/riscv/include/asm/entry-common.h+1−0
@@ -33,6 +33,7 @@ static inline int handle_misaligned_load(struct pt_regs *regs) · 32 unmodified lines
33{33{
34 return -1;34 return -1;
35}35}
36
36static inline int handle_misaligned_store(struct pt_regs *regs)37static inline int handle_misaligned_store(struct pt_regs *regs)
37{38{
38 return -1;39 return -1;
arch/riscv/include/asm/hwcap.h+9−0
@@ -93,6 +93,13 @@ · 92 unmodified lines
93#define RISCV_ISA_EXT_ZCMOP 8493#define RISCV_ISA_EXT_ZCMOP 84
94#define RISCV_ISA_EXT_ZAWRS 8594#define RISCV_ISA_EXT_ZAWRS 85
95#define RISCV_ISA_EXT_SVVPTC 8695#define RISCV_ISA_EXT_SVVPTC 86
96#define RISCV_ISA_EXT_SMMPM 87
97#define RISCV_ISA_EXT_SMNPM 88
98#define RISCV_ISA_EXT_SSNPM 89
99#define RISCV_ISA_EXT_ZABHA 90
100#define RISCV_ISA_EXT_ZICCRSE 91
101#define RISCV_ISA_EXT_SVADE 92
102#define RISCV_ISA_EXT_SVADU 93
96 103
97#define RISCV_ISA_EXT_XLINUXENVCFG 127104#define RISCV_ISA_EXT_XLINUXENVCFG 127
98 105
@@ -101,8 +108,10 @@ · 2 unmodified lines
101 108
102#ifdef CONFIG_RISCV_M_MODE109#ifdef CONFIG_RISCV_M_MODE
103#define RISCV_ISA_EXT_SxAIA RISCV_ISA_EXT_SMAIA110#define RISCV_ISA_EXT_SxAIA RISCV_ISA_EXT_SMAIA
111#define RISCV_ISA_EXT_SUPM RISCV_ISA_EXT_SMNPM
104#else112#else
105#define RISCV_ISA_EXT_SxAIA RISCV_ISA_EXT_SSAIA113#define RISCV_ISA_EXT_SxAIA RISCV_ISA_EXT_SSAIA
114#define RISCV_ISA_EXT_SUPM RISCV_ISA_EXT_SSNPM
106#endif115#endif
107 116
108#endif /* _ASM_RISCV_HWCAP_H */117#endif /* _ASM_RISCV_HWCAP_H */
arch/riscv/include/asm/hwprobe.h+1−1
@@ -8,7 +8,7 @@ · 7 unmodified lines
8 8
9#include <uapi/asm/hwprobe.h>9#include <uapi/asm/hwprobe.h>
10 10
11#define RISCV_HWPROBE_MAX_KEY 911#define RISCV_HWPROBE_MAX_KEY 10
12 12
13static inline bool riscv_hwprobe_key_is_valid(__s64 key)13static inline bool riscv_hwprobe_key_is_valid(__s64 key)
14{14{
arch/riscv/include/asm/jump_label.h+28−22
@@ -16,21 +16,28 @@ · 15 unmodified lines
16 16
17#define JUMP_LABEL_NOP_SIZE 417#define JUMP_LABEL_NOP_SIZE 4
18 18
19#define JUMP_TABLE_ENTRY(key, label) \
20 ".pushsection __jump_table, \"aw\" \n\t" \
21 ".align " RISCV_LGPTR " \n\t" \
22 ".long 1b - ., " label " - . \n\t" \
23 "" RISCV_PTR " " key " - . \n\t" \
24 ".popsection \n\t"
25
26/* This macro is also expanded on the Rust side. */
27#define ARCH_STATIC_BRANCH_ASM(key, label) \
28 " .align 2 \n\t" \
29 " .option push \n\t" \
30 " .option norelax \n\t" \
31 " .option norvc \n\t" \
32 "1: nop \n\t" \
33 " .option pop \n\t" \
34 JUMP_TABLE_ENTRY(key, label)
35
19static __always_inline bool arch_static_branch(struct static_key * const key,36static __always_inline bool arch_static_branch(struct static_key * const key,
20 const bool branch)37 const bool branch)
21{38{
22 asm goto(39 asm goto(
23 " .align 2 \n\t"40 ARCH_STATIC_BRANCH_ASM("%0", "%l[label]")
24 " .option push \n\t"
25 " .option norelax \n\t"
26 " .option norvc \n\t"
27 "1: nop \n\t"
28 " .option pop \n\t"
29 " .pushsection __jump_table, \"aw\" \n\t"
30 " .align " RISCV_LGPTR " \n\t"
31 " .long 1b - ., %l[label] - . \n\t"
32 " " RISCV_PTR " %0 - . \n\t"
33 " .popsection \n\t"
34 : : "i"(&((char *)key)[branch]) : : label);41 : : "i"(&((char *)key)[branch]) : : label);
35 42
36 return false;43 return false;
@@ -38,21 +45,20 @@ label: · 1 unmodified line
38 return true;45 return true;
39}46}
40 47
48#define ARCH_STATIC_BRANCH_JUMP_ASM(key, label) \
49 " .align 2 \n\t" \
50 " .option push \n\t" \
51 " .option norelax \n\t" \
52 " .option norvc \n\t" \
53 "1: j " label " \n\t" \
54 " .option pop \n\t" \
55 JUMP_TABLE_ENTRY(key, label)
56
41static __always_inline bool arch_static_branch_jump(struct static_key * const key,57static __always_inline bool arch_static_branch_jump(struct static_key * const key,
42 const bool branch)58 const bool branch)
43{59{
44 asm goto(60 asm goto(
45 " .align 2 \n\t"61 ARCH_STATIC_BRANCH_JUMP_ASM("%0", "%l[label]")
46 " .option push \n\t"
47 " .option norelax \n\t"
48 " .option norvc \n\t"
49 "1: j %l[label] \n\t"
50 " .option pop \n\t"
51 " .pushsection __jump_table, \"aw\" \n\t"
52 " .align " RISCV_LGPTR " \n\t"
53 " .long 1b - ., %l[label] - . \n\t"
54 " " RISCV_PTR " %0 - . \n\t"
55 " .popsection \n\t"
56 : : "i"(&((char *)key)[branch]) : : label);62 : : "i"(&((char *)key)[branch]) : : label);
57 63
58 return false;64 return false;
arch/riscv/include/asm/mmu.h+7−0
@@ -25,9 +25,16 @@ typedef struct { · 24 unmodified lines
25#ifdef CONFIG_BINFMT_ELF_FDPIC25#ifdef CONFIG_BINFMT_ELF_FDPIC
26 unsigned long exec_fdpic_loadmap;26 unsigned long exec_fdpic_loadmap;
27 unsigned long interp_fdpic_loadmap;27 unsigned long interp_fdpic_loadmap;
28#endif
29 unsigned long flags;
30#ifdef CONFIG_RISCV_ISA_SUPM
31 u8 pmlen;
28#endif32#endif
29} mm_context_t;33} mm_context_t;
30 34
35/* Lock the pointer masking mode because this mm is multithreaded */
36#define MM_CONTEXT_LOCK_PMLEN 0
37
31#define cntx2asid(cntx) ((cntx) & SATP_ASID_MASK)38#define cntx2asid(cntx) ((cntx) & SATP_ASID_MASK)
32#define cntx2version(cntx) ((cntx) & ~SATP_ASID_MASK)39#define cntx2version(cntx) ((cntx) & ~SATP_ASID_MASK)
33 40
arch/riscv/include/asm/mmu_context.h+13−0
@@ -20,6 +20,9 @@ void switch_mm(struct mm_struct *prev, struct mm_struct *next, · 19 unmodified lines
20static inline void activate_mm(struct mm_struct *prev,20static inline void activate_mm(struct mm_struct *prev,
21 struct mm_struct *next)21 struct mm_struct *next)
22{22{
23#ifdef CONFIG_RISCV_ISA_SUPM
24 next->context.pmlen = 0;
25#endif
23 switch_mm(prev, next, NULL);26 switch_mm(prev, next, NULL);
24}27}
25 28
@@ -30,11 +33,21 @@ static inline int init_new_context(struct task_struct *tsk, · 4 unmodified lines
30#ifdef CONFIG_MMU33#ifdef CONFIG_MMU
31 atomic_long_set(&mm->context.id, 0);34 atomic_long_set(&mm->context.id, 0);
32#endif35#endif
36 if (IS_ENABLED(CONFIG_RISCV_ISA_SUPM))
37 clear_bit(MM_CONTEXT_LOCK_PMLEN, &mm->context.flags);
33 return 0;38 return 0;
34}39}
35 40
36DECLARE_STATIC_KEY_FALSE(use_asid_allocator);41DECLARE_STATIC_KEY_FALSE(use_asid_allocator);
37 42
43#ifdef CONFIG_RISCV_ISA_SUPM
44#define mm_untag_mask mm_untag_mask
45static inline unsigned long mm_untag_mask(struct mm_struct *mm)
46{
47 return -1UL >> mm->context.pmlen;
48}
49#endif
50
38#include <asm-generic/mmu_context.h>51#include <asm-generic/mmu_context.h>
39 52
40#endif /* _ASM_RISCV_MMU_CONTEXT_H */53#endif /* _ASM_RISCV_MMU_CONTEXT_H */
arch/riscv/include/asm/pgtable.h+12−1
@@ -113,6 +113,7 @@ · 112 unmodified lines
113#include <asm/tlbflush.h>113#include <asm/tlbflush.h>
114#include <linux/mm_types.h>114#include <linux/mm_types.h>
115#include <asm/compat.h>115#include <asm/compat.h>
116#include <asm/cpufeature.h>
116 117
117#define __page_val_to_pfn(_val) (((_val) & _PAGE_PFN_MASK) >> _PAGE_PFN_SHIFT)118#define __page_val_to_pfn(_val) (((_val) & _PAGE_PFN_MASK) >> _PAGE_PFN_SHIFT)
118 119
@@ -284,7 +285,6 @@ static inline pte_t pud_pte(pud_t pud) · 165 unmodified lines
284}285}
285 286
286#ifdef CONFIG_RISCV_ISA_SVNAPOT287#ifdef CONFIG_RISCV_ISA_SVNAPOT
287#include <asm/cpufeature.h>
288 288
289static __always_inline bool has_svnapot(void)289static __always_inline bool has_svnapot(void)
290{290{
@@ -655,6 +655,17 @@ static inline pgprot_t pgprot_writecombine(pgprot_t _prot) · 364 unmodified lines
655 return __pgprot(prot);655 return __pgprot(prot);
656}656}
657 657
658/*
659 * Both Svade and Svadu control the hardware behavior when the PTE A/D bits need to be set. By
660 * default the M-mode firmware enables the hardware updating scheme when only Svadu is present in
661 * DT.
662 */
663#define arch_has_hw_pte_young arch_has_hw_pte_young
664static inline bool arch_has_hw_pte_young(void)
665{
666 return riscv_has_extension_unlikely(RISCV_ISA_EXT_SVADU);
667}
668
658/*669/*
659 * THP functions670 * THP functions
660 */671 */
arch/riscv/include/asm/processor.h+9−0
@@ -102,6 +102,7 @@ struct thread_struct { · 101 unmodified lines
102 unsigned long s[12]; /* s[0]: frame pointer */102 unsigned long s[12]; /* s[0]: frame pointer */
103 struct __riscv_d_ext_state fstate;103 struct __riscv_d_ext_state fstate;
104 unsigned long bad_cause;104 unsigned long bad_cause;
105 unsigned long envcfg;
105 u32 riscv_v_flags;106 u32 riscv_v_flags;
106 u32 vstate_ctrl;107 u32 vstate_ctrl;
107 struct __riscv_v_ext_state vstate;108 struct __riscv_v_ext_state vstate;
@@ -177,6 +178,14 @@ extern int set_unalign_ctl(struct task_struct *tsk, unsigned int val); · 69 unmodified lines
177#define RISCV_SET_ICACHE_FLUSH_CTX(arg1, arg2) riscv_set_icache_flush_ctx(arg1, arg2)178#define RISCV_SET_ICACHE_FLUSH_CTX(arg1, arg2) riscv_set_icache_flush_ctx(arg1, arg2)
178extern int riscv_set_icache_flush_ctx(unsigned long ctx, unsigned long per_thread);179extern int riscv_set_icache_flush_ctx(unsigned long ctx, unsigned long per_thread);
179 180
181#ifdef CONFIG_RISCV_ISA_SUPM
182/* PR_{SET,GET}_TAGGED_ADDR_CTRL prctl */
183long set_tagged_addr_ctrl(struct task_struct *task, unsigned long arg);
184long get_tagged_addr_ctrl(struct task_struct *task);
185#define SET_TAGGED_ADDR_CTRL(arg) set_tagged_addr_ctrl(current, arg)
186#define GET_TAGGED_ADDR_CTRL() get_tagged_addr_ctrl(current)
187#endif
188
180#endif /* __ASSEMBLY__ */189#endif /* __ASSEMBLY__ */
181 190
182#endif /* _ASM_RISCV_PROCESSOR_H */191#endif /* _ASM_RISCV_PROCESSOR_H */
arch/riscv/include/asm/spinlock.h+47−0
@@ -0,0 +1,47 @@
1/* SPDX-License-Identifier: GPL-2.0 */
2
3#ifndef __ASM_RISCV_SPINLOCK_H
4#define __ASM_RISCV_SPINLOCK_H
5
6#ifdef CONFIG_RISCV_COMBO_SPINLOCKS
7#define _Q_PENDING_LOOPS (1 << 9)
8
9#define __no_arch_spinlock_redefine
10#include <asm/ticket_spinlock.h>
11#include <asm/qspinlock.h>
12#include <asm/jump_label.h>
13
14/*
15 * TODO: Use an alternative instead of a static key when we are able to parse
16 * the extensions string earlier in the boot process.
17 */
18DECLARE_STATIC_KEY_TRUE(qspinlock_key);
19
20#define SPINLOCK_BASE_DECLARE(op, type, type_lock) \
21static __always_inline type arch_spin_##op(type_lock lock) \
22{ \
23 if (static_branch_unlikely(&qspinlock_key)) \
24 return queued_spin_##op(lock); \
25 return ticket_spin_##op(lock); \
26}
27
28SPINLOCK_BASE_DECLARE(lock, void, arch_spinlock_t *)
29SPINLOCK_BASE_DECLARE(unlock, void, arch_spinlock_t *)
30SPINLOCK_BASE_DECLARE(is_locked, int, arch_spinlock_t *)
31SPINLOCK_BASE_DECLARE(is_contended, int, arch_spinlock_t *)
32SPINLOCK_BASE_DECLARE(trylock, bool, arch_spinlock_t *)
33SPINLOCK_BASE_DECLARE(value_unlocked, int, arch_spinlock_t)
34
35#elif defined(CONFIG_RISCV_QUEUED_SPINLOCKS)
36
37#include <asm/qspinlock.h>
38
39#else
40
41#include <asm/ticket_spinlock.h>
42
43#endif
44
45#include <asm/qrwlock.h>
46
47#endif /* __ASM_RISCV_SPINLOCK_H */
arch/riscv/include/asm/switch_to.h+19−0
@@ -70,6 +70,24 @@ static __always_inline bool has_fpu(void) { return false; } · 69 unmodified lines
70#define __switch_to_fpu(__prev, __next) do { } while (0)70#define __switch_to_fpu(__prev, __next) do { } while (0)
71#endif71#endif
72 72
73static inline void envcfg_update_bits(struct task_struct *task,
74 unsigned long mask, unsigned long val)
75{
76 unsigned long envcfg;
77
78 envcfg = (task->thread.envcfg & ~mask) | val;
79 task->thread.envcfg = envcfg;
80 if (task == current)
81 csr_write(CSR_ENVCFG, envcfg);
82}
83
84static inline void __switch_to_envcfg(struct task_struct *next)
85{
86 asm volatile (ALTERNATIVE("nop", "csrw " __stringify(CSR_ENVCFG) ", %0",
87 0, RISCV_ISA_EXT_XLINUXENVCFG, 1)
88 :: "r" (next->thread.envcfg) : "memory");
89}
90
73extern struct task_struct *__switch_to(struct task_struct *,91extern struct task_struct *__switch_to(struct task_struct *,
74 struct task_struct *);92 struct task_struct *);
75 93
@@ -103,6 +121,7 @@ do { \ · 27 unmodified lines
103 __switch_to_vector(__prev, __next); \121 __switch_to_vector(__prev, __next); \
104 if (switch_to_should_flush_icache(__next)) \122 if (switch_to_should_flush_icache(__next)) \
105 local_flush_icache_all(); \123 local_flush_icache_all(); \
124 __switch_to_envcfg(__next); \
106 ((last) = __switch_to(__prev, __next)); \125 ((last) = __switch_to(__prev, __next)); \
107} while (0)126} while (0)
108 127
arch/riscv/include/asm/uaccess.h+38−5
@@ -9,8 +9,41 @@ · 8 unmodified lines
9#define _ASM_RISCV_UACCESS_H9#define _ASM_RISCV_UACCESS_H
10 10
11#include <asm/asm-extable.h>11#include <asm/asm-extable.h>
12#include <asm/cpufeature.h>
12#include <asm/pgtable.h> /* for TASK_SIZE */13#include <asm/pgtable.h> /* for TASK_SIZE */
13 14
15#ifdef CONFIG_RISCV_ISA_SUPM
16static inline unsigned long __untagged_addr_remote(struct mm_struct *mm, unsigned long addr)
17{
18 if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SUPM)) {
19 u8 pmlen = mm->context.pmlen;
20
21 /* Virtual addresses are sign-extended; physical addresses are zero-extended. */
22 if (IS_ENABLED(CONFIG_MMU))
23 return (long)(addr << pmlen) >> pmlen;
24 else
25 return (addr << pmlen) >> pmlen;
26 }
27
28 return addr;
29}
30
31#define untagged_addr(addr) ({ \
32 unsigned long __addr = (__force unsigned long)(addr); \
33 (__force __typeof__(addr))__untagged_addr_remote(current->mm, __addr); \
34})
35
36#define untagged_addr_remote(mm, addr) ({ \
37 unsigned long __addr = (__force unsigned long)(addr); \
38 mmap_assert_locked(mm); \
39 (__force __typeof__(addr))__untagged_addr_remote(mm, __addr); \
40})
41
42#define access_ok(addr, size) likely(__access_ok(untagged_addr(addr), size))
43#else
44#define untagged_addr(addr) (addr)
45#endif
46
14/*47/*
15 * User space memory access functions48 * User space memory access functions
16 */49 */
@@ -130,7 +163,7 @@ do { \ · 113 unmodified lines
130 */163 */
131#define __get_user(x, ptr) \164#define __get_user(x, ptr) \
132({ \165({ \
133 const __typeof__(*(ptr)) __user *__gu_ptr = (ptr); \166 const __typeof__(*(ptr)) __user *__gu_ptr = untagged_addr(ptr); \
134 long __gu_err = 0; \167 long __gu_err = 0; \
135 \168 \
136 __chk_user_ptr(__gu_ptr); \169 __chk_user_ptr(__gu_ptr); \
@@ -246,7 +279,7 @@ do { \ · 109 unmodified lines
246 */279 */
247#define __put_user(x, ptr) \280#define __put_user(x, ptr) \
248({ \281({ \
249 __typeof__(*(ptr)) __user *__gu_ptr = (ptr); \282 __typeof__(*(ptr)) __user *__gu_ptr = untagged_addr(ptr); \
250 __typeof__(*__gu_ptr) __val = (x); \283 __typeof__(*__gu_ptr) __val = (x); \
251 long __pu_err = 0; \284 long __pu_err = 0; \
252 \285 \
@@ -293,13 +326,13 @@ unsigned long __must_check __asm_copy_from_user(void *to, · 40 unmodified lines
293static inline unsigned long326static inline unsigned long
294raw_copy_from_user(void *to, const void __user *from, unsigned long n)327raw_copy_from_user(void *to, const void __user *from, unsigned long n)
295{328{
296 return __asm_copy_from_user(to, from, n);329 return __asm_copy_from_user(to, untagged_addr(from), n);
297}330}
298 331
299static inline unsigned long332static inline unsigned long
300raw_copy_to_user(void __user *to, const void *from, unsigned long n)333raw_copy_to_user(void __user *to, const void *from, unsigned long n)
301{334{
302 return __asm_copy_to_user(to, from, n);335 return __asm_copy_to_user(untagged_addr(to), from, n);
303}336}
304 337
305extern long strncpy_from_user(char *dest, const char __user *src, long count);338extern long strncpy_from_user(char *dest, const char __user *src, long count);
@@ -314,7 +347,7 @@ unsigned long __must_check clear_user(void __user *to, unsigned long n) · 8 unmodified lines
314{347{
315 might_fault();348 might_fault();
316 return access_ok(to, n) ?349 return access_ok(to, n) ?
317 __clear_user(to, n) : n;350 __clear_user(untagged_addr(to), n) : n;
318}351}
319 352
320#define __get_kernel_nofault(dst, src, type, err_label) \353#define __get_kernel_nofault(dst, src, type, err_label) \
arch/riscv/include/asm/vector.h+2−0
@@ -21,6 +21,7 @@ · 20 unmodified lines
21 21
22extern unsigned long riscv_v_vsize;22extern unsigned long riscv_v_vsize;
23int riscv_v_setup_vsize(void);23int riscv_v_setup_vsize(void);
24bool insn_is_vector(u32 insn_buf);
24bool riscv_v_first_use_handler(struct pt_regs *regs);25bool riscv_v_first_use_handler(struct pt_regs *regs);
25void kernel_vector_begin(void);26void kernel_vector_begin(void);
26void kernel_vector_end(void);27void kernel_vector_end(void);
@@ -268,6 +269,7 @@ struct pt_regs; · 241 unmodified lines
268 269
269static inline int riscv_v_setup_vsize(void) { return -EOPNOTSUPP; }270static inline int riscv_v_setup_vsize(void) { return -EOPNOTSUPP; }
270static __always_inline bool has_vector(void) { return false; }271static __always_inline bool has_vector(void) { return false; }
272static __always_inline bool insn_is_vector(u32 insn_buf) { return false; }
271static inline bool riscv_v_first_use_handler(struct pt_regs *regs) { return false; }273static inline bool riscv_v_first_use_handler(struct pt_regs *regs) { return false; }
272static inline bool riscv_v_vstate_query(struct pt_regs *regs) { return false; }274static inline bool riscv_v_vstate_query(struct pt_regs *regs) { return false; }
273static inline bool riscv_v_vstate_ctrl_user_allowed(void) { return false; }275static inline bool riscv_v_vstate_ctrl_user_allowed(void) { return false; }
arch/riscv/include/uapi/asm/hwprobe.h+6−0
@@ -72,6 +72,7 @@ struct riscv_hwprobe { · 71 unmodified lines
72#define RISCV_HWPROBE_EXT_ZCF (1ULL << 46)72#define RISCV_HWPROBE_EXT_ZCF (1ULL << 46)
73#define RISCV_HWPROBE_EXT_ZCMOP (1ULL << 47)73#define RISCV_HWPROBE_EXT_ZCMOP (1ULL << 47)
74#define RISCV_HWPROBE_EXT_ZAWRS (1ULL << 48)74#define RISCV_HWPROBE_EXT_ZAWRS (1ULL << 48)
75#define RISCV_HWPROBE_EXT_SUPM (1ULL << 49)
75#define RISCV_HWPROBE_KEY_CPUPERF_0 576#define RISCV_HWPROBE_KEY_CPUPERF_0 5
76#define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0)77#define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0)
77#define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0)78#define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0)
@@ -88,6 +89,11 @@ struct riscv_hwprobe { · 10 unmodified lines
88#define RISCV_HWPROBE_MISALIGNED_SCALAR_SLOW 289#define RISCV_HWPROBE_MISALIGNED_SCALAR_SLOW 2
89#define RISCV_HWPROBE_MISALIGNED_SCALAR_FAST 390#define RISCV_HWPROBE_MISALIGNED_SCALAR_FAST 3
90#define RISCV_HWPROBE_MISALIGNED_SCALAR_UNSUPPORTED 491#define RISCV_HWPROBE_MISALIGNED_SCALAR_UNSUPPORTED 4
92#define RISCV_HWPROBE_KEY_MISALIGNED_VECTOR_PERF 10
93#define RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN 0
94#define RISCV_HWPROBE_MISALIGNED_VECTOR_SLOW 2
95#define RISCV_HWPROBE_MISALIGNED_VECTOR_FAST 3
96#define RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED 4
91/* Increase RISCV_HWPROBE_MAX_KEY when adding items. */97/* Increase RISCV_HWPROBE_MAX_KEY when adding items. */
92 98
93/* Flags */99/* Flags */
arch/riscv/include/uapi/asm/kvm.h+4−0
@@ -175,6 +175,10 @@ enum KVM_RISCV_ISA_EXT_ID { · 174 unmodified lines
175 KVM_RISCV_ISA_EXT_ZCF,175 KVM_RISCV_ISA_EXT_ZCF,
176 KVM_RISCV_ISA_EXT_ZCMOP,176 KVM_RISCV_ISA_EXT_ZCMOP,
177 KVM_RISCV_ISA_EXT_ZAWRS,177 KVM_RISCV_ISA_EXT_ZAWRS,
178 KVM_RISCV_ISA_EXT_SMNPM,
179 KVM_RISCV_ISA_EXT_SSNPM,
180 KVM_RISCV_ISA_EXT_SVADE,
181 KVM_RISCV_ISA_EXT_SVADU,
178 KVM_RISCV_ISA_EXT_MAX,182 KVM_RISCV_ISA_EXT_MAX,
179};183};
180 184
arch/riscv/kernel/Makefile+2−1
@@ -75,7 +75,8 @@ obj-$(CONFIG_MMU) += vdso.o vdso/ · 74 unmodified lines
75 75
76obj-$(CONFIG_RISCV_MISALIGNED) += traps_misaligned.o76obj-$(CONFIG_RISCV_MISALIGNED) += traps_misaligned.o
77obj-$(CONFIG_RISCV_MISALIGNED) += unaligned_access_speed.o77obj-$(CONFIG_RISCV_MISALIGNED) += unaligned_access_speed.o
78obj-$(CONFIG_RISCV_PROBE_UNALIGNED_ACCESS) += copy-unaligned.o78obj-$(CONFIG_RISCV_PROBE_UNALIGNED_ACCESS) += copy-unaligned.o
79obj-$(CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS) += vec-copy-unaligned.o
79 80
80obj-$(CONFIG_FPU) += fpu.o81obj-$(CONFIG_FPU) += fpu.o
81obj-$(CONFIG_FPU) += kernel_mode_fpu.o82obj-$(CONFIG_FPU) += kernel_mode_fpu.o
arch/riscv/kernel/copy-unaligned.h+5−0
@@ -10,4 +10,9 @@ · 9 unmodified lines
10void __riscv_copy_words_unaligned(void *dst, const void *src, size_t size);10void __riscv_copy_words_unaligned(void *dst, const void *src, size_t size);
11void __riscv_copy_bytes_unaligned(void *dst, const void *src, size_t size);11void __riscv_copy_bytes_unaligned(void *dst, const void *src, size_t size);
12 12
13#ifdef CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS
14void __riscv_copy_vec_words_unaligned(void *dst, const void *src, size_t size);
15void __riscv_copy_vec_bytes_unaligned(void *dst, const void *src, size_t size);
16#endif
17
13#endif /* __RISCV_KERNEL_COPY_UNALIGNED_H */18#endif /* __RISCV_KERNEL_COPY_UNALIGNED_H */
arch/riscv/kernel/cpufeature.c+25−3
@@ -29,6 +29,8 @@ · 28 unmodified lines
29 29
30#define NUM_ALPHA_EXTS ('z' - 'a' + 1)30#define NUM_ALPHA_EXTS ('z' - 'a' + 1)
31 31
32static bool any_cpu_has_zicboz;
33
32unsigned long elf_hwcap __read_mostly;34unsigned long elf_hwcap __read_mostly;
33 35
34/* Host ISA bitmap */36/* Host ISA bitmap */
@@ -99,6 +101,7 @@ static int riscv_ext_zicboz_validate(const struct riscv_isa_ext_data *data, · 64 unmodified lines
99 pr_err("Zicboz disabled as cboz-block-size present, but is not a power-of-2\n");101 pr_err("Zicboz disabled as cboz-block-size present, but is not a power-of-2\n");
100 return -EINVAL;102 return -EINVAL;
101 }103 }
104 any_cpu_has_zicboz = true;
102 return 0;105 return 0;
103}106}
104 107
@@ -133,6 +136,16 @@ static int riscv_ext_zcf_validate(const struct riscv_isa_ext_data *data, · 28 unmodified lines
133 return -EPROBE_DEFER;136 return -EPROBE_DEFER;
134}137}
135 138
139static int riscv_ext_svadu_validate(const struct riscv_isa_ext_data *data,
140 const unsigned long *isa_bitmap)
141{
142 /* SVADE has already been detected, use SVADE only */
143 if (__riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_SVADE))
144 return -EOPNOTSUPP;
145
146 return 0;
147}
148
136static const unsigned int riscv_zk_bundled_exts[] = {149static const unsigned int riscv_zk_bundled_exts[] = {
137 RISCV_ISA_EXT_ZBKB,150 RISCV_ISA_EXT_ZBKB,
138 RISCV_ISA_EXT_ZBKC,151 RISCV_ISA_EXT_ZBKC,
@@ -315,6 +328,7 @@ const struct riscv_isa_ext_data riscv_isa_ext[] = { · 176 unmodified lines
315 riscv_ext_zicbom_validate),328 riscv_ext_zicbom_validate),
316 __RISCV_ISA_EXT_SUPERSET_VALIDATE(zicboz, RISCV_ISA_EXT_ZICBOZ, riscv_xlinuxenvcfg_exts,329 __RISCV_ISA_EXT_SUPERSET_VALIDATE(zicboz, RISCV_ISA_EXT_ZICBOZ, riscv_xlinuxenvcfg_exts,
317 riscv_ext_zicboz_validate),330 riscv_ext_zicboz_validate),
331 __RISCV_ISA_EXT_DATA(ziccrse, RISCV_ISA_EXT_ZICCRSE),
318 __RISCV_ISA_EXT_DATA(zicntr, RISCV_ISA_EXT_ZICNTR),332 __RISCV_ISA_EXT_DATA(zicntr, RISCV_ISA_EXT_ZICNTR),
319 __RISCV_ISA_EXT_DATA(zicond, RISCV_ISA_EXT_ZICOND),333 __RISCV_ISA_EXT_DATA(zicond, RISCV_ISA_EXT_ZICOND),
320 __RISCV_ISA_EXT_DATA(zicsr, RISCV_ISA_EXT_ZICSR),334 __RISCV_ISA_EXT_DATA(zicsr, RISCV_ISA_EXT_ZICSR),
@@ -323,6 +337,7 @@ const struct riscv_isa_ext_data riscv_isa_ext[] = { · 2 unmodified lines
323 __RISCV_ISA_EXT_DATA(zihintpause, RISCV_ISA_EXT_ZIHINTPAUSE),337 __RISCV_ISA_EXT_DATA(zihintpause, RISCV_ISA_EXT_ZIHINTPAUSE),
324 __RISCV_ISA_EXT_DATA(zihpm, RISCV_ISA_EXT_ZIHPM),338 __RISCV_ISA_EXT_DATA(zihpm, RISCV_ISA_EXT_ZIHPM),
325 __RISCV_ISA_EXT_DATA(zimop, RISCV_ISA_EXT_ZIMOP),339 __RISCV_ISA_EXT_DATA(zimop, RISCV_ISA_EXT_ZIMOP),
340 __RISCV_ISA_EXT_DATA(zabha, RISCV_ISA_EXT_ZABHA),
326 __RISCV_ISA_EXT_DATA(zacas, RISCV_ISA_EXT_ZACAS),341 __RISCV_ISA_EXT_DATA(zacas, RISCV_ISA_EXT_ZACAS),
327 __RISCV_ISA_EXT_DATA(zawrs, RISCV_ISA_EXT_ZAWRS),342 __RISCV_ISA_EXT_DATA(zawrs, RISCV_ISA_EXT_ZAWRS),
328 __RISCV_ISA_EXT_DATA(zfa, RISCV_ISA_EXT_ZFA),343 __RISCV_ISA_EXT_DATA(zfa, RISCV_ISA_EXT_ZFA),
@@ -375,10 +390,15 @@ const struct riscv_isa_ext_data riscv_isa_ext[] = { · 46 unmodified lines
375 __RISCV_ISA_EXT_BUNDLE(zvksg, riscv_zvksg_bundled_exts),390 __RISCV_ISA_EXT_BUNDLE(zvksg, riscv_zvksg_bundled_exts),
376 __RISCV_ISA_EXT_DATA(zvkt, RISCV_ISA_EXT_ZVKT),391 __RISCV_ISA_EXT_DATA(zvkt, RISCV_ISA_EXT_ZVKT),
377 __RISCV_ISA_EXT_DATA(smaia, RISCV_ISA_EXT_SMAIA),392 __RISCV_ISA_EXT_DATA(smaia, RISCV_ISA_EXT_SMAIA),
393 __RISCV_ISA_EXT_DATA(smmpm, RISCV_ISA_EXT_SMMPM),
394 __RISCV_ISA_EXT_SUPERSET(smnpm, RISCV_ISA_EXT_SMNPM, riscv_xlinuxenvcfg_exts),
378 __RISCV_ISA_EXT_DATA(smstateen, RISCV_ISA_EXT_SMSTATEEN),395 __RISCV_ISA_EXT_DATA(smstateen, RISCV_ISA_EXT_SMSTATEEN),
379 __RISCV_ISA_EXT_DATA(ssaia, RISCV_ISA_EXT_SSAIA),396 __RISCV_ISA_EXT_DATA(ssaia, RISCV_ISA_EXT_SSAIA),
380 __RISCV_ISA_EXT_DATA(sscofpmf, RISCV_ISA_EXT_SSCOFPMF),397 __RISCV_ISA_EXT_DATA(sscofpmf, RISCV_ISA_EXT_SSCOFPMF),
398 __RISCV_ISA_EXT_SUPERSET(ssnpm, RISCV_ISA_EXT_SSNPM, riscv_xlinuxenvcfg_exts),
381 __RISCV_ISA_EXT_DATA(sstc, RISCV_ISA_EXT_SSTC),399 __RISCV_ISA_EXT_DATA(sstc, RISCV_ISA_EXT_SSTC),
400 __RISCV_ISA_EXT_DATA(svade, RISCV_ISA_EXT_SVADE),
401 __RISCV_ISA_EXT_DATA_VALIDATE(svadu, RISCV_ISA_EXT_SVADU, riscv_ext_svadu_validate),
382 __RISCV_ISA_EXT_DATA(svinval, RISCV_ISA_EXT_SVINVAL),402 __RISCV_ISA_EXT_DATA(svinval, RISCV_ISA_EXT_SVINVAL),
383 __RISCV_ISA_EXT_DATA(svnapot, RISCV_ISA_EXT_SVNAPOT),403 __RISCV_ISA_EXT_DATA(svnapot, RISCV_ISA_EXT_SVNAPOT),
384 __RISCV_ISA_EXT_DATA(svpbmt, RISCV_ISA_EXT_SVPBMT),404 __RISCV_ISA_EXT_DATA(svpbmt, RISCV_ISA_EXT_SVPBMT),
@@ -918,10 +938,12 @@ unsigned long riscv_get_elf_hwcap(void) · 533 unmodified lines
918 return hwcap;938 return hwcap;
919}939}
920 940
921void riscv_user_isa_enable(void)941void __init riscv_user_isa_enable(void)
922{942{
923 if (riscv_cpu_has_extension_unlikely(smp_processor_id(), RISCV_ISA_EXT_ZICBOZ))943 if (riscv_has_extension_unlikely(RISCV_ISA_EXT_ZICBOZ))
924 csr_set(CSR_ENVCFG, ENVCFG_CBZE);944 current->thread.envcfg |= ENVCFG_CBZE;
945 else if (any_cpu_has_zicboz)
946 pr_warn("Zicboz disabled as it is unavailable on some harts\n");
925}947}
926 948
927#ifdef CONFIG_RISCV_ALTERNATIVE949#ifdef CONFIG_RISCV_ALTERNATIVE
arch/riscv/kernel/fpu.S+2−2
@@ -170,7 +170,7 @@ SYM_FUNC_END(__fstate_restore) · 169 unmodified lines
170 __access_func(f31)170 __access_func(f31)
171 171
172 172
173#ifdef CONFIG_RISCV_MISALIGNED173#ifdef CONFIG_RISCV_SCALAR_MISALIGNED
174 174
175/*175/*
176 * Disable compressed instructions set to keep a constant offset between FP176 * Disable compressed instructions set to keep a constant offset between FP
@@ -224,4 +224,4 @@ SYM_FUNC_START(get_f64_reg) · 47 unmodified lines
224 fp_access_epilogue224 fp_access_epilogue
225SYM_FUNC_END(get_f64_reg)225SYM_FUNC_END(get_f64_reg)
226 226
227#endif /* CONFIG_RISCV_MISALIGNED */227#endif /* CONFIG_RISCV_SCALAR_MISALIGNED */
arch/riscv/kernel/process.c+154−0
@@ -7,6 +7,7 @@ · 6 unmodified lines
7 * Copyright (C) 2017 SiFive7 * Copyright (C) 2017 SiFive
8 */8 */
9 9
10#include <linux/bitfield.h>
10#include <linux/cpu.h>11#include <linux/cpu.h>
11#include <linux/kernel.h>12#include <linux/kernel.h>
12#include <linux/sched.h>13#include <linux/sched.h>
@@ -180,6 +181,10 @@ void flush_thread(void) · 167 unmodified lines
180 memset(&current->thread.vstate, 0, sizeof(struct __riscv_v_ext_state));181 memset(&current->thread.vstate, 0, sizeof(struct __riscv_v_ext_state));
181 clear_tsk_thread_flag(current, TIF_RISCV_V_DEFER_RESTORE);182 clear_tsk_thread_flag(current, TIF_RISCV_V_DEFER_RESTORE);
182#endif183#endif
184#ifdef CONFIG_RISCV_ISA_SUPM
185 if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SUPM))
186 envcfg_update_bits(current, ENVCFG_PMM, ENVCFG_PMM_PMLEN_0);
187#endif
183}188}
184 189
185void arch_release_task_struct(struct task_struct *tsk)190void arch_release_task_struct(struct task_struct *tsk)
@@ -208,6 +213,10 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args) · 22 unmodified lines
208 unsigned long tls = args->tls;213 unsigned long tls = args->tls;
209 struct pt_regs *childregs = task_pt_regs(p);214 struct pt_regs *childregs = task_pt_regs(p);
210 215
216 /* Ensure all threads in this mm have the same pointer masking mode. */
217 if (IS_ENABLED(CONFIG_RISCV_ISA_SUPM) && p->mm && (clone_flags & CLONE_VM))
218 set_bit(MM_CONTEXT_LOCK_PMLEN, &p->mm->context.flags);
219
211 memset(&p->thread.s, 0, sizeof(p->thread.s));220 memset(&p->thread.s, 0, sizeof(p->thread.s));
212 221
213 /* p->thread holds context to be restored by __switch_to() */222 /* p->thread holds context to be restored by __switch_to() */
@@ -242,3 +251,148 @@ void __init arch_task_cache_init(void) · 28 unmodified lines
242{251{
243 riscv_v_setup_ctx_cache();252 riscv_v_setup_ctx_cache();
244}253}
254
255#ifdef CONFIG_RISCV_ISA_SUPM
256enum {
257 PMLEN_0 = 0,
258 PMLEN_7 = 7,
259 PMLEN_16 = 16,
260};
261
262static bool have_user_pmlen_7;
263static bool have_user_pmlen_16;
264
265/*
266 * Control the relaxed ABI allowing tagged user addresses into the kernel.
267 */
268static unsigned int tagged_addr_disabled;
269
270long set_tagged_addr_ctrl(struct task_struct *task, unsigned long arg)
271{
272 unsigned long valid_mask = PR_PMLEN_MASK | PR_TAGGED_ADDR_ENABLE;
273 struct thread_info *ti = task_thread_info(task);
274 struct mm_struct *mm = task->mm;
275 unsigned long pmm;
276 u8 pmlen;
277
278 if (is_compat_thread(ti))
279 return -EINVAL;
280
281 if (arg & ~valid_mask)
282 return -EINVAL;
283
284 /*
285 * Prefer the smallest PMLEN that satisfies the user's request,
286 * in case choosing a larger PMLEN has a performance impact.
287 */
288 pmlen = FIELD_GET(PR_PMLEN_MASK, arg);
289 if (pmlen == PMLEN_0) {
290 pmm = ENVCFG_PMM_PMLEN_0;
291 } else if (pmlen <= PMLEN_7 && have_user_pmlen_7) {
292 pmlen = PMLEN_7;
293 pmm = ENVCFG_PMM_PMLEN_7;
294 } else if (pmlen <= PMLEN_16 && have_user_pmlen_16) {
295 pmlen = PMLEN_16;
296 pmm = ENVCFG_PMM_PMLEN_16;
297 } else {
298 return -EINVAL;
299 }
300
301 /*
302 * Do not allow the enabling of the tagged address ABI if globally
303 * disabled via sysctl abi.tagged_addr_disabled, if pointer masking
304 * is disabled for userspace.
305 */
306 if (arg & PR_TAGGED_ADDR_ENABLE && (tagged_addr_disabled || !pmlen))
307 return -EINVAL;
308
309 if (!(arg & PR_TAGGED_ADDR_ENABLE))
310 pmlen = PMLEN_0;
311
312 if (mmap_write_lock_killable(mm))
313 return -EINTR;
314
315 if (test_bit(MM_CONTEXT_LOCK_PMLEN, &mm->context.flags) && mm->context.pmlen != pmlen) {
316 mmap_write_unlock(mm);
317 return -EBUSY;
318 }
319
320 envcfg_update_bits(task, ENVCFG_PMM, pmm);
321 mm->context.pmlen = pmlen;
322
323 mmap_write_unlock(mm);
324
325 return 0;
326}
327
328long get_tagged_addr_ctrl(struct task_struct *task)
329{
330 struct thread_info *ti = task_thread_info(task);
331 long ret = 0;
332
333 if (is_compat_thread(ti))
334 return -EINVAL;
335
336 /*
337 * The mm context's pmlen is set only when the tagged address ABI is
338 * enabled, so the effective PMLEN must be extracted from envcfg.PMM.
339 */
340 switch (task->thread.envcfg & ENVCFG_PMM) {
341 case ENVCFG_PMM_PMLEN_7:
342 ret = FIELD_PREP(PR_PMLEN_MASK, PMLEN_7);
343 break;
344 case ENVCFG_PMM_PMLEN_16:
345 ret = FIELD_PREP(PR_PMLEN_MASK, PMLEN_16);
346 break;
347 }
348
349 if (task->mm->context.pmlen)
350 ret |= PR_TAGGED_ADDR_ENABLE;
351
352 return ret;
353}
354
355static bool try_to_set_pmm(unsigned long value)
356{
357 csr_set(CSR_ENVCFG, value);
358 return (csr_read_clear(CSR_ENVCFG, ENVCFG_PMM) & ENVCFG_PMM) == value;
359}
360
361/*
362 * Global sysctl to disable the tagged user addresses support. This control
363 * only prevents the tagged address ABI enabling via prctl() and does not
364 * disable it for tasks that already opted in to the relaxed ABI.
365 */
366
367static struct ctl_table tagged_addr_sysctl_table[] = {
368 {
369 .procname = "tagged_addr_disabled",
370 .mode = 0644,
371 .data = &tagged_addr_disabled,
372 .maxlen = sizeof(int),
373 .proc_handler = proc_dointvec_minmax,
374 .extra1 = SYSCTL_ZERO,
375 .extra2 = SYSCTL_ONE,
376 },
377};
378
379static int __init tagged_addr_init(void)
380{
381 if (!riscv_has_extension_unlikely(RISCV_ISA_EXT_SUPM))
382 return 0;
383
384 /*
385 * envcfg.PMM is a WARL field. Detect which values are supported.
386 * Assume the supported PMLEN values are the same on all harts.
387 */
388 csr_clear(CSR_ENVCFG, ENVCFG_PMM);
389 have_user_pmlen_7 = try_to_set_pmm(ENVCFG_PMM_PMLEN_7);
390 have_user_pmlen_16 = try_to_set_pmm(ENVCFG_PMM_PMLEN_16);
391
392 if (!register_sysctl("abi", tagged_addr_sysctl_table))
393 return -EINVAL;
394
395 return 0;
396}
397core_initcall(tagged_addr_init);
398#endif /* CONFIG_RISCV_ISA_SUPM */
arch/riscv/kernel/ptrace.c+42−0
@@ -28,6 +28,9 @@ enum riscv_regset { · 27 unmodified lines
28#ifdef CONFIG_RISCV_ISA_V28#ifdef CONFIG_RISCV_ISA_V
29 REGSET_V,29 REGSET_V,
30#endif30#endif
31#ifdef CONFIG_RISCV_ISA_SUPM
32 REGSET_TAGGED_ADDR_CTRL,
33#endif
31};34};
32 35
33static int riscv_gpr_get(struct task_struct *target,36static int riscv_gpr_get(struct task_struct *target,
@@ -152,6 +155,35 @@ static int riscv_vr_set(struct task_struct *target, · 118 unmodified lines
152}155}
153#endif156#endif
154 157
158#ifdef CONFIG_RISCV_ISA_SUPM
159static int tagged_addr_ctrl_get(struct task_struct *target,
160 const struct user_regset *regset,
161 struct membuf to)
162{
163 long ctrl = get_tagged_addr_ctrl(target);
164
165 if (IS_ERR_VALUE(ctrl))
166 return ctrl;
167
168 return membuf_write(&to, &ctrl, sizeof(ctrl));
169}
170
171static int tagged_addr_ctrl_set(struct task_struct *target,
172 const struct user_regset *regset,
173 unsigned int pos, unsigned int count,
174 const void *kbuf, const void __user *ubuf)
175{
176 int ret;
177 long ctrl;
178
179 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl, 0, -1);
180 if (ret)
181 return ret;
182
183 return set_tagged_addr_ctrl(target, ctrl);
184}
185#endif
186
155static const struct user_regset riscv_user_regset[] = {187static const struct user_regset riscv_user_regset[] = {
156 [REGSET_X] = {188 [REGSET_X] = {
157 .core_note_type = NT_PRSTATUS,189 .core_note_type = NT_PRSTATUS,
@@ -182,6 +214,16 @@ static const struct user_regset riscv_user_regset[] = { · 24 unmodified lines
182 .set = riscv_vr_set,214 .set = riscv_vr_set,
183 },215 },
184#endif216#endif
217#ifdef CONFIG_RISCV_ISA_SUPM
218 [REGSET_TAGGED_ADDR_CTRL] = {
219 .core_note_type = NT_RISCV_TAGGED_ADDR_CTRL,
220 .n = 1,
221 .size = sizeof(long),
222 .align = sizeof(long),
223 .regset_get = tagged_addr_ctrl_get,
224 .set = tagged_addr_ctrl_set,
225 },
226#endif
185};227};
186 228
187static const struct user_regset_view riscv_user_native_view = {229static const struct user_regset_view riscv_user_native_view = {
arch/riscv/kernel/setup.c+37−0
@@ -244,6 +244,42 @@ static void __init parse_dtb(void) · 243 unmodified lines
244#endif244#endif
245}245}
246 246
247#if defined(CONFIG_RISCV_COMBO_SPINLOCKS)
248DEFINE_STATIC_KEY_TRUE(qspinlock_key);
249EXPORT_SYMBOL(qspinlock_key);
250#endif
251
252static void __init riscv_spinlock_init(void)
253{
254 char *using_ext = NULL;
255
256 if (IS_ENABLED(CONFIG_RISCV_TICKET_SPINLOCKS)) {
257 pr_info("Ticket spinlock: enabled\n");
258 return;
259 }
260
261 if (IS_ENABLED(CONFIG_RISCV_ISA_ZABHA) &&
262 IS_ENABLED(CONFIG_RISCV_ISA_ZACAS) &&
263 riscv_isa_extension_available(NULL, ZABHA) &&
264 riscv_isa_extension_available(NULL, ZACAS)) {
265 using_ext = "using Zabha";
266 } else if (riscv_isa_extension_available(NULL, ZICCRSE)) {
267 using_ext = "using Ziccrse";
268 }
269#if defined(CONFIG_RISCV_COMBO_SPINLOCKS)
270 else {
271 static_branch_disable(&qspinlock_key);
272 pr_info("Ticket spinlock: enabled\n");
273 return;
274 }
275#endif
276
277 if (!using_ext)
278 pr_err("Queued spinlock without Zabha or Ziccrse");
279 else
280 pr_info("Queued spinlock %s: enabled\n", using_ext);
281}
282
247extern void __init init_rt_signal_env(void);283extern void __init init_rt_signal_env(void);
248 284
249void __init setup_arch(char **cmdline_p)285void __init setup_arch(char **cmdline_p)
@@ -297,6 +333,7 @@ void __init setup_arch(char **cmdline_p) · 47 unmodified lines
297 riscv_set_dma_cache_alignment();333 riscv_set_dma_cache_alignment();
298 334
299 riscv_user_isa_enable();335 riscv_user_isa_enable();
336 riscv_spinlock_init();
300}337}
301 338
302bool arch_cpu_is_hotpluggable(int cpu)339bool arch_cpu_is_hotpluggable(int cpu)
arch/riscv/kernel/smpboot.c+0−2
@@ -233,8 +233,6 @@ asmlinkage __visible void smp_callin(void) · 232 unmodified lines
233 numa_add_cpu(curr_cpuid);233 numa_add_cpu(curr_cpuid);
234 set_cpu_online(curr_cpuid, true);234 set_cpu_online(curr_cpuid, true);
235 235
236 riscv_user_isa_enable();
237
238 /*236 /*
239 * Remote cache and TLB flushes are ignored while the CPU is offline,237 * Remote cache and TLB flushes are ignored while the CPU is offline,
240 * so flush them both right now just in case.238 * so flush them both right now just in case.
arch/riscv/kernel/suspend.c+2−2
@@ -14,7 +14,7 @@ · 13 unmodified lines
14 14
15void suspend_save_csrs(struct suspend_context *context)15void suspend_save_csrs(struct suspend_context *context)
16{16{
17 if (riscv_cpu_has_extension_unlikely(smp_processor_id(), RISCV_ISA_EXT_XLINUXENVCFG))17 if (riscv_has_extension_unlikely(RISCV_ISA_EXT_XLINUXENVCFG))
18 context->envcfg = csr_read(CSR_ENVCFG);18 context->envcfg = csr_read(CSR_ENVCFG);
19 context->tvec = csr_read(CSR_TVEC);19 context->tvec = csr_read(CSR_TVEC);
20 context->ie = csr_read(CSR_IE);20 context->ie = csr_read(CSR_IE);
@@ -37,7 +37,7 @@ void suspend_save_csrs(struct suspend_context *context) · 16 unmodified lines
37void suspend_restore_csrs(struct suspend_context *context)37void suspend_restore_csrs(struct suspend_context *context)
38{38{
39 csr_write(CSR_SCRATCH, 0);39 csr_write(CSR_SCRATCH, 0);
40 if (riscv_cpu_has_extension_unlikely(smp_processor_id(), RISCV_ISA_EXT_XLINUXENVCFG))40 if (riscv_has_extension_unlikely(RISCV_ISA_EXT_XLINUXENVCFG))
41 csr_write(CSR_ENVCFG, context->envcfg);41 csr_write(CSR_ENVCFG, context->envcfg);
42 csr_write(CSR_TVEC, context->tvec);42 csr_write(CSR_TVEC, context->tvec);
43 csr_write(CSR_IE, context->ie);43 csr_write(CSR_IE, context->ie);
arch/riscv/kernel/sys_hwprobe.c+44−0
@@ -150,6 +150,9 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair, · 149 unmodified lines
150 EXT_KEY(ZFH);150 EXT_KEY(ZFH);
151 EXT_KEY(ZFHMIN);151 EXT_KEY(ZFHMIN);
152 }152 }
153
154 if (IS_ENABLED(CONFIG_RISCV_ISA_SUPM))
155 EXT_KEY(SUPM);
153#undef EXT_KEY156#undef EXT_KEY
154 }157 }
155 158
@@ -201,6 +204,43 @@ static u64 hwprobe_misaligned(const struct cpumask *cpus) · 45 unmodified lines
201}204}
202#endif205#endif
203 206
207#ifdef CONFIG_RISCV_VECTOR_MISALIGNED
208static u64 hwprobe_vec_misaligned(const struct cpumask *cpus)
209{
210 int cpu;
211 u64 perf = -1ULL;
212
213 /* Return if supported or not even if speed wasn't probed */
214 for_each_cpu(cpu, cpus) {
215 int this_perf = per_cpu(vector_misaligned_access, cpu);
216
217 if (perf == -1ULL)
218 perf = this_perf;
219
220 if (perf != this_perf) {
221 perf = RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN;
222 break;
223 }
224 }
225
226 if (perf == -1ULL)
227 return RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN;
228
229 return perf;
230}
231#else
232static u64 hwprobe_vec_misaligned(const struct cpumask *cpus)
233{
234 if (IS_ENABLED(CONFIG_RISCV_EFFICIENT_VECTOR_UNALIGNED_ACCESS))
235 return RISCV_HWPROBE_MISALIGNED_VECTOR_FAST;
236
237 if (IS_ENABLED(CONFIG_RISCV_SLOW_VECTOR_UNALIGNED_ACCESS))
238 return RISCV_HWPROBE_MISALIGNED_VECTOR_SLOW;
239
240 return RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN;
241}
242#endif
243
204static void hwprobe_one_pair(struct riscv_hwprobe *pair,244static void hwprobe_one_pair(struct riscv_hwprobe *pair,
205 const struct cpumask *cpus)245 const struct cpumask *cpus)
206{246{
@@ -229,6 +269,10 @@ static void hwprobe_one_pair(struct riscv_hwprobe *pair, · 22 unmodified lines
229 pair->value = hwprobe_misaligned(cpus);269 pair->value = hwprobe_misaligned(cpus);
230 break;270 break;
231 271
272 case RISCV_HWPROBE_KEY_MISALIGNED_VECTOR_PERF:
273 pair->value = hwprobe_vec_misaligned(cpus);
274 break;
275
232 case RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE:276 case RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE:
233 pair->value = 0;277 pair->value = 0;
234 if (hwprobe_ext0_has(cpus, RISCV_HWPROBE_EXT_ZICBOZ))278 if (hwprobe_ext0_has(cpus, RISCV_HWPROBE_EXT_ZICBOZ))
arch/riscv/kernel/traps_misaligned.c+128−11
@@ -16,6 +16,7 @@ · 15 unmodified lines
16#include <asm/entry-common.h>16#include <asm/entry-common.h>
17#include <asm/hwprobe.h>17#include <asm/hwprobe.h>
18#include <asm/cpufeature.h>18#include <asm/cpufeature.h>
19#include <asm/vector.h>
19 20
20#define INSN_MATCH_LB 0x321#define INSN_MATCH_LB 0x3
21#define INSN_MASK_LB 0x707f22#define INSN_MASK_LB 0x707f
@@ -320,12 +321,37 @@ union reg_data { · 298 unmodified lines
320 u64 data_u64;321 u64 data_u64;
321};322};
322 323
323static bool unaligned_ctl __read_mostly;
324
325/* sysctl hooks */324/* sysctl hooks */
326int unaligned_enabled __read_mostly = 1; /* Enabled by default */325int unaligned_enabled __read_mostly = 1; /* Enabled by default */
327 326
328int handle_misaligned_load(struct pt_regs *regs)327#ifdef CONFIG_RISCV_VECTOR_MISALIGNED
328static int handle_vector_misaligned_load(struct pt_regs *regs)
329{
330 unsigned long epc = regs->epc;
331 unsigned long insn;
332
333 if (get_insn(regs, epc, &insn))
334 return -1;
335
336 /* Only return 0 when in check_vector_unaligned_access_emulated */
337 if (*this_cpu_ptr(&vector_misaligned_access) == RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN) {
338 *this_cpu_ptr(&vector_misaligned_access) = RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED;
339 regs->epc = epc + INSN_LEN(insn);
340 return 0;
341 }
342
343 /* If vector instruction we don't emulate it yet */
344 regs->epc = epc;
345 return -1;
346}
347#else
348static int handle_vector_misaligned_load(struct pt_regs *regs)
349{
350 return -1;
351}
352#endif
353
354static int handle_scalar_misaligned_load(struct pt_regs *regs)
329{355{
330 union reg_data val;356 union reg_data val;
331 unsigned long epc = regs->epc;357 unsigned long epc = regs->epc;
@@ -433,7 +459,7 @@ int handle_misaligned_load(struct pt_regs *regs) · 101 unmodified lines
433 return 0;459 return 0;
434}460}
435 461
436int handle_misaligned_store(struct pt_regs *regs)462static int handle_scalar_misaligned_store(struct pt_regs *regs)
437{463{
438 union reg_data val;464 union reg_data val;
439 unsigned long epc = regs->epc;465 unsigned long epc = regs->epc;
@@ -524,11 +550,96 @@ int handle_misaligned_store(struct pt_regs *regs) · 84 unmodified lines
524 return 0;550 return 0;
525}551}
526 552
527static bool check_unaligned_access_emulated(int cpu)553int handle_misaligned_load(struct pt_regs *regs)
554{
555 unsigned long epc = regs->epc;
556 unsigned long insn;
557
558 if (IS_ENABLED(CONFIG_RISCV_VECTOR_MISALIGNED)) {
559 if (get_insn(regs, epc, &insn))
560 return -1;
561
562 if (insn_is_vector(insn))
563 return handle_vector_misaligned_load(regs);
564 }
565
566 if (IS_ENABLED(CONFIG_RISCV_SCALAR_MISALIGNED))
567 return handle_scalar_misaligned_load(regs);
568
569 return -1;
570}
571
572int handle_misaligned_store(struct pt_regs *regs)
528{573{
574 if (IS_ENABLED(CONFIG_RISCV_SCALAR_MISALIGNED))
575 return handle_scalar_misaligned_store(regs);
576
577 return -1;
578}
579
580#ifdef CONFIG_RISCV_VECTOR_MISALIGNED
581void check_vector_unaligned_access_emulated(struct work_struct *work __always_unused)
582{
583 long *mas_ptr = this_cpu_ptr(&vector_misaligned_access);
584 unsigned long tmp_var;
585
586 *mas_ptr = RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN;
587
588 kernel_vector_begin();
589 /*
590 * In pre-13.0.0 versions of GCC, vector registers cannot appear in
591 * the clobber list. This inline asm clobbers v0, but since we do not
592 * currently build the kernel with V enabled, the v0 clobber arg is not
593 * needed (as the compiler will not emit vector code itself). If the kernel
594 * is changed to build with V enabled, the clobber arg will need to be
595 * added here.
596 */
597 __asm__ __volatile__ (
598 ".balign 4\n\t"
599 ".option push\n\t"
600 ".option arch, +zve32x\n\t"
601 " vsetivli zero, 1, e16, m1, ta, ma\n\t" // Vectors of 16b
602 " vle16.v v0, (%[ptr])\n\t" // Load bytes
603 ".option pop\n\t"
604 : : [ptr] "r" ((u8 *)&tmp_var + 1));
605 kernel_vector_end();
606}
607
608bool check_vector_unaligned_access_emulated_all_cpus(void)
609{
610 int cpu;
611
612 if (!has_vector()) {
613 for_each_online_cpu(cpu)
614 per_cpu(vector_misaligned_access, cpu) = RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED;
615 return false;
616 }
617
618 schedule_on_each_cpu(check_vector_unaligned_access_emulated);
619
620 for_each_online_cpu(cpu)
621 if (per_cpu(vector_misaligned_access, cpu)
622 == RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN)
623 return false;
624
625 return true;
626}
627#else
628bool check_vector_unaligned_access_emulated_all_cpus(void)
629{
630 return false;
631}
632#endif
633
634#ifdef CONFIG_RISCV_SCALAR_MISALIGNED
635
636static bool unaligned_ctl __read_mostly;
637
638void check_unaligned_access_emulated(struct work_struct *work __always_unused)
639{
640 int cpu = smp_processor_id();
529 long *mas_ptr = per_cpu_ptr(&misaligned_access_speed, cpu);641 long *mas_ptr = per_cpu_ptr(&misaligned_access_speed, cpu);
530 unsigned long tmp_var, tmp_val;642 unsigned long tmp_var, tmp_val;
531 bool misaligned_emu_detected;
532 643
533 *mas_ptr = RISCV_HWPROBE_MISALIGNED_SCALAR_UNKNOWN;644 *mas_ptr = RISCV_HWPROBE_MISALIGNED_SCALAR_UNKNOWN;
534 645
@@ -536,19 +647,16 @@ static bool check_unaligned_access_emulated(int cpu) · 1 unmodified line
536 " "REG_L" %[tmp], 1(%[ptr])\n"647 " "REG_L" %[tmp], 1(%[ptr])\n"
537 : [tmp] "=r" (tmp_val) : [ptr] "r" (&tmp_var) : "memory");648 : [tmp] "=r" (tmp_val) : [ptr] "r" (&tmp_var) : "memory");
538 649
539 misaligned_emu_detected = (*mas_ptr == RISCV_HWPROBE_MISALIGNED_SCALAR_EMULATED);
540 /*650 /*
541 * If unaligned_ctl is already set, this means that we detected that all651 * If unaligned_ctl is already set, this means that we detected that all
542 * CPUS uses emulated misaligned access at boot time. If that changed652 * CPUS uses emulated misaligned access at boot time. If that changed
543 * when hotplugging the new cpu, this is something we don't handle.653 * when hotplugging the new cpu, this is something we don't handle.
544 */654 */
545 if (unlikely(unaligned_ctl && !misaligned_emu_detected)) {655 if (unlikely(unaligned_ctl && (*mas_ptr != RISCV_HWPROBE_MISALIGNED_SCALAR_EMULATED))) {
546 pr_crit("CPU misaligned accesses non homogeneous (expected all emulated)\n");656 pr_crit("CPU misaligned accesses non homogeneous (expected all emulated)\n");
547 while (true)657 while (true)
548 cpu_relax();658 cpu_relax();
549 }659 }
550
551 return misaligned_emu_detected;
552}660}
553 661
554bool check_unaligned_access_emulated_all_cpus(void)662bool check_unaligned_access_emulated_all_cpus(void)
@@ -560,8 +668,11 @@ bool check_unaligned_access_emulated_all_cpus(void) · 5 unmodified lines
560 * accesses emulated since tasks requesting such control can run on any668 * accesses emulated since tasks requesting such control can run on any
561 * CPU.669 * CPU.
562 */670 */
671 schedule_on_each_cpu(check_unaligned_access_emulated);
672
563 for_each_online_cpu(cpu)673 for_each_online_cpu(cpu)
564 if (!check_unaligned_access_emulated(cpu))674 if (per_cpu(misaligned_access_speed, cpu)
675 != RISCV_HWPROBE_MISALIGNED_SCALAR_EMULATED)
565 return false;676 return false;
566 677
567 unaligned_ctl = true;678 unaligned_ctl = true;
@@ -572,3 +683,9 @@ bool unaligned_ctl_available(void) · 4 unmodified lines
572{683{
573 return unaligned_ctl;684 return unaligned_ctl;
574}685}
686#else
687bool check_unaligned_access_emulated_all_cpus(void)
688{
689 return false;
690}
691#endif
arch/riscv/kernel/unaligned_access_speed.c+148−8
@@ -6,11 +6,13 @@ · 5 unmodified lines
6#include <linux/cpu.h>6#include <linux/cpu.h>
7#include <linux/cpumask.h>7#include <linux/cpumask.h>
8#include <linux/jump_label.h>8#include <linux/jump_label.h>
9#include <linux/kthread.h>
9#include <linux/mm.h>10#include <linux/mm.h>
10#include <linux/smp.h>11#include <linux/smp.h>
11#include <linux/types.h>12#include <linux/types.h>
12#include <asm/cpufeature.h>13#include <asm/cpufeature.h>
13#include <asm/hwprobe.h>14#include <asm/hwprobe.h>
15#include <asm/vector.h>
14 16
15#include "copy-unaligned.h"17#include "copy-unaligned.h"
16 18
@@ -19,7 +21,8 @@ · 2 unmodified lines
19#define MISALIGNED_BUFFER_ORDER get_order(MISALIGNED_BUFFER_SIZE)21#define MISALIGNED_BUFFER_ORDER get_order(MISALIGNED_BUFFER_SIZE)
20#define MISALIGNED_COPY_SIZE ((MISALIGNED_BUFFER_SIZE / 2) - 0x80)22#define MISALIGNED_COPY_SIZE ((MISALIGNED_BUFFER_SIZE / 2) - 0x80)
21 23
22DEFINE_PER_CPU(long, misaligned_access_speed);24DEFINE_PER_CPU(long, misaligned_access_speed) = RISCV_HWPROBE_MISALIGNED_SCALAR_UNKNOWN;
25DEFINE_PER_CPU(long, vector_misaligned_access) = RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED;
23 26
24#ifdef CONFIG_RISCV_PROBE_UNALIGNED_ACCESS27#ifdef CONFIG_RISCV_PROBE_UNALIGNED_ACCESS
25static cpumask_t fast_misaligned_access;28static cpumask_t fast_misaligned_access;
@@ -191,6 +194,7 @@ static int riscv_online_cpu(unsigned int cpu) · 165 unmodified lines
191 if (per_cpu(misaligned_access_speed, cpu) != RISCV_HWPROBE_MISALIGNED_SCALAR_UNKNOWN)194 if (per_cpu(misaligned_access_speed, cpu) != RISCV_HWPROBE_MISALIGNED_SCALAR_UNKNOWN)
192 goto exit;195 goto exit;
193 196
197 check_unaligned_access_emulated(NULL);
194 buf = alloc_pages(GFP_KERNEL, MISALIGNED_BUFFER_ORDER);198 buf = alloc_pages(GFP_KERNEL, MISALIGNED_BUFFER_ORDER);
195 if (!buf) {199 if (!buf) {
196 pr_warn("Allocation failure, not measuring misaligned performance\n");200 pr_warn("Allocation failure, not measuring misaligned performance\n");
@@ -259,23 +263,159 @@ out: · 62 unmodified lines
259 kfree(bufs);263 kfree(bufs);
260 return 0;264 return 0;
261}265}
266#else /* CONFIG_RISCV_PROBE_UNALIGNED_ACCESS */
267static int check_unaligned_access_speed_all_cpus(void)
268{
269 return 0;
270}
271#endif
262 272
263static int check_unaligned_access_all_cpus(void)273#ifdef CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS
274static void check_vector_unaligned_access(struct work_struct *work __always_unused)
264{275{
265 bool all_cpus_emulated = check_unaligned_access_emulated_all_cpus();276 int cpu = smp_processor_id();
277 u64 start_cycles, end_cycles;
278 u64 word_cycles;
279 u64 byte_cycles;
280 int ratio;
281 unsigned long start_jiffies, now;
282 struct page *page;
283 void *dst;
284 void *src;
285 long speed = RISCV_HWPROBE_MISALIGNED_VECTOR_SLOW;
266 286
267 if (!all_cpus_emulated)287 if (per_cpu(vector_misaligned_access, cpu) != RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN)
268 return check_unaligned_access_speed_all_cpus();288 return;
289
290 page = alloc_pages(GFP_KERNEL, MISALIGNED_BUFFER_ORDER);
291 if (!page) {
292 pr_warn("Allocation failure, not measuring vector misaligned performance\n");
293 return;
294 }
295
296 /* Make an unaligned destination buffer. */
297 dst = (void *)((unsigned long)page_address(page) | 0x1);
298 /* Unalign src as well, but differently (off by 1 + 2 = 3). */
299 src = dst + (MISALIGNED_BUFFER_SIZE / 2);
300 src += 2;
301 word_cycles = -1ULL;
302
303 /* Do a warmup. */
304 kernel_vector_begin();
305 __riscv_copy_vec_words_unaligned(dst, src, MISALIGNED_COPY_SIZE);
269 306
307 start_jiffies = jiffies;
308 while ((now = jiffies) == start_jiffies)
309 cpu_relax();
310
311 /*
312 * For a fixed amount of time, repeatedly try the function, and take
313 * the best time in cycles as the measurement.
314 */
315 while (time_before(jiffies, now + (1 << MISALIGNED_ACCESS_JIFFIES_LG2))) {
316 start_cycles = get_cycles64();
317 /* Ensure the CSR read can't reorder WRT to the copy. */
318 mb();
319 __riscv_copy_vec_words_unaligned(dst, src, MISALIGNED_COPY_SIZE);
320 /* Ensure the copy ends before the end time is snapped. */
321 mb();
322 end_cycles = get_cycles64();
323 if ((end_cycles - start_cycles) < word_cycles)
324 word_cycles = end_cycles - start_cycles;
325 }
326
327 byte_cycles = -1ULL;
328 __riscv_copy_vec_bytes_unaligned(dst, src, MISALIGNED_COPY_SIZE);
329 start_jiffies = jiffies;
330 while ((now = jiffies) == start_jiffies)
331 cpu_relax();
332
333 while (time_before(jiffies, now + (1 << MISALIGNED_ACCESS_JIFFIES_LG2))) {
334 start_cycles = get_cycles64();
335 /* Ensure the CSR read can't reorder WRT to the copy. */
336 mb();
337 __riscv_copy_vec_bytes_unaligned(dst, src, MISALIGNED_COPY_SIZE);
338 /* Ensure the copy ends before the end time is snapped. */
339 mb();
340 end_cycles = get_cycles64();
341 if ((end_cycles - start_cycles) < byte_cycles)
342 byte_cycles = end_cycles - start_cycles;
343 }
344
345 kernel_vector_end();
346
347 /* Don't divide by zero. */
348 if (!word_cycles || !byte_cycles) {
349 pr_warn("cpu%d: rdtime lacks granularity needed to measure unaligned vector access speed\n",
350 cpu);
351
352 return;
353 }
354
355 if (word_cycles < byte_cycles)
356 speed = RISCV_HWPROBE_MISALIGNED_VECTOR_FAST;
357
358 ratio = div_u64((byte_cycles * 100), word_cycles);
359 pr_info("cpu%d: Ratio of vector byte access time to vector unaligned word access is %d.%02d, unaligned accesses are %s\n",
360 cpu,
361 ratio / 100,
362 ratio % 100,
363 (speed == RISCV_HWPROBE_MISALIGNED_VECTOR_FAST) ? "fast" : "slow");
364
365 per_cpu(vector_misaligned_access, cpu) = speed;
366}
367
368static int riscv_online_cpu_vec(unsigned int cpu)
369{
370 if (!has_vector())
371 return 0;
372
373 if (per_cpu(vector_misaligned_access, cpu) != RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED)
374 return 0;
375
376 check_vector_unaligned_access_emulated(NULL);
377 check_vector_unaligned_access(NULL);
270 return 0;378 return 0;
271}379}
272#else /* CONFIG_RISCV_PROBE_UNALIGNED_ACCESS */380
273static int check_unaligned_access_all_cpus(void)381/* Measure unaligned access speed on all CPUs present at boot in parallel. */
382static int vec_check_unaligned_access_speed_all_cpus(void *unused __always_unused)
274{383{
275 check_unaligned_access_emulated_all_cpus();384 schedule_on_each_cpu(check_vector_unaligned_access);
385
386 /*
387 * Setup hotplug callbacks for any new CPUs that come online or go
388 * offline.
389 */
390 cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, "riscv:online",
391 riscv_online_cpu_vec, NULL);
276 392
277 return 0;393 return 0;
278}394}
395#else /* CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS */
396static int vec_check_unaligned_access_speed_all_cpus(void *unused __always_unused)
397{
398 return 0;
399}
279#endif400#endif
280 401
402static int check_unaligned_access_all_cpus(void)
403{
404 bool all_cpus_emulated, all_cpus_vec_unsupported;
405
406 all_cpus_emulated = check_unaligned_access_emulated_all_cpus();
407 all_cpus_vec_unsupported = check_vector_unaligned_access_emulated_all_cpus();
408
409 if (!all_cpus_vec_unsupported &&
410 IS_ENABLED(CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS)) {
411 kthread_run(vec_check_unaligned_access_speed_all_cpus,
412 NULL, "vec_check_unaligned_access_speed_all_cpus");
413 }
414
415 if (!all_cpus_emulated)
416 return check_unaligned_access_speed_all_cpus();
417
418 return 0;
419}
420
281arch_initcall(check_unaligned_access_all_cpus);421arch_initcall(check_unaligned_access_all_cpus);
arch/riscv/kernel/vdso/Makefile+5−4
@@ -45,7 +45,7 @@ $(obj)/vdso.o: $(obj)/vdso.so · 44 unmodified lines
45 45
46# link rule for the .so file, .lds has to be first46# link rule for the .so file, .lds has to be first
47$(obj)/vdso.so.dbg: $(obj)/vdso.lds $(obj-vdso) FORCE47$(obj)/vdso.so.dbg: $(obj)/vdso.lds $(obj-vdso) FORCE
48 $(call if_changed,vdsold)48 $(call if_changed,vdsold_and_check)
49LDFLAGS_vdso.so.dbg = -shared -soname=linux-vdso.so.1 \49LDFLAGS_vdso.so.dbg = -shared -soname=linux-vdso.so.1 \
50 --build-id=sha1 --hash-style=both --eh-frame-hdr50 --build-id=sha1 --hash-style=both --eh-frame-hdr
51 51
@@ -65,7 +65,8 @@ include/generated/vdso-offsets.h: $(obj)/vdso.so.dbg FORCE · 13 unmodified lines
65# actual build commands65# actual build commands
66# The DSO images are built using a special linker script66# The DSO images are built using a special linker script
67# Make sure only to export the intended __vdso_xxx symbol offsets.67# Make sure only to export the intended __vdso_xxx symbol offsets.
68quiet_cmd_vdsold = VDSOLD $@68quiet_cmd_vdsold_and_check = VDSOLD $@
69 cmd_vdsold = $(LD) $(ld_flags) -T $(filter-out FORCE,$^) -o $@.tmp && \69 cmd_vdsold_and_check = $(LD) $(ld_flags) -T $(filter-out FORCE,$^) -o $@.tmp && \
70 $(OBJCOPY) $(patsubst %, -G __vdso_%, $(vdso-syms)) $@.tmp $@ && \70 $(OBJCOPY) $(patsubst %, -G __vdso_%, $(vdso-syms)) $@.tmp $@ && \
71 rm $@.tmp71 rm $@.tmp && \
72 $(cmd_vdso_check)
arch/riscv/kernel/vec-copy-unaligned.S+58−0
@@ -0,0 +1,58 @@
1/* SPDX-License-Identifier: GPL-2.0 */
2/* Copyright (C) 2024 Rivos Inc. */
3
4#include <linux/args.h>
5#include <linux/linkage.h>
6#include <asm/asm.h>
7
8 .text
9
10#define WORD_EEW 32
11
12#define WORD_SEW CONCATENATE(e, WORD_EEW)
13#define VEC_L CONCATENATE(vle, WORD_EEW).v
14#define VEC_S CONCATENATE(vle, WORD_EEW).v
15
16/* void __riscv_copy_vec_words_unaligned(void *, const void *, size_t) */
17/* Performs a memcpy without aligning buffers, using word loads and stores. */
18/* Note: The size is truncated to a multiple of WORD_EEW */
19SYM_FUNC_START(__riscv_copy_vec_words_unaligned)
20 andi a4, a2, ~(WORD_EEW-1)
21 beqz a4, 2f
22 add a3, a1, a4
23 .option push
24 .option arch, +zve32x
251:
26 vsetivli t0, 8, WORD_SEW, m8, ta, ma
27 VEC_L v0, (a1)
28 VEC_S v0, (a0)
29 addi a0, a0, WORD_EEW
30 addi a1, a1, WORD_EEW
31 bltu a1, a3, 1b
32
332:
34 .option pop
35 ret
36SYM_FUNC_END(__riscv_copy_vec_words_unaligned)
37
38/* void __riscv_copy_vec_bytes_unaligned(void *, const void *, size_t) */
39/* Performs a memcpy without aligning buffers, using only byte accesses. */
40/* Note: The size is truncated to a multiple of 8 */
41SYM_FUNC_START(__riscv_copy_vec_bytes_unaligned)
42 andi a4, a2, ~(8-1)
43 beqz a4, 2f
44 add a3, a1, a4
45 .option push
46 .option arch, +zve32x
471:
48 vsetivli t0, 8, e8, m8, ta, ma
49 vle8.v v0, (a1)
50 vse8.v v0, (a0)
51 addi a0, a0, 8
52 addi a1, a1, 8
53 bltu a1, a3, 1b
54
552:
56 .option pop
57 ret
58SYM_FUNC_END(__riscv_copy_vec_bytes_unaligned)
arch/riscv/kernel/vector.c+1−1
@@ -66,7 +66,7 @@ void __init riscv_v_setup_ctx_cache(void) · 65 unmodified lines
66#endif66#endif
67}67}
68 68
69static bool insn_is_vector(u32 insn_buf)69bool insn_is_vector(u32 insn_buf)
70{70{
71 u32 opcode = insn_buf & __INSN_OPCODE_MASK;71 u32 opcode = insn_buf & __INSN_OPCODE_MASK;
72 u32 width, csr;72 u32 width, csr;
arch/riscv/kvm/vcpu.c+4−0
@@ -551,6 +551,10 @@ static void kvm_riscv_vcpu_setup_config(struct kvm_vcpu *vcpu) · 550 unmodified lines
551 if (riscv_isa_extension_available(isa, ZICBOZ))551 if (riscv_isa_extension_available(isa, ZICBOZ))
552 cfg->henvcfg |= ENVCFG_CBZE;552 cfg->henvcfg |= ENVCFG_CBZE;
553 553
554 if (riscv_isa_extension_available(isa, SVADU) &&
555 !riscv_isa_extension_available(isa, SVADE))
556 cfg->henvcfg |= ENVCFG_ADUE;
557
554 if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SMSTATEEN)) {558 if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SMSTATEEN)) {
555 cfg->hstateen0 |= SMSTATEEN0_HSENVCFG;559 cfg->hstateen0 |= SMSTATEEN0_HSENVCFG;
556 if (riscv_isa_extension_available(isa, SSAIA))560 if (riscv_isa_extension_available(isa, SSAIA))
arch/riscv/kvm/vcpu_onereg.c+19−0
@@ -15,6 +15,7 @@ · 14 unmodified lines
15#include <asm/cacheflush.h>15#include <asm/cacheflush.h>
16#include <asm/cpufeature.h>16#include <asm/cpufeature.h>
17#include <asm/kvm_vcpu_vector.h>17#include <asm/kvm_vcpu_vector.h>
18#include <asm/pgtable.h>
18#include <asm/vector.h>19#include <asm/vector.h>
19 20
20#define KVM_RISCV_BASE_ISA_MASK GENMASK(25, 0)21#define KVM_RISCV_BASE_ISA_MASK GENMASK(25, 0)
@@ -34,10 +35,14 @@ static const unsigned long kvm_isa_ext_arr[] = { · 13 unmodified lines
34 [KVM_RISCV_ISA_EXT_M] = RISCV_ISA_EXT_m,35 [KVM_RISCV_ISA_EXT_M] = RISCV_ISA_EXT_m,
35 [KVM_RISCV_ISA_EXT_V] = RISCV_ISA_EXT_v,36 [KVM_RISCV_ISA_EXT_V] = RISCV_ISA_EXT_v,
36 /* Multi letter extensions (alphabetically sorted) */37 /* Multi letter extensions (alphabetically sorted) */
38 [KVM_RISCV_ISA_EXT_SMNPM] = RISCV_ISA_EXT_SSNPM,
37 KVM_ISA_EXT_ARR(SMSTATEEN),39 KVM_ISA_EXT_ARR(SMSTATEEN),
38 KVM_ISA_EXT_ARR(SSAIA),40 KVM_ISA_EXT_ARR(SSAIA),
39 KVM_ISA_EXT_ARR(SSCOFPMF),41 KVM_ISA_EXT_ARR(SSCOFPMF),
42 KVM_ISA_EXT_ARR(SSNPM),
40 KVM_ISA_EXT_ARR(SSTC),43 KVM_ISA_EXT_ARR(SSTC),
44 KVM_ISA_EXT_ARR(SVADE),
45 KVM_ISA_EXT_ARR(SVADU),
41 KVM_ISA_EXT_ARR(SVINVAL),46 KVM_ISA_EXT_ARR(SVINVAL),
42 KVM_ISA_EXT_ARR(SVNAPOT),47 KVM_ISA_EXT_ARR(SVNAPOT),
43 KVM_ISA_EXT_ARR(SVPBMT),48 KVM_ISA_EXT_ARR(SVPBMT),
@@ -110,6 +115,12 @@ static bool kvm_riscv_vcpu_isa_enable_allowed(unsigned long ext) · 66 unmodified lines
110 case KVM_RISCV_ISA_EXT_SSCOFPMF:115 case KVM_RISCV_ISA_EXT_SSCOFPMF:
111 /* Sscofpmf depends on interrupt filtering defined in ssaia */116 /* Sscofpmf depends on interrupt filtering defined in ssaia */
112 return __riscv_isa_extension_available(NULL, RISCV_ISA_EXT_SSAIA);117 return __riscv_isa_extension_available(NULL, RISCV_ISA_EXT_SSAIA);
118 case KVM_RISCV_ISA_EXT_SVADU:
119 /*
120 * The henvcfg.ADUE is read-only zero if menvcfg.ADUE is zero.
121 * Guest OS can use Svadu only when host OS enable Svadu.
122 */
123 return arch_has_hw_pte_young();
113 case KVM_RISCV_ISA_EXT_V:124 case KVM_RISCV_ISA_EXT_V:
114 return riscv_v_vstate_ctrl_user_allowed();125 return riscv_v_vstate_ctrl_user_allowed();
115 default:126 default:
@@ -127,8 +138,10 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext) · 11 unmodified lines
127 case KVM_RISCV_ISA_EXT_C:138 case KVM_RISCV_ISA_EXT_C:
128 case KVM_RISCV_ISA_EXT_I:139 case KVM_RISCV_ISA_EXT_I:
129 case KVM_RISCV_ISA_EXT_M:140 case KVM_RISCV_ISA_EXT_M:
141 case KVM_RISCV_ISA_EXT_SMNPM:
130 /* There is not architectural config bit to disable sscofpmf completely */142 /* There is not architectural config bit to disable sscofpmf completely */
131 case KVM_RISCV_ISA_EXT_SSCOFPMF:143 case KVM_RISCV_ISA_EXT_SSCOFPMF:
144 case KVM_RISCV_ISA_EXT_SSNPM:
132 case KVM_RISCV_ISA_EXT_SSTC:145 case KVM_RISCV_ISA_EXT_SSTC:
133 case KVM_RISCV_ISA_EXT_SVINVAL:146 case KVM_RISCV_ISA_EXT_SVINVAL:
134 case KVM_RISCV_ISA_EXT_SVNAPOT:147 case KVM_RISCV_ISA_EXT_SVNAPOT:
@@ -181,6 +194,12 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext) · 46 unmodified lines
181 /* Extensions which can be disabled using Smstateen */194 /* Extensions which can be disabled using Smstateen */
182 case KVM_RISCV_ISA_EXT_SSAIA:195 case KVM_RISCV_ISA_EXT_SSAIA:
183 return riscv_has_extension_unlikely(RISCV_ISA_EXT_SMSTATEEN);196 return riscv_has_extension_unlikely(RISCV_ISA_EXT_SMSTATEEN);
197 case KVM_RISCV_ISA_EXT_SVADE:
198 /*
199 * The henvcfg.ADUE is read-only zero if menvcfg.ADUE is zero.
200 * Svade is not allowed to disable when the platform use Svade.
201 */
202 return arch_has_hw_pte_young();
184 default:203 default:
185 break;204 break;
186 }205 }
arch/s390/Kconfig+2−0
@@ -87,6 +87,7 @@ config S390 · 86 unmodified lines
87 select ARCH_HAS_MEMBARRIER_SYNC_CORE87 select ARCH_HAS_MEMBARRIER_SYNC_CORE
88 select ARCH_HAS_MEM_ENCRYPT88 select ARCH_HAS_MEM_ENCRYPT
89 select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS89 select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS
90 select ARCH_HAS_PREEMPT_LAZY
90 select ARCH_HAS_PTE_SPECIAL91 select ARCH_HAS_PTE_SPECIAL
91 select ARCH_HAS_SCALED_CPUTIME92 select ARCH_HAS_SCALED_CPUTIME
92 select ARCH_HAS_SET_DIRECT_MAP93 select ARCH_HAS_SET_DIRECT_MAP
@@ -218,6 +219,7 @@ config S390 · 125 unmodified lines
218 select HAVE_PERF_EVENTS219 select HAVE_PERF_EVENTS
219 select HAVE_PERF_REGS220 select HAVE_PERF_REGS
220 select HAVE_PERF_USER_STACK_DUMP221 select HAVE_PERF_USER_STACK_DUMP
222 select HAVE_PREEMPT_DYNAMIC_KEY
221 select HAVE_REGS_AND_STACK_ACCESS_API223 select HAVE_REGS_AND_STACK_ACCESS_API
222 select HAVE_RELIABLE_STACKTRACE224 select HAVE_RELIABLE_STACKTRACE
223 select HAVE_RETHOOK225 select HAVE_RETHOOK
arch/s390/crypto/aes_s390.c+1−1
@@ -1168,4 +1168,4 @@ MODULE_ALIAS_CRYPTO("aes-all"); · 1167 unmodified lines
1168 1168
1169MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm");1169MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm");
1170MODULE_LICENSE("GPL");1170MODULE_LICENSE("GPL");
1171MODULE_IMPORT_NS(CRYPTO_INTERNAL);1171MODULE_IMPORT_NS("CRYPTO_INTERNAL");
arch/s390/include/asm/debug.h+5−3
@@ -66,14 +66,15 @@ typedef int (debug_header_proc_t) (debug_info_t *id, · 65 unmodified lines
66 struct debug_view *view,66 struct debug_view *view,
67 int area,67 int area,
68 debug_entry_t *entry,68 debug_entry_t *entry,
69 char *out_buf);69 char *out_buf, size_t out_buf_size);
70 70
71typedef int (debug_format_proc_t) (debug_info_t *id,71typedef int (debug_format_proc_t) (debug_info_t *id,
72 struct debug_view *view, char *out_buf,72 struct debug_view *view, char *out_buf,
73 size_t out_buf_size,
73 const char *in_buf);74 const char *in_buf);
74typedef int (debug_prolog_proc_t) (debug_info_t *id,75typedef int (debug_prolog_proc_t) (debug_info_t *id,
75 struct debug_view *view,76 struct debug_view *view,
76 char *out_buf);77 char *out_buf, size_t out_buf_size);
77typedef int (debug_input_proc_t) (debug_info_t *id,78typedef int (debug_input_proc_t) (debug_info_t *id,
78 struct debug_view *view,79 struct debug_view *view,
79 struct file *file,80 struct file *file,
@@ -81,7 +82,8 @@ typedef int (debug_input_proc_t) (debug_info_t *id, · 1 unmodified line
81 size_t in_buf_size, loff_t *offset);82 size_t in_buf_size, loff_t *offset);
82 83
83int debug_dflt_header_fn(debug_info_t *id, struct debug_view *view,84int debug_dflt_header_fn(debug_info_t *id, struct debug_view *view,
84 int area, debug_entry_t *entry, char *out_buf);85 int area, debug_entry_t *entry,
86 char *out_buf, size_t out_buf_size);
85 87
86struct debug_view {88struct debug_view {
87 char name[DEBUG_MAX_NAME_LEN];89 char name[DEBUG_MAX_NAME_LEN];
arch/s390/include/asm/gmap.h+2−2
@@ -17,8 +17,8 @@ · 16 unmodified lines
17#define GMAP_NOTIFY_MPROT 0x117#define GMAP_NOTIFY_MPROT 0x1
18 18
19/* Status bits only for huge segment entries */19/* Status bits only for huge segment entries */
20#define _SEGMENT_ENTRY_GMAP_IN 0x8000 /* invalidation notify bit */20#define _SEGMENT_ENTRY_GMAP_IN 0x0800 /* invalidation notify bit */
21#define _SEGMENT_ENTRY_GMAP_UC 0x4000 /* dirty (migration) */21#define _SEGMENT_ENTRY_GMAP_UC 0x0002 /* dirty (migration) */
22 22
23/**23/**
24 * struct gmap_struct - guest address space24 * struct gmap_struct - guest address space
arch/s390/include/asm/hugetlb.h+3−1
@@ -10,6 +10,8 @@ · 9 unmodified lines
10#define _ASM_S390_HUGETLB_H10#define _ASM_S390_HUGETLB_H
11 11
12#include <linux/pgtable.h>12#include <linux/pgtable.h>
13#include <linux/swap.h>
14#include <linux/swapops.h>
13#include <asm/page.h>15#include <asm/page.h>
14 16
15#define hugepages_supported() (MACHINE_HAS_EDAT1)17#define hugepages_supported() (MACHINE_HAS_EDAT1)
@@ -78,7 +80,7 @@ static inline int huge_pte_none(pte_t pte) · 62 unmodified lines
78#define __HAVE_ARCH_HUGE_PTE_NONE_MOSTLY80#define __HAVE_ARCH_HUGE_PTE_NONE_MOSTLY
79static inline int huge_pte_none_mostly(pte_t pte)81static inline int huge_pte_none_mostly(pte_t pte)
80{82{
81 return huge_pte_none(pte);83 return huge_pte_none(pte) || is_pte_marker(pte);
82}84}
83 85
84#define __HAVE_ARCH_HUGE_PTE_MKUFFD_WP86#define __HAVE_ARCH_HUGE_PTE_MKUFFD_WP
arch/s390/include/asm/kvm_host.h+10−5
@@ -94,11 +94,16 @@ union ipte_control { · 93 unmodified lines
94 };94 };
95};95};
96 96
97/*
98 * Utility is defined as two bytes but having it four bytes wide
99 * generates more efficient code. Since the following bytes are
100 * reserved this makes no functional difference.
101 */
97union sca_utility {102union sca_utility {
98 __u16 val;103 __u32 val;
99 struct {104 struct {
100 __u16 mtcr : 1;105 __u32 mtcr : 1;
101 __u16 reserved : 15;106 __u32 : 31;
102 };107 };
103};108};
104 109
@@ -107,7 +112,7 @@ struct bsca_block { · 2 unmodified lines
107 __u64 reserved[5];112 __u64 reserved[5];
108 __u64 mcn;113 __u64 mcn;
109 union sca_utility utility;114 union sca_utility utility;
110 __u8 reserved2[6];115 __u8 reserved2[4];
111 struct bsca_entry cpu[KVM_S390_BSCA_CPU_SLOTS];116 struct bsca_entry cpu[KVM_S390_BSCA_CPU_SLOTS];
112};117};
113 118
@@ -115,7 +120,7 @@ struct esca_block { · 1 unmodified line
115 union ipte_control ipte_control;120 union ipte_control ipte_control;
116 __u64 reserved1[6];121 __u64 reserved1[6];
117 union sca_utility utility;122 union sca_utility utility;
118 __u8 reserved2[6];123 __u8 reserved2[4];
119 __u64 mcn[4];124 __u64 mcn[4];
120 __u64 reserved3[20];125 __u64 reserved3[20];
121 struct esca_entry cpu[KVM_S390_ESCA_CPU_SLOTS];126 struct esca_entry cpu[KVM_S390_ESCA_CPU_SLOTS];
arch/s390/include/asm/pgtable.h+95−22
@@ -277,7 +277,8 @@ static inline int is_module_addr(void *addr) · 276 unmodified lines
277#define _REGION1_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_INVALID)277#define _REGION1_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_INVALID)
278#define _REGION2_ENTRY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_LENGTH)278#define _REGION2_ENTRY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_LENGTH)
279#define _REGION2_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_INVALID)279#define _REGION2_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_INVALID)
280#define _REGION3_ENTRY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_LENGTH)280#define _REGION3_ENTRY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_LENGTH | \
281 _REGION3_ENTRY_PRESENT)
281#define _REGION3_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_INVALID)282#define _REGION3_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_INVALID)
282 283
283#define _REGION3_ENTRY_HARDWARE_BITS 0xfffffffffffff6ffUL284#define _REGION3_ENTRY_HARDWARE_BITS 0xfffffffffffff6ffUL
@@ -285,18 +286,27 @@ static inline int is_module_addr(void *addr) · 1 unmodified line
285#define _REGION3_ENTRY_ORIGIN_LARGE ~0x7fffffffUL /* large page address */286#define _REGION3_ENTRY_ORIGIN_LARGE ~0x7fffffffUL /* large page address */
286#define _REGION3_ENTRY_DIRTY 0x2000 /* SW region dirty bit */287#define _REGION3_ENTRY_DIRTY 0x2000 /* SW region dirty bit */
287#define _REGION3_ENTRY_YOUNG 0x1000 /* SW region young bit */288#define _REGION3_ENTRY_YOUNG 0x1000 /* SW region young bit */
289#define _REGION3_ENTRY_COMM 0x0010 /* Common-Region, marks swap entry */
288#define _REGION3_ENTRY_LARGE 0x0400 /* RTTE-format control, large page */290#define _REGION3_ENTRY_LARGE 0x0400 /* RTTE-format control, large page */
289#define _REGION3_ENTRY_WRITE 0x0002 /* SW region write bit */291#define _REGION3_ENTRY_WRITE 0x8000 /* SW region write bit */
290#define _REGION3_ENTRY_READ 0x0001 /* SW region read bit */292#define _REGION3_ENTRY_READ 0x4000 /* SW region read bit */
291 293
292#ifdef CONFIG_MEM_SOFT_DIRTY294#ifdef CONFIG_MEM_SOFT_DIRTY
293#define _REGION3_ENTRY_SOFT_DIRTY 0x4000 /* SW region soft dirty bit */295#define _REGION3_ENTRY_SOFT_DIRTY 0x0002 /* SW region soft dirty bit */
294#else296#else
295#define _REGION3_ENTRY_SOFT_DIRTY 0x0000 /* SW region soft dirty bit */297#define _REGION3_ENTRY_SOFT_DIRTY 0x0000 /* SW region soft dirty bit */
296#endif298#endif
297 299
298#define _REGION_ENTRY_BITS 0xfffffffffffff22fUL300#define _REGION_ENTRY_BITS 0xfffffffffffff22fUL
299 301
302/*
303 * SW region present bit. For non-leaf region-third-table entries, bits 62-63
304 * indicate the TABLE LENGTH and both must be set to 1. But such entries
305 * would always be considered as present, so it is safe to use bit 63 as
306 * PRESENT bit for PUD.
307 */
308#define _REGION3_ENTRY_PRESENT 0x0001
309
300/* Bits in the segment table entry */310/* Bits in the segment table entry */
301#define _SEGMENT_ENTRY_BITS 0xfffffffffffffe3fUL311#define _SEGMENT_ENTRY_BITS 0xfffffffffffffe3fUL
302#define _SEGMENT_ENTRY_HARDWARE_BITS 0xfffffffffffffe3cUL312#define _SEGMENT_ENTRY_HARDWARE_BITS 0xfffffffffffffe3cUL
@@ -308,21 +318,29 @@ static inline int is_module_addr(void *addr) · 5 unmodified lines
308#define _SEGMENT_ENTRY_INVALID 0x20 /* invalid segment table entry */318#define _SEGMENT_ENTRY_INVALID 0x20 /* invalid segment table entry */
309#define _SEGMENT_ENTRY_TYPE_MASK 0x0c /* segment table type mask */319#define _SEGMENT_ENTRY_TYPE_MASK 0x0c /* segment table type mask */
310 320
311#define _SEGMENT_ENTRY (0)321#define _SEGMENT_ENTRY (_SEGMENT_ENTRY_PRESENT)
312#define _SEGMENT_ENTRY_EMPTY (_SEGMENT_ENTRY_INVALID)322#define _SEGMENT_ENTRY_EMPTY (_SEGMENT_ENTRY_INVALID)
313 323
314#define _SEGMENT_ENTRY_DIRTY 0x2000 /* SW segment dirty bit */324#define _SEGMENT_ENTRY_DIRTY 0x2000 /* SW segment dirty bit */
315#define _SEGMENT_ENTRY_YOUNG 0x1000 /* SW segment young bit */325#define _SEGMENT_ENTRY_YOUNG 0x1000 /* SW segment young bit */
326
327#define _SEGMENT_ENTRY_COMM 0x0010 /* Common-Segment, marks swap entry */
316#define _SEGMENT_ENTRY_LARGE 0x0400 /* STE-format control, large page */328#define _SEGMENT_ENTRY_LARGE 0x0400 /* STE-format control, large page */
317#define _SEGMENT_ENTRY_WRITE 0x0002 /* SW segment write bit */329#define _SEGMENT_ENTRY_WRITE 0x8000 /* SW segment write bit */
318#define _SEGMENT_ENTRY_READ 0x0001 /* SW segment read bit */330#define _SEGMENT_ENTRY_READ 0x4000 /* SW segment read bit */
319 331
320#ifdef CONFIG_MEM_SOFT_DIRTY332#ifdef CONFIG_MEM_SOFT_DIRTY
321#define _SEGMENT_ENTRY_SOFT_DIRTY 0x4000 /* SW segment soft dirty bit */333#define _SEGMENT_ENTRY_SOFT_DIRTY 0x0002 /* SW segment soft dirty bit */
322#else334#else
323#define _SEGMENT_ENTRY_SOFT_DIRTY 0x0000 /* SW segment soft dirty bit */335#define _SEGMENT_ENTRY_SOFT_DIRTY 0x0000 /* SW segment soft dirty bit */
324#endif336#endif
325 337
338#define _SEGMENT_ENTRY_PRESENT 0x0001 /* SW segment present bit */
339
340/* Common bits in region and segment table entries, for swap entries */
341#define _RST_ENTRY_COMM 0x0010 /* Common-Region/Segment, marks swap entry */
342#define _RST_ENTRY_INVALID 0x0020 /* invalid region/segment table entry */
343
326#define _CRST_ENTRIES 2048 /* number of region/segment table entries */344#define _CRST_ENTRIES 2048 /* number of region/segment table entries */
327#define _PAGE_ENTRIES 256 /* number of page table entries */345#define _PAGE_ENTRIES 256 /* number of page table entries */
328 346
@@ -454,17 +472,22 @@ static inline int is_module_addr(void *addr) · 125 unmodified lines
454/*472/*
455 * Segment entry (large page) protection definitions.473 * Segment entry (large page) protection definitions.
456 */474 */
457#define SEGMENT_NONE __pgprot(_SEGMENT_ENTRY_INVALID | \475#define SEGMENT_NONE __pgprot(_SEGMENT_ENTRY_PRESENT | \
476 _SEGMENT_ENTRY_INVALID | \
458 _SEGMENT_ENTRY_PROTECT)477 _SEGMENT_ENTRY_PROTECT)
459#define SEGMENT_RO __pgprot(_SEGMENT_ENTRY_PROTECT | \478#define SEGMENT_RO __pgprot(_SEGMENT_ENTRY_PRESENT | \
479 _SEGMENT_ENTRY_PROTECT | \
460 _SEGMENT_ENTRY_READ | \480 _SEGMENT_ENTRY_READ | \
461 _SEGMENT_ENTRY_NOEXEC)481 _SEGMENT_ENTRY_NOEXEC)
462#define SEGMENT_RX __pgprot(_SEGMENT_ENTRY_PROTECT | \482#define SEGMENT_RX __pgprot(_SEGMENT_ENTRY_PRESENT | \
483 _SEGMENT_ENTRY_PROTECT | \
463 _SEGMENT_ENTRY_READ)484 _SEGMENT_ENTRY_READ)
464#define SEGMENT_RW __pgprot(_SEGMENT_ENTRY_READ | \485#define SEGMENT_RW __pgprot(_SEGMENT_ENTRY_PRESENT | \
486 _SEGMENT_ENTRY_READ | \
465 _SEGMENT_ENTRY_WRITE | \487 _SEGMENT_ENTRY_WRITE | \
466 _SEGMENT_ENTRY_NOEXEC)488 _SEGMENT_ENTRY_NOEXEC)
467#define SEGMENT_RWX __pgprot(_SEGMENT_ENTRY_READ | \489#define SEGMENT_RWX __pgprot(_SEGMENT_ENTRY_PRESENT | \
490 _SEGMENT_ENTRY_READ | \
468 _SEGMENT_ENTRY_WRITE)491 _SEGMENT_ENTRY_WRITE)
469#define SEGMENT_KERNEL __pgprot(_SEGMENT_ENTRY | \492#define SEGMENT_KERNEL __pgprot(_SEGMENT_ENTRY | \
470 _SEGMENT_ENTRY_LARGE | \493 _SEGMENT_ENTRY_LARGE | \
@@ -491,6 +514,7 @@ static inline int is_module_addr(void *addr) · 20 unmodified lines
491 */514 */
492 515
493#define REGION3_KERNEL __pgprot(_REGION_ENTRY_TYPE_R3 | \516#define REGION3_KERNEL __pgprot(_REGION_ENTRY_TYPE_R3 | \
517 _REGION3_ENTRY_PRESENT | \
494 _REGION3_ENTRY_LARGE | \518 _REGION3_ENTRY_LARGE | \
495 _REGION3_ENTRY_READ | \519 _REGION3_ENTRY_READ | \
496 _REGION3_ENTRY_WRITE | \520 _REGION3_ENTRY_WRITE | \
@@ -498,12 +522,14 @@ static inline int is_module_addr(void *addr) · 1 unmodified line
498 _REGION3_ENTRY_DIRTY | \522 _REGION3_ENTRY_DIRTY | \
499 _REGION_ENTRY_NOEXEC)523 _REGION_ENTRY_NOEXEC)
500#define REGION3_KERNEL_RO __pgprot(_REGION_ENTRY_TYPE_R3 | \524#define REGION3_KERNEL_RO __pgprot(_REGION_ENTRY_TYPE_R3 | \
525 _REGION3_ENTRY_PRESENT | \
501 _REGION3_ENTRY_LARGE | \526 _REGION3_ENTRY_LARGE | \
502 _REGION3_ENTRY_READ | \527 _REGION3_ENTRY_READ | \
503 _REGION3_ENTRY_YOUNG | \528 _REGION3_ENTRY_YOUNG | \
504 _REGION_ENTRY_PROTECT | \529 _REGION_ENTRY_PROTECT | \
505 _REGION_ENTRY_NOEXEC)530 _REGION_ENTRY_NOEXEC)
506#define REGION3_KERNEL_EXEC __pgprot(_REGION_ENTRY_TYPE_R3 | \531#define REGION3_KERNEL_EXEC __pgprot(_REGION_ENTRY_TYPE_R3 | \
532 _REGION3_ENTRY_PRESENT | \
507 _REGION3_ENTRY_LARGE | \533 _REGION3_ENTRY_LARGE | \
508 _REGION3_ENTRY_READ | \534 _REGION3_ENTRY_READ | \
509 _REGION3_ENTRY_WRITE | \535 _REGION3_ENTRY_WRITE | \
@@ -746,7 +772,7 @@ static inline int pud_present(pud_t pud) · 236 unmodified lines
746{772{
747 if (pud_folded(pud))773 if (pud_folded(pud))
748 return 1;774 return 1;
749 return (pud_val(pud) & _REGION_ENTRY_ORIGIN) != 0UL;775 return (pud_val(pud) & _REGION3_ENTRY_PRESENT) != 0;
750}776}
751 777
752static inline int pud_none(pud_t pud)778static inline int pud_none(pud_t pud)
@@ -761,13 +787,18 @@ static inline bool pud_leaf(pud_t pud) · 8 unmodified lines
761{787{
762 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) != _REGION_ENTRY_TYPE_R3)788 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) != _REGION_ENTRY_TYPE_R3)
763 return 0;789 return 0;
764 return !!(pud_val(pud) & _REGION3_ENTRY_LARGE);790 return (pud_present(pud) && (pud_val(pud) & _REGION3_ENTRY_LARGE) != 0);
791}
792
793static inline int pmd_present(pmd_t pmd)
794{
795 return (pmd_val(pmd) & _SEGMENT_ENTRY_PRESENT) != 0;
765}796}
766 797
767#define pmd_leaf pmd_leaf798#define pmd_leaf pmd_leaf
768static inline bool pmd_leaf(pmd_t pmd)799static inline bool pmd_leaf(pmd_t pmd)
769{800{
770 return (pmd_val(pmd) & _SEGMENT_ENTRY_LARGE) != 0;801 return (pmd_present(pmd) && (pmd_val(pmd) & _SEGMENT_ENTRY_LARGE) != 0);
771}802}
772 803
773static inline int pmd_bad(pmd_t pmd)804static inline int pmd_bad(pmd_t pmd)
@@ -799,11 +830,6 @@ static inline int p4d_bad(p4d_t p4d) · 25 unmodified lines
799 return (p4d_val(p4d) & ~_REGION_ENTRY_BITS) != 0;830 return (p4d_val(p4d) & ~_REGION_ENTRY_BITS) != 0;
800}831}
801 832
802static inline int pmd_present(pmd_t pmd)
803{
804 return pmd_val(pmd) != _SEGMENT_ENTRY_EMPTY;
805}
806
807static inline int pmd_none(pmd_t pmd)833static inline int pmd_none(pmd_t pmd)
808{834{
809 return pmd_val(pmd) == _SEGMENT_ENTRY_EMPTY;835 return pmd_val(pmd) == _SEGMENT_ENTRY_EMPTY;
@@ -1851,7 +1877,7 @@ static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma, · 1041 unmodified lines
1851 1877
1852static inline int pmd_trans_huge(pmd_t pmd)1878static inline int pmd_trans_huge(pmd_t pmd)
1853{1879{
1854 return pmd_val(pmd) & _SEGMENT_ENTRY_LARGE;1880 return pmd_leaf(pmd);
1855}1881}
1856 1882
1857#define has_transparent_hugepage has_transparent_hugepage1883#define has_transparent_hugepage has_transparent_hugepage
@@ -1911,6 +1937,53 @@ static inline swp_entry_t __swp_entry(unsigned long type, unsigned long offset) · 53 unmodified lines
1911#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })1937#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
1912#define __swp_entry_to_pte(x) ((pte_t) { (x).val })1938#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
1913 1939
1940/*
1941 * 64 bit swap entry format for REGION3 and SEGMENT table entries (RSTE)
1942 * Bits 59 and 63 are used to indicate the swap entry. Bit 58 marks the rste
1943 * as invalid.
1944 * A swap entry is indicated by bit pattern (rste & 0x011) == 0x010
1945 * | offset |Xtype |11TT|S0|
1946 * |0000000000111111111122222222223333333333444444444455|555555|5566|66|
1947 * |0123456789012345678901234567890123456789012345678901|234567|8901|23|
1948 *
1949 * Bits 0-51 store the offset.
1950 * Bits 53-57 store the type.
1951 * Bit 62 (S) is used for softdirty tracking.
1952 * Bits 60-61 (TT) indicate the table type: 0x01 for REGION3 and 0x00 for SEGMENT.
1953 * Bit 52 (X) is unused.
1954 */
1955
1956#define __SWP_OFFSET_MASK_RSTE ((1UL << 52) - 1)
1957#define __SWP_OFFSET_SHIFT_RSTE 12
1958#define __SWP_TYPE_MASK_RSTE ((1UL << 5) - 1)
1959#define __SWP_TYPE_SHIFT_RSTE 6
1960
1961/*
1962 * TT bits set to 0x00 == SEGMENT. For REGION3 entries, caller must add R3
1963 * bits 0x01. See also __set_huge_pte_at().
1964 */
1965static inline unsigned long mk_swap_rste(unsigned long type, unsigned long offset)
1966{
1967 unsigned long rste;
1968
1969 rste = _RST_ENTRY_INVALID | _RST_ENTRY_COMM;
1970 rste |= (offset & __SWP_OFFSET_MASK_RSTE) << __SWP_OFFSET_SHIFT_RSTE;
1971 rste |= (type & __SWP_TYPE_MASK_RSTE) << __SWP_TYPE_SHIFT_RSTE;
1972 return rste;
1973}
1974
1975static inline unsigned long __swp_type_rste(swp_entry_t entry)
1976{
1977 return (entry.val >> __SWP_TYPE_SHIFT_RSTE) & __SWP_TYPE_MASK_RSTE;
1978}
1979
1980static inline unsigned long __swp_offset_rste(swp_entry_t entry)
1981{
1982 return (entry.val >> __SWP_OFFSET_SHIFT_RSTE) & __SWP_OFFSET_MASK_RSTE;
1983}
1984
1985#define __rste_to_swp_entry(rste) ((swp_entry_t) { rste })
1986
1914extern int vmem_add_mapping(unsigned long start, unsigned long size);1987extern int vmem_add_mapping(unsigned long start, unsigned long size);
1915extern void vmem_remove_mapping(unsigned long start, unsigned long size);1988extern void vmem_remove_mapping(unsigned long start, unsigned long size);
1916extern int __vmem_map_4k_page(unsigned long addr, unsigned long phys, pgprot_t prot, bool alloc);1989extern int __vmem_map_4k_page(unsigned long addr, unsigned long phys, pgprot_t prot, bool alloc);
arch/s390/include/asm/preempt.h+18−4
@@ -130,10 +130,24 @@ static __always_inline bool should_resched(int preempt_offset) · 129 unmodified lines
130#define init_idle_preempt_count(p, cpu) do { } while (0)130#define init_idle_preempt_count(p, cpu) do { } while (0)
131 131
132#ifdef CONFIG_PREEMPTION132#ifdef CONFIG_PREEMPTION
133extern void preempt_schedule(void);133
134#define __preempt_schedule() preempt_schedule()134void preempt_schedule(void);
135extern void preempt_schedule_notrace(void);135void preempt_schedule_notrace(void);
136#define __preempt_schedule_notrace() preempt_schedule_notrace()136
137#ifdef CONFIG_PREEMPT_DYNAMIC
138
139void dynamic_preempt_schedule(void);
140void dynamic_preempt_schedule_notrace(void);
141#define __preempt_schedule() dynamic_preempt_schedule()
142#define __preempt_schedule_notrace() dynamic_preempt_schedule_notrace()
143
144#else /* CONFIG_PREEMPT_DYNAMIC */
145
146#define __preempt_schedule() preempt_schedule()
147#define __preempt_schedule_notrace() preempt_schedule_notrace()
148
149#endif /* CONFIG_PREEMPT_DYNAMIC */
150
137#endif /* CONFIG_PREEMPTION */151#endif /* CONFIG_PREEMPTION */
138 152
139#endif /* __ASM_PREEMPT_H */153#endif /* __ASM_PREEMPT_H */
arch/s390/include/asm/spinlock.h+4−3
@@ -82,9 +82,10 @@ static inline void arch_spin_unlock(arch_spinlock_t *lp) · 81 unmodified lines
82 kcsan_release();82 kcsan_release();
83 asm_inline volatile(83 asm_inline volatile(
84 ALTERNATIVE("nop", ".insn rre,0xb2fa0000,7,0", ALT_FACILITY(49)) /* NIAI 7 */84 ALTERNATIVE("nop", ".insn rre,0xb2fa0000,7,0", ALT_FACILITY(49)) /* NIAI 7 */
85 " sth %1,%0\n"85 " mvhhi %[lock],0\n"
86 : "=R" (((unsigned short *) &lp->lock)[1])86 : [lock] "=Q" (((unsigned short *)&lp->lock)[1])
87 : "d" (0) : "cc", "memory");87 :
88 : "memory");
88}89}
89 90
90/*91/*
arch/s390/include/asm/spinlock_types.h+1−1
@@ -3,7 +3,7 @@ · 2 unmodified lines
3#define __ASM_SPINLOCK_TYPES_H3#define __ASM_SPINLOCK_TYPES_H
4 4
5#ifndef __LINUX_SPINLOCK_TYPES_RAW_H5#ifndef __LINUX_SPINLOCK_TYPES_RAW_H
6# error "please don't include this file directly"6# error "Please do not include this file directly."
7#endif7#endif
8 8
9typedef struct {9typedef struct {
arch/s390/include/asm/thread_info.h+11−10
@@ -61,44 +61,45 @@ void arch_setup_new_exec(void); · 60 unmodified lines
61/*61/*
62 * thread information flags bit numbers62 * thread information flags bit numbers
63 */63 */
64/* _TIF_WORK bits */
65#define TIF_NOTIFY_RESUME 0 /* callback before returning to user */64#define TIF_NOTIFY_RESUME 0 /* callback before returning to user */
66#define TIF_SIGPENDING 1 /* signal pending */65#define TIF_SIGPENDING 1 /* signal pending */
67#define TIF_NEED_RESCHED 2 /* rescheduling necessary */66#define TIF_NEED_RESCHED 2 /* rescheduling necessary */
68#define TIF_UPROBE 3 /* breakpointed or single-stepping */67#define TIF_NEED_RESCHED_LAZY 3 /* lazy rescheduling needed */
69#define TIF_GUARDED_STORAGE 4 /* load guarded storage control block */68#define TIF_UPROBE 4 /* breakpointed or single-stepping */
70#define TIF_PATCH_PENDING 5 /* pending live patching update */69#define TIF_PATCH_PENDING 5 /* pending live patching update */
71#define TIF_PGSTE 6 /* New mm's will use 4K page tables */70#define TIF_PGSTE 6 /* New mm's will use 4K page tables */
72#define TIF_NOTIFY_SIGNAL 7 /* signal notifications exist */71#define TIF_NOTIFY_SIGNAL 7 /* signal notifications exist */
72#define TIF_GUARDED_STORAGE 8 /* load guarded storage control block */
73#define TIF_ISOLATE_BP_GUEST 9 /* Run KVM guests with isolated BP */73#define TIF_ISOLATE_BP_GUEST 9 /* Run KVM guests with isolated BP */
74#define TIF_PER_TRAP 10 /* Need to handle PER trap on exit to usermode */74#define TIF_PER_TRAP 10 /* Need to handle PER trap on exit to usermode */
75
76#define TIF_31BIT 16 /* 32bit process */75#define TIF_31BIT 16 /* 32bit process */
77#define TIF_MEMDIE 17 /* is terminating due to OOM killer */76#define TIF_MEMDIE 17 /* is terminating due to OOM killer */
78#define TIF_RESTORE_SIGMASK 18 /* restore signal mask in do_signal() */77#define TIF_RESTORE_SIGMASK 18 /* restore signal mask in do_signal() */
79#define TIF_SINGLE_STEP 19 /* This task is single stepped */78#define TIF_SINGLE_STEP 19 /* This task is single stepped */
80#define TIF_BLOCK_STEP 20 /* This task is block stepped */79#define TIF_BLOCK_STEP 20 /* This task is block stepped */
81#define TIF_UPROBE_SINGLESTEP 21 /* This task is uprobe single stepped */80#define TIF_UPROBE_SINGLESTEP 21 /* This task is uprobe single stepped */
82
83/* _TIF_TRACE bits */
84#define TIF_SYSCALL_TRACE 24 /* syscall trace active */81#define TIF_SYSCALL_TRACE 24 /* syscall trace active */
85#define TIF_SYSCALL_AUDIT 25 /* syscall auditing active */82#define TIF_SYSCALL_AUDIT 25 /* syscall auditing active */
86#define TIF_SECCOMP 26 /* secure computing */83#define TIF_SECCOMP 26 /* secure computing */
87#define TIF_SYSCALL_TRACEPOINT 27 /* syscall tracepoint instrumentation */84#define TIF_SYSCALL_TRACEPOINT 27 /* syscall tracepoint instrumentation */
88 85
89#define _TIF_NOTIFY_RESUME BIT(TIF_NOTIFY_RESUME)86#define _TIF_NOTIFY_RESUME BIT(TIF_NOTIFY_RESUME)
90#define _TIF_NOTIFY_SIGNAL BIT(TIF_NOTIFY_SIGNAL)
91#define _TIF_SIGPENDING BIT(TIF_SIGPENDING)87#define _TIF_SIGPENDING BIT(TIF_SIGPENDING)
92#define _TIF_NEED_RESCHED BIT(TIF_NEED_RESCHED)88#define _TIF_NEED_RESCHED BIT(TIF_NEED_RESCHED)
89#define _TIF_NEED_RESCHED_LAZY BIT(TIF_NEED_RESCHED_LAZY)
93#define _TIF_UPROBE BIT(TIF_UPROBE)90#define _TIF_UPROBE BIT(TIF_UPROBE)
94#define _TIF_GUARDED_STORAGE BIT(TIF_GUARDED_STORAGE)
95#define _TIF_PATCH_PENDING BIT(TIF_PATCH_PENDING)91#define _TIF_PATCH_PENDING BIT(TIF_PATCH_PENDING)
92#define _TIF_PGSTE BIT(TIF_PGSTE)
93#define _TIF_NOTIFY_SIGNAL BIT(TIF_NOTIFY_SIGNAL)
94#define _TIF_GUARDED_STORAGE BIT(TIF_GUARDED_STORAGE)
96#define _TIF_ISOLATE_BP_GUEST BIT(TIF_ISOLATE_BP_GUEST)95#define _TIF_ISOLATE_BP_GUEST BIT(TIF_ISOLATE_BP_GUEST)
97#define _TIF_PER_TRAP BIT(TIF_PER_TRAP)96#define _TIF_PER_TRAP BIT(TIF_PER_TRAP)
98
99#define _TIF_31BIT BIT(TIF_31BIT)97#define _TIF_31BIT BIT(TIF_31BIT)
98#define _TIF_MEMDIE BIT(TIF_MEMDIE)
99#define _TIF_RESTORE_SIGMASK BIT(TIF_RESTORE_SIGMASK)
100#define _TIF_SINGLE_STEP BIT(TIF_SINGLE_STEP)100#define _TIF_SINGLE_STEP BIT(TIF_SINGLE_STEP)
101 101#define _TIF_BLOCK_STEP BIT(TIF_BLOCK_STEP)
102#define _TIF_UPROBE_SINGLESTEP BIT(TIF_UPROBE_SINGLESTEP)
102#define _TIF_SYSCALL_TRACE BIT(TIF_SYSCALL_TRACE)103#define _TIF_SYSCALL_TRACE BIT(TIF_SYSCALL_TRACE)
103#define _TIF_SYSCALL_AUDIT BIT(TIF_SYSCALL_AUDIT)104#define _TIF_SYSCALL_AUDIT BIT(TIF_SYSCALL_AUDIT)
104#define _TIF_SECCOMP BIT(TIF_SECCOMP)105#define _TIF_SECCOMP BIT(TIF_SECCOMP)
arch/s390/include/asm/tlbflush.h+0−5
@@ -46,11 +46,6 @@ static inline void __tlb_flush_mm(struct mm_struct *mm) · 45 unmodified lines
46{46{
47 unsigned long gmap_asce;47 unsigned long gmap_asce;
48 48
49 /*
50 * If the machine has IDTE we prefer to do a per mm flush
51 * on all cpus instead of doing a local flush if the mm
52 * only ran on the local cpu.
53 */
54 preempt_disable();49 preempt_disable();
55 atomic_inc(&mm->context.flush_count);50 atomic_inc(&mm->context.flush_count);
56 /* Reset TLB flush mask */51 /* Reset TLB flush mask */
arch/s390/kernel/debug.c+49−34
@@ -77,12 +77,14 @@ static debug_info_t *debug_info_create(const char *name, int pages_per_area, · 76 unmodified lines
77static void debug_info_get(debug_info_t *);77static void debug_info_get(debug_info_t *);
78static void debug_info_put(debug_info_t *);78static void debug_info_put(debug_info_t *);
79static int debug_prolog_level_fn(debug_info_t *id,79static int debug_prolog_level_fn(debug_info_t *id,
80 struct debug_view *view, char *out_buf);80 struct debug_view *view, char *out_buf,
81 size_t out_buf_size);
81static int debug_input_level_fn(debug_info_t *id, struct debug_view *view,82static int debug_input_level_fn(debug_info_t *id, struct debug_view *view,
82 struct file *file, const char __user *user_buf,83 struct file *file, const char __user *user_buf,
83 size_t user_buf_size, loff_t *offset);84 size_t user_buf_size, loff_t *offset);
84static int debug_prolog_pages_fn(debug_info_t *id,85static int debug_prolog_pages_fn(debug_info_t *id,
85 struct debug_view *view, char *out_buf);86 struct debug_view *view, char *out_buf,
87 size_t out_buf_size);
86static int debug_input_pages_fn(debug_info_t *id, struct debug_view *view,88static int debug_input_pages_fn(debug_info_t *id, struct debug_view *view,
87 struct file *file, const char __user *user_buf,89 struct file *file, const char __user *user_buf,
88 size_t user_buf_size, loff_t *offset);90 size_t user_buf_size, loff_t *offset);
@@ -90,9 +92,11 @@ static int debug_input_flush_fn(debug_info_t *id, struct debug_view *view, · 1 unmodified line
90 struct file *file, const char __user *user_buf,92 struct file *file, const char __user *user_buf,
91 size_t user_buf_size, loff_t *offset);93 size_t user_buf_size, loff_t *offset);
92static int debug_hex_ascii_format_fn(debug_info_t *id, struct debug_view *view,94static int debug_hex_ascii_format_fn(debug_info_t *id, struct debug_view *view,
93 char *out_buf, const char *in_buf);95 char *out_buf, size_t out_buf_size,
96 const char *in_buf);
94static int debug_sprintf_format_fn(debug_info_t *id, struct debug_view *view,97static int debug_sprintf_format_fn(debug_info_t *id, struct debug_view *view,
95 char *out_buf, const char *inbuf);98 char *out_buf, size_t out_buf_size,
99 const char *inbuf);
96static void debug_areas_swap(debug_info_t *a, debug_info_t *b);100static void debug_areas_swap(debug_info_t *a, debug_info_t *b);
97static void debug_events_append(debug_info_t *dest, debug_info_t *src);101static void debug_events_append(debug_info_t *dest, debug_info_t *src);
98 102
@@ -391,8 +395,10 @@ static int debug_format_entry(file_private_info_t *p_info) · 292 unmodified lines
391 395
392 if (p_info->act_entry == DEBUG_PROLOG_ENTRY) {396 if (p_info->act_entry == DEBUG_PROLOG_ENTRY) {
393 /* print prolog */397 /* print prolog */
394 if (view->prolog_proc)398 if (view->prolog_proc) {
395 len += view->prolog_proc(id_snap, view, p_info->temp_buf);399 len += view->prolog_proc(id_snap, view, p_info->temp_buf,
400 sizeof(p_info->temp_buf));
401 }
396 goto out;402 goto out;
397 }403 }
398 if (!id_snap->areas) /* this is true, if we have a prolog only view */404 if (!id_snap->areas) /* this is true, if we have a prolog only view */
@@ -402,12 +408,16 @@ static int debug_format_entry(file_private_info_t *p_info) · 3 unmodified lines
402 408
403 if (act_entry->clock == 0LL)409 if (act_entry->clock == 0LL)
404 goto out; /* empty entry */410 goto out; /* empty entry */
405 if (view->header_proc)411 if (view->header_proc) {
406 len += view->header_proc(id_snap, view, p_info->act_area,412 len += view->header_proc(id_snap, view, p_info->act_area,
407 act_entry, p_info->temp_buf + len);413 act_entry, p_info->temp_buf + len,
408 if (view->format_proc)414 sizeof(p_info->temp_buf) - len);
415 }
416 if (view->format_proc) {
409 len += view->format_proc(id_snap, view, p_info->temp_buf + len,417 len += view->format_proc(id_snap, view, p_info->temp_buf + len,
418 sizeof(p_info->temp_buf) - len,
410 DEBUG_DATA(act_entry));419 DEBUG_DATA(act_entry));
420 }
411out:421out:
412 return len;422 return len;
413}423}
@@ -1292,9 +1302,9 @@ static inline int debug_get_uint(char *buf) · 878 unmodified lines
1292 */1302 */
1293 1303
1294static int debug_prolog_pages_fn(debug_info_t *id, struct debug_view *view,1304static int debug_prolog_pages_fn(debug_info_t *id, struct debug_view *view,
1295 char *out_buf)1305 char *out_buf, size_t out_buf_size)
1296{1306{
1297 return sprintf(out_buf, "%i\n", id->pages_per_area);1307 return scnprintf(out_buf, out_buf_size, "%i\n", id->pages_per_area);
1298}1308}
1299 1309
1300/*1310/*
@@ -1341,14 +1351,14 @@ out: · 40 unmodified lines
1341 * prints out actual debug level1351 * prints out actual debug level
1342 */1352 */
1343static int debug_prolog_level_fn(debug_info_t *id, struct debug_view *view,1353static int debug_prolog_level_fn(debug_info_t *id, struct debug_view *view,
1344 char *out_buf)1354 char *out_buf, size_t out_buf_size)
1345{1355{
1346 int rc = 0;1356 int rc = 0;
1347 1357
1348 if (id->level == DEBUG_OFF_LEVEL)1358 if (id->level == DEBUG_OFF_LEVEL)
1349 rc = sprintf(out_buf, "-\n");1359 rc = scnprintf(out_buf, out_buf_size, "-\n");
1350 else1360 else
1351 rc = sprintf(out_buf, "%i\n", id->level);1361 rc = scnprintf(out_buf, out_buf_size, "%i\n", id->level);
1352 return rc;1362 return rc;
1353}1363}
1354 1364
@@ -1465,22 +1475,24 @@ out: · 110 unmodified lines
1465 * prints debug data in hex/ascii format1475 * prints debug data in hex/ascii format
1466 */1476 */
1467static int debug_hex_ascii_format_fn(debug_info_t *id, struct debug_view *view,1477static int debug_hex_ascii_format_fn(debug_info_t *id, struct debug_view *view,
1468 char *out_buf, const char *in_buf)1478 char *out_buf, size_t out_buf_size, const char *in_buf)
1469{1479{
1470 int i, rc = 0;1480 int i, rc = 0;
1471 1481
1472 for (i = 0; i < id->buf_size; i++)1482 for (i = 0; i < id->buf_size; i++) {
1473 rc += sprintf(out_buf + rc, "%02x ", ((unsigned char *) in_buf)[i]);1483 rc += scnprintf(out_buf + rc, out_buf_size - rc,
1474 rc += sprintf(out_buf + rc, "| ");1484 "%02x ", ((unsigned char *)in_buf)[i]);
1485 }
1486 rc += scnprintf(out_buf + rc, out_buf_size - rc, "| ");
1475 for (i = 0; i < id->buf_size; i++) {1487 for (i = 0; i < id->buf_size; i++) {
1476 unsigned char c = in_buf[i];1488 unsigned char c = in_buf[i];
1477 1489
1478 if (isascii(c) && isprint(c))1490 if (isascii(c) && isprint(c))
1479 rc += sprintf(out_buf + rc, "%c", c);1491 rc += scnprintf(out_buf + rc, out_buf_size - rc, "%c", c);
1480 else1492 else
1481 rc += sprintf(out_buf + rc, ".");1493 rc += scnprintf(out_buf + rc, out_buf_size - rc, ".");
1482 }1494 }
1483 rc += sprintf(out_buf + rc, "\n");1495 rc += scnprintf(out_buf + rc, out_buf_size - rc, "\n");
1484 return rc;1496 return rc;
1485}1497}
1486 1498
@@ -1488,7 +1500,8 @@ static int debug_hex_ascii_format_fn(debug_info_t *id, struct debug_view *view, · 1 unmodified line
1488 * prints header for debug entry1500 * prints header for debug entry
1489 */1501 */
1490int debug_dflt_header_fn(debug_info_t *id, struct debug_view *view,1502int debug_dflt_header_fn(debug_info_t *id, struct debug_view *view,
1491 int area, debug_entry_t *entry, char *out_buf)1503 int area, debug_entry_t *entry, char *out_buf,
1504 size_t out_buf_size)
1492{1505{
1493 unsigned long sec, usec;1506 unsigned long sec, usec;
1494 unsigned long caller;1507 unsigned long caller;
@@ -1505,9 +1518,9 @@ int debug_dflt_header_fn(debug_info_t *id, struct debug_view *view, · 10 unmodified lines
1505 else1518 else
1506 except_str = "-";1519 except_str = "-";
1507 caller = (unsigned long) entry->caller;1520 caller = (unsigned long) entry->caller;
1508 rc += sprintf(out_buf, "%02i %011ld:%06lu %1u %1s %04u %px ",1521 rc += scnprintf(out_buf, out_buf_size, "%02i %011ld:%06lu %1u %1s %04u %px ",
1509 area, sec, usec, level, except_str,1522 area, sec, usec, level, except_str,
1510 entry->cpu, (void *)caller);1523 entry->cpu, (void *)caller);
1511 return rc;1524 return rc;
1512}1525}
1513EXPORT_SYMBOL(debug_dflt_header_fn);1526EXPORT_SYMBOL(debug_dflt_header_fn);
@@ -1520,7 +1533,7 @@ EXPORT_SYMBOL(debug_dflt_header_fn); · 6 unmodified lines
1520#define DEBUG_SPRINTF_MAX_ARGS 101533#define DEBUG_SPRINTF_MAX_ARGS 10
1521 1534
1522static int debug_sprintf_format_fn(debug_info_t *id, struct debug_view *view,1535static int debug_sprintf_format_fn(debug_info_t *id, struct debug_view *view,
1523 char *out_buf, const char *inbuf)1536 char *out_buf, size_t out_buf_size, const char *inbuf)
1524{1537{
1525 debug_sprintf_entry_t *curr_event = (debug_sprintf_entry_t *)inbuf;1538 debug_sprintf_entry_t *curr_event = (debug_sprintf_entry_t *)inbuf;
1526 int num_longs, num_used_args = 0, i, rc = 0;1539 int num_longs, num_used_args = 0, i, rc = 0;
@@ -1533,8 +1546,9 @@ static int debug_sprintf_format_fn(debug_info_t *id, struct debug_view *view, · 6 unmodified lines
1533 goto out; /* bufsize of entry too small */1546 goto out; /* bufsize of entry too small */
1534 if (num_longs == 1) {1547 if (num_longs == 1) {
1535 /* no args, we use only the string */1548 /* no args, we use only the string */
1536 strcpy(out_buf, curr_event->string);1549 rc = strscpy(out_buf, curr_event->string, out_buf_size);
1537 rc = strlen(curr_event->string);1550 if (rc == -E2BIG)
1551 rc = out_buf_size;
1538 goto out;1552 goto out;
1539 }1553 }
1540 1554
@@ -1546,12 +1560,13 @@ static int debug_sprintf_format_fn(debug_info_t *id, struct debug_view *view, · 5 unmodified lines
1546 for (i = 0; i < num_used_args; i++)1560 for (i = 0; i < num_used_args; i++)
1547 index[i] = i;1561 index[i] = i;
1548 1562
1549 rc = sprintf(out_buf, curr_event->string, curr_event->args[index[0]],1563 rc = scnprintf(out_buf, out_buf_size,
1550 curr_event->args[index[1]], curr_event->args[index[2]],1564 curr_event->string, curr_event->args[index[0]],
1551 curr_event->args[index[3]], curr_event->args[index[4]],1565 curr_event->args[index[1]], curr_event->args[index[2]],
1552 curr_event->args[index[5]], curr_event->args[index[6]],1566 curr_event->args[index[3]], curr_event->args[index[4]],
1553 curr_event->args[index[7]], curr_event->args[index[8]],1567 curr_event->args[index[5]], curr_event->args[index[6]],
1554 curr_event->args[index[9]]);1568 curr_event->args[index[7]], curr_event->args[index[8]],
1569 curr_event->args[index[9]]);
1555out:1570out:
1556 return rc;1571 return rc;
1557}1572}
arch/s390/kernel/entry.S+4−0
@@ -430,9 +430,13 @@ SYM_CODE_START(\name) · 429 unmodified lines
430SYM_CODE_END(\name)430SYM_CODE_END(\name)
431.endm431.endm
432 432
433 .section .irqentry.text, "ax"
434
433INT_HANDLER ext_int_handler,__LC_EXT_OLD_PSW,do_ext_irq435INT_HANDLER ext_int_handler,__LC_EXT_OLD_PSW,do_ext_irq
434INT_HANDLER io_int_handler,__LC_IO_OLD_PSW,do_io_irq436INT_HANDLER io_int_handler,__LC_IO_OLD_PSW,do_io_irq
435 437
438 .section .kprobes.text, "ax"
439
436/*440/*
437 * Machine check handler routines441 * Machine check handler routines
438 */442 */
arch/s390/kernel/kprobes.c+6−0
@@ -489,6 +489,12 @@ int __init arch_init_kprobes(void) · 488 unmodified lines
489 return 0;489 return 0;
490}490}
491 491
492int __init arch_populate_kprobe_blacklist(void)
493{
494 return kprobe_add_area_blacklist((unsigned long)__irqentry_text_start,
495 (unsigned long)__irqentry_text_end);
496}
497
492int arch_trampoline_kprobe(struct kprobe *p)498int arch_trampoline_kprobe(struct kprobe *p)
493{499{
494 return 0;500 return 0;
arch/s390/kernel/perf_cpum_sf.c+13−25
@@ -180,39 +180,27 @@ static int sf_buffer_available(struct cpu_hw_sf *cpuhw) · 179 unmodified lines
180 */180 */
181static void free_sampling_buffer(struct sf_buffer *sfb)181static void free_sampling_buffer(struct sf_buffer *sfb)
182{182{
183 unsigned long *sdbt, *curr;183 unsigned long *sdbt, *curr, *head;
184
185 if (!sfb->sdbt)
186 return;
187 184
188 sdbt = sfb->sdbt;185 sdbt = sfb->sdbt;
189 curr = sdbt;186 if (!sdbt)
190 187 return;
188 sfb->sdbt = NULL;
191 /* Free the SDBT after all SDBs are processed... */189 /* Free the SDBT after all SDBs are processed... */
192 while (1) {190 head = sdbt;
193 if (!*curr || !sdbt)191 curr = sdbt;
194 break;192 do {
195
196 /* Process table-link entries */
197 if (is_link_entry(curr)) {193 if (is_link_entry(curr)) {
194 /* Process table-link entries */
198 curr = get_next_sdbt(curr);195 curr = get_next_sdbt(curr);
199 if (sdbt)196 free_page((unsigned long)sdbt);
200 free_page((unsigned long)sdbt);197 sdbt = curr;
201
202 /* If the origin is reached, sampling buffer is freed */
203 if (curr == sfb->sdbt)
204 break;
205 else
206 sdbt = curr;
207 } else {198 } else {
208 /* Process SDB pointer */199 /* Process SDB pointer */
209 if (*curr) {200 free_page((unsigned long)phys_to_virt(*curr));
210 free_page((unsigned long)phys_to_virt(*curr));201 curr++;
211 curr++;
212 }
213 }202 }
214 }203 } while (curr != head);
215
216 memset(sfb, 0, sizeof(*sfb));204 memset(sfb, 0, sizeof(*sfb));
217}205}
218 206
arch/s390/kernel/stacktrace.c+1−1
@@ -151,7 +151,7 @@ void arch_stack_walk_user_common(stack_trace_consume_fn consume_entry, void *coo · 150 unmodified lines
151 break;151 break;
152 }152 }
153 if (!store_ip(consume_entry, cookie, entry, perf, ip))153 if (!store_ip(consume_entry, cookie, entry, perf, ip))
154 return;154 break;
155 first = false;155 first = false;
156 }156 }
157 pagefault_enable();157 pagefault_enable();
arch/s390/kvm/gaccess.c+8−8
@@ -129,8 +129,8 @@ static void ipte_lock_simple(struct kvm *kvm) · 128 unmodified lines
129retry:129retry:
130 read_lock(&kvm->arch.sca_lock);130 read_lock(&kvm->arch.sca_lock);
131 ic = kvm_s390_get_ipte_control(kvm);131 ic = kvm_s390_get_ipte_control(kvm);
132 old = READ_ONCE(*ic);
132 do {133 do {
133 old = READ_ONCE(*ic);
134 if (old.k) {134 if (old.k) {
135 read_unlock(&kvm->arch.sca_lock);135 read_unlock(&kvm->arch.sca_lock);
136 cond_resched();136 cond_resched();
@@ -138,7 +138,7 @@ retry: · 1 unmodified line
138 }138 }
139 new = old;139 new = old;
140 new.k = 1;140 new.k = 1;
141 } while (cmpxchg(&ic->val, old.val, new.val) != old.val);141 } while (!try_cmpxchg(&ic->val, &old.val, new.val));
142 read_unlock(&kvm->arch.sca_lock);142 read_unlock(&kvm->arch.sca_lock);
143out:143out:
144 mutex_unlock(&kvm->arch.ipte_mutex);144 mutex_unlock(&kvm->arch.ipte_mutex);
@@ -154,11 +154,11 @@ static void ipte_unlock_simple(struct kvm *kvm) · 9 unmodified lines
154 goto out;154 goto out;
155 read_lock(&kvm->arch.sca_lock);155 read_lock(&kvm->arch.sca_lock);
156 ic = kvm_s390_get_ipte_control(kvm);156 ic = kvm_s390_get_ipte_control(kvm);
157 old = READ_ONCE(*ic);
157 do {158 do {
158 old = READ_ONCE(*ic);
159 new = old;159 new = old;
160 new.k = 0;160 new.k = 0;
161 } while (cmpxchg(&ic->val, old.val, new.val) != old.val);161 } while (!try_cmpxchg(&ic->val, &old.val, new.val));
162 read_unlock(&kvm->arch.sca_lock);162 read_unlock(&kvm->arch.sca_lock);
163 wake_up(&kvm->arch.ipte_wq);163 wake_up(&kvm->arch.ipte_wq);
164out:164out:
@@ -172,8 +172,8 @@ static void ipte_lock_siif(struct kvm *kvm) · 7 unmodified lines
172retry:172retry:
173 read_lock(&kvm->arch.sca_lock);173 read_lock(&kvm->arch.sca_lock);
174 ic = kvm_s390_get_ipte_control(kvm);174 ic = kvm_s390_get_ipte_control(kvm);
175 old = READ_ONCE(*ic);
175 do {176 do {
176 old = READ_ONCE(*ic);
177 if (old.kg) {177 if (old.kg) {
178 read_unlock(&kvm->arch.sca_lock);178 read_unlock(&kvm->arch.sca_lock);
179 cond_resched();179 cond_resched();
@@ -182,7 +182,7 @@ retry: · 2 unmodified lines
182 new = old;182 new = old;
183 new.k = 1;183 new.k = 1;
184 new.kh++;184 new.kh++;
185 } while (cmpxchg(&ic->val, old.val, new.val) != old.val);185 } while (!try_cmpxchg(&ic->val, &old.val, new.val));
186 read_unlock(&kvm->arch.sca_lock);186 read_unlock(&kvm->arch.sca_lock);
187}187}
188 188
@@ -192,13 +192,13 @@ static void ipte_unlock_siif(struct kvm *kvm) · 3 unmodified lines
192 192
193 read_lock(&kvm->arch.sca_lock);193 read_lock(&kvm->arch.sca_lock);
194 ic = kvm_s390_get_ipte_control(kvm);194 ic = kvm_s390_get_ipte_control(kvm);
195 old = READ_ONCE(*ic);
195 do {196 do {
196 old = READ_ONCE(*ic);
197 new = old;197 new = old;
198 new.kh--;198 new.kh--;
199 if (!new.kh)199 if (!new.kh)
200 new.k = 0;200 new.k = 0;
201 } while (cmpxchg(&ic->val, old.val, new.val) != old.val);201 } while (!try_cmpxchg(&ic->val, &old.val, new.val));
202 read_unlock(&kvm->arch.sca_lock);202 read_unlock(&kvm->arch.sca_lock);
203 if (!new.kh)203 if (!new.kh)
204 wake_up(&kvm->arch.ipte_wq);204 wake_up(&kvm->arch.ipte_wq);
arch/s390/kvm/interrupt.c+8−17
@@ -118,8 +118,6 @@ static int sca_inject_ext_call(struct kvm_vcpu *vcpu, int src_id) · 117 unmodified lines
118 118
119static void sca_clear_ext_call(struct kvm_vcpu *vcpu)119static void sca_clear_ext_call(struct kvm_vcpu *vcpu)
120{120{
121 int rc, expect;
122
123 if (!kvm_s390_use_sca_entries())121 if (!kvm_s390_use_sca_entries())
124 return;122 return;
125 kvm_s390_clear_cpuflags(vcpu, CPUSTAT_ECALL_PEND);123 kvm_s390_clear_cpuflags(vcpu, CPUSTAT_ECALL_PEND);
@@ -128,23 +126,16 @@ static void sca_clear_ext_call(struct kvm_vcpu *vcpu) · 2 unmodified lines
128 struct esca_block *sca = vcpu->kvm->arch.sca;126 struct esca_block *sca = vcpu->kvm->arch.sca;
129 union esca_sigp_ctrl *sigp_ctrl =127 union esca_sigp_ctrl *sigp_ctrl =
130 &(sca->cpu[vcpu->vcpu_id].sigp_ctrl);128 &(sca->cpu[vcpu->vcpu_id].sigp_ctrl);
131 union esca_sigp_ctrl old;
132 129
133 old = READ_ONCE(*sigp_ctrl);130 WRITE_ONCE(sigp_ctrl->value, 0);
134 expect = old.value;
135 rc = cmpxchg(&sigp_ctrl->value, old.value, 0);
136 } else {131 } else {
137 struct bsca_block *sca = vcpu->kvm->arch.sca;132 struct bsca_block *sca = vcpu->kvm->arch.sca;
138 union bsca_sigp_ctrl *sigp_ctrl =133 union bsca_sigp_ctrl *sigp_ctrl =
139 &(sca->cpu[vcpu->vcpu_id].sigp_ctrl);134 &(sca->cpu[vcpu->vcpu_id].sigp_ctrl);
140 union bsca_sigp_ctrl old;
141 135
142 old = READ_ONCE(*sigp_ctrl);136 WRITE_ONCE(sigp_ctrl->value, 0);
143 expect = old.value;
144 rc = cmpxchg(&sigp_ctrl->value, old.value, 0);
145 }137 }
146 read_unlock(&vcpu->kvm->arch.sca_lock);138 read_unlock(&vcpu->kvm->arch.sca_lock);
147 WARN_ON(rc != expect); /* cannot clear? */
148}139}
149 140
150int psw_extint_disabled(struct kvm_vcpu *vcpu)141int psw_extint_disabled(struct kvm_vcpu *vcpu)
@@ -247,12 +238,12 @@ static inline int gisa_set_iam(struct kvm_s390_gisa *gisa, u8 iam) · 96 unmodified lines
247{238{
248 u64 word, _word;239 u64 word, _word;
249 240
241 word = READ_ONCE(gisa->u64.word[0]);
250 do {242 do {
251 word = READ_ONCE(gisa->u64.word[0]);
252 if ((u64)gisa != word >> 32)243 if ((u64)gisa != word >> 32)
253 return -EBUSY;244 return -EBUSY;
254 _word = (word & ~0xffUL) | iam;245 _word = (word & ~0xffUL) | iam;
255 } while (cmpxchg(&gisa->u64.word[0], word, _word) != word);246 } while (!try_cmpxchg(&gisa->u64.word[0], &word, _word));
256 247
257 return 0;248 return 0;
258}249}
@@ -270,10 +261,10 @@ static inline void gisa_clear_ipm(struct kvm_s390_gisa *gisa) · 11 unmodified lines
270{261{
271 u64 word, _word;262 u64 word, _word;
272 263
264 word = READ_ONCE(gisa->u64.word[0]);
273 do {265 do {
274 word = READ_ONCE(gisa->u64.word[0]);
275 _word = word & ~(0xffUL << 24);266 _word = word & ~(0xffUL << 24);
276 } while (cmpxchg(&gisa->u64.word[0], word, _word) != word);267 } while (!try_cmpxchg(&gisa->u64.word[0], &word, _word));
277}268}
278 269
279/**270/**
@@ -291,14 +282,14 @@ static inline u8 gisa_get_ipm_or_restore_iam(struct kvm_s390_gisa_interrupt *gi) · 11 unmodified lines
291 u8 pending_mask, alert_mask;282 u8 pending_mask, alert_mask;
292 u64 word, _word;283 u64 word, _word;
293 284
285 word = READ_ONCE(gi->origin->u64.word[0]);
294 do {286 do {
295 word = READ_ONCE(gi->origin->u64.word[0]);
296 alert_mask = READ_ONCE(gi->alert.mask);287 alert_mask = READ_ONCE(gi->alert.mask);
297 pending_mask = (u8)(word >> 24) & alert_mask;288 pending_mask = (u8)(word >> 24) & alert_mask;
298 if (pending_mask)289 if (pending_mask)
299 return pending_mask;290 return pending_mask;
300 _word = (word & ~0xffUL) | alert_mask;291 _word = (word & ~0xffUL) | alert_mask;
301 } while (cmpxchg(&gi->origin->u64.word[0], word, _word) != word);292 } while (!try_cmpxchg(&gi->origin->u64.word[0], &word, _word));
302 293
303 return 0;294 return 0;
304}295}
arch/s390/kvm/kvm-s390.c+2−2
@@ -1937,11 +1937,11 @@ static void kvm_s390_update_topology_change_report(struct kvm *kvm, bool val) · 1936 unmodified lines
1937 1937
1938 read_lock(&kvm->arch.sca_lock);1938 read_lock(&kvm->arch.sca_lock);
1939 sca = kvm->arch.sca;1939 sca = kvm->arch.sca;
1940 old = READ_ONCE(sca->utility);
1940 do {1941 do {
1941 old = READ_ONCE(sca->utility);
1942 new = old;1942 new = old;
1943 new.mtcr = val;1943 new.mtcr = val;
1944 } while (cmpxchg(&sca->utility.val, old.val, new.val) != old.val);1944 } while (!try_cmpxchg(&sca->utility.val, &old.val, new.val));
1945 read_unlock(&kvm->arch.sca_lock);1945 read_unlock(&kvm->arch.sca_lock);
1946}1946}
1947 1947
arch/s390/kvm/pci.c+2−3
@@ -208,13 +208,12 @@ static inline int account_mem(unsigned long nr_pages) · 207 unmodified lines
208 208
209 page_limit = rlimit(RLIMIT_MEMLOCK) >> PAGE_SHIFT;209 page_limit = rlimit(RLIMIT_MEMLOCK) >> PAGE_SHIFT;
210 210
211 cur_pages = atomic_long_read(&user->locked_vm);
211 do {212 do {
212 cur_pages = atomic_long_read(&user->locked_vm);
213 new_pages = cur_pages + nr_pages;213 new_pages = cur_pages + nr_pages;
214 if (new_pages > page_limit)214 if (new_pages > page_limit)
215 return -ENOMEM;215 return -ENOMEM;
216 } while (atomic_long_cmpxchg(&user->locked_vm, cur_pages,216 } while (!atomic_long_try_cmpxchg(&user->locked_vm, &cur_pages, new_pages));
217 new_pages) != cur_pages);
218 217
219 atomic64_add(nr_pages, &current->mm->pinned_vm);218 atomic64_add(nr_pages, &current->mm->pinned_vm);
220 219
arch/s390/lib/spinlock.c+27−7
@@ -15,6 +15,7 @@ · 14 unmodified lines
15#include <linux/percpu.h>15#include <linux/percpu.h>
16#include <linux/io.h>16#include <linux/io.h>
17#include <asm/alternative.h>17#include <asm/alternative.h>
18#include <asm/asm.h>
18 19
19int spin_retry = -1;20int spin_retry = -1;
20 21
@@ -76,24 +77,43 @@ static inline int arch_load_niai4(int *lock) · 55 unmodified lines
76 77
77 asm_inline volatile(78 asm_inline volatile(
78 ALTERNATIVE("nop", ".insn rre,0xb2fa0000,4,0", ALT_FACILITY(49)) /* NIAI 4 */79 ALTERNATIVE("nop", ".insn rre,0xb2fa0000,4,0", ALT_FACILITY(49)) /* NIAI 4 */
79 " l %0,%1\n"80 " l %[owner],%[lock]\n"
80 : "=d" (owner) : "Q" (*lock) : "memory");81 : [owner] "=d" (owner) : [lock] "R" (*lock) : "memory");
81 return owner;82 return owner;
82}83}
83 84
84static inline int arch_cmpxchg_niai8(int *lock, int old, int new)85#ifdef __HAVE_ASM_FLAG_OUTPUTS__
86
87static inline int arch_try_cmpxchg_niai8(int *lock, int old, int new)
88{
89 int cc;
90
91 asm_inline volatile(
92 ALTERNATIVE("nop", ".insn rre,0xb2fa0000,8,0", ALT_FACILITY(49)) /* NIAI 8 */
93 " cs %[old],%[new],%[lock]\n"
94 : [old] "+d" (old), [lock] "+Q" (*lock), "=@cc" (cc)
95 : [new] "d" (new)
96 : "memory");
97 return cc == 0;
98}
99
100#else /* __HAVE_ASM_FLAG_OUTPUTS__ */
101
102static inline int arch_try_cmpxchg_niai8(int *lock, int old, int new)
85{103{
86 int expected = old;104 int expected = old;
87 105
88 asm_inline volatile(106 asm_inline volatile(
89 ALTERNATIVE("nop", ".insn rre,0xb2fa0000,8,0", ALT_FACILITY(49)) /* NIAI 8 */107 ALTERNATIVE("nop", ".insn rre,0xb2fa0000,8,0", ALT_FACILITY(49)) /* NIAI 8 */
90 " cs %0,%3,%1\n"108 " cs %[old],%[new],%[lock]\n"
91 : "=d" (old), "=Q" (*lock)109 : [old] "+d" (old), [lock] "+Q" (*lock)
92 : "0" (old), "d" (new), "Q" (*lock)110 : [new] "d" (new)
93 : "cc", "memory");111 : "cc", "memory");
94 return expected == old;112 return expected == old;
95}113}
96 114
115#endif /* __HAVE_ASM_FLAG_OUTPUTS__ */
116
97static inline struct spin_wait *arch_spin_decode_tail(int lock)117static inline struct spin_wait *arch_spin_decode_tail(int lock)
98{118{
99 int ix, cpu;119 int ix, cpu;
@@ -226,7 +246,7 @@ static inline void arch_spin_lock_classic(arch_spinlock_t *lp) · 126 unmodified lines
226 /* Try to get the lock if it is free. */246 /* Try to get the lock if it is free. */
227 if (!owner) {247 if (!owner) {
228 new = (old & _Q_TAIL_MASK) | lockval;248 new = (old & _Q_TAIL_MASK) | lockval;
229 if (arch_cmpxchg_niai8(&lp->lock, old, new)) {249 if (arch_try_cmpxchg_niai8(&lp->lock, old, new)) {
230 /* Got the lock */250 /* Got the lock */
231 return;251 return;
232 }252 }
arch/s390/mm/fault.c+2−1
@@ -338,7 +338,8 @@ done: · 337 unmodified lines
338 handle_fault_error_nolock(regs, 0);338 handle_fault_error_nolock(regs, 0);
339 else339 else
340 do_sigsegv(regs, SEGV_MAPERR);340 do_sigsegv(regs, SEGV_MAPERR);
341 } else if (fault & (VM_FAULT_SIGBUS | VM_FAULT_HWPOISON)) {341 } else if (fault & (VM_FAULT_SIGBUS | VM_FAULT_HWPOISON |
342 VM_FAULT_HWPOISON_LARGE)) {
342 if (!user_mode(regs))343 if (!user_mode(regs))
343 handle_fault_error_nolock(regs, 0);344 handle_fault_error_nolock(regs, 0);
344 else345 else
arch/s390/mm/gmap.c+8−4
@@ -587,7 +587,8 @@ int __gmap_link(struct gmap *gmap, unsigned long gaddr, unsigned long vmaddr) · 586 unmodified lines
587 if (pmd_leaf(*pmd)) {587 if (pmd_leaf(*pmd)) {
588 *table = (pmd_val(*pmd) &588 *table = (pmd_val(*pmd) &
589 _SEGMENT_ENTRY_HARDWARE_BITS_LARGE)589 _SEGMENT_ENTRY_HARDWARE_BITS_LARGE)
590 | _SEGMENT_ENTRY_GMAP_UC;590 | _SEGMENT_ENTRY_GMAP_UC
591 | _SEGMENT_ENTRY;
591 } else592 } else
592 *table = pmd_val(*pmd) &593 *table = pmd_val(*pmd) &
593 _SEGMENT_ENTRY_HARDWARE_BITS;594 _SEGMENT_ENTRY_HARDWARE_BITS;
@@ -2396,7 +2397,8 @@ static void gmap_pmdp_clear(struct mm_struct *mm, unsigned long vmaddr, · 1802 unmodified lines
2396 gaddr = __gmap_segment_gaddr((unsigned long *)pmdp);2397 gaddr = __gmap_segment_gaddr((unsigned long *)pmdp);
2397 pmdp_notify_gmap(gmap, pmdp, gaddr);2398 pmdp_notify_gmap(gmap, pmdp, gaddr);
2398 WARN_ON(pmd_val(*pmdp) & ~(_SEGMENT_ENTRY_HARDWARE_BITS_LARGE |2399 WARN_ON(pmd_val(*pmdp) & ~(_SEGMENT_ENTRY_HARDWARE_BITS_LARGE |
2399 _SEGMENT_ENTRY_GMAP_UC));2400 _SEGMENT_ENTRY_GMAP_UC |
2401 _SEGMENT_ENTRY));
2400 if (purge)2402 if (purge)
2401 __pmdp_csp(pmdp);2403 __pmdp_csp(pmdp);
2402 set_pmd(pmdp, __pmd(_SEGMENT_ENTRY_EMPTY));2404 set_pmd(pmdp, __pmd(_SEGMENT_ENTRY_EMPTY));
@@ -2450,7 +2452,8 @@ void gmap_pmdp_idte_local(struct mm_struct *mm, unsigned long vmaddr) · 47 unmodified lines
2450 gaddr = __gmap_segment_gaddr(entry);2452 gaddr = __gmap_segment_gaddr(entry);
2451 pmdp_notify_gmap(gmap, pmdp, gaddr);2453 pmdp_notify_gmap(gmap, pmdp, gaddr);
2452 WARN_ON(*entry & ~(_SEGMENT_ENTRY_HARDWARE_BITS_LARGE |2454 WARN_ON(*entry & ~(_SEGMENT_ENTRY_HARDWARE_BITS_LARGE |
2453 _SEGMENT_ENTRY_GMAP_UC));2455 _SEGMENT_ENTRY_GMAP_UC |
2456 _SEGMENT_ENTRY));
2454 if (MACHINE_HAS_TLB_GUEST)2457 if (MACHINE_HAS_TLB_GUEST)
2455 __pmdp_idte(gaddr, pmdp, IDTE_GUEST_ASCE,2458 __pmdp_idte(gaddr, pmdp, IDTE_GUEST_ASCE,
2456 gmap->asce, IDTE_LOCAL);2459 gmap->asce, IDTE_LOCAL);
@@ -2485,7 +2488,8 @@ void gmap_pmdp_idte_global(struct mm_struct *mm, unsigned long vmaddr) · 28 unmodified lines
2485 gaddr = __gmap_segment_gaddr(entry);2488 gaddr = __gmap_segment_gaddr(entry);
2486 pmdp_notify_gmap(gmap, pmdp, gaddr);2489 pmdp_notify_gmap(gmap, pmdp, gaddr);
2487 WARN_ON(*entry & ~(_SEGMENT_ENTRY_HARDWARE_BITS_LARGE |2490 WARN_ON(*entry & ~(_SEGMENT_ENTRY_HARDWARE_BITS_LARGE |
2488 _SEGMENT_ENTRY_GMAP_UC));2491 _SEGMENT_ENTRY_GMAP_UC |
2492 _SEGMENT_ENTRY));
2489 if (MACHINE_HAS_TLB_GUEST)2493 if (MACHINE_HAS_TLB_GUEST)
2490 __pmdp_idte(gaddr, pmdp, IDTE_GUEST_ASCE,2494 __pmdp_idte(gaddr, pmdp, IDTE_GUEST_ASCE,
2491 gmap->asce, IDTE_GLOBAL);2495 gmap->asce, IDTE_GLOBAL);
arch/s390/mm/hugetlbpage.c+22−9
@@ -24,6 +24,7 @@ · 23 unmodified lines
24 24
25static inline unsigned long __pte_to_rste(pte_t pte)25static inline unsigned long __pte_to_rste(pte_t pte)
26{26{
27 swp_entry_t arch_entry;
27 unsigned long rste;28 unsigned long rste;
28 29
29 /*30 /*
@@ -48,6 +49,7 @@ static inline unsigned long __pte_to_rste(pte_t pte) · 18 unmodified lines
48 */49 */
49 if (pte_present(pte)) {50 if (pte_present(pte)) {
50 rste = pte_val(pte) & PAGE_MASK;51 rste = pte_val(pte) & PAGE_MASK;
52 rste |= _SEGMENT_ENTRY_PRESENT;
51 rste |= move_set_bit(pte_val(pte), _PAGE_READ,53 rste |= move_set_bit(pte_val(pte), _PAGE_READ,
52 _SEGMENT_ENTRY_READ);54 _SEGMENT_ENTRY_READ);
53 rste |= move_set_bit(pte_val(pte), _PAGE_WRITE,55 rste |= move_set_bit(pte_val(pte), _PAGE_WRITE,
@@ -66,6 +68,10 @@ static inline unsigned long __pte_to_rste(pte_t pte) · 12 unmodified lines
66#endif68#endif
67 rste |= move_set_bit(pte_val(pte), _PAGE_NOEXEC,69 rste |= move_set_bit(pte_val(pte), _PAGE_NOEXEC,
68 _SEGMENT_ENTRY_NOEXEC);70 _SEGMENT_ENTRY_NOEXEC);
71 } else if (!pte_none(pte)) {
72 /* swap pte */
73 arch_entry = __pte_to_swp_entry(pte);
74 rste = mk_swap_rste(__swp_type(arch_entry), __swp_offset(arch_entry));
69 } else75 } else
70 rste = _SEGMENT_ENTRY_EMPTY;76 rste = _SEGMENT_ENTRY_EMPTY;
71 return rste;77 return rste;
@@ -73,13 +79,18 @@ static inline unsigned long __pte_to_rste(pte_t pte) · 1 unmodified line
73 79
74static inline pte_t __rste_to_pte(unsigned long rste)80static inline pte_t __rste_to_pte(unsigned long rste)
75{81{
82 swp_entry_t arch_entry;
76 unsigned long pteval;83 unsigned long pteval;
77 int present;84 int present, none;
85 pte_t pte;
78 86
79 if ((rste & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3)87 if ((rste & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3) {
80 present = pud_present(__pud(rste));88 present = pud_present(__pud(rste));
81 else89 none = pud_none(__pud(rste));
90 } else {
82 present = pmd_present(__pmd(rste));91 present = pmd_present(__pmd(rste));
92 none = pmd_none(__pmd(rste));
93 }
83 94
84 /*95 /*
85 * Convert encoding pmd / pud bits pte bits96 * Convert encoding pmd / pud bits pte bits
@@ -114,6 +125,11 @@ static inline pte_t __rste_to_pte(unsigned long rste) · 28 unmodified lines
114 pteval |= move_set_bit(rste, _SEGMENT_ENTRY_SOFT_DIRTY, _PAGE_SOFT_DIRTY);125 pteval |= move_set_bit(rste, _SEGMENT_ENTRY_SOFT_DIRTY, _PAGE_SOFT_DIRTY);
115#endif126#endif
116 pteval |= move_set_bit(rste, _SEGMENT_ENTRY_NOEXEC, _PAGE_NOEXEC);127 pteval |= move_set_bit(rste, _SEGMENT_ENTRY_NOEXEC, _PAGE_NOEXEC);
128 } else if (!none) {
129 /* swap rste */
130 arch_entry = __rste_to_swp_entry(rste);
131 pte = mk_swap_pte(__swp_type_rste(arch_entry), __swp_offset_rste(arch_entry));
132 pteval = pte_val(pte);
117 } else133 } else
118 pteval = _PAGE_INVALID;134 pteval = _PAGE_INVALID;
119 return __pte(pteval);135 return __pte(pteval);
@@ -148,8 +164,6 @@ void __set_huge_pte_at(struct mm_struct *mm, unsigned long addr, · 28 unmodified lines
148 unsigned long rste;164 unsigned long rste;
149 165
150 rste = __pte_to_rste(pte);166 rste = __pte_to_rste(pte);
151 if (!MACHINE_HAS_NX)
152 rste &= ~_SEGMENT_ENTRY_NOEXEC;
153 167
154 /* Set correct table type for 2G hugepages */168 /* Set correct table type for 2G hugepages */
155 if ((pte_val(*ptep) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3) {169 if ((pte_val(*ptep) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3) {
@@ -223,11 +237,10 @@ pte_t *huge_pte_offset(struct mm_struct *mm, · 67 unmodified lines
223 p4dp = p4d_offset(pgdp, addr);237 p4dp = p4d_offset(pgdp, addr);
224 if (p4d_present(*p4dp)) {238 if (p4d_present(*p4dp)) {
225 pudp = pud_offset(p4dp, addr);239 pudp = pud_offset(p4dp, addr);
226 if (pud_present(*pudp)) {240 if (sz == PUD_SIZE)
227 if (pud_leaf(*pudp))241 return (pte_t *)pudp;
228 return (pte_t *) pudp;242 if (pud_present(*pudp))
229 pmdp = pmd_offset(pudp, addr);243 pmdp = pmd_offset(pudp, addr);
230 }
231 }244 }
232 }245 }
233 return (pte_t *) pmdp;246 return (pte_t *) pmdp;
arch/s390/pci/pci.c+26−29
@@ -779,8 +779,9 @@ int zpci_hot_reset_device(struct zpci_dev *zdev) · 778 unmodified lines
779 * @fh: Current Function Handle of the device to be created779 * @fh: Current Function Handle of the device to be created
780 * @state: Initial state after creation either Standby or Configured780 * @state: Initial state after creation either Standby or Configured
781 *781 *
782 * Creates a new zpci device and adds it to its, possibly newly created, zbus782 * Allocates a new struct zpci_dev and queries the platform for its details.
783 * as well as zpci_list.783 * If successful the device can subsequently be added to the zPCI subsystem
784 * using zpci_add_device().
784 *785 *
785 * Returns: the zdev on success or an error pointer otherwise786 * Returns: the zdev on success or an error pointer otherwise
786 */787 */
@@ -803,7 +804,6 @@ struct zpci_dev *zpci_create_device(u32 fid, u32 fh, enum zpci_state state) · 16 unmodified lines
803 goto error;804 goto error;
804 zdev->state = state;805 zdev->state = state;
805 806
806 kref_init(&zdev->kref);
807 mutex_init(&zdev->state_lock);807 mutex_init(&zdev->state_lock);
808 mutex_init(&zdev->fmb_lock);808 mutex_init(&zdev->fmb_lock);
809 mutex_init(&zdev->kzdev_lock);809 mutex_init(&zdev->kzdev_lock);
@@ -816,6 +816,17 @@ error: · 6 unmodified lines
816 return ERR_PTR(rc);816 return ERR_PTR(rc);
817}817}
818 818
819/**
820 * zpci_add_device() - Add a previously created zPCI device to the zPCI subsystem
821 * @zdev: The zPCI device to be added
822 *
823 * A struct zpci_dev is added to the zPCI subsystem and to a virtual PCI bus creating
824 * a new one as necessary. A hotplug slot is created and events start to be handled.
825 * If successful from this point on zpci_zdev_get() and zpci_zdev_put() must be used.
826 * If adding the struct zpci_dev fails the device was not added and should be freed.
827 *
828 * Return: 0 on success, or an error code otherwise
829 */
819int zpci_add_device(struct zpci_dev *zdev)830int zpci_add_device(struct zpci_dev *zdev)
820{831{
821 int rc;832 int rc;
@@ -829,6 +840,7 @@ int zpci_add_device(struct zpci_dev *zdev) · 7 unmodified lines
829 if (rc)840 if (rc)
830 goto error_destroy_iommu;841 goto error_destroy_iommu;
831 842
843 kref_init(&zdev->kref);
832 spin_lock(&zpci_list_lock);844 spin_lock(&zpci_list_lock);
833 list_add_tail(&zdev->entry, &zpci_list);845 list_add_tail(&zdev->entry, &zpci_list);
834 spin_unlock(&zpci_list_lock);846 spin_unlock(&zpci_list_lock);
@@ -928,10 +940,8 @@ void zpci_device_reserved(struct zpci_dev *zdev) · 93 unmodified lines
928void zpci_release_device(struct kref *kref)940void zpci_release_device(struct kref *kref)
929{941{
930 struct zpci_dev *zdev = container_of(kref, struct zpci_dev, kref);942 struct zpci_dev *zdev = container_of(kref, struct zpci_dev, kref);
931 int ret;
932 943
933 if (zdev->has_hp_slot)944 WARN_ON(zdev->state != ZPCI_FN_STATE_RESERVED);
934 zpci_exit_slot(zdev);
935 945
936 if (zdev->zbus->bus)946 if (zdev->zbus->bus)
937 zpci_bus_remove_device(zdev, false);947 zpci_bus_remove_device(zdev, false);
@@ -939,28 +949,14 @@ void zpci_release_device(struct kref *kref) · 1 unmodified line
939 if (zdev_enabled(zdev))949 if (zdev_enabled(zdev))
940 zpci_disable_device(zdev);950 zpci_disable_device(zdev);
941 951
942 switch (zdev->state) {952 if (zdev->has_hp_slot)
943 case ZPCI_FN_STATE_CONFIGURED:953 zpci_exit_slot(zdev);
944 ret = sclp_pci_deconfigure(zdev->fid);954
945 zpci_dbg(3, "deconf fid:%x, rc:%d\n", zdev->fid, ret);955 if (zdev->has_resources)
946 fallthrough;956 zpci_cleanup_bus_resources(zdev);
947 case ZPCI_FN_STATE_STANDBY:957
948 if (zdev->has_hp_slot)958 zpci_bus_device_unregister(zdev);
949 zpci_exit_slot(zdev);959 zpci_destroy_iommu(zdev);
950 spin_lock(&zpci_list_lock);
951 list_del(&zdev->entry);
952 spin_unlock(&zpci_list_lock);
953 zpci_dbg(3, "rsv fid:%x\n", zdev->fid);
954 fallthrough;
955 case ZPCI_FN_STATE_RESERVED:
956 if (zdev->has_resources)
957 zpci_cleanup_bus_resources(zdev);
958 zpci_bus_device_unregister(zdev);
959 zpci_destroy_iommu(zdev);
960 fallthrough;
961 default:
962 break;
963 }
964 zpci_dbg(3, "rem fid:%x\n", zdev->fid);960 zpci_dbg(3, "rem fid:%x\n", zdev->fid);
965 kfree_rcu(zdev, rcu);961 kfree_rcu(zdev, rcu);
966}962}
@@ -1121,7 +1117,8 @@ static void zpci_add_devices(struct list_head *scan_list) · 154 unmodified lines
1121 list_sort(NULL, scan_list, &zpci_cmp_rid);1117 list_sort(NULL, scan_list, &zpci_cmp_rid);
1122 list_for_each_entry_safe(zdev, tmp, scan_list, entry) {1118 list_for_each_entry_safe(zdev, tmp, scan_list, entry) {
1123 list_del_init(&zdev->entry);1119 list_del_init(&zdev->entry);
1124 zpci_add_device(zdev);1120 if (zpci_add_device(zdev))
1121 kfree(zdev);
1125 }1122 }
1126}1123}
1127 1124
arch/s390/pci/pci_bus.c+1−1
@@ -53,7 +53,7 @@ static int zpci_bus_prepare_device(struct zpci_dev *zdev) · 52 unmodified lines
53 zpci_setup_bus_resources(zdev);53 zpci_setup_bus_resources(zdev);
54 for (i = 0; i < PCI_STD_NUM_BARS; i++) {54 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
55 if (zdev->bars[i].res)55 if (zdev->bars[i].res)
56 pci_bus_add_resource(zdev->zbus->bus, zdev->bars[i].res, 0);56 pci_bus_add_resource(zdev->zbus->bus, zdev->bars[i].res);
57 }57 }
58 }58 }
59 59
arch/s390/pci/pci_event.c+8−2
@@ -340,7 +340,10 @@ static void __zpci_event_availability(struct zpci_ccdf_avail *ccdf) · 339 unmodified lines
340 zdev = zpci_create_device(ccdf->fid, ccdf->fh, ZPCI_FN_STATE_CONFIGURED);340 zdev = zpci_create_device(ccdf->fid, ccdf->fh, ZPCI_FN_STATE_CONFIGURED);
341 if (IS_ERR(zdev))341 if (IS_ERR(zdev))
342 break;342 break;
343 zpci_add_device(zdev);343 if (zpci_add_device(zdev)) {
344 kfree(zdev);
345 break;
346 }
344 } else {347 } else {
345 /* the configuration request may be stale */348 /* the configuration request may be stale */
346 if (zdev->state != ZPCI_FN_STATE_STANDBY)349 if (zdev->state != ZPCI_FN_STATE_STANDBY)
@@ -354,7 +357,10 @@ static void __zpci_event_availability(struct zpci_ccdf_avail *ccdf) · 7 unmodified lines
354 zdev = zpci_create_device(ccdf->fid, ccdf->fh, ZPCI_FN_STATE_STANDBY);357 zdev = zpci_create_device(ccdf->fid, ccdf->fh, ZPCI_FN_STATE_STANDBY);
355 if (IS_ERR(zdev))358 if (IS_ERR(zdev))
356 break;359 break;
357 zpci_add_device(zdev);360 if (zpci_add_device(zdev)) {
361 kfree(zdev);
362 break;
363 }
358 } else {364 } else {
359 zpci_update_fh(zdev, ccdf->fh);365 zpci_update_fh(zdev, ccdf->fh);
360 }366 }
arch/sh/drivers/push-switch.c+1−1
@@ -110,7 +110,7 @@ static void switch_drv_remove(struct platform_device *pdev) · 109 unmodified lines
110 110
111static struct platform_driver switch_driver = {111static struct platform_driver switch_driver = {
112 .probe = switch_drv_probe,112 .probe = switch_drv_probe,
113 .remove_new = switch_drv_remove,113 .remove = switch_drv_remove,
114 .driver = {114 .driver = {
115 .name = DRV_NAME,115 .name = DRV_NAME,
116 },116 },
arch/sh/include/asm/spinlock_types.h+1−1
@@ -3,7 +3,7 @@ · 2 unmodified lines
3#define __ASM_SH_SPINLOCK_TYPES_H3#define __ASM_SH_SPINLOCK_TYPES_H
4 4
5#ifndef __LINUX_SPINLOCK_TYPES_RAW_H5#ifndef __LINUX_SPINLOCK_TYPES_RAW_H
6# error "please don't include this file directly"6# error "Please do not include this file directly."
7#endif7#endif
8 8
9typedef struct {9typedef struct {
arch/sh/kernel/cpu/proc.c+1−1
@@ -132,7 +132,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) · 131 unmodified lines
132 132
133static void *c_start(struct seq_file *m, loff_t *pos)133static void *c_start(struct seq_file *m, loff_t *pos)
134{134{
135 return *pos < NR_CPUS ? cpu_data + *pos : NULL;135 return *pos < nr_cpu_ids ? cpu_data + *pos : NULL;
136}136}
137static void *c_next(struct seq_file *m, void *v, loff_t *pos)137static void *c_next(struct seq_file *m, void *v, loff_t *pos)
138{138{
arch/sparc/Makefile+2−2
@@ -29,7 +29,7 @@ UTS_MACHINE := sparc · 28 unmodified lines
29# versions of gcc. Some gcc versions won't pass -Av8 to binutils when you29# versions of gcc. Some gcc versions won't pass -Av8 to binutils when you
30# give -mcpu=v8. This silently worked with older bintutils versions but30# give -mcpu=v8. This silently worked with older bintutils versions but
31# does not any more.31# does not any more.
32KBUILD_CFLAGS += -m32 -mcpu=v8 -pipe -mno-fpu -fcall-used-g5 -fcall-used-g732KBUILD_CFLAGS += -m32 -mcpu=v8 -pipe -mno-fpu $(call cc-option,-fcall-used-g5) $(call cc-option,-fcall-used-g7)
33KBUILD_CFLAGS += -Wa,-Av833KBUILD_CFLAGS += -Wa,-Av8
34 34
35KBUILD_AFLAGS += -m32 -Wa,-Av835KBUILD_AFLAGS += -m32 -Wa,-Av8
@@ -45,7 +45,7 @@ export BITS := 64 · 9 unmodified lines
45UTS_MACHINE := sparc6445UTS_MACHINE := sparc64
46 46
47KBUILD_CFLAGS += -m64 -pipe -mno-fpu -mcpu=ultrasparc -mcmodel=medlow47KBUILD_CFLAGS += -m64 -pipe -mno-fpu -mcpu=ultrasparc -mcmodel=medlow
48KBUILD_CFLAGS += -ffixed-g4 -ffixed-g5 -fcall-used-g7 -Wno-sign-compare48KBUILD_CFLAGS += -ffixed-g4 -ffixed-g5 $(call cc-option,-fcall-used-g7) -Wno-sign-compare
49KBUILD_CFLAGS += -Wa,--undeclared-regs49KBUILD_CFLAGS += -Wa,--undeclared-regs
50KBUILD_CFLAGS += $(call cc-option,-mtune=ultrasparc3)50KBUILD_CFLAGS += $(call cc-option,-mtune=ultrasparc3)
51KBUILD_AFLAGS += -m64 -mcpu=ultrasparc -Wa,--undeclared-regs51KBUILD_AFLAGS += -m64 -mcpu=ultrasparc -Wa,--undeclared-regs
arch/sparc/include/asm/hvtramp.h+1−1
@@ -17,7 +17,7 @@ struct hvtramp_descr { · 16 unmodified lines
17 __u64 fault_info_va;17 __u64 fault_info_va;
18 __u64 fault_info_pa;18 __u64 fault_info_pa;
19 __u64 thread_reg;19 __u64 thread_reg;
20 struct hvtramp_mapping maps[1];20 struct hvtramp_mapping maps[];
21};21};
22 22
23void hv_cpu_startup(unsigned long hvdescr_pa);23void hv_cpu_startup(unsigned long hvdescr_pa);
arch/sparc/include/asm/parport_64.h+1−1
@@ -243,7 +243,7 @@ static struct platform_driver ecpp_driver = { · 242 unmodified lines
243 .of_match_table = ecpp_match,243 .of_match_table = ecpp_match,
244 },244 },
245 .probe = ecpp_probe,245 .probe = ecpp_probe,
246 .remove_new = ecpp_remove,246 .remove = ecpp_remove,
247};247};
248 248
249static int parport_pc_find_nonpci_ports(int autoirq, int autodma)249static int parport_pc_find_nonpci_ports(int autoirq, int autodma)
arch/sparc/kernel/chmc.c+1−1
@@ -814,7 +814,7 @@ static struct platform_driver us3mc_driver = { · 813 unmodified lines
814 .of_match_table = us3mc_match,814 .of_match_table = us3mc_match,
815 },815 },
816 .probe = us3mc_probe,816 .probe = us3mc_probe,
817 .remove_new = us3mc_remove,817 .remove = us3mc_remove,
818};818};
819 819
820static inline bool us3mc_platform(void)820static inline bool us3mc_platform(void)
arch/sparc/kernel/smp_64.c+1−3
@@ -297,9 +297,7 @@ static void ldom_startcpu_cpuid(unsigned int cpu, unsigned long thread_reg, · 296 unmodified lines
297 unsigned long hv_err;297 unsigned long hv_err;
298 int i;298 int i;
299 299
300 hdesc = kzalloc(sizeof(*hdesc) +300 hdesc = kzalloc(struct_size(hdesc, maps, num_kernel_image_mappings),
301 (sizeof(struct hvtramp_mapping) *
302 num_kernel_image_mappings - 1),
303 GFP_KERNEL);301 GFP_KERNEL);
304 if (!hdesc) {302 if (!hdesc) {
305 printk(KERN_ERR "ldom_startcpu_cpuid: Cannot allocate "303 printk(KERN_ERR "ldom_startcpu_cpuid: Cannot allocate "
arch/sparc/kernel/time_32.c+1−0
@@ -255,6 +255,7 @@ static void mostek_write_byte(struct device *dev, u32 ofs, u8 val) · 254 unmodified lines
255static struct m48t59_plat_data m48t59_data = {255static struct m48t59_plat_data m48t59_data = {
256 .read_byte = mostek_read_byte,256 .read_byte = mostek_read_byte,
257 .write_byte = mostek_write_byte,257 .write_byte = mostek_write_byte,
258 .yy_offset = 68,
258};259};
259 260
260/* resource is set at runtime */261/* resource is set at runtime */
arch/sparc/kernel/time_64.c+1−0
@@ -544,6 +544,7 @@ static void mostek_write_byte(struct device *dev, u32 ofs, u8 val) · 543 unmodified lines
544static struct m48t59_plat_data m48t59_data = {544static struct m48t59_plat_data m48t59_data = {
545 .read_byte = mostek_read_byte,545 .read_byte = mostek_read_byte,
546 .write_byte = mostek_write_byte,546 .write_byte = mostek_write_byte,
547 .yy_offset = 68,
547};548};
548 549
549static struct platform_device m48t59_rtc = {550static struct platform_device m48t59_rtc = {
arch/sparc/kernel/vmlinux.lds.S+5−0
@@ -48,6 +48,11 @@ SECTIONS · 47 unmodified lines
48 {48 {
49 _text = .;49 _text = .;
50 HEAD_TEXT50 HEAD_TEXT
51 ALIGN_FUNCTION();
52#ifdef CONFIG_SPARC64
53 /* Match text section symbols in head_64.S first */
54 *head_64.o(.text)
55#endif
51 TEXT_TEXT56 TEXT_TEXT
52 SCHED_TEXT57 SCHED_TEXT
53 LOCK_TEXT58 LOCK_TEXT
arch/sparc/vdso/Makefile+1−1
@@ -46,7 +46,7 @@ CFL := $(PROFILING) -mcmodel=medlow -fPIC -O2 -fasynchronous-unwind-tables -m64 · 45 unmodified lines
46 -fno-omit-frame-pointer -foptimize-sibling-calls \46 -fno-omit-frame-pointer -foptimize-sibling-calls \
47 -DDISABLE_BRANCH_PROFILING -DBUILD_VDSO47 -DDISABLE_BRANCH_PROFILING -DBUILD_VDSO
48 48
49SPARC_REG_CFLAGS = -ffixed-g4 -ffixed-g5 -fcall-used-g5 -fcall-used-g749SPARC_REG_CFLAGS = -ffixed-g4 -ffixed-g5 $(call cc-option,-fcall-used-g5) $(call cc-option,-fcall-used-g7)
50 50
51$(vobjs): KBUILD_CFLAGS := $(filter-out $(RANDSTRUCT_CFLAGS) $(GCC_PLUGINS_CFLAGS) $(SPARC_REG_CFLAGS),$(KBUILD_CFLAGS)) $(CFL)51$(vobjs): KBUILD_CFLAGS := $(filter-out $(RANDSTRUCT_CFLAGS) $(GCC_PLUGINS_CFLAGS) $(SPARC_REG_CFLAGS),$(KBUILD_CFLAGS)) $(CFL)
52 52
arch/sparc/vdso/vclock_gettime.c+24−4
@@ -86,6 +86,11 @@ notrace static long vdso_fallback_gettimeofday(struct __kernel_old_timeval *tv, · 85 unmodified lines
86}86}
87 87
88#ifdef CONFIG_SPARC6488#ifdef CONFIG_SPARC64
89notrace static __always_inline u64 __shr64(u64 val, int amt)
90{
91 return val >> amt;
92}
93
89notrace static __always_inline u64 vread_tick(void)94notrace static __always_inline u64 vread_tick(void)
90{95{
91 u64 ret;96 u64 ret;
@@ -102,6 +107,21 @@ notrace static __always_inline u64 vread_tick_stick(void) · 10 unmodified lines
102 return ret;107 return ret;
103}108}
104#else109#else
110notrace static __always_inline u64 __shr64(u64 val, int amt)
111{
112 u64 ret;
113
114 __asm__ __volatile__("sllx %H1, 32, %%g1\n\t"
115 "srl %L1, 0, %L1\n\t"
116 "or %%g1, %L1, %%g1\n\t"
117 "srlx %%g1, %2, %L0\n\t"
118 "srlx %L0, 32, %H0"
119 : "=r" (ret)
120 : "r" (val), "r" (amt)
121 : "g1");
122 return ret;
123}
124
105notrace static __always_inline u64 vread_tick(void)125notrace static __always_inline u64 vread_tick(void)
106{126{
107 register unsigned long long ret asm("o4");127 register unsigned long long ret asm("o4");
@@ -154,7 +174,7 @@ notrace static __always_inline int do_realtime(struct vvar_data *vvar, · 46 unmodified lines
154 ts->tv_sec = vvar->wall_time_sec;174 ts->tv_sec = vvar->wall_time_sec;
155 ns = vvar->wall_time_snsec;175 ns = vvar->wall_time_snsec;
156 ns += vgetsns(vvar);176 ns += vgetsns(vvar);
157 ns >>= vvar->clock.shift;177 ns = __shr64(ns, vvar->clock.shift);
158 } while (unlikely(vvar_read_retry(vvar, seq)));178 } while (unlikely(vvar_read_retry(vvar, seq)));
159 179
160 ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);180 ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
@@ -174,7 +194,7 @@ notrace static __always_inline int do_realtime_stick(struct vvar_data *vvar, · 13 unmodified lines
174 ts->tv_sec = vvar->wall_time_sec;194 ts->tv_sec = vvar->wall_time_sec;
175 ns = vvar->wall_time_snsec;195 ns = vvar->wall_time_snsec;
176 ns += vgetsns_stick(vvar);196 ns += vgetsns_stick(vvar);
177 ns >>= vvar->clock.shift;197 ns = __shr64(ns, vvar->clock.shift);
178 } while (unlikely(vvar_read_retry(vvar, seq)));198 } while (unlikely(vvar_read_retry(vvar, seq)));
179 199
180 ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);200 ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
@@ -194,7 +214,7 @@ notrace static __always_inline int do_monotonic(struct vvar_data *vvar, · 13 unmodified lines
194 ts->tv_sec = vvar->monotonic_time_sec;214 ts->tv_sec = vvar->monotonic_time_sec;
195 ns = vvar->monotonic_time_snsec;215 ns = vvar->monotonic_time_snsec;
196 ns += vgetsns(vvar);216 ns += vgetsns(vvar);
197 ns >>= vvar->clock.shift;217 ns = __shr64(ns, vvar->clock.shift);
198 } while (unlikely(vvar_read_retry(vvar, seq)));218 } while (unlikely(vvar_read_retry(vvar, seq)));
199 219
200 ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);220 ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
@@ -214,7 +234,7 @@ notrace static __always_inline int do_monotonic_stick(struct vvar_data *vvar, · 13 unmodified lines
214 ts->tv_sec = vvar->monotonic_time_sec;234 ts->tv_sec = vvar->monotonic_time_sec;
215 ns = vvar->monotonic_time_snsec;235 ns = vvar->monotonic_time_snsec;
216 ns += vgetsns_stick(vvar);236 ns += vgetsns_stick(vvar);
217 ns >>= vvar->clock.shift;237 ns = __shr64(ns, vvar->clock.shift);
218 } while (unlikely(vvar_read_retry(vvar, seq)));238 } while (unlikely(vvar_read_retry(vvar, seq)));
219 239
220 ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);240 ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
arch/um/Kconfig+21−3
@@ -5,6 +5,7 @@ menu "UML-specific options" · 4 unmodified lines
5config UML5config UML
6 bool6 bool
7 default y7 default y
8 select ARCH_WANTS_DYNAMIC_TASK_STRUCT
8 select ARCH_HAS_CPU_FINALIZE_INIT9 select ARCH_HAS_CPU_FINALIZE_INIT
9 select ARCH_HAS_FORTIFY_SOURCE10 select ARCH_HAS_FORTIFY_SOURCE
10 select ARCH_HAS_GCOV_PROFILE_ALL11 select ARCH_HAS_GCOV_PROFILE_ALL
@@ -32,6 +33,8 @@ config UML · 21 unmodified lines
32 select HAVE_ARCH_VMAP_STACK33 select HAVE_ARCH_VMAP_STACK
33 select HAVE_RUST34 select HAVE_RUST
34 select ARCH_HAS_UBSAN35 select ARCH_HAS_UBSAN
36 select HAVE_ARCH_TRACEHOOK
37 select THREAD_INFO_IN_TASK
35 38
36config MMU39config MMU
37 bool40 bool
@@ -94,7 +97,7 @@ config MAY_HAVE_RUNTIME_DEPS · 56 unmodified lines
94 97
95config STATIC_LINK98config STATIC_LINK
96 bool "Force a static link"99 bool "Force a static link"
97 depends on CC_CAN_LINK_STATIC_NO_RUNTIME_DEPS || !MAY_HAVE_RUNTIME_DEPS100 depends on !MAY_HAVE_RUNTIME_DEPS
98 help101 help
99 This option gives you the ability to force a static link of UML.102 This option gives you the ability to force a static link of UML.
100 Normally, UML is linked as a shared binary. This is inconvenient for103 Normally, UML is linked as a shared binary. This is inconvenient for
@@ -209,8 +212,8 @@ config MMAPPER · 108 unmodified lines
209 212
210config PGTABLE_LEVELS213config PGTABLE_LEVELS
211 int214 int
212 default 3 if 3_LEVEL_PGTABLES215 default 4 if 64BIT
213 default 2216 default 2 if !64BIT
214 217
215config UML_TIME_TRAVEL_SUPPORT218config UML_TIME_TRAVEL_SUPPORT
216 bool219 bool
@@ -227,6 +230,21 @@ config UML_TIME_TRAVEL_SUPPORT · 10 unmodified lines
227 230
228 It is safe to say Y, but you probably don't need this.231 It is safe to say Y, but you probably don't need this.
229 232
233config UML_MAX_USERSPACE_ITERATIONS
234 int
235 prompt "Maximum number of unscheduled userspace iterations"
236 default 10000
237 depends on UML_TIME_TRAVEL_SUPPORT
238 help
239 In UML inf-cpu and ext time-travel mode userspace can run without being
240 interrupted. This will eventually overwhelm the kernel and create OOM
241 situations (mainly RCU not running). This setting specifies the number
242 of kernel/userspace switches (minor/major page fault, signal or syscall)
243 for the same userspace thread before the sched_clock is advanced by a
244 jiffie to trigger scheduling.
245
246 Setting it to zero disables the feature.
247
230config KASAN_SHADOW_OFFSET248config KASAN_SHADOW_OFFSET
231 hex249 hex
232 depends on KASAN250 depends on KASAN
arch/um/Makefile+5−2
@@ -61,7 +61,8 @@ KBUILD_CFLAGS += $(CFLAGS) $(CFLAGS-y) -D__arch_um__ \ · 60 unmodified lines
61 $(ARCH_INCLUDE) $(MODE_INCLUDE) -Dvmap=kernel_vmap \61 $(ARCH_INCLUDE) $(MODE_INCLUDE) -Dvmap=kernel_vmap \
62 -Dlongjmp=kernel_longjmp -Dsetjmp=kernel_setjmp \62 -Dlongjmp=kernel_longjmp -Dsetjmp=kernel_setjmp \
63 -Din6addr_loopback=kernel_in6addr_loopback \63 -Din6addr_loopback=kernel_in6addr_loopback \
64 -Din6addr_any=kernel_in6addr_any -Dstrrchr=kernel_strrchr64 -Din6addr_any=kernel_in6addr_any -Dstrrchr=kernel_strrchr \
65 -D__close_range=kernel__close_range
65 66
66KBUILD_RUSTFLAGS += -Crelocation-model=pie67KBUILD_RUSTFLAGS += -Crelocation-model=pie
67 68
@@ -70,7 +71,9 @@ KBUILD_AFLAGS += $(ARCH_INCLUDE) · 2 unmodified lines
70USER_CFLAGS = $(patsubst $(KERNEL_DEFINES),,$(patsubst -I%,,$(KBUILD_CFLAGS))) \71USER_CFLAGS = $(patsubst $(KERNEL_DEFINES),,$(patsubst -I%,,$(KBUILD_CFLAGS))) \
71 $(ARCH_INCLUDE) $(MODE_INCLUDE) $(filter -I%,$(CFLAGS)) \72 $(ARCH_INCLUDE) $(MODE_INCLUDE) $(filter -I%,$(CFLAGS)) \
72 -D_FILE_OFFSET_BITS=64 -idirafter $(srctree)/include \73 -D_FILE_OFFSET_BITS=64 -idirafter $(srctree)/include \
73 -idirafter $(objtree)/include -D__KERNEL__ -D__UM_HOST__74 -idirafter $(objtree)/include -D__KERNEL__ -D__UM_HOST__ \
75 -include $(srctree)/include/linux/compiler-version.h \
76 -include $(srctree)/include/linux/kconfig.h
74 77
75#This will adjust *FLAGS accordingly to the platform.78#This will adjust *FLAGS accordingly to the platform.
76include $(srctree)/$(ARCH_DIR)/Makefile-os-Linux79include $(srctree)/$(ARCH_DIR)/Makefile-os-Linux
arch/um/Makefile-skas+7−7
@@ -3,15 +3,15 @@ · 2 unmodified lines
3# Licensed under the GPL3# Licensed under the GPL
4#4#
5 5
6GPROF_OPT += -pg6export UM_GPROF_OPT += -pg
7 7
8ifdef CONFIG_CC_IS_CLANG8ifdef CONFIG_CC_IS_CLANG
9GCOV_OPT += -fprofile-instr-generate -fcoverage-mapping9export UM_GCOV_OPT += -fprofile-instr-generate -fcoverage-mapping
10else10else
11GCOV_OPT += -fprofile-arcs -ftest-coverage11export UM_GCOV_OPT += -fprofile-arcs -ftest-coverage
12endif12endif
13 13
14CFLAGS-$(CONFIG_GCOV) += $(GCOV_OPT)14CFLAGS-$(CONFIG_GCOV) += $(UM_GCOV_OPT)
15CFLAGS-$(CONFIG_GPROF) += $(GPROF_OPT)15CFLAGS-$(CONFIG_GPROF) += $(UM_GPROF_OPT)
16LINK-$(CONFIG_GCOV) += $(GCOV_OPT)16LINK-$(CONFIG_GCOV) += $(UM_GCOV_OPT)
17LINK-$(CONFIG_GPROF) += $(GPROF_OPT)17LINK-$(CONFIG_GPROF) += $(UM_GPROF_OPT)
arch/um/configs/i386_defconfig+0−1
@@ -1,4 +1,3 @@
1CONFIG_3_LEVEL_PGTABLES=y
2# CONFIG_COMPACTION is not set1# CONFIG_COMPACTION is not set
3CONFIG_BINFMT_MISC=m2CONFIG_BINFMT_MISC=m
4CONFIG_HOSTFS=y3CONFIG_HOSTFS=y
arch/um/drivers/chan_user.c+2−0
@@ -161,6 +161,8 @@ static __noreturn int winch_thread(void *arg) · 160 unmodified lines
161 int count;161 int count;
162 char c = 1;162 char c = 1;
163 163
164 os_set_pdeathsig();
165
164 pty_fd = data->pty_fd;166 pty_fd = data->pty_fd;
165 pipe_fd = data->pipe_fd;167 pipe_fd = data->pipe_fd;
166 count = write(pipe_fd, &c, sizeof(c));168 count = write(pipe_fd, &c, sizeof(c));
arch/um/drivers/hostaudio_kern.c+2−0
@@ -48,6 +48,7 @@ MODULE_PARM_DESC(mixer, MIXER_HELP); · 47 unmodified lines
48#ifndef MODULE48#ifndef MODULE
49static int set_dsp(char *name, int *add)49static int set_dsp(char *name, int *add)
50{50{
51 *add = 0;
51 dsp = name;52 dsp = name;
52 return 0;53 return 0;
53}54}
@@ -56,6 +57,7 @@ __uml_setup("dsp=", set_dsp, "dsp=<dsp device>\n" DSP_HELP); · 2 unmodified lines
56 57
57static int set_mixer(char *name, int *add)58static int set_mixer(char *name, int *add)
58{59{
60 *add = 0;
59 mixer = name;61 mixer = name;
60 return 0;62 return 0;
61}63}
arch/um/drivers/net_kern.c+1−1
@@ -336,7 +336,7 @@ static struct platform_driver uml_net_driver = { · 335 unmodified lines
336 336
337static void net_device_release(struct device *dev)337static void net_device_release(struct device *dev)
338{338{
339 struct uml_net *device = dev_get_drvdata(dev);339 struct uml_net *device = container_of(dev, struct uml_net, pdev.dev);
340 struct net_device *netdev = device->dev;340 struct net_device *netdev = device->dev;
341 struct uml_net_private *lp = netdev_priv(netdev);341 struct uml_net_private *lp = netdev_priv(netdev);
342 342
arch/um/drivers/rtc_kern.c+1−1
@@ -176,7 +176,7 @@ static void uml_rtc_remove(struct platform_device *pdev) · 175 unmodified lines
176 176
177static struct platform_driver uml_rtc_driver = {177static struct platform_driver uml_rtc_driver = {
178 .probe = uml_rtc_probe,178 .probe = uml_rtc_probe,
179 .remove_new = uml_rtc_remove,179 .remove = uml_rtc_remove,
180 .driver = {180 .driver = {
181 .name = "uml-rtc",181 .name = "uml-rtc",
182 },182 },
arch/um/drivers/ubd_kern.c+4−1
@@ -779,7 +779,7 @@ static int ubd_open_dev(struct ubd *ubd_dev) · 778 unmodified lines
779 779
780static void ubd_device_release(struct device *dev)780static void ubd_device_release(struct device *dev)
781{781{
782 struct ubd *ubd_dev = dev_get_drvdata(dev);782 struct ubd *ubd_dev = container_of(dev, struct ubd, pdev.dev);
783 783
784 blk_mq_free_tag_set(&ubd_dev->tag_set);784 blk_mq_free_tag_set(&ubd_dev->tag_set);
785 *ubd_dev = ((struct ubd) DEFAULT_UBD);785 *ubd_dev = ((struct ubd) DEFAULT_UBD);
@@ -898,6 +898,8 @@ static int ubd_add(int n, char **error_out) · 112 unmodified lines
898 if (err)898 if (err)
899 goto out_cleanup_disk;899 goto out_cleanup_disk;
900 900
901 ubd_dev->disk = disk;
902
901 return 0;903 return 0;
902 904
903out_cleanup_disk:905out_cleanup_disk:
@@ -1499,6 +1501,7 @@ int io_thread(void *arg) · 595 unmodified lines
1499{1501{
1500 int n, count, written, res;1502 int n, count, written, res;
1501 1503
1504 os_set_pdeathsig();
1502 os_fix_helper_signals();1505 os_fix_helper_signals();
1503 1506
1504 while(1){1507 while(1){
arch/um/drivers/vector_kern.c+2−1
@@ -815,7 +815,8 @@ static struct platform_driver uml_net_driver = { · 814 unmodified lines
815 815
816static void vector_device_release(struct device *dev)816static void vector_device_release(struct device *dev)
817{817{
818 struct vector_device *device = dev_get_drvdata(dev);818 struct vector_device *device =
819 container_of(dev, struct vector_device, pdev.dev);
819 struct net_device *netdev = device->dev;820 struct net_device *netdev = device->dev;
820 821
821 list_del(&device->list);822 list_del(&device->list);
arch/um/drivers/vhost_user.h+3−1
@@ -10,6 +10,7 @@ · 9 unmodified lines
10/* Feature bits */10/* Feature bits */
11#define VHOST_USER_F_PROTOCOL_FEATURES 3011#define VHOST_USER_F_PROTOCOL_FEATURES 30
12/* Protocol feature bits */12/* Protocol feature bits */
13#define VHOST_USER_PROTOCOL_F_MQ 0
13#define VHOST_USER_PROTOCOL_F_REPLY_ACK 314#define VHOST_USER_PROTOCOL_F_REPLY_ACK 3
14#define VHOST_USER_PROTOCOL_F_SLAVE_REQ 515#define VHOST_USER_PROTOCOL_F_SLAVE_REQ 5
15#define VHOST_USER_PROTOCOL_F_CONFIG 916#define VHOST_USER_PROTOCOL_F_CONFIG 9
@@ -23,7 +24,8 @@ · 7 unmodified lines
23/* Supported transport features */24/* Supported transport features */
24#define VHOST_USER_SUPPORTED_F BIT_ULL(VHOST_USER_F_PROTOCOL_FEATURES)25#define VHOST_USER_SUPPORTED_F BIT_ULL(VHOST_USER_F_PROTOCOL_FEATURES)

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arch/um/include/asm/pgtable-4level.hrenamed from arch/um/include/asm/pgtable-3level.h+39−20

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drivers/comedi/comedi_fops.c+12−0

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drivers/counter/ftm-quaddec.c+2−1

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drivers/counter/i8254.c+2−2

This diff is large: its 12 lines aren’t shown here.

drivers/counter/intel-qep.c+4−8

This diff is large: its 23 lines aren’t shown here.

drivers/counter/interrupt-cnt.c+1−1

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drivers/counter/microchip-tcb-capture.c+1−1

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drivers/counter/rz-mtu3-cnt.c+1−1

This diff is large: its 6 lines aren’t shown here.

drivers/counter/stm32-lptimer-cnt.c+1−1

This diff is large: its 6 lines aren’t shown here.

drivers/counter/stm32-timer-cnt.c+15−4

This diff is large: its 47 lines aren’t shown here.

drivers/counter/ti-ecap-capture.c+8−3

This diff is large: its 30 lines aren’t shown here.

drivers/counter/ti-eqep.c+2−2

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drivers/cpuidle/cpuidle-kirkwood.c+1−1

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drivers/cpuidle/cpuidle-riscv-sbi.c+9−2

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drivers/crypto/geode-aes.c+1−1

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drivers/crypto/inside-secure/safexcel.c+1−1

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drivers/crypto/intel/iaa/Makefile+1−1

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drivers/crypto/intel/iaa/iaa_crypto_main.c+1−1

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drivers/crypto/intel/qat/qat_420xx/adf_drv.c+9−4

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drivers/crypto/intel/qat/qat_4xxx/adf_drv.c+9−4

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drivers/crypto/intel/qat/qat_c3xxx/adf_drv.c+1−1

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drivers/crypto/intel/qat/qat_c3xxxvf/adf_drv.c+1−1

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drivers/crypto/intel/qat/qat_c62x/adf_drv.c+1−1

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drivers/crypto/intel/qat/qat_c62xvf/adf_drv.c+1−1

This diff is large: its 6 lines aren’t shown here.

drivers/crypto/intel/qat/qat_common/Makefile+1−1

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drivers/crypto/intel/qat/qat_common/adf_ctl_drv.c+1−1

This diff is large: its 6 lines aren’t shown here.

drivers/crypto/intel/qat/qat_dh895xcc/adf_drv.c+1−1

This diff is large: its 6 lines aren’t shown here.

drivers/crypto/intel/qat/qat_dh895xccvf/adf_drv.c+1−1

This diff is large: its 6 lines aren’t shown here.

drivers/crypto/marvell/octeontx2/cn10k_cpt.c+7−7

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drivers/crypto/marvell/octeontx2/otx2_cpt_mbox_common.c+10−10

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drivers/crypto/marvell/octeontx2/otx2_cptlf.c+8−12

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drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c+10−6

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drivers/crypto/marvell/octeontx2/otx2_cptvf_main.c+10−5

This diff is large: its 36 lines aren’t shown here.

drivers/cxl/acpi.c+2−2

This diff is large: its 8 lines aren’t shown here.

drivers/cxl/core/cdat.c+3−3

This diff is large: its 27 lines aren’t shown here.

drivers/cxl/core/hdm.c+6−6

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drivers/cxl/core/mbox.c+11−11

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drivers/cxl/core/memdev.c+10−10

This diff is large: its 90 lines aren’t shown here.

drivers/cxl/core/pci.c+9−9

This diff is large: its 81 lines aren’t shown here.

drivers/cxl/core/pmem.c+7−7

This diff is large: its 58 lines aren’t shown here.

drivers/cxl/core/pmu.c+1−1

This diff is large: its 6 lines aren’t shown here.

drivers/cxl/core/port.c+36−36

This diff is large: its 309 lines aren’t shown here.

drivers/cxl/core/region.c+7−7

This diff is large: its 54 lines aren’t shown here.

drivers/cxl/core/regs.c+11−11

This diff is large: its 96 lines aren’t shown here.

drivers/cxl/core/suspend.c+2−2

This diff is large: its 13 lines aren’t shown here.

drivers/cxl/mem.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/cxl/pci.c+1−1

This diff is large: its 6 lines aren’t shown here.

drivers/cxl/pmem.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/cxl/port.c+2−2

This diff is large: its 16 lines aren’t shown here.

drivers/dax/cxl.c+1−1

This diff is large: its 6 lines aren’t shown here.

drivers/dax/pmem/Makefile+0−7

This diff is large: its 8 lines aren’t shown here.

drivers/dax/pmem/pmem.c+0−10

This diff is large: its 11 lines aren’t shown here.

drivers/devfreq/event/exynos-nocp.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/devfreq/event/exynos-ppmu.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/devfreq/mtk-cci-devfreq.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/devfreq/rk3399_dmc.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/devfreq/sun8i-a33-mbus.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma-buf/dma-buf.c+21−21

This diff is large: its 189 lines aren’t shown here.

drivers/dma/Kconfig+14−14

This diff is large: its 42 lines aren’t shown here.

drivers/dma/Makefile+1−1

This diff is large: its 11 lines aren’t shown here.

drivers/dma/acpi-dma.c+12−31

This diff is large: its 77 lines aren’t shown here.

drivers/dma/altera-msgdma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/amd/qdma/qdma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/apple-admac.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/at_hdmac.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/at_xdmac.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/bcm-sba-raid.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/bcm2835-dma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/bestcomm/bestcomm.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/dma-jz4780.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/dw/platform.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/ep93xx_dma.c+1−2

This diff is large: its 10 lines aren’t shown here.

drivers/dma/fsl-edma-main.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/fsl-qdma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/fsl_raid.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/fsldma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/idma64.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/idxd/Makefile+1−1

This diff is large: its 6 lines aren’t shown here.

drivers/dma/idxd/compat.c+1−1

This diff is large: its 6 lines aren’t shown here.

drivers/dma/idxd/device.c+7−7

This diff is large: its 63 lines aren’t shown here.

drivers/dma/idxd/init.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/idxd/registers.h+4−0

This diff is large: its 11 lines aren’t shown here.

drivers/dma/idxd/submit.c+3−3

This diff is large: its 24 lines aren’t shown here.

drivers/dma/img-mdc-dma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/imx-dma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/imx-sdma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/k3dma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/loongson2-apb-dma.crenamed from drivers/dma/ls2x-apb-dma.c+3−3

This diff is large: its 25 lines aren’t shown here.

drivers/dma/mcf-edma-main.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/mediatek/mtk-cqdma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/mediatek/mtk-hsdma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/mediatek/mtk-uart-apdma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/milbeaut-hdmac.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/milbeaut-xdmac.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/mmp_pdma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/mmp_tdma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/moxart-dma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/mpc512x_dma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/mv_xor_v2.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/dma/nbpfaxi.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/owl-dma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/ppc4xx/adma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/pxa_dma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/qcom/bam_dma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/qcom/hidma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/qcom/qcom_adm.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/sa11x0-dma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/sf-pdma/sf-pdma.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/dma/sh/Kconfig+4−4

This diff is large: its 15 lines aren’t shown here.

drivers/dma/sh/rcar-dmac.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/sh/rz-dmac.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/dma/sh/shdma-base.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/sh/shdmac.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/sh/usb-dmac.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/dma/sprd-dma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/st_fdma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/stm32/stm32-dma3.c+100−21

This diff is large: its 293 lines aren’t shown here.

drivers/dma/sun4i-dma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/sun6i-dma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/tegra186-gpc-dma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/tegra20-apb-dma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/tegra210-adma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/ti/cppi41.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/ti/edma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/ti/omap-dma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/timb_dma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/txx9dmac.c+2−2

This diff is large: its 17 lines aren’t shown here.

drivers/dma/uniphier-mdmac.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/uniphier-xdmac.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/xgene-dma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/xilinx/xdma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/xilinx/xilinx_dma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/xilinx/xilinx_dpdma.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/dma/xilinx/zynqmp_dma.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/edac/altera_edac.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/edac/armada_xp_edac.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/edac/aspeed_edac.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/edac/bluefield_edac.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/edac/cell_edac.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/edac/cpc925_edac.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/edac/dmc520_edac.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/edac/highbank_l2_edac.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/edac/highbank_mc_edac.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/edac/layerscape_edac.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/edac/mpc85xx_edac.c+3−3

This diff is large: its 27 lines aren’t shown here.

drivers/edac/npcm_edac.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/edac/octeon_edac-l2c.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/edac/octeon_edac-lmc.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/edac/octeon_edac-pc.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/edac/octeon_edac-pci.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/edac/qcom_edac.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/edac/synopsys_edac.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/edac/ti_edac.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/edac/versal_edac.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/edac/xgene_edac.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/edac/zynqmp_edac.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/extcon/extcon-adc-jack.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/extcon/extcon-intel-cht-wc.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/extcon/extcon-intel-mrfld.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/extcon/extcon-max3355.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/extcon/extcon-max77843.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/extcon/extcon-rtk-type-c.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/extcon/extcon-usb-gpio.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/extcon/extcon-usbc-cros-ec.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/firewire/core-topology.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/firewire/core.h+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/firewire/ohci.c+5−6

This diff is large: its 42 lines aren’t shown here.

drivers/firmware/arm_scmi/driver.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/firmware/arm_scpi.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/firmware/cirrus/cs_dsp.c+34−34

This diff is large: its 300 lines aren’t shown here.

drivers/firmware/efi/efi-pstore.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/firmware/efi/embedded-firmware.c+2−2

This diff is large: its 12 lines aren’t shown here.

drivers/firmware/efi/vars.c+8−8

This diff is large: its 69 lines aren’t shown here.

drivers/firmware/google/coreboot_table.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/firmware/imx/imx-dsp.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/firmware/memmap.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/firmware/microchip/mpfs-auto-update.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/firmware/mtk-adsp-ipc.c+4−5

This diff is large: its 23 lines aren’t shown here.

drivers/firmware/qemu_fw_cfg.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/firmware/raspberrypi.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/firmware/stratix10-rsu.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/firmware/stratix10-svc.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/firmware/xilinx/zynqmp.c+1−1

This diff is large: its 8 lines aren’t shown here.

drivers/fpga/altera-fpga2sdram.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/fpga/altera-freeze-bridge.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/fpga/altera-hps2fpga.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/fpga/dfl-afu-main.c+4−4

This diff is large: its 17 lines aren’t shown here.

drivers/fpga/dfl-fme-br.c+4−4

This diff is large: its 16 lines aren’t shown here.

drivers/fpga/dfl-fme-main.c+4−4

This diff is large: its 17 lines aren’t shown here.

drivers/fpga/dfl-fme-region.c+4−4

This diff is large: its 16 lines aren’t shown here.

drivers/fpga/dfl-pci.c+4−12

This diff is large: its 37 lines aren’t shown here.

drivers/fpga/intel-m10-bmc-sec-update.c+2−2

This diff is large: its 15 lines aren’t shown here.

drivers/fpga/of-fpga-region.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/fpga/socfpga-a10.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/fpga/stratix10-soc.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/fpga/xilinx-pr-decoupler.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/fpga/zynq-fpga.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/fsi/fsi-master-aspeed.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/fsi/fsi-master-ast-cf.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/fsi/fsi-master-gpio.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/fsi/fsi-occ.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/gpio/gpio-104-dio-48e.c+2−2

This diff is large: its 15 lines aren’t shown here.

drivers/gpio/gpio-104-idio-16.c+1−1

This diff is large: its 6 lines aren’t shown here.

drivers/gpio/gpio-altera.c+5−0

This diff is large: its 12 lines aren’t shown here.

drivers/gpio/gpio-aspeed-sgpio.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/gpio/gpio-aspeed.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/gpio/gpio-elkhartlake.c+1−1

This diff is large: its 6 lines aren’t shown here.

drivers/gpio/gpio-ep93xx.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/gpio/gpio-exar.c+6−4

This diff is large: its 18 lines aren’t shown here.

drivers/gpio/gpio-gpio-mm.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/gpio/gpio-hlwd.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/gpio/gpio-i8255.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/gpio/gpio-idio-16.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/gpio/gpio-ljca.c+1−1

This diff is large: its 6 lines aren’t shown here.

drivers/gpio/gpio-menz127.c+1−1

This diff is large: its 6 lines aren’t shown here.

drivers/gpio/gpio-merrifield.c+9−8

This diff is large: its 39 lines aren’t shown here.

drivers/gpio/gpio-mlxbf2.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/gpio/gpio-mpsse.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/gpio/gpio-omap.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/gpio/gpio-pca953x.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/gpio/gpio-pci-idio-16.c+1−1

This diff is large: its 6 lines aren’t shown here.

drivers/gpio/gpio-pl061.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/gpio/gpio-tangier.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/gpio/gpio-tegra.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/gpio/gpio-tegra186.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/gpio/gpio-tqmx86.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/gpio/gpio-visconti.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/gpio/gpio-xgs-iproc.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/gpio/gpio-zevio.c+6−0

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drivers/gpio/gpiolib-swnode.c+1−1

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drivers/gpu/drm/amd/amdgpu/aldebaran.c+4−0

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drivers/gpu/drm/amd/amdgpu/amdgpu.h+1−0

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drivers/gpu/drm/amd/amdgpu/amdgpu_device.c+24−5

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drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c+5−3

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drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c+4−2

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drivers/gpu/drm/amd/amdgpu/amdgpu_preempt_mgr.c+2−1

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drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c+1−1

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drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c+5−5

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drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c+5−0

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drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h+2−0

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drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c+4−2

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drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c+1−1

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drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c+3−3

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drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c+37−0

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drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h+4−0

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drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c+4−2

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drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c+41−0

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drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h+2−0

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drivers/gpu/drm/amd/amdgpu/df_v3_6.c+2−2

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drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c+14−4

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drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c+1−1

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drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c+1−1

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drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c+1−1

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drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c+1−1

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drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c+1−1

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drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c+1−1

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drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c+9−0

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drivers/gpu/drm/amd/amdgpu/sienna_cichlid.c+2−0

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drivers/gpu/drm/amd/amdgpu/smu_v13_0_10.c+2−0

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drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c+9−0

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drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c+31−8

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drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c+10−0

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drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c+6−1

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drivers/gpu/drm/amd/display/Kconfig+8−7

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drivers/gpu/drm/amd/display/dc/core/dc.c+5−2

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drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c+3−0

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drivers/gpu/drm/amd/display/dc/core/dc_resource.c+8−0

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drivers/gpu/drm/amd/display/dc/dc.h+1−1

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drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c+9−6

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drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c+6−0

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drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c+22−1

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drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c+5−8

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drivers/gpu/drm/amd/display/dc/hubbub/dcn10/dcn10_hubbub.h+7−1

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drivers/gpu/drm/amd/display/dc/hubbub/dcn20/dcn20_hubbub.h+1−0

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drivers/gpu/drm/amd/display/dc/hubbub/dcn401/dcn401_hubbub.c+22−2

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drivers/gpu/drm/amd/display/dc/hubbub/dcn401/dcn401_hubbub.h+6−1

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drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c+3−3

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drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c+8−5

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drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h+1−1

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drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.h+2−1

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drivers/gpu/drm/amd/display/dc/spl/dc_spl.c+66−31

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drivers/gpu/drm/amd/display/dc/spl/dc_spl.h+2−0

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drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_11_0_offset.h+2−0

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drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_11_0_sh_mask.h+13−0

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drivers/gpu/drm/amd/include/kgd_pp_interface.h+114−4

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drivers/gpu/drm/amd/pm/powerplay/smumgr/vega12_smumgr.c+11−13

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drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c+6−2

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drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h+1−1

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drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c+5−1

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drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c+7−5

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drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c+2−0

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drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c+1−1

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drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c+27−6

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drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c+3−0

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drivers/gpu/drm/arm/display/komeda/komeda_drv.c+1−1

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drivers/gpu/drm/arm/hdlcd_drv.c+1−1

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drivers/gpu/drm/arm/malidp_drv.c+1−1

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drivers/gpu/drm/armada/armada_crtc.c+1−1

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drivers/gpu/drm/armada/armada_drv.c+1−1

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drivers/gpu/drm/armada/armada_gem.c+1−1

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drivers/gpu/drm/aspeed/aspeed_gfx_drv.c+1−1

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drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c+1−1

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drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c+1−1

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drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c+1−1

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drivers/gpu/drm/bridge/display-connector.c+1−1

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drivers/gpu/drm/bridge/fsl-ldb.c+1−1

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drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c+1−1

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drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c+1−1

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drivers/gpu/drm/bridge/imx/imx8qm-ldb.c+1−1

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drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c+1−1

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drivers/gpu/drm/bridge/imx/imx8qxp-pixel-combiner.c+1−1

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drivers/gpu/drm/bridge/imx/imx8qxp-pixel-link.c+1−1

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drivers/gpu/drm/bridge/imx/imx8qxp-pxl2dpi.c+1−1

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drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c+1−1

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drivers/gpu/drm/bridge/lvds-codec.c+1−1

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drivers/gpu/drm/bridge/nwl-dsi.c+1−1

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drivers/gpu/drm/bridge/samsung-dsim.c+1−1

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drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c+1−1

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drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c+1−1

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drivers/gpu/drm/bridge/synopsys/dw-hdmi-gp-audio.c+1−1

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drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c+1−1

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drivers/gpu/drm/bridge/thc63lvd1024.c+1−1

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drivers/gpu/drm/bridge/ti-tfp410.c+1−1

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drivers/gpu/drm/bridge/ti-tpd12s015.c+1−1

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drivers/gpu/drm/display/drm_dp_aux_bus.c+1−1

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drivers/gpu/drm/drm_framebuffer.c+1−1

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drivers/gpu/drm/drm_gem_dma_helper.c+1−1

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drivers/gpu/drm/drm_gem_framebuffer_helper.c+1−1

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drivers/gpu/drm/drm_gem_shmem_helper.c+2−2

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drivers/gpu/drm/drm_panic_qr.rs+12−11

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drivers/gpu/drm/drm_prime.c+1−1

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drivers/gpu/drm/etnaviv/etnaviv_drv.c+1−1

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drivers/gpu/drm/etnaviv/etnaviv_gem_prime.c+1−1

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drivers/gpu/drm/etnaviv/etnaviv_gpu.c+1−1

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drivers/gpu/drm/exynos/exynos5433_drm_decon.c+1−1

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drivers/gpu/drm/exynos/exynos7_drm_decon.c+1−1

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drivers/gpu/drm/exynos/exynos_dp.c+1−1

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drivers/gpu/drm/exynos/exynos_drm_drv.c+1−1

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drivers/gpu/drm/exynos/exynos_drm_dsi.c+1−1

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drivers/gpu/drm/exynos/exynos_drm_fimc.c+1−1

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drivers/gpu/drm/exynos/exynos_drm_fimd.c+1−1

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drivers/gpu/drm/exynos/exynos_drm_g2d.c+1−1

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drivers/gpu/drm/exynos/exynos_drm_gem.c+1−1

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drivers/gpu/drm/exynos/exynos_drm_gsc.c+1−1

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drivers/gpu/drm/exynos/exynos_drm_mic.c+1−1

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drivers/gpu/drm/exynos/exynos_drm_rotator.c+1−1

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drivers/gpu/drm/exynos/exynos_drm_scaler.c+1−1

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drivers/gpu/drm/exynos/exynos_drm_vidi.c+1−1

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drivers/gpu/drm/exynos/exynos_hdmi.c+1−1

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drivers/gpu/drm/exynos/exynos_mixer.c+1−1

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drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c+1−1

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drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c+1−1

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drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c+1−1

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drivers/gpu/drm/i915/display/intel_hdcp.c+20−12

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drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c+1−1

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drivers/gpu/drm/i915/gvt/kvmgt.c+2−2

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drivers/gpu/drm/i915/i915_gpu_error.c+3−3

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drivers/gpu/drm/i915/intel_gvt.c+37−37

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drivers/gpu/drm/i915/intel_gvt_mmio_table.c+1−1

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drivers/gpu/drm/imagination/pvr_drv.c+2−2

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drivers/gpu/drm/imx/dcss/dcss-drv.c+1−1

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drivers/gpu/drm/imx/ipuv3/dw_hdmi-imx.c+1−1

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drivers/gpu/drm/imx/ipuv3/imx-drm-core.c+1−1

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drivers/gpu/drm/imx/ipuv3/imx-ldb.c+1−1

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drivers/gpu/drm/imx/ipuv3/imx-tve.c+1−1

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drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c+1−1

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drivers/gpu/drm/imx/ipuv3/parallel-display.c+1−1

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drivers/gpu/drm/imx/lcdc/imx-lcdc.c+1−1

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drivers/gpu/drm/ingenic/ingenic-drm-drv.c+1−1

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drivers/gpu/drm/ingenic/ingenic-ipu.c+1−1

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drivers/gpu/drm/kmb/kmb_drv.c+1−1

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drivers/gpu/drm/lima/lima_drv.c+1−1

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drivers/gpu/drm/logicvc/logicvc_drm.c+1−1

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drivers/gpu/drm/mcde/mcde_drv.c+1−1

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drivers/gpu/drm/mcde/mcde_dsi.c+1−1

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drivers/gpu/drm/mediatek/mtk_cec.c+1−1

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drivers/gpu/drm/mediatek/mtk_disp_aal.c+1−1

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drivers/gpu/drm/mediatek/mtk_disp_ccorr.c+1−1

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drivers/gpu/drm/mediatek/mtk_disp_color.c+1−1

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drivers/gpu/drm/mediatek/mtk_disp_gamma.c+1−1

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drivers/gpu/drm/mediatek/mtk_disp_merge.c+1−1

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drivers/gpu/drm/mediatek/mtk_disp_ovl.c+1−1

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drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c+1−1

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drivers/gpu/drm/mediatek/mtk_disp_rdma.c+1−1

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drivers/gpu/drm/mediatek/mtk_dp.c+1−1

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drivers/gpu/drm/mediatek/mtk_dpi.c+1−1

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drivers/gpu/drm/mediatek/mtk_drm_drv.c+1−1

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drivers/gpu/drm/mediatek/mtk_dsi.c+1−1

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drivers/gpu/drm/mediatek/mtk_ethdr.c+1−1

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drivers/gpu/drm/mediatek/mtk_hdmi.c+1−1

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drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c+1−1

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drivers/gpu/drm/mediatek/mtk_mdp_rdma.c+1−1

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drivers/gpu/drm/mediatek/mtk_padding.c+1−1

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drivers/gpu/drm/meson/meson_drv.c+1−1

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drivers/gpu/drm/meson/meson_dw_hdmi.c+1−1

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drivers/gpu/drm/meson/meson_dw_mipi_dsi.c+1−1

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drivers/gpu/drm/msm/adreno/adreno_device.c+1−1

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drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c+1−1

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drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c+1−1

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drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c+1−1

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drivers/gpu/drm/msm/dp/dp_display.c+1−1

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drivers/gpu/drm/msm/dsi/dsi.c+1−1

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drivers/gpu/drm/msm/hdmi/hdmi.c+1−1

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drivers/gpu/drm/msm/hdmi/hdmi_phy.c+1−1

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drivers/gpu/drm/msm/msm_drv.c+1−1

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drivers/gpu/drm/msm/msm_mdss.c+1−1

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drivers/gpu/drm/mxsfb/lcdif_drv.c+1−1

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drivers/gpu/drm/mxsfb/mxsfb_drv.c+1−1

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drivers/gpu/drm/nouveau/nouveau_platform.c+1−1

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drivers/gpu/drm/omapdrm/dss/dispc.c+1−1

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drivers/gpu/drm/omapdrm/dss/dsi.c+1−1

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drivers/gpu/drm/omapdrm/dss/dss.c+1−1

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drivers/gpu/drm/omapdrm/dss/hdmi4.c+1−1

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drivers/gpu/drm/omapdrm/dss/hdmi5.c+1−1

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drivers/gpu/drm/omapdrm/dss/venc.c+1−1

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drivers/gpu/drm/omapdrm/omap_dmm_tiler.c+1−1

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drivers/gpu/drm/omapdrm/omap_drv.c+1−1

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drivers/gpu/drm/omapdrm/omap_gem_dmabuf.c+1−1

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drivers/gpu/drm/panel/panel-edp.c+1−1

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drivers/gpu/drm/panel/panel-seiko-43wvf1g.c+1−1

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drivers/gpu/drm/panel/panel-sharp-ls037v7dw01.c+1−1

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drivers/gpu/drm/panfrost/panfrost_drv.c+1−1

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drivers/gpu/drm/panthor/panthor_drv.c+1−1

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drivers/gpu/drm/radeon/radeon_audio.c+8−4

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drivers/gpu/drm/radeon/radeon_connectors.c+0−10

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drivers/gpu/drm/radeon/radeon_drv.c+1−2

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drivers/gpu/drm/radeon/radeon_ttm.c+1−2

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drivers/gpu/drm/renesas/rcar-du/rcar_cmm.c+1−1

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drivers/gpu/drm/renesas/rcar-du/rcar_dw_hdmi.c+1−1

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drivers/gpu/drm/renesas/rcar-du/rcar_lvds.c+1−1

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drivers/gpu/drm/renesas/rz-du/rzg2l_du_drv.c+1−1

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drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c+1−1

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drivers/gpu/drm/renesas/shmobile/shmob_drm_drv.c+1−1

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drivers/gpu/drm/rockchip/analogix_dp-rockchip.c+1−1

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drivers/gpu/drm/rockchip/cdn-dp-core.c+1−1

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drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c+1−1

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drivers/gpu/drm/rockchip/inno_hdmi.c+1−1

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drivers/gpu/drm/rockchip/rk3066_hdmi.c+1−1

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drivers/gpu/drm/rockchip/rockchip_lvds.c+1−1

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drivers/gpu/drm/rockchip/rockchip_vop2_reg.c+1−1

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drivers/gpu/drm/solomon/ssd130x-i2c.c+1−1

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drivers/gpu/drm/sprd/sprd_dpu.c+1−1

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drivers/gpu/drm/sti/sti_compositor.c+1−1

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drivers/gpu/drm/sti/sti_hda.c+1−1

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drivers/gpu/drm/sti/sti_hdmi.c+1−1

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drivers/gpu/drm/sti/sti_hqvdp.c+1−1

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drivers/gpu/drm/sti/sti_tvout.c+1−1

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drivers/gpu/drm/stm/drv.c+1−1

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drivers/gpu/drm/stm/dw_mipi_dsi-stm.c+1−1

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drivers/gpu/drm/sun4i/sun4i_backend.c+1−1

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drivers/gpu/drm/sun4i/sun4i_frontend.c+1−1

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drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c+1−1

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drivers/gpu/drm/sun4i/sun4i_tv.c+1−1

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drivers/gpu/drm/sun4i/sun6i_drc.c+1−1

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drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c+1−1

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drivers/gpu/drm/sun4i/sun8i_mixer.c+1−1

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drivers/gpu/drm/sun4i/sun8i_tcon_top.c+1−1

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drivers/gpu/drm/tegra/hub.c+1−1

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drivers/gpu/drm/tegra/vic.c+1−1

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drivers/gpu/drm/tidss/tidss_drv.c+1−1

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drivers/gpu/drm/tilcdc/tilcdc_drv.c+1−1

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drivers/gpu/drm/tilcdc/tilcdc_panel.c+1−1

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drivers/gpu/drm/tiny/arcpgu.c+1−1

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drivers/gpu/drm/tve200/tve200_drv.c+1−1

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drivers/gpu/drm/v3d/v3d_drv.c+1−1

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drivers/gpu/drm/vc4/vc4_crtc.c+1−1

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drivers/gpu/drm/vc4/vc4_dpi.c+1−1

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drivers/gpu/drm/vc4/vc4_drv.c+1−1

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drivers/gpu/drm/vc4/vc4_dsi.c+1−1

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drivers/gpu/drm/vc4/vc4_hdmi.c+1−1

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drivers/gpu/drm/vc4/vc4_hvs.c+1−1

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drivers/gpu/drm/vc4/vc4_txp.c+1−1

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drivers/gpu/drm/vc4/vc4_v3d.c+1−1

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drivers/gpu/drm/vc4/vc4_vec.c+1−1

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drivers/gpu/drm/vmwgfx/ttm_object.c+1−1

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drivers/gpu/drm/xe/tests/xe_live_test_mod.c+1−1

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drivers/gpu/drm/xe/xe_devcoredump.c+6−0

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drivers/gpu/drm/xe/xe_device.c+2−1

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drivers/gpu/drm/xe/xe_dma_buf.c+1−1

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drivers/gpu/drm/xe/xe_guc_submit.c+25−9

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drivers/gpu/drm/xe/xe_migrate.c+4−2

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drivers/gpu/drm/xe/xe_sync.c+5−1

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drivers/gpu/drm/xlnx/zynqmp_dpsub.c+1−1

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drivers/gpu/host1x/dev.c+1−1

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drivers/gpu/ipu-v3/ipu-common.c+1−1

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drivers/gpu/ipu-v3/ipu-pre.c+1−1

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drivers/gpu/ipu-v3/ipu-prg.c+1−1

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drivers/greybus/interface.c+1−1

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drivers/hid/hid-core.c+10−17

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drivers/hid/hid-google-hammer.c+1−1

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drivers/hid/hid-roccat-arvo.c+10−10

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drivers/hid/hid-roccat-common.h+11−11

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drivers/hid/hid-roccat-isku.c+11−11

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drivers/hid/hid-roccat-kone.c+11−11

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drivers/hid/hid-roccat-koneplus.c+21−21

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drivers/hid/hid-roccat-konepure.c+2−2

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drivers/hid/hid-roccat-kovaplus.c+19−19

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drivers/hid/hid-roccat-lua.c+5−5

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drivers/hid/hid-roccat-pyra.c+25−25

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drivers/hid/hid-roccat-ryos.c+2−2

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drivers/hid/hid-roccat-savu.c+2−2

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drivers/hid/hid-sensor-custom.c+1−1

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drivers/hid/hid-uclogic-rdesc-test.c+1−1

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drivers/hid/surface-hid/surface_kbd.c+1−1

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drivers/hsi/controllers/omap_ssi_core.c+1−1

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drivers/hsi/controllers/omap_ssi_port.c+1−1

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drivers/hte/hte-tegra194-test.c+1−1

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drivers/hv/vmbus_drv.c+1−1

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drivers/hwmon/aquacomputer_d5next.c+1−1

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drivers/hwmon/intel-m10-bmc-hwmon.c+1−1

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drivers/hwmon/nct6775-core.c+1−1

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drivers/hwmon/nct6775-i2c.c+1−1

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drivers/hwmon/nct6775-platform.c+1−1

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drivers/hwmon/peci/cputemp.c+1−1

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drivers/hwmon/peci/dimmtemp.c+1−1

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drivers/hwmon/pmbus/acbel-fsg032.c+1−1

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drivers/hwmon/pmbus/adm1266.c+1−1

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drivers/hwmon/pmbus/adm1275.c+1−1

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drivers/hwmon/pmbus/adp1050.c+1−1

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drivers/hwmon/pmbus/bel-pfe.c+1−1

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drivers/hwmon/pmbus/bpa-rs600.c+1−1

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drivers/hwmon/pmbus/delta-ahe50dc-fan.c+1−1

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drivers/hwmon/pmbus/dps920ab.c+1−1

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drivers/hwmon/pmbus/fsp-3y.c+1−1

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drivers/hwmon/pmbus/ibm-cffps.c+1−1

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drivers/hwmon/pmbus/inspur-ipsps.c+1−1

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drivers/hwmon/pmbus/ir35221.c+1−1

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drivers/hwmon/pmbus/ir36021.c+1−1

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drivers/hwmon/pmbus/ir38064.c+1−1

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drivers/hwmon/pmbus/irps5401.c+1−1

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drivers/hwmon/pmbus/isl68137.c+1−1

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drivers/hwmon/pmbus/lm25066.c+1−1

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drivers/hwmon/pmbus/lt7182s.c+1−1

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drivers/hwmon/pmbus/ltc2978.c+1−1

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drivers/hwmon/pmbus/ltc3815.c+1−1

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drivers/hwmon/pmbus/max15301.c+1−1

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drivers/hwmon/pmbus/max16064.c+1−1

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drivers/hwmon/pmbus/max20730.c+1−1

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drivers/hwmon/pmbus/max20751.c+1−1

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drivers/hwmon/pmbus/max8688.c+1−1

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drivers/hwmon/pmbus/mp2856.c+1−1

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drivers/hwmon/pmbus/mp5023.c+1−1

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drivers/hwmon/pmbus/mp5990.c+1−1

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drivers/hwmon/pmbus/mp9941.c+1−1

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drivers/hwmon/pmbus/mpq7932.c+1−1

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drivers/hwmon/pmbus/mpq8785.c+1−1

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drivers/hwmon/pmbus/pim4328.c+1−1

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drivers/hwmon/pmbus/pli1209bc.c+1−1

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drivers/hwmon/pmbus/pm6764tr.c+1−1

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drivers/hwmon/pmbus/pmbus.c+1−1

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drivers/hwmon/pmbus/pmbus_core.c+21−21

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drivers/hwmon/pmbus/pxe1610.c+1−1

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drivers/hwmon/pmbus/q54sj108a2.c+1−1

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drivers/hwmon/pmbus/stpddc60.c+1−1

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drivers/hwmon/pmbus/tda38640.c+1−1

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drivers/hwmon/pmbus/tps40422.c+1−1

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drivers/hwmon/pmbus/tps53679.c+1−1

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drivers/hwmon/pmbus/tps546d24.c+1−1

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drivers/hwmon/pmbus/ucd9000.c+1−1

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drivers/hwmon/pmbus/ucd9200.c+1−1

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drivers/hwmon/pmbus/xdp710.c+1−1

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drivers/hwmon/pmbus/xdpe12284.c+1−1

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drivers/hwmon/pmbus/xdpe152c4.c+1−1

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drivers/hwmon/pmbus/zl6100.c+1−1

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drivers/hwmon/tmp108.c+0−5

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drivers/hwmon/tps23861.c+1−1

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drivers/hwspinlock/u8500_hsem.c+1−1

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drivers/hwtracing/coresight/coresight-catu.c+1−1

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drivers/hwtracing/coresight/coresight-cpu-debug.c+1−1

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drivers/hwtracing/coresight/coresight-dummy.c+1−1

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drivers/hwtracing/coresight/coresight-etm4x-core.c+1−1

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drivers/hwtracing/coresight/coresight-funnel.c+1−1

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drivers/hwtracing/coresight/coresight-replicator.c+1−1

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drivers/hwtracing/coresight/coresight-tmc-core.c+1−1

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drivers/hwtracing/coresight/coresight-tpiu.c+1−1

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drivers/hwtracing/coresight/coresight-trbe.c+1−1

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drivers/hwtracing/coresight/ultrasoc-smb.c+1−1

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drivers/i2c/Makefile+1−0

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drivers/i2c/busses/i2c-amd-asf-plat.c+1−1

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drivers/i2c/busses/i2c-cgbc.c+1−1

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drivers/i2c/busses/i2c-designware-common.c+6−1

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drivers/i2c/busses/i2c-designware-core.h+6−0

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drivers/i2c/busses/i2c-designware-master.c+23−4

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drivers/i2c/busses/i2c-designware-pcidrv.c+2−2

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drivers/i2c/busses/i2c-designware-platdrv.c+3−2

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drivers/i2c/busses/i2c-designware-slave.c+2−2

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drivers/i2c/busses/i2c-ljca.c+1−1

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drivers/i2c/busses/i2c-nomadik.c+53−34

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drivers/nvmem/mtk-efuse.c+1−1

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drivers/nvmem/rcar-efuse.c+142−0

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drivers/of/Kconfig+6−0

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drivers/of/base.c+36−0

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drivers/of/unittest.c+3−3

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drivers/opp/opp.h+0−2

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drivers/parisc/led.c+1−1

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drivers/parport/parport_amiga.c+1−1

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drivers/parport/parport_sunbpp.c+1−1

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drivers/pci/Kconfig+10−1

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drivers/pci/Makefile+2−1

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drivers/pci/bus.c+88−44

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drivers/pci/controller/cadence/pci-j721e.c+24−15

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drivers/pci/controller/cadence/pcie-cadence.c+2−2

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drivers/pci/controller/dwc/pci-exynos.c+1−1

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drivers/pci/controller/dwc/pci-imx6.c+46−11

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drivers/pci/controller/dwc/pci-keystone.c+13−1

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drivers/pci/controller/dwc/pcie-bt1.c+1−1

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drivers/pci/controller/dwc/pcie-designware-ep.c+27−11

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drivers/pci/controller/dwc/pcie-designware-host.c+2−2

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drivers/pci/controller/dwc/pcie-histb.c+1−1

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drivers/pci/controller/dwc/pcie-intel-gw.c+1−1

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drivers/pci/controller/dwc/pcie-kirin.c+1−1

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drivers/pci/controller/dwc/pcie-qcom-ep.c+5−3

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drivers/pci/controller/dwc/pcie-qcom.c+16−3

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drivers/pci/controller/dwc/pcie-rcar-gen4.c+1−1

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drivers/pci/controller/dwc/pcie-tegra194.c+5−4

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drivers/pci/controller/pci-aardvark.c+1−1

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drivers/pci/controller/pci-host-generic.c+1−1

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drivers/pci/controller/pci-mvebu.c+1−1

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drivers/pci/controller/pci-tegra.c+2−2

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drivers/pci/controller/pci-thunder-pem.c+2−2

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drivers/pci/controller/pci-xgene-msi.c+1−1

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drivers/pci/controller/pcie-altera-msi.c+1−1

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drivers/pci/controller/pcie-altera.c+3−3

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drivers/pci/controller/pcie-brcmstb.c+1−1

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drivers/pci/controller/pcie-hisi-error.c+1−1

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drivers/pci/controller/pcie-iproc-platform.c+1−1

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drivers/pci/controller/pcie-mediatek-gen3.c+74−3

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drivers/pci/controller/pcie-mediatek.c+1−1

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drivers/pci/controller/pcie-mt7621.c+1−1

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drivers/pci/controller/pcie-rcar-host.c+2−2

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drivers/pci/controller/pcie-rockchip-ep.c+357−83

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drivers/pci/controller/pcie-rockchip-host.c+3−3

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drivers/pci/controller/pcie-rockchip.c+12−9

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drivers/pci/controller/pcie-rockchip.h+23−1

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drivers/pci/controller/pcie-xilinx-nwl.c+1−1

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drivers/pci/controller/plda/pcie-microchip-host.c+67−59

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drivers/pci/controller/plda/pcie-starfive.c+8−4

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drivers/pci/controller/vmd.c+13−4

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drivers/pci/devres.c+8−59

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drivers/pci/doe.c+13−1

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drivers/pci/ecam.c+1−1

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drivers/pci/endpoint/functions/pci-epf-mhi.c+6−0

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drivers/pci/endpoint/functions/pci-epf-test.c+195−183

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drivers/pci/endpoint/pci-epc-core.c+139−54

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drivers/pci/endpoint/pci-epc-mem.c+6−3

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drivers/pci/hotplug/Kconfig+10−0

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drivers/pci/hotplug/Makefile+1−0

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drivers/pci/hotplug/acpiphp_ampere_altra.c+1−1

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drivers/pci/hotplug/cpci_hotplug.h+0−1

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drivers/pci/hotplug/cpqphp_pci.c+19−28

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drivers/pci/hotplug/cpqphp_sysfs.c+0−1

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drivers/pci/hotplug/octep_hp.c+427−0

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drivers/pci/hotplug/pci_hotplug_core.c+1−7

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drivers/pci/hotplug/pciehp_ctrl.c+5−0

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drivers/pci/hotplug/pciehp_hpc.c+1−1

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drivers/pci/iov.c+3−3

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drivers/pci/of.c+27−0

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drivers/pci/of_property.c+1−1

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drivers/pci/p2pdma.c+1−1

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drivers/pci/pci-sysfs.c+49−19

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drivers/pci/pci.c+56−22

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drivers/pci/pci.h+74−5

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drivers/pci/pcie/Makefile+1−1

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drivers/pci/pcie/aer.c+11−8

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drivers/pci/pcie/aspm.c+56−42

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drivers/pci/pcie/bwctrl.c+366−0

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drivers/pci/pcie/portdrv.c+5−4

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drivers/pci/pcie/portdrv.h+4−2

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drivers/pci/probe.c+55−22

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drivers/pci/pwrctl/Makefile+0−6

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drivers/pci/pwrctl/core.c+0−157

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drivers/pci/pwrctrl/Kconfigrenamed from drivers/pci/pwrctl/Kconfig+0−0

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drivers/pci/pwrctrl/Makefile+6−0

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drivers/pci/pwrctrl/core.c+148−0

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drivers/pci/pwrctrl/pci-pwrctrl-pwrseq.crenamed from drivers/pci/pwrctl/pci-pwrctl-pwrseq.c+25−25

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drivers/pci/quirks.c+36−34

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drivers/pci/remove.c+20−17

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drivers/pci/setup-bus.c+19−22

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drivers/pci/setup-res.c+3−4

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drivers/pci/slot.c+14−10

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drivers/pci/tph.c+547−0

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drivers/pci/vpd.c+1−1

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drivers/pcmcia/bcm63xx_pcmcia.c+1−1

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drivers/pcmcia/db1xxx_ss.c+1−1

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drivers/pcmcia/electra_cf.c+1−1

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drivers/pcmcia/omap_cf.c+1−1

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drivers/pcmcia/pxa2xx_base.c+1−1

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drivers/pcmcia/sa1100_generic.c+1−1

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drivers/pcmcia/xxs1500_ss.c+1−1

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drivers/peci/controller/peci-aspeed.c+1−1

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drivers/peci/controller/peci-npcm.c+2−2

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drivers/peci/core.c+1−1

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drivers/peci/cpu.c+6−6

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drivers/peci/device.c+2−2

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drivers/peci/request.c+15−15

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drivers/perf/arm-cmn.c+2−2

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drivers/perf/arm-ni.c+0−1

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drivers/perf/arm_smmuv3_pmu.c+11−8

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drivers/perf/cxl_pmu.c+1−1

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drivers/phy/Kconfig+11−0

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drivers/phy/Makefile+1−0

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drivers/phy/allwinner/phy-sun4i-usb.c+4−4

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drivers/phy/broadcom/phy-bcm-ns-usb2.c+15−39

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drivers/phy/broadcom/phy-brcm-usb-init.c+215−220

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drivers/phy/broadcom/phy-brcm-usb.c+1−1

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drivers/phy/cadence/cdns-dphy.c+1−1

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drivers/phy/cadence/phy-cadence-sierra.c+1−1

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drivers/phy/cadence/phy-cadence-torrent.c+2−2

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drivers/phy/freescale/phy-fsl-imx8qm-lvds-phy.c+3−3

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drivers/phy/freescale/phy-fsl-lynx-28g.c+3−3

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drivers/phy/freescale/phy-fsl-samsung-hdmi.c+327−281

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drivers/phy/intel/phy-intel-lgm-combo.c+1−1

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drivers/phy/marvell/phy-mvebu-cp110-utmi.c+16−0

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drivers/phy/microchip/sparx5_serdes.c+159−36

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drivers/phy/microchip/sparx5_serdes.h+39−5

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drivers/phy/microchip/sparx5_serdes_regs.h+492−254

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drivers/phy/motorola/phy-cpcap-usb.c+1−1

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drivers/phy/motorola/phy-mapphone-mdm6600.c+1−1

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drivers/phy/phy-airoha-pcie-regs.h+3−3

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drivers/phy/phy-airoha-pcie.c+4−4

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drivers/phy/phy-lgm-usb.c+1−1

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drivers/phy/phy-nxp-ptn3222.c+123−0

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drivers/phy/qualcomm/phy-qcom-apq8064-sata.c+5−5

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drivers/phy/qualcomm/phy-qcom-edp.c+50−24

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drivers/phy/qualcomm/phy-qcom-eusb2-repeater.c+1−1

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drivers/phy/qualcomm/phy-qcom-ipq806x-sata.c+4−4

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drivers/phy/qualcomm/phy-qcom-qmp-combo.c+4−4

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drivers/phy/qualcomm/phy-qcom-qmp-pcie.c+214−0

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drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v6_30.h+25−0

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drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6_30.h+19−0

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drivers/phy/qualcomm/phy-qcom-qmp-usb.c+65−0

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drivers/phy/realtek/phy-rtk-usb2.c+3−1

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drivers/phy/realtek/phy-rtk-usb3.c+3−1

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drivers/phy/renesas/phy-rcar-gen3-pcie.c+4−4

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drivers/phy/renesas/phy-rcar-gen3-usb2.c+1−1

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drivers/phy/renesas/phy-rcar-gen3-usb3.c+4−4

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drivers/phy/renesas/r8a779f0-ether-serdes.c+1−1

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drivers/phy/rockchip/phy-rockchip-inno-csidphy.c+1−1

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drivers/phy/rockchip/phy-rockchip-inno-dsidphy.c+1−1

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drivers/phy/rockchip/phy-rockchip-inno-hdmi.c+2−2

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drivers/phy/rockchip/phy-rockchip-inno-usb2.c+159−41

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drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c+1−16

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drivers/phy/rockchip/phy-rockchip-typec.c+1−1

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drivers/phy/rockchip/phy-rockchip-usbdp.c+41−0

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drivers/phy/st/Kconfig+11−0

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drivers/phy/st/Makefile+1−0

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drivers/phy/st/phy-stm32-combophy.c+598−0

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drivers/phy/st/phy-stm32-usbphyc.c+1−1

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drivers/phy/tegra/xusb.c+2−2

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drivers/phy/ti/phy-am654-serdes.c+1−1

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drivers/phy/ti/phy-da8xx-usb.c+2−2

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drivers/phy/ti/phy-dm816x-usb.c+1−1

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drivers/phy/ti/phy-gmii-sel.c+2−1

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drivers/phy/ti/phy-j721e-wiz.c+1−1

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drivers/phy/ti/phy-omap-usb2.c+1−1

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drivers/phy/ti/phy-ti-pipe3.c+1−1

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drivers/phy/ti/phy-twl4030-usb.c+1−1

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drivers/phy/xilinx/phy-zynqmp.c+1−1

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drivers/pinctrl/Kconfig+26−0

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drivers/pinctrl/Makefile+3−0

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drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c+4−0

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drivers/pinctrl/bcm/pinctrl-iproc-gpio.c+1−1

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drivers/pinctrl/cirrus/pinctrl-madera-core.c+1−1

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drivers/pinctrl/core.c+3−0

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drivers/pinctrl/core.h+1−0

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drivers/pinctrl/freescale/Kconfig+65−28

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drivers/pinctrl/freescale/pinctrl-imx.c+3−3

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drivers/pinctrl/freescale/pinctrl-imx1.c+114−114

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drivers/pinctrl/freescale/pinctrl-imx27.c+175−175

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drivers/pinctrl/intel/pinctrl-alderlake.c+1−1

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drivers/pinctrl/intel/pinctrl-baytrail.c+1−1

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drivers/pinctrl/intel/pinctrl-broxton.c+1−1

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drivers/pinctrl/intel/pinctrl-cannonlake.c+1−1

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drivers/pinctrl/intel/pinctrl-cedarfork.c+1−1

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drivers/pinctrl/intel/pinctrl-cherryview.c+2−2

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drivers/pinctrl/intel/pinctrl-denverton.c+1−1

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drivers/pinctrl/intel/pinctrl-elkhartlake.c+39−1

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drivers/pinctrl/intel/pinctrl-emmitsburg.c+1−1

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drivers/pinctrl/intel/pinctrl-geminilake.c+1−1

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drivers/pinctrl/intel/pinctrl-icelake.c+1−1

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drivers/pinctrl/intel/pinctrl-intel-platform.c+1−1

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drivers/power/supply/max77693_charger.c+1−1

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drivers/power/supply/max77976_charger.c+2−1

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drivers/power/supply/max8925_power.c+2−2

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drivers/power/supply/qcom_battmgr.c+1−1

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drivers/power/supply/qcom_pmi8998_charger.c+1−1

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drivers/power/supply/qcom_smbb.c+4−4

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drivers/power/supply/rk817_charger.c+65−47

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drivers/power/supply/rt9471.c+33−19

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drivers/power/supply/samsung-sdi-battery.c+5−5

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drivers/power/supply/sc2731_charger.c+1−1

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drivers/power/supply/sc27xx_fuel_gauge.c+8−4

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drivers/power/supply/tps65090-charger.c+1−1

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drivers/power/supply/tps65217_charger.c+1−1

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drivers/power/supply/twl4030_charger.c+1−1

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drivers/power/supply/twl6030_charger.c+581−0

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drivers/power/supply/wm831x_power.c+1−1

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drivers/power/supply/wm8350_power.c+1−1

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drivers/power/supply/wm97xx_battery.c+1−1

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drivers/powercap/idle_inject.c+8−8

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drivers/powercap/intel_rapl_msr.c+1−1

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drivers/powercap/intel_rapl_tpmi.c+1−1

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drivers/pps/clients/pps-gpio.c+1−1

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drivers/ptp/ptp_clockmatrix.c+1−1

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drivers/ptp/ptp_dte.c+1−1

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drivers/ptp/ptp_fc3.c+1−1

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drivers/ptp/ptp_idt82p33.c+1−1

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drivers/ptp/ptp_ines.c+1−1

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drivers/ptp/ptp_qoriq.c+1−1

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drivers/ptp/ptp_vmclock.c+1−1

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drivers/pwm/core.c+1−1

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drivers/pwm/pwm-dwc-core.c+1−1

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drivers/pwm/pwm-dwc.h+1−1

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drivers/pwm/pwm-lpss-pci.c+1−1

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drivers/pwm/pwm-lpss-platform.c+1−1

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drivers/pwm/pwm-lpss.c+1−1

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drivers/regulator/core.c+2−1

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drivers/regulator/qcom-rpmh-regulator.c+36−47

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drivers/remoteproc/Kconfig+7−5

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drivers/remoteproc/da8xx_remoteproc.c+9−22

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drivers/remoteproc/imx_dsp_rproc.c+1−1

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drivers/remoteproc/imx_rproc.c+1−1

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drivers/remoteproc/keystone_remoteproc.c+1−1

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drivers/remoteproc/meson_mx_ao_arc.c+1−1

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drivers/remoteproc/mtk_scp.c+1−1

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drivers/remoteproc/pru_rproc.c+1−1

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drivers/remoteproc/qcom_q6v5_adsp.c+16−14

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drivers/remoteproc/qcom_q6v5_mss.c+18−38

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drivers/remoteproc/qcom_q6v5_pas.c+28−23

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drivers/remoteproc/qcom_q6v5_wcss.c+48−66

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drivers/remoteproc/qcom_wcnss.c+1−1

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drivers/remoteproc/qcom_wcnss_iris.c+2−3

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drivers/remoteproc/rcar_rproc.c+1−1

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drivers/remoteproc/remoteproc_virtio.c+1−1

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drivers/remoteproc/st_remoteproc.c+1−1

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drivers/remoteproc/stm32_rproc.c+1−1

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drivers/remoteproc/ti_k3_m4_remoteproc.c+2−4

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drivers/remoteproc/ti_k3_r5_remoteproc.c+29−54

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drivers/remoteproc/wkup_m3_rproc.c+1−1

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drivers/reset/amlogic/reset-meson-audio-arb.c+1−1

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drivers/reset/amlogic/reset-meson-aux.c+1−1

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drivers/reset/amlogic/reset-meson-common.c+4−4

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drivers/reset/amlogic/reset-meson.c+1−1

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drivers/reset/reset-mpfs.c+2−2

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drivers/reset/reset-rzg2l-usbphy-ctrl.c+1−1

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drivers/reset/reset-ti-sci.c+1−1

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drivers/rpmsg/qcom_glink_native.c+2−1

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drivers/rpmsg/qcom_glink_rpm.c+1−1

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drivers/rpmsg/qcom_smd.c+1−1

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drivers/rtc/Kconfig+33−0

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drivers/rtc/Makefile+4−1

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drivers/rtc/interface.c+6−1

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drivers/rtc/rtc-88pm80x.c+1−1

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drivers/rtc/rtc-88pm860x.c+1−1

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drivers/rtc/rtc-88pm886.c+97−0

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drivers/rtc/rtc-ab-eoz9.c+1−10

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drivers/rtc/rtc-ab8500.c+1−1

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drivers/rtc/rtc-abx80x.c+1−1

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drivers/rtc/rtc-ac100.c+1−1

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drivers/rtc/rtc-amlogic-a4.c+465−0

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drivers/rtc/rtc-asm9260.c+1−1

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drivers/rtc/rtc-at91rm9200.c+1−1

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drivers/rtc/rtc-at91sam9.c+1−1

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drivers/rtc/rtc-brcmstb-waketimer.c+1−2

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drivers/rtc/rtc-cadence.c+1−1

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drivers/rtc/rtc-cmos.c+16−17

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drivers/rtc/rtc-cros-ec.c+1−1

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drivers/rtc/rtc-ds1685.c+1−1

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drivers/rtc/rtc-ftrtc010.c+1−1

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drivers/rtc/rtc-hid-sensor-time.c+2−2

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drivers/rtc/rtc-imxdi.c+1−1

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drivers/rtc/rtc-isl12022.c+253−16

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drivers/rtc/rtc-loongson.c+1−1

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drivers/rtc/rtc-lpc24xx.c+1−1

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drivers/rtc/rtc-m48t59.c+4−22

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drivers/rtc/rtc-max77686.c+1−1

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drivers/rtc/rtc-mc13xxx.c+1−1

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drivers/rtc/rtc-mc146818-lib.c+2−4

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drivers/rtc/rtc-mpc5121.c+1−1

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drivers/rtc/rtc-mpfs.c+1−1

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drivers/rtc/rtc-mt6397.c+10−19

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drivers/rtc/rtc-mt7622.c+1−1

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drivers/rtc/rtc-mv.c+1−1

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drivers/rtc/rtc-mxc_v2.c+1−1

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drivers/rtc/rtc-nxp-bbnsm.c+18−2

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drivers/rtc/rtc-omap.c+1−1

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drivers/rtc/rtc-palmas.c+1−1

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drivers/rtc/rtc-pcf50633.c+1−1

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drivers/rtc/rtc-pcf8563.c+85−127

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drivers/rtc/rtc-pic32.c+1−1

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drivers/rtc/rtc-pm8xxx.c+1−1

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drivers/rtc/rtc-pxa.c+1−1

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drivers/rtc/rtc-rc5t583.c+1−1

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drivers/rtc/rtc-renesas-rtca3.c+900−0

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drivers/rtc/rtc-rtd119x.c+1−1

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drivers/rtc/rtc-rv3028.c+4−2

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drivers/rtc/rtc-rzn1.c+34−58

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drivers/rtc/rtc-s3c.c+1−1

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drivers/rtc/rtc-sa1100.c+1−1

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drivers/rtc/rtc-sh.c+1−1

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drivers/rtc/rtc-spear.c+1−1

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drivers/rtc/rtc-st-lpc.c+2−3

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drivers/rtc/rtc-stm32.c+1−1

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drivers/rtc/rtc-stmp3xxx.c+1−1

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drivers/rtc/rtc-sunplus.c+1−1

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drivers/rtc/rtc-tegra.c+1−1

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drivers/rtc/rtc-tps6586x.c+1−1

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drivers/rtc/rtc-twl.c+1−1

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drivers/rtc/rtc-vt8500.c+1−1

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drivers/rtc/rtc-wm8350.c+1−1

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drivers/rtc/rtc-xgene.c+1−1

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drivers/rtc/rtc-zynqmp.c+1−1

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drivers/s390/char/con3215.c+0−1

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drivers/s390/crypto/ap_bus.c+1−1

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drivers/s390/crypto/vfio_ap_ops.c+22−10

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drivers/sbus/char/bbc_i2c.c+1−1

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drivers/sbus/char/display7seg.c+1−1

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drivers/sbus/char/envctrl.c+1−1

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drivers/sbus/char/flash.c+1−1

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drivers/sbus/char/uctrl.c+1−1

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drivers/scsi/a3000.c+3−3

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drivers/scsi/a4000t.c+3−3

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drivers/scsi/aacraid/aacraid.h+0−1

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drivers/scsi/aacraid/commsup.c+0−121

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drivers/scsi/aic7xxx/aic7770.c+0−15

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drivers/scsi/aic7xxx/aic7xxx.h+0−2

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drivers/scsi/atari_scsi.c+1−1

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drivers/scsi/bfa/bfa.h+0−10

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drivers/scsi/bfa/bfa_core.c+0−35

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drivers/scsi/bfa/bfa_defs_fcs.h+0−22

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drivers/scsi/bfa/bfa_fcpim.c+0−9

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drivers/scsi/bfa/bfa_fcpim.h+0−1

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drivers/scsi/bfa/bfa_fcs.h+0−12

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drivers/scsi/bfa/bfa_fcs_lport.c+0−142

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drivers/scsi/bfa/bfa_fcs_rport.c+0−36

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drivers/scsi/bfa/bfa_ioc.c+0−21

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drivers/scsi/bfa/bfa_ioc.h+0−2

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drivers/scsi/bfa/bfa_modules.h+0−1

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drivers/scsi/bfa/bfa_svc.c+0−72

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drivers/scsi/bfa/bfa_svc.h+0−5

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drivers/scsi/bfa/bfad.c+1−22

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drivers/scsi/bfa/bfad_drv.h+0−1

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drivers/scsi/bfa/bfi.h+1−1

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drivers/scsi/bvme6000_scsi.c+1−1

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drivers/scsi/esas2r/esas2r.h+0−4

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drivers/scsi/esas2r/esas2r_vda.c+0−17

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drivers/scsi/hisi_sas/hisi_sas.h+1−0

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drivers/scsi/hisi_sas/hisi_sas_main.c+27−4

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drivers/scsi/hisi_sas/hisi_sas_v3_hw.c+140−47

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drivers/scsi/jazz_esp.c+1−1

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drivers/scsi/lpfc/lpfc_bsg.c+5−1

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drivers/scsi/lpfc/lpfc_crtn.h+3−2

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drivers/scsi/lpfc/lpfc_ct.c+21−18

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drivers/scsi/lpfc/lpfc_debugfs.c+2−2

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drivers/scsi/lpfc/lpfc_disc.h+31−31

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drivers/scsi/lpfc/lpfc_els.c+188−271

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drivers/scsi/lpfc/lpfc_hbadisc.c+131−180

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drivers/scsi/lpfc/lpfc_init.c+23−38

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drivers/scsi/lpfc/lpfc_nportdisc.c+134−195

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drivers/scsi/lpfc/lpfc_nvme.c+52−8

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drivers/scsi/lpfc/lpfc_nvmet.c+1−1

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drivers/scsi/lpfc/lpfc_sli.c+66−59

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drivers/scsi/lpfc/lpfc_vport.c+3−3

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drivers/scsi/mac_scsi.c+1−1

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drivers/scsi/mvme16x_scsi.c+1−1

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drivers/scsi/pm8001/pm8001_defs.h+5−2

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drivers/scsi/pm8001/pm8001_init.c+5−3

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drivers/scsi/pm8001/pm8001_sas.c+12−5

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drivers/scsi/pm8001/pm8001_sas.h+2−0

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drivers/scsi/pm8001/pm80xx_hwi.c+2−1

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drivers/scsi/qedf/qedf_main.c+1−5

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drivers/scsi/qedi/qedi_main.c+1−0

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drivers/scsi/qlogicpti.c+1−1

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drivers/scsi/scsi_sysfs.c+1−1

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drivers/scsi/sg.c+1−8

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drivers/scsi/sgiwd93.c+1−1

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drivers/scsi/sni_53c710.c+1−1

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drivers/scsi/st.c+26−10

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drivers/scsi/sun3_scsi.c+8−2

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drivers/scsi/sun3x_esp.c+1−1

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drivers/scsi/sun_esp.c+1−1

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drivers/sh/intc/core.c+1−1

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drivers/slimbus/qcom-ctrl.c+1−1

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drivers/slimbus/qcom-ngd-ctrl.c+2−2

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drivers/soundwire/amd_init.c+4−3

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drivers/soundwire/amd_manager.c+65−36

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drivers/soundwire/amd_manager.h+8−8

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drivers/soundwire/bus.c+1−1

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drivers/soundwire/cadence_master.c+30−0

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drivers/soundwire/cadence_master.h+1−0

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drivers/staging/rtl8712/rtl8712_powersave_bitdef.h+0−39

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drivers/staging/rtl8712/rtl8712_powersave_regdef.h+0−26

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drivers/staging/rtl8712/rtl8712_ratectrl_bitdef.h+0−36

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drivers/staging/rtl8712/rtl8712_ratectrl_regdef.h+0−43

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drivers/staging/rtl8712/rtl8712_recv.c+0−1075

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drivers/staging/rtl8712/rtl8712_recv.h+0−145

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drivers/staging/rtl8712/rtl8712_regdef.h+0−32

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drivers/staging/rtl8712/rtl8712_security_bitdef.h+0−34

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drivers/staging/rtl8712/rtl8712_spec.h+0−121

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drivers/staging/rtl8712/rtl8712_syscfg_bitdef.h+0−163

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drivers/staging/rtl8712/rtl8712_syscfg_regdef.h+0−42

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drivers/staging/rtl8712/rtl8712_timectrl_bitdef.h+0−49

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drivers/staging/rtl8712/rtl8712_timectrl_regdef.h+0−26

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drivers/staging/rtl8712/rtl8712_wmac_bitdef.h+0−49

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drivers/staging/rtl8712/rtl8712_wmac_regdef.h+0−36

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drivers/staging/rtl8712/rtl8712_xmit.c+0−732

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drivers/staging/rtl8712/rtl8712_xmit.h+0−108

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drivers/staging/rtl8712/rtl871x_cmd.c+0−750

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drivers/staging/rtl8712/rtl871x_cmd.h+0−750

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drivers/staging/rtl8712/rtl871x_debug.h+0−130

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drivers/staging/rtl8712/rtl871x_eeprom.c+0−220

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drivers/staging/rtl8712/rtl871x_eeprom.h+0−88

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drivers/staging/rtl8712/rtl871x_event.h+0−109

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drivers/staging/rtl8712/rtl871x_ht.h+0−33

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drivers/staging/rtl8712/rtl871x_io.c+0−147

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drivers/staging/rtl8712/rtl871x_io.h+0−236

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drivers/staging/rtl8712/rtl871x_ioctl.h+0−94

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drivers/staging/rtl8712/rtl871x_ioctl_linux.c+0−2275

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drivers/staging/rtl8712/rtl871x_ioctl_rtl.c+0−519

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drivers/staging/rtl8712/rtl871x_ioctl_rtl.h+0−109

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drivers/staging/rtl8712/rtl871x_ioctl_set.c+0−354

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drivers/staging/rtl8712/rtl871x_ioctl_set.h+0−45

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drivers/staging/rtl8712/rtl871x_led.h+0−118

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drivers/staging/rtl8712/rtl871x_mlme.c+0−1710

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drivers/staging/rtl8712/rtl871x_mlme.h+0−205

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drivers/staging/rtl8712/rtl871x_mp.c+0−724

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drivers/staging/rtl8712/rtl871x_mp.h+0−275

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drivers/staging/rtl8712/rtl871x_mp_ioctl.c+0−883

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drivers/staging/rtl8712/rtl871x_mp_ioctl.h+0−328

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drivers/staging/rtl8712/rtl871x_mp_phy_regdef.h+0−1034

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drivers/staging/rtl8712/rtl871x_pwrctrl.c+0−234

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drivers/staging/rtl8712/rtl871x_pwrctrl.h+0−113

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drivers/staging/rtl8712/rtl871x_recv.c+0−671

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drivers/staging/rtl8712/rtl871x_recv.h+0−208

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drivers/staging/rtl8712/rtl871x_rf.h+0−55

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drivers/staging/rtl8712/rtl871x_security.c+0−1386

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drivers/staging/rtl8712/rtl871x_security.h+0−218

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drivers/staging/rtl8712/rtl871x_sta_mgt.c+0−263

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drivers/staging/rtl8712/rtl871x_wlan_sme.h+0−35

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drivers/staging/rtl8712/rtl871x_xmit.c+0−1056

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drivers/staging/rtl8712/rtl871x_xmit.h+0−287

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drivers/staging/rtl8712/sta_info.h+0−132

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drivers/staging/rtl8712/usb_halinit.c+0−307

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drivers/staging/rtl8712/usb_intf.c+0−638

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drivers/staging/rtl8712/usb_ops.c+0−195

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drivers/staging/rtl8712/usb_ops.h+0−38

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drivers/staging/rtl8712/usb_ops_linux.c+0−508

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drivers/staging/rtl8712/usb_osintf.h+0−35

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drivers/staging/rtl8712/wifi.h+0−196

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drivers/staging/rtl8712/wlan_bssdef.h+0−223

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drivers/staging/rtl8712/xmit_linux.c+0−181

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drivers/staging/rtl8712/xmit_osdep.h+0−52

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drivers/staging/rtl8723bs/TODO+0−3

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drivers/staging/rtl8723bs/core/rtw_cmd.c+3−3

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drivers/staging/rtl8723bs/core/rtw_efuse.c+3−91

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drivers/staging/rtl8723bs/core/rtw_mlme.c+2−4

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drivers/staging/rtl8723bs/core/rtw_mlme_ext.c+5−6

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drivers/staging/rtl8723bs/core/rtw_pwrctrl.c+0−7

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drivers/staging/rtl8723bs/core/rtw_wlan_util.c+2−66

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drivers/staging/rtl8723bs/core/rtw_xmit.c+1−1

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drivers/staging/rtl8723bs/hal/hal_com.c+12−30

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drivers/staging/rtl8723bs/hal/hal_intf.c+35−102

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drivers/staging/rtl8723bs/hal/odm.c+4−10

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drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c+17−533

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drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c+0−15

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drivers/staging/rtl8723bs/hal/rtl8723bs_xmit.c+1−3

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drivers/staging/rtl8723bs/hal/sdio_halinit.c+10−49

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drivers/staging/rtl8723bs/include/drv_types.h+0−10

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drivers/staging/rtl8723bs/include/hal_com.h+0−4

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drivers/staging/rtl8723bs/include/hal_intf.h+13−82

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drivers/staging/rtl8723bs/include/hal_phy_cfg.h+0−5

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drivers/staging/rtl8723bs/include/osdep_intf.h+0−3

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drivers/staging/rtl8723bs/include/osdep_service.h+0−5

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drivers/staging/rtl8723bs/include/rtl8723b_recv.h+5−0

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drivers/staging/rtl8723bs/include/rtl8723b_xmit.h+2−0

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drivers/staging/rtl8723bs/include/rtw_efuse.h+0−4

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drivers/staging/rtl8723bs/include/rtw_mlme_ext.h+0−5

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drivers/staging/rtl8723bs/include/rtw_mp.h+0−4

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drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c+1−11

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drivers/staging/rtl8723bs/os_dep/ioctl_linux.c+2−15

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drivers/staging/rtl8723bs/os_dep/os_intfs.c+1−30

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drivers/staging/rtl8723bs/os_dep/sdio_intf.c+3−14

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drivers/staging/rts5208/Kconfig+0−9

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drivers/staging/rts5208/Makefile+0−5

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drivers/staging/rts5208/TODO+0−7

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drivers/staging/rts5208/general.c+0−25

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drivers/staging/rts5208/general.h+0−19

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drivers/staging/rts5208/ms.c+0−4311

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drivers/staging/rts5208/ms.h+0−214

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drivers/staging/rts5208/rtsx.c+0−987

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drivers/staging/rts5208/rtsx.h+0−164

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drivers/staging/rts5208/rtsx_card.c+0−1151

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drivers/staging/rts5208/rtsx_card.h+0−1087

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drivers/staging/rts5208/rtsx_chip.c+0−2161

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drivers/staging/rts5208/rtsx_chip.h+0−987

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drivers/staging/rts5208/rtsx_scsi.c+0−3279

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drivers/staging/rts5208/rtsx_scsi.h+0−131

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drivers/staging/rts5208/rtsx_sys.h+0−36

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drivers/staging/rts5208/rtsx_transport.c+0−768

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drivers/staging/rts5208/rtsx_transport.h+0−57

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drivers/staging/rts5208/sd.c+0−4717

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drivers/staging/rts5208/sd.h+0−289

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drivers/staging/rts5208/spi.c+0−906

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drivers/staging/rts5208/spi.h+0−52

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drivers/staging/rts5208/xd.c+0−2145

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drivers/staging/rts5208/xd.h+0−176

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drivers/staging/sm750fb/TODO+0−5

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drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c+2−1

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drivers/staging/vc04_services/include/linux/raspberrypi/vchiq.h+4−3

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drivers/staging/vc04_services/interface/TESTING+2−2

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drivers/staging/vc04_services/interface/TODO+0−13

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drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c+80−446

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drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.h+2−1

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drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.c+524−172

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drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.h+36−19

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drivers/staging/vc04_services/interface/vchiq_arm/vchiq_debugfs.h+2−1

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drivers/staging/vc04_services/interface/vchiq_arm/vchiq_dev.c+22−22

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drivers/staging/vc04_services/interface/vchiq_arm/vchiq_ioctl.h+1−1

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drivers/staging/vc04_services/interface/vchiq_arm/vchiq_pagelist.h+0−21

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drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c+4−3

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drivers/staging/vme_user/vme_bridge.h+33−23

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drivers/staging/vt6655/Kconfig+0−6

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drivers/staging/vt6655/Makefile+0−15

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drivers/staging/vt6655/TODO+0−20

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drivers/staging/vt6655/baseband.c+0−2257

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drivers/staging/vt6655/baseband.h+0−72

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drivers/staging/vt6655/card.c+0−836

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drivers/staging/vt6655/card.h+0−62

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drivers/staging/vt6655/channel.c+0−135

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drivers/staging/vt6655/channel.h+0−17

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drivers/staging/vt6655/desc.h+0−249

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drivers/staging/vt6655/device.h+0−292

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drivers/staging/vt6655/device_cfg.h+0−44

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drivers/staging/vt6655/device_main.c+0−1868

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drivers/staging/vt6655/dpc.c+0−145

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drivers/staging/vt6655/dpc.h+0−21

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drivers/staging/vt6655/key.c+0−143

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drivers/staging/vt6655/key.h+0−51

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drivers/staging/vt6655/mac.c+0−851

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drivers/staging/vt6655/mac.h+0−580

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drivers/staging/vt6655/power.c+0−144

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drivers/staging/vt6655/power.h+0−29

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drivers/staging/vt6655/rf.c+0−535

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drivers/staging/vt6655/rf.h+0−71

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drivers/staging/vt6655/rxtx.c+0−1462

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drivers/staging/vt6655/rxtx.h+0−184

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drivers/staging/vt6655/srom.c+0−139

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drivers/staging/vt6655/srom.h+0−85

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drivers/staging/vt6655/test+0−9

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drivers/staging/vt6656/Kconfig+0−7

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drivers/staging/vt6656/Makefile+0−15

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drivers/staging/vt6656/TODO+0−17

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drivers/staging/vt6656/baseband.c+0−455

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drivers/staging/vt6656/baseband.h+0−75

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drivers/staging/vt6656/card.c+0−456

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drivers/staging/vt6656/card.h+0−44

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drivers/staging/vt6656/channel.c+0−77

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drivers/staging/vt6656/channel.h+0−21

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drivers/staging/vt6656/desc.h+0−91

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drivers/staging/vt6656/device.h+0−386

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drivers/staging/vt6656/key.c+0−142

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drivers/staging/vt6656/key.h+0−40

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drivers/staging/vt6656/mac.c+0−183

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drivers/staging/vt6656/mac.h+0−373

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drivers/staging/vt6656/main_usb.c+0−1121

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drivers/staging/vt6656/power.c+0−112

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drivers/staging/vt6656/power.h+0−23

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drivers/staging/vt6656/rf.c+0−443

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drivers/staging/vt6656/rf.h+0−46

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drivers/staging/vt6656/rxtx.c+0−730

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drivers/staging/vt6656/rxtx.h+0−178

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drivers/staging/vt6656/usbpipe.c+0−506

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drivers/staging/vt6656/usbpipe.h+0−67

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drivers/staging/vt6656/wcmd.c+0−185

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drivers/staging/vt6656/wcmd.h+0−48

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drivers/target/target_core_pscsi.c+1−1

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drivers/tee/optee/smc_abi.c+1−1

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drivers/thermal/Kconfig+9−0

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drivers/thermal/Makefile+2−0

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drivers/thermal/gov_power_allocator.c+6−1

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drivers/thermal/intel/int340x_thermal/int3400_thermal.c+4−14

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drivers/thermal/intel/int340x_thermal/processor_thermal_device.c+2−2

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drivers/thermal/intel/int340x_thermal/processor_thermal_device_pci.c+1−1

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drivers/thermal/intel/int340x_thermal/processor_thermal_mbox.c+3−3

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drivers/thermal/intel/int340x_thermal/processor_thermal_power_floor.c+6−6

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drivers/thermal/intel/int340x_thermal/processor_thermal_rfim.c+1−1

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drivers/thermal/intel/int340x_thermal/processor_thermal_wt_hint.c+5−5

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drivers/thermal/intel/int340x_thermal/processor_thermal_wt_req.c+1−1

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drivers/thermal/intel/intel_powerclamp.c+1−1

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drivers/thermal/intel/intel_soc_dts_iosf.c+1−1

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drivers/thermal/intel/intel_tcc.c+5−5

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drivers/thermal/intel/intel_tcc_cooling.c+1−1

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drivers/thermal/intel/x86_pkg_temp_thermal.c+1−1

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drivers/thermal/pcie_cooling.c+80−0

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drivers/thermal/qcom/qcom-spmi-adc-tm5.c+2−5

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drivers/thermal/sun8i_thermal.c+5−6

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drivers/thermal/tegra/soctherm.c+2−3

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drivers/thermal/thermal_hwmon.c+1−1

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drivers/thermal/thermal_of.c+15−35

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drivers/thunderbolt/debugfs.c+368−136

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drivers/thunderbolt/nhi.c+6−6

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drivers/thunderbolt/sb_regs.h+21−11

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drivers/thunderbolt/tb.h+12−4

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drivers/thunderbolt/usb4.c+11−7

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drivers/tty/amiserial.c+1−1

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drivers/tty/goldfish.c+1−1

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drivers/tty/hvc/hvc_opal.c+1−1

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drivers/tty/serial/8250/8250_aspeed_vuart.c+1−1

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drivers/tty/serial/8250/8250_bcm2835aux.c+1−1

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drivers/tty/serial/8250/8250_bcm7271.c+2−2

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drivers/tty/serial/8250/8250_dw.c+4−3

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drivers/tty/serial/8250/8250_em.c+1−1

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drivers/tty/serial/8250/8250_exar.c+40−96

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drivers/tty/serial/8250/8250_fintek.c+14−2

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drivers/tty/serial/8250/8250_fsl.c+1−1

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drivers/tty/serial/8250/8250_ingenic.c+1−1

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drivers/tty/serial/8250/8250_ioc3.c+1−1

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drivers/tty/serial/8250/8250_lpc18xx.c+1−1

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drivers/tty/serial/8250/8250_men_mcb.c+1−1

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drivers/tty/serial/8250/8250_mtk.c+3−3

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drivers/tty/serial/8250/8250_of.c+1−1

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drivers/tty/serial/8250/8250_omap.c+5−5

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drivers/tty/serial/8250/8250_pci.c+1−1

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drivers/tty/serial/8250/8250_pci1xxxx.c+1−1

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drivers/tty/serial/8250/8250_pcilib.c+2−2

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drivers/tty/serial/8250/8250_platform.c+1−1

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drivers/tty/serial/8250/8250_pxa.c+1−1

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drivers/tty/serial/8250/8250_tegra.c+1−1

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drivers/tty/serial/8250/8250_uniphier.c+1−1

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drivers/tty/serial/8250/Kconfig+1−0

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drivers/tty/serial/altera_jtaguart.c+3−3

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drivers/tty/serial/altera_uart.c+3−3

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drivers/tty/serial/amba-pl011.c+8−1

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drivers/tty/serial/ar933x_uart.c+1−1

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drivers/tty/serial/atmel_serial.c+5−11

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drivers/tty/serial/bcm63xx_uart.c+1−1

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drivers/tty/serial/clps711x.c+1−1

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drivers/tty/serial/cpm_uart.c+1−1

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drivers/tty/serial/digicolor-usart.c+1−1

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drivers/tty/serial/esp32_acm.c+1−1

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drivers/tty/serial/esp32_uart.c+1−1

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drivers/tty/serial/fsl_linflexuart.c+1−1

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drivers/tty/serial/fsl_lpuart.c+17−6

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drivers/tty/serial/imx.c+117−20

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drivers/tty/serial/lantiq.c+1−1

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drivers/tty/serial/liteuart.c+1−1

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drivers/tty/serial/lpc32xx_hs.c+1−1

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drivers/tty/serial/ma35d1_serial.c+1−1

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drivers/tty/serial/mcf.c+1−1

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drivers/tty/serial/men_z135_uart.c+1−1

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drivers/tty/serial/meson_uart.c+1−1

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drivers/tty/serial/milbeaut_usio.c+1−1

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drivers/tty/serial/mpc52xx_uart.c+1−1

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drivers/tty/serial/msm_serial.c+1−1

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drivers/tty/serial/mxs-auart.c+1−1

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drivers/tty/serial/omap-serial.c+1−1

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drivers/tty/serial/owl-uart.c+1−1

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drivers/tty/serial/pic32_uart.c+1−1

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drivers/tty/serial/pmac_zilog.c+1−1

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drivers/tty/serial/qcom_geni_serial.c+1−1

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drivers/tty/serial/rda-uart.c+1−1

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drivers/tty/serial/rp2.c+7−5

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drivers/tty/serial/sa1100.c+1−1

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drivers/tty/serial/samsung_tty.c+14−1

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drivers/tty/serial/sc16is7xx.c+2−2

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drivers/tty/serial/sc16is7xx_i2c.c+1−1

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drivers/tty/serial/sc16is7xx_spi.c+1−1

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drivers/tty/serial/sccnxp.c+1−1

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drivers/tty/serial/serial-tegra.c+1−1

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drivers/tty/serial/serial_txx9.c+1−1

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drivers/tty/serial/sh-sci.c+1−1

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drivers/tty/serial/sifive.c+1−1

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drivers/tty/serial/sprd_serial.c+37−6

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drivers/tty/serial/st-asc.c+1−1

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drivers/tty/serial/stm32-usart.c+1−1

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drivers/tty/serial/sunhv.c+1−1

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drivers/tty/serial/sunplus-uart.c+1−1

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drivers/tty/serial/sunsab.c+1−1

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drivers/tty/serial/sunsu.c+1−1

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drivers/tty/serial/sunzilog.c+1−1

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drivers/tty/serial/tegra-tcu.c+1−1

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drivers/tty/serial/timbuart.c+1−1

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drivers/tty/serial/uartlite.c+1−1

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drivers/tty/serial/ucc_uart.c+1−1

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drivers/tty/serial/xilinx_uartps.c+1−1

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drivers/tty/tty_io.c+1−1

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drivers/ufs/core/ufs-mcq.c+17−13

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drivers/ufs/core/ufshcd.c+302−269

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drivers/ufs/host/cdns-pltfrm.c+1−1

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drivers/ufs/host/tc-dwc-g210-pci.c+3−5

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drivers/ufs/host/tc-dwc-g210-pltfrm.c+1−1

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drivers/ufs/host/ti-j721e-ufs.c+1−1

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drivers/ufs/host/ufs-exynos.c+74−64

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drivers/ufs/host/ufs-exynos.h+1−1

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drivers/ufs/host/ufs-hisi.c+1−1

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drivers/ufs/host/ufs-mediatek.c+11−1

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drivers/ufs/host/ufs-qcom.c+23−5

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drivers/ufs/host/ufs-renesas.c+9−2

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drivers/ufs/host/ufs-sprd.c+1−1

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drivers/ufs/host/ufshcd-pci.c+3−5

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drivers/uio/uio_dmem_genirq.c+1−4

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drivers/uio/uio_fsl_elbc_gpcm.c+1−1

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drivers/uio/uio_hv_generic.c+1−1

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drivers/uio/uio_pdrv_genirq.c+1−4

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drivers/usb/atm/ueagle-atm.c+3−3

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drivers/usb/atm/usbatm.c+1−1

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drivers/usb/c67x00/c67x00-drv.c+1−1

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drivers/usb/cdns3/cdns3-imx.c+1−1

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drivers/usb/cdns3/cdns3-pci-wrap.c+1−3

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drivers/usb/cdns3/cdns3-plat.c+1−1

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drivers/usb/cdns3/cdns3-starfive.c+1−1

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drivers/usb/cdns3/cdns3-ti.c+1−1

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drivers/usb/cdns3/cdnsp-pci.c+10−16

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drivers/usb/chipidea/ci.h+2−0

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drivers/usb/chipidea/ci_hdrc_imx.c+2−1

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drivers/usb/chipidea/ci_hdrc_msm.c+1−1

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drivers/usb/chipidea/ci_hdrc_npcm.c+1−1

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drivers/usb/chipidea/ci_hdrc_tegra.c+1−1

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drivers/usb/chipidea/ci_hdrc_usb2.c+1−1

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drivers/usb/chipidea/core.c+4−2

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drivers/usb/chipidea/udc.c+172−6

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drivers/usb/chipidea/udc.h+2−0

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drivers/usb/chipidea/usbmisc_imx.c+4−0

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drivers/usb/common/common.c+3−0

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drivers/usb/common/usb-conn-gpio.c+1−1

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drivers/usb/core/config.c+1−1

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drivers/usb/core/devio.c+4−1

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drivers/usb/core/driver.c+10−14

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drivers/usb/core/endpoint.c+6−5

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drivers/usb/core/ledtrig-usbport.c+2−1

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drivers/usb/core/port.c+6−5

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drivers/usb/core/sysfs.c+1−1

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drivers/usb/core/usb.h+1−1

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drivers/usb/dwc2/Kconfig+1−1

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drivers/usb/dwc2/platform.c+1−1

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drivers/usb/dwc3/Kconfig+1−1

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drivers/usb/dwc3/core.c+10−6

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drivers/usb/dwc3/core.h+6−8

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drivers/usb/dwc3/dwc3-am62.c+1−1

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drivers/usb/dwc3/dwc3-exynos.c+1−1

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drivers/usb/dwc3/dwc3-imx8mp.c+1−1

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drivers/usb/dwc3/dwc3-keystone.c+1−1

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drivers/usb/dwc3/dwc3-meson-g12a.c+1−1

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drivers/usb/dwc3/dwc3-octeon.c+1−1

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drivers/usb/dwc3/dwc3-of-simple.c+1−1

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drivers/usb/dwc3/dwc3-omap.c+2−2

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drivers/usb/dwc3/dwc3-qcom.c+2−2

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drivers/usb/dwc3/dwc3-rtk.c+1−1

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drivers/usb/dwc3/dwc3-st.c+1−1

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drivers/usb/dwc3/dwc3-xilinx.c+1−1

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drivers/usb/dwc3/ep0.c+2−2

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drivers/usb/dwc3/gadget.c+90−62

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drivers/usb/dwc3/host.c+1−1

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drivers/usb/fotg210/fotg210-core.c+1−1

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drivers/usb/gadget/composite.c+21−9

This diff is large: its 84 lines aren’t shown here.

drivers/usb/gadget/config.c+2−2

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drivers/usb/gadget/configfs.c+1−1

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drivers/usb/gadget/function/Makefile+4−0

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drivers/usb/gadget/function/f_fs.c+4−4

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drivers/usb/gadget/function/f_mass_storage.c+4−4

This diff is large: its 36 lines aren’t shown here.

drivers/usb/gadget/function/f_midi.c+4−4

This diff is large: its 22 lines aren’t shown here.

drivers/usb/gadget/function/f_midi2.c+1−3

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drivers/usb/gadget/function/f_uvc.c+3−1

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drivers/usb/gadget/function/uvc.h+13−0

This diff is large: its 37 lines aren’t shown here.

drivers/usb/gadget/function/uvc_configfs.c+337−11

This diff is large: its 504 lines aren’t shown here.

drivers/usb/gadget/function/uvc_configfs.h+16−0

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drivers/usb/gadget/function/uvc_queue.c+11−15

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drivers/usb/gadget/function/uvc_queue.h+2−0

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drivers/usb/gadget/function/uvc_trace.c+11−0

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drivers/usb/gadget/function/uvc_trace.h+60−0

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drivers/usb/gadget/function/uvc_v4l2.c+65−1

This diff is large: its 100 lines aren’t shown here.

drivers/usb/gadget/function/uvc_video.c+161−107

This diff is large: its 429 lines aren’t shown here.

drivers/usb/gadget/legacy/hid.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/usb/gadget/legacy/raw_gadget.c+2−2

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drivers/usb/gadget/udc/aspeed-vhub/core.c+1−1

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drivers/usb/gadget/udc/aspeed_udc.c+2−2

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drivers/usb/gadget/udc/at91_udc.c+1−1

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drivers/usb/gadget/udc/atmel_usba_udc.c+1−1

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drivers/usb/gadget/udc/bcm63xx_udc.c+1−1

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drivers/usb/gadget/udc/bdc/bdc_core.c+1−1

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drivers/usb/gadget/udc/cdns2/cdns2-pci.c+1−2

This diff is large: its 17 lines aren’t shown here.

drivers/usb/gadget/udc/dummy_hcd.c+3−3

This diff is large: its 27 lines aren’t shown here.

drivers/usb/gadget/udc/fsl_qe_udc.c+4−4

This diff is large: its 36 lines aren’t shown here.

drivers/usb/gadget/udc/fsl_udc_core.c+1−1

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drivers/usb/gadget/udc/fusb300_udc.c+2−2

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drivers/usb/gadget/udc/gr_udc.c+1−1

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drivers/usb/gadget/udc/lpc32xx_udc.c+1−1

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drivers/usb/gadget/udc/m66592-udc.c+1−1

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drivers/usb/gadget/udc/mv_u3d_core.c+1−1

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drivers/usb/gadget/udc/mv_udc_core.c+1−1

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drivers/usb/gadget/udc/net2272.c+2−2

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drivers/usb/gadget/udc/omap_udc.c+3−3

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drivers/usb/gadget/udc/pxa25x_udc.c+1−1

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drivers/usb/gadget/udc/pxa27x_udc.c+1−1

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drivers/usb/gadget/udc/r8a66597-udc.c+1−1

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drivers/usb/gadget/udc/renesas_usb3.c+1−1

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drivers/usb/gadget/udc/renesas_usbf.c+2−2

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drivers/usb/gadget/udc/rzv2m_usb3drd.c+1−1

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drivers/usb/gadget/udc/snps_udc_core.c+1−1

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drivers/usb/gadget/udc/snps_udc_plat.c+1−1

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drivers/usb/gadget/udc/tegra-xudc.c+1−1

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drivers/usb/gadget/udc/udc-xilinx.c+1−1

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drivers/usb/gadget/usbstring.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/usb/host/bcma-hcd.c+0−1

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drivers/usb/host/ehci-atmel.c+1−1

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drivers/usb/host/ehci-brcm.c+1−1

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drivers/usb/host/ehci-exynos.c+1−1

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drivers/usb/host/ehci-fsl.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/usb/host/ehci-grlib.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/usb/host/ehci-hcd.c+1−1

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drivers/usb/host/ehci-mv.c+1−1

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drivers/usb/host/ehci-npcm7xx.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/usb/host/ehci-omap.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/usb/host/ehci-orion.c+1−1

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drivers/usb/host/ehci-platform.c+1−1

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drivers/usb/host/ehci-ppc-of.c+1−1

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drivers/usb/host/ehci-sh.c+1−1

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drivers/usb/host/ehci-spear.c+5−4

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drivers/usb/host/ehci-st.c+1−1

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drivers/usb/host/ehci-xilinx-of.c+1−1

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drivers/usb/host/fhci-hcd.c+1−1

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drivers/usb/host/fhci-sched.c+2−2

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drivers/usb/host/fsl-mph-dr-of.c+1−1

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drivers/usb/host/isp116x-hcd.c+1−1

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drivers/usb/host/isp1362-hcd.c+1−1

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drivers/usb/host/octeon-hcd.c+3−3

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drivers/usb/host/ohci-at91.c+1−1

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drivers/usb/host/ohci-da8xx.c+1−1

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drivers/usb/host/ohci-exynos.c+1−1

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drivers/usb/host/ohci-nxp.c+1−1

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drivers/usb/host/ohci-omap.c+2−2

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drivers/usb/host/ohci-platform.c+1−1

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drivers/usb/host/ohci-ppc-of.c+1−1

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drivers/usb/host/ohci-pxa27x.c+1−1

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drivers/usb/host/ohci-s3c2410.c+1−1

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drivers/usb/host/ohci-sm501.c+1−1

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drivers/usb/host/ohci-spear.c+1−1

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drivers/usb/host/ohci-st.c+1−1

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drivers/usb/host/oxu210hp-hcd.c+4−4

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drivers/usb/host/r8a66597-hcd.c+3−3

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drivers/usb/host/sl811-hcd.c+1−1

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drivers/usb/host/uhci-grlib.c+1−1

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drivers/usb/host/uhci-platform.c+1−1

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drivers/usb/host/xhci-dbgcap.c+8−5

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drivers/usb/host/xhci-debugfs.c+4−6

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drivers/usb/host/xhci-histb.c+1−1

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drivers/usb/host/xhci-hub.c+3−3

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drivers/usb/host/xhci-mem.c+112−123

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drivers/usb/host/xhci-mtk.c+1−1

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drivers/usb/host/xhci-pci-renesas.c+1−1

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drivers/usb/host/xhci-pci.c+22−27

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drivers/usb/host/xhci-plat.c+1−1

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drivers/usb/host/xhci-rcar.c+1−1

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drivers/usb/host/xhci-ring.c+178−124

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drivers/usb/host/xhci-tegra.c+1−1

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drivers/usb/host/xhci-trace.h+55−24

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drivers/usb/host/xhci.c+96−27

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