lael-labs/linux

Documentation/arm64/memory.txt+6−6

@@ -27,17 +27,17 @@ Start End Size Use · 26 unmodified lines
27	-----------------------------------------------------------------------	27	-----------------------------------------------------------------------
28	0000000000000000 0000007fffffffff 512GB user	28	0000000000000000 0000007fffffffff 512GB user
29		29
30	ffffff8000000000 ffffffbbfffcffff ~240GB vmalloc	30	ffffff8000000000 ffffffbbfffeffff ~240GB vmalloc
31		31
32	ffffffbbfffd0000 ffffffbcfffdffff 64KB [guard page]	32	ffffffbbffff0000 ffffffbbffffffff 64KB [guard page]
33		33
34	ffffffbbfffe0000 ffffffbcfffeffff 64KB PCI I/O space	34	ffffffbc00000000 ffffffbdffffffff 8GB vmemmap
35		35
36	ffffffbbffff0000 ffffffbcffffffff 64KB [guard page]	36	ffffffbe00000000 ffffffbffbbfffff ~8GB [guard, future vmmemap]
37		37
38	ffffffbc00000000 ffffffbdffffffff 8GB vmemmap	38	ffffffbffbe00000 ffffffbffbe0ffff 64KB PCI I/O space
39		39
40	ffffffbe00000000 ffffffbffbffffff ~8GB [guard, future vmmemap]	40	ffffffbbffff0000 ffffffbcffffffff ~2MB [guard]
41		41
42	ffffffbffc000000 ffffffbfffffffff 64MB modules	42	ffffffbffc000000 ffffffbfffffffff 64MB modules
43		43

Documentation/cgroups/memory.txt+4−0

@@ -466,6 +466,10 @@ Note: · 465 unmodified lines
466	5.3 swappiness	466	5.3 swappiness
467		467
468	Similar to /proc/sys/vm/swappiness, but affecting a hierarchy of groups only.	468	Similar to /proc/sys/vm/swappiness, but affecting a hierarchy of groups only.
		469	Please note that unlike the global swappiness, memcg knob set to 0
		470	really prevents from any swapping even if there is a swap storage
		471	available. This might lead to memcg OOM killer if there are no file
		472	pages to reclaim.
469		473
470	Following cgroups' swappiness can't be changed.	474	Following cgroups' swappiness can't be changed.
471	- root cgroup (uses /proc/sys/vm/swappiness).	475	- root cgroup (uses /proc/sys/vm/swappiness).

Documentation/filesystems/proc.txt+12−4

   2	Modifying System Parameters
   3	Per-Process Parameters
-  3.1	/proc/<pid>/oom_score_adj - Adjust the oom-killer
+  3.1	/proc/<pid>/oom_adj & /proc/<pid>/oom_score_adj - Adjust the oom-killer
 								score
   3.2	/proc/<pid>/oom_score - Display current oom-killer score
   3.3	/proc/<pid>/io - Display the IO accounting fields
 CHAPTER 3: PER-PROCESS PARAMETERS
 ------------------------------------------------------------------------------
-3.1 /proc/<pid>/oom_score_adj- Adjust the oom-killer score
+3.1 /proc/<pid>/oom_adj & /proc/<pid>/oom_score_adj- Adjust the oom-killer score
 --------------------------------------------------------------------------------
-This file can be used to adjust the badness heuristic used to select which
+These file can be used to adjust the badness heuristic used to select which
 process gets killed in out of memory conditions.
 The badness heuristic assigns a value to each candidate task ranging from 0
 equivalent to discounting 50% of the task's allowed memory from being considered
 as scoring against the task.
+For backwards compatibility with previous kernels, /proc/<pid>/oom_adj may also
+be used to tune the badness score.  Its acceptable values range from -16
+(OOM_ADJUST_MIN) to +15 (OOM_ADJUST_MAX) and a special value of -17
+(OOM_DISABLE) to disable oom killing entirely for that task.  Its value is
+scaled linearly with /proc/<pid>/oom_score_adj.
 The value of /proc/<pid>/oom_score_adj may be reduced no lower than the last
 value set by a CAP_SYS_RESOURCE process. To reduce the value any lower
 requires CAP_SYS_RESOURCE.
 -------------------------------------------------------------
 This file can be used to check the current score used by the oom-killer is for
-any given <pid>.
+any given <pid>. Use it together with /proc/<pid>/oom_score_adj to tune which
+process should be killed in an out-of-memory situation.
 3.3  /proc/<pid>/io - Display the IO accounting fields
 -------------------------------------------------------

Documentation/networking/netdev-features.txt+1−1

@@ -164,4 +164,4 @@ read the CRC recorded by the NIC on receipt of the packet. · 163 unmodified lines
164	This requests that the NIC receive all possible frames, including errored	164	This requests that the NIC receive all possible frames, including errored
165	frames (such as bad FCS, etc). This can be helpful when sniffing a link with	165	frames (such as bad FCS, etc). This can be helpful when sniffing a link with
166	bad packets on it. Some NICs may receive more packets if also put into normal	166	bad packets on it. Some NICs may receive more packets if also put into normal
167	PROMISC mdoe.	167	PROMISC mode.

MAINTAINERS+60−9

@@ -2507,6 +2507,7 @@ M: Joonyoung Shim <jy0922.shim@samsung.com> · 2506 unmodified lines
2507	M: Seung-Woo Kim <sw0312.kim@samsung.com>	2507	M: Seung-Woo Kim <sw0312.kim@samsung.com>
2508	M: Kyungmin Park <kyungmin.park@samsung.com>	2508	M: Kyungmin Park <kyungmin.park@samsung.com>
2509	L: dri-devel@lists.freedesktop.org	2509	L: dri-devel@lists.freedesktop.org
		2510	T: git git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos.git
2510	S: Supported	2511	S: Supported
2511	F: drivers/gpu/drm/exynos	2512	F: drivers/gpu/drm/exynos
2512	F: include/drm/exynos*	2513	F: include/drm/exynos*
@@ -3597,6 +3598,49 @@ F: drivers/hid/hid-hyperv.c · 1084 unmodified lines
3597	F: drivers/net/hyperv/	3598	F: drivers/net/hyperv/
3598	F: drivers/staging/hv/	3599	F: drivers/staging/hv/
3599		3600
		3601	I2C OVER PARALLEL PORT
		3602	M: Jean Delvare <khali@linux-fr.org>
		3603	L: linux-i2c@vger.kernel.org
		3604	S: Maintained
		3605	F: Documentation/i2c/busses/i2c-parport
		3606	F: Documentation/i2c/busses/i2c-parport-light
		3607	F: drivers/i2c/busses/i2c-parport.c
		3608	F: drivers/i2c/busses/i2c-parport-light.c
		3609
		3610	I2C/SMBUS CONTROLLER DRIVERS FOR PC
		3611	M: Jean Delvare <khali@linux-fr.org>
		3612	L: linux-i2c@vger.kernel.org
		3613	S: Maintained
		3614	F: Documentation/i2c/busses/i2c-ali1535
		3615	F: Documentation/i2c/busses/i2c-ali1563
		3616	F: Documentation/i2c/busses/i2c-ali15x3
		3617	F: Documentation/i2c/busses/i2c-amd756
		3618	F: Documentation/i2c/busses/i2c-amd8111
		3619	F: Documentation/i2c/busses/i2c-i801
		3620	F: Documentation/i2c/busses/i2c-nforce2
		3621	F: Documentation/i2c/busses/i2c-piix4
		3622	F: Documentation/i2c/busses/i2c-sis5595
		3623	F: Documentation/i2c/busses/i2c-sis630
		3624	F: Documentation/i2c/busses/i2c-sis96x
		3625	F: Documentation/i2c/busses/i2c-via
		3626	F: Documentation/i2c/busses/i2c-viapro
		3627	F: drivers/i2c/busses/i2c-ali1535.c
		3628	F: drivers/i2c/busses/i2c-ali1563.c
		3629	F: drivers/i2c/busses/i2c-ali15x3.c
		3630	F: drivers/i2c/busses/i2c-amd756.c
		3631	F: drivers/i2c/busses/i2c-amd756-s4882.c
		3632	F: drivers/i2c/busses/i2c-amd8111.c
		3633	F: drivers/i2c/busses/i2c-i801.c
		3634	F: drivers/i2c/busses/i2c-isch.c
		3635	F: drivers/i2c/busses/i2c-nforce2.c
		3636	F: drivers/i2c/busses/i2c-nforce2-s4985.c
		3637	F: drivers/i2c/busses/i2c-piix4.c
		3638	F: drivers/i2c/busses/i2c-sis5595.c
		3639	F: drivers/i2c/busses/i2c-sis630.c
		3640	F: drivers/i2c/busses/i2c-sis96x.c
		3641	F: drivers/i2c/busses/i2c-via.c
		3642	F: drivers/i2c/busses/i2c-viapro.c
		3643
3600	I2C/SMBUS STUB DRIVER	3644	I2C/SMBUS STUB DRIVER
3601	M: "Mark M. Hoffman" <mhoffman@lightlink.com>	3645	M: "Mark M. Hoffman" <mhoffman@lightlink.com>
3602	L: linux-i2c@vger.kernel.org	3646	L: linux-i2c@vger.kernel.org
@@ -3604,9 +3648,8 @@ S: Maintained · 1 unmodified line
3604	F: drivers/i2c/busses/i2c-stub.c	3648	F: drivers/i2c/busses/i2c-stub.c
3605		3649
3606	I2C SUBSYSTEM	3650	I2C SUBSYSTEM
3607	M: "Jean Delvare (PC drivers, core)" <khali@linux-fr.org>	3651	M: Wolfram Sang <w.sang@pengutronix.de>
3608	M: "Ben Dooks (embedded platforms)" <ben-linux@fluff.org>	3652	M: "Ben Dooks (embedded platforms)" <ben-linux@fluff.org>
3609	M: "Wolfram Sang (embedded platforms)" <w.sang@pengutronix.de>
3610	L: linux-i2c@vger.kernel.org	3653	L: linux-i2c@vger.kernel.org
3611	W: http://i2c.wiki.kernel.org/	3654	W: http://i2c.wiki.kernel.org/
3612	T: quilt kernel.org/pub/linux/kernel/people/jdelvare/linux-2.6/jdelvare-i2c/	3655	T: quilt kernel.org/pub/linux/kernel/people/jdelvare/linux-2.6/jdelvare-i2c/
@@ -3617,6 +3660,13 @@ F: drivers/i2c/ · 4 unmodified lines
3617	F: include/linux/i2c.h	3660	F: include/linux/i2c.h
3618	F: include/linux/i2c-*.h	3661	F: include/linux/i2c-*.h
3619		3662
		3663	I2C-TAOS-EVM DRIVER
		3664	M: Jean Delvare <khali@linux-fr.org>
		3665	L: linux-i2c@vger.kernel.org
		3666	S: Maintained
		3667	F: Documentation/i2c/busses/i2c-taos-evm
		3668	F: drivers/i2c/busses/i2c-taos-evm.c
		3669
3620	I2C-TINY-USB DRIVER	3670	I2C-TINY-USB DRIVER
3621	M: Till Harbaum <till@harbaum.org>	3671	M: Till Harbaum <till@harbaum.org>
3622	L: linux-i2c@vger.kernel.org	3672	L: linux-i2c@vger.kernel.org
@@ -7212,6 +7262,14 @@ L: linux-xtensa@linux-xtensa.org · 3589 unmodified lines
7212	S: Maintained	7262	S: Maintained
7213	F: arch/xtensa/	7263	F: arch/xtensa/
7214		7264
		7265	THERMAL
		7266	M: Zhang Rui <rui.zhang@intel.com>
		7267	L: linux-pm@vger.kernel.org
		7268	T: git git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux.git
		7269	S: Supported
		7270	F: drivers/thermal/
		7271	F: include/linux/thermal.h
		7272
7215	THINKPAD ACPI EXTRAS DRIVER	7273	THINKPAD ACPI EXTRAS DRIVER
7216	M: Henrique de Moraes Holschuh <ibm-acpi@hmh.eng.br>	7274	M: Henrique de Moraes Holschuh <ibm-acpi@hmh.eng.br>
7217	L: ibm-acpi-devel@lists.sourceforge.net	7275	L: ibm-acpi-devel@lists.sourceforge.net
@@ -7895,13 +7953,6 @@ M: Roger Luethi <rl@hellgate.ch> · 677 unmodified lines
7895	S: Maintained	7953	S: Maintained
7896	F: drivers/net/ethernet/via/via-rhine.c	7954	F: drivers/net/ethernet/via/via-rhine.c
7897		7955
7898	VIAPRO SMBUS DRIVER
7899	M: Jean Delvare <khali@linux-fr.org>
7900	L: linux-i2c@vger.kernel.org
7901	S: Maintained
7902	F: Documentation/i2c/busses/i2c-viapro
7903	F: drivers/i2c/busses/i2c-viapro.c
7904
7905	VIA SD/MMC CARD CONTROLLER DRIVER	7956	VIA SD/MMC CARD CONTROLLER DRIVER
7906	M: Bruce Chang <brucechang@via.com.tw>	7957	M: Bruce Chang <brucechang@via.com.tw>
7907	M: Harald Welte <HaraldWelte@viatech.com>	7958	M: Harald Welte <HaraldWelte@viatech.com>

Makefile+1−1

@@ -1,7 +1,7 @@
1	VERSION = 3	1	VERSION = 3
2	PATCHLEVEL = 7	2	PATCHLEVEL = 7
3	SUBLEVEL = 0	3	SUBLEVEL = 0
4	EXTRAVERSION = -rc3	4	EXTRAVERSION = -rc6
5	NAME = Terrified Chipmunk	5	NAME = Terrified Chipmunk
6		6
7	# DOCUMENTATION	7	# DOCUMENTATION

arch/arm/boot/Makefile+5−5

@@ -33,7 +33,7 @@ ifeq ($(CONFIG_XIP_KERNEL),y) · 32 unmodified lines
33		33
34	$(obj)/xipImage: vmlinux FORCE	34	$(obj)/xipImage: vmlinux FORCE
35	$(call if_changed,objcopy)	35	$(call if_changed,objcopy)
36	$(kecho) ' Kernel: $@ is ready (physical address: $(CONFIG_XIP_PHYS_ADDR))'	36	@$(kecho) ' Kernel: $@ is ready (physical address: $(CONFIG_XIP_PHYS_ADDR))'
37		37
38	$(obj)/Image $(obj)/zImage: FORCE	38	$(obj)/Image $(obj)/zImage: FORCE
39	@echo 'Kernel configured for XIP (CONFIG_XIP_KERNEL=y)'	39	@echo 'Kernel configured for XIP (CONFIG_XIP_KERNEL=y)'
@@ -48,14 +48,14 @@ $(obj)/xipImage: FORCE · 8 unmodified lines
48		48
49	$(obj)/Image: vmlinux FORCE	49	$(obj)/Image: vmlinux FORCE
50	$(call if_changed,objcopy)	50	$(call if_changed,objcopy)
51	$(kecho) ' Kernel: $@ is ready'	51	@$(kecho) ' Kernel: $@ is ready'
52		52
53	$(obj)/compressed/vmlinux: $(obj)/Image FORCE	53	$(obj)/compressed/vmlinux: $(obj)/Image FORCE
54	$(Q)$(MAKE) $(build)=$(obj)/compressed $@	54	$(Q)$(MAKE) $(build)=$(obj)/compressed $@
55		55
56	$(obj)/zImage: $(obj)/compressed/vmlinux FORCE	56	$(obj)/zImage: $(obj)/compressed/vmlinux FORCE
57	$(call if_changed,objcopy)	57	$(call if_changed,objcopy)
58	$(kecho) ' Kernel: $@ is ready'	58	@$(kecho) ' Kernel: $@ is ready'
59		59
60	endif	60	endif
61		61
@@ -90,7 +90,7 @@ fi · 28 unmodified lines
90	$(obj)/uImage: $(obj)/zImage FORCE	90	$(obj)/uImage: $(obj)/zImage FORCE
91	@$(check_for_multiple_loadaddr)	91	@$(check_for_multiple_loadaddr)
92	$(call if_changed,uimage)	92	$(call if_changed,uimage)
93	$(kecho) ' Image $@ is ready'	93	@$(kecho) ' Image $@ is ready'
94		94
95	$(obj)/bootp/bootp: $(obj)/zImage initrd FORCE	95	$(obj)/bootp/bootp: $(obj)/zImage initrd FORCE
96	$(Q)$(MAKE) $(build)=$(obj)/bootp $@	96	$(Q)$(MAKE) $(build)=$(obj)/bootp $@
@@ -98,7 +98,7 @@ $(obj)/bootp/bootp: $(obj)/zImage initrd FORCE · 1 unmodified line
98		98
99	$(obj)/bootpImage: $(obj)/bootp/bootp FORCE	99	$(obj)/bootpImage: $(obj)/bootp/bootp FORCE
100	$(call if_changed,objcopy)	100	$(call if_changed,objcopy)
101	$(kecho) ' Kernel: $@ is ready'	101	@$(kecho) ' Kernel: $@ is ready'
102		102
103	PHONY += initrd FORCE	103	PHONY += initrd FORCE
104	initrd:	104	initrd:

arch/arm/boot/dts/tegra30.dtsi+2−2

@@ -73,8 +73,8 @@ · 72 unmodified lines
73		73
74	pinmux: pinmux {	74	pinmux: pinmux {
75	compatible = "nvidia,tegra30-pinmux";	75	compatible = "nvidia,tegra30-pinmux";
76	reg = <0x70000868 0xd0 /* Pad control registers */	76	reg = <0x70000868 0xd4 /* Pad control registers */
77	0x70003000 0x3e0>; /* Mux registers */	77	0x70003000 0x3e4>; /* Mux registers */
78	};	78	};
79		79
80	serial@70006000 {	80	serial@70006000 {

arch/arm/include/asm/io.h+2−2

@@ -64,7 +64,7 @@ extern void __raw_readsl(const void __iomem addr, void data, int longlen); · 63 unmodified lines
64	static inline void __raw_writew(u16 val, volatile void __iomem *addr)	64	static inline void __raw_writew(u16 val, volatile void __iomem *addr)
65	{	65	{
66	asm volatile("strh %1, %0"	66	asm volatile("strh %1, %0"
67	: "+Qo" ((volatile u16 __force )addr)	67	: "+Q" ((volatile u16 __force )addr)
68	: "r" (val));	68	: "r" (val));
69	}	69	}
70		70
@@ -72,7 +72,7 @@ static inline u16 __raw_readw(const volatile void __iomem *addr) · 1 unmodified line
72	{	72	{
73	u16 val;	73	u16 val;
74	asm volatile("ldrh %1, %0"	74	asm volatile("ldrh %1, %0"
75	: "+Qo" ((volatile u16 __force )addr),	75	: "+Q" ((volatile u16 __force )addr),
76	"=r" (val));	76	"=r" (val));
77	return val;	77	return val;
78	}	78	}

arch/arm/include/asm/sched_clock.h+0−2

@@ -10,7 +10,5 @@ · 9 unmodified lines
10		10
11	extern void sched_clock_postinit(void);	11	extern void sched_clock_postinit(void);
12	extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate);	12	extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate);
13	extern void setup_sched_clock_needs_suspend(u32 (*read)(void), int bits,
14	unsigned long rate);
15		13
16	#endif	14	#endif

arch/arm/include/asm/vfpmacros.h+6−6

@@ -27,9 +27,9 @@ · 26 unmodified lines
27	#if __LINUX_ARM_ARCH__ <= 6	27	#if __LINUX_ARM_ARCH__ <= 6
28	ldr \tmp, =elf_hwcap @ may not have MVFR regs	28	ldr \tmp, =elf_hwcap @ may not have MVFR regs
29	ldr \tmp, [\tmp, #0]	29	ldr \tmp, [\tmp, #0]
30	tst \tmp, #HWCAP_VFPv3D16	30	tst \tmp, #HWCAP_VFPD32
31	ldceql p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}	31	ldcnel p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
32	addne \base, \base, #32*4 @ step over unused register space	32	addeq \base, \base, #32*4 @ step over unused register space
33	#else	33	#else
34	VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0	34	VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
35	and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field	35	and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
@@ -51,9 +51,9 @@ · 15 unmodified lines
51	#if __LINUX_ARM_ARCH__ <= 6	51	#if __LINUX_ARM_ARCH__ <= 6
52	ldr \tmp, =elf_hwcap @ may not have MVFR regs	52	ldr \tmp, =elf_hwcap @ may not have MVFR regs
53	ldr \tmp, [\tmp, #0]	53	ldr \tmp, [\tmp, #0]
54	tst \tmp, #HWCAP_VFPv3D16	54	tst \tmp, #HWCAP_VFPD32
55	stceql p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}	55	stcnel p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
56	addne \base, \base, #32*4 @ step over unused register space	56	addeq \base, \base, #32*4 @ step over unused register space
57	#else	57	#else
58	VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0	58	VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
59	and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field	59	and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field

arch/arm/include/uapi/asm/hwcap.h+2−1

 #define HWCAP_THUMBEE	(1 << 11)
 #define HWCAP_NEON	(1 << 12)
 #define HWCAP_VFPv3	(1 << 13)
-#define HWCAP_VFPv3D16	(1 << 14)
+#define HWCAP_VFPv3D16	(1 << 14)	/* also set for VFPv4-D16 */
 #define HWCAP_TLS	(1 << 15)
 #define HWCAP_VFPv4	(1 << 16)
 #define HWCAP_IDIVA	(1 << 17)
 #define HWCAP_IDIVT	(1 << 18)
+#define HWCAP_VFPD32	(1 << 19)	/* set if VFP has 32 regs (not 16) */
 #define HWCAP_IDIV	(HWCAP_IDIVA | HWCAP_IDIVT)

arch/arm/kernel/sched_clock.c+4−14

 	update_sched_clock();
 }
-void __init setup_sched_clock_needs_suspend(u32 (*read)(void), int bits,
-		unsigned long rate)
-{
-	setup_sched_clock(read, bits, rate);
-	cd.needs_suspend = true;
-}
 void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate)
 {
 	unsigned long r, w;
 static int sched_clock_suspend(void)
 {
 	sched_clock_poll(sched_clock_timer.data);
-	if (cd.needs_suspend)
+	cd.suspended = true;
-		cd.suspended = true;
 	return 0;
 }
 static void sched_clock_resume(void)
 {
-	if (cd.needs_suspend) {
+	cd.epoch_cyc = read_sched_clock();
-		cd.epoch_cyc = read_sched_clock();
+	cd.epoch_cyc_copy = cd.epoch_cyc;
-		cd.epoch_cyc_copy = cd.epoch_cyc;
+	cd.suspended = false;
-		cd.suspended = false;
-	}
 }
 static struct syscore_ops sched_clock_ops = {

arch/arm/mach-at91/at91rm9200_devices.c+1−1

@@ -68,7 +68,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) · 67 unmodified lines
68		68
69	/* Enable overcurrent notification */	69	/* Enable overcurrent notification */
70	for (i = 0; i < data->ports; i++) {	70	for (i = 0; i < data->ports; i++) {
71	if (data->overcurrent_pin[i])	71	if (gpio_is_valid(data->overcurrent_pin[i]))
72	at91_set_gpio_input(data->overcurrent_pin[i], 1);	72	at91_set_gpio_input(data->overcurrent_pin[i], 1);
73	}	73	}
74		74

arch/arm/mach-at91/at91sam9260_devices.c+1−1

@@ -72,7 +72,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) · 71 unmodified lines
72		72
73	/* Enable overcurrent notification */	73	/* Enable overcurrent notification */
74	for (i = 0; i < data->ports; i++) {	74	for (i = 0; i < data->ports; i++) {
75	if (data->overcurrent_pin[i])	75	if (gpio_is_valid(data->overcurrent_pin[i]))
76	at91_set_gpio_input(data->overcurrent_pin[i], 1);	76	at91_set_gpio_input(data->overcurrent_pin[i], 1);
77	}	77	}
78		78

arch/arm/mach-at91/at91sam9261_devices.c+1−1

@@ -72,7 +72,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) · 71 unmodified lines
72		72
73	/* Enable overcurrent notification */	73	/* Enable overcurrent notification */
74	for (i = 0; i < data->ports; i++) {	74	for (i = 0; i < data->ports; i++) {
75	if (data->overcurrent_pin[i])	75	if (gpio_is_valid(data->overcurrent_pin[i]))
76	at91_set_gpio_input(data->overcurrent_pin[i], 1);	76	at91_set_gpio_input(data->overcurrent_pin[i], 1);
77	}	77	}
78		78

arch/arm/mach-at91/at91sam9263_devices.c+1−1

@@ -78,7 +78,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) · 77 unmodified lines
78		78
79	/* Enable overcurrent notification */	79	/* Enable overcurrent notification */
80	for (i = 0; i < data->ports; i++) {	80	for (i = 0; i < data->ports; i++) {
81	if (data->overcurrent_pin[i])	81	if (gpio_is_valid(data->overcurrent_pin[i]))
82	at91_set_gpio_input(data->overcurrent_pin[i], 1);	82	at91_set_gpio_input(data->overcurrent_pin[i], 1);
83	}	83	}
84		84

arch/arm/mach-at91/at91sam9g45_devices.c+6−6

@@ -1841,8 +1841,8 @@ static struct resource sha_resources[] = { · 1840 unmodified lines
1841	.flags = IORESOURCE_MEM,	1841	.flags = IORESOURCE_MEM,
1842	},	1842	},
1843	[1] = {	1843	[1] = {
1844	.start = AT91SAM9G45_ID_AESTDESSHA,	1844	.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
1845	.end = AT91SAM9G45_ID_AESTDESSHA,	1845	.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
1846	.flags = IORESOURCE_IRQ,	1846	.flags = IORESOURCE_IRQ,
1847	},	1847	},
1848	};	1848	};
@@ -1874,8 +1874,8 @@ static struct resource tdes_resources[] = { · 25 unmodified lines
1874	.flags = IORESOURCE_MEM,	1874	.flags = IORESOURCE_MEM,
1875	},	1875	},
1876	[1] = {	1876	[1] = {
1877	.start = AT91SAM9G45_ID_AESTDESSHA,	1877	.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
1878	.end = AT91SAM9G45_ID_AESTDESSHA,	1878	.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
1879	.flags = IORESOURCE_IRQ,	1879	.flags = IORESOURCE_IRQ,
1880	},	1880	},
1881	};	1881	};
@@ -1910,8 +1910,8 @@ static struct resource aes_resources[] = { · 28 unmodified lines
1910	.flags = IORESOURCE_MEM,	1910	.flags = IORESOURCE_MEM,
1911	},	1911	},
1912	[1] = {	1912	[1] = {
1913	.start = AT91SAM9G45_ID_AESTDESSHA,	1913	.start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
1914	.end = AT91SAM9G45_ID_AESTDESSHA,	1914	.end = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
1915	.flags = IORESOURCE_IRQ,	1915	.flags = IORESOURCE_IRQ,
1916	},	1916	},
1917	};	1917	};

arch/arm/mach-highbank/system.c+2−1

@@ -28,6 +28,7 @@ void highbank_restart(char mode, const char *cmd) · 27 unmodified lines
28	hignbank_set_pwr_soft_reset();	28	hignbank_set_pwr_soft_reset();
29		29
30	scu_power_mode(scu_base_addr, SCU_PM_POWEROFF);	30	scu_power_mode(scu_base_addr, SCU_PM_POWEROFF);
31	cpu_do_idle();	31	while (1)
		32	cpu_do_idle();
32	}	33	}
33		34

arch/arm/mach-imx/clk-gate2.c+1−1

@@ -112,7 +112,7 @@ struct clk clk_register_gate2(struct device dev, const char *name, · 111 unmodified lines
112		112
113	clk = clk_register(dev, &gate->hw);	113	clk = clk_register(dev, &gate->hw);
114	if (IS_ERR(clk))	114	if (IS_ERR(clk))
115	kfree(clk);	115	kfree(gate);
116		116
117	return clk;	117	return clk;
118	}	118	}

arch/arm/mach-imx/ehci-imx25.c+1−1

@@ -30,7 +30,7 @@ · 29 unmodified lines
30	#define MX25_H1_SIC_SHIFT 21	30	#define MX25_H1_SIC_SHIFT 21
31	#define MX25_H1_SIC_MASK (0x3 << MX25_H1_SIC_SHIFT)	31	#define MX25_H1_SIC_MASK (0x3 << MX25_H1_SIC_SHIFT)
32	#define MX25_H1_PP_BIT (1 << 18)	32	#define MX25_H1_PP_BIT (1 << 18)
33	#define MX25_H1_PM_BIT (1 << 8)	33	#define MX25_H1_PM_BIT (1 << 16)
34	#define MX25_H1_IPPUE_UP_BIT (1 << 7)	34	#define MX25_H1_IPPUE_UP_BIT (1 << 7)
35	#define MX25_H1_IPPUE_DOWN_BIT (1 << 6)	35	#define MX25_H1_IPPUE_DOWN_BIT (1 << 6)
36	#define MX25_H1_TLL_BIT (1 << 5)	36	#define MX25_H1_TLL_BIT (1 << 5)

arch/arm/mach-imx/ehci-imx35.c+1−1

@@ -30,7 +30,7 @@ · 29 unmodified lines
30	#define MX35_H1_SIC_SHIFT 21	30	#define MX35_H1_SIC_SHIFT 21
31	#define MX35_H1_SIC_MASK (0x3 << MX35_H1_SIC_SHIFT)	31	#define MX35_H1_SIC_MASK (0x3 << MX35_H1_SIC_SHIFT)
32	#define MX35_H1_PP_BIT (1 << 18)	32	#define MX35_H1_PP_BIT (1 << 18)
33	#define MX35_H1_PM_BIT (1 << 8)	33	#define MX35_H1_PM_BIT (1 << 16)
34	#define MX35_H1_IPPUE_UP_BIT (1 << 7)	34	#define MX35_H1_IPPUE_UP_BIT (1 << 7)
35	#define MX35_H1_IPPUE_DOWN_BIT (1 << 6)	35	#define MX35_H1_IPPUE_DOWN_BIT (1 << 6)
36	#define MX35_H1_TLL_BIT (1 << 5)	36	#define MX35_H1_TLL_BIT (1 << 5)

arch/arm/mach-omap2/clockdomains44xx_data.c+1−1

@@ -359,7 +359,7 @@ static struct clockdomain iss_44xx_clkdm = { · 358 unmodified lines
359	.clkdm_offs = OMAP4430_CM2_CAM_CAM_CDOFFS,	359	.clkdm_offs = OMAP4430_CM2_CAM_CAM_CDOFFS,
360	.wkdep_srcs = iss_wkup_sleep_deps,	360	.wkdep_srcs = iss_wkup_sleep_deps,
361	.sleepdep_srcs = iss_wkup_sleep_deps,	361	.sleepdep_srcs = iss_wkup_sleep_deps,
362	.flags = CLKDM_CAN_HWSUP_SWSUP,	362	.flags = CLKDM_CAN_SWSUP,
363	};	363	};
364		364
365	static struct clockdomain l3_dss_44xx_clkdm = {	365	static struct clockdomain l3_dss_44xx_clkdm = {

arch/arm/mach-omap2/devices.c+79−0

@@ -19,6 +19,7 @@ · 18 unmodified lines
19	#include <linux/of.h>	19	#include <linux/of.h>
20	#include <linux/pinctrl/machine.h>	20	#include <linux/pinctrl/machine.h>
21	#include <linux/platform_data/omap4-keypad.h>	21	#include <linux/platform_data/omap4-keypad.h>
		22	#include <linux/platform_data/omap_ocp2scp.h>
22		23
23	#include <asm/mach-types.h>	24	#include <asm/mach-types.h>
24	#include <asm/mach/map.h>	25	#include <asm/mach/map.h>
@@ -613,6 +614,83 @@ static void omap_init_vout(void) · 588 unmodified lines
613	static inline void omap_init_vout(void) {}	614	static inline void omap_init_vout(void) {}
614	#endif	615	#endif
615		616
		617	#if defined(CONFIG_OMAP_OCP2SCP) \|\| defined(CONFIG_OMAP_OCP2SCP_MODULE)
		618	static int count_ocp2scp_devices(struct omap_ocp2scp_dev *ocp2scp_dev)
		619	{
		620	int cnt = 0;
		621
		622	while (ocp2scp_dev->drv_name != NULL) {
		623	cnt++;
		624	ocp2scp_dev++;
		625	}
		626
		627	return cnt;
		628	}
		629
		630	static void omap_init_ocp2scp(void)
		631	{
		632	struct omap_hwmod *oh;
		633	struct platform_device *pdev;
		634	int bus_id = -1, dev_cnt = 0, i;
		635	struct omap_ocp2scp_dev *ocp2scp_dev;
		636	const char oh_name, name;
		637	struct omap_ocp2scp_platform_data *pdata;
		638
		639	if (!cpu_is_omap44xx())
		640	return;
		641
		642	oh_name = "ocp2scp_usb_phy";
		643	name = "omap-ocp2scp";
		644
		645	oh = omap_hwmod_lookup(oh_name);
		646	if (!oh) {
		647	pr_err("%s: could not find omap_hwmod for %s\n", __func__,
		648	oh_name);
		649	return;
		650	}
		651
		652	pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
		653	if (!pdata) {
		654	pr_err("%s: No memory for ocp2scp pdata\n", __func__);
		655	return;
		656	}
		657
		658	ocp2scp_dev = oh->dev_attr;
		659	dev_cnt = count_ocp2scp_devices(ocp2scp_dev);
		660
		661	if (!dev_cnt) {
		662	pr_err("%s: No devices connected to ocp2scp\n", __func__);
		663	kfree(pdata);
		664	return;
		665	}
		666
		667	pdata->devices = kzalloc(sizeof(struct omap_ocp2scp_dev *)
		668	* dev_cnt, GFP_KERNEL);
		669	if (!pdata->devices) {
		670	pr_err("%s: No memory for ocp2scp pdata devices\n", __func__);
		671	kfree(pdata);
		672	return;
		673	}
		674
		675	for (i = 0; i < dev_cnt; i++, ocp2scp_dev++)
		676	pdata->devices[i] = ocp2scp_dev;
		677
		678	pdata->dev_cnt = dev_cnt;
		679
		680	pdev = omap_device_build(name, bus_id, oh, pdata, sizeof(*pdata), NULL,
		681	0, false);
		682	if (IS_ERR(pdev)) {
		683	pr_err("Could not build omap_device for %s %s\n",
		684	name, oh_name);
		685	kfree(pdata->devices);
		686	kfree(pdata);
		687	return;
		688	}
		689	}
		690	#else
		691	static inline void omap_init_ocp2scp(void) { }
		692	#endif
		693
616	/-------------------------------------------------------------------------/	694	/-------------------------------------------------------------------------/
617		695
618	static int __init omap2_init_devices(void)	696	static int __init omap2_init_devices(void)
@@ -640,6 +718,7 @@ static int __init omap2_init_devices(void) · 21 unmodified lines
640	omap_init_sham();	718	omap_init_sham();
641	omap_init_aes();	719	omap_init_aes();
642	omap_init_vout();	720	omap_init_vout();
		721	omap_init_ocp2scp();
643		722
644	return 0;	723	return 0;
645	}	724	}

arch/arm/mach-omap2/omap_hwmod.c+49−14

@@ -421,6 +421,38 @@ static int _set_softreset(struct omap_hwmod oh, u32 v) · 420 unmodified lines
421	return 0;	421	return 0;
422	}	422	}
423		423
		424	/**
		425	* _wait_softreset_complete - wait for an OCP softreset to complete
		426	* @oh: struct omap_hwmod * to wait on
		427	*
		428	* Wait until the IP block represented by @oh reports that its OCP
		429	* softreset is complete. This can be triggered by software (see
		430	* _ocp_softreset()) or by hardware upon returning from off-mode (one
		431	* example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
		432	* microseconds. Returns the number of microseconds waited.
		433	*/
		434	static int _wait_softreset_complete(struct omap_hwmod *oh)
		435	{
		436	struct omap_hwmod_class_sysconfig *sysc;
		437	u32 softrst_mask;
		438	int c = 0;
		439
		440	sysc = oh->class->sysc;
		441
		442	if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
		443	omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
		444	& SYSS_RESETDONE_MASK),
		445	MAX_MODULE_SOFTRESET_WAIT, c);
		446	else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
		447	softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
		448	omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
		449	& softrst_mask),
		450	MAX_MODULE_SOFTRESET_WAIT, c);
		451	}
		452
		453	return c;
		454	}
		455
424	/**	456	/**
425	* _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v	457	* _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
426	* @oh: struct omap_hwmod *	458	* @oh: struct omap_hwmod *
@@ -1282,6 +1314,18 @@ static void _enable_sysc(struct omap_hwmod *oh) · 855 unmodified lines
1282	if (!oh->class->sysc)	1314	if (!oh->class->sysc)
1283	return;	1315	return;
1284		1316
		1317	/*
		1318	* Wait until reset has completed, this is needed as the IP
		1319	* block is reset automatically by hardware in some cases
		1320	* (off-mode for example), and the drivers require the
		1321	* IP to be ready when they access it
		1322	*/
		1323	if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
		1324	_enable_optional_clocks(oh);
		1325	_wait_softreset_complete(oh);
		1326	if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
		1327	_disable_optional_clocks(oh);
		1328
1285	v = oh->_sysc_cache;	1329	v = oh->_sysc_cache;
1286	sf = oh->class->sysc->sysc_flags;	1330	sf = oh->class->sysc->sysc_flags;
1287		1331
@@ -1804,7 +1848,7 @@ static int _am33xx_disable_module(struct omap_hwmod *oh) · 516 unmodified lines
1804	*/	1848	*/
1805	static int _ocp_softreset(struct omap_hwmod *oh)	1849	static int _ocp_softreset(struct omap_hwmod *oh)
1806	{	1850	{
1807	u32 v, softrst_mask;	1851	u32 v;
1808	int c = 0;	1852	int c = 0;
1809	int ret = 0;	1853	int ret = 0;
1810		1854
@@ -1834,19 +1878,7 @@ static int _ocp_softreset(struct omap_hwmod *oh) · 23 unmodified lines
1834	if (oh->class->sysc->srst_udelay)	1878	if (oh->class->sysc->srst_udelay)
1835	udelay(oh->class->sysc->srst_udelay);	1879	udelay(oh->class->sysc->srst_udelay);
1836		1880
1837	if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)	1881	c = _wait_softreset_complete(oh);
1838	omap_test_timeout((omap_hwmod_read(oh,
1839	oh->class->sysc->syss_offs)
1840	& SYSS_RESETDONE_MASK),
1841	MAX_MODULE_SOFTRESET_WAIT, c);
1842	else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
1843	softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
1844	omap_test_timeout(!(omap_hwmod_read(oh,
1845	oh->class->sysc->sysc_offs)
1846	& softrst_mask),
1847	MAX_MODULE_SOFTRESET_WAIT, c);
1848	}
1849
1850	if (c == MAX_MODULE_SOFTRESET_WAIT)	1882	if (c == MAX_MODULE_SOFTRESET_WAIT)
1851	pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",	1883	pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1852	oh->name, MAX_MODULE_SOFTRESET_WAIT);	1884	oh->name, MAX_MODULE_SOFTRESET_WAIT);
@@ -2352,6 +2384,9 @@ static int __init _setup_reset(struct omap_hwmod *oh) · 499 unmodified lines
2352	if (oh->_state != _HWMOD_STATE_INITIALIZED)	2384	if (oh->_state != _HWMOD_STATE_INITIALIZED)
2353	return -EINVAL;	2385	return -EINVAL;
2354		2386
		2387	if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
		2388	return -EPERM;
		2389
2355	if (oh->rst_lines_cnt == 0) {	2390	if (oh->rst_lines_cnt == 0) {
2356	r = _enable(oh);	2391	r = _enable(oh);
2357	if (r) {	2392	if (r) {

arch/arm/mach-omap2/omap_hwmod_44xx_data.c+36−0

@@ -21,6 +21,7 @@ · 20 unmodified lines
21	#include <linux/io.h>	21	#include <linux/io.h>
22	#include <linux/platform_data/gpio-omap.h>	22	#include <linux/platform_data/gpio-omap.h>
23	#include <linux/power/smartreflex.h>	23	#include <linux/power/smartreflex.h>
		24	#include <linux/platform_data/omap_ocp2scp.h>
24		25
25	#include <plat/omap_hwmod.h>	26	#include <plat/omap_hwmod.h>
26	#include <plat/i2c.h>	27	#include <plat/i2c.h>
@@ -2125,6 +2126,14 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = { · 2098 unmodified lines
2125	.name = "mcpdm",	2126	.name = "mcpdm",
2126	.class = &omap44xx_mcpdm_hwmod_class,	2127	.class = &omap44xx_mcpdm_hwmod_class,
2127	.clkdm_name = "abe_clkdm",	2128	.clkdm_name = "abe_clkdm",
		2129	/*
		2130	* It's suspected that the McPDM requires an off-chip main
		2131	* functional clock, controlled via I2C. This IP block is
		2132	* currently reset very early during boot, before I2C is
		2133	* available, so it doesn't seem that we have any choice in
		2134	* the kernel other than to avoid resetting it.
		2135	*/
		2136	.flags = HWMOD_EXT_OPT_MAIN_CLK,
2128	.mpu_irqs = omap44xx_mcpdm_irqs,	2137	.mpu_irqs = omap44xx_mcpdm_irqs,
2129	.sdma_reqs = omap44xx_mcpdm_sdma_reqs,	2138	.sdma_reqs = omap44xx_mcpdm_sdma_reqs,
2130	.main_clk = "mcpdm_fck",	2139	.main_clk = "mcpdm_fck",
@@ -2681,6 +2690,32 @@ static struct omap_hwmod_class omap44xx_ocp2scp_hwmod_class = { · 550 unmodified lines
2681	.sysc = &omap44xx_ocp2scp_sysc,	2690	.sysc = &omap44xx_ocp2scp_sysc,
2682	};	2691	};
2683		2692
		2693	/* ocp2scp dev_attr */
		2694	static struct resource omap44xx_usb_phy_and_pll_addrs[] = {
		2695	{
		2696	.name = "usb_phy",
		2697	.start = 0x4a0ad080,
		2698	.end = 0x4a0ae000,
		2699	.flags = IORESOURCE_MEM,
		2700	},
		2701	{
		2702	/* XXX: Remove this once control module driver is in place */
		2703	.name = "ctrl_dev",
		2704	.start = 0x4a002300,
		2705	.end = 0x4a002303,
		2706	.flags = IORESOURCE_MEM,
		2707	},
		2708	{ }
		2709	};
		2710
		2711	static struct omap_ocp2scp_dev ocp2scp_dev_attr[] = {
		2712	{
		2713	.drv_name = "omap-usb2",
		2714	.res = omap44xx_usb_phy_and_pll_addrs,
		2715	},
		2716	{ }
		2717	};
		2718
2684	/* ocp2scp_usb_phy */	2719	/* ocp2scp_usb_phy */
2685	static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = {	2720	static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = {
2686	.name = "ocp2scp_usb_phy",	2721	.name = "ocp2scp_usb_phy",
@@ -2694,6 +2729,7 @@ static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = { · 7 unmodified lines
2694	.modulemode = MODULEMODE_HWCTRL,	2729	.modulemode = MODULEMODE_HWCTRL,
2695	},	2730	},
2696	},	2731	},
		2732	.dev_attr = ocp2scp_dev_attr,
2697	};	2733	};
2698		2734
2699	/*	2735	/*

arch/arm/mach-omap2/twl-common.c+1−1

@@ -366,7 +366,7 @@ static struct regulator_init_data omap4_clk32kg_idata = { · 365 unmodified lines
366	};	366	};
367		367
368	static struct regulator_consumer_supply omap4_vdd1_supply[] = {	368	static struct regulator_consumer_supply omap4_vdd1_supply[] = {
369	REGULATOR_SUPPLY("vcc", "mpu.0"),	369	REGULATOR_SUPPLY("vcc", "cpu0"),
370	};	370	};
371		371
372	static struct regulator_consumer_supply omap4_vdd2_supply[] = {	372	static struct regulator_consumer_supply omap4_vdd2_supply[] = {

arch/arm/mach-omap2/vc.c+1−1

@@ -264,7 +264,7 @@ static void __init omap_vc_i2c_init(struct voltagedomain *voltdm) · 263 unmodified lines
264		264
265	if (initialized) {	265	if (initialized) {
266	if (voltdm->pmic->i2c_high_speed != i2c_high_speed)	266	if (voltdm->pmic->i2c_high_speed != i2c_high_speed)
267	pr_warn("%s: I2C config for vdd_%s does not match other channels (%u).",	267	pr_warn("%s: I2C config for vdd_%s does not match other channels (%u).\n",
268	__func__, voltdm->name, i2c_high_speed);	268	__func__, voltdm->name, i2c_high_speed);
269	return;	269	return;
270	}	270	}

arch/arm/mach-pxa/hx4700.c+7−1

 #include <linux/mfd/asic3.h>
 #include <linux/mtd/physmap.h>
 #include <linux/pda_power.h>
+#include <linux/pwm.h>
 #include <linux/pwm_backlight.h>
 #include <linux/regulator/driver.h>
 #include <linux/regulator/gpio-regulator.h>
  */
 static struct platform_pwm_backlight_data backlight_data = {
-	.pwm_id         = 1,
+	.pwm_id         = -1,	/* Superseded by pwm_lookup */
 	.max_brightness = 200,
 	.dft_brightness = 100,
 	.pwm_period_ns  = 30923,
 	},
 };
+static struct pwm_lookup hx4700_pwm_lookup[] = {
+	PWM_LOOKUP("pxa27x-pwm.1", 0, "pwm-backlight", NULL),
+};
 /*
  * USB "Transceiver"
  */
 	pxa_set_stuart_info(NULL);
 	platform_add_devices(devices, ARRAY_SIZE(devices));
+	pwm_add_table(hx4700_pwm_lookup, ARRAY_SIZE(hx4700_pwm_lookup));
 	pxa_set_ficp_info(&ficp_info);
 	pxa27x_set_i2c_power_info(NULL);

arch/arm/mach-pxa/spitz_pm.c+2−6

 	gpio_set_value(SPITZ_GPIO_LED_GREEN, on);
 }
-static unsigned long gpio18_config[] = {
+static unsigned long gpio18_config = GPIO18_GPIO;
-	GPIO18_RDY,
-	GPIO18_GPIO,
-};
 static void spitz_presuspend(void)
 {
 	PGSR3 &= ~SPITZ_GPIO_G3_STROBE_BIT;
 	PGSR2 |= GPIO_bit(SPITZ_GPIO_KEY_STROBE0);
-	pxa2xx_mfp_config(&gpio18_config[0], 1);
+	pxa2xx_mfp_config(&gpio18_config, 1);
 	gpio_request_one(18, GPIOF_OUT_INIT_HIGH, "Unknown");
 	gpio_free(18);
 static void spitz_postsuspend(void)
 {
-	pxa2xx_mfp_config(&gpio18_config[1], 1);
 }
 static int spitz_should_wakeup(unsigned int resume_on_alarm)

arch/arm/mm/alignment.c+1−1

@@ -745,7 +745,7 @@ do_alignment_t32_to_handler(unsigned long pinstr, struct pt_regs regs, · 744 unmodified lines
745	static int	745	static int
746	do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)	746	do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
747	{	747	{
748	union offset_union offset;	748	union offset_union uninitialized_var(offset);
749	unsigned long instr = 0, instrptr;	749	unsigned long instr = 0, instrptr;
750	int (handler)(unsigned long addr, unsigned long instr, struct pt_regs regs);	750	int (handler)(unsigned long addr, unsigned long instr, struct pt_regs regs);
751	unsigned int type;	751	unsigned int type;

arch/arm/plat-omap/include/plat/omap_hwmod.h+6−0

  *     in order to complete the reset. Optional clocks will be disabled
  *     again after the reset.
  * HWMOD_16BIT_REG: Module has 16bit registers
+ * HWMOD_EXT_OPT_MAIN_CLK: The only main functional clock source for
+ *     this IP block comes from an off-chip source and is not always
+ *     enabled.  This prevents the hwmod code from being able to
+ *     enable and reset the IP block early.  XXX Eventually it should
+ *     be possible to query the clock framework for this information.
  */
 #define HWMOD_SWSUP_SIDLE			(1 << 0)
 #define HWMOD_SWSUP_MSTANDBY			(1 << 1)
 #define HWMOD_NO_IDLEST				(1 << 6)
 #define HWMOD_CONTROL_OPT_CLKS_IN_RESET		(1 << 7)
 #define HWMOD_16BIT_REG				(1 << 8)
+#define HWMOD_EXT_OPT_MAIN_CLK			(1 << 9)
 /*
  * omap_hwmod._int_flags definitions

arch/arm/tools/Makefile+1−1

@@ -5,6 +5,6 @@ · 4 unmodified lines
5	#	5	#
6		6
7	include/generated/mach-types.h: $(src)/gen-mach-types $(src)/mach-types	7	include/generated/mach-types.h: $(src)/gen-mach-types $(src)/mach-types
8	$(kecho) ' Generating $@'	8	@$(kecho) ' Generating $@'
9	@mkdir -p $(dir $@)	9	@mkdir -p $(dir $@)
10	$(Q)$(AWK) -f $^ > $@ \|\| { rm -f $@; /bin/false; }	10	$(Q)$(AWK) -f $^ > $@ \|\| { rm -f $@; /bin/false; }

arch/arm/vfp/vfpmodule.c+6−3

 			elf_hwcap |= HWCAP_VFPv3;
 			/*
-			 * Check for VFPv3 D16. CPUs in this configuration
+			 * Check for VFPv3 D16 and VFPv4 D16.  CPUs in
-			 * only have 16 x 64bit registers.
+			 * this configuration only have 16 x 64bit
+			 * registers.
 			 */
 			if (((fmrx(MVFR0) & MVFR0_A_SIMD_MASK)) == 1)
-				elf_hwcap |= HWCAP_VFPv3D16;
+				elf_hwcap |= HWCAP_VFPv3D16; /* also v4-D16 */
+			else
+				elf_hwcap |= HWCAP_VFPD32;
 		}
 #endif
 		/*

arch/arm/xen/enlighten.c+11−0

@@ -166,3 +166,14 @@ void free_xenballooned_pages(int nr_pages, struct page **pages) · 165 unmodified lines
166	*pages = NULL;	166	*pages = NULL;
167	}	167	}
168	EXPORT_SYMBOL_GPL(free_xenballooned_pages);	168	EXPORT_SYMBOL_GPL(free_xenballooned_pages);
		169
		170	/* In the hypervisor.S file. */
		171	EXPORT_SYMBOL_GPL(HYPERVISOR_event_channel_op);
		172	EXPORT_SYMBOL_GPL(HYPERVISOR_grant_table_op);
		173	EXPORT_SYMBOL_GPL(HYPERVISOR_xen_version);
		174	EXPORT_SYMBOL_GPL(HYPERVISOR_console_io);
		175	EXPORT_SYMBOL_GPL(HYPERVISOR_sched_op);
		176	EXPORT_SYMBOL_GPL(HYPERVISOR_hvm_op);
		177	EXPORT_SYMBOL_GPL(HYPERVISOR_memory_op);
		178	EXPORT_SYMBOL_GPL(HYPERVISOR_physdev_op);
		179	EXPORT_SYMBOL_GPL(privcmd_call);

arch/arm64/Kconfig+1−0

@@ -1,6 +1,7 @@
1	config ARM64	1	config ARM64
2	def_bool y	2	def_bool y
3	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE	3	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
		4	select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
4	select GENERIC_CLOCKEVENTS	5	select GENERIC_CLOCKEVENTS
5	select GENERIC_HARDIRQS_NO_DEPRECATED	6	select GENERIC_HARDIRQS_NO_DEPRECATED
6	select GENERIC_IOMAP	7	select GENERIC_IOMAP

arch/arm64/include/asm/elf.h+1−4

@@ -25,12 +25,10 @@ · 24 unmodified lines
25	#include <asm/user.h>	25	#include <asm/user.h>
26		26
27	typedef unsigned long elf_greg_t;	27	typedef unsigned long elf_greg_t;
28	typedef unsigned long elf_freg_t[3];
29		28
30	#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))	29	#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
31	typedef elf_greg_t elf_gregset_t[ELF_NGREG];	30	typedef elf_greg_t elf_gregset_t[ELF_NGREG];
32		31	typedef struct user_fpsimd_state elf_fpregset_t;
33	typedef struct user_fp elf_fpregset_t;
34		32
35	#define EM_AARCH64 183	33	#define EM_AARCH64 183
36		34
@@ -87,7 +85,6 @@ typedef struct user_fp elf_fpregset_t; · 50 unmodified lines
87	#define R_AARCH64_MOVW_PREL_G2_NC 292	85	#define R_AARCH64_MOVW_PREL_G2_NC 292
88	#define R_AARCH64_MOVW_PREL_G3 293	86	#define R_AARCH64_MOVW_PREL_G3 293
89		87
90
91	/*	88	/*
92	* These are used to set parameters in the core dumps.	89	* These are used to set parameters in the core dumps.
93	*/	90	*/

arch/arm64/include/asm/fpsimd.h+2−3

  *  - FPSR and FPCR
  *  - 32 128-bit data registers
  *
- * Note that user_fp forms a prefix of this structure, which is relied
+ * Note that user_fpsimd forms a prefix of this structure, which is
- * upon in the ptrace FP/SIMD accessors. struct user_fpsimd_state must
+ * relied upon in the ptrace FP/SIMD accessors.
- * form a prefix of struct fpsimd_state.
  */
 struct fpsimd_state {
 	union {

arch/arm64/include/asm/io.h+5−5

@@ -114,7 +114,7 @@ static inline u64 __raw_readq(const volatile void __iomem *addr) · 113 unmodified lines
114	* I/O port access primitives.	114	* I/O port access primitives.
115	*/	115	*/
116	#define IO_SPACE_LIMIT 0xffff	116	#define IO_SPACE_LIMIT 0xffff
117	#define PCI_IOBASE ((void __iomem *)0xffffffbbfffe0000UL)	117	#define PCI_IOBASE ((void __iomem *)(MODULES_VADDR - SZ_2M))
118		118
119	static inline u8 inb(unsigned long addr)	119	static inline u8 inb(unsigned long addr)
120	{	120	{
@@ -222,12 +222,12 @@ extern void __iomem *__ioremap(phys_addr_t phys_addr, size_t size, pgprot_t prot · 101 unmodified lines
222	extern void __iounmap(volatile void __iomem *addr);	222	extern void __iounmap(volatile void __iomem *addr);
223		223
224	#define PROT_DEFAULT (PTE_TYPE_PAGE \| PTE_AF \| PTE_DIRTY)	224	#define PROT_DEFAULT (PTE_TYPE_PAGE \| PTE_AF \| PTE_DIRTY)
225	#define PROT_DEVICE_nGnRE (PROT_DEFAULT \| PTE_XN \| PTE_ATTRINDX(MT_DEVICE_nGnRE))	225	#define PROT_DEVICE_nGnRE (PROT_DEFAULT \| PTE_PXN \| PTE_UXN \| PTE_ATTRINDX(MT_DEVICE_nGnRE))
226	#define PROT_NORMAL_NC (PROT_DEFAULT \| PTE_ATTRINDX(MT_NORMAL_NC))	226	#define PROT_NORMAL_NC (PROT_DEFAULT \| PTE_ATTRINDX(MT_NORMAL_NC))
227		227
228	#define ioremap(addr, size) __ioremap((addr), (size), PROT_DEVICE_nGnRE)	228	#define ioremap(addr, size) __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE))
229	#define ioremap_nocache(addr, size) __ioremap((addr), (size), PROT_DEVICE_nGnRE)	229	#define ioremap_nocache(addr, size) __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE))
230	#define ioremap_wc(addr, size) __ioremap((addr), (size), PROT_NORMAL_NC)	230	#define ioremap_wc(addr, size) __ioremap((addr), (size), __pgprot(PROT_NORMAL_NC))
231	#define iounmap __iounmap	231	#define iounmap __iounmap
232		232
233	#define ARCH_HAS_IOREMAP_WC	233	#define ARCH_HAS_IOREMAP_WC

arch/arm64/include/asm/pgtable-hwdef.h+4−2

 #define PMD_SECT_S		(_AT(pmdval_t, 3) << 8)
 #define PMD_SECT_AF		(_AT(pmdval_t, 1) << 10)
 #define PMD_SECT_NG		(_AT(pmdval_t, 1) << 11)
-#define PMD_SECT_XN		(_AT(pmdval_t, 1) << 54)
+#define PMD_SECT_PXN		(_AT(pmdval_t, 1) << 53)
+#define PMD_SECT_UXN		(_AT(pmdval_t, 1) << 54)
 /*
  * AttrIndx[2:0] encoding (mapping attributes defined in the MAIR* registers).
 #define PTE_SHARED		(_AT(pteval_t, 3) << 8)		/* SH[1:0], inner shareable */
 #define PTE_AF			(_AT(pteval_t, 1) << 10)	/* Access Flag */
 #define PTE_NG			(_AT(pteval_t, 1) << 11)	/* nG */
-#define PTE_XN			(_AT(pteval_t, 1) << 54)	/* XN */
+#define PTE_PXN			(_AT(pteval_t, 1) << 53)	/* Privileged XN */
+#define PTE_UXN			(_AT(pteval_t, 1) << 54)	/* User XN */
 /*
  * AttrIndx[2:0] encoding (mapping attributes defined in the MAIR* registers).

arch/arm64/include/asm/pgtable.h+20−20

arch/arm64/include/asm/processor.h+2−0

@@ -43,6 +43,8 @@ · 42 unmodified lines
43	#else	43	#else
44	#define STACK_TOP STACK_TOP_MAX	44	#define STACK_TOP STACK_TOP_MAX
45	#endif /* CONFIG_COMPAT */	45	#endif /* CONFIG_COMPAT */
		46
		47	#define ARCH_LOW_ADDRESS_LIMIT PHYS_MASK
46	#endif /* __KERNEL__ */	48	#endif /* __KERNEL__ */
47		49
48	struct debug_info {	50	struct debug_info {

arch/arm64/include/asm/unistd.h+0−1

@@ -14,7 +14,6 @@ · 13 unmodified lines
14	* along with this program. If not, see <http://www.gnu.org/licenses/>.	14	* along with this program. If not, see <http://www.gnu.org/licenses/>.
15	*/	15	*/
16	#ifdef CONFIG_COMPAT	16	#ifdef CONFIG_COMPAT
17	#define __ARCH_WANT_COMPAT_IPC_PARSE_VERSION
18	#define __ARCH_WANT_COMPAT_STAT64	17	#define __ARCH_WANT_COMPAT_STAT64
19	#define __ARCH_WANT_SYS_GETHOSTNAME	18	#define __ARCH_WANT_SYS_GETHOSTNAME
20	#define __ARCH_WANT_SYS_PAUSE	19	#define __ARCH_WANT_SYS_PAUSE

arch/arm64/kernel/perf_event.c+2−8

 	ARMV8_PMUV3_PERFCTR_BUS_ACCESS				= 0x19,
 	ARMV8_PMUV3_PERFCTR_MEM_ERROR				= 0x1A,
 	ARMV8_PMUV3_PERFCTR_BUS_CYCLES				= 0x1D,
-	/*
-	 * This isn't an architected event.
-	 * We detect this event number and use the cycle counter instead.
-	 */
-	ARMV8_PMUV3_PERFCTR_CPU_CYCLES				= 0xFF,
 };
 /* PMUv3 HW events mapping. */
 static const unsigned armv8_pmuv3_perf_map[PERF_COUNT_HW_MAX] = {
-	[PERF_COUNT_HW_CPU_CYCLES]		= ARMV8_PMUV3_PERFCTR_CPU_CYCLES,
+	[PERF_COUNT_HW_CPU_CYCLES]		= ARMV8_PMUV3_PERFCTR_CLOCK_CYCLES,
 	[PERF_COUNT_HW_INSTRUCTIONS]		= ARMV8_PMUV3_PERFCTR_INSTR_EXECUTED,
 	[PERF_COUNT_HW_CACHE_REFERENCES]	= ARMV8_PMUV3_PERFCTR_L1_DCACHE_ACCESS,
 	[PERF_COUNT_HW_CACHE_MISSES]		= ARMV8_PMUV3_PERFCTR_L1_DCACHE_REFILL,
 	unsigned long evtype = event->config_base & ARMV8_EVTYPE_EVENT;
 	/* Always place a cycle counter into the cycle counter. */
-	if (evtype == ARMV8_PMUV3_PERFCTR_CPU_CYCLES) {
+	if (evtype == ARMV8_PMUV3_PERFCTR_CLOCK_CYCLES) {
 		if (test_and_set_bit(ARMV8_IDX_CYCLE_COUNTER, cpuc->used_mask))
 			return -EAGAIN;

arch/arm64/kernel/process.c+0−18

@@ -309,24 +309,6 @@ struct task_struct __switch_to(struct task_struct prev, · 308 unmodified lines
309	return last;	309	return last;
310	}	310	}
311		311
312	/*
313	* Fill in the task's elfregs structure for a core dump.
314	*/
315	int dump_task_regs(struct task_struct t, elf_gregset_t elfregs)
316	{
317	elf_core_copy_regs(elfregs, task_pt_regs(t));
318	return 1;
319	}
320
321	/*
322	* fill in the fpe structure for a core dump...
323	*/
324	int dump_fpu (struct pt_regs regs, struct user_fp fp)
325	{
326	return 0;
327	}
328	EXPORT_SYMBOL(dump_fpu);
329
330	/*	312	/*
331	* Shuffle the argument into the correct register before calling the	313	* Shuffle the argument into the correct register before calling the
332	* thread function. x1 is the thread argument, x2 is the pointer to	314	* thread function. x1 is the thread argument, x2 is the pointer to

arch/arm64/kernel/smp.c+1−2

@@ -211,8 +211,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void) · 210 unmodified lines
211	* before we continue.	211	* before we continue.
212	*/	212	*/
213	set_cpu_online(cpu, true);	213	set_cpu_online(cpu, true);
214	while (!cpu_active(cpu))	214	complete(&cpu_running);
215	cpu_relax();
216		215
217	/*	216	/*
218	* OK, it's off to the idle thread for us	217	* OK, it's off to the idle thread for us

arch/arm64/mm/init.c+1−1

@@ -80,7 +80,7 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max) · 79 unmodified lines
80	#ifdef CONFIG_ZONE_DMA32	80	#ifdef CONFIG_ZONE_DMA32
81	/* 4GB maximum for 32-bit only capable devices */	81	/* 4GB maximum for 32-bit only capable devices */
82	max_dma32 = min(max, MAX_DMA32_PFN);	82	max_dma32 = min(max, MAX_DMA32_PFN);
83	zone_size[ZONE_DMA32] = max_dma32 - min;	83	zone_size[ZONE_DMA32] = max(min, max_dma32) - min;
84	#endif	84	#endif
85	zone_size[ZONE_NORMAL] = max - max_dma32;	85	zone_size[ZONE_NORMAL] = max - max_dma32;
86		86

arch/h8300/include/asm/cache.h+2−1

@@ -2,7 +2,8 @@ · 1 unmodified line
2	#define __ARCH_H8300_CACHE_H	2	#define __ARCH_H8300_CACHE_H
3		3
4	/* bytes per L1 cache line */	4	/* bytes per L1 cache line */
5	#define L1_CACHE_BYTES 4	5	#define L1_CACHE_SHIFT 2
		6	#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
6		7
7	/* m68k-elf-gcc 2.95.2 doesn't like these */	8	/* m68k-elf-gcc 2.95.2 doesn't like these */
8		9

arch/ia64/mm/init.c+0−1

@@ -637,7 +637,6 @@ mem_init (void) · 636 unmodified lines
637		637
638	high_memory = __va(max_low_pfn * PAGE_SIZE);	638	high_memory = __va(max_low_pfn * PAGE_SIZE);
639		639
640	reset_zone_present_pages();
641	for_each_online_pgdat(pgdat)	640	for_each_online_pgdat(pgdat)
642	if (pgdat->bdata->node_bootmem_map)	641	if (pgdat->bdata->node_bootmem_map)
643	totalram_pages += free_all_bootmem_node(pgdat);	642	totalram_pages += free_all_bootmem_node(pgdat);

arch/mips/cavium-octeon/executive/cvmx-l2c.c+1−0

@@ -30,6 +30,7 @@ · 29 unmodified lines
30	* measurement, and debugging facilities.	30	* measurement, and debugging facilities.
31	*/	31	*/
32		32
		33	#include <linux/irqflags.h>
33	#include <asm/octeon/cvmx.h>	34	#include <asm/octeon/cvmx.h>
34	#include <asm/octeon/cvmx-l2c.h>	35	#include <asm/octeon/cvmx-l2c.h>
35	#include <asm/octeon/cvmx-spinlock.h>	36	#include <asm/octeon/cvmx-spinlock.h>

arch/mips/fw/arc/misc.c+1−0

@@ -11,6 +11,7 @@ · 10 unmodified lines
11	*/	11	*/
12	#include <linux/init.h>	12	#include <linux/init.h>
13	#include <linux/kernel.h>	13	#include <linux/kernel.h>
		14	#include <linux/irqflags.h>
14		15
15	#include <asm/bcache.h>	16	#include <asm/bcache.h>
16		17

arch/mips/include/asm/bitops.h+39−89

 #endif
 #include <linux/compiler.h>
-#include <linux/irqflags.h>
 #include <linux/types.h>
 #include <asm/barrier.h>
 #include <asm/byteorder.h>		/* sigh ... */
 #define smp_mb__before_clear_bit()	smp_mb__before_llsc()
 #define smp_mb__after_clear_bit()	smp_llsc_mb()
+/*
+ * These are the "slower" versions of the functions and are in bitops.c.
+ * These functions call raw_local_irq_{save,restore}().
+ */
+void __mips_set_bit(unsigned long nr, volatile unsigned long *addr);
+void __mips_clear_bit(unsigned long nr, volatile unsigned long *addr);
+void __mips_change_bit(unsigned long nr, volatile unsigned long *addr);
+int __mips_test_and_set_bit(unsigned long nr,
+			    volatile unsigned long *addr);
+int __mips_test_and_set_bit_lock(unsigned long nr,
+				 volatile unsigned long *addr);
+int __mips_test_and_clear_bit(unsigned long nr,
+			      volatile unsigned long *addr);
+int __mips_test_and_change_bit(unsigned long nr,
+			       volatile unsigned long *addr);
 /*
  * set_bit - Atomically set a bit in memory
  * @nr: the bit to set
 static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
 {
 	unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
-	unsigned short bit = nr & SZLONG_MASK;
+	int bit = nr & SZLONG_MASK;
 	unsigned long temp;
 	if (kernel_uses_llsc && R10000_LLSC_WAR) {
 			: "=&r" (temp), "+m" (*m)
 			: "ir" (1UL << bit));
 		} while (unlikely(!temp));
-	} else {
+	} else
-		volatile unsigned long *a = addr;
+		__mips_set_bit(nr, addr);
-		unsigned long mask;
-		unsigned long flags;
-		a += nr >> SZLONG_LOG;
-		mask = 1UL << bit;
-		raw_local_irq_save(flags);
-		*a |= mask;
-		raw_local_irq_restore(flags);
-	}
 }
 /*
 static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
 {
 	unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
-	unsigned short bit = nr & SZLONG_MASK;
+	int bit = nr & SZLONG_MASK;
 	unsigned long temp;
 	if (kernel_uses_llsc && R10000_LLSC_WAR) {
 			: "=&r" (temp), "+m" (*m)
 			: "ir" (~(1UL << bit)));
 		} while (unlikely(!temp));
-	} else {
+	} else
-		volatile unsigned long *a = addr;
+		__mips_clear_bit(nr, addr);
-		unsigned long mask;
-		unsigned long flags;
-		a += nr >> SZLONG_LOG;
-		mask = 1UL << bit;
-		raw_local_irq_save(flags);
-		*a &= ~mask;
-		raw_local_irq_restore(flags);
-	}
 }
 /*
  */
 static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
 {
-	unsigned short bit = nr & SZLONG_MASK;
+	int bit = nr & SZLONG_MASK;
 	if (kernel_uses_llsc && R10000_LLSC_WAR) {
 		unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
 			: "=&r" (temp), "+m" (*m)
 			: "ir" (1UL << bit));
 		} while (unlikely(!temp));
-	} else {
+	} else
-		volatile unsigned long *a = addr;
+		__mips_change_bit(nr, addr);
-		unsigned long mask;
-		unsigned long flags;
-		a += nr >> SZLONG_LOG;
-		mask = 1UL << bit;
-		raw_local_irq_save(flags);
-		*a ^= mask;
-		raw_local_irq_restore(flags);
-	}
 }
 /*
 static inline int test_and_set_bit(unsigned long nr,
 	volatile unsigned long *addr)
 {
-	unsigned short bit = nr & SZLONG_MASK;
+	int bit = nr & SZLONG_MASK;
 	unsigned long res;
 	smp_mb__before_llsc();
 		} while (unlikely(!res));
 		res = temp & (1UL << bit);
-	} else {
+	} else
-		volatile unsigned long *a = addr;
+		res = __mips_test_and_set_bit(nr, addr);
-		unsigned long mask;
-		unsigned long flags;
-		a += nr >> SZLONG_LOG;
-		mask = 1UL << bit;
-		raw_local_irq_save(flags);
-		res = (mask & *a);
-		*a |= mask;
-		raw_local_irq_restore(flags);
-	}
 	smp_llsc_mb();
 static inline int test_and_set_bit_lock(unsigned long nr,
 	volatile unsigned long *addr)
 {
-	unsigned short bit = nr & SZLONG_MASK;
+	int bit = nr & SZLONG_MASK;
 	unsigned long res;
 	if (kernel_uses_llsc && R10000_LLSC_WAR) {
 		} while (unlikely(!res));
 		res = temp & (1UL << bit);
-	} else {
+	} else
-		volatile unsigned long *a = addr;
+		res = __mips_test_and_set_bit_lock(nr, addr);
-		unsigned long mask;
-		unsigned long flags;
-		a += nr >> SZLONG_LOG;
-		mask = 1UL << bit;
-		raw_local_irq_save(flags);
-		res = (mask & *a);
-		*a |= mask;
-		raw_local_irq_restore(flags);
-	}
 	smp_llsc_mb();
 static inline int test_and_clear_bit(unsigned long nr,
 	volatile unsigned long *addr)
 {
-	unsigned short bit = nr & SZLONG_MASK;
+	int bit = nr & SZLONG_MASK;
 	unsigned long res;
 	smp_mb__before_llsc();
 		} while (unlikely(!res));
 		res = temp & (1UL << bit);
-	} else {
+	} else
-		volatile unsigned long *a = addr;
+		res = __mips_test_and_clear_bit(nr, addr);
-		unsigned long mask;
-		unsigned long flags;
-		a += nr >> SZLONG_LOG;
-		mask = 1UL << bit;
-		raw_local_irq_save(flags);
-		res = (mask & *a);
-		*a &= ~mask;
-		raw_local_irq_restore(flags);
-	}
 	smp_llsc_mb();
 static inline int test_and_change_bit(unsigned long nr,
 	volatile unsigned long *addr)
 {
-	unsigned short bit = nr & SZLONG_MASK;
+	int bit = nr & SZLONG_MASK;
 	unsigned long res;
 	smp_mb__before_llsc();
 		} while (unlikely(!res));
 		res = temp & (1UL << bit);
-	} else {
+	} else
-		volatile unsigned long *a = addr;
+		res = __mips_test_and_change_bit(nr, addr);
-		unsigned long mask;
-		unsigned long flags;
-		a += nr >> SZLONG_LOG;
-		mask = 1UL << bit;
-		raw_local_irq_save(flags);
-		res = (mask & *a);
-		*a ^= mask;
-		raw_local_irq_restore(flags);
-	}
 	smp_llsc_mb();

arch/mips/include/asm/compat.h+1−1

@@ -290,7 +290,7 @@ struct compat_shmid64_ds { · 289 unmodified lines
290		290
291	static inline int is_compat_task(void)	291	static inline int is_compat_task(void)
292	{	292	{
293	return test_thread_flag(TIF_32BIT);	293	return test_thread_flag(TIF_32BIT_ADDR);
294	}	294	}
295		295
296	#endif /* _ASM_COMPAT_H */	296	#endif /* _ASM_COMPAT_H */

arch/mips/include/asm/io.h+1−0

@@ -15,6 +15,7 @@ · 14 unmodified lines
15	#include <linux/compiler.h>	15	#include <linux/compiler.h>
16	#include <linux/kernel.h>	16	#include <linux/kernel.h>
17	#include <linux/types.h>	17	#include <linux/types.h>
		18	#include <linux/irqflags.h>
18		19
19	#include <asm/addrspace.h>	20	#include <asm/addrspace.h>
20	#include <asm/bug.h>	21	#include <asm/bug.h>

arch/mips/include/asm/irqflags.h+75−132

 #include <linux/compiler.h>
 #include <asm/hazards.h>
-__asm__(
+#if defined(CONFIG_CPU_MIPSR2) && !defined(CONFIG_MIPS_MT_SMTC)
-	"	.macro	arch_local_irq_enable				\n"
-	"	.set	push						\n"
-	"	.set	reorder						\n"
-	"	.set	noat						\n"
-#ifdef CONFIG_MIPS_MT_SMTC
-	"	mfc0	$1, $2, 1	# SMTC - clear TCStatus.IXMT	\n"
-	"	ori	$1, 0x400					\n"
-	"	xori	$1, 0x400					\n"
-	"	mtc0	$1, $2, 1					\n"
-#elif defined(CONFIG_CPU_MIPSR2)
-	"	ei							\n"
-#else
-	"	mfc0	$1,$12						\n"
-	"	ori	$1,0x1f						\n"
-	"	xori	$1,0x1e						\n"
-	"	mtc0	$1,$12						\n"
-#endif
-	"	irq_enable_hazard					\n"
-	"	.set	pop						\n"
-	"	.endm");
-extern void smtc_ipi_replay(void);
-static inline void arch_local_irq_enable(void)
-{
-#ifdef CONFIG_MIPS_MT_SMTC
-	/*
-	 * SMTC kernel needs to do a software replay of queued
-	 * IPIs, at the cost of call overhead on each local_irq_enable()
-	 */
-	smtc_ipi_replay();
-#endif
-	__asm__ __volatile__(
-		"arch_local_irq_enable"
-		: /* no outputs */
-		: /* no inputs */
-		: "memory");
-}
-/*
- * For cli() we have to insert nops to make sure that the new value
- * has actually arrived in the status register before the end of this
- * macro.
- * R4000/R4400 need three nops, the R4600 two nops and the R10000 needs
- * no nops at all.
- */
-/*
- * For TX49, operating only IE bit is not enough.
- *
- * If mfc0 $12 follows store and the mfc0 is last instruction of a
- * page and fetching the next instruction causes TLB miss, the result
- * of the mfc0 might wrongly contain EXL bit.
- *
- * ERT-TX49H2-027, ERT-TX49H3-012, ERT-TX49HL3-006, ERT-TX49H4-008
- *
- * Workaround: mask EXL bit of the result or place a nop before mfc0.
- */
 __asm__(
 	"	.macro	arch_local_irq_disable\n"
 	"	.set	push						\n"
 	"	.set	noat						\n"
-#ifdef CONFIG_MIPS_MT_SMTC
-	"	mfc0	$1, $2, 1					\n"
-	"	ori	$1, 0x400					\n"
-	"	.set	noreorder					\n"
-	"	mtc0	$1, $2, 1					\n"
-#elif defined(CONFIG_CPU_MIPSR2)
 	"	di							\n"
-#else
-	"	mfc0	$1,$12						\n"
-	"	ori	$1,0x1f						\n"
-	"	xori	$1,0x1f						\n"
-	"	.set	noreorder					\n"
-	"	mtc0	$1,$12						\n"
-#endif
 	"	irq_disable_hazard					\n"
 	"	.set	pop						\n"
 	"	.endm							\n");
 		: "memory");
 }
-__asm__(
-	"	.macro	arch_local_save_flags flags			\n"
-	"	.set	push						\n"
-	"	.set	reorder						\n"
-#ifdef CONFIG_MIPS_MT_SMTC
-	"	mfc0	\\flags, $2, 1					\n"
-#else
-	"	mfc0	\\flags, $12					\n"
-#endif
-	"	.set	pop						\n"
-	"	.endm							\n");
-static inline unsigned long arch_local_save_flags(void)
-{
-	unsigned long flags;
-	asm volatile("arch_local_save_flags %0" : "=r" (flags));
-	return flags;
-}
 __asm__(
 	"	.macro	arch_local_irq_save result			\n"
 	"	.set	push						\n"
 	"	.set	reorder						\n"
 	"	.set	noat						\n"
-#ifdef CONFIG_MIPS_MT_SMTC
-	"	mfc0	\\result, $2, 1					\n"
-	"	ori	$1, \\result, 0x400				\n"
-	"	.set	noreorder					\n"
-	"	mtc0	$1, $2, 1					\n"
-	"	andi	\\result, \\result, 0x400			\n"
-#elif defined(CONFIG_CPU_MIPSR2)
 	"	di	\\result					\n"
 	"	andi	\\result, 1					\n"
-#else
-	"	mfc0	\\result, $12					\n"
-	"	ori	$1, \\result, 0x1f				\n"
-	"	xori	$1, 0x1f					\n"
-	"	.set	noreorder					\n"
-	"	mtc0	$1, $12						\n"
-#endif
 	"	irq_disable_hazard					\n"
 	"	.set	pop						\n"
 	"	.endm							\n");
 	return flags;
 }
 __asm__(
 	"	.macro	arch_local_irq_restore flags			\n"
 	"	.set	push						\n"
 	"	.set	noreorder					\n"
 	"	.set	noat						\n"
-#ifdef CONFIG_MIPS_MT_SMTC
+#if defined(CONFIG_IRQ_CPU)
-	"mfc0	$1, $2, 1						\n"
-	"andi	\\flags, 0x400						\n"
-	"ori	$1, 0x400						\n"
-	"xori	$1, 0x400						\n"
-	"or	\\flags, $1						\n"
-	"mtc0	\\flags, $2, 1						\n"
-#elif defined(CONFIG_CPU_MIPSR2) && defined(CONFIG_IRQ_CPU)
 	/*
 	 * Slow, but doesn't suffer from a relatively unlikely race
 	 * condition we're having since days 1.
 	 */
 	"	beqz	\\flags, 1f					\n"
-	"	 di							\n"
+	"	di							\n"
 	"	ei							\n"
 	"1:								\n"
-#elif defined(CONFIG_CPU_MIPSR2)
+#else
 	/*
 	 * Fast, dangerous.  Life is fun, life is good.
 	 */
 	"	mfc0	$1, $12						\n"
 	"	ins	$1, \\flags, 0, 1				\n"
 	"	mtc0	$1, $12						\n"
-#else
-	"	mfc0	$1, $12						\n"
-	"	andi	\\flags, 1					\n"
-	"	ori	$1, 0x1f					\n"
-	"	xori	$1, 0x1f					\n"
-	"	or	\\flags, $1					\n"
-	"	mtc0	\\flags, $12					\n"
 #endif
 	"	irq_disable_hazard					\n"
 	"	.set	pop						\n"
 	"	.endm							\n");
 static inline void arch_local_irq_restore(unsigned long flags)
 {
 	unsigned long __tmp1;
-#ifdef CONFIG_MIPS_MT_SMTC
-	/*
-	 * SMTC kernel needs to do a software replay of queued
-	 * IPIs, at the cost of branch and call overhead on each
-	 * local_irq_restore()
-	 */
-	if (unlikely(!(flags & 0x0400)))
-		smtc_ipi_replay();
-#endif
 	__asm__ __volatile__(
 		"arch_local_irq_restore\t%0"
 		: "=r" (__tmp1)
 		: "0" (flags)
 		: "memory");
 }
+#else
+/* Functions that require preempt_{dis,en}able() are in mips-atomic.c */
+void arch_local_irq_disable(void);
+unsigned long arch_local_irq_save(void);
+void arch_local_irq_restore(unsigned long flags);
+void __arch_local_irq_restore(unsigned long flags);
+#endif /* if defined(CONFIG_CPU_MIPSR2) && !defined(CONFIG_MIPS_MT_SMTC) */
+__asm__(
+	"	.macro	arch_local_irq_enable				\n"
+	"	.set	push						\n"
+	"	.set	reorder						\n"
+	"	.set	noat						\n"
+#ifdef CONFIG_MIPS_MT_SMTC
+	"	mfc0	$1, $2, 1	# SMTC - clear TCStatus.IXMT	\n"
+	"	ori	$1, 0x400					\n"
+	"	xori	$1, 0x400					\n"
+	"	mtc0	$1, $2, 1					\n"
+#elif defined(CONFIG_CPU_MIPSR2)
+	"	ei							\n"
+#else
+	"	mfc0	$1,$12						\n"
+	"	ori	$1,0x1f						\n"
+	"	xori	$1,0x1e						\n"
+	"	mtc0	$1,$12						\n"
+#endif
+	"	irq_enable_hazard					\n"
+	"	.set	pop						\n"
+	"	.endm");
+extern void smtc_ipi_replay(void);
+static inline void arch_local_irq_enable(void)
+{
+#ifdef CONFIG_MIPS_MT_SMTC
+	/*
+	 * SMTC kernel needs to do a software replay of queued
+	 * IPIs, at the cost of call overhead on each local_irq_enable()
+	 */
+	smtc_ipi_replay();
+#endif
+	__asm__ __volatile__(
+		"arch_local_irq_enable"
+		: /* no outputs */
+		: /* no inputs */
+		: "memory");
+}
+__asm__(
+	"	.macro	arch_local_save_flags flags			\n"
+	"	.set	push						\n"
+	"	.set	reorder						\n"
+#ifdef CONFIG_MIPS_MT_SMTC
+	"	mfc0	\\flags, $2, 1					\n"
+#else
+	"	mfc0	\\flags, $12					\n"
+#endif
+	"	.set	pop						\n"
+	"	.endm							\n");
+static inline unsigned long arch_local_save_flags(void)
+{
+	unsigned long flags;
+	asm volatile("arch_local_save_flags %0" : "=r" (flags));
+	return flags;
+}
 static inline int arch_irqs_disabled_flags(unsigned long flags)
 {
 #endif
 }
-#endif
+#endif /* #ifndef __ASSEMBLY__ */
 /*
  * Do the CPU's IRQ-state tracing from assembly code.

arch/mips/include/asm/thread_info.h+0−6

 #define TIF_LOAD_WATCH		25	/* If set, load watch registers */
 #define TIF_SYSCALL_TRACE	31	/* syscall trace active */
-#ifdef CONFIG_MIPS32_O32
-#define TIF_32BIT TIF_32BIT_REGS
-#elif defined(CONFIG_MIPS32_N32)
-#define TIF_32BIT _TIF_32BIT_ADDR
-#endif /* CONFIG_MIPS32_O32 */
 #define _TIF_SYSCALL_TRACE	(1<<TIF_SYSCALL_TRACE)
 #define _TIF_SIGPENDING		(1<<TIF_SIGPENDING)
 #define _TIF_NEED_RESCHED	(1<<TIF_NEED_RESCHED)

arch/mips/lib/Makefile+3−2

@@ -2,8 +2,9 @@ · 1 unmodified line
2	# Makefile for MIPS-specific library files..	2	# Makefile for MIPS-specific library files..
3	#	3	#
4		4
5	lib-y += csum_partial.o delay.o memcpy.o memset.o \	5	lib-y += bitops.o csum_partial.o delay.o memcpy.o memset.o \
6	strlen_user.o strncpy_user.o strnlen_user.o uncached.o	6	mips-atomic.o strlen_user.o strncpy_user.o \
		7	strnlen_user.o uncached.o
7		8
8	obj-y += iomap.o	9	obj-y += iomap.o
9	obj-$(CONFIG_PCI) += iomap-pci.o	10	obj-$(CONFIG_PCI) += iomap-pci.o

arch/mips/lib/bitops.c+179−0

@@ -0,0 +1,179 @@
	1	/*
	2	* This file is subject to the terms and conditions of the GNU General Public
	3	* License. See the file "COPYING" in the main directory of this archive
	4	* for more details.
	5	*
	6	* Copyright (c) 1994-1997, 99, 2000, 06, 07 Ralf Baechle (ralf@linux-mips.org)
	7	* Copyright (c) 1999, 2000 Silicon Graphics, Inc.
	8	*/
	9	#include <linux/bitops.h>
	10	#include <linux/irqflags.h>
	11	#include <linux/export.h>
	12
	13
	14	/**
	15	* __mips_set_bit - Atomically set a bit in memory. This is called by
	16	* set_bit() if it cannot find a faster solution.
	17	* @nr: the bit to set
	18	* @addr: the address to start counting from
	19	*/
	20	void __mips_set_bit(unsigned long nr, volatile unsigned long *addr)
	21	{
	22	volatile unsigned long *a = addr;
	23	unsigned bit = nr & SZLONG_MASK;
	24	unsigned long mask;
	25	unsigned long flags;
	26
	27	a += nr >> SZLONG_LOG;
	28	mask = 1UL << bit;
	29	raw_local_irq_save(flags);
	30	*a \|= mask;
	31	raw_local_irq_restore(flags);
	32	}
	33	EXPORT_SYMBOL(__mips_set_bit);
	34
	35
	36	/**
	37	* __mips_clear_bit - Clears a bit in memory. This is called by clear_bit() if
	38	* it cannot find a faster solution.
	39	* @nr: Bit to clear
	40	* @addr: Address to start counting from
	41	*/
	42	void __mips_clear_bit(unsigned long nr, volatile unsigned long *addr)
	43	{
	44	volatile unsigned long *a = addr;
	45	unsigned bit = nr & SZLONG_MASK;
	46	unsigned long mask;
	47	unsigned long flags;
	48
	49	a += nr >> SZLONG_LOG;
	50	mask = 1UL << bit;
	51	raw_local_irq_save(flags);
	52	*a &= ~mask;
	53	raw_local_irq_restore(flags);
	54	}
	55	EXPORT_SYMBOL(__mips_clear_bit);
	56
	57
	58	/**
	59	* __mips_change_bit - Toggle a bit in memory. This is called by change_bit()
	60	* if it cannot find a faster solution.
	61	* @nr: Bit to change
	62	* @addr: Address to start counting from
	63	*/
	64	void __mips_change_bit(unsigned long nr, volatile unsigned long *addr)
	65	{
	66	volatile unsigned long *a = addr;
	67	unsigned bit = nr & SZLONG_MASK;
	68	unsigned long mask;
	69	unsigned long flags;
	70
	71	a += nr >> SZLONG_LOG;
	72	mask = 1UL << bit;
	73	raw_local_irq_save(flags);
	74	*a ^= mask;
	75	raw_local_irq_restore(flags);
	76	}
	77	EXPORT_SYMBOL(__mips_change_bit);
	78
	79
	80	/**
	81	* __mips_test_and_set_bit - Set a bit and return its old value. This is
	82	* called by test_and_set_bit() if it cannot find a faster solution.
	83	* @nr: Bit to set
	84	* @addr: Address to count from
	85	*/
	86	int __mips_test_and_set_bit(unsigned long nr,
	87	volatile unsigned long *addr)
	88	{
	89	volatile unsigned long *a = addr;
	90	unsigned bit = nr & SZLONG_MASK;
	91	unsigned long mask;
	92	unsigned long flags;
	93	unsigned long res;
	94
	95	a += nr >> SZLONG_LOG;
	96	mask = 1UL << bit;
	97	raw_local_irq_save(flags);
	98	res = (mask & *a);
	99	*a \|= mask;
	100	raw_local_irq_restore(flags);
	101	return res;
	102	}
	103	EXPORT_SYMBOL(__mips_test_and_set_bit);
	104
	105
	106	/**
	107	* __mips_test_and_set_bit_lock - Set a bit and return its old value. This is
	108	* called by test_and_set_bit_lock() if it cannot find a faster solution.
	109	* @nr: Bit to set
	110	* @addr: Address to count from
	111	*/
	112	int __mips_test_and_set_bit_lock(unsigned long nr,
	113	volatile unsigned long *addr)
	114	{
	115	volatile unsigned long *a = addr;
	116	unsigned bit = nr & SZLONG_MASK;
	117	unsigned long mask;
	118	unsigned long flags;
	119	unsigned long res;
	120
	121	a += nr >> SZLONG_LOG;
	122	mask = 1UL << bit;
	123	raw_local_irq_save(flags);
	124	res = (mask & *a);
	125	*a \|= mask;
	126	raw_local_irq_restore(flags);
	127	return res;
	128	}
	129	EXPORT_SYMBOL(__mips_test_and_set_bit_lock);
	130
	131
	132	/**
	133	* __mips_test_and_clear_bit - Clear a bit and return its old value. This is
	134	* called by test_and_clear_bit() if it cannot find a faster solution.
	135	* @nr: Bit to clear
	136	* @addr: Address to count from
	137	*/
	138	int __mips_test_and_clear_bit(unsigned long nr, volatile unsigned long *addr)
	139	{
	140	volatile unsigned long *a = addr;
	141	unsigned bit = nr & SZLONG_MASK;
	142	unsigned long mask;
	143	unsigned long flags;
	144	unsigned long res;
	145
	146	a += nr >> SZLONG_LOG;
	147	mask = 1UL << bit;
	148	raw_local_irq_save(flags);
	149	res = (mask & *a);
	150	*a &= ~mask;
	151	raw_local_irq_restore(flags);
	152	return res;
	153	}
	154	EXPORT_SYMBOL(__mips_test_and_clear_bit);
	155
	156
	157	/**
	158	* __mips_test_and_change_bit - Change a bit and return its old value. This is
	159	* called by test_and_change_bit() if it cannot find a faster solution.
	160	* @nr: Bit to change
	161	* @addr: Address to count from
	162	*/
	163	int __mips_test_and_change_bit(unsigned long nr, volatile unsigned long *addr)
	164	{
	165	volatile unsigned long *a = addr;
	166	unsigned bit = nr & SZLONG_MASK;
	167	unsigned long mask;
	168	unsigned long flags;
	169	unsigned long res;
	170
	171	a += nr >> SZLONG_LOG;
	172	mask = 1UL << bit;
	173	raw_local_irq_save(flags);
	174	res = (mask & *a);
	175	*a ^= mask;
	176	raw_local_irq_restore(flags);
	177	return res;
	178	}
	179	EXPORT_SYMBOL(__mips_test_and_change_bit);

arch/mips/lib/mips-atomic.c+176−0

@@ -0,0 +1,176 @@
	1	/*
	2	* This file is subject to the terms and conditions of the GNU General Public
	3	* License. See the file "COPYING" in the main directory of this archive
	4	* for more details.
	5	*
	6	* Copyright (C) 1994, 95, 96, 97, 98, 99, 2003 by Ralf Baechle
	7	* Copyright (C) 1996 by Paul M. Antoine
	8	* Copyright (C) 1999 Silicon Graphics
	9	* Copyright (C) 2000 MIPS Technologies, Inc.
	10	*/
	11	#include <asm/irqflags.h>
	12	#include <asm/hazards.h>
	13	#include <linux/compiler.h>
	14	#include <linux/preempt.h>
	15	#include <linux/export.h>
	16
	17	#if !defined(CONFIG_CPU_MIPSR2) \|\| defined(CONFIG_MIPS_MT_SMTC)
	18
	19	/*
	20	* For cli() we have to insert nops to make sure that the new value
	21	* has actually arrived in the status register before the end of this
	22	* macro.
	23	* R4000/R4400 need three nops, the R4600 two nops and the R10000 needs
	24	* no nops at all.
	25	*/
	26	/*
	27	* For TX49, operating only IE bit is not enough.
	28	*
	29	* If mfc0 $12 follows store and the mfc0 is last instruction of a
	30	* page and fetching the next instruction causes TLB miss, the result
	31	* of the mfc0 might wrongly contain EXL bit.
	32	*
	33	* ERT-TX49H2-027, ERT-TX49H3-012, ERT-TX49HL3-006, ERT-TX49H4-008
	34	*
	35	* Workaround: mask EXL bit of the result or place a nop before mfc0.
	36	*/
	37	__asm__(
	38	" .macro arch_local_irq_disable\n"
	39	" .set push \n"
	40	" .set noat \n"
	41	#ifdef CONFIG_MIPS_MT_SMTC
	42	" mfc0 $1, $2, 1 \n"
	43	" ori $1, 0x400 \n"
	44	" .set noreorder \n"
	45	" mtc0 $1, $2, 1 \n"
	46	#elif defined(CONFIG_CPU_MIPSR2)
	47	/* see irqflags.h for inline function */
	48	#else
	49	" mfc0 $1,$12 \n"
	50	" ori $1,0x1f \n"
	51	" xori $1,0x1f \n"
	52	" .set noreorder \n"
	53	" mtc0 $1,$12 \n"
	54	#endif
	55	" irq_disable_hazard \n"
	56	" .set pop \n"
	57	" .endm \n");
	58
	59	void arch_local_irq_disable(void)
	60	{
	61	preempt_disable();
	62	__asm__ __volatile__(
	63	"arch_local_irq_disable"
	64	: /* no outputs */
	65	: /* no inputs */
	66	: "memory");
	67	preempt_enable();
	68	}
	69	EXPORT_SYMBOL(arch_local_irq_disable);
	70
	71
	72	__asm__(
	73	" .macro arch_local_irq_save result \n"
	74	" .set push \n"
	75	" .set reorder \n"
	76	" .set noat \n"
	77	#ifdef CONFIG_MIPS_MT_SMTC
	78	" mfc0 \\result, $2, 1 \n"
	79	" ori $1, \\result, 0x400 \n"
	80	" .set noreorder \n"
	81	" mtc0 $1, $2, 1 \n"
	82	" andi \\result, \\result, 0x400 \n"
	83	#elif defined(CONFIG_CPU_MIPSR2)
	84	/* see irqflags.h for inline function */
	85	#else
	86	" mfc0 \\result, $12 \n"
	87	" ori $1, \\result, 0x1f \n"
	88	" xori $1, 0x1f \n"
	89	" .set noreorder \n"
	90	" mtc0 $1, $12 \n"
	91	#endif
	92	" irq_disable_hazard \n"
	93	" .set pop \n"
	94	" .endm \n");
	95
	96	unsigned long arch_local_irq_save(void)
	97	{
	98	unsigned long flags;
	99	preempt_disable();
	100	asm volatile("arch_local_irq_save\t%0"
	101	: "=r" (flags)
	102	: /* no inputs */
	103	: "memory");
	104	preempt_enable();
	105	return flags;
	106	}
	107	EXPORT_SYMBOL(arch_local_irq_save);
	108
	109
	110	__asm__(
	111	" .macro arch_local_irq_restore flags \n"
	112	" .set push \n"
	113	" .set noreorder \n"
	114	" .set noat \n"
	115	#ifdef CONFIG_MIPS_MT_SMTC
	116	"mfc0 $1, $2, 1 \n"
	117	"andi \\flags, 0x400 \n"
	118	"ori $1, 0x400 \n"
	119	"xori $1, 0x400 \n"
	120	"or \\flags, $1 \n"
	121	"mtc0 \\flags, $2, 1 \n"
	122	#elif defined(CONFIG_CPU_MIPSR2) && defined(CONFIG_IRQ_CPU)
	123	/* see irqflags.h for inline function */
	124	#elif defined(CONFIG_CPU_MIPSR2)
	125	/* see irqflags.h for inline function */
	126	#else
	127	" mfc0 $1, $12 \n"
	128	" andi \\flags, 1 \n"
	129	" ori $1, 0x1f \n"
	130	" xori $1, 0x1f \n"
	131	" or \\flags, $1 \n"
	132	" mtc0 \\flags, $12 \n"
	133	#endif
	134	" irq_disable_hazard \n"
	135	" .set pop \n"
	136	" .endm \n");
	137
	138	void arch_local_irq_restore(unsigned long flags)
	139	{
	140	unsigned long __tmp1;
	141
	142	#ifdef CONFIG_MIPS_MT_SMTC
	143	/*
	144	* SMTC kernel needs to do a software replay of queued
	145	* IPIs, at the cost of branch and call overhead on each
	146	* local_irq_restore()
	147	*/
	148	if (unlikely(!(flags & 0x0400)))
	149	smtc_ipi_replay();
	150	#endif
	151	preempt_disable();
	152	__asm__ __volatile__(
	153	"arch_local_irq_restore\t%0"
	154	: "=r" (__tmp1)
	155	: "0" (flags)
	156	: "memory");
	157	preempt_enable();
	158	}
	159	EXPORT_SYMBOL(arch_local_irq_restore);
	160
	161
	162	void __arch_local_irq_restore(unsigned long flags)
	163	{
	164	unsigned long __tmp1;
	165
	166	preempt_disable();
	167	__asm__ __volatile__(
	168	"arch_local_irq_restore\t%0"
	169	: "=r" (__tmp1)
	170	: "0" (flags)
	171	: "memory");
	172	preempt_enable();
	173	}
	174	EXPORT_SYMBOL(__arch_local_irq_restore);
	175
	176	#endif /* !defined(CONFIG_CPU_MIPSR2) \|\| defined(CONFIG_MIPS_MT_SMTC) */

arch/mips/mti-malta/malta-platform.c+2−1

 #include <linux/mtd/partitions.h>
 #include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
+#include <asm/mips-boards/maltaint.h>
 #include <mtd/mtd-abi.h>
 #define SMC_PORT(base, int)						\
 	SMC_PORT(0x2F8, 3),
 	{
 		.mapbase	= 0x1f000900,	/* The CBUS UART */
-		.irq		= MIPS_CPU_IRQ_BASE + 2,
+		.irq		= MIPS_CPU_IRQ_BASE + MIPSCPU_INT_MB2,
 		.uartclk	= 3686400,	/* Twice the usual clk! */
 		.iotype		= UPIO_MEM32,
 		.flags		= CBUS_UART_FLAGS,

arch/s390/Kconfig+1−0

@@ -96,6 +96,7 @@ config S390 · 95 unmodified lines
96	select HAVE_MEMBLOCK_NODE_MAP	96	select HAVE_MEMBLOCK_NODE_MAP
97	select HAVE_CMPXCHG_LOCAL	97	select HAVE_CMPXCHG_LOCAL
98	select HAVE_CMPXCHG_DOUBLE	98	select HAVE_CMPXCHG_DOUBLE
		99	select HAVE_ALIGNED_STRUCT_PAGE if SLUB
99	select HAVE_VIRT_CPU_ACCOUNTING	100	select HAVE_VIRT_CPU_ACCOUNTING
100	select VIRT_CPU_ACCOUNTING	101	select VIRT_CPU_ACCOUNTING
101	select ARCH_DISCARD_MEMBLOCK	102	select ARCH_DISCARD_MEMBLOCK

arch/s390/include/asm/cio.h+2−0

@@ -9,6 +9,8 @@ · 8 unmodified lines
9		9
10	#define LPM_ANYPATH 0xff	10	#define LPM_ANYPATH 0xff
11	#define __MAX_CSSID 0	11	#define __MAX_CSSID 0
		12	#define __MAX_SUBCHANNEL 65535
		13	#define __MAX_SSID 3
12		14
13	#include <asm/scsw.h>	15	#include <asm/scsw.h>
14		16

arch/s390/include/asm/compat.h+1−1

@@ -20,7 +20,7 @@ · 19 unmodified lines
20	#define PSW32_MASK_CC 0x00003000UL	20	#define PSW32_MASK_CC 0x00003000UL
21	#define PSW32_MASK_PM 0x00000f00UL	21	#define PSW32_MASK_PM 0x00000f00UL
22		22
23	#define PSW32_MASK_USER 0x00003F00UL	23	#define PSW32_MASK_USER 0x0000FF00UL
24		24
25	#define PSW32_ADDR_AMODE 0x80000000UL	25	#define PSW32_ADDR_AMODE 0x80000000UL
26	#define PSW32_ADDR_INSN 0x7FFFFFFFUL	26	#define PSW32_ADDR_INSN 0x7FFFFFFFUL

arch/s390/include/asm/pgtable.h+22−13

@@ -506,12 +506,15 @@ static inline int pud_bad(pud_t pud) · 505 unmodified lines
506		506
507	static inline int pmd_present(pmd_t pmd)	507	static inline int pmd_present(pmd_t pmd)
508	{	508	{
509	return (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN) != 0UL;	509	unsigned long mask = _SEGMENT_ENTRY_INV \| _SEGMENT_ENTRY_RO;
		510	return (pmd_val(pmd) & mask) == _HPAGE_TYPE_NONE \|\|
		511	!(pmd_val(pmd) & _SEGMENT_ENTRY_INV);
510	}	512	}
511		513
512	static inline int pmd_none(pmd_t pmd)	514	static inline int pmd_none(pmd_t pmd)
513	{	515	{
514	return (pmd_val(pmd) & _SEGMENT_ENTRY_INV) != 0UL;	516	return (pmd_val(pmd) & _SEGMENT_ENTRY_INV) &&
		517	!(pmd_val(pmd) & _SEGMENT_ENTRY_RO);
515	}	518	}
516		519
517	static inline int pmd_large(pmd_t pmd)	520	static inline int pmd_large(pmd_t pmd)
@@ -1223,6 +1226,11 @@ static inline void __pmd_idte(unsigned long address, pmd_t *pmdp) · 705 unmodified lines
1223	}	1226	}
1224		1227
1225	#ifdef CONFIG_TRANSPARENT_HUGEPAGE	1228	#ifdef CONFIG_TRANSPARENT_HUGEPAGE
		1229
		1230	#define SEGMENT_NONE __pgprot(_HPAGE_TYPE_NONE)
		1231	#define SEGMENT_RO __pgprot(_HPAGE_TYPE_RO)
		1232	#define SEGMENT_RW __pgprot(_HPAGE_TYPE_RW)
		1233
1226	#define __HAVE_ARCH_PGTABLE_DEPOSIT	1234	#define __HAVE_ARCH_PGTABLE_DEPOSIT
1227	extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pgtable_t pgtable);	1235	extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pgtable_t pgtable);
1228		1236
@@ -1242,16 +1250,15 @@ static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr, · 13 unmodified lines
1242		1250
1243	static inline unsigned long massage_pgprot_pmd(pgprot_t pgprot)	1251	static inline unsigned long massage_pgprot_pmd(pgprot_t pgprot)
1244	{	1252	{
1245	unsigned long pgprot_pmd = 0;	1253	/*
1246		1254	* pgprot is PAGE_NONE, PAGE_RO, or PAGE_RW (see __Pxxx / __Sxxx)
1247	if (pgprot_val(pgprot) & _PAGE_INVALID) {	1255	* Convert to segment table entry format.
1248	if (pgprot_val(pgprot) & _PAGE_SWT)	1256	*/
1249	pgprot_pmd \|= _HPAGE_TYPE_NONE;	1257	if (pgprot_val(pgprot) == pgprot_val(PAGE_NONE))
1250	pgprot_pmd \|= _SEGMENT_ENTRY_INV;	1258	return pgprot_val(SEGMENT_NONE);
1251	}	1259	if (pgprot_val(pgprot) == pgprot_val(PAGE_RO))
1252	if (pgprot_val(pgprot) & _PAGE_RO)	1260	return pgprot_val(SEGMENT_RO);
1253	pgprot_pmd \|= _SEGMENT_ENTRY_RO;	1261	return pgprot_val(SEGMENT_RW);
1254	return pgprot_pmd;
1255	}	1262	}
1256		1263
1257	static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)	1264	static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
@@ -1269,7 +1276,9 @@ static inline pmd_t pmd_mkhuge(pmd_t pmd) · 11 unmodified lines
1269		1276
1270	static inline pmd_t pmd_mkwrite(pmd_t pmd)	1277	static inline pmd_t pmd_mkwrite(pmd_t pmd)
1271	{	1278	{
1272	pmd_val(pmd) &= ~_SEGMENT_ENTRY_RO;	1279	/* Do not clobber _HPAGE_TYPE_NONE pages! */
		1280	if (!(pmd_val(pmd) & _SEGMENT_ENTRY_INV))
		1281	pmd_val(pmd) &= ~_SEGMENT_ENTRY_RO;
1273	return pmd;	1282	return pmd;
1274	}	1283	}
1275		1284

arch/s390/include/asm/topology.h+3−0

@@ -8,6 +8,9 @@ struct cpu; · 7 unmodified lines
8		8
9	#ifdef CONFIG_SCHED_BOOK	9	#ifdef CONFIG_SCHED_BOOK
10		10
		11	extern unsigned char cpu_socket_id[NR_CPUS];
		12	#define topology_physical_package_id(cpu) (cpu_socket_id[cpu])
		13
11	extern unsigned char cpu_core_id[NR_CPUS];	14	extern unsigned char cpu_core_id[NR_CPUS];
12	extern cpumask_t cpu_core_map[NR_CPUS];	15	extern cpumask_t cpu_core_map[NR_CPUS];
13		16

arch/s390/include/uapi/asm/ptrace.h+2−2

@@ -239,7 +239,7 @@ typedef struct · 238 unmodified lines
239	#define PSW_MASK_EA 0x00000000UL	239	#define PSW_MASK_EA 0x00000000UL
240	#define PSW_MASK_BA 0x00000000UL	240	#define PSW_MASK_BA 0x00000000UL
241		241
242	#define PSW_MASK_USER 0x00003F00UL	242	#define PSW_MASK_USER 0x0000FF00UL
243		243
244	#define PSW_ADDR_AMODE 0x80000000UL	244	#define PSW_ADDR_AMODE 0x80000000UL
245	#define PSW_ADDR_INSN 0x7FFFFFFFUL	245	#define PSW_ADDR_INSN 0x7FFFFFFFUL
@@ -269,7 +269,7 @@ typedef struct · 23 unmodified lines
269	#define PSW_MASK_EA 0x0000000100000000UL	269	#define PSW_MASK_EA 0x0000000100000000UL
270	#define PSW_MASK_BA 0x0000000080000000UL	270	#define PSW_MASK_BA 0x0000000080000000UL
271		271
272	#define PSW_MASK_USER 0x00003F8180000000UL	272	#define PSW_MASK_USER 0x0000FF8180000000UL
273		273
274	#define PSW_ADDR_AMODE 0x0000000000000000UL	274	#define PSW_ADDR_AMODE 0x0000000000000000UL
275	#define PSW_ADDR_INSN 0xFFFFFFFFFFFFFFFFUL	275	#define PSW_ADDR_INSN 0xFFFFFFFFFFFFFFFFUL

arch/s390/kernel/compat_signal.c+12−2

 	regs->psw.mask = (regs->psw.mask & ~PSW_MASK_USER) |
 		(__u64)(regs32.psw.mask & PSW32_MASK_USER) << 32 |
 		(__u64)(regs32.psw.addr & PSW32_ADDR_AMODE);
+	/* Check for invalid user address space control. */
+	if ((regs->psw.mask & PSW_MASK_ASC) >= (psw_kernel_bits & PSW_MASK_ASC))
+		regs->psw.mask = (psw_user_bits & PSW_MASK_ASC) |
+			(regs->psw.mask & ~PSW_MASK_ASC);
 	regs->psw.addr = (__u64)(regs32.psw.addr & PSW32_ADDR_INSN);
 	for (i = 0; i < NUM_GPRS; i++)
 		regs->gprs[i] = (__u64) regs32.gprs[i];
 	/* Set up registers for signal handler */
 	regs->gprs[15] = (__force __u64) frame;
-	regs->psw.mask |= PSW_MASK_BA;		/* force amode 31 */
+	/* Force 31 bit amode and default user address space control. */
+	regs->psw.mask = PSW_MASK_BA |
+		(psw_user_bits & PSW_MASK_ASC) |
+		(regs->psw.mask & ~PSW_MASK_ASC);
 	regs->psw.addr = (__force __u64) ka->sa.sa_handler;
 	regs->gprs[2] = map_signal(sig);
 	/* Set up registers for signal handler */
 	regs->gprs[15] = (__force __u64) frame;
-	regs->psw.mask |= PSW_MASK_BA;		/* force amode 31 */
+	/* Force 31 bit amode and default user address space control. */
+	regs->psw.mask = PSW_MASK_BA |
+		(psw_user_bits & PSW_MASK_ASC) |
+		(regs->psw.mask & ~PSW_MASK_ASC);
 	regs->psw.addr = (__u64) ka->sa.sa_handler;
 	regs->gprs[2] = map_signal(sig);

arch/s390/kernel/sclp.S+7−1

 #endif
 	mvc	.LoldpswS1-.LbaseS1(16,%r13),0(%r8)
 	mvc	0(16,%r8),0(%r9)
+#ifdef CONFIG_64BIT
+	epsw	%r6,%r7				# set current addressing mode
+	nill	%r6,0x1				# in new psw (31 or 64 bit mode)
+	nilh	%r7,0x8000
+	stm	%r6,%r7,0(%r8)
+#endif
 	lhi	%r6,0x0200			# cr mask for ext int (cr0.54)
 	ltr	%r2,%r2
 	jz	.LsetctS1
 	.long	0x00080000, 0x80000000+.LwaitS1	# PSW to handle ext int
 #ifdef CONFIG_64BIT
 .LextpswS1_64:
-	.quad	0x0000000180000000, .LwaitS1	# PSW to handle ext int, 64 bit
+	.quad	0, .LwaitS1			# PSW to handle ext int, 64 bit
 #endif
 .LwaitpswS1:
 	.long	0x010a0000, 0x00000000+.LloopS1	# PSW to wait for ext int

arch/s390/kernel/signal.c+12−2

 	/* Use regs->psw.mask instead of psw_user_bits to preserve PER bit. */
 	regs->psw.mask = (regs->psw.mask & ~PSW_MASK_USER) |
 		(user_sregs.regs.psw.mask & PSW_MASK_USER);
+	/* Check for invalid user address space control. */
+	if ((regs->psw.mask & PSW_MASK_ASC) >= (psw_kernel_bits & PSW_MASK_ASC))
+		regs->psw.mask = (psw_user_bits & PSW_MASK_ASC) |
+			(regs->psw.mask & ~PSW_MASK_ASC);
 	/* Check for invalid amode */
 	if (regs->psw.mask & PSW_MASK_EA)
 		regs->psw.mask |= PSW_MASK_BA;
 	/* Set up registers for signal handler */
 	regs->gprs[15] = (unsigned long) frame;
-	regs->psw.mask |= PSW_MASK_EA | PSW_MASK_BA;	/* 64 bit amode */
+	/* Force default amode and default user address space control. */
+	regs->psw.mask = PSW_MASK_EA | PSW_MASK_BA |
+		(psw_user_bits & PSW_MASK_ASC) |
+		(regs->psw.mask & ~PSW_MASK_ASC);
 	regs->psw.addr = (unsigned long) ka->sa.sa_handler | PSW_ADDR_AMODE;
 	regs->gprs[2] = map_signal(sig);
 	/* Set up registers for signal handler */
 	regs->gprs[15] = (unsigned long) frame;
-	regs->psw.mask |= PSW_MASK_EA | PSW_MASK_BA;	/* 64 bit amode */
+	/* Force default amode and default user address space control. */
+	regs->psw.mask = PSW_MASK_EA | PSW_MASK_BA |
+		(psw_user_bits & PSW_MASK_ASC) |
+		(regs->psw.mask & ~PSW_MASK_ASC);
 	regs->psw.addr = (unsigned long) ka->sa.sa_handler | PSW_ADDR_AMODE;
 	regs->gprs[2] = map_signal(sig);

arch/s390/kernel/topology.c+4−2

 static struct mask_info core_info;
 cpumask_t cpu_core_map[NR_CPUS];
 unsigned char cpu_core_id[NR_CPUS];
+unsigned char cpu_socket_id[NR_CPUS];
 static struct mask_info book_info;
 cpumask_t cpu_book_map[NR_CPUS];
 			cpumask_set_cpu(lcpu, &book->mask);
 			cpu_book_id[lcpu] = book->id;
 			cpumask_set_cpu(lcpu, &core->mask);
+			cpu_core_id[lcpu] = rcpu;
 			if (one_core_per_cpu) {
-				cpu_core_id[lcpu] = rcpu;
+				cpu_socket_id[lcpu] = rcpu;
 				core = core->next;
 			} else {
-				cpu_core_id[lcpu] = core->id;
+				cpu_socket_id[lcpu] = core->id;
 			}
 			smp_cpu_set_polarization(lcpu, tl_cpu->pp);
 		}

arch/s390/lib/uaccess_pt.c+1−1

@@ -39,7 +39,7 @@ static __always_inline unsigned long follow_table(struct mm_struct *mm, · 38 unmodified lines
39	pmd = pmd_offset(pud, addr);	39	pmd = pmd_offset(pud, addr);
40	if (pmd_none(*pmd))	40	if (pmd_none(*pmd))
41	return -0x10UL;	41	return -0x10UL;
42	if (pmd_huge(*pmd)) {	42	if (pmd_large(*pmd)) {
43	if (write && (pmd_val(*pmd) & _SEGMENT_ENTRY_RO))	43	if (write && (pmd_val(*pmd) & _SEGMENT_ENTRY_RO))
44	return -0x04UL;	44	return -0x04UL;
45	return (pmd_val(*pmd) & HPAGE_MASK) + (addr & ~HPAGE_MASK);	45	return (pmd_val(*pmd) & HPAGE_MASK) + (addr & ~HPAGE_MASK);

arch/s390/mm/gup.c+3−4

 		 */
 		if (pmd_none(pmd) || pmd_trans_splitting(pmd))
 			return 0;
-		if (unlikely(pmd_huge(pmd))) {
+		if (unlikely(pmd_large(pmd))) {
 			if (!gup_huge_pmd(pmdp, pmd, addr, next,
 					  write, pages, nr))
 				return 0;
 	addr = start;
 	len = (unsigned long) nr_pages << PAGE_SHIFT;
 	end = start + len;
-	if (unlikely(!access_ok(write ? VERIFY_WRITE : VERIFY_READ,
+	if ((end < start) || (end > TASK_SIZE))
-					(void __user *)start, len)))
 		return 0;
 	local_irq_save(flags);
 	addr = start;
 	len = (unsigned long) nr_pages << PAGE_SHIFT;
 	end = start + len;
-	if (end < start)
+	if ((end < start) || (end > TASK_SIZE))
 		goto slow_irqon;
 	/*

arch/sparc/Kconfig+1−0

@@ -20,6 +20,7 @@ config SPARC · 19 unmodified lines
20	select HAVE_ARCH_TRACEHOOK	20	select HAVE_ARCH_TRACEHOOK
21	select SYSCTL_EXCEPTION_TRACE	21	select SYSCTL_EXCEPTION_TRACE
22	select ARCH_WANT_OPTIONAL_GPIOLIB	22	select ARCH_WANT_OPTIONAL_GPIOLIB
		23	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
23	select RTC_CLASS	24	select RTC_CLASS
24	select RTC_DRV_M48T59	25	select RTC_DRV_M48T59
25	select HAVE_IRQ_WORK	26	select HAVE_IRQ_WORK

arch/sparc/crypto/Makefile+8−8

@@ -13,13 +13,13 @@ obj-$(CONFIG_CRYPTO_DES_SPARC64) += camellia-sparc64.o · 12 unmodified lines
13		13
14	obj-$(CONFIG_CRYPTO_CRC32C_SPARC64) += crc32c-sparc64.o	14	obj-$(CONFIG_CRYPTO_CRC32C_SPARC64) += crc32c-sparc64.o
15		15
16	sha1-sparc64-y := sha1_asm.o sha1_glue.o crop_devid.o	16	sha1-sparc64-y := sha1_asm.o sha1_glue.o
17	sha256-sparc64-y := sha256_asm.o sha256_glue.o crop_devid.o	17	sha256-sparc64-y := sha256_asm.o sha256_glue.o
18	sha512-sparc64-y := sha512_asm.o sha512_glue.o crop_devid.o	18	sha512-sparc64-y := sha512_asm.o sha512_glue.o
19	md5-sparc64-y := md5_asm.o md5_glue.o crop_devid.o	19	md5-sparc64-y := md5_asm.o md5_glue.o
20		20
21	aes-sparc64-y := aes_asm.o aes_glue.o crop_devid.o	21	aes-sparc64-y := aes_asm.o aes_glue.o
22	des-sparc64-y := des_asm.o des_glue.o crop_devid.o	22	des-sparc64-y := des_asm.o des_glue.o
23	camellia-sparc64-y := camellia_asm.o camellia_glue.o crop_devid.o	23	camellia-sparc64-y := camellia_asm.o camellia_glue.o
24		24
25	crc32c-sparc64-y := crc32c_asm.o crc32c_glue.o crop_devid.o	25	crc32c-sparc64-y := crc32c_asm.o crc32c_glue.o

arch/sparc/crypto/aes_glue.c+2−0

@@ -475,3 +475,5 @@ MODULE_LICENSE("GPL"); · 474 unmodified lines
475	MODULE_DESCRIPTION("AES Secure Hash Algorithm, sparc64 aes opcode accelerated");	475	MODULE_DESCRIPTION("AES Secure Hash Algorithm, sparc64 aes opcode accelerated");
476		476
477	MODULE_ALIAS("aes");	477	MODULE_ALIAS("aes");
		478
		479	#include "crop_devid.c"

arch/sparc/crypto/camellia_glue.c+2−0

@@ -320,3 +320,5 @@ MODULE_LICENSE("GPL"); · 319 unmodified lines
320	MODULE_DESCRIPTION("Camellia Cipher Algorithm, sparc64 camellia opcode accelerated");	320	MODULE_DESCRIPTION("Camellia Cipher Algorithm, sparc64 camellia opcode accelerated");
321		321
322	MODULE_ALIAS("aes");	322	MODULE_ALIAS("aes");
		323
		324	#include "crop_devid.c"

arch/sparc/crypto/crc32c_glue.c+2−0

@@ -177,3 +177,5 @@ MODULE_LICENSE("GPL"); · 176 unmodified lines
177	MODULE_DESCRIPTION("CRC32c (Castagnoli), sparc64 crc32c opcode accelerated");	177	MODULE_DESCRIPTION("CRC32c (Castagnoli), sparc64 crc32c opcode accelerated");
178		178
179	MODULE_ALIAS("crc32c");	179	MODULE_ALIAS("crc32c");
		180
		181	#include "crop_devid.c"

arch/sparc/crypto/des_glue.c+2−0

@@ -527,3 +527,5 @@ MODULE_LICENSE("GPL"); · 526 unmodified lines
527	MODULE_DESCRIPTION("DES & Triple DES EDE Cipher Algorithms, sparc64 des opcode accelerated");	527	MODULE_DESCRIPTION("DES & Triple DES EDE Cipher Algorithms, sparc64 des opcode accelerated");
528		528
529	MODULE_ALIAS("des");	529	MODULE_ALIAS("des");
		530
		531	#include "crop_devid.c"

arch/sparc/crypto/md5_glue.c+2−0

@@ -186,3 +186,5 @@ MODULE_LICENSE("GPL"); · 185 unmodified lines
186	MODULE_DESCRIPTION("MD5 Secure Hash Algorithm, sparc64 md5 opcode accelerated");	186	MODULE_DESCRIPTION("MD5 Secure Hash Algorithm, sparc64 md5 opcode accelerated");
187		187
188	MODULE_ALIAS("md5");	188	MODULE_ALIAS("md5");
		189
		190	#include "crop_devid.c"

arch/sparc/crypto/sha1_glue.c+2−0

@@ -181,3 +181,5 @@ MODULE_LICENSE("GPL"); · 180 unmodified lines
181	MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm, sparc64 sha1 opcode accelerated");	181	MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm, sparc64 sha1 opcode accelerated");
182		182
183	MODULE_ALIAS("sha1");	183	MODULE_ALIAS("sha1");
		184
		185	#include "crop_devid.c"

arch/sparc/crypto/sha256_glue.c+2−0

@@ -239,3 +239,5 @@ MODULE_DESCRIPTION("SHA-224 and SHA-256 Secure Hash Algorithm, sparc64 sha256 op · 238 unmodified lines
239		239
240	MODULE_ALIAS("sha224");	240	MODULE_ALIAS("sha224");
241	MODULE_ALIAS("sha256");	241	MODULE_ALIAS("sha256");
		242
		243	#include "crop_devid.c"

arch/sparc/crypto/sha512_glue.c+2−0

@@ -224,3 +224,5 @@ MODULE_DESCRIPTION("SHA-384 and SHA-512 Secure Hash Algorithm, sparc64 sha512 op · 223 unmodified lines
224		224
225	MODULE_ALIAS("sha384");	225	MODULE_ALIAS("sha384");
226	MODULE_ALIAS("sha512");	226	MODULE_ALIAS("sha512");
		227
		228	#include "crop_devid.c"

arch/sparc/include/asm/atomic_64.h+3−1

 /* atomic.h: Thankfully the V9 is at least reasonable for this
  *           stuff.
  *
- * Copyright (C) 1996, 1997, 2000 David S. Miller (davem@redhat.com)
+ * Copyright (C) 1996, 1997, 2000, 2012 David S. Miller (davem@redhat.com)
  */
 #ifndef __ARCH_SPARC64_ATOMIC__
 #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
+extern long atomic64_dec_if_positive(atomic64_t *v);
 /* Atomic operations are already serializing */
 #define smp_mb__before_atomic_dec()	barrier()
 #define smp_mb__after_atomic_dec()	barrier()

arch/sparc/include/asm/backoff.h+59−10

@@ -1,6 +1,46 @@
1	#ifndef _SPARC64_BACKOFF_H	1	#ifndef _SPARC64_BACKOFF_H
2	#define _SPARC64_BACKOFF_H	2	#define _SPARC64_BACKOFF_H
3		3
		4	/* The macros in this file implement an exponential backoff facility
		5	* for atomic operations.
		6	*
		7	* When multiple threads compete on an atomic operation, it is
		8	* possible for one thread to be continually denied a successful
		9	* completion of the compare-and-swap instruction. Heavily
		10	* threaded cpu implementations like Niagara can compound this
		11	* problem even further.
		12	*
		13	* When an atomic operation fails and needs to be retried, we spin a
		14	* certain number of times. At each subsequent failure of the same
		15	* operation we double the spin count, realizing an exponential
		16	* backoff.
		17	*
		18	* When we spin, we try to use an operation that will cause the
		19	* current cpu strand to block, and therefore make the core fully
		20	* available to any other other runnable strands. There are two
		21	* options, based upon cpu capabilities.
		22	*
		23	* On all cpus prior to SPARC-T4 we do three dummy reads of the
		24	* condition code register. Each read blocks the strand for something
		25	* between 40 and 50 cpu cycles.
		26	*
		27	* For SPARC-T4 and later we have a special "pause" instruction
		28	* available. This is implemented using writes to register %asr27.
		29	* The cpu will block the number of cycles written into the register,
		30	* unless a disrupting trap happens first. SPARC-T4 specifically
		31	* implements pause with a granularity of 8 cycles. Each strand has
		32	* an internal pause counter which decrements every 8 cycles. So the
		33	* chip shifts the %asr27 value down by 3 bits, and writes the result
		34	* into the pause counter. If a value smaller than 8 is written, the
		35	* chip blocks for 1 cycle.
		36	*
		37	* To achieve the same amount of backoff as the three %ccr reads give
		38	* on earlier chips, we shift the backoff value up by 7 bits. (Three
		39	* %ccr reads block for about 128 cycles, 1 << 7 == 128) We write the
		40	* whole amount we want to block into the pause register, rather than
		41	* loop writing 128 each time.
		42	*/
		43
4	#define BACKOFF_LIMIT (4 * 1024)	44	#define BACKOFF_LIMIT (4 * 1024)
5		45
6	#ifdef CONFIG_SMP	46	#ifdef CONFIG_SMP
@@ -11,16 +51,25 @@ · 4 unmodified lines
11	#define BACKOFF_LABEL(spin_label, continue_label) \	51	#define BACKOFF_LABEL(spin_label, continue_label) \
12	spin_label	52	spin_label
13		53
14	#define BACKOFF_SPIN(reg, tmp, label) \	54	#define BACKOFF_SPIN(reg, tmp, label) \
15	mov reg, tmp; \	55	mov reg, tmp; \
16	88: brnz,pt tmp, 88b; \	56	88: rd %ccr, %g0; \
17	sub tmp, 1, tmp; \	57	rd %ccr, %g0; \
18	set BACKOFF_LIMIT, tmp; \	58	rd %ccr, %g0; \
19	cmp reg, tmp; \	59	.section .pause_3insn_patch,"ax";\
20	bg,pn %xcc, label; \	60	.word 88b; \
21	nop; \	61	sllx tmp, 7, tmp; \
22	ba,pt %xcc, label; \	62	wr tmp, 0, %asr27; \
23	sllx reg, 1, reg;	63	clr tmp; \
		64	.previous; \
		65	brnz,pt tmp, 88b; \
		66	sub tmp, 1, tmp; \
		67	set BACKOFF_LIMIT, tmp; \
		68	cmp reg, tmp; \
		69	bg,pn %xcc, label; \
		70	nop; \
		71	ba,pt %xcc, label; \
		72	sllx reg, 1, reg;
24		73
25	#else	74	#else
26		75

arch/sparc/include/asm/compat.h+3−2

@@ -232,9 +232,10 @@ static inline void __user *arch_compat_alloc_user_space(long len) · 231 unmodified lines
232	struct pt_regs *regs = current_thread_info()->kregs;	232	struct pt_regs *regs = current_thread_info()->kregs;
233	unsigned long usp = regs->u_regs[UREG_I6];	233	unsigned long usp = regs->u_regs[UREG_I6];
234		234
235	if (!(test_thread_flag(TIF_32BIT)))	235	if (test_thread_64bit_stack(usp))
236	usp += STACK_BIAS;	236	usp += STACK_BIAS;
237	else	237
		238	if (test_thread_flag(TIF_32BIT))
238	usp &= 0xffffffffUL;	239	usp &= 0xffffffffUL;
239		240
240	usp -= len;	241	usp -= len;

arch/sparc/include/asm/processor_64.h+16−1

@@ -196,7 +196,22 @@ extern unsigned long get_wchan(struct task_struct *task); · 195 unmodified lines
196	#define KSTK_EIP(tsk) (task_pt_regs(tsk)->tpc)	196	#define KSTK_EIP(tsk) (task_pt_regs(tsk)->tpc)
197	#define KSTK_ESP(tsk) (task_pt_regs(tsk)->u_regs[UREG_FP])	197	#define KSTK_ESP(tsk) (task_pt_regs(tsk)->u_regs[UREG_FP])
198		198
199	#define cpu_relax() barrier()	199	/* Please see the commentary in asm/backoff.h for a description of
		200	* what these instructions are doing and how they have been choosen.
		201	* To make a long story short, we are trying to yield the current cpu
		202	* strand during busy loops.
		203	*/
		204	#define cpu_relax() asm volatile("\n99:\n\t" \
		205	"rd %%ccr, %%g0\n\t" \
		206	"rd %%ccr, %%g0\n\t" \
		207	"rd %%ccr, %%g0\n\t" \
		208	".section .pause_3insn_patch,\"ax\"\n\t"\
		209	".word 99b\n\t" \
		210	"wr %%g0, 128, %%asr27\n\t" \
		211	"nop\n\t" \
		212	"nop\n\t" \
		213	".previous" \
		214	::: "memory")
200		215
201	/* Prefetch support. This is tuned for UltraSPARC-III and later.	216	/* Prefetch support. This is tuned for UltraSPARC-III and later.
202	* UltraSPARC-I will treat these as nops, and UltraSPARC-II has	217	* UltraSPARC-I will treat these as nops, and UltraSPARC-II has

arch/sparc/include/asm/prom.h+5−0

 extern void irq_trans_init(struct device_node *dp);
 extern char *build_path_component(struct device_node *dp);
+/* SPARC has a local implementation */
+extern int of_address_to_resource(struct device_node *dev, int index,
+				  struct resource *r);
+#define of_address_to_resource of_address_to_resource
 #endif /* __KERNEL__ */
 #endif /* _SPARC_PROM_H */

arch/sparc/include/asm/thread_info_64.h+5−0

@@ -259,6 +259,11 @@ static inline bool test_and_clear_restore_sigmask(void) · 258 unmodified lines
259		259
260	#define tsk_is_polling(t) test_tsk_thread_flag(t, TIF_POLLING_NRFLAG)	260	#define tsk_is_polling(t) test_tsk_thread_flag(t, TIF_POLLING_NRFLAG)
261		261
		262	#define thread32_stack_is_64bit(__SP) (((__SP) & 0x1) != 0)
		263	#define test_thread_64bit_stack(__SP) \
		264	((test_thread_flag(TIF_32BIT) && !thread32_stack_is_64bit(__SP)) ? \
		265	false : true)
		266
262	#endif /* !__ASSEMBLY__ */	267	#endif /* !__ASSEMBLY__ */
263		268
264	#endif /* __KERNEL__ */	269	#endif /* __KERNEL__ */

arch/sparc/include/asm/ttable.h+16−8

 /* Normal 32bit spill */
 #define SPILL_2_GENERIC(ASI)				\
-	srl	%sp, 0, %sp;				\
+	and	%sp, 1, %g3;				\
+	brnz,pn	%g3, (. - (128 + 4));			\
+	 srl	%sp, 0, %sp;				\
 	stwa	%l0, [%sp + %g0] ASI;			\
 	mov	0x04, %g3;				\
 	stwa	%l1, [%sp + %g3] ASI;			\
 	stwa	%i6, [%g1 + %g0] ASI;			\
 	stwa	%i7, [%g1 + %g3] ASI;			\
 	saved;						\
-        retry; nop; nop;				\
+        retry;						\
 	b,a,pt	%xcc, spill_fixup_dax;			\
 	b,a,pt	%xcc, spill_fixup_mna;			\
 	b,a,pt	%xcc, spill_fixup;
 #define SPILL_2_GENERIC_ETRAP		\
 etrap_user_spill_32bit:			\
-	srl	%sp, 0, %sp;		\
+	and	%sp, 1, %g3;		\
+	brnz,pn	%g3, etrap_user_spill_64bit;	\
+	 srl	%sp, 0, %sp;		\
 	stwa	%l0, [%sp + 0x00] %asi;	\
 	stwa	%l1, [%sp + 0x04] %asi;	\
 	stwa	%l2, [%sp + 0x08] %asi;	\
 	ba,pt	%xcc, etrap_save;	\
 	 wrpr	%g1, %cwp;		\
 	nop; nop; nop; nop;		\
-	nop; nop; nop; nop;		\
+	nop; nop;			\
 	ba,a,pt	%xcc, etrap_spill_fixup_32bit; \
 	ba,a,pt	%xcc, etrap_spill_fixup_32bit; \
 	ba,a,pt	%xcc, etrap_spill_fixup_32bit;
 /* Normal 32bit fill */
 #define FILL_2_GENERIC(ASI)				\
-	srl	%sp, 0, %sp;				\
+	and	%sp, 1, %g3;				\
+	brnz,pn	%g3, (. - (128 + 4));			\
+	 srl	%sp, 0, %sp;				\
 	lduwa	[%sp + %g0] ASI, %l0;			\
 	mov	0x04, %g2;				\
 	mov	0x08, %g3;				\
 	lduwa	[%g1 + %g3] ASI, %i6;			\
 	lduwa	[%g1 + %g5] ASI, %i7;			\
 	restored;					\
-	retry; nop; nop; nop; nop;			\
+	retry; nop; nop;				\
 	b,a,pt	%xcc, fill_fixup_dax;			\
 	b,a,pt	%xcc, fill_fixup_mna;			\
 	b,a,pt	%xcc, fill_fixup;
 #define FILL_2_GENERIC_RTRAP				\
 user_rtt_fill_32bit:					\
-	srl	%sp, 0, %sp;				\
+	and	%sp, 1, %g3;				\
+	brnz,pn	%g3, user_rtt_fill_64bit;		\
+	 srl	%sp, 0, %sp;				\
 	lduwa	[%sp + 0x00] %asi, %l0;			\
 	lduwa	[%sp + 0x04] %asi, %l1;			\
 	lduwa	[%sp + 0x08] %asi, %l2;			\
 	ba,pt	%xcc, user_rtt_pre_restore;		\
 	 restored;					\
 	nop; nop; nop; nop; nop;			\
-	nop; nop; nop; nop; nop;			\
+	nop; nop; nop;					\
 	ba,a,pt	%xcc, user_rtt_fill_fixup;		\
 	ba,a,pt	%xcc, user_rtt_fill_fixup;		\
 	ba,a,pt	%xcc, user_rtt_fill_fixup;

arch/sparc/include/uapi/asm/unistd.h+6−1

 #define __NR_setns		337
 #define __NR_process_vm_readv	338
 #define __NR_process_vm_writev	339
+#define __NR_kern_features	340
+#define __NR_kcmp		341
-#define NR_syscalls		340
+#define NR_syscalls		342
+/* Bitmask values returned from kern_features system call.  */
+#define KERN_FEATURE_MIXED_MODE_STACK	0x00000001
 #ifdef __32bit_syscall_numbers__
 /* Sparc 32-bit only has the "setresuid32", "getresuid32" variants,

arch/sparc/kernel/entry.h+7−0

@@ -59,6 +59,13 @@ struct popc_6insn_patch_entry { · 58 unmodified lines
59	extern struct popc_6insn_patch_entry __popc_6insn_patch,	59	extern struct popc_6insn_patch_entry __popc_6insn_patch,
60	__popc_6insn_patch_end;	60	__popc_6insn_patch_end;
61		61
		62	struct pause_patch_entry {
		63	unsigned int addr;
		64	unsigned int insns[3];
		65	};
		66	extern struct pause_patch_entry __pause_3insn_patch,
		67	__pause_3insn_patch_end;
		68
62	extern void __init per_cpu_patch(void);	69	extern void __init per_cpu_patch(void);
63	extern void sun4v_patch_1insn_range(struct sun4v_1insn_patch_entry *,	70	extern void sun4v_patch_1insn_range(struct sun4v_1insn_patch_entry *,
64	struct sun4v_1insn_patch_entry *);	71	struct sun4v_1insn_patch_entry *);

arch/sparc/kernel/leon_kernel.c+4−2

 static void leon_handle_ext_irq(unsigned int irq, struct irq_desc *desc)
 {
 	unsigned int eirq;
+	struct irq_bucket *p;
 	int cpu = sparc_leon3_cpuid();
 	eirq = leon_eirq_get(cpu);
-	if ((eirq & 0x10) && irq_map[eirq]->irq) /* bit4 tells if IRQ happened */
+	p = irq_map[eirq];
-		generic_handle_irq(irq_map[eirq]->irq);
+	if ((eirq & 0x10) && p && p->irq) /* bit4 tells if IRQ happened */
+		generic_handle_irq(p->irq);
 }
 /* The extended IRQ controller has been found, this function registers it */

arch/sparc/kernel/perf_event.c+16−6

 	ufp = regs->u_regs[UREG_I6] & 0xffffffffUL;
 	do {
-		struct sparc_stackf32 *usf, sf;
 		unsigned long pc;
-		usf = (struct sparc_stackf32 *) ufp;
+		if (thread32_stack_is_64bit(ufp)) {
-		if (__copy_from_user_inatomic(&sf, usf, sizeof(sf)))
+			struct sparc_stackf *usf, sf;
-			break;
-		pc = sf.callers_pc;
+			ufp += STACK_BIAS;
-		ufp = (unsigned long)sf.fp;
+			usf = (struct sparc_stackf *) ufp;
+			if (__copy_from_user_inatomic(&sf, usf, sizeof(sf)))
+				break;
+			pc = sf.callers_pc & 0xffffffff;
+			ufp = ((unsigned long) sf.fp) & 0xffffffff;
+		} else {
+			struct sparc_stackf32 *usf, sf;
+			usf = (struct sparc_stackf32 *) ufp;
+			if (__copy_from_user_inatomic(&sf, usf, sizeof(sf)))
+				break;
+			pc = sf.callers_pc;
+			ufp = (unsigned long)sf.fp;
+		}
 		perf_callchain_store(entry, pc);
 	} while (entry->nr < PERF_MAX_STACK_DEPTH);
 }

arch/sparc/kernel/process_64.c+23−19

 /* It's a bit more tricky when 64-bit tasks are involved... */
 static unsigned long clone_stackframe(unsigned long csp, unsigned long psp)
 {
+	bool stack_64bit = test_thread_64bit_stack(psp);
 	unsigned long fp, distance, rval;
-	if (!(test_thread_flag(TIF_32BIT))) {
+	if (stack_64bit) {
 		csp += STACK_BIAS;
 		psp += STACK_BIAS;
 		__get_user(fp, &(((struct reg_window __user *)psp)->ins[6]));
 		fp += STACK_BIAS;
+		if (test_thread_flag(TIF_32BIT))
+			fp &= 0xffffffff;
 	} else
 		__get_user(fp, &(((struct reg_window32 __user *)psp)->ins[6]));
 	rval = (csp - distance);
 	if (copy_in_user((void __user *) rval, (void __user *) psp, distance))
 		rval = 0;
-	else if (test_thread_flag(TIF_32BIT)) {
+	else if (!stack_64bit) {
 		if (put_user(((u32)csp),
 			     &(((struct reg_window32 __user *)rval)->ins[6])))
 			rval = 0;
 	flush_user_windows();
 	if ((window = get_thread_wsaved()) != 0) {
-		int winsize = sizeof(struct reg_window);
-		int bias = 0;
-		if (test_thread_flag(TIF_32BIT))
-			winsize = sizeof(struct reg_window32);
-		else
-			bias = STACK_BIAS;
 		window -= 1;
 		do {
-			unsigned long sp = (t->rwbuf_stkptrs[window] + bias);
 			struct reg_window *rwin = &t->reg_window[window];
+			int winsize = sizeof(struct reg_window);
+			unsigned long sp;
+			sp = t->rwbuf_stkptrs[window];
+			if (test_thread_64bit_stack(sp))
+				sp += STACK_BIAS;
+			else
+				winsize = sizeof(struct reg_window32);
 			if (!copy_to_user((char __user *)sp, rwin, winsize)) {
 				shift_window_buffer(window, get_thread_wsaved() - 1, t);
 {
 	struct thread_info *t = current_thread_info();
 	unsigned long window;
-	int winsize = sizeof(struct reg_window);
-	int bias = 0;
-	if (test_thread_flag(TIF_32BIT))
-		winsize = sizeof(struct reg_window32);
-	else
-		bias = STACK_BIAS;
 	flush_user_windows();
 	window = get_thread_wsaved();
 	if (likely(window != 0)) {
 		window -= 1;
 		do {
-			unsigned long sp = (t->rwbuf_stkptrs[window] + bias);
 			struct reg_window *rwin = &t->reg_window[window];
+			int winsize = sizeof(struct reg_window);
+			unsigned long sp;
+			sp = t->rwbuf_stkptrs[window];
+			if (test_thread_64bit_stack(sp))
+				sp += STACK_BIAS;
+			else
+				winsize = sizeof(struct reg_window32);
 			if (unlikely(sp & 0x7UL))
 				stack_unaligned(sp);

arch/sparc/kernel/ptrace_64.c+2−2

@@ -151,7 +151,7 @@ static int regwindow64_get(struct task_struct *target, · 150 unmodified lines
151	{	151	{
152	unsigned long rw_addr = regs->u_regs[UREG_I6];	152	unsigned long rw_addr = regs->u_regs[UREG_I6];
153		153
154	if (test_tsk_thread_flag(current, TIF_32BIT)) {	154	if (!test_thread_64bit_stack(rw_addr)) {
155	struct reg_window32 win32;	155	struct reg_window32 win32;
156	int i;	156	int i;
157		157
@@ -176,7 +176,7 @@ static int regwindow64_set(struct task_struct *target, · 18 unmodified lines
176	{	176	{
177	unsigned long rw_addr = regs->u_regs[UREG_I6];	177	unsigned long rw_addr = regs->u_regs[UREG_I6];
178		178
179	if (test_tsk_thread_flag(current, TIF_32BIT)) {	179	if (!test_thread_64bit_stack(rw_addr)) {
180	struct reg_window32 win32;	180	struct reg_window32 win32;
181	int i;	181	int i;
182		182

arch/sparc/kernel/setup_64.c+21−0

@@ -316,6 +316,25 @@ static void __init popc_patch(void) · 315 unmodified lines
316	}	316	}
317	}	317	}
318		318
		319	static void __init pause_patch(void)
		320	{
		321	struct pause_patch_entry *p;
		322
		323	p = &__pause_3insn_patch;
		324	while (p < &__pause_3insn_patch_end) {
		325	unsigned long i, addr = p->addr;
		326
		327	for (i = 0; i < 3; i++) {
		328	(unsigned int ) (addr + (i * 4)) = p->insns[i];
		329	wmb();
		330	__asm__ __volatile__("flush %0"
		331	: : "r" (addr + (i * 4)));
		332	}
		333
		334	p++;
		335	}
		336	}
		337
319	#ifdef CONFIG_SMP	338	#ifdef CONFIG_SMP
320	void __init boot_cpu_id_too_large(int cpu)	339	void __init boot_cpu_id_too_large(int cpu)
321	{	340	{
@@ -528,6 +547,8 @@ static void __init init_sparc64_elf_hwcap(void) · 206 unmodified lines
528		547
529	if (sparc64_elf_hwcap & AV_SPARC_POPC)	548	if (sparc64_elf_hwcap & AV_SPARC_POPC)
530	popc_patch();	549	popc_patch();
		550	if (sparc64_elf_hwcap & AV_SPARC_PAUSE)
		551	pause_patch();
531	}	552	}
532		553
533	void __init setup_arch(char **cmdline_p)	554	void __init setup_arch(char **cmdline_p)

arch/sparc/kernel/sys_sparc_64.c+5−0

@@ -751,3 +751,8 @@ int kernel_execve(const char *filename, · 750 unmodified lines
751	: "cc");	751	: "cc");
752	return __res;	752	return __res;
753	}	753	}
		754
		755	asmlinkage long sys_kern_features(void)
		756	{
		757	return KERN_FEATURE_MIXED_MODE_STACK;
		758	}

arch/sparc/kernel/systbls_32.S+1−0

@@ -85,3 +85,4 @@ sys_call_table: · 84 unmodified lines
85	/325/ .long sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_event_open, sys_recvmmsg, sys_fanotify_init	85	/325/ .long sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_event_open, sys_recvmmsg, sys_fanotify_init
86	/330/ .long sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime	86	/330/ .long sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime
87	/335/ .long sys_syncfs, sys_sendmmsg, sys_setns, sys_process_vm_readv, sys_process_vm_writev	87	/335/ .long sys_syncfs, sys_sendmmsg, sys_setns, sys_process_vm_readv, sys_process_vm_writev
		88	/340/ .long sys_ni_syscall, sys_kcmp

arch/sparc/kernel/systbls_64.S+2−0

 	.word compat_sys_pwritev, compat_sys_rt_tgsigqueueinfo, sys_perf_event_open, compat_sys_recvmmsg, sys_fanotify_init
 /*330*/	.word sys32_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, compat_sys_open_by_handle_at, compat_sys_clock_adjtime
 	.word sys_syncfs, compat_sys_sendmmsg, sys_setns, compat_sys_process_vm_readv, compat_sys_process_vm_writev
+/*340*/	.word sys_kern_features, sys_kcmp
 #endif /* CONFIG_COMPAT */
 	.word sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_event_open, sys_recvmmsg, sys_fanotify_init
 /*330*/	.word sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime
 	.word sys_syncfs, sys_sendmmsg, sys_setns, sys_process_vm_readv, sys_process_vm_writev
+/*340*/	.word sys_kern_features, sys_kcmp

arch/sparc/kernel/unaligned_64.c+23−13

 static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
 {
-	unsigned long value;
+	unsigned long value, fp;
 	if (reg < 16)
 		return (!reg ? 0 : regs->u_regs[reg]);
+	fp = regs->u_regs[UREG_FP];
 	if (regs->tstate & TSTATE_PRIV) {
 		struct reg_window *win;
-		win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
+		win = (struct reg_window *)(fp + STACK_BIAS);
 		value = win->locals[reg - 16];
-	} else if (test_thread_flag(TIF_32BIT)) {
+	} else if (!test_thread_64bit_stack(fp)) {
 		struct reg_window32 __user *win32;
-		win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
+		win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp));
 		get_user(value, &win32->locals[reg - 16]);
 	} else {
 		struct reg_window __user *win;
-		win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
+		win = (struct reg_window __user *)(fp + STACK_BIAS);
 		get_user(value, &win->locals[reg - 16]);
 	}
 	return value;
 static unsigned long *fetch_reg_addr(unsigned int reg, struct pt_regs *regs)
 {
+	unsigned long fp;
 	if (reg < 16)
 		return &regs->u_regs[reg];
+	fp = regs->u_regs[UREG_FP];
 	if (regs->tstate & TSTATE_PRIV) {
 		struct reg_window *win;
-		win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
+		win = (struct reg_window *)(fp + STACK_BIAS);
 		return &win->locals[reg - 16];
-	} else if (test_thread_flag(TIF_32BIT)) {
+	} else if (!test_thread_64bit_stack(fp)) {
 		struct reg_window32 *win32;
-		win32 = (struct reg_window32 *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
+		win32 = (struct reg_window32 *)((unsigned long)((u32)fp));
 		return (unsigned long *)&win32->locals[reg - 16];
 	} else {
 		struct reg_window *win;
-		win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
+		win = (struct reg_window *)(fp + STACK_BIAS);
 		return &win->locals[reg - 16];
 	}
 }
 		if (rd)
 			regs->u_regs[rd] = ret;
 	} else {
-		if (test_thread_flag(TIF_32BIT)) {
+		unsigned long fp = regs->u_regs[UREG_FP];
+		if (!test_thread_64bit_stack(fp)) {
 			struct reg_window32 __user *win32;
-			win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
+			win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp));
 			put_user(ret, &win32->locals[rd - 16]);
 		} else {
 			struct reg_window __user *win;
-			win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
+			win = (struct reg_window __user *)(fp + STACK_BIAS);
 			put_user(ret, &win->locals[rd - 16]);
 		}
 	}
 		reg[0] = 0;
 		if ((insn & 0x780000) == 0x180000)
 			reg[1] = 0;
-	} else if (test_thread_flag(TIF_32BIT)) {
+	} else if (!test_thread_64bit_stack(regs->u_regs[UREG_FP])) {
 		put_user(0, (int __user *) reg);
 		if ((insn & 0x780000) == 0x180000)
 			put_user(0, ((int __user *) reg) + 1);

arch/sparc/kernel/visemul.c+14−9

 static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
 {
-	unsigned long value;
+	unsigned long value, fp;
 	if (reg < 16)
 		return (!reg ? 0 : regs->u_regs[reg]);
+	fp = regs->u_regs[UREG_FP];
 	if (regs->tstate & TSTATE_PRIV) {
 		struct reg_window *win;
-		win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
+		win = (struct reg_window *)(fp + STACK_BIAS);
 		value = win->locals[reg - 16];
-	} else if (test_thread_flag(TIF_32BIT)) {
+	} else if (!test_thread_64bit_stack(fp)) {
 		struct reg_window32 __user *win32;
-		win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
+		win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp));
 		get_user(value, &win32->locals[reg - 16]);
 	} else {
 		struct reg_window __user *win;
-		win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
+		win = (struct reg_window __user *)(fp + STACK_BIAS);
 		get_user(value, &win->locals[reg - 16]);
 	}
 	return value;
 static inline unsigned long __user *__fetch_reg_addr_user(unsigned int reg,
 							  struct pt_regs *regs)
 {
+	unsigned long fp = regs->u_regs[UREG_FP];
 	BUG_ON(reg < 16);
 	BUG_ON(regs->tstate & TSTATE_PRIV);
-	if (test_thread_flag(TIF_32BIT)) {
+	if (!test_thread_64bit_stack(fp)) {
 		struct reg_window32 __user *win32;
-		win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
+		win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp));
 		return (unsigned long __user *)&win32->locals[reg - 16];
 	} else {
 		struct reg_window __user *win;
-		win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
+		win = (struct reg_window __user *)(fp + STACK_BIAS);
 		return &win->locals[reg - 16];
 	}
 }
 	} else {
 		unsigned long __user *rd_user = __fetch_reg_addr_user(rd, regs);
-		if (test_thread_flag(TIF_32BIT))
+		if (!test_thread_64bit_stack(regs->u_regs[UREG_FP]))
 			__put_user((u32)val, (u32 __user *)rd_user);
 		else
 			__put_user(val, rd_user);

arch/sparc/kernel/vmlinux.lds.S+5−0

 		*(.popc_6insn_patch)
 		__popc_6insn_patch_end = .;
 	}
+	.pause_3insn_patch : {
+		__pause_3insn_patch = .;
+		*(.pause_3insn_patch)
+		__pause_3insn_patch_end = .;
+	}
 	PERCPU_SECTION(SMP_CACHE_BYTES)
 	. = ALIGN(PAGE_SIZE);

arch/sparc/kernel/winfixup.S+2−0

 spill_fixup_dax:
 	TRAP_LOAD_THREAD_REG(%g6, %g1)
 	ldx	[%g6 + TI_FLAGS], %g1
+	andcc	%sp, 0x1, %g0
+	movne	%icc, 0, %g1
 	andcc	%g1, _TIF_32BIT, %g0
 	ldub	[%g6 + TI_WSAVED], %g1
 	sll	%g1, 3, %g3

arch/sparc/lib/atomic_64.S+15−1

@@ -1,6 +1,6 @@
1	/* atomic.S: These things are too big to do inline.	1	/* atomic.S: These things are too big to do inline.
2	*	2	*
3	* Copyright (C) 1999, 2007 David S. Miller (davem@davemloft.net)	3	* Copyright (C) 1999, 2007 2012 David S. Miller (davem@davemloft.net)
4	*/	4	*/
5		5
6	#include <linux/linkage.h>	6	#include <linux/linkage.h>
@@ -117,3 +117,17 @@ ENTRY(atomic64_sub_ret) /* %o0 = decrement, %o1 = atomic_ptr */ · 110 unmodified lines
117	sub %g1, %o0, %o0	117	sub %g1, %o0, %o0
118	2: BACKOFF_SPIN(%o2, %o3, 1b)	118	2: BACKOFF_SPIN(%o2, %o3, 1b)
119	ENDPROC(atomic64_sub_ret)	119	ENDPROC(atomic64_sub_ret)
		120
		121	ENTRY(atomic64_dec_if_positive) /* %o0 = atomic_ptr */
		122	BACKOFF_SETUP(%o2)
		123	1: ldx [%o0], %g1
		124	brlez,pn %g1, 3f
		125	sub %g1, 1, %g7
		126	casx [%o0], %g1, %g7
		127	cmp %g1, %g7
		128	bne,pn %xcc, BACKOFF_LABEL(2f, 1b)
		129	nop
		130	3: retl
		131	sub %g1, 1, %o0
		132	2: BACKOFF_SPIN(%o2, %o3, 1b)
		133	ENDPROC(atomic64_dec_if_positive)

arch/sparc/lib/ksyms.c+1−0

@@ -116,6 +116,7 @@ EXPORT_SYMBOL(atomic64_add); · 115 unmodified lines
116	EXPORT_SYMBOL(atomic64_add_ret);	116	EXPORT_SYMBOL(atomic64_add_ret);
117	EXPORT_SYMBOL(atomic64_sub);	117	EXPORT_SYMBOL(atomic64_sub);
118	EXPORT_SYMBOL(atomic64_sub_ret);	118	EXPORT_SYMBOL(atomic64_sub_ret);
		119	EXPORT_SYMBOL(atomic64_dec_if_positive);
119		120
120	/* Atomic bit operations. */	121	/* Atomic bit operations. */
121	EXPORT_SYMBOL(test_and_set_bit);	122	EXPORT_SYMBOL(test_and_set_bit);

arch/sparc/math-emu/math_64.c+1−1

@@ -320,7 +320,7 @@ int do_mathemu(struct pt_regs regs, struct fpustate f, bool illegal_insn_trap) · 319 unmodified lines
320	XR = 0;	320	XR = 0;
321	else if (freg < 16)	321	else if (freg < 16)
322	XR = regs->u_regs[freg];	322	XR = regs->u_regs[freg];
323	else if (test_thread_flag(TIF_32BIT)) {	323	else if (!test_thread_64bit_stack(regs->u_regs[UREG_FP])) {
324	struct reg_window32 __user *win32;	324	struct reg_window32 __user *win32;
325	flushw_user ();	325	flushw_user ();
326	win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));	326	win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));

arch/unicore32/Kconfig+6−1

 	select ARCH_WANT_FRAME_POINTERS
 	select GENERIC_IOMAP
 	select MODULES_USE_ELF_REL
+	select GENERIC_KERNEL_THREAD
+	select GENERIC_KERNEL_EXECVE
 	help
 	  UniCore-32 is 32-bit Instruction Set Architecture,
 	  including a series of low-power-consumption RISC chip
 config ARCH_MAY_HAVE_PC_FDC
 	bool
+config ZONE_DMA
+	def_bool y
 config NEED_DMA_MAP_STATE
        def_bool y
 	bool
 	depends on !ARCH_FPGA
 	select GENERIC_GPIO
-	select GPIO_SYSFS if EXPERIMENTAL
+	select GPIO_SYSFS
 	default y
 if PUV3_NB0916

arch/unicore32/include/asm/Kbuild+0−1

@@ -1,4 +1,3 @@
1	include include/asm-generic/Kbuild.asm
2		1
3	generic-y += atomic.h	2	generic-y += atomic.h
4	generic-y += auxvec.h	3	generic-y += auxvec.h

arch/unicore32/include/asm/bug.h+0−5

@@ -19,9 +19,4 @@ extern void die(const char msg, struct pt_regs regs, int err); · 18 unmodified lines
19	extern void uc32_notify_die(const char str, struct pt_regs regs,	19	extern void uc32_notify_die(const char str, struct pt_regs regs,
20	struct siginfo *info, unsigned long err, unsigned long trap);	20	struct siginfo *info, unsigned long err, unsigned long trap);
21		21
22	extern asmlinkage void __backtrace(void);
23	extern asmlinkage void c_backtrace(unsigned long fp, int pmode);
24
25	extern void __show_regs(struct pt_regs *);
26
27	#endif /* __UNICORE_BUG_H__ */	22	#endif /* __UNICORE_BUG_H__ */

arch/unicore32/include/asm/cmpxchg.h+1−1

@@ -35,7 +35,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, · 34 unmodified lines
35	: "memory", "cc");	35	: "memory", "cc");
36	break;	36	break;
37	default:	37	default:
38	ret = __xchg_bad_pointer();	38	__xchg_bad_pointer();
39	}	39	}
40		40
41	return ret;	41	return ret;

arch/unicore32/include/asm/kvm_para.h+0−1

@@ -1 +0,0 @@
1	#include <asm-generic/kvm_para.h>

arch/unicore32/include/asm/processor.h+0−5

@@ -72,11 +72,6 @@ unsigned long get_wchan(struct task_struct *p); · 71 unmodified lines
72		72
73	#define cpu_relax() barrier()	73	#define cpu_relax() barrier()
74		74
75	/*
76	* Create a new kernel thread
77	*/
78	extern int kernel_thread(int (fn)(void ), void *arg, unsigned long flags);
79
80	#define task_pt_regs(p) \	75	#define task_pt_regs(p) \
81	((struct pt_regs *)(THREAD_START_SP + task_stack_page(p)) - 1)	76	((struct pt_regs *)(THREAD_START_SP + task_stack_page(p)) - 1)
82		77

arch/unicore32/include/asm/ptrace.h+1−75

@@ -12,80 +12,10 @@ · 11 unmodified lines
12	#ifndef __UNICORE_PTRACE_H__	12	#ifndef __UNICORE_PTRACE_H__
13	#define __UNICORE_PTRACE_H__	13	#define __UNICORE_PTRACE_H__
14		14
15	#define PTRACE_GET_THREAD_AREA 22	15	#include <uapi/asm/ptrace.h>
16
17	/*
18	* PSR bits
19	*/
20	#define USER_MODE 0x00000010
21	#define REAL_MODE 0x00000011
22	#define INTR_MODE 0x00000012
23	#define PRIV_MODE 0x00000013
24	#define ABRT_MODE 0x00000017
25	#define EXTN_MODE 0x0000001b
26	#define SUSR_MODE 0x0000001f
27	#define MODE_MASK 0x0000001f
28	#define PSR_R_BIT 0x00000040
29	#define PSR_I_BIT 0x00000080
30	#define PSR_V_BIT 0x10000000
31	#define PSR_C_BIT 0x20000000
32	#define PSR_Z_BIT 0x40000000
33	#define PSR_S_BIT 0x80000000
34
35	/*
36	* Groups of PSR bits
37	*/
38	#define PSR_f 0xff000000 /* Flags */
39	#define PSR_c 0x000000ff /* Control */
40		16
41	#ifndef __ASSEMBLY__	17	#ifndef __ASSEMBLY__
42		18
43	/*
44	* This struct defines the way the registers are stored on the
45	* stack during a system call. Note that sizeof(struct pt_regs)
46	* has to be a multiple of 8.
47	*/
48	struct pt_regs {
49	unsigned long uregs[34];
50	};
51
52	#define UCreg_asr uregs[32]
53	#define UCreg_pc uregs[31]
54	#define UCreg_lr uregs[30]
55	#define UCreg_sp uregs[29]
56	#define UCreg_ip uregs[28]
57	#define UCreg_fp uregs[27]
58	#define UCreg_26 uregs[26]
59	#define UCreg_25 uregs[25]
60	#define UCreg_24 uregs[24]
61	#define UCreg_23 uregs[23]
62	#define UCreg_22 uregs[22]
63	#define UCreg_21 uregs[21]
64	#define UCreg_20 uregs[20]
65	#define UCreg_19 uregs[19]
66	#define UCreg_18 uregs[18]
67	#define UCreg_17 uregs[17]
68	#define UCreg_16 uregs[16]
69	#define UCreg_15 uregs[15]
70	#define UCreg_14 uregs[14]
71	#define UCreg_13 uregs[13]
72	#define UCreg_12 uregs[12]
73	#define UCreg_11 uregs[11]
74	#define UCreg_10 uregs[10]
75	#define UCreg_09 uregs[9]
76	#define UCreg_08 uregs[8]
77	#define UCreg_07 uregs[7]
78	#define UCreg_06 uregs[6]
79	#define UCreg_05 uregs[5]
80	#define UCreg_04 uregs[4]
81	#define UCreg_03 uregs[3]
82	#define UCreg_02 uregs[2]
83	#define UCreg_01 uregs[1]
84	#define UCreg_00 uregs[0]
85	#define UCreg_ORIG_00 uregs[33]
86
87	#ifdef __KERNEL__
88
89	#define user_mode(regs) \	19	#define user_mode(regs) \
90	(processor_mode(regs) == USER_MODE)	20	(processor_mode(regs) == USER_MODE)
91		21
@@ -125,9 +55,5 @@ static inline int valid_user_regs(struct pt_regs *regs) · 33 unmodified lines
125		55
126	#define instruction_pointer(regs) ((regs)->UCreg_pc)	56	#define instruction_pointer(regs) ((regs)->UCreg_pc)
127		57
128	#endif /* __KERNEL__ */
129
130	#endif /* __ASSEMBLY__ */	58	#endif /* __ASSEMBLY__ */
131
132	#endif	59	#endif
133

arch/unicore32/include/uapi/asm/Kbuild+7−0

@@ -1,3 +1,10 @@
1	# UAPI Header export list	1	# UAPI Header export list
2	include include/uapi/asm-generic/Kbuild.asm	2	include include/uapi/asm-generic/Kbuild.asm
3		3
		4	header-y += byteorder.h
		5	header-y += kvm_para.h
		6	header-y += ptrace.h
		7	header-y += sigcontext.h
		8	header-y += unistd.h
		9
		10	generic-y += kvm_para.h

arch/unicore32/include/uapi/asm/byteorder.hrenamed from arch/unicore32/include/asm/byteorder.h+0−0

File renamed without changes.

arch/unicore32/include/uapi/asm/ptrace.h+90−0

@@ -0,0 +1,90 @@
	1	/*
	2	* linux/arch/unicore32/include/asm/ptrace.h
	3	*
	4	* Code specific to PKUnity SoC and UniCore ISA
	5	*
	6	* Copyright (C) 2001-2010 GUAN Xue-tao
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*/
	12	#ifndef _UAPI__UNICORE_PTRACE_H__
	13	#define _UAPI__UNICORE_PTRACE_H__
	14
	15	#define PTRACE_GET_THREAD_AREA 22
	16
	17	/*
	18	* PSR bits
	19	*/
	20	#define USER_MODE 0x00000010
	21	#define REAL_MODE 0x00000011
	22	#define INTR_MODE 0x00000012
	23	#define PRIV_MODE 0x00000013
	24	#define ABRT_MODE 0x00000017
	25	#define EXTN_MODE 0x0000001b
	26	#define SUSR_MODE 0x0000001f
	27	#define MODE_MASK 0x0000001f
	28	#define PSR_R_BIT 0x00000040
	29	#define PSR_I_BIT 0x00000080
	30	#define PSR_V_BIT 0x10000000
	31	#define PSR_C_BIT 0x20000000
	32	#define PSR_Z_BIT 0x40000000
	33	#define PSR_S_BIT 0x80000000
	34
	35	/*
	36	* Groups of PSR bits
	37	*/
	38	#define PSR_f 0xff000000 /* Flags */
	39	#define PSR_c 0x000000ff /* Control */
	40
	41	#ifndef __ASSEMBLY__
	42
	43	/*
	44	* This struct defines the way the registers are stored on the
	45	* stack during a system call. Note that sizeof(struct pt_regs)
	46	* has to be a multiple of 8.
	47	*/
	48	struct pt_regs {
	49	unsigned long uregs[34];
	50	};
	51
	52	#define UCreg_asr uregs[32]
	53	#define UCreg_pc uregs[31]
	54	#define UCreg_lr uregs[30]
	55	#define UCreg_sp uregs[29]
	56	#define UCreg_ip uregs[28]
	57	#define UCreg_fp uregs[27]
	58	#define UCreg_26 uregs[26]
	59	#define UCreg_25 uregs[25]
	60	#define UCreg_24 uregs[24]
	61	#define UCreg_23 uregs[23]
	62	#define UCreg_22 uregs[22]
	63	#define UCreg_21 uregs[21]
	64	#define UCreg_20 uregs[20]
	65	#define UCreg_19 uregs[19]
	66	#define UCreg_18 uregs[18]
	67	#define UCreg_17 uregs[17]
	68	#define UCreg_16 uregs[16]
	69	#define UCreg_15 uregs[15]
	70	#define UCreg_14 uregs[14]
	71	#define UCreg_13 uregs[13]
	72	#define UCreg_12 uregs[12]
	73	#define UCreg_11 uregs[11]
	74	#define UCreg_10 uregs[10]
	75	#define UCreg_09 uregs[9]
	76	#define UCreg_08 uregs[8]
	77	#define UCreg_07 uregs[7]
	78	#define UCreg_06 uregs[6]
	79	#define UCreg_05 uregs[5]
	80	#define UCreg_04 uregs[4]
	81	#define UCreg_03 uregs[3]
	82	#define UCreg_02 uregs[2]
	83	#define UCreg_01 uregs[1]
	84	#define UCreg_00 uregs[0]
	85	#define UCreg_ORIG_00 uregs[33]
	86
	87
	88	#endif /* __ASSEMBLY__ */
	89
	90	#endif /* _UAPI__UNICORE_PTRACE_H__ */

arch/unicore32/include/uapi/asm/sigcontext.hrenamed from arch/unicore32/include/asm/sigcontext.h+0−0

File renamed without changes.

arch/unicore32/include/uapi/asm/unistd.hrenamed from arch/unicore32/include/asm/unistd.h+1−0

@@ -12,3 +12,4 @@ · 11 unmodified lines
12		12
13	/* Use the standard ABI for syscalls. */	13	/* Use the standard ABI for syscalls. */
14	#include <asm-generic/unistd.h>	14	#include <asm-generic/unistd.h>
		15	#define __ARCH_WANT_SYS_EXECVE

arch/unicore32/kernel/entry.S+7−13

  */
 ENTRY(ret_from_fork)
 	b.l	schedule_tail
-	get_thread_info tsk
-	ldw	r1, [tsk+], #TI_FLAGS		@ check for syscall tracing
-	mov	why, #1
-	cand.a	r1, #_TIF_SYSCALL_TRACE		@ are we tracing syscalls?
-	beq	ret_slow_syscall
-	mov	r1, sp
-	mov	r0, #1				@ trace exit [IP = 1]
-	b.l	syscall_trace
 	b	ret_slow_syscall
 ENDPROC(ret_from_fork)
+ENTRY(ret_from_kernel_thread)
+	b.l	schedule_tail
+	mov	r0, r5
+	adr	lr, ret_slow_syscall
+	mov	pc, r4
+ENDPROC(ret_from_kernel_thread)
 /*=============================================================================
  * SWI handler
  *-----------------------------------------------------------------------------
 #endif
 	.ltorg
-ENTRY(sys_execve)
-		add	r3, sp, #S_OFF
-		b	__sys_execve
-ENDPROC(sys_execve)
 ENTRY(sys_clone)
 		add	ip, sp, #S_OFF
 		stw	ip, [sp+], #4

arch/unicore32/kernel/process.c+14−44

@@ -258,6 +258,7 @@ void release_thread(struct task_struct *dead_task) · 257 unmodified lines
258	}	258	}
259		259
260	asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");	260	asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
		261	asmlinkage void ret_from_kernel_thread(void) __asm__("ret_from_kernel_thread");
261		262
262	int	263	int
263	copy_thread(unsigned long clone_flags, unsigned long stack_start,	264	copy_thread(unsigned long clone_flags, unsigned long stack_start,
@@ -266,17 +267,22 @@ copy_thread(unsigned long clone_flags, unsigned long stack_start, · 2 unmodified lines
266	struct thread_info *thread = task_thread_info(p);	267	struct thread_info *thread = task_thread_info(p);
267	struct pt_regs *childregs = task_pt_regs(p);	268	struct pt_regs *childregs = task_pt_regs(p);
268		269
269	childregs = regs;
270	childregs->UCreg_00 = 0;
271	childregs->UCreg_sp = stack_start;
272
273	memset(&thread->cpu_context, 0, sizeof(struct cpu_context_save));	270	memset(&thread->cpu_context, 0, sizeof(struct cpu_context_save));
274	thread->cpu_context.sp = (unsigned long)childregs;	271	thread->cpu_context.sp = (unsigned long)childregs;
275	thread->cpu_context.pc = (unsigned long)ret_from_fork;	272	if (unlikely(!regs)) {
276		273	thread->cpu_context.pc = (unsigned long)ret_from_kernel_thread;
277	if (clone_flags & CLONE_SETTLS)	274	thread->cpu_context.r4 = stack_start;
278	childregs->UCreg_16 = regs->UCreg_03;	275	thread->cpu_context.r5 = stk_sz;
		276	memset(childregs, 0, sizeof(struct pt_regs));
		277	} else {
		278	thread->cpu_context.pc = (unsigned long)ret_from_fork;
		279	childregs = regs;
		280	childregs->UCreg_00 = 0;
		281	childregs->UCreg_sp = stack_start;
279		282
		283	if (clone_flags & CLONE_SETTLS)
		284	childregs->UCreg_16 = regs->UCreg_03;
		285	}
280	return 0;	286	return 0;
281	}	287	}
282		288
@@ -305,42 +311,6 @@ int dump_fpu(struct pt_regs regs, elf_fpregset_t fp) · 22 unmodified lines
305	}	311	}
306	EXPORT_SYMBOL(dump_fpu);	312	EXPORT_SYMBOL(dump_fpu);
307		313
308	/*
309	* Shuffle the argument into the correct register before calling the
310	* thread function. r1 is the thread argument, r2 is the pointer to
311	* the thread function, and r3 points to the exit function.
312	*/
313	asm(".pushsection .text\n"
314	" .align\n"
315	" .type kernel_thread_helper, #function\n"
316	"kernel_thread_helper:\n"
317	" mov.a asr, r7\n"
318	" mov r0, r4\n"
319	" mov lr, r6\n"
320	" mov pc, r5\n"
321	" .size kernel_thread_helper, . - kernel_thread_helper\n"
322	" .popsection");
323
324	/*
325	* Create a kernel thread.
326	*/
327	pid_t kernel_thread(int (fn)(void ), void *arg, unsigned long flags)
328	{
329	struct pt_regs regs;
330
331	memset(&regs, 0, sizeof(regs));
332
333	regs.UCreg_04 = (unsigned long)arg;
334	regs.UCreg_05 = (unsigned long)fn;
335	regs.UCreg_06 = (unsigned long)do_exit;
336	regs.UCreg_07 = PRIV_MODE;
337	regs.UCreg_pc = (unsigned long)kernel_thread_helper;
338	regs.UCreg_asr = regs.UCreg_07 \| PSR_I_BIT;
339
340	return do_fork(flags\|CLONE_VM\|CLONE_UNTRACED, 0, &regs, 0, NULL, NULL);
341	}
342	EXPORT_SYMBOL(kernel_thread);
343
344	unsigned long get_wchan(struct task_struct *p)	314	unsigned long get_wchan(struct task_struct *p)
345	{	315	{
346	struct stackframe frame;	316	struct stackframe frame;

arch/unicore32/kernel/setup.h+6−0

@@ -30,4 +30,10 @@ extern char __vectors_start[], __vectors_end[]; · 29 unmodified lines
30	extern void kernel_thread_helper(void);	30	extern void kernel_thread_helper(void);
31		31
32	extern void __init early_signal_init(void);	32	extern void __init early_signal_init(void);
		33
		34	extern asmlinkage void __backtrace(void);
		35	extern asmlinkage void c_backtrace(unsigned long fp, int pmode);
		36
		37	extern void __show_regs(struct pt_regs *);
		38
33	#endif	39	#endif

arch/unicore32/kernel/sys.c+0−63

@@ -42,69 +42,6 @@ asmlinkage long __sys_clone(unsigned long clone_flags, unsigned long newsp, · 41 unmodified lines
42	parent_tid, child_tid);	42	parent_tid, child_tid);
43	}	43	}
44		44
45	/* sys_execve() executes a new program.
46	* This is called indirectly via a small wrapper
47	*/
48	asmlinkage long __sys_execve(const char __user *filename,
49	const char __user const __user argv,
50	const char __user const __user envp,
51	struct pt_regs *regs)
52	{
53	int error;
54	struct filename *fn;
55
56	fn = getname(filename);
57	error = PTR_ERR(fn);
58	if (IS_ERR(fn))
59	goto out;
60	error = do_execve(fn->name, argv, envp, regs);
61	putname(fn);
62	out:
63	return error;
64	}
65
66	int kernel_execve(const char *filename,
67	const char *const argv[],
68	const char *const envp[])
69	{
70	struct pt_regs regs;
71	int ret;
72
73	memset(&regs, 0, sizeof(struct pt_regs));
74	ret = do_execve(filename,
75	(const char __user const __user )argv,
76	(const char __user const __user )envp, &regs);
77	if (ret < 0)
78	goto out;
79
80	/*
81	* Save argc to the register structure for userspace.
82	*/
83	regs.UCreg_00 = ret;
84
85	/*
86	* We were successful. We won't be returning to our caller, but
87	* instead to user space by manipulating the kernel stack.
88	*/
89	asm("add r0, %0, %1\n\t"
90	"mov r1, %2\n\t"
91	"mov r2, %3\n\t"
92	"mov r22, #0\n\t" /* not a syscall */
93	"mov r23, %0\n\t" /* thread structure */
94	"b.l memmove\n\t" /* copy regs to top of stack */
95	"mov sp, r0\n\t" /* reposition stack pointer */
96	"b ret_to_user"
97	:
98	: "r" (current_thread_info()),
99	"Ir" (THREAD_START_SP - sizeof(regs)),
100	"r" (&regs),
101	"Ir" (sizeof(regs))
102	: "r0", "r1", "r2", "r3", "ip", "lr", "memory");
103
104	out:
105	return ret;
106	}
107
108	/* Note: used by the compat code even in 64-bit Linux. */	45	/* Note: used by the compat code even in 64-bit Linux. */
109	SYSCALL_DEFINE6(mmap2, unsigned long, addr, unsigned long, len,	46	SYSCALL_DEFINE6(mmap2, unsigned long, addr, unsigned long, len,
110	unsigned long, prot, unsigned long, flags,	47	unsigned long, prot, unsigned long, flags,

arch/unicore32/mm/fault.c+27−10

 }
 static int __do_pf(struct mm_struct *mm, unsigned long addr, unsigned int fsr,
-		struct task_struct *tsk)
+		unsigned int flags, struct task_struct *tsk)
 {
 	struct vm_area_struct *vma;
 	int fault;
 	 * If for any reason at all we couldn't handle the fault, make
 	 * sure we exit gracefully rather than endlessly redo the fault.
 	 */
-	fault = handle_mm_fault(mm, vma, addr & PAGE_MASK,
+	fault = handle_mm_fault(mm, vma, addr & PAGE_MASK, flags);
-			    (!(fsr ^ 0x12)) ? FAULT_FLAG_WRITE : 0);
-	if (unlikely(fault & VM_FAULT_ERROR))
-		return fault;
-	if (fault & VM_FAULT_MAJOR)
-		tsk->maj_flt++;
-	else
-		tsk->min_flt++;
 	return fault;
 check_stack:
 	struct task_struct *tsk;
 	struct mm_struct *mm;
 	int fault, sig, code;
+	unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |
+				 ((!(fsr ^ 0x12)) ? FAULT_FLAG_WRITE : 0);
 	tsk = current;
 	mm = tsk->mm;
 		if (!user_mode(regs)
 		    && !search_exception_tables(regs->UCreg_pc))
 			goto no_context;
+retry:
 		down_read(&mm->mmap_sem);
 	} else {
 		/*
 #endif
 	}
-	fault = __do_pf(mm, addr, fsr, tsk);
+	fault = __do_pf(mm, addr, fsr, flags, tsk);
+	/* If we need to retry but a fatal signal is pending, handle the
+	 * signal first. We do not need to release the mmap_sem because
+	 * it would already be released in __lock_page_or_retry in
+	 * mm/filemap.c. */
+	if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current))
+		return 0;
+	if (!(fault & VM_FAULT_ERROR) && (flags & FAULT_FLAG_ALLOW_RETRY)) {
+		if (fault & VM_FAULT_MAJOR)
+			tsk->maj_flt++;
+		else
+			tsk->min_flt++;
+		if (fault & VM_FAULT_RETRY) {
+			/* Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk
+			* of starvation. */
+			flags &= ~FAULT_FLAG_ALLOW_RETRY;
+			goto retry;
+		}
+	}
 	up_read(&mm->mmap_sem);
 	/*

arch/x86/include/asm/xen/hypercall.h+7−14

 		return _hypercall4(int, update_va_mapping, va,
 				   new_val.pte, new_val.pte >> 32, flags);
 }
+extern int __must_check xen_event_channel_op_compat(int, void *);
 static inline int
 HYPERVISOR_event_channel_op(int cmd, void *arg)
 {
 	int rc = _hypercall2(int, event_channel_op, cmd, arg);
-	if (unlikely(rc == -ENOSYS)) {
+	if (unlikely(rc == -ENOSYS))
-		struct evtchn_op op;
+		rc = xen_event_channel_op_compat(cmd, arg);
-		op.cmd = cmd;
-		memcpy(&op.u, arg, sizeof(op.u));
-		rc = _hypercall1(int, event_channel_op_compat, &op);
-		memcpy(arg, &op.u, sizeof(op.u));
-	}
 	return rc;
 }
 	return _hypercall3(int, console_io, cmd, count, str);
 }
+extern int __must_check HYPERVISOR_physdev_op_compat(int, void *);
 static inline int
 HYPERVISOR_physdev_op(int cmd, void *arg)
 {
 	int rc = _hypercall2(int, physdev_op, cmd, arg);
-	if (unlikely(rc == -ENOSYS)) {
+	if (unlikely(rc == -ENOSYS))
-		struct physdev_op op;
+		rc = HYPERVISOR_physdev_op_compat(cmd, arg);
-		op.cmd = cmd;
-		memcpy(&op.u, arg, sizeof(op.u));
-		rc = _hypercall1(int, physdev_op_compat, &op);
-		memcpy(arg, &op.u, sizeof(op.u));
-	}
 	return rc;
 }

arch/x86/kvm/cpuid.h+3−0

@@ -24,6 +24,9 @@ static inline bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu) · 23 unmodified lines
24	{	24	{
25	struct kvm_cpuid_entry2 *best;	25	struct kvm_cpuid_entry2 *best;
26		26
		27	if (!static_cpu_has(X86_FEATURE_XSAVE))
		28	return 0;
		29
27	best = kvm_find_cpuid_entry(vcpu, 1, 0);	30	best = kvm_find_cpuid_entry(vcpu, 1, 0);
28	return best && (best->ecx & bit(X86_FEATURE_XSAVE));	31	return best && (best->ecx & bit(X86_FEATURE_XSAVE));
29	}	32	}

arch/x86/kvm/vmx.c+7−4

 		}
 	}
-	exec_control = vmcs_read32(SECONDARY_VM_EXEC_CONTROL);
 	/* Exposing INVPCID only when PCID is exposed */
 	best = kvm_find_cpuid_entry(vcpu, 0x7, 0);
 	if (vmx_invpcid_supported() &&
 	    best && (best->ebx & bit(X86_FEATURE_INVPCID)) &&
 	    guest_cpuid_has_pcid(vcpu)) {
+		exec_control = vmcs_read32(SECONDARY_VM_EXEC_CONTROL);
 		exec_control |= SECONDARY_EXEC_ENABLE_INVPCID;
 		vmcs_write32(SECONDARY_VM_EXEC_CONTROL,
 			     exec_control);
 	} else {
-		exec_control &= ~SECONDARY_EXEC_ENABLE_INVPCID;
+		if (cpu_has_secondary_exec_ctrls()) {
-		vmcs_write32(SECONDARY_VM_EXEC_CONTROL,
+			exec_control = vmcs_read32(SECONDARY_VM_EXEC_CONTROL);
-			     exec_control);
+			exec_control &= ~SECONDARY_EXEC_ENABLE_INVPCID;
+			vmcs_write32(SECONDARY_VM_EXEC_CONTROL,
+				     exec_control);
+		}
 		if (best)
 			best->ebx &= ~bit(X86_FEATURE_INVPCID);
 	}

arch/x86/kvm/x86.c+3−0

@@ -5781,6 +5781,9 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, · 5780 unmodified lines
5781	int pending_vec, max_bits, idx;	5781	int pending_vec, max_bits, idx;
5782	struct desc_ptr dt;	5782	struct desc_ptr dt;
5783		5783
		5784	if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
		5785	return -EINVAL;
		5786
5784	dt.size = sregs->idt.limit;	5787	dt.size = sregs->idt.limit;
5785	dt.address = sregs->idt.base;	5788	dt.address = sregs->idt.base;
5786	kvm_x86_ops->set_idt(vcpu, &dt);	5789	kvm_x86_ops->set_idt(vcpu, &dt);

crypto/cryptd.c+8−3

 	struct crypto_async_request *req, *backlog;
 	cpu_queue = container_of(work, struct cryptd_cpu_queue, work);
-	/* Only handle one request at a time to avoid hogging crypto
+	/*
-	 * workqueue. preempt_disable/enable is used to prevent
+	 * Only handle one request at a time to avoid hogging crypto workqueue.
-	 * being preempted by cryptd_enqueue_request() */
+	 * preempt_disable/enable is used to prevent being preempted by
+	 * cryptd_enqueue_request(). local_bh_disable/enable is used to prevent
+	 * cryptd_enqueue_request() being accessed from software interrupts.
+	 */
+	local_bh_disable();
 	preempt_disable();
 	backlog = crypto_get_backlog(&cpu_queue->queue);
 	req = crypto_dequeue_request(&cpu_queue->queue);
 	preempt_enable();
+	local_bh_enable();
 	if (!req)
 		return;

drivers/acpi/video.c+7−4

 acpi_video_bus_get_devices(struct acpi_video_bus *video,
 			   struct acpi_device *device)
 {
-	int status;
+	int status = 0;
 	struct acpi_device *dev;
-	status = acpi_video_device_enumerate(video);
+	/*
-	if (status)
+	 * There are systems where video module known to work fine regardless
-		return status;
+	 * of broken _DOD and ignoring returned value here doesn't cause
+	 * any issues later.
+	 */
+	acpi_video_device_enumerate(video);
 	list_for_each_entry(dev, &device->children, node) {

drivers/base/platform.c+7−0

  */
 int platform_get_irq(struct platform_device *dev, unsigned int num)
 {
+#ifdef CONFIG_SPARC
+	/* sparc does not have irqs represented as IORESOURCE_IRQ resources */
+	if (!dev || num >= dev->archdata.num_irqs)
+		return -ENXIO;
+	return dev->archdata.irqs[num];
+#else
 	struct resource *r = platform_get_resource(dev, IORESOURCE_IRQ, num);
 	return r ? r->start : -ENXIO;
+#endif
 }
 EXPORT_SYMBOL_GPL(platform_get_irq);

drivers/bluetooth/ath3k.c+1−0

@@ -67,6 +67,7 @@ static struct usb_device_id ath3k_table[] = { · 66 unmodified lines
67	{ USB_DEVICE(0x13d3, 0x3304) },	67	{ USB_DEVICE(0x13d3, 0x3304) },
68	{ USB_DEVICE(0x0930, 0x0215) },	68	{ USB_DEVICE(0x0930, 0x0215) },
69	{ USB_DEVICE(0x0489, 0xE03D) },	69	{ USB_DEVICE(0x0489, 0xE03D) },
		70	{ USB_DEVICE(0x0489, 0xE027) },
70		71
71	/* Atheros AR9285 Malbec with sflash firmware */	72	/* Atheros AR9285 Malbec with sflash firmware */
72	{ USB_DEVICE(0x03F0, 0x311D) },	73	{ USB_DEVICE(0x03F0, 0x311D) },

drivers/bluetooth/btusb.c+1−0

@@ -124,6 +124,7 @@ static struct usb_device_id blacklist_table[] = { · 123 unmodified lines
124	{ USB_DEVICE(0x13d3, 0x3304), .driver_info = BTUSB_IGNORE },	124	{ USB_DEVICE(0x13d3, 0x3304), .driver_info = BTUSB_IGNORE },
125	{ USB_DEVICE(0x0930, 0x0215), .driver_info = BTUSB_IGNORE },	125	{ USB_DEVICE(0x0930, 0x0215), .driver_info = BTUSB_IGNORE },
126	{ USB_DEVICE(0x0489, 0xe03d), .driver_info = BTUSB_IGNORE },	126	{ USB_DEVICE(0x0489, 0xe03d), .driver_info = BTUSB_IGNORE },
		127	{ USB_DEVICE(0x0489, 0xe027), .driver_info = BTUSB_IGNORE },
127		128
128	/* Atheros AR9285 Malbec with sflash firmware */	129	/* Atheros AR9285 Malbec with sflash firmware */
129	{ USB_DEVICE(0x03f0, 0x311d), .driver_info = BTUSB_IGNORE },	130	{ USB_DEVICE(0x03f0, 0x311d), .driver_info = BTUSB_IGNORE },

drivers/bus/omap-ocp2scp.c+65−3

@@ -22,6 +22,26 @@ · 21 unmodified lines
22	#include <linux/pm_runtime.h>	22	#include <linux/pm_runtime.h>
23	#include <linux/of.h>	23	#include <linux/of.h>
24	#include <linux/of_platform.h>	24	#include <linux/of_platform.h>
		25	#include <linux/platform_data/omap_ocp2scp.h>
		26
		27	/**
		28	* _count_resources - count for the number of resources
		29	* @res: struct resource *
		30	*
		31	* Count and return the number of resources populated for the device that is
		32	* connected to ocp2scp.
		33	*/
		34	static unsigned _count_resources(struct resource *res)
		35	{
		36	int cnt = 0;
		37
		38	while (res->start != res->end) {
		39	cnt++;
		40	res++;
		41	}
		42
		43	return cnt;
		44	}
25		45
26	static int ocp2scp_remove_devices(struct device dev, void c)	46	static int ocp2scp_remove_devices(struct device dev, void c)
27	{	47	{
@@ -34,20 +54,62 @@ static int ocp2scp_remove_devices(struct device dev, void c) · 6 unmodified lines
34		54
35	static int __devinit omap_ocp2scp_probe(struct platform_device *pdev)	55	static int __devinit omap_ocp2scp_probe(struct platform_device *pdev)
36	{	56	{
37	int ret;	57	int ret;
38	struct device_node *np = pdev->dev.of_node;	58	unsigned res_cnt, i;
		59	struct device_node *np = pdev->dev.of_node;
		60	struct platform_device *pdev_child;
		61	struct omap_ocp2scp_platform_data *pdata = pdev->dev.platform_data;
		62	struct omap_ocp2scp_dev *dev;
39		63
40	if (np) {	64	if (np) {
41	ret = of_platform_populate(np, NULL, NULL, &pdev->dev);	65	ret = of_platform_populate(np, NULL, NULL, &pdev->dev);
42	if (ret) {	66	if (ret) {
43	dev_err(&pdev->dev, "failed to add resources for ocp2scp child\n");	67	dev_err(&pdev->dev,
		68	"failed to add resources for ocp2scp child\n");
44	goto err0;	69	goto err0;
45	}	70	}
		71	} else if (pdata) {
		72	for (i = 0, dev = *pdata->devices; i < pdata->dev_cnt; i++,
		73	dev++) {
		74	res_cnt = _count_resources(dev->res);
		75
		76	pdev_child = platform_device_alloc(dev->drv_name,
		77	PLATFORM_DEVID_AUTO);
		78	if (!pdev_child) {
		79	dev_err(&pdev->dev,
		80	"failed to allocate mem for ocp2scp child\n");
		81	goto err0;
		82	}
		83
		84	ret = platform_device_add_resources(pdev_child,
		85	dev->res, res_cnt);
		86	if (ret) {
		87	dev_err(&pdev->dev,
		88	"failed to add resources for ocp2scp child\n");
		89	goto err1;
		90	}
		91
		92	pdev_child->dev.parent = &pdev->dev;
		93
		94	ret = platform_device_add(pdev_child);
		95	if (ret) {
		96	dev_err(&pdev->dev,
		97	"failed to register ocp2scp child device\n");
		98	goto err1;
		99	}
		100	}
		101	} else {
		102	dev_err(&pdev->dev, "OCP2SCP initialized without plat data\n");
		103	return -EINVAL;
46	}	104	}
		105
47	pm_runtime_enable(&pdev->dev);	106	pm_runtime_enable(&pdev->dev);
48		107
49	return 0;	108	return 0;
50		109
		110	err1:
		111	platform_device_put(pdev_child);
		112
51	err0:	113	err0:
52	device_for_each_child(&pdev->dev, NULL, ocp2scp_remove_devices);	114	device_for_each_child(&pdev->dev, NULL, ocp2scp_remove_devices);
53		115

drivers/clk/ux500/u8500_clk.c+46−4

 				CLK_IS_ROOT|CLK_IGNORE_UNUSED,
 				32768);
 	clk_register_clkdev(clk, "clk32k", NULL);
-	clk_register_clkdev(clk, NULL, "rtc-pl031");
+	clk_register_clkdev(clk, "apb_pclk", "rtc-pl031");
 	/* PRCMU clocks */
 	fw_version = prcmu_get_fw_version();
 	clk = clk_reg_prcc_pclk("p1_pclk2", "per1clk", U8500_CLKRST1_BASE,
 				BIT(2), 0);
+	clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.1");
 	clk = clk_reg_prcc_pclk("p1_pclk3", "per1clk", U8500_CLKRST1_BASE,
 				BIT(3), 0);
+	clk_register_clkdev(clk, "apb_pclk", "msp0");
+	clk_register_clkdev(clk, "apb_pclk", "ux500-msp-i2s.0");
 	clk = clk_reg_prcc_pclk("p1_pclk4", "per1clk", U8500_CLKRST1_BASE,
 				BIT(4), 0);
+	clk_register_clkdev(clk, "apb_pclk", "msp1");
+	clk_register_clkdev(clk, "apb_pclk", "ux500-msp-i2s.1");
 	clk = clk_reg_prcc_pclk("p1_pclk5", "per1clk", U8500_CLKRST1_BASE,
 				BIT(5), 0);
 	clk = clk_reg_prcc_pclk("p1_pclk6", "per1clk", U8500_CLKRST1_BASE,
 				BIT(6), 0);
+	clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.2");
 	clk = clk_reg_prcc_pclk("p1_pclk7", "per1clk", U8500_CLKRST1_BASE,
 				BIT(7), 0);
 	clk = clk_reg_prcc_pclk("p1_pclk8", "per1clk", U8500_CLKRST1_BASE,
 				BIT(8), 0);
+	clk_register_clkdev(clk, "apb_pclk", "slimbus0");
 	clk = clk_reg_prcc_pclk("p1_pclk9", "per1clk", U8500_CLKRST1_BASE,
 				BIT(9), 0);
 	clk = clk_reg_prcc_pclk("p1_pclk10", "per1clk", U8500_CLKRST1_BASE,
 				BIT(10), 0);
+	clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.4");
 	clk = clk_reg_prcc_pclk("p1_pclk11", "per1clk", U8500_CLKRST1_BASE,
 				BIT(11), 0);
+	clk_register_clkdev(clk, "apb_pclk", "msp3");
+	clk_register_clkdev(clk, "apb_pclk", "ux500-msp-i2s.3");
 	clk = clk_reg_prcc_pclk("p2_pclk0", "per2clk", U8500_CLKRST2_BASE,
 				BIT(0), 0);
+	clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.3");
 	clk = clk_reg_prcc_pclk("p2_pclk1", "per2clk", U8500_CLKRST2_BASE,
 				BIT(1), 0);
 	clk = clk_reg_prcc_pclk("p2_pclk5", "per2clk", U8500_CLKRST2_BASE,
 				BIT(5), 0);
+	clk_register_clkdev(clk, "apb_pclk", "msp2");
+	clk_register_clkdev(clk, "apb_pclk", "ux500-msp-i2s.2");
 	clk = clk_reg_prcc_pclk("p2_pclk6", "per2clk", U8500_CLKRST2_BASE,
 				BIT(6), 0);
 	clk_register_clkdev(clk, "apb_pclk", "sdi1");
 	clk = clk_reg_prcc_pclk("p2_pclk7", "per2clk", U8500_CLKRST2_BASE,
 				BIT(7), 0);
 	clk_register_clkdev(clk, "apb_pclk", "sdi3");
 	clk = clk_reg_prcc_pclk("p3_pclk1", "per3clk", U8500_CLKRST3_BASE,
 				BIT(1), 0);
+	clk_register_clkdev(clk, "apb_pclk", "ssp0");
 	clk = clk_reg_prcc_pclk("p3_pclk2", "per3clk", U8500_CLKRST3_BASE,
 				BIT(2), 0);
+	clk_register_clkdev(clk, "apb_pclk", "ssp1");
 	clk = clk_reg_prcc_pclk("p3_pclk3", "per3clk", U8500_CLKRST3_BASE,
 				BIT(3), 0);
+	clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.0");
 	clk = clk_reg_prcc_pclk("p3_pclk4", "per3clk", U8500_CLKRST3_BASE,
 				BIT(4), 0);
 	clk = clk_reg_prcc_kclk("p1_i2c1_kclk", "i2cclk",
 			U8500_CLKRST1_BASE, BIT(2), CLK_SET_RATE_GATE);
+	clk_register_clkdev(clk, NULL, "nmk-i2c.1");
 	clk = clk_reg_prcc_kclk("p1_msp0_kclk", "msp02clk",
 			U8500_CLKRST1_BASE, BIT(3), CLK_SET_RATE_GATE);
+	clk_register_clkdev(clk, NULL, "msp0");
+	clk_register_clkdev(clk, NULL, "ux500-msp-i2s.0");
 	clk = clk_reg_prcc_kclk("p1_msp1_kclk", "msp1clk",
 			U8500_CLKRST1_BASE, BIT(4), CLK_SET_RATE_GATE);
+	clk_register_clkdev(clk, NULL, "msp1");
+	clk_register_clkdev(clk, NULL, "ux500-msp-i2s.1");
 	clk = clk_reg_prcc_kclk("p1_sdi0_kclk", "sdmmcclk",
 			U8500_CLKRST1_BASE, BIT(5), CLK_SET_RATE_GATE);
 	clk = clk_reg_prcc_kclk("p1_i2c2_kclk", "i2cclk",
 			U8500_CLKRST1_BASE, BIT(6), CLK_SET_RATE_GATE);
+	clk_register_clkdev(clk, NULL, "nmk-i2c.2");
 	clk = clk_reg_prcc_kclk("p1_slimbus0_kclk", "slimclk",
-			U8500_CLKRST1_BASE, BIT(3), CLK_SET_RATE_GATE);
+			U8500_CLKRST1_BASE, BIT(8), CLK_SET_RATE_GATE);
-	/* FIXME: Redefinition of BIT(3). */
+	clk_register_clkdev(clk, NULL, "slimbus0");
 	clk = clk_reg_prcc_kclk("p1_i2c4_kclk", "i2cclk",
 			U8500_CLKRST1_BASE, BIT(9), CLK_SET_RATE_GATE);
+	clk_register_clkdev(clk, NULL, "nmk-i2c.4");
 	clk = clk_reg_prcc_kclk("p1_msp3_kclk", "msp1clk",
 			U8500_CLKRST1_BASE, BIT(10), CLK_SET_RATE_GATE);
+	clk_register_clkdev(clk, NULL, "msp3");
+	clk_register_clkdev(clk, NULL, "ux500-msp-i2s.3");
 	/* Periph2 */
 	clk = clk_reg_prcc_kclk("p2_i2c3_kclk", "i2cclk",
 			U8500_CLKRST2_BASE, BIT(0), CLK_SET_RATE_GATE);
+	clk_register_clkdev(clk, NULL, "nmk-i2c.3");
 	clk = clk_reg_prcc_kclk("p2_sdi4_kclk", "sdmmcclk",
 			U8500_CLKRST2_BASE, BIT(2), CLK_SET_RATE_GATE);
 	clk = clk_reg_prcc_kclk("p2_msp2_kclk", "msp02clk",
 			U8500_CLKRST2_BASE, BIT(3), CLK_SET_RATE_GATE);
+	clk_register_clkdev(clk, NULL, "msp2");
+	clk_register_clkdev(clk, NULL, "ux500-msp-i2s.2");
 	clk = clk_reg_prcc_kclk("p2_sdi1_kclk", "sdmmcclk",
 			U8500_CLKRST2_BASE, BIT(4), CLK_SET_RATE_GATE);
 	/* Periph3 */
 	clk = clk_reg_prcc_kclk("p3_ssp0_kclk", "sspclk",
 			U8500_CLKRST3_BASE, BIT(1), CLK_SET_RATE_GATE);
+	clk_register_clkdev(clk, NULL, "ssp0");
 	clk = clk_reg_prcc_kclk("p3_ssp1_kclk", "sspclk",
 			U8500_CLKRST3_BASE, BIT(2), CLK_SET_RATE_GATE);
+	clk_register_clkdev(clk, NULL, "ssp1");
 	clk = clk_reg_prcc_kclk("p3_i2c0_kclk", "i2cclk",
 			U8500_CLKRST3_BASE, BIT(3), CLK_SET_RATE_GATE);
+	clk_register_clkdev(clk, NULL, "nmk-i2c.0");
 	clk = clk_reg_prcc_kclk("p3_sdi2_kclk", "sdmmcclk",
 			U8500_CLKRST3_BASE, BIT(4), CLK_SET_RATE_GATE);

drivers/gpio/Kconfig+1−1

@@ -47,7 +47,7 @@ if GPIOLIB · 46 unmodified lines
47		47
48	config OF_GPIO	48	config OF_GPIO
49	def_bool y	49	def_bool y
50	depends on OF && !SPARC	50	depends on OF
51		51
52	config DEBUG_GPIO	52	config DEBUG_GPIO
53	bool "Debug GPIO calls"	53	bool "Debug GPIO calls"

drivers/gpu/drm/drm_fops.c+30−14

 	int minor_id = iminor(inode);
 	struct drm_minor *minor;
 	int retcode = 0;
+	int need_setup = 0;
+	struct address_space *old_mapping;
 	minor = idr_find(&drm_minors_idr, minor_id);
 	if (!minor)
 	if (drm_device_is_unplugged(dev))
 		return -ENODEV;
+	if (!dev->open_count++)
+		need_setup = 1;
+	mutex_lock(&dev->struct_mutex);
+	old_mapping = dev->dev_mapping;
+	if (old_mapping == NULL)
+		dev->dev_mapping = &inode->i_data;
+	/* ihold ensures nobody can remove inode with our i_data */
+	ihold(container_of(dev->dev_mapping, struct inode, i_data));
+	inode->i_mapping = dev->dev_mapping;
+	filp->f_mapping = dev->dev_mapping;
+	mutex_unlock(&dev->struct_mutex);
 	retcode = drm_open_helper(inode, filp, dev);
-	if (!retcode) {
+	if (retcode)
-		atomic_inc(&dev->counts[_DRM_STAT_OPENS]);
+		goto err_undo;
-		if (!dev->open_count++)
+	atomic_inc(&dev->counts[_DRM_STAT_OPENS]);
-			retcode = drm_setup(dev);
+	if (need_setup) {
-	}
+		retcode = drm_setup(dev);
-	if (!retcode) {
+		if (retcode)
-		mutex_lock(&dev->struct_mutex);
+			goto err_undo;
-		if (dev->dev_mapping == NULL)
-			dev->dev_mapping = &inode->i_data;
-		/* ihold ensures nobody can remove inode with our i_data */
-		ihold(container_of(dev->dev_mapping, struct inode, i_data));
-		inode->i_mapping = dev->dev_mapping;
-		filp->f_mapping = dev->dev_mapping;
-		mutex_unlock(&dev->struct_mutex);
 	}
+	return 0;
+err_undo:
+	mutex_lock(&dev->struct_mutex);
+	filp->f_mapping = old_mapping;
+	inode->i_mapping = old_mapping;
+	iput(container_of(dev->dev_mapping, struct inode, i_data));
+	dev->dev_mapping = old_mapping;
+	mutex_unlock(&dev->struct_mutex);
+	dev->open_count--;
 	return retcode;
 }
 EXPORT_SYMBOL(drm_open);

drivers/gpu/drm/exynos/Kconfig+1−1

@@ -1,6 +1,6 @@
1	config DRM_EXYNOS	1	config DRM_EXYNOS
2	tristate "DRM Support for Samsung SoC EXYNOS Series"	2	tristate "DRM Support for Samsung SoC EXYNOS Series"
3	depends on DRM && PLAT_SAMSUNG	3	depends on DRM && (PLAT_SAMSUNG \|\| ARCH_MULTIPLATFORM)
4	select DRM_KMS_HELPER	4	select DRM_KMS_HELPER
5	select FB_CFB_FILLRECT	5	select FB_CFB_FILLRECT
6	select FB_CFB_COPYAREA	6	select FB_CFB_COPYAREA

drivers/gpu/drm/exynos/exynos_drm_connector.c+1−0

@@ -374,6 +374,7 @@ struct drm_connector exynos_drm_connector_create(struct drm_device dev, · 373 unmodified lines
374	exynos_connector->encoder_id = encoder->base.id;	374	exynos_connector->encoder_id = encoder->base.id;
375	exynos_connector->manager = manager;	375	exynos_connector->manager = manager;
376	exynos_connector->dpms = DRM_MODE_DPMS_OFF;	376	exynos_connector->dpms = DRM_MODE_DPMS_OFF;
		377	connector->dpms = DRM_MODE_DPMS_OFF;
377	connector->encoder = encoder;	378	connector->encoder = encoder;
378		379
379	err = drm_mode_connector_attach_encoder(connector, encoder);	380	err = drm_mode_connector_attach_encoder(connector, encoder);

drivers/gpu/drm/exynos/exynos_drm_encoder.c+17−16

  * @manager: specific encoder has its own manager to control a hardware
  *	appropriately and we can access a hardware drawing on this manager.
  * @dpms: store the encoder dpms value.
+ * @updated: indicate whether overlay data updating is needed or not.
  */
 struct exynos_drm_encoder {
 	struct drm_crtc			*old_crtc;
 	struct drm_encoder		drm_encoder;
 	struct exynos_drm_manager	*manager;
-	int dpms;
+	int				dpms;
+	bool				updated;
 };
 static void exynos_drm_connector_power(struct drm_encoder *encoder, int mode)
 	switch (mode) {
 	case DRM_MODE_DPMS_ON:
 		if (manager_ops && manager_ops->apply)
-			manager_ops->apply(manager->dev);
+			if (!exynos_encoder->updated)
+				manager_ops->apply(manager->dev);
 		exynos_drm_connector_power(encoder, mode);
 		exynos_encoder->dpms = mode;
 		break;
 	case DRM_MODE_DPMS_OFF:
 		exynos_drm_connector_power(encoder, mode);
 		exynos_encoder->dpms = mode;
+		exynos_encoder->updated = false;
 		break;
 	default:
 		DRM_ERROR("unspecified mode %d\n", mode);
 static void exynos_drm_encoder_commit(struct drm_encoder *encoder)
 {
-	struct exynos_drm_manager *manager = exynos_drm_get_manager(encoder);
+	struct exynos_drm_encoder *exynos_encoder = to_exynos_encoder(encoder);
+	struct exynos_drm_manager *manager = exynos_encoder->manager;
 	struct exynos_drm_manager_ops *manager_ops = manager->ops;
 	DRM_DEBUG_KMS("%s\n", __FILE__);
 	if (manager_ops && manager_ops->commit)
 		manager_ops->commit(manager->dev);
+	/*
+	 * this will avoid one issue that overlay data is updated to
+	 * real hardware two times.
+	 * And this variable will be used to check if the data was
+	 * already updated or not by exynos_drm_encoder_dpms function.
+	 */
+	exynos_encoder->updated = true;
 }
 static void exynos_drm_encoder_disable(struct drm_encoder *encoder)
 	if (manager_ops && manager_ops->dpms)
 		manager_ops->dpms(manager->dev, mode);
-	/*
-	 * set current mode to new one so that data aren't updated into
-	 * registers by drm_helper_connector_dpms two times.
-	 *
-	 * in case that drm_crtc_helper_set_mode() is called,
-	 * overlay_ops->commit() and manager_ops->commit() callbacks
-	 * can be called two times, first at drm_crtc_helper_set_mode()
-	 * and second at drm_helper_connector_dpms().
-	 * so with this setting, when drm_helper_connector_dpms() is called
-	 * encoder->funcs->dpms() will be ignored.
-	 */
-	exynos_encoder->dpms = mode;
 	/*
 	 * if this condition is ok then it means that the crtc is already
 	 * detached from encoder and last function for detaching is properly

drivers/gpu/drm/exynos/exynos_mixer.c+1−1

@@ -1142,7 +1142,7 @@ static int __devinit mixer_probe(struct platform_device *pdev) · 1141 unmodified lines
1142	const struct of_device_id *match;	1142	const struct of_device_id *match;
1143	match = of_match_node(of_match_ptr(mixer_match_types),	1143	match = of_match_node(of_match_ptr(mixer_match_types),
1144	pdev->dev.of_node);	1144	pdev->dev.of_node);
1145	drv = match->data;	1145	drv = (struct mixer_drv_data *)match->data;
1146	} else {	1146	} else {
1147	drv = (struct mixer_drv_data *)	1147	drv = (struct mixer_drv_data *)
1148	platform_get_device_id(pdev)->driver_data;	1148	platform_get_device_id(pdev)->driver_data;

drivers/gpu/drm/i915/i915_dma.c+2−1

@@ -1505,7 +1505,8 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) · 1504 unmodified lines
1505	goto put_gmch;	1505	goto put_gmch;
1506	}	1506	}
1507		1507
1508	i915_kick_out_firmware_fb(dev_priv);	1508	if (drm_core_check_feature(dev, DRIVER_MODESET))
		1509	i915_kick_out_firmware_fb(dev_priv);
1509		1510
1510	pci_set_master(dev->pdev);	1511	pci_set_master(dev->pdev);
1511		1512

drivers/gpu/drm/i915/intel_crt.c+2−2

@@ -143,7 +143,7 @@ static void intel_crt_dpms(struct drm_connector *connector, int mode) · 142 unmodified lines
143	int old_dpms;	143	int old_dpms;
144		144
145	/* PCH platforms and VLV only support on/off. */	145	/* PCH platforms and VLV only support on/off. */
146	if (INTEL_INFO(dev)->gen < 5 && mode != DRM_MODE_DPMS_ON)	146	if (INTEL_INFO(dev)->gen >= 5 && mode != DRM_MODE_DPMS_ON)
147	mode = DRM_MODE_DPMS_OFF;	147	mode = DRM_MODE_DPMS_OFF;
148		148
149	if (mode == connector->dpms)	149	if (mode == connector->dpms)
@@ -729,7 +729,7 @@ void intel_crt_init(struct drm_device *dev) · 579 unmodified lines
729		729
730	crt->base.type = INTEL_OUTPUT_ANALOG;	730	crt->base.type = INTEL_OUTPUT_ANALOG;
731	crt->base.cloneable = true;	731	crt->base.cloneable = true;
732	if (IS_HASWELL(dev))	732	if (IS_HASWELL(dev) \|\| IS_I830(dev))
733	crt->base.crtc_mask = (1 << 0);	733	crt->base.crtc_mask = (1 << 0);
734	else	734	else
735	crt->base.crtc_mask = (1 << 0) \| (1 << 1) \| (1 << 2);	735	crt->base.crtc_mask = (1 << 0) \| (1 << 1) \| (1 << 2);

drivers/gpu/drm/i915/intel_display.c+11−0

@@ -3841,6 +3841,17 @@ static bool intel_choose_pipe_bpp_dither(struct drm_crtc *crtc, · 3840 unmodified lines
3841	}	3841	}
3842	}	3842	}
3843		3843
		3844	if (intel_encoder->type == INTEL_OUTPUT_EDP) {
		3845	/* Use VBT settings if we have an eDP panel */
		3846	unsigned int edp_bpc = dev_priv->edp.bpp / 3;
		3847
		3848	if (edp_bpc < display_bpc) {
		3849	DRM_DEBUG_KMS("clamping display bpc (was %d) to eDP (%d)\n", display_bpc, edp_bpc);
		3850	display_bpc = edp_bpc;
		3851	}
		3852	continue;
		3853	}
		3854
3844	/*	3855	/*
3845	* HDMI is either 12 or 8, so if the display lets 10bpc sneak	3856	* HDMI is either 12 or 8, so if the display lets 10bpc sneak
3846	* through, clamp it down. (Note: >12bpc will be caught below.)	3857	* through, clamp it down. (Note: >12bpc will be caught below.)

drivers/gpu/drm/i915/intel_overlay.c+11−3

 	intel_ring_emit(ring, flip_addr);
 	intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
 	/* turn overlay off */
-	intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_OFF);
+	if (IS_I830(dev)) {
-	intel_ring_emit(ring, flip_addr);
+		/* Workaround: Don't disable the overlay fully, since otherwise
-	intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
+		 * it dies on the next OVERLAY_ON cmd. */
+		intel_ring_emit(ring, MI_NOOP);
+		intel_ring_emit(ring, MI_NOOP);
+		intel_ring_emit(ring, MI_NOOP);
+	} else {
+		intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_OFF);
+		intel_ring_emit(ring, flip_addr);
+		intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
+	}
 	intel_ring_advance(ring);
 	return intel_overlay_do_wait_request(overlay, intel_overlay_off_tail);

drivers/gpu/drm/i915/intel_panel.c+1−1

@@ -435,7 +435,7 @@ int intel_panel_setup_backlight(struct drm_device *dev) · 434 unmodified lines
435	props.type = BACKLIGHT_RAW;	435	props.type = BACKLIGHT_RAW;
436	props.max_brightness = _intel_panel_get_max_backlight(dev);	436	props.max_brightness = _intel_panel_get_max_backlight(dev);
437	if (props.max_brightness == 0) {	437	if (props.max_brightness == 0) {
438	DRM_ERROR("Failed to get maximum backlight value\n");	438	DRM_DEBUG_DRIVER("Failed to get maximum backlight value\n");
439	return -ENODEV;	439	return -ENODEV;
440	}	440	}
441	dev_priv->backlight =	441	dev_priv->backlight =

drivers/gpu/drm/i915/intel_sdvo.c+61−23

 }
 #endif
+static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
+				       unsigned if_index, uint8_t tx_rate,
+				       uint8_t *data, unsigned length)
+{
+	uint8_t set_buf_index[2] = { if_index, 0 };
+	uint8_t hbuf_size, tmp[8];
+	int i;
+	if (!intel_sdvo_set_value(intel_sdvo,
+				  SDVO_CMD_SET_HBUF_INDEX,
+				  set_buf_index, 2))
+		return false;
+	if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
+				  &hbuf_size, 1))
+		return false;
+	/* Buffer size is 0 based, hooray! */
+	hbuf_size++;
+	DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
+		      if_index, length, hbuf_size);
+	for (i = 0; i < hbuf_size; i += 8) {
+		memset(tmp, 0, 8);
+		if (i < length)
+			memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
+		if (!intel_sdvo_set_value(intel_sdvo,
+					  SDVO_CMD_SET_HBUF_DATA,
+					  tmp, 8))
+			return false;
+	}
+	return intel_sdvo_set_value(intel_sdvo,
+				    SDVO_CMD_SET_HBUF_TXRATE,
+				    &tx_rate, 1);
+}
 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
 {
 	struct dip_infoframe avi_if = {
 		.ver = DIP_VERSION_AVI,
 		.len = DIP_LEN_AVI,
 	};
-	uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
-	uint8_t set_buf_index[2] = { 1, 0 };
 	uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
-	uint64_t *data = (uint64_t *)sdvo_data;
-	unsigned i;
 	intel_dip_infoframe_csum(&avi_if);
 	sdvo_data[3] = avi_if.checksum;
 	memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
-	if (!intel_sdvo_set_value(intel_sdvo,
+	return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
-				  SDVO_CMD_SET_HBUF_INDEX,
+					  SDVO_HBUF_TX_VSYNC,
-				  set_buf_index, 2))
+					  sdvo_data, sizeof(sdvo_data));
-		return false;
-	for (i = 0; i < sizeof(sdvo_data); i += 8) {
-		if (!intel_sdvo_set_value(intel_sdvo,
-					  SDVO_CMD_SET_HBUF_DATA,
-					  data, 8))
-			return false;
-		data++;
-	}
-	return intel_sdvo_set_value(intel_sdvo,
-				    SDVO_CMD_SET_HBUF_TXRATE,
-				    &tx_rate, 1);
 }
 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
 	return true;
 }
+static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
+{
+	struct drm_device *dev = intel_sdvo->base.base.dev;
+	struct drm_connector *connector, *tmp;
+	list_for_each_entry_safe(connector, tmp,
+				 &dev->mode_config.connector_list, head) {
+		if (intel_attached_encoder(connector) == &intel_sdvo->base)
+			intel_sdvo_destroy(connector);
+	}
+}
 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
 					  struct intel_sdvo_connector *intel_sdvo_connector,
 					  int type)
 				    intel_sdvo->caps.output_flags) != true) {
 		DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
 			      SDVO_NAME(intel_sdvo));
-		goto err;
+		/* Output_setup can leave behind connectors! */
+		goto err_output;
 	}
 	/* Only enable the hotplug irq if we need it, to work around noisy
 	/* Set the input timing to the screen. Assume always input 0. */
 	if (!intel_sdvo_set_target_input(intel_sdvo))
-		goto err;
+		goto err_output;
 	if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
 						    &intel_sdvo->pixel_clock_min,
 						    &intel_sdvo->pixel_clock_max))
-		goto err;
+		goto err_output;
 	DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
 			"clock range %dMHz - %dMHz, "
 			(SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
 	return true;
+err_output:
+	intel_sdvo_output_cleanup(intel_sdvo);
 err:
 	drm_encoder_cleanup(&intel_encoder->base);
 	i2c_del_adapter(&intel_sdvo->ddc);

drivers/gpu/drm/i915/intel_sdvo_regs.h+2−0

 #define SDVO_CMD_SET_AUDIO_STAT		0x91
 #define SDVO_CMD_GET_AUDIO_STAT		0x92
 #define SDVO_CMD_SET_HBUF_INDEX		0x93
+  #define SDVO_HBUF_INDEX_ELD		0
+  #define SDVO_HBUF_INDEX_AVI_IF	1
 #define SDVO_CMD_GET_HBUF_INDEX		0x94
 #define SDVO_CMD_GET_HBUF_INFO		0x95
 #define SDVO_CMD_SET_HBUF_AV_SPLIT	0x96

drivers/gpu/drm/nouveau/core/engine/disp/nv50.c+12−8

  * Authors: Ben Skeggs
  */
+#include <subdev/bar.h>
 #include <engine/software.h>
 #include <engine/disp.h>
 static void
 nv50_disp_intr_vblank(struct nv50_disp_priv *priv, int crtc)
 {
+	struct nouveau_bar *bar = nouveau_bar(priv);
 	struct nouveau_disp *disp = &priv->base;
 	struct nouveau_software_chan *chan, *temp;
 	unsigned long flags;
 		if (chan->vblank.crtc != crtc)
 			continue;
-		nv_wr32(priv, 0x001704, chan->vblank.channel);
-		nv_wr32(priv, 0x001710, 0x80000000 | chan->vblank.ctxdma);
 		if (nv_device(priv)->chipset == 0x50) {
+			nv_wr32(priv, 0x001704, chan->vblank.channel);
+			nv_wr32(priv, 0x001710, 0x80000000 | chan->vblank.ctxdma);
+			bar->flush(bar);
 			nv_wr32(priv, 0x001570, chan->vblank.offset);
 			nv_wr32(priv, 0x001574, chan->vblank.value);
 		} else {
-			if (nv_device(priv)->chipset >= 0xc0) {
+			nv_wr32(priv, 0x001718, 0x80000000 | chan->vblank.channel);
-				nv_wr32(priv, 0x06000c,
+			bar->flush(bar);
-					upper_32_bits(chan->vblank.offset));
+			nv_wr32(priv, 0x06000c,
-			}
+				upper_32_bits(chan->vblank.offset));
-			nv_wr32(priv, 0x060010, chan->vblank.offset);
+			nv_wr32(priv, 0x060010,
+				lower_32_bits(chan->vblank.offset));
 			nv_wr32(priv, 0x060014, chan->vblank.value);
 		}

drivers/gpu/drm/nouveau/core/engine/graph/nv40.c+2−2

@@ -156,8 +156,8 @@ nv40_graph_context_ctor(struct nouveau_object *parent, · 155 unmodified lines
156	static int	156	static int
157	nv40_graph_context_fini(struct nouveau_object *object, bool suspend)	157	nv40_graph_context_fini(struct nouveau_object *object, bool suspend)
158	{	158	{
159	struct nv04_graph_priv priv = (void )object->engine;	159	struct nv40_graph_priv priv = (void )object->engine;
160	struct nv04_graph_chan chan = (void )object;	160	struct nv40_graph_chan chan = (void )object;
161	u32 inst = 0x01000000 \| nv_gpuobj(chan)->addr >> 4;	161	u32 inst = 0x01000000 \| nv_gpuobj(chan)->addr >> 4;
162	int ret = 0;	162	int ret = 0;
163		163

drivers/gpu/drm/nouveau/core/engine/mpeg/nv40.c+1−1

@@ -38,7 +38,7 @@ struct nv40_mpeg_priv { · 37 unmodified lines
38	};	38	};
39		39
40	struct nv40_mpeg_chan {	40	struct nv40_mpeg_chan {
41	struct nouveau_mpeg base;	41	struct nouveau_mpeg_chan base;
42	};	42	};
43		43
44	/*******************************************************************************	44	/*******************************************************************************

drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c+1−1

@@ -67,7 +67,7 @@ nv41_vm_unmap(struct nouveau_gpuobj *pgt, u32 pte, u32 cnt) · 66 unmodified lines
67	static void	67	static void
68	nv41_vm_flush(struct nouveau_vm *vm)	68	nv41_vm_flush(struct nouveau_vm *vm)
69	{	69	{
70	struct nv04_vm_priv priv = (void )vm->vmm;	70	struct nv04_vmmgr_priv priv = (void )vm->vmm;
71		71
72	mutex_lock(&nv_subdev(priv)->mutex);	72	mutex_lock(&nv_subdev(priv)->mutex);
73	nv_wr32(priv, 0x100810, 0x00000022);	73	nv_wr32(priv, 0x100810, 0x00000022);

drivers/gpu/drm/nouveau/nouveau_connector.c+1−1

@@ -355,7 +355,7 @@ nouveau_connector_detect_lvds(struct drm_connector *connector, bool force) · 354 unmodified lines
355	* valid - it's not (rh#613284)	355	* valid - it's not (rh#613284)
356	*/	356	*/
357	if (nv_encoder->dcb->lvdsconf.use_acpi_for_edid) {	357	if (nv_encoder->dcb->lvdsconf.use_acpi_for_edid) {
358	if (!(nv_connector->edid = nouveau_acpi_edid(dev, connector))) {	358	if ((nv_connector->edid = nouveau_acpi_edid(dev, connector))) {
359	status = connector_status_connected;	359	status = connector_status_connected;
360	goto out;	360	goto out;
361	}	361	}

drivers/gpu/drm/radeon/atombios_crtc.c+31−23

@@ -1696,35 +1696,43 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc) · 1695 unmodified lines
1696	return ATOM_PPLL2;	1696	return ATOM_PPLL2;
1697	DRM_ERROR("unable to allocate a PPLL\n");	1697	DRM_ERROR("unable to allocate a PPLL\n");
1698	return ATOM_PPLL_INVALID;	1698	return ATOM_PPLL_INVALID;
1699	} else {	1699	} else if (ASIC_IS_AVIVO(rdev)) {
1700	if (ASIC_IS_AVIVO(rdev)) {	1700	/* in DP mode, the DP ref clock can come from either PPLL
1701	/* in DP mode, the DP ref clock can come from either PPLL	1701	* depending on the asic:
1702	* depending on the asic:	1702	* DCE3: PPLL1 or PPLL2
1703	* DCE3: PPLL1 or PPLL2	1703	*/
1704	*/	1704	if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(radeon_crtc->encoder))) {
1705	if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(radeon_crtc->encoder))) {	1705	/* use the same PPLL for all DP monitors */
1706	/* use the same PPLL for all DP monitors */	1706	pll = radeon_get_shared_dp_ppll(crtc);
1707	pll = radeon_get_shared_dp_ppll(crtc);	1707	if (pll != ATOM_PPLL_INVALID)
1708	if (pll != ATOM_PPLL_INVALID)	1708	return pll;
1709	return pll;	1709	} else {
1710	} else {	1710	/* use the same PPLL for all monitors with the same clock */
1711	/* use the same PPLL for all monitors with the same clock */	1711	pll = radeon_get_shared_nondp_ppll(crtc);
1712	pll = radeon_get_shared_nondp_ppll(crtc);	1712	if (pll != ATOM_PPLL_INVALID)
1713	if (pll != ATOM_PPLL_INVALID)	1713	return pll;
1714	return pll;	1714	}
1715	}	1715	/* all other cases */
1716	/* all other cases */	1716	pll_in_use = radeon_get_pll_use_mask(crtc);
1717	pll_in_use = radeon_get_pll_use_mask(crtc);	1717	/* the order shouldn't matter here, but we probably
		1718	* need this until we have atomic modeset
		1719	*/
		1720	if (rdev->flags & RADEON_IS_IGP) {
1718	if (!(pll_in_use & (1 << ATOM_PPLL1)))	1721	if (!(pll_in_use & (1 << ATOM_PPLL1)))
1719	return ATOM_PPLL1;	1722	return ATOM_PPLL1;
1720	if (!(pll_in_use & (1 << ATOM_PPLL2)))	1723	if (!(pll_in_use & (1 << ATOM_PPLL2)))
1721	return ATOM_PPLL2;	1724	return ATOM_PPLL2;
1722	DRM_ERROR("unable to allocate a PPLL\n");
1723	return ATOM_PPLL_INVALID;
1724	} else {	1725	} else {
1725	/* on pre-R5xx asics, the crtc to pll mapping is hardcoded */	1726	if (!(pll_in_use & (1 << ATOM_PPLL2)))
1726	return radeon_crtc->crtc_id;	1727	return ATOM_PPLL2;
		1728	if (!(pll_in_use & (1 << ATOM_PPLL1)))
		1729	return ATOM_PPLL1;
1727	}	1730	}
		1731	DRM_ERROR("unable to allocate a PPLL\n");
		1732	return ATOM_PPLL_INVALID;
		1733	} else {
		1734	/* on pre-R5xx asics, the crtc to pll mapping is hardcoded */
		1735	return radeon_crtc->crtc_id;
1728	}	1736	}
1729	}	1737	}
1730		1738

drivers/gpu/drm/radeon/atombios_encoders.c+1−1

@@ -1625,7 +1625,7 @@ radeon_atom_encoder_dpms_dig(struct drm_encoder *encoder, int mode) · 1624 unmodified lines
1625	atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_SETUP, 0, 0);	1625	atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_SETUP, 0, 0);
1626	atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0);	1626	atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0);
1627	/* some early dce3.2 boards have a bug in their transmitter control table */	1627	/* some early dce3.2 boards have a bug in their transmitter control table */
1628	if ((rdev->family != CHIP_RV710) \|\| (rdev->family != CHIP_RV730))	1628	if ((rdev->family != CHIP_RV710) && (rdev->family != CHIP_RV730))
1629	atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT, 0, 0);	1629	atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT, 0, 0);
1630	}	1630	}
1631	if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(encoder)) && connector) {	1631	if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(encoder)) && connector) {

drivers/gpu/drm/radeon/evergreen.c+1−1

@@ -1372,7 +1372,7 @@ void evergreen_mc_resume(struct radeon_device rdev, struct evergreen_mc_save s · 1371 unmodified lines
1372	WREG32(BIF_FB_EN, FB_READ_EN \| FB_WRITE_EN);	1372	WREG32(BIF_FB_EN, FB_READ_EN \| FB_WRITE_EN);
1373		1373
1374	for (i = 0; i < rdev->num_crtc; i++) {	1374	for (i = 0; i < rdev->num_crtc; i++) {
1375	if (save->crtc_enabled) {	1375	if (save->crtc_enabled[i]) {
1376	if (ASIC_IS_DCE6(rdev)) {	1376	if (ASIC_IS_DCE6(rdev)) {
1377	tmp = RREG32(EVERGREEN_CRTC_BLANK_CONTROL + crtc_offsets[i]);	1377	tmp = RREG32(EVERGREEN_CRTC_BLANK_CONTROL + crtc_offsets[i]);
1378	tmp \|= EVERGREEN_CRTC_BLANK_DATA_EN;	1378	tmp \|= EVERGREEN_CRTC_BLANK_DATA_EN;

drivers/gpu/drm/radeon/evergreen_cs.c+4−1

 	/* macro tile width & height */
 	palign = (8 * surf->bankw * track->npipes) * surf->mtilea;
 	halign = (8 * surf->bankh * surf->nbanks) / surf->mtilea;
-	mtileb = (palign / 8) * (halign / 8) * tileb;;
+	mtileb = (palign / 8) * (halign / 8) * tileb;
 	mtile_pr = surf->nbx / palign;
 	mtile_ps = (mtile_pr * surf->nby) / halign;
 	surf->layer_size = mtile_ps * mtileb * slice_pt;
 	/* check config regs */
 	switch (reg) {
 	case GRBM_GFX_INDEX:
+	case CP_STRMOUT_CNTL:
+	case CP_COHER_CNTL:
+	case CP_COHER_SIZE:
 	case VGT_VTX_VECT_EJECT_REG:
 	case VGT_CACHE_INVALIDATION:
 	case VGT_GS_VERTEX_REUSE:

drivers/gpu/drm/radeon/evergreend.h+4−0

 #define		FB_READ_EN					(1 << 0)
 #define		FB_WRITE_EN					(1 << 1)
+#define	CP_STRMOUT_CNTL					0x84FC
+#define	CP_COHER_CNTL					0x85F0
+#define	CP_COHER_SIZE					0x85F4
 #define	CP_COHER_BASE					0x85F8
 #define	CP_STALLED_STAT1			0x8674
 #define	CP_STALLED_STAT2			0x8678

drivers/gpu/drm/radeon/radeon_atpx_handler.c+2−2

@@ -352,9 +352,9 @@ static int radeon_atpx_switchto(enum vga_switcheroo_client_id id) · 351 unmodified lines
352	}	352	}
353		353
354	/**	354	/**
355	* radeon_atpx_switchto - switch to the requested GPU	355	* radeon_atpx_power_state - power down/up the requested GPU
356	*	356	*
357	* @id: GPU to switch to	357	* @id: GPU to power down/up
358	* @state: requested power state (0 = off, 1 = on)	358	* @state: requested power state (0 = off, 1 = on)
359	*	359	*
360	* Execute the necessary ATPX function to power down/up the discrete GPU	360	* Execute the necessary ATPX function to power down/up the discrete GPU

drivers/gpu/drm/radeon/radeon_connectors.c+21−7

 	struct drm_mode_object *obj;
 	int i;
 	enum drm_connector_status ret = connector_status_disconnected;
-	bool dret = false;
+	bool dret = false, broken_edid = false;
 	if (!force && radeon_check_hpd_status_unchanged(connector))
 		return connector->status;
 				ret = connector_status_disconnected;
 				DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n", drm_get_connector_name(connector));
 				radeon_connector->ddc_bus = NULL;
+			} else {
+				ret = connector_status_connected;
+				broken_edid = true; /* defer use_digital to later */
 			}
 		} else {
 			radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
 			encoder_funcs = encoder->helper_private;
 			if (encoder_funcs->detect) {
-				if (ret != connector_status_connected) {
+				if (!broken_edid) {
-					ret = encoder_funcs->detect(encoder, connector);
+					if (ret != connector_status_connected) {
-					if (ret == connector_status_connected) {
+						/* deal with analog monitors without DDC */
-						radeon_connector->use_digital = false;
+						ret = encoder_funcs->detect(encoder, connector);
+						if (ret == connector_status_connected) {
+							radeon_connector->use_digital = false;
+						}
+						if (ret != connector_status_disconnected)
+							radeon_connector->detected_by_load = true;
 					}
-					if (ret != connector_status_disconnected)
+				} else {
-						radeon_connector->detected_by_load = true;
+					enum drm_connector_status lret;
+					/* assume digital unless load detected otherwise */
+					radeon_connector->use_digital = true;
+					lret = encoder_funcs->detect(encoder, connector);
+					DRM_DEBUG_KMS("load_detect %x returned: %x\n",encoder->encoder_type,lret);
+					if (lret == connector_status_connected)
+						radeon_connector->use_digital = false;
 				}
 				break;
 			}

drivers/gpu/drm/radeon/radeon_legacy_crtc.c+13−2

 	struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
 	struct drm_device *dev = crtc->dev;
 	struct radeon_device *rdev = dev->dev_private;
+	uint32_t crtc_ext_cntl = 0;
 	uint32_t mask;
 	if (radeon_crtc->crtc_id)
 			RADEON_CRTC_VSYNC_DIS |
 			RADEON_CRTC_HSYNC_DIS);
+	/*
+	 * On all dual CRTC GPUs this bit controls the CRTC of the primary DAC.
+	 * Therefore it is set in the DAC DMPS function.
+	 * This is different for GPU's with a single CRTC but a primary and a
+	 * TV DAC: here it controls the single CRTC no matter where it is
+	 * routed. Therefore we set it here.
+	 */
+	if (rdev->flags & RADEON_SINGLE_CRTC)
+		crtc_ext_cntl = RADEON_CRTC_CRT_ON;
 	switch (mode) {
 	case DRM_MODE_DPMS_ON:
 		radeon_crtc->enabled = true;
 		else {
 			WREG32_P(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_EN, ~(RADEON_CRTC_EN |
 									 RADEON_CRTC_DISP_REQ_EN_B));
-			WREG32_P(RADEON_CRTC_EXT_CNTL, 0, ~mask);
+			WREG32_P(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl, ~(mask | crtc_ext_cntl));
 		}
 		drm_vblank_post_modeset(dev, radeon_crtc->crtc_id);
 		radeon_crtc_load_lut(crtc);
 		else {
 			WREG32_P(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_DISP_REQ_EN_B, ~(RADEON_CRTC_EN |
 										    RADEON_CRTC_DISP_REQ_EN_B));
-			WREG32_P(RADEON_CRTC_EXT_CNTL, mask, ~mask);
+			WREG32_P(RADEON_CRTC_EXT_CNTL, mask, ~(mask | crtc_ext_cntl));
 		}
 		radeon_crtc->enabled = false;
 		/* adjust pm to dpms changes AFTER disabling crtcs */

drivers/gpu/drm/radeon/radeon_legacy_encoders.c+147−28

@@ -537,7 +537,9 @@ static void radeon_legacy_primary_dac_dpms(struct drm_encoder *encoder, int mode · 536 unmodified lines
537	break;	537	break;
538	}	538	}
539		539
540	WREG32(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl);	540	/* handled in radeon_crtc_dpms() */
		541	if (!(rdev->flags & RADEON_SINGLE_CRTC))
		542	WREG32(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl);
541	WREG32(RADEON_DAC_CNTL, dac_cntl);	543	WREG32(RADEON_DAC_CNTL, dac_cntl);
542	WREG32(RADEON_DAC_MACRO_CNTL, dac_macro_cntl);	544	WREG32(RADEON_DAC_MACRO_CNTL, dac_macro_cntl);
543		545
@@ -662,6 +664,8 @@ static enum drm_connector_status radeon_legacy_primary_dac_detect(struct drm_enc · 118 unmodified lines
662		664
663	if (ASIC_IS_R300(rdev))	665	if (ASIC_IS_R300(rdev))
664	tmp \|= (0x1b6 << RADEON_DAC_FORCE_DATA_SHIFT);	666	tmp \|= (0x1b6 << RADEON_DAC_FORCE_DATA_SHIFT);
		667	else if (ASIC_IS_RV100(rdev))
		668	tmp \|= (0x1ac << RADEON_DAC_FORCE_DATA_SHIFT);
665	else	669	else
666	tmp \|= (0x180 << RADEON_DAC_FORCE_DATA_SHIFT);	670	tmp \|= (0x180 << RADEON_DAC_FORCE_DATA_SHIFT);
667		671
@@ -671,6 +675,7 @@ static enum drm_connector_status radeon_legacy_primary_dac_detect(struct drm_enc · 3 unmodified lines
671	tmp \|= RADEON_DAC_RANGE_CNTL_PS2 \| RADEON_DAC_CMP_EN;	675	tmp \|= RADEON_DAC_RANGE_CNTL_PS2 \| RADEON_DAC_CMP_EN;
672	WREG32(RADEON_DAC_CNTL, tmp);	676	WREG32(RADEON_DAC_CNTL, tmp);
673		677
		678	tmp = dac_macro_cntl;
674	tmp &= ~(RADEON_DAC_PDWN_R \|	679	tmp &= ~(RADEON_DAC_PDWN_R \|
675	RADEON_DAC_PDWN_G \|	680	RADEON_DAC_PDWN_G \|
676	RADEON_DAC_PDWN_B);	681	RADEON_DAC_PDWN_B);
@@ -1092,7 +1097,8 @@ static void radeon_legacy_tv_dac_dpms(struct drm_encoder *encoder, int mode) · 415 unmodified lines
1092	} else {	1097	} else {
1093	if (is_tv)	1098	if (is_tv)
1094	WREG32(RADEON_TV_MASTER_CNTL, tv_master_cntl);	1099	WREG32(RADEON_TV_MASTER_CNTL, tv_master_cntl);
1095	else	1100	/* handled in radeon_crtc_dpms() */
		1101	else if (!(rdev->flags & RADEON_SINGLE_CRTC))
1096	WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl);	1102	WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl);
1097	WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl);	1103	WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl);
1098	}	1104	}
@@ -1416,13 +1422,104 @@ static bool radeon_legacy_tv_detect(struct drm_encoder *encoder, · 317 unmodified lines
1416	return found;	1422	return found;
1417	}	1423	}
1418		1424
		1425	static bool radeon_legacy_ext_dac_detect(struct drm_encoder *encoder,
		1426	struct drm_connector *connector)
		1427	{
		1428	struct drm_device *dev = encoder->dev;
		1429	struct radeon_device *rdev = dev->dev_private;
		1430	uint32_t gpio_monid, fp2_gen_cntl, disp_output_cntl, crtc2_gen_cntl;
		1431	uint32_t disp_lin_trans_grph_a, disp_lin_trans_grph_b, disp_lin_trans_grph_c;
		1432	uint32_t disp_lin_trans_grph_d, disp_lin_trans_grph_e, disp_lin_trans_grph_f;
		1433	uint32_t tmp, crtc2_h_total_disp, crtc2_v_total_disp;
		1434	uint32_t crtc2_h_sync_strt_wid, crtc2_v_sync_strt_wid;
		1435	bool found = false;
		1436	int i;
		1437
		1438	/* save the regs we need */
		1439	gpio_monid = RREG32(RADEON_GPIO_MONID);
		1440	fp2_gen_cntl = RREG32(RADEON_FP2_GEN_CNTL);
		1441	disp_output_cntl = RREG32(RADEON_DISP_OUTPUT_CNTL);
		1442	crtc2_gen_cntl = RREG32(RADEON_CRTC2_GEN_CNTL);
		1443	disp_lin_trans_grph_a = RREG32(RADEON_DISP_LIN_TRANS_GRPH_A);
		1444	disp_lin_trans_grph_b = RREG32(RADEON_DISP_LIN_TRANS_GRPH_B);
		1445	disp_lin_trans_grph_c = RREG32(RADEON_DISP_LIN_TRANS_GRPH_C);
		1446	disp_lin_trans_grph_d = RREG32(RADEON_DISP_LIN_TRANS_GRPH_D);
		1447	disp_lin_trans_grph_e = RREG32(RADEON_DISP_LIN_TRANS_GRPH_E);
		1448	disp_lin_trans_grph_f = RREG32(RADEON_DISP_LIN_TRANS_GRPH_F);
		1449	crtc2_h_total_disp = RREG32(RADEON_CRTC2_H_TOTAL_DISP);
		1450	crtc2_v_total_disp = RREG32(RADEON_CRTC2_V_TOTAL_DISP);
		1451	crtc2_h_sync_strt_wid = RREG32(RADEON_CRTC2_H_SYNC_STRT_WID);
		1452	crtc2_v_sync_strt_wid = RREG32(RADEON_CRTC2_V_SYNC_STRT_WID);
		1453
		1454	tmp = RREG32(RADEON_GPIO_MONID);
		1455	tmp &= ~RADEON_GPIO_A_0;
		1456	WREG32(RADEON_GPIO_MONID, tmp);
		1457
		1458	WREG32(RADEON_FP2_GEN_CNTL, (RADEON_FP2_ON \|
		1459	RADEON_FP2_PANEL_FORMAT \|
		1460	R200_FP2_SOURCE_SEL_TRANS_UNIT \|
		1461	RADEON_FP2_DVO_EN \|
		1462	R200_FP2_DVO_RATE_SEL_SDR));
		1463
		1464	WREG32(RADEON_DISP_OUTPUT_CNTL, (RADEON_DISP_DAC_SOURCE_RMX \|
		1465	RADEON_DISP_TRANS_MATRIX_GRAPHICS));
		1466
		1467	WREG32(RADEON_CRTC2_GEN_CNTL, (RADEON_CRTC2_EN \|
		1468	RADEON_CRTC2_DISP_REQ_EN_B));
		1469
		1470	WREG32(RADEON_DISP_LIN_TRANS_GRPH_A, 0x00000000);
		1471	WREG32(RADEON_DISP_LIN_TRANS_GRPH_B, 0x000003f0);
		1472	WREG32(RADEON_DISP_LIN_TRANS_GRPH_C, 0x00000000);
		1473	WREG32(RADEON_DISP_LIN_TRANS_GRPH_D, 0x000003f0);
		1474	WREG32(RADEON_DISP_LIN_TRANS_GRPH_E, 0x00000000);
		1475	WREG32(RADEON_DISP_LIN_TRANS_GRPH_F, 0x000003f0);
		1476
		1477	WREG32(RADEON_CRTC2_H_TOTAL_DISP, 0x01000008);
		1478	WREG32(RADEON_CRTC2_H_SYNC_STRT_WID, 0x00000800);
		1479	WREG32(RADEON_CRTC2_V_TOTAL_DISP, 0x00080001);
		1480	WREG32(RADEON_CRTC2_V_SYNC_STRT_WID, 0x00000080);
		1481
		1482	for (i = 0; i < 200; i++) {
		1483	tmp = RREG32(RADEON_GPIO_MONID);
		1484	if (tmp & RADEON_GPIO_Y_0)
		1485	found = true;
		1486
		1487	if (found)
		1488	break;
		1489
		1490	if (!drm_can_sleep())
		1491	mdelay(1);
		1492	else
		1493	msleep(1);
		1494	}
		1495
		1496	/* restore the regs we used */
		1497	WREG32(RADEON_DISP_LIN_TRANS_GRPH_A, disp_lin_trans_grph_a);
		1498	WREG32(RADEON_DISP_LIN_TRANS_GRPH_B, disp_lin_trans_grph_b);
		1499	WREG32(RADEON_DISP_LIN_TRANS_GRPH_C, disp_lin_trans_grph_c);
		1500	WREG32(RADEON_DISP_LIN_TRANS_GRPH_D, disp_lin_trans_grph_d);
		1501	WREG32(RADEON_DISP_LIN_TRANS_GRPH_E, disp_lin_trans_grph_e);
		1502	WREG32(RADEON_DISP_LIN_TRANS_GRPH_F, disp_lin_trans_grph_f);
		1503	WREG32(RADEON_CRTC2_H_TOTAL_DISP, crtc2_h_total_disp);
		1504	WREG32(RADEON_CRTC2_V_TOTAL_DISP, crtc2_v_total_disp);
		1505	WREG32(RADEON_CRTC2_H_SYNC_STRT_WID, crtc2_h_sync_strt_wid);
		1506	WREG32(RADEON_CRTC2_V_SYNC_STRT_WID, crtc2_v_sync_strt_wid);
		1507	WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl);
		1508	WREG32(RADEON_DISP_OUTPUT_CNTL, disp_output_cntl);
		1509	WREG32(RADEON_FP2_GEN_CNTL, fp2_gen_cntl);
		1510	WREG32(RADEON_GPIO_MONID, gpio_monid);
		1511
		1512	return found;
		1513	}
		1514
1419	static enum drm_connector_status radeon_legacy_tv_dac_detect(struct drm_encoder *encoder,	1515	static enum drm_connector_status radeon_legacy_tv_dac_detect(struct drm_encoder *encoder,
1420	struct drm_connector *connector)	1516	struct drm_connector *connector)
1421	{	1517	{
1422	struct drm_device *dev = encoder->dev;	1518	struct drm_device *dev = encoder->dev;
1423	struct radeon_device *rdev = dev->dev_private;	1519	struct radeon_device *rdev = dev->dev_private;
1424	uint32_t crtc2_gen_cntl, tv_dac_cntl, dac_cntl2, dac_ext_cntl;	1520	uint32_t crtc2_gen_cntl = 0, tv_dac_cntl, dac_cntl2, dac_ext_cntl;
1425	uint32_t disp_hw_debug, disp_output_cntl, gpiopad_a, pixclks_cntl, tmp;	1521	uint32_t gpiopad_a = 0, pixclks_cntl, tmp;
		1522	uint32_t disp_output_cntl = 0, disp_hw_debug = 0, crtc_ext_cntl = 0;
1426	enum drm_connector_status found = connector_status_disconnected;	1523	enum drm_connector_status found = connector_status_disconnected;
1427	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);	1524	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1428	struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv;	1525	struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv;
@@ -1459,12 +1556,27 @@ static enum drm_connector_status radeon_legacy_tv_dac_detect(struct drm_encoder · 30 unmodified lines
1459	return connector_status_disconnected;	1556	return connector_status_disconnected;
1460	}	1557	}
1461		1558
		1559	/* R200 uses an external DAC for secondary DAC */
		1560	if (rdev->family == CHIP_R200) {
		1561	if (radeon_legacy_ext_dac_detect(encoder, connector))
		1562	found = connector_status_connected;
		1563	return found;
		1564	}
		1565
1462	/* save the regs we need */	1566	/* save the regs we need */
1463	pixclks_cntl = RREG32_PLL(RADEON_PIXCLKS_CNTL);	1567	pixclks_cntl = RREG32_PLL(RADEON_PIXCLKS_CNTL);
1464	gpiopad_a = ASIC_IS_R300(rdev) ? RREG32(RADEON_GPIOPAD_A) : 0;	1568
1465	disp_output_cntl = ASIC_IS_R300(rdev) ? RREG32(RADEON_DISP_OUTPUT_CNTL) : 0;	1569	if (rdev->flags & RADEON_SINGLE_CRTC) {
1466	disp_hw_debug = ASIC_IS_R300(rdev) ? 0 : RREG32(RADEON_DISP_HW_DEBUG);	1570	crtc_ext_cntl = RREG32(RADEON_CRTC_EXT_CNTL);
1467	crtc2_gen_cntl = RREG32(RADEON_CRTC2_GEN_CNTL);	1571	} else {
		1572	if (ASIC_IS_R300(rdev)) {
		1573	gpiopad_a = RREG32(RADEON_GPIOPAD_A);
		1574	disp_output_cntl = RREG32(RADEON_DISP_OUTPUT_CNTL);
		1575	} else {
		1576	disp_hw_debug = RREG32(RADEON_DISP_HW_DEBUG);
		1577	}
		1578	crtc2_gen_cntl = RREG32(RADEON_CRTC2_GEN_CNTL);
		1579	}
1468	tv_dac_cntl = RREG32(RADEON_TV_DAC_CNTL);	1580	tv_dac_cntl = RREG32(RADEON_TV_DAC_CNTL);
1469	dac_ext_cntl = RREG32(RADEON_DAC_EXT_CNTL);	1581	dac_ext_cntl = RREG32(RADEON_DAC_EXT_CNTL);
1470	dac_cntl2 = RREG32(RADEON_DAC_CNTL2);	1582	dac_cntl2 = RREG32(RADEON_DAC_CNTL2);
@@ -1473,22 +1585,24 @@ static enum drm_connector_status radeon_legacy_tv_dac_detect(struct drm_encoder · 2 unmodified lines
1473	\| RADEON_PIX2CLK_DAC_ALWAYS_ONb);	1585	\| RADEON_PIX2CLK_DAC_ALWAYS_ONb);
1474	WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp);	1586	WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp);
1475		1587
1476	if (ASIC_IS_R300(rdev))	1588	if (rdev->flags & RADEON_SINGLE_CRTC) {
1477	WREG32_P(RADEON_GPIOPAD_A, 1, ~1);	1589	tmp = crtc_ext_cntl \| RADEON_CRTC_CRT_ON;
1478		1590	WREG32(RADEON_CRTC_EXT_CNTL, tmp);
1479	tmp = crtc2_gen_cntl & ~RADEON_CRTC2_PIX_WIDTH_MASK;
1480	tmp \|= RADEON_CRTC2_CRT2_ON \|
1481	(2 << RADEON_CRTC2_PIX_WIDTH_SHIFT);
1482
1483	WREG32(RADEON_CRTC2_GEN_CNTL, tmp);
1484
1485	if (ASIC_IS_R300(rdev)) {
1486	tmp = disp_output_cntl & ~RADEON_DISP_TVDAC_SOURCE_MASK;
1487	tmp \|= RADEON_DISP_TVDAC_SOURCE_CRTC2;
1488	WREG32(RADEON_DISP_OUTPUT_CNTL, tmp);
1489	} else {	1591	} else {
1490	tmp = disp_hw_debug & ~RADEON_CRT2_DISP1_SEL;	1592	tmp = crtc2_gen_cntl & ~RADEON_CRTC2_PIX_WIDTH_MASK;
1491	WREG32(RADEON_DISP_HW_DEBUG, tmp);	1593	tmp \|= RADEON_CRTC2_CRT2_ON \|
		1594	(2 << RADEON_CRTC2_PIX_WIDTH_SHIFT);
		1595	WREG32(RADEON_CRTC2_GEN_CNTL, tmp);
		1596
		1597	if (ASIC_IS_R300(rdev)) {
		1598	WREG32_P(RADEON_GPIOPAD_A, 1, ~1);
		1599	tmp = disp_output_cntl & ~RADEON_DISP_TVDAC_SOURCE_MASK;
		1600	tmp \|= RADEON_DISP_TVDAC_SOURCE_CRTC2;
		1601	WREG32(RADEON_DISP_OUTPUT_CNTL, tmp);
		1602	} else {
		1603	tmp = disp_hw_debug & ~RADEON_CRT2_DISP1_SEL;
		1604	WREG32(RADEON_DISP_HW_DEBUG, tmp);
		1605	}
1492	}	1606	}
1493		1607
1494	tmp = RADEON_TV_DAC_NBLANK \|	1608	tmp = RADEON_TV_DAC_NBLANK \|
@@ -1530,14 +1644,19 @@ static enum drm_connector_status radeon_legacy_tv_dac_detect(struct drm_encoder · 35 unmodified lines
1530	WREG32(RADEON_DAC_CNTL2, dac_cntl2);	1644	WREG32(RADEON_DAC_CNTL2, dac_cntl2);
1531	WREG32(RADEON_DAC_EXT_CNTL, dac_ext_cntl);	1645	WREG32(RADEON_DAC_EXT_CNTL, dac_ext_cntl);
1532	WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl);	1646	WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl);
1533	WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl);
1534		1647
1535	if (ASIC_IS_R300(rdev)) {	1648	if (rdev->flags & RADEON_SINGLE_CRTC) {
1536	WREG32(RADEON_DISP_OUTPUT_CNTL, disp_output_cntl);	1649	WREG32(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl);
1537	WREG32_P(RADEON_GPIOPAD_A, gpiopad_a, ~1);
1538	} else {	1650	} else {
1539	WREG32(RADEON_DISP_HW_DEBUG, disp_hw_debug);	1651	WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl);
		1652	if (ASIC_IS_R300(rdev)) {
		1653	WREG32(RADEON_DISP_OUTPUT_CNTL, disp_output_cntl);
		1654	WREG32_P(RADEON_GPIOPAD_A, gpiopad_a, ~1);
		1655	} else {
		1656	WREG32(RADEON_DISP_HW_DEBUG, disp_hw_debug);
		1657	}
1540	}	1658	}
		1659
1541	WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl);	1660	WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl);
1542		1661
1543	return found;	1662	return found;

drivers/gpu/drm/radeon/si.c+1−0

@@ -2474,6 +2474,7 @@ static bool si_vm_reg_valid(u32 reg) · 2473 unmodified lines
2474	/* check config regs */	2474	/* check config regs */
2475	switch (reg) {	2475	switch (reg) {
2476	case GRBM_GFX_INDEX:	2476	case GRBM_GFX_INDEX:
		2477	case CP_STRMOUT_CNTL:
2477	case VGT_VTX_VECT_EJECT_REG:	2478	case VGT_VTX_VECT_EJECT_REG:
2478	case VGT_CACHE_INVALIDATION:	2479	case VGT_CACHE_INVALIDATION:
2479	case VGT_ESGS_RING_SIZE:	2480	case VGT_ESGS_RING_SIZE:

drivers/gpu/drm/radeon/sid.h+1−0

@@ -424,6 +424,7 @@ · 423 unmodified lines
424	# define RDERR_INT_ENABLE (1 << 0)	424	# define RDERR_INT_ENABLE (1 << 0)
425	# define GUI_IDLE_INT_ENABLE (1 << 19)	425	# define GUI_IDLE_INT_ENABLE (1 << 19)
426		426
		427	#define CP_STRMOUT_CNTL 0x84FC
427	#define SCRATCH_REG0 0x8500	428	#define SCRATCH_REG0 0x8500
428	#define SCRATCH_REG1 0x8504	429	#define SCRATCH_REG1 0x8504
429	#define SCRATCH_REG2 0x8508	430	#define SCRATCH_REG2 0x8508

drivers/gpu/drm/ttm/ttm_page_alloc.c+4−1

 	/* clear the pages coming from the pool if requested */
 	if (flags & TTM_PAGE_FLAG_ZERO_ALLOC) {
 		list_for_each_entry(p, &plist, lru) {
-			clear_page(page_address(p));
+			if (PageHighMem(p))
+				clear_highpage(p);
+			else
+				clear_page(page_address(p));
 		}
 	}

drivers/gpu/drm/ttm/ttm_tt.c+0−4

 		if (unlikely(to_page == NULL))
 			goto out_err;
-		preempt_disable();
 		copy_highpage(to_page, from_page);
-		preempt_enable();
 		page_cache_release(from_page);
 	}
 			ret = PTR_ERR(to_page);
 			goto out_err;
 		}
-		preempt_disable();
 		copy_highpage(to_page, from_page);
-		preempt_enable();
 		set_page_dirty(to_page);
 		mark_page_accessed(to_page);
 		page_cache_release(to_page);

drivers/gpu/drm/udl/udl_drv.h+1−1

@@ -104,7 +104,7 @@ udl_fb_user_fb_create(struct drm_device *dev, · 103 unmodified lines
104		104
105	int udl_render_hline(struct drm_device dev, int bpp, struct urb *urb_ptr,	105	int udl_render_hline(struct drm_device dev, int bpp, struct urb *urb_ptr,
106	const char front, char *urb_buf_ptr,	106	const char front, char *urb_buf_ptr,
107	u32 byte_offset, u32 byte_width,	107	u32 byte_offset, u32 device_byte_offset, u32 byte_width,
108	int ident_ptr, int sent_ptr);	108	int ident_ptr, int sent_ptr);
109		109
110	int udl_dumb_create(struct drm_file *file_priv,	110	int udl_dumb_create(struct drm_file *file_priv,

drivers/gpu/drm/udl/udl_fb.c+7−5

@@ -114,9 +114,10 @@ static void udlfb_dpy_deferred_io(struct fb_info *info, · 113 unmodified lines
114	list_for_each_entry(cur, &fbdefio->pagelist, lru) {	114	list_for_each_entry(cur, &fbdefio->pagelist, lru) {
115		115
116	if (udl_render_hline(dev, (ufbdev->ufb.base.bits_per_pixel / 8),	116	if (udl_render_hline(dev, (ufbdev->ufb.base.bits_per_pixel / 8),
117	&urb, (char *) info->fix.smem_start,	117	&urb, (char *) info->fix.smem_start,
118	&cmd, cur->index << PAGE_SHIFT,	118	&cmd, cur->index << PAGE_SHIFT,
119	PAGE_SIZE, &bytes_identical, &bytes_sent))	119	cur->index << PAGE_SHIFT,
		120	PAGE_SIZE, &bytes_identical, &bytes_sent))
120	goto error;	121	goto error;
121	bytes_rendered += PAGE_SIZE;	122	bytes_rendered += PAGE_SIZE;
122	}	123	}
@@ -187,10 +188,11 @@ int udl_handle_damage(struct udl_framebuffer *fb, int x, int y, · 64 unmodified lines
187	for (i = y; i < y + height ; i++) {	188	for (i = y; i < y + height ; i++) {
188	const int line_offset = fb->base.pitches[0] * i;	189	const int line_offset = fb->base.pitches[0] * i;
189	const int byte_offset = line_offset + (x * bpp);	190	const int byte_offset = line_offset + (x * bpp);
190		191	const int dev_byte_offset = (fb->base.width * bpp * i) + (x * bpp);
191	if (udl_render_hline(dev, bpp, &urb,	192	if (udl_render_hline(dev, bpp, &urb,
192	(char *) fb->obj->vmapping,	193	(char *) fb->obj->vmapping,
193	&cmd, byte_offset, width * bpp,	194	&cmd, byte_offset, dev_byte_offset,
		195	width * bpp,
194	&bytes_identical, &bytes_sent))	196	&bytes_identical, &bytes_sent))
195	goto error;	197	goto error;
196	}	198	}

drivers/gpu/drm/udl/udl_transfer.c+3−2

  */
 int udl_render_hline(struct drm_device *dev, int bpp, struct urb **urb_ptr,
 		     const char *front, char **urb_buf_ptr,
-		     u32 byte_offset, u32 byte_width,
+		     u32 byte_offset, u32 device_byte_offset,
+		     u32 byte_width,
 		     int *ident_ptr, int *sent_ptr)
 {
 	const u8 *line_start, *line_end, *next_pixel;
-	u32 base16 = 0 + (byte_offset / bpp) * 2;
+	u32 base16 = 0 + (device_byte_offset / bpp) * 2;
 	struct urb *urb = *urb_ptr;
 	u8 *cmd = *urb_buf_ptr;
 	u8 *cmd_end = (u8 *) urb->transfer_buffer + urb->transfer_buffer_length;

drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c+1−1

@@ -306,7 +306,7 @@ void vmw_bo_pin(struct ttm_buffer_object *bo, bool pin) · 305 unmodified lines
306		306
307	BUG_ON(!atomic_read(&bo->reserved));	307	BUG_ON(!atomic_read(&bo->reserved));
308	BUG_ON(old_mem_type != TTM_PL_VRAM &&	308	BUG_ON(old_mem_type != TTM_PL_VRAM &&
309	old_mem_type != VMW_PL_FLAG_GMR);	309	old_mem_type != VMW_PL_GMR);
310		310
311	pl_flags = TTM_PL_FLAG_VRAM \| VMW_PL_FLAG_GMR \| TTM_PL_FLAG_CACHED;	311	pl_flags = TTM_PL_FLAG_VRAM \| VMW_PL_FLAG_GMR \| TTM_PL_FLAG_CACHED;
312	if (pin)	312	if (pin)

drivers/gpu/drm/vmwgfx/vmwgfx_drv.c+5−0

 	struct drm_device *dev = pci_get_drvdata(pdev);
 	struct vmw_private *dev_priv = vmw_priv(dev);
+	mutex_lock(&dev_priv->hw_mutex);
+	vmw_write(dev_priv, SVGA_REG_ID, SVGA_ID_2);
+	(void) vmw_read(dev_priv, SVGA_REG_ID);
+	mutex_unlock(&dev_priv->hw_mutex);
 	/**
 	 * Reclaim 3d reference held by fbdev and potentially
 	 * start fifo.

drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c+2−0

@@ -110,6 +110,8 @@ int vmw_get_cap_3d_ioctl(struct drm_device dev, void data, · 109 unmodified lines
110	memcpy_fromio(bounce, &fifo_mem[SVGA_FIFO_3D_CAPS], size);	110	memcpy_fromio(bounce, &fifo_mem[SVGA_FIFO_3D_CAPS], size);
111		111
112	ret = copy_to_user(buffer, bounce, size);	112	ret = copy_to_user(buffer, bounce, size);
		113	if (ret)
		114	ret = -EFAULT;
113	vfree(bounce);	115	vfree(bounce);
114		116
115	if (unlikely(ret != 0))	117	if (unlikely(ret != 0))

drivers/hid/hid-microsoft.c+3−3

@@ -46,9 +46,9 @@ static __u8 ms_report_fixup(struct hid_device hdev, __u8 *rdesc, · 45 unmodified lines
46	rdesc[559] = 0x45;	46	rdesc[559] = 0x45;
47	}	47	}
48	/* the same as above (s/usage/physical/) */	48	/* the same as above (s/usage/physical/) */
49	if ((quirks & MS_RDESC_3K) && *rsize == 106 &&	49	if ((quirks & MS_RDESC_3K) && *rsize == 106 && rdesc[94] == 0x19 &&
50	!memcmp((char []){ 0x19, 0x00, 0x29, 0xff },	50	rdesc[95] == 0x00 && rdesc[96] == 0x29 &&
51	&rdesc[94], 4)) {	51	rdesc[97] == 0xff) {
52	rdesc[94] = 0x35;	52	rdesc[94] = 0x35;
53	rdesc[96] = 0x45;	53	rdesc[96] = 0x45;
54	}	54	}

drivers/hid/hidraw.c+43−26

@@ -42,7 +42,6 @@ static struct cdev hidraw_cdev; · 41 unmodified lines
42	static struct class *hidraw_class;	42	static struct class *hidraw_class;
43	static struct hidraw *hidraw_table[HIDRAW_MAX_DEVICES];	43	static struct hidraw *hidraw_table[HIDRAW_MAX_DEVICES];
44	static DEFINE_MUTEX(minors_lock);	44	static DEFINE_MUTEX(minors_lock);
45	static void drop_ref(struct hidraw *hid, int exists_bit);
46		45
47	static ssize_t hidraw_read(struct file file, char __user buffer, size_t count, loff_t *ppos)	46	static ssize_t hidraw_read(struct file file, char __user buffer, size_t count, loff_t *ppos)
48	{	47	{
@@ -114,7 +113,7 @@ static ssize_t hidraw_send_report(struct file file, const char __user buffer, · 65 unmodified lines
114	__u8 *buf;	113	__u8 *buf;
115	int ret = 0;	114	int ret = 0;
116		115
117	if (!hidraw_table[minor] \|\| !hidraw_table[minor]->exist) {	116	if (!hidraw_table[minor]) {
118	ret = -ENODEV;	117	ret = -ENODEV;
119	goto out;	118	goto out;
120	}	119	}
@@ -262,7 +261,7 @@ static int hidraw_open(struct inode inode, struct file file) · 141 unmodified lines
262	}	261	}
263		262
264	mutex_lock(&minors_lock);	263	mutex_lock(&minors_lock);
265	if (!hidraw_table[minor] \|\| !hidraw_table[minor]->exist) {	264	if (!hidraw_table[minor]) {
266	err = -ENODEV;	265	err = -ENODEV;
267	goto out_unlock;	266	goto out_unlock;
268	}	267	}
@@ -299,12 +298,36 @@ out: · 30 unmodified lines
299	static int hidraw_release(struct inode * inode, struct file * file)	298	static int hidraw_release(struct inode * inode, struct file * file)
300	{	299	{
301	unsigned int minor = iminor(inode);	300	unsigned int minor = iminor(inode);
		301	struct hidraw *dev;
302	struct hidraw_list *list = file->private_data;	302	struct hidraw_list *list = file->private_data;
		303	int ret;
		304	int i;
		305
		306	mutex_lock(&minors_lock);
		307	if (!hidraw_table[minor]) {
		308	ret = -ENODEV;
		309	goto unlock;
		310	}
303		311
304	drop_ref(hidraw_table[minor], 0);
305	list_del(&list->node);	312	list_del(&list->node);
		313	dev = hidraw_table[minor];
		314	if (!--dev->open) {
		315	if (list->hidraw->exist) {
		316	hid_hw_power(dev->hid, PM_HINT_NORMAL);
		317	hid_hw_close(dev->hid);
		318	} else {
		319	kfree(list->hidraw);
		320	}
		321	}
		322
		323	for (i = 0; i < HIDRAW_BUFFER_SIZE; ++i)
		324	kfree(list->buffer[i].value);
306	kfree(list);	325	kfree(list);
307	return 0;	326	ret = 0;
		327	unlock:
		328	mutex_unlock(&minors_lock);
		329
		330	return ret;
308	}	331	}
309		332
310	static long hidraw_ioctl(struct file *file, unsigned int cmd,	333	static long hidraw_ioctl(struct file *file, unsigned int cmd,
@@ -506,7 +529,21 @@ EXPORT_SYMBOL_GPL(hidraw_connect); · 195 unmodified lines
506	void hidraw_disconnect(struct hid_device *hid)	529	void hidraw_disconnect(struct hid_device *hid)
507	{	530	{
508	struct hidraw *hidraw = hid->hidraw;	531	struct hidraw *hidraw = hid->hidraw;
509	drop_ref(hidraw, 1);	532
		533	mutex_lock(&minors_lock);
		534	hidraw->exist = 0;
		535
		536	device_destroy(hidraw_class, MKDEV(hidraw_major, hidraw->minor));
		537
		538	hidraw_table[hidraw->minor] = NULL;
		539
		540	if (hidraw->open) {
		541	hid_hw_close(hid);
		542	wake_up_interruptible(&hidraw->wait);
		543	} else {
		544	kfree(hidraw);
		545	}
		546	mutex_unlock(&minors_lock);
510	}	547	}
511	EXPORT_SYMBOL_GPL(hidraw_disconnect);	548	EXPORT_SYMBOL_GPL(hidraw_disconnect);
512		549
@@ -555,23 +592,3 @@ void hidraw_exit(void) · 42 unmodified lines
555	unregister_chrdev_region(dev_id, HIDRAW_MAX_DEVICES);	592	unregister_chrdev_region(dev_id, HIDRAW_MAX_DEVICES);
556		593
557	}	594	}
558
559	static void drop_ref(struct hidraw *hidraw, int exists_bit)
560	{
561	mutex_lock(&minors_lock);
562	if (exists_bit) {
563	hid_hw_close(hidraw->hid);
564	hidraw->exist = 0;
565	if (hidraw->open)
566	wake_up_interruptible(&hidraw->wait);
567	} else {
568	--hidraw->open;
569	}
570
571	if (!hidraw->open && !hidraw->exist) {
572	device_destroy(hidraw_class, MKDEV(hidraw_major, hidraw->minor));
573	hidraw_table[hidraw->minor] = NULL;
574	kfree(hidraw);
575	}
576	mutex_unlock(&minors_lock);
577	}

drivers/hwmon/asb100.c+1−1

@@ -32,7 +32,7 @@ · 31 unmodified lines
32	* ASB100-A supports pwm1, while plain ASB100 does not. There is no known	32	* ASB100-A supports pwm1, while plain ASB100 does not. There is no known
33	* way for the driver to tell which one is there.	33	* way for the driver to tell which one is there.
34	*	34	*
35	* Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA	35	* Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
36	* asb100 7 3 1 4 0x31 0x0694 yes no	36	* asb100 7 3 1 4 0x31 0x0694 yes no
37	*/	37	*/
38		38

drivers/hwmon/w83627ehf.c+1−0

@@ -2083,6 +2083,7 @@ static int __devinit w83627ehf_probe(struct platform_device *pdev) · 2082 unmodified lines
2083	mutex_init(&data->lock);	2083	mutex_init(&data->lock);
2084	mutex_init(&data->update_lock);	2084	mutex_init(&data->update_lock);
2085	data->name = w83627ehf_device_names[sio_data->kind];	2085	data->name = w83627ehf_device_names[sio_data->kind];
		2086	data->bank = 0xff; /* Force initial bank selection */
2086	platform_set_drvdata(pdev, data);	2087	platform_set_drvdata(pdev, data);
2087		2088
2088	/* 627EHG and 627EHF have 10 voltage inputs; 627DHG and 667HG have 9 */	2089	/* 627EHG and 627EHF have 10 voltage inputs; 627DHG and 667HG have 9 */

drivers/hwmon/w83627hf.c+1−1

@@ -25,7 +25,7 @@ · 24 unmodified lines
25	/*	25	/*
26	* Supports following chips:	26	* Supports following chips:
27	*	27	*
28	* Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA	28	* Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
29	* w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC)	29	* w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC)
30	* w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)	30	* w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
31	* w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC)	31	* w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC)

drivers/hwmon/w83781d.c+1−1

@@ -24,7 +24,7 @@ · 23 unmodified lines
24	/*	24	/*
25	* Supports following chips:	25	* Supports following chips:
26	*	26	*
27	* Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA	27	* Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
28	* as99127f 7 3 0 3 0x31 0x12c3 yes no	28	* as99127f 7 3 0 3 0x31 0x12c3 yes no
29	* as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no	29	* as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
30	* w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes	30	* w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes

drivers/hwmon/w83791d.c+1−1

@@ -22,7 +22,7 @@ · 21 unmodified lines
22	/*	22	/*
23	* Supports following chips:	23	* Supports following chips:
24	*	24	*
25	* Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA	25	* Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
26	* w83791d 10 5 5 3 0x71 0x5ca3 yes no	26	* w83791d 10 5 5 3 0x71 0x5ca3 yes no
27	*	27	*
28	* The w83791d chip appears to be part way between the 83781d and the	28	* The w83791d chip appears to be part way between the 83781d and the

drivers/hwmon/w83792d.c+1−1

@@ -31,7 +31,7 @@ · 30 unmodified lines
31	/*	31	/*
32	* Supports following chips:	32	* Supports following chips:
33	*	33	*
34	* Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA	34	* Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
35	* w83792d 9 7 7 3 0x7a 0x5ca3 yes no	35	* w83792d 9 7 7 3 0x7a 0x5ca3 yes no
36	*/	36	*/
37		37

drivers/hwmon/w83l786ng.c+1−1

@@ -20,7 +20,7 @@ · 19 unmodified lines
20	/*	20	/*
21	* Supports following chips:	21	* Supports following chips:
22	*	22	*
23	* Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA	23	* Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
24	* w83l786ng 3 2 2 2 0x7b 0x5ca3 yes no	24	* w83l786ng 3 2 2 2 0x7b 0x5ca3 yes no
25	*/	25	*/
26		26

drivers/i2c/busses/i2c-mxs.c+14−172

@@ -1,7 +1,7 @@
1	/*	1	/*
2	* Freescale MXS I2C bus driver	2	* Freescale MXS I2C bus driver
3	*	3	*
4	* Copyright (C) 2011 Wolfram Sang, Pengutronix e.K.	4	* Copyright (C) 2011-2012 Wolfram Sang, Pengutronix e.K.
5	*	5	*
6	* based on a (non-working) driver which was:	6	* based on a (non-working) driver which was:
7	*	7	*
@@ -35,10 +35,6 @@ · 27 unmodified lines
35		35
36	#define DRIVER_NAME "mxs-i2c"	36	#define DRIVER_NAME "mxs-i2c"
37		37
38	static bool use_pioqueue;
39	module_param(use_pioqueue, bool, 0);
40	MODULE_PARM_DESC(use_pioqueue, "Use PIOQUEUE mode for transfer instead of DMA");
41
42	#define MXS_I2C_CTRL0 (0x00)	38	#define MXS_I2C_CTRL0 (0x00)
43	#define MXS_I2C_CTRL0_SET (0x04)	39	#define MXS_I2C_CTRL0_SET (0x04)
44		40
@@ -75,23 +71,6 @@ MODULE_PARM_DESC(use_pioqueue, "Use PIOQUEUE mode for transfer instead of DMA"); · 30 unmodified lines
75	MXS_I2C_CTRL1_SLAVE_STOP_IRQ \| \	71	MXS_I2C_CTRL1_SLAVE_STOP_IRQ \| \
76	MXS_I2C_CTRL1_SLAVE_IRQ)	72	MXS_I2C_CTRL1_SLAVE_IRQ)
77		73
78	#define MXS_I2C_QUEUECTRL (0x60)
79	#define MXS_I2C_QUEUECTRL_SET (0x64)
80	#define MXS_I2C_QUEUECTRL_CLR (0x68)
81
82	#define MXS_I2C_QUEUECTRL_QUEUE_RUN 0x20
83	#define MXS_I2C_QUEUECTRL_PIO_QUEUE_MODE 0x04
84
85	#define MXS_I2C_QUEUESTAT (0x70)
86	#define MXS_I2C_QUEUESTAT_RD_QUEUE_EMPTY 0x00002000
87	#define MXS_I2C_QUEUESTAT_WRITE_QUEUE_CNT_MASK 0x0000001F
88
89	#define MXS_I2C_QUEUECMD (0x80)
90
91	#define MXS_I2C_QUEUEDATA (0x90)
92
93	#define MXS_I2C_DATA (0xa0)
94
95		74
96	#define MXS_CMD_I2C_SELECT (MXS_I2C_CTRL0_RETAIN_CLOCK \| \	75	#define MXS_CMD_I2C_SELECT (MXS_I2C_CTRL0_RETAIN_CLOCK \| \
97	MXS_I2C_CTRL0_PRE_SEND_START \| \	76	MXS_I2C_CTRL0_PRE_SEND_START \| \
@@ -153,7 +132,6 @@ struct mxs_i2c_dev { · 55 unmodified lines
153	const struct mxs_i2c_speed_config *speed;	132	const struct mxs_i2c_speed_config *speed;
154		133
155	/* DMA support components */	134	/* DMA support components */
156	bool dma_mode;
157	int dma_channel;	135	int dma_channel;
158	struct dma_chan *dmach;	136	struct dma_chan *dmach;
159	struct mxs_dma_data dma_data;	137	struct mxs_dma_data dma_data;
@@ -172,99 +150,6 @@ static void mxs_i2c_reset(struct mxs_i2c_dev *i2c) · 12 unmodified lines
172	writel(i2c->speed->timing2, i2c->regs + MXS_I2C_TIMING2);	150	writel(i2c->speed->timing2, i2c->regs + MXS_I2C_TIMING2);
173		151
174	writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_SET);	152	writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_SET);
175	if (i2c->dma_mode)
176	writel(MXS_I2C_QUEUECTRL_PIO_QUEUE_MODE,
177	i2c->regs + MXS_I2C_QUEUECTRL_CLR);
178	else
179	writel(MXS_I2C_QUEUECTRL_PIO_QUEUE_MODE,
180	i2c->regs + MXS_I2C_QUEUECTRL_SET);
181	}
182
183	static void mxs_i2c_pioq_setup_read(struct mxs_i2c_dev *i2c, u8 addr, int len,
184	int flags)
185	{
186	u32 data;
187
188	writel(MXS_CMD_I2C_SELECT, i2c->regs + MXS_I2C_QUEUECMD);
189
190	data = (addr << 1) \| I2C_SMBUS_READ;
191	writel(data, i2c->regs + MXS_I2C_DATA);
192
193	data = MXS_CMD_I2C_READ \| MXS_I2C_CTRL0_XFER_COUNT(len) \| flags;
194	writel(data, i2c->regs + MXS_I2C_QUEUECMD);
195	}
196
197	static void mxs_i2c_pioq_setup_write(struct mxs_i2c_dev *i2c,
198	u8 addr, u8 *buf, int len, int flags)
199	{
200	u32 data;
201	int i, shifts_left;
202
203	data = MXS_CMD_I2C_WRITE \| MXS_I2C_CTRL0_XFER_COUNT(len + 1) \| flags;
204	writel(data, i2c->regs + MXS_I2C_QUEUECMD);
205
206	/*
207	* We have to copy the slave address (u8) and buffer (arbitrary number
208	* of u8) into the data register (u32). To achieve that, the u8 are put
209	* into the MSBs of 'data' which is then shifted for the next u8. When
210	* appropriate, 'data' is written to MXS_I2C_DATA. So, the first u32
211	* looks like this:
212	*
213	* 3 2 1 0
214	* 10987654\|32109876\|54321098\|76543210
215	* --------+--------+--------+--------
216	* buffer+2\|buffer+1\|buffer+0\|slave_addr
217	*/
218
219	data = ((addr << 1) \| I2C_SMBUS_WRITE) << 24;
220
221	for (i = 0; i < len; i++) {
222	data >>= 8;
223	data \|= buf[i] << 24;
224	if ((i & 3) == 2)
225	writel(data, i2c->regs + MXS_I2C_DATA);
226	}
227
228	/* Write out the remaining bytes if any */
229	shifts_left = 24 - (i & 3) * 8;
230	if (shifts_left)
231	writel(data >> shifts_left, i2c->regs + MXS_I2C_DATA);
232	}
233
234	/*
235	* TODO: should be replaceable with a waitqueue and RD_QUEUE_IRQ (setting the
236	* rd_threshold to 1). Couldn't get this to work, though.
237	*/
238	static int mxs_i2c_wait_for_data(struct mxs_i2c_dev *i2c)
239	{
240	unsigned long timeout = jiffies + msecs_to_jiffies(1000);
241
242	while (readl(i2c->regs + MXS_I2C_QUEUESTAT)
243	& MXS_I2C_QUEUESTAT_RD_QUEUE_EMPTY) {
244	if (time_after(jiffies, timeout))
245	return -ETIMEDOUT;
246	cond_resched();
247	}
248
249	return 0;
250	}
251
252	static int mxs_i2c_finish_read(struct mxs_i2c_dev i2c, u8 buf, int len)
253	{
254	u32 uninitialized_var(data);
255	int i;
256
257	for (i = 0; i < len; i++) {
258	if ((i & 3) == 0) {
259	if (mxs_i2c_wait_for_data(i2c))
260	return -ETIMEDOUT;
261	data = readl(i2c->regs + MXS_I2C_QUEUEDATA);
262	}
263	buf[i] = data & 0xff;
264	data >>= 8;
265	}
266
267	return 0;
268	}	153	}
269		154
270	static void mxs_i2c_dma_finish(struct mxs_i2c_dev *i2c)	155	static void mxs_i2c_dma_finish(struct mxs_i2c_dev *i2c)
@@ -432,39 +317,17 @@ static int mxs_i2c_xfer_msg(struct i2c_adapter adap, struct i2c_msg msg, · 161 unmodified lines
432	init_completion(&i2c->cmd_complete);	317	init_completion(&i2c->cmd_complete);
433	i2c->cmd_err = 0;	318	i2c->cmd_err = 0;
434		319
435	if (i2c->dma_mode) {	320	ret = mxs_i2c_dma_setup_xfer(adap, msg, flags);
436	ret = mxs_i2c_dma_setup_xfer(adap, msg, flags);	321	if (ret)
437	if (ret)	322	return ret;
438	return ret;
439	} else {
440	if (msg->flags & I2C_M_RD) {
441	mxs_i2c_pioq_setup_read(i2c, msg->addr,
442	msg->len, flags);
443	} else {
444	mxs_i2c_pioq_setup_write(i2c, msg->addr, msg->buf,
445	msg->len, flags);
446	}
447
448	writel(MXS_I2C_QUEUECTRL_QUEUE_RUN,
449	i2c->regs + MXS_I2C_QUEUECTRL_SET);
450	}
451		323
452	ret = wait_for_completion_timeout(&i2c->cmd_complete,	324	ret = wait_for_completion_timeout(&i2c->cmd_complete,
453	msecs_to_jiffies(1000));	325	msecs_to_jiffies(1000));
454	if (ret == 0)	326	if (ret == 0)
455	goto timeout;	327	goto timeout;
456		328
457	if (!i2c->dma_mode && !i2c->cmd_err && (msg->flags & I2C_M_RD)) {
458	ret = mxs_i2c_finish_read(i2c, msg->buf, msg->len);
459	if (ret)
460	goto timeout;
461	}
462
463	if (i2c->cmd_err == -ENXIO)	329	if (i2c->cmd_err == -ENXIO)
464	mxs_i2c_reset(i2c);	330	mxs_i2c_reset(i2c);
465	else
466	writel(MXS_I2C_QUEUECTRL_QUEUE_RUN,
467	i2c->regs + MXS_I2C_QUEUECTRL_CLR);
468		331
469	dev_dbg(i2c->dev, "Done with err=%d\n", i2c->cmd_err);	332	dev_dbg(i2c->dev, "Done with err=%d\n", i2c->cmd_err);
470		333
@@ -472,8 +335,7 @@ static int mxs_i2c_xfer_msg(struct i2c_adapter adap, struct i2c_msg msg, · 1 unmodified line
472		335
473	timeout:	336	timeout:
474	dev_dbg(i2c->dev, "Timeout!\n");	337	dev_dbg(i2c->dev, "Timeout!\n");
475	if (i2c->dma_mode)	338	mxs_i2c_dma_finish(i2c);
476	mxs_i2c_dma_finish(i2c);
477	mxs_i2c_reset(i2c);	339	mxs_i2c_reset(i2c);
478	return -ETIMEDOUT;	340	return -ETIMEDOUT;
479	}	341	}
@@ -502,7 +364,6 @@ static irqreturn_t mxs_i2c_isr(int this_irq, void *dev_id) · 22 unmodified lines
502	{	364	{
503	struct mxs_i2c_dev *i2c = dev_id;	365	struct mxs_i2c_dev *i2c = dev_id;
504	u32 stat = readl(i2c->regs + MXS_I2C_CTRL1) & MXS_I2C_IRQ_MASK;	366	u32 stat = readl(i2c->regs + MXS_I2C_CTRL1) & MXS_I2C_IRQ_MASK;
505	bool is_last_cmd;
506		367
507	if (!stat)	368	if (!stat)
508	return IRQ_NONE;	369	return IRQ_NONE;
@@ -515,14 +376,6 @@ static irqreturn_t mxs_i2c_isr(int this_irq, void *dev_id) · 6 unmodified lines
515	/* MXS_I2C_CTRL1_OVERSIZE_XFER_TERM_IRQ is only for slaves */	376	/* MXS_I2C_CTRL1_OVERSIZE_XFER_TERM_IRQ is only for slaves */
516	i2c->cmd_err = -EIO;	377	i2c->cmd_err = -EIO;
517		378
518	if (!i2c->dma_mode) {
519	is_last_cmd = (readl(i2c->regs + MXS_I2C_QUEUESTAT) &
520	MXS_I2C_QUEUESTAT_WRITE_QUEUE_CNT_MASK) == 0;
521
522	if (is_last_cmd \|\| i2c->cmd_err)
523	complete(&i2c->cmd_complete);
524	}
525
526	writel(stat, i2c->regs + MXS_I2C_CTRL1_CLR);	379	writel(stat, i2c->regs + MXS_I2C_CTRL1_CLR);
527		380
528	return IRQ_HANDLED;	381	return IRQ_HANDLED;
@@ -555,15 +408,6 @@ static int mxs_i2c_get_ofdata(struct mxs_i2c_dev *i2c) · 26 unmodified lines
555	struct device_node *node = dev->of_node;	408	struct device_node *node = dev->of_node;
556	int ret;	409	int ret;
557		410
558	/*
559	* The MXS I2C DMA mode is prefered and enabled by default.
560	* The PIO mode is still supported, but should be used only
561	* for debuging purposes etc.
562	*/
563	i2c->dma_mode = !use_pioqueue;
564	if (!i2c->dma_mode)
565	dev_info(dev, "Using PIOQUEUE mode for I2C transfers!\n");
566
567	/*	411	/*
568	* TODO: This is a temporary solution and should be changed	412	* TODO: This is a temporary solution and should be changed
569	* to use generic DMA binding later when the helpers get in.	413	* to use generic DMA binding later when the helpers get in.
@@ -571,8 +415,8 @@ static int mxs_i2c_get_ofdata(struct mxs_i2c_dev *i2c) · 1 unmodified line
571	ret = of_property_read_u32(node, "fsl,i2c-dma-channel",	415	ret = of_property_read_u32(node, "fsl,i2c-dma-channel",
572	&i2c->dma_channel);	416	&i2c->dma_channel);
573	if (ret) {	417	if (ret) {
574	dev_warn(dev, "Failed to get DMA channel, using PIOQUEUE!\n");	418	dev_err(dev, "Failed to get DMA channel!\n");
575	i2c->dma_mode = 0;	419	return -ENODEV;
576	}	420	}
577		421
578	ret = of_property_read_u32(node, "clock-frequency", &speed);	422	ret = of_property_read_u32(node, "clock-frequency", &speed);
@@ -634,15 +478,13 @@ static int __devinit mxs_i2c_probe(struct platform_device *pdev) · 55 unmodified lines
634	}	478	}
635		479
636	/* Setup the DMA */	480	/* Setup the DMA */
637	if (i2c->dma_mode) {	481	dma_cap_zero(mask);
638	dma_cap_zero(mask);	482	dma_cap_set(DMA_SLAVE, mask);
639	dma_cap_set(DMA_SLAVE, mask);	483	i2c->dma_data.chan_irq = dmairq;
640	i2c->dma_data.chan_irq = dmairq;	484	i2c->dmach = dma_request_channel(mask, mxs_i2c_dma_filter, i2c);
641	i2c->dmach = dma_request_channel(mask, mxs_i2c_dma_filter, i2c);	485	if (!i2c->dmach) {
642	if (!i2c->dmach) {	486	dev_err(dev, "Failed to request dma\n");
643	dev_err(dev, "Failed to request dma\n");	487	return -ENODEV;
644	return -ENODEV;
645	}
646	}	488	}
647		489
648	platform_set_drvdata(pdev, i2c);	490	platform_set_drvdata(pdev, i2c);

drivers/i2c/busses/i2c-nomadik.c+7−2

 	pm_runtime_get_sync(&dev->adev->dev);
-	clk_enable(dev->clk);
+	status = clk_prepare_enable(dev->clk);
+	if (status) {
+		dev_err(&dev->adev->dev, "can't prepare_enable clock\n");
+		goto out_clk;
+	}
 	status = init_hw(dev);
 	if (status)
 	}
 out:
-	clk_disable(dev->clk);
+	clk_disable_unprepare(dev->clk);
+out_clk:
 	pm_runtime_put_sync(&dev->adev->dev);
 	dev->busy = false;

drivers/i2c/busses/i2c-tegra.c+1−1

@@ -742,7 +742,7 @@ static int __devinit tegra_i2c_probe(struct platform_device *pdev) · 741 unmodified lines
742	}	742	}
743		743
744	ret = devm_request_irq(&pdev->dev, i2c_dev->irq,	744	ret = devm_request_irq(&pdev->dev, i2c_dev->irq,
745	tegra_i2c_isr, 0, pdev->name, i2c_dev);	745	tegra_i2c_isr, 0, dev_name(&pdev->dev), i2c_dev);
746	if (ret) {	746	if (ret) {
747	dev_err(&pdev->dev, "Failed to request irq %i\n", i2c_dev->irq);	747	dev_err(&pdev->dev, "Failed to request irq %i\n", i2c_dev->irq);
748	return ret;	748	return ret;

drivers/i2c/muxes/i2c-mux-pinctrl.c+1−1

@@ -169,7 +169,7 @@ static int __devinit i2c_mux_pinctrl_probe(struct platform_device *pdev) · 168 unmodified lines
169	mux->busses = devm_kzalloc(&pdev->dev,	169	mux->busses = devm_kzalloc(&pdev->dev,
170	sizeof(mux->busses) * mux->pdata->bus_count,	170	sizeof(mux->busses) * mux->pdata->bus_count,
171	GFP_KERNEL);	171	GFP_KERNEL);
172	if (!mux->states) {	172	if (!mux->busses) {
173	dev_err(&pdev->dev, "Cannot allocate busses\n");	173	dev_err(&pdev->dev, "Cannot allocate busses\n");
174	ret = -ENOMEM;	174	ret = -ENOMEM;
175	goto err;	175	goto err;

drivers/irqchip/irq-bcm2835.c+2−1

@@ -168,7 +168,8 @@ static int __init armctrl_of_init(struct device_node *node, · 167 unmodified lines
168	}	168	}
169		169
170	static struct of_device_id irq_of_match[] __initconst = {	170	static struct of_device_id irq_of_match[] __initconst = {
171	{ .compatible = "brcm,bcm2835-armctrl-ic", .data = armctrl_of_init }	171	{ .compatible = "brcm,bcm2835-armctrl-ic", .data = armctrl_of_init },
		172	{ }
172	};	173	};
173		174
174	void __init bcm2835_init_irq(void)	175	void __init bcm2835_init_irq(void)

drivers/leds/ledtrig-cpu.c+0−21

 struct led_trigger_cpu {
 	char name[MAX_NAME_LEN];
 	struct led_trigger *_trig;
-	struct mutex lock;
-	int lock_is_inited;
 };
 static DEFINE_PER_CPU(struct led_trigger_cpu, cpu_trig);
 {
 	struct led_trigger_cpu *trig = &__get_cpu_var(cpu_trig);
-	/* mutex lock should be initialized before calling mutex_call() */
-	if (!trig->lock_is_inited)
-		return;
-	mutex_lock(&trig->lock);
 	/* Locate the correct CPU LED */
 	switch (ledevt) {
 	case CPU_LED_IDLE_END:
 		/* Will leave the LED as it is */
 		break;
 	}
-	mutex_unlock(&trig->lock);
 }
 EXPORT_SYMBOL(ledtrig_cpu);
 	for_each_possible_cpu(cpu) {
 		struct led_trigger_cpu *trig = &per_cpu(cpu_trig, cpu);
-		mutex_init(&trig->lock);
 		snprintf(trig->name, MAX_NAME_LEN, "cpu%d", cpu);
-		mutex_lock(&trig->lock);
 		led_trigger_register_simple(trig->name, &trig->_trig);
-		trig->lock_is_inited = 1;
-		mutex_unlock(&trig->lock);
 	}
 	register_syscore_ops(&ledtrig_cpu_syscore_ops);
 	for_each_possible_cpu(cpu) {
 		struct led_trigger_cpu *trig = &per_cpu(cpu_trig, cpu);
-		mutex_lock(&trig->lock);
 		led_trigger_unregister_simple(trig->_trig);
 		trig->_trig = NULL;
 		memset(trig->name, 0, MAX_NAME_LEN);
-		trig->lock_is_inited = 0;
-		mutex_unlock(&trig->lock);
-		mutex_destroy(&trig->lock);
 	}
 	unregister_syscore_ops(&ledtrig_cpu_syscore_ops);

drivers/mmc/host/dw_mmc-exynos.c+4−4

drivers/mmc/host/dw_mmc-pltfm.c+3−3

@@ -24,7 +24,7 @@ · 23 unmodified lines
24	#include "dw_mmc.h"	24	#include "dw_mmc.h"
25		25
26	int dw_mci_pltfm_register(struct platform_device *pdev,	26	int dw_mci_pltfm_register(struct platform_device *pdev,
27	struct dw_mci_drv_data *drv_data)	27	const struct dw_mci_drv_data *drv_data)
28	{	28	{
29	struct dw_mci *host;	29	struct dw_mci *host;
30	struct resource *regs;	30	struct resource *regs;
@@ -50,8 +50,8 @@ int dw_mci_pltfm_register(struct platform_device *pdev, · 19 unmodified lines
50	if (!host->regs)	50	if (!host->regs)
51	return -ENOMEM;	51	return -ENOMEM;
52		52
53	if (host->drv_data->init) {	53	if (drv_data && drv_data->init) {
54	ret = host->drv_data->init(host);	54	ret = drv_data->init(host);
55	if (ret)	55	if (ret)
56	return ret;	56	return ret;
57	}	57	}

drivers/mmc/host/dw_mmc-pltfm.h+1−1

@@ -13,7 +13,7 @@ · 12 unmodified lines
13	#define _DW_MMC_PLTFM_H_	13	#define _DW_MMC_PLTFM_H_
14		14
15	extern int dw_mci_pltfm_register(struct platform_device *pdev,	15	extern int dw_mci_pltfm_register(struct platform_device *pdev,
16	struct dw_mci_drv_data *drv_data);	16	const struct dw_mci_drv_data *drv_data);
17	extern int __devexit dw_mci_pltfm_remove(struct platform_device *pdev);	17	extern int __devexit dw_mci_pltfm_remove(struct platform_device *pdev);
18	extern const struct dev_pm_ops dw_mci_pltfm_pmops;	18	extern const struct dev_pm_ops dw_mci_pltfm_pmops;
19		19

drivers/mmc/host/dw_mmc.c+34−28

 {
 	struct mmc_data	*data;
 	struct dw_mci_slot *slot = mmc_priv(mmc);
+	struct dw_mci_drv_data *drv_data = slot->host->drv_data;
 	u32 cmdr;
 	cmd->error = -EINPROGRESS;
 			cmdr |= SDMMC_CMD_DAT_WR;
 	}
-	if (slot->host->drv_data->prepare_command)
+	if (drv_data && drv_data->prepare_command)
-		slot->host->drv_data->prepare_command(slot->host, &cmdr);
+		drv_data->prepare_command(slot->host, &cmdr);
 	return cmdr;
 }
 	return 0;
 }
-static struct dw_mci_dma_ops dw_mci_idmac_ops = {
+static const struct dw_mci_dma_ops dw_mci_idmac_ops = {
 	.init = dw_mci_idmac_init,
 	.start = dw_mci_idmac_start_dma,
 	.stop = dw_mci_idmac_stop_dma,
 static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 {
 	struct dw_mci_slot *slot = mmc_priv(mmc);
+	struct dw_mci_drv_data *drv_data = slot->host->drv_data;
 	u32 regs;
 	/* set default 1 bit mode */
 		slot->clock = ios->clock;
 	}
-	if (slot->host->drv_data->set_ios)
+	if (drv_data && drv_data->set_ios)
-		slot->host->drv_data->set_ios(slot->host, ios);
+		drv_data->set_ios(slot->host, ios);
 	switch (ios->power_mode) {
 	case MMC_POWER_UP:
 {
 	struct mmc_host *mmc;
 	struct dw_mci_slot *slot;
+	struct dw_mci_drv_data *drv_data = host->drv_data;
 	int ctrl_id, ret;
 	u8 bus_width;
 	} else {
 		ctrl_id = to_platform_device(host->dev)->id;
 	}
-	if (host->drv_data && host->drv_data->caps)
+	if (drv_data && drv_data->caps)
-		mmc->caps |= host->drv_data->caps[ctrl_id];
+		mmc->caps |= drv_data->caps[ctrl_id];
 	if (host->pdata->caps2)
 		mmc->caps2 = host->pdata->caps2;
 	else
 		bus_width = 1;
-	if (host->drv_data->setup_bus) {
+	if (drv_data && drv_data->setup_bus) {
 		struct device_node *slot_np;
 		slot_np = dw_mci_of_find_slot_node(host->dev, slot->id);
-		ret = host->drv_data->setup_bus(host, slot_np, bus_width);
+		ret = drv_data->setup_bus(host, slot_np, bus_width);
 		if (ret)
 			goto err_setup_bus;
 	}
 	/* Determine which DMA interface to use */
 #ifdef CONFIG_MMC_DW_IDMAC
 	host->dma_ops = &dw_mci_idmac_ops;
-	dev_info(&host->dev, "Using internal DMA controller.\n");
+	dev_info(host->dev, "Using internal DMA controller.\n");
 #endif
 	if (!host->dma_ops)
 	struct dw_mci_board *pdata;
 	struct device *dev = host->dev;
 	struct device_node *np = dev->of_node;
+	struct dw_mci_drv_data *drv_data = host->drv_data;
 	int idx, ret;
 	pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
 	of_property_read_u32(np, "card-detect-delay", &pdata->detect_delay_ms);
-	if (host->drv_data->parse_dt) {
+	if (drv_data && drv_data->parse_dt) {
-		ret = host->drv_data->parse_dt(host);
+		ret = drv_data->parse_dt(host);
 		if (ret)
 			return ERR_PTR(ret);
 	}
 int dw_mci_probe(struct dw_mci *host)
 {
+	struct dw_mci_drv_data *drv_data = host->drv_data;
 	int width, i, ret = 0;
 	u32 fifo_size;
 	int init_slots = 0;
 	else
 		host->bus_hz = clk_get_rate(host->ciu_clk);
-	if (host->drv_data->setup_clock) {
+	if (drv_data && drv_data->setup_clock) {
-		ret = host->drv_data->setup_clock(host);
+		ret = drv_data->setup_clock(host);
 		if (ret) {
 			dev_err(host->dev,
 				"implementation specific clock setup failed\n");
 	else
 		host->num_slots = ((mci_readl(host, HCON) >> 1) & 0x1F) + 1;
+	/*
+	 * Enable interrupts for command done, data over, data empty, card det,
+	 * receive ready and error such as transmit, receive timeout, crc error
+	 */
+	mci_writel(host, RINTSTS, 0xFFFFFFFF);
+	mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER |
+		   SDMMC_INT_TXDR | SDMMC_INT_RXDR |
+		   DW_MCI_ERROR_FLAGS | SDMMC_INT_CD);
+	mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); /* Enable mci interrupt */
+	dev_info(host->dev, "DW MMC controller at irq %d, "
+		 "%d bit host data width, "
+		 "%u deep fifo\n",
+		 host->irq, width, fifo_size);
 	/* We need at least one slot to succeed */
 	for (i = 0; i < host->num_slots; i++) {
 		ret = dw_mci_init_slot(host, i);
 	else
 		host->data_offset = DATA_240A_OFFSET;
-	/*
-	 * Enable interrupts for command done, data over, data empty, card det,
-	 * receive ready and error such as transmit, receive timeout, crc error
-	 */
-	mci_writel(host, RINTSTS, 0xFFFFFFFF);
-	mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER |
-		   SDMMC_INT_TXDR | SDMMC_INT_RXDR |
-		   DW_MCI_ERROR_FLAGS | SDMMC_INT_CD);
-	mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); /* Enable mci interrupt */
-	dev_info(host->dev, "DW MMC controller at irq %d, "
-		 "%d bit host data width, "
-		 "%u deep fifo\n",
-		 host->irq, width, fifo_size);
 	if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO)
 		dev_info(host->dev, "Internal DMAC interrupt fix enabled.\n");

drivers/mmc/host/mxcmmc.c+1−1

@@ -1134,4 +1134,4 @@ module_platform_driver(mxcmci_driver); · 1133 unmodified lines
1134	MODULE_DESCRIPTION("i.MX Multimedia Card Interface Driver");	1134	MODULE_DESCRIPTION("i.MX Multimedia Card Interface Driver");
1135	MODULE_AUTHOR("Sascha Hauer, Pengutronix");	1135	MODULE_AUTHOR("Sascha Hauer, Pengutronix");
1136	MODULE_LICENSE("GPL");	1136	MODULE_LICENSE("GPL");
1137	MODULE_ALIAS("platform:imx-mmc");	1137	MODULE_ALIAS("platform:mxc-mmc");

drivers/mmc/host/omap_hsmmc.c+12−7

 static int omap_hsmmc_card_detect(struct device *dev, int slot)
 {
-	struct omap_mmc_platform_data *mmc = dev->platform_data;
+	struct omap_hsmmc_host *host = dev_get_drvdata(dev);
+	struct omap_mmc_platform_data *mmc = host->pdata;
 	/* NOTE: assumes card detect signal is active-low */
 	return !gpio_get_value_cansleep(mmc->slots[0].switch_pin);
 static int omap_hsmmc_get_wp(struct device *dev, int slot)
 {
-	struct omap_mmc_platform_data *mmc = dev->platform_data;
+	struct omap_hsmmc_host *host = dev_get_drvdata(dev);
+	struct omap_mmc_platform_data *mmc = host->pdata;
 	/* NOTE: assumes write protect signal is active-high */
 	return gpio_get_value_cansleep(mmc->slots[0].gpio_wp);
 static int omap_hsmmc_get_cover_state(struct device *dev, int slot)
 {
-	struct omap_mmc_platform_data *mmc = dev->platform_data;
+	struct omap_hsmmc_host *host = dev_get_drvdata(dev);
+	struct omap_mmc_platform_data *mmc = host->pdata;
 	/* NOTE: assumes card detect signal is active-low */
 	return !gpio_get_value_cansleep(mmc->slots[0].switch_pin);
 static int omap_hsmmc_suspend_cdirq(struct device *dev, int slot)
 {
-	struct omap_mmc_platform_data *mmc = dev->platform_data;
+	struct omap_hsmmc_host *host = dev_get_drvdata(dev);
+	struct omap_mmc_platform_data *mmc = host->pdata;
 	disable_irq(mmc->slots[0].card_detect_irq);
 	return 0;
 static int omap_hsmmc_resume_cdirq(struct device *dev, int slot)
 {
-	struct omap_mmc_platform_data *mmc = dev->platform_data;
+	struct omap_hsmmc_host *host = dev_get_drvdata(dev);
+	struct omap_mmc_platform_data *mmc = host->pdata;
 	enable_irq(mmc->slots[0].card_detect_irq);
 	return 0;
 		clk_put(host->dbclk);
 	}
-	mmc_free_host(host->mmc);
+	omap_hsmmc_gpio_free(host->pdata);
 	iounmap(host->base);
-	omap_hsmmc_gpio_free(pdev->dev.platform_data);
+	mmc_free_host(host->mmc);
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	if (res)

drivers/mmc/host/sdhci-dove.c+20−18

@@ -19,6 +19,7 @@ · 18 unmodified lines
19	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.	19	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20	*/	20	*/
21		21
		22	#include <linux/err.h>
22	#include <linux/io.h>	23	#include <linux/io.h>
23	#include <linux/clk.h>	24	#include <linux/clk.h>
24	#include <linux/err.h>	25	#include <linux/err.h>
@@ -84,30 +85,32 @@ static int __devinit sdhci_dove_probe(struct platform_device *pdev) · 59 unmodified lines
84	struct sdhci_dove_priv *priv;	85	struct sdhci_dove_priv *priv;
85	int ret;	86	int ret;
86		87
87	ret = sdhci_pltfm_register(pdev, &sdhci_dove_pdata);
88	if (ret)
89	goto sdhci_dove_register_fail;
90
91	priv = devm_kzalloc(&pdev->dev, sizeof(struct sdhci_dove_priv),	88	priv = devm_kzalloc(&pdev->dev, sizeof(struct sdhci_dove_priv),
92	GFP_KERNEL);	89	GFP_KERNEL);
93	if (!priv) {	90	if (!priv) {
94	dev_err(&pdev->dev, "unable to allocate private data");	91	dev_err(&pdev->dev, "unable to allocate private data");
95	ret = -ENOMEM;	92	return -ENOMEM;
96	goto sdhci_dove_allocate_fail;
97	}	93	}
98		94
		95	priv->clk = clk_get(&pdev->dev, NULL);
		96	if (!IS_ERR(priv->clk))
		97	clk_prepare_enable(priv->clk);
		98
		99	ret = sdhci_pltfm_register(pdev, &sdhci_dove_pdata);
		100	if (ret)
		101	goto sdhci_dove_register_fail;
		102
99	host = platform_get_drvdata(pdev);	103	host = platform_get_drvdata(pdev);
100	pltfm_host = sdhci_priv(host);	104	pltfm_host = sdhci_priv(host);
101	pltfm_host->priv = priv;	105	pltfm_host->priv = priv;
102		106
103	priv->clk = clk_get(&pdev->dev, NULL);
104	if (!IS_ERR(priv->clk))
105	clk_prepare_enable(priv->clk);
106	return 0;	107	return 0;
107		108
108	sdhci_dove_allocate_fail:
109	sdhci_pltfm_unregister(pdev);
110	sdhci_dove_register_fail:	109	sdhci_dove_register_fail:
		110	if (!IS_ERR(priv->clk)) {
		111	clk_disable_unprepare(priv->clk);
		112	clk_put(priv->clk);
		113	}
111	return ret;	114	return ret;
112	}	115	}
113		116
@@ -117,14 +120,13 @@ static int __devexit sdhci_dove_remove(struct platform_device *pdev) · 3 unmodified lines
117	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);	120	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
118	struct sdhci_dove_priv *priv = pltfm_host->priv;	121	struct sdhci_dove_priv *priv = pltfm_host->priv;
119		122
120	if (priv->clk) {	123	sdhci_pltfm_unregister(pdev);
121	if (!IS_ERR(priv->clk)) {	124
122	clk_disable_unprepare(priv->clk);	125	if (!IS_ERR(priv->clk)) {
123	clk_put(priv->clk);	126	clk_disable_unprepare(priv->clk);
124	}	127	clk_put(priv->clk);
125	devm_kfree(&pdev->dev, priv->clk);
126	}	128	}
127	return sdhci_pltfm_unregister(pdev);	129	return 0;
128	}	130	}
129		131
130	static const struct of_device_id sdhci_dove_of_match_table[] __devinitdata = {	132	static const struct of_device_id sdhci_dove_of_match_table[] __devinitdata = {

drivers/mmc/host/sdhci-of-esdhc.c+11−0

 }
 #endif
+static void esdhc_of_platform_init(struct sdhci_host *host)
+{
+	u32 vvn;
+	vvn = in_be32(host->ioaddr + SDHCI_SLOT_INT_STATUS);
+	vvn = (vvn & SDHCI_VENDOR_VER_MASK) >> SDHCI_VENDOR_VER_SHIFT;
+	if (vvn == VENDOR_V_22)
+		host->quirks2 |= SDHCI_QUIRK2_HOST_NO_CMD23;
+}
 static struct sdhci_ops sdhci_esdhc_ops = {
 	.read_l = esdhc_readl,
 	.read_w = esdhc_readw,
 	.enable_dma = esdhc_of_enable_dma,
 	.get_max_clock = esdhc_of_get_max_clock,
 	.get_min_clock = esdhc_of_get_min_clock,
+	.platform_init = esdhc_of_platform_init,
 #ifdef CONFIG_PM
 	.platform_suspend = esdhc_of_suspend,
 	.platform_resume = esdhc_of_resume,

drivers/mmc/host/sdhci-pci.c+1−1

@@ -1196,7 +1196,7 @@ static struct sdhci_pci_slot * __devinit sdhci_pci_probe_slot( · 1195 unmodified lines
1196	return ERR_PTR(-ENODEV);	1196	return ERR_PTR(-ENODEV);
1197	}	1197	}
1198		1198
1199	if (pci_resource_len(pdev, bar) != 0x100) {	1199	if (pci_resource_len(pdev, bar) < 0x100) {
1200	dev_err(&pdev->dev, "Invalid iomem size. You may "	1200	dev_err(&pdev->dev, "Invalid iomem size. You may "
1201	"experience problems.\n");	1201	"experience problems.\n");
1202	}	1202	}

drivers/mmc/host/sdhci-pltfm.c+7−0

@@ -150,6 +150,13 @@ struct sdhci_host sdhci_pltfm_init(struct platform_device pdev, · 149 unmodified lines
150	goto err_remap;	150	goto err_remap;
151	}	151	}
152		152
		153	/*
		154	* Some platforms need to probe the controller to be able to
		155	* determine which caps should be used.
		156	*/
		157	if (host->ops && host->ops->platform_init)
		158	host->ops->platform_init(host);
		159
153	platform_set_drvdata(pdev, host);	160	platform_set_drvdata(pdev, host);
154		161
155	return host;	162	return host;

drivers/mmc/host/sdhci-s3c.c+16−14

 	if (ourhost->cur_clk != best_src) {
 		struct clk *clk = ourhost->clk_bus[best_src];
-		clk_enable(clk);
+		clk_prepare_enable(clk);
-		clk_disable(ourhost->clk_bus[ourhost->cur_clk]);
+		clk_disable_unprepare(ourhost->clk_bus[ourhost->cur_clk]);
 		/* turn clock off to card before changing clock source */
 		writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
 	}
 	/* enable the local io clock and keep it running for the moment. */
-	clk_enable(sc->clk_io);
+	clk_prepare_enable(sc->clk_io);
 	for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) {
 		struct clk *clk;
 	}
 #ifndef CONFIG_PM_RUNTIME
-	clk_enable(sc->clk_bus[sc->cur_clk]);
+	clk_prepare_enable(sc->clk_bus[sc->cur_clk]);
 #endif
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 		sdhci_s3c_setup_card_detect_gpio(sc);
 #ifdef CONFIG_PM_RUNTIME
-	clk_disable(sc->clk_io);
+	if (pdata->cd_type != S3C_SDHCI_CD_INTERNAL)
+		clk_disable_unprepare(sc->clk_io);
 #endif
 	return 0;
  err_req_regs:
 #ifndef CONFIG_PM_RUNTIME
-	clk_disable(sc->clk_bus[sc->cur_clk]);
+	clk_disable_unprepare(sc->clk_bus[sc->cur_clk]);
 #endif
 	for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) {
 		if (sc->clk_bus[ptr]) {
 	}
  err_no_busclks:
-	clk_disable(sc->clk_io);
+	clk_disable_unprepare(sc->clk_io);
 	clk_put(sc->clk_io);
  err_io_clk:
 		gpio_free(sc->ext_cd_gpio);
 #ifdef CONFIG_PM_RUNTIME
-	clk_enable(sc->clk_io);
+	if (pdata->cd_type != S3C_SDHCI_CD_INTERNAL)
+		clk_prepare_enable(sc->clk_io);
 #endif
 	sdhci_remove_host(host, 1);
 	pm_runtime_disable(&pdev->dev);
 #ifndef CONFIG_PM_RUNTIME
-	clk_disable(sc->clk_bus[sc->cur_clk]);
+	clk_disable_unprepare(sc->clk_bus[sc->cur_clk]);
 #endif
 	for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) {
 		if (sc->clk_bus[ptr]) {
 			clk_put(sc->clk_bus[ptr]);
 		}
 	}
-	clk_disable(sc->clk_io);
+	clk_disable_unprepare(sc->clk_io);
 	clk_put(sc->clk_io);
 	if (pdev->dev.of_node) {
 	ret = sdhci_runtime_suspend_host(host);
-	clk_disable(ourhost->clk_bus[ourhost->cur_clk]);
+	clk_disable_unprepare(ourhost->clk_bus[ourhost->cur_clk]);
-	clk_disable(busclk);
+	clk_disable_unprepare(busclk);
 	return ret;
 }
 	struct clk *busclk = ourhost->clk_io;
 	int ret;
-	clk_enable(busclk);
+	clk_prepare_enable(busclk);
-	clk_enable(ourhost->clk_bus[ourhost->cur_clk]);
+	clk_prepare_enable(ourhost->clk_bus[ourhost->cur_clk]);
 	ret = sdhci_runtime_resume_host(host);
 	return ret;
 }

drivers/mmc/host/sdhci.c+28−16

@@ -1315,16 +1315,19 @@ static void sdhci_request(struct mmc_host mmc, struct mmc_request mrq) · 1314 unmodified lines
1315	*/	1315	*/
1316	if ((host->flags & SDHCI_NEEDS_RETUNING) &&	1316	if ((host->flags & SDHCI_NEEDS_RETUNING) &&
1317	!(present_state & (SDHCI_DOING_WRITE \| SDHCI_DOING_READ))) {	1317	!(present_state & (SDHCI_DOING_WRITE \| SDHCI_DOING_READ))) {
1318	/* eMMC uses cmd21 while sd and sdio use cmd19 */	1318	if (mmc->card) {
1319	tuning_opcode = mmc->card->type == MMC_TYPE_MMC ?	1319	/* eMMC uses cmd21 but sd and sdio use cmd19 */
1320	MMC_SEND_TUNING_BLOCK_HS200 :	1320	tuning_opcode =
1321	MMC_SEND_TUNING_BLOCK;	1321	mmc->card->type == MMC_TYPE_MMC ?
1322	spin_unlock_irqrestore(&host->lock, flags);	1322	MMC_SEND_TUNING_BLOCK_HS200 :
1323	sdhci_execute_tuning(mmc, tuning_opcode);	1323	MMC_SEND_TUNING_BLOCK;
1324	spin_lock_irqsave(&host->lock, flags);	1324	spin_unlock_irqrestore(&host->lock, flags);
1325		1325	sdhci_execute_tuning(mmc, tuning_opcode);
1326	/* Restore original mmc_request structure */	1326	spin_lock_irqsave(&host->lock, flags);
1327	host->mrq = mrq;	1327
		1328	/* Restore original mmc_request structure */
		1329	host->mrq = mrq;
		1330	}
1328	}	1331	}
1329		1332
1330	if (mrq->sbc && !(host->flags & SDHCI_AUTO_CMD23))	1333	if (mrq->sbc && !(host->flags & SDHCI_AUTO_CMD23))
@@ -2837,6 +2840,9 @@ int sdhci_add_host(struct sdhci_host *host) · 1506 unmodified lines
2837	if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA))	2840	if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA))
2838	mmc->caps \|= MMC_CAP_4_BIT_DATA;	2841	mmc->caps \|= MMC_CAP_4_BIT_DATA;
2839		2842
		2843	if (host->quirks2 & SDHCI_QUIRK2_HOST_NO_CMD23)
		2844	mmc->caps &= ~MMC_CAP_CMD23;
		2845
2840	if (caps[0] & SDHCI_CAN_DO_HISPD)	2846	if (caps[0] & SDHCI_CAN_DO_HISPD)
2841	mmc->caps \|= MMC_CAP_SD_HIGHSPEED \| MMC_CAP_MMC_HIGHSPEED;	2847	mmc->caps \|= MMC_CAP_SD_HIGHSPEED \| MMC_CAP_MMC_HIGHSPEED;
2842		2848
@@ -2846,9 +2852,12 @@ int sdhci_add_host(struct sdhci_host *host) · 3 unmodified lines
2846		2852
2847	/* If vqmmc regulator and no 1.8V signalling, then there's no UHS */	2853	/* If vqmmc regulator and no 1.8V signalling, then there's no UHS */
2848	host->vqmmc = regulator_get(mmc_dev(mmc), "vqmmc");	2854	host->vqmmc = regulator_get(mmc_dev(mmc), "vqmmc");
2849	if (IS_ERR(host->vqmmc)) {	2855	if (IS_ERR_OR_NULL(host->vqmmc)) {
2850	pr_info("%s: no vqmmc regulator found\n", mmc_hostname(mmc));	2856	if (PTR_ERR(host->vqmmc) < 0) {
2851	host->vqmmc = NULL;	2857	pr_info("%s: no vqmmc regulator found\n",
		2858	mmc_hostname(mmc));
		2859	host->vqmmc = NULL;
		2860	}
2852	}	2861	}
2853	else if (regulator_is_supported_voltage(host->vqmmc, 1800000, 1800000))	2862	else if (regulator_is_supported_voltage(host->vqmmc, 1800000, 1800000))
2854	regulator_enable(host->vqmmc);	2863	regulator_enable(host->vqmmc);
@@ -2904,9 +2913,12 @@ int sdhci_add_host(struct sdhci_host *host) · 49 unmodified lines
2904	ocr_avail = 0;	2913	ocr_avail = 0;
2905		2914
2906	host->vmmc = regulator_get(mmc_dev(mmc), "vmmc");	2915	host->vmmc = regulator_get(mmc_dev(mmc), "vmmc");
2907	if (IS_ERR(host->vmmc)) {	2916	if (IS_ERR_OR_NULL(host->vmmc)) {
2908	pr_info("%s: no vmmc regulator found\n", mmc_hostname(mmc));	2917	if (PTR_ERR(host->vmmc) < 0) {
2909	host->vmmc = NULL;	2918	pr_info("%s: no vmmc regulator found\n",
		2919	mmc_hostname(mmc));
		2920	host->vmmc = NULL;
		2921	}
2910	} else	2922	} else
2911	regulator_enable(host->vmmc);	2923	regulator_enable(host->vmmc);
2912		2924

drivers/mmc/host/sdhci.h+1−0

@@ -278,6 +278,7 @@ struct sdhci_ops { · 277 unmodified lines
278	void (hw_reset)(struct sdhci_host host);	278	void (hw_reset)(struct sdhci_host host);
279	void (platform_suspend)(struct sdhci_host host);	279	void (platform_suspend)(struct sdhci_host host);
280	void (platform_resume)(struct sdhci_host host);	280	void (platform_resume)(struct sdhci_host host);
		281	void (platform_init)(struct sdhci_host host);
281	};	282	};
282		283
283	#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS	284	#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS

drivers/mmc/host/sh_mmcif.c+1−1

@@ -1466,9 +1466,9 @@ static int __devexit sh_mmcif_remove(struct platform_device *pdev) · 1465 unmodified lines
1466		1466
1467	platform_set_drvdata(pdev, NULL);	1467	platform_set_drvdata(pdev, NULL);
1468		1468
		1469	clk_disable(host->hclk);
1469	mmc_free_host(host->mmc);	1470	mmc_free_host(host->mmc);
1470	pm_runtime_put_sync(&pdev->dev);	1471	pm_runtime_put_sync(&pdev->dev);
1471	clk_disable(host->hclk);
1472	pm_runtime_disable(&pdev->dev);	1472	pm_runtime_disable(&pdev->dev);
1473		1473
1474	return 0;	1474	return 0;

drivers/net/ethernet/jme.c+8−20

 	jme_clear_pm(jme);
 	JME_NAPI_ENABLE(jme);
-	tasklet_enable(&jme->linkch_task);
+	tasklet_init(&jme->linkch_task, jme_link_change_tasklet,
-	tasklet_enable(&jme->txclean_task);
+		     (unsigned long) jme);
-	tasklet_hi_enable(&jme->rxclean_task);
+	tasklet_init(&jme->txclean_task, jme_tx_clean_tasklet,
-	tasklet_hi_enable(&jme->rxempty_task);
+		     (unsigned long) jme);
+	tasklet_init(&jme->rxclean_task, jme_rx_clean_tasklet,
+		     (unsigned long) jme);
+	tasklet_init(&jme->rxempty_task, jme_rx_empty_tasklet,
+		     (unsigned long) jme);
 	rc = jme_request_irq(jme);
 	if (rc)
 	tasklet_init(&jme->pcc_task,
 		     jme_pcc_tasklet,
 		     (unsigned long) jme);
-	tasklet_init(&jme->linkch_task,
-		     jme_link_change_tasklet,
-		     (unsigned long) jme);
-	tasklet_init(&jme->txclean_task,
-		     jme_tx_clean_tasklet,
-		     (unsigned long) jme);
-	tasklet_init(&jme->rxclean_task,
-		     jme_rx_clean_tasklet,
-		     (unsigned long) jme);
-	tasklet_init(&jme->rxempty_task,
-		     jme_rx_empty_tasklet,
-		     (unsigned long) jme);
-	tasklet_disable_nosync(&jme->linkch_task);
-	tasklet_disable_nosync(&jme->txclean_task);
-	tasklet_disable_nosync(&jme->rxclean_task);
-	tasklet_disable_nosync(&jme->rxempty_task);
 	jme->dpi.cur = PCC_P1;
 	jme->reg_ghc = 0;

drivers/net/ethernet/micrel/ksz884x.c+4−12

 	rc = request_irq(dev->irq, netdev_intr, IRQF_SHARED, dev->name, dev);
 	if (rc)
 		return rc;
-	tasklet_enable(&hw_priv->rx_tasklet);
+	tasklet_init(&hw_priv->rx_tasklet, rx_proc_task,
-	tasklet_enable(&hw_priv->tx_tasklet);
+		     (unsigned long) hw_priv);
+	tasklet_init(&hw_priv->tx_tasklet, tx_proc_task,
+		     (unsigned long) hw_priv);
 	hw->promiscuous = 0;
 	hw->all_multi = 0;
 	spin_lock_init(&hw_priv->hwlock);
 	mutex_init(&hw_priv->lock);
-	/* tasklet is enabled. */
-	tasklet_init(&hw_priv->rx_tasklet, rx_proc_task,
-		(unsigned long) hw_priv);
-	tasklet_init(&hw_priv->tx_tasklet, tx_proc_task,
-		(unsigned long) hw_priv);
-	/* tasklet_enable will decrement the atomic counter. */
-	tasklet_disable(&hw_priv->rx_tasklet);
-	tasklet_disable(&hw_priv->tx_tasklet);
 	for (i = 0; i < TOTAL_PORT_NUM; i++)
 		init_waitqueue_head(&hw_priv->counter[i].counter);

drivers/net/ethernet/smsc/smsc911x.c+15−2

@@ -2110,7 +2110,7 @@ static void __devinit smsc911x_read_mac_address(struct net_device *dev) · 2109 unmodified lines
2110	static int __devinit smsc911x_init(struct net_device *dev)	2110	static int __devinit smsc911x_init(struct net_device *dev)
2111	{	2111	{
2112	struct smsc911x_data *pdata = netdev_priv(dev);	2112	struct smsc911x_data *pdata = netdev_priv(dev);
2113	unsigned int byte_test;	2113	unsigned int byte_test, mask;
2114	unsigned int to = 100;	2114	unsigned int to = 100;
2115		2115
2116	SMSC_TRACE(pdata, probe, "Driver Parameters:");	2116	SMSC_TRACE(pdata, probe, "Driver Parameters:");
@@ -2130,9 +2130,22 @@ static int __devinit smsc911x_init(struct net_device *dev) · 13 unmodified lines
2130	/*	2130	/*
2131	* poll the READY bit in PMT_CTRL. Any other access to the device is	2131	* poll the READY bit in PMT_CTRL. Any other access to the device is
2132	* forbidden while this bit isn't set. Try for 100ms	2132	* forbidden while this bit isn't set. Try for 100ms
		2133	*
		2134	* Note that this test is done before the WORD_SWAP register is
		2135	* programmed. So in some configurations the READY bit is at 16 before
		2136	* WORD_SWAP is written to. This issue is worked around by waiting
		2137	* until either bit 0 or bit 16 gets set in PMT_CTRL.
		2138	*
		2139	* SMSC has confirmed that checking bit 16 (marked as reserved in
		2140	* the datasheet) is fine since these bits "will either never be set
		2141	* or can only go high after READY does (so also indicate the device
		2142	* is ready)".
2133	*/	2143	*/
2134	while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to)	2144
		2145	mask = PMT_CTRL_READY_ \| swahw32(PMT_CTRL_READY_);
		2146	while (!(smsc911x_reg_read(pdata, PMT_CTRL) & mask) && --to)
2135	udelay(1000);	2147	udelay(1000);
		2148
2136	if (to == 0) {	2149	if (to == 0) {
2137	pr_err("Device not READY in 100ms aborting\n");	2150	pr_err("Device not READY in 100ms aborting\n");
2138	return -ENODEV;	2151	return -ENODEV;

drivers/net/ethernet/tile/tilegx.c+1−1

@@ -917,7 +917,7 @@ static int tile_net_setup_interrupts(struct net_device *dev) · 916 unmodified lines
917	ingress_irq = rc;	917	ingress_irq = rc;
918	tile_irq_activate(ingress_irq, TILE_IRQ_PERCPU);	918	tile_irq_activate(ingress_irq, TILE_IRQ_PERCPU);
919	rc = request_irq(ingress_irq, tile_net_handle_ingress_irq,	919	rc = request_irq(ingress_irq, tile_net_handle_ingress_irq,
920	0, NULL, NULL);	920	0, "tile_net", NULL);
921	if (rc != 0) {	921	if (rc != 0) {
922	netdev_err(dev, "request_irq failed: %d\n", rc);	922	netdev_err(dev, "request_irq failed: %d\n", rc);
923	destroy_irq(ingress_irq);	923	destroy_irq(ingress_irq);

drivers/net/ethernet/xilinx/xilinx_axienet_main.c+6−6

@@ -942,6 +942,10 @@ static int axienet_open(struct net_device *ndev) · 941 unmodified lines
942	phy_start(lp->phy_dev);	942	phy_start(lp->phy_dev);
943	}	943	}
944		944
		945	/* Enable tasklets for Axi DMA error handling */
		946	tasklet_init(&lp->dma_err_tasklet, axienet_dma_err_handler,
		947	(unsigned long) lp);
		948
945	/* Enable interrupts for Axi DMA Tx */	949	/* Enable interrupts for Axi DMA Tx */
946	ret = request_irq(lp->tx_irq, axienet_tx_irq, 0, ndev->name, ndev);	950	ret = request_irq(lp->tx_irq, axienet_tx_irq, 0, ndev->name, ndev);
947	if (ret)	951	if (ret)
@@ -950,8 +954,7 @@ static int axienet_open(struct net_device *ndev) · 2 unmodified lines
950	ret = request_irq(lp->rx_irq, axienet_rx_irq, 0, ndev->name, ndev);	954	ret = request_irq(lp->rx_irq, axienet_rx_irq, 0, ndev->name, ndev);
951	if (ret)	955	if (ret)
952	goto err_rx_irq;	956	goto err_rx_irq;
953	/* Enable tasklets for Axi DMA error handling */	957
954	tasklet_enable(&lp->dma_err_tasklet);
955	return 0;	958	return 0;
956		959
957	err_rx_irq:	960	err_rx_irq:
@@ -960,6 +963,7 @@ err_tx_irq: · 2 unmodified lines
960	if (lp->phy_dev)	963	if (lp->phy_dev)
961	phy_disconnect(lp->phy_dev);	964	phy_disconnect(lp->phy_dev);
962	lp->phy_dev = NULL;	965	lp->phy_dev = NULL;
		966	tasklet_kill(&lp->dma_err_tasklet);
963	dev_err(lp->dev, "request_irq() failed\n");	967	dev_err(lp->dev, "request_irq() failed\n");
964	return ret;	968	return ret;
965	}	969	}
@@ -1613,10 +1617,6 @@ static int __devinit axienet_of_probe(struct platform_device *op) · 647 unmodified lines
1613	goto err_iounmap_2;	1617	goto err_iounmap_2;
1614	}	1618	}
1615		1619
1616	tasklet_init(&lp->dma_err_tasklet, axienet_dma_err_handler,
1617	(unsigned long) lp);
1618	tasklet_disable(&lp->dma_err_tasklet);
1619
1620	return 0;	1620	return 0;
1621		1621
1622	err_iounmap_2:	1622	err_iounmap_2:

drivers/net/phy/mdio-bitbang.c+0−1

@@ -234,7 +234,6 @@ void free_mdio_bitbang(struct mii_bus *bus) · 233 unmodified lines
234	struct mdiobb_ctrl *ctrl = bus->priv;	234	struct mdiobb_ctrl *ctrl = bus->priv;
235		235
236	module_put(ctrl->ops->owner);	236	module_put(ctrl->ops->owner);
237	mdiobus_unregister(bus);
238	mdiobus_free(bus);	237	mdiobus_free(bus);
239	}	238	}
240	EXPORT_SYMBOL(free_mdio_bitbang);	239	EXPORT_SYMBOL(free_mdio_bitbang);

drivers/net/usb/cdc_ncm.c+18−4

 	    ((!ctx->mbim_desc) && ((ctx->ether_desc == NULL) || (ctx->control != intf))))
 		goto error;
-	/* claim interfaces, if any */
+	/* claim data interface, if different from control */
-	temp = usb_driver_claim_interface(driver, ctx->data, dev);
+	if (ctx->data != ctx->control) {
-	if (temp)
+		temp = usb_driver_claim_interface(driver, ctx->data, dev);
-		goto error;
+		if (temp)
+			goto error;
+	}
 	iface_no = ctx->data->cur_altsetting->desc.bInterfaceNumber;
 	tasklet_kill(&ctx->bh);
+	/* handle devices with combined control and data interface */
+	if (ctx->control == ctx->data)
+		ctx->data = NULL;
 	/* disconnect master --> disconnect slave */
 	if (intf == ctx->control && ctx->data) {
 		usb_set_intfdata(ctx->data, NULL);
 	  .driver_info = (unsigned long) &wwan_info,
 	},
+	/* Huawei NCM devices disguised as vendor specific */
+	{ USB_VENDOR_AND_INTERFACE_INFO(0x12d1, 0xff, 0x02, 0x16),
+	  .driver_info = (unsigned long)&wwan_info,
+	},
+	{ USB_VENDOR_AND_INTERFACE_INFO(0x12d1, 0xff, 0x02, 0x46),
+	  .driver_info = (unsigned long)&wwan_info,
+	},
 	/* Generic CDC-NCM devices */
 	{ USB_INTERFACE_INFO(USB_CLASS_COMM,
 		USB_CDC_SUBCLASS_NCM, USB_CDC_PROTO_NONE),

drivers/net/usb/smsc95xx.c+2−2

@@ -203,7 +203,7 @@ static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx) · 202 unmodified lines
203	/* set the address, index & direction (read from PHY) */	203	/* set the address, index & direction (read from PHY) */
204	phy_id &= dev->mii.phy_id_mask;	204	phy_id &= dev->mii.phy_id_mask;
205	idx &= dev->mii.reg_num_mask;	205	idx &= dev->mii.reg_num_mask;
206	addr = (phy_id << 11) \| (idx << 6) \| MII_READ_;	206	addr = (phy_id << 11) \| (idx << 6) \| MII_READ_ \| MII_BUSY_;
207	ret = smsc95xx_write_reg(dev, MII_ADDR, addr);	207	ret = smsc95xx_write_reg(dev, MII_ADDR, addr);
208	check_warn_goto_done(ret, "Error writing MII_ADDR");	208	check_warn_goto_done(ret, "Error writing MII_ADDR");
209		209
@@ -240,7 +240,7 @@ static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx, · 30 unmodified lines
240	/* set the address, index & direction (write to PHY) */	240	/* set the address, index & direction (write to PHY) */
241	phy_id &= dev->mii.phy_id_mask;	241	phy_id &= dev->mii.phy_id_mask;
242	idx &= dev->mii.reg_num_mask;	242	idx &= dev->mii.reg_num_mask;
243	addr = (phy_id << 11) \| (idx << 6) \| MII_WRITE_;	243	addr = (phy_id << 11) \| (idx << 6) \| MII_WRITE_ \| MII_BUSY_;
244	ret = smsc95xx_write_reg(dev, MII_ADDR, addr);	244	ret = smsc95xx_write_reg(dev, MII_ADDR, addr);
245	check_warn_goto_done(ret, "Error writing MII_ADDR");	245	check_warn_goto_done(ret, "Error writing MII_ADDR");
246		246

drivers/net/vxlan.c+7−3

 /*
- * VXLAN: Virtual eXtensiable Local Area Network
+ * VXLAN: Virtual eXtensible Local Area Network
  *
  * Copyright (c) 2012 Vyatta Inc.
  *
 #define VXLAN_N_VID	(1u << 24)
 #define VXLAN_VID_MASK	(VXLAN_N_VID - 1)
-/* VLAN + IP header + UDP + VXLAN */
+/* IP header + UDP + VXLAN + Ethernet header */
-#define VXLAN_HEADROOM (4 + 20 + 8 + 8)
+#define VXLAN_HEADROOM (20 + 8 + 8 + 14)
 #define VXLAN_FLAGS 0x08000000	/* struct vxlanhdr.vx_flags required value. */
 		if (!tb[IFLA_MTU])
 			dev->mtu = lowerdev->mtu - VXLAN_HEADROOM;
+		/* update header length based on lower device */
+		dev->hard_header_len = lowerdev->hard_header_len +
+				       VXLAN_HEADROOM;
 	}
 	if (data[IFLA_VXLAN_TOS])

drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211.c+1−1

@@ -4197,7 +4197,7 @@ static s32 brcmf_mode_to_nl80211_iftype(s32 mode) · 4196 unmodified lines
4197		4197
4198	static void brcmf_wiphy_pno_params(struct wiphy *wiphy)	4198	static void brcmf_wiphy_pno_params(struct wiphy *wiphy)
4199	{	4199	{
4200	#ifndef CONFIG_BRCMFISCAN	4200	#ifndef CONFIG_BRCMISCAN
4201	/* scheduled scan settings */	4201	/* scheduled scan settings */
4202	wiphy->max_sched_scan_ssids = BRCMF_PNO_MAX_PFN_COUNT;	4202	wiphy->max_sched_scan_ssids = BRCMF_PNO_MAX_PFN_COUNT;
4203	wiphy->max_match_sets = BRCMF_PNO_MAX_PFN_COUNT;	4203	wiphy->max_match_sets = BRCMF_PNO_MAX_PFN_COUNT;

drivers/net/wireless/iwlwifi/dvm/mac80211.c+1−1

@@ -521,7 +521,7 @@ static void iwlagn_mac_tx(struct ieee80211_hw *hw, · 520 unmodified lines
521	ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);	521	ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
522		522
523	if (iwlagn_tx_skb(priv, control->sta, skb))	523	if (iwlagn_tx_skb(priv, control->sta, skb))
524	dev_kfree_skb_any(skb);	524	ieee80211_free_txskb(hw, skb);
525	}	525	}
526		526
527	static void iwlagn_mac_update_tkip_key(struct ieee80211_hw *hw,	527	static void iwlagn_mac_update_tkip_key(struct ieee80211_hw *hw,

drivers/net/wireless/iwlwifi/dvm/main.c+1−1

@@ -2113,7 +2113,7 @@ static void iwl_free_skb(struct iwl_op_mode op_mode, struct sk_buff skb) · 2112 unmodified lines
2113		2113
2114	info = IEEE80211_SKB_CB(skb);	2114	info = IEEE80211_SKB_CB(skb);
2115	iwl_trans_free_tx_cmd(priv->trans, info->driver_data[1]);	2115	iwl_trans_free_tx_cmd(priv->trans, info->driver_data[1]);
2116	dev_kfree_skb_any(skb);	2116	ieee80211_free_txskb(priv->hw, skb);
2117	}	2117	}
2118		2118
2119	static void iwl_set_hw_rfkill_state(struct iwl_op_mode *op_mode, bool state)	2119	static void iwl_set_hw_rfkill_state(struct iwl_op_mode *op_mode, bool state)

drivers/net/wireless/iwlwifi/pcie/rx.c+21−2

@@ -321,6 +321,14 @@ static void iwl_rx_allocate(struct iwl_trans *trans, gfp_t priority) · 320 unmodified lines
321	dma_map_page(trans->dev, page, 0,	321	dma_map_page(trans->dev, page, 0,
322	PAGE_SIZE << trans_pcie->rx_page_order,	322	PAGE_SIZE << trans_pcie->rx_page_order,
323	DMA_FROM_DEVICE);	323	DMA_FROM_DEVICE);
		324	if (dma_mapping_error(trans->dev, rxb->page_dma)) {
		325	rxb->page = NULL;
		326	spin_lock_irqsave(&rxq->lock, flags);
		327	list_add(&rxb->list, &rxq->rx_used);
		328	spin_unlock_irqrestore(&rxq->lock, flags);
		329	__free_pages(page, trans_pcie->rx_page_order);
		330	return;
		331	}
324	/* dma address must be no more than 36 bits */	332	/* dma address must be no more than 36 bits */
325	BUG_ON(rxb->page_dma & ~DMA_BIT_MASK(36));	333	BUG_ON(rxb->page_dma & ~DMA_BIT_MASK(36));
326	/* and also 256 byte aligned! */	334	/* and also 256 byte aligned! */
@@ -489,8 +497,19 @@ static void iwl_rx_handle_rxbuf(struct iwl_trans *trans, · 162 unmodified lines
489	dma_map_page(trans->dev, rxb->page, 0,	497	dma_map_page(trans->dev, rxb->page, 0,
490	PAGE_SIZE << trans_pcie->rx_page_order,	498	PAGE_SIZE << trans_pcie->rx_page_order,
491	DMA_FROM_DEVICE);	499	DMA_FROM_DEVICE);
492	list_add_tail(&rxb->list, &rxq->rx_free);	500	if (dma_mapping_error(trans->dev, rxb->page_dma)) {
493	rxq->free_count++;	501	/*
		502	* free the page(s) as well to not break
		503	* the invariant that the items on the used
		504	* list have no page(s)
		505	*/
		506	__free_pages(rxb->page, trans_pcie->rx_page_order);
		507	rxb->page = NULL;
		508	list_add_tail(&rxb->list, &rxq->rx_used);
		509	} else {
		510	list_add_tail(&rxb->list, &rxq->rx_free);
		511	rxq->free_count++;
		512	}
494	} else	513	} else
495	list_add_tail(&rxb->list, &rxq->rx_used);	514	list_add_tail(&rxb->list, &rxq->rx_used);
496	spin_unlock_irqrestore(&rxq->lock, flags);	515	spin_unlock_irqrestore(&rxq->lock, flags);

drivers/pci/bus.c+0−3

 		} else
 			next = dev->bus_list.next;
-		/* Run device routines with the device locked */
-		device_lock(&dev->dev);
 		retval = cb(dev, userdata);
-		device_unlock(&dev->dev);
 		if (retval)
 			break;
 	}

drivers/pci/pci-driver.c+2−10

 	struct pci_dev *pci_dev = to_pci_dev(dev);
 	struct pci_driver *drv = pci_dev->driver;
+	pm_runtime_resume(dev);
 	if (drv && drv->shutdown)
 		drv->shutdown(pci_dev);
 	pci_msi_shutdown(pci_dev);
 	 * continue to do DMA
 	 */
 	pci_disable_device(pci_dev);
-	/*
-	 * Devices may be enabled to wake up by runtime PM, but they need not
-	 * be supposed to wake up the system from its "power off" state (e.g.
-	 * ACPI S5).  Therefore disable wakeup for all devices that aren't
-	 * supposed to wake up the system at this point.  The state argument
-	 * will be ignored by pci_enable_wake().
-	 */
-	if (!device_may_wakeup(dev))
-		pci_enable_wake(pci_dev, PCI_UNKNOWN, false);
 }
 #ifdef CONFIG_PM

drivers/pci/pci-sysfs.c+0−34

@@ -458,40 +458,6 @@ boot_vga_show(struct device dev, struct device_attribute attr, char *buf) · 457 unmodified lines
458	}	458	}
459	struct device_attribute vga_attr = __ATTR_RO(boot_vga);	459	struct device_attribute vga_attr = __ATTR_RO(boot_vga);
460		460
461	static void
462	pci_config_pm_runtime_get(struct pci_dev *pdev)
463	{
464	struct device *dev = &pdev->dev;
465	struct device *parent = dev->parent;
466
467	if (parent)
468	pm_runtime_get_sync(parent);
469	pm_runtime_get_noresume(dev);
470	/*
471	* pdev->current_state is set to PCI_D3cold during suspending,
472	* so wait until suspending completes
473	*/
474	pm_runtime_barrier(dev);
475	/*
476	* Only need to resume devices in D3cold, because config
477	* registers are still accessible for devices suspended but
478	* not in D3cold.
479	*/
480	if (pdev->current_state == PCI_D3cold)
481	pm_runtime_resume(dev);
482	}
483
484	static void
485	pci_config_pm_runtime_put(struct pci_dev *pdev)
486	{
487	struct device *dev = &pdev->dev;
488	struct device *parent = dev->parent;
489
490	pm_runtime_put(dev);
491	if (parent)
492	pm_runtime_put_sync(parent);
493	}
494
495	static ssize_t	461	static ssize_t
496	pci_read_config(struct file filp, struct kobject kobj,	462	pci_read_config(struct file filp, struct kobject kobj,
497	struct bin_attribute *bin_attr,	463	struct bin_attribute *bin_attr,

drivers/pci/pci.c+32−0

@@ -1858,6 +1858,38 @@ bool pci_dev_run_wake(struct pci_dev *dev) · 1857 unmodified lines
1858	}	1858	}
1859	EXPORT_SYMBOL_GPL(pci_dev_run_wake);	1859	EXPORT_SYMBOL_GPL(pci_dev_run_wake);
1860		1860
		1861	void pci_config_pm_runtime_get(struct pci_dev *pdev)
		1862	{
		1863	struct device *dev = &pdev->dev;
		1864	struct device *parent = dev->parent;
		1865
		1866	if (parent)
		1867	pm_runtime_get_sync(parent);
		1868	pm_runtime_get_noresume(dev);
		1869	/*
		1870	* pdev->current_state is set to PCI_D3cold during suspending,
		1871	* so wait until suspending completes
		1872	*/
		1873	pm_runtime_barrier(dev);
		1874	/*
		1875	* Only need to resume devices in D3cold, because config
		1876	* registers are still accessible for devices suspended but
		1877	* not in D3cold.
		1878	*/
		1879	if (pdev->current_state == PCI_D3cold)
		1880	pm_runtime_resume(dev);
		1881	}
		1882
		1883	void pci_config_pm_runtime_put(struct pci_dev *pdev)
		1884	{
		1885	struct device *dev = &pdev->dev;
		1886	struct device *parent = dev->parent;
		1887
		1888	pm_runtime_put(dev);
		1889	if (parent)
		1890	pm_runtime_put_sync(parent);
		1891	}
		1892
1861	/**	1893	/**
1862	* pci_pm_init - Initialize PM functions of given PCI device	1894	* pci_pm_init - Initialize PM functions of given PCI device
1863	* @dev: PCI device to handle.	1895	* @dev: PCI device to handle.

drivers/pci/pci.h+2−0

 extern int pci_finish_runtime_suspend(struct pci_dev *dev);
 extern int __pci_pme_wakeup(struct pci_dev *dev, void *ign);
 extern void pci_wakeup_bus(struct pci_bus *bus);
+extern void pci_config_pm_runtime_get(struct pci_dev *dev);
+extern void pci_config_pm_runtime_put(struct pci_dev *dev);
 extern void pci_pm_init(struct pci_dev *dev);
 extern void platform_pci_wakeup_init(struct pci_dev *dev);
 extern void pci_allocate_cap_save_buffers(struct pci_dev *dev);

drivers/pci/pcie/aer/aerdrv_core.c+16−4

 	struct aer_broadcast_data *result_data;
 	result_data = (struct aer_broadcast_data *) data;
+	device_lock(&dev->dev);
 	dev->error_state = result_data->state;
 	if (!dev->driver ||
 				   dev->driver ?
 				   "no AER-aware driver" : "no driver");
 		}
-		return 0;
+		goto out;
 	}
 	err_handler = dev->driver->err_handler;
 	vote = err_handler->error_detected(dev, result_data->state);
 	result_data->result = merge_result(result_data->result, vote);
+out:
+	device_unlock(&dev->dev);
 	return 0;
 }
 	struct aer_broadcast_data *result_data;
 	result_data = (struct aer_broadcast_data *) data;
+	device_lock(&dev->dev);
 	if (!dev->driver ||
 		!dev->driver->err_handler ||
 		!dev->driver->err_handler->mmio_enabled)
-		return 0;
+		goto out;
 	err_handler = dev->driver->err_handler;
 	vote = err_handler->mmio_enabled(dev);
 	result_data->result = merge_result(result_data->result, vote);
+out:
+	device_unlock(&dev->dev);
 	return 0;
 }
 	struct aer_broadcast_data *result_data;
 	result_data = (struct aer_broadcast_data *) data;
+	device_lock(&dev->dev);
 	if (!dev->driver ||
 		!dev->driver->err_handler ||
 		!dev->driver->err_handler->slot_reset)
-		return 0;
+		goto out;
 	err_handler = dev->driver->err_handler;
 	vote = err_handler->slot_reset(dev);
 	result_data->result = merge_result(result_data->result, vote);
+out:
+	device_unlock(&dev->dev);
 	return 0;
 }
 {
 	const struct pci_error_handlers *err_handler;
+	device_lock(&dev->dev);
 	dev->error_state = pci_channel_io_normal;
 	if (!dev->driver ||
 		!dev->driver->err_handler ||
 		!dev->driver->err_handler->resume)
-		return 0;
+		goto out;
 	err_handler = dev->driver->err_handler;
 	err_handler->resume(dev);
+out:
+	device_unlock(&dev->dev);
 	return 0;
 }

drivers/pci/pcie/portdrv_core.c+2−1

@@ -272,7 +272,8 @@ static int get_port_device_capability(struct pci_dev *dev) · 271 unmodified lines
272	}	272	}
273		273
274	/* Hot-Plug Capable */	274	/* Hot-Plug Capable */
275	if (cap_mask & PCIE_PORT_SERVICE_HP) {	275	if ((cap_mask & PCIE_PORT_SERVICE_HP) &&
		276	dev->pcie_flags_reg & PCI_EXP_FLAGS_SLOT) {
276	pcie_capability_read_dword(dev, PCI_EXP_SLTCAP, &reg32);	277	pcie_capability_read_dword(dev, PCI_EXP_SLTCAP, &reg32);
277	if (reg32 & PCI_EXP_SLTCAP_HPC) {	278	if (reg32 & PCI_EXP_SLTCAP_HPC) {
278	services \|= PCIE_PORT_SERVICE_HP;	279	services \|= PCIE_PORT_SERVICE_HP;

drivers/pci/proc.c+8−0

 	if (!access_ok(VERIFY_WRITE, buf, cnt))
 		return -EINVAL;
+	pci_config_pm_runtime_get(dev);
 	if ((pos & 1) && cnt) {
 		unsigned char val;
 		pci_user_read_config_byte(dev, pos, &val);
 		cnt--;
 	}
+	pci_config_pm_runtime_put(dev);
 	*ppos = pos;
 	return nbytes;
 }
 	if (!access_ok(VERIFY_READ, buf, cnt))
 		return -EINVAL;
+	pci_config_pm_runtime_get(dev);
 	if ((pos & 1) && cnt) {
 		unsigned char val;
 		__get_user(val, buf);
 		cnt--;
 	}
+	pci_config_pm_runtime_put(dev);
 	*ppos = pos;
 	i_size_write(ino, dp->size);
 	return nbytes;

drivers/pinctrl/Kconfig+2−0

 config PINCTRL_SAMSUNG
 	bool "Samsung pinctrl driver"
+	depends on OF && GPIOLIB
 	select PINMUX
 	select PINCONF
 config PINCTRL_EXYNOS4
 	bool "Pinctrl driver data for Exynos4 SoC"
+	depends on OF && GPIOLIB
 	select PINCTRL_SAMSUNG
 config PINCTRL_MVEBU

drivers/pinctrl/spear/pinctrl-spear.c+1−1

@@ -244,7 +244,7 @@ static int spear_pinctrl_endisable(struct pinctrl_dev *pctldev, · 243 unmodified lines
244	else	244	else
245	temp = ~muxreg->val;	245	temp = ~muxreg->val;
246		246
247	val \|= temp;	247	val \|= muxreg->mask & temp;
248	pmx_writel(pmx, val, muxreg->reg);	248	pmx_writel(pmx, val, muxreg->reg);
249	}	249	}
250	}	250	}

drivers/pinctrl/spear/pinctrl-spear1310.c+320−45

 };
 /* registers */
-#define PERIP_CFG					0x32C
+#define PERIP_CFG					0x3B0
-	#define MCIF_SEL_SHIFT				3
+	#define MCIF_SEL_SHIFT				5
 	#define MCIF_SEL_SD				(0x1 << MCIF_SEL_SHIFT)
 	#define MCIF_SEL_CF				(0x2 << MCIF_SEL_SHIFT)
 	#define MCIF_SEL_XD				(0x3 << MCIF_SEL_SHIFT)
 	#define PMX_SSP0_CS0_MASK			(1 << 29)
 	#define PMX_SSP0_CS1_2_MASK			(1 << 30)
+#define PAD_DIRECTION_SEL_0				0x65C
+#define PAD_DIRECTION_SEL_1				0x660
+#define PAD_DIRECTION_SEL_2				0x664
 /* combined macros */
 #define PMX_GMII_MASK		(PMX_GMIICLK_MASK |			\
 				PMX_GMIICOL_CRS_XFERER_MIITXCLK_MASK |	\
 		.reg = PAD_FUNCTION_EN_0,
 		.mask = PMX_I2C0_MASK,
 		.val = PMX_I2C0_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_0,
+		.mask = PMX_I2C0_MASK,
+		.val = PMX_I2C0_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_0,
 		.mask = PMX_SSP0_MASK,
 		.val = PMX_SSP0_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_0,
+		.mask = PMX_SSP0_MASK,
+		.val = PMX_SSP0_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_2,
 		.mask = PMX_SSP0_CS0_MASK,
 		.val = PMX_SSP0_CS0_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_2,
+		.mask = PMX_SSP0_CS0_MASK,
+		.val = PMX_SSP0_CS0_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_2,
 		.mask = PMX_SSP0_CS1_2_MASK,
 		.val = PMX_SSP0_CS1_2_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_2,
+		.mask = PMX_SSP0_CS1_2_MASK,
+		.val = PMX_SSP0_CS1_2_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_0,
 		.mask = PMX_I2S0_MASK,
 		.val = PMX_I2S0_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_0,
+		.mask = PMX_I2S0_MASK,
+		.val = PMX_I2S0_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_1,
 		.mask = PMX_I2S1_MASK,
 		.val = PMX_I2S1_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_1,
+		.mask = PMX_I2S1_MASK,
+		.val = PMX_I2S1_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_0,
 		.mask = PMX_CLCD1_MASK,
 		.val = PMX_CLCD1_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_0,
+		.mask = PMX_CLCD1_MASK,
+		.val = PMX_CLCD1_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_1,
 		.mask = PMX_CLCD2_MASK,
 		.val = PMX_CLCD2_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_1,
+		.mask = PMX_CLCD2_MASK,
+		.val = PMX_CLCD2_MASK,
 	},
 };
 	.nmodemuxs = ARRAY_SIZE(clcd_high_res_modemux),
 };
-static const char *const clcd_grps[] = { "clcd_grp", "clcd_high_res" };
+static const char *const clcd_grps[] = { "clcd_grp", "clcd_high_res_grp" };
 static struct spear_function clcd_function = {
 	.name = "clcd",
 	.groups = clcd_grps,
 		.reg = PAD_FUNCTION_EN_1,
 		.mask = PMX_EGPIO_1_GRP_MASK,
 		.val = PMX_EGPIO_1_GRP_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_0,
+		.mask = PMX_EGPIO_0_GRP_MASK,
+		.val = PMX_EGPIO_0_GRP_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_1,
+		.mask = PMX_EGPIO_1_GRP_MASK,
+		.val = PMX_EGPIO_1_GRP_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_0,
 		.mask = PMX_SMI_MASK,
 		.val = PMX_SMI_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_0,
+		.mask = PMX_SMI_MASK,
+		.val = PMX_SMI_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_1,
 		.mask = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK,
 		.val = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_0,
+		.mask = PMX_SMI_MASK,
+		.val = PMX_SMI_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_1,
+		.mask = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK,
+		.val = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_0,
 		.mask = PMX_GMII_MASK,
 		.val = PMX_GMII_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_0,
+		.mask = PMX_GMII_MASK,
+		.val = PMX_GMII_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_2,
 		.mask = PMX_RGMII_REG2_MASK,
 		.val = 0,
+	}, {
+		.reg = PAD_DIRECTION_SEL_0,
+		.mask = PMX_RGMII_REG0_MASK,
+		.val = PMX_RGMII_REG0_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_1,
+		.mask = PMX_RGMII_REG1_MASK,
+		.val = PMX_RGMII_REG1_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_2,
+		.mask = PMX_RGMII_REG2_MASK,
+		.val = PMX_RGMII_REG2_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_1,
 		.mask = PMX_SMII_0_1_2_MASK,
 		.val = 0,
+	}, {
+		.reg = PAD_DIRECTION_SEL_1,
+		.mask = PMX_SMII_0_1_2_MASK,
+		.val = PMX_SMII_0_1_2_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_1,
 		.mask = PMX_NFCE2_MASK,
 		.val = 0,
+	}, {
+		.reg = PAD_DIRECTION_SEL_1,
+		.mask = PMX_NFCE2_MASK,
+		.val = PMX_NFCE2_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_1,
 		.mask = PMX_NAND8BIT_1_MASK,
 		.val = PMX_NAND8BIT_1_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_0,
+		.mask = PMX_NAND8BIT_0_MASK,
+		.val = PMX_NAND8BIT_0_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_1,
+		.mask = PMX_NAND8BIT_1_MASK,
+		.val = PMX_NAND8BIT_1_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_1,
 		.mask = PMX_NAND16BIT_1_MASK,
 		.val = PMX_NAND16BIT_1_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_1,
+		.mask = PMX_NAND16BIT_1_MASK,
+		.val = PMX_NAND16BIT_1_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_1,
 		.mask = PMX_NAND_4CHIPS_MASK,
 		.val = PMX_NAND_4CHIPS_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_1,
+		.mask = PMX_NAND_4CHIPS_MASK,
+		.val = PMX_NAND_4CHIPS_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_1,
 		.mask = PMX_KBD_ROWCOL68_MASK,
 		.val = PMX_KBD_ROWCOL68_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_1,
+		.mask = PMX_KBD_ROWCOL68_MASK,
+		.val = PMX_KBD_ROWCOL68_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_0,
 		.mask = PMX_UART0_MASK,
 		.val = PMX_UART0_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_0,
+		.mask = PMX_UART0_MASK,
+		.val = PMX_UART0_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_1,
 		.mask = PMX_UART0_MODEM_MASK,
 		.val = PMX_UART0_MODEM_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_1,
+		.mask = PMX_UART0_MODEM_MASK,
+		.val = PMX_UART0_MODEM_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_1,
 		.mask = PMX_GPT0_TMR0_MASK,
 		.val = PMX_GPT0_TMR0_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_1,
+		.mask = PMX_GPT0_TMR0_MASK,
+		.val = PMX_GPT0_TMR0_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_1,
 		.mask = PMX_GPT0_TMR1_MASK,
 		.val = PMX_GPT0_TMR1_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_1,
+		.mask = PMX_GPT0_TMR1_MASK,
+		.val = PMX_GPT0_TMR1_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_1,
 		.mask = PMX_GPT1_TMR0_MASK,
 		.val = PMX_GPT1_TMR0_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_1,
+		.mask = PMX_GPT1_TMR0_MASK,
+		.val = PMX_GPT1_TMR0_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_1,
 		.mask = PMX_GPT1_TMR1_MASK,
 		.val = PMX_GPT1_TMR1_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_1,
+		.mask = PMX_GPT1_TMR1_MASK,
+		.val = PMX_GPT1_TMR1_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_2,			\
 		.mask = PMX_MCIFALL_2_MASK,			\
 		.val = PMX_MCIFALL_2_MASK,			\
+	}, {							\
+		.reg = PAD_DIRECTION_SEL_0,			\
+		.mask = PMX_MCI_DATA8_15_MASK,			\
+		.val = PMX_MCI_DATA8_15_MASK,			\
+	}, {							\
+		.reg = PAD_DIRECTION_SEL_1,			\
+		.mask = PMX_MCIFALL_1_MASK | PMX_NFWPRT1_MASK |	\
+			PMX_NFWPRT2_MASK,			\
+		.val = PMX_MCIFALL_1_MASK | PMX_NFWPRT1_MASK |  \
+			PMX_NFWPRT2_MASK,			\
+	}, {							\
+		.reg = PAD_DIRECTION_SEL_2,			\
+		.mask = PMX_MCIFALL_2_MASK,			\
+		.val = PMX_MCIFALL_2_MASK,			\
 	}
 /* sdhci device */
 		.reg = PAD_FUNCTION_EN_2,
 		.mask = PMX_TOUCH_XY_MASK,
 		.val = PMX_TOUCH_XY_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_2,
+		.mask = PMX_TOUCH_XY_MASK,
+		.val = PMX_TOUCH_XY_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_0,
 		.mask = PMX_I2C0_MASK,
 		.val = 0,
+	}, {
+		.reg = PAD_DIRECTION_SEL_0,
+		.mask = PMX_I2C0_MASK,
+		.val = PMX_I2C0_MASK,
 	},
 };
 		.mask = PMX_MCIDATA1_MASK |
 			PMX_MCIDATA2_MASK,
 		.val = 0,
+	}, {
+		.reg = PAD_DIRECTION_SEL_1,
+		.mask = PMX_MCIDATA1_MASK |
+			PMX_MCIDATA2_MASK,
+		.val = PMX_MCIDATA1_MASK |
+			PMX_MCIDATA2_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_0,
 		.mask = PMX_I2S0_MASK,
 		.val = 0,
+	}, {
+		.reg = PAD_DIRECTION_SEL_0,
+		.mask = PMX_I2S0_MASK,
+		.val = PMX_I2S0_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_0,
 		.mask = PMX_I2S0_MASK | PMX_CLCD1_MASK,
 		.val = 0,
+	}, {
+		.reg = PAD_DIRECTION_SEL_0,
+		.mask = PMX_I2S0_MASK | PMX_CLCD1_MASK,
+		.val = PMX_I2S0_MASK | PMX_CLCD1_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_0,
 		.mask = PMX_CLCD1_MASK,
 		.val = 0,
+	}, {
+		.reg = PAD_DIRECTION_SEL_0,
+		.mask = PMX_CLCD1_MASK,
+		.val = PMX_CLCD1_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_0,
 		.mask = PMX_CLCD1_MASK,
 		.val = 0,
+	}, {
+		.reg = PAD_DIRECTION_SEL_0,
+		.mask = PMX_CLCD1_MASK,
+		.val = PMX_CLCD1_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_0,
 		.mask = PMX_CLCD1_MASK,
 		.val = 0,
+	}, {
+		.reg = PAD_DIRECTION_SEL_0,
+		.mask = PMX_CLCD1_MASK,
+		.val = PMX_CLCD1_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_0,
 		.mask = PMX_CLCD1_MASK | PMX_SMI_MASK,
 		.val = 0,
+	}, {
+		.reg = PAD_DIRECTION_SEL_0,
+		.mask = PMX_CLCD1_MASK | PMX_SMI_MASK,
+		.val = PMX_CLCD1_MASK | PMX_SMI_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_1,
 		.mask = PMX_I2S1_MASK | PMX_MCIDATA3_MASK,
 		.val = 0,
+	}, {
+		.reg = PAD_DIRECTION_SEL_1,
+		.mask = PMX_I2S1_MASK | PMX_MCIDATA3_MASK,
+		.val = PMX_I2S1_MASK | PMX_MCIDATA3_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_0,
 		.mask = PMX_SMI_MASK,
 		.val = 0,
+	}, {
+		.reg = PAD_DIRECTION_SEL_0,
+		.mask = PMX_SMI_MASK,
+		.val = PMX_SMI_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_2,
 		.mask = PMX_MCIDATA5_MASK,
 		.val = 0,
+	}, {
+		.reg = PAD_DIRECTION_SEL_1,
+		.mask = PMX_MCIDATA4_MASK,
+		.val = PMX_MCIDATA4_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_2,
+		.mask = PMX_MCIDATA5_MASK,
+		.val = PMX_MCIDATA5_MASK,
 	},
 };
 		.mask = PMX_MCIDATA6_MASK |
 			PMX_MCIDATA7_MASK,
 		.val = 0,
+	}, {
+		.reg = PAD_DIRECTION_SEL_2,
+		.mask = PMX_MCIDATA6_MASK |
+			PMX_MCIDATA7_MASK,
+		.val = PMX_MCIDATA6_MASK |
+			PMX_MCIDATA7_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_1,
 		.mask = PMX_KBD_ROWCOL25_MASK,
 		.val = 0,
+	}, {
+		.reg = PAD_DIRECTION_SEL_1,
+		.mask = PMX_KBD_ROWCOL25_MASK,
+		.val = PMX_KBD_ROWCOL25_MASK,
 	},
 };
 		.mask = PMX_MCIIORDRE_MASK |
 			PMX_MCIIOWRWE_MASK,
 		.val = 0,
+	}, {
+		.reg = PAD_DIRECTION_SEL_2,
+		.mask = PMX_MCIIORDRE_MASK |
+			PMX_MCIIOWRWE_MASK,
+		.val = PMX_MCIIORDRE_MASK |
+			PMX_MCIIOWRWE_MASK,
 	},
 };
 		.mask = PMX_MCIRESETCF_MASK |
 			PMX_MCICS0CE_MASK,
 		.val = 0,
+	}, {
+		.reg = PAD_DIRECTION_SEL_2,
+		.mask = PMX_MCIRESETCF_MASK |
+			PMX_MCICS0CE_MASK,
+		.val = PMX_MCIRESETCF_MASK |
+			PMX_MCICS0CE_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_1,
 		.mask = PMX_NFRSTPWDWN3_MASK,
 		.val = 0,
+	}, {
+		.reg = PAD_DIRECTION_SEL_0,
+		.mask = PMX_NFRSTPWDWN2_MASK,
+		.val = PMX_NFRSTPWDWN2_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_1,
+		.mask = PMX_NFRSTPWDWN3_MASK,
+		.val = PMX_NFRSTPWDWN3_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_2,
 		.mask = PMX_MCICFINTR_MASK | PMX_MCIIORDY_MASK,
 		.val = 0,
+	}, {
+		.reg = PAD_DIRECTION_SEL_2,
+		.mask = PMX_MCICFINTR_MASK | PMX_MCIIORDY_MASK,
+		.val = PMX_MCICFINTR_MASK | PMX_MCIIORDY_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_2,
 		.mask = PMX_MCICS1_MASK | PMX_MCIDMAACK_MASK,
 		.val = 0,
+	}, {
+		.reg = PAD_DIRECTION_SEL_2,
+		.mask = PMX_MCICS1_MASK | PMX_MCIDMAACK_MASK,
+		.val = PMX_MCICS1_MASK | PMX_MCIDMAACK_MASK,
 	},
 };
 		.reg = PAD_FUNCTION_EN_1,
 		.mask = PMX_KBD_ROWCOL25_MASK,
 		.val = 0,
+	}, {
+		.reg = PAD_DIRECTION_SEL_1,
+		.mask = PMX_KBD_ROWCOL25_MASK,
+		.val = PMX_KBD_ROWCOL25_MASK,
 	},
 };
 	.ngroups = ARRAY_SIZE(can1_grps),
 };
-/* Pad multiplexing for pci device */
+/* Pad multiplexing for (ras-ip) pci device */
-static const unsigned pci_sata_pins[] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 18,
+static const unsigned pci_pins[] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 18,
 	19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36,
 	37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54,
 	55, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99 };
-#define PCI_SATA_MUXREG				\
-	{					\
-		.reg = PAD_FUNCTION_EN_0,	\
-		.mask = PMX_MCI_DATA8_15_MASK,	\
-		.val = 0,			\
-	}, {					\
-		.reg = PAD_FUNCTION_EN_1,	\
-		.mask = PMX_PCI_REG1_MASK,	\
-		.val = 0,			\
-	}, {					\
-		.reg = PAD_FUNCTION_EN_2,	\
-		.mask = PMX_PCI_REG2_MASK,	\
-		.val = 0,			\
-	}
-/* pad multiplexing for pcie0 device */
+static struct spear_muxreg pci_muxreg[] = {
+	{
+		.reg = PAD_FUNCTION_EN_0,
+		.mask = PMX_MCI_DATA8_15_MASK,
+		.val = 0,
+	}, {
+		.reg = PAD_FUNCTION_EN_1,
+		.mask = PMX_PCI_REG1_MASK,
+		.val = 0,
+	}, {
+		.reg = PAD_FUNCTION_EN_2,
+		.mask = PMX_PCI_REG2_MASK,
+		.val = 0,
+	}, {
+		.reg = PAD_DIRECTION_SEL_0,
+		.mask = PMX_MCI_DATA8_15_MASK,
+		.val = PMX_MCI_DATA8_15_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_1,
+		.mask = PMX_PCI_REG1_MASK,
+		.val = PMX_PCI_REG1_MASK,
+	}, {
+		.reg = PAD_DIRECTION_SEL_2,
+		.mask = PMX_PCI_REG2_MASK,
+		.val = PMX_PCI_REG2_MASK,
+	},
+};
+static struct spear_modemux pci_modemux[] = {
+	{
+		.muxregs = pci_muxreg,
+		.nmuxregs = ARRAY_SIZE(pci_muxreg),
+	},
+};
+static struct spear_pingroup pci_pingroup = {
+	.name = "pci_grp",
+	.pins = pci_pins,
+	.npins = ARRAY_SIZE(pci_pins),
+	.modemuxs = pci_modemux,
+	.nmodemuxs = ARRAY_SIZE(pci_modemux),
+};
+static const char *const pci_grps[] = { "pci_grp" };
+static struct spear_function pci_function = {
+	.name = "pci",
+	.groups = pci_grps,
+	.ngroups = ARRAY_SIZE(pci_grps),
+};
+/* pad multiplexing for (fix-part) pcie0 device */
 static struct spear_muxreg pcie0_muxreg[] = {
-	PCI_SATA_MUXREG,
 	{
 		.reg = PCIE_SATA_CFG,
 		.mask = PCIE_CFG_VAL(0),
 static struct spear_pingroup pcie0_pingroup = {
 	.name = "pcie0_grp",
-	.pins = pci_sata_pins,
-	.npins = ARRAY_SIZE(pci_sata_pins),
 	.modemuxs = pcie0_modemux,
 	.nmodemuxs = ARRAY_SIZE(pcie0_modemux),
 };
-/* pad multiplexing for pcie1 device */
+/* pad multiplexing for (fix-part) pcie1 device */
 static struct spear_muxreg pcie1_muxreg[] = {
-	PCI_SATA_MUXREG,
 	{
 		.reg = PCIE_SATA_CFG,
 		.mask = PCIE_CFG_VAL(1),
 static struct spear_pingroup pcie1_pingroup = {
 	.name = "pcie1_grp",
-	.pins = pci_sata_pins,
-	.npins = ARRAY_SIZE(pci_sata_pins),
 	.modemuxs = pcie1_modemux,
 	.nmodemuxs = ARRAY_SIZE(pcie1_modemux),
 };
-/* pad multiplexing for pcie2 device */
+/* pad multiplexing for (fix-part) pcie2 device */
 static struct spear_muxreg pcie2_muxreg[] = {
-	PCI_SATA_MUXREG,
 	{
 		.reg = PCIE_SATA_CFG,
 		.mask = PCIE_CFG_VAL(2),
 static struct spear_pingroup pcie2_pingroup = {
 	.name = "pcie2_grp",
-	.pins = pci_sata_pins,
-	.npins = ARRAY_SIZE(pci_sata_pins),
 	.modemuxs = pcie2_modemux,
 	.nmodemuxs = ARRAY_SIZE(pcie2_modemux),
 };
-static const char *const pci_grps[] = { "pcie0_grp", "pcie1_grp", "pcie2_grp" };
+static const char *const pcie_grps[] = { "pcie0_grp", "pcie1_grp", "pcie2_grp"
-static struct spear_function pci_function = {
+};
-	.name = "pci",
+static struct spear_function pcie_function = {
-	.groups = pci_grps,
+	.name = "pci_express",
-	.ngroups = ARRAY_SIZE(pci_grps),
+	.groups = pcie_grps,
+	.ngroups = ARRAY_SIZE(pcie_grps),
 };
 /* pad multiplexing for sata0 device */
 static struct spear_muxreg sata0_muxreg[] = {
-	PCI_SATA_MUXREG,
 	{
 		.reg = PCIE_SATA_CFG,
 		.mask = SATA_CFG_VAL(0),
 static struct spear_pingroup sata0_pingroup = {
 	.name = "sata0_grp",
-	.pins = pci_sata_pins,
-	.npins = ARRAY_SIZE(pci_sata_pins),
 	.modemuxs = sata0_modemux,
 	.nmodemuxs = ARRAY_SIZE(sata0_modemux),
 };
 /* pad multiplexing for sata1 device */
 static struct spear_muxreg sata1_muxreg[] = {
-	PCI_SATA_MUXREG,
 	{
 		.reg = PCIE_SATA_CFG,
 		.mask = SATA_CFG_VAL(1),
 static struct spear_pingroup sata1_pingroup = {
 	.name = "sata1_grp",
-	.pins = pci_sata_pins,
-	.npins = ARRAY_SIZE(pci_sata_pins),
 	.modemuxs = sata1_modemux,
 	.nmodemuxs = ARRAY_SIZE(sata1_modemux),
 };
 /* pad multiplexing for sata2 device */
 static struct spear_muxreg sata2_muxreg[] = {
-	PCI_SATA_MUXREG,
 	{
 		.reg = PCIE_SATA_CFG,
 		.mask = SATA_CFG_VAL(2),
 static struct spear_pingroup sata2_pingroup = {
 	.name = "sata2_grp",
-	.pins = pci_sata_pins,
-	.npins = ARRAY_SIZE(pci_sata_pins),
 	.modemuxs = sata2_modemux,
 	.nmodemuxs = ARRAY_SIZE(sata2_modemux),
 };
 			PMX_KBD_COL0_MASK | PMX_NFIO8_15_MASK | PMX_NFCE1_MASK |
 			PMX_NFCE2_MASK,
 		.val = 0,
+	}, {
+		.reg = PAD_DIRECTION_SEL_1,
+		.mask = PMX_KBD_ROWCOL25_MASK | PMX_KBD_COL1_MASK |
+			PMX_KBD_COL0_MASK | PMX_NFIO8_15_MASK | PMX_NFCE1_MASK |
+			PMX_NFCE2_MASK,
+		.val = PMX_KBD_ROWCOL25_MASK | PMX_KBD_COL1_MASK |
+			PMX_KBD_COL0_MASK | PMX_NFIO8_15_MASK | PMX_NFCE1_MASK |
+			PMX_NFCE2_MASK,
 	},
 };
 		.mask = PMX_MCIADDR0ALE_MASK | PMX_MCIADDR2_MASK |
 			PMX_MCICECF_MASK | PMX_MCICEXD_MASK,
 		.val = 0,
+	}, {
+		.reg = PAD_DIRECTION_SEL_2,
+		.mask = PMX_MCIADDR0ALE_MASK | PMX_MCIADDR2_MASK |
+			PMX_MCICECF_MASK | PMX_MCICEXD_MASK,
+		.val = PMX_MCIADDR0ALE_MASK | PMX_MCIADDR2_MASK |
+			PMX_MCICECF_MASK | PMX_MCICEXD_MASK,
 	},
 };
 		.mask = PMX_MCICDCF1_MASK | PMX_MCICDCF2_MASK | PMX_MCICDXD_MASK
 			| PMX_MCILEDS_MASK,
 		.val = 0,
+	}, {
+		.reg = PAD_DIRECTION_SEL_2,
+		.mask = PMX_MCICDCF1_MASK | PMX_MCICDCF2_MASK | PMX_MCICDXD_MASK
+			| PMX_MCILEDS_MASK,
+		.val = PMX_MCICDCF1_MASK | PMX_MCICDCF2_MASK | PMX_MCICDXD_MASK
+			| PMX_MCILEDS_MASK,
 	},
 };
 	&can0_dis_sd_pingroup,
 	&can1_dis_sd_pingroup,
 	&can1_dis_kbd_pingroup,
+	&pci_pingroup,
 	&pcie0_pingroup,
 	&pcie1_pingroup,
 	&pcie2_pingroup,
 	&can0_function,
 	&can1_function,
 	&pci_function,
+	&pcie_function,
 	&sata_function,
 	&ssp1_function,
 	&gpt64_function,

drivers/pinctrl/spear/pinctrl-spear1340.c+39−2

@@ -213,7 +213,7 @@ static const struct pinctrl_pin_desc spear1340_pins[] = { · 212 unmodified lines
213	* Pad multiplexing for making all pads as gpio's. This is done to override the	213	* Pad multiplexing for making all pads as gpio's. This is done to override the
214	* values passed from bootloader and start from scratch.	214	* values passed from bootloader and start from scratch.
215	*/	215	*/
216	static const unsigned pads_as_gpio_pins[] = { 251 };	216	static const unsigned pads_as_gpio_pins[] = { 12, 88, 89, 251 };
217	static struct spear_muxreg pads_as_gpio_muxreg[] = {	217	static struct spear_muxreg pads_as_gpio_muxreg[] = {
218	{	218	{
219	.reg = PAD_FUNCTION_EN_1,	219	.reg = PAD_FUNCTION_EN_1,
@@ -1692,7 +1692,43 @@ static struct spear_pingroup clcd_pingroup = { · 1472 unmodified lines
1692	.nmodemuxs = ARRAY_SIZE(clcd_modemux),	1692	.nmodemuxs = ARRAY_SIZE(clcd_modemux),
1693	};	1693	};
1694		1694
1695	static const char *const clcd_grps[] = { "clcd_grp" };	1695	/* Disable cld runtime to save panel damage */
		1696	static struct spear_muxreg clcd_sleep_muxreg[] = {
		1697	{
		1698	.reg = PAD_SHARED_IP_EN_1,
		1699	.mask = ARM_TRACE_MASK \| MIPHY_DBG_MASK,
		1700	.val = 0,
		1701	}, {
		1702	.reg = PAD_FUNCTION_EN_5,
		1703	.mask = CLCD_REG4_MASK \| CLCD_AND_ARM_TRACE_REG4_MASK,
		1704	.val = 0x0,
		1705	}, {
		1706	.reg = PAD_FUNCTION_EN_6,
		1707	.mask = CLCD_AND_ARM_TRACE_REG5_MASK,
		1708	.val = 0x0,
		1709	}, {
		1710	.reg = PAD_FUNCTION_EN_7,
		1711	.mask = CLCD_AND_ARM_TRACE_REG6_MASK,
		1712	.val = 0x0,
		1713	},
		1714	};
		1715
		1716	static struct spear_modemux clcd_sleep_modemux[] = {
		1717	{
		1718	.muxregs = clcd_sleep_muxreg,
		1719	.nmuxregs = ARRAY_SIZE(clcd_sleep_muxreg),
		1720	},
		1721	};
		1722
		1723	static struct spear_pingroup clcd_sleep_pingroup = {
		1724	.name = "clcd_sleep_grp",
		1725	.pins = clcd_pins,
		1726	.npins = ARRAY_SIZE(clcd_pins),
		1727	.modemuxs = clcd_sleep_modemux,
		1728	.nmodemuxs = ARRAY_SIZE(clcd_sleep_modemux),
		1729	};
		1730
		1731	static const char *const clcd_grps[] = { "clcd_grp", "clcd_sleep_grp" };
1696	static struct spear_function clcd_function = {	1732	static struct spear_function clcd_function = {
1697	.name = "clcd",	1733	.name = "clcd",
1698	.groups = clcd_grps,	1734	.groups = clcd_grps,
@@ -1893,6 +1929,7 @@ static struct spear_pingroup *spear1340_pingroups[] = { · 194 unmodified lines
1893	&sdhci_pingroup,	1929	&sdhci_pingroup,
1894	&cf_pingroup,	1930	&cf_pingroup,
1895	&xd_pingroup,	1931	&xd_pingroup,
		1932	&clcd_sleep_pingroup,
1896	&clcd_pingroup,	1933	&clcd_pingroup,
1897	&arm_trace_pingroup,	1934	&arm_trace_pingroup,
1898	&miphy_dbg_pingroup,	1935	&miphy_dbg_pingroup,

drivers/pinctrl/spear/pinctrl-spear320.c+6−2

 		.reg = PMX_CONFIG_REG,
 		.mask = PMX_SSP_CS_MASK,
 		.val = 0,
+	}, {
+		.reg = MODE_CONFIG_REG,
+		.mask = PMX_PWM_MASK,
+		.val = PMX_PWM_MASK,
 	}, {
 		.reg = IP_SEL_PAD_30_39_REG,
 		.mask = PMX_PL_34_MASK,
 };
 /* Pad multiplexing for cadence mii 1_2 as smii or rmii device */
-static const unsigned smii0_1_pins[] = { 10, 11, 13, 14, 15, 16, 17, 18, 19, 20,
+static const unsigned rmii0_1_pins[] = { 10, 11, 13, 14, 15, 16, 17, 18, 19, 20,
 	21, 22, 23, 24, 25, 26, 27 };
-static const unsigned rmii0_1_pins[] = { 10, 11, 21, 22, 23, 24, 25, 26, 27 };
+static const unsigned smii0_1_pins[] = { 10, 11, 21, 22, 23, 24, 25, 26, 27 };
 static struct spear_muxreg mii0_1_muxreg[] = {
 	{
 		.reg = PMX_CONFIG_REG,

drivers/pinctrl/spear/pinctrl-spear3xx.h+1−0

@@ -15,6 +15,7 @@ · 14 unmodified lines
15	#include "pinctrl-spear.h"	15	#include "pinctrl-spear.h"
16		16
17	/* pad mux declarations */	17	/* pad mux declarations */
		18	#define PMX_PWM_MASK (1 << 16)
18	#define PMX_FIRDA_MASK (1 << 14)	19	#define PMX_FIRDA_MASK (1 << 14)
19	#define PMX_I2C_MASK (1 << 13)	20	#define PMX_I2C_MASK (1 << 13)
20	#define PMX_SSP_CS_MASK (1 << 12)	21	#define PMX_SSP_CS_MASK (1 << 12)

drivers/rapidio/rio.c+1−1

@@ -401,7 +401,7 @@ EXPORT_SYMBOL_GPL(rio_release_inb_pwrite); · 400 unmodified lines
401	/**	401	/**
402	* rio_map_inb_region -- Map inbound memory region.	402	* rio_map_inb_region -- Map inbound memory region.
403	* @mport: Master port.	403	* @mport: Master port.
404	* @lstart: physical address of memory region to be mapped	404	* @local: physical address of memory region to be mapped
405	* @rbase: RIO base address assigned to this window	405	* @rbase: RIO base address assigned to this window
406	* @size: Size of the memory region	406	* @size: Size of the memory region
407	* @rflags: Flags for mapping.	407	* @rflags: Flags for mapping.

drivers/regulator/core.c+20−13

 }
 EXPORT_SYMBOL_GPL(regulator_get_exclusive);
-/**
+/* Locks held by regulator_put() */
- * regulator_put - "free" the regulator source
+static void _regulator_put(struct regulator *regulator)
- * @regulator: regulator source
- *
- * Note: drivers must ensure that all regulator_enable calls made on this
- * regulator source are balanced by regulator_disable calls prior to calling
- * this function.
- */
-void regulator_put(struct regulator *regulator)
 {
 	struct regulator_dev *rdev;
 	if (regulator == NULL || IS_ERR(regulator))
 		return;
-	mutex_lock(&regulator_list_mutex);
 	rdev = regulator->rdev;
 	debugfs_remove_recursive(regulator->debugfs);
 	rdev->exclusive = 0;
 	module_put(rdev->owner);
+}
+/**
+ * regulator_put - "free" the regulator source
+ * @regulator: regulator source
+ *
+ * Note: drivers must ensure that all regulator_enable calls made on this
+ * regulator source are balanced by regulator_disable calls prior to calling
+ * this function.
+ */
+void regulator_put(struct regulator *regulator)
+{
+	mutex_lock(&regulator_list_mutex);
+	_regulator_put(regulator);
 	mutex_unlock(&regulator_list_mutex);
 }
 EXPORT_SYMBOL_GPL(regulator_put);
 	if (!(rdev->constraints->valid_ops_mask & REGULATOR_CHANGE_VOLTAGE)) {
 		ret = regulator_get_voltage(regulator);
 		if (ret >= 0)
-			return (min_uV >= ret && ret <= max_uV);
+			return (min_uV <= ret && ret <= max_uV);
 		else
 			return ret;
 	}
 		if (ret != 0) {
 			rdev_err(rdev, "Failed to request enable GPIO%d: %d\n",
 				 config->ena_gpio, ret);
-			goto clean;
+			goto wash;
 		}
 		rdev->ena_gpio = config->ena_gpio;
 scrub:
 	if (rdev->supply)
-		regulator_put(rdev->supply);
+		_regulator_put(rdev->supply);
 	if (rdev->ena_gpio)
 		gpio_free(rdev->ena_gpio);
 	kfree(rdev->constraints);
+wash:
 	device_unregister(&rdev->dev);
 	/* device core frees rdev */
 	rdev = ERR_PTR(ret);

drivers/s390/char/con3215.c+5−7

 #define RAW3215_NR_CCWS	    3
 #define RAW3215_TIMEOUT	    HZ/10     /* time for delayed output */
-#define RAW3215_FIXED	    1	      /* 3215 console device is not be freed */
 #define RAW3215_WORKING	    4	      /* set if a request is being worked on */
 #define RAW3215_THROTTLED   8	      /* set if reading is disabled */
 #define RAW3215_STOPPED	    16	      /* set if writing is disabled */
 	struct tty_struct *tty;
 	tty = tty_port_tty_get(&raw->port);
-	tty_wakeup(tty);
+	if (tty) {
-	tty_kref_put(tty);
+		tty_wakeup(tty);
+		tty_kref_put(tty);
+	}
 }
 /*
 	DECLARE_WAITQUEUE(wait, current);
 	unsigned long flags;
-	if (!(raw->port.flags & ASYNC_INITIALIZED) ||
+	if (!(raw->port.flags & ASYNC_INITIALIZED))
-			(raw->flags & RAW3215_FIXED))
 		return;
 	/* Wait for outstanding requests, then free irq */
 	spin_lock_irqsave(get_ccwdev_lock(raw->cdev), flags);
 	dev_set_drvdata(&cdev->dev, raw);
 	cdev->handler = raw3215_irq;
-	raw->flags |= RAW3215_FIXED;
 	/* Request the console irq */
 	if (raw3215_startup(raw) != 0) {
 		raw3215_free_info(raw);

drivers/s390/cio/css.h+0−3

@@ -112,9 +112,6 @@ extern int for_each_subchannel(int(fn)(struct subchannel_id, void ), void *); · 111 unmodified lines
112	extern void css_reiterate_subchannels(void);	112	extern void css_reiterate_subchannels(void);
113	void css_update_ssd_info(struct subchannel *sch);	113	void css_update_ssd_info(struct subchannel *sch);
114		114
115	#define __MAX_SUBCHANNEL 65535
116	#define __MAX_SSID 3
117
118	struct channel_subsystem {	115	struct channel_subsystem {
119	u8 cssid;	116	u8 cssid;
120	int valid;	117	int valid;

drivers/s390/cio/device.c+1−7

 	}
 	if (device_is_disconnected(cdev))
 		return IO_SCH_REPROBE;
-	if (cdev->online)
+	if (cdev->online && !cdev->private->flags.resuming)
 		return IO_SCH_VERIFY;
 	if (cdev->private->state == DEV_STATE_NOT_OPER)
 		return IO_SCH_UNREG_ATTACH;
 		rc = 0;
 		goto out_unlock;
 	case IO_SCH_VERIFY:
-		if (cdev->private->flags.resuming == 1) {
-			if (cio_enable_subchannel(sch, (u32)(addr_t)sch)) {
-				ccw_device_set_notoper(cdev);
-				break;
-			}
-		}
 		/* Trigger path verification. */
 		io_subchannel_verify(sch);
 		rc = 0;

drivers/s390/cio/idset.c+1−2

@@ -125,8 +125,7 @@ int idset_is_empty(struct idset *set) · 124 unmodified lines
125		125
126	void idset_add_set(struct idset to, struct idset from)	126	void idset_add_set(struct idset to, struct idset from)
127	{	127	{
128	int len = min(__BITOPS_WORDS(to->num_ssid * to->num_id),	128	int len = min(to->num_ssid * to->num_id, from->num_ssid * from->num_id);
129	__BITOPS_WORDS(from->num_ssid * from->num_id));
130		129
131	bitmap_or(to->bitmap, to->bitmap, from->bitmap, len);	130	bitmap_or(to->bitmap, to->bitmap, from->bitmap, len);
132	}	131	}

drivers/s390/net/qeth_core_main.c+22−2

@@ -2942,13 +2942,33 @@ static int qeth_query_ipassists_cb(struct qeth_card *card, · 2941 unmodified lines
2942	QETH_DBF_TEXT(SETUP, 2, "qipasscb");	2942	QETH_DBF_TEXT(SETUP, 2, "qipasscb");
2943		2943
2944	cmd = (struct qeth_ipa_cmd *) data;	2944	cmd = (struct qeth_ipa_cmd *) data;
		2945
		2946	switch (cmd->hdr.return_code) {
		2947	case IPA_RC_NOTSUPP:
		2948	case IPA_RC_L2_UNSUPPORTED_CMD:
		2949	QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
		2950	card->options.ipa4.supported_funcs \|= IPA_SETADAPTERPARMS;
		2951	card->options.ipa6.supported_funcs \|= IPA_SETADAPTERPARMS;
		2952	return -0;
		2953	default:
		2954	if (cmd->hdr.return_code) {
		2955	QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
		2956	"rc=%d\n",
		2957	dev_name(&card->gdev->dev),
		2958	cmd->hdr.return_code);
		2959	return 0;
		2960	}
		2961	}
		2962
2945	if (cmd->hdr.prot_version == QETH_PROT_IPV4) {	2963	if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
2946	card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;	2964	card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
2947	card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;	2965	card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
2948	} else {	2966	} else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
2949	card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;	2967	card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
2950	card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;	2968	card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
2951	}	2969	} else
		2970	QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
		2971	"\n", dev_name(&card->gdev->dev));
2952	QETH_DBF_TEXT(SETUP, 2, "suppenbl");	2972	QETH_DBF_TEXT(SETUP, 2, "suppenbl");
2953	QETH_DBF_TEXT_(SETUP, 2, "%08x", (__u32)cmd->hdr.ipa_supported);	2973	QETH_DBF_TEXT_(SETUP, 2, "%08x", (__u32)cmd->hdr.ipa_supported);
2954	QETH_DBF_TEXT_(SETUP, 2, "%08x", (__u32)cmd->hdr.ipa_enabled);	2974	QETH_DBF_TEXT_(SETUP, 2, "%08x", (__u32)cmd->hdr.ipa_enabled);

drivers/s390/net/qeth_l2_main.c+8−5

 	QETH_DBF_TEXT(SETUP, 2, "doL2init");
 	QETH_DBF_TEXT_(SETUP, 2, "doL2%s", CARD_BUS_ID(card));
-	rc = qeth_query_setadapterparms(card);
+	if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) {
-	if (rc) {
+		rc = qeth_query_setadapterparms(card);
-		QETH_DBF_MESSAGE(2, "could not query adapter parameters on "
+		if (rc) {
-			"device %s: x%x\n", CARD_BUS_ID(card), rc);
+			QETH_DBF_MESSAGE(2, "could not query adapter "
+				"parameters on device %s: x%x\n",
+				CARD_BUS_ID(card), rc);
+		}
 	}
 	if (card->info.type == QETH_CARD_TYPE_IQD ||
 		return -ERESTARTSYS;
 	}
 	rc = qeth_l2_send_delmac(card, &card->dev->dev_addr[0]);
-	if (!rc)
+	if (!rc || (rc == IPA_RC_L2_MAC_NOT_FOUND))
 		rc = qeth_l2_send_setmac(card, addr->sa_data);
 	return rc ? -EINVAL : 0;
 }

drivers/scsi/qlogicpti.c+1−12

 static const struct of_device_id qpti_match[];
 static int __devinit qpti_sbus_probe(struct platform_device *op)
 {
-	const struct of_device_id *match;
-	struct scsi_host_template *tpnt;
 	struct device_node *dp = op->dev.of_node;
 	struct Scsi_Host *host;
 	struct qlogicpti *qpti;
 	static int nqptis;
 	const char *fcode;
-	match = of_match_device(qpti_match, &op->dev);
-	if (!match)
-		return -EINVAL;
-	tpnt = match->data;
 	/* Sometimes Antares cards come up not completely
 	 * setup, and we get a report of a zero IRQ.
 	 */
 	if (op->archdata.irqs[0] == 0)
 		return -ENODEV;
-	host = scsi_host_alloc(tpnt, sizeof(struct qlogicpti));
+	host = scsi_host_alloc(&qpti_template, sizeof(struct qlogicpti));
 	if (!host)
 		return -ENOMEM;
 static const struct of_device_id qpti_match[] = {
 	{
 		.name = "ptisp",
-		.data = &qpti_template,
 	},
 	{
 		.name = "PTI,ptisp",
-		.data = &qpti_template,
 	},
 	{
 		.name = "QLGC,isp",
-		.data = &qpti_template,
 	},
 	{
 		.name = "SUNW,isp",
-		.data = &qpti_template,
 	},
 	{},
 };

drivers/staging/android/android_alarm.h+1−3

 #define ANDROID_ALARM_WAIT                  _IO('a', 1)
 #define ALARM_IOW(c, type, size)            _IOW('a', (c) | ((type) << 4), size)
-#define ALARM_IOR(c, type, size)            _IOR('a', (c) | ((type) << 4), size)
 /* Set alarm */
 #define ANDROID_ALARM_SET(type)             ALARM_IOW(2, type, struct timespec)
 #define ANDROID_ALARM_SET_AND_WAIT(type)    ALARM_IOW(3, type, struct timespec)
-#define ANDROID_ALARM_GET_TIME(type)        ALARM_IOR(4, type, struct timespec)
+#define ANDROID_ALARM_GET_TIME(type)        ALARM_IOW(4, type, struct timespec)
 #define ANDROID_ALARM_SET_RTC               _IOW('a', 5, struct timespec)
 #define ANDROID_ALARM_BASE_CMD(cmd)         (cmd & ~(_IOC(0, 0, 0xf0, 0)))
 #define ANDROID_ALARM_IOCTL_TO_TYPE(cmd)    (_IOC_NR(cmd) >> 4)

drivers/thermal/exynos_thermal.c+1−1

@@ -815,7 +815,7 @@ static struct platform_device_id exynos_tmu_driver_ids[] = { · 814 unmodified lines
815	},	815	},
816	{ },	816	{ },
817	};	817	};
818	MODULE_DEVICE_TABLE(platform, exynos4_tmu_driver_ids);	818	MODULE_DEVICE_TABLE(platform, exynos_tmu_driver_ids);
819		819
820	static inline struct exynos_tmu_platform_data *exynos_get_driver_data(	820	static inline struct exynos_tmu_platform_data *exynos_get_driver_data(
821	struct platform_device *pdev)	821	struct platform_device *pdev)

drivers/thermal/rcar_thermal.c+1−1

@@ -210,7 +210,7 @@ static int rcar_thermal_probe(struct platform_device *pdev) · 209 unmodified lines
210	goto error_free_priv;	210	goto error_free_priv;
211	}	211	}
212		212
213	zone = thermal_zone_device_register("rcar_thermal", 0, priv,	213	zone = thermal_zone_device_register("rcar_thermal", 0, 0, priv,
214	&rcar_thermal_zone_ops, 0, 0);	214	&rcar_thermal_zone_ops, 0, 0);
215	if (IS_ERR(zone)) {	215	if (IS_ERR(zone)) {
216	dev_err(&pdev->dev, "thermal zone device is NULL\n");	216	dev_err(&pdev->dev, "thermal zone device is NULL\n");

drivers/tty/hvc/hvc_console.c+0−7

 {
 	struct hvc_struct *hp = tty->driver_data;
 	unsigned long flags;
-	int temp_open_count;
 	if (!hp)
 		return;
 		return;
 	}
-	temp_open_count = hp->port.count;
 	hp->port.count = 0;
 	spin_unlock_irqrestore(&hp->port.lock, flags);
 	tty_port_tty_set(&hp->port, NULL);
 	if (hp->ops->notifier_hangup)
 		hp->ops->notifier_hangup(hp, hp->data);
-	while(temp_open_count) {
-		--temp_open_count;
-		tty_port_put(&hp->port);
-	}
 }
 /*

drivers/tty/serial/max310x.c+1−0

@@ -1239,6 +1239,7 @@ static int __devexit max310x_remove(struct spi_device *spi) · 1238 unmodified lines
1239	static const struct spi_device_id max310x_id_table[] = {	1239	static const struct spi_device_id max310x_id_table[] = {
1240	{ "max3107", MAX310X_TYPE_MAX3107 },	1240	{ "max3107", MAX310X_TYPE_MAX3107 },
1241	{ "max3108", MAX310X_TYPE_MAX3108 },	1241	{ "max3108", MAX310X_TYPE_MAX3108 },
		1242	{ }
1242	};	1243	};
1243	MODULE_DEVICE_TABLE(spi, max310x_id_table);	1244	MODULE_DEVICE_TABLE(spi, max310x_id_table);
1244		1245

drivers/usb/core/hcd.c+16−0

 irqreturn_t usb_hcd_irq (int irq, void *__hcd)
 {
 	struct usb_hcd		*hcd = __hcd;
+	unsigned long		flags;
 	irqreturn_t		rc;
+	/* IRQF_DISABLED doesn't work correctly with shared IRQs
+	 * when the first handler doesn't use it.  So let's just
+	 * assume it's never used.
+	 */
+	local_irq_save(flags);
 	if (unlikely(HCD_DEAD(hcd) || !HCD_HW_ACCESSIBLE(hcd)))
 		rc = IRQ_NONE;
 	else if (hcd->driver->irq(hcd) == IRQ_NONE)
 	else
 		rc = IRQ_HANDLED;
+	local_irq_restore(flags);
 	return rc;
 }
 EXPORT_SYMBOL_GPL(usb_hcd_irq);
 	int retval;
 	if (hcd->driver->irq) {
+		/* IRQF_DISABLED doesn't work as advertised when used together
+		 * with IRQF_SHARED. As usb_hcd_irq() will always disable
+		 * interrupts we can remove it here.
+		 */
+		if (irqflags & IRQF_SHARED)
+			irqflags &= ~IRQF_DISABLED;
 		snprintf(hcd->irq_descr, sizeof(hcd->irq_descr), "%s:usb%d",
 				hcd->driver->description, hcd->self.busnum);
 		retval = request_irq(irqnum, &usb_hcd_irq, irqflags,

drivers/usb/early/ehci-dbgp.c+9−6

 #include <linux/usb/ehci_def.h>
 #include <linux/delay.h>
 #include <linux/serial_core.h>
+#include <linux/kconfig.h>
 #include <linux/kgdb.h>
 #include <linux/kthread.h>
 #include <asm/io.h>
 	return -ENODEV;
 }
-int dbgp_external_startup(struct usb_hcd *hcd)
-{
-	return xen_dbgp_external_startup(hcd) ?: _dbgp_external_startup();
-}
-EXPORT_SYMBOL_GPL(dbgp_external_startup);
 static int ehci_reset_port(int port)
 {
 	u32 portsc;
 	.index =	-1,
 };
+#if IS_ENABLED(CONFIG_USB_EHCI_HCD)
 int dbgp_reset_prep(struct usb_hcd *hcd)
 {
 	int ret = xen_dbgp_reset_prep(hcd);
 }
 EXPORT_SYMBOL_GPL(dbgp_reset_prep);
+int dbgp_external_startup(struct usb_hcd *hcd)
+{
+	return xen_dbgp_external_startup(hcd) ?: _dbgp_external_startup();
+}
+EXPORT_SYMBOL_GPL(dbgp_external_startup);
+#endif /* USB_EHCI_HCD */
 #ifdef CONFIG_KGDB
 static char kgdbdbgp_buf[DBGP_MAX_PACKET];

drivers/usb/host/ehci-ls1x.c+1−1

@@ -113,7 +113,7 @@ static int ehci_hcd_ls1x_probe(struct platform_device *pdev) · 112 unmodified lines
113	goto err_put_hcd;	113	goto err_put_hcd;
114	}	114	}
115		115
116	ret = usb_add_hcd(hcd, irq, IRQF_SHARED);	116	ret = usb_add_hcd(hcd, irq, IRQF_DISABLED \| IRQF_SHARED);
117	if (ret)	117	if (ret)
118	goto err_put_hcd;	118	goto err_put_hcd;
119		119

drivers/usb/host/ohci-xls.c+1−1

@@ -56,7 +56,7 @@ static int ohci_xls_probe_internal(const struct hc_driver *driver, · 55 unmodified lines
56	goto err3;	56	goto err3;
57	}	57	}
58		58
59	retval = usb_add_hcd(hcd, irq, IRQF_SHARED);	59	retval = usb_add_hcd(hcd, irq, IRQF_DISABLED \| IRQF_SHARED);
60	if (retval != 0)	60	if (retval != 0)
61	goto err4;	61	goto err4;
62	return retval;	62	return retval;

drivers/usb/musb/musb_gadget.c+26−4

@@ -707,11 +707,12 @@ static void rxstate(struct musb musb, struct musb_request req) · 706 unmodified lines
707	fifo_count = musb_readw(epio, MUSB_RXCOUNT);	707	fifo_count = musb_readw(epio, MUSB_RXCOUNT);
708		708
709	/*	709	/*
710	* use mode 1 only if we expect data of at least ep packet_sz	710	* Enable Mode 1 on RX transfers only when short_not_ok flag
711	* and have not yet received a short packet	711	* is set. Currently short_not_ok flag is set only from
		712	* file_storage and f_mass_storage drivers
712	*/	713	*/
713	if ((request->length - request->actual >= musb_ep->packet_sz) &&	714
714	(fifo_count >= musb_ep->packet_sz))	715	if (request->short_not_ok && fifo_count == musb_ep->packet_sz)
715	use_mode_1 = 1;	716	use_mode_1 = 1;
716	else	717	else
717	use_mode_1 = 0;	718	use_mode_1 = 0;
@@ -727,6 +728,27 @@ static void rxstate(struct musb musb, struct musb_request req) · 9 unmodified lines
727	c = musb->dma_controller;	728	c = musb->dma_controller;
728	channel = musb_ep->dma;	729	channel = musb_ep->dma;
729		730
		731	/* We use DMA Req mode 0 in rx_csr, and DMA controller operates in
		732	* mode 0 only. So we do not get endpoint interrupts due to DMA
		733	* completion. We only get interrupts from DMA controller.
		734	*
		735	* We could operate in DMA mode 1 if we knew the size of the tranfer
		736	* in advance. For mass storage class, request->length = what the host
		737	* sends, so that'd work. But for pretty much everything else,
		738	* request->length is routinely more than what the host sends. For
		739	* most these gadgets, end of is signified either by a short packet,
		740	* or filling the last byte of the buffer. (Sending extra data in
		741	* that last pckate should trigger an overflow fault.) But in mode 1,
		742	* we don't get DMA completion interrupt for short packets.
		743	*
		744	* Theoretically, we could enable DMAReq irq (MUSB_RXCSR_DMAMODE = 1),
		745	* to get endpoint interrupt on every DMA req, but that didn't seem
		746	* to work reliably.
		747	*
		748	* REVISIT an updated g_file_storage can set req->short_not_ok, which
		749	* then becomes usable as a runtime "use mode 1" hint...
		750	*/
		751
730	/* Experimental: Mode1 works with mass storage use cases */	752	/* Experimental: Mode1 works with mass storage use cases */
731	if (use_mode_1) {	753	if (use_mode_1) {
732	csr \|= MUSB_RXCSR_AUTOCLEAR;	754	csr \|= MUSB_RXCSR_AUTOCLEAR;

drivers/usb/musb/ux500.c+1−1

@@ -65,7 +65,7 @@ static int __devinit ux500_probe(struct platform_device *pdev) · 64 unmodified lines
65	struct platform_device *musb;	65	struct platform_device *musb;
66	struct ux500_glue *glue;	66	struct ux500_glue *glue;
67	struct clk *clk;	67	struct clk *clk;
68		68	int musbid;
69	int ret = -ENOMEM;	69	int ret = -ENOMEM;
70		70
71	glue = kzalloc(sizeof(*glue), GFP_KERNEL);	71	glue = kzalloc(sizeof(*glue), GFP_KERNEL);

drivers/usb/otg/Kconfig+2−2

@@ -58,7 +58,7 @@ config USB_ULPI_VIEWPORT · 57 unmodified lines
58		58
59	config TWL4030_USB	59	config TWL4030_USB
60	tristate "TWL4030 USB Transceiver Driver"	60	tristate "TWL4030 USB Transceiver Driver"
61	depends on TWL4030_CORE && REGULATOR_TWL4030	61	depends on TWL4030_CORE && REGULATOR_TWL4030 && USB_MUSB_OMAP2PLUS
62	select USB_OTG_UTILS	62	select USB_OTG_UTILS
63	help	63	help
64	Enable this to support the USB OTG transceiver on TWL4030	64	Enable this to support the USB OTG transceiver on TWL4030
@@ -68,7 +68,7 @@ config TWL4030_USB · 3 unmodified lines
68		68
69	config TWL6030_USB	69	config TWL6030_USB
70	tristate "TWL6030 USB Transceiver Driver"	70	tristate "TWL6030 USB Transceiver Driver"
71	depends on TWL4030_CORE && OMAP_USB2	71	depends on TWL4030_CORE && OMAP_USB2 && USB_MUSB_OMAP2PLUS
72	select USB_OTG_UTILS	72	select USB_OTG_UTILS
73	help	73	help
74	Enable this to support the USB OTG transceiver on TWL6030	74	Enable this to support the USB OTG transceiver on TWL6030

drivers/usb/serial/keyspan.c+1−2

 static int keyspan_port_probe(struct usb_serial_port *port)
 {
 	struct usb_serial *serial = port->serial;
-	struct keyspan_port_private *s_priv;
+	struct keyspan_serial_private *s_priv;
 	struct keyspan_port_private *p_priv;
 	const struct keyspan_device_details *d_details;
 	struct callbacks *cback;
 	if (!p_priv)
 		return -ENOMEM;
-	s_priv = usb_get_serial_data(port->serial);
 	p_priv->device_details = d_details;
 	/* Setup values for the various callback routines */

drivers/usb/serial/option.c+9−0

 #define NOVATELWIRELESS_PRODUCT_EVDO_EMBEDDED_HIGHSPEED	0x8001
 #define NOVATELWIRELESS_PRODUCT_HSPA_EMBEDDED_FULLSPEED	0x9000
 #define NOVATELWIRELESS_PRODUCT_HSPA_EMBEDDED_HIGHSPEED	0x9001
+#define NOVATELWIRELESS_PRODUCT_E362		0x9010
 #define NOVATELWIRELESS_PRODUCT_G1		0xA001
 #define NOVATELWIRELESS_PRODUCT_G1_M		0xA002
 #define NOVATELWIRELESS_PRODUCT_G2		0xA010
 #define DELL_PRODUCT_5730_MINICARD_TELUS	0x8181
 #define DELL_PRODUCT_5730_MINICARD_VZW		0x8182
+#define DELL_PRODUCT_5800_MINICARD_VZW		0x8195  /* Novatel E362 */
+#define DELL_PRODUCT_5800_V2_MINICARD_VZW	0x8196  /* Novatel E362 */
 #define KYOCERA_VENDOR_ID			0x0c88
 #define KYOCERA_PRODUCT_KPC650			0x17da
 #define KYOCERA_PRODUCT_KPC680			0x180a
 /* ALCATEL PRODUCTS */
 #define ALCATEL_VENDOR_ID			0x1bbb
 #define ALCATEL_PRODUCT_X060S_X200		0x0000
+#define ALCATEL_PRODUCT_X220_X500D		0x0017
 #define PIRELLI_VENDOR_ID			0x1266
 #define PIRELLI_PRODUCT_C100_1			0x1002
 	{ USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_G2) },
 	/* Novatel Ovation MC551 a.k.a. Verizon USB551L */
 	{ USB_DEVICE_AND_INTERFACE_INFO(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_MC551, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_E362, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE(AMOI_VENDOR_ID, AMOI_PRODUCT_H01) },
 	{ USB_DEVICE(AMOI_VENDOR_ID, AMOI_PRODUCT_H01A) },
 	{ USB_DEVICE(DELL_VENDOR_ID, DELL_PRODUCT_5730_MINICARD_SPRINT) },	/* Dell Wireless 5730 Mobile Broadband EVDO/HSPA Mini-Card */
 	{ USB_DEVICE(DELL_VENDOR_ID, DELL_PRODUCT_5730_MINICARD_TELUS) },	/* Dell Wireless 5730 Mobile Broadband EVDO/HSPA Mini-Card */
 	{ USB_DEVICE(DELL_VENDOR_ID, DELL_PRODUCT_5730_MINICARD_VZW) }, 	/* Dell Wireless 5730 Mobile Broadband EVDO/HSPA Mini-Card */
+	{ USB_DEVICE_AND_INTERFACE_INFO(DELL_VENDOR_ID, DELL_PRODUCT_5800_MINICARD_VZW, 0xff, 0xff, 0xff) },
+	{ USB_DEVICE_AND_INTERFACE_INFO(DELL_VENDOR_ID, DELL_PRODUCT_5800_V2_MINICARD_VZW, 0xff, 0xff, 0xff) },
 	{ USB_DEVICE(ANYDATA_VENDOR_ID, ANYDATA_PRODUCT_ADU_E100A) },	/* ADU-E100, ADU-310 */
 	{ USB_DEVICE(ANYDATA_VENDOR_ID, ANYDATA_PRODUCT_ADU_500A) },
 	{ USB_DEVICE(ANYDATA_VENDOR_ID, ANYDATA_PRODUCT_ADU_620UW) },
 	{ USB_DEVICE(ALCATEL_VENDOR_ID, ALCATEL_PRODUCT_X060S_X200),
 	  .driver_info = (kernel_ulong_t)&alcatel_x200_blacklist
 	},
+	{ USB_DEVICE(ALCATEL_VENDOR_ID, ALCATEL_PRODUCT_X220_X500D) },
 	{ USB_DEVICE(AIRPLUS_VENDOR_ID, AIRPLUS_PRODUCT_MCD650) },
 	{ USB_DEVICE(TLAYTECH_VENDOR_ID, TLAYTECH_PRODUCT_TEU800) },
 	{ USB_DEVICE(LONGCHEER_VENDOR_ID, FOUR_G_SYSTEMS_PRODUCT_W14),

drivers/usb/serial/usb_wwan.c+5−5

 	struct usb_serial *serial = port->serial;
 	struct urb *urb;
-	if (endpoint == -1)
-		return NULL;	/* endpoint not needed */
 	urb = usb_alloc_urb(0, GFP_KERNEL);	/* No ISO */
 	if (urb == NULL) {
 		dev_dbg(&serial->interface->dev,
 	init_usb_anchor(&portdata->delayed);
 	for (i = 0; i < N_IN_URB; i++) {
+		if (!port->bulk_in_size)
+			break;
 		buffer = (u8 *)__get_free_page(GFP_KERNEL);
 		if (!buffer)
 			goto bail_out_error;
 	}
 	for (i = 0; i < N_OUT_URB; i++) {
-		if (port->bulk_out_endpointAddress == -1)
+		if (!port->bulk_out_size)
-			continue;
+			break;
 		buffer = kmalloc(OUT_BUFLEN, GFP_KERNEL);
 		if (!buffer)

drivers/virtio/virtio.c+3−1

@@ -225,8 +225,10 @@ EXPORT_SYMBOL_GPL(register_virtio_device); · 224 unmodified lines
225		225
226	void unregister_virtio_device(struct virtio_device *dev)	226	void unregister_virtio_device(struct virtio_device *dev)
227	{	227	{
		228	int index = dev->index; /* save for after device release */
		229
228	device_unregister(&dev->dev);	230	device_unregister(&dev->dev);
229	ida_simple_remove(&virtio_index_ida, dev->index);	231	ida_simple_remove(&virtio_index_ida, index);
230	}	232	}
231	EXPORT_SYMBOL_GPL(unregister_virtio_device);	233	EXPORT_SYMBOL_GPL(unregister_virtio_device);
232		234

drivers/xen/Makefile+1−0

@@ -2,6 +2,7 @@ ifneq ($(CONFIG_ARM),y) · 1 unmodified line
2	obj-y += manage.o balloon.o	2	obj-y += manage.o balloon.o
3	obj-$(CONFIG_HOTPLUG_CPU) += cpu_hotplug.o	3	obj-$(CONFIG_HOTPLUG_CPU) += cpu_hotplug.o
4	endif	4	endif
		5	obj-$(CONFIG_X86) += fallback.o
5	obj-y += grant-table.o features.o events.o	6	obj-y += grant-table.o features.o events.o
6	obj-y += xenbus/	7	obj-y += xenbus/
7		8

drivers/xen/events.c+1−1

 {
 	struct pt_regs *old_regs = set_irq_regs(regs);
+	irq_enter();
 #ifdef CONFIG_X86
 	exit_idle();
 #endif
-	irq_enter();
 	__xen_evtchn_do_upcall();

drivers/xen/fallback.c+80−0

@@ -0,0 +1,80 @@
	1	#include <linux/kernel.h>
	2	#include <linux/string.h>
	3	#include <linux/bug.h>
	4	#include <linux/export.h>
	5	#include <asm/hypervisor.h>
	6	#include <asm/xen/hypercall.h>
	7
	8	int xen_event_channel_op_compat(int cmd, void *arg)
	9	{
	10	struct evtchn_op op;
	11	int rc;
	12
	13	op.cmd = cmd;
	14	memcpy(&op.u, arg, sizeof(op.u));
	15	rc = _hypercall1(int, event_channel_op_compat, &op);
	16
	17	switch (cmd) {
	18	case EVTCHNOP_close:
	19	case EVTCHNOP_send:
	20	case EVTCHNOP_bind_vcpu:
	21	case EVTCHNOP_unmask:
	22	/* no output */
	23	break;
	24
	25	#define COPY_BACK(eop) \
	26	case EVTCHNOP_##eop: \
	27	memcpy(arg, &op.u.eop, sizeof(op.u.eop)); \
	28	break
	29
	30	COPY_BACK(bind_interdomain);
	31	COPY_BACK(bind_virq);
	32	COPY_BACK(bind_pirq);
	33	COPY_BACK(status);
	34	COPY_BACK(alloc_unbound);
	35	COPY_BACK(bind_ipi);
	36	#undef COPY_BACK
	37
	38	default:
	39	WARN_ON(rc != -ENOSYS);
	40	break;
	41	}
	42
	43	return rc;
	44	}
	45	EXPORT_SYMBOL_GPL(xen_event_channel_op_compat);
	46
	47	int HYPERVISOR_physdev_op_compat(int cmd, void *arg)
	48	{
	49	struct physdev_op op;
	50	int rc;
	51
	52	op.cmd = cmd;
	53	memcpy(&op.u, arg, sizeof(op.u));
	54	rc = _hypercall1(int, physdev_op_compat, &op);
	55
	56	switch (cmd) {
	57	case PHYSDEVOP_IRQ_UNMASK_NOTIFY:
	58	case PHYSDEVOP_set_iopl:
	59	case PHYSDEVOP_set_iobitmap:
	60	case PHYSDEVOP_apic_write:
	61	/* no output */
	62	break;
	63
	64	#define COPY_BACK(pop, fld) \
	65	case PHYSDEVOP_##pop: \
	66	memcpy(arg, &op.u.fld, sizeof(op.u.fld)); \
	67	break
	68
	69	COPY_BACK(irq_status_query, irq_status_query);
	70	COPY_BACK(apic_read, apic_op);
	71	COPY_BACK(ASSIGN_VECTOR, irq_op);
	72	#undef COPY_BACK
	73
	74	default:
	75	WARN_ON(rc != -ENOSYS);
	76	break;
	77	}
	78
	79	return rc;
	80	}

fs/cifs/cifsacl.c+20−29

@@ -224,6 +224,13 @@ sid_to_str(struct cifs_sid sidptr, char sidstr) · 223 unmodified lines
224	}	224	}
225	}	225	}
226		226
		227	static void
		228	cifs_copy_sid(struct cifs_sid dst, const struct cifs_sid src)
		229	{
		230	memcpy(dst, src, sizeof(*dst));
		231	dst->num_subauth = min_t(u8, src->num_subauth, NUM_SUBAUTHS);
		232	}
		233
227	static void	234	static void
228	id_rb_insert(struct rb_root root, struct cifs_sid sidptr,	235	id_rb_insert(struct rb_root root, struct cifs_sid sidptr,
229	struct cifs_sid_id *psidid, char typestr)	236	struct cifs_sid_id *psidid, char typestr)
@@ -248,7 +255,7 @@ id_rb_insert(struct rb_root root, struct cifs_sid sidptr, · 18 unmodified lines
248	}	255	}
249	}	256	}
250		257
251	memcpy(&(*psidid)->sid, sidptr, sizeof(struct cifs_sid));	258	cifs_copy_sid(&(*psidid)->sid, sidptr);
252	(*psidid)->time = jiffies - (SID_MAP_RETRY + 1);	259	(*psidid)->time = jiffies - (SID_MAP_RETRY + 1);
253	(*psidid)->refcount = 0;	260	(*psidid)->refcount = 0;
254		261
@@ -354,7 +361,7 @@ id_to_sid(unsigned long cid, uint sidtype, struct cifs_sid *ssid) · 99 unmodified lines
354	* any fields of the node after a reference is put .	361	* any fields of the node after a reference is put .
355	*/	362	*/
356	if (test_bit(SID_ID_MAPPED, &psidid->state)) {	363	if (test_bit(SID_ID_MAPPED, &psidid->state)) {
357	memcpy(ssid, &psidid->sid, sizeof(struct cifs_sid));	364	cifs_copy_sid(ssid, &psidid->sid);
358	psidid->time = jiffies; /* update ts for accessing */	365	psidid->time = jiffies; /* update ts for accessing */
359	goto id_sid_out;	366	goto id_sid_out;
360	}	367	}
@@ -370,14 +377,14 @@ id_to_sid(unsigned long cid, uint sidtype, struct cifs_sid *ssid) · 9 unmodified lines
370	if (IS_ERR(sidkey)) {	377	if (IS_ERR(sidkey)) {
371	rc = -EINVAL;	378	rc = -EINVAL;
372	cFYI(1, "%s: Can't map and id to a SID", __func__);	379	cFYI(1, "%s: Can't map and id to a SID", __func__);
		380	} else if (sidkey->datalen < sizeof(struct cifs_sid)) {
		381	rc = -EIO;
		382	cFYI(1, "%s: Downcall contained malformed key "
		383	"(datalen=%hu)", __func__, sidkey->datalen);
373	} else {	384	} else {
374	lsid = (struct cifs_sid *)sidkey->payload.data;	385	lsid = (struct cifs_sid *)sidkey->payload.data;
375	memcpy(&psidid->sid, lsid,	386	cifs_copy_sid(&psidid->sid, lsid);
376	sidkey->datalen < sizeof(struct cifs_sid) ?	387	cifs_copy_sid(ssid, &psidid->sid);
377	sidkey->datalen : sizeof(struct cifs_sid));
378	memcpy(ssid, &psidid->sid,
379	sidkey->datalen < sizeof(struct cifs_sid) ?
380	sidkey->datalen : sizeof(struct cifs_sid));
381	set_bit(SID_ID_MAPPED, &psidid->state);	388	set_bit(SID_ID_MAPPED, &psidid->state);
382	key_put(sidkey);	389	key_put(sidkey);
383	kfree(psidid->sidstr);	390	kfree(psidid->sidstr);
@@ -396,7 +403,7 @@ id_to_sid(unsigned long cid, uint sidtype, struct cifs_sid *ssid) · 12 unmodified lines
396	return rc;	403	return rc;
397	}	404	}
398	if (test_bit(SID_ID_MAPPED, &psidid->state))	405	if (test_bit(SID_ID_MAPPED, &psidid->state))
399	memcpy(ssid, &psidid->sid, sizeof(struct cifs_sid));	406	cifs_copy_sid(ssid, &psidid->sid);
400	else	407	else
401	rc = -EINVAL;	408	rc = -EINVAL;
402	}	409	}
@@ -675,8 +682,6 @@ int compare_sids(const struct cifs_sid ctsid, const struct cifs_sid cwsid) · 272 unmodified lines
675	static void copy_sec_desc(const struct cifs_ntsd *pntsd,	682	static void copy_sec_desc(const struct cifs_ntsd *pntsd,
676	struct cifs_ntsd *pnntsd, __u32 sidsoffset)	683	struct cifs_ntsd *pnntsd, __u32 sidsoffset)
677	{	684	{
678	int i;
679
680	struct cifs_sid owner_sid_ptr, group_sid_ptr;	685	struct cifs_sid owner_sid_ptr, group_sid_ptr;
681	struct cifs_sid nowner_sid_ptr, ngroup_sid_ptr;	686	struct cifs_sid nowner_sid_ptr, ngroup_sid_ptr;
682		687
@@ -692,26 +697,14 @@ static void copy_sec_desc(const struct cifs_ntsd *pntsd, · 9 unmodified lines
692	owner_sid_ptr = (struct cifs_sid )((char )pntsd +	697	owner_sid_ptr = (struct cifs_sid )((char )pntsd +
693	le32_to_cpu(pntsd->osidoffset));	698	le32_to_cpu(pntsd->osidoffset));
694	nowner_sid_ptr = (struct cifs_sid )((char )pnntsd + sidsoffset);	699	nowner_sid_ptr = (struct cifs_sid )((char )pnntsd + sidsoffset);
695		700	cifs_copy_sid(nowner_sid_ptr, owner_sid_ptr);
696	nowner_sid_ptr->revision = owner_sid_ptr->revision;
697	nowner_sid_ptr->num_subauth = owner_sid_ptr->num_subauth;
698	for (i = 0; i < 6; i++)
699	nowner_sid_ptr->authority[i] = owner_sid_ptr->authority[i];
700	for (i = 0; i < 5; i++)
701	nowner_sid_ptr->sub_auth[i] = owner_sid_ptr->sub_auth[i];
702		701
703	/* copy group sid */	702	/* copy group sid */
704	group_sid_ptr = (struct cifs_sid )((char )pntsd +	703	group_sid_ptr = (struct cifs_sid )((char )pntsd +
705	le32_to_cpu(pntsd->gsidoffset));	704	le32_to_cpu(pntsd->gsidoffset));
706	ngroup_sid_ptr = (struct cifs_sid )((char )pnntsd + sidsoffset +	705	ngroup_sid_ptr = (struct cifs_sid )((char )pnntsd + sidsoffset +
707	sizeof(struct cifs_sid));	706	sizeof(struct cifs_sid));
708		707	cifs_copy_sid(ngroup_sid_ptr, group_sid_ptr);
709	ngroup_sid_ptr->revision = group_sid_ptr->revision;
710	ngroup_sid_ptr->num_subauth = group_sid_ptr->num_subauth;
711	for (i = 0; i < 6; i++)
712	ngroup_sid_ptr->authority[i] = group_sid_ptr->authority[i];
713	for (i = 0; i < 5; i++)
714	ngroup_sid_ptr->sub_auth[i] = group_sid_ptr->sub_auth[i];
715		708
716	return;	709	return;
717	}	710	}
@@ -1120,8 +1113,7 @@ static int build_sec_desc(struct cifs_ntsd pntsd, struct cifs_ntsd pnntsd, · 402 unmodified lines
1120	kfree(nowner_sid_ptr);	1113	kfree(nowner_sid_ptr);
1121	return rc;	1114	return rc;
1122	}	1115	}
1123	memcpy(owner_sid_ptr, nowner_sid_ptr,	1116	cifs_copy_sid(owner_sid_ptr, nowner_sid_ptr);
1124	sizeof(struct cifs_sid));
1125	kfree(nowner_sid_ptr);	1117	kfree(nowner_sid_ptr);
1126	*aclflag = CIFS_ACL_OWNER;	1118	*aclflag = CIFS_ACL_OWNER;
1127	}	1119	}
@@ -1139,8 +1131,7 @@ static int build_sec_desc(struct cifs_ntsd pntsd, struct cifs_ntsd pnntsd, · 11 unmodified lines
1139	kfree(ngroup_sid_ptr);	1131	kfree(ngroup_sid_ptr);
1140	return rc;	1132	return rc;
1141	}	1133	}
1142	memcpy(group_sid_ptr, ngroup_sid_ptr,	1134	cifs_copy_sid(group_sid_ptr, ngroup_sid_ptr);
1143	sizeof(struct cifs_sid));
1144	kfree(ngroup_sid_ptr);	1135	kfree(ngroup_sid_ptr);
1145	*aclflag = CIFS_ACL_GROUP;	1136	*aclflag = CIFS_ACL_GROUP;
1146	}	1137	}

fs/cifs/dir.c+10−1

@@ -398,7 +398,16 @@ cifs_atomic_open(struct inode inode, struct dentry direntry, · 397 unmodified lines
398	* in network traffic in the other paths.	398	* in network traffic in the other paths.
399	*/	399	*/
400	if (!(oflags & O_CREAT)) {	400	if (!(oflags & O_CREAT)) {
401	struct dentry *res = cifs_lookup(inode, direntry, 0);	401	struct dentry *res;
		402
		403	/*
		404	* Check for hashed negative dentry. We have already revalidated
		405	* the dentry and it is fine. No need to perform another lookup.
		406	*/
		407	if (!d_unhashed(direntry))
		408	return -ENOENT;
		409
		410	res = cifs_lookup(inode, direntry, 0);
402	if (IS_ERR(res))	411	if (IS_ERR(res))
403	return PTR_ERR(res);	412	return PTR_ERR(res);
404		413

fs/eventpoll.c+3−35

@@ -346,7 +346,7 @@ static inline struct epitem ep_item_from_epqueue(poll_table p) · 345 unmodified lines
346	/* Tells if the epoll_ctl(2) operation needs an event copy from userspace */	346	/* Tells if the epoll_ctl(2) operation needs an event copy from userspace */
347	static inline int ep_op_has_event(int op)	347	static inline int ep_op_has_event(int op)
348	{	348	{
349	return op == EPOLL_CTL_ADD \|\| op == EPOLL_CTL_MOD;	349	return op != EPOLL_CTL_DEL;
350	}	350	}
351		351
352	/* Initialize the poll safe wake up structure */	352	/* Initialize the poll safe wake up structure */
@@ -676,34 +676,6 @@ static int ep_remove(struct eventpoll ep, struct epitem epi) · 323 unmodified lines
676	return 0;	676	return 0;
677	}	677	}
678		678
679	/*
680	* Disables a "struct epitem" in the eventpoll set. Returns -EBUSY if the item
681	* had no event flags set, indicating that another thread may be currently
682	* handling that item's events (in the case that EPOLLONESHOT was being
683	* used). Otherwise a zero result indicates that the item has been disabled
684	* from receiving events. A disabled item may be re-enabled via
685	* EPOLL_CTL_MOD. Must be called with "mtx" held.
686	*/
687	static int ep_disable(struct eventpoll ep, struct epitem epi)
688	{
689	int result = 0;
690	unsigned long flags;
691
692	spin_lock_irqsave(&ep->lock, flags);
693	if (epi->event.events & ~EP_PRIVATE_BITS) {
694	if (ep_is_linked(&epi->rdllink))
695	list_del_init(&epi->rdllink);
696	/* Ensure ep_poll_callback will not add epi back onto ready
697	list: */
698	epi->event.events &= EP_PRIVATE_BITS;
699	}
700	else
701	result = -EBUSY;
702	spin_unlock_irqrestore(&ep->lock, flags);
703
704	return result;
705	}
706
707	static void ep_free(struct eventpoll *ep)	679	static void ep_free(struct eventpoll *ep)
708	{	680	{
709	struct rb_node *rbp;	681	struct rb_node *rbp;
@@ -1048,6 +1020,8 @@ static void ep_rbtree_insert(struct eventpoll ep, struct epitem epi) · 338 unmodified lines
1048	rb_insert_color(&epi->rbn, &ep->rbr);	1020	rb_insert_color(&epi->rbn, &ep->rbr);
1049	}	1021	}
1050		1022
		1023
		1024
1051	#define PATH_ARR_SIZE 5	1025	#define PATH_ARR_SIZE 5
1052	/*	1026	/*
1053	* These are the number paths of length 1 to 5, that we are allowing to emanate	1027	* These are the number paths of length 1 to 5, that we are allowing to emanate
@@ -1813,12 +1787,6 @@ SYSCALL_DEFINE4(epoll_ctl, int, epfd, int, op, int, fd, · 759 unmodified lines
1813	} else	1787	} else
1814	error = -ENOENT;	1788	error = -ENOENT;
1815	break;	1789	break;
1816	case EPOLL_CTL_DISABLE:
1817	if (epi)
1818	error = ep_disable(ep, epi);
1819	else
1820	error = -ENOENT;
1821	break;
1822	}	1790	}
1823	mutex_unlock(&ep->mtx);	1791	mutex_unlock(&ep->mtx);
1824		1792

fs/gfs2/file.c+5−9

 		struct gfs2_holder i_gh;
 		int error;
-		gfs2_holder_init(ip->i_gl, LM_ST_SHARED, LM_FLAG_ANY, &i_gh);
+		error = gfs2_glock_nq_init(ip->i_gl, LM_ST_SHARED, LM_FLAG_ANY,
-		error = gfs2_glock_nq(&i_gh);
+					   &i_gh);
-		if (error == 0) {
-			file_accessed(file);
-			gfs2_glock_dq(&i_gh);
-		}
-		gfs2_holder_uninit(&i_gh);
 		if (error)
 			return error;
+		/* grab lock to update inode */
+		gfs2_glock_dq_uninit(&i_gh);
+		file_accessed(file);
 	}
 	vma->vm_ops = &gfs2_vm_ops;
 	size_t writesize = iov_length(iov, nr_segs);
 	struct dentry *dentry = file->f_dentry;
 	struct gfs2_inode *ip = GFS2_I(dentry->d_inode);
-	struct gfs2_sbd *sdp;
 	int ret;
-	sdp = GFS2_SB(file->f_mapping->host);
 	ret = gfs2_rs_alloc(ip);
 	if (ret)
 		return ret;

fs/gfs2/lops.c+2−14

 	struct gfs2_meta_header *mh;
 	struct gfs2_trans *tr;
-	lock_buffer(bd->bd_bh);
-	gfs2_log_lock(sdp);
 	tr = current->journal_info;
 	tr->tr_touched = 1;
 	if (!list_empty(&bd->bd_list))
-		goto out;
+		return;
 	set_bit(GLF_LFLUSH, &bd->bd_gl->gl_flags);
 	set_bit(GLF_DIRTY, &bd->bd_gl->gl_flags);
 	mh = (struct gfs2_meta_header *)bd->bd_bh->b_data;
 	sdp->sd_log_num_buf++;
 	list_add(&bd->bd_list, &sdp->sd_log_le_buf);
 	tr->tr_num_buf_new++;
-out:
-	gfs2_log_unlock(sdp);
-	unlock_buffer(bd->bd_bh);
 }
 static void gfs2_check_magic(struct buffer_head *bh)
 static void revoke_lo_before_commit(struct gfs2_sbd *sdp)
 {
-	struct gfs2_log_descriptor *ld;
 	struct gfs2_meta_header *mh;
 	unsigned int offset;
 	struct list_head *head = &sdp->sd_log_le_revoke;
 	length = gfs2_struct2blk(sdp, sdp->sd_log_num_revoke, sizeof(u64));
 	page = gfs2_get_log_desc(sdp, GFS2_LOG_DESC_REVOKE, length, sdp->sd_log_num_revoke);
-	ld = page_address(page);
 	offset = sizeof(struct gfs2_log_descriptor);
 	list_for_each_entry(bd, head, bd_list) {
 	struct address_space *mapping = bd->bd_bh->b_page->mapping;
 	struct gfs2_inode *ip = GFS2_I(mapping->host);
-	lock_buffer(bd->bd_bh);
-	gfs2_log_lock(sdp);
 	if (tr)
 		tr->tr_touched = 1;
 	if (!list_empty(&bd->bd_list))
-		goto out;
+		return;
 	set_bit(GLF_LFLUSH, &bd->bd_gl->gl_flags);
 	set_bit(GLF_DIRTY, &bd->bd_gl->gl_flags);
 	if (gfs2_is_jdata(ip)) {
 	} else {
 		list_add_tail(&bd->bd_list, &sdp->sd_log_le_ordered);
 	}
-out:
-	gfs2_log_unlock(sdp);
-	unlock_buffer(bd->bd_bh);
 }
 /**

fs/gfs2/quota.c+5−2

 	struct gfs2_quota_data **qd;
 	int error;
-	if (ip->i_res == NULL)
+	if (ip->i_res == NULL) {
-		gfs2_rs_alloc(ip);
+		error = gfs2_rs_alloc(ip);
+		if (error)
+			return error;
+	}
 	qd = ip->i_res->rs_qa_qd;

fs/gfs2/rgrp.c+21−12

  */
 int gfs2_rs_alloc(struct gfs2_inode *ip)
 {
-	int error = 0;
 	struct gfs2_blkreserv *res;
 	if (ip->i_res)
 	res = kmem_cache_zalloc(gfs2_rsrv_cachep, GFP_NOFS);
 	if (!res)
-		error = -ENOMEM;
+		return -ENOMEM;
 	RB_CLEAR_NODE(&res->rs_node);
 	else
 		ip->i_res = res;
 	up_write(&ip->i_rw_mutex);
-	return error;
+	return 0;
 }
 static void dump_rs(struct seq_file *seq, const struct gfs2_blkreserv *rs)
 	int ret = 0;
 	u64 amt;
 	u64 trimmed = 0;
+	u64 start, end, minlen;
 	unsigned int x;
+	unsigned bs_shift = sdp->sd_sb.sb_bsize_shift;
 	if (!capable(CAP_SYS_ADMIN))
 		return -EPERM;
 	if (!blk_queue_discard(q))
 		return -EOPNOTSUPP;
-	if (argp == NULL) {
+	if (copy_from_user(&r, argp, sizeof(r)))
-		r.start = 0;
-		r.len = ULLONG_MAX;
-		r.minlen = 0;
-	} else if (copy_from_user(&r, argp, sizeof(r)))
 		return -EFAULT;
 	ret = gfs2_rindex_update(sdp);
 	if (ret)
 		return ret;
-	rgd = gfs2_blk2rgrpd(sdp, r.start, 0);
+	start = r.start >> bs_shift;
-	rgd_end = gfs2_blk2rgrpd(sdp, r.start + r.len, 0);
+	end = start + (r.len >> bs_shift);
+	minlen = max_t(u64, r.minlen,
+		       q->limits.discard_granularity) >> bs_shift;
+	rgd = gfs2_blk2rgrpd(sdp, start, 0);
+	rgd_end = gfs2_blk2rgrpd(sdp, end - 1, 0);
+	if (end <= start ||
+	    minlen > sdp->sd_max_rg_data ||
+	    start > rgd_end->rd_data0 + rgd_end->rd_data)
+		return -EINVAL;
 	while (1) {
 			/* Trim each bitmap in the rgrp */
 			for (x = 0; x < rgd->rd_length; x++) {
 				struct gfs2_bitmap *bi = rgd->rd_bits + x;
-				ret = gfs2_rgrp_send_discards(sdp, rgd->rd_data0, NULL, bi, r.minlen, &amt);
+				ret = gfs2_rgrp_send_discards(sdp,
+						rgd->rd_data0, NULL, bi, minlen,
+						&amt);
 				if (ret) {
 					gfs2_glock_dq_uninit(&gh);
 					goto out;
 out:
 	r.len = trimmed << 9;
-	if (argp && copy_to_user(argp, &r, sizeof(r)))
+	if (copy_to_user(argp, &r, sizeof(r)))
 		return -EFAULT;
 	return ret;

fs/gfs2/super.c+2−1

@@ -810,7 +810,8 @@ static void gfs2_dirty_inode(struct inode *inode, int flags) · 809 unmodified lines
810	return;	810	return;
811	}	811	}
812	need_unlock = 1;	812	need_unlock = 1;
813	}	813	} else if (WARN_ON_ONCE(ip->i_gl->gl_state != LM_ST_EXCLUSIVE))
		814	return;
814		815
815	if (current->journal_info == NULL) {	816	if (current->journal_info == NULL) {
816	ret = gfs2_trans_begin(sdp, RES_DINODE, 0);	817	ret = gfs2_trans_begin(sdp, RES_DINODE, 0);

fs/gfs2/trans.c+8−0

 	struct gfs2_sbd *sdp = gl->gl_sbd;
 	struct gfs2_bufdata *bd;
+	lock_buffer(bh);
+	gfs2_log_lock(sdp);
 	bd = bh->b_private;
 	if (bd)
 		gfs2_assert(sdp, bd->bd_gl == gl);
 	else {
+		gfs2_log_unlock(sdp);
+		unlock_buffer(bh);
 		gfs2_attach_bufdata(gl, bh, meta);
 		bd = bh->b_private;
+		lock_buffer(bh);
+		gfs2_log_lock(sdp);
 	}
 	lops_add(sdp, bd);
+	gfs2_log_unlock(sdp);
+	unlock_buffer(bh);
 }
 void gfs2_trans_add_revoke(struct gfs2_sbd *sdp, struct gfs2_bufdata *bd)

fs/nfs/dns_resolve.c+3−2

 {
 	char buf1[NFS_DNS_HOSTNAME_MAXLEN+1];
 	struct nfs_dns_ent key, *item;
-	unsigned long ttl;
+	unsigned int ttl;
 	ssize_t len;
 	int ret = -EINVAL;
 	key.namelen = len;
 	memset(&key.h, 0, sizeof(key.h));
-	ttl = get_expiry(&buf);
+	if (get_uint(&buf, &ttl) < 0)
+		goto out;
 	if (ttl == 0)
 		goto out;
 	key.h.expiry_time = ttl + seconds_since_boot();

fs/nfs/inode.c+4−1

 	if (ctx->cred != NULL)
 		put_rpccred(ctx->cred);
 	dput(ctx->dentry);
-	nfs_sb_deactive(sb);
+	if (is_sync)
+		nfs_sb_deactive(sb);
+	else
+		nfs_sb_deactive_async(sb);
 	kfree(ctx->mdsthreshold);
 	kfree(ctx);
 }

fs/nfs/internal.h+4−2

 extern void __exit unregister_nfs_fs(void);
 extern void nfs_sb_active(struct super_block *sb);
 extern void nfs_sb_deactive(struct super_block *sb);
+extern void nfs_sb_deactive_async(struct super_block *sb);
 /* namespace.c */
+#define NFS_PATH_CANONICAL 1
 extern char *nfs_path(char **p, struct dentry *dentry,
-		      char *buffer, ssize_t buflen);
+		      char *buffer, ssize_t buflen, unsigned flags);
 extern struct vfsmount *nfs_d_automount(struct path *path);
 struct vfsmount *nfs_submount(struct nfs_server *, struct dentry *,
 			      struct nfs_fh *, struct nfs_fattr *);
 				char *buffer, ssize_t buflen)
 {
 	char *dummy;
-	return nfs_path(&dummy, dentry, buffer, buflen);
+	return nfs_path(&dummy, dentry, buffer, buflen, NFS_PATH_CANONICAL);
 }
 /*

fs/nfs/mount_clnt.c+1−1

@@ -181,7 +181,7 @@ int nfs_mount(struct nfs_mount_request *info) · 180 unmodified lines
181	else	181	else
182	msg.rpc_proc = &mnt_clnt->cl_procinfo[MOUNTPROC_MNT];	182	msg.rpc_proc = &mnt_clnt->cl_procinfo[MOUNTPROC_MNT];
183		183
184	status = rpc_call_sync(mnt_clnt, &msg, 0);	184	status = rpc_call_sync(mnt_clnt, &msg, RPC_TASK_SOFT\|RPC_TASK_TIMEOUT);
185	rpc_shutdown_client(mnt_clnt);	185	rpc_shutdown_client(mnt_clnt);
186		186
187	if (status < 0)	187	if (status < 0)

fs/nfs/namespace.c+14−5

  * @dentry - pointer to dentry
  * @buffer - result buffer
  * @buflen - length of buffer
+ * @flags - options (see below)
  *
  * Helper function for constructing the server pathname
  * by arbitrary hashed dentry.
  * This is mainly for use in figuring out the path on the
  * server side when automounting on top of an existing partition
  * and in generating /proc/mounts and friends.
+ *
+ * Supported flags:
+ * NFS_PATH_CANONICAL: ensure there is exactly one slash after
+ *		       the original device (export) name
+ *		       (if unset, the original name is returned verbatim)
  */
-char *nfs_path(char **p, struct dentry *dentry, char *buffer, ssize_t buflen)
+char *nfs_path(char **p, struct dentry *dentry, char *buffer, ssize_t buflen,
+	       unsigned flags)
 {
 	char *end;
 	int namelen;
 		rcu_read_unlock();
 		goto rename_retry;
 	}
-	if (*end != '/') {
+	if ((flags & NFS_PATH_CANONICAL) && *end != '/') {
 		if (--buflen < 0) {
 			spin_unlock(&dentry->d_lock);
 			rcu_read_unlock();
 		return end;
 	}
 	namelen = strlen(base);
-	/* Strip off excess slashes in base string */
+	if (flags & NFS_PATH_CANONICAL) {
-	while (namelen > 0 && base[namelen - 1] == '/')
+		/* Strip off excess slashes in base string */
-		namelen--;
+		while (namelen > 0 && base[namelen - 1] == '/')
+			namelen--;
+	}
 	buflen -= namelen;
 	if (buflen < 0) {
 		spin_unlock(&dentry->d_lock);

fs/nfs/nfs4namespace.c+2−1

 static char *nfs4_path(struct dentry *dentry, char *buffer, ssize_t buflen)
 {
 	char *limit;
-	char *path = nfs_path(&limit, dentry, buffer, buflen);
+	char *path = nfs_path(&limit, dentry, buffer, buflen,
+			      NFS_PATH_CANONICAL);
 	if (!IS_ERR(path)) {
 		char *path_component = nfs_path_component(path, limit);
 		if (path_component)

fs/nfs/nfs4proc.c+28−18

 			dprintk("%s ERROR: %d Reset session\n", __func__,
 				errorcode);
 			nfs4_schedule_session_recovery(clp->cl_session, errorcode);
-			exception->retry = 1;
+			goto wait_on_recovery;
-			break;
 #endif /* defined(CONFIG_NFS_V4_1) */
 		case -NFS4ERR_FILE_OPEN:
 			if (exception->timeout > HZ) {
 	data->timestamp = jiffies;
 	if (nfs4_setup_sequence(data->o_arg.server,
 				&data->o_arg.seq_args,
-				&data->o_res.seq_res, task))
+				&data->o_res.seq_res,
-		return;
+				task) != 0)
-	rpc_call_start(task);
+		nfs_release_seqid(data->o_arg.seqid);
+	else
+		rpc_call_start(task);
 	return;
 unlock_no_action:
 	rcu_read_unlock();
 	/* even though OPEN succeeded, access is denied. Close the file */
 	nfs4_close_state(state, fmode);
-	return -NFS4ERR_ACCESS;
+	return -EACCES;
 }
 /*
 	nfs4_put_open_state(calldata->state);
 	nfs_free_seqid(calldata->arg.seqid);
 	nfs4_put_state_owner(sp);
-	nfs_sb_deactive(sb);
+	nfs_sb_deactive_async(sb);
 	kfree(calldata);
 }
 	if (nfs4_setup_sequence(NFS_SERVER(inode),
 				&calldata->arg.seq_args,
 				&calldata->res.seq_res,
-				task))
+				task) != 0)
-		goto out;
+		nfs_release_seqid(calldata->arg.seqid);
-	rpc_call_start(task);
+	else
+		rpc_call_start(task);
 out:
 	dprintk("%s: done!\n", __func__);
 }
 			if (nfs4_async_handle_error(task, calldata->server, NULL) == -EAGAIN)
 				rpc_restart_call_prepare(task);
 	}
+	nfs_release_seqid(calldata->arg.seqid);
 }
 static void nfs4_locku_prepare(struct rpc_task *task, void *data)
 	calldata->timestamp = jiffies;
 	if (nfs4_setup_sequence(calldata->server,
 				&calldata->arg.seq_args,
-				&calldata->res.seq_res, task))
+				&calldata->res.seq_res,
-		return;
+				task) != 0)
-	rpc_call_start(task);
+		nfs_release_seqid(calldata->arg.seqid);
+	else
+		rpc_call_start(task);
 }
 static const struct rpc_call_ops nfs4_locku_ops = {
 	/* Do we need to do an open_to_lock_owner? */
 	if (!(data->arg.lock_seqid->sequence->flags & NFS_SEQID_CONFIRMED)) {
 		if (nfs_wait_on_sequence(data->arg.open_seqid, task) != 0)
-			return;
+			goto out_release_lock_seqid;
 		data->arg.open_stateid = &state->stateid;
 		data->arg.new_lock_owner = 1;
 		data->res.open_seqid = data->arg.open_seqid;
 	data->timestamp = jiffies;
 	if (nfs4_setup_sequence(data->server,
 				&data->arg.seq_args,
-				&data->res.seq_res, task))
+				&data->res.seq_res,
+				task) == 0) {
+		rpc_call_start(task);
 		return;
-	rpc_call_start(task);
+	}
-	dprintk("%s: done!, ret = %d\n", __func__, data->rpc_status);
+	nfs_release_seqid(data->arg.open_seqid);
+out_release_lock_seqid:
+	nfs_release_seqid(data->arg.lock_seqid);
+	dprintk("%s: done!, ret = %d\n", __func__, task->tk_status);
 }
 static void nfs4_recover_lock_prepare(struct rpc_task *task, void *calldata)
 		tbl->slots = new;
 		tbl->max_slots = max_slots;
 	}
-	tbl->highest_used_slotid = -1;	/* no slot is currently used */
+	tbl->highest_used_slotid = NFS4_NO_SLOT;
 	for (i = 0; i < tbl->max_slots; i++)
 		tbl->slots[i].seq_nr = ivalue;
 	spin_unlock(&tbl->slot_tbl_lock);

fs/nfs/pnfs.c+2−2

@@ -925,8 +925,8 @@ pnfs_find_alloc_layout(struct inode *ino, · 924 unmodified lines
925	if (likely(nfsi->layout == NULL)) { /* Won the race? */	925	if (likely(nfsi->layout == NULL)) { /* Won the race? */
926	nfsi->layout = new;	926	nfsi->layout = new;
927	return new;	927	return new;
928	}	928	} else if (new != NULL)
929	pnfs_free_layout_hdr(new);	929	pnfs_free_layout_hdr(new);
930	out_existing:	930	out_existing:
931	pnfs_get_layout_hdr(nfsi->layout);	931	pnfs_get_layout_hdr(nfsi->layout);
932	return nfsi->layout;	932	return nfsi->layout;

fs/nfs/super.c+50−1

@@ -54,6 +54,7 @@ · 53 unmodified lines
54	#include <linux/parser.h>	54	#include <linux/parser.h>
55	#include <linux/nsproxy.h>	55	#include <linux/nsproxy.h>
56	#include <linux/rcupdate.h>	56	#include <linux/rcupdate.h>
		57	#include <linux/kthread.h>
57		58
58	#include <asm/uaccess.h>	59	#include <asm/uaccess.h>
59		60
@@ -415,6 +416,54 @@ void nfs_sb_deactive(struct super_block *sb) · 355 unmodified lines
415	}	416	}
416	EXPORT_SYMBOL_GPL(nfs_sb_deactive);	417	EXPORT_SYMBOL_GPL(nfs_sb_deactive);
417		418
		419	static int nfs_deactivate_super_async_work(void *ptr)
		420	{
		421	struct super_block *sb = ptr;
		422
		423	deactivate_super(sb);
		424	module_put_and_exit(0);
		425	return 0;
		426	}
		427
		428	/*
		429	* same effect as deactivate_super, but will do final unmount in kthread
		430	* context
		431	*/
		432	static void nfs_deactivate_super_async(struct super_block *sb)
		433	{
		434	struct task_struct *task;
		435	char buf[INET6_ADDRSTRLEN + 1];
		436	struct nfs_server *server = NFS_SB(sb);
		437	struct nfs_client *clp = server->nfs_client;
		438
		439	if (!atomic_add_unless(&sb->s_active, -1, 1)) {
		440	rcu_read_lock();
		441	snprintf(buf, sizeof(buf),
		442	rpc_peeraddr2str(clp->cl_rpcclient, RPC_DISPLAY_ADDR));
		443	rcu_read_unlock();
		444
		445	__module_get(THIS_MODULE);
		446	task = kthread_run(nfs_deactivate_super_async_work, sb,
		447	"%s-deactivate-super", buf);
		448	if (IS_ERR(task)) {
		449	pr_err("%s: kthread_run: %ld\n",
		450	__func__, PTR_ERR(task));
		451	/* make synchronous call and hope for the best */
		452	deactivate_super(sb);
		453	module_put(THIS_MODULE);
		454	}
		455	}
		456	}
		457
		458	void nfs_sb_deactive_async(struct super_block *sb)
		459	{
		460	struct nfs_server *server = NFS_SB(sb);
		461
		462	if (atomic_dec_and_test(&server->active))
		463	nfs_deactivate_super_async(sb);
		464	}
		465	EXPORT_SYMBOL_GPL(nfs_sb_deactive_async);
		466
418	/*	467	/*
419	* Deliver file system statistics to userspace	468	* Deliver file system statistics to userspace
420	*/	469	*/
@@ -771,7 +820,7 @@ int nfs_show_devname(struct seq_file m, struct dentry root) · 350 unmodified lines
771	int err = 0;	820	int err = 0;
772	if (!page)	821	if (!page)
773	return -ENOMEM;	822	return -ENOMEM;
774	devname = nfs_path(&dummy, root, page, PAGE_SIZE);	823	devname = nfs_path(&dummy, root, page, PAGE_SIZE, 0);
775	if (IS_ERR(devname))	824	if (IS_ERR(devname))
776	err = PTR_ERR(devname);	825	err = PTR_ERR(devname);
777	else	826	else

fs/nfs/unlink.c+1−1

@@ -95,7 +95,7 @@ static void nfs_async_unlink_release(void *calldata) · 94 unmodified lines
95		95
96	nfs_dec_sillycount(data->dir);	96	nfs_dec_sillycount(data->dir);
97	nfs_free_unlinkdata(data);	97	nfs_free_unlinkdata(data);
98	nfs_sb_deactive(sb);	98	nfs_sb_deactive_async(sb);
99	}	99	}
100		100
101	static void nfs_unlink_prepare(struct rpc_task task, void calldata)	101	static void nfs_unlink_prepare(struct rpc_task task, void calldata)

fs/notify/fanotify/fanotify.c+1−0

@@ -21,6 +21,7 @@ static bool should_merge(struct fsnotify_event old, struct fsnotify_event new) · 20 unmodified lines
21	if ((old->path.mnt == new->path.mnt) &&	21	if ((old->path.mnt == new->path.mnt) &&
22	(old->path.dentry == new->path.dentry))	22	(old->path.dentry == new->path.dentry))
23	return true;	23	return true;
		24	break;
24	case (FSNOTIFY_EVENT_NONE):	25	case (FSNOTIFY_EVENT_NONE):
25	return true;	26	return true;
26	default:	27	default:

fs/proc/base.c+109−0

@@ -873,6 +873,113 @@ static const struct file_operations proc_environ_operations = { · 872 unmodified lines
873	.release = mem_release,	873	.release = mem_release,
874	};	874	};
875		875
		876	static ssize_t oom_adj_read(struct file file, char __user buf, size_t count,
		877	loff_t *ppos)
		878	{
		879	struct task_struct *task = get_proc_task(file->f_path.dentry->d_inode);
		880	char buffer[PROC_NUMBUF];
		881	int oom_adj = OOM_ADJUST_MIN;
		882	size_t len;
		883	unsigned long flags;
		884
		885	if (!task)
		886	return -ESRCH;
		887	if (lock_task_sighand(task, &flags)) {
		888	if (task->signal->oom_score_adj == OOM_SCORE_ADJ_MAX)
		889	oom_adj = OOM_ADJUST_MAX;
		890	else
		891	oom_adj = (task->signal->oom_score_adj * -OOM_DISABLE) /
		892	OOM_SCORE_ADJ_MAX;
		893	unlock_task_sighand(task, &flags);
		894	}
		895	put_task_struct(task);
		896	len = snprintf(buffer, sizeof(buffer), "%d\n", oom_adj);
		897	return simple_read_from_buffer(buf, count, ppos, buffer, len);
		898	}
		899
		900	static ssize_t oom_adj_write(struct file file, const char __user buf,
		901	size_t count, loff_t *ppos)
		902	{
		903	struct task_struct *task;
		904	char buffer[PROC_NUMBUF];
		905	int oom_adj;
		906	unsigned long flags;
		907	int err;
		908
		909	memset(buffer, 0, sizeof(buffer));
		910	if (count > sizeof(buffer) - 1)
		911	count = sizeof(buffer) - 1;
		912	if (copy_from_user(buffer, buf, count)) {
		913	err = -EFAULT;
		914	goto out;
		915	}
		916
		917	err = kstrtoint(strstrip(buffer), 0, &oom_adj);
		918	if (err)
		919	goto out;
		920	if ((oom_adj < OOM_ADJUST_MIN \|\| oom_adj > OOM_ADJUST_MAX) &&
		921	oom_adj != OOM_DISABLE) {
		922	err = -EINVAL;
		923	goto out;
		924	}
		925
		926	task = get_proc_task(file->f_path.dentry->d_inode);
		927	if (!task) {
		928	err = -ESRCH;
		929	goto out;
		930	}
		931
		932	task_lock(task);
		933	if (!task->mm) {
		934	err = -EINVAL;
		935	goto err_task_lock;
		936	}
		937
		938	if (!lock_task_sighand(task, &flags)) {
		939	err = -ESRCH;
		940	goto err_task_lock;
		941	}
		942
		943	/*
		944	* Scale /proc/pid/oom_score_adj appropriately ensuring that a maximum
		945	* value is always attainable.
		946	*/
		947	if (oom_adj == OOM_ADJUST_MAX)
		948	oom_adj = OOM_SCORE_ADJ_MAX;
		949	else
		950	oom_adj = (oom_adj * OOM_SCORE_ADJ_MAX) / -OOM_DISABLE;
		951
		952	if (oom_adj < task->signal->oom_score_adj &&
		953	!capable(CAP_SYS_RESOURCE)) {
		954	err = -EACCES;
		955	goto err_sighand;
		956	}
		957
		958	/*
		959	* /proc/pid/oom_adj is provided for legacy purposes, ask users to use
		960	* /proc/pid/oom_score_adj instead.
		961	*/
		962	printk_once(KERN_WARNING "%s (%d): /proc/%d/oom_adj is deprecated, please use /proc/%d/oom_score_adj instead.\n",
		963	current->comm, task_pid_nr(current), task_pid_nr(task),
		964	task_pid_nr(task));
		965
		966	task->signal->oom_score_adj = oom_adj;
		967	trace_oom_score_adj_update(task);
		968	err_sighand:
		969	unlock_task_sighand(task, &flags);
		970	err_task_lock:
		971	task_unlock(task);
		972	put_task_struct(task);
		973	out:
		974	return err < 0 ? err : count;
		975	}
		976
		977	static const struct file_operations proc_oom_adj_operations = {
		978	.read = oom_adj_read,
		979	.write = oom_adj_write,
		980	.llseek = generic_file_llseek,
		981	};
		982
876	static ssize_t oom_score_adj_read(struct file file, char __user buf,	983	static ssize_t oom_score_adj_read(struct file file, char __user buf,
877	size_t count, loff_t *ppos)	984	size_t count, loff_t *ppos)
878	{	985	{
@@ -2598,6 +2705,7 @@ static const struct pid_entry tgid_base_stuff[] = { · 1719 unmodified lines
2598	REG("cgroup", S_IRUGO, proc_cgroup_operations),	2705	REG("cgroup", S_IRUGO, proc_cgroup_operations),
2599	#endif	2706	#endif
2600	INF("oom_score", S_IRUGO, proc_oom_score),	2707	INF("oom_score", S_IRUGO, proc_oom_score),
		2708	REG("oom_adj", S_IRUGO\|S_IWUSR, proc_oom_adj_operations),
2601	REG("oom_score_adj", S_IRUGO\|S_IWUSR, proc_oom_score_adj_operations),	2709	REG("oom_score_adj", S_IRUGO\|S_IWUSR, proc_oom_score_adj_operations),
2602	#ifdef CONFIG_AUDITSYSCALL	2710	#ifdef CONFIG_AUDITSYSCALL
2603	REG("loginuid", S_IWUSR\|S_IRUGO, proc_loginuid_operations),	2711	REG("loginuid", S_IWUSR\|S_IRUGO, proc_loginuid_operations),
@@ -2964,6 +3072,7 @@ static const struct pid_entry tid_base_stuff[] = { · 360 unmodified lines
2964	REG("cgroup", S_IRUGO, proc_cgroup_operations),	3072	REG("cgroup", S_IRUGO, proc_cgroup_operations),
2965	#endif	3073	#endif
2966	INF("oom_score", S_IRUGO, proc_oom_score),	3074	INF("oom_score", S_IRUGO, proc_oom_score),
		3075	REG("oom_adj", S_IRUGO\|S_IWUSR, proc_oom_adj_operations),
2967	REG("oom_score_adj", S_IRUGO\|S_IWUSR, proc_oom_score_adj_operations),	3076	REG("oom_score_adj", S_IRUGO\|S_IWUSR, proc_oom_score_adj_operations),
2968	#ifdef CONFIG_AUDITSYSCALL	3077	#ifdef CONFIG_AUDITSYSCALL
2969	REG("loginuid", S_IWUSR\|S_IRUGO, proc_loginuid_operations),	3078	REG("loginuid", S_IWUSR\|S_IRUGO, proc_loginuid_operations),

fs/pstore/platform.c+2−1

 	while (s < e) {
 		unsigned long flags;
+		u64 id;
 		if (c > psinfo->bufsize)
 			c = psinfo->bufsize;
 			spin_lock_irqsave(&psinfo->buf_lock, flags);
 		}
 		memcpy(psinfo->buf, s, c);
-		psinfo->write(PSTORE_TYPE_CONSOLE, 0, NULL, 0, c, psinfo);
+		psinfo->write(PSTORE_TYPE_CONSOLE, 0, &id, 0, c, psinfo);
 		spin_unlock_irqrestore(&psinfo->buf_lock, flags);
 		s += c;
 		c = e - s;

fs/ubifs/find.c+10−2

 	if (!lprops) {
 		lprops = ubifs_fast_find_freeable(c);
 		if (!lprops) {
-			ubifs_assert(c->freeable_cnt == 0);
+			/*
-			if (c->lst.empty_lebs - c->lst.taken_empty_lebs > 0) {
+			 * The first condition means the following: go scan the
+			 * LPT if there are uncategorized lprops, which means
+			 * there may be freeable LEBs there (UBIFS does not
+			 * store the information about freeable LEBs in the
+			 * master node).
+			 */
+			if (c->in_a_category_cnt != c->main_lebs ||
+			    c->lst.empty_lebs - c->lst.taken_empty_lebs > 0) {
+				ubifs_assert(c->freeable_cnt == 0);
 				lprops = scan_for_leb_for_idx(c);
 				if (IS_ERR(lprops)) {
 					err = PTR_ERR(lprops);

fs/ubifs/lprops.c+6−0

 	default:
 		ubifs_assert(0);
 	}
 	lprops->flags &= ~LPROPS_CAT_MASK;
 	lprops->flags |= cat;
+	c->in_a_category_cnt += 1;
+	ubifs_assert(c->in_a_category_cnt <= c->main_lebs);
 }
 /**
 	default:
 		ubifs_assert(0);
 	}
+	c->in_a_category_cnt -= 1;
+	ubifs_assert(c->in_a_category_cnt >= 0);
 }
 /**

fs/ubifs/ubifs.h+3−0

  * @freeable_list: list of freeable non-index LEBs (free + dirty == @leb_size)
  * @frdi_idx_list: list of freeable index LEBs (free + dirty == @leb_size)
  * @freeable_cnt: number of freeable LEBs in @freeable_list
+ * @in_a_category_cnt: count of lprops which are in a certain category, which
+ *                     basically meants that they were loaded from the flash
  *
  * @ltab_lnum: LEB number of LPT's own lprops table
  * @ltab_offs: offset of LPT's own lprops table
 	struct list_head freeable_list;
 	struct list_head frdi_idx_list;
 	int freeable_cnt;
+	int in_a_category_cnt;
 	int ltab_lnum;
 	int ltab_offs;

fs/xfs/xfs_alloc.c+2−41

@@ -1866,6 +1866,7 @@ xfs_alloc_fix_freelist( · 1865 unmodified lines
1866	/*	1866	/*
1867	* Initialize the args structure.	1867	* Initialize the args structure.
1868	*/	1868	*/
		1869	memset(&targs, 0, sizeof(targs));
1869	targs.tp = tp;	1870	targs.tp = tp;
1870	targs.mp = mp;	1871	targs.mp = mp;
1871	targs.agbp = agbp;	1872	targs.agbp = agbp;
@@ -2207,7 +2208,7 @@ xfs_alloc_read_agf( · 335 unmodified lines
2207	* group or loop over the allocation groups to find the result.	2208	* group or loop over the allocation groups to find the result.
2208	*/	2209	*/
2209	int /* error */	2210	int /* error */
2210	__xfs_alloc_vextent(	2211	xfs_alloc_vextent(
2211	xfs_alloc_arg_t args) / allocation argument structure */	2212	xfs_alloc_arg_t args) / allocation argument structure */
2212	{	2213	{
2213	xfs_agblock_t agsize; /* allocation group size */	2214	xfs_agblock_t agsize; /* allocation group size */
@@ -2417,46 +2418,6 @@ error0: · 203 unmodified lines
2417	return error;	2418	return error;
2418	}	2419	}
2419		2420
2420	static void
2421	xfs_alloc_vextent_worker(
2422	struct work_struct *work)
2423	{
2424	struct xfs_alloc_arg *args = container_of(work,
2425	struct xfs_alloc_arg, work);
2426	unsigned long pflags;
2427
2428	/* we are in a transaction context here */
2429	current_set_flags_nested(&pflags, PF_FSTRANS);
2430
2431	args->result = __xfs_alloc_vextent(args);
2432	complete(args->done);
2433
2434	current_restore_flags_nested(&pflags, PF_FSTRANS);
2435	}
2436
2437	/*
2438	* Data allocation requests often come in with little stack to work on. Push
2439	* them off to a worker thread so there is lots of stack to use. Metadata
2440	* requests, OTOH, are generally from low stack usage paths, so avoid the
2441	* context switch overhead here.
2442	*/
2443	int
2444	xfs_alloc_vextent(
2445	struct xfs_alloc_arg *args)
2446	{
2447	DECLARE_COMPLETION_ONSTACK(done);
2448
2449	if (!args->userdata)
2450	return __xfs_alloc_vextent(args);
2451
2452
2453	args->done = &done;
2454	INIT_WORK_ONSTACK(&args->work, xfs_alloc_vextent_worker);
2455	queue_work(xfs_alloc_wq, &args->work);
2456	wait_for_completion(&done);
2457	return args->result;
2458	}
2459
2460	/*	2421	/*
2461	* Free an extent.	2422	* Free an extent.
2462	* Just break up the extent address and hand off to xfs_free_ag_extent	2423	* Just break up the extent address and hand off to xfs_free_ag_extent

fs/xfs/xfs_alloc.h+0−3

 	char		isfl;		/* set if is freelist blocks - !acctg */
 	char		userdata;	/* set if this is user data */
 	xfs_fsblock_t	firstblock;	/* io first block allocated */
-	struct completion *done;
-	struct work_struct work;
-	int		result;
 } xfs_alloc_arg_t;
 /*

fs/xfs/xfs_alloc_btree.c+2−0

@@ -121,6 +121,8 @@ xfs_allocbt_free_block( · 120 unmodified lines
121	xfs_extent_busy_insert(cur->bc_tp, be32_to_cpu(agf->agf_seqno), bno, 1,	121	xfs_extent_busy_insert(cur->bc_tp, be32_to_cpu(agf->agf_seqno), bno, 1,
122	XFS_EXTENT_BUSY_SKIP_DISCARD);	122	XFS_EXTENT_BUSY_SKIP_DISCARD);
123	xfs_trans_agbtree_delta(cur->bc_tp, -1);	123	xfs_trans_agbtree_delta(cur->bc_tp, -1);
		124
		125	xfs_trans_binval(cur->bc_tp, bp);
124	return 0;	126	return 0;
125	}	127	}
126		128

fs/xfs/xfs_bmap.c+54−9

 	 * Normal allocation, done through xfs_alloc_vextent.
 	 */
 	tryagain = isaligned = 0;
+	memset(&args, 0, sizeof(args));
 	args.tp = ap->tp;
 	args.mp = mp;
 	args.fsbno = ap->blkno;
 	 * Convert to a btree with two levels, one record in root.
 	 */
 	XFS_IFORK_FMT_SET(ip, whichfork, XFS_DINODE_FMT_BTREE);
+	memset(&args, 0, sizeof(args));
 	args.tp = tp;
 	args.mp = mp;
 	args.firstblock = *firstblock;
 		xfs_buf_t	*bp;	/* buffer for extent block */
 		xfs_bmbt_rec_host_t *ep;/* extent record pointer */
+		memset(&args, 0, sizeof(args));
 		args.tp = tp;
 		args.mp = ip->i_mount;
 		args.firstblock = *firstblock;
 STATIC int
-xfs_bmapi_allocate(
+__xfs_bmapi_allocate(
-	struct xfs_bmalloca	*bma,
+	struct xfs_bmalloca	*bma)
-	int			flags)
 {
 	struct xfs_mount	*mp = bma->ip->i_mount;
-	int			whichfork = (flags & XFS_BMAPI_ATTRFORK) ?
+	int			whichfork = (bma->flags & XFS_BMAPI_ATTRFORK) ?
 						XFS_ATTR_FORK : XFS_DATA_FORK;
 	struct xfs_ifork	*ifp = XFS_IFORK_PTR(bma->ip, whichfork);
 	int			tmp_logflags = 0;
 	 * Indicate if this is the first user data in the file, or just any
 	 * user data.
 	 */
-	if (!(flags & XFS_BMAPI_METADATA)) {
+	if (!(bma->flags & XFS_BMAPI_METADATA)) {
 		bma->userdata = (bma->offset == 0) ?
 			XFS_ALLOC_INITIAL_USER_DATA : XFS_ALLOC_USERDATA;
 	}
-	bma->minlen = (flags & XFS_BMAPI_CONTIG) ? bma->length : 1;
+	bma->minlen = (bma->flags & XFS_BMAPI_CONTIG) ? bma->length : 1;
 	/*
 	 * Only want to do the alignment at the eof if it is userdata and
 	 * allocation length is larger than a stripe unit.
 	 */
 	if (mp->m_dalign && bma->length >= mp->m_dalign &&
-	    !(flags & XFS_BMAPI_METADATA) && whichfork == XFS_DATA_FORK) {
+	    !(bma->flags & XFS_BMAPI_METADATA) && whichfork == XFS_DATA_FORK) {
 		error = xfs_bmap_isaeof(bma, whichfork);
 		if (error)
 			return error;
 	}
+	if (bma->flags & XFS_BMAPI_STACK_SWITCH)
+		bma->stack_switch = 1;
 	error = xfs_bmap_alloc(bma);
 	if (error)
 		return error;
 	 * A wasdelay extent has been initialized, so shouldn't be flagged
 	 * as unwritten.
 	 */
-	if (!bma->wasdel && (flags & XFS_BMAPI_PREALLOC) &&
+	if (!bma->wasdel && (bma->flags & XFS_BMAPI_PREALLOC) &&
 	    xfs_sb_version_hasextflgbit(&mp->m_sb))
 		bma->got.br_state = XFS_EXT_UNWRITTEN;
 	return 0;
 }
+static void
+xfs_bmapi_allocate_worker(
+	struct work_struct	*work)
+{
+	struct xfs_bmalloca	*args = container_of(work,
+						struct xfs_bmalloca, work);
+	unsigned long		pflags;
+	/* we are in a transaction context here */
+	current_set_flags_nested(&pflags, PF_FSTRANS);
+	args->result = __xfs_bmapi_allocate(args);
+	complete(args->done);
+	current_restore_flags_nested(&pflags, PF_FSTRANS);
+}
+/*
+ * Some allocation requests often come in with little stack to work on. Push
+ * them off to a worker thread so there is lots of stack to use. Otherwise just
+ * call directly to avoid the context switch overhead here.
+ */
+int
+xfs_bmapi_allocate(
+	struct xfs_bmalloca	*args)
+{
+	DECLARE_COMPLETION_ONSTACK(done);
+	if (!args->stack_switch)
+		return __xfs_bmapi_allocate(args);
+	args->done = &done;
+	INIT_WORK_ONSTACK(&args->work, xfs_bmapi_allocate_worker);
+	queue_work(xfs_alloc_wq, &args->work);
+	wait_for_completion(&done);
+	return args->result;
+}
 STATIC int
 xfs_bmapi_convert_unwritten(
 	struct xfs_bmalloca	*bma,
 			bma.conv = !!(flags & XFS_BMAPI_CONVERT);
 			bma.wasdel = wasdelay;
 			bma.offset = bno;
+			bma.flags = flags;
 			/*
 			 * There's a 32/64 bit type mismatch between the
 			ASSERT(len > 0);
 			ASSERT(bma.length > 0);
-			error = xfs_bmapi_allocate(&bma, flags);
+			error = xfs_bmapi_allocate(&bma);
 			if (error)
 				goto error0;
 			if (bma.blkno == NULLFSBLOCK)

fs/xfs/xfs_bmap.h+8−1

  * from written to unwritten, otherwise convert from unwritten to written.
  */
 #define XFS_BMAPI_CONVERT	0x040
+#define XFS_BMAPI_STACK_SWITCH	0x080
 #define XFS_BMAPI_FLAGS \
 	{ XFS_BMAPI_ENTIRE,	"ENTIRE" }, \
 	{ XFS_BMAPI_PREALLOC,	"PREALLOC" }, \
 	{ XFS_BMAPI_IGSTATE,	"IGSTATE" }, \
 	{ XFS_BMAPI_CONTIG,	"CONTIG" }, \
-	{ XFS_BMAPI_CONVERT,	"CONVERT" }
+	{ XFS_BMAPI_CONVERT,	"CONVERT" }, \
+	{ XFS_BMAPI_STACK_SWITCH, "STACK_SWITCH" }
 static inline int xfs_bmapi_aflag(int w)
 	char			userdata;/* set if is user data */
 	char			aeof;	/* allocated space at eof */
 	char			conv;	/* overwriting unwritten extents */
+	char			stack_switch;
+	int			flags;
+	struct completion	*done;
+	struct work_struct	work;
+	int			result;
 } xfs_bmalloca_t;
 /*

fs/xfs/xfs_buf_item.c+18−0

@@ -526,7 +526,25 @@ xfs_buf_item_unpin( · 525 unmodified lines
526	}	526	}
527	xfs_buf_relse(bp);	527	xfs_buf_relse(bp);
528	} else if (freed && remove) {	528	} else if (freed && remove) {
		529	/*
		530	* There are currently two references to the buffer - the active
		531	* LRU reference and the buf log item. What we are about to do
		532	* here - simulate a failed IO completion - requires 3
		533	* references.
		534	*
		535	* The LRU reference is removed by the xfs_buf_stale() call. The
		536	* buf item reference is removed by the xfs_buf_iodone()
		537	* callback that is run by xfs_buf_do_callbacks() during ioend
		538	* processing (via the bp->b_iodone callback), and then finally
		539	* the ioend processing will drop the IO reference if the buffer
		540	* is marked XBF_ASYNC.
		541	*
		542	* Hence we need to take an additional reference here so that IO
		543	* completion processing doesn't free the buffer prematurely.
		544	*/
529	xfs_buf_lock(bp);	545	xfs_buf_lock(bp);
		546	xfs_buf_hold(bp);
		547	bp->b_flags \|= XBF_ASYNC;
530	xfs_buf_ioerror(bp, EIO);	548	xfs_buf_ioerror(bp, EIO);
531	XFS_BUF_UNDONE(bp);	549	XFS_BUF_UNDONE(bp);
532	xfs_buf_stale(bp);	550	xfs_buf_stale(bp);

fs/xfs/xfs_fsops.c+19−2

@@ -399,9 +399,26 @@ xfs_growfs_data_private( · 398 unmodified lines
399		399
400	/* update secondary superblocks. */	400	/* update secondary superblocks. */
401	for (agno = 1; agno < nagcount; agno++) {	401	for (agno = 1; agno < nagcount; agno++) {
402	error = xfs_trans_read_buf(mp, NULL, mp->m_ddev_targp,	402	error = 0;
		403	/*
		404	* new secondary superblocks need to be zeroed, not read from
		405	* disk as the contents of the new area we are growing into is
		406	* completely unknown.
		407	*/
		408	if (agno < oagcount) {
		409	error = xfs_trans_read_buf(mp, NULL, mp->m_ddev_targp,
403	XFS_AGB_TO_DADDR(mp, agno, XFS_SB_BLOCK(mp)),	410	XFS_AGB_TO_DADDR(mp, agno, XFS_SB_BLOCK(mp)),
404	XFS_FSS_TO_BB(mp, 1), 0, &bp);	411	XFS_FSS_TO_BB(mp, 1), 0, &bp);
		412	} else {
		413	bp = xfs_trans_get_buf(NULL, mp->m_ddev_targp,
		414	XFS_AGB_TO_DADDR(mp, agno, XFS_SB_BLOCK(mp)),
		415	XFS_FSS_TO_BB(mp, 1), 0);
		416	if (bp)
		417	xfs_buf_zero(bp, 0, BBTOB(bp->b_length));
		418	else
		419	error = ENOMEM;
		420	}
		421
405	if (error) {	422	if (error) {
406	xfs_warn(mp,	423	xfs_warn(mp,
407	"error %d reading secondary superblock for ag %d",	424	"error %d reading secondary superblock for ag %d",
@@ -423,7 +440,7 @@ xfs_growfs_data_private( · 15 unmodified lines
423	break; /* no point in continuing */	440	break; /* no point in continuing */
424	}	441	}
425	}	442	}
426	return 0;	443	return error;
427		444
428	error0:	445	error0:
429	xfs_trans_cancel(tp, XFS_TRANS_ABORT);	446	xfs_trans_cancel(tp, XFS_TRANS_ABORT);

fs/xfs/xfs_ialloc.c+1−0

@@ -250,6 +250,7 @@ xfs_ialloc_ag_alloc( · 249 unmodified lines
250	/* boundary */	250	/* boundary */
251	struct xfs_perag *pag;	251	struct xfs_perag *pag;
252		252
		253	memset(&args, 0, sizeof(args));
253	args.tp = tp;	254	args.tp = tp;
254	args.mp = tp->t_mountp;	255	args.mp = tp->t_mountp;
255		256

fs/xfs/xfs_inode.c+2−1

@@ -1509,7 +1509,8 @@ xfs_ifree_cluster( · 1508 unmodified lines
1509	* to mark all the active inodes on the buffer stale.	1509	* to mark all the active inodes on the buffer stale.
1510	*/	1510	*/
1511	bp = xfs_trans_get_buf(tp, mp->m_ddev_targp, blkno,	1511	bp = xfs_trans_get_buf(tp, mp->m_ddev_targp, blkno,
1512	mp->m_bsize * blks_per_cluster, 0);	1512	mp->m_bsize * blks_per_cluster,
		1513	XBF_UNMAPPED);
1513		1514
1514	if (!bp)	1515	if (!bp)
1515	return ENOMEM;	1516	return ENOMEM;

fs/xfs/xfs_ioctl.c+1−1

@@ -70,7 +70,7 @@ xfs_find_handle( · 69 unmodified lines
70	int hsize;	70	int hsize;
71	xfs_handle_t handle;	71	xfs_handle_t handle;
72	struct inode *inode;	72	struct inode *inode;
73	struct fd f;	73	struct fd f = {0};
74	struct path path;	74	struct path path;
75	int error;	75	int error;
76	struct xfs_inode *ip;	76	struct xfs_inode *ip;

fs/xfs/xfs_iomap.c+3−1

 			 * pointer that the caller gave to us.
 			 */
 			error = xfs_bmapi_write(tp, ip, map_start_fsb,
-						count_fsb, 0, &first_block, 1,
+						count_fsb,
+						XFS_BMAPI_STACK_SWITCH,
+						&first_block, 1,
 						imap, &nimaps, &free_list);
 			if (error)
 				goto trans_cancel;

fs/xfs/xfs_log.c+16−3

 				/*
-				 * update the last_sync_lsn before we drop the
+				 * Completion of a iclog IO does not imply that
+				 * a transaction has completed, as transactions
+				 * can be large enough to span many iclogs. We
+				 * cannot change the tail of the log half way
+				 * through a transaction as this may be the only
+				 * transaction in the log and moving th etail to
+				 * point to the middle of it will prevent
+				 * recovery from finding the start of the
+				 * transaction. Hence we should only update the
+				 * last_sync_lsn if this iclog contains
+				 * transaction completion callbacks on it.
+				 *
+				 * We have to do this before we drop the
 				 * icloglock to ensure we are the only one that
 				 * can update it.
 				 */
 				ASSERT(XFS_LSN_CMP(atomic64_read(&log->l_last_sync_lsn),
 					be64_to_cpu(iclog->ic_header.h_lsn)) <= 0);
-				atomic64_set(&log->l_last_sync_lsn,
+				if (iclog->ic_callback)
-					be64_to_cpu(iclog->ic_header.h_lsn));
+					atomic64_set(&log->l_last_sync_lsn,
+						be64_to_cpu(iclog->ic_header.h_lsn));
 			} else
 				ioerrors++;

fs/xfs/xfs_log_recover.c+1−1

@@ -3541,7 +3541,7 @@ xlog_do_recovery_pass( · 3540 unmodified lines
3541	* - order is important.	3541	* - order is important.
3542	*/	3542	*/
3543	error = xlog_bread_offset(log, 0,	3543	error = xlog_bread_offset(log, 0,
3544	bblks - split_bblks, hbp,	3544	bblks - split_bblks, dbp,
3545	offset + BBTOB(split_bblks));	3545	offset + BBTOB(split_bblks));
3546	if (error)	3546	if (error)
3547	goto bread_err2;	3547	goto bread_err2;

include/linux/clk-provider.h+2−2

@@ -335,8 +335,8 @@ const char __clk_get_name(struct clk clk); · 334 unmodified lines
335	struct clk_hw __clk_get_hw(struct clk clk);	335	struct clk_hw __clk_get_hw(struct clk clk);
336	u8 __clk_get_num_parents(struct clk *clk);	336	u8 __clk_get_num_parents(struct clk *clk);
337	struct clk __clk_get_parent(struct clk clk);	337	struct clk __clk_get_parent(struct clk clk);
338	inline int __clk_get_enable_count(struct clk *clk);	338	int __clk_get_enable_count(struct clk *clk);
339	inline int __clk_get_prepare_count(struct clk *clk);	339	int __clk_get_prepare_count(struct clk *clk);
340	unsigned long __clk_get_rate(struct clk *clk);	340	unsigned long __clk_get_rate(struct clk *clk);
341	unsigned long __clk_get_flags(struct clk *clk);	341	unsigned long __clk_get_flags(struct clk *clk);
342	int __clk_is_enabled(struct clk *clk);	342	int __clk_is_enabled(struct clk *clk);

include/linux/mm.h+0−4

@@ -1684,9 +1684,5 @@ static inline unsigned int debug_guardpage_minorder(void) { return 0; } · 1683 unmodified lines
1684	static inline bool page_is_guard(struct page *page) { return false; }	1684	static inline bool page_is_guard(struct page *page) { return false; }
1685	#endif /* CONFIG_DEBUG_PAGEALLOC */	1685	#endif /* CONFIG_DEBUG_PAGEALLOC */
1686		1686
1687	extern void reset_zone_present_pages(void);
1688	extern void fixup_zone_present_pages(int nid, unsigned long start_pfn,
1689	unsigned long end_pfn);
1690
1691	#endif /* __KERNEL__ */	1687	#endif /* __KERNEL__ */
1692	#endif /* _LINUX_MM_H */	1688	#endif /* _LINUX_MM_H */

include/linux/mmc/dw_mmc.h+3−3

@@ -137,7 +137,7 @@ struct dw_mci { · 136 unmodified lines
137		137
138	dma_addr_t sg_dma;	138	dma_addr_t sg_dma;
139	void *sg_cpu;	139	void *sg_cpu;
140	struct dw_mci_dma_ops *dma_ops;	140	const struct dw_mci_dma_ops *dma_ops;
141	#ifdef CONFIG_MMC_DW_IDMAC	141	#ifdef CONFIG_MMC_DW_IDMAC
142	unsigned int ring_size;	142	unsigned int ring_size;
143	#else	143	#else
@@ -162,7 +162,7 @@ struct dw_mci { · 18 unmodified lines
162	u16 data_offset;	162	u16 data_offset;
163	struct device *dev;	163	struct device *dev;
164	struct dw_mci_board *pdata;	164	struct dw_mci_board *pdata;
165	struct dw_mci_drv_data *drv_data;	165	const struct dw_mci_drv_data *drv_data;
166	void *priv;	166	void *priv;
167	struct clk *biu_clk;	167	struct clk *biu_clk;
168	struct clk *ciu_clk;	168	struct clk *ciu_clk;
@@ -186,7 +186,7 @@ struct dw_mci { · 17 unmodified lines
186		186
187	struct regulator vmmc; / Power regulator */	187	struct regulator vmmc; / Power regulator */
188	unsigned long irq_flags; /* IRQ flags */	188	unsigned long irq_flags; /* IRQ flags */
189	unsigned int irq;	189	int irq;
190	};	190	};
191		191
192	/* DMA ops for Internal/External DMAC interface */	192	/* DMA ops for Internal/External DMAC interface */

include/linux/mmc/sdhci.h+1−0

@@ -91,6 +91,7 @@ struct sdhci_host { · 90 unmodified lines
91	unsigned int quirks2; /* More deviations from spec. */	91	unsigned int quirks2; /* More deviations from spec. */
92		92
93	#define SDHCI_QUIRK2_HOST_OFF_CARD_ON (1<<0)	93	#define SDHCI_QUIRK2_HOST_OFF_CARD_ON (1<<0)
		94	#define SDHCI_QUIRK2_HOST_NO_CMD23 (1<<1)
94		95
95	int irq; /* Device IRQ */	96	int irq; /* Device IRQ */
96	void __iomem ioaddr; / Mapped address */	97	void __iomem ioaddr; / Mapped address */

include/linux/mmzone.h+1−1

@@ -752,7 +752,7 @@ extern int init_currently_empty_zone(struct zone *zone, unsigned long start_pfn, · 751 unmodified lines
752	unsigned long size,	752	unsigned long size,
753	enum memmap_context context);	753	enum memmap_context context);
754		754
755	extern void lruvec_init(struct lruvec lruvec, struct zone zone);	755	extern void lruvec_init(struct lruvec *lruvec);
756		756
757	static inline struct zone lruvec_zone(struct lruvec lruvec)	757	static inline struct zone lruvec_zone(struct lruvec lruvec)
758	{	758	{

include/linux/of_address.h+2−0

 #endif
 #else /* CONFIG_OF_ADDRESS */
+#ifndef of_address_to_resource
 static inline int of_address_to_resource(struct device_node *dev, int index,
 					 struct resource *r)
 {
 	return -EINVAL;
 }
+#endif
 static inline struct device_node *of_find_matching_node_by_address(
 					struct device_node *from,
 					const struct of_device_id *matches,

include/linux/platform_data/omap_ocp2scp.h+31−0

@@ -0,0 +1,31 @@
	1	/*
	2	* omap_ocp2scp.h -- ocp2scp header file
	3	*
	4	* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License as published by
	7	* the Free Software Foundation; either version 2 of the License, or
	8	* (at your option) any later version.
	9	*
	10	* Author: Kishon Vijay Abraham I <kishon@ti.com>
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	*/
	18
	19	#ifndef __DRIVERS_OMAP_OCP2SCP_H
	20	#define __DRIVERS_OMAP_OCP2SCP_H
	21
	22	struct omap_ocp2scp_dev {
	23	const char *drv_name;
	24	struct resource *res;
	25	};
	26
	27	struct omap_ocp2scp_platform_data {
	28	int dev_cnt;
	29	struct omap_ocp2scp_dev **devices;
	30	};
	31	#endif /* __DRIVERS_OMAP_OCP2SCP_H */

include/linux/rio.h+2−0

  * struct rio_net - RIO network info
  * @node: Node in global list of RIO networks
  * @devices: List of devices in this network
+ * @switches: List of switches in this netowrk
  * @mports: List of master ports accessing this network
  * @hport: Default port for accessing this network
  * @id: RIO network ID
+ * @destid_table: destID allocation table
  */
 struct rio_net {
 	struct list_head node;	/* node in list of networks */

include/uapi/linux/eventpoll.h+0−1

@@ -25,7 +25,6 @@ · 24 unmodified lines
25	#define EPOLL_CTL_ADD 1	25	#define EPOLL_CTL_ADD 1
26	#define EPOLL_CTL_DEL 2	26	#define EPOLL_CTL_DEL 2
27	#define EPOLL_CTL_MOD 3	27	#define EPOLL_CTL_MOD 3
28	#define EPOLL_CTL_DISABLE 4
29		28
30	/*	29	/*
31	* Request the handling of system wakeup events so as to prevent system suspends	30	* Request the handling of system wakeup events so as to prevent system suspends

include/uapi/linux/oom.h+9−0

@@ -8,4 +8,13 @@ · 7 unmodified lines
8	#define OOM_SCORE_ADJ_MIN (-1000)	8	#define OOM_SCORE_ADJ_MIN (-1000)
9	#define OOM_SCORE_ADJ_MAX 1000	9	#define OOM_SCORE_ADJ_MAX 1000
10		10
		11	/*
		12	* /proc/<pid>/oom_adj set to -17 protects from the oom killer for legacy
		13	* purposes.
		14	*/
		15	#define OOM_DISABLE (-17)
		16	/* inclusive */
		17	#define OOM_ADJUST_MIN (-16)
		18	#define OOM_ADJUST_MAX 15
		19
11	#endif /* _UAPI__INCLUDE_LINUX_OOM_H */	20	#endif /* _UAPI__INCLUDE_LINUX_OOM_H */

include/xen/hvm.h+32−2

@@ -5,6 +5,36 @@ · 4 unmodified lines
5	#include <xen/interface/hvm/params.h>	5	#include <xen/interface/hvm/params.h>
6	#include <asm/xen/hypercall.h>	6	#include <asm/xen/hypercall.h>
7		7
		8	static const char *param_name(int op)
		9	{
		10	#define PARAM(x) [HVM_PARAM_##x] = #x
		11	static const char *const names[] = {
		12	PARAM(CALLBACK_IRQ),
		13	PARAM(STORE_PFN),
		14	PARAM(STORE_EVTCHN),
		15	PARAM(PAE_ENABLED),
		16	PARAM(IOREQ_PFN),
		17	PARAM(BUFIOREQ_PFN),
		18	PARAM(TIMER_MODE),
		19	PARAM(HPET_ENABLED),
		20	PARAM(IDENT_PT),
		21	PARAM(DM_DOMAIN),
		22	PARAM(ACPI_S_STATE),
		23	PARAM(VM86_TSS),
		24	PARAM(VPT_ALIGN),
		25	PARAM(CONSOLE_PFN),
		26	PARAM(CONSOLE_EVTCHN),
		27	};
		28	#undef PARAM
		29
		30	if (op >= ARRAY_SIZE(names))
		31	return "unknown";
		32
		33	if (!names[op])
		34	return "reserved";
		35
		36	return names[op];
		37	}
8	static inline int hvm_get_parameter(int idx, uint64_t *value)	38	static inline int hvm_get_parameter(int idx, uint64_t *value)
9	{	39	{
10	struct xen_hvm_param xhv;	40	struct xen_hvm_param xhv;
@@ -14,8 +44,8 @@ static inline int hvm_get_parameter(int idx, uint64_t *value) · 3 unmodified lines
14	xhv.index = idx;	44	xhv.index = idx;
15	r = HYPERVISOR_hvm_op(HVMOP_get_param, &xhv);	45	r = HYPERVISOR_hvm_op(HVMOP_get_param, &xhv);
16	if (r < 0) {	46	if (r < 0) {
17	printk(KERN_ERR "Cannot get hvm parameter %d: %d!\n",	47	printk(KERN_ERR "Cannot get hvm parameter %s (%d): %d!\n",
18	idx, r);	48	param_name(idx), idx, r);
19	return r;	49	return r;
20	}	50	}
21	*value = xhv.value;	51	*value = xhv.value;

kernel/futex.c+22−19

 				struct futex_pi_state **ps,
 				struct task_struct *task, int set_waiters)
 {
-	int lock_taken, ret, ownerdied = 0;
+	int lock_taken, ret, force_take = 0;
 	u32 uval, newval, curval, vpid = task_pid_vnr(task);
 retry:
 	newval = curval | FUTEX_WAITERS;
 	/*
-	 * There are two cases, where a futex might have no owner (the
+	 * Should we force take the futex? See below.
-	 * owner TID is 0): OWNER_DIED. We take over the futex in this
-	 * case. We also do an unconditional take over, when the owner
-	 * of the futex died.
-	 *
-	 * This is safe as we are protected by the hash bucket lock !
 	 */
-	if (unlikely(ownerdied || !(curval & FUTEX_TID_MASK))) {
+	if (unlikely(force_take)) {
-		/* Keep the OWNER_DIED bit */
+		/*
+		 * Keep the OWNER_DIED and the WAITERS bit and set the
+		 * new TID value.
+		 */
 		newval = (curval & ~FUTEX_TID_MASK) | vpid;
-		ownerdied = 0;
+		force_take = 0;
 		lock_taken = 1;
 	}
 		goto retry;
 	/*
-	 * We took the lock due to owner died take over.
+	 * We took the lock due to forced take over.
 	 */
 	if (unlikely(lock_taken))
 		return 1;
 		switch (ret) {
 		case -ESRCH:
 			/*
-			 * No owner found for this futex. Check if the
+			 * We failed to find an owner for this
-			 * OWNER_DIED bit is set to figure out whether
+			 * futex. So we have no pi_state to block
-			 * this is a robust futex or not.
+			 * on. This can happen in two cases:
+			 *
+			 * 1) The owner died
+			 * 2) A stale FUTEX_WAITERS bit
+			 *
+			 * Re-read the futex value.
 			 */
 			if (get_futex_value_locked(&curval, uaddr))
 				return -EFAULT;
 			/*
-			 * We simply start over in case of a robust
+			 * If the owner died or we have a stale
-			 * futex. The code above will take the futex
+			 * WAITERS bit the owner TID in the user space
-			 * and return happy.
+			 * futex is 0.
 			 */
-			if (curval & FUTEX_OWNER_DIED) {
+			if (!(curval & FUTEX_TID_MASK)) {
-				ownerdied = 1;
+				force_take = 1;
 				goto retry;
 			}
 		default:

kernel/module.c+16−11

@@ -2293,12 +2293,17 @@ static void layout_symtab(struct module mod, struct load_info info) · 2292 unmodified lines
2293	src = (void *)info->hdr + symsect->sh_offset;	2293	src = (void *)info->hdr + symsect->sh_offset;
2294	nsrc = symsect->sh_size / sizeof(*src);	2294	nsrc = symsect->sh_size / sizeof(*src);
2295		2295
		2296	/* strtab always starts with a nul, so offset 0 is the empty string. */
		2297	strtab_size = 1;
		2298
2296	/* Compute total space required for the core symbols' strtab. */	2299	/* Compute total space required for the core symbols' strtab. */
2297	for (ndst = i = strtab_size = 1; i < nsrc; ++i, ++src)	2300	for (ndst = i = 0; i < nsrc; i++) {
2298	if (is_core_symbol(src, info->sechdrs, info->hdr->e_shnum)) {	2301	if (i == 0 \|\|
2299	strtab_size += strlen(&info->strtab[src->st_name]) + 1;	2302	is_core_symbol(src+i, info->sechdrs, info->hdr->e_shnum)) {
		2303	strtab_size += strlen(&info->strtab[src[i].st_name])+1;
2300	ndst++;	2304	ndst++;
2301	}	2305	}
		2306	}
2302		2307
2303	/* Append room for core symbols at end of core part. */	2308	/* Append room for core symbols at end of core part. */
2304	info->symoffs = ALIGN(mod->core_size, symsect->sh_addralign ?: 1);	2309	info->symoffs = ALIGN(mod->core_size, symsect->sh_addralign ?: 1);
@@ -2332,15 +2337,15 @@ static void add_kallsyms(struct module mod, const struct load_info info) · 27 unmodified lines
2332	mod->core_symtab = dst = mod->module_core + info->symoffs;	2337	mod->core_symtab = dst = mod->module_core + info->symoffs;
2333	mod->core_strtab = s = mod->module_core + info->stroffs;	2338	mod->core_strtab = s = mod->module_core + info->stroffs;
2334	src = mod->symtab;	2339	src = mod->symtab;
2335	dst = src;
2336	*s++ = 0;	2340	*s++ = 0;
2337	for (ndst = i = 1; i < mod->num_symtab; ++i, ++src) {	2341	for (ndst = i = 0; i < mod->num_symtab; i++) {
2338	if (!is_core_symbol(src, info->sechdrs, info->hdr->e_shnum))	2342	if (i == 0 \|\|
2339	continue;	2343	is_core_symbol(src+i, info->sechdrs, info->hdr->e_shnum)) {
2340		2344	dst[ndst] = src[i];
2341	dst[ndst] = *src;	2345	dst[ndst++].st_name = s - mod->core_strtab;
2342	dst[ndst++].st_name = s - mod->core_strtab;	2346	s += strlcpy(s, &mod->strtab[src[i].st_name],
2343	s += strlcpy(s, &mod->strtab[src->st_name], KSYM_NAME_LEN) + 1;	2347	KSYM_NAME_LEN) + 1;
		2348	}
2344	}	2349	}
2345	mod->core_num_syms = ndst;	2350	mod->core_num_syms = ndst;
2346	}	2351	}

mm/bootmem.c+1−9

 			int order = ilog2(BITS_PER_LONG);
 			__free_pages_bootmem(pfn_to_page(start), order);
-			fixup_zone_present_pages(page_to_nid(pfn_to_page(start)),
-					start, start + BITS_PER_LONG);
 			count += BITS_PER_LONG;
 			start += BITS_PER_LONG;
 		} else {
 				if (vec & 1) {
 					page = pfn_to_page(start + off);
 					__free_pages_bootmem(page, 0);
-					fixup_zone_present_pages(
-						page_to_nid(page),
-						start + off, start + off + 1);
 					count++;
 				}
 				vec >>= 1;
 	pages = bdata->node_low_pfn - bdata->node_min_pfn;
 	pages = bootmem_bootmap_pages(pages);
 	count += pages;
-	while (pages--) {
+	while (pages--)
-		fixup_zone_present_pages(page_to_nid(page),
-				page_to_pfn(page), page_to_pfn(page) + 1);
 		__free_pages_bootmem(page++, 0);
-	}
 	bdebug("nid=%td released=%lx\n", bdata - bootmem_node_data, count);

mm/highmem.c+1−1

@@ -98,7 +98,7 @@ struct page kmap_to_page(void vaddr) · 97 unmodified lines
98	{	98	{
99	unsigned long addr = (unsigned long)vaddr;	99	unsigned long addr = (unsigned long)vaddr;
100		100
101	if (addr >= PKMAP_ADDR(0) && addr <= PKMAP_ADDR(LAST_PKMAP)) {	101	if (addr >= PKMAP_ADDR(0) && addr < PKMAP_ADDR(LAST_PKMAP)) {
102	int i = (addr - PKMAP_ADDR(0)) >> PAGE_SHIFT;	102	int i = (addr - PKMAP_ADDR(0)) >> PAGE_SHIFT;
103	return pte_page(pkmap_page_table[i]);	103	return pte_page(pkmap_page_table[i]);
104	}	104	}

mm/memcontrol.c+50−17

 				      struct mem_cgroup *memcg)
 {
 	struct mem_cgroup_per_zone *mz;
+	struct lruvec *lruvec;
-	if (mem_cgroup_disabled())
+	if (mem_cgroup_disabled()) {
-		return &zone->lruvec;
+		lruvec = &zone->lruvec;
+		goto out;
+	}
 	mz = mem_cgroup_zoneinfo(memcg, zone_to_nid(zone), zone_idx(zone));
-	return &mz->lruvec;
+	lruvec = &mz->lruvec;
+out:
+	/*
+	 * Since a node can be onlined after the mem_cgroup was created,
+	 * we have to be prepared to initialize lruvec->zone here;
+	 * and if offlined then reonlined, we need to reinitialize it.
+	 */
+	if (unlikely(lruvec->zone != zone))
+		lruvec->zone = zone;
+	return lruvec;
 }
 /*
 	struct mem_cgroup_per_zone *mz;
 	struct mem_cgroup *memcg;
 	struct page_cgroup *pc;
+	struct lruvec *lruvec;
-	if (mem_cgroup_disabled())
+	if (mem_cgroup_disabled()) {
-		return &zone->lruvec;
+		lruvec = &zone->lruvec;
+		goto out;
+	}
 	pc = lookup_page_cgroup(page);
 	memcg = pc->mem_cgroup;
 		pc->mem_cgroup = memcg = root_mem_cgroup;
 	mz = page_cgroup_zoneinfo(memcg, page);
-	return &mz->lruvec;
+	lruvec = &mz->lruvec;
+out:
+	/*
+	 * Since a node can be onlined after the mem_cgroup was created,
+	 * we have to be prepared to initialize lruvec->zone here;
+	 * and if offlined then reonlined, we need to reinitialize it.
+	 */
+	if (unlikely(lruvec->zone != zone))
+		lruvec->zone = zone;
+	return lruvec;
 }
 /**
 static u64 mem_cgroup_get_limit(struct mem_cgroup *memcg)
 {
 	u64 limit;
-	u64 memsw;
 	limit = res_counter_read_u64(&memcg->res, RES_LIMIT);
-	limit += total_swap_pages << PAGE_SHIFT;
-	memsw = res_counter_read_u64(&memcg->memsw, RES_LIMIT);
 	/*
-	 * If memsw is finite and limits the amount of swap space available
+	 * Do not consider swap space if we cannot swap due to swappiness
-	 * to this memcg, return that limit.
 	 */
-	return min(limit, memsw);
+	if (mem_cgroup_swappiness(memcg)) {
+		u64 memsw;
+		limit += total_swap_pages << PAGE_SHIFT;
+		memsw = res_counter_read_u64(&memcg->memsw, RES_LIMIT);
+		/*
+		 * If memsw is finite and limits the amount of swap space
+		 * available to this memcg, return that limit.
+		 */
+		limit = min(limit, memsw);
+	}
+	return limit;
 }
 void mem_cgroup_out_of_memory(struct mem_cgroup *memcg, gfp_t gfp_mask,
 static bool mem_cgroup_force_empty_list(struct mem_cgroup *memcg,
 				int node, int zid, enum lru_list lru)
 {
-	struct mem_cgroup_per_zone *mz;
+	struct lruvec *lruvec;
 	unsigned long flags, loop;
 	struct list_head *list;
 	struct page *busy;
 	struct zone *zone;
 	zone = &NODE_DATA(node)->node_zones[zid];
-	mz = mem_cgroup_zoneinfo(memcg, node, zid);
+	lruvec = mem_cgroup_zone_lruvec(zone, memcg);
-	list = &mz->lruvec.lists[lru];
+	list = &lruvec->lists[lru];
-	loop = mz->lru_size[lru];
+	loop = mem_cgroup_get_lru_size(lruvec, lru);
 	/* give some margin against EBUSY etc...*/
 	loop += 256;
 	busy = NULL;
 	for (zone = 0; zone < MAX_NR_ZONES; zone++) {
 		mz = &pn->zoneinfo[zone];
-		lruvec_init(&mz->lruvec, &NODE_DATA(node)->node_zones[zone]);
+		lruvec_init(&mz->lruvec);
 		mz->usage_in_excess = 0;
 		mz->on_tree = false;
 		mz->memcg = memcg;

mm/memory.c+4−6

 	int ret = 0;
 	int page_mkwrite = 0;
 	struct page *dirty_page = NULL;
-	unsigned long mmun_start;	/* For mmu_notifiers */
+	unsigned long mmun_start = 0;	/* For mmu_notifiers */
-	unsigned long mmun_end;		/* For mmu_notifiers */
+	unsigned long mmun_end = 0;	/* For mmu_notifiers */
-	bool mmun_called = false;	/* For mmu_notifiers */
 	old_page = vm_normal_page(vma, address, orig_pte);
 	if (!old_page) {
 		goto oom_free_new;
 	mmun_start  = address & PAGE_MASK;
-	mmun_end    = (address & PAGE_MASK) + PAGE_SIZE;
+	mmun_end    = mmun_start + PAGE_SIZE;
-	mmun_called = true;
 	mmu_notifier_invalidate_range_start(mm, mmun_start, mmun_end);
 	/*
 		page_cache_release(new_page);
 unlock:
 	pte_unmap_unlock(page_table, ptl);
-	if (mmun_called)
+	if (mmun_end > mmun_start)
 		mmu_notifier_invalidate_range_end(mm, mmun_start, mmun_end);
 	if (old_page) {
 		/*

mm/memory_hotplug.c+0−7

 void __ref put_page_bootmem(struct page *page)
 {
 	unsigned long type;
-	struct zone *zone;
 	type = (unsigned long) page->lru.next;
 	BUG_ON(type < MEMORY_HOTPLUG_MIN_BOOTMEM_TYPE ||
 		set_page_private(page, 0);
 		INIT_LIST_HEAD(&page->lru);
 		__free_pages_bootmem(page, 0);
-		zone = page_zone(page);
-		zone_span_writelock(zone);
-		zone->present_pages++;
-		zone_span_writeunlock(zone);
-		totalram_pages++;
 	}
 }

mm/mmap.c+2−0

 	struct vm_area_struct *vma = mm->mmap;
 	while (vma) {
 		struct anon_vma_chain *avc;
+		vma_lock_anon_vma(vma);
 		list_for_each_entry(avc, &vma->anon_vma_chain, same_vma)
 			anon_vma_interval_tree_verify(avc);
+		vma_unlock_anon_vma(vma);
 		vma = vma->vm_next;
 		i++;
 	}

mm/mmzone.c+1−5

 }
 #endif /* CONFIG_ARCH_HAS_HOLES_MEMORYMODEL */
-void lruvec_init(struct lruvec *lruvec, struct zone *zone)
+void lruvec_init(struct lruvec *lruvec)
 {
 	enum lru_list lru;
 	for_each_lru(lru)
 		INIT_LIST_HEAD(&lruvec->lists[lru]);
-#ifdef CONFIG_MEMCG
-	lruvec->zone = zone;
-#endif
 }

mm/nobootmem.c+0−3

 		return 0;
 	__free_pages_memory(start_pfn, end_pfn);
-	fixup_zone_present_pages(pfn_to_nid(start >> PAGE_SHIFT),
-			start_pfn, end_pfn);
 	return end_pfn - start_pfn;
 }
 	phys_addr_t start, end, size;
 	u64 i;
-	reset_zone_present_pages();
 	for_each_free_mem_range(i, MAX_NUMNODES, &start, &end, NULL)
 		count += __free_memory_core(start, end);

mm/page_alloc.c+1−35

@@ -4505,7 +4505,7 @@ static void __paginginit free_area_init_core(struct pglist_data *pgdat, · 4504 unmodified lines
4505	zone->zone_pgdat = pgdat;	4505	zone->zone_pgdat = pgdat;
4506		4506
4507	zone_pcp_init(zone);	4507	zone_pcp_init(zone);
4508	lruvec_init(&zone->lruvec, zone);	4508	lruvec_init(&zone->lruvec);
4509	if (!size)	4509	if (!size)
4510	continue;	4510	continue;
4511		4511
@@ -6098,37 +6098,3 @@ void dump_page(struct page *page) · 1586 unmodified lines
6098	dump_page_flags(page->flags);	6098	dump_page_flags(page->flags);
6099	mem_cgroup_print_bad_page(page);	6099	mem_cgroup_print_bad_page(page);
6100	}	6100	}
6101
6102	/* reset zone->present_pages */
6103	void reset_zone_present_pages(void)
6104	{
6105	struct zone *z;
6106	int i, nid;
6107
6108	for_each_node_state(nid, N_HIGH_MEMORY) {
6109	for (i = 0; i < MAX_NR_ZONES; i++) {
6110	z = NODE_DATA(nid)->node_zones + i;
6111	z->present_pages = 0;
6112	}
6113	}
6114	}
6115
6116	/* calculate zone's present pages in buddy system */
6117	void fixup_zone_present_pages(int nid, unsigned long start_pfn,
6118	unsigned long end_pfn)
6119	{
6120	struct zone *z;
6121	unsigned long zone_start_pfn, zone_end_pfn;
6122	int i;
6123
6124	for (i = 0; i < MAX_NR_ZONES; i++) {
6125	z = NODE_DATA(nid)->node_zones + i;
6126	zone_start_pfn = z->zone_start_pfn;
6127	zone_end_pfn = zone_start_pfn + z->spanned_pages;
6128
6129	/* if the two regions intersect */
6130	if (!(zone_start_pfn >= end_pfn \|\| zone_end_pfn <= start_pfn))
6131	z->present_pages += min(end_pfn, zone_end_pfn) -
6132	max(start_pfn, zone_start_pfn);
6133	}
6134	}

mm/shmem.c+15−3

 		kfree(info->symlink);
 	simple_xattrs_free(&info->xattrs);
-	BUG_ON(inode->i_blocks);
+	WARN_ON(inode->i_blocks);
 	shmem_free_inode(inode->i_sb);
 	clear_inode(inode);
 }
 		if (!error) {
 			error = shmem_add_to_page_cache(page, mapping, index,
 						gfp, swp_to_radix_entry(swap));
-			/* We already confirmed swap, and make no allocation */
+			/*
-			VM_BUG_ON(error);
+			 * We already confirmed swap under page lock, and make
+			 * no memory allocation here, so usually no possibility
+			 * of error; but free_swap_and_cache() only trylocks a
+			 * page, so it is just possible that the entry has been
+			 * truncated or holepunched since swap was confirmed.
+			 * shmem_undo_range() will have done some of the
+			 * unaccounting, now delete_from_swap_cache() will do
+			 * the rest (including mem_cgroup_uncharge_swapcache).
+			 * Reset swap.val? No, leave it so "failed" goes back to
+			 * "repeat": reading a hole and writing should succeed.
+			 */
+			if (error)
+				delete_from_swap_cache(page);
 		}
 		if (error)
 			goto failed;

mm/swapfile.c+2−2

 	BUG_ON(!current->mm);
 	pathname = getname(specialfile);
-	err = PTR_ERR(pathname);
 	if (IS_ERR(pathname))
-		goto out;
+		return PTR_ERR(pathname);
 	victim = file_open_name(pathname, O_RDWR|O_LARGEFILE, 0);
 	err = PTR_ERR(victim);
 out_dput:
 	filp_close(victim, NULL);
 out:
+	putname(pathname);
 	return err;
 }

mm/vmscan.c+2−25

@@ -1760,28 +1760,6 @@ static bool in_reclaim_compaction(struct scan_control *sc) · 1759 unmodified lines
1760	return false;	1760	return false;
1761	}	1761	}
1762		1762
1763	#ifdef CONFIG_COMPACTION
1764	/*
1765	* If compaction is deferred for sc->order then scale the number of pages
1766	* reclaimed based on the number of consecutive allocation failures
1767	*/
1768	static unsigned long scale_for_compaction(unsigned long pages_for_compaction,
1769	struct lruvec lruvec, struct scan_control sc)
1770	{
1771	struct zone *zone = lruvec_zone(lruvec);
1772
1773	if (zone->compact_order_failed <= sc->order)
1774	pages_for_compaction <<= zone->compact_defer_shift;
1775	return pages_for_compaction;
1776	}
1777	#else
1778	static unsigned long scale_for_compaction(unsigned long pages_for_compaction,
1779	struct lruvec lruvec, struct scan_control sc)
1780	{
1781	return pages_for_compaction;
1782	}
1783	#endif
1784
1785	/*	1763	/*
1786	* Reclaim/compaction is used for high-order allocation requests. It reclaims	1764	* Reclaim/compaction is used for high-order allocation requests. It reclaims
1787	* order-0 pages before compacting the zone. should_continue_reclaim() returns	1765	* order-0 pages before compacting the zone. should_continue_reclaim() returns
@@ -1829,9 +1807,6 @@ static inline bool should_continue_reclaim(struct lruvec *lruvec, · 41 unmodified lines
1829	* inactive lists are large enough, continue reclaiming	1807	* inactive lists are large enough, continue reclaiming
1830	*/	1808	*/
1831	pages_for_compaction = (2UL << sc->order);	1809	pages_for_compaction = (2UL << sc->order);
1832
1833	pages_for_compaction = scale_for_compaction(pages_for_compaction,
1834	lruvec, sc);
1835	inactive_lru_pages = get_lru_size(lruvec, LRU_INACTIVE_FILE);	1810	inactive_lru_pages = get_lru_size(lruvec, LRU_INACTIVE_FILE);
1836	if (nr_swap_pages > 0)	1811	if (nr_swap_pages > 0)
1837	inactive_lru_pages += get_lru_size(lruvec, LRU_INACTIVE_ANON);	1812	inactive_lru_pages += get_lru_size(lruvec, LRU_INACTIVE_ANON);
@@ -3017,6 +2992,8 @@ static int kswapd(void *p) · 1179 unmodified lines
3017	&balanced_classzone_idx);	2992	&balanced_classzone_idx);
3018	}	2993	}
3019	}	2994	}
		2995
		2996	current->reclaim_state = NULL;
3020	return 0;	2997	return 0;
3021	}	2998	}
3022		2999

net/batman-adv/soft-interface.c+6−6

 	soft_iface->last_rx = jiffies;
+	/* Let the bridge loop avoidance check the packet. If will
+	 * not handle it, we can safely push it up.
+	 */
+	if (batadv_bla_rx(bat_priv, skb, vid, is_bcast))
+		goto out;
 	if (orig_node)
 		batadv_tt_add_temporary_global_entry(bat_priv, orig_node,
 						     ethhdr->h_source);
 	if (batadv_is_ap_isolated(bat_priv, ethhdr->h_source, ethhdr->h_dest))
 		goto dropped;
-	/* Let the bridge loop avoidance check the packet. If will
-	 * not handle it, we can safely push it up.
-	 */
-	if (batadv_bla_rx(bat_priv, skb, vid, is_bcast))
-		goto out;
 	netif_rx(skb);
 	goto out;

net/batman-adv/translation-table.c+14−1

 		 */
 		common->flags &= ~BATADV_TT_CLIENT_TEMP;
+		/* the change can carry possible "attribute" flags like the
+		 * TT_CLIENT_WIFI, therefore they have to be copied in the
+		 * client entry
+		 */
+		tt_global_entry->common.flags |= flags;
 		/* If there is the BATADV_TT_CLIENT_ROAM flag set, there is only
 		 * one originator left in the list and we previously received a
 		 * delete + roaming change for this originator.
 			memcpy(tt_change->addr, tt_common_entry->addr,
 			       ETH_ALEN);
-			tt_change->flags = BATADV_NO_FLAGS;
+			tt_change->flags = tt_common_entry->flags;
 			tt_count++;
 			tt_change++;
 {
 	bool ret = false;
+	/* if the originator is a backbone node (meaning it belongs to the same
+	 * LAN of this node) the temporary client must not be added because to
+	 * reach such destination the node must use the LAN instead of the mesh
+	 */
+	if (batadv_bla_is_backbone_gw_orig(bat_priv, orig_node->orig))
+		goto out;
 	if (!batadv_tt_global_add(bat_priv, orig_node, addr,
 				  BATADV_TT_CLIENT_TEMP,
 				  atomic_read(&orig_node->last_ttvn)))

net/bluetooth/hci_core.c+2−2

 	if (hdev->dev_type != HCI_AMP)
 		set_bit(HCI_AUTO_OFF, &hdev->dev_flags);
-	schedule_work(&hdev->power_on);
 	hci_notify(hdev, HCI_DEV_REG);
 	hci_dev_hold(hdev);
+	schedule_work(&hdev->power_on);
 	return id;
 err_wqueue:

net/bluetooth/mgmt.c+7−5

 	struct hci_dev *d;
 	size_t rp_len;
 	u16 count;
-	int i, err;
+	int err;
 	BT_DBG("sock %p", sk);
 		return -ENOMEM;
 	}
-	rp->num_controllers = cpu_to_le16(count);
+	count = 0;
-	i = 0;
 	list_for_each_entry(d, &hci_dev_list, list) {
 		if (test_bit(HCI_SETUP, &d->dev_flags))
 			continue;
 		if (!mgmt_valid_hdev(d))
 			continue;
-		rp->index[i++] = cpu_to_le16(d->id);
+		rp->index[count++] = cpu_to_le16(d->id);
 		BT_DBG("Added hci%u", d->id);
 	}
+	rp->num_controllers = cpu_to_le16(count);
+	rp_len = sizeof(*rp) + (2 * count);
 	read_unlock(&hci_dev_list_lock);
 	err = cmd_complete(sk, MGMT_INDEX_NONE, MGMT_OP_READ_INDEX_LIST, 0, rp,
 			continue;
 		list_del(&match->list);
+		kfree(match);
 		found++;
 	}

net/bluetooth/smp.c+1−1

@@ -267,7 +267,7 @@ static void smp_failure(struct l2cap_conn *conn, u8 reason, u8 send) · 266 unmodified lines
267		267
268	clear_bit(HCI_CONN_ENCRYPT_PEND, &conn->hcon->flags);	268	clear_bit(HCI_CONN_ENCRYPT_PEND, &conn->hcon->flags);
269	mgmt_auth_failed(conn->hcon->hdev, conn->dst, hcon->type,	269	mgmt_auth_failed(conn->hcon->hdev, conn->dst, hcon->type,
270	hcon->dst_type, reason);	270	hcon->dst_type, HCI_ERROR_AUTH_FAILURE);
271		271
272	cancel_delayed_work_sync(&conn->security_timer);	272	cancel_delayed_work_sync(&conn->security_timer);
273		273

net/core/dev.c+3−1

 		if (unlikely(tcpu != next_cpu) &&
 		    (tcpu == RPS_NO_CPU || !cpu_online(tcpu) ||
 		     ((int)(per_cpu(softnet_data, tcpu).input_queue_head -
-		      rflow->last_qtail)) >= 0))
+		      rflow->last_qtail)) >= 0)) {
+			tcpu = next_cpu;
 			rflow = set_rps_cpu(dev, skb, rflow, next_cpu);
+		}
 		if (tcpu != RPS_NO_CPU && cpu_online(tcpu)) {
 			*rflowp = rflow;

net/core/dev_addr_lists.c+2−1

@@ -319,7 +319,8 @@ int dev_addr_del(struct net_device dev, const unsigned char addr, · 318 unmodified lines
319	*/	319	*/
320	ha = list_first_entry(&dev->dev_addrs.list,	320	ha = list_first_entry(&dev->dev_addrs.list,
321	struct netdev_hw_addr, list);	321	struct netdev_hw_addr, list);
322	if (ha->addr == dev->dev_addr && ha->refcount == 1)	322	if (!memcmp(ha->addr, addr, dev->addr_len) &&
		323	ha->type == addr_type && ha->refcount == 1)
323	return -ENOENT;	324	return -ENOENT;
324		325
325	err = __hw_addr_del(&dev->dev_addrs, addr, dev->addr_len,	326	err = __hw_addr_del(&dev->dev_addrs, addr, dev->addr_len,

net/ipv4/ip_sockglue.c+22−13

@@ -457,19 +457,28 @@ static int do_ip_setsockopt(struct sock *sk, int level, · 456 unmodified lines
457	struct inet_sock *inet = inet_sk(sk);	457	struct inet_sock *inet = inet_sk(sk);
458	int val = 0, err;	458	int val = 0, err;
459		459
460	if (((1<<optname) & ((1<<IP_PKTINFO) \| (1<<IP_RECVTTL) \|	460	switch (optname) {
461	(1<<IP_RECVOPTS) \| (1<<IP_RECVTOS) \|	461	case IP_PKTINFO:
462	(1<<IP_RETOPTS) \| (1<<IP_TOS) \|	462	case IP_RECVTTL:
463	(1<<IP_TTL) \| (1<<IP_HDRINCL) \|	463	case IP_RECVOPTS:
464	(1<<IP_MTU_DISCOVER) \| (1<<IP_RECVERR) \|	464	case IP_RECVTOS:
465	(1<<IP_ROUTER_ALERT) \| (1<<IP_FREEBIND) \|	465	case IP_RETOPTS:
466	(1<<IP_PASSSEC) \| (1<<IP_TRANSPARENT) \|	466	case IP_TOS:
467	(1<<IP_MINTTL) \| (1<<IP_NODEFRAG))) \|\|	467	case IP_TTL:
468	optname == IP_UNICAST_IF \|\|	468	case IP_HDRINCL:
469	optname == IP_MULTICAST_TTL \|\|	469	case IP_MTU_DISCOVER:
470	optname == IP_MULTICAST_ALL \|\|	470	case IP_RECVERR:
471	optname == IP_MULTICAST_LOOP \|\|	471	case IP_ROUTER_ALERT:
472	optname == IP_RECVORIGDSTADDR) {	472	case IP_FREEBIND:
		473	case IP_PASSSEC:
		474	case IP_TRANSPARENT:
		475	case IP_MINTTL:
		476	case IP_NODEFRAG:
		477	case IP_UNICAST_IF:
		478	case IP_MULTICAST_TTL:
		479	case IP_MULTICAST_ALL:
		480	case IP_MULTICAST_LOOP:
		481	case IP_RECVORIGDSTADDR:
473	if (optlen >= sizeof(int)) {	482	if (optlen >= sizeof(int)) {
474	if (get_user(val, (int __user *) optval))	483	if (get_user(val, (int __user *) optval))
475	return -EFAULT;	484	return -EFAULT;

net/ipv4/ip_vti.c+5−0

 	if (tunnel != NULL) {
 		struct pcpu_tstats *tstats;
+		if (!xfrm4_policy_check(NULL, XFRM_POLICY_IN, skb))
+			return -1;
 		tstats = this_cpu_ptr(tunnel->dev->tstats);
 		u64_stats_update_begin(&tstats->syncp);
 		tstats->rx_packets++;
 		tstats->rx_bytes += skb->len;
 		u64_stats_update_end(&tstats->syncp);
+		skb->mark = 0;
+		secpath_reset(skb);
 		skb->dev = tunnel->dev;
 		return 1;
 	}

net/ipv4/tcp.c+2−2

@@ -1213,7 +1213,7 @@ new_segment: · 1212 unmodified lines
1213	wait_for_sndbuf:	1213	wait_for_sndbuf:
1214	set_bit(SOCK_NOSPACE, &sk->sk_socket->flags);	1214	set_bit(SOCK_NOSPACE, &sk->sk_socket->flags);
1215	wait_for_memory:	1215	wait_for_memory:
1216	if (copied && likely(!tp->repair))	1216	if (copied)
1217	tcp_push(sk, flags & ~MSG_MORE, mss_now, TCP_NAGLE_PUSH);	1217	tcp_push(sk, flags & ~MSG_MORE, mss_now, TCP_NAGLE_PUSH);
1218		1218
1219	if ((err = sk_stream_wait_memory(sk, &timeo)) != 0)	1219	if ((err = sk_stream_wait_memory(sk, &timeo)) != 0)
@@ -1224,7 +1224,7 @@ wait_for_memory: · 4 unmodified lines
1224	}	1224	}
1225		1225
1226	out:	1226	out:
1227	if (copied && likely(!tp->repair))	1227	if (copied)
1228	tcp_push(sk, flags, mss_now, tp->nonagle);	1228	tcp_push(sk, flags, mss_now, tp->nonagle);
1229	release_sock(sk);	1229	release_sock(sk);
1230	return copied + copied_syn;	1230	return copied + copied_syn;

net/ipv4/tcp_input.c+10−5

 		goto discard;
 	}
-	/* ts_recent update must be made after we are sure that the packet
-	 * is in window.
-	 */
-	tcp_replace_ts_recent(tp, TCP_SKB_CB(skb)->seq);
 	/* step 3: check security and precedence [ignored] */
 	/* step 4: Check for a SYN
 	if (th->ack && tcp_ack(sk, skb, FLAG_SLOWPATH) < 0)
 		goto discard;
+	/* ts_recent update must be made after we are sure that the packet
+	 * is in window.
+	 */
+	tcp_replace_ts_recent(tp, TCP_SKB_CB(skb)->seq);
 	tcp_rcv_rtt_measure_ts(sk, skb);
 	/* Process urgent data. */
 	} else
 		goto discard;
+	/* ts_recent update must be made after we are sure that the packet
+	 * is in window.
+	 */
+	tcp_replace_ts_recent(tp, TCP_SKB_CB(skb)->seq);
 	/* step 6: check the URG bit */
 	tcp_urg(sk, skb, th);

net/ipv4/tcp_metrics.c+9−3

 #include <linux/rcupdate.h>
 #include <linux/spinlock.h>
 #include <linux/jiffies.h>
-#include <linux/bootmem.h>
 #include <linux/module.h>
 #include <linux/cache.h>
 #include <linux/slab.h>
 #include <linux/tcp.h>
 #include <linux/hash.h>
 #include <linux/tcp_metrics.h>
+#include <linux/vmalloc.h>
 #include <net/inet_connection_sock.h>
 #include <net/net_namespace.h>
 	net->ipv4.tcp_metrics_hash_log = order_base_2(slots);
 	size = sizeof(struct tcpm_hash_bucket) << net->ipv4.tcp_metrics_hash_log;
-	net->ipv4.tcp_metrics_hash = kzalloc(size, GFP_KERNEL);
+	net->ipv4.tcp_metrics_hash = kzalloc(size, GFP_KERNEL | __GFP_NOWARN);
+	if (!net->ipv4.tcp_metrics_hash)
+		net->ipv4.tcp_metrics_hash = vzalloc(size);
 	if (!net->ipv4.tcp_metrics_hash)
 		return -ENOMEM;
 			tm = next;
 		}
 	}
-	kfree(net->ipv4.tcp_metrics_hash);
+	if (is_vmalloc_addr(net->ipv4.tcp_metrics_hash))
+		vfree(net->ipv4.tcp_metrics_hash);
+	else
+		kfree(net->ipv4.tcp_metrics_hash);
 }
 static __net_initdata struct pernet_operations tcp_net_metrics_ops = {

net/ipv4/tcp_output.c+4−0

 		tso_segs = tcp_init_tso_segs(sk, skb, mss_now);
 		BUG_ON(!tso_segs);
+		if (unlikely(tp->repair) && tp->repair_queue == TCP_SEND_QUEUE)
+			goto repair; /* Skip network transmission */
 		cwnd_quota = tcp_cwnd_test(tp, skb);
 		if (!cwnd_quota)
 			break;
 		if (unlikely(tcp_transmit_skb(sk, skb, 1, gfp)))
 			break;
+repair:
 		/* Advance the send_head.  This one is sent out.
 		 * This call will increment packets_out.
 		 */

net/ipv6/ipv6_sockglue.c+1−0

@@ -827,6 +827,7 @@ pref_skip_coa: · 826 unmodified lines
827	if (val < 0 \|\| val > 255)	827	if (val < 0 \|\| val > 255)
828	goto e_inval;	828	goto e_inval;
829	np->min_hopcount = val;	829	np->min_hopcount = val;
		830	retv = 0;
830	break;	831	break;
831	case IPV6_DONTFRAG:	832	case IPV6_DONTFRAG:
832	np->dontfrag = valbool;	833	np->dontfrag = valbool;

net/mac80211/cfg.c+3−0

@@ -2613,6 +2613,9 @@ static void ieee80211_mgmt_frame_register(struct wiphy *wiphy, · 2612 unmodified lines
2613	else	2613	else
2614	local->probe_req_reg--;	2614	local->probe_req_reg--;
2615		2615
		2616	if (!local->open_count)
		2617	break;
		2618
2616	ieee80211_queue_work(&local->hw, &local->reconfig_filter);	2619	ieee80211_queue_work(&local->hw, &local->reconfig_filter);
2617	break;	2620	break;
2618	default:	2621	default:

net/mac80211/ieee80211_i.h+2−0

@@ -1377,6 +1377,8 @@ netdev_tx_t ieee80211_monitor_start_xmit(struct sk_buff *skb, · 1376 unmodified lines
1377	struct net_device *dev);	1377	struct net_device *dev);
1378	netdev_tx_t ieee80211_subif_start_xmit(struct sk_buff *skb,	1378	netdev_tx_t ieee80211_subif_start_xmit(struct sk_buff *skb,
1379	struct net_device *dev);	1379	struct net_device *dev);
		1380	void ieee80211_purge_tx_queue(struct ieee80211_hw *hw,
		1381	struct sk_buff_head *skbs);
1380		1382
1381	/* HT */	1383	/* HT */
1382	void ieee80211_apply_htcap_overrides(struct ieee80211_sub_if_data *sdata,	1384	void ieee80211_apply_htcap_overrides(struct ieee80211_sub_if_data *sdata,

net/mac80211/main.c+4−2

 				local->hw.wiphy->cipher_suites,
 				sizeof(u32) * local->hw.wiphy->n_cipher_suites,
 				GFP_KERNEL);
-			if (!suites)
+			if (!suites) {
-				return -ENOMEM;
+				result = -ENOMEM;
+				goto fail_wiphy_register;
+			}
 			for (r = 0; r < local->hw.wiphy->n_cipher_suites; r++) {
 				u32 suite = local->hw.wiphy->cipher_suites[r];
 				if (suite == WLAN_CIPHER_SUITE_WEP40 ||

net/mac80211/scan.c+1−1

@@ -934,7 +934,7 @@ int ieee80211_request_sched_scan_start(struct ieee80211_sub_if_data *sdata, · 933 unmodified lines
934	struct cfg80211_sched_scan_request *req)	934	struct cfg80211_sched_scan_request *req)
935	{	935	{
936	struct ieee80211_local *local = sdata->local;	936	struct ieee80211_local *local = sdata->local;
937	struct ieee80211_sched_scan_ies sched_scan_ies;	937	struct ieee80211_sched_scan_ies sched_scan_ies = {};
938	int ret, i;	938	int ret, i;
939		939
940	mutex_lock(&local->mtx);	940	mutex_lock(&local->mtx);

net/mac80211/sta_info.c+8−3

 	for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) {
 		local->total_ps_buffered -= skb_queue_len(&sta->ps_tx_buf[ac]);
-		__skb_queue_purge(&sta->ps_tx_buf[ac]);
+		ieee80211_purge_tx_queue(&local->hw, &sta->ps_tx_buf[ac]);
-		__skb_queue_purge(&sta->tx_filtered[ac]);
+		ieee80211_purge_tx_queue(&local->hw, &sta->tx_filtered[ac]);
 	}
 #ifdef CONFIG_MAC80211_MESH
 		tid_tx = rcu_dereference_raw(sta->ampdu_mlme.tid_tx[i]);
 		if (!tid_tx)
 			continue;
-		__skb_queue_purge(&tid_tx->pending);
+		ieee80211_purge_tx_queue(&local->hw, &tid_tx->pending);
 		kfree(tid_tx);
 	}
 	struct ieee80211_local *local = sdata->local;
 	struct sk_buff_head pending;
 	int filtered = 0, buffered = 0, ac;
+	unsigned long flags;
 	clear_sta_flag(sta, WLAN_STA_SP);
 	for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) {
 		int count = skb_queue_len(&pending), tmp;
+		spin_lock_irqsave(&sta->tx_filtered[ac].lock, flags);
 		skb_queue_splice_tail_init(&sta->tx_filtered[ac], &pending);
+		spin_unlock_irqrestore(&sta->tx_filtered[ac].lock, flags);
 		tmp = skb_queue_len(&pending);
 		filtered += tmp - count;
 		count = tmp;
+		spin_lock_irqsave(&sta->ps_tx_buf[ac].lock, flags);
 		skb_queue_splice_tail_init(&sta->ps_tx_buf[ac], &pending);
+		spin_unlock_irqrestore(&sta->ps_tx_buf[ac].lock, flags);
 		tmp = skb_queue_len(&pending);
 		buffered += tmp - count;
 	}

net/mac80211/status.c+9−0

@@ -669,3 +669,12 @@ void ieee80211_free_txskb(struct ieee80211_hw hw, struct sk_buff skb) · 668 unmodified lines
669	dev_kfree_skb_any(skb);	669	dev_kfree_skb_any(skb);
670	}	670	}
671	EXPORT_SYMBOL(ieee80211_free_txskb);	671	EXPORT_SYMBOL(ieee80211_free_txskb);
		672
		673	void ieee80211_purge_tx_queue(struct ieee80211_hw *hw,
		674	struct sk_buff_head *skbs)
		675	{
		676	struct sk_buff *skb;
		677
		678	while ((skb = __skb_dequeue(skbs)))
		679	ieee80211_free_txskb(hw, skb);
		680	}

net/mac80211/tx.c+6−3

 		if (tx->skb)
 			ieee80211_free_txskb(&tx->local->hw, tx->skb);
 		else
-			__skb_queue_purge(&tx->skbs);
+			ieee80211_purge_tx_queue(&tx->local->hw, &tx->skbs);
 		return -1;
 	} else if (unlikely(res == TX_QUEUED)) {
 		I802_DEBUG_INC(tx->local->tx_handlers_queued);
  */
 void ieee80211_clear_tx_pending(struct ieee80211_local *local)
 {
+	struct sk_buff *skb;
 	int i;
-	for (i = 0; i < local->hw.queues; i++)
+	for (i = 0; i < local->hw.queues; i++) {
-		skb_queue_purge(&local->pending[i]);
+		while ((skb = skb_dequeue(&local->pending[i])) != NULL)
+			ieee80211_free_txskb(&local->hw, skb);
+	}
 }
 /*

net/mac80211/util.c+2−0

@@ -1534,6 +1534,8 @@ int ieee80211_reconfig(struct ieee80211_local *local) · 1533 unmodified lines
1534	list_for_each_entry(sdata, &local->interfaces, list) {	1534	list_for_each_entry(sdata, &local->interfaces, list) {
1535	if (sdata->vif.type != NL80211_IFTYPE_STATION)	1535	if (sdata->vif.type != NL80211_IFTYPE_STATION)
1536	continue;	1536	continue;
		1537	if (!sdata->u.mgd.associated)
		1538	continue;
1537		1539
1538	ieee80211_send_nullfunc(local, sdata, 0);	1540	ieee80211_send_nullfunc(local, sdata, 0);
1539	}	1541	}

net/sctp/proc.c+4−4

@@ -102,7 +102,7 @@ static const struct file_operations sctp_snmp_seq_fops = { · 101 unmodified lines
102	.open = sctp_snmp_seq_open,	102	.open = sctp_snmp_seq_open,
103	.read = seq_read,	103	.read = seq_read,
104	.llseek = seq_lseek,	104	.llseek = seq_lseek,
105	.release = single_release,	105	.release = single_release_net,
106	};	106	};
107		107
108	/* Set up the proc fs entry for 'snmp' object. */	108	/* Set up the proc fs entry for 'snmp' object. */
@@ -251,7 +251,7 @@ static const struct file_operations sctp_eps_seq_fops = { · 142 unmodified lines
251	.open = sctp_eps_seq_open,	251	.open = sctp_eps_seq_open,
252	.read = seq_read,	252	.read = seq_read,
253	.llseek = seq_lseek,	253	.llseek = seq_lseek,
254	.release = seq_release,	254	.release = seq_release_net,
255	};	255	};
256		256
257	/* Set up the proc fs entry for 'eps' object. */	257	/* Set up the proc fs entry for 'eps' object. */
@@ -372,7 +372,7 @@ static const struct file_operations sctp_assocs_seq_fops = { · 114 unmodified lines
372	.open = sctp_assocs_seq_open,	372	.open = sctp_assocs_seq_open,
373	.read = seq_read,	373	.read = seq_read,
374	.llseek = seq_lseek,	374	.llseek = seq_lseek,
375	.release = seq_release,	375	.release = seq_release_net,
376	};	376	};
377		377
378	/* Set up the proc fs entry for 'assocs' object. */	378	/* Set up the proc fs entry for 'assocs' object. */
@@ -517,7 +517,7 @@ static const struct file_operations sctp_remaddr_seq_fops = { · 138 unmodified lines
517	.open = sctp_remaddr_seq_open,	517	.open = sctp_remaddr_seq_open,
518	.read = seq_read,	518	.read = seq_read,
519	.llseek = seq_lseek,	519	.llseek = seq_lseek,
520	.release = seq_release,	520	.release = seq_release_net,
521	};	521	};
522		522
523	int __net_init sctp_remaddr_proc_init(struct net *net)	523	int __net_init sctp_remaddr_proc_init(struct net *net)

net/sunrpc/backchannel_rqst.c+1−1

@@ -172,7 +172,7 @@ out_free: · 171 unmodified lines
172	xprt_free_allocation(req);	172	xprt_free_allocation(req);
173		173
174	dprintk("RPC: setup backchannel transport failed\n");	174	dprintk("RPC: setup backchannel transport failed\n");
175	return -1;	175	return -ENOMEM;
176	}	176	}
177	EXPORT_SYMBOL_GPL(xprt_setup_backchannel);	177	EXPORT_SYMBOL_GPL(xprt_setup_backchannel);
178		178

net/wireless/reg.c+2−3

 	.reg_rules = {
 		/* IEEE 802.11b/g, channels 1..11 */
 		REG_RULE(2412-10, 2462+10, 40, 6, 20, 0),
-		/* IEEE 802.11b/g, channels 12..13. No HT40
+		/* IEEE 802.11b/g, channels 12..13. */
-		 * channel fits here. */
+		REG_RULE(2467-10, 2472+10, 40, 6, 20,
-		REG_RULE(2467-10, 2472+10, 20, 6, 20,
 			NL80211_RRF_PASSIVE_SCAN |
 			NL80211_RRF_NO_IBSS),
 		/* IEEE 802.11 channel 14 - Only JP enables

scripts/Makefile.modinst+2−1

@@ -16,8 +16,9 @@ PHONY += $(modules) · 15 unmodified lines
16	__modinst: $(modules)	16	__modinst: $(modules)
17	@:	17	@:
18		18
		19	# Don't stop modules_install if we can't sign external modules.
19	quiet_cmd_modules_install = INSTALL $@	20	quiet_cmd_modules_install = INSTALL $@
20	cmd_modules_install = mkdir -p $(2); cp $@ $(2) ; $(mod_strip_cmd) $(2)/$(notdir $@) ; $(mod_sign_cmd) $(2)/$(notdir $@)	21	cmd_modules_install = mkdir -p $(2); cp $@ $(2) ; $(mod_strip_cmd) $(2)/$(notdir $@) ; $(mod_sign_cmd) $(2)/$(notdir $@) $(patsubst %,\|\| true,$(KBUILD_EXTMOD))
21		22
22	# Modules built outside the kernel source tree go into extra by default	23	# Modules built outside the kernel source tree go into extra by default
23	INSTALL_MOD_DIR ?= extra	24	INSTALL_MOD_DIR ?= extra

scripts/checkpatch.pl+4−2

 		}
 		if ($realfile =~ m@^(drivers/net/|net/)@ &&
-		    $rawline !~ m@^\+[ \t]*(\/\*|\*\/)@ &&
+		    $rawline !~ m@^\+[ \t]*\*/[ \t]*$@ &&	#trailing */
-		    $rawline =~ m@^\+[ \t]*.+\*\/[ \t]*$@) {
+		    $rawline !~ m@^\+.*/\*.*\*/[ \t]*$@ &&	#inline /*...*/
+		    $rawline !~ m@^\+.*\*{2,}/[ \t]*$@ &&	#trailing **/
+		    $rawline =~ m@^\+[ \t]*.+\*\/[ \t]*$@) {	#non blank */
 			WARN("NETWORKING_BLOCK_COMMENT_STYLE",
 			     "networking block comments put the trailing */ on a separate line\n" . $herecurr);
 		}

scripts/kconfig/expr.h+2−3

 #include <assert.h>
 #include <stdio.h>
-#include <sys/queue.h>
+#include "list.h"
 #ifndef __cplusplus
 #include <stdbool.h>
 #endif
 #define MENU_ROOT		0x0002
 struct jump_key {
-	CIRCLEQ_ENTRY(jump_key) entries;
+	struct list_head entries;
 	size_t offset;
 	struct menu *target;
 	int index;
 };
-CIRCLEQ_HEAD(jk_head, jump_key);
 #define JUMP_NB			9

scripts/kconfig/list.h+91−0

@@ -0,0 +1,91 @@
	1	#ifndef LIST_H
	2	#define LIST_H
	3
	4	/*
	5	* Copied from include/linux/...
	6	*/
	7
	8	#undef offsetof
	9	#define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER)
	10
	11	/**
	12	* container_of - cast a member of a structure out to the containing structure
	13	* @ptr: the pointer to the member.
	14	* @type: the type of the container struct this is embedded in.
	15	* @member: the name of the member within the struct.
	16	*
	17	*/
	18	#define container_of(ptr, type, member) ({ \
	19	const typeof( ((type )0)->member ) __mptr = (ptr); \
	20	(type )( (char )__mptr - offsetof(type,member) );})
	21
	22
	23	struct list_head {
	24	struct list_head next, prev;
	25	};
	26
	27
	28	#define LIST_HEAD_INIT(name) { &(name), &(name) }
	29
	30	#define LIST_HEAD(name) \
	31	struct list_head name = LIST_HEAD_INIT(name)
	32
	33	/**
	34	* list_entry - get the struct for this entry
	35	* @ptr: the &struct list_head pointer.
	36	* @type: the type of the struct this is embedded in.
	37	* @member: the name of the list_struct within the struct.
	38	*/
	39	#define list_entry(ptr, type, member) \
	40	container_of(ptr, type, member)
	41
	42	/**
	43	* list_for_each_entry - iterate over list of given type
	44	* @pos: the type * to use as a loop cursor.
	45	* @head: the head for your list.
	46	* @member: the name of the list_struct within the struct.
	47	*/
	48	#define list_for_each_entry(pos, head, member) \
	49	for (pos = list_entry((head)->next, typeof(*pos), member); \
	50	&pos->member != (head); \
	51	pos = list_entry(pos->member.next, typeof(*pos), member))
	52
	53	/**
	54	* list_empty - tests whether a list is empty
	55	* @head: the list to test.
	56	*/
	57	static inline int list_empty(const struct list_head *head)
	58	{
	59	return head->next == head;
	60	}
	61
	62	/*
	63	* Insert a new entry between two known consecutive entries.
	64	*
	65	* This is only for internal list manipulation where we know
	66	* the prev/next entries already!
	67	*/
	68	static inline void __list_add(struct list_head *_new,
	69	struct list_head *prev,
	70	struct list_head *next)
	71	{
	72	next->prev = _new;
	73	_new->next = next;
	74	_new->prev = prev;
	75	prev->next = _new;
	76	}
	77
	78	/**
	79	* list_add_tail - add a new entry
	80	* @new: new entry to be added
	81	* @head: list head to add it before
	82	*
	83	* Insert a new entry before the specified head.
	84	* This is useful for implementing queues.
	85	*/
	86	static inline void list_add_tail(struct list_head _new, struct list_head head)
	87	{
	88	__list_add(_new, head->prev, head);
	89	}
	90
	91	#endif

scripts/kconfig/lkc_proto.h+2−2

@@ -21,9 +21,9 @@ P(menu_get_root_menu,struct menu ,(struct menu menu)); · 20 unmodified lines
21	P(menu_get_parent_menu,struct menu ,(struct menu menu));	21	P(menu_get_parent_menu,struct menu ,(struct menu menu));
22	P(menu_has_help,bool,(struct menu *menu));	22	P(menu_has_help,bool,(struct menu *menu));
23	P(menu_get_help,const char ,(struct menu menu));	23	P(menu_get_help,const char ,(struct menu menu));
24	P(get_symbol_str, void, (struct gstr r, struct symbol sym, struct jk_head	24	P(get_symbol_str, void, (struct gstr r, struct symbol sym, struct list_head
25	*head));	25	*head));
26	P(get_relations_str, struct gstr, (struct symbol **sym_arr, struct jk_head	26	P(get_relations_str, struct gstr, (struct symbol **sym_arr, struct list_head
27	*head));	27	*head));
28	P(menu_get_ext_help,void,(struct menu menu, struct gstr help));	28	P(menu_get_ext_help,void,(struct menu menu, struct gstr help));
29		29

scripts/kconfig/mconf.c+3−3

@@ -312,7 +312,7 @@ static void set_config_filename(const char *config_filename) · 311 unmodified lines
312		312
313		313
314	struct search_data {	314	struct search_data {
315	struct jk_head *head;	315	struct list_head *head;
316	struct menu **targets;	316	struct menu **targets;
317	int *keys;	317	int *keys;
318	};	318	};
@@ -323,7 +323,7 @@ static void update_text(char buf, size_t start, size_t end, void _data) · 4 unmodified lines
323	struct jump_key *pos;	323	struct jump_key *pos;
324	int k = 0;	324	int k = 0;
325		325
326	CIRCLEQ_FOREACH(pos, data->head, entries) {	326	list_for_each_entry(pos, data->head, entries) {
327	if (pos->offset >= start && pos->offset < end) {	327	if (pos->offset >= start && pos->offset < end) {
328	char header[4];	328	char header[4];
329		329
@@ -375,7 +375,7 @@ again: · 45 unmodified lines
375		375
376	sym_arr = sym_re_search(dialog_input);	376	sym_arr = sym_re_search(dialog_input);
377	do {	377	do {
378	struct jk_head head = CIRCLEQ_HEAD_INITIALIZER(head);	378	LIST_HEAD(head);
379	struct menu *targets[JUMP_NB];	379	struct menu *targets[JUMP_NB];
380	int keys[JUMP_NB + 1], i;	380	int keys[JUMP_NB + 1], i;
381	struct search_data data = {	381	struct search_data data = {

scripts/kconfig/menu.c+8−6

 }
 static void get_prompt_str(struct gstr *r, struct property *prop,
-			   struct jk_head *head)
+			   struct list_head *head)
 {
 	int i, j;
 	struct menu *submenu[8], *menu, *location = NULL;
 		} else
 			jump->target = location;
-		if (CIRCLEQ_EMPTY(head))
+		if (list_empty(head))
 			jump->index = 0;
 		else
-			jump->index = CIRCLEQ_LAST(head)->index + 1;
+			jump->index = list_entry(head->prev, struct jump_key,
+						 entries)->index + 1;
-		CIRCLEQ_INSERT_TAIL(head, jump, entries);
+		list_add_tail(&jump->entries, head);
 	}
 	if (i > 0) {
 /*
  * head is optional and may be NULL
  */
-void get_symbol_str(struct gstr *r, struct symbol *sym, struct jk_head *head)
+void get_symbol_str(struct gstr *r, struct symbol *sym,
+		    struct list_head *head)
 {
 	bool hit;
 	struct property *prop;
 	str_append(r, "\n\n");
 }
-struct gstr get_relations_str(struct symbol **sym_arr, struct jk_head *head)
+struct gstr get_relations_str(struct symbol **sym_arr, struct list_head *head)
 {
 	struct symbol *sym;
 	struct gstr res = str_new();

security/device_cgroup.c+13−5

 	struct dev_exception_item *ex, *tmp;
 	list_for_each_entry_safe(ex, tmp, &dev_cgroup->exceptions, list) {
-		list_del(&ex->list);
+		list_del_rcu(&ex->list);
-		kfree(ex);
+		kfree_rcu(ex, rcu);
 	}
 }
 	struct dev_exception_item *ex;
 	bool match = false;
-	list_for_each_entry(ex, &dev_cgroup->exceptions, list) {
+	list_for_each_entry_rcu(ex, &dev_cgroup->exceptions, list) {
 		if ((refex->type & DEV_BLOCK) && !(ex->type & DEV_BLOCK))
 			continue;
 		if ((refex->type & DEV_CHAR) && !(ex->type & DEV_CHAR))
  */
 static inline int may_allow_all(struct dev_cgroup *parent)
 {
+	if (!parent)
+		return 1;
 	return parent->behavior == DEVCG_DEFAULT_ALLOW;
 }
 	int count, rc;
 	struct dev_exception_item ex;
 	struct cgroup *p = devcgroup->css.cgroup;
-	struct dev_cgroup *parent = cgroup_to_devcgroup(p->parent);
+	struct dev_cgroup *parent = NULL;
 	if (!capable(CAP_SYS_ADMIN))
 		return -EPERM;
+	if (p->parent)
+		parent = cgroup_to_devcgroup(p->parent);
 	memset(&ex, 0, sizeof(ex));
 	b = buffer;
 			if (!may_allow_all(parent))
 				return -EPERM;
 			dev_exception_clean(devcgroup);
+			devcgroup->behavior = DEVCG_DEFAULT_ALLOW;
+			if (!parent)
+				break;
 			rc = dev_exceptions_copy(&devcgroup->exceptions,
 						 &parent->exceptions);
 			if (rc)
 				return rc;
-			devcgroup->behavior = DEVCG_DEFAULT_ALLOW;
 			break;
 		case DEVCG_DENY:
 			dev_exception_clean(devcgroup);

sound/core/oss/mixer_oss.c+1−0

@@ -76,6 +76,7 @@ static int snd_mixer_oss_open(struct inode inode, struct file file) · 75 unmodified lines
76	snd_card_unref(card);	76	snd_card_unref(card);
77	return -EFAULT;	77	return -EFAULT;
78	}	78	}
		79	snd_card_unref(card);
79	return 0;	80	return 0;
80	}	81	}
81		82

sound/core/oss/pcm_oss.c+1−0

@@ -2454,6 +2454,7 @@ static int snd_pcm_oss_open(struct inode inode, struct file file) · 2453 unmodified lines
2454	mutex_unlock(&pcm->open_mutex);	2454	mutex_unlock(&pcm->open_mutex);
2455	if (err < 0)	2455	if (err < 0)
2456	goto __error;	2456	goto __error;
		2457	snd_card_unref(pcm->card);
2457	return err;	2458	return err;
2458		2459
2459	__error:	2460	__error:

sound/core/pcm_native.c+4−2

 	pcm = snd_lookup_minor_data(iminor(inode),
 				    SNDRV_DEVICE_TYPE_PCM_PLAYBACK);
 	err = snd_pcm_open(file, pcm, SNDRV_PCM_STREAM_PLAYBACK);
-	snd_card_unref(pcm->card);
+	if (pcm)
+		snd_card_unref(pcm->card);
 	return err;
 }
 	pcm = snd_lookup_minor_data(iminor(inode),
 				    SNDRV_DEVICE_TYPE_PCM_CAPTURE);
 	err = snd_pcm_open(file, pcm, SNDRV_PCM_STREAM_CAPTURE);
-	snd_card_unref(pcm->card);
+	if (pcm)
+		snd_card_unref(pcm->card);
 	return err;
 }

sound/core/sound.c+1−1

@@ -114,7 +114,7 @@ void *snd_lookup_minor_data(unsigned int minor, int type) · 113 unmodified lines
114	mreg = snd_minors[minor];	114	mreg = snd_minors[minor];
115	if (mreg && mreg->type == type) {	115	if (mreg && mreg->type == type) {
116	private_data = mreg->private_data;	116	private_data = mreg->private_data;
117	if (mreg->card_ptr)	117	if (private_data && mreg->card_ptr)
118	atomic_inc(&mreg->card_ptr->refcount);	118	atomic_inc(&mreg->card_ptr->refcount);
119	} else	119	} else
120	private_data = NULL;	120	private_data = NULL;

sound/core/sound_oss.c+1−1

@@ -54,7 +54,7 @@ void *snd_lookup_oss_minor_data(unsigned int minor, int type) · 53 unmodified lines
54	mreg = snd_oss_minors[minor];	54	mreg = snd_oss_minors[minor];
55	if (mreg && mreg->type == type) {	55	if (mreg && mreg->type == type) {
56	private_data = mreg->private_data;	56	private_data = mreg->private_data;
57	if (mreg->card_ptr)	57	if (private_data && mreg->card_ptr)
58	atomic_inc(&mreg->card_ptr->refcount);	58	atomic_inc(&mreg->card_ptr->refcount);
59	} else	59	} else
60	private_data = NULL;	60	private_data = NULL;

sound/i2c/other/ak4113.c+1−1

@@ -426,7 +426,7 @@ static struct snd_kcontrol_new snd_ak4113_iec958_controls[] = { · 425 unmodified lines
426	},	426	},
427	{	427	{
428	.iface = SNDRV_CTL_ELEM_IFACE_PCM,	428	.iface = SNDRV_CTL_ELEM_IFACE_PCM,
429	.name = "IEC958 Preample Capture Default",	429	.name = "IEC958 Preamble Capture Default",
430	.access = SNDRV_CTL_ELEM_ACCESS_READ \|	430	.access = SNDRV_CTL_ELEM_ACCESS_READ \|
431	SNDRV_CTL_ELEM_ACCESS_VOLATILE,	431	SNDRV_CTL_ELEM_ACCESS_VOLATILE,
432	.info = snd_ak4113_spdif_pinfo,	432	.info = snd_ak4113_spdif_pinfo,

sound/i2c/other/ak4114.c+1−1

@@ -401,7 +401,7 @@ static struct snd_kcontrol_new snd_ak4114_iec958_controls[] = { · 400 unmodified lines
401	},	401	},
402	{	402	{
403	.iface = SNDRV_CTL_ELEM_IFACE_PCM,	403	.iface = SNDRV_CTL_ELEM_IFACE_PCM,
404	.name = "IEC958 Preample Capture Default",	404	.name = "IEC958 Preamble Capture Default",
405	.access = SNDRV_CTL_ELEM_ACCESS_READ \| SNDRV_CTL_ELEM_ACCESS_VOLATILE,	405	.access = SNDRV_CTL_ELEM_ACCESS_READ \| SNDRV_CTL_ELEM_ACCESS_VOLATILE,
406	.info = snd_ak4114_spdif_pinfo,	406	.info = snd_ak4114_spdif_pinfo,
407	.get = snd_ak4114_spdif_pget,	407	.get = snd_ak4114_spdif_pget,

sound/i2c/other/ak4117.c+1−1

@@ -380,7 +380,7 @@ static struct snd_kcontrol_new snd_ak4117_iec958_controls[] = { · 379 unmodified lines
380	},	380	},
381	{	381	{
382	.iface = SNDRV_CTL_ELEM_IFACE_PCM,	382	.iface = SNDRV_CTL_ELEM_IFACE_PCM,
383	.name = "IEC958 Preample Capture Default",	383	.name = "IEC958 Preamble Capture Default",
384	.access = SNDRV_CTL_ELEM_ACCESS_READ \| SNDRV_CTL_ELEM_ACCESS_VOLATILE,	384	.access = SNDRV_CTL_ELEM_ACCESS_READ \| SNDRV_CTL_ELEM_ACCESS_VOLATILE,
385	.info = snd_ak4117_spdif_pinfo,	385	.info = snd_ak4117_spdif_pinfo,
386	.get = snd_ak4117_spdif_pget,	386	.get = snd_ak4117_spdif_pget,

sound/pci/es1968.c+9−2

 	struct es1968 *chip = tea->private_data;
 	unsigned long io = chip->io_port + GPIO_DATA;
 	u16 val = inw(io);
+	u8 ret;
-	return  (val & STR_DATA) ? TEA575X_DATA : 0 |
+	ret = 0;
-		(val & STR_MOST) ? TEA575X_MOST : 0;
+	if (val & STR_DATA)
+		ret |= TEA575X_DATA;
+	if (val & STR_MOST)
+		ret |= TEA575X_MOST;
+	return ret;
 }
 static void snd_es1968_tea575x_set_direction(struct snd_tea575x *tea, bool output)
 	{ TYPE_MAESTRO2E, 0x1179 },
 	{ TYPE_MAESTRO2E, 0x14c0 },	/* HP omnibook 4150 */
 	{ TYPE_MAESTRO2E, 0x1558 },
+	{ TYPE_MAESTRO2E, 0x125d },	/* a PCI card, e.g. Terratec DMX */
+	{ TYPE_MAESTRO2, 0x125d },	/* a PCI card, e.g. SF64-PCE2 */
 };
 static struct ess_device_list mpu_blacklist[] __devinitdata = {

sound/pci/fm801.c+8−3

@@ -767,9 +767,14 @@ static u8 snd_fm801_tea575x_get_pins(struct snd_tea575x *tea) · 766 unmodified lines
767	struct fm801 *chip = tea->private_data;	767	struct fm801 *chip = tea->private_data;
768	unsigned short reg = inw(FM801_REG(chip, GPIO_CTRL));	768	unsigned short reg = inw(FM801_REG(chip, GPIO_CTRL));
769	struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);	769	struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);
770		770	u8 ret;
771	return (reg & FM801_GPIO_GP(gpio.data)) ? TEA575X_DATA : 0 \|	771
772	(reg & FM801_GPIO_GP(gpio.most)) ? TEA575X_MOST : 0;	772	ret = 0;
		773	if (reg & FM801_GPIO_GP(gpio.data))
		774	ret \|= TEA575X_DATA;
		775	if (reg & FM801_GPIO_GP(gpio.most))
		776	ret \|= TEA575X_MOST;
		777	return ret;
773	}	778	}
774		779
775	static void snd_fm801_tea575x_set_direction(struct snd_tea575x *tea, bool output)	780	static void snd_fm801_tea575x_set_direction(struct snd_tea575x *tea, bool output)

sound/pci/hda/hda_intel.c+2−0

 	/* Teradici */
 	{ PCI_DEVICE(0x6549, 0x1200),
 	  .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
+	{ PCI_DEVICE(0x6549, 0x2200),
+	  .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
 	/* Creative X-Fi (CA0110-IBG) */
 	/* CTHDA chips */
 	{ PCI_DEVICE(0x1102, 0x0010),

sound/pci/hda/patch_analog.c+1−0

@@ -545,6 +545,7 @@ static int ad198x_build_pcms(struct hda_codec *codec) · 544 unmodified lines
545	if (spec->multiout.dig_out_nid) {	545	if (spec->multiout.dig_out_nid) {
546	info++;	546	info++;
547	codec->num_pcms++;	547	codec->num_pcms++;
		548	codec->spdif_status_reset = 1;
548	info->name = "AD198x Digital";	549	info->name = "AD198x Digital";
549	info->pcm_type = HDA_PCM_TYPE_SPDIF;	550	info->pcm_type = HDA_PCM_TYPE_SPDIF;
550	info->stream[SNDRV_PCM_STREAM_PLAYBACK] = ad198x_pcm_digital_playback;	551	info->stream[SNDRV_PCM_STREAM_PLAYBACK] = ad198x_pcm_digital_playback;

sound/pci/hda/patch_cirrus.c+12−9

@@ -101,8 +101,8 @@ enum { · 100 unmodified lines
101	#define CS420X_VENDOR_NID 0x11	101	#define CS420X_VENDOR_NID 0x11
102	#define CS_DIG_OUT1_PIN_NID 0x10	102	#define CS_DIG_OUT1_PIN_NID 0x10
103	#define CS_DIG_OUT2_PIN_NID 0x15	103	#define CS_DIG_OUT2_PIN_NID 0x15
104	#define CS_DMIC1_PIN_NID 0x12	104	#define CS_DMIC1_PIN_NID 0x0e
105	#define CS_DMIC2_PIN_NID 0x0e	105	#define CS_DMIC2_PIN_NID 0x12
106		106
107	/* coef indices */	107	/* coef indices */
108	#define IDX_SPDIF_STAT 0x0000	108	#define IDX_SPDIF_STAT 0x0000
@@ -1079,14 +1079,18 @@ static void init_input(struct hda_codec *codec) · 970 unmodified lines
1079	cs_automic(codec, NULL);	1079	cs_automic(codec, NULL);
1080		1080
1081	coef = 0x000a; /* ADC1/2 - Digital and Analog Soft Ramp */	1081	coef = 0x000a; /* ADC1/2 - Digital and Analog Soft Ramp */
		1082	cs_vendor_coef_set(codec, IDX_ADC_CFG, coef);
		1083
		1084	coef = cs_vendor_coef_get(codec, IDX_BEEP_CFG);
1082	if (is_active_pin(codec, CS_DMIC2_PIN_NID))	1085	if (is_active_pin(codec, CS_DMIC2_PIN_NID))
1083	coef \|= 0x0500; /* DMIC2 2 chan on, GPIO1 off */	1086	coef \|= 1 << 4; /* DMIC2 2 chan on, GPIO1 off */
1084	if (is_active_pin(codec, CS_DMIC1_PIN_NID))	1087	if (is_active_pin(codec, CS_DMIC1_PIN_NID))
1085	coef \|= 0x1800; /* DMIC1 2 chan on, GPIO0 off	1088	coef \|= 1 << 3; /* DMIC1 2 chan on, GPIO0 off
1086	* No effect if SPDIF_OUT2 is	1089	* No effect if SPDIF_OUT2 is
1087	* selected in IDX_SPDIF_CTL.	1090	* selected in IDX_SPDIF_CTL.
1088	*/	1091	*/
1089	cs_vendor_coef_set(codec, IDX_ADC_CFG, coef);	1092
		1093	cs_vendor_coef_set(codec, IDX_BEEP_CFG, coef);
1090	} else {	1094	} else {
1091	if (spec->mic_detect)	1095	if (spec->mic_detect)
1092	cs_automic(codec, NULL);	1096	cs_automic(codec, NULL);
@@ -1107,7 +1111,7 @@ static const struct hda_verb cs_coef_init_verbs[] = { · 14 unmodified lines
1107	\| 0x0400 /* Disable Coefficient Auto increment */	1111	\| 0x0400 /* Disable Coefficient Auto increment */
1108	)},	1112	)},
1109	/* Beep */	1113	/* Beep */
1110	{0x11, AC_VERB_SET_COEF_INDEX, IDX_DAC_CFG},	1114	{0x11, AC_VERB_SET_COEF_INDEX, IDX_BEEP_CFG},
1111	{0x11, AC_VERB_SET_PROC_COEF, 0x0007}, /* Enable Beep thru DAC1/2/3 */	1115	{0x11, AC_VERB_SET_PROC_COEF, 0x0007}, /* Enable Beep thru DAC1/2/3 */
1112		1116
1113	{} /* terminator */	1117	{} /* terminator */
@@ -1728,8 +1732,7 @@ static int cs421x_mux_enum_put(struct snd_kcontrol *kcontrol, · 614 unmodified lines
1728		1732
1729	}	1733	}
1730		1734
1731	static struct snd_kcontrol_new cs421x_capture_source = {	1735	static const struct snd_kcontrol_new cs421x_capture_source = {
1732
1733	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,	1736	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1734	.name = "Capture Source",	1737	.name = "Capture Source",
1735	.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,	1738	.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
@@ -1946,7 +1949,7 @@ static int cs421x_suspend(struct hda_codec *codec) · 210 unmodified lines
1946	}	1949	}
1947	#endif	1950	#endif
1948		1951
1949	static struct hda_codec_ops cs421x_patch_ops = {	1952	static const struct hda_codec_ops cs421x_patch_ops = {
1950	.build_controls = cs421x_build_controls,	1953	.build_controls = cs421x_build_controls,
1951	.build_pcms = cs_build_pcms,	1954	.build_pcms = cs_build_pcms,
1952	.init = cs421x_init,	1955	.init = cs421x_init,

sound/pci/hda/patch_realtek.c+14−13

 	SND_PCI_QUIRK(0x106b, 0x4000, "MacbookPro 5,1", ALC889_FIXUP_IMAC91_VREF),
 	SND_PCI_QUIRK(0x106b, 0x4100, "Macmini 3,1", ALC889_FIXUP_IMAC91_VREF),
 	SND_PCI_QUIRK(0x106b, 0x4200, "Mac Pro 5,1", ALC885_FIXUP_MACPRO_GPIO),
+	SND_PCI_QUIRK(0x106b, 0x4300, "iMac 9,1", ALC889_FIXUP_IMAC91_VREF),
 	SND_PCI_QUIRK(0x106b, 0x4600, "MacbookPro 5,2", ALC889_FIXUP_IMAC91_VREF),
 	SND_PCI_QUIRK(0x106b, 0x4900, "iMac 9,1 Aluminum", ALC889_FIXUP_IMAC91_VREF),
 	SND_PCI_QUIRK(0x106b, 0x4a00, "Macbook 5,2", ALC889_FIXUP_IMAC91_VREF),
 	return alc_parse_auto_config(codec, alc269_ignore, ssids);
 }
-static void alc269_toggle_power_output(struct hda_codec *codec, int power_up)
+static void alc269vb_toggle_power_output(struct hda_codec *codec, int power_up)
 {
 	int val = alc_read_coef_idx(codec, 0x04);
 	if (power_up)
 	if (spec->codec_variant != ALC269_TYPE_ALC269VB)
 		return;
-	if ((alc_get_coef0(codec) & 0x00ff) == 0x017)
+	if (spec->codec_variant == ALC269_TYPE_ALC269VB)
-		alc269_toggle_power_output(codec, 0);
+		alc269vb_toggle_power_output(codec, 0);
-	if ((alc_get_coef0(codec) & 0x00ff) == 0x018) {
+	if (spec->codec_variant == ALC269_TYPE_ALC269VB &&
-		alc269_toggle_power_output(codec, 0);
+			(alc_get_coef0(codec) & 0x00ff) == 0x018) {
 		msleep(150);
 	}
 }
 {
 	struct alc_spec *spec = codec->spec;
-	if (spec->codec_variant == ALC269_TYPE_ALC269VB ||
+	if (spec->codec_variant == ALC269_TYPE_ALC269VB)
+		alc269vb_toggle_power_output(codec, 0);
+	if (spec->codec_variant == ALC269_TYPE_ALC269VB &&
 			(alc_get_coef0(codec) & 0x00ff) == 0x018) {
-		alc269_toggle_power_output(codec, 0);
 		msleep(150);
 	}
 	codec->patch_ops.init(codec);
-	if (spec->codec_variant == ALC269_TYPE_ALC269VB ||
+	if (spec->codec_variant == ALC269_TYPE_ALC269VB)
+		alc269vb_toggle_power_output(codec, 1);
+	if (spec->codec_variant == ALC269_TYPE_ALC269VB &&
 			(alc_get_coef0(codec) & 0x00ff) == 0x017) {
-		alc269_toggle_power_output(codec, 1);
 		msleep(200);
 	}
-	if (spec->codec_variant == ALC269_TYPE_ALC269VB ||
-			(alc_get_coef0(codec) & 0x00ff) == 0x018)
-		alc269_toggle_power_output(codec, 1);
 	snd_hda_codec_resume_amp(codec);
 	snd_hda_codec_resume_cache(codec);
 	hda_call_check_power_status(codec, 0x01);
 	  .patch = patch_alc662 },
 	{ .id = 0x10ec0663, .name = "ALC663", .patch = patch_alc662 },
 	{ .id = 0x10ec0665, .name = "ALC665", .patch = patch_alc662 },
+	{ .id = 0x10ec0668, .name = "ALC668", .patch = patch_alc662 },
 	{ .id = 0x10ec0670, .name = "ALC670", .patch = patch_alc662 },
 	{ .id = 0x10ec0680, .name = "ALC680", .patch = patch_alc680 },
 	{ .id = 0x10ec0880, .name = "ALC880", .patch = patch_alc880 },
 	{ .id = 0x10ec0889, .name = "ALC889", .patch = patch_alc882 },
 	{ .id = 0x10ec0892, .name = "ALC892", .patch = patch_alc662 },
 	{ .id = 0x10ec0899, .name = "ALC898", .patch = patch_alc882 },
+	{ .id = 0x10ec0900, .name = "ALC1150", .patch = patch_alc882 },
 	{} /* terminator */
 };

sound/pci/hda/patch_via.c+29−7

 {
 	struct via_spec *spec = codec->spec;
 	const struct auto_pin_cfg *cfg = &spec->autocfg;
-	int i, dac_num;
+	int i;
 	hda_nid_t nid;
+	spec->multiout.num_dacs = 0;
 	spec->multiout.dac_nids = spec->private_dac_nids;
-	dac_num = 0;
 	for (i = 0; i < cfg->line_outs; i++) {
 		hda_nid_t dac = 0;
 		nid = cfg->line_out_pins[i];
 		if (!i && parse_output_path(codec, nid, dac, 1,
 					    &spec->out_mix_path))
 			dac = spec->out_mix_path.path[0];
-		if (dac) {
+		if (dac)
-			spec->private_dac_nids[i] = dac;
+			spec->private_dac_nids[spec->multiout.num_dacs++] = dac;
-			dac_num++;
-		}
 	}
 	if (!spec->out_path[0].depth && spec->out_mix_path.depth) {
 		spec->out_path[0] = spec->out_mix_path;
 		spec->out_mix_path.depth = 0;
 	}
-	spec->multiout.num_dacs = dac_num;
 	return 0;
 }
  */
 enum {
 	VIA_FIXUP_INTMIC_BOOST,
+	VIA_FIXUP_ASUS_G75,
 };
 static void via_fixup_intmic_boost(struct hda_codec *codec,
 		.type = HDA_FIXUP_FUNC,
 		.v.func = via_fixup_intmic_boost,
 	},
+	[VIA_FIXUP_ASUS_G75] = {
+		.type = HDA_FIXUP_PINS,
+		.v.pins = (const struct hda_pintbl[]) {
+			/* set 0x24 and 0x33 as speakers */
+			{ 0x24, 0x991301f0 },
+			{ 0x33, 0x991301f1 }, /* subwoofer */
+			{ }
+		}
+	},
 };
 static const struct snd_pci_quirk vt2002p_fixups[] = {
+	SND_PCI_QUIRK(0x1043, 0x1487, "Asus G75", VIA_FIXUP_ASUS_G75),
 	SND_PCI_QUIRK(0x1043, 0x8532, "Asus X202E", VIA_FIXUP_INTMIC_BOOST),
 	{}
 };
+/* NIDs 0x24 and 0x33 on VT1802 have connections to non-existing NID 0x3e
+ * Replace this with mixer NID 0x1c
+ */
+static void fix_vt1802_connections(struct hda_codec *codec)
+{
+	static hda_nid_t conn_24[] = { 0x14, 0x1c };
+	static hda_nid_t conn_33[] = { 0x1c };
+	snd_hda_override_conn_list(codec, 0x24, ARRAY_SIZE(conn_24), conn_24);
+	snd_hda_override_conn_list(codec, 0x33, ARRAY_SIZE(conn_33), conn_33);
+}
 /* patch for vt2002P */
 static int patch_vt2002P(struct hda_codec *codec)
 {
 	spec->aa_mix_nid = 0x21;
 	override_mic_boost(codec, 0x2b, 0, 3, 40);
 	override_mic_boost(codec, 0x29, 0, 3, 40);
+	if (spec->codec_type == VT1802)
+		fix_vt1802_connections(codec);
 	add_secret_dac_path(codec);
 	snd_hda_pick_fixup(codec, NULL, vt2002p_fixups, via_fixups);

sound/pci/rme9652/hdspm.c+3−2

 		case 8: /* SYNC IN */
 			val = hdspm_sync_in_sync_check(hdspm); break;
 		default:
-			val = hdspm_s1_sync_check(hdspm, ucontrol->id.index-1);
+			val = hdspm_s1_sync_check(hdspm,
+					kcontrol->private_value-1);
 		}
 		break;
 		insel = "Coaxial";
 		break;
 	default:
-		insel = "Unkown";
+		insel = "Unknown";
 	}
 	snd_iprintf(buffer,

sound/soc/codecs/cs42l52.c+2−3

 	if ((freq >= CS42L52_MIN_CLK) && (freq <= CS42L52_MAX_CLK)) {
 		cs42l52->sysclk = freq;
 	} else {
-		dev_err(codec->dev, "Invalid freq paramter\n");
+		dev_err(codec->dev, "Invalid freq parameter\n");
 		return -EINVAL;
 	}
 	return 0;
 {
 	struct snd_soc_codec *codec = codec_dai->codec;
 	struct cs42l52_private *cs42l52 = snd_soc_codec_get_drvdata(codec);
-	int ret = 0;
 	u8 iface = 0;
 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 	case SND_SOC_DAIFMT_NB_IF:
 		break;
 	default:
-		ret = -EINVAL;
+		return -EINVAL;
 	}
 	cs42l52->config.format = iface;
 	snd_soc_write(codec, CS42L52_IFACE_CTL1, cs42l52->config.format);

sound/soc/codecs/wm5102.c+551−1

@@ -42,6 +42,556 @@ static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); · 41 unmodified lines
42	static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0);	42	static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0);
43	static DECLARE_TLV_DB_SCALE(noise_tlv, 0, 600, 0);	43	static DECLARE_TLV_DB_SCALE(noise_tlv, 0, 600, 0);
44		44
		45	static const struct reg_default wm5102_sysclk_reva_patch[] = {
		46	{ 0x3000, 0x2225 },
		47	{ 0x3001, 0x3a03 },
		48	{ 0x3002, 0x0225 },
		49	{ 0x3003, 0x0801 },
		50	{ 0x3004, 0x6249 },
		51	{ 0x3005, 0x0c04 },
		52	{ 0x3006, 0x0225 },
		53	{ 0x3007, 0x5901 },
		54	{ 0x3008, 0xe249 },
		55	{ 0x3009, 0x030d },
		56	{ 0x300a, 0x0249 },
		57	{ 0x300b, 0x2c01 },
		58	{ 0x300c, 0xe249 },
		59	{ 0x300d, 0x4342 },
		60	{ 0x300e, 0xe249 },
		61	{ 0x300f, 0x73c0 },
		62	{ 0x3010, 0x4249 },
		63	{ 0x3011, 0x0c00 },
		64	{ 0x3012, 0x0225 },
		65	{ 0x3013, 0x1f01 },
		66	{ 0x3014, 0x0225 },
		67	{ 0x3015, 0x1e01 },
		68	{ 0x3016, 0x0225 },
		69	{ 0x3017, 0xfa00 },
		70	{ 0x3018, 0x0000 },
		71	{ 0x3019, 0xf000 },
		72	{ 0x301a, 0x0000 },
		73	{ 0x301b, 0xf000 },
		74	{ 0x301c, 0x0000 },
		75	{ 0x301d, 0xf000 },
		76	{ 0x301e, 0x0000 },
		77	{ 0x301f, 0xf000 },
		78	{ 0x3020, 0x0000 },
		79	{ 0x3021, 0xf000 },
		80	{ 0x3022, 0x0000 },
		81	{ 0x3023, 0xf000 },
		82	{ 0x3024, 0x0000 },
		83	{ 0x3025, 0xf000 },
		84	{ 0x3026, 0x0000 },
		85	{ 0x3027, 0xf000 },
		86	{ 0x3028, 0x0000 },
		87	{ 0x3029, 0xf000 },
		88	{ 0x302a, 0x0000 },
		89	{ 0x302b, 0xf000 },
		90	{ 0x302c, 0x0000 },
		91	{ 0x302d, 0xf000 },
		92	{ 0x302e, 0x0000 },
		93	{ 0x302f, 0xf000 },
		94	{ 0x3030, 0x0225 },
		95	{ 0x3031, 0x1a01 },
		96	{ 0x3032, 0x0225 },
		97	{ 0x3033, 0x1e00 },
		98	{ 0x3034, 0x0225 },
		99	{ 0x3035, 0x1f00 },
		100	{ 0x3036, 0x6225 },
		101	{ 0x3037, 0xf800 },
		102	{ 0x3038, 0x0000 },
		103	{ 0x3039, 0xf000 },
		104	{ 0x303a, 0x0000 },
		105	{ 0x303b, 0xf000 },
		106	{ 0x303c, 0x0000 },
		107	{ 0x303d, 0xf000 },
		108	{ 0x303e, 0x0000 },
		109	{ 0x303f, 0xf000 },
		110	{ 0x3040, 0x2226 },
		111	{ 0x3041, 0x3a03 },
		112	{ 0x3042, 0x0226 },
		113	{ 0x3043, 0x0801 },
		114	{ 0x3044, 0x6249 },
		115	{ 0x3045, 0x0c06 },
		116	{ 0x3046, 0x0226 },
		117	{ 0x3047, 0x5901 },
		118	{ 0x3048, 0xe249 },
		119	{ 0x3049, 0x030d },
		120	{ 0x304a, 0x0249 },
		121	{ 0x304b, 0x2c01 },
		122	{ 0x304c, 0xe249 },
		123	{ 0x304d, 0x4342 },
		124	{ 0x304e, 0xe249 },
		125	{ 0x304f, 0x73c0 },
		126	{ 0x3050, 0x4249 },
		127	{ 0x3051, 0x0c00 },
		128	{ 0x3052, 0x0226 },
		129	{ 0x3053, 0x1f01 },
		130	{ 0x3054, 0x0226 },
		131	{ 0x3055, 0x1e01 },
		132	{ 0x3056, 0x0226 },
		133	{ 0x3057, 0xfa00 },
		134	{ 0x3058, 0x0000 },
		135	{ 0x3059, 0xf000 },
		136	{ 0x305a, 0x0000 },
		137	{ 0x305b, 0xf000 },
		138	{ 0x305c, 0x0000 },
		139	{ 0x305d, 0xf000 },
		140	{ 0x305e, 0x0000 },
		141	{ 0x305f, 0xf000 },
		142	{ 0x3060, 0x0000 },
		143	{ 0x3061, 0xf000 },
		144	{ 0x3062, 0x0000 },
		145	{ 0x3063, 0xf000 },
		146	{ 0x3064, 0x0000 },
		147	{ 0x3065, 0xf000 },
		148	{ 0x3066, 0x0000 },
		149	{ 0x3067, 0xf000 },
		150	{ 0x3068, 0x0000 },
		151	{ 0x3069, 0xf000 },
		152	{ 0x306a, 0x0000 },
		153	{ 0x306b, 0xf000 },
		154	{ 0x306c, 0x0000 },
		155	{ 0x306d, 0xf000 },
		156	{ 0x306e, 0x0000 },
		157	{ 0x306f, 0xf000 },
		158	{ 0x3070, 0x0226 },
		159	{ 0x3071, 0x1a01 },
		160	{ 0x3072, 0x0226 },
		161	{ 0x3073, 0x1e00 },
		162	{ 0x3074, 0x0226 },
		163	{ 0x3075, 0x1f00 },
		164	{ 0x3076, 0x6226 },
		165	{ 0x3077, 0xf800 },
		166	{ 0x3078, 0x0000 },
		167	{ 0x3079, 0xf000 },
		168	{ 0x307a, 0x0000 },
		169	{ 0x307b, 0xf000 },
		170	{ 0x307c, 0x0000 },
		171	{ 0x307d, 0xf000 },
		172	{ 0x307e, 0x0000 },
		173	{ 0x307f, 0xf000 },
		174	{ 0x3080, 0x2227 },
		175	{ 0x3081, 0x3a03 },
		176	{ 0x3082, 0x0227 },
		177	{ 0x3083, 0x0801 },
		178	{ 0x3084, 0x6255 },
		179	{ 0x3085, 0x0c04 },
		180	{ 0x3086, 0x0227 },
		181	{ 0x3087, 0x5901 },
		182	{ 0x3088, 0xe255 },
		183	{ 0x3089, 0x030d },
		184	{ 0x308a, 0x0255 },
		185	{ 0x308b, 0x2c01 },
		186	{ 0x308c, 0xe255 },
		187	{ 0x308d, 0x4342 },
		188	{ 0x308e, 0xe255 },
		189	{ 0x308f, 0x73c0 },
		190	{ 0x3090, 0x4255 },
		191	{ 0x3091, 0x0c00 },
		192	{ 0x3092, 0x0227 },
		193	{ 0x3093, 0x1f01 },
		194	{ 0x3094, 0x0227 },
		195	{ 0x3095, 0x1e01 },
		196	{ 0x3096, 0x0227 },
		197	{ 0x3097, 0xfa00 },
		198	{ 0x3098, 0x0000 },
		199	{ 0x3099, 0xf000 },
		200	{ 0x309a, 0x0000 },
		201	{ 0x309b, 0xf000 },
		202	{ 0x309c, 0x0000 },
		203	{ 0x309d, 0xf000 },
		204	{ 0x309e, 0x0000 },
		205	{ 0x309f, 0xf000 },
		206	{ 0x30a0, 0x0000 },
		207	{ 0x30a1, 0xf000 },
		208	{ 0x30a2, 0x0000 },
		209	{ 0x30a3, 0xf000 },
		210	{ 0x30a4, 0x0000 },
		211	{ 0x30a5, 0xf000 },
		212	{ 0x30a6, 0x0000 },
		213	{ 0x30a7, 0xf000 },
		214	{ 0x30a8, 0x0000 },
		215	{ 0x30a9, 0xf000 },
		216	{ 0x30aa, 0x0000 },
		217	{ 0x30ab, 0xf000 },
		218	{ 0x30ac, 0x0000 },
		219	{ 0x30ad, 0xf000 },
		220	{ 0x30ae, 0x0000 },
		221	{ 0x30af, 0xf000 },
		222	{ 0x30b0, 0x0227 },
		223	{ 0x30b1, 0x1a01 },
		224	{ 0x30b2, 0x0227 },
		225	{ 0x30b3, 0x1e00 },
		226	{ 0x30b4, 0x0227 },
		227	{ 0x30b5, 0x1f00 },
		228	{ 0x30b6, 0x6227 },
		229	{ 0x30b7, 0xf800 },
		230	{ 0x30b8, 0x0000 },
		231	{ 0x30b9, 0xf000 },
		232	{ 0x30ba, 0x0000 },
		233	{ 0x30bb, 0xf000 },
		234	{ 0x30bc, 0x0000 },
		235	{ 0x30bd, 0xf000 },
		236	{ 0x30be, 0x0000 },
		237	{ 0x30bf, 0xf000 },
		238	{ 0x30c0, 0x2228 },
		239	{ 0x30c1, 0x3a03 },
		240	{ 0x30c2, 0x0228 },
		241	{ 0x30c3, 0x0801 },
		242	{ 0x30c4, 0x6255 },
		243	{ 0x30c5, 0x0c06 },
		244	{ 0x30c6, 0x0228 },
		245	{ 0x30c7, 0x5901 },
		246	{ 0x30c8, 0xe255 },
		247	{ 0x30c9, 0x030d },
		248	{ 0x30ca, 0x0255 },
		249	{ 0x30cb, 0x2c01 },
		250	{ 0x30cc, 0xe255 },
		251	{ 0x30cd, 0x4342 },
		252	{ 0x30ce, 0xe255 },
		253	{ 0x30cf, 0x73c0 },
		254	{ 0x30d0, 0x4255 },
		255	{ 0x30d1, 0x0c00 },
		256	{ 0x30d2, 0x0228 },
		257	{ 0x30d3, 0x1f01 },
		258	{ 0x30d4, 0x0228 },
		259	{ 0x30d5, 0x1e01 },
		260	{ 0x30d6, 0x0228 },
		261	{ 0x30d7, 0xfa00 },
		262	{ 0x30d8, 0x0000 },
		263	{ 0x30d9, 0xf000 },
		264	{ 0x30da, 0x0000 },
		265	{ 0x30db, 0xf000 },
		266	{ 0x30dc, 0x0000 },
		267	{ 0x30dd, 0xf000 },
		268	{ 0x30de, 0x0000 },
		269	{ 0x30df, 0xf000 },
		270	{ 0x30e0, 0x0000 },
		271	{ 0x30e1, 0xf000 },
		272	{ 0x30e2, 0x0000 },
		273	{ 0x30e3, 0xf000 },
		274	{ 0x30e4, 0x0000 },
		275	{ 0x30e5, 0xf000 },
		276	{ 0x30e6, 0x0000 },
		277	{ 0x30e7, 0xf000 },
		278	{ 0x30e8, 0x0000 },
		279	{ 0x30e9, 0xf000 },
		280	{ 0x30ea, 0x0000 },
		281	{ 0x30eb, 0xf000 },
		282	{ 0x30ec, 0x0000 },
		283	{ 0x30ed, 0xf000 },
		284	{ 0x30ee, 0x0000 },
		285	{ 0x30ef, 0xf000 },
		286	{ 0x30f0, 0x0228 },
		287	{ 0x30f1, 0x1a01 },
		288	{ 0x30f2, 0x0228 },
		289	{ 0x30f3, 0x1e00 },
		290	{ 0x30f4, 0x0228 },
		291	{ 0x30f5, 0x1f00 },
		292	{ 0x30f6, 0x6228 },
		293	{ 0x30f7, 0xf800 },
		294	{ 0x30f8, 0x0000 },
		295	{ 0x30f9, 0xf000 },
		296	{ 0x30fa, 0x0000 },
		297	{ 0x30fb, 0xf000 },
		298	{ 0x30fc, 0x0000 },
		299	{ 0x30fd, 0xf000 },
		300	{ 0x30fe, 0x0000 },
		301	{ 0x30ff, 0xf000 },
		302	{ 0x3100, 0x222b },
		303	{ 0x3101, 0x3a03 },
		304	{ 0x3102, 0x222b },
		305	{ 0x3103, 0x5803 },
		306	{ 0x3104, 0xe26f },
		307	{ 0x3105, 0x030d },
		308	{ 0x3106, 0x626f },
		309	{ 0x3107, 0x2c01 },
		310	{ 0x3108, 0xe26f },
		311	{ 0x3109, 0x4342 },
		312	{ 0x310a, 0xe26f },
		313	{ 0x310b, 0x73c0 },
		314	{ 0x310c, 0x026f },
		315	{ 0x310d, 0x0c00 },
		316	{ 0x310e, 0x022b },
		317	{ 0x310f, 0x1f01 },
		318	{ 0x3110, 0x022b },
		319	{ 0x3111, 0x1e01 },
		320	{ 0x3112, 0x022b },
		321	{ 0x3113, 0xfa00 },
		322	{ 0x3114, 0x0000 },
		323	{ 0x3115, 0xf000 },
		324	{ 0x3116, 0x0000 },
		325	{ 0x3117, 0xf000 },
		326	{ 0x3118, 0x0000 },
		327	{ 0x3119, 0xf000 },
		328	{ 0x311a, 0x0000 },
		329	{ 0x311b, 0xf000 },
		330	{ 0x311c, 0x0000 },
		331	{ 0x311d, 0xf000 },
		332	{ 0x311e, 0x0000 },
		333	{ 0x311f, 0xf000 },
		334	{ 0x3120, 0x022b },
		335	{ 0x3121, 0x0a01 },
		336	{ 0x3122, 0x022b },
		337	{ 0x3123, 0x1e00 },
		338	{ 0x3124, 0x022b },
		339	{ 0x3125, 0x1f00 },
		340	{ 0x3126, 0x622b },
		341	{ 0x3127, 0xf800 },
		342	{ 0x3128, 0x0000 },
		343	{ 0x3129, 0xf000 },
		344	{ 0x312a, 0x0000 },
		345	{ 0x312b, 0xf000 },
		346	{ 0x312c, 0x0000 },
		347	{ 0x312d, 0xf000 },
		348	{ 0x312e, 0x0000 },
		349	{ 0x312f, 0xf000 },
		350	{ 0x3130, 0x0000 },
		351	{ 0x3131, 0xf000 },
		352	{ 0x3132, 0x0000 },
		353	{ 0x3133, 0xf000 },
		354	{ 0x3134, 0x0000 },
		355	{ 0x3135, 0xf000 },
		356	{ 0x3136, 0x0000 },
		357	{ 0x3137, 0xf000 },
		358	{ 0x3138, 0x0000 },
		359	{ 0x3139, 0xf000 },
		360	{ 0x313a, 0x0000 },
		361	{ 0x313b, 0xf000 },
		362	{ 0x313c, 0x0000 },
		363	{ 0x313d, 0xf000 },
		364	{ 0x313e, 0x0000 },
		365	{ 0x313f, 0xf000 },
		366	{ 0x3140, 0x0000 },
		367	{ 0x3141, 0xf000 },
		368	{ 0x3142, 0x0000 },
		369	{ 0x3143, 0xf000 },
		370	{ 0x3144, 0x0000 },
		371	{ 0x3145, 0xf000 },
		372	{ 0x3146, 0x0000 },
		373	{ 0x3147, 0xf000 },
		374	{ 0x3148, 0x0000 },
		375	{ 0x3149, 0xf000 },
		376	{ 0x314a, 0x0000 },
		377	{ 0x314b, 0xf000 },
		378	{ 0x314c, 0x0000 },
		379	{ 0x314d, 0xf000 },
		380	{ 0x314e, 0x0000 },
		381	{ 0x314f, 0xf000 },
		382	{ 0x3150, 0x0000 },
		383	{ 0x3151, 0xf000 },
		384	{ 0x3152, 0x0000 },
		385	{ 0x3153, 0xf000 },
		386	{ 0x3154, 0x0000 },
		387	{ 0x3155, 0xf000 },
		388	{ 0x3156, 0x0000 },
		389	{ 0x3157, 0xf000 },
		390	{ 0x3158, 0x0000 },
		391	{ 0x3159, 0xf000 },
		392	{ 0x315a, 0x0000 },
		393	{ 0x315b, 0xf000 },
		394	{ 0x315c, 0x0000 },
		395	{ 0x315d, 0xf000 },
		396	{ 0x315e, 0x0000 },
		397	{ 0x315f, 0xf000 },
		398	{ 0x3160, 0x0000 },
		399	{ 0x3161, 0xf000 },
		400	{ 0x3162, 0x0000 },
		401	{ 0x3163, 0xf000 },
		402	{ 0x3164, 0x0000 },
		403	{ 0x3165, 0xf000 },
		404	{ 0x3166, 0x0000 },
		405	{ 0x3167, 0xf000 },
		406	{ 0x3168, 0x0000 },
		407	{ 0x3169, 0xf000 },
		408	{ 0x316a, 0x0000 },
		409	{ 0x316b, 0xf000 },
		410	{ 0x316c, 0x0000 },
		411	{ 0x316d, 0xf000 },
		412	{ 0x316e, 0x0000 },
		413	{ 0x316f, 0xf000 },
		414	{ 0x3170, 0x0000 },
		415	{ 0x3171, 0xf000 },
		416	{ 0x3172, 0x0000 },
		417	{ 0x3173, 0xf000 },
		418	{ 0x3174, 0x0000 },
		419	{ 0x3175, 0xf000 },
		420	{ 0x3176, 0x0000 },
		421	{ 0x3177, 0xf000 },
		422	{ 0x3178, 0x0000 },
		423	{ 0x3179, 0xf000 },
		424	{ 0x317a, 0x0000 },
		425	{ 0x317b, 0xf000 },
		426	{ 0x317c, 0x0000 },
		427	{ 0x317d, 0xf000 },
		428	{ 0x317e, 0x0000 },
		429	{ 0x317f, 0xf000 },
		430	{ 0x3180, 0x2001 },
		431	{ 0x3181, 0xf101 },
		432	{ 0x3182, 0x0000 },
		433	{ 0x3183, 0xf000 },
		434	{ 0x3184, 0x0000 },
		435	{ 0x3185, 0xf000 },
		436	{ 0x3186, 0x0000 },
		437	{ 0x3187, 0xf000 },
		438	{ 0x3188, 0x0000 },
		439	{ 0x3189, 0xf000 },
		440	{ 0x318a, 0x0000 },
		441	{ 0x318b, 0xf000 },
		442	{ 0x318c, 0x0000 },
		443	{ 0x318d, 0xf000 },
		444	{ 0x318e, 0x0000 },
		445	{ 0x318f, 0xf000 },
		446	{ 0x3190, 0x0000 },
		447	{ 0x3191, 0xf000 },
		448	{ 0x3192, 0x0000 },
		449	{ 0x3193, 0xf000 },
		450	{ 0x3194, 0x0000 },
		451	{ 0x3195, 0xf000 },
		452	{ 0x3196, 0x0000 },
		453	{ 0x3197, 0xf000 },
		454	{ 0x3198, 0x0000 },
		455	{ 0x3199, 0xf000 },
		456	{ 0x319a, 0x0000 },
		457	{ 0x319b, 0xf000 },
		458	{ 0x319c, 0x0000 },
		459	{ 0x319d, 0xf000 },
		460	{ 0x319e, 0x0000 },
		461	{ 0x319f, 0xf000 },
		462	{ 0x31a0, 0x0000 },
		463	{ 0x31a1, 0xf000 },
		464	{ 0x31a2, 0x0000 },
		465	{ 0x31a3, 0xf000 },
		466	{ 0x31a4, 0x0000 },
		467	{ 0x31a5, 0xf000 },
		468	{ 0x31a6, 0x0000 },
		469	{ 0x31a7, 0xf000 },
		470	{ 0x31a8, 0x0000 },
		471	{ 0x31a9, 0xf000 },
		472	{ 0x31aa, 0x0000 },
		473	{ 0x31ab, 0xf000 },
		474	{ 0x31ac, 0x0000 },
		475	{ 0x31ad, 0xf000 },
		476	{ 0x31ae, 0x0000 },
		477	{ 0x31af, 0xf000 },
		478	{ 0x31b0, 0x0000 },
		479	{ 0x31b1, 0xf000 },
		480	{ 0x31b2, 0x0000 },
		481	{ 0x31b3, 0xf000 },
		482	{ 0x31b4, 0x0000 },
		483	{ 0x31b5, 0xf000 },
		484	{ 0x31b6, 0x0000 },
		485	{ 0x31b7, 0xf000 },
		486	{ 0x31b8, 0x0000 },
		487	{ 0x31b9, 0xf000 },
		488	{ 0x31ba, 0x0000 },
		489	{ 0x31bb, 0xf000 },
		490	{ 0x31bc, 0x0000 },
		491	{ 0x31bd, 0xf000 },
		492	{ 0x31be, 0x0000 },
		493	{ 0x31bf, 0xf000 },
		494	{ 0x31c0, 0x0000 },
		495	{ 0x31c1, 0xf000 },
		496	{ 0x31c2, 0x0000 },
		497	{ 0x31c3, 0xf000 },
		498	{ 0x31c4, 0x0000 },
		499	{ 0x31c5, 0xf000 },
		500	{ 0x31c6, 0x0000 },
		501	{ 0x31c7, 0xf000 },
		502	{ 0x31c8, 0x0000 },
		503	{ 0x31c9, 0xf000 },
		504	{ 0x31ca, 0x0000 },
		505	{ 0x31cb, 0xf000 },
		506	{ 0x31cc, 0x0000 },
		507	{ 0x31cd, 0xf000 },
		508	{ 0x31ce, 0x0000 },
		509	{ 0x31cf, 0xf000 },
		510	{ 0x31d0, 0x0000 },
		511	{ 0x31d1, 0xf000 },
		512	{ 0x31d2, 0x0000 },
		513	{ 0x31d3, 0xf000 },
		514	{ 0x31d4, 0x0000 },
		515	{ 0x31d5, 0xf000 },
		516	{ 0x31d6, 0x0000 },
		517	{ 0x31d7, 0xf000 },
		518	{ 0x31d8, 0x0000 },
		519	{ 0x31d9, 0xf000 },
		520	{ 0x31da, 0x0000 },
		521	{ 0x31db, 0xf000 },
		522	{ 0x31dc, 0x0000 },
		523	{ 0x31dd, 0xf000 },
		524	{ 0x31de, 0x0000 },
		525	{ 0x31df, 0xf000 },
		526	{ 0x31e0, 0x0000 },
		527	{ 0x31e1, 0xf000 },
		528	{ 0x31e2, 0x0000 },
		529	{ 0x31e3, 0xf000 },
		530	{ 0x31e4, 0x0000 },
		531	{ 0x31e5, 0xf000 },
		532	{ 0x31e6, 0x0000 },
		533	{ 0x31e7, 0xf000 },
		534	{ 0x31e8, 0x0000 },
		535	{ 0x31e9, 0xf000 },
		536	{ 0x31ea, 0x0000 },
		537	{ 0x31eb, 0xf000 },
		538	{ 0x31ec, 0x0000 },
		539	{ 0x31ed, 0xf000 },
		540	{ 0x31ee, 0x0000 },
		541	{ 0x31ef, 0xf000 },
		542	{ 0x31f0, 0x0000 },
		543	{ 0x31f1, 0xf000 },
		544	{ 0x31f2, 0x0000 },
		545	{ 0x31f3, 0xf000 },
		546	{ 0x31f4, 0x0000 },
		547	{ 0x31f5, 0xf000 },
		548	{ 0x31f6, 0x0000 },
		549	{ 0x31f7, 0xf000 },
		550	{ 0x31f8, 0x0000 },
		551	{ 0x31f9, 0xf000 },
		552	{ 0x31fa, 0x0000 },
		553	{ 0x31fb, 0xf000 },
		554	{ 0x31fc, 0x0000 },
		555	{ 0x31fd, 0xf000 },
		556	{ 0x31fe, 0x0000 },
		557	{ 0x31ff, 0xf000 },
		558	{ 0x024d, 0xff50 },
		559	{ 0x0252, 0xff50 },
		560	{ 0x0259, 0x0112 },
		561	{ 0x025e, 0x0112 },
		562	};
		563
		564	static int wm5102_sysclk_ev(struct snd_soc_dapm_widget *w,
		565	struct snd_kcontrol *kcontrol, int event)
		566	{
		567	struct snd_soc_codec *codec = w->codec;
		568	struct arizona *arizona = dev_get_drvdata(codec->dev);
		569	struct regmap *regmap = codec->control_data;
		570	const struct reg_default *patch = NULL;
		571	int i, patch_size;
		572
		573	switch (arizona->rev) {
		574	case 0:
		575	patch = wm5102_sysclk_reva_patch;
		576	patch_size = ARRAY_SIZE(wm5102_sysclk_reva_patch);
		577	break;
		578	}
		579
		580	switch (event) {
		581	case SND_SOC_DAPM_POST_PMU:
		582	if (patch)
		583	for (i = 0; i < patch_size; i++)
		584	regmap_write(regmap, patch[i].reg,
		585	patch[i].def);
		586	break;
		587
		588	default:
		589	break;
		590	}
		591
		592	return 0;
		593	}
		594
45	static const struct snd_kcontrol_new wm5102_snd_controls[] = {	595	static const struct snd_kcontrol_new wm5102_snd_controls[] = {
46	SOC_SINGLE("IN1 High Performance Switch", ARIZONA_IN1L_CONTROL,	596	SOC_SINGLE("IN1 High Performance Switch", ARIZONA_IN1L_CONTROL,
47	ARIZONA_IN1_OSR_SHIFT, 1, 0),	597	ARIZONA_IN1_OSR_SHIFT, 1, 0),
@@ -297,7 +847,7 @@ static const struct snd_kcontrol_new wm5102_aec_loopback_mux = · 249 unmodified lines
297		847
298	static const struct snd_soc_dapm_widget wm5102_dapm_widgets[] = {	848	static const struct snd_soc_dapm_widget wm5102_dapm_widgets[] = {
299	SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1, ARIZONA_SYSCLK_ENA_SHIFT,	849	SND_SOC_DAPM_SUPPLY("SYSCLK", ARIZONA_SYSTEM_CLOCK_1, ARIZONA_SYSCLK_ENA_SHIFT,
300	0, NULL, 0),	850	0, wm5102_sysclk_ev, SND_SOC_DAPM_POST_PMU),
301	SND_SOC_DAPM_SUPPLY("ASYNCCLK", ARIZONA_ASYNC_CLOCK_1,	851	SND_SOC_DAPM_SUPPLY("ASYNCCLK", ARIZONA_ASYNC_CLOCK_1,
302	ARIZONA_ASYNC_CLK_ENA_SHIFT, 0, NULL, 0),	852	ARIZONA_ASYNC_CLK_ENA_SHIFT, 0, NULL, 0),
303	SND_SOC_DAPM_SUPPLY("OPCLK", ARIZONA_OUTPUT_SYSTEM_CLOCK,	853	SND_SOC_DAPM_SUPPLY("OPCLK", ARIZONA_OUTPUT_SYSTEM_CLOCK,

sound/soc/codecs/wm8978.c+1−1

@@ -782,7 +782,7 @@ static int wm8978_hw_params(struct snd_pcm_substream *substream, · 781 unmodified lines
782	wm8978->mclk_idx = -1;	782	wm8978->mclk_idx = -1;
783	f_sel = wm8978->f_mclk;	783	f_sel = wm8978->f_mclk;
784	} else {	784	} else {
785	if (!wm8978->f_pllout) {	785	if (!wm8978->f_opclk) {
786	/* We only enter here, if OPCLK is not used */	786	/* We only enter here, if OPCLK is not used */
787	int ret = wm8978_configure_pll(codec);	787	int ret = wm8978_configure_pll(codec);
788	if (ret < 0)	788	if (ret < 0)

sound/soc/codecs/wm8994.c+1−1

@@ -3722,7 +3722,7 @@ static irqreturn_t wm8958_mic_irq(int irq, void *data) · 3721 unmodified lines
3722	} while (count--);	3722	} while (count--);
3723		3723
3724	if (count == 0)	3724	if (count == 0)
3725	dev_warn(codec->dev, "No impedence range reported for jack\n");	3725	dev_warn(codec->dev, "No impedance range reported for jack\n");
3726		3726
3727	#ifndef CONFIG_SND_SOC_WM8994_MODULE	3727	#ifndef CONFIG_SND_SOC_WM8994_MODULE
3728	trace_snd_soc_jack_irq(dev_name(codec->dev));	3728	trace_snd_soc_jack_irq(dev_name(codec->dev));

sound/soc/mxs/mxs-saif.c+13−4

 		if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 			/*
-			 * write a data to saif data register to trigger
+			 * write data to saif data register to trigger
-			 * the transfer
+			 * the transfer.
+			 * For 24-bit format the 32-bit FIFO register stores
+			 * only one channel, so we need to write twice.
+			 * This is also safe for the other non 24-bit formats.
 			 */
 			__raw_writel(0, saif->base + SAIF_DATA);
+			__raw_writel(0, saif->base + SAIF_DATA);
 		} else {
 			/*
-			 * read a data from saif data register to trigger
+			 * read data from saif data register to trigger
-			 * the receive
+			 * the receive.
+			 * For 24-bit format the 32-bit FIFO register stores
+			 * only one channel, so we need to read twice.
+			 * This is also safe for the other non 24-bit formats.
 			 */
 			__raw_readl(saif->base + SAIF_DATA);
+			__raw_readl(saif->base + SAIF_DATA);
 		}
 		master_saif->ongoing = 1;
 MODULE_AUTHOR("Freescale Semiconductor, Inc.");
 MODULE_DESCRIPTION("MXS ASoC SAIF driver");
 MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:mxs-saif");

sound/soc/samsung/Kconfig+2−0

@@ -207,6 +207,8 @@ config SND_SOC_BELLS · 206 unmodified lines
207	select SND_SOC_WM5102	207	select SND_SOC_WM5102
208	select SND_SOC_WM5110	208	select SND_SOC_WM5110
209	select SND_SOC_WM9081	209	select SND_SOC_WM9081
		210	select SND_SOC_WM0010
		211	select SND_SOC_WM1250_EV1
210		212
211	config SND_SOC_LOWLAND	213	config SND_SOC_LOWLAND
212	tristate "Audio support for Wolfson Lowland"	214	tristate "Audio support for Wolfson Lowland"

sound/soc/samsung/bells.c+1−1

@@ -247,7 +247,7 @@ static struct snd_soc_dai_link bells_dai_wm5110[] = { · 246 unmodified lines
247	{	247	{
248	.name = "Sub",	248	.name = "Sub",
249	.stream_name = "Sub",	249	.stream_name = "Sub",
250	.cpu_dai_name = "wm5110-aif3",	250	.cpu_dai_name = "wm5102-aif3",
251	.codec_dai_name = "wm9081-hifi",	251	.codec_dai_name = "wm9081-hifi",
252	.codec_name = "wm9081.1-006c",	252	.codec_name = "wm9081.1-006c",
253	.dai_fmt = SND_SOC_DAIFMT_I2S \| SND_SOC_DAIFMT_NB_NF	253	.dai_fmt = SND_SOC_DAIFMT_I2S \| SND_SOC_DAIFMT_NB_NF

sound/soc/soc-core.c+3−2

@@ -2786,8 +2786,9 @@ int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontrol, · 2785 unmodified lines
2786	val = (ucontrol->value.integer.value[0] + min) & mask;	2786	val = (ucontrol->value.integer.value[0] + min) & mask;
2787	val = val << shift;	2787	val = val << shift;
2788		2788
2789	if (snd_soc_update_bits_locked(codec, reg, val_mask, val))	2789	err = snd_soc_update_bits_locked(codec, reg, val_mask, val);
2790	return err;	2790	if (err < 0)
		2791	return err;
2791		2792
2792	if (snd_soc_volsw_is_stereo(mc)) {	2793	if (snd_soc_volsw_is_stereo(mc)) {
2793	val_mask = mask << rshift;	2794	val_mask = mask << rshift;

sound/soc/soc-dapm.c+1−1

@@ -3745,7 +3745,7 @@ void snd_soc_dapm_shutdown(struct snd_soc_card *card) · 3744 unmodified lines
3745	{	3745	{
3746	struct snd_soc_codec *codec;	3746	struct snd_soc_codec *codec;
3747		3747
3748	list_for_each_entry(codec, &card->codec_dev_list, list) {	3748	list_for_each_entry(codec, &card->codec_dev_list, card_list) {
3749	soc_dapm_shutdown_codec(&codec->dapm);	3749	soc_dapm_shutdown_codec(&codec->dapm);
3750	if (codec->dapm.bias_level == SND_SOC_BIAS_STANDBY)	3750	if (codec->dapm.bias_level == SND_SOC_BIAS_STANDBY)
3751	snd_soc_dapm_set_bias_level(&codec->dapm,	3751	snd_soc_dapm_set_bias_level(&codec->dapm,

sound/usb/card.c+3−3

 		return;
 	card = chip->card;
-	mutex_lock(&register_mutex);
 	down_write(&chip->shutdown_rwsem);
 	chip->shutdown = 1;
+	up_write(&chip->shutdown_rwsem);
+	mutex_lock(&register_mutex);
 	chip->num_interfaces--;
 	if (chip->num_interfaces <= 0) {
 		snd_card_disconnect(card);
 			snd_usb_mixer_disconnect(p);
 		}
 		usb_chip[chip->index] = NULL;
-		up_write(&chip->shutdown_rwsem);
 		mutex_unlock(&register_mutex);
 		snd_card_free_when_closed(card);
 	} else {
-		up_write(&chip->shutdown_rwsem);
 		mutex_unlock(&register_mutex);
 	}
 }

sound/usb/endpoint.c+13−0

 #define EP_FLAG_ACTIVATED	0
 #define EP_FLAG_RUNNING		1
+#define EP_FLAG_STOPPING	2
 /*
  * snd_usb_endpoint is a model that abstracts everything related to an
 	if (alive)
 		snd_printk(KERN_ERR "timeout: still %d active urbs on EP #%x\n",
 					alive, ep->ep_num);
+	clear_bit(EP_FLAG_STOPPING, &ep->flags);
 	return 0;
 }
+/* sync the pending stop operation;
+ * this function itself doesn't trigger the stop operation
+ */
+void snd_usb_endpoint_sync_pending_stop(struct snd_usb_endpoint *ep)
+{
+	if (ep && test_bit(EP_FLAG_STOPPING, &ep->flags))
+		wait_clear_urbs(ep);
+}
 /*
  * unlink active urbs.
  */
 		if (wait)
 			wait_clear_urbs(ep);
+		else
+			set_bit(EP_FLAG_STOPPING, &ep->flags);
 	}
 }

sound/usb/endpoint.h+1−0

@@ -19,6 +19,7 @@ int snd_usb_endpoint_set_params(struct snd_usb_endpoint *ep, · 18 unmodified lines
19	int snd_usb_endpoint_start(struct snd_usb_endpoint *ep, int can_sleep);	19	int snd_usb_endpoint_start(struct snd_usb_endpoint *ep, int can_sleep);
20	void snd_usb_endpoint_stop(struct snd_usb_endpoint *ep,	20	void snd_usb_endpoint_stop(struct snd_usb_endpoint *ep,
21	int force, int can_sleep, int wait);	21	int force, int can_sleep, int wait);
		22	void snd_usb_endpoint_sync_pending_stop(struct snd_usb_endpoint *ep);
22	int snd_usb_endpoint_activate(struct snd_usb_endpoint *ep);	23	int snd_usb_endpoint_activate(struct snd_usb_endpoint *ep);
23	int snd_usb_endpoint_deactivate(struct snd_usb_endpoint *ep);	24	int snd_usb_endpoint_deactivate(struct snd_usb_endpoint *ep);
24	void snd_usb_endpoint_free(struct list_head *head);	25	void snd_usb_endpoint_free(struct list_head *head);

sound/usb/pcm.c+3−0

@@ -568,6 +568,9 @@ static int snd_usb_pcm_prepare(struct snd_pcm_substream *substream) · 567 unmodified lines
568	goto unlock;	568	goto unlock;
569	}	569	}
570		570
		571	snd_usb_endpoint_sync_pending_stop(subs->sync_endpoint);
		572	snd_usb_endpoint_sync_pending_stop(subs->data_endpoint);
		573
571	ret = set_format(subs, subs->cur_audiofmt);	574	ret = set_format(subs, subs->cur_audiofmt);
572	if (ret < 0)	575	if (ret < 0)
573	goto unlock;	576	goto unlock;

tools/power/x86/turbostat/turbostat.c+19−9

 	retval = pread(fd, msr, sizeof *msr, offset);
 	close(fd);
-	if (retval != sizeof *msr)
+	if (retval != sizeof *msr) {
+		fprintf(stderr, "%s offset 0x%zx read failed\n", pathname, offset);
 		return -1;
+	}
 	return 0;
 }
 restart:
 	retval = for_all_cpus(get_counters, EVEN_COUNTERS);
-	if (retval) {
+	if (retval < -1) {
+		exit(retval);
+	} else if (retval == -1) {
 		re_initialize();
 		goto restart;
 	}
 		}
 		sleep(interval_sec);
 		retval = for_all_cpus(get_counters, ODD_COUNTERS);
-		if (retval) {
+		if (retval < -1) {
+			exit(retval);
+		} else if (retval == -1) {
 			re_initialize();
 			goto restart;
 		}
 		flush_stdout();
 		sleep(interval_sec);
 		retval = for_all_cpus(get_counters, EVEN_COUNTERS);
-		if (retval) {
+		if (retval < -1) {
+			exit(retval);
+		} else if (retval == -1) {
 			re_initialize();
 			goto restart;
 		}
 int fork_it(char **argv)
 {
 	pid_t child_pid;
+	int status;
-	for_all_cpus(get_counters, EVEN_COUNTERS);
+	status = for_all_cpus(get_counters, EVEN_COUNTERS);
+	if (status)
+		exit(status);
 	/* clear affinity side-effect of get_counters() */
 	sched_setaffinity(0, cpu_present_setsize, cpu_present_set);
 	gettimeofday(&tv_even, (struct timezone *)NULL);
 		/* child */
 		execvp(argv[0], argv);
 	} else {
-		int status;
 		/* parent */
 		if (child_pid == -1) {
 		signal(SIGQUIT, SIG_IGN);
 		if (waitpid(child_pid, &status, 0) == -1) {
 			perror("wait");
-			exit(1);
+			exit(status);
 		}
 	}
 	/*
 	fprintf(stderr, "%.6f sec\n", tv_delta.tv_sec + tv_delta.tv_usec/1000000.0);
-	return 0;
+	return status;
 }
 void cmdline(int argc, char **argv)
 	progname = argv[0];
-	while ((opt = getopt(argc, argv, "+pPSvisc:sC:m:M:")) != -1) {
+	while ((opt = getopt(argc, argv, "+pPSvi:sc:sC:m:M:")) != -1) {
 		switch (opt) {
 		case 'p':
 			show_core_only++;

tools/testing/selftests/Makefile+1−1

@@ -1,4 +1,4 @@
1	TARGETS = breakpoints kcmp mqueue vm cpu-hotplug memory-hotplug epoll	1	TARGETS = breakpoints kcmp mqueue vm cpu-hotplug memory-hotplug
2		2
3	all:	3	all:
4	for TARGET in $(TARGETS); do \	4	for TARGET in $(TARGETS); do \

tools/testing/selftests/epoll/Makefile+0−11

@@ -1,11 +0,0 @@
1	# Makefile for epoll selftests
2
3	all: test_epoll
4	%: %.c
5	gcc -pthread -g -o $@ $^
6
7	run_tests: all
8	./test_epoll
9
10	clean:
11	$(RM) test_epoll

tools/testing/selftests/epoll/test_epoll.c+0−344

@@ -1,344 +0,0 @@
1	/*
2	* tools/testing/selftests/epoll/test_epoll.c
3	*
4	* Copyright 2012 Adobe Systems Incorporated
5	*
6	* This program is free software; you can redistribute it and/or modify
7	* it under the terms of the GNU General Public License as published by
8	* the Free Software Foundation; either version 2 of the License, or
9	* (at your option) any later version.
10	*
11	* Paton J. Lewis <palewis@adobe.com>
12	*
13	*/
14
15	#include <errno.h>
16	#include <fcntl.h>
17	#include <pthread.h>
18	#include <stdio.h>
19	#include <stdlib.h>
20	#include <unistd.h>
21	#include <sys/epoll.h>
22	#include <sys/socket.h>
23
24	/*
25	* A pointer to an epoll_item_private structure will be stored in the epoll
26	* item's event structure so that we can get access to the epoll_item_private
27	* data after calling epoll_wait:
28	*/
29	struct epoll_item_private {
30	int index; /* Position of this struct within the epoll_items array. */
31	int fd;
32	uint32_t events;
33	pthread_mutex_t mutex; /* Guards the following variables... */
34	int stop;
35	int status; /* Stores any error encountered while handling item. */
36	/* The following variable allows us to test whether we have encountered
37	a problem while attempting to cancel and delete the associated
38	event. When the test program exits, 'deleted' should be exactly
39	one. If it is greater than one, then the failed test reflects a real
40	world situation where we would have tried to access the epoll item's
41	private data after deleting it: */
42	int deleted;
43	};
44
45	struct epoll_item_private *epoll_items;
46
47	/*
48	* Delete the specified item from the epoll set. In a real-world secneario this
49	* is where we would free the associated data structure, but in this testing
50	* environment we retain the structure so that we can test for double-deletion:
51	*/
52	void delete_item(int index)
53	{
54	__sync_fetch_and_add(&epoll_items[index].deleted, 1);
55	}
56
57	/*
58	* A pointer to a read_thread_data structure will be passed as the argument to
59	* each read thread:
60	*/
61	struct read_thread_data {
62	int stop;
63	int status; /* Indicates any error encountered by the read thread. */
64	int epoll_set;
65	};
66
67	/*
68	* The function executed by the read threads:
69	*/
70	void read_thread_function(void function_data)
71	{
72	struct read_thread_data *thread_data =
73	(struct read_thread_data *)function_data;
74	struct epoll_event event_data;
75	struct epoll_item_private *item_data;
76	char socket_data;
77
78	/* Handle events until we encounter an error or this thread's 'stop'
79	condition is set: */
80	while (1) {
81	int result = epoll_wait(thread_data->epoll_set,
82	&event_data,
83	1, /* Number of desired events */
84	1000); /* Timeout in ms */
85	if (result < 0) {
86	/* Breakpoints signal all threads. Ignore that while
87	debugging: */
88	if (errno == EINTR)
89	continue;
90	thread_data->status = errno;
91	return 0;
92	} else if (thread_data->stop)
93	return 0;
94	else if (result == 0) /* Timeout */
95	continue;
96
97	/* We need the mutex here because checking for the stop
98	condition and re-enabling the epoll item need to be done
99	together as one atomic operation when EPOLL_CTL_DISABLE is
100	available: */
101	item_data = (struct epoll_item_private *)event_data.data.ptr;
102	pthread_mutex_lock(&item_data->mutex);
103
104	/* Remove the item from the epoll set if we want to stop
105	handling that event: */
106	if (item_data->stop)
107	delete_item(item_data->index);
108	else {
109	/* Clear the data that was written to the other end of
110	our non-blocking socket: */
111	do {
112	if (read(item_data->fd, &socket_data, 1) < 1) {
113	if ((errno == EAGAIN) \|\|
114	(errno == EWOULDBLOCK))
115	break;
116	else
117	goto error_unlock;
118	}
119	} while (item_data->events & EPOLLET);
120
121	/* The item was one-shot, so re-enable it: */
122	event_data.events = item_data->events;
123	if (epoll_ctl(thread_data->epoll_set,
124	EPOLL_CTL_MOD,
125	item_data->fd,
126	&event_data) < 0)
127	goto error_unlock;
128	}
129
130	pthread_mutex_unlock(&item_data->mutex);
131	}
132
133	error_unlock:
134	thread_data->status = item_data->status = errno;
135	pthread_mutex_unlock(&item_data->mutex);
136	return 0;
137	}
138
139	/*
140	* A pointer to a write_thread_data structure will be passed as the argument to
141	* the write thread:
142	*/
143	struct write_thread_data {
144	int stop;
145	int status; /* Indicates any error encountered by the write thread. */
146	int n_fds;
147	int *fds;
148	};
149
150	/*
151	* The function executed by the write thread. It writes a single byte to each
152	* socket in turn until the stop condition for this thread is set. If writing to
153	* a socket would block (i.e. errno was EAGAIN), we leave that socket alone for
154	* the moment and just move on to the next socket in the list. We don't care
155	* about the order in which we deliver events to the epoll set. In fact we don't
156	* care about the data we're writing to the pipes at all; we just want to
157	* trigger epoll events:
158	*/
159	void write_thread_function(void function_data)
160	{
161	const char data = 'X';
162	int index;
163	struct write_thread_data *thread_data =
164	(struct write_thread_data *)function_data;
165	while (!thread_data->stop)
166	for (index = 0;
167	!thread_data->stop && (index < thread_data->n_fds);
168	++index)
169	if ((write(thread_data->fds[index], &data, 1) < 1) &&
170	(errno != EAGAIN) &&
171	(errno != EWOULDBLOCK)) {
172	thread_data->status = errno;
173	return;
174	}
175	}
176
177	/*
178	* Arguments are currently ignored:
179	*/
180	int main(int argc, char **argv)
181	{
182	const int n_read_threads = 100;
183	const int n_epoll_items = 500;
184	int index;
185	int epoll_set = epoll_create1(0);
186	struct write_thread_data write_thread_data = {
187	0, 0, n_epoll_items, malloc(n_epoll_items * sizeof(int))
188	};
189	struct read_thread_data *read_thread_data =
190	malloc(n_read_threads * sizeof(struct read_thread_data));
191	pthread_t read_threads = malloc(n_read_threads sizeof(pthread_t));
192	pthread_t write_thread;
193
194	printf("-----------------\n");
195	printf("Runing test_epoll\n");
196	printf("-----------------\n");
197
198	epoll_items = malloc(n_epoll_items * sizeof(struct epoll_item_private));
199
200	if (epoll_set < 0 \|\| epoll_items == 0 \|\| write_thread_data.fds == 0 \|\|
201	read_thread_data == 0 \|\| read_threads == 0)
202	goto error;
203
204	if (sysconf(_SC_NPROCESSORS_ONLN) < 2) {
205	printf("Error: please run this test on a multi-core system.\n");
206	goto error;
207	}
208
209	/* Create the socket pairs and epoll items: */
210	for (index = 0; index < n_epoll_items; ++index) {
211	int socket_pair[2];
212	struct epoll_event event_data;
213	if (socketpair(AF_UNIX,
214	SOCK_STREAM \| SOCK_NONBLOCK,
215	0,
216	socket_pair) < 0)
217	goto error;
218	write_thread_data.fds[index] = socket_pair[0];
219	epoll_items[index].index = index;
220	epoll_items[index].fd = socket_pair[1];
221	if (pthread_mutex_init(&epoll_items[index].mutex, NULL) != 0)
222	goto error;
223	/* We always use EPOLLONESHOT because this test is currently
224	structured to demonstrate the need for EPOLL_CTL_DISABLE,
225	which only produces useful information in the EPOLLONESHOT
226	case (without EPOLLONESHOT, calling epoll_ctl with
227	EPOLL_CTL_DISABLE will never return EBUSY). If support for
228	testing events without EPOLLONESHOT is desired, it should
229	probably be implemented in a separate unit test. */
230	epoll_items[index].events = EPOLLIN \| EPOLLONESHOT;
231	if (index < n_epoll_items / 2)
232	epoll_items[index].events \|= EPOLLET;
233	epoll_items[index].stop = 0;
234	epoll_items[index].status = 0;
235	epoll_items[index].deleted = 0;
236	event_data.events = epoll_items[index].events;
237	event_data.data.ptr = &epoll_items[index];
238	if (epoll_ctl(epoll_set,
239	EPOLL_CTL_ADD,
240	epoll_items[index].fd,
241	&event_data) < 0)
242	goto error;
243	}
244
245	/* Create and start the read threads: */
246	for (index = 0; index < n_read_threads; ++index) {
247	read_thread_data[index].stop = 0;
248	read_thread_data[index].status = 0;
249	read_thread_data[index].epoll_set = epoll_set;
250	if (pthread_create(&read_threads[index],
251	NULL,
252	read_thread_function,
253	&read_thread_data[index]) != 0)
254	goto error;
255	}
256
257	if (pthread_create(&write_thread,
258	NULL,
259	write_thread_function,
260	&write_thread_data) != 0)
261	goto error;
262
263	/* Cancel all event pollers: */
264	#ifdef EPOLL_CTL_DISABLE
265	for (index = 0; index < n_epoll_items; ++index) {
266	pthread_mutex_lock(&epoll_items[index].mutex);
267	++epoll_items[index].stop;
268	if (epoll_ctl(epoll_set,
269	EPOLL_CTL_DISABLE,
270	epoll_items[index].fd,
271	NULL) == 0)
272	delete_item(index);
273	else if (errno != EBUSY) {
274	pthread_mutex_unlock(&epoll_items[index].mutex);
275	goto error;
276	}
277	/* EBUSY means events were being handled; allow the other thread
278	to delete the item. */
279	pthread_mutex_unlock(&epoll_items[index].mutex);
280	}
281	#else
282	for (index = 0; index < n_epoll_items; ++index) {
283	pthread_mutex_lock(&epoll_items[index].mutex);
284	++epoll_items[index].stop;
285	pthread_mutex_unlock(&epoll_items[index].mutex);
286	/* Wait in case a thread running read_thread_function is
287	currently executing code between epoll_wait and
288	pthread_mutex_lock with this item. Note that a longer delay
289	would make double-deletion less likely (at the expense of
290	performance), but there is no guarantee that any delay would
291	ever be sufficient. Note also that we delete all event
292	pollers at once for testing purposes, but in a real-world
293	environment we are likely to want to be able to cancel event
294	pollers at arbitrary times. Therefore we can't improve this
295	situation by just splitting this loop into two loops
296	(i.e. signal 'stop' for all items, sleep, and then delete all
297	items). We also can't fix the problem via EPOLL_CTL_DEL
298	because that command can't prevent the case where some other
299	thread is executing read_thread_function within the region
300	mentioned above: */
301	usleep(1);
302	pthread_mutex_lock(&epoll_items[index].mutex);
303	if (!epoll_items[index].deleted)
304	delete_item(index);
305	pthread_mutex_unlock(&epoll_items[index].mutex);
306	}
307	#endif
308
309	/* Shut down the read threads: */
310	for (index = 0; index < n_read_threads; ++index)
311	__sync_fetch_and_add(&read_thread_data[index].stop, 1);
312	for (index = 0; index < n_read_threads; ++index) {
313	if (pthread_join(read_threads[index], NULL) != 0)
314	goto error;
315	if (read_thread_data[index].status)
316	goto error;
317	}
318
319	/* Shut down the write thread: */
320	__sync_fetch_and_add(&write_thread_data.stop, 1);
321	if ((pthread_join(write_thread, NULL) != 0) \|\| write_thread_data.status)
322	goto error;
323
324	/* Check for final error conditions: */
325	for (index = 0; index < n_epoll_items; ++index) {
326	if (epoll_items[index].status != 0)
327	goto error;
328	if (pthread_mutex_destroy(&epoll_items[index].mutex) < 0)
329	goto error;
330	}
331	for (index = 0; index < n_epoll_items; ++index)
332	if (epoll_items[index].deleted != 1) {
333	printf("Error: item data deleted %1d times.\n",
334	epoll_items[index].deleted);
335	goto error;
336	}
337
338	printf("[PASS]\n");
339	return 0;
340
341	error:
342	printf("[FAIL]\n");
343	return errno;
344	}

@@ -62,23 +62,23 @@ extern pgprot_t pgprot_default; · 61 unmodified lines
62		62
63	#define _MOD_PROT(p, b) __pgprot(pgprot_val(p) \| (b))	63	#define _MOD_PROT(p, b) __pgprot(pgprot_val(p) \| (b))
64		64
65	#define PAGE_NONE _MOD_PROT(pgprot_default, PTE_NG \| PTE_XN \| PTE_RDONLY)	65	#define PAGE_NONE _MOD_PROT(pgprot_default, PTE_NG \| PTE_PXN \| PTE_UXN \| PTE_RDONLY)
66	#define PAGE_SHARED _MOD_PROT(pgprot_default, PTE_USER \| PTE_NG \| PTE_XN)	66	#define PAGE_SHARED _MOD_PROT(pgprot_default, PTE_USER \| PTE_NG \| PTE_PXN \| PTE_UXN)
67	#define PAGE_SHARED_EXEC _MOD_PROT(pgprot_default, PTE_USER \| PTE_NG)	67	#define PAGE_SHARED_EXEC _MOD_PROT(pgprot_default, PTE_USER \| PTE_NG \| PTE_PXN)
68	#define PAGE_COPY _MOD_PROT(pgprot_default, PTE_USER \| PTE_NG \| PTE_XN \| PTE_RDONLY)	68	#define PAGE_COPY _MOD_PROT(pgprot_default, PTE_USER \| PTE_NG \| PTE_PXN \| PTE_UXN \| PTE_RDONLY)
69	#define PAGE_COPY_EXEC _MOD_PROT(pgprot_default, PTE_USER \| PTE_NG \| PTE_RDONLY)	69	#define PAGE_COPY_EXEC _MOD_PROT(pgprot_default, PTE_USER \| PTE_NG \| PTE_PXN \| PTE_RDONLY)
70	#define PAGE_READONLY _MOD_PROT(pgprot_default, PTE_USER \| PTE_NG \| PTE_XN \| PTE_RDONLY)	70	#define PAGE_READONLY _MOD_PROT(pgprot_default, PTE_USER \| PTE_NG \| PTE_PXN \| PTE_UXN \| PTE_RDONLY)
71	#define PAGE_READONLY_EXEC _MOD_PROT(pgprot_default, PTE_USER \| PTE_NG \| PTE_RDONLY)	71	#define PAGE_READONLY_EXEC _MOD_PROT(pgprot_default, PTE_USER \| PTE_NG \| PTE_PXN \| PTE_RDONLY)
72	#define PAGE_KERNEL _MOD_PROT(pgprot_default, PTE_XN \| PTE_DIRTY)	72	#define PAGE_KERNEL _MOD_PROT(pgprot_default, PTE_PXN \| PTE_UXN \| PTE_DIRTY)
73	#define PAGE_KERNEL_EXEC _MOD_PROT(pgprot_default, PTE_DIRTY)	73	#define PAGE_KERNEL_EXEC _MOD_PROT(pgprot_default, PTE_UXN \| PTE_DIRTY)
74		74
75	#define __PAGE_NONE __pgprot(_PAGE_DEFAULT \| PTE_NG \| PTE_XN \| PTE_RDONLY)	75	#define __PAGE_NONE __pgprot(_PAGE_DEFAULT \| PTE_NG \| PTE_PXN \| PTE_UXN \| PTE_RDONLY)
76	#define __PAGE_SHARED __pgprot(_PAGE_DEFAULT \| PTE_USER \| PTE_NG \| PTE_XN)	76	#define __PAGE_SHARED __pgprot(_PAGE_DEFAULT \| PTE_USER \| PTE_NG \| PTE_PXN \| PTE_UXN)
77	#define __PAGE_SHARED_EXEC __pgprot(_PAGE_DEFAULT \| PTE_USER \| PTE_NG)	77	#define __PAGE_SHARED_EXEC __pgprot(_PAGE_DEFAULT \| PTE_USER \| PTE_NG \| PTE_PXN)
78	#define __PAGE_COPY __pgprot(_PAGE_DEFAULT \| PTE_USER \| PTE_NG \| PTE_XN \| PTE_RDONLY)	78	#define __PAGE_COPY __pgprot(_PAGE_DEFAULT \| PTE_USER \| PTE_NG \| PTE_PXN \| PTE_UXN \| PTE_RDONLY)
79	#define __PAGE_COPY_EXEC __pgprot(_PAGE_DEFAULT \| PTE_USER \| PTE_NG \| PTE_RDONLY)	79	#define __PAGE_COPY_EXEC __pgprot(_PAGE_DEFAULT \| PTE_USER \| PTE_NG \| PTE_PXN \| PTE_RDONLY)
80	#define __PAGE_READONLY __pgprot(_PAGE_DEFAULT \| PTE_USER \| PTE_NG \| PTE_XN \| PTE_RDONLY)	80	#define __PAGE_READONLY __pgprot(_PAGE_DEFAULT \| PTE_USER \| PTE_NG \| PTE_PXN \| PTE_UXN \| PTE_RDONLY)
81	#define __PAGE_READONLY_EXEC __pgprot(_PAGE_DEFAULT \| PTE_USER \| PTE_NG \| PTE_RDONLY)	81	#define __PAGE_READONLY_EXEC __pgprot(_PAGE_DEFAULT \| PTE_USER \| PTE_NG \| PTE_PXN \| PTE_RDONLY)
82		82
83	#endif /* __ASSEMBLY__ */	83	#endif /* __ASSEMBLY__ */
84		84
@@ -130,10 +130,10 @@ extern struct page *empty_zero_page; · 45 unmodified lines
130	#define pte_young(pte) (pte_val(pte) & PTE_AF)	130	#define pte_young(pte) (pte_val(pte) & PTE_AF)
131	#define pte_special(pte) (pte_val(pte) & PTE_SPECIAL)	131	#define pte_special(pte) (pte_val(pte) & PTE_SPECIAL)
132	#define pte_write(pte) (!(pte_val(pte) & PTE_RDONLY))	132	#define pte_write(pte) (!(pte_val(pte) & PTE_RDONLY))
133	#define pte_exec(pte) (!(pte_val(pte) & PTE_XN))	133	#define pte_exec(pte) (!(pte_val(pte) & PTE_UXN))
134		134
135	#define pte_present_exec_user(pte) \	135	#define pte_present_exec_user(pte) \
136	((pte_val(pte) & (PTE_VALID \| PTE_USER \| PTE_XN)) == \	136	((pte_val(pte) & (PTE_VALID \| PTE_USER \| PTE_UXN)) == \
137	(PTE_VALID \| PTE_USER))	137	(PTE_VALID \| PTE_USER))
138		138
139	#define PTE_BIT_FUNC(fn,op) \	139	#define PTE_BIT_FUNC(fn,op) \
@@ -262,7 +262,7 @@ static inline pmd_t pmd_offset(pud_t pud, unsigned long addr) · 122 unmodified lines
262		262
263	static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)	263	static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
264	{	264	{
265	const pteval_t mask = PTE_USER \| PTE_XN \| PTE_RDONLY;	265	const pteval_t mask = PTE_USER \| PTE_PXN \| PTE_UXN \| PTE_RDONLY;
266	pte_val(pte) = (pte_val(pte) & ~mask) \| (pgprot_val(newprot) & mask);	266	pte_val(pte) = (pte_val(pte) & ~mask) \| (pgprot_val(newprot) & mask);
267	return pte;	267	return pte;
268	}	268	}

@@ -208,7 +208,7 @@ static unsigned long exynos5250_dwmmc_caps[4] = { · 207 unmodified lines
208	MMC_CAP_CMD23,	208	MMC_CAP_CMD23,
209	};	209	};
210		210
211	static struct dw_mci_drv_data exynos5250_drv_data = {	211	static const struct dw_mci_drv_data exynos5250_drv_data = {
212	.caps = exynos5250_dwmmc_caps,	212	.caps = exynos5250_dwmmc_caps,
213	.init = dw_mci_exynos_priv_init,	213	.init = dw_mci_exynos_priv_init,
214	.setup_clock = dw_mci_exynos_setup_clock,	214	.setup_clock = dw_mci_exynos_setup_clock,
@@ -220,14 +220,14 @@ static struct dw_mci_drv_data exynos5250_drv_data = { · 5 unmodified lines
220		220
221	static const struct of_device_id dw_mci_exynos_match[] = {	221	static const struct of_device_id dw_mci_exynos_match[] = {
222	{ .compatible = "samsung,exynos5250-dw-mshc",	222	{ .compatible = "samsung,exynos5250-dw-mshc",
223	.data = (void *)&exynos5250_drv_data, },	223	.data = &exynos5250_drv_data, },
224	{},	224	{},
225	};	225	};
226	MODULE_DEVICE_TABLE(of, dw_mci_pltfm_match);	226	MODULE_DEVICE_TABLE(of, dw_mci_exynos_match);
227		227
228	int dw_mci_exynos_probe(struct platform_device *pdev)	228	int dw_mci_exynos_probe(struct platform_device *pdev)
229	{	229	{
230	struct dw_mci_drv_data *drv_data;	230	const struct dw_mci_drv_data *drv_data;
231	const struct of_device_id *match;	231	const struct of_device_id *match;
232		232
233	match = of_match_node(dw_mci_exynos_match, pdev->dev.of_node);	233	match = of_match_node(dw_mci_exynos_match, pdev->dev.of_node);