In order to support virtualization usage via PCIe SRIOV, this patch adds two ioctls under FPGA Management Engine (FME) to release and assign back the port device. In order to safely turn Port from PF into VF and enable PCIe SRIOV, it requires user to invoke this PORT_RELEASE ioctl to release port firstly to remove userspace interfaces, and then configure the PF/VF access register in FME. After disable SRIOV, it requires user to invoke this PORT_ASSIGN ioctl to attach the port back to PF. Ioctl interfaces: * DFL_FPGA_FME_PORT_RELEASE Release platform device of given port, it deletes port platform device to remove related userspace interfaces on PF. After this function, then it's safe to configure PF/VF access mode to VF, and enable VFs via SRIOV. * DFL_FPGA_FME_PORT_ASSIGN Assign platform device of given port back to PF. After configure PF/VF access mode to PF, this ioctl adds port platform device back to re-enable related userspace interfaces on PF.
Showing the changes to include/uapi/linux (1 of 4 files). Show all
Unified · Split
| @@ -176,4 +176,22 @@ struct dfl_fpga_fme_port_pr { · 175 unmodified lines | |||
| 176 | 176 | ||
| 177 | #define DFL_FPGA_FME_PORT_PR _IO(DFL_FPGA_MAGIC, DFL_FME_BASE + 0) | 177 | #define DFL_FPGA_FME_PORT_PR _IO(DFL_FPGA_MAGIC, DFL_FME_BASE + 0) |
| 178 | 178 | ||
| 179 | /** | ||
| 180 | * DFL_FPGA_FME_PORT_RELEASE - _IOW(DFL_FPGA_MAGIC, DFL_FME_BASE + 1, | ||
| 181 | * int port_id) | ||
| 182 | * | ||
| 183 | * Driver releases the port per Port ID provided by caller. | ||
| 184 | * Return: 0 on success, -errno on failure. | ||
| 185 | */ | ||
| 186 | #define DFL_FPGA_FME_PORT_RELEASE _IOW(DFL_FPGA_MAGIC, DFL_FME_BASE + 1, int) | ||
| 187 | |||
| 188 | /** | ||
| 189 | * DFL_FPGA_FME_PORT_ASSIGN - _IOW(DFL_FPGA_MAGIC, DFL_FME_BASE + 2, | ||
| 190 | * int port_id) | ||
| 191 | * | ||
| 192 | * Driver assigns the port back per Port ID provided by caller. | ||
| 193 | * Return: 0 on success, -errno on failure. | ||
| 194 | */ | ||
| 195 | #define DFL_FPGA_FME_PORT_ASSIGN _IOW(DFL_FPGA_MAGIC, DFL_FME_BASE + 2, int) | ||
| 196 | |||
| 179 | #endif /* _UAPI_LINUX_FPGA_DFL_H */ | 197 | #endif /* _UAPI_LINUX_FPGA_DFL_H */ |