| @@ -583,7 +583,7 @@ static void pci_setup_bridge_io(struct pci_dev *bridge) · 582 unmodified lines |
| 583 | io_mask = PCI_IO_1K_RANGE_MASK; | 583 | io_mask = PCI_IO_1K_RANGE_MASK; |
| 584 | | 584 | |
| 585 | /* Set up the top and bottom of the PCI I/O segment for this bus */ | 585 | /* Set up the top and bottom of the PCI I/O segment for this bus */ |
| 586 | res = &bridge->resource[PCI_BRIDGE_RESOURCES + 0]; | 586 | res = &bridge->resource[PCI_BRIDGE_IO_WINDOW]; |
| 587 | pcibios_resource_to_bus(bridge->bus, ®ion, res); | 587 | pcibios_resource_to_bus(bridge->bus, ®ion, res); |
| 588 | if (res->flags & IORESOURCE_IO) { | 588 | if (res->flags & IORESOURCE_IO) { |
| 589 | pci_read_config_word(bridge, PCI_IO_BASE, &l); | 589 | pci_read_config_word(bridge, PCI_IO_BASE, &l); |
| @@ -613,7 +613,7 @@ static void pci_setup_bridge_mmio(struct pci_dev *bridge) · 23 unmodified lines |
| 613 | u32 l; | 613 | u32 l; |
| 614 | | 614 | |
| 615 | /* Set up the top and bottom of the PCI Memory segment for this bus */ | 615 | /* Set up the top and bottom of the PCI Memory segment for this bus */ |
| 616 | res = &bridge->resource[PCI_BRIDGE_RESOURCES + 1]; | 616 | res = &bridge->resource[PCI_BRIDGE_MEM_WINDOW]; |
| 617 | pcibios_resource_to_bus(bridge->bus, ®ion, res); | 617 | pcibios_resource_to_bus(bridge->bus, ®ion, res); |
| 618 | if (res->flags & IORESOURCE_MEM) { | 618 | if (res->flags & IORESOURCE_MEM) { |
| 619 | l = (region.start >> 16) & 0xfff0; | 619 | l = (region.start >> 16) & 0xfff0; |
| @@ -640,7 +640,7 @@ static void pci_setup_bridge_mmio_pref(struct pci_dev *bridge) · 20 unmodified lines |
| 640 | | 640 | |
| 641 | /* Set up PREF base/limit */ | 641 | /* Set up PREF base/limit */ |
| 642 | bu = lu = 0; | 642 | bu = lu = 0; |
| 643 | res = &bridge->resource[PCI_BRIDGE_RESOURCES + 2]; | 643 | res = &bridge->resource[PCI_BRIDGE_PREF_MEM_WINDOW]; |
| 644 | pcibios_resource_to_bus(bridge->bus, ®ion, res); | 644 | pcibios_resource_to_bus(bridge->bus, ®ion, res); |
| 645 | if (res->flags & IORESOURCE_PREFETCH) { | 645 | if (res->flags & IORESOURCE_PREFETCH) { |
| 646 | l = (region.start >> 16) & 0xfff0; | 646 | l = (region.start >> 16) & 0xfff0; |
| @@ -707,14 +707,14 @@ int pci_claim_bridge_resource(struct pci_dev *bridge, int i) · 60 unmodified lines |
| 707 | if (!pci_bus_clip_resource(bridge, i)) | 707 | if (!pci_bus_clip_resource(bridge, i)) |
| 708 | return -EINVAL; /* Clipping didn't change anything */ | 708 | return -EINVAL; /* Clipping didn't change anything */ |
| 709 | | 709 | |
| 710 | switch (i - PCI_BRIDGE_RESOURCES) { | 710 | switch (i) { |
| 711 | case 0: | 711 | case PCI_BRIDGE_IO_WINDOW: |
| 712 | pci_setup_bridge_io(bridge); | 712 | pci_setup_bridge_io(bridge); |
| 713 | break; | 713 | break; |
| 714 | case 1: | 714 | case PCI_BRIDGE_MEM_WINDOW: |
| 715 | pci_setup_bridge_mmio(bridge); | 715 | pci_setup_bridge_mmio(bridge); |
| 716 | break; | 716 | break; |
| 717 | case 2: | 717 | case PCI_BRIDGE_PREF_MEM_WINDOW: |
| 718 | pci_setup_bridge_mmio_pref(bridge); | 718 | pci_setup_bridge_mmio_pref(bridge); |
| 719 | break; | 719 | break; |
| 720 | default: | 720 | default: |
| @@ -735,18 +735,22 @@ int pci_claim_bridge_resource(struct pci_dev *bridge, int i) · 14 unmodified lines |
| 735 | static void pci_bridge_check_ranges(struct pci_bus *bus) | 735 | static void pci_bridge_check_ranges(struct pci_bus *bus) |
| 736 | { | 736 | { |
| 737 | struct pci_dev *bridge = bus->self; | 737 | struct pci_dev *bridge = bus->self; |
| 738 | struct resource *b_res = &bridge->resource[PCI_BRIDGE_RESOURCES]; | 738 | struct resource *b_res; |
| 739 | | 739 | |
| 740 | b_res[1].flags |= IORESOURCE_MEM; | 740 | b_res = &bridge->resource[PCI_BRIDGE_MEM_WINDOW]; |
| | 741 | b_res->flags |= IORESOURCE_MEM; |
| 741 | | 742 | |
| 742 | if (bridge->io_window) | 743 | if (bridge->io_window) { |
| 743 | b_res[0].flags |= IORESOURCE_IO; | 744 | b_res = &bridge->resource[PCI_BRIDGE_IO_WINDOW]; |
| | 745 | b_res->flags |= IORESOURCE_IO; |
| | 746 | } |
| 744 | | 747 | |
| 745 | if (bridge->pref_window) { | 748 | if (bridge->pref_window) { |
| 746 | b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH; | 749 | b_res = &bridge->resource[PCI_BRIDGE_PREF_MEM_WINDOW]; |
| | 750 | b_res->flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH; |
| 747 | if (bridge->pref_64_window) { | 751 | if (bridge->pref_64_window) { |
| 748 | b_res[2].flags |= IORESOURCE_MEM_64; | 752 | b_res->flags |= IORESOURCE_MEM_64 | |
| 749 | b_res[2].flags |= PCI_PREF_RANGE_TYPE_64; | 753 | PCI_PREF_RANGE_TYPE_64; |
| 750 | } | 754 | } |
| 751 | } | 755 | } |
| 752 | } | 756 | } |
| @@ -1105,35 +1109,37 @@ static void pci_bus_size_cardbus(struct pci_bus *bus, · 352 unmodified lines |
| 1105 | struct list_head *realloc_head) | 1109 | struct list_head *realloc_head) |
| 1106 | { | 1110 | { |
| 1107 | struct pci_dev *bridge = bus->self; | 1111 | struct pci_dev *bridge = bus->self; |
| 1108 | struct resource *b_res = &bridge->resource[PCI_BRIDGE_RESOURCES]; | 1112 | struct resource *b_res; |
| 1109 | resource_size_t b_res_3_size = pci_cardbus_mem_size * 2; | 1113 | resource_size_t b_res_3_size = pci_cardbus_mem_size * 2; |
| 1110 | u16 ctrl; | 1114 | u16 ctrl; |
| 1111 | | 1115 | |
| 1112 | if (b_res[0].parent) | 1116 | b_res = &bridge->resource[PCI_CB_BRIDGE_IO_0_WINDOW]; |
| | 1117 | if (b_res->parent) |
| 1113 | goto handle_b_res_1; | 1118 | goto handle_b_res_1; |
| 1114 | /* | 1119 | /* |
| 1115 | * Reserve some resources for CardBus. We reserve a fixed amount | 1120 | * Reserve some resources for CardBus. We reserve a fixed amount |
| 1116 | * of bus space for CardBus bridges. | 1121 | * of bus space for CardBus bridges. |
| 1117 | */ | 1122 | */ |
| 1118 | b_res[0].start = pci_cardbus_io_size; | 1123 | b_res->start = pci_cardbus_io_size; |
| 1119 | b_res[0].end = b_res[0].start + pci_cardbus_io_size - 1; | 1124 | b_res->end = b_res->start + pci_cardbus_io_size - 1; |
| 1120 | b_res[0].flags |= IORESOURCE_IO | IORESOURCE_STARTALIGN; | 1125 | b_res->flags |= IORESOURCE_IO | IORESOURCE_STARTALIGN; |
| 1121 | if (realloc_head) { | 1126 | if (realloc_head) { |
| 1122 | b_res[0].end -= pci_cardbus_io_size; | 1127 | b_res->end -= pci_cardbus_io_size; |
| 1123 | add_to_list(realloc_head, bridge, b_res, pci_cardbus_io_size, | 1128 | add_to_list(realloc_head, bridge, b_res, pci_cardbus_io_size, |
| 1124 | pci_cardbus_io_size); | 1129 | pci_cardbus_io_size); |
| 1125 | } | 1130 | } |
| 1126 | | 1131 | |
| 1127 | handle_b_res_1: | 1132 | handle_b_res_1: |
| 1128 | if (b_res[1].parent) | 1133 | b_res = &bridge->resource[PCI_CB_BRIDGE_IO_1_WINDOW]; |
| | 1134 | if (b_res->parent) |
| 1129 | goto handle_b_res_2; | 1135 | goto handle_b_res_2; |
| 1130 | b_res[1].start = pci_cardbus_io_size; | 1136 | b_res->start = pci_cardbus_io_size; |
| 1131 | b_res[1].end = b_res[1].start + pci_cardbus_io_size - 1; | 1137 | b_res->end = b_res->start + pci_cardbus_io_size - 1; |
| 1132 | b_res[1].flags |= IORESOURCE_IO | IORESOURCE_STARTALIGN; | 1138 | b_res->flags |= IORESOURCE_IO | IORESOURCE_STARTALIGN; |
| 1133 | if (realloc_head) { | 1139 | if (realloc_head) { |
| 1134 | b_res[1].end -= pci_cardbus_io_size; | 1140 | b_res->end -= pci_cardbus_io_size; |
| 1135 | add_to_list(realloc_head, bridge, b_res+1, pci_cardbus_io_size, | 1141 | add_to_list(realloc_head, bridge, b_res, pci_cardbus_io_size, |
| 1136 | pci_cardbus_io_size); | 1142 | pci_cardbus_io_size); |
| 1137 | } | 1143 | } |
| 1138 | | 1144 | |
| 1139 | handle_b_res_2: | 1145 | handle_b_res_2: |
| @@ -1153,21 +1159,22 @@ handle_b_res_2: · 13 unmodified lines |
| 1153 | pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl); | 1159 | pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl); |
| 1154 | } | 1160 | } |
| 1155 | | 1161 | |
| 1156 | if (b_res[2].parent) | 1162 | b_res = &bridge->resource[PCI_CB_BRIDGE_MEM_0_WINDOW]; |
| | 1163 | if (b_res->parent) |
| 1157 | goto handle_b_res_3; | 1164 | goto handle_b_res_3; |
| 1158 | /* | 1165 | /* |
| 1159 | * If we have prefetchable memory support, allocate two regions. | 1166 | * If we have prefetchable memory support, allocate two regions. |
| 1160 | * Otherwise, allocate one region of twice the size. | 1167 | * Otherwise, allocate one region of twice the size. |
| 1161 | */ | 1168 | */ |
| 1162 | if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0) { | 1169 | if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0) { |
| 1163 | b_res[2].start = pci_cardbus_mem_size; | 1170 | b_res->start = pci_cardbus_mem_size; |
| 1164 | b_res[2].end = b_res[2].start + pci_cardbus_mem_size - 1; | 1171 | b_res->end = b_res->start + pci_cardbus_mem_size - 1; |
| 1165 | b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH | | 1172 | b_res->flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH | |
| 1166 | IORESOURCE_STARTALIGN; | 1173 | IORESOURCE_STARTALIGN; |
| 1167 | if (realloc_head) { | 1174 | if (realloc_head) { |
| 1168 | b_res[2].end -= pci_cardbus_mem_size; | 1175 | b_res->end -= pci_cardbus_mem_size; |
| 1169 | add_to_list(realloc_head, bridge, b_res+2, | 1176 | add_to_list(realloc_head, bridge, b_res, |
| 1170 | pci_cardbus_mem_size, pci_cardbus_mem_size); | 1177 | pci_cardbus_mem_size, pci_cardbus_mem_size); |
| 1171 | } | 1178 | } |
| 1172 | | 1179 | |
| 1173 | /* Reduce that to half */ | 1180 | /* Reduce that to half */ |
| @@ -1175,15 +1182,16 @@ handle_b_res_2: · 1 unmodified line |
| 1175 | } | 1182 | } |
| 1176 | | 1183 | |
| 1177 | handle_b_res_3: | 1184 | handle_b_res_3: |
| 1178 | if (b_res[3].parent) | 1185 | b_res = &bridge->resource[PCI_CB_BRIDGE_MEM_1_WINDOW]; |
| | 1186 | if (b_res->parent) |
| 1179 | goto handle_done; | 1187 | goto handle_done; |
| 1180 | b_res[3].start = pci_cardbus_mem_size; | 1188 | b_res->start = pci_cardbus_mem_size; |
| 1181 | b_res[3].end = b_res[3].start + b_res_3_size - 1; | 1189 | b_res->end = b_res->start + b_res_3_size - 1; |
| 1182 | b_res[3].flags |= IORESOURCE_MEM | IORESOURCE_STARTALIGN; | 1190 | b_res->flags |= IORESOURCE_MEM | IORESOURCE_STARTALIGN; |
| 1183 | if (realloc_head) { | 1191 | if (realloc_head) { |
| 1184 | b_res[3].end -= b_res_3_size; | 1192 | b_res->end -= b_res_3_size; |
| 1185 | add_to_list(realloc_head, bridge, b_res+3, b_res_3_size, | 1193 | add_to_list(realloc_head, bridge, b_res, b_res_3_size, |
| 1186 | pci_cardbus_mem_size); | 1194 | pci_cardbus_mem_size); |
| 1187 | } | 1195 | } |
| 1188 | | 1196 | |
| 1189 | handle_done: | 1197 | handle_done: |
| @@ -1227,7 +1235,7 @@ void __pci_bus_size_bridges(struct pci_bus *bus, struct list_head *realloc_head) · 37 unmodified lines |
| 1227 | break; | 1235 | break; |
| 1228 | hdr_type = -1; /* Intentionally invalid - not a PCI device. */ | 1236 | hdr_type = -1; /* Intentionally invalid - not a PCI device. */ |
| 1229 | } else { | 1237 | } else { |
| 1230 | pref = &bus->self->resource[PCI_BRIDGE_RESOURCES + 2]; | 1238 | pref = &bus->self->resource[PCI_BRIDGE_PREF_MEM_WINDOW]; |
| 1231 | hdr_type = bus->self->hdr_type; | 1239 | hdr_type = bus->self->hdr_type; |
| 1232 | } | 1240 | } |
| 1233 | | 1241 | |
| @@ -1885,9 +1893,9 @@ static void pci_bus_distribute_available_resources(struct pci_bus *bus, · 651 unmodified lines |
| 1885 | struct pci_dev *dev, *bridge = bus->self; | 1893 | struct pci_dev *dev, *bridge = bus->self; |
| 1886 | resource_size_t io_per_hp, mmio_per_hp, mmio_pref_per_hp, align; | 1894 | resource_size_t io_per_hp, mmio_per_hp, mmio_pref_per_hp, align; |
| 1887 | | 1895 | |
| 1888 | io_res = &bridge->resource[PCI_BRIDGE_RESOURCES + 0]; | 1896 | io_res = &bridge->resource[PCI_BRIDGE_IO_WINDOW]; |
| 1889 | mmio_res = &bridge->resource[PCI_BRIDGE_RESOURCES + 1]; | 1897 | mmio_res = &bridge->resource[PCI_BRIDGE_MEM_WINDOW]; |
| 1890 | mmio_pref_res = &bridge->resource[PCI_BRIDGE_RESOURCES + 2]; | 1898 | mmio_pref_res = &bridge->resource[PCI_BRIDGE_PREF_MEM_WINDOW]; |
| 1891 | | 1899 | |
| 1892 | /* | 1900 | /* |
| 1893 | * The alignment of this bridge is yet to be considered, hence it must | 1901 | * The alignment of this bridge is yet to be considered, hence it must |
| @@ -1960,21 +1968,21 @@ static void pci_bus_distribute_available_resources(struct pci_bus *bus, · 66 unmodified lines |
| 1960 | * Reduce the available resource space by what the | 1968 | * Reduce the available resource space by what the |
| 1961 | * bridge and devices below it occupy. | 1969 | * bridge and devices below it occupy. |
| 1962 | */ | 1970 | */ |
| 1963 | res = &dev->resource[PCI_BRIDGE_RESOURCES + 0]; | 1971 | res = &dev->resource[PCI_BRIDGE_IO_WINDOW]; |
| 1964 | align = pci_resource_alignment(dev, res); | 1972 | align = pci_resource_alignment(dev, res); |
| 1965 | align = align ? ALIGN(io.start, align) - io.start : 0; | 1973 | align = align ? ALIGN(io.start, align) - io.start : 0; |
| 1966 | used_size = align + resource_size(res); | 1974 | used_size = align + resource_size(res); |
| 1967 | if (!res->parent) | 1975 | if (!res->parent) |
| 1968 | io.start = min(io.start + used_size, io.end + 1); | 1976 | io.start = min(io.start + used_size, io.end + 1); |
| 1969 | | 1977 | |
| 1970 | res = &dev->resource[PCI_BRIDGE_RESOURCES + 1]; | 1978 | res = &dev->resource[PCI_BRIDGE_MEM_WINDOW]; |
| 1971 | align = pci_resource_alignment(dev, res); | 1979 | align = pci_resource_alignment(dev, res); |
| 1972 | align = align ? ALIGN(mmio.start, align) - mmio.start : 0; | 1980 | align = align ? ALIGN(mmio.start, align) - mmio.start : 0; |
| 1973 | used_size = align + resource_size(res); | 1981 | used_size = align + resource_size(res); |
| 1974 | if (!res->parent) | 1982 | if (!res->parent) |
| 1975 | mmio.start = min(mmio.start + used_size, mmio.end + 1); | 1983 | mmio.start = min(mmio.start + used_size, mmio.end + 1); |
| 1976 | | 1984 | |
| 1977 | res = &dev->resource[PCI_BRIDGE_RESOURCES + 2]; | 1985 | res = &dev->resource[PCI_BRIDGE_PREF_MEM_WINDOW]; |
| 1978 | align = pci_resource_alignment(dev, res); | 1986 | align = pci_resource_alignment(dev, res); |
| 1979 | align = align ? ALIGN(mmio_pref.start, align) - | 1987 | align = align ? ALIGN(mmio_pref.start, align) - |
| 1980 | mmio_pref.start : 0; | 1988 | mmio_pref.start : 0; |
| @@ -2027,9 +2035,9 @@ static void pci_bridge_distribute_available_resources(struct pci_dev *bridge, · 46 unmodified lines |
| 2027 | return; | 2035 | return; |
| 2028 | | 2036 | |
| 2029 | /* Take the initial extra resources from the hotplug port */ | 2037 | /* Take the initial extra resources from the hotplug port */ |
| 2030 | available_io = bridge->resource[PCI_BRIDGE_RESOURCES + 0]; | 2038 | available_io = bridge->resource[PCI_BRIDGE_IO_WINDOW]; |
| 2031 | available_mmio = bridge->resource[PCI_BRIDGE_RESOURCES + 1]; | 2039 | available_mmio = bridge->resource[PCI_BRIDGE_MEM_WINDOW]; |
| 2032 | available_mmio_pref = bridge->resource[PCI_BRIDGE_RESOURCES + 2]; | 2040 | available_mmio_pref = bridge->resource[PCI_BRIDGE_PREF_MEM_WINDOW]; |
| 2033 | | 2041 | |
| 2034 | pci_bus_distribute_available_resources(bridge->subordinate, | 2042 | pci_bus_distribute_available_resources(bridge->subordinate, |
| 2035 | add_list, available_io, | 2043 | add_list, available_io, |