History

Merge branch 'core/percpu' into percpu-cpumask-x86-for-linus-2

Conflicts: arch/parisc/kernel/irq.c arch/x86/include/asm/fixmap_64.h arch/x86/include/asm/setup.h kernel/irq/handle.c Semantic merge: arch/x86/include/asm/fixmap.h

Ingo Molnar committed 17 years ago

Commit 6e15cf02 parents be0ea69 60db564465 files · +17559 −17715Browse files

Unified · Split

465 files
  1. Documentation/cputopology.txt +3 −3
  2. Documentation/kernel-parameters.txt +6 −1
  3. Documentation/x86/boot.txt +11 −7
  4. Makefile +2 −1
  5. arch/alpha/kernel/irq.c +1 −1
  6. arch/alpha/mm/init.c +13 −7
  7. arch/arm/kernel/irq.c +12 −6
  8. arch/arm/kernel/vmlinux.lds.S +2 −0
  9. arch/arm/oprofile/op_model_mpcore.c +1 −1
  10. arch/avr32/Kconfig +1 −1
  11. arch/blackfin/include/asm/percpu.h +0 −10
  12. arch/blackfin/kernel/irqchip.c +5 −0
  13. arch/ia64/include/asm/percpu.h +2 −2
  14. arch/ia64/include/asm/topology.h +1 −1
  15. arch/ia64/include/asm/uv/uv.h +13 −0
  16. arch/ia64/kernel/acpi.c +4 −0
  17. arch/ia64/kernel/iosapic.c +1 −1
  18. arch/ia64/kernel/irq.c +2 −2
  19. arch/ia64/kernel/irq_ia64.c +8 −4
  20. arch/ia64/kernel/msi_ia64.c +2 −2
  21. arch/ia64/kernel/vmlinux.lds.S +2 −9
  22. arch/ia64/sn/kernel/msi_sn.c +1 −1
  23. arch/mips/include/asm/irq.h +1 −1
  24. arch/mips/kernel/irq-gic.c +1 −1
  25. arch/mips/kernel/smtc.c +4 −2
  26. arch/mips/mti-malta/malta-smtc.c +3 −2
  27. arch/mips/sgi-ip22/ip22-int.c +1 −1
  28. arch/mips/sgi-ip22/ip22-time.c +1 −1
  29. arch/mips/sibyte/bcm1480/smp.c +2 −1
  30. arch/mips/sibyte/sb1250/smp.c +2 −1
  31. arch/mn10300/kernel/mn10300-watchdog.c +2 −1
  32. arch/parisc/kernel/irq.c +1 −1
  33. arch/powerpc/kernel/irq.c +1 −1
  34. arch/powerpc/kernel/vmlinux.lds.S +1 −7
  35. arch/powerpc/platforms/pseries/xics.c +3 −2
  36. arch/powerpc/sysdev/mpic.c +2 −1
  37. arch/sparc/kernel/irq_64.c +3 −2
  38. arch/sparc/kernel/time_64.c +1 −1
  39. arch/x86/Kconfig +340 −317
  40. arch/x86/Kconfig.cpu +39 −41
  41. arch/x86/Kconfig.debug +25 −25
  42. arch/x86/Makefile +10 −33
  43. arch/x86/boot/Makefile +0 −1
  44. arch/x86/boot/a20.c +40 −39
  45. arch/x86/boot/boot.h +0 −3
  46. arch/x86/boot/compressed/Makefile +19 −2
  47. arch/x86/boot/compressed/head_32.S +4 −4
  48. arch/x86/boot/compressed/head_64.S +4 −6
  49. arch/x86/boot/compressed/misc.c +14 −104
  50. arch/x86/boot/copy.S +14 −26
  51. arch/x86/boot/header.S +1 −1
  52. arch/x86/boot/main.c +0 −5
  53. arch/x86/boot/pmjump.S +5 −11
  54. arch/x86/boot/voyager.c +0 −40
  55. arch/x86/configs/i386_defconfig +330 −89
  56. arch/x86/configs/x86_64_defconfig +338 −87
  57. arch/x86/ia32/ia32_signal.c +207 −198
  58. arch/x86/ia32/ia32entry.S +4 −4
  59. arch/x86/include/asm/a.out-core.h +1 −1
  60. arch/x86/include/asm/acpi.h +0 −3
  61. arch/x86/include/asm/apic.h +404 −38
  62. arch/x86/include/asm/apicnum.h +12 −0
  63. arch/x86/include/asm/apm.h +0 −0
  64. arch/x86/include/asm/arch_hooks.h +0 −26
  65. arch/x86/include/asm/bigsmp/apic.h +0 −155
  66. arch/x86/include/asm/bigsmp/apicdef.h +0 −13
  67. arch/x86/include/asm/bigsmp/ipi.h +0 −22
  68. arch/x86/include/asm/boot.h +15 −1
  69. arch/x86/include/asm/cacheflush.h +36 −17
  70. arch/x86/include/asm/calling.h +53 −3
  71. arch/x86/include/asm/cpu.h +17 −0
  72. arch/x86/include/asm/cpumask.h +32 −0
  73. arch/x86/include/asm/current.h +3 −21
  74. arch/x86/include/asm/do_timer.h +0 −0
  75. arch/x86/include/asm/elf.h +13 −2
  76. arch/x86/include/asm/entry_arch.h +23 −2
  77. arch/x86/include/asm/es7000/apic.h +0 −242
  78. arch/x86/include/asm/es7000/apicdef.h +0 −13
  79. arch/x86/include/asm/es7000/ipi.h +0 −22
  80. arch/x86/include/asm/es7000/mpparse.h +0 −29
  81. arch/x86/include/asm/es7000/wakecpu.h +0 −37
  82. arch/x86/include/asm/fixmap.h +137 −2
  83. arch/x86/include/asm/fixmap_32.h +0 −119
  84. arch/x86/include/asm/fixmap_64.h +0 −79
  85. arch/x86/include/asm/genapic.h +1 −5
  86. arch/x86/include/asm/genapic_32.h +0 −148
  87. arch/x86/include/asm/genapic_64.h +0 −66
  88. arch/x86/include/asm/hardirq.h +45 −4
  89. arch/x86/include/asm/hardirq_32.h +0 −30
  90. arch/x86/include/asm/hardirq_64.h +0 −25
  91. arch/x86/include/asm/hw_irq.h +2 −22
  92. arch/x86/include/asm/i8259.h +4 −0
  93. arch/x86/include/asm/io.h +95 −2
  94. arch/x86/include/asm/io_32.h +0 −88
  95. arch/x86/include/asm/io_64.h +0 −61
  96. arch/x86/include/asm/io_apic.h +8 −33
  97. arch/x86/include/asm/ipi.h +40 −35
  98. arch/x86/include/asm/irq.h +3 −1
  99. arch/x86/include/asm/irq_regs.h +31 −5
  100. arch/x86/include/asm/irq_regs_32.h +0 −31
  101. arch/x86/include/asm/irq_regs_64.h +0 −1
  102. arch/x86/include/asm/irq_vectors.h +105 −104
  103. arch/x86/include/asm/kexec.h +9 −18
  104. arch/x86/include/asm/linkage.h +4 −60
  105. arch/x86/include/asm/mach-default/mach_apic.h +0 −168
  106. arch/x86/include/asm/mach-default/mach_apicdef.h +0 −24
  107. arch/x86/include/asm/mach-default/mach_ipi.h +0 −64
  108. arch/x86/include/asm/mach-default/mach_mpparse.h +0 −17
  109. arch/x86/include/asm/mach-default/mach_mpspec.h +0 −12
  110. arch/x86/include/asm/mach-default/mach_wakecpu.h +0 −41
  111. arch/x86/include/asm/mach-generic/gpio.h +0 −15
  112. arch/x86/include/asm/mach-generic/mach_apic.h +0 −35
  113. arch/x86/include/asm/mach-generic/mach_apicdef.h +0 −11
  114. arch/x86/include/asm/mach-generic/mach_ipi.h +0 −10
  115. arch/x86/include/asm/mach-generic/mach_mpparse.h +0 −9
  116. arch/x86/include/asm/mach-generic/mach_mpspec.h +0 −12
  117. arch/x86/include/asm/mach-generic/mach_wakecpu.h +0 −12
  118. arch/x86/include/asm/mach-rdc321x/gpio.h +0 −60
  119. arch/x86/include/asm/mach-voyager/do_timer.h +0 −17
  120. arch/x86/include/asm/mach-voyager/entry_arch.h +0 −26
  121. arch/x86/include/asm/mach-voyager/setup_arch.h +0 −12
  122. arch/x86/include/asm/mach_timer.h +0 −0
  123. arch/x86/include/asm/mach_traps.h +0 −0
  124. arch/x86/include/asm/mmu_context.h +59 −4
  125. arch/x86/include/asm/mmu_context_32.h +0 −55
  126. arch/x86/include/asm/mmu_context_64.h +0 −54
  127. arch/x86/include/asm/mmzone_32.h +3 −40
  128. arch/x86/include/asm/mpspec.h +26 −7
  129. arch/x86/include/asm/mpspec_def.h +12 −11
  130. arch/x86/include/asm/numa_32.h +5 −1
  131. arch/x86/include/asm/numaq.h +2 −0
  132. arch/x86/include/asm/numaq/apic.h +0 −142
  133. arch/x86/include/asm/numaq/apicdef.h +0 −14
  134. arch/x86/include/asm/numaq/ipi.h +0 −22
  135. arch/x86/include/asm/numaq/mpparse.h +0 −6
  136. arch/x86/include/asm/numaq/wakecpu.h +0 −45
  137. arch/x86/include/asm/page.h +4 −148
  138. arch/x86/include/asm/page_32.h +1 −86
  139. arch/x86/include/asm/page_32_types.h +60 −0
  140. arch/x86/include/asm/page_64.h +1 −100
  141. arch/x86/include/asm/page_64_types.h +89 −0
  142. arch/x86/include/asm/page_types.h +57 −0
  143. arch/x86/include/asm/paravirt.h +307 −158
  144. arch/x86/include/asm/pat.h +2 −3
  145. arch/x86/include/asm/pci-functions.h +0 −0
  146. arch/x86/include/asm/pda.h +0 −137
  147. arch/x86/include/asm/percpu.h +78 −91
  148. arch/x86/include/asm/pgtable-2level.h +0 −2
  149. arch/x86/include/asm/pgtable-2level_types.h +17 −0
  150. arch/x86/include/asm/pgtable-3level.h +0 −35
  151. arch/x86/include/asm/pgtable-3level_types.h +20 −0
  152. arch/x86/include/asm/pgtable.h +258 −251
  153. arch/x86/include/asm/pgtable_32.h +1 −87
  154. arch/x86/include/asm/pgtable_32_types.h +46 −0
  155. arch/x86/include/asm/pgtable_64.h +2 −111
  156. arch/x86/include/asm/pgtable_64_types.h +63 −0
  157. arch/x86/include/asm/pgtable_types.h +328 −0
  158. arch/x86/include/asm/processor.h +31 −14
  159. arch/x86/include/asm/proto.h +0 −4
  160. arch/x86/include/asm/ptrace.h +2 −2
  161. arch/x86/include/asm/rdc321x_defs.h +0 −0
  162. arch/x86/include/asm/segment.h +8 −1
  163. arch/x86/include/asm/setup.h +14 −5
  164. arch/x86/include/asm/setup_arch.h +0 −0
  165. arch/x86/include/asm/smp.h +3 −66
  166. arch/x86/include/asm/smpboot_hooks.h +3 −3
  167. arch/x86/include/asm/spinlock.h +3 −66
  168. arch/x86/include/asm/stackprotector.h +124 −0
  169. arch/x86/include/asm/summit/apic.h +0 −202
  170. arch/x86/include/asm/summit/apicdef.h +0 −13
  171. arch/x86/include/asm/summit/ipi.h +0 −26
  172. arch/x86/include/asm/summit/mpparse.h +0 −109
  173. arch/x86/include/asm/syscalls.h +11 −11
  174. arch/x86/include/asm/system.h +64 −6
  175. arch/x86/include/asm/thread_info.h +9 −12
  176. arch/x86/include/asm/timer.h +3 −1
  177. arch/x86/include/asm/tlbflush.h +8 −9
  178. arch/x86/include/asm/topology.h +23 −8
  179. arch/x86/include/asm/trampoline.h +1 −0
  180. arch/x86/include/asm/traps.h +1 −1
  181. arch/x86/include/asm/uaccess.h +130 −8
  182. arch/x86/include/asm/uaccess_64.h +5 −5
  183. arch/x86/include/asm/uv/uv.h +33 −0
  184. arch/x86/include/asm/uv/uv_bau.h +0 −1
  185. arch/x86/include/asm/vic.h +0 −61
  186. arch/x86/include/asm/voyager.h +0 −529
  187. arch/x86/include/asm/xen/events.h +0 −6
  188. arch/x86/include/asm/xen/hypervisor.h +18 −10
  189. arch/x86/include/asm/xen/page.h +1 −0
  190. arch/x86/kernel/Makefile +18 −24
  191. arch/x86/kernel/acpi/boot.c +73 −96
  192. arch/x86/kernel/acpi/realmode/wakeup.S +2 −2
  193. arch/x86/kernel/acpi/sleep.c +1 −0
  194. arch/x86/kernel/acpi/wakeup_32.S +1 −1
  195. arch/x86/kernel/acpi/wakeup_64.S +2 −2
  196. arch/x86/kernel/alternative.c +3 −3
  197. arch/x86/kernel/apic/Makefile +19 −0
  198. arch/x86/kernel/apic/apic.c +140 −159
  199. arch/x86/kernel/apic/apic_flat_64.c +136 −56
  200. arch/x86/kernel/apic/bigsmp_32.c +267 −0
  201. arch/x86/kernel/apic/es7000_32.c +780 −0
  202. arch/x86/kernel/apic/io_apic.c +217 −226
  203. arch/x86/kernel/apic/ipi.c +164 −0
  204. arch/x86/kernel/apic/nmi.c +2 −10
  205. arch/x86/kernel/apic/numaq_32.c +557 −0
  206. arch/x86/kernel/apic/probe_32.c +284 −0
  207. arch/x86/kernel/apic/probe_64.c +33 −22
  208. arch/x86/kernel/apic/summit_32.c +579 −0
  209. arch/x86/kernel/apic/x2apic_cluster.c +97 −56
  210. arch/x86/kernel/apic/x2apic_phys.c +92 −58
  211. arch/x86/kernel/apic/x2apic_uv_x.c +104 −57
  212. arch/x86/kernel/apm_32.c +1 −1
  213. arch/x86/kernel/asm-offsets_32.c +1 −0
  214. arch/x86/kernel/asm-offsets_64.c +0 −11
  215. arch/x86/kernel/cpu/addon_cpuid_features.c +6 −48
  216. arch/x86/kernel/cpu/amd.c +0 −2
  217. arch/x86/kernel/cpu/common.c +139 −118
  218. arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c +1 −1
  219. arch/x86/kernel/cpu/cpufreq/e_powersaver.c +3 −3
  220. arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c +3 −3
  221. arch/x86/kernel/cpu/intel.c +14 −3
  222. arch/x86/kernel/cpu/intel_cacheinfo.c +44 −19
  223. arch/x86/kernel/cpu/mcheck/mce_amd_64.c +14 −7
  224. arch/x86/kernel/cpu/mcheck/mce_intel_64.c +4 −3
  225. arch/x86/kernel/cpu/mcheck/p4.c +2 −2
  226. arch/x86/kernel/cpu/perfctr-watchdog.c +1 −1
  227. arch/x86/kernel/cpu/proc.c +2 −18
  228. arch/x86/kernel/crash.c +1 −3
  229. arch/x86/kernel/dumpstack.c +1 −1
  230. arch/x86/kernel/dumpstack_64.c +18 −17
  231. arch/x86/kernel/e820.c +3 −0
  232. arch/x86/kernel/early_printk.c +1 −1
  233. arch/x86/kernel/efi.c +2 −0
  234. arch/x86/kernel/efi_64.c +1 −0
  235. arch/x86/kernel/efi_stub_32.S +2 −1
  236. arch/x86/kernel/efi_stub_64.S +7 −0
  237. arch/x86/kernel/entry_32.S +290 −165
  238. arch/x86/kernel/entry_64.S +35 −37
  239. arch/x86/kernel/es7000_32.c +0 −378
  240. arch/x86/kernel/head64.c +0 −23
  241. arch/x86/kernel/head_32.S +29 −15
  242. arch/x86/kernel/head_64.S +14 −9
  243. arch/x86/kernel/i8259.c +0 −1
  244. arch/x86/kernel/ioport.c +1 −13
  245. arch/x86/kernel/ipi.c +0 −190
  246. arch/x86/kernel/irq.c +39 −5
  247. arch/x86/kernel/irq_32.c +21 −40
  248. arch/x86/kernel/irq_64.c +13 −30
  249. arch/x86/kernel/irqinit_32.c +28 −8
  250. arch/x86/kernel/kgdb.c +2 −2
  251. arch/x86/kernel/kvmclock.c +0 −1
  252. arch/x86/kernel/machine_kexec_32.c +1 −1
  253. arch/x86/kernel/machine_kexec_64.c +55 −27
  254. arch/x86/kernel/mca_32.c +1 −4
  255. arch/x86/kernel/microcode_intel.c +5 −5
  256. arch/x86/kernel/module_32.c +3 −3
  257. arch/x86/kernel/module_64.c +16 −16
  258. arch/x86/kernel/mpparse.c +92 −97
  259. arch/x86/kernel/msr.c +1 −1
  260. arch/x86/kernel/numaq_32.c +0 −293
  261. arch/x86/kernel/paravirt-spinlocks.c +0 −10
  262. arch/x86/kernel/paravirt.c +41 −15
  263. arch/x86/kernel/paravirt_patch_32.c +12 −0
  264. arch/x86/kernel/paravirt_patch_64.c +15 −0
  265. arch/x86/kernel/probe_roms_32.c +1 −1
  266. arch/x86/kernel/process.c +191 −2
  267. arch/x86/kernel/process_32.c +29 −212
  268. arch/x86/kernel/process_64.c +25 −205
  269. arch/x86/kernel/ptrace.c +8 −13
  270. arch/x86/kernel/reboot.c +2 −3
  271. arch/x86/kernel/relocate_kernel_32.S +1 −1
  272. arch/x86/kernel/relocate_kernel_64.S +5 −124
  273. arch/x86/kernel/setup.c +112 −27
  274. arch/x86/kernel/setup_percpu.c +358 −321
  275. arch/x86/kernel/signal.c +218 −245
  276. arch/x86/kernel/smp.c +7 −8
  277. arch/x86/kernel/smpboot.c +43 −104
  278. arch/x86/kernel/smpcommon.c +0 −30
  279. arch/x86/kernel/stacktrace.c +1 −1
  280. arch/x86/kernel/summit_32.c +0 −188
  281. arch/x86/kernel/syscall_table_32.S +10 −10
  282. arch/x86/kernel/time_32.c +4 −4
  283. arch/x86/kernel/tlb_32.c +0 −256
  284. arch/x86/kernel/tlb_uv.c +40 −32
  285. arch/x86/kernel/trampoline_32.S +1 −1
  286. arch/x86/kernel/trampoline_64.S +11 −12
  287. arch/x86/kernel/traps.c +9 −55
  288. arch/x86/kernel/tsc.c +1 −1
  289. arch/x86/kernel/visws_quirks.c +2 −8
  290. arch/x86/kernel/vm86_32.c +10 −10
  291. arch/x86/kernel/vmi_32.c +7 −6
  292. arch/x86/kernel/vmiclock_32.c +2 −4
  293. arch/x86/kernel/vmlinux_32.lds.S +2 −9
  294. arch/x86/kernel/vmlinux_64.lds.S +34 −3
  295. arch/x86/kernel/vsmp_64.c +9 −15
  296. arch/x86/kernel/x8664_ksyms_64.c +0 −2
  297. arch/x86/lguest/Kconfig +0 −1
  298. arch/x86/lguest/boot.c +19 −13
  299. arch/x86/lib/getuser.S +1 −1
  300. arch/x86/mach-default/Makefile +0 −5
  301. arch/x86/mach-default/setup.c +0 −174
  302. arch/x86/mach-generic/Makefile +0 −11
  303. arch/x86/mach-generic/bigsmp.c +0 −60
  304. arch/x86/mach-generic/default.c +0 −27
  305. arch/x86/mach-generic/es7000.c +0 −103
  306. arch/x86/mach-generic/numaq.c +0 −53
  307. arch/x86/mach-generic/probe.c +0 −152
  308. arch/x86/mach-generic/summit.c +0 −40
  309. arch/x86/mach-rdc321x/Makefile +0 −5
  310. arch/x86/mach-rdc321x/gpio.c +0 −194
  311. arch/x86/mach-rdc321x/platform.c +0 −69
  312. arch/x86/mach-voyager/Makefile +0 −8
  313. arch/x86/mach-voyager/setup.c +0 −118
  314. arch/x86/mach-voyager/voyager_basic.c +0 −317
  315. arch/x86/mach-voyager/voyager_cat.c +0 −1197
  316. arch/x86/mach-voyager/voyager_smp.c +0 −1807
  317. arch/x86/mach-voyager/voyager_thread.c +0 −128
  318. arch/x86/math-emu/get_address.c +2 −4
  319. arch/x86/mm/Makefile +3 −1
  320. arch/x86/mm/extable.c +6 −0
  321. arch/x86/mm/fault.c +772 −561
  322. arch/x86/mm/highmem_32.c +34 −0
  323. arch/x86/mm/init.c +49 −0
  324. arch/x86/mm/init_32.c +99 −114
  325. arch/x86/mm/init_64.c +53 −56
  326. arch/x86/mm/ioremap.c +1 −1
  327. arch/x86/mm/memtest.c +81 −75
  328. arch/x86/mm/mmap.c +1 −1
  329. arch/x86/mm/numa_32.c +1 −27
  330. arch/x86/mm/numa_64.c +217 −0
  331. arch/x86/mm/pageattr.c +7 −0
  332. arch/x86/mm/pat.c +49 −28
  333. arch/x86/mm/pgtable.c +18 −0
  334. arch/x86/mm/pgtable_32.c +2 −16
  335. arch/x86/mm/srat_64.c +2 −1
  336. arch/x86/mm/tlb.c +67 −56
  337. arch/x86/pci/numaq_32.c +1 −5
  338. arch/x86/pci/pcbios.c +1 −1
  339. arch/x86/power/hibernate_asm_32.S +1 −1
  340. arch/x86/power/hibernate_asm_64.S +1 −1
  341. arch/x86/vdso/Makefile +1 −1
  342. arch/x86/vdso/vma.c +2 −2
  343. arch/x86/xen/Kconfig +1 −1
  344. arch/x86/xen/Makefile +2 −1
  345. arch/x86/xen/enlighten.c +43 −773
  346. arch/x86/xen/irq.c +15 −24
  347. arch/x86/xen/mmu.c +751 −6
  348. arch/x86/xen/mmu.h +3 −0
  349. arch/x86/xen/multicalls.c +10 −5
  350. arch/x86/xen/multicalls.h +1 −1
  351. arch/x86/xen/smp.c +16 −31
  352. arch/x86/xen/suspend.c +1 −0
  353. arch/x86/xen/xen-asm.S +142 −0
  354. arch/x86/xen/xen-asm.h +12 −0
  355. arch/x86/xen/xen-asm_32.S +133 −210
  356. arch/x86/xen/xen-asm_64.S +63 −189
  357. arch/x86/xen/xen-head.S +1 −1
  358. arch/x86/xen/xen-ops.h +10 −0
  359. block/blktrace.c +1 −1
  360. drivers/acpi/acpica/tbxface.c +14 −3
  361. drivers/acpi/osl.c +10 −3
  362. drivers/acpi/processor_perflib.c +2 −2
  363. drivers/acpi/tables.c +14 −6
  364. drivers/base/cpu.c +1 −1
  365. drivers/base/topology.c +16 −17
  366. drivers/clocksource/acpi_pm.c +1 −1
  367. drivers/clocksource/cyclone.c +1 −1
  368. drivers/eisa/Kconfig +3 −3
  369. drivers/firmware/dcdbas.c +8 −4
  370. drivers/firmware/iscsi_ibft.c +2 −2
  371. drivers/gpu/drm/drm_proc.c +2 −2
  372. drivers/input/keyboard/Kconfig +2 −2
  373. drivers/input/mouse/Kconfig +1 −1
  374. drivers/lguest/Kconfig +1 −1
  375. drivers/misc/Kconfig +2 −2
  376. drivers/misc/sgi-gru/grufile.c +3 −15
  377. drivers/misc/sgi-xp/xp.h +10 −14
  378. drivers/misc/sgi-xp/xpc_main.c +1 −1
  379. drivers/mtd/nand/Kconfig +1 −1
  380. drivers/net/ne3210.c +2 −1
  381. drivers/net/sfc/efx.c +12 −5
  382. drivers/net/sfc/falcon.c +12 −12
  383. drivers/net/wireless/arlan-main.c +2 −2
  384. drivers/oprofile/buffer_sync.c +18 −4
  385. drivers/oprofile/buffer_sync.h +4 −0
  386. drivers/oprofile/oprof.c +8 −1
  387. drivers/pci/dmar.c +5 −2
  388. drivers/pci/intr_remapping.c +1 −0
  389. drivers/watchdog/rdc321x_wdt.c +1 −1
  390. drivers/xen/events.c +174 −77
  391. drivers/xen/manage.c +1 −1
  392. include/acpi/acpiosxf.h +1 −0
  393. include/acpi/acpixf.h +4 −0
  394. include/asm-generic/percpu.h +52 −0
  395. include/asm-generic/sections.h +1 −1
  396. include/asm-generic/vmlinux.lds.h +51 −4
  397. include/linux/acpi.h +1 −0
  398. include/linux/bootmem.h +19 −17
  399. include/linux/decompress/bunzip2.h +10 −0
  400. include/linux/decompress/generic.h +33 −0
  401. include/linux/decompress/inflate.h +13 −0
  402. include/linux/decompress/mm.h +87 −0
  403. include/linux/decompress/unlzma.h +12 −0
  404. include/linux/elfcore.h +9 −0
  405. include/linux/interrupt.h +1 −0
  406. include/linux/irq.h +83 −3
  407. include/linux/irqnr.h +1 −0
  408. include/linux/kprobes.h +19 −3
  409. include/linux/magic.h +1 −0
  410. include/linux/mmiotrace.h +47 −31
  411. include/linux/percpu.h +107 −52
  412. include/linux/sched.h +14 −2
  413. include/linux/smp.h +6 −0
  414. include/linux/stackprotector.h +16 −0
  415. include/linux/topology.h +6 −0
  416. include/linux/vmalloc.h +4 −0
  417. init/Kconfig +60 −0
  418. init/do_mounts_rd.c +47 −131
  419. init/initramfs.c +37 −85
  420. init/main.c +13 −6
  421. kernel/exit.c +1 −4
  422. kernel/fork.c +5 −0
  423. kernel/irq/chip.c +4 −1
  424. kernel/irq/handle.c +33 −21
  425. kernel/irq/internals.h +7 −0
  426. kernel/irq/manage.c +6 −6
  427. kernel/irq/migration.c +6 −6
  428. kernel/irq/numa_migrate.c +16 −3
  429. kernel/irq/proc.c +2 −2
  430. kernel/kexec.c +1 −1
  431. kernel/module.c +49 −15
  432. kernel/panic.c +7 −1
  433. kernel/sched.c +4 −9
  434. kernel/sched_rt.c +20 −12
  435. kernel/softirq.c +5 −0
  436. kernel/stop_machine.c +1 −1
  437. lib/Kconfig +14 −0
  438. lib/Makefile +5 −1
  439. lib/decompress.c +54 −0
  440. lib/decompress_bunzip2.c +735 −0
  441. lib/decompress_inflate.c +167 −0
  442. lib/decompress_unlzma.c +647 −0
  443. lib/zlib_inflate/inflate.h +4 −0
  444. lib/zlib_inflate/inftrees.h +4 −0
  445. mm/Makefile +4 −0
  446. mm/allocpercpu.c +19 −13
  447. mm/bootmem.c +29 −6
  448. mm/filemap.c +3 −4
  449. mm/percpu.c +1326 −0
  450. mm/vmalloc.c +94 −3
  451. net/ipv4/af_inet.c +2 −2
  452. net/ipv4/route.c +1 −1
  453. scripts/Makefile.lib +14 −0
  454. scripts/bin_size +10 −0
  455. scripts/gcc-x86_32-has-stack-protector.sh +8 −0
  456. scripts/gcc-x86_64-has-stack-protector.sh +4 −2
  457. scripts/gen_initramfs_list.sh +12 −6
  458. scripts/mod/modpost.c +4 −1
  459. sound/drivers/Kconfig +1 −1
  460. usr/Kconfig +89 −0
  461. usr/Makefile +24 −12
  462. usr/initramfs_data.S +1 −1
  463. usr/initramfs_data.bz2.S +29 −0
  464. usr/initramfs_data.gz.S +29 −0
  465. usr/initramfs_data.lzma.S +29 −0
Documentation/cputopology.txt+3−3
@@ -18,11 +18,11 @@ For an architecture to support this feature, it must define some of · 17 unmodified lines
18these macros in include/asm-XXX/topology.h:18these macros in include/asm-XXX/topology.h:
19#define topology_physical_package_id(cpu)19#define topology_physical_package_id(cpu)
20#define topology_core_id(cpu)20#define topology_core_id(cpu)
21#define topology_thread_siblings(cpu)21#define topology_thread_cpumask(cpu)
22#define topology_core_siblings(cpu)22#define topology_core_cpumask(cpu)
23 23
24The type of **_id is int.24The type of **_id is int.
25The type of siblings is cpumask_t.25The type of siblings is (const) struct cpumask *.
26 26
27To be consistent on all architectures, include/linux/topology.h27To be consistent on all architectures, include/linux/topology.h
28provides default definitions for any of the above macros that are28provides default definitions for any of the above macros that are
Documentation/kernel-parameters.txt+6−1
@@ -1325,8 +1325,13 @@ and is between 256 and 4096 characters. It is defined in the file · 1324 unmodified lines
1325 1325
1326 memtest= [KNL,X86] Enable memtest1326 memtest= [KNL,X86] Enable memtest
1327 Format: <integer>1327 Format: <integer>
1328 range: 0,4 : pattern number
1329 default : 0 <disable>1328 default : 0 <disable>
1329 Specifies the number of memtest passes to be
1330 performed. Each pass selects another test
1331 pattern from a given set of patterns. Memtest
1332 fills the memory with this pattern, validates
1333 memory contents and reserves bad memory
1334 regions that are detected.
1330 1335
1331 meye.*= [HW] Set MotionEye Camera parameters1336 meye.*= [HW] Set MotionEye Camera parameters
1332 See Documentation/video4linux/meye.txt.1337 See Documentation/video4linux/meye.txt.
Documentation/x86/boot.txt+11−7
@@ -158,7 +158,7 @@ Offset Proto Name Meaning · 157 unmodified lines
1580202/4 2.00+ header Magic signature "HdrS"1580202/4 2.00+ header Magic signature "HdrS"
1590206/2 2.00+ version Boot protocol version supported1590206/2 2.00+ version Boot protocol version supported
1600208/4 2.00+ realmode_swtch Boot loader hook (see below)1600208/4 2.00+ realmode_swtch Boot loader hook (see below)
161020C/2 2.00+ start_sys The load-low segment (0x1000) (obsolete)161020C/2 2.00+ start_sys_seg The load-low segment (0x1000) (obsolete)
162020E/2 2.00+ kernel_version Pointer to kernel version string162020E/2 2.00+ kernel_version Pointer to kernel version string
1630210/1 2.00+ type_of_loader Boot loader identifier1630210/1 2.00+ type_of_loader Boot loader identifier
1640211/1 2.00+ loadflags Boot protocol option flags1640211/1 2.00+ loadflags Boot protocol option flags
@@ -170,10 +170,11 @@ Offset Proto Name Meaning · 5 unmodified lines
1700224/2 2.01+ heap_end_ptr Free memory after setup end1700224/2 2.01+ heap_end_ptr Free memory after setup end
1710226/2 N/A pad1 Unused1710226/2 N/A pad1 Unused
1720228/4 2.02+ cmd_line_ptr 32-bit pointer to the kernel command line1720228/4 2.02+ cmd_line_ptr 32-bit pointer to the kernel command line
173022C/4 2.03+ initrd_addr_max Highest legal initrd address173022C/4 2.03+ ramdisk_max Highest legal initrd address
1740230/4 2.05+ kernel_alignment Physical addr alignment required for kernel1740230/4 2.05+ kernel_alignment Physical addr alignment required for kernel
1750234/1 2.05+ relocatable_kernel Whether kernel is relocatable or not1750234/1 2.05+ relocatable_kernel Whether kernel is relocatable or not
1760235/3 N/A pad2 Unused1760235/1 N/A pad2 Unused
1770236/2 N/A pad3 Unused
1770238/4 2.06+ cmdline_size Maximum size of the kernel command line1780238/4 2.06+ cmdline_size Maximum size of the kernel command line
178023C/4 2.07+ hardware_subarch Hardware subarchitecture179023C/4 2.07+ hardware_subarch Hardware subarchitecture
1790240/8 2.07+ hardware_subarch_data Subarchitecture-specific data1800240/8 2.07+ hardware_subarch_data Subarchitecture-specific data
@@ -299,14 +300,14 @@ Protocol: 2.00+ · 119 unmodified lines
299 e.g. 0x0204 for version 2.04, and 0x0a11 for a hypothetical version300 e.g. 0x0204 for version 2.04, and 0x0a11 for a hypothetical version
300 10.17.301 10.17.
301 302
302Field name: readmode_swtch303Field name: realmode_swtch
303Type: modify (optional)304Type: modify (optional)
304Offset/size: 0x208/4305Offset/size: 0x208/4
305Protocol: 2.00+306Protocol: 2.00+
306 307
307 Boot loader hook (see ADVANCED BOOT LOADER HOOKS below.)308 Boot loader hook (see ADVANCED BOOT LOADER HOOKS below.)
308 309
309Field name: start_sys310Field name: start_sys_seg
310Type: read311Type: read
311Offset/size: 0x20c/2312Offset/size: 0x20c/2
312Protocol: 2.00+313Protocol: 2.00+
@@ -468,7 +469,7 @@ Protocol: 2.02+ · 155 unmodified lines
468 zero, the kernel will assume that your boot loader does not support469 zero, the kernel will assume that your boot loader does not support
469 the 2.02+ protocol.470 the 2.02+ protocol.
470 471
471Field name: initrd_addr_max472Field name: ramdisk_max
472Type: read473Type: read
473Offset/size: 0x22c/4474Offset/size: 0x22c/4
474Protocol: 2.03+475Protocol: 2.03+
@@ -542,7 +543,10 @@ Protocol: 2.08+ · 67 unmodified lines
542 543
543 The payload may be compressed. The format of both the compressed and544 The payload may be compressed. The format of both the compressed and
544 uncompressed data should be determined using the standard magic545 uncompressed data should be determined using the standard magic
545 numbers. Currently only gzip compressed ELF is used.546 numbers. The currently supported compression formats are gzip
547 (magic numbers 1F 8B or 1F 9E), bzip2 (magic number 42 5A) and LZMA
548 (magic number 5D 00). The uncompressed payload is currently always ELF
549 (magic number 7F 45 4C 46).
546 550
547Field name: payload_length551Field name: payload_length
548Type: read552Type: read
Makefile+2−1
@@ -533,8 +533,9 @@ KBUILD_CFLAGS += $(call cc-option,-Wframe-larger-than=${CONFIG_FRAME_WARN}) · 532 unmodified lines
533endif533endif
534 534
535# Force gcc to behave correct even for buggy distributions535# Force gcc to behave correct even for buggy distributions
536# Arch Makefiles may override this setting536ifndef CONFIG_CC_STACKPROTECTOR
537KBUILD_CFLAGS += $(call cc-option, -fno-stack-protector)537KBUILD_CFLAGS += $(call cc-option, -fno-stack-protector)
538endif
538 539
539ifdef CONFIG_FRAME_POINTER540ifdef CONFIG_FRAME_POINTER
540KBUILD_CFLAGS += -fno-omit-frame-pointer -fno-optimize-sibling-calls541KBUILD_CFLAGS += -fno-omit-frame-pointer -fno-optimize-sibling-calls
arch/alpha/kernel/irq.c+1−1
@@ -55,7 +55,7 @@ int irq_select_affinity(unsigned int irq) · 54 unmodified lines
55 cpu = (cpu < (NR_CPUS-1) ? cpu + 1 : 0);55 cpu = (cpu < (NR_CPUS-1) ? cpu + 1 : 0);
56 last_cpu = cpu;56 last_cpu = cpu;
57 57
58 irq_desc[irq].affinity = cpumask_of_cpu(cpu);58 cpumask_copy(irq_desc[irq].affinity, cpumask_of(cpu));
59 irq_desc[irq].chip->set_affinity(irq, cpumask_of(cpu));59 irq_desc[irq].chip->set_affinity(irq, cpumask_of(cpu));
60 return 0;60 return 0;
61}61}
arch/alpha/mm/init.c+13−7
@@ -189,9 +189,21 @@ callback_init(void * kernel_end) · 188 unmodified lines
189 189
190 if (alpha_using_srm) {190 if (alpha_using_srm) {
191 static struct vm_struct console_remap_vm;191 static struct vm_struct console_remap_vm;
192 unsigned long vaddr = VMALLOC_START;192 unsigned long nr_pages = 0;
193 unsigned long vaddr;
193 unsigned long i, j;194 unsigned long i, j;
194 195
196 /* calculate needed size */
197 for (i = 0; i < crb->map_entries; ++i)
198 nr_pages += crb->map[i].count;
199
200 /* register the vm area */
201 console_remap_vm.flags = VM_ALLOC;
202 console_remap_vm.size = nr_pages << PAGE_SHIFT;
203 vm_area_register_early(&console_remap_vm, PAGE_SIZE);
204
205 vaddr = (unsigned long)console_remap_vm.addr;
206
195 /* Set up the third level PTEs and update the virtual207 /* Set up the third level PTEs and update the virtual
196 addresses of the CRB entries. */208 addresses of the CRB entries. */
197 for (i = 0; i < crb->map_entries; ++i) {209 for (i = 0; i < crb->map_entries; ++i) {
@@ -213,12 +225,6 @@ callback_init(void * kernel_end) · 15 unmodified lines
213 vaddr += PAGE_SIZE;225 vaddr += PAGE_SIZE;
214 }226 }
215 }227 }
216
217 /* Let vmalloc know that we've allocated some space. */
218 console_remap_vm.flags = VM_ALLOC;
219 console_remap_vm.addr = (void *) VMALLOC_START;
220 console_remap_vm.size = vaddr - VMALLOC_START;
221 vmlist = &console_remap_vm;
222 }228 }
223 229
224 callback_init_done = 1;230 callback_init_done = 1;
arch/arm/kernel/irq.c+12−6
@@ -104,6 +104,11 @@ static struct irq_desc bad_irq_desc = { · 103 unmodified lines
104 .lock = __SPIN_LOCK_UNLOCKED(bad_irq_desc.lock),104 .lock = __SPIN_LOCK_UNLOCKED(bad_irq_desc.lock),
105};105};
106 106
107#ifdef CONFIG_CPUMASK_OFFSTACK
108/* We are not allocating bad_irq_desc.affinity or .pending_mask */
109#error "ARM architecture does not support CONFIG_CPUMASK_OFFSTACK."
110#endif
111
107/*112/*
108 * do_IRQ handles all hardware IRQ's. Decoded IRQs should not113 * do_IRQ handles all hardware IRQ's. Decoded IRQs should not
109 * come via this function. Instead, they should provide their114 * come via this function. Instead, they should provide their
@@ -161,7 +166,7 @@ void __init init_IRQ(void) · 51 unmodified lines
161 irq_desc[irq].status |= IRQ_NOREQUEST | IRQ_NOPROBE;166 irq_desc[irq].status |= IRQ_NOREQUEST | IRQ_NOPROBE;
162 167
163#ifdef CONFIG_SMP168#ifdef CONFIG_SMP
164 bad_irq_desc.affinity = CPU_MASK_ALL;169 cpumask_setall(bad_irq_desc.affinity);
165 bad_irq_desc.cpu = smp_processor_id();170 bad_irq_desc.cpu = smp_processor_id();
166#endif171#endif
167 init_arch_irq();172 init_arch_irq();
@@ -191,15 +196,16 @@ void migrate_irqs(void) · 23 unmodified lines
191 struct irq_desc *desc = irq_desc + i;196 struct irq_desc *desc = irq_desc + i;
192 197
193 if (desc->cpu == cpu) {198 if (desc->cpu == cpu) {
194 unsigned int newcpu = any_online_cpu(desc->affinity);199 unsigned int newcpu = cpumask_any_and(desc->affinity,
195 200 cpu_online_mask);
196 if (newcpu == NR_CPUS) {201 if (newcpu >= nr_cpu_ids) {
197 if (printk_ratelimit())202 if (printk_ratelimit())
198 printk(KERN_INFO "IRQ%u no longer affine to CPU%u\n",203 printk(KERN_INFO "IRQ%u no longer affine to CPU%u\n",
199 i, cpu);204 i, cpu);
200 205
201 cpus_setall(desc->affinity);206 cpumask_setall(desc->affinity);
202 newcpu = any_online_cpu(desc->affinity);207 newcpu = cpumask_any_and(desc->affinity,
208 cpu_online_mask);
203 }209 }
204 210
205 route_irq(desc, i, newcpu);211 route_irq(desc, i, newcpu);
arch/arm/kernel/vmlinux.lds.S+2−0
@@ -64,7 +64,9 @@ SECTIONS · 63 unmodified lines
64 __initramfs_end = .;64 __initramfs_end = .;
65#endif65#endif
66 . = ALIGN(4096);66 . = ALIGN(4096);
67 __per_cpu_load = .;
67 __per_cpu_start = .;68 __per_cpu_start = .;
69 *(.data.percpu.page_aligned)
68 *(.data.percpu)70 *(.data.percpu)
69 *(.data.percpu.shared_aligned)71 *(.data.percpu.shared_aligned)
70 __per_cpu_end = .;72 __per_cpu_end = .;
arch/arm/oprofile/op_model_mpcore.c+1−1
@@ -263,7 +263,7 @@ static void em_route_irq(int irq, unsigned int cpu) · 262 unmodified lines
263 const struct cpumask *mask = cpumask_of(cpu);263 const struct cpumask *mask = cpumask_of(cpu);
264 264
265 spin_lock_irq(&desc->lock);265 spin_lock_irq(&desc->lock);
266 desc->affinity = *mask;266 cpumask_copy(desc->affinity, mask);
267 desc->chip->set_affinity(irq, mask);267 desc->chip->set_affinity(irq, mask);
268 spin_unlock_irq(&desc->lock);268 spin_unlock_irq(&desc->lock);
269}269}
arch/avr32/Kconfig+1−1
@@ -181,7 +181,7 @@ source "kernel/Kconfig.preempt" · 180 unmodified lines
181config QUICKLIST181config QUICKLIST
182 def_bool y182 def_bool y
183 183
184config HAVE_ARCH_BOOTMEM_NODE184config HAVE_ARCH_BOOTMEM
185 def_bool n185 def_bool n
186 186
187config ARCH_HAVE_MEMORY_PRESENT187config ARCH_HAVE_MEMORY_PRESENT
arch/blackfin/include/asm/percpu.h+0−10
@@ -3,14 +3,4 @@ · 2 unmodified lines
3 3
4#include <asm-generic/percpu.h>4#include <asm-generic/percpu.h>
5 5
6#ifdef CONFIG_MODULES
7#define PERCPU_MODULE_RESERVE 8192
8#else
9#define PERCPU_MODULE_RESERVE 0
10#endif
11
12#define PERCPU_ENOUGH_ROOM \
13 (ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES) + \
14 PERCPU_MODULE_RESERVE)
15
16#endif /* __ARCH_BLACKFIN_PERCPU__ */6#endif /* __ARCH_BLACKFIN_PERCPU__ */
arch/blackfin/kernel/irqchip.c+5−0
@@ -70,6 +70,11 @@ static struct irq_desc bad_irq_desc = { · 69 unmodified lines
70#endif70#endif
71};71};
72 72
73#ifdef CONFIG_CPUMASK_OFFSTACK
74/* We are not allocating a variable-sized bad_irq_desc.affinity */
75#error "Blackfin architecture does not support CONFIG_CPUMASK_OFFSTACK."
76#endif
77
73int show_interrupts(struct seq_file *p, void *v)78int show_interrupts(struct seq_file *p, void *v)
74{79{
75 int i = *(loff_t *) v, j;80 int i = *(loff_t *) v, j;
arch/ia64/include/asm/percpu.h+2−2
@@ -27,12 +27,12 @@ extern void *per_cpu_init(void); · 26 unmodified lines
27 27
28#else /* ! SMP */28#else /* ! SMP */
29 29
30#define PER_CPU_ATTRIBUTES __attribute__((__section__(".data.percpu")))
31
32#define per_cpu_init() (__phys_per_cpu_start)30#define per_cpu_init() (__phys_per_cpu_start)
33 31
34#endif /* SMP */32#endif /* SMP */
35 33
34#define PER_CPU_BASE_SECTION ".data.percpu"
35
36/*36/*
37 * Be extremely careful when taking the address of this variable! Due to virtual37 * Be extremely careful when taking the address of this variable! Due to virtual
38 * remapping, it is different from the canonical address returned by __get_cpu_var(var)!38 * remapping, it is different from the canonical address returned by __get_cpu_var(var)!
arch/ia64/include/asm/topology.h+1−1
@@ -84,7 +84,7 @@ void build_cpu_to_node_map(void); · 83 unmodified lines
84 .child = NULL, \84 .child = NULL, \
85 .groups = NULL, \85 .groups = NULL, \
86 .min_interval = 8, \86 .min_interval = 8, \
87 .max_interval = 8*(min(num_online_cpus(), 32)), \87 .max_interval = 8*(min(num_online_cpus(), 32U)), \
88 .busy_factor = 64, \88 .busy_factor = 64, \
89 .imbalance_pct = 125, \89 .imbalance_pct = 125, \
90 .cache_nice_tries = 2, \90 .cache_nice_tries = 2, \
arch/ia64/include/asm/uv/uv.h+13−0
@@ -0,0 +1,13 @@
1#ifndef _ASM_IA64_UV_UV_H
2#define _ASM_IA64_UV_UV_H
3
4#include <asm/system.h>
5#include <asm/sn/simulator.h>
6
7static inline int is_uv_system(void)
8{
9 /* temporary support for running on hardware simulator */
10 return IS_MEDUSA() || ia64_platform_is("uv");
11}
12
13#endif /* _ASM_IA64_UV_UV_H */
arch/ia64/kernel/acpi.c+4−0
@@ -199,6 +199,10 @@ char *__init __acpi_map_table(unsigned long phys_addr, unsigned long size) · 198 unmodified lines
199 return __va(phys_addr);199 return __va(phys_addr);
200}200}
201 201
202void __init __acpi_unmap_table(char *map, unsigned long size)
203{
204}
205
202/* --------------------------------------------------------------------------206/* --------------------------------------------------------------------------
203 Boot-time Table Parsing207 Boot-time Table Parsing
204 -------------------------------------------------------------------------- */208 -------------------------------------------------------------------------- */
arch/ia64/kernel/iosapic.c+1−1
@@ -880,7 +880,7 @@ iosapic_unregister_intr (unsigned int gsi) · 879 unmodified lines
880 if (iosapic_intr_info[irq].count == 0) {880 if (iosapic_intr_info[irq].count == 0) {
881#ifdef CONFIG_SMP881#ifdef CONFIG_SMP
882 /* Clear affinity */882 /* Clear affinity */
883 cpus_setall(idesc->affinity);883 cpumask_setall(idesc->affinity);
884#endif884#endif
885 /* Clear the interrupt information */885 /* Clear the interrupt information */
886 iosapic_intr_info[irq].dest = 0;886 iosapic_intr_info[irq].dest = 0;
arch/ia64/kernel/irq.c+2−2
@@ -103,7 +103,7 @@ static char irq_redir [NR_IRQS]; // = { [0 ... NR_IRQS-1] = 1 }; · 102 unmodified lines
103void set_irq_affinity_info (unsigned int irq, int hwid, int redir)103void set_irq_affinity_info (unsigned int irq, int hwid, int redir)
104{104{
105 if (irq < NR_IRQS) {105 if (irq < NR_IRQS) {
106 cpumask_copy(&irq_desc[irq].affinity,106 cpumask_copy(irq_desc[irq].affinity,
107 cpumask_of(cpu_logical_id(hwid)));107 cpumask_of(cpu_logical_id(hwid)));
108 irq_redir[irq] = (char) (redir & 0xff);108 irq_redir[irq] = (char) (redir & 0xff);
109 }109 }
@@ -148,7 +148,7 @@ static void migrate_irqs(void) · 38 unmodified lines
148 if (desc->status == IRQ_PER_CPU)148 if (desc->status == IRQ_PER_CPU)
149 continue;149 continue;
150 150
151 if (cpumask_any_and(&irq_desc[irq].affinity, cpu_online_mask)151 if (cpumask_any_and(irq_desc[irq].affinity, cpu_online_mask)
152 >= nr_cpu_ids) {152 >= nr_cpu_ids) {
153 /*153 /*
154 * Save it for phase 2 processing154 * Save it for phase 2 processing
arch/ia64/kernel/irq_ia64.c+8−4
@@ -493,11 +493,13 @@ ia64_handle_irq (ia64_vector vector, struct pt_regs *regs) · 492 unmodified lines
493 saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);493 saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
494 ia64_srlz_d();494 ia64_srlz_d();
495 while (vector != IA64_SPURIOUS_INT_VECTOR) {495 while (vector != IA64_SPURIOUS_INT_VECTOR) {
496 struct irq_desc *desc = irq_to_desc(vector);
497
496 if (unlikely(IS_LOCAL_TLB_FLUSH(vector))) {498 if (unlikely(IS_LOCAL_TLB_FLUSH(vector))) {
497 smp_local_flush_tlb();499 smp_local_flush_tlb();
498 kstat_this_cpu.irqs[vector]++;500 kstat_incr_irqs_this_cpu(vector, desc);
499 } else if (unlikely(IS_RESCHEDULE(vector)))501 } else if (unlikely(IS_RESCHEDULE(vector)))
500 kstat_this_cpu.irqs[vector]++;502 kstat_incr_irqs_this_cpu(vector, desc);
501 else {503 else {
502 int irq = local_vector_to_irq(vector);504 int irq = local_vector_to_irq(vector);
503 505
@@ -551,11 +553,13 @@ void ia64_process_pending_intr(void) · 47 unmodified lines
551 * Perform normal interrupt style processing553 * Perform normal interrupt style processing
552 */554 */
553 while (vector != IA64_SPURIOUS_INT_VECTOR) {555 while (vector != IA64_SPURIOUS_INT_VECTOR) {
556 struct irq_desc *desc = irq_to_desc(vector);
557
554 if (unlikely(IS_LOCAL_TLB_FLUSH(vector))) {558 if (unlikely(IS_LOCAL_TLB_FLUSH(vector))) {
555 smp_local_flush_tlb();559 smp_local_flush_tlb();
556 kstat_this_cpu.irqs[vector]++;560 kstat_incr_irqs_this_cpu(vector, desc);
557 } else if (unlikely(IS_RESCHEDULE(vector)))561 } else if (unlikely(IS_RESCHEDULE(vector)))
558 kstat_this_cpu.irqs[vector]++;562 kstat_incr_irqs_this_cpu(vector, desc);
559 else {563 else {
560 struct pt_regs *old_regs = set_irq_regs(NULL);564 struct pt_regs *old_regs = set_irq_regs(NULL);
561 int irq = local_vector_to_irq(vector);565 int irq = local_vector_to_irq(vector);
arch/ia64/kernel/msi_ia64.c+2−2
@@ -38,7 +38,7 @@ static void ia64_set_msi_irq_affinity(unsigned int irq, · 37 unmodified lines
38 msg.data = data;38 msg.data = data;
39 39
40 write_msi_msg(irq, &msg);40 write_msi_msg(irq, &msg);
41 irq_desc[irq].affinity = cpumask_of_cpu(cpu);41 cpumask_copy(irq_desc[irq].affinity, cpumask_of(cpu));
42}42}
43#endif /* CONFIG_SMP */43#endif /* CONFIG_SMP */
44 44
@@ -150,7 +150,7 @@ static void dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask) · 105 unmodified lines
150 msg.address_lo |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu));150 msg.address_lo |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu));
151 151
152 dmar_msi_write(irq, &msg);152 dmar_msi_write(irq, &msg);
153 irq_desc[irq].affinity = *mask;153 cpumask_copy(irq_desc[irq].affinity, mask);
154}154}
155#endif /* CONFIG_SMP */155#endif /* CONFIG_SMP */
156 156
arch/ia64/kernel/vmlinux.lds.S+2−9
@@ -213,16 +213,9 @@ SECTIONS · 212 unmodified lines
213 { *(.data.cacheline_aligned) }213 { *(.data.cacheline_aligned) }
214 214
215 /* Per-cpu data: */215 /* Per-cpu data: */
216 percpu : { } :percpu
217 . = ALIGN(PERCPU_PAGE_SIZE);216 . = ALIGN(PERCPU_PAGE_SIZE);
218 __phys_per_cpu_start = .;217 PERCPU_VADDR(PERCPU_ADDR, :percpu)
219 .data.percpu PERCPU_ADDR : AT(__phys_per_cpu_start - LOAD_OFFSET)218 __phys_per_cpu_start = __per_cpu_load;
220 {
221 __per_cpu_start = .;
222 *(.data.percpu)
223 *(.data.percpu.shared_aligned)
224 __per_cpu_end = .;
225 }
226 . = __phys_per_cpu_start + PERCPU_PAGE_SIZE; /* ensure percpu data fits219 . = __phys_per_cpu_start + PERCPU_PAGE_SIZE; /* ensure percpu data fits
227 * into percpu page size220 * into percpu page size
228 */221 */
arch/ia64/sn/kernel/msi_sn.c+1−1
@@ -205,7 +205,7 @@ static void sn_set_msi_irq_affinity(unsigned int irq, · 204 unmodified lines
205 msg.address_lo = (u32)(bus_addr & 0x00000000ffffffff);205 msg.address_lo = (u32)(bus_addr & 0x00000000ffffffff);
206 206
207 write_msi_msg(irq, &msg);207 write_msi_msg(irq, &msg);
208 irq_desc[irq].affinity = *cpu_mask;208 cpumask_copy(irq_desc[irq].affinity, cpu_mask);
209}209}
210#endif /* CONFIG_SMP */210#endif /* CONFIG_SMP */
211 211
arch/mips/include/asm/irq.h+1−1
@@ -66,7 +66,7 @@ extern void smtc_forward_irq(unsigned int irq); · 65 unmodified lines
66 */66 */
67#define IRQ_AFFINITY_HOOK(irq) \67#define IRQ_AFFINITY_HOOK(irq) \
68do { \68do { \
69 if (!cpu_isset(smp_processor_id(), irq_desc[irq].affinity)) { \69 if (!cpumask_test_cpu(smp_processor_id(), irq_desc[irq].affinity)) {\
70 smtc_forward_irq(irq); \70 smtc_forward_irq(irq); \
71 irq_exit(); \71 irq_exit(); \
72 return; \72 return; \
arch/mips/kernel/irq-gic.c+1−1
@@ -187,7 +187,7 @@ static void gic_set_affinity(unsigned int irq, const struct cpumask *cpumask) · 186 unmodified lines
187 set_bit(irq, pcpu_masks[first_cpu(tmp)].pcpu_mask);187 set_bit(irq, pcpu_masks[first_cpu(tmp)].pcpu_mask);
188 188
189 }189 }
190 irq_desc[irq].affinity = *cpumask;190 cpumask_copy(irq_desc[irq].affinity, cpumask);
191 spin_unlock_irqrestore(&gic_lock, flags);191 spin_unlock_irqrestore(&gic_lock, flags);
192 192
193}193}
arch/mips/kernel/smtc.c+4−2
@@ -686,7 +686,7 @@ void smtc_forward_irq(unsigned int irq) · 685 unmodified lines
686 * and efficiency, we just pick the easiest one to find.686 * and efficiency, we just pick the easiest one to find.
687 */687 */
688 688
689 target = first_cpu(irq_desc[irq].affinity);689 target = cpumask_first(irq_desc[irq].affinity);
690 690
691 /*691 /*
692 * We depend on the platform code to have correctly processed692 * We depend on the platform code to have correctly processed
@@ -921,11 +921,13 @@ void ipi_decode(struct smtc_ipi *pipi) · 228 unmodified lines
921 struct clock_event_device *cd;921 struct clock_event_device *cd;
922 void *arg_copy = pipi->arg;922 void *arg_copy = pipi->arg;
923 int type_copy = pipi->type;923 int type_copy = pipi->type;
924 int irq = MIPS_CPU_IRQ_BASE + 1;
925
924 smtc_ipi_nq(&freeIPIq, pipi);926 smtc_ipi_nq(&freeIPIq, pipi);
925 switch (type_copy) {927 switch (type_copy) {
926 case SMTC_CLOCK_TICK:928 case SMTC_CLOCK_TICK:
927 irq_enter();929 irq_enter();
928 kstat_this_cpu.irqs[MIPS_CPU_IRQ_BASE + 1]++;930 kstat_incr_irqs_this_cpu(irq, irq_to_desc(irq));
929 cd = &per_cpu(mips_clockevent_device, cpu);931 cd = &per_cpu(mips_clockevent_device, cpu);
930 cd->event_handler(cd);932 cd->event_handler(cd);
931 irq_exit();933 irq_exit();
arch/mips/mti-malta/malta-smtc.c+3−2
@@ -116,7 +116,7 @@ struct plat_smp_ops msmtc_smp_ops = { · 115 unmodified lines
116 116
117void plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity)117void plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity)
118{118{
119 cpumask_t tmask = *affinity;119 cpumask_t tmask;
120 int cpu = 0;120 int cpu = 0;
121 void smtc_set_irq_affinity(unsigned int irq, cpumask_t aff);121 void smtc_set_irq_affinity(unsigned int irq, cpumask_t aff);
122 122
@@ -139,11 +139,12 @@ void plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity) · 16 unmodified lines
139 * be made to forward to an offline "CPU".139 * be made to forward to an offline "CPU".
140 */140 */
141 141
142 cpumask_copy(&tmask, affinity);
142 for_each_cpu(cpu, affinity) {143 for_each_cpu(cpu, affinity) {
143 if ((cpu_data[cpu].vpe_id != 0) || !cpu_online(cpu))144 if ((cpu_data[cpu].vpe_id != 0) || !cpu_online(cpu))
144 cpu_clear(cpu, tmask);145 cpu_clear(cpu, tmask);
145 }146 }
146 irq_desc[irq].affinity = tmask;147 cpumask_copy(irq_desc[irq].affinity, &tmask);
147 148
148 if (cpus_empty(tmask))149 if (cpus_empty(tmask))
149 /*150 /*
arch/mips/sgi-ip22/ip22-int.c+1−1
@@ -155,7 +155,7 @@ static void indy_buserror_irq(void) · 154 unmodified lines
155 int irq = SGI_BUSERR_IRQ;155 int irq = SGI_BUSERR_IRQ;
156 156
157 irq_enter();157 irq_enter();
158 kstat_this_cpu.irqs[irq]++;158 kstat_incr_irqs_this_cpu(irq, irq_to_desc(irq));
159 ip22_be_interrupt(irq);159 ip22_be_interrupt(irq);
160 irq_exit();160 irq_exit();
161}161}
arch/mips/sgi-ip22/ip22-time.c+1−1
@@ -122,7 +122,7 @@ void indy_8254timer_irq(void) · 121 unmodified lines
122 char c;122 char c;
123 123
124 irq_enter();124 irq_enter();
125 kstat_this_cpu.irqs[irq]++;125 kstat_incr_irqs_this_cpu(irq, irq_to_desc(irq));
126 printk(KERN_ALERT "Oops, got 8254 interrupt.\n");126 printk(KERN_ALERT "Oops, got 8254 interrupt.\n");
127 ArcRead(0, &c, 1, &cnt);127 ArcRead(0, &c, 1, &cnt);
128 ArcEnterInteractiveMode();128 ArcEnterInteractiveMode();
arch/mips/sibyte/bcm1480/smp.c+2−1
@@ -178,9 +178,10 @@ struct plat_smp_ops bcm1480_smp_ops = { · 177 unmodified lines
178void bcm1480_mailbox_interrupt(void)178void bcm1480_mailbox_interrupt(void)
179{179{
180 int cpu = smp_processor_id();180 int cpu = smp_processor_id();
181 int irq = K_BCM1480_INT_MBOX_0_0;
181 unsigned int action;182 unsigned int action;
182 183
183 kstat_this_cpu.irqs[K_BCM1480_INT_MBOX_0_0]++;184 kstat_incr_irqs_this_cpu(irq, irq_to_desc(irq));
184 /* Load the mailbox register to figure out what we're supposed to do */185 /* Load the mailbox register to figure out what we're supposed to do */
185 action = (__raw_readq(mailbox_0_regs[cpu]) >> 48) & 0xffff;186 action = (__raw_readq(mailbox_0_regs[cpu]) >> 48) & 0xffff;
186 187
arch/mips/sibyte/sb1250/smp.c+2−1
@@ -166,9 +166,10 @@ struct plat_smp_ops sb_smp_ops = { · 165 unmodified lines
166void sb1250_mailbox_interrupt(void)166void sb1250_mailbox_interrupt(void)
167{167{
168 int cpu = smp_processor_id();168 int cpu = smp_processor_id();
169 int irq = K_INT_MBOX_0;
169 unsigned int action;170 unsigned int action;
170 171
171 kstat_this_cpu.irqs[K_INT_MBOX_0]++;172 kstat_incr_irqs_this_cpu(irq, irq_to_desc(irq));
172 /* Load the mailbox register to figure out what we're supposed to do */173 /* Load the mailbox register to figure out what we're supposed to do */
173 action = (____raw_readq(mailbox_regs[cpu]) >> 48) & 0xffff;174 action = (____raw_readq(mailbox_regs[cpu]) >> 48) & 0xffff;
174 175
arch/mn10300/kernel/mn10300-watchdog.c+2−1
@@ -130,6 +130,7 @@ void watchdog_interrupt(struct pt_regs *regs, enum exception_code excep) · 129 unmodified lines
130 * the stack NMI-atomically, it's safe to use smp_processor_id().130 * the stack NMI-atomically, it's safe to use smp_processor_id().
131 */131 */
132 int sum, cpu = smp_processor_id();132 int sum, cpu = smp_processor_id();
133 int irq = NMIIRQ;
133 u8 wdt, tmp;134 u8 wdt, tmp;
134 135
135 wdt = WDCTR & ~WDCTR_WDCNE;136 wdt = WDCTR & ~WDCTR_WDCNE;
@@ -138,7 +139,7 @@ void watchdog_interrupt(struct pt_regs *regs, enum exception_code excep) · 2 unmodified lines
138 NMICR = NMICR_WDIF;139 NMICR = NMICR_WDIF;
139 140
140 nmi_count(cpu)++;141 nmi_count(cpu)++;
141 kstat_this_cpu.irqs[NMIIRQ]++;142 kstat_incr_irqs_this_cpu(irq, irq_to_desc(irq));
142 sum = irq_stat[cpu].__irq_count;143 sum = irq_stat[cpu].__irq_count;
143 144
144 if (last_irq_sums[cpu] == sum) {145 if (last_irq_sums[cpu] == sum) {
arch/parisc/kernel/irq.c+1−1
@@ -138,7 +138,7 @@ static void cpu_set_affinity_irq(unsigned int irq, const struct cpumask *dest) · 137 unmodified lines
138 if (cpu_dest < 0)138 if (cpu_dest < 0)
139 return;139 return;
140 140
141 cpumask_copy(&irq_desc[irq].affinity, &cpumask_of_cpu(cpu_dest));141 cpumask_copy(&irq_desc[irq].affinity, dest);
142}142}
143#endif143#endif
144 144
arch/powerpc/kernel/irq.c+1−1
@@ -231,7 +231,7 @@ void fixup_irqs(cpumask_t map) · 230 unmodified lines
231 if (irq_desc[irq].status & IRQ_PER_CPU)231 if (irq_desc[irq].status & IRQ_PER_CPU)
232 continue;232 continue;
233 233
234 cpus_and(mask, irq_desc[irq].affinity, map);234 cpumask_and(&mask, irq_desc[irq].affinity, &map);
235 if (any_online_cpu(mask) == NR_CPUS) {235 if (any_online_cpu(mask) == NR_CPUS) {
236 printk("Breaking affinity for irq %i\n", irq);236 printk("Breaking affinity for irq %i\n", irq);
237 mask = map;237 mask = map;
arch/powerpc/kernel/vmlinux.lds.S+1−7
@@ -181,13 +181,7 @@ SECTIONS · 180 unmodified lines
181 __initramfs_end = .;181 __initramfs_end = .;
182 }182 }
183#endif183#endif
184 . = ALIGN(PAGE_SIZE);184 PERCPU(PAGE_SIZE)
185 .data.percpu : AT(ADDR(.data.percpu) - LOAD_OFFSET) {
186 __per_cpu_start = .;
187 *(.data.percpu)
188 *(.data.percpu.shared_aligned)
189 __per_cpu_end = .;
190 }
191 185
192 . = ALIGN(8);186 . = ALIGN(8);
193 .machine.desc : AT(ADDR(.machine.desc) - LOAD_OFFSET) {187 .machine.desc : AT(ADDR(.machine.desc) - LOAD_OFFSET) {
arch/powerpc/platforms/pseries/xics.c+3−2
@@ -153,9 +153,10 @@ static int get_irq_server(unsigned int virq, unsigned int strict_check) · 152 unmodified lines
153{153{
154 int server;154 int server;
155 /* For the moment only implement delivery to all cpus or one cpu */155 /* For the moment only implement delivery to all cpus or one cpu */
156 cpumask_t cpumask = irq_desc[virq].affinity;156 cpumask_t cpumask;
157 cpumask_t tmp = CPU_MASK_NONE;157 cpumask_t tmp = CPU_MASK_NONE;
158 158
159 cpumask_copy(&cpumask, irq_desc[virq].affinity);
159 if (!distribute_irqs)160 if (!distribute_irqs)
160 return default_server;161 return default_server;
161 162
@@ -869,7 +870,7 @@ void xics_migrate_irqs_away(void) · 707 unmodified lines
869 virq, cpu);870 virq, cpu);
870 871
871 /* Reset affinity to all cpus */872 /* Reset affinity to all cpus */
872 irq_desc[virq].affinity = CPU_MASK_ALL;873 cpumask_setall(irq_desc[virq].affinity);
873 desc->chip->set_affinity(virq, cpu_all_mask);874 desc->chip->set_affinity(virq, cpu_all_mask);
874unlock:875unlock:
875 spin_unlock_irqrestore(&desc->lock, flags);876 spin_unlock_irqrestore(&desc->lock, flags);
arch/powerpc/sysdev/mpic.c+2−1
@@ -566,9 +566,10 @@ static void __init mpic_scan_ht_pics(struct mpic *mpic) · 565 unmodified lines
566#ifdef CONFIG_SMP566#ifdef CONFIG_SMP
567static int irq_choose_cpu(unsigned int virt_irq)567static int irq_choose_cpu(unsigned int virt_irq)
568{568{
569 cpumask_t mask = irq_desc[virt_irq].affinity;569 cpumask_t mask;
570 int cpuid;570 int cpuid;
571 571
572 cpumask_copy(&mask, irq_desc[virt_irq].affinity);
572 if (cpus_equal(mask, CPU_MASK_ALL)) {573 if (cpus_equal(mask, CPU_MASK_ALL)) {
573 static int irq_rover;574 static int irq_rover;
574 static DEFINE_SPINLOCK(irq_rover_lock);575 static DEFINE_SPINLOCK(irq_rover_lock);
arch/sparc/kernel/irq_64.c+3−2
@@ -252,9 +252,10 @@ struct irq_handler_data { · 251 unmodified lines
252#ifdef CONFIG_SMP252#ifdef CONFIG_SMP
253static int irq_choose_cpu(unsigned int virt_irq)253static int irq_choose_cpu(unsigned int virt_irq)
254{254{
255 cpumask_t mask = irq_desc[virt_irq].affinity;255 cpumask_t mask;
256 int cpuid;256 int cpuid;
257 257
258 cpumask_copy(&mask, irq_desc[virt_irq].affinity);
258 if (cpus_equal(mask, CPU_MASK_ALL)) {259 if (cpus_equal(mask, CPU_MASK_ALL)) {
259 static int irq_rover;260 static int irq_rover;
260 static DEFINE_SPINLOCK(irq_rover_lock);261 static DEFINE_SPINLOCK(irq_rover_lock);
@@ -805,7 +806,7 @@ void fixup_irqs(void) · 544 unmodified lines
805 !(irq_desc[irq].status & IRQ_PER_CPU)) {806 !(irq_desc[irq].status & IRQ_PER_CPU)) {
806 if (irq_desc[irq].chip->set_affinity)807 if (irq_desc[irq].chip->set_affinity)
807 irq_desc[irq].chip->set_affinity(irq,808 irq_desc[irq].chip->set_affinity(irq,
808 &irq_desc[irq].affinity);809 irq_desc[irq].affinity);
809 }810 }
810 spin_unlock_irqrestore(&irq_desc[irq].lock, flags);811 spin_unlock_irqrestore(&irq_desc[irq].lock, flags);
811 }812 }
arch/sparc/kernel/time_64.c+1−1
@@ -729,7 +729,7 @@ void timer_interrupt(int irq, struct pt_regs *regs) · 728 unmodified lines
729 729
730 irq_enter();730 irq_enter();
731 731
732 kstat_this_cpu.irqs[0]++;732 kstat_incr_irqs_this_cpu(0, irq_to_desc(0));
733 733
734 if (unlikely(!evt->event_handler)) {734 if (unlikely(!evt->event_handler)) {
735 printk(KERN_WARNING735 printk(KERN_WARNING
arch/x86/Kconfig+340−317
@@ -5,7 +5,7 @@ mainmenu "Linux Kernel Configuration for x86" · 4 unmodified lines
5config 64BIT5config 64BIT
6 bool "64-bit kernel" if ARCH = "x86"6 bool "64-bit kernel" if ARCH = "x86"
7 default ARCH = "x86_64"7 default ARCH = "x86_64"
8 help8 ---help---
9 Say yes to build a 64-bit kernel - formerly known as x86_649 Say yes to build a 64-bit kernel - formerly known as x86_64
10 Say no to build a 32-bit kernel - formerly known as i38610 Say no to build a 32-bit kernel - formerly known as i386
11 11
@@ -34,12 +34,15 @@ config X86 · 22 unmodified lines
34 select HAVE_FUNCTION_TRACER34 select HAVE_FUNCTION_TRACER
35 select HAVE_FUNCTION_GRAPH_TRACER35 select HAVE_FUNCTION_GRAPH_TRACER
36 select HAVE_FUNCTION_TRACE_MCOUNT_TEST36 select HAVE_FUNCTION_TRACE_MCOUNT_TEST
37 select HAVE_KVM if ((X86_32 && !X86_VOYAGER && !X86_VISWS && !X86_NUMAQ) || X86_64)37 select HAVE_KVM
38 select HAVE_ARCH_KGDB if !X86_VOYAGER38 select HAVE_ARCH_KGDB
39 select HAVE_ARCH_TRACEHOOK39 select HAVE_ARCH_TRACEHOOK
40 select HAVE_GENERIC_DMA_COHERENT if X86_3240 select HAVE_GENERIC_DMA_COHERENT if X86_32
41 select HAVE_EFFICIENT_UNALIGNED_ACCESS41 select HAVE_EFFICIENT_UNALIGNED_ACCESS
42 select USER_STACKTRACE_SUPPORT42 select USER_STACKTRACE_SUPPORT
43 select HAVE_KERNEL_GZIP
44 select HAVE_KERNEL_BZIP2
45 select HAVE_KERNEL_LZMA
43 46
44config ARCH_DEFCONFIG47config ARCH_DEFCONFIG
45 string48 string
@@ -133,18 +136,19 @@ config ARCH_HAS_CACHE_LINE_SIZE · 87 unmodified lines
133 def_bool y136 def_bool y
134 137
135config HAVE_SETUP_PER_CPU_AREA138config HAVE_SETUP_PER_CPU_AREA
136 def_bool X86_64_SMP || (X86_SMP && !X86_VOYAGER)139 def_bool y
140
141config HAVE_DYNAMIC_PER_CPU_AREA
142 def_bool y
137 143
138config HAVE_CPUMASK_OF_CPU_MAP144config HAVE_CPUMASK_OF_CPU_MAP
139 def_bool X86_64_SMP145 def_bool X86_64_SMP
140 146
141config ARCH_HIBERNATION_POSSIBLE147config ARCH_HIBERNATION_POSSIBLE
142 def_bool y148 def_bool y
143 depends on !SMP || !X86_VOYAGER
144 149
145config ARCH_SUSPEND_POSSIBLE150config ARCH_SUSPEND_POSSIBLE
146 def_bool y151 def_bool y
147 depends on !X86_VOYAGER
148 152
149config ZONE_DMA32153config ZONE_DMA32
150 bool154 bool
@@ -177,11 +181,6 @@ config GENERIC_PENDING_IRQ · 26 unmodified lines
177 depends on GENERIC_HARDIRQS && SMP181 depends on GENERIC_HARDIRQS && SMP
178 default y182 default y
179 183
180config X86_SMP
181 bool
182 depends on SMP && ((X86_32 && !X86_VOYAGER) || X86_64)
183 default y
184
185config USE_GENERIC_SMP_HELPERS184config USE_GENERIC_SMP_HELPERS
186 def_bool y185 def_bool y
187 depends on SMP186 depends on SMP
@@ -197,19 +196,17 @@ config X86_64_SMP · 9 unmodified lines
197config X86_HT196config X86_HT
198 bool197 bool
199 depends on SMP198 depends on SMP
200 depends on (X86_32 && !X86_VOYAGER) || X86_64
201 default y
202
203config X86_BIOS_REBOOT
204 bool
205 depends on !X86_VOYAGER
206 default y199 default y
207 200
208config X86_TRAMPOLINE201config X86_TRAMPOLINE
209 bool202 bool
210 depends on X86_SMP || (X86_VOYAGER && SMP) || (64BIT && ACPI_SLEEP)203 depends on SMP || (64BIT && ACPI_SLEEP)
211 default y204 default y
212 205
206config X86_32_LAZY_GS
207 def_bool y
208 depends on X86_32 && !CC_STACKPROTECTOR
209
213config KTIME_SCALAR210config KTIME_SCALAR
214 def_bool X86_32211 def_bool X86_32
215source "init/Kconfig"212source "init/Kconfig"
@@ -247,14 +244,24 @@ config SMP · 31 unmodified lines
247 244
248 If you don't know what to do here, say N.245 If you don't know what to do here, say N.
249 246
250config X86_HAS_BOOT_CPU_ID247config X86_X2APIC
251 def_bool y248 bool "Support x2apic"
252 depends on X86_VOYAGER249 depends on X86_LOCAL_APIC && X86_64
250 ---help---
251 This enables x2apic support on CPUs that have this feature.
252
253 This allows 32-bit apic IDs (so it can support very large systems),
254 and accesses the local apic via MSRs not via mmio.
255
256 ( On certain CPU models you may need to enable INTR_REMAP too,
257 to get functional x2apic mode. )
258
259 If you don't know what to do here, say N.
253 260
254config SPARSE_IRQ261config SPARSE_IRQ
255 bool "Support sparse irq numbering"262 bool "Support sparse irq numbering"
256 depends on PCI_MSI || HT_IRQ263 depends on PCI_MSI || HT_IRQ
257 help264 ---help---
258 This enables support for sparse irqs. This is useful for distro265 This enables support for sparse irqs. This is useful for distro
259 kernels that want to define a high CONFIG_NR_CPUS value but still266 kernels that want to define a high CONFIG_NR_CPUS value but still
260 want to have low kernel memory footprint on smaller machines.267 want to have low kernel memory footprint on smaller machines.
@@ -268,114 +275,140 @@ config NUMA_MIGRATE_IRQ_DESC · 7 unmodified lines
268 bool "Move irq desc when changing irq smp_affinity"275 bool "Move irq desc when changing irq smp_affinity"
269 depends on SPARSE_IRQ && NUMA276 depends on SPARSE_IRQ && NUMA
270 default n277 default n
271 help278 ---help---
272 This enables moving irq_desc to cpu/node that irq will use handled.279 This enables moving irq_desc to cpu/node that irq will use handled.
273 280
274 If you don't know what to do here, say N.281 If you don't know what to do here, say N.
275 282
276config X86_FIND_SMP_CONFIG
277 def_bool y
278 depends on X86_MPPARSE || X86_VOYAGER
279
280config X86_MPPARSE283config X86_MPPARSE
281 bool "Enable MPS table" if ACPI284 bool "Enable MPS table" if ACPI
282 default y285 default y
283 depends on X86_LOCAL_APIC286 depends on X86_LOCAL_APIC
284 help287 ---help---
285 For old smp systems that do not have proper acpi support. Newer systems288 For old smp systems that do not have proper acpi support. Newer systems
286 (esp with 64bit cpus) with acpi support, MADT and DSDT will override it289 (esp with 64bit cpus) with acpi support, MADT and DSDT will override it
287 290
288choice291config X86_BIGSMP
289 prompt "Subarchitecture Type"292 bool "Support for big SMP systems with more than 8 CPUs"
290 default X86_PC293 depends on X86_32 && SMP
294 ---help---
295 This option is needed for the systems that have more than 8 CPUs
291 296
292config X86_PC297if X86_32
293 bool "PC-compatible"298config X86_EXTENDED_PLATFORM
294 help299 bool "Support for extended (non-PC) x86 platforms"
295 Choose this option if your computer is a standard PC or compatible.300 default y
301 ---help---
302 If you disable this option then the kernel will only support
303 standard PC platforms. (which covers the vast majority of
304 systems out there.)
305
306 If you enable this option then you'll be able to select support
307 for the following (non-PC) 32 bit x86 platforms:
308 AMD Elan
309 NUMAQ (IBM/Sequent)
310 RDC R-321x SoC
311 SGI 320/540 (Visual Workstation)
312 Summit/EXA (IBM x440)
313 Unisys ES7000 IA32 series
314
315 If you have one of these systems, or if you want to build a
316 generic distribution kernel, say Y here - otherwise say N.
317endif
318
319if X86_64
320config X86_EXTENDED_PLATFORM
321 bool "Support for extended (non-PC) x86 platforms"
322 default y
323 ---help---
324 If you disable this option then the kernel will only support
325 standard PC platforms. (which covers the vast majority of
326 systems out there.)
327
328 If you enable this option then you'll be able to select support
329 for the following (non-PC) 64 bit x86 platforms:
330 ScaleMP vSMP
331 SGI Ultraviolet
332
333 If you have one of these systems, or if you want to build a
334 generic distribution kernel, say Y here - otherwise say N.
335endif
336# This is an alphabetically sorted list of 64 bit extended platforms
337# Please maintain the alphabetic order if and when there are additions
338
339config X86_VSMP
340 bool "ScaleMP vSMP"
341 select PARAVIRT
342 depends on X86_64 && PCI
343 depends on X86_EXTENDED_PLATFORM
344 ---help---
345 Support for ScaleMP vSMP systems. Say 'Y' here if this kernel is
346 supposed to run on these EM64T-based machines. Only choose this option
347 if you have one of these machines.
348
349config X86_UV
350 bool "SGI Ultraviolet"
351 depends on X86_64
352 depends on X86_EXTENDED_PLATFORM
353 select X86_X2APIC
354 ---help---
355 This option is needed in order to support SGI Ultraviolet systems.
356 If you don't have one of these, you should say N here.
357
358# Following is an alphabetically sorted list of 32 bit extended platforms
359# Please maintain the alphabetic order if and when there are additions
296 360
297config X86_ELAN361config X86_ELAN
298 bool "AMD Elan"362 bool "AMD Elan"
299 depends on X86_32363 depends on X86_32
300 help364 depends on X86_EXTENDED_PLATFORM
365 ---help---
301 Select this for an AMD Elan processor.366 Select this for an AMD Elan processor.
302 367
303 Do not use this option for K6/Athlon/Opteron processors!368 Do not use this option for K6/Athlon/Opteron processors!
304 369
305 If unsure, choose "PC-compatible" instead.370 If unsure, choose "PC-compatible" instead.
306 371
307config X86_VOYAGER372config X86_RDC321X
308 bool "Voyager (NCR)"373 bool "RDC R-321x SoC"
309 depends on X86_32 && (SMP || BROKEN) && !PCI
310 help
311 Voyager is an MCA-based 32-way capable SMP architecture proprietary
312 to NCR Corp. Machine classes 345x/35xx/4100/51xx are Voyager-based.
313
314 *** WARNING ***
315
316 If you do not specifically know you have a Voyager based machine,
317 say N here, otherwise the kernel you build will not be bootable.
318
319config X86_GENERICARCH
320 bool "Generic architecture"
321 depends on X86_32374 depends on X86_32
322 help375 depends on X86_EXTENDED_PLATFORM
323 This option compiles in the NUMAQ, Summit, bigsmp, ES7000, default376 select M486
377 select X86_REBOOTFIXUPS
378 ---help---
379 This option is needed for RDC R-321x system-on-chip, also known
380 as R-8610-(G).
381 If you don't have one of these chips, you should say N here.
382
383config X86_32_NON_STANDARD
384 bool "Support non-standard 32-bit SMP architectures"
385 depends on X86_32 && SMP
386 depends on X86_EXTENDED_PLATFORM
387 ---help---
388 This option compiles in the NUMAQ, Summit, bigsmp, ES7000, default
324 subarchitectures. It is intended for a generic binary kernel.389 subarchitectures. It is intended for a generic binary kernel.
325 if you select them all, kernel will probe it one by one. and will390 if you select them all, kernel will probe it one by one. and will
326 fallback to default.391 fallback to default.
327 392
328if X86_GENERICARCH393# Alphabetically sorted list of Non standard 32 bit platforms
329 394
330config X86_NUMAQ395config X86_NUMAQ
331 bool "NUMAQ (IBM/Sequent)"396 bool "NUMAQ (IBM/Sequent)"
332 depends on SMP && X86_32 && PCI && X86_MPPARSE397 depends on X86_32_NON_STANDARD
333 select NUMA398 select NUMA
334 help399 select X86_MPPARSE
400 ---help---
335 This option is used for getting Linux to run on a NUMAQ (IBM/Sequent)401 This option is used for getting Linux to run on a NUMAQ (IBM/Sequent)
336 NUMA multiquad box. This changes the way that processors are402 NUMA multiquad box. This changes the way that processors are
337 bootstrapped, and uses Clustered Logical APIC addressing mode instead403 bootstrapped, and uses Clustered Logical APIC addressing mode instead
338 of Flat Logical. You will need a new lynxer.elf file to flash your404 of Flat Logical. You will need a new lynxer.elf file to flash your
339 firmware with - send email to <Martin.Bligh@us.ibm.com>.405 firmware with - send email to <Martin.Bligh@us.ibm.com>.
340 406
341config X86_SUMMIT
342 bool "Summit/EXA (IBM x440)"
343 depends on X86_32 && SMP
344 help
345 This option is needed for IBM systems that use the Summit/EXA chipset.
346 In particular, it is needed for the x440.
347
348config X86_ES7000
349 bool "Support for Unisys ES7000 IA32 series"
350 depends on X86_32 && SMP
351 help
352 Support for Unisys ES7000 systems. Say 'Y' here if this kernel is
353 supposed to run on an IA32-based Unisys ES7000 system.
354
355config X86_BIGSMP
356 bool "Support for big SMP systems with more than 8 CPUs"
357 depends on X86_32 && SMP
358 help
359 This option is needed for the systems that have more than 8 CPUs
360 and if the system is not of any sub-arch type above.
361
362endif
363
364config X86_VSMP
365 bool "Support for ScaleMP vSMP"
366 select PARAVIRT
367 depends on X86_64 && PCI
368 help
369 Support for ScaleMP vSMP systems. Say 'Y' here if this kernel is
370 supposed to run on these EM64T-based machines. Only choose this option
371 if you have one of these machines.
372
373endchoice
374
375config X86_VISWS407config X86_VISWS
376 bool "SGI 320/540 (Visual Workstation)"408 bool "SGI 320/540 (Visual Workstation)"
377 depends on X86_32 && PCI && !X86_VOYAGER && X86_MPPARSE && PCI_GODIRECT409 depends on X86_32 && PCI && X86_MPPARSE && PCI_GODIRECT
378 help410 depends on X86_32_NON_STANDARD
411 ---help---
379 The SGI Visual Workstation series is an IA32-based workstation412 The SGI Visual Workstation series is an IA32-based workstation
380 based on SGI systems chips with some legacy PC hardware attached.413 based on SGI systems chips with some legacy PC hardware attached.
381 414
@@ -384,21 +417,25 @@ config X86_VISWS · 2 unmodified lines
384 A kernel compiled for the Visual Workstation will run on general417 A kernel compiled for the Visual Workstation will run on general
385 PCs as well. See <file:Documentation/sgi-visws.txt> for details.418 PCs as well. See <file:Documentation/sgi-visws.txt> for details.
386 419
387config X86_RDC321X420config X86_SUMMIT
388 bool "RDC R-321x SoC"421 bool "Summit/EXA (IBM x440)"
389 depends on X86_32422 depends on X86_32_NON_STANDARD
390 select M486423 ---help---
391 select X86_REBOOTFIXUPS424 This option is needed for IBM systems that use the Summit/EXA chipset.
392 help425 In particular, it is needed for the x440.
393 This option is needed for RDC R-321x system-on-chip, also known426
394 as R-8610-(G).427config X86_ES7000
395 If you don't have one of these chips, you should say N here.428 bool "Unisys ES7000 IA32 series"
429 depends on X86_32_NON_STANDARD && X86_BIGSMP
430 ---help---
431 Support for Unisys ES7000 systems. Say 'Y' here if this kernel is
432 supposed to run on an IA32-based Unisys ES7000 system.
396 433
397config SCHED_OMIT_FRAME_POINTER434config SCHED_OMIT_FRAME_POINTER
398 def_bool y435 def_bool y
399 prompt "Single-depth WCHAN output"436 prompt "Single-depth WCHAN output"
400 depends on X86437 depends on X86
401 help438 ---help---
402 Calculate simpler /proc/<PID>/wchan values. If this option439 Calculate simpler /proc/<PID>/wchan values. If this option
403 is disabled then wchan values will recurse back to the440 is disabled then wchan values will recurse back to the
404 caller function. This provides more accurate wchan values,441 caller function. This provides more accurate wchan values,
@@ -408,7 +445,7 @@ config SCHED_OMIT_FRAME_POINTER · 3 unmodified lines
408 445
409menuconfig PARAVIRT_GUEST446menuconfig PARAVIRT_GUEST
410 bool "Paravirtualized guest support"447 bool "Paravirtualized guest support"
411 help448 ---help---
412 Say Y here to get to see options related to running Linux under449 Say Y here to get to see options related to running Linux under
413 various hypervisors. This option alone does not add any kernel code.450 various hypervisors. This option alone does not add any kernel code.
414 451
@@ -422,8 +459,7 @@ config VMI · 7 unmodified lines
422 bool "VMI Guest support"459 bool "VMI Guest support"
423 select PARAVIRT460 select PARAVIRT
424 depends on X86_32461 depends on X86_32
425 depends on !X86_VOYAGER462 ---help---
426 help
427 VMI provides a paravirtualized interface to the VMware ESX server463 VMI provides a paravirtualized interface to the VMware ESX server
428 (it could be used by other hypervisors in theory too, but is not464 (it could be used by other hypervisors in theory too, but is not
429 at the moment), by linking the kernel to a GPL-ed ROM module465 at the moment), by linking the kernel to a GPL-ed ROM module
@@ -433,8 +469,7 @@ config KVM_CLOCK · 3 unmodified lines
433 bool "KVM paravirtualized clock"469 bool "KVM paravirtualized clock"
434 select PARAVIRT470 select PARAVIRT
435 select PARAVIRT_CLOCK471 select PARAVIRT_CLOCK
436 depends on !X86_VOYAGER472 ---help---
437 help
438 Turning on this option will allow you to run a paravirtualized clock473 Turning on this option will allow you to run a paravirtualized clock
439 when running over the KVM hypervisor. Instead of relying on a PIT474 when running over the KVM hypervisor. Instead of relying on a PIT
440 (or probably other) emulation by the underlying device model, the host475 (or probably other) emulation by the underlying device model, the host
@@ -444,17 +479,15 @@ config KVM_CLOCK · 3 unmodified lines
444config KVM_GUEST479config KVM_GUEST
445 bool "KVM Guest support"480 bool "KVM Guest support"
446 select PARAVIRT481 select PARAVIRT
447 depends on !X86_VOYAGER482 ---help---
448 help483 This option enables various optimizations for running under the KVM
449 This option enables various optimizations for running under the KVM484 hypervisor.
450 hypervisor.
451 485
452source "arch/x86/lguest/Kconfig"486source "arch/x86/lguest/Kconfig"
453 487
454config PARAVIRT488config PARAVIRT
455 bool "Enable paravirtualization code"489 bool "Enable paravirtualization code"
456 depends on !X86_VOYAGER490 ---help---
457 help
458 This changes the kernel so it can modify itself when it is run491 This changes the kernel so it can modify itself when it is run
459 under a hypervisor, potentially improving performance significantly492 under a hypervisor, potentially improving performance significantly
460 over full virtualization. However, when run without a hypervisor493 over full virtualization. However, when run without a hypervisor
@@ -467,51 +500,51 @@ config PARAVIRT_CLOCK · 6 unmodified lines
467endif500endif
468 501
469config PARAVIRT_DEBUG502config PARAVIRT_DEBUG
470 bool "paravirt-ops debugging"503 bool "paravirt-ops debugging"
471 depends on PARAVIRT && DEBUG_KERNEL504 depends on PARAVIRT && DEBUG_KERNEL
472 help505 ---help---
473 Enable to debug paravirt_ops internals. Specifically, BUG if506 Enable to debug paravirt_ops internals. Specifically, BUG if
474 a paravirt_op is missing when it is called.507 a paravirt_op is missing when it is called.
475 508
476config MEMTEST509config MEMTEST
477 bool "Memtest"510 bool "Memtest"
478 help511 ---help---
479 This option adds a kernel parameter 'memtest', which allows memtest512 This option adds a kernel parameter 'memtest', which allows memtest
480 to be set.513 to be set.
481 memtest=0, mean disabled; -- default514 memtest=0, mean disabled; -- default
482 memtest=1, mean do 1 test pattern;515 memtest=1, mean do 1 test pattern;
483 ...516 ...
484 memtest=4, mean do 4 test patterns.517 memtest=4, mean do 4 test patterns.
485 If you are unsure how to answer this question, answer N.518 If you are unsure how to answer this question, answer N.
486 519
487config X86_SUMMIT_NUMA520config X86_SUMMIT_NUMA
488 def_bool y521 def_bool y
489 depends on X86_32 && NUMA && X86_GENERICARCH522 depends on X86_32 && NUMA && X86_32_NON_STANDARD
490 523
491config X86_CYCLONE_TIMER524config X86_CYCLONE_TIMER
492 def_bool y525 def_bool y
493 depends on X86_GENERICARCH526 depends on X86_32_NON_STANDARD
494 527
495source "arch/x86/Kconfig.cpu"528source "arch/x86/Kconfig.cpu"
496 529
497config HPET_TIMER530config HPET_TIMER
498 def_bool X86_64531 def_bool X86_64
499 prompt "HPET Timer Support" if X86_32532 prompt "HPET Timer Support" if X86_32
500 help533 ---help---
501 Use the IA-PC HPET (High Precision Event Timer) to manage534 Use the IA-PC HPET (High Precision Event Timer) to manage
502 time in preference to the PIT and RTC, if a HPET is535 time in preference to the PIT and RTC, if a HPET is
503 present.536 present.
504 HPET is the next generation timer replacing legacy 8254s.537 HPET is the next generation timer replacing legacy 8254s.
505 The HPET provides a stable time base on SMP538 The HPET provides a stable time base on SMP
506 systems, unlike the TSC, but it is more expensive to access,539 systems, unlike the TSC, but it is more expensive to access,
507 as it is off-chip. You can find the HPET spec at540 as it is off-chip. You can find the HPET spec at
508 <http://www.intel.com/hardwaredesign/hpetspec_1.pdf>.541 <http://www.intel.com/hardwaredesign/hpetspec_1.pdf>.
509 542
510 You can safely choose Y here. However, HPET will only be543 You can safely choose Y here. However, HPET will only be
511 activated if the platform and the BIOS support this feature.544 activated if the platform and the BIOS support this feature.
512 Otherwise the 8254 will be used for timing services.545 Otherwise the 8254 will be used for timing services.
513 546
514 Choose N to continue using the legacy 8254 timer.547 Choose N to continue using the legacy 8254 timer.
515 548
516config HPET_EMULATE_RTC549config HPET_EMULATE_RTC
517 def_bool y550 def_bool y
@@ -522,7 +555,7 @@ config HPET_EMULATE_RTC · 4 unmodified lines
522config DMI555config DMI
523 default y556 default y
524 bool "Enable DMI scanning" if EMBEDDED557 bool "Enable DMI scanning" if EMBEDDED
525 help558 ---help---
526 Enabled scanning of DMI to identify machine quirks. Say Y559 Enabled scanning of DMI to identify machine quirks. Say Y
527 here unless you have verified that your setup is not560 here unless you have verified that your setup is not
528 affected by entries in the DMI blacklist. Required by PNP561 affected by entries in the DMI blacklist. Required by PNP
@@ -534,7 +567,7 @@ config GART_IOMMU · 5 unmodified lines
534 select SWIOTLB567 select SWIOTLB
535 select AGP568 select AGP
536 depends on X86_64 && PCI569 depends on X86_64 && PCI
537 help570 ---help---
538 Support for full DMA access of devices with 32bit memory access only571 Support for full DMA access of devices with 32bit memory access only
539 on systems with more than 3GB. This is usually needed for USB,572 on systems with more than 3GB. This is usually needed for USB,
540 sound, many IDE/SATA chipsets and some other devices.573 sound, many IDE/SATA chipsets and some other devices.
@@ -549,7 +582,7 @@ config CALGARY_IOMMU · 8 unmodified lines
549 bool "IBM Calgary IOMMU support"582 bool "IBM Calgary IOMMU support"
550 select SWIOTLB583 select SWIOTLB
551 depends on X86_64 && PCI && EXPERIMENTAL584 depends on X86_64 && PCI && EXPERIMENTAL
552 help585 ---help---
553 Support for hardware IOMMUs in IBM's xSeries x366 and x460586 Support for hardware IOMMUs in IBM's xSeries x366 and x460
554 systems. Needed to run systems with more than 3GB of memory587 systems. Needed to run systems with more than 3GB of memory
555 properly with 32-bit PCI devices that do not support DAC588 properly with 32-bit PCI devices that do not support DAC
@@ -567,7 +600,7 @@ config CALGARY_IOMMU_ENABLED_BY_DEFAULT · 11 unmodified lines
567 def_bool y600 def_bool y
568 prompt "Should Calgary be enabled by default?"601 prompt "Should Calgary be enabled by default?"
569 depends on CALGARY_IOMMU602 depends on CALGARY_IOMMU
570 help603 ---help---
571 Should Calgary be enabled by default? if you choose 'y', Calgary604 Should Calgary be enabled by default? if you choose 'y', Calgary
572 will be used (if it exists). If you choose 'n', Calgary will not be605 will be used (if it exists). If you choose 'n', Calgary will not be
573 used even if it exists. If you choose 'n' and would like to use606 used even if it exists. If you choose 'n' and would like to use
@@ -579,7 +612,7 @@ config AMD_IOMMU · 5 unmodified lines
579 select SWIOTLB612 select SWIOTLB
580 select PCI_MSI613 select PCI_MSI
581 depends on X86_64 && PCI && ACPI614 depends on X86_64 && PCI && ACPI
582 help615 ---help---
583 With this option you can enable support for AMD IOMMU hardware in616 With this option you can enable support for AMD IOMMU hardware in
584 your system. An IOMMU is a hardware component which provides617 your system. An IOMMU is a hardware component which provides
585 remapping of DMA memory accesses from devices. With an AMD IOMMU you618 remapping of DMA memory accesses from devices. With an AMD IOMMU you
@@ -594,7 +627,7 @@ config AMD_IOMMU_STATS · 8 unmodified lines
594 bool "Export AMD IOMMU statistics to debugfs"627 bool "Export AMD IOMMU statistics to debugfs"
595 depends on AMD_IOMMU628 depends on AMD_IOMMU
596 select DEBUG_FS629 select DEBUG_FS
597 help630 ---help---
598 This option enables code in the AMD IOMMU driver to collect various631 This option enables code in the AMD IOMMU driver to collect various
599 statistics about whats happening in the driver and exports that632 statistics about whats happening in the driver and exports that
600 information to userspace via debugfs.633 information to userspace via debugfs.
@@ -603,7 +636,7 @@ config AMD_IOMMU_STATS · 2 unmodified lines
603# need this always selected by IOMMU for the VIA workaround636# need this always selected by IOMMU for the VIA workaround
604config SWIOTLB637config SWIOTLB
605 def_bool y if X86_64638 def_bool y if X86_64
606 help639 ---help---
607 Support for software bounce buffers used on x86-64 systems640 Support for software bounce buffers used on x86-64 systems
608 which don't have a hardware IOMMU (e.g. the current generation641 which don't have a hardware IOMMU (e.g. the current generation
609 of Intel's x86-64 CPUs). Using this PCI devices which can only642 of Intel's x86-64 CPUs). Using this PCI devices which can only
@@ -621,7 +654,7 @@ config MAXSMP · 11 unmodified lines
621 depends on X86_64 && SMP && DEBUG_KERNEL && EXPERIMENTAL654 depends on X86_64 && SMP && DEBUG_KERNEL && EXPERIMENTAL
622 select CPUMASK_OFFSTACK655 select CPUMASK_OFFSTACK
623 default n656 default n
624 help657 ---help---
625 Configure maximum number of CPUS and NUMA Nodes for this architecture.658 Configure maximum number of CPUS and NUMA Nodes for this architecture.
626 If unsure, say N.659 If unsure, say N.
627 660
@@ -632,7 +665,7 @@ config NR_CPUS · 4 unmodified lines
632 default "4096" if MAXSMP665 default "4096" if MAXSMP
633 default "32" if SMP && (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP || X86_ES7000)666 default "32" if SMP && (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP || X86_ES7000)
634 default "8" if SMP667 default "8" if SMP
635 help668 ---help---
636 This allows you to specify the maximum number of CPUs which this669 This allows you to specify the maximum number of CPUs which this
637 kernel will support. The maximum supported value is 512 and the670 kernel will support. The maximum supported value is 512 and the
638 minimum value which makes sense is 2.671 minimum value which makes sense is 2.
@@ -643,7 +676,7 @@ config NR_CPUS · 4 unmodified lines
643config SCHED_SMT676config SCHED_SMT
644 bool "SMT (Hyperthreading) scheduler support"677 bool "SMT (Hyperthreading) scheduler support"
645 depends on X86_HT678 depends on X86_HT
646 help679 ---help---
647 SMT scheduler support improves the CPU scheduler's decision making680 SMT scheduler support improves the CPU scheduler's decision making
648 when dealing with Intel Pentium 4 chips with HyperThreading at a681 when dealing with Intel Pentium 4 chips with HyperThreading at a
649 cost of slightly increased overhead in some places. If unsure say682 cost of slightly increased overhead in some places. If unsure say
@@ -653,7 +686,7 @@ config SCHED_MC · 3 unmodified lines
653 def_bool y686 def_bool y
654 prompt "Multi-core scheduler support"687 prompt "Multi-core scheduler support"
655 depends on X86_HT688 depends on X86_HT
656 help689 ---help---
657 Multi-core scheduler support improves the CPU scheduler's decision690 Multi-core scheduler support improves the CPU scheduler's decision
658 making when dealing with multi-core CPU chips at a cost of slightly691 making when dealing with multi-core CPU chips at a cost of slightly
659 increased overhead in some places. If unsure say N here.692 increased overhead in some places. If unsure say N here.
@@ -662,8 +695,8 @@ source "kernel/Kconfig.preempt" · 2 unmodified lines
662 695
663config X86_UP_APIC696config X86_UP_APIC
664 bool "Local APIC support on uniprocessors"697 bool "Local APIC support on uniprocessors"
665 depends on X86_32 && !SMP && !(X86_VOYAGER || X86_GENERICARCH)698 depends on X86_32 && !SMP && !X86_32_NON_STANDARD
666 help699 ---help---
667 A local APIC (Advanced Programmable Interrupt Controller) is an700 A local APIC (Advanced Programmable Interrupt Controller) is an
668 integrated interrupt controller in the CPU. If you have a single-CPU701 integrated interrupt controller in the CPU. If you have a single-CPU
669 system which has a processor with a local APIC, you can say Y here to702 system which has a processor with a local APIC, you can say Y here to
@@ -676,7 +709,7 @@ config X86_UP_APIC · 6 unmodified lines
676config X86_UP_IOAPIC709config X86_UP_IOAPIC
677 bool "IO-APIC support on uniprocessors"710 bool "IO-APIC support on uniprocessors"
678 depends on X86_UP_APIC711 depends on X86_UP_APIC
679 help712 ---help---
680 An IO-APIC (I/O Advanced Programmable Interrupt Controller) is an713 An IO-APIC (I/O Advanced Programmable Interrupt Controller) is an
681 SMP-capable replacement for PC-style interrupt controllers. Most714 SMP-capable replacement for PC-style interrupt controllers. Most
682 SMP systems and many recent uniprocessor systems have one.715 SMP systems and many recent uniprocessor systems have one.
@@ -687,11 +720,11 @@ config X86_UP_IOAPIC · 4 unmodified lines
687 720
688config X86_LOCAL_APIC721config X86_LOCAL_APIC
689 def_bool y722 def_bool y
690 depends on X86_64 || (X86_32 && (X86_UP_APIC || (SMP && !X86_VOYAGER) || X86_GENERICARCH))723 depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_APIC
691 724
692config X86_IO_APIC725config X86_IO_APIC
693 def_bool y726 def_bool y
694 depends on X86_64 || (X86_32 && (X86_UP_IOAPIC || (SMP && !X86_VOYAGER) || X86_GENERICARCH))727 depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_APIC
695 728
696config X86_VISWS_APIC729config X86_VISWS_APIC
697 def_bool y730 def_bool y
@@ -701,7 +734,7 @@ config X86_REROUTE_FOR_BROKEN_BOOT_IRQS · 3 unmodified lines
701 bool "Reroute for broken boot IRQs"734 bool "Reroute for broken boot IRQs"
702 default n735 default n
703 depends on X86_IO_APIC736 depends on X86_IO_APIC
704 help737 ---help---
705 This option enables a workaround that fixes a source of738 This option enables a workaround that fixes a source of
706 spurious interrupts. This is recommended when threaded739 spurious interrupts. This is recommended when threaded
707 interrupt handling is used on systems where the generation of740 interrupt handling is used on systems where the generation of
@@ -723,7 +756,6 @@ config X86_REROUTE_FOR_BROKEN_BOOT_IRQS · 15 unmodified lines
723 756
724config X86_MCE757config X86_MCE
725 bool "Machine Check Exception"758 bool "Machine Check Exception"
726 depends on !X86_VOYAGER
727 ---help---759 ---help---
728 Machine Check Exception support allows the processor to notify the760 Machine Check Exception support allows the processor to notify the
729 kernel if it detects a problem (e.g. overheating, component failure).761 kernel if it detects a problem (e.g. overheating, component failure).
@@ -742,7 +774,7 @@ config X86_MCE_INTEL · 12 unmodified lines
742 def_bool y774 def_bool y
743 prompt "Intel MCE features"775 prompt "Intel MCE features"
744 depends on X86_64 && X86_MCE && X86_LOCAL_APIC776 depends on X86_64 && X86_MCE && X86_LOCAL_APIC
745 help777 ---help---
746 Additional support for intel specific MCE features such as778 Additional support for intel specific MCE features such as
747 the thermal monitor.779 the thermal monitor.
748 780
@@ -750,14 +782,14 @@ config X86_MCE_AMD · 1 unmodified line
750 def_bool y782 def_bool y
751 prompt "AMD MCE features"783 prompt "AMD MCE features"
752 depends on X86_64 && X86_MCE && X86_LOCAL_APIC784 depends on X86_64 && X86_MCE && X86_LOCAL_APIC
753 help785 ---help---
754 Additional support for AMD specific MCE features such as786 Additional support for AMD specific MCE features such as
755 the DRAM Error Threshold.787 the DRAM Error Threshold.
756 788
757config X86_MCE_NONFATAL789config X86_MCE_NONFATAL
758 tristate "Check for non-fatal errors on AMD Athlon/Duron / Intel Pentium 4"790 tristate "Check for non-fatal errors on AMD Athlon/Duron / Intel Pentium 4"
759 depends on X86_32 && X86_MCE791 depends on X86_32 && X86_MCE
760 help792 ---help---
761 Enabling this feature starts a timer that triggers every 5 seconds which793 Enabling this feature starts a timer that triggers every 5 seconds which
762 will look at the machine check registers to see if anything happened.794 will look at the machine check registers to see if anything happened.
763 Non-fatal problems automatically get corrected (but still logged).795 Non-fatal problems automatically get corrected (but still logged).
@@ -770,7 +802,7 @@ config X86_MCE_NONFATAL · 6 unmodified lines
770config X86_MCE_P4THERMAL802config X86_MCE_P4THERMAL
771 bool "check for P4 thermal throttling interrupt."803 bool "check for P4 thermal throttling interrupt."
772 depends on X86_32 && X86_MCE && (X86_UP_APIC || SMP)804 depends on X86_32 && X86_MCE && (X86_UP_APIC || SMP)
773 help805 ---help---
774 Enabling this feature will cause a message to be printed when the P4806 Enabling this feature will cause a message to be printed when the P4
775 enters thermal throttling.807 enters thermal throttling.
776 808
@@ -778,11 +810,11 @@ config VM86 · 1 unmodified line
778 bool "Enable VM86 support" if EMBEDDED810 bool "Enable VM86 support" if EMBEDDED
779 default y811 default y
780 depends on X86_32812 depends on X86_32
781 help813 ---help---
782 This option is required by programs like DOSEMU to run 16-bit legacy814 This option is required by programs like DOSEMU to run 16-bit legacy
783 code on X86 processors. It also may be needed by software like815 code on X86 processors. It also may be needed by software like
784 XFree86 to initialize some video cards via BIOS. Disabling this816 XFree86 to initialize some video cards via BIOS. Disabling this
785 option saves about 6k.817 option saves about 6k.
786 818
787config TOSHIBA819config TOSHIBA
788 tristate "Toshiba Laptop support"820 tristate "Toshiba Laptop support"
@@ -856,33 +888,33 @@ config MICROCODE · 67 unmodified lines
856 module will be called microcode.888 module will be called microcode.
857 889
858config MICROCODE_INTEL890config MICROCODE_INTEL
859 bool "Intel microcode patch loading support"891 bool "Intel microcode patch loading support"
860 depends on MICROCODE892 depends on MICROCODE
861 default MICROCODE893 default MICROCODE
862 select FW_LOADER894 select FW_LOADER
863 --help---895 ---help---
864 This options enables microcode patch loading support for Intel896 This options enables microcode patch loading support for Intel
865 processors.897 processors.
866 898
867 For latest news and information on obtaining all the required899 For latest news and information on obtaining all the required
868 Intel ingredients for this driver, check:900 Intel ingredients for this driver, check:
869 <http://www.urbanmyth.org/microcode/>.901 <http://www.urbanmyth.org/microcode/>.
870 902
871config MICROCODE_AMD903config MICROCODE_AMD
872 bool "AMD microcode patch loading support"904 bool "AMD microcode patch loading support"
873 depends on MICROCODE905 depends on MICROCODE
874 select FW_LOADER906 select FW_LOADER
875 --help---907 ---help---
876 If you select this option, microcode patch loading support for AMD908 If you select this option, microcode patch loading support for AMD
877 processors will be enabled.909 processors will be enabled.
878 910
879 config MICROCODE_OLD_INTERFACE911config MICROCODE_OLD_INTERFACE
880 def_bool y912 def_bool y
881 depends on MICROCODE913 depends on MICROCODE
882 914
883config X86_MSR915config X86_MSR
884 tristate "/dev/cpu/*/msr - Model-specific register support"916 tristate "/dev/cpu/*/msr - Model-specific register support"
885 help917 ---help---
886 This device gives privileged processes access to the x86918 This device gives privileged processes access to the x86
887 Model-Specific Registers (MSRs). It is a character device with919 Model-Specific Registers (MSRs). It is a character device with
888 major 202 and minors 0 to 31 for /dev/cpu/0/msr to /dev/cpu/31/msr.920 major 202 and minors 0 to 31 for /dev/cpu/0/msr to /dev/cpu/31/msr.
@@ -891,7 +923,7 @@ config X86_MSR · 2 unmodified lines
891 923
892config X86_CPUID924config X86_CPUID
893 tristate "/dev/cpu/*/cpuid - CPU information support"925 tristate "/dev/cpu/*/cpuid - CPU information support"
894 help926 ---help---
895 This device gives processes access to the x86 CPUID instruction to927 This device gives processes access to the x86 CPUID instruction to
896 be executed on a specific processor. It is a character device928 be executed on a specific processor. It is a character device
897 with major 203 and minors 0 to 31 for /dev/cpu/0/cpuid to929 with major 203 and minors 0 to 31 for /dev/cpu/0/cpuid to
@@ -943,7 +975,7 @@ config NOHIGHMEM · 45 unmodified lines
943config HIGHMEM4G975config HIGHMEM4G
944 bool "4GB"976 bool "4GB"
945 depends on !X86_NUMAQ977 depends on !X86_NUMAQ
946 help978 ---help---
947 Select this if you have a 32-bit processor and between 1 and 4979 Select this if you have a 32-bit processor and between 1 and 4
948 gigabytes of physical RAM.980 gigabytes of physical RAM.
949 981
@@ -951,7 +983,7 @@ config HIGHMEM64G · 1 unmodified line
951 bool "64GB"983 bool "64GB"
952 depends on !M386 && !M486984 depends on !M386 && !M486
953 select X86_PAE985 select X86_PAE
954 help986 ---help---
955 Select this if you have a 32-bit processor and more than 4987 Select this if you have a 32-bit processor and more than 4
956 gigabytes of physical RAM.988 gigabytes of physical RAM.
957 989
@@ -962,7 +994,7 @@ choice · 4 unmodified lines
962 prompt "Memory split" if EMBEDDED994 prompt "Memory split" if EMBEDDED
963 default VMSPLIT_3G995 default VMSPLIT_3G
964 depends on X86_32996 depends on X86_32
965 help997 ---help---
966 Select the desired split between kernel and user memory.998 Select the desired split between kernel and user memory.
967 999
968 If the address range available to the kernel is less than the1000 If the address range available to the kernel is less than the
@@ -1008,20 +1040,20 @@ config HIGHMEM · 39 unmodified lines
1008config X86_PAE1040config X86_PAE
1009 bool "PAE (Physical Address Extension) Support"1041 bool "PAE (Physical Address Extension) Support"
1010 depends on X86_32 && !HIGHMEM4G1042 depends on X86_32 && !HIGHMEM4G
1011 help1043 ---help---
1012 PAE is required for NX support, and furthermore enables1044 PAE is required for NX support, and furthermore enables
1013 larger swapspace support for non-overcommit purposes. It1045 larger swapspace support for non-overcommit purposes. It
1014 has the cost of more pagetable lookup overhead, and also1046 has the cost of more pagetable lookup overhead, and also
1015 consumes more pagetable space per process.1047 consumes more pagetable space per process.
1016 1048
1017config ARCH_PHYS_ADDR_T_64BIT1049config ARCH_PHYS_ADDR_T_64BIT
1018 def_bool X86_64 || X86_PAE1050 def_bool X86_64 || X86_PAE
1019 1051
1020config DIRECT_GBPAGES1052config DIRECT_GBPAGES
1021 bool "Enable 1GB pages for kernel pagetables" if EMBEDDED1053 bool "Enable 1GB pages for kernel pagetables" if EMBEDDED
1022 default y1054 default y
1023 depends on X86_641055 depends on X86_64
1024 help1056 ---help---
1025 Allow the kernel linear mapping to use 1GB pages on CPUs that1057 Allow the kernel linear mapping to use 1GB pages on CPUs that
1026 support it. This can improve the kernel's performance a tiny bit by1058 support it. This can improve the kernel's performance a tiny bit by
1027 reducing TLB pressure. If in doubt, say "Y".1059 reducing TLB pressure. If in doubt, say "Y".
@@ -1031,9 +1063,8 @@ config NUMA · 3 unmodified lines
1031 bool "Numa Memory Allocation and Scheduler Support"1063 bool "Numa Memory Allocation and Scheduler Support"
1032 depends on SMP1064 depends on SMP
1033 depends on X86_64 || (X86_32 && HIGHMEM64G && (X86_NUMAQ || X86_BIGSMP || X86_SUMMIT && ACPI) && EXPERIMENTAL)1065 depends on X86_64 || (X86_32 && HIGHMEM64G && (X86_NUMAQ || X86_BIGSMP || X86_SUMMIT && ACPI) && EXPERIMENTAL)
1034 default n if X86_PC
1035 default y if (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP)1066 default y if (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP)
1036 help1067 ---help---
1037 Enable NUMA (Non Uniform Memory Access) support.1068 Enable NUMA (Non Uniform Memory Access) support.
1038 1069
1039 The kernel will try to allocate memory used by a CPU on the1070 The kernel will try to allocate memory used by a CPU on the
@@ -1056,19 +1087,19 @@ config K8_NUMA · 16 unmodified lines
1056 def_bool y1087 def_bool y
1057 prompt "Old style AMD Opteron NUMA detection"1088 prompt "Old style AMD Opteron NUMA detection"
1058 depends on X86_64 && NUMA && PCI1089 depends on X86_64 && NUMA && PCI
1059 help1090 ---help---
1060 Enable K8 NUMA node topology detection. You should say Y here if1091 Enable K8 NUMA node topology detection. You should say Y here if
1061 you have a multi processor AMD K8 system. This uses an old1092 you have a multi processor AMD K8 system. This uses an old
1062 method to read the NUMA configuration directly from the builtin1093 method to read the NUMA configuration directly from the builtin
1063 Northbridge of Opteron. It is recommended to use X86_64_ACPI_NUMA1094 Northbridge of Opteron. It is recommended to use X86_64_ACPI_NUMA
1064 instead, which also takes priority if both are compiled in.1095 instead, which also takes priority if both are compiled in.
1065 1096
1066config X86_64_ACPI_NUMA1097config X86_64_ACPI_NUMA
1067 def_bool y1098 def_bool y
1068 prompt "ACPI NUMA detection"1099 prompt "ACPI NUMA detection"
1069 depends on X86_64 && NUMA && ACPI && PCI1100 depends on X86_64 && NUMA && ACPI && PCI
1070 select ACPI_NUMA1101 select ACPI_NUMA
1071 help1102 ---help---
1072 Enable ACPI SRAT based node topology detection.1103 Enable ACPI SRAT based node topology detection.
1073 1104
1074# Some NUMA nodes have memory ranges that span1105# Some NUMA nodes have memory ranges that span
@@ -1083,7 +1114,7 @@ config NODES_SPAN_OTHER_NODES · 8 unmodified lines
1083config NUMA_EMU1114config NUMA_EMU
1084 bool "NUMA emulation"1115 bool "NUMA emulation"
1085 depends on X86_64 && NUMA1116 depends on X86_64 && NUMA
1086 help1117 ---help---
1087 Enable NUMA emulation. A flat machine will be split1118 Enable NUMA emulation. A flat machine will be split
1088 into virtual nodes when booted with "numa=fake=N", where N is the1119 into virtual nodes when booted with "numa=fake=N", where N is the
1089 number of nodes. This is only useful for debugging.1120 number of nodes. This is only useful for debugging.
@@ -1096,11 +1127,11 @@ config NODES_SHIFT · 6 unmodified lines
1096 default "4" if X86_NUMAQ1127 default "4" if X86_NUMAQ
1097 default "3"1128 default "3"
1098 depends on NEED_MULTIPLE_NODES1129 depends on NEED_MULTIPLE_NODES
1099 help1130 ---help---
1100 Specify the maximum number of NUMA Nodes available on the target1131 Specify the maximum number of NUMA Nodes available on the target
1101 system. Increases memory reserved to accomodate various tables.1132 system. Increases memory reserved to accomodate various tables.
1102 1133
1103config HAVE_ARCH_BOOTMEM_NODE1134config HAVE_ARCH_BOOTMEM
1104 def_bool y1135 def_bool y
1105 depends on X86_32 && NUMA1136 depends on X86_32 && NUMA
1106 1137
@@ -1134,7 +1165,7 @@ config ARCH_SPARSEMEM_DEFAULT · 27 unmodified lines
1134 1165
1135config ARCH_SPARSEMEM_ENABLE1166config ARCH_SPARSEMEM_ENABLE
1136 def_bool y1167 def_bool y
1137 depends on X86_64 || NUMA || (EXPERIMENTAL && X86_PC) || X86_GENERICARCH1168 depends on X86_64 || NUMA || (EXPERIMENTAL && X86_32) || X86_32_NON_STANDARD
1138 select SPARSEMEM_STATIC if X86_321169 select SPARSEMEM_STATIC if X86_32
1139 select SPARSEMEM_VMEMMAP_ENABLE if X86_641170 select SPARSEMEM_VMEMMAP_ENABLE if X86_64
1140 1171
@@ -1151,61 +1182,61 @@ source "mm/Kconfig" · 10 unmodified lines
1151config HIGHPTE1182config HIGHPTE
1152 bool "Allocate 3rd-level pagetables from highmem"1183 bool "Allocate 3rd-level pagetables from highmem"
1153 depends on X86_32 && (HIGHMEM4G || HIGHMEM64G)1184 depends on X86_32 && (HIGHMEM4G || HIGHMEM64G)
1154 help1185 ---help---
1155 The VM uses one page table entry for each page of physical memory.1186 The VM uses one page table entry for each page of physical memory.
1156 For systems with a lot of RAM, this can be wasteful of precious1187 For systems with a lot of RAM, this can be wasteful of precious
1157 low memory. Setting this option will put user-space page table1188 low memory. Setting this option will put user-space page table
1158 entries in high memory.1189 entries in high memory.
1159 1190
1160config X86_CHECK_BIOS_CORRUPTION1191config X86_CHECK_BIOS_CORRUPTION
1161 bool "Check for low memory corruption"1192 bool "Check for low memory corruption"
1162 help1193 ---help---
1163 Periodically check for memory corruption in low memory, which1194 Periodically check for memory corruption in low memory, which
1164 is suspected to be caused by BIOS. Even when enabled in the1195 is suspected to be caused by BIOS. Even when enabled in the
1165 configuration, it is disabled at runtime. Enable it by1196 configuration, it is disabled at runtime. Enable it by
1166 setting "memory_corruption_check=1" on the kernel command1197 setting "memory_corruption_check=1" on the kernel command
1167 line. By default it scans the low 64k of memory every 601198 line. By default it scans the low 64k of memory every 60
1168 seconds; see the memory_corruption_check_size and1199 seconds; see the memory_corruption_check_size and
1169 memory_corruption_check_period parameters in1200 memory_corruption_check_period parameters in
1170 Documentation/kernel-parameters.txt to adjust this.1201 Documentation/kernel-parameters.txt to adjust this.
1171 1202
1172 When enabled with the default parameters, this option has1203 When enabled with the default parameters, this option has
1173 almost no overhead, as it reserves a relatively small amount1204 almost no overhead, as it reserves a relatively small amount
1174 of memory and scans it infrequently. It both detects corruption1205 of memory and scans it infrequently. It both detects corruption
1175 and prevents it from affecting the running system.1206 and prevents it from affecting the running system.
1176 1207
1177 It is, however, intended as a diagnostic tool; if repeatable1208 It is, however, intended as a diagnostic tool; if repeatable
1178 BIOS-originated corruption always affects the same memory,1209 BIOS-originated corruption always affects the same memory,
1179 you can use memmap= to prevent the kernel from using that1210 you can use memmap= to prevent the kernel from using that
1180 memory.1211 memory.
1181 1212
1182config X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK1213config X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK
1183 bool "Set the default setting of memory_corruption_check"1214 bool "Set the default setting of memory_corruption_check"
1184 depends on X86_CHECK_BIOS_CORRUPTION1215 depends on X86_CHECK_BIOS_CORRUPTION
1185 default y1216 default y
1186 help1217 ---help---
1187 Set whether the default state of memory_corruption_check is1218 Set whether the default state of memory_corruption_check is
1188 on or off.1219 on or off.
1189 1220
1190config X86_RESERVE_LOW_64K1221config X86_RESERVE_LOW_64K
1191 bool "Reserve low 64K of RAM on AMI/Phoenix BIOSen"1222 bool "Reserve low 64K of RAM on AMI/Phoenix BIOSen"
1192 default y1223 default y
1193 help1224 ---help---
1194 Reserve the first 64K of physical RAM on BIOSes that are known1225 Reserve the first 64K of physical RAM on BIOSes that are known
1195 to potentially corrupt that memory range. A numbers of BIOSes are1226 to potentially corrupt that memory range. A numbers of BIOSes are
1196 known to utilize this area during suspend/resume, so it must not1227 known to utilize this area during suspend/resume, so it must not
1197 be used by the kernel.1228 be used by the kernel.
1198 1229
1199 Set this to N if you are absolutely sure that you trust the BIOS1230 Set this to N if you are absolutely sure that you trust the BIOS
1200 to get all its memory reservations and usages right.1231 to get all its memory reservations and usages right.
1201 1232
1202 If you have doubts about the BIOS (e.g. suspend/resume does not1233 If you have doubts about the BIOS (e.g. suspend/resume does not
1203 work or there's kernel crashes after certain hardware hotplug1234 work or there's kernel crashes after certain hardware hotplug
1204 events) and it's not AMI or Phoenix, then you might want to enable1235 events) and it's not AMI or Phoenix, then you might want to enable
1205 X86_CHECK_BIOS_CORRUPTION=y to allow the kernel to check typical1236 X86_CHECK_BIOS_CORRUPTION=y to allow the kernel to check typical
1206 corruption patterns.1237 corruption patterns.
1207 1238
1208 Say Y if unsure.1239 Say Y if unsure.
1209 1240
1210config MATH_EMULATION1241config MATH_EMULATION
1211 bool1242 bool
@@ -1271,7 +1302,7 @@ config MTRR_SANITIZER · 59 unmodified lines
1271 def_bool y1302 def_bool y
1272 prompt "MTRR cleanup support"1303 prompt "MTRR cleanup support"
1273 depends on MTRR1304 depends on MTRR
1274 help1305 ---help---
1275 Convert MTRR layout from continuous to discrete, so X drivers can1306 Convert MTRR layout from continuous to discrete, so X drivers can
1276 add writeback entries.1307 add writeback entries.
1277 1308
@@ -1286,7 +1317,7 @@ config MTRR_SANITIZER_ENABLE_DEFAULT · 8 unmodified lines
1286 range 0 11317 range 0 1
1287 default "0"1318 default "0"
1288 depends on MTRR_SANITIZER1319 depends on MTRR_SANITIZER
1289 help1320 ---help---
1290 Enable mtrr cleanup default value1321 Enable mtrr cleanup default value
1291 1322
1292config MTRR_SANITIZER_SPARE_REG_NR_DEFAULT1323config MTRR_SANITIZER_SPARE_REG_NR_DEFAULT
@@ -1294,7 +1325,7 @@ config MTRR_SANITIZER_SPARE_REG_NR_DEFAULT · 1 unmodified line
1294 range 0 71325 range 0 7
1295 default "1"1326 default "1"
1296 depends on MTRR_SANITIZER1327 depends on MTRR_SANITIZER
1297 help1328 ---help---
1298 mtrr cleanup spare entries default, it can be changed via1329 mtrr cleanup spare entries default, it can be changed via
1299 mtrr_spare_reg_nr=N on the kernel command line.1330 mtrr_spare_reg_nr=N on the kernel command line.
1300 1331
@@ -1302,7 +1333,7 @@ config X86_PAT · 1 unmodified line
1302 bool1333 bool
1303 prompt "x86 PAT support"1334 prompt "x86 PAT support"
1304 depends on MTRR1335 depends on MTRR
1305 help1336 ---help---
1306 Use PAT attributes to setup page level cache control.1337 Use PAT attributes to setup page level cache control.
1307 1338
1308 PATs are the modern equivalents of MTRRs and are much more1339 PATs are the modern equivalents of MTRRs and are much more
@@ -1317,20 +1348,20 @@ config EFI · 8 unmodified lines
1317 bool "EFI runtime service support"1348 bool "EFI runtime service support"
1318 depends on ACPI1349 depends on ACPI
1319 ---help---1350 ---help---
1320 This enables the kernel to use EFI runtime services that are1351 This enables the kernel to use EFI runtime services that are
1321 available (such as the EFI variable services).1352 available (such as the EFI variable services).
1322 1353
1323 This option is only useful on systems that have EFI firmware.1354 This option is only useful on systems that have EFI firmware.
1324 In addition, you should use the latest ELILO loader available1355 In addition, you should use the latest ELILO loader available
1325 at <http://elilo.sourceforge.net> in order to take advantage1356 at <http://elilo.sourceforge.net> in order to take advantage
1326 of EFI runtime services. However, even with this option, the1357 of EFI runtime services. However, even with this option, the
1327 resultant kernel should continue to boot on existing non-EFI1358 resultant kernel should continue to boot on existing non-EFI
1328 platforms.1359 platforms.
1329 1360
1330config SECCOMP1361config SECCOMP
1331 def_bool y1362 def_bool y
1332 prompt "Enable seccomp to safely compute untrusted bytecode"1363 prompt "Enable seccomp to safely compute untrusted bytecode"
1333 help1364 ---help---
1334 This kernel feature is useful for number crunching applications1365 This kernel feature is useful for number crunching applications
1335 that may need to compute untrusted bytecode during their1366 that may need to compute untrusted bytecode during their
1336 execution. By using pipes or other transports made available to1367 execution. By using pipes or other transports made available to
@@ -1343,13 +1374,16 @@ config SECCOMP · 6 unmodified lines
1343 1374
1344 If unsure, say Y. Only embedded should say N here.1375 If unsure, say Y. Only embedded should say N here.
1345 1376
1377config CC_STACKPROTECTOR_ALL
1378 bool
1379
1346config CC_STACKPROTECTOR1380config CC_STACKPROTECTOR
1347 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"1381 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1348 depends on X86_64 && EXPERIMENTAL && BROKEN1382 select CC_STACKPROTECTOR_ALL
1349 help1383 ---help---
1350 This option turns on the -fstack-protector GCC feature. This1384 This option turns on the -fstack-protector GCC feature. This
1351 feature puts, at the beginning of critical functions, a canary1385 feature puts, at the beginning of functions, a canary value on
1352 value on the stack just before the return address, and validates1386 the stack just before the return address, and validates
1353 the value just before actually returning. Stack based buffer1387 the value just before actually returning. Stack based buffer
1354 overflows (that need to overwrite this return address) now also1388 overflows (that need to overwrite this return address) now also
1355 overwrite the canary, which gets detected and the attack is then1389 overwrite the canary, which gets detected and the attack is then
@@ -1357,22 +1391,14 @@ config CC_STACKPROTECTOR · 1 unmodified line
1357 1391
1358 This feature requires gcc version 4.2 or above, or a distribution1392 This feature requires gcc version 4.2 or above, or a distribution
1359 gcc with the feature backported. Older versions are automatically1393 gcc with the feature backported. Older versions are automatically
1360 detected and for those versions, this configuration option is ignored.1394 detected and for those versions, this configuration option is
1361 1395 ignored. (and a warning is printed during bootup)
1362config CC_STACKPROTECTOR_ALL
1363 bool "Use stack-protector for all functions"
1364 depends on CC_STACKPROTECTOR
1365 help
1366 Normally, GCC only inserts the canary value protection for
1367 functions that use large-ish on-stack buffers. By enabling
1368 this option, GCC will be asked to do this for ALL functions.
1369 1396
1370source kernel/Kconfig.hz1397source kernel/Kconfig.hz
1371 1398
1372config KEXEC1399config KEXEC
1373 bool "kexec system call"1400 bool "kexec system call"
1374 depends on X86_BIOS_REBOOT1401 ---help---
1375 help
1376 kexec is a system call that implements the ability to shutdown your1402 kexec is a system call that implements the ability to shutdown your
1377 current kernel, and to start another kernel. It is like a reboot1403 current kernel, and to start another kernel. It is like a reboot
1378 but it is independent of the system firmware. And like a reboot1404 but it is independent of the system firmware. And like a reboot
@@ -1389,7 +1415,7 @@ config KEXEC · 10 unmodified lines
1389config CRASH_DUMP1415config CRASH_DUMP
1390 bool "kernel crash dumps"1416 bool "kernel crash dumps"
1391 depends on X86_64 || (X86_32 && HIGHMEM)1417 depends on X86_64 || (X86_32 && HIGHMEM)
1392 help1418 ---help---
1393 Generate crash dump after being started by kexec.1419 Generate crash dump after being started by kexec.
1394 This should be normally only set in special crash dump kernels1420 This should be normally only set in special crash dump kernels
1395 which are loaded in the main kernel with kexec-tools into1421 which are loaded in the main kernel with kexec-tools into
@@ -1404,7 +1430,7 @@ config KEXEC_JUMP · 8 unmodified lines
1404 bool "kexec jump (EXPERIMENTAL)"1430 bool "kexec jump (EXPERIMENTAL)"
1405 depends on EXPERIMENTAL1431 depends on EXPERIMENTAL
1406 depends on KEXEC && HIBERNATION && X86_321432 depends on KEXEC && HIBERNATION && X86_32
1407 help1433 ---help---
1408 Jump between original kernel and kexeced kernel and invoke1434 Jump between original kernel and kexeced kernel and invoke
1409 code in physical address mode via KEXEC1435 code in physical address mode via KEXEC
1410 1436
@@ -1413,7 +1439,7 @@ config PHYSICAL_START · 2 unmodified lines
1413 default "0x1000000" if X86_NUMAQ1439 default "0x1000000" if X86_NUMAQ
1414 default "0x200000" if X86_641440 default "0x200000" if X86_64
1415 default "0x100000"1441 default "0x100000"
1416 help1442 ---help---
1417 This gives the physical address where the kernel is loaded.1443 This gives the physical address where the kernel is loaded.
1418 1444
1419 If kernel is a not relocatable (CONFIG_RELOCATABLE=n) then1445 If kernel is a not relocatable (CONFIG_RELOCATABLE=n) then
@@ -1454,7 +1480,7 @@ config PHYSICAL_START · 34 unmodified lines
1454config RELOCATABLE1480config RELOCATABLE
1455 bool "Build a relocatable kernel (EXPERIMENTAL)"1481 bool "Build a relocatable kernel (EXPERIMENTAL)"
1456 depends on EXPERIMENTAL1482 depends on EXPERIMENTAL
1457 help1483 ---help---
1458 This builds a kernel image that retains relocation information1484 This builds a kernel image that retains relocation information
1459 so it can be loaded someplace besides the default 1MB.1485 so it can be loaded someplace besides the default 1MB.
1460 The relocations tend to make the kernel binary about 10% larger,1486 The relocations tend to make the kernel binary about 10% larger,
@@ -1474,7 +1500,7 @@ config PHYSICAL_ALIGN · 13 unmodified lines
1474 default "0x100000" if X86_321500 default "0x100000" if X86_32
1475 default "0x200000" if X86_641501 default "0x200000" if X86_64
1476 range 0x2000 0x4000001502 range 0x2000 0x400000
1477 help1503 ---help---
1478 This value puts the alignment restrictions on physical address1504 This value puts the alignment restrictions on physical address
1479 where kernel is loaded and run from. Kernel is compiled for an1505 where kernel is loaded and run from. Kernel is compiled for an
1480 address which meets above alignment restriction.1506 address which meets above alignment restriction.
@@ -1495,7 +1521,7 @@ config PHYSICAL_ALIGN · 14 unmodified lines
1495 1521
1496config HOTPLUG_CPU1522config HOTPLUG_CPU
1497 bool "Support for hot-pluggable CPUs"1523 bool "Support for hot-pluggable CPUs"
1498 depends on SMP && HOTPLUG && !X86_VOYAGER1524 depends on SMP && HOTPLUG
1499 ---help---1525 ---help---
1500 Say Y here to allow turning CPUs off and on. CPUs can be1526 Say Y here to allow turning CPUs off and on. CPUs can be
1501 controlled through /sys/devices/system/cpu.1527 controlled through /sys/devices/system/cpu.
@@ -1507,7 +1533,7 @@ config COMPAT_VDSO · 5 unmodified lines
1507 def_bool y1533 def_bool y
1508 prompt "Compat VDSO support"1534 prompt "Compat VDSO support"
1509 depends on X86_32 || IA32_EMULATION1535 depends on X86_32 || IA32_EMULATION
1510 help1536 ---help---
1511 Map the 32-bit VDSO to the predictable old-style address too.1537 Map the 32-bit VDSO to the predictable old-style address too.
1512 ---help---1538 ---help---
1513 Say N here if you are running a sufficiently recent glibc1539 Say N here if you are running a sufficiently recent glibc
@@ -1519,7 +1545,7 @@ config COMPAT_VDSO · 5 unmodified lines
1519config CMDLINE_BOOL1545config CMDLINE_BOOL
1520 bool "Built-in kernel command line"1546 bool "Built-in kernel command line"
1521 default n1547 default n
1522 help1548 ---help---
1523 Allow for specifying boot arguments to the kernel at1549 Allow for specifying boot arguments to the kernel at
1524 build time. On some systems (e.g. embedded ones), it is1550 build time. On some systems (e.g. embedded ones), it is
1525 necessary or convenient to provide some or all of the1551 necessary or convenient to provide some or all of the
@@ -1537,7 +1563,7 @@ config CMDLINE · 11 unmodified lines
1537 string "Built-in kernel command string"1563 string "Built-in kernel command string"
1538 depends on CMDLINE_BOOL1564 depends on CMDLINE_BOOL
1539 default ""1565 default ""
1540 help1566 ---help---
1541 Enter arguments here that should be compiled into the kernel1567 Enter arguments here that should be compiled into the kernel
1542 image and used at boot time. If the boot loader provides a1568 image and used at boot time. If the boot loader provides a
1543 command line at boot time, it is appended to this string to1569 command line at boot time, it is appended to this string to
@@ -1554,7 +1580,7 @@ config CMDLINE_OVERRIDE · 10 unmodified lines
1554 bool "Built-in command line overrides boot loader arguments"1580 bool "Built-in command line overrides boot loader arguments"
1555 default n1581 default n
1556 depends on CMDLINE_BOOL1582 depends on CMDLINE_BOOL
1557 help1583 ---help---
1558 Set this option to 'Y' to have the kernel ignore the boot loader1584 Set this option to 'Y' to have the kernel ignore the boot loader
1559 command line, and use ONLY the built-in command line.1585 command line, and use ONLY the built-in command line.
1560 1586
@@ -1576,7 +1602,6 @@ config HAVE_ARCH_EARLY_PFN_TO_NID · 15 unmodified lines
1576 depends on NUMA1602 depends on NUMA
1577 1603
1578menu "Power management and ACPI options"1604menu "Power management and ACPI options"
1579 depends on !X86_VOYAGER
1580 1605
1581config ARCH_HIBERNATION_HEADER1606config ARCH_HIBERNATION_HEADER
1582 def_bool y1607 def_bool y
@@ -1654,7 +1679,7 @@ if APM · 71 unmodified lines
1654 1679
1655config APM_IGNORE_USER_SUSPEND1680config APM_IGNORE_USER_SUSPEND
1656 bool "Ignore USER SUSPEND"1681 bool "Ignore USER SUSPEND"
1657 help1682 ---help---
1658 This option will ignore USER SUSPEND requests. On machines with a1683 This option will ignore USER SUSPEND requests. On machines with a
1659 compliant APM BIOS, you want to say N. However, on the NEC Versa M1684 compliant APM BIOS, you want to say N. However, on the NEC Versa M
1660 series notebooks, it is necessary to say Y because of a BIOS bug.1685 series notebooks, it is necessary to say Y because of a BIOS bug.
@@ -1678,7 +1703,7 @@ config APM_DO_ENABLE · 17 unmodified lines
1678 1703
1679config APM_CPU_IDLE1704config APM_CPU_IDLE
1680 bool "Make CPU Idle calls when idle"1705 bool "Make CPU Idle calls when idle"
1681 help1706 ---help---
1682 Enable calls to APM CPU Idle/CPU Busy inside the kernel's idle loop.1707 Enable calls to APM CPU Idle/CPU Busy inside the kernel's idle loop.
1683 On some machines, this can activate improved power savings, such as1708 On some machines, this can activate improved power savings, such as
1684 a slowed CPU clock rate, when the machine is idle. These idle calls1709 a slowed CPU clock rate, when the machine is idle. These idle calls
@@ -1689,7 +1714,7 @@ config APM_CPU_IDLE · 4 unmodified lines
1689 1714
1690config APM_DISPLAY_BLANK1715config APM_DISPLAY_BLANK
1691 bool "Enable console blanking using APM"1716 bool "Enable console blanking using APM"
1692 help1717 ---help---
1693 Enable console blanking using the APM. Some laptops can use this to1718 Enable console blanking using the APM. Some laptops can use this to
1694 turn off the LCD backlight when the screen blanker of the Linux1719 turn off the LCD backlight when the screen blanker of the Linux
1695 virtual console blanks the screen. Note that this is only used by1720 virtual console blanks the screen. Note that this is only used by
@@ -1702,7 +1727,7 @@ config APM_DISPLAY_BLANK · 6 unmodified lines
1702 1727
1703config APM_ALLOW_INTS1728config APM_ALLOW_INTS
1704 bool "Allow interrupts during APM BIOS calls"1729 bool "Allow interrupts during APM BIOS calls"
1705 help1730 ---help---
1706 Normally we disable external interrupts while we are making calls to1731 Normally we disable external interrupts while we are making calls to
1707 the APM BIOS as a measure to lessen the effects of a badly behaving1732 the APM BIOS as a measure to lessen the effects of a badly behaving
1708 BIOS implementation. The BIOS should reenable interrupts if it1733 BIOS implementation. The BIOS should reenable interrupts if it
@@ -1727,7 +1752,7 @@ config PCI · 18 unmodified lines
1727 bool "PCI support"1752 bool "PCI support"
1728 default y1753 default y
1729 select ARCH_SUPPORTS_MSI if (X86_LOCAL_APIC && X86_IO_APIC)1754 select ARCH_SUPPORTS_MSI if (X86_LOCAL_APIC && X86_IO_APIC)
1730 help1755 ---help---
1731 Find out whether you have a PCI motherboard. PCI is the name of a1756 Find out whether you have a PCI motherboard. PCI is the name of a
1732 bus system, i.e. the way the CPU talks to the other stuff inside1757 bus system, i.e. the way the CPU talks to the other stuff inside
1733 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or1758 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
@@ -1798,7 +1823,7 @@ config PCI_MMCONFIG · 64 unmodified lines
1798config DMAR1823config DMAR
1799 bool "Support for DMA Remapping Devices (EXPERIMENTAL)"1824 bool "Support for DMA Remapping Devices (EXPERIMENTAL)"
1800 depends on X86_64 && PCI_MSI && ACPI && EXPERIMENTAL1825 depends on X86_64 && PCI_MSI && ACPI && EXPERIMENTAL
1801 help1826 ---help---
1802 DMA remapping (DMAR) devices support enables independent address1827 DMA remapping (DMAR) devices support enables independent address
1803 translations for Direct Memory Access (DMA) from devices.1828 translations for Direct Memory Access (DMA) from devices.
1804 These DMA remapping devices are reported via ACPI tables1829 These DMA remapping devices are reported via ACPI tables
@@ -1820,29 +1845,30 @@ config DMAR_GFX_WA · 15 unmodified lines
1820 def_bool y1845 def_bool y
1821 prompt "Support for Graphics workaround"1846 prompt "Support for Graphics workaround"
1822 depends on DMAR1847 depends on DMAR
1823 help1848 ---help---
1824 Current Graphics drivers tend to use physical address1849 Current Graphics drivers tend to use physical address
1825 for DMA and avoid using DMA APIs. Setting this config1850 for DMA and avoid using DMA APIs. Setting this config
1826 option permits the IOMMU driver to set a unity map for1851 option permits the IOMMU driver to set a unity map for
1827 all the OS-visible memory. Hence the driver can continue1852 all the OS-visible memory. Hence the driver can continue
1828 to use physical addresses for DMA.1853 to use physical addresses for DMA.
1829 1854
1830config DMAR_FLOPPY_WA1855config DMAR_FLOPPY_WA
1831 def_bool y1856 def_bool y
1832 depends on DMAR1857 depends on DMAR
1833 help1858 ---help---
1834 Floppy disk drivers are know to bypass DMA API calls1859 Floppy disk drivers are know to bypass DMA API calls
1835 thereby failing to work when IOMMU is enabled. This1860 thereby failing to work when IOMMU is enabled. This
1836 workaround will setup a 1:1 mapping for the first1861 workaround will setup a 1:1 mapping for the first
1837 16M to make floppy (an ISA device) work.1862 16M to make floppy (an ISA device) work.
1838 1863
1839config INTR_REMAP1864config INTR_REMAP
1840 bool "Support for Interrupt Remapping (EXPERIMENTAL)"1865 bool "Support for Interrupt Remapping (EXPERIMENTAL)"
1841 depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI && EXPERIMENTAL1866 depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI && EXPERIMENTAL
1842 help1867 select X86_X2APIC
1843 Supports Interrupt remapping for IO-APIC and MSI devices.1868 ---help---
1844 To use x2apic mode in the CPU's which support x2APIC enhancements or1869 Supports Interrupt remapping for IO-APIC and MSI devices.
1845 to support platforms with CPU's having > 8 bit APIC ID, say Y.1870 To use x2apic mode in the CPU's which support x2APIC enhancements or
1871 to support platforms with CPU's having > 8 bit APIC ID, say Y.
1846 1872
1847source "drivers/pci/pcie/Kconfig"1873source "drivers/pci/pcie/Kconfig"
1848 1874
@@ -1856,8 +1882,7 @@ if X86_32 · 7 unmodified lines
1856 1882
1857config ISA1883config ISA
1858 bool "ISA support"1884 bool "ISA support"
1859 depends on !X86_VOYAGER1885 ---help---
1860 help
1861 Find out whether you have ISA slots on your motherboard. ISA is the1886 Find out whether you have ISA slots on your motherboard. ISA is the
1862 name of a bus system, i.e. the way the CPU talks to the other stuff1887 name of a bus system, i.e. the way the CPU talks to the other stuff
1863 inside your box. Other bus systems are PCI, EISA, MicroChannel1888 inside your box. Other bus systems are PCI, EISA, MicroChannel
@@ -1883,9 +1908,8 @@ config EISA · 19 unmodified lines
1883source "drivers/eisa/Kconfig"1908source "drivers/eisa/Kconfig"
1884 1909
1885config MCA1910config MCA
1886 bool "MCA support" if !X86_VOYAGER1911 bool "MCA support"
1887 default y if X86_VOYAGER1912 ---help---
1888 help
1889 MicroChannel Architecture is found in some IBM PS/2 machines and1913 MicroChannel Architecture is found in some IBM PS/2 machines and
1890 laptops. It is a bus system similar to PCI or ISA. See1914 laptops. It is a bus system similar to PCI or ISA. See
1891 <file:Documentation/mca.txt> (and especially the web page given1915 <file:Documentation/mca.txt> (and especially the web page given
@@ -1895,8 +1919,7 @@ source "drivers/mca/Kconfig" · 3 unmodified lines
1895 1919
1896config SCx2001920config SCx200
1897 tristate "NatSemi SCx200 support"1921 tristate "NatSemi SCx200 support"
1898 depends on !X86_VOYAGER1922 ---help---
1899 help
1900 This provides basic support for National Semiconductor's1923 This provides basic support for National Semiconductor's
1901 (now AMD's) Geode processors. The driver probes for the1924 (now AMD's) Geode processors. The driver probes for the
1902 PCI-IDs of several on-chip devices, so its a good dependency1925 PCI-IDs of several on-chip devices, so its a good dependency
@@ -1908,7 +1931,7 @@ config SCx200HR_TIMER · 5 unmodified lines
1908 tristate "NatSemi SCx200 27MHz High-Resolution Timer Support"1931 tristate "NatSemi SCx200 27MHz High-Resolution Timer Support"
1909 depends on SCx200 && GENERIC_TIME1932 depends on SCx200 && GENERIC_TIME
1910 default y1933 default y
1911 help1934 ---help---
1912 This driver provides a clocksource built upon the on-chip1935 This driver provides a clocksource built upon the on-chip
1913 27MHz high-resolution timer. Its also a workaround for1936 27MHz high-resolution timer. Its also a workaround for
1914 NSC Geode SC-1100's buggy TSC, which loses time when the1937 NSC Geode SC-1100's buggy TSC, which loses time when the
@@ -1919,7 +1942,7 @@ config GEODE_MFGPT_TIMER · 4 unmodified lines
1919 def_bool y1942 def_bool y
1920 prompt "Geode Multi-Function General Purpose Timer (MFGPT) events"1943 prompt "Geode Multi-Function General Purpose Timer (MFGPT) events"
1921 depends on MGEODE_LX && GENERIC_TIME && GENERIC_CLOCKEVENTS1944 depends on MGEODE_LX && GENERIC_TIME && GENERIC_CLOCKEVENTS
1922 help1945 ---help---
1923 This driver provides a clock event source based on the MFGPT1946 This driver provides a clock event source based on the MFGPT
1924 timer(s) in the CS5535 and CS5536 companion chip for the geode.1947 timer(s) in the CS5535 and CS5536 companion chip for the geode.
1925 MFGPTs have a better resolution and max interval than the1948 MFGPTs have a better resolution and max interval than the
@@ -1928,7 +1951,7 @@ config GEODE_MFGPT_TIMER · 2 unmodified lines
1928config OLPC1951config OLPC
1929 bool "One Laptop Per Child support"1952 bool "One Laptop Per Child support"
1930 default n1953 default n
1931 help1954 ---help---
1932 Add support for detecting the unique features of the OLPC1955 Add support for detecting the unique features of the OLPC
1933 XO hardware.1956 XO hardware.
1934 1957
@@ -1953,16 +1976,16 @@ config IA32_EMULATION · 18 unmodified lines
1953 bool "IA32 Emulation"1976 bool "IA32 Emulation"
1954 depends on X86_641977 depends on X86_64
1955 select COMPAT_BINFMT_ELF1978 select COMPAT_BINFMT_ELF
1956 help1979 ---help---
1957 Include code to run 32-bit programs under a 64-bit kernel. You should1980 Include code to run 32-bit programs under a 64-bit kernel. You should
1958 likely turn this on, unless you're 100% sure that you don't have any1981 likely turn this on, unless you're 100% sure that you don't have any
1959 32-bit programs left.1982 32-bit programs left.
1960 1983
1961config IA32_AOUT1984config IA32_AOUT
1962 tristate "IA32 a.out support"1985 tristate "IA32 a.out support"
1963 depends on IA32_EMULATION1986 depends on IA32_EMULATION
1964 help1987 ---help---
1965 Support old a.out binaries in the 32bit emulation.1988 Support old a.out binaries in the 32bit emulation.
1966 1989
1967config COMPAT1990config COMPAT
1968 def_bool y1991 def_bool y
arch/x86/Kconfig.cpu+39−41
@@ -50,7 +50,7 @@ config M386 · 49 unmodified lines
50config M48650config M486
51 bool "486"51 bool "486"
52 depends on X86_3252 depends on X86_32
53 help53 ---help---
54 Select this for a 486 series processor, either Intel or one of the54 Select this for a 486 series processor, either Intel or one of the
55 compatible processors from AMD, Cyrix, IBM, or Intel. Includes DX,55 compatible processors from AMD, Cyrix, IBM, or Intel. Includes DX,
56 DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or56 DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or
@@ -59,7 +59,7 @@ config M486 · 2 unmodified lines
59config M58659config M586
60 bool "586/K5/5x86/6x86/6x86MX"60 bool "586/K5/5x86/6x86/6x86MX"
61 depends on X86_3261 depends on X86_32
62 help62 ---help---
63 Select this for an 586 or 686 series processor such as the AMD K5,63 Select this for an 586 or 686 series processor such as the AMD K5,
64 the Cyrix 5x86, 6x86 and 6x86MX. This choice does not64 the Cyrix 5x86, 6x86 and 6x86MX. This choice does not
65 assume the RDTSC (Read Time Stamp Counter) instruction.65 assume the RDTSC (Read Time Stamp Counter) instruction.
@@ -67,21 +67,21 @@ config M586 · 1 unmodified line
67config M586TSC67config M586TSC
68 bool "Pentium-Classic"68 bool "Pentium-Classic"
69 depends on X86_3269 depends on X86_32
70 help70 ---help---
71 Select this for a Pentium Classic processor with the RDTSC (Read71 Select this for a Pentium Classic processor with the RDTSC (Read
72 Time Stamp Counter) instruction for benchmarking.72 Time Stamp Counter) instruction for benchmarking.
73 73
74config M586MMX74config M586MMX
75 bool "Pentium-MMX"75 bool "Pentium-MMX"
76 depends on X86_3276 depends on X86_32
77 help77 ---help---
78 Select this for a Pentium with the MMX graphics/multimedia78 Select this for a Pentium with the MMX graphics/multimedia
79 extended instructions.79 extended instructions.
80 80
81config M68681config M686
82 bool "Pentium-Pro"82 bool "Pentium-Pro"
83 depends on X86_3283 depends on X86_32
84 help84 ---help---
85 Select this for Intel Pentium Pro chips. This enables the use of85 Select this for Intel Pentium Pro chips. This enables the use of
86 Pentium Pro extended instructions, and disables the init-time guard86 Pentium Pro extended instructions, and disables the init-time guard
87 against the f00f bug found in earlier Pentiums.87 against the f00f bug found in earlier Pentiums.
@@ -89,7 +89,7 @@ config M686 · 1 unmodified line
89config MPENTIUMII89config MPENTIUMII
90 bool "Pentium-II/Celeron(pre-Coppermine)"90 bool "Pentium-II/Celeron(pre-Coppermine)"
91 depends on X86_3291 depends on X86_32
92 help92 ---help---
93 Select this for Intel chips based on the Pentium-II and93 Select this for Intel chips based on the Pentium-II and
94 pre-Coppermine Celeron core. This option enables an unaligned94 pre-Coppermine Celeron core. This option enables an unaligned
95 copy optimization, compiles the kernel with optimization flags95 copy optimization, compiles the kernel with optimization flags
@@ -99,7 +99,7 @@ config MPENTIUMII · 3 unmodified lines
99config MPENTIUMIII99config MPENTIUMIII
100 bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"100 bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
101 depends on X86_32101 depends on X86_32
102 help102 ---help---
103 Select this for Intel chips based on the Pentium-III and103 Select this for Intel chips based on the Pentium-III and
104 Celeron-Coppermine core. This option enables use of some104 Celeron-Coppermine core. This option enables use of some
105 extended prefetch instructions in addition to the Pentium II105 extended prefetch instructions in addition to the Pentium II
@@ -108,14 +108,14 @@ config MPENTIUMIII · 2 unmodified lines
108config MPENTIUMM108config MPENTIUMM
109 bool "Pentium M"109 bool "Pentium M"
110 depends on X86_32110 depends on X86_32
111 help111 ---help---
112 Select this for Intel Pentium M (not Pentium-4 M)112 Select this for Intel Pentium M (not Pentium-4 M)
113 notebook chips.113 notebook chips.
114 114
115config MPENTIUM4115config MPENTIUM4
116 bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"116 bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
117 depends on X86_32117 depends on X86_32
118 help118 ---help---
119 Select this for Intel Pentium 4 chips. This includes the119 Select this for Intel Pentium 4 chips. This includes the
120 Pentium 4, Pentium D, P4-based Celeron and Xeon, and120 Pentium 4, Pentium D, P4-based Celeron and Xeon, and
121 Pentium-4 M (not Pentium M) chips. This option enables compile121 Pentium-4 M (not Pentium M) chips. This option enables compile
@@ -151,7 +151,7 @@ config MPENTIUM4 · 29 unmodified lines
151config MK6151config MK6
152 bool "K6/K6-II/K6-III"152 bool "K6/K6-II/K6-III"
153 depends on X86_32153 depends on X86_32
154 help154 ---help---
155 Select this for an AMD K6-family processor. Enables use of155 Select this for an AMD K6-family processor. Enables use of
156 some extended instructions, and passes appropriate optimization156 some extended instructions, and passes appropriate optimization
157 flags to GCC.157 flags to GCC.
@@ -159,14 +159,14 @@ config MK6 · 1 unmodified line
159config MK7159config MK7
160 bool "Athlon/Duron/K7"160 bool "Athlon/Duron/K7"
161 depends on X86_32161 depends on X86_32
162 help162 ---help---
163 Select this for an AMD Athlon K7-family processor. Enables use of163 Select this for an AMD Athlon K7-family processor. Enables use of
164 some extended instructions, and passes appropriate optimization164 some extended instructions, and passes appropriate optimization
165 flags to GCC.165 flags to GCC.
166 166
167config MK8167config MK8
168 bool "Opteron/Athlon64/Hammer/K8"168 bool "Opteron/Athlon64/Hammer/K8"
169 help169 ---help---
170 Select this for an AMD Opteron or Athlon64 Hammer-family processor.170 Select this for an AMD Opteron or Athlon64 Hammer-family processor.
171 Enables use of some extended instructions, and passes appropriate171 Enables use of some extended instructions, and passes appropriate
172 optimization flags to GCC.172 optimization flags to GCC.
@@ -174,7 +174,7 @@ config MK8 · 1 unmodified line
174config MCRUSOE174config MCRUSOE
175 bool "Crusoe"175 bool "Crusoe"
176 depends on X86_32176 depends on X86_32
177 help177 ---help---
178 Select this for a Transmeta Crusoe processor. Treats the processor178 Select this for a Transmeta Crusoe processor. Treats the processor
179 like a 586 with TSC, and sets some GCC optimization flags (like a179 like a 586 with TSC, and sets some GCC optimization flags (like a
180 Pentium Pro with no alignment requirements).180 Pentium Pro with no alignment requirements).
@@ -182,13 +182,13 @@ config MCRUSOE · 1 unmodified line
182config MEFFICEON182config MEFFICEON
183 bool "Efficeon"183 bool "Efficeon"
184 depends on X86_32184 depends on X86_32
185 help185 ---help---
186 Select this for a Transmeta Efficeon processor.186 Select this for a Transmeta Efficeon processor.
187 187
188config MWINCHIPC6188config MWINCHIPC6
189 bool "Winchip-C6"189 bool "Winchip-C6"
190 depends on X86_32190 depends on X86_32
191 help191 ---help---
192 Select this for an IDT Winchip C6 chip. Linux and GCC192 Select this for an IDT Winchip C6 chip. Linux and GCC
193 treat this chip as a 586TSC with some extended instructions193 treat this chip as a 586TSC with some extended instructions
194 and alignment requirements.194 and alignment requirements.
@@ -196,7 +196,7 @@ config MWINCHIPC6 · 1 unmodified line
196config MWINCHIP3D196config MWINCHIP3D
197 bool "Winchip-2/Winchip-2A/Winchip-3"197 bool "Winchip-2/Winchip-2A/Winchip-3"
198 depends on X86_32198 depends on X86_32
199 help199 ---help---
200 Select this for an IDT Winchip-2, 2A or 3. Linux and GCC200 Select this for an IDT Winchip-2, 2A or 3. Linux and GCC
201 treat this chip as a 586TSC with some extended instructions201 treat this chip as a 586TSC with some extended instructions
202 and alignment requirements. Also enable out of order memory202 and alignment requirements. Also enable out of order memory
@@ -206,19 +206,19 @@ config MWINCHIP3D · 3 unmodified lines
206config MGEODEGX1206config MGEODEGX1
207 bool "GeodeGX1"207 bool "GeodeGX1"
208 depends on X86_32208 depends on X86_32
209 help209 ---help---
210 Select this for a Geode GX1 (Cyrix MediaGX) chip.210 Select this for a Geode GX1 (Cyrix MediaGX) chip.
211 211
212config MGEODE_LX212config MGEODE_LX
213 bool "Geode GX/LX"213 bool "Geode GX/LX"
214 depends on X86_32214 depends on X86_32
215 help215 ---help---
216 Select this for AMD Geode GX and LX processors.216 Select this for AMD Geode GX and LX processors.
217 217
218config MCYRIXIII218config MCYRIXIII
219 bool "CyrixIII/VIA-C3"219 bool "CyrixIII/VIA-C3"
220 depends on X86_32220 depends on X86_32
221 help221 ---help---
222 Select this for a Cyrix III or C3 chip. Presently Linux and GCC222 Select this for a Cyrix III or C3 chip. Presently Linux and GCC
223 treat this chip as a generic 586. Whilst the CPU is 686 class,223 treat this chip as a generic 586. Whilst the CPU is 686 class,
224 it lacks the cmov extension which gcc assumes is present when224 it lacks the cmov extension which gcc assumes is present when
@@ -230,7 +230,7 @@ config MCYRIXIII · 5 unmodified lines
230config MVIAC3_2230config MVIAC3_2
231 bool "VIA C3-2 (Nehemiah)"231 bool "VIA C3-2 (Nehemiah)"
232 depends on X86_32232 depends on X86_32
233 help233 ---help---
234 Select this for a VIA C3 "Nehemiah". Selecting this enables usage234 Select this for a VIA C3 "Nehemiah". Selecting this enables usage
235 of SSE and tells gcc to treat the CPU as a 686.235 of SSE and tells gcc to treat the CPU as a 686.
236 Note, this kernel will not boot on older (pre model 9) C3s.236 Note, this kernel will not boot on older (pre model 9) C3s.
@@ -238,14 +238,14 @@ config MVIAC3_2 · 1 unmodified line
238config MVIAC7238config MVIAC7
239 bool "VIA C7"239 bool "VIA C7"
240 depends on X86_32240 depends on X86_32
241 help241 ---help---
242 Select this for a VIA C7. Selecting this uses the correct cache242 Select this for a VIA C7. Selecting this uses the correct cache
243 shift and tells gcc to treat the CPU as a 686.243 shift and tells gcc to treat the CPU as a 686.
244 244
245config MPSC245config MPSC
246 bool "Intel P4 / older Netburst based Xeon"246 bool "Intel P4 / older Netburst based Xeon"
247 depends on X86_64247 depends on X86_64
248 help248 ---help---
249 Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey249 Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey
250 Xeon CPUs with Intel 64bit which is compatible with x86-64.250 Xeon CPUs with Intel 64bit which is compatible with x86-64.
251 Note that the latest Xeons (Xeon 51xx and 53xx) are not based on the251 Note that the latest Xeons (Xeon 51xx and 53xx) are not based on the
@@ -255,7 +255,7 @@ config MPSC · 3 unmodified lines
255 255
256config MCORE2256config MCORE2
257 bool "Core 2/newer Xeon"257 bool "Core 2/newer Xeon"
258 help258 ---help---
259 259
260 Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and260 Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and
261 53xx) CPUs. You can distinguish newer from older Xeons by the CPU261 53xx) CPUs. You can distinguish newer from older Xeons by the CPU
@@ -265,7 +265,7 @@ config MCORE2 · 3 unmodified lines
265config GENERIC_CPU265config GENERIC_CPU
266 bool "Generic-x86-64"266 bool "Generic-x86-64"
267 depends on X86_64267 depends on X86_64
268 help268 ---help---
269 Generic x86-64 CPU.269 Generic x86-64 CPU.
270 Run equally well on all x86-64 CPUs.270 Run equally well on all x86-64 CPUs.
271 271
@@ -274,7 +274,7 @@ endchoice · 2 unmodified lines
274config X86_GENERIC274config X86_GENERIC
275 bool "Generic x86 support"275 bool "Generic x86 support"
276 depends on X86_32276 depends on X86_32
277 help277 ---help---
278 Instead of just including optimizations for the selected278 Instead of just including optimizations for the selected
279 x86 variant (e.g. PII, Crusoe or Athlon), include some more279 x86 variant (e.g. PII, Crusoe or Athlon), include some more
280 generic optimizations as well. This will make the kernel280 generic optimizations as well. This will make the kernel
@@ -294,25 +294,23 @@ config X86_CPU · 13 unmodified lines
294# Define implied options from the CPU selection here294# Define implied options from the CPU selection here
295config X86_L1_CACHE_BYTES295config X86_L1_CACHE_BYTES
296 int296 int
297 default "128" if GENERIC_CPU || MPSC297 default "128" if MPSC
298 default "64" if MK8 || MCORE2298 default "64" if GENERIC_CPU || MK8 || MCORE2 || X86_32
299 depends on X86_64
300 299
301config X86_INTERNODE_CACHE_BYTES300config X86_INTERNODE_CACHE_BYTES
302 int301 int
303 default "4096" if X86_VSMP302 default "4096" if X86_VSMP
304 default X86_L1_CACHE_BYTES if !X86_VSMP303 default X86_L1_CACHE_BYTES if !X86_VSMP
305 depends on X86_64
306 304
307config X86_CMPXCHG305config X86_CMPXCHG
308 def_bool X86_64 || (X86_32 && !M386)306 def_bool X86_64 || (X86_32 && !M386)
309 307
310config X86_L1_CACHE_SHIFT308config X86_L1_CACHE_SHIFT
311 int309 int
312 default "7" if MPENTIUM4 || X86_GENERIC || GENERIC_CPU || MPSC310 default "7" if MPENTIUM4 || MPSC
313 default "4" if X86_ELAN || M486 || M386 || MGEODEGX1311 default "4" if X86_ELAN || M486 || M386 || MGEODEGX1
314 default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX312 default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
315 default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MVIAC7313 default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MVIAC7 || X86_GENERIC || GENERIC_CPU
316 314
317config X86_XADD315config X86_XADD
318 def_bool y316 def_bool y
@@ -321,7 +319,7 @@ config X86_XADD · 2 unmodified lines
321config X86_PPRO_FENCE319config X86_PPRO_FENCE
322 bool "PentiumPro memory ordering errata workaround"320 bool "PentiumPro memory ordering errata workaround"
323 depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1321 depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1
324 help322 ---help---
325 Old PentiumPro multiprocessor systems had errata that could cause323 Old PentiumPro multiprocessor systems had errata that could cause
326 memory operations to violate the x86 ordering standard in rare cases.324 memory operations to violate the x86 ordering standard in rare cases.
327 Enabling this option will attempt to work around some (but not all)325 Enabling this option will attempt to work around some (but not all)
@@ -414,14 +412,14 @@ config X86_DEBUGCTLMSR · 86 unmodified lines
414 412
415menuconfig PROCESSOR_SELECT413menuconfig PROCESSOR_SELECT
416 bool "Supported processor vendors" if EMBEDDED414 bool "Supported processor vendors" if EMBEDDED
417 help415 ---help---
418 This lets you choose what x86 vendor support code your kernel416 This lets you choose what x86 vendor support code your kernel
419 will include.417 will include.
420 418
421config CPU_SUP_INTEL419config CPU_SUP_INTEL
422 default y420 default y
423 bool "Support Intel processors" if PROCESSOR_SELECT421 bool "Support Intel processors" if PROCESSOR_SELECT
424 help422 ---help---
425 This enables detection, tunings and quirks for Intel processors423 This enables detection, tunings and quirks for Intel processors
426 424
427 You need this enabled if you want your kernel to run on an425 You need this enabled if you want your kernel to run on an
@@ -435,7 +433,7 @@ config CPU_SUP_CYRIX_32 · 7 unmodified lines
435 default y433 default y
436 bool "Support Cyrix processors" if PROCESSOR_SELECT434 bool "Support Cyrix processors" if PROCESSOR_SELECT
437 depends on !64BIT435 depends on !64BIT
438 help436 ---help---
439 This enables detection, tunings and quirks for Cyrix processors437 This enables detection, tunings and quirks for Cyrix processors
440 438
441 You need this enabled if you want your kernel to run on a439 You need this enabled if you want your kernel to run on a
@@ -448,7 +446,7 @@ config CPU_SUP_CYRIX_32 · 6 unmodified lines
448config CPU_SUP_AMD446config CPU_SUP_AMD
449 default y447 default y
450 bool "Support AMD processors" if PROCESSOR_SELECT448 bool "Support AMD processors" if PROCESSOR_SELECT
451 help449 ---help---
452 This enables detection, tunings and quirks for AMD processors450 This enables detection, tunings and quirks for AMD processors
453 451
454 You need this enabled if you want your kernel to run on an452 You need this enabled if you want your kernel to run on an
@@ -462,7 +460,7 @@ config CPU_SUP_CENTAUR_32 · 7 unmodified lines
462 default y460 default y
463 bool "Support Centaur processors" if PROCESSOR_SELECT461 bool "Support Centaur processors" if PROCESSOR_SELECT
464 depends on !64BIT462 depends on !64BIT
465 help463 ---help---
466 This enables detection, tunings and quirks for Centaur processors464 This enables detection, tunings and quirks for Centaur processors
467 465
468 You need this enabled if you want your kernel to run on a466 You need this enabled if you want your kernel to run on a
@@ -476,7 +474,7 @@ config CPU_SUP_CENTAUR_64 · 7 unmodified lines
476 default y474 default y
477 bool "Support Centaur processors" if PROCESSOR_SELECT475 bool "Support Centaur processors" if PROCESSOR_SELECT
478 depends on 64BIT476 depends on 64BIT
479 help477 ---help---
480 This enables detection, tunings and quirks for Centaur processors478 This enables detection, tunings and quirks for Centaur processors
481 479
482 You need this enabled if you want your kernel to run on a480 You need this enabled if you want your kernel to run on a
@@ -490,7 +488,7 @@ config CPU_SUP_TRANSMETA_32 · 7 unmodified lines
490 default y488 default y
491 bool "Support Transmeta processors" if PROCESSOR_SELECT489 bool "Support Transmeta processors" if PROCESSOR_SELECT
492 depends on !64BIT490 depends on !64BIT
493 help491 ---help---
494 This enables detection, tunings and quirks for Transmeta processors492 This enables detection, tunings and quirks for Transmeta processors
495 493
496 You need this enabled if you want your kernel to run on a494 You need this enabled if you want your kernel to run on a
@@ -504,7 +502,7 @@ config CPU_SUP_UMC_32 · 7 unmodified lines
504 default y502 default y
505 bool "Support UMC processors" if PROCESSOR_SELECT503 bool "Support UMC processors" if PROCESSOR_SELECT
506 depends on !64BIT504 depends on !64BIT
507 help505 ---help---
508 This enables detection, tunings and quirks for UMC processors506 This enables detection, tunings and quirks for UMC processors
509 507
510 You need this enabled if you want your kernel to run on a508 You need this enabled if you want your kernel to run on a
@@ -523,7 +521,7 @@ config X86_PTRACE_BTS · 12 unmodified lines
523 bool "Branch Trace Store"521 bool "Branch Trace Store"
524 default y522 default y
525 depends on X86_DEBUGCTLMSR523 depends on X86_DEBUGCTLMSR
526 help524 ---help---
527 This adds a ptrace interface to the hardware's branch trace store.525 This adds a ptrace interface to the hardware's branch trace store.
528 526
529 Debuggers may use it to collect an execution trace of the debugged527 Debuggers may use it to collect an execution trace of the debugged
arch/x86/Kconfig.debug+25−25
@@ -7,7 +7,7 @@ source "lib/Kconfig.debug" · 6 unmodified lines
7 7
8config STRICT_DEVMEM8config STRICT_DEVMEM
9 bool "Filter access to /dev/mem"9 bool "Filter access to /dev/mem"
10 help10 ---help---
11 If this option is disabled, you allow userspace (root) access to all11 If this option is disabled, you allow userspace (root) access to all
12 of memory, including kernel and userspace memory. Accidental12 of memory, including kernel and userspace memory. Accidental
13 access to this is obviously disastrous, but specific access can13 access to this is obviously disastrous, but specific access can
@@ -25,7 +25,7 @@ config STRICT_DEVMEM · 11 unmodified lines
25config X86_VERBOSE_BOOTUP25config X86_VERBOSE_BOOTUP
26 bool "Enable verbose x86 bootup info messages"26 bool "Enable verbose x86 bootup info messages"
27 default y27 default y
28 help28 ---help---
29 Enables the informational output from the decompression stage29 Enables the informational output from the decompression stage
30 (e.g. bzImage) of the boot. If you disable this you will still30 (e.g. bzImage) of the boot. If you disable this you will still
31 see errors. Disable this if you want silent bootup.31 see errors. Disable this if you want silent bootup.
@@ -33,7 +33,7 @@ config X86_VERBOSE_BOOTUP · 1 unmodified line
33config EARLY_PRINTK33config EARLY_PRINTK
34 bool "Early printk" if EMBEDDED34 bool "Early printk" if EMBEDDED
35 default y35 default y
36 help36 ---help---
37 Write kernel log output directly into the VGA buffer or to a serial37 Write kernel log output directly into the VGA buffer or to a serial
38 port.38 port.
39 39
@@ -47,7 +47,7 @@ config EARLY_PRINTK_DBGP · 7 unmodified lines
47 bool "Early printk via EHCI debug port"47 bool "Early printk via EHCI debug port"
48 default n48 default n
49 depends on EARLY_PRINTK && PCI49 depends on EARLY_PRINTK && PCI
50 help50 ---help---
51 Write kernel log output directly into the EHCI debug port.51 Write kernel log output directly into the EHCI debug port.
52 52
53 This is useful for kernel debugging when your machine crashes very53 This is useful for kernel debugging when your machine crashes very
@@ -59,14 +59,14 @@ config EARLY_PRINTK_DBGP · 5 unmodified lines
59config DEBUG_STACKOVERFLOW59config DEBUG_STACKOVERFLOW
60 bool "Check for stack overflows"60 bool "Check for stack overflows"
61 depends on DEBUG_KERNEL61 depends on DEBUG_KERNEL
62 help62 ---help---
63 This option will cause messages to be printed if free stack space63 This option will cause messages to be printed if free stack space
64 drops below a certain limit.64 drops below a certain limit.
65 65
66config DEBUG_STACK_USAGE66config DEBUG_STACK_USAGE
67 bool "Stack utilization instrumentation"67 bool "Stack utilization instrumentation"
68 depends on DEBUG_KERNEL68 depends on DEBUG_KERNEL
69 help69 ---help---
70 Enables the display of the minimum amount of free stack which each70 Enables the display of the minimum amount of free stack which each
71 task has ever had available in the sysrq-T and sysrq-P debug output.71 task has ever had available in the sysrq-T and sysrq-P debug output.
72 72
@@ -75,7 +75,7 @@ config DEBUG_STACK_USAGE · 2 unmodified lines
75config DEBUG_PAGEALLOC75config DEBUG_PAGEALLOC
76 bool "Debug page memory allocations"76 bool "Debug page memory allocations"
77 depends on DEBUG_KERNEL77 depends on DEBUG_KERNEL
78 help78 ---help---
79 Unmap pages from the kernel linear mapping after free_pages().79 Unmap pages from the kernel linear mapping after free_pages().
80 This results in a large slowdown, but helps to find certain types80 This results in a large slowdown, but helps to find certain types
81 of memory corruptions.81 of memory corruptions.
@@ -83,9 +83,9 @@ config DEBUG_PAGEALLOC · 1 unmodified line
83config DEBUG_PER_CPU_MAPS83config DEBUG_PER_CPU_MAPS
84 bool "Debug access to per_cpu maps"84 bool "Debug access to per_cpu maps"
85 depends on DEBUG_KERNEL85 depends on DEBUG_KERNEL
86 depends on X86_SMP86 depends on SMP
87 default n87 default n
88 help88 ---help---
89 Say Y to verify that the per_cpu map being accessed has89 Say Y to verify that the per_cpu map being accessed has
90 been setup. Adds a fair amount of code to kernel memory90 been setup. Adds a fair amount of code to kernel memory
91 and decreases performance.91 and decreases performance.
@@ -96,7 +96,7 @@ config X86_PTDUMP · 4 unmodified lines
96 bool "Export kernel pagetable layout to userspace via debugfs"96 bool "Export kernel pagetable layout to userspace via debugfs"
97 depends on DEBUG_KERNEL97 depends on DEBUG_KERNEL
98 select DEBUG_FS98 select DEBUG_FS
99 help99 ---help---
100 Say Y here if you want to show the kernel pagetable layout in a100 Say Y here if you want to show the kernel pagetable layout in a
101 debugfs file. This information is only useful for kernel developers101 debugfs file. This information is only useful for kernel developers
102 who are working in architecture specific areas of the kernel.102 who are working in architecture specific areas of the kernel.
@@ -108,7 +108,7 @@ config DEBUG_RODATA · 5 unmodified lines
108 bool "Write protect kernel read-only data structures"108 bool "Write protect kernel read-only data structures"
109 default y109 default y
110 depends on DEBUG_KERNEL110 depends on DEBUG_KERNEL
111 help111 ---help---
112 Mark the kernel read-only data as write-protected in the pagetables,112 Mark the kernel read-only data as write-protected in the pagetables,
113 in order to catch accidental (and incorrect) writes to such const113 in order to catch accidental (and incorrect) writes to such const
114 data. This is recommended so that we can catch kernel bugs sooner.114 data. This is recommended so that we can catch kernel bugs sooner.
@@ -117,7 +117,8 @@ config DEBUG_RODATA · 2 unmodified lines
117config DEBUG_RODATA_TEST117config DEBUG_RODATA_TEST
118 bool "Testcase for the DEBUG_RODATA feature"118 bool "Testcase for the DEBUG_RODATA feature"
119 depends on DEBUG_RODATA119 depends on DEBUG_RODATA
120 help120 default y
121 ---help---
121 This option enables a testcase for the DEBUG_RODATA122 This option enables a testcase for the DEBUG_RODATA
122 feature as well as for the change_page_attr() infrastructure.123 feature as well as for the change_page_attr() infrastructure.
123 If in doubt, say "N"124 If in doubt, say "N"
@@ -125,7 +126,7 @@ config DEBUG_RODATA_TEST · 1 unmodified line
125config DEBUG_NX_TEST126config DEBUG_NX_TEST
126 tristate "Testcase for the NX non-executable stack feature"127 tristate "Testcase for the NX non-executable stack feature"
127 depends on DEBUG_KERNEL && m128 depends on DEBUG_KERNEL && m
128 help129 ---help---
129 This option enables a testcase for the CPU NX capability130 This option enables a testcase for the CPU NX capability
130 and the software setup of this feature.131 and the software setup of this feature.
131 If in doubt, say "N"132 If in doubt, say "N"
@@ -133,7 +134,7 @@ config DEBUG_NX_TEST · 1 unmodified line
133config 4KSTACKS134config 4KSTACKS
134 bool "Use 4Kb for kernel stacks instead of 8Kb"135 bool "Use 4Kb for kernel stacks instead of 8Kb"
135 depends on X86_32136 depends on X86_32
136 help137 ---help---
137 If you say Y here the kernel will use a 4Kb stacksize for the138 If you say Y here the kernel will use a 4Kb stacksize for the
138 kernel stack attached to each process/thread. This facilitates139 kernel stack attached to each process/thread. This facilitates
139 running more threads on a system and also reduces the pressure140 running more threads on a system and also reduces the pressure
@@ -144,7 +145,7 @@ config DOUBLEFAULT · 4 unmodified lines
144 default y145 default y
145 bool "Enable doublefault exception handler" if EMBEDDED146 bool "Enable doublefault exception handler" if EMBEDDED
146 depends on X86_32147 depends on X86_32
147 help148 ---help---
148 This option allows trapping of rare doublefault exceptions that149 This option allows trapping of rare doublefault exceptions that
149 would otherwise cause a system to silently reboot. Disabling this150 would otherwise cause a system to silently reboot. Disabling this
150 option saves about 4k and might cause you much additional grey151 option saves about 4k and might cause you much additional grey
@@ -154,7 +155,7 @@ config IOMMU_DEBUG · 3 unmodified lines
154 bool "Enable IOMMU debugging"155 bool "Enable IOMMU debugging"
155 depends on GART_IOMMU && DEBUG_KERNEL156 depends on GART_IOMMU && DEBUG_KERNEL
156 depends on X86_64157 depends on X86_64
157 help158 ---help---
158 Force the IOMMU to on even when you have less than 4GB of159 Force the IOMMU to on even when you have less than 4GB of
159 memory and add debugging code. On overflow always panic. And160 memory and add debugging code. On overflow always panic. And
160 allow to enable IOMMU leak tracing. Can be disabled at boot161 allow to enable IOMMU leak tracing. Can be disabled at boot
@@ -170,7 +171,7 @@ config IOMMU_LEAK · 9 unmodified lines
170 bool "IOMMU leak tracing"171 bool "IOMMU leak tracing"
171 depends on DEBUG_KERNEL172 depends on DEBUG_KERNEL
172 depends on IOMMU_DEBUG173 depends on IOMMU_DEBUG
173 help174 ---help---
174 Add a simple leak tracer to the IOMMU code. This is useful when you175 Add a simple leak tracer to the IOMMU code. This is useful when you
175 are debugging a buggy device driver that leaks IOMMU mappings.176 are debugging a buggy device driver that leaks IOMMU mappings.
176 177
@@ -203,25 +204,25 @@ choice · 26 unmodified lines
203 204
204config IO_DELAY_0X80205config IO_DELAY_0X80
205 bool "port 0x80 based port-IO delay [recommended]"206 bool "port 0x80 based port-IO delay [recommended]"
206 help207 ---help---
207 This is the traditional Linux IO delay used for in/out_p.208 This is the traditional Linux IO delay used for in/out_p.
208 It is the most tested hence safest selection here.209 It is the most tested hence safest selection here.
209 210
210config IO_DELAY_0XED211config IO_DELAY_0XED
211 bool "port 0xed based port-IO delay"212 bool "port 0xed based port-IO delay"
212 help213 ---help---
213 Use port 0xed as the IO delay. This frees up port 0x80 which is214 Use port 0xed as the IO delay. This frees up port 0x80 which is
214 often used as a hardware-debug port.215 often used as a hardware-debug port.
215 216
216config IO_DELAY_UDELAY217config IO_DELAY_UDELAY
217 bool "udelay based port-IO delay"218 bool "udelay based port-IO delay"
218 help219 ---help---
219 Use udelay(2) as the IO delay method. This provides the delay220 Use udelay(2) as the IO delay method. This provides the delay
220 while not having any side-effect on the IO port space.221 while not having any side-effect on the IO port space.
221 222
222config IO_DELAY_NONE223config IO_DELAY_NONE
223 bool "no port-IO delay"224 bool "no port-IO delay"
224 help225 ---help---
225 No port-IO delay. Will break on old boxes that require port-IO226 No port-IO delay. Will break on old boxes that require port-IO
226 delay for certain operations. Should work on most new machines.227 delay for certain operations. Should work on most new machines.
227 228
@@ -255,18 +256,18 @@ config DEBUG_BOOT_PARAMS · 27 unmodified lines
255 bool "Debug boot parameters"256 bool "Debug boot parameters"
256 depends on DEBUG_KERNEL257 depends on DEBUG_KERNEL
257 depends on DEBUG_FS258 depends on DEBUG_FS
258 help259 ---help---
259 This option will cause struct boot_params to be exported via debugfs.260 This option will cause struct boot_params to be exported via debugfs.
260 261
261config CPA_DEBUG262config CPA_DEBUG
262 bool "CPA self-test code"263 bool "CPA self-test code"
263 depends on DEBUG_KERNEL264 depends on DEBUG_KERNEL
264 help265 ---help---
265 Do change_page_attr() self-tests every 30 seconds.266 Do change_page_attr() self-tests every 30 seconds.
266 267
267config OPTIMIZE_INLINING268config OPTIMIZE_INLINING
268 bool "Allow gcc to uninline functions marked 'inline'"269 bool "Allow gcc to uninline functions marked 'inline'"
269 help270 ---help---
270 This option determines if the kernel forces gcc to inline the functions271 This option determines if the kernel forces gcc to inline the functions
271 developers have marked 'inline'. Doing so takes away freedom from gcc to272 developers have marked 'inline'. Doing so takes away freedom from gcc to
272 do what it thinks is best, which is desirable for the gcc 3.x series of273 do what it thinks is best, which is desirable for the gcc 3.x series of
@@ -279,4 +280,3 @@ config OPTIMIZE_INLINING · 6 unmodified lines
279 If unsure, say N.280 If unsure, say N.
280 281
281endmenu282endmenu
282
arch/x86/Makefile+10−33
@@ -70,14 +70,17 @@ else · 69 unmodified lines
70 # this works around some issues with generating unwind tables in older gccs70 # this works around some issues with generating unwind tables in older gccs
71 # newer gccs do it by default71 # newer gccs do it by default
72 KBUILD_CFLAGS += -maccumulate-outgoing-args72 KBUILD_CFLAGS += -maccumulate-outgoing-args
73endif
73 74
74 stackp := $(CONFIG_SHELL) $(srctree)/scripts/gcc-x86_64-has-stack-protector.sh75ifdef CONFIG_CC_STACKPROTECTOR
75 stackp-$(CONFIG_CC_STACKPROTECTOR) := $(shell $(stackp) \76 cc_has_sp := $(srctree)/scripts/gcc-x86_$(BITS)-has-stack-protector.sh
76 "$(CC)" -fstack-protector )77 ifeq ($(shell $(CONFIG_SHELL) $(cc_has_sp) $(CC)),y)
77 stackp-$(CONFIG_CC_STACKPROTECTOR_ALL) += $(shell $(stackp) \78 stackp-y := -fstack-protector
78 "$(CC)" -fstack-protector-all )79 stackp-$(CONFIG_CC_STACKPROTECTOR_ALL) += -fstack-protector-all
79 80 KBUILD_CFLAGS += $(stackp-y)
80 KBUILD_CFLAGS += $(stackp-y)81 else
82 $(warning stack protector enabled but no compiler support)
83 endif
81endif84endif
82 85
83# Stackpointer is addressed different for 32 bit and 64 bit x8686# Stackpointer is addressed different for 32 bit and 64 bit x86
@@ -102,29 +105,6 @@ KBUILD_CFLAGS += -fno-asynchronous-unwind-tables · 18 unmodified lines
102# prevent gcc from generating any FP code by mistake105# prevent gcc from generating any FP code by mistake
103KBUILD_CFLAGS += $(call cc-option,-mno-sse -mno-mmx -mno-sse2 -mno-3dnow,)106KBUILD_CFLAGS += $(call cc-option,-mno-sse -mno-mmx -mno-sse2 -mno-3dnow,)
104 107
105###
106# Sub architecture support
107# fcore-y is linked before mcore-y files.
108
109# Default subarch .c files
110mcore-y := arch/x86/mach-default/
111
112# Voyager subarch support
113mflags-$(CONFIG_X86_VOYAGER) := -Iarch/x86/include/asm/mach-voyager
114mcore-$(CONFIG_X86_VOYAGER) := arch/x86/mach-voyager/
115
116# generic subarchitecture
117mflags-$(CONFIG_X86_GENERICARCH):= -Iarch/x86/include/asm/mach-generic
118fcore-$(CONFIG_X86_GENERICARCH) += arch/x86/mach-generic/
119mcore-$(CONFIG_X86_GENERICARCH) := arch/x86/mach-default/
120
121# default subarch .h files
122mflags-y += -Iarch/x86/include/asm/mach-default
123
124# 64 bit does not support subarch support - clear sub arch variables
125fcore-$(CONFIG_X86_64) :=
126mcore-$(CONFIG_X86_64) :=
127
128KBUILD_CFLAGS += $(mflags-y)108KBUILD_CFLAGS += $(mflags-y)
129KBUILD_AFLAGS += $(mflags-y)109KBUILD_AFLAGS += $(mflags-y)
130 110
@@ -150,9 +130,6 @@ core-$(CONFIG_LGUEST_GUEST) += arch/x86/lguest/ · 19 unmodified lines
150core-y += arch/x86/kernel/130core-y += arch/x86/kernel/
151core-y += arch/x86/mm/131core-y += arch/x86/mm/
152 132
153# Remaining sub architecture files
154core-y += $(mcore-y)
155
156core-y += arch/x86/crypto/133core-y += arch/x86/crypto/
157core-y += arch/x86/vdso/134core-y += arch/x86/vdso/
158core-$(CONFIG_IA32_EMULATION) += arch/x86/ia32/135core-$(CONFIG_IA32_EMULATION) += arch/x86/ia32/
arch/x86/boot/Makefile+0−1
@@ -32,7 +32,6 @@ setup-y += a20.o cmdline.o copy.o cpu.o cpucheck.o edd.o · 31 unmodified lines
32setup-y += header.o main.o mca.o memory.o pm.o pmjump.o32setup-y += header.o main.o mca.o memory.o pm.o pmjump.o
33setup-y += printf.o string.o tty.o video.o video-mode.o version.o33setup-y += printf.o string.o tty.o video.o video-mode.o version.o
34setup-$(CONFIG_X86_APM_BOOT) += apm.o34setup-$(CONFIG_X86_APM_BOOT) += apm.o
35setup-$(CONFIG_X86_VOYAGER) += voyager.o
36 35
37# The link order of the video-*.o modules can matter. In particular,36# The link order of the video-*.o modules can matter. In particular,
38# video-vga.o *must* be listed first, followed by video-vesa.o.37# video-vga.o *must* be listed first, followed by video-vesa.o.
arch/x86/boot/a20.c+40−39
@@ -2,6 +2,7 @@ · 1 unmodified line
2 *2 *
3 * Copyright (C) 1991, 1992 Linus Torvalds3 * Copyright (C) 1991, 1992 Linus Torvalds
4 * Copyright 2007-2008 rPath, Inc. - All Rights Reserved4 * Copyright 2007-2008 rPath, Inc. - All Rights Reserved
5 * Copyright 2009 Intel Corporation
5 *6 *
6 * This file is part of the Linux kernel, and is made available under7 * This file is part of the Linux kernel, and is made available under
7 * the terms of the GNU General Public License version 2.8 * the terms of the GNU General Public License version 2.
@@ -15,16 +16,23 @@ · 7 unmodified lines
15#include "boot.h"16#include "boot.h"
16 17
17#define MAX_8042_LOOPS 10000018#define MAX_8042_LOOPS 100000
19#define MAX_8042_FF 32
18 20
19static int empty_8042(void)21static int empty_8042(void)
20{22{
21 u8 status;23 u8 status;
22 int loops = MAX_8042_LOOPS;24 int loops = MAX_8042_LOOPS;
25 int ffs = MAX_8042_FF;
23 26
24 while (loops--) {27 while (loops--) {
25 io_delay();28 io_delay();
26 29
27 status = inb(0x64);30 status = inb(0x64);
31 if (status == 0xff) {
32 /* FF is a plausible, but very unlikely status */
33 if (!--ffs)
34 return -1; /* Assume no KBC present */
35 }
28 if (status & 1) {36 if (status & 1) {
29 /* Read and discard input data */37 /* Read and discard input data */
30 io_delay();38 io_delay();
@@ -118,44 +126,37 @@ static void enable_a20_fast(void) · 87 unmodified lines
118 126
119int enable_a20(void)127int enable_a20(void)
120{128{
121#if defined(CONFIG_X86_ELAN)
122 /* Elan croaks if we try to touch the KBC */
123 enable_a20_fast();
124 while (!a20_test_long())
125 ;
126 return 0;
127#elif defined(CONFIG_X86_VOYAGER)
128 /* On Voyager, a20_test() is unsafe? */
129 enable_a20_kbc();
130 return 0;
131#else
132 int loops = A20_ENABLE_LOOPS;129 int loops = A20_ENABLE_LOOPS;
133 while (loops--) {130 int kbc_err;
134 /* First, check to see if A20 is already enabled131
135 (legacy free, etc.) */132 while (loops--) {
136 if (a20_test_short())133 /* First, check to see if A20 is already enabled
137 return 0;134 (legacy free, etc.) */
138 135 if (a20_test_short())
139 /* Next, try the BIOS (INT 0x15, AX=0x2401) */136 return 0;
140 enable_a20_bios();137
141 if (a20_test_short())138 /* Next, try the BIOS (INT 0x15, AX=0x2401) */
142 return 0;139 enable_a20_bios();
143 140 if (a20_test_short())
144 /* Try enabling A20 through the keyboard controller */141 return 0;
145 empty_8042();142
146 if (a20_test_short())143 /* Try enabling A20 through the keyboard controller */
147 return 0; /* BIOS worked, but with delayed reaction */144 kbc_err = empty_8042();
148 145
149 enable_a20_kbc();146 if (a20_test_short())
150 if (a20_test_long())147 return 0; /* BIOS worked, but with delayed reaction */
151 return 0;148
152 149 if (!kbc_err) {
153 /* Finally, try enabling the "fast A20 gate" */150 enable_a20_kbc();
154 enable_a20_fast();151 if (a20_test_long())
155 if (a20_test_long())152 return 0;
156 return 0;153 }
157 }154
158 155 /* Finally, try enabling the "fast A20 gate" */
159 return -1;156 enable_a20_fast();
160#endif157 if (a20_test_long())
158 return 0;
159 }
160
161 return -1;
161}162}
arch/x86/boot/boot.h+0−3
@@ -302,9 +302,6 @@ void probe_cards(int unsafe); · 301 unmodified lines
302/* video-vesa.c */302/* video-vesa.c */
303void vesa_store_edid(void);303void vesa_store_edid(void);
304 304
305/* voyager.c */
306int query_voyager(void);
307
308#endif /* __ASSEMBLY__ */305#endif /* __ASSEMBLY__ */
309 306
310#endif /* BOOT_BOOT_H */307#endif /* BOOT_BOOT_H */
arch/x86/boot/compressed/Makefile+19−2
@@ -4,7 +4,7 @@ · 3 unmodified lines
4# create a compressed vmlinux image from the original vmlinux4# create a compressed vmlinux image from the original vmlinux
5#5#
6 6
7targets := vmlinux vmlinux.bin vmlinux.bin.gz head_$(BITS).o misc.o piggy.o7targets := vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma head_$(BITS).o misc.o piggy.o
8 8
9KBUILD_CFLAGS := -m$(BITS) -D__KERNEL__ $(LINUX_INCLUDE) -O29KBUILD_CFLAGS := -m$(BITS) -D__KERNEL__ $(LINUX_INCLUDE) -O2
10KBUILD_CFLAGS += -fno-strict-aliasing -fPIC10KBUILD_CFLAGS += -fno-strict-aliasing -fPIC
@@ -47,18 +47,35 @@ ifeq ($(CONFIG_X86_32),y) · 36 unmodified lines
47ifdef CONFIG_RELOCATABLE47ifdef CONFIG_RELOCATABLE
48$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin.all FORCE48$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin.all FORCE
49 $(call if_changed,gzip)49 $(call if_changed,gzip)
50$(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin.all FORCE
51 $(call if_changed,bzip2)
52$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin.all FORCE
53 $(call if_changed,lzma)
50else54else
51$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE55$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
52 $(call if_changed,gzip)56 $(call if_changed,gzip)
57$(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE
58 $(call if_changed,bzip2)
59$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE
60 $(call if_changed,lzma)
53endif61endif
54LDFLAGS_piggy.o := -r --format binary --oformat elf32-i386 -T62LDFLAGS_piggy.o := -r --format binary --oformat elf32-i386 -T
55 63
56else64else
65
57$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE66$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
58 $(call if_changed,gzip)67 $(call if_changed,gzip)
68$(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE
69 $(call if_changed,bzip2)
70$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE
71 $(call if_changed,lzma)
59 72
60LDFLAGS_piggy.o := -r --format binary --oformat elf64-x86-64 -T73LDFLAGS_piggy.o := -r --format binary --oformat elf64-x86-64 -T
61endif74endif
62 75
63$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.gz FORCE76suffix_$(CONFIG_KERNEL_GZIP) = gz
77suffix_$(CONFIG_KERNEL_BZIP2) = bz2
78suffix_$(CONFIG_KERNEL_LZMA) = lzma
79
80$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.$(suffix_y) FORCE
64 $(call if_changed,ld)81 $(call if_changed,ld)
arch/x86/boot/compressed/head_32.S+4−4
@@ -25,14 +25,12 @@ · 24 unmodified lines
25 25
26#include <linux/linkage.h>26#include <linux/linkage.h>
27#include <asm/segment.h>27#include <asm/segment.h>
28#include <asm/page.h>28#include <asm/page_types.h>
29#include <asm/boot.h>29#include <asm/boot.h>
30#include <asm/asm-offsets.h>30#include <asm/asm-offsets.h>
31 31
32.section ".text.head","ax",@progbits32.section ".text.head","ax",@progbits
33 .globl startup_3233ENTRY(startup_32)
34
35startup_32:
36 cld34 cld
37 /* test KEEP_SEGMENTS flag to see if the bootloader is asking35 /* test KEEP_SEGMENTS flag to see if the bootloader is asking
38 * us to not reload segments */36 * us to not reload segments */
@@ -113,6 +111,8 @@ startup_32: · 74 unmodified lines
113 */111 */
114 leal relocated(%ebx), %eax112 leal relocated(%ebx), %eax
115 jmp *%eax113 jmp *%eax
114ENDPROC(startup_32)
115
116.section ".text"116.section ".text"
117relocated:117relocated:
118 118
arch/x86/boot/compressed/head_64.S+4−6
@@ -26,8 +26,8 @@ · 25 unmodified lines
26 26
27#include <linux/linkage.h>27#include <linux/linkage.h>
28#include <asm/segment.h>28#include <asm/segment.h>
29#include <asm/pgtable.h>29#include <asm/pgtable_types.h>
30#include <asm/page.h>30#include <asm/page_types.h>
31#include <asm/boot.h>31#include <asm/boot.h>
32#include <asm/msr.h>32#include <asm/msr.h>
33#include <asm/processor-flags.h>33#include <asm/processor-flags.h>
@@ -35,9 +35,7 @@ · 1 unmodified line
35 35
36.section ".text.head"36.section ".text.head"
37 .code3237 .code32
38 .globl startup_3238ENTRY(startup_32)
39
40startup_32:
41 cld39 cld
42 /* test KEEP_SEGMENTS flag to see if the bootloader is asking40 /* test KEEP_SEGMENTS flag to see if the bootloader is asking
43 * us to not reload segments */41 * us to not reload segments */
@@ -176,6 +174,7 @@ startup_32: · 132 unmodified lines
176 174
177 /* Jump from 32bit compatibility mode into 64bit mode. */175 /* Jump from 32bit compatibility mode into 64bit mode. */
178 lret176 lret
177ENDPROC(startup_32)
179 178
180no_longmode:179no_longmode:
181 /* This isn't an x86-64 CPU so hang */180 /* This isn't an x86-64 CPU so hang */
@@ -295,7 +294,6 @@ relocated: · 113 unmodified lines
295 call decompress_kernel294 call decompress_kernel
296 popq %rsi295 popq %rsi
297 296
298
299/*297/*
300 * Jump to the decompressed kernel.298 * Jump to the decompressed kernel.
301 */299 */
arch/x86/boot/compressed/misc.c+14−104
@@ -116,71 +116,13 @@ · 115 unmodified lines
116/*116/*
117 * gzip declarations117 * gzip declarations
118 */118 */
119
120#define OF(args) args
121#define STATIC static119#define STATIC static
122 120
123#undef memset121#undef memset
124#undef memcpy122#undef memcpy
125#define memzero(s, n) memset((s), 0, (n))123#define memzero(s, n) memset((s), 0, (n))
126 124
127typedef unsigned char uch;
128typedef unsigned short ush;
129typedef unsigned long ulg;
130
131/*
132 * Window size must be at least 32k, and a power of two.
133 * We don't actually have a window just a huge output buffer,
134 * so we report a 2G window size, as that should always be
135 * larger than our output buffer:
136 */
137#define WSIZE 0x80000000
138
139/* Input buffer: */
140static unsigned char *inbuf;
141
142/* Sliding window buffer (and final output buffer): */
143static unsigned char *window;
144
145/* Valid bytes in inbuf: */
146static unsigned insize;
147
148/* Index of next byte to be processed in inbuf: */
149static unsigned inptr;
150
151/* Bytes in output buffer: */
152static unsigned outcnt;
153
154/* gzip flag byte */
155#define ASCII_FLAG 0x01 /* bit 0 set: file probably ASCII text */
156#define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gz file */
157#define EXTRA_FIELD 0x04 /* bit 2 set: extra field present */
158#define ORIG_NAM 0x08 /* bit 3 set: original file name present */
159#define COMMENT 0x10 /* bit 4 set: file comment present */
160#define ENCRYPTED 0x20 /* bit 5 set: file is encrypted */
161#define RESERVED 0xC0 /* bit 6, 7: reserved */
162
163#define get_byte() (inptr < insize ? inbuf[inptr++] : fill_inbuf())
164
165/* Diagnostic functions */
166#ifdef DEBUG
167# define Assert(cond, msg) do { if (!(cond)) error(msg); } while (0)
168# define Trace(x) do { fprintf x; } while (0)
169# define Tracev(x) do { if (verbose) fprintf x ; } while (0)
170# define Tracevv(x) do { if (verbose > 1) fprintf x ; } while (0)
171# define Tracec(c, x) do { if (verbose && (c)) fprintf x ; } while (0)
172# define Tracecv(c, x) do { if (verbose > 1 && (c)) fprintf x ; } while (0)
173#else
174# define Assert(cond, msg)
175# define Trace(x)
176# define Tracev(x)
177# define Tracevv(x)
178# define Tracec(c, x)
179# define Tracecv(c, x)
180#endif
181 125
182static int fill_inbuf(void);
183static void flush_window(void);
184static void error(char *m);126static void error(char *m);
185 127
186/*128/*
@@ -189,13 +131,8 @@ static void error(char *m); · 2 unmodified lines
189static struct boot_params *real_mode; /* Pointer to real-mode data */131static struct boot_params *real_mode; /* Pointer to real-mode data */
190static int quiet;132static int quiet;
191 133
192extern unsigned char input_data[];
193extern int input_len;
194
195static long bytes_out;
196
197static void *memset(void *s, int c, unsigned n);134static void *memset(void *s, int c, unsigned n);
198static void *memcpy(void *dest, const void *src, unsigned n);135void *memcpy(void *dest, const void *src, unsigned n);
199 136
200static void __putstr(int, const char *);137static void __putstr(int, const char *);
201#define putstr(__x) __putstr(0, __x)138#define putstr(__x) __putstr(0, __x)
@@ -213,7 +150,17 @@ static char *vidmem; · 11 unmodified lines
213static int vidport;150static int vidport;
214static int lines, cols;151static int lines, cols;
215 152
216#include "../../../../lib/inflate.c"153#ifdef CONFIG_KERNEL_GZIP
154#include "../../../../lib/decompress_inflate.c"
155#endif
156
157#ifdef CONFIG_KERNEL_BZIP2
158#include "../../../../lib/decompress_bunzip2.c"
159#endif
160
161#ifdef CONFIG_KERNEL_LZMA
162#include "../../../../lib/decompress_unlzma.c"
163#endif
217 164
218static void scroll(void)165static void scroll(void)
219{166{
@@ -282,7 +229,7 @@ static void *memset(void *s, int c, unsigned n) · 62 unmodified lines
282 return s;229 return s;
283}230}
284 231
285static void *memcpy(void *dest, const void *src, unsigned n)232void *memcpy(void *dest, const void *src, unsigned n)
286{233{
287 int i;234 int i;
288 const char *s = src;235 const char *s = src;
@@ -293,38 +240,6 @@ static void *memcpy(void *dest, const void *src, unsigned n) · 4 unmodified lines
293 return dest;240 return dest;
294}241}
295 242
296/* ===========================================================================
297 * Fill the input buffer. This is called only when the buffer is empty
298 * and at least one byte is really needed.
299 */
300static int fill_inbuf(void)
301{
302 error("ran out of input data");
303 return 0;
304}
305
306/* ===========================================================================
307 * Write the output window window[0..outcnt-1] and update crc and bytes_out.
308 * (Used for the decompressed data only.)
309 */
310static void flush_window(void)
311{
312 /* With my window equal to my output buffer
313 * I only need to compute the crc here.
314 */
315 unsigned long c = crc; /* temporary variable */
316 unsigned n;
317 unsigned char *in, ch;
318
319 in = window;
320 for (n = 0; n < outcnt; n++) {
321 ch = *in++;
322 c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8);
323 }
324 crc = c;
325 bytes_out += (unsigned long)outcnt;
326 outcnt = 0;
327}
328 243
329static void error(char *x)244static void error(char *x)
330{245{
@@ -407,12 +322,8 @@ asmlinkage void decompress_kernel(void *rmode, memptr heap, · 76 unmodified lines
407 lines = real_mode->screen_info.orig_video_lines;322 lines = real_mode->screen_info.orig_video_lines;
408 cols = real_mode->screen_info.orig_video_cols;323 cols = real_mode->screen_info.orig_video_cols;
409 324
410 window = output; /* Output buffer (Normally at 1M) */
411 free_mem_ptr = heap; /* Heap */325 free_mem_ptr = heap; /* Heap */
412 free_mem_end_ptr = heap + BOOT_HEAP_SIZE;326 free_mem_end_ptr = heap + BOOT_HEAP_SIZE;
413 inbuf = input_data; /* Input buffer */
414 insize = input_len;
415 inptr = 0;
416 327
417#ifdef CONFIG_X86_64328#ifdef CONFIG_X86_64
418 if ((unsigned long)output & (__KERNEL_ALIGN - 1))329 if ((unsigned long)output & (__KERNEL_ALIGN - 1))
@@ -430,10 +341,9 @@ asmlinkage void decompress_kernel(void *rmode, memptr heap, · 11 unmodified lines
430#endif341#endif
431#endif342#endif
432 343
433 makecrc();
434 if (!quiet)344 if (!quiet)
435 putstr("\nDecompressing Linux... ");345 putstr("\nDecompressing Linux... ");
436 gunzip();346 decompress(input_data, input_len, NULL, NULL, output, NULL, error);
437 parse_elf(output);347 parse_elf(output);
438 if (!quiet)348 if (!quiet)
439 putstr("done.\nBooting the kernel.\n");349 putstr("done.\nBooting the kernel.\n");
arch/x86/boot/copy.S+14−26
@@ -8,6 +8,8 @@ · 7 unmodified lines
8 *8 *
9 * ----------------------------------------------------------------------- */9 * ----------------------------------------------------------------------- */
10 10
11#include <linux/linkage.h>
12
11/*13/*
12 * Memory copy routines14 * Memory copy routines
13 */15 */
@@ -15,9 +17,7 @@ · 1 unmodified line
15 .code16gcc17 .code16gcc
16 .text18 .text
17 19
18 .globl memcpy20GLOBAL(memcpy)
19 .type memcpy, @function
20memcpy:
21 pushw %si21 pushw %si
22 pushw %di22 pushw %di
23 movw %ax, %di23 movw %ax, %di
@@ -31,11 +31,9 @@ memcpy: · 7 unmodified lines
31 popw %di31 popw %di
32 popw %si32 popw %si
33 ret33 ret
34 .size memcpy, .-memcpy34ENDPROC(memcpy)
35 35
36 .globl memset36GLOBAL(memset)
37 .type memset, @function
38memset:
39 pushw %di37 pushw %di
40 movw %ax, %di38 movw %ax, %di
41 movzbl %dl, %eax39 movzbl %dl, %eax
@@ -48,52 +46,42 @@ memset: · 6 unmodified lines
48 rep; stosb46 rep; stosb
49 popw %di47 popw %di
50 ret48 ret
51 .size memset, .-memset49ENDPROC(memset)
52 50
53 .globl copy_from_fs51GLOBAL(copy_from_fs)
54 .type copy_from_fs, @function
55copy_from_fs:
56 pushw %ds52 pushw %ds
57 pushw %fs53 pushw %fs
58 popw %ds54 popw %ds
59 call memcpy55 call memcpy
60 popw %ds56 popw %ds
61 ret57 ret
62 .size copy_from_fs, .-copy_from_fs58ENDPROC(copy_from_fs)
63 59
64 .globl copy_to_fs60GLOBAL(copy_to_fs)
65 .type copy_to_fs, @function
66copy_to_fs:
67 pushw %es61 pushw %es
68 pushw %fs62 pushw %fs
69 popw %es63 popw %es
70 call memcpy64 call memcpy
71 popw %es65 popw %es
72 ret66 ret
73 .size copy_to_fs, .-copy_to_fs67ENDPROC(copy_to_fs)
74 68
75#if 0 /* Not currently used, but can be enabled as needed */69#if 0 /* Not currently used, but can be enabled as needed */
76 70GLOBAL(copy_from_gs)
77 .globl copy_from_gs
78 .type copy_from_gs, @function
79copy_from_gs:
80 pushw %ds71 pushw %ds
81 pushw %gs72 pushw %gs
82 popw %ds73 popw %ds
83 call memcpy74 call memcpy
84 popw %ds75 popw %ds
85 ret76 ret
86 .size copy_from_gs, .-copy_from_gs77ENDPROC(copy_from_gs)
87 .globl copy_to_gs
88 78
89 .type copy_to_gs, @function79GLOBAL(copy_to_gs)
90copy_to_gs:
91 pushw %es80 pushw %es
92 pushw %gs81 pushw %gs
93 popw %es82 popw %es
94 call memcpy83 call memcpy
95 popw %es84 popw %es
96 ret85 ret
97 .size copy_to_gs, .-copy_to_gs86ENDPROC(copy_to_gs)
98
99#endif87#endif
arch/x86/boot/header.S+1−1
@@ -19,7 +19,7 @@ · 18 unmodified lines
19#include <linux/utsrelease.h>19#include <linux/utsrelease.h>
20#include <asm/boot.h>20#include <asm/boot.h>
21#include <asm/e820.h>21#include <asm/e820.h>
22#include <asm/page.h>22#include <asm/page_types.h>
23#include <asm/setup.h>23#include <asm/setup.h>
24#include "boot.h"24#include "boot.h"
25#include "offsets.h"25#include "offsets.h"
arch/x86/boot/main.c+0−5
@@ -149,11 +149,6 @@ void main(void) · 148 unmodified lines
149 /* Query MCA information */149 /* Query MCA information */
150 query_mca();150 query_mca();
151 151
152 /* Voyager */
153#ifdef CONFIG_X86_VOYAGER
154 query_voyager();
155#endif
156
157 /* Query Intel SpeedStep (IST) information */152 /* Query Intel SpeedStep (IST) information */
158 query_ist();153 query_ist();
159 154
arch/x86/boot/pmjump.S+5−11
@@ -15,18 +15,15 @@ · 14 unmodified lines
15#include <asm/boot.h>15#include <asm/boot.h>
16#include <asm/processor-flags.h>16#include <asm/processor-flags.h>
17#include <asm/segment.h>17#include <asm/segment.h>
18#include <linux/linkage.h>
18 19
19 .text20 .text
20
21 .globl protected_mode_jump
22 .type protected_mode_jump, @function
23
24 .code1621 .code16
25 22
26/*23/*
27 * void protected_mode_jump(u32 entrypoint, u32 bootparams);24 * void protected_mode_jump(u32 entrypoint, u32 bootparams);
28 */25 */
29protected_mode_jump:26GLOBAL(protected_mode_jump)
30 movl %edx, %esi # Pointer to boot_params table27 movl %edx, %esi # Pointer to boot_params table
31 28
32 xorl %ebx, %ebx29 xorl %ebx, %ebx
@@ -47,12 +44,10 @@ protected_mode_jump: · 14 unmodified lines
47 .byte 0x66, 0xea # ljmpl opcode44 .byte 0x66, 0xea # ljmpl opcode
482: .long in_pm32 # offset452: .long in_pm32 # offset
49 .word __BOOT_CS # segment46 .word __BOOT_CS # segment
50 47ENDPROC(protected_mode_jump)
51 .size protected_mode_jump, .-protected_mode_jump
52 48
53 .code3249 .code32
54 .type in_pm32, @function50GLOBAL(in_pm32)
55in_pm32:
56 # Set up data segments for flat 32-bit mode51 # Set up data segments for flat 32-bit mode
57 movl %ecx, %ds52 movl %ecx, %ds
58 movl %ecx, %es53 movl %ecx, %es
@@ -78,5 +73,4 @@ in_pm32: · 19 unmodified lines
78 lldt %cx73 lldt %cx
79 74
80 jmpl *%eax # Jump to the 32-bit entrypoint75 jmpl *%eax # Jump to the 32-bit entrypoint
81 76ENDPROC(in_pm32)
82 .size in_pm32, .-in_pm32
arch/x86/boot/voyager.c+0−40
@@ -1,40 +0,0 @@
1/* -*- linux-c -*- ------------------------------------------------------- *
2 *
3 * Copyright (C) 1991, 1992 Linus Torvalds
4 * Copyright 2007 rPath, Inc. - All Rights Reserved
5 *
6 * This file is part of the Linux kernel, and is made available under
7 * the terms of the GNU General Public License version 2.
8 *
9 * ----------------------------------------------------------------------- */
10
11/*
12 * Get the Voyager config information
13 */
14
15#include "boot.h"
16
17int query_voyager(void)
18{
19 u8 err;
20 u16 es, di;
21 /* Abuse the apm_bios_info area for this */
22 u8 *data_ptr = (u8 *)&boot_params.apm_bios_info;
23
24 data_ptr[0] = 0xff; /* Flag on config not found(?) */
25
26 asm("pushw %%es ; "
27 "int $0x15 ; "
28 "setc %0 ; "
29 "movw %%es, %1 ; "
30 "popw %%es"
31 : "=q" (err), "=r" (es), "=D" (di)
32 : "a" (0xffc0));
33
34 if (err)
35 return -1; /* Not Voyager */
36
37 set_fs(es);
38 copy_from_fs(data_ptr, di, 7); /* Table is 7 bytes apparently */
39 return 0;
40}
arch/x86/configs/i386_defconfig+330−89
@@ -1,14 +1,13 @@
1#1#
2# Automatically generated make config: don't edit2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.27-rc53# Linux kernel version: 2.6.29-rc4
4# Wed Sep 3 17:23:09 20084# Tue Feb 24 15:50:58 2009
5#5#
6# CONFIG_64BIT is not set6# CONFIG_64BIT is not set
7CONFIG_X86_32=y7CONFIG_X86_32=y
8# CONFIG_X86_64 is not set8# CONFIG_X86_64 is not set
9CONFIG_X86=y9CONFIG_X86=y
10CONFIG_ARCH_DEFCONFIG="arch/x86/configs/i386_defconfig"10CONFIG_ARCH_DEFCONFIG="arch/x86/configs/i386_defconfig"
11# CONFIG_GENERIC_LOCKBREAK is not set
12CONFIG_GENERIC_TIME=y11CONFIG_GENERIC_TIME=y
13CONFIG_GENERIC_CMOS_UPDATE=y12CONFIG_GENERIC_CMOS_UPDATE=y
14CONFIG_CLOCKSOURCE_WATCHDOG=y13CONFIG_CLOCKSOURCE_WATCHDOG=y
@@ -24,16 +23,14 @@ CONFIG_GENERIC_ISA_DMA=y · 9 unmodified lines
24CONFIG_GENERIC_IOMAP=y23CONFIG_GENERIC_IOMAP=y
25CONFIG_GENERIC_BUG=y24CONFIG_GENERIC_BUG=y
26CONFIG_GENERIC_HWEIGHT=y25CONFIG_GENERIC_HWEIGHT=y
27# CONFIG_GENERIC_GPIO is not set
28CONFIG_ARCH_MAY_HAVE_PC_FDC=y26CONFIG_ARCH_MAY_HAVE_PC_FDC=y
29# CONFIG_RWSEM_GENERIC_SPINLOCK is not set27# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
30CONFIG_RWSEM_XCHGADD_ALGORITHM=y28CONFIG_RWSEM_XCHGADD_ALGORITHM=y
31# CONFIG_ARCH_HAS_ILOG2_U32 is not set
32# CONFIG_ARCH_HAS_ILOG2_U64 is not set
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y29CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_GENERIC_CALIBRATE_DELAY=y30CONFIG_GENERIC_CALIBRATE_DELAY=y
35# CONFIG_GENERIC_TIME_VSYSCALL is not set31# CONFIG_GENERIC_TIME_VSYSCALL is not set
36CONFIG_ARCH_HAS_CPU_RELAX=y32CONFIG_ARCH_HAS_CPU_RELAX=y
33CONFIG_ARCH_HAS_DEFAULT_IDLE=y
37CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y34CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
38CONFIG_HAVE_SETUP_PER_CPU_AREA=y35CONFIG_HAVE_SETUP_PER_CPU_AREA=y
39# CONFIG_HAVE_CPUMASK_OF_CPU_MAP is not set36# CONFIG_HAVE_CPUMASK_OF_CPU_MAP is not set
@@ -42,12 +39,12 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y · 2 unmodified lines
42# CONFIG_ZONE_DMA32 is not set39# CONFIG_ZONE_DMA32 is not set
43CONFIG_ARCH_POPULATES_NODE_MAP=y40CONFIG_ARCH_POPULATES_NODE_MAP=y
44# CONFIG_AUDIT_ARCH is not set41# CONFIG_AUDIT_ARCH is not set
45CONFIG_ARCH_SUPPORTS_AOUT=y
46CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y42CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y
47CONFIG_GENERIC_HARDIRQS=y43CONFIG_GENERIC_HARDIRQS=y
48CONFIG_GENERIC_IRQ_PROBE=y44CONFIG_GENERIC_IRQ_PROBE=y
49CONFIG_GENERIC_PENDING_IRQ=y45CONFIG_GENERIC_PENDING_IRQ=y
50CONFIG_X86_SMP=y46CONFIG_X86_SMP=y
47CONFIG_USE_GENERIC_SMP_HELPERS=y
51CONFIG_X86_32_SMP=y48CONFIG_X86_32_SMP=y
52CONFIG_X86_HT=y49CONFIG_X86_HT=y
53CONFIG_X86_BIOS_REBOOT=y50CONFIG_X86_BIOS_REBOOT=y
@@ -76,30 +73,44 @@ CONFIG_TASK_IO_ACCOUNTING=y · 22 unmodified lines
76CONFIG_AUDIT=y73CONFIG_AUDIT=y
77CONFIG_AUDITSYSCALL=y74CONFIG_AUDITSYSCALL=y
78CONFIG_AUDIT_TREE=y75CONFIG_AUDIT_TREE=y
76
77#
78# RCU Subsystem
79#
80# CONFIG_CLASSIC_RCU is not set
81CONFIG_TREE_RCU=y
82# CONFIG_PREEMPT_RCU is not set
83# CONFIG_RCU_TRACE is not set
84CONFIG_RCU_FANOUT=32
85# CONFIG_RCU_FANOUT_EXACT is not set
86# CONFIG_TREE_RCU_TRACE is not set
87# CONFIG_PREEMPT_RCU_TRACE is not set
79# CONFIG_IKCONFIG is not set88# CONFIG_IKCONFIG is not set
80CONFIG_LOG_BUF_SHIFT=1889CONFIG_LOG_BUF_SHIFT=18
81CONFIG_CGROUPS=y
82# CONFIG_CGROUP_DEBUG is not set
83CONFIG_CGROUP_NS=y
84# CONFIG_CGROUP_DEVICE is not set
85CONFIG_CPUSETS=y
86CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y90CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y
87CONFIG_GROUP_SCHED=y91CONFIG_GROUP_SCHED=y
88CONFIG_FAIR_GROUP_SCHED=y92CONFIG_FAIR_GROUP_SCHED=y
89# CONFIG_RT_GROUP_SCHED is not set93# CONFIG_RT_GROUP_SCHED is not set
90# CONFIG_USER_SCHED is not set94# CONFIG_USER_SCHED is not set
91CONFIG_CGROUP_SCHED=y95CONFIG_CGROUP_SCHED=y
96CONFIG_CGROUPS=y
97# CONFIG_CGROUP_DEBUG is not set
98CONFIG_CGROUP_NS=y
99CONFIG_CGROUP_FREEZER=y
100# CONFIG_CGROUP_DEVICE is not set
101CONFIG_CPUSETS=y
102CONFIG_PROC_PID_CPUSET=y
92CONFIG_CGROUP_CPUACCT=y103CONFIG_CGROUP_CPUACCT=y
93CONFIG_RESOURCE_COUNTERS=y104CONFIG_RESOURCE_COUNTERS=y
94# CONFIG_CGROUP_MEM_RES_CTLR is not set105# CONFIG_CGROUP_MEM_RES_CTLR is not set
95# CONFIG_SYSFS_DEPRECATED_V2 is not set106# CONFIG_SYSFS_DEPRECATED_V2 is not set
96CONFIG_PROC_PID_CPUSET=y
97CONFIG_RELAY=y107CONFIG_RELAY=y
98CONFIG_NAMESPACES=y108CONFIG_NAMESPACES=y
99CONFIG_UTS_NS=y109CONFIG_UTS_NS=y
100CONFIG_IPC_NS=y110CONFIG_IPC_NS=y
101CONFIG_USER_NS=y111CONFIG_USER_NS=y
102CONFIG_PID_NS=y112CONFIG_PID_NS=y
113CONFIG_NET_NS=y
103CONFIG_BLK_DEV_INITRD=y114CONFIG_BLK_DEV_INITRD=y
104CONFIG_INITRAMFS_SOURCE=""115CONFIG_INITRAMFS_SOURCE=""
105CONFIG_CC_OPTIMIZE_FOR_SIZE=y116CONFIG_CC_OPTIMIZE_FOR_SIZE=y
@@ -124,12 +135,15 @@ CONFIG_SIGNALFD=y · 18 unmodified lines
124CONFIG_TIMERFD=y135CONFIG_TIMERFD=y
125CONFIG_EVENTFD=y136CONFIG_EVENTFD=y
126CONFIG_SHMEM=y137CONFIG_SHMEM=y
138CONFIG_AIO=y
127CONFIG_VM_EVENT_COUNTERS=y139CONFIG_VM_EVENT_COUNTERS=y
140CONFIG_PCI_QUIRKS=y
128CONFIG_SLUB_DEBUG=y141CONFIG_SLUB_DEBUG=y
129# CONFIG_SLAB is not set142# CONFIG_SLAB is not set
130CONFIG_SLUB=y143CONFIG_SLUB=y
131# CONFIG_SLOB is not set144# CONFIG_SLOB is not set
132CONFIG_PROFILING=y145CONFIG_PROFILING=y
146CONFIG_TRACEPOINTS=y
133CONFIG_MARKERS=y147CONFIG_MARKERS=y
134# CONFIG_OPROFILE is not set148# CONFIG_OPROFILE is not set
135CONFIG_HAVE_OPROFILE=y149CONFIG_HAVE_OPROFILE=y
@@ -139,15 +153,10 @@ CONFIG_KRETPROBES=y · 3 unmodified lines
139CONFIG_HAVE_IOREMAP_PROT=y153CONFIG_HAVE_IOREMAP_PROT=y
140CONFIG_HAVE_KPROBES=y154CONFIG_HAVE_KPROBES=y
141CONFIG_HAVE_KRETPROBES=y155CONFIG_HAVE_KRETPROBES=y
142# CONFIG_HAVE_ARCH_TRACEHOOK is not set156CONFIG_HAVE_ARCH_TRACEHOOK=y
143# CONFIG_HAVE_DMA_ATTRS is not set
144CONFIG_USE_GENERIC_SMP_HELPERS=y
145# CONFIG_HAVE_CLK is not set
146CONFIG_PROC_PAGE_MONITOR=y
147CONFIG_HAVE_GENERIC_DMA_COHERENT=y157CONFIG_HAVE_GENERIC_DMA_COHERENT=y
148CONFIG_SLABINFO=y158CONFIG_SLABINFO=y
149CONFIG_RT_MUTEXES=y159CONFIG_RT_MUTEXES=y
150# CONFIG_TINY_SHMEM is not set
151CONFIG_BASE_SMALL=0160CONFIG_BASE_SMALL=0
152CONFIG_MODULES=y161CONFIG_MODULES=y
153# CONFIG_MODULE_FORCE_LOAD is not set162# CONFIG_MODULE_FORCE_LOAD is not set
@@ -155,12 +164,10 @@ CONFIG_MODULE_UNLOAD=y · 1 unmodified line
155CONFIG_MODULE_FORCE_UNLOAD=y164CONFIG_MODULE_FORCE_UNLOAD=y
156# CONFIG_MODVERSIONS is not set165# CONFIG_MODVERSIONS is not set
157# CONFIG_MODULE_SRCVERSION_ALL is not set166# CONFIG_MODULE_SRCVERSION_ALL is not set
158CONFIG_KMOD=y
159CONFIG_STOP_MACHINE=y167CONFIG_STOP_MACHINE=y
160CONFIG_BLOCK=y168CONFIG_BLOCK=y
161# CONFIG_LBD is not set169# CONFIG_LBD is not set
162CONFIG_BLK_DEV_IO_TRACE=y170CONFIG_BLK_DEV_IO_TRACE=y
163# CONFIG_LSF is not set
164CONFIG_BLK_DEV_BSG=y171CONFIG_BLK_DEV_BSG=y
165# CONFIG_BLK_DEV_INTEGRITY is not set172# CONFIG_BLK_DEV_INTEGRITY is not set
166 173
@@ -176,7 +183,7 @@ CONFIG_IOSCHED_CFQ=y · 9 unmodified lines
176CONFIG_DEFAULT_CFQ=y183CONFIG_DEFAULT_CFQ=y
177# CONFIG_DEFAULT_NOOP is not set184# CONFIG_DEFAULT_NOOP is not set
178CONFIG_DEFAULT_IOSCHED="cfq"185CONFIG_DEFAULT_IOSCHED="cfq"
179CONFIG_CLASSIC_RCU=y186CONFIG_FREEZER=y
180 187
181#188#
182# Processor type and features189# Processor type and features
@@ -186,15 +193,14 @@ CONFIG_NO_HZ=y · 3 unmodified lines
186CONFIG_HIGH_RES_TIMERS=y193CONFIG_HIGH_RES_TIMERS=y
187CONFIG_GENERIC_CLOCKEVENTS_BUILD=y194CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
188CONFIG_SMP=y195CONFIG_SMP=y
196CONFIG_SPARSE_IRQ=y
189CONFIG_X86_FIND_SMP_CONFIG=y197CONFIG_X86_FIND_SMP_CONFIG=y
190CONFIG_X86_MPPARSE=y198CONFIG_X86_MPPARSE=y
191CONFIG_X86_PC=y
192# CONFIG_X86_ELAN is not set199# CONFIG_X86_ELAN is not set
193# CONFIG_X86_VOYAGER is not set
194# CONFIG_X86_GENERICARCH is not set200# CONFIG_X86_GENERICARCH is not set
195# CONFIG_X86_VSMP is not set201# CONFIG_X86_VSMP is not set
196# CONFIG_X86_RDC321X is not set202# CONFIG_X86_RDC321X is not set
197CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y203CONFIG_SCHED_OMIT_FRAME_POINTER=y
198# CONFIG_PARAVIRT_GUEST is not set204# CONFIG_PARAVIRT_GUEST is not set
199# CONFIG_MEMTEST is not set205# CONFIG_MEMTEST is not set
200# CONFIG_M386 is not set206# CONFIG_M386 is not set
@@ -238,10 +244,19 @@ CONFIG_X86_TSC=y · 37 unmodified lines
238CONFIG_X86_CMOV=y244CONFIG_X86_CMOV=y
239CONFIG_X86_MINIMUM_CPU_FAMILY=4245CONFIG_X86_MINIMUM_CPU_FAMILY=4
240CONFIG_X86_DEBUGCTLMSR=y246CONFIG_X86_DEBUGCTLMSR=y
247CONFIG_CPU_SUP_INTEL=y
248CONFIG_CPU_SUP_CYRIX_32=y
249CONFIG_CPU_SUP_AMD=y
250CONFIG_CPU_SUP_CENTAUR_32=y
251CONFIG_CPU_SUP_TRANSMETA_32=y
252CONFIG_CPU_SUP_UMC_32=y
253CONFIG_X86_DS=y
254CONFIG_X86_PTRACE_BTS=y
241CONFIG_HPET_TIMER=y255CONFIG_HPET_TIMER=y
242CONFIG_HPET_EMULATE_RTC=y256CONFIG_HPET_EMULATE_RTC=y
243CONFIG_DMI=y257CONFIG_DMI=y
244# CONFIG_IOMMU_HELPER is not set258# CONFIG_IOMMU_HELPER is not set
259# CONFIG_IOMMU_API is not set
245CONFIG_NR_CPUS=64260CONFIG_NR_CPUS=64
246CONFIG_SCHED_SMT=y261CONFIG_SCHED_SMT=y
247CONFIG_SCHED_MC=y262CONFIG_SCHED_MC=y
@@ -250,12 +265,17 @@ CONFIG_PREEMPT_VOLUNTARY=y · 2 unmodified lines
250# CONFIG_PREEMPT is not set265# CONFIG_PREEMPT is not set
251CONFIG_X86_LOCAL_APIC=y266CONFIG_X86_LOCAL_APIC=y
252CONFIG_X86_IO_APIC=y267CONFIG_X86_IO_APIC=y
253# CONFIG_X86_MCE is not set268CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y
269CONFIG_X86_MCE=y
270CONFIG_X86_MCE_NONFATAL=y
271CONFIG_X86_MCE_P4THERMAL=y
254CONFIG_VM86=y272CONFIG_VM86=y
255# CONFIG_TOSHIBA is not set273# CONFIG_TOSHIBA is not set
256# CONFIG_I8K is not set274# CONFIG_I8K is not set
257CONFIG_X86_REBOOTFIXUPS=y275CONFIG_X86_REBOOTFIXUPS=y
258CONFIG_MICROCODE=y276CONFIG_MICROCODE=y
277CONFIG_MICROCODE_INTEL=y
278CONFIG_MICROCODE_AMD=y
259CONFIG_MICROCODE_OLD_INTERFACE=y279CONFIG_MICROCODE_OLD_INTERFACE=y
260CONFIG_X86_MSR=y280CONFIG_X86_MSR=y
261CONFIG_X86_CPUID=y281CONFIG_X86_CPUID=y
@@ -264,6 +284,7 @@ CONFIG_HIGHMEM4G=y · 2 unmodified lines
264# CONFIG_HIGHMEM64G is not set284# CONFIG_HIGHMEM64G is not set
265CONFIG_PAGE_OFFSET=0xC0000000285CONFIG_PAGE_OFFSET=0xC0000000
266CONFIG_HIGHMEM=y286CONFIG_HIGHMEM=y
287# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
267CONFIG_ARCH_FLATMEM_ENABLE=y288CONFIG_ARCH_FLATMEM_ENABLE=y
268CONFIG_ARCH_SPARSEMEM_ENABLE=y289CONFIG_ARCH_SPARSEMEM_ENABLE=y
269CONFIG_ARCH_SELECT_MEMORY_MODEL=y290CONFIG_ARCH_SELECT_MEMORY_MODEL=y
@@ -274,14 +295,17 @@ CONFIG_FLATMEM_MANUAL=y · 4 unmodified lines
274CONFIG_FLATMEM=y295CONFIG_FLATMEM=y
275CONFIG_FLAT_NODE_MEM_MAP=y296CONFIG_FLAT_NODE_MEM_MAP=y
276CONFIG_SPARSEMEM_STATIC=y297CONFIG_SPARSEMEM_STATIC=y
277# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
278CONFIG_PAGEFLAGS_EXTENDED=y298CONFIG_PAGEFLAGS_EXTENDED=y
279CONFIG_SPLIT_PTLOCK_CPUS=4299CONFIG_SPLIT_PTLOCK_CPUS=4
280CONFIG_RESOURCES_64BIT=y300# CONFIG_PHYS_ADDR_T_64BIT is not set
281CONFIG_ZONE_DMA_FLAG=1301CONFIG_ZONE_DMA_FLAG=1
282CONFIG_BOUNCE=y302CONFIG_BOUNCE=y
283CONFIG_VIRT_TO_BUS=y303CONFIG_VIRT_TO_BUS=y
304CONFIG_UNEVICTABLE_LRU=y
284CONFIG_HIGHPTE=y305CONFIG_HIGHPTE=y
306CONFIG_X86_CHECK_BIOS_CORRUPTION=y
307CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y
308CONFIG_X86_RESERVE_LOW_64K=y
285# CONFIG_MATH_EMULATION is not set309# CONFIG_MATH_EMULATION is not set
286CONFIG_MTRR=y310CONFIG_MTRR=y
287# CONFIG_MTRR_SANITIZER is not set311# CONFIG_MTRR_SANITIZER is not set
@@ -302,10 +326,11 @@ CONFIG_PHYSICAL_START=0x1000000 · 14 unmodified lines
302CONFIG_PHYSICAL_ALIGN=0x200000326CONFIG_PHYSICAL_ALIGN=0x200000
303CONFIG_HOTPLUG_CPU=y327CONFIG_HOTPLUG_CPU=y
304# CONFIG_COMPAT_VDSO is not set328# CONFIG_COMPAT_VDSO is not set
329# CONFIG_CMDLINE_BOOL is not set
305CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y330CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
306 331
307#332#
308# Power management options333# Power management and ACPI options
309#334#
310CONFIG_PM=y335CONFIG_PM=y
311CONFIG_PM_DEBUG=y336CONFIG_PM_DEBUG=y
@@ -331,19 +356,13 @@ CONFIG_ACPI_BATTERY=y · 19 unmodified lines
331CONFIG_ACPI_BUTTON=y356CONFIG_ACPI_BUTTON=y
332CONFIG_ACPI_FAN=y357CONFIG_ACPI_FAN=y
333CONFIG_ACPI_DOCK=y358CONFIG_ACPI_DOCK=y
334# CONFIG_ACPI_BAY is not set
335CONFIG_ACPI_PROCESSOR=y359CONFIG_ACPI_PROCESSOR=y
336CONFIG_ACPI_HOTPLUG_CPU=y360CONFIG_ACPI_HOTPLUG_CPU=y
337CONFIG_ACPI_THERMAL=y361CONFIG_ACPI_THERMAL=y
338# CONFIG_ACPI_WMI is not set
339# CONFIG_ACPI_ASUS is not set
340# CONFIG_ACPI_TOSHIBA is not set
341# CONFIG_ACPI_CUSTOM_DSDT is not set362# CONFIG_ACPI_CUSTOM_DSDT is not set
342CONFIG_ACPI_BLACKLIST_YEAR=0363CONFIG_ACPI_BLACKLIST_YEAR=0
343# CONFIG_ACPI_DEBUG is not set364# CONFIG_ACPI_DEBUG is not set
344CONFIG_ACPI_EC=y
345# CONFIG_ACPI_PCI_SLOT is not set365# CONFIG_ACPI_PCI_SLOT is not set
346CONFIG_ACPI_POWER=y
347CONFIG_ACPI_SYSTEM=y366CONFIG_ACPI_SYSTEM=y
348CONFIG_X86_PM_TIMER=y367CONFIG_X86_PM_TIMER=y
349CONFIG_ACPI_CONTAINER=y368CONFIG_ACPI_CONTAINER=y
@@ -388,7 +407,6 @@ CONFIG_X86_ACPI_CPUFREQ=y · 38 unmodified lines
388#407#
389# shared options408# shared options
390#409#
391# CONFIG_X86_ACPI_CPUFREQ_PROC_INTF is not set
392# CONFIG_X86_SPEEDSTEP_LIB is not set410# CONFIG_X86_SPEEDSTEP_LIB is not set
393CONFIG_CPU_IDLE=y411CONFIG_CPU_IDLE=y
394CONFIG_CPU_IDLE_GOV_LADDER=y412CONFIG_CPU_IDLE_GOV_LADDER=y
@@ -415,6 +433,7 @@ CONFIG_ARCH_SUPPORTS_MSI=y · 20 unmodified lines
415CONFIG_PCI_MSI=y433CONFIG_PCI_MSI=y
416# CONFIG_PCI_LEGACY is not set434# CONFIG_PCI_LEGACY is not set
417# CONFIG_PCI_DEBUG is not set435# CONFIG_PCI_DEBUG is not set
436# CONFIG_PCI_STUB is not set
418CONFIG_HT_IRQ=y437CONFIG_HT_IRQ=y
419CONFIG_ISA_DMA_API=y438CONFIG_ISA_DMA_API=y
420# CONFIG_ISA is not set439# CONFIG_ISA is not set
@@ -452,13 +471,17 @@ CONFIG_HOTPLUG_PCI=y · 31 unmodified lines
452# Executable file formats / Emulations471# Executable file formats / Emulations
453#472#
454CONFIG_BINFMT_ELF=y473CONFIG_BINFMT_ELF=y
474CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
475CONFIG_HAVE_AOUT=y
455# CONFIG_BINFMT_AOUT is not set476# CONFIG_BINFMT_AOUT is not set
456CONFIG_BINFMT_MISC=y477CONFIG_BINFMT_MISC=y
478CONFIG_HAVE_ATOMIC_IOMAP=y
457CONFIG_NET=y479CONFIG_NET=y
458 480
459#481#
460# Networking options482# Networking options
461#483#
484CONFIG_COMPAT_NET_DEV_OPS=y
462CONFIG_PACKET=y485CONFIG_PACKET=y
463CONFIG_PACKET_MMAP=y486CONFIG_PACKET_MMAP=y
464CONFIG_UNIX=y487CONFIG_UNIX=y
@@ -519,7 +542,6 @@ CONFIG_DEFAULT_CUBIC=y · 54 unmodified lines
519# CONFIG_DEFAULT_RENO is not set542# CONFIG_DEFAULT_RENO is not set
520CONFIG_DEFAULT_TCP_CONG="cubic"543CONFIG_DEFAULT_TCP_CONG="cubic"
521CONFIG_TCP_MD5SIG=y544CONFIG_TCP_MD5SIG=y
522# CONFIG_IP_VS is not set
523CONFIG_IPV6=y545CONFIG_IPV6=y
524# CONFIG_IPV6_PRIVACY is not set546# CONFIG_IPV6_PRIVACY is not set
525# CONFIG_IPV6_ROUTER_PREF is not set547# CONFIG_IPV6_ROUTER_PREF is not set
@@ -557,19 +579,21 @@ CONFIG_NF_CONNTRACK_IRC=y · 31 unmodified lines
557CONFIG_NF_CONNTRACK_SIP=y579CONFIG_NF_CONNTRACK_SIP=y
558CONFIG_NF_CT_NETLINK=y580CONFIG_NF_CT_NETLINK=y
559CONFIG_NETFILTER_XTABLES=y581CONFIG_NETFILTER_XTABLES=y
582CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y
560CONFIG_NETFILTER_XT_TARGET_MARK=y583CONFIG_NETFILTER_XT_TARGET_MARK=y
561CONFIG_NETFILTER_XT_TARGET_NFLOG=y584CONFIG_NETFILTER_XT_TARGET_NFLOG=y
562CONFIG_NETFILTER_XT_TARGET_SECMARK=y585CONFIG_NETFILTER_XT_TARGET_SECMARK=y
563CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y
564CONFIG_NETFILTER_XT_TARGET_TCPMSS=y586CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
565CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y587CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
566CONFIG_NETFILTER_XT_MATCH_MARK=y588CONFIG_NETFILTER_XT_MATCH_MARK=y
567CONFIG_NETFILTER_XT_MATCH_POLICY=y589CONFIG_NETFILTER_XT_MATCH_POLICY=y
568CONFIG_NETFILTER_XT_MATCH_STATE=y590CONFIG_NETFILTER_XT_MATCH_STATE=y
591# CONFIG_IP_VS is not set
569 592
570#593#
571# IP: Netfilter Configuration594# IP: Netfilter Configuration
572#595#
596CONFIG_NF_DEFRAG_IPV4=y
573CONFIG_NF_CONNTRACK_IPV4=y597CONFIG_NF_CONNTRACK_IPV4=y
574CONFIG_NF_CONNTRACK_PROC_COMPAT=y598CONFIG_NF_CONNTRACK_PROC_COMPAT=y
575CONFIG_IP_NF_IPTABLES=y599CONFIG_IP_NF_IPTABLES=y
@@ -595,8 +619,8 @@ CONFIG_IP_NF_MANGLE=y · 19 unmodified lines
595CONFIG_NF_CONNTRACK_IPV6=y619CONFIG_NF_CONNTRACK_IPV6=y
596CONFIG_IP6_NF_IPTABLES=y620CONFIG_IP6_NF_IPTABLES=y
597CONFIG_IP6_NF_MATCH_IPV6HEADER=y621CONFIG_IP6_NF_MATCH_IPV6HEADER=y
598CONFIG_IP6_NF_FILTER=y
599CONFIG_IP6_NF_TARGET_LOG=y622CONFIG_IP6_NF_TARGET_LOG=y
623CONFIG_IP6_NF_FILTER=y
600CONFIG_IP6_NF_TARGET_REJECT=y624CONFIG_IP6_NF_TARGET_REJECT=y
601CONFIG_IP6_NF_MANGLE=y625CONFIG_IP6_NF_MANGLE=y
602# CONFIG_IP_DCCP is not set626# CONFIG_IP_DCCP is not set
@@ -604,6 +628,7 @@ CONFIG_IP6_NF_MANGLE=y · 1 unmodified line
604# CONFIG_TIPC is not set628# CONFIG_TIPC is not set
605# CONFIG_ATM is not set629# CONFIG_ATM is not set
606# CONFIG_BRIDGE is not set630# CONFIG_BRIDGE is not set
631# CONFIG_NET_DSA is not set
607# CONFIG_VLAN_8021Q is not set632# CONFIG_VLAN_8021Q is not set
608# CONFIG_DECNET is not set633# CONFIG_DECNET is not set
609CONFIG_LLC=y634CONFIG_LLC=y
@@ -623,6 +648,7 @@ CONFIG_NET_SCHED=y · 13 unmodified lines
623# CONFIG_NET_SCH_HTB is not set648# CONFIG_NET_SCH_HTB is not set
624# CONFIG_NET_SCH_HFSC is not set649# CONFIG_NET_SCH_HFSC is not set
625# CONFIG_NET_SCH_PRIO is not set650# CONFIG_NET_SCH_PRIO is not set
651# CONFIG_NET_SCH_MULTIQ is not set
626# CONFIG_NET_SCH_RED is not set652# CONFIG_NET_SCH_RED is not set
627# CONFIG_NET_SCH_SFQ is not set653# CONFIG_NET_SCH_SFQ is not set
628# CONFIG_NET_SCH_TEQL is not set654# CONFIG_NET_SCH_TEQL is not set
@@ -630,6 +656,7 @@ CONFIG_NET_SCHED=y · 1 unmodified line
630# CONFIG_NET_SCH_GRED is not set656# CONFIG_NET_SCH_GRED is not set
631# CONFIG_NET_SCH_DSMARK is not set657# CONFIG_NET_SCH_DSMARK is not set
632# CONFIG_NET_SCH_NETEM is not set658# CONFIG_NET_SCH_NETEM is not set
659# CONFIG_NET_SCH_DRR is not set
633# CONFIG_NET_SCH_INGRESS is not set660# CONFIG_NET_SCH_INGRESS is not set
634 661
635#662#
@@ -644,6 +671,7 @@ CONFIG_NET_CLS=y · 8 unmodified lines
644# CONFIG_NET_CLS_RSVP is not set671# CONFIG_NET_CLS_RSVP is not set
645# CONFIG_NET_CLS_RSVP6 is not set672# CONFIG_NET_CLS_RSVP6 is not set
646# CONFIG_NET_CLS_FLOW is not set673# CONFIG_NET_CLS_FLOW is not set
674# CONFIG_NET_CLS_CGROUP is not set
647CONFIG_NET_EMATCH=y675CONFIG_NET_EMATCH=y
648CONFIG_NET_EMATCH_STACK=32676CONFIG_NET_EMATCH_STACK=32
649# CONFIG_NET_EMATCH_CMP is not set677# CONFIG_NET_EMATCH_CMP is not set
@@ -659,7 +687,9 @@ CONFIG_NET_CLS_ACT=y · 9 unmodified lines
659# CONFIG_NET_ACT_NAT is not set687# CONFIG_NET_ACT_NAT is not set
660# CONFIG_NET_ACT_PEDIT is not set688# CONFIG_NET_ACT_PEDIT is not set
661# CONFIG_NET_ACT_SIMP is not set689# CONFIG_NET_ACT_SIMP is not set
690# CONFIG_NET_ACT_SKBEDIT is not set
662CONFIG_NET_SCH_FIFO=y691CONFIG_NET_SCH_FIFO=y
692# CONFIG_DCB is not set
663 693
664#694#
665# Network testing695# Network testing
@@ -676,29 +706,33 @@ CONFIG_HAMRADIO=y · 10 unmodified lines
676# CONFIG_IRDA is not set706# CONFIG_IRDA is not set
677# CONFIG_BT is not set707# CONFIG_BT is not set
678# CONFIG_AF_RXRPC is not set708# CONFIG_AF_RXRPC is not set
709# CONFIG_PHONET is not set
679CONFIG_FIB_RULES=y710CONFIG_FIB_RULES=y
680 711CONFIG_WIRELESS=y
681#
682# Wireless
683#
684CONFIG_CFG80211=y712CONFIG_CFG80211=y
713# CONFIG_CFG80211_REG_DEBUG is not set
685CONFIG_NL80211=y714CONFIG_NL80211=y
715CONFIG_WIRELESS_OLD_REGULATORY=y
686CONFIG_WIRELESS_EXT=y716CONFIG_WIRELESS_EXT=y
687CONFIG_WIRELESS_EXT_SYSFS=y717CONFIG_WIRELESS_EXT_SYSFS=y
718# CONFIG_LIB80211 is not set
688CONFIG_MAC80211=y719CONFIG_MAC80211=y
689 720
690#721#
691# Rate control algorithm selection722# Rate control algorithm selection
692#723#
693CONFIG_MAC80211_RC_PID=y724CONFIG_MAC80211_RC_MINSTREL=y
694CONFIG_MAC80211_RC_DEFAULT_PID=y725# CONFIG_MAC80211_RC_DEFAULT_PID is not set
695CONFIG_MAC80211_RC_DEFAULT="pid"726CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
727CONFIG_MAC80211_RC_DEFAULT="minstrel"
696# CONFIG_MAC80211_MESH is not set728# CONFIG_MAC80211_MESH is not set
697CONFIG_MAC80211_LEDS=y729CONFIG_MAC80211_LEDS=y
698# CONFIG_MAC80211_DEBUGFS is not set730# CONFIG_MAC80211_DEBUGFS is not set
699# CONFIG_MAC80211_DEBUG_MENU is not set731# CONFIG_MAC80211_DEBUG_MENU is not set
700# CONFIG_IEEE80211 is not set732# CONFIG_WIMAX is not set
701# CONFIG_RFKILL is not set733CONFIG_RFKILL=y
734# CONFIG_RFKILL_INPUT is not set
735CONFIG_RFKILL_LEDS=y
702# CONFIG_NET_9P is not set736# CONFIG_NET_9P is not set
703 737
704#738#
@@ -722,7 +756,7 @@ CONFIG_PROC_EVENTS=y · 17 unmodified lines
722# CONFIG_MTD is not set756# CONFIG_MTD is not set
723# CONFIG_PARPORT is not set757# CONFIG_PARPORT is not set
724CONFIG_PNP=y758CONFIG_PNP=y
725# CONFIG_PNP_DEBUG is not set759CONFIG_PNP_DEBUG_MESSAGES=y
726 760
727#761#
728# Protocols762# Protocols
@@ -750,20 +784,19 @@ CONFIG_BLK_DEV_RAM_SIZE=16384 · 21 unmodified lines
750CONFIG_MISC_DEVICES=y784CONFIG_MISC_DEVICES=y
751# CONFIG_IBM_ASM is not set785# CONFIG_IBM_ASM is not set
752# CONFIG_PHANTOM is not set786# CONFIG_PHANTOM is not set
753# CONFIG_EEPROM_93CX6 is not set
754# CONFIG_SGI_IOC4 is not set787# CONFIG_SGI_IOC4 is not set
755# CONFIG_TIFM_CORE is not set788# CONFIG_TIFM_CORE is not set
756# CONFIG_ACER_WMI is not set789# CONFIG_ICS932S401 is not set
757# CONFIG_ASUS_LAPTOP is not set
758# CONFIG_FUJITSU_LAPTOP is not set
759# CONFIG_TC1100_WMI is not set
760# CONFIG_MSI_LAPTOP is not set
761# CONFIG_COMPAL_LAPTOP is not set
762# CONFIG_SONY_LAPTOP is not set
763# CONFIG_THINKPAD_ACPI is not set
764# CONFIG_INTEL_MENLOW is not set
765# CONFIG_ENCLOSURE_SERVICES is not set790# CONFIG_ENCLOSURE_SERVICES is not set
766# CONFIG_HP_ILO is not set791# CONFIG_HP_ILO is not set
792# CONFIG_C2PORT is not set
793
794#
795# EEPROM support
796#
797# CONFIG_EEPROM_AT24 is not set
798# CONFIG_EEPROM_LEGACY is not set
799# CONFIG_EEPROM_93CX6 is not set
767CONFIG_HAVE_IDE=y800CONFIG_HAVE_IDE=y
768# CONFIG_IDE is not set801# CONFIG_IDE is not set
769 802
@@ -802,7 +835,7 @@ CONFIG_SCSI_WAIT_SCAN=m · 32 unmodified lines
802#835#
803CONFIG_SCSI_SPI_ATTRS=y836CONFIG_SCSI_SPI_ATTRS=y
804# CONFIG_SCSI_FC_ATTRS is not set837# CONFIG_SCSI_FC_ATTRS is not set
805CONFIG_SCSI_ISCSI_ATTRS=y838# CONFIG_SCSI_ISCSI_ATTRS is not set
806# CONFIG_SCSI_SAS_ATTRS is not set839# CONFIG_SCSI_SAS_ATTRS is not set
807# CONFIG_SCSI_SAS_LIBSAS is not set840# CONFIG_SCSI_SAS_LIBSAS is not set
808# CONFIG_SCSI_SRP_ATTRS is not set841# CONFIG_SCSI_SRP_ATTRS is not set
@@ -875,6 +908,7 @@ CONFIG_PATA_OLDPIIX=y · 66 unmodified lines
875CONFIG_PATA_SCH=y908CONFIG_PATA_SCH=y
876CONFIG_MD=y909CONFIG_MD=y
877CONFIG_BLK_DEV_MD=y910CONFIG_BLK_DEV_MD=y
911CONFIG_MD_AUTODETECT=y
878# CONFIG_MD_LINEAR is not set912# CONFIG_MD_LINEAR is not set
879# CONFIG_MD_RAID0 is not set913# CONFIG_MD_RAID0 is not set
880# CONFIG_MD_RAID1 is not set914# CONFIG_MD_RAID1 is not set
@@ -930,6 +964,9 @@ CONFIG_PHYLIB=y · 49 unmodified lines
930# CONFIG_BROADCOM_PHY is not set964# CONFIG_BROADCOM_PHY is not set
931# CONFIG_ICPLUS_PHY is not set965# CONFIG_ICPLUS_PHY is not set
932# CONFIG_REALTEK_PHY is not set966# CONFIG_REALTEK_PHY is not set
967# CONFIG_NATIONAL_PHY is not set
968# CONFIG_STE10XP is not set
969# CONFIG_LSI_ET1011C_PHY is not set
933# CONFIG_FIXED_PHY is not set970# CONFIG_FIXED_PHY is not set
934# CONFIG_MDIO_BITBANG is not set971# CONFIG_MDIO_BITBANG is not set
935CONFIG_NET_ETHERNET=y972CONFIG_NET_ETHERNET=y
@@ -953,6 +990,9 @@ CONFIG_NET_TULIP=y · 17 unmodified lines
953# CONFIG_IBM_NEW_EMAC_RGMII is not set990# CONFIG_IBM_NEW_EMAC_RGMII is not set
954# CONFIG_IBM_NEW_EMAC_TAH is not set991# CONFIG_IBM_NEW_EMAC_TAH is not set
955# CONFIG_IBM_NEW_EMAC_EMAC4 is not set992# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
993# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
994# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
995# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
956CONFIG_NET_PCI=y996CONFIG_NET_PCI=y
957# CONFIG_PCNET32 is not set997# CONFIG_PCNET32 is not set
958# CONFIG_AMD8111_ETH is not set998# CONFIG_AMD8111_ETH is not set
@@ -960,7 +1000,6 @@ CONFIG_NET_PCI=y · 1 unmodified line
960# CONFIG_B44 is not set1000# CONFIG_B44 is not set
961CONFIG_FORCEDETH=y1001CONFIG_FORCEDETH=y
962# CONFIG_FORCEDETH_NAPI is not set1002# CONFIG_FORCEDETH_NAPI is not set
963# CONFIG_EEPRO100 is not set
964CONFIG_E100=y1003CONFIG_E100=y
965# CONFIG_FEALNX is not set1004# CONFIG_FEALNX is not set
966# CONFIG_NATSEMI is not set1005# CONFIG_NATSEMI is not set
@@ -974,15 +1013,16 @@ CONFIG_8139TOO=y · 7 unmodified lines
974# CONFIG_R6040 is not set1013# CONFIG_R6040 is not set
975# CONFIG_SIS900 is not set1014# CONFIG_SIS900 is not set
976# CONFIG_EPIC100 is not set1015# CONFIG_EPIC100 is not set
1016# CONFIG_SMSC9420 is not set
977# CONFIG_SUNDANCE is not set1017# CONFIG_SUNDANCE is not set
978# CONFIG_TLAN is not set1018# CONFIG_TLAN is not set
979# CONFIG_VIA_RHINE is not set1019# CONFIG_VIA_RHINE is not set
980# CONFIG_SC92031 is not set1020# CONFIG_SC92031 is not set
1021# CONFIG_ATL2 is not set
981CONFIG_NETDEV_1000=y1022CONFIG_NETDEV_1000=y
982# CONFIG_ACENIC is not set1023# CONFIG_ACENIC is not set
983# CONFIG_DL2K is not set1024# CONFIG_DL2K is not set
984CONFIG_E1000=y1025CONFIG_E1000=y
985# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
986CONFIG_E1000E=y1026CONFIG_E1000E=y
987# CONFIG_IP1000 is not set1027# CONFIG_IP1000 is not set
988# CONFIG_IGB is not set1028# CONFIG_IGB is not set
@@ -1000,18 +1040,23 @@ CONFIG_BNX2=y · 11 unmodified lines
1000# CONFIG_QLA3XXX is not set1040# CONFIG_QLA3XXX is not set
1001# CONFIG_ATL1 is not set1041# CONFIG_ATL1 is not set
1002# CONFIG_ATL1E is not set1042# CONFIG_ATL1E is not set
1043# CONFIG_JME is not set
1003CONFIG_NETDEV_10000=y1044CONFIG_NETDEV_10000=y
1004# CONFIG_CHELSIO_T1 is not set1045# CONFIG_CHELSIO_T1 is not set
1046CONFIG_CHELSIO_T3_DEPENDS=y
1005# CONFIG_CHELSIO_T3 is not set1047# CONFIG_CHELSIO_T3 is not set
1048# CONFIG_ENIC is not set
1006# CONFIG_IXGBE is not set1049# CONFIG_IXGBE is not set
1007# CONFIG_IXGB is not set1050# CONFIG_IXGB is not set
1008# CONFIG_S2IO is not set1051# CONFIG_S2IO is not set
1009# CONFIG_MYRI10GE is not set1052# CONFIG_MYRI10GE is not set
1010# CONFIG_NETXEN_NIC is not set1053# CONFIG_NETXEN_NIC is not set
1011# CONFIG_NIU is not set1054# CONFIG_NIU is not set
1055# CONFIG_MLX4_EN is not set
1012# CONFIG_MLX4_CORE is not set1056# CONFIG_MLX4_CORE is not set
1013# CONFIG_TEHUTI is not set1057# CONFIG_TEHUTI is not set
1014# CONFIG_BNX2X is not set1058# CONFIG_BNX2X is not set
1059# CONFIG_QLGE is not set
1015# CONFIG_SFC is not set1060# CONFIG_SFC is not set
1016CONFIG_TR=y1061CONFIG_TR=y
1017# CONFIG_IBMOL is not set1062# CONFIG_IBMOL is not set
@@ -1025,9 +1070,8 @@ CONFIG_TR=y · 7 unmodified lines
1025# CONFIG_WLAN_PRE80211 is not set1070# CONFIG_WLAN_PRE80211 is not set
1026CONFIG_WLAN_80211=y1071CONFIG_WLAN_80211=y
1027# CONFIG_PCMCIA_RAYCS is not set1072# CONFIG_PCMCIA_RAYCS is not set
1028# CONFIG_IPW2100 is not set
1029# CONFIG_IPW2200 is not set
1030# CONFIG_LIBERTAS is not set1073# CONFIG_LIBERTAS is not set
1074# CONFIG_LIBERTAS_THINFIRM is not set
1031# CONFIG_AIRO is not set1075# CONFIG_AIRO is not set
1032# CONFIG_HERMES is not set1076# CONFIG_HERMES is not set
1033# CONFIG_ATMEL is not set1077# CONFIG_ATMEL is not set
@@ -1044,6 +1088,8 @@ CONFIG_WLAN_80211=y · 10 unmodified lines
1044CONFIG_ATH5K=y1088CONFIG_ATH5K=y
1045# CONFIG_ATH5K_DEBUG is not set1089# CONFIG_ATH5K_DEBUG is not set
1046# CONFIG_ATH9K is not set1090# CONFIG_ATH9K is not set
1091# CONFIG_IPW2100 is not set
1092# CONFIG_IPW2200 is not set
1047# CONFIG_IWLCORE is not set1093# CONFIG_IWLCORE is not set
1048# CONFIG_IWLWIFI_LEDS is not set1094# CONFIG_IWLWIFI_LEDS is not set
1049# CONFIG_IWLAGN is not set1095# CONFIG_IWLAGN is not set
@@ -1054,6 +1100,10 @@ CONFIG_ATH5K=y · 4 unmodified lines
1054# CONFIG_ZD1211RW is not set1100# CONFIG_ZD1211RW is not set
1055# CONFIG_RT2X00 is not set1101# CONFIG_RT2X00 is not set
1056 1102
1103#
1104# Enable WiMAX (Networking options) to see the WiMAX drivers
1105#
1106
1057#1107#
1058# USB Network Adapters1108# USB Network Adapters
1059#1109#
@@ -1062,6 +1112,7 @@ CONFIG_ATH5K=y · 2 unmodified lines
1062# CONFIG_USB_PEGASUS is not set1112# CONFIG_USB_PEGASUS is not set
1063# CONFIG_USB_RTL8150 is not set1113# CONFIG_USB_RTL8150 is not set
1064# CONFIG_USB_USBNET is not set1114# CONFIG_USB_USBNET is not set
1115# CONFIG_USB_HSO is not set
1065CONFIG_NET_PCMCIA=y1116CONFIG_NET_PCMCIA=y
1066# CONFIG_PCMCIA_3C589 is not set1117# CONFIG_PCMCIA_3C589 is not set
1067# CONFIG_PCMCIA_3C574 is not set1118# CONFIG_PCMCIA_3C574 is not set
@@ -1123,6 +1174,7 @@ CONFIG_MOUSE_PS2_LOGIPS2PP=y · 55 unmodified lines
1123CONFIG_MOUSE_PS2_SYNAPTICS=y1174CONFIG_MOUSE_PS2_SYNAPTICS=y
1124CONFIG_MOUSE_PS2_LIFEBOOK=y1175CONFIG_MOUSE_PS2_LIFEBOOK=y
1125CONFIG_MOUSE_PS2_TRACKPOINT=y1176CONFIG_MOUSE_PS2_TRACKPOINT=y
1177# CONFIG_MOUSE_PS2_ELANTECH is not set
1126# CONFIG_MOUSE_PS2_TOUCHKIT is not set1178# CONFIG_MOUSE_PS2_TOUCHKIT is not set
1127# CONFIG_MOUSE_SERIAL is not set1179# CONFIG_MOUSE_SERIAL is not set
1128# CONFIG_MOUSE_APPLETOUCH is not set1180# CONFIG_MOUSE_APPLETOUCH is not set
@@ -1160,15 +1212,16 @@ CONFIG_INPUT_TOUCHSCREEN=y · 31 unmodified lines
1160# CONFIG_TOUCHSCREEN_FUJITSU is not set1212# CONFIG_TOUCHSCREEN_FUJITSU is not set
1161# CONFIG_TOUCHSCREEN_GUNZE is not set1213# CONFIG_TOUCHSCREEN_GUNZE is not set
1162# CONFIG_TOUCHSCREEN_ELO is not set1214# CONFIG_TOUCHSCREEN_ELO is not set
1215# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
1163# CONFIG_TOUCHSCREEN_MTOUCH is not set1216# CONFIG_TOUCHSCREEN_MTOUCH is not set
1164# CONFIG_TOUCHSCREEN_INEXIO is not set1217# CONFIG_TOUCHSCREEN_INEXIO is not set
1165# CONFIG_TOUCHSCREEN_MK712 is not set1218# CONFIG_TOUCHSCREEN_MK712 is not set
1166# CONFIG_TOUCHSCREEN_PENMOUNT is not set1219# CONFIG_TOUCHSCREEN_PENMOUNT is not set
1167# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set1220# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
1168# CONFIG_TOUCHSCREEN_TOUCHWIN is not set1221# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
1169# CONFIG_TOUCHSCREEN_UCB1400 is not set
1170# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set1222# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
1171# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set1223# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
1224# CONFIG_TOUCHSCREEN_TSC2007 is not set
1172CONFIG_INPUT_MISC=y1225CONFIG_INPUT_MISC=y
1173# CONFIG_INPUT_PCSPKR is not set1226# CONFIG_INPUT_PCSPKR is not set
1174# CONFIG_INPUT_APANEL is not set1227# CONFIG_INPUT_APANEL is not set
@@ -1179,6 +1232,7 @@ CONFIG_INPUT_MISC=y · 4 unmodified lines
1179# CONFIG_INPUT_KEYSPAN_REMOTE is not set1232# CONFIG_INPUT_KEYSPAN_REMOTE is not set
1180# CONFIG_INPUT_POWERMATE is not set1233# CONFIG_INPUT_POWERMATE is not set
1181# CONFIG_INPUT_YEALINK is not set1234# CONFIG_INPUT_YEALINK is not set
1235# CONFIG_INPUT_CM109 is not set
1182# CONFIG_INPUT_UINPUT is not set1236# CONFIG_INPUT_UINPUT is not set
1183 1237
1184#1238#
@@ -1245,6 +1299,7 @@ CONFIG_SERIAL_CORE=y · 60 unmodified lines
1245CONFIG_SERIAL_CORE_CONSOLE=y1299CONFIG_SERIAL_CORE_CONSOLE=y
1246# CONFIG_SERIAL_JSM is not set1300# CONFIG_SERIAL_JSM is not set
1247CONFIG_UNIX98_PTYS=y1301CONFIG_UNIX98_PTYS=y
1302# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
1248# CONFIG_LEGACY_PTYS is not set1303# CONFIG_LEGACY_PTYS is not set
1249# CONFIG_IPMI_HANDLER is not set1304# CONFIG_IPMI_HANDLER is not set
1250CONFIG_HW_RANDOM=y1305CONFIG_HW_RANDOM=y
@@ -1279,6 +1334,7 @@ CONFIG_I2C=y · 28 unmodified lines
1279CONFIG_I2C_BOARDINFO=y1334CONFIG_I2C_BOARDINFO=y
1280# CONFIG_I2C_CHARDEV is not set1335# CONFIG_I2C_CHARDEV is not set
1281CONFIG_I2C_HELPER_AUTO=y1336CONFIG_I2C_HELPER_AUTO=y
1337CONFIG_I2C_ALGOBIT=y
1282 1338
1283#1339#
1284# I2C Hardware Bus support1340# I2C Hardware Bus support
@@ -1331,8 +1387,6 @@ CONFIG_I2C_I801=y · 46 unmodified lines
1331# Miscellaneous I2C Chip support1387# Miscellaneous I2C Chip support
1332#1388#
1333# CONFIG_DS1682 is not set1389# CONFIG_DS1682 is not set
1334# CONFIG_EEPROM_AT24 is not set
1335# CONFIG_EEPROM_LEGACY is not set
1336# CONFIG_SENSORS_PCF8574 is not set1390# CONFIG_SENSORS_PCF8574 is not set
1337# CONFIG_PCF8575 is not set1391# CONFIG_PCF8575 is not set
1338# CONFIG_SENSORS_PCA9539 is not set1392# CONFIG_SENSORS_PCA9539 is not set
@@ -1351,8 +1405,78 @@ CONFIG_POWER_SUPPLY=y · 12 unmodified lines
1351# CONFIG_POWER_SUPPLY_DEBUG is not set1405# CONFIG_POWER_SUPPLY_DEBUG is not set
1352# CONFIG_PDA_POWER is not set1406# CONFIG_PDA_POWER is not set
1353# CONFIG_BATTERY_DS2760 is not set1407# CONFIG_BATTERY_DS2760 is not set
1354# CONFIG_HWMON is not set1408# CONFIG_BATTERY_BQ27x00 is not set
1409CONFIG_HWMON=y
1410# CONFIG_HWMON_VID is not set
1411# CONFIG_SENSORS_ABITUGURU is not set
1412# CONFIG_SENSORS_ABITUGURU3 is not set
1413# CONFIG_SENSORS_AD7414 is not set
1414# CONFIG_SENSORS_AD7418 is not set
1415# CONFIG_SENSORS_ADM1021 is not set
1416# CONFIG_SENSORS_ADM1025 is not set
1417# CONFIG_SENSORS_ADM1026 is not set
1418# CONFIG_SENSORS_ADM1029 is not set
1419# CONFIG_SENSORS_ADM1031 is not set
1420# CONFIG_SENSORS_ADM9240 is not set
1421# CONFIG_SENSORS_ADT7462 is not set
1422# CONFIG_SENSORS_ADT7470 is not set
1423# CONFIG_SENSORS_ADT7473 is not set
1424# CONFIG_SENSORS_ADT7475 is not set
1425# CONFIG_SENSORS_K8TEMP is not set
1426# CONFIG_SENSORS_ASB100 is not set
1427# CONFIG_SENSORS_ATXP1 is not set
1428# CONFIG_SENSORS_DS1621 is not set
1429# CONFIG_SENSORS_I5K_AMB is not set
1430# CONFIG_SENSORS_F71805F is not set
1431# CONFIG_SENSORS_F71882FG is not set
1432# CONFIG_SENSORS_F75375S is not set
1433# CONFIG_SENSORS_FSCHER is not set
1434# CONFIG_SENSORS_FSCPOS is not set
1435# CONFIG_SENSORS_FSCHMD is not set
1436# CONFIG_SENSORS_GL518SM is not set
1437# CONFIG_SENSORS_GL520SM is not set
1438# CONFIG_SENSORS_CORETEMP is not set
1439# CONFIG_SENSORS_IT87 is not set
1440# CONFIG_SENSORS_LM63 is not set
1441# CONFIG_SENSORS_LM75 is not set
1442# CONFIG_SENSORS_LM77 is not set
1443# CONFIG_SENSORS_LM78 is not set
1444# CONFIG_SENSORS_LM80 is not set
1445# CONFIG_SENSORS_LM83 is not set
1446# CONFIG_SENSORS_LM85 is not set
1447# CONFIG_SENSORS_LM87 is not set
1448# CONFIG_SENSORS_LM90 is not set
1449# CONFIG_SENSORS_LM92 is not set
1450# CONFIG_SENSORS_LM93 is not set
1451# CONFIG_SENSORS_LTC4245 is not set
1452# CONFIG_SENSORS_MAX1619 is not set
1453# CONFIG_SENSORS_MAX6650 is not set
1454# CONFIG_SENSORS_PC87360 is not set
1455# CONFIG_SENSORS_PC87427 is not set
1456# CONFIG_SENSORS_SIS5595 is not set
1457# CONFIG_SENSORS_DME1737 is not set
1458# CONFIG_SENSORS_SMSC47M1 is not set
1459# CONFIG_SENSORS_SMSC47M192 is not set
1460# CONFIG_SENSORS_SMSC47B397 is not set
1461# CONFIG_SENSORS_ADS7828 is not set
1462# CONFIG_SENSORS_THMC50 is not set
1463# CONFIG_SENSORS_VIA686A is not set
1464# CONFIG_SENSORS_VT1211 is not set
1465# CONFIG_SENSORS_VT8231 is not set
1466# CONFIG_SENSORS_W83781D is not set
1467# CONFIG_SENSORS_W83791D is not set
1468# CONFIG_SENSORS_W83792D is not set
1469# CONFIG_SENSORS_W83793 is not set
1470# CONFIG_SENSORS_W83L785TS is not set
1471# CONFIG_SENSORS_W83L786NG is not set
1472# CONFIG_SENSORS_W83627HF is not set
1473# CONFIG_SENSORS_W83627EHF is not set
1474# CONFIG_SENSORS_HDAPS is not set
1475# CONFIG_SENSORS_LIS3LV02D is not set
1476# CONFIG_SENSORS_APPLESMC is not set
1477# CONFIG_HWMON_DEBUG_CHIP is not set
1355CONFIG_THERMAL=y1478CONFIG_THERMAL=y
1479# CONFIG_THERMAL_HWMON is not set
1356CONFIG_WATCHDOG=y1480CONFIG_WATCHDOG=y
1357# CONFIG_WATCHDOG_NOWAYOUT is not set1481# CONFIG_WATCHDOG_NOWAYOUT is not set
1358 1482
@@ -1372,6 +1496,7 @@ CONFIG_WATCHDOG=y · 13 unmodified lines
1372# CONFIG_I6300ESB_WDT is not set1496# CONFIG_I6300ESB_WDT is not set
1373# CONFIG_ITCO_WDT is not set1497# CONFIG_ITCO_WDT is not set
1374# CONFIG_IT8712F_WDT is not set1498# CONFIG_IT8712F_WDT is not set
1499# CONFIG_IT87_WDT is not set
1375# CONFIG_HP_WATCHDOG is not set1500# CONFIG_HP_WATCHDOG is not set
1376# CONFIG_SC1200_WDT is not set1501# CONFIG_SC1200_WDT is not set
1377# CONFIG_PC87413_WDT is not set1502# CONFIG_PC87413_WDT is not set
@@ -1379,9 +1504,11 @@ CONFIG_WATCHDOG=y · 1 unmodified line
1379# CONFIG_SBC8360_WDT is not set1504# CONFIG_SBC8360_WDT is not set
1380# CONFIG_SBC7240_WDT is not set1505# CONFIG_SBC7240_WDT is not set
1381# CONFIG_CPU5_WDT is not set1506# CONFIG_CPU5_WDT is not set
1507# CONFIG_SMSC_SCH311X_WDT is not set
1382# CONFIG_SMSC37B787_WDT is not set1508# CONFIG_SMSC37B787_WDT is not set
1383# CONFIG_W83627HF_WDT is not set1509# CONFIG_W83627HF_WDT is not set
1384# CONFIG_W83697HF_WDT is not set1510# CONFIG_W83697HF_WDT is not set
1511# CONFIG_W83697UG_WDT is not set
1385# CONFIG_W83877F_WDT is not set1512# CONFIG_W83877F_WDT is not set
1386# CONFIG_W83977F_WDT is not set1513# CONFIG_W83977F_WDT is not set
1387# CONFIG_MACHZ_WDT is not set1514# CONFIG_MACHZ_WDT is not set
@@ -1397,11 +1524,11 @@ CONFIG_WATCHDOG=y · 9 unmodified lines
1397# USB-based Watchdog Cards1524# USB-based Watchdog Cards
1398#1525#
1399# CONFIG_USBPCWATCHDOG is not set1526# CONFIG_USBPCWATCHDOG is not set
1527CONFIG_SSB_POSSIBLE=y
1400 1528
1401#1529#
1402# Sonics Silicon Backplane1530# Sonics Silicon Backplane
1403#1531#
1404CONFIG_SSB_POSSIBLE=y
1405# CONFIG_SSB is not set1532# CONFIG_SSB is not set
1406 1533
1407#1534#
@@ -1410,7 +1537,13 @@ CONFIG_SSB_POSSIBLE=y · 2 unmodified lines
1410# CONFIG_MFD_CORE is not set1537# CONFIG_MFD_CORE is not set
1411# CONFIG_MFD_SM501 is not set1538# CONFIG_MFD_SM501 is not set
1412# CONFIG_HTC_PASIC3 is not set1539# CONFIG_HTC_PASIC3 is not set
1540# CONFIG_TWL4030_CORE is not set
1413# CONFIG_MFD_TMIO is not set1541# CONFIG_MFD_TMIO is not set
1542# CONFIG_PMIC_DA903X is not set
1543# CONFIG_MFD_WM8400 is not set
1544# CONFIG_MFD_WM8350_I2C is not set
1545# CONFIG_MFD_PCF50633 is not set
1546# CONFIG_REGULATOR is not set
1414 1547
1415#1548#
1416# Multimedia devices1549# Multimedia devices
@@ -1450,6 +1583,7 @@ CONFIG_DRM=y · 33 unmodified lines
1450# CONFIG_DRM_I810 is not set1583# CONFIG_DRM_I810 is not set
1451# CONFIG_DRM_I830 is not set1584# CONFIG_DRM_I830 is not set
1452CONFIG_DRM_I915=y1585CONFIG_DRM_I915=y
1586# CONFIG_DRM_I915_KMS is not set
1453# CONFIG_DRM_MGA is not set1587# CONFIG_DRM_MGA is not set
1454# CONFIG_DRM_SIS is not set1588# CONFIG_DRM_SIS is not set
1455# CONFIG_DRM_VIA is not set1589# CONFIG_DRM_VIA is not set
@@ -1459,6 +1593,7 @@ CONFIG_DRM_I915=y · 3 unmodified lines
1459CONFIG_FB=y1593CONFIG_FB=y
1460# CONFIG_FIRMWARE_EDID is not set1594# CONFIG_FIRMWARE_EDID is not set
1461# CONFIG_FB_DDC is not set1595# CONFIG_FB_DDC is not set
1596# CONFIG_FB_BOOT_VESA_SUPPORT is not set
1462CONFIG_FB_CFB_FILLRECT=y1597CONFIG_FB_CFB_FILLRECT=y
1463CONFIG_FB_CFB_COPYAREA=y1598CONFIG_FB_CFB_COPYAREA=y
1464CONFIG_FB_CFB_IMAGEBLIT=y1599CONFIG_FB_CFB_IMAGEBLIT=y
@@ -1487,7 +1622,6 @@ CONFIG_FB_TILEBLITTING=y · 22 unmodified lines
1487# CONFIG_FB_UVESA is not set1622# CONFIG_FB_UVESA is not set
1488# CONFIG_FB_VESA is not set1623# CONFIG_FB_VESA is not set
1489CONFIG_FB_EFI=y1624CONFIG_FB_EFI=y
1490# CONFIG_FB_IMAC is not set
1491# CONFIG_FB_N411 is not set1625# CONFIG_FB_N411 is not set
1492# CONFIG_FB_HGA is not set1626# CONFIG_FB_HGA is not set
1493# CONFIG_FB_S1D13XXX is not set1627# CONFIG_FB_S1D13XXX is not set
@@ -1503,6 +1637,7 @@ CONFIG_FB_EFI=y · 9 unmodified lines
1503# CONFIG_FB_S3 is not set1637# CONFIG_FB_S3 is not set
1504# CONFIG_FB_SAVAGE is not set1638# CONFIG_FB_SAVAGE is not set
1505# CONFIG_FB_SIS is not set1639# CONFIG_FB_SIS is not set
1640# CONFIG_FB_VIA is not set
1506# CONFIG_FB_NEOMAGIC is not set1641# CONFIG_FB_NEOMAGIC is not set
1507# CONFIG_FB_KYRO is not set1642# CONFIG_FB_KYRO is not set
1508# CONFIG_FB_3DFX is not set1643# CONFIG_FB_3DFX is not set
@@ -1515,12 +1650,15 @@ CONFIG_FB_EFI=y · 6 unmodified lines
1515# CONFIG_FB_CARMINE is not set1650# CONFIG_FB_CARMINE is not set
1516# CONFIG_FB_GEODE is not set1651# CONFIG_FB_GEODE is not set
1517# CONFIG_FB_VIRTUAL is not set1652# CONFIG_FB_VIRTUAL is not set
1653# CONFIG_FB_METRONOME is not set
1654# CONFIG_FB_MB862XX is not set
1518CONFIG_BACKLIGHT_LCD_SUPPORT=y1655CONFIG_BACKLIGHT_LCD_SUPPORT=y
1519# CONFIG_LCD_CLASS_DEVICE is not set1656# CONFIG_LCD_CLASS_DEVICE is not set
1520CONFIG_BACKLIGHT_CLASS_DEVICE=y1657CONFIG_BACKLIGHT_CLASS_DEVICE=y
1521# CONFIG_BACKLIGHT_CORGI is not set1658CONFIG_BACKLIGHT_GENERIC=y
1522# CONFIG_BACKLIGHT_PROGEAR is not set1659# CONFIG_BACKLIGHT_PROGEAR is not set
1523# CONFIG_BACKLIGHT_MBP_NVIDIA is not set1660# CONFIG_BACKLIGHT_MBP_NVIDIA is not set
1661# CONFIG_BACKLIGHT_SAHARA is not set
1524 1662
1525#1663#
1526# Display device support1664# Display device support
@@ -1540,10 +1678,12 @@ CONFIG_LOGO=y · 13 unmodified lines
1540# CONFIG_LOGO_LINUX_VGA16 is not set1678# CONFIG_LOGO_LINUX_VGA16 is not set
1541CONFIG_LOGO_LINUX_CLUT224=y1679CONFIG_LOGO_LINUX_CLUT224=y
1542CONFIG_SOUND=y1680CONFIG_SOUND=y
1681CONFIG_SOUND_OSS_CORE=y
1543CONFIG_SND=y1682CONFIG_SND=y
1544CONFIG_SND_TIMER=y1683CONFIG_SND_TIMER=y
1545CONFIG_SND_PCM=y1684CONFIG_SND_PCM=y
1546CONFIG_SND_HWDEP=y1685CONFIG_SND_HWDEP=y
1686CONFIG_SND_JACK=y
1547CONFIG_SND_SEQUENCER=y1687CONFIG_SND_SEQUENCER=y
1548CONFIG_SND_SEQ_DUMMY=y1688CONFIG_SND_SEQ_DUMMY=y
1549CONFIG_SND_OSSEMUL=y1689CONFIG_SND_OSSEMUL=y
@@ -1551,6 +1691,8 @@ CONFIG_SND_MIXER_OSS=y · 1 unmodified line
1551CONFIG_SND_PCM_OSS=y1691CONFIG_SND_PCM_OSS=y
1552CONFIG_SND_PCM_OSS_PLUGINS=y1692CONFIG_SND_PCM_OSS_PLUGINS=y
1553CONFIG_SND_SEQUENCER_OSS=y1693CONFIG_SND_SEQUENCER_OSS=y
1694CONFIG_SND_HRTIMER=y
1695CONFIG_SND_SEQ_HRTIMER_DEFAULT=y
1554CONFIG_SND_DYNAMIC_MINORS=y1696CONFIG_SND_DYNAMIC_MINORS=y
1555CONFIG_SND_SUPPORT_OLD_API=y1697CONFIG_SND_SUPPORT_OLD_API=y
1556CONFIG_SND_VERBOSE_PROCFS=y1698CONFIG_SND_VERBOSE_PROCFS=y
@@ -1605,11 +1747,16 @@ CONFIG_SND_PCI=y · 48 unmodified lines
1605# CONFIG_SND_FM801 is not set1747# CONFIG_SND_FM801 is not set
1606CONFIG_SND_HDA_INTEL=y1748CONFIG_SND_HDA_INTEL=y
1607CONFIG_SND_HDA_HWDEP=y1749CONFIG_SND_HDA_HWDEP=y
1750# CONFIG_SND_HDA_RECONFIG is not set
1751# CONFIG_SND_HDA_INPUT_BEEP is not set
1608CONFIG_SND_HDA_CODEC_REALTEK=y1752CONFIG_SND_HDA_CODEC_REALTEK=y
1609CONFIG_SND_HDA_CODEC_ANALOG=y1753CONFIG_SND_HDA_CODEC_ANALOG=y
1610CONFIG_SND_HDA_CODEC_SIGMATEL=y1754CONFIG_SND_HDA_CODEC_SIGMATEL=y
1611CONFIG_SND_HDA_CODEC_VIA=y1755CONFIG_SND_HDA_CODEC_VIA=y
1612CONFIG_SND_HDA_CODEC_ATIHDMI=y1756CONFIG_SND_HDA_CODEC_ATIHDMI=y
1757CONFIG_SND_HDA_CODEC_NVHDMI=y
1758CONFIG_SND_HDA_CODEC_INTELHDMI=y
1759CONFIG_SND_HDA_ELD=y
1613CONFIG_SND_HDA_CODEC_CONEXANT=y1760CONFIG_SND_HDA_CODEC_CONEXANT=y
1614CONFIG_SND_HDA_CODEC_CMEDIA=y1761CONFIG_SND_HDA_CODEC_CMEDIA=y
1615CONFIG_SND_HDA_CODEC_SI3054=y1762CONFIG_SND_HDA_CODEC_SI3054=y
@@ -1643,6 +1790,7 @@ CONFIG_SND_USB=y · 27 unmodified lines
1643# CONFIG_SND_USB_AUDIO is not set1790# CONFIG_SND_USB_AUDIO is not set
1644# CONFIG_SND_USB_USX2Y is not set1791# CONFIG_SND_USB_USX2Y is not set
1645# CONFIG_SND_USB_CAIAQ is not set1792# CONFIG_SND_USB_CAIAQ is not set
1793# CONFIG_SND_USB_US122L is not set
1646CONFIG_SND_PCMCIA=y1794CONFIG_SND_PCMCIA=y
1647# CONFIG_SND_VXPOCKET is not set1795# CONFIG_SND_VXPOCKET is not set
1648# CONFIG_SND_PDAUDIOCF is not set1796# CONFIG_SND_PDAUDIOCF is not set
@@ -1657,15 +1805,37 @@ CONFIG_HIDRAW=y · 8 unmodified lines
1657# USB Input Devices1805# USB Input Devices
1658#1806#
1659CONFIG_USB_HID=y1807CONFIG_USB_HID=y
1660CONFIG_USB_HIDINPUT_POWERBOOK=y
1661CONFIG_HID_FF=y
1662CONFIG_HID_PID=y1808CONFIG_HID_PID=y
1809CONFIG_USB_HIDDEV=y
1810
1811#
1812# Special HID drivers
1813#
1814CONFIG_HID_COMPAT=y
1815CONFIG_HID_A4TECH=y
1816CONFIG_HID_APPLE=y
1817CONFIG_HID_BELKIN=y
1818CONFIG_HID_CHERRY=y
1819CONFIG_HID_CHICONY=y
1820CONFIG_HID_CYPRESS=y
1821CONFIG_HID_EZKEY=y
1822CONFIG_HID_GYRATION=y
1823CONFIG_HID_LOGITECH=y
1663CONFIG_LOGITECH_FF=y1824CONFIG_LOGITECH_FF=y
1664# CONFIG_LOGIRUMBLEPAD2_FF is not set1825# CONFIG_LOGIRUMBLEPAD2_FF is not set
1826CONFIG_HID_MICROSOFT=y
1827CONFIG_HID_MONTEREY=y
1828CONFIG_HID_NTRIG=y
1829CONFIG_HID_PANTHERLORD=y
1665CONFIG_PANTHERLORD_FF=y1830CONFIG_PANTHERLORD_FF=y
1831CONFIG_HID_PETALYNX=y
1832CONFIG_HID_SAMSUNG=y
1833CONFIG_HID_SONY=y
1834CONFIG_HID_SUNPLUS=y
1835# CONFIG_GREENASIA_FF is not set
1836CONFIG_HID_TOPSEED=y
1666CONFIG_THRUSTMASTER_FF=y1837CONFIG_THRUSTMASTER_FF=y
1667CONFIG_ZEROPLUS_FF=y1838CONFIG_ZEROPLUS_FF=y
1668CONFIG_USB_HIDDEV=y
1669CONFIG_USB_SUPPORT=y1839CONFIG_USB_SUPPORT=y
1670CONFIG_USB_ARCH_HAS_HCD=y1840CONFIG_USB_ARCH_HAS_HCD=y
1671CONFIG_USB_ARCH_HAS_OHCI=y1841CONFIG_USB_ARCH_HAS_OHCI=y
@@ -1683,6 +1853,8 @@ CONFIG_USB_DEVICEFS=y · 11 unmodified lines
1683CONFIG_USB_SUSPEND=y1853CONFIG_USB_SUSPEND=y
1684# CONFIG_USB_OTG is not set1854# CONFIG_USB_OTG is not set
1685CONFIG_USB_MON=y1855CONFIG_USB_MON=y
1856# CONFIG_USB_WUSB is not set
1857# CONFIG_USB_WUSB_CBAF is not set
1686 1858
1687#1859#
1688# USB Host Controller Drivers1860# USB Host Controller Drivers
@@ -1691,6 +1863,7 @@ CONFIG_USB_MON=y · 2 unmodified lines
1691CONFIG_USB_EHCI_HCD=y1863CONFIG_USB_EHCI_HCD=y
1692# CONFIG_USB_EHCI_ROOT_HUB_TT is not set1864# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
1693# CONFIG_USB_EHCI_TT_NEWSCHED is not set1865# CONFIG_USB_EHCI_TT_NEWSCHED is not set
1866# CONFIG_USB_OXU210HP_HCD is not set
1694# CONFIG_USB_ISP116X_HCD is not set1867# CONFIG_USB_ISP116X_HCD is not set
1695# CONFIG_USB_ISP1760_HCD is not set1868# CONFIG_USB_ISP1760_HCD is not set
1696CONFIG_USB_OHCI_HCD=y1869CONFIG_USB_OHCI_HCD=y
@@ -1700,6 +1873,8 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y · 3 unmodified lines
1700CONFIG_USB_UHCI_HCD=y1873CONFIG_USB_UHCI_HCD=y
1701# CONFIG_USB_SL811_HCD is not set1874# CONFIG_USB_SL811_HCD is not set
1702# CONFIG_USB_R8A66597_HCD is not set1875# CONFIG_USB_R8A66597_HCD is not set
1876# CONFIG_USB_WHCI_HCD is not set
1877# CONFIG_USB_HWA_HCD is not set
1703 1878
1704#1879#
1705# USB Device Class drivers1880# USB Device Class drivers
@@ -1707,20 +1882,20 @@ CONFIG_USB_UHCI_HCD=y · 1 unmodified line
1707# CONFIG_USB_ACM is not set1882# CONFIG_USB_ACM is not set
1708CONFIG_USB_PRINTER=y1883CONFIG_USB_PRINTER=y
1709# CONFIG_USB_WDM is not set1884# CONFIG_USB_WDM is not set
1885# CONFIG_USB_TMC is not set
1710 1886
1711#1887#
1712# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'1888# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
1713#1889#
1714 1890
1715#1891#
1716# may also be needed; see USB_STORAGE Help for more information1892# see USB_STORAGE Help for more information
1717#1893#
1718CONFIG_USB_STORAGE=y1894CONFIG_USB_STORAGE=y
1719# CONFIG_USB_STORAGE_DEBUG is not set1895# CONFIG_USB_STORAGE_DEBUG is not set
1720# CONFIG_USB_STORAGE_DATAFAB is not set1896# CONFIG_USB_STORAGE_DATAFAB is not set
1721# CONFIG_USB_STORAGE_FREECOM is not set1897# CONFIG_USB_STORAGE_FREECOM is not set
1722# CONFIG_USB_STORAGE_ISD200 is not set1898# CONFIG_USB_STORAGE_ISD200 is not set
1723# CONFIG_USB_STORAGE_DPCM is not set
1724# CONFIG_USB_STORAGE_USBAT is not set1899# CONFIG_USB_STORAGE_USBAT is not set
1725# CONFIG_USB_STORAGE_SDDR09 is not set1900# CONFIG_USB_STORAGE_SDDR09 is not set
1726# CONFIG_USB_STORAGE_SDDR55 is not set1901# CONFIG_USB_STORAGE_SDDR55 is not set
@@ -1728,7 +1903,6 @@ CONFIG_USB_STORAGE=y · 1 unmodified line
1728# CONFIG_USB_STORAGE_ALAUDA is not set1903# CONFIG_USB_STORAGE_ALAUDA is not set
1729# CONFIG_USB_STORAGE_ONETOUCH is not set1904# CONFIG_USB_STORAGE_ONETOUCH is not set
1730# CONFIG_USB_STORAGE_KARMA is not set1905# CONFIG_USB_STORAGE_KARMA is not set
1731# CONFIG_USB_STORAGE_SIERRA is not set
1732# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set1906# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
1733CONFIG_USB_LIBUSUAL=y1907CONFIG_USB_LIBUSUAL=y
1734 1908
@@ -1749,6 +1923,7 @@ CONFIG_USB_LIBUSUAL=y · 14 unmodified lines
1749# CONFIG_USB_EMI62 is not set1923# CONFIG_USB_EMI62 is not set
1750# CONFIG_USB_EMI26 is not set1924# CONFIG_USB_EMI26 is not set
1751# CONFIG_USB_ADUTUX is not set1925# CONFIG_USB_ADUTUX is not set
1926# CONFIG_USB_SEVSEG is not set
1752# CONFIG_USB_RIO500 is not set1927# CONFIG_USB_RIO500 is not set
1753# CONFIG_USB_LEGOTOWER is not set1928# CONFIG_USB_LEGOTOWER is not set
1754# CONFIG_USB_LCD is not set1929# CONFIG_USB_LCD is not set
@@ -1766,7 +1941,13 @@ CONFIG_USB_LIBUSUAL=y · 11 unmodified lines
1766# CONFIG_USB_IOWARRIOR is not set1941# CONFIG_USB_IOWARRIOR is not set
1767# CONFIG_USB_TEST is not set1942# CONFIG_USB_TEST is not set
1768# CONFIG_USB_ISIGHTFW is not set1943# CONFIG_USB_ISIGHTFW is not set
1944# CONFIG_USB_VST is not set
1769# CONFIG_USB_GADGET is not set1945# CONFIG_USB_GADGET is not set
1946
1947#
1948# OTG and related infrastructure
1949#
1950# CONFIG_UWB is not set
1770# CONFIG_MMC is not set1951# CONFIG_MMC is not set
1771# CONFIG_MEMSTICK is not set1952# CONFIG_MEMSTICK is not set
1772CONFIG_NEW_LEDS=y1953CONFIG_NEW_LEDS=y
@@ -1775,6 +1956,7 @@ CONFIG_LEDS_CLASS=y · 2 unmodified lines
1775#1956#
1776# LED drivers1957# LED drivers
1777#1958#
1959# CONFIG_LEDS_ALIX2 is not set
1778# CONFIG_LEDS_PCA9532 is not set1960# CONFIG_LEDS_PCA9532 is not set
1779# CONFIG_LEDS_CLEVO_MAIL is not set1961# CONFIG_LEDS_CLEVO_MAIL is not set
1780# CONFIG_LEDS_PCA955X is not set1962# CONFIG_LEDS_PCA955X is not set
@@ -1785,6 +1967,7 @@ CONFIG_LEDS_CLASS=y · 4 unmodified lines
1785CONFIG_LEDS_TRIGGERS=y1967CONFIG_LEDS_TRIGGERS=y
1786# CONFIG_LEDS_TRIGGER_TIMER is not set1968# CONFIG_LEDS_TRIGGER_TIMER is not set
1787# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set1969# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
1970# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
1788# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set1971# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
1789# CONFIG_ACCESSIBILITY is not set1972# CONFIG_ACCESSIBILITY is not set
1790# CONFIG_INFINIBAND is not set1973# CONFIG_INFINIBAND is not set
@@ -1824,6 +2007,7 @@ CONFIG_RTC_INTF_DEV=y · 33 unmodified lines
1824# CONFIG_RTC_DRV_M41T80 is not set2007# CONFIG_RTC_DRV_M41T80 is not set
1825# CONFIG_RTC_DRV_S35390A is not set2008# CONFIG_RTC_DRV_S35390A is not set
1826# CONFIG_RTC_DRV_FM3130 is not set2009# CONFIG_RTC_DRV_FM3130 is not set
2010# CONFIG_RTC_DRV_RX8581 is not set
1827 2011
1828#2012#
1829# SPI RTC drivers2013# SPI RTC drivers
@@ -1833,12 +2017,15 @@ CONFIG_RTC_INTF_DEV=y · 3 unmodified lines
1833# Platform RTC drivers2017# Platform RTC drivers
1834#2018#
1835CONFIG_RTC_DRV_CMOS=y2019CONFIG_RTC_DRV_CMOS=y
2020# CONFIG_RTC_DRV_DS1286 is not set
1836# CONFIG_RTC_DRV_DS1511 is not set2021# CONFIG_RTC_DRV_DS1511 is not set
1837# CONFIG_RTC_DRV_DS1553 is not set2022# CONFIG_RTC_DRV_DS1553 is not set
1838# CONFIG_RTC_DRV_DS1742 is not set2023# CONFIG_RTC_DRV_DS1742 is not set
1839# CONFIG_RTC_DRV_STK17TA8 is not set2024# CONFIG_RTC_DRV_STK17TA8 is not set
1840# CONFIG_RTC_DRV_M48T86 is not set2025# CONFIG_RTC_DRV_M48T86 is not set
2026# CONFIG_RTC_DRV_M48T35 is not set
1841# CONFIG_RTC_DRV_M48T59 is not set2027# CONFIG_RTC_DRV_M48T59 is not set
2028# CONFIG_RTC_DRV_BQ4802 is not set
1842# CONFIG_RTC_DRV_V3020 is not set2029# CONFIG_RTC_DRV_V3020 is not set
1843 2030
1844#2031#
@@ -1851,6 +2038,22 @@ CONFIG_DMADEVICES=y · 6 unmodified lines
1851#2038#
1852# CONFIG_INTEL_IOATDMA is not set2039# CONFIG_INTEL_IOATDMA is not set
1853# CONFIG_UIO is not set2040# CONFIG_UIO is not set
2041# CONFIG_STAGING is not set
2042CONFIG_X86_PLATFORM_DEVICES=y
2043# CONFIG_ACER_WMI is not set
2044# CONFIG_ASUS_LAPTOP is not set
2045# CONFIG_FUJITSU_LAPTOP is not set
2046# CONFIG_TC1100_WMI is not set
2047# CONFIG_MSI_LAPTOP is not set
2048# CONFIG_PANASONIC_LAPTOP is not set
2049# CONFIG_COMPAL_LAPTOP is not set
2050# CONFIG_SONY_LAPTOP is not set
2051# CONFIG_THINKPAD_ACPI is not set
2052# CONFIG_INTEL_MENLOW is not set
2053CONFIG_EEEPC_LAPTOP=y
2054# CONFIG_ACPI_WMI is not set
2055# CONFIG_ACPI_ASUS is not set
2056# CONFIG_ACPI_TOSHIBA is not set
1854 2057
1855#2058#
1856# Firmware Drivers2059# Firmware Drivers
@@ -1861,8 +2064,7 @@ CONFIG_EFI_VARS=y · 4 unmodified lines
1861# CONFIG_DELL_RBU is not set2064# CONFIG_DELL_RBU is not set
1862# CONFIG_DCDBAS is not set2065# CONFIG_DCDBAS is not set
1863CONFIG_DMIID=y2066CONFIG_DMIID=y
1864CONFIG_ISCSI_IBFT_FIND=y2067# CONFIG_ISCSI_IBFT_FIND is not set
1865CONFIG_ISCSI_IBFT=y
1866 2068
1867#2069#
1868# File systems2070# File systems
@@ -1872,21 +2074,24 @@ CONFIG_EXT3_FS=y · 3 unmodified lines
1872CONFIG_EXT3_FS_XATTR=y2074CONFIG_EXT3_FS_XATTR=y
1873CONFIG_EXT3_FS_POSIX_ACL=y2075CONFIG_EXT3_FS_POSIX_ACL=y
1874CONFIG_EXT3_FS_SECURITY=y2076CONFIG_EXT3_FS_SECURITY=y
1875# CONFIG_EXT4DEV_FS is not set2077# CONFIG_EXT4_FS is not set
1876CONFIG_JBD=y2078CONFIG_JBD=y
1877# CONFIG_JBD_DEBUG is not set2079# CONFIG_JBD_DEBUG is not set
1878CONFIG_FS_MBCACHE=y2080CONFIG_FS_MBCACHE=y
1879# CONFIG_REISERFS_FS is not set2081# CONFIG_REISERFS_FS is not set
1880# CONFIG_JFS_FS is not set2082# CONFIG_JFS_FS is not set
1881CONFIG_FS_POSIX_ACL=y2083CONFIG_FS_POSIX_ACL=y
2084CONFIG_FILE_LOCKING=y
1882# CONFIG_XFS_FS is not set2085# CONFIG_XFS_FS is not set
1883# CONFIG_OCFS2_FS is not set2086# CONFIG_OCFS2_FS is not set
2087# CONFIG_BTRFS_FS is not set
1884CONFIG_DNOTIFY=y2088CONFIG_DNOTIFY=y
1885CONFIG_INOTIFY=y2089CONFIG_INOTIFY=y
1886CONFIG_INOTIFY_USER=y2090CONFIG_INOTIFY_USER=y
1887CONFIG_QUOTA=y2091CONFIG_QUOTA=y
1888CONFIG_QUOTA_NETLINK_INTERFACE=y2092CONFIG_QUOTA_NETLINK_INTERFACE=y
1889# CONFIG_PRINT_QUOTA_WARNING is not set2093# CONFIG_PRINT_QUOTA_WARNING is not set
2094CONFIG_QUOTA_TREE=y
1890# CONFIG_QFMT_V1 is not set2095# CONFIG_QFMT_V1 is not set
1891CONFIG_QFMT_V2=y2096CONFIG_QFMT_V2=y
1892CONFIG_QUOTACTL=y2097CONFIG_QUOTACTL=y
@@ -1920,16 +2125,14 @@ CONFIG_PROC_FS=y · 27 unmodified lines
1920CONFIG_PROC_KCORE=y2125CONFIG_PROC_KCORE=y
1921CONFIG_PROC_VMCORE=y2126CONFIG_PROC_VMCORE=y
1922CONFIG_PROC_SYSCTL=y2127CONFIG_PROC_SYSCTL=y
2128CONFIG_PROC_PAGE_MONITOR=y
1923CONFIG_SYSFS=y2129CONFIG_SYSFS=y
1924CONFIG_TMPFS=y2130CONFIG_TMPFS=y
1925CONFIG_TMPFS_POSIX_ACL=y2131CONFIG_TMPFS_POSIX_ACL=y
1926CONFIG_HUGETLBFS=y2132CONFIG_HUGETLBFS=y
1927CONFIG_HUGETLB_PAGE=y2133CONFIG_HUGETLB_PAGE=y
1928# CONFIG_CONFIGFS_FS is not set2134# CONFIG_CONFIGFS_FS is not set
1929 2135CONFIG_MISC_FILESYSTEMS=y
1930#
1931# Miscellaneous filesystems
1932#
1933# CONFIG_ADFS_FS is not set2136# CONFIG_ADFS_FS is not set
1934# CONFIG_AFFS_FS is not set2137# CONFIG_AFFS_FS is not set
1935# CONFIG_ECRYPT_FS is not set2138# CONFIG_ECRYPT_FS is not set
@@ -1939,6 +2142,7 @@ CONFIG_HUGETLB_PAGE=y · 3 unmodified lines
1939# CONFIG_BFS_FS is not set2142# CONFIG_BFS_FS is not set
1940# CONFIG_EFS_FS is not set2143# CONFIG_EFS_FS is not set
1941# CONFIG_CRAMFS is not set2144# CONFIG_CRAMFS is not set
2145# CONFIG_SQUASHFS is not set
1942# CONFIG_VXFS_FS is not set2146# CONFIG_VXFS_FS is not set
1943# CONFIG_MINIX_FS is not set2147# CONFIG_MINIX_FS is not set
1944# CONFIG_OMFS_FS is not set2148# CONFIG_OMFS_FS is not set
@@ -1960,6 +2164,7 @@ CONFIG_NFS_ACL_SUPPORT=y · 15 unmodified lines
1960CONFIG_NFS_COMMON=y2164CONFIG_NFS_COMMON=y
1961CONFIG_SUNRPC=y2165CONFIG_SUNRPC=y
1962CONFIG_SUNRPC_GSS=y2166CONFIG_SUNRPC_GSS=y
2167# CONFIG_SUNRPC_REGISTER_V4 is not set
1963CONFIG_RPCSEC_GSS_KRB5=y2168CONFIG_RPCSEC_GSS_KRB5=y
1964# CONFIG_RPCSEC_GSS_SPKM3 is not set2169# CONFIG_RPCSEC_GSS_SPKM3 is not set
1965# CONFIG_SMB_FS is not set2170# CONFIG_SMB_FS is not set
@@ -2036,7 +2241,7 @@ CONFIG_NLS_UTF8=y · 70 unmodified lines
2036#2241#
2037CONFIG_TRACE_IRQFLAGS_SUPPORT=y2242CONFIG_TRACE_IRQFLAGS_SUPPORT=y
2038CONFIG_PRINTK_TIME=y2243CONFIG_PRINTK_TIME=y
2039CONFIG_ENABLE_WARN_DEPRECATED=y2244# CONFIG_ENABLE_WARN_DEPRECATED is not set
2040CONFIG_ENABLE_MUST_CHECK=y2245CONFIG_ENABLE_MUST_CHECK=y
2041CONFIG_FRAME_WARN=20482246CONFIG_FRAME_WARN=2048
2042CONFIG_MAGIC_SYSRQ=y2247CONFIG_MAGIC_SYSRQ=y
@@ -2066,33 +2271,54 @@ CONFIG_TIMER_STATS=y · 23 unmodified lines
2066CONFIG_DEBUG_BUGVERBOSE=y2271CONFIG_DEBUG_BUGVERBOSE=y
2067# CONFIG_DEBUG_INFO is not set2272# CONFIG_DEBUG_INFO is not set
2068# CONFIG_DEBUG_VM is not set2273# CONFIG_DEBUG_VM is not set
2274# CONFIG_DEBUG_VIRTUAL is not set
2069# CONFIG_DEBUG_WRITECOUNT is not set2275# CONFIG_DEBUG_WRITECOUNT is not set
2070CONFIG_DEBUG_MEMORY_INIT=y2276CONFIG_DEBUG_MEMORY_INIT=y
2071# CONFIG_DEBUG_LIST is not set2277# CONFIG_DEBUG_LIST is not set
2072# CONFIG_DEBUG_SG is not set2278# CONFIG_DEBUG_SG is not set
2279# CONFIG_DEBUG_NOTIFIERS is not set
2280CONFIG_ARCH_WANT_FRAME_POINTERS=y
2073CONFIG_FRAME_POINTER=y2281CONFIG_FRAME_POINTER=y
2074# CONFIG_BOOT_PRINTK_DELAY is not set2282# CONFIG_BOOT_PRINTK_DELAY is not set
2075# CONFIG_RCU_TORTURE_TEST is not set2283# CONFIG_RCU_TORTURE_TEST is not set
2284# CONFIG_RCU_CPU_STALL_DETECTOR is not set
2076# CONFIG_KPROBES_SANITY_TEST is not set2285# CONFIG_KPROBES_SANITY_TEST is not set
2077# CONFIG_BACKTRACE_SELF_TEST is not set2286# CONFIG_BACKTRACE_SELF_TEST is not set
2287# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
2078# CONFIG_LKDTM is not set2288# CONFIG_LKDTM is not set
2079# CONFIG_FAULT_INJECTION is not set2289# CONFIG_FAULT_INJECTION is not set
2080# CONFIG_LATENCYTOP is not set2290# CONFIG_LATENCYTOP is not set
2081CONFIG_SYSCTL_SYSCALL_CHECK=y2291CONFIG_SYSCTL_SYSCALL_CHECK=y
2082CONFIG_HAVE_FTRACE=y2292CONFIG_USER_STACKTRACE_SUPPORT=y
2293CONFIG_HAVE_FUNCTION_TRACER=y
2294CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
2295CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
2083CONFIG_HAVE_DYNAMIC_FTRACE=y2296CONFIG_HAVE_DYNAMIC_FTRACE=y
2084# CONFIG_FTRACE is not set2297CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
2298CONFIG_HAVE_HW_BRANCH_TRACER=y
2299
2300#
2301# Tracers
2302#
2303# CONFIG_FUNCTION_TRACER is not set
2085# CONFIG_IRQSOFF_TRACER is not set2304# CONFIG_IRQSOFF_TRACER is not set
2086# CONFIG_SYSPROF_TRACER is not set2305# CONFIG_SYSPROF_TRACER is not set
2087# CONFIG_SCHED_TRACER is not set2306# CONFIG_SCHED_TRACER is not set
2088# CONFIG_CONTEXT_SWITCH_TRACER is not set2307# CONFIG_CONTEXT_SWITCH_TRACER is not set
2308# CONFIG_BOOT_TRACER is not set
2309# CONFIG_TRACE_BRANCH_PROFILING is not set
2310# CONFIG_POWER_TRACER is not set
2311# CONFIG_STACK_TRACER is not set
2312# CONFIG_HW_BRANCH_TRACER is not set
2089CONFIG_PROVIDE_OHCI1394_DMA_INIT=y2313CONFIG_PROVIDE_OHCI1394_DMA_INIT=y
2314# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
2090# CONFIG_SAMPLES is not set2315# CONFIG_SAMPLES is not set
2091CONFIG_HAVE_ARCH_KGDB=y2316CONFIG_HAVE_ARCH_KGDB=y
2092# CONFIG_KGDB is not set2317# CONFIG_KGDB is not set
2093# CONFIG_STRICT_DEVMEM is not set2318# CONFIG_STRICT_DEVMEM is not set
2094CONFIG_X86_VERBOSE_BOOTUP=y2319CONFIG_X86_VERBOSE_BOOTUP=y
2095CONFIG_EARLY_PRINTK=y2320CONFIG_EARLY_PRINTK=y
2321CONFIG_EARLY_PRINTK_DBGP=y
2096CONFIG_DEBUG_STACKOVERFLOW=y2322CONFIG_DEBUG_STACKOVERFLOW=y
2097CONFIG_DEBUG_STACK_USAGE=y2323CONFIG_DEBUG_STACK_USAGE=y
2098# CONFIG_DEBUG_PAGEALLOC is not set2324# CONFIG_DEBUG_PAGEALLOC is not set
@@ -2123,8 +2349,10 @@ CONFIG_OPTIMIZE_INLINING=y · 24 unmodified lines
2123CONFIG_KEYS=y2349CONFIG_KEYS=y
2124CONFIG_KEYS_DEBUG_PROC_KEYS=y2350CONFIG_KEYS_DEBUG_PROC_KEYS=y
2125CONFIG_SECURITY=y2351CONFIG_SECURITY=y
2352# CONFIG_SECURITYFS is not set
2126CONFIG_SECURITY_NETWORK=y2353CONFIG_SECURITY_NETWORK=y
2127# CONFIG_SECURITY_NETWORK_XFRM is not set2354# CONFIG_SECURITY_NETWORK_XFRM is not set
2355# CONFIG_SECURITY_PATH is not set
2128CONFIG_SECURITY_FILE_CAPABILITIES=y2356CONFIG_SECURITY_FILE_CAPABILITIES=y
2129# CONFIG_SECURITY_ROOTPLUG is not set2357# CONFIG_SECURITY_ROOTPLUG is not set
2130CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=655362358CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=65536
@@ -2135,7 +2363,6 @@ CONFIG_SECURITY_SELINUX_DISABLE=y · 4 unmodified lines
2135CONFIG_SECURITY_SELINUX_DEVELOP=y2363CONFIG_SECURITY_SELINUX_DEVELOP=y
2136CONFIG_SECURITY_SELINUX_AVC_STATS=y2364CONFIG_SECURITY_SELINUX_AVC_STATS=y
2137CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=12365CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1
2138# CONFIG_SECURITY_SELINUX_ENABLE_SECMARK_DEFAULT is not set
2139# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set2366# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set
2140# CONFIG_SECURITY_SMACK is not set2367# CONFIG_SECURITY_SMACK is not set
2141CONFIG_CRYPTO=y2368CONFIG_CRYPTO=y
@@ -2143,11 +2370,18 @@ CONFIG_CRYPTO=y · 1 unmodified line
2143#2370#
2144# Crypto core or helper2371# Crypto core or helper
2145#2372#
2373# CONFIG_CRYPTO_FIPS is not set
2146CONFIG_CRYPTO_ALGAPI=y2374CONFIG_CRYPTO_ALGAPI=y
2375CONFIG_CRYPTO_ALGAPI2=y
2147CONFIG_CRYPTO_AEAD=y2376CONFIG_CRYPTO_AEAD=y
2377CONFIG_CRYPTO_AEAD2=y
2148CONFIG_CRYPTO_BLKCIPHER=y2378CONFIG_CRYPTO_BLKCIPHER=y
2379CONFIG_CRYPTO_BLKCIPHER2=y
2149CONFIG_CRYPTO_HASH=y2380CONFIG_CRYPTO_HASH=y
2381CONFIG_CRYPTO_HASH2=y
2382CONFIG_CRYPTO_RNG2=y
2150CONFIG_CRYPTO_MANAGER=y2383CONFIG_CRYPTO_MANAGER=y
2384CONFIG_CRYPTO_MANAGER2=y
2151# CONFIG_CRYPTO_GF128MUL is not set2385# CONFIG_CRYPTO_GF128MUL is not set
2152# CONFIG_CRYPTO_NULL is not set2386# CONFIG_CRYPTO_NULL is not set
2153# CONFIG_CRYPTO_CRYPTD is not set2387# CONFIG_CRYPTO_CRYPTD is not set
@@ -2182,6 +2416,7 @@ CONFIG_CRYPTO_HMAC=y · 28 unmodified lines
2182# Digest2416# Digest
2183#2417#
2184# CONFIG_CRYPTO_CRC32C is not set2418# CONFIG_CRYPTO_CRC32C is not set
2419# CONFIG_CRYPTO_CRC32C_INTEL is not set
2185# CONFIG_CRYPTO_MD4 is not set2420# CONFIG_CRYPTO_MD4 is not set
2186CONFIG_CRYPTO_MD5=y2421CONFIG_CRYPTO_MD5=y
2187# CONFIG_CRYPTO_MICHAEL_MIC is not set2422# CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -2222,6 +2457,11 @@ CONFIG_CRYPTO_DES=y · 34 unmodified lines
2222#2457#
2223# CONFIG_CRYPTO_DEFLATE is not set2458# CONFIG_CRYPTO_DEFLATE is not set
2224# CONFIG_CRYPTO_LZO is not set2459# CONFIG_CRYPTO_LZO is not set
2460
2461#
2462# Random Number Generation
2463#
2464# CONFIG_CRYPTO_ANSI_CPRNG is not set
2225CONFIG_CRYPTO_HW=y2465CONFIG_CRYPTO_HW=y
2226# CONFIG_CRYPTO_DEV_PADLOCK is not set2466# CONFIG_CRYPTO_DEV_PADLOCK is not set
2227# CONFIG_CRYPTO_DEV_GEODE is not set2467# CONFIG_CRYPTO_DEV_GEODE is not set
@@ -2239,6 +2479,7 @@ CONFIG_VIRTUALIZATION=y · 11 unmodified lines
2239CONFIG_BITREVERSE=y2479CONFIG_BITREVERSE=y
2240CONFIG_GENERIC_FIND_FIRST_BIT=y2480CONFIG_GENERIC_FIND_FIRST_BIT=y
2241CONFIG_GENERIC_FIND_NEXT_BIT=y2481CONFIG_GENERIC_FIND_NEXT_BIT=y
2482CONFIG_GENERIC_FIND_LAST_BIT=y
2242# CONFIG_CRC_CCITT is not set2483# CONFIG_CRC_CCITT is not set
2243# CONFIG_CRC16 is not set2484# CONFIG_CRC16 is not set
2244CONFIG_CRC_T10DIF=y2485CONFIG_CRC_T10DIF=y
arch/x86/configs/x86_64_defconfig+338−87
@@ -1,14 +1,13 @@
1#1#
2# Automatically generated make config: don't edit2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.27-rc53# Linux kernel version: 2.6.29-rc4
4# Wed Sep 3 17:13:39 20084# Tue Feb 24 15:44:16 2009
5#5#
6CONFIG_64BIT=y6CONFIG_64BIT=y
7# CONFIG_X86_32 is not set7# CONFIG_X86_32 is not set
8CONFIG_X86_64=y8CONFIG_X86_64=y
9CONFIG_X86=y9CONFIG_X86=y
10CONFIG_ARCH_DEFCONFIG="arch/x86/configs/x86_64_defconfig"10CONFIG_ARCH_DEFCONFIG="arch/x86/configs/x86_64_defconfig"
11# CONFIG_GENERIC_LOCKBREAK is not set
12CONFIG_GENERIC_TIME=y11CONFIG_GENERIC_TIME=y
13CONFIG_GENERIC_CMOS_UPDATE=y12CONFIG_GENERIC_CMOS_UPDATE=y
14CONFIG_CLOCKSOURCE_WATCHDOG=y13CONFIG_CLOCKSOURCE_WATCHDOG=y
@@ -23,17 +22,16 @@ CONFIG_ZONE_DMA=y · 8 unmodified lines
23CONFIG_GENERIC_ISA_DMA=y22CONFIG_GENERIC_ISA_DMA=y
24CONFIG_GENERIC_IOMAP=y23CONFIG_GENERIC_IOMAP=y
25CONFIG_GENERIC_BUG=y24CONFIG_GENERIC_BUG=y
25CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
26CONFIG_GENERIC_HWEIGHT=y26CONFIG_GENERIC_HWEIGHT=y
27# CONFIG_GENERIC_GPIO is not set
28CONFIG_ARCH_MAY_HAVE_PC_FDC=y27CONFIG_ARCH_MAY_HAVE_PC_FDC=y
29CONFIG_RWSEM_GENERIC_SPINLOCK=y28CONFIG_RWSEM_GENERIC_SPINLOCK=y
30# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set29# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
31# CONFIG_ARCH_HAS_ILOG2_U32 is not set
32# CONFIG_ARCH_HAS_ILOG2_U64 is not set
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y30CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_GENERIC_CALIBRATE_DELAY=y31CONFIG_GENERIC_CALIBRATE_DELAY=y
35CONFIG_GENERIC_TIME_VSYSCALL=y32CONFIG_GENERIC_TIME_VSYSCALL=y
36CONFIG_ARCH_HAS_CPU_RELAX=y33CONFIG_ARCH_HAS_CPU_RELAX=y
34CONFIG_ARCH_HAS_DEFAULT_IDLE=y
37CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y35CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
38CONFIG_HAVE_SETUP_PER_CPU_AREA=y36CONFIG_HAVE_SETUP_PER_CPU_AREA=y
39CONFIG_HAVE_CPUMASK_OF_CPU_MAP=y37CONFIG_HAVE_CPUMASK_OF_CPU_MAP=y
@@ -42,12 +40,12 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y · 2 unmodified lines
42CONFIG_ZONE_DMA32=y40CONFIG_ZONE_DMA32=y
43CONFIG_ARCH_POPULATES_NODE_MAP=y41CONFIG_ARCH_POPULATES_NODE_MAP=y
44CONFIG_AUDIT_ARCH=y42CONFIG_AUDIT_ARCH=y
45CONFIG_ARCH_SUPPORTS_AOUT=y
46CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y43CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y
47CONFIG_GENERIC_HARDIRQS=y44CONFIG_GENERIC_HARDIRQS=y
48CONFIG_GENERIC_IRQ_PROBE=y45CONFIG_GENERIC_IRQ_PROBE=y
49CONFIG_GENERIC_PENDING_IRQ=y46CONFIG_GENERIC_PENDING_IRQ=y
50CONFIG_X86_SMP=y47CONFIG_X86_SMP=y
48CONFIG_USE_GENERIC_SMP_HELPERS=y
51CONFIG_X86_64_SMP=y49CONFIG_X86_64_SMP=y
52CONFIG_X86_HT=y50CONFIG_X86_HT=y
53CONFIG_X86_BIOS_REBOOT=y51CONFIG_X86_BIOS_REBOOT=y
@@ -76,30 +74,44 @@ CONFIG_TASK_IO_ACCOUNTING=y · 22 unmodified lines
76CONFIG_AUDIT=y74CONFIG_AUDIT=y
77CONFIG_AUDITSYSCALL=y75CONFIG_AUDITSYSCALL=y
78CONFIG_AUDIT_TREE=y76CONFIG_AUDIT_TREE=y
77
78#
79# RCU Subsystem
80#
81# CONFIG_CLASSIC_RCU is not set
82CONFIG_TREE_RCU=y
83# CONFIG_PREEMPT_RCU is not set
84# CONFIG_RCU_TRACE is not set
85CONFIG_RCU_FANOUT=64
86# CONFIG_RCU_FANOUT_EXACT is not set
87# CONFIG_TREE_RCU_TRACE is not set
88# CONFIG_PREEMPT_RCU_TRACE is not set
79# CONFIG_IKCONFIG is not set89# CONFIG_IKCONFIG is not set
80CONFIG_LOG_BUF_SHIFT=1890CONFIG_LOG_BUF_SHIFT=18
81CONFIG_CGROUPS=y
82# CONFIG_CGROUP_DEBUG is not set
83CONFIG_CGROUP_NS=y
84# CONFIG_CGROUP_DEVICE is not set
85CONFIG_CPUSETS=y
86CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y91CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y
87CONFIG_GROUP_SCHED=y92CONFIG_GROUP_SCHED=y
88CONFIG_FAIR_GROUP_SCHED=y93CONFIG_FAIR_GROUP_SCHED=y
89# CONFIG_RT_GROUP_SCHED is not set94# CONFIG_RT_GROUP_SCHED is not set
90# CONFIG_USER_SCHED is not set95# CONFIG_USER_SCHED is not set
91CONFIG_CGROUP_SCHED=y96CONFIG_CGROUP_SCHED=y
97CONFIG_CGROUPS=y
98# CONFIG_CGROUP_DEBUG is not set
99CONFIG_CGROUP_NS=y
100CONFIG_CGROUP_FREEZER=y
101# CONFIG_CGROUP_DEVICE is not set
102CONFIG_CPUSETS=y
103CONFIG_PROC_PID_CPUSET=y
92CONFIG_CGROUP_CPUACCT=y104CONFIG_CGROUP_CPUACCT=y
93CONFIG_RESOURCE_COUNTERS=y105CONFIG_RESOURCE_COUNTERS=y
94# CONFIG_CGROUP_MEM_RES_CTLR is not set106# CONFIG_CGROUP_MEM_RES_CTLR is not set
95# CONFIG_SYSFS_DEPRECATED_V2 is not set107# CONFIG_SYSFS_DEPRECATED_V2 is not set
96CONFIG_PROC_PID_CPUSET=y
97CONFIG_RELAY=y108CONFIG_RELAY=y
98CONFIG_NAMESPACES=y109CONFIG_NAMESPACES=y
99CONFIG_UTS_NS=y110CONFIG_UTS_NS=y
100CONFIG_IPC_NS=y111CONFIG_IPC_NS=y
101CONFIG_USER_NS=y112CONFIG_USER_NS=y
102CONFIG_PID_NS=y113CONFIG_PID_NS=y
114CONFIG_NET_NS=y
103CONFIG_BLK_DEV_INITRD=y115CONFIG_BLK_DEV_INITRD=y
104CONFIG_INITRAMFS_SOURCE=""116CONFIG_INITRAMFS_SOURCE=""
105CONFIG_CC_OPTIMIZE_FOR_SIZE=y117CONFIG_CC_OPTIMIZE_FOR_SIZE=y
@@ -124,12 +136,15 @@ CONFIG_SIGNALFD=y · 18 unmodified lines
124CONFIG_TIMERFD=y136CONFIG_TIMERFD=y
125CONFIG_EVENTFD=y137CONFIG_EVENTFD=y
126CONFIG_SHMEM=y138CONFIG_SHMEM=y
139CONFIG_AIO=y
127CONFIG_VM_EVENT_COUNTERS=y140CONFIG_VM_EVENT_COUNTERS=y
141CONFIG_PCI_QUIRKS=y
128CONFIG_SLUB_DEBUG=y142CONFIG_SLUB_DEBUG=y
129# CONFIG_SLAB is not set143# CONFIG_SLAB is not set
130CONFIG_SLUB=y144CONFIG_SLUB=y
131# CONFIG_SLOB is not set145# CONFIG_SLOB is not set
132CONFIG_PROFILING=y146CONFIG_PROFILING=y
147CONFIG_TRACEPOINTS=y
133CONFIG_MARKERS=y148CONFIG_MARKERS=y
134# CONFIG_OPROFILE is not set149# CONFIG_OPROFILE is not set
135CONFIG_HAVE_OPROFILE=y150CONFIG_HAVE_OPROFILE=y
@@ -139,15 +154,10 @@ CONFIG_KRETPROBES=y · 3 unmodified lines
139CONFIG_HAVE_IOREMAP_PROT=y154CONFIG_HAVE_IOREMAP_PROT=y
140CONFIG_HAVE_KPROBES=y155CONFIG_HAVE_KPROBES=y
141CONFIG_HAVE_KRETPROBES=y156CONFIG_HAVE_KRETPROBES=y
142# CONFIG_HAVE_ARCH_TRACEHOOK is not set157CONFIG_HAVE_ARCH_TRACEHOOK=y
143# CONFIG_HAVE_DMA_ATTRS is not set
144CONFIG_USE_GENERIC_SMP_HELPERS=y
145# CONFIG_HAVE_CLK is not set
146CONFIG_PROC_PAGE_MONITOR=y
147# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set158# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
148CONFIG_SLABINFO=y159CONFIG_SLABINFO=y
149CONFIG_RT_MUTEXES=y160CONFIG_RT_MUTEXES=y
150# CONFIG_TINY_SHMEM is not set
151CONFIG_BASE_SMALL=0161CONFIG_BASE_SMALL=0
152CONFIG_MODULES=y162CONFIG_MODULES=y
153# CONFIG_MODULE_FORCE_LOAD is not set163# CONFIG_MODULE_FORCE_LOAD is not set
@@ -155,7 +165,6 @@ CONFIG_MODULE_UNLOAD=y · 1 unmodified line
155CONFIG_MODULE_FORCE_UNLOAD=y165CONFIG_MODULE_FORCE_UNLOAD=y
156# CONFIG_MODVERSIONS is not set166# CONFIG_MODVERSIONS is not set
157# CONFIG_MODULE_SRCVERSION_ALL is not set167# CONFIG_MODULE_SRCVERSION_ALL is not set
158CONFIG_KMOD=y
159CONFIG_STOP_MACHINE=y168CONFIG_STOP_MACHINE=y
160CONFIG_BLOCK=y169CONFIG_BLOCK=y
161CONFIG_BLK_DEV_IO_TRACE=y170CONFIG_BLK_DEV_IO_TRACE=y
@@ -175,7 +184,7 @@ CONFIG_IOSCHED_CFQ=y · 13 unmodified lines
175CONFIG_DEFAULT_CFQ=y184CONFIG_DEFAULT_CFQ=y
176# CONFIG_DEFAULT_NOOP is not set185# CONFIG_DEFAULT_NOOP is not set
177CONFIG_DEFAULT_IOSCHED="cfq"186CONFIG_DEFAULT_IOSCHED="cfq"
178CONFIG_CLASSIC_RCU=y187CONFIG_FREEZER=y
179 188
180#189#
181# Processor type and features190# Processor type and features
@@ -185,13 +194,14 @@ CONFIG_NO_HZ=y · 3 unmodified lines
185CONFIG_HIGH_RES_TIMERS=y194CONFIG_HIGH_RES_TIMERS=y
186CONFIG_GENERIC_CLOCKEVENTS_BUILD=y195CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
187CONFIG_SMP=y196CONFIG_SMP=y
197CONFIG_SPARSE_IRQ=y
198# CONFIG_NUMA_MIGRATE_IRQ_DESC is not set
188CONFIG_X86_FIND_SMP_CONFIG=y199CONFIG_X86_FIND_SMP_CONFIG=y
189CONFIG_X86_MPPARSE=y200CONFIG_X86_MPPARSE=y
190CONFIG_X86_PC=y
191# CONFIG_X86_ELAN is not set201# CONFIG_X86_ELAN is not set
192# CONFIG_X86_VOYAGER is not set
193# CONFIG_X86_GENERICARCH is not set202# CONFIG_X86_GENERICARCH is not set
194# CONFIG_X86_VSMP is not set203# CONFIG_X86_VSMP is not set
204CONFIG_SCHED_OMIT_FRAME_POINTER=y
195# CONFIG_PARAVIRT_GUEST is not set205# CONFIG_PARAVIRT_GUEST is not set
196# CONFIG_MEMTEST is not set206# CONFIG_MEMTEST is not set
197# CONFIG_M386 is not set207# CONFIG_M386 is not set
@@ -230,6 +240,11 @@ CONFIG_X86_CMPXCHG64=y · 32 unmodified lines
230CONFIG_X86_CMOV=y240CONFIG_X86_CMOV=y
231CONFIG_X86_MINIMUM_CPU_FAMILY=64241CONFIG_X86_MINIMUM_CPU_FAMILY=64
232CONFIG_X86_DEBUGCTLMSR=y242CONFIG_X86_DEBUGCTLMSR=y
243CONFIG_CPU_SUP_INTEL=y
244CONFIG_CPU_SUP_AMD=y
245CONFIG_CPU_SUP_CENTAUR_64=y
246CONFIG_X86_DS=y
247CONFIG_X86_PTRACE_BTS=y
233CONFIG_HPET_TIMER=y248CONFIG_HPET_TIMER=y
234CONFIG_HPET_EMULATE_RTC=y249CONFIG_HPET_EMULATE_RTC=y
235CONFIG_DMI=y250CONFIG_DMI=y
@@ -237,8 +252,11 @@ CONFIG_GART_IOMMU=y · 1 unmodified line
237CONFIG_CALGARY_IOMMU=y252CONFIG_CALGARY_IOMMU=y
238CONFIG_CALGARY_IOMMU_ENABLED_BY_DEFAULT=y253CONFIG_CALGARY_IOMMU_ENABLED_BY_DEFAULT=y
239CONFIG_AMD_IOMMU=y254CONFIG_AMD_IOMMU=y
255CONFIG_AMD_IOMMU_STATS=y
240CONFIG_SWIOTLB=y256CONFIG_SWIOTLB=y
241CONFIG_IOMMU_HELPER=y257CONFIG_IOMMU_HELPER=y
258CONFIG_IOMMU_API=y
259# CONFIG_MAXSMP is not set
242CONFIG_NR_CPUS=64260CONFIG_NR_CPUS=64
243CONFIG_SCHED_SMT=y261CONFIG_SCHED_SMT=y
244CONFIG_SCHED_MC=y262CONFIG_SCHED_MC=y
@@ -247,12 +265,19 @@ CONFIG_PREEMPT_VOLUNTARY=y · 2 unmodified lines
247# CONFIG_PREEMPT is not set265# CONFIG_PREEMPT is not set
248CONFIG_X86_LOCAL_APIC=y266CONFIG_X86_LOCAL_APIC=y
249CONFIG_X86_IO_APIC=y267CONFIG_X86_IO_APIC=y
250# CONFIG_X86_MCE is not set268CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y
269CONFIG_X86_MCE=y
270CONFIG_X86_MCE_INTEL=y
271CONFIG_X86_MCE_AMD=y
251# CONFIG_I8K is not set272# CONFIG_I8K is not set
252CONFIG_MICROCODE=y273CONFIG_MICROCODE=y
274CONFIG_MICROCODE_INTEL=y
275CONFIG_MICROCODE_AMD=y
253CONFIG_MICROCODE_OLD_INTERFACE=y276CONFIG_MICROCODE_OLD_INTERFACE=y
254CONFIG_X86_MSR=y277CONFIG_X86_MSR=y
255CONFIG_X86_CPUID=y278CONFIG_X86_CPUID=y
279CONFIG_ARCH_PHYS_ADDR_T_64BIT=y
280CONFIG_DIRECT_GBPAGES=y
256CONFIG_NUMA=y281CONFIG_NUMA=y
257CONFIG_K8_NUMA=y282CONFIG_K8_NUMA=y
258CONFIG_X86_64_ACPI_NUMA=y283CONFIG_X86_64_ACPI_NUMA=y
@@ -269,7 +294,6 @@ CONFIG_SPARSEMEM_MANUAL=y · 10 unmodified lines
269CONFIG_SPARSEMEM=y294CONFIG_SPARSEMEM=y
270CONFIG_NEED_MULTIPLE_NODES=y295CONFIG_NEED_MULTIPLE_NODES=y
271CONFIG_HAVE_MEMORY_PRESENT=y296CONFIG_HAVE_MEMORY_PRESENT=y
272# CONFIG_SPARSEMEM_STATIC is not set
273CONFIG_SPARSEMEM_EXTREME=y297CONFIG_SPARSEMEM_EXTREME=y
274CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y298CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
275CONFIG_SPARSEMEM_VMEMMAP=y299CONFIG_SPARSEMEM_VMEMMAP=y
@@ -280,10 +304,14 @@ CONFIG_SPARSEMEM_VMEMMAP=y · 4 unmodified lines
280CONFIG_PAGEFLAGS_EXTENDED=y304CONFIG_PAGEFLAGS_EXTENDED=y
281CONFIG_SPLIT_PTLOCK_CPUS=4305CONFIG_SPLIT_PTLOCK_CPUS=4
282CONFIG_MIGRATION=y306CONFIG_MIGRATION=y
283CONFIG_RESOURCES_64BIT=y307CONFIG_PHYS_ADDR_T_64BIT=y
284CONFIG_ZONE_DMA_FLAG=1308CONFIG_ZONE_DMA_FLAG=1
285CONFIG_BOUNCE=y309CONFIG_BOUNCE=y
286CONFIG_VIRT_TO_BUS=y310CONFIG_VIRT_TO_BUS=y
311CONFIG_UNEVICTABLE_LRU=y
312CONFIG_X86_CHECK_BIOS_CORRUPTION=y
313CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y
314CONFIG_X86_RESERVE_LOW_64K=y
287CONFIG_MTRR=y315CONFIG_MTRR=y
288# CONFIG_MTRR_SANITIZER is not set316# CONFIG_MTRR_SANITIZER is not set
289CONFIG_X86_PAT=y317CONFIG_X86_PAT=y
@@ -302,11 +330,12 @@ CONFIG_PHYSICAL_START=0x1000000 · 12 unmodified lines
302CONFIG_PHYSICAL_ALIGN=0x200000330CONFIG_PHYSICAL_ALIGN=0x200000
303CONFIG_HOTPLUG_CPU=y331CONFIG_HOTPLUG_CPU=y
304# CONFIG_COMPAT_VDSO is not set332# CONFIG_COMPAT_VDSO is not set
333# CONFIG_CMDLINE_BOOL is not set
305CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y334CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
306CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID=y335CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID=y
307 336
308#337#
309# Power management options338# Power management and ACPI options
310#339#
311CONFIG_ARCH_HIBERNATION_HEADER=y340CONFIG_ARCH_HIBERNATION_HEADER=y
312CONFIG_PM=y341CONFIG_PM=y
@@ -333,20 +362,14 @@ CONFIG_ACPI_BATTERY=y · 20 unmodified lines
333CONFIG_ACPI_BUTTON=y362CONFIG_ACPI_BUTTON=y
334CONFIG_ACPI_FAN=y363CONFIG_ACPI_FAN=y
335CONFIG_ACPI_DOCK=y364CONFIG_ACPI_DOCK=y
336# CONFIG_ACPI_BAY is not set
337CONFIG_ACPI_PROCESSOR=y365CONFIG_ACPI_PROCESSOR=y
338CONFIG_ACPI_HOTPLUG_CPU=y366CONFIG_ACPI_HOTPLUG_CPU=y
339CONFIG_ACPI_THERMAL=y367CONFIG_ACPI_THERMAL=y
340CONFIG_ACPI_NUMA=y368CONFIG_ACPI_NUMA=y
341# CONFIG_ACPI_WMI is not set
342# CONFIG_ACPI_ASUS is not set
343# CONFIG_ACPI_TOSHIBA is not set
344# CONFIG_ACPI_CUSTOM_DSDT is not set369# CONFIG_ACPI_CUSTOM_DSDT is not set
345CONFIG_ACPI_BLACKLIST_YEAR=0370CONFIG_ACPI_BLACKLIST_YEAR=0
346# CONFIG_ACPI_DEBUG is not set371# CONFIG_ACPI_DEBUG is not set
347CONFIG_ACPI_EC=y
348# CONFIG_ACPI_PCI_SLOT is not set372# CONFIG_ACPI_PCI_SLOT is not set
349CONFIG_ACPI_POWER=y
350CONFIG_ACPI_SYSTEM=y373CONFIG_ACPI_SYSTEM=y
351CONFIG_X86_PM_TIMER=y374CONFIG_X86_PM_TIMER=y
352CONFIG_ACPI_CONTAINER=y375CONFIG_ACPI_CONTAINER=y
@@ -381,12 +404,16 @@ CONFIG_X86_ACPI_CPUFREQ=y · 28 unmodified lines
381#404#
382# shared options405# shared options
383#406#
384# CONFIG_X86_ACPI_CPUFREQ_PROC_INTF is not set
385# CONFIG_X86_SPEEDSTEP_LIB is not set407# CONFIG_X86_SPEEDSTEP_LIB is not set
386CONFIG_CPU_IDLE=y408CONFIG_CPU_IDLE=y
387CONFIG_CPU_IDLE_GOV_LADDER=y409CONFIG_CPU_IDLE_GOV_LADDER=y
388CONFIG_CPU_IDLE_GOV_MENU=y410CONFIG_CPU_IDLE_GOV_MENU=y
389 411
412#
413# Memory power savings
414#
415# CONFIG_I7300_IDLE is not set
416
390#417#
391# Bus options (PCI etc.)418# Bus options (PCI etc.)
392#419#
@@ -395,8 +422,10 @@ CONFIG_PCI_DIRECT=y · 2 unmodified lines
395CONFIG_PCI_MMCONFIG=y422CONFIG_PCI_MMCONFIG=y
396CONFIG_PCI_DOMAINS=y423CONFIG_PCI_DOMAINS=y
397CONFIG_DMAR=y424CONFIG_DMAR=y
425# CONFIG_DMAR_DEFAULT_ON is not set
398CONFIG_DMAR_GFX_WA=y426CONFIG_DMAR_GFX_WA=y
399CONFIG_DMAR_FLOPPY_WA=y427CONFIG_DMAR_FLOPPY_WA=y
428# CONFIG_INTR_REMAP is not set
400CONFIG_PCIEPORTBUS=y429CONFIG_PCIEPORTBUS=y
401# CONFIG_HOTPLUG_PCI_PCIE is not set430# CONFIG_HOTPLUG_PCI_PCIE is not set
402CONFIG_PCIEAER=y431CONFIG_PCIEAER=y
@@ -405,6 +434,7 @@ CONFIG_ARCH_SUPPORTS_MSI=y · 2 unmodified lines
405CONFIG_PCI_MSI=y434CONFIG_PCI_MSI=y
406# CONFIG_PCI_LEGACY is not set435# CONFIG_PCI_LEGACY is not set
407# CONFIG_PCI_DEBUG is not set436# CONFIG_PCI_DEBUG is not set
437# CONFIG_PCI_STUB is not set
408CONFIG_HT_IRQ=y438CONFIG_HT_IRQ=y
409CONFIG_ISA_DMA_API=y439CONFIG_ISA_DMA_API=y
410CONFIG_K8_NB=y440CONFIG_K8_NB=y
@@ -438,6 +468,8 @@ CONFIG_HOTPLUG_PCI=y · 27 unmodified lines
438#468#
439CONFIG_BINFMT_ELF=y469CONFIG_BINFMT_ELF=y
440CONFIG_COMPAT_BINFMT_ELF=y470CONFIG_COMPAT_BINFMT_ELF=y
471CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
472# CONFIG_HAVE_AOUT is not set
441CONFIG_BINFMT_MISC=y473CONFIG_BINFMT_MISC=y
442CONFIG_IA32_EMULATION=y474CONFIG_IA32_EMULATION=y
443# CONFIG_IA32_AOUT is not set475# CONFIG_IA32_AOUT is not set
@@ -449,6 +481,7 @@ CONFIG_NET=y · 5 unmodified lines
449#481#
450# Networking options482# Networking options
451#483#
484CONFIG_COMPAT_NET_DEV_OPS=y
452CONFIG_PACKET=y485CONFIG_PACKET=y
453CONFIG_PACKET_MMAP=y486CONFIG_PACKET_MMAP=y
454CONFIG_UNIX=y487CONFIG_UNIX=y
@@ -509,7 +542,6 @@ CONFIG_DEFAULT_CUBIC=y · 54 unmodified lines
509# CONFIG_DEFAULT_RENO is not set542# CONFIG_DEFAULT_RENO is not set
510CONFIG_DEFAULT_TCP_CONG="cubic"543CONFIG_DEFAULT_TCP_CONG="cubic"
511CONFIG_TCP_MD5SIG=y544CONFIG_TCP_MD5SIG=y
512# CONFIG_IP_VS is not set
513CONFIG_IPV6=y545CONFIG_IPV6=y
514# CONFIG_IPV6_PRIVACY is not set546# CONFIG_IPV6_PRIVACY is not set
515# CONFIG_IPV6_ROUTER_PREF is not set547# CONFIG_IPV6_ROUTER_PREF is not set
@@ -547,19 +579,21 @@ CONFIG_NF_CONNTRACK_IRC=y · 31 unmodified lines
547CONFIG_NF_CONNTRACK_SIP=y579CONFIG_NF_CONNTRACK_SIP=y
548CONFIG_NF_CT_NETLINK=y580CONFIG_NF_CT_NETLINK=y
549CONFIG_NETFILTER_XTABLES=y581CONFIG_NETFILTER_XTABLES=y
582CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y
550CONFIG_NETFILTER_XT_TARGET_MARK=y583CONFIG_NETFILTER_XT_TARGET_MARK=y
551CONFIG_NETFILTER_XT_TARGET_NFLOG=y584CONFIG_NETFILTER_XT_TARGET_NFLOG=y
552CONFIG_NETFILTER_XT_TARGET_SECMARK=y585CONFIG_NETFILTER_XT_TARGET_SECMARK=y
553CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y
554CONFIG_NETFILTER_XT_TARGET_TCPMSS=y586CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
555CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y587CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
556CONFIG_NETFILTER_XT_MATCH_MARK=y588CONFIG_NETFILTER_XT_MATCH_MARK=y
557CONFIG_NETFILTER_XT_MATCH_POLICY=y589CONFIG_NETFILTER_XT_MATCH_POLICY=y
558CONFIG_NETFILTER_XT_MATCH_STATE=y590CONFIG_NETFILTER_XT_MATCH_STATE=y
591# CONFIG_IP_VS is not set
559 592
560#593#
561# IP: Netfilter Configuration594# IP: Netfilter Configuration
562#595#
596CONFIG_NF_DEFRAG_IPV4=y
563CONFIG_NF_CONNTRACK_IPV4=y597CONFIG_NF_CONNTRACK_IPV4=y
564CONFIG_NF_CONNTRACK_PROC_COMPAT=y598CONFIG_NF_CONNTRACK_PROC_COMPAT=y
565CONFIG_IP_NF_IPTABLES=y599CONFIG_IP_NF_IPTABLES=y
@@ -585,8 +619,8 @@ CONFIG_IP_NF_MANGLE=y · 19 unmodified lines
585CONFIG_NF_CONNTRACK_IPV6=y619CONFIG_NF_CONNTRACK_IPV6=y
586CONFIG_IP6_NF_IPTABLES=y620CONFIG_IP6_NF_IPTABLES=y
587CONFIG_IP6_NF_MATCH_IPV6HEADER=y621CONFIG_IP6_NF_MATCH_IPV6HEADER=y
588CONFIG_IP6_NF_FILTER=y
589CONFIG_IP6_NF_TARGET_LOG=y622CONFIG_IP6_NF_TARGET_LOG=y
623CONFIG_IP6_NF_FILTER=y
590CONFIG_IP6_NF_TARGET_REJECT=y624CONFIG_IP6_NF_TARGET_REJECT=y
591CONFIG_IP6_NF_MANGLE=y625CONFIG_IP6_NF_MANGLE=y
592# CONFIG_IP_DCCP is not set626# CONFIG_IP_DCCP is not set
@@ -594,6 +628,7 @@ CONFIG_IP6_NF_MANGLE=y · 1 unmodified line
594# CONFIG_TIPC is not set628# CONFIG_TIPC is not set
595# CONFIG_ATM is not set629# CONFIG_ATM is not set
596# CONFIG_BRIDGE is not set630# CONFIG_BRIDGE is not set
631# CONFIG_NET_DSA is not set
597# CONFIG_VLAN_8021Q is not set632# CONFIG_VLAN_8021Q is not set
598# CONFIG_DECNET is not set633# CONFIG_DECNET is not set
599CONFIG_LLC=y634CONFIG_LLC=y
@@ -613,6 +648,7 @@ CONFIG_NET_SCHED=y · 13 unmodified lines
613# CONFIG_NET_SCH_HTB is not set648# CONFIG_NET_SCH_HTB is not set
614# CONFIG_NET_SCH_HFSC is not set649# CONFIG_NET_SCH_HFSC is not set
615# CONFIG_NET_SCH_PRIO is not set650# CONFIG_NET_SCH_PRIO is not set
651# CONFIG_NET_SCH_MULTIQ is not set
616# CONFIG_NET_SCH_RED is not set652# CONFIG_NET_SCH_RED is not set
617# CONFIG_NET_SCH_SFQ is not set653# CONFIG_NET_SCH_SFQ is not set
618# CONFIG_NET_SCH_TEQL is not set654# CONFIG_NET_SCH_TEQL is not set
@@ -620,6 +656,7 @@ CONFIG_NET_SCHED=y · 1 unmodified line
620# CONFIG_NET_SCH_GRED is not set656# CONFIG_NET_SCH_GRED is not set
621# CONFIG_NET_SCH_DSMARK is not set657# CONFIG_NET_SCH_DSMARK is not set
622# CONFIG_NET_SCH_NETEM is not set658# CONFIG_NET_SCH_NETEM is not set
659# CONFIG_NET_SCH_DRR is not set
623# CONFIG_NET_SCH_INGRESS is not set660# CONFIG_NET_SCH_INGRESS is not set
624 661
625#662#
@@ -634,6 +671,7 @@ CONFIG_NET_CLS=y · 8 unmodified lines
634# CONFIG_NET_CLS_RSVP is not set671# CONFIG_NET_CLS_RSVP is not set
635# CONFIG_NET_CLS_RSVP6 is not set672# CONFIG_NET_CLS_RSVP6 is not set
636# CONFIG_NET_CLS_FLOW is not set673# CONFIG_NET_CLS_FLOW is not set
674# CONFIG_NET_CLS_CGROUP is not set
637CONFIG_NET_EMATCH=y675CONFIG_NET_EMATCH=y
638CONFIG_NET_EMATCH_STACK=32676CONFIG_NET_EMATCH_STACK=32
639# CONFIG_NET_EMATCH_CMP is not set677# CONFIG_NET_EMATCH_CMP is not set
@@ -649,7 +687,9 @@ CONFIG_NET_CLS_ACT=y · 9 unmodified lines
649# CONFIG_NET_ACT_NAT is not set687# CONFIG_NET_ACT_NAT is not set
650# CONFIG_NET_ACT_PEDIT is not set688# CONFIG_NET_ACT_PEDIT is not set
651# CONFIG_NET_ACT_SIMP is not set689# CONFIG_NET_ACT_SIMP is not set
690# CONFIG_NET_ACT_SKBEDIT is not set
652CONFIG_NET_SCH_FIFO=y691CONFIG_NET_SCH_FIFO=y
692# CONFIG_DCB is not set
653 693
654#694#
655# Network testing695# Network testing
@@ -666,29 +706,33 @@ CONFIG_HAMRADIO=y · 10 unmodified lines
666# CONFIG_IRDA is not set706# CONFIG_IRDA is not set
667# CONFIG_BT is not set707# CONFIG_BT is not set
668# CONFIG_AF_RXRPC is not set708# CONFIG_AF_RXRPC is not set
709# CONFIG_PHONET is not set
669CONFIG_FIB_RULES=y710CONFIG_FIB_RULES=y
670 711CONFIG_WIRELESS=y
671#
672# Wireless
673#
674CONFIG_CFG80211=y712CONFIG_CFG80211=y
713# CONFIG_CFG80211_REG_DEBUG is not set
675CONFIG_NL80211=y714CONFIG_NL80211=y
715CONFIG_WIRELESS_OLD_REGULATORY=y
676CONFIG_WIRELESS_EXT=y716CONFIG_WIRELESS_EXT=y
677CONFIG_WIRELESS_EXT_SYSFS=y717CONFIG_WIRELESS_EXT_SYSFS=y
718# CONFIG_LIB80211 is not set
678CONFIG_MAC80211=y719CONFIG_MAC80211=y
679 720
680#721#
681# Rate control algorithm selection722# Rate control algorithm selection
682#723#
683CONFIG_MAC80211_RC_PID=y724CONFIG_MAC80211_RC_MINSTREL=y
684CONFIG_MAC80211_RC_DEFAULT_PID=y725# CONFIG_MAC80211_RC_DEFAULT_PID is not set
685CONFIG_MAC80211_RC_DEFAULT="pid"726CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
727CONFIG_MAC80211_RC_DEFAULT="minstrel"
686# CONFIG_MAC80211_MESH is not set728# CONFIG_MAC80211_MESH is not set
687CONFIG_MAC80211_LEDS=y729CONFIG_MAC80211_LEDS=y
688# CONFIG_MAC80211_DEBUGFS is not set730# CONFIG_MAC80211_DEBUGFS is not set
689# CONFIG_MAC80211_DEBUG_MENU is not set731# CONFIG_MAC80211_DEBUG_MENU is not set
690# CONFIG_IEEE80211 is not set732# CONFIG_WIMAX is not set
691# CONFIG_RFKILL is not set733CONFIG_RFKILL=y
734# CONFIG_RFKILL_INPUT is not set
735CONFIG_RFKILL_LEDS=y
692# CONFIG_NET_9P is not set736# CONFIG_NET_9P is not set
693 737
694#738#
@@ -712,7 +756,7 @@ CONFIG_PROC_EVENTS=y · 17 unmodified lines
712# CONFIG_MTD is not set756# CONFIG_MTD is not set
713# CONFIG_PARPORT is not set757# CONFIG_PARPORT is not set
714CONFIG_PNP=y758CONFIG_PNP=y
715# CONFIG_PNP_DEBUG is not set759CONFIG_PNP_DEBUG_MESSAGES=y
716 760
717#761#
718# Protocols762# Protocols
@@ -740,21 +784,21 @@ CONFIG_BLK_DEV_RAM_SIZE=16384 · 21 unmodified lines
740CONFIG_MISC_DEVICES=y784CONFIG_MISC_DEVICES=y
741# CONFIG_IBM_ASM is not set785# CONFIG_IBM_ASM is not set
742# CONFIG_PHANTOM is not set786# CONFIG_PHANTOM is not set
743# CONFIG_EEPROM_93CX6 is not set
744# CONFIG_SGI_IOC4 is not set787# CONFIG_SGI_IOC4 is not set
745# CONFIG_TIFM_CORE is not set788# CONFIG_TIFM_CORE is not set
746# CONFIG_ACER_WMI is not set789# CONFIG_ICS932S401 is not set
747# CONFIG_ASUS_LAPTOP is not set
748# CONFIG_FUJITSU_LAPTOP is not set
749# CONFIG_MSI_LAPTOP is not set
750# CONFIG_COMPAL_LAPTOP is not set
751# CONFIG_SONY_LAPTOP is not set
752# CONFIG_THINKPAD_ACPI is not set
753# CONFIG_INTEL_MENLOW is not set
754# CONFIG_ENCLOSURE_SERVICES is not set790# CONFIG_ENCLOSURE_SERVICES is not set
755# CONFIG_SGI_XP is not set791# CONFIG_SGI_XP is not set
756# CONFIG_HP_ILO is not set792# CONFIG_HP_ILO is not set
757# CONFIG_SGI_GRU is not set793# CONFIG_SGI_GRU is not set
794# CONFIG_C2PORT is not set
795
796#
797# EEPROM support
798#
799# CONFIG_EEPROM_AT24 is not set
800# CONFIG_EEPROM_LEGACY is not set
801# CONFIG_EEPROM_93CX6 is not set
758CONFIG_HAVE_IDE=y802CONFIG_HAVE_IDE=y
759# CONFIG_IDE is not set803# CONFIG_IDE is not set
760 804
@@ -793,7 +837,7 @@ CONFIG_SCSI_WAIT_SCAN=m · 32 unmodified lines
793#837#
794CONFIG_SCSI_SPI_ATTRS=y838CONFIG_SCSI_SPI_ATTRS=y
795# CONFIG_SCSI_FC_ATTRS is not set839# CONFIG_SCSI_FC_ATTRS is not set
796CONFIG_SCSI_ISCSI_ATTRS=y840# CONFIG_SCSI_ISCSI_ATTRS is not set
797# CONFIG_SCSI_SAS_ATTRS is not set841# CONFIG_SCSI_SAS_ATTRS is not set
798# CONFIG_SCSI_SAS_LIBSAS is not set842# CONFIG_SCSI_SAS_LIBSAS is not set
799# CONFIG_SCSI_SRP_ATTRS is not set843# CONFIG_SCSI_SRP_ATTRS is not set
@@ -864,6 +908,7 @@ CONFIG_PATA_OLDPIIX=y · 64 unmodified lines
864CONFIG_PATA_SCH=y908CONFIG_PATA_SCH=y
865CONFIG_MD=y909CONFIG_MD=y
866CONFIG_BLK_DEV_MD=y910CONFIG_BLK_DEV_MD=y
911CONFIG_MD_AUTODETECT=y
867# CONFIG_MD_LINEAR is not set912# CONFIG_MD_LINEAR is not set
868# CONFIG_MD_RAID0 is not set913# CONFIG_MD_RAID0 is not set
869# CONFIG_MD_RAID1 is not set914# CONFIG_MD_RAID1 is not set
@@ -919,6 +964,9 @@ CONFIG_PHYLIB=y · 49 unmodified lines
919# CONFIG_BROADCOM_PHY is not set964# CONFIG_BROADCOM_PHY is not set
920# CONFIG_ICPLUS_PHY is not set965# CONFIG_ICPLUS_PHY is not set
921# CONFIG_REALTEK_PHY is not set966# CONFIG_REALTEK_PHY is not set
967# CONFIG_NATIONAL_PHY is not set
968# CONFIG_STE10XP is not set
969# CONFIG_LSI_ET1011C_PHY is not set
922# CONFIG_FIXED_PHY is not set970# CONFIG_FIXED_PHY is not set
923# CONFIG_MDIO_BITBANG is not set971# CONFIG_MDIO_BITBANG is not set
924CONFIG_NET_ETHERNET=y972CONFIG_NET_ETHERNET=y
@@ -942,6 +990,9 @@ CONFIG_NET_TULIP=y · 17 unmodified lines
942# CONFIG_IBM_NEW_EMAC_RGMII is not set990# CONFIG_IBM_NEW_EMAC_RGMII is not set
943# CONFIG_IBM_NEW_EMAC_TAH is not set991# CONFIG_IBM_NEW_EMAC_TAH is not set
944# CONFIG_IBM_NEW_EMAC_EMAC4 is not set992# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
993# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
994# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
995# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
945CONFIG_NET_PCI=y996CONFIG_NET_PCI=y
946# CONFIG_PCNET32 is not set997# CONFIG_PCNET32 is not set
947# CONFIG_AMD8111_ETH is not set998# CONFIG_AMD8111_ETH is not set
@@ -949,7 +1000,6 @@ CONFIG_NET_PCI=y · 1 unmodified line
949# CONFIG_B44 is not set1000# CONFIG_B44 is not set
950CONFIG_FORCEDETH=y1001CONFIG_FORCEDETH=y
951# CONFIG_FORCEDETH_NAPI is not set1002# CONFIG_FORCEDETH_NAPI is not set
952# CONFIG_EEPRO100 is not set
953CONFIG_E100=y1003CONFIG_E100=y
954# CONFIG_FEALNX is not set1004# CONFIG_FEALNX is not set
955# CONFIG_NATSEMI is not set1005# CONFIG_NATSEMI is not set
@@ -963,15 +1013,16 @@ CONFIG_8139TOO_PIO=y · 7 unmodified lines
963# CONFIG_R6040 is not set1013# CONFIG_R6040 is not set
964# CONFIG_SIS900 is not set1014# CONFIG_SIS900 is not set
965# CONFIG_EPIC100 is not set1015# CONFIG_EPIC100 is not set
1016# CONFIG_SMSC9420 is not set
966# CONFIG_SUNDANCE is not set1017# CONFIG_SUNDANCE is not set
967# CONFIG_TLAN is not set1018# CONFIG_TLAN is not set
968# CONFIG_VIA_RHINE is not set1019# CONFIG_VIA_RHINE is not set
969# CONFIG_SC92031 is not set1020# CONFIG_SC92031 is not set
1021# CONFIG_ATL2 is not set
970CONFIG_NETDEV_1000=y1022CONFIG_NETDEV_1000=y
971# CONFIG_ACENIC is not set1023# CONFIG_ACENIC is not set
972# CONFIG_DL2K is not set1024# CONFIG_DL2K is not set
973CONFIG_E1000=y1025CONFIG_E1000=y
974# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
975# CONFIG_E1000E is not set1026# CONFIG_E1000E is not set
976# CONFIG_IP1000 is not set1027# CONFIG_IP1000 is not set
977# CONFIG_IGB is not set1028# CONFIG_IGB is not set
@@ -989,18 +1040,23 @@ CONFIG_TIGON3=y · 11 unmodified lines
989# CONFIG_QLA3XXX is not set1040# CONFIG_QLA3XXX is not set
990# CONFIG_ATL1 is not set1041# CONFIG_ATL1 is not set
991# CONFIG_ATL1E is not set1042# CONFIG_ATL1E is not set
1043# CONFIG_JME is not set
992CONFIG_NETDEV_10000=y1044CONFIG_NETDEV_10000=y
993# CONFIG_CHELSIO_T1 is not set1045# CONFIG_CHELSIO_T1 is not set
1046CONFIG_CHELSIO_T3_DEPENDS=y
994# CONFIG_CHELSIO_T3 is not set1047# CONFIG_CHELSIO_T3 is not set
1048# CONFIG_ENIC is not set
995# CONFIG_IXGBE is not set1049# CONFIG_IXGBE is not set
996# CONFIG_IXGB is not set1050# CONFIG_IXGB is not set
997# CONFIG_S2IO is not set1051# CONFIG_S2IO is not set
998# CONFIG_MYRI10GE is not set1052# CONFIG_MYRI10GE is not set
999# CONFIG_NETXEN_NIC is not set1053# CONFIG_NETXEN_NIC is not set
1000# CONFIG_NIU is not set1054# CONFIG_NIU is not set
1055# CONFIG_MLX4_EN is not set
1001# CONFIG_MLX4_CORE is not set1056# CONFIG_MLX4_CORE is not set
1002# CONFIG_TEHUTI is not set1057# CONFIG_TEHUTI is not set
1003# CONFIG_BNX2X is not set1058# CONFIG_BNX2X is not set
1059# CONFIG_QLGE is not set
1004# CONFIG_SFC is not set1060# CONFIG_SFC is not set
1005CONFIG_TR=y1061CONFIG_TR=y
1006# CONFIG_IBMOL is not set1062# CONFIG_IBMOL is not set
@@ -1013,9 +1069,8 @@ CONFIG_TR=y · 6 unmodified lines
1013# CONFIG_WLAN_PRE80211 is not set1069# CONFIG_WLAN_PRE80211 is not set
1014CONFIG_WLAN_80211=y1070CONFIG_WLAN_80211=y
1015# CONFIG_PCMCIA_RAYCS is not set1071# CONFIG_PCMCIA_RAYCS is not set
1016# CONFIG_IPW2100 is not set
1017# CONFIG_IPW2200 is not set
1018# CONFIG_LIBERTAS is not set1072# CONFIG_LIBERTAS is not set
1073# CONFIG_LIBERTAS_THINFIRM is not set
1019# CONFIG_AIRO is not set1074# CONFIG_AIRO is not set
1020# CONFIG_HERMES is not set1075# CONFIG_HERMES is not set
1021# CONFIG_ATMEL is not set1076# CONFIG_ATMEL is not set
@@ -1032,6 +1087,8 @@ CONFIG_WLAN_80211=y · 10 unmodified lines
1032CONFIG_ATH5K=y1087CONFIG_ATH5K=y
1033# CONFIG_ATH5K_DEBUG is not set1088# CONFIG_ATH5K_DEBUG is not set
1034# CONFIG_ATH9K is not set1089# CONFIG_ATH9K is not set
1090# CONFIG_IPW2100 is not set
1091# CONFIG_IPW2200 is not set
1035# CONFIG_IWLCORE is not set1092# CONFIG_IWLCORE is not set
1036# CONFIG_IWLWIFI_LEDS is not set1093# CONFIG_IWLWIFI_LEDS is not set
1037# CONFIG_IWLAGN is not set1094# CONFIG_IWLAGN is not set
@@ -1042,6 +1099,10 @@ CONFIG_ATH5K=y · 4 unmodified lines
1042# CONFIG_ZD1211RW is not set1099# CONFIG_ZD1211RW is not set
1043# CONFIG_RT2X00 is not set1100# CONFIG_RT2X00 is not set
1044 1101
1102#
1103# Enable WiMAX (Networking options) to see the WiMAX drivers
1104#
1105
1045#1106#
1046# USB Network Adapters1107# USB Network Adapters
1047#1108#
@@ -1050,6 +1111,7 @@ CONFIG_ATH5K=y · 2 unmodified lines
1050# CONFIG_USB_PEGASUS is not set1111# CONFIG_USB_PEGASUS is not set
1051# CONFIG_USB_RTL8150 is not set1112# CONFIG_USB_RTL8150 is not set
1052# CONFIG_USB_USBNET is not set1113# CONFIG_USB_USBNET is not set
1114# CONFIG_USB_HSO is not set
1053CONFIG_NET_PCMCIA=y1115CONFIG_NET_PCMCIA=y
1054# CONFIG_PCMCIA_3C589 is not set1116# CONFIG_PCMCIA_3C589 is not set
1055# CONFIG_PCMCIA_3C574 is not set1117# CONFIG_PCMCIA_3C574 is not set
@@ -1059,6 +1121,7 @@ CONFIG_NET_PCMCIA=y · 3 unmodified lines
1059# CONFIG_PCMCIA_SMC91C92 is not set1121# CONFIG_PCMCIA_SMC91C92 is not set
1060# CONFIG_PCMCIA_XIRC2PS is not set1122# CONFIG_PCMCIA_XIRC2PS is not set
1061# CONFIG_PCMCIA_AXNET is not set1123# CONFIG_PCMCIA_AXNET is not set
1124# CONFIG_PCMCIA_IBMTR is not set
1062# CONFIG_WAN is not set1125# CONFIG_WAN is not set
1063CONFIG_FDDI=y1126CONFIG_FDDI=y
1064# CONFIG_DEFXX is not set1127# CONFIG_DEFXX is not set
@@ -1110,6 +1173,7 @@ CONFIG_MOUSE_PS2_LOGIPS2PP=y · 45 unmodified lines
1110CONFIG_MOUSE_PS2_SYNAPTICS=y1173CONFIG_MOUSE_PS2_SYNAPTICS=y
1111CONFIG_MOUSE_PS2_LIFEBOOK=y1174CONFIG_MOUSE_PS2_LIFEBOOK=y
1112CONFIG_MOUSE_PS2_TRACKPOINT=y1175CONFIG_MOUSE_PS2_TRACKPOINT=y
1176# CONFIG_MOUSE_PS2_ELANTECH is not set
1113# CONFIG_MOUSE_PS2_TOUCHKIT is not set1177# CONFIG_MOUSE_PS2_TOUCHKIT is not set
1114# CONFIG_MOUSE_SERIAL is not set1178# CONFIG_MOUSE_SERIAL is not set
1115# CONFIG_MOUSE_APPLETOUCH is not set1179# CONFIG_MOUSE_APPLETOUCH is not set
@@ -1147,15 +1211,16 @@ CONFIG_INPUT_TOUCHSCREEN=y · 31 unmodified lines
1147# CONFIG_TOUCHSCREEN_FUJITSU is not set1211# CONFIG_TOUCHSCREEN_FUJITSU is not set
1148# CONFIG_TOUCHSCREEN_GUNZE is not set1212# CONFIG_TOUCHSCREEN_GUNZE is not set
1149# CONFIG_TOUCHSCREEN_ELO is not set1213# CONFIG_TOUCHSCREEN_ELO is not set
1214# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
1150# CONFIG_TOUCHSCREEN_MTOUCH is not set1215# CONFIG_TOUCHSCREEN_MTOUCH is not set
1151# CONFIG_TOUCHSCREEN_INEXIO is not set1216# CONFIG_TOUCHSCREEN_INEXIO is not set
1152# CONFIG_TOUCHSCREEN_MK712 is not set1217# CONFIG_TOUCHSCREEN_MK712 is not set
1153# CONFIG_TOUCHSCREEN_PENMOUNT is not set1218# CONFIG_TOUCHSCREEN_PENMOUNT is not set
1154# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set1219# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
1155# CONFIG_TOUCHSCREEN_TOUCHWIN is not set1220# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
1156# CONFIG_TOUCHSCREEN_UCB1400 is not set
1157# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set1221# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
1158# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set1222# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
1223# CONFIG_TOUCHSCREEN_TSC2007 is not set
1159CONFIG_INPUT_MISC=y1224CONFIG_INPUT_MISC=y
1160# CONFIG_INPUT_PCSPKR is not set1225# CONFIG_INPUT_PCSPKR is not set
1161# CONFIG_INPUT_APANEL is not set1226# CONFIG_INPUT_APANEL is not set
@@ -1165,6 +1230,7 @@ CONFIG_INPUT_MISC=y · 3 unmodified lines
1165# CONFIG_INPUT_KEYSPAN_REMOTE is not set1230# CONFIG_INPUT_KEYSPAN_REMOTE is not set
1166# CONFIG_INPUT_POWERMATE is not set1231# CONFIG_INPUT_POWERMATE is not set
1167# CONFIG_INPUT_YEALINK is not set1232# CONFIG_INPUT_YEALINK is not set
1233# CONFIG_INPUT_CM109 is not set
1168# CONFIG_INPUT_UINPUT is not set1234# CONFIG_INPUT_UINPUT is not set
1169 1235
1170#1236#
@@ -1231,6 +1297,7 @@ CONFIG_SERIAL_CORE=y · 60 unmodified lines
1231CONFIG_SERIAL_CORE_CONSOLE=y1297CONFIG_SERIAL_CORE_CONSOLE=y
1232# CONFIG_SERIAL_JSM is not set1298# CONFIG_SERIAL_JSM is not set
1233CONFIG_UNIX98_PTYS=y1299CONFIG_UNIX98_PTYS=y
1300# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
1234# CONFIG_LEGACY_PTYS is not set1301# CONFIG_LEGACY_PTYS is not set
1235# CONFIG_IPMI_HANDLER is not set1302# CONFIG_IPMI_HANDLER is not set
1236CONFIG_HW_RANDOM=y1303CONFIG_HW_RANDOM=y
@@ -1260,6 +1327,7 @@ CONFIG_I2C=y · 23 unmodified lines
1260CONFIG_I2C_BOARDINFO=y1327CONFIG_I2C_BOARDINFO=y
1261# CONFIG_I2C_CHARDEV is not set1328# CONFIG_I2C_CHARDEV is not set
1262CONFIG_I2C_HELPER_AUTO=y1329CONFIG_I2C_HELPER_AUTO=y
1330CONFIG_I2C_ALGOBIT=y
1263 1331
1264#1332#
1265# I2C Hardware Bus support1333# I2C Hardware Bus support
@@ -1311,8 +1379,6 @@ CONFIG_I2C_I801=y · 45 unmodified lines
1311# Miscellaneous I2C Chip support1379# Miscellaneous I2C Chip support
1312#1380#
1313# CONFIG_DS1682 is not set1381# CONFIG_DS1682 is not set
1314# CONFIG_EEPROM_AT24 is not set
1315# CONFIG_EEPROM_LEGACY is not set
1316# CONFIG_SENSORS_PCF8574 is not set1382# CONFIG_SENSORS_PCF8574 is not set
1317# CONFIG_PCF8575 is not set1383# CONFIG_PCF8575 is not set
1318# CONFIG_SENSORS_PCA9539 is not set1384# CONFIG_SENSORS_PCA9539 is not set
@@ -1331,8 +1397,78 @@ CONFIG_POWER_SUPPLY=y · 12 unmodified lines
1331# CONFIG_POWER_SUPPLY_DEBUG is not set1397# CONFIG_POWER_SUPPLY_DEBUG is not set
1332# CONFIG_PDA_POWER is not set1398# CONFIG_PDA_POWER is not set
1333# CONFIG_BATTERY_DS2760 is not set1399# CONFIG_BATTERY_DS2760 is not set
1334# CONFIG_HWMON is not set1400# CONFIG_BATTERY_BQ27x00 is not set
1401CONFIG_HWMON=y
1402# CONFIG_HWMON_VID is not set
1403# CONFIG_SENSORS_ABITUGURU is not set
1404# CONFIG_SENSORS_ABITUGURU3 is not set
1405# CONFIG_SENSORS_AD7414 is not set
1406# CONFIG_SENSORS_AD7418 is not set
1407# CONFIG_SENSORS_ADM1021 is not set
1408# CONFIG_SENSORS_ADM1025 is not set
1409# CONFIG_SENSORS_ADM1026 is not set
1410# CONFIG_SENSORS_ADM1029 is not set
1411# CONFIG_SENSORS_ADM1031 is not set
1412# CONFIG_SENSORS_ADM9240 is not set
1413# CONFIG_SENSORS_ADT7462 is not set
1414# CONFIG_SENSORS_ADT7470 is not set
1415# CONFIG_SENSORS_ADT7473 is not set
1416# CONFIG_SENSORS_ADT7475 is not set
1417# CONFIG_SENSORS_K8TEMP is not set
1418# CONFIG_SENSORS_ASB100 is not set
1419# CONFIG_SENSORS_ATXP1 is not set
1420# CONFIG_SENSORS_DS1621 is not set
1421# CONFIG_SENSORS_I5K_AMB is not set
1422# CONFIG_SENSORS_F71805F is not set
1423# CONFIG_SENSORS_F71882FG is not set
1424# CONFIG_SENSORS_F75375S is not set
1425# CONFIG_SENSORS_FSCHER is not set
1426# CONFIG_SENSORS_FSCPOS is not set
1427# CONFIG_SENSORS_FSCHMD is not set
1428# CONFIG_SENSORS_GL518SM is not set
1429# CONFIG_SENSORS_GL520SM is not set
1430# CONFIG_SENSORS_CORETEMP is not set
1431# CONFIG_SENSORS_IT87 is not set
1432# CONFIG_SENSORS_LM63 is not set
1433# CONFIG_SENSORS_LM75 is not set
1434# CONFIG_SENSORS_LM77 is not set
1435# CONFIG_SENSORS_LM78 is not set
1436# CONFIG_SENSORS_LM80 is not set
1437# CONFIG_SENSORS_LM83 is not set
1438# CONFIG_SENSORS_LM85 is not set
1439# CONFIG_SENSORS_LM87 is not set
1440# CONFIG_SENSORS_LM90 is not set
1441# CONFIG_SENSORS_LM92 is not set
1442# CONFIG_SENSORS_LM93 is not set
1443# CONFIG_SENSORS_LTC4245 is not set
1444# CONFIG_SENSORS_MAX1619 is not set
1445# CONFIG_SENSORS_MAX6650 is not set
1446# CONFIG_SENSORS_PC87360 is not set
1447# CONFIG_SENSORS_PC87427 is not set
1448# CONFIG_SENSORS_SIS5595 is not set
1449# CONFIG_SENSORS_DME1737 is not set
1450# CONFIG_SENSORS_SMSC47M1 is not set
1451# CONFIG_SENSORS_SMSC47M192 is not set
1452# CONFIG_SENSORS_SMSC47B397 is not set
1453# CONFIG_SENSORS_ADS7828 is not set
1454# CONFIG_SENSORS_THMC50 is not set
1455# CONFIG_SENSORS_VIA686A is not set
1456# CONFIG_SENSORS_VT1211 is not set
1457# CONFIG_SENSORS_VT8231 is not set
1458# CONFIG_SENSORS_W83781D is not set
1459# CONFIG_SENSORS_W83791D is not set
1460# CONFIG_SENSORS_W83792D is not set
1461# CONFIG_SENSORS_W83793 is not set
1462# CONFIG_SENSORS_W83L785TS is not set
1463# CONFIG_SENSORS_W83L786NG is not set
1464# CONFIG_SENSORS_W83627HF is not set
1465# CONFIG_SENSORS_W83627EHF is not set
1466# CONFIG_SENSORS_HDAPS is not set
1467# CONFIG_SENSORS_LIS3LV02D is not set
1468# CONFIG_SENSORS_APPLESMC is not set
1469# CONFIG_HWMON_DEBUG_CHIP is not set
1335CONFIG_THERMAL=y1470CONFIG_THERMAL=y
1471# CONFIG_THERMAL_HWMON is not set
1336CONFIG_WATCHDOG=y1472CONFIG_WATCHDOG=y
1337# CONFIG_WATCHDOG_NOWAYOUT is not set1473# CONFIG_WATCHDOG_NOWAYOUT is not set
1338 1474
@@ -1352,15 +1488,18 @@ CONFIG_WATCHDOG=y · 13 unmodified lines
1352# CONFIG_I6300ESB_WDT is not set1488# CONFIG_I6300ESB_WDT is not set
1353# CONFIG_ITCO_WDT is not set1489# CONFIG_ITCO_WDT is not set
1354# CONFIG_IT8712F_WDT is not set1490# CONFIG_IT8712F_WDT is not set
1491# CONFIG_IT87_WDT is not set
1355# CONFIG_HP_WATCHDOG is not set1492# CONFIG_HP_WATCHDOG is not set
1356# CONFIG_SC1200_WDT is not set1493# CONFIG_SC1200_WDT is not set
1357# CONFIG_PC87413_WDT is not set1494# CONFIG_PC87413_WDT is not set
1358# CONFIG_60XX_WDT is not set1495# CONFIG_60XX_WDT is not set
1359# CONFIG_SBC8360_WDT is not set1496# CONFIG_SBC8360_WDT is not set
1360# CONFIG_CPU5_WDT is not set1497# CONFIG_CPU5_WDT is not set
1498# CONFIG_SMSC_SCH311X_WDT is not set
1361# CONFIG_SMSC37B787_WDT is not set1499# CONFIG_SMSC37B787_WDT is not set
1362# CONFIG_W83627HF_WDT is not set1500# CONFIG_W83627HF_WDT is not set
1363# CONFIG_W83697HF_WDT is not set1501# CONFIG_W83697HF_WDT is not set
1502# CONFIG_W83697UG_WDT is not set
1364# CONFIG_W83877F_WDT is not set1503# CONFIG_W83877F_WDT is not set
1365# CONFIG_W83977F_WDT is not set1504# CONFIG_W83977F_WDT is not set
1366# CONFIG_MACHZ_WDT is not set1505# CONFIG_MACHZ_WDT is not set
@@ -1376,11 +1515,11 @@ CONFIG_WATCHDOG=y · 9 unmodified lines
1376# USB-based Watchdog Cards1515# USB-based Watchdog Cards
1377#1516#
1378# CONFIG_USBPCWATCHDOG is not set1517# CONFIG_USBPCWATCHDOG is not set
1518CONFIG_SSB_POSSIBLE=y
1379 1519
1380#1520#
1381# Sonics Silicon Backplane1521# Sonics Silicon Backplane
1382#1522#
1383CONFIG_SSB_POSSIBLE=y
1384# CONFIG_SSB is not set1523# CONFIG_SSB is not set
1385 1524
1386#1525#
@@ -1389,7 +1528,13 @@ CONFIG_SSB_POSSIBLE=y · 2 unmodified lines
1389# CONFIG_MFD_CORE is not set1528# CONFIG_MFD_CORE is not set
1390# CONFIG_MFD_SM501 is not set1529# CONFIG_MFD_SM501 is not set
1391# CONFIG_HTC_PASIC3 is not set1530# CONFIG_HTC_PASIC3 is not set
1531# CONFIG_TWL4030_CORE is not set
1392# CONFIG_MFD_TMIO is not set1532# CONFIG_MFD_TMIO is not set
1533# CONFIG_PMIC_DA903X is not set
1534# CONFIG_MFD_WM8400 is not set
1535# CONFIG_MFD_WM8350_I2C is not set
1536# CONFIG_MFD_PCF50633 is not set
1537# CONFIG_REGULATOR is not set
1393 1538
1394#1539#
1395# Multimedia devices1540# Multimedia devices
@@ -1423,6 +1568,7 @@ CONFIG_DRM=y · 27 unmodified lines
1423# CONFIG_DRM_I810 is not set1568# CONFIG_DRM_I810 is not set
1424# CONFIG_DRM_I830 is not set1569# CONFIG_DRM_I830 is not set
1425CONFIG_DRM_I915=y1570CONFIG_DRM_I915=y
1571CONFIG_DRM_I915_KMS=y
1426# CONFIG_DRM_MGA is not set1572# CONFIG_DRM_MGA is not set
1427# CONFIG_DRM_SIS is not set1573# CONFIG_DRM_SIS is not set
1428# CONFIG_DRM_VIA is not set1574# CONFIG_DRM_VIA is not set
@@ -1432,6 +1578,7 @@ CONFIG_DRM_I915=y · 3 unmodified lines
1432CONFIG_FB=y1578CONFIG_FB=y
1433# CONFIG_FIRMWARE_EDID is not set1579# CONFIG_FIRMWARE_EDID is not set
1434# CONFIG_FB_DDC is not set1580# CONFIG_FB_DDC is not set
1581# CONFIG_FB_BOOT_VESA_SUPPORT is not set
1435CONFIG_FB_CFB_FILLRECT=y1582CONFIG_FB_CFB_FILLRECT=y
1436CONFIG_FB_CFB_COPYAREA=y1583CONFIG_FB_CFB_COPYAREA=y
1437CONFIG_FB_CFB_IMAGEBLIT=y1584CONFIG_FB_CFB_IMAGEBLIT=y
@@ -1460,7 +1607,6 @@ CONFIG_FB_TILEBLITTING=y · 22 unmodified lines
1460# CONFIG_FB_UVESA is not set1607# CONFIG_FB_UVESA is not set
1461# CONFIG_FB_VESA is not set1608# CONFIG_FB_VESA is not set
1462CONFIG_FB_EFI=y1609CONFIG_FB_EFI=y
1463# CONFIG_FB_IMAC is not set
1464# CONFIG_FB_N411 is not set1610# CONFIG_FB_N411 is not set
1465# CONFIG_FB_HGA is not set1611# CONFIG_FB_HGA is not set
1466# CONFIG_FB_S1D13XXX is not set1612# CONFIG_FB_S1D13XXX is not set
@@ -1475,6 +1621,7 @@ CONFIG_FB_EFI=y · 8 unmodified lines
1475# CONFIG_FB_S3 is not set1621# CONFIG_FB_S3 is not set
1476# CONFIG_FB_SAVAGE is not set1622# CONFIG_FB_SAVAGE is not set
1477# CONFIG_FB_SIS is not set1623# CONFIG_FB_SIS is not set
1624# CONFIG_FB_VIA is not set
1478# CONFIG_FB_NEOMAGIC is not set1625# CONFIG_FB_NEOMAGIC is not set
1479# CONFIG_FB_KYRO is not set1626# CONFIG_FB_KYRO is not set
1480# CONFIG_FB_3DFX is not set1627# CONFIG_FB_3DFX is not set
@@ -1486,12 +1633,15 @@ CONFIG_FB_EFI=y · 5 unmodified lines
1486# CONFIG_FB_CARMINE is not set1633# CONFIG_FB_CARMINE is not set
1487# CONFIG_FB_GEODE is not set1634# CONFIG_FB_GEODE is not set
1488# CONFIG_FB_VIRTUAL is not set1635# CONFIG_FB_VIRTUAL is not set
1636# CONFIG_FB_METRONOME is not set
1637# CONFIG_FB_MB862XX is not set
1489CONFIG_BACKLIGHT_LCD_SUPPORT=y1638CONFIG_BACKLIGHT_LCD_SUPPORT=y
1490# CONFIG_LCD_CLASS_DEVICE is not set1639# CONFIG_LCD_CLASS_DEVICE is not set
1491CONFIG_BACKLIGHT_CLASS_DEVICE=y1640CONFIG_BACKLIGHT_CLASS_DEVICE=y
1492# CONFIG_BACKLIGHT_CORGI is not set1641CONFIG_BACKLIGHT_GENERIC=y
1493# CONFIG_BACKLIGHT_PROGEAR is not set1642# CONFIG_BACKLIGHT_PROGEAR is not set
1494# CONFIG_BACKLIGHT_MBP_NVIDIA is not set1643# CONFIG_BACKLIGHT_MBP_NVIDIA is not set
1644# CONFIG_BACKLIGHT_SAHARA is not set
1495 1645
1496#1646#
1497# Display device support1647# Display device support
@@ -1511,10 +1661,12 @@ CONFIG_LOGO=y · 13 unmodified lines
1511# CONFIG_LOGO_LINUX_VGA16 is not set1661# CONFIG_LOGO_LINUX_VGA16 is not set
1512CONFIG_LOGO_LINUX_CLUT224=y1662CONFIG_LOGO_LINUX_CLUT224=y
1513CONFIG_SOUND=y1663CONFIG_SOUND=y
1664CONFIG_SOUND_OSS_CORE=y
1514CONFIG_SND=y1665CONFIG_SND=y
1515CONFIG_SND_TIMER=y1666CONFIG_SND_TIMER=y
1516CONFIG_SND_PCM=y1667CONFIG_SND_PCM=y
1517CONFIG_SND_HWDEP=y1668CONFIG_SND_HWDEP=y
1669CONFIG_SND_JACK=y
1518CONFIG_SND_SEQUENCER=y1670CONFIG_SND_SEQUENCER=y
1519CONFIG_SND_SEQ_DUMMY=y1671CONFIG_SND_SEQ_DUMMY=y
1520CONFIG_SND_OSSEMUL=y1672CONFIG_SND_OSSEMUL=y
@@ -1522,6 +1674,8 @@ CONFIG_SND_MIXER_OSS=y · 1 unmodified line
1522CONFIG_SND_PCM_OSS=y1674CONFIG_SND_PCM_OSS=y
1523CONFIG_SND_PCM_OSS_PLUGINS=y1675CONFIG_SND_PCM_OSS_PLUGINS=y
1524CONFIG_SND_SEQUENCER_OSS=y1676CONFIG_SND_SEQUENCER_OSS=y
1677CONFIG_SND_HRTIMER=y
1678CONFIG_SND_SEQ_HRTIMER_DEFAULT=y
1525CONFIG_SND_DYNAMIC_MINORS=y1679CONFIG_SND_DYNAMIC_MINORS=y
1526CONFIG_SND_SUPPORT_OLD_API=y1680CONFIG_SND_SUPPORT_OLD_API=y
1527CONFIG_SND_VERBOSE_PROCFS=y1681CONFIG_SND_VERBOSE_PROCFS=y
@@ -1575,11 +1729,16 @@ CONFIG_SND_PCI=y · 47 unmodified lines
1575# CONFIG_SND_FM801 is not set1729# CONFIG_SND_FM801 is not set
1576CONFIG_SND_HDA_INTEL=y1730CONFIG_SND_HDA_INTEL=y
1577CONFIG_SND_HDA_HWDEP=y1731CONFIG_SND_HDA_HWDEP=y
1732# CONFIG_SND_HDA_RECONFIG is not set
1733# CONFIG_SND_HDA_INPUT_BEEP is not set
1578CONFIG_SND_HDA_CODEC_REALTEK=y1734CONFIG_SND_HDA_CODEC_REALTEK=y
1579CONFIG_SND_HDA_CODEC_ANALOG=y1735CONFIG_SND_HDA_CODEC_ANALOG=y
1580CONFIG_SND_HDA_CODEC_SIGMATEL=y1736CONFIG_SND_HDA_CODEC_SIGMATEL=y
1581CONFIG_SND_HDA_CODEC_VIA=y1737CONFIG_SND_HDA_CODEC_VIA=y
1582CONFIG_SND_HDA_CODEC_ATIHDMI=y1738CONFIG_SND_HDA_CODEC_ATIHDMI=y
1739CONFIG_SND_HDA_CODEC_NVHDMI=y
1740CONFIG_SND_HDA_CODEC_INTELHDMI=y
1741CONFIG_SND_HDA_ELD=y
1583CONFIG_SND_HDA_CODEC_CONEXANT=y1742CONFIG_SND_HDA_CODEC_CONEXANT=y
1584CONFIG_SND_HDA_CODEC_CMEDIA=y1743CONFIG_SND_HDA_CODEC_CMEDIA=y
1585CONFIG_SND_HDA_CODEC_SI3054=y1744CONFIG_SND_HDA_CODEC_SI3054=y
@@ -1612,6 +1771,7 @@ CONFIG_SND_USB=y · 26 unmodified lines
1612# CONFIG_SND_USB_AUDIO is not set1771# CONFIG_SND_USB_AUDIO is not set
1613# CONFIG_SND_USB_USX2Y is not set1772# CONFIG_SND_USB_USX2Y is not set
1614# CONFIG_SND_USB_CAIAQ is not set1773# CONFIG_SND_USB_CAIAQ is not set
1774# CONFIG_SND_USB_US122L is not set
1615CONFIG_SND_PCMCIA=y1775CONFIG_SND_PCMCIA=y
1616# CONFIG_SND_VXPOCKET is not set1776# CONFIG_SND_VXPOCKET is not set
1617# CONFIG_SND_PDAUDIOCF is not set1777# CONFIG_SND_PDAUDIOCF is not set
@@ -1626,15 +1786,37 @@ CONFIG_HIDRAW=y · 8 unmodified lines
1626# USB Input Devices1786# USB Input Devices
1627#1787#
1628CONFIG_USB_HID=y1788CONFIG_USB_HID=y
1629CONFIG_USB_HIDINPUT_POWERBOOK=y
1630CONFIG_HID_FF=y
1631CONFIG_HID_PID=y1789CONFIG_HID_PID=y
1790CONFIG_USB_HIDDEV=y
1791
1792#
1793# Special HID drivers
1794#
1795CONFIG_HID_COMPAT=y
1796CONFIG_HID_A4TECH=y
1797CONFIG_HID_APPLE=y
1798CONFIG_HID_BELKIN=y
1799CONFIG_HID_CHERRY=y
1800CONFIG_HID_CHICONY=y
1801CONFIG_HID_CYPRESS=y
1802CONFIG_HID_EZKEY=y
1803CONFIG_HID_GYRATION=y
1804CONFIG_HID_LOGITECH=y
1632CONFIG_LOGITECH_FF=y1805CONFIG_LOGITECH_FF=y
1633# CONFIG_LOGIRUMBLEPAD2_FF is not set1806# CONFIG_LOGIRUMBLEPAD2_FF is not set
1807CONFIG_HID_MICROSOFT=y
1808CONFIG_HID_MONTEREY=y
1809CONFIG_HID_NTRIG=y
1810CONFIG_HID_PANTHERLORD=y
1634CONFIG_PANTHERLORD_FF=y1811CONFIG_PANTHERLORD_FF=y
1812CONFIG_HID_PETALYNX=y
1813CONFIG_HID_SAMSUNG=y
1814CONFIG_HID_SONY=y
1815CONFIG_HID_SUNPLUS=y
1816# CONFIG_GREENASIA_FF is not set
1817CONFIG_HID_TOPSEED=y
1635CONFIG_THRUSTMASTER_FF=y1818CONFIG_THRUSTMASTER_FF=y
1636CONFIG_ZEROPLUS_FF=y1819CONFIG_ZEROPLUS_FF=y
1637CONFIG_USB_HIDDEV=y
1638CONFIG_USB_SUPPORT=y1820CONFIG_USB_SUPPORT=y
1639CONFIG_USB_ARCH_HAS_HCD=y1821CONFIG_USB_ARCH_HAS_HCD=y
1640CONFIG_USB_ARCH_HAS_OHCI=y1822CONFIG_USB_ARCH_HAS_OHCI=y
@@ -1652,6 +1834,8 @@ CONFIG_USB_DEVICEFS=y · 11 unmodified lines
1652CONFIG_USB_SUSPEND=y1834CONFIG_USB_SUSPEND=y
1653# CONFIG_USB_OTG is not set1835# CONFIG_USB_OTG is not set
1654CONFIG_USB_MON=y1836CONFIG_USB_MON=y
1837# CONFIG_USB_WUSB is not set
1838# CONFIG_USB_WUSB_CBAF is not set
1655 1839
1656#1840#
1657# USB Host Controller Drivers1841# USB Host Controller Drivers
@@ -1660,6 +1844,7 @@ CONFIG_USB_MON=y · 2 unmodified lines
1660CONFIG_USB_EHCI_HCD=y1844CONFIG_USB_EHCI_HCD=y
1661# CONFIG_USB_EHCI_ROOT_HUB_TT is not set1845# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
1662# CONFIG_USB_EHCI_TT_NEWSCHED is not set1846# CONFIG_USB_EHCI_TT_NEWSCHED is not set
1847# CONFIG_USB_OXU210HP_HCD is not set
1663# CONFIG_USB_ISP116X_HCD is not set1848# CONFIG_USB_ISP116X_HCD is not set
1664# CONFIG_USB_ISP1760_HCD is not set1849# CONFIG_USB_ISP1760_HCD is not set
1665CONFIG_USB_OHCI_HCD=y1850CONFIG_USB_OHCI_HCD=y
@@ -1669,6 +1854,8 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y · 3 unmodified lines
1669CONFIG_USB_UHCI_HCD=y1854CONFIG_USB_UHCI_HCD=y
1670# CONFIG_USB_SL811_HCD is not set1855# CONFIG_USB_SL811_HCD is not set
1671# CONFIG_USB_R8A66597_HCD is not set1856# CONFIG_USB_R8A66597_HCD is not set
1857# CONFIG_USB_WHCI_HCD is not set
1858# CONFIG_USB_HWA_HCD is not set
1672 1859
1673#1860#
1674# USB Device Class drivers1861# USB Device Class drivers
@@ -1676,20 +1863,20 @@ CONFIG_USB_UHCI_HCD=y · 1 unmodified line
1676# CONFIG_USB_ACM is not set1863# CONFIG_USB_ACM is not set
1677CONFIG_USB_PRINTER=y1864CONFIG_USB_PRINTER=y
1678# CONFIG_USB_WDM is not set1865# CONFIG_USB_WDM is not set
1866# CONFIG_USB_TMC is not set
1679 1867
1680#1868#
1681# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'1869# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
1682#1870#
1683 1871
1684#1872#
1685# may also be needed; see USB_STORAGE Help for more information1873# see USB_STORAGE Help for more information
1686#1874#
1687CONFIG_USB_STORAGE=y1875CONFIG_USB_STORAGE=y
1688# CONFIG_USB_STORAGE_DEBUG is not set1876# CONFIG_USB_STORAGE_DEBUG is not set
1689# CONFIG_USB_STORAGE_DATAFAB is not set1877# CONFIG_USB_STORAGE_DATAFAB is not set
1690# CONFIG_USB_STORAGE_FREECOM is not set1878# CONFIG_USB_STORAGE_FREECOM is not set
1691# CONFIG_USB_STORAGE_ISD200 is not set1879# CONFIG_USB_STORAGE_ISD200 is not set
1692# CONFIG_USB_STORAGE_DPCM is not set
1693# CONFIG_USB_STORAGE_USBAT is not set1880# CONFIG_USB_STORAGE_USBAT is not set
1694# CONFIG_USB_STORAGE_SDDR09 is not set1881# CONFIG_USB_STORAGE_SDDR09 is not set
1695# CONFIG_USB_STORAGE_SDDR55 is not set1882# CONFIG_USB_STORAGE_SDDR55 is not set
@@ -1697,7 +1884,6 @@ CONFIG_USB_STORAGE=y · 1 unmodified line
1697# CONFIG_USB_STORAGE_ALAUDA is not set1884# CONFIG_USB_STORAGE_ALAUDA is not set
1698# CONFIG_USB_STORAGE_ONETOUCH is not set1885# CONFIG_USB_STORAGE_ONETOUCH is not set
1699# CONFIG_USB_STORAGE_KARMA is not set1886# CONFIG_USB_STORAGE_KARMA is not set
1700# CONFIG_USB_STORAGE_SIERRA is not set
1701# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set1887# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
1702CONFIG_USB_LIBUSUAL=y1888CONFIG_USB_LIBUSUAL=y
1703 1889
@@ -1718,6 +1904,7 @@ CONFIG_USB_LIBUSUAL=y · 14 unmodified lines
1718# CONFIG_USB_EMI62 is not set1904# CONFIG_USB_EMI62 is not set
1719# CONFIG_USB_EMI26 is not set1905# CONFIG_USB_EMI26 is not set
1720# CONFIG_USB_ADUTUX is not set1906# CONFIG_USB_ADUTUX is not set
1907# CONFIG_USB_SEVSEG is not set
1721# CONFIG_USB_RIO500 is not set1908# CONFIG_USB_RIO500 is not set
1722# CONFIG_USB_LEGOTOWER is not set1909# CONFIG_USB_LEGOTOWER is not set
1723# CONFIG_USB_LCD is not set1910# CONFIG_USB_LCD is not set
@@ -1735,7 +1922,13 @@ CONFIG_USB_LIBUSUAL=y · 11 unmodified lines
1735# CONFIG_USB_IOWARRIOR is not set1922# CONFIG_USB_IOWARRIOR is not set
1736# CONFIG_USB_TEST is not set1923# CONFIG_USB_TEST is not set
1737# CONFIG_USB_ISIGHTFW is not set1924# CONFIG_USB_ISIGHTFW is not set
1925# CONFIG_USB_VST is not set
1738# CONFIG_USB_GADGET is not set1926# CONFIG_USB_GADGET is not set
1927
1928#
1929# OTG and related infrastructure
1930#
1931# CONFIG_UWB is not set
1739# CONFIG_MMC is not set1932# CONFIG_MMC is not set
1740# CONFIG_MEMSTICK is not set1933# CONFIG_MEMSTICK is not set
1741CONFIG_NEW_LEDS=y1934CONFIG_NEW_LEDS=y
@@ -1744,6 +1937,7 @@ CONFIG_LEDS_CLASS=y · 2 unmodified lines
1744#1937#
1745# LED drivers1938# LED drivers
1746#1939#
1940# CONFIG_LEDS_ALIX2 is not set
1747# CONFIG_LEDS_PCA9532 is not set1941# CONFIG_LEDS_PCA9532 is not set
1748# CONFIG_LEDS_CLEVO_MAIL is not set1942# CONFIG_LEDS_CLEVO_MAIL is not set
1749# CONFIG_LEDS_PCA955X is not set1943# CONFIG_LEDS_PCA955X is not set
@@ -1754,6 +1948,7 @@ CONFIG_LEDS_CLASS=y · 4 unmodified lines
1754CONFIG_LEDS_TRIGGERS=y1948CONFIG_LEDS_TRIGGERS=y
1755# CONFIG_LEDS_TRIGGER_TIMER is not set1949# CONFIG_LEDS_TRIGGER_TIMER is not set
1756# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set1950# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
1951# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
1757# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set1952# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
1758# CONFIG_ACCESSIBILITY is not set1953# CONFIG_ACCESSIBILITY is not set
1759# CONFIG_INFINIBAND is not set1954# CONFIG_INFINIBAND is not set
@@ -1793,6 +1988,7 @@ CONFIG_RTC_INTF_DEV=y · 33 unmodified lines
1793# CONFIG_RTC_DRV_M41T80 is not set1988# CONFIG_RTC_DRV_M41T80 is not set
1794# CONFIG_RTC_DRV_S35390A is not set1989# CONFIG_RTC_DRV_S35390A is not set
1795# CONFIG_RTC_DRV_FM3130 is not set1990# CONFIG_RTC_DRV_FM3130 is not set
1991# CONFIG_RTC_DRV_RX8581 is not set
1796 1992
1797#1993#
1798# SPI RTC drivers1994# SPI RTC drivers
@@ -1802,12 +1998,15 @@ CONFIG_RTC_INTF_DEV=y · 3 unmodified lines
1802# Platform RTC drivers1998# Platform RTC drivers
1803#1999#
1804CONFIG_RTC_DRV_CMOS=y2000CONFIG_RTC_DRV_CMOS=y
2001# CONFIG_RTC_DRV_DS1286 is not set
1805# CONFIG_RTC_DRV_DS1511 is not set2002# CONFIG_RTC_DRV_DS1511 is not set
1806# CONFIG_RTC_DRV_DS1553 is not set2003# CONFIG_RTC_DRV_DS1553 is not set
1807# CONFIG_RTC_DRV_DS1742 is not set2004# CONFIG_RTC_DRV_DS1742 is not set
1808# CONFIG_RTC_DRV_STK17TA8 is not set2005# CONFIG_RTC_DRV_STK17TA8 is not set
1809# CONFIG_RTC_DRV_M48T86 is not set2006# CONFIG_RTC_DRV_M48T86 is not set
2007# CONFIG_RTC_DRV_M48T35 is not set
1810# CONFIG_RTC_DRV_M48T59 is not set2008# CONFIG_RTC_DRV_M48T59 is not set
2009# CONFIG_RTC_DRV_BQ4802 is not set
1811# CONFIG_RTC_DRV_V3020 is not set2010# CONFIG_RTC_DRV_V3020 is not set
1812 2011
1813#2012#
@@ -1820,6 +2019,21 @@ CONFIG_DMADEVICES=y · 6 unmodified lines
1820#2019#
1821# CONFIG_INTEL_IOATDMA is not set2020# CONFIG_INTEL_IOATDMA is not set
1822# CONFIG_UIO is not set2021# CONFIG_UIO is not set
2022# CONFIG_STAGING is not set
2023CONFIG_X86_PLATFORM_DEVICES=y
2024# CONFIG_ACER_WMI is not set
2025# CONFIG_ASUS_LAPTOP is not set
2026# CONFIG_FUJITSU_LAPTOP is not set
2027# CONFIG_MSI_LAPTOP is not set
2028# CONFIG_PANASONIC_LAPTOP is not set
2029# CONFIG_COMPAL_LAPTOP is not set
2030# CONFIG_SONY_LAPTOP is not set
2031# CONFIG_THINKPAD_ACPI is not set
2032# CONFIG_INTEL_MENLOW is not set
2033CONFIG_EEEPC_LAPTOP=y
2034# CONFIG_ACPI_WMI is not set
2035# CONFIG_ACPI_ASUS is not set
2036# CONFIG_ACPI_TOSHIBA is not set
1823 2037
1824#2038#
1825# Firmware Drivers2039# Firmware Drivers
@@ -1830,8 +2044,7 @@ CONFIG_EFI_VARS=y · 4 unmodified lines
1830# CONFIG_DELL_RBU is not set2044# CONFIG_DELL_RBU is not set
1831# CONFIG_DCDBAS is not set2045# CONFIG_DCDBAS is not set
1832CONFIG_DMIID=y2046CONFIG_DMIID=y
1833CONFIG_ISCSI_IBFT_FIND=y2047# CONFIG_ISCSI_IBFT_FIND is not set
1834CONFIG_ISCSI_IBFT=y
1835 2048
1836#2049#
1837# File systems2050# File systems
@@ -1841,22 +2054,25 @@ CONFIG_EXT3_FS=y · 3 unmodified lines
1841CONFIG_EXT3_FS_XATTR=y2054CONFIG_EXT3_FS_XATTR=y
1842CONFIG_EXT3_FS_POSIX_ACL=y2055CONFIG_EXT3_FS_POSIX_ACL=y
1843CONFIG_EXT3_FS_SECURITY=y2056CONFIG_EXT3_FS_SECURITY=y
1844# CONFIG_EXT4DEV_FS is not set2057# CONFIG_EXT4_FS is not set
1845CONFIG_JBD=y2058CONFIG_JBD=y
1846# CONFIG_JBD_DEBUG is not set2059# CONFIG_JBD_DEBUG is not set
1847CONFIG_FS_MBCACHE=y2060CONFIG_FS_MBCACHE=y
1848# CONFIG_REISERFS_FS is not set2061# CONFIG_REISERFS_FS is not set
1849# CONFIG_JFS_FS is not set2062# CONFIG_JFS_FS is not set
1850CONFIG_FS_POSIX_ACL=y2063CONFIG_FS_POSIX_ACL=y
2064CONFIG_FILE_LOCKING=y
1851# CONFIG_XFS_FS is not set2065# CONFIG_XFS_FS is not set
1852# CONFIG_GFS2_FS is not set2066# CONFIG_GFS2_FS is not set
1853# CONFIG_OCFS2_FS is not set2067# CONFIG_OCFS2_FS is not set
2068# CONFIG_BTRFS_FS is not set
1854CONFIG_DNOTIFY=y2069CONFIG_DNOTIFY=y
1855CONFIG_INOTIFY=y2070CONFIG_INOTIFY=y
1856CONFIG_INOTIFY_USER=y2071CONFIG_INOTIFY_USER=y
1857CONFIG_QUOTA=y2072CONFIG_QUOTA=y
1858CONFIG_QUOTA_NETLINK_INTERFACE=y2073CONFIG_QUOTA_NETLINK_INTERFACE=y
1859# CONFIG_PRINT_QUOTA_WARNING is not set2074# CONFIG_PRINT_QUOTA_WARNING is not set
2075CONFIG_QUOTA_TREE=y
1860# CONFIG_QFMT_V1 is not set2076# CONFIG_QFMT_V1 is not set
1861CONFIG_QFMT_V2=y2077CONFIG_QFMT_V2=y
1862CONFIG_QUOTACTL=y2078CONFIG_QUOTACTL=y
@@ -1890,16 +2106,14 @@ CONFIG_PROC_FS=y · 27 unmodified lines
1890CONFIG_PROC_KCORE=y2106CONFIG_PROC_KCORE=y
1891CONFIG_PROC_VMCORE=y2107CONFIG_PROC_VMCORE=y
1892CONFIG_PROC_SYSCTL=y2108CONFIG_PROC_SYSCTL=y
2109CONFIG_PROC_PAGE_MONITOR=y
1893CONFIG_SYSFS=y2110CONFIG_SYSFS=y
1894CONFIG_TMPFS=y2111CONFIG_TMPFS=y
1895CONFIG_TMPFS_POSIX_ACL=y2112CONFIG_TMPFS_POSIX_ACL=y
1896CONFIG_HUGETLBFS=y2113CONFIG_HUGETLBFS=y
1897CONFIG_HUGETLB_PAGE=y2114CONFIG_HUGETLB_PAGE=y
1898# CONFIG_CONFIGFS_FS is not set2115# CONFIG_CONFIGFS_FS is not set
1899 2116CONFIG_MISC_FILESYSTEMS=y
1900#
1901# Miscellaneous filesystems
1902#
1903# CONFIG_ADFS_FS is not set2117# CONFIG_ADFS_FS is not set
1904# CONFIG_AFFS_FS is not set2118# CONFIG_AFFS_FS is not set
1905# CONFIG_ECRYPT_FS is not set2119# CONFIG_ECRYPT_FS is not set
@@ -1909,6 +2123,7 @@ CONFIG_HUGETLB_PAGE=y · 3 unmodified lines
1909# CONFIG_BFS_FS is not set2123# CONFIG_BFS_FS is not set
1910# CONFIG_EFS_FS is not set2124# CONFIG_EFS_FS is not set
1911# CONFIG_CRAMFS is not set2125# CONFIG_CRAMFS is not set
2126# CONFIG_SQUASHFS is not set
1912# CONFIG_VXFS_FS is not set2127# CONFIG_VXFS_FS is not set
1913# CONFIG_MINIX_FS is not set2128# CONFIG_MINIX_FS is not set
1914# CONFIG_OMFS_FS is not set2129# CONFIG_OMFS_FS is not set
@@ -1930,6 +2145,7 @@ CONFIG_NFS_ACL_SUPPORT=y · 15 unmodified lines
1930CONFIG_NFS_COMMON=y2145CONFIG_NFS_COMMON=y
1931CONFIG_SUNRPC=y2146CONFIG_SUNRPC=y
1932CONFIG_SUNRPC_GSS=y2147CONFIG_SUNRPC_GSS=y
2148# CONFIG_SUNRPC_REGISTER_V4 is not set
1933CONFIG_RPCSEC_GSS_KRB5=y2149CONFIG_RPCSEC_GSS_KRB5=y
1934# CONFIG_RPCSEC_GSS_SPKM3 is not set2150# CONFIG_RPCSEC_GSS_SPKM3 is not set
1935# CONFIG_SMB_FS is not set2151# CONFIG_SMB_FS is not set
@@ -2006,7 +2222,7 @@ CONFIG_NLS_UTF8=y · 70 unmodified lines
2006#2222#
2007CONFIG_TRACE_IRQFLAGS_SUPPORT=y2223CONFIG_TRACE_IRQFLAGS_SUPPORT=y
2008CONFIG_PRINTK_TIME=y2224CONFIG_PRINTK_TIME=y
2009CONFIG_ENABLE_WARN_DEPRECATED=y2225# CONFIG_ENABLE_WARN_DEPRECATED is not set
2010CONFIG_ENABLE_MUST_CHECK=y2226CONFIG_ENABLE_MUST_CHECK=y
2011CONFIG_FRAME_WARN=20482227CONFIG_FRAME_WARN=2048
2012CONFIG_MAGIC_SYSRQ=y2228CONFIG_MAGIC_SYSRQ=y
@@ -2035,40 +2251,60 @@ CONFIG_TIMER_STATS=y · 22 unmodified lines
2035CONFIG_DEBUG_BUGVERBOSE=y2251CONFIG_DEBUG_BUGVERBOSE=y
2036# CONFIG_DEBUG_INFO is not set2252# CONFIG_DEBUG_INFO is not set
2037# CONFIG_DEBUG_VM is not set2253# CONFIG_DEBUG_VM is not set
2254# CONFIG_DEBUG_VIRTUAL is not set
2038# CONFIG_DEBUG_WRITECOUNT is not set2255# CONFIG_DEBUG_WRITECOUNT is not set
2039CONFIG_DEBUG_MEMORY_INIT=y2256CONFIG_DEBUG_MEMORY_INIT=y
2040# CONFIG_DEBUG_LIST is not set2257# CONFIG_DEBUG_LIST is not set
2041# CONFIG_DEBUG_SG is not set2258# CONFIG_DEBUG_SG is not set
2259# CONFIG_DEBUG_NOTIFIERS is not set
2260CONFIG_ARCH_WANT_FRAME_POINTERS=y
2042CONFIG_FRAME_POINTER=y2261CONFIG_FRAME_POINTER=y
2043# CONFIG_BOOT_PRINTK_DELAY is not set2262# CONFIG_BOOT_PRINTK_DELAY is not set
2044# CONFIG_RCU_TORTURE_TEST is not set2263# CONFIG_RCU_TORTURE_TEST is not set
2264# CONFIG_RCU_CPU_STALL_DETECTOR is not set
2045# CONFIG_KPROBES_SANITY_TEST is not set2265# CONFIG_KPROBES_SANITY_TEST is not set
2046# CONFIG_BACKTRACE_SELF_TEST is not set2266# CONFIG_BACKTRACE_SELF_TEST is not set
2267# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
2047# CONFIG_LKDTM is not set2268# CONFIG_LKDTM is not set
2048# CONFIG_FAULT_INJECTION is not set2269# CONFIG_FAULT_INJECTION is not set
2049# CONFIG_LATENCYTOP is not set2270# CONFIG_LATENCYTOP is not set
2050CONFIG_SYSCTL_SYSCALL_CHECK=y2271CONFIG_SYSCTL_SYSCALL_CHECK=y
2051CONFIG_HAVE_FTRACE=y2272CONFIG_USER_STACKTRACE_SUPPORT=y
2273CONFIG_HAVE_FUNCTION_TRACER=y
2274CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
2275CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
2052CONFIG_HAVE_DYNAMIC_FTRACE=y2276CONFIG_HAVE_DYNAMIC_FTRACE=y
2053# CONFIG_FTRACE is not set2277CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
2278CONFIG_HAVE_HW_BRANCH_TRACER=y
2279
2280#
2281# Tracers
2282#
2283# CONFIG_FUNCTION_TRACER is not set
2054# CONFIG_IRQSOFF_TRACER is not set2284# CONFIG_IRQSOFF_TRACER is not set
2055# CONFIG_SYSPROF_TRACER is not set2285# CONFIG_SYSPROF_TRACER is not set
2056# CONFIG_SCHED_TRACER is not set2286# CONFIG_SCHED_TRACER is not set
2057# CONFIG_CONTEXT_SWITCH_TRACER is not set2287# CONFIG_CONTEXT_SWITCH_TRACER is not set
2288# CONFIG_BOOT_TRACER is not set
2289# CONFIG_TRACE_BRANCH_PROFILING is not set
2290# CONFIG_POWER_TRACER is not set
2291# CONFIG_STACK_TRACER is not set
2292# CONFIG_HW_BRANCH_TRACER is not set
2058CONFIG_PROVIDE_OHCI1394_DMA_INIT=y2293CONFIG_PROVIDE_OHCI1394_DMA_INIT=y
2294# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
2059# CONFIG_SAMPLES is not set2295# CONFIG_SAMPLES is not set
2060CONFIG_HAVE_ARCH_KGDB=y2296CONFIG_HAVE_ARCH_KGDB=y
2061# CONFIG_KGDB is not set2297# CONFIG_KGDB is not set
2062# CONFIG_STRICT_DEVMEM is not set2298# CONFIG_STRICT_DEVMEM is not set
2063CONFIG_X86_VERBOSE_BOOTUP=y2299CONFIG_X86_VERBOSE_BOOTUP=y
2064CONFIG_EARLY_PRINTK=y2300CONFIG_EARLY_PRINTK=y
2301CONFIG_EARLY_PRINTK_DBGP=y
2065CONFIG_DEBUG_STACKOVERFLOW=y2302CONFIG_DEBUG_STACKOVERFLOW=y
2066CONFIG_DEBUG_STACK_USAGE=y2303CONFIG_DEBUG_STACK_USAGE=y
2067# CONFIG_DEBUG_PAGEALLOC is not set2304# CONFIG_DEBUG_PAGEALLOC is not set
2068# CONFIG_DEBUG_PER_CPU_MAPS is not set2305# CONFIG_DEBUG_PER_CPU_MAPS is not set
2069# CONFIG_X86_PTDUMP is not set2306# CONFIG_X86_PTDUMP is not set
2070CONFIG_DEBUG_RODATA=y2307CONFIG_DEBUG_RODATA=y
2071# CONFIG_DIRECT_GBPAGES is not set
2072# CONFIG_DEBUG_RODATA_TEST is not set2308# CONFIG_DEBUG_RODATA_TEST is not set
2073CONFIG_DEBUG_NX_TEST=m2309CONFIG_DEBUG_NX_TEST=m
2074# CONFIG_IOMMU_DEBUG is not set2310# CONFIG_IOMMU_DEBUG is not set
@@ -2092,8 +2328,10 @@ CONFIG_OPTIMIZE_INLINING=y · 17 unmodified lines
2092CONFIG_KEYS=y2328CONFIG_KEYS=y
2093CONFIG_KEYS_DEBUG_PROC_KEYS=y2329CONFIG_KEYS_DEBUG_PROC_KEYS=y
2094CONFIG_SECURITY=y2330CONFIG_SECURITY=y
2331# CONFIG_SECURITYFS is not set
2095CONFIG_SECURITY_NETWORK=y2332CONFIG_SECURITY_NETWORK=y
2096# CONFIG_SECURITY_NETWORK_XFRM is not set2333# CONFIG_SECURITY_NETWORK_XFRM is not set
2334# CONFIG_SECURITY_PATH is not set
2097CONFIG_SECURITY_FILE_CAPABILITIES=y2335CONFIG_SECURITY_FILE_CAPABILITIES=y
2098# CONFIG_SECURITY_ROOTPLUG is not set2336# CONFIG_SECURITY_ROOTPLUG is not set
2099CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=655362337CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=65536
@@ -2104,7 +2342,6 @@ CONFIG_SECURITY_SELINUX_DISABLE=y · 4 unmodified lines
2104CONFIG_SECURITY_SELINUX_DEVELOP=y2342CONFIG_SECURITY_SELINUX_DEVELOP=y
2105CONFIG_SECURITY_SELINUX_AVC_STATS=y2343CONFIG_SECURITY_SELINUX_AVC_STATS=y
2106CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=12344CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1
2107# CONFIG_SECURITY_SELINUX_ENABLE_SECMARK_DEFAULT is not set
2108# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set2345# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set
2109# CONFIG_SECURITY_SMACK is not set2346# CONFIG_SECURITY_SMACK is not set
2110CONFIG_CRYPTO=y2347CONFIG_CRYPTO=y
@@ -2112,11 +2349,18 @@ CONFIG_CRYPTO=y · 1 unmodified line
2112#2349#
2113# Crypto core or helper2350# Crypto core or helper
2114#2351#
2352# CONFIG_CRYPTO_FIPS is not set
2115CONFIG_CRYPTO_ALGAPI=y2353CONFIG_CRYPTO_ALGAPI=y
2354CONFIG_CRYPTO_ALGAPI2=y
2116CONFIG_CRYPTO_AEAD=y2355CONFIG_CRYPTO_AEAD=y
2356CONFIG_CRYPTO_AEAD2=y
2117CONFIG_CRYPTO_BLKCIPHER=y2357CONFIG_CRYPTO_BLKCIPHER=y
2358CONFIG_CRYPTO_BLKCIPHER2=y
2118CONFIG_CRYPTO_HASH=y2359CONFIG_CRYPTO_HASH=y
2360CONFIG_CRYPTO_HASH2=y
2361CONFIG_CRYPTO_RNG2=y
2119CONFIG_CRYPTO_MANAGER=y2362CONFIG_CRYPTO_MANAGER=y
2363CONFIG_CRYPTO_MANAGER2=y
2120# CONFIG_CRYPTO_GF128MUL is not set2364# CONFIG_CRYPTO_GF128MUL is not set
2121# CONFIG_CRYPTO_NULL is not set2365# CONFIG_CRYPTO_NULL is not set
2122# CONFIG_CRYPTO_CRYPTD is not set2366# CONFIG_CRYPTO_CRYPTD is not set
@@ -2151,6 +2395,7 @@ CONFIG_CRYPTO_HMAC=y · 28 unmodified lines
2151# Digest2395# Digest
2152#2396#
2153# CONFIG_CRYPTO_CRC32C is not set2397# CONFIG_CRYPTO_CRC32C is not set
2398# CONFIG_CRYPTO_CRC32C_INTEL is not set
2154# CONFIG_CRYPTO_MD4 is not set2399# CONFIG_CRYPTO_MD4 is not set
2155CONFIG_CRYPTO_MD5=y2400CONFIG_CRYPTO_MD5=y
2156# CONFIG_CRYPTO_MICHAEL_MIC is not set2401# CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -2191,6 +2436,11 @@ CONFIG_CRYPTO_DES=y · 34 unmodified lines
2191#2436#
2192# CONFIG_CRYPTO_DEFLATE is not set2437# CONFIG_CRYPTO_DEFLATE is not set
2193# CONFIG_CRYPTO_LZO is not set2438# CONFIG_CRYPTO_LZO is not set
2439
2440#
2441# Random Number Generation
2442#
2443# CONFIG_CRYPTO_ANSI_CPRNG is not set
2194CONFIG_CRYPTO_HW=y2444CONFIG_CRYPTO_HW=y
2195# CONFIG_CRYPTO_DEV_HIFN_795X is not set2445# CONFIG_CRYPTO_DEV_HIFN_795X is not set
2196CONFIG_HAVE_KVM=y2446CONFIG_HAVE_KVM=y
@@ -2205,6 +2455,7 @@ CONFIG_VIRTUALIZATION=y · 8 unmodified lines
2205CONFIG_BITREVERSE=y2455CONFIG_BITREVERSE=y
2206CONFIG_GENERIC_FIND_FIRST_BIT=y2456CONFIG_GENERIC_FIND_FIRST_BIT=y
2207CONFIG_GENERIC_FIND_NEXT_BIT=y2457CONFIG_GENERIC_FIND_NEXT_BIT=y
2458CONFIG_GENERIC_FIND_LAST_BIT=y
2208# CONFIG_CRC_CCITT is not set2459# CONFIG_CRC_CCITT is not set
2209# CONFIG_CRC16 is not set2460# CONFIG_CRC16 is not set
2210CONFIG_CRC_T10DIF=y2461CONFIG_CRC_T10DIF=y
arch/x86/ia32/ia32_signal.c+207−198
@@ -33,8 +33,6 @@ · 32 unmodified lines
33#include <asm/sigframe.h>33#include <asm/sigframe.h>
34#include <asm/sys_ia32.h>34#include <asm/sys_ia32.h>
35 35
36#define DEBUG_SIG 0
37
38#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))36#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
39 37
40#define FIX_EFLAGS (X86_EFLAGS_AC | X86_EFLAGS_OF | \38#define FIX_EFLAGS (X86_EFLAGS_AC | X86_EFLAGS_OF | \
@@ -46,78 +44,83 @@ void signal_fault(struct pt_regs *regs, void __user *frame, char *where); · 5 unmodified lines
46 44
47int copy_siginfo_to_user32(compat_siginfo_t __user *to, siginfo_t *from)45int copy_siginfo_to_user32(compat_siginfo_t __user *to, siginfo_t *from)
48{46{
49 int err;47 int err = 0;
50 48
51 if (!access_ok(VERIFY_WRITE, to, sizeof(compat_siginfo_t)))49 if (!access_ok(VERIFY_WRITE, to, sizeof(compat_siginfo_t)))
52 return -EFAULT;50 return -EFAULT;
53 51
54 /* If you change siginfo_t structure, please make sure that52 put_user_try {
55 this code is fixed accordingly.53 /* If you change siginfo_t structure, please make sure that
56 It should never copy any pad contained in the structure54 this code is fixed accordingly.
57 to avoid security leaks, but must copy the generic55 It should never copy any pad contained in the structure
58 3 ints plus the relevant union member. */56 to avoid security leaks, but must copy the generic
59 err = __put_user(from->si_signo, &to->si_signo);57 3 ints plus the relevant union member. */
60 err |= __put_user(from->si_errno, &to->si_errno);58 put_user_ex(from->si_signo, &to->si_signo);
61 err |= __put_user((short)from->si_code, &to->si_code);59 put_user_ex(from->si_errno, &to->si_errno);
62 60 put_user_ex((short)from->si_code, &to->si_code);
63 if (from->si_code < 0) {61
64 err |= __put_user(from->si_pid, &to->si_pid);62 if (from->si_code < 0) {
65 err |= __put_user(from->si_uid, &to->si_uid);63 put_user_ex(from->si_pid, &to->si_pid);
66 err |= __put_user(ptr_to_compat(from->si_ptr), &to->si_ptr);64 put_user_ex(from->si_uid, &to->si_uid);
67 } else {65 put_user_ex(ptr_to_compat(from->si_ptr), &to->si_ptr);
68 /*66 } else {
69 * First 32bits of unions are always present:67 /*
70 * si_pid === si_band === si_tid === si_addr(LS half)68 * First 32bits of unions are always present:
71 */69 * si_pid === si_band === si_tid === si_addr(LS half)
72 err |= __put_user(from->_sifields._pad[0],70 */
73 &to->_sifields._pad[0]);71 put_user_ex(from->_sifields._pad[0],
74 switch (from->si_code >> 16) {72 &to->_sifields._pad[0]);
75 case __SI_FAULT >> 16:73 switch (from->si_code >> 16) {
76 break;74 case __SI_FAULT >> 16:
77 case __SI_CHLD >> 16:75 break;
78 err |= __put_user(from->si_utime, &to->si_utime);76 case __SI_CHLD >> 16:
79 err |= __put_user(from->si_stime, &to->si_stime);77 put_user_ex(from->si_utime, &to->si_utime);
80 err |= __put_user(from->si_status, &to->si_status);78 put_user_ex(from->si_stime, &to->si_stime);
81 /* FALL THROUGH */79 put_user_ex(from->si_status, &to->si_status);
82 default:80 /* FALL THROUGH */
83 case __SI_KILL >> 16:81 default:
84 err |= __put_user(from->si_uid, &to->si_uid);82 case __SI_KILL >> 16:
85 break;83 put_user_ex(from->si_uid, &to->si_uid);
86 case __SI_POLL >> 16:84 break;
87 err |= __put_user(from->si_fd, &to->si_fd);85 case __SI_POLL >> 16:
88 break;86 put_user_ex(from->si_fd, &to->si_fd);
89 case __SI_TIMER >> 16:87 break;
90 err |= __put_user(from->si_overrun, &to->si_overrun);88 case __SI_TIMER >> 16:
91 err |= __put_user(ptr_to_compat(from->si_ptr),89 put_user_ex(from->si_overrun, &to->si_overrun);
92 &to->si_ptr);90 put_user_ex(ptr_to_compat(from->si_ptr),
93 break;91 &to->si_ptr);
94 /* This is not generated by the kernel as of now. */92 break;
95 case __SI_RT >> 16:93 /* This is not generated by the kernel as of now. */
96 case __SI_MESGQ >> 16:94 case __SI_RT >> 16:
97 err |= __put_user(from->si_uid, &to->si_uid);95 case __SI_MESGQ >> 16:
98 err |= __put_user(from->si_int, &to->si_int);96 put_user_ex(from->si_uid, &to->si_uid);
99 break;97 put_user_ex(from->si_int, &to->si_int);
98 break;
99 }
100 }100 }
101 }101 } put_user_catch(err);
102
102 return err;103 return err;
103}104}
104 105
105int copy_siginfo_from_user32(siginfo_t *to, compat_siginfo_t __user *from)106int copy_siginfo_from_user32(siginfo_t *to, compat_siginfo_t __user *from)
106{107{
107 int err;108 int err = 0;
108 u32 ptr32;109 u32 ptr32;
109 110
110 if (!access_ok(VERIFY_READ, from, sizeof(compat_siginfo_t)))111 if (!access_ok(VERIFY_READ, from, sizeof(compat_siginfo_t)))
111 return -EFAULT;112 return -EFAULT;
112 113
113 err = __get_user(to->si_signo, &from->si_signo);114 get_user_try {
114 err |= __get_user(to->si_errno, &from->si_errno);115 get_user_ex(to->si_signo, &from->si_signo);
115 err |= __get_user(to->si_code, &from->si_code);116 get_user_ex(to->si_errno, &from->si_errno);
117 get_user_ex(to->si_code, &from->si_code);
116 118
117 err |= __get_user(to->si_pid, &from->si_pid);119 get_user_ex(to->si_pid, &from->si_pid);
118 err |= __get_user(to->si_uid, &from->si_uid);120 get_user_ex(to->si_uid, &from->si_uid);
119 err |= __get_user(ptr32, &from->si_ptr);121 get_user_ex(ptr32, &from->si_ptr);
120 to->si_ptr = compat_ptr(ptr32);122 to->si_ptr = compat_ptr(ptr32);
123 } get_user_catch(err);
121 124
122 return err;125 return err;
123}126}
@@ -142,17 +145,23 @@ asmlinkage long sys32_sigaltstack(const stack_ia32_t __user *uss_ptr, · 18 unmodified lines
142 struct pt_regs *regs)145 struct pt_regs *regs)
143{146{
144 stack_t uss, uoss;147 stack_t uss, uoss;
145 int ret;148 int ret, err = 0;
146 mm_segment_t seg;149 mm_segment_t seg;
147 150
148 if (uss_ptr) {151 if (uss_ptr) {
149 u32 ptr;152 u32 ptr;
150 153
151 memset(&uss, 0, sizeof(stack_t));154 memset(&uss, 0, sizeof(stack_t));
152 if (!access_ok(VERIFY_READ, uss_ptr, sizeof(stack_ia32_t)) ||155 if (!access_ok(VERIFY_READ, uss_ptr, sizeof(stack_ia32_t)))
153 __get_user(ptr, &uss_ptr->ss_sp) ||156 return -EFAULT;
154 __get_user(uss.ss_flags, &uss_ptr->ss_flags) ||157
155 __get_user(uss.ss_size, &uss_ptr->ss_size))158 get_user_try {
159 get_user_ex(ptr, &uss_ptr->ss_sp);
160 get_user_ex(uss.ss_flags, &uss_ptr->ss_flags);
161 get_user_ex(uss.ss_size, &uss_ptr->ss_size);
162 } get_user_catch(err);
163
164 if (err)
156 return -EFAULT;165 return -EFAULT;
157 uss.ss_sp = compat_ptr(ptr);166 uss.ss_sp = compat_ptr(ptr);
158 }167 }
@@ -161,10 +170,16 @@ asmlinkage long sys32_sigaltstack(const stack_ia32_t __user *uss_ptr, · 2 unmodified lines
161 ret = do_sigaltstack(uss_ptr ? &uss : NULL, &uoss, regs->sp);170 ret = do_sigaltstack(uss_ptr ? &uss : NULL, &uoss, regs->sp);
162 set_fs(seg);171 set_fs(seg);
163 if (ret >= 0 && uoss_ptr) {172 if (ret >= 0 && uoss_ptr) {
164 if (!access_ok(VERIFY_WRITE, uoss_ptr, sizeof(stack_ia32_t)) ||173 if (!access_ok(VERIFY_WRITE, uoss_ptr, sizeof(stack_ia32_t)))
165 __put_user(ptr_to_compat(uoss.ss_sp), &uoss_ptr->ss_sp) ||174 return -EFAULT;
166 __put_user(uoss.ss_flags, &uoss_ptr->ss_flags) ||175
167 __put_user(uoss.ss_size, &uoss_ptr->ss_size))176 put_user_try {
177 put_user_ex(ptr_to_compat(uoss.ss_sp), &uoss_ptr->ss_sp);
178 put_user_ex(uoss.ss_flags, &uoss_ptr->ss_flags);
179 put_user_ex(uoss.ss_size, &uoss_ptr->ss_size);
180 } put_user_catch(err);
181
182 if (err)
168 ret = -EFAULT;183 ret = -EFAULT;
169 }184 }
170 return ret;185 return ret;
@@ -173,75 +188,78 @@ asmlinkage long sys32_sigaltstack(const stack_ia32_t __user *uss_ptr, · 2 unmodified lines
173/*188/*
174 * Do a signal return; undo the signal stack.189 * Do a signal return; undo the signal stack.
175 */190 */
191#define loadsegment_gs(v) load_gs_index(v)
192#define loadsegment_fs(v) loadsegment(fs, v)
193#define loadsegment_ds(v) loadsegment(ds, v)
194#define loadsegment_es(v) loadsegment(es, v)
195
196#define get_user_seg(seg) ({ unsigned int v; savesegment(seg, v); v; })
197#define set_user_seg(seg, v) loadsegment_##seg(v)
198
176#define COPY(x) { \199#define COPY(x) { \
177 err |= __get_user(regs->x, &sc->x); \200 get_user_ex(regs->x, &sc->x); \
178}201}
179 202
180#define COPY_SEG_CPL3(seg) { \203#define GET_SEG(seg) ({ \
181 unsigned short tmp; \204 unsigned short tmp; \
182 err |= __get_user(tmp, &sc->seg); \205 get_user_ex(tmp, &sc->seg); \
183 regs->seg = tmp | 3; \206 tmp; \
184}207})
208
209#define COPY_SEG_CPL3(seg) do { \
210 regs->seg = GET_SEG(seg) | 3; \
211} while (0)
185 212
186#define RELOAD_SEG(seg) { \213#define RELOAD_SEG(seg) { \
187 unsigned int cur, pre; \214 unsigned int pre = GET_SEG(seg); \
188 err |= __get_user(pre, &sc->seg); \215 unsigned int cur = get_user_seg(seg); \
189 savesegment(seg, cur); \
190 pre |= 3; \216 pre |= 3; \
191 if (pre != cur) \217 if (pre != cur) \
192 loadsegment(seg, pre); \218 set_user_seg(seg, pre); \
193}219}
194 220
195static int ia32_restore_sigcontext(struct pt_regs *regs,221static int ia32_restore_sigcontext(struct pt_regs *regs,
196 struct sigcontext_ia32 __user *sc,222 struct sigcontext_ia32 __user *sc,
197 unsigned int *pax)223 unsigned int *pax)
198{224{
199 unsigned int tmpflags, gs, oldgs, err = 0;225 unsigned int tmpflags, err = 0;
200 void __user *buf;226 void __user *buf;
201 u32 tmp;227 u32 tmp;
202 228
203 /* Always make any pending restarted system calls return -EINTR */229 /* Always make any pending restarted system calls return -EINTR */
204 current_thread_info()->restart_block.fn = do_no_restart_syscall;230 current_thread_info()->restart_block.fn = do_no_restart_syscall;
205 231
206#if DEBUG_SIG232 get_user_try {
207 printk(KERN_DEBUG "SIG restore_sigcontext: "233 /*
208 "sc=%p err(%x) eip(%x) cs(%x) flg(%x)\n",234 * Reload fs and gs if they have changed in the signal
209 sc, sc->err, sc->ip, sc->cs, sc->flags);235 * handler. This does not handle long fs/gs base changes in
210#endif236 * the handler, but does not clobber them at least in the
211 237 * normal case.
212 /*238 */
213 * Reload fs and gs if they have changed in the signal239 RELOAD_SEG(gs);
214 * handler. This does not handle long fs/gs base changes in240 RELOAD_SEG(fs);
215 * the handler, but does not clobber them at least in the241 RELOAD_SEG(ds);
216 * normal case.242 RELOAD_SEG(es);
217 */243
218 err |= __get_user(gs, &sc->gs);244 COPY(di); COPY(si); COPY(bp); COPY(sp); COPY(bx);
219 gs |= 3;245 COPY(dx); COPY(cx); COPY(ip);
220 savesegment(gs, oldgs);246 /* Don't touch extended registers */
221 if (gs != oldgs)247
222 load_gs_index(gs);248 COPY_SEG_CPL3(cs);
223 249 COPY_SEG_CPL3(ss);
224 RELOAD_SEG(fs);250
225 RELOAD_SEG(ds);251 get_user_ex(tmpflags, &sc->flags);
226 RELOAD_SEG(es);252 regs->flags = (regs->flags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS);
227 253 /* disable syscall checks */
228 COPY(di); COPY(si); COPY(bp); COPY(sp); COPY(bx);254 regs->orig_ax = -1;
229 COPY(dx); COPY(cx); COPY(ip);255
230 /* Don't touch extended registers */256 get_user_ex(tmp, &sc->fpstate);
231 257 buf = compat_ptr(tmp);
232 COPY_SEG_CPL3(cs);258 err |= restore_i387_xstate_ia32(buf);
233 COPY_SEG_CPL3(ss);259
234 260 get_user_ex(*pax, &sc->ax);
235 err |= __get_user(tmpflags, &sc->flags);261 } get_user_catch(err);
236 regs->flags = (regs->flags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS);262
237 /* disable syscall checks */
238 regs->orig_ax = -1;
239
240 err |= __get_user(tmp, &sc->fpstate);
241 buf = compat_ptr(tmp);
242 err |= restore_i387_xstate_ia32(buf);
243
244 err |= __get_user(*pax, &sc->ax);
245 return err;263 return err;
246}264}
247 265
@@ -317,38 +335,36 @@ static int ia32_setup_sigcontext(struct sigcontext_ia32 __user *sc, · 69 unmodified lines
317 void __user *fpstate,335 void __user *fpstate,
318 struct pt_regs *regs, unsigned int mask)336 struct pt_regs *regs, unsigned int mask)
319{337{
320 int tmp, err = 0;338 int err = 0;
321 339
322 savesegment(gs, tmp);340 put_user_try {
323 err |= __put_user(tmp, (unsigned int __user *)&sc->gs);341 put_user_ex(get_user_seg(gs), (unsigned int __user *)&sc->gs);
324 savesegment(fs, tmp);342 put_user_ex(get_user_seg(fs), (unsigned int __user *)&sc->fs);
325 err |= __put_user(tmp, (unsigned int __user *)&sc->fs);343 put_user_ex(get_user_seg(ds), (unsigned int __user *)&sc->ds);
326 savesegment(ds, tmp);344 put_user_ex(get_user_seg(es), (unsigned int __user *)&sc->es);
327 err |= __put_user(tmp, (unsigned int __user *)&sc->ds);345
328 savesegment(es, tmp);346 put_user_ex(regs->di, &sc->di);
329 err |= __put_user(tmp, (unsigned int __user *)&sc->es);347 put_user_ex(regs->si, &sc->si);
330 348 put_user_ex(regs->bp, &sc->bp);
331 err |= __put_user(regs->di, &sc->di);349 put_user_ex(regs->sp, &sc->sp);
332 err |= __put_user(regs->si, &sc->si);350 put_user_ex(regs->bx, &sc->bx);
333 err |= __put_user(regs->bp, &sc->bp);351 put_user_ex(regs->dx, &sc->dx);
334 err |= __put_user(regs->sp, &sc->sp);352 put_user_ex(regs->cx, &sc->cx);
335 err |= __put_user(regs->bx, &sc->bx);353 put_user_ex(regs->ax, &sc->ax);
336 err |= __put_user(regs->dx, &sc->dx);354 put_user_ex(current->thread.trap_no, &sc->trapno);
337 err |= __put_user(regs->cx, &sc->cx);355 put_user_ex(current->thread.error_code, &sc->err);
338 err |= __put_user(regs->ax, &sc->ax);356 put_user_ex(regs->ip, &sc->ip);
339 err |= __put_user(current->thread.trap_no, &sc->trapno);357 put_user_ex(regs->cs, (unsigned int __user *)&sc->cs);
340 err |= __put_user(current->thread.error_code, &sc->err);358 put_user_ex(regs->flags, &sc->flags);
341 err |= __put_user(regs->ip, &sc->ip);359 put_user_ex(regs->sp, &sc->sp_at_signal);
342 err |= __put_user(regs->cs, (unsigned int __user *)&sc->cs);360 put_user_ex(regs->ss, (unsigned int __user *)&sc->ss);
343 err |= __put_user(regs->flags, &sc->flags);361
344 err |= __put_user(regs->sp, &sc->sp_at_signal);362 put_user_ex(ptr_to_compat(fpstate), &sc->fpstate);
345 err |= __put_user(regs->ss, (unsigned int __user *)&sc->ss);363
346 364 /* non-iBCS2 extensions.. */
347 err |= __put_user(ptr_to_compat(fpstate), &sc->fpstate);365 put_user_ex(mask, &sc->oldmask);
348 366 put_user_ex(current->thread.cr2, &sc->cr2);
349 /* non-iBCS2 extensions.. */367 } put_user_catch(err);
350 err |= __put_user(mask, &sc->oldmask);
351 err |= __put_user(current->thread.cr2, &sc->cr2);
352 368
353 return err;369 return err;
354}370}
@@ -437,13 +453,17 @@ int ia32_setup_frame(int sig, struct k_sigaction *ka, · 82 unmodified lines
437 else453 else
438 restorer = &frame->retcode;454 restorer = &frame->retcode;
439 }455 }
440 err |= __put_user(ptr_to_compat(restorer), &frame->pretcode);
441 456
442 /*457 put_user_try {
443 * These are actually not used anymore, but left because some458 put_user_ex(ptr_to_compat(restorer), &frame->pretcode);
444 * gdb versions depend on them as a marker.459
445 */460 /*
446 err |= __put_user(*((u64 *)&code), (u64 *)frame->retcode);461 * These are actually not used anymore, but left because some
462 * gdb versions depend on them as a marker.
463 */
464 put_user_ex(*((u64 *)&code), (u64 *)frame->retcode);
465 } put_user_catch(err);
466
447 if (err)467 if (err)
448 return -EFAULT;468 return -EFAULT;
449 469
@@ -462,11 +482,6 @@ int ia32_setup_frame(int sig, struct k_sigaction *ka, · 12 unmodified lines
462 regs->cs = __USER32_CS;482 regs->cs = __USER32_CS;
463 regs->ss = __USER32_DS;483 regs->ss = __USER32_DS;
464 484
465#if DEBUG_SIG
466 printk(KERN_DEBUG "SIG deliver (%s:%d): sp=%p pc=%lx ra=%u\n",
467 current->comm, current->pid, frame, regs->ip, frame->pretcode);
468#endif
469
470 return 0;485 return 0;
471}486}
472 487
@@ -496,41 +511,40 @@ int ia32_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, · 23 unmodified lines
496 if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))511 if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
497 return -EFAULT;512 return -EFAULT;
498 513
499 err |= __put_user(sig, &frame->sig);514 put_user_try {
500 err |= __put_user(ptr_to_compat(&frame->info), &frame->pinfo);515 put_user_ex(sig, &frame->sig);
501 err |= __put_user(ptr_to_compat(&frame->uc), &frame->puc);516 put_user_ex(ptr_to_compat(&frame->info), &frame->pinfo);
502 err |= copy_siginfo_to_user32(&frame->info, info);517 put_user_ex(ptr_to_compat(&frame->uc), &frame->puc);
503 if (err)518 err |= copy_siginfo_to_user32(&frame->info, info);
504 return -EFAULT;
505 519
506 /* Create the ucontext. */520 /* Create the ucontext. */
507 if (cpu_has_xsave)521 if (cpu_has_xsave)
508 err |= __put_user(UC_FP_XSTATE, &frame->uc.uc_flags);522 put_user_ex(UC_FP_XSTATE, &frame->uc.uc_flags);
509 else523 else
510 err |= __put_user(0, &frame->uc.uc_flags);524 put_user_ex(0, &frame->uc.uc_flags);
511 err |= __put_user(0, &frame->uc.uc_link);525 put_user_ex(0, &frame->uc.uc_link);
512 err |= __put_user(current->sas_ss_sp, &frame->uc.uc_stack.ss_sp);526 put_user_ex(current->sas_ss_sp, &frame->uc.uc_stack.ss_sp);
513 err |= __put_user(sas_ss_flags(regs->sp),527 put_user_ex(sas_ss_flags(regs->sp),
514 &frame->uc.uc_stack.ss_flags);528 &frame->uc.uc_stack.ss_flags);
515 err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size);529 put_user_ex(current->sas_ss_size, &frame->uc.uc_stack.ss_size);
516 err |= ia32_setup_sigcontext(&frame->uc.uc_mcontext, fpstate,530 err |= ia32_setup_sigcontext(&frame->uc.uc_mcontext, fpstate,
517 regs, set->sig[0]);531 regs, set->sig[0]);
518 err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));532 err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
519 if (err)533
520 return -EFAULT;534 if (ka->sa.sa_flags & SA_RESTORER)
535 restorer = ka->sa.sa_restorer;
536 else
537 restorer = VDSO32_SYMBOL(current->mm->context.vdso,
538 rt_sigreturn);
539 put_user_ex(ptr_to_compat(restorer), &frame->pretcode);
540
541 /*
542 * Not actually used anymore, but left because some gdb
543 * versions need it.
544 */
545 put_user_ex(*((u64 *)&code), (u64 *)frame->retcode);
546 } put_user_catch(err);
521 547
522 if (ka->sa.sa_flags & SA_RESTORER)
523 restorer = ka->sa.sa_restorer;
524 else
525 restorer = VDSO32_SYMBOL(current->mm->context.vdso,
526 rt_sigreturn);
527 err |= __put_user(ptr_to_compat(restorer), &frame->pretcode);
528
529 /*
530 * Not actually used anymore, but left because some gdb
531 * versions need it.
532 */
533 err |= __put_user(*((u64 *)&code), (u64 *)frame->retcode);
534 if (err)548 if (err)
535 return -EFAULT;549 return -EFAULT;
536 550
@@ -549,10 +563,5 @@ int ia32_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, · 12 unmodified lines
549 regs->cs = __USER32_CS;563 regs->cs = __USER32_CS;
550 regs->ss = __USER32_DS;564 regs->ss = __USER32_DS;
551 565
552#if DEBUG_SIG
553 printk(KERN_DEBUG "SIG deliver (%s:%d): sp=%p pc=%lx ra=%u\n",
554 current->comm, current->pid, frame, regs->ip, frame->pretcode);
555#endif
556
557 return 0;566 return 0;
558}567}
arch/x86/ia32/ia32entry.S+4−4
@@ -112,8 +112,8 @@ ENTRY(ia32_sysenter_target) · 111 unmodified lines
112 CFI_DEF_CFA rsp,0112 CFI_DEF_CFA rsp,0
113 CFI_REGISTER rsp,rbp113 CFI_REGISTER rsp,rbp
114 SWAPGS_UNSAFE_STACK114 SWAPGS_UNSAFE_STACK
115 movq %gs:pda_kernelstack, %rsp115 movq PER_CPU_VAR(kernel_stack), %rsp
116 addq $(PDA_STACKOFFSET),%rsp 116 addq $(KERNEL_STACK_OFFSET),%rsp
117 /*117 /*
118 * No need to follow this irqs on/off section: the syscall118 * No need to follow this irqs on/off section: the syscall
119 * disabled irqs, here we enable it straight after entry:119 * disabled irqs, here we enable it straight after entry:
@@ -273,13 +273,13 @@ ENDPROC(ia32_sysenter_target) · 153 unmodified lines
273ENTRY(ia32_cstar_target)273ENTRY(ia32_cstar_target)
274 CFI_STARTPROC32 simple274 CFI_STARTPROC32 simple
275 CFI_SIGNAL_FRAME275 CFI_SIGNAL_FRAME
276 CFI_DEF_CFA rsp,PDA_STACKOFFSET276 CFI_DEF_CFA rsp,KERNEL_STACK_OFFSET
277 CFI_REGISTER rip,rcx277 CFI_REGISTER rip,rcx
278 /*CFI_REGISTER rflags,r11*/278 /*CFI_REGISTER rflags,r11*/
279 SWAPGS_UNSAFE_STACK279 SWAPGS_UNSAFE_STACK
280 movl %esp,%r8d280 movl %esp,%r8d
281 CFI_REGISTER rsp,r8281 CFI_REGISTER rsp,r8
282 movq %gs:pda_kernelstack,%rsp282 movq PER_CPU_VAR(kernel_stack),%rsp
283 /*283 /*
284 * No need to follow this irqs on/off section: the syscall284 * No need to follow this irqs on/off section: the syscall
285 * disabled irqs and here we enable it straight after entry:285 * disabled irqs and here we enable it straight after entry:
arch/x86/include/asm/a.out-core.h+1−1
@@ -55,7 +55,7 @@ static inline void aout_dump_thread(struct pt_regs *regs, struct user *dump) · 54 unmodified lines
55 dump->regs.ds = (u16)regs->ds;55 dump->regs.ds = (u16)regs->ds;
56 dump->regs.es = (u16)regs->es;56 dump->regs.es = (u16)regs->es;
57 dump->regs.fs = (u16)regs->fs;57 dump->regs.fs = (u16)regs->fs;
58 savesegment(gs, dump->regs.gs);58 dump->regs.gs = get_user_gs(regs);
59 dump->regs.orig_ax = regs->orig_ax;59 dump->regs.orig_ax = regs->orig_ax;
60 dump->regs.ip = regs->ip;60 dump->regs.ip = regs->ip;
61 dump->regs.cs = (u16)regs->cs;61 dump->regs.cs = (u16)regs->cs;
arch/x86/include/asm/acpi.h+0−3
@@ -102,9 +102,6 @@ static inline void disable_acpi(void) · 101 unmodified lines
102 acpi_noirq = 1;102 acpi_noirq = 1;
103}103}
104 104
105/* Fixmap pages to reserve for ACPI boot-time tables (see fixmap.h) */
106#define FIX_ACPI_PAGES 4
107
108extern int acpi_gsi_to_irq(u32 gsi, unsigned int *irq);105extern int acpi_gsi_to_irq(u32 gsi, unsigned int *irq);
109 106
110static inline void acpi_noirq_set(void) { acpi_noirq = 1; }107static inline void acpi_noirq_set(void) { acpi_noirq = 1; }
arch/x86/include/asm/apic.h+404−38
@@ -1,15 +1,18 @@
1#ifndef _ASM_X86_APIC_H1#ifndef _ASM_X86_APIC_H
2#define _ASM_X86_APIC_H2#define _ASM_X86_APIC_H
3 3
4#include <linux/pm.h>4#include <linux/cpumask.h>
5#include <linux/delay.h>5#include <linux/delay.h>
6#include <linux/pm.h>
6 7
7#include <asm/alternative.h>8#include <asm/alternative.h>
8#include <asm/fixmap.h>9#include <asm/cpufeature.h>
9#include <asm/apicdef.h>
10#include <asm/processor.h>10#include <asm/processor.h>
11#include <asm/apicdef.h>
12#include <asm/atomic.h>
13#include <asm/fixmap.h>
14#include <asm/mpspec.h>
11#include <asm/system.h>15#include <asm/system.h>
12#include <asm/cpufeature.h>
13#include <asm/msr.h>16#include <asm/msr.h>
14 17
15#define ARCH_APICTIMER_STOPS_ON_C3 118#define ARCH_APICTIMER_STOPS_ON_C3 1
@@ -33,7 +36,13 @@ · 17 unmodified lines
33 } while (0)36 } while (0)
34 37
35 38
39#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
36extern void generic_apic_probe(void);40extern void generic_apic_probe(void);
41#else
42static inline void generic_apic_probe(void)
43{
44}
45#endif
37 46
38#ifdef CONFIG_X86_LOCAL_APIC47#ifdef CONFIG_X86_LOCAL_APIC
39 48
@@ -41,6 +50,21 @@ extern unsigned int apic_verbosity; · 1 unmodified line
41extern int local_apic_timer_c2_ok;50extern int local_apic_timer_c2_ok;
42 51
43extern int disable_apic;52extern int disable_apic;
53
54#ifdef CONFIG_SMP
55extern void __inquire_remote_apic(int apicid);
56#else /* CONFIG_SMP */
57static inline void __inquire_remote_apic(int apicid)
58{
59}
60#endif /* CONFIG_SMP */
61
62static inline void default_inquire_remote_apic(int apicid)
63{
64 if (apic_verbosity >= APIC_DEBUG)
65 __inquire_remote_apic(apicid);
66}
67
44/*68/*
45 * Basic functions accessing APICs.69 * Basic functions accessing APICs.
46 */70 */
@@ -51,7 +75,14 @@ extern int disable_apic; · 4 unmodified lines
51#define setup_secondary_clock setup_secondary_APIC_clock75#define setup_secondary_clock setup_secondary_APIC_clock
52#endif76#endif
53 77
78#ifdef CONFIG_X86_VSMP
54extern int is_vsmp_box(void);79extern int is_vsmp_box(void);
80#else
81static inline int is_vsmp_box(void)
82{
83 return 0;
84}
85#endif
55extern void xapic_wait_icr_idle(void);86extern void xapic_wait_icr_idle(void);
56extern u32 safe_xapic_wait_icr_idle(void);87extern u32 safe_xapic_wait_icr_idle(void);
57extern void xapic_icr_write(u32, u32);88extern void xapic_icr_write(u32, u32);
@@ -71,6 +102,12 @@ static inline u32 native_apic_mem_read(u32 reg) · 13 unmodified lines
71 return *((volatile u32 *)(APIC_BASE + reg));102 return *((volatile u32 *)(APIC_BASE + reg));
72}103}
73 104
105extern void native_apic_wait_icr_idle(void);
106extern u32 native_safe_apic_wait_icr_idle(void);
107extern void native_apic_icr_write(u32 low, u32 id);
108extern u64 native_apic_icr_read(void);
109
110#ifdef CONFIG_X86_X2APIC
74static inline void native_apic_msr_write(u32 reg, u32 v)111static inline void native_apic_msr_write(u32 reg, u32 v)
75{112{
76 if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR ||113 if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR ||
@@ -91,8 +128,32 @@ static inline u32 native_apic_msr_read(u32 reg) · 14 unmodified lines
91 return low;128 return low;
92}129}
93 130
94#ifndef CONFIG_X86_32131static inline void native_x2apic_wait_icr_idle(void)
95extern int x2apic;132{
133 /* no need to wait for icr idle in x2apic */
134 return;
135}
136
137static inline u32 native_safe_x2apic_wait_icr_idle(void)
138{
139 /* no need to wait for icr idle in x2apic */
140 return 0;
141}
142
143static inline void native_x2apic_icr_write(u32 low, u32 id)
144{
145 wrmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), ((__u64) id) << 32 | low);
146}
147
148static inline u64 native_x2apic_icr_read(void)
149{
150 unsigned long val;
151
152 rdmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), val);
153 return val;
154}
155
156extern int x2apic, x2apic_phys;
96extern void check_x2apic(void);157extern void check_x2apic(void);
97extern void enable_x2apic(void);158extern void enable_x2apic(void);
98extern void enable_IR_x2apic(void);159extern void enable_IR_x2apic(void);
@@ -110,30 +171,24 @@ static inline int x2apic_enabled(void) · 11 unmodified lines
110 return 0;171 return 0;
111}172}
112#else173#else
113#define x2apic_enabled() 0174static inline void check_x2apic(void)
175{
176}
177static inline void enable_x2apic(void)
178{
179}
180static inline void enable_IR_x2apic(void)
181{
182}
183static inline int x2apic_enabled(void)
184{
185 return 0;
186}
114#endif187#endif
115 188
116struct apic_ops {
117 u32 (*read)(u32 reg);
118 void (*write)(u32 reg, u32 v);
119 u64 (*icr_read)(void);
120 void (*icr_write)(u32 low, u32 high);
121 void (*wait_icr_idle)(void);
122 u32 (*safe_wait_icr_idle)(void);
123};
124
125extern struct apic_ops *apic_ops;
126
127#define apic_read (apic_ops->read)
128#define apic_write (apic_ops->write)
129#define apic_icr_read (apic_ops->icr_read)
130#define apic_icr_write (apic_ops->icr_write)
131#define apic_wait_icr_idle (apic_ops->wait_icr_idle)
132#define safe_apic_wait_icr_idle (apic_ops->safe_wait_icr_idle)
133
134extern int get_physical_broadcast(void);189extern int get_physical_broadcast(void);
135 190
136#ifdef CONFIG_X86_64191#ifdef CONFIG_X86_X2APIC
137static inline void ack_x2APIC_irq(void)192static inline void ack_x2APIC_irq(void)
138{193{
139 /* Docs say use 0 for future compatibility */194 /* Docs say use 0 for future compatibility */
@@ -141,18 +196,6 @@ static inline void ack_x2APIC_irq(void) · 1 unmodified line
141}196}
142#endif197#endif
143 198
144
145static inline void ack_APIC_irq(void)
146{
147 /*
148 * ack_APIC_irq() actually gets compiled as a single instruction
149 * ... yummie.
150 */
151
152 /* Docs say use 0 for future compatibility */
153 apic_write(APIC_EOI, 0);
154}
155
156extern int lapic_get_maxlvt(void);199extern int lapic_get_maxlvt(void);
157extern void clear_local_APIC(void);200extern void clear_local_APIC(void);
158extern void connect_bsp_APIC(void);201extern void connect_bsp_APIC(void);
@@ -196,4 +239,327 @@ static inline void disable_local_APIC(void) { } · 37 unmodified lines
196 239
197#endif /* !CONFIG_X86_LOCAL_APIC */240#endif /* !CONFIG_X86_LOCAL_APIC */
198 241
242#ifdef CONFIG_X86_64
243#define SET_APIC_ID(x) (apic->set_apic_id(x))
244#else
245
246#endif
247
248/*
249 * Copyright 2004 James Cleverdon, IBM.
250 * Subject to the GNU Public License, v.2
251 *
252 * Generic APIC sub-arch data struct.
253 *
254 * Hacked for x86-64 by James Cleverdon from i386 architecture code by
255 * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
256 * James Cleverdon.
257 */
258struct apic {
259 char *name;
260
261 int (*probe)(void);
262 int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id);
263 int (*apic_id_registered)(void);
264
265 u32 irq_delivery_mode;
266 u32 irq_dest_mode;
267
268 const struct cpumask *(*target_cpus)(void);
269
270 int disable_esr;
271
272 int dest_logical;
273 unsigned long (*check_apicid_used)(physid_mask_t bitmap, int apicid);
274 unsigned long (*check_apicid_present)(int apicid);
275
276 void (*vector_allocation_domain)(int cpu, struct cpumask *retmask);
277 void (*init_apic_ldr)(void);
278
279 physid_mask_t (*ioapic_phys_id_map)(physid_mask_t map);
280
281 void (*setup_apic_routing)(void);
282 int (*multi_timer_check)(int apic, int irq);
283 int (*apicid_to_node)(int logical_apicid);
284 int (*cpu_to_logical_apicid)(int cpu);
285 int (*cpu_present_to_apicid)(int mps_cpu);
286 physid_mask_t (*apicid_to_cpu_present)(int phys_apicid);
287 void (*setup_portio_remap)(void);
288 int (*check_phys_apicid_present)(int boot_cpu_physical_apicid);
289 void (*enable_apic_mode)(void);
290 int (*phys_pkg_id)(int cpuid_apic, int index_msb);
291
292 /*
293 * When one of the next two hooks returns 1 the apic
294 * is switched to this. Essentially they are additional
295 * probe functions:
296 */
297 int (*mps_oem_check)(struct mpc_table *mpc, char *oem, char *productid);
298
299 unsigned int (*get_apic_id)(unsigned long x);
300 unsigned long (*set_apic_id)(unsigned int id);
301 unsigned long apic_id_mask;
302
303 unsigned int (*cpu_mask_to_apicid)(const struct cpumask *cpumask);
304 unsigned int (*cpu_mask_to_apicid_and)(const struct cpumask *cpumask,
305 const struct cpumask *andmask);
306
307 /* ipi */
308 void (*send_IPI_mask)(const struct cpumask *mask, int vector);
309 void (*send_IPI_mask_allbutself)(const struct cpumask *mask,
310 int vector);
311 void (*send_IPI_allbutself)(int vector);
312 void (*send_IPI_all)(int vector);
313 void (*send_IPI_self)(int vector);
314
315 /* wakeup_secondary_cpu */
316 int (*wakeup_secondary_cpu)(int apicid, unsigned long start_eip);
317
318 int trampoline_phys_low;
319 int trampoline_phys_high;
320
321 void (*wait_for_init_deassert)(atomic_t *deassert);
322 void (*smp_callin_clear_local_apic)(void);
323 void (*inquire_remote_apic)(int apicid);
324
325 /* apic ops */
326 u32 (*read)(u32 reg);
327 void (*write)(u32 reg, u32 v);
328 u64 (*icr_read)(void);
329 void (*icr_write)(u32 low, u32 high);
330 void (*wait_icr_idle)(void);
331 u32 (*safe_wait_icr_idle)(void);
332};
333
334/*
335 * Pointer to the local APIC driver in use on this system (there's
336 * always just one such driver in use - the kernel decides via an
337 * early probing process which one it picks - and then sticks to it):
338 */
339extern struct apic *apic;
340
341/*
342 * APIC functionality to boot other CPUs - only used on SMP:
343 */
344#ifdef CONFIG_SMP
345extern atomic_t init_deasserted;
346extern int wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip);
347#endif
348
349static inline u32 apic_read(u32 reg)
350{
351 return apic->read(reg);
352}
353
354static inline void apic_write(u32 reg, u32 val)
355{
356 apic->write(reg, val);
357}
358
359static inline u64 apic_icr_read(void)
360{
361 return apic->icr_read();
362}
363
364static inline void apic_icr_write(u32 low, u32 high)
365{
366 apic->icr_write(low, high);
367}
368
369static inline void apic_wait_icr_idle(void)
370{
371 apic->wait_icr_idle();
372}
373
374static inline u32 safe_apic_wait_icr_idle(void)
375{
376 return apic->safe_wait_icr_idle();
377}
378
379
380static inline void ack_APIC_irq(void)
381{
382 /*
383 * ack_APIC_irq() actually gets compiled as a single instruction
384 * ... yummie.
385 */
386
387 /* Docs say use 0 for future compatibility */
388 apic_write(APIC_EOI, 0);
389}
390
391static inline unsigned default_get_apic_id(unsigned long x)
392{
393 unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR));
394
395 if (APIC_XAPIC(ver))
396 return (x >> 24) & 0xFF;
397 else
398 return (x >> 24) & 0x0F;
399}
400
401/*
402 * Warm reset vector default position:
403 */
404#define DEFAULT_TRAMPOLINE_PHYS_LOW 0x467
405#define DEFAULT_TRAMPOLINE_PHYS_HIGH 0x469
406
407#ifdef CONFIG_X86_64
408extern struct apic apic_flat;
409extern struct apic apic_physflat;
410extern struct apic apic_x2apic_cluster;
411extern struct apic apic_x2apic_phys;
412extern int default_acpi_madt_oem_check(char *, char *);
413
414extern void apic_send_IPI_self(int vector);
415
416extern struct apic apic_x2apic_uv_x;
417DECLARE_PER_CPU(int, x2apic_extra_bits);
418
419extern int default_cpu_present_to_apicid(int mps_cpu);
420extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid);
421#endif
422
423static inline void default_wait_for_init_deassert(atomic_t *deassert)
424{
425 while (!atomic_read(deassert))
426 cpu_relax();
427 return;
428}
429
430extern void generic_bigsmp_probe(void);
431
432
433#ifdef CONFIG_X86_LOCAL_APIC
434
435#include <asm/smp.h>
436
437#define APIC_DFR_VALUE (APIC_DFR_FLAT)
438
439static inline const struct cpumask *default_target_cpus(void)
440{
441#ifdef CONFIG_SMP
442 return cpu_online_mask;
443#else
444 return cpumask_of(0);
445#endif
446}
447
448DECLARE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid);
449
450
451static inline unsigned int read_apic_id(void)
452{
453 unsigned int reg;
454
455 reg = apic_read(APIC_ID);
456
457 return apic->get_apic_id(reg);
458}
459
460extern void default_setup_apic_routing(void);
461
462#ifdef CONFIG_X86_32
463/*
464 * Set up the logical destination ID.
465 *
466 * Intel recommends to set DFR, LDR and TPR before enabling
467 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
468 * document number 292116). So here it goes...
469 */
470extern void default_init_apic_ldr(void);
471
472static inline int default_apic_id_registered(void)
473{
474 return physid_isset(read_apic_id(), phys_cpu_present_map);
475}
476
477static inline unsigned int
478default_cpu_mask_to_apicid(const struct cpumask *cpumask)
479{
480 return cpumask_bits(cpumask)[0];
481}
482
483static inline unsigned int
484default_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
485 const struct cpumask *andmask)
486{
487 unsigned long mask1 = cpumask_bits(cpumask)[0];
488 unsigned long mask2 = cpumask_bits(andmask)[0];
489 unsigned long mask3 = cpumask_bits(cpu_online_mask)[0];
490
491 return (unsigned int)(mask1 & mask2 & mask3);
492}
493
494static inline int default_phys_pkg_id(int cpuid_apic, int index_msb)
495{
496 return cpuid_apic >> index_msb;
497}
498
499extern int default_apicid_to_node(int logical_apicid);
500
501#endif
502
503static inline unsigned long default_check_apicid_used(physid_mask_t bitmap, int apicid)
504{
505 return physid_isset(apicid, bitmap);
506}
507
508static inline unsigned long default_check_apicid_present(int bit)
509{
510 return physid_isset(bit, phys_cpu_present_map);
511}
512
513static inline physid_mask_t default_ioapic_phys_id_map(physid_mask_t phys_map)
514{
515 return phys_map;
516}
517
518/* Mapping from cpu number to logical apicid */
519static inline int default_cpu_to_logical_apicid(int cpu)
520{
521 return 1 << cpu;
522}
523
524static inline int __default_cpu_present_to_apicid(int mps_cpu)
525{
526 if (mps_cpu < nr_cpu_ids && cpu_present(mps_cpu))
527 return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
528 else
529 return BAD_APICID;
530}
531
532static inline int
533__default_check_phys_apicid_present(int boot_cpu_physical_apicid)
534{
535 return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
536}
537
538#ifdef CONFIG_X86_32
539static inline int default_cpu_present_to_apicid(int mps_cpu)
540{
541 return __default_cpu_present_to_apicid(mps_cpu);
542}
543
544static inline int
545default_check_phys_apicid_present(int boot_cpu_physical_apicid)
546{
547 return __default_check_phys_apicid_present(boot_cpu_physical_apicid);
548}
549#else
550extern int default_cpu_present_to_apicid(int mps_cpu);
551extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid);
552#endif
553
554static inline physid_mask_t default_apicid_to_cpu_present(int phys_apicid)
555{
556 return physid_mask_of_physid(phys_apicid);
557}
558
559#endif /* CONFIG_X86_LOCAL_APIC */
560
561#ifdef CONFIG_X86_32
562extern u8 cpu_2_logical_apicid[NR_CPUS];
563#endif
564
199#endif /* _ASM_X86_APIC_H */565#endif /* _ASM_X86_APIC_H */
arch/x86/include/asm/apicnum.h+12−0
@@ -0,0 +1,12 @@
1#ifndef _ASM_X86_APICNUM_H
2#define _ASM_X86_APICNUM_H
3
4/* define MAX_IO_APICS */
5#ifdef CONFIG_X86_32
6# define MAX_IO_APICS 64
7#else
8# define MAX_IO_APICS 128
9# define MAX_LOCAL_APIC 32768
10#endif
11
12#endif /* _ASM_X86_APICNUM_H */
arch/x86/include/asm/apm.hrenamed from arch/x86/include/asm/mach-default/apm.h+0−0

File renamed without changes.

arch/x86/include/asm/arch_hooks.h+0−26
@@ -1,26 +0,0 @@
1#ifndef _ASM_X86_ARCH_HOOKS_H
2#define _ASM_X86_ARCH_HOOKS_H
3
4#include <linux/interrupt.h>
5
6/*
7 * linux/include/asm/arch_hooks.h
8 *
9 * define the architecture specific hooks
10 */
11
12/* these aren't arch hooks, they are generic routines
13 * that can be used by the hooks */
14extern void init_ISA_irqs(void);
15extern irqreturn_t timer_interrupt(int irq, void *dev_id);
16
17/* these are the defined hooks */
18extern void intr_init_hook(void);
19extern void pre_intr_init_hook(void);
20extern void pre_setup_arch_hook(void);
21extern void trap_init_hook(void);
22extern void pre_time_init_hook(void);
23extern void time_init_hook(void);
24extern void mca_nmi_hook(void);
25
26#endif /* _ASM_X86_ARCH_HOOKS_H */
arch/x86/include/asm/bigsmp/apic.h+0−155
@@ -1,155 +0,0 @@
1#ifndef __ASM_MACH_APIC_H
2#define __ASM_MACH_APIC_H
3
4#define xapic_phys_to_log_apicid(cpu) (per_cpu(x86_bios_cpu_apicid, cpu))
5#define esr_disable (1)
6
7static inline int apic_id_registered(void)
8{
9 return (1);
10}
11
12static inline const cpumask_t *target_cpus(void)
13{
14#ifdef CONFIG_SMP
15 return &cpu_online_map;
16#else
17 return &cpumask_of_cpu(0);
18#endif
19}
20
21#undef APIC_DEST_LOGICAL
22#define APIC_DEST_LOGICAL 0
23#define APIC_DFR_VALUE (APIC_DFR_FLAT)
24#define INT_DELIVERY_MODE (dest_Fixed)
25#define INT_DEST_MODE (0) /* phys delivery to target proc */
26#define NO_BALANCE_IRQ (0)
27
28static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
29{
30 return (0);
31}
32
33static inline unsigned long check_apicid_present(int bit)
34{
35 return (1);
36}
37
38static inline unsigned long calculate_ldr(int cpu)
39{
40 unsigned long val, id;
41 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
42 id = xapic_phys_to_log_apicid(cpu);
43 val |= SET_APIC_LOGICAL_ID(id);
44 return val;
45}
46
47/*
48 * Set up the logical destination ID.
49 *
50 * Intel recommends to set DFR, LDR and TPR before enabling
51 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
52 * document number 292116). So here it goes...
53 */
54static inline void init_apic_ldr(void)
55{
56 unsigned long val;
57 int cpu = smp_processor_id();
58
59 apic_write(APIC_DFR, APIC_DFR_VALUE);
60 val = calculate_ldr(cpu);
61 apic_write(APIC_LDR, val);
62}
63
64static inline void setup_apic_routing(void)
65{
66 printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
67 "Physflat", nr_ioapics);
68}
69
70static inline int multi_timer_check(int apic, int irq)
71{
72 return (0);
73}
74
75static inline int apicid_to_node(int logical_apicid)
76{
77 return apicid_2_node[hard_smp_processor_id()];
78}
79
80static inline int cpu_present_to_apicid(int mps_cpu)
81{
82 if (mps_cpu < nr_cpu_ids)
83 return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);
84
85 return BAD_APICID;
86}
87
88static inline physid_mask_t apicid_to_cpu_present(int phys_apicid)
89{
90 return physid_mask_of_physid(phys_apicid);
91}
92
93extern u8 cpu_2_logical_apicid[];
94/* Mapping from cpu number to logical apicid */
95static inline int cpu_to_logical_apicid(int cpu)
96{
97 if (cpu >= nr_cpu_ids)
98 return BAD_APICID;
99 return cpu_physical_id(cpu);
100}
101
102static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
103{
104 /* For clustered we don't have a good way to do this yet - hack */
105 return physids_promote(0xFFL);
106}
107
108static inline void setup_portio_remap(void)
109{
110}
111
112static inline void enable_apic_mode(void)
113{
114}
115
116static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
117{
118 return (1);
119}
120
121/* As we are using single CPU as destination, pick only one CPU here */
122static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask)
123{
124 int cpu;
125 int apicid;
126
127 cpu = first_cpu(*cpumask);
128 apicid = cpu_to_logical_apicid(cpu);
129 return apicid;
130}
131
132static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *cpumask,
133 const struct cpumask *andmask)
134{
135 int cpu;
136
137 /*
138 * We're using fixed IRQ delivery, can only return one phys APIC ID.
139 * May as well be the first.
140 */
141 for_each_cpu_and(cpu, cpumask, andmask)
142 if (cpumask_test_cpu(cpu, cpu_online_mask))
143 break;
144 if (cpu < nr_cpu_ids)
145 return cpu_to_logical_apicid(cpu);
146
147 return BAD_APICID;
148}
149
150static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
151{
152 return cpuid_apic >> index_msb;
153}
154
155#endif /* __ASM_MACH_APIC_H */
arch/x86/include/asm/bigsmp/apicdef.h+0−13
@@ -1,13 +0,0 @@
1#ifndef __ASM_MACH_APICDEF_H
2#define __ASM_MACH_APICDEF_H
3
4#define APIC_ID_MASK (0xFF<<24)
5
6static inline unsigned get_apic_id(unsigned long x)
7{
8 return (((x)>>24)&0xFF);
9}
10
11#define GET_APIC_ID(x) get_apic_id(x)
12
13#endif
arch/x86/include/asm/bigsmp/ipi.h+0−22
@@ -1,22 +0,0 @@
1#ifndef __ASM_MACH_IPI_H
2#define __ASM_MACH_IPI_H
3
4void send_IPI_mask_sequence(const struct cpumask *mask, int vector);
5void send_IPI_mask_allbutself(const struct cpumask *mask, int vector);
6
7static inline void send_IPI_mask(const struct cpumask *mask, int vector)
8{
9 send_IPI_mask_sequence(mask, vector);
10}
11
12static inline void send_IPI_allbutself(int vector)
13{
14 send_IPI_mask_allbutself(cpu_online_mask, vector);
15}
16
17static inline void send_IPI_all(int vector)
18{
19 send_IPI_mask(cpu_online_mask, vector);
20}
21
22#endif /* __ASM_MACH_IPI_H */
arch/x86/include/asm/boot.h+15−1
@@ -10,17 +10,31 @@ · 9 unmodified lines
10#define EXTENDED_VGA 0xfffe /* 80x50 mode */10#define EXTENDED_VGA 0xfffe /* 80x50 mode */
11#define ASK_VGA 0xfffd /* ask for it at bootup */11#define ASK_VGA 0xfffd /* ask for it at bootup */
12 12
13#ifdef __KERNEL__
14
13/* Physical address where kernel should be loaded. */15/* Physical address where kernel should be loaded. */
14#define LOAD_PHYSICAL_ADDR ((CONFIG_PHYSICAL_START \16#define LOAD_PHYSICAL_ADDR ((CONFIG_PHYSICAL_START \
15 + (CONFIG_PHYSICAL_ALIGN - 1)) \17 + (CONFIG_PHYSICAL_ALIGN - 1)) \
16 & ~(CONFIG_PHYSICAL_ALIGN - 1))18 & ~(CONFIG_PHYSICAL_ALIGN - 1))
17 19
20#ifdef CONFIG_KERNEL_BZIP2
21#define BOOT_HEAP_SIZE 0x400000
22#else /* !CONFIG_KERNEL_BZIP2 */
23
18#ifdef CONFIG_X86_6424#ifdef CONFIG_X86_64
19#define BOOT_HEAP_SIZE 0x700025#define BOOT_HEAP_SIZE 0x7000
20#define BOOT_STACK_SIZE 0x4000
21#else26#else
22#define BOOT_HEAP_SIZE 0x400027#define BOOT_HEAP_SIZE 0x4000
28#endif
29
30#endif /* !CONFIG_KERNEL_BZIP2 */
31
32#ifdef CONFIG_X86_64
33#define BOOT_STACK_SIZE 0x4000
34#else
23#define BOOT_STACK_SIZE 0x100035#define BOOT_STACK_SIZE 0x1000
24#endif36#endif
25 37
38#endif /* __KERNEL__ */
39
26#endif /* _ASM_X86_BOOT_H */40#endif /* _ASM_X86_BOOT_H */
arch/x86/include/asm/cacheflush.h+36−17
@@ -5,24 +5,43 @@ · 4 unmodified lines
5#include <linux/mm.h>5#include <linux/mm.h>
6 6
7/* Caches aren't brain-dead on the intel. */7/* Caches aren't brain-dead on the intel. */
8#define flush_cache_all() do { } while (0)8static inline void flush_cache_all(void) { }
9#define flush_cache_mm(mm) do { } while (0)9static inline void flush_cache_mm(struct mm_struct *mm) { }
10#define flush_cache_dup_mm(mm) do { } while (0)10static inline void flush_cache_dup_mm(struct mm_struct *mm) { }
11#define flush_cache_range(vma, start, end) do { } while (0)11static inline void flush_cache_range(struct vm_area_struct *vma,
12#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)12 unsigned long start, unsigned long end) { }
13#define flush_dcache_page(page) do { } while (0)13static inline void flush_cache_page(struct vm_area_struct *vma,
14#define flush_dcache_mmap_lock(mapping) do { } while (0)14 unsigned long vmaddr, unsigned long pfn) { }
15#define flush_dcache_mmap_unlock(mapping) do { } while (0)15static inline void flush_dcache_page(struct page *page) { }
16#define flush_icache_range(start, end) do { } while (0)16static inline void flush_dcache_mmap_lock(struct address_space *mapping) { }
17#define flush_icache_page(vma, pg) do { } while (0)17static inline void flush_dcache_mmap_unlock(struct address_space *mapping) { }
18#define flush_icache_user_range(vma, pg, adr, len) do { } while (0)18static inline void flush_icache_range(unsigned long start,
19#define flush_cache_vmap(start, end) do { } while (0)19 unsigned long end) { }
20#define flush_cache_vunmap(start, end) do { } while (0)20static inline void flush_icache_page(struct vm_area_struct *vma,
21 struct page *page) { }
22static inline void flush_icache_user_range(struct vm_area_struct *vma,
23 struct page *page,
24 unsigned long addr,
25 unsigned long len) { }
26static inline void flush_cache_vmap(unsigned long start, unsigned long end) { }
27static inline void flush_cache_vunmap(unsigned long start,
28 unsigned long end) { }
21 29
22#define copy_to_user_page(vma, page, vaddr, dst, src, len) \30static inline void copy_to_user_page(struct vm_area_struct *vma,
23 memcpy((dst), (src), (len))31 struct page *page, unsigned long vaddr,
24#define copy_from_user_page(vma, page, vaddr, dst, src, len) \32 void *dst, const void *src,
25 memcpy((dst), (src), (len))33 unsigned long len)
34{
35 memcpy(dst, src, len);
36}
37
38static inline void copy_from_user_page(struct vm_area_struct *vma,
39 struct page *page, unsigned long vaddr,
40 void *dst, const void *src,
41 unsigned long len)
42{
43 memcpy(dst, src, len);
44}
26 45
27#define PG_non_WB PG_arch_146#define PG_non_WB PG_arch_1
28PAGEFLAG(NonWB, non_WB)47PAGEFLAG(NonWB, non_WB)
arch/x86/include/asm/calling.h+53−3
@@ -1,5 +1,55 @@
1/*1/*
2 * Some macros to handle stack frames in assembly.2
3 x86 function call convention, 64-bit:
4 -------------------------------------
5 arguments | callee-saved | extra caller-saved | return
6 [callee-clobbered] | | [callee-clobbered] |
7 ---------------------------------------------------------------------------
8 rdi rsi rdx rcx r8-9 | rbx rbp [*] r12-15 | r10-11 | rax, rdx [**]
9
10 ( rsp is obviously invariant across normal function calls. (gcc can 'merge'
11 functions when it sees tail-call optimization possibilities) rflags is
12 clobbered. Leftover arguments are passed over the stack frame.)
13
14 [*] In the frame-pointers case rbp is fixed to the stack frame.
15
16 [**] for struct return values wider than 64 bits the return convention is a
17 bit more complex: up to 128 bits width we return small structures
18 straight in rax, rdx. For structures larger than that (3 words or
19 larger) the caller puts a pointer to an on-stack return struct
20 [allocated in the caller's stack frame] into the first argument - i.e.
21 into rdi. All other arguments shift up by one in this case.
22 Fortunately this case is rare in the kernel.
23
24For 32-bit we have the following conventions - kernel is built with
25-mregparm=3 and -freg-struct-return:
26
27 x86 function calling convention, 32-bit:
28 ----------------------------------------
29 arguments | callee-saved | extra caller-saved | return
30 [callee-clobbered] | | [callee-clobbered] |
31 -------------------------------------------------------------------------
32 eax edx ecx | ebx edi esi ebp [*] | <none> | eax, edx [**]
33
34 ( here too esp is obviously invariant across normal function calls. eflags
35 is clobbered. Leftover arguments are passed over the stack frame. )
36
37 [*] In the frame-pointers case ebp is fixed to the stack frame.
38
39 [**] We build with -freg-struct-return, which on 32-bit means similar
40 semantics as on 64-bit: edx can be used for a second return value
41 (i.e. covering integer and structure sizes up to 64 bits) - after that
42 it gets more complex and more expensive: 3-word or larger struct returns
43 get done in the caller's frame and the pointer to the return struct goes
44 into regparm0, i.e. eax - the other arguments shift up and the
45 function's register parameters degenerate to regparm=2 in essence.
46
47*/
48
49
50/*
51 * 64-bit system call stack frame layout defines and helpers,
52 * for assembly code:
3 */53 */
4 54
5#define R15 055#define R15 0
@@ -9,7 +59,7 @@ · 3 unmodified lines
9#define RBP 3259#define RBP 32
10#define RBX 4060#define RBX 40
11 61
12/* arguments: interrupts/non tracing syscalls only save upto here*/62/* arguments: interrupts/non tracing syscalls only save up to here: */
13#define R11 4863#define R11 48
14#define R10 5664#define R10 56
15#define R9 6465#define R9 64
@@ -22,7 +72,7 @@ · 6 unmodified lines
22#define ORIG_RAX 120 /* + error_code */72#define ORIG_RAX 120 /* + error_code */
23/* end of arguments */73/* end of arguments */
24 74
25/* cpu exception frame or undefined in case of fast syscall. */75/* cpu exception frame or undefined in case of fast syscall: */
26#define RIP 12876#define RIP 128
27#define CS 13677#define CS 136
28#define EFLAGS 14478#define EFLAGS 144
arch/x86/include/asm/cpu.h+17−0
@@ -7,6 +7,20 @@ · 6 unmodified lines
7#include <linux/nodemask.h>7#include <linux/nodemask.h>
8#include <linux/percpu.h>8#include <linux/percpu.h>
9 9
10#ifdef CONFIG_SMP
11
12extern void prefill_possible_map(void);
13
14#else /* CONFIG_SMP */
15
16static inline void prefill_possible_map(void) {}
17
18#define cpu_physical_id(cpu) boot_cpu_physical_apicid
19#define safe_smp_processor_id() 0
20#define stack_smp_processor_id() 0
21
22#endif /* CONFIG_SMP */
23
10struct x86_cpu {24struct x86_cpu {
11 struct cpu cpu;25 struct cpu cpu;
12};26};
@@ -17,4 +31,7 @@ extern void arch_unregister_cpu(int); · 4 unmodified lines
17#endif31#endif
18 32
19DECLARE_PER_CPU(int, cpu_state);33DECLARE_PER_CPU(int, cpu_state);
34
35extern unsigned int boot_cpu_id;
36
20#endif /* _ASM_X86_CPU_H */37#endif /* _ASM_X86_CPU_H */
arch/x86/include/asm/cpumask.h+32−0
@@ -0,0 +1,32 @@
1#ifndef _ASM_X86_CPUMASK_H
2#define _ASM_X86_CPUMASK_H
3#ifndef __ASSEMBLY__
4#include <linux/cpumask.h>
5
6#ifdef CONFIG_X86_64
7
8extern cpumask_var_t cpu_callin_mask;
9extern cpumask_var_t cpu_callout_mask;
10extern cpumask_var_t cpu_initialized_mask;
11extern cpumask_var_t cpu_sibling_setup_mask;
12
13extern void setup_cpu_local_masks(void);
14
15#else /* CONFIG_X86_32 */
16
17extern cpumask_t cpu_callin_map;
18extern cpumask_t cpu_callout_map;
19extern cpumask_t cpu_initialized;
20extern cpumask_t cpu_sibling_setup_map;
21
22#define cpu_callin_mask ((struct cpumask *)&cpu_callin_map)
23#define cpu_callout_mask ((struct cpumask *)&cpu_callout_map)
24#define cpu_initialized_mask ((struct cpumask *)&cpu_initialized)
25#define cpu_sibling_setup_mask ((struct cpumask *)&cpu_sibling_setup_map)
26
27static inline void setup_cpu_local_masks(void) { }
28
29#endif /* CONFIG_X86_32 */
30
31#endif /* __ASSEMBLY__ */
32#endif /* _ASM_X86_CPUMASK_H */
arch/x86/include/asm/current.h+3−21
@@ -1,39 +1,21 @@
1#ifndef _ASM_X86_CURRENT_H1#ifndef _ASM_X86_CURRENT_H
2#define _ASM_X86_CURRENT_H2#define _ASM_X86_CURRENT_H
3 3
4#ifdef CONFIG_X86_32
5#include <linux/compiler.h>4#include <linux/compiler.h>
6#include <asm/percpu.h>5#include <asm/percpu.h>
7 6
7#ifndef __ASSEMBLY__
8struct task_struct;8struct task_struct;
9 9
10DECLARE_PER_CPU(struct task_struct *, current_task);10DECLARE_PER_CPU(struct task_struct *, current_task);
11static __always_inline struct task_struct *get_current(void)
12{
13 return x86_read_percpu(current_task);
14}
15
16#else /* X86_32 */
17
18#ifndef __ASSEMBLY__
19#include <asm/pda.h>
20
21struct task_struct;
22 11
23static __always_inline struct task_struct *get_current(void)12static __always_inline struct task_struct *get_current(void)
24{13{
25 return read_pda(pcurrent);14 return percpu_read(current_task);
26}15}
27 16
28#else /* __ASSEMBLY__ */17#define current get_current()
29
30#include <asm/asm-offsets.h>
31#define GET_CURRENT(reg) movq %gs:(pda_pcurrent),reg
32 18
33#endif /* __ASSEMBLY__ */19#endif /* __ASSEMBLY__ */
34 20
35#endif /* X86_32 */
36
37#define current get_current()
38
39#endif /* _ASM_X86_CURRENT_H */21#endif /* _ASM_X86_CURRENT_H */
arch/x86/include/asm/do_timer.hrenamed from arch/x86/include/asm/mach-default/do_timer.h+0−0

File renamed without changes.

arch/x86/include/asm/elf.h+13−2
@@ -112,7 +112,7 @@ extern unsigned int vdso_enabled; · 111 unmodified lines
112 * now struct_user_regs, they are different)112 * now struct_user_regs, they are different)
113 */113 */
114 114
115#define ELF_CORE_COPY_REGS(pr_reg, regs) \115#define ELF_CORE_COPY_REGS_COMMON(pr_reg, regs) \
116do { \116do { \
117 pr_reg[0] = regs->bx; \117 pr_reg[0] = regs->bx; \
118 pr_reg[1] = regs->cx; \118 pr_reg[1] = regs->cx; \
@@ -124,7 +124,6 @@ do { \ · 5 unmodified lines
124 pr_reg[7] = regs->ds & 0xffff; \124 pr_reg[7] = regs->ds & 0xffff; \
125 pr_reg[8] = regs->es & 0xffff; \125 pr_reg[8] = regs->es & 0xffff; \
126 pr_reg[9] = regs->fs & 0xffff; \126 pr_reg[9] = regs->fs & 0xffff; \
127 savesegment(gs, pr_reg[10]); \
128 pr_reg[11] = regs->orig_ax; \127 pr_reg[11] = regs->orig_ax; \
129 pr_reg[12] = regs->ip; \128 pr_reg[12] = regs->ip; \
130 pr_reg[13] = regs->cs & 0xffff; \129 pr_reg[13] = regs->cs & 0xffff; \
@@ -133,6 +132,18 @@ do { \ · 2 unmodified lines
133 pr_reg[16] = regs->ss & 0xffff; \132 pr_reg[16] = regs->ss & 0xffff; \
134} while (0);133} while (0);
135 134
135#define ELF_CORE_COPY_REGS(pr_reg, regs) \
136do { \
137 ELF_CORE_COPY_REGS_COMMON(pr_reg, regs);\
138 pr_reg[10] = get_user_gs(regs); \
139} while (0);
140
141#define ELF_CORE_COPY_KERNEL_REGS(pr_reg, regs) \
142do { \
143 ELF_CORE_COPY_REGS_COMMON(pr_reg, regs);\
144 savesegment(gs, pr_reg[10]); \
145} while (0);
146
136#define ELF_PLATFORM (utsname()->machine)147#define ELF_PLATFORM (utsname()->machine)
137#define set_personality_64bit() do { } while (0)148#define set_personality_64bit() do { } while (0)
138 149
arch/x86/include/asm/entry_arch.hrenamed from arch/x86/include/asm/mach-default/entry_arch.h+23−2
@@ -9,12 +9,28 @@ · 8 unmodified lines
9 * is no hardware IRQ pin equivalent for them, they are triggered9 * is no hardware IRQ pin equivalent for them, they are triggered
10 * through the ICC by us (IPIs)10 * through the ICC by us (IPIs)
11 */11 */
12#ifdef CONFIG_X86_SMP12#ifdef CONFIG_SMP
13BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR)13BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR)
14BUILD_INTERRUPT(invalidate_interrupt,INVALIDATE_TLB_VECTOR)
15BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR)14BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR)
16BUILD_INTERRUPT(call_function_single_interrupt,CALL_FUNCTION_SINGLE_VECTOR)15BUILD_INTERRUPT(call_function_single_interrupt,CALL_FUNCTION_SINGLE_VECTOR)
17BUILD_INTERRUPT(irq_move_cleanup_interrupt,IRQ_MOVE_CLEANUP_VECTOR)16BUILD_INTERRUPT(irq_move_cleanup_interrupt,IRQ_MOVE_CLEANUP_VECTOR)
17
18BUILD_INTERRUPT3(invalidate_interrupt0,INVALIDATE_TLB_VECTOR_START+0,
19 smp_invalidate_interrupt)
20BUILD_INTERRUPT3(invalidate_interrupt1,INVALIDATE_TLB_VECTOR_START+1,
21 smp_invalidate_interrupt)
22BUILD_INTERRUPT3(invalidate_interrupt2,INVALIDATE_TLB_VECTOR_START+2,
23 smp_invalidate_interrupt)
24BUILD_INTERRUPT3(invalidate_interrupt3,INVALIDATE_TLB_VECTOR_START+3,
25 smp_invalidate_interrupt)
26BUILD_INTERRUPT3(invalidate_interrupt4,INVALIDATE_TLB_VECTOR_START+4,
27 smp_invalidate_interrupt)
28BUILD_INTERRUPT3(invalidate_interrupt5,INVALIDATE_TLB_VECTOR_START+5,
29 smp_invalidate_interrupt)
30BUILD_INTERRUPT3(invalidate_interrupt6,INVALIDATE_TLB_VECTOR_START+6,
31 smp_invalidate_interrupt)
32BUILD_INTERRUPT3(invalidate_interrupt7,INVALIDATE_TLB_VECTOR_START+7,
33 smp_invalidate_interrupt)
18#endif34#endif
19 35
20/*36/*
@@ -25,10 +41,15 @@ BUILD_INTERRUPT(irq_move_cleanup_interrupt,IRQ_MOVE_CLEANUP_VECTOR) · 4 unmodified lines
25 * a much simpler SMP time architecture:41 * a much simpler SMP time architecture:
26 */42 */
27#ifdef CONFIG_X86_LOCAL_APIC43#ifdef CONFIG_X86_LOCAL_APIC
44
28BUILD_INTERRUPT(apic_timer_interrupt,LOCAL_TIMER_VECTOR)45BUILD_INTERRUPT(apic_timer_interrupt,LOCAL_TIMER_VECTOR)
29BUILD_INTERRUPT(error_interrupt,ERROR_APIC_VECTOR)46BUILD_INTERRUPT(error_interrupt,ERROR_APIC_VECTOR)
30BUILD_INTERRUPT(spurious_interrupt,SPURIOUS_APIC_VECTOR)47BUILD_INTERRUPT(spurious_interrupt,SPURIOUS_APIC_VECTOR)
31 48
49#ifdef CONFIG_PERF_COUNTERS
50BUILD_INTERRUPT(perf_counter_interrupt, LOCAL_PERF_VECTOR)
51#endif
52
32#ifdef CONFIG_X86_MCE_P4THERMAL53#ifdef CONFIG_X86_MCE_P4THERMAL
33BUILD_INTERRUPT(thermal_interrupt,THERMAL_APIC_VECTOR)54BUILD_INTERRUPT(thermal_interrupt,THERMAL_APIC_VECTOR)
34#endif55#endif
arch/x86/include/asm/es7000/apic.h+0−242
@@ -1,242 +0,0 @@
1#ifndef __ASM_ES7000_APIC_H
2#define __ASM_ES7000_APIC_H
3
4#include <linux/gfp.h>
5
6#define xapic_phys_to_log_apicid(cpu) per_cpu(x86_bios_cpu_apicid, cpu)
7#define esr_disable (1)
8
9static inline int apic_id_registered(void)
10{
11 return (1);
12}
13
14static inline const cpumask_t *target_cpus_cluster(void)
15{
16 return &CPU_MASK_ALL;
17}
18
19static inline const cpumask_t *target_cpus(void)
20{
21 return &cpumask_of_cpu(smp_processor_id());
22}
23
24#define APIC_DFR_VALUE_CLUSTER (APIC_DFR_CLUSTER)
25#define INT_DELIVERY_MODE_CLUSTER (dest_LowestPrio)
26#define INT_DEST_MODE_CLUSTER (1) /* logical delivery broadcast to all procs */
27#define NO_BALANCE_IRQ_CLUSTER (1)
28
29#define APIC_DFR_VALUE (APIC_DFR_FLAT)
30#define INT_DELIVERY_MODE (dest_Fixed)
31#define INT_DEST_MODE (0) /* phys delivery to target procs */
32#define NO_BALANCE_IRQ (0)
33#undef APIC_DEST_LOGICAL
34#define APIC_DEST_LOGICAL 0x0
35
36static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
37{
38 return 0;
39}
40static inline unsigned long check_apicid_present(int bit)
41{
42 return physid_isset(bit, phys_cpu_present_map);
43}
44
45#define apicid_cluster(apicid) (apicid & 0xF0)
46
47static inline unsigned long calculate_ldr(int cpu)
48{
49 unsigned long id;
50 id = xapic_phys_to_log_apicid(cpu);
51 return (SET_APIC_LOGICAL_ID(id));
52}
53
54/*
55 * Set up the logical destination ID.
56 *
57 * Intel recommends to set DFR, LdR and TPR before enabling
58 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
59 * document number 292116). So here it goes...
60 */
61static inline void init_apic_ldr_cluster(void)
62{
63 unsigned long val;
64 int cpu = smp_processor_id();
65
66 apic_write(APIC_DFR, APIC_DFR_VALUE_CLUSTER);
67 val = calculate_ldr(cpu);
68 apic_write(APIC_LDR, val);
69}
70
71static inline void init_apic_ldr(void)
72{
73 unsigned long val;
74 int cpu = smp_processor_id();
75
76 apic_write(APIC_DFR, APIC_DFR_VALUE);
77 val = calculate_ldr(cpu);
78 apic_write(APIC_LDR, val);
79}
80
81extern int apic_version [MAX_APICS];
82static inline void setup_apic_routing(void)
83{
84 int apic = per_cpu(x86_bios_cpu_apicid, smp_processor_id());
85 printk("Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n",
86 (apic_version[apic] == 0x14) ?
87 "Physical Cluster" : "Logical Cluster",
88 nr_ioapics, cpus_addr(*target_cpus())[0]);
89}
90
91static inline int multi_timer_check(int apic, int irq)
92{
93 return 0;
94}
95
96static inline int apicid_to_node(int logical_apicid)
97{
98 return 0;
99}
100
101
102static inline int cpu_present_to_apicid(int mps_cpu)
103{
104 if (!mps_cpu)
105 return boot_cpu_physical_apicid;
106 else if (mps_cpu < nr_cpu_ids)
107 return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);
108 else
109 return BAD_APICID;
110}
111
112static inline physid_mask_t apicid_to_cpu_present(int phys_apicid)
113{
114 static int id = 0;
115 physid_mask_t mask;
116 mask = physid_mask_of_physid(id);
117 ++id;
118 return mask;
119}
120
121extern u8 cpu_2_logical_apicid[];
122/* Mapping from cpu number to logical apicid */
123static inline int cpu_to_logical_apicid(int cpu)
124{
125#ifdef CONFIG_SMP
126 if (cpu >= nr_cpu_ids)
127 return BAD_APICID;
128 return (int)cpu_2_logical_apicid[cpu];
129#else
130 return logical_smp_processor_id();
131#endif
132}
133
134static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
135{
136 /* For clustered we don't have a good way to do this yet - hack */
137 return physids_promote(0xff);
138}
139
140
141static inline void setup_portio_remap(void)
142{
143}
144
145extern unsigned int boot_cpu_physical_apicid;
146static inline int check_phys_apicid_present(int cpu_physical_apicid)
147{
148 boot_cpu_physical_apicid = read_apic_id();
149 return (1);
150}
151
152static inline unsigned int
153cpu_mask_to_apicid_cluster(const struct cpumask *cpumask)
154{
155 int num_bits_set;
156 int cpus_found = 0;
157 int cpu;
158 int apicid;
159
160 num_bits_set = cpumask_weight(cpumask);
161 /* Return id to all */
162 if (num_bits_set == nr_cpu_ids)
163 return 0xFF;
164 /*
165 * The cpus in the mask must all be on the apic cluster. If are not
166 * on the same apicid cluster return default value of TARGET_CPUS.
167 */
168 cpu = cpumask_first(cpumask);
169 apicid = cpu_to_logical_apicid(cpu);
170 while (cpus_found < num_bits_set) {
171 if (cpumask_test_cpu(cpu, cpumask)) {
172 int new_apicid = cpu_to_logical_apicid(cpu);
173 if (apicid_cluster(apicid) !=
174 apicid_cluster(new_apicid)){
175 printk ("%s: Not a valid mask!\n", __func__);
176 return 0xFF;
177 }
178 apicid = new_apicid;
179 cpus_found++;
180 }
181 cpu++;
182 }
183 return apicid;
184}
185
186static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask)
187{
188 int num_bits_set;
189 int cpus_found = 0;
190 int cpu;
191 int apicid;
192
193 num_bits_set = cpus_weight(*cpumask);
194 /* Return id to all */
195 if (num_bits_set == nr_cpu_ids)
196 return cpu_to_logical_apicid(0);
197 /*
198 * The cpus in the mask must all be on the apic cluster. If are not
199 * on the same apicid cluster return default value of TARGET_CPUS.
200 */
201 cpu = first_cpu(*cpumask);
202 apicid = cpu_to_logical_apicid(cpu);
203 while (cpus_found < num_bits_set) {
204 if (cpu_isset(cpu, *cpumask)) {
205 int new_apicid = cpu_to_logical_apicid(cpu);
206 if (apicid_cluster(apicid) !=
207 apicid_cluster(new_apicid)){
208 printk ("%s: Not a valid mask!\n", __func__);
209 return cpu_to_logical_apicid(0);
210 }
211 apicid = new_apicid;
212 cpus_found++;
213 }
214 cpu++;
215 }
216 return apicid;
217}
218
219
220static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *inmask,
221 const struct cpumask *andmask)
222{
223 int apicid = cpu_to_logical_apicid(0);
224 cpumask_var_t cpumask;
225
226 if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC))
227 return apicid;
228
229 cpumask_and(cpumask, inmask, andmask);
230 cpumask_and(cpumask, cpumask, cpu_online_mask);
231 apicid = cpu_mask_to_apicid(cpumask);
232
233 free_cpumask_var(cpumask);
234 return apicid;
235}
236
237static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
238{
239 return cpuid_apic >> index_msb;
240}
241
242#endif /* __ASM_ES7000_APIC_H */
arch/x86/include/asm/es7000/apicdef.h+0−13
@@ -1,13 +0,0 @@
1#ifndef __ASM_ES7000_APICDEF_H
2#define __ASM_ES7000_APICDEF_H
3
4#define APIC_ID_MASK (0xFF<<24)
5
6static inline unsigned get_apic_id(unsigned long x)
7{
8 return (((x)>>24)&0xFF);
9}
10
11#define GET_APIC_ID(x) get_apic_id(x)
12
13#endif
arch/x86/include/asm/es7000/ipi.h+0−22
@@ -1,22 +0,0 @@
1#ifndef __ASM_ES7000_IPI_H
2#define __ASM_ES7000_IPI_H
3
4void send_IPI_mask_sequence(const struct cpumask *mask, int vector);
5void send_IPI_mask_allbutself(const struct cpumask *mask, int vector);
6
7static inline void send_IPI_mask(const struct cpumask *mask, int vector)
8{
9 send_IPI_mask_sequence(mask, vector);
10}
11
12static inline void send_IPI_allbutself(int vector)
13{
14 send_IPI_mask_allbutself(cpu_online_mask, vector);
15}
16
17static inline void send_IPI_all(int vector)
18{
19 send_IPI_mask(cpu_online_mask, vector);
20}
21
22#endif /* __ASM_ES7000_IPI_H */
arch/x86/include/asm/es7000/mpparse.h+0−29
@@ -1,29 +0,0 @@
1#ifndef __ASM_ES7000_MPPARSE_H
2#define __ASM_ES7000_MPPARSE_H
3
4#include <linux/acpi.h>
5
6extern int parse_unisys_oem (char *oemptr);
7extern int find_unisys_acpi_oem_table(unsigned long *oem_addr);
8extern void unmap_unisys_acpi_oem_table(unsigned long oem_addr);
9extern void setup_unisys(void);
10
11#ifndef CONFIG_X86_GENERICARCH
12extern int acpi_madt_oem_check(char *oem_id, char *oem_table_id);
13extern int mps_oem_check(struct mpc_table *mpc, char *oem, char *productid);
14#endif
15
16#ifdef CONFIG_ACPI
17
18static inline int es7000_check_dsdt(void)
19{
20 struct acpi_table_header header;
21
22 if (ACPI_SUCCESS(acpi_get_table_header(ACPI_SIG_DSDT, 0, &header)) &&
23 !strncmp(header.oem_id, "UNISYS", 6))
24 return 1;
25 return 0;
26}
27#endif
28
29#endif /* __ASM_MACH_MPPARSE_H */
arch/x86/include/asm/es7000/wakecpu.h+0−37
@@ -1,37 +0,0 @@
1#ifndef __ASM_ES7000_WAKECPU_H
2#define __ASM_ES7000_WAKECPU_H
3
4#define TRAMPOLINE_PHYS_LOW 0x467
5#define TRAMPOLINE_PHYS_HIGH 0x469
6
7static inline void wait_for_init_deassert(atomic_t *deassert)
8{
9#ifndef CONFIG_ES7000_CLUSTERED_APIC
10 while (!atomic_read(deassert))
11 cpu_relax();
12#endif
13 return;
14}
15
16/* Nothing to do for most platforms, since cleared by the INIT cycle */
17static inline void smp_callin_clear_local_apic(void)
18{
19}
20
21static inline void store_NMI_vector(unsigned short *high, unsigned short *low)
22{
23}
24
25static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
26{
27}
28
29extern void __inquire_remote_apic(int apicid);
30
31static inline void inquire_remote_apic(int apicid)
32{
33 if (apic_verbosity >= APIC_DEBUG)
34 __inquire_remote_apic(apicid);
35}
36
37#endif /* __ASM_MACH_WAKECPU_H */
arch/x86/include/asm/fixmap.h+137−2
@@ -1,11 +1,145 @@
1/*
2 * fixmap.h: compile-time virtual memory allocation
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1998 Ingo Molnar
9 *
10 * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999
11 * x86_32 and x86_64 integration by Gustavo F. Padovan, February 2009
12 */
13
1#ifndef _ASM_X86_FIXMAP_H14#ifndef _ASM_X86_FIXMAP_H
2#define _ASM_X86_FIXMAP_H15#define _ASM_X86_FIXMAP_H
3 16
17#ifndef __ASSEMBLY__
18#include <linux/kernel.h>
19#include <asm/acpi.h>
20#include <asm/apicdef.h>
21#include <asm/page.h>
22#ifdef CONFIG_X86_32
23#include <linux/threads.h>
24#include <asm/kmap_types.h>
25#else
26#include <asm/vsyscall.h>
27#endif
28
29/*
30 * We can't declare FIXADDR_TOP as variable for x86_64 because vsyscall
31 * uses fixmaps that relies on FIXADDR_TOP for proper address calculation.
32 * Because of this, FIXADDR_TOP x86 integration was left as later work.
33 */
34#ifdef CONFIG_X86_32
35/* used by vmalloc.c, vsyscall.lds.S.
36 *
37 * Leave one empty page between vmalloc'ed areas and
38 * the start of the fixmap.
39 */
40extern unsigned long __FIXADDR_TOP;
41#define FIXADDR_TOP ((unsigned long)__FIXADDR_TOP)
42
43#define FIXADDR_USER_START __fix_to_virt(FIX_VDSO)
44#define FIXADDR_USER_END __fix_to_virt(FIX_VDSO - 1)
45#else
46#define FIXADDR_TOP (VSYSCALL_END-PAGE_SIZE)
47
48/* Only covers 32bit vsyscalls currently. Need another set for 64bit. */
49#define FIXADDR_USER_START ((unsigned long)VSYSCALL32_VSYSCALL)
50#define FIXADDR_USER_END (FIXADDR_USER_START + PAGE_SIZE)
51#endif
52
53
54/*
55 * Here we define all the compile-time 'special' virtual
56 * addresses. The point is to have a constant address at
57 * compile time, but to set the physical address only
58 * in the boot process.
59 * for x86_32: We allocate these special addresses
60 * from the end of virtual memory (0xfffff000) backwards.
61 * Also this lets us do fail-safe vmalloc(), we
62 * can guarantee that these special addresses and
63 * vmalloc()-ed addresses never overlap.
64 *
65 * These 'compile-time allocated' memory buffers are
66 * fixed-size 4k pages (or larger if used with an increment
67 * higher than 1). Use set_fixmap(idx,phys) to associate
68 * physical memory with fixmap indices.
69 *
70 * TLB entries of such buffers will not be flushed across
71 * task switches.
72 */
73enum fixed_addresses {
4#ifdef CONFIG_X86_3274#ifdef CONFIG_X86_32
5# include "fixmap_32.h"75 FIX_HOLE,
76 FIX_VDSO,
6#else77#else
7# include "fixmap_64.h"78 VSYSCALL_LAST_PAGE,
79 VSYSCALL_FIRST_PAGE = VSYSCALL_LAST_PAGE
80 + ((VSYSCALL_END-VSYSCALL_START) >> PAGE_SHIFT) - 1,
81 VSYSCALL_HPET,
8#endif82#endif
83 FIX_DBGP_BASE,
84 FIX_EARLYCON_MEM_BASE,
85#ifdef CONFIG_X86_LOCAL_APIC
86 FIX_APIC_BASE, /* local (CPU) APIC) -- required for SMP or not */
87#endif
88#ifdef CONFIG_X86_IO_APIC
89 FIX_IO_APIC_BASE_0,
90 FIX_IO_APIC_BASE_END = FIX_IO_APIC_BASE_0 + MAX_IO_APICS - 1,
91#endif
92#ifdef CONFIG_X86_VISWS_APIC
93 FIX_CO_CPU, /* Cobalt timer */
94 FIX_CO_APIC, /* Cobalt APIC Redirection Table */
95 FIX_LI_PCIA, /* Lithium PCI Bridge A */
96 FIX_LI_PCIB, /* Lithium PCI Bridge B */
97#endif
98#ifdef CONFIG_X86_F00F_BUG
99 FIX_F00F_IDT, /* Virtual mapping for IDT */
100#endif
101#ifdef CONFIG_X86_CYCLONE_TIMER
102 FIX_CYCLONE_TIMER, /*cyclone timer register*/
103#endif
104#ifdef CONFIG_X86_32
105 FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */
106 FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1,
107#ifdef CONFIG_PCI_MMCONFIG
108 FIX_PCIE_MCFG,
109#endif
110#endif
111#ifdef CONFIG_PARAVIRT
112 FIX_PARAVIRT_BOOTMAP,
113#endif
114 __end_of_permanent_fixed_addresses,
115#ifdef CONFIG_PROVIDE_OHCI1394_DMA_INIT
116 FIX_OHCI1394_BASE,
117#endif
118 /*
119 * 256 temporary boot-time mappings, used by early_ioremap(),
120 * before ioremap() is functional.
121 *
122 * We round it up to the next 256 pages boundary so that we
123 * can have a single pgd entry and a single pte table:
124 */
125#define NR_FIX_BTMAPS 64
126#define FIX_BTMAPS_SLOTS 4
127 FIX_BTMAP_END = __end_of_permanent_fixed_addresses + 256 -
128 (__end_of_permanent_fixed_addresses & 255),
129 FIX_BTMAP_BEGIN = FIX_BTMAP_END + NR_FIX_BTMAPS*FIX_BTMAPS_SLOTS - 1,
130#ifdef CONFIG_X86_32
131 FIX_WP_TEST,
132#endif
133 __end_of_fixed_addresses
134};
135
136
137extern void reserve_top_address(unsigned long reserve);
138
139#define FIXADDR_SIZE (__end_of_permanent_fixed_addresses << PAGE_SHIFT)
140#define FIXADDR_BOOT_SIZE (__end_of_fixed_addresses << PAGE_SHIFT)
141#define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE)
142#define FIXADDR_BOOT_START (FIXADDR_TOP - FIXADDR_BOOT_SIZE)
9 143
10extern int fixmaps_set;144extern int fixmaps_set;
11 145
@@ -69,4 +203,5 @@ static inline unsigned long virt_to_fix(const unsigned long vaddr) · 57 unmodified lines
69 BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START);203 BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START);
70 return __virt_to_fix(vaddr);204 return __virt_to_fix(vaddr);
71}205}
206#endif /* !__ASSEMBLY__ */
72#endif /* _ASM_X86_FIXMAP_H */207#endif /* _ASM_X86_FIXMAP_H */
arch/x86/include/asm/fixmap_32.h+0−119
@@ -1,119 +0,0 @@
1/*
2 * fixmap.h: compile-time virtual memory allocation
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1998 Ingo Molnar
9 *
10 * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999
11 */
12
13#ifndef _ASM_X86_FIXMAP_32_H
14#define _ASM_X86_FIXMAP_32_H
15
16
17/* used by vmalloc.c, vsyscall.lds.S.
18 *
19 * Leave one empty page between vmalloc'ed areas and
20 * the start of the fixmap.
21 */
22extern unsigned long __FIXADDR_TOP;
23#define FIXADDR_USER_START __fix_to_virt(FIX_VDSO)
24#define FIXADDR_USER_END __fix_to_virt(FIX_VDSO - 1)
25
26#ifndef __ASSEMBLY__
27#include <linux/kernel.h>
28#include <asm/acpi.h>
29#include <asm/apicdef.h>
30#include <asm/page.h>
31#include <linux/threads.h>
32#include <asm/kmap_types.h>
33
34/*
35 * Here we define all the compile-time 'special' virtual
36 * addresses. The point is to have a constant address at
37 * compile time, but to set the physical address only
38 * in the boot process. We allocate these special addresses
39 * from the end of virtual memory (0xfffff000) backwards.
40 * Also this lets us do fail-safe vmalloc(), we
41 * can guarantee that these special addresses and
42 * vmalloc()-ed addresses never overlap.
43 *
44 * these 'compile-time allocated' memory buffers are
45 * fixed-size 4k pages. (or larger if used with an increment
46 * highger than 1) use fixmap_set(idx,phys) to associate
47 * physical memory with fixmap indices.
48 *
49 * TLB entries of such buffers will not be flushed across
50 * task switches.
51 */
52enum fixed_addresses {
53 FIX_HOLE,
54 FIX_VDSO,
55 FIX_DBGP_BASE,
56 FIX_EARLYCON_MEM_BASE,
57#ifdef CONFIG_X86_LOCAL_APIC
58 FIX_APIC_BASE, /* local (CPU) APIC) -- required for SMP or not */
59#endif
60#ifdef CONFIG_X86_IO_APIC
61 FIX_IO_APIC_BASE_0,
62 FIX_IO_APIC_BASE_END = FIX_IO_APIC_BASE_0 + MAX_IO_APICS-1,
63#endif
64#ifdef CONFIG_X86_VISWS_APIC
65 FIX_CO_CPU, /* Cobalt timer */
66 FIX_CO_APIC, /* Cobalt APIC Redirection Table */
67 FIX_LI_PCIA, /* Lithium PCI Bridge A */
68 FIX_LI_PCIB, /* Lithium PCI Bridge B */
69#endif
70#ifdef CONFIG_X86_F00F_BUG
71 FIX_F00F_IDT, /* Virtual mapping for IDT */
72#endif
73#ifdef CONFIG_X86_CYCLONE_TIMER
74 FIX_CYCLONE_TIMER, /*cyclone timer register*/
75#endif
76 FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */
77 FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1,
78#ifdef CONFIG_PCI_MMCONFIG
79 FIX_PCIE_MCFG,
80#endif
81#ifdef CONFIG_PARAVIRT
82 FIX_PARAVIRT_BOOTMAP,
83#endif
84 __end_of_permanent_fixed_addresses,
85 /*
86 * 256 temporary boot-time mappings, used by early_ioremap(),
87 * before ioremap() is functional.
88 *
89 * We round it up to the next 256 pages boundary so that we
90 * can have a single pgd entry and a single pte table:
91 */
92#define NR_FIX_BTMAPS 64
93#define FIX_BTMAPS_SLOTS 4
94 FIX_BTMAP_END = __end_of_permanent_fixed_addresses + 256 -
95 (__end_of_permanent_fixed_addresses & 255),
96 FIX_BTMAP_BEGIN = FIX_BTMAP_END + NR_FIX_BTMAPS*FIX_BTMAPS_SLOTS - 1,
97 FIX_WP_TEST,
98#ifdef CONFIG_ACPI
99 FIX_ACPI_BEGIN,
100 FIX_ACPI_END = FIX_ACPI_BEGIN + FIX_ACPI_PAGES - 1,
101#endif
102#ifdef CONFIG_PROVIDE_OHCI1394_DMA_INIT
103 FIX_OHCI1394_BASE,
104#endif
105 __end_of_fixed_addresses
106};
107
108extern void reserve_top_address(unsigned long reserve);
109
110
111#define FIXADDR_TOP ((unsigned long)__FIXADDR_TOP)
112
113#define __FIXADDR_SIZE (__end_of_permanent_fixed_addresses << PAGE_SHIFT)
114#define __FIXADDR_BOOT_SIZE (__end_of_fixed_addresses << PAGE_SHIFT)
115#define FIXADDR_START (FIXADDR_TOP - __FIXADDR_SIZE)
116#define FIXADDR_BOOT_START (FIXADDR_TOP - __FIXADDR_BOOT_SIZE)
117
118#endif /* !__ASSEMBLY__ */
119#endif /* _ASM_X86_FIXMAP_32_H */
arch/x86/include/asm/fixmap_64.h+0−79
@@ -1,79 +0,0 @@
1/*
2 * fixmap.h: compile-time virtual memory allocation
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1998 Ingo Molnar
9 */
10
11#ifndef _ASM_X86_FIXMAP_64_H
12#define _ASM_X86_FIXMAP_64_H
13
14#include <linux/kernel.h>
15#include <asm/acpi.h>
16#include <asm/apicdef.h>
17#include <asm/page.h>
18#include <asm/vsyscall.h>
19
20/*
21 * Here we define all the compile-time 'special' virtual
22 * addresses. The point is to have a constant address at
23 * compile time, but to set the physical address only
24 * in the boot process.
25 *
26 * These 'compile-time allocated' memory buffers are
27 * fixed-size 4k pages (or larger if used with an increment
28 * higher than 1). Use set_fixmap(idx,phys) to associate
29 * physical memory with fixmap indices.
30 *
31 * TLB entries of such buffers will not be flushed across
32 * task switches.
33 */
34
35enum fixed_addresses {
36 VSYSCALL_LAST_PAGE,
37 VSYSCALL_FIRST_PAGE = VSYSCALL_LAST_PAGE
38 + ((VSYSCALL_END-VSYSCALL_START) >> PAGE_SHIFT) - 1,
39 VSYSCALL_HPET,
40 FIX_DBGP_BASE,
41 FIX_EARLYCON_MEM_BASE,
42 FIX_APIC_BASE, /* local (CPU) APIC) -- required for SMP or not */
43 FIX_IO_APIC_BASE_0,
44 FIX_IO_APIC_BASE_END = FIX_IO_APIC_BASE_0 + MAX_IO_APICS - 1,
45#ifdef CONFIG_PARAVIRT
46 FIX_PARAVIRT_BOOTMAP,
47#endif
48 __end_of_permanent_fixed_addresses,
49#ifdef CONFIG_ACPI
50 FIX_ACPI_BEGIN,
51 FIX_ACPI_END = FIX_ACPI_BEGIN + FIX_ACPI_PAGES - 1,
52#endif
53#ifdef CONFIG_PROVIDE_OHCI1394_DMA_INIT
54 FIX_OHCI1394_BASE,
55#endif
56 /*
57 * 256 temporary boot-time mappings, used by early_ioremap(),
58 * before ioremap() is functional.
59 *
60 * We round it up to the next 256 pages boundary so that we
61 * can have a single pgd entry and a single pte table:
62 */
63#define NR_FIX_BTMAPS 64
64#define FIX_BTMAPS_SLOTS 4
65 FIX_BTMAP_END = __end_of_permanent_fixed_addresses + 256 -
66 (__end_of_permanent_fixed_addresses & 255),
67 FIX_BTMAP_BEGIN = FIX_BTMAP_END + NR_FIX_BTMAPS*FIX_BTMAPS_SLOTS - 1,
68 __end_of_fixed_addresses
69};
70
71#define FIXADDR_TOP (VSYSCALL_END-PAGE_SIZE)
72#define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT)
73#define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE)
74
75/* Only covers 32bit vsyscalls currently. Need another set for 64bit. */
76#define FIXADDR_USER_START ((unsigned long)VSYSCALL32_VSYSCALL)
77#define FIXADDR_USER_END (FIXADDR_USER_START + PAGE_SIZE)
78
79#endif /* _ASM_X86_FIXMAP_64_H */
arch/x86/include/asm/genapic.h+1−5
@@ -1,5 +1 @@
1#ifdef CONFIG_X86_321#include <asm/apic.h>
2# include "genapic_32.h"
3#else
4# include "genapic_64.h"
5#endif
arch/x86/include/asm/genapic_32.h+0−148
@@ -1,148 +0,0 @@
1#ifndef _ASM_X86_GENAPIC_32_H
2#define _ASM_X86_GENAPIC_32_H
3
4#include <asm/mpspec.h>
5#include <asm/atomic.h>
6
7/*
8 * Generic APIC driver interface.
9 *
10 * An straight forward mapping of the APIC related parts of the
11 * x86 subarchitecture interface to a dynamic object.
12 *
13 * This is used by the "generic" x86 subarchitecture.
14 *
15 * Copyright 2003 Andi Kleen, SuSE Labs.
16 */
17
18struct mpc_bus;
19struct mpc_table;
20struct mpc_cpu;
21
22struct genapic {
23 char *name;
24 int (*probe)(void);
25
26 int (*apic_id_registered)(void);
27 const struct cpumask *(*target_cpus)(void);
28 int int_delivery_mode;
29 int int_dest_mode;
30 int ESR_DISABLE;
31 int apic_destination_logical;
32 unsigned long (*check_apicid_used)(physid_mask_t bitmap, int apicid);
33 unsigned long (*check_apicid_present)(int apicid);
34 int no_balance_irq;
35 int no_ioapic_check;
36 void (*init_apic_ldr)(void);
37 physid_mask_t (*ioapic_phys_id_map)(physid_mask_t map);
38
39 void (*setup_apic_routing)(void);
40 int (*multi_timer_check)(int apic, int irq);
41 int (*apicid_to_node)(int logical_apicid);
42 int (*cpu_to_logical_apicid)(int cpu);
43 int (*cpu_present_to_apicid)(int mps_cpu);
44 physid_mask_t (*apicid_to_cpu_present)(int phys_apicid);
45 void (*setup_portio_remap)(void);
46 int (*check_phys_apicid_present)(int boot_cpu_physical_apicid);
47 void (*enable_apic_mode)(void);
48 u32 (*phys_pkg_id)(u32 cpuid_apic, int index_msb);
49
50 /* mpparse */
51 /* When one of the next two hooks returns 1 the genapic
52 is switched to this. Essentially they are additional probe
53 functions. */
54 int (*mps_oem_check)(struct mpc_table *mpc, char *oem,
55 char *productid);
56 int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id);
57
58 unsigned (*get_apic_id)(unsigned long x);
59 unsigned long apic_id_mask;
60 unsigned int (*cpu_mask_to_apicid)(const struct cpumask *cpumask);
61 unsigned int (*cpu_mask_to_apicid_and)(const struct cpumask *cpumask,
62 const struct cpumask *andmask);
63 void (*vector_allocation_domain)(int cpu, struct cpumask *retmask);
64
65#ifdef CONFIG_SMP
66 /* ipi */
67 void (*send_IPI_mask)(const struct cpumask *mask, int vector);
68 void (*send_IPI_mask_allbutself)(const struct cpumask *mask,
69 int vector);
70 void (*send_IPI_allbutself)(int vector);
71 void (*send_IPI_all)(int vector);
72#endif
73 int (*wakeup_cpu)(int apicid, unsigned long start_eip);
74 int trampoline_phys_low;
75 int trampoline_phys_high;
76 void (*wait_for_init_deassert)(atomic_t *deassert);
77 void (*smp_callin_clear_local_apic)(void);
78 void (*store_NMI_vector)(unsigned short *high, unsigned short *low);
79 void (*restore_NMI_vector)(unsigned short *high, unsigned short *low);
80 void (*inquire_remote_apic)(int apicid);
81};
82
83#define APICFUNC(x) .x = x,
84
85/* More functions could be probably marked IPIFUNC and save some space
86 in UP GENERICARCH kernels, but I don't have the nerve right now
87 to untangle this mess. -AK */
88#ifdef CONFIG_SMP
89#define IPIFUNC(x) APICFUNC(x)
90#else
91#define IPIFUNC(x)
92#endif
93
94#define APIC_INIT(aname, aprobe) \
95{ \
96 .name = aname, \
97 .probe = aprobe, \
98 .int_delivery_mode = INT_DELIVERY_MODE, \
99 .int_dest_mode = INT_DEST_MODE, \
100 .no_balance_irq = NO_BALANCE_IRQ, \
101 .ESR_DISABLE = esr_disable, \
102 .apic_destination_logical = APIC_DEST_LOGICAL, \
103 APICFUNC(apic_id_registered) \
104 APICFUNC(target_cpus) \
105 APICFUNC(check_apicid_used) \
106 APICFUNC(check_apicid_present) \
107 APICFUNC(init_apic_ldr) \
108 APICFUNC(ioapic_phys_id_map) \
109 APICFUNC(setup_apic_routing) \
110 APICFUNC(multi_timer_check) \
111 APICFUNC(apicid_to_node) \
112 APICFUNC(cpu_to_logical_apicid) \
113 APICFUNC(cpu_present_to_apicid) \
114 APICFUNC(apicid_to_cpu_present) \
115 APICFUNC(setup_portio_remap) \
116 APICFUNC(check_phys_apicid_present) \
117 APICFUNC(mps_oem_check) \
118 APICFUNC(get_apic_id) \
119 .apic_id_mask = APIC_ID_MASK, \
120 APICFUNC(cpu_mask_to_apicid) \
121 APICFUNC(cpu_mask_to_apicid_and) \
122 APICFUNC(vector_allocation_domain) \
123 APICFUNC(acpi_madt_oem_check) \
124 IPIFUNC(send_IPI_mask) \
125 IPIFUNC(send_IPI_allbutself) \
126 IPIFUNC(send_IPI_all) \
127 APICFUNC(enable_apic_mode) \
128 APICFUNC(phys_pkg_id) \
129 .trampoline_phys_low = TRAMPOLINE_PHYS_LOW, \
130 .trampoline_phys_high = TRAMPOLINE_PHYS_HIGH, \
131 APICFUNC(wait_for_init_deassert) \
132 APICFUNC(smp_callin_clear_local_apic) \
133 APICFUNC(store_NMI_vector) \
134 APICFUNC(restore_NMI_vector) \
135 APICFUNC(inquire_remote_apic) \
136}
137
138extern struct genapic *genapic;
139extern void es7000_update_genapic_to_cluster(void);
140
141enum uv_system_type {UV_NONE, UV_LEGACY_APIC, UV_X2APIC, UV_NON_UNIQUE_APIC};
142#define get_uv_system_type() UV_NONE
143#define is_uv_system() 0
144#define uv_wakeup_secondary(a, b) 1
145#define uv_system_init() do {} while (0)
146
147
148#endif /* _ASM_X86_GENAPIC_32_H */
arch/x86/include/asm/genapic_64.h+0−66
@@ -1,66 +0,0 @@
1#ifndef _ASM_X86_GENAPIC_64_H
2#define _ASM_X86_GENAPIC_64_H
3
4#include <linux/cpumask.h>
5
6/*
7 * Copyright 2004 James Cleverdon, IBM.
8 * Subject to the GNU Public License, v.2
9 *
10 * Generic APIC sub-arch data struct.
11 *
12 * Hacked for x86-64 by James Cleverdon from i386 architecture code by
13 * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
14 * James Cleverdon.
15 */
16
17struct genapic {
18 char *name;
19 int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id);
20 u32 int_delivery_mode;
21 u32 int_dest_mode;
22 int (*apic_id_registered)(void);
23 const struct cpumask *(*target_cpus)(void);
24 void (*vector_allocation_domain)(int cpu, struct cpumask *retmask);
25 void (*init_apic_ldr)(void);
26 /* ipi */
27 void (*send_IPI_mask)(const struct cpumask *mask, int vector);
28 void (*send_IPI_mask_allbutself)(const struct cpumask *mask,
29 int vector);
30 void (*send_IPI_allbutself)(int vector);
31 void (*send_IPI_all)(int vector);
32 void (*send_IPI_self)(int vector);
33 /* */
34 unsigned int (*cpu_mask_to_apicid)(const struct cpumask *cpumask);
35 unsigned int (*cpu_mask_to_apicid_and)(const struct cpumask *cpumask,
36 const struct cpumask *andmask);
37 unsigned int (*phys_pkg_id)(int index_msb);
38 unsigned int (*get_apic_id)(unsigned long x);
39 unsigned long (*set_apic_id)(unsigned int id);
40 unsigned long apic_id_mask;
41 /* wakeup_secondary_cpu */
42 int (*wakeup_cpu)(int apicid, unsigned long start_eip);
43};
44
45extern struct genapic *genapic;
46
47extern struct genapic apic_flat;
48extern struct genapic apic_physflat;
49extern struct genapic apic_x2apic_cluster;
50extern struct genapic apic_x2apic_phys;
51extern int acpi_madt_oem_check(char *, char *);
52
53extern void apic_send_IPI_self(int vector);
54enum uv_system_type {UV_NONE, UV_LEGACY_APIC, UV_X2APIC, UV_NON_UNIQUE_APIC};
55extern enum uv_system_type get_uv_system_type(void);
56extern int is_uv_system(void);
57
58extern struct genapic apic_x2apic_uv_x;
59DECLARE_PER_CPU(int, x2apic_extra_bits);
60extern void uv_cpu_init(void);
61extern void uv_system_init(void);
62extern int uv_wakeup_secondary(int phys_apicid, unsigned int start_rip);
63
64extern void setup_apic_routing(void);
65
66#endif /* _ASM_X86_GENAPIC_64_H */
arch/x86/include/asm/hardirq.h+45−4
@@ -1,11 +1,52 @@
1#ifdef CONFIG_X86_321#ifndef _ASM_X86_HARDIRQ_H
2# include "hardirq_32.h"2#define _ASM_X86_HARDIRQ_H
3#else3
4# include "hardirq_64.h"4#include <linux/threads.h>
5#include <linux/irq.h>
6
7typedef struct {
8 unsigned int __softirq_pending;
9 unsigned int __nmi_count; /* arch dependent */
10 unsigned int irq0_irqs;
11#ifdef CONFIG_X86_LOCAL_APIC
12 unsigned int apic_timer_irqs; /* arch dependent */
13 unsigned int irq_spurious_count;
14#endif
15#ifdef CONFIG_SMP
16 unsigned int irq_resched_count;
17 unsigned int irq_call_count;
18 unsigned int irq_tlb_count;
19#endif
20#ifdef CONFIG_X86_MCE
21 unsigned int irq_thermal_count;
22# ifdef CONFIG_X86_64
23 unsigned int irq_threshold_count;
24# endif
5#endif25#endif
26} ____cacheline_aligned irq_cpustat_t;
27
28DECLARE_PER_CPU(irq_cpustat_t, irq_stat);
29
30/* We can have at most NR_VECTORS irqs routed to a cpu at a time */
31#define MAX_HARDIRQS_PER_CPU NR_VECTORS
32
33#define __ARCH_IRQ_STAT
34
35#define inc_irq_stat(member) percpu_add(irq_stat.member, 1)
36
37#define local_softirq_pending() percpu_read(irq_stat.__softirq_pending)
38
39#define __ARCH_SET_SOFTIRQ_PENDING
40
41#define set_softirq_pending(x) percpu_write(irq_stat.__softirq_pending, (x))
42#define or_softirq_pending(x) percpu_or(irq_stat.__softirq_pending, (x))
43
44extern void ack_bad_irq(unsigned int irq);
6 45
7extern u64 arch_irq_stat_cpu(unsigned int cpu);46extern u64 arch_irq_stat_cpu(unsigned int cpu);
8#define arch_irq_stat_cpu arch_irq_stat_cpu47#define arch_irq_stat_cpu arch_irq_stat_cpu
9 48
10extern u64 arch_irq_stat(void);49extern u64 arch_irq_stat(void);
11#define arch_irq_stat arch_irq_stat50#define arch_irq_stat arch_irq_stat
51
52#endif /* _ASM_X86_HARDIRQ_H */
arch/x86/include/asm/hardirq_32.h+0−30
@@ -1,30 +0,0 @@
1#ifndef _ASM_X86_HARDIRQ_32_H
2#define _ASM_X86_HARDIRQ_32_H
3
4#include <linux/threads.h>
5#include <linux/irq.h>
6
7typedef struct {
8 unsigned int __softirq_pending;
9 unsigned long idle_timestamp;
10 unsigned int __nmi_count; /* arch dependent */
11 unsigned int apic_timer_irqs; /* arch dependent */
12 unsigned int irq0_irqs;
13 unsigned int irq_resched_count;
14 unsigned int irq_call_count;
15 unsigned int irq_tlb_count;
16 unsigned int irq_thermal_count;
17 unsigned int irq_spurious_count;
18} ____cacheline_aligned irq_cpustat_t;
19
20DECLARE_PER_CPU(irq_cpustat_t, irq_stat);
21
22#define __ARCH_IRQ_STAT
23#define __IRQ_STAT(cpu, member) (per_cpu(irq_stat, cpu).member)
24
25#define inc_irq_stat(member) (__get_cpu_var(irq_stat).member++)
26
27void ack_bad_irq(unsigned int irq);
28#include <linux/irq_cpustat.h>
29
30#endif /* _ASM_X86_HARDIRQ_32_H */
arch/x86/include/asm/hardirq_64.h+0−25
@@ -1,25 +0,0 @@
1#ifndef _ASM_X86_HARDIRQ_64_H
2#define _ASM_X86_HARDIRQ_64_H
3
4#include <linux/threads.h>
5#include <linux/irq.h>
6#include <asm/pda.h>
7#include <asm/apic.h>
8
9/* We can have at most NR_VECTORS irqs routed to a cpu at a time */
10#define MAX_HARDIRQS_PER_CPU NR_VECTORS
11
12#define __ARCH_IRQ_STAT 1
13
14#define inc_irq_stat(member) add_pda(member, 1)
15
16#define local_softirq_pending() read_pda(__softirq_pending)
17
18#define __ARCH_SET_SOFTIRQ_PENDING 1
19
20#define set_softirq_pending(x) write_pda(__softirq_pending, (x))
21#define or_softirq_pending(x) or_pda(__softirq_pending, (x))
22
23extern void ack_bad_irq(unsigned int irq);
24
25#endif /* _ASM_X86_HARDIRQ_64_H */
arch/x86/include/asm/hw_irq.h+2−22
@@ -25,8 +25,6 @@ · 24 unmodified lines
25#include <asm/irq.h>25#include <asm/irq.h>
26#include <asm/sections.h>26#include <asm/sections.h>
27 27
28#define platform_legacy_irq(irq) ((irq) < 16)
29
30/* Interrupt handlers registered during init_IRQ */28/* Interrupt handlers registered during init_IRQ */
31extern void apic_timer_interrupt(void);29extern void apic_timer_interrupt(void);
32extern void error_interrupt(void);30extern void error_interrupt(void);
@@ -58,7 +56,7 @@ extern void make_8259A_irq(unsigned int irq); · 25 unmodified lines
58extern void init_8259A(int aeoi);56extern void init_8259A(int aeoi);
59 57
60/* IOAPIC */58/* IOAPIC */
61#define IO_APIC_IRQ(x) (((x) >= 16) || ((1<<(x)) & io_apic_irqs))59#define IO_APIC_IRQ(x) (((x) >= NR_IRQS_LEGACY) || ((1<<(x)) & io_apic_irqs))
62extern unsigned long io_apic_irqs;60extern unsigned long io_apic_irqs;
63 61
64extern void init_VISWS_APIC_irqs(void);62extern void init_VISWS_APIC_irqs(void);
@@ -67,15 +65,7 @@ extern void disable_IO_APIC(void); · 2 unmodified lines
67extern int IO_APIC_get_PCI_irq_vector(int bus, int slot, int fn);65extern int IO_APIC_get_PCI_irq_vector(int bus, int slot, int fn);
68extern void setup_ioapic_dest(void);66extern void setup_ioapic_dest(void);
69 67
70#ifdef CONFIG_X86_64
71extern void enable_IO_APIC(void);68extern void enable_IO_APIC(void);
72#endif
73
74/* IPI functions */
75#ifdef CONFIG_X86_32
76extern void send_IPI_self(int vector);
77#endif
78extern void send_IPI(int dest, int vector);
79 69
80/* Statistics */70/* Statistics */
81extern atomic_t irq_err_count;71extern atomic_t irq_err_count;
@@ -84,21 +74,11 @@ extern atomic_t irq_mis_count; · 2 unmodified lines
84/* EISA */74/* EISA */
85extern void eisa_set_level_irq(unsigned int irq);75extern void eisa_set_level_irq(unsigned int irq);
86 76
87/* Voyager functions */
88extern asmlinkage void vic_cpi_interrupt(void);
89extern asmlinkage void vic_sys_interrupt(void);
90extern asmlinkage void vic_cmn_interrupt(void);
91extern asmlinkage void qic_timer_interrupt(void);
92extern asmlinkage void qic_invalidate_interrupt(void);
93extern asmlinkage void qic_reschedule_interrupt(void);
94extern asmlinkage void qic_enable_irq_interrupt(void);
95extern asmlinkage void qic_call_function_interrupt(void);
96
97/* SMP */77/* SMP */
98extern void smp_apic_timer_interrupt(struct pt_regs *);78extern void smp_apic_timer_interrupt(struct pt_regs *);
99extern void smp_spurious_interrupt(struct pt_regs *);79extern void smp_spurious_interrupt(struct pt_regs *);
100extern void smp_error_interrupt(struct pt_regs *);80extern void smp_error_interrupt(struct pt_regs *);
101#ifdef CONFIG_X86_SMP81#ifdef CONFIG_SMP
102extern void smp_reschedule_interrupt(struct pt_regs *);82extern void smp_reschedule_interrupt(struct pt_regs *);
103extern void smp_call_function_interrupt(struct pt_regs *);83extern void smp_call_function_interrupt(struct pt_regs *);
104extern void smp_call_function_single_interrupt(struct pt_regs *);84extern void smp_call_function_single_interrupt(struct pt_regs *);
arch/x86/include/asm/i8259.h+4−0
@@ -60,4 +60,8 @@ extern struct irq_chip i8259A_chip; · 59 unmodified lines
60extern void mask_8259A(void);60extern void mask_8259A(void);
61extern void unmask_8259A(void);61extern void unmask_8259A(void);
62 62
63#ifdef CONFIG_X86_32
64extern void init_ISA_irqs(void);
65#endif
66
63#endif /* _ASM_X86_I8259_H */67#endif /* _ASM_X86_I8259_H */
arch/x86/include/asm/io.h+95−2
@@ -5,6 +5,7 @@ · 4 unmodified lines
5 5
6#include <linux/compiler.h>6#include <linux/compiler.h>
7#include <asm-generic/int-ll64.h>7#include <asm-generic/int-ll64.h>
8#include <asm/page.h>
8 9
9#define build_mmio_read(name, size, type, reg, barrier) \10#define build_mmio_read(name, size, type, reg, barrier) \
10static inline type name(const volatile void __iomem *addr) \11static inline type name(const volatile void __iomem *addr) \
@@ -80,6 +81,98 @@ static inline void writeq(__u64 val, volatile void __iomem *addr) · 69 unmodified lines
80#define readq readq81#define readq readq
81#define writeq writeq82#define writeq writeq
82 83
84/**
85 * virt_to_phys - map virtual addresses to physical
86 * @address: address to remap
87 *
88 * The returned physical address is the physical (CPU) mapping for
89 * the memory address given. It is only valid to use this function on
90 * addresses directly mapped or allocated via kmalloc.
91 *
92 * This function does not give bus mappings for DMA transfers. In
93 * almost all conceivable cases a device driver should not be using
94 * this function
95 */
96
97static inline phys_addr_t virt_to_phys(volatile void *address)
98{
99 return __pa(address);
100}
101
102/**
103 * phys_to_virt - map physical address to virtual
104 * @address: address to remap
105 *
106 * The returned virtual address is a current CPU mapping for
107 * the memory address given. It is only valid to use this function on
108 * addresses that have a kernel mapping
109 *
110 * This function does not handle bus mappings for DMA transfers. In
111 * almost all conceivable cases a device driver should not be using
112 * this function
113 */
114
115static inline void *phys_to_virt(phys_addr_t address)
116{
117 return __va(address);
118}
119
120/*
121 * Change "struct page" to physical address.
122 */
123#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
124
125/*
126 * ISA I/O bus memory addresses are 1:1 with the physical address.
127 * However, we truncate the address to unsigned int to avoid undesirable
128 * promitions in legacy drivers.
129 */
130static inline unsigned int isa_virt_to_bus(volatile void *address)
131{
132 return (unsigned int)virt_to_phys(address);
133}
134#define isa_page_to_bus(page) ((unsigned int)page_to_phys(page))
135#define isa_bus_to_virt phys_to_virt
136
137/*
138 * However PCI ones are not necessarily 1:1 and therefore these interfaces
139 * are forbidden in portable PCI drivers.
140 *
141 * Allow them on x86 for legacy drivers, though.
142 */
143#define virt_to_bus virt_to_phys
144#define bus_to_virt phys_to_virt
145
146/**
147 * ioremap - map bus memory into CPU space
148 * @offset: bus address of the memory
149 * @size: size of the resource to map
150 *
151 * ioremap performs a platform specific sequence of operations to
152 * make bus memory CPU accessible via the readb/readw/readl/writeb/
153 * writew/writel functions and the other mmio helpers. The returned
154 * address is not guaranteed to be usable directly as a virtual
155 * address.
156 *
157 * If the area you are trying to map is a PCI BAR you should have a
158 * look at pci_iomap().
159 */
160extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);
161extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);
162extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size,
163 unsigned long prot_val);
164
165/*
166 * The default ioremap() behavior is non-cached:
167 */
168static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
169{
170 return ioremap_nocache(offset, size);
171}
172
173extern void iounmap(volatile void __iomem *addr);
174
175
83#ifdef CONFIG_X86_32176#ifdef CONFIG_X86_32
84# include "io_32.h"177# include "io_32.h"
85#else178#else
@@ -91,7 +184,7 @@ extern void unxlate_dev_mem_ptr(unsigned long phys, void *addr); · 5 unmodified lines
91 184
92extern int ioremap_change_attr(unsigned long vaddr, unsigned long size,185extern int ioremap_change_attr(unsigned long vaddr, unsigned long size,
93 unsigned long prot_val);186 unsigned long prot_val);
94extern void __iomem *ioremap_wc(unsigned long offset, unsigned long size);187extern void __iomem *ioremap_wc(resource_size_t offset, unsigned long size);
95 188
96/*189/*
97 * early_ioremap() and early_iounmap() are for temporary early boot-time190 * early_ioremap() and early_iounmap() are for temporary early boot-time
@@ -103,7 +196,7 @@ extern void early_ioremap_reset(void); · 5 unmodified lines
103extern void __iomem *early_ioremap(unsigned long offset, unsigned long size);196extern void __iomem *early_ioremap(unsigned long offset, unsigned long size);
104extern void __iomem *early_memremap(unsigned long offset, unsigned long size);197extern void __iomem *early_memremap(unsigned long offset, unsigned long size);
105extern void early_iounmap(void __iomem *addr, unsigned long size);198extern void early_iounmap(void __iomem *addr, unsigned long size);
106extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys);
107 199
200#define IO_SPACE_LIMIT 0xffff
108 201
109#endif /* _ASM_X86_IO_H */202#endif /* _ASM_X86_IO_H */
arch/x86/include/asm/io_32.h+0−88
@@ -37,8 +37,6 @@ · 36 unmodified lines
37 * - Arnaldo Carvalho de Melo <acme@conectiva.com.br>37 * - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
38 */38 */
39 39
40#define IO_SPACE_LIMIT 0xffff
41
42#define XQUAD_PORTIO_BASE 0xfe40000040#define XQUAD_PORTIO_BASE 0xfe400000
43#define XQUAD_PORTIO_QUAD 0x40000 /* 256k per quad. */41#define XQUAD_PORTIO_QUAD 0x40000 /* 256k per quad. */
44 42
@@ -53,92 +51,6 @@ · 8 unmodified lines
53 */51 */
54#define xlate_dev_kmem_ptr(p) p52#define xlate_dev_kmem_ptr(p) p
55 53
56/**
57 * virt_to_phys - map virtual addresses to physical
58 * @address: address to remap
59 *
60 * The returned physical address is the physical (CPU) mapping for
61 * the memory address given. It is only valid to use this function on
62 * addresses directly mapped or allocated via kmalloc.
63 *
64 * This function does not give bus mappings for DMA transfers. In
65 * almost all conceivable cases a device driver should not be using
66 * this function
67 */
68
69static inline unsigned long virt_to_phys(volatile void *address)
70{
71 return __pa(address);
72}
73
74/**
75 * phys_to_virt - map physical address to virtual
76 * @address: address to remap
77 *
78 * The returned virtual address is a current CPU mapping for
79 * the memory address given. It is only valid to use this function on
80 * addresses that have a kernel mapping
81 *
82 * This function does not handle bus mappings for DMA transfers. In
83 * almost all conceivable cases a device driver should not be using
84 * this function
85 */
86
87static inline void *phys_to_virt(unsigned long address)
88{
89 return __va(address);
90}
91
92/*
93 * Change "struct page" to physical address.
94 */
95#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
96
97/**
98 * ioremap - map bus memory into CPU space
99 * @offset: bus address of the memory
100 * @size: size of the resource to map
101 *
102 * ioremap performs a platform specific sequence of operations to
103 * make bus memory CPU accessible via the readb/readw/readl/writeb/
104 * writew/writel functions and the other mmio helpers. The returned
105 * address is not guaranteed to be usable directly as a virtual
106 * address.
107 *
108 * If the area you are trying to map is a PCI BAR you should have a
109 * look at pci_iomap().
110 */
111extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);
112extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);
113extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size,
114 unsigned long prot_val);
115
116/*
117 * The default ioremap() behavior is non-cached:
118 */
119static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
120{
121 return ioremap_nocache(offset, size);
122}
123
124extern void iounmap(volatile void __iomem *addr);
125
126/*
127 * ISA I/O bus memory addresses are 1:1 with the physical address.
128 */
129#define isa_virt_to_bus virt_to_phys
130#define isa_page_to_bus page_to_phys
131#define isa_bus_to_virt phys_to_virt
132
133/*
134 * However PCI ones are not necessarily 1:1 and therefore these interfaces
135 * are forbidden in portable PCI drivers.
136 *
137 * Allow them on x86 for legacy drivers, though.
138 */
139#define virt_to_bus virt_to_phys
140#define bus_to_virt phys_to_virt
141
142static inline void54static inline void
143memset_io(volatile void __iomem *addr, unsigned char val, int count)55memset_io(volatile void __iomem *addr, unsigned char val, int count)
144{56{
arch/x86/include/asm/io_64.h+0−61
@@ -136,73 +136,12 @@ __OUTS(b) · 135 unmodified lines
136__OUTS(w)136__OUTS(w)
137__OUTS(l)137__OUTS(l)
138 138
139#define IO_SPACE_LIMIT 0xffff
140
141#if defined(__KERNEL__) && defined(__x86_64__)139#if defined(__KERNEL__) && defined(__x86_64__)
142 140
143#include <linux/vmalloc.h>141#include <linux/vmalloc.h>
144 142
145#ifndef __i386__
146/*
147 * Change virtual addresses to physical addresses and vv.
148 * These are pretty trivial
149 */
150static inline unsigned long virt_to_phys(volatile void *address)
151{
152 return __pa(address);
153}
154
155static inline void *phys_to_virt(unsigned long address)
156{
157 return __va(address);
158}
159#endif
160
161/*
162 * Change "struct page" to physical address.
163 */
164#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
165
166#include <asm-generic/iomap.h>143#include <asm-generic/iomap.h>
167 144
168/*
169 * This one maps high address device memory and turns off caching for that area.
170 * it's useful if some control registers are in such an area and write combining
171 * or read caching is not desirable:
172 */
173extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);
174extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);
175extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size,
176 unsigned long prot_val);
177
178/*
179 * The default ioremap() behavior is non-cached:
180 */
181static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
182{
183 return ioremap_nocache(offset, size);
184}
185
186extern void iounmap(volatile void __iomem *addr);
187
188extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys);
189
190/*
191 * ISA I/O bus memory addresses are 1:1 with the physical address.
192 */
193#define isa_virt_to_bus virt_to_phys
194#define isa_page_to_bus page_to_phys
195#define isa_bus_to_virt phys_to_virt
196
197/*
198 * However PCI ones are not necessarily 1:1 and therefore these interfaces
199 * are forbidden in portable PCI drivers.
200 *
201 * Allow them on x86 for legacy drivers, though.
202 */
203#define virt_to_bus virt_to_phys
204#define bus_to_virt phys_to_virt
205
206void __memcpy_fromio(void *, unsigned long, unsigned);145void __memcpy_fromio(void *, unsigned long, unsigned);
207void __memcpy_toio(unsigned long, const void *, unsigned);146void __memcpy_toio(unsigned long, const void *, unsigned);
208 147
arch/x86/include/asm/io_apic.h+8−33
@@ -114,38 +114,16 @@ struct IR_IO_APIC_route_entry { · 113 unmodified lines
114extern int nr_ioapics;114extern int nr_ioapics;
115extern int nr_ioapic_registers[MAX_IO_APICS];115extern int nr_ioapic_registers[MAX_IO_APICS];
116 116
117/*
118 * MP-BIOS irq configuration table structures:
119 */
120
121#define MP_MAX_IOAPIC_PIN 127117#define MP_MAX_IOAPIC_PIN 127
122 118
123struct mp_config_ioapic {
124 unsigned long mp_apicaddr;
125 unsigned int mp_apicid;
126 unsigned char mp_type;
127 unsigned char mp_apicver;
128 unsigned char mp_flags;
129};
130
131struct mp_config_intsrc {
132 unsigned int mp_dstapic;
133 unsigned char mp_type;
134 unsigned char mp_irqtype;
135 unsigned short mp_irqflag;
136 unsigned char mp_srcbus;
137 unsigned char mp_srcbusirq;
138 unsigned char mp_dstirq;
139};
140
141/* I/O APIC entries */119/* I/O APIC entries */
142extern struct mp_config_ioapic mp_ioapics[MAX_IO_APICS];120extern struct mpc_ioapic mp_ioapics[MAX_IO_APICS];
143 121
144/* # of MP IRQ source entries */122/* # of MP IRQ source entries */
145extern int mp_irq_entries;123extern int mp_irq_entries;
146 124
147/* MP IRQ source entries */125/* MP IRQ source entries */
148extern struct mp_config_intsrc mp_irqs[MAX_IRQ_SOURCES];126extern struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES];
149 127
150/* non-0 if default (table-less) MP configuration */128/* non-0 if default (table-less) MP configuration */
151extern int mpc_default_type;129extern int mpc_default_type;
@@ -165,15 +143,6 @@ extern int noioapicreroute; · 13 unmodified lines
165/* 1 if the timer IRQ uses the '8259A Virtual Wire' mode */143/* 1 if the timer IRQ uses the '8259A Virtual Wire' mode */
166extern int timer_through_8259;144extern int timer_through_8259;
167 145
168static inline void disable_ioapic_setup(void)
169{
170#ifdef CONFIG_PCI
171 noioapicquirk = 1;
172 noioapicreroute = -1;
173#endif
174 skip_ioapic_setup = 1;
175}
176
177/*146/*
178 * If we use the IO-APIC for IRQ routing, disable automatic147 * If we use the IO-APIC for IRQ routing, disable automatic
179 * assignment of PCI IRQ's.148 * assignment of PCI IRQ's.
@@ -200,6 +169,12 @@ extern void reinit_intr_remapped_IO_APIC(int); · 20 unmodified lines
200 169
201extern void probe_nr_irqs_gsi(void);170extern void probe_nr_irqs_gsi(void);
202 171
172extern int setup_ioapic_entry(int apic, int irq,
173 struct IO_APIC_route_entry *entry,
174 unsigned int destination, int trigger,
175 int polarity, int vector);
176extern void ioapic_write_entry(int apic, int pin,
177 struct IO_APIC_route_entry e);
203#else /* !CONFIG_X86_IO_APIC */178#else /* !CONFIG_X86_IO_APIC */
204#define io_apic_assign_pci_irqs 0179#define io_apic_assign_pci_irqs 0
205static const int timer_through_8259 = 0;180static const int timer_through_8259 = 0;
arch/x86/include/asm/ipi.h+40−35
@@ -1,6 +1,8 @@
1#ifndef _ASM_X86_IPI_H1#ifndef _ASM_X86_IPI_H
2#define _ASM_X86_IPI_H2#define _ASM_X86_IPI_H
3 3
4#ifdef CONFIG_X86_LOCAL_APIC
5
4/*6/*
5 * Copyright 2004 James Cleverdon, IBM.7 * Copyright 2004 James Cleverdon, IBM.
6 * Subject to the GNU Public License, v.28 * Subject to the GNU Public License, v.2
@@ -55,8 +57,8 @@ static inline void __xapic_wait_icr_idle(void) · 48 unmodified lines
55 cpu_relax();57 cpu_relax();
56}58}
57 59
58static inline void __send_IPI_shortcut(unsigned int shortcut, int vector,60static inline void
59 unsigned int dest)61__default_send_IPI_shortcut(unsigned int shortcut, int vector, unsigned int dest)
60{62{
61 /*63 /*
62 * Subtle. In the case of the 'never do double writes' workaround64 * Subtle. In the case of the 'never do double writes' workaround
@@ -87,8 +89,8 @@ static inline void __send_IPI_shortcut(unsigned int shortcut, int vector, · 24 unmodified lines
87 * This is used to send an IPI with no shorthand notation (the destination is89 * This is used to send an IPI with no shorthand notation (the destination is
88 * specified in bits 56 to 63 of the ICR).90 * specified in bits 56 to 63 of the ICR).
89 */91 */
90static inline void __send_IPI_dest_field(unsigned int mask, int vector,92static inline void
91 unsigned int dest)93 __default_send_IPI_dest_field(unsigned int mask, int vector, unsigned int dest)
92{94{
93 unsigned long cfg;95 unsigned long cfg;
94 96
@@ -117,41 +119,44 @@ static inline void __send_IPI_dest_field(unsigned int mask, int vector, · 22 unmodified lines
117 native_apic_mem_write(APIC_ICR, cfg);119 native_apic_mem_write(APIC_ICR, cfg);
118}120}
119 121
120static inline void send_IPI_mask_sequence(const struct cpumask *mask,122extern void default_send_IPI_mask_sequence_phys(const struct cpumask *mask,
121 int vector)123 int vector);
122{124extern void default_send_IPI_mask_allbutself_phys(const struct cpumask *mask,
123 unsigned long flags;125 int vector);
124 unsigned long query_cpu;126extern void default_send_IPI_mask_sequence_logical(const struct cpumask *mask,
127 int vector);
128extern void default_send_IPI_mask_allbutself_logical(const struct cpumask *mask,
129 int vector);
125 130
126 /*131/* Avoid include hell */
127 * Hack. The clustered APIC addressing mode doesn't allow us to send132#define NMI_VECTOR 0x02
128 * to an arbitrary mask, so I do a unicast to each CPU instead.133
129 * - mbligh134extern int no_broadcast;
130 */135
131 local_irq_save(flags);136static inline void __default_local_send_IPI_allbutself(int vector)
132 for_each_cpu(query_cpu, mask) {137{
133 __send_IPI_dest_field(per_cpu(x86_cpu_to_apicid, query_cpu),138 if (no_broadcast || vector == NMI_VECTOR)
134 vector, APIC_DEST_PHYSICAL);139 apic->send_IPI_mask_allbutself(cpu_online_mask, vector);
135 }140 else
136 local_irq_restore(flags);141 __default_send_IPI_shortcut(APIC_DEST_ALLBUT, vector, apic->dest_logical);
137}142}
138 143
139static inline void send_IPI_mask_allbutself(const struct cpumask *mask,144static inline void __default_local_send_IPI_all(int vector)
140 int vector)
141{145{
142 unsigned long flags;146 if (no_broadcast || vector == NMI_VECTOR)
143 unsigned int query_cpu;147 apic->send_IPI_mask(cpu_online_mask, vector);
144 unsigned int this_cpu = smp_processor_id();148 else
145 149 __default_send_IPI_shortcut(APIC_DEST_ALLINC, vector, apic->dest_logical);
146 /* See Hack comment above */
147
148 local_irq_save(flags);
149 for_each_cpu(query_cpu, mask)
150 if (query_cpu != this_cpu)
151 __send_IPI_dest_field(
152 per_cpu(x86_cpu_to_apicid, query_cpu),
153 vector, APIC_DEST_PHYSICAL);
154 local_irq_restore(flags);
155}150}
156 151
152#ifdef CONFIG_X86_32
153extern void default_send_IPI_mask_logical(const struct cpumask *mask,
154 int vector);
155extern void default_send_IPI_allbutself(int vector);
156extern void default_send_IPI_all(int vector);
157extern void default_send_IPI_self(int vector);
158#endif
159
160#endif
161
157#endif /* _ASM_X86_IPI_H */162#endif /* _ASM_X86_IPI_H */
arch/x86/include/asm/irq.h+3−1
@@ -36,9 +36,11 @@ static inline int irq_canonicalize(int irq) · 35 unmodified lines
36extern void fixup_irqs(void);36extern void fixup_irqs(void);
37#endif37#endif
38 38
39extern unsigned int do_IRQ(struct pt_regs *regs);
40extern void init_IRQ(void);39extern void init_IRQ(void);
41extern void native_init_IRQ(void);40extern void native_init_IRQ(void);
41extern bool handle_irq(unsigned irq, struct pt_regs *regs);
42
43extern unsigned int do_IRQ(struct pt_regs *regs);
42 44
43/* Interrupt vector management */45/* Interrupt vector management */
44extern DECLARE_BITMAP(used_vectors, NR_VECTORS);46extern DECLARE_BITMAP(used_vectors, NR_VECTORS);
arch/x86/include/asm/irq_regs.h+31−5
@@ -1,5 +1,31 @@
1#ifdef CONFIG_X86_321/*
2# include "irq_regs_32.h"2 * Per-cpu current frame pointer - the location of the last exception frame on
3#else3 * the stack, stored in the per-cpu area.
4# include "irq_regs_64.h"4 *
5#endif5 * Jeremy Fitzhardinge <jeremy@goop.org>
6 */
7#ifndef _ASM_X86_IRQ_REGS_H
8#define _ASM_X86_IRQ_REGS_H
9
10#include <asm/percpu.h>
11
12#define ARCH_HAS_OWN_IRQ_REGS
13
14DECLARE_PER_CPU(struct pt_regs *, irq_regs);
15
16static inline struct pt_regs *get_irq_regs(void)
17{
18 return percpu_read(irq_regs);
19}
20
21static inline struct pt_regs *set_irq_regs(struct pt_regs *new_regs)
22{
23 struct pt_regs *old_regs;
24
25 old_regs = get_irq_regs();
26 percpu_write(irq_regs, new_regs);
27
28 return old_regs;
29}
30
31#endif /* _ASM_X86_IRQ_REGS_32_H */
arch/x86/include/asm/irq_regs_32.h+0−31
@@ -1,31 +0,0 @@
1/*
2 * Per-cpu current frame pointer - the location of the last exception frame on
3 * the stack, stored in the per-cpu area.
4 *
5 * Jeremy Fitzhardinge <jeremy@goop.org>
6 */
7#ifndef _ASM_X86_IRQ_REGS_32_H
8#define _ASM_X86_IRQ_REGS_32_H
9
10#include <asm/percpu.h>
11
12#define ARCH_HAS_OWN_IRQ_REGS
13
14DECLARE_PER_CPU(struct pt_regs *, irq_regs);
15
16static inline struct pt_regs *get_irq_regs(void)
17{
18 return x86_read_percpu(irq_regs);
19}
20
21static inline struct pt_regs *set_irq_regs(struct pt_regs *new_regs)
22{
23 struct pt_regs *old_regs;
24
25 old_regs = get_irq_regs();
26 x86_write_percpu(irq_regs, new_regs);
27
28 return old_regs;
29}
30
31#endif /* _ASM_X86_IRQ_REGS_32_H */
arch/x86/include/asm/irq_regs_64.h+0−1
@@ -1 +0,0 @@
1#include <asm-generic/irq_regs.h>
arch/x86/include/asm/irq_vectors.h+105−104
@@ -1,47 +1,69 @@
1#ifndef _ASM_X86_IRQ_VECTORS_H1#ifndef _ASM_X86_IRQ_VECTORS_H
2#define _ASM_X86_IRQ_VECTORS_H2#define _ASM_X86_IRQ_VECTORS_H
3 3
4#include <linux/threads.h>4/*
5 * Linux IRQ vector layout.
6 *
7 * There are 256 IDT entries (per CPU - each entry is 8 bytes) which can
8 * be defined by Linux. They are used as a jump table by the CPU when a
9 * given vector is triggered - by a CPU-external, CPU-internal or
10 * software-triggered event.
11 *
12 * Linux sets the kernel code address each entry jumps to early during
13 * bootup, and never changes them. This is the general layout of the
14 * IDT entries:
15 *
16 * Vectors 0 ... 31 : system traps and exceptions - hardcoded events
17 * Vectors 32 ... 127 : device interrupts
18 * Vector 128 : legacy int80 syscall interface
19 * Vectors 129 ... 237 : device interrupts
20 * Vectors 238 ... 255 : special interrupts
21 *
22 * 64-bit x86 has per CPU IDT tables, 32-bit has one shared IDT table.
23 *
24 * This file enumerates the exact layout of them:
25 */
5 26
6#define NMI_VECTOR 0x0227#define NMI_VECTOR 0x02
7 28
8/*29/*
9 * IDT vectors usable for external interrupt sources start30 * IDT vectors usable for external interrupt sources start
10 * at 0x20:31 * at 0x20:
11 */32 */
12#define FIRST_EXTERNAL_VECTOR 0x2033#define FIRST_EXTERNAL_VECTOR 0x20
13 34
14#ifdef CONFIG_X86_3235#ifdef CONFIG_X86_32
15# define SYSCALL_VECTOR 0x8036# define SYSCALL_VECTOR 0x80
16#else37#else
17# define IA32_SYSCALL_VECTOR 0x8038# define IA32_SYSCALL_VECTOR 0x80
18#endif39#endif
19 40
20/*41/*
21 * Reserve the lowest usable priority level 0x20 - 0x2f for triggering42 * Reserve the lowest usable priority level 0x20 - 0x2f for triggering
22 * cleanup after irq migration.43 * cleanup after irq migration.
23 */44 */
24#define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR45#define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR
25 46
26/*47/*
27 * Vectors 0x30-0x3f are used for ISA interrupts.48 * Vectors 0x30-0x3f are used for ISA interrupts.
28 */49 */
29#define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10)50#define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10)
30#define IRQ1_VECTOR (IRQ0_VECTOR + 1)51
31#define IRQ2_VECTOR (IRQ0_VECTOR + 2)52#define IRQ1_VECTOR (IRQ0_VECTOR + 1)
32#define IRQ3_VECTOR (IRQ0_VECTOR + 3)53#define IRQ2_VECTOR (IRQ0_VECTOR + 2)
33#define IRQ4_VECTOR (IRQ0_VECTOR + 4)54#define IRQ3_VECTOR (IRQ0_VECTOR + 3)
34#define IRQ5_VECTOR (IRQ0_VECTOR + 5)55#define IRQ4_VECTOR (IRQ0_VECTOR + 4)
35#define IRQ6_VECTOR (IRQ0_VECTOR + 6)56#define IRQ5_VECTOR (IRQ0_VECTOR + 5)
36#define IRQ7_VECTOR (IRQ0_VECTOR + 7)57#define IRQ6_VECTOR (IRQ0_VECTOR + 6)
37#define IRQ8_VECTOR (IRQ0_VECTOR + 8)58#define IRQ7_VECTOR (IRQ0_VECTOR + 7)
38#define IRQ9_VECTOR (IRQ0_VECTOR + 9)59#define IRQ8_VECTOR (IRQ0_VECTOR + 8)
39#define IRQ10_VECTOR (IRQ0_VECTOR + 10)60#define IRQ9_VECTOR (IRQ0_VECTOR + 9)
40#define IRQ11_VECTOR (IRQ0_VECTOR + 11)61#define IRQ10_VECTOR (IRQ0_VECTOR + 10)
41#define IRQ12_VECTOR (IRQ0_VECTOR + 12)62#define IRQ11_VECTOR (IRQ0_VECTOR + 11)
42#define IRQ13_VECTOR (IRQ0_VECTOR + 13)63#define IRQ12_VECTOR (IRQ0_VECTOR + 12)
43#define IRQ14_VECTOR (IRQ0_VECTOR + 14)64#define IRQ13_VECTOR (IRQ0_VECTOR + 13)
44#define IRQ15_VECTOR (IRQ0_VECTOR + 15)65#define IRQ14_VECTOR (IRQ0_VECTOR + 14)
66#define IRQ15_VECTOR (IRQ0_VECTOR + 15)
45 67
46/*68/*
47 * Special IRQ vectors used by the SMP architecture, 0xf0-0xff69 * Special IRQ vectors used by the SMP architecture, 0xf0-0xff
@@ -49,119 +71,98 @@ · 1 unmodified line
49 * some of the following vectors are 'rare', they are merged71 * some of the following vectors are 'rare', they are merged
50 * into a single vector (CALL_FUNCTION_VECTOR) to save vector space.72 * into a single vector (CALL_FUNCTION_VECTOR) to save vector space.
51 * TLB, reschedule and local APIC vectors are performance-critical.73 * TLB, reschedule and local APIC vectors are performance-critical.
52 *
53 * Vectors 0xf0-0xfa are free (reserved for future Linux use).
54 */74 */
55#ifdef CONFIG_X86_32
56
57# define SPURIOUS_APIC_VECTOR 0xff
58# define ERROR_APIC_VECTOR 0xfe
59# define INVALIDATE_TLB_VECTOR 0xfd
60# define RESCHEDULE_VECTOR 0xfc
61# define CALL_FUNCTION_VECTOR 0xfb
62# define CALL_FUNCTION_SINGLE_VECTOR 0xfa
63# define THERMAL_APIC_VECTOR 0xf0
64
65#else
66 75
67#define SPURIOUS_APIC_VECTOR 0xff76#define SPURIOUS_APIC_VECTOR 0xff
77/*
78 * Sanity check
79 */
80#if ((SPURIOUS_APIC_VECTOR & 0x0F) != 0x0F)
81# error SPURIOUS_APIC_VECTOR definition error
82#endif
83
68#define ERROR_APIC_VECTOR 0xfe84#define ERROR_APIC_VECTOR 0xfe
69#define RESCHEDULE_VECTOR 0xfd85#define RESCHEDULE_VECTOR 0xfd
70#define CALL_FUNCTION_VECTOR 0xfc86#define CALL_FUNCTION_VECTOR 0xfc
71#define CALL_FUNCTION_SINGLE_VECTOR 0xfb87#define CALL_FUNCTION_SINGLE_VECTOR 0xfb
72#define THERMAL_APIC_VECTOR 0xfa88#define THERMAL_APIC_VECTOR 0xfa
73#define THRESHOLD_APIC_VECTOR 0xf9
74#define UV_BAU_MESSAGE 0xf8
75#define INVALIDATE_TLB_VECTOR_END 0xf7
76#define INVALIDATE_TLB_VECTOR_START 0xf0 /* f0-f7 used for TLB flush */
77
78#define NUM_INVALIDATE_TLB_VECTORS 8
79 89
90#ifdef CONFIG_X86_32
91/* 0xf8 - 0xf9 : free */
92#else
93# define THRESHOLD_APIC_VECTOR 0xf9
94# define UV_BAU_MESSAGE 0xf8
80#endif95#endif
81 96
97/* f0-f7 used for spreading out TLB flushes: */
98#define INVALIDATE_TLB_VECTOR_END 0xf7
99#define INVALIDATE_TLB_VECTOR_START 0xf0
100#define NUM_INVALIDATE_TLB_VECTORS 8
101
82/*102/*
83 * Local APIC timer IRQ vector is on a different priority level,103 * Local APIC timer IRQ vector is on a different priority level,
84 * to work around the 'lost local interrupt if more than 2 IRQ104 * to work around the 'lost local interrupt if more than 2 IRQ
85 * sources per level' errata.105 * sources per level' errata.
86 */106 */
87#define LOCAL_TIMER_VECTOR 0xef107#define LOCAL_TIMER_VECTOR 0xef
108
109/*
110 * Performance monitoring interrupt vector:
111 */
112#define LOCAL_PERF_VECTOR 0xee
88 113
89/*114/*
90 * First APIC vector available to drivers: (vectors 0x30-0xee) we115 * First APIC vector available to drivers: (vectors 0x30-0xee) we
91 * start at 0x31(0x41) to spread out vectors evenly between priority116 * start at 0x31(0x41) to spread out vectors evenly between priority
92 * levels. (0x80 is the syscall vector)117 * levels. (0x80 is the syscall vector)
93 */118 */
94#define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 2)119#define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 2)
95
96#define NR_VECTORS 256
97 120
98#define FPU_IRQ 13121#define NR_VECTORS 256
99 122
100#define FIRST_VM86_IRQ 3123#define FPU_IRQ 13
101#define LAST_VM86_IRQ 15
102#define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15)
103 124
104#define NR_IRQS_LEGACY 16125#define FIRST_VM86_IRQ 3
126#define LAST_VM86_IRQ 15
105 127
106#if defined(CONFIG_X86_IO_APIC) && !defined(CONFIG_X86_VOYAGER)128#ifndef __ASSEMBLY__
107 129static inline int invalid_vm86_irq(int irq)
108#ifndef CONFIG_SPARSE_IRQ130{
109# if NR_CPUS < MAX_IO_APICS131 return irq < FIRST_VM86_IRQ || irq > LAST_VM86_IRQ;
110# define NR_IRQS (NR_VECTORS + (32 * NR_CPUS))132}
111# else
112# define NR_IRQS (NR_VECTORS + (32 * MAX_IO_APICS))
113# endif
114#else
115# if (8 * NR_CPUS) > (32 * MAX_IO_APICS)
116# define NR_IRQS (NR_VECTORS + (8 * NR_CPUS))
117# else
118# define NR_IRQS (NR_VECTORS + (32 * MAX_IO_APICS))
119# endif
120#endif133#endif
121 134
122#elif defined(CONFIG_X86_VOYAGER)135/*
123 136 * Size the maximum number of interrupts.
124# define NR_IRQS 224137 *
138 * If the irq_desc[] array has a sparse layout, we can size things
139 * generously - it scales up linearly with the maximum number of CPUs,
140 * and the maximum number of IO-APICs, whichever is higher.
141 *
142 * In other cases we size more conservatively, to not create too large
143 * static arrays.
144 */
125 145
126#else /* IO_APIC || VOYAGER */146#define NR_IRQS_LEGACY 16
127 147
128# define NR_IRQS 16148#define CPU_VECTOR_LIMIT ( 8 * NR_CPUS )
149#define IO_APIC_VECTOR_LIMIT ( 32 * MAX_IO_APICS )
129 150
151#ifdef CONFIG_X86_IO_APIC
152# ifdef CONFIG_SPARSE_IRQ
153# define NR_IRQS \
154 (CPU_VECTOR_LIMIT > IO_APIC_VECTOR_LIMIT ? \
155 (NR_VECTORS + CPU_VECTOR_LIMIT) : \
156 (NR_VECTORS + IO_APIC_VECTOR_LIMIT))
157# else
158# if NR_CPUS < MAX_IO_APICS
159# define NR_IRQS (NR_VECTORS + 4*CPU_VECTOR_LIMIT)
160# else
161# define NR_IRQS (NR_VECTORS + IO_APIC_VECTOR_LIMIT)
162# endif
163# endif
164#else /* !CONFIG_X86_IO_APIC: */
165# define NR_IRQS NR_IRQS_LEGACY
130#endif166#endif
131 167
132/* Voyager specific defines */
133/* These define the CPIs we use in linux */
134#define VIC_CPI_LEVEL0 0
135#define VIC_CPI_LEVEL1 1
136/* now the fake CPIs */
137#define VIC_TIMER_CPI 2
138#define VIC_INVALIDATE_CPI 3
139#define VIC_RESCHEDULE_CPI 4
140#define VIC_ENABLE_IRQ_CPI 5
141#define VIC_CALL_FUNCTION_CPI 6
142#define VIC_CALL_FUNCTION_SINGLE_CPI 7
143
144/* Now the QIC CPIs: Since we don't need the two initial levels,
145 * these are 2 less than the VIC CPIs */
146#define QIC_CPI_OFFSET 1
147#define QIC_TIMER_CPI (VIC_TIMER_CPI - QIC_CPI_OFFSET)
148#define QIC_INVALIDATE_CPI (VIC_INVALIDATE_CPI - QIC_CPI_OFFSET)
149#define QIC_RESCHEDULE_CPI (VIC_RESCHEDULE_CPI - QIC_CPI_OFFSET)
150#define QIC_ENABLE_IRQ_CPI (VIC_ENABLE_IRQ_CPI - QIC_CPI_OFFSET)
151#define QIC_CALL_FUNCTION_CPI (VIC_CALL_FUNCTION_CPI - QIC_CPI_OFFSET)
152#define QIC_CALL_FUNCTION_SINGLE_CPI (VIC_CALL_FUNCTION_SINGLE_CPI - QIC_CPI_OFFSET)
153
154#define VIC_START_FAKE_CPI VIC_TIMER_CPI
155#define VIC_END_FAKE_CPI VIC_CALL_FUNCTION_SINGLE_CPI
156
157/* this is the SYS_INT CPI. */
158#define VIC_SYS_INT 8
159#define VIC_CMN_INT 15
160
161/* This is the boot CPI for alternate processors. It gets overwritten
162 * by the above once the system has activated all available processors */
163#define VIC_CPU_BOOT_CPI VIC_CPI_LEVEL0
164#define VIC_CPU_BOOT_ERRATA_CPI (VIC_CPI_LEVEL0 + 8)
165
166
167#endif /* _ASM_X86_IRQ_VECTORS_H */168#endif /* _ASM_X86_IRQ_VECTORS_H */
arch/x86/include/asm/kexec.h+9−18
@@ -9,23 +9,8 @@ · 8 unmodified lines
9# define PAGES_NR 49# define PAGES_NR 4
10#else10#else
11# define PA_CONTROL_PAGE 011# define PA_CONTROL_PAGE 0
12# define VA_CONTROL_PAGE 112# define PA_TABLE_PAGE 1
13# define PA_PGD 213# define PAGES_NR 2
14# define VA_PGD 3
15# define PA_PUD_0 4
16# define VA_PUD_0 5
17# define PA_PMD_0 6
18# define VA_PMD_0 7
19# define PA_PTE_0 8
20# define VA_PTE_0 9
21# define PA_PUD_1 10
22# define VA_PUD_1 11
23# define PA_PMD_1 12
24# define VA_PMD_1 13
25# define PA_PTE_1 14
26# define VA_PTE_1 15
27# define PA_TABLE_PAGE 16
28# define PAGES_NR 17
29#endif14#endif
30 15
31#ifdef CONFIG_X86_3216#ifdef CONFIG_X86_32
@@ -157,9 +142,9 @@ relocate_kernel(unsigned long indirection_page, · 125 unmodified lines
157 unsigned long start_address) ATTRIB_NORET;142 unsigned long start_address) ATTRIB_NORET;
158#endif143#endif
159 144
160#ifdef CONFIG_X86_32
161#define ARCH_HAS_KIMAGE_ARCH145#define ARCH_HAS_KIMAGE_ARCH
162 146
147#ifdef CONFIG_X86_32
163struct kimage_arch {148struct kimage_arch {
164 pgd_t *pgd;149 pgd_t *pgd;
165#ifdef CONFIG_X86_PAE150#ifdef CONFIG_X86_PAE
@@ -169,6 +154,12 @@ struct kimage_arch { · 3 unmodified lines
169 pte_t *pte0;154 pte_t *pte0;
170 pte_t *pte1;155 pte_t *pte1;
171};156};
157#else
158struct kimage_arch {
159 pud_t *pud;
160 pmd_t *pmd;
161 pte_t *pte;
162};
172#endif163#endif
173 164
174#endif /* __ASSEMBLY__ */165#endif /* __ASSEMBLY__ */
arch/x86/include/asm/linkage.h+4−60
@@ -52,70 +52,14 @@ · 51 unmodified lines
52 52
53#endif53#endif
54 54
55#define GLOBAL(name) \
56 .globl name; \
57 name:
58
55#ifdef CONFIG_X86_ALIGNMENT_1659#ifdef CONFIG_X86_ALIGNMENT_16
56#define __ALIGN .align 16,0x9060#define __ALIGN .align 16,0x90
57#define __ALIGN_STR ".align 16,0x90"61#define __ALIGN_STR ".align 16,0x90"
58#endif62#endif
59 63
60/*
61 * to check ENTRY_X86/END_X86 and
62 * KPROBE_ENTRY_X86/KPROBE_END_X86
63 * unbalanced-missed-mixed appearance
64 */
65#define __set_entry_x86 .set ENTRY_X86_IN, 0
66#define __unset_entry_x86 .set ENTRY_X86_IN, 1
67#define __set_kprobe_x86 .set KPROBE_X86_IN, 0
68#define __unset_kprobe_x86 .set KPROBE_X86_IN, 1
69
70#define __macro_err_x86 .error "ENTRY_X86/KPROBE_X86 unbalanced,missed,mixed"
71
72#define __check_entry_x86 \
73 .ifdef ENTRY_X86_IN; \
74 .ifeq ENTRY_X86_IN; \
75 __macro_err_x86; \
76 .abort; \
77 .endif; \
78 .endif
79
80#define __check_kprobe_x86 \
81 .ifdef KPROBE_X86_IN; \
82 .ifeq KPROBE_X86_IN; \
83 __macro_err_x86; \
84 .abort; \
85 .endif; \
86 .endif
87
88#define __check_entry_kprobe_x86 \
89 __check_entry_x86; \
90 __check_kprobe_x86
91
92#define ENTRY_KPROBE_FINAL_X86 __check_entry_kprobe_x86
93
94#define ENTRY_X86(name) \
95 __check_entry_kprobe_x86; \
96 __set_entry_x86; \
97 .globl name; \
98 __ALIGN; \
99 name:
100
101#define END_X86(name) \
102 __unset_entry_x86; \
103 __check_entry_kprobe_x86; \
104 .size name, .-name
105
106#define KPROBE_ENTRY_X86(name) \
107 __check_entry_kprobe_x86; \
108 __set_kprobe_x86; \
109 .pushsection .kprobes.text, "ax"; \
110 .globl name; \
111 __ALIGN; \
112 name:
113
114#define KPROBE_END_X86(name) \
115 __unset_kprobe_x86; \
116 __check_entry_kprobe_x86; \
117 .size name, .-name; \
118 .popsection
119
120#endif /* _ASM_X86_LINKAGE_H */64#endif /* _ASM_X86_LINKAGE_H */
121 65
arch/x86/include/asm/mach-default/mach_apic.h+0−168
@@ -1,168 +0,0 @@
1#ifndef _ASM_X86_MACH_DEFAULT_MACH_APIC_H
2#define _ASM_X86_MACH_DEFAULT_MACH_APIC_H
3
4#ifdef CONFIG_X86_LOCAL_APIC
5
6#include <mach_apicdef.h>
7#include <asm/smp.h>
8
9#define APIC_DFR_VALUE (APIC_DFR_FLAT)
10
11static inline const struct cpumask *target_cpus(void)
12{
13#ifdef CONFIG_SMP
14 return cpu_online_mask;
15#else
16 return cpumask_of(0);
17#endif
18}
19
20#define NO_BALANCE_IRQ (0)
21#define esr_disable (0)
22
23#ifdef CONFIG_X86_64
24#include <asm/genapic.h>
25#define INT_DELIVERY_MODE (genapic->int_delivery_mode)
26#define INT_DEST_MODE (genapic->int_dest_mode)
27#define TARGET_CPUS (genapic->target_cpus())
28#define apic_id_registered (genapic->apic_id_registered)
29#define init_apic_ldr (genapic->init_apic_ldr)
30#define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid)
31#define cpu_mask_to_apicid_and (genapic->cpu_mask_to_apicid_and)
32#define phys_pkg_id (genapic->phys_pkg_id)
33#define vector_allocation_domain (genapic->vector_allocation_domain)
34#define read_apic_id() (GET_APIC_ID(apic_read(APIC_ID)))
35#define send_IPI_self (genapic->send_IPI_self)
36#define wakeup_secondary_cpu (genapic->wakeup_cpu)
37extern void setup_apic_routing(void);
38#else
39#define INT_DELIVERY_MODE dest_LowestPrio
40#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */
41#define TARGET_CPUS (target_cpus())
42#define wakeup_secondary_cpu wakeup_secondary_cpu_via_init
43/*
44 * Set up the logical destination ID.
45 *
46 * Intel recommends to set DFR, LDR and TPR before enabling
47 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
48 * document number 292116). So here it goes...
49 */
50static inline void init_apic_ldr(void)
51{
52 unsigned long val;
53
54 apic_write(APIC_DFR, APIC_DFR_VALUE);
55 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
56 val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id());
57 apic_write(APIC_LDR, val);
58}
59
60static inline int apic_id_registered(void)
61{
62 return physid_isset(read_apic_id(), phys_cpu_present_map);
63}
64
65static inline unsigned int cpu_mask_to_apicid(const struct cpumask *cpumask)
66{
67 return cpumask_bits(cpumask)[0];
68}
69
70static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *cpumask,
71 const struct cpumask *andmask)
72{
73 unsigned long mask1 = cpumask_bits(cpumask)[0];
74 unsigned long mask2 = cpumask_bits(andmask)[0];
75 unsigned long mask3 = cpumask_bits(cpu_online_mask)[0];
76
77 return (unsigned int)(mask1 & mask2 & mask3);
78}
79
80static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
81{
82 return cpuid_apic >> index_msb;
83}
84
85static inline void setup_apic_routing(void)
86{
87#ifdef CONFIG_X86_IO_APIC
88 printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
89 "Flat", nr_ioapics);
90#endif
91}
92
93static inline int apicid_to_node(int logical_apicid)
94{
95#ifdef CONFIG_SMP
96 return apicid_2_node[hard_smp_processor_id()];
97#else
98 return 0;
99#endif
100}
101
102static inline void vector_allocation_domain(int cpu, struct cpumask *retmask)
103{
104 /* Careful. Some cpus do not strictly honor the set of cpus
105 * specified in the interrupt destination when using lowest
106 * priority interrupt delivery mode.
107 *
108 * In particular there was a hyperthreading cpu observed to
109 * deliver interrupts to the wrong hyperthread when only one
110 * hyperthread was specified in the interrupt desitination.
111 */
112 *retmask = (cpumask_t) { { [0] = APIC_ALL_CPUS } };
113}
114#endif
115
116static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
117{
118 return physid_isset(apicid, bitmap);
119}
120
121static inline unsigned long check_apicid_present(int bit)
122{
123 return physid_isset(bit, phys_cpu_present_map);
124}
125
126static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
127{
128 return phys_map;
129}
130
131static inline int multi_timer_check(int apic, int irq)
132{
133 return 0;
134}
135
136/* Mapping from cpu number to logical apicid */
137static inline int cpu_to_logical_apicid(int cpu)
138{
139 return 1 << cpu;
140}
141
142static inline int cpu_present_to_apicid(int mps_cpu)
143{
144 if (mps_cpu < nr_cpu_ids && cpu_present(mps_cpu))
145 return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
146 else
147 return BAD_APICID;
148}
149
150static inline physid_mask_t apicid_to_cpu_present(int phys_apicid)
151{
152 return physid_mask_of_physid(phys_apicid);
153}
154
155static inline void setup_portio_remap(void)
156{
157}
158
159static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
160{
161 return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
162}
163
164static inline void enable_apic_mode(void)
165{
166}
167#endif /* CONFIG_X86_LOCAL_APIC */
168#endif /* _ASM_X86_MACH_DEFAULT_MACH_APIC_H */
arch/x86/include/asm/mach-default/mach_apicdef.h+0−24
@@ -1,24 +0,0 @@
1#ifndef _ASM_X86_MACH_DEFAULT_MACH_APICDEF_H
2#define _ASM_X86_MACH_DEFAULT_MACH_APICDEF_H
3
4#include <asm/apic.h>
5
6#ifdef CONFIG_X86_64
7#define APIC_ID_MASK (genapic->apic_id_mask)
8#define GET_APIC_ID(x) (genapic->get_apic_id(x))
9#define SET_APIC_ID(x) (genapic->set_apic_id(x))
10#else
11#define APIC_ID_MASK (0xF<<24)
12static inline unsigned get_apic_id(unsigned long x)
13{
14 unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR));
15 if (APIC_XAPIC(ver))
16 return (((x)>>24)&0xFF);
17 else
18 return (((x)>>24)&0xF);
19}
20
21#define GET_APIC_ID(x) get_apic_id(x)
22#endif
23
24#endif /* _ASM_X86_MACH_DEFAULT_MACH_APICDEF_H */
arch/x86/include/asm/mach-default/mach_ipi.h+0−64
@@ -1,64 +0,0 @@
1#ifndef _ASM_X86_MACH_DEFAULT_MACH_IPI_H
2#define _ASM_X86_MACH_DEFAULT_MACH_IPI_H
3
4/* Avoid include hell */
5#define NMI_VECTOR 0x02
6
7void send_IPI_mask_bitmask(const struct cpumask *mask, int vector);
8void send_IPI_mask_allbutself(const struct cpumask *mask, int vector);
9void __send_IPI_shortcut(unsigned int shortcut, int vector);
10
11extern int no_broadcast;
12
13#ifdef CONFIG_X86_64
14#include <asm/genapic.h>
15#define send_IPI_mask (genapic->send_IPI_mask)
16#define send_IPI_mask_allbutself (genapic->send_IPI_mask_allbutself)
17#else
18static inline void send_IPI_mask(const struct cpumask *mask, int vector)
19{
20 send_IPI_mask_bitmask(mask, vector);
21}
22void send_IPI_mask_allbutself(const struct cpumask *mask, int vector);
23#endif
24
25static inline void __local_send_IPI_allbutself(int vector)
26{
27 if (no_broadcast || vector == NMI_VECTOR)
28 send_IPI_mask_allbutself(cpu_online_mask, vector);
29 else
30 __send_IPI_shortcut(APIC_DEST_ALLBUT, vector);
31}
32
33static inline void __local_send_IPI_all(int vector)
34{
35 if (no_broadcast || vector == NMI_VECTOR)
36 send_IPI_mask(cpu_online_mask, vector);
37 else
38 __send_IPI_shortcut(APIC_DEST_ALLINC, vector);
39}
40
41#ifdef CONFIG_X86_64
42#define send_IPI_allbutself (genapic->send_IPI_allbutself)
43#define send_IPI_all (genapic->send_IPI_all)
44#else
45static inline void send_IPI_allbutself(int vector)
46{
47 /*
48 * if there are no other CPUs in the system then we get an APIC send
49 * error if we try to broadcast, thus avoid sending IPIs in this case.
50 */
51 if (!(num_online_cpus() > 1))
52 return;
53
54 __local_send_IPI_allbutself(vector);
55 return;
56}
57
58static inline void send_IPI_all(int vector)
59{
60 __local_send_IPI_all(vector);
61}
62#endif
63
64#endif /* _ASM_X86_MACH_DEFAULT_MACH_IPI_H */
arch/x86/include/asm/mach-default/mach_mpparse.h+0−17
@@ -1,17 +0,0 @@
1#ifndef _ASM_X86_MACH_DEFAULT_MACH_MPPARSE_H
2#define _ASM_X86_MACH_DEFAULT_MACH_MPPARSE_H
3
4static inline int
5mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
6{
7 return 0;
8}
9
10/* Hook from generic ACPI tables.c */
11static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id)
12{
13 return 0;
14}
15
16
17#endif /* _ASM_X86_MACH_DEFAULT_MACH_MPPARSE_H */
arch/x86/include/asm/mach-default/mach_mpspec.h+0−12
@@ -1,12 +0,0 @@
1#ifndef _ASM_X86_MACH_DEFAULT_MACH_MPSPEC_H
2#define _ASM_X86_MACH_DEFAULT_MACH_MPSPEC_H
3
4#define MAX_IRQ_SOURCES 256
5
6#if CONFIG_BASE_SMALL == 0
7#define MAX_MP_BUSSES 256
8#else
9#define MAX_MP_BUSSES 32
10#endif
11
12#endif /* _ASM_X86_MACH_DEFAULT_MACH_MPSPEC_H */
arch/x86/include/asm/mach-default/mach_wakecpu.h+0−41
@@ -1,41 +0,0 @@
1#ifndef _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H
2#define _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H
3
4#define TRAMPOLINE_PHYS_LOW (0x467)
5#define TRAMPOLINE_PHYS_HIGH (0x469)
6
7static inline void wait_for_init_deassert(atomic_t *deassert)
8{
9 while (!atomic_read(deassert))
10 cpu_relax();
11 return;
12}
13
14/* Nothing to do for most platforms, since cleared by the INIT cycle */
15static inline void smp_callin_clear_local_apic(void)
16{
17}
18
19static inline void store_NMI_vector(unsigned short *high, unsigned short *low)
20{
21}
22
23static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
24{
25}
26
27#ifdef CONFIG_SMP
28extern void __inquire_remote_apic(int apicid);
29#else /* CONFIG_SMP */
30static inline void __inquire_remote_apic(int apicid)
31{
32}
33#endif /* CONFIG_SMP */
34
35static inline void inquire_remote_apic(int apicid)
36{
37 if (apic_verbosity >= APIC_DEBUG)
38 __inquire_remote_apic(apicid);
39}
40
41#endif /* _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H */
arch/x86/include/asm/mach-generic/gpio.h+0−15
@@ -1,15 +0,0 @@
1#ifndef _ASM_X86_MACH_GENERIC_GPIO_H
2#define _ASM_X86_MACH_GENERIC_GPIO_H
3
4int gpio_request(unsigned gpio, const char *label);
5void gpio_free(unsigned gpio);
6int gpio_direction_input(unsigned gpio);
7int gpio_direction_output(unsigned gpio, int value);
8int gpio_get_value(unsigned gpio);
9void gpio_set_value(unsigned gpio, int value);
10int gpio_to_irq(unsigned gpio);
11int irq_to_gpio(unsigned irq);
12
13#include <asm-generic/gpio.h> /* cansleep wrappers */
14
15#endif /* _ASM_X86_MACH_GENERIC_GPIO_H */
arch/x86/include/asm/mach-generic/mach_apic.h+0−35
@@ -1,35 +0,0 @@
1#ifndef _ASM_X86_MACH_GENERIC_MACH_APIC_H
2#define _ASM_X86_MACH_GENERIC_MACH_APIC_H
3
4#include <asm/genapic.h>
5
6#define esr_disable (genapic->ESR_DISABLE)
7#define NO_BALANCE_IRQ (genapic->no_balance_irq)
8#define INT_DELIVERY_MODE (genapic->int_delivery_mode)
9#define INT_DEST_MODE (genapic->int_dest_mode)
10#undef APIC_DEST_LOGICAL
11#define APIC_DEST_LOGICAL (genapic->apic_destination_logical)
12#define TARGET_CPUS (genapic->target_cpus())
13#define apic_id_registered (genapic->apic_id_registered)
14#define init_apic_ldr (genapic->init_apic_ldr)
15#define ioapic_phys_id_map (genapic->ioapic_phys_id_map)
16#define setup_apic_routing (genapic->setup_apic_routing)
17#define multi_timer_check (genapic->multi_timer_check)
18#define apicid_to_node (genapic->apicid_to_node)
19#define cpu_to_logical_apicid (genapic->cpu_to_logical_apicid)
20#define cpu_present_to_apicid (genapic->cpu_present_to_apicid)
21#define apicid_to_cpu_present (genapic->apicid_to_cpu_present)
22#define setup_portio_remap (genapic->setup_portio_remap)
23#define check_apicid_present (genapic->check_apicid_present)
24#define check_phys_apicid_present (genapic->check_phys_apicid_present)
25#define check_apicid_used (genapic->check_apicid_used)
26#define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid)
27#define cpu_mask_to_apicid_and (genapic->cpu_mask_to_apicid_and)
28#define vector_allocation_domain (genapic->vector_allocation_domain)
29#define enable_apic_mode (genapic->enable_apic_mode)
30#define phys_pkg_id (genapic->phys_pkg_id)
31#define wakeup_secondary_cpu (genapic->wakeup_cpu)
32
33extern void generic_bigsmp_probe(void);
34
35#endif /* _ASM_X86_MACH_GENERIC_MACH_APIC_H */
arch/x86/include/asm/mach-generic/mach_apicdef.h+0−11
@@ -1,11 +0,0 @@
1#ifndef _ASM_X86_MACH_GENERIC_MACH_APICDEF_H
2#define _ASM_X86_MACH_GENERIC_MACH_APICDEF_H
3
4#ifndef APIC_DEFINITION
5#include <asm/genapic.h>
6
7#define GET_APIC_ID (genapic->get_apic_id)
8#define APIC_ID_MASK (genapic->apic_id_mask)
9#endif
10
11#endif /* _ASM_X86_MACH_GENERIC_MACH_APICDEF_H */
arch/x86/include/asm/mach-generic/mach_ipi.h+0−10
@@ -1,10 +0,0 @@
1#ifndef _ASM_X86_MACH_GENERIC_MACH_IPI_H
2#define _ASM_X86_MACH_GENERIC_MACH_IPI_H
3
4#include <asm/genapic.h>
5
6#define send_IPI_mask (genapic->send_IPI_mask)
7#define send_IPI_allbutself (genapic->send_IPI_allbutself)
8#define send_IPI_all (genapic->send_IPI_all)
9
10#endif /* _ASM_X86_MACH_GENERIC_MACH_IPI_H */
arch/x86/include/asm/mach-generic/mach_mpparse.h+0−9
@@ -1,9 +0,0 @@
1#ifndef _ASM_X86_MACH_GENERIC_MACH_MPPARSE_H
2#define _ASM_X86_MACH_GENERIC_MACH_MPPARSE_H
3
4
5extern int mps_oem_check(struct mpc_table *, char *, char *);
6
7extern int acpi_madt_oem_check(char *, char *);
8
9#endif /* _ASM_X86_MACH_GENERIC_MACH_MPPARSE_H */
arch/x86/include/asm/mach-generic/mach_mpspec.h+0−12
@@ -1,12 +0,0 @@
1#ifndef _ASM_X86_MACH_GENERIC_MACH_MPSPEC_H
2#define _ASM_X86_MACH_GENERIC_MACH_MPSPEC_H
3
4#define MAX_IRQ_SOURCES 256
5
6/* Summit or generic (i.e. installer) kernels need lots of bus entries. */
7/* Maximum 256 PCI busses, plus 1 ISA bus in each of 4 cabinets. */
8#define MAX_MP_BUSSES 260
9
10extern void numaq_mps_oem_check(struct mpc_table *, char *, char *);
11
12#endif /* _ASM_X86_MACH_GENERIC_MACH_MPSPEC_H */
arch/x86/include/asm/mach-generic/mach_wakecpu.h+0−12
@@ -1,12 +0,0 @@
1#ifndef _ASM_X86_MACH_GENERIC_MACH_WAKECPU_H
2#define _ASM_X86_MACH_GENERIC_MACH_WAKECPU_H
3
4#define TRAMPOLINE_PHYS_LOW (genapic->trampoline_phys_low)
5#define TRAMPOLINE_PHYS_HIGH (genapic->trampoline_phys_high)
6#define wait_for_init_deassert (genapic->wait_for_init_deassert)
7#define smp_callin_clear_local_apic (genapic->smp_callin_clear_local_apic)
8#define store_NMI_vector (genapic->store_NMI_vector)
9#define restore_NMI_vector (genapic->restore_NMI_vector)
10#define inquire_remote_apic (genapic->inquire_remote_apic)
11
12#endif /* _ASM_X86_MACH_GENERIC_MACH_APIC_H */
arch/x86/include/asm/mach-rdc321x/gpio.h+0−60
@@ -1,60 +0,0 @@
1#ifndef _ASM_X86_MACH_RDC321X_GPIO_H
2#define _ASM_X86_MACH_RDC321X_GPIO_H
3
4#include <linux/kernel.h>
5
6extern int rdc_gpio_get_value(unsigned gpio);
7extern void rdc_gpio_set_value(unsigned gpio, int value);
8extern int rdc_gpio_direction_input(unsigned gpio);
9extern int rdc_gpio_direction_output(unsigned gpio, int value);
10extern int rdc_gpio_request(unsigned gpio, const char *label);
11extern void rdc_gpio_free(unsigned gpio);
12extern void __init rdc321x_gpio_setup(void);
13
14/* Wrappers for the arch-neutral GPIO API */
15
16static inline int gpio_request(unsigned gpio, const char *label)
17{
18 return rdc_gpio_request(gpio, label);
19}
20
21static inline void gpio_free(unsigned gpio)
22{
23 might_sleep();
24 rdc_gpio_free(gpio);
25}
26
27static inline int gpio_direction_input(unsigned gpio)
28{
29 return rdc_gpio_direction_input(gpio);
30}
31
32static inline int gpio_direction_output(unsigned gpio, int value)
33{
34 return rdc_gpio_direction_output(gpio, value);
35}
36
37static inline int gpio_get_value(unsigned gpio)
38{
39 return rdc_gpio_get_value(gpio);
40}
41
42static inline void gpio_set_value(unsigned gpio, int value)
43{
44 rdc_gpio_set_value(gpio, value);
45}
46
47static inline int gpio_to_irq(unsigned gpio)
48{
49 return gpio;
50}
51
52static inline int irq_to_gpio(unsigned irq)
53{
54 return irq;
55}
56
57/* For cansleep */
58#include <asm-generic/gpio.h>
59
60#endif /* _ASM_X86_MACH_RDC321X_GPIO_H */
arch/x86/include/asm/mach-voyager/do_timer.h+0−17
@@ -1,17 +0,0 @@
1/* defines for inline arch setup functions */
2#include <linux/clockchips.h>
3
4#include <asm/voyager.h>
5#include <asm/i8253.h>
6
7/**
8 * do_timer_interrupt_hook - hook into timer tick
9 *
10 * Call the pit clock event handler. see asm/i8253.h
11 **/
12static inline void do_timer_interrupt_hook(void)
13{
14 global_clock_event->event_handler(global_clock_event);
15 voyager_timer_interrupt();
16}
17
arch/x86/include/asm/mach-voyager/entry_arch.h+0−26
@@ -1,26 +0,0 @@
1/* -*- mode: c; c-basic-offset: 8 -*- */
2
3/* Copyright (C) 2002
4 *
5 * Author: James.Bottomley@HansenPartnership.com
6 *
7 * linux/arch/i386/voyager/entry_arch.h
8 *
9 * This file builds the VIC and QIC CPI gates
10 */
11
12/* initialise the voyager interrupt gates
13 *
14 * This uses the macros in irq.h to set up assembly jump gates. The
15 * calls are then redirected to the same routine with smp_ prefixed */
16BUILD_INTERRUPT(vic_sys_interrupt, VIC_SYS_INT)
17BUILD_INTERRUPT(vic_cmn_interrupt, VIC_CMN_INT)
18BUILD_INTERRUPT(vic_cpi_interrupt, VIC_CPI_LEVEL0);
19
20/* do all the QIC interrupts */
21BUILD_INTERRUPT(qic_timer_interrupt, QIC_TIMER_CPI);
22BUILD_INTERRUPT(qic_invalidate_interrupt, QIC_INVALIDATE_CPI);
23BUILD_INTERRUPT(qic_reschedule_interrupt, QIC_RESCHEDULE_CPI);
24BUILD_INTERRUPT(qic_enable_irq_interrupt, QIC_ENABLE_IRQ_CPI);
25BUILD_INTERRUPT(qic_call_function_interrupt, QIC_CALL_FUNCTION_CPI);
26BUILD_INTERRUPT(qic_call_function_single_interrupt, QIC_CALL_FUNCTION_SINGLE_CPI);
arch/x86/include/asm/mach-voyager/setup_arch.h+0−12
@@ -1,12 +0,0 @@
1#include <asm/voyager.h>
2#include <asm/setup.h>
3#define VOYAGER_BIOS_INFO ((struct voyager_bios_info *) \
4 (&boot_params.apm_bios_info))
5
6/* Hook to call BIOS initialisation function */
7
8/* for voyager, pass the voyager BIOS/SUS info area to the detection
9 * routines */
10
11#define ARCH_SETUP voyager_detect(VOYAGER_BIOS_INFO);
12
arch/x86/include/asm/mach_timer.hrenamed from arch/x86/include/asm/mach-default/mach_timer.h+0−0

File renamed without changes.

arch/x86/include/asm/mach_traps.hrenamed from arch/x86/include/asm/mach-default/mach_traps.h+0−0

File renamed without changes.

arch/x86/include/asm/mmu_context.h+59−4
@@ -21,11 +21,54 @@ static inline void paravirt_activate_mm(struct mm_struct *prev, · 20 unmodified lines
21int init_new_context(struct task_struct *tsk, struct mm_struct *mm);21int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
22void destroy_context(struct mm_struct *mm);22void destroy_context(struct mm_struct *mm);
23 23
24#ifdef CONFIG_X86_3224
25# include "mmu_context_32.h"25static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
26#else26{
27# include "mmu_context_64.h"27#ifdef CONFIG_SMP
28 if (percpu_read(cpu_tlbstate.state) == TLBSTATE_OK)
29 percpu_write(cpu_tlbstate.state, TLBSTATE_LAZY);
30#endif
31}
32
33static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
34 struct task_struct *tsk)
35{
36 unsigned cpu = smp_processor_id();
37
38 if (likely(prev != next)) {
39 /* stop flush ipis for the previous mm */
40 cpu_clear(cpu, prev->cpu_vm_mask);
41#ifdef CONFIG_SMP
42 percpu_write(cpu_tlbstate.state, TLBSTATE_OK);
43 percpu_write(cpu_tlbstate.active_mm, next);
28#endif44#endif
45 cpu_set(cpu, next->cpu_vm_mask);
46
47 /* Re-load page tables */
48 load_cr3(next->pgd);
49
50 /*
51 * load the LDT, if the LDT is different:
52 */
53 if (unlikely(prev->context.ldt != next->context.ldt))
54 load_LDT_nolock(&next->context);
55 }
56#ifdef CONFIG_SMP
57 else {
58 percpu_write(cpu_tlbstate.state, TLBSTATE_OK);
59 BUG_ON(percpu_read(cpu_tlbstate.active_mm) != next);
60
61 if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) {
62 /* We were in lazy tlb mode and leave_mm disabled
63 * tlb flush IPI delivery. We must reload CR3
64 * to make sure to use no freed page tables.
65 */
66 load_cr3(next->pgd);
67 load_LDT_nolock(&next->context);
68 }
69 }
70#endif
71}
29 72
30#define activate_mm(prev, next) \73#define activate_mm(prev, next) \
31do { \74do { \
@@ -33,5 +76,17 @@ do { \ · 1 unmodified line
33 switch_mm((prev), (next), NULL); \76 switch_mm((prev), (next), NULL); \
34} while (0);77} while (0);
35 78
79#ifdef CONFIG_X86_32
80#define deactivate_mm(tsk, mm) \
81do { \
82 lazy_load_gs(0); \
83} while (0)
84#else
85#define deactivate_mm(tsk, mm) \
86do { \
87 load_gs_index(0); \
88 loadsegment(fs, 0); \
89} while (0)
90#endif
36 91
37#endif /* _ASM_X86_MMU_CONTEXT_H */92#endif /* _ASM_X86_MMU_CONTEXT_H */
arch/x86/include/asm/mmu_context_32.h+0−55
@@ -1,55 +0,0 @@
1#ifndef _ASM_X86_MMU_CONTEXT_32_H
2#define _ASM_X86_MMU_CONTEXT_32_H
3
4static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
5{
6#ifdef CONFIG_SMP
7 if (x86_read_percpu(cpu_tlbstate.state) == TLBSTATE_OK)
8 x86_write_percpu(cpu_tlbstate.state, TLBSTATE_LAZY);
9#endif
10}
11
12static inline void switch_mm(struct mm_struct *prev,
13 struct mm_struct *next,
14 struct task_struct *tsk)
15{
16 int cpu = smp_processor_id();
17
18 if (likely(prev != next)) {
19 /* stop flush ipis for the previous mm */
20 cpu_clear(cpu, prev->cpu_vm_mask);
21#ifdef CONFIG_SMP
22 x86_write_percpu(cpu_tlbstate.state, TLBSTATE_OK);
23 x86_write_percpu(cpu_tlbstate.active_mm, next);
24#endif
25 cpu_set(cpu, next->cpu_vm_mask);
26
27 /* Re-load page tables */
28 load_cr3(next->pgd);
29
30 /*
31 * load the LDT, if the LDT is different:
32 */
33 if (unlikely(prev->context.ldt != next->context.ldt))
34 load_LDT_nolock(&next->context);
35 }
36#ifdef CONFIG_SMP
37 else {
38 x86_write_percpu(cpu_tlbstate.state, TLBSTATE_OK);
39 BUG_ON(x86_read_percpu(cpu_tlbstate.active_mm) != next);
40
41 if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) {
42 /* We were in lazy tlb mode and leave_mm disabled
43 * tlb flush IPI delivery. We must reload %cr3.
44 */
45 load_cr3(next->pgd);
46 load_LDT_nolock(&next->context);
47 }
48 }
49#endif
50}
51
52#define deactivate_mm(tsk, mm) \
53 asm("movl %0,%%gs": :"r" (0));
54
55#endif /* _ASM_X86_MMU_CONTEXT_32_H */
arch/x86/include/asm/mmu_context_64.h+0−54
@@ -1,54 +0,0 @@
1#ifndef _ASM_X86_MMU_CONTEXT_64_H
2#define _ASM_X86_MMU_CONTEXT_64_H
3
4#include <asm/pda.h>
5
6static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
7{
8#ifdef CONFIG_SMP
9 if (read_pda(mmu_state) == TLBSTATE_OK)
10 write_pda(mmu_state, TLBSTATE_LAZY);
11#endif
12}
13
14static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
15 struct task_struct *tsk)
16{
17 unsigned cpu = smp_processor_id();
18 if (likely(prev != next)) {
19 /* stop flush ipis for the previous mm */
20 cpu_clear(cpu, prev->cpu_vm_mask);
21#ifdef CONFIG_SMP
22 write_pda(mmu_state, TLBSTATE_OK);
23 write_pda(active_mm, next);
24#endif
25 cpu_set(cpu, next->cpu_vm_mask);
26 load_cr3(next->pgd);
27
28 if (unlikely(next->context.ldt != prev->context.ldt))
29 load_LDT_nolock(&next->context);
30 }
31#ifdef CONFIG_SMP
32 else {
33 write_pda(mmu_state, TLBSTATE_OK);
34 if (read_pda(active_mm) != next)
35 BUG();
36 if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) {
37 /* We were in lazy tlb mode and leave_mm disabled
38 * tlb flush IPI delivery. We must reload CR3
39 * to make sure to use no freed page tables.
40 */
41 load_cr3(next->pgd);
42 load_LDT_nolock(&next->context);
43 }
44 }
45#endif
46}
47
48#define deactivate_mm(tsk, mm) \
49do { \
50 load_gs_index(0); \
51 asm volatile("movl %0,%%fs"::"r"(0)); \
52} while (0)
53
54#endif /* _ASM_X86_MMU_CONTEXT_64_H */
arch/x86/include/asm/mmzone_32.h+3−40
@@ -91,46 +91,9 @@ static inline int pfn_valid(int pfn) · 90 unmodified lines
91#endif /* CONFIG_DISCONTIGMEM */91#endif /* CONFIG_DISCONTIGMEM */
92 92
93#ifdef CONFIG_NEED_MULTIPLE_NODES93#ifdef CONFIG_NEED_MULTIPLE_NODES
94 94/* always use node 0 for bootmem on this numa platform */
95/*95#define bootmem_arch_preferred_node(__bdata, size, align, goal, limit) \
96 * Following are macros that are specific to this numa platform.96 (NODE_DATA(0)->bdata)
97 */
98#define reserve_bootmem(addr, size, flags) \
99 reserve_bootmem_node(NODE_DATA(0), (addr), (size), (flags))
100#define alloc_bootmem(x) \
101 __alloc_bootmem_node(NODE_DATA(0), (x), SMP_CACHE_BYTES, __pa(MAX_DMA_ADDRESS))
102#define alloc_bootmem_nopanic(x) \
103 __alloc_bootmem_node_nopanic(NODE_DATA(0), (x), SMP_CACHE_BYTES, \
104 __pa(MAX_DMA_ADDRESS))
105#define alloc_bootmem_low(x) \
106 __alloc_bootmem_node(NODE_DATA(0), (x), SMP_CACHE_BYTES, 0)
107#define alloc_bootmem_pages(x) \
108 __alloc_bootmem_node(NODE_DATA(0), (x), PAGE_SIZE, __pa(MAX_DMA_ADDRESS))
109#define alloc_bootmem_pages_nopanic(x) \
110 __alloc_bootmem_node_nopanic(NODE_DATA(0), (x), PAGE_SIZE, \
111 __pa(MAX_DMA_ADDRESS))
112#define alloc_bootmem_low_pages(x) \
113 __alloc_bootmem_node(NODE_DATA(0), (x), PAGE_SIZE, 0)
114#define alloc_bootmem_node(pgdat, x) \
115({ \
116 struct pglist_data __maybe_unused \
117 *__alloc_bootmem_node__pgdat = (pgdat); \
118 __alloc_bootmem_node(NODE_DATA(0), (x), SMP_CACHE_BYTES, \
119 __pa(MAX_DMA_ADDRESS)); \
120})
121#define alloc_bootmem_pages_node(pgdat, x) \
122({ \
123 struct pglist_data __maybe_unused \
124 *__alloc_bootmem_node__pgdat = (pgdat); \
125 __alloc_bootmem_node(NODE_DATA(0), (x), PAGE_SIZE, \
126 __pa(MAX_DMA_ADDRESS)); \
127})
128#define alloc_bootmem_low_pages_node(pgdat, x) \
129({ \
130 struct pglist_data __maybe_unused \
131 *__alloc_bootmem_node__pgdat = (pgdat); \
132 __alloc_bootmem_node(NODE_DATA(0), (x), PAGE_SIZE, 0); \
133})
134#endif /* CONFIG_NEED_MULTIPLE_NODES */97#endif /* CONFIG_NEED_MULTIPLE_NODES */
135 98
136#endif /* _ASM_X86_MMZONE_32_H */99#endif /* _ASM_X86_MMZONE_32_H */
arch/x86/include/asm/mpspec.h+26−7
@@ -9,7 +9,18 @@ extern int apic_version[MAX_APICS]; · 8 unmodified lines
9extern int pic_mode;9extern int pic_mode;
10 10
11#ifdef CONFIG_X86_3211#ifdef CONFIG_X86_32
12#include <mach_mpspec.h>12
13/*
14 * Summit or generic (i.e. installer) kernels need lots of bus entries.
15 * Maximum 256 PCI busses, plus 1 ISA bus in each of 4 cabinets.
16 */
17#if CONFIG_BASE_SMALL == 0
18# define MAX_MP_BUSSES 260
19#else
20# define MAX_MP_BUSSES 32
21#endif
22
23#define MAX_IRQ_SOURCES 256
13 24
14extern unsigned int def_to_bigsmp;25extern unsigned int def_to_bigsmp;
15extern u8 apicid_2_node[];26extern u8 apicid_2_node[];
@@ -20,15 +31,15 @@ extern int mp_bus_id_to_local[MAX_MP_BUSSES]; · 4 unmodified lines
20extern int quad_local_to_mp_bus_id [NR_CPUS/4][4];31extern int quad_local_to_mp_bus_id [NR_CPUS/4][4];
21#endif32#endif
22 33
23#define MAX_APICID 25634#define MAX_APICID 256
24 35
25#else36#else /* CONFIG_X86_64: */
26 37
27#define MAX_MP_BUSSES 25638#define MAX_MP_BUSSES 256
28/* Each PCI slot may be a combo card with its own bus. 4 IRQ pins per slot. */39/* Each PCI slot may be a combo card with its own bus. 4 IRQ pins per slot. */
29#define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4)40#define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4)
30 41
31#endif42#endif /* CONFIG_X86_64 */
32 43
33extern void early_find_smp_config(void);44extern void early_find_smp_config(void);
34extern void early_get_smp_config(void);45extern void early_get_smp_config(void);
@@ -45,11 +56,13 @@ extern int smp_found_config; · 10 unmodified lines
45extern int mpc_default_type;56extern int mpc_default_type;
46extern unsigned long mp_lapic_addr;57extern unsigned long mp_lapic_addr;
47 58
48extern void find_smp_config(void);
49extern void get_smp_config(void);59extern void get_smp_config(void);
60
50#ifdef CONFIG_X86_MPPARSE61#ifdef CONFIG_X86_MPPARSE
62extern void find_smp_config(void);
51extern void early_reserve_e820_mpc_new(void);63extern void early_reserve_e820_mpc_new(void);
52#else64#else
65static inline void find_smp_config(void) { }
53static inline void early_reserve_e820_mpc_new(void) { }66static inline void early_reserve_e820_mpc_new(void) { }
54#endif67#endif
55 68
@@ -64,6 +77,8 @@ extern int acpi_probe_gsi(void); · 8 unmodified lines
64#ifdef CONFIG_X86_IO_APIC77#ifdef CONFIG_X86_IO_APIC
65extern int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,78extern int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,
66 u32 gsi, int triggering, int polarity);79 u32 gsi, int triggering, int polarity);
80extern int mp_find_ioapic(int gsi);
81extern int mp_find_ioapic_pin(int ioapic, int gsi);
67#else82#else
68static inline int83static inline int
69mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,84mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,
@@ -148,4 +163,8 @@ static inline void physid_set_mask_of_physid(int physid, physid_mask_t *map) · 78 unmodified lines
148 163
149extern physid_mask_t phys_cpu_present_map;164extern physid_mask_t phys_cpu_present_map;
150 165
166extern int generic_mps_oem_check(struct mpc_table *, char *, char *);
167
168extern int default_acpi_madt_oem_check(char *, char *);
169
151#endif /* _ASM_X86_MPSPEC_H */170#endif /* _ASM_X86_MPSPEC_H */
arch/x86/include/asm/mpspec_def.h+12−11
@@ -24,17 +24,18 @@ · 23 unmodified lines
24# endif24# endif
25#endif25#endif
26 26
27struct intel_mp_floating {27/* Intel MP Floating Pointer Structure */
28 char mpf_signature[4]; /* "_MP_" */28struct mpf_intel {
29 unsigned int mpf_physptr; /* Configuration table address */29 char signature[4]; /* "_MP_" */
30 unsigned char mpf_length; /* Our length (paragraphs) */30 unsigned int physptr; /* Configuration table address */
31 unsigned char mpf_specification;/* Specification version */31 unsigned char length; /* Our length (paragraphs) */
32 unsigned char mpf_checksum; /* Checksum (makes sum 0) */32 unsigned char specification; /* Specification version */
33 unsigned char mpf_feature1; /* Standard or configuration ? */33 unsigned char checksum; /* Checksum (makes sum 0) */
34 unsigned char mpf_feature2; /* Bit7 set for IMCR|PIC */34 unsigned char feature1; /* Standard or configuration ? */
35 unsigned char mpf_feature3; /* Unused (0) */35 unsigned char feature2; /* Bit7 set for IMCR|PIC */
36 unsigned char mpf_feature4; /* Unused (0) */36 unsigned char feature3; /* Unused (0) */
37 unsigned char mpf_feature5; /* Unused (0) */37 unsigned char feature4; /* Unused (0) */
38 unsigned char feature5; /* Unused (0) */
38};39};
39 40
40#define MPC_SIGNATURE "PCMP"41#define MPC_SIGNATURE "PCMP"
arch/x86/include/asm/numa_32.h+5−1
@@ -4,8 +4,12 @@ · 3 unmodified lines
4extern int pxm_to_nid(int pxm);4extern int pxm_to_nid(int pxm);
5extern void numa_remove_cpu(int cpu);5extern void numa_remove_cpu(int cpu);
6 6
7#ifdef CONFIG_NUMA7#ifdef CONFIG_HIGHMEM
8extern void set_highmem_pages_init(void);8extern void set_highmem_pages_init(void);
9#else
10static inline void set_highmem_pages_init(void)
11{
12}
9#endif13#endif
10 14
11#endif /* _ASM_X86_NUMA_32_H */15#endif /* _ASM_X86_NUMA_32_H */
arch/x86/include/asm/numaq.h+2−0
@@ -31,6 +31,8 @@ · 30 unmodified lines
31extern int found_numaq;31extern int found_numaq;
32extern int get_memcfg_numaq(void);32extern int get_memcfg_numaq(void);
33 33
34extern void *xquad_portio;
35
34/*36/*
35 * SYS_CFG_DATA_PRIV_ADDR, struct eachquadmem, and struct sys_cfg_data are the37 * SYS_CFG_DATA_PRIV_ADDR, struct eachquadmem, and struct sys_cfg_data are the
36 */38 */
arch/x86/include/asm/numaq/apic.h+0−142
@@ -1,142 +0,0 @@
1#ifndef __ASM_NUMAQ_APIC_H
2#define __ASM_NUMAQ_APIC_H
3
4#include <asm/io.h>
5#include <linux/mmzone.h>
6#include <linux/nodemask.h>
7
8#define APIC_DFR_VALUE (APIC_DFR_CLUSTER)
9
10static inline const cpumask_t *target_cpus(void)
11{
12 return &CPU_MASK_ALL;
13}
14
15#define NO_BALANCE_IRQ (1)
16#define esr_disable (1)
17
18#define INT_DELIVERY_MODE dest_LowestPrio
19#define INT_DEST_MODE 0 /* physical delivery on LOCAL quad */
20
21static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
22{
23 return physid_isset(apicid, bitmap);
24}
25static inline unsigned long check_apicid_present(int bit)
26{
27 return physid_isset(bit, phys_cpu_present_map);
28}
29#define apicid_cluster(apicid) (apicid & 0xF0)
30
31static inline int apic_id_registered(void)
32{
33 return 1;
34}
35
36static inline void init_apic_ldr(void)
37{
38 /* Already done in NUMA-Q firmware */
39}
40
41static inline void setup_apic_routing(void)
42{
43 printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
44 "NUMA-Q", nr_ioapics);
45}
46
47/*
48 * Skip adding the timer int on secondary nodes, which causes
49 * a small but painful rift in the time-space continuum.
50 */
51static inline int multi_timer_check(int apic, int irq)
52{
53 return apic != 0 && irq == 0;
54}
55
56static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
57{
58 /* We don't have a good way to do this yet - hack */
59 return physids_promote(0xFUL);
60}
61
62/* Mapping from cpu number to logical apicid */
63extern u8 cpu_2_logical_apicid[];
64static inline int cpu_to_logical_apicid(int cpu)
65{
66 if (cpu >= nr_cpu_ids)
67 return BAD_APICID;
68 return (int)cpu_2_logical_apicid[cpu];
69}
70
71/*
72 * Supporting over 60 cpus on NUMA-Q requires a locality-dependent
73 * cpu to APIC ID relation to properly interact with the intelligent
74 * mode of the cluster controller.
75 */
76static inline int cpu_present_to_apicid(int mps_cpu)
77{
78 if (mps_cpu < 60)
79 return ((mps_cpu >> 2) << 4) | (1 << (mps_cpu & 0x3));
80 else
81 return BAD_APICID;
82}
83
84static inline int apicid_to_node(int logical_apicid)
85{
86 return logical_apicid >> 4;
87}
88
89static inline physid_mask_t apicid_to_cpu_present(int logical_apicid)
90{
91 int node = apicid_to_node(logical_apicid);
92 int cpu = __ffs(logical_apicid & 0xf);
93
94 return physid_mask_of_physid(cpu + 4*node);
95}
96
97extern void *xquad_portio;
98
99static inline void setup_portio_remap(void)
100{
101 int num_quads = num_online_nodes();
102
103 if (num_quads <= 1)
104 return;
105
106 printk("Remapping cross-quad port I/O for %d quads\n", num_quads);
107 xquad_portio = ioremap(XQUAD_PORTIO_BASE, num_quads*XQUAD_PORTIO_QUAD);
108 printk("xquad_portio vaddr 0x%08lx, len %08lx\n",
109 (u_long) xquad_portio, (u_long) num_quads*XQUAD_PORTIO_QUAD);
110}
111
112static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
113{
114 return (1);
115}
116
117static inline void enable_apic_mode(void)
118{
119}
120
121/*
122 * We use physical apicids here, not logical, so just return the default
123 * physical broadcast to stop people from breaking us
124 */
125static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask)
126{
127 return (int) 0xF;
128}
129
130static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *cpumask,
131 const struct cpumask *andmask)
132{
133 return (int) 0xF;
134}
135
136/* No NUMA-Q box has a HT CPU, but it can't hurt to use the default code. */
137static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
138{
139 return cpuid_apic >> index_msb;
140}
141
142#endif /* __ASM_NUMAQ_APIC_H */
arch/x86/include/asm/numaq/apicdef.h+0−14
@@ -1,14 +0,0 @@
1#ifndef __ASM_NUMAQ_APICDEF_H
2#define __ASM_NUMAQ_APICDEF_H
3
4
5#define APIC_ID_MASK (0xF<<24)
6
7static inline unsigned get_apic_id(unsigned long x)
8{
9 return (((x)>>24)&0x0F);
10}
11
12#define GET_APIC_ID(x) get_apic_id(x)
13
14#endif
arch/x86/include/asm/numaq/ipi.h+0−22
@@ -1,22 +0,0 @@
1#ifndef __ASM_NUMAQ_IPI_H
2#define __ASM_NUMAQ_IPI_H
3
4void send_IPI_mask_sequence(const struct cpumask *mask, int vector);
5void send_IPI_mask_allbutself(const struct cpumask *mask, int vector);
6
7static inline void send_IPI_mask(const struct cpumask *mask, int vector)
8{
9 send_IPI_mask_sequence(mask, vector);
10}
11
12static inline void send_IPI_allbutself(int vector)
13{
14 send_IPI_mask_allbutself(cpu_online_mask, vector);
15}
16
17static inline void send_IPI_all(int vector)
18{
19 send_IPI_mask(cpu_online_mask, vector);
20}
21
22#endif /* __ASM_NUMAQ_IPI_H */
arch/x86/include/asm/numaq/mpparse.h+0−6
@@ -1,6 +0,0 @@
1#ifndef __ASM_NUMAQ_MPPARSE_H
2#define __ASM_NUMAQ_MPPARSE_H
3
4extern void numaq_mps_oem_check(struct mpc_table *, char *, char *);
5
6#endif /* __ASM_NUMAQ_MPPARSE_H */
arch/x86/include/asm/numaq/wakecpu.h+0−45
@@ -1,45 +0,0 @@
1#ifndef __ASM_NUMAQ_WAKECPU_H
2#define __ASM_NUMAQ_WAKECPU_H
3
4/* This file copes with machines that wakeup secondary CPUs by NMIs */
5
6#define TRAMPOLINE_PHYS_LOW (0x8)
7#define TRAMPOLINE_PHYS_HIGH (0xa)
8
9/* We don't do anything here because we use NMI's to boot instead */
10static inline void wait_for_init_deassert(atomic_t *deassert)
11{
12}
13
14/*
15 * Because we use NMIs rather than the INIT-STARTUP sequence to
16 * bootstrap the CPUs, the APIC may be in a weird state. Kick it.
17 */
18static inline void smp_callin_clear_local_apic(void)
19{
20 clear_local_APIC();
21}
22
23static inline void store_NMI_vector(unsigned short *high, unsigned short *low)
24{
25 printk("Storing NMI vector\n");
26 *high =
27 *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH));
28 *low =
29 *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW));
30}
31
32static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
33{
34 printk("Restoring NMI vector\n");
35 *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH)) =
36 *high;
37 *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) =
38 *low;
39}
40
41static inline void inquire_remote_apic(int apicid)
42{
43}
44
45#endif /* __ASM_NUMAQ_WAKECPU_H */
arch/x86/include/asm/page.h+4−148
@@ -1,42 +1,11 @@
1#ifndef _ASM_X86_PAGE_H1#ifndef _ASM_X86_PAGE_H
2#define _ASM_X86_PAGE_H2#define _ASM_X86_PAGE_H
3 3
4#include <linux/const.h>4#include <linux/types.h>
5
6/* PAGE_SHIFT determines the page size */
7#define PAGE_SHIFT 12
8#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
9#define PAGE_MASK (~(PAGE_SIZE-1))
10 5
11#ifdef __KERNEL__6#ifdef __KERNEL__
12 7
13#define __PHYSICAL_MASK ((phys_addr_t)(1ULL << __PHYSICAL_MASK_SHIFT) - 1)8#include <asm/page_types.h>
14#define __VIRTUAL_MASK ((1UL << __VIRTUAL_MASK_SHIFT) - 1)
15
16/* Cast PAGE_MASK to a signed type so that it is sign-extended if
17 virtual addresses are 32-bits but physical addresses are larger
18 (ie, 32-bit PAE). */
19#define PHYSICAL_PAGE_MASK (((signed long)PAGE_MASK) & __PHYSICAL_MASK)
20
21/* PTE_PFN_MASK extracts the PFN from a (pte|pmd|pud|pgd)val_t */
22#define PTE_PFN_MASK ((pteval_t)PHYSICAL_PAGE_MASK)
23
24/* PTE_FLAGS_MASK extracts the flags from a (pte|pmd|pud|pgd)val_t */
25#define PTE_FLAGS_MASK (~PTE_PFN_MASK)
26
27#define PMD_PAGE_SIZE (_AC(1, UL) << PMD_SHIFT)
28#define PMD_PAGE_MASK (~(PMD_PAGE_SIZE-1))
29
30#define HPAGE_SHIFT PMD_SHIFT
31#define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT)
32#define HPAGE_MASK (~(HPAGE_SIZE - 1))
33#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
34
35#define HUGE_MAX_HSTATE 2
36
37#ifndef __ASSEMBLY__
38#include <linux/types.h>
39#endif
40 9
41#ifdef CONFIG_X86_6410#ifdef CONFIG_X86_64
42#include <asm/page_64.h>11#include <asm/page_64.h>
@@ -44,38 +13,18 @@ · 1 unmodified line
44#include <asm/page_32.h>13#include <asm/page_32.h>
45#endif /* CONFIG_X86_64 */14#endif /* CONFIG_X86_64 */
46 15
47#define PAGE_OFFSET ((unsigned long)__PAGE_OFFSET)
48
49#define VM_DATA_DEFAULT_FLAGS \
50 (((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0 ) | \
51 VM_READ | VM_WRITE | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
52
53
54#ifndef __ASSEMBLY__16#ifndef __ASSEMBLY__
55 17
56typedef struct { pgdval_t pgd; } pgd_t;
57typedef struct { pgprotval_t pgprot; } pgprot_t;
58
59extern int page_is_ram(unsigned long pagenr);
60extern int devmem_is_allowed(unsigned long pagenr);
61extern void map_devmem(unsigned long pfn, unsigned long size,
62 pgprot_t vma_prot);
63extern void unmap_devmem(unsigned long pfn, unsigned long size,
64 pgprot_t vma_prot);
65
66extern unsigned long max_low_pfn_mapped;
67extern unsigned long max_pfn_mapped;
68
69struct page;18struct page;
70 19
71static inline void clear_user_page(void *page, unsigned long vaddr,20static inline void clear_user_page(void *page, unsigned long vaddr,
72 struct page *pg)21 struct page *pg)
73{22{
74 clear_page(page);23 clear_page(page);
75}24}
76 25
77static inline void copy_user_page(void *to, void *from, unsigned long vaddr,26static inline void copy_user_page(void *to, void *from, unsigned long vaddr,
78 struct page *topage)27 struct page *topage)
79{28{
80 copy_page(to, from);29 copy_page(to, from);
81}30}
@@ -84,99 +33,6 @@ static inline void copy_user_page(void *to, void *from, unsigned long vaddr, · 2 unmodified lines
84 alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr)33 alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr)
85#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE34#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE
86 35
87static inline pgd_t native_make_pgd(pgdval_t val)
88{
89 return (pgd_t) { val };
90}
91
92static inline pgdval_t native_pgd_val(pgd_t pgd)
93{
94 return pgd.pgd;
95}
96
97#if PAGETABLE_LEVELS >= 3
98#if PAGETABLE_LEVELS == 4
99typedef struct { pudval_t pud; } pud_t;
100
101static inline pud_t native_make_pud(pmdval_t val)
102{
103 return (pud_t) { val };
104}
105
106static inline pudval_t native_pud_val(pud_t pud)
107{
108 return pud.pud;
109}
110#else /* PAGETABLE_LEVELS == 3 */
111#include <asm-generic/pgtable-nopud.h>
112
113static inline pudval_t native_pud_val(pud_t pud)
114{
115 return native_pgd_val(pud.pgd);
116}
117#endif /* PAGETABLE_LEVELS == 4 */
118
119typedef struct { pmdval_t pmd; } pmd_t;
120
121static inline pmd_t native_make_pmd(pmdval_t val)
122{
123 return (pmd_t) { val };
124}
125
126static inline pmdval_t native_pmd_val(pmd_t pmd)
127{
128 return pmd.pmd;
129}
130#else /* PAGETABLE_LEVELS == 2 */
131#include <asm-generic/pgtable-nopmd.h>
132
133static inline pmdval_t native_pmd_val(pmd_t pmd)
134{
135 return native_pgd_val(pmd.pud.pgd);
136}
137#endif /* PAGETABLE_LEVELS >= 3 */
138
139static inline pte_t native_make_pte(pteval_t val)
140{
141 return (pte_t) { .pte = val };
142}
143
144static inline pteval_t native_pte_val(pte_t pte)
145{
146 return pte.pte;
147}
148
149static inline pteval_t native_pte_flags(pte_t pte)
150{
151 return native_pte_val(pte) & PTE_FLAGS_MASK;
152}
153
154#define pgprot_val(x) ((x).pgprot)
155#define __pgprot(x) ((pgprot_t) { (x) } )
156
157#ifdef CONFIG_PARAVIRT
158#include <asm/paravirt.h>
159#else /* !CONFIG_PARAVIRT */
160
161#define pgd_val(x) native_pgd_val(x)
162#define __pgd(x) native_make_pgd(x)
163
164#ifndef __PAGETABLE_PUD_FOLDED
165#define pud_val(x) native_pud_val(x)
166#define __pud(x) native_make_pud(x)
167#endif
168
169#ifndef __PAGETABLE_PMD_FOLDED
170#define pmd_val(x) native_pmd_val(x)
171#define __pmd(x) native_make_pmd(x)
172#endif
173
174#define pte_val(x) native_pte_val(x)
175#define pte_flags(x) native_pte_flags(x)
176#define __pte(x) native_make_pte(x)
177
178#endif /* CONFIG_PARAVIRT */
179
180#define __pa(x) __phys_addr((unsigned long)(x))36#define __pa(x) __phys_addr((unsigned long)(x))
181#define __pa_nodebug(x) __phys_addr_nodebug((unsigned long)(x))37#define __pa_nodebug(x) __phys_addr_nodebug((unsigned long)(x))
182/* __pa_symbol should be used for C visible symbols.38/* __pa_symbol should be used for C visible symbols.
arch/x86/include/asm/page_32.h+1−86
@@ -1,82 +1,14 @@
1#ifndef _ASM_X86_PAGE_32_H1#ifndef _ASM_X86_PAGE_32_H
2#define _ASM_X86_PAGE_32_H2#define _ASM_X86_PAGE_32_H
3 3
4/*4#include <asm/page_32_types.h>
5 * This handles the memory map.
6 *
7 * A __PAGE_OFFSET of 0xC0000000 means that the kernel has
8 * a virtual address space of one gigabyte, which limits the
9 * amount of physical memory you can use to about 950MB.
10 *
11 * If you want more physical memory than this then see the CONFIG_HIGHMEM4G
12 * and CONFIG_HIGHMEM64G options in the kernel configuration.
13 */
14#define __PAGE_OFFSET _AC(CONFIG_PAGE_OFFSET, UL)
15
16#ifdef CONFIG_4KSTACKS
17#define THREAD_ORDER 0
18#else
19#define THREAD_ORDER 1
20#endif
21#define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER)
22
23#define STACKFAULT_STACK 0
24#define DOUBLEFAULT_STACK 1
25#define NMI_STACK 0
26#define DEBUG_STACK 0
27#define MCE_STACK 0
28#define N_EXCEPTION_STACKS 1
29
30#ifdef CONFIG_X86_PAE
31/* 44=32+12, the limit we can fit into an unsigned long pfn */
32#define __PHYSICAL_MASK_SHIFT 44
33#define __VIRTUAL_MASK_SHIFT 32
34#define PAGETABLE_LEVELS 3
35
36#ifndef __ASSEMBLY__
37typedef u64 pteval_t;
38typedef u64 pmdval_t;
39typedef u64 pudval_t;
40typedef u64 pgdval_t;
41typedef u64 pgprotval_t;
42
43typedef union {
44 struct {
45 unsigned long pte_low, pte_high;
46 };
47 pteval_t pte;
48} pte_t;
49#endif /* __ASSEMBLY__
50 */
51#else /* !CONFIG_X86_PAE */
52#define __PHYSICAL_MASK_SHIFT 32
53#define __VIRTUAL_MASK_SHIFT 32
54#define PAGETABLE_LEVELS 2
55
56#ifndef __ASSEMBLY__
57typedef unsigned long pteval_t;
58typedef unsigned long pmdval_t;
59typedef unsigned long pudval_t;
60typedef unsigned long pgdval_t;
61typedef unsigned long pgprotval_t;
62
63typedef union {
64 pteval_t pte;
65 pteval_t pte_low;
66} pte_t;
67
68#endif /* __ASSEMBLY__ */
69#endif /* CONFIG_X86_PAE */
70 5
71#ifndef __ASSEMBLY__6#ifndef __ASSEMBLY__
72typedef struct page *pgtable_t;
73#endif
74 7
75#ifdef CONFIG_HUGETLB_PAGE8#ifdef CONFIG_HUGETLB_PAGE
76#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA9#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
77#endif10#endif
78 11
79#ifndef __ASSEMBLY__
80#define __phys_addr_nodebug(x) ((x) - PAGE_OFFSET)12#define __phys_addr_nodebug(x) ((x) - PAGE_OFFSET)
81#ifdef CONFIG_DEBUG_VIRTUAL13#ifdef CONFIG_DEBUG_VIRTUAL
82extern unsigned long __phys_addr(unsigned long);14extern unsigned long __phys_addr(unsigned long);
@@ -89,23 +21,6 @@ extern unsigned long __phys_addr(unsigned long); · 6 unmodified lines
89#define pfn_valid(pfn) ((pfn) < max_mapnr)21#define pfn_valid(pfn) ((pfn) < max_mapnr)
90#endif /* CONFIG_FLATMEM */22#endif /* CONFIG_FLATMEM */
91 23
92extern int nx_enabled;
93
94/*
95 * This much address space is reserved for vmalloc() and iomap()
96 * as well as fixmap mappings.
97 */
98extern unsigned int __VMALLOC_RESERVE;
99extern int sysctl_legacy_va_layout;
100
101extern void find_low_pfn_range(void);
102extern unsigned long init_memory_mapping(unsigned long start,
103 unsigned long end);
104extern void initmem_init(unsigned long, unsigned long);
105extern void free_initmem(void);
106extern void setup_bootmem_allocator(void);
107
108
109#ifdef CONFIG_X86_USE_3DNOW24#ifdef CONFIG_X86_USE_3DNOW
110#include <asm/mmx.h>25#include <asm/mmx.h>
111 26
arch/x86/include/asm/page_32_types.h+60−0
@@ -0,0 +1,60 @@
1#ifndef _ASM_X86_PAGE_32_DEFS_H
2#define _ASM_X86_PAGE_32_DEFS_H
3
4#include <linux/const.h>
5
6/*
7 * This handles the memory map.
8 *
9 * A __PAGE_OFFSET of 0xC0000000 means that the kernel has
10 * a virtual address space of one gigabyte, which limits the
11 * amount of physical memory you can use to about 950MB.
12 *
13 * If you want more physical memory than this then see the CONFIG_HIGHMEM4G
14 * and CONFIG_HIGHMEM64G options in the kernel configuration.
15 */
16#define __PAGE_OFFSET _AC(CONFIG_PAGE_OFFSET, UL)
17
18#ifdef CONFIG_4KSTACKS
19#define THREAD_ORDER 0
20#else
21#define THREAD_ORDER 1
22#endif
23#define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER)
24
25#define STACKFAULT_STACK 0
26#define DOUBLEFAULT_STACK 1
27#define NMI_STACK 0
28#define DEBUG_STACK 0
29#define MCE_STACK 0
30#define N_EXCEPTION_STACKS 1
31
32#ifdef CONFIG_X86_PAE
33/* 44=32+12, the limit we can fit into an unsigned long pfn */
34#define __PHYSICAL_MASK_SHIFT 44
35#define __VIRTUAL_MASK_SHIFT 32
36
37#else /* !CONFIG_X86_PAE */
38#define __PHYSICAL_MASK_SHIFT 32
39#define __VIRTUAL_MASK_SHIFT 32
40#endif /* CONFIG_X86_PAE */
41
42#ifndef __ASSEMBLY__
43
44/*
45 * This much address space is reserved for vmalloc() and iomap()
46 * as well as fixmap mappings.
47 */
48extern unsigned int __VMALLOC_RESERVE;
49extern int sysctl_legacy_va_layout;
50
51extern void find_low_pfn_range(void);
52extern unsigned long init_memory_mapping(unsigned long start,
53 unsigned long end);
54extern void initmem_init(unsigned long, unsigned long);
55extern void free_initmem(void);
56extern void setup_bootmem_allocator(void);
57
58#endif /* !__ASSEMBLY__ */
59
60#endif /* _ASM_X86_PAGE_32_DEFS_H */
arch/x86/include/asm/page_64.h+1−100
@@ -1,105 +1,6 @@
1#ifndef _ASM_X86_PAGE_64_H1#ifndef _ASM_X86_PAGE_64_H
2#define _ASM_X86_PAGE_64_H2#define _ASM_X86_PAGE_64_H
3 3
4#define PAGETABLE_LEVELS 44#include <asm/page_64_types.h>
5
6#define THREAD_ORDER 1
7#define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER)
8#define CURRENT_MASK (~(THREAD_SIZE - 1))
9
10#define EXCEPTION_STACK_ORDER 0
11#define EXCEPTION_STKSZ (PAGE_SIZE << EXCEPTION_STACK_ORDER)
12
13#define DEBUG_STACK_ORDER (EXCEPTION_STACK_ORDER + 1)
14#define DEBUG_STKSZ (PAGE_SIZE << DEBUG_STACK_ORDER)
15
16#define IRQSTACK_ORDER 2
17#define IRQSTACKSIZE (PAGE_SIZE << IRQSTACK_ORDER)
18
19#define STACKFAULT_STACK 1
20#define DOUBLEFAULT_STACK 2
21#define NMI_STACK 3
22#define DEBUG_STACK 4
23#define MCE_STACK 5
24#define N_EXCEPTION_STACKS 5 /* hw limit: 7 */
25
26#define PUD_PAGE_SIZE (_AC(1, UL) << PUD_SHIFT)
27#define PUD_PAGE_MASK (~(PUD_PAGE_SIZE-1))
28
29/*
30 * Set __PAGE_OFFSET to the most negative possible address +
31 * PGDIR_SIZE*16 (pgd slot 272). The gap is to allow a space for a
32 * hypervisor to fit. Choosing 16 slots here is arbitrary, but it's
33 * what Xen requires.
34 */
35#define __PAGE_OFFSET _AC(0xffff880000000000, UL)
36
37#define __PHYSICAL_START CONFIG_PHYSICAL_START
38#define __KERNEL_ALIGN 0x200000
39
40/*
41 * Make sure kernel is aligned to 2MB address. Catching it at compile
42 * time is better. Change your config file and compile the kernel
43 * for a 2MB aligned address (CONFIG_PHYSICAL_START)
44 */
45#if (CONFIG_PHYSICAL_START % __KERNEL_ALIGN) != 0
46#error "CONFIG_PHYSICAL_START must be a multiple of 2MB"
47#endif
48
49#define __START_KERNEL (__START_KERNEL_map + __PHYSICAL_START)
50#define __START_KERNEL_map _AC(0xffffffff80000000, UL)
51
52/* See Documentation/x86_64/mm.txt for a description of the memory map. */
53#define __PHYSICAL_MASK_SHIFT 46
54#define __VIRTUAL_MASK_SHIFT 48
55
56/*
57 * Kernel image size is limited to 512 MB (see level2_kernel_pgt in
58 * arch/x86/kernel/head_64.S), and it is mapped here:
59 */
60#define KERNEL_IMAGE_SIZE (512 * 1024 * 1024)
61#define KERNEL_IMAGE_START _AC(0xffffffff80000000, UL)
62
63#ifndef __ASSEMBLY__
64void clear_page(void *page);
65void copy_page(void *to, void *from);
66
67/* duplicated to the one in bootmem.h */
68extern unsigned long max_pfn;
69extern unsigned long phys_base;
70
71extern unsigned long __phys_addr(unsigned long);
72#define __phys_reloc_hide(x) (x)
73
74/*
75 * These are used to make use of C type-checking..
76 */
77typedef unsigned long pteval_t;
78typedef unsigned long pmdval_t;
79typedef unsigned long pudval_t;
80typedef unsigned long pgdval_t;
81typedef unsigned long pgprotval_t;
82
83typedef struct page *pgtable_t;
84
85typedef struct { pteval_t pte; } pte_t;
86
87#define vmemmap ((struct page *)VMEMMAP_START)
88
89extern unsigned long init_memory_mapping(unsigned long start,
90 unsigned long end);
91
92extern void initmem_init(unsigned long start_pfn, unsigned long end_pfn);
93extern void free_initmem(void);
94
95extern void init_extra_mapping_uc(unsigned long phys, unsigned long size);
96extern void init_extra_mapping_wb(unsigned long phys, unsigned long size);
97
98#endif /* !__ASSEMBLY__ */
99
100#ifdef CONFIG_FLATMEM
101#define pfn_valid(pfn) ((pfn) < max_pfn)
102#endif
103
104 5
105#endif /* _ASM_X86_PAGE_64_H */6#endif /* _ASM_X86_PAGE_64_H */
arch/x86/include/asm/page_64_types.h+89−0
@@ -0,0 +1,89 @@
1#ifndef _ASM_X86_PAGE_64_DEFS_H
2#define _ASM_X86_PAGE_64_DEFS_H
3
4#define THREAD_ORDER 1
5#define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER)
6#define CURRENT_MASK (~(THREAD_SIZE - 1))
7
8#define EXCEPTION_STACK_ORDER 0
9#define EXCEPTION_STKSZ (PAGE_SIZE << EXCEPTION_STACK_ORDER)
10
11#define DEBUG_STACK_ORDER (EXCEPTION_STACK_ORDER + 1)
12#define DEBUG_STKSZ (PAGE_SIZE << DEBUG_STACK_ORDER)
13
14#define IRQ_STACK_ORDER 2
15#define IRQ_STACK_SIZE (PAGE_SIZE << IRQ_STACK_ORDER)
16
17#define STACKFAULT_STACK 1
18#define DOUBLEFAULT_STACK 2
19#define NMI_STACK 3
20#define DEBUG_STACK 4
21#define MCE_STACK 5
22#define N_EXCEPTION_STACKS 5 /* hw limit: 7 */
23
24#define PUD_PAGE_SIZE (_AC(1, UL) << PUD_SHIFT)
25#define PUD_PAGE_MASK (~(PUD_PAGE_SIZE-1))
26
27/*
28 * Set __PAGE_OFFSET to the most negative possible address +
29 * PGDIR_SIZE*16 (pgd slot 272). The gap is to allow a space for a
30 * hypervisor to fit. Choosing 16 slots here is arbitrary, but it's
31 * what Xen requires.
32 */
33#define __PAGE_OFFSET _AC(0xffff880000000000, UL)
34
35#define __PHYSICAL_START CONFIG_PHYSICAL_START
36#define __KERNEL_ALIGN 0x200000
37
38/*
39 * Make sure kernel is aligned to 2MB address. Catching it at compile
40 * time is better. Change your config file and compile the kernel
41 * for a 2MB aligned address (CONFIG_PHYSICAL_START)
42 */
43#if (CONFIG_PHYSICAL_START % __KERNEL_ALIGN) != 0
44#error "CONFIG_PHYSICAL_START must be a multiple of 2MB"
45#endif
46
47#define __START_KERNEL (__START_KERNEL_map + __PHYSICAL_START)
48#define __START_KERNEL_map _AC(0xffffffff80000000, UL)
49
50/* See Documentation/x86_64/mm.txt for a description of the memory map. */
51#define __PHYSICAL_MASK_SHIFT 46
52#define __VIRTUAL_MASK_SHIFT 48
53
54/*
55 * Kernel image size is limited to 512 MB (see level2_kernel_pgt in
56 * arch/x86/kernel/head_64.S), and it is mapped here:
57 */
58#define KERNEL_IMAGE_SIZE (512 * 1024 * 1024)
59#define KERNEL_IMAGE_START _AC(0xffffffff80000000, UL)
60
61#ifndef __ASSEMBLY__
62void clear_page(void *page);
63void copy_page(void *to, void *from);
64
65/* duplicated to the one in bootmem.h */
66extern unsigned long max_pfn;
67extern unsigned long phys_base;
68
69extern unsigned long __phys_addr(unsigned long);
70#define __phys_reloc_hide(x) (x)
71
72#define vmemmap ((struct page *)VMEMMAP_START)
73
74extern unsigned long init_memory_mapping(unsigned long start,
75 unsigned long end);
76
77extern void initmem_init(unsigned long start_pfn, unsigned long end_pfn);
78extern void free_initmem(void);
79
80extern void init_extra_mapping_uc(unsigned long phys, unsigned long size);
81extern void init_extra_mapping_wb(unsigned long phys, unsigned long size);
82
83#endif /* !__ASSEMBLY__ */
84
85#ifdef CONFIG_FLATMEM
86#define pfn_valid(pfn) ((pfn) < max_pfn)
87#endif
88
89#endif /* _ASM_X86_PAGE_64_DEFS_H */
arch/x86/include/asm/page_types.h+57−0
@@ -0,0 +1,57 @@
1#ifndef _ASM_X86_PAGE_DEFS_H
2#define _ASM_X86_PAGE_DEFS_H
3
4#include <linux/const.h>
5
6/* PAGE_SHIFT determines the page size */
7#define PAGE_SHIFT 12
8#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
9#define PAGE_MASK (~(PAGE_SIZE-1))
10
11#define __PHYSICAL_MASK ((phys_addr_t)(1ULL << __PHYSICAL_MASK_SHIFT) - 1)
12#define __VIRTUAL_MASK ((1UL << __VIRTUAL_MASK_SHIFT) - 1)
13
14/* Cast PAGE_MASK to a signed type so that it is sign-extended if
15 virtual addresses are 32-bits but physical addresses are larger
16 (ie, 32-bit PAE). */
17#define PHYSICAL_PAGE_MASK (((signed long)PAGE_MASK) & __PHYSICAL_MASK)
18
19#define PMD_PAGE_SIZE (_AC(1, UL) << PMD_SHIFT)
20#define PMD_PAGE_MASK (~(PMD_PAGE_SIZE-1))
21
22#define HPAGE_SHIFT PMD_SHIFT
23#define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT)
24#define HPAGE_MASK (~(HPAGE_SIZE - 1))
25#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
26
27#define HUGE_MAX_HSTATE 2
28
29#define PAGE_OFFSET ((unsigned long)__PAGE_OFFSET)
30
31#define VM_DATA_DEFAULT_FLAGS \
32 (((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0 ) | \
33 VM_READ | VM_WRITE | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
34
35#ifdef CONFIG_X86_64
36#include <asm/page_64_types.h>
37#else
38#include <asm/page_32_types.h>
39#endif /* CONFIG_X86_64 */
40
41#ifndef __ASSEMBLY__
42
43struct pgprot;
44
45extern int page_is_ram(unsigned long pagenr);
46extern int devmem_is_allowed(unsigned long pagenr);
47extern void map_devmem(unsigned long pfn, unsigned long size,
48 struct pgprot vma_prot);
49extern void unmap_devmem(unsigned long pfn, unsigned long size,
50 struct pgprot vma_prot);
51
52extern unsigned long max_low_pfn_mapped;
53extern unsigned long max_pfn_mapped;
54
55#endif /* !__ASSEMBLY__ */
56
57#endif /* _ASM_X86_PAGE_DEFS_H */
arch/x86/include/asm/paravirt.h+307−158
@@ -4,7 +4,7 @@ · 3 unmodified lines
4 * para-virtualization: those hooks are defined here. */4 * para-virtualization: those hooks are defined here. */
5 5
6#ifdef CONFIG_PARAVIRT6#ifdef CONFIG_PARAVIRT
7#include <asm/page.h>7#include <asm/pgtable_types.h>
8#include <asm/asm.h>8#include <asm/asm.h>
9 9
10/* Bitmask of what can be clobbered: usually at least eax. */10/* Bitmask of what can be clobbered: usually at least eax. */
@@ -12,21 +12,38 @@ · 1 unmodified line
12#define CLBR_EAX (1 << 0)12#define CLBR_EAX (1 << 0)
13#define CLBR_ECX (1 << 1)13#define CLBR_ECX (1 << 1)
14#define CLBR_EDX (1 << 2)14#define CLBR_EDX (1 << 2)
15#define CLBR_EDI (1 << 3)
15 16
16#ifdef CONFIG_X86_6417#ifdef CONFIG_X86_32
17#define CLBR_RSI (1 << 3)18/* CLBR_ANY should match all regs platform has. For i386, that's just it */
18#define CLBR_RDI (1 << 4)19#define CLBR_ANY ((1 << 4) - 1)
20
21#define CLBR_ARG_REGS (CLBR_EAX | CLBR_EDX | CLBR_ECX)
22#define CLBR_RET_REG (CLBR_EAX | CLBR_EDX)
23#define CLBR_SCRATCH (0)
24#else
25#define CLBR_RAX CLBR_EAX
26#define CLBR_RCX CLBR_ECX
27#define CLBR_RDX CLBR_EDX
28#define CLBR_RDI CLBR_EDI
29#define CLBR_RSI (1 << 4)
19#define CLBR_R8 (1 << 5)30#define CLBR_R8 (1 << 5)
20#define CLBR_R9 (1 << 6)31#define CLBR_R9 (1 << 6)
21#define CLBR_R10 (1 << 7)32#define CLBR_R10 (1 << 7)
22#define CLBR_R11 (1 << 8)33#define CLBR_R11 (1 << 8)
34
23#define CLBR_ANY ((1 << 9) - 1)35#define CLBR_ANY ((1 << 9) - 1)
36
37#define CLBR_ARG_REGS (CLBR_RDI | CLBR_RSI | CLBR_RDX | \
38 CLBR_RCX | CLBR_R8 | CLBR_R9)
39#define CLBR_RET_REG (CLBR_RAX)
40#define CLBR_SCRATCH (CLBR_R10 | CLBR_R11)
41
24#include <asm/desc_defs.h>42#include <asm/desc_defs.h>
25#else
26/* CLBR_ANY should match all regs platform has. For i386, that's just it */
27#define CLBR_ANY ((1 << 3) - 1)
28#endif /* X86_64 */43#endif /* X86_64 */
29 44
45#define CLBR_CALLEE_SAVE ((CLBR_ARG_REGS | CLBR_SCRATCH) & ~CLBR_RET_REG)
46
30#ifndef __ASSEMBLY__47#ifndef __ASSEMBLY__
31#include <linux/types.h>48#include <linux/types.h>
32#include <linux/cpumask.h>49#include <linux/cpumask.h>
@@ -40,6 +57,14 @@ struct tss_struct; · 7 unmodified lines
40struct mm_struct;57struct mm_struct;
41struct desc_struct;58struct desc_struct;
42 59
60/*
61 * Wrapper type for pointers to code which uses the non-standard
62 * calling convention. See PV_CALL_SAVE_REGS_THUNK below.
63 */
64struct paravirt_callee_save {
65 void *func;
66};
67
43/* general info */68/* general info */
44struct pv_info {69struct pv_info {
45 unsigned int kernel_rpl;70 unsigned int kernel_rpl;
@@ -189,11 +214,15 @@ struct pv_irq_ops { · 143 unmodified lines
189 * expected to use X86_EFLAGS_IF; all other bits214 * expected to use X86_EFLAGS_IF; all other bits
190 * returned from save_fl are undefined, and may be ignored by215 * returned from save_fl are undefined, and may be ignored by
191 * restore_fl.216 * restore_fl.
217 *
218 * NOTE: These functions callers expect the callee to preserve
219 * more registers than the standard C calling convention.
192 */220 */
193 unsigned long (*save_fl)(void);221 struct paravirt_callee_save save_fl;
194 void (*restore_fl)(unsigned long);222 struct paravirt_callee_save restore_fl;
195 void (*irq_disable)(void);223 struct paravirt_callee_save irq_disable;
196 void (*irq_enable)(void);224 struct paravirt_callee_save irq_enable;
225
197 void (*safe_halt)(void);226 void (*safe_halt)(void);
198 void (*halt)(void);227 void (*halt)(void);
199 228
@@ -244,7 +273,8 @@ struct pv_mmu_ops { · 44 unmodified lines
244 void (*flush_tlb_user)(void);273 void (*flush_tlb_user)(void);
245 void (*flush_tlb_kernel)(void);274 void (*flush_tlb_kernel)(void);
246 void (*flush_tlb_single)(unsigned long addr);275 void (*flush_tlb_single)(unsigned long addr);
247 void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm,276 void (*flush_tlb_others)(const struct cpumask *cpus,
277 struct mm_struct *mm,
248 unsigned long va);278 unsigned long va);
249 279
250 /* Hooks for allocating and freeing a pagetable top-level */280 /* Hooks for allocating and freeing a pagetable top-level */
@@ -278,12 +308,11 @@ struct pv_mmu_ops { · 27 unmodified lines
278 void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr,308 void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr,
279 pte_t *ptep, pte_t pte);309 pte_t *ptep, pte_t pte);
280 310
281 pteval_t (*pte_val)(pte_t);311 struct paravirt_callee_save pte_val;
282 pteval_t (*pte_flags)(pte_t);312 struct paravirt_callee_save make_pte;
283 pte_t (*make_pte)(pteval_t pte);
284 313
285 pgdval_t (*pgd_val)(pgd_t);314 struct paravirt_callee_save pgd_val;
286 pgd_t (*make_pgd)(pgdval_t pgd);315 struct paravirt_callee_save make_pgd;
287 316
288#if PAGETABLE_LEVELS >= 3317#if PAGETABLE_LEVELS >= 3
289#ifdef CONFIG_X86_PAE318#ifdef CONFIG_X86_PAE
@@ -298,12 +327,12 @@ struct pv_mmu_ops { · 8 unmodified lines
298 327
299 void (*set_pud)(pud_t *pudp, pud_t pudval);328 void (*set_pud)(pud_t *pudp, pud_t pudval);
300 329
301 pmdval_t (*pmd_val)(pmd_t);330 struct paravirt_callee_save pmd_val;
302 pmd_t (*make_pmd)(pmdval_t pmd);331 struct paravirt_callee_save make_pmd;
303 332
304#if PAGETABLE_LEVELS == 4333#if PAGETABLE_LEVELS == 4
305 pudval_t (*pud_val)(pud_t);334 struct paravirt_callee_save pud_val;
306 pud_t (*make_pud)(pudval_t pud);335 struct paravirt_callee_save make_pud;
307 336
308 void (*set_pgd)(pgd_t *pudp, pgd_t pgdval);337 void (*set_pgd)(pgd_t *pudp, pgd_t pgdval);
309#endif /* PAGETABLE_LEVELS == 4 */338#endif /* PAGETABLE_LEVELS == 4 */
@@ -388,6 +417,8 @@ extern struct pv_lock_ops pv_lock_ops; · 78 unmodified lines
388 asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":")417 asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":")
389 418
390unsigned paravirt_patch_nop(void);419unsigned paravirt_patch_nop(void);
420unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len);
421unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len);
391unsigned paravirt_patch_ignore(unsigned len);422unsigned paravirt_patch_ignore(unsigned len);
392unsigned paravirt_patch_call(void *insnbuf,423unsigned paravirt_patch_call(void *insnbuf,
393 const void *target, u16 tgt_clobbers,424 const void *target, u16 tgt_clobbers,
@@ -479,25 +510,45 @@ int paravirt_disable_iospace(void); · 85 unmodified lines
479 * makes sure the incoming and outgoing types are always correct.510 * makes sure the incoming and outgoing types are always correct.
480 */511 */
481#ifdef CONFIG_X86_32512#ifdef CONFIG_X86_32
482#define PVOP_VCALL_ARGS unsigned long __eax, __edx, __ecx513#define PVOP_VCALL_ARGS \
514 unsigned long __eax = __eax, __edx = __edx, __ecx = __ecx
483#define PVOP_CALL_ARGS PVOP_VCALL_ARGS515#define PVOP_CALL_ARGS PVOP_VCALL_ARGS
516
517#define PVOP_CALL_ARG1(x) "a" ((unsigned long)(x))
518#define PVOP_CALL_ARG2(x) "d" ((unsigned long)(x))
519#define PVOP_CALL_ARG3(x) "c" ((unsigned long)(x))
520
484#define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \521#define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \
485 "=c" (__ecx)522 "=c" (__ecx)
486#define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS523#define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS
524
525#define PVOP_VCALLEE_CLOBBERS "=a" (__eax), "=d" (__edx)
526#define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS
527
487#define EXTRA_CLOBBERS528#define EXTRA_CLOBBERS
488#define VEXTRA_CLOBBERS529#define VEXTRA_CLOBBERS
489#else530#else /* CONFIG_X86_64 */
490#define PVOP_VCALL_ARGS unsigned long __edi, __esi, __edx, __ecx531#define PVOP_VCALL_ARGS \
532 unsigned long __edi = __edi, __esi = __esi, \
533 __edx = __edx, __ecx = __ecx
491#define PVOP_CALL_ARGS PVOP_VCALL_ARGS, __eax534#define PVOP_CALL_ARGS PVOP_VCALL_ARGS, __eax
535
536#define PVOP_CALL_ARG1(x) "D" ((unsigned long)(x))
537#define PVOP_CALL_ARG2(x) "S" ((unsigned long)(x))
538#define PVOP_CALL_ARG3(x) "d" ((unsigned long)(x))
539#define PVOP_CALL_ARG4(x) "c" ((unsigned long)(x))
540
492#define PVOP_VCALL_CLOBBERS "=D" (__edi), \541#define PVOP_VCALL_CLOBBERS "=D" (__edi), \
493 "=S" (__esi), "=d" (__edx), \542 "=S" (__esi), "=d" (__edx), \
494 "=c" (__ecx)543 "=c" (__ecx)
495
496#define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax)544#define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax)
497 545
546#define PVOP_VCALLEE_CLOBBERS "=a" (__eax)
547#define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS
548
498#define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11"549#define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11"
499#define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11"550#define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11"
500#endif551#endif /* CONFIG_X86_32 */
501 552
502#ifdef CONFIG_PARAVIRT_DEBUG553#ifdef CONFIG_PARAVIRT_DEBUG
503#define PVOP_TEST_NULL(op) BUG_ON(op == NULL)554#define PVOP_TEST_NULL(op) BUG_ON(op == NULL)
@@ -505,10 +556,11 @@ int paravirt_disable_iospace(void); · 1 unmodified line
505#define PVOP_TEST_NULL(op) ((void)op)556#define PVOP_TEST_NULL(op) ((void)op)
506#endif557#endif
507 558
508#define __PVOP_CALL(rettype, op, pre, post, ...) \559#define ____PVOP_CALL(rettype, op, clbr, call_clbr, extra_clbr, \
560 pre, post, ...) \
509 ({ \561 ({ \
510 rettype __ret; \562 rettype __ret; \
511 PVOP_CALL_ARGS; \563 PVOP_CALL_ARGS; \
512 PVOP_TEST_NULL(op); \564 PVOP_TEST_NULL(op); \
513 /* This is 32-bit specific, but is okay in 64-bit */ \565 /* This is 32-bit specific, but is okay in 64-bit */ \
514 /* since this condition will never hold */ \566 /* since this condition will never hold */ \
@@ -516,70 +568,113 @@ int paravirt_disable_iospace(void); · 1 unmodified line
516 asm volatile(pre \568 asm volatile(pre \
517 paravirt_alt(PARAVIRT_CALL) \569 paravirt_alt(PARAVIRT_CALL) \
518 post \570 post \
519 : PVOP_CALL_CLOBBERS \571 : call_clbr \
520 : paravirt_type(op), \572 : paravirt_type(op), \
521 paravirt_clobber(CLBR_ANY), \573 paravirt_clobber(clbr), \
522 ##__VA_ARGS__ \574 ##__VA_ARGS__ \
523 : "memory", "cc" EXTRA_CLOBBERS); \575 : "memory", "cc" extra_clbr); \
524 __ret = (rettype)((((u64)__edx) << 32) | __eax); \576 __ret = (rettype)((((u64)__edx) << 32) | __eax); \
525 } else { \577 } else { \
526 asm volatile(pre \578 asm volatile(pre \
527 paravirt_alt(PARAVIRT_CALL) \579 paravirt_alt(PARAVIRT_CALL) \
528 post \580 post \
529 : PVOP_CALL_CLOBBERS \581 : call_clbr \
530 : paravirt_type(op), \582 : paravirt_type(op), \
531 paravirt_clobber(CLBR_ANY), \583 paravirt_clobber(clbr), \
532 ##__VA_ARGS__ \584 ##__VA_ARGS__ \
533 : "memory", "cc" EXTRA_CLOBBERS); \585 : "memory", "cc" extra_clbr); \
534 __ret = (rettype)__eax; \586 __ret = (rettype)__eax; \
535 } \587 } \
536 __ret; \588 __ret; \
537 })589 })
538#define __PVOP_VCALL(op, pre, post, ...) \590
591#define __PVOP_CALL(rettype, op, pre, post, ...) \
592 ____PVOP_CALL(rettype, op, CLBR_ANY, PVOP_CALL_CLOBBERS, \
593 EXTRA_CLOBBERS, pre, post, ##__VA_ARGS__)
594
595#define __PVOP_CALLEESAVE(rettype, op, pre, post, ...) \
596 ____PVOP_CALL(rettype, op.func, CLBR_RET_REG, \
597 PVOP_CALLEE_CLOBBERS, , \
598 pre, post, ##__VA_ARGS__)
599
600
601#define ____PVOP_VCALL(op, clbr, call_clbr, extra_clbr, pre, post, ...) \
539 ({ \602 ({ \
540 PVOP_VCALL_ARGS; \603 PVOP_VCALL_ARGS; \
541 PVOP_TEST_NULL(op); \604 PVOP_TEST_NULL(op); \
542 asm volatile(pre \605 asm volatile(pre \
543 paravirt_alt(PARAVIRT_CALL) \606 paravirt_alt(PARAVIRT_CALL) \
544 post \607 post \
545 : PVOP_VCALL_CLOBBERS \608 : call_clbr \
546 : paravirt_type(op), \609 : paravirt_type(op), \
547 paravirt_clobber(CLBR_ANY), \610 paravirt_clobber(clbr), \
548 ##__VA_ARGS__ \611 ##__VA_ARGS__ \
549 : "memory", "cc" VEXTRA_CLOBBERS); \612 : "memory", "cc" extra_clbr); \
550 })613 })
551 614
615#define __PVOP_VCALL(op, pre, post, ...) \
616 ____PVOP_VCALL(op, CLBR_ANY, PVOP_VCALL_CLOBBERS, \
617 VEXTRA_CLOBBERS, \
618 pre, post, ##__VA_ARGS__)
619
620#define __PVOP_VCALLEESAVE(rettype, op, pre, post, ...) \
621 ____PVOP_CALL(rettype, op.func, CLBR_RET_REG, \
622 PVOP_VCALLEE_CLOBBERS, , \
623 pre, post, ##__VA_ARGS__)
624
625
626
552#define PVOP_CALL0(rettype, op) \627#define PVOP_CALL0(rettype, op) \
553 __PVOP_CALL(rettype, op, "", "")628 __PVOP_CALL(rettype, op, "", "")
554#define PVOP_VCALL0(op) \629#define PVOP_VCALL0(op) \
555 __PVOP_VCALL(op, "", "")630 __PVOP_VCALL(op, "", "")
556 631
632#define PVOP_CALLEE0(rettype, op) \
633 __PVOP_CALLEESAVE(rettype, op, "", "")
634#define PVOP_VCALLEE0(op) \
635 __PVOP_VCALLEESAVE(op, "", "")
636
637
557#define PVOP_CALL1(rettype, op, arg1) \638#define PVOP_CALL1(rettype, op, arg1) \
558 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)))639 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
559#define PVOP_VCALL1(op, arg1) \640#define PVOP_VCALL1(op, arg1) \
560 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)))641 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1))
642
643#define PVOP_CALLEE1(rettype, op, arg1) \
644 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
645#define PVOP_VCALLEE1(op, arg1) \
646 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1))
647
561 648
562#define PVOP_CALL2(rettype, op, arg1, arg2) \649#define PVOP_CALL2(rettype, op, arg1, arg2) \
563 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \650 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
564 "1" ((unsigned long)(arg2)))651 PVOP_CALL_ARG2(arg2))
565#define PVOP_VCALL2(op, arg1, arg2) \652#define PVOP_VCALL2(op, arg1, arg2) \
566 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \653 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \
567 "1" ((unsigned long)(arg2)))654 PVOP_CALL_ARG2(arg2))
655
656#define PVOP_CALLEE2(rettype, op, arg1, arg2) \
657 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
658 PVOP_CALL_ARG2(arg2))
659#define PVOP_VCALLEE2(op, arg1, arg2) \
660 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1), \
661 PVOP_CALL_ARG2(arg2))
662
568 663
569#define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \664#define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
570 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \665 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
571 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))666 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
572#define PVOP_VCALL3(op, arg1, arg2, arg3) \667#define PVOP_VCALL3(op, arg1, arg2, arg3) \
573 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \668 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \
574 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))669 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
575 670
576/* This is the only difference in x86_64. We can make it much simpler */671/* This is the only difference in x86_64. We can make it much simpler */
577#ifdef CONFIG_X86_32672#ifdef CONFIG_X86_32
578#define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \673#define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
579 __PVOP_CALL(rettype, op, \674 __PVOP_CALL(rettype, op, \
580 "push %[_arg4];", "lea 4(%%esp),%%esp;", \675 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
581 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \676 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
582 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))677 PVOP_CALL_ARG3(arg3), [_arg4] "mr" ((u32)(arg4)))
583#define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \678#define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
584 __PVOP_VCALL(op, \679 __PVOP_VCALL(op, \
585 "push %[_arg4];", "lea 4(%%esp),%%esp;", \680 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
@@ -587,13 +682,13 @@ int paravirt_disable_iospace(void); · 1 unmodified line
587 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))682 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
588#else683#else
589#define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \684#define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
590 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \685 __PVOP_CALL(rettype, op, "", "", \
591 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \686 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
592 "3"((unsigned long)(arg4)))687 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
593#define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \688#define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
594 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \689 __PVOP_VCALL(op, "", "", \
595 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \690 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
596 "3"((unsigned long)(arg4)))691 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
597#endif692#endif
598 693
599static inline int paravirt_enabled(void)694static inline int paravirt_enabled(void)
@@ -984,10 +1079,11 @@ static inline void __flush_tlb_single(unsigned long addr) · 384 unmodified lines
984 PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);1079 PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
985}1080}
986 1081
987static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,1082static inline void flush_tlb_others(const struct cpumask *cpumask,
1083 struct mm_struct *mm,
988 unsigned long va)1084 unsigned long va)
989{1085{
990 PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, &cpumask, mm, va);1086 PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, cpumask, mm, va);
991}1087}
992 1088
993static inline int paravirt_pgd_alloc(struct mm_struct *mm)1089static inline int paravirt_pgd_alloc(struct mm_struct *mm)
@@ -1059,13 +1155,13 @@ static inline pte_t __pte(pteval_t val) · 65 unmodified lines
1059 pteval_t ret;1155 pteval_t ret;
1060 1156
1061 if (sizeof(pteval_t) > sizeof(long))1157 if (sizeof(pteval_t) > sizeof(long))
1062 ret = PVOP_CALL2(pteval_t,1158 ret = PVOP_CALLEE2(pteval_t,
1063 pv_mmu_ops.make_pte,1159 pv_mmu_ops.make_pte,
1064 val, (u64)val >> 32);1160 val, (u64)val >> 32);
1065 else1161 else
1066 ret = PVOP_CALL1(pteval_t,1162 ret = PVOP_CALLEE1(pteval_t,
1067 pv_mmu_ops.make_pte,1163 pv_mmu_ops.make_pte,
1068 val);1164 val);
1069 1165
1070 return (pte_t) { .pte = ret };1166 return (pte_t) { .pte = ret };
1071}1167}
@@ -1075,29 +1171,12 @@ static inline pteval_t pte_val(pte_t pte) · 3 unmodified lines
1075 pteval_t ret;1171 pteval_t ret;
1076 1172
1077 if (sizeof(pteval_t) > sizeof(long))1173 if (sizeof(pteval_t) > sizeof(long))
1078 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_val,1174 ret = PVOP_CALLEE2(pteval_t, pv_mmu_ops.pte_val,
1079 pte.pte, (u64)pte.pte >> 32);1175 pte.pte, (u64)pte.pte >> 32);
1080 else
1081 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_val,
1082 pte.pte);
1083
1084 return ret;
1085}
1086
1087static inline pteval_t pte_flags(pte_t pte)
1088{
1089 pteval_t ret;
1090
1091 if (sizeof(pteval_t) > sizeof(long))
1092 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_flags,
1093 pte.pte, (u64)pte.pte >> 32);
1094 else1176 else
1095 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_flags,1177 ret = PVOP_CALLEE1(pteval_t, pv_mmu_ops.pte_val,
1096 pte.pte);1178 pte.pte);
1097 1179
1098#ifdef CONFIG_PARAVIRT_DEBUG
1099 BUG_ON(ret & PTE_PFN_MASK);
1100#endif
1101 return ret;1180 return ret;
1102}1181}
1103 1182
@@ -1106,11 +1185,11 @@ static inline pgd_t __pgd(pgdval_t val) · 2 unmodified lines
1106 pgdval_t ret;1185 pgdval_t ret;
1107 1186
1108 if (sizeof(pgdval_t) > sizeof(long))1187 if (sizeof(pgdval_t) > sizeof(long))
1109 ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.make_pgd,1188 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.make_pgd,
1110 val, (u64)val >> 32);1189 val, (u64)val >> 32);
1111 else1190 else
1112 ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.make_pgd,1191 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.make_pgd,
1113 val);1192 val);
1114 1193
1115 return (pgd_t) { ret };1194 return (pgd_t) { ret };
1116}1195}
@@ -1120,11 +1199,11 @@ static inline pgdval_t pgd_val(pgd_t pgd) · 3 unmodified lines
1120 pgdval_t ret;1199 pgdval_t ret;
1121 1200
1122 if (sizeof(pgdval_t) > sizeof(long))1201 if (sizeof(pgdval_t) > sizeof(long))
1123 ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.pgd_val,1202 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.pgd_val,
1124 pgd.pgd, (u64)pgd.pgd >> 32);1203 pgd.pgd, (u64)pgd.pgd >> 32);
1125 else1204 else
1126 ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.pgd_val,1205 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.pgd_val,
1127 pgd.pgd);1206 pgd.pgd);
1128 1207
1129 return ret;1208 return ret;
1130}1209}
@@ -1188,11 +1267,11 @@ static inline pmd_t __pmd(pmdval_t val) · 57 unmodified lines
1188 pmdval_t ret;1267 pmdval_t ret;
1189 1268
1190 if (sizeof(pmdval_t) > sizeof(long))1269 if (sizeof(pmdval_t) > sizeof(long))
1191 ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.make_pmd,1270 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.make_pmd,
1192 val, (u64)val >> 32);1271 val, (u64)val >> 32);
1193 else1272 else
1194 ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.make_pmd,1273 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.make_pmd,
1195 val);1274 val);
1196 1275
1197 return (pmd_t) { ret };1276 return (pmd_t) { ret };
1198}1277}
@@ -1202,11 +1281,11 @@ static inline pmdval_t pmd_val(pmd_t pmd) · 3 unmodified lines
1202 pmdval_t ret;1281 pmdval_t ret;
1203 1282
1204 if (sizeof(pmdval_t) > sizeof(long))1283 if (sizeof(pmdval_t) > sizeof(long))
1205 ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.pmd_val,1284 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.pmd_val,
1206 pmd.pmd, (u64)pmd.pmd >> 32);1285 pmd.pmd, (u64)pmd.pmd >> 32);
1207 else1286 else
1208 ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.pmd_val,1287 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.pmd_val,
1209 pmd.pmd);1288 pmd.pmd);
1210 1289
1211 return ret;1290 return ret;
1212}1291}
@@ -1228,11 +1307,11 @@ static inline pud_t __pud(pudval_t val) · 15 unmodified lines
1228 pudval_t ret;1307 pudval_t ret;
1229 1308
1230 if (sizeof(pudval_t) > sizeof(long))1309 if (sizeof(pudval_t) > sizeof(long))
1231 ret = PVOP_CALL2(pudval_t, pv_mmu_ops.make_pud,1310 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.make_pud,
1232 val, (u64)val >> 32);1311 val, (u64)val >> 32);
1233 else1312 else
1234 ret = PVOP_CALL1(pudval_t, pv_mmu_ops.make_pud,1313 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.make_pud,
1235 val);1314 val);
1236 1315
1237 return (pud_t) { ret };1316 return (pud_t) { ret };
1238}1317}
@@ -1242,11 +1321,11 @@ static inline pudval_t pud_val(pud_t pud) · 3 unmodified lines
1242 pudval_t ret;1321 pudval_t ret;
1243 1322
1244 if (sizeof(pudval_t) > sizeof(long))1323 if (sizeof(pudval_t) > sizeof(long))
1245 ret = PVOP_CALL2(pudval_t, pv_mmu_ops.pud_val,1324 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.pud_val,
1246 pud.pud, (u64)pud.pud >> 32);1325 pud.pud, (u64)pud.pud >> 32);
1247 else1326 else
1248 ret = PVOP_CALL1(pudval_t, pv_mmu_ops.pud_val,1327 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.pud_val,
1249 pud.pud);1328 pud.pud);
1250 1329
1251 return ret;1330 return ret;
1252}1331}
@@ -1374,9 +1453,10 @@ static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx, · 121 unmodified lines
1374}1453}
1375 1454
1376void _paravirt_nop(void);1455void _paravirt_nop(void);
1377#define paravirt_nop ((void *)_paravirt_nop)1456u32 _paravirt_ident_32(u32);
1457u64 _paravirt_ident_64(u64);
1378 1458
1379void paravirt_use_bytelocks(void);1459#define paravirt_nop ((void *)_paravirt_nop)
1380 1460
1381#ifdef CONFIG_SMP1461#ifdef CONFIG_SMP
1382 1462
@@ -1426,12 +1506,37 @@ extern struct paravirt_patch_site __parainstructions[], · 43 unmodified lines
1426 __parainstructions_end[];1506 __parainstructions_end[];
1427 1507
1428#ifdef CONFIG_X86_321508#ifdef CONFIG_X86_32
1429#define PV_SAVE_REGS "pushl %%ecx; pushl %%edx;"1509#define PV_SAVE_REGS "pushl %ecx; pushl %edx;"
1430#define PV_RESTORE_REGS "popl %%edx; popl %%ecx"1510#define PV_RESTORE_REGS "popl %edx; popl %ecx;"
1511
1512/* save and restore all caller-save registers, except return value */
1513#define PV_SAVE_ALL_CALLER_REGS "pushl %ecx;"
1514#define PV_RESTORE_ALL_CALLER_REGS "popl %ecx;"
1515
1431#define PV_FLAGS_ARG "0"1516#define PV_FLAGS_ARG "0"
1432#define PV_EXTRA_CLOBBERS1517#define PV_EXTRA_CLOBBERS
1433#define PV_VEXTRA_CLOBBERS1518#define PV_VEXTRA_CLOBBERS
1434#else1519#else
1520/* save and restore all caller-save registers, except return value */
1521#define PV_SAVE_ALL_CALLER_REGS \
1522 "push %rcx;" \
1523 "push %rdx;" \
1524 "push %rsi;" \
1525 "push %rdi;" \
1526 "push %r8;" \
1527 "push %r9;" \
1528 "push %r10;" \
1529 "push %r11;"
1530#define PV_RESTORE_ALL_CALLER_REGS \
1531 "pop %r11;" \
1532 "pop %r10;" \
1533 "pop %r9;" \
1534 "pop %r8;" \
1535 "pop %rdi;" \
1536 "pop %rsi;" \
1537 "pop %rdx;" \
1538 "pop %rcx;"
1539
1435/* We save some registers, but all of them, that's too much. We clobber all1540/* We save some registers, but all of them, that's too much. We clobber all
1436 * caller saved registers but the argument parameter */1541 * caller saved registers but the argument parameter */
1437#define PV_SAVE_REGS "pushq %%rdi;"1542#define PV_SAVE_REGS "pushq %%rdi;"
@@ -1441,52 +1546,76 @@ extern struct paravirt_patch_site __parainstructions[], · 3 unmodified lines
1441#define PV_FLAGS_ARG "D"1546#define PV_FLAGS_ARG "D"
1442#endif1547#endif
1443 1548
1549/*
1550 * Generate a thunk around a function which saves all caller-save
1551 * registers except for the return value. This allows C functions to
1552 * be called from assembler code where fewer than normal registers are
1553 * available. It may also help code generation around calls from C
1554 * code if the common case doesn't use many registers.
1555 *
1556 * When a callee is wrapped in a thunk, the caller can assume that all
1557 * arg regs and all scratch registers are preserved across the
1558 * call. The return value in rax/eax will not be saved, even for void
1559 * functions.
1560 */
1561#define PV_CALLEE_SAVE_REGS_THUNK(func) \
1562 extern typeof(func) __raw_callee_save_##func; \
1563 static void *__##func##__ __used = func; \
1564 \
1565 asm(".pushsection .text;" \
1566 "__raw_callee_save_" #func ": " \
1567 PV_SAVE_ALL_CALLER_REGS \
1568 "call " #func ";" \
1569 PV_RESTORE_ALL_CALLER_REGS \
1570 "ret;" \
1571 ".popsection")
1572
1573/* Get a reference to a callee-save function */
1574#define PV_CALLEE_SAVE(func) \
1575 ((struct paravirt_callee_save) { __raw_callee_save_##func })
1576
1577/* Promise that "func" already uses the right calling convention */
1578#define __PV_IS_CALLEE_SAVE(func) \
1579 ((struct paravirt_callee_save) { func })
1580
1444static inline unsigned long __raw_local_save_flags(void)1581static inline unsigned long __raw_local_save_flags(void)
1445{1582{
1446 unsigned long f;1583 unsigned long f;
1447 1584
1448 asm volatile(paravirt_alt(PV_SAVE_REGS1585 asm volatile(paravirt_alt(PARAVIRT_CALL)
1449 PARAVIRT_CALL
1450 PV_RESTORE_REGS)
1451 : "=a"(f)1586 : "=a"(f)
1452 : paravirt_type(pv_irq_ops.save_fl),1587 : paravirt_type(pv_irq_ops.save_fl),
1453 paravirt_clobber(CLBR_EAX)1588 paravirt_clobber(CLBR_EAX)
1454 : "memory", "cc" PV_VEXTRA_CLOBBERS);1589 : "memory", "cc");
1455 return f;1590 return f;
1456}1591}
1457 1592
1458static inline void raw_local_irq_restore(unsigned long f)1593static inline void raw_local_irq_restore(unsigned long f)
1459{1594{
1460 asm volatile(paravirt_alt(PV_SAVE_REGS1595 asm volatile(paravirt_alt(PARAVIRT_CALL)
1461 PARAVIRT_CALL
1462 PV_RESTORE_REGS)
1463 : "=a"(f)1596 : "=a"(f)
1464 : PV_FLAGS_ARG(f),1597 : PV_FLAGS_ARG(f),
1465 paravirt_type(pv_irq_ops.restore_fl),1598 paravirt_type(pv_irq_ops.restore_fl),
1466 paravirt_clobber(CLBR_EAX)1599 paravirt_clobber(CLBR_EAX)
1467 : "memory", "cc" PV_EXTRA_CLOBBERS);1600 : "memory", "cc");
1468}1601}
1469 1602
1470static inline void raw_local_irq_disable(void)1603static inline void raw_local_irq_disable(void)
1471{1604{
1472 asm volatile(paravirt_alt(PV_SAVE_REGS1605 asm volatile(paravirt_alt(PARAVIRT_CALL)
1473 PARAVIRT_CALL
1474 PV_RESTORE_REGS)
1475 :1606 :
1476 : paravirt_type(pv_irq_ops.irq_disable),1607 : paravirt_type(pv_irq_ops.irq_disable),
1477 paravirt_clobber(CLBR_EAX)1608 paravirt_clobber(CLBR_EAX)
1478 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);1609 : "memory", "eax", "cc");
1479}1610}
1480 1611
1481static inline void raw_local_irq_enable(void)1612static inline void raw_local_irq_enable(void)
1482{1613{
1483 asm volatile(paravirt_alt(PV_SAVE_REGS1614 asm volatile(paravirt_alt(PARAVIRT_CALL)
1484 PARAVIRT_CALL
1485 PV_RESTORE_REGS)
1486 :1615 :
1487 : paravirt_type(pv_irq_ops.irq_enable),1616 : paravirt_type(pv_irq_ops.irq_enable),
1488 paravirt_clobber(CLBR_EAX)1617 paravirt_clobber(CLBR_EAX)
1489 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);1618 : "memory", "eax", "cc");
1490}1619}
1491 1620
1492static inline unsigned long __raw_local_irq_save(void)1621static inline unsigned long __raw_local_irq_save(void)
@@ -1529,33 +1658,49 @@ static inline unsigned long __raw_local_irq_save(void) · 36 unmodified lines
1529 .popsection1658 .popsection
1530 1659
1531 1660
1661#define COND_PUSH(set, mask, reg) \
1662 .if ((~(set)) & mask); push %reg; .endif
1663#define COND_POP(set, mask, reg) \
1664 .if ((~(set)) & mask); pop %reg; .endif
1665
1532#ifdef CONFIG_X86_641666#ifdef CONFIG_X86_64
1533#define PV_SAVE_REGS \1667
1534 push %rax; \1668#define PV_SAVE_REGS(set) \
1535 push %rcx; \1669 COND_PUSH(set, CLBR_RAX, rax); \
1536 push %rdx; \1670 COND_PUSH(set, CLBR_RCX, rcx); \
1537 push %rsi; \1671 COND_PUSH(set, CLBR_RDX, rdx); \
1538 push %rdi; \1672 COND_PUSH(set, CLBR_RSI, rsi); \
1539 push %r8; \1673 COND_PUSH(set, CLBR_RDI, rdi); \
1540 push %r9; \1674 COND_PUSH(set, CLBR_R8, r8); \
1541 push %r10; \1675 COND_PUSH(set, CLBR_R9, r9); \
1542 push %r111676 COND_PUSH(set, CLBR_R10, r10); \
1543#define PV_RESTORE_REGS \1677 COND_PUSH(set, CLBR_R11, r11)
1544 pop %r11; \1678#define PV_RESTORE_REGS(set) \
1545 pop %r10; \1679 COND_POP(set, CLBR_R11, r11); \
1546 pop %r9; \1680 COND_POP(set, CLBR_R10, r10); \
1547 pop %r8; \1681 COND_POP(set, CLBR_R9, r9); \
1548 pop %rdi; \1682 COND_POP(set, CLBR_R8, r8); \
1549 pop %rsi; \1683 COND_POP(set, CLBR_RDI, rdi); \
1550 pop %rdx; \1684 COND_POP(set, CLBR_RSI, rsi); \
1551 pop %rcx; \1685 COND_POP(set, CLBR_RDX, rdx); \
1552 pop %rax1686 COND_POP(set, CLBR_RCX, rcx); \
1687 COND_POP(set, CLBR_RAX, rax)
1688
1553#define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)1689#define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
1554#define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)1690#define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
1555#define PARA_INDIRECT(addr) *addr(%rip)1691#define PARA_INDIRECT(addr) *addr(%rip)
1556#else1692#else
1557#define PV_SAVE_REGS pushl %eax; pushl %edi; pushl %ecx; pushl %edx1693#define PV_SAVE_REGS(set) \
1558#define PV_RESTORE_REGS popl %edx; popl %ecx; popl %edi; popl %eax1694 COND_PUSH(set, CLBR_EAX, eax); \
1695 COND_PUSH(set, CLBR_EDI, edi); \
1696 COND_PUSH(set, CLBR_ECX, ecx); \
1697 COND_PUSH(set, CLBR_EDX, edx)
1698#define PV_RESTORE_REGS(set) \
1699 COND_POP(set, CLBR_EDX, edx); \
1700 COND_POP(set, CLBR_ECX, ecx); \
1701 COND_POP(set, CLBR_EDI, edi); \
1702 COND_POP(set, CLBR_EAX, eax)
1703
1559#define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)1704#define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
1560#define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)1705#define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
1561#define PARA_INDIRECT(addr) *%cs:addr1706#define PARA_INDIRECT(addr) *%cs:addr
@@ -1567,15 +1712,15 @@ static inline unsigned long __raw_local_irq_save(void) · 5 unmodified lines
1567 1712
1568#define DISABLE_INTERRUPTS(clobbers) \1713#define DISABLE_INTERRUPTS(clobbers) \
1569 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \1714 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
1570 PV_SAVE_REGS; \1715 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
1571 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \1716 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \
1572 PV_RESTORE_REGS;) \1717 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
1573 1718
1574#define ENABLE_INTERRUPTS(clobbers) \1719#define ENABLE_INTERRUPTS(clobbers) \
1575 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \1720 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
1576 PV_SAVE_REGS; \1721 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
1577 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \1722 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \
1578 PV_RESTORE_REGS;)1723 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
1579 1724
1580#define USERGS_SYSRET32 \1725#define USERGS_SYSRET32 \
1581 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32), \1726 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32), \
@@ -1605,11 +1750,15 @@ static inline unsigned long __raw_local_irq_save(void) · 23 unmodified lines
1605 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \1750 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1606 swapgs)1751 swapgs)
1607 1752
1753/*
1754 * Note: swapgs is very special, and in practise is either going to be
1755 * implemented with a single "swapgs" instruction or something very
1756 * special. Either way, we don't need to save any registers for
1757 * it.
1758 */
1608#define SWAPGS \1759#define SWAPGS \
1609 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \1760 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1610 PV_SAVE_REGS; \1761 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs) \
1611 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs); \
1612 PV_RESTORE_REGS \
1613 )1762 )
1614 1763
1615#define GET_CR2_INTO_RCX \1764#define GET_CR2_INTO_RCX \
arch/x86/include/asm/pat.h+2−3
@@ -5,10 +5,8 @@ · 4 unmodified lines
5 5
6#ifdef CONFIG_X86_PAT6#ifdef CONFIG_X86_PAT
7extern int pat_enabled;7extern int pat_enabled;
8extern void validate_pat_support(struct cpuinfo_x86 *c);
9#else8#else
10static const int pat_enabled;9static const int pat_enabled;
11static inline void validate_pat_support(struct cpuinfo_x86 *c) { }
12#endif10#endif
13 11
14extern void pat_init(void);12extern void pat_init(void);
@@ -17,6 +15,7 @@ extern int reserve_memtype(u64 start, u64 end, · 2 unmodified lines
17 unsigned long req_type, unsigned long *ret_type);15 unsigned long req_type, unsigned long *ret_type);
18extern int free_memtype(u64 start, u64 end);16extern int free_memtype(u64 start, u64 end);
19 17
20extern void pat_disable(char *reason);18extern int kernel_map_sync_memtype(u64 base, unsigned long size,
19 unsigned long flag);
21 20
22#endif /* _ASM_X86_PAT_H */21#endif /* _ASM_X86_PAT_H */
arch/x86/include/asm/pci-functions.hrenamed from arch/x86/include/asm/mach-default/pci-functions.h+0−0

File renamed without changes.

arch/x86/include/asm/pda.h+0−137
@@ -1,137 +0,0 @@
1#ifndef _ASM_X86_PDA_H
2#define _ASM_X86_PDA_H
3
4#ifndef __ASSEMBLY__
5#include <linux/stddef.h>
6#include <linux/types.h>
7#include <linux/cache.h>
8#include <asm/page.h>
9
10/* Per processor datastructure. %gs points to it while the kernel runs */
11struct x8664_pda {
12 struct task_struct *pcurrent; /* 0 Current process */
13 unsigned long data_offset; /* 8 Per cpu data offset from linker
14 address */
15 unsigned long kernelstack; /* 16 top of kernel stack for current */
16 unsigned long oldrsp; /* 24 user rsp for system call */
17 int irqcount; /* 32 Irq nesting counter. Starts -1 */
18 unsigned int cpunumber; /* 36 Logical CPU number */
19#ifdef CONFIG_CC_STACKPROTECTOR
20 unsigned long stack_canary; /* 40 stack canary value */
21 /* gcc-ABI: this canary MUST be at
22 offset 40!!! */
23#endif
24 char *irqstackptr;
25 short nodenumber; /* number of current node (32k max) */
26 short in_bootmem; /* pda lives in bootmem */
27 unsigned int __softirq_pending;
28 unsigned int __nmi_count; /* number of NMI on this CPUs */
29 short mmu_state;
30 short isidle;
31 struct mm_struct *active_mm;
32 unsigned apic_timer_irqs;
33 unsigned irq0_irqs;
34 unsigned irq_resched_count;
35 unsigned irq_call_count;
36 unsigned irq_tlb_count;
37 unsigned irq_thermal_count;
38 unsigned irq_threshold_count;
39 unsigned irq_spurious_count;
40} ____cacheline_aligned_in_smp;
41
42extern struct x8664_pda **_cpu_pda;
43extern void pda_init(int);
44
45#define cpu_pda(i) (_cpu_pda[i])
46
47/*
48 * There is no fast way to get the base address of the PDA, all the accesses
49 * have to mention %fs/%gs. So it needs to be done this Torvaldian way.
50 */
51extern void __bad_pda_field(void) __attribute__((noreturn));
52
53/*
54 * proxy_pda doesn't actually exist, but tell gcc it is accessed for
55 * all PDA accesses so it gets read/write dependencies right.
56 */
57extern struct x8664_pda _proxy_pda;
58
59#define pda_offset(field) offsetof(struct x8664_pda, field)
60
61#define pda_to_op(op, field, val) \
62do { \
63 typedef typeof(_proxy_pda.field) T__; \
64 if (0) { T__ tmp__; tmp__ = (val); } /* type checking */ \
65 switch (sizeof(_proxy_pda.field)) { \
66 case 2: \
67 asm(op "w %1,%%gs:%c2" : \
68 "+m" (_proxy_pda.field) : \
69 "ri" ((T__)val), \
70 "i"(pda_offset(field))); \
71 break; \
72 case 4: \
73 asm(op "l %1,%%gs:%c2" : \
74 "+m" (_proxy_pda.field) : \
75 "ri" ((T__)val), \
76 "i" (pda_offset(field))); \
77 break; \
78 case 8: \
79 asm(op "q %1,%%gs:%c2": \
80 "+m" (_proxy_pda.field) : \
81 "ri" ((T__)val), \
82 "i"(pda_offset(field))); \
83 break; \
84 default: \
85 __bad_pda_field(); \
86 } \
87} while (0)
88
89#define pda_from_op(op, field) \
90({ \
91 typeof(_proxy_pda.field) ret__; \
92 switch (sizeof(_proxy_pda.field)) { \
93 case 2: \
94 asm(op "w %%gs:%c1,%0" : \
95 "=r" (ret__) : \
96 "i" (pda_offset(field)), \
97 "m" (_proxy_pda.field)); \
98 break; \
99 case 4: \
100 asm(op "l %%gs:%c1,%0": \
101 "=r" (ret__): \
102 "i" (pda_offset(field)), \
103 "m" (_proxy_pda.field)); \
104 break; \
105 case 8: \
106 asm(op "q %%gs:%c1,%0": \
107 "=r" (ret__) : \
108 "i" (pda_offset(field)), \
109 "m" (_proxy_pda.field)); \
110 break; \
111 default: \
112 __bad_pda_field(); \
113 } \
114 ret__; \
115})
116
117#define read_pda(field) pda_from_op("mov", field)
118#define write_pda(field, val) pda_to_op("mov", field, val)
119#define add_pda(field, val) pda_to_op("add", field, val)
120#define sub_pda(field, val) pda_to_op("sub", field, val)
121#define or_pda(field, val) pda_to_op("or", field, val)
122
123/* This is not atomic against other CPUs -- CPU preemption needs to be off */
124#define test_and_clear_bit_pda(bit, field) \
125({ \
126 int old__; \
127 asm volatile("btr %2,%%gs:%c3\n\tsbbl %0,%0" \
128 : "=r" (old__), "+m" (_proxy_pda.field) \
129 : "dIr" (bit), "i" (pda_offset(field)) : "memory");\
130 old__; \
131})
132
133#endif
134
135#define PDA_STACKOFFSET (5*8)
136
137#endif /* _ASM_X86_PDA_H */
arch/x86/include/asm/percpu.h+78−91
@@ -2,53 +2,12 @@ · 1 unmodified line
2#define _ASM_X86_PERCPU_H2#define _ASM_X86_PERCPU_H
3 3
4#ifdef CONFIG_X86_644#ifdef CONFIG_X86_64
5#include <linux/compiler.h>5#define __percpu_seg gs
6 6#define __percpu_mov_op movq
7/* Same as asm-generic/percpu.h, except that we store the per cpu offset7#else
8 in the PDA. Longer term the PDA and every per cpu variable8#define __percpu_seg fs
9 should be just put into a single section and referenced directly9#define __percpu_mov_op movl
10 from %gs */
11
12#ifdef CONFIG_SMP
13#include <asm/pda.h>
14
15#define __per_cpu_offset(cpu) (cpu_pda(cpu)->data_offset)
16#define __my_cpu_offset read_pda(data_offset)
17
18#define per_cpu_offset(x) (__per_cpu_offset(x))
19
20#endif10#endif
21#include <asm-generic/percpu.h>
22
23DECLARE_PER_CPU(struct x8664_pda, pda);
24
25/*
26 * These are supposed to be implemented as a single instruction which
27 * operates on the per-cpu data base segment. x86-64 doesn't have
28 * that yet, so this is a fairly inefficient workaround for the
29 * meantime. The single instruction is atomic with respect to
30 * preemption and interrupts, so we need to explicitly disable
31 * interrupts here to achieve the same effect. However, because it
32 * can be used from within interrupt-disable/enable, we can't actually
33 * disable interrupts; disabling preemption is enough.
34 */
35#define x86_read_percpu(var) \
36 ({ \
37 typeof(per_cpu_var(var)) __tmp; \
38 preempt_disable(); \
39 __tmp = __get_cpu_var(var); \
40 preempt_enable(); \
41 __tmp; \
42 })
43
44#define x86_write_percpu(var, val) \
45 do { \
46 preempt_disable(); \
47 __get_cpu_var(var) = (val); \
48 preempt_enable(); \
49 } while(0)
50
51#else /* CONFIG_X86_64 */
52 11
53#ifdef __ASSEMBLY__12#ifdef __ASSEMBLY__
54 13
@@ -65,47 +24,48 @@ DECLARE_PER_CPU(struct x8664_pda, pda); · 10 unmodified lines
65 * PER_CPU(cpu_gdt_descr, %ebx)24 * PER_CPU(cpu_gdt_descr, %ebx)
66 */25 */
67#ifdef CONFIG_SMP26#ifdef CONFIG_SMP
68#define PER_CPU(var, reg) \27#define PER_CPU(var, reg) \
69 movl %fs:per_cpu__##this_cpu_off, reg; \28 __percpu_mov_op %__percpu_seg:per_cpu__this_cpu_off, reg; \
70 lea per_cpu__##var(reg), reg29 lea per_cpu__##var(reg), reg
71#define PER_CPU_VAR(var) %fs:per_cpu__##var30#define PER_CPU_VAR(var) %__percpu_seg:per_cpu__##var
72#else /* ! SMP */31#else /* ! SMP */
73#define PER_CPU(var, reg) \32#define PER_CPU(var, reg) \
74 movl $per_cpu__##var, reg33 __percpu_mov_op $per_cpu__##var, reg
75#define PER_CPU_VAR(var) per_cpu__##var34#define PER_CPU_VAR(var) per_cpu__##var
76#endif /* SMP */35#endif /* SMP */
77 36
37#ifdef CONFIG_X86_64_SMP
38#define INIT_PER_CPU_VAR(var) init_per_cpu__##var
39#else
40#define INIT_PER_CPU_VAR(var) per_cpu__##var
41#endif
42
78#else /* ...!ASSEMBLY */43#else /* ...!ASSEMBLY */
79 44
45#include <linux/stringify.h>
46
47#ifdef CONFIG_SMP
48#define __percpu_arg(x) "%%"__stringify(__percpu_seg)":%P" #x
49#define __my_cpu_offset percpu_read(this_cpu_off)
50#else
51#define __percpu_arg(x) "%" #x
52#endif
53
80/*54/*
81 * PER_CPU finds an address of a per-cpu variable.55 * Initialized pointers to per-cpu variables needed for the boot
56 * processor need to use these macros to get the proper address
57 * offset from __per_cpu_load on SMP.
82 *58 *
83 * Args:59 * There also must be an entry in vmlinux_64.lds.S
84 * var - variable name
85 * cpu - 32bit register containing the current CPU number
86 *
87 * The resulting address is stored in the "cpu" argument.
88 *
89 * Example:
90 * PER_CPU(cpu_gdt_descr, %ebx)
91 */60 */
92#ifdef CONFIG_SMP61#define DECLARE_INIT_PER_CPU(var) \
93 62 extern typeof(per_cpu_var(var)) init_per_cpu_var(var)
94#define __my_cpu_offset x86_read_percpu(this_cpu_off)
95
96/* fs segment starts at (positive) offset == __per_cpu_offset[cpu] */
97#define __percpu_seg "%%fs:"
98
99#else /* !SMP */
100
101#define __percpu_seg ""
102
103#endif /* SMP */
104
105#include <asm-generic/percpu.h>
106 63
107/* We can use this directly for local CPU (faster). */64#ifdef CONFIG_X86_64_SMP
108DECLARE_PER_CPU(unsigned long, this_cpu_off);65#define init_per_cpu_var(var) init_per_cpu__##var
66#else
67#define init_per_cpu_var(var) per_cpu_var(var)
68#endif
109 69
110/* For arch-specific code, we can use direct single-insn ops (they70/* For arch-specific code, we can use direct single-insn ops (they
111 * don't give an lvalue though). */71 * don't give an lvalue though). */
@@ -120,20 +80,25 @@ do { \ · 8 unmodified lines
120 } \80 } \
121 switch (sizeof(var)) { \81 switch (sizeof(var)) { \
122 case 1: \82 case 1: \
123 asm(op "b %1,"__percpu_seg"%0" \83 asm(op "b %1,"__percpu_arg(0) \
124 : "+m" (var) \84 : "+m" (var) \
125 : "ri" ((T__)val)); \85 : "ri" ((T__)val)); \
126 break; \86 break; \
127 case 2: \87 case 2: \
128 asm(op "w %1,"__percpu_seg"%0" \88 asm(op "w %1,"__percpu_arg(0) \
129 : "+m" (var) \89 : "+m" (var) \
130 : "ri" ((T__)val)); \90 : "ri" ((T__)val)); \
131 break; \91 break; \
132 case 4: \92 case 4: \
133 asm(op "l %1,"__percpu_seg"%0" \93 asm(op "l %1,"__percpu_arg(0) \
134 : "+m" (var) \94 : "+m" (var) \
135 : "ri" ((T__)val)); \95 : "ri" ((T__)val)); \
136 break; \96 break; \
97 case 8: \
98 asm(op "q %1,"__percpu_arg(0) \
99 : "+m" (var) \
100 : "re" ((T__)val)); \
101 break; \
137 default: __bad_percpu_size(); \102 default: __bad_percpu_size(); \
138 } \103 } \
139} while (0)104} while (0)
@@ -143,17 +108,22 @@ do { \ · 3 unmodified lines
143 typeof(var) ret__; \108 typeof(var) ret__; \
144 switch (sizeof(var)) { \109 switch (sizeof(var)) { \
145 case 1: \110 case 1: \
146 asm(op "b "__percpu_seg"%1,%0" \111 asm(op "b "__percpu_arg(1)",%0" \
147 : "=r" (ret__) \112 : "=r" (ret__) \
148 : "m" (var)); \113 : "m" (var)); \
149 break; \114 break; \
150 case 2: \115 case 2: \
151 asm(op "w "__percpu_seg"%1,%0" \116 asm(op "w "__percpu_arg(1)",%0" \
152 : "=r" (ret__) \117 : "=r" (ret__) \
153 : "m" (var)); \118 : "m" (var)); \
154 break; \119 break; \
155 case 4: \120 case 4: \
156 asm(op "l "__percpu_seg"%1,%0" \121 asm(op "l "__percpu_arg(1)",%0" \
122 : "=r" (ret__) \
123 : "m" (var)); \
124 break; \
125 case 8: \
126 asm(op "q "__percpu_arg(1)",%0" \
157 : "=r" (ret__) \127 : "=r" (ret__) \
158 : "m" (var)); \128 : "m" (var)); \
159 break; \129 break; \
@@ -162,13 +132,30 @@ do { \ · 2 unmodified lines
162 ret__; \132 ret__; \
163})133})
164 134
165#define x86_read_percpu(var) percpu_from_op("mov", per_cpu__##var)135#define percpu_read(var) percpu_from_op("mov", per_cpu__##var)
166#define x86_write_percpu(var, val) percpu_to_op("mov", per_cpu__##var, val)136#define percpu_write(var, val) percpu_to_op("mov", per_cpu__##var, val)
167#define x86_add_percpu(var, val) percpu_to_op("add", per_cpu__##var, val)137#define percpu_add(var, val) percpu_to_op("add", per_cpu__##var, val)
168#define x86_sub_percpu(var, val) percpu_to_op("sub", per_cpu__##var, val)138#define percpu_sub(var, val) percpu_to_op("sub", per_cpu__##var, val)
169#define x86_or_percpu(var, val) percpu_to_op("or", per_cpu__##var, val)139#define percpu_and(var, val) percpu_to_op("and", per_cpu__##var, val)
140#define percpu_or(var, val) percpu_to_op("or", per_cpu__##var, val)
141#define percpu_xor(var, val) percpu_to_op("xor", per_cpu__##var, val)
142
143/* This is not atomic against other CPUs -- CPU preemption needs to be off */
144#define x86_test_and_clear_bit_percpu(bit, var) \
145({ \
146 int old__; \
147 asm volatile("btr %2,"__percpu_arg(1)"\n\tsbbl %0,%0" \
148 : "=r" (old__), "+m" (per_cpu__##var) \
149 : "dIr" (bit)); \
150 old__; \
151})
152
153#include <asm-generic/percpu.h>
154
155/* We can use this directly for local CPU (faster). */
156DECLARE_PER_CPU(unsigned long, this_cpu_off);
157
170#endif /* !__ASSEMBLY__ */158#endif /* !__ASSEMBLY__ */
171#endif /* !CONFIG_X86_64 */
172 159
173#ifdef CONFIG_SMP160#ifdef CONFIG_SMP
174 161
@@ -195,9 +182,9 @@ do { \ · 20 unmodified lines
195#define early_per_cpu_ptr(_name) (_name##_early_ptr)182#define early_per_cpu_ptr(_name) (_name##_early_ptr)
196#define early_per_cpu_map(_name, _idx) (_name##_early_map[_idx])183#define early_per_cpu_map(_name, _idx) (_name##_early_map[_idx])
197#define early_per_cpu(_name, _cpu) \184#define early_per_cpu(_name, _cpu) \
198 (early_per_cpu_ptr(_name) ? \185 *(early_per_cpu_ptr(_name) ? \
199 early_per_cpu_ptr(_name)[_cpu] : \186 &early_per_cpu_ptr(_name)[_cpu] : \
200 per_cpu(_name, _cpu))187 &per_cpu(_name, _cpu))
201 188
202#else /* !CONFIG_SMP */189#else /* !CONFIG_SMP */
203#define DEFINE_EARLY_PER_CPU(_type, _name, _initvalue) \190#define DEFINE_EARLY_PER_CPU(_type, _name, _initvalue) \
arch/x86/include/asm/pgtable-2level.h+0−2
@@ -53,8 +53,6 @@ static inline pte_t native_ptep_get_and_clear(pte_t *xp) · 52 unmodified lines
53#define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp)53#define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp)
54#endif54#endif
55 55
56#define pte_none(x) (!(x).pte_low)
57
58/*56/*
59 * Bits _PAGE_BIT_PRESENT, _PAGE_BIT_FILE and _PAGE_BIT_PROTNONE are taken,57 * Bits _PAGE_BIT_PRESENT, _PAGE_BIT_FILE and _PAGE_BIT_PROTNONE are taken,
60 * split up the 29 bits of offset into this range:58 * split up the 29 bits of offset into this range:
arch/x86/include/asm/pgtable-2level_types.hrenamed from arch/x86/include/asm/pgtable-2level-defs.h+17−0
@@ -1,7 +1,23 @@
1#ifndef _ASM_X86_PGTABLE_2LEVEL_DEFS_H1#ifndef _ASM_X86_PGTABLE_2LEVEL_DEFS_H
2#define _ASM_X86_PGTABLE_2LEVEL_DEFS_H2#define _ASM_X86_PGTABLE_2LEVEL_DEFS_H
3 3
4#ifndef __ASSEMBLY__
5#include <linux/types.h>
6
7typedef unsigned long pteval_t;
8typedef unsigned long pmdval_t;
9typedef unsigned long pudval_t;
10typedef unsigned long pgdval_t;
11typedef unsigned long pgprotval_t;
12
13typedef union {
14 pteval_t pte;
15 pteval_t pte_low;
16} pte_t;
17#endif /* !__ASSEMBLY__ */
18
4#define SHARED_KERNEL_PMD 019#define SHARED_KERNEL_PMD 0
20#define PAGETABLE_LEVELS 2
5 21
6/*22/*
7 * traditional i386 two-level paging structure:23 * traditional i386 two-level paging structure:
@@ -10,6 +26,7 @@ · 2 unmodified lines
10#define PGDIR_SHIFT 2226#define PGDIR_SHIFT 22
11#define PTRS_PER_PGD 102427#define PTRS_PER_PGD 1024
12 28
29
13/*30/*
14 * the i386 is two-level, so we don't really have any31 * the i386 is two-level, so we don't really have any
15 * PMD directory physically.32 * PMD directory physically.
arch/x86/include/asm/pgtable-3level.h+0−35
@@ -18,21 +18,6 @@ · 17 unmodified lines
18 printk("%s:%d: bad pgd %p(%016Lx).\n", \18 printk("%s:%d: bad pgd %p(%016Lx).\n", \
19 __FILE__, __LINE__, &(e), pgd_val(e))19 __FILE__, __LINE__, &(e), pgd_val(e))
20 20
21static inline int pud_none(pud_t pud)
22{
23 return pud_val(pud) == 0;
24}
25
26static inline int pud_bad(pud_t pud)
27{
28 return (pud_val(pud) & ~(PTE_PFN_MASK | _KERNPG_TABLE | _PAGE_USER)) != 0;
29}
30
31static inline int pud_present(pud_t pud)
32{
33 return pud_val(pud) & _PAGE_PRESENT;
34}
35
36/* Rules for using set_pte: the pte being assigned *must* be21/* Rules for using set_pte: the pte being assigned *must* be
37 * either not present or in a state where the hardware will22 * either not present or in a state where the hardware will
38 * not attempt to update the pte. In places where this is23 * not attempt to update the pte. In places where this is
@@ -120,15 +105,6 @@ static inline void pud_clear(pud_t *pudp) · 81 unmodified lines
120 write_cr3(pgd);105 write_cr3(pgd);
121}106}
122 107
123#define pud_page(pud) pfn_to_page(pud_val(pud) >> PAGE_SHIFT)
124
125#define pud_page_vaddr(pud) ((unsigned long) __va(pud_val(pud) & PTE_PFN_MASK))
126
127
128/* Find an entry in the second-level page table.. */
129#define pmd_offset(pud, address) ((pmd_t *)pud_page_vaddr(*(pud)) + \
130 pmd_index(address))
131
132#ifdef CONFIG_SMP108#ifdef CONFIG_SMP
133static inline pte_t native_ptep_get_and_clear(pte_t *ptep)109static inline pte_t native_ptep_get_and_clear(pte_t *ptep)
134{110{
@@ -145,17 +121,6 @@ static inline pte_t native_ptep_get_and_clear(pte_t *ptep) · 10 unmodified lines
145#define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp)121#define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp)
146#endif122#endif
147 123
148#define __HAVE_ARCH_PTE_SAME
149static inline int pte_same(pte_t a, pte_t b)
150{
151 return a.pte_low == b.pte_low && a.pte_high == b.pte_high;
152}
153
154static inline int pte_none(pte_t pte)
155{
156 return !pte.pte_low && !pte.pte_high;
157}
158
159/*124/*
160 * Bits 0, 6 and 7 are taken in the low part of the pte,125 * Bits 0, 6 and 7 are taken in the low part of the pte,
161 * put the 32 bits of offset into the high part.126 * put the 32 bits of offset into the high part.
arch/x86/include/asm/pgtable-3level_types.hrenamed from arch/x86/include/asm/pgtable-3level-defs.h+20−0
@@ -1,12 +1,31 @@
1#ifndef _ASM_X86_PGTABLE_3LEVEL_DEFS_H1#ifndef _ASM_X86_PGTABLE_3LEVEL_DEFS_H
2#define _ASM_X86_PGTABLE_3LEVEL_DEFS_H2#define _ASM_X86_PGTABLE_3LEVEL_DEFS_H
3 3
4#ifndef __ASSEMBLY__
5#include <linux/types.h>
6
7typedef u64 pteval_t;
8typedef u64 pmdval_t;
9typedef u64 pudval_t;
10typedef u64 pgdval_t;
11typedef u64 pgprotval_t;
12
13typedef union {
14 struct {
15 unsigned long pte_low, pte_high;
16 };
17 pteval_t pte;
18} pte_t;
19#endif /* !__ASSEMBLY__ */
20
4#ifdef CONFIG_PARAVIRT21#ifdef CONFIG_PARAVIRT
5#define SHARED_KERNEL_PMD (pv_info.shared_kernel_pmd)22#define SHARED_KERNEL_PMD (pv_info.shared_kernel_pmd)
6#else23#else
7#define SHARED_KERNEL_PMD 124#define SHARED_KERNEL_PMD 1
8#endif25#endif
9 26
27#define PAGETABLE_LEVELS 3
28
10/*29/*
11 * PGDIR_SHIFT determines what a top-level page table entry can map30 * PGDIR_SHIFT determines what a top-level page table entry can map
12 */31 */
@@ -25,4 +44,5 @@ · 12 unmodified lines
25 */44 */
26#define PTRS_PER_PTE 51245#define PTRS_PER_PTE 512
27 46
47
28#endif /* _ASM_X86_PGTABLE_3LEVEL_DEFS_H */48#endif /* _ASM_X86_PGTABLE_3LEVEL_DEFS_H */
arch/x86/include/asm/pgtable.h+258−251
@@ -1,164 +1,9 @@
1#ifndef _ASM_X86_PGTABLE_H1#ifndef _ASM_X86_PGTABLE_H
2#define _ASM_X86_PGTABLE_H2#define _ASM_X86_PGTABLE_H
3 3
4#define FIRST_USER_ADDRESS 04#include <asm/page.h>
5
6#define _PAGE_BIT_PRESENT 0 /* is present */
7#define _PAGE_BIT_RW 1 /* writeable */
8#define _PAGE_BIT_USER 2 /* userspace addressable */
9#define _PAGE_BIT_PWT 3 /* page write through */
10#define _PAGE_BIT_PCD 4 /* page cache disabled */
11#define _PAGE_BIT_ACCESSED 5 /* was accessed (raised by CPU) */
12#define _PAGE_BIT_DIRTY 6 /* was written to (raised by CPU) */
13#define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */
14#define _PAGE_BIT_PAT 7 /* on 4KB pages */
15#define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */
16#define _PAGE_BIT_UNUSED1 9 /* available for programmer */
17#define _PAGE_BIT_IOMAP 10 /* flag used to indicate IO mapping */
18#define _PAGE_BIT_UNUSED3 11
19#define _PAGE_BIT_PAT_LARGE 12 /* On 2MB or 1GB pages */
20#define _PAGE_BIT_SPECIAL _PAGE_BIT_UNUSED1
21#define _PAGE_BIT_CPA_TEST _PAGE_BIT_UNUSED1
22#define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */
23
24/* If _PAGE_BIT_PRESENT is clear, we use these: */
25/* - if the user mapped it with PROT_NONE; pte_present gives true */
26#define _PAGE_BIT_PROTNONE _PAGE_BIT_GLOBAL
27/* - set: nonlinear file mapping, saved PTE; unset:swap */
28#define _PAGE_BIT_FILE _PAGE_BIT_DIRTY
29
30#define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT)
31#define _PAGE_RW (_AT(pteval_t, 1) << _PAGE_BIT_RW)
32#define _PAGE_USER (_AT(pteval_t, 1) << _PAGE_BIT_USER)
33#define _PAGE_PWT (_AT(pteval_t, 1) << _PAGE_BIT_PWT)
34#define _PAGE_PCD (_AT(pteval_t, 1) << _PAGE_BIT_PCD)
35#define _PAGE_ACCESSED (_AT(pteval_t, 1) << _PAGE_BIT_ACCESSED)
36#define _PAGE_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_DIRTY)
37#define _PAGE_PSE (_AT(pteval_t, 1) << _PAGE_BIT_PSE)
38#define _PAGE_GLOBAL (_AT(pteval_t, 1) << _PAGE_BIT_GLOBAL)
39#define _PAGE_UNUSED1 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED1)
40#define _PAGE_IOMAP (_AT(pteval_t, 1) << _PAGE_BIT_IOMAP)
41#define _PAGE_UNUSED3 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED3)
42#define _PAGE_PAT (_AT(pteval_t, 1) << _PAGE_BIT_PAT)
43#define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE)
44#define _PAGE_SPECIAL (_AT(pteval_t, 1) << _PAGE_BIT_SPECIAL)
45#define _PAGE_CPA_TEST (_AT(pteval_t, 1) << _PAGE_BIT_CPA_TEST)
46#define __HAVE_ARCH_PTE_SPECIAL
47
48#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
49#define _PAGE_NX (_AT(pteval_t, 1) << _PAGE_BIT_NX)
50#else
51#define _PAGE_NX (_AT(pteval_t, 0))
52#endif
53 5
54#define _PAGE_FILE (_AT(pteval_t, 1) << _PAGE_BIT_FILE)6#include <asm/pgtable_types.h>
55#define _PAGE_PROTNONE (_AT(pteval_t, 1) << _PAGE_BIT_PROTNONE)
56
57#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
58 _PAGE_ACCESSED | _PAGE_DIRTY)
59#define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | \
60 _PAGE_DIRTY)
61
62/* Set of bits not changed in pte_modify */
63#define _PAGE_CHG_MASK (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT | \
64 _PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY)
65
66#define _PAGE_CACHE_MASK (_PAGE_PCD | _PAGE_PWT)
67#define _PAGE_CACHE_WB (0)
68#define _PAGE_CACHE_WC (_PAGE_PWT)
69#define _PAGE_CACHE_UC_MINUS (_PAGE_PCD)
70#define _PAGE_CACHE_UC (_PAGE_PCD | _PAGE_PWT)
71
72#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
73#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
74 _PAGE_ACCESSED | _PAGE_NX)
75
76#define PAGE_SHARED_EXEC __pgprot(_PAGE_PRESENT | _PAGE_RW | \
77 _PAGE_USER | _PAGE_ACCESSED)
78#define PAGE_COPY_NOEXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
79 _PAGE_ACCESSED | _PAGE_NX)
80#define PAGE_COPY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
81 _PAGE_ACCESSED)
82#define PAGE_COPY PAGE_COPY_NOEXEC
83#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | \
84 _PAGE_ACCESSED | _PAGE_NX)
85#define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
86 _PAGE_ACCESSED)
87
88#define __PAGE_KERNEL_EXEC \
89 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL)
90#define __PAGE_KERNEL (__PAGE_KERNEL_EXEC | _PAGE_NX)
91
92#define __PAGE_KERNEL_RO (__PAGE_KERNEL & ~_PAGE_RW)
93#define __PAGE_KERNEL_RX (__PAGE_KERNEL_EXEC & ~_PAGE_RW)
94#define __PAGE_KERNEL_EXEC_NOCACHE (__PAGE_KERNEL_EXEC | _PAGE_PCD | _PAGE_PWT)
95#define __PAGE_KERNEL_WC (__PAGE_KERNEL | _PAGE_CACHE_WC)
96#define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL | _PAGE_PCD | _PAGE_PWT)
97#define __PAGE_KERNEL_UC_MINUS (__PAGE_KERNEL | _PAGE_PCD)
98#define __PAGE_KERNEL_VSYSCALL (__PAGE_KERNEL_RX | _PAGE_USER)
99#define __PAGE_KERNEL_VSYSCALL_NOCACHE (__PAGE_KERNEL_VSYSCALL | _PAGE_PCD | _PAGE_PWT)
100#define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE)
101#define __PAGE_KERNEL_LARGE_NOCACHE (__PAGE_KERNEL | _PAGE_CACHE_UC | _PAGE_PSE)
102#define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE)
103
104#define __PAGE_KERNEL_IO (__PAGE_KERNEL | _PAGE_IOMAP)
105#define __PAGE_KERNEL_IO_NOCACHE (__PAGE_KERNEL_NOCACHE | _PAGE_IOMAP)
106#define __PAGE_KERNEL_IO_UC_MINUS (__PAGE_KERNEL_UC_MINUS | _PAGE_IOMAP)
107#define __PAGE_KERNEL_IO_WC (__PAGE_KERNEL_WC | _PAGE_IOMAP)
108
109#define PAGE_KERNEL __pgprot(__PAGE_KERNEL)
110#define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO)
111#define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC)
112#define PAGE_KERNEL_RX __pgprot(__PAGE_KERNEL_RX)
113#define PAGE_KERNEL_WC __pgprot(__PAGE_KERNEL_WC)
114#define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE)
115#define PAGE_KERNEL_UC_MINUS __pgprot(__PAGE_KERNEL_UC_MINUS)
116#define PAGE_KERNEL_EXEC_NOCACHE __pgprot(__PAGE_KERNEL_EXEC_NOCACHE)
117#define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE)
118#define PAGE_KERNEL_LARGE_NOCACHE __pgprot(__PAGE_KERNEL_LARGE_NOCACHE)
119#define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC)
120#define PAGE_KERNEL_VSYSCALL __pgprot(__PAGE_KERNEL_VSYSCALL)
121#define PAGE_KERNEL_VSYSCALL_NOCACHE __pgprot(__PAGE_KERNEL_VSYSCALL_NOCACHE)
122
123#define PAGE_KERNEL_IO __pgprot(__PAGE_KERNEL_IO)
124#define PAGE_KERNEL_IO_NOCACHE __pgprot(__PAGE_KERNEL_IO_NOCACHE)
125#define PAGE_KERNEL_IO_UC_MINUS __pgprot(__PAGE_KERNEL_IO_UC_MINUS)
126#define PAGE_KERNEL_IO_WC __pgprot(__PAGE_KERNEL_IO_WC)
127
128/* xwr */
129#define __P000 PAGE_NONE
130#define __P001 PAGE_READONLY
131#define __P010 PAGE_COPY
132#define __P011 PAGE_COPY
133#define __P100 PAGE_READONLY_EXEC
134#define __P101 PAGE_READONLY_EXEC
135#define __P110 PAGE_COPY_EXEC
136#define __P111 PAGE_COPY_EXEC
137
138#define __S000 PAGE_NONE
139#define __S001 PAGE_READONLY
140#define __S010 PAGE_SHARED
141#define __S011 PAGE_SHARED
142#define __S100 PAGE_READONLY_EXEC
143#define __S101 PAGE_READONLY_EXEC
144#define __S110 PAGE_SHARED_EXEC
145#define __S111 PAGE_SHARED_EXEC
146
147/*
148 * early identity mapping pte attrib macros.
149 */
150#ifdef CONFIG_X86_64
151#define __PAGE_KERNEL_IDENT_LARGE_EXEC __PAGE_KERNEL_LARGE_EXEC
152#else
153/*
154 * For PDE_IDENT_ATTR include USER bit. As the PDE and PTE protection
155 * bits are combined, this will alow user to access the high address mapped
156 * VDSO in the presence of CONFIG_COMPAT_VDSO
157 */
158#define PTE_IDENT_ATTR 0x003 /* PRESENT+RW */
159#define PDE_IDENT_ATTR 0x067 /* PRESENT+RW+USER+DIRTY+ACCESSED */
160#define PGD_IDENT_ATTR 0x001 /* PRESENT (no other attributes) */
161#endif
162 7
163/*8/*
164 * Macro to mark a page protection value as UC-9 * Macro to mark a page protection value as UC-
@@ -170,9 +15,6 @@ · 5 unmodified lines
170 15
171#ifndef __ASSEMBLY__16#ifndef __ASSEMBLY__
172 17
173#define pgprot_writecombine pgprot_writecombine
174extern pgprot_t pgprot_writecombine(pgprot_t prot);
175
176/*18/*
177 * ZERO_PAGE is a global shared page that is always zero: used19 * ZERO_PAGE is a global shared page that is always zero: used
178 * for zero-mapped memory areas etc..20 * for zero-mapped memory areas etc..
@@ -183,6 +25,66 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; · 4 unmodified lines
183extern spinlock_t pgd_lock;25extern spinlock_t pgd_lock;
184extern struct list_head pgd_list;26extern struct list_head pgd_list;
185 27
28#ifdef CONFIG_PARAVIRT
29#include <asm/paravirt.h>
30#else /* !CONFIG_PARAVIRT */
31#define set_pte(ptep, pte) native_set_pte(ptep, pte)
32#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
33
34#define set_pte_present(mm, addr, ptep, pte) \
35 native_set_pte_present(mm, addr, ptep, pte)
36#define set_pte_atomic(ptep, pte) \
37 native_set_pte_atomic(ptep, pte)
38
39#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
40
41#ifndef __PAGETABLE_PUD_FOLDED
42#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)
43#define pgd_clear(pgd) native_pgd_clear(pgd)
44#endif
45
46#ifndef set_pud
47# define set_pud(pudp, pud) native_set_pud(pudp, pud)
48#endif
49
50#ifndef __PAGETABLE_PMD_FOLDED
51#define pud_clear(pud) native_pud_clear(pud)
52#endif
53
54#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
55#define pmd_clear(pmd) native_pmd_clear(pmd)
56
57#define pte_update(mm, addr, ptep) do { } while (0)
58#define pte_update_defer(mm, addr, ptep) do { } while (0)
59
60static inline void __init paravirt_pagetable_setup_start(pgd_t *base)
61{
62 native_pagetable_setup_start(base);
63}
64
65static inline void __init paravirt_pagetable_setup_done(pgd_t *base)
66{
67 native_pagetable_setup_done(base);
68}
69
70#define pgd_val(x) native_pgd_val(x)
71#define __pgd(x) native_make_pgd(x)
72
73#ifndef __PAGETABLE_PUD_FOLDED
74#define pud_val(x) native_pud_val(x)
75#define __pud(x) native_make_pud(x)
76#endif
77
78#ifndef __PAGETABLE_PMD_FOLDED
79#define pmd_val(x) native_pmd_val(x)
80#define __pmd(x) native_make_pmd(x)
81#endif
82
83#define pte_val(x) native_pte_val(x)
84#define __pte(x) native_make_pte(x)
85
86#endif /* CONFIG_PARAVIRT */
87
186/*88/*
187 * The following only work if pte_present() is true.89 * The following only work if pte_present() is true.
188 * Undefined behaviour if not..90 * Undefined behaviour if not..
@@ -236,72 +138,84 @@ static inline unsigned long pte_pfn(pte_t pte) · 47 unmodified lines
236 138
237static inline int pmd_large(pmd_t pte)139static inline int pmd_large(pmd_t pte)
238{140{
239 return (pmd_val(pte) & (_PAGE_PSE | _PAGE_PRESENT)) ==141 return (pmd_flags(pte) & (_PAGE_PSE | _PAGE_PRESENT)) ==
240 (_PAGE_PSE | _PAGE_PRESENT);142 (_PAGE_PSE | _PAGE_PRESENT);
241}143}
242 144
145static inline pte_t pte_set_flags(pte_t pte, pteval_t set)
146{
147 pteval_t v = native_pte_val(pte);
148
149 return native_make_pte(v | set);
150}
151
152static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear)
153{
154 pteval_t v = native_pte_val(pte);
155
156 return native_make_pte(v & ~clear);
157}
158
243static inline pte_t pte_mkclean(pte_t pte)159static inline pte_t pte_mkclean(pte_t pte)
244{160{
245 return __pte(pte_val(pte) & ~_PAGE_DIRTY);161 return pte_clear_flags(pte, _PAGE_DIRTY);
246}162}
247 163
248static inline pte_t pte_mkold(pte_t pte)164static inline pte_t pte_mkold(pte_t pte)
249{165{
250 return __pte(pte_val(pte) & ~_PAGE_ACCESSED);166 return pte_clear_flags(pte, _PAGE_ACCESSED);
251}167}
252 168
253static inline pte_t pte_wrprotect(pte_t pte)169static inline pte_t pte_wrprotect(pte_t pte)
254{170{
255 return __pte(pte_val(pte) & ~_PAGE_RW);171 return pte_clear_flags(pte, _PAGE_RW);
256}172}
257 173
258static inline pte_t pte_mkexec(pte_t pte)174static inline pte_t pte_mkexec(pte_t pte)
259{175{
260 return __pte(pte_val(pte) & ~_PAGE_NX);176 return pte_clear_flags(pte, _PAGE_NX);
261}177}
262 178
263static inline pte_t pte_mkdirty(pte_t pte)179static inline pte_t pte_mkdirty(pte_t pte)
264{180{
265 return __pte(pte_val(pte) | _PAGE_DIRTY);181 return pte_set_flags(pte, _PAGE_DIRTY);
266}182}
267 183
268static inline pte_t pte_mkyoung(pte_t pte)184static inline pte_t pte_mkyoung(pte_t pte)
269{185{
270 return __pte(pte_val(pte) | _PAGE_ACCESSED);186 return pte_set_flags(pte, _PAGE_ACCESSED);
271}187}
272 188
273static inline pte_t pte_mkwrite(pte_t pte)189static inline pte_t pte_mkwrite(pte_t pte)
274{190{
275 return __pte(pte_val(pte) | _PAGE_RW);191 return pte_set_flags(pte, _PAGE_RW);
276}192}
277 193
278static inline pte_t pte_mkhuge(pte_t pte)194static inline pte_t pte_mkhuge(pte_t pte)
279{195{
280 return __pte(pte_val(pte) | _PAGE_PSE);196 return pte_set_flags(pte, _PAGE_PSE);
281}197}
282 198
283static inline pte_t pte_clrhuge(pte_t pte)199static inline pte_t pte_clrhuge(pte_t pte)
284{200{
285 return __pte(pte_val(pte) & ~_PAGE_PSE);201 return pte_clear_flags(pte, _PAGE_PSE);
286}202}
287 203
288static inline pte_t pte_mkglobal(pte_t pte)204static inline pte_t pte_mkglobal(pte_t pte)
289{205{
290 return __pte(pte_val(pte) | _PAGE_GLOBAL);206 return pte_set_flags(pte, _PAGE_GLOBAL);
291}207}
292 208
293static inline pte_t pte_clrglobal(pte_t pte)209static inline pte_t pte_clrglobal(pte_t pte)
294{210{
295 return __pte(pte_val(pte) & ~_PAGE_GLOBAL);211 return pte_clear_flags(pte, _PAGE_GLOBAL);
296}212}
297 213
298static inline pte_t pte_mkspecial(pte_t pte)214static inline pte_t pte_mkspecial(pte_t pte)
299{215{
300 return __pte(pte_val(pte) | _PAGE_SPECIAL);216 return pte_set_flags(pte, _PAGE_SPECIAL);
301}217}
302 218
303extern pteval_t __supported_pte_mask;
304
305/*219/*
306 * Mask out unsupported bits in a present pgprot. Non-present pgprots220 * Mask out unsupported bits in a present pgprot. Non-present pgprots
307 * can use those bits for other purposes, so leave them be.221 * can use those bits for other purposes, so leave them be.
@@ -374,82 +288,197 @@ static inline int is_new_memtype_allowed(unsigned long flags, · 66 unmodified lines
374 return 1;288 return 1;
375}289}
376 290
377#ifndef __ASSEMBLY__291pmd_t *populate_extra_pmd(unsigned long vaddr);
378/* Indicate that x86 has its own track and untrack pfn vma functions */292pte_t *populate_extra_pte(unsigned long vaddr);
379#define __HAVE_PFNMAP_TRACKING293#endif /* __ASSEMBLY__ */
380
381#define __HAVE_PHYS_MEM_ACCESS_PROT
382struct file;
383pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
384 unsigned long size, pgprot_t vma_prot);
385int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
386 unsigned long size, pgprot_t *vma_prot);
387#endif
388
389/* Install a pte for a particular vaddr in kernel space. */
390void set_pte_vaddr(unsigned long vaddr, pte_t pte);
391 294
392#ifdef CONFIG_X86_32295#ifdef CONFIG_X86_32
393extern void native_pagetable_setup_start(pgd_t *base);296# include "pgtable_32.h"
394extern void native_pagetable_setup_done(pgd_t *base);
395#else297#else
396static inline void native_pagetable_setup_start(pgd_t *base) {}298# include "pgtable_64.h"
397static inline void native_pagetable_setup_done(pgd_t *base) {}
398#endif299#endif
399 300
400struct seq_file;301#ifndef __ASSEMBLY__
401extern void arch_report_meminfo(struct seq_file *m);302#include <linux/mm_types.h>
402 303
403#ifdef CONFIG_PARAVIRT304static inline int pte_none(pte_t pte)
404#include <asm/paravirt.h>305{
405#else /* !CONFIG_PARAVIRT */306 return !pte.pte;
406#define set_pte(ptep, pte) native_set_pte(ptep, pte)307}
407#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
408 308
409#define set_pte_present(mm, addr, ptep, pte) \309#define __HAVE_ARCH_PTE_SAME
410 native_set_pte_present(mm, addr, ptep, pte)310static inline int pte_same(pte_t a, pte_t b)
411#define set_pte_atomic(ptep, pte) \311{
412 native_set_pte_atomic(ptep, pte)312 return a.pte == b.pte;
313}
413 314
414#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)315static inline int pte_present(pte_t a)
316{
317 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE);
318}
415 319
416#ifndef __PAGETABLE_PUD_FOLDED320static inline int pmd_present(pmd_t pmd)
417#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)321{
418#define pgd_clear(pgd) native_pgd_clear(pgd)322 return pmd_flags(pmd) & _PAGE_PRESENT;
419#endif323}
420 324
421#ifndef set_pud325static inline int pmd_none(pmd_t pmd)
422# define set_pud(pudp, pud) native_set_pud(pudp, pud)326{
423#endif327 /* Only check low word on 32-bit platforms, since it might be
328 out of sync with upper half. */
329 return (unsigned long)native_pmd_val(pmd) == 0;
330}
424 331
425#ifndef __PAGETABLE_PMD_FOLDED332static inline unsigned long pmd_page_vaddr(pmd_t pmd)
426#define pud_clear(pud) native_pud_clear(pud)333{
427#endif334 return (unsigned long)__va(pmd_val(pmd) & PTE_PFN_MASK);
335}
428 336
429#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)337/*
430#define pmd_clear(pmd) native_pmd_clear(pmd)338 * Currently stuck as a macro due to indirect forward reference to
339 * linux/mmzone.h's __section_mem_map_addr() definition:
340 */
341#define pmd_page(pmd) pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)
431 342
432#define pte_update(mm, addr, ptep) do { } while (0)343/*
433#define pte_update_defer(mm, addr, ptep) do { } while (0)344 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
345 *
346 * this macro returns the index of the entry in the pmd page which would
347 * control the given virtual address
348 */
349static inline unsigned pmd_index(unsigned long address)
350{
351 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
352}
434 353
435static inline void __init paravirt_pagetable_setup_start(pgd_t *base)354/*
355 * Conversion functions: convert a page and protection to a page entry,
356 * and a page entry and page directory to the page they refer to.
357 *
358 * (Currently stuck as a macro because of indirect forward reference
359 * to linux/mm.h:page_to_nid())
360 */
361#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
362
363/*
364 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
365 *
366 * this function returns the index of the entry in the pte page which would
367 * control the given virtual address
368 */
369static inline unsigned pte_index(unsigned long address)
436{370{
437 native_pagetable_setup_start(base);371 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
438}372}
439 373
440static inline void __init paravirt_pagetable_setup_done(pgd_t *base)374static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
441{375{
442 native_pagetable_setup_done(base);376 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
443}377}
444#endif /* CONFIG_PARAVIRT */
445 378
446#endif /* __ASSEMBLY__ */379static inline int pmd_bad(pmd_t pmd)
380{
381 return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE;
382}
447 383
448#ifdef CONFIG_X86_32384static inline unsigned long pages_to_mb(unsigned long npg)
449# include "pgtable_32.h"385{
386 return npg >> (20 - PAGE_SHIFT);
387}
388
389#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
390 remap_pfn_range(vma, vaddr, pfn, size, prot)
391
392#if PAGETABLE_LEVELS > 2
393static inline int pud_none(pud_t pud)
394{
395 return native_pud_val(pud) == 0;
396}
397
398static inline int pud_present(pud_t pud)
399{
400 return pud_flags(pud) & _PAGE_PRESENT;
401}
402
403static inline unsigned long pud_page_vaddr(pud_t pud)
404{
405 return (unsigned long)__va((unsigned long)pud_val(pud) & PTE_PFN_MASK);
406}
407
408/*
409 * Currently stuck as a macro due to indirect forward reference to
410 * linux/mmzone.h's __section_mem_map_addr() definition:
411 */
412#define pud_page(pud) pfn_to_page(pud_val(pud) >> PAGE_SHIFT)
413
414/* Find an entry in the second-level page table.. */
415static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
416{
417 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
418}
419
420static inline unsigned long pmd_pfn(pmd_t pmd)
421{
422 return (pmd_val(pmd) & PTE_PFN_MASK) >> PAGE_SHIFT;
423}
424
425static inline int pud_large(pud_t pud)
426{
427 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) ==
428 (_PAGE_PSE | _PAGE_PRESENT);
429}
430
431static inline int pud_bad(pud_t pud)
432{
433 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0;
434}
450#else435#else
451# include "pgtable_64.h"436static inline int pud_large(pud_t pud)
452#endif437{
438 return 0;
439}
440#endif /* PAGETABLE_LEVELS > 2 */
441
442#if PAGETABLE_LEVELS > 3
443static inline int pgd_present(pgd_t pgd)
444{
445 return pgd_flags(pgd) & _PAGE_PRESENT;
446}
447
448static inline unsigned long pgd_page_vaddr(pgd_t pgd)
449{
450 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK);
451}
452
453/*
454 * Currently stuck as a macro due to indirect forward reference to
455 * linux/mmzone.h's __section_mem_map_addr() definition:
456 */
457#define pgd_page(pgd) pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT)
458
459/* to find an entry in a page-table-directory. */
460static inline unsigned pud_index(unsigned long address)
461{
462 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
463}
464
465static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
466{
467 return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(address);
468}
469
470static inline int pgd_bad(pgd_t pgd)
471{
472 return (pgd_flags(pgd) & ~_PAGE_USER) != _KERNPG_TABLE;
473}
474
475static inline int pgd_none(pgd_t pgd)
476{
477 return !native_pgd_val(pgd);
478}
479#endif /* PAGETABLE_LEVELS > 3 */
480
481#endif /* __ASSEMBLY__ */
453 482
454/*483/*
455 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]484 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
@@ -476,28 +505,6 @@ static inline void __init paravirt_pagetable_setup_done(pgd_t *base) · 20 unmodified lines
476 505
477#ifndef __ASSEMBLY__506#ifndef __ASSEMBLY__
478 507
479enum {
480 PG_LEVEL_NONE,
481 PG_LEVEL_4K,
482 PG_LEVEL_2M,
483 PG_LEVEL_1G,
484 PG_LEVEL_NUM
485};
486
487#ifdef CONFIG_PROC_FS
488extern void update_page_count(int level, unsigned long pages);
489#else
490static inline void update_page_count(int level, unsigned long pages) { }
491#endif
492
493/*
494 * Helper function that returns the kernel pagetable entry controlling
495 * the virtual address 'address'. NULL means no pagetable entry present.
496 * NOTE: the return type is pte_t but if the pmd is PSE then we return it
497 * as a pte too.
498 */
499extern pte_t *lookup_address(unsigned long address, unsigned int *level);
500
501/* local pte updates need not use xchg for locking */508/* local pte updates need not use xchg for locking */
502static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)509static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
503{510{
arch/x86/include/asm/pgtable_32.h+1−87
@@ -1,6 +1,7 @@
1#ifndef _ASM_X86_PGTABLE_32_H1#ifndef _ASM_X86_PGTABLE_32_H
2#define _ASM_X86_PGTABLE_32_H2#define _ASM_X86_PGTABLE_32_H
3 3
4#include <asm/pgtable_32_types.h>
4 5
5/*6/*
6 * The Linux memory management assumes a three-level page table setup. On7 * The Linux memory management assumes a three-level page table setup. On
@@ -33,47 +34,6 @@ void paging_init(void); · 26 unmodified lines
33 34
34extern void set_pmd_pfn(unsigned long, unsigned long, pgprot_t);35extern void set_pmd_pfn(unsigned long, unsigned long, pgprot_t);
35 36
36/*
37 * The Linux x86 paging architecture is 'compile-time dual-mode', it
38 * implements both the traditional 2-level x86 page tables and the
39 * newer 3-level PAE-mode page tables.
40 */
41#ifdef CONFIG_X86_PAE
42# include <asm/pgtable-3level-defs.h>
43# define PMD_SIZE (1UL << PMD_SHIFT)
44# define PMD_MASK (~(PMD_SIZE - 1))
45#else
46# include <asm/pgtable-2level-defs.h>
47#endif
48
49#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
50#define PGDIR_MASK (~(PGDIR_SIZE - 1))
51
52/* Just any arbitrary offset to the start of the vmalloc VM area: the
53 * current 8MB value just means that there will be a 8MB "hole" after the
54 * physical memory until the kernel virtual memory starts. That means that
55 * any out-of-bounds memory accesses will hopefully be caught.
56 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
57 * area for the same reason. ;)
58 */
59#define VMALLOC_OFFSET (8 * 1024 * 1024)
60#define VMALLOC_START ((unsigned long)high_memory + VMALLOC_OFFSET)
61#ifdef CONFIG_X86_PAE
62#define LAST_PKMAP 512
63#else
64#define LAST_PKMAP 1024
65#endif
66
67#define PKMAP_BASE ((FIXADDR_BOOT_START - PAGE_SIZE * (LAST_PKMAP + 1)) \
68 & PMD_MASK)
69
70#ifdef CONFIG_HIGHMEM
71# define VMALLOC_END (PKMAP_BASE - 2 * PAGE_SIZE)
72#else
73# define VMALLOC_END (FIXADDR_START - 2 * PAGE_SIZE)
74#endif
75
76#define MAXMEM (VMALLOC_END - PAGE_OFFSET - __VMALLOC_RESERVE)
77 37
78/*38/*
79 * Define this if things work differently on an i386 and an i486:39 * Define this if things work differently on an i386 and an i486:
@@ -85,55 +45,12 @@ extern void set_pmd_pfn(unsigned long, unsigned long, pgprot_t); · 5 unmodified lines
85/* The boot page tables (all created as a single array) */45/* The boot page tables (all created as a single array) */
86extern unsigned long pg0[];46extern unsigned long pg0[];
87 47
88#define pte_present(x) ((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE))
89
90/* To avoid harmful races, pmd_none(x) should check only the lower when PAE */
91#define pmd_none(x) (!(unsigned long)pmd_val((x)))
92#define pmd_present(x) (pmd_val((x)) & _PAGE_PRESENT)
93#define pmd_bad(x) ((pmd_val(x) & (PTE_FLAGS_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)
94
95#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
96
97#ifdef CONFIG_X86_PAE48#ifdef CONFIG_X86_PAE
98# include <asm/pgtable-3level.h>49# include <asm/pgtable-3level.h>
99#else50#else
100# include <asm/pgtable-2level.h>51# include <asm/pgtable-2level.h>
101#endif52#endif
102 53
103/*
104 * Conversion functions: convert a page and protection to a page entry,
105 * and a page entry and page directory to the page they refer to.
106 */
107#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
108
109
110static inline int pud_large(pud_t pud) { return 0; }
111
112/*
113 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
114 *
115 * this macro returns the index of the entry in the pmd page which would
116 * control the given virtual address
117 */
118#define pmd_index(address) \
119 (((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
120
121/*
122 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
123 *
124 * this macro returns the index of the entry in the pte page which would
125 * control the given virtual address
126 */
127#define pte_index(address) \
128 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
129#define pte_offset_kernel(dir, address) \
130 ((pte_t *)pmd_page_vaddr(*(dir)) + pte_index((address)))
131
132#define pmd_page(pmd) (pfn_to_page(pmd_val((pmd)) >> PAGE_SHIFT))
133
134#define pmd_page_vaddr(pmd) \
135 ((unsigned long)__va(pmd_val((pmd)) & PTE_PFN_MASK))
136
137#if defined(CONFIG_HIGHPTE)54#if defined(CONFIG_HIGHPTE)
138#define pte_offset_map(dir, address) \55#define pte_offset_map(dir, address) \
139 ((pte_t *)kmap_atomic_pte(pmd_page(*(dir)), KM_PTE0) + \56 ((pte_t *)kmap_atomic_pte(pmd_page(*(dir)), KM_PTE0) + \
@@ -176,7 +93,4 @@ do { \ · 36 unmodified lines
176#define kern_addr_valid(kaddr) (0)93#define kern_addr_valid(kaddr) (0)
177#endif94#endif
178 95
179#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
180 remap_pfn_range(vma, vaddr, pfn, size, prot)
181
182#endif /* _ASM_X86_PGTABLE_32_H */96#endif /* _ASM_X86_PGTABLE_32_H */
arch/x86/include/asm/pgtable_32_types.h+46−0
@@ -0,0 +1,46 @@
1#ifndef _ASM_X86_PGTABLE_32_DEFS_H
2#define _ASM_X86_PGTABLE_32_DEFS_H
3
4/*
5 * The Linux x86 paging architecture is 'compile-time dual-mode', it
6 * implements both the traditional 2-level x86 page tables and the
7 * newer 3-level PAE-mode page tables.
8 */
9#ifdef CONFIG_X86_PAE
10# include <asm/pgtable-3level_types.h>
11# define PMD_SIZE (1UL << PMD_SHIFT)
12# define PMD_MASK (~(PMD_SIZE - 1))
13#else
14# include <asm/pgtable-2level_types.h>
15#endif
16
17#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
18#define PGDIR_MASK (~(PGDIR_SIZE - 1))
19
20/* Just any arbitrary offset to the start of the vmalloc VM area: the
21 * current 8MB value just means that there will be a 8MB "hole" after the
22 * physical memory until the kernel virtual memory starts. That means that
23 * any out-of-bounds memory accesses will hopefully be caught.
24 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
25 * area for the same reason. ;)
26 */
27#define VMALLOC_OFFSET (8 * 1024 * 1024)
28#define VMALLOC_START ((unsigned long)high_memory + VMALLOC_OFFSET)
29#ifdef CONFIG_X86_PAE
30#define LAST_PKMAP 512
31#else
32#define LAST_PKMAP 1024
33#endif
34
35#define PKMAP_BASE ((FIXADDR_BOOT_START - PAGE_SIZE * (LAST_PKMAP + 1)) \
36 & PMD_MASK)
37
38#ifdef CONFIG_HIGHMEM
39# define VMALLOC_END (PKMAP_BASE - 2 * PAGE_SIZE)
40#else
41# define VMALLOC_END (FIXADDR_START - 2 * PAGE_SIZE)
42#endif
43
44#define MAXMEM (VMALLOC_END - PAGE_OFFSET - __VMALLOC_RESERVE)
45
46#endif /* _ASM_X86_PGTABLE_32_DEFS_H */
arch/x86/include/asm/pgtable_64.h+2−111
@@ -2,6 +2,8 @@ · 1 unmodified line
2#define _ASM_X86_PGTABLE_64_H2#define _ASM_X86_PGTABLE_64_H
3 3
4#include <linux/const.h>4#include <linux/const.h>
5#include <asm/pgtable_64_types.h>
6
5#ifndef __ASSEMBLY__7#ifndef __ASSEMBLY__
6 8
7/*9/*
@@ -11,7 +13,6 @@ · 3 unmodified lines
11#include <asm/processor.h>13#include <asm/processor.h>
12#include <linux/bitops.h>14#include <linux/bitops.h>
13#include <linux/threads.h>15#include <linux/threads.h>
14#include <asm/pda.h>
15 16
16extern pud_t level3_kernel_pgt[512];17extern pud_t level3_kernel_pgt[512];
17extern pud_t level3_ident_pgt[512];18extern pud_t level3_ident_pgt[512];
@@ -26,32 +27,6 @@ extern void paging_init(void); · 8 unmodified lines
26 27
27#endif /* !__ASSEMBLY__ */28#endif /* !__ASSEMBLY__ */
28 29
29#define SHARED_KERNEL_PMD 0
30
31/*
32 * PGDIR_SHIFT determines what a top-level page table entry can map
33 */
34#define PGDIR_SHIFT 39
35#define PTRS_PER_PGD 512
36
37/*
38 * 3rd level page
39 */
40#define PUD_SHIFT 30
41#define PTRS_PER_PUD 512
42
43/*
44 * PMD_SHIFT determines the size of the area a middle-level
45 * page table can map
46 */
47#define PMD_SHIFT 21
48#define PTRS_PER_PMD 512
49
50/*
51 * entries per page directory level
52 */
53#define PTRS_PER_PTE 512
54
55#ifndef __ASSEMBLY__30#ifndef __ASSEMBLY__
56 31
57#define pte_ERROR(e) \32#define pte_ERROR(e) \
@@ -67,9 +42,6 @@ extern void paging_init(void); · 9 unmodified lines
67 printk("%s:%d: bad pgd %p(%016lx).\n", \42 printk("%s:%d: bad pgd %p(%016lx).\n", \
68 __FILE__, __LINE__, &(e), pgd_val(e))43 __FILE__, __LINE__, &(e), pgd_val(e))
69 44
70#define pgd_none(x) (!pgd_val(x))
71#define pud_none(x) (!pud_val(x))
72
73struct mm_struct;45struct mm_struct;
74 46
75void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte);47void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte);
@@ -134,48 +106,6 @@ static inline void native_pgd_clear(pgd_t *pgd) · 58 unmodified lines
134 native_set_pgd(pgd, native_make_pgd(0));106 native_set_pgd(pgd, native_make_pgd(0));
135}107}
136 108
137#define pte_same(a, b) ((a).pte == (b).pte)
138
139#endif /* !__ASSEMBLY__ */
140
141#define PMD_SIZE (_AC(1, UL) << PMD_SHIFT)
142#define PMD_MASK (~(PMD_SIZE - 1))
143#define PUD_SIZE (_AC(1, UL) << PUD_SHIFT)
144#define PUD_MASK (~(PUD_SIZE - 1))
145#define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT)
146#define PGDIR_MASK (~(PGDIR_SIZE - 1))
147
148
149#define MAXMEM _AC(__AC(1, UL) << MAX_PHYSMEM_BITS, UL)
150#define VMALLOC_START _AC(0xffffc20000000000, UL)
151#define VMALLOC_END _AC(0xffffe1ffffffffff, UL)
152#define VMEMMAP_START _AC(0xffffe20000000000, UL)
153#define MODULES_VADDR _AC(0xffffffffa0000000, UL)
154#define MODULES_END _AC(0xffffffffff000000, UL)
155#define MODULES_LEN (MODULES_END - MODULES_VADDR)
156
157#ifndef __ASSEMBLY__
158
159static inline int pgd_bad(pgd_t pgd)
160{
161 return (pgd_val(pgd) & ~(PTE_PFN_MASK | _PAGE_USER)) != _KERNPG_TABLE;
162}
163
164static inline int pud_bad(pud_t pud)
165{
166 return (pud_val(pud) & ~(PTE_PFN_MASK | _PAGE_USER)) != _KERNPG_TABLE;
167}
168
169static inline int pmd_bad(pmd_t pmd)
170{
171 return (pmd_val(pmd) & ~(PTE_PFN_MASK | _PAGE_USER)) != _KERNPG_TABLE;
172}
173
174#define pte_none(x) (!pte_val((x)))
175#define pte_present(x) (pte_val((x)) & (_PAGE_PRESENT | _PAGE_PROTNONE))
176
177#define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT)) /* FIXME: is this right? */
178
179/*109/*
180 * Conversion functions: convert a page and protection to a page entry,110 * Conversion functions: convert a page and protection to a page entry,
181 * and a page entry and page directory to the page they refer to.111 * and a page entry and page directory to the page they refer to.
@@ -184,41 +114,12 @@ static inline int pmd_bad(pmd_t pmd) · 2 unmodified lines
184/*114/*
185 * Level 4 access.115 * Level 4 access.
186 */116 */
187#define pgd_page_vaddr(pgd) \
188 ((unsigned long)__va((unsigned long)pgd_val((pgd)) & PTE_PFN_MASK))
189#define pgd_page(pgd) (pfn_to_page(pgd_val((pgd)) >> PAGE_SHIFT))
190#define pgd_present(pgd) (pgd_val(pgd) & _PAGE_PRESENT)
191static inline int pgd_large(pgd_t pgd) { return 0; }117static inline int pgd_large(pgd_t pgd) { return 0; }
192#define mk_kernel_pgd(address) __pgd((address) | _KERNPG_TABLE)118#define mk_kernel_pgd(address) __pgd((address) | _KERNPG_TABLE)
193 119
194/* PUD - Level3 access */120/* PUD - Level3 access */
195/* to find an entry in a page-table-directory. */
196#define pud_page_vaddr(pud) \
197 ((unsigned long)__va(pud_val((pud)) & PHYSICAL_PAGE_MASK))
198#define pud_page(pud) (pfn_to_page(pud_val((pud)) >> PAGE_SHIFT))
199#define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))
200#define pud_offset(pgd, address) \
201 ((pud_t *)pgd_page_vaddr(*(pgd)) + pud_index((address)))
202#define pud_present(pud) (pud_val((pud)) & _PAGE_PRESENT)
203
204static inline int pud_large(pud_t pte)
205{
206 return (pud_val(pte) & (_PAGE_PSE | _PAGE_PRESENT)) ==
207 (_PAGE_PSE | _PAGE_PRESENT);
208}
209 121
210/* PMD - Level 2 access */122/* PMD - Level 2 access */
211#define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_val((pmd)) & PTE_PFN_MASK))
212#define pmd_page(pmd) (pfn_to_page(pmd_val((pmd)) >> PAGE_SHIFT))
213
214#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
215#define pmd_offset(dir, address) ((pmd_t *)pud_page_vaddr(*(dir)) + \
216 pmd_index(address))
217#define pmd_none(x) (!pmd_val((x)))
218#define pmd_present(x) (pmd_val((x)) & _PAGE_PRESENT)
219#define pfn_pmd(nr, prot) (__pmd(((nr) << PAGE_SHIFT) | pgprot_val((prot))))
220#define pmd_pfn(x) ((pmd_val((x)) & __PHYSICAL_MASK) >> PAGE_SHIFT)
221
222#define pte_to_pgoff(pte) ((pte_val((pte)) & PHYSICAL_PAGE_MASK) >> PAGE_SHIFT)123#define pte_to_pgoff(pte) ((pte_val((pte)) & PHYSICAL_PAGE_MASK) >> PAGE_SHIFT)
223#define pgoff_to_pte(off) ((pte_t) { .pte = ((off) << PAGE_SHIFT) | \124#define pgoff_to_pte(off) ((pte_t) { .pte = ((off) << PAGE_SHIFT) | \
224 _PAGE_FILE })125 _PAGE_FILE })
@@ -226,13 +127,6 @@ static inline int pud_large(pud_t pte) · 1 unmodified line
226 127
227/* PTE - Level 1 access. */128/* PTE - Level 1 access. */
228 129
229/* page, protection -> pte */
230#define mk_pte(page, pgprot) pfn_pte(page_to_pfn((page)), (pgprot))
231
232#define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
233#define pte_offset_kernel(dir, address) ((pte_t *) pmd_page_vaddr(*(dir)) + \
234 pte_index((address)))
235
236/* x86-64 always has all page tables mapped. */130/* x86-64 always has all page tables mapped. */
237#define pte_offset_map(dir, address) pte_offset_kernel((dir), (address))131#define pte_offset_map(dir, address) pte_offset_kernel((dir), (address))
238#define pte_offset_map_nested(dir, address) pte_offset_kernel((dir), (address))132#define pte_offset_map_nested(dir, address) pte_offset_kernel((dir), (address))
@@ -266,9 +160,6 @@ extern int direct_gbpages; · 27 unmodified lines
266extern int kern_addr_valid(unsigned long addr);160extern int kern_addr_valid(unsigned long addr);
267extern void cleanup_highmap(void);161extern void cleanup_highmap(void);
268 162
269#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
270 remap_pfn_range(vma, vaddr, pfn, size, prot)
271
272#define HAVE_ARCH_UNMAPPED_AREA163#define HAVE_ARCH_UNMAPPED_AREA
273#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN164#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
274 165
arch/x86/include/asm/pgtable_64_types.h+63−0
@@ -0,0 +1,63 @@
1#ifndef _ASM_X86_PGTABLE_64_DEFS_H
2#define _ASM_X86_PGTABLE_64_DEFS_H
3
4#ifndef __ASSEMBLY__
5#include <linux/types.h>
6
7/*
8 * These are used to make use of C type-checking..
9 */
10typedef unsigned long pteval_t;
11typedef unsigned long pmdval_t;
12typedef unsigned long pudval_t;
13typedef unsigned long pgdval_t;
14typedef unsigned long pgprotval_t;
15
16typedef struct { pteval_t pte; } pte_t;
17
18#endif /* !__ASSEMBLY__ */
19
20#define SHARED_KERNEL_PMD 0
21#define PAGETABLE_LEVELS 4
22
23/*
24 * PGDIR_SHIFT determines what a top-level page table entry can map
25 */
26#define PGDIR_SHIFT 39
27#define PTRS_PER_PGD 512
28
29/*
30 * 3rd level page
31 */
32#define PUD_SHIFT 30
33#define PTRS_PER_PUD 512
34
35/*
36 * PMD_SHIFT determines the size of the area a middle-level
37 * page table can map
38 */
39#define PMD_SHIFT 21
40#define PTRS_PER_PMD 512
41
42/*
43 * entries per page directory level
44 */
45#define PTRS_PER_PTE 512
46
47#define PMD_SIZE (_AC(1, UL) << PMD_SHIFT)
48#define PMD_MASK (~(PMD_SIZE - 1))
49#define PUD_SIZE (_AC(1, UL) << PUD_SHIFT)
50#define PUD_MASK (~(PUD_SIZE - 1))
51#define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT)
52#define PGDIR_MASK (~(PGDIR_SIZE - 1))
53
54
55#define MAXMEM _AC(__AC(1, UL) << MAX_PHYSMEM_BITS, UL)
56#define VMALLOC_START _AC(0xffffc20000000000, UL)
57#define VMALLOC_END _AC(0xffffe1ffffffffff, UL)
58#define VMEMMAP_START _AC(0xffffe20000000000, UL)
59#define MODULES_VADDR _AC(0xffffffffa0000000, UL)
60#define MODULES_END _AC(0xffffffffff000000, UL)
61#define MODULES_LEN (MODULES_END - MODULES_VADDR)
62
63#endif /* _ASM_X86_PGTABLE_64_DEFS_H */
arch/x86/include/asm/pgtable_types.h+328−0
@@ -0,0 +1,328 @@
1#ifndef _ASM_X86_PGTABLE_DEFS_H
2#define _ASM_X86_PGTABLE_DEFS_H
3
4#include <linux/const.h>
5#include <asm/page_types.h>
6
7#define FIRST_USER_ADDRESS 0
8
9#define _PAGE_BIT_PRESENT 0 /* is present */
10#define _PAGE_BIT_RW 1 /* writeable */
11#define _PAGE_BIT_USER 2 /* userspace addressable */
12#define _PAGE_BIT_PWT 3 /* page write through */
13#define _PAGE_BIT_PCD 4 /* page cache disabled */
14#define _PAGE_BIT_ACCESSED 5 /* was accessed (raised by CPU) */
15#define _PAGE_BIT_DIRTY 6 /* was written to (raised by CPU) */
16#define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */
17#define _PAGE_BIT_PAT 7 /* on 4KB pages */
18#define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */
19#define _PAGE_BIT_UNUSED1 9 /* available for programmer */
20#define _PAGE_BIT_IOMAP 10 /* flag used to indicate IO mapping */
21#define _PAGE_BIT_UNUSED3 11
22#define _PAGE_BIT_PAT_LARGE 12 /* On 2MB or 1GB pages */
23#define _PAGE_BIT_SPECIAL _PAGE_BIT_UNUSED1
24#define _PAGE_BIT_CPA_TEST _PAGE_BIT_UNUSED1
25#define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */
26
27/* If _PAGE_BIT_PRESENT is clear, we use these: */
28/* - if the user mapped it with PROT_NONE; pte_present gives true */
29#define _PAGE_BIT_PROTNONE _PAGE_BIT_GLOBAL
30/* - set: nonlinear file mapping, saved PTE; unset:swap */
31#define _PAGE_BIT_FILE _PAGE_BIT_DIRTY
32
33#define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT)
34#define _PAGE_RW (_AT(pteval_t, 1) << _PAGE_BIT_RW)
35#define _PAGE_USER (_AT(pteval_t, 1) << _PAGE_BIT_USER)
36#define _PAGE_PWT (_AT(pteval_t, 1) << _PAGE_BIT_PWT)
37#define _PAGE_PCD (_AT(pteval_t, 1) << _PAGE_BIT_PCD)
38#define _PAGE_ACCESSED (_AT(pteval_t, 1) << _PAGE_BIT_ACCESSED)
39#define _PAGE_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_DIRTY)
40#define _PAGE_PSE (_AT(pteval_t, 1) << _PAGE_BIT_PSE)
41#define _PAGE_GLOBAL (_AT(pteval_t, 1) << _PAGE_BIT_GLOBAL)
42#define _PAGE_UNUSED1 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED1)
43#define _PAGE_IOMAP (_AT(pteval_t, 1) << _PAGE_BIT_IOMAP)
44#define _PAGE_UNUSED3 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED3)
45#define _PAGE_PAT (_AT(pteval_t, 1) << _PAGE_BIT_PAT)
46#define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE)
47#define _PAGE_SPECIAL (_AT(pteval_t, 1) << _PAGE_BIT_SPECIAL)
48#define _PAGE_CPA_TEST (_AT(pteval_t, 1) << _PAGE_BIT_CPA_TEST)
49#define __HAVE_ARCH_PTE_SPECIAL
50
51#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
52#define _PAGE_NX (_AT(pteval_t, 1) << _PAGE_BIT_NX)
53#else
54#define _PAGE_NX (_AT(pteval_t, 0))
55#endif
56
57#define _PAGE_FILE (_AT(pteval_t, 1) << _PAGE_BIT_FILE)
58#define _PAGE_PROTNONE (_AT(pteval_t, 1) << _PAGE_BIT_PROTNONE)
59
60#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
61 _PAGE_ACCESSED | _PAGE_DIRTY)
62#define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | \
63 _PAGE_DIRTY)
64
65/* Set of bits not changed in pte_modify */
66#define _PAGE_CHG_MASK (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT | \
67 _PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY)
68
69#define _PAGE_CACHE_MASK (_PAGE_PCD | _PAGE_PWT)
70#define _PAGE_CACHE_WB (0)
71#define _PAGE_CACHE_WC (_PAGE_PWT)
72#define _PAGE_CACHE_UC_MINUS (_PAGE_PCD)
73#define _PAGE_CACHE_UC (_PAGE_PCD | _PAGE_PWT)
74
75#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
76#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
77 _PAGE_ACCESSED | _PAGE_NX)
78
79#define PAGE_SHARED_EXEC __pgprot(_PAGE_PRESENT | _PAGE_RW | \
80 _PAGE_USER | _PAGE_ACCESSED)
81#define PAGE_COPY_NOEXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
82 _PAGE_ACCESSED | _PAGE_NX)
83#define PAGE_COPY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
84 _PAGE_ACCESSED)
85#define PAGE_COPY PAGE_COPY_NOEXEC
86#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | \
87 _PAGE_ACCESSED | _PAGE_NX)
88#define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
89 _PAGE_ACCESSED)
90
91#define __PAGE_KERNEL_EXEC \
92 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL)
93#define __PAGE_KERNEL (__PAGE_KERNEL_EXEC | _PAGE_NX)
94
95#define __PAGE_KERNEL_RO (__PAGE_KERNEL & ~_PAGE_RW)
96#define __PAGE_KERNEL_RX (__PAGE_KERNEL_EXEC & ~_PAGE_RW)
97#define __PAGE_KERNEL_EXEC_NOCACHE (__PAGE_KERNEL_EXEC | _PAGE_PCD | _PAGE_PWT)
98#define __PAGE_KERNEL_WC (__PAGE_KERNEL | _PAGE_CACHE_WC)
99#define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL | _PAGE_PCD | _PAGE_PWT)
100#define __PAGE_KERNEL_UC_MINUS (__PAGE_KERNEL | _PAGE_PCD)
101#define __PAGE_KERNEL_VSYSCALL (__PAGE_KERNEL_RX | _PAGE_USER)
102#define __PAGE_KERNEL_VSYSCALL_NOCACHE (__PAGE_KERNEL_VSYSCALL | _PAGE_PCD | _PAGE_PWT)
103#define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE)
104#define __PAGE_KERNEL_LARGE_NOCACHE (__PAGE_KERNEL | _PAGE_CACHE_UC | _PAGE_PSE)
105#define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE)
106
107#define __PAGE_KERNEL_IO (__PAGE_KERNEL | _PAGE_IOMAP)
108#define __PAGE_KERNEL_IO_NOCACHE (__PAGE_KERNEL_NOCACHE | _PAGE_IOMAP)
109#define __PAGE_KERNEL_IO_UC_MINUS (__PAGE_KERNEL_UC_MINUS | _PAGE_IOMAP)
110#define __PAGE_KERNEL_IO_WC (__PAGE_KERNEL_WC | _PAGE_IOMAP)
111
112#define PAGE_KERNEL __pgprot(__PAGE_KERNEL)
113#define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO)
114#define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC)
115#define PAGE_KERNEL_RX __pgprot(__PAGE_KERNEL_RX)
116#define PAGE_KERNEL_WC __pgprot(__PAGE_KERNEL_WC)
117#define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE)
118#define PAGE_KERNEL_UC_MINUS __pgprot(__PAGE_KERNEL_UC_MINUS)
119#define PAGE_KERNEL_EXEC_NOCACHE __pgprot(__PAGE_KERNEL_EXEC_NOCACHE)
120#define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE)
121#define PAGE_KERNEL_LARGE_NOCACHE __pgprot(__PAGE_KERNEL_LARGE_NOCACHE)
122#define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC)
123#define PAGE_KERNEL_VSYSCALL __pgprot(__PAGE_KERNEL_VSYSCALL)
124#define PAGE_KERNEL_VSYSCALL_NOCACHE __pgprot(__PAGE_KERNEL_VSYSCALL_NOCACHE)
125
126#define PAGE_KERNEL_IO __pgprot(__PAGE_KERNEL_IO)
127#define PAGE_KERNEL_IO_NOCACHE __pgprot(__PAGE_KERNEL_IO_NOCACHE)
128#define PAGE_KERNEL_IO_UC_MINUS __pgprot(__PAGE_KERNEL_IO_UC_MINUS)
129#define PAGE_KERNEL_IO_WC __pgprot(__PAGE_KERNEL_IO_WC)
130
131/* xwr */
132#define __P000 PAGE_NONE
133#define __P001 PAGE_READONLY
134#define __P010 PAGE_COPY
135#define __P011 PAGE_COPY
136#define __P100 PAGE_READONLY_EXEC
137#define __P101 PAGE_READONLY_EXEC
138#define __P110 PAGE_COPY_EXEC
139#define __P111 PAGE_COPY_EXEC
140
141#define __S000 PAGE_NONE
142#define __S001 PAGE_READONLY
143#define __S010 PAGE_SHARED
144#define __S011 PAGE_SHARED
145#define __S100 PAGE_READONLY_EXEC
146#define __S101 PAGE_READONLY_EXEC
147#define __S110 PAGE_SHARED_EXEC
148#define __S111 PAGE_SHARED_EXEC
149
150/*
151 * early identity mapping pte attrib macros.
152 */
153#ifdef CONFIG_X86_64
154#define __PAGE_KERNEL_IDENT_LARGE_EXEC __PAGE_KERNEL_LARGE_EXEC
155#else
156/*
157 * For PDE_IDENT_ATTR include USER bit. As the PDE and PTE protection
158 * bits are combined, this will alow user to access the high address mapped
159 * VDSO in the presence of CONFIG_COMPAT_VDSO
160 */
161#define PTE_IDENT_ATTR 0x003 /* PRESENT+RW */
162#define PDE_IDENT_ATTR 0x067 /* PRESENT+RW+USER+DIRTY+ACCESSED */
163#define PGD_IDENT_ATTR 0x001 /* PRESENT (no other attributes) */
164#endif
165
166#ifdef CONFIG_X86_32
167# include "pgtable_32_types.h"
168#else
169# include "pgtable_64_types.h"
170#endif
171
172#ifndef __ASSEMBLY__
173
174#include <linux/types.h>
175
176/* PTE_PFN_MASK extracts the PFN from a (pte|pmd|pud|pgd)val_t */
177#define PTE_PFN_MASK ((pteval_t)PHYSICAL_PAGE_MASK)
178
179/* PTE_FLAGS_MASK extracts the flags from a (pte|pmd|pud|pgd)val_t */
180#define PTE_FLAGS_MASK (~PTE_PFN_MASK)
181
182typedef struct pgprot { pgprotval_t pgprot; } pgprot_t;
183
184typedef struct { pgdval_t pgd; } pgd_t;
185
186static inline pgd_t native_make_pgd(pgdval_t val)
187{
188 return (pgd_t) { val };
189}
190
191static inline pgdval_t native_pgd_val(pgd_t pgd)
192{
193 return pgd.pgd;
194}
195
196static inline pgdval_t pgd_flags(pgd_t pgd)
197{
198 return native_pgd_val(pgd) & PTE_FLAGS_MASK;
199}
200
201#if PAGETABLE_LEVELS > 3
202typedef struct { pudval_t pud; } pud_t;
203
204static inline pud_t native_make_pud(pmdval_t val)
205{
206 return (pud_t) { val };
207}
208
209static inline pudval_t native_pud_val(pud_t pud)
210{
211 return pud.pud;
212}
213#else
214#include <asm-generic/pgtable-nopud.h>
215
216static inline pudval_t native_pud_val(pud_t pud)
217{
218 return native_pgd_val(pud.pgd);
219}
220#endif
221
222#if PAGETABLE_LEVELS > 2
223typedef struct { pmdval_t pmd; } pmd_t;
224
225static inline pmd_t native_make_pmd(pmdval_t val)
226{
227 return (pmd_t) { val };
228}
229
230static inline pmdval_t native_pmd_val(pmd_t pmd)
231{
232 return pmd.pmd;
233}
234#else
235#include <asm-generic/pgtable-nopmd.h>
236
237static inline pmdval_t native_pmd_val(pmd_t pmd)
238{
239 return native_pgd_val(pmd.pud.pgd);
240}
241#endif
242
243static inline pudval_t pud_flags(pud_t pud)
244{
245 return native_pud_val(pud) & PTE_FLAGS_MASK;
246}
247
248static inline pmdval_t pmd_flags(pmd_t pmd)
249{
250 return native_pmd_val(pmd) & PTE_FLAGS_MASK;
251}
252
253static inline pte_t native_make_pte(pteval_t val)
254{
255 return (pte_t) { .pte = val };
256}
257
258static inline pteval_t native_pte_val(pte_t pte)
259{
260 return pte.pte;
261}
262
263static inline pteval_t pte_flags(pte_t pte)
264{
265 return native_pte_val(pte) & PTE_FLAGS_MASK;
266}
267
268#define pgprot_val(x) ((x).pgprot)
269#define __pgprot(x) ((pgprot_t) { (x) } )
270
271
272typedef struct page *pgtable_t;
273
274extern pteval_t __supported_pte_mask;
275extern int nx_enabled;
276
277#define pgprot_writecombine pgprot_writecombine
278extern pgprot_t pgprot_writecombine(pgprot_t prot);
279
280/* Indicate that x86 has its own track and untrack pfn vma functions */
281#define __HAVE_PFNMAP_TRACKING
282
283#define __HAVE_PHYS_MEM_ACCESS_PROT
284struct file;
285pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
286 unsigned long size, pgprot_t vma_prot);
287int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
288 unsigned long size, pgprot_t *vma_prot);
289
290/* Install a pte for a particular vaddr in kernel space. */
291void set_pte_vaddr(unsigned long vaddr, pte_t pte);
292
293#ifdef CONFIG_X86_32
294extern void native_pagetable_setup_start(pgd_t *base);
295extern void native_pagetable_setup_done(pgd_t *base);
296#else
297static inline void native_pagetable_setup_start(pgd_t *base) {}
298static inline void native_pagetable_setup_done(pgd_t *base) {}
299#endif
300
301struct seq_file;
302extern void arch_report_meminfo(struct seq_file *m);
303
304enum {
305 PG_LEVEL_NONE,
306 PG_LEVEL_4K,
307 PG_LEVEL_2M,
308 PG_LEVEL_1G,
309 PG_LEVEL_NUM
310};
311
312#ifdef CONFIG_PROC_FS
313extern void update_page_count(int level, unsigned long pages);
314#else
315static inline void update_page_count(int level, unsigned long pages) { }
316#endif
317
318/*
319 * Helper function that returns the kernel pagetable entry controlling
320 * the virtual address 'address'. NULL means no pagetable entry present.
321 * NOTE: the return type is pte_t but if the pmd is PSE then we return it
322 * as a pte too.
323 */
324extern pte_t *lookup_address(unsigned long address, unsigned int *level);
325
326#endif /* !__ASSEMBLY__ */
327
328#endif /* _ASM_X86_PGTABLE_DEFS_H */
arch/x86/include/asm/processor.h+31−14
@@ -16,6 +16,7 @@ struct mm_struct; · 15 unmodified lines
16#include <asm/cpufeature.h>16#include <asm/cpufeature.h>
17#include <asm/system.h>17#include <asm/system.h>
18#include <asm/page.h>18#include <asm/page.h>
19#include <asm/pgtable_types.h>
19#include <asm/percpu.h>20#include <asm/percpu.h>
20#include <asm/msr.h>21#include <asm/msr.h>
21#include <asm/desc_defs.h>22#include <asm/desc_defs.h>
@@ -73,7 +74,7 @@ struct cpuinfo_x86 { · 51 unmodified lines
73 char pad0;74 char pad0;
74#else75#else
75 /* Number of 4K pages in DTLB/ITLB combined(in pages): */76 /* Number of 4K pages in DTLB/ITLB combined(in pages): */
76 int x86_tlbsize;77 int x86_tlbsize;
77 __u8 x86_virt_bits;78 __u8 x86_virt_bits;
78 __u8 x86_phys_bits;79 __u8 x86_phys_bits;
79#endif80#endif
@@ -247,7 +248,6 @@ struct x86_hw_tss { · 167 unmodified lines
247#define IO_BITMAP_LONGS (IO_BITMAP_BYTES/sizeof(long))248#define IO_BITMAP_LONGS (IO_BITMAP_BYTES/sizeof(long))
248#define IO_BITMAP_OFFSET offsetof(struct tss_struct, io_bitmap)249#define IO_BITMAP_OFFSET offsetof(struct tss_struct, io_bitmap)
249#define INVALID_IO_BITMAP_OFFSET 0x8000250#define INVALID_IO_BITMAP_OFFSET 0x8000
250#define INVALID_IO_BITMAP_OFFSET_LAZY 0x9000
251 251
252struct tss_struct {252struct tss_struct {
253 /*253 /*
@@ -262,11 +262,6 @@ struct tss_struct { · 8 unmodified lines
262 * be within the limit.262 * be within the limit.
263 */263 */
264 unsigned long io_bitmap[IO_BITMAP_LONGS + 1];264 unsigned long io_bitmap[IO_BITMAP_LONGS + 1];
265 /*
266 * Cache the current maximum and the last task that used the bitmap:
267 */
268 unsigned long io_bitmap_max;
269 struct thread_struct *io_bitmap_owner;
270 265
271 /*266 /*
272 * .. and then another 0x100 bytes for the emergency kernel stack:267 * .. and then another 0x100 bytes for the emergency kernel stack:
@@ -378,9 +373,30 @@ union thread_xstate { · 105 unmodified lines
378 373
379#ifdef CONFIG_X86_64374#ifdef CONFIG_X86_64
380DECLARE_PER_CPU(struct orig_ist, orig_ist);375DECLARE_PER_CPU(struct orig_ist, orig_ist);
376
377union irq_stack_union {
378 char irq_stack[IRQ_STACK_SIZE];
379 /*
380 * GCC hardcodes the stack canary as %gs:40. Since the
381 * irq_stack is the object at %gs:0, we reserve the bottom
382 * 48 bytes of the irq stack for the canary.
383 */
384 struct {
385 char gs_base[40];
386 unsigned long stack_canary;
387 };
388};
389
390DECLARE_PER_CPU(union irq_stack_union, irq_stack_union);
391DECLARE_INIT_PER_CPU(irq_stack_union);
392
393DECLARE_PER_CPU(char *, irq_stack_ptr);
394#else /* X86_64 */
395#ifdef CONFIG_CC_STACKPROTECTOR
396DECLARE_PER_CPU(unsigned long, stack_canary);
381#endif397#endif
398#endif /* X86_64 */
382 399
383extern void print_cpu_info(struct cpuinfo_x86 *);
384extern unsigned int xstate_size;400extern unsigned int xstate_size;
385extern void free_thread_xstate(struct task_struct *);401extern void free_thread_xstate(struct task_struct *);
386extern struct kmem_cache *task_xstate_cachep;402extern struct kmem_cache *task_xstate_cachep;
@@ -752,9 +768,9 @@ extern int sysenter_setup(void); · 365 unmodified lines
752extern struct desc_ptr early_gdt_descr;768extern struct desc_ptr early_gdt_descr;
753 769
754extern void cpu_set_gdt(int);770extern void cpu_set_gdt(int);
755extern void switch_to_new_gdt(void);771extern void switch_to_new_gdt(int);
772extern void load_percpu_segment(int);
756extern void cpu_init(void);773extern void cpu_init(void);
757extern void init_gdt(int cpu);
758 774
759static inline unsigned long get_debugctlmsr(void)775static inline unsigned long get_debugctlmsr(void)
760{776{
@@ -839,6 +855,7 @@ static inline void spin_lock_prefetch(const void *x) · 78 unmodified lines
839 * User space process size: 3GB (default).855 * User space process size: 3GB (default).
840 */856 */
841#define TASK_SIZE PAGE_OFFSET857#define TASK_SIZE PAGE_OFFSET
858#define TASK_SIZE_MAX TASK_SIZE
842#define STACK_TOP TASK_SIZE859#define STACK_TOP TASK_SIZE
843#define STACK_TOP_MAX STACK_TOP860#define STACK_TOP_MAX STACK_TOP
844 861
@@ -898,7 +915,7 @@ extern unsigned long thread_saved_pc(struct task_struct *tsk); · 53 unmodified lines
898/*915/*
899 * User space process size. 47bits minus one guard page.916 * User space process size. 47bits minus one guard page.
900 */917 */
901#define TASK_SIZE64 ((1UL << 47) - PAGE_SIZE)918#define TASK_SIZE_MAX ((1UL << 47) - PAGE_SIZE)
902 919
903/* This decides where the kernel will search for a free chunk of vm920/* This decides where the kernel will search for a free chunk of vm
904 * space during mmap's.921 * space during mmap's.
@@ -907,12 +924,12 @@ extern unsigned long thread_saved_pc(struct task_struct *tsk); · 2 unmodified lines
907 0xc0000000 : 0xFFFFe000)924 0xc0000000 : 0xFFFFe000)
908 925
909#define TASK_SIZE (test_thread_flag(TIF_IA32) ? \926#define TASK_SIZE (test_thread_flag(TIF_IA32) ? \
910 IA32_PAGE_OFFSET : TASK_SIZE64)927 IA32_PAGE_OFFSET : TASK_SIZE_MAX)
911#define TASK_SIZE_OF(child) ((test_tsk_thread_flag(child, TIF_IA32)) ? \928#define TASK_SIZE_OF(child) ((test_tsk_thread_flag(child, TIF_IA32)) ? \
912 IA32_PAGE_OFFSET : TASK_SIZE64)929 IA32_PAGE_OFFSET : TASK_SIZE_MAX)
913 930
914#define STACK_TOP TASK_SIZE931#define STACK_TOP TASK_SIZE
915#define STACK_TOP_MAX TASK_SIZE64932#define STACK_TOP_MAX TASK_SIZE_MAX
916 933
917#define INIT_THREAD { \934#define INIT_THREAD { \
918 .sp0 = (unsigned long)&init_stack + sizeof(init_stack) \935 .sp0 = (unsigned long)&init_stack + sizeof(init_stack) \
arch/x86/include/asm/proto.h+0−4
@@ -18,11 +18,7 @@ extern void syscall32_cpu_init(void); · 17 unmodified lines
18 18
19extern void check_efer(void);19extern void check_efer(void);
20 20
21#ifdef CONFIG_X86_BIOS_REBOOT
22extern int reboot_force;21extern int reboot_force;
23#else
24static const int reboot_force = 0;
25#endif
26 22
27long do_arch_prctl(struct task_struct *task, int code, unsigned long addr);23long do_arch_prctl(struct task_struct *task, int code, unsigned long addr);
28 24
arch/x86/include/asm/ptrace.h+2−2
@@ -28,7 +28,7 @@ struct pt_regs { · 27 unmodified lines
28 int xds;28 int xds;
29 int xes;29 int xes;
30 int xfs;30 int xfs;
31 /* int gs; */31 int xgs;
32 long orig_eax;32 long orig_eax;
33 long eip;33 long eip;
34 int xcs;34 int xcs;
@@ -50,7 +50,7 @@ struct pt_regs { · 15 unmodified lines
50 unsigned long ds;50 unsigned long ds;
51 unsigned long es;51 unsigned long es;
52 unsigned long fs;52 unsigned long fs;
53 /* int gs; */53 unsigned long gs;
54 unsigned long orig_ax;54 unsigned long orig_ax;
55 unsigned long ip;55 unsigned long ip;
56 unsigned long cs;56 unsigned long cs;
arch/x86/include/asm/rdc321x_defs.hrenamed from arch/x86/include/asm/mach-rdc321x/rdc321x_defs.h+0−0

File renamed without changes.

arch/x86/include/asm/segment.h+8−1
@@ -61,7 +61,7 @@ · 60 unmodified lines
61 *61 *
62 * 26 - ESPFIX small SS62 * 26 - ESPFIX small SS
63 * 27 - per-cpu [ offset to per-cpu data area ]63 * 27 - per-cpu [ offset to per-cpu data area ]
64 * 28 - unused64 * 28 - stack_canary-20 [ for stack protector ]
65 * 29 - unused65 * 29 - unused
66 * 30 - unused66 * 30 - unused
67 * 31 - TSS for double fault handler67 * 31 - TSS for double fault handler
@@ -95,6 +95,13 @@ · 27 unmodified lines
95#define __KERNEL_PERCPU 095#define __KERNEL_PERCPU 0
96#endif96#endif
97 97
98#define GDT_ENTRY_STACK_CANARY (GDT_ENTRY_KERNEL_BASE + 16)
99#ifdef CONFIG_CC_STACKPROTECTOR
100#define __KERNEL_STACK_CANARY (GDT_ENTRY_STACK_CANARY * 8)
101#else
102#define __KERNEL_STACK_CANARY 0
103#endif
104
98#define GDT_ENTRY_DOUBLEFAULT_TSS 31105#define GDT_ENTRY_DOUBLEFAULT_TSS 31
99 106
100/*107/*
arch/x86/include/asm/setup.h+14−5
@@ -13,6 +13,7 @@ · 12 unmodified lines
13struct mpc_cpu;13struct mpc_cpu;
14struct mpc_bus;14struct mpc_bus;
15struct mpc_oemtable;15struct mpc_oemtable;
16
16struct x86_quirks {17struct x86_quirks {
17 int (*arch_pre_time_init)(void);18 int (*arch_pre_time_init)(void);
18 int (*arch_time_init)(void);19 int (*arch_time_init)(void);
@@ -28,11 +29,18 @@ struct x86_quirks { · 9 unmodified lines
28 void (*mpc_oem_bus_info)(struct mpc_bus *m, char *name);29 void (*mpc_oem_bus_info)(struct mpc_bus *m, char *name);
29 void (*mpc_oem_pci_bus)(struct mpc_bus *m);30 void (*mpc_oem_pci_bus)(struct mpc_bus *m);
30 void (*smp_read_mpc_oem)(struct mpc_oemtable *oemtable,31 void (*smp_read_mpc_oem)(struct mpc_oemtable *oemtable,
31 unsigned short oemsize);32 unsigned short oemsize);
32 int (*setup_ioapic_ids)(void);33 int (*setup_ioapic_ids)(void);
33 int (*update_genapic)(void);
34};34};
35 35
36extern void x86_quirk_pre_intr_init(void);
37extern void x86_quirk_intr_init(void);
38
39extern void x86_quirk_trap_init(void);
40
41extern void x86_quirk_pre_time_init(void);
42extern void x86_quirk_time_init(void);
43
36#endif /* __ASSEMBLY__ */44#endif /* __ASSEMBLY__ */
37 45
38#ifdef __i386__46#ifdef __i386__
@@ -56,7 +64,11 @@ struct x86_quirks { · 17 unmodified lines
56#include <asm/bootparam.h>64#include <asm/bootparam.h>
57 65
58/* Interrupt control for vSMPowered x86_64 systems */66/* Interrupt control for vSMPowered x86_64 systems */
67#ifdef CONFIG_X86_VSMP
59void vsmp_init(void);68void vsmp_init(void);
69#else
70static inline void vsmp_init(void) { }
71#endif
60 72
61void setup_bios_corruption_check(void);73void setup_bios_corruption_check(void);
62 74
@@ -68,8 +80,6 @@ static inline void visws_early_detect(void) { } · 5 unmodified lines
68static inline int is_visws_box(void) { return 0; }80static inline int is_visws_box(void) { return 0; }
69#endif81#endif
70 82
71extern int wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip);
72extern int wakeup_secondary_cpu_via_init(int apicid, unsigned long start_eip);
73extern struct x86_quirks *x86_quirks;83extern struct x86_quirks *x86_quirks;
74extern unsigned long saved_video_mode;84extern unsigned long saved_video_mode;
75 85
@@ -99,7 +109,6 @@ extern unsigned long init_pg_tables_start; · 23 unmodified lines
99extern unsigned long init_pg_tables_end;109extern unsigned long init_pg_tables_end;
100 110
101#else111#else
102void __init x86_64_init_pda(void);
103void __init x86_64_start_kernel(char *real_mode);112void __init x86_64_start_kernel(char *real_mode);
104void __init x86_64_start_reservations(char *real_mode_data);113void __init x86_64_start_reservations(char *real_mode_data);
105 114
arch/x86/include/asm/setup_arch.hrenamed from arch/x86/include/asm/mach-default/setup_arch.h+0−0

File renamed without changes.

arch/x86/include/asm/smp.h+3−66
@@ -15,34 +15,8 @@ · 14 unmodified lines
15# include <asm/io_apic.h>15# include <asm/io_apic.h>
16# endif16# endif
17#endif17#endif
18#include <asm/pda.h>
19#include <asm/thread_info.h>18#include <asm/thread_info.h>
20 19#include <asm/cpumask.h>
21#ifdef CONFIG_X86_64
22
23extern cpumask_var_t cpu_callin_mask;
24extern cpumask_var_t cpu_callout_mask;
25extern cpumask_var_t cpu_initialized_mask;
26extern cpumask_var_t cpu_sibling_setup_mask;
27
28#else /* CONFIG_X86_32 */
29
30extern cpumask_t cpu_callin_map;
31extern cpumask_t cpu_callout_map;
32extern cpumask_t cpu_initialized;
33extern cpumask_t cpu_sibling_setup_map;
34
35#define cpu_callin_mask ((struct cpumask *)&cpu_callin_map)
36#define cpu_callout_mask ((struct cpumask *)&cpu_callout_map)
37#define cpu_initialized_mask ((struct cpumask *)&cpu_initialized)
38#define cpu_sibling_setup_mask ((struct cpumask *)&cpu_sibling_setup_map)
39
40#endif /* CONFIG_X86_32 */
41
42extern void (*mtrr_hook)(void);
43extern void zap_low_mappings(void);
44
45extern int __cpuinit get_local_pda(int cpu);
46 20
47extern int smp_num_siblings;21extern int smp_num_siblings;
48extern unsigned int num_processors;22extern unsigned int num_processors;
@@ -50,9 +24,7 @@ extern unsigned int num_processors; · 1 unmodified line
50DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);24DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);
51DECLARE_PER_CPU(cpumask_t, cpu_core_map);25DECLARE_PER_CPU(cpumask_t, cpu_core_map);
52DECLARE_PER_CPU(u16, cpu_llc_id);26DECLARE_PER_CPU(u16, cpu_llc_id);
53#ifdef CONFIG_X86_32
54DECLARE_PER_CPU(int, cpu_number);27DECLARE_PER_CPU(int, cpu_number);
55#endif
56 28
57static inline struct cpumask *cpu_sibling_mask(int cpu)29static inline struct cpumask *cpu_sibling_mask(int cpu)
58{30{
@@ -167,8 +139,6 @@ void play_dead_common(void); · 108 unmodified lines
167void native_send_call_func_ipi(const struct cpumask *mask);139void native_send_call_func_ipi(const struct cpumask *mask);
168void native_send_call_func_single_ipi(int cpu);140void native_send_call_func_single_ipi(int cpu);
169 141
170extern void prefill_possible_map(void);
171
172void smp_store_cpu_info(int id);142void smp_store_cpu_info(int id);
173#define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu)143#define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu)
174 144
@@ -177,10 +147,6 @@ static inline int num_booting_cpus(void) · 2 unmodified lines
177{147{
178 return cpumask_weight(cpu_callout_mask);148 return cpumask_weight(cpu_callout_mask);
179}149}
180#else
181static inline void prefill_possible_map(void)
182{
183}
184#endif /* CONFIG_SMP */150#endif /* CONFIG_SMP */
185 151
186extern unsigned disabled_cpus __cpuinitdata;152extern unsigned disabled_cpus __cpuinitdata;
@@ -191,11 +157,11 @@ extern unsigned disabled_cpus __cpuinitdata; · 4 unmodified lines
191 * from the initial startup. We map APIC_BASE very early in page_setup(),157 * from the initial startup. We map APIC_BASE very early in page_setup(),
192 * so this is correct in the x86 case.158 * so this is correct in the x86 case.
193 */159 */
194#define raw_smp_processor_id() (x86_read_percpu(cpu_number))160#define raw_smp_processor_id() (percpu_read(cpu_number))
195extern int safe_smp_processor_id(void);161extern int safe_smp_processor_id(void);
196 162
197#elif defined(CONFIG_X86_64_SMP)163#elif defined(CONFIG_X86_64_SMP)
198#define raw_smp_processor_id() read_pda(cpunumber)164#define raw_smp_processor_id() (percpu_read(cpu_number))
199 165
200#define stack_smp_processor_id() \166#define stack_smp_processor_id() \
201({ \167({ \
@@ -205,10 +171,6 @@ extern int safe_smp_processor_id(void); · 3 unmodified lines
205})171})
206#define safe_smp_processor_id() smp_processor_id()172#define safe_smp_processor_id() smp_processor_id()
207 173
208#else /* !CONFIG_X86_32_SMP && !CONFIG_X86_64_SMP */
209#define cpu_physical_id(cpu) boot_cpu_physical_apicid
210#define safe_smp_processor_id() 0
211#define stack_smp_processor_id() 0
212#endif174#endif
213 175
214#ifdef CONFIG_X86_LOCAL_APIC176#ifdef CONFIG_X86_LOCAL_APIC
@@ -220,28 +182,9 @@ static inline int logical_smp_processor_id(void) · 5 unmodified lines
220 return GET_APIC_LOGICAL_ID(*(u32 *)(APIC_BASE + APIC_LDR));182 return GET_APIC_LOGICAL_ID(*(u32 *)(APIC_BASE + APIC_LDR));
221}183}
222 184
223#include <mach_apicdef.h>
224static inline unsigned int read_apic_id(void)
225{
226 unsigned int reg;
227
228 reg = *(u32 *)(APIC_BASE + APIC_ID);
229
230 return GET_APIC_ID(reg);
231}
232#endif185#endif
233 186
234
235# if defined(APIC_DEFINITION) || defined(CONFIG_X86_64)
236extern int hard_smp_processor_id(void);187extern int hard_smp_processor_id(void);
237# else
238#include <mach_apicdef.h>
239static inline int hard_smp_processor_id(void)
240{
241 /* we don't want to mark this access volatile - bad code generation */
242 return read_apic_id();
243}
244# endif /* APIC_DEFINITION */
245 188
246#else /* CONFIG_X86_LOCAL_APIC */189#else /* CONFIG_X86_LOCAL_APIC */
247 190
@@ -251,11 +194,5 @@ static inline int hard_smp_processor_id(void) · 3 unmodified lines
251 194
252#endif /* CONFIG_X86_LOCAL_APIC */195#endif /* CONFIG_X86_LOCAL_APIC */
253 196
254#ifdef CONFIG_X86_HAS_BOOT_CPU_ID
255extern unsigned char boot_cpu_id;
256#else
257#define boot_cpu_id 0
258#endif
259
260#endif /* __ASSEMBLY__ */197#endif /* __ASSEMBLY__ */
261#endif /* _ASM_X86_SMP_H */198#endif /* _ASM_X86_SMP_H */
arch/x86/include/asm/smpboot_hooks.hrenamed from arch/x86/include/asm/mach-default/smpboot_hooks.h+3−3
@@ -13,10 +13,10 @@ static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip) · 12 unmodified lines
13 CMOS_WRITE(0xa, 0xf);13 CMOS_WRITE(0xa, 0xf);
14 local_flush_tlb();14 local_flush_tlb();
15 pr_debug("1.\n");15 pr_debug("1.\n");
16 *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH)) =16 *((volatile unsigned short *)phys_to_virt(apic->trampoline_phys_high)) =
17 start_eip >> 4;17 start_eip >> 4;
18 pr_debug("2.\n");18 pr_debug("2.\n");
19 *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) =19 *((volatile unsigned short *)phys_to_virt(apic->trampoline_phys_low)) =
20 start_eip & 0xf;20 start_eip & 0xf;
21 pr_debug("3.\n");21 pr_debug("3.\n");
22}22}
@@ -34,7 +34,7 @@ static inline void smpboot_restore_warm_reset_vector(void) · 11 unmodified lines
34 */34 */
35 CMOS_WRITE(0, 0xf);35 CMOS_WRITE(0, 0xf);
36 36
37 *((volatile long *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) = 0;37 *((volatile long *)phys_to_virt(apic->trampoline_phys_low)) = 0;
38}38}
39 39
40static inline void __init smpboot_setup_io_apic(void)40static inline void __init smpboot_setup_io_apic(void)
arch/x86/include/asm/spinlock.h+3−66
@@ -172,70 +172,8 @@ static inline int __ticket_spin_is_contended(raw_spinlock_t *lock) · 171 unmodified lines
172 return (((tmp >> TICKET_SHIFT) - tmp) & ((1 << TICKET_SHIFT) - 1)) > 1;172 return (((tmp >> TICKET_SHIFT) - tmp) & ((1 << TICKET_SHIFT) - 1)) > 1;
173}173}
174 174
175#ifdef CONFIG_PARAVIRT175#ifndef CONFIG_PARAVIRT
176/*
177 * Define virtualization-friendly old-style lock byte lock, for use in
178 * pv_lock_ops if desired.
179 *
180 * This differs from the pre-2.6.24 spinlock by always using xchgb
181 * rather than decb to take the lock; this allows it to use a
182 * zero-initialized lock structure. It also maintains a 1-byte
183 * contention counter, so that we can implement
184 * __byte_spin_is_contended.
185 */
186struct __byte_spinlock {
187 s8 lock;
188 s8 spinners;
189};
190
191static inline int __byte_spin_is_locked(raw_spinlock_t *lock)
192{
193 struct __byte_spinlock *bl = (struct __byte_spinlock *)lock;
194 return bl->lock != 0;
195}
196
197static inline int __byte_spin_is_contended(raw_spinlock_t *lock)
198{
199 struct __byte_spinlock *bl = (struct __byte_spinlock *)lock;
200 return bl->spinners != 0;
201}
202
203static inline void __byte_spin_lock(raw_spinlock_t *lock)
204{
205 struct __byte_spinlock *bl = (struct __byte_spinlock *)lock;
206 s8 val = 1;
207
208 asm("1: xchgb %1, %0\n"
209 " test %1,%1\n"
210 " jz 3f\n"
211 " " LOCK_PREFIX "incb %2\n"
212 "2: rep;nop\n"
213 " cmpb $1, %0\n"
214 " je 2b\n"
215 " " LOCK_PREFIX "decb %2\n"
216 " jmp 1b\n"
217 "3:"
218 : "+m" (bl->lock), "+q" (val), "+m" (bl->spinners): : "memory");
219}
220
221static inline int __byte_spin_trylock(raw_spinlock_t *lock)
222{
223 struct __byte_spinlock *bl = (struct __byte_spinlock *)lock;
224 u8 old = 1;
225
226 asm("xchgb %1,%0"
227 : "+m" (bl->lock), "+q" (old) : : "memory");
228 176
229 return old == 0;
230}
231
232static inline void __byte_spin_unlock(raw_spinlock_t *lock)
233{
234 struct __byte_spinlock *bl = (struct __byte_spinlock *)lock;
235 smp_wmb();
236 bl->lock = 0;
237}
238#else /* !CONFIG_PARAVIRT */
239static inline int __raw_spin_is_locked(raw_spinlock_t *lock)177static inline int __raw_spin_is_locked(raw_spinlock_t *lock)
240{178{
241 return __ticket_spin_is_locked(lock);179 return __ticket_spin_is_locked(lock);
@@ -268,7 +206,7 @@ static __always_inline void __raw_spin_lock_flags(raw_spinlock_t *lock, · 26 unmodified lines
268 __raw_spin_lock(lock);206 __raw_spin_lock(lock);
269}207}
270 208
271#endif /* CONFIG_PARAVIRT */209#endif
272 210
273static inline void __raw_spin_unlock_wait(raw_spinlock_t *lock)211static inline void __raw_spin_unlock_wait(raw_spinlock_t *lock)
274{212{
@@ -330,8 +268,7 @@ static inline int __raw_read_trylock(raw_rwlock_t *lock) · 55 unmodified lines
330{268{
331 atomic_t *count = (atomic_t *)lock;269 atomic_t *count = (atomic_t *)lock;
332 270
333 atomic_dec(count);271 if (atomic_dec_return(count) >= 0)
334 if (atomic_read(count) >= 0)
335 return 1;272 return 1;
336 atomic_inc(count);273 atomic_inc(count);
337 return 0;274 return 0;
arch/x86/include/asm/stackprotector.h+124−0
@@ -0,0 +1,124 @@
1/*
2 * GCC stack protector support.
3 *
4 * Stack protector works by putting predefined pattern at the start of
5 * the stack frame and verifying that it hasn't been overwritten when
6 * returning from the function. The pattern is called stack canary
7 * and unfortunately gcc requires it to be at a fixed offset from %gs.
8 * On x86_64, the offset is 40 bytes and on x86_32 20 bytes. x86_64
9 * and x86_32 use segment registers differently and thus handles this
10 * requirement differently.
11 *
12 * On x86_64, %gs is shared by percpu area and stack canary. All
13 * percpu symbols are zero based and %gs points to the base of percpu
14 * area. The first occupant of the percpu area is always
15 * irq_stack_union which contains stack_canary at offset 40. Userland
16 * %gs is always saved and restored on kernel entry and exit using
17 * swapgs, so stack protector doesn't add any complexity there.
18 *
19 * On x86_32, it's slightly more complicated. As in x86_64, %gs is
20 * used for userland TLS. Unfortunately, some processors are much
21 * slower at loading segment registers with different value when
22 * entering and leaving the kernel, so the kernel uses %fs for percpu
23 * area and manages %gs lazily so that %gs is switched only when
24 * necessary, usually during task switch.
25 *
26 * As gcc requires the stack canary at %gs:20, %gs can't be managed
27 * lazily if stack protector is enabled, so the kernel saves and
28 * restores userland %gs on kernel entry and exit. This behavior is
29 * controlled by CONFIG_X86_32_LAZY_GS and accessors are defined in
30 * system.h to hide the details.
31 */
32
33#ifndef _ASM_STACKPROTECTOR_H
34#define _ASM_STACKPROTECTOR_H 1
35
36#ifdef CONFIG_CC_STACKPROTECTOR
37
38#include <asm/tsc.h>
39#include <asm/processor.h>
40#include <asm/percpu.h>
41#include <asm/system.h>
42#include <asm/desc.h>
43#include <linux/random.h>
44
45/*
46 * 24 byte read-only segment initializer for stack canary. Linker
47 * can't handle the address bit shifting. Address will be set in
48 * head_32 for boot CPU and setup_per_cpu_areas() for others.
49 */
50#define GDT_STACK_CANARY_INIT \
51 [GDT_ENTRY_STACK_CANARY] = { { { 0x00000018, 0x00409000 } } },
52
53/*
54 * Initialize the stackprotector canary value.
55 *
56 * NOTE: this must only be called from functions that never return,
57 * and it must always be inlined.
58 */
59static __always_inline void boot_init_stack_canary(void)
60{
61 u64 canary;
62 u64 tsc;
63
64#ifdef CONFIG_X86_64
65 BUILD_BUG_ON(offsetof(union irq_stack_union, stack_canary) != 40);
66#endif
67 /*
68 * We both use the random pool and the current TSC as a source
69 * of randomness. The TSC only matters for very early init,
70 * there it already has some randomness on most systems. Later
71 * on during the bootup the random pool has true entropy too.
72 */
73 get_random_bytes(&canary, sizeof(canary));
74 tsc = __native_read_tsc();
75 canary += tsc + (tsc << 32UL);
76
77 current->stack_canary = canary;
78#ifdef CONFIG_X86_64
79 percpu_write(irq_stack_union.stack_canary, canary);
80#else
81 percpu_write(stack_canary, canary);
82#endif
83}
84
85static inline void setup_stack_canary_segment(int cpu)
86{
87#ifdef CONFIG_X86_32
88 unsigned long canary = (unsigned long)&per_cpu(stack_canary, cpu) - 20;
89 struct desc_struct *gdt_table = get_cpu_gdt_table(cpu);
90 struct desc_struct desc;
91
92 desc = gdt_table[GDT_ENTRY_STACK_CANARY];
93 desc.base0 = canary & 0xffff;
94 desc.base1 = (canary >> 16) & 0xff;
95 desc.base2 = (canary >> 24) & 0xff;
96 write_gdt_entry(gdt_table, GDT_ENTRY_STACK_CANARY, &desc, DESCTYPE_S);
97#endif
98}
99
100static inline void load_stack_canary_segment(void)
101{
102#ifdef CONFIG_X86_32
103 asm("mov %0, %%gs" : : "r" (__KERNEL_STACK_CANARY) : "memory");
104#endif
105}
106
107#else /* CC_STACKPROTECTOR */
108
109#define GDT_STACK_CANARY_INIT
110
111/* dummy boot_init_stack_canary() is defined in linux/stackprotector.h */
112
113static inline void setup_stack_canary_segment(int cpu)
114{ }
115
116static inline void load_stack_canary_segment(void)
117{
118#ifdef CONFIG_X86_32
119 asm volatile ("mov %0, %%gs" : : "r" (0));
120#endif
121}
122
123#endif /* CC_STACKPROTECTOR */
124#endif /* _ASM_STACKPROTECTOR_H */
arch/x86/include/asm/summit/apic.h+0−202
@@ -1,202 +0,0 @@
1#ifndef __ASM_SUMMIT_APIC_H
2#define __ASM_SUMMIT_APIC_H
3
4#include <asm/smp.h>
5#include <linux/gfp.h>
6
7#define esr_disable (1)
8#define NO_BALANCE_IRQ (0)
9
10/* In clustered mode, the high nibble of APIC ID is a cluster number.
11 * The low nibble is a 4-bit bitmap. */
12#define XAPIC_DEST_CPUS_SHIFT 4
13#define XAPIC_DEST_CPUS_MASK ((1u << XAPIC_DEST_CPUS_SHIFT) - 1)
14#define XAPIC_DEST_CLUSTER_MASK (XAPIC_DEST_CPUS_MASK << XAPIC_DEST_CPUS_SHIFT)
15
16#define APIC_DFR_VALUE (APIC_DFR_CLUSTER)
17
18static inline const cpumask_t *target_cpus(void)
19{
20 /* CPU_MASK_ALL (0xff) has undefined behaviour with
21 * dest_LowestPrio mode logical clustered apic interrupt routing
22 * Just start on cpu 0. IRQ balancing will spread load
23 */
24 return &cpumask_of_cpu(0);
25}
26
27#define INT_DELIVERY_MODE (dest_LowestPrio)
28#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */
29
30static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
31{
32 return 0;
33}
34
35/* we don't use the phys_cpu_present_map to indicate apicid presence */
36static inline unsigned long check_apicid_present(int bit)
37{
38 return 1;
39}
40
41#define apicid_cluster(apicid) ((apicid) & XAPIC_DEST_CLUSTER_MASK)
42
43extern u8 cpu_2_logical_apicid[];
44
45static inline void init_apic_ldr(void)
46{
47 unsigned long val, id;
48 int count = 0;
49 u8 my_id = (u8)hard_smp_processor_id();
50 u8 my_cluster = (u8)apicid_cluster(my_id);
51#ifdef CONFIG_SMP
52 u8 lid;
53 int i;
54
55 /* Create logical APIC IDs by counting CPUs already in cluster. */
56 for (count = 0, i = nr_cpu_ids; --i >= 0; ) {
57 lid = cpu_2_logical_apicid[i];
58 if (lid != BAD_APICID && apicid_cluster(lid) == my_cluster)
59 ++count;
60 }
61#endif
62 /* We only have a 4 wide bitmap in cluster mode. If a deranged
63 * BIOS puts 5 CPUs in one APIC cluster, we're hosed. */
64 BUG_ON(count >= XAPIC_DEST_CPUS_SHIFT);
65 id = my_cluster | (1UL << count);
66 apic_write(APIC_DFR, APIC_DFR_VALUE);
67 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
68 val |= SET_APIC_LOGICAL_ID(id);
69 apic_write(APIC_LDR, val);
70}
71
72static inline int multi_timer_check(int apic, int irq)
73{
74 return 0;
75}
76
77static inline int apic_id_registered(void)
78{
79 return 1;
80}
81
82static inline void setup_apic_routing(void)
83{
84 printk("Enabling APIC mode: Summit. Using %d I/O APICs\n",
85 nr_ioapics);
86}
87
88static inline int apicid_to_node(int logical_apicid)
89{
90#ifdef CONFIG_SMP
91 return apicid_2_node[hard_smp_processor_id()];
92#else
93 return 0;
94#endif
95}
96
97/* Mapping from cpu number to logical apicid */
98static inline int cpu_to_logical_apicid(int cpu)
99{
100#ifdef CONFIG_SMP
101 if (cpu >= nr_cpu_ids)
102 return BAD_APICID;
103 return (int)cpu_2_logical_apicid[cpu];
104#else
105 return logical_smp_processor_id();
106#endif
107}
108
109static inline int cpu_present_to_apicid(int mps_cpu)
110{
111 if (mps_cpu < nr_cpu_ids)
112 return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
113 else
114 return BAD_APICID;
115}
116
117static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_id_map)
118{
119 /* For clustered we don't have a good way to do this yet - hack */
120 return physids_promote(0x0F);
121}
122
123static inline physid_mask_t apicid_to_cpu_present(int apicid)
124{
125 return physid_mask_of_physid(0);
126}
127
128static inline void setup_portio_remap(void)
129{
130}
131
132static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
133{
134 return 1;
135}
136
137static inline void enable_apic_mode(void)
138{
139}
140
141static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask)
142{
143 int num_bits_set;
144 int cpus_found = 0;
145 int cpu;
146 int apicid;
147
148 num_bits_set = cpus_weight(*cpumask);
149 /* Return id to all */
150 if (num_bits_set >= nr_cpu_ids)
151 return (int) 0xFF;
152 /*
153 * The cpus in the mask must all be on the apic cluster. If are not
154 * on the same apicid cluster return default value of TARGET_CPUS.
155 */
156 cpu = first_cpu(*cpumask);
157 apicid = cpu_to_logical_apicid(cpu);
158 while (cpus_found < num_bits_set) {
159 if (cpu_isset(cpu, *cpumask)) {
160 int new_apicid = cpu_to_logical_apicid(cpu);
161 if (apicid_cluster(apicid) !=
162 apicid_cluster(new_apicid)){
163 printk ("%s: Not a valid mask!\n", __func__);
164 return 0xFF;
165 }
166 apicid = apicid | new_apicid;
167 cpus_found++;
168 }
169 cpu++;
170 }
171 return apicid;
172}
173
174static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *inmask,
175 const struct cpumask *andmask)
176{
177 int apicid = cpu_to_logical_apicid(0);
178 cpumask_var_t cpumask;
179
180 if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC))
181 return apicid;
182
183 cpumask_and(cpumask, inmask, andmask);
184 cpumask_and(cpumask, cpumask, cpu_online_mask);
185 apicid = cpu_mask_to_apicid(cpumask);
186
187 free_cpumask_var(cpumask);
188 return apicid;
189}
190
191/* cpuid returns the value latched in the HW at reset, not the APIC ID
192 * register's value. For any box whose BIOS changes APIC IDs, like
193 * clustered APIC systems, we must use hard_smp_processor_id.
194 *
195 * See Intel's IA-32 SW Dev's Manual Vol2 under CPUID.
196 */
197static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
198{
199 return hard_smp_processor_id() >> index_msb;
200}
201
202#endif /* __ASM_SUMMIT_APIC_H */
arch/x86/include/asm/summit/apicdef.h+0−13
@@ -1,13 +0,0 @@
1#ifndef __ASM_SUMMIT_APICDEF_H
2#define __ASM_SUMMIT_APICDEF_H
3
4#define APIC_ID_MASK (0xFF<<24)
5
6static inline unsigned get_apic_id(unsigned long x)
7{
8 return (x>>24)&0xFF;
9}
10
11#define GET_APIC_ID(x) get_apic_id(x)
12
13#endif
arch/x86/include/asm/summit/ipi.h+0−26
@@ -1,26 +0,0 @@
1#ifndef __ASM_SUMMIT_IPI_H
2#define __ASM_SUMMIT_IPI_H
3
4void send_IPI_mask_sequence(const cpumask_t *mask, int vector);
5void send_IPI_mask_allbutself(const cpumask_t *mask, int vector);
6
7static inline void send_IPI_mask(const cpumask_t *mask, int vector)
8{
9 send_IPI_mask_sequence(mask, vector);
10}
11
12static inline void send_IPI_allbutself(int vector)
13{
14 cpumask_t mask = cpu_online_map;
15 cpu_clear(smp_processor_id(), mask);
16
17 if (!cpus_empty(mask))
18 send_IPI_mask(&mask, vector);
19}
20
21static inline void send_IPI_all(int vector)
22{
23 send_IPI_mask(&cpu_online_map, vector);
24}
25
26#endif /* __ASM_SUMMIT_IPI_H */
arch/x86/include/asm/summit/mpparse.h+0−109
@@ -1,109 +0,0 @@
1#ifndef __ASM_SUMMIT_MPPARSE_H
2#define __ASM_SUMMIT_MPPARSE_H
3
4#include <asm/tsc.h>
5
6extern int use_cyclone;
7
8#ifdef CONFIG_X86_SUMMIT_NUMA
9extern void setup_summit(void);
10#else
11#define setup_summit() {}
12#endif
13
14static inline int mps_oem_check(struct mpc_table *mpc, char *oem,
15 char *productid)
16{
17 if (!strncmp(oem, "IBM ENSW", 8) &&
18 (!strncmp(productid, "VIGIL SMP", 9)
19 || !strncmp(productid, "EXA", 3)
20 || !strncmp(productid, "RUTHLESS SMP", 12))){
21 mark_tsc_unstable("Summit based system");
22 use_cyclone = 1; /*enable cyclone-timer*/
23 setup_summit();
24 return 1;
25 }
26 return 0;
27}
28
29/* Hook from generic ACPI tables.c */
30static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id)
31{
32 if (!strncmp(oem_id, "IBM", 3) &&
33 (!strncmp(oem_table_id, "SERVIGIL", 8)
34 || !strncmp(oem_table_id, "EXA", 3))){
35 mark_tsc_unstable("Summit based system");
36 use_cyclone = 1; /*enable cyclone-timer*/
37 setup_summit();
38 return 1;
39 }
40 return 0;
41}
42
43struct rio_table_hdr {
44 unsigned char version; /* Version number of this data structure */
45 /* Version 3 adds chassis_num & WP_index */
46 unsigned char num_scal_dev; /* # of Scalability devices (Twisters for Vigil) */
47 unsigned char num_rio_dev; /* # of RIO I/O devices (Cyclones and Winnipegs) */
48} __attribute__((packed));
49
50struct scal_detail {
51 unsigned char node_id; /* Scalability Node ID */
52 unsigned long CBAR; /* Address of 1MB register space */
53 unsigned char port0node; /* Node ID port connected to: 0xFF=None */
54 unsigned char port0port; /* Port num port connected to: 0,1,2, or 0xFF=None */
55 unsigned char port1node; /* Node ID port connected to: 0xFF = None */
56 unsigned char port1port; /* Port num port connected to: 0,1,2, or 0xFF=None */
57 unsigned char port2node; /* Node ID port connected to: 0xFF = None */
58 unsigned char port2port; /* Port num port connected to: 0,1,2, or 0xFF=None */
59 unsigned char chassis_num; /* 1 based Chassis number (1 = boot node) */
60} __attribute__((packed));
61
62struct rio_detail {
63 unsigned char node_id; /* RIO Node ID */
64 unsigned long BBAR; /* Address of 1MB register space */
65 unsigned char type; /* Type of device */
66 unsigned char owner_id; /* For WPEG: Node ID of Cyclone that owns this WPEG*/
67 /* For CYC: Node ID of Twister that owns this CYC */
68 unsigned char port0node; /* Node ID port connected to: 0xFF=None */
69 unsigned char port0port; /* Port num port connected to: 0,1,2, or 0xFF=None */
70 unsigned char port1node; /* Node ID port connected to: 0xFF=None */
71 unsigned char port1port; /* Port num port connected to: 0,1,2, or 0xFF=None */
72 unsigned char first_slot; /* For WPEG: Lowest slot number below this WPEG */
73 /* For CYC: 0 */
74 unsigned char status; /* For WPEG: Bit 0 = 1 : the XAPIC is used */
75 /* = 0 : the XAPIC is not used, ie:*/
76 /* ints fwded to another XAPIC */
77 /* Bits1:7 Reserved */
78 /* For CYC: Bits0:7 Reserved */
79 unsigned char WP_index; /* For WPEG: WPEG instance index - lower ones have */
80 /* lower slot numbers/PCI bus numbers */
81 /* For CYC: No meaning */
82 unsigned char chassis_num; /* 1 based Chassis number */
83 /* For LookOut WPEGs this field indicates the */
84 /* Expansion Chassis #, enumerated from Boot */
85 /* Node WPEG external port, then Boot Node CYC */
86 /* external port, then Next Vigil chassis WPEG */
87 /* external port, etc. */
88 /* Shared Lookouts have only 1 chassis number (the */
89 /* first one assigned) */
90} __attribute__((packed));
91
92
93typedef enum {
94 CompatTwister = 0, /* Compatibility Twister */
95 AltTwister = 1, /* Alternate Twister of internal 8-way */
96 CompatCyclone = 2, /* Compatibility Cyclone */
97 AltCyclone = 3, /* Alternate Cyclone of internal 8-way */
98 CompatWPEG = 4, /* Compatibility WPEG */
99 AltWPEG = 5, /* Second Planar WPEG */
100 LookOutAWPEG = 6, /* LookOut WPEG */
101 LookOutBWPEG = 7, /* LookOut WPEG */
102} node_type;
103
104static inline int is_WPEG(struct rio_detail *rio){
105 return (rio->type == CompatWPEG || rio->type == AltWPEG ||
106 rio->type == LookOutAWPEG || rio->type == LookOutBWPEG);
107}
108
109#endif /* __ASM_SUMMIT_MPPARSE_H */
arch/x86/include/asm/syscalls.h+11−11
@@ -29,21 +29,21 @@ asmlinkage int sys_get_thread_area(struct user_desc __user *); · 28 unmodified lines
29/* X86_32 only */29/* X86_32 only */
30#ifdef CONFIG_X86_3230#ifdef CONFIG_X86_32
31/* kernel/process_32.c */31/* kernel/process_32.c */
32asmlinkage int sys_fork(struct pt_regs);32int sys_fork(struct pt_regs *);
33asmlinkage int sys_clone(struct pt_regs);33int sys_clone(struct pt_regs *);
34asmlinkage int sys_vfork(struct pt_regs);34int sys_vfork(struct pt_regs *);
35asmlinkage int sys_execve(struct pt_regs);35int sys_execve(struct pt_regs *);
36 36
37/* kernel/signal_32.c */37/* kernel/signal_32.c */
38asmlinkage int sys_sigsuspend(int, int, old_sigset_t);38asmlinkage int sys_sigsuspend(int, int, old_sigset_t);
39asmlinkage int sys_sigaction(int, const struct old_sigaction __user *,39asmlinkage int sys_sigaction(int, const struct old_sigaction __user *,
40 struct old_sigaction __user *);40 struct old_sigaction __user *);
41asmlinkage int sys_sigaltstack(unsigned long);41int sys_sigaltstack(struct pt_regs *);
42asmlinkage unsigned long sys_sigreturn(unsigned long);42unsigned long sys_sigreturn(struct pt_regs *);
43asmlinkage int sys_rt_sigreturn(unsigned long);43long sys_rt_sigreturn(struct pt_regs *);
44 44
45/* kernel/ioport.c */45/* kernel/ioport.c */
46asmlinkage long sys_iopl(unsigned long);46long sys_iopl(struct pt_regs *);
47 47
48/* kernel/sys_i386_32.c */48/* kernel/sys_i386_32.c */
49asmlinkage long sys_mmap2(unsigned long, unsigned long, unsigned long,49asmlinkage long sys_mmap2(unsigned long, unsigned long, unsigned long,
@@ -59,8 +59,8 @@ struct oldold_utsname; · 9 unmodified lines
59asmlinkage int sys_olduname(struct oldold_utsname __user *);59asmlinkage int sys_olduname(struct oldold_utsname __user *);
60 60
61/* kernel/vm86_32.c */61/* kernel/vm86_32.c */
62asmlinkage int sys_vm86old(struct pt_regs);62int sys_vm86old(struct pt_regs *);
63asmlinkage int sys_vm86(struct pt_regs);63int sys_vm86(struct pt_regs *);
64 64
65#else /* CONFIG_X86_32 */65#else /* CONFIG_X86_32 */
66 66
@@ -82,7 +82,7 @@ asmlinkage long sys_iopl(unsigned int, struct pt_regs *); · 15 unmodified lines
82/* kernel/signal_64.c */82/* kernel/signal_64.c */
83asmlinkage long sys_sigaltstack(const stack_t __user *, stack_t __user *,83asmlinkage long sys_sigaltstack(const stack_t __user *, stack_t __user *,
84 struct pt_regs *);84 struct pt_regs *);
85asmlinkage long sys_rt_sigreturn(struct pt_regs *);85long sys_rt_sigreturn(struct pt_regs *);
86 86
87/* kernel/sys_x86_64.c */87/* kernel/sys_x86_64.c */
88asmlinkage long sys_mmap(unsigned long, unsigned long, unsigned long,88asmlinkage long sys_mmap(unsigned long, unsigned long, unsigned long,
arch/x86/include/asm/system.h+64−6
@@ -20,9 +20,26 @@ · 19 unmodified lines
20struct task_struct; /* one of the stranger aspects of C forward declarations */20struct task_struct; /* one of the stranger aspects of C forward declarations */
21struct task_struct *__switch_to(struct task_struct *prev,21struct task_struct *__switch_to(struct task_struct *prev,
22 struct task_struct *next);22 struct task_struct *next);
23struct tss_struct;
24void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
25 struct tss_struct *tss);
23 26
24#ifdef CONFIG_X86_3227#ifdef CONFIG_X86_32
25 28
29#ifdef CONFIG_CC_STACKPROTECTOR
30#define __switch_canary \
31 "movl %P[task_canary](%[next]), %%ebx\n\t" \
32 "movl %%ebx, "__percpu_arg([stack_canary])"\n\t"
33#define __switch_canary_oparam \
34 , [stack_canary] "=m" (per_cpu_var(stack_canary))
35#define __switch_canary_iparam \
36 , [task_canary] "i" (offsetof(struct task_struct, stack_canary))
37#else /* CC_STACKPROTECTOR */
38#define __switch_canary
39#define __switch_canary_oparam
40#define __switch_canary_iparam
41#endif /* CC_STACKPROTECTOR */
42
26/*43/*
27 * Saving eflags is important. It switches not only IOPL between tasks,44 * Saving eflags is important. It switches not only IOPL between tasks,
28 * it also protects other tasks from NT leaking through sysenter etc.45 * it also protects other tasks from NT leaking through sysenter etc.
@@ -44,6 +61,7 @@ do { \ · 15 unmodified lines
44 "movl %[next_sp],%%esp\n\t" /* restore ESP */ \61 "movl %[next_sp],%%esp\n\t" /* restore ESP */ \
45 "movl $1f,%[prev_ip]\n\t" /* save EIP */ \62 "movl $1f,%[prev_ip]\n\t" /* save EIP */ \
46 "pushl %[next_ip]\n\t" /* restore EIP */ \63 "pushl %[next_ip]\n\t" /* restore EIP */ \
64 __switch_canary \
47 "jmp __switch_to\n" /* regparm call */ \65 "jmp __switch_to\n" /* regparm call */ \
48 "1:\t" \66 "1:\t" \
49 "popl %%ebp\n\t" /* restore EBP */ \67 "popl %%ebp\n\t" /* restore EBP */ \
@@ -58,6 +76,8 @@ do { \ · 8 unmodified lines
58 "=b" (ebx), "=c" (ecx), "=d" (edx), \76 "=b" (ebx), "=c" (ecx), "=d" (edx), \
59 "=S" (esi), "=D" (edi) \77 "=S" (esi), "=D" (edi) \
60 \78 \
79 __switch_canary_oparam \
80 \
61 /* input parameters: */ \81 /* input parameters: */ \
62 : [next_sp] "m" (next->thread.sp), \82 : [next_sp] "m" (next->thread.sp), \
63 [next_ip] "m" (next->thread.ip), \83 [next_ip] "m" (next->thread.ip), \
@@ -66,6 +86,8 @@ do { \ · 2 unmodified lines
66 [prev] "a" (prev), \86 [prev] "a" (prev), \
67 [next] "d" (next) \87 [next] "d" (next) \
68 \88 \
89 __switch_canary_iparam \
90 \
69 : /* reloaded segment registers */ \91 : /* reloaded segment registers */ \
70 "memory"); \92 "memory"); \
71} while (0)93} while (0)
@@ -86,27 +108,44 @@ do { \ · 14 unmodified lines
86 , "rcx", "rbx", "rdx", "r8", "r9", "r10", "r11", \108 , "rcx", "rbx", "rdx", "r8", "r9", "r10", "r11", \
87 "r12", "r13", "r14", "r15"109 "r12", "r13", "r14", "r15"
88 110
111#ifdef CONFIG_CC_STACKPROTECTOR
112#define __switch_canary \
113 "movq %P[task_canary](%%rsi),%%r8\n\t" \
114 "movq %%r8,"__percpu_arg([gs_canary])"\n\t"
115#define __switch_canary_oparam \
116 , [gs_canary] "=m" (per_cpu_var(irq_stack_union.stack_canary))
117#define __switch_canary_iparam \
118 , [task_canary] "i" (offsetof(struct task_struct, stack_canary))
119#else /* CC_STACKPROTECTOR */
120#define __switch_canary
121#define __switch_canary_oparam
122#define __switch_canary_iparam
123#endif /* CC_STACKPROTECTOR */
124
89/* Save restore flags to clear handle leaking NT */125/* Save restore flags to clear handle leaking NT */
90#define switch_to(prev, next, last) \126#define switch_to(prev, next, last) \
91 asm volatile(SAVE_CONTEXT \127 asm volatile(SAVE_CONTEXT \
92 "movq %%rsp,%P[threadrsp](%[prev])\n\t" /* save RSP */ \128 "movq %%rsp,%P[threadrsp](%[prev])\n\t" /* save RSP */ \
93 "movq %P[threadrsp](%[next]),%%rsp\n\t" /* restore RSP */ \129 "movq %P[threadrsp](%[next]),%%rsp\n\t" /* restore RSP */ \
94 "call __switch_to\n\t" \130 "call __switch_to\n\t" \
95 ".globl thread_return\n" \131 ".globl thread_return\n" \
96 "thread_return:\n\t" \132 "thread_return:\n\t" \
97 "movq %%gs:%P[pda_pcurrent],%%rsi\n\t" \133 "movq "__percpu_arg([current_task])",%%rsi\n\t" \
134 __switch_canary \
98 "movq %P[thread_info](%%rsi),%%r8\n\t" \135 "movq %P[thread_info](%%rsi),%%r8\n\t" \
99 LOCK_PREFIX "btr %[tif_fork],%P[ti_flags](%%r8)\n\t" \
100 "movq %%rax,%%rdi\n\t" \136 "movq %%rax,%%rdi\n\t" \
101 "jc ret_from_fork\n\t" \137 "testl %[_tif_fork],%P[ti_flags](%%r8)\n\t" \
138 "jnz ret_from_fork\n\t" \
102 RESTORE_CONTEXT \139 RESTORE_CONTEXT \
103 : "=a" (last) \140 : "=a" (last) \
141 __switch_canary_oparam \
104 : [next] "S" (next), [prev] "D" (prev), \142 : [next] "S" (next), [prev] "D" (prev), \
105 [threadrsp] "i" (offsetof(struct task_struct, thread.sp)), \143 [threadrsp] "i" (offsetof(struct task_struct, thread.sp)), \
106 [ti_flags] "i" (offsetof(struct thread_info, flags)), \144 [ti_flags] "i" (offsetof(struct thread_info, flags)), \
107 [tif_fork] "i" (TIF_FORK), \145 [_tif_fork] "i" (_TIF_FORK), \
108 [thread_info] "i" (offsetof(struct task_struct, stack)), \146 [thread_info] "i" (offsetof(struct task_struct, stack)), \
109 [pda_pcurrent] "i" (offsetof(struct x8664_pda, pcurrent)) \147 [current_task] "m" (per_cpu_var(current_task)) \
148 __switch_canary_iparam \
110 : "memory", "cc" __EXTRA_CLOBBER)149 : "memory", "cc" __EXTRA_CLOBBER)
111#endif150#endif
112 151
@@ -165,6 +204,25 @@ extern void native_load_gs_index(unsigned); · 52 unmodified lines
165#define savesegment(seg, value) \204#define savesegment(seg, value) \
166 asm("mov %%" #seg ",%0":"=r" (value) : : "memory")205 asm("mov %%" #seg ",%0":"=r" (value) : : "memory")
167 206
207/*
208 * x86_32 user gs accessors.
209 */
210#ifdef CONFIG_X86_32
211#ifdef CONFIG_X86_32_LAZY_GS
212#define get_user_gs(regs) (u16)({unsigned long v; savesegment(gs, v); v;})
213#define set_user_gs(regs, v) loadsegment(gs, (unsigned long)(v))
214#define task_user_gs(tsk) ((tsk)->thread.gs)
215#define lazy_save_gs(v) savesegment(gs, (v))
216#define lazy_load_gs(v) loadsegment(gs, (v))
217#else /* X86_32_LAZY_GS */
218#define get_user_gs(regs) (u16)((regs)->gs)
219#define set_user_gs(regs, v) do { (regs)->gs = (v); } while (0)
220#define task_user_gs(tsk) (task_pt_regs(tsk)->gs)
221#define lazy_save_gs(v) do { } while (0)
222#define lazy_load_gs(v) do { } while (0)
223#endif /* X86_32_LAZY_GS */
224#endif /* X86_32 */
225
168static inline unsigned long get_limit(unsigned long segment)226static inline unsigned long get_limit(unsigned long segment)
169{227{
170 unsigned long __limit;228 unsigned long __limit;
arch/x86/include/asm/thread_info.h+9−12
@@ -40,6 +40,7 @@ struct thread_info { · 39 unmodified lines
40 */40 */
41 __u8 supervisor_stack[0];41 __u8 supervisor_stack[0];
42#endif42#endif
43 int uaccess_err;
43};44};
44 45
45#define INIT_THREAD_INFO(tsk) \46#define INIT_THREAD_INFO(tsk) \
@@ -194,25 +195,21 @@ static inline struct thread_info *current_thread_info(void) · 148 unmodified lines
194 195
195#else /* X86_32 */196#else /* X86_32 */
196 197
197#include <asm/pda.h>198#include <asm/percpu.h>
199#define KERNEL_STACK_OFFSET (5*8)
198 200
199/*201/*
200 * macros/functions for gaining access to the thread information structure202 * macros/functions for gaining access to the thread information structure
201 * preempt_count needs to be 1 initially, until the scheduler is functional.203 * preempt_count needs to be 1 initially, until the scheduler is functional.
202 */204 */
203#ifndef __ASSEMBLY__205#ifndef __ASSEMBLY__
204static inline struct thread_info *current_thread_info(void)206DECLARE_PER_CPU(unsigned long, kernel_stack);
205{
206 struct thread_info *ti;
207 ti = (void *)(read_pda(kernelstack) + PDA_STACKOFFSET - THREAD_SIZE);
208 return ti;
209}
210 207
211/* do not use in interrupt context */208static inline struct thread_info *current_thread_info(void)
212static inline struct thread_info *stack_thread_info(void)
213{209{
214 struct thread_info *ti;210 struct thread_info *ti;
215 asm("andq %%rsp,%0; " : "=r" (ti) : "0" (~(THREAD_SIZE - 1)));211 ti = (void *)(percpu_read(kernel_stack) +
212 KERNEL_STACK_OFFSET - THREAD_SIZE);
216 return ti;213 return ti;
217}214}
218 215
@@ -220,8 +217,8 @@ static inline struct thread_info *stack_thread_info(void) · 1 unmodified line
220 217
221/* how to get the thread information struct from ASM */218/* how to get the thread information struct from ASM */
222#define GET_THREAD_INFO(reg) \219#define GET_THREAD_INFO(reg) \
223 movq %gs:pda_kernelstack,reg ; \220 movq PER_CPU_VAR(kernel_stack),reg ; \
224 subq $(THREAD_SIZE-PDA_STACKOFFSET),reg221 subq $(THREAD_SIZE-KERNEL_STACK_OFFSET),reg
225 222
226#endif223#endif
227 224
arch/x86/include/asm/timer.h+3−1
@@ -3,6 +3,7 @@ · 2 unmodified lines
3#include <linux/init.h>3#include <linux/init.h>
4#include <linux/pm.h>4#include <linux/pm.h>
5#include <linux/percpu.h>5#include <linux/percpu.h>
6#include <linux/interrupt.h>
6 7
7#define TICK_SIZE (tick_nsec / 1000)8#define TICK_SIZE (tick_nsec / 1000)
8 9
@@ -11,8 +12,9 @@ unsigned long native_calibrate_tsc(void); · 2 unmodified lines
11 12
12#ifdef CONFIG_X86_3213#ifdef CONFIG_X86_32
13extern int timer_ack;14extern int timer_ack;
14#endif
15extern int recalibrate_cpu_khz(void);15extern int recalibrate_cpu_khz(void);
16extern irqreturn_t timer_interrupt(int irq, void *dev_id);
17#endif /* CONFIG_X86_32 */
16 18
17extern int no_timer_check;19extern int no_timer_check;
18 20
arch/x86/include/asm/tlbflush.h+8−9
@@ -113,7 +113,7 @@ static inline void flush_tlb_range(struct vm_area_struct *vma, · 112 unmodified lines
113 __flush_tlb();113 __flush_tlb();
114}114}
115 115
116static inline void native_flush_tlb_others(const cpumask_t *cpumask,116static inline void native_flush_tlb_others(const struct cpumask *cpumask,
117 struct mm_struct *mm,117 struct mm_struct *mm,
118 unsigned long va)118 unsigned long va)
119{119{
@@ -142,31 +142,28 @@ static inline void flush_tlb_range(struct vm_area_struct *vma, · 22 unmodified lines
142 flush_tlb_mm(vma->vm_mm);142 flush_tlb_mm(vma->vm_mm);
143}143}
144 144
145void native_flush_tlb_others(const cpumask_t *cpumask, struct mm_struct *mm,145void native_flush_tlb_others(const struct cpumask *cpumask,
146 unsigned long va);146 struct mm_struct *mm, unsigned long va);
147 147
148#define TLBSTATE_OK 1148#define TLBSTATE_OK 1
149#define TLBSTATE_LAZY 2149#define TLBSTATE_LAZY 2
150 150
151#ifdef CONFIG_X86_32
152struct tlb_state {151struct tlb_state {
153 struct mm_struct *active_mm;152 struct mm_struct *active_mm;
154 int state;153 int state;
155 char __cacheline_padding[L1_CACHE_BYTES-8];
156};154};
157DECLARE_PER_CPU(struct tlb_state, cpu_tlbstate);155DECLARE_PER_CPU(struct tlb_state, cpu_tlbstate);
158 156
159void reset_lazy_tlbstate(void);
160#else
161static inline void reset_lazy_tlbstate(void)157static inline void reset_lazy_tlbstate(void)
162{158{
159 percpu_write(cpu_tlbstate.state, 0);
160 percpu_write(cpu_tlbstate.active_mm, &init_mm);
163}161}
164#endif
165 162
166#endif /* SMP */163#endif /* SMP */
167 164
168#ifndef CONFIG_PARAVIRT165#ifndef CONFIG_PARAVIRT
169#define flush_tlb_others(mask, mm, va) native_flush_tlb_others(&mask, mm, va)166#define flush_tlb_others(mask, mm, va) native_flush_tlb_others(mask, mm, va)
170#endif167#endif
171 168
172static inline void flush_tlb_kernel_range(unsigned long start,169static inline void flush_tlb_kernel_range(unsigned long start,
@@ -175,4 +172,6 @@ static inline void flush_tlb_kernel_range(unsigned long start, · 2 unmodified lines
175 flush_tlb_all();172 flush_tlb_all();
176}173}
177 174
175extern void zap_low_mappings(void);
176
178#endif /* _ASM_X86_TLBFLUSH_H */177#endif /* _ASM_X86_TLBFLUSH_H */
arch/x86/include/asm/topology.h+23−8
@@ -74,6 +74,8 @@ static inline const struct cpumask *cpumask_of_node(int node) · 73 unmodified lines
74 return &node_to_cpumask_map[node];74 return &node_to_cpumask_map[node];
75}75}
76 76
77static inline void setup_node_to_cpumask_map(void) { }
78
77#else /* CONFIG_X86_64 */79#else /* CONFIG_X86_64 */
78 80
79/* Mappings between node number and cpus on that node. */81/* Mappings between node number and cpus on that node. */
@@ -83,7 +85,8 @@ extern cpumask_t *node_to_cpumask_map; · 3 unmodified lines
83DECLARE_EARLY_PER_CPU(int, x86_cpu_to_node_map);85DECLARE_EARLY_PER_CPU(int, x86_cpu_to_node_map);
84 86
85/* Returns the number of the current Node. */87/* Returns the number of the current Node. */
86#define numa_node_id() read_pda(nodenumber)88DECLARE_PER_CPU(int, node_number);
89#define numa_node_id() percpu_read(node_number)
87 90
88#ifdef CONFIG_DEBUG_PER_CPU_MAPS91#ifdef CONFIG_DEBUG_PER_CPU_MAPS
89extern int cpu_to_node(int cpu);92extern int cpu_to_node(int cpu);
@@ -102,10 +105,7 @@ static inline int cpu_to_node(int cpu) · 12 unmodified lines
102/* Same function but used if called before per_cpu areas are setup */105/* Same function but used if called before per_cpu areas are setup */
103static inline int early_cpu_to_node(int cpu)106static inline int early_cpu_to_node(int cpu)
104{107{
105 if (early_per_cpu_ptr(x86_cpu_to_node_map))108 return early_per_cpu(x86_cpu_to_node_map, cpu);
106 return early_per_cpu_ptr(x86_cpu_to_node_map)[cpu];
107
108 return per_cpu(x86_cpu_to_node_map, cpu);
109}109}
110 110
111/* Returns a pointer to the cpumask of CPUs on Node 'node'. */111/* Returns a pointer to the cpumask of CPUs on Node 'node'. */
@@ -122,6 +122,8 @@ static inline cpumask_t node_to_cpumask(int node) · 10 unmodified lines
122 122
123#endif /* !CONFIG_DEBUG_PER_CPU_MAPS */123#endif /* !CONFIG_DEBUG_PER_CPU_MAPS */
124 124
125extern void setup_node_to_cpumask_map(void);
126
125/*127/*
126 * Replace default node_to_cpumask_ptr with optimized version128 * Replace default node_to_cpumask_ptr with optimized version
127 * Deprecated: use "const struct cpumask *mask = cpumask_of_node(node)"129 * Deprecated: use "const struct cpumask *mask = cpumask_of_node(node)"
@@ -192,9 +194,20 @@ extern int __node_distance(int, int); · 64 unmodified lines
192 194
193#else /* !CONFIG_NUMA */195#else /* !CONFIG_NUMA */
194 196
195#define numa_node_id() 0197static inline int numa_node_id(void)
196#define cpu_to_node(cpu) 0198{
197#define early_cpu_to_node(cpu) 0199 return 0;
200}
201
202static inline int cpu_to_node(int cpu)
203{
204 return 0;
205}
206
207static inline int early_cpu_to_node(int cpu)
208{
209 return 0;
210}
198 211
199static inline const cpumask_t *cpumask_of_node(int node)212static inline const cpumask_t *cpumask_of_node(int node)
200{213{
@@ -209,6 +222,8 @@ static inline int node_to_first_cpu(int node) · 8 unmodified lines
209 return first_cpu(cpu_online_map);222 return first_cpu(cpu_online_map);
210}223}
211 224
225static inline void setup_node_to_cpumask_map(void) { }
226
212/*227/*
213 * Replace default node_to_cpumask_ptr with optimized version228 * Replace default node_to_cpumask_ptr with optimized version
214 * Deprecated: use "const struct cpumask *mask = cpumask_of_node(node)"229 * Deprecated: use "const struct cpumask *mask = cpumask_of_node(node)"
arch/x86/include/asm/trampoline.h+1−0
@@ -13,6 +13,7 @@ extern unsigned char *trampoline_base; · 12 unmodified lines
13 13
14extern unsigned long init_rsp;14extern unsigned long init_rsp;
15extern unsigned long initial_code;15extern unsigned long initial_code;
16extern unsigned long initial_gs;
16 17
17#define TRAMPOLINE_SIZE roundup(trampoline_end - trampoline_data, PAGE_SIZE)18#define TRAMPOLINE_SIZE roundup(trampoline_end - trampoline_data, PAGE_SIZE)
18#define TRAMPOLINE_BASE 0x600019#define TRAMPOLINE_BASE 0x6000
arch/x86/include/asm/traps.h+1−1
@@ -41,7 +41,7 @@ dotraplinkage void do_int3(struct pt_regs *, long); · 40 unmodified lines
41dotraplinkage void do_overflow(struct pt_regs *, long);41dotraplinkage void do_overflow(struct pt_regs *, long);
42dotraplinkage void do_bounds(struct pt_regs *, long);42dotraplinkage void do_bounds(struct pt_regs *, long);
43dotraplinkage void do_invalid_op(struct pt_regs *, long);43dotraplinkage void do_invalid_op(struct pt_regs *, long);
44dotraplinkage void do_device_not_available(struct pt_regs);44dotraplinkage void do_device_not_available(struct pt_regs *, long);
45dotraplinkage void do_coprocessor_segment_overrun(struct pt_regs *, long);45dotraplinkage void do_coprocessor_segment_overrun(struct pt_regs *, long);
46dotraplinkage void do_invalid_TSS(struct pt_regs *, long);46dotraplinkage void do_invalid_TSS(struct pt_regs *, long);
47dotraplinkage void do_segment_not_present(struct pt_regs *, long);47dotraplinkage void do_segment_not_present(struct pt_regs *, long);
arch/x86/include/asm/uaccess.h+130−8
@@ -121,7 +121,7 @@ extern int __get_user_bad(void); · 120 unmodified lines
121 121
122#define __get_user_x(size, ret, x, ptr) \122#define __get_user_x(size, ret, x, ptr) \
123 asm volatile("call __get_user_" #size \123 asm volatile("call __get_user_" #size \
124 : "=a" (ret),"=d" (x) \124 : "=a" (ret), "=d" (x) \
125 : "0" (ptr)) \125 : "0" (ptr)) \
126 126
127/* Careful: we have to cast the result to the type of the pointer127/* Careful: we have to cast the result to the type of the pointer
@@ -181,12 +181,12 @@ extern int __get_user_bad(void); · 53 unmodified lines
181 181
182#define __put_user_x(size, x, ptr, __ret_pu) \182#define __put_user_x(size, x, ptr, __ret_pu) \
183 asm volatile("call __put_user_" #size : "=a" (__ret_pu) \183 asm volatile("call __put_user_" #size : "=a" (__ret_pu) \
184 :"0" ((typeof(*(ptr)))(x)), "c" (ptr) : "ebx")184 : "0" ((typeof(*(ptr)))(x)), "c" (ptr) : "ebx")
185 185
186 186
187 187
188#ifdef CONFIG_X86_32188#ifdef CONFIG_X86_32
189#define __put_user_u64(x, addr, err) \189#define __put_user_asm_u64(x, addr, err, errret) \
190 asm volatile("1: movl %%eax,0(%2)\n" \190 asm volatile("1: movl %%eax,0(%2)\n" \
191 "2: movl %%edx,4(%2)\n" \191 "2: movl %%edx,4(%2)\n" \
192 "3:\n" \192 "3:\n" \
@@ -197,14 +197,24 @@ extern int __get_user_bad(void); · 4 unmodified lines
197 _ASM_EXTABLE(1b, 4b) \197 _ASM_EXTABLE(1b, 4b) \
198 _ASM_EXTABLE(2b, 4b) \198 _ASM_EXTABLE(2b, 4b) \
199 : "=r" (err) \199 : "=r" (err) \
200 : "A" (x), "r" (addr), "i" (-EFAULT), "0" (err))200 : "A" (x), "r" (addr), "i" (errret), "0" (err))
201
202#define __put_user_asm_ex_u64(x, addr) \
203 asm volatile("1: movl %%eax,0(%1)\n" \
204 "2: movl %%edx,4(%1)\n" \
205 "3:\n" \
206 _ASM_EXTABLE(1b, 2b - 1b) \
207 _ASM_EXTABLE(2b, 3b - 2b) \
208 : : "A" (x), "r" (addr))
201 209
202#define __put_user_x8(x, ptr, __ret_pu) \210#define __put_user_x8(x, ptr, __ret_pu) \
203 asm volatile("call __put_user_8" : "=a" (__ret_pu) \211 asm volatile("call __put_user_8" : "=a" (__ret_pu) \
204 : "A" ((typeof(*(ptr)))(x)), "c" (ptr) : "ebx")212 : "A" ((typeof(*(ptr)))(x)), "c" (ptr) : "ebx")
205#else213#else
206#define __put_user_u64(x, ptr, retval) \214#define __put_user_asm_u64(x, ptr, retval, errret) \
207 __put_user_asm(x, ptr, retval, "q", "", "Zr", -EFAULT)215 __put_user_asm(x, ptr, retval, "q", "", "Zr", errret)
216#define __put_user_asm_ex_u64(x, addr) \
217 __put_user_asm_ex(x, addr, "q", "", "Zr")
208#define __put_user_x8(x, ptr, __ret_pu) __put_user_x(8, x, ptr, __ret_pu)218#define __put_user_x8(x, ptr, __ret_pu) __put_user_x(8, x, ptr, __ret_pu)
209#endif219#endif
210 220
@@ -276,10 +286,32 @@ do { \ · 65 unmodified lines
276 __put_user_asm(x, ptr, retval, "w", "w", "ir", errret); \286 __put_user_asm(x, ptr, retval, "w", "w", "ir", errret); \
277 break; \287 break; \
278 case 4: \288 case 4: \
279 __put_user_asm(x, ptr, retval, "l", "k", "ir", errret);\289 __put_user_asm(x, ptr, retval, "l", "k", "ir", errret); \
280 break; \290 break; \
281 case 8: \291 case 8: \
282 __put_user_u64((__typeof__(*ptr))(x), ptr, retval); \292 __put_user_asm_u64((__typeof__(*ptr))(x), ptr, retval, \
293 errret); \
294 break; \
295 default: \
296 __put_user_bad(); \
297 } \
298} while (0)
299
300#define __put_user_size_ex(x, ptr, size) \
301do { \
302 __chk_user_ptr(ptr); \
303 switch (size) { \
304 case 1: \
305 __put_user_asm_ex(x, ptr, "b", "b", "iq"); \
306 break; \
307 case 2: \
308 __put_user_asm_ex(x, ptr, "w", "w", "ir"); \
309 break; \
310 case 4: \
311 __put_user_asm_ex(x, ptr, "l", "k", "ir"); \
312 break; \
313 case 8: \
314 __put_user_asm_ex_u64((__typeof__(*ptr))(x), ptr); \
283 break; \315 break; \
284 default: \316 default: \
285 __put_user_bad(); \317 __put_user_bad(); \
@@ -311,9 +343,12 @@ do { \ · 25 unmodified lines
311 343
312#ifdef CONFIG_X86_32344#ifdef CONFIG_X86_32
313#define __get_user_asm_u64(x, ptr, retval, errret) (x) = __get_user_bad()345#define __get_user_asm_u64(x, ptr, retval, errret) (x) = __get_user_bad()
346#define __get_user_asm_ex_u64(x, ptr) (x) = __get_user_bad()
314#else347#else
315#define __get_user_asm_u64(x, ptr, retval, errret) \348#define __get_user_asm_u64(x, ptr, retval, errret) \
316 __get_user_asm(x, ptr, retval, "q", "", "=r", errret)349 __get_user_asm(x, ptr, retval, "q", "", "=r", errret)
350#define __get_user_asm_ex_u64(x, ptr) \
351 __get_user_asm_ex(x, ptr, "q", "", "=r")
317#endif352#endif
318 353
319#define __get_user_size(x, ptr, size, retval, errret) \354#define __get_user_size(x, ptr, size, retval, errret) \
@@ -350,6 +385,33 @@ do { \ · 30 unmodified lines
350 : "=r" (err), ltype(x) \385 : "=r" (err), ltype(x) \
351 : "m" (__m(addr)), "i" (errret), "0" (err))386 : "m" (__m(addr)), "i" (errret), "0" (err))
352 387
388#define __get_user_size_ex(x, ptr, size) \
389do { \
390 __chk_user_ptr(ptr); \
391 switch (size) { \
392 case 1: \
393 __get_user_asm_ex(x, ptr, "b", "b", "=q"); \
394 break; \
395 case 2: \
396 __get_user_asm_ex(x, ptr, "w", "w", "=r"); \
397 break; \
398 case 4: \
399 __get_user_asm_ex(x, ptr, "l", "k", "=r"); \
400 break; \
401 case 8: \
402 __get_user_asm_ex_u64(x, ptr); \
403 break; \
404 default: \
405 (x) = __get_user_bad(); \
406 } \
407} while (0)
408
409#define __get_user_asm_ex(x, addr, itype, rtype, ltype) \
410 asm volatile("1: mov"itype" %1,%"rtype"0\n" \
411 "2:\n" \
412 _ASM_EXTABLE(1b, 2b - 1b) \
413 : ltype(x) : "m" (__m(addr)))
414
353#define __put_user_nocheck(x, ptr, size) \415#define __put_user_nocheck(x, ptr, size) \
354({ \416({ \
355 int __pu_err; \417 int __pu_err; \
@@ -385,6 +447,26 @@ struct __large_struct { unsigned long buf[100]; }; · 29 unmodified lines
385 _ASM_EXTABLE(1b, 3b) \447 _ASM_EXTABLE(1b, 3b) \
386 : "=r"(err) \448 : "=r"(err) \
387 : ltype(x), "m" (__m(addr)), "i" (errret), "0" (err))449 : ltype(x), "m" (__m(addr)), "i" (errret), "0" (err))
450
451#define __put_user_asm_ex(x, addr, itype, rtype, ltype) \
452 asm volatile("1: mov"itype" %"rtype"0,%1\n" \
453 "2:\n" \
454 _ASM_EXTABLE(1b, 2b - 1b) \
455 : : ltype(x), "m" (__m(addr)))
456
457/*
458 * uaccess_try and catch
459 */
460#define uaccess_try do { \
461 int prev_err = current_thread_info()->uaccess_err; \
462 current_thread_info()->uaccess_err = 0; \
463 barrier();
464
465#define uaccess_catch(err) \
466 (err) |= current_thread_info()->uaccess_err; \
467 current_thread_info()->uaccess_err = prev_err; \
468} while (0)
469
388/**470/**
389 * __get_user: - Get a simple variable from user space, with less checking.471 * __get_user: - Get a simple variable from user space, with less checking.
390 * @x: Variable to store result.472 * @x: Variable to store result.
@@ -408,6 +490,7 @@ struct __large_struct { unsigned long buf[100]; }; · 17 unmodified lines
408 490
409#define __get_user(x, ptr) \491#define __get_user(x, ptr) \
410 __get_user_nocheck((x), (ptr), sizeof(*(ptr)))492 __get_user_nocheck((x), (ptr), sizeof(*(ptr)))
493
411/**494/**
412 * __put_user: - Write a simple value into user space, with less checking.495 * __put_user: - Write a simple value into user space, with less checking.
413 * @x: Value to copy to user space.496 * @x: Value to copy to user space.
@@ -434,6 +517,45 @@ struct __large_struct { unsigned long buf[100]; }; · 20 unmodified lines
434#define __get_user_unaligned __get_user517#define __get_user_unaligned __get_user
435#define __put_user_unaligned __put_user518#define __put_user_unaligned __put_user
436 519
520/*
521 * {get|put}_user_try and catch
522 *
523 * get_user_try {
524 * get_user_ex(...);
525 * } get_user_catch(err)
526 */
527#define get_user_try uaccess_try
528#define get_user_catch(err) uaccess_catch(err)
529
530#define get_user_ex(x, ptr) do { \
531 unsigned long __gue_val; \
532 __get_user_size_ex((__gue_val), (ptr), (sizeof(*(ptr)))); \
533 (x) = (__force __typeof__(*(ptr)))__gue_val; \
534} while (0)
535
536#ifdef CONFIG_X86_WP_WORKS_OK
537
538#define put_user_try uaccess_try
539#define put_user_catch(err) uaccess_catch(err)
540
541#define put_user_ex(x, ptr) \
542 __put_user_size_ex((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr)))
543
544#else /* !CONFIG_X86_WP_WORKS_OK */
545
546#define put_user_try do { \
547 int __uaccess_err = 0;
548
549#define put_user_catch(err) \
550 (err) |= __uaccess_err; \
551} while (0)
552
553#define put_user_ex(x, ptr) do { \
554 __uaccess_err |= __put_user(x, ptr); \
555} while (0)
556
557#endif /* CONFIG_X86_WP_WORKS_OK */
558
437/*559/*
438 * movsl can be slow when source and dest are not both 8-byte aligned560 * movsl can be slow when source and dest are not both 8-byte aligned
439 */561 */
arch/x86/include/asm/uaccess_64.h+5−5
@@ -188,16 +188,16 @@ __copy_to_user_inatomic(void __user *dst, const void *src, unsigned size) · 187 unmodified lines
188extern long __copy_user_nocache(void *dst, const void __user *src,188extern long __copy_user_nocache(void *dst, const void __user *src,
189 unsigned size, int zerorest);189 unsigned size, int zerorest);
190 190
191static inline int __copy_from_user_nocache(void *dst, const void __user *src,191static inline int
192 unsigned size)192__copy_from_user_nocache(void *dst, const void __user *src, unsigned size)
193{193{
194 might_sleep();194 might_sleep();
195 return __copy_user_nocache(dst, src, size, 1);195 return __copy_user_nocache(dst, src, size, 1);
196}196}
197 197
198static inline int __copy_from_user_inatomic_nocache(void *dst,198static inline int
199 const void __user *src,199__copy_from_user_inatomic_nocache(void *dst, const void __user *src,
200 unsigned size)200 unsigned size)
201{201{
202 return __copy_user_nocache(dst, src, size, 0);202 return __copy_user_nocache(dst, src, size, 0);
203}203}
arch/x86/include/asm/uv/uv.h+33−0
@@ -0,0 +1,33 @@
1#ifndef _ASM_X86_UV_UV_H
2#define _ASM_X86_UV_UV_H
3
4enum uv_system_type {UV_NONE, UV_LEGACY_APIC, UV_X2APIC, UV_NON_UNIQUE_APIC};
5
6struct cpumask;
7struct mm_struct;
8
9#ifdef CONFIG_X86_UV
10
11extern enum uv_system_type get_uv_system_type(void);
12extern int is_uv_system(void);
13extern void uv_cpu_init(void);
14extern void uv_system_init(void);
15extern const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
16 struct mm_struct *mm,
17 unsigned long va,
18 unsigned int cpu);
19
20#else /* X86_UV */
21
22static inline enum uv_system_type get_uv_system_type(void) { return UV_NONE; }
23static inline int is_uv_system(void) { return 0; }
24static inline void uv_cpu_init(void) { }
25static inline void uv_system_init(void) { }
26static inline const struct cpumask *
27uv_flush_tlb_others(const struct cpumask *cpumask, struct mm_struct *mm,
28 unsigned long va, unsigned int cpu)
29{ return cpumask; }
30
31#endif /* X86_UV */
32
33#endif /* _ASM_X86_UV_UV_H */
arch/x86/include/asm/uv/uv_bau.h+0−1
@@ -325,7 +325,6 @@ static inline void bau_cpubits_clear(struct bau_local_cpumask *dstp, int nbits) · 324 unmodified lines
325#define cpubit_isset(cpu, bau_local_cpumask) \325#define cpubit_isset(cpu, bau_local_cpumask) \
326 test_bit((cpu), (bau_local_cpumask).bits)326 test_bit((cpu), (bau_local_cpumask).bits)
327 327
328extern int uv_flush_tlb_others(cpumask_t *, struct mm_struct *, unsigned long);
329extern void uv_bau_message_intr1(void);328extern void uv_bau_message_intr1(void);
330extern void uv_bau_timeout_intr1(void);329extern void uv_bau_timeout_intr1(void);
331 330
arch/x86/include/asm/vic.h+0−61
@@ -1,61 +0,0 @@
1/* Copyright (C) 1999,2001
2 *
3 * Author: J.E.J.Bottomley@HansenPartnership.com
4 *
5 * Standard include definitions for the NCR Voyager Interrupt Controller */
6
7/* The eight CPI vectors. To activate a CPI, you write a bit mask
8 * corresponding to the processor set to be interrupted into the
9 * relevant register. That set of CPUs will then be interrupted with
10 * the CPI */
11static const int VIC_CPI_Registers[] =
12 {0xFC00, 0xFC01, 0xFC08, 0xFC09,
13 0xFC10, 0xFC11, 0xFC18, 0xFC19 };
14
15#define VIC_PROC_WHO_AM_I 0xfc29
16# define QUAD_IDENTIFIER 0xC0
17# define EIGHT_SLOT_IDENTIFIER 0xE0
18#define QIC_EXTENDED_PROCESSOR_SELECT 0xFC72
19#define VIC_CPI_BASE_REGISTER 0xFC41
20#define VIC_PROCESSOR_ID 0xFC21
21# define VIC_CPU_MASQUERADE_ENABLE 0x8
22
23#define VIC_CLAIM_REGISTER_0 0xFC38
24#define VIC_CLAIM_REGISTER_1 0xFC39
25#define VIC_REDIRECT_REGISTER_0 0xFC60
26#define VIC_REDIRECT_REGISTER_1 0xFC61
27#define VIC_PRIORITY_REGISTER 0xFC20
28
29#define VIC_PRIMARY_MC_BASE 0xFC48
30#define VIC_SECONDARY_MC_BASE 0xFC49
31
32#define QIC_PROCESSOR_ID 0xFC71
33# define QIC_CPUID_ENABLE 0x08
34
35#define QIC_VIC_CPI_BASE_REGISTER 0xFC79
36#define QIC_CPI_BASE_REGISTER 0xFC7A
37
38#define QIC_MASK_REGISTER0 0xFC80
39/* NOTE: these are masked high, enabled low */
40# define QIC_PERF_TIMER 0x01
41# define QIC_LPE 0x02
42# define QIC_SYS_INT 0x04
43# define QIC_CMN_INT 0x08
44/* at the moment, just enable CMN_INT, disable SYS_INT */
45# define QIC_DEFAULT_MASK0 (~(QIC_CMN_INT /* | VIC_SYS_INT */))
46#define QIC_MASK_REGISTER1 0xFC81
47# define QIC_BOOT_CPI_MASK 0xFE
48/* Enable CPI's 1-6 inclusive */
49# define QIC_CPI_ENABLE 0x81
50
51#define QIC_INTERRUPT_CLEAR0 0xFC8A
52#define QIC_INTERRUPT_CLEAR1 0xFC8B
53
54/* this is where we place the CPI vectors */
55#define VIC_DEFAULT_CPI_BASE 0xC0
56/* this is where we place the QIC CPI vectors */
57#define QIC_DEFAULT_CPI_BASE 0xD0
58
59#define VIC_BOOT_INTERRUPT_MASK 0xfe
60
61extern void smp_vic_timer_interrupt(void);
arch/x86/include/asm/voyager.h+0−529
@@ -1,529 +0,0 @@
1/* Copyright (C) 1999,2001
2 *
3 * Author: J.E.J.Bottomley@HansenPartnership.com
4 *
5 * Standard include definitions for the NCR Voyager system */
6
7#undef VOYAGER_DEBUG
8#undef VOYAGER_CAT_DEBUG
9
10#ifdef VOYAGER_DEBUG
11#define VDEBUG(x) printk x
12#else
13#define VDEBUG(x)
14#endif
15
16/* There are three levels of voyager machine: 3,4 and 5. The rule is
17 * if it's less than 3435 it's a Level 3 except for a 3360 which is
18 * a level 4. A 3435 or above is a Level 5 */
19#define VOYAGER_LEVEL5_AND_ABOVE 0x3435
20#define VOYAGER_LEVEL4 0x3360
21
22/* The L4 DINO ASIC */
23#define VOYAGER_DINO 0x43
24
25/* voyager ports in standard I/O space */
26#define VOYAGER_MC_SETUP 0x96
27
28
29#define VOYAGER_CAT_CONFIG_PORT 0x97
30# define VOYAGER_CAT_DESELECT 0xff
31#define VOYAGER_SSPB_RELOCATION_PORT 0x98
32
33/* Valid CAT controller commands */
34/* start instruction register cycle */
35#define VOYAGER_CAT_IRCYC 0x01
36/* start data register cycle */
37#define VOYAGER_CAT_DRCYC 0x02
38/* move to execute state */
39#define VOYAGER_CAT_RUN 0x0F
40/* end operation */
41#define VOYAGER_CAT_END 0x80
42/* hold in idle state */
43#define VOYAGER_CAT_HOLD 0x90
44/* single step an "intest" vector */
45#define VOYAGER_CAT_STEP 0xE0
46/* return cat controller to CLEMSON mode */
47#define VOYAGER_CAT_CLEMSON 0xFF
48
49/* the default cat command header */
50#define VOYAGER_CAT_HEADER 0x7F
51
52/* the range of possible CAT module ids in the system */
53#define VOYAGER_MIN_MODULE 0x10
54#define VOYAGER_MAX_MODULE 0x1f
55
56/* The voyager registers per asic */
57#define VOYAGER_ASIC_ID_REG 0x00
58#define VOYAGER_ASIC_TYPE_REG 0x01
59/* the sub address registers can be made auto incrementing on reads */
60#define VOYAGER_AUTO_INC_REG 0x02
61# define VOYAGER_AUTO_INC 0x04
62# define VOYAGER_NO_AUTO_INC 0xfb
63#define VOYAGER_SUBADDRDATA 0x03
64#define VOYAGER_SCANPATH 0x05
65# define VOYAGER_CONNECT_ASIC 0x01
66# define VOYAGER_DISCONNECT_ASIC 0xfe
67#define VOYAGER_SUBADDRLO 0x06
68#define VOYAGER_SUBADDRHI 0x07
69#define VOYAGER_SUBMODSELECT 0x08
70#define VOYAGER_SUBMODPRESENT 0x09
71
72#define VOYAGER_SUBADDR_LO 0xff
73#define VOYAGER_SUBADDR_HI 0xffff
74
75/* the maximum size of a scan path -- used to form instructions */
76#define VOYAGER_MAX_SCAN_PATH 0x100
77/* the biggest possible register size (in bytes) */
78#define VOYAGER_MAX_REG_SIZE 4
79
80/* Total number of possible modules (including submodules) */
81#define VOYAGER_MAX_MODULES 16
82/* Largest number of asics per module */
83#define VOYAGER_MAX_ASICS_PER_MODULE 7
84
85/* the CAT asic of each module is always the first one */
86#define VOYAGER_CAT_ID 0
87#define VOYAGER_PSI 0x1a
88
89/* voyager instruction operations and registers */
90#define VOYAGER_READ_CONFIG 0x1
91#define VOYAGER_WRITE_CONFIG 0x2
92#define VOYAGER_BYPASS 0xff
93
94typedef struct voyager_asic {
95 __u8 asic_addr; /* ASIC address; Level 4 */
96 __u8 asic_type; /* ASIC type */
97 __u8 asic_id; /* ASIC id */
98 __u8 jtag_id[4]; /* JTAG id */
99 __u8 asic_location; /* Location within scan path; start w/ 0 */
100 __u8 bit_location; /* Location within bit stream; start w/ 0 */
101 __u8 ireg_length; /* Instruction register length */
102 __u16 subaddr; /* Amount of sub address space */
103 struct voyager_asic *next; /* Next asic in linked list */
104} voyager_asic_t;
105
106typedef struct voyager_module {
107 __u8 module_addr; /* Module address */
108 __u8 scan_path_connected; /* Scan path connected */
109 __u16 ee_size; /* Size of the EEPROM */
110 __u16 num_asics; /* Number of Asics */
111 __u16 inst_bits; /* Instruction bits in the scan path */
112 __u16 largest_reg; /* Largest register in the scan path */
113 __u16 smallest_reg; /* Smallest register in the scan path */
114 voyager_asic_t *asic; /* First ASIC in scan path (CAT_I) */
115 struct voyager_module *submodule; /* Submodule pointer */
116 struct voyager_module *next; /* Next module in linked list */
117} voyager_module_t;
118
119typedef struct voyager_eeprom_hdr {
120 __u8 module_id[4];
121 __u8 version_id;
122 __u8 config_id;
123 __u16 boundry_id; /* boundary scan id */
124 __u16 ee_size; /* size of EEPROM */
125 __u8 assembly[11]; /* assembly # */
126 __u8 assembly_rev; /* assembly rev */
127 __u8 tracer[4]; /* tracer number */
128 __u16 assembly_cksum; /* asm checksum */
129 __u16 power_consump; /* pwr requirements */
130 __u16 num_asics; /* number of asics */
131 __u16 bist_time; /* min. bist time */
132 __u16 err_log_offset; /* error log offset */
133 __u16 scan_path_offset;/* scan path offset */
134 __u16 cct_offset;
135 __u16 log_length; /* length of err log */
136 __u16 xsum_end; /* offset to end of
137 checksum */
138 __u8 reserved[4];
139 __u8 sflag; /* starting sentinal */
140 __u8 part_number[13]; /* prom part number */
141 __u8 version[10]; /* version number */
142 __u8 signature[8];
143 __u16 eeprom_chksum;
144 __u32 data_stamp_offset;
145 __u8 eflag ; /* ending sentinal */
146} __attribute__((packed)) voyager_eprom_hdr_t;
147
148
149
150#define VOYAGER_EPROM_SIZE_OFFSET \
151 ((__u16)(&(((voyager_eprom_hdr_t *)0)->ee_size)))
152#define VOYAGER_XSUM_END_OFFSET 0x2a
153
154/* the following three definitions are for internal table layouts
155 * in the module EPROMs. We really only care about the IDs and
156 * offsets */
157typedef struct voyager_sp_table {
158 __u8 asic_id;
159 __u8 bypass_flag;
160 __u16 asic_data_offset;
161 __u16 config_data_offset;
162} __attribute__((packed)) voyager_sp_table_t;
163
164typedef struct voyager_jtag_table {
165 __u8 icode[4];
166 __u8 runbist[4];
167 __u8 intest[4];
168 __u8 samp_preld[4];
169 __u8 ireg_len;
170} __attribute__((packed)) voyager_jtt_t;
171
172typedef struct voyager_asic_data_table {
173 __u8 jtag_id[4];
174 __u16 length_bsr;
175 __u16 length_bist_reg;
176 __u32 bist_clk;
177 __u16 subaddr_bits;
178 __u16 seed_bits;
179 __u16 sig_bits;
180 __u16 jtag_offset;
181} __attribute__((packed)) voyager_at_t;
182
183/* Voyager Interrupt Controller (VIC) registers */
184
185/* Base to add to Cross Processor Interrupts (CPIs) when triggering
186 * the CPU IRQ line */
187/* register defines for the WCBICs (one per processor) */
188#define VOYAGER_WCBIC0 0x41 /* bus A node P1 processor 0 */
189#define VOYAGER_WCBIC1 0x49 /* bus A node P1 processor 1 */
190#define VOYAGER_WCBIC2 0x51 /* bus A node P2 processor 0 */
191#define VOYAGER_WCBIC3 0x59 /* bus A node P2 processor 1 */
192#define VOYAGER_WCBIC4 0x61 /* bus B node P1 processor 0 */
193#define VOYAGER_WCBIC5 0x69 /* bus B node P1 processor 1 */
194#define VOYAGER_WCBIC6 0x71 /* bus B node P2 processor 0 */
195#define VOYAGER_WCBIC7 0x79 /* bus B node P2 processor 1 */
196
197
198/* top of memory registers */
199#define VOYAGER_WCBIC_TOM_L 0x4
200#define VOYAGER_WCBIC_TOM_H 0x5
201
202/* register defines for Voyager Memory Contol (VMC)
203 * these are present on L4 machines only */
204#define VOYAGER_VMC1 0x81
205#define VOYAGER_VMC2 0x91
206#define VOYAGER_VMC3 0xa1
207#define VOYAGER_VMC4 0xb1
208
209/* VMC Ports */
210#define VOYAGER_VMC_MEMORY_SETUP 0x9
211# define VMC_Interleaving 0x01
212# define VMC_4Way 0x02
213# define VMC_EvenCacheLines 0x04
214# define VMC_HighLine 0x08
215# define VMC_Start0_Enable 0x20
216# define VMC_Start1_Enable 0x40
217# define VMC_Vremap 0x80
218#define VOYAGER_VMC_BANK_DENSITY 0xa
219# define VMC_BANK_EMPTY 0
220# define VMC_BANK_4MB 1
221# define VMC_BANK_16MB 2
222# define VMC_BANK_64MB 3
223# define VMC_BANK0_MASK 0x03
224# define VMC_BANK1_MASK 0x0C
225# define VMC_BANK2_MASK 0x30
226# define VMC_BANK3_MASK 0xC0
227
228/* Magellan Memory Controller (MMC) defines - present on L5 */
229#define VOYAGER_MMC_ASIC_ID 1
230/* the two memory modules corresponding to memory cards in the system */
231#define VOYAGER_MMC_MEMORY0_MODULE 0x14
232#define VOYAGER_MMC_MEMORY1_MODULE 0x15
233/* the Magellan Memory Address (MMA) defines */
234#define VOYAGER_MMA_ASIC_ID 2
235
236/* Submodule number for the Quad Baseboard */
237#define VOYAGER_QUAD_BASEBOARD 1
238
239/* ASIC defines for the Quad Baseboard */
240#define VOYAGER_QUAD_QDATA0 1
241#define VOYAGER_QUAD_QDATA1 2
242#define VOYAGER_QUAD_QABC 3
243
244/* Useful areas in extended CMOS */
245#define VOYAGER_PROCESSOR_PRESENT_MASK 0x88a
246#define VOYAGER_MEMORY_CLICKMAP 0xa23
247#define VOYAGER_DUMP_LOCATION 0xb1a
248
249/* SUS In Control bit - used to tell SUS that we don't need to be
250 * babysat anymore */
251#define VOYAGER_SUS_IN_CONTROL_PORT 0x3ff
252# define VOYAGER_IN_CONTROL_FLAG 0x80
253
254/* Voyager PSI defines */
255#define VOYAGER_PSI_STATUS_REG 0x08
256# define PSI_DC_FAIL 0x01
257# define PSI_MON 0x02
258# define PSI_FAULT 0x04
259# define PSI_ALARM 0x08
260# define PSI_CURRENT 0x10
261# define PSI_DVM 0x20
262# define PSI_PSCFAULT 0x40
263# define PSI_STAT_CHG 0x80
264
265#define VOYAGER_PSI_SUPPLY_REG 0x8000
266 /* read */
267# define PSI_FAIL_DC 0x01
268# define PSI_FAIL_AC 0x02
269# define PSI_MON_INT 0x04
270# define PSI_SWITCH_OFF 0x08
271# define PSI_HX_OFF 0x10
272# define PSI_SECURITY 0x20
273# define PSI_CMOS_BATT_LOW 0x40
274# define PSI_CMOS_BATT_FAIL 0x80
275 /* write */
276# define PSI_CLR_SWITCH_OFF 0x13
277# define PSI_CLR_HX_OFF 0x14
278# define PSI_CLR_CMOS_BATT_FAIL 0x17
279
280#define VOYAGER_PSI_MASK 0x8001
281# define PSI_MASK_MASK 0x10
282
283#define VOYAGER_PSI_AC_FAIL_REG 0x8004
284#define AC_FAIL_STAT_CHANGE 0x80
285
286#define VOYAGER_PSI_GENERAL_REG 0x8007
287 /* read */
288# define PSI_SWITCH_ON 0x01
289# define PSI_SWITCH_ENABLED 0x02
290# define PSI_ALARM_ENABLED 0x08
291# define PSI_SECURE_ENABLED 0x10
292# define PSI_COLD_RESET 0x20
293# define PSI_COLD_START 0x80
294 /* write */
295# define PSI_POWER_DOWN 0x10
296# define PSI_SWITCH_DISABLE 0x01
297# define PSI_SWITCH_ENABLE 0x11
298# define PSI_CLEAR 0x12
299# define PSI_ALARM_DISABLE 0x03
300# define PSI_ALARM_ENABLE 0x13
301# define PSI_CLEAR_COLD_RESET 0x05
302# define PSI_SET_COLD_RESET 0x15
303# define PSI_CLEAR_COLD_START 0x07
304# define PSI_SET_COLD_START 0x17
305
306
307
308struct voyager_bios_info {
309 __u8 len;
310 __u8 major;
311 __u8 minor;
312 __u8 debug;
313 __u8 num_classes;
314 __u8 class_1;
315 __u8 class_2;
316};
317
318/* The following structures and definitions are for the Kernel/SUS
319 * interface these are needed to find out how SUS initialised any Quad
320 * boards in the system */
321
322#define NUMBER_OF_MC_BUSSES 2
323#define SLOTS_PER_MC_BUS 8
324#define MAX_CPUS 16 /* 16 way CPU system */
325#define MAX_PROCESSOR_BOARDS 4 /* 4 processor slot system */
326#define MAX_CACHE_LEVELS 4 /* # of cache levels supported */
327#define MAX_SHARED_CPUS 4 /* # of CPUs that can share a LARC */
328#define NUMBER_OF_POS_REGS 8
329
330typedef struct {
331 __u8 MC_Slot;
332 __u8 POS_Values[NUMBER_OF_POS_REGS];
333} __attribute__((packed)) MC_SlotInformation_t;
334
335struct QuadDescription {
336 __u8 Type; /* for type 0 (DYADIC or MONADIC) all fields
337 * will be zero except for slot */
338 __u8 StructureVersion;
339 __u32 CPI_BaseAddress;
340 __u32 LARC_BankSize;
341 __u32 LocalMemoryStateBits;
342 __u8 Slot; /* Processor slots 1 - 4 */
343} __attribute__((packed));
344
345struct ProcBoardInfo {
346 __u8 Type;
347 __u8 StructureVersion;
348 __u8 NumberOfBoards;
349 struct QuadDescription QuadData[MAX_PROCESSOR_BOARDS];
350} __attribute__((packed));
351
352struct CacheDescription {
353 __u8 Level;
354 __u32 TotalSize;
355 __u16 LineSize;
356 __u8 Associativity;
357 __u8 CacheType;
358 __u8 WriteType;
359 __u8 Number_CPUs_SharedBy;
360 __u8 Shared_CPUs_Hardware_IDs[MAX_SHARED_CPUS];
361
362} __attribute__((packed));
363
364struct CPU_Description {
365 __u8 CPU_HardwareId;
366 char *FRU_String;
367 __u8 NumberOfCacheLevels;
368 struct CacheDescription CacheLevelData[MAX_CACHE_LEVELS];
369} __attribute__((packed));
370
371struct CPU_Info {
372 __u8 Type;
373 __u8 StructureVersion;
374 __u8 NumberOf_CPUs;
375 struct CPU_Description CPU_Data[MAX_CPUS];
376} __attribute__((packed));
377
378
379/*
380 * This structure will be used by SUS and the OS.
381 * The assumption about this structure is that no blank space is
382 * packed in it by our friend the compiler.
383 */
384typedef struct {
385 __u8 Mailbox_SUS; /* Written to by SUS to give
386 commands/response to the OS */
387 __u8 Mailbox_OS; /* Written to by the OS to give
388 commands/response to SUS */
389 __u8 SUS_MailboxVersion; /* Tells the OS which iteration of the
390 interface SUS supports */
391 __u8 OS_MailboxVersion; /* Tells SUS which iteration of the
392 interface the OS supports */
393 __u32 OS_Flags; /* Flags set by the OS as info for
394 SUS */
395 __u32 SUS_Flags; /* Flags set by SUS as info
396 for the OS */
397 __u32 WatchDogPeriod; /* Watchdog period (in seconds) which
398 the DP uses to see if the OS
399 is dead */
400 __u32 WatchDogCount; /* Updated by the OS on every tic. */
401 __u32 MemoryFor_SUS_ErrorLog; /* Flat 32 bit address which tells SUS
402 where to stuff the SUS error log
403 on a dump */
404 MC_SlotInformation_t MC_SlotInfo[NUMBER_OF_MC_BUSSES*SLOTS_PER_MC_BUS];
405 /* Storage for MCA POS data */
406 /* All new SECOND_PASS_INTERFACE fields added from this point */
407 struct ProcBoardInfo *BoardData;
408 struct CPU_Info *CPU_Data;
409 /* All new fields must be added from this point */
410} Voyager_KernelSUS_Mbox_t;
411
412/* structure for finding the right memory address to send a QIC CPI to */
413struct voyager_qic_cpi {
414 /* Each cache line (32 bytes) can trigger a cpi. The cpi
415 * read/write may occur anywhere in the cache line---pick the
416 * middle to be safe */
417 struct {
418 __u32 pad1[3];
419 __u32 cpi;
420 __u32 pad2[4];
421 } qic_cpi[8];
422};
423
424struct voyager_status {
425 __u32 power_fail:1;
426 __u32 switch_off:1;
427 __u32 request_from_kernel:1;
428};
429
430struct voyager_psi_regs {
431 __u8 cat_id;
432 __u8 cat_dev;
433 __u8 cat_control;
434 __u8 subaddr;
435 __u8 dummy4;
436 __u8 checkbit;
437 __u8 subaddr_low;
438 __u8 subaddr_high;
439 __u8 intstatus;
440 __u8 stat1;
441 __u8 stat3;
442 __u8 fault;
443 __u8 tms;
444 __u8 gen;
445 __u8 sysconf;
446 __u8 dummy15;
447};
448
449struct voyager_psi_subregs {
450 __u8 supply;
451 __u8 mask;
452 __u8 present;
453 __u8 DCfail;
454 __u8 ACfail;
455 __u8 fail;
456 __u8 UPSfail;
457 __u8 genstatus;
458};
459
460struct voyager_psi {
461 struct voyager_psi_regs regs;
462 struct voyager_psi_subregs subregs;
463};
464
465struct voyager_SUS {
466#define VOYAGER_DUMP_BUTTON_NMI 0x1
467#define VOYAGER_SUS_VALID 0x2
468#define VOYAGER_SYSINT_COMPLETE 0x3
469 __u8 SUS_mbox;
470#define VOYAGER_NO_COMMAND 0x0
471#define VOYAGER_IGNORE_DUMP 0x1
472#define VOYAGER_DO_DUMP 0x2
473#define VOYAGER_SYSINT_HANDSHAKE 0x3
474#define VOYAGER_DO_MEM_DUMP 0x4
475#define VOYAGER_SYSINT_WAS_RECOVERED 0x5
476 __u8 kernel_mbox;
477#define VOYAGER_MAILBOX_VERSION 0x10
478 __u8 SUS_version;
479 __u8 kernel_version;
480#define VOYAGER_OS_HAS_SYSINT 0x1
481#define VOYAGER_OS_IN_PROGRESS 0x2
482#define VOYAGER_UPDATING_WDPERIOD 0x4
483 __u32 kernel_flags;
484#define VOYAGER_SUS_BOOTING 0x1
485#define VOYAGER_SUS_IN_PROGRESS 0x2
486 __u32 SUS_flags;
487 __u32 watchdog_period;
488 __u32 watchdog_count;
489 __u32 SUS_errorlog;
490 /* lots of system configuration stuff under here */
491};
492
493/* Variables exported by voyager_smp */
494extern __u32 voyager_extended_vic_processors;
495extern __u32 voyager_allowed_boot_processors;
496extern __u32 voyager_quad_processors;
497extern struct voyager_qic_cpi *voyager_quad_cpi_addr[NR_CPUS];
498extern struct voyager_SUS *voyager_SUS;
499
500/* variables exported always */
501extern struct task_struct *voyager_thread;
502extern int voyager_level;
503extern struct voyager_status voyager_status;
504
505/* functions exported by the voyager and voyager_smp modules */
506extern int voyager_cat_readb(__u8 module, __u8 asic, int reg);
507extern void voyager_cat_init(void);
508extern void voyager_detect(struct voyager_bios_info *);
509extern void voyager_trap_init(void);
510extern void voyager_setup_irqs(void);
511extern int voyager_memory_detect(int region, __u32 *addr, __u32 *length);
512extern void voyager_smp_intr_init(void);
513extern __u8 voyager_extended_cmos_read(__u16 cmos_address);
514extern void voyager_smp_dump(void);
515extern void voyager_timer_interrupt(void);
516extern void smp_local_timer_interrupt(void);
517extern void voyager_power_off(void);
518extern void smp_voyager_power_off(void *dummy);
519extern void voyager_restart(void);
520extern void voyager_cat_power_off(void);
521extern void voyager_cat_do_common_interrupt(void);
522extern void voyager_handle_nmi(void);
523extern void voyager_smp_intr_init(void);
524/* Commands for the following are */
525#define VOYAGER_PSI_READ 0
526#define VOYAGER_PSI_WRITE 1
527#define VOYAGER_PSI_SUBREAD 2
528#define VOYAGER_PSI_SUBWRITE 3
529extern void voyager_cat_psi(__u8, __u16, __u8 *);
arch/x86/include/asm/xen/events.h+0−6
@@ -15,10 +15,4 @@ static inline int xen_irqs_disabled(struct pt_regs *regs) · 14 unmodified lines
15 return raw_irqs_disabled_flags(regs->flags);15 return raw_irqs_disabled_flags(regs->flags);
16}16}
17 17
18static inline void xen_do_IRQ(int irq, struct pt_regs *regs)
19{
20 regs->orig_ax = ~irq;
21 do_IRQ(regs);
22}
23
24#endif /* _ASM_X86_XEN_EVENTS_H */18#endif /* _ASM_X86_XEN_EVENTS_H */
arch/x86/include/asm/xen/hypervisor.h+18−10
@@ -38,22 +38,30 @@ extern struct shared_info *HYPERVISOR_shared_info; · 37 unmodified lines
38extern struct start_info *xen_start_info;38extern struct start_info *xen_start_info;
39 39
40enum xen_domain_type {40enum xen_domain_type {
41 XEN_NATIVE,41 XEN_NATIVE, /* running on bare hardware */
42 XEN_PV_DOMAIN,42 XEN_PV_DOMAIN, /* running in a PV domain */
43 XEN_HVM_DOMAIN,43 XEN_HVM_DOMAIN, /* running in a Xen hvm domain */
44};44};
45 45
46extern enum xen_domain_type xen_domain_type;
47
48#ifdef CONFIG_XEN46#ifdef CONFIG_XEN
49#define xen_domain() (xen_domain_type != XEN_NATIVE)47extern enum xen_domain_type xen_domain_type;
50#else48#else
51#define xen_domain() (0)49#define xen_domain_type XEN_NATIVE
52#endif50#endif
53 51
54#define xen_pv_domain() (xen_domain() && xen_domain_type == XEN_PV_DOMAIN)52#define xen_domain() (xen_domain_type != XEN_NATIVE)
55#define xen_hvm_domain() (xen_domain() && xen_domain_type == XEN_HVM_DOMAIN)53#define xen_pv_domain() (xen_domain() && \
54 xen_domain_type == XEN_PV_DOMAIN)
55#define xen_hvm_domain() (xen_domain() && \
56 xen_domain_type == XEN_HVM_DOMAIN)
57
58#ifdef CONFIG_XEN_DOM0
59#include <xen/interface/xen.h>
56 60
57#define xen_initial_domain() (xen_pv_domain() && xen_start_info->flags & SIF_INITDOMAIN)61#define xen_initial_domain() (xen_pv_domain() && \
62 xen_start_info->flags & SIF_INITDOMAIN)
63#else /* !CONFIG_XEN_DOM0 */
64#define xen_initial_domain() (0)
65#endif /* CONFIG_XEN_DOM0 */
58 66
59#endif /* _ASM_X86_XEN_HYPERVISOR_H */67#endif /* _ASM_X86_XEN_HYPERVISOR_H */
arch/x86/include/asm/xen/page.h+1−0
@@ -164,6 +164,7 @@ static inline pte_t __pte_ma(pteval_t x) · 163 unmodified lines
164 164
165 165
166xmaddr_t arbitrary_virt_to_machine(void *address);166xmaddr_t arbitrary_virt_to_machine(void *address);
167unsigned long arbitrary_virt_to_mfn(void *vaddr);
167void make_lowmem_page_readonly(void *vaddr);168void make_lowmem_page_readonly(void *vaddr);
168void make_lowmem_page_readwrite(void *vaddr);169void make_lowmem_page_readwrite(void *vaddr);
169 170
arch/x86/kernel/Makefile+18−24
@@ -23,11 +23,12 @@ nostackp := $(call cc-option, -fno-stack-protector) · 22 unmodified lines
23CFLAGS_vsyscall_64.o := $(PROFILING) -g0 $(nostackp)23CFLAGS_vsyscall_64.o := $(PROFILING) -g0 $(nostackp)
24CFLAGS_hpet.o := $(nostackp)24CFLAGS_hpet.o := $(nostackp)
25CFLAGS_tsc.o := $(nostackp)25CFLAGS_tsc.o := $(nostackp)
26CFLAGS_paravirt.o := $(nostackp)
26 27
27obj-y := process_$(BITS).o signal.o entry_$(BITS).o28obj-y := process_$(BITS).o signal.o entry_$(BITS).o
28obj-y += traps.o irq.o irq_$(BITS).o dumpstack_$(BITS).o29obj-y += traps.o irq.o irq_$(BITS).o dumpstack_$(BITS).o
29obj-y += time_$(BITS).o ioport.o ldt.o dumpstack.o30obj-y += time_$(BITS).o ioport.o ldt.o dumpstack.o
30obj-y += setup.o i8259.o irqinit_$(BITS).o setup_percpu.o31obj-y += setup.o i8259.o irqinit_$(BITS).o
31obj-$(CONFIG_X86_VISWS) += visws_quirks.o32obj-$(CONFIG_X86_VISWS) += visws_quirks.o
32obj-$(CONFIG_X86_32) += probe_roms_32.o33obj-$(CONFIG_X86_32) += probe_roms_32.o
33obj-$(CONFIG_X86_32) += sys_i386_32.o i386_ksyms_32.o34obj-$(CONFIG_X86_32) += sys_i386_32.o i386_ksyms_32.o
@@ -49,31 +50,27 @@ obj-y += step.o · 15 unmodified lines
49obj-$(CONFIG_STACKTRACE) += stacktrace.o50obj-$(CONFIG_STACKTRACE) += stacktrace.o
50obj-y += cpu/51obj-y += cpu/
51obj-y += acpi/52obj-y += acpi/
52obj-$(CONFIG_X86_BIOS_REBOOT) += reboot.o53obj-y += reboot.o
53obj-$(CONFIG_MCA) += mca_32.o54obj-$(CONFIG_MCA) += mca_32.o
54obj-$(CONFIG_X86_MSR) += msr.o55obj-$(CONFIG_X86_MSR) += msr.o
55obj-$(CONFIG_X86_CPUID) += cpuid.o56obj-$(CONFIG_X86_CPUID) += cpuid.o
56obj-$(CONFIG_PCI) += early-quirks.o57obj-$(CONFIG_PCI) += early-quirks.o
57apm-y := apm_32.o58apm-y := apm_32.o
58obj-$(CONFIG_APM) += apm.o59obj-$(CONFIG_APM) += apm.o
59obj-$(CONFIG_X86_SMP) += smp.o60obj-$(CONFIG_SMP) += smp.o
60obj-$(CONFIG_X86_SMP) += smpboot.o tsc_sync.o ipi.o tlb_$(BITS).o61obj-$(CONFIG_SMP) += smpboot.o tsc_sync.o
61obj-$(CONFIG_X86_32_SMP) += smpcommon.o62obj-$(CONFIG_SMP) += setup_percpu.o
62obj-$(CONFIG_X86_64_SMP) += tsc_sync.o smpcommon.o63obj-$(CONFIG_X86_64_SMP) += tsc_sync.o
63obj-$(CONFIG_X86_TRAMPOLINE) += trampoline_$(BITS).o64obj-$(CONFIG_X86_TRAMPOLINE) += trampoline_$(BITS).o
64obj-$(CONFIG_X86_MPPARSE) += mpparse.o65obj-$(CONFIG_X86_MPPARSE) += mpparse.o
65obj-$(CONFIG_X86_LOCAL_APIC) += apic.o nmi.o66obj-y += apic/
66obj-$(CONFIG_X86_IO_APIC) += io_apic.o
67obj-$(CONFIG_X86_REBOOTFIXUPS) += reboot_fixups_32.o67obj-$(CONFIG_X86_REBOOTFIXUPS) += reboot_fixups_32.o
68obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o68obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o
69obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o69obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o
70obj-$(CONFIG_KEXEC) += machine_kexec_$(BITS).o70obj-$(CONFIG_KEXEC) += machine_kexec_$(BITS).o
71obj-$(CONFIG_KEXEC) += relocate_kernel_$(BITS).o crash.o71obj-$(CONFIG_KEXEC) += relocate_kernel_$(BITS).o crash.o
72obj-$(CONFIG_CRASH_DUMP) += crash_dump_$(BITS).o72obj-$(CONFIG_CRASH_DUMP) += crash_dump_$(BITS).o
73obj-$(CONFIG_X86_NUMAQ) += numaq_32.o73obj-$(CONFIG_X86_VSMP) += vsmp_64.o
74obj-$(CONFIG_X86_ES7000) += es7000_32.o
75obj-$(CONFIG_X86_SUMMIT_NUMA) += summit_32.o
76obj-y += vsmp_64.o
77obj-$(CONFIG_KPROBES) += kprobes.o74obj-$(CONFIG_KPROBES) += kprobes.o
78obj-$(CONFIG_MODULES) += module_$(BITS).o75obj-$(CONFIG_MODULES) += module_$(BITS).o
79obj-$(CONFIG_EFI) += efi.o efi_$(BITS).o efi_stub_$(BITS).o76obj-$(CONFIG_EFI) += efi.o efi_$(BITS).o efi_stub_$(BITS).o
@@ -114,16 +111,13 @@ obj-$(CONFIG_SWIOTLB) += pci-swiotlb_64.o # NB rename without _64 · 34 unmodified lines
114###111###
115# 64 bit specific files112# 64 bit specific files
116ifeq ($(CONFIG_X86_64),y)113ifeq ($(CONFIG_X86_64),y)
117 obj-y += genapic_64.o genapic_flat_64.o genx2apic_uv_x.o tlb_uv.o114 obj-$(CONFIG_X86_UV) += tlb_uv.o bios_uv.o uv_irq.o uv_sysfs.o
118 obj-y += bios_uv.o uv_irq.o uv_sysfs.o115 obj-$(CONFIG_X86_PM_TIMER) += pmtimer_64.o
119 obj-y += genx2apic_cluster.o116 obj-$(CONFIG_AUDIT) += audit_64.o
120 obj-y += genx2apic_phys.o117
121 obj-$(CONFIG_X86_PM_TIMER) += pmtimer_64.o118 obj-$(CONFIG_GART_IOMMU) += pci-gart_64.o aperture_64.o
122 obj-$(CONFIG_AUDIT) += audit_64.o119 obj-$(CONFIG_CALGARY_IOMMU) += pci-calgary_64.o tce_64.o
123 120 obj-$(CONFIG_AMD_IOMMU) += amd_iommu_init.o amd_iommu.o
124 obj-$(CONFIG_GART_IOMMU) += pci-gart_64.o aperture_64.o121
125 obj-$(CONFIG_CALGARY_IOMMU) += pci-calgary_64.o tce_64.o122 obj-$(CONFIG_PCI_MMCONFIG) += mmconf-fam10h_64.o
126 obj-$(CONFIG_AMD_IOMMU) += amd_iommu_init.o amd_iommu.o
127
128 obj-$(CONFIG_PCI_MMCONFIG) += mmconf-fam10h_64.o
129endif123endif
arch/x86/kernel/acpi/boot.c+73−96
@@ -37,15 +37,10 @@ · 36 unmodified lines
37#include <asm/pgtable.h>37#include <asm/pgtable.h>
38#include <asm/io_apic.h>38#include <asm/io_apic.h>
39#include <asm/apic.h>39#include <asm/apic.h>
40#include <asm/genapic.h>
41#include <asm/io.h>40#include <asm/io.h>
42#include <asm/mpspec.h>41#include <asm/mpspec.h>
43#include <asm/smp.h>42#include <asm/smp.h>
44 43
45#ifdef CONFIG_X86_LOCAL_APIC
46# include <mach_apic.h>
47#endif
48
49static int __initdata acpi_force = 0;44static int __initdata acpi_force = 0;
50u32 acpi_rsdt_forced;45u32 acpi_rsdt_forced;
51#ifdef CONFIG_ACPI46#ifdef CONFIG_ACPI
@@ -56,16 +51,7 @@ int acpi_disabled = 1; · 4 unmodified lines
56EXPORT_SYMBOL(acpi_disabled);51EXPORT_SYMBOL(acpi_disabled);
57 52
58#ifdef CONFIG_X86_6453#ifdef CONFIG_X86_64
59 54# include <asm/proto.h>
60#include <asm/proto.h>
61
62#else /* X86 */
63
64#ifdef CONFIG_X86_LOCAL_APIC
65#include <mach_apic.h>
66#include <mach_mpparse.h>
67#endif /* CONFIG_X86_LOCAL_APIC */
68
69#endif /* X86 */55#endif /* X86 */
70 56
71#define BAD_MADT_ENTRY(entry, end) ( \57#define BAD_MADT_ENTRY(entry, end) ( \
@@ -121,35 +107,18 @@ enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PIC; · 49 unmodified lines
121 */107 */
122char *__init __acpi_map_table(unsigned long phys, unsigned long size)108char *__init __acpi_map_table(unsigned long phys, unsigned long size)
123{109{
124 unsigned long base, offset, mapped_size;
125 int idx;
126 110
127 if (!phys || !size)111 if (!phys || !size)
128 return NULL;112 return NULL;
129 113
130 if (phys+size <= (max_low_pfn_mapped << PAGE_SHIFT))114 return early_ioremap(phys, size);
131 return __va(phys);115}
132 116void __init __acpi_unmap_table(char *map, unsigned long size)
133 offset = phys & (PAGE_SIZE - 1);117{
134 mapped_size = PAGE_SIZE - offset;118 if (!map || !size)
135 clear_fixmap(FIX_ACPI_END);119 return;
136 set_fixmap(FIX_ACPI_END, phys);
137 base = fix_to_virt(FIX_ACPI_END);
138
139 /*
140 * Most cases can be covered by the below.
141 */
142 idx = FIX_ACPI_END;
143 while (mapped_size < size) {
144 if (--idx < FIX_ACPI_BEGIN)
145 return NULL; /* cannot handle this */
146 phys += PAGE_SIZE;
147 clear_fixmap(idx);
148 set_fixmap(idx, phys);
149 mapped_size += PAGE_SIZE;
150 }
151 120
152 return ((unsigned char *)base + offset);121 early_iounmap(map, size);
153}122}
154 123
155#ifdef CONFIG_PCI_MMCONFIG124#ifdef CONFIG_PCI_MMCONFIG
@@ -239,7 +208,8 @@ static int __init acpi_parse_madt(struct acpi_table_header *table) · 83 unmodified lines
239 madt->address);208 madt->address);
240 }209 }
241 210
242 acpi_madt_oem_check(madt->header.oem_id, madt->header.oem_table_id);211 default_acpi_madt_oem_check(madt->header.oem_id,
212 madt->header.oem_table_id);
243 213
244 return 0;214 return 0;
245}215}
@@ -884,7 +854,7 @@ static struct { · 638 unmodified lines
884 DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1);854 DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1);
885} mp_ioapic_routing[MAX_IO_APICS];855} mp_ioapic_routing[MAX_IO_APICS];
886 856
887static int mp_find_ioapic(int gsi)857int mp_find_ioapic(int gsi)
888{858{
889 int i = 0;859 int i = 0;
890 860
@@ -899,6 +869,16 @@ static int mp_find_ioapic(int gsi) · 8 unmodified lines
899 return -1;869 return -1;
900}870}
901 871
872int mp_find_ioapic_pin(int ioapic, int gsi)
873{
874 if (WARN_ON(ioapic == -1))
875 return -1;
876 if (WARN_ON(gsi > mp_ioapic_routing[ioapic].gsi_end))
877 return -1;
878
879 return gsi - mp_ioapic_routing[ioapic].gsi_base;
880}
881
902static u8 __init uniq_ioapic_id(u8 id)882static u8 __init uniq_ioapic_id(u8 id)
903{883{
904#ifdef CONFIG_X86_32884#ifdef CONFIG_X86_32
@@ -912,8 +892,8 @@ static u8 __init uniq_ioapic_id(u8 id) · 7 unmodified lines
912 DECLARE_BITMAP(used, 256);892 DECLARE_BITMAP(used, 256);
913 bitmap_zero(used, 256);893 bitmap_zero(used, 256);
914 for (i = 0; i < nr_ioapics; i++) {894 for (i = 0; i < nr_ioapics; i++) {
915 struct mp_config_ioapic *ia = &mp_ioapics[i];895 struct mpc_ioapic *ia = &mp_ioapics[i];
916 __set_bit(ia->mp_apicid, used);896 __set_bit(ia->apicid, used);
917 }897 }
918 if (!test_bit(id, used))898 if (!test_bit(id, used))
919 return id;899 return id;
@@ -945,29 +925,29 @@ void __init mp_register_ioapic(int id, u32 address, u32 gsi_base) · 25 unmodified lines
945 925
946 idx = nr_ioapics;926 idx = nr_ioapics;
947 927
948 mp_ioapics[idx].mp_type = MP_IOAPIC;928 mp_ioapics[idx].type = MP_IOAPIC;
949 mp_ioapics[idx].mp_flags = MPC_APIC_USABLE;929 mp_ioapics[idx].flags = MPC_APIC_USABLE;
950 mp_ioapics[idx].mp_apicaddr = address;930 mp_ioapics[idx].apicaddr = address;
951 931
952 set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);932 set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);
953 mp_ioapics[idx].mp_apicid = uniq_ioapic_id(id);933 mp_ioapics[idx].apicid = uniq_ioapic_id(id);
954#ifdef CONFIG_X86_32934#ifdef CONFIG_X86_32
955 mp_ioapics[idx].mp_apicver = io_apic_get_version(idx);935 mp_ioapics[idx].apicver = io_apic_get_version(idx);
956#else936#else
957 mp_ioapics[idx].mp_apicver = 0;937 mp_ioapics[idx].apicver = 0;
958#endif938#endif
959 /*939 /*
960 * Build basic GSI lookup table to facilitate gsi->io_apic lookups940 * Build basic GSI lookup table to facilitate gsi->io_apic lookups
961 * and to prevent reprogramming of IOAPIC pins (PCI GSIs).941 * and to prevent reprogramming of IOAPIC pins (PCI GSIs).
962 */942 */
963 mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].mp_apicid;943 mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].apicid;
964 mp_ioapic_routing[idx].gsi_base = gsi_base;944 mp_ioapic_routing[idx].gsi_base = gsi_base;
965 mp_ioapic_routing[idx].gsi_end = gsi_base +945 mp_ioapic_routing[idx].gsi_end = gsi_base +
966 io_apic_get_redir_entries(idx);946 io_apic_get_redir_entries(idx);
967 947
968 printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%lx, "948 printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%x, "
969 "GSI %d-%d\n", idx, mp_ioapics[idx].mp_apicid,949 "GSI %d-%d\n", idx, mp_ioapics[idx].apicid,
970 mp_ioapics[idx].mp_apicver, mp_ioapics[idx].mp_apicaddr,950 mp_ioapics[idx].apicver, mp_ioapics[idx].apicaddr,
971 mp_ioapic_routing[idx].gsi_base, mp_ioapic_routing[idx].gsi_end);951 mp_ioapic_routing[idx].gsi_base, mp_ioapic_routing[idx].gsi_end);
972 952
973 nr_ioapics++;953 nr_ioapics++;
@@ -996,19 +976,19 @@ int __init acpi_probe_gsi(void) · 22 unmodified lines
996 return max_gsi + 1;976 return max_gsi + 1;
997}977}
998 978
999static void assign_to_mp_irq(struct mp_config_intsrc *m,979static void assign_to_mp_irq(struct mpc_intsrc *m,
1000 struct mp_config_intsrc *mp_irq)980 struct mpc_intsrc *mp_irq)
1001{981{
1002 memcpy(mp_irq, m, sizeof(struct mp_config_intsrc));982 memcpy(mp_irq, m, sizeof(struct mpc_intsrc));
1003}983}
1004 984
1005static int mp_irq_cmp(struct mp_config_intsrc *mp_irq,985static int mp_irq_cmp(struct mpc_intsrc *mp_irq,
1006 struct mp_config_intsrc *m)986 struct mpc_intsrc *m)
1007{987{
1008 return memcmp(mp_irq, m, sizeof(struct mp_config_intsrc));988 return memcmp(mp_irq, m, sizeof(struct mpc_intsrc));
1009}989}
1010 990
1011static void save_mp_irq(struct mp_config_intsrc *m)991static void save_mp_irq(struct mpc_intsrc *m)
1012{992{
1013 int i;993 int i;
1014 994
@@ -1026,7 +1006,7 @@ void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi) · 11 unmodified lines
1026{1006{
1027 int ioapic;1007 int ioapic;
1028 int pin;1008 int pin;
1029 struct mp_config_intsrc mp_irq;1009 struct mpc_intsrc mp_irq;
1030 1010
1031 /*1011 /*
1032 * Convert 'gsi' to 'ioapic.pin'.1012 * Convert 'gsi' to 'ioapic.pin'.
@@ -1034,7 +1014,7 @@ void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi) · 1 unmodified line
1034 ioapic = mp_find_ioapic(gsi);1014 ioapic = mp_find_ioapic(gsi);
1035 if (ioapic < 0)1015 if (ioapic < 0)
1036 return;1016 return;
1037 pin = gsi - mp_ioapic_routing[ioapic].gsi_base;1017 pin = mp_find_ioapic_pin(ioapic, gsi);
1038 1018
1039 /*1019 /*
1040 * TBD: This check is for faulty timer entries, where the override1020 * TBD: This check is for faulty timer entries, where the override
@@ -1044,13 +1024,13 @@ void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi) · 3 unmodified lines
1044 if ((bus_irq == 0) && (trigger == 3))1024 if ((bus_irq == 0) && (trigger == 3))
1045 trigger = 1;1025 trigger = 1;
1046 1026
1047 mp_irq.mp_type = MP_INTSRC;1027 mp_irq.type = MP_INTSRC;
1048 mp_irq.mp_irqtype = mp_INT;1028 mp_irq.irqtype = mp_INT;
1049 mp_irq.mp_irqflag = (trigger << 2) | polarity;1029 mp_irq.irqflag = (trigger << 2) | polarity;
1050 mp_irq.mp_srcbus = MP_ISA_BUS;1030 mp_irq.srcbus = MP_ISA_BUS;
1051 mp_irq.mp_srcbusirq = bus_irq; /* IRQ */1031 mp_irq.srcbusirq = bus_irq; /* IRQ */
1052 mp_irq.mp_dstapic = mp_ioapics[ioapic].mp_apicid; /* APIC ID */1032 mp_irq.dstapic = mp_ioapics[ioapic].apicid; /* APIC ID */
1053 mp_irq.mp_dstirq = pin; /* INTIN# */1033 mp_irq.dstirq = pin; /* INTIN# */
1054 1034
1055 save_mp_irq(&mp_irq);1035 save_mp_irq(&mp_irq);
1056}1036}
@@ -1060,7 +1040,7 @@ void __init mp_config_acpi_legacy_irqs(void) · 3 unmodified lines
1060 int i;1040 int i;
1061 int ioapic;1041 int ioapic;
1062 unsigned int dstapic;1042 unsigned int dstapic;
1063 struct mp_config_intsrc mp_irq;1043 struct mpc_intsrc mp_irq;
1064 1044
1065#if defined (CONFIG_MCA) || defined (CONFIG_EISA)1045#if defined (CONFIG_MCA) || defined (CONFIG_EISA)
1066 /*1046 /*
@@ -1085,7 +1065,7 @@ void __init mp_config_acpi_legacy_irqs(void) · 18 unmodified lines
1085 ioapic = mp_find_ioapic(0);1065 ioapic = mp_find_ioapic(0);
1086 if (ioapic < 0)1066 if (ioapic < 0)
1087 return;1067 return;
1088 dstapic = mp_ioapics[ioapic].mp_apicid;1068 dstapic = mp_ioapics[ioapic].apicid;
1089 1069
1090 /*1070 /*
1091 * Use the default configuration for the IRQs 0-15. Unless1071 * Use the default configuration for the IRQs 0-15. Unless
@@ -1095,16 +1075,14 @@ void __init mp_config_acpi_legacy_irqs(void) · 3 unmodified lines
1095 int idx;1075 int idx;
1096 1076
1097 for (idx = 0; idx < mp_irq_entries; idx++) {1077 for (idx = 0; idx < mp_irq_entries; idx++) {
1098 struct mp_config_intsrc *irq = mp_irqs + idx;1078 struct mpc_intsrc *irq = mp_irqs + idx;
1099 1079
1100 /* Do we already have a mapping for this ISA IRQ? */1080 /* Do we already have a mapping for this ISA IRQ? */
1101 if (irq->mp_srcbus == MP_ISA_BUS1081 if (irq->srcbus == MP_ISA_BUS && irq->srcbusirq == i)
1102 && irq->mp_srcbusirq == i)
1103 break;1082 break;
1104 1083
1105 /* Do we already have a mapping for this IOAPIC pin */1084 /* Do we already have a mapping for this IOAPIC pin */
1106 if (irq->mp_dstapic == dstapic &&1085 if (irq->dstapic == dstapic && irq->dstirq == i)
1107 irq->mp_dstirq == i)
1108 break;1086 break;
1109 }1087 }
1110 1088
@@ -1113,13 +1091,13 @@ void __init mp_config_acpi_legacy_irqs(void) · 2 unmodified lines
1113 continue; /* IRQ already used */1091 continue; /* IRQ already used */
1114 }1092 }
1115 1093
1116 mp_irq.mp_type = MP_INTSRC;1094 mp_irq.type = MP_INTSRC;
1117 mp_irq.mp_irqflag = 0; /* Conforming */1095 mp_irq.irqflag = 0; /* Conforming */
1118 mp_irq.mp_srcbus = MP_ISA_BUS;1096 mp_irq.srcbus = MP_ISA_BUS;
1119 mp_irq.mp_dstapic = dstapic;1097 mp_irq.dstapic = dstapic;
1120 mp_irq.mp_irqtype = mp_INT;1098 mp_irq.irqtype = mp_INT;
1121 mp_irq.mp_srcbusirq = i; /* Identity mapped */1099 mp_irq.srcbusirq = i; /* Identity mapped */
1122 mp_irq.mp_dstirq = i;1100 mp_irq.dstirq = i;
1123 1101
1124 save_mp_irq(&mp_irq);1102 save_mp_irq(&mp_irq);
1125 }1103 }
@@ -1156,7 +1134,7 @@ int mp_register_gsi(u32 gsi, int triggering, int polarity) · 30 unmodified lines
1156 return gsi;1134 return gsi;
1157 }1135 }
1158 1136
1159 ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_base;1137 ioapic_pin = mp_find_ioapic_pin(ioapic, gsi);
1160 1138
1161#ifdef CONFIG_X86_321139#ifdef CONFIG_X86_32
1162 if (ioapic_renumber_irq)1140 if (ioapic_renumber_irq)
@@ -1230,22 +1208,22 @@ int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin, · 67 unmodified lines
1230 u32 gsi, int triggering, int polarity)1208 u32 gsi, int triggering, int polarity)
1231{1209{
1232#ifdef CONFIG_X86_MPPARSE1210#ifdef CONFIG_X86_MPPARSE
1233 struct mp_config_intsrc mp_irq;1211 struct mpc_intsrc mp_irq;
1234 int ioapic;1212 int ioapic;
1235 1213
1236 if (!acpi_ioapic)1214 if (!acpi_ioapic)
1237 return 0;1215 return 0;
1238 1216
1239 /* print the entry should happen on mptable identically */1217 /* print the entry should happen on mptable identically */
1240 mp_irq.mp_type = MP_INTSRC;1218 mp_irq.type = MP_INTSRC;
1241 mp_irq.mp_irqtype = mp_INT;1219 mp_irq.irqtype = mp_INT;
1242 mp_irq.mp_irqflag = (triggering == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) |1220 mp_irq.irqflag = (triggering == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) |
1243 (polarity == ACPI_ACTIVE_HIGH ? 1 : 3);1221 (polarity == ACPI_ACTIVE_HIGH ? 1 : 3);
1244 mp_irq.mp_srcbus = number;1222 mp_irq.srcbus = number;
1245 mp_irq.mp_srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3);1223 mp_irq.srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3);
1246 ioapic = mp_find_ioapic(gsi);1224 ioapic = mp_find_ioapic(gsi);
1247 mp_irq.mp_dstapic = mp_ioapic_routing[ioapic].apic_id;1225 mp_irq.dstapic = mp_ioapic_routing[ioapic].apic_id;
1248 mp_irq.mp_dstirq = gsi - mp_ioapic_routing[ioapic].gsi_base;1226 mp_irq.dstirq = mp_find_ioapic_pin(ioapic, gsi);
1249 1227
1250 save_mp_irq(&mp_irq);1228 save_mp_irq(&mp_irq);
1251#endif1229#endif
@@ -1372,7 +1350,7 @@ static void __init acpi_process_madt(void) · 120 unmodified lines
1372 if (!error) {1350 if (!error) {
1373 acpi_lapic = 1;1351 acpi_lapic = 1;
1374 1352
1375#ifdef CONFIG_X86_GENERICARCH1353#ifdef CONFIG_X86_BIGSMP
1376 generic_bigsmp_probe();1354 generic_bigsmp_probe();
1377#endif1355#endif
1378 /*1356 /*
@@ -1384,9 +1362,8 @@ static void __init acpi_process_madt(void) · 5 unmodified lines
1384 acpi_ioapic = 1;1362 acpi_ioapic = 1;
1385 1363
1386 smp_found_config = 1;1364 smp_found_config = 1;
1387#ifdef CONFIG_X86_321365 if (apic->setup_apic_routing)
1388 setup_apic_routing();1366 apic->setup_apic_routing();
1389#endif
1390 }1367 }
1391 }1368 }
1392 if (error == -EINVAL) {1369 if (error == -EINVAL) {
arch/x86/kernel/acpi/realmode/wakeup.S+2−2
@@ -3,8 +3,8 @@ · 2 unmodified lines
3 */3 */
4#include <asm/segment.h>4#include <asm/segment.h>
5#include <asm/msr-index.h>5#include <asm/msr-index.h>
6#include <asm/page.h>6#include <asm/page_types.h>
7#include <asm/pgtable.h>7#include <asm/pgtable_types.h>
8#include <asm/processor-flags.h>8#include <asm/processor-flags.h>
9 9
10 .code1610 .code16
arch/x86/kernel/acpi/sleep.c+1−0
@@ -101,6 +101,7 @@ int acpi_save_state_mem(void) · 100 unmodified lines
101 stack_start.sp = temp_stack + sizeof(temp_stack);101 stack_start.sp = temp_stack + sizeof(temp_stack);
102 early_gdt_descr.address =102 early_gdt_descr.address =
103 (unsigned long)get_cpu_gdt_table(smp_processor_id());103 (unsigned long)get_cpu_gdt_table(smp_processor_id());
104 initial_gs = per_cpu_offset(smp_processor_id());
104#endif105#endif
105 initial_code = (unsigned long)wakeup_long64;106 initial_code = (unsigned long)wakeup_long64;
106 saved_magic = 0x123456789abcdef0;107 saved_magic = 0x123456789abcdef0;
arch/x86/kernel/acpi/wakeup_32.S+1−1
@@ -1,7 +1,7 @@
1 .section .text.page_aligned1 .section .text.page_aligned
2#include <linux/linkage.h>2#include <linux/linkage.h>
3#include <asm/segment.h>3#include <asm/segment.h>
4#include <asm/page.h>4#include <asm/page_types.h>
5 5
6# Copyright 2003, 2008 Pavel Machek <pavel@suse.cz>, distribute under GPLv26# Copyright 2003, 2008 Pavel Machek <pavel@suse.cz>, distribute under GPLv2
7 7
arch/x86/kernel/acpi/wakeup_64.S+2−2
@@ -1,8 +1,8 @@
1.text1.text
2#include <linux/linkage.h>2#include <linux/linkage.h>
3#include <asm/segment.h>3#include <asm/segment.h>
4#include <asm/pgtable.h>4#include <asm/pgtable_types.h>
5#include <asm/page.h>5#include <asm/page_types.h>
6#include <asm/msr.h>6#include <asm/msr.h>
7#include <asm/asm-offsets.h>7#include <asm/asm-offsets.h>
8 8
arch/x86/kernel/alternative.c+3−3
@@ -498,12 +498,12 @@ void *text_poke_early(void *addr, const void *opcode, size_t len) · 497 unmodified lines
498 */498 */
499void *__kprobes text_poke(void *addr, const void *opcode, size_t len)499void *__kprobes text_poke(void *addr, const void *opcode, size_t len)
500{500{
501 unsigned long flags;
502 char *vaddr;501 char *vaddr;
503 int nr_pages = 2;502 int nr_pages = 2;
504 struct page *pages[2];503 struct page *pages[2];
505 int i;504 int i;
506 505
506 might_sleep();
507 if (!core_kernel_text((unsigned long)addr)) {507 if (!core_kernel_text((unsigned long)addr)) {
508 pages[0] = vmalloc_to_page(addr);508 pages[0] = vmalloc_to_page(addr);
509 pages[1] = vmalloc_to_page(addr + PAGE_SIZE);509 pages[1] = vmalloc_to_page(addr + PAGE_SIZE);
@@ -517,9 +517,9 @@ void *__kprobes text_poke(void *addr, const void *opcode, size_t len) · 7 unmodified lines
517 nr_pages = 1;517 nr_pages = 1;
518 vaddr = vmap(pages, nr_pages, VM_MAP, PAGE_KERNEL);518 vaddr = vmap(pages, nr_pages, VM_MAP, PAGE_KERNEL);
519 BUG_ON(!vaddr);519 BUG_ON(!vaddr);
520 local_irq_save(flags);520 local_irq_disable();
521 memcpy(&vaddr[(unsigned long)addr & ~PAGE_MASK], opcode, len);521 memcpy(&vaddr[(unsigned long)addr & ~PAGE_MASK], opcode, len);
522 local_irq_restore(flags);522 local_irq_enable();
523 vunmap(vaddr);523 vunmap(vaddr);
524 sync_core();524 sync_core();
525 /* Could also do a CLFLUSH here to speed up CPU recovery; but525 /* Could also do a CLFLUSH here to speed up CPU recovery; but
arch/x86/kernel/apic/Makefile+19−0
@@ -0,0 +1,19 @@
1#
2# Makefile for local APIC drivers and for the IO-APIC code
3#
4
5obj-$(CONFIG_X86_LOCAL_APIC) += apic.o probe_$(BITS).o ipi.o nmi.o
6obj-$(CONFIG_X86_IO_APIC) += io_apic.o
7obj-$(CONFIG_SMP) += ipi.o
8
9ifeq ($(CONFIG_X86_64),y)
10obj-y += apic_flat_64.o
11obj-$(CONFIG_X86_X2APIC) += x2apic_cluster.o
12obj-$(CONFIG_X86_X2APIC) += x2apic_phys.o
13obj-$(CONFIG_X86_UV) += x2apic_uv_x.o
14endif
15
16obj-$(CONFIG_X86_BIGSMP) += bigsmp_32.o
17obj-$(CONFIG_X86_NUMAQ) += numaq_32.o
18obj-$(CONFIG_X86_ES7000) += es7000_32.o
19obj-$(CONFIG_X86_SUMMIT) += summit_32.o
arch/x86/kernel/apic/apic.crenamed from arch/x86/kernel/apic.c+140−159
@@ -1,7 +1,7 @@
1/*1/*
2 * Local APIC handling, local APIC timers2 * Local APIC handling, local APIC timers
3 *3 *
4 * (c) 1999, 2000 Ingo Molnar <mingo@redhat.com>4 * (c) 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
5 *5 *
6 * Fixes6 * Fixes
7 * Maciej W. Rozycki : Bits for genuine 82489DX APICs;7 * Maciej W. Rozycki : Bits for genuine 82489DX APICs;
@@ -14,51 +14,69 @@ · 6 unmodified lines
14 * Mikael Pettersson : PM converted to driver model.14 * Mikael Pettersson : PM converted to driver model.
15 */15 */
16 16
17#include <linux/init.h>
18
19#include <linux/mm.h>
20#include <linux/delay.h>
21#include <linux/bootmem.h>
22#include <linux/interrupt.h>
23#include <linux/mc146818rtc.h>
24#include <linux/kernel_stat.h>17#include <linux/kernel_stat.h>
25#include <linux/sysdev.h>18#include <linux/mc146818rtc.h>
26#include <linux/ioport.h>
27#include <linux/cpu.h>
28#include <linux/clockchips.h>
29#include <linux/acpi_pmtmr.h>19#include <linux/acpi_pmtmr.h>
20#include <linux/clockchips.h>
21#include <linux/interrupt.h>
22#include <linux/bootmem.h>
23#include <linux/ftrace.h>
24#include <linux/ioport.h>
30#include <linux/module.h>25#include <linux/module.h>
31#include <linux/dmi.h>26#include <linux/sysdev.h>
27#include <linux/delay.h>
28#include <linux/timex.h>
32#include <linux/dmar.h>29#include <linux/dmar.h>
33#include <linux/ftrace.h>30#include <linux/init.h>
34#include <linux/smp.h>31#include <linux/cpu.h>
32#include <linux/dmi.h>
35#include <linux/nmi.h>33#include <linux/nmi.h>
36#include <linux/timex.h>34#include <linux/smp.h>
35#include <linux/mm.h>
37 36
37#include <asm/pgalloc.h>
38#include <asm/atomic.h>38#include <asm/atomic.h>
39#include <asm/mtrr.h>
40#include <asm/mpspec.h>39#include <asm/mpspec.h>
41#include <asm/desc.h>
42#include <asm/arch_hooks.h>
43#include <asm/hpet.h>
44#include <asm/pgalloc.h>
45#include <asm/i8253.h>40#include <asm/i8253.h>
46#include <asm/idle.h>41#include <asm/i8259.h>
47#include <asm/proto.h>42#include <asm/proto.h>
48#include <asm/apic.h>43#include <asm/apic.h>
49#include <asm/i8259.h>44#include <asm/desc.h>
45#include <asm/hpet.h>
46#include <asm/idle.h>
47#include <asm/mtrr.h>
50#include <asm/smp.h>48#include <asm/smp.h>
51 49
52#include <mach_apic.h>50unsigned int num_processors;
53#include <mach_apicdef.h>51
54#include <mach_ipi.h>52unsigned disabled_cpus __cpuinitdata;
53
54/* Processor that is doing the boot up */
55unsigned int boot_cpu_physical_apicid = -1U;
55 56
56/*57/*
57 * Sanity check58 * The highest APIC ID seen during enumeration.
59 *
60 * This determines the messaging protocol we can use: if all APIC IDs
61 * are in the 0 ... 7 range, then we can use logical addressing which
62 * has some performance advantages (better broadcasting).
63 *
64 * If there's an APIC ID above 8, we use physical addressing.
58 */65 */
59#if ((SPURIOUS_APIC_VECTOR & 0x0F) != 0x0F)66unsigned int max_physical_apicid;
60# error SPURIOUS_APIC_VECTOR definition error67
61#endif68/*
69 * Bitmask of physically existing CPUs:
70 */
71physid_mask_t phys_cpu_present_map;
72
73/*
74 * Map cpu index to physical APIC ID
75 */
76DEFINE_EARLY_PER_CPU(u16, x86_cpu_to_apicid, BAD_APICID);
77DEFINE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid, BAD_APICID);
78EXPORT_EARLY_PER_CPU_SYMBOL(x86_cpu_to_apicid);
79EXPORT_EARLY_PER_CPU_SYMBOL(x86_bios_cpu_apicid);
62 80
63#ifdef CONFIG_X86_3281#ifdef CONFIG_X86_32
64/*82/*
@@ -92,11 +110,7 @@ static __init int setup_apicpmtimer(char *s) · 27 unmodified lines
92__setup("apicpmtimer", setup_apicpmtimer);110__setup("apicpmtimer", setup_apicpmtimer);
93#endif111#endif
94 112
95#ifdef CONFIG_X86_64113#ifdef CONFIG_X86_X2APIC
96#define HAVE_X2APIC
97#endif
98
99#ifdef HAVE_X2APIC
100int x2apic;114int x2apic;
101/* x2apic enabled before OS handover */115/* x2apic enabled before OS handover */
102static int x2apic_preenabled;116static int x2apic_preenabled;
@@ -194,18 +208,13 @@ static int modern_apic(void) · 91 unmodified lines
194 return lapic_get_version() >= 0x14;208 return lapic_get_version() >= 0x14;
195}209}
196 210
197/*211void native_apic_wait_icr_idle(void)
198 * Paravirt kernels also might be using these below ops. So we still
199 * use generic apic_read()/apic_write(), which might be pointing to different
200 * ops in PARAVIRT case.
201 */
202void xapic_wait_icr_idle(void)
203{212{
204 while (apic_read(APIC_ICR) & APIC_ICR_BUSY)213 while (apic_read(APIC_ICR) & APIC_ICR_BUSY)
205 cpu_relax();214 cpu_relax();
206}215}
207 216
208u32 safe_xapic_wait_icr_idle(void)217u32 native_safe_apic_wait_icr_idle(void)
209{218{
210 u32 send_status;219 u32 send_status;
211 int timeout;220 int timeout;
@@ -221,13 +230,13 @@ u32 safe_xapic_wait_icr_idle(void) · 9 unmodified lines
221 return send_status;230 return send_status;
222}231}
223 232
224void xapic_icr_write(u32 low, u32 id)233void native_apic_icr_write(u32 low, u32 id)
225{234{
226 apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(id));235 apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(id));
227 apic_write(APIC_ICR, low);236 apic_write(APIC_ICR, low);
228}237}
229 238
230static u64 xapic_icr_read(void)239u64 native_apic_icr_read(void)
231{240{
232 u32 icr1, icr2;241 u32 icr1, icr2;
233 242
@@ -237,54 +246,6 @@ static u64 xapic_icr_read(void) · 3 unmodified lines
237 return icr1 | ((u64)icr2 << 32);246 return icr1 | ((u64)icr2 << 32);
238}247}
239 248
240static struct apic_ops xapic_ops = {
241 .read = native_apic_mem_read,
242 .write = native_apic_mem_write,
243 .icr_read = xapic_icr_read,
244 .icr_write = xapic_icr_write,
245 .wait_icr_idle = xapic_wait_icr_idle,
246 .safe_wait_icr_idle = safe_xapic_wait_icr_idle,
247};
248
249struct apic_ops __read_mostly *apic_ops = &xapic_ops;
250EXPORT_SYMBOL_GPL(apic_ops);
251
252#ifdef HAVE_X2APIC
253static void x2apic_wait_icr_idle(void)
254{
255 /* no need to wait for icr idle in x2apic */
256 return;
257}
258
259static u32 safe_x2apic_wait_icr_idle(void)
260{
261 /* no need to wait for icr idle in x2apic */
262 return 0;
263}
264
265void x2apic_icr_write(u32 low, u32 id)
266{
267 wrmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), ((__u64) id) << 32 | low);
268}
269
270static u64 x2apic_icr_read(void)
271{
272 unsigned long val;
273
274 rdmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), val);
275 return val;
276}
277
278static struct apic_ops x2apic_ops = {
279 .read = native_apic_msr_read,
280 .write = native_apic_msr_write,
281 .icr_read = x2apic_icr_read,
282 .icr_write = x2apic_icr_write,
283 .wait_icr_idle = x2apic_wait_icr_idle,
284 .safe_wait_icr_idle = safe_x2apic_wait_icr_idle,
285};
286#endif
287
288/**249/**
289 * enable_NMI_through_LVT0 - enable NMI through local vector table 0250 * enable_NMI_through_LVT0 - enable NMI through local vector table 0
290 */251 */
@@ -457,7 +418,7 @@ static void lapic_timer_setup(enum clock_event_mode mode, · 166 unmodified lines
457static void lapic_timer_broadcast(const struct cpumask *mask)418static void lapic_timer_broadcast(const struct cpumask *mask)
458{419{
459#ifdef CONFIG_SMP420#ifdef CONFIG_SMP
460 send_IPI_mask(mask, LOCAL_TIMER_VECTOR);421 apic->send_IPI_mask(mask, LOCAL_TIMER_VECTOR);
461#endif422#endif
462}423}
463 424
@@ -535,7 +496,8 @@ static void __init lapic_cal_handler(struct clock_event_device *dev) · 71 unmodified lines
535 }496 }
536}497}
537 498
538static int __init calibrate_by_pmtimer(long deltapm, long *delta)499static int __init
500calibrate_by_pmtimer(long deltapm, long *delta, long *deltatsc)
539{501{
540 const long pm_100ms = PMTMR_TICKS_PER_SEC / 10;502 const long pm_100ms = PMTMR_TICKS_PER_SEC / 10;
541 const long pm_thresh = pm_100ms / 100;503 const long pm_thresh = pm_100ms / 100;
@@ -546,7 +508,7 @@ static int __init calibrate_by_pmtimer(long deltapm, long *delta) · 4 unmodified lines
546 return -1;508 return -1;
547#endif509#endif
548 510
549 apic_printk(APIC_VERBOSE, "... PM timer delta = %ld\n", deltapm);511 apic_printk(APIC_VERBOSE, "... PM-Timer delta = %ld\n", deltapm);
550 512
551 /* Check, if the PM timer is available */513 /* Check, if the PM timer is available */
552 if (!deltapm)514 if (!deltapm)
@@ -556,19 +518,30 @@ static int __init calibrate_by_pmtimer(long deltapm, long *delta) · 3 unmodified lines
556 518
557 if (deltapm > (pm_100ms - pm_thresh) &&519 if (deltapm > (pm_100ms - pm_thresh) &&
558 deltapm < (pm_100ms + pm_thresh)) {520 deltapm < (pm_100ms + pm_thresh)) {
559 apic_printk(APIC_VERBOSE, "... PM timer result ok\n");521 apic_printk(APIC_VERBOSE, "... PM-Timer result ok\n");
560 } else {522 return 0;
561 res = (((u64)deltapm) * mult) >> 22;523 }
562 do_div(res, 1000000);524
563 pr_warning("APIC calibration not consistent "525 res = (((u64)deltapm) * mult) >> 22;
564 "with PM Timer: %ldms instead of 100ms\n",526 do_div(res, 1000000);
565 (long)res);527 pr_warning("APIC calibration not consistent "
566 /* Correct the lapic counter value */528 "with PM-Timer: %ldms instead of 100ms\n",(long)res);
567 res = (((u64)(*delta)) * pm_100ms);529
530 /* Correct the lapic counter value */
531 res = (((u64)(*delta)) * pm_100ms);
532 do_div(res, deltapm);
533 pr_info("APIC delta adjusted to PM-Timer: "
534 "%lu (%ld)\n", (unsigned long)res, *delta);
535 *delta = (long)res;
536
537 /* Correct the tsc counter value */
538 if (cpu_has_tsc) {
539 res = (((u64)(*deltatsc)) * pm_100ms);
568 do_div(res, deltapm);540 do_div(res, deltapm);
569 pr_info("APIC delta adjusted to PM-Timer: "541 apic_printk(APIC_VERBOSE, "TSC delta adjusted to "
570 "%lu (%ld)\n", (unsigned long)res, *delta);542 "PM-Timer: %lu (%ld) \n",
571 *delta = (long)res;543 (unsigned long)res, *deltatsc);
544 *deltatsc = (long)res;
572 }545 }
573 546
574 return 0;547 return 0;
@@ -579,7 +552,7 @@ static int __init calibrate_APIC_clock(void) · 4 unmodified lines
579 struct clock_event_device *levt = &__get_cpu_var(lapic_events);552 struct clock_event_device *levt = &__get_cpu_var(lapic_events);
580 void (*real_handler)(struct clock_event_device *dev);553 void (*real_handler)(struct clock_event_device *dev);
581 unsigned long deltaj;554 unsigned long deltaj;
582 long delta;555 long delta, deltatsc;
583 int pm_referenced = 0;556 int pm_referenced = 0;
584 557
585 local_irq_disable();558 local_irq_disable();
@@ -609,9 +582,11 @@ static int __init calibrate_APIC_clock(void) · 23 unmodified lines
609 delta = lapic_cal_t1 - lapic_cal_t2;582 delta = lapic_cal_t1 - lapic_cal_t2;
610 apic_printk(APIC_VERBOSE, "... lapic delta = %ld\n", delta);583 apic_printk(APIC_VERBOSE, "... lapic delta = %ld\n", delta);
611 584
585 deltatsc = (long)(lapic_cal_tsc2 - lapic_cal_tsc1);
586
612 /* we trust the PM based calibration if possible */587 /* we trust the PM based calibration if possible */
613 pm_referenced = !calibrate_by_pmtimer(lapic_cal_pm2 - lapic_cal_pm1,588 pm_referenced = !calibrate_by_pmtimer(lapic_cal_pm2 - lapic_cal_pm1,
614 &delta);589 &delta, &deltatsc);
615 590
616 /* Calculate the scaled math multiplication factor */591 /* Calculate the scaled math multiplication factor */
617 lapic_clockevent.mult = div_sc(delta, TICK_NSEC * LAPIC_CAL_LOOPS,592 lapic_clockevent.mult = div_sc(delta, TICK_NSEC * LAPIC_CAL_LOOPS,
@@ -629,11 +604,10 @@ static int __init calibrate_APIC_clock(void) · 11 unmodified lines
629 calibration_result);604 calibration_result);
630 605
631 if (cpu_has_tsc) {606 if (cpu_has_tsc) {
632 delta = (long)(lapic_cal_tsc2 - lapic_cal_tsc1);
633 apic_printk(APIC_VERBOSE, "..... CPU clock speed is "607 apic_printk(APIC_VERBOSE, "..... CPU clock speed is "
634 "%ld.%04ld MHz.\n",608 "%ld.%04ld MHz.\n",
635 (delta / LAPIC_CAL_LOOPS) / (1000000 / HZ),609 (deltatsc / LAPIC_CAL_LOOPS) / (1000000 / HZ),
636 (delta / LAPIC_CAL_LOOPS) % (1000000 / HZ));610 (deltatsc / LAPIC_CAL_LOOPS) % (1000000 / HZ));
637 }611 }
638 612
639 apic_printk(APIC_VERBOSE, "..... host bus clock speed is "613 apic_printk(APIC_VERBOSE, "..... host bus clock speed is "
@@ -991,11 +965,11 @@ int __init verify_local_APIC(void) · 351 unmodified lines
991 */965 */
992 reg0 = apic_read(APIC_ID);966 reg0 = apic_read(APIC_ID);
993 apic_printk(APIC_DEBUG, "Getting ID: %x\n", reg0);967 apic_printk(APIC_DEBUG, "Getting ID: %x\n", reg0);
994 apic_write(APIC_ID, reg0 ^ APIC_ID_MASK);968 apic_write(APIC_ID, reg0 ^ apic->apic_id_mask);
995 reg1 = apic_read(APIC_ID);969 reg1 = apic_read(APIC_ID);
996 apic_printk(APIC_DEBUG, "Getting ID: %x\n", reg1);970 apic_printk(APIC_DEBUG, "Getting ID: %x\n", reg1);
997 apic_write(APIC_ID, reg0);971 apic_write(APIC_ID, reg0);
998 if (reg1 != (reg0 ^ APIC_ID_MASK))972 if (reg1 != (reg0 ^ apic->apic_id_mask))
999 return 0;973 return 0;
1000 974
1001 /*975 /*
@@ -1089,7 +1063,7 @@ static void __cpuinit lapic_setup_esr(void) · 87 unmodified lines
1089 return;1063 return;
1090 }1064 }
1091 1065
1092 if (esr_disable) {1066 if (apic->disable_esr) {
1093 /*1067 /*
1094 * Something untraceable is creating bad interrupts on1068 * Something untraceable is creating bad interrupts on
1095 * secondary quads ... for the moment, just leave the1069 * secondary quads ... for the moment, just leave the
@@ -1130,9 +1104,14 @@ void __cpuinit setup_local_APIC(void) · 34 unmodified lines
1130 unsigned int value;1104 unsigned int value;
1131 int i, j;1105 int i, j;
1132 1106
1107 if (disable_apic) {
1108 arch_disable_smp_support();
1109 return;
1110 }
1111
1133#ifdef CONFIG_X86_321112#ifdef CONFIG_X86_32
1134 /* Pound the ESR really hard over the head with a big hammer - mbligh */1113 /* Pound the ESR really hard over the head with a big hammer - mbligh */
1135 if (lapic_is_integrated() && esr_disable) {1114 if (lapic_is_integrated() && apic->disable_esr) {
1136 apic_write(APIC_ESR, 0);1115 apic_write(APIC_ESR, 0);
1137 apic_write(APIC_ESR, 0);1116 apic_write(APIC_ESR, 0);
1138 apic_write(APIC_ESR, 0);1117 apic_write(APIC_ESR, 0);
@@ -1146,7 +1125,7 @@ void __cpuinit setup_local_APIC(void) · 7 unmodified lines
1146 * Double-check whether this APIC is really registered.1125 * Double-check whether this APIC is really registered.
1147 * This is meaningless in clustered apic mode, so we skip it.1126 * This is meaningless in clustered apic mode, so we skip it.
1148 */1127 */
1149 if (!apic_id_registered())1128 if (!apic->apic_id_registered())
1150 BUG();1129 BUG();
1151 1130
1152 /*1131 /*
@@ -1154,7 +1133,7 @@ void __cpuinit setup_local_APIC(void) · 1 unmodified line
1154 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel1133 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
1155 * document number 292116). So here it goes...1134 * document number 292116). So here it goes...
1156 */1135 */
1157 init_apic_ldr();1136 apic->init_apic_ldr();
1158 1137
1159 /*1138 /*
1160 * Set Task Priority to 'accept all'. We never change this1139 * Set Task Priority to 'accept all'. We never change this
@@ -1282,17 +1261,12 @@ void __cpuinit end_local_APIC_setup(void) · 121 unmodified lines
1282 apic_pm_activate();1261 apic_pm_activate();
1283}1262}
1284 1263
1285#ifdef HAVE_X2APIC1264#ifdef CONFIG_X86_X2APIC
1286void check_x2apic(void)1265void check_x2apic(void)
1287{1266{
1288 int msr, msr2;1267 if (x2apic_enabled()) {
1289
1290 rdmsr(MSR_IA32_APICBASE, msr, msr2);
1291
1292 if (msr & X2APIC_ENABLE) {
1293 pr_info("x2apic enabled by BIOS, switching to x2apic ops\n");1268 pr_info("x2apic enabled by BIOS, switching to x2apic ops\n");
1294 x2apic_preenabled = x2apic = 1;1269 x2apic_preenabled = x2apic = 1;
1295 apic_ops = &x2apic_ops;
1296 }1270 }
1297}1271}
1298 1272
@@ -1300,6 +1274,9 @@ void enable_x2apic(void) · 1 unmodified line
1300{1274{
1301 int msr, msr2;1275 int msr, msr2;
1302 1276
1277 if (!x2apic)
1278 return;
1279
1303 rdmsr(MSR_IA32_APICBASE, msr, msr2);1280 rdmsr(MSR_IA32_APICBASE, msr, msr2);
1304 if (!(msr & X2APIC_ENABLE)) {1281 if (!(msr & X2APIC_ENABLE)) {
1305 pr_info("Enabling x2apic\n");1282 pr_info("Enabling x2apic\n");
@@ -1363,7 +1340,6 @@ void __init enable_IR_x2apic(void) · 57 unmodified lines
1363 1340
1364 if (!x2apic) {1341 if (!x2apic) {
1365 x2apic = 1;1342 x2apic = 1;
1366 apic_ops = &x2apic_ops;
1367 enable_x2apic();1343 enable_x2apic();
1368 }1344 }
1369 1345
@@ -1401,7 +1377,7 @@ end: · 31 unmodified lines
1401 1377
1402 return;1378 return;
1403}1379}
1404#endif /* HAVE_X2APIC */1380#endif /* CONFIG_X86_X2APIC */
1405 1381
1406#ifdef CONFIG_X86_641382#ifdef CONFIG_X86_64
1407/*1383/*
@@ -1532,7 +1508,7 @@ void __init early_init_lapic_mapping(void) · 124 unmodified lines
1532 */1508 */
1533void __init init_apic_mappings(void)1509void __init init_apic_mappings(void)
1534{1510{
1535#ifdef HAVE_X2APIC1511#ifdef CONFIG_X86_X2APIC
1536 if (x2apic) {1512 if (x2apic) {
1537 boot_cpu_physical_apicid = read_apic_id();1513 boot_cpu_physical_apicid = read_apic_id();
1538 return;1514 return;
@@ -1570,11 +1546,11 @@ int apic_version[MAX_APICS]; · 31 unmodified lines
1570 1546
1571int __init APIC_init_uniprocessor(void)1547int __init APIC_init_uniprocessor(void)
1572{1548{
1573#ifdef CONFIG_X86_64
1574 if (disable_apic) {1549 if (disable_apic) {
1575 pr_info("Apic disabled\n");1550 pr_info("Apic disabled\n");
1576 return -1;1551 return -1;
1577 }1552 }
1553#ifdef CONFIG_X86_64
1578 if (!cpu_has_apic) {1554 if (!cpu_has_apic) {
1579 disable_apic = 1;1555 disable_apic = 1;
1580 pr_info("Apic disabled by BIOS\n");1556 pr_info("Apic disabled by BIOS\n");
@@ -1596,11 +1572,9 @@ int __init APIC_init_uniprocessor(void) · 15 unmodified lines
1596 }1572 }
1597#endif1573#endif
1598 1574
1599#ifdef HAVE_X2APIC
1600 enable_IR_x2apic();1575 enable_IR_x2apic();
1601#endif
1602#ifdef CONFIG_X86_641576#ifdef CONFIG_X86_64
1603 setup_apic_routing();1577 default_setup_apic_routing();
1604#endif1578#endif
1605 1579
1606 verify_local_APIC();1580 verify_local_APIC();
@@ -1621,35 +1595,31 @@ int __init APIC_init_uniprocessor(void) · 14 unmodified lines
1621 physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map);1595 physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map);
1622 setup_local_APIC();1596 setup_local_APIC();
1623 1597
1624#ifdef CONFIG_X86_641598#ifdef CONFIG_X86_IO_APIC
1625 /*1599 /*
1626 * Now enable IO-APICs, actually call clear_IO_APIC1600 * Now enable IO-APICs, actually call clear_IO_APIC
1627 * We need clear_IO_APIC before enabling vector on BP1601 * We need clear_IO_APIC before enabling error vector
1628 */1602 */
1629 if (!skip_ioapic_setup && nr_ioapics)1603 if (!skip_ioapic_setup && nr_ioapics)
1630 enable_IO_APIC();1604 enable_IO_APIC();
1631#endif1605#endif
1632 1606
1633#ifdef CONFIG_X86_IO_APIC
1634 if (!smp_found_config || skip_ioapic_setup || !nr_ioapics)
1635#endif
1636 localise_nmi_watchdog();
1637 end_local_APIC_setup();1607 end_local_APIC_setup();
1638 1608
1639#ifdef CONFIG_X86_IO_APIC1609#ifdef CONFIG_X86_IO_APIC
1640 if (smp_found_config && !skip_ioapic_setup && nr_ioapics)1610 if (smp_found_config && !skip_ioapic_setup && nr_ioapics)
1641 setup_IO_APIC();1611 setup_IO_APIC();
1642# ifdef CONFIG_X86_641612 else {
1643 else
1644 nr_ioapics = 0;1613 nr_ioapics = 0;
1645# endif1614 localise_nmi_watchdog();
1615 }
1616#else
1617 localise_nmi_watchdog();
1646#endif1618#endif
1647 1619
1620 setup_boot_clock();
1648#ifdef CONFIG_X86_641621#ifdef CONFIG_X86_64
1649 setup_boot_APIC_clock();
1650 check_nmi_watchdog();1622 check_nmi_watchdog();
1651#else
1652 setup_boot_clock();
1653#endif1623#endif
1654 1624
1655 return 0;1625 return 0;
@@ -1738,7 +1708,8 @@ void __init connect_bsp_APIC(void) · 82 unmodified lines
1738 outb(0x01, 0x23);1708 outb(0x01, 0x23);
1739 }1709 }
1740#endif1710#endif
1741 enable_apic_mode();1711 if (apic->enable_apic_mode)
1712 apic->enable_apic_mode();
1742}1713}
1743 1714
1744/**1715/**
@@ -1876,29 +1847,39 @@ void __cpuinit generic_processor_info(int apicid, int version) · 131 unmodified lines
1876 }1847 }
1877#endif1848#endif
1878 1849
1879#if defined(CONFIG_X86_SMP) || defined(CONFIG_X86_64)1850#if defined(CONFIG_SMP) || defined(CONFIG_X86_64)
1880 /* are we being called early in kernel startup? */1851 early_per_cpu(x86_cpu_to_apicid, cpu) = apicid;
1881 if (early_per_cpu_ptr(x86_cpu_to_apicid)) {1852 early_per_cpu(x86_bios_cpu_apicid, cpu) = apicid;
1882 u16 *cpu_to_apicid = early_per_cpu_ptr(x86_cpu_to_apicid);
1883 u16 *bios_cpu_apicid = early_per_cpu_ptr(x86_bios_cpu_apicid);
1884
1885 cpu_to_apicid[cpu] = apicid;
1886 bios_cpu_apicid[cpu] = apicid;
1887 } else {
1888 per_cpu(x86_cpu_to_apicid, cpu) = apicid;
1889 per_cpu(x86_bios_cpu_apicid, cpu) = apicid;
1890 }
1891#endif1853#endif
1892 1854
1893 set_cpu_possible(cpu, true);1855 set_cpu_possible(cpu, true);
1894 set_cpu_present(cpu, true);1856 set_cpu_present(cpu, true);
1895}1857}
1896 1858
1897#ifdef CONFIG_X86_64
1898int hard_smp_processor_id(void)1859int hard_smp_processor_id(void)
1899{1860{
1900 return read_apic_id();1861 return read_apic_id();
1901}1862}
1863
1864void default_init_apic_ldr(void)
1865{
1866 unsigned long val;
1867
1868 apic_write(APIC_DFR, APIC_DFR_VALUE);
1869 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
1870 val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id());
1871 apic_write(APIC_LDR, val);
1872}
1873
1874#ifdef CONFIG_X86_32
1875int default_apicid_to_node(int logical_apicid)
1876{
1877#ifdef CONFIG_SMP
1878 return apicid_2_node[hard_smp_processor_id()];
1879#else
1880 return 0;
1881#endif
1882}
1902#endif1883#endif
1903 1884
1904/*1885/*
@@ -1976,7 +1957,7 @@ static int lapic_resume(struct sys_device *dev) · 71 unmodified lines
1976 1957
1977 local_irq_save(flags);1958 local_irq_save(flags);
1978 1959
1979#ifdef HAVE_X2APIC1960#ifdef CONFIG_X86_X2APIC
1980 if (x2apic)1961 if (x2apic)
1981 enable_x2apic();1962 enable_x2apic();
1982 else1963 else
arch/x86/kernel/apic/apic_flat_64.crenamed from arch/x86/kernel/genapic_flat_64.c+136−56
@@ -17,9 +17,8 @@ · 16 unmodified lines
17#include <linux/init.h>17#include <linux/init.h>
18#include <linux/hardirq.h>18#include <linux/hardirq.h>
19#include <asm/smp.h>19#include <asm/smp.h>
20#include <asm/apic.h>
20#include <asm/ipi.h>21#include <asm/ipi.h>
21#include <asm/genapic.h>
22#include <mach_apicdef.h>
23 22
24#ifdef CONFIG_ACPI23#ifdef CONFIG_ACPI
25#include <acpi/acpi_bus.h>24#include <acpi/acpi_bus.h>
@@ -74,7 +73,7 @@ static inline void _flat_send_IPI_mask(unsigned long mask, int vector) · 48 unmodified lines
74 unsigned long flags;73 unsigned long flags;
75 74
76 local_irq_save(flags);75 local_irq_save(flags);
77 __send_IPI_dest_field(mask, vector, APIC_DEST_LOGICAL);76 __default_send_IPI_dest_field(mask, vector, apic->dest_logical);
78 local_irq_restore(flags);77 local_irq_restore(flags);
79}78}
80 79
@@ -85,14 +84,15 @@ static void flat_send_IPI_mask(const struct cpumask *cpumask, int vector) · 4 unmodified lines
85 _flat_send_IPI_mask(mask, vector);84 _flat_send_IPI_mask(mask, vector);
86}85}
87 86
88static void flat_send_IPI_mask_allbutself(const struct cpumask *cpumask,87static void
89 int vector)88 flat_send_IPI_mask_allbutself(const struct cpumask *cpumask, int vector)
90{89{
91 unsigned long mask = cpumask_bits(cpumask)[0];90 unsigned long mask = cpumask_bits(cpumask)[0];
92 int cpu = smp_processor_id();91 int cpu = smp_processor_id();
93 92
94 if (cpu < BITS_PER_LONG)93 if (cpu < BITS_PER_LONG)
95 clear_bit(cpu, &mask);94 clear_bit(cpu, &mask);
95
96 _flat_send_IPI_mask(mask, vector);96 _flat_send_IPI_mask(mask, vector);
97}97}
98 98
@@ -114,23 +114,27 @@ static void flat_send_IPI_allbutself(int vector) · 15 unmodified lines
114 _flat_send_IPI_mask(mask, vector);114 _flat_send_IPI_mask(mask, vector);
115 }115 }
116 } else if (num_online_cpus() > 1) {116 } else if (num_online_cpus() > 1) {
117 __send_IPI_shortcut(APIC_DEST_ALLBUT, vector,APIC_DEST_LOGICAL);117 __default_send_IPI_shortcut(APIC_DEST_ALLBUT,
118 vector, apic->dest_logical);
118 }119 }
119}120}
120 121
121static void flat_send_IPI_all(int vector)122static void flat_send_IPI_all(int vector)
122{123{
123 if (vector == NMI_VECTOR)124 if (vector == NMI_VECTOR) {
124 flat_send_IPI_mask(cpu_online_mask, vector);125 flat_send_IPI_mask(cpu_online_mask, vector);
125 else126 } else {
126 __send_IPI_shortcut(APIC_DEST_ALLINC, vector, APIC_DEST_LOGICAL);127 __default_send_IPI_shortcut(APIC_DEST_ALLINC,
128 vector, apic->dest_logical);
129 }
127}130}
128 131
129static unsigned int get_apic_id(unsigned long x)132static unsigned int flat_get_apic_id(unsigned long x)
130{133{
131 unsigned int id;134 unsigned int id;
132 135
133 id = (((x)>>24) & 0xFFu);136 id = (((x)>>24) & 0xFFu);
137
134 return id;138 return id;
135}139}
136 140
@@ -146,7 +150,7 @@ static unsigned int read_xapic_id(void) · 9 unmodified lines
146{150{
147 unsigned int id;151 unsigned int id;
148 152
149 id = get_apic_id(apic_read(APIC_ID));153 id = flat_get_apic_id(apic_read(APIC_ID));
150 return id;154 return id;
151}155}
152 156
@@ -169,31 +173,67 @@ static unsigned int flat_cpu_mask_to_apicid_and(const struct cpumask *cpumask, · 16 unmodified lines
169 return mask1 & mask2;173 return mask1 & mask2;
170}174}
171 175
172static unsigned int phys_pkg_id(int index_msb)176static int flat_phys_pkg_id(int initial_apic_id, int index_msb)
173{177{
174 return hard_smp_processor_id() >> index_msb;178 return hard_smp_processor_id() >> index_msb;
175}179}
176 180
177struct genapic apic_flat = {181struct apic apic_flat = {
178 .name = "flat",182 .name = "flat",
179 .acpi_madt_oem_check = flat_acpi_madt_oem_check,183 .probe = NULL,
180 .int_delivery_mode = dest_LowestPrio,184 .acpi_madt_oem_check = flat_acpi_madt_oem_check,
181 .int_dest_mode = (APIC_DEST_LOGICAL != 0),185 .apic_id_registered = flat_apic_id_registered,
182 .target_cpus = flat_target_cpus,186
183 .vector_allocation_domain = flat_vector_allocation_domain,187 .irq_delivery_mode = dest_LowestPrio,
184 .apic_id_registered = flat_apic_id_registered,188 .irq_dest_mode = 1, /* logical */
185 .init_apic_ldr = flat_init_apic_ldr,189
186 .send_IPI_all = flat_send_IPI_all,190 .target_cpus = flat_target_cpus,
187 .send_IPI_allbutself = flat_send_IPI_allbutself,191 .disable_esr = 0,
188 .send_IPI_mask = flat_send_IPI_mask,192 .dest_logical = APIC_DEST_LOGICAL,
189 .send_IPI_mask_allbutself = flat_send_IPI_mask_allbutself,193 .check_apicid_used = NULL,
190 .send_IPI_self = apic_send_IPI_self,194 .check_apicid_present = NULL,
191 .cpu_mask_to_apicid = flat_cpu_mask_to_apicid,195
192 .cpu_mask_to_apicid_and = flat_cpu_mask_to_apicid_and,196 .vector_allocation_domain = flat_vector_allocation_domain,
193 .phys_pkg_id = phys_pkg_id,197 .init_apic_ldr = flat_init_apic_ldr,
194 .get_apic_id = get_apic_id,198
195 .set_apic_id = set_apic_id,199 .ioapic_phys_id_map = NULL,
196 .apic_id_mask = (0xFFu<<24),200 .setup_apic_routing = NULL,
201 .multi_timer_check = NULL,
202 .apicid_to_node = NULL,
203 .cpu_to_logical_apicid = NULL,
204 .cpu_present_to_apicid = default_cpu_present_to_apicid,
205 .apicid_to_cpu_present = NULL,
206 .setup_portio_remap = NULL,
207 .check_phys_apicid_present = default_check_phys_apicid_present,
208 .enable_apic_mode = NULL,
209 .phys_pkg_id = flat_phys_pkg_id,
210 .mps_oem_check = NULL,
211
212 .get_apic_id = flat_get_apic_id,
213 .set_apic_id = set_apic_id,
214 .apic_id_mask = 0xFFu << 24,
215
216 .cpu_mask_to_apicid = flat_cpu_mask_to_apicid,
217 .cpu_mask_to_apicid_and = flat_cpu_mask_to_apicid_and,
218
219 .send_IPI_mask = flat_send_IPI_mask,
220 .send_IPI_mask_allbutself = flat_send_IPI_mask_allbutself,
221 .send_IPI_allbutself = flat_send_IPI_allbutself,
222 .send_IPI_all = flat_send_IPI_all,
223 .send_IPI_self = apic_send_IPI_self,
224
225 .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
226 .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
227 .wait_for_init_deassert = NULL,
228 .smp_callin_clear_local_apic = NULL,
229 .inquire_remote_apic = NULL,
230
231 .read = native_apic_mem_read,
232 .write = native_apic_mem_write,
233 .icr_read = native_apic_icr_read,
234 .icr_write = native_apic_icr_write,
235 .wait_icr_idle = native_apic_wait_icr_idle,
236 .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
197};237};
198 238
199/*239/*
@@ -232,18 +272,18 @@ static void physflat_vector_allocation_domain(int cpu, struct cpumask *retmask) · 32 unmodified lines
232 272
233static void physflat_send_IPI_mask(const struct cpumask *cpumask, int vector)273static void physflat_send_IPI_mask(const struct cpumask *cpumask, int vector)
234{274{
235 send_IPI_mask_sequence(cpumask, vector);275 default_send_IPI_mask_sequence_phys(cpumask, vector);
236}276}
237 277
238static void physflat_send_IPI_mask_allbutself(const struct cpumask *cpumask,278static void physflat_send_IPI_mask_allbutself(const struct cpumask *cpumask,
239 int vector)279 int vector)
240{280{
241 send_IPI_mask_allbutself(cpumask, vector);281 default_send_IPI_mask_allbutself_phys(cpumask, vector);
242}282}
243 283
244static void physflat_send_IPI_allbutself(int vector)284static void physflat_send_IPI_allbutself(int vector)
245{285{
246 send_IPI_mask_allbutself(cpu_online_mask, vector);286 default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector);
247}287}
248 288
249static void physflat_send_IPI_all(int vector)289static void physflat_send_IPI_all(int vector)
@@ -276,32 +316,72 @@ physflat_cpu_mask_to_apicid_and(const struct cpumask *cpumask, · 26 unmodified lines
276 * We're using fixed IRQ delivery, can only return one phys APIC ID.316 * We're using fixed IRQ delivery, can only return one phys APIC ID.
277 * May as well be the first.317 * May as well be the first.
278 */318 */
279 for_each_cpu_and(cpu, cpumask, andmask)319 for_each_cpu_and(cpu, cpumask, andmask) {
280 if (cpumask_test_cpu(cpu, cpu_online_mask))320 if (cpumask_test_cpu(cpu, cpu_online_mask))
281 break;321 break;
322 }
282 if (cpu < nr_cpu_ids)323 if (cpu < nr_cpu_ids)
283 return per_cpu(x86_cpu_to_apicid, cpu);324 return per_cpu(x86_cpu_to_apicid, cpu);
325
284 return BAD_APICID;326 return BAD_APICID;
285}327}
286 328
287struct genapic apic_physflat = {329struct apic apic_physflat = {
288 .name = "physical flat",330
289 .acpi_madt_oem_check = physflat_acpi_madt_oem_check,331 .name = "physical flat",
290 .int_delivery_mode = dest_Fixed,332 .probe = NULL,
291 .int_dest_mode = (APIC_DEST_PHYSICAL != 0),333 .acpi_madt_oem_check = physflat_acpi_madt_oem_check,
292 .target_cpus = physflat_target_cpus,334 .apic_id_registered = flat_apic_id_registered,
293 .vector_allocation_domain = physflat_vector_allocation_domain,335
294 .apic_id_registered = flat_apic_id_registered,336 .irq_delivery_mode = dest_Fixed,
295 .init_apic_ldr = flat_init_apic_ldr,/*not needed, but shouldn't hurt*/337 .irq_dest_mode = 0, /* physical */
296 .send_IPI_all = physflat_send_IPI_all,338
297 .send_IPI_allbutself = physflat_send_IPI_allbutself,339 .target_cpus = physflat_target_cpus,
298 .send_IPI_mask = physflat_send_IPI_mask,340 .disable_esr = 0,
299 .send_IPI_mask_allbutself = physflat_send_IPI_mask_allbutself,341 .dest_logical = 0,
300 .send_IPI_self = apic_send_IPI_self,342 .check_apicid_used = NULL,
301 .cpu_mask_to_apicid = physflat_cpu_mask_to_apicid,343 .check_apicid_present = NULL,
302 .cpu_mask_to_apicid_and = physflat_cpu_mask_to_apicid_and,344
303 .phys_pkg_id = phys_pkg_id,345 .vector_allocation_domain = physflat_vector_allocation_domain,
304 .get_apic_id = get_apic_id,346 /* not needed, but shouldn't hurt: */
305 .set_apic_id = set_apic_id,347 .init_apic_ldr = flat_init_apic_ldr,
306 .apic_id_mask = (0xFFu<<24),348
349 .ioapic_phys_id_map = NULL,
350 .setup_apic_routing = NULL,
351 .multi_timer_check = NULL,
352 .apicid_to_node = NULL,
353 .cpu_to_logical_apicid = NULL,
354 .cpu_present_to_apicid = default_cpu_present_to_apicid,
355 .apicid_to_cpu_present = NULL,
356 .setup_portio_remap = NULL,
357 .check_phys_apicid_present = default_check_phys_apicid_present,
358 .enable_apic_mode = NULL,
359 .phys_pkg_id = flat_phys_pkg_id,
360 .mps_oem_check = NULL,
361
362 .get_apic_id = flat_get_apic_id,
363 .set_apic_id = set_apic_id,
364 .apic_id_mask = 0xFFu << 24,
365
366 .cpu_mask_to_apicid = physflat_cpu_mask_to_apicid,
367 .cpu_mask_to_apicid_and = physflat_cpu_mask_to_apicid_and,
368
369 .send_IPI_mask = physflat_send_IPI_mask,
370 .send_IPI_mask_allbutself = physflat_send_IPI_mask_allbutself,
371 .send_IPI_allbutself = physflat_send_IPI_allbutself,
372 .send_IPI_all = physflat_send_IPI_all,
373 .send_IPI_self = apic_send_IPI_self,
374
375 .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
376 .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
377 .wait_for_init_deassert = NULL,
378 .smp_callin_clear_local_apic = NULL,
379 .inquire_remote_apic = NULL,
380
381 .read = native_apic_mem_read,
382 .write = native_apic_mem_write,
383 .icr_read = native_apic_icr_read,
384 .icr_write = native_apic_icr_write,
385 .wait_icr_idle = native_apic_wait_icr_idle,
386 .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
307};387};
arch/x86/kernel/apic/bigsmp_32.c+267−0
@@ -0,0 +1,267 @@
1/*
2 * APIC driver for "bigsmp" xAPIC machines with more than 8 virtual CPUs.
3 *
4 * Drives the local APIC in "clustered mode".
5 */
6#include <linux/threads.h>
7#include <linux/cpumask.h>
8#include <linux/kernel.h>
9#include <linux/init.h>
10#include <linux/dmi.h>
11#include <linux/smp.h>
12
13#include <asm/apicdef.h>
14#include <asm/fixmap.h>
15#include <asm/mpspec.h>
16#include <asm/apic.h>
17#include <asm/ipi.h>
18
19static unsigned bigsmp_get_apic_id(unsigned long x)
20{
21 return (x >> 24) & 0xFF;
22}
23
24static int bigsmp_apic_id_registered(void)
25{
26 return 1;
27}
28
29static const cpumask_t *bigsmp_target_cpus(void)
30{
31#ifdef CONFIG_SMP
32 return &cpu_online_map;
33#else
34 return &cpumask_of_cpu(0);
35#endif
36}
37
38static unsigned long bigsmp_check_apicid_used(physid_mask_t bitmap, int apicid)
39{
40 return 0;
41}
42
43static unsigned long bigsmp_check_apicid_present(int bit)
44{
45 return 1;
46}
47
48static inline unsigned long calculate_ldr(int cpu)
49{
50 unsigned long val, id;
51
52 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
53 id = per_cpu(x86_bios_cpu_apicid, cpu);
54 val |= SET_APIC_LOGICAL_ID(id);
55
56 return val;
57}
58
59/*
60 * Set up the logical destination ID.
61 *
62 * Intel recommends to set DFR, LDR and TPR before enabling
63 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
64 * document number 292116). So here it goes...
65 */
66static void bigsmp_init_apic_ldr(void)
67{
68 unsigned long val;
69 int cpu = smp_processor_id();
70
71 apic_write(APIC_DFR, APIC_DFR_FLAT);
72 val = calculate_ldr(cpu);
73 apic_write(APIC_LDR, val);
74}
75
76static void bigsmp_setup_apic_routing(void)
77{
78 printk(KERN_INFO
79 "Enabling APIC mode: Physflat. Using %d I/O APICs\n",
80 nr_ioapics);
81}
82
83static int bigsmp_apicid_to_node(int logical_apicid)
84{
85 return apicid_2_node[hard_smp_processor_id()];
86}
87
88static int bigsmp_cpu_present_to_apicid(int mps_cpu)
89{
90 if (mps_cpu < nr_cpu_ids)
91 return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);
92
93 return BAD_APICID;
94}
95
96static physid_mask_t bigsmp_apicid_to_cpu_present(int phys_apicid)
97{
98 return physid_mask_of_physid(phys_apicid);
99}
100
101/* Mapping from cpu number to logical apicid */
102static inline int bigsmp_cpu_to_logical_apicid(int cpu)
103{
104 if (cpu >= nr_cpu_ids)
105 return BAD_APICID;
106 return cpu_physical_id(cpu);
107}
108
109static physid_mask_t bigsmp_ioapic_phys_id_map(physid_mask_t phys_map)
110{
111 /* For clustered we don't have a good way to do this yet - hack */
112 return physids_promote(0xFFL);
113}
114
115static int bigsmp_check_phys_apicid_present(int boot_cpu_physical_apicid)
116{
117 return 1;
118}
119
120/* As we are using single CPU as destination, pick only one CPU here */
121static unsigned int bigsmp_cpu_mask_to_apicid(const cpumask_t *cpumask)
122{
123 return bigsmp_cpu_to_logical_apicid(first_cpu(*cpumask));
124}
125
126static unsigned int bigsmp_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
127 const struct cpumask *andmask)
128{
129 int cpu;
130
131 /*
132 * We're using fixed IRQ delivery, can only return one phys APIC ID.
133 * May as well be the first.
134 */
135 for_each_cpu_and(cpu, cpumask, andmask) {
136 if (cpumask_test_cpu(cpu, cpu_online_mask))
137 break;
138 }
139 if (cpu < nr_cpu_ids)
140 return bigsmp_cpu_to_logical_apicid(cpu);
141
142 return BAD_APICID;
143}
144
145static int bigsmp_phys_pkg_id(int cpuid_apic, int index_msb)
146{
147 return cpuid_apic >> index_msb;
148}
149
150static inline void bigsmp_send_IPI_mask(const struct cpumask *mask, int vector)
151{
152 default_send_IPI_mask_sequence_phys(mask, vector);
153}
154
155static void bigsmp_send_IPI_allbutself(int vector)
156{
157 default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector);
158}
159
160static void bigsmp_send_IPI_all(int vector)
161{
162 bigsmp_send_IPI_mask(cpu_online_mask, vector);
163}
164
165static int dmi_bigsmp; /* can be set by dmi scanners */
166
167static int hp_ht_bigsmp(const struct dmi_system_id *d)
168{
169 printk(KERN_NOTICE "%s detected: force use of apic=bigsmp\n", d->ident);
170 dmi_bigsmp = 1;
171
172 return 0;
173}
174
175
176static const struct dmi_system_id bigsmp_dmi_table[] = {
177 { hp_ht_bigsmp, "HP ProLiant DL760 G2",
178 { DMI_MATCH(DMI_BIOS_VENDOR, "HP"),
179 DMI_MATCH(DMI_BIOS_VERSION, "P44-"),
180 }
181 },
182
183 { hp_ht_bigsmp, "HP ProLiant DL740",
184 { DMI_MATCH(DMI_BIOS_VENDOR, "HP"),
185 DMI_MATCH(DMI_BIOS_VERSION, "P47-"),
186 }
187 },
188 { } /* NULL entry stops DMI scanning */
189};
190
191static void bigsmp_vector_allocation_domain(int cpu, cpumask_t *retmask)
192{
193 cpus_clear(*retmask);
194 cpu_set(cpu, *retmask);
195}
196
197static int probe_bigsmp(void)
198{
199 if (def_to_bigsmp)
200 dmi_bigsmp = 1;
201 else
202 dmi_check_system(bigsmp_dmi_table);
203
204 return dmi_bigsmp;
205}
206
207struct apic apic_bigsmp = {
208
209 .name = "bigsmp",
210 .probe = probe_bigsmp,
211 .acpi_madt_oem_check = NULL,
212 .apic_id_registered = bigsmp_apic_id_registered,
213
214 .irq_delivery_mode = dest_Fixed,
215 /* phys delivery to target CPU: */
216 .irq_dest_mode = 0,
217
218 .target_cpus = bigsmp_target_cpus,
219 .disable_esr = 1,
220 .dest_logical = 0,
221 .check_apicid_used = bigsmp_check_apicid_used,
222 .check_apicid_present = bigsmp_check_apicid_present,
223
224 .vector_allocation_domain = bigsmp_vector_allocation_domain,
225 .init_apic_ldr = bigsmp_init_apic_ldr,
226
227 .ioapic_phys_id_map = bigsmp_ioapic_phys_id_map,
228 .setup_apic_routing = bigsmp_setup_apic_routing,
229 .multi_timer_check = NULL,
230 .apicid_to_node = bigsmp_apicid_to_node,
231 .cpu_to_logical_apicid = bigsmp_cpu_to_logical_apicid,
232 .cpu_present_to_apicid = bigsmp_cpu_present_to_apicid,
233 .apicid_to_cpu_present = bigsmp_apicid_to_cpu_present,
234 .setup_portio_remap = NULL,
235 .check_phys_apicid_present = bigsmp_check_phys_apicid_present,
236 .enable_apic_mode = NULL,
237 .phys_pkg_id = bigsmp_phys_pkg_id,
238 .mps_oem_check = NULL,
239
240 .get_apic_id = bigsmp_get_apic_id,
241 .set_apic_id = NULL,
242 .apic_id_mask = 0xFF << 24,
243
244 .cpu_mask_to_apicid = bigsmp_cpu_mask_to_apicid,
245 .cpu_mask_to_apicid_and = bigsmp_cpu_mask_to_apicid_and,
246
247 .send_IPI_mask = bigsmp_send_IPI_mask,
248 .send_IPI_mask_allbutself = NULL,
249 .send_IPI_allbutself = bigsmp_send_IPI_allbutself,
250 .send_IPI_all = bigsmp_send_IPI_all,
251 .send_IPI_self = default_send_IPI_self,
252
253 .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
254 .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
255
256 .wait_for_init_deassert = default_wait_for_init_deassert,
257
258 .smp_callin_clear_local_apic = NULL,
259 .inquire_remote_apic = default_inquire_remote_apic,
260
261 .read = native_apic_mem_read,
262 .write = native_apic_mem_write,
263 .icr_read = native_apic_icr_read,
264 .icr_write = native_apic_icr_write,
265 .wait_icr_idle = native_apic_wait_icr_idle,
266 .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
267};
arch/x86/kernel/apic/es7000_32.c+780−0
@@ -0,0 +1,780 @@
1/*
2 * Written by: Garry Forsgren, Unisys Corporation
3 * Natalie Protasevich, Unisys Corporation
4 *
5 * This file contains the code to configure and interface
6 * with Unisys ES7000 series hardware system manager.
7 *
8 * Copyright (c) 2003 Unisys Corporation.
9 * Copyright (C) 2009, Red Hat, Inc., Ingo Molnar
10 *
11 * All Rights Reserved.
12 *
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of version 2 of the GNU General Public License as
15 * published by the Free Software Foundation.
16 *
17 * This program is distributed in the hope that it would be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
20 *
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write the Free Software Foundation, Inc., 59
23 * Temple Place - Suite 330, Boston MA 02111-1307, USA.
24 *
25 * Contact information: Unisys Corporation, Township Line & Union Meeting
26 * Roads-A, Unisys Way, Blue Bell, Pennsylvania, 19424, or:
27 *
28 * http://www.unisys.com
29 */
30#include <linux/notifier.h>
31#include <linux/spinlock.h>
32#include <linux/cpumask.h>
33#include <linux/threads.h>
34#include <linux/kernel.h>
35#include <linux/module.h>
36#include <linux/reboot.h>
37#include <linux/string.h>
38#include <linux/types.h>
39#include <linux/errno.h>
40#include <linux/acpi.h>
41#include <linux/init.h>
42#include <linux/nmi.h>
43#include <linux/smp.h>
44#include <linux/io.h>
45
46#include <asm/apicdef.h>
47#include <asm/atomic.h>
48#include <asm/fixmap.h>
49#include <asm/mpspec.h>
50#include <asm/setup.h>
51#include <asm/apic.h>
52#include <asm/ipi.h>
53
54/*
55 * ES7000 chipsets
56 */
57
58#define NON_UNISYS 0
59#define ES7000_CLASSIC 1
60#define ES7000_ZORRO 2
61
62#define MIP_REG 1
63#define MIP_PSAI_REG 4
64
65#define MIP_BUSY 1
66#define MIP_SPIN 0xf0000
67#define MIP_VALID 0x0100000000000000ULL
68#define MIP_SW_APIC 0x1020b
69
70#define MIP_PORT(val) ((val >> 32) & 0xffff)
71
72#define MIP_RD_LO(val) (val & 0xffffffff)
73
74struct mip_reg {
75 unsigned long long off_0x00;
76 unsigned long long off_0x08;
77 unsigned long long off_0x10;
78 unsigned long long off_0x18;
79 unsigned long long off_0x20;
80 unsigned long long off_0x28;
81 unsigned long long off_0x30;
82 unsigned long long off_0x38;
83};
84
85struct mip_reg_info {
86 unsigned long long mip_info;
87 unsigned long long delivery_info;
88 unsigned long long host_reg;
89 unsigned long long mip_reg;
90};
91
92struct psai {
93 unsigned long long entry_type;
94 unsigned long long addr;
95 unsigned long long bep_addr;
96};
97
98#ifdef CONFIG_ACPI
99
100struct es7000_oem_table {
101 struct acpi_table_header Header;
102 u32 OEMTableAddr;
103 u32 OEMTableSize;
104};
105
106static unsigned long oem_addrX;
107static unsigned long oem_size;
108
109#endif
110
111/*
112 * ES7000 Globals
113 */
114
115static volatile unsigned long *psai;
116static struct mip_reg *mip_reg;
117static struct mip_reg *host_reg;
118static int mip_port;
119static unsigned long mip_addr;
120static unsigned long host_addr;
121
122int es7000_plat;
123
124/*
125 * GSI override for ES7000 platforms.
126 */
127
128static unsigned int base;
129
130static int
131es7000_rename_gsi(int ioapic, int gsi)
132{
133 if (es7000_plat == ES7000_ZORRO)
134 return gsi;
135
136 if (!base) {
137 int i;
138 for (i = 0; i < nr_ioapics; i++)
139 base += nr_ioapic_registers[i];
140 }
141
142 if (!ioapic && (gsi < 16))
143 gsi += base;
144
145 return gsi;
146}
147
148static int wakeup_secondary_cpu_via_mip(int cpu, unsigned long eip)
149{
150 unsigned long vect = 0, psaival = 0;
151
152 if (psai == NULL)
153 return -1;
154
155 vect = ((unsigned long)__pa(eip)/0x1000) << 16;
156 psaival = (0x1000000 | vect | cpu);
157
158 while (*psai & 0x1000000)
159 ;
160
161 *psai = psaival;
162
163 return 0;
164}
165
166static int es7000_apic_is_cluster(void)
167{
168 /* MPENTIUMIII */
169 if (boot_cpu_data.x86 == 6 &&
170 (boot_cpu_data.x86_model >= 7 || boot_cpu_data.x86_model <= 11))
171 return 1;
172
173 return 0;
174}
175
176static void setup_unisys(void)
177{
178 /*
179 * Determine the generation of the ES7000 currently running.
180 *
181 * es7000_plat = 1 if the machine is a 5xx ES7000 box
182 * es7000_plat = 2 if the machine is a x86_64 ES7000 box
183 *
184 */
185 if (!(boot_cpu_data.x86 <= 15 && boot_cpu_data.x86_model <= 2))
186 es7000_plat = ES7000_ZORRO;
187 else
188 es7000_plat = ES7000_CLASSIC;
189 ioapic_renumber_irq = es7000_rename_gsi;
190}
191
192/*
193 * Parse the OEM Table:
194 */
195static int parse_unisys_oem(char *oemptr)
196{
197 int i;
198 int success = 0;
199 unsigned char type, size;
200 unsigned long val;
201 char *tp = NULL;
202 struct psai *psaip = NULL;
203 struct mip_reg_info *mi;
204 struct mip_reg *host, *mip;
205
206 tp = oemptr;
207
208 tp += 8;
209
210 for (i = 0; i <= 6; i++) {
211 type = *tp++;
212 size = *tp++;
213 tp -= 2;
214 switch (type) {
215 case MIP_REG:
216 mi = (struct mip_reg_info *)tp;
217 val = MIP_RD_LO(mi->host_reg);
218 host_addr = val;
219 host = (struct mip_reg *)val;
220 host_reg = __va(host);
221 val = MIP_RD_LO(mi->mip_reg);
222 mip_port = MIP_PORT(mi->mip_info);
223 mip_addr = val;
224 mip = (struct mip_reg *)val;
225 mip_reg = __va(mip);
226 pr_debug("es7000_mipcfg: host_reg = 0x%lx \n",
227 (unsigned long)host_reg);
228 pr_debug("es7000_mipcfg: mip_reg = 0x%lx \n",
229 (unsigned long)mip_reg);
230 success++;
231 break;
232 case MIP_PSAI_REG:
233 psaip = (struct psai *)tp;
234 if (tp != NULL) {
235 if (psaip->addr)
236 psai = __va(psaip->addr);
237 else
238 psai = NULL;
239 success++;
240 }
241 break;
242 default:
243 break;
244 }
245 tp += size;
246 }
247
248 if (success < 2)
249 es7000_plat = NON_UNISYS;
250 else
251 setup_unisys();
252
253 return es7000_plat;
254}
255
256#ifdef CONFIG_ACPI
257static int find_unisys_acpi_oem_table(unsigned long *oem_addr)
258{
259 struct acpi_table_header *header = NULL;
260 struct es7000_oem_table *table;
261 acpi_size tbl_size;
262 acpi_status ret;
263 int i = 0;
264
265 for (;;) {
266 ret = acpi_get_table_with_size("OEM1", i++, &header, &tbl_size);
267 if (!ACPI_SUCCESS(ret))
268 return -1;
269
270 if (!memcmp((char *) &header->oem_id, "UNISYS", 6))
271 break;
272
273 early_acpi_os_unmap_memory(header, tbl_size);
274 }
275
276 table = (void *)header;
277
278 oem_addrX = table->OEMTableAddr;
279 oem_size = table->OEMTableSize;
280
281 early_acpi_os_unmap_memory(header, tbl_size);
282
283 *oem_addr = (unsigned long)__acpi_map_table(oem_addrX, oem_size);
284
285 return 0;
286}
287
288static void unmap_unisys_acpi_oem_table(unsigned long oem_addr)
289{
290 if (!oem_addr)
291 return;
292
293 __acpi_unmap_table((char *)oem_addr, oem_size);
294}
295
296static int es7000_check_dsdt(void)
297{
298 struct acpi_table_header header;
299
300 if (ACPI_SUCCESS(acpi_get_table_header(ACPI_SIG_DSDT, 0, &header)) &&
301 !strncmp(header.oem_id, "UNISYS", 6))
302 return 1;
303 return 0;
304}
305
306static int es7000_acpi_ret;
307
308/* Hook from generic ACPI tables.c */
309static int es7000_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
310{
311 unsigned long oem_addr = 0;
312 int check_dsdt;
313 int ret = 0;
314
315 /* check dsdt at first to avoid clear fix_map for oem_addr */
316 check_dsdt = es7000_check_dsdt();
317
318 if (!find_unisys_acpi_oem_table(&oem_addr)) {
319 if (check_dsdt) {
320 ret = parse_unisys_oem((char *)oem_addr);
321 } else {
322 setup_unisys();
323 ret = 1;
324 }
325 /*
326 * we need to unmap it
327 */
328 unmap_unisys_acpi_oem_table(oem_addr);
329 }
330
331 es7000_acpi_ret = ret;
332
333 return ret && !es7000_apic_is_cluster();
334}
335
336static int es7000_acpi_madt_oem_check_cluster(char *oem_id, char *oem_table_id)
337{
338 int ret = es7000_acpi_ret;
339
340 return ret && es7000_apic_is_cluster();
341}
342
343#else /* !CONFIG_ACPI: */
344static int es7000_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
345{
346 return 0;
347}
348
349static int es7000_acpi_madt_oem_check_cluster(char *oem_id, char *oem_table_id)
350{
351 return 0;
352}
353#endif /* !CONFIG_ACPI */
354
355static void es7000_spin(int n)
356{
357 int i = 0;
358
359 while (i++ < n)
360 rep_nop();
361}
362
363static int es7000_mip_write(struct mip_reg *mip_reg)
364{
365 int status = 0;
366 int spin;
367
368 spin = MIP_SPIN;
369 while ((host_reg->off_0x38 & MIP_VALID) != 0) {
370 if (--spin <= 0) {
371 WARN(1, "Timeout waiting for Host Valid Flag\n");
372 return -1;
373 }
374 es7000_spin(MIP_SPIN);
375 }
376
377 memcpy(host_reg, mip_reg, sizeof(struct mip_reg));
378 outb(1, mip_port);
379
380 spin = MIP_SPIN;
381
382 while ((mip_reg->off_0x38 & MIP_VALID) == 0) {
383 if (--spin <= 0) {
384 WARN(1, "Timeout waiting for MIP Valid Flag\n");
385 return -1;
386 }
387 es7000_spin(MIP_SPIN);
388 }
389
390 status = (mip_reg->off_0x00 & 0xffff0000000000ULL) >> 48;
391 mip_reg->off_0x38 &= ~MIP_VALID;
392
393 return status;
394}
395
396static void es7000_enable_apic_mode(void)
397{
398 struct mip_reg es7000_mip_reg;
399 int mip_status;
400
401 if (!es7000_plat)
402 return;
403
404 printk(KERN_INFO "ES7000: Enabling APIC mode.\n");
405 memset(&es7000_mip_reg, 0, sizeof(struct mip_reg));
406 es7000_mip_reg.off_0x00 = MIP_SW_APIC;
407 es7000_mip_reg.off_0x38 = MIP_VALID;
408
409 while ((mip_status = es7000_mip_write(&es7000_mip_reg)) != 0)
410 WARN(1, "Command failed, status = %x\n", mip_status);
411}
412
413static void es7000_vector_allocation_domain(int cpu, cpumask_t *retmask)
414{
415 /* Careful. Some cpus do not strictly honor the set of cpus
416 * specified in the interrupt destination when using lowest
417 * priority interrupt delivery mode.
418 *
419 * In particular there was a hyperthreading cpu observed to
420 * deliver interrupts to the wrong hyperthread when only one
421 * hyperthread was specified in the interrupt desitination.
422 */
423 *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } };
424}
425
426
427static void es7000_wait_for_init_deassert(atomic_t *deassert)
428{
429 while (!atomic_read(deassert))
430 cpu_relax();
431}
432
433static unsigned int es7000_get_apic_id(unsigned long x)
434{
435 return (x >> 24) & 0xFF;
436}
437
438static void es7000_send_IPI_mask(const struct cpumask *mask, int vector)
439{
440 default_send_IPI_mask_sequence_phys(mask, vector);
441}
442
443static void es7000_send_IPI_allbutself(int vector)
444{
445 default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector);
446}
447
448static void es7000_send_IPI_all(int vector)
449{
450 es7000_send_IPI_mask(cpu_online_mask, vector);
451}
452
453static int es7000_apic_id_registered(void)
454{
455 return 1;
456}
457
458static const cpumask_t *target_cpus_cluster(void)
459{
460 return &CPU_MASK_ALL;
461}
462
463static const cpumask_t *es7000_target_cpus(void)
464{
465 return &cpumask_of_cpu(smp_processor_id());
466}
467
468static unsigned long
469es7000_check_apicid_used(physid_mask_t bitmap, int apicid)
470{
471 return 0;
472}
473static unsigned long es7000_check_apicid_present(int bit)
474{
475 return physid_isset(bit, phys_cpu_present_map);
476}
477
478static unsigned long calculate_ldr(int cpu)
479{
480 unsigned long id = per_cpu(x86_bios_cpu_apicid, cpu);
481
482 return SET_APIC_LOGICAL_ID(id);
483}
484
485/*
486 * Set up the logical destination ID.
487 *
488 * Intel recommends to set DFR, LdR and TPR before enabling
489 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
490 * document number 292116). So here it goes...
491 */
492static void es7000_init_apic_ldr_cluster(void)
493{
494 unsigned long val;
495 int cpu = smp_processor_id();
496
497 apic_write(APIC_DFR, APIC_DFR_CLUSTER);
498 val = calculate_ldr(cpu);
499 apic_write(APIC_LDR, val);
500}
501
502static void es7000_init_apic_ldr(void)
503{
504 unsigned long val;
505 int cpu = smp_processor_id();
506
507 apic_write(APIC_DFR, APIC_DFR_FLAT);
508 val = calculate_ldr(cpu);
509 apic_write(APIC_LDR, val);
510}
511
512static void es7000_setup_apic_routing(void)
513{
514 int apic = per_cpu(x86_bios_cpu_apicid, smp_processor_id());
515
516 printk(KERN_INFO
517 "Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n",
518 (apic_version[apic] == 0x14) ?
519 "Physical Cluster" : "Logical Cluster",
520 nr_ioapics, cpus_addr(*es7000_target_cpus())[0]);
521}
522
523static int es7000_apicid_to_node(int logical_apicid)
524{
525 return 0;
526}
527
528
529static int es7000_cpu_present_to_apicid(int mps_cpu)
530{
531 if (!mps_cpu)
532 return boot_cpu_physical_apicid;
533 else if (mps_cpu < nr_cpu_ids)
534 return per_cpu(x86_bios_cpu_apicid, mps_cpu);
535 else
536 return BAD_APICID;
537}
538
539static int cpu_id;
540
541static physid_mask_t es7000_apicid_to_cpu_present(int phys_apicid)
542{
543 physid_mask_t mask;
544
545 mask = physid_mask_of_physid(cpu_id);
546 ++cpu_id;
547
548 return mask;
549}
550
551/* Mapping from cpu number to logical apicid */
552static int es7000_cpu_to_logical_apicid(int cpu)
553{
554#ifdef CONFIG_SMP
555 if (cpu >= nr_cpu_ids)
556 return BAD_APICID;
557 return cpu_2_logical_apicid[cpu];
558#else
559 return logical_smp_processor_id();
560#endif
561}
562
563static physid_mask_t es7000_ioapic_phys_id_map(physid_mask_t phys_map)
564{
565 /* For clustered we don't have a good way to do this yet - hack */
566 return physids_promote(0xff);
567}
568
569static int es7000_check_phys_apicid_present(int cpu_physical_apicid)
570{
571 boot_cpu_physical_apicid = read_apic_id();
572 return 1;
573}
574
575static unsigned int es7000_cpu_mask_to_apicid(const cpumask_t *cpumask)
576{
577 unsigned int round = 0;
578 int cpu, uninitialized_var(apicid);
579
580 /*
581 * The cpus in the mask must all be on the apic cluster.
582 */
583 for_each_cpu(cpu, cpumask) {
584 int new_apicid = es7000_cpu_to_logical_apicid(cpu);
585
586 if (round && APIC_CLUSTER(apicid) != APIC_CLUSTER(new_apicid)) {
587 WARN(1, "Not a valid mask!");
588
589 return BAD_APICID;
590 }
591 apicid = new_apicid;
592 round++;
593 }
594 return apicid;
595}
596
597static unsigned int
598es7000_cpu_mask_to_apicid_and(const struct cpumask *inmask,
599 const struct cpumask *andmask)
600{
601 int apicid = es7000_cpu_to_logical_apicid(0);
602 cpumask_var_t cpumask;
603
604 if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC))
605 return apicid;
606
607 cpumask_and(cpumask, inmask, andmask);
608 cpumask_and(cpumask, cpumask, cpu_online_mask);
609 apicid = es7000_cpu_mask_to_apicid(cpumask);
610
611 free_cpumask_var(cpumask);
612
613 return apicid;
614}
615
616static int es7000_phys_pkg_id(int cpuid_apic, int index_msb)
617{
618 return cpuid_apic >> index_msb;
619}
620
621static int probe_es7000(void)
622{
623 /* probed later in mptable/ACPI hooks */
624 return 0;
625}
626
627static int es7000_mps_ret;
628static int es7000_mps_oem_check(struct mpc_table *mpc, char *oem,
629 char *productid)
630{
631 int ret = 0;
632
633 if (mpc->oemptr) {
634 struct mpc_oemtable *oem_table =
635 (struct mpc_oemtable *)mpc->oemptr;
636
637 if (!strncmp(oem, "UNISYS", 6))
638 ret = parse_unisys_oem((char *)oem_table);
639 }
640
641 es7000_mps_ret = ret;
642
643 return ret && !es7000_apic_is_cluster();
644}
645
646static int es7000_mps_oem_check_cluster(struct mpc_table *mpc, char *oem,
647 char *productid)
648{
649 int ret = es7000_mps_ret;
650
651 return ret && es7000_apic_is_cluster();
652}
653
654struct apic apic_es7000_cluster = {
655
656 .name = "es7000",
657 .probe = probe_es7000,
658 .acpi_madt_oem_check = es7000_acpi_madt_oem_check_cluster,
659 .apic_id_registered = es7000_apic_id_registered,
660
661 .irq_delivery_mode = dest_LowestPrio,
662 /* logical delivery broadcast to all procs: */
663 .irq_dest_mode = 1,
664
665 .target_cpus = target_cpus_cluster,
666 .disable_esr = 1,
667 .dest_logical = 0,
668 .check_apicid_used = es7000_check_apicid_used,
669 .check_apicid_present = es7000_check_apicid_present,
670
671 .vector_allocation_domain = es7000_vector_allocation_domain,
672 .init_apic_ldr = es7000_init_apic_ldr_cluster,
673
674 .ioapic_phys_id_map = es7000_ioapic_phys_id_map,
675 .setup_apic_routing = es7000_setup_apic_routing,
676 .multi_timer_check = NULL,
677 .apicid_to_node = es7000_apicid_to_node,
678 .cpu_to_logical_apicid = es7000_cpu_to_logical_apicid,
679 .cpu_present_to_apicid = es7000_cpu_present_to_apicid,
680 .apicid_to_cpu_present = es7000_apicid_to_cpu_present,
681 .setup_portio_remap = NULL,
682 .check_phys_apicid_present = es7000_check_phys_apicid_present,
683 .enable_apic_mode = es7000_enable_apic_mode,
684 .phys_pkg_id = es7000_phys_pkg_id,
685 .mps_oem_check = es7000_mps_oem_check_cluster,
686
687 .get_apic_id = es7000_get_apic_id,
688 .set_apic_id = NULL,
689 .apic_id_mask = 0xFF << 24,
690
691 .cpu_mask_to_apicid = es7000_cpu_mask_to_apicid,
692 .cpu_mask_to_apicid_and = es7000_cpu_mask_to_apicid_and,
693
694 .send_IPI_mask = es7000_send_IPI_mask,
695 .send_IPI_mask_allbutself = NULL,
696 .send_IPI_allbutself = es7000_send_IPI_allbutself,
697 .send_IPI_all = es7000_send_IPI_all,
698 .send_IPI_self = default_send_IPI_self,
699
700 .wakeup_secondary_cpu = wakeup_secondary_cpu_via_mip,
701
702 .trampoline_phys_low = 0x467,
703 .trampoline_phys_high = 0x469,
704
705 .wait_for_init_deassert = NULL,
706
707 /* Nothing to do for most platforms, since cleared by the INIT cycle: */
708 .smp_callin_clear_local_apic = NULL,
709 .inquire_remote_apic = default_inquire_remote_apic,
710
711 .read = native_apic_mem_read,
712 .write = native_apic_mem_write,
713 .icr_read = native_apic_icr_read,
714 .icr_write = native_apic_icr_write,
715 .wait_icr_idle = native_apic_wait_icr_idle,
716 .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
717};
718
719struct apic apic_es7000 = {
720
721 .name = "es7000",
722 .probe = probe_es7000,
723 .acpi_madt_oem_check = es7000_acpi_madt_oem_check,
724 .apic_id_registered = es7000_apic_id_registered,
725
726 .irq_delivery_mode = dest_Fixed,
727 /* phys delivery to target CPUs: */
728 .irq_dest_mode = 0,
729
730 .target_cpus = es7000_target_cpus,
731 .disable_esr = 1,
732 .dest_logical = 0,
733 .check_apicid_used = es7000_check_apicid_used,
734 .check_apicid_present = es7000_check_apicid_present,
735
736 .vector_allocation_domain = es7000_vector_allocation_domain,
737 .init_apic_ldr = es7000_init_apic_ldr,
738
739 .ioapic_phys_id_map = es7000_ioapic_phys_id_map,
740 .setup_apic_routing = es7000_setup_apic_routing,
741 .multi_timer_check = NULL,
742 .apicid_to_node = es7000_apicid_to_node,
743 .cpu_to_logical_apicid = es7000_cpu_to_logical_apicid,
744 .cpu_present_to_apicid = es7000_cpu_present_to_apicid,
745 .apicid_to_cpu_present = es7000_apicid_to_cpu_present,
746 .setup_portio_remap = NULL,
747 .check_phys_apicid_present = es7000_check_phys_apicid_present,
748 .enable_apic_mode = es7000_enable_apic_mode,
749 .phys_pkg_id = es7000_phys_pkg_id,
750 .mps_oem_check = es7000_mps_oem_check,
751
752 .get_apic_id = es7000_get_apic_id,
753 .set_apic_id = NULL,
754 .apic_id_mask = 0xFF << 24,
755
756 .cpu_mask_to_apicid = es7000_cpu_mask_to_apicid,
757 .cpu_mask_to_apicid_and = es7000_cpu_mask_to_apicid_and,
758
759 .send_IPI_mask = es7000_send_IPI_mask,
760 .send_IPI_mask_allbutself = NULL,
761 .send_IPI_allbutself = es7000_send_IPI_allbutself,
762 .send_IPI_all = es7000_send_IPI_all,
763 .send_IPI_self = default_send_IPI_self,
764
765 .trampoline_phys_low = 0x467,
766 .trampoline_phys_high = 0x469,
767
768 .wait_for_init_deassert = es7000_wait_for_init_deassert,
769
770 /* Nothing to do for most platforms, since cleared by the INIT cycle: */
771 .smp_callin_clear_local_apic = NULL,
772 .inquire_remote_apic = default_inquire_remote_apic,
773
774 .read = native_apic_mem_read,
775 .write = native_apic_mem_write,
776 .icr_read = native_apic_icr_read,
777 .icr_write = native_apic_icr_write,
778 .wait_icr_idle = native_apic_wait_icr_idle,
779 .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
780};
arch/x86/kernel/apic/io_apic.crenamed from arch/x86/kernel/io_apic.c+217−226
@@ -1,7 +1,7 @@
1/*1/*
2 * Intel IO-APIC support for multi-Pentium hosts.2 * Intel IO-APIC support for multi-Pentium hosts.
3 *3 *
4 * Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar, Hajnalka Szabo4 * Copyright (C) 1997, 1998, 1999, 2000, 2009 Ingo Molnar, Hajnalka Szabo
5 *5 *
6 * Many thanks to Stig Venaas for trying out countless experimental6 * Many thanks to Stig Venaas for trying out countless experimental
7 * patches and reporting/debugging problems patiently!7 * patches and reporting/debugging problems patiently!
@@ -46,6 +46,7 @@ · 38 unmodified lines
46#include <asm/idle.h>46#include <asm/idle.h>
47#include <asm/io.h>47#include <asm/io.h>
48#include <asm/smp.h>48#include <asm/smp.h>
49#include <asm/cpu.h>
49#include <asm/desc.h>50#include <asm/desc.h>
50#include <asm/proto.h>51#include <asm/proto.h>
51#include <asm/acpi.h>52#include <asm/acpi.h>
@@ -61,9 +62,7 @@ · 9 unmodified lines
61#include <asm/uv/uv_hub.h>62#include <asm/uv/uv_hub.h>
62#include <asm/uv/uv_irq.h>63#include <asm/uv/uv_irq.h>
63 64
64#include <mach_ipi.h>65#include <asm/apic.h>
65#include <mach_apic.h>
66#include <mach_apicdef.h>
67 66
68#define __apicdebuginit(type) static type __init67#define __apicdebuginit(type) static type __init
69 68
@@ -82,11 +81,11 @@ static DEFINE_SPINLOCK(vector_lock); · 12 unmodified lines
82int nr_ioapic_registers[MAX_IO_APICS];81int nr_ioapic_registers[MAX_IO_APICS];
83 82
84/* I/O APIC entries */83/* I/O APIC entries */
85struct mp_config_ioapic mp_ioapics[MAX_IO_APICS];84struct mpc_ioapic mp_ioapics[MAX_IO_APICS];
86int nr_ioapics;85int nr_ioapics;
87 86
88/* MP IRQ source entries */87/* MP IRQ source entries */
89struct mp_config_intsrc mp_irqs[MAX_IRQ_SOURCES];88struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES];
90 89
91/* # of MP IRQ source entries */90/* # of MP IRQ source entries */
92int mp_irq_entries;91int mp_irq_entries;
@@ -99,10 +98,19 @@ DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES); · 6 unmodified lines
99 98
100int skip_ioapic_setup;99int skip_ioapic_setup;
101 100
101void arch_disable_smp_support(void)
102{
103#ifdef CONFIG_PCI
104 noioapicquirk = 1;
105 noioapicreroute = -1;
106#endif
107 skip_ioapic_setup = 1;
108}
109
102static int __init parse_noapic(char *str)110static int __init parse_noapic(char *str)
103{111{
104 /* disable IO-APIC */112 /* disable IO-APIC */
105 disable_ioapic_setup();113 arch_disable_smp_support();
106 return 0;114 return 0;
107}115}
108early_param("noapic", parse_noapic);116early_param("noapic", parse_noapic);
@@ -356,7 +364,7 @@ set_extra_move_desc(struct irq_desc *desc, const struct cpumask *mask) · 247 unmodified lines
356 364
357 if (!cfg->move_in_progress) {365 if (!cfg->move_in_progress) {
358 /* it means that domain is not changed */366 /* it means that domain is not changed */
359 if (!cpumask_intersects(&desc->affinity, mask))367 if (!cpumask_intersects(desc->affinity, mask))
360 cfg->move_desc_pending = 1;368 cfg->move_desc_pending = 1;
361 }369 }
362}370}
@@ -386,7 +394,7 @@ struct io_apic { · 23 unmodified lines
386static __attribute_const__ struct io_apic __iomem *io_apic_base(int idx)394static __attribute_const__ struct io_apic __iomem *io_apic_base(int idx)
387{395{
388 return (void __iomem *) __fix_to_virt(FIX_IO_APIC_BASE_0 + idx)396 return (void __iomem *) __fix_to_virt(FIX_IO_APIC_BASE_0 + idx)
389 + (mp_ioapics[idx].mp_apicaddr & ~PAGE_MASK);397 + (mp_ioapics[idx].apicaddr & ~PAGE_MASK);
390}398}
391 399
392static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)400static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)
@@ -478,7 +486,7 @@ __ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e) · 85 unmodified lines
478 io_apic_write(apic, 0x10 + 2*pin, eu.w1);486 io_apic_write(apic, 0x10 + 2*pin, eu.w1);
479}487}
480 488
481static void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e)489void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e)
482{490{
483 unsigned long flags;491 unsigned long flags;
484 spin_lock_irqsave(&ioapic_lock, flags);492 spin_lock_irqsave(&ioapic_lock, flags);
@@ -513,11 +521,11 @@ static void send_cleanup_vector(struct irq_cfg *cfg) · 28 unmodified lines
513 for_each_cpu_and(i, cfg->old_domain, cpu_online_mask)521 for_each_cpu_and(i, cfg->old_domain, cpu_online_mask)
514 cfg->move_cleanup_count++;522 cfg->move_cleanup_count++;
515 for_each_cpu_and(i, cfg->old_domain, cpu_online_mask)523 for_each_cpu_and(i, cfg->old_domain, cpu_online_mask)
516 send_IPI_mask(cpumask_of(i), IRQ_MOVE_CLEANUP_VECTOR);524 apic->send_IPI_mask(cpumask_of(i), IRQ_MOVE_CLEANUP_VECTOR);
517 } else {525 } else {
518 cpumask_and(cleanup_mask, cfg->old_domain, cpu_online_mask);526 cpumask_and(cleanup_mask, cfg->old_domain, cpu_online_mask);
519 cfg->move_cleanup_count = cpumask_weight(cleanup_mask);527 cfg->move_cleanup_count = cpumask_weight(cleanup_mask);
520 send_IPI_mask(cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR);528 apic->send_IPI_mask(cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR);
521 free_cpumask_var(cleanup_mask);529 free_cpumask_var(cleanup_mask);
522 }530 }
523 cfg->move_in_progress = 0;531 cfg->move_in_progress = 0;
@@ -562,8 +570,9 @@ static int · 38 unmodified lines
562assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask);570assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask);
563 571
564/*572/*
565 * Either sets desc->affinity to a valid value, and returns cpu_mask_to_apicid573 * Either sets desc->affinity to a valid value, and returns
566 * of that, or returns BAD_APICID and leaves desc->affinity untouched.574 * ->cpu_mask_to_apicid of that, or returns BAD_APICID and
575 * leaves desc->affinity untouched.
567 */576 */
568static unsigned int577static unsigned int
569set_desc_affinity(struct irq_desc *desc, const struct cpumask *mask)578set_desc_affinity(struct irq_desc *desc, const struct cpumask *mask)
@@ -579,9 +588,10 @@ set_desc_affinity(struct irq_desc *desc, const struct cpumask *mask) · 9 unmodified lines
579 if (assign_irq_vector(irq, cfg, mask))588 if (assign_irq_vector(irq, cfg, mask))
580 return BAD_APICID;589 return BAD_APICID;
581 590
582 cpumask_and(&desc->affinity, cfg->domain, mask);591 cpumask_and(desc->affinity, cfg->domain, mask);
583 set_extra_move_desc(desc, mask);592 set_extra_move_desc(desc, mask);
584 return cpu_mask_to_apicid_and(&desc->affinity, cpu_online_mask);593
594 return apic->cpu_mask_to_apicid_and(desc->affinity, cpu_online_mask);
585}595}
586 596
587static void597static void
@@ -796,23 +806,6 @@ static void clear_IO_APIC (void) · 208 unmodified lines
796 clear_IO_APIC_pin(apic, pin);806 clear_IO_APIC_pin(apic, pin);
797}807}
798 808
799#if !defined(CONFIG_SMP) && defined(CONFIG_X86_32)
800void send_IPI_self(int vector)
801{
802 unsigned int cfg;
803
804 /*
805 * Wait for idle.
806 */
807 apic_wait_icr_idle();
808 cfg = APIC_DM_FIXED | APIC_DEST_SELF | vector | APIC_DEST_LOGICAL;
809 /*
810 * Send the IPI. The write to APIC_ICR fires this off.
811 */
812 apic_write(APIC_ICR, cfg);
813}
814#endif /* !CONFIG_SMP && CONFIG_X86_32*/
815
816#ifdef CONFIG_X86_32809#ifdef CONFIG_X86_32
817/*810/*
818 * support for broken MP BIOSs, enables hand-redirection of PIRQ0-7 to811 * support for broken MP BIOSs, enables hand-redirection of PIRQ0-7 to
@@ -820,8 +813,9 @@ void send_IPI_self(int vector) · 1 unmodified line
820 */813 */
821 814
822#define MAX_PIRQS 8815#define MAX_PIRQS 8
823static int pirq_entries [MAX_PIRQS];816static int pirq_entries[MAX_PIRQS] = {
824static int pirqs_enabled;817 [0 ... MAX_PIRQS - 1] = -1
818};
825 819
826static int __init ioapic_pirq_setup(char *str)820static int __init ioapic_pirq_setup(char *str)
827{821{
@@ -830,10 +824,6 @@ static int __init ioapic_pirq_setup(char *str) · 2 unmodified lines
830 824
831 get_options(str, ARRAY_SIZE(ints), ints);825 get_options(str, ARRAY_SIZE(ints), ints);
832 826
833 for (i = 0; i < MAX_PIRQS; i++)
834 pirq_entries[i] = -1;
835
836 pirqs_enabled = 1;
837 apic_printk(APIC_VERBOSE, KERN_INFO827 apic_printk(APIC_VERBOSE, KERN_INFO
838 "PIRQ redirection, working around broken MP-BIOS.\n");828 "PIRQ redirection, working around broken MP-BIOS.\n");
839 max = MAX_PIRQS;829 max = MAX_PIRQS;
@@ -944,10 +934,10 @@ static int find_irq_entry(int apic, int pin, int type) · 104 unmodified lines
944 int i;934 int i;
945 935
946 for (i = 0; i < mp_irq_entries; i++)936 for (i = 0; i < mp_irq_entries; i++)
947 if (mp_irqs[i].mp_irqtype == type &&937 if (mp_irqs[i].irqtype == type &&
948 (mp_irqs[i].mp_dstapic == mp_ioapics[apic].mp_apicid ||938 (mp_irqs[i].dstapic == mp_ioapics[apic].apicid ||
949 mp_irqs[i].mp_dstapic == MP_APIC_ALL) &&939 mp_irqs[i].dstapic == MP_APIC_ALL) &&
950 mp_irqs[i].mp_dstirq == pin)940 mp_irqs[i].dstirq == pin)
951 return i;941 return i;
952 942
953 return -1;943 return -1;
@@ -961,13 +951,13 @@ static int __init find_isa_irq_pin(int irq, int type) · 7 unmodified lines
961 int i;951 int i;
962 952
963 for (i = 0; i < mp_irq_entries; i++) {953 for (i = 0; i < mp_irq_entries; i++) {
964 int lbus = mp_irqs[i].mp_srcbus;954 int lbus = mp_irqs[i].srcbus;
965 955
966 if (test_bit(lbus, mp_bus_not_pci) &&956 if (test_bit(lbus, mp_bus_not_pci) &&
967 (mp_irqs[i].mp_irqtype == type) &&957 (mp_irqs[i].irqtype == type) &&
968 (mp_irqs[i].mp_srcbusirq == irq))958 (mp_irqs[i].srcbusirq == irq))
969 959
970 return mp_irqs[i].mp_dstirq;960 return mp_irqs[i].dstirq;
971 }961 }
972 return -1;962 return -1;
973}963}
@@ -977,17 +967,17 @@ static int __init find_isa_irq_apic(int irq, int type) · 3 unmodified lines
977 int i;967 int i;
978 968
979 for (i = 0; i < mp_irq_entries; i++) {969 for (i = 0; i < mp_irq_entries; i++) {
980 int lbus = mp_irqs[i].mp_srcbus;970 int lbus = mp_irqs[i].srcbus;
981 971
982 if (test_bit(lbus, mp_bus_not_pci) &&972 if (test_bit(lbus, mp_bus_not_pci) &&
983 (mp_irqs[i].mp_irqtype == type) &&973 (mp_irqs[i].irqtype == type) &&
984 (mp_irqs[i].mp_srcbusirq == irq))974 (mp_irqs[i].srcbusirq == irq))
985 break;975 break;
986 }976 }
987 if (i < mp_irq_entries) {977 if (i < mp_irq_entries) {
988 int apic;978 int apic;
989 for(apic = 0; apic < nr_ioapics; apic++) {979 for(apic = 0; apic < nr_ioapics; apic++) {
990 if (mp_ioapics[apic].mp_apicid == mp_irqs[i].mp_dstapic)980 if (mp_ioapics[apic].apicid == mp_irqs[i].dstapic)
991 return apic;981 return apic;
992 }982 }
993 }983 }
@@ -1012,23 +1002,23 @@ int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin) · 18 unmodified lines
1012 return -1;1002 return -1;
1013 }1003 }
1014 for (i = 0; i < mp_irq_entries; i++) {1004 for (i = 0; i < mp_irq_entries; i++) {
1015 int lbus = mp_irqs[i].mp_srcbus;1005 int lbus = mp_irqs[i].srcbus;
1016 1006
1017 for (apic = 0; apic < nr_ioapics; apic++)1007 for (apic = 0; apic < nr_ioapics; apic++)
1018 if (mp_ioapics[apic].mp_apicid == mp_irqs[i].mp_dstapic ||1008 if (mp_ioapics[apic].apicid == mp_irqs[i].dstapic ||
1019 mp_irqs[i].mp_dstapic == MP_APIC_ALL)1009 mp_irqs[i].dstapic == MP_APIC_ALL)
1020 break;1010 break;
1021 1011
1022 if (!test_bit(lbus, mp_bus_not_pci) &&1012 if (!test_bit(lbus, mp_bus_not_pci) &&
1023 !mp_irqs[i].mp_irqtype &&1013 !mp_irqs[i].irqtype &&
1024 (bus == lbus) &&1014 (bus == lbus) &&
1025 (slot == ((mp_irqs[i].mp_srcbusirq >> 2) & 0x1f))) {1015 (slot == ((mp_irqs[i].srcbusirq >> 2) & 0x1f))) {
1026 int irq = pin_2_irq(i,apic,mp_irqs[i].mp_dstirq);1016 int irq = pin_2_irq(i, apic, mp_irqs[i].dstirq);
1027 1017
1028 if (!(apic || IO_APIC_IRQ(irq)))1018 if (!(apic || IO_APIC_IRQ(irq)))
1029 continue;1019 continue;
1030 1020
1031 if (pin == (mp_irqs[i].mp_srcbusirq & 3))1021 if (pin == (mp_irqs[i].srcbusirq & 3))
1032 return irq;1022 return irq;
1033 /*1023 /*
1034 * Use the first all-but-pin matching entry as a1024 * Use the first all-but-pin matching entry as a
@@ -1071,7 +1061,7 @@ static int EISA_ELCR(unsigned int irq) · 36 unmodified lines
1071 * EISA conforming in the MP table, that means its trigger type must1061 * EISA conforming in the MP table, that means its trigger type must
1072 * be read in from the ELCR */1062 * be read in from the ELCR */
1073 1063
1074#define default_EISA_trigger(idx) (EISA_ELCR(mp_irqs[idx].mp_srcbusirq))1064#define default_EISA_trigger(idx) (EISA_ELCR(mp_irqs[idx].srcbusirq))
1075#define default_EISA_polarity(idx) default_ISA_polarity(idx)1065#define default_EISA_polarity(idx) default_ISA_polarity(idx)
1076 1066
1077/* PCI interrupts are always polarity one level triggered,1067/* PCI interrupts are always polarity one level triggered,
@@ -1088,13 +1078,13 @@ static int EISA_ELCR(unsigned int irq) · 10 unmodified lines
1088 1078
1089static int MPBIOS_polarity(int idx)1079static int MPBIOS_polarity(int idx)
1090{1080{
1091 int bus = mp_irqs[idx].mp_srcbus;1081 int bus = mp_irqs[idx].srcbus;
1092 int polarity;1082 int polarity;
1093 1083
1094 /*1084 /*
1095 * Determine IRQ line polarity (high active or low active):1085 * Determine IRQ line polarity (high active or low active):
1096 */1086 */
1097 switch (mp_irqs[idx].mp_irqflag & 3)1087 switch (mp_irqs[idx].irqflag & 3)
1098 {1088 {
1099 case 0: /* conforms, ie. bus-type dependent polarity */1089 case 0: /* conforms, ie. bus-type dependent polarity */
1100 if (test_bit(bus, mp_bus_not_pci))1090 if (test_bit(bus, mp_bus_not_pci))
@@ -1130,13 +1120,13 @@ static int MPBIOS_polarity(int idx) · 29 unmodified lines
1130 1120
1131static int MPBIOS_trigger(int idx)1121static int MPBIOS_trigger(int idx)
1132{1122{
1133 int bus = mp_irqs[idx].mp_srcbus;1123 int bus = mp_irqs[idx].srcbus;
1134 int trigger;1124 int trigger;
1135 1125
1136 /*1126 /*
1137 * Determine IRQ trigger mode (edge or level sensitive):1127 * Determine IRQ trigger mode (edge or level sensitive):
1138 */1128 */
1139 switch ((mp_irqs[idx].mp_irqflag>>2) & 3)1129 switch ((mp_irqs[idx].irqflag>>2) & 3)
1140 {1130 {
1141 case 0: /* conforms, ie. bus-type dependent */1131 case 0: /* conforms, ie. bus-type dependent */
1142 if (test_bit(bus, mp_bus_not_pci))1132 if (test_bit(bus, mp_bus_not_pci))
@@ -1214,16 +1204,16 @@ int (*ioapic_renumber_irq)(int ioapic, int irq); · 71 unmodified lines
1214static int pin_2_irq(int idx, int apic, int pin)1204static int pin_2_irq(int idx, int apic, int pin)
1215{1205{
1216 int irq, i;1206 int irq, i;
1217 int bus = mp_irqs[idx].mp_srcbus;1207 int bus = mp_irqs[idx].srcbus;
1218 1208
1219 /*1209 /*
1220 * Debugging check, we are in big trouble if this message pops up!1210 * Debugging check, we are in big trouble if this message pops up!
1221 */1211 */
1222 if (mp_irqs[idx].mp_dstirq != pin)1212 if (mp_irqs[idx].dstirq != pin)
1223 printk(KERN_ERR "broken BIOS or MPTABLE parser, ayiee!!\n");1213 printk(KERN_ERR "broken BIOS or MPTABLE parser, ayiee!!\n");
1224 1214
1225 if (test_bit(bus, mp_bus_not_pci)) {1215 if (test_bit(bus, mp_bus_not_pci)) {
1226 irq = mp_irqs[idx].mp_srcbusirq;1216 irq = mp_irqs[idx].srcbusirq;
1227 } else {1217 } else {
1228 /*1218 /*
1229 * PCI IRQs are mapped in order1219 * PCI IRQs are mapped in order
@@ -1315,7 +1305,7 @@ __assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask) · 85 unmodified lines
1315 int new_cpu;1305 int new_cpu;
1316 int vector, offset;1306 int vector, offset;
1317 1307
1318 vector_allocation_domain(cpu, tmp_mask);1308 apic->vector_allocation_domain(cpu, tmp_mask);
1319 1309
1320 vector = current_vector;1310 vector = current_vector;
1321 offset = current_offset;1311 offset = current_offset;
@@ -1485,10 +1475,10 @@ static void ioapic_register_intr(int irq, struct irq_desc *desc, unsigned long t · 163 unmodified lines
1485 handle_edge_irq, "edge");1475 handle_edge_irq, "edge");
1486}1476}
1487 1477
1488static int setup_ioapic_entry(int apic, int irq,1478int setup_ioapic_entry(int apic_id, int irq,
1489 struct IO_APIC_route_entry *entry,1479 struct IO_APIC_route_entry *entry,
1490 unsigned int destination, int trigger,1480 unsigned int destination, int trigger,
1491 int polarity, int vector)1481 int polarity, int vector)
1492{1482{
1493 /*1483 /*
1494 * add it to the IO-APIC irq-routing table:1484 * add it to the IO-APIC irq-routing table:
@@ -1497,25 +1487,25 @@ static int setup_ioapic_entry(int apic, int irq, · 2 unmodified lines
1497 1487
1498#ifdef CONFIG_INTR_REMAP1488#ifdef CONFIG_INTR_REMAP
1499 if (intr_remapping_enabled) {1489 if (intr_remapping_enabled) {
1500 struct intel_iommu *iommu = map_ioapic_to_ir(apic);1490 struct intel_iommu *iommu = map_ioapic_to_ir(apic_id);
1501 struct irte irte;1491 struct irte irte;
1502 struct IR_IO_APIC_route_entry *ir_entry =1492 struct IR_IO_APIC_route_entry *ir_entry =
1503 (struct IR_IO_APIC_route_entry *) entry;1493 (struct IR_IO_APIC_route_entry *) entry;
1504 int index;1494 int index;
1505 1495
1506 if (!iommu)1496 if (!iommu)
1507 panic("No mapping iommu for ioapic %d\n", apic);1497 panic("No mapping iommu for ioapic %d\n", apic_id);
1508 1498
1509 index = alloc_irte(iommu, irq, 1);1499 index = alloc_irte(iommu, irq, 1);
1510 if (index < 0)1500 if (index < 0)
1511 panic("Failed to allocate IRTE for ioapic %d\n", apic);1501 panic("Failed to allocate IRTE for ioapic %d\n", apic_id);
1512 1502
1513 memset(&irte, 0, sizeof(irte));1503 memset(&irte, 0, sizeof(irte));
1514 1504
1515 irte.present = 1;1505 irte.present = 1;
1516 irte.dst_mode = INT_DEST_MODE;1506 irte.dst_mode = apic->irq_dest_mode;
1517 irte.trigger_mode = trigger;1507 irte.trigger_mode = trigger;
1518 irte.dlvry_mode = INT_DELIVERY_MODE;1508 irte.dlvry_mode = apic->irq_delivery_mode;
1519 irte.vector = vector;1509 irte.vector = vector;
1520 irte.dest_id = IRTE_DEST(destination);1510 irte.dest_id = IRTE_DEST(destination);
1521 1511
@@ -1528,8 +1518,8 @@ static int setup_ioapic_entry(int apic, int irq, · 6 unmodified lines
1528 } else1518 } else
1529#endif1519#endif
1530 {1520 {
1531 entry->delivery_mode = INT_DELIVERY_MODE;1521 entry->delivery_mode = apic->irq_delivery_mode;
1532 entry->dest_mode = INT_DEST_MODE;1522 entry->dest_mode = apic->irq_dest_mode;
1533 entry->dest = destination;1523 entry->dest = destination;
1534 }1524 }
1535 1525
@@ -1546,7 +1536,7 @@ static int setup_ioapic_entry(int apic, int irq, · 10 unmodified lines
1546 return 0;1536 return 0;
1547}1537}
1548 1538
1549static void setup_IO_APIC_irq(int apic, int pin, unsigned int irq, struct irq_desc *desc,1539static void setup_IO_APIC_irq(int apic_id, int pin, unsigned int irq, struct irq_desc *desc,
1550 int trigger, int polarity)1540 int trigger, int polarity)
1551{1541{
1552 struct irq_cfg *cfg;1542 struct irq_cfg *cfg;
@@ -1558,22 +1548,22 @@ static void setup_IO_APIC_irq(int apic, int pin, unsigned int irq, struct irq_de · 5 unmodified lines
1558 1548
1559 cfg = desc->chip_data;1549 cfg = desc->chip_data;
1560 1550
1561 if (assign_irq_vector(irq, cfg, TARGET_CPUS))1551 if (assign_irq_vector(irq, cfg, apic->target_cpus()))
1562 return;1552 return;
1563 1553
1564 dest = cpu_mask_to_apicid_and(cfg->domain, TARGET_CPUS);1554 dest = apic->cpu_mask_to_apicid_and(cfg->domain, apic->target_cpus());
1565 1555
1566 apic_printk(APIC_VERBOSE,KERN_DEBUG1556 apic_printk(APIC_VERBOSE,KERN_DEBUG
1567 "IOAPIC[%d]: Set routing entry (%d-%d -> 0x%x -> "1557 "IOAPIC[%d]: Set routing entry (%d-%d -> 0x%x -> "
1568 "IRQ %d Mode:%i Active:%i)\n",1558 "IRQ %d Mode:%i Active:%i)\n",
1569 apic, mp_ioapics[apic].mp_apicid, pin, cfg->vector,1559 apic_id, mp_ioapics[apic_id].apicid, pin, cfg->vector,
1570 irq, trigger, polarity);1560 irq, trigger, polarity);
1571 1561
1572 1562
1573 if (setup_ioapic_entry(mp_ioapics[apic].mp_apicid, irq, &entry,1563 if (setup_ioapic_entry(mp_ioapics[apic_id].apicid, irq, &entry,
1574 dest, trigger, polarity, cfg->vector)) {1564 dest, trigger, polarity, cfg->vector)) {
1575 printk("Failed to setup ioapic entry for ioapic %d, pin %d\n",1565 printk("Failed to setup ioapic entry for ioapic %d, pin %d\n",
1576 mp_ioapics[apic].mp_apicid, pin);1566 mp_ioapics[apic_id].apicid, pin);
1577 __clear_irq_vector(irq, cfg);1567 __clear_irq_vector(irq, cfg);
1578 return;1568 return;
1579 }1569 }
@@ -1582,12 +1572,12 @@ static void setup_IO_APIC_irq(int apic, int pin, unsigned int irq, struct irq_de · 2 unmodified lines
1582 if (irq < NR_IRQS_LEGACY)1572 if (irq < NR_IRQS_LEGACY)
1583 disable_8259A_irq(irq);1573 disable_8259A_irq(irq);
1584 1574
1585 ioapic_write_entry(apic, pin, entry);1575 ioapic_write_entry(apic_id, pin, entry);
1586}1576}
1587 1577
1588static void __init setup_IO_APIC_irqs(void)1578static void __init setup_IO_APIC_irqs(void)
1589{1579{
1590 int apic, pin, idx, irq;1580 int apic_id, pin, idx, irq;
1591 int notcon = 0;1581 int notcon = 0;
1592 struct irq_desc *desc;1582 struct irq_desc *desc;
1593 struct irq_cfg *cfg;1583 struct irq_cfg *cfg;
@@ -1595,21 +1585,19 @@ static void __init setup_IO_APIC_irqs(void) · 1 unmodified line
1595 1585
1596 apic_printk(APIC_VERBOSE, KERN_DEBUG "init IO_APIC IRQs\n");1586 apic_printk(APIC_VERBOSE, KERN_DEBUG "init IO_APIC IRQs\n");
1597 1587
1598 for (apic = 0; apic < nr_ioapics; apic++) {1588 for (apic_id = 0; apic_id < nr_ioapics; apic_id++) {
1599 for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) {1589 for (pin = 0; pin < nr_ioapic_registers[apic_id]; pin++) {
1600 1590
1601 idx = find_irq_entry(apic, pin, mp_INT);1591 idx = find_irq_entry(apic_id, pin, mp_INT);
1602 if (idx == -1) {1592 if (idx == -1) {
1603 if (!notcon) {1593 if (!notcon) {
1604 notcon = 1;1594 notcon = 1;
1605 apic_printk(APIC_VERBOSE,1595 apic_printk(APIC_VERBOSE,
1606 KERN_DEBUG " %d-%d",1596 KERN_DEBUG " %d-%d",
1607 mp_ioapics[apic].mp_apicid,1597 mp_ioapics[apic_id].apicid, pin);
1608 pin);
1609 } else1598 } else
1610 apic_printk(APIC_VERBOSE, " %d-%d",1599 apic_printk(APIC_VERBOSE, " %d-%d",
1611 mp_ioapics[apic].mp_apicid,1600 mp_ioapics[apic_id].apicid, pin);
1612 pin);
1613 continue;1601 continue;
1614 }1602 }
1615 if (notcon) {1603 if (notcon) {
@@ -1618,20 +1606,25 @@ static void __init setup_IO_APIC_irqs(void) · 2 unmodified lines
1618 notcon = 0;1606 notcon = 0;
1619 }1607 }
1620 1608
1621 irq = pin_2_irq(idx, apic, pin);1609 irq = pin_2_irq(idx, apic_id, pin);
1622#ifdef CONFIG_X86_321610
1623 if (multi_timer_check(apic, irq))1611 /*
1612 * Skip the timer IRQ if there's a quirk handler
1613 * installed and if it returns 1:
1614 */
1615 if (apic->multi_timer_check &&
1616 apic->multi_timer_check(apic_id, irq))
1624 continue;1617 continue;
1625#endif1618
1626 desc = irq_to_desc_alloc_cpu(irq, cpu);1619 desc = irq_to_desc_alloc_cpu(irq, cpu);
1627 if (!desc) {1620 if (!desc) {
1628 printk(KERN_INFO "can not get irq_desc for %d\n", irq);1621 printk(KERN_INFO "can not get irq_desc for %d\n", irq);
1629 continue;1622 continue;
1630 }1623 }
1631 cfg = desc->chip_data;1624 cfg = desc->chip_data;
1632 add_pin_to_irq_cpu(cfg, cpu, apic, pin);1625 add_pin_to_irq_cpu(cfg, cpu, apic_id, pin);
1633 1626
1634 setup_IO_APIC_irq(apic, pin, irq, desc,1627 setup_IO_APIC_irq(apic_id, pin, irq, desc,
1635 irq_trigger(idx), irq_polarity(idx));1628 irq_trigger(idx), irq_polarity(idx));
1636 }1629 }
1637 }1630 }
@@ -1644,7 +1637,7 @@ static void __init setup_IO_APIC_irqs(void) · 6 unmodified lines
1644/*1637/*
1645 * Set up the timer pin, possibly with the 8259A-master behind.1638 * Set up the timer pin, possibly with the 8259A-master behind.
1646 */1639 */
1647static void __init setup_timer_IRQ0_pin(unsigned int apic, unsigned int pin,1640static void __init setup_timer_IRQ0_pin(unsigned int apic_id, unsigned int pin,
1648 int vector)1641 int vector)
1649{1642{
1650 struct IO_APIC_route_entry entry;1643 struct IO_APIC_route_entry entry;
@@ -1660,10 +1653,10 @@ static void __init setup_timer_IRQ0_pin(unsigned int apic, unsigned int pin, · 9 unmodified lines
1660 * We use logical delivery to get the timer IRQ1653 * We use logical delivery to get the timer IRQ
1661 * to the first CPU.1654 * to the first CPU.
1662 */1655 */
1663 entry.dest_mode = INT_DEST_MODE;1656 entry.dest_mode = apic->irq_dest_mode;
1664 entry.mask = 1; /* mask IRQ now */1657 entry.mask = 0; /* don't mask IRQ for edge */
1665 entry.dest = cpu_mask_to_apicid(TARGET_CPUS);1658 entry.dest = apic->cpu_mask_to_apicid(apic->target_cpus());
1666 entry.delivery_mode = INT_DELIVERY_MODE;1659 entry.delivery_mode = apic->irq_delivery_mode;
1667 entry.polarity = 0;1660 entry.polarity = 0;
1668 entry.trigger = 0;1661 entry.trigger = 0;
1669 entry.vector = vector;1662 entry.vector = vector;
@@ -1677,7 +1670,7 @@ static void __init setup_timer_IRQ0_pin(unsigned int apic, unsigned int pin, · 7 unmodified lines
1677 /*1670 /*
1678 * Add it to the IO-APIC irq-routing table:1671 * Add it to the IO-APIC irq-routing table:
1679 */1672 */
1680 ioapic_write_entry(apic, pin, entry);1673 ioapic_write_entry(apic_id, pin, entry);
1681}1674}
1682 1675
1683 1676
@@ -1699,7 +1692,7 @@ __apicdebuginit(void) print_IO_APIC(void) · 15 unmodified lines
1699 printk(KERN_DEBUG "number of MP IRQ sources: %d.\n", mp_irq_entries);1692 printk(KERN_DEBUG "number of MP IRQ sources: %d.\n", mp_irq_entries);
1700 for (i = 0; i < nr_ioapics; i++)1693 for (i = 0; i < nr_ioapics; i++)
1701 printk(KERN_DEBUG "number of IO-APIC #%d registers: %d.\n",1694 printk(KERN_DEBUG "number of IO-APIC #%d registers: %d.\n",
1702 mp_ioapics[i].mp_apicid, nr_ioapic_registers[i]);1695 mp_ioapics[i].apicid, nr_ioapic_registers[i]);
1703 1696
1704 /*1697 /*
1705 * We are a bit conservative about what we expect. We have to1698 * We are a bit conservative about what we expect. We have to
@@ -1719,7 +1712,7 @@ __apicdebuginit(void) print_IO_APIC(void) · 13 unmodified lines
1719 spin_unlock_irqrestore(&ioapic_lock, flags);1712 spin_unlock_irqrestore(&ioapic_lock, flags);
1720 1713
1721 printk("\n");1714 printk("\n");
1722 printk(KERN_DEBUG "IO APIC #%d......\n", mp_ioapics[apic].mp_apicid);1715 printk(KERN_DEBUG "IO APIC #%d......\n", mp_ioapics[apic].apicid);
1723 printk(KERN_DEBUG ".... register #00: %08X\n", reg_00.raw);1716 printk(KERN_DEBUG ".... register #00: %08X\n", reg_00.raw);
1724 printk(KERN_DEBUG "....... : physical APIC id: %02X\n", reg_00.bits.ID);1717 printk(KERN_DEBUG "....... : physical APIC id: %02X\n", reg_00.bits.ID);
1725 printk(KERN_DEBUG "....... : Delivery Type: %X\n", reg_00.bits.delivery_type);1718 printk(KERN_DEBUG "....... : Delivery Type: %X\n", reg_00.bits.delivery_type);
@@ -1980,13 +1973,6 @@ void __init enable_IO_APIC(void) · 254 unmodified lines
1980 int apic;1973 int apic;
1981 unsigned long flags;1974 unsigned long flags;
1982 1975
1983#ifdef CONFIG_X86_32
1984 int i;
1985 if (!pirqs_enabled)
1986 for (i = 0; i < MAX_PIRQS; i++)
1987 pirq_entries[i] = -1;
1988#endif
1989
1990 /*1976 /*
1991 * The number of IO-APIC IRQ registers (== #pins):1977 * The number of IO-APIC IRQ registers (== #pins):
1992 */1978 */
@@ -2090,7 +2076,7 @@ static void __init setup_ioapic_ids_from_mpc(void) · 97 unmodified lines
2090{2076{
2091 union IO_APIC_reg_00 reg_00;2077 union IO_APIC_reg_00 reg_00;
2092 physid_mask_t phys_id_present_map;2078 physid_mask_t phys_id_present_map;
2093 int apic;2079 int apic_id;
2094 int i;2080 int i;
2095 unsigned char old_id;2081 unsigned char old_id;
2096 unsigned long flags;2082 unsigned long flags;
@@ -2109,26 +2095,26 @@ static void __init setup_ioapic_ids_from_mpc(void) · 12 unmodified lines
2109 * This is broken; anything with a real cpu count has to2095 * This is broken; anything with a real cpu count has to
2110 * circumvent this idiocy regardless.2096 * circumvent this idiocy regardless.
2111 */2097 */
2112 phys_id_present_map = ioapic_phys_id_map(phys_cpu_present_map);2098 phys_id_present_map = apic->ioapic_phys_id_map(phys_cpu_present_map);
2113 2099
2114 /*2100 /*
2115 * Set the IOAPIC ID to the value stored in the MPC table.2101 * Set the IOAPIC ID to the value stored in the MPC table.
2116 */2102 */
2117 for (apic = 0; apic < nr_ioapics; apic++) {2103 for (apic_id = 0; apic_id < nr_ioapics; apic_id++) {
2118 2104
2119 /* Read the register 0 value */2105 /* Read the register 0 value */
2120 spin_lock_irqsave(&ioapic_lock, flags);2106 spin_lock_irqsave(&ioapic_lock, flags);
2121 reg_00.raw = io_apic_read(apic, 0);2107 reg_00.raw = io_apic_read(apic_id, 0);
2122 spin_unlock_irqrestore(&ioapic_lock, flags);2108 spin_unlock_irqrestore(&ioapic_lock, flags);
2123 2109
2124 old_id = mp_ioapics[apic].mp_apicid;2110 old_id = mp_ioapics[apic_id].apicid;
2125 2111
2126 if (mp_ioapics[apic].mp_apicid >= get_physical_broadcast()) {2112 if (mp_ioapics[apic_id].apicid >= get_physical_broadcast()) {
2127 printk(KERN_ERR "BIOS bug, IO-APIC#%d ID is %d in the MPC table!...\n",2113 printk(KERN_ERR "BIOS bug, IO-APIC#%d ID is %d in the MPC table!...\n",
2128 apic, mp_ioapics[apic].mp_apicid);2114 apic_id, mp_ioapics[apic_id].apicid);
2129 printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n",2115 printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n",
2130 reg_00.bits.ID);2116 reg_00.bits.ID);
2131 mp_ioapics[apic].mp_apicid = reg_00.bits.ID;2117 mp_ioapics[apic_id].apicid = reg_00.bits.ID;
2132 }2118 }
2133 2119
2134 /*2120 /*
@@ -2136,10 +2122,10 @@ static void __init setup_ioapic_ids_from_mpc(void) · 1 unmodified line
2136 * system must have a unique ID or we get lots of nice2122 * system must have a unique ID or we get lots of nice
2137 * 'stuck on smp_invalidate_needed IPI wait' messages.2123 * 'stuck on smp_invalidate_needed IPI wait' messages.
2138 */2124 */
2139 if (check_apicid_used(phys_id_present_map,2125 if (apic->check_apicid_used(phys_id_present_map,
2140 mp_ioapics[apic].mp_apicid)) {2126 mp_ioapics[apic_id].apicid)) {
2141 printk(KERN_ERR "BIOS bug, IO-APIC#%d ID %d is already used!...\n",2127 printk(KERN_ERR "BIOS bug, IO-APIC#%d ID %d is already used!...\n",
2142 apic, mp_ioapics[apic].mp_apicid);2128 apic_id, mp_ioapics[apic_id].apicid);
2143 for (i = 0; i < get_physical_broadcast(); i++)2129 for (i = 0; i < get_physical_broadcast(); i++)
2144 if (!physid_isset(i, phys_id_present_map))2130 if (!physid_isset(i, phys_id_present_map))
2145 break;2131 break;
@@ -2148,13 +2134,13 @@ static void __init setup_ioapic_ids_from_mpc(void) · 2 unmodified lines
2148 printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n",2134 printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n",
2149 i);2135 i);
2150 physid_set(i, phys_id_present_map);2136 physid_set(i, phys_id_present_map);
2151 mp_ioapics[apic].mp_apicid = i;2137 mp_ioapics[apic_id].apicid = i;
2152 } else {2138 } else {
2153 physid_mask_t tmp;2139 physid_mask_t tmp;
2154 tmp = apicid_to_cpu_present(mp_ioapics[apic].mp_apicid);2140 tmp = apic->apicid_to_cpu_present(mp_ioapics[apic_id].apicid);
2155 apic_printk(APIC_VERBOSE, "Setting %d in the "2141 apic_printk(APIC_VERBOSE, "Setting %d in the "
2156 "phys_id_present_map\n",2142 "phys_id_present_map\n",
2157 mp_ioapics[apic].mp_apicid);2143 mp_ioapics[apic_id].apicid);
2158 physids_or(phys_id_present_map, phys_id_present_map, tmp);2144 physids_or(phys_id_present_map, phys_id_present_map, tmp);
2159 }2145 }
2160 2146
@@ -2163,11 +2149,11 @@ static void __init setup_ioapic_ids_from_mpc(void) · 2 unmodified lines
2163 * We need to adjust the IRQ routing table2149 * We need to adjust the IRQ routing table
2164 * if the ID changed.2150 * if the ID changed.
2165 */2151 */
2166 if (old_id != mp_ioapics[apic].mp_apicid)2152 if (old_id != mp_ioapics[apic_id].apicid)
2167 for (i = 0; i < mp_irq_entries; i++)2153 for (i = 0; i < mp_irq_entries; i++)
2168 if (mp_irqs[i].mp_dstapic == old_id)2154 if (mp_irqs[i].dstapic == old_id)
2169 mp_irqs[i].mp_dstapic2155 mp_irqs[i].dstapic
2170 = mp_ioapics[apic].mp_apicid;2156 = mp_ioapics[apic_id].apicid;
2171 2157
2172 /*2158 /*
2173 * Read the right value from the MPC table and2159 * Read the right value from the MPC table and
@@ -2175,20 +2161,20 @@ static void __init setup_ioapic_ids_from_mpc(void) · 1 unmodified line
2175 */2161 */
2176 apic_printk(APIC_VERBOSE, KERN_INFO2162 apic_printk(APIC_VERBOSE, KERN_INFO
2177 "...changing IO-APIC physical APIC ID to %d ...",2163 "...changing IO-APIC physical APIC ID to %d ...",
2178 mp_ioapics[apic].mp_apicid);2164 mp_ioapics[apic_id].apicid);
2179 2165
2180 reg_00.bits.ID = mp_ioapics[apic].mp_apicid;2166 reg_00.bits.ID = mp_ioapics[apic_id].apicid;
2181 spin_lock_irqsave(&ioapic_lock, flags);2167 spin_lock_irqsave(&ioapic_lock, flags);
2182 io_apic_write(apic, 0, reg_00.raw);2168 io_apic_write(apic_id, 0, reg_00.raw);
2183 spin_unlock_irqrestore(&ioapic_lock, flags);2169 spin_unlock_irqrestore(&ioapic_lock, flags);
2184 2170
2185 /*2171 /*
2186 * Sanity check2172 * Sanity check
2187 */2173 */
2188 spin_lock_irqsave(&ioapic_lock, flags);2174 spin_lock_irqsave(&ioapic_lock, flags);
2189 reg_00.raw = io_apic_read(apic, 0);2175 reg_00.raw = io_apic_read(apic_id, 0);
2190 spin_unlock_irqrestore(&ioapic_lock, flags);2176 spin_unlock_irqrestore(&ioapic_lock, flags);
2191 if (reg_00.bits.ID != mp_ioapics[apic].mp_apicid)2177 if (reg_00.bits.ID != mp_ioapics[apic_id].apicid)
2192 printk("could not set ID!\n");2178 printk("could not set ID!\n");
2193 else2179 else
2194 apic_printk(APIC_VERBOSE, " ok.\n");2180 apic_printk(APIC_VERBOSE, " ok.\n");
@@ -2291,7 +2277,7 @@ static int ioapic_retrigger_irq(unsigned int irq) · 96 unmodified lines
2291 unsigned long flags;2277 unsigned long flags;
2292 2278
2293 spin_lock_irqsave(&vector_lock, flags);2279 spin_lock_irqsave(&vector_lock, flags);
2294 send_IPI_mask(cpumask_of(cpumask_first(cfg->domain)), cfg->vector);2280 apic->send_IPI_mask(cpumask_of(cpumask_first(cfg->domain)), cfg->vector);
2295 spin_unlock_irqrestore(&vector_lock, flags);2281 spin_unlock_irqrestore(&vector_lock, flags);
2296 2282
2297 return 1;2283 return 1;
@@ -2299,7 +2285,7 @@ static int ioapic_retrigger_irq(unsigned int irq) · 1 unmodified line
2299#else2285#else
2300static int ioapic_retrigger_irq(unsigned int irq)2286static int ioapic_retrigger_irq(unsigned int irq)
2301{2287{
2302 send_IPI_self(irq_cfg(irq)->vector);2288 apic->send_IPI_self(irq_cfg(irq)->vector);
2303 2289
2304 return 1;2290 return 1;
2305}2291}
@@ -2363,7 +2349,7 @@ migrate_ioapic_irq_desc(struct irq_desc *desc, const struct cpumask *mask) · 57 unmodified lines
2363 2349
2364 set_extra_move_desc(desc, mask);2350 set_extra_move_desc(desc, mask);
2365 2351
2366 dest = cpu_mask_to_apicid_and(cfg->domain, mask);2352 dest = apic->cpu_mask_to_apicid_and(cfg->domain, mask);
2367 2353
2368 modify_ioapic_rte = desc->status & IRQ_LEVEL;2354 modify_ioapic_rte = desc->status & IRQ_LEVEL;
2369 if (modify_ioapic_rte) {2355 if (modify_ioapic_rte) {
@@ -2383,7 +2369,7 @@ migrate_ioapic_irq_desc(struct irq_desc *desc, const struct cpumask *mask) · 13 unmodified lines
2383 if (cfg->move_in_progress)2369 if (cfg->move_in_progress)
2384 send_cleanup_vector(cfg);2370 send_cleanup_vector(cfg);
2385 2371
2386 cpumask_copy(&desc->affinity, mask);2372 cpumask_copy(desc->affinity, mask);
2387}2373}
2388 2374
2389static int migrate_irq_remapped_level_desc(struct irq_desc *desc)2375static int migrate_irq_remapped_level_desc(struct irq_desc *desc)
@@ -2405,11 +2391,11 @@ static int migrate_irq_remapped_level_desc(struct irq_desc *desc) · 15 unmodified lines
2405 }2391 }
2406 2392
2407 /* everthing is clear. we have right of way */2393 /* everthing is clear. we have right of way */
2408 migrate_ioapic_irq_desc(desc, &desc->pending_mask);2394 migrate_ioapic_irq_desc(desc, desc->pending_mask);
2409 2395
2410 ret = 0;2396 ret = 0;
2411 desc->status &= ~IRQ_MOVE_PENDING;2397 desc->status &= ~IRQ_MOVE_PENDING;
2412 cpumask_clear(&desc->pending_mask);2398 cpumask_clear(desc->pending_mask);
2413 2399
2414unmask:2400unmask:
2415 unmask_IO_APIC_irq_desc(desc);2401 unmask_IO_APIC_irq_desc(desc);
@@ -2434,7 +2420,7 @@ static void ir_irq_migration(struct work_struct *work) · 18 unmodified lines
2434 continue;2420 continue;
2435 }2421 }
2436 2422
2437 desc->chip->set_affinity(irq, &desc->pending_mask);2423 desc->chip->set_affinity(irq, desc->pending_mask);
2438 spin_unlock_irqrestore(&desc->lock, flags);2424 spin_unlock_irqrestore(&desc->lock, flags);
2439 }2425 }
2440 }2426 }
@@ -2448,7 +2434,7 @@ static void set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc, · 7 unmodified lines
2448{2434{
2449 if (desc->status & IRQ_LEVEL) {2435 if (desc->status & IRQ_LEVEL) {
2450 desc->status |= IRQ_MOVE_PENDING;2436 desc->status |= IRQ_MOVE_PENDING;
2451 cpumask_copy(&desc->pending_mask, mask);2437 cpumask_copy(desc->pending_mask, mask);
2452 migrate_irq_remapped_level_desc(desc);2438 migrate_irq_remapped_level_desc(desc);
2453 return;2439 return;
2454 }2440 }
@@ -2516,7 +2502,7 @@ static void irq_complete_move(struct irq_desc **descp) · 61 unmodified lines
2516 2502
2517 /* domain has not changed, but affinity did */2503 /* domain has not changed, but affinity did */
2518 me = smp_processor_id();2504 me = smp_processor_id();
2519 if (cpu_isset(me, desc->affinity)) {2505 if (cpumask_test_cpu(me, desc->affinity)) {
2520 *descp = desc = move_irq_desc(desc, me);2506 *descp = desc = move_irq_desc(desc, me);
2521 /* get the new one */2507 /* get the new one */
2522 cfg = desc->chip_data;2508 cfg = desc->chip_data;
@@ -2867,19 +2853,15 @@ static inline void __init check_timer(void) · 344 unmodified lines
2867 int cpu = boot_cpu_id;2853 int cpu = boot_cpu_id;
2868 int apic1, pin1, apic2, pin2;2854 int apic1, pin1, apic2, pin2;
2869 unsigned long flags;2855 unsigned long flags;
2870 unsigned int ver;
2871 int no_pin1 = 0;2856 int no_pin1 = 0;
2872 2857
2873 local_irq_save(flags);2858 local_irq_save(flags);
2874 2859
2875 ver = apic_read(APIC_LVR);
2876 ver = GET_APIC_VERSION(ver);
2877
2878 /*2860 /*
2879 * get/set the timer IRQ vector:2861 * get/set the timer IRQ vector:
2880 */2862 */
2881 disable_8259A_irq(0);2863 disable_8259A_irq(0);
2882 assign_irq_vector(0, cfg, TARGET_CPUS);2864 assign_irq_vector(0, cfg, apic->target_cpus());
2883 2865
2884 /*2866 /*
2885 * As IRQ0 is to be enabled in the 8259A, the virtual2867 * As IRQ0 is to be enabled in the 8259A, the virtual
@@ -2893,7 +2875,13 @@ static inline void __init check_timer(void) · 7 unmodified lines
2893 apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT);2875 apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT);
2894 init_8259A(1);2876 init_8259A(1);
2895#ifdef CONFIG_X86_322877#ifdef CONFIG_X86_32
2896 timer_ack = (nmi_watchdog == NMI_IO_APIC && !APIC_INTEGRATED(ver));2878 {
2879 unsigned int ver;
2880
2881 ver = apic_read(APIC_LVR);
2882 ver = GET_APIC_VERSION(ver);
2883 timer_ack = (nmi_watchdog == NMI_IO_APIC && !APIC_INTEGRATED(ver));
2884 }
2897#endif2885#endif
2898 2886
2899 pin1 = find_isa_irq_pin(0, mp_INT);2887 pin1 = find_isa_irq_pin(0, mp_INT);
@@ -2932,8 +2920,17 @@ static inline void __init check_timer(void) · 32 unmodified lines
2932 if (no_pin1) {2920 if (no_pin1) {
2933 add_pin_to_irq_cpu(cfg, cpu, apic1, pin1);2921 add_pin_to_irq_cpu(cfg, cpu, apic1, pin1);
2934 setup_timer_IRQ0_pin(apic1, pin1, cfg->vector);2922 setup_timer_IRQ0_pin(apic1, pin1, cfg->vector);
2923 } else {
2924 /* for edge trigger, setup_IO_APIC_irq already
2925 * leave it unmasked.
2926 * so only need to unmask if it is level-trigger
2927 * do we really have level trigger timer?
2928 */
2929 int idx;
2930 idx = find_irq_entry(apic1, pin1, mp_INT);
2931 if (idx != -1 && irq_trigger(idx))
2932 unmask_IO_APIC_irq_desc(desc);
2935 }2933 }
2936 unmask_IO_APIC_irq_desc(desc);
2937 if (timer_irq_works()) {2934 if (timer_irq_works()) {
2938 if (nmi_watchdog == NMI_IO_APIC) {2935 if (nmi_watchdog == NMI_IO_APIC) {
2939 setup_nmi();2936 setup_nmi();
@@ -2947,6 +2944,7 @@ static inline void __init check_timer(void) · 7 unmodified lines
2947 if (intr_remapping_enabled)2944 if (intr_remapping_enabled)
2948 panic("timer doesn't work through Interrupt-remapped IO-APIC");2945 panic("timer doesn't work through Interrupt-remapped IO-APIC");
2949#endif2946#endif
2947 local_irq_disable();
2950 clear_IO_APIC_pin(apic1, pin1);2948 clear_IO_APIC_pin(apic1, pin1);
2951 if (!no_pin1)2949 if (!no_pin1)
2952 apic_printk(APIC_QUIET, KERN_ERR "..MP-BIOS bug: "2950 apic_printk(APIC_QUIET, KERN_ERR "..MP-BIOS bug: "
@@ -2961,7 +2959,6 @@ static inline void __init check_timer(void) · 8 unmodified lines
2961 */2959 */
2962 replace_pin_at_irq_cpu(cfg, cpu, apic1, pin1, apic2, pin2);2960 replace_pin_at_irq_cpu(cfg, cpu, apic1, pin1, apic2, pin2);
2963 setup_timer_IRQ0_pin(apic2, pin2, cfg->vector);2961 setup_timer_IRQ0_pin(apic2, pin2, cfg->vector);
2964 unmask_IO_APIC_irq_desc(desc);
2965 enable_8259A_irq(0);2962 enable_8259A_irq(0);
2966 if (timer_irq_works()) {2963 if (timer_irq_works()) {
2967 apic_printk(APIC_QUIET, KERN_INFO "....... works.\n");2964 apic_printk(APIC_QUIET, KERN_INFO "....... works.\n");
@@ -2976,6 +2973,7 @@ static inline void __init check_timer(void) · 8 unmodified lines
2976 /*2973 /*
2977 * Cleanup, just in case ...2974 * Cleanup, just in case ...
2978 */2975 */
2976 local_irq_disable();
2979 disable_8259A_irq(0);2977 disable_8259A_irq(0);
2980 clear_IO_APIC_pin(apic2, pin2);2978 clear_IO_APIC_pin(apic2, pin2);
2981 apic_printk(APIC_QUIET, KERN_INFO "....... failed.\n");2979 apic_printk(APIC_QUIET, KERN_INFO "....... failed.\n");
@@ -3001,6 +2999,7 @@ static inline void __init check_timer(void) · 19 unmodified lines
3001 apic_printk(APIC_QUIET, KERN_INFO "..... works.\n");2999 apic_printk(APIC_QUIET, KERN_INFO "..... works.\n");
3002 goto out;3000 goto out;
3003 }3001 }
3002 local_irq_disable();
3004 disable_8259A_irq(0);3003 disable_8259A_irq(0);
3005 apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | cfg->vector);3004 apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | cfg->vector);
3006 apic_printk(APIC_QUIET, KERN_INFO "..... failed.\n");3005 apic_printk(APIC_QUIET, KERN_INFO "..... failed.\n");
@@ -3018,6 +3017,7 @@ static inline void __init check_timer(void) · 11 unmodified lines
3018 apic_printk(APIC_QUIET, KERN_INFO "..... works.\n");3017 apic_printk(APIC_QUIET, KERN_INFO "..... works.\n");
3019 goto out;3018 goto out;
3020 }3019 }
3020 local_irq_disable();
3021 apic_printk(APIC_QUIET, KERN_INFO "..... failed :(.\n");3021 apic_printk(APIC_QUIET, KERN_INFO "..... failed :(.\n");
3022 panic("IO-APIC + timer doesn't work! Boot with apic=debug and send a "3022 panic("IO-APIC + timer doesn't work! Boot with apic=debug and send a "
3023 "report. Then try booting with the 'noapic' option.\n");3023 "report. Then try booting with the 'noapic' option.\n");
@@ -3047,13 +3047,9 @@ out: · 23 unmodified lines
3047void __init setup_IO_APIC(void)3047void __init setup_IO_APIC(void)
3048{3048{
3049 3049
3050#ifdef CONFIG_X86_32
3051 enable_IO_APIC();
3052#else
3053 /*3050 /*
3054 * calling enable_IO_APIC() is moved to setup_local_APIC for BP3051 * calling enable_IO_APIC() is moved to setup_local_APIC for BP
3055 */3052 */
3056#endif
3057 3053
3058 io_apic_irqs = ~PIC_IRQS;3054 io_apic_irqs = ~PIC_IRQS;
3059 3055
@@ -3118,8 +3114,8 @@ static int ioapic_resume(struct sys_device *dev) · 58 unmodified lines
3118 3114
3119 spin_lock_irqsave(&ioapic_lock, flags);3115 spin_lock_irqsave(&ioapic_lock, flags);
3120 reg_00.raw = io_apic_read(dev->id, 0);3116 reg_00.raw = io_apic_read(dev->id, 0);
3121 if (reg_00.bits.ID != mp_ioapics[dev->id].mp_apicid) {3117 if (reg_00.bits.ID != mp_ioapics[dev->id].apicid) {
3122 reg_00.bits.ID = mp_ioapics[dev->id].mp_apicid;3118 reg_00.bits.ID = mp_ioapics[dev->id].apicid;
3123 io_apic_write(dev->id, 0, reg_00.raw);3119 io_apic_write(dev->id, 0, reg_00.raw);
3124 }3120 }
3125 spin_unlock_irqrestore(&ioapic_lock, flags);3121 spin_unlock_irqrestore(&ioapic_lock, flags);
@@ -3169,6 +3165,7 @@ static int __init ioapic_init_sysfs(void) · 43 unmodified lines
3169 3165
3170device_initcall(ioapic_init_sysfs);3166device_initcall(ioapic_init_sysfs);
3171 3167
3168static int nr_irqs_gsi = NR_IRQS_LEGACY;
3172/*3169/*
3173 * Dynamic irq allocate and deallocation3170 * Dynamic irq allocate and deallocation
3174 */3171 */
@@ -3183,11 +3180,11 @@ unsigned int create_irq_nr(unsigned int irq_want) · 8 unmodified lines
3183 struct irq_desc *desc_new = NULL;3180 struct irq_desc *desc_new = NULL;
3184 3181
3185 irq = 0;3182 irq = 0;
3186 spin_lock_irqsave(&vector_lock, flags);3183 if (irq_want < nr_irqs_gsi)
3187 for (new = irq_want; new < NR_IRQS; new++) {3184 irq_want = nr_irqs_gsi;
3188 if (platform_legacy_irq(new))
3189 continue;
3190 3185
3186 spin_lock_irqsave(&vector_lock, flags);
3187 for (new = irq_want; new < nr_irqs; new++) {
3191 desc_new = irq_to_desc_alloc_cpu(new, cpu);3188 desc_new = irq_to_desc_alloc_cpu(new, cpu);
3192 if (!desc_new) {3189 if (!desc_new) {
3193 printk(KERN_INFO "can not get irq_desc for %d\n", new);3190 printk(KERN_INFO "can not get irq_desc for %d\n", new);
@@ -3197,7 +3194,7 @@ unsigned int create_irq_nr(unsigned int irq_want) · 3 unmodified lines
3197 3194
3198 if (cfg_new->vector != 0)3195 if (cfg_new->vector != 0)
3199 continue;3196 continue;
3200 if (__assign_irq_vector(new, cfg_new, TARGET_CPUS) == 0)3197 if (__assign_irq_vector(new, cfg_new, apic->target_cpus()) == 0)
3201 irq = new;3198 irq = new;
3202 break;3199 break;
3203 }3200 }
@@ -3212,7 +3209,6 @@ unsigned int create_irq_nr(unsigned int irq_want) · 8 unmodified lines
3212 return irq;3209 return irq;
3213}3210}
3214 3211
3215static int nr_irqs_gsi = NR_IRQS_LEGACY;
3216int create_irq(void)3212int create_irq(void)
3217{3213{
3218 unsigned int irq_want;3214 unsigned int irq_want;
@@ -3259,12 +3255,15 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms · 40 unmodified lines
3259 int err;3255 int err;
3260 unsigned dest;3256 unsigned dest;
3261 3257
3258 if (disable_apic)
3259 return -ENXIO;
3260
3262 cfg = irq_cfg(irq);3261 cfg = irq_cfg(irq);
3263 err = assign_irq_vector(irq, cfg, TARGET_CPUS);3262 err = assign_irq_vector(irq, cfg, apic->target_cpus());
3264 if (err)3263 if (err)
3265 return err;3264 return err;
3266 3265
3267 dest = cpu_mask_to_apicid_and(cfg->domain, TARGET_CPUS);3266 dest = apic->cpu_mask_to_apicid_and(cfg->domain, apic->target_cpus());
3268 3267
3269#ifdef CONFIG_INTR_REMAP3268#ifdef CONFIG_INTR_REMAP
3270 if (irq_remapped(irq)) {3269 if (irq_remapped(irq)) {
@@ -3278,9 +3277,9 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms · 7 unmodified lines
3278 memset (&irte, 0, sizeof(irte));3277 memset (&irte, 0, sizeof(irte));
3279 3278
3280 irte.present = 1;3279 irte.present = 1;
3281 irte.dst_mode = INT_DEST_MODE;3280 irte.dst_mode = apic->irq_dest_mode;
3282 irte.trigger_mode = 0; /* edge */3281 irte.trigger_mode = 0; /* edge */
3283 irte.dlvry_mode = INT_DELIVERY_MODE;3282 irte.dlvry_mode = apic->irq_delivery_mode;
3284 irte.vector = cfg->vector;3283 irte.vector = cfg->vector;
3285 irte.dest_id = IRTE_DEST(dest);3284 irte.dest_id = IRTE_DEST(dest);
3286 3285
@@ -3298,10 +3297,10 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms · 11 unmodified lines
3298 msg->address_hi = MSI_ADDR_BASE_HI;3297 msg->address_hi = MSI_ADDR_BASE_HI;
3299 msg->address_lo =3298 msg->address_lo =
3300 MSI_ADDR_BASE_LO |3299 MSI_ADDR_BASE_LO |
3301 ((INT_DEST_MODE == 0) ?3300 ((apic->irq_dest_mode == 0) ?
3302 MSI_ADDR_DEST_MODE_PHYSICAL:3301 MSI_ADDR_DEST_MODE_PHYSICAL:
3303 MSI_ADDR_DEST_MODE_LOGICAL) |3302 MSI_ADDR_DEST_MODE_LOGICAL) |
3304 ((INT_DELIVERY_MODE != dest_LowestPrio) ?3303 ((apic->irq_delivery_mode != dest_LowestPrio) ?
3305 MSI_ADDR_REDIRECTION_CPU:3304 MSI_ADDR_REDIRECTION_CPU:
3306 MSI_ADDR_REDIRECTION_LOWPRI) |3305 MSI_ADDR_REDIRECTION_LOWPRI) |
3307 MSI_ADDR_DEST_ID(dest);3306 MSI_ADDR_DEST_ID(dest);
@@ -3309,7 +3308,7 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms · 1 unmodified line
3309 msg->data =3308 msg->data =
3310 MSI_DATA_TRIGGER_EDGE |3309 MSI_DATA_TRIGGER_EDGE |
3311 MSI_DATA_LEVEL_ASSERT |3310 MSI_DATA_LEVEL_ASSERT |
3312 ((INT_DELIVERY_MODE != dest_LowestPrio) ?3311 ((apic->irq_delivery_mode != dest_LowestPrio) ?
3313 MSI_DATA_DELIVERY_FIXED:3312 MSI_DATA_DELIVERY_FIXED:
3314 MSI_DATA_DELIVERY_LOWPRI) |3313 MSI_DATA_DELIVERY_LOWPRI) |
3315 MSI_DATA_VECTOR(cfg->vector);3314 MSI_DATA_VECTOR(cfg->vector);
@@ -3464,40 +3463,6 @@ static int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc, int irq) · 148 unmodified lines
3464 return 0;3463 return 0;
3465}3464}
3466 3465
3467int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc)
3468{
3469 unsigned int irq;
3470 int ret;
3471 unsigned int irq_want;
3472
3473 irq_want = nr_irqs_gsi;
3474 irq = create_irq_nr(irq_want);
3475 if (irq == 0)
3476 return -1;
3477
3478#ifdef CONFIG_INTR_REMAP
3479 if (!intr_remapping_enabled)
3480 goto no_ir;
3481
3482 ret = msi_alloc_irte(dev, irq, 1);
3483 if (ret < 0)
3484 goto error;
3485no_ir:
3486#endif
3487 ret = setup_msi_irq(dev, msidesc, irq);
3488 if (ret < 0) {
3489 destroy_irq(irq);
3490 return ret;
3491 }
3492 return 0;
3493
3494#ifdef CONFIG_INTR_REMAP
3495error:
3496 destroy_irq(irq);
3497 return ret;
3498#endif
3499}
3500
3501int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)3466int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
3502{3467{
3503 unsigned int irq;3468 unsigned int irq;
@@ -3514,9 +3479,9 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) · 10 unmodified lines
3514 sub_handle = 0;3479 sub_handle = 0;
3515 list_for_each_entry(msidesc, &dev->msi_list, list) {3480 list_for_each_entry(msidesc, &dev->msi_list, list) {
3516 irq = create_irq_nr(irq_want);3481 irq = create_irq_nr(irq_want);
3517 irq_want++;
3518 if (irq == 0)3482 if (irq == 0)
3519 return -1;3483 return -1;
3484 irq_want = irq + 1;
3520#ifdef CONFIG_INTR_REMAP3485#ifdef CONFIG_INTR_REMAP
3521 if (!intr_remapping_enabled)3486 if (!intr_remapping_enabled)
3522 goto no_ir;3487 goto no_ir;
@@ -3727,13 +3692,17 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev) · 204 unmodified lines
3727 struct irq_cfg *cfg;3692 struct irq_cfg *cfg;
3728 int err;3693 int err;
3729 3694
3695 if (disable_apic)
3696 return -ENXIO;
3697
3730 cfg = irq_cfg(irq);3698 cfg = irq_cfg(irq);
3731 err = assign_irq_vector(irq, cfg, TARGET_CPUS);3699 err = assign_irq_vector(irq, cfg, apic->target_cpus());
3732 if (!err) {3700 if (!err) {
3733 struct ht_irq_msg msg;3701 struct ht_irq_msg msg;
3734 unsigned dest;3702 unsigned dest;
3735 3703
3736 dest = cpu_mask_to_apicid_and(cfg->domain, TARGET_CPUS);3704 dest = apic->cpu_mask_to_apicid_and(cfg->domain,
3705 apic->target_cpus());
3737 3706
3738 msg.address_hi = HT_IRQ_HIGH_DEST_ID(dest);3707 msg.address_hi = HT_IRQ_HIGH_DEST_ID(dest);
3739 3708
@@ -3741,11 +3710,11 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev) · 1 unmodified line
3741 HT_IRQ_LOW_BASE |3710 HT_IRQ_LOW_BASE |
3742 HT_IRQ_LOW_DEST_ID(dest) |3711 HT_IRQ_LOW_DEST_ID(dest) |
3743 HT_IRQ_LOW_VECTOR(cfg->vector) |3712 HT_IRQ_LOW_VECTOR(cfg->vector) |
3744 ((INT_DEST_MODE == 0) ?3713 ((apic->irq_dest_mode == 0) ?
3745 HT_IRQ_LOW_DM_PHYSICAL :3714 HT_IRQ_LOW_DM_PHYSICAL :
3746 HT_IRQ_LOW_DM_LOGICAL) |3715 HT_IRQ_LOW_DM_LOGICAL) |
3747 HT_IRQ_LOW_RQEOI_EDGE |3716 HT_IRQ_LOW_RQEOI_EDGE |
3748 ((INT_DELIVERY_MODE != dest_LowestPrio) ?3717 ((apic->irq_delivery_mode != dest_LowestPrio) ?
3749 HT_IRQ_LOW_MT_FIXED :3718 HT_IRQ_LOW_MT_FIXED :
3750 HT_IRQ_LOW_MT_ARBITRATED) |3719 HT_IRQ_LOW_MT_ARBITRATED) |
3751 HT_IRQ_LOW_IRQ_MASKED;3720 HT_IRQ_LOW_IRQ_MASKED;
@@ -3761,7 +3730,7 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev) · 9 unmodified lines
3761}3730}
3762#endif /* CONFIG_HT_IRQ */3731#endif /* CONFIG_HT_IRQ */
3763 3732
3764#ifdef CONFIG_X86_643733#ifdef CONFIG_X86_UV
3765/*3734/*
3766 * Re-target the irq to the specified CPU and enable the specified MMR located3735 * Re-target the irq to the specified CPU and enable the specified MMR located
3767 * on the specified blade to allow the sending of MSIs to the specified CPU.3736 * on the specified blade to allow the sending of MSIs to the specified CPU.
@@ -3793,12 +3762,12 @@ int arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade, · 25 unmodified lines
3793 BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != sizeof(unsigned long));3762 BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != sizeof(unsigned long));
3794 3763
3795 entry->vector = cfg->vector;3764 entry->vector = cfg->vector;
3796 entry->delivery_mode = INT_DELIVERY_MODE;3765 entry->delivery_mode = apic->irq_delivery_mode;
3797 entry->dest_mode = INT_DEST_MODE;3766 entry->dest_mode = apic->irq_dest_mode;
3798 entry->polarity = 0;3767 entry->polarity = 0;
3799 entry->trigger = 0;3768 entry->trigger = 0;
3800 entry->mask = 0;3769 entry->mask = 0;
3801 entry->dest = cpu_mask_to_apicid(eligible_cpu);3770 entry->dest = apic->cpu_mask_to_apicid(eligible_cpu);
3802 3771
3803 mmr_pnode = uv_blade_to_pnode(mmr_blade);3772 mmr_pnode = uv_blade_to_pnode(mmr_blade);
3804 uv_write_global_mmr64(mmr_pnode, mmr_offset, mmr_value);3773 uv_write_global_mmr64(mmr_pnode, mmr_offset, mmr_value);
@@ -3861,6 +3830,28 @@ void __init probe_nr_irqs_gsi(void) · 56 unmodified lines
3861 printk(KERN_DEBUG "nr_irqs_gsi: %d\n", nr_irqs_gsi);3830 printk(KERN_DEBUG "nr_irqs_gsi: %d\n", nr_irqs_gsi);
3862}3831}
3863 3832
3833#ifdef CONFIG_SPARSE_IRQ
3834int __init arch_probe_nr_irqs(void)
3835{
3836 int nr;
3837
3838 if (nr_irqs > (NR_VECTORS * nr_cpu_ids))
3839 nr_irqs = NR_VECTORS * nr_cpu_ids;
3840
3841 nr = nr_irqs_gsi + 8 * nr_cpu_ids;
3842#if defined(CONFIG_PCI_MSI) || defined(CONFIG_HT_IRQ)
3843 /*
3844 * for MSI and HT dyn irq
3845 */
3846 nr += nr_irqs_gsi * 16;
3847#endif
3848 if (nr < nr_irqs)
3849 nr_irqs = nr;
3850
3851 return 0;
3852}
3853#endif
3854
3864/* --------------------------------------------------------------------------3855/* --------------------------------------------------------------------------
3865 ACPI-based IOAPIC Configuration3856 ACPI-based IOAPIC Configuration
3866 -------------------------------------------------------------------------- */3857 -------------------------------------------------------------------------- */
@@ -3886,7 +3877,7 @@ int __init io_apic_get_unique_id(int ioapic, int apic_id) · 19 unmodified lines
3886 */3877 */
3887 3878
3888 if (physids_empty(apic_id_map))3879 if (physids_empty(apic_id_map))
3889 apic_id_map = ioapic_phys_id_map(phys_cpu_present_map);3880 apic_id_map = apic->ioapic_phys_id_map(phys_cpu_present_map);
3890 3881
3891 spin_lock_irqsave(&ioapic_lock, flags);3882 spin_lock_irqsave(&ioapic_lock, flags);
3892 reg_00.raw = io_apic_read(ioapic, 0);3883 reg_00.raw = io_apic_read(ioapic, 0);
@@ -3902,10 +3893,10 @@ int __init io_apic_get_unique_id(int ioapic, int apic_id) · 9 unmodified lines
3902 * Every APIC in a system must have a unique ID or we get lots of nice3893 * Every APIC in a system must have a unique ID or we get lots of nice
3903 * 'stuck on smp_invalidate_needed IPI wait' messages.3894 * 'stuck on smp_invalidate_needed IPI wait' messages.
3904 */3895 */
3905 if (check_apicid_used(apic_id_map, apic_id)) {3896 if (apic->check_apicid_used(apic_id_map, apic_id)) {
3906 3897
3907 for (i = 0; i < get_physical_broadcast(); i++) {3898 for (i = 0; i < get_physical_broadcast(); i++) {
3908 if (!check_apicid_used(apic_id_map, i))3899 if (!apic->check_apicid_used(apic_id_map, i))
3909 break;3900 break;
3910 }3901 }
3911 3902
@@ -3918,7 +3909,7 @@ int __init io_apic_get_unique_id(int ioapic, int apic_id) · 6 unmodified lines
3918 apic_id = i;3909 apic_id = i;
3919 }3910 }
3920 3911
3921 tmp = apicid_to_cpu_present(apic_id);3912 tmp = apic->apicid_to_cpu_present(apic_id);
3922 physids_or(apic_id_map, apic_id_map, tmp);3913 physids_or(apic_id_map, apic_id_map, tmp);
3923 3914
3924 if (reg_00.bits.ID != apic_id) {3915 if (reg_00.bits.ID != apic_id) {
@@ -3995,8 +3986,8 @@ int acpi_get_override_irq(int bus_irq, int *trigger, int *polarity) · 70 unmodified lines
3995 return -1;3986 return -1;
3996 3987
3997 for (i = 0; i < mp_irq_entries; i++)3988 for (i = 0; i < mp_irq_entries; i++)
3998 if (mp_irqs[i].mp_irqtype == mp_INT &&3989 if (mp_irqs[i].irqtype == mp_INT &&
3999 mp_irqs[i].mp_srcbusirq == bus_irq)3990 mp_irqs[i].srcbusirq == bus_irq)
4000 break;3991 break;
4001 if (i >= mp_irq_entries)3992 if (i >= mp_irq_entries)
4002 return -1;3993 return -1;
@@ -4011,7 +4002,7 @@ int acpi_get_override_irq(int bus_irq, int *trigger, int *polarity) · 8 unmodified lines
4011/*4002/*
4012 * This function currently is only a helper for the i386 smp boot process where4003 * This function currently is only a helper for the i386 smp boot process where
4013 * we need to reprogram the ioredtbls to cater for the cpus which have come online4004 * we need to reprogram the ioredtbls to cater for the cpus which have come online
4014 * so mask in all cases should simply be TARGET_CPUS4005 * so mask in all cases should simply be apic->target_cpus()
4015 */4006 */
4016#ifdef CONFIG_SMP4007#ifdef CONFIG_SMP
4017void __init setup_ioapic_dest(void)4008void __init setup_ioapic_dest(void)
@@ -4050,9 +4041,9 @@ void __init setup_ioapic_dest(void) · 32 unmodified lines
4050 */4041 */
4051 if (desc->status &4042 if (desc->status &
4052 (IRQ_NO_BALANCING | IRQ_AFFINITY_SET))4043 (IRQ_NO_BALANCING | IRQ_AFFINITY_SET))
4053 mask = &desc->affinity;4044 mask = desc->affinity;
4054 else4045 else
4055 mask = TARGET_CPUS;4046 mask = apic->target_cpus();
4056 4047
4057#ifdef CONFIG_INTR_REMAP4048#ifdef CONFIG_INTR_REMAP
4058 if (intr_remapping_enabled)4049 if (intr_remapping_enabled)
@@ -4111,7 +4102,7 @@ void __init ioapic_init_mappings(void) · 52 unmodified lines
4111 ioapic_res = ioapic_setup_resources();4102 ioapic_res = ioapic_setup_resources();
4112 for (i = 0; i < nr_ioapics; i++) {4103 for (i = 0; i < nr_ioapics; i++) {
4113 if (smp_found_config) {4104 if (smp_found_config) {
4114 ioapic_phys = mp_ioapics[i].mp_apicaddr;4105 ioapic_phys = mp_ioapics[i].apicaddr;
4115#ifdef CONFIG_X86_324106#ifdef CONFIG_X86_32
4116 if (!ioapic_phys) {4107 if (!ioapic_phys) {
4117 printk(KERN_ERR4108 printk(KERN_ERR
arch/x86/kernel/apic/ipi.c+164−0
@@ -0,0 +1,164 @@
1#include <linux/cpumask.h>
2#include <linux/interrupt.h>
3#include <linux/init.h>
4
5#include <linux/mm.h>
6#include <linux/delay.h>
7#include <linux/spinlock.h>
8#include <linux/kernel_stat.h>
9#include <linux/mc146818rtc.h>
10#include <linux/cache.h>
11#include <linux/cpu.h>
12#include <linux/module.h>
13
14#include <asm/smp.h>
15#include <asm/mtrr.h>
16#include <asm/tlbflush.h>
17#include <asm/mmu_context.h>
18#include <asm/apic.h>
19#include <asm/proto.h>
20#include <asm/ipi.h>
21
22void default_send_IPI_mask_sequence_phys(const struct cpumask *mask, int vector)
23{
24 unsigned long query_cpu;
25 unsigned long flags;
26
27 /*
28 * Hack. The clustered APIC addressing mode doesn't allow us to send
29 * to an arbitrary mask, so I do a unicast to each CPU instead.
30 * - mbligh
31 */
32 local_irq_save(flags);
33 for_each_cpu(query_cpu, mask) {
34 __default_send_IPI_dest_field(per_cpu(x86_cpu_to_apicid,
35 query_cpu), vector, APIC_DEST_PHYSICAL);
36 }
37 local_irq_restore(flags);
38}
39
40void default_send_IPI_mask_allbutself_phys(const struct cpumask *mask,
41 int vector)
42{
43 unsigned int this_cpu = smp_processor_id();
44 unsigned int query_cpu;
45 unsigned long flags;
46
47 /* See Hack comment above */
48
49 local_irq_save(flags);
50 for_each_cpu(query_cpu, mask) {
51 if (query_cpu == this_cpu)
52 continue;
53 __default_send_IPI_dest_field(per_cpu(x86_cpu_to_apicid,
54 query_cpu), vector, APIC_DEST_PHYSICAL);
55 }
56 local_irq_restore(flags);
57}
58
59void default_send_IPI_mask_sequence_logical(const struct cpumask *mask,
60 int vector)
61{
62 unsigned long flags;
63 unsigned int query_cpu;
64
65 /*
66 * Hack. The clustered APIC addressing mode doesn't allow us to send
67 * to an arbitrary mask, so I do a unicasts to each CPU instead. This
68 * should be modified to do 1 message per cluster ID - mbligh
69 */
70
71 local_irq_save(flags);
72 for_each_cpu(query_cpu, mask)
73 __default_send_IPI_dest_field(
74 apic->cpu_to_logical_apicid(query_cpu), vector,
75 apic->dest_logical);
76 local_irq_restore(flags);
77}
78
79void default_send_IPI_mask_allbutself_logical(const struct cpumask *mask,
80 int vector)
81{
82 unsigned long flags;
83 unsigned int query_cpu;
84 unsigned int this_cpu = smp_processor_id();
85
86 /* See Hack comment above */
87
88 local_irq_save(flags);
89 for_each_cpu(query_cpu, mask) {
90 if (query_cpu == this_cpu)
91 continue;
92 __default_send_IPI_dest_field(
93 apic->cpu_to_logical_apicid(query_cpu), vector,
94 apic->dest_logical);
95 }
96 local_irq_restore(flags);
97}
98
99#ifdef CONFIG_X86_32
100
101/*
102 * This is only used on smaller machines.
103 */
104void default_send_IPI_mask_logical(const struct cpumask *cpumask, int vector)
105{
106 unsigned long mask = cpumask_bits(cpumask)[0];
107 unsigned long flags;
108
109 local_irq_save(flags);
110 WARN_ON(mask & ~cpumask_bits(cpu_online_mask)[0]);
111 __default_send_IPI_dest_field(mask, vector, apic->dest_logical);
112 local_irq_restore(flags);
113}
114
115void default_send_IPI_allbutself(int vector)
116{
117 /*
118 * if there are no other CPUs in the system then we get an APIC send
119 * error if we try to broadcast, thus avoid sending IPIs in this case.
120 */
121 if (!(num_online_cpus() > 1))
122 return;
123
124 __default_local_send_IPI_allbutself(vector);
125}
126
127void default_send_IPI_all(int vector)
128{
129 __default_local_send_IPI_all(vector);
130}
131
132void default_send_IPI_self(int vector)
133{
134 __default_send_IPI_shortcut(APIC_DEST_SELF, vector, apic->dest_logical);
135}
136
137/* must come after the send_IPI functions above for inlining */
138static int convert_apicid_to_cpu(int apic_id)
139{
140 int i;
141
142 for_each_possible_cpu(i) {
143 if (per_cpu(x86_cpu_to_apicid, i) == apic_id)
144 return i;
145 }
146 return -1;
147}
148
149int safe_smp_processor_id(void)
150{
151 int apicid, cpuid;
152
153 if (!boot_cpu_has(X86_FEATURE_APIC))
154 return 0;
155
156 apicid = hard_smp_processor_id();
157 if (apicid == BAD_APICID)
158 return 0;
159
160 cpuid = convert_apicid_to_cpu(apicid);
161

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