bug fixes
6eca9545 parents 5f16012 34ddeb0 b037384 f6b54f0 76eb9a38980 files · +533826 −327045Browse filesUnified · Split
| @@ -113,3 +113,5 @@ Uwe Kleine-König <Uwe.Kleine-Koenig@digi.com> · 112 unmodified lines | |||
| 113 | Valdis Kletnieks <Valdis.Kletnieks@vt.edu> | 113 | Valdis Kletnieks <Valdis.Kletnieks@vt.edu> |
| 114 | Takashi YOSHII <takashi.yoshii.zj@renesas.com> | 114 | Takashi YOSHII <takashi.yoshii.zj@renesas.com> |
| 115 | Yusuke Goda <goda.yusuke@renesas.com> | 115 | Yusuke Goda <goda.yusuke@renesas.com> |
| 116 | Gustavo Padovan <gustavo@las.ic.unicamp.br> | ||
| 117 | Gustavo Padovan <padovan@profusion.mobi> | ||
| @@ -3814,8 +3814,8 @@ D: INFO-SHEET, former maintainer · 3813 unmodified lines | |||
| 3814 | D: Author of the longest-living linux bug | 3814 | D: Author of the longest-living linux bug |
| 3815 | 3815 | ||
| 3816 | N: Jonathan Woithe | 3816 | N: Jonathan Woithe |
| 3817 | E: jwoithe@physics.adelaide.edu.au | 3817 | E: jwoithe@just42.net |
| 3818 | W: http://www.physics.adelaide.edu.au/~jwoithe | 3818 | W: http:/www.just42.net/jwoithe |
| 3819 | D: ALS-007 sound card extensions to Sound Blaster driver | 3819 | D: ALS-007 sound card extensions to Sound Blaster driver |
| 3820 | S: 20 Jordan St | 3820 | S: 20 Jordan St |
| 3821 | S: Valley View, SA 5093 | 3821 | S: Valley View, SA 5093 |
| @@ -218,8 +218,6 @@ m68k/ · 217 unmodified lines | |||
| 218 | - directory with info about Linux on Motorola 68k architecture. | 218 | - directory with info about Linux on Motorola 68k architecture. |
| 219 | magic-number.txt | 219 | magic-number.txt |
| 220 | - list of magic numbers used to mark/protect kernel data structures. | 220 | - list of magic numbers used to mark/protect kernel data structures. |
| 221 | mca.txt | ||
| 222 | - info on supporting Micro Channel Architecture (e.g. PS/2) systems. | ||
| 223 | md.txt | 221 | md.txt |
| 224 | - info on boot arguments for the multiple devices driver. | 222 | - info on boot arguments for the multiple devices driver. |
| 225 | memory-barriers.txt | 223 | memory-barriers.txt |
| @@ -0,0 +1,9 @@ | |||
| 1 | What: ip_queue | ||
| 2 | Date: finally removed in kernel v3.5.0 | ||
| 3 | Contact: Pablo Neira Ayuso <pablo@netfilter.org> | ||
| 4 | Description: | ||
| 5 | ip_queue has been replaced by nfnetlink_queue which provides | ||
| 6 | more advanced queueing mechanism to user-space. The ip_queue | ||
| 7 | module was already announced to become obsolete years ago. | ||
| 8 | |||
| 9 | Users: | ||
| @@ -0,0 +1,45 @@ | |||
| 1 | What: /sys/kernel/debug/nx-crypto/* | ||
| 2 | Date: March 2012 | ||
| 3 | KernelVersion: 3.4 | ||
| 4 | Contact: Kent Yoder <key@linux.vnet.ibm.com> | ||
| 5 | Description: | ||
| 6 | |||
| 7 | These debugfs interfaces are built by the nx-crypto driver, built in | ||
| 8 | arch/powerpc/crypto/nx. | ||
| 9 | |||
| 10 | Error Detection | ||
| 11 | =============== | ||
| 12 | |||
| 13 | errors: | ||
| 14 | - A u32 providing a total count of errors since the driver was loaded. The | ||
| 15 | only errors counted here are those returned from the hcall, H_COP_OP. | ||
| 16 | |||
| 17 | last_error: | ||
| 18 | - The most recent non-zero return code from the H_COP_OP hcall. -EBUSY is not | ||
| 19 | recorded here (the hcall will retry until -EBUSY goes away). | ||
| 20 | |||
| 21 | last_error_pid: | ||
| 22 | - The process ID of the process who received the most recent error from the | ||
| 23 | hcall. | ||
| 24 | |||
| 25 | Device Use | ||
| 26 | ========== | ||
| 27 | |||
| 28 | aes_bytes: | ||
| 29 | - The total number of bytes encrypted using AES in any of the driver's | ||
| 30 | supported modes. | ||
| 31 | |||
| 32 | aes_ops: | ||
| 33 | - The total number of AES operations submitted to the hardware. | ||
| 34 | |||
| 35 | sha256_bytes: | ||
| 36 | - The total number of bytes hashed by the hardware using SHA-256. | ||
| 37 | |||
| 38 | sha256_ops: | ||
| 39 | - The total number of SHA-256 operations submitted to the hardware. | ||
| 40 | |||
| 41 | sha512_bytes: | ||
| 42 | - The total number of bytes hashed by the hardware using SHA-512. | ||
| 43 | |||
| 44 | sha512_ops: | ||
| 45 | - The total number of SHA-512 operations submitted to the hardware. | ||
| @@ -0,0 +1,90 @@ | |||
| 1 | What: /dev/kmsg | ||
| 2 | Date: Mai 2012 | ||
| 3 | KernelVersion: 3.5 | ||
| 4 | Contact: Kay Sievers <kay@vrfy.org> | ||
| 5 | Description: The /dev/kmsg character device node provides userspace access | ||
| 6 | to the kernel's printk buffer. | ||
| 7 | |||
| 8 | Injecting messages: | ||
| 9 | Every write() to the opened device node places a log entry in | ||
| 10 | the kernel's printk buffer. | ||
| 11 | |||
| 12 | The logged line can be prefixed with a <N> syslog prefix, which | ||
| 13 | carries the syslog priority and facility. The single decimal | ||
| 14 | prefix number is composed of the 3 lowest bits being the syslog | ||
| 15 | priority and the higher bits the syslog facility number. | ||
| 16 | |||
| 17 | If no prefix is given, the priority number is the default kernel | ||
| 18 | log priority and the facility number is set to LOG_USER (1). It | ||
| 19 | is not possible to inject messages from userspace with the | ||
| 20 | facility number LOG_KERN (0), to make sure that the origin of | ||
| 21 | the messages can always be reliably determined. | ||
| 22 | |||
| 23 | Accessing the buffer: | ||
| 24 | Every read() from the opened device node receives one record | ||
| 25 | of the kernel's printk buffer. | ||
| 26 | |||
| 27 | The first read() directly following an open() always returns | ||
| 28 | first message in the buffer; there is no kernel-internal | ||
| 29 | persistent state; many readers can concurrently open the device | ||
| 30 | and read from it, without affecting other readers. | ||
| 31 | |||
| 32 | Every read() will receive the next available record. If no more | ||
| 33 | records are available read() will block, or if O_NONBLOCK is | ||
| 34 | used -EAGAIN returned. | ||
| 35 | |||
| 36 | Messages in the record ring buffer get overwritten as whole, | ||
| 37 | there are never partial messages received by read(). | ||
| 38 | |||
| 39 | In case messages get overwritten in the circular buffer while | ||
| 40 | the device is kept open, the next read() will return -EPIPE, | ||
| 41 | and the seek position be updated to the next available record. | ||
| 42 | Subsequent reads() will return available records again. | ||
| 43 | |||
| 44 | Unlike the classic syslog() interface, the 64 bit record | ||
| 45 | sequence numbers allow to calculate the amount of lost | ||
| 46 | messages, in case the buffer gets overwritten. And they allow | ||
| 47 | to reconnect to the buffer and reconstruct the read position | ||
| 48 | if needed, without limiting the interface to a single reader. | ||
| 49 | |||
| 50 | The device supports seek with the following parameters: | ||
| 51 | SEEK_SET, 0 | ||
| 52 | seek to the first entry in the buffer | ||
| 53 | SEEK_END, 0 | ||
| 54 | seek after the last entry in the buffer | ||
| 55 | SEEK_DATA, 0 | ||
| 56 | seek after the last record available at the time | ||
| 57 | the last SYSLOG_ACTION_CLEAR was issued. | ||
| 58 | |||
| 59 | The output format consists of a prefix carrying the syslog | ||
| 60 | prefix including priority and facility, the 64 bit message | ||
| 61 | sequence number and the monotonic timestamp in microseconds. | ||
| 62 | The values are separated by a ','. Future extensions might | ||
| 63 | add more comma separated values before the terminating ';'. | ||
| 64 | Unknown values should be gracefully ignored. | ||
| 65 | |||
| 66 | The human readable text string starts directly after the ';' | ||
| 67 | and is terminated by a '\n'. Untrusted values derived from | ||
| 68 | hardware or other facilities are printed, therefore | ||
| 69 | all non-printable characters in the log message are escaped | ||
| 70 | by "\x00" C-style hex encoding. | ||
| 71 | |||
| 72 | A line starting with ' ', is a continuation line, adding | ||
| 73 | key/value pairs to the log message, which provide the machine | ||
| 74 | readable context of the message, for reliable processing in | ||
| 75 | userspace. | ||
| 76 | |||
| 77 | Example: | ||
| 78 | 7,160,424069;pci_root PNP0A03:00: host bridge window [io 0x0000-0x0cf7] (ignored) | ||
| 79 | SUBSYSTEM=acpi | ||
| 80 | DEVICE=+acpi:PNP0A03:00 | ||
| 81 | 6,339,5140900;NET: Registered protocol family 10 | ||
| 82 | 30,340,5690716;udevd[80]: starting version 181 | ||
| 83 | |||
| 84 | The DEVICE= key uniquely identifies devices the following way: | ||
| 85 | b12:8 - block dev_t | ||
| 86 | c127:3 - char dev_t | ||
| 87 | n8 - netdev ifindex | ||
| 88 | +sound:card0 - subsystem:devname | ||
| 89 | |||
| 90 | Users: dmesg(1), userspace kernel log consumers | ||
| @@ -6,13 +6,21 @@ Description: This is a read-only file. Dumps below driver information and · 5 unmodified lines | |||
| 6 | hardware registers. | 6 | hardware registers. |
| 7 | - S ACTive | 7 | - S ACTive |
| 8 | - Command Issue | 8 | - Command Issue |
| 9 | - Allocated | ||
| 10 | - Completed | 9 | - Completed |
| 11 | - PORT IRQ STAT | 10 | - PORT IRQ STAT |
| 12 | - HOST IRQ STAT | 11 | - HOST IRQ STAT |
| 12 | - Allocated | ||
| 13 | - Commands in Q | ||
| 13 | 14 | ||
| 14 | What: /sys/block/rssd*/status | 15 | What: /sys/block/rssd*/status |
| 15 | Date: April 2012 | 16 | Date: April 2012 |
| 16 | KernelVersion: 3.4 | 17 | KernelVersion: 3.4 |
| 17 | Contact: Asai Thambi S P <asamymuthupa@micron.com> | 18 | Contact: Asai Thambi S P <asamymuthupa@micron.com> |
| 18 | Description: This is a read-only file. Indicates the status of the device. | 19 | Description: This is a read-only file. Indicates the status of the device. |
| 20 | |||
| 21 | What: /sys/block/rssd*/flags | ||
| 22 | Date: May 2012 | ||
| 23 | KernelVersion: 3.5 | ||
| 24 | Contact: Asai Thambi S P <asamymuthupa@micron.com> | ||
| 25 | Description: This is a read-only file. Dumps the flags in port and driver | ||
| 26 | data structure | ||
| @@ -0,0 +1,77 @@ | |||
| 1 | What: /sys/bus/fcoe/ctlr_X | ||
| 2 | Date: March 2012 | ||
| 3 | KernelVersion: TBD | ||
| 4 | Contact: Robert Love <robert.w.love@intel.com>, devel@open-fcoe.org | ||
| 5 | Description: 'FCoE Controller' instances on the fcoe bus | ||
| 6 | Attributes: | ||
| 7 | |||
| 8 | fcf_dev_loss_tmo: Device loss timeout peroid (see below). Changing | ||
| 9 | this value will change the dev_loss_tmo for all | ||
| 10 | FCFs discovered by this controller. | ||
| 11 | |||
| 12 | lesb_link_fail: Link Error Status Block (LESB) link failure count. | ||
| 13 | |||
| 14 | lesb_vlink_fail: Link Error Status Block (LESB) virtual link | ||
| 15 | failure count. | ||
| 16 | |||
| 17 | lesb_miss_fka: Link Error Status Block (LESB) missed FCoE | ||
| 18 | Initialization Protocol (FIP) Keep-Alives (FKA). | ||
| 19 | |||
| 20 | lesb_symb_err: Link Error Status Block (LESB) symbolic error count. | ||
| 21 | |||
| 22 | lesb_err_block: Link Error Status Block (LESB) block error count. | ||
| 23 | |||
| 24 | lesb_fcs_error: Link Error Status Block (LESB) Fibre Channel | ||
| 25 | Serivces error count. | ||
| 26 | |||
| 27 | Notes: ctlr_X (global increment starting at 0) | ||
| 28 | |||
| 29 | What: /sys/bus/fcoe/fcf_X | ||
| 30 | Date: March 2012 | ||
| 31 | KernelVersion: TBD | ||
| 32 | Contact: Robert Love <robert.w.love@intel.com>, devel@open-fcoe.org | ||
| 33 | Description: 'FCoE FCF' instances on the fcoe bus. A FCF is a Fibre Channel | ||
| 34 | Forwarder, which is a FCoE switch that can accept FCoE | ||
| 35 | (Ethernet) packets, unpack them, and forward the embedded | ||
| 36 | Fibre Channel frames into a FC fabric. It can also take | ||
| 37 | outbound FC frames and pack them in Ethernet packets to | ||
| 38 | be sent to their destination on the Ethernet segment. | ||
| 39 | Attributes: | ||
| 40 | |||
| 41 | fabric_name: Identifies the fabric that the FCF services. | ||
| 42 | |||
| 43 | switch_name: Identifies the FCF. | ||
| 44 | |||
| 45 | priority: The switch's priority amongst other FCFs on the same | ||
| 46 | fabric. | ||
| 47 | |||
| 48 | selected: 1 indicates that the switch has been selected for use; | ||
| 49 | 0 indicates that the swich will not be used. | ||
| 50 | |||
| 51 | fc_map: The Fibre Channel MAP | ||
| 52 | |||
| 53 | vfid: The Virtual Fabric ID | ||
| 54 | |||
| 55 | mac: The FCF's MAC address | ||
| 56 | |||
| 57 | fka_peroid: The FIP Keep-Alive peroid | ||
| 58 | |||
| 59 | fabric_state: The internal kernel state | ||
| 60 | "Unknown" - Initialization value | ||
| 61 | "Disconnected" - No link to the FCF/fabric | ||
| 62 | "Connected" - Host is connected to the FCF | ||
| 63 | "Deleted" - FCF is being removed from the system | ||
| 64 | |||
| 65 | dev_loss_tmo: The device loss timeout peroid for this FCF. | ||
| 66 | |||
| 67 | Notes: A device loss infrastructre similar to the FC Transport's | ||
| 68 | is present in fcoe_sysfs. It is nice to have so that a | ||
| 69 | link flapping adapter doesn't continually advance the count | ||
| 70 | used to identify the discovered FCF. FCFs will exist in a | ||
| 71 | "Disconnected" state until either the timer expires and the | ||
| 72 | FCF becomes "Deleted" or the FCF is rediscovered and becomes | ||
| 73 | "Connected." | ||
| 74 | |||
| 75 | |||
| 76 | Users: The first user of this interface will be the fcoeadm application, | ||
| 77 | which is commonly packaged in the fcoe-utils package. | ||
| @@ -0,0 +1,15 @@ | |||
| 1 | What: /sys/bus/i2c/devices/.../output_hvled[n] | ||
| 2 | Date: April 2012 | ||
| 3 | KernelVersion: 3.5 | ||
| 4 | Contact: Johan Hovold <jhovold@gmail.com> | ||
| 5 | Description: | ||
| 6 | Set the controlling backlight device for high-voltage current | ||
| 7 | sink HVLED[n] (n = 1, 2) (0, 1). | ||
| 8 | |||
| 9 | What: /sys/bus/i2c/devices/.../output_lvled[n] | ||
| 10 | Date: April 2012 | ||
| 11 | KernelVersion: 3.5 | ||
| 12 | Contact: Johan Hovold <jhovold@gmail.com> | ||
| 13 | Description: | ||
| 14 | Set the controlling led device for low-voltage current sink | ||
| 15 | LVLED[n] (n = 1..5) (0..3). | ||
| @@ -108,7 +108,7 @@ Description: · 107 unmodified lines | |||
| 108 | physically equivalent inputs when non differential readings are | 108 | physically equivalent inputs when non differential readings are |
| 109 | separately available. In differential only parts, then all that | 109 | separately available. In differential only parts, then all that |
| 110 | is required is a consistent labeling. Units after application | 110 | is required is a consistent labeling. Units after application |
| 111 | of scale and offset are nanofarads.. | 111 | of scale and offset are nanofarads. |
| 112 | 112 | ||
| 113 | What: /sys/bus/iio/devices/iio:deviceX/in_temp_raw | 113 | What: /sys/bus/iio/devices/iio:deviceX/in_temp_raw |
| 114 | What: /sys/bus/iio/devices/iio:deviceX/in_tempX_raw | 114 | What: /sys/bus/iio/devices/iio:deviceX/in_tempX_raw |
| @@ -119,7 +119,7 @@ KernelVersion: 2.6.35 · 4 unmodified lines | |||
| 119 | Contact: linux-iio@vger.kernel.org | 119 | Contact: linux-iio@vger.kernel.org |
| 120 | Description: | 120 | Description: |
| 121 | Raw (unscaled no bias removal etc) temperature measurement. | 121 | Raw (unscaled no bias removal etc) temperature measurement. |
| 122 | It an axis is specified it generally means that the temperature | 122 | If an axis is specified it generally means that the temperature |
| 123 | sensor is associated with one part of a compound device (e.g. | 123 | sensor is associated with one part of a compound device (e.g. |
| 124 | a gyroscope axis). Units after application of scale and offset | 124 | a gyroscope axis). Units after application of scale and offset |
| 125 | are milli degrees Celsuis. | 125 | are milli degrees Celsuis. |
| @@ -232,7 +232,7 @@ Description: · 106 unmodified lines | |||
| 232 | If known for a device, scale to be applied to <type>Y[_name]_raw | 232 | If known for a device, scale to be applied to <type>Y[_name]_raw |
| 233 | post addition of <type>[Y][_name]_offset in order to obtain the | 233 | post addition of <type>[Y][_name]_offset in order to obtain the |
| 234 | measured value in <type> units as specified in | 234 | measured value in <type> units as specified in |
| 235 | <type>[Y][_name]_raw documentation.. If shared across all in | 235 | <type>[Y][_name]_raw documentation. If shared across all in |
| 236 | channels then Y and <x|y|z> are not present and the value is | 236 | channels then Y and <x|y|z> are not present and the value is |
| 237 | called <type>[Y][_name]_scale. The peak modifier means this | 237 | called <type>[Y][_name]_scale. The peak modifier means this |
| 238 | value is applied to <type>Y[_name]_peak_raw values. | 238 | value is applied to <type>Y[_name]_peak_raw values. |
| @@ -243,6 +243,8 @@ What: /sys/bus/iio/devices/iio:deviceX/in_accel_z_calibbias · 4 unmodified lines | |||
| 243 | What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_x_calibbias | 243 | What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_x_calibbias |
| 244 | What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_y_calibbias | 244 | What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_y_calibbias |
| 245 | What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_z_calibbias | 245 | What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_z_calibbias |
| 246 | What: /sys/bus/iio/devices/iio:deviceX/in_illuminance0_calibbias | ||
| 247 | What: /sys/bus/iio/devices/iio:deviceX/in_proximity0_calibbias | ||
| 246 | KernelVersion: 2.6.35 | 248 | KernelVersion: 2.6.35 |
| 247 | Contact: linux-iio@vger.kernel.org | 249 | Contact: linux-iio@vger.kernel.org |
| 248 | Description: | 250 | Description: |
| @@ -258,6 +260,8 @@ What /sys/bus/iio/devices/iio:deviceX/in_accel_z_calibscale · 9 unmodified lines | |||
| 258 | What /sys/bus/iio/devices/iio:deviceX/in_anglvel_x_calibscale | 260 | What /sys/bus/iio/devices/iio:deviceX/in_anglvel_x_calibscale |
| 259 | What /sys/bus/iio/devices/iio:deviceX/in_anglvel_y_calibscale | 261 | What /sys/bus/iio/devices/iio:deviceX/in_anglvel_y_calibscale |
| 260 | What /sys/bus/iio/devices/iio:deviceX/in_anglvel_z_calibscale | 262 | What /sys/bus/iio/devices/iio:deviceX/in_anglvel_z_calibscale |
| 263 | what /sys/bus/iio/devices/iio:deviceX/in_illuminance0_calibscale | ||
| 264 | what /sys/bus/iio/devices/iio:deviceX/in_proximity0_calibscale | ||
| 261 | KernelVersion: 2.6.35 | 265 | KernelVersion: 2.6.35 |
| 262 | Contact: linux-iio@vger.kernel.org | 266 | Contact: linux-iio@vger.kernel.org |
| 263 | Description: | 267 | Description: |
| @@ -276,6 +280,13 @@ Description: · 12 unmodified lines | |||
| 276 | If a discrete set of scale values are available, they | 280 | If a discrete set of scale values are available, they |
| 277 | are listed in this attribute. | 281 | are listed in this attribute. |
| 278 | 282 | ||
| 283 | What /sys/bus/iio/devices/iio:deviceX/out_voltageY_hardwaregain | ||
| 284 | KernelVersion: 2.6.35 | ||
| 285 | Contact: linux-iio@vger.kernel.org | ||
| 286 | Description: | ||
| 287 | Hardware applied gain factor. If shared across all channels, | ||
| 288 | <type>_hardwaregain is used. | ||
| 289 | |||
| 279 | What: /sys/.../in_accel_filter_low_pass_3db_frequency | 290 | What: /sys/.../in_accel_filter_low_pass_3db_frequency |
| 280 | What: /sys/.../in_magn_filter_low_pass_3db_frequency | 291 | What: /sys/.../in_magn_filter_low_pass_3db_frequency |
| 281 | What: /sys/.../in_anglvel_filter_low_pass_3db_frequency | 292 | What: /sys/.../in_anglvel_filter_low_pass_3db_frequency |
| @@ -453,10 +464,14 @@ What: /sys/.../events/in_magn_z_raw_thresh_rising_value · 171 unmodified lines | |||
| 453 | What: /sys/.../events/in_magn_z_raw_thresh_falling_value | 464 | What: /sys/.../events/in_magn_z_raw_thresh_falling_value |
| 454 | What: /sys/.../events/in_voltageY_supply_raw_thresh_rising_value | 465 | What: /sys/.../events/in_voltageY_supply_raw_thresh_rising_value |
| 455 | What: /sys/.../events/in_voltageY_supply_raw_thresh_falling_value | 466 | What: /sys/.../events/in_voltageY_supply_raw_thresh_falling_value |
| 467 | What: /sys/.../events/in_voltageY_raw_thresh_rising_value | ||
| 456 | What: /sys/.../events/in_voltageY_raw_thresh_falling_value | 468 | What: /sys/.../events/in_voltageY_raw_thresh_falling_value |
| 457 | What: /sys/.../events/in_voltageY_raw_thresh_falling_value | 469 | What: /sys/.../events/in_tempY_raw_thresh_rising_value |
| 458 | What: /sys/.../events/in_tempY_raw_thresh_falling_value | ||
| 459 | What: /sys/.../events/in_tempY_raw_thresh_falling_value | 470 | What: /sys/.../events/in_tempY_raw_thresh_falling_value |
| 471 | What: /sys/.../events/in_illuminance0_thresh_falling_value | ||
| 472 | what: /sys/.../events/in_illuminance0_thresh_rising_value | ||
| 473 | what: /sys/.../events/in_proximity0_thresh_falling_value | ||
| 474 | what: /sys/.../events/in_proximity0_thresh_rising_value | ||
| 460 | KernelVersion: 2.6.37 | 475 | KernelVersion: 2.6.37 |
| 461 | Contact: linux-iio@vger.kernel.org | 476 | Contact: linux-iio@vger.kernel.org |
| 462 | Description: | 477 | Description: |
| @@ -490,9 +505,9 @@ What: /sys/.../events/in_magn_z_raw_roc_rising_value · 27 unmodified lines | |||
| 490 | What: /sys/.../events/in_magn_z_raw_roc_falling_value | 505 | What: /sys/.../events/in_magn_z_raw_roc_falling_value |
| 491 | What: /sys/.../events/in_voltageY_supply_raw_roc_rising_value | 506 | What: /sys/.../events/in_voltageY_supply_raw_roc_rising_value |
| 492 | What: /sys/.../events/in_voltageY_supply_raw_roc_falling_value | 507 | What: /sys/.../events/in_voltageY_supply_raw_roc_falling_value |
| 508 | What: /sys/.../events/in_voltageY_raw_roc_rising_value | ||
| 493 | What: /sys/.../events/in_voltageY_raw_roc_falling_value | 509 | What: /sys/.../events/in_voltageY_raw_roc_falling_value |
| 494 | What: /sys/.../events/in_voltageY_raw_roc_falling_value | 510 | What: /sys/.../events/in_tempY_raw_roc_rising_value |
| 495 | What: /sys/.../events/in_tempY_raw_roc_falling_value | ||
| 496 | What: /sys/.../events/in_tempY_raw_roc_falling_value | 511 | What: /sys/.../events/in_tempY_raw_roc_falling_value |
| 497 | KernelVersion: 2.6.37 | 512 | KernelVersion: 2.6.37 |
| 498 | Contact: linux-iio@vger.kernel.org | 513 | Contact: linux-iio@vger.kernel.org |
| @@ -556,6 +571,8 @@ What: /sys/.../events/in_tempY_thresh_falling_period · 57 unmodified lines | |||
| 556 | What: /sys/.../events/in_tempY_roc_rising_period | 571 | What: /sys/.../events/in_tempY_roc_rising_period |
| 557 | What: /sys/.../events/in_tempY_roc_falling_period | 572 | What: /sys/.../events/in_tempY_roc_falling_period |
| 558 | What: /sys/.../events/in_accel_x&y&z_mag_falling_period | 573 | What: /sys/.../events/in_accel_x&y&z_mag_falling_period |
| 574 | What: /sys/.../events/in_intensity0_thresh_period | ||
| 575 | What: /sys/.../events/in_proximity0_thresh_period | ||
| 559 | KernelVersion: 2.6.37 | 576 | KernelVersion: 2.6.37 |
| 560 | Contact: linux-iio@vger.kernel.org | 577 | Contact: linux-iio@vger.kernel.org |
| 561 | Description: | 578 | Description: |
| @@ -718,24 +735,3 @@ Contact: linux-iio@vger.kernel.org · 156 unmodified lines | |||
| 718 | Description: | 735 | Description: |
| 719 | This attribute is used to read the amount of quadrature error | 736 | This attribute is used to read the amount of quadrature error |
| 720 | present in the device at a given time. | 737 | present in the device at a given time. |
| 721 | |||
| 722 | What: /sys/.../iio:deviceX/ac_excitation_en | ||
| 723 | KernelVersion: 3.1.0 | ||
| 724 | Contact: linux-iio@vger.kernel.org | ||
| 725 | Description: | ||
| 726 | This attribute, if available, is used to enable the AC | ||
| 727 | excitation mode found on some converters. In ac excitation mode, | ||
| 728 | the polarity of the excitation voltage is reversed on | ||
| 729 | alternate cycles, to eliminate DC errors. | ||
| 730 | |||
| 731 | What: /sys/.../iio:deviceX/bridge_switch_en | ||
| 732 | KernelVersion: 3.1.0 | ||
| 733 | Contact: linux-iio@vger.kernel.org | ||
| 734 | Description: | ||
| 735 | This attribute, if available, is used to close or open the | ||
| 736 | bridge power down switch found on some converters. | ||
| 737 | In bridge applications, such as strain gauges and load cells, | ||
| 738 | the bridge itself consumes the majority of the current in the | ||
| 739 | system. To minimize the current consumption of the system, | ||
| 740 | the bridge can be disconnected (when it is not being used | ||
| 741 | using the bridge_switch_en attribute. | ||
| @@ -65,11 +65,11 @@ snap_* · 64 unmodified lines | |||
| 65 | Entries under /sys/bus/rbd/devices/<dev-id>/snap_<snap-name> | 65 | Entries under /sys/bus/rbd/devices/<dev-id>/snap_<snap-name> |
| 66 | ------------------------------------------------------------- | 66 | ------------------------------------------------------------- |
| 67 | 67 | ||
| 68 | id | 68 | snap_id |
| 69 | 69 | ||
| 70 | The rados internal snapshot id assigned for this snapshot | 70 | The rados internal snapshot id assigned for this snapshot |
| 71 | 71 | ||
| 72 | size | 72 | snap_size |
| 73 | 73 | ||
| 74 | The size of the image when this snapshot was taken. | 74 | The size of the image when this snapshot was taken. |
| 75 | 75 | ||
| @@ -135,6 +135,17 @@ Description: · 134 unmodified lines | |||
| 135 | for the device and attempt to bind to it. For example: | 135 | for the device and attempt to bind to it. For example: |
| 136 | # echo "8086 10f5" > /sys/bus/usb/drivers/foo/new_id | 136 | # echo "8086 10f5" > /sys/bus/usb/drivers/foo/new_id |
| 137 | 137 | ||
| 138 | Reading from this file will list all dynamically added | ||
| 139 | device IDs in the same format, with one entry per | ||
| 140 | line. For example: | ||
| 141 | # cat /sys/bus/usb/drivers/foo/new_id | ||
| 142 | 8086 10f5 | ||
| 143 | dead beef 06 | ||
| 144 | f00d cafe | ||
| 145 | |||
| 146 | The list will be truncated at PAGE_SIZE bytes due to | ||
| 147 | sysfs restrictions. | ||
| 148 | |||
| 138 | What: /sys/bus/usb-serial/drivers/.../new_id | 149 | What: /sys/bus/usb-serial/drivers/.../new_id |
| 139 | Date: October 2011 | 150 | Date: October 2011 |
| 140 | Contact: linux-usb@vger.kernel.org | 151 | Contact: linux-usb@vger.kernel.org |
| @@ -157,6 +168,10 @@ Description: · 16 unmodified lines | |||
| 157 | match the driver to the device. For example: | 168 | match the driver to the device. For example: |
| 158 | # echo "046d c315" > /sys/bus/usb/drivers/foo/remove_id | 169 | # echo "046d c315" > /sys/bus/usb/drivers/foo/remove_id |
| 159 | 170 | ||
| 171 | Reading from this file will list the dynamically added | ||
| 172 | device IDs, exactly like reading from the entry | ||
| 173 | "/sys/bus/usb/drivers/.../new_id" | ||
| 174 | |||
| 160 | What: /sys/bus/usb/device/.../avoid_reset_quirk | 175 | What: /sys/bus/usb/device/.../avoid_reset_quirk |
| 161 | Date: December 2009 | 176 | Date: December 2009 |
| 162 | Contact: Oliver Neukum <oliver@neukum.org> | 177 | Contact: Oliver Neukum <oliver@neukum.org> |
| @@ -189,7 +204,7 @@ Contact: Matthew Garrett <mjg@redhat.com> · 26 unmodified lines | |||
| 189 | Description: | 204 | Description: |
| 190 | Some information about whether a given USB device is | 205 | Some information about whether a given USB device is |
| 191 | physically fixed to the platform can be inferred from a | 206 | physically fixed to the platform can be inferred from a |
| 192 | combination of hub decriptor bits and platform-specific data | 207 | combination of hub descriptor bits and platform-specific data |
| 193 | such as ACPI. This file will read either "removable" or | 208 | such as ACPI. This file will read either "removable" or |
| 194 | "fixed" if the information is available, and "unknown" | 209 | "fixed" if the information is available, and "unknown" |
| 195 | otherwise. | 210 | otherwise. |
| @@ -0,0 +1,48 @@ | |||
| 1 | What: /sys/class/backlight/<backlight>/als_channel | ||
| 2 | Date: May 2012 | ||
| 3 | KernelVersion: 3.5 | ||
| 4 | Contact: Johan Hovold <jhovold@gmail.com> | ||
| 5 | Description: | ||
| 6 | Get the ALS output channel used as input in | ||
| 7 | ALS-current-control mode (0, 1), where | ||
| 8 | |||
| 9 | 0 - out_current0 (backlight 0) | ||
| 10 | 1 - out_current1 (backlight 1) | ||
| 11 | |||
| 12 | What: /sys/class/backlight/<backlight>/als_en | ||
| 13 | Date: May 2012 | ||
| 14 | KernelVersion: 3.5 | ||
| 15 | Contact: Johan Hovold <jhovold@gmail.com> | ||
| 16 | Description: | ||
| 17 | Enable ALS-current-control mode (0, 1). | ||
| 18 | |||
| 19 | What: /sys/class/backlight/<backlight>/id | ||
| 20 | Date: April 2012 | ||
| 21 | KernelVersion: 3.5 | ||
| 22 | Contact: Johan Hovold <jhovold@gmail.com> | ||
| 23 | Description: | ||
| 24 | Get the id of this backlight (0, 1). | ||
| 25 | |||
| 26 | What: /sys/class/backlight/<backlight>/linear | ||
| 27 | Date: April 2012 | ||
| 28 | KernelVersion: 3.5 | ||
| 29 | Contact: Johan Hovold <jhovold@gmail.com> | ||
| 30 | Description: | ||
| 31 | Set the brightness-mapping mode (0, 1), where | ||
| 32 | |||
| 33 | 0 - exponential mode | ||
| 34 | 1 - linear mode | ||
| 35 | |||
| 36 | What: /sys/class/backlight/<backlight>/pwm | ||
| 37 | Date: April 2012 | ||
| 38 | KernelVersion: 3.5 | ||
| 39 | Contact: Johan Hovold <jhovold@gmail.com> | ||
| 40 | Description: | ||
| 41 | Set the PWM-input control mask (5 bits), where | ||
| 42 | |||
| 43 | bit 5 - PWM-input enabled in Zone 4 | ||
| 44 | bit 4 - PWM-input enabled in Zone 3 | ||
| 45 | bit 3 - PWM-input enabled in Zone 2 | ||
| 46 | bit 2 - PWM-input enabled in Zone 1 | ||
| 47 | bit 1 - PWM-input enabled in Zone 0 | ||
| 48 | bit 0 - PWM-input enabled | ||
| @@ -0,0 +1,97 @@ | |||
| 1 | What: /sys/class/extcon/.../ | ||
| 2 | Date: February 2012 | ||
| 3 | Contact: MyungJoo Ham <myungjoo.ham@samsung.com> | ||
| 4 | Description: | ||
| 5 | Provide a place in sysfs for the extcon objects. | ||
| 6 | This allows accessing extcon specific variables. | ||
| 7 | The name of extcon object denoted as ... is the name given | ||
| 8 | with extcon_dev_register. | ||
| 9 | |||
| 10 | One extcon device denotes a single external connector | ||
| 11 | port. An external connector may have multiple cables | ||
| 12 | attached simultaneously. Many of docks, cradles, and | ||
| 13 | accessory cables have such capability. For example, | ||
| 14 | the 30-pin port of Nuri board (/arch/arm/mach-exynos) | ||
| 15 | may have both HDMI and Charger attached, or analog audio, | ||
| 16 | video, and USB cables attached simulteneously. | ||
| 17 | |||
| 18 | If there are cables mutually exclusive with each other, | ||
| 19 | such binary relations may be expressed with extcon_dev's | ||
| 20 | mutually_exclusive array. | ||
| 21 | |||
| 22 | What: /sys/class/extcon/.../name | ||
| 23 | Date: February 2012 | ||
| 24 | Contact: MyungJoo Ham <myungjoo.ham@samsung.com> | ||
| 25 | Description: | ||
| 26 | The /sys/class/extcon/.../name shows the name of the extcon | ||
| 27 | object. If the extcon object has an optional callback | ||
| 28 | "show_name" defined, the callback will provide the name with | ||
| 29 | this sysfs node. | ||
| 30 | |||
| 31 | What: /sys/class/extcon/.../state | ||
| 32 | Date: February 2012 | ||
| 33 | Contact: MyungJoo Ham <myungjoo.ham@samsung.com> | ||
| 34 | Description: | ||
| 35 | The /sys/class/extcon/.../state shows and stores the cable | ||
| 36 | attach/detach information of the corresponding extcon object. | ||
| 37 | If the extcon object has an optional callback "show_state" | ||
| 38 | defined, the showing function is overriden with the optional | ||
| 39 | callback. | ||
| 40 | |||
| 41 | If the default callback for showing function is used, the | ||
| 42 | format is like this: | ||
| 43 | # cat state | ||
| 44 | USB_OTG=1 | ||
| 45 | HDMI=0 | ||
| 46 | TA=1 | ||
| 47 | EAR_JACK=0 | ||
| 48 | # | ||
| 49 | In this example, the extcon device have USB_OTG and TA | ||
| 50 | cables attached and HDMI and EAR_JACK cables detached. | ||
| 51 | |||
| 52 | In order to update the state of an extcon device, enter a hex | ||
| 53 | state number starting with 0x. | ||
| 54 | echo 0xHEX > state | ||
| 55 | |||
| 56 | This updates the whole state of the extcon dev. | ||
| 57 | Inputs of all the methods are required to meet the | ||
| 58 | mutually_exclusive contidions if they exist. | ||
| 59 | |||
| 60 | It is recommended to use this "global" state interface if | ||
| 61 | you need to enter the value atomically. The later state | ||
| 62 | interface associated with each cable cannot update | ||
| 63 | multiple cable states of an extcon device simultaneously. | ||
| 64 | |||
| 65 | What: /sys/class/extcon/.../cable.x/name | ||
| 66 | Date: February 2012 | ||
| 67 | Contact: MyungJoo Ham <myungjoo.ham@samsung.com> | ||
| 68 | Description: | ||
| 69 | The /sys/class/extcon/.../cable.x/name shows the name of cable | ||
| 70 | "x" (integer between 0 and 31) of an extcon device. | ||
| 71 | |||
| 72 | What: /sys/class/extcon/.../cable.x/state | ||
| 73 | Date: February 2012 | ||
| 74 | Contact: MyungJoo Ham <myungjoo.ham@samsung.com> | ||
| 75 | Description: | ||
| 76 | The /sys/class/extcon/.../cable.x/name shows and stores the | ||
| 77 | state of cable "x" (integer between 0 and 31) of an extcon | ||
| 78 | device. The state value is either 0 (detached) or 1 | ||
| 79 | (attached). | ||
| 80 | |||
| 81 | What: /sys/class/extcon/.../mutually_exclusive/... | ||
| 82 | Date: December 2011 | ||
| 83 | Contact: MyungJoo Ham <myungjoo.ham@samsung.com> | ||
| 84 | Description: | ||
| 85 | Shows the relations of mutually exclusiveness. For example, | ||
| 86 | if the mutually_exclusive array of extcon_dev is | ||
| 87 | {0x3, 0x5, 0xC, 0x0}, the, the output is: | ||
| 88 | # ls mutually_exclusive/ | ||
| 89 | 0x3 | ||
| 90 | 0x5 | ||
| 91 | 0xc | ||
| 92 | # | ||
| 93 | |||
| 94 | Note that mutually_exclusive is a sub-directory of the extcon | ||
| 95 | device and the file names under the mutually_exclusive | ||
| 96 | directory show the mutually-exclusive sets, not the contents | ||
| 97 | of the files. | ||
| @@ -0,0 +1,65 @@ | |||
| 1 | What: /sys/class/leds/<led>/als_channel | ||
| 2 | Date: May 2012 | ||
| 3 | KernelVersion: 3.5 | ||
| 4 | Contact: Johan Hovold <jhovold@gmail.com> | ||
| 5 | Description: | ||
| 6 | Set the ALS output channel to use as input in | ||
| 7 | ALS-current-control mode (1, 2), where | ||
| 8 | |||
| 9 | 1 - out_current1 | ||
| 10 | 2 - out_current2 | ||
| 11 | |||
| 12 | What: /sys/class/leds/<led>/als_en | ||
| 13 | Date: May 2012 | ||
| 14 | KernelVersion: 3.5 | ||
| 15 | Contact: Johan Hovold <jhovold@gmail.com> | ||
| 16 | Description: | ||
| 17 | Enable ALS-current-control mode (0, 1). | ||
| 18 | |||
| 19 | What: /sys/class/leds/<led>/falltime | ||
| 20 | What: /sys/class/leds/<led>/risetime | ||
| 21 | Date: April 2012 | ||
| 22 | KernelVersion: 3.5 | ||
| 23 | Contact: Johan Hovold <jhovold@gmail.com> | ||
| 24 | Description: | ||
| 25 | Set the pattern generator fall and rise times (0..7), where | ||
| 26 | |||
| 27 | 0 - 2048 us | ||
| 28 | 1 - 262 ms | ||
| 29 | 2 - 524 ms | ||
| 30 | 3 - 1.049 s | ||
| 31 | 4 - 2.097 s | ||
| 32 | 5 - 4.194 s | ||
| 33 | 6 - 8.389 s | ||
| 34 | 7 - 16.78 s | ||
| 35 | |||
| 36 | What: /sys/class/leds/<led>/id | ||
| 37 | Date: April 2012 | ||
| 38 | KernelVersion: 3.5 | ||
| 39 | Contact: Johan Hovold <jhovold@gmail.com> | ||
| 40 | Description: | ||
| 41 | Get the id of this led (0..3). | ||
| 42 | |||
| 43 | What: /sys/class/leds/<led>/linear | ||
| 44 | Date: April 2012 | ||
| 45 | KernelVersion: 3.5 | ||
| 46 | Contact: Johan Hovold <jhovold@gmail.com> | ||
| 47 | Description: | ||
| 48 | Set the brightness-mapping mode (0, 1), where | ||
| 49 | |||
| 50 | 0 - exponential mode | ||
| 51 | 1 - linear mode | ||
| 52 | |||
| 53 | What: /sys/class/leds/<led>/pwm | ||
| 54 | Date: April 2012 | ||
| 55 | KernelVersion: 3.5 | ||
| 56 | Contact: Johan Hovold <jhovold@gmail.com> | ||
| 57 | Description: | ||
| 58 | Set the PWM-input control mask (5 bits), where | ||
| 59 | |||
| 60 | bit 5 - PWM-input enabled in Zone 4 | ||
| 61 | bit 4 - PWM-input enabled in Zone 3 | ||
| 62 | bit 3 - PWM-input enabled in Zone 2 | ||
| 63 | bit 2 - PWM-input enabled in Zone 1 | ||
| 64 | bit 1 - PWM-input enabled in Zone 0 | ||
| 65 | bit 0 - PWM-input enabled | ||
| @@ -123,3 +123,54 @@ Description: · 122 unmodified lines | |||
| 123 | half page, or a quarter page). | 123 | half page, or a quarter page). |
| 124 | 124 | ||
| 125 | In the case of ECC NOR, it is the ECC block size. | 125 | In the case of ECC NOR, it is the ECC block size. |
| 126 | |||
| 127 | What: /sys/class/mtd/mtdX/ecc_strength | ||
| 128 | Date: April 2012 | ||
| 129 | KernelVersion: 3.4 | ||
| 130 | Contact: linux-mtd@lists.infradead.org | ||
| 131 | Description: | ||
| 132 | Maximum number of bit errors that the device is capable of | ||
| 133 | correcting within each region covering an ecc step. This will | ||
| 134 | always be a non-negative integer. Note that some devices will | ||
| 135 | have multiple ecc steps within each writesize region. | ||
| 136 | |||
| 137 | In the case of devices lacking any ECC capability, it is 0. | ||
| 138 | |||
| 139 | What: /sys/class/mtd/mtdX/bitflip_threshold | ||
| 140 | Date: April 2012 | ||
| 141 | KernelVersion: 3.4 | ||
| 142 | Contact: linux-mtd@lists.infradead.org | ||
| 143 | Description: | ||
| 144 | This allows the user to examine and adjust the criteria by which | ||
| 145 | mtd returns -EUCLEAN from mtd_read(). If the maximum number of | ||
| 146 | bit errors that were corrected on any single region comprising | ||
| 147 | an ecc step (as reported by the driver) equals or exceeds this | ||
| 148 | value, -EUCLEAN is returned. Otherwise, absent an error, 0 is | ||
| 149 | returned. Higher layers (e.g., UBI) use this return code as an | ||
| 150 | indication that an erase block may be degrading and should be | ||
| 151 | scrutinized as a candidate for being marked as bad. | ||
| 152 | |||
| 153 | The initial value may be specified by the flash device driver. | ||
| 154 | If not, then the default value is ecc_strength. | ||
| 155 | |||
| 156 | The introduction of this feature brings a subtle change to the | ||
| 157 | meaning of the -EUCLEAN return code. Previously, it was | ||
| 158 | interpreted to mean simply "one or more bit errors were | ||
| 159 | corrected". Its new interpretation can be phrased as "a | ||
| 160 | dangerously high number of bit errors were corrected on one or | ||
| 161 | more regions comprising an ecc step". The precise definition of | ||
| 162 | "dangerously high" can be adjusted by the user with | ||
| 163 | bitflip_threshold. Users are discouraged from doing this, | ||
| 164 | however, unless they know what they are doing and have intimate | ||
| 165 | knowledge of the properties of their device. Broadly speaking, | ||
| 166 | bitflip_threshold should be low enough to detect genuine erase | ||
| 167 | block degradation, but high enough to avoid the consequences of | ||
| 168 | a persistent return value of -EUCLEAN on devices where sticky | ||
| 169 | bitflips occur. Note that if bitflip_threshold exceeds | ||
| 170 | ecc_strength, -EUCLEAN is never returned by mtd_read(). | ||
| 171 | Conversely, if bitflip_threshold is zero, -EUCLEAN is always | ||
| 172 | returned, absent a hard error. | ||
| 173 | |||
| 174 | This is generally applicable only to NAND flash devices with ECC | ||
| 175 | capability. It is ignored on devices lacking ECC capability; | ||
| 176 | i.e., devices for which ecc_strength is zero. | ||
| @@ -14,6 +14,15 @@ Description: · 13 unmodified lines | |||
| 14 | mesh will be sent using multiple interfaces at the | 14 | mesh will be sent using multiple interfaces at the |
| 15 | same time (if available). | 15 | same time (if available). |
| 16 | 16 | ||
| 17 | What: /sys/class/net/<mesh_iface>/mesh/bridge_loop_avoidance | ||
| 18 | Date: November 2011 | ||
| 19 | Contact: Simon Wunderlich <siwu@hrz.tu-chemnitz.de> | ||
| 20 | Description: | ||
| 21 | Indicates whether the bridge loop avoidance feature | ||
| 22 | is enabled. This feature detects and avoids loops | ||
| 23 | between the mesh and devices bridged with the soft | ||
| 24 | interface <mesh_iface>. | ||
| 25 | |||
| 17 | What: /sys/class/net/<mesh_iface>/mesh/fragmentation | 26 | What: /sys/class/net/<mesh_iface>/mesh/fragmentation |
| 18 | Date: October 2010 | 27 | Date: October 2010 |
| 19 | Contact: Andreas Langer <an.langer@gmx.de> | 28 | Contact: Andreas Langer <an.langer@gmx.de> |
| @@ -96,16 +96,26 @@ Description: · 95 unmodified lines | |||
| 96 | is read-only. If the device is not enabled to wake up the | 96 | is read-only. If the device is not enabled to wake up the |
| 97 | system from sleep states, this attribute is not present. | 97 | system from sleep states, this attribute is not present. |
| 98 | 98 | ||
| 99 | What: /sys/devices/.../power/wakeup_hit_count | 99 | What: /sys/devices/.../power/wakeup_abort_count |
| 100 | Date: September 2010 | 100 | Date: February 2012 |
| 101 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | 101 | Contact: Rafael J. Wysocki <rjw@sisk.pl> |
| 102 | Description: | 102 | Description: |
| 103 | The /sys/devices/.../wakeup_hit_count attribute contains the | 103 | The /sys/devices/.../wakeup_abort_count attribute contains the |
| 104 | number of times the processing of a wakeup event associated with | 104 | number of times the processing of a wakeup event associated with |
| 105 | the device might prevent the system from entering a sleep state. | 105 | the device might have aborted system transition into a sleep |
| 106 | This attribute is read-only. If the device is not enabled to | 106 | state in progress. This attribute is read-only. If the device |
| 107 | wake up the system from sleep states, this attribute is not | 107 | is not enabled to wake up the system from sleep states, this |
| 108 | present. | 108 | attribute is not present. |
| 109 | |||
| 110 | What: /sys/devices/.../power/wakeup_expire_count | ||
| 111 | Date: February 2012 | ||
| 112 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | ||
| 113 | Description: | ||
| 114 | The /sys/devices/.../wakeup_expire_count attribute contains the | ||
| 115 | number of times a wakeup event associated with the device has | ||
| 116 | been reported with a timeout that expired. This attribute is | ||
| 117 | read-only. If the device is not enabled to wake up the system | ||
| 118 | from sleep states, this attribute is not present. | ||
| 109 | 119 | ||
| 110 | What: /sys/devices/.../power/wakeup_active | 120 | What: /sys/devices/.../power/wakeup_active |
| 111 | Date: September 2010 | 121 | Date: September 2010 |
| @@ -148,6 +158,17 @@ Description: · 36 unmodified lines | |||
| 148 | not enabled to wake up the system from sleep states, this | 158 | not enabled to wake up the system from sleep states, this |
| 149 | attribute is not present. | 159 | attribute is not present. |
| 150 | 160 | ||
| 161 | What: /sys/devices/.../power/wakeup_prevent_sleep_time_ms | ||
| 162 | Date: February 2012 | ||
| 163 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | ||
| 164 | Description: | ||
| 165 | The /sys/devices/.../wakeup_prevent_sleep_time_ms attribute | ||
| 166 | contains the total time the device has been preventing | ||
| 167 | opportunistic transitions to sleep states from occuring. | ||
| 168 | This attribute is read-only. If the device is not enabled to | ||
| 169 | wake up the system from sleep states, this attribute is not | ||
| 170 | present. | ||
| 171 | |||
| 151 | What: /sys/devices/.../power/autosuspend_delay_ms | 172 | What: /sys/devices/.../power/autosuspend_delay_ms |
| 152 | Date: September 2010 | 173 | Date: September 2010 |
| 153 | Contact: Alan Stern <stern@rowland.harvard.edu> | 174 | Contact: Alan Stern <stern@rowland.harvard.edu> |
| @@ -9,31 +9,6 @@ Description: · 8 unmodified lines | |||
| 9 | 9 | ||
| 10 | /sys/devices/system/cpu/cpu#/ | 10 | /sys/devices/system/cpu/cpu#/ |
| 11 | 11 | ||
| 12 | What: /sys/devices/system/cpu/sched_mc_power_savings | ||
| 13 | /sys/devices/system/cpu/sched_smt_power_savings | ||
| 14 | Date: June 2006 | ||
| 15 | Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org> | ||
| 16 | Description: Discover and adjust the kernel's multi-core scheduler support. | ||
| 17 | |||
| 18 | Possible values are: | ||
| 19 | |||
| 20 | 0 - No power saving load balance (default value) | ||
| 21 | 1 - Fill one thread/core/package first for long running threads | ||
| 22 | 2 - Also bias task wakeups to semi-idle cpu package for power | ||
| 23 | savings | ||
| 24 | |||
| 25 | sched_mc_power_savings is dependent upon SCHED_MC, which is | ||
| 26 | itself architecture dependent. | ||
| 27 | |||
| 28 | sched_smt_power_savings is dependent upon SCHED_SMT, which | ||
| 29 | is itself architecture dependent. | ||
| 30 | |||
| 31 | The two files are independent of each other. It is possible | ||
| 32 | that one file may be present without the other. | ||
| 33 | |||
| 34 | Introduced by git commit 5c45bf27. | ||
| 35 | |||
| 36 | |||
| 37 | What: /sys/devices/system/cpu/kernel_max | 12 | What: /sys/devices/system/cpu/kernel_max |
| 38 | /sys/devices/system/cpu/offline | 13 | /sys/devices/system/cpu/offline |
| 39 | /sys/devices/system/cpu/online | 14 | /sys/devices/system/cpu/online |
| @@ -9,15 +9,24 @@ Description: · 8 unmodified lines | |||
| 9 | or 0 otherwise. Writing to this file one of these values | 9 | or 0 otherwise. Writing to this file one of these values |
| 10 | switches reporting speed. | 10 | switches reporting speed. |
| 11 | 11 | ||
| 12 | What: /sys/class/leds/0005\:056A\:00BD.0001\:selector\:*/ | ||
| 13 | Date: May 2012 | ||
| 14 | Kernel Version: 3.5 | ||
| 15 | Contact: linux-bluetooth@vger.kernel.org | ||
| 16 | Description: | ||
| 17 | LED selector for Intuos4 WL. There are 4 leds, but only one LED | ||
| 18 | can be lit at a time. Max brightness is 127. | ||
| 19 | |||
| 12 | What: /sys/bus/usb/devices/<busnum>-<devnum>:<cfg>.<intf>/wacom_led/led | 20 | What: /sys/bus/usb/devices/<busnum>-<devnum>:<cfg>.<intf>/wacom_led/led |
| 13 | Date: August 2011 | 21 | Date: August 2011 |
| 14 | Contact: linux-input@vger.kernel.org | 22 | Contact: linux-input@vger.kernel.org |
| 15 | Description: | 23 | Description: |
| 16 | Attribute group for control of the status LEDs and the OLEDs. | 24 | Attribute group for control of the status LEDs and the OLEDs. |
| 17 | This attribute group is only available for Intuos 4 M, L, | 25 | This attribute group is only available for Intuos 4 M, L, |
| 18 | and XL (with LEDs and OLEDs) and Cintiq 21UX2 and Cintiq 24HD | 26 | and XL (with LEDs and OLEDs), Intuos 5 (LEDs only), and Cintiq |
| 19 | (LEDs only). Therefore its presence implicitly signifies the | 27 | 21UX2 and Cintiq 24HD (LEDs only). Therefore its presence |
| 20 | presence of said LEDs and OLEDs on the tablet device. | 28 | implicitly signifies the presence of said LEDs and OLEDs on the |
| 29 | tablet device. | ||
| 21 | 30 | ||
| 22 | What: /sys/bus/usb/devices/<busnum>-<devnum>:<cfg>.<intf>/wacom_led/status0_luminance | 31 | What: /sys/bus/usb/devices/<busnum>-<devnum>:<cfg>.<intf>/wacom_led/status0_luminance |
| 23 | Date: August 2011 | 32 | Date: August 2011 |
| @@ -40,10 +49,10 @@ What: /sys/bus/usb/devices/<busnum>-<devnum>:<cfg>.<intf>/wacom_led/status_led0 · 16 unmodified lines | |||
| 40 | Date: August 2011 | 49 | Date: August 2011 |
| 41 | Contact: linux-input@vger.kernel.org | 50 | Contact: linux-input@vger.kernel.org |
| 42 | Description: | 51 | Description: |
| 43 | Writing to this file sets which one of the four (for Intuos 4) | 52 | Writing to this file sets which one of the four (for Intuos 4 |
| 44 | or of the right four (for Cintiq 21UX2 and Cintiq 24HD) status | 53 | and Intuos 5) or of the right four (for Cintiq 21UX2 and Cintiq |
| 45 | LEDs is active (0..3). The other three LEDs on the same side are | 54 | 24HD) status LEDs is active (0..3). The other three LEDs on the |
| 46 | always inactive. | 55 | same side are always inactive. |
| 47 | 56 | ||
| 48 | What: /sys/bus/usb/devices/<busnum>-<devnum>:<cfg>.<intf>/wacom_led/status_led1_select | 57 | What: /sys/bus/usb/devices/<busnum>-<devnum>:<cfg>.<intf>/wacom_led/status_led1_select |
| 49 | Date: September 2011 | 58 | Date: September 2011 |
| @@ -172,3 +172,62 @@ Description: · 171 unmodified lines | |||
| 172 | 172 | ||
| 173 | Reading from this file will display the current value, which is | 173 | Reading from this file will display the current value, which is |
| 174 | set to 1 MB by default. | 174 | set to 1 MB by default. |
| 175 | |||
| 176 | What: /sys/power/autosleep | ||
| 177 | Date: April 2012 | ||
| 178 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | ||
| 179 | Description: | ||
| 180 | The /sys/power/autosleep file can be written one of the strings | ||
| 181 | returned by reads from /sys/power/state. If that happens, a | ||
| 182 | work item attempting to trigger a transition of the system to | ||
| 183 | the sleep state represented by that string is queued up. This | ||
| 184 | attempt will only succeed if there are no active wakeup sources | ||
| 185 | in the system at that time. After every execution, regardless | ||
| 186 | of whether or not the attempt to put the system to sleep has | ||
| 187 | succeeded, the work item requeues itself until user space | ||
| 188 | writes "off" to /sys/power/autosleep. | ||
| 189 | |||
| 190 | Reading from this file causes the last string successfully | ||
| 191 | written to it to be returned. | ||
| 192 | |||
| 193 | What: /sys/power/wake_lock | ||
| 194 | Date: February 2012 | ||
| 195 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | ||
| 196 | Description: | ||
| 197 | The /sys/power/wake_lock file allows user space to create | ||
| 198 | wakeup source objects and activate them on demand (if one of | ||
| 199 | those wakeup sources is active, reads from the | ||
| 200 | /sys/power/wakeup_count file block or return false). When a | ||
| 201 | string without white space is written to /sys/power/wake_lock, | ||
| 202 | it will be assumed to represent a wakeup source name. If there | ||
| 203 | is a wakeup source object with that name, it will be activated | ||
| 204 | (unless active already). Otherwise, a new wakeup source object | ||
| 205 | will be registered, assigned the given name and activated. | ||
| 206 | If a string written to /sys/power/wake_lock contains white | ||
| 207 | space, the part of the string preceding the white space will be | ||
| 208 | regarded as a wakeup source name and handled as descrived above. | ||
| 209 | The other part of the string will be regarded as a timeout (in | ||
| 210 | nanoseconds) such that the wakeup source will be automatically | ||
| 211 | deactivated after it has expired. The timeout, if present, is | ||
| 212 | set regardless of the current state of the wakeup source object | ||
| 213 | in question. | ||
| 214 | |||
| 215 | Reads from this file return a string consisting of the names of | ||
| 216 | wakeup sources created with the help of it that are active at | ||
| 217 | the moment, separated with spaces. | ||
| 218 | |||
| 219 | |||
| 220 | What: /sys/power/wake_unlock | ||
| 221 | Date: February 2012 | ||
| 222 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | ||
| 223 | Description: | ||
| 224 | The /sys/power/wake_unlock file allows user space to deactivate | ||
| 225 | wakeup sources created with the help of /sys/power/wake_lock. | ||
| 226 | When a string is written to /sys/power/wake_unlock, it will be | ||
| 227 | assumed to represent the name of a wakeup source to deactivate. | ||
| 228 | If a wakeup source object of that name exists and is active at | ||
| 229 | the moment, it will be deactivated. | ||
| 230 | |||
| 231 | Reads from this file return a string consisting of the names of | ||
| 232 | wakeup sources created with the help of /sys/power/wake_lock | ||
| 233 | that are inactive at the moment, separated with spaces. | ||
| @@ -671,8 +671,9 @@ ones already enabled by DEBUG. · 670 unmodified lines | |||
| 671 | Chapter 14: Allocating memory | 671 | Chapter 14: Allocating memory |
| 672 | 672 | ||
| 673 | The kernel provides the following general purpose memory allocators: | 673 | The kernel provides the following general purpose memory allocators: |
| 674 | kmalloc(), kzalloc(), kcalloc(), vmalloc(), and vzalloc(). Please refer to | 674 | kmalloc(), kzalloc(), kmalloc_array(), kcalloc(), vmalloc(), and |
| 675 | the API documentation for further information about them. | 675 | vzalloc(). Please refer to the API documentation for further information |
| 676 | about them. | ||
| 676 | 677 | ||
| 677 | The preferred form for passing a size of a struct is the following: | 678 | The preferred form for passing a size of a struct is the following: |
| 678 | 679 | ||
| @@ -686,6 +687,17 @@ Casting the return value which is a void pointer is redundant. The conversion · 7 unmodified lines | |||
| 686 | from void pointer to any other pointer type is guaranteed by the C programming | 687 | from void pointer to any other pointer type is guaranteed by the C programming |
| 687 | language. | 688 | language. |
| 688 | 689 | ||
| 690 | The preferred form for allocating an array is the following: | ||
| 691 | |||
| 692 | p = kmalloc_array(n, sizeof(...), ...); | ||
| 693 | |||
| 694 | The preferred form for allocating a zeroed array is the following: | ||
| 695 | |||
| 696 | p = kcalloc(n, sizeof(...), ...); | ||
| 697 | |||
| 698 | Both forms check for overflow on the allocation size n * sizeof(...), | ||
| 699 | and return NULL if that occurred. | ||
| 700 | |||
| 689 | 701 | ||
| 690 | Chapter 15: The inline disease | 702 | Chapter 15: The inline disease |
| 691 | 703 | ||
| @@ -516,7 +516,7 @@ · 515 unmodified lines | |||
| 516 | !Finclude/net/mac80211.h ieee80211_start_tx_ba_cb_irqsafe | 516 | !Finclude/net/mac80211.h ieee80211_start_tx_ba_cb_irqsafe |
| 517 | !Finclude/net/mac80211.h ieee80211_stop_tx_ba_session | 517 | !Finclude/net/mac80211.h ieee80211_stop_tx_ba_session |
| 518 | !Finclude/net/mac80211.h ieee80211_stop_tx_ba_cb_irqsafe | 518 | !Finclude/net/mac80211.h ieee80211_stop_tx_ba_cb_irqsafe |
| 519 | !Finclude/net/mac80211.h rate_control_changed | 519 | !Finclude/net/mac80211.h ieee80211_rate_control_changed |
| 520 | !Finclude/net/mac80211.h ieee80211_tx_rate_control | 520 | !Finclude/net/mac80211.h ieee80211_tx_rate_control |
| 521 | !Finclude/net/mac80211.h rate_control_send_low | 521 | !Finclude/net/mac80211.h rate_control_send_low |
| 522 | </chapter> | 522 | </chapter> |
| @@ -6,7 +6,7 @@ · 5 unmodified lines | |||
| 6 | # To add a new book the only step required is to add the book to the | 6 | # To add a new book the only step required is to add the book to the |
| 7 | # list of DOCBOOKS. | 7 | # list of DOCBOOKS. |
| 8 | 8 | ||
| 9 | DOCBOOKS := z8530book.xml mcabook.xml device-drivers.xml \ | 9 | DOCBOOKS := z8530book.xml device-drivers.xml \ |
| 10 | kernel-hacking.xml kernel-locking.xml deviceiobook.xml \ | 10 | kernel-hacking.xml kernel-locking.xml deviceiobook.xml \ |
| 11 | writing_usb_driver.xml networking.xml \ | 11 | writing_usb_driver.xml networking.xml \ |
| 12 | kernel-api.xml filesystems.xml lsm.xml usb.xml kgdb.xml \ | 12 | kernel-api.xml filesystems.xml lsm.xml usb.xml kgdb.xml \ |
| @@ -212,19 +212,6 @@ X!Edrivers/pci/hotplug.c · 211 unmodified lines | |||
| 212 | <sect1><title>PCI Hotplug Support Library</title> | 212 | <sect1><title>PCI Hotplug Support Library</title> |
| 213 | !Edrivers/pci/hotplug/pci_hotplug_core.c | 213 | !Edrivers/pci/hotplug/pci_hotplug_core.c |
| 214 | </sect1> | 214 | </sect1> |
| 215 | <sect1><title>MCA Architecture</title> | ||
| 216 | <sect2><title>MCA Device Functions</title> | ||
| 217 | <para> | ||
| 218 | Refer to the file arch/x86/kernel/mca_32.c for more information. | ||
| 219 | </para> | ||
| 220 | <!-- FIXME: Removed for now since no structured comments in source | ||
| 221 | X!Earch/x86/kernel/mca_32.c | ||
| 222 | --> | ||
| 223 | </sect2> | ||
| 224 | <sect2><title>MCA Bus DMA</title> | ||
| 225 | !Iarch/x86/include/asm/mca_dma.h | ||
| 226 | </sect2> | ||
| 227 | </sect1> | ||
| 228 | </chapter> | 215 | </chapter> |
| 229 | 216 | ||
| 230 | <chapter id="firmware"> | 217 | <chapter id="firmware"> |
| @@ -1289,7 +1289,7 @@ static struct block_device_operations opt_fops = { · 1288 unmodified lines | |||
| 1289 | * Sparc assembly will do this to ya. | 1289 | * Sparc assembly will do this to ya. |
| 1290 | */ | 1290 | */ |
| 1291 | C_LABEL(cputypvar): | 1291 | C_LABEL(cputypvar): |
| 1292 | .asciz "compatability" | 1292 | .asciz "compatibility" |
| 1293 | 1293 | ||
| 1294 | /* Tested on SS-5, SS-10. Probably someone at Sun applied a spell-checker. */ | 1294 | /* Tested on SS-5, SS-10. Probably someone at Sun applied a spell-checker. */ |
| 1295 | .align 4 | 1295 | .align 4 |
| @@ -918,7 +918,7 @@ and other resources, etc. · 917 unmodified lines | |||
| 918 | <title>HSM violation</title> | 918 | <title>HSM violation</title> |
| 919 | <para> | 919 | <para> |
| 920 | This error is indicated when STATUS value doesn't match HSM | 920 | This error is indicated when STATUS value doesn't match HSM |
| 921 | requirement during issuing or excution any ATA/ATAPI command. | 921 | requirement during issuing or execution any ATA/ATAPI command. |
| 922 | </para> | 922 | </para> |
| 923 | 923 | ||
| 924 | <itemizedlist> | 924 | <itemizedlist> |
| @@ -1,107 +0,0 @@ | |||
| 1 | <?xml version="1.0" encoding="UTF-8"?> | ||
| 2 | <!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN" | ||
| 3 | "http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" []> | ||
| 4 | |||
| 5 | <book id="MCAGuide"> | ||
| 6 | <bookinfo> | ||
| 7 | <title>MCA Driver Programming Interface</title> | ||
| 8 | |||
| 9 | <authorgroup> | ||
| 10 | <author> | ||
| 11 | <firstname>Alan</firstname> | ||
| 12 | <surname>Cox</surname> | ||
| 13 | <affiliation> | ||
| 14 | <address> | ||
| 15 | <email>alan@lxorguk.ukuu.org.uk</email> | ||
| 16 | </address> | ||
| 17 | </affiliation> | ||
| 18 | </author> | ||
| 19 | <author> | ||
| 20 | <firstname>David</firstname> | ||
| 21 | <surname>Weinehall</surname> | ||
| 22 | </author> | ||
| 23 | <author> | ||
| 24 | <firstname>Chris</firstname> | ||
| 25 | <surname>Beauregard</surname> | ||
| 26 | </author> | ||
| 27 | </authorgroup> | ||
| 28 | |||
| 29 | <copyright> | ||
| 30 | <year>2000</year> | ||
| 31 | <holder>Alan Cox</holder> | ||
| 32 | <holder>David Weinehall</holder> | ||
| 33 | <holder>Chris Beauregard</holder> | ||
| 34 | </copyright> | ||
| 35 | |||
| 36 | <legalnotice> | ||
| 37 | <para> | ||
| 38 | This documentation is free software; you can redistribute | ||
| 39 | it and/or modify it under the terms of the GNU General Public | ||
| 40 | License as published by the Free Software Foundation; either | ||
| 41 | version 2 of the License, or (at your option) any later | ||
| 42 | version. | ||
| 43 | </para> | ||
| 44 | |||
| 45 | <para> | ||
| 46 | This program is distributed in the hope that it will be | ||
| 47 | useful, but WITHOUT ANY WARRANTY; without even the implied | ||
| 48 | warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. | ||
| 49 | See the GNU General Public License for more details. | ||
| 50 | </para> | ||
| 51 | |||
| 52 | <para> | ||
| 53 | You should have received a copy of the GNU General Public | ||
| 54 | License along with this program; if not, write to the Free | ||
| 55 | Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, | ||
| 56 | MA 02111-1307 USA | ||
| 57 | </para> | ||
| 58 | |||
| 59 | <para> | ||
| 60 | For more details see the file COPYING in the source | ||
| 61 | distribution of Linux. | ||
| 62 | </para> | ||
| 63 | </legalnotice> | ||
| 64 | </bookinfo> | ||
| 65 | |||
| 66 | <toc></toc> | ||
| 67 | |||
| 68 | <chapter id="intro"> | ||
| 69 | <title>Introduction</title> | ||
| 70 | <para> | ||
| 71 | The MCA bus functions provide a generalised interface to find MCA | ||
| 72 | bus cards, to claim them for a driver, and to read and manipulate POS | ||
| 73 | registers without being aware of the motherboard internals or | ||
| 74 | certain deep magic specific to onboard devices. | ||
| 75 | </para> | ||
| 76 | <para> | ||
| 77 | The basic interface to the MCA bus devices is the slot. Each slot | ||
| 78 | is numbered and virtual slot numbers are assigned to the internal | ||
| 79 | devices. Using a pci_dev as other busses do does not really make | ||
| 80 | sense in the MCA context as the MCA bus resources require card | ||
| 81 | specific interpretation. | ||
| 82 | </para> | ||
| 83 | <para> | ||
| 84 | Finally the MCA bus functions provide a parallel set of DMA | ||
| 85 | functions mimicing the ISA bus DMA functions as closely as possible, | ||
| 86 | although also supporting the additional DMA functionality on the | ||
| 87 | MCA bus controllers. | ||
| 88 | </para> | ||
| 89 | </chapter> | ||
| 90 | <chapter id="bugs"> | ||
| 91 | <title>Known Bugs And Assumptions</title> | ||
| 92 | <para> | ||
| 93 | None. | ||
| 94 | </para> | ||
| 95 | </chapter> | ||
| 96 | |||
| 97 | <chapter id="pubfunctions"> | ||
| 98 | <title>Public Functions Provided</title> | ||
| 99 | !Edrivers/mca/mca-legacy.c | ||
| 100 | </chapter> | ||
| 101 | |||
| 102 | <chapter id="dmafunctions"> | ||
| 103 | <title>DMA Functions Provided</title> | ||
| 104 | !Iarch/x86/include/asm/mca_dma.h | ||
| 105 | </chapter> | ||
| 106 | |||
| 107 | </book> | ||
| @@ -70,6 +70,8 @@ IOCTLS = \ · 69 unmodified lines | |||
| 70 | VIDIOC_SUBDEV_ENUM_MBUS_CODE \ | 70 | VIDIOC_SUBDEV_ENUM_MBUS_CODE \ |
| 71 | VIDIOC_SUBDEV_ENUM_FRAME_SIZE \ | 71 | VIDIOC_SUBDEV_ENUM_FRAME_SIZE \ |
| 72 | VIDIOC_SUBDEV_ENUM_FRAME_INTERVAL \ | 72 | VIDIOC_SUBDEV_ENUM_FRAME_INTERVAL \ |
| 73 | VIDIOC_SUBDEV_G_SELECTION \ | ||
| 74 | VIDIOC_SUBDEV_S_SELECTION \ | ||
| 73 | 75 | ||
| 74 | TYPES = \ | 76 | TYPES = \ |
| 75 | $(shell perl -ne 'print "$$1 " if /^typedef\s+[^\s]+\s+([^\s]+)\;/' $(srctree)/include/linux/videodev2.h) \ | 77 | $(shell perl -ne 'print "$$1 " if /^typedef\s+[^\s]+\s+([^\s]+)\;/' $(srctree)/include/linux/videodev2.h) \ |
| @@ -193,7 +195,7 @@ DVB_DOCUMENTED = \ · 117 unmodified lines | |||
| 193 | # | 195 | # |
| 194 | 196 | ||
| 195 | install_media_images = \ | 197 | install_media_images = \ |
| 196 | $(Q)cp $(OBJIMGFILES) $(MEDIA_OBJ_DIR)/media_api | 198 | $(Q)cp $(OBJIMGFILES) $(MEDIA_SRC_DIR)/v4l/*.svg $(MEDIA_OBJ_DIR)/media_api |
| 197 | 199 | ||
| 198 | $(MEDIA_OBJ_DIR)/%: $(MEDIA_SRC_DIR)/%.b64 | 200 | $(MEDIA_OBJ_DIR)/%: $(MEDIA_SRC_DIR)/%.b64 |
| 199 | $(Q)base64 -d $< >$@ | 201 | $(Q)base64 -d $< >$@ |
| @@ -531,6 +531,139 @@ typedef enum fe_delivery_system { · 530 unmodified lines | |||
| 531 | here are referring to what can be found in the TMCC-structure - | 531 | here are referring to what can be found in the TMCC-structure - |
| 532 | independent of the mode.</para> | 532 | independent of the mode.</para> |
| 533 | </section> | 533 | </section> |
| 534 | <section id="DTV-ATSCMH-FIC-VER"> | ||
| 535 | <title><constant>DTV_ATSCMH_FIC_VER</constant></title> | ||
| 536 | <para>Version number of the FIC (Fast Information Channel) signaling data.</para> | ||
| 537 | <para>FIC is used for relaying information to allow rapid service acquisition by the receiver.</para> | ||
| 538 | <para>Possible values: 0, 1, 2, 3, ..., 30, 31</para> | ||
| 539 | </section> | ||
| 540 | <section id="DTV-ATSCMH-PARADE-ID"> | ||
| 541 | <title><constant>DTV_ATSCMH_PARADE_ID</constant></title> | ||
| 542 | <para>Parade identification number</para> | ||
| 543 | <para>A parade is a collection of up to eight MH groups, conveying one or two ensembles.</para> | ||
| 544 | <para>Possible values: 0, 1, 2, 3, ..., 126, 127</para> | ||
| 545 | </section> | ||
| 546 | <section id="DTV-ATSCMH-NOG"> | ||
| 547 | <title><constant>DTV_ATSCMH_NOG</constant></title> | ||
| 548 | <para>Number of MH groups per MH subframe for a designated parade.</para> | ||
| 549 | <para>Possible values: 1, 2, 3, 4, 5, 6, 7, 8</para> | ||
| 550 | </section> | ||
| 551 | <section id="DTV-ATSCMH-TNOG"> | ||
| 552 | <title><constant>DTV_ATSCMH_TNOG</constant></title> | ||
| 553 | <para>Total number of MH groups including all MH groups belonging to all MH parades in one MH subframe.</para> | ||
| 554 | <para>Possible values: 0, 1, 2, 3, ..., 30, 31</para> | ||
| 555 | </section> | ||
| 556 | <section id="DTV-ATSCMH-SGN"> | ||
| 557 | <title><constant>DTV_ATSCMH_SGN</constant></title> | ||
| 558 | <para>Start group number.</para> | ||
| 559 | <para>Possible values: 0, 1, 2, 3, ..., 14, 15</para> | ||
| 560 | </section> | ||
| 561 | <section id="DTV-ATSCMH-PRC"> | ||
| 562 | <title><constant>DTV_ATSCMH_PRC</constant></title> | ||
| 563 | <para>Parade repetition cycle.</para> | ||
| 564 | <para>Possible values: 1, 2, 3, 4, 5, 6, 7, 8</para> | ||
| 565 | </section> | ||
| 566 | <section id="DTV-ATSCMH-RS-FRAME-MODE"> | ||
| 567 | <title><constant>DTV_ATSCMH_RS_FRAME_MODE</constant></title> | ||
| 568 | <para>RS frame mode.</para> | ||
| 569 | <para>Possible values are:</para> | ||
| 570 | <programlisting> | ||
| 571 | typedef enum atscmh_rs_frame_mode { | ||
| 572 | ATSCMH_RSFRAME_PRI_ONLY = 0, | ||
| 573 | ATSCMH_RSFRAME_PRI_SEC = 1, | ||
| 574 | } atscmh_rs_frame_mode_t; | ||
| 575 | </programlisting> | ||
| 576 | </section> | ||
| 577 | <section id="DTV-ATSCMH-RS-FRAME-ENSEMBLE"> | ||
| 578 | <title><constant>DTV_ATSCMH_RS_FRAME_ENSEMBLE</constant></title> | ||
| 579 | <para>RS frame ensemble.</para> | ||
| 580 | <para>Possible values are:</para> | ||
| 581 | <programlisting> | ||
| 582 | typedef enum atscmh_rs_frame_ensemble { | ||
| 583 | ATSCMH_RSFRAME_ENS_PRI = 0, | ||
| 584 | ATSCMH_RSFRAME_ENS_SEC = 1, | ||
| 585 | } atscmh_rs_frame_ensemble_t; | ||
| 586 | </programlisting> | ||
| 587 | </section> | ||
| 588 | <section id="DTV-ATSCMH-RS-CODE-MODE-PRI"> | ||
| 589 | <title><constant>DTV_ATSCMH_RS_CODE_MODE_PRI</constant></title> | ||
| 590 | <para>RS code mode (primary).</para> | ||
| 591 | <para>Possible values are:</para> | ||
| 592 | <programlisting> | ||
| 593 | typedef enum atscmh_rs_code_mode { | ||
| 594 | ATSCMH_RSCODE_211_187 = 0, | ||
| 595 | ATSCMH_RSCODE_223_187 = 1, | ||
| 596 | ATSCMH_RSCODE_235_187 = 2, | ||
| 597 | } atscmh_rs_code_mode_t; | ||
| 598 | </programlisting> | ||
| 599 | </section> | ||
| 600 | <section id="DTV-ATSCMH-RS-CODE-MODE-SEC"> | ||
| 601 | <title><constant>DTV_ATSCMH_RS_CODE_MODE_SEC</constant></title> | ||
| 602 | <para>RS code mode (secondary).</para> | ||
| 603 | <para>Possible values are:</para> | ||
| 604 | <programlisting> | ||
| 605 | typedef enum atscmh_rs_code_mode { | ||
| 606 | ATSCMH_RSCODE_211_187 = 0, | ||
| 607 | ATSCMH_RSCODE_223_187 = 1, | ||
| 608 | ATSCMH_RSCODE_235_187 = 2, | ||
| 609 | } atscmh_rs_code_mode_t; | ||
| 610 | </programlisting> | ||
| 611 | </section> | ||
| 612 | <section id="DTV-ATSCMH-SCCC-BLOCK-MODE"> | ||
| 613 | <title><constant>DTV_ATSCMH_SCCC_BLOCK_MODE</constant></title> | ||
| 614 | <para>Series Concatenated Convolutional Code Block Mode.</para> | ||
| 615 | <para>Possible values are:</para> | ||
| 616 | <programlisting> | ||
| 617 | typedef enum atscmh_sccc_block_mode { | ||
| 618 | ATSCMH_SCCC_BLK_SEP = 0, | ||
| 619 | ATSCMH_SCCC_BLK_COMB = 1, | ||
| 620 | } atscmh_sccc_block_mode_t; | ||
| 621 | </programlisting> | ||
| 622 | </section> | ||
| 623 | <section id="DTV-ATSCMH-SCCC-CODE-MODE-A"> | ||
| 624 | <title><constant>DTV_ATSCMH_SCCC_CODE_MODE_A</constant></title> | ||
| 625 | <para>Series Concatenated Convolutional Code Rate.</para> | ||
| 626 | <para>Possible values are:</para> | ||
| 627 | <programlisting> | ||
| 628 | typedef enum atscmh_sccc_code_mode { | ||
| 629 | ATSCMH_SCCC_CODE_HLF = 0, | ||
| 630 | ATSCMH_SCCC_CODE_QTR = 1, | ||
| 631 | } atscmh_sccc_code_mode_t; | ||
| 632 | </programlisting> | ||
| 633 | </section> | ||
| 634 | <section id="DTV-ATSCMH-SCCC-CODE-MODE-B"> | ||
| 635 | <title><constant>DTV_ATSCMH_SCCC_CODE_MODE_B</constant></title> | ||
| 636 | <para>Series Concatenated Convolutional Code Rate.</para> | ||
| 637 | <para>Possible values are:</para> | ||
| 638 | <programlisting> | ||
| 639 | typedef enum atscmh_sccc_code_mode { | ||
| 640 | ATSCMH_SCCC_CODE_HLF = 0, | ||
| 641 | ATSCMH_SCCC_CODE_QTR = 1, | ||
| 642 | } atscmh_sccc_code_mode_t; | ||
| 643 | </programlisting> | ||
| 644 | </section> | ||
| 645 | <section id="DTV-ATSCMH-SCCC-CODE-MODE-C"> | ||
| 646 | <title><constant>DTV_ATSCMH_SCCC_CODE_MODE_C</constant></title> | ||
| 647 | <para>Series Concatenated Convolutional Code Rate.</para> | ||
| 648 | <para>Possible values are:</para> | ||
| 649 | <programlisting> | ||
| 650 | typedef enum atscmh_sccc_code_mode { | ||
| 651 | ATSCMH_SCCC_CODE_HLF = 0, | ||
| 652 | ATSCMH_SCCC_CODE_QTR = 1, | ||
| 653 | } atscmh_sccc_code_mode_t; | ||
| 654 | </programlisting> | ||
| 655 | </section> | ||
| 656 | <section id="DTV-ATSCMH-SCCC-CODE-MODE-D"> | ||
| 657 | <title><constant>DTV_ATSCMH_SCCC_CODE_MODE_D</constant></title> | ||
| 658 | <para>Series Concatenated Convolutional Code Rate.</para> | ||
| 659 | <para>Possible values are:</para> | ||
| 660 | <programlisting> | ||
| 661 | typedef enum atscmh_sccc_code_mode { | ||
| 662 | ATSCMH_SCCC_CODE_HLF = 0, | ||
| 663 | ATSCMH_SCCC_CODE_QTR = 1, | ||
| 664 | } atscmh_sccc_code_mode_t; | ||
| 665 | </programlisting> | ||
| 666 | </section> | ||
| 534 | </section> | 667 | </section> |
| 535 | <section id="DTV-API-VERSION"> | 668 | <section id="DTV-API-VERSION"> |
| 536 | <title><constant>DTV_API_VERSION</constant></title> | 669 | <title><constant>DTV_API_VERSION</constant></title> |
| @@ -774,6 +907,33 @@ typedef enum fe_hierarchy { · 237 unmodified lines | |||
| 774 | <listitem><para><link linkend="DTV-BANDWIDTH-HZ"><constant>DTV_BANDWIDTH_HZ</constant></link></para></listitem> | 907 | <listitem><para><link linkend="DTV-BANDWIDTH-HZ"><constant>DTV_BANDWIDTH_HZ</constant></link></para></listitem> |
| 775 | </itemizedlist> | 908 | </itemizedlist> |
| 776 | </section> | 909 | </section> |
| 910 | <section id="atscmh-params"> | ||
| 911 | <title>ATSC-MH delivery system</title> | ||
| 912 | <para>The following parameters are valid for ATSC-MH:</para> | ||
| 913 | <itemizedlist mark='opencircle'> | ||
| 914 | <listitem><para><link linkend="DTV-API-VERSION"><constant>DTV_API_VERSION</constant></link></para></listitem> | ||
| 915 | <listitem><para><link linkend="DTV-DELIVERY-SYSTEM"><constant>DTV_DELIVERY_SYSTEM</constant></link></para></listitem> | ||
| 916 | <listitem><para><link linkend="DTV-TUNE"><constant>DTV_TUNE</constant></link></para></listitem> | ||
| 917 | <listitem><para><link linkend="DTV-CLEAR"><constant>DTV_CLEAR</constant></link></para></listitem> | ||
| 918 | <listitem><para><link linkend="DTV-FREQUENCY"><constant>DTV_FREQUENCY</constant></link></para></listitem> | ||
| 919 | <listitem><para><link linkend="DTV-BANDWIDTH-HZ"><constant>DTV_BANDWIDTH_HZ</constant></link></para></listitem> | ||
| 920 | <listitem><para><link linkend="DTV-ATSCMH-FIC-VER"><constant>DTV_ATSCMH_FIC_VER</constant></link></para></listitem> | ||
| 921 | <listitem><para><link linkend="DTV-ATSCMH-PARADE-ID"><constant>DTV_ATSCMH_PARADE_ID</constant></link></para></listitem> | ||
| 922 | <listitem><para><link linkend="DTV-ATSCMH-NOG"><constant>DTV_ATSCMH_NOG</constant></link></para></listitem> | ||
| 923 | <listitem><para><link linkend="DTV-ATSCMH-TNOG"><constant>DTV_ATSCMH_TNOG</constant></link></para></listitem> | ||
| 924 | <listitem><para><link linkend="DTV-ATSCMH-SGN"><constant>DTV_ATSCMH_SGN</constant></link></para></listitem> | ||
| 925 | <listitem><para><link linkend="DTV-ATSCMH-PRC"><constant>DTV_ATSCMH_PRC</constant></link></para></listitem> | ||
| 926 | <listitem><para><link linkend="DTV-ATSCMH-RS-FRAME-MODE"><constant>DTV_ATSCMH_RS_FRAME_MODE</constant></link></para></listitem> | ||
| 927 | <listitem><para><link linkend="DTV-ATSCMH-RS-FRAME-ENSEMBLE"><constant>DTV_ATSCMH_RS_FRAME_ENSEMBLE</constant></link></para></listitem> | ||
| 928 | <listitem><para><link linkend="DTV-ATSCMH-CODE-MODE-PRI"><constant>DTV_ATSCMH_CODE_MODE_PRI</constant></link></para></listitem> | ||
| 929 | <listitem><para><link linkend="DTV-ATSCMH-CODE-MODE-SEC"><constant>DTV_ATSCMH_CODE_MODE_SEC</constant></link></para></listitem> | ||
| 930 | <listitem><para><link linkend="DTV-ATSCMH-SCCC-BLOCK-MODE"><constant>DTV_ATSCMH_SCCC_BLOCK_MODE</constant></link></para></listitem> | ||
| 931 | <listitem><para><link linkend="DTV-ATSCMH-SCCC-CODE_MODE-A"><constant>DTV_ATSCMH_SCCC_CODE_MODE_A</constant></link></para></listitem> | ||
| 932 | <listitem><para><link linkend="DTV-ATSCMH-SCCC-CODE_MODE-B"><constant>DTV_ATSCMH_SCCC_CODE_MODE_B</constant></link></para></listitem> | ||
| 933 | <listitem><para><link linkend="DTV-ATSCMH-SCCC-CODE_MODE-C"><constant>DTV_ATSCMH_SCCC_CODE_MODE_C</constant></link></para></listitem> | ||
| 934 | <listitem><para><link linkend="DTV-ATSCMH-SCCC-CODE_MODE-D"><constant>DTV_ATSCMH_SCCC_CODE_MODE_D</constant></link></para></listitem> | ||
| 935 | </itemizedlist> | ||
| 936 | </section> | ||
| 777 | </section> | 937 | </section> |
| 778 | <section id="frontend-property-cable-systems"> | 938 | <section id="frontend-property-cable-systems"> |
| 779 | <title>Properties used on cable delivery systems</title> | 939 | <title>Properties used on cable delivery systems</title> |
| @@ -197,4 +197,33 @@ in the frequency range from 87,5 to 108,0 MHz</title> · 196 unmodified lines | |||
| 197 | <title>NTSC-4: United States RBDS Standard</title> | 197 | <title>NTSC-4: United States RBDS Standard</title> |
| 198 | </biblioentry> | 198 | </biblioentry> |
| 199 | 199 | ||
| 200 | <biblioentry id="iso12232"> | ||
| 201 | <abbrev>ISO 12232:2006</abbrev> | ||
| 202 | <authorgroup> | ||
| 203 | <corpauthor>International Organization for Standardization | ||
| 204 | (<ulink url="http://www.iso.org">http://www.iso.org</ulink>)</corpauthor> | ||
| 205 | </authorgroup> | ||
| 206 | <title>Photography — Digital still cameras — Determination | ||
| 207 | of exposure index, ISO speed ratings, standard output sensitivity, and | ||
| 208 | recommended exposure index</title> | ||
| 209 | </biblioentry> | ||
| 210 | |||
| 211 | <biblioentry id="cea861"> | ||
| 212 | <abbrev>CEA-861-E</abbrev> | ||
| 213 | <authorgroup> | ||
| 214 | <corpauthor>Consumer Electronics Association | ||
| 215 | (<ulink url="http://www.ce.org">http://www.ce.org</ulink>)</corpauthor> | ||
| 216 | </authorgroup> | ||
| 217 | <title>A DTV Profile for Uncompressed High Speed Digital Interfaces</title> | ||
| 218 | </biblioentry> | ||
| 219 | |||
| 220 | <biblioentry id="vesadmt"> | ||
| 221 | <abbrev>VESA DMT</abbrev> | ||
| 222 | <authorgroup> | ||
| 223 | <corpauthor>Video Electronics Standards Association | ||
| 224 | (<ulink url="http://www.vesa.org">http://www.vesa.org</ulink>)</corpauthor> | ||
| 225 | </authorgroup> | ||
| 226 | <title>VESA and Industry Standards and Guidelines for Computer Display Monitor Timing (DMT)</title> | ||
| 227 | </biblioentry> | ||
| 228 | |||
| 200 | </bibliography> | 229 | </bibliography> |
| @@ -724,41 +724,49 @@ if (-1 == ioctl (fd, &VIDIOC-S-STD;, &std_id)) { · 723 unmodified lines | |||
| 724 | } | 724 | } |
| 725 | </programlisting> | 725 | </programlisting> |
| 726 | </example> | 726 | </example> |
| 727 | </section> | ||
| 727 | <section id="dv-timings"> | 728 | <section id="dv-timings"> |
| 728 | <title>Digital Video (DV) Timings</title> | 729 | <title>Digital Video (DV) Timings</title> |
| 729 | <para> | 730 | <para> |
| 730 | The video standards discussed so far has been dealing with Analog TV and the | 731 | The video standards discussed so far have been dealing with Analog TV and the |
| 731 | corresponding video timings. Today there are many more different hardware interfaces | 732 | corresponding video timings. Today there are many more different hardware interfaces |
| 732 | such as High Definition TV interfaces (HDMI), VGA, DVI connectors etc., that carry | 733 | such as High Definition TV interfaces (HDMI), VGA, DVI connectors etc., that carry |
| 733 | video signals and there is a need to extend the API to select the video timings | 734 | video signals and there is a need to extend the API to select the video timings |
| 734 | for these interfaces. Since it is not possible to extend the &v4l2-std-id; due to | 735 | for these interfaces. Since it is not possible to extend the &v4l2-std-id; due to |
| 735 | the limited bits available, a new set of IOCTLs is added to set/get video timings at | 736 | the limited bits available, a new set of IOCTLs was added to set/get video timings at |
| 736 | the input and output: </para><itemizedlist> | 737 | the input and output: </para><itemizedlist> |
| 737 | <listitem> | 738 | <listitem> |
| 738 | <para>DV Presets: Digital Video (DV) presets. These are IDs representing a | 739 | <para>DV Timings: This will allow applications to define detailed |
| 740 | video timings for the interface. This includes parameters such as width, height, | ||
| 741 | polarities, frontporch, backporch etc. The <filename>linux/v4l2-dv-timings.h</filename> | ||
| 742 | header can be used to get the timings of the formats in the <xref linkend="cea861" /> and | ||
| 743 | <xref linkend="vesadmt" /> standards. | ||
| 744 | </para> | ||
| 745 | </listitem> | ||
| 746 | <listitem> | ||
| 747 | <para>DV Presets: Digital Video (DV) presets (<emphasis role="bold">deprecated</emphasis>). | ||
| 748 | These are IDs representing a | ||
| 739 | video timing at the input/output. Presets are pre-defined timings implemented | 749 | video timing at the input/output. Presets are pre-defined timings implemented |
| 740 | by the hardware according to video standards. A __u32 data type is used to represent | 750 | by the hardware according to video standards. A __u32 data type is used to represent |
| 741 | a preset unlike the bit mask that is used in &v4l2-std-id; allowing future extensions | 751 | a preset unlike the bit mask that is used in &v4l2-std-id; allowing future extensions |
| 742 | to support as many different presets as needed.</para> | 752 | to support as many different presets as needed. This API is deprecated in favor of the DV Timings |
| 743 | </listitem> | 753 | API.</para> |
| 744 | <listitem> | ||
| 745 | <para>Custom DV Timings: This will allow applications to define more detailed | ||
| 746 | custom video timings for the interface. This includes parameters such as width, height, | ||
| 747 | polarities, frontporch, backporch etc. | ||
| 748 | </para> | ||
| 749 | </listitem> | 754 | </listitem> |
| 750 | </itemizedlist> | 755 | </itemizedlist> |
| 756 | <para>To enumerate and query the attributes of the DV timings supported by a device, | ||
| 757 | applications use the &VIDIOC-ENUM-DV-TIMINGS; and &VIDIOC-DV-TIMINGS-CAP; ioctls. | ||
| 758 | To set DV timings for the device, applications use the | ||
| 759 | &VIDIOC-S-DV-TIMINGS; ioctl and to get current DV timings they use the | ||
| 760 | &VIDIOC-G-DV-TIMINGS; ioctl. To detect the DV timings as seen by the video receiver applications | ||
| 761 | use the &VIDIOC-QUERY-DV-TIMINGS; ioctl.</para> | ||
| 751 | <para>To enumerate and query the attributes of DV presets supported by a device, | 762 | <para>To enumerate and query the attributes of DV presets supported by a device, |
| 752 | applications use the &VIDIOC-ENUM-DV-PRESETS; ioctl. To get the current DV preset, | 763 | applications use the &VIDIOC-ENUM-DV-PRESETS; ioctl. To get the current DV preset, |
| 753 | applications use the &VIDIOC-G-DV-PRESET; ioctl and to set a preset they use the | 764 | applications use the &VIDIOC-G-DV-PRESET; ioctl and to set a preset they use the |
| 754 | &VIDIOC-S-DV-PRESET; ioctl.</para> | 765 | &VIDIOC-S-DV-PRESET; ioctl. To detect the preset as seen by the video receiver applications |
| 755 | <para>To set custom DV timings for the device, applications use the | 766 | use the &VIDIOC-QUERY-DV-PRESET; ioctl.</para> |
| 756 | &VIDIOC-S-DV-TIMINGS; ioctl and to get current custom DV timings they use the | ||
| 757 | &VIDIOC-G-DV-TIMINGS; ioctl.</para> | ||
| 758 | <para>Applications can make use of the <xref linkend="input-capabilities" /> and | 767 | <para>Applications can make use of the <xref linkend="input-capabilities" /> and |
| 759 | <xref linkend="output-capabilities"/> flags to decide what ioctls are available to set the | 768 | <xref linkend="output-capabilities"/> flags to decide what ioctls are available to set the |
| 760 | video timings for the device.</para> | 769 | video timings for the device.</para> |
| 761 | </section> | ||
| 762 | </section> | 770 | </section> |
| 763 | 771 | ||
| 764 | &sub-controls; | 772 | &sub-controls; |
| @@ -2407,6 +2407,54 @@ details.</para> · 2406 unmodified lines | |||
| 2407 | <para>Added <link linkend="jpeg-controls">JPEG compression control | 2407 | <para>Added <link linkend="jpeg-controls">JPEG compression control |
| 2408 | class</link>.</para> | 2408 | class</link>.</para> |
| 2409 | </listitem> | 2409 | </listitem> |
| 2410 | <listitem> | ||
| 2411 | <para>Extended the DV Timings API: | ||
| 2412 | &VIDIOC-ENUM-DV-TIMINGS;, &VIDIOC-QUERY-DV-TIMINGS; and | ||
| 2413 | &VIDIOC-DV-TIMINGS-CAP;.</para> | ||
| 2414 | </listitem> | ||
| 2415 | </orderedlist> | ||
| 2416 | </section> | ||
| 2417 | |||
| 2418 | <section> | ||
| 2419 | <title>V4L2 in Linux 3.5</title> | ||
| 2420 | <orderedlist> | ||
| 2421 | <listitem> | ||
| 2422 | <para>Added integer menus, the new type will be | ||
| 2423 | V4L2_CTRL_TYPE_INTEGER_MENU.</para> | ||
| 2424 | </listitem> | ||
| 2425 | <listitem> | ||
| 2426 | <para>Added selection API for V4L2 subdev interface: | ||
| 2427 | &VIDIOC-SUBDEV-G-SELECTION; and | ||
| 2428 | &VIDIOC-SUBDEV-S-SELECTION;.</para> | ||
| 2429 | </listitem> | ||
| 2430 | <listitem> | ||
| 2431 | <para> Added <constant>V4L2_COLORFX_ANTIQUE</constant>, | ||
| 2432 | <constant>V4L2_COLORFX_ART_FREEZE</constant>, | ||
| 2433 | <constant>V4L2_COLORFX_AQUA</constant>, | ||
| 2434 | <constant>V4L2_COLORFX_SILHOUETTE</constant>, | ||
| 2435 | <constant>V4L2_COLORFX_SOLARIZATION</constant>, | ||
| 2436 | <constant>V4L2_COLORFX_VIVID</constant> and | ||
| 2437 | <constant>V4L2_COLORFX_ARBITRARY_CBCR</constant> menu items | ||
| 2438 | to the <constant>V4L2_CID_COLORFX</constant> control.</para> | ||
| 2439 | </listitem> | ||
| 2440 | <listitem> | ||
| 2441 | <para> Added <constant>V4L2_CID_COLORFX_CBCR</constant> control.</para> | ||
| 2442 | </listitem> | ||
| 2443 | <listitem> | ||
| 2444 | <para> Added camera controls <constant>V4L2_CID_AUTO_EXPOSURE_BIAS</constant>, | ||
| 2445 | <constant>V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE</constant>, | ||
| 2446 | <constant>V4L2_CID_IMAGE_STABILIZATION</constant>, | ||
| 2447 | <constant>V4L2_CID_ISO_SENSITIVITY</constant>, | ||
| 2448 | <constant>V4L2_CID_ISO_SENSITIVITY_AUTO</constant>, | ||
| 2449 | <constant>V4L2_CID_EXPOSURE_METERING</constant>, | ||
| 2450 | <constant>V4L2_CID_SCENE_MODE</constant>, | ||
| 2451 | <constant>V4L2_CID_3A_LOCK</constant>, | ||
| 2452 | <constant>V4L2_CID_AUTO_FOCUS_START</constant>, | ||
| 2453 | <constant>V4L2_CID_AUTO_FOCUS_STOP</constant>, | ||
| 2454 | <constant>V4L2_CID_AUTO_FOCUS_STATUS</constant> and | ||
| 2455 | <constant>V4L2_CID_AUTO_FOCUS_RANGE</constant>. | ||
| 2456 | </para> | ||
| 2457 | </listitem> | ||
| 2410 | </orderedlist> | 2458 | </orderedlist> |
| 2411 | </section> | 2459 | </section> |
| 2412 | 2460 | ||
| @@ -2505,6 +2553,10 @@ and may change in the future.</para> · 92 unmodified lines | |||
| 2505 | </listitem> | 2553 | </listitem> |
| 2506 | <listitem> | 2554 | <listitem> |
| 2507 | <para>&VIDIOC-ENCODER-CMD; and &VIDIOC-TRY-ENCODER-CMD; | 2555 | <para>&VIDIOC-ENCODER-CMD; and &VIDIOC-TRY-ENCODER-CMD; |
| 2556 | ioctls.</para> | ||
| 2557 | </listitem> | ||
| 2558 | <listitem> | ||
| 2559 | <para>&VIDIOC-DECODER-CMD; and &VIDIOC-TRY-DECODER-CMD; | ||
| 2508 | ioctls.</para> | 2560 | ioctls.</para> |
| 2509 | </listitem> | 2561 | </listitem> |
| 2510 | <listitem> | 2562 | <listitem> |
| @@ -2514,6 +2566,10 @@ ioctls.</para> · 3 unmodified lines | |||
| 2514 | <listitem> | 2566 | <listitem> |
| 2515 | <para>&VIDIOC-DBG-G-CHIP-IDENT; ioctl.</para> | 2567 | <para>&VIDIOC-DBG-G-CHIP-IDENT; ioctl.</para> |
| 2516 | </listitem> | 2568 | </listitem> |
| 2569 | <listitem> | ||
| 2570 | <para>&VIDIOC-ENUM-DV-TIMINGS;, &VIDIOC-QUERY-DV-TIMINGS; and | ||
| 2571 | &VIDIOC-DV-TIMINGS-CAP; ioctls.</para> | ||
| 2572 | </listitem> | ||
| 2517 | <listitem> | 2573 | <listitem> |
| 2518 | <para>Flash API. <xref linkend="flash-controls" /></para> | 2574 | <para>Flash API. <xref linkend="flash-controls" /></para> |
| 2519 | </listitem> | 2575 | </listitem> |
| @@ -2523,6 +2579,14 @@ ioctls.</para> · 3 unmodified lines | |||
| 2523 | <listitem> | 2579 | <listitem> |
| 2524 | <para>Selection API. <xref linkend="selection-api" /></para> | 2580 | <para>Selection API. <xref linkend="selection-api" /></para> |
| 2525 | </listitem> | 2581 | </listitem> |
| 2582 | <listitem> | ||
| 2583 | <para>Sub-device selection API: &VIDIOC-SUBDEV-G-SELECTION; | ||
| 2584 | and &VIDIOC-SUBDEV-S-SELECTION; ioctls.</para> | ||
| 2585 | </listitem> | ||
| 2586 | <listitem> | ||
| 2587 | <para><link linkend="v4l2-auto-focus-area"><constant> | ||
| 2588 | V4L2_CID_AUTO_FOCUS_AREA</constant></link> control.</para> | ||
| 2589 | </listitem> | ||
| 2526 | </itemizedlist> | 2590 | </itemizedlist> |
| 2527 | </section> | 2591 | </section> |
| 2528 | 2592 | ||
| @@ -2538,6 +2602,17 @@ interfaces and should not be implemented in new drivers.</para> · 9 unmodified lines | |||
| 2538 | <constant>VIDIOC_S_MPEGCOMP</constant> ioctls. Use Extended Controls, | 2602 | <constant>VIDIOC_S_MPEGCOMP</constant> ioctls. Use Extended Controls, |
| 2539 | <xref linkend="extended-controls" />.</para> | 2603 | <xref linkend="extended-controls" />.</para> |
| 2540 | </listitem> | 2604 | </listitem> |
| 2605 | <listitem> | ||
| 2606 | <para>&VIDIOC-G-DV-PRESET;, &VIDIOC-S-DV-PRESET;, &VIDIOC-ENUM-DV-PRESETS; and | ||
| 2607 | &VIDIOC-QUERY-DV-PRESET; ioctls. Use the DV Timings API (<xref linkend="dv-timings" />).</para> | ||
| 2608 | </listitem> | ||
| 2609 | <listitem> | ||
| 2610 | <para><constant>VIDIOC_SUBDEV_G_CROP</constant> and | ||
| 2611 | <constant>VIDIOC_SUBDEV_S_CROP</constant> ioctls. Use | ||
| 2612 | <constant>VIDIOC_SUBDEV_G_SELECTION</constant> and | ||
| 2613 | <constant>VIDIOC_SUBDEV_S_SELECTION</constant>, <xref | ||
| 2614 | linkend="vidioc-subdev-g-selection" />.</para> | ||
| 2615 | </listitem> | ||
| 2541 | </itemizedlist> | 2616 | </itemizedlist> |
| 2542 | </section> | 2617 | </section> |
| 2543 | </section> | 2618 | </section> |
| @@ -285,18 +285,92 @@ minimum value disables backlight compensation.</entry> · 284 unmodified lines | |||
| 285 | <row id="v4l2-colorfx"> | 285 | <row id="v4l2-colorfx"> |
| 286 | <entry><constant>V4L2_CID_COLORFX</constant></entry> | 286 | <entry><constant>V4L2_CID_COLORFX</constant></entry> |
| 287 | <entry>enum</entry> | 287 | <entry>enum</entry> |
| 288 | <entry>Selects a color effect. Possible values for | 288 | <entry>Selects a color effect. The following values are defined: |
| 289 | <constant>enum v4l2_colorfx</constant> are: | 289 | </entry> |
| 290 | <constant>V4L2_COLORFX_NONE</constant> (0), | 290 | </row><row> |
| 291 | <constant>V4L2_COLORFX_BW</constant> (1), | 291 | <entry></entry> |
| 292 | <constant>V4L2_COLORFX_SEPIA</constant> (2), | 292 | <entry></entry> |
| 293 | <constant>V4L2_COLORFX_NEGATIVE</constant> (3), | 293 | <entrytbl spanname="descr" cols="2"> |
| 294 | <constant>V4L2_COLORFX_EMBOSS</constant> (4), | 294 | <tbody valign="top"> |
| 295 | <constant>V4L2_COLORFX_SKETCH</constant> (5), | 295 | <row> |
| 296 | <constant>V4L2_COLORFX_SKY_BLUE</constant> (6), | 296 | <entry><constant>V4L2_COLORFX_NONE</constant> </entry> |
| 297 | <constant>V4L2_COLORFX_GRASS_GREEN</constant> (7), | 297 | <entry>Color effect is disabled.</entry> |
| 298 | <constant>V4L2_COLORFX_SKIN_WHITEN</constant> (8) and | 298 | </row> |
| 299 | <constant>V4L2_COLORFX_VIVID</constant> (9).</entry> | 299 | <row> |
| 300 | <entry><constant>V4L2_COLORFX_ANTIQUE</constant> </entry> | ||
| 301 | <entry>An aging (old photo) effect.</entry> | ||
| 302 | </row> | ||
| 303 | <row> | ||
| 304 | <entry><constant>V4L2_COLORFX_ART_FREEZE</constant> </entry> | ||
| 305 | <entry>Frost color effect.</entry> | ||
| 306 | </row> | ||
| 307 | <row> | ||
| 308 | <entry><constant>V4L2_COLORFX_AQUA</constant> </entry> | ||
| 309 | <entry>Water color, cool tone.</entry> | ||
| 310 | </row> | ||
| 311 | <row> | ||
| 312 | <entry><constant>V4L2_COLORFX_BW</constant> </entry> | ||
| 313 | <entry>Black and white.</entry> | ||
| 314 | </row> | ||
| 315 | <row> | ||
| 316 | <entry><constant>V4L2_COLORFX_EMBOSS</constant> </entry> | ||
| 317 | <entry>Emboss, the highlights and shadows replace light/dark boundaries | ||
| 318 | and low contrast areas are set to a gray background.</entry> | ||
| 319 | </row> | ||
| 320 | <row> | ||
| 321 | <entry><constant>V4L2_COLORFX_GRASS_GREEN</constant> </entry> | ||
| 322 | <entry>Grass green.</entry> | ||
| 323 | </row> | ||
| 324 | <row> | ||
| 325 | <entry><constant>V4L2_COLORFX_NEGATIVE</constant> </entry> | ||
| 326 | <entry>Negative.</entry> | ||
| 327 | </row> | ||
| 328 | <row> | ||
| 329 | <entry><constant>V4L2_COLORFX_SEPIA</constant> </entry> | ||
| 330 | <entry>Sepia tone.</entry> | ||
| 331 | </row> | ||
| 332 | <row> | ||
| 333 | <entry><constant>V4L2_COLORFX_SKETCH</constant> </entry> | ||
| 334 | <entry>Sketch.</entry> | ||
| 335 | </row> | ||
| 336 | <row> | ||
| 337 | <entry><constant>V4L2_COLORFX_SKIN_WHITEN</constant> </entry> | ||
| 338 | <entry>Skin whiten.</entry> | ||
| 339 | </row> | ||
| 340 | <row> | ||
| 341 | <entry><constant>V4L2_COLORFX_SKY_BLUE</constant> </entry> | ||
| 342 | <entry>Sky blue.</entry> | ||
| 343 | </row> | ||
| 344 | <row> | ||
| 345 | <entry><constant>V4L2_COLORFX_SOLARIZATION</constant> </entry> | ||
| 346 | <entry>Solarization, the image is partially reversed in tone, | ||
| 347 | only color values above or below a certain threshold are inverted. | ||
| 348 | </entry> | ||
| 349 | </row> | ||
| 350 | <row> | ||
| 351 | <entry><constant>V4L2_COLORFX_SILHOUETTE</constant> </entry> | ||
| 352 | <entry>Silhouette (outline).</entry> | ||
| 353 | </row> | ||
| 354 | <row> | ||
| 355 | <entry><constant>V4L2_COLORFX_VIVID</constant> </entry> | ||
| 356 | <entry>Vivid colors.</entry> | ||
| 357 | </row> | ||
| 358 | <row> | ||
| 359 | <entry><constant>V4L2_COLORFX_SET_CBCR</constant> </entry> | ||
| 360 | <entry>The Cb and Cr chroma components are replaced by fixed | ||
| 361 | coefficients determined by <constant>V4L2_CID_COLORFX_CBCR</constant> | ||
| 362 | control.</entry> | ||
| 363 | </row> | ||
| 364 | </tbody> | ||
| 365 | </entrytbl> | ||
| 366 | </row> | ||
| 367 | <row> | ||
| 368 | <entry><constant>V4L2_CID_COLORFX_CBCR</constant></entry> | ||
| 369 | <entry>integer</entry> | ||
| 370 | <entry>Determines the Cb and Cr coefficients for <constant>V4L2_COLORFX_SET_CBCR</constant> | ||
| 371 | color effect. Bits [7:0] of the supplied 32 bit value are interpreted as | ||
| 372 | Cr component, bits [15:8] as Cb component and bits [31:16] must be zero. | ||
| 373 | </entry> | ||
| 300 | </row> | 374 | </row> |
| 301 | <row> | 375 | <row> |
| 302 | <entry><constant>V4L2_CID_ROTATE</constant></entry> | 376 | <entry><constant>V4L2_CID_ROTATE</constant></entry> |
| @@ -2023,7 +2097,7 @@ Possible values are:</entry> · 1720 unmodified lines | |||
| 2023 | <entry>integer</entry> | 2097 | <entry>integer</entry> |
| 2024 | </row> | 2098 | </row> |
| 2025 | <row><entry spanname="descr">Cyclic intra macroblock refresh. This is the number of continuous macroblocks | 2099 | <row><entry spanname="descr">Cyclic intra macroblock refresh. This is the number of continuous macroblocks |
| 2026 | refreshed every frame. Each frame a succesive set of macroblocks is refreshed until the cycle completes and starts from the | 2100 | refreshed every frame. Each frame a successive set of macroblocks is refreshed until the cycle completes and starts from the |
| 2027 | top of the frame. Applicable to H264, H263 and MPEG4 encoder.</entry> | 2101 | top of the frame. Applicable to H264, H263 and MPEG4 encoder.</entry> |
| 2028 | </row> | 2102 | </row> |
| 2029 | 2103 | ||
| @@ -2183,7 +2257,7 @@ Applicable to the MPEG4 and H264 encoders.</entry> · 153 unmodified lines | |||
| 2183 | <entry>integer</entry> | 2257 | <entry>integer</entry> |
| 2184 | </row> | 2258 | </row> |
| 2185 | <row><entry spanname="descr">The Video Buffer Verifier size in kilobytes, it is used as a limitation of frame skip. | 2259 | <row><entry spanname="descr">The Video Buffer Verifier size in kilobytes, it is used as a limitation of frame skip. |
| 2186 | The VBV is defined in the standard as a mean to verify that the produced stream will be succesfully decoded. | 2260 | The VBV is defined in the standard as a mean to verify that the produced stream will be successfully decoded. |
| 2187 | The standard describes it as "Part of a hypothetical decoder that is conceptually connected to the | 2261 | The standard describes it as "Part of a hypothetical decoder that is conceptually connected to the |
| 2188 | output of the encoder. Its purpose is to provide a constraint on the variability of the data rate that an | 2262 | output of the encoder. Its purpose is to provide a constraint on the variability of the data rate that an |
| 2189 | encoder or editing process may produce.". | 2263 | encoder or editing process may produce.". |
| @@ -2196,7 +2270,7 @@ Applicable to the MPEG1, MPEG2, MPEG4 encoders.</entry> · 6 unmodified lines | |||
| 2196 | <entry>integer</entry> | 2270 | <entry>integer</entry> |
| 2197 | </row> | 2271 | </row> |
| 2198 | <row><entry spanname="descr">The Coded Picture Buffer size in kilobytes, it is used as a limitation of frame skip. | 2272 | <row><entry spanname="descr">The Coded Picture Buffer size in kilobytes, it is used as a limitation of frame skip. |
| 2199 | The CPB is defined in the H264 standard as a mean to verify that the produced stream will be succesfully decoded. | 2273 | The CPB is defined in the H264 standard as a mean to verify that the produced stream will be successfully decoded. |
| 2200 | Applicable to the H264 encoder.</entry> | 2274 | Applicable to the H264 encoder.</entry> |
| 2201 | </row> | 2275 | </row> |
| 2202 | 2276 | ||
| @@ -2774,6 +2848,51 @@ remain constant.</entry> · 571 unmodified lines | |||
| 2774 | </row> | 2848 | </row> |
| 2775 | <row><entry></entry></row> | 2849 | <row><entry></entry></row> |
| 2776 | 2850 | ||
| 2851 | <row> | ||
| 2852 | <entry spanname="id"><constant>V4L2_CID_EXPOSURE_BIAS</constant> </entry> | ||
| 2853 | <entry>integer menu</entry> | ||
| 2854 | </row><row><entry spanname="descr"> Determines the automatic | ||
| 2855 | exposure compensation, it is effective only when <constant>V4L2_CID_EXPOSURE_AUTO</constant> | ||
| 2856 | control is set to <constant>AUTO</constant>, <constant>SHUTTER_PRIORITY </constant> | ||
| 2857 | or <constant>APERTURE_PRIORITY</constant>. | ||
| 2858 | It is expressed in terms of EV, drivers should interpret the values as 0.001 EV | ||
| 2859 | units, where the value 1000 stands for +1 EV. | ||
| 2860 | <para>Increasing the exposure compensation value is equivalent to decreasing | ||
| 2861 | the exposure value (EV) and will increase the amount of light at the image | ||
| 2862 | sensor. The camera performs the exposure compensation by adjusting absolute | ||
| 2863 | exposure time and/or aperture.</para></entry> | ||
| 2864 | </row> | ||
| 2865 | <row><entry></entry></row> | ||
| 2866 | |||
| 2867 | <row id="v4l2-exposure-metering"> | ||
| 2868 | <entry spanname="id"><constant>V4L2_CID_EXPOSURE_METERING</constant> </entry> | ||
| 2869 | <entry>enum v4l2_exposure_metering</entry> | ||
| 2870 | </row><row><entry spanname="descr">Determines how the camera measures | ||
| 2871 | the amount of light available for the frame exposure. Possible values are:</entry> | ||
| 2872 | </row> | ||
| 2873 | <row> | ||
| 2874 | <entrytbl spanname="descr" cols="2"> | ||
| 2875 | <tbody valign="top"> | ||
| 2876 | <row> | ||
| 2877 | <entry><constant>V4L2_EXPOSURE_METERING_AVERAGE</constant> </entry> | ||
| 2878 | <entry>Use the light information coming from the entire frame | ||
| 2879 | and average giving no weighting to any particular portion of the metered area. | ||
| 2880 | </entry> | ||
| 2881 | </row> | ||
| 2882 | <row> | ||
| 2883 | <entry><constant>V4L2_EXPOSURE_METERING_CENTER_WEIGHTED</constant> </entry> | ||
| 2884 | <entry>Average the light information coming from the entire frame | ||
| 2885 | giving priority to the center of the metered area.</entry> | ||
| 2886 | </row> | ||
| 2887 | <row> | ||
| 2888 | <entry><constant>V4L2_EXPOSURE_METERING_SPOT</constant> </entry> | ||
| 2889 | <entry>Measure only very small area at the center of the frame.</entry> | ||
| 2890 | </row> | ||
| 2891 | </tbody> | ||
| 2892 | </entrytbl> | ||
| 2893 | </row> | ||
| 2894 | <row><entry></entry></row> | ||
| 2895 | |||
| 2777 | <row> | 2896 | <row> |
| 2778 | <entry spanname="id"><constant>V4L2_CID_PAN_RELATIVE</constant> </entry> | 2897 | <entry spanname="id"><constant>V4L2_CID_PAN_RELATIVE</constant> </entry> |
| 2779 | <entry>integer</entry> | 2898 | <entry>integer</entry> |
| @@ -2857,12 +2976,106 @@ negative values towards infinity. This is a write-only control.</entry> · 77 unmodified lines | |||
| 2857 | <row> | 2976 | <row> |
| 2858 | <entry spanname="id"><constant>V4L2_CID_FOCUS_AUTO</constant> </entry> | 2977 | <entry spanname="id"><constant>V4L2_CID_FOCUS_AUTO</constant> </entry> |
| 2859 | <entry>boolean</entry> | 2978 | <entry>boolean</entry> |
| 2860 | </row><row><entry spanname="descr">Enables automatic focus | 2979 | </row><row><entry spanname="descr">Enables continuous automatic |
| 2861 | adjustments. The effect of manual focus adjustments while this feature | 2980 | focus adjustments. The effect of manual focus adjustments while this feature |
| 2862 | is enabled is undefined, drivers should ignore such requests.</entry> | 2981 | is enabled is undefined, drivers should ignore such requests.</entry> |
| 2863 | </row> | 2982 | </row> |
| 2864 | <row><entry></entry></row> | 2983 | <row><entry></entry></row> |
| 2865 | 2984 | ||
| 2985 | <row> | ||
| 2986 | <entry spanname="id"><constant>V4L2_CID_AUTO_FOCUS_START</constant> </entry> | ||
| 2987 | <entry>button</entry> | ||
| 2988 | </row><row><entry spanname="descr">Starts single auto focus process. | ||
| 2989 | The effect of setting this control when <constant>V4L2_CID_FOCUS_AUTO</constant> | ||
| 2990 | is set to <constant>TRUE</constant> (1) is undefined, drivers should ignore | ||
| 2991 | such requests.</entry> | ||
| 2992 | </row> | ||
| 2993 | <row><entry></entry></row> | ||
| 2994 | |||
| 2995 | <row> | ||
| 2996 | <entry spanname="id"><constant>V4L2_CID_AUTO_FOCUS_STOP</constant> </entry> | ||
| 2997 | <entry>button</entry> | ||
| 2998 | </row><row><entry spanname="descr">Aborts automatic focusing | ||
| 2999 | started with <constant>V4L2_CID_AUTO_FOCUS_START</constant> control. It is | ||
| 3000 | effective only when the continuous autofocus is disabled, that is when | ||
| 3001 | <constant>V4L2_CID_FOCUS_AUTO</constant> control is set to <constant>FALSE | ||
| 3002 | </constant> (0).</entry> | ||
| 3003 | </row> | ||
| 3004 | <row><entry></entry></row> | ||
| 3005 | |||
| 3006 | <row id="v4l2-auto-focus-status"> | ||
| 3007 | <entry spanname="id"> | ||
| 3008 | <constant>V4L2_CID_AUTO_FOCUS_STATUS</constant> </entry> | ||
| 3009 | <entry>bitmask</entry> | ||
| 3010 | </row> | ||
| 3011 | <row><entry spanname="descr">The automatic focus status. This is a read-only | ||
| 3012 | control.</entry> | ||
| 3013 | </row> | ||
| 3014 | <row> | ||
| 3015 | <entrytbl spanname="descr" cols="2"> | ||
| 3016 | <tbody valign="top"> | ||
| 3017 | <row> | ||
| 3018 | <entry><constant>V4L2_AUTO_FOCUS_STATUS_IDLE</constant> </entry> | ||
| 3019 | <entry>Automatic focus is not active.</entry> | ||
| 3020 | </row> | ||
| 3021 | <row> | ||
| 3022 | <entry><constant>V4L2_AUTO_FOCUS_STATUS_BUSY</constant> </entry> | ||
| 3023 | <entry>Automatic focusing is in progress.</entry> | ||
| 3024 | </row> | ||
| 3025 | <row> | ||
| 3026 | <entry><constant>V4L2_AUTO_FOCUS_STATUS_REACHED</constant> </entry> | ||
| 3027 | <entry>Focus has been reached.</entry> | ||
| 3028 | </row> | ||
| 3029 | <row> | ||
| 3030 | <entry><constant>V4L2_AUTO_FOCUS_STATUS_FAILED</constant> </entry> | ||
| 3031 | <entry>Automatic focus has failed, the driver will not | ||
| 3032 | transition from this state until another action is | ||
| 3033 | performed by an application.</entry> | ||
| 3034 | </row> | ||
| 3035 | </tbody> | ||
| 3036 | </entrytbl> | ||
| 3037 | </row> | ||
| 3038 | <row><entry spanname="descr"> | ||
| 3039 | Setting <constant>V4L2_LOCK_FOCUS</constant> lock bit of the <constant>V4L2_CID_3A_LOCK | ||
| 3040 | </constant> control may stop updates of the <constant>V4L2_CID_AUTO_FOCUS_STATUS</constant> | ||
| 3041 | control value.</entry> | ||
| 3042 | </row> | ||
| 3043 | <row><entry></entry></row> | ||
| 3044 | |||
| 3045 | <row id="v4l2-auto-focus-range"> | ||
| 3046 | <entry spanname="id"> | ||
| 3047 | <constant>V4L2_CID_AUTO_FOCUS_RANGE</constant> </entry> | ||
| 3048 | <entry>enum v4l2_auto_focus_range</entry> | ||
| 3049 | </row> | ||
| 3050 | <row><entry spanname="descr">Determines auto focus distance range | ||
| 3051 | for which lens may be adjusted. </entry> | ||
| 3052 | </row> | ||
| 3053 | <row> | ||
| 3054 | <entrytbl spanname="descr" cols="2"> | ||
| 3055 | <tbody valign="top"> | ||
| 3056 | <row> | ||
| 3057 | <entry><constant>V4L2_AUTO_FOCUS_RANGE_AUTO</constant> </entry> | ||
| 3058 | <entry>The camera automatically selects the focus range.</entry> | ||
| 3059 | </row> | ||
| 3060 | <row> | ||
| 3061 | <entry><constant>V4L2_AUTO_FOCUS_RANGE_NORMAL</constant> </entry> | ||
| 3062 | <entry>Normal distance range, limited for best automatic focus | ||
| 3063 | performance.</entry> | ||
| 3064 | </row> | ||
| 3065 | <row> | ||
| 3066 | <entry><constant>V4L2_AUTO_FOCUS_RANGE_MACRO</constant> </entry> | ||
| 3067 | <entry>Macro (close-up) auto focus. The camera will | ||
| 3068 | use its minimum possible distance for auto focus.</entry> | ||
| 3069 | </row> | ||
| 3070 | <row> | ||
| 3071 | <entry><constant>V4L2_AUTO_FOCUS_RANGE_INFINITY</constant> </entry> | ||
| 3072 | <entry>The lens is set to focus on an object at infinite distance.</entry> | ||
| 3073 | </row> | ||
| 3074 | </tbody> | ||
| 3075 | </entrytbl> | ||
| 3076 | </row> | ||
| 3077 | <row><entry></entry></row> | ||
| 3078 | |||
| 2866 | <row> | 3079 | <row> |
| 2867 | <entry spanname="id"><constant>V4L2_CID_ZOOM_ABSOLUTE</constant> </entry> | 3080 | <entry spanname="id"><constant>V4L2_CID_ZOOM_ABSOLUTE</constant> </entry> |
| 2868 | <entry>integer</entry> | 3081 | <entry>integer</entry> |
| @@ -2932,6 +3145,295 @@ camera sensor on or off, or specify its strength. Such band-stop filters can · 63 unmodified lines | |||
| 2932 | be used, for example, to filter out the fluorescent light component.</entry> | 3145 | be used, for example, to filter out the fluorescent light component.</entry> |
| 2933 | </row> | 3146 | </row> |
| 2934 | <row><entry></entry></row> | 3147 | <row><entry></entry></row> |
| 3148 | |||
| 3149 | <row id="v4l2-auto-n-preset-white-balance"> | ||
| 3150 | <entry spanname="id"><constant>V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE</constant> </entry> | ||
| 3151 | <entry>enum v4l2_auto_n_preset_white_balance</entry> | ||
| 3152 | </row><row><entry spanname="descr">Sets white balance to automatic, | ||
| 3153 | manual or a preset. The presets determine color temperature of the light as | ||
| 3154 | a hint to the camera for white balance adjustments resulting in most accurate | ||
| 3155 | color representation. The following white balance presets are listed in order | ||
| 3156 | of increasing color temperature.</entry> | ||
| 3157 | </row> | ||
| 3158 | <row> | ||
| 3159 | <entrytbl spanname="descr" cols="2"> | ||
| 3160 | <tbody valign="top"> | ||
| 3161 | <row> | ||
| 3162 | <entry><constant>V4L2_WHITE_BALANCE_MANUAL</constant> </entry> | ||
| 3163 | <entry>Manual white balance.</entry> | ||
| 3164 | </row> | ||
| 3165 | <row> | ||
| 3166 | <entry><constant>V4L2_WHITE_BALANCE_AUTO</constant> </entry> | ||
| 3167 | <entry>Automatic white balance adjustments.</entry> | ||
| 3168 | </row> | ||
| 3169 | <row> | ||
| 3170 | <entry><constant>V4L2_WHITE_BALANCE_INCANDESCENT</constant> </entry> | ||
| 3171 | <entry>White balance setting for incandescent (tungsten) lighting. | ||
| 3172 | It generally cools down the colors and corresponds approximately to 2500...3500 K | ||
| 3173 | color temperature range.</entry> | ||
| 3174 | </row> | ||
| 3175 | <row> | ||
| 3176 | <entry><constant>V4L2_WHITE_BALANCE_FLUORESCENT</constant> </entry> | ||
| 3177 | <entry>White balance preset for fluorescent lighting. | ||
| 3178 | It corresponds approximately to 4000...5000 K color temperature.</entry> | ||
| 3179 | </row> | ||
| 3180 | <row> | ||
| 3181 | <entry><constant>V4L2_WHITE_BALANCE_FLUORESCENT_H</constant> </entry> | ||
| 3182 | <entry>With this setting the camera will compensate for | ||
| 3183 | fluorescent H lighting.</entry> | ||
| 3184 | </row> | ||
| 3185 | <row> | ||
| 3186 | <entry><constant>V4L2_WHITE_BALANCE_HORIZON</constant> </entry> | ||
| 3187 | <entry>White balance setting for horizon daylight. | ||
| 3188 | It corresponds approximately to 5000 K color temperature.</entry> | ||
| 3189 | </row> | ||
| 3190 | <row> | ||
| 3191 | <entry><constant>V4L2_WHITE_BALANCE_DAYLIGHT</constant> </entry> | ||
| 3192 | <entry>White balance preset for daylight (with clear sky). | ||
| 3193 | It corresponds approximately to 5000...6500 K color temperature.</entry> | ||
| 3194 | </row> | ||
| 3195 | <row> | ||
| 3196 | <entry><constant>V4L2_WHITE_BALANCE_FLASH</constant> </entry> | ||
| 3197 | <entry>With this setting the camera will compensate for the flash | ||
| 3198 | light. It slightly warms up the colors and corresponds roughly to 5000...5500 K | ||
| 3199 | color temperature.</entry> | ||
| 3200 | </row> | ||
| 3201 | <row> | ||
| 3202 | <entry><constant>V4L2_WHITE_BALANCE_CLOUDY</constant> </entry> | ||
| 3203 | <entry>White balance preset for moderately overcast sky. | ||
| 3204 | This option corresponds approximately to 6500...8000 K color temperature | ||
| 3205 | range.</entry> | ||
| 3206 | </row> | ||
| 3207 | <row> | ||
| 3208 | <entry><constant>V4L2_WHITE_BALANCE_SHADE</constant> </entry> | ||
| 3209 | <entry>White balance preset for shade or heavily overcast | ||
| 3210 | sky. It corresponds approximately to 9000...10000 K color temperature. | ||
| 3211 | </entry> | ||
| 3212 | </row> | ||
| 3213 | </tbody> | ||
| 3214 | </entrytbl> | ||
| 3215 | </row> | ||
| 3216 | <row><entry></entry></row> | ||
| 3217 | |||
| 3218 | <row id="v4l2-wide-dynamic-range"> | ||
| 3219 | <entry spanname="id"><constant>V4L2_CID_WIDE_DYNAMIC_RANGE</constant></entry> | ||
| 3220 | <entry>boolean</entry> | ||
| 3221 | </row> | ||
| 3222 | <row> | ||
| 3223 | <entry spanname="descr">Enables or disables the camera's wide dynamic | ||
| 3224 | range feature. This feature allows to obtain clear images in situations where | ||
| 3225 | intensity of the illumination varies significantly throughout the scene, i.e. | ||
| 3226 | there are simultaneously very dark and very bright areas. It is most commonly | ||
| 3227 | realized in cameras by combining two subsequent frames with different exposure | ||
| 3228 | times. <footnote id="ctypeconv"><para> This control may be changed to a menu | ||
| 3229 | control in the future, if more options are required.</para></footnote></entry> | ||
| 3230 | </row> | ||
| 3231 | <row><entry></entry></row> | ||
| 3232 | |||
| 3233 | <row id="v4l2-image-stabilization"> | ||
| 3234 | <entry spanname="id"><constant>V4L2_CID_IMAGE_STABILIZATION</constant></entry> | ||
| 3235 | <entry>boolean</entry> | ||
| 3236 | </row> | ||
| 3237 | <row> | ||
| 3238 | <entry spanname="descr">Enables or disables image stabilization. | ||
| 3239 | <footnoteref linkend="ctypeconv"/></entry> | ||
| 3240 | </row> | ||
| 3241 | <row><entry></entry></row> | ||
| 3242 | |||
| 3243 | <row> | ||
| 3244 | <entry spanname="id"><constant>V4L2_CID_ISO_SENSITIVITY</constant> </entry> | ||
| 3245 | <entry>integer menu</entry> | ||
| 3246 | </row><row><entry spanname="descr">Determines ISO equivalent of an | ||
| 3247 | image sensor indicating the sensor's sensitivity to light. The numbers are | ||
| 3248 | expressed in arithmetic scale, as per <xref linkend="iso12232" /> standard, | ||
| 3249 | where doubling the sensor sensitivity is represented by doubling the numerical | ||
| 3250 | ISO value. Applications should interpret the values as standard ISO values | ||
| 3251 | multiplied by 1000, e.g. control value 800 stands for ISO 0.8. Drivers will | ||
| 3252 | usually support only a subset of standard ISO values. The effect of setting | ||
| 3253 | this control while the <constant>V4L2_CID_ISO_SENSITIVITY_AUTO</constant> | ||
| 3254 | control is set to a value other than <constant>V4L2_CID_ISO_SENSITIVITY_MANUAL | ||
| 3255 | </constant> is undefined, drivers should ignore such requests.</entry> | ||
| 3256 | </row> | ||
| 3257 | <row><entry></entry></row> | ||
| 3258 | |||
| 3259 | <row id="v4l2-iso-sensitivity-auto-type"> | ||
| 3260 | <entry spanname="id"><constant>V4L2_CID_ISO_SENSITIVITY_AUTO</constant> </entry> | ||
| 3261 | <entry>enum v4l2_iso_sensitivity_type</entry> | ||
| 3262 | </row><row><entry spanname="descr">Enables or disables automatic ISO | ||
| 3263 | sensitivity adjustments.</entry> | ||
| 3264 | </row> | ||
| 3265 | <row> | ||
| 3266 | <entrytbl spanname="descr" cols="2"> | ||
| 3267 | <tbody valign="top"> | ||
| 3268 | <row> | ||
| 3269 | <entry><constant>V4L2_CID_ISO_SENSITIVITY_MANUAL</constant> </entry> | ||
| 3270 | <entry>Manual ISO sensitivity.</entry> | ||
| 3271 | </row> | ||
| 3272 | <row> | ||
| 3273 | <entry><constant>V4L2_CID_ISO_SENSITIVITY_AUTO</constant> </entry> | ||
| 3274 | <entry>Automatic ISO sensitivity adjustments.</entry> | ||
| 3275 | </row> | ||
| 3276 | </tbody> | ||
| 3277 | </entrytbl> | ||
| 3278 | </row> | ||
| 3279 | <row><entry></entry></row> | ||
| 3280 | |||
| 3281 | <row id="v4l2-scene-mode"> | ||
| 3282 | <entry spanname="id"><constant>V4L2_CID_SCENE_MODE</constant> </entry> | ||
| 3283 | <entry>enum v4l2_scene_mode</entry> | ||
| 3284 | </row><row><entry spanname="descr">This control allows to select | ||
| 3285 | scene programs as the camera automatic modes optimized for common shooting | ||
| 3286 | scenes. Within these modes the camera determines best exposure, aperture, | ||
| 3287 | focusing, light metering, white balance and equivalent sensitivity. The | ||
| 3288 | controls of those parameters are influenced by the scene mode control. | ||
| 3289 | An exact behavior in each mode is subject to the camera specification. | ||
| 3290 | |||
| 3291 | <para>When the scene mode feature is not used, this control should be set to | ||
| 3292 | <constant>V4L2_SCENE_MODE_NONE</constant> to make sure the other possibly | ||
| 3293 | related controls are accessible. The following scene programs are defined: | ||
| 3294 | </para> | ||
| 3295 | </entry> | ||
| 3296 | </row> | ||
| 3297 | <row> | ||
| 3298 | <entrytbl spanname="descr" cols="2"> | ||
| 3299 | <tbody valign="top"> | ||
| 3300 | <row> | ||
| 3301 | <entry><constant>V4L2_SCENE_MODE_NONE</constant> </entry> | ||
| 3302 | <entry>The scene mode feature is disabled.</entry> | ||
| 3303 | </row> | ||
| 3304 | <row> | ||
| 3305 | <entry><constant>V4L2_SCENE_MODE_BACKLIGHT</constant> </entry> | ||
| 3306 | <entry>Backlight. Compensates for dark shadows when light is | ||
| 3307 | coming from behind a subject, also by automatically turning | ||
| 3308 | on the flash.</entry> | ||
| 3309 | </row> | ||
| 3310 | <row> | ||
| 3311 | <entry><constant>V4L2_SCENE_MODE_BEACH_SNOW</constant> </entry> | ||
| 3312 | <entry>Beach and snow. This mode compensates for all-white or | ||
| 3313 | bright scenes, which tend to look gray and low contrast, when camera's automatic | ||
| 3314 | exposure is based on an average scene brightness. To compensate, this mode | ||
| 3315 | automatically slightly overexposes the frames. The white balance may also be | ||
| 3316 | adjusted to compensate for the fact that reflected snow looks bluish rather | ||
| 3317 | than white.</entry> | ||
| 3318 | </row> | ||
| 3319 | <row> | ||
| 3320 | <entry><constant>V4L2_SCENE_MODE_CANDLELIGHT</constant> </entry> | ||
| 3321 | <entry>Candle light. The camera generally raises the ISO | ||
| 3322 | sensitivity and lowers the shutter speed. This mode compensates for relatively | ||
| 3323 | close subject in the scene. The flash is disabled in order to preserve the | ||
| 3324 | ambiance of the light.</entry> | ||
| 3325 | </row> | ||
| 3326 | <row> | ||
| 3327 | <entry><constant>V4L2_SCENE_MODE_DAWN_DUSK</constant> </entry> | ||
| 3328 | <entry>Dawn and dusk. Preserves the colors seen in low | ||
| 3329 | natural light before dusk and after down. The camera may turn off the flash, | ||
| 3330 | and automatically focus at infinity. It will usually boost saturation and | ||
| 3331 | lower the shutter speed.</entry> | ||
| 3332 | </row> | ||
| 3333 | <row> | ||
| 3334 | <entry><constant>V4L2_SCENE_MODE_FALL_COLORS</constant> </entry> | ||
| 3335 | <entry>Fall colors. Increases saturation and adjusts white | ||
| 3336 | balance for color enhancement. Pictures of autumn leaves get saturated reds | ||
| 3337 | and yellows.</entry> | ||
| 3338 | </row> | ||
| 3339 | <row> | ||
| 3340 | <entry><constant>V4L2_SCENE_MODE_FIREWORKS</constant> </entry> | ||
| 3341 | <entry>Fireworks. Long exposure times are used to capture | ||
| 3342 | the expanding burst of light from a firework. The camera may invoke image | ||
| 3343 | stabilization.</entry> | ||
| 3344 | </row> | ||
| 3345 | <row> | ||
| 3346 | <entry><constant>V4L2_SCENE_MODE_LANDSCAPE</constant> </entry> | ||
| 3347 | <entry>Landscape. The camera may choose a small aperture to | ||
| 3348 | provide deep depth of field and long exposure duration to help capture detail | ||
| 3349 | in dim light conditions. The focus is fixed at infinity. Suitable for distant | ||
| 3350 | and wide scenery.</entry> | ||
| 3351 | </row> | ||
| 3352 | <row> | ||
| 3353 | <entry><constant>V4L2_SCENE_MODE_NIGHT</constant> </entry> | ||
| 3354 | <entry>Night, also known as Night Landscape. Designed for low | ||
| 3355 | light conditions, it preserves detail in the dark areas without blowing out bright | ||
| 3356 | objects. The camera generally sets itself to a medium-to-high ISO sensitivity, | ||
| 3357 | with a relatively long exposure time, and turns flash off. As such, there will be | ||
| 3358 | increased image noise and the possibility of blurred image.</entry> | ||
| 3359 | </row> | ||
| 3360 | <row> | ||
| 3361 | <entry><constant>V4L2_SCENE_MODE_PARTY_INDOOR</constant> </entry> | ||
| 3362 | <entry>Party and indoor. Designed to capture indoor scenes | ||
| 3363 | that are lit by indoor background lighting as well as the flash. The camera | ||
| 3364 | usually increases ISO sensitivity, and adjusts exposure for the low light | ||
| 3365 | conditions.</entry> | ||
| 3366 | </row> | ||
| 3367 | <row> | ||
| 3368 | <entry><constant>V4L2_SCENE_MODE_PORTRAIT</constant> </entry> | ||
| 3369 | <entry>Portrait. The camera adjusts the aperture so that the | ||
| 3370 | depth of field is reduced, which helps to isolate the subject against a smooth | ||
| 3371 | background. Most cameras recognize the presence of faces in the scene and focus | ||
| 3372 | on them. The color hue is adjusted to enhance skin tones. The intensity of the | ||
| 3373 | flash is often reduced.</entry> | ||
| 3374 | </row> | ||
| 3375 | <row> | ||
| 3376 | <entry><constant>V4L2_SCENE_MODE_SPORTS</constant> </entry> | ||
| 3377 | <entry>Sports. Significantly increases ISO and uses a fast | ||
| 3378 | shutter speed to freeze motion of rapidly-moving subjects. Increased image | ||
| 3379 | noise may be seen in this mode.</entry> | ||
| 3380 | </row> | ||
| 3381 | <row> | ||
| 3382 | <entry><constant>V4L2_SCENE_MODE_SUNSET</constant> </entry> | ||
| 3383 | <entry>Sunset. Preserves deep hues seen in sunsets and | ||
| 3384 | sunrises. It bumps up the saturation.</entry> | ||
| 3385 | </row> | ||
| 3386 | <row> | ||
| 3387 | <entry><constant>V4L2_SCENE_MODE_TEXT</constant> </entry> | ||
| 3388 | <entry>Text. It applies extra contrast and sharpness, it is | ||
| 3389 | typically a black-and-white mode optimized for readability. Automatic focus | ||
| 3390 | may be switched to close-up mode and this setting may also involve some | ||
| 3391 | lens-distortion correction.</entry> | ||
| 3392 | </row> | ||
| 3393 | </tbody> | ||
| 3394 | </entrytbl> | ||
| 3395 | </row> | ||
| 3396 | <row><entry></entry></row> | ||
| 3397 | |||
| 3398 | <row> | ||
| 3399 | <entry spanname="id"><constant>V4L2_CID_3A_LOCK</constant></entry> | ||
| 3400 | <entry>bitmask</entry> | ||
| 3401 | </row> | ||
| 3402 | <row> | ||
| 3403 | <entry spanname="descr">This control locks or unlocks the automatic | ||
| 3404 | focus, exposure and white balance. The automatic adjustments can be paused | ||
| 3405 | independently by setting the corresponding lock bit to 1. The camera then retains | ||
| 3406 | the settings until the lock bit is cleared. The following lock bits are defined: | ||
| 3407 | </entry> | ||
| 3408 | </row> | ||
| 3409 | <row> | ||
| 3410 | <entrytbl spanname="descr" cols="2"> | ||
| 3411 | <tbody valign="top"> | ||
| 3412 | <row> | ||
| 3413 | <entry><constant>V4L2_LOCK_EXPOSURE</constant></entry> | ||
| 3414 | <entry>Automatic exposure adjustments lock.</entry> | ||
| 3415 | </row> | ||
| 3416 | <row> | ||
| 3417 | <entry><constant>V4L2_LOCK_WHITE_BALANCE</constant></entry> | ||
| 3418 | <entry>Automatic white balance adjustments lock.</entry> | ||
| 3419 | </row> | ||
| 3420 | <row> | ||
| 3421 | <entry><constant>V4L2_LOCK_FOCUS</constant></entry> | ||
| 3422 | <entry>Automatic focus lock.</entry> | ||
| 3423 | </row> | ||
| 3424 | </tbody> | ||
| 3425 | </entrytbl> | ||
| 3426 | </row> | ||
| 3427 | <row><entry spanname="descr"> | ||
| 3428 | When a given algorithm is not enabled, drivers should ignore requests | ||
| 3429 | to lock it and should return no error. An example might be an application | ||
| 3430 | setting bit <constant>V4L2_LOCK_WHITE_BALANCE</constant> when the | ||
| 3431 | <constant>V4L2_CID_AUTO_WHITE_BALANCE</constant> control is set to | ||
| 3432 | <constant>FALSE</constant>. The value of this control may be changed | ||
| 3433 | by exposure, white balance or focus controls.</entry> | ||
| 3434 | </row> | ||
| 3435 | <row><entry></entry></row> | ||
| 3436 | |||
| 2935 | </tbody> | 3437 | </tbody> |
| 2936 | </tgroup> | 3438 | </tgroup> |
| 2937 | </table> | 3439 | </table> |
| @@ -3476,7 +3978,7 @@ interface and may change in the future.</para> · 538 unmodified lines | |||
| 3476 | <entry spanname="id"><constant>V4L2_CID_JPEG_CHROMA_SUBSAMPLING</constant></entry> | 3978 | <entry spanname="id"><constant>V4L2_CID_JPEG_CHROMA_SUBSAMPLING</constant></entry> |
| 3477 | <entry>menu</entry> | 3979 | <entry>menu</entry> |
| 3478 | </row> | 3980 | </row> |
| 3479 | <row id="jpeg-chroma-subsampling-control"> | 3981 | <row id="v4l2-jpeg-chroma-subsampling"> |
| 3480 | <entry spanname="descr">The chroma subsampling factors describe how | 3982 | <entry spanname="descr">The chroma subsampling factors describe how |
| 3481 | each component of an input image is sampled, in respect to maximum | 3983 | each component of an input image is sampled, in respect to maximum |
| 3482 | sample rate in each spatial dimension. See <xref linkend="itu-t81"/>, | 3984 | sample rate in each spatial dimension. See <xref linkend="itu-t81"/>, |
| @@ -3486,7 +3988,7 @@ interface and may change in the future.</para> · 3 unmodified lines | |||
| 3486 | from RGB to Y'CbCr color space. | 3988 | from RGB to Y'CbCr color space. |
| 3487 | </entry> | 3989 | </entry> |
| 3488 | </row> | 3990 | </row> |
| 3489 | <row> | 3991 | <row id = "v4l2-jpeg-chroma-subsampling"> |
| 3490 | <entrytbl spanname="descr" cols="2"> | 3992 | <entrytbl spanname="descr" cols="2"> |
| 3491 | <tbody valign="top"> | 3993 | <tbody valign="top"> |
| 3492 | <row> | 3994 | <row> |
| @@ -3538,12 +4040,12 @@ interface and may change in the future.</para> · 45 unmodified lines | |||
| 3538 | </entry> | 4040 | </entry> |
| 3539 | </row> | 4041 | </row> |
| 3540 | <row id="jpeg-quality-control"> | 4042 | <row id="jpeg-quality-control"> |
| 3541 | <entry spanname="id"><constant>V4L2_CID_JPEG_COMPRESION_QUALITY</constant></entry> | 4043 | <entry spanname="id"><constant>V4L2_CID_JPEG_COMPRESSION_QUALITY</constant></entry> |
| 3542 | <entry>integer</entry> | 4044 | <entry>integer</entry> |
| 3543 | </row> | 4045 | </row> |
| 3544 | <row> | 4046 | <row> |
| 3545 | <entry spanname="descr"> | 4047 | <entry spanname="descr"> |
| 3546 | <constant>V4L2_CID_JPEG_COMPRESION_QUALITY</constant> control | 4048 | <constant>V4L2_CID_JPEG_COMPRESSION_QUALITY</constant> control |
| 3547 | determines trade-off between image quality and size. | 4049 | determines trade-off between image quality and size. |
| 3548 | It provides simpler method for applications to control image quality, | 4050 | It provides simpler method for applications to control image quality, |
| 3549 | without a need for direct reconfiguration of luminance and chrominance | 4051 | without a need for direct reconfiguration of luminance and chrominance |
| @@ -3551,7 +4053,7 @@ interface and may change in the future.</para> · 1 unmodified line | |||
| 3551 | 4053 | ||
| 3552 | In cases where a driver uses quantization tables configured directly | 4054 | In cases where a driver uses quantization tables configured directly |
| 3553 | by an application, using interfaces defined elsewhere, <constant> | 4055 | by an application, using interfaces defined elsewhere, <constant> |
| 3554 | V4L2_CID_JPEG_COMPRESION_QUALITY</constant> control should be set | 4056 | V4L2_CID_JPEG_COMPRESSION_QUALITY</constant> control should be set |
| 3555 | by driver to 0. | 4057 | by driver to 0. |
| 3556 | 4058 | ||
| 3557 | <para>The value range of this control is driver-specific. Only | 4059 | <para>The value range of this control is driver-specific. Only |
| @@ -3599,4 +4101,172 @@ interface and may change in the future.</para> · 41 unmodified lines | |||
| 3599 | to <xref linkend="itu-t81"/>, <xref linkend="jfif"/>, | 4101 | to <xref linkend="itu-t81"/>, <xref linkend="jfif"/>, |
| 3600 | <xref linkend="w3c-jpeg-jfif"/>.</para> | 4102 | <xref linkend="w3c-jpeg-jfif"/>.</para> |
| 3601 | </section> | 4103 | </section> |
| 4104 | |||
| 4105 | <section id="image-source-controls"> | ||
| 4106 | <title>Image Source Control Reference</title> | ||
| 4107 | |||
| 4108 | <note> | ||
| 4109 | <title>Experimental</title> | ||
| 4110 | |||
| 4111 | <para>This is an <link | ||
| 4112 | linkend="experimental">experimental</link> interface and may | ||
| 4113 | change in the future.</para> | ||
| 4114 | </note> | ||
| 4115 | |||
| 4116 | <para> | ||
| 4117 | The Image Source control class is intended for low-level | ||
| 4118 | control of image source devices such as image sensors. The | ||
| 4119 | devices feature an analogue to digital converter and a bus | ||
| 4120 | transmitter to transmit the image data out of the device. | ||
| 4121 | </para> | ||
| 4122 | |||
| 4123 | <table pgwide="1" frame="none" id="image-source-control-id"> | ||
| 4124 | <title>Image Source Control IDs</title> | ||
| 4125 | |||
| 4126 | <tgroup cols="4"> | ||
| 4127 | <colspec colname="c1" colwidth="1*" /> | ||
| 4128 | <colspec colname="c2" colwidth="6*" /> | ||
| 4129 | <colspec colname="c3" colwidth="2*" /> | ||
| 4130 | <colspec colname="c4" colwidth="6*" /> | ||
| 4131 | <spanspec namest="c1" nameend="c2" spanname="id" /> | ||
| 4132 | <spanspec namest="c2" nameend="c4" spanname="descr" /> | ||
| 4133 | <thead> | ||
| 4134 | <row> | ||
| 4135 | <entry spanname="id" align="left">ID</entry> | ||
| 4136 | <entry align="left">Type</entry> | ||
| 4137 | </row><row rowsep="1"><entry spanname="descr" align="left">Description</entry> | ||
| 4138 | </row> | ||
| 4139 | </thead> | ||
| 4140 | <tbody valign="top"> | ||
| 4141 | <row><entry></entry></row> | ||
| 4142 | <row> | ||
| 4143 | <entry spanname="id"><constant>V4L2_CID_IMAGE_SOURCE_CLASS</constant></entry> | ||
| 4144 | <entry>class</entry> | ||
| 4145 | </row> | ||
| 4146 | <row> | ||
| 4147 | <entry spanname="descr">The IMAGE_SOURCE class descriptor.</entry> | ||
| 4148 | </row> | ||
| 4149 | <row> | ||
| 4150 | <entry spanname="id"><constant>V4L2_CID_VBLANK</constant></entry> | ||
| 4151 | <entry>integer</entry> | ||
| 4152 | </row> | ||
| 4153 | <row> | ||
| 4154 | <entry spanname="descr">Vertical blanking. The idle period | ||
| 4155 | after every frame during which no image data is produced. | ||
| 4156 | The unit of vertical blanking is a line. Every line has | ||
| 4157 | length of the image width plus horizontal blanking at the | ||
| 4158 | pixel rate defined by | ||
| 4159 | <constant>V4L2_CID_PIXEL_RATE</constant> control in the | ||
| 4160 | same sub-device.</entry> | ||
| 4161 | </row> | ||
| 4162 | <row> | ||
| 4163 | <entry spanname="id"><constant>V4L2_CID_HBLANK</constant></entry> | ||
| 4164 | <entry>integer</entry> | ||
| 4165 | </row> | ||
| 4166 | <row> | ||
| 4167 | <entry spanname="descr">Horizontal blanking. The idle | ||
| 4168 | period after every line of image data during which no | ||
| 4169 | image data is produced. The unit of horizontal blanking is | ||
| 4170 | pixels.</entry> | ||
| 4171 | </row> | ||
| 4172 | <row> | ||
| 4173 | <entry spanname="id"><constant>V4L2_CID_ANALOGUE_GAIN</constant></entry> | ||
| 4174 | <entry>integer</entry> | ||
| 4175 | </row> | ||
| 4176 | <row> | ||
| 4177 | <entry spanname="descr">Analogue gain is gain affecting | ||
| 4178 | all colour components in the pixel matrix. The gain | ||
| 4179 | operation is performed in the analogue domain before A/D | ||
| 4180 | conversion. | ||
| 4181 | </entry> | ||
| 4182 | </row> | ||
| 4183 | <row><entry></entry></row> | ||
| 4184 | </tbody> | ||
| 4185 | </tgroup> | ||
| 4186 | </table> | ||
| 4187 | |||
| 4188 | </section> | ||
| 4189 | |||
| 4190 | <section id="image-process-controls"> | ||
| 4191 | <title>Image Process Control Reference</title> | ||
| 4192 | |||
| 4193 | <note> | ||
| 4194 | <title>Experimental</title> | ||
| 4195 | |||
| 4196 | <para>This is an <link | ||
| 4197 | linkend="experimental">experimental</link> interface and may | ||
| 4198 | change in the future.</para> | ||
| 4199 | </note> | ||
| 4200 | |||
| 4201 | <para> | ||
| 4202 | The Image Source control class is intended for low-level control of | ||
| 4203 | image processing functions. Unlike | ||
| 4204 | <constant>V4L2_CID_IMAGE_SOURCE_CLASS</constant>, the controls in | ||
| 4205 | this class affect processing the image, and do not control capturing | ||
| 4206 | of it. | ||
| 4207 | </para> | ||
| 4208 | |||
| 4209 | <table pgwide="1" frame="none" id="image-process-control-id"> | ||
| 4210 | <title>Image Source Control IDs</title> | ||
| 4211 | |||
| 4212 | <tgroup cols="4"> | ||
| 4213 | <colspec colname="c1" colwidth="1*" /> | ||
| 4214 | <colspec colname="c2" colwidth="6*" /> | ||
| 4215 | <colspec colname="c3" colwidth="2*" /> | ||
| 4216 | <colspec colname="c4" colwidth="6*" /> | ||
| 4217 | <spanspec namest="c1" nameend="c2" spanname="id" /> | ||
| 4218 | <spanspec namest="c2" nameend="c4" spanname="descr" /> | ||
| 4219 | <thead> | ||
| 4220 | <row> | ||
| 4221 | <entry spanname="id" align="left">ID</entry> | ||
| 4222 | <entry align="left">Type</entry> | ||
| 4223 | </row><row rowsep="1"><entry spanname="descr" align="left">Description</entry> | ||
| 4224 | </row> | ||
| 4225 | </thead> | ||
| 4226 | <tbody valign="top"> | ||
| 4227 | <row><entry></entry></row> | ||
| 4228 | <row> | ||
| 4229 | <entry spanname="id"><constant>V4L2_CID_IMAGE_PROC_CLASS</constant></entry> | ||
| 4230 | <entry>class</entry> | ||
| 4231 | </row> | ||
| 4232 | <row> | ||
| 4233 | <entry spanname="descr">The IMAGE_PROC class descriptor.</entry> | ||
| 4234 | </row> | ||
| 4235 | <row> | ||
| 4236 | <entry spanname="id"><constant>V4L2_CID_LINK_FREQ</constant></entry> | ||
| 4237 | <entry>integer menu</entry> | ||
| 4238 | </row> | ||
| 4239 | <row> | ||
| 4240 | <entry spanname="descr">Data bus frequency. Together with the | ||
| 4241 | media bus pixel code, bus type (clock cycles per sample), the | ||
| 4242 | data bus frequency defines the pixel rate | ||
| 4243 | (<constant>V4L2_CID_PIXEL_RATE</constant>) in the | ||
| 4244 | pixel array (or possibly elsewhere, if the device is not an | ||
| 4245 | image sensor). The frame rate can be calculated from the pixel | ||
| 4246 | clock, image width and height and horizontal and vertical | ||
| 4247 | blanking. While the pixel rate control may be defined elsewhere | ||
| 4248 | than in the subdev containing the pixel array, the frame rate | ||
| 4249 | cannot be obtained from that information. This is because only | ||
| 4250 | on the pixel array it can be assumed that the vertical and | ||
| 4251 | horizontal blanking information is exact: no other blanking is | ||
| 4252 | allowed in the pixel array. The selection of frame rate is | ||
| 4253 | performed by selecting the desired horizontal and vertical | ||
| 4254 | blanking. The unit of this control is Hz. </entry> | ||
| 4255 | </row> | ||
| 4256 | <row> | ||
| 4257 | <entry spanname="id"><constant>V4L2_CID_PIXEL_RATE</constant></entry> | ||
| 4258 | <entry>64-bit integer</entry> | ||
| 4259 | </row> | ||
| 4260 | <row> | ||
| 4261 | <entry spanname="descr">Pixel rate in the source pads of | ||
| 4262 | the subdev. This control is read-only and its unit is | ||
| 4263 | pixels / second. | ||
| 4264 | </entry> | ||
| 4265 | </row> | ||
| 4266 | <row><entry></entry></row> | ||
| 4267 | </tbody> | ||
| 4268 | </tgroup> | ||
| 4269 | </table> | ||
| 4270 | |||
| 4271 | </section> | ||
| 3602 | </section> | 4272 | </section> |
| @@ -76,11 +76,12 @@ · 75 unmodified lines | |||
| 76 | <wordasword>format</wordasword> means the combination of media bus data | 76 | <wordasword>format</wordasword> means the combination of media bus data |
| 77 | format, frame width and frame height.</para></note> | 77 | format, frame width and frame height.</para></note> |
| 78 | 78 | ||
| 79 | <para>Image formats are typically negotiated on video capture and output | 79 | <para>Image formats are typically negotiated on video capture and |
| 80 | devices using the <link linkend="crop">cropping and scaling</link> ioctls. | 80 | output devices using the format and <link |
| 81 | The driver is responsible for configuring every block in the video pipeline | 81 | linkend="vidioc-subdev-g-selection">selection</link> ioctls. The |
| 82 | according to the requested format at the pipeline input and/or | 82 | driver is responsible for configuring every block in the video |
| 83 | output.</para> | 83 | pipeline according to the requested format at the pipeline input |
| 84 | and/or output.</para> | ||
| 84 | 85 | ||
| 85 | <para>For complex devices, such as often found in embedded systems, | 86 | <para>For complex devices, such as often found in embedded systems, |
| 86 | identical image sizes at the output of a pipeline can be achieved using | 87 | identical image sizes at the output of a pipeline can be achieved using |
| @@ -276,11 +277,11 @@ · 189 unmodified lines | |||
| 276 | </section> | 277 | </section> |
| 277 | 278 | ||
| 278 | <section> | 279 | <section> |
| 279 | <title>Cropping and scaling</title> | 280 | <title>Selections: cropping, scaling and composition</title> |
| 280 | 281 | ||
| 281 | <para>Many sub-devices support cropping frames on their input or output | 282 | <para>Many sub-devices support cropping frames on their input or output |
| 282 | pads (or possible even on both). Cropping is used to select the area of | 283 | pads (or possible even on both). Cropping is used to select the area of |
| 283 | interest in an image, typically on a video sensor or video decoder. It can | 284 | interest in an image, typically on an image sensor or a video decoder. It can |
| 284 | also be used as part of digital zoom implementations to select the area of | 285 | also be used as part of digital zoom implementations to select the area of |
| 285 | the image that will be scaled up.</para> | 286 | the image that will be scaled up.</para> |
| 286 | 287 | ||
| @@ -288,26 +289,179 @@ · 1 unmodified line | |||
| 288 | &v4l2-rect; by the coordinates of the top left corner and the rectangle | 289 | &v4l2-rect; by the coordinates of the top left corner and the rectangle |
| 289 | size. Both the coordinates and sizes are expressed in pixels.</para> | 290 | size. Both the coordinates and sizes are expressed in pixels.</para> |
| 290 | 291 | ||
| 291 | <para>The crop rectangle is retrieved and set using the | 292 | <para>As for pad formats, drivers store try and active |
| 292 | &VIDIOC-SUBDEV-G-CROP; and &VIDIOC-SUBDEV-S-CROP; ioctls. Like for pad | 293 | rectangles for the selection targets of ACTUAL type <xref |
| 293 | formats, drivers store try and active crop rectangles. The format | 294 | linkend="v4l2-subdev-selection-targets">.</xref></para> |
| 294 | negotiation mechanism applies to crop settings as well.</para> | 295 | |
| 295 | 296 | <para>On sink pads, cropping is applied relative to the | |
| 296 | <para>On input pads, cropping is applied relatively to the current pad | 297 | current pad format. The pad format represents the image size as |
| 297 | format. The pad format represents the image size as received by the | 298 | received by the sub-device from the previous block in the |
| 298 | sub-device from the previous block in the pipeline, and the crop rectangle | 299 | pipeline, and the crop rectangle represents the sub-image that |
| 299 | represents the sub-image that will be transmitted further inside the | 300 | will be transmitted further inside the sub-device for |
| 300 | sub-device for processing. The crop rectangle be entirely containted | 301 | processing.</para> |
| 301 | inside the input image size.</para> | 302 | |
| 302 | 303 | <para>The scaling operation changes the size of the image by | |
| 303 | <para>Input crop rectangle are reset to their default value when the input | 304 | scaling it to new dimensions. The scaling ratio isn't specified |
| 304 | image format is modified. Drivers should use the input image size as the | 305 | explicitly, but is implied from the original and scaled image |
| 305 | crop rectangle default value, but hardware requirements may prevent this. | 306 | sizes. Both sizes are represented by &v4l2-rect;.</para> |
| 306 | </para> | 307 | |
| 308 | <para>Scaling support is optional. When supported by a subdev, | ||
| 309 | the crop rectangle on the subdev's sink pad is scaled to the | ||
| 310 | size configured using the &VIDIOC-SUBDEV-S-SELECTION; IOCTL | ||
| 311 | using <constant>V4L2_SUBDEV_SEL_COMPOSE_ACTUAL</constant> | ||
| 312 | selection target on the same pad. If the subdev supports scaling | ||
| 313 | but not composing, the top and left values are not used and must | ||
| 314 | always be set to zero.</para> | ||
| 315 | |||
| 316 | <para>On source pads, cropping is similar to sink pads, with the | ||
| 317 | exception that the source size from which the cropping is | ||
| 318 | performed, is the COMPOSE rectangle on the sink pad. In both | ||
| 319 | sink and source pads, the crop rectangle must be entirely | ||
| 320 | contained inside the source image size for the crop | ||
| 321 | operation.</para> | ||
| 322 | |||
| 323 | <para>The drivers should always use the closest possible | ||
| 324 | rectangle the user requests on all selection targets, unless | ||
| 325 | specifically told otherwise. | ||
| 326 | <constant>V4L2_SUBDEV_SEL_FLAG_SIZE_GE</constant> and | ||
| 327 | <constant>V4L2_SUBDEV_SEL_FLAG_SIZE_LE</constant> flags may be | ||
| 328 | used to round the image size either up or down. <xref | ||
| 329 | linkend="v4l2-subdev-selection-flags"></xref></para> | ||
| 330 | </section> | ||
| 331 | |||
| 332 | <section> | ||
| 333 | <title>Types of selection targets</title> | ||
| 334 | |||
| 335 | <section> | ||
| 336 | <title>ACTUAL targets</title> | ||
| 337 | |||
| 338 | <para>ACTUAL targets reflect the actual hardware configuration | ||
| 339 | at any point of time. There is a BOUNDS target | ||
| 340 | corresponding to every ACTUAL.</para> | ||
| 341 | </section> | ||
| 342 | |||
| 343 | <section> | ||
| 344 | <title>BOUNDS targets</title> | ||
| 345 | |||
| 346 | <para>BOUNDS targets is the smallest rectangle that contains | ||
| 347 | all valid ACTUAL rectangles. It may not be possible to set the | ||
| 348 | ACTUAL rectangle as large as the BOUNDS rectangle, however. | ||
| 349 | This may be because e.g. a sensor's pixel array is not | ||
| 350 | rectangular but cross-shaped or round. The maximum size may | ||
| 351 | also be smaller than the BOUNDS rectangle.</para> | ||
| 352 | </section> | ||
| 307 | 353 | ||
| 308 | <para>Cropping behaviour on output pads is not defined.</para> | 354 | </section> |
| 355 | |||
| 356 | <section> | ||
| 357 | <title>Order of configuration and format propagation</title> | ||
| 358 | |||
| 359 | <para>Inside subdevs, the order of image processing steps will | ||
| 360 | always be from the sink pad towards the source pad. This is also | ||
| 361 | reflected in the order in which the configuration must be | ||
| 362 | performed by the user: the changes made will be propagated to | ||
| 363 | any subsequent stages. If this behaviour is not desired, the | ||
| 364 | user must set | ||
| 365 | <constant>V4L2_SUBDEV_SEL_FLAG_KEEP_CONFIG</constant> flag. This | ||
| 366 | flag causes no propagation of the changes are allowed in any | ||
| 367 | circumstances. This may also cause the accessed rectangle to be | ||
| 368 | adjusted by the driver, depending on the properties of the | ||
| 369 | underlying hardware.</para> | ||
| 370 | |||
| 371 | <para>The coordinates to a step always refer to the actual size | ||
| 372 | of the previous step. The exception to this rule is the source | ||
| 373 | compose rectangle, which refers to the sink compose bounds | ||
| 374 | rectangle --- if it is supported by the hardware.</para> | ||
| 375 | |||
| 376 | <orderedlist> | ||
| 377 | <listitem>Sink pad format. The user configures the sink pad | ||
| 378 | format. This format defines the parameters of the image the | ||
| 379 | entity receives through the pad for further processing.</listitem> | ||
| 380 | |||
| 381 | <listitem>Sink pad actual crop selection. The sink pad crop | ||
| 382 | defines the crop performed to the sink pad format.</listitem> | ||
| 383 | |||
| 384 | <listitem>Sink pad actual compose selection. The size of the | ||
| 385 | sink pad compose rectangle defines the scaling ratio compared | ||
| 386 | to the size of the sink pad crop rectangle. The location of | ||
| 387 | the compose rectangle specifies the location of the actual | ||
| 388 | sink compose rectangle in the sink compose bounds | ||
| 389 | rectangle.</listitem> | ||
| 390 | |||
| 391 | <listitem>Source pad actual crop selection. Crop on the source | ||
| 392 | pad defines crop performed to the image in the sink compose | ||
| 393 | bounds rectangle.</listitem> | ||
| 394 | |||
| 395 | <listitem>Source pad format. The source pad format defines the | ||
| 396 | output pixel format of the subdev, as well as the other | ||
| 397 | parameters with the exception of the image width and height. | ||
| 398 | Width and height are defined by the size of the source pad | ||
| 399 | actual crop selection.</listitem> | ||
| 400 | </orderedlist> | ||
| 401 | |||
| 402 | <para>Accessing any of the above rectangles not supported by the | ||
| 403 | subdev will return <constant>EINVAL</constant>. Any rectangle | ||
| 404 | referring to a previous unsupported rectangle coordinates will | ||
| 405 | instead refer to the previous supported rectangle. For example, | ||
| 406 | if sink crop is not supported, the compose selection will refer | ||
| 407 | to the sink pad format dimensions instead.</para> | ||
| 408 | |||
| 409 | <figure id="subdev-image-processing-crop"> | ||
| 410 | <title>Image processing in subdevs: simple crop example</title> | ||
| 411 | <mediaobject> | ||
| 412 | <imageobject> | ||
| 413 | <imagedata fileref="subdev-image-processing-crop.svg" | ||
| 414 | format="SVG" scale="200" /> | ||
| 415 | </imageobject> | ||
| 416 | </mediaobject> | ||
| 417 | </figure> | ||
| 418 | |||
| 419 | <para>In the above example, the subdev supports cropping on its | ||
| 420 | sink pad. To configure it, the user sets the media bus format on | ||
| 421 | the subdev's sink pad. Now the actual crop rectangle can be set | ||
| 422 | on the sink pad --- the location and size of this rectangle | ||
| 423 | reflect the location and size of a rectangle to be cropped from | ||
| 424 | the sink format. The size of the sink crop rectangle will also | ||
| 425 | be the size of the format of the subdev's source pad.</para> | ||
| 426 | |||
| 427 | <figure id="subdev-image-processing-scaling-multi-source"> | ||
| 428 | <title>Image processing in subdevs: scaling with multiple sources</title> | ||
| 429 | <mediaobject> | ||
| 430 | <imageobject> | ||
| 431 | <imagedata fileref="subdev-image-processing-scaling-multi-source.svg" | ||
| 432 | format="SVG" scale="200" /> | ||
| 433 | </imageobject> | ||
| 434 | </mediaobject> | ||
| 435 | </figure> | ||
| 436 | |||
| 437 | <para>In this example, the subdev is capable of first cropping, | ||
| 438 | then scaling and finally cropping for two source pads | ||
| 439 | individually from the resulting scaled image. The location of | ||
| 440 | the scaled image in the cropped image is ignored in sink compose | ||
| 441 | target. Both of the locations of the source crop rectangles | ||
| 442 | refer to the sink scaling rectangle, independently cropping an | ||
| 443 | area at location specified by the source crop rectangle from | ||
| 444 | it.</para> | ||
| 445 | |||
| 446 | <figure id="subdev-image-processing-full"> | ||
| 447 | <title>Image processing in subdevs: scaling and composition | ||
| 448 | with multiple sinks and sources</title> | ||
| 449 | <mediaobject> | ||
| 450 | <imageobject> | ||
| 451 | <imagedata fileref="subdev-image-processing-full.svg" | ||
| 452 | format="SVG" scale="200" /> | ||
| 453 | </imageobject> | ||
| 454 | </mediaobject> | ||
| 455 | </figure> | ||
| 456 | |||
| 457 | <para>The subdev driver supports two sink pads and two source | ||
| 458 | pads. The images from both of the sink pads are individually | ||
| 459 | cropped, then scaled and further composed on the composition | ||
| 460 | bounds rectangle. From that, two independent streams are cropped | ||
| 461 | and sent out of the subdev from the source pads.</para> | ||
| 309 | 462 | ||
| 310 | </section> | 463 | </section> |
| 464 | |||
| 311 | </section> | 465 | </section> |
| 312 | 466 | ||
| 313 | &sub-subdev-formats; | 467 | &sub-subdev-formats; |
| @@ -543,12 +543,13 @@ and can range from zero to the number of buffers allocated · 542 unmodified lines | |||
| 543 | with the &VIDIOC-REQBUFS; ioctl (&v4l2-requestbuffers; <structfield>count</structfield>) minus one.</entry> | 543 | with the &VIDIOC-REQBUFS; ioctl (&v4l2-requestbuffers; <structfield>count</structfield>) minus one.</entry> |
| 544 | </row> | 544 | </row> |
| 545 | <row> | 545 | <row> |
| 546 | <entry>&v4l2-buf-type;</entry> | 546 | <entry>__u32</entry> |
| 547 | <entry><structfield>type</structfield></entry> | 547 | <entry><structfield>type</structfield></entry> |
| 548 | <entry></entry> | 548 | <entry></entry> |
| 549 | <entry>Type of the buffer, same as &v4l2-format; | 549 | <entry>Type of the buffer, same as &v4l2-format; |
| 550 | <structfield>type</structfield> or &v4l2-requestbuffers; | 550 | <structfield>type</structfield> or &v4l2-requestbuffers; |
| 551 | <structfield>type</structfield>, set by the application.</entry> | 551 | <structfield>type</structfield>, set by the application. See <xref |
| 552 | linkend="v4l2-buf-type" /></entry> | ||
| 552 | </row> | 553 | </row> |
| 553 | <row> | 554 | <row> |
| 554 | <entry>__u32</entry> | 555 | <entry>__u32</entry> |
| @@ -568,7 +569,7 @@ refers to an input stream, applications when an output stream.</entry> · 13 unmodified lines | |||
| 568 | linkend="buffer-flags" />.</entry> | 569 | linkend="buffer-flags" />.</entry> |
| 569 | </row> | 570 | </row> |
| 570 | <row> | 571 | <row> |
| 571 | <entry>&v4l2-field;</entry> | 572 | <entry>__u32</entry> |
| 572 | <entry><structfield>field</structfield></entry> | 573 | <entry><structfield>field</structfield></entry> |
| 573 | <entry></entry> | 574 | <entry></entry> |
| 574 | <entry>Indicates the field order of the image in the | 575 | <entry>Indicates the field order of the image in the |
| @@ -630,11 +631,12 @@ bandwidth. These devices identify by not enumerating any video · 55 unmodified lines | |||
| 630 | standards, see <xref linkend="standard" />.</para></entry> | 631 | standards, see <xref linkend="standard" />.</para></entry> |
| 631 | </row> | 632 | </row> |
| 632 | <row> | 633 | <row> |
| 633 | <entry>&v4l2-memory;</entry> | 634 | <entry>__u32</entry> |
| 634 | <entry><structfield>memory</structfield></entry> | 635 | <entry><structfield>memory</structfield></entry> |
| 635 | <entry></entry> | 636 | <entry></entry> |
| 636 | <entry>This field must be set by applications and/or drivers | 637 | <entry>This field must be set by applications and/or drivers |
| 637 | in accordance with the selected I/O method.</entry> | 638 | in accordance with the selected I/O method. See <xref linkend="v4l2-memory" |
| 639 | /></entry> | ||
| 638 | </row> | 640 | </row> |
| 639 | <row> | 641 | <row> |
| 640 | <entry>union</entry> | 642 | <entry>union</entry> |
| @@ -1,4 +1,4 @@ | |||
| 1 | <refentry> | 1 | <refentry id="pixfmt-srggb10"> |
| 2 | <refmeta> | 2 | <refmeta> |
| 3 | <refentrytitle>V4L2_PIX_FMT_SRGGB10 ('RG10'), | 3 | <refentrytitle>V4L2_PIX_FMT_SRGGB10 ('RG10'), |
| 4 | V4L2_PIX_FMT_SGRBG10 ('BA10'), | 4 | V4L2_PIX_FMT_SGRBG10 ('BA10'), |
| @@ -0,0 +1,29 @@ | |||
| 1 | <refentry id="pixfmt-srggb10dpcm8"> | ||
| 2 | <refmeta> | ||
| 3 | <refentrytitle> | ||
| 4 | V4L2_PIX_FMT_SBGGR10DPCM8 ('bBA8'), | ||
| 5 | V4L2_PIX_FMT_SGBRG10DPCM8 ('bGA8'), | ||
| 6 | V4L2_PIX_FMT_SGRBG10DPCM8 ('BD10'), | ||
| 7 | V4L2_PIX_FMT_SRGGB10DPCM8 ('bRA8'), | ||
| 8 | </refentrytitle> | ||
| 9 | &manvol; | ||
| 10 | </refmeta> | ||
| 11 | <refnamediv> | ||
| 12 | <refname id="V4L2-PIX-FMT-SBGGR10DPCM8"><constant>V4L2_PIX_FMT_SBGGR10DPCM8</constant></refname> | ||
| 13 | <refname id="V4L2-PIX-FMT-SGBRG10DPCM8"><constant>V4L2_PIX_FMT_SGBRG10DPCM8</constant></refname> | ||
| 14 | <refname id="V4L2-PIX-FMT-SGRBG10DPCM8"><constant>V4L2_PIX_FMT_SGRBG10DPCM8</constant></refname> | ||
| 15 | <refname id="V4L2-PIX-FMT-SRGGB10DPCM8"><constant>V4L2_PIX_FMT_SRGGB10DPCM8</constant></refname> | ||
| 16 | <refpurpose>10-bit Bayer formats compressed to 8 bits</refpurpose> | ||
| 17 | </refnamediv> | ||
| 18 | <refsect1> | ||
| 19 | <title>Description</title> | ||
| 20 | |||
| 21 | <para>The following four pixel formats are raw sRGB / Bayer formats | ||
| 22 | with 10 bits per colour compressed to 8 bits each, using DPCM | ||
| 23 | compression. DPCM, differential pulse-code modulation, is lossy. | ||
| 24 | Each colour component consumes 8 bits of memory. In other respects | ||
| 25 | this format is similar to <xref | ||
| 26 | linkend="pixfmt-srggb10">.</xref></para> | ||
| 27 | |||
| 28 | </refsect1> | ||
| 29 | </refentry> | ||
| @@ -673,6 +673,7 @@ access the palette, this must be done with ioctls of the Linux framebuffer API.< · 672 unmodified lines | |||
| 673 | &sub-srggb8; | 673 | &sub-srggb8; |
| 674 | &sub-sbggr16; | 674 | &sub-sbggr16; |
| 675 | &sub-srggb10; | 675 | &sub-srggb10; |
| 676 | &sub-srggb10dpcm8; | ||
| 676 | &sub-srggb12; | 677 | &sub-srggb12; |
| 677 | </section> | 678 | </section> |
| 678 | 679 | ||
| @@ -876,11 +877,6 @@ kernel sources in the file <filename>Documentation/video4linux/cx2341x/README.hm · 197 unmodified lines | |||
| 876 | <entry>'S561'</entry> | 877 | <entry>'S561'</entry> |
| 877 | <entry>Compressed GBRG Bayer format used by the gspca driver.</entry> | 878 | <entry>Compressed GBRG Bayer format used by the gspca driver.</entry> |
| 878 | </row> | 879 | </row> |
| 879 | <row id="V4L2-PIX-FMT-SGRBG10DPCM8"> | ||
| 880 | <entry><constant>V4L2_PIX_FMT_SGRBG10DPCM8</constant></entry> | ||
| 881 | <entry>'DB10'</entry> | ||
| 882 | <entry>10 bit raw Bayer DPCM compressed to 8 bits.</entry> | ||
| 883 | </row> | ||
| 884 | <row id="V4L2-PIX-FMT-PAC207"> | 880 | <row id="V4L2-PIX-FMT-PAC207"> |
| 885 | <entry><constant>V4L2_PIX_FMT_PAC207</constant></entry> | 881 | <entry><constant>V4L2_PIX_FMT_PAC207</constant></entry> |
| 886 | <entry>'P207'</entry> | 882 | <entry>'P207'</entry> |
| @@ -0,0 +1,614 @@ | |||
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| 184 | <dia:composite type="text"> | ||
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| 189 | <dia:font family="sans" style="0" name="Helvetica"/> | ||
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| 202 | </dia:attribute> | ||
| 203 | </dia:composite> | ||
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| 216 | <dia:attribute name="text"> | ||
| 217 | <dia:composite type="text"> | ||
| 218 | <dia:attribute name="string"> | ||
| 219 | <dia:string>#sink media | ||
| 220 | bus format#</dia:string> | ||
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| 222 | <dia:attribute name="font"> | ||
| 223 | <dia:font family="sans" style="0" name="Helvetica"/> | ||
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| 225 | <dia:attribute name="height"> | ||
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| 228 | <dia:attribute name="pos"> | ||
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| 231 | <dia:attribute name="color"> | ||
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| 250 | <dia:attribute name="text"> | ||
| 251 | <dia:composite type="text"> | ||
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| 253 | <dia:string>#source media | ||
| 254 | bus format#</dia:string> | ||
| 255 | </dia:attribute> | ||
| 256 | <dia:attribute name="font"> | ||
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| 259 | <dia:attribute name="height"> | ||
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| 271 | </dia:composite> | ||
| 272 | </dia:attribute> | ||
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| 290 | <dia:attribute name="elem_height"> | ||
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| 296 | <dia:attribute name="border_color"> | ||
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| 299 | <dia:attribute name="show_background"> | ||
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| 315 | <dia:int val="1"/> | ||
| 316 | </dia:attribute> | ||
| 317 | <dia:attribute name="line_color"> | ||
| 318 | <dia:color val="#e60505"/> | ||
| 319 | </dia:attribute> | ||
| 320 | <dia:attribute name="line_style"> | ||
| 321 | <dia:enum val="4"/> | ||
| 322 | </dia:attribute> | ||
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| 325 | <dia:connection handle="1" to="O2" connection="5"/> | ||
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| 327 | </dia:object> | ||
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| 330 | <dia:point val="17.5244,9.5417"/> | ||
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| 332 | <dia:attribute name="obj_bb"> | ||
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| 336 | <dia:point val="17.5244,9.5417"/> | ||
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| 339 | <dia:attribute name="numcp"> | ||
| 340 | <dia:int val="1"/> | ||
| 341 | </dia:attribute> | ||
| 342 | <dia:attribute name="line_color"> | ||
| 343 | <dia:color val="#e60505"/> | ||
| 344 | </dia:attribute> | ||
| 345 | <dia:attribute name="line_style"> | ||
| 346 | <dia:enum val="4"/> | ||
| 347 | </dia:attribute> | ||
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| 411 | <dia:composite type="dict"/> | ||
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| 413 | <dia:attribute name="elem_corner"> | ||
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| 425 | <dia:attribute name="line_colour"> | ||
| 426 | <dia:color val="#000000"/> | ||
| 427 | </dia:attribute> | ||
| 428 | <dia:attribute name="fill_colour"> | ||
| 429 | <dia:color val="#ffffff"/> | ||
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| 431 | <dia:attribute name="show_background"> | ||
| 432 | <dia:boolean val="true"/> | ||
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| 439 | <dia:boolean val="false"/> | ||
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| 587 | <dia:attribute name="text"> | ||
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| 590 | <dia:string>#pad 0 (sink)#</dia:string> | ||
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| 612 | </dia:object> | ||
| 613 | </dia:layer> | ||
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| 15 | <tspan x="74.5" y="243.75">crop</tspan> | ||
| 16 | <tspan x="74.5" y="259.75">selection</tspan> | ||
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| 18 | <text style="fill: #000000;text-anchor:start;font-size:12.8;font-family:sanserif;font-style:normal;font-weight:normal" x="29.5" y="158"> | ||
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| 26 | <tspan x="349.774" y="155">source media</tspan> | ||
| 27 | <tspan x="349.774" y="171">bus format</tspan> | ||
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| 48 | <tspan x="506.908" y="209.8">pad 1 (source)</tspan> | ||
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| 61 | <tspan x="-147.858" y="229.8">pad 0 (sink)</tspan> | ||
| 62 | </text> | ||
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| @@ -0,0 +1,1588 @@ | |||
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| 371 | <dia:color val="#0000ff"/> | ||
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| 405 | </dia:attribute> | ||
| 406 | <dia:attribute name="valign"> | ||
| 407 | <dia:enum val="3"/> | ||
| 408 | </dia:attribute> | ||
| 409 | </dia:object> | ||
| 410 | <dia:object type="Standard - Text" version="1" id="O11"> | ||
| 411 | <dia:attribute name="obj_pos"> | ||
| 412 | <dia:point val="0.476918,4.44569"/> | ||
| 413 | </dia:attribute> | ||
| 414 | <dia:attribute name="obj_bb"> | ||
| 415 | <dia:rectangle val="0.476918,3.85069;3.95942,5.39819"/> | ||
| 416 | </dia:attribute> | ||
| 417 | <dia:attribute name="text"> | ||
| 418 | <dia:composite type="text"> | ||
| 419 | <dia:attribute name="string"> | ||
| 420 | <dia:string>#sink media | ||
| 421 | bus format#</dia:string> | ||
| 422 | </dia:attribute> | ||
| 423 | <dia:attribute name="font"> | ||
| 424 | <dia:font family="sans" style="0" name="Helvetica"/> | ||
| 425 | </dia:attribute> | ||
| 426 | <dia:attribute name="height"> | ||
| 427 | <dia:real val="0.80000000000000004"/> | ||
| 428 | </dia:attribute> | ||
| 429 | <dia:attribute name="pos"> | ||
| 430 | <dia:point val="0.476918,4.44569"/> | ||
| 431 | </dia:attribute> | ||
| 432 | <dia:attribute name="color"> | ||
| 433 | <dia:color val="#a52a2a"/> | ||
| 434 | </dia:attribute> | ||
| 435 | <dia:attribute name="alignment"> | ||
| 436 | <dia:enum val="0"/> | ||
| 437 | </dia:attribute> | ||
| 438 | </dia:composite> | ||
| 439 | </dia:attribute> | ||
| 440 | <dia:attribute name="valign"> | ||
| 441 | <dia:enum val="3"/> | ||
| 442 | </dia:attribute> | ||
| 443 | </dia:object> | ||
| 444 | <dia:object type="Standard - Box" version="0" id="O12"> | ||
| 445 | <dia:attribute name="obj_pos"> | ||
| 446 | <dia:point val="16.6822,9.28251"/> | ||
| 447 | </dia:attribute> | ||
| 448 | <dia:attribute name="obj_bb"> | ||
| 449 | <dia:rectangle val="16.6322,9.23251;24.9922,17.9564"/> | ||
| 450 | </dia:attribute> | ||
| 451 | <dia:attribute name="elem_corner"> | ||
| 452 | <dia:point val="16.6822,9.28251"/> | ||
| 453 | </dia:attribute> | ||
| 454 | <dia:attribute name="elem_width"> | ||
| 455 | <dia:real val="8.2600228398861297"/> | ||
| 456 | </dia:attribute> | ||
| 457 | <dia:attribute name="elem_height"> | ||
| 458 | <dia:real val="8.6238900617957164"/> | ||
| 459 | </dia:attribute> | ||
| 460 | <dia:attribute name="border_width"> | ||
| 461 | <dia:real val="0.10000000149011612"/> | ||
| 462 | </dia:attribute> | ||
| 463 | <dia:attribute name="border_color"> | ||
| 464 | <dia:color val="#00ff00"/> | ||
| 465 | </dia:attribute> | ||
| 466 | <dia:attribute name="show_background"> | ||
| 467 | <dia:boolean val="true"/> | ||
| 468 | </dia:attribute> | ||
| 469 | </dia:object> | ||
| 470 | <dia:object type="Standard - Line" version="0" id="O13"> | ||
| 471 | <dia:attribute name="obj_pos"> | ||
| 472 | <dia:point val="16.6822,17.9064"/> | ||
| 473 | </dia:attribute> | ||
| 474 | <dia:attribute name="obj_bb"> | ||
| 475 | <dia:rectangle val="3.05732,10.5823;16.7499,17.9741"/> | ||
| 476 | </dia:attribute> | ||
| 477 | <dia:attribute name="conn_endpoints"> | ||
| 478 | <dia:point val="16.6822,17.9064"/> | ||
| 479 | <dia:point val="3.125,10.65"/> | ||
| 480 | </dia:attribute> | ||
| 481 | <dia:attribute name="numcp"> | ||
| 482 | <dia:int val="1"/> | ||
| 483 | </dia:attribute> | ||
| 484 | <dia:attribute name="line_color"> | ||
| 485 | <dia:color val="#e60505"/> | ||
| 486 | </dia:attribute> | ||
| 487 | <dia:attribute name="line_style"> | ||
| 488 | <dia:enum val="4"/> | ||
| 489 | </dia:attribute> | ||
| 490 | <dia:connections> | ||
| 491 | <dia:connection handle="0" to="O12" connection="5"/> | ||
| 492 | <dia:connection handle="1" to="O9" connection="5"/> | ||
| 493 | </dia:connections> | ||
| 494 | </dia:object> | ||
| 495 | <dia:object type="Standard - Line" version="0" id="O14"> | ||
| 496 | <dia:attribute name="obj_pos"> | ||
| 497 | <dia:point val="16.6822,9.28251"/> | ||
| 498 | </dia:attribute> | ||
| 499 | <dia:attribute name="obj_bb"> | ||
| 500 | <dia:rectangle val="3.06681,6.74181;16.7404,9.3407"/> | ||
| 501 | </dia:attribute> | ||
| 502 | <dia:attribute name="conn_endpoints"> | ||
| 503 | <dia:point val="16.6822,9.28251"/> | ||
| 504 | <dia:point val="3.125,6.8"/> | ||
| 505 | </dia:attribute> | ||
| 506 | <dia:attribute name="numcp"> | ||
| 507 | <dia:int val="1"/> | ||
| 508 | </dia:attribute> | ||
| 509 | <dia:attribute name="line_color"> | ||
| 510 | <dia:color val="#e60505"/> | ||
| 511 | </dia:attribute> | ||
| 512 | <dia:attribute name="line_style"> | ||
| 513 | <dia:enum val="4"/> | ||
| 514 | </dia:attribute> | ||
| 515 | <dia:connections> | ||
| 516 | <dia:connection handle="0" to="O12" connection="0"/> | ||
| 517 | <dia:connection handle="1" to="O9" connection="0"/> | ||
| 518 | </dia:connections> | ||
| 519 | </dia:object> | ||
| 520 | <dia:object type="Standard - Line" version="0" id="O15"> | ||
| 521 | <dia:attribute name="obj_pos"> | ||
| 522 | <dia:point val="24.9422,17.9064"/> | ||
| 523 | </dia:attribute> | ||
| 524 | <dia:attribute name="obj_bb"> | ||
| 525 | <dia:rectangle val="7.75945,10.5845;25.0077,17.9719"/> | ||
| 526 | </dia:attribute> | ||
| 527 | <dia:attribute name="conn_endpoints"> | ||
| 528 | <dia:point val="24.9422,17.9064"/> | ||
| 529 | <dia:point val="7.825,10.65"/> | ||
| 530 | </dia:attribute> | ||
| 531 | <dia:attribute name="numcp"> | ||
| 532 | <dia:int val="1"/> | ||
| 533 | </dia:attribute> | ||
| 534 | <dia:attribute name="line_color"> | ||
| 535 | <dia:color val="#e60505"/> | ||
| 536 | </dia:attribute> | ||
| 537 | <dia:attribute name="line_style"> | ||
| 538 | <dia:enum val="4"/> | ||
| 539 | </dia:attribute> | ||
| 540 | <dia:connections> | ||
| 541 | <dia:connection handle="0" to="O12" connection="7"/> | ||
| 542 | <dia:connection handle="1" to="O9" connection="7"/> | ||
| 543 | </dia:connections> | ||
| 544 | </dia:object> | ||
| 545 | <dia:object type="Standard - Line" version="0" id="O16"> | ||
| 546 | <dia:attribute name="obj_pos"> | ||
| 547 | <dia:point val="24.9422,9.28251"/> | ||
| 548 | </dia:attribute> | ||
| 549 | <dia:attribute name="obj_bb"> | ||
| 550 | <dia:rectangle val="7.76834,6.74334;24.9989,9.33917"/> | ||
| 551 | </dia:attribute> | ||
| 552 | <dia:attribute name="conn_endpoints"> | ||
| 553 | <dia:point val="24.9422,9.28251"/> | ||
| 554 | <dia:point val="7.825,6.8"/> | ||
| 555 | </dia:attribute> | ||
| 556 | <dia:attribute name="numcp"> | ||
| 557 | <dia:int val="1"/> | ||
| 558 | </dia:attribute> | ||
| 559 | <dia:attribute name="line_color"> | ||
| 560 | <dia:color val="#e60505"/> | ||
| 561 | </dia:attribute> | ||
| 562 | <dia:attribute name="line_style"> | ||
| 563 | <dia:enum val="4"/> | ||
| 564 | </dia:attribute> | ||
| 565 | <dia:connections> | ||
| 566 | <dia:connection handle="0" to="O12" connection="2"/> | ||
| 567 | <dia:connection handle="1" to="O9" connection="2"/> | ||
| 568 | </dia:connections> | ||
| 569 | </dia:object> | ||
| 570 | <dia:object type="Standard - Text" version="1" id="O17"> | ||
| 571 | <dia:attribute name="obj_pos"> | ||
| 572 | <dia:point val="16.7352,7.47209"/> | ||
| 573 | </dia:attribute> | ||
| 574 | <dia:attribute name="obj_bb"> | ||
| 575 | <dia:rectangle val="16.7352,6.87709;22.5602,8.42459"/> | ||
| 576 | </dia:attribute> | ||
| 577 | <dia:attribute name="text"> | ||
| 578 | <dia:composite type="text"> | ||
| 579 | <dia:attribute name="string"> | ||
| 580 | <dia:string>#sink compose | ||
| 581 | selection (scaling)#</dia:string> | ||
| 582 | </dia:attribute> | ||
| 583 | <dia:attribute name="font"> | ||
| 584 | <dia:font family="sans" style="0" name="Helvetica"/> | ||
| 585 | </dia:attribute> | ||
| 586 | <dia:attribute name="height"> | ||
| 587 | <dia:real val="0.80000000000000004"/> | ||
| 588 | </dia:attribute> | ||
| 589 | <dia:attribute name="pos"> | ||
| 590 | <dia:point val="16.7352,7.47209"/> | ||
| 591 | </dia:attribute> | ||
| 592 | <dia:attribute name="color"> | ||
| 593 | <dia:color val="#00ff00"/> | ||
| 594 | </dia:attribute> | ||
| 595 | <dia:attribute name="alignment"> | ||
| 596 | <dia:enum val="0"/> | ||
| 597 | </dia:attribute> | ||
| 598 | </dia:composite> | ||
| 599 | </dia:attribute> | ||
| 600 | <dia:attribute name="valign"> | ||
| 601 | <dia:enum val="3"/> | ||
| 602 | </dia:attribute> | ||
| 603 | </dia:object> | ||
| 604 | <dia:object type="Standard - Box" version="0" id="O18"> | ||
| 605 | <dia:attribute name="obj_pos"> | ||
| 606 | <dia:point val="20.4661,9.72825"/> | ||
| 607 | </dia:attribute> | ||
| 608 | <dia:attribute name="obj_bb"> | ||
| 609 | <dia:rectangle val="20.4161,9.67825;25.5254,13.3509"/> | ||
| 610 | </dia:attribute> | ||
| 611 | <dia:attribute name="elem_corner"> | ||
| 612 | <dia:point val="20.4661,9.72825"/> | ||
| 613 | </dia:attribute> | ||
| 614 | <dia:attribute name="elem_width"> | ||
| 615 | <dia:real val="5.009308462554376"/> | ||
| 616 | </dia:attribute> | ||
| 617 | <dia:attribute name="elem_height"> | ||
| 618 | <dia:real val="3.5726155970598077"/> | ||
| 619 | </dia:attribute> | ||
| 620 | <dia:attribute name="border_width"> | ||
| 621 | <dia:real val="0.10000000149011612"/> | ||
| 622 | </dia:attribute> | ||
| 623 | <dia:attribute name="border_color"> | ||
| 624 | <dia:color val="#a020f0"/> | ||
| 625 | </dia:attribute> | ||
| 626 | <dia:attribute name="show_background"> | ||
| 627 | <dia:boolean val="true"/> | ||
| 628 | </dia:attribute> | ||
| 629 | </dia:object> | ||
| 630 | <dia:object type="Standard - Text" version="1" id="O19"> | ||
| 631 | <dia:attribute name="obj_pos"> | ||
| 632 | <dia:point val="34.475,5.2564"/> | ||
| 633 | </dia:attribute> | ||
| 634 | <dia:attribute name="obj_bb"> | ||
| 635 | <dia:rectangle val="34.475,4.6614;38.7975,6.2089"/> | ||
| 636 | </dia:attribute> | ||
| 637 | <dia:attribute name="text"> | ||
| 638 | <dia:composite type="text"> | ||
| 639 | <dia:attribute name="string"> | ||
| 640 | <dia:string>#source media | ||
| 641 | bus format#</dia:string> | ||
| 642 | </dia:attribute> | ||
| 643 | <dia:attribute name="font"> | ||
| 644 | <dia:font family="sans" style="0" name="Helvetica"/> | ||
| 645 | </dia:attribute> | ||
| 646 | <dia:attribute name="height"> | ||
| 647 | <dia:real val="0.80000000000000004"/> | ||
| 648 | </dia:attribute> | ||
| 649 | <dia:attribute name="pos"> | ||
| 650 | <dia:point val="34.475,5.2564"/> | ||
| 651 | </dia:attribute> | ||
| 652 | <dia:attribute name="color"> | ||
| 653 | <dia:color val="#8b6914"/> | ||
| 654 | </dia:attribute> | ||
| 655 | <dia:attribute name="alignment"> | ||
| 656 | <dia:enum val="0"/> | ||
| 657 | </dia:attribute> | ||
| 658 | </dia:composite> | ||
| 659 | </dia:attribute> | ||
| 660 | <dia:attribute name="valign"> | ||
| 661 | <dia:enum val="3"/> | ||
| 662 | </dia:attribute> | ||
| 663 | </dia:object> | ||
| 664 | <dia:object type="Standard - Box" version="0" id="O20"> | ||
| 665 | <dia:attribute name="obj_pos"> | ||
| 666 | <dia:point val="34.4244,8.6917"/> | ||
| 667 | </dia:attribute> | ||
| 668 | <dia:attribute name="obj_bb"> | ||
| 669 | <dia:rectangle val="34.3744,8.6417;39.4837,12.3143"/> | ||
| 670 | </dia:attribute> | ||
| 671 | <dia:attribute name="elem_corner"> | ||
| 672 | <dia:point val="34.4244,8.6917"/> | ||
| 673 | </dia:attribute> | ||
| 674 | <dia:attribute name="elem_width"> | ||
| 675 | <dia:real val="5.009308462554376"/> | ||
| 676 | </dia:attribute> | ||
| 677 | <dia:attribute name="elem_height"> | ||
| 678 | <dia:real val="3.5726155970598077"/> | ||
| 679 | </dia:attribute> | ||
| 680 | <dia:attribute name="border_width"> | ||
| 681 | <dia:real val="0.10000000149011612"/> | ||
| 682 | </dia:attribute> | ||
| 683 | <dia:attribute name="border_color"> | ||
| 684 | <dia:color val="#8b6914"/> | ||
| 685 | </dia:attribute> | ||
| 686 | <dia:attribute name="show_background"> | ||
| 687 | <dia:boolean val="true"/> | ||
| 688 | </dia:attribute> | ||
| 689 | </dia:object> | ||
| 690 | <dia:object type="Standard - Line" version="0" id="O21"> | ||
| 691 | <dia:attribute name="obj_pos"> | ||
| 692 | <dia:point val="34.4244,12.2643"/> | ||
| 693 | </dia:attribute> | ||
| 694 | <dia:attribute name="obj_bb"> | ||
| 695 | <dia:rectangle val="20.4125,12.2107;34.478,13.3545"/> | ||
| 696 | </dia:attribute> | ||
| 697 | <dia:attribute name="conn_endpoints"> | ||
| 698 | <dia:point val="34.4244,12.2643"/> | ||
| 699 | <dia:point val="20.4661,13.3009"/> | ||
| 700 | </dia:attribute> | ||
| 701 | <dia:attribute name="numcp"> | ||
| 702 | <dia:int val="1"/> | ||
| 703 | </dia:attribute> | ||
| 704 | <dia:attribute name="line_color"> | ||
| 705 | <dia:color val="#e60505"/> | ||
| 706 | </dia:attribute> | ||
| 707 | <dia:attribute name="line_style"> | ||
| 708 | <dia:enum val="4"/> | ||
| 709 | </dia:attribute> | ||
| 710 | <dia:connections> | ||
| 711 | <dia:connection handle="0" to="O20" connection="5"/> | ||
| 712 | <dia:connection handle="1" to="O18" connection="5"/> | ||
| 713 | </dia:connections> | ||
| 714 | </dia:object> | ||
| 715 | <dia:object type="Standard - Line" version="0" id="O22"> | ||
| 716 | <dia:attribute name="obj_pos"> | ||
| 717 | <dia:point val="34.4244,8.6917"/> | ||
| 718 | </dia:attribute> | ||
| 719 | <dia:attribute name="obj_bb"> | ||
| 720 | <dia:rectangle val="20.4125,8.63813;34.478,9.78182"/> | ||
| 721 | </dia:attribute> | ||
| 722 | <dia:attribute name="conn_endpoints"> | ||
| 723 | <dia:point val="34.4244,8.6917"/> | ||
| 724 | <dia:point val="20.4661,9.72825"/> | ||
| 725 | </dia:attribute> | ||
| 726 | <dia:attribute name="numcp"> | ||
| 727 | <dia:int val="1"/> | ||
| 728 | </dia:attribute> | ||
| 729 | <dia:attribute name="line_color"> | ||
| 730 | <dia:color val="#e60505"/> | ||
| 731 | </dia:attribute> | ||
| 732 | <dia:attribute name="line_style"> | ||
| 733 | <dia:enum val="4"/> | ||
| 734 | </dia:attribute> | ||
| 735 | <dia:connections> | ||
| 736 | <dia:connection handle="0" to="O20" connection="0"/> | ||
| 737 | <dia:connection handle="1" to="O18" connection="0"/> | ||
| 738 | </dia:connections> | ||
| 739 | </dia:object> | ||
| 740 | <dia:object type="Standard - Line" version="0" id="O23"> | ||
| 741 | <dia:attribute name="obj_pos"> | ||
| 742 | <dia:point val="39.4337,12.2643"/> | ||
| 743 | </dia:attribute> | ||
| 744 | <dia:attribute name="obj_bb"> | ||
| 745 | <dia:rectangle val="25.4218,12.2107;39.4873,13.3545"/> | ||
| 746 | </dia:attribute> | ||
| 747 | <dia:attribute name="conn_endpoints"> | ||
| 748 | <dia:point val="39.4337,12.2643"/> | ||
| 749 | <dia:point val="25.4754,13.3009"/> | ||
| 750 | </dia:attribute> | ||
| 751 | <dia:attribute name="numcp"> | ||
| 752 | <dia:int val="1"/> | ||
| 753 | </dia:attribute> | ||
| 754 | <dia:attribute name="line_color"> | ||
| 755 | <dia:color val="#e60505"/> | ||
| 756 | </dia:attribute> | ||
| 757 | <dia:attribute name="line_style"> | ||
| 758 | <dia:enum val="4"/> | ||
| 759 | </dia:attribute> | ||
| 760 | <dia:connections> | ||
| 761 | <dia:connection handle="0" to="O20" connection="7"/> | ||
| 762 | <dia:connection handle="1" to="O18" connection="7"/> | ||
| 763 | </dia:connections> | ||
| 764 | </dia:object> | ||
| 765 | <dia:object type="Standard - Line" version="0" id="O24"> | ||
| 766 | <dia:attribute name="obj_pos"> | ||
| 767 | <dia:point val="39.4337,8.6917"/> | ||
| 768 | </dia:attribute> | ||
| 769 | <dia:attribute name="obj_bb"> | ||
| 770 | <dia:rectangle val="25.4218,8.63813;39.4873,9.78182"/> | ||
| 771 | </dia:attribute> | ||
| 772 | <dia:attribute name="conn_endpoints"> | ||
| 773 | <dia:point val="39.4337,8.6917"/> | ||
| 774 | <dia:point val="25.4754,9.72825"/> | ||
| 775 | </dia:attribute> | ||
| 776 | <dia:attribute name="numcp"> | ||
| 777 | <dia:int val="1"/> | ||
| 778 | </dia:attribute> | ||
| 779 | <dia:attribute name="line_color"> | ||
| 780 | <dia:color val="#e60505"/> | ||
| 781 | </dia:attribute> | ||
| 782 | <dia:attribute name="line_style"> | ||
| 783 | <dia:enum val="4"/> | ||
| 784 | </dia:attribute> | ||
| 785 | <dia:connections> | ||
| 786 | <dia:connection handle="0" to="O20" connection="2"/> | ||
| 787 | <dia:connection handle="1" to="O18" connection="2"/> | ||
| 788 | </dia:connections> | ||
| 789 | </dia:object> | ||
| 790 | <dia:object type="Standard - Text" version="1" id="O25"> | ||
| 791 | <dia:attribute name="obj_pos"> | ||
| 792 | <dia:point val="16.25,5.15"/> | ||
| 793 | </dia:attribute> | ||
| 794 | <dia:attribute name="obj_bb"> | ||
| 795 | <dia:rectangle val="16.25,4.555;21.68,6.1025"/> | ||
| 796 | </dia:attribute> | ||
| 797 | <dia:attribute name="text"> | ||
| 798 | <dia:composite type="text"> | ||
| 799 | <dia:attribute name="string"> | ||
| 800 | <dia:string>#sink compose | ||
| 801 | bounds selection#</dia:string> | ||
| 802 | </dia:attribute> | ||
| 803 | <dia:attribute name="font"> | ||
| 804 | <dia:font family="sans" style="0" name="Helvetica"/> | ||
| 805 | </dia:attribute> | ||
| 806 | <dia:attribute name="height"> | ||
| 807 | <dia:real val="0.80000000000000004"/> | ||
| 808 | </dia:attribute> | ||
| 809 | <dia:attribute name="pos"> | ||
| 810 | <dia:point val="16.25,5.15"/> | ||
| 811 | </dia:attribute> | ||
| 812 | <dia:attribute name="color"> | ||
| 813 | <dia:color val="#ff765a"/> | ||
| 814 | </dia:attribute> | ||
| 815 | <dia:attribute name="alignment"> | ||
| 816 | <dia:enum val="0"/> | ||
| 817 | </dia:attribute> | ||
| 818 | </dia:composite> | ||
| 819 | </dia:attribute> | ||
| 820 | <dia:attribute name="valign"> | ||
| 821 | <dia:enum val="3"/> | ||
| 822 | </dia:attribute> | ||
| 823 | </dia:object> | ||
| 824 | <dia:object type="Geometric - Perfect Circle" version="1" id="O26"> | ||
| 825 | <dia:attribute name="obj_pos"> | ||
| 826 | <dia:point val="-1.02991,16.6506"/> | ||
| 827 | </dia:attribute> | ||
| 828 | <dia:attribute name="obj_bb"> | ||
| 829 | <dia:rectangle val="-1.07991,16.6006;-0.12991,17.5506"/> | ||
| 830 | </dia:attribute> | ||
| 831 | <dia:attribute name="meta"> | ||
| 832 | <dia:composite type="dict"/> | ||
| 833 | </dia:attribute> | ||
| 834 | <dia:attribute name="elem_corner"> | ||
| 835 | <dia:point val="-1.02991,16.6506"/> | ||
| 836 | </dia:attribute> | ||
| 837 | <dia:attribute name="elem_width"> | ||
| 838 | <dia:real val="0.84999999999999787"/> | ||
| 839 | </dia:attribute> | ||
| 840 | <dia:attribute name="elem_height"> | ||
| 841 | <dia:real val="0.84999999999999787"/> | ||
| 842 | </dia:attribute> | ||
| 843 | <dia:attribute name="line_width"> | ||
| 844 | <dia:real val="0.10000000000000001"/> | ||
| 845 | </dia:attribute> | ||
| 846 | <dia:attribute name="line_colour"> | ||
| 847 | <dia:color val="#000000"/> | ||
| 848 | </dia:attribute> | ||
| 849 | <dia:attribute name="fill_colour"> | ||
| 850 | <dia:color val="#ffffff"/> | ||
| 851 | </dia:attribute> | ||
| 852 | <dia:attribute name="show_background"> | ||
| 853 | <dia:boolean val="true"/> | ||
| 854 | </dia:attribute> | ||
| 855 | <dia:attribute name="line_style"> | ||
| 856 | <dia:enum val="0"/> | ||
| 857 | <dia:real val="1"/> | ||
| 858 | </dia:attribute> | ||
| 859 | <dia:attribute name="flip_horizontal"> | ||
| 860 | <dia:boolean val="false"/> | ||
| 861 | </dia:attribute> | ||
| 862 | <dia:attribute name="flip_vertical"> | ||
| 863 | <dia:boolean val="false"/> | ||
| 864 | </dia:attribute> | ||
| 865 | <dia:attribute name="subscale"> | ||
| 866 | <dia:real val="1"/> | ||
| 867 | </dia:attribute> | ||
| 868 | </dia:object> | ||
| 869 | <dia:object type="Standard - Line" version="0" id="O27"> | ||
| 870 | <dia:attribute name="obj_pos"> | ||
| 871 | <dia:point val="-9.20491,17.09"/> | ||
| 872 | </dia:attribute> | ||
| 873 | <dia:attribute name="obj_bb"> | ||
| 874 | <dia:rectangle val="-9.255,16.7149;-0.918107,17.4385"/> | ||
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| 876 | <dia:attribute name="conn_endpoints"> | ||
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| 989 | <dia:composite type="text"> | ||
| 990 | <dia:attribute name="string"> | ||
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| 345 | <dia:attribute name="obj_pos"> | ||
| 346 | <dia:point val="24.9422,9.28251"/> | ||
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| 348 | <dia:attribute name="obj_bb"> | ||
| 349 | <dia:rectangle val="7.12249,9.23;24.9947,10.2525"/> | ||
| 350 | </dia:attribute> | ||
| 351 | <dia:attribute name="conn_endpoints"> | ||
| 352 | <dia:point val="24.9422,9.28251"/> | ||
| 353 | <dia:point val="7.175,10.2"/> | ||
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| 355 | <dia:attribute name="numcp"> | ||
| 356 | <dia:int val="1"/> | ||
| 357 | </dia:attribute> | ||
| 358 | <dia:attribute name="line_color"> | ||
| 359 | <dia:color val="#e60505"/> | ||
| 360 | </dia:attribute> | ||
| 361 | <dia:attribute name="line_style"> | ||
| 362 | <dia:enum val="4"/> | ||
| 363 | </dia:attribute> | ||
| 364 | <dia:connections> | ||
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| 366 | <dia:connection handle="1" to="O2" connection="2"/> | ||
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| 368 | </dia:object> | ||
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| 371 | <dia:point val="16.7352,7.47209"/> | ||
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| 373 | <dia:attribute name="obj_bb"> | ||
| 374 | <dia:rectangle val="16.7352,6.87709;22.5602,8.42459"/> | ||
| 375 | </dia:attribute> | ||
| 376 | <dia:attribute name="text"> | ||
| 377 | <dia:composite type="text"> | ||
| 378 | <dia:attribute name="string"> | ||
| 379 | <dia:string>#sink compose | ||
| 380 | selection (scaling)#</dia:string> | ||
| 381 | </dia:attribute> | ||
| 382 | <dia:attribute name="font"> | ||
| 383 | <dia:font family="sans" style="0" name="Helvetica"/> | ||
| 384 | </dia:attribute> | ||
| 385 | <dia:attribute name="height"> | ||
| 386 | <dia:real val="0.80000000000000004"/> | ||
| 387 | </dia:attribute> | ||
| 388 | <dia:attribute name="pos"> | ||
| 389 | <dia:point val="16.7352,7.47209"/> | ||
| 390 | </dia:attribute> | ||
| 391 | <dia:attribute name="color"> | ||
| 392 | <dia:color val="#00ff00"/> | ||
| 393 | </dia:attribute> | ||
| 394 | <dia:attribute name="alignment"> | ||
| 395 | <dia:enum val="0"/> | ||
| 396 | </dia:attribute> | ||
| 397 | </dia:composite> | ||
| 398 | </dia:attribute> | ||
| 399 | <dia:attribute name="valign"> | ||
| 400 | <dia:enum val="3"/> | ||
| 401 | </dia:attribute> | ||
| 402 | </dia:object> | ||
| 403 | <dia:object type="Standard - Box" version="0" id="O12"> | ||
| 404 | <dia:attribute name="obj_pos"> | ||
| 405 | <dia:point val="19.1161,9.97825"/> | ||
| 406 | </dia:attribute> | ||
| 407 | <dia:attribute name="obj_bb"> | ||
| 408 | <dia:rectangle val="19.0661,9.92825;24.1754,13.6009"/> | ||
| 409 | </dia:attribute> | ||
| 410 | <dia:attribute name="elem_corner"> | ||
| 411 | <dia:point val="19.1161,9.97825"/> | ||
| 412 | </dia:attribute> | ||
| 413 | <dia:attribute name="elem_width"> | ||
| 414 | <dia:real val="5.009308462554376"/> | ||
| 415 | </dia:attribute> | ||
| 416 | <dia:attribute name="elem_height"> | ||
| 417 | <dia:real val="3.5726155970598077"/> | ||
| 418 | </dia:attribute> | ||
| 419 | <dia:attribute name="border_width"> | ||
| 420 | <dia:real val="0.10000000149011612"/> | ||
| 421 | </dia:attribute> | ||
| 422 | <dia:attribute name="border_color"> | ||
| 423 | <dia:color val="#a020f0"/> | ||
| 424 | </dia:attribute> | ||
| 425 | <dia:attribute name="show_background"> | ||
| 426 | <dia:boolean val="true"/> | ||
| 427 | </dia:attribute> | ||
| 428 | </dia:object> | ||
| 429 | <dia:object type="Standard - Text" version="1" id="O13"> | ||
| 430 | <dia:attribute name="obj_pos"> | ||
| 431 | <dia:point val="27.1661,7.47209"/> | ||
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| 433 | <dia:attribute name="obj_bb"> | ||
| 434 | <dia:rectangle val="27.1661,6.87709;30.0436,9.22459"/> | ||
| 435 | </dia:attribute> | ||
| 436 | <dia:attribute name="text"> | ||
| 437 | <dia:composite type="text"> | ||
| 438 | <dia:attribute name="string"> | ||
| 439 | <dia:string>#source | ||
| 440 | crop | ||
| 441 | selection#</dia:string> | ||
| 442 | </dia:attribute> | ||
| 443 | <dia:attribute name="font"> | ||
| 444 | <dia:font family="sans" style="0" name="Helvetica"/> | ||
| 445 | </dia:attribute> | ||
| 446 | <dia:attribute name="height"> | ||
| 447 | <dia:real val="0.80000000000000004"/> | ||
| 448 | </dia:attribute> | ||
| 449 | <dia:attribute name="pos"> | ||
| 450 | <dia:point val="27.1661,7.47209"/> | ||
| 451 | </dia:attribute> | ||
| 452 | <dia:attribute name="color"> | ||
| 453 | <dia:color val="#a020f0"/> | ||
| 454 | </dia:attribute> | ||
| 455 | <dia:attribute name="alignment"> | ||
| 456 | <dia:enum val="0"/> | ||
| 457 | </dia:attribute> | ||
| 458 | </dia:composite> | ||
| 459 | </dia:attribute> | ||
| 460 | <dia:attribute name="valign"> | ||
| 461 | <dia:enum val="3"/> | ||
| 462 | </dia:attribute> | ||
| 463 | </dia:object> | ||
| 464 | <dia:object type="Standard - Text" version="1" id="O14"> | ||
| 465 | <dia:attribute name="obj_pos"> | ||
| 466 | <dia:point val="34.575,7.8564"/> | ||
| 467 | </dia:attribute> | ||
| 468 | <dia:attribute name="obj_bb"> | ||
| 469 | <dia:rectangle val="34.575,7.2614;38.8975,8.8089"/> | ||
| 470 | </dia:attribute> | ||
| 471 | <dia:attribute name="text"> | ||
| 472 | <dia:composite type="text"> | ||
| 473 | <dia:attribute name="string"> | ||
| 474 | <dia:string>#source media | ||
| 475 | bus format#</dia:string> | ||
| 476 | </dia:attribute> | ||
| 477 | <dia:attribute name="font"> | ||
| 478 | <dia:font family="sans" style="0" name="Helvetica"/> | ||
| 479 | </dia:attribute> | ||
| 480 | <dia:attribute name="height"> | ||
| 481 | <dia:real val="0.80000000000000004"/> | ||
| 482 | </dia:attribute> | ||
| 483 | <dia:attribute name="pos"> | ||
| 484 | <dia:point val="34.575,7.8564"/> | ||
| 485 | </dia:attribute> | ||
| 486 | <dia:attribute name="color"> | ||
| 487 | <dia:color val="#8b6914"/> | ||
| 488 | </dia:attribute> | ||
| 489 | <dia:attribute name="alignment"> | ||
| 490 | <dia:enum val="0"/> | ||
| 491 | </dia:attribute> | ||
| 492 | </dia:composite> | ||
| 493 | </dia:attribute> | ||
| 494 | <dia:attribute name="valign"> | ||
| 495 | <dia:enum val="3"/> | ||
| 496 | </dia:attribute> | ||
| 497 | </dia:object> | ||
| 498 | <dia:object type="Standard - Box" version="0" id="O15"> | ||
| 499 | <dia:attribute name="obj_pos"> | ||
| 500 | <dia:point val="34.5244,11.2917"/> | ||
| 501 | </dia:attribute> | ||
| 502 | <dia:attribute name="obj_bb"> | ||
| 503 | <dia:rectangle val="34.4744,11.2417;39.5837,14.9143"/> | ||
| 504 | </dia:attribute> | ||
| 505 | <dia:attribute name="elem_corner"> | ||
| 506 | <dia:point val="34.5244,11.2917"/> | ||
| 507 | </dia:attribute> | ||
| 508 | <dia:attribute name="elem_width"> | ||
| 509 | <dia:real val="5.009308462554376"/> | ||
| 510 | </dia:attribute> | ||
| 511 | <dia:attribute name="elem_height"> | ||
| 512 | <dia:real val="3.5726155970598077"/> | ||
| 513 | </dia:attribute> | ||
| 514 | <dia:attribute name="border_width"> | ||
| 515 | <dia:real val="0.10000000149011612"/> | ||
| 516 | </dia:attribute> | ||
| 517 | <dia:attribute name="border_color"> | ||
| 518 | <dia:color val="#8b6914"/> | ||
| 519 | </dia:attribute> | ||
| 520 | <dia:attribute name="show_background"> | ||
| 521 | <dia:boolean val="true"/> | ||
| 522 | </dia:attribute> | ||
| 523 | </dia:object> | ||
| 524 | <dia:object type="Standard - Line" version="0" id="O16"> | ||
| 525 | <dia:attribute name="obj_pos"> | ||
| 526 | <dia:point val="34.5244,14.8643"/> | ||
| 527 | </dia:attribute> | ||
| 528 | <dia:attribute name="obj_bb"> | ||
| 529 | <dia:rectangle val="19.062,13.4968;34.5785,14.9184"/> | ||
| 530 | </dia:attribute> | ||
| 531 | <dia:attribute name="conn_endpoints"> | ||
| 532 | <dia:point val="34.5244,14.8643"/> | ||
| 533 | <dia:point val="19.1161,13.5509"/> | ||
| 534 | </dia:attribute> | ||
| 535 | <dia:attribute name="numcp"> | ||
| 536 | <dia:int val="1"/> | ||
| 537 | </dia:attribute> | ||
| 538 | <dia:attribute name="line_color"> | ||
| 539 | <dia:color val="#e60505"/> | ||
| 540 | </dia:attribute> | ||
| 541 | <dia:attribute name="line_style"> | ||
| 542 | <dia:enum val="4"/> | ||
| 543 | </dia:attribute> | ||
| 544 | <dia:connections> | ||
| 545 | <dia:connection handle="0" to="O15" connection="5"/> | ||
| 546 | <dia:connection handle="1" to="O12" connection="5"/> | ||
| 547 | </dia:connections> | ||
| 548 | </dia:object> | ||
| 549 | <dia:object type="Standard - Line" version="0" id="O17"> | ||
| 550 | <dia:attribute name="obj_pos"> | ||
| 551 | <dia:point val="34.5244,11.2917"/> | ||
| 552 | </dia:attribute> | ||
| 553 | <dia:attribute name="obj_bb"> | ||
| 554 | <dia:rectangle val="19.062,9.92418;34.5785,11.3458"/> | ||
| 555 | </dia:attribute> | ||
| 556 | <dia:attribute name="conn_endpoints"> | ||
| 557 | <dia:point val="34.5244,11.2917"/> | ||
| 558 | <dia:point val="19.1161,9.97825"/> | ||
| 559 | </dia:attribute> | ||
| 560 | <dia:attribute name="numcp"> | ||
| 561 | <dia:int val="1"/> | ||
| 562 | </dia:attribute> | ||
| 563 | <dia:attribute name="line_color"> | ||
| 564 | <dia:color val="#e60505"/> | ||
| 565 | </dia:attribute> | ||
| 566 | <dia:attribute name="line_style"> | ||
| 567 | <dia:enum val="4"/> | ||
| 568 | </dia:attribute> | ||
| 569 | <dia:connections> | ||
| 570 | <dia:connection handle="0" to="O15" connection="0"/> | ||
| 571 | <dia:connection handle="1" to="O12" connection="0"/> | ||
| 572 | </dia:connections> | ||
| 573 | </dia:object> | ||
| 574 | <dia:object type="Standard - Line" version="0" id="O18"> | ||
| 575 | <dia:attribute name="obj_pos"> | ||
| 576 | <dia:point val="39.5337,14.8643"/> | ||
| 577 | </dia:attribute> | ||
| 578 | <dia:attribute name="obj_bb"> | ||
| 579 | <dia:rectangle val="24.0713,13.4968;39.5878,14.9184"/> | ||
| 580 | </dia:attribute> | ||
| 581 | <dia:attribute name="conn_endpoints"> | ||
| 582 | <dia:point val="39.5337,14.8643"/> | ||
| 583 | <dia:point val="24.1254,13.5509"/> | ||
| 584 | </dia:attribute> | ||
| 585 | <dia:attribute name="numcp"> | ||
| 586 | <dia:int val="1"/> | ||
| 587 | </dia:attribute> | ||
| 588 | <dia:attribute name="line_color"> | ||
| 589 | <dia:color val="#e60505"/> | ||
| 590 | </dia:attribute> | ||
| 591 | <dia:attribute name="line_style"> | ||
| 592 | <dia:enum val="4"/> | ||
| 593 | </dia:attribute> | ||
| 594 | <dia:connections> | ||
| 595 | <dia:connection handle="0" to="O15" connection="7"/> | ||
| 596 | <dia:connection handle="1" to="O12" connection="7"/> | ||
| 597 | </dia:connections> | ||
| 598 | </dia:object> | ||
| 599 | <dia:object type="Standard - Line" version="0" id="O19"> | ||
| 600 | <dia:attribute name="obj_pos"> | ||
| 601 | <dia:point val="39.5337,11.2917"/> | ||
| 602 | </dia:attribute> | ||
| 603 | <dia:attribute name="obj_bb"> | ||
| 604 | <dia:rectangle val="24.0713,9.92418;39.5878,11.3458"/> | ||
| 605 | </dia:attribute> | ||
| 606 | <dia:attribute name="conn_endpoints"> | ||
| 607 | <dia:point val="39.5337,11.2917"/> | ||
| 608 | <dia:point val="24.1254,9.97825"/> | ||
| 609 | </dia:attribute> | ||
| 610 | <dia:attribute name="numcp"> | ||
| 611 | <dia:int val="1"/> | ||
| 612 | </dia:attribute> | ||
| 613 | <dia:attribute name="line_color"> | ||
| 614 | <dia:color val="#e60505"/> | ||
| 615 | </dia:attribute> | ||
| 616 | <dia:attribute name="line_style"> | ||
| 617 | <dia:enum val="4"/> | ||
| 618 | </dia:attribute> | ||
| 619 | <dia:connections> | ||
| 620 | <dia:connection handle="0" to="O15" connection="2"/> | ||
| 621 | <dia:connection handle="1" to="O12" connection="2"/> | ||
| 622 | </dia:connections> | ||
| 623 | </dia:object> | ||
| 624 | <dia:object type="Geometric - Perfect Circle" version="1" id="O20"> | ||
| 625 | <dia:attribute name="obj_pos"> | ||
| 626 | <dia:point val="39.98,12.0742"/> | ||
| 627 | </dia:attribute> | ||
| 628 | <dia:attribute name="obj_bb"> | ||
| 629 | <dia:rectangle val="39.93,12.0242;40.88,12.9742"/> | ||
| 630 | </dia:attribute> | ||
| 631 | <dia:attribute name="meta"> | ||
| 632 | <dia:composite type="dict"/> | ||
| 633 | </dia:attribute> | ||
| 634 | <dia:attribute name="elem_corner"> | ||
| 635 | <dia:point val="39.98,12.0742"/> | ||
| 636 | </dia:attribute> | ||
| 637 | <dia:attribute name="elem_width"> | ||
| 638 | <dia:real val="0.84999999999999787"/> | ||
| 639 | </dia:attribute> | ||
| 640 | <dia:attribute name="elem_height"> | ||
| 641 | <dia:real val="0.84999999999999787"/> | ||
| 642 | </dia:attribute> | ||
| 643 | <dia:attribute name="line_width"> | ||
| 644 | <dia:real val="0.10000000000000001"/> | ||
| 645 | </dia:attribute> | ||
| 646 | <dia:attribute name="line_colour"> | ||
| 647 | <dia:color val="#000000"/> | ||
| 648 | </dia:attribute> | ||
| 649 | <dia:attribute name="fill_colour"> | ||
| 650 | <dia:color val="#ffffff"/> | ||
| 651 | </dia:attribute> | ||
| 652 | <dia:attribute name="show_background"> | ||
| 653 | <dia:boolean val="true"/> | ||
| 654 | </dia:attribute> | ||
| 655 | <dia:attribute name="line_style"> | ||
| 656 | <dia:enum val="0"/> | ||
| 657 | <dia:real val="1"/> | ||
| 658 | </dia:attribute> | ||
| 659 | <dia:attribute name="flip_horizontal"> | ||
| 660 | <dia:boolean val="false"/> | ||
| 661 | </dia:attribute> | ||
| 662 | <dia:attribute name="flip_vertical"> | ||
| 663 | <dia:boolean val="false"/> | ||
| 664 | </dia:attribute> | ||
| 665 | <dia:attribute name="subscale"> | ||
| 666 | <dia:real val="1"/> | ||
| 667 | </dia:attribute> | ||
| 668 | </dia:object> | ||
| 669 | <dia:object type="Standard - Line" version="0" id="O21"> | ||
| 670 | <dia:attribute name="obj_pos"> | ||
| 671 | <dia:point val="40.83,12.4992"/> | ||
| 672 | </dia:attribute> | ||
| 673 | <dia:attribute name="obj_bb"> | ||
| 674 | <dia:rectangle val="40.78,12.1388;49.2453,12.8624"/> | ||
| 675 | </dia:attribute> | ||
| 676 | <dia:attribute name="conn_endpoints"> | ||
| 677 | <dia:point val="40.83,12.4992"/> | ||
| 678 | <dia:point val="49.1335,12.5007"/> | ||
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| 680 | <dia:attribute name="numcp"> | ||
| 681 | <dia:int val="1"/> | ||
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| 683 | <dia:attribute name="end_arrow"> | ||
| 684 | <dia:enum val="22"/> | ||
| 685 | </dia:attribute> | ||
| 686 | <dia:attribute name="end_arrow_length"> | ||
| 687 | <dia:real val="0.5"/> | ||
| 688 | </dia:attribute> | ||
| 689 | <dia:attribute name="end_arrow_width"> | ||
| 690 | <dia:real val="0.5"/> | ||
| 691 | </dia:attribute> | ||
| 692 | <dia:connections> | ||
| 693 | <dia:connection handle="0" to="O20" connection="3"/> | ||
| 694 | </dia:connections> | ||
| 695 | </dia:object> | ||
| 696 | <dia:object type="Standard - Text" version="1" id="O22"> | ||
| 697 | <dia:attribute name="obj_pos"> | ||
| 698 | <dia:point val="42.0954,11.99"/> | ||
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| 700 | <dia:attribute name="obj_bb"> | ||
| 701 | <dia:rectangle val="42.0954,11.395;46.7404,12.1425"/> | ||
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| 703 | <dia:attribute name="text"> | ||
| 704 | <dia:composite type="text"> | ||
| 705 | <dia:attribute name="string"> | ||
| 706 | <dia:string>#pad 1 (source)#</dia:string> | ||
| 707 | </dia:attribute> | ||
| 708 | <dia:attribute name="font"> | ||
| 709 | <dia:font family="sans" style="0" name="Helvetica"/> | ||
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| 711 | <dia:attribute name="height"> | ||
| 712 | <dia:real val="0.80000000000000004"/> | ||
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| 714 | <dia:attribute name="pos"> | ||
| 715 | <dia:point val="42.0954,11.99"/> | ||
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| 717 | <dia:attribute name="color"> | ||
| 718 | <dia:color val="#000000"/> | ||
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| 720 | <dia:attribute name="alignment"> | ||
| 721 | <dia:enum val="0"/> | ||
| 722 | </dia:attribute> | ||
| 723 | </dia:composite> | ||
| 724 | </dia:attribute> | ||
| 725 | <dia:attribute name="valign"> | ||
| 726 | <dia:enum val="3"/> | ||
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| 728 | </dia:object> | ||
| 729 | <dia:object type="Geometric - Perfect Circle" version="1" id="O23"> | ||
| 730 | <dia:attribute name="obj_pos"> | ||
| 731 | <dia:point val="-1.44491,11.6506"/> | ||
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| 733 | <dia:attribute name="obj_bb"> | ||
| 734 | <dia:rectangle val="-1.49491,11.6006;-0.54491,12.5506"/> | ||
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| 736 | <dia:attribute name="meta"> | ||
| 737 | <dia:composite type="dict"/> | ||
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| 739 | <dia:attribute name="elem_corner"> | ||
| 740 | <dia:point val="-1.44491,11.6506"/> | ||
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| 742 | <dia:attribute name="elem_width"> | ||
| 743 | <dia:real val="0.84999999999999787"/> | ||
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| 745 | <dia:attribute name="elem_height"> | ||
| 746 | <dia:real val="0.84999999999999787"/> | ||
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| 748 | <dia:attribute name="line_width"> | ||
| 749 | <dia:real val="0.10000000000000001"/> | ||
| 750 | </dia:attribute> | ||
| 751 | <dia:attribute name="line_colour"> | ||
| 752 | <dia:color val="#000000"/> | ||
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| 754 | <dia:attribute name="fill_colour"> | ||
| 755 | <dia:color val="#ffffff"/> | ||
| 756 | </dia:attribute> | ||
| 757 | <dia:attribute name="show_background"> | ||
| 758 | <dia:boolean val="true"/> | ||
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| 760 | <dia:attribute name="line_style"> | ||
| 761 | <dia:enum val="0"/> | ||
| 762 | <dia:real val="1"/> | ||
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| 764 | <dia:attribute name="flip_horizontal"> | ||
| 765 | <dia:boolean val="false"/> | ||
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| 767 | <dia:attribute name="flip_vertical"> | ||
| 768 | <dia:boolean val="false"/> | ||
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| 770 | <dia:attribute name="subscale"> | ||
| 771 | <dia:real val="1"/> | ||
| 772 | </dia:attribute> | ||
| 773 | </dia:object> | ||
| 774 | <dia:object type="Standard - Line" version="0" id="O24"> | ||
| 775 | <dia:attribute name="obj_pos"> | ||
| 776 | <dia:point val="-9.61991,12.09"/> | ||
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| 778 | <dia:attribute name="obj_bb"> | ||
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| 781 | <dia:attribute name="conn_endpoints"> | ||
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| 783 | <dia:point val="-1.44491,12.0756"/> | ||
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| 785 | <dia:attribute name="numcp"> | ||
| 786 | <dia:int val="1"/> | ||
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| 788 | <dia:attribute name="end_arrow"> | ||
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| 791 | <dia:attribute name="end_arrow_length"> | ||
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| 794 | <dia:attribute name="end_arrow_width"> | ||
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| 797 | <dia:connections> | ||
| 798 | <dia:connection handle="1" to="O23" connection="2"/> | ||
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| 801 | <dia:object type="Standard - Text" version="1" id="O25"> | ||
| 802 | <dia:attribute name="obj_pos"> | ||
| 803 | <dia:point val="-7.39291,11.49"/> | ||
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| 805 | <dia:attribute name="obj_bb"> | ||
| 806 | <dia:rectangle val="-7.39291,10.895;-3.58791,11.6425"/> | ||
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| 808 | <dia:attribute name="text"> | ||
| 809 | <dia:composite type="text"> | ||
| 810 | <dia:attribute name="string"> | ||
| 811 | <dia:string>#pad 0 (sink)#</dia:string> | ||
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| 813 | <dia:attribute name="font"> | ||
| 814 | <dia:font family="sans" style="0" name="Helvetica"/> | ||
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| 816 | <dia:attribute name="height"> | ||
| 817 | <dia:real val="0.80000000000000004"/> | ||
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| 819 | <dia:attribute name="pos"> | ||
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| @@ -28,8 +28,8 @@ documentation.</contrib> · 27 unmodified lines | |||
| 28 | <firstname>Hans</firstname> | 28 | <firstname>Hans</firstname> |
| 29 | <surname>Verkuil</surname> | 29 | <surname>Verkuil</surname> |
| 30 | <contrib>Designed and documented the VIDIOC_LOG_STATUS ioctl, | 30 | <contrib>Designed and documented the VIDIOC_LOG_STATUS ioctl, |
| 31 | the extended control ioctls and major parts of the sliced VBI | 31 | the extended control ioctls, major parts of the sliced VBI API, the |
| 32 | API.</contrib> | 32 | MPEG encoder and decoder APIs and the DV Timings API.</contrib> |
| 33 | <affiliation> | 33 | <affiliation> |
| 34 | <address> | 34 | <address> |
| 35 | <email>hverkuil@xs4all.nl</email> | 35 | <email>hverkuil@xs4all.nl</email> |
| @@ -96,6 +96,17 @@ Remote Controller chapter.</contrib> · 60 unmodified lines | |||
| 96 | </address> | 96 | </address> |
| 97 | </affiliation> | 97 | </affiliation> |
| 98 | </author> | 98 | </author> |
| 99 | |||
| 100 | <author> | ||
| 101 | <firstname>Sakari</firstname> | ||
| 102 | <surname>Ailus</surname> | ||
| 103 | <contrib>Subdev selections API.</contrib> | ||
| 104 | <affiliation> | ||
| 105 | <address> | ||
| 106 | <email>sakari.ailus@iki.fi</email> | ||
| 107 | </address> | ||
| 108 | </affiliation> | ||
| 109 | </author> | ||
| 99 | </authorgroup> | 110 | </authorgroup> |
| 100 | 111 | ||
| 101 | <copyright> | 112 | <copyright> |
| @@ -112,6 +123,7 @@ Remote Controller chapter.</contrib> · 10 unmodified lines | |||
| 112 | <year>2009</year> | 123 | <year>2009</year> |
| 113 | <year>2010</year> | 124 | <year>2010</year> |
| 114 | <year>2011</year> | 125 | <year>2011</year> |
| 126 | <year>2012</year> | ||
| 115 | <holder>Bill Dirks, Michael H. Schimek, Hans Verkuil, Martin | 127 | <holder>Bill Dirks, Michael H. Schimek, Hans Verkuil, Martin |
| 116 | Rubli, Andy Walls, Muralidharan Karicheri, Mauro Carvalho Chehab, | 128 | Rubli, Andy Walls, Muralidharan Karicheri, Mauro Carvalho Chehab, |
| 117 | Pawel Osciak</holder> | 129 | Pawel Osciak</holder> |
| @@ -127,6 +139,28 @@ structs, ioctls) must be noted in more detail in the history chapter · 9 unmodified lines | |||
| 127 | (compat.xml), along with the possible impact on existing drivers and | 139 | (compat.xml), along with the possible impact on existing drivers and |
| 128 | applications. --> | 140 | applications. --> |
| 129 | 141 | ||
| 142 | <revision> | ||
| 143 | <revnumber>3.5</revnumber> | ||
| 144 | <date>2012-05-07</date> | ||
| 145 | <authorinitials>sa, sn</authorinitials> | ||
| 146 | <revremark>Added V4L2_CTRL_TYPE_INTEGER_MENU and V4L2 subdev | ||
| 147 | selections API. Improved the description of V4L2_CID_COLORFX | ||
| 148 | control, added V4L2_CID_COLORFX_CBCR control. | ||
| 149 | Added camera controls V4L2_CID_AUTO_EXPOSURE_BIAS, | ||
| 150 | V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE, V4L2_CID_IMAGE_STABILIZATION, | ||
| 151 | V4L2_CID_ISO_SENSITIVITY, V4L2_CID_ISO_SENSITIVITY_AUTO, | ||
| 152 | V4L2_CID_EXPOSURE_METERING, V4L2_CID_SCENE_MODE, | ||
| 153 | V4L2_CID_3A_LOCK, V4L2_CID_AUTO_FOCUS_START, | ||
| 154 | V4L2_CID_AUTO_FOCUS_STOP, V4L2_CID_AUTO_FOCUS_STATUS | ||
| 155 | and V4L2_CID_AUTO_FOCUS_RANGE. | ||
| 156 | </revremark> | ||
| 157 | <date>2012-05-01</date> | ||
| 158 | <authorinitials>hv</authorinitials> | ||
| 159 | <revremark>Added VIDIOC_ENUM_DV_TIMINGS, VIDIOC_QUERY_DV_TIMINGS and | ||
| 160 | VIDIOC_DV_TIMINGS_CAP. | ||
| 161 | </revremark> | ||
| 162 | </revision> | ||
| 163 | |||
| 130 | <revision> | 164 | <revision> |
| 131 | <revnumber>3.4</revnumber> | 165 | <revnumber>3.4</revnumber> |
| 132 | <date>2012-01-25</date> | 166 | <date>2012-01-25</date> |
| @@ -433,7 +467,7 @@ and discussions on the V4L mailing list.</revremark> · 300 unmodified lines | |||
| 433 | </partinfo> | 467 | </partinfo> |
| 434 | 468 | ||
| 435 | <title>Video for Linux Two API Specification</title> | 469 | <title>Video for Linux Two API Specification</title> |
| 436 | <subtitle>Revision 3.3</subtitle> | 470 | <subtitle>Revision 3.5</subtitle> |
| 437 | 471 | ||
| 438 | <chapter id="common"> | 472 | <chapter id="common"> |
| 439 | &sub-common; | 473 | &sub-common; |
| @@ -491,10 +525,12 @@ and discussions on the V4L mailing list.</revremark> · 51 unmodified lines | |||
| 491 | &sub-dbg-g-register; | 525 | &sub-dbg-g-register; |
| 492 | &sub-decoder-cmd; | 526 | &sub-decoder-cmd; |
| 493 | &sub-dqevent; | 527 | &sub-dqevent; |
| 528 | &sub-dv-timings-cap; | ||
| 494 | &sub-encoder-cmd; | 529 | &sub-encoder-cmd; |
| 495 | &sub-enumaudio; | 530 | &sub-enumaudio; |
| 496 | &sub-enumaudioout; | 531 | &sub-enumaudioout; |
| 497 | &sub-enum-dv-presets; | 532 | &sub-enum-dv-presets; |
| 533 | &sub-enum-dv-timings; | ||
| 498 | &sub-enum-fmt; | 534 | &sub-enum-fmt; |
| 499 | &sub-enum-framesizes; | 535 | &sub-enum-framesizes; |
| 500 | &sub-enum-frameintervals; | 536 | &sub-enum-frameintervals; |
| @@ -529,6 +565,7 @@ and discussions on the V4L mailing list.</revremark> · 28 unmodified lines | |||
| 529 | &sub-querycap; | 565 | &sub-querycap; |
| 530 | &sub-queryctrl; | 566 | &sub-queryctrl; |
| 531 | &sub-query-dv-preset; | 567 | &sub-query-dv-preset; |
| 568 | &sub-query-dv-timings; | ||
| 532 | &sub-querystd; | 569 | &sub-querystd; |
| 533 | &sub-prepare-buf; | 570 | &sub-prepare-buf; |
| 534 | &sub-reqbufs; | 571 | &sub-reqbufs; |
| @@ -540,6 +577,7 @@ and discussions on the V4L mailing list.</revremark> · 5 unmodified lines | |||
| 540 | &sub-subdev-g-crop; | 577 | &sub-subdev-g-crop; |
| 541 | &sub-subdev-g-fmt; | 578 | &sub-subdev-g-fmt; |
| 542 | &sub-subdev-g-frame-interval; | 579 | &sub-subdev-g-frame-interval; |
| 580 | &sub-subdev-g-selection; | ||
| 543 | &sub-subscribe-event; | 581 | &sub-subscribe-event; |
| 544 | <!-- End of ioctls. --> | 582 | <!-- End of ioctls. --> |
| 545 | &sub-mmap; | 583 | &sub-mmap; |
| @@ -48,6 +48,12 @@ · 47 unmodified lines | |||
| 48 | <refsect1> | 48 | <refsect1> |
| 49 | <title>Description</title> | 49 | <title>Description</title> |
| 50 | 50 | ||
| 51 | <note> | ||
| 52 | <title>Experimental</title> | ||
| 53 | <para>This is an <link linkend="experimental"> experimental </link> | ||
| 54 | interface and may change in the future.</para> | ||
| 55 | </note> | ||
| 56 | |||
| 51 | <para>This ioctl is used to create buffers for <link linkend="mmap">memory | 57 | <para>This ioctl is used to create buffers for <link linkend="mmap">memory |
| 52 | mapped</link> or <link linkend="userp">user pointer</link> | 58 | mapped</link> or <link linkend="userp">user pointer</link> |
| 53 | I/O. It can be used as an alternative or in addition to the | 59 | I/O. It can be used as an alternative or in addition to the |
| @@ -94,16 +100,18 @@ information.</para> · 40 unmodified lines | |||
| 94 | <entry>The number of buffers requested or granted.</entry> | 100 | <entry>The number of buffers requested or granted.</entry> |
| 95 | </row> | 101 | </row> |
| 96 | <row> | 102 | <row> |
| 97 | <entry>&v4l2-memory;</entry> | 103 | <entry>__u32</entry> |
| 98 | <entry><structfield>memory</structfield></entry> | 104 | <entry><structfield>memory</structfield></entry> |
| 99 | <entry>Applications set this field to | 105 | <entry>Applications set this field to |
| 100 | <constant>V4L2_MEMORY_MMAP</constant> or | 106 | <constant>V4L2_MEMORY_MMAP</constant> or |
| 101 | <constant>V4L2_MEMORY_USERPTR</constant>.</entry> | 107 | <constant>V4L2_MEMORY_USERPTR</constant>. See <xref linkend="v4l2-memory" |
| 108 | /></entry> | ||
| 102 | </row> | 109 | </row> |
| 103 | <row> | 110 | <row> |
| 104 | <entry>&v4l2-format;</entry> | 111 | <entry>__u32</entry> |
| 105 | <entry><structfield>format</structfield></entry> | 112 | <entry><structfield>format</structfield></entry> |
| 106 | <entry>Filled in by the application, preserved by the driver.</entry> | 113 | <entry>Filled in by the application, preserved by the driver. |
| 114 | See <xref linkend="v4l2-format" />.</entry> | ||
| 107 | </row> | 115 | </row> |
| 108 | <row> | 116 | <row> |
| 109 | <entry>__u32</entry> | 117 | <entry>__u32</entry> |
| @@ -65,7 +65,7 @@ output.</para> · 64 unmodified lines | |||
| 65 | &cs-str; | 65 | &cs-str; |
| 66 | <tbody valign="top"> | 66 | <tbody valign="top"> |
| 67 | <row> | 67 | <row> |
| 68 | <entry>&v4l2-buf-type;</entry> | 68 | <entry>__u32</entry> |
| 69 | <entry><structfield>type</structfield></entry> | 69 | <entry><structfield>type</structfield></entry> |
| 70 | <entry>Type of the data stream, set by the application. | 70 | <entry>Type of the data stream, set by the application. |
| 71 | Only these types are valid here: | 71 | Only these types are valid here: |
| @@ -73,7 +73,7 @@ Only these types are valid here: · 1 unmodified line | |||
| 73 | <constant>V4L2_BUF_TYPE_VIDEO_OUTPUT</constant>, | 73 | <constant>V4L2_BUF_TYPE_VIDEO_OUTPUT</constant>, |
| 74 | <constant>V4L2_BUF_TYPE_VIDEO_OVERLAY</constant>, and custom (driver | 74 | <constant>V4L2_BUF_TYPE_VIDEO_OVERLAY</constant>, and custom (driver |
| 75 | defined) types with code <constant>V4L2_BUF_TYPE_PRIVATE</constant> | 75 | defined) types with code <constant>V4L2_BUF_TYPE_PRIVATE</constant> |
| 76 | and higher.</entry> | 76 | and higher. See <xref linkend="v4l2-buf-type" />.</entry> |
| 77 | </row> | 77 | </row> |
| 78 | <row> | 78 | <row> |
| 79 | <entry>struct <link linkend="v4l2-rect-crop">v4l2_rect</link></entry> | 79 | <entry>struct <link linkend="v4l2-rect-crop">v4l2_rect</link></entry> |
| @@ -0,0 +1,211 @@ | |||
| 1 | <refentry id="vidioc-dv-timings-cap"> | ||
| 2 | <refmeta> | ||
| 3 | <refentrytitle>ioctl VIDIOC_DV_TIMINGS_CAP</refentrytitle> | ||
| 4 | &manvol; | ||
| 5 | </refmeta> | ||
| 6 | |||
| 7 | <refnamediv> | ||
| 8 | <refname>VIDIOC_DV_TIMINGS_CAP</refname> | ||
| 9 | <refpurpose>The capabilities of the Digital Video receiver/transmitter</refpurpose> | ||
| 10 | </refnamediv> | ||
| 11 | |||
| 12 | <refsynopsisdiv> | ||
| 13 | <funcsynopsis> | ||
| 14 | <funcprototype> | ||
| 15 | <funcdef>int <function>ioctl</function></funcdef> | ||
| 16 | <paramdef>int <parameter>fd</parameter></paramdef> | ||
| 17 | <paramdef>int <parameter>request</parameter></paramdef> | ||
| 18 | <paramdef>struct v4l2_dv_timings_cap *<parameter>argp</parameter></paramdef> | ||
| 19 | </funcprototype> | ||
| 20 | </funcsynopsis> | ||
| 21 | </refsynopsisdiv> | ||
| 22 | |||
| 23 | <refsect1> | ||
| 24 | <title>Arguments</title> | ||
| 25 | |||
| 26 | <variablelist> | ||
| 27 | <varlistentry> | ||
| 28 | <term><parameter>fd</parameter></term> | ||
| 29 | <listitem> | ||
| 30 | <para>&fd;</para> | ||
| 31 | </listitem> | ||
| 32 | </varlistentry> | ||
| 33 | <varlistentry> | ||
| 34 | <term><parameter>request</parameter></term> | ||
| 35 | <listitem> | ||
| 36 | <para>VIDIOC_DV_TIMINGS_CAP</para> | ||
| 37 | </listitem> | ||
| 38 | </varlistentry> | ||
| 39 | <varlistentry> | ||
| 40 | <term><parameter>argp</parameter></term> | ||
| 41 | <listitem> | ||
| 42 | <para></para> | ||
| 43 | </listitem> | ||
| 44 | </varlistentry> | ||
| 45 | </variablelist> | ||
| 46 | </refsect1> | ||
| 47 | |||
| 48 | <refsect1> | ||
| 49 | <title>Description</title> | ||
| 50 | |||
| 51 | <note> | ||
| 52 | <title>Experimental</title> | ||
| 53 | <para>This is an <link linkend="experimental"> experimental </link> | ||
| 54 | interface and may change in the future.</para> | ||
| 55 | </note> | ||
| 56 | |||
| 57 | <para>To query the available timings, applications initialize the | ||
| 58 | <structfield>index</structfield> field and zero the reserved array of &v4l2-dv-timings-cap; | ||
| 59 | and call the <constant>VIDIOC_DV_TIMINGS_CAP</constant> ioctl with a pointer to this | ||
| 60 | structure. Drivers fill the rest of the structure or return an | ||
| 61 | &EINVAL; when the index is out of bounds. To enumerate all supported DV timings, | ||
| 62 | applications shall begin at index zero, incrementing by one until the | ||
| 63 | driver returns <errorcode>EINVAL</errorcode>. Note that drivers may enumerate a | ||
| 64 | different set of DV timings after switching the video input or | ||
| 65 | output.</para> | ||
| 66 | |||
| 67 | <table pgwide="1" frame="none" id="v4l2-bt-timings-cap"> | ||
| 68 | <title>struct <structname>v4l2_bt_timings_cap</structname></title> | ||
| 69 | <tgroup cols="3"> | ||
| 70 | &cs-str; | ||
| 71 | <tbody valign="top"> | ||
| 72 | <row> | ||
| 73 | <entry>__u32</entry> | ||
| 74 | <entry><structfield>min_width</structfield></entry> | ||
| 75 | <entry>Minimum width of the active video in pixels.</entry> | ||
| 76 | </row> | ||
| 77 | <row> | ||
| 78 | <entry>__u32</entry> | ||
| 79 | <entry><structfield>max_width</structfield></entry> | ||
| 80 | <entry>Maximum width of the active video in pixels.</entry> | ||
| 81 | </row> | ||
| 82 | <row> | ||
| 83 | <entry>__u32</entry> | ||
| 84 | <entry><structfield>min_height</structfield></entry> | ||
| 85 | <entry>Minimum height of the active video in lines.</entry> | ||
| 86 | </row> | ||
| 87 | <row> | ||
| 88 | <entry>__u32</entry> | ||
| 89 | <entry><structfield>max_height</structfield></entry> | ||
| 90 | <entry>Maximum height of the active video in lines.</entry> | ||
| 91 | </row> | ||
| 92 | <row> | ||
| 93 | <entry>__u64</entry> | ||
| 94 | <entry><structfield>min_pixelclock</structfield></entry> | ||
| 95 | <entry>Minimum pixelclock frequency in Hz.</entry> | ||
| 96 | </row> | ||
| 97 | <row> | ||
| 98 | <entry>__u64</entry> | ||
| 99 | <entry><structfield>max_pixelclock</structfield></entry> | ||
| 100 | <entry>Maximum pixelclock frequency in Hz.</entry> | ||
| 101 | </row> | ||
| 102 | <row> | ||
| 103 | <entry>__u32</entry> | ||
| 104 | <entry><structfield>standards</structfield></entry> | ||
| 105 | <entry>The video standard(s) supported by the hardware. | ||
| 106 | See <xref linkend="dv-bt-standards"/> for a list of standards.</entry> | ||
| 107 | </row> | ||
| 108 | <row> | ||
| 109 | <entry>__u32</entry> | ||
| 110 | <entry><structfield>capabilities</structfield></entry> | ||
| 111 | <entry>Several flags giving more information about the capabilities. | ||
| 112 | See <xref linkend="dv-bt-cap-capabilities"/> for a description of the flags. | ||
| 113 | </entry> | ||
| 114 | </row> | ||
| 115 | <row> | ||
| 116 | <entry>__u32</entry> | ||
| 117 | <entry><structfield>reserved</structfield>[16]</entry> | ||
| 118 | <entry></entry> | ||
| 119 | </row> | ||
| 120 | </tbody> | ||
| 121 | </tgroup> | ||
| 122 | </table> | ||
| 123 | |||
| 124 | <table pgwide="1" frame="none" id="v4l2-dv-timings-cap"> | ||
| 125 | <title>struct <structname>v4l2_dv_timings_cap</structname></title> | ||
| 126 | <tgroup cols="4"> | ||
| 127 | &cs-str; | ||
| 128 | <tbody valign="top"> | ||
| 129 | <row> | ||
| 130 | <entry>__u32</entry> | ||
| 131 | <entry><structfield>type</structfield></entry> | ||
| 132 | <entry>Type of DV timings as listed in <xref linkend="dv-timing-types"/>.</entry> | ||
| 133 | </row> | ||
| 134 | <row> | ||
| 135 | <entry>__u32</entry> | ||
| 136 | <entry><structfield>reserved</structfield>[3]</entry> | ||
| 137 | <entry>Reserved for future extensions. Drivers must set the array to zero.</entry> | ||
| 138 | </row> | ||
| 139 | <row> | ||
| 140 | <entry>union</entry> | ||
| 141 | <entry><structfield></structfield></entry> | ||
| 142 | <entry></entry> | ||
| 143 | </row> | ||
| 144 | <row> | ||
| 145 | <entry></entry> | ||
| 146 | <entry>&v4l2-bt-timings-cap;</entry> | ||
| 147 | <entry><structfield>bt</structfield></entry> | ||
| 148 | <entry>BT.656/1120 timings capabilities of the hardware.</entry> | ||
| 149 | </row> | ||
| 150 | <row> | ||
| 151 | <entry></entry> | ||
| 152 | <entry>__u32</entry> | ||
| 153 | <entry><structfield>raw_data</structfield>[32]</entry> | ||
| 154 | <entry></entry> | ||
| 155 | </row> | ||
| 156 | </tbody> | ||
| 157 | </tgroup> | ||
| 158 | </table> | ||
| 159 | |||
| 160 | <table pgwide="1" frame="none" id="dv-bt-cap-capabilities"> | ||
| 161 | <title>DV BT Timing capabilities</title> | ||
| 162 | <tgroup cols="2"> | ||
| 163 | &cs-str; | ||
| 164 | <tbody valign="top"> | ||
| 165 | <row> | ||
| 166 | <entry>Flag</entry> | ||
| 167 | <entry>Description</entry> | ||
| 168 | </row> | ||
| 169 | <row> | ||
| 170 | <entry></entry> | ||
| 171 | <entry></entry> | ||
| 172 | </row> | ||
| 173 | <row> | ||
| 174 | <entry>V4L2_DV_BT_CAP_INTERLACED</entry> | ||
| 175 | <entry>Interlaced formats are supported. | ||
| 176 | </entry> | ||
| 177 | </row> | ||
| 178 | <row> | ||
| 179 | <entry>V4L2_DV_BT_CAP_PROGRESSIVE</entry> | ||
| 180 | <entry>Progressive formats are supported. | ||
| 181 | </entry> | ||
| 182 | </row> | ||
| 183 | <row> | ||
| 184 | <entry>V4L2_DV_BT_CAP_REDUCED_BLANKING</entry> | ||
| 185 | <entry>CVT/GTF specific: the timings can make use of reduced blanking (CVT) | ||
| 186 | or the 'Secondary GTF' curve (GTF). | ||
| 187 | </entry> | ||
| 188 | </row> | ||
| 189 | <row> | ||
| 190 | <entry>V4L2_DV_BT_CAP_CUSTOM</entry> | ||
| 191 | <entry>Can support non-standard timings, i.e. timings not belonging to the | ||
| 192 | standards set in the <structfield>standards</structfield> field. | ||
| 193 | </entry> | ||
| 194 | </row> | ||
| 195 | </tbody> | ||
| 196 | </tgroup> | ||
| 197 | </table> | ||
| 198 | </refsect1> | ||
| 199 | |||
| 200 | <refsect1> | ||
| 201 | &return-value; | ||
| 202 | </refsect1> | ||
| 203 | </refentry> | ||
| 204 | |||
| 205 | <!-- | ||
| 206 | Local Variables: | ||
| 207 | mode: sgml | ||
| 208 | sgml-parent-document: "v4l2.sgml" | ||
| 209 | indent-tabs-mode: nil | ||
| 210 | End: | ||
| 211 | --> | ||
| @@ -48,6 +48,10 @@ · 47 unmodified lines | |||
| 48 | <refsect1> | 48 | <refsect1> |
| 49 | <title>Description</title> | 49 | <title>Description</title> |
| 50 | 50 | ||
| 51 | <para>This ioctl is <emphasis role="bold">deprecated</emphasis>. | ||
| 52 | New drivers and applications should use &VIDIOC-ENUM-DV-TIMINGS; instead. | ||
| 53 | </para> | ||
| 54 | |||
| 51 | <para>To query the attributes of a DV preset, applications initialize the | 55 | <para>To query the attributes of a DV preset, applications initialize the |
| 52 | <structfield>index</structfield> field and zero the reserved array of &v4l2-dv-enum-preset; | 56 | <structfield>index</structfield> field and zero the reserved array of &v4l2-dv-enum-preset; |
| 53 | and call the <constant>VIDIOC_ENUM_DV_PRESETS</constant> ioctl with a pointer to this | 57 | and call the <constant>VIDIOC_ENUM_DV_PRESETS</constant> ioctl with a pointer to this |
| @@ -0,0 +1,119 @@ | |||
| 1 | <refentry id="vidioc-enum-dv-timings"> | ||
| 2 | <refmeta> | ||
| 3 | <refentrytitle>ioctl VIDIOC_ENUM_DV_TIMINGS</refentrytitle> | ||
| 4 | &manvol; | ||
| 5 | </refmeta> | ||
| 6 | |||
| 7 | <refnamediv> | ||
| 8 | <refname>VIDIOC_ENUM_DV_TIMINGS</refname> | ||
| 9 | <refpurpose>Enumerate supported Digital Video timings</refpurpose> | ||
| 10 | </refnamediv> | ||
| 11 | |||
| 12 | <refsynopsisdiv> | ||
| 13 | <funcsynopsis> | ||
| 14 | <funcprototype> | ||
| 15 | <funcdef>int <function>ioctl</function></funcdef> | ||
| 16 | <paramdef>int <parameter>fd</parameter></paramdef> | ||
| 17 | <paramdef>int <parameter>request</parameter></paramdef> | ||
| 18 | <paramdef>struct v4l2_enum_dv_timings *<parameter>argp</parameter></paramdef> | ||
| 19 | </funcprototype> | ||
| 20 | </funcsynopsis> | ||
| 21 | </refsynopsisdiv> | ||
| 22 | |||
| 23 | <refsect1> | ||
| 24 | <title>Arguments</title> | ||
| 25 | |||
| 26 | <variablelist> | ||
| 27 | <varlistentry> | ||
| 28 | <term><parameter>fd</parameter></term> | ||
| 29 | <listitem> | ||
| 30 | <para>&fd;</para> | ||
| 31 | </listitem> | ||
| 32 | </varlistentry> | ||
| 33 | <varlistentry> | ||
| 34 | <term><parameter>request</parameter></term> | ||
| 35 | <listitem> | ||
| 36 | <para>VIDIOC_ENUM_DV_TIMINGS</para> | ||
| 37 | </listitem> | ||
| 38 | </varlistentry> | ||
| 39 | <varlistentry> | ||
| 40 | <term><parameter>argp</parameter></term> | ||
| 41 | <listitem> | ||
| 42 | <para></para> | ||
| 43 | </listitem> | ||
| 44 | </varlistentry> | ||
| 45 | </variablelist> | ||
| 46 | </refsect1> | ||
| 47 | |||
| 48 | <refsect1> | ||
| 49 | <title>Description</title> | ||
| 50 | |||
| 51 | <note> | ||
| 52 | <title>Experimental</title> | ||
| 53 | <para>This is an <link linkend="experimental"> experimental </link> | ||
| 54 | interface and may change in the future.</para> | ||
| 55 | </note> | ||
| 56 | |||
| 57 | <para>While some DV receivers or transmitters support a wide range of timings, others | ||
| 58 | support only a limited number of timings. With this ioctl applications can enumerate a list | ||
| 59 | of known supported timings. Call &VIDIOC-DV-TIMINGS-CAP; to check if it also supports other | ||
| 60 | standards or even custom timings that are not in this list.</para> | ||
| 61 | |||
| 62 | <para>To query the available timings, applications initialize the | ||
| 63 | <structfield>index</structfield> field and zero the reserved array of &v4l2-enum-dv-timings; | ||
| 64 | and call the <constant>VIDIOC_ENUM_DV_TIMINGS</constant> ioctl with a pointer to this | ||
| 65 | structure. Drivers fill the rest of the structure or return an | ||
| 66 | &EINVAL; when the index is out of bounds. To enumerate all supported DV timings, | ||
| 67 | applications shall begin at index zero, incrementing by one until the | ||
| 68 | driver returns <errorcode>EINVAL</errorcode>. Note that drivers may enumerate a | ||
| 69 | different set of DV timings after switching the video input or | ||
| 70 | output.</para> | ||
| 71 | |||
| 72 | <table pgwide="1" frame="none" id="v4l2-enum-dv-timings"> | ||
| 73 | <title>struct <structname>v4l2_enum_dv_timings</structname></title> | ||
| 74 | <tgroup cols="3"> | ||
| 75 | &cs-str; | ||
| 76 | <tbody valign="top"> | ||
| 77 | <row> | ||
| 78 | <entry>__u32</entry> | ||
| 79 | <entry><structfield>index</structfield></entry> | ||
| 80 | <entry>Number of the DV timings, set by the | ||
| 81 | application.</entry> | ||
| 82 | </row> | ||
| 83 | <row> | ||
| 84 | <entry>__u32</entry> | ||
| 85 | <entry><structfield>reserved</structfield>[3]</entry> | ||
| 86 | <entry>Reserved for future extensions. Drivers must set the array to zero.</entry> | ||
| 87 | </row> | ||
| 88 | <row> | ||
| 89 | <entry>&v4l2-dv-timings;</entry> | ||
| 90 | <entry><structfield>timings</structfield></entry> | ||
| 91 | <entry>The timings.</entry> | ||
| 92 | </row> | ||
| 93 | </tbody> | ||
| 94 | </tgroup> | ||
| 95 | </table> | ||
| 96 | </refsect1> | ||
| 97 | |||
| 98 | <refsect1> | ||
| 99 | &return-value; | ||
| 100 | |||
| 101 | <variablelist> | ||
| 102 | <varlistentry> | ||
| 103 | <term><errorcode>EINVAL</errorcode></term> | ||
| 104 | <listitem> | ||
| 105 | <para>The &v4l2-enum-dv-timings; <structfield>index</structfield> | ||
| 106 | is out of bounds.</para> | ||
| 107 | </listitem> | ||
| 108 | </varlistentry> | ||
| 109 | </variablelist> | ||
| 110 | </refsect1> | ||
| 111 | </refentry> | ||
| 112 | |||
| 113 | <!-- | ||
| 114 | Local Variables: | ||
| 115 | mode: sgml | ||
| 116 | sgml-parent-document: "v4l2.sgml" | ||
| 117 | indent-tabs-mode: nil | ||
| 118 | End: | ||
| 119 | --> | ||
| @@ -71,7 +71,7 @@ the application. This is in no way related to the <structfield> · 70 unmodified lines | |||
| 71 | pixelformat</structfield> field.</entry> | 71 | pixelformat</structfield> field.</entry> |
| 72 | </row> | 72 | </row> |
| 73 | <row> | 73 | <row> |
| 74 | <entry>&v4l2-buf-type;</entry> | 74 | <entry>__u32</entry> |
| 75 | <entry><structfield>type</structfield></entry> | 75 | <entry><structfield>type</structfield></entry> |
| 76 | <entry>Type of the data stream, set by the application. | 76 | <entry>Type of the data stream, set by the application. |
| 77 | Only these types are valid here: | 77 | Only these types are valid here: |
| @@ -81,7 +81,7 @@ Only these types are valid here: · 3 unmodified lines | |||
| 81 | <constant>V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE</constant>, | 81 | <constant>V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE</constant>, |
| 82 | <constant>V4L2_BUF_TYPE_VIDEO_OVERLAY</constant>, and custom (driver | 82 | <constant>V4L2_BUF_TYPE_VIDEO_OVERLAY</constant>, and custom (driver |
| 83 | defined) types with code <constant>V4L2_BUF_TYPE_PRIVATE</constant> | 83 | defined) types with code <constant>V4L2_BUF_TYPE_PRIVATE</constant> |
| 84 | and higher.</entry> | 84 | and higher. See <xref linkend="v4l2-buf-type" />.</entry> |
| 85 | </row> | 85 | </row> |
| 86 | <row> | 86 | <row> |
| 87 | <entry>__u32</entry> | 87 | <entry>__u32</entry> |
| @@ -285,7 +285,7 @@ input/output interface to linux-media@vger.kernel.org on 19 Oct 2009. · 284 unmodified lines | |||
| 285 | <row> | 285 | <row> |
| 286 | <entry><constant>V4L2_IN_CAP_CUSTOM_TIMINGS</constant></entry> | 286 | <entry><constant>V4L2_IN_CAP_CUSTOM_TIMINGS</constant></entry> |
| 287 | <entry>0x00000002</entry> | 287 | <entry>0x00000002</entry> |
| 288 | <entry>This input supports setting custom video timings by using VIDIOC_S_DV_TIMINGS.</entry> | 288 | <entry>This input supports setting video timings by using VIDIOC_S_DV_TIMINGS.</entry> |
| 289 | </row> | 289 | </row> |
| 290 | <row> | 290 | <row> |
| 291 | <entry><constant>V4L2_IN_CAP_STD</constant></entry> | 291 | <entry><constant>V4L2_IN_CAP_STD</constant></entry> |
| @@ -170,7 +170,7 @@ input/output interface to linux-media@vger.kernel.org on 19 Oct 2009. · 169 unmodified lines | |||
| 170 | <row> | 170 | <row> |
| 171 | <entry><constant>V4L2_OUT_CAP_CUSTOM_TIMINGS</constant></entry> | 171 | <entry><constant>V4L2_OUT_CAP_CUSTOM_TIMINGS</constant></entry> |
| 172 | <entry>0x00000002</entry> | 172 | <entry>0x00000002</entry> |
| 173 | <entry>This output supports setting custom video timings by using VIDIOC_S_DV_TIMINGS.</entry> | 173 | <entry>This output supports setting video timings by using VIDIOC_S_DV_TIMINGS.</entry> |
| 174 | </row> | 174 | </row> |
| 175 | <row> | 175 | <row> |
| 176 | <entry><constant>V4L2_OUT_CAP_STD</constant></entry> | 176 | <entry><constant>V4L2_OUT_CAP_STD</constant></entry> |
| @@ -100,14 +100,14 @@ changed and <constant>VIDIOC_S_CROP</constant> returns the · 99 unmodified lines | |||
| 100 | &cs-str; | 100 | &cs-str; |
| 101 | <tbody valign="top"> | 101 | <tbody valign="top"> |
| 102 | <row> | 102 | <row> |
| 103 | <entry>&v4l2-buf-type;</entry> | 103 | <entry>__u32</entry> |
| 104 | <entry><structfield>type</structfield></entry> | 104 | <entry><structfield>type</structfield></entry> |
| 105 | <entry>Type of the data stream, set by the application. | 105 | <entry>Type of the data stream, set by the application. |
| 106 | Only these types are valid here: <constant>V4L2_BUF_TYPE_VIDEO_CAPTURE</constant>, | 106 | Only these types are valid here: <constant>V4L2_BUF_TYPE_VIDEO_CAPTURE</constant>, |
| 107 | <constant>V4L2_BUF_TYPE_VIDEO_OUTPUT</constant>, | 107 | <constant>V4L2_BUF_TYPE_VIDEO_OUTPUT</constant>, |
| 108 | <constant>V4L2_BUF_TYPE_VIDEO_OVERLAY</constant>, and custom (driver | 108 | <constant>V4L2_BUF_TYPE_VIDEO_OVERLAY</constant>, and custom (driver |
| 109 | defined) types with code <constant>V4L2_BUF_TYPE_PRIVATE</constant> | 109 | defined) types with code <constant>V4L2_BUF_TYPE_PRIVATE</constant> |
| 110 | and higher.</entry> | 110 | and higher. See <xref linkend="v4l2-buf-type" />.</entry> |
| 111 | </row> | 111 | </row> |
| 112 | <row> | 112 | <row> |
| 113 | <entry>&v4l2-rect;</entry> | 113 | <entry>&v4l2-rect;</entry> |
| @@ -48,6 +48,12 @@ · 47 unmodified lines | |||
| 48 | 48 | ||
| 49 | <refsect1> | 49 | <refsect1> |
| 50 | <title>Description</title> | 50 | <title>Description</title> |
| 51 | |||
| 52 | <para>These ioctls are <emphasis role="bold">deprecated</emphasis>. | ||
| 53 | New drivers and applications should use &VIDIOC-G-DV-TIMINGS; and &VIDIOC-S-DV-TIMINGS; | ||
| 54 | instead. | ||
| 55 | </para> | ||
| 56 | |||
| 51 | <para>To query and select the current DV preset, applications | 57 | <para>To query and select the current DV preset, applications |
| 52 | use the <constant>VIDIOC_G_DV_PRESET</constant> and <constant>VIDIOC_S_DV_PRESET</constant> | 58 | use the <constant>VIDIOC_G_DV_PRESET</constant> and <constant>VIDIOC_S_DV_PRESET</constant> |
| 53 | ioctls which take a pointer to a &v4l2-dv-preset; type as argument. | 59 | ioctls which take a pointer to a &v4l2-dv-preset; type as argument. |
| @@ -7,7 +7,7 @@ · 6 unmodified lines | |||
| 7 | <refnamediv> | 7 | <refnamediv> |
| 8 | <refname>VIDIOC_G_DV_TIMINGS</refname> | 8 | <refname>VIDIOC_G_DV_TIMINGS</refname> |
| 9 | <refname>VIDIOC_S_DV_TIMINGS</refname> | 9 | <refname>VIDIOC_S_DV_TIMINGS</refname> |
| 10 | <refpurpose>Get or set custom DV timings for input or output</refpurpose> | 10 | <refpurpose>Get or set DV timings for input or output</refpurpose> |
| 11 | </refnamediv> | 11 | </refnamediv> |
| 12 | 12 | ||
| 13 | <refsynopsisdiv> | 13 | <refsynopsisdiv> |
| @@ -48,12 +48,15 @@ · 34 unmodified lines | |||
| 48 | 48 | ||
| 49 | <refsect1> | 49 | <refsect1> |
| 50 | <title>Description</title> | 50 | <title>Description</title> |
| 51 | <para>To set custom DV timings for the input or output, applications use the | 51 | <para>To set DV timings for the input or output, applications use the |
| 52 | <constant>VIDIOC_S_DV_TIMINGS</constant> ioctl and to get the current custom timings, | 52 | <constant>VIDIOC_S_DV_TIMINGS</constant> ioctl and to get the current timings, |
| 53 | applications use the <constant>VIDIOC_G_DV_TIMINGS</constant> ioctl. The detailed timing | 53 | applications use the <constant>VIDIOC_G_DV_TIMINGS</constant> ioctl. The detailed timing |
| 54 | information is filled in using the structure &v4l2-dv-timings;. These ioctls take | 54 | information is filled in using the structure &v4l2-dv-timings;. These ioctls take |
| 55 | a pointer to the &v4l2-dv-timings; structure as argument. If the ioctl is not supported | 55 | a pointer to the &v4l2-dv-timings; structure as argument. If the ioctl is not supported |
| 56 | or the timing values are not correct, the driver returns &EINVAL;.</para> | 56 | or the timing values are not correct, the driver returns &EINVAL;.</para> |
| 57 | <para>The <filename>linux/v4l2-dv-timings.h</filename> header can be used to get the | ||
| 58 | timings of the formats in the <xref linkend="cea861" /> and <xref linkend="vesadmt" /> | ||
| 59 | standards.</para> | ||
| 57 | </refsect1> | 60 | </refsect1> |
| 58 | 61 | ||
| 59 | <refsect1> | 62 | <refsect1> |
| @@ -83,12 +86,13 @@ or the timing values are not correct, the driver returns &EINVAL;.</para> · 23 unmodified lines | |||
| 83 | <row> | 86 | <row> |
| 84 | <entry>__u32</entry> | 87 | <entry>__u32</entry> |
| 85 | <entry><structfield>width</structfield></entry> | 88 | <entry><structfield>width</structfield></entry> |
| 86 | <entry>Width of the active video in pixels</entry> | 89 | <entry>Width of the active video in pixels.</entry> |
| 87 | </row> | 90 | </row> |
| 88 | <row> | 91 | <row> |
| 89 | <entry>__u32</entry> | 92 | <entry>__u32</entry> |
| 90 | <entry><structfield>height</structfield></entry> | 93 | <entry><structfield>height</structfield></entry> |
| 91 | <entry>Height of the active video in lines</entry> | 94 | <entry>Height of the active video frame in lines. So for interlaced formats the |
| 95 | height of the active video in each field is <structfield>height</structfield>/2.</entry> | ||
| 92 | </row> | 96 | </row> |
| 93 | <row> | 97 | <row> |
| 94 | <entry>__u32</entry> | 98 | <entry>__u32</entry> |
| @@ -125,32 +129,52 @@ bit 0 (V4L2_DV_VSYNC_POS_POL) is for vertical sync polarity and bit 1 (V4L2_DV_H · 30 unmodified lines | |||
| 125 | <row> | 129 | <row> |
| 126 | <entry>__u32</entry> | 130 | <entry>__u32</entry> |
| 127 | <entry><structfield>vfrontporch</structfield></entry> | 131 | <entry><structfield>vfrontporch</structfield></entry> |
| 128 | <entry>Vertical front porch in lines</entry> | 132 | <entry>Vertical front porch in lines. For interlaced formats this refers to the |
| 133 | odd field (aka field 1).</entry> | ||
| 129 | </row> | 134 | </row> |
| 130 | <row> | 135 | <row> |
| 131 | <entry>__u32</entry> | 136 | <entry>__u32</entry> |
| 132 | <entry><structfield>vsync</structfield></entry> | 137 | <entry><structfield>vsync</structfield></entry> |
| 133 | <entry>Vertical sync length in lines</entry> | 138 | <entry>Vertical sync length in lines. For interlaced formats this refers to the |
| 139 | odd field (aka field 1).</entry> | ||
| 134 | </row> | 140 | </row> |
| 135 | <row> | 141 | <row> |
| 136 | <entry>__u32</entry> | 142 | <entry>__u32</entry> |
| 137 | <entry><structfield>vbackporch</structfield></entry> | 143 | <entry><structfield>vbackporch</structfield></entry> |
| 138 | <entry>Vertical back porch in lines</entry> | 144 | <entry>Vertical back porch in lines. For interlaced formats this refers to the |
| 145 | odd field (aka field 1).</entry> | ||
| 139 | </row> | 146 | </row> |
| 140 | <row> | 147 | <row> |
| 141 | <entry>__u32</entry> | 148 | <entry>__u32</entry> |
| 142 | <entry><structfield>il_vfrontporch</structfield></entry> | 149 | <entry><structfield>il_vfrontporch</structfield></entry> |
| 143 | <entry>Vertical front porch in lines for bottom field of interlaced field formats</entry> | 150 | <entry>Vertical front porch in lines for the even field (aka field 2) of |
| 151 | interlaced field formats.</entry> | ||
| 144 | </row> | 152 | </row> |
| 145 | <row> | 153 | <row> |
| 146 | <entry>__u32</entry> | 154 | <entry>__u32</entry> |
| 147 | <entry><structfield>il_vsync</structfield></entry> | 155 | <entry><structfield>il_vsync</structfield></entry> |
| 148 | <entry>Vertical sync length in lines for bottom field of interlaced field formats</entry> | 156 | <entry>Vertical sync length in lines for the even field (aka field 2) of |
| 157 | interlaced field formats.</entry> | ||
| 149 | </row> | 158 | </row> |
| 150 | <row> | 159 | <row> |
| 151 | <entry>__u32</entry> | 160 | <entry>__u32</entry> |
| 152 | <entry><structfield>il_vbackporch</structfield></entry> | 161 | <entry><structfield>il_vbackporch</structfield></entry> |
| 153 | <entry>Vertical back porch in lines for bottom field of interlaced field formats</entry> | 162 | <entry>Vertical back porch in lines for the even field (aka field 2) of |
| 163 | interlaced field formats.</entry> | ||
| 164 | </row> | ||
| 165 | <row> | ||
| 166 | <entry>__u32</entry> | ||
| 167 | <entry><structfield>standards</structfield></entry> | ||
| 168 | <entry>The video standard(s) this format belongs to. This will be filled in by | ||
| 169 | the driver. Applications must set this to 0. See <xref linkend="dv-bt-standards"/> | ||
| 170 | for a list of standards.</entry> | ||
| 171 | </row> | ||
| 172 | <row> | ||
| 173 | <entry>__u32</entry> | ||
| 174 | <entry><structfield>flags</structfield></entry> | ||
| 175 | <entry>Several flags giving more information about the format. | ||
| 176 | See <xref linkend="dv-bt-flags"/> for a description of the flags. | ||
| 177 | </entry> | ||
| 154 | </row> | 178 | </row> |
| 155 | </tbody> | 179 | </tbody> |
| 156 | </tgroup> | 180 | </tgroup> |
| @@ -211,6 +235,90 @@ bit 0 (V4L2_DV_VSYNC_POS_POL) is for vertical sync polarity and bit 1 (V4L2_DV_H · 54 unmodified lines | |||
| 211 | </tbody> | 235 | </tbody> |
| 212 | </tgroup> | 236 | </tgroup> |
| 213 | </table> | 237 | </table> |
| 238 | <table pgwide="1" frame="none" id="dv-bt-standards"> | ||
| 239 | <title>DV BT Timing standards</title> | ||
| 240 | <tgroup cols="2"> | ||
| 241 | &cs-str; | ||
| 242 | <tbody valign="top"> | ||
| 243 | <row> | ||
| 244 | <entry>Timing standard</entry> | ||
| 245 | <entry>Description</entry> | ||
| 246 | </row> | ||
| 247 | <row> | ||
| 248 | <entry></entry> | ||
| 249 | <entry></entry> | ||
| 250 | </row> | ||
| 251 | <row> | ||
| 252 | <entry>V4L2_DV_BT_STD_CEA861</entry> | ||
| 253 | <entry>The timings follow the CEA-861 Digital TV Profile standard</entry> | ||
| 254 | </row> | ||
| 255 | <row> | ||
| 256 | <entry>V4L2_DV_BT_STD_DMT</entry> | ||
| 257 | <entry>The timings follow the VESA Discrete Monitor Timings standard</entry> | ||
| 258 | </row> | ||
| 259 | <row> | ||
| 260 | <entry>V4L2_DV_BT_STD_CVT</entry> | ||
| 261 | <entry>The timings follow the VESA Coordinated Video Timings standard</entry> | ||
| 262 | </row> | ||
| 263 | <row> | ||
| 264 | <entry>V4L2_DV_BT_STD_GTF</entry> | ||
| 265 | <entry>The timings follow the VESA Generalized Timings Formula standard</entry> | ||
| 266 | </row> | ||
| 267 | </tbody> | ||
| 268 | </tgroup> | ||
| 269 | </table> | ||
| 270 | <table pgwide="1" frame="none" id="dv-bt-flags"> | ||
| 271 | <title>DV BT Timing flags</title> | ||
| 272 | <tgroup cols="2"> | ||
| 273 | &cs-str; | ||
| 274 | <tbody valign="top"> | ||
| 275 | <row> | ||
| 276 | <entry>Flag</entry> | ||
| 277 | <entry>Description</entry> | ||
| 278 | </row> | ||
| 279 | <row> | ||
| 280 | <entry></entry> | ||
| 281 | <entry></entry> | ||
| 282 | </row> | ||
| 283 | <row> | ||
| 284 | <entry>V4L2_DV_FL_REDUCED_BLANKING</entry> | ||
| 285 | <entry>CVT/GTF specific: the timings use reduced blanking (CVT) or the 'Secondary | ||
| 286 | GTF' curve (GTF). In both cases the horizontal and/or vertical blanking | ||
| 287 | intervals are reduced, allowing a higher resolution over the same | ||
| 288 | bandwidth. This is a read-only flag, applications must not set this. | ||
| 289 | </entry> | ||
| 290 | </row> | ||
| 291 | <row> | ||
| 292 | <entry>V4L2_DV_FL_CAN_REDUCE_FPS</entry> | ||
| 293 | <entry>CEA-861 specific: set for CEA-861 formats with a framerate that is a multiple | ||
| 294 | of six. These formats can be optionally played at 1 / 1.001 speed to | ||
| 295 | be compatible with 60 Hz based standards such as NTSC and PAL-M that use a framerate of | ||
| 296 | 29.97 frames per second. If the transmitter can't generate such frequencies, then the | ||
| 297 | flag will also be cleared. This is a read-only flag, applications must not set this. | ||
| 298 | </entry> | ||
| 299 | </row> | ||
| 300 | <row> | ||
| 301 | <entry>V4L2_DV_FL_REDUCED_FPS</entry> | ||
| 302 | <entry>CEA-861 specific: only valid for video transmitters, the flag is cleared | ||
| 303 | by receivers. It is also only valid for formats with the V4L2_DV_FL_CAN_REDUCE_FPS flag | ||
| 304 | set, for other formats the flag will be cleared by the driver. | ||
| 305 | |||
| 306 | If the application sets this flag, then the pixelclock used to set up the transmitter is | ||
| 307 | divided by 1.001 to make it compatible with NTSC framerates. If the transmitter | ||
| 308 | can't generate such frequencies, then the flag will also be cleared. | ||
| 309 | </entry> | ||
| 310 | </row> | ||
| 311 | <row> | ||
| 312 | <entry>V4L2_DV_FL_HALF_LINE</entry> | ||
| 313 | <entry>Specific to interlaced formats: if set, then field 1 (aka the odd field) | ||
| 314 | is really one half-line longer and field 2 (aka the even field) is really one half-line | ||
| 315 | shorter, so each field has exactly the same number of half-lines. Whether half-lines can be | ||
| 316 | detected or used depends on the hardware. | ||
| 317 | </entry> | ||
| 318 | </row> | ||
| 319 | </tbody> | ||
| 320 | </tgroup> | ||
| 321 | </table> | ||
| 214 | </refsect1> | 322 | </refsect1> |
| 215 | <refsect1> | 323 | <refsect1> |
| 216 | &return-value; | 324 | &return-value; |
| @@ -265,6 +265,32 @@ These controls are described in <xref · 264 unmodified lines | |||
| 265 | These controls are described in <xref | 265 | These controls are described in <xref |
| 266 | linkend="flash-controls" />.</entry> | 266 | linkend="flash-controls" />.</entry> |
| 267 | </row> | 267 | </row> |
| 268 | <row> | ||
| 269 | <entry><constant>V4L2_CTRL_CLASS_JPEG</constant></entry> | ||
| 270 | <entry>0x9d0000</entry> | ||
| 271 | <entry>The class containing JPEG compression controls. | ||
| 272 | These controls are described in <xref | ||
| 273 | linkend="jpeg-controls" />.</entry> | ||
| 274 | </row> | ||
| 275 | <row> | ||
| 276 | <entry><constant>V4L2_CTRL_CLASS_IMAGE_SOURCE</constant></entry> | ||
| 277 | <entry>0x9e0000</entry> <entry>The class containing image | ||
| 278 | source controls. These controls are described in <xref | ||
| 279 | linkend="image-source-controls" />.</entry> | ||
| 280 | </row> | ||
| 281 | <row> | ||
| 282 | <entry><constant>V4L2_CTRL_CLASS_IMAGE_PROC</constant></entry> | ||
| 283 | <entry>0x9f0000</entry> <entry>The class containing image | ||
| 284 | processing controls. These controls are described in <xref | ||
| 285 | linkend="image-process-controls" />.</entry> | ||
| 286 | </row> | ||
| 287 | <row> | ||
| 288 | <entry><constant>V4L2_CTRL_CLASS_JPEG</constant></entry> | ||
| 289 | <entry>0x9d0000</entry> | ||
| 290 | <entry>The class containing JPEG compression controls. | ||
| 291 | These controls are described in <xref | ||
| 292 | linkend="jpeg-controls" />.</entry> | ||
| 293 | </row> | ||
| 268 | </tbody> | 294 | </tbody> |
| 269 | </tgroup> | 295 | </tgroup> |
| 270 | </table> | 296 | </table> |
| @@ -116,7 +116,7 @@ this ioctl.</para> · 115 unmodified lines | |||
| 116 | <colspec colname="c4" /> | 116 | <colspec colname="c4" /> |
| 117 | <tbody valign="top"> | 117 | <tbody valign="top"> |
| 118 | <row> | 118 | <row> |
| 119 | <entry>&v4l2-buf-type;</entry> | 119 | <entry>__u32</entry> |
| 120 | <entry><structfield>type</structfield></entry> | 120 | <entry><structfield>type</structfield></entry> |
| 121 | <entry></entry> | 121 | <entry></entry> |
| 122 | <entry>Type of the data stream, see <xref | 122 | <entry>Type of the data stream, see <xref |
| @@ -95,14 +95,14 @@ the &v4l2-output; <structfield>modulator</structfield> field and the · 94 unmodified lines | |||
| 95 | &v4l2-modulator; <structfield>index</structfield> field.</entry> | 95 | &v4l2-modulator; <structfield>index</structfield> field.</entry> |
| 96 | </row> | 96 | </row> |
| 97 | <row> | 97 | <row> |
| 98 | <entry>&v4l2-tuner-type;</entry> | 98 | <entry>__u32</entry> |
| 99 | <entry><structfield>type</structfield></entry> | 99 | <entry><structfield>type</structfield></entry> |
| 100 | <entry>The tuner type. This is the same value as in the | 100 | <entry>The tuner type. This is the same value as in the |
| 101 | &v4l2-tuner; <structfield>type</structfield> field. The type must be set | 101 | &v4l2-tuner; <structfield>type</structfield> field. See The type must be set |
| 102 | to <constant>V4L2_TUNER_RADIO</constant> for <filename>/dev/radioX</filename> | 102 | to <constant>V4L2_TUNER_RADIO</constant> for <filename>/dev/radioX</filename> |
| 103 | device nodes, and to <constant>V4L2_TUNER_ANALOG_TV</constant> | 103 | device nodes, and to <constant>V4L2_TUNER_ANALOG_TV</constant> |
| 104 | for all others. The field is not applicable to modulators, &ie; ignored | 104 | for all others. The field is not applicable to modulators, &ie; ignored |
| 105 | by drivers.</entry> | 105 | by drivers. See <xref linkend="v4l2-tuner-type" /></entry> |
| 106 | </row> | 106 | </row> |
| 107 | <row> | 107 | <row> |
| 108 | <entry>__u32</entry> | 108 | <entry>__u32</entry> |
| @@ -75,11 +75,12 @@ devices.</para> · 74 unmodified lines | |||
| 75 | &cs-ustr; | 75 | &cs-ustr; |
| 76 | <tbody valign="top"> | 76 | <tbody valign="top"> |
| 77 | <row> | 77 | <row> |
| 78 | <entry>&v4l2-buf-type;</entry> | 78 | <entry>__u32</entry> |
| 79 | <entry><structfield>type</structfield></entry> | 79 | <entry><structfield>type</structfield></entry> |
| 80 | <entry></entry> | 80 | <entry></entry> |
| 81 | <entry>The buffer (stream) type, same as &v4l2-format; | 81 | <entry>The buffer (stream) type, same as &v4l2-format; |
| 82 | <structfield>type</structfield>, set by the application.</entry> | 82 | <structfield>type</structfield>, set by the application. See <xref |
| 83 | linkend="v4l2-buf-type" /></entry> | ||
| 83 | </row> | 84 | </row> |
| 84 | <row> | 85 | <row> |
| 85 | <entry>union</entry> | 86 | <entry>union</entry> |
| @@ -148,7 +148,7 @@ using the &VIDIOC-S-FMT; ioctl as described in <xref · 147 unmodified lines | |||
| 148 | <structfield>service_lines</structfield>[1][0] to zero.</entry> | 148 | <structfield>service_lines</structfield>[1][0] to zero.</entry> |
| 149 | </row> | 149 | </row> |
| 150 | <row> | 150 | <row> |
| 151 | <entry>&v4l2-buf-type;</entry> | 151 | <entry>__u32</entry> |
| 152 | <entry><structfield>type</structfield></entry> | 152 | <entry><structfield>type</structfield></entry> |
| 153 | <entry>Type of the data stream, see <xref | 153 | <entry>Type of the data stream, see <xref |
| 154 | linkend="v4l2-buf-type" />. Should be | 154 | linkend="v4l2-buf-type" />. Should be |
| @@ -107,7 +107,7 @@ user.<!-- FIXME Video inputs already have a name, the purpose of this · 106 unmodified lines | |||
| 107 | field is not quite clear.--></para></entry> | 107 | field is not quite clear.--></para></entry> |
| 108 | </row> | 108 | </row> |
| 109 | <row> | 109 | <row> |
| 110 | <entry>&v4l2-tuner-type;</entry> | 110 | <entry>__u32</entry> |
| 111 | <entry><structfield>type</structfield></entry> | 111 | <entry><structfield>type</structfield></entry> |
| 112 | <entry spanname="hspan">Type of the tuner, see <xref | 112 | <entry spanname="hspan">Type of the tuner, see <xref |
| 113 | linkend="v4l2-tuner-type" />.</entry> | 113 | linkend="v4l2-tuner-type" />.</entry> |
| @@ -48,6 +48,12 @@ · 47 unmodified lines | |||
| 48 | <refsect1> | 48 | <refsect1> |
| 49 | <title>Description</title> | 49 | <title>Description</title> |
| 50 | 50 | ||
| 51 | <note> | ||
| 52 | <title>Experimental</title> | ||
| 53 | <para>This is an <link linkend="experimental"> experimental </link> | ||
| 54 | interface and may change in the future.</para> | ||
| 55 | </note> | ||
| 56 | |||
| 51 | <para>Applications can optionally call the | 57 | <para>Applications can optionally call the |
| 52 | <constant>VIDIOC_PREPARE_BUF</constant> ioctl to pass ownership of the buffer | 58 | <constant>VIDIOC_PREPARE_BUF</constant> ioctl to pass ownership of the buffer |
| 53 | to the driver before actually enqueuing it, using the | 59 | to the driver before actually enqueuing it, using the |
| @@ -49,6 +49,10 @@ input</refpurpose> · 48 unmodified lines | |||
| 49 | <refsect1> | 49 | <refsect1> |
| 50 | <title>Description</title> | 50 | <title>Description</title> |
| 51 | 51 | ||
| 52 | <para>This ioctl is <emphasis role="bold">deprecated</emphasis>. | ||
| 53 | New drivers and applications should use &VIDIOC-QUERY-DV-TIMINGS; instead. | ||
| 54 | </para> | ||
| 55 | |||
| 52 | <para>The hardware may be able to detect the current DV preset | 56 | <para>The hardware may be able to detect the current DV preset |
| 53 | automatically, similar to sensing the video standard. To do so, applications | 57 | automatically, similar to sensing the video standard. To do so, applications |
| 54 | call <constant> VIDIOC_QUERY_DV_PRESET</constant> with a pointer to a | 58 | call <constant> VIDIOC_QUERY_DV_PRESET</constant> with a pointer to a |
| @@ -0,0 +1,104 @@ | |||
| 1 | <refentry id="vidioc-query-dv-timings"> | ||
| 2 | <refmeta> | ||
| 3 | <refentrytitle>ioctl VIDIOC_QUERY_DV_TIMINGS</refentrytitle> | ||
| 4 | &manvol; | ||
| 5 | </refmeta> | ||
| 6 | |||
| 7 | <refnamediv> | ||
| 8 | <refname>VIDIOC_QUERY_DV_TIMINGS</refname> | ||
| 9 | <refpurpose>Sense the DV preset received by the current | ||
| 10 | input</refpurpose> | ||
| 11 | </refnamediv> | ||
| 12 | |||
| 13 | <refsynopsisdiv> | ||
| 14 | <funcsynopsis> | ||
| 15 | <funcprototype> | ||
| 16 | <funcdef>int <function>ioctl</function></funcdef> | ||
| 17 | <paramdef>int <parameter>fd</parameter></paramdef> | ||
| 18 | <paramdef>int <parameter>request</parameter></paramdef> | ||
| 19 | <paramdef>struct v4l2_dv_timings *<parameter>argp</parameter></paramdef> | ||
| 20 | </funcprototype> | ||
| 21 | </funcsynopsis> | ||
| 22 | </refsynopsisdiv> | ||
| 23 | |||
| 24 | <refsect1> | ||
| 25 | <title>Arguments</title> | ||
| 26 | |||
| 27 | <variablelist> | ||
| 28 | <varlistentry> | ||
| 29 | <term><parameter>fd</parameter></term> | ||
| 30 | <listitem> | ||
| 31 | <para>&fd;</para> | ||
| 32 | </listitem> | ||
| 33 | </varlistentry> | ||
| 34 | <varlistentry> | ||
| 35 | <term><parameter>request</parameter></term> | ||
| 36 | <listitem> | ||
| 37 | <para>VIDIOC_QUERY_DV_TIMINGS</para> | ||
| 38 | </listitem> | ||
| 39 | </varlistentry> | ||
| 40 | <varlistentry> | ||
| 41 | <term><parameter>argp</parameter></term> | ||
| 42 | <listitem> | ||
| 43 | <para></para> | ||
| 44 | </listitem> | ||
| 45 | </varlistentry> | ||
| 46 | </variablelist> | ||
| 47 | </refsect1> | ||
| 48 | |||
| 49 | <refsect1> | ||
| 50 | <title>Description</title> | ||
| 51 | |||
| 52 | <note> | ||
| 53 | <title>Experimental</title> | ||
| 54 | <para>This is an <link linkend="experimental"> experimental </link> | ||
| 55 | interface and may change in the future.</para> | ||
| 56 | </note> | ||
| 57 | |||
| 58 | <para>The hardware may be able to detect the current DV timings | ||
| 59 | automatically, similar to sensing the video standard. To do so, applications | ||
| 60 | call <constant>VIDIOC_QUERY_DV_TIMINGS</constant> with a pointer to a | ||
| 61 | &v4l2-dv-timings;. Once the hardware detects the timings, it will fill in the | ||
| 62 | timings structure. | ||
| 63 | |||
| 64 | If the timings could not be detected because there was no signal, then | ||
| 65 | <errorcode>ENOLINK</errorcode> is returned. If a signal was detected, but | ||
| 66 | it was unstable and the receiver could not lock to the signal, then | ||
| 67 | <errorcode>ENOLCK</errorcode> is returned. If the receiver could lock to the signal, | ||
| 68 | but the format is unsupported (e.g. because the pixelclock is out of range | ||
| 69 | of the hardware capabilities), then the driver fills in whatever timings it | ||
| 70 | could find and returns <errorcode>ERANGE</errorcode>. In that case the application | ||
| 71 | can call &VIDIOC-DV-TIMINGS-CAP; to compare the found timings with the hardware's | ||
| 72 | capabilities in order to give more precise feedback to the user. | ||
| 73 | </para> | ||
| 74 | </refsect1> | ||
| 75 | |||
| 76 | <refsect1> | ||
| 77 | &return-value; | ||
| 78 | |||
| 79 | <variablelist> | ||
| 80 | <varlistentry> | ||
| 81 | <term><errorcode>ENOLINK</errorcode></term> | ||
| 82 | <listitem> | ||
| 83 | <para>No timings could be detected because no signal was found. | ||
| 84 | </para> | ||
| 85 | </listitem> | ||
| 86 | </varlistentry> | ||
| 87 | <varlistentry> | ||
| 88 | <term><errorcode>ENOLCK</errorcode></term> | ||
| 89 | <listitem> | ||
| 90 | <para>The signal was unstable and the hardware could not lock on to it. | ||
| 91 | </para> | ||
| 92 | </listitem> | ||
| 93 | </varlistentry> | ||
| 94 | <varlistentry> | ||
| 95 | <term><errorcode>ERANGE</errorcode></term> | ||
| 96 | <listitem> | ||
| 97 | <para>Timings were found, but they are out of range of the hardware | ||
| 98 | capabilities. | ||
| 99 | </para> | ||
| 100 | </listitem> | ||
| 101 | </varlistentry> | ||
| 102 | </variablelist> | ||
| 103 | </refsect1> | ||
| 104 | </refentry> | ||
| @@ -127,7 +127,7 @@ the first control with a higher ID. Drivers which do not support this · 126 unmodified lines | |||
| 127 | flag yet always return an &EINVAL;.</entry> | 127 | flag yet always return an &EINVAL;.</entry> |
| 128 | </row> | 128 | </row> |
| 129 | <row> | 129 | <row> |
| 130 | <entry>&v4l2-ctrl-type;</entry> | 130 | <entry>__u32</entry> |
| 131 | <entry><structfield>type</structfield></entry> | 131 | <entry><structfield>type</structfield></entry> |
| 132 | <entry>Type of control, see <xref | 132 | <entry>Type of control, see <xref |
| 133 | linkend="v4l2-ctrl-type" />.</entry> | 133 | linkend="v4l2-ctrl-type" />.</entry> |
| @@ -215,11 +215,12 @@ the array to zero.</entry> · 81 unmodified lines | |||
| 215 | 215 | ||
| 216 | <table pgwide="1" frame="none" id="v4l2-querymenu"> | 216 | <table pgwide="1" frame="none" id="v4l2-querymenu"> |
| 217 | <title>struct <structname>v4l2_querymenu</structname></title> | 217 | <title>struct <structname>v4l2_querymenu</structname></title> |
| 218 | <tgroup cols="3"> | 218 | <tgroup cols="4"> |
| 219 | &cs-str; | 219 | &cs-str; |
| 220 | <tbody valign="top"> | 220 | <tbody valign="top"> |
| 221 | <row> | 221 | <row> |
| 222 | <entry>__u32</entry> | 222 | <entry>__u32</entry> |
| 223 | <entry></entry> | ||
| 223 | <entry><structfield>id</structfield></entry> | 224 | <entry><structfield>id</structfield></entry> |
| 224 | <entry>Identifies the control, set by the application | 225 | <entry>Identifies the control, set by the application |
| 225 | from the respective &v4l2-queryctrl; | 226 | from the respective &v4l2-queryctrl; |
| @@ -227,18 +228,38 @@ from the respective &v4l2-queryctrl; · 1 unmodified line | |||
| 227 | </row> | 228 | </row> |
| 228 | <row> | 229 | <row> |
| 229 | <entry>__u32</entry> | 230 | <entry>__u32</entry> |
| 231 | <entry></entry> | ||
| 230 | <entry><structfield>index</structfield></entry> | 232 | <entry><structfield>index</structfield></entry> |
| 231 | <entry>Index of the menu item, starting at zero, set by | 233 | <entry>Index of the menu item, starting at zero, set by |
| 232 | the application.</entry> | 234 | the application.</entry> |
| 233 | </row> | 235 | </row> |
| 234 | <row> | 236 | <row> |
| 237 | <entry>union</entry> | ||
| 238 | <entry></entry> | ||
| 239 | <entry></entry> | ||
| 240 | <entry></entry> | ||
| 241 | </row> | ||
| 242 | <row> | ||
| 243 | <entry></entry> | ||
| 235 | <entry>__u8</entry> | 244 | <entry>__u8</entry> |
| 236 | <entry><structfield>name</structfield>[32]</entry> | 245 | <entry><structfield>name</structfield>[32]</entry> |
| 237 | <entry>Name of the menu item, a NUL-terminated ASCII | 246 | <entry>Name of the menu item, a NUL-terminated ASCII |
| 238 | string. This information is intended for the user.</entry> | 247 | string. This information is intended for the user. This field is valid |
| 248 | for <constant>V4L2_CTRL_FLAG_MENU</constant> type controls.</entry> | ||
| 249 | </row> | ||
| 250 | <row> | ||
| 251 | <entry></entry> | ||
| 252 | <entry>__s64</entry> | ||
| 253 | <entry><structfield>value</structfield></entry> | ||
| 254 | <entry> | ||
| 255 | Value of the integer menu item. This field is valid for | ||
| 256 | <constant>V4L2_CTRL_FLAG_INTEGER_MENU</constant> type | ||
| 257 | controls. | ||
| 258 | </entry> | ||
| 239 | </row> | 259 | </row> |
| 240 | <row> | 260 | <row> |
| 241 | <entry>__u32</entry> | 261 | <entry>__u32</entry> |
| 262 | <entry></entry> | ||
| 242 | <entry><structfield>reserved</structfield></entry> | 263 | <entry><structfield>reserved</structfield></entry> |
| 243 | <entry>Reserved for future extensions. Drivers must set | 264 | <entry>Reserved for future extensions. Drivers must set |
| 244 | the array to zero.</entry> | 265 | the array to zero.</entry> |
| @@ -291,6 +312,20 @@ values which are actually different on the hardware.</entry> · 46 unmodified lines | |||
| 291 | the menu items can be enumerated with the | 312 | the menu items can be enumerated with the |
| 292 | <constant>VIDIOC_QUERYMENU</constant> ioctl.</entry> | 313 | <constant>VIDIOC_QUERYMENU</constant> ioctl.</entry> |
| 293 | </row> | 314 | </row> |
| 315 | <row> | ||
| 316 | <entry><constant>V4L2_CTRL_TYPE_INTEGER_MENU</constant></entry> | ||
| 317 | <entry>≥ 0</entry> | ||
| 318 | <entry>1</entry> | ||
| 319 | <entry>N-1</entry> | ||
| 320 | <entry> | ||
| 321 | The control has a menu of N choices. The values of the | ||
| 322 | menu items can be enumerated with the | ||
| 323 | <constant>VIDIOC_QUERYMENU</constant> ioctl. This is | ||
| 324 | similar to <constant>V4L2_CTRL_TYPE_MENU</constant> | ||
| 325 | except that instead of strings, the menu items are | ||
| 326 | signed 64-bit integers. | ||
| 327 | </entry> | ||
| 328 | </row> | ||
| 294 | <row> | 329 | <row> |
| 295 | <entry><constant>V4L2_CTRL_TYPE_BITMASK</constant></entry> | 330 | <entry><constant>V4L2_CTRL_TYPE_BITMASK</constant></entry> |
| 296 | <entry>0</entry> | 331 | <entry>0</entry> |
| @@ -92,18 +92,19 @@ streamoff.--></para> · 91 unmodified lines | |||
| 92 | <entry>The number of buffers requested or granted.</entry> | 92 | <entry>The number of buffers requested or granted.</entry> |
| 93 | </row> | 93 | </row> |
| 94 | <row> | 94 | <row> |
| 95 | <entry>&v4l2-buf-type;</entry> | 95 | <entry>__u32</entry> |
| 96 | <entry><structfield>type</structfield></entry> | 96 | <entry><structfield>type</structfield></entry> |
| 97 | <entry>Type of the stream or buffers, this is the same | 97 | <entry>Type of the stream or buffers, this is the same |
| 98 | as the &v4l2-format; <structfield>type</structfield> field. See <xref | 98 | as the &v4l2-format; <structfield>type</structfield> field. See <xref |
| 99 | linkend="v4l2-buf-type" /> for valid values.</entry> | 99 | linkend="v4l2-buf-type" /> for valid values.</entry> |
| 100 | </row> | 100 | </row> |
| 101 | <row> | 101 | <row> |
| 102 | <entry>&v4l2-memory;</entry> | 102 | <entry>__u32</entry> |
| 103 | <entry><structfield>memory</structfield></entry> | 103 | <entry><structfield>memory</structfield></entry> |
| 104 | <entry>Applications set this field to | 104 | <entry>Applications set this field to |
| 105 | <constant>V4L2_MEMORY_MMAP</constant> or | 105 | <constant>V4L2_MEMORY_MMAP</constant> or |
| 106 | <constant>V4L2_MEMORY_USERPTR</constant>.</entry> | 106 | <constant>V4L2_MEMORY_USERPTR</constant>. See <xref linkend="v4l2-memory" |
| 107 | />.</entry> | ||
| 107 | </row> | 108 | </row> |
| 108 | <row> | 109 | <row> |
| 109 | <entry>__u32</entry> | 110 | <entry>__u32</entry> |
| @@ -73,10 +73,11 @@ same value as in the &v4l2-input; <structfield>tuner</structfield> · 72 unmodified lines | |||
| 73 | field and the &v4l2-tuner; <structfield>index</structfield> field.</entry> | 73 | field and the &v4l2-tuner; <structfield>index</structfield> field.</entry> |
| 74 | </row> | 74 | </row> |
| 75 | <row> | 75 | <row> |
| 76 | <entry>&v4l2-tuner-type;</entry> | 76 | <entry>__u32</entry> |
| 77 | <entry><structfield>type</structfield></entry> | 77 | <entry><structfield>type</structfield></entry> |
| 78 | <entry>The tuner type. This is the same value as in the | 78 | <entry>The tuner type. This is the same value as in the |
| 79 | &v4l2-tuner; <structfield>type</structfield> field.</entry> | 79 | &v4l2-tuner; <structfield>type</structfield> field. See <xref |
| 80 | linkend="v4l2-tuner-type" /></entry> | ||
| 80 | </row> | 81 | </row> |
| 81 | <row> | 82 | <row> |
| 82 | <entry>__u32</entry> | 83 | <entry>__u32</entry> |
| @@ -58,9 +58,12 @@ · 57 unmodified lines | |||
| 58 | <title>Description</title> | 58 | <title>Description</title> |
| 59 | 59 | ||
| 60 | <note> | 60 | <note> |
| 61 | <title>Experimental</title> | 61 | <title>Obsolete</title> |
| 62 | <para>This is an <link linkend="experimental">experimental</link> | 62 | |
| 63 | interface and may change in the future.</para> | 63 | <para>This is an <link linkend="obsolete">obsolete</link> |
| 64 | interface and may be removed in the future. It is superseded by | ||
| 65 | <link linkend="vidioc-subdev-g-selection">the selection | ||
| 66 | API</link>.</para> | ||
| 64 | </note> | 67 | </note> |
| 65 | 68 | ||
| 66 | <para>To retrieve the current crop rectangle applications set the | 69 | <para>To retrieve the current crop rectangle applications set the |
| @@ -0,0 +1,228 @@ | |||
| 1 | <refentry id="vidioc-subdev-g-selection"> | ||
| 2 | <refmeta> | ||
| 3 | <refentrytitle>ioctl VIDIOC_SUBDEV_G_SELECTION, VIDIOC_SUBDEV_S_SELECTION</refentrytitle> | ||
| 4 | &manvol; | ||
| 5 | </refmeta> | ||
| 6 | |||
| 7 | <refnamediv> | ||
| 8 | <refname>VIDIOC_SUBDEV_G_SELECTION</refname> | ||
| 9 | <refname>VIDIOC_SUBDEV_S_SELECTION</refname> | ||
| 10 | <refpurpose>Get or set selection rectangles on a subdev pad</refpurpose> | ||
| 11 | </refnamediv> | ||
| 12 | |||
| 13 | <refsynopsisdiv> | ||
| 14 | <funcsynopsis> | ||
| 15 | <funcprototype> | ||
| 16 | <funcdef>int <function>ioctl</function></funcdef> | ||
| 17 | <paramdef>int <parameter>fd</parameter></paramdef> | ||
| 18 | <paramdef>int <parameter>request</parameter></paramdef> | ||
| 19 | <paramdef>struct v4l2_subdev_selection *<parameter>argp</parameter></paramdef> | ||
| 20 | </funcprototype> | ||
| 21 | </funcsynopsis> | ||
| 22 | </refsynopsisdiv> | ||
| 23 | |||
| 24 | <refsect1> | ||
| 25 | <title>Arguments</title> | ||
| 26 | |||
| 27 | <variablelist> | ||
| 28 | <varlistentry> | ||
| 29 | <term><parameter>fd</parameter></term> | ||
| 30 | <listitem> | ||
| 31 | <para>&fd;</para> | ||
| 32 | </listitem> | ||
| 33 | </varlistentry> | ||
| 34 | <varlistentry> | ||
| 35 | <term><parameter>request</parameter></term> | ||
| 36 | <listitem> | ||
| 37 | <para>VIDIOC_SUBDEV_G_SELECTION, VIDIOC_SUBDEV_S_SELECTION</para> | ||
| 38 | </listitem> | ||
| 39 | </varlistentry> | ||
| 40 | <varlistentry> | ||
| 41 | <term><parameter>argp</parameter></term> | ||
| 42 | <listitem> | ||
| 43 | <para></para> | ||
| 44 | </listitem> | ||
| 45 | </varlistentry> | ||
| 46 | </variablelist> | ||
| 47 | </refsect1> | ||
| 48 | |||
| 49 | <refsect1> | ||
| 50 | <title>Description</title> | ||
| 51 | |||
| 52 | <note> | ||
| 53 | <title>Experimental</title> | ||
| 54 | <para>This is an <link linkend="experimental">experimental</link> | ||
| 55 | interface and may change in the future.</para> | ||
| 56 | </note> | ||
| 57 | |||
| 58 | <para>The selections are used to configure various image | ||
| 59 | processing functionality performed by the subdevs which affect the | ||
| 60 | image size. This currently includes cropping, scaling and | ||
| 61 | composition.</para> | ||
| 62 | |||
| 63 | <para>The selection API replaces <link | ||
| 64 | linkend="vidioc-subdev-g-crop">the old subdev crop API</link>. All | ||
| 65 | the function of the crop API, and more, are supported by the | ||
| 66 | selections API.</para> | ||
| 67 | |||
| 68 | <para>See <xref linkend="subdev"></xref> for | ||
| 69 | more information on how each selection target affects the image | ||
| 70 | processing pipeline inside the subdevice.</para> | ||
| 71 | |||
| 72 | <section> | ||
| 73 | <title>Types of selection targets</title> | ||
| 74 | |||
| 75 | <para>There are two types of selection targets: actual and bounds. | ||
| 76 | The ACTUAL targets are the targets which configure the hardware. | ||
| 77 | The BOUNDS target will return a rectangle that contain all | ||
| 78 | possible ACTUAL rectangles.</para> | ||
| 79 | </section> | ||
| 80 | |||
| 81 | <section> | ||
| 82 | <title>Discovering supported features</title> | ||
| 83 | |||
| 84 | <para>To discover which targets are supported, the user can | ||
| 85 | perform <constant>VIDIOC_SUBDEV_G_SELECTION</constant> on them. | ||
| 86 | Any unsupported target will return | ||
| 87 | <constant>EINVAL</constant>.</para> | ||
| 88 | </section> | ||
| 89 | |||
| 90 | <table pgwide="1" frame="none" id="v4l2-subdev-selection-targets"> | ||
| 91 | <title>V4L2 subdev selection targets</title> | ||
| 92 | <tgroup cols="3"> | ||
| 93 | &cs-def; | ||
| 94 | <tbody valign="top"> | ||
| 95 | <row> | ||
| 96 | <entry><constant>V4L2_SUBDEV_SEL_TGT_CROP_ACTUAL</constant></entry> | ||
| 97 | <entry>0x0000</entry> | ||
| 98 | <entry>Actual crop. Defines the cropping | ||
| 99 | performed by the processing step.</entry> | ||
| 100 | </row> | ||
| 101 | <row> | ||
| 102 | <entry><constant>V4L2_SUBDEV_SEL_TGT_CROP_BOUNDS</constant></entry> | ||
| 103 | <entry>0x0002</entry> | ||
| 104 | <entry>Bounds of the crop rectangle.</entry> | ||
| 105 | </row> | ||
| 106 | <row> | ||
| 107 | <entry><constant>V4L2_SUBDEV_SEL_TGT_COMPOSE_ACTUAL</constant></entry> | ||
| 108 | <entry>0x0100</entry> | ||
| 109 | <entry>Actual compose rectangle. Used to configure scaling | ||
| 110 | on sink pads and composition on source pads.</entry> | ||
| 111 | </row> | ||
| 112 | <row> | ||
| 113 | <entry><constant>V4L2_SUBDEV_SEL_TGT_COMPOSE_BOUNDS</constant></entry> | ||
| 114 | <entry>0x0102</entry> | ||
| 115 | <entry>Bounds of the compose rectangle.</entry> | ||
| 116 | </row> | ||
| 117 | </tbody> | ||
| 118 | </tgroup> | ||
| 119 | </table> | ||
| 120 | |||
| 121 | <table pgwide="1" frame="none" id="v4l2-subdev-selection-flags"> | ||
| 122 | <title>V4L2 subdev selection flags</title> | ||
| 123 | <tgroup cols="3"> | ||
| 124 | &cs-def; | ||
| 125 | <tbody valign="top"> | ||
| 126 | <row> | ||
| 127 | <entry><constant>V4L2_SUBDEV_SEL_FLAG_SIZE_GE</constant></entry> | ||
| 128 | <entry>(1 << 0)</entry> <entry>Suggest the driver it | ||
| 129 | should choose greater or equal rectangle (in size) than | ||
| 130 | was requested. Albeit the driver may choose a lesser size, | ||
| 131 | it will only do so due to hardware limitations. Without | ||
| 132 | this flag (and | ||
| 133 | <constant>V4L2_SUBDEV_SEL_FLAG_SIZE_LE</constant>) the | ||
| 134 | behaviour is to choose the closest possible | ||
| 135 | rectangle.</entry> | ||
| 136 | </row> | ||
| 137 | <row> | ||
| 138 | <entry><constant>V4L2_SUBDEV_SEL_FLAG_SIZE_LE</constant></entry> | ||
| 139 | <entry>(1 << 1)</entry> <entry>Suggest the driver it | ||
| 140 | should choose lesser or equal rectangle (in size) than was | ||
| 141 | requested. Albeit the driver may choose a greater size, it | ||
| 142 | will only do so due to hardware limitations.</entry> | ||
| 143 | </row> | ||
| 144 | <row> | ||
| 145 | <entry><constant>V4L2_SUBDEV_SEL_FLAG_KEEP_CONFIG</constant></entry> | ||
| 146 | <entry>(1 << 2)</entry> | ||
| 147 | <entry>The configuration should not be propagated to any | ||
| 148 | further processing steps. If this flag is not given, the | ||
| 149 | configuration is propagated inside the subdevice to all | ||
| 150 | further processing steps.</entry> | ||
| 151 | </row> | ||
| 152 | </tbody> | ||
| 153 | </tgroup> | ||
| 154 | </table> | ||
| 155 | |||
| 156 | <table pgwide="1" frame="none" id="v4l2-subdev-selection"> | ||
| 157 | <title>struct <structname>v4l2_subdev_selection</structname></title> | ||
| 158 | <tgroup cols="3"> | ||
| 159 | &cs-str; | ||
| 160 | <tbody valign="top"> | ||
| 161 | <row> | ||
| 162 | <entry>__u32</entry> | ||
| 163 | <entry><structfield>which</structfield></entry> | ||
| 164 | <entry>Active or try selection, from | ||
| 165 | &v4l2-subdev-format-whence;.</entry> | ||
| 166 | </row> | ||
| 167 | <row> | ||
| 168 | <entry>__u32</entry> | ||
| 169 | <entry><structfield>pad</structfield></entry> | ||
| 170 | <entry>Pad number as reported by the media framework.</entry> | ||
| 171 | </row> | ||
| 172 | <row> | ||
| 173 | <entry>__u32</entry> | ||
| 174 | <entry><structfield>target</structfield></entry> | ||
| 175 | <entry>Target selection rectangle. See | ||
| 176 | <xref linkend="v4l2-subdev-selection-targets">.</xref>.</entry> | ||
| 177 | </row> | ||
| 178 | <row> | ||
| 179 | <entry>__u32</entry> | ||
| 180 | <entry><structfield>flags</structfield></entry> | ||
| 181 | <entry>Flags. See | ||
| 182 | <xref linkend="v4l2-subdev-selection-flags">.</xref></entry> | ||
| 183 | </row> | ||
| 184 | <row> | ||
| 185 | <entry>&v4l2-rect;</entry> | ||
| 186 | <entry><structfield>rect</structfield></entry> | ||
| 187 | <entry>Selection rectangle, in pixels.</entry> | ||
| 188 | </row> | ||
| 189 | <row> | ||
| 190 | <entry>__u32</entry> | ||
| 191 | <entry><structfield>reserved</structfield>[8]</entry> | ||
| 192 | <entry>Reserved for future extensions. Applications and drivers must | ||
| 193 | set the array to zero.</entry> | ||
| 194 | </row> | ||
| 195 | </tbody> | ||
| 196 | </tgroup> | ||
| 197 | </table> | ||
| 198 | |||
| 199 | </refsect1> | ||
| 200 | |||
| 201 | <refsect1> | ||
| 202 | &return-value; | ||
| 203 | |||
| 204 | <variablelist> | ||
| 205 | <varlistentry> | ||
| 206 | <term><errorcode>EBUSY</errorcode></term> | ||
| 207 | <listitem> | ||
| 208 | <para>The selection rectangle can't be changed because the | ||
| 209 | pad is currently busy. This can be caused, for instance, by | ||
| 210 | an active video stream on the pad. The ioctl must not be | ||
| 211 | retried without performing another action to fix the problem | ||
| 212 | first. Only returned by | ||
| 213 | <constant>VIDIOC_SUBDEV_S_SELECTION</constant></para> | ||
| 214 | </listitem> | ||
| 215 | </varlistentry> | ||
| 216 | <varlistentry> | ||
| 217 | <term><errorcode>EINVAL</errorcode></term> | ||
| 218 | <listitem> | ||
| 219 | <para>The &v4l2-subdev-selection; | ||
| 220 | <structfield>pad</structfield> references a non-existing | ||
| 221 | pad, the <structfield>which</structfield> field references a | ||
| 222 | non-existing format, or the selection target is not | ||
| 223 | supported on the given subdev pad.</para> | ||
| 224 | </listitem> | ||
| 225 | </varlistentry> | ||
| 226 | </variablelist> | ||
| 227 | </refsect1> | ||
| 228 | </refentry> | ||
| @@ -1119,8 +1119,6 @@ in this page</entry> · 1118 unmodified lines | |||
| 1119 | These constants are defined in nand.h. They are ored together to describe | 1119 | These constants are defined in nand.h. They are ored together to describe |
| 1120 | the chip functionality. | 1120 | the chip functionality. |
| 1121 | <programlisting> | 1121 | <programlisting> |
| 1122 | /* Chip can not auto increment pages */ | ||
| 1123 | #define NAND_NO_AUTOINCR 0x00000001 | ||
| 1124 | /* Buswitdh is 16 bit */ | 1122 | /* Buswitdh is 16 bit */ |
| 1125 | #define NAND_BUSWIDTH_16 0x00000002 | 1123 | #define NAND_BUSWIDTH_16 0x00000002 |
| 1126 | /* Device supports partial programming without padding */ | 1124 | /* Device supports partial programming without padding */ |
| @@ -218,16 +218,16 @@ The development process · 217 unmodified lines | |||
| 218 | Linux kernel development process currently consists of a few different | 218 | Linux kernel development process currently consists of a few different |
| 219 | main kernel "branches" and lots of different subsystem-specific kernel | 219 | main kernel "branches" and lots of different subsystem-specific kernel |
| 220 | branches. These different branches are: | 220 | branches. These different branches are: |
| 221 | - main 2.6.x kernel tree | 221 | - main 3.x kernel tree |
| 222 | - 2.6.x.y -stable kernel tree | 222 | - 3.x.y -stable kernel tree |
| 223 | - 2.6.x -git kernel patches | 223 | - 3.x -git kernel patches |
| 224 | - subsystem specific kernel trees and patches | 224 | - subsystem specific kernel trees and patches |
| 225 | - the 2.6.x -next kernel tree for integration tests | 225 | - the 3.x -next kernel tree for integration tests |
| 226 | 226 | ||
| 227 | 2.6.x kernel tree | 227 | 3.x kernel tree |
| 228 | ----------------- | 228 | ----------------- |
| 229 | 2.6.x kernels are maintained by Linus Torvalds, and can be found on | 229 | 3.x kernels are maintained by Linus Torvalds, and can be found on |
| 230 | kernel.org in the pub/linux/kernel/v2.6/ directory. Its development | 230 | kernel.org in the pub/linux/kernel/v3.x/ directory. Its development |
| 231 | process is as follows: | 231 | process is as follows: |
| 232 | - As soon as a new kernel is released a two weeks window is open, | 232 | - As soon as a new kernel is released a two weeks window is open, |
| 233 | during this period of time maintainers can submit big diffs to | 233 | during this period of time maintainers can submit big diffs to |
| @@ -262,20 +262,20 @@ mailing list about kernel releases: · 28 unmodified lines | |||
| 262 | released according to perceived bug status, not according to a | 262 | released according to perceived bug status, not according to a |
| 263 | preconceived timeline." | 263 | preconceived timeline." |
| 264 | 264 | ||
| 265 | 2.6.x.y -stable kernel tree | 265 | 3.x.y -stable kernel tree |
| 266 | --------------------------- | 266 | --------------------------- |
| 267 | Kernels with 4-part versions are -stable kernels. They contain | 267 | Kernels with 3-part versions are -stable kernels. They contain |
| 268 | relatively small and critical fixes for security problems or significant | 268 | relatively small and critical fixes for security problems or significant |
| 269 | regressions discovered in a given 2.6.x kernel. | 269 | regressions discovered in a given 3.x kernel. |
| 270 | 270 | ||
| 271 | This is the recommended branch for users who want the most recent stable | 271 | This is the recommended branch for users who want the most recent stable |
| 272 | kernel and are not interested in helping test development/experimental | 272 | kernel and are not interested in helping test development/experimental |
| 273 | versions. | 273 | versions. |
| 274 | 274 | ||
| 275 | If no 2.6.x.y kernel is available, then the highest numbered 2.6.x | 275 | If no 3.x.y kernel is available, then the highest numbered 3.x |
| 276 | kernel is the current stable kernel. | 276 | kernel is the current stable kernel. |
| 277 | 277 | ||
| 278 | 2.6.x.y are maintained by the "stable" team <stable@vger.kernel.org>, and | 278 | 3.x.y are maintained by the "stable" team <stable@vger.kernel.org>, and |
| 279 | are released as needs dictate. The normal release period is approximately | 279 | are released as needs dictate. The normal release period is approximately |
| 280 | two weeks, but it can be longer if there are no pressing problems. A | 280 | two weeks, but it can be longer if there are no pressing problems. A |
| 281 | security-related problem, instead, can cause a release to happen almost | 281 | security-related problem, instead, can cause a release to happen almost |
| @@ -285,7 +285,7 @@ The file Documentation/stable_kernel_rules.txt in the kernel tree · 3 unmodified lines | |||
| 285 | documents what kinds of changes are acceptable for the -stable tree, and | 285 | documents what kinds of changes are acceptable for the -stable tree, and |
| 286 | how the release process works. | 286 | how the release process works. |
| 287 | 287 | ||
| 288 | 2.6.x -git patches | 288 | 3.x -git patches |
| 289 | ------------------ | 289 | ------------------ |
| 290 | These are daily snapshots of Linus' kernel tree which are managed in a | 290 | These are daily snapshots of Linus' kernel tree which are managed in a |
| 291 | git repository (hence the name.) These patches are usually released | 291 | git repository (hence the name.) These patches are usually released |
| @@ -317,13 +317,13 @@ revisions to it, and maintainers can mark patches as under review, · 25 unmodified lines | |||
| 317 | accepted, or rejected. Most of these patchwork sites are listed at | 317 | accepted, or rejected. Most of these patchwork sites are listed at |
| 318 | http://patchwork.kernel.org/. | 318 | http://patchwork.kernel.org/. |
| 319 | 319 | ||
| 320 | 2.6.x -next kernel tree for integration tests | 320 | 3.x -next kernel tree for integration tests |
| 321 | --------------------------------------------- | 321 | --------------------------------------------- |
| 322 | Before updates from subsystem trees are merged into the mainline 2.6.x | 322 | Before updates from subsystem trees are merged into the mainline 3.x |
| 323 | tree, they need to be integration-tested. For this purpose, a special | 323 | tree, they need to be integration-tested. For this purpose, a special |
| 324 | testing repository exists into which virtually all subsystem trees are | 324 | testing repository exists into which virtually all subsystem trees are |
| 325 | pulled on an almost daily basis: | 325 | pulled on an almost daily basis: |
| 326 | http://git.kernel.org/?p=linux/kernel/git/sfr/linux-next.git | 326 | http://git.kernel.org/?p=linux/kernel/git/next/linux-next.git |
| 327 | http://linux.f-seidel.de/linux-next/pmwiki/ | 327 | http://linux.f-seidel.de/linux-next/pmwiki/ |
| 328 | 328 | ||
| 329 | This way, the -next kernel gives a summary outlook onto what will be | 329 | This way, the -next kernel gives a summary outlook onto what will be |
| @@ -1,3 +1,3 @@ | |||
| 1 | obj-m := DocBook/ accounting/ auxdisplay/ connector/ \ | 1 | obj-m := DocBook/ accounting/ auxdisplay/ connector/ \ |
| 2 | filesystems/ filesystems/configfs/ ia64/ laptops/ networking/ \ | 2 | filesystems/ filesystems/configfs/ ia64/ laptops/ networking/ \ |
| 3 | pcmcia/ spi/ timers/ watchdog/src/ | 3 | pcmcia/ spi/ timers/ watchdog/src/ misc-devices/mei/ |
| @@ -47,6 +47,16 @@ irqreader Says to invoke RCU readers from irq level. This is currently · 46 unmodified lines | |||
| 47 | permit this. (Or, more accurately, variants of RCU that do | 47 | permit this. (Or, more accurately, variants of RCU that do |
| 48 | -not- permit this know to ignore this variable.) | 48 | -not- permit this know to ignore this variable.) |
| 49 | 49 | ||
| 50 | n_barrier_cbs If this is nonzero, RCU barrier testing will be conducted, | ||
| 51 | in which case n_barrier_cbs specifies the number of | ||
| 52 | RCU callbacks (and corresponding kthreads) to use for | ||
| 53 | this testing. The value cannot be negative. If you | ||
| 54 | specify this to be non-zero when torture_type indicates a | ||
| 55 | synchronous RCU implementation (one for which a member of | ||
| 56 | the synchronize_rcu() rather than the call_rcu() family is | ||
| 57 | used -- see the documentation for torture_type below), an | ||
| 58 | error will be reported and no testing will be carried out. | ||
| 59 | |||
| 50 | nfakewriters This is the number of RCU fake writer threads to run. Fake | 60 | nfakewriters This is the number of RCU fake writer threads to run. Fake |
| 51 | writer threads repeatedly use the synchronous "wait for | 61 | writer threads repeatedly use the synchronous "wait for |
| 52 | current readers" function of the interface selected by | 62 | current readers" function of the interface selected by |
| @@ -188,7 +198,7 @@ OUTPUT · 135 unmodified lines | |||
| 188 | The statistics output is as follows: | 198 | The statistics output is as follows: |
| 189 | 199 | ||
| 190 | rcu-torture:--- Start of test: nreaders=16 nfakewriters=4 stat_interval=30 verbose=0 test_no_idle_hz=1 shuffle_interval=3 stutter=5 irqreader=1 fqs_duration=0 fqs_holdoff=0 fqs_stutter=3 test_boost=1/0 test_boost_interval=7 test_boost_duration=4 | 200 | rcu-torture:--- Start of test: nreaders=16 nfakewriters=4 stat_interval=30 verbose=0 test_no_idle_hz=1 shuffle_interval=3 stutter=5 irqreader=1 fqs_duration=0 fqs_holdoff=0 fqs_stutter=3 test_boost=1/0 test_boost_interval=7 test_boost_duration=4 |
| 191 | rcu-torture: rtc: (null) ver: 155441 tfle: 0 rta: 155441 rtaf: 8884 rtf: 155440 rtmbe: 0 rtbke: 0 rtbre: 0 rtbf: 0 rtb: 0 nt: 3055767 | 201 | rcu-torture: rtc: (null) ver: 155441 tfle: 0 rta: 155441 rtaf: 8884 rtf: 155440 rtmbe: 0 rtbe: 0 rtbke: 0 rtbre: 0 rtbf: 0 rtb: 0 nt: 3055767 |
| 192 | rcu-torture: Reader Pipe: 727860534 34213 0 0 0 0 0 0 0 0 0 | 202 | rcu-torture: Reader Pipe: 727860534 34213 0 0 0 0 0 0 0 0 0 |
| 193 | rcu-torture: Reader Batch: 727877838 17003 0 0 0 0 0 0 0 0 0 | 203 | rcu-torture: Reader Batch: 727877838 17003 0 0 0 0 0 0 0 0 0 |
| 194 | rcu-torture: Free-Block Circulation: 155440 155440 155440 155440 155440 155440 155440 155440 155440 155440 0 | 204 | rcu-torture: Free-Block Circulation: 155440 155440 155440 155440 155440 155440 155440 155440 155440 155440 0 |
| @@ -230,6 +240,9 @@ o "rtmbe": A non-zero value indicates that rcutorture believes that · 35 unmodified lines | |||
| 230 | rcu_assign_pointer() and rcu_dereference() are not working | 240 | rcu_assign_pointer() and rcu_dereference() are not working |
| 231 | correctly. This value should be zero. | 241 | correctly. This value should be zero. |
| 232 | 242 | ||
| 243 | o "rtbe": A non-zero value indicates that one of the rcu_barrier() | ||
| 244 | family of functions is not working correctly. | ||
| 245 | |||
| 233 | o "rtbke": rcutorture was unable to create the real-time kthreads | 246 | o "rtbke": rcutorture was unable to create the real-time kthreads |
| 234 | used to force RCU priority inversion. This value should be zero. | 247 | used to force RCU priority inversion. This value should be zero. |
| 235 | 248 | ||
| @@ -150,7 +150,8 @@ be able to justify all violations that remain in your patch. · 149 unmodified lines | |||
| 150 | 150 | ||
| 151 | Look through the MAINTAINERS file and the source code, and determine | 151 | Look through the MAINTAINERS file and the source code, and determine |
| 152 | if your change applies to a specific subsystem of the kernel, with | 152 | if your change applies to a specific subsystem of the kernel, with |
| 153 | an assigned maintainer. If so, e-mail that person. | 153 | an assigned maintainer. If so, e-mail that person. The script |
| 154 | scripts/get_maintainer.pl can be very useful at this step. | ||
| 154 | 155 | ||
| 155 | If no maintainer is listed, or the maintainer does not respond, send | 156 | If no maintainer is listed, or the maintainer does not respond, send |
| 156 | your patch to the primary Linux kernel developer's mailing list, | 157 | your patch to the primary Linux kernel developer's mailing list, |
| @@ -4,8 +4,6 @@ Booting · 3 unmodified lines | |||
| 4 | - requirements for booting | 4 | - requirements for booting |
| 5 | Interrupts | 5 | Interrupts |
| 6 | - ARM Interrupt subsystem documentation | 6 | - ARM Interrupt subsystem documentation |
| 7 | IXP2000 | ||
| 8 | - Release Notes for Linux on Intel's IXP2000 Network Processor | ||
| 9 | msm | 7 | msm |
| 10 | - MSM specific documentation | 8 | - MSM specific documentation |
| 11 | Netwinder | 9 | Netwinder |
| @@ -1,69 +0,0 @@ | |||
| 1 | |||
| 2 | ------------------------------------------------------------------------- | ||
| 3 | Release Notes for Linux on Intel's IXP2000 Network Processor | ||
| 4 | |||
| 5 | Maintained by Deepak Saxena <dsaxena@plexity.net> | ||
| 6 | ------------------------------------------------------------------------- | ||
| 7 | |||
| 8 | 1. Overview | ||
| 9 | |||
| 10 | Intel's IXP2000 family of NPUs (IXP2400, IXP2800, IXP2850) is designed | ||
| 11 | for high-performance network applications such high-availability | ||
| 12 | telecom systems. In addition to an XScale core, it contains up to 8 | ||
| 13 | "MicroEngines" that run special code, several high-end networking | ||
| 14 | interfaces (UTOPIA, SPI, etc), a PCI host bridge, one serial port, | ||
| 15 | flash interface, and some other odds and ends. For more information, see: | ||
| 16 | |||
| 17 | http://developer.intel.com | ||
| 18 | |||
| 19 | 2. Linux Support | ||
| 20 | |||
| 21 | Linux currently supports the following features on the IXP2000 NPUs: | ||
| 22 | |||
| 23 | - On-chip serial | ||
| 24 | - PCI | ||
| 25 | - Flash (MTD/JFFS2) | ||
| 26 | - I2C through GPIO | ||
| 27 | - Timers (watchdog, OS) | ||
| 28 | |||
| 29 | That is about all we can support under Linux ATM b/c the core networking | ||
| 30 | components of the chip are accessed via Intel's closed source SDK. | ||
| 31 | Please contact Intel directly on issues with using those. There is | ||
| 32 | also a mailing list run by some folks at Princeton University that might | ||
| 33 | be of help: https://lists.cs.princeton.edu/mailman/listinfo/ixp2xxx | ||
| 34 | |||
| 35 | WHATEVER YOU DO, DO NOT POST EMAIL TO THE LINUX-ARM OR LINUX-ARM-KERNEL | ||
| 36 | MAILING LISTS REGARDING THE INTEL SDK. | ||
| 37 | |||
| 38 | 3. Supported Platforms | ||
| 39 | |||
| 40 | - Intel IXDP2400 Reference Platform | ||
| 41 | - Intel IXDP2800 Reference Platform | ||
| 42 | - Intel IXDP2401 Reference Platform | ||
| 43 | - Intel IXDP2801 Reference Platform | ||
| 44 | - RadiSys ENP-2611 | ||
| 45 | |||
| 46 | 4. Usage Notes | ||
| 47 | |||
| 48 | - The IXP2000 platforms usually have rather complex PCI bus topologies | ||
| 49 | with large memory space requirements. In addition, b/c of the way the | ||
| 50 | Intel SDK is designed, devices are enumerated in a very specific | ||
| 51 | way. B/c of this this, we use "pci=firmware" option in the kernel | ||
| 52 | command line so that we do not re-enumerate the bus. | ||
| 53 | |||
| 54 | - IXDP2x01 systems have variable clock tick rates that we cannot determine | ||
| 55 | via HW registers. The "ixdp2x01_clk=XXX" cmd line options allow you | ||
| 56 | to pass the clock rate to the board port. | ||
| 57 | |||
| 58 | 5. Thanks | ||
| 59 | |||
| 60 | The IXP2000 work has been funded by Intel Corp. and MontaVista Software, Inc. | ||
| 61 | |||
| 62 | The following people have contributed patches/comments/etc: | ||
| 63 | |||
| 64 | Naeem F. Afzal | ||
| 65 | Lennert Buytenhek | ||
| 66 | Jeffrey Daly | ||
| 67 | |||
| 68 | ------------------------------------------------------------------------- | ||
| 69 | Last Update: 8/09/2004 | ||
| @@ -47,6 +47,51 @@ flexible way to enable non-common multi-display configuration. In addition to · 46 unmodified lines | |||
| 47 | modelling the hardware overlays, omapdss supports virtual overlays and overlay | 47 | modelling the hardware overlays, omapdss supports virtual overlays and overlay |
| 48 | managers. These can be used when updating a display with CPU or system DMA. | 48 | managers. These can be used when updating a display with CPU or system DMA. |
| 49 | 49 | ||
| 50 | omapdss driver support for audio | ||
| 51 | -------------------------------- | ||
| 52 | There exist several display technologies and standards that support audio as | ||
| 53 | well. Hence, it is relevant to update the DSS device driver to provide an audio | ||
| 54 | interface that may be used by an audio driver or any other driver interested in | ||
| 55 | the functionality. | ||
| 56 | |||
| 57 | The audio_enable function is intended to prepare the relevant | ||
| 58 | IP for playback (e.g., enabling an audio FIFO, taking in/out of reset | ||
| 59 | some IP, enabling companion chips, etc). It is intended to be called before | ||
| 60 | audio_start. The audio_disable function performs the reverse operation and is | ||
| 61 | intended to be called after audio_stop. | ||
| 62 | |||
| 63 | While a given DSS device driver may support audio, it is possible that for | ||
| 64 | certain configurations audio is not supported (e.g., an HDMI display using a | ||
| 65 | VESA video timing). The audio_supported function is intended to query whether | ||
| 66 | the current configuration of the display supports audio. | ||
| 67 | |||
| 68 | The audio_config function is intended to configure all the relevant audio | ||
| 69 | parameters of the display. In order to make the function independent of any | ||
| 70 | specific DSS device driver, a struct omap_dss_audio is defined. Its purpose | ||
| 71 | is to contain all the required parameters for audio configuration. At the | ||
| 72 | moment, such structure contains pointers to IEC-60958 channel status word | ||
| 73 | and CEA-861 audio infoframe structures. This should be enough to support | ||
| 74 | HDMI and DisplayPort, as both are based on CEA-861 and IEC-60958. | ||
| 75 | |||
| 76 | The audio_enable/disable, audio_config and audio_supported functions could be | ||
| 77 | implemented as functions that may sleep. Hence, they should not be called | ||
| 78 | while holding a spinlock or a readlock. | ||
| 79 | |||
| 80 | The audio_start/audio_stop function is intended to effectively start/stop audio | ||
| 81 | playback after the configuration has taken place. These functions are designed | ||
| 82 | to be used in an atomic context. Hence, audio_start should return quickly and be | ||
| 83 | called only after all the needed resources for audio playback (audio FIFOs, | ||
| 84 | DMA channels, companion chips, etc) have been enabled to begin data transfers. | ||
| 85 | audio_stop is designed to only stop the audio transfers. The resources used | ||
| 86 | for playback are released using audio_disable. | ||
| 87 | |||
| 88 | The enum omap_dss_audio_state may be used to help the implementations of | ||
| 89 | the interface to keep track of the audio state. The initial state is _DISABLED; | ||
| 90 | then, the state transitions to _CONFIGURED, and then, when it is ready to | ||
| 91 | play audio, to _ENABLED. The state _PLAYING is used when the audio is being | ||
| 92 | rendered. | ||
| 93 | |||
| 94 | |||
| 50 | Panel and controller drivers | 95 | Panel and controller drivers |
| 51 | ---------------------------- | 96 | ---------------------------- |
| 52 | 97 | ||
| @@ -156,6 +201,7 @@ timings Display timings (pixclock,xres/hfp/hbp/hsw,yres/vfp/vbp/vsw) · 103 unmodified lines | |||
| 156 | "pal" and "ntsc" | 201 | "pal" and "ntsc" |
| 157 | panel_name | 202 | panel_name |
| 158 | tear_elim Tearing elimination 0=off, 1=on | 203 | tear_elim Tearing elimination 0=off, 1=on |
| 204 | output_type Output type (video encoder only): "composite" or "svideo" | ||
| 159 | 205 | ||
| 160 | There are also some debugfs files at <debugfs>/omapdss/ which show information | 206 | There are also some debugfs files at <debugfs>/omapdss/ which show information |
| 161 | about clocks and registers. | 207 | about clocks and registers. |
| @@ -8,53 +8,56 @@ Introduction · 7 unmodified lines | |||
| 8 | weblink : http://www.st.com/spear | 8 | weblink : http://www.st.com/spear |
| 9 | 9 | ||
| 10 | The ST Microelectronics SPEAr range of ARM9/CortexA9 System-on-Chip CPUs are | 10 | The ST Microelectronics SPEAr range of ARM9/CortexA9 System-on-Chip CPUs are |
| 11 | supported by the 'spear' platform of ARM Linux. Currently SPEAr300, | 11 | supported by the 'spear' platform of ARM Linux. Currently SPEAr1310, |
| 12 | SPEAr310, SPEAr320 and SPEAr600 SOCs are supported. Support for the SPEAr13XX | 12 | SPEAr1340, SPEAr300, SPEAr310, SPEAr320 and SPEAr600 SOCs are supported. |
| 13 | series is in progress. | ||
| 14 | 13 | ||
| 15 | Hierarchy in SPEAr is as follows: | 14 | Hierarchy in SPEAr is as follows: |
| 16 | 15 | ||
| 17 | SPEAr (Platform) | 16 | SPEAr (Platform) |
| 18 | - SPEAr3XX (3XX SOC series, based on ARM9) | 17 | - SPEAr3XX (3XX SOC series, based on ARM9) |
| 19 | - SPEAr300 (SOC) | 18 | - SPEAr300 (SOC) |
| 20 | - SPEAr300_EVB (Evaluation Board) | 19 | - SPEAr300 Evaluation Board |
| 21 | - SPEAr310 (SOC) | 20 | - SPEAr310 (SOC) |
| 22 | - SPEAr310_EVB (Evaluation Board) | 21 | - SPEAr310 Evaluation Board |
| 23 | - SPEAr320 (SOC) | 22 | - SPEAr320 (SOC) |
| 24 | - SPEAr320_EVB (Evaluation Board) | 23 | - SPEAr320 Evaluation Board |
| 25 | - SPEAr6XX (6XX SOC series, based on ARM9) | 24 | - SPEAr6XX (6XX SOC series, based on ARM9) |
| 26 | - SPEAr600 (SOC) | 25 | - SPEAr600 (SOC) |
| 27 | - SPEAr600_EVB (Evaluation Board) | 26 | - SPEAr600 Evaluation Board |
| 28 | - SPEAr13XX (13XX SOC series, based on ARM CORTEXA9) | 27 | - SPEAr13XX (13XX SOC series, based on ARM CORTEXA9) |
| 29 | - SPEAr1300 (SOC) | 28 | - SPEAr1310 (SOC) |
| 29 | - SPEAr1310 Evaluation Board | ||
| 30 | - SPEAr1340 (SOC) | ||
| 31 | - SPEAr1340 Evaluation Board | ||
| 30 | 32 | ||
| 31 | Configuration | 33 | Configuration |
| 32 | ------------- | 34 | ------------- |
| 33 | 35 | ||
| 34 | A generic configuration is provided for each machine, and can be used as the | 36 | A generic configuration is provided for each machine, and can be used as the |
| 35 | default by | 37 | default by |
| 36 | make spear600_defconfig | 38 | make spear13xx_defconfig |
| 37 | make spear300_defconfig | 39 | make spear3xx_defconfig |
| 38 | make spear310_defconfig | 40 | make spear6xx_defconfig |
| 39 | make spear320_defconfig | ||
| 40 | 41 | ||
| 41 | Layout | 42 | Layout |
| 42 | ------ | 43 | ------ |
| 43 | 44 | ||
| 44 | The common files for multiple machine families (SPEAr3XX, SPEAr6XX and | 45 | The common files for multiple machine families (SPEAr3xx, SPEAr6xx and |
| 45 | SPEAr13XX) are located in the platform code contained in arch/arm/plat-spear | 46 | SPEAr13xx) are located in the platform code contained in arch/arm/plat-spear |
| 46 | with headers in plat/. | 47 | with headers in plat/. |
| 47 | 48 | ||
| 48 | Each machine series have a directory with name arch/arm/mach-spear followed by | 49 | Each machine series have a directory with name arch/arm/mach-spear followed by |
| 49 | series name. Like mach-spear3xx, mach-spear6xx and mach-spear13xx. | 50 | series name. Like mach-spear3xx, mach-spear6xx and mach-spear13xx. |
| 50 | 51 | ||
| 51 | Common file for machines of spear3xx family is mach-spear3xx/spear3xx.c and for | 52 | Common file for machines of spear3xx family is mach-spear3xx/spear3xx.c, for |
| 52 | spear6xx is mach-spear6xx/spear6xx.c. mach-spear* also contain soc/machine | 53 | spear6xx is mach-spear6xx/spear6xx.c and for spear13xx family is |
| 53 | specific files, like spear300.c, spear310.c, spear320.c and spear600.c. | 54 | mach-spear13xx/spear13xx.c. mach-spear* also contain soc/machine specific |
| 54 | mach-spear* also contains board specific files for each machine type. | 55 | files, like spear1310.c, spear1340.c spear300.c, spear310.c, spear320.c and |
| 56 | spear600.c. mach-spear* doesn't contains board specific files as they fully | ||
| 57 | support Flattened Device Tree. | ||
| 55 | 58 | ||
| 56 | 59 | ||
| 57 | Document Author | 60 | Document Author |
| 58 | --------------- | 61 | --------------- |
| 59 | 62 | ||
| 60 | Viresh Kumar, (c) 2010 ST Microelectronics | 63 | Viresh Kumar <viresh.kumar@st.com>, (c) 2010-2012 ST Microelectronics |
| @@ -53,7 +53,7 @@ · 52 unmodified lines | |||
| 53 | 53 | ||
| 54 | 3. But there are some exceptions | 54 | 3. But there are some exceptions |
| 55 | - Kernel permit the identical GPIO be requested both as GPIO and GPIO | 55 | - Kernel permit the identical GPIO be requested both as GPIO and GPIO |
| 56 | interrut. | 56 | interrupt. |
| 57 | Some drivers, like gpio-keys, need this behavior. Kernel only print out | 57 | Some drivers, like gpio-keys, need this behavior. Kernel only print out |
| 58 | warning messages like, | 58 | warning messages like, |
| 59 | bfin-gpio: GPIO 24 is already reserved by gpio-keys: BTN0, and you are | 59 | bfin-gpio: GPIO 24 is already reserved by gpio-keys: BTN0, and you are |
| @@ -184,12 +184,14 @@ behind this approach is that a cgroup that aggressively uses a shared · 183 unmodified lines | |||
| 184 | page will eventually get charged for it (once it is uncharged from | 184 | page will eventually get charged for it (once it is uncharged from |
| 185 | the cgroup that brought it in -- this will happen on memory pressure). | 185 | the cgroup that brought it in -- this will happen on memory pressure). |
| 186 | 186 | ||
| 187 | But see section 8.2: when moving a task to another cgroup, its pages may | ||
| 188 | be recharged to the new cgroup, if move_charge_at_immigrate has been chosen. | ||
| 189 | |||
| 187 | Exception: If CONFIG_CGROUP_CGROUP_MEM_RES_CTLR_SWAP is not used. | 190 | Exception: If CONFIG_CGROUP_CGROUP_MEM_RES_CTLR_SWAP is not used. |
| 188 | When you do swapoff and make swapped-out pages of shmem(tmpfs) to | 191 | When you do swapoff and make swapped-out pages of shmem(tmpfs) to |
| 189 | be backed into memory in force, charges for pages are accounted against the | 192 | be backed into memory in force, charges for pages are accounted against the |
| 190 | caller of swapoff rather than the users of shmem. | 193 | caller of swapoff rather than the users of shmem. |
| 191 | 194 | ||
| 192 | |||
| 193 | 2.4 Swap Extension (CONFIG_CGROUP_MEM_RES_CTLR_SWAP) | 195 | 2.4 Swap Extension (CONFIG_CGROUP_MEM_RES_CTLR_SWAP) |
| 194 | 196 | ||
| 195 | Swap Extension allows you to record charge for swap. A swapped-in page is | 197 | Swap Extension allows you to record charge for swap. A swapped-in page is |
| @@ -374,14 +376,15 @@ cgroup might have some charge associated with it, even though all · 178 unmodified lines | |||
| 374 | tasks have migrated away from it. (because we charge against pages, not | 376 | tasks have migrated away from it. (because we charge against pages, not |
| 375 | against tasks.) | 377 | against tasks.) |
| 376 | 378 | ||
| 377 | Such charges are freed or moved to their parent. At moving, both of RSS | 379 | We move the stats to root (if use_hierarchy==0) or parent (if |
| 378 | and CACHES are moved to parent. | 380 | use_hierarchy==1), and no change on the charge except uncharging |
| 379 | rmdir() may return -EBUSY if freeing/moving fails. See 5.1 also. | 381 | from the child. |
| 380 | 382 | ||
| 381 | Charges recorded in swap information is not updated at removal of cgroup. | 383 | Charges recorded in swap information is not updated at removal of cgroup. |
| 382 | Recorded information is discarded and a cgroup which uses swap (swapcache) | 384 | Recorded information is discarded and a cgroup which uses swap (swapcache) |
| 383 | will be charged as a new owner of it. | 385 | will be charged as a new owner of it. |
| 384 | 386 | ||
| 387 | About use_hierarchy, see Section 6. | ||
| 385 | 388 | ||
| 386 | 5. Misc. interfaces. | 389 | 5. Misc. interfaces. |
| 387 | 390 | ||
| @@ -394,13 +397,15 @@ will be charged as a new owner of it. · 6 unmodified lines | |||
| 394 | 397 | ||
| 395 | Almost all pages tracked by this memory cgroup will be unmapped and freed. | 398 | Almost all pages tracked by this memory cgroup will be unmapped and freed. |
| 396 | Some pages cannot be freed because they are locked or in-use. Such pages are | 399 | Some pages cannot be freed because they are locked or in-use. Such pages are |
| 397 | moved to parent and this cgroup will be empty. This may return -EBUSY if | 400 | moved to parent(if use_hierarchy==1) or root (if use_hierarchy==0) and this |
| 398 | VM is too busy to free/move all pages immediately. | 401 | cgroup will be empty. |
| 399 | 402 | ||
| 400 | Typical use case of this interface is that calling this before rmdir(). | 403 | Typical use case of this interface is that calling this before rmdir(). |
| 401 | Because rmdir() moves all pages to parent, some out-of-use page caches can be | 404 | Because rmdir() moves all pages to parent, some out-of-use page caches can be |
| 402 | moved to the parent. If you want to avoid that, force_empty will be useful. | 405 | moved to the parent. If you want to avoid that, force_empty will be useful. |
| 403 | 406 | ||
| 407 | About use_hierarchy, see Section 6. | ||
| 408 | |||
| 404 | 5.2 stat file | 409 | 5.2 stat file |
| 405 | 410 | ||
| 406 | memory.stat file includes following statistics | 411 | memory.stat file includes following statistics |
| @@ -430,17 +435,10 @@ hierarchical_memory_limit - # of bytes of memory limit with regard to hierarchy · 23 unmodified lines | |||
| 430 | hierarchical_memsw_limit - # of bytes of memory+swap limit with regard to | 435 | hierarchical_memsw_limit - # of bytes of memory+swap limit with regard to |
| 431 | hierarchy under which memory cgroup is. | 436 | hierarchy under which memory cgroup is. |
| 432 | 437 | ||
| 433 | total_cache - sum of all children's "cache" | 438 | total_<counter> - # hierarchical version of <counter>, which in |
| 434 | total_rss - sum of all children's "rss" | 439 | addition to the cgroup's own value includes the |
| 435 | total_mapped_file - sum of all children's "cache" | 440 | sum of all hierarchical children's values of |
| 436 | total_pgpgin - sum of all children's "pgpgin" | 441 | <counter>, i.e. total_cache |
| 437 | total_pgpgout - sum of all children's "pgpgout" | ||
| 438 | total_swap - sum of all children's "swap" | ||
| 439 | total_inactive_anon - sum of all children's "inactive_anon" | ||
| 440 | total_active_anon - sum of all children's "active_anon" | ||
| 441 | total_inactive_file - sum of all children's "inactive_file" | ||
| 442 | total_active_file - sum of all children's "active_file" | ||
| 443 | total_unevictable - sum of all children's "unevictable" | ||
| 444 | 442 | ||
| 445 | # The following additional stats are dependent on CONFIG_DEBUG_VM. | 443 | # The following additional stats are dependent on CONFIG_DEBUG_VM. |
| 446 | 444 | ||
| @@ -622,8 +620,7 @@ memory cgroup. · 175 unmodified lines | |||
| 622 | bit | what type of charges would be moved ? | 620 | bit | what type of charges would be moved ? |
| 623 | -----+------------------------------------------------------------------------ | 621 | -----+------------------------------------------------------------------------ |
| 624 | 0 | A charge of an anonymous page(or swap of it) used by the target task. | 622 | 0 | A charge of an anonymous page(or swap of it) used by the target task. |
| 625 | | Those pages and swaps must be used only by the target task. You must | 623 | | You must enable Swap Extension(see 2.4) to enable move of swap charges. |
| 626 | | enable Swap Extension(see 2.4) to enable move of swap charges. | ||
| 627 | -----+------------------------------------------------------------------------ | 624 | -----+------------------------------------------------------------------------ |
| 628 | 1 | A charge of file pages(normal file, tmpfs file(e.g. ipc shared memory) | 625 | 1 | A charge of file pages(normal file, tmpfs file(e.g. ipc shared memory) |
| 629 | | and swaps of tmpfs file) mmapped by the target task. Unlike the case of | 626 | | and swaps of tmpfs file) mmapped by the target task. Unlike the case of |
| @@ -636,8 +633,6 @@ memory cgroup. · 6 unmodified lines | |||
| 636 | 633 | ||
| 637 | 8.3 TODO | 634 | 8.3 TODO |
| 638 | 635 | ||
| 639 | - Implement madvise(2) to let users decide the vma to be moved or not to be | ||
| 640 | moved. | ||
| 641 | - All of moving charge operations are done under cgroup_mutex. It's not good | 636 | - All of moving charge operations are done under cgroup_mutex. It's not good |
| 642 | behavior to hold the mutex too long, so we may need some trick. | 637 | behavior to hold the mutex too long, so we may need some trick. |
| 643 | 638 | ||
| @@ -77,11 +77,11 @@ to work with it. · 76 unmodified lines | |||
| 77 | where the charging failed. | 77 | where the charging failed. |
| 78 | 78 | ||
| 79 | d. int res_counter_charge_locked | 79 | d. int res_counter_charge_locked |
| 80 | (struct res_counter *rc, unsigned long val) | 80 | (struct res_counter *rc, unsigned long val, bool force) |
| 81 | 81 | ||
| 82 | The same as res_counter_charge(), but it must not acquire/release the | 82 | The same as res_counter_charge(), but it must not acquire/release the |
| 83 | res_counter->lock internally (it must be called with res_counter->lock | 83 | res_counter->lock internally (it must be called with res_counter->lock |
| 84 | held). | 84 | held). The force parameter indicates whether we can bypass the limit. |
| 85 | 85 | ||
| 86 | e. void res_counter_uncharge[_locked] | 86 | e. void res_counter_uncharge[_locked] |
| 87 | (struct res_counter *rc, unsigned long val) | 87 | (struct res_counter *rc, unsigned long val) |
| @@ -92,6 +92,14 @@ to work with it. · 4 unmodified lines | |||
| 92 | 92 | ||
| 93 | The _locked routines imply that the res_counter->lock is taken. | 93 | The _locked routines imply that the res_counter->lock is taken. |
| 94 | 94 | ||
| 95 | f. void res_counter_uncharge_until | ||
| 96 | (struct res_counter *rc, struct res_counter *top, | ||
| 97 | unsinged long val) | ||
| 98 | |||
| 99 | Almost same as res_cunter_uncharge() but propagation of uncharge | ||
| 100 | stops when rc == top. This is useful when kill a res_coutner in | ||
| 101 | child cgroup. | ||
| 102 | |||
| 95 | 2.1 Other accounting routines | 103 | 2.1 Other accounting routines |
| 96 | 104 | ||
| 97 | There are more routines that may help you with common needs, like | 105 | There are more routines that may help you with common needs, like |
| @@ -1,38 +1,34 @@ | |||
| 1 | Linux 2.4 on the CRIS architecture | 1 | Linux on the CRIS architecture |
| 2 | ================================== | 2 | ============================== |
| 3 | $Id: README,v 1.7 2001/04/19 12:38:32 bjornw Exp $ | ||
| 4 | 3 | ||
| 5 | This is a port of Linux 2.4 to Axis Communications ETRAX 100LX embedded | 4 | This is a port of Linux to Axis Communications ETRAX 100LX, |
| 6 | network CPU. For more information about CRIS and ETRAX please see further | 5 | ETRAX FS and ARTPEC-3 embedded network CPUs. |
| 7 | below. | 6 | |
| 7 | For more information about CRIS and ETRAX please see further below. | ||
| 8 | 8 | ||
| 9 | In order to compile this you need a version of gcc with support for the | 9 | In order to compile this you need a version of gcc with support for the |
| 10 | ETRAX chip family. Please see this link for more information on how to | 10 | ETRAX chip family. Please see this link for more information on how to |
| 11 | download the compiler and other tools useful when building and booting | 11 | download the compiler and other tools useful when building and booting |
| 12 | software for the ETRAX platform: | 12 | software for the ETRAX platform: |
| 13 | 13 | ||
| 14 | http://developer.axis.com/doc/software/devboard_lx/install-howto.html | 14 | http://developer.axis.com/wiki/doku.php?id=axis:install-howto-2_20 |
| 15 | |||
| 16 | <more specific information should come in this document later> | ||
| 17 | 15 | ||
| 18 | What is CRIS ? | 16 | What is CRIS ? |
| 19 | -------------- | 17 | -------------- |
| 20 | 18 | ||
| 21 | CRIS is an acronym for 'Code Reduced Instruction Set'. It is the CPU | 19 | CRIS is an acronym for 'Code Reduced Instruction Set'. It is the CPU |
| 22 | architecture in Axis Communication AB's range of embedded network CPU's, | 20 | architecture in Axis Communication AB's range of embedded network CPU's, |
| 23 | called ETRAX. The latest CPU is called ETRAX 100LX, where LX stands for | 21 | called ETRAX. |
| 24 | 'Linux' because the chip was designed to be a good host for the Linux | ||
| 25 | operating system. | ||
| 26 | 22 | ||
| 27 | The ETRAX 100LX chip | 23 | The ETRAX 100LX chip |
| 28 | -------------------- | 24 | -------------------- |
| 29 | 25 | ||
| 30 | For reference, please see the press-release: | 26 | For reference, please see the following link: |
| 31 | 27 | ||
| 32 | http://www.axis.com/news/us/001101_etrax.htm | 28 | http://www.axis.com/products/dev_etrax_100lx/index.htm |
| 33 | 29 | ||
| 34 | The ETRAX 100LX is a 100 MIPS processor with 8kB cache, MMU, and a very broad | 30 | The ETRAX 100LX is a 100 MIPS processor with 8kB cache, MMU, and a very broad |
| 35 | range of built-in interfaces, all with modern scatter/gather DMA. | 31 | range of built-in interfaces, all with modern scatter/gather DMA. |
| 36 | 32 | ||
| 37 | Memory interfaces: | 33 | Memory interfaces: |
| 38 | 34 | ||
| @@ -51,20 +47,28 @@ I/O interfaces: · 12 unmodified lines | |||
| 51 | * SCSI | 47 | * SCSI |
| 52 | * two parallel-ports | 48 | * two parallel-ports |
| 53 | * two generic 8-bit ports | 49 | * two generic 8-bit ports |
| 54 | 50 | ||
| 55 | (not all interfaces are available at the same time due to chip pin | 51 | (not all interfaces are available at the same time due to chip pin |
| 56 | multiplexing) | 52 | multiplexing) |
| 57 | 53 | ||
| 58 | The previous version of the ETRAX, the ETRAX 100, sits in almost all of | 54 | ETRAX 100LX is CRISv10 architecture. |
| 59 | Axis shipping thin-servers like the Axis 2100 web camera or the ETRAX 100 | 55 | |
| 60 | developer-board. It lacks an MMU so the Linux we run on that is a version | 56 | |
| 61 | of uClinux (Linux 2.0 without MM-support) ported to the CRIS architecture. | 57 | The ETRAX FS and ARTPEC-3 chips |
| 62 | The new Linux 2.4 port has full MM and needs a CPU with an MMU, so it will | 58 | ------------------------------- |
| 63 | not run on the ETRAX 100. | ||
| 64 | 59 | ||
| 65 | A version of the Axis developer-board with ETRAX 100LX (running Linux | 60 | The ETRAX FS is a 200MHz 32-bit RISC processor with on-chip 16kB |
| 66 | 2.4) is now available. For more information please see developer.axis.com. | 61 | I-cache and 16kB D-cache and with a wide range of device interfaces |
| 62 | including multiple high speed serial ports and an integrated USB 1.1 PHY. | ||
| 67 | 63 | ||
| 64 | The ARTPEC-3 is a variant of the ETRAX FS with additional IO-units | ||
| 65 | used by the Axis Communications network cameras. | ||
| 66 | |||
| 67 | See below link for more information: | ||
| 68 | |||
| 69 | http://www.axis.com/products/dev_etrax_fs/index.htm | ||
| 70 | |||
| 71 | ETRAX FS and ARTPEC-3 are both CRISv32 architectures. | ||
| 68 | 72 | ||
| 69 | Bootlog | 73 | Bootlog |
| 70 | ------- | 74 | ------- |
| @@ -182,10 +186,6 @@ SwapFree: 0 kB · 111 unmodified lines | |||
| 182 | -rwxr-xr-x 1 342 100 16252 Jan 01 00:00 telnetd | 186 | -rwxr-xr-x 1 342 100 16252 Jan 01 00:00 telnetd |
| 183 | 187 | ||
| 184 | 188 | ||
| 185 | (All programs are statically linked to the libc at this point - we have not ported the | ||
| 186 | shared libraries yet) | ||
| 187 | |||
| 188 | |||
| 189 | 189 | ||
| 190 | 190 | ||
| 191 | 191 | ||
| @@ -287,6 +287,17 @@ iii) Messages · 286 unmodified lines | |||
| 287 | the current transaction id is when you change it with this | 287 | the current transaction id is when you change it with this |
| 288 | compare-and-swap message. | 288 | compare-and-swap message. |
| 289 | 289 | ||
| 290 | reserve_metadata_snap | ||
| 291 | |||
| 292 | Reserve a copy of the data mapping btree for use by userland. | ||
| 293 | This allows userland to inspect the mappings as they were when | ||
| 294 | this message was executed. Use the pool's status command to | ||
| 295 | get the root block associated with the metadata snapshot. | ||
| 296 | |||
| 297 | release_metadata_snap | ||
| 298 | |||
| 299 | Release a previously reserved copy of the data mapping btree. | ||
| 300 | |||
| 290 | 'thin' target | 301 | 'thin' target |
| 291 | ------------- | 302 | ------------- |
| 292 | 303 | ||
| @@ -98,7 +98,8 @@ Your cooperation is appreciated. · 97 unmodified lines | |||
| 98 | 8 = /dev/random Nondeterministic random number gen. | 98 | 8 = /dev/random Nondeterministic random number gen. |
| 99 | 9 = /dev/urandom Faster, less secure random number gen. | 99 | 9 = /dev/urandom Faster, less secure random number gen. |
| 100 | 10 = /dev/aio Asynchronous I/O notification interface | 100 | 10 = /dev/aio Asynchronous I/O notification interface |
| 101 | 11 = /dev/kmsg Writes to this come out as printk's | 101 | 11 = /dev/kmsg Writes to this come out as printk's, reads |
| 102 | export the buffered printk records. | ||
| 102 | 12 = /dev/oldmem Used by crashdump kernels to access | 103 | 12 = /dev/oldmem Used by crashdump kernels to access |
| 103 | the memory of the kernel that crashed. | 104 | the memory of the kernel that crashed. |
| 104 | 105 | ||
| @@ -846,13 +847,7 @@ Your cooperation is appreciated. · 741 unmodified lines | |||
| 846 | ... | 847 | ... |
| 847 | 31 = /dev/tap15 16th Ethertap device | 848 | 31 = /dev/tap15 16th Ethertap device |
| 848 | 849 | ||
| 849 | 36 block MCA ESDI hard disk | 850 | 36 block OBSOLETE (was MCA ESDI hard disk) |
| 850 | 0 = /dev/eda First ESDI disk whole disk | ||
| 851 | 64 = /dev/edb Second ESDI disk whole disk | ||
| 852 | ... | ||
| 853 | |||
| 854 | Partitions are handled in the same way as IDE disks | ||
| 855 | (see major number 3). | ||
| 856 | 851 | ||
| 857 | 37 char IDE tape | 852 | 37 char IDE tape |
| 858 | 0 = /dev/ht0 First IDE tape | 853 | 0 = /dev/ht0 First IDE tape |
| @@ -0,0 +1,27 @@ | |||
| 1 | * ARM architected timer | ||
| 2 | |||
| 3 | ARM Cortex-A7 and Cortex-A15 have a per-core architected timer, which | ||
| 4 | provides per-cpu timers. | ||
| 5 | |||
| 6 | The timer is attached to a GIC to deliver its per-processor interrupts. | ||
| 7 | |||
| 8 | ** Timer node properties: | ||
| 9 | |||
| 10 | - compatible : Should at least contain "arm,armv7-timer". | ||
| 11 | |||
| 12 | - interrupts : Interrupt list for secure, non-secure, virtual and | ||
| 13 | hypervisor timers, in that order. | ||
| 14 | |||
| 15 | - clock-frequency : The frequency of the main counter, in Hz. Optional. | ||
| 16 | |||
| 17 | Example: | ||
| 18 | |||
| 19 | timer { | ||
| 20 | compatible = "arm,cortex-a15-timer", | ||
| 21 | "arm,armv7-timer"; | ||
| 22 | interrupts = <1 13 0xf08>, | ||
| 23 | <1 14 0xf08>, | ||
| 24 | <1 11 0xf08>, | ||
| 25 | <1 10 0xf08>; | ||
| 26 | clock-frequency = <100000000>; | ||
| 27 | }; | ||
| @@ -0,0 +1,65 @@ | |||
| 1 | * AT91's Analog to Digital Converter (ADC) | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: Should be "atmel,at91sam9260-adc" | ||
| 5 | - reg: Should contain ADC registers location and length | ||
| 6 | - interrupts: Should contain the IRQ line for the ADC | ||
| 7 | - atmel,adc-channel-base: Offset of the first channel data register | ||
| 8 | - atmel,adc-channels-used: Bitmask of the channels muxed and enable for this | ||
| 9 | device | ||
| 10 | - atmel,adc-drdy-mask: Mask of the DRDY interruption in the ADC | ||
| 11 | - atmel,adc-num-channels: Number of channels available in the ADC | ||
| 12 | - atmel,adc-startup-time: Startup Time of the ADC in microseconds as | ||
| 13 | defined in the datasheet | ||
| 14 | - atmel,adc-status-register: Offset of the Interrupt Status Register | ||
| 15 | - atmel,adc-trigger-register: Offset of the Trigger Register | ||
| 16 | - atmel,adc-vref: Reference voltage in millivolts for the conversions | ||
| 17 | |||
| 18 | Optional properties: | ||
| 19 | - atmel,adc-use-external: Boolean to enable of external triggers | ||
| 20 | |||
| 21 | Optional trigger Nodes: | ||
| 22 | - Required properties: | ||
| 23 | * trigger-name: Name of the trigger exposed to the user | ||
| 24 | * trigger-value: Value to put in the Trigger register | ||
| 25 | to activate this trigger | ||
| 26 | - Optional properties: | ||
| 27 | * trigger-external: Is the trigger an external trigger? | ||
| 28 | |||
| 29 | Examples: | ||
| 30 | adc0: adc@fffb0000 { | ||
| 31 | compatible = "atmel,at91sam9260-adc"; | ||
| 32 | reg = <0xfffb0000 0x100>; | ||
| 33 | interrupts = <20 4>; | ||
| 34 | atmel,adc-channel-base = <0x30>; | ||
| 35 | atmel,adc-channels-used = <0xff>; | ||
| 36 | atmel,adc-drdy-mask = <0x10000>; | ||
| 37 | atmel,adc-num-channels = <8>; | ||
| 38 | atmel,adc-startup-time = <40>; | ||
| 39 | atmel,adc-status-register = <0x1c>; | ||
| 40 | atmel,adc-trigger-register = <0x08>; | ||
| 41 | atmel,adc-use-external; | ||
| 42 | atmel,adc-vref = <3300>; | ||
| 43 | |||
| 44 | trigger@0 { | ||
| 45 | trigger-name = "external-rising"; | ||
| 46 | trigger-value = <0x1>; | ||
| 47 | trigger-external; | ||
| 48 | }; | ||
| 49 | trigger@1 { | ||
| 50 | trigger-name = "external-falling"; | ||
| 51 | trigger-value = <0x2>; | ||
| 52 | trigger-external; | ||
| 53 | }; | ||
| 54 | |||
| 55 | trigger@2 { | ||
| 56 | trigger-name = "external-any"; | ||
| 57 | trigger-value = <0x3>; | ||
| 58 | trigger-external; | ||
| 59 | }; | ||
| 60 | |||
| 61 | trigger@3 { | ||
| 62 | trigger-name = "continuous"; | ||
| 63 | trigger-value = <0x6>; | ||
| 64 | }; | ||
| 65 | }; | ||
| @@ -1,6 +1,14 @@ | |||
| 1 | Freescale i.MX Platforms Device Tree Bindings | 1 | Freescale i.MX Platforms Device Tree Bindings |
| 2 | ----------------------------------------------- | 2 | ----------------------------------------------- |
| 3 | 3 | ||
| 4 | i.MX23 Evaluation Kit | ||
| 5 | Required root node properties: | ||
| 6 | - compatible = "fsl,imx23-evk", "fsl,imx23"; | ||
| 7 | |||
| 8 | i.MX28 Evaluation Kit | ||
| 9 | Required root node properties: | ||
| 10 | - compatible = "fsl,imx28-evk", "fsl,imx28"; | ||
| 11 | |||
| 4 | i.MX51 Babbage Board | 12 | i.MX51 Babbage Board |
| 5 | Required root node properties: | 13 | Required root node properties: |
| 6 | - compatible = "fsl,imx51-babbage", "fsl,imx51"; | 14 | - compatible = "fsl,imx51-babbage", "fsl,imx51"; |
| @@ -29,6 +37,10 @@ i.MX6 Quad SABRE Lite Board · 22 unmodified lines | |||
| 29 | Required root node properties: | 37 | Required root node properties: |
| 30 | - compatible = "fsl,imx6q-sabrelite", "fsl,imx6q"; | 38 | - compatible = "fsl,imx6q-sabrelite", "fsl,imx6q"; |
| 31 | 39 | ||
| 40 | i.MX6 Quad SABRE Smart Device Board | ||
| 41 | Required root node properties: | ||
| 42 | - compatible = "fsl,imx6q-sabresd", "fsl,imx6q"; | ||
| 43 | |||
| 32 | Generic i.MX boards | 44 | Generic i.MX boards |
| 33 | ------------------- | 45 | ------------------- |
| 34 | 46 | ||
| @@ -11,7 +11,9 @@ have PPIs or SGIs. · 10 unmodified lines | |||
| 11 | Main node required properties: | 11 | Main node required properties: |
| 12 | 12 | ||
| 13 | - compatible : should be one of: | 13 | - compatible : should be one of: |
| 14 | "arm,cortex-a15-gic" | ||
| 14 | "arm,cortex-a9-gic" | 15 | "arm,cortex-a9-gic" |
| 16 | "arm,cortex-a7-gic" | ||
| 15 | "arm,arm11mp-gic" | 17 | "arm,arm11mp-gic" |
| 16 | - interrupt-controller : Identifies the node as an interrupt controller | 18 | - interrupt-controller : Identifies the node as an interrupt controller |
| 17 | - #interrupt-cells : Specifies the number of cells needed to encode an | 19 | - #interrupt-cells : Specifies the number of cells needed to encode an |
| @@ -39,8 +41,9 @@ Main node required properties: · 21 unmodified lines | |||
| 39 | the GIC cpu interface register base and size. | 41 | the GIC cpu interface register base and size. |
| 40 | 42 | ||
| 41 | Optional | 43 | Optional |
| 42 | - interrupts : Interrupt source of the parent interrupt controller. Only | 44 | - interrupts : Interrupt source of the parent interrupt controller on |
| 43 | present on secondary GICs. | 45 | secondary GICs, or VGIC maintainance interrupt on primary GIC (see |
| 46 | below). | ||
| 44 | 47 | ||
| 45 | - cpu-offset : per-cpu offset within the distributor and cpu interface | 48 | - cpu-offset : per-cpu offset within the distributor and cpu interface |
| 46 | regions, used when the GIC doesn't have banked registers. The offset is | 49 | regions, used when the GIC doesn't have banked registers. The offset is |
| @@ -57,3 +60,31 @@ Example: · 10 unmodified lines | |||
| 57 | <0xfff10100 0x100>; | 60 | <0xfff10100 0x100>; |
| 58 | }; | 61 | }; |
| 59 | 62 | ||
| 63 | |||
| 64 | * GIC virtualization extensions (VGIC) | ||
| 65 | |||
| 66 | For ARM cores that support the virtualization extensions, additional | ||
| 67 | properties must be described (they only exist if the GIC is the | ||
| 68 | primary interrupt controller). | ||
| 69 | |||
| 70 | Required properties: | ||
| 71 | |||
| 72 | - reg : Additional regions specifying the base physical address and | ||
| 73 | size of the VGIC registers. The first additional region is the GIC | ||
| 74 | virtual interface control register base and size. The 2nd additional | ||
| 75 | region is the GIC virtual cpu interface register base and size. | ||
| 76 | |||
| 77 | - interrupts : VGIC maintainance interrupt. | ||
| 78 | |||
| 79 | Example: | ||
| 80 | |||
| 81 | interrupt-controller@2c001000 { | ||
| 82 | compatible = "arm,cortex-a15-gic"; | ||
| 83 | #interrupt-cells = <3>; | ||
| 84 | interrupt-controller; | ||
| 85 | reg = <0x2c001000 0x1000>, | ||
| 86 | <0x2c002000 0x1000>, | ||
| 87 | <0x2c004000 0x2000>, | ||
| 88 | <0x2c006000 0x2000>; | ||
| 89 | interrupts = <1 9 0xf04>; | ||
| 90 | }; | ||
| @@ -0,0 +1,38 @@ | |||
| 1 | * NXP LPC32xx Main Interrupt Controller | ||
| 2 | (MIC, including SIC1 and SIC2 secondary controllers) | ||
| 3 | |||
| 4 | Required properties: | ||
| 5 | - compatible: Should be "nxp,lpc3220-mic" | ||
| 6 | - interrupt-controller: Identifies the node as an interrupt controller. | ||
| 7 | - interrupt-parent: Empty for the interrupt controller itself | ||
| 8 | - #interrupt-cells: The number of cells to define the interrupts. Should be 2. | ||
| 9 | The first cell is the IRQ number | ||
| 10 | The second cell is used to specify mode: | ||
| 11 | 1 = low-to-high edge triggered | ||
| 12 | 2 = high-to-low edge triggered | ||
| 13 | 4 = active high level-sensitive | ||
| 14 | 8 = active low level-sensitive | ||
| 15 | Default for internal sources should be set to 4 (active high). | ||
| 16 | - reg: Should contain MIC registers location and length | ||
| 17 | |||
| 18 | Examples: | ||
| 19 | /* | ||
| 20 | * MIC | ||
| 21 | */ | ||
| 22 | mic: interrupt-controller@40008000 { | ||
| 23 | compatible = "nxp,lpc3220-mic"; | ||
| 24 | interrupt-controller; | ||
| 25 | interrupt-parent; | ||
| 26 | #interrupt-cells = <2>; | ||
| 27 | reg = <0x40008000 0xC000>; | ||
| 28 | }; | ||
| 29 | |||
| 30 | /* | ||
| 31 | * ADC | ||
| 32 | */ | ||
| 33 | adc@40048000 { | ||
| 34 | compatible = "nxp,lpc3220-adc"; | ||
| 35 | reg = <0x40048000 0x1000>; | ||
| 36 | interrupt-parent = <&mic>; | ||
| 37 | interrupts = <39 4>; | ||
| 38 | }; | ||
| @@ -0,0 +1,8 @@ | |||
| 1 | NXP LPC32xx Platforms Device Tree Bindings | ||
| 2 | ------------------------------------------ | ||
| 3 | |||
| 4 | Boards with the NXP LPC32xx SoC shall have the following properties: | ||
| 5 | |||
| 6 | Required root node property: | ||
| 7 | |||
| 8 | compatible: must be "nxp,lpc3220", "nxp,lpc3230", "nxp,lpc3240" or "nxp,lpc3250" | ||
| @@ -0,0 +1,40 @@ | |||
| 1 | * Marvell MMP Interrupt controller | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible : Should be "mrvl,mmp-intc", "mrvl,mmp2-intc" or | ||
| 5 | "mrvl,mmp2-mux-intc" | ||
| 6 | - reg : Address and length of the register set of the interrupt controller. | ||
| 7 | If the interrupt controller is intc, address and length means the range | ||
| 8 | of the whold interrupt controller. If the interrupt controller is mux-intc, | ||
| 9 | address and length means one register. Since address of mux-intc is in the | ||
| 10 | range of intc. mux-intc is secondary interrupt controller. | ||
| 11 | - reg-names : Name of the register set of the interrupt controller. It's | ||
| 12 | only required in mux-intc interrupt controller. | ||
| 13 | - interrupts : Should be the port interrupt shared by mux interrupts. It's | ||
| 14 | only required in mux-intc interrupt controller. | ||
| 15 | - interrupt-controller : Identifies the node as an interrupt controller. | ||
| 16 | - #interrupt-cells : Specifies the number of cells needed to encode an | ||
| 17 | interrupt source. | ||
| 18 | - mrvl,intc-nr-irqs : Specifies the number of interrupts in the interrupt | ||
| 19 | controller. | ||
| 20 | - mrvl,clr-mfp-irq : Specifies the interrupt that needs to clear MFP edge | ||
| 21 | detection first. | ||
| 22 | |||
| 23 | Example: | ||
| 24 | intc: interrupt-controller@d4282000 { | ||
| 25 | compatible = "mrvl,mmp2-intc"; | ||
| 26 | interrupt-controller; | ||
| 27 | #interrupt-cells = <1>; | ||
| 28 | reg = <0xd4282000 0x1000>; | ||
| 29 | mrvl,intc-nr-irqs = <64>; | ||
| 30 | }; | ||
| 31 | |||
| 32 | intcmux4@d4282150 { | ||
| 33 | compatible = "mrvl,mmp2-mux-intc"; | ||
| 34 | interrupts = <4>; | ||
| 35 | interrupt-controller; | ||
| 36 | #interrupt-cells = <1>; | ||
| 37 | reg = <0x150 0x4>, <0x168 0x4>; | ||
| 38 | reg-names = "mux status", "mux mask"; | ||
| 39 | mrvl,intc-nr-irqs = <2>; | ||
| 40 | }; | ||
| @@ -4,3 +4,11 @@ Marvell Platforms Device Tree Bindings · 3 unmodified lines | |||
| 4 | PXA168 Aspenite Board | 4 | PXA168 Aspenite Board |
| 5 | Required root node properties: | 5 | Required root node properties: |
| 6 | - compatible = "mrvl,pxa168-aspenite", "mrvl,pxa168"; | 6 | - compatible = "mrvl,pxa168-aspenite", "mrvl,pxa168"; |
| 7 | |||
| 8 | PXA910 DKB Board | ||
| 9 | Required root node properties: | ||
| 10 | - compatible = "mrvl,pxa910-dkb"; | ||
| 11 | |||
| 12 | MMP2 Brownstone Board | ||
| 13 | Required root node properties: | ||
| 14 | - compatible = "mrvl,mmp2-brownstone"; | ||
| @@ -0,0 +1,13 @@ | |||
| 1 | * Marvell MMP Timer controller | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible : Should be "mrvl,mmp-timer". | ||
| 5 | - reg : Address and length of the register set of timer controller. | ||
| 6 | - interrupts : Should be the interrupt number. | ||
| 7 | |||
| 8 | Example: | ||
| 9 | timer0: timer@d4014000 { | ||
| 10 | compatible = "mrvl,mmp-timer"; | ||
| 11 | reg = <0xd4014000 0x100>; | ||
| 12 | interrupts = <13>; | ||
| 13 | }; | ||
| @@ -0,0 +1,52 @@ | |||
| 1 | * Samsung Exynos Interrupt Combiner Controller | ||
| 2 | |||
| 3 | Samsung's Exynos4 architecture includes a interrupt combiner controller which | ||
| 4 | can combine interrupt sources as a group and provide a single interrupt request | ||
| 5 | for the group. The interrupt request from each group are connected to a parent | ||
| 6 | interrupt controller, such as GIC in case of Exynos4210. | ||
| 7 | |||
| 8 | The interrupt combiner controller consists of multiple combiners. Upto eight | ||
| 9 | interrupt sources can be connected to a combiner. The combiner outputs one | ||
| 10 | combined interrupt for its eight interrupt sources. The combined interrupt | ||
| 11 | is usually connected to a parent interrupt controller. | ||
| 12 | |||
| 13 | A single node in the device tree is used to describe the interrupt combiner | ||
| 14 | controller module (which includes multiple combiners). A combiner in the | ||
| 15 | interrupt controller module shares config/control registers with other | ||
| 16 | combiners. For example, a 32-bit interrupt enable/disable config register | ||
| 17 | can accommodate upto 4 interrupt combiners (with each combiner supporting | ||
| 18 | upto 8 interrupt sources). | ||
| 19 | |||
| 20 | Required properties: | ||
| 21 | - compatible: should be "samsung,exynos4210-combiner". | ||
| 22 | - interrupt-controller: Identifies the node as an interrupt controller. | ||
| 23 | - #interrupt-cells: should be <2>. The meaning of the cells are | ||
| 24 | * First Cell: Combiner Group Number. | ||
| 25 | * Second Cell: Interrupt number within the group. | ||
| 26 | - reg: Base address and size of interrupt combiner registers. | ||
| 27 | - interrupts: The list of interrupts generated by the combiners which are then | ||
| 28 | connected to a parent interrupt controller. The format of the interrupt | ||
| 29 | specifier depends in the interrupt parent controller. | ||
| 30 | |||
| 31 | Optional properties: | ||
| 32 | - samsung,combiner-nr: The number of interrupt combiners supported. If this | ||
| 33 | property is not specified, the default number of combiners is assumed | ||
| 34 | to be 16. | ||
| 35 | - interrupt-parent: pHandle of the parent interrupt controller, if not | ||
| 36 | inherited from the parent node. | ||
| 37 | |||
| 38 | |||
| 39 | Example: | ||
| 40 | |||
| 41 | The following is a an example from the Exynos4210 SoC dtsi file. | ||
| 42 | |||
| 43 | combiner:interrupt-controller@10440000 { | ||
| 44 | compatible = "samsung,exynos4210-combiner"; | ||
| 45 | interrupt-controller; | ||
| 46 | #interrupt-cells = <2>; | ||
| 47 | reg = <0x10440000 0x1000>; | ||
| 48 | interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, | ||
| 49 | <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, | ||
| 50 | <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, | ||
| 51 | <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>; | ||
| 52 | }; | ||
| @@ -0,0 +1,18 @@ | |||
| 1 | * SPEAr ARM Timer | ||
| 2 | |||
| 3 | ** Timer node required properties: | ||
| 4 | |||
| 5 | - compatible : Should be: | ||
| 6 | "st,spear-timer" | ||
| 7 | - reg: Address range of the timer registers | ||
| 8 | - interrupt-parent: Should be the phandle for the interrupt controller | ||
| 9 | that services interrupts for this device | ||
| 10 | - interrupt: Should contain the timer interrupt number | ||
| 11 | |||
| 12 | Example: | ||
| 13 | |||
| 14 | timer@f0000000 { | ||
| 15 | compatible = "st,spear-timer"; | ||
| 16 | reg = <0xf0000000 0x400>; | ||
| 17 | interrupts = <2>; | ||
| 18 | }; | ||
| @@ -2,7 +2,25 @@ ST SPEAr Platforms Device Tree Bindings · 1 unmodified line | |||
| 2 | --------------------------------------- | 2 | --------------------------------------- |
| 3 | 3 | ||
| 4 | Boards with the ST SPEAr600 SoC shall have the following properties: | 4 | Boards with the ST SPEAr600 SoC shall have the following properties: |
| 5 | Required root node property: | ||
| 6 | compatible = "st,spear600"; | ||
| 5 | 7 | ||
| 8 | Boards with the ST SPEAr300 SoC shall have the following properties: | ||
| 6 | Required root node property: | 9 | Required root node property: |
| 10 | compatible = "st,spear300"; | ||
| 7 | 11 | ||
| 8 | compatible = "st,spear600"; | 12 | Boards with the ST SPEAr310 SoC shall have the following properties: |
| 13 | Required root node property: | ||
| 14 | compatible = "st,spear310"; | ||
| 15 | |||
| 16 | Boards with the ST SPEAr320 SoC shall have the following properties: | ||
| 17 | Required root node property: | ||
| 18 | compatible = "st,spear320"; | ||
| 19 | |||
| 20 | Boards with the ST SPEAr1310 SoC shall have the following properties: | ||
| 21 | Required root node property: | ||
| 22 | compatible = "st,spear1310"; | ||
| 23 | |||
| 24 | Boards with the ST SPEAr1340 SoC shall have the following properties: | ||
| 25 | Required root node property: | ||
| 26 | compatible = "st,spear1340"; | ||
| @@ -0,0 +1,11 @@ | |||
| 1 | NVIDIA Tegra AHB | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible : "nvidia,tegra20-ahb" or "nvidia,tegra30-ahb" | ||
| 5 | - reg : Should contain 1 register ranges(address and length) | ||
| 6 | |||
| 7 | Example: | ||
| 8 | ahb: ahb@6000c004 { | ||
| 9 | compatible = "nvidia,tegra20-ahb"; | ||
| 10 | reg = <0x6000c004 0x10c>; /* AHB Arbitration + Gizmo Controller */ | ||
| 11 | }; | ||
| @@ -0,0 +1,16 @@ | |||
| 1 | NVIDIA Tegra20 MC(Memory Controller) | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible : "nvidia,tegra20-mc" | ||
| 5 | - reg : Should contain 2 register ranges(address and length); see the | ||
| 6 | example below. Note that the MC registers are interleaved with the | ||
| 7 | GART registers, and hence must be represented as multiple ranges. | ||
| 8 | - interrupts : Should contain MC General interrupt. | ||
| 9 | |||
| 10 | Example: | ||
| 11 | mc { | ||
| 12 | compatible = "nvidia,tegra20-mc"; | ||
| 13 | reg = <0x7000f000 0x024 | ||
| 14 | 0x7000f03c 0x3c4>; | ||
| 15 | interrupts = <0 77 0x04>; | ||
| 16 | }; | ||
| @@ -0,0 +1,18 @@ | |||
| 1 | NVIDIA Tegra30 MC(Memory Controller) | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible : "nvidia,tegra30-mc" | ||
| 5 | - reg : Should contain 4 register ranges(address and length); see the | ||
| 6 | example below. Note that the MC registers are interleaved with the | ||
| 7 | SMMU registers, and hence must be represented as multiple ranges. | ||
| 8 | - interrupts : Should contain MC General interrupt. | ||
| 9 | |||
| 10 | Example: | ||
| 11 | mc { | ||
| 12 | compatible = "nvidia,tegra30-mc"; | ||
| 13 | reg = <0x7000f000 0x010 | ||
| 14 | 0x7000f03c 0x1b4 | ||
| 15 | 0x7000f200 0x028 | ||
| 16 | 0x7000f284 0x17c>; | ||
| 17 | interrupts = <0 77 0x04>; | ||
| 18 | }; | ||
| @@ -0,0 +1,19 @@ | |||
| 1 | * Freescale MXS DMA | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible : Should be "fsl,<chip>-dma-apbh" or "fsl,<chip>-dma-apbx" | ||
| 5 | - reg : Should contain registers location and length | ||
| 6 | |||
| 7 | Supported chips: | ||
| 8 | imx23, imx28. | ||
| 9 | |||
| 10 | Examples: | ||
| 11 | dma-apbh@80004000 { | ||
| 12 | compatible = "fsl,imx28-dma-apbh"; | ||
| 13 | reg = <0x80004000 2000>; | ||
| 14 | }; | ||
| 15 | |||
| 16 | dma-apbx@80024000 { | ||
| 17 | compatible = "fsl,imx28-dma-apbx"; | ||
| 18 | reg = <0x80024000 2000>; | ||
| 19 | }; | ||
| @@ -0,0 +1,17 @@ | |||
| 1 | * Synopsys Designware DMA Controller | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: "snps,dma-spear1340" | ||
| 5 | - reg: Address range of the DMAC registers | ||
| 6 | - interrupt-parent: Should be the phandle for the interrupt controller | ||
| 7 | that services interrupts for this device | ||
| 8 | - interrupt: Should contain the DMAC interrupt number | ||
| 9 | |||
| 10 | Example: | ||
| 11 | |||
| 12 | dma@fc000000 { | ||
| 13 | compatible = "snps,dma-spear1340"; | ||
| 14 | reg = <0xfc000000 0x1000>; | ||
| 15 | interrupt-parent = <&vic1>; | ||
| 16 | interrupts = <12>; | ||
| 17 | }; | ||
| @@ -0,0 +1,38 @@ | |||
| 1 | Lantiq SoC External Bus memory mapped GPIO controller | ||
| 2 | |||
| 3 | By attaching hardware latches to the EBU it is possible to create output | ||
| 4 | only gpios. This driver configures a special memory address, which when | ||
| 5 | written to outputs 16 bit to the latches. | ||
| 6 | |||
| 7 | The node describing the memory mapped GPIOs needs to be a child of the node | ||
| 8 | describing the "lantiq,localbus". | ||
| 9 | |||
| 10 | Required properties: | ||
| 11 | - compatible : Should be "lantiq,gpio-mm-lantiq" | ||
| 12 | - reg : Address and length of the register set for the device | ||
| 13 | - #gpio-cells : Should be two. The first cell is the pin number and | ||
| 14 | the second cell is used to specify optional parameters (currently | ||
| 15 | unused). | ||
| 16 | - gpio-controller : Marks the device node as a gpio controller. | ||
| 17 | |||
| 18 | Optional properties: | ||
| 19 | - lantiq,shadow : The default value that we shall assume as already set on the | ||
| 20 | shift register cascade. | ||
| 21 | |||
| 22 | Example: | ||
| 23 | |||
| 24 | localbus@0 { | ||
| 25 | #address-cells = <2>; | ||
| 26 | #size-cells = <1>; | ||
| 27 | ranges = <0 0 0x0 0x3ffffff /* addrsel0 */ | ||
| 28 | 1 0 0x4000000 0x4000010>; /* addsel1 */ | ||
| 29 | compatible = "lantiq,localbus", "simple-bus"; | ||
| 30 | |||
| 31 | gpio_mm0: gpio@4000000 { | ||
| 32 | compatible = "lantiq,gpio-mm"; | ||
| 33 | reg = <1 0x0 0x10>; | ||
| 34 | gpio-controller; | ||
| 35 | #gpio-cells = <2>; | ||
| 36 | lantiq,shadow = <0x77f> | ||
| 37 | }; | ||
| 38 | } | ||
| @@ -0,0 +1,87 @@ | |||
| 1 | * Freescale MXS GPIO controller | ||
| 2 | |||
| 3 | The Freescale MXS GPIO controller is part of MXS PIN controller. The | ||
| 4 | GPIOs are organized in port/bank. Each port consists of 32 GPIOs. | ||
| 5 | |||
| 6 | As the GPIO controller is embedded in the PIN controller and all the | ||
| 7 | GPIO ports share the same IO space with PIN controller, the GPIO node | ||
| 8 | will be represented as sub-nodes of MXS pinctrl node. | ||
| 9 | |||
| 10 | Required properties for GPIO node: | ||
| 11 | - compatible : Should be "fsl,<soc>-gpio". The supported SoCs include | ||
| 12 | imx23 and imx28. | ||
| 13 | - interrupts : Should be the port interrupt shared by all 32 pins. | ||
| 14 | - gpio-controller : Marks the device node as a gpio controller. | ||
| 15 | - #gpio-cells : Should be two. The first cell is the pin number and | ||
| 16 | the second cell is used to specify optional parameters (currently | ||
| 17 | unused). | ||
| 18 | - interrupt-controller: Marks the device node as an interrupt controller. | ||
| 19 | - #interrupt-cells : Should be 2. The first cell is the GPIO number. | ||
| 20 | The second cell bits[3:0] is used to specify trigger type and level flags: | ||
| 21 | 1 = low-to-high edge triggered. | ||
| 22 | 2 = high-to-low edge triggered. | ||
| 23 | 4 = active high level-sensitive. | ||
| 24 | 8 = active low level-sensitive. | ||
| 25 | |||
| 26 | Note: Each GPIO port should have an alias correctly numbered in "aliases" | ||
| 27 | node. | ||
| 28 | |||
| 29 | Examples: | ||
| 30 | |||
| 31 | aliases { | ||
| 32 | gpio0 = &gpio0; | ||
| 33 | gpio1 = &gpio1; | ||
| 34 | gpio2 = &gpio2; | ||
| 35 | gpio3 = &gpio3; | ||
| 36 | gpio4 = &gpio4; | ||
| 37 | }; | ||
| 38 | |||
| 39 | pinctrl@80018000 { | ||
| 40 | compatible = "fsl,imx28-pinctrl", "simple-bus"; | ||
| 41 | reg = <0x80018000 2000>; | ||
| 42 | |||
| 43 | gpio0: gpio@0 { | ||
| 44 | compatible = "fsl,imx28-gpio"; | ||
| 45 | interrupts = <127>; | ||
| 46 | gpio-controller; | ||
| 47 | #gpio-cells = <2>; | ||
| 48 | interrupt-controller; | ||
| 49 | #interrupt-cells = <2>; | ||
| 50 | }; | ||
| 51 | |||
| 52 | gpio1: gpio@1 { | ||
| 53 | compatible = "fsl,imx28-gpio"; | ||
| 54 | interrupts = <126>; | ||
| 55 | gpio-controller; | ||
| 56 | #gpio-cells = <2>; | ||
| 57 | interrupt-controller; | ||
| 58 | #interrupt-cells = <2>; | ||
| 59 | }; | ||
| 60 | |||
| 61 | gpio2: gpio@2 { | ||
| 62 | compatible = "fsl,imx28-gpio"; | ||
| 63 | interrupts = <125>; | ||
| 64 | gpio-controller; | ||
| 65 | #gpio-cells = <2>; | ||
| 66 | interrupt-controller; | ||
| 67 | #interrupt-cells = <2>; | ||
| 68 | }; | ||
| 69 | |||
| 70 | gpio3: gpio@3 { | ||
| 71 | compatible = "fsl,imx28-gpio"; | ||
| 72 | interrupts = <124>; | ||
| 73 | gpio-controller; | ||
| 74 | #gpio-cells = <2>; | ||
| 75 | interrupt-controller; | ||
| 76 | #interrupt-cells = <2>; | ||
| 77 | }; | ||
| 78 | |||
| 79 | gpio4: gpio@4 { | ||
| 80 | compatible = "fsl,imx28-gpio"; | ||
| 81 | interrupts = <123>; | ||
| 82 | gpio-controller; | ||
| 83 | #gpio-cells = <2>; | ||
| 84 | interrupt-controller; | ||
| 85 | #interrupt-cells = <2>; | ||
| 86 | }; | ||
| 87 | }; | ||
| @@ -0,0 +1,31 @@ | |||
| 1 | Nomadik GPIO controller | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible : Should be "st,nomadik-gpio". | ||
| 5 | - reg : Physical base address and length of the controller's registers. | ||
| 6 | - interrupts : The interrupt outputs from the controller. | ||
| 7 | - #gpio-cells : Should be two: | ||
| 8 | The first cell is the pin number. | ||
| 9 | The second cell is used to specify optional parameters: | ||
| 10 | - bits[3:0] trigger type and level flags: | ||
| 11 | 1 = low-to-high edge triggered. | ||
| 12 | 2 = high-to-low edge triggered. | ||
| 13 | 4 = active high level-sensitive. | ||
| 14 | 8 = active low level-sensitive. | ||
| 15 | - gpio-controller : Marks the device node as a GPIO controller. | ||
| 16 | - interrupt-controller : Marks the device node as an interrupt controller. | ||
| 17 | - gpio-bank : Specifies which bank a controller owns. | ||
| 18 | - st,supports-sleepmode : Specifies whether controller can sleep or not | ||
| 19 | |||
| 20 | Example: | ||
| 21 | |||
| 22 | gpio1: gpio@8012e080 { | ||
| 23 | compatible = "st,nomadik-gpio"; | ||
| 24 | reg = <0x8012e080 0x80>; | ||
| 25 | interrupts = <0 120 0x4>; | ||
| 26 | #gpio-cells = <2>; | ||
| 27 | gpio-controller; | ||
| 28 | interrupt-controller; | ||
| 29 | supports-sleepmode; | ||
| 30 | gpio-bank = <1>; | ||
| 31 | }; | ||
| @@ -0,0 +1,42 @@ | |||
| 1 | Lantiq SoC Serial To Parallel (STP) GPIO controller | ||
| 2 | |||
| 3 | The Serial To Parallel (STP) is found on MIPS based Lantiq socs. It is a | ||
| 4 | peripheral controller used to drive external shift register cascades. At most | ||
| 5 | 3 groups of 8 bits can be driven. The hardware is able to allow the DSL modem | ||
| 6 | to drive the 2 LSBs of the cascade automatically. | ||
| 7 | |||
| 8 | |||
| 9 | Required properties: | ||
| 10 | - compatible : Should be "lantiq,gpio-stp-xway" | ||
| 11 | - reg : Address and length of the register set for the device | ||
| 12 | - #gpio-cells : Should be two. The first cell is the pin number and | ||
| 13 | the second cell is used to specify optional parameters (currently | ||
| 14 | unused). | ||
| 15 | - gpio-controller : Marks the device node as a gpio controller. | ||
| 16 | |||
| 17 | Optional properties: | ||
| 18 | - lantiq,shadow : The default value that we shall assume as already set on the | ||
| 19 | shift register cascade. | ||
| 20 | - lantiq,groups : Set the 3 bit mask to select which of the 3 groups are enabled | ||
| 21 | in the shift register cascade. | ||
| 22 | - lantiq,dsl : The dsl core can control the 2 LSBs of the gpio cascade. This 2 bit | ||
| 23 | property can enable this feature. | ||
| 24 | - lantiq,phy1 : The gphy1 core can control 3 bits of the gpio cascade. | ||
| 25 | - lantiq,phy2 : The gphy2 core can control 3 bits of the gpio cascade. | ||
| 26 | - lantiq,rising : use rising instead of falling edge for the shift register | ||
| 27 | |||
| 28 | Example: | ||
| 29 | |||
| 30 | gpio1: stp@E100BB0 { | ||
| 31 | compatible = "lantiq,gpio-stp-xway"; | ||
| 32 | reg = <0xE100BB0 0x40>; | ||
| 33 | #gpio-cells = <2>; | ||
| 34 | gpio-controller; | ||
| 35 | |||
| 36 | lantiq,shadow = <0xffff>; | ||
| 37 | lantiq,groups = <0x7>; | ||
| 38 | lantiq,dsl = <0x3>; | ||
| 39 | lantiq,phy1 = <0x7>; | ||
| 40 | lantiq,phy2 = <0x7>; | ||
| 41 | /* lantiq,rising; */ | ||
| 42 | }; | ||
| @@ -0,0 +1,43 @@ | |||
| 1 | NXP LPC32xx SoC GPIO controller | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: must be "nxp,lpc3220-gpio" | ||
| 5 | - reg: Physical base address and length of the controller's registers. | ||
| 6 | - gpio-controller: Marks the device node as a GPIO controller. | ||
| 7 | - #gpio-cells: Should be 3: | ||
| 8 | 1) bank: | ||
| 9 | 0: GPIO P0 | ||
| 10 | 1: GPIO P1 | ||
| 11 | 2: GPIO P2 | ||
| 12 | 3: GPIO P3 | ||
| 13 | 4: GPI P3 | ||
| 14 | 5: GPO P3 | ||
| 15 | 2) pin number | ||
| 16 | 3) optional parameters: | ||
| 17 | - bit 0 specifies polarity (0 for normal, 1 for inverted) | ||
| 18 | - reg: Index of the GPIO group | ||
| 19 | |||
| 20 | Example: | ||
| 21 | |||
| 22 | gpio: gpio@40028000 { | ||
| 23 | compatible = "nxp,lpc3220-gpio"; | ||
| 24 | reg = <0x40028000 0x1000>; | ||
| 25 | gpio-controller; | ||
| 26 | #gpio-cells = <3>; /* bank, pin, flags */ | ||
| 27 | }; | ||
| 28 | |||
| 29 | leds { | ||
| 30 | compatible = "gpio-leds"; | ||
| 31 | |||
| 32 | led0 { | ||
| 33 | gpios = <&gpio 5 1 1>; /* GPO_P3 1, active low */ | ||
| 34 | linux,default-trigger = "heartbeat"; | ||
| 35 | default-state = "off"; | ||
| 36 | }; | ||
| 37 | |||
| 38 | led1 { | ||
| 39 | gpios = <&gpio 5 14 1>; /* GPO_P3 14, active low */ | ||
| 40 | linux,default-trigger = "timer"; | ||
| 41 | default-state = "off"; | ||
| 42 | }; | ||
| 43 | }; | ||
| @@ -3,19 +3,25 @@ · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible : Should be "mrvl,pxa-gpio" or "mrvl,mmp-gpio" | 4 | - compatible : Should be "mrvl,pxa-gpio" or "mrvl,mmp-gpio" |
| 5 | - reg : Address and length of the register set for the device | 5 | - reg : Address and length of the register set for the device |
| 6 | - interrupts : Should be the port interrupt shared by all gpio pins, if | 6 | - interrupts : Should be the port interrupt shared by all gpio pins. |
| 7 | - interrupt-name : Should be the name of irq resource. | 7 | There're three gpio interrupts in arch-pxa, and they're gpio0, |
| 8 | one number. | 8 | gpio1 and gpio_mux. There're only one gpio interrupt in arch-mmp, |
| 9 | gpio_mux. | ||
| 10 | - interrupt-name : Should be the name of irq resource. Each interrupt | ||
| 11 | binds its interrupt-name. | ||
| 12 | - interrupt-controller : Identifies the node as an interrupt controller. | ||
| 13 | - #interrupt-cells: Specifies the number of cells needed to encode an | ||
| 14 | interrupt source. | ||
| 9 | - gpio-controller : Marks the device node as a gpio controller. | 15 | - gpio-controller : Marks the device node as a gpio controller. |
| 10 | - #gpio-cells : Should be one. It is the pin number. | 16 | - #gpio-cells : Should be one. It is the pin number. |
| 11 | 17 | ||
| 12 | Example: | 18 | Example: |
| 13 | 19 | ||
| 14 | gpio: gpio@d4019000 { | 20 | gpio: gpio@d4019000 { |
| 15 | compatible = "mrvl,mmp-gpio", "mrvl,pxa-gpio"; | 21 | compatible = "mrvl,mmp-gpio"; |
| 16 | reg = <0xd4019000 0x1000>; | 22 | reg = <0xd4019000 0x1000>; |
| 17 | interrupts = <49>, <17>, <18>; | 23 | interrupts = <49>; |
| 18 | interrupt-name = "gpio_mux", "gpio0", "gpio1"; | 24 | interrupt-name = "gpio_mux"; |
| 19 | gpio-controller; | 25 | gpio-controller; |
| 20 | #gpio-cells = <1>; | 26 | #gpio-cells = <1>; |
| 21 | interrupt-controller; | 27 | interrupt-controller; |
| @@ -0,0 +1,93 @@ | |||
| 1 | Pinctrl-based I2C Bus Mux | ||
| 2 | |||
| 3 | This binding describes an I2C bus multiplexer that uses pin multiplexing to | ||
| 4 | route the I2C signals, and represents the pin multiplexing configuration | ||
| 5 | using the pinctrl device tree bindings. | ||
| 6 | |||
| 7 | +-----+ +-----+ | ||
| 8 | | dev | | dev | | ||
| 9 | +------------------------+ +-----+ +-----+ | ||
| 10 | | SoC | | | | ||
| 11 | | /----|------+--------+ | ||
| 12 | | +---+ +------+ | child bus A, on first set of pins | ||
| 13 | | |I2C|---|Pinmux| | | ||
| 14 | | +---+ +------+ | child bus B, on second set of pins | ||
| 15 | | \----|------+--------+--------+ | ||
| 16 | | | | | | | ||
| 17 | +------------------------+ +-----+ +-----+ +-----+ | ||
| 18 | | dev | | dev | | dev | | ||
| 19 | +-----+ +-----+ +-----+ | ||
| 20 | |||
| 21 | Required properties: | ||
| 22 | - compatible: i2c-mux-pinctrl | ||
| 23 | - i2c-parent: The phandle of the I2C bus that this multiplexer's master-side | ||
| 24 | port is connected to. | ||
| 25 | |||
| 26 | Also required are: | ||
| 27 | |||
| 28 | * Standard pinctrl properties that specify the pin mux state for each child | ||
| 29 | bus. See ../pinctrl/pinctrl-bindings.txt. | ||
| 30 | |||
| 31 | * Standard I2C mux properties. See mux.txt in this directory. | ||
| 32 | |||
| 33 | * I2C child bus nodes. See mux.txt in this directory. | ||
| 34 | |||
| 35 | For each named state defined in the pinctrl-names property, an I2C child bus | ||
| 36 | will be created. I2C child bus numbers are assigned based on the index into | ||
| 37 | the pinctrl-names property. | ||
| 38 | |||
| 39 | The only exception is that no bus will be created for a state named "idle". If | ||
| 40 | such a state is defined, it must be the last entry in pinctrl-names. For | ||
| 41 | example: | ||
| 42 | |||
| 43 | pinctrl-names = "ddc", "pta", "idle" -> ddc = bus 0, pta = bus 1 | ||
| 44 | pinctrl-names = "ddc", "idle", "pta" -> Invalid ("idle" not last) | ||
| 45 | pinctrl-names = "idle", "ddc", "pta" -> Invalid ("idle" not last) | ||
| 46 | |||
| 47 | Whenever an access is made to a device on a child bus, the relevant pinctrl | ||
| 48 | state will be programmed into hardware. | ||
| 49 | |||
| 50 | If an idle state is defined, whenever an access is not being made to a device | ||
| 51 | on a child bus, the idle pinctrl state will be programmed into hardware. | ||
| 52 | |||
| 53 | If an idle state is not defined, the most recently used pinctrl state will be | ||
| 54 | left programmed into hardware whenever no access is being made of a device on | ||
| 55 | a child bus. | ||
| 56 | |||
| 57 | Example: | ||
| 58 | |||
| 59 | i2cmux { | ||
| 60 | compatible = "i2c-mux-pinctrl"; | ||
| 61 | #address-cells = <1>; | ||
| 62 | #size-cells = <0>; | ||
| 63 | |||
| 64 | i2c-parent = <&i2c1>; | ||
| 65 | |||
| 66 | pinctrl-names = "ddc", "pta", "idle"; | ||
| 67 | pinctrl-0 = <&state_i2cmux_ddc>; | ||
| 68 | pinctrl-1 = <&state_i2cmux_pta>; | ||
| 69 | pinctrl-2 = <&state_i2cmux_idle>; | ||
| 70 | |||
| 71 | i2c@0 { | ||
| 72 | reg = <0>; | ||
| 73 | #address-cells = <1>; | ||
| 74 | #size-cells = <0>; | ||
| 75 | |||
| 76 | eeprom { | ||
| 77 | compatible = "eeprom"; | ||
| 78 | reg = <0x50>; | ||
| 79 | }; | ||
| 80 | }; | ||
| 81 | |||
| 82 | i2c@1 { | ||
| 83 | reg = <1>; | ||
| 84 | #address-cells = <1>; | ||
| 85 | #size-cells = <0>; | ||
| 86 | |||
| 87 | eeprom { | ||
| 88 | compatible = "eeprom"; | ||
| 89 | reg = <0x50>; | ||
| 90 | }; | ||
| 91 | }; | ||
| 92 | }; | ||
| 93 | |||
| @@ -0,0 +1,16 @@ | |||
| 1 | * Freescale MXS Inter IC (I2C) Controller | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: Should be "fsl,<chip>-i2c" | ||
| 5 | - reg: Should contain registers location and length | ||
| 6 | - interrupts: Should contain ERROR and DMA interrupts | ||
| 7 | |||
| 8 | Examples: | ||
| 9 | |||
| 10 | i2c0: i2c@80058000 { | ||
| 11 | #address-cells = <1>; | ||
| 12 | #size-cells = <0>; | ||
| 13 | compatible = "fsl,imx28-i2c"; | ||
| 14 | reg = <0x80058000 2000>; | ||
| 15 | interrupts = <111 68>; | ||
| 16 | }; | ||
| @@ -3,34 +3,31 @@ · 2 unmodified lines | |||
| 3 | Required properties : | 3 | Required properties : |
| 4 | 4 | ||
| 5 | - reg : Offset and length of the register set for the device | 5 | - reg : Offset and length of the register set for the device |
| 6 | - compatible : should be "mrvl,mmp-twsi" where CHIP is the name of a | 6 | - compatible : should be "mrvl,mmp-twsi" where mmp is the name of a |
| 7 | compatible processor, e.g. pxa168, pxa910, mmp2, mmp3. | 7 | compatible processor, e.g. pxa168, pxa910, mmp2, mmp3. |
| 8 | For the pxa2xx/pxa3xx, an additional node "mrvl,pxa-i2c" is required | 8 | For the pxa2xx/pxa3xx, an additional node "mrvl,pxa-i2c" is required |
| 9 | as shown in the example below. | 9 | as shown in the example below. |
| 10 | 10 | ||
| 11 | Recommended properties : | 11 | Recommended properties : |
| 12 | 12 | ||
| 13 | - interrupts : <a b> where a is the interrupt number and b is a | 13 | - interrupts : the interrupt number |
| 14 | field that represents an encoding of the sense and level | ||
| 15 | information for the interrupt. This should be encoded based on | ||
| 16 | the information in section 2) depending on the type of interrupt | ||
| 17 | controller you have. | ||
| 18 | - interrupt-parent : the phandle for the interrupt controller that | 14 | - interrupt-parent : the phandle for the interrupt controller that |
| 19 | services interrupts for this device. | 15 | services interrupts for this device. If the parent is the default |
| 16 | interrupt controller in device tree, it could be ignored. | ||
| 20 | - mrvl,i2c-polling : Disable interrupt of i2c controller. Polling | 17 | - mrvl,i2c-polling : Disable interrupt of i2c controller. Polling |
| 21 | status register of i2c controller instead. | 18 | status register of i2c controller instead. |
| 22 | - mrvl,i2c-fast-mode : Enable fast mode of i2c controller. | 19 | - mrvl,i2c-fast-mode : Enable fast mode of i2c controller. |
| 23 | 20 | ||
| 24 | Examples: | 21 | Examples: |
| 25 | twsi1: i2c@d4011000 { | 22 | twsi1: i2c@d4011000 { |
| 26 | compatible = "mrvl,mmp-twsi", "mrvl,pxa-i2c"; | 23 | compatible = "mrvl,mmp-twsi"; |
| 27 | reg = <0xd4011000 0x1000>; | 24 | reg = <0xd4011000 0x1000>; |
| 28 | interrupts = <7>; | 25 | interrupts = <7>; |
| 29 | mrvl,i2c-fast-mode; | 26 | mrvl,i2c-fast-mode; |
| 30 | }; | 27 | }; |
| 31 | 28 | ||
| 32 | twsi2: i2c@d4025000 { | 29 | twsi2: i2c@d4025000 { |
| 33 | compatible = "mrvl,mmp-twsi", "mrvl,pxa-i2c"; | 30 | compatible = "mrvl,mmp-twsi"; |
| 34 | reg = <0xd4025000 0x1000>; | 31 | reg = <0xd4025000 0x1000>; |
| 35 | interrupts = <58>; | 32 | interrupts = <58>; |
| 36 | }; | 33 | }; |
| @@ -0,0 +1,60 @@ | |||
| 1 | Common i2c bus multiplexer/switch properties. | ||
| 2 | |||
| 3 | An i2c bus multiplexer/switch will have several child busses that are | ||
| 4 | numbered uniquely in a device dependent manner. The nodes for an i2c bus | ||
| 5 | multiplexer/switch will have one child node for each child | ||
| 6 | bus. | ||
| 7 | |||
| 8 | Required properties: | ||
| 9 | - #address-cells = <1>; | ||
| 10 | - #size-cells = <0>; | ||
| 11 | |||
| 12 | Required properties for child nodes: | ||
| 13 | - #address-cells = <1>; | ||
| 14 | - #size-cells = <0>; | ||
| 15 | - reg : The sub-bus number. | ||
| 16 | |||
| 17 | Optional properties for child nodes: | ||
| 18 | - Other properties specific to the multiplexer/switch hardware. | ||
| 19 | - Child nodes conforming to i2c bus binding | ||
| 20 | |||
| 21 | |||
| 22 | Example : | ||
| 23 | |||
| 24 | /* | ||
| 25 | An NXP pca9548 8 channel I2C multiplexer at address 0x70 | ||
| 26 | with two NXP pca8574 GPIO expanders attached, one each to | ||
| 27 | ports 3 and 4. | ||
| 28 | */ | ||
| 29 | |||
| 30 | mux@70 { | ||
| 31 | compatible = "nxp,pca9548"; | ||
| 32 | reg = <0x70>; | ||
| 33 | #address-cells = <1>; | ||
| 34 | #size-cells = <0>; | ||
| 35 | |||
| 36 | i2c@3 { | ||
| 37 | #address-cells = <1>; | ||
| 38 | #size-cells = <0>; | ||
| 39 | reg = <3>; | ||
| 40 | |||
| 41 | gpio1: gpio@38 { | ||
| 42 | compatible = "nxp,pca8574"; | ||
| 43 | reg = <0x38>; | ||
| 44 | #gpio-cells = <2>; | ||
| 45 | gpio-controller; | ||
| 46 | }; | ||
| 47 | }; | ||
| 48 | i2c@4 { | ||
| 49 | #address-cells = <1>; | ||
| 50 | #size-cells = <0>; | ||
| 51 | reg = <4>; | ||
| 52 | |||
| 53 | gpio2: gpio@38 { | ||
| 54 | compatible = "nxp,pca8574"; | ||
| 55 | reg = <0x38>; | ||
| 56 | #gpio-cells = <2>; | ||
| 57 | gpio-controller; | ||
| 58 | }; | ||
| 59 | }; | ||
| 60 | }; | ||
| @@ -0,0 +1,36 @@ | |||
| 1 | * NXP PNX I2C Controller | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | |||
| 5 | - reg: Offset and length of the register set for the device | ||
| 6 | - compatible: should be "nxp,pnx-i2c" | ||
| 7 | - interrupts: configure one interrupt line | ||
| 8 | - #address-cells: always 1 (for i2c addresses) | ||
| 9 | - #size-cells: always 0 | ||
| 10 | - interrupt-parent: the phandle for the interrupt controller that | ||
| 11 | services interrupts for this device. | ||
| 12 | |||
| 13 | Optional properties: | ||
| 14 | |||
| 15 | - clock-frequency: desired I2C bus clock frequency in Hz, Default: 100000 Hz | ||
| 16 | |||
| 17 | Examples: | ||
| 18 | |||
| 19 | i2c1: i2c@400a0000 { | ||
| 20 | compatible = "nxp,pnx-i2c"; | ||
| 21 | reg = <0x400a0000 0x100>; | ||
| 22 | interrupt-parent = <&mic>; | ||
| 23 | interrupts = <51 0>; | ||
| 24 | #address-cells = <1>; | ||
| 25 | #size-cells = <0>; | ||
| 26 | }; | ||
| 27 | |||
| 28 | i2c2: i2c@400a8000 { | ||
| 29 | compatible = "nxp,pnx-i2c"; | ||
| 30 | reg = <0x400a8000 0x100>; | ||
| 31 | interrupt-parent = <&mic>; | ||
| 32 | interrupts = <50 0>; | ||
| 33 | #address-cells = <1>; | ||
| 34 | #size-cells = <0>; | ||
| 35 | clock-frequency = <100000>; | ||
| 36 | }; | ||
| @@ -6,14 +6,18 @@ Required properties: · 5 unmodified lines | |||
| 6 | - compatible: value should be either of the following. | 6 | - compatible: value should be either of the following. |
| 7 | (a) "samsung, s3c2410-i2c", for i2c compatible with s3c2410 i2c. | 7 | (a) "samsung, s3c2410-i2c", for i2c compatible with s3c2410 i2c. |
| 8 | (b) "samsung, s3c2440-i2c", for i2c compatible with s3c2440 i2c. | 8 | (b) "samsung, s3c2440-i2c", for i2c compatible with s3c2440 i2c. |
| 9 | (c) "samsung, s3c2440-hdmiphy-i2c", for s3c2440-like i2c used | ||
| 10 | inside HDMIPHY block found on several samsung SoCs | ||
| 9 | - reg: physical base address of the controller and length of memory mapped | 11 | - reg: physical base address of the controller and length of memory mapped |
| 10 | region. | 12 | region. |
| 11 | - interrupts: interrupt number to the cpu. | 13 | - interrupts: interrupt number to the cpu. |
| 12 | - samsung,i2c-sda-delay: Delay (in ns) applied to data line (SDA) edges. | 14 | - samsung,i2c-sda-delay: Delay (in ns) applied to data line (SDA) edges. |
| 13 | - gpios: The order of the gpios should be the following: <SDA, SCL>. | ||
| 14 | The gpio specifier depends on the gpio controller. | ||
| 15 | 15 | ||
| 16 | Optional properties: | 16 | Optional properties: |
| 17 | - gpios: The order of the gpios should be the following: <SDA, SCL>. | ||
| 18 | The gpio specifier depends on the gpio controller. Required in all | ||
| 19 | cases except for "samsung,s3c2440-hdmiphy-i2c" whose input/output | ||
| 20 | lines are permanently wired to the respective client | ||
| 17 | - samsung,i2c-slave-addr: Slave address in multi-master enviroment. If not | 21 | - samsung,i2c-slave-addr: Slave address in multi-master enviroment. If not |
| 18 | specified, default value is 0. | 22 | specified, default value is 0. |
| 19 | - samsung,i2c-max-bus-freq: Desired frequency in Hz of the bus. If not | 23 | - samsung,i2c-max-bus-freq: Desired frequency in Hz of the bus. If not |
| @@ -0,0 +1,22 @@ | |||
| 1 | Xilinx IIC controller: | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible : Must be "xlnx,xps-iic-2.00.a" | ||
| 5 | - reg : IIC register location and length | ||
| 6 | - interrupts : IIC controller unterrupt | ||
| 7 | - #address-cells = <1> | ||
| 8 | - #size-cells = <0> | ||
| 9 | |||
| 10 | Optional properties: | ||
| 11 | - Child nodes conforming to i2c bus binding | ||
| 12 | |||
| 13 | Example: | ||
| 14 | |||
| 15 | axi_iic_0: i2c@40800000 { | ||
| 16 | compatible = "xlnx,xps-iic-2.00.a"; | ||
| 17 | interrupts = < 1 2 >; | ||
| 18 | reg = < 0x40800000 0x10000 >; | ||
| 19 | |||
| 20 | #size-cells = <0>; | ||
| 21 | #address-cells = <1>; | ||
| 22 | }; | ||
| @@ -0,0 +1,20 @@ | |||
| 1 | * SPEAr keyboard controller | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: "st,spear300-kbd" | ||
| 5 | |||
| 6 | Optional properties, in addition to those specified by the shared | ||
| 7 | matrix-keyboard bindings: | ||
| 8 | - autorepeat: bool: enables key autorepeat | ||
| 9 | - st,mode: keyboard mode: 0 - 9x9, 1 - 6x6, 2 - 2x2 | ||
| 10 | |||
| 11 | Example: | ||
| 12 | |||
| 13 | kbd@fc400000 { | ||
| 14 | compatible = "st,spear300-kbd"; | ||
| 15 | reg = <0xfc400000 0x100>; | ||
| 16 | linux,keymap = < 0x00030012 | ||
| 17 | 0x0102003a >; | ||
| 18 | autorepeat; | ||
| 19 | st,mode = <0>; | ||
| 20 | }; | ||
| @@ -0,0 +1,16 @@ | |||
| 1 | * NXP LPC32xx SoC Touchscreen Controller (TSC) | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: must be "nxp,lpc3220-tsc" | ||
| 5 | - reg: physical base address of the controller and length of memory mapped | ||
| 6 | region. | ||
| 7 | - interrupts: The TSC/ADC interrupt | ||
| 8 | |||
| 9 | Example: | ||
| 10 | |||
| 11 | tsc@40048000 { | ||
| 12 | compatible = "nxp,lpc3220-tsc"; | ||
| 13 | reg = <0x40048000 0x1000>; | ||
| 14 | interrupt-parent = <&mic>; | ||
| 15 | interrupts = <39 0>; | ||
| 16 | }; | ||
| @@ -0,0 +1,37 @@ | |||
| 1 | Vibra driver for the twl6040 family | ||
| 2 | |||
| 3 | The vibra driver is a child of the twl6040 MFD dirver. | ||
| 4 | Documentation/devicetree/bindings/mfd/twl6040.txt | ||
| 5 | |||
| 6 | Required properties: | ||
| 7 | - compatible : Must be "ti,twl6040-vibra"; | ||
| 8 | - interrupts: 4, Vibra overcurrent interrupt | ||
| 9 | - vddvibl-supply: Regulator supplying the left vibra motor | ||
| 10 | - vddvibr-supply: Regulator supplying the right vibra motor | ||
| 11 | - vibldrv_res: Board specific left driver resistance | ||
| 12 | - vibrdrv_res: Board specific right driver resistance | ||
| 13 | - viblmotor_res: Board specific left motor resistance | ||
| 14 | - vibrmotor_res: Board specific right motor resistance | ||
| 15 | |||
| 16 | Optional properties: | ||
| 17 | - vddvibl_uV: If the vddvibl default voltage need to be changed | ||
| 18 | - vddvibr_uV: If the vddvibr default voltage need to be changed | ||
| 19 | |||
| 20 | Example: | ||
| 21 | /* | ||
| 22 | * 8-channel high quality low-power audio codec | ||
| 23 | * http://www.ti.com/lit/ds/symlink/twl6040.pdf | ||
| 24 | */ | ||
| 25 | twl6040: twl6040@4b { | ||
| 26 | ... | ||
| 27 | twl6040_vibra: twl6040@1 { | ||
| 28 | compatible = "ti,twl6040-vibra"; | ||
| 29 | interrupts = <4>; | ||
| 30 | vddvibl-supply = <&vbat>; | ||
| 31 | vddvibr-supply = <&vbat>; | ||
| 32 | vibldrv_res = <8>; | ||
| 33 | vibrdrv_res = <3>; | ||
| 34 | viblmotor_res = <10>; | ||
| 35 | vibrmotor_res = <10>; | ||
| 36 | }; | ||
| 37 | }; | ||
| @@ -0,0 +1,14 @@ | |||
| 1 | NVIDIA Tegra 20 GART | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: "nvidia,tegra20-gart" | ||
| 5 | - reg: Two pairs of cells specifying the physical address and size of | ||
| 6 | the memory controller registers and the GART aperture respectively. | ||
| 7 | |||
| 8 | Example: | ||
| 9 | |||
| 10 | gart { | ||
| 11 | compatible = "nvidia,tegra20-gart"; | ||
| 12 | reg = <0x7000f024 0x00000018 /* controller registers */ | ||
| 13 | 0x58000000 0x02000000>; /* GART aperture */ | ||
| 14 | }; | ||
| @@ -0,0 +1,60 @@ | |||
| 1 | * Dialog DA9052/53 Power Management Integrated Circuit (PMIC) | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible : Should be "dlg,da9052", "dlg,da9053-aa", | ||
| 5 | "dlg,da9053-ab", or "dlg,da9053-bb" | ||
| 6 | |||
| 7 | Sub-nodes: | ||
| 8 | - regulators : Contain the regulator nodes. The DA9052/53 regulators are | ||
| 9 | bound using their names as listed below: | ||
| 10 | |||
| 11 | buck0 : regulator BUCK0 | ||
| 12 | buck1 : regulator BUCK1 | ||
| 13 | buck2 : regulator BUCK2 | ||
| 14 | buck3 : regulator BUCK3 | ||
| 15 | ldo4 : regulator LDO4 | ||
| 16 | ldo5 : regulator LDO5 | ||
| 17 | ldo6 : regulator LDO6 | ||
| 18 | ldo7 : regulator LDO7 | ||
| 19 | ldo8 : regulator LDO8 | ||
| 20 | ldo9 : regulator LDO9 | ||
| 21 | ldo10 : regulator LDO10 | ||
| 22 | ldo11 : regulator LDO11 | ||
| 23 | ldo12 : regulator LDO12 | ||
| 24 | ldo13 : regulator LDO13 | ||
| 25 | |||
| 26 | The bindings details of individual regulator device can be found in: | ||
| 27 | Documentation/devicetree/bindings/regulator/regulator.txt | ||
| 28 | |||
| 29 | Examples: | ||
| 30 | |||
| 31 | i2c@63fc8000 { /* I2C1 */ | ||
| 32 | status = "okay"; | ||
| 33 | |||
| 34 | pmic: dialog@48 { | ||
| 35 | compatible = "dlg,da9053-aa"; | ||
| 36 | reg = <0x48>; | ||
| 37 | |||
| 38 | regulators { | ||
| 39 | buck0 { | ||
| 40 | regulator-min-microvolt = <500000>; | ||
| 41 | regulator-max-microvolt = <2075000>; | ||
| 42 | }; | ||
| 43 | |||
| 44 | buck1 { | ||
| 45 | regulator-min-microvolt = <500000>; | ||
| 46 | regulator-max-microvolt = <2075000>; | ||
| 47 | }; | ||
| 48 | |||
| 49 | buck2 { | ||
| 50 | regulator-min-microvolt = <925000>; | ||
| 51 | regulator-max-microvolt = <2500000>; | ||
| 52 | }; | ||
| 53 | |||
| 54 | buck3 { | ||
| 55 | regulator-min-microvolt = <925000>; | ||
| 56 | regulator-max-microvolt = <2500000>; | ||
| 57 | }; | ||
| 58 | }; | ||
| 59 | }; | ||
| 60 | }; | ||
| @@ -0,0 +1,133 @@ | |||
| 1 | TPS65910 Power Management Integrated Circuit | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: "ti,tps65910" or "ti,tps65911" | ||
| 5 | - reg: I2C slave address | ||
| 6 | - interrupts: the interrupt outputs of the controller | ||
| 7 | - #gpio-cells: number of cells to describe a GPIO, this should be 2. | ||
| 8 | The first cell is the GPIO number. | ||
| 9 | The second cell is used to specify additional options <unused>. | ||
| 10 | - gpio-controller: mark the device as a GPIO controller | ||
| 11 | - #interrupt-cells: the number of cells to describe an IRQ, this should be 2. | ||
| 12 | The first cell is the IRQ number. | ||
| 13 | The second cell is the flags, encoded as the trigger masks from | ||
| 14 | Documentation/devicetree/bindings/interrupts.txt | ||
| 15 | - regulators: This is the list of child nodes that specify the regulator | ||
| 16 | initialization data for defined regulators. Not all regulators for the given | ||
| 17 | device need to be present. The definition for each of these nodes is defined | ||
| 18 | using the standard binding for regulators found at | ||
| 19 | Documentation/devicetree/bindings/regulator/regulator.txt. | ||
| 20 | |||
| 21 | The valid names for regulators are: | ||
| 22 | tps65910: vrtc, vio, vdd1, vdd2, vdd3, vdig1, vdig2, vpll, vdac, vaux1, | ||
| 23 | vaux2, vaux33, vmmc | ||
| 24 | tps65911: vrtc, vio, vdd1, vdd3, vddctrl, ldo1, ldo2, ldo3, ldo4, ldo5, | ||
| 25 | ldo6, ldo7, ldo8 | ||
| 26 | |||
| 27 | Optional properties: | ||
| 28 | - ti,vmbch-threshold: (tps65911) main battery charged threshold | ||
| 29 | comparator. (see VMBCH_VSEL in TPS65910 datasheet) | ||
| 30 | - ti,vmbch2-threshold: (tps65911) main battery discharged threshold | ||
| 31 | comparator. (see VMBCH_VSEL in TPS65910 datasheet) | ||
| 32 | - ti,en-gpio-sleep: enable sleep control for gpios | ||
| 33 | There should be 9 entries here, one for each gpio. | ||
| 34 | |||
| 35 | Regulator Optional properties: | ||
| 36 | - ti,regulator-ext-sleep-control: enable external sleep | ||
| 37 | control through external inputs [0 (not enabled), 1 (EN1), 2 (EN2) or 4(EN3)] | ||
| 38 | If this property is not defined, it defaults to 0 (not enabled). | ||
| 39 | |||
| 40 | Example: | ||
| 41 | |||
| 42 | pmu: tps65910@d2 { | ||
| 43 | compatible = "ti,tps65910"; | ||
| 44 | reg = <0xd2>; | ||
| 45 | interrupt-parent = <&intc>; | ||
| 46 | interrupts = < 0 118 0x04 >; | ||
| 47 | |||
| 48 | #gpio-cells = <2>; | ||
| 49 | gpio-controller; | ||
| 50 | |||
| 51 | #interrupt-cells = <2>; | ||
| 52 | interrupt-controller; | ||
| 53 | |||
| 54 | ti,vmbch-threshold = 0; | ||
| 55 | ti,vmbch2-threshold = 0; | ||
| 56 | |||
| 57 | ti,en-gpio-sleep = <0 0 1 0 0 0 0 0 0>; | ||
| 58 | |||
| 59 | regulators { | ||
| 60 | vdd1_reg: vdd1 { | ||
| 61 | regulator-min-microvolt = < 600000>; | ||
| 62 | regulator-max-microvolt = <1500000>; | ||
| 63 | regulator-always-on; | ||
| 64 | regulator-boot-on; | ||
| 65 | ti,regulator-ext-sleep-control = <0>; | ||
| 66 | }; | ||
| 67 | vdd2_reg: vdd2 { | ||
| 68 | regulator-min-microvolt = < 600000>; | ||
| 69 | regulator-max-microvolt = <1500000>; | ||
| 70 | regulator-always-on; | ||
| 71 | regulator-boot-on; | ||
| 72 | ti,regulator-ext-sleep-control = <4>; | ||
| 73 | }; | ||
| 74 | vddctrl_reg: vddctrl { | ||
| 75 | regulator-min-microvolt = < 600000>; | ||
| 76 | regulator-max-microvolt = <1400000>; | ||
| 77 | regulator-always-on; | ||
| 78 | regulator-boot-on; | ||
| 79 | ti,regulator-ext-sleep-control = <0>; | ||
| 80 | }; | ||
| 81 | vio_reg: vio { | ||
| 82 | regulator-min-microvolt = <1500000>; | ||
| 83 | regulator-max-microvolt = <1800000>; | ||
| 84 | regulator-always-on; | ||
| 85 | regulator-boot-on; | ||
| 86 | ti,regulator-ext-sleep-control = <1>; | ||
| 87 | }; | ||
| 88 | ldo1_reg: ldo1 { | ||
| 89 | regulator-min-microvolt = <1000000>; | ||
| 90 | regulator-max-microvolt = <3300000>; | ||
| 91 | ti,regulator-ext-sleep-control = <0>; | ||
| 92 | }; | ||
| 93 | ldo2_reg: ldo2 { | ||
| 94 | regulator-min-microvolt = <1050000>; | ||
| 95 | regulator-max-microvolt = <1050000>; | ||
| 96 | ti,regulator-ext-sleep-control = <0>; | ||
| 97 | }; | ||
| 98 | ldo3_reg: ldo3 { | ||
| 99 | regulator-min-microvolt = <1000000>; | ||
| 100 | regulator-max-microvolt = <3300000>; | ||
| 101 | ti,regulator-ext-sleep-control = <0>; | ||
| 102 | }; | ||
| 103 | ldo4_reg: ldo4 { | ||
| 104 | regulator-min-microvolt = <1000000>; | ||
| 105 | regulator-max-microvolt = <3300000>; | ||
| 106 | regulator-always-on; | ||
| 107 | ti,regulator-ext-sleep-control = <0>; | ||
| 108 | }; | ||
| 109 | ldo5_reg: ldo5 { | ||
| 110 | regulator-min-microvolt = <1000000>; | ||
| 111 | regulator-max-microvolt = <3300000>; | ||
| 112 | ti,regulator-ext-sleep-control = <0>; | ||
| 113 | }; | ||
| 114 | ldo6_reg: ldo6 { | ||
| 115 | regulator-min-microvolt = <1200000>; | ||
| 116 | regulator-max-microvolt = <1200000>; | ||
| 117 | ti,regulator-ext-sleep-control = <0>; | ||
| 118 | }; | ||
| 119 | ldo7_reg: ldo7 { | ||
| 120 | regulator-min-microvolt = <1200000>; | ||
| 121 | regulator-max-microvolt = <1200000>; | ||
| 122 | regulator-always-on; | ||
| 123 | regulator-boot-on; | ||
| 124 | ti,regulator-ext-sleep-control = <1>; | ||
| 125 | }; | ||
| 126 | ldo8_reg: ldo8 { | ||
| 127 | regulator-min-microvolt = <1000000>; | ||
| 128 | regulator-max-microvolt = <3300000>; | ||
| 129 | regulator-always-on; | ||
| 130 | ti,regulator-ext-sleep-control = <1>; | ||
| 131 | }; | ||
| 132 | }; | ||
| 133 | }; | ||
| @@ -0,0 +1,62 @@ | |||
| 1 | Texas Instruments TWL6040 family | ||
| 2 | |||
| 3 | The TWL6040s are 8-channel high quality low-power audio codecs providing audio | ||
| 4 | and vibra functionality on OMAP4+ platforms. | ||
| 5 | They are connected ot the host processor via i2c for commands, McPDM for audio | ||
| 6 | data and commands. | ||
| 7 | |||
| 8 | Required properties: | ||
| 9 | - compatible : Must be "ti,twl6040"; | ||
| 10 | - reg: must be 0x4b for i2c address | ||
| 11 | - interrupts: twl6040 has one interrupt line connecteded to the main SoC | ||
| 12 | - interrupt-parent: The parent interrupt controller | ||
| 13 | - twl6040,audpwron-gpio: Power on GPIO line for the twl6040 | ||
| 14 | |||
| 15 | - vio-supply: Regulator for the twl6040 VIO supply | ||
| 16 | - v2v1-supply: Regulator for the twl6040 V2V1 supply | ||
| 17 | |||
| 18 | Optional properties, nodes: | ||
| 19 | - enable-active-high: To power on the twl6040 during boot. | ||
| 20 | |||
| 21 | Vibra functionality | ||
| 22 | Required properties: | ||
| 23 | - vddvibl-supply: Regulator for the left vibra motor | ||
| 24 | - vddvibr-supply: Regulator for the right vibra motor | ||
| 25 | - vibra { }: Configuration section for vibra parameters containing the following | ||
| 26 | properties: | ||
| 27 | - ti,vibldrv-res: Resistance parameter for left driver | ||
| 28 | - ti,vibrdrv-res: Resistance parameter for right driver | ||
| 29 | - ti,viblmotor-res: Resistance parameter for left motor | ||
| 30 | - ti,viblmotor-res: Resistance parameter for right motor | ||
| 31 | |||
| 32 | Optional properties within vibra { } section: | ||
| 33 | - vddvibl_uV: If the vddvibl default voltage need to be changed | ||
| 34 | - vddvibr_uV: If the vddvibr default voltage need to be changed | ||
| 35 | |||
| 36 | Example: | ||
| 37 | &i2c1 { | ||
| 38 | twl6040: twl@4b { | ||
| 39 | compatible = "ti,twl6040"; | ||
| 40 | reg = <0x4b>; | ||
| 41 | |||
| 42 | interrupts = <0 119 4>; | ||
| 43 | interrupt-parent = <&gic>; | ||
| 44 | twl6040,audpwron-gpio = <&gpio4 31 0>; | ||
| 45 | |||
| 46 | vio-supply = <&v1v8>; | ||
| 47 | v2v1-supply = <&v2v1>; | ||
| 48 | enable-active-high; | ||
| 49 | |||
| 50 | /* regulators for vibra motor */ | ||
| 51 | vddvibl-supply = <&vbat>; | ||
| 52 | vddvibr-supply = <&vbat>; | ||
| 53 | |||
| 54 | vibra { | ||
| 55 | /* Vibra driver, motor resistance parameters */ | ||
| 56 | ti,vibldrv-res = <8>; | ||
| 57 | ti,vibrdrv-res = <3>; | ||
| 58 | ti,viblmotor-res = <10>; | ||
| 59 | ti,vibrmotor-res = <10>; | ||
| 60 | }; | ||
| 61 | }; | ||
| 62 | }; | ||
| @@ -0,0 +1,20 @@ | |||
| 1 | BMP085/BMP18x digital pressure sensors | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: bosch,bmp085 | ||
| 5 | |||
| 6 | Optional properties: | ||
| 7 | - chip-id: configurable chip id for non-default chip revisions | ||
| 8 | - temp-measurement-period: temperature measurement period (milliseconds) | ||
| 9 | - default-oversampling: default oversampling value to be used at startup, | ||
| 10 | value range is 0-3 with rising sensitivity. | ||
| 11 | |||
| 12 | Example: | ||
| 13 | |||
| 14 | pressure@77 { | ||
| 15 | compatible = "bosch,bmp085"; | ||
| 16 | reg = <0x77>; | ||
| 17 | chip-id = <10>; | ||
| 18 | temp-measurement-period = <100>; | ||
| 19 | default-oversampling = <2>; | ||
| 20 | }; | ||
| @@ -11,9 +11,11 @@ Required properties: · 10 unmodified lines | |||
| 11 | - interrupt-parent : interrupt source phandle. | 11 | - interrupt-parent : interrupt source phandle. |
| 12 | - clock-frequency : specifies eSDHC base clock frequency. | 12 | - clock-frequency : specifies eSDHC base clock frequency. |
| 13 | - sdhci,wp-inverted : (optional) specifies that eSDHC controller | 13 | - sdhci,wp-inverted : (optional) specifies that eSDHC controller |
| 14 | reports inverted write-protect state; | 14 | reports inverted write-protect state; New devices should use |
| 15 | the generic "wp-inverted" property. | ||
| 15 | - sdhci,1-bit-only : (optional) specifies that a controller can | 16 | - sdhci,1-bit-only : (optional) specifies that a controller can |
| 16 | only handle 1-bit data transfers. | 17 | only handle 1-bit data transfers. New devices should use the |
| 18 | generic "bus-width = <1>" property. | ||
| 17 | - sdhci,auto-cmd12: (optional) specifies that a controller can | 19 | - sdhci,auto-cmd12: (optional) specifies that a controller can |
| 18 | only handle auto CMD12. | 20 | only handle auto CMD12. |
| 19 | 21 | ||
| @@ -9,7 +9,7 @@ Required properties: · 8 unmodified lines | |||
| 9 | - interrupts : Should contain eSDHC interrupt | 9 | - interrupts : Should contain eSDHC interrupt |
| 10 | 10 | ||
| 11 | Optional properties: | 11 | Optional properties: |
| 12 | - fsl,card-wired : Indicate the card is wired to host permanently | 12 | - non-removable : Indicate the card is wired to host permanently |
| 13 | - fsl,cd-internal : Indicate to use controller internal card detection | 13 | - fsl,cd-internal : Indicate to use controller internal card detection |
| 14 | - fsl,wp-internal : Indicate to use controller internal write protection | 14 | - fsl,wp-internal : Indicate to use controller internal write protection |
| 15 | - cd-gpios : Specify GPIOs for card detection | 15 | - cd-gpios : Specify GPIOs for card detection |
| @@ -10,7 +10,8 @@ Required properties: · 9 unmodified lines | |||
| 10 | 10 | ||
| 11 | Optional properties: | 11 | Optional properties: |
| 12 | - gpios : may specify GPIOs in this order: Card-Detect GPIO, | 12 | - gpios : may specify GPIOs in this order: Card-Detect GPIO, |
| 13 | Write-Protect GPIO. | 13 | Write-Protect GPIO. Note that this does not follow the |
| 14 | binding from mmc.txt, for historic reasons. | ||
| 14 | - interrupts : the interrupt of a card detect interrupt. | 15 | - interrupts : the interrupt of a card detect interrupt. |
| 15 | - interrupt-parent : the phandle for the interrupt controller that | 16 | - interrupt-parent : the phandle for the interrupt controller that |
| 16 | services interrupts for this device. | 17 | services interrupts for this device. |
| @@ -0,0 +1,27 @@ | |||
| 1 | These properties are common to multiple MMC host controllers. Any host | ||
| 2 | that requires the respective functionality should implement them using | ||
| 3 | these definitions. | ||
| 4 | |||
| 5 | Required properties: | ||
| 6 | - bus-width: Number of data lines, can be <1>, <4>, or <8> | ||
| 7 | |||
| 8 | Optional properties: | ||
| 9 | - cd-gpios : Specify GPIOs for card detection, see gpio binding | ||
| 10 | - wp-gpios : Specify GPIOs for write protection, see gpio binding | ||
| 11 | - cd-inverted: when present, polarity on the wp gpio line is inverted | ||
| 12 | - wp-inverted: when present, polarity on the wp gpio line is inverted | ||
| 13 | - non-removable: non-removable slot (like eMMC) | ||
| 14 | - max-frequency: maximum operating clock frequency | ||
| 15 | |||
| 16 | Example: | ||
| 17 | |||
| 18 | sdhci@ab000000 { | ||
| 19 | compatible = "sdhci"; | ||
| 20 | reg = <0xab000000 0x200>; | ||
| 21 | interrupts = <23>; | ||
| 22 | bus-width = <4>; | ||
| 23 | cd-gpios = <&gpio 69 0>; | ||
| 24 | cd-inverted; | ||
| 25 | wp-gpios = <&gpio 70 0>; | ||
| 26 | max-frequency = <50000000>; | ||
| 27 | } | ||
| @@ -0,0 +1,19 @@ | |||
| 1 | * ARM PrimeCell MultiMedia Card Interface (MMCI) PL180/1 | ||
| 2 | |||
| 3 | The ARM PrimeCell MMCI PL180 and PL181 provides and interface for | ||
| 4 | reading and writing to MultiMedia and SD cards alike. | ||
| 5 | |||
| 6 | Required properties: | ||
| 7 | - compatible : contains "arm,pl18x", "arm,primecell". | ||
| 8 | - reg : contains pl18x registers and length. | ||
| 9 | - interrupts : contains the device IRQ(s). | ||
| 10 | - arm,primecell-periphid : contains the PrimeCell Peripheral ID. | ||
| 11 | |||
| 12 | Optional properties: | ||
| 13 | - wp-gpios : contains any write protect (ro) gpios | ||
| 14 | - cd-gpios : contains any card detection gpios | ||
| 15 | - cd-inverted : indicates whether the cd gpio is inverted | ||
| 16 | - max-frequency : contains the maximum operating frequency | ||
| 17 | - bus-width : number of data lines, can be <1>, <4>, or <8> | ||
| 18 | - mmc-cap-mmc-highspeed : indicates whether MMC is high speed capable | ||
| 19 | - mmc-cap-sd-highspeed : indicates whether SD is high speed capable | ||
| @@ -0,0 +1,25 @@ | |||
| 1 | * Freescale MXS MMC controller | ||
| 2 | |||
| 3 | The Freescale MXS Synchronous Serial Ports (SSP) can act as a MMC controller | ||
| 4 | to support MMC, SD, and SDIO types of memory cards. | ||
| 5 | |||
| 6 | Required properties: | ||
| 7 | - compatible: Should be "fsl,<chip>-mmc". The supported chips include | ||
| 8 | imx23 and imx28. | ||
| 9 | - reg: Should contain registers location and length | ||
| 10 | - interrupts: Should contain ERROR and DMA interrupts | ||
| 11 | - fsl,ssp-dma-channel: APBH DMA channel for the SSP | ||
| 12 | - bus-width: Number of data lines, can be <1>, <4>, or <8> | ||
| 13 | |||
| 14 | Optional properties: | ||
| 15 | - wp-gpios: Specify GPIOs for write protection | ||
| 16 | |||
| 17 | Examples: | ||
| 18 | |||
| 19 | ssp0: ssp@80010000 { | ||
| 20 | compatible = "fsl,imx28-mmc"; | ||
| 21 | reg = <0x80010000 2000>; | ||
| 22 | interrupts = <96 82>; | ||
| 23 | fsl,ssp-dma-channel = <0>; | ||
| 24 | bus-width = <8>; | ||
| 25 | }; | ||
| @@ -7,12 +7,12 @@ Required properties: · 6 unmodified lines | |||
| 7 | - compatible : Should be "nvidia,<chip>-sdhci" | 7 | - compatible : Should be "nvidia,<chip>-sdhci" |
| 8 | - reg : Should contain SD/MMC registers location and length | 8 | - reg : Should contain SD/MMC registers location and length |
| 9 | - interrupts : Should contain SD/MMC interrupt | 9 | - interrupts : Should contain SD/MMC interrupt |
| 10 | - bus-width : Number of data lines, can be <1>, <4>, or <8> | ||
| 10 | 11 | ||
| 11 | Optional properties: | 12 | Optional properties: |
| 12 | - cd-gpios : Specify GPIOs for card detection | 13 | - cd-gpios : Specify GPIOs for card detection |
| 13 | - wp-gpios : Specify GPIOs for write protection | 14 | - wp-gpios : Specify GPIOs for write protection |
| 14 | - power-gpios : Specify GPIOs for power control | 15 | - power-gpios : Specify GPIOs for power control |
| 15 | - support-8bit : Boolean, indicates if 8-bit mode should be used. | ||
| 16 | 16 | ||
| 17 | Example: | 17 | Example: |
| 18 | 18 | ||
| @@ -23,5 +23,5 @@ sdhci@c8000200 { · 4 unmodified lines | |||
| 23 | cd-gpios = <&gpio 69 0>; /* gpio PI5 */ | 23 | cd-gpios = <&gpio 69 0>; /* gpio PI5 */ |
| 24 | wp-gpios = <&gpio 57 0>; /* gpio PH1 */ | 24 | wp-gpios = <&gpio 57 0>; /* gpio PH1 */ |
| 25 | power-gpios = <&gpio 155 0>; /* gpio PT3 */ | 25 | power-gpios = <&gpio 155 0>; /* gpio PT3 */ |
| 26 | support-8bit; | 26 | bus-width = <8>; |
| 27 | }; | 27 | }; |
| @@ -15,7 +15,7 @@ Optional properties: · 14 unmodified lines | |||
| 15 | ti,dual-volt: boolean, supports dual voltage cards | 15 | ti,dual-volt: boolean, supports dual voltage cards |
| 16 | <supply-name>-supply: phandle to the regulator device tree node | 16 | <supply-name>-supply: phandle to the regulator device tree node |
| 17 | "supply-name" examples are "vmmc", "vmmc_aux" etc | 17 | "supply-name" examples are "vmmc", "vmmc_aux" etc |
| 18 | ti,bus-width: Number of data lines, default assumed is 1 if the property is missing. | 18 | bus-width: Number of data lines, default assumed is 1 if the property is missing. |
| 19 | cd-gpios: GPIOs for card detection | 19 | cd-gpios: GPIOs for card detection |
| 20 | wp-gpios: GPIOs for write protection | 20 | wp-gpios: GPIOs for write protection |
| 21 | ti,non-removable: non-removable slot (like eMMC) | 21 | ti,non-removable: non-removable slot (like eMMC) |
| @@ -27,7 +27,7 @@ Example: · 5 unmodified lines | |||
| 27 | reg = <0x4809c000 0x400>; | 27 | reg = <0x4809c000 0x400>; |
| 28 | ti,hwmods = "mmc1"; | 28 | ti,hwmods = "mmc1"; |
| 29 | ti,dual-volt; | 29 | ti,dual-volt; |
| 30 | ti,bus-width = <4>; | 30 | bus-width = <4>; |
| 31 | vmmc-supply = <&vmmc>; /* phandle to regulator node */ | 31 | vmmc-supply = <&vmmc>; /* phandle to regulator node */ |
| 32 | ti,non-removable; | 32 | ti,non-removable; |
| 33 | }; | 33 | }; |
| @@ -0,0 +1,33 @@ | |||
| 1 | * Freescale General-Purpose Media Interface (GPMI) | ||
| 2 | |||
| 3 | The GPMI nand controller provides an interface to control the | ||
| 4 | NAND flash chips. We support only one NAND chip now. | ||
| 5 | |||
| 6 | Required properties: | ||
| 7 | - compatible : should be "fsl,<chip>-gpmi-nand" | ||
| 8 | - reg : should contain registers location and length for gpmi and bch. | ||
| 9 | - reg-names: Should contain the reg names "gpmi-nand" and "bch" | ||
| 10 | - interrupts : The first is the DMA interrupt number for GPMI. | ||
| 11 | The second is the BCH interrupt number. | ||
| 12 | - interrupt-names : The interrupt names "gpmi-dma", "bch"; | ||
| 13 | - fsl,gpmi-dma-channel : Should contain the dma channel it uses. | ||
| 14 | |||
| 15 | The device tree may optionally contain sub-nodes describing partitions of the | ||
| 16 | address space. See partition.txt for more detail. | ||
| 17 | |||
| 18 | Examples: | ||
| 19 | |||
| 20 | gpmi-nand@8000c000 { | ||
| 21 | compatible = "fsl,imx28-gpmi-nand"; | ||
| 22 | #address-cells = <1>; | ||
| 23 | #size-cells = <1>; | ||
| 24 | reg = <0x8000c000 2000>, <0x8000a000 2000>; | ||
| 25 | reg-names = "gpmi-nand", "bch"; | ||
| 26 | interrupts = <88>, <41>; | ||
| 27 | interrupt-names = "gpmi-dma", "bch"; | ||
| 28 | fsl,gpmi-dma-channel = <4>; | ||
| 29 | |||
| 30 | partition@0 { | ||
| 31 | ... | ||
| 32 | }; | ||
| 33 | }; | ||
| @@ -0,0 +1,19 @@ | |||
| 1 | * Freescale's mxc_nand | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: "fsl,imxXX-nand" | ||
| 5 | - reg: address range of the nfc block | ||
| 6 | - interrupts: irq to be used | ||
| 7 | - nand-bus-width: see nand.txt | ||
| 8 | - nand-ecc-mode: see nand.txt | ||
| 9 | - nand-on-flash-bbt: see nand.txt | ||
| 10 | |||
| 11 | Example: | ||
| 12 | |||
| 13 | nand@d8000000 { | ||
| 14 | compatible = "fsl,imx27-nand"; | ||
| 15 | reg = <0xd8000000 0x1000>; | ||
| 16 | interrupts = <29>; | ||
| 17 | nand-bus-width = <8>; | ||
| 18 | nand-ecc-mode = "hw"; | ||
| 19 | }; | ||
| @@ -0,0 +1,50 @@ | |||
| 1 | NAND support for Marvell Orion SoC platforms | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible : "mrvl,orion-nand". | ||
| 5 | - reg : Base physical address of the NAND and length of memory mapped | ||
| 6 | region | ||
| 7 | |||
| 8 | Optional properties: | ||
| 9 | - cle : Address line number connected to CLE. Default is 0 | ||
| 10 | - ale : Address line number connected to ALE. Default is 1 | ||
| 11 | - bank-width : Width in bytes of the device. Default is 1 | ||
| 12 | - chip-delay : Chip dependent delay for transferring data from array to read | ||
| 13 | registers in usecs | ||
| 14 | |||
| 15 | The device tree may optionally contain sub-nodes describing partitions of the | ||
| 16 | address space. See partition.txt for more detail. | ||
| 17 | |||
| 18 | Example: | ||
| 19 | |||
| 20 | nand@f4000000 { | ||
| 21 | #address-cells = <1>; | ||
| 22 | #size-cells = <1>; | ||
| 23 | cle = <0>; | ||
| 24 | ale = <1>; | ||
| 25 | bank-width = <1>; | ||
| 26 | chip-delay = <25>; | ||
| 27 | compatible = "mrvl,orion-nand"; | ||
| 28 | reg = <0xf4000000 0x400>; | ||
| 29 | |||
| 30 | partition@0 { | ||
| 31 | label = "u-boot"; | ||
| 32 | reg = <0x0000000 0x100000>; | ||
| 33 | read-only; | ||
| 34 | }; | ||
| 35 | |||
| 36 | partition@100000 { | ||
| 37 | label = "uImage"; | ||
| 38 | reg = <0x0100000 0x200000>; | ||
| 39 | }; | ||
| 40 | |||
| 41 | partition@300000 { | ||
| 42 | label = "dtb"; | ||
| 43 | reg = <0x0300000 0x100000>; | ||
| 44 | }; | ||
| 45 | |||
| 46 | partition@400000 { | ||
| 47 | label = "root"; | ||
| 48 | reg = <0x0400000 0x7d00000>; | ||
| 49 | }; | ||
| 50 | }; | ||
| @@ -1,4 +1,4 @@ | |||
| 1 | Flexcan CAN contoller on Freescale's ARM and PowerPC system-on-a-chip (SOC). | 1 | Flexcan CAN controller on Freescale's ARM and PowerPC system-on-a-chip (SOC). |
| 2 | 2 | ||
| 3 | Required properties: | 3 | Required properties: |
| 4 | 4 | ||
| @@ -14,7 +14,7 @@ Optional properties: · 13 unmodified lines | |||
| 14 | 14 | ||
| 15 | Example: | 15 | Example: |
| 16 | 16 | ||
| 17 | fec@83fec000 { | 17 | ethernet@83fec000 { |
| 18 | compatible = "fsl,imx51-fec", "fsl,imx27-fec"; | 18 | compatible = "fsl,imx51-fec", "fsl,imx27-fec"; |
| 19 | reg = <0x83fec000 0x4000>; | 19 | reg = <0x83fec000 0x4000>; |
| 20 | interrupts = <87>; | 20 | interrupts = <87>; |
| @@ -0,0 +1,24 @@ | |||
| 1 | * NXP LPC32xx SoC Ethernet Controller | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: Should be "nxp,lpc-eth" | ||
| 5 | - reg: Address and length of the register set for the device | ||
| 6 | - interrupts: Should contain ethernet controller interrupt | ||
| 7 | |||
| 8 | Optional properties: | ||
| 9 | - phy-mode: String, operation mode of the PHY interface. | ||
| 10 | Supported values are: "mii", "rmii" (default) | ||
| 11 | - use-iram: Use LPC32xx internal SRAM (IRAM) for DMA buffering | ||
| 12 | - local-mac-address : 6 bytes, mac address | ||
| 13 | |||
| 14 | Example: | ||
| 15 | |||
| 16 | mac: ethernet@31060000 { | ||
| 17 | compatible = "nxp,lpc-eth"; | ||
| 18 | reg = <0x31060000 0x1000>; | ||
| 19 | interrupt-parent = <&mic>; | ||
| 20 | interrupts = <29 0>; | ||
| 21 | |||
| 22 | phy-mode = "rmii"; | ||
| 23 | use-iram; | ||
| 24 | }; | ||
| @@ -0,0 +1,127 @@ | |||
| 1 | Properties for an MDIO bus multiplexer/switch controlled by GPIO pins. | ||
| 2 | |||
| 3 | This is a special case of a MDIO bus multiplexer. One or more GPIO | ||
| 4 | lines are used to control which child bus is connected. | ||
| 5 | |||
| 6 | Required properties in addition to the generic multiplexer properties: | ||
| 7 | |||
| 8 | - compatible : mdio-mux-gpio. | ||
| 9 | - gpios : GPIO specifiers for each GPIO line. One or more must be specified. | ||
| 10 | |||
| 11 | |||
| 12 | Example : | ||
| 13 | |||
| 14 | /* The parent MDIO bus. */ | ||
| 15 | smi1: mdio@1180000001900 { | ||
| 16 | compatible = "cavium,octeon-3860-mdio"; | ||
| 17 | #address-cells = <1>; | ||
| 18 | #size-cells = <0>; | ||
| 19 | reg = <0x11800 0x00001900 0x0 0x40>; | ||
| 20 | }; | ||
| 21 | |||
| 22 | /* | ||
| 23 | An NXP sn74cbtlv3253 dual 1-of-4 switch controlled by a | ||
| 24 | pair of GPIO lines. Child busses 2 and 3 populated with 4 | ||
| 25 | PHYs each. | ||
| 26 | */ | ||
| 27 | mdio-mux { | ||
| 28 | compatible = "mdio-mux-gpio"; | ||
| 29 | gpios = <&gpio1 3 0>, <&gpio1 4 0>; | ||
| 30 | mdio-parent-bus = <&smi1>; | ||
| 31 | #address-cells = <1>; | ||
| 32 | #size-cells = <0>; | ||
| 33 | |||
| 34 | mdio@2 { | ||
| 35 | reg = <2>; | ||
| 36 | #address-cells = <1>; | ||
| 37 | #size-cells = <0>; | ||
| 38 | |||
| 39 | phy11: ethernet-phy@1 { | ||
| 40 | reg = <1>; | ||
| 41 | compatible = "marvell,88e1149r"; | ||
| 42 | marvell,reg-init = <3 0x10 0 0x5777>, | ||
| 43 | <3 0x11 0 0x00aa>, | ||
| 44 | <3 0x12 0 0x4105>, | ||
| 45 | <3 0x13 0 0x0a60>; | ||
| 46 | interrupt-parent = <&gpio>; | ||
| 47 | interrupts = <10 8>; /* Pin 10, active low */ | ||
| 48 | }; | ||
| 49 | phy12: ethernet-phy@2 { | ||
| 50 | reg = <2>; | ||
| 51 | compatible = "marvell,88e1149r"; | ||
| 52 | marvell,reg-init = <3 0x10 0 0x5777>, | ||
| 53 | <3 0x11 0 0x00aa>, | ||
| 54 | <3 0x12 0 0x4105>, | ||
| 55 | <3 0x13 0 0x0a60>; | ||
| 56 | interrupt-parent = <&gpio>; | ||
| 57 | interrupts = <10 8>; /* Pin 10, active low */ | ||
| 58 | }; | ||
| 59 | phy13: ethernet-phy@3 { | ||
| 60 | reg = <3>; | ||
| 61 | compatible = "marvell,88e1149r"; | ||
| 62 | marvell,reg-init = <3 0x10 0 0x5777>, | ||
| 63 | <3 0x11 0 0x00aa>, | ||
| 64 | <3 0x12 0 0x4105>, | ||
| 65 | <3 0x13 0 0x0a60>; | ||
| 66 | interrupt-parent = <&gpio>; | ||
| 67 | interrupts = <10 8>; /* Pin 10, active low */ | ||
| 68 | }; | ||
| 69 | phy14: ethernet-phy@4 { | ||
| 70 | reg = <4>; | ||
| 71 | compatible = "marvell,88e1149r"; | ||
| 72 | marvell,reg-init = <3 0x10 0 0x5777>, | ||
| 73 | <3 0x11 0 0x00aa>, | ||
| 74 | <3 0x12 0 0x4105>, | ||
| 75 | <3 0x13 0 0x0a60>; | ||
| 76 | interrupt-parent = <&gpio>; | ||
| 77 | interrupts = <10 8>; /* Pin 10, active low */ | ||
| 78 | }; | ||
| 79 | }; | ||
| 80 | |||
| 81 | mdio@3 { | ||
| 82 | reg = <3>; | ||
| 83 | #address-cells = <1>; | ||
| 84 | #size-cells = <0>; | ||
| 85 | |||
| 86 | phy21: ethernet-phy@1 { | ||
| 87 | reg = <1>; | ||
| 88 | compatible = "marvell,88e1149r"; | ||
| 89 | marvell,reg-init = <3 0x10 0 0x5777>, | ||
| 90 | <3 0x11 0 0x00aa>, | ||
| 91 | <3 0x12 0 0x4105>, | ||
| 92 | <3 0x13 0 0x0a60>; | ||
| 93 | interrupt-parent = <&gpio>; | ||
| 94 | interrupts = <12 8>; /* Pin 12, active low */ | ||
| 95 | }; | ||
| 96 | phy22: ethernet-phy@2 { | ||
| 97 | reg = <2>; | ||
| 98 | compatible = "marvell,88e1149r"; | ||
| 99 | marvell,reg-init = <3 0x10 0 0x5777>, | ||
| 100 | <3 0x11 0 0x00aa>, | ||
| 101 | <3 0x12 0 0x4105>, | ||
| 102 | <3 0x13 0 0x0a60>; | ||
| 103 | interrupt-parent = <&gpio>; | ||
| 104 | interrupts = <12 8>; /* Pin 12, active low */ | ||
| 105 | }; | ||
| 106 | phy23: ethernet-phy@3 { | ||
| 107 | reg = <3>; | ||
| 108 | compatible = "marvell,88e1149r"; | ||
| 109 | marvell,reg-init = <3 0x10 0 0x5777>, | ||
| 110 | <3 0x11 0 0x00aa>, | ||
| 111 | <3 0x12 0 0x4105>, | ||
| 112 | <3 0x13 0 0x0a60>; | ||
| 113 | interrupt-parent = <&gpio>; | ||
| 114 | interrupts = <12 8>; /* Pin 12, active low */ | ||
| 115 | }; | ||
| 116 | phy24: ethernet-phy@4 { | ||
| 117 | reg = <4>; | ||
| 118 | compatible = "marvell,88e1149r"; | ||
| 119 | marvell,reg-init = <3 0x10 0 0x5777>, | ||
| 120 | <3 0x11 0 0x00aa>, | ||
| 121 | <3 0x12 0 0x4105>, | ||
| 122 | <3 0x13 0 0x0a60>; | ||
| 123 | interrupt-parent = <&gpio>; | ||
| 124 | interrupts = <12 8>; /* Pin 12, active low */ | ||
| 125 | }; | ||
| 126 | }; | ||
| 127 | }; | ||
| @@ -0,0 +1,136 @@ | |||
| 1 | Common MDIO bus multiplexer/switch properties. | ||
| 2 | |||
| 3 | An MDIO bus multiplexer/switch will have several child busses that are | ||
| 4 | numbered uniquely in a device dependent manner. The nodes for an MDIO | ||
| 5 | bus multiplexer/switch will have one child node for each child bus. | ||
| 6 | |||
| 7 | Required properties: | ||
| 8 | - mdio-parent-bus : phandle to the parent MDIO bus. | ||
| 9 | - #address-cells = <1>; | ||
| 10 | - #size-cells = <0>; | ||
| 11 | |||
| 12 | Optional properties: | ||
| 13 | - Other properties specific to the multiplexer/switch hardware. | ||
| 14 | |||
| 15 | Required properties for child nodes: | ||
| 16 | - #address-cells = <1>; | ||
| 17 | - #size-cells = <0>; | ||
| 18 | - reg : The sub-bus number. | ||
| 19 | |||
| 20 | |||
| 21 | Example : | ||
| 22 | |||
| 23 | /* The parent MDIO bus. */ | ||
| 24 | smi1: mdio@1180000001900 { | ||
| 25 | compatible = "cavium,octeon-3860-mdio"; | ||
| 26 | #address-cells = <1>; | ||
| 27 | #size-cells = <0>; | ||
| 28 | reg = <0x11800 0x00001900 0x0 0x40>; | ||
| 29 | }; | ||
| 30 | |||
| 31 | /* | ||
| 32 | An NXP sn74cbtlv3253 dual 1-of-4 switch controlled by a | ||
| 33 | pair of GPIO lines. Child busses 2 and 3 populated with 4 | ||
| 34 | PHYs each. | ||
| 35 | */ | ||
| 36 | mdio-mux { | ||
| 37 | compatible = "mdio-mux-gpio"; | ||
| 38 | gpios = <&gpio1 3 0>, <&gpio1 4 0>; | ||
| 39 | mdio-parent-bus = <&smi1>; | ||
| 40 | #address-cells = <1>; | ||
| 41 | #size-cells = <0>; | ||
| 42 | |||
| 43 | mdio@2 { | ||
| 44 | reg = <2>; | ||
| 45 | #address-cells = <1>; | ||
| 46 | #size-cells = <0>; | ||
| 47 | |||
| 48 | phy11: ethernet-phy@1 { | ||
| 49 | reg = <1>; | ||
| 50 | compatible = "marvell,88e1149r"; | ||
| 51 | marvell,reg-init = <3 0x10 0 0x5777>, | ||
| 52 | <3 0x11 0 0x00aa>, | ||
| 53 | <3 0x12 0 0x4105>, | ||
| 54 | <3 0x13 0 0x0a60>; | ||
| 55 | interrupt-parent = <&gpio>; | ||
| 56 | interrupts = <10 8>; /* Pin 10, active low */ | ||
| 57 | }; | ||
| 58 | phy12: ethernet-phy@2 { | ||
| 59 | reg = <2>; | ||
| 60 | compatible = "marvell,88e1149r"; | ||
| 61 | marvell,reg-init = <3 0x10 0 0x5777>, | ||
| 62 | <3 0x11 0 0x00aa>, | ||
| 63 | <3 0x12 0 0x4105>, | ||
| 64 | <3 0x13 0 0x0a60>; | ||
| 65 | interrupt-parent = <&gpio>; | ||
| 66 | interrupts = <10 8>; /* Pin 10, active low */ | ||
| 67 | }; | ||
| 68 | phy13: ethernet-phy@3 { | ||
| 69 | reg = <3>; | ||
| 70 | compatible = "marvell,88e1149r"; | ||
| 71 | marvell,reg-init = <3 0x10 0 0x5777>, | ||
| 72 | <3 0x11 0 0x00aa>, | ||
| 73 | <3 0x12 0 0x4105>, | ||
| 74 | <3 0x13 0 0x0a60>; | ||
| 75 | interrupt-parent = <&gpio>; | ||
| 76 | interrupts = <10 8>; /* Pin 10, active low */ | ||
| 77 | }; | ||
| 78 | phy14: ethernet-phy@4 { | ||
| 79 | reg = <4>; | ||
| 80 | compatible = "marvell,88e1149r"; | ||
| 81 | marvell,reg-init = <3 0x10 0 0x5777>, | ||
| 82 | <3 0x11 0 0x00aa>, | ||
| 83 | <3 0x12 0 0x4105>, | ||
| 84 | <3 0x13 0 0x0a60>; | ||
| 85 | interrupt-parent = <&gpio>; | ||
| 86 | interrupts = <10 8>; /* Pin 10, active low */ | ||
| 87 | }; | ||
| 88 | }; | ||
| 89 | |||
| 90 | mdio@3 { | ||
| 91 | reg = <3>; | ||
| 92 | #address-cells = <1>; | ||
| 93 | #size-cells = <0>; | ||
| 94 | |||
| 95 | phy21: ethernet-phy@1 { | ||
| 96 | reg = <1>; | ||
| 97 | compatible = "marvell,88e1149r"; | ||
| 98 | marvell,reg-init = <3 0x10 0 0x5777>, | ||
| 99 | <3 0x11 0 0x00aa>, | ||
| 100 | <3 0x12 0 0x4105>, | ||
| 101 | <3 0x13 0 0x0a60>; | ||
| 102 | interrupt-parent = <&gpio>; | ||
| 103 | interrupts = <12 8>; /* Pin 12, active low */ | ||
| 104 | }; | ||
| 105 | phy22: ethernet-phy@2 { | ||
| 106 | reg = <2>; | ||
| 107 | compatible = "marvell,88e1149r"; | ||
| 108 | marvell,reg-init = <3 0x10 0 0x5777>, | ||
| 109 | <3 0x11 0 0x00aa>, | ||
| 110 | <3 0x12 0 0x4105>, | ||
| 111 | <3 0x13 0 0x0a60>; | ||
| 112 | interrupt-parent = <&gpio>; | ||
| 113 | interrupts = <12 8>; /* Pin 12, active low */ | ||
| 114 | }; | ||
| 115 | phy23: ethernet-phy@3 { | ||
| 116 | reg = <3>; | ||
| 117 | compatible = "marvell,88e1149r"; | ||
| 118 | marvell,reg-init = <3 0x10 0 0x5777>, | ||
| 119 | <3 0x11 0 0x00aa>, | ||
| 120 | <3 0x12 0 0x4105>, | ||
| 121 | <3 0x13 0 0x0a60>; | ||
| 122 | interrupt-parent = <&gpio>; | ||
| 123 | interrupts = <12 8>; /* Pin 12, active low */ | ||
| 124 | }; | ||
| 125 | phy24: ethernet-phy@4 { | ||
| 126 | reg = <4>; | ||
| 127 | compatible = "marvell,88e1149r"; | ||
| 128 | marvell,reg-init = <3 0x10 0 0x5777>, | ||
| 129 | <3 0x11 0 0x00aa>, | ||
| 130 | <3 0x12 0 0x4105>, | ||
| 131 | <3 0x13 0 0x0a60>; | ||
| 132 | interrupt-parent = <&gpio>; | ||
| 133 | interrupts = <12 8>; /* Pin 12, active low */ | ||
| 134 | }; | ||
| 135 | }; | ||
| 136 | }; | ||
| @@ -0,0 +1,95 @@ | |||
| 1 | * Freescale IOMUX Controller (IOMUXC) for i.MX | ||
| 2 | |||
| 3 | The IOMUX Controller (IOMUXC), together with the IOMUX, enables the IC | ||
| 4 | to share one PAD to several functional blocks. The sharing is done by | ||
| 5 | multiplexing the PAD input/output signals. For each PAD there are up to | ||
| 6 | 8 muxing options (called ALT modes). Since different modules require | ||
| 7 | different PAD settings (like pull up, keeper, etc) the IOMUXC controls | ||
| 8 | also the PAD settings parameters. | ||
| 9 | |||
| 10 | Please refer to pinctrl-bindings.txt in this directory for details of the | ||
| 11 | common pinctrl bindings used by client devices, including the meaning of the | ||
| 12 | phrase "pin configuration node". | ||
| 13 | |||
| 14 | Freescale IMX pin configuration node is a node of a group of pins which can be | ||
| 15 | used for a specific device or function. This node represents both mux and config | ||
| 16 | of the pins in that group. The 'mux' selects the function mode(also named mux | ||
| 17 | mode) this pin can work on and the 'config' configures various pad settings | ||
| 18 | such as pull-up, open drain, drive strength, etc. | ||
| 19 | |||
| 20 | Required properties for iomux controller: | ||
| 21 | - compatible: "fsl,<soc>-iomuxc" | ||
| 22 | Please refer to each fsl,<soc>-pinctrl.txt binding doc for supported SoCs. | ||
| 23 | |||
| 24 | Required properties for pin configuration node: | ||
| 25 | - fsl,pins: two integers array, represents a group of pins mux and config | ||
| 26 | setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a | ||
| 27 | pin working on a specific function, CONFIG is the pad setting value like | ||
| 28 | pull-up on this pin. Please refer to fsl,<soc>-pinctrl.txt for the valid | ||
| 29 | pins and functions of each SoC. | ||
| 30 | |||
| 31 | Bits used for CONFIG: | ||
| 32 | NO_PAD_CTL(1 << 31): indicate this pin does not need config. | ||
| 33 | |||
| 34 | SION(1 << 30): Software Input On Field. | ||
| 35 | Force the selected mux mode input path no matter of MUX_MODE functionality. | ||
| 36 | By default the input path is determined by functionality of the selected | ||
| 37 | mux mode (regular). | ||
| 38 | |||
| 39 | Other bits are used for PAD setting. | ||
| 40 | Please refer to each fsl,<soc>-pinctrl,txt binding doc for SoC specific part | ||
| 41 | of bits definitions. | ||
| 42 | |||
| 43 | NOTE: | ||
| 44 | Some requirements for using fsl,imx-pinctrl binding: | ||
| 45 | 1. We have pin function node defined under iomux controller node to represent | ||
| 46 | what pinmux functions this SoC supports. | ||
| 47 | 2. The pin configuration node intends to work on a specific function should | ||
| 48 | to be defined under that specific function node. | ||
| 49 | The function node's name should represent well about what function | ||
| 50 | this group of pins in this pin configuration node are working on. | ||
| 51 | 3. The driver can use the function node's name and pin configuration node's | ||
| 52 | name describe the pin function and group hierarchy. | ||
| 53 | For example, Linux IMX pinctrl driver takes the function node's name | ||
| 54 | as the function name and pin configuration node's name as group name to | ||
| 55 | create the map table. | ||
| 56 | 4. Each pin configuration node should have a phandle, devices can set pins | ||
| 57 | configurations by referring to the phandle of that pin configuration node. | ||
| 58 | |||
| 59 | Examples: | ||
| 60 | usdhc@0219c000 { /* uSDHC4 */ | ||
| 61 | fsl,card-wired; | ||
| 62 | vmmc-supply = <®_3p3v>; | ||
| 63 | status = "okay"; | ||
| 64 | pinctrl-names = "default"; | ||
| 65 | pinctrl-0 = <&pinctrl_usdhc4_1>; | ||
| 66 | }; | ||
| 67 | |||
| 68 | iomuxc@020e0000 { | ||
| 69 | compatible = "fsl,imx6q-iomuxc"; | ||
| 70 | reg = <0x020e0000 0x4000>; | ||
| 71 | |||
| 72 | /* shared pinctrl settings */ | ||
| 73 | usdhc4 { | ||
| 74 | pinctrl_usdhc4_1: usdhc4grp-1 { | ||
| 75 | fsl,pins = <1386 0x17059 /* MX6Q_PAD_SD4_CMD__USDHC4_CMD */ | ||
| 76 | 1392 0x10059 /* MX6Q_PAD_SD4_CLK__USDHC4_CLK */ | ||
| 77 | 1462 0x17059 /* MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 */ | ||
| 78 | 1470 0x17059 /* MX6Q_PAD_SD4_DAT1__USDHC4_DAT1 */ | ||
| 79 | 1478 0x17059 /* MX6Q_PAD_SD4_DAT2__USDHC4_DAT2 */ | ||
| 80 | 1486 0x17059 /* MX6Q_PAD_SD4_DAT3__USDHC4_DAT3 */ | ||
| 81 | 1493 0x17059 /* MX6Q_PAD_SD4_DAT4__USDHC4_DAT4 */ | ||
| 82 | 1501 0x17059 /* MX6Q_PAD_SD4_DAT5__USDHC4_DAT5 */ | ||
| 83 | 1509 0x17059 /* MX6Q_PAD_SD4_DAT6__USDHC4_DAT6 */ | ||
| 84 | 1517 0x17059>; /* MX6Q_PAD_SD4_DAT7__USDHC4_DAT7 */ | ||
| 85 | }; | ||
| 86 | }; | ||
| 87 | .... | ||
| 88 | }; | ||
| 89 | Refer to the IOMUXC controller chapter in imx6q datasheet, | ||
| 90 | 0x17059 means enable hysteresis, 47KOhm Pull Up, 50Mhz speed, | ||
| 91 | 80Ohm driver strength and Fast Slew Rate. | ||
| 92 | User should refer to each SoC spec to set the correct value. | ||
| 93 | |||
| 94 | TODO: when dtc macro support is available, we can change above raw data | ||
| 95 | to dt macro which can get better readability in dts file. | ||
| @@ -0,0 +1,787 @@ | |||
| 1 | * Freescale IMX51 IOMUX Controller | ||
| 2 | |||
| 3 | Please refer to fsl,imx-pinctrl.txt in this directory for common binding part | ||
| 4 | and usage. | ||
| 5 | |||
| 6 | Required properties: | ||
| 7 | - compatible: "fsl,imx51-iomuxc" | ||
| 8 | - fsl,pins: two integers array, represents a group of pins mux and config | ||
| 9 | setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a | ||
| 10 | pin working on a specific function, CONFIG is the pad setting value like | ||
| 11 | pull-up for this pin. Please refer to imx51 datasheet for the valid pad | ||
| 12 | config settings. | ||
| 13 | |||
| 14 | CONFIG bits definition: | ||
| 15 | PAD_CTL_HVE (1 << 13) | ||
| 16 | PAD_CTL_HYS (1 << 8) | ||
| 17 | PAD_CTL_PKE (1 << 7) | ||
| 18 | PAD_CTL_PUE (1 << 6) | ||
| 19 | PAD_CTL_PUS_100K_DOWN (0 << 4) | ||
| 20 | PAD_CTL_PUS_47K_UP (1 << 4) | ||
| 21 | PAD_CTL_PUS_100K_UP (2 << 4) | ||
| 22 | PAD_CTL_PUS_22K_UP (3 << 4) | ||
| 23 | PAD_CTL_ODE (1 << 3) | ||
| 24 | PAD_CTL_DSE_LOW (0 << 1) | ||
| 25 | PAD_CTL_DSE_MED (1 << 1) | ||
| 26 | PAD_CTL_DSE_HIGH (2 << 1) | ||
| 27 | PAD_CTL_DSE_MAX (3 << 1) | ||
| 28 | PAD_CTL_SRE_FAST (1 << 0) | ||
| 29 | PAD_CTL_SRE_SLOW (0 << 0) | ||
| 30 | |||
| 31 | See below for available PIN_FUNC_ID for imx51: | ||
| 32 | MX51_PAD_EIM_D16__AUD4_RXFS 0 | ||
| 33 | MX51_PAD_EIM_D16__AUD5_TXD 1 | ||
| 34 | MX51_PAD_EIM_D16__EIM_D16 2 | ||
| 35 | MX51_PAD_EIM_D16__GPIO2_0 3 | ||
| 36 | MX51_PAD_EIM_D16__I2C1_SDA 4 | ||
| 37 | MX51_PAD_EIM_D16__UART2_CTS 5 | ||
| 38 | MX51_PAD_EIM_D16__USBH2_DATA0 6 | ||
| 39 | MX51_PAD_EIM_D17__AUD5_RXD 7 | ||
| 40 | MX51_PAD_EIM_D17__EIM_D17 8 | ||
| 41 | MX51_PAD_EIM_D17__GPIO2_1 9 | ||
| 42 | MX51_PAD_EIM_D17__UART2_RXD 10 | ||
| 43 | MX51_PAD_EIM_D17__UART3_CTS 11 | ||
| 44 | MX51_PAD_EIM_D17__USBH2_DATA1 12 | ||
| 45 | MX51_PAD_EIM_D18__AUD5_TXC 13 | ||
| 46 | MX51_PAD_EIM_D18__EIM_D18 14 | ||
| 47 | MX51_PAD_EIM_D18__GPIO2_2 15 | ||
| 48 | MX51_PAD_EIM_D18__UART2_TXD 16 | ||
| 49 | MX51_PAD_EIM_D18__UART3_RTS 17 | ||
| 50 | MX51_PAD_EIM_D18__USBH2_DATA2 18 | ||
| 51 | MX51_PAD_EIM_D19__AUD4_RXC 19 | ||
| 52 | MX51_PAD_EIM_D19__AUD5_TXFS 20 | ||
| 53 | MX51_PAD_EIM_D19__EIM_D19 21 | ||
| 54 | MX51_PAD_EIM_D19__GPIO2_3 22 | ||
| 55 | MX51_PAD_EIM_D19__I2C1_SCL 23 | ||
| 56 | MX51_PAD_EIM_D19__UART2_RTS 24 | ||
| 57 | MX51_PAD_EIM_D19__USBH2_DATA3 25 | ||
| 58 | MX51_PAD_EIM_D20__AUD4_TXD 26 | ||
| 59 | MX51_PAD_EIM_D20__EIM_D20 27 | ||
| 60 | MX51_PAD_EIM_D20__GPIO2_4 28 | ||
| 61 | MX51_PAD_EIM_D20__SRTC_ALARM_DEB 29 | ||
| 62 | MX51_PAD_EIM_D20__USBH2_DATA4 30 | ||
| 63 | MX51_PAD_EIM_D21__AUD4_RXD 31 | ||
| 64 | MX51_PAD_EIM_D21__EIM_D21 32 | ||
| 65 | MX51_PAD_EIM_D21__GPIO2_5 33 | ||
| 66 | MX51_PAD_EIM_D21__SRTC_ALARM_DEB 34 | ||
| 67 | MX51_PAD_EIM_D21__USBH2_DATA5 35 | ||
| 68 | MX51_PAD_EIM_D22__AUD4_TXC 36 | ||
| 69 | MX51_PAD_EIM_D22__EIM_D22 37 | ||
| 70 | MX51_PAD_EIM_D22__GPIO2_6 38 | ||
| 71 | MX51_PAD_EIM_D22__USBH2_DATA6 39 | ||
| 72 | MX51_PAD_EIM_D23__AUD4_TXFS 40 | ||
| 73 | MX51_PAD_EIM_D23__EIM_D23 41 | ||
| 74 | MX51_PAD_EIM_D23__GPIO2_7 42 | ||
| 75 | MX51_PAD_EIM_D23__SPDIF_OUT1 43 | ||
| 76 | MX51_PAD_EIM_D23__USBH2_DATA7 44 | ||
| 77 | MX51_PAD_EIM_D24__AUD6_RXFS 45 | ||
| 78 | MX51_PAD_EIM_D24__EIM_D24 46 | ||
| 79 | MX51_PAD_EIM_D24__GPIO2_8 47 | ||
| 80 | MX51_PAD_EIM_D24__I2C2_SDA 48 | ||
| 81 | MX51_PAD_EIM_D24__UART3_CTS 49 | ||
| 82 | MX51_PAD_EIM_D24__USBOTG_DATA0 50 | ||
| 83 | MX51_PAD_EIM_D25__EIM_D25 51 | ||
| 84 | MX51_PAD_EIM_D25__KEY_COL6 52 | ||
| 85 | MX51_PAD_EIM_D25__UART2_CTS 53 | ||
| 86 | MX51_PAD_EIM_D25__UART3_RXD 54 | ||
| 87 | MX51_PAD_EIM_D25__USBOTG_DATA1 55 | ||
| 88 | MX51_PAD_EIM_D26__EIM_D26 56 | ||
| 89 | MX51_PAD_EIM_D26__KEY_COL7 57 | ||
| 90 | MX51_PAD_EIM_D26__UART2_RTS 58 | ||
| 91 | MX51_PAD_EIM_D26__UART3_TXD 59 | ||
| 92 | MX51_PAD_EIM_D26__USBOTG_DATA2 60 | ||
| 93 | MX51_PAD_EIM_D27__AUD6_RXC 61 | ||
| 94 | MX51_PAD_EIM_D27__EIM_D27 62 | ||
| 95 | MX51_PAD_EIM_D27__GPIO2_9 63 | ||
| 96 | MX51_PAD_EIM_D27__I2C2_SCL 64 | ||
| 97 | MX51_PAD_EIM_D27__UART3_RTS 65 | ||
| 98 | MX51_PAD_EIM_D27__USBOTG_DATA3 66 | ||
| 99 | MX51_PAD_EIM_D28__AUD6_TXD 67 | ||
| 100 | MX51_PAD_EIM_D28__EIM_D28 68 | ||
| 101 | MX51_PAD_EIM_D28__KEY_ROW4 69 | ||
| 102 | MX51_PAD_EIM_D28__USBOTG_DATA4 70 | ||
| 103 | MX51_PAD_EIM_D29__AUD6_RXD 71 | ||
| 104 | MX51_PAD_EIM_D29__EIM_D29 72 | ||
| 105 | MX51_PAD_EIM_D29__KEY_ROW5 73 | ||
| 106 | MX51_PAD_EIM_D29__USBOTG_DATA5 74 | ||
| 107 | MX51_PAD_EIM_D30__AUD6_TXC 75 | ||
| 108 | MX51_PAD_EIM_D30__EIM_D30 76 | ||
| 109 | MX51_PAD_EIM_D30__KEY_ROW6 77 | ||
| 110 | MX51_PAD_EIM_D30__USBOTG_DATA6 78 | ||
| 111 | MX51_PAD_EIM_D31__AUD6_TXFS 79 | ||
| 112 | MX51_PAD_EIM_D31__EIM_D31 80 | ||
| 113 | MX51_PAD_EIM_D31__KEY_ROW7 81 | ||
| 114 | MX51_PAD_EIM_D31__USBOTG_DATA7 82 | ||
| 115 | MX51_PAD_EIM_A16__EIM_A16 83 | ||
| 116 | MX51_PAD_EIM_A16__GPIO2_10 84 | ||
| 117 | MX51_PAD_EIM_A16__OSC_FREQ_SEL0 85 | ||
| 118 | MX51_PAD_EIM_A17__EIM_A17 86 | ||
| 119 | MX51_PAD_EIM_A17__GPIO2_11 87 | ||
| 120 | MX51_PAD_EIM_A17__OSC_FREQ_SEL1 88 | ||
| 121 | MX51_PAD_EIM_A18__BOOT_LPB0 89 | ||
| 122 | MX51_PAD_EIM_A18__EIM_A18 90 | ||
| 123 | MX51_PAD_EIM_A18__GPIO2_12 91 | ||
| 124 | MX51_PAD_EIM_A19__BOOT_LPB1 92 | ||
| 125 | MX51_PAD_EIM_A19__EIM_A19 93 | ||
| 126 | MX51_PAD_EIM_A19__GPIO2_13 94 | ||
| 127 | MX51_PAD_EIM_A20__BOOT_UART_SRC0 95 | ||
| 128 | MX51_PAD_EIM_A20__EIM_A20 96 | ||
| 129 | MX51_PAD_EIM_A20__GPIO2_14 97 | ||
| 130 | MX51_PAD_EIM_A21__BOOT_UART_SRC1 98 | ||
| 131 | MX51_PAD_EIM_A21__EIM_A21 99 | ||
| 132 | MX51_PAD_EIM_A21__GPIO2_15 100 | ||
| 133 | MX51_PAD_EIM_A22__EIM_A22 101 | ||
| 134 | MX51_PAD_EIM_A22__GPIO2_16 102 | ||
| 135 | MX51_PAD_EIM_A23__BOOT_HPN_EN 103 | ||
| 136 | MX51_PAD_EIM_A23__EIM_A23 104 | ||
| 137 | MX51_PAD_EIM_A23__GPIO2_17 105 | ||
| 138 | MX51_PAD_EIM_A24__EIM_A24 106 | ||
| 139 | MX51_PAD_EIM_A24__GPIO2_18 107 | ||
| 140 | MX51_PAD_EIM_A24__USBH2_CLK 108 | ||
| 141 | MX51_PAD_EIM_A25__DISP1_PIN4 109 | ||
| 142 | MX51_PAD_EIM_A25__EIM_A25 110 | ||
| 143 | MX51_PAD_EIM_A25__GPIO2_19 111 | ||
| 144 | MX51_PAD_EIM_A25__USBH2_DIR 112 | ||
| 145 | MX51_PAD_EIM_A26__CSI1_DATA_EN 113 | ||
| 146 | MX51_PAD_EIM_A26__DISP2_EXT_CLK 114 | ||
| 147 | MX51_PAD_EIM_A26__EIM_A26 115 | ||
| 148 | MX51_PAD_EIM_A26__GPIO2_20 116 | ||
| 149 | MX51_PAD_EIM_A26__USBH2_STP 117 | ||
| 150 | MX51_PAD_EIM_A27__CSI2_DATA_EN 118 | ||
| 151 | MX51_PAD_EIM_A27__DISP1_PIN1 119 | ||
| 152 | MX51_PAD_EIM_A27__EIM_A27 120 | ||
| 153 | MX51_PAD_EIM_A27__GPIO2_21 121 | ||
| 154 | MX51_PAD_EIM_A27__USBH2_NXT 122 | ||
| 155 | MX51_PAD_EIM_EB0__EIM_EB0 123 | ||
| 156 | MX51_PAD_EIM_EB1__EIM_EB1 124 | ||
| 157 | MX51_PAD_EIM_EB2__AUD5_RXFS 125 | ||
| 158 | MX51_PAD_EIM_EB2__CSI1_D2 126 | ||
| 159 | MX51_PAD_EIM_EB2__EIM_EB2 127 | ||
| 160 | MX51_PAD_EIM_EB2__FEC_MDIO 128 | ||
| 161 | MX51_PAD_EIM_EB2__GPIO2_22 129 | ||
| 162 | MX51_PAD_EIM_EB2__GPT_CMPOUT1 130 | ||
| 163 | MX51_PAD_EIM_EB3__AUD5_RXC 131 | ||
| 164 | MX51_PAD_EIM_EB3__CSI1_D3 132 | ||
| 165 | MX51_PAD_EIM_EB3__EIM_EB3 133 | ||
| 166 | MX51_PAD_EIM_EB3__FEC_RDATA1 134 | ||
| 167 | MX51_PAD_EIM_EB3__GPIO2_23 135 | ||
| 168 | MX51_PAD_EIM_EB3__GPT_CMPOUT2 136 | ||
| 169 | MX51_PAD_EIM_OE__EIM_OE 137 | ||
| 170 | MX51_PAD_EIM_OE__GPIO2_24 138 | ||
| 171 | MX51_PAD_EIM_CS0__EIM_CS0 139 | ||
| 172 | MX51_PAD_EIM_CS0__GPIO2_25 140 | ||
| 173 | MX51_PAD_EIM_CS1__EIM_CS1 141 | ||
| 174 | MX51_PAD_EIM_CS1__GPIO2_26 142 | ||
| 175 | MX51_PAD_EIM_CS2__AUD5_TXD 143 | ||
| 176 | MX51_PAD_EIM_CS2__CSI1_D4 144 | ||
| 177 | MX51_PAD_EIM_CS2__EIM_CS2 145 | ||
| 178 | MX51_PAD_EIM_CS2__FEC_RDATA2 146 | ||
| 179 | MX51_PAD_EIM_CS2__GPIO2_27 147 | ||
| 180 | MX51_PAD_EIM_CS2__USBOTG_STP 148 | ||
| 181 | MX51_PAD_EIM_CS3__AUD5_RXD 149 | ||
| 182 | MX51_PAD_EIM_CS3__CSI1_D5 150 | ||
| 183 | MX51_PAD_EIM_CS3__EIM_CS3 151 | ||
| 184 | MX51_PAD_EIM_CS3__FEC_RDATA3 152 | ||
| 185 | MX51_PAD_EIM_CS3__GPIO2_28 153 | ||
| 186 | MX51_PAD_EIM_CS3__USBOTG_NXT 154 | ||
| 187 | MX51_PAD_EIM_CS4__AUD5_TXC 155 | ||
| 188 | MX51_PAD_EIM_CS4__CSI1_D6 156 | ||
| 189 | MX51_PAD_EIM_CS4__EIM_CS4 157 | ||
| 190 | MX51_PAD_EIM_CS4__FEC_RX_ER 158 | ||
| 191 | MX51_PAD_EIM_CS4__GPIO2_29 159 | ||
| 192 | MX51_PAD_EIM_CS4__USBOTG_CLK 160 | ||
| 193 | MX51_PAD_EIM_CS5__AUD5_TXFS 161 | ||
| 194 | MX51_PAD_EIM_CS5__CSI1_D7 162 | ||
| 195 | MX51_PAD_EIM_CS5__DISP1_EXT_CLK 163 | ||
| 196 | MX51_PAD_EIM_CS5__EIM_CS5 164 | ||
| 197 | MX51_PAD_EIM_CS5__FEC_CRS 165 | ||
| 198 | MX51_PAD_EIM_CS5__GPIO2_30 166 | ||
| 199 | MX51_PAD_EIM_CS5__USBOTG_DIR 167 | ||
| 200 | MX51_PAD_EIM_DTACK__EIM_DTACK 168 | ||
| 201 | MX51_PAD_EIM_DTACK__GPIO2_31 169 | ||
| 202 | MX51_PAD_EIM_LBA__EIM_LBA 170 | ||
| 203 | MX51_PAD_EIM_LBA__GPIO3_1 171 | ||
| 204 | MX51_PAD_EIM_CRE__EIM_CRE 172 | ||
| 205 | MX51_PAD_EIM_CRE__GPIO3_2 173 | ||
| 206 | MX51_PAD_DRAM_CS1__DRAM_CS1 174 | ||
| 207 | MX51_PAD_NANDF_WE_B__GPIO3_3 175 | ||
| 208 | MX51_PAD_NANDF_WE_B__NANDF_WE_B 176 | ||
| 209 | MX51_PAD_NANDF_WE_B__PATA_DIOW 177 | ||
| 210 | MX51_PAD_NANDF_WE_B__SD3_DATA0 178 | ||
| 211 | MX51_PAD_NANDF_RE_B__GPIO3_4 179 | ||
| 212 | MX51_PAD_NANDF_RE_B__NANDF_RE_B 180 | ||
| 213 | MX51_PAD_NANDF_RE_B__PATA_DIOR 181 | ||
| 214 | MX51_PAD_NANDF_RE_B__SD3_DATA1 182 | ||
| 215 | MX51_PAD_NANDF_ALE__GPIO3_5 183 | ||
| 216 | MX51_PAD_NANDF_ALE__NANDF_ALE 184 | ||
| 217 | MX51_PAD_NANDF_ALE__PATA_BUFFER_EN 185 | ||
| 218 | MX51_PAD_NANDF_CLE__GPIO3_6 186 | ||
| 219 | MX51_PAD_NANDF_CLE__NANDF_CLE 187 | ||
| 220 | MX51_PAD_NANDF_CLE__PATA_RESET_B 188 | ||
| 221 | MX51_PAD_NANDF_WP_B__GPIO3_7 189 | ||
| 222 | MX51_PAD_NANDF_WP_B__NANDF_WP_B 190 | ||
| 223 | MX51_PAD_NANDF_WP_B__PATA_DMACK 191 | ||
| 224 | MX51_PAD_NANDF_WP_B__SD3_DATA2 192 | ||
| 225 | MX51_PAD_NANDF_RB0__ECSPI2_SS1 193 | ||
| 226 | MX51_PAD_NANDF_RB0__GPIO3_8 194 | ||
| 227 | MX51_PAD_NANDF_RB0__NANDF_RB0 195 | ||
| 228 | MX51_PAD_NANDF_RB0__PATA_DMARQ 196 | ||
| 229 | MX51_PAD_NANDF_RB0__SD3_DATA3 197 | ||
| 230 | MX51_PAD_NANDF_RB1__CSPI_MOSI 198 | ||
| 231 | MX51_PAD_NANDF_RB1__ECSPI2_RDY 199 | ||
| 232 | MX51_PAD_NANDF_RB1__GPIO3_9 200 | ||
| 233 | MX51_PAD_NANDF_RB1__NANDF_RB1 201 | ||
| 234 | MX51_PAD_NANDF_RB1__PATA_IORDY 202 | ||
| 235 | MX51_PAD_NANDF_RB1__SD4_CMD 203 | ||
| 236 | MX51_PAD_NANDF_RB2__DISP2_WAIT 204 | ||
| 237 | MX51_PAD_NANDF_RB2__ECSPI2_SCLK 205 | ||
| 238 | MX51_PAD_NANDF_RB2__FEC_COL 206 | ||
| 239 | MX51_PAD_NANDF_RB2__GPIO3_10 207 | ||
| 240 | MX51_PAD_NANDF_RB2__NANDF_RB2 208 | ||
| 241 | MX51_PAD_NANDF_RB2__USBH3_H3_DP 209 | ||
| 242 | MX51_PAD_NANDF_RB2__USBH3_NXT 210 | ||
| 243 | MX51_PAD_NANDF_RB3__DISP1_WAIT 211 | ||
| 244 | MX51_PAD_NANDF_RB3__ECSPI2_MISO 212 | ||
| 245 | MX51_PAD_NANDF_RB3__FEC_RX_CLK 213 | ||
| 246 | MX51_PAD_NANDF_RB3__GPIO3_11 214 | ||
| 247 | MX51_PAD_NANDF_RB3__NANDF_RB3 215 | ||
| 248 | MX51_PAD_NANDF_RB3__USBH3_CLK 216 | ||
| 249 | MX51_PAD_NANDF_RB3__USBH3_H3_DM 217 | ||
| 250 | MX51_PAD_GPIO_NAND__GPIO_NAND 218 | ||
| 251 | MX51_PAD_GPIO_NAND__PATA_INTRQ 219 | ||
| 252 | MX51_PAD_NANDF_CS0__GPIO3_16 220 | ||
| 253 | MX51_PAD_NANDF_CS0__NANDF_CS0 221 | ||
| 254 | MX51_PAD_NANDF_CS1__GPIO3_17 222 | ||
| 255 | MX51_PAD_NANDF_CS1__NANDF_CS1 223 | ||
| 256 | MX51_PAD_NANDF_CS2__CSPI_SCLK 224 | ||
| 257 | MX51_PAD_NANDF_CS2__FEC_TX_ER 225 | ||
| 258 | MX51_PAD_NANDF_CS2__GPIO3_18 226 | ||
| 259 | MX51_PAD_NANDF_CS2__NANDF_CS2 227 | ||
| 260 | MX51_PAD_NANDF_CS2__PATA_CS_0 228 | ||
| 261 | MX51_PAD_NANDF_CS2__SD4_CLK 229 | ||
| 262 | MX51_PAD_NANDF_CS2__USBH3_H1_DP 230 | ||
| 263 | MX51_PAD_NANDF_CS3__FEC_MDC 231 | ||
| 264 | MX51_PAD_NANDF_CS3__GPIO3_19 232 | ||
| 265 | MX51_PAD_NANDF_CS3__NANDF_CS3 233 | ||
| 266 | MX51_PAD_NANDF_CS3__PATA_CS_1 234 | ||
| 267 | MX51_PAD_NANDF_CS3__SD4_DAT0 235 | ||
| 268 | MX51_PAD_NANDF_CS3__USBH3_H1_DM 236 | ||
| 269 | MX51_PAD_NANDF_CS4__FEC_TDATA1 237 | ||
| 270 | MX51_PAD_NANDF_CS4__GPIO3_20 238 | ||
| 271 | MX51_PAD_NANDF_CS4__NANDF_CS4 239 | ||
| 272 | MX51_PAD_NANDF_CS4__PATA_DA_0 240 | ||
| 273 | MX51_PAD_NANDF_CS4__SD4_DAT1 241 | ||
| 274 | MX51_PAD_NANDF_CS4__USBH3_STP 242 | ||
| 275 | MX51_PAD_NANDF_CS5__FEC_TDATA2 243 | ||
| 276 | MX51_PAD_NANDF_CS5__GPIO3_21 244 | ||
| 277 | MX51_PAD_NANDF_CS5__NANDF_CS5 245 | ||
| 278 | MX51_PAD_NANDF_CS5__PATA_DA_1 246 | ||
| 279 | MX51_PAD_NANDF_CS5__SD4_DAT2 247 | ||
| 280 | MX51_PAD_NANDF_CS5__USBH3_DIR 248 | ||
| 281 | MX51_PAD_NANDF_CS6__CSPI_SS3 249 | ||
| 282 | MX51_PAD_NANDF_CS6__FEC_TDATA3 250 | ||
| 283 | MX51_PAD_NANDF_CS6__GPIO3_22 251 | ||
| 284 | MX51_PAD_NANDF_CS6__NANDF_CS6 252 | ||
| 285 | MX51_PAD_NANDF_CS6__PATA_DA_2 253 | ||
| 286 | MX51_PAD_NANDF_CS6__SD4_DAT3 254 | ||
| 287 | MX51_PAD_NANDF_CS7__FEC_TX_EN 255 | ||
| 288 | MX51_PAD_NANDF_CS7__GPIO3_23 256 | ||
| 289 | MX51_PAD_NANDF_CS7__NANDF_CS7 257 | ||
| 290 | MX51_PAD_NANDF_CS7__SD3_CLK 258 | ||
| 291 | MX51_PAD_NANDF_RDY_INT__ECSPI2_SS0 259 | ||
| 292 | MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK 260 | ||
| 293 | MX51_PAD_NANDF_RDY_INT__GPIO3_24 261 | ||
| 294 | MX51_PAD_NANDF_RDY_INT__NANDF_RDY_INT 262 | ||
| 295 | MX51_PAD_NANDF_RDY_INT__SD3_CMD 263 | ||
| 296 | MX51_PAD_NANDF_D15__ECSPI2_MOSI 264 | ||
| 297 | MX51_PAD_NANDF_D15__GPIO3_25 265 | ||
| 298 | MX51_PAD_NANDF_D15__NANDF_D15 266 | ||
| 299 | MX51_PAD_NANDF_D15__PATA_DATA15 267 | ||
| 300 | MX51_PAD_NANDF_D15__SD3_DAT7 268 | ||
| 301 | MX51_PAD_NANDF_D14__ECSPI2_SS3 269 | ||
| 302 | MX51_PAD_NANDF_D14__GPIO3_26 270 | ||
| 303 | MX51_PAD_NANDF_D14__NANDF_D14 271 | ||
| 304 | MX51_PAD_NANDF_D14__PATA_DATA14 272 | ||
| 305 | MX51_PAD_NANDF_D14__SD3_DAT6 273 | ||
| 306 | MX51_PAD_NANDF_D13__ECSPI2_SS2 274 | ||
| 307 | MX51_PAD_NANDF_D13__GPIO3_27 275 | ||
| 308 | MX51_PAD_NANDF_D13__NANDF_D13 276 | ||
| 309 | MX51_PAD_NANDF_D13__PATA_DATA13 277 | ||
| 310 | MX51_PAD_NANDF_D13__SD3_DAT5 278 | ||
| 311 | MX51_PAD_NANDF_D12__ECSPI2_SS1 279 | ||
| 312 | MX51_PAD_NANDF_D12__GPIO3_28 280 | ||
| 313 | MX51_PAD_NANDF_D12__NANDF_D12 281 | ||
| 314 | MX51_PAD_NANDF_D12__PATA_DATA12 282 | ||
| 315 | MX51_PAD_NANDF_D12__SD3_DAT4 283 | ||
| 316 | MX51_PAD_NANDF_D11__FEC_RX_DV 284 | ||
| 317 | MX51_PAD_NANDF_D11__GPIO3_29 285 | ||
| 318 | MX51_PAD_NANDF_D11__NANDF_D11 286 | ||
| 319 | MX51_PAD_NANDF_D11__PATA_DATA11 287 | ||
| 320 | MX51_PAD_NANDF_D11__SD3_DATA3 288 | ||
| 321 | MX51_PAD_NANDF_D10__GPIO3_30 289 | ||
| 322 | MX51_PAD_NANDF_D10__NANDF_D10 290 | ||
| 323 | MX51_PAD_NANDF_D10__PATA_DATA10 291 | ||
| 324 | MX51_PAD_NANDF_D10__SD3_DATA2 292 | ||
| 325 | MX51_PAD_NANDF_D9__FEC_RDATA0 293 | ||
| 326 | MX51_PAD_NANDF_D9__GPIO3_31 294 | ||
| 327 | MX51_PAD_NANDF_D9__NANDF_D9 295 | ||
| 328 | MX51_PAD_NANDF_D9__PATA_DATA9 296 | ||
| 329 | MX51_PAD_NANDF_D9__SD3_DATA1 297 | ||
| 330 | MX51_PAD_NANDF_D8__FEC_TDATA0 298 | ||
| 331 | MX51_PAD_NANDF_D8__GPIO4_0 299 | ||
| 332 | MX51_PAD_NANDF_D8__NANDF_D8 300 | ||
| 333 | MX51_PAD_NANDF_D8__PATA_DATA8 301 | ||
| 334 | MX51_PAD_NANDF_D8__SD3_DATA0 302 | ||
| 335 | MX51_PAD_NANDF_D7__GPIO4_1 303 | ||
| 336 | MX51_PAD_NANDF_D7__NANDF_D7 304 | ||
| 337 | MX51_PAD_NANDF_D7__PATA_DATA7 305 | ||
| 338 | MX51_PAD_NANDF_D7__USBH3_DATA0 306 | ||
| 339 | MX51_PAD_NANDF_D6__GPIO4_2 307 | ||
| 340 | MX51_PAD_NANDF_D6__NANDF_D6 308 | ||
| 341 | MX51_PAD_NANDF_D6__PATA_DATA6 309 | ||
| 342 | MX51_PAD_NANDF_D6__SD4_LCTL 310 | ||
| 343 | MX51_PAD_NANDF_D6__USBH3_DATA1 311 | ||
| 344 | MX51_PAD_NANDF_D5__GPIO4_3 312 | ||
| 345 | MX51_PAD_NANDF_D5__NANDF_D5 313 | ||
| 346 | MX51_PAD_NANDF_D5__PATA_DATA5 314 | ||
| 347 | MX51_PAD_NANDF_D5__SD4_WP 315 | ||
| 348 | MX51_PAD_NANDF_D5__USBH3_DATA2 316 | ||
| 349 | MX51_PAD_NANDF_D4__GPIO4_4 317 | ||
| 350 | MX51_PAD_NANDF_D4__NANDF_D4 318 | ||
| 351 | MX51_PAD_NANDF_D4__PATA_DATA4 319 | ||
| 352 | MX51_PAD_NANDF_D4__SD4_CD 320 | ||
| 353 | MX51_PAD_NANDF_D4__USBH3_DATA3 321 | ||
| 354 | MX51_PAD_NANDF_D3__GPIO4_5 322 | ||
| 355 | MX51_PAD_NANDF_D3__NANDF_D3 323 | ||
| 356 | MX51_PAD_NANDF_D3__PATA_DATA3 324 | ||
| 357 | MX51_PAD_NANDF_D3__SD4_DAT4 325 | ||
| 358 | MX51_PAD_NANDF_D3__USBH3_DATA4 326 | ||
| 359 | MX51_PAD_NANDF_D2__GPIO4_6 327 | ||
| 360 | MX51_PAD_NANDF_D2__NANDF_D2 328 | ||
| 361 | MX51_PAD_NANDF_D2__PATA_DATA2 329 | ||
| 362 | MX51_PAD_NANDF_D2__SD4_DAT5 330 | ||
| 363 | MX51_PAD_NANDF_D2__USBH3_DATA5 331 | ||
| 364 | MX51_PAD_NANDF_D1__GPIO4_7 332 | ||
| 365 | MX51_PAD_NANDF_D1__NANDF_D1 333 | ||
| 366 | MX51_PAD_NANDF_D1__PATA_DATA1 334 | ||
| 367 | MX51_PAD_NANDF_D1__SD4_DAT6 335 | ||
| 368 | MX51_PAD_NANDF_D1__USBH3_DATA6 336 | ||
| 369 | MX51_PAD_NANDF_D0__GPIO4_8 337 | ||
| 370 | MX51_PAD_NANDF_D0__NANDF_D0 338 | ||
| 371 | MX51_PAD_NANDF_D0__PATA_DATA0 339 | ||
| 372 | MX51_PAD_NANDF_D0__SD4_DAT7 340 | ||
| 373 | MX51_PAD_NANDF_D0__USBH3_DATA7 341 | ||
| 374 | MX51_PAD_CSI1_D8__CSI1_D8 342 | ||
| 375 | MX51_PAD_CSI1_D8__GPIO3_12 343 | ||
| 376 | MX51_PAD_CSI1_D9__CSI1_D9 344 | ||
| 377 | MX51_PAD_CSI1_D9__GPIO3_13 345 | ||
| 378 | MX51_PAD_CSI1_D10__CSI1_D10 346 | ||
| 379 | MX51_PAD_CSI1_D11__CSI1_D11 347 | ||
| 380 | MX51_PAD_CSI1_D12__CSI1_D12 348 | ||
| 381 | MX51_PAD_CSI1_D13__CSI1_D13 349 | ||
| 382 | MX51_PAD_CSI1_D14__CSI1_D14 350 | ||
| 383 | MX51_PAD_CSI1_D15__CSI1_D15 351 | ||
| 384 | MX51_PAD_CSI1_D16__CSI1_D16 352 | ||
| 385 | MX51_PAD_CSI1_D17__CSI1_D17 353 | ||
| 386 | MX51_PAD_CSI1_D18__CSI1_D18 354 | ||
| 387 | MX51_PAD_CSI1_D19__CSI1_D19 355 | ||
| 388 | MX51_PAD_CSI1_VSYNC__CSI1_VSYNC 356 | ||
| 389 | MX51_PAD_CSI1_VSYNC__GPIO3_14 357 | ||
| 390 | MX51_PAD_CSI1_HSYNC__CSI1_HSYNC 358 | ||
| 391 | MX51_PAD_CSI1_HSYNC__GPIO3_15 359 | ||
| 392 | MX51_PAD_CSI1_PIXCLK__CSI1_PIXCLK 360 | ||
| 393 | MX51_PAD_CSI1_MCLK__CSI1_MCLK 361 | ||
| 394 | MX51_PAD_CSI2_D12__CSI2_D12 362 | ||
| 395 | MX51_PAD_CSI2_D12__GPIO4_9 363 | ||
| 396 | MX51_PAD_CSI2_D13__CSI2_D13 364 | ||
| 397 | MX51_PAD_CSI2_D13__GPIO4_10 365 | ||
| 398 | MX51_PAD_CSI2_D14__CSI2_D14 366 | ||
| 399 | MX51_PAD_CSI2_D15__CSI2_D15 367 | ||
| 400 | MX51_PAD_CSI2_D16__CSI2_D16 368 | ||
| 401 | MX51_PAD_CSI2_D17__CSI2_D17 369 | ||
| 402 | MX51_PAD_CSI2_D18__CSI2_D18 370 | ||
| 403 | MX51_PAD_CSI2_D18__GPIO4_11 371 | ||
| 404 | MX51_PAD_CSI2_D19__CSI2_D19 372 | ||
| 405 | MX51_PAD_CSI2_D19__GPIO4_12 373 | ||
| 406 | MX51_PAD_CSI2_VSYNC__CSI2_VSYNC 374 | ||
| 407 | MX51_PAD_CSI2_VSYNC__GPIO4_13 375 | ||
| 408 | MX51_PAD_CSI2_HSYNC__CSI2_HSYNC 376 | ||
| 409 | MX51_PAD_CSI2_HSYNC__GPIO4_14 377 | ||
| 410 | MX51_PAD_CSI2_PIXCLK__CSI2_PIXCLK 378 | ||
| 411 | MX51_PAD_CSI2_PIXCLK__GPIO4_15 379 | ||
| 412 | MX51_PAD_I2C1_CLK__GPIO4_16 380 | ||
| 413 | MX51_PAD_I2C1_CLK__I2C1_CLK 381 | ||
| 414 | MX51_PAD_I2C1_DAT__GPIO4_17 382 | ||
| 415 | MX51_PAD_I2C1_DAT__I2C1_DAT 383 | ||
| 416 | MX51_PAD_AUD3_BB_TXD__AUD3_TXD 384 | ||
| 417 | MX51_PAD_AUD3_BB_TXD__GPIO4_18 385 | ||
| 418 | MX51_PAD_AUD3_BB_RXD__AUD3_RXD 386 | ||
| 419 | MX51_PAD_AUD3_BB_RXD__GPIO4_19 387 | ||
| 420 | MX51_PAD_AUD3_BB_RXD__UART3_RXD 388 | ||
| 421 | MX51_PAD_AUD3_BB_CK__AUD3_TXC 389 | ||
| 422 | MX51_PAD_AUD3_BB_CK__GPIO4_20 390 | ||
| 423 | MX51_PAD_AUD3_BB_FS__AUD3_TXFS 391 | ||
| 424 | MX51_PAD_AUD3_BB_FS__GPIO4_21 392 | ||
| 425 | MX51_PAD_AUD3_BB_FS__UART3_TXD 393 | ||
| 426 | MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 394 | ||
| 427 | MX51_PAD_CSPI1_MOSI__GPIO4_22 395 | ||
| 428 | MX51_PAD_CSPI1_MOSI__I2C1_SDA 396 | ||
| 429 | MX51_PAD_CSPI1_MISO__AUD4_RXD 397 | ||
| 430 | MX51_PAD_CSPI1_MISO__ECSPI1_MISO 398 | ||
| 431 | MX51_PAD_CSPI1_MISO__GPIO4_23 399 | ||
| 432 | MX51_PAD_CSPI1_SS0__AUD4_TXC 400 | ||
| 433 | MX51_PAD_CSPI1_SS0__ECSPI1_SS0 401 | ||
| 434 | MX51_PAD_CSPI1_SS0__GPIO4_24 402 | ||
| 435 | MX51_PAD_CSPI1_SS1__AUD4_TXD 403 | ||
| 436 | MX51_PAD_CSPI1_SS1__ECSPI1_SS1 404 | ||
| 437 | MX51_PAD_CSPI1_SS1__GPIO4_25 405 | ||
| 438 | MX51_PAD_CSPI1_RDY__AUD4_TXFS 406 | ||
| 439 | MX51_PAD_CSPI1_RDY__ECSPI1_RDY 407 | ||
| 440 | MX51_PAD_CSPI1_RDY__GPIO4_26 408 | ||
| 441 | MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 409 | ||
| 442 | MX51_PAD_CSPI1_SCLK__GPIO4_27 410 | ||
| 443 | MX51_PAD_CSPI1_SCLK__I2C1_SCL 411 | ||
| 444 | MX51_PAD_UART1_RXD__GPIO4_28 412 | ||
| 445 | MX51_PAD_UART1_RXD__UART1_RXD 413 | ||
| 446 | MX51_PAD_UART1_TXD__GPIO4_29 414 | ||
| 447 | MX51_PAD_UART1_TXD__PWM2_PWMO 415 | ||
| 448 | MX51_PAD_UART1_TXD__UART1_TXD 416 | ||
| 449 | MX51_PAD_UART1_RTS__GPIO4_30 417 | ||
| 450 | MX51_PAD_UART1_RTS__UART1_RTS 418 | ||
| 451 | MX51_PAD_UART1_CTS__GPIO4_31 419 | ||
| 452 | MX51_PAD_UART1_CTS__UART1_CTS 420 | ||
| 453 | MX51_PAD_UART2_RXD__FIRI_TXD 421 | ||
| 454 | MX51_PAD_UART2_RXD__GPIO1_20 422 | ||
| 455 | MX51_PAD_UART2_RXD__UART2_RXD 423 | ||
| 456 | MX51_PAD_UART2_TXD__FIRI_RXD 424 | ||
| 457 | MX51_PAD_UART2_TXD__GPIO1_21 425 | ||
| 458 | MX51_PAD_UART2_TXD__UART2_TXD 426 | ||
| 459 | MX51_PAD_UART3_RXD__CSI1_D0 427 | ||
| 460 | MX51_PAD_UART3_RXD__GPIO1_22 428 | ||
| 461 | MX51_PAD_UART3_RXD__UART1_DTR 429 | ||
| 462 | MX51_PAD_UART3_RXD__UART3_RXD 430 | ||
| 463 | MX51_PAD_UART3_TXD__CSI1_D1 431 | ||
| 464 | MX51_PAD_UART3_TXD__GPIO1_23 432 | ||
| 465 | MX51_PAD_UART3_TXD__UART1_DSR 433 | ||
| 466 | MX51_PAD_UART3_TXD__UART3_TXD 434 | ||
| 467 | MX51_PAD_OWIRE_LINE__GPIO1_24 435 | ||
| 468 | MX51_PAD_OWIRE_LINE__OWIRE_LINE 436 | ||
| 469 | MX51_PAD_OWIRE_LINE__SPDIF_OUT 437 | ||
| 470 | MX51_PAD_KEY_ROW0__KEY_ROW0 438 | ||
| 471 | MX51_PAD_KEY_ROW1__KEY_ROW1 439 | ||
| 472 | MX51_PAD_KEY_ROW2__KEY_ROW2 440 | ||
| 473 | MX51_PAD_KEY_ROW3__KEY_ROW3 441 | ||
| 474 | MX51_PAD_KEY_COL0__KEY_COL0 442 | ||
| 475 | MX51_PAD_KEY_COL0__PLL1_BYP 443 | ||
| 476 | MX51_PAD_KEY_COL1__KEY_COL1 444 | ||
| 477 | MX51_PAD_KEY_COL1__PLL2_BYP 445 | ||
| 478 | MX51_PAD_KEY_COL2__KEY_COL2 446 | ||
| 479 | MX51_PAD_KEY_COL2__PLL3_BYP 447 | ||
| 480 | MX51_PAD_KEY_COL3__KEY_COL3 448 | ||
| 481 | MX51_PAD_KEY_COL4__I2C2_SCL 449 | ||
| 482 | MX51_PAD_KEY_COL4__KEY_COL4 450 | ||
| 483 | MX51_PAD_KEY_COL4__SPDIF_OUT1 451 | ||
| 484 | MX51_PAD_KEY_COL4__UART1_RI 452 | ||
| 485 | MX51_PAD_KEY_COL4__UART3_RTS 453 | ||
| 486 | MX51_PAD_KEY_COL5__I2C2_SDA 454 | ||
| 487 | MX51_PAD_KEY_COL5__KEY_COL5 455 | ||
| 488 | MX51_PAD_KEY_COL5__UART1_DCD 456 | ||
| 489 | MX51_PAD_KEY_COL5__UART3_CTS 457 | ||
| 490 | MX51_PAD_USBH1_CLK__CSPI_SCLK 458 | ||
| 491 | MX51_PAD_USBH1_CLK__GPIO1_25 459 | ||
| 492 | MX51_PAD_USBH1_CLK__I2C2_SCL 460 | ||
| 493 | MX51_PAD_USBH1_CLK__USBH1_CLK 461 | ||
| 494 | MX51_PAD_USBH1_DIR__CSPI_MOSI 462 | ||
| 495 | MX51_PAD_USBH1_DIR__GPIO1_26 463 | ||
| 496 | MX51_PAD_USBH1_DIR__I2C2_SDA 464 | ||
| 497 | MX51_PAD_USBH1_DIR__USBH1_DIR 465 | ||
| 498 | MX51_PAD_USBH1_STP__CSPI_RDY 466 | ||
| 499 | MX51_PAD_USBH1_STP__GPIO1_27 467 | ||
| 500 | MX51_PAD_USBH1_STP__UART3_RXD 468 | ||
| 501 | MX51_PAD_USBH1_STP__USBH1_STP 469 | ||
| 502 | MX51_PAD_USBH1_NXT__CSPI_MISO 470 | ||
| 503 | MX51_PAD_USBH1_NXT__GPIO1_28 471 | ||
| 504 | MX51_PAD_USBH1_NXT__UART3_TXD 472 | ||
| 505 | MX51_PAD_USBH1_NXT__USBH1_NXT 473 | ||
| 506 | MX51_PAD_USBH1_DATA0__GPIO1_11 474 | ||
| 507 | MX51_PAD_USBH1_DATA0__UART2_CTS 475 | ||
| 508 | MX51_PAD_USBH1_DATA0__USBH1_DATA0 476 | ||
| 509 | MX51_PAD_USBH1_DATA1__GPIO1_12 477 | ||
| 510 | MX51_PAD_USBH1_DATA1__UART2_RXD 478 | ||
| 511 | MX51_PAD_USBH1_DATA1__USBH1_DATA1 479 | ||
| 512 | MX51_PAD_USBH1_DATA2__GPIO1_13 480 | ||
| 513 | MX51_PAD_USBH1_DATA2__UART2_TXD 481 | ||
| 514 | MX51_PAD_USBH1_DATA2__USBH1_DATA2 482 | ||
| 515 | MX51_PAD_USBH1_DATA3__GPIO1_14 483 | ||
| 516 | MX51_PAD_USBH1_DATA3__UART2_RTS 484 | ||
| 517 | MX51_PAD_USBH1_DATA3__USBH1_DATA3 485 | ||
| 518 | MX51_PAD_USBH1_DATA4__CSPI_SS0 486 | ||
| 519 | MX51_PAD_USBH1_DATA4__GPIO1_15 487 | ||
| 520 | MX51_PAD_USBH1_DATA4__USBH1_DATA4 488 | ||
| 521 | MX51_PAD_USBH1_DATA5__CSPI_SS1 489 | ||
| 522 | MX51_PAD_USBH1_DATA5__GPIO1_16 490 | ||
| 523 | MX51_PAD_USBH1_DATA5__USBH1_DATA5 491 | ||
| 524 | MX51_PAD_USBH1_DATA6__CSPI_SS3 492 | ||
| 525 | MX51_PAD_USBH1_DATA6__GPIO1_17 493 | ||
| 526 | MX51_PAD_USBH1_DATA6__USBH1_DATA6 494 | ||
| 527 | MX51_PAD_USBH1_DATA7__ECSPI1_SS3 495 | ||
| 528 | MX51_PAD_USBH1_DATA7__ECSPI2_SS3 496 | ||
| 529 | MX51_PAD_USBH1_DATA7__GPIO1_18 497 | ||
| 530 | MX51_PAD_USBH1_DATA7__USBH1_DATA7 498 | ||
| 531 | MX51_PAD_DI1_PIN11__DI1_PIN11 499 | ||
| 532 | MX51_PAD_DI1_PIN11__ECSPI1_SS2 500 | ||
| 533 | MX51_PAD_DI1_PIN11__GPIO3_0 501 | ||
| 534 | MX51_PAD_DI1_PIN12__DI1_PIN12 502 | ||
| 535 | MX51_PAD_DI1_PIN12__GPIO3_1 503 | ||
| 536 | MX51_PAD_DI1_PIN13__DI1_PIN13 504 | ||
| 537 | MX51_PAD_DI1_PIN13__GPIO3_2 505 | ||
| 538 | MX51_PAD_DI1_D0_CS__DI1_D0_CS 506 | ||
| 539 | MX51_PAD_DI1_D0_CS__GPIO3_3 507 | ||
| 540 | MX51_PAD_DI1_D1_CS__DI1_D1_CS 508 | ||
| 541 | MX51_PAD_DI1_D1_CS__DISP1_PIN14 509 | ||
| 542 | MX51_PAD_DI1_D1_CS__DISP1_PIN5 510 | ||
| 543 | MX51_PAD_DI1_D1_CS__GPIO3_4 511 | ||
| 544 | MX51_PAD_DISPB2_SER_DIN__DISP1_PIN1 512 | ||
| 545 | MX51_PAD_DISPB2_SER_DIN__DISPB2_SER_DIN 513 | ||
| 546 | MX51_PAD_DISPB2_SER_DIN__GPIO3_5 514 | ||
| 547 | MX51_PAD_DISPB2_SER_DIO__DISP1_PIN6 515 | ||
| 548 | MX51_PAD_DISPB2_SER_DIO__DISPB2_SER_DIO 516 | ||
| 549 | MX51_PAD_DISPB2_SER_DIO__GPIO3_6 517 | ||
| 550 | MX51_PAD_DISPB2_SER_CLK__DISP1_PIN17 518 | ||
| 551 | MX51_PAD_DISPB2_SER_CLK__DISP1_PIN7 519 | ||
| 552 | MX51_PAD_DISPB2_SER_CLK__DISPB2_SER_CLK 520 | ||
| 553 | MX51_PAD_DISPB2_SER_CLK__GPIO3_7 521 | ||
| 554 | MX51_PAD_DISPB2_SER_RS__DISP1_EXT_CLK 522 | ||
| 555 | MX51_PAD_DISPB2_SER_RS__DISP1_PIN16 523 | ||
| 556 | MX51_PAD_DISPB2_SER_RS__DISP1_PIN8 524 | ||
| 557 | MX51_PAD_DISPB2_SER_RS__DISPB2_SER_RS 525 | ||
| 558 | MX51_PAD_DISPB2_SER_RS__DISPB2_SER_RS 526 | ||
| 559 | MX51_PAD_DISPB2_SER_RS__GPIO3_8 527 | ||
| 560 | MX51_PAD_DISP1_DAT0__DISP1_DAT0 528 | ||
| 561 | MX51_PAD_DISP1_DAT1__DISP1_DAT1 529 | ||
| 562 | MX51_PAD_DISP1_DAT2__DISP1_DAT2 530 | ||
| 563 | MX51_PAD_DISP1_DAT3__DISP1_DAT3 531 | ||
| 564 | MX51_PAD_DISP1_DAT4__DISP1_DAT4 532 | ||
| 565 | MX51_PAD_DISP1_DAT5__DISP1_DAT5 533 | ||
| 566 | MX51_PAD_DISP1_DAT6__BOOT_USB_SRC 534 | ||
| 567 | MX51_PAD_DISP1_DAT6__DISP1_DAT6 535 | ||
| 568 | MX51_PAD_DISP1_DAT7__BOOT_EEPROM_CFG 536 | ||
| 569 | MX51_PAD_DISP1_DAT7__DISP1_DAT7 537 | ||
| 570 | MX51_PAD_DISP1_DAT8__BOOT_SRC0 538 | ||
| 571 | MX51_PAD_DISP1_DAT8__DISP1_DAT8 539 | ||
| 572 | MX51_PAD_DISP1_DAT9__BOOT_SRC1 540 | ||
| 573 | MX51_PAD_DISP1_DAT9__DISP1_DAT9 541 | ||
| 574 | MX51_PAD_DISP1_DAT10__BOOT_SPARE_SIZE 542 | ||
| 575 | MX51_PAD_DISP1_DAT10__DISP1_DAT10 543 | ||
| 576 | MX51_PAD_DISP1_DAT11__BOOT_LPB_FREQ2 544 | ||
| 577 | MX51_PAD_DISP1_DAT11__DISP1_DAT11 545 | ||
| 578 | MX51_PAD_DISP1_DAT12__BOOT_MLC_SEL 546 | ||
| 579 | MX51_PAD_DISP1_DAT12__DISP1_DAT12 547 | ||
| 580 | MX51_PAD_DISP1_DAT13__BOOT_MEM_CTL0 548 | ||
| 581 | MX51_PAD_DISP1_DAT13__DISP1_DAT13 549 | ||
| 582 | MX51_PAD_DISP1_DAT14__BOOT_MEM_CTL1 550 | ||
| 583 | MX51_PAD_DISP1_DAT14__DISP1_DAT14 551 | ||
| 584 | MX51_PAD_DISP1_DAT15__BOOT_BUS_WIDTH 552 | ||
| 585 | MX51_PAD_DISP1_DAT15__DISP1_DAT15 553 | ||
| 586 | MX51_PAD_DISP1_DAT16__BOOT_PAGE_SIZE0 554 | ||
| 587 | MX51_PAD_DISP1_DAT16__DISP1_DAT16 555 | ||
| 588 | MX51_PAD_DISP1_DAT17__BOOT_PAGE_SIZE1 556 | ||
| 589 | MX51_PAD_DISP1_DAT17__DISP1_DAT17 557 | ||
| 590 | MX51_PAD_DISP1_DAT18__BOOT_WEIM_MUXED0 558 | ||
| 591 | MX51_PAD_DISP1_DAT18__DISP1_DAT18 559 | ||
| 592 | MX51_PAD_DISP1_DAT18__DISP2_PIN11 560 | ||
| 593 | MX51_PAD_DISP1_DAT18__DISP2_PIN5 561 | ||
| 594 | MX51_PAD_DISP1_DAT19__BOOT_WEIM_MUXED1 562 | ||
| 595 | MX51_PAD_DISP1_DAT19__DISP1_DAT19 563 | ||
| 596 | MX51_PAD_DISP1_DAT19__DISP2_PIN12 564 | ||
| 597 | MX51_PAD_DISP1_DAT19__DISP2_PIN6 565 | ||
| 598 | MX51_PAD_DISP1_DAT20__BOOT_MEM_TYPE0 566 | ||
| 599 | MX51_PAD_DISP1_DAT20__DISP1_DAT20 567 | ||
| 600 | MX51_PAD_DISP1_DAT20__DISP2_PIN13 568 | ||
| 601 | MX51_PAD_DISP1_DAT20__DISP2_PIN7 569 | ||
| 602 | MX51_PAD_DISP1_DAT21__BOOT_MEM_TYPE1 570 | ||
| 603 | MX51_PAD_DISP1_DAT21__DISP1_DAT21 571 | ||
| 604 | MX51_PAD_DISP1_DAT21__DISP2_PIN14 572 | ||
| 605 | MX51_PAD_DISP1_DAT21__DISP2_PIN8 573 | ||
| 606 | MX51_PAD_DISP1_DAT22__BOOT_LPB_FREQ0 574 | ||
| 607 | MX51_PAD_DISP1_DAT22__DISP1_DAT22 575 | ||
| 608 | MX51_PAD_DISP1_DAT22__DISP2_D0_CS 576 | ||
| 609 | MX51_PAD_DISP1_DAT22__DISP2_DAT16 577 | ||
| 610 | MX51_PAD_DISP1_DAT23__BOOT_LPB_FREQ1 578 | ||
| 611 | MX51_PAD_DISP1_DAT23__DISP1_DAT23 579 | ||
| 612 | MX51_PAD_DISP1_DAT23__DISP2_D1_CS 580 | ||
| 613 | MX51_PAD_DISP1_DAT23__DISP2_DAT17 581 | ||
| 614 | MX51_PAD_DISP1_DAT23__DISP2_SER_CS 582 | ||
| 615 | MX51_PAD_DI1_PIN3__DI1_PIN3 583 | ||
| 616 | MX51_PAD_DI1_PIN2__DI1_PIN2 584 | ||
| 617 | MX51_PAD_DI_GP2__DISP1_SER_CLK 585 | ||
| 618 | MX51_PAD_DI_GP2__DISP2_WAIT 586 | ||
| 619 | MX51_PAD_DI_GP3__CSI1_DATA_EN 587 | ||
| 620 | MX51_PAD_DI_GP3__DISP1_SER_DIO 588 | ||
| 621 | MX51_PAD_DI_GP3__FEC_TX_ER 589 | ||
| 622 | MX51_PAD_DI2_PIN4__CSI2_DATA_EN 590 | ||
| 623 | MX51_PAD_DI2_PIN4__DI2_PIN4 591 | ||
| 624 | MX51_PAD_DI2_PIN4__FEC_CRS 592 | ||
| 625 | MX51_PAD_DI2_PIN2__DI2_PIN2 593 | ||
| 626 | MX51_PAD_DI2_PIN2__FEC_MDC 594 | ||
| 627 | MX51_PAD_DI2_PIN3__DI2_PIN3 595 | ||
| 628 | MX51_PAD_DI2_PIN3__FEC_MDIO 596 | ||
| 629 | MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK 597 | ||
| 630 | MX51_PAD_DI2_DISP_CLK__FEC_RDATA1 598 | ||
| 631 | MX51_PAD_DI_GP4__DI2_PIN15 599 | ||
| 632 | MX51_PAD_DI_GP4__DISP1_SER_DIN 600 | ||
| 633 | MX51_PAD_DI_GP4__DISP2_PIN1 601 | ||
| 634 | MX51_PAD_DI_GP4__FEC_RDATA2 602 | ||
| 635 | MX51_PAD_DISP2_DAT0__DISP2_DAT0 603 | ||
| 636 | MX51_PAD_DISP2_DAT0__FEC_RDATA3 604 | ||
| 637 | MX51_PAD_DISP2_DAT0__KEY_COL6 605 | ||
| 638 | MX51_PAD_DISP2_DAT0__UART3_RXD 606 | ||
| 639 | MX51_PAD_DISP2_DAT0__USBH3_CLK 607 | ||
| 640 | MX51_PAD_DISP2_DAT1__DISP2_DAT1 608 | ||
| 641 | MX51_PAD_DISP2_DAT1__FEC_RX_ER 609 | ||
| 642 | MX51_PAD_DISP2_DAT1__KEY_COL7 610 | ||
| 643 | MX51_PAD_DISP2_DAT1__UART3_TXD 611 | ||
| 644 | MX51_PAD_DISP2_DAT1__USBH3_DIR 612 | ||
| 645 | MX51_PAD_DISP2_DAT2__DISP2_DAT2 613 | ||
| 646 | MX51_PAD_DISP2_DAT3__DISP2_DAT3 614 | ||
| 647 | MX51_PAD_DISP2_DAT4__DISP2_DAT4 615 | ||
| 648 | MX51_PAD_DISP2_DAT5__DISP2_DAT5 616 | ||
| 649 | MX51_PAD_DISP2_DAT6__DISP2_DAT6 617 | ||
| 650 | MX51_PAD_DISP2_DAT6__FEC_TDATA1 618 | ||
| 651 | MX51_PAD_DISP2_DAT6__GPIO1_19 619 | ||
| 652 | MX51_PAD_DISP2_DAT6__KEY_ROW4 620 | ||
| 653 | MX51_PAD_DISP2_DAT6__USBH3_STP 621 | ||
| 654 | MX51_PAD_DISP2_DAT7__DISP2_DAT7 622 | ||
| 655 | MX51_PAD_DISP2_DAT7__FEC_TDATA2 623 | ||
| 656 | MX51_PAD_DISP2_DAT7__GPIO1_29 624 | ||
| 657 | MX51_PAD_DISP2_DAT7__KEY_ROW5 625 | ||
| 658 | MX51_PAD_DISP2_DAT7__USBH3_NXT 626 | ||
| 659 | MX51_PAD_DISP2_DAT8__DISP2_DAT8 627 | ||
| 660 | MX51_PAD_DISP2_DAT8__FEC_TDATA3 628 | ||
| 661 | MX51_PAD_DISP2_DAT8__GPIO1_30 629 | ||
| 662 | MX51_PAD_DISP2_DAT8__KEY_ROW6 630 | ||
| 663 | MX51_PAD_DISP2_DAT8__USBH3_DATA0 631 | ||
| 664 | MX51_PAD_DISP2_DAT9__AUD6_RXC 632 | ||
| 665 | MX51_PAD_DISP2_DAT9__DISP2_DAT9 633 | ||
| 666 | MX51_PAD_DISP2_DAT9__FEC_TX_EN 634 | ||
| 667 | MX51_PAD_DISP2_DAT9__GPIO1_31 635 | ||
| 668 | MX51_PAD_DISP2_DAT9__USBH3_DATA1 636 | ||
| 669 | MX51_PAD_DISP2_DAT10__DISP2_DAT10 637 | ||
| 670 | MX51_PAD_DISP2_DAT10__DISP2_SER_CS 638 | ||
| 671 | MX51_PAD_DISP2_DAT10__FEC_COL 639 | ||
| 672 | MX51_PAD_DISP2_DAT10__KEY_ROW7 640 | ||
| 673 | MX51_PAD_DISP2_DAT10__USBH3_DATA2 641 | ||
| 674 | MX51_PAD_DISP2_DAT11__AUD6_TXD 642 | ||
| 675 | MX51_PAD_DISP2_DAT11__DISP2_DAT11 643 | ||
| 676 | MX51_PAD_DISP2_DAT11__FEC_RX_CLK 644 | ||
| 677 | MX51_PAD_DISP2_DAT11__GPIO1_10 645 | ||
| 678 | MX51_PAD_DISP2_DAT11__USBH3_DATA3 646 | ||
| 679 | MX51_PAD_DISP2_DAT12__AUD6_RXD 647 | ||
| 680 | MX51_PAD_DISP2_DAT12__DISP2_DAT12 648 | ||
| 681 | MX51_PAD_DISP2_DAT12__FEC_RX_DV 649 | ||
| 682 | MX51_PAD_DISP2_DAT12__USBH3_DATA4 650 | ||
| 683 | MX51_PAD_DISP2_DAT13__AUD6_TXC 651 | ||
| 684 | MX51_PAD_DISP2_DAT13__DISP2_DAT13 652 | ||
| 685 | MX51_PAD_DISP2_DAT13__FEC_TX_CLK 653 | ||
| 686 | MX51_PAD_DISP2_DAT13__USBH3_DATA5 654 | ||
| 687 | MX51_PAD_DISP2_DAT14__AUD6_TXFS 655 | ||
| 688 | MX51_PAD_DISP2_DAT14__DISP2_DAT14 656 | ||
| 689 | MX51_PAD_DISP2_DAT14__FEC_RDATA0 657 | ||
| 690 | MX51_PAD_DISP2_DAT14__USBH3_DATA6 658 | ||
| 691 | MX51_PAD_DISP2_DAT15__AUD6_RXFS 659 | ||
| 692 | MX51_PAD_DISP2_DAT15__DISP1_SER_CS 660 | ||
| 693 | MX51_PAD_DISP2_DAT15__DISP2_DAT15 661 | ||
| 694 | MX51_PAD_DISP2_DAT15__FEC_TDATA0 662 | ||
| 695 | MX51_PAD_DISP2_DAT15__USBH3_DATA7 663 | ||
| 696 | MX51_PAD_SD1_CMD__AUD5_RXFS 664 | ||
| 697 | MX51_PAD_SD1_CMD__CSPI_MOSI 665 | ||
| 698 | MX51_PAD_SD1_CMD__SD1_CMD 666 | ||
| 699 | MX51_PAD_SD1_CLK__AUD5_RXC 667 | ||
| 700 | MX51_PAD_SD1_CLK__CSPI_SCLK 668 | ||
| 701 | MX51_PAD_SD1_CLK__SD1_CLK 669 | ||
| 702 | MX51_PAD_SD1_DATA0__AUD5_TXD 670 | ||
| 703 | MX51_PAD_SD1_DATA0__CSPI_MISO 671 | ||
| 704 | MX51_PAD_SD1_DATA0__SD1_DATA0 672 | ||
| 705 | MX51_PAD_EIM_DA0__EIM_DA0 673 | ||
| 706 | MX51_PAD_EIM_DA1__EIM_DA1 674 | ||
| 707 | MX51_PAD_EIM_DA2__EIM_DA2 675 | ||
| 708 | MX51_PAD_EIM_DA3__EIM_DA3 676 | ||
| 709 | MX51_PAD_SD1_DATA1__AUD5_RXD 677 | ||
| 710 | MX51_PAD_SD1_DATA1__SD1_DATA1 678 | ||
| 711 | MX51_PAD_EIM_DA4__EIM_DA4 679 | ||
| 712 | MX51_PAD_EIM_DA5__EIM_DA5 680 | ||
| 713 | MX51_PAD_EIM_DA6__EIM_DA6 681 | ||
| 714 | MX51_PAD_EIM_DA7__EIM_DA7 682 | ||
| 715 | MX51_PAD_SD1_DATA2__AUD5_TXC 683 | ||
| 716 | MX51_PAD_SD1_DATA2__SD1_DATA2 684 | ||
| 717 | MX51_PAD_EIM_DA10__EIM_DA10 685 | ||
| 718 | MX51_PAD_EIM_DA11__EIM_DA11 686 | ||
| 719 | MX51_PAD_EIM_DA8__EIM_DA8 687 | ||
| 720 | MX51_PAD_EIM_DA9__EIM_DA9 688 | ||
| 721 | MX51_PAD_SD1_DATA3__AUD5_TXFS 689 | ||
| 722 | MX51_PAD_SD1_DATA3__CSPI_SS1 690 | ||
| 723 | MX51_PAD_SD1_DATA3__SD1_DATA3 691 | ||
| 724 | MX51_PAD_GPIO1_0__CSPI_SS2 692 | ||
| 725 | MX51_PAD_GPIO1_0__GPIO1_0 693 | ||
| 726 | MX51_PAD_GPIO1_0__SD1_CD 694 | ||
| 727 | MX51_PAD_GPIO1_1__CSPI_MISO 695 | ||
| 728 | MX51_PAD_GPIO1_1__GPIO1_1 696 | ||
| 729 | MX51_PAD_GPIO1_1__SD1_WP 697 | ||
| 730 | MX51_PAD_EIM_DA12__EIM_DA12 698 | ||
| 731 | MX51_PAD_EIM_DA13__EIM_DA13 699 | ||
| 732 | MX51_PAD_EIM_DA14__EIM_DA14 700 | ||
| 733 | MX51_PAD_EIM_DA15__EIM_DA15 701 | ||
| 734 | MX51_PAD_SD2_CMD__CSPI_MOSI 702 | ||
| 735 | MX51_PAD_SD2_CMD__I2C1_SCL 703 | ||
| 736 | MX51_PAD_SD2_CMD__SD2_CMD 704 | ||
| 737 | MX51_PAD_SD2_CLK__CSPI_SCLK 705 | ||
| 738 | MX51_PAD_SD2_CLK__I2C1_SDA 706 | ||
| 739 | MX51_PAD_SD2_CLK__SD2_CLK 707 | ||
| 740 | MX51_PAD_SD2_DATA0__CSPI_MISO 708 | ||
| 741 | MX51_PAD_SD2_DATA0__SD1_DAT4 709 | ||
| 742 | MX51_PAD_SD2_DATA0__SD2_DATA0 710 | ||
| 743 | MX51_PAD_SD2_DATA1__SD1_DAT5 711 | ||
| 744 | MX51_PAD_SD2_DATA1__SD2_DATA1 712 | ||
| 745 | MX51_PAD_SD2_DATA1__USBH3_H2_DP 713 | ||
| 746 | MX51_PAD_SD2_DATA2__SD1_DAT6 714 | ||
| 747 | MX51_PAD_SD2_DATA2__SD2_DATA2 715 | ||
| 748 | MX51_PAD_SD2_DATA2__USBH3_H2_DM 716 | ||
| 749 | MX51_PAD_SD2_DATA3__CSPI_SS2 717 | ||
| 750 | MX51_PAD_SD2_DATA3__SD1_DAT7 718 | ||
| 751 | MX51_PAD_SD2_DATA3__SD2_DATA3 719 | ||
| 752 | MX51_PAD_GPIO1_2__CCM_OUT_2 720 | ||
| 753 | MX51_PAD_GPIO1_2__GPIO1_2 721 | ||
| 754 | MX51_PAD_GPIO1_2__I2C2_SCL 722 | ||
| 755 | MX51_PAD_GPIO1_2__PLL1_BYP 723 | ||
| 756 | MX51_PAD_GPIO1_2__PWM1_PWMO 724 | ||
| 757 | MX51_PAD_GPIO1_3__GPIO1_3 725 | ||
| 758 | MX51_PAD_GPIO1_3__I2C2_SDA 726 | ||
| 759 | MX51_PAD_GPIO1_3__PLL2_BYP 727 | ||
| 760 | MX51_PAD_GPIO1_3__PWM2_PWMO 728 | ||
| 761 | MX51_PAD_PMIC_INT_REQ__PMIC_INT_REQ 729 | ||
| 762 | MX51_PAD_PMIC_INT_REQ__PMIC_PMU_IRQ_B 730 | ||
| 763 | MX51_PAD_GPIO1_4__DISP2_EXT_CLK 731 | ||
| 764 | MX51_PAD_GPIO1_4__EIM_RDY 732 | ||
| 765 | MX51_PAD_GPIO1_4__GPIO1_4 733 | ||
| 766 | MX51_PAD_GPIO1_4__WDOG1_WDOG_B 734 | ||
| 767 | MX51_PAD_GPIO1_5__CSI2_MCLK 735 | ||
| 768 | MX51_PAD_GPIO1_5__DISP2_PIN16 736 | ||
| 769 | MX51_PAD_GPIO1_5__GPIO1_5 737 | ||
| 770 | MX51_PAD_GPIO1_5__WDOG2_WDOG_B 738 | ||
| 771 | MX51_PAD_GPIO1_6__DISP2_PIN17 739 | ||
| 772 | MX51_PAD_GPIO1_6__GPIO1_6 740 | ||
| 773 | MX51_PAD_GPIO1_6__REF_EN_B 741 | ||
| 774 | MX51_PAD_GPIO1_7__CCM_OUT_0 742 | ||
| 775 | MX51_PAD_GPIO1_7__GPIO1_7 743 | ||
| 776 | MX51_PAD_GPIO1_7__SD2_WP 744 | ||
| 777 | MX51_PAD_GPIO1_7__SPDIF_OUT1 745 | ||
| 778 | MX51_PAD_GPIO1_8__CSI2_DATA_EN 746 | ||
| 779 | MX51_PAD_GPIO1_8__GPIO1_8 747 | ||
| 780 | MX51_PAD_GPIO1_8__SD2_CD 748 | ||
| 781 | MX51_PAD_GPIO1_8__USBH3_PWR 749 | ||
| 782 | MX51_PAD_GPIO1_9__CCM_OUT_1 750 | ||
| 783 | MX51_PAD_GPIO1_9__DISP2_D1_CS 751 | ||
| 784 | MX51_PAD_GPIO1_9__DISP2_SER_CS 752 | ||
| 785 | MX51_PAD_GPIO1_9__GPIO1_9 753 | ||
| 786 | MX51_PAD_GPIO1_9__SD2_LCTL 754 | ||
| 787 | MX51_PAD_GPIO1_9__USBH3_OC 755 | ||
| @@ -0,0 +1,1202 @@ | |||
| 1 | * Freescale IMX53 IOMUX Controller | ||
| 2 | |||
| 3 | Please refer to fsl,imx-pinctrl.txt in this directory for common binding part | ||
| 4 | and usage. | ||
| 5 | |||
| 6 | Required properties: | ||
| 7 | - compatible: "fsl,imx53-iomuxc" | ||
| 8 | - fsl,pins: two integers array, represents a group of pins mux and config | ||
| 9 | setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a | ||
| 10 | pin working on a specific function, CONFIG is the pad setting value like | ||
| 11 | pull-up for this pin. Please refer to imx53 datasheet for the valid pad | ||
| 12 | config settings. | ||
| 13 | |||
| 14 | CONFIG bits definition: | ||
| 15 | PAD_CTL_HVE (1 << 13) | ||
| 16 | PAD_CTL_HYS (1 << 8) | ||
| 17 | PAD_CTL_PKE (1 << 7) | ||
| 18 | PAD_CTL_PUE (1 << 6) | ||
| 19 | PAD_CTL_PUS_100K_DOWN (0 << 4) | ||
| 20 | PAD_CTL_PUS_47K_UP (1 << 4) | ||
| 21 | PAD_CTL_PUS_100K_UP (2 << 4) | ||
| 22 | PAD_CTL_PUS_22K_UP (3 << 4) | ||
| 23 | PAD_CTL_ODE (1 << 3) | ||
| 24 | PAD_CTL_DSE_LOW (0 << 1) | ||
| 25 | PAD_CTL_DSE_MED (1 << 1) | ||
| 26 | PAD_CTL_DSE_HIGH (2 << 1) | ||
| 27 | PAD_CTL_DSE_MAX (3 << 1) | ||
| 28 | PAD_CTL_SRE_FAST (1 << 0) | ||
| 29 | PAD_CTL_SRE_SLOW (0 << 0) | ||
| 30 | |||
| 31 | See below for available PIN_FUNC_ID for imx53: | ||
| 32 | MX53_PAD_GPIO_19__KPP_COL_5 0 | ||
| 33 | MX53_PAD_GPIO_19__GPIO4_5 1 | ||
| 34 | MX53_PAD_GPIO_19__CCM_CLKO 2 | ||
| 35 | MX53_PAD_GPIO_19__SPDIF_OUT1 3 | ||
| 36 | MX53_PAD_GPIO_19__RTC_CE_RTC_EXT_TRIG2 4 | ||
| 37 | MX53_PAD_GPIO_19__ECSPI1_RDY 5 | ||
| 38 | MX53_PAD_GPIO_19__FEC_TDATA_3 6 | ||
| 39 | MX53_PAD_GPIO_19__SRC_INT_BOOT 7 | ||
| 40 | MX53_PAD_KEY_COL0__KPP_COL_0 8 | ||
| 41 | MX53_PAD_KEY_COL0__GPIO4_6 9 | ||
| 42 | MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC 10 | ||
| 43 | MX53_PAD_KEY_COL0__UART4_TXD_MUX 11 | ||
| 44 | MX53_PAD_KEY_COL0__ECSPI1_SCLK 12 | ||
| 45 | MX53_PAD_KEY_COL0__FEC_RDATA_3 13 | ||
| 46 | MX53_PAD_KEY_COL0__SRC_ANY_PU_RST 14 | ||
| 47 | MX53_PAD_KEY_ROW0__KPP_ROW_0 15 | ||
| 48 | MX53_PAD_KEY_ROW0__GPIO4_7 16 | ||
| 49 | MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD 17 | ||
| 50 | MX53_PAD_KEY_ROW0__UART4_RXD_MUX 18 | ||
| 51 | MX53_PAD_KEY_ROW0__ECSPI1_MOSI 19 | ||
| 52 | MX53_PAD_KEY_ROW0__FEC_TX_ER 20 | ||
| 53 | MX53_PAD_KEY_COL1__KPP_COL_1 21 | ||
| 54 | MX53_PAD_KEY_COL1__GPIO4_8 22 | ||
| 55 | MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS 23 | ||
| 56 | MX53_PAD_KEY_COL1__UART5_TXD_MUX 24 | ||
| 57 | MX53_PAD_KEY_COL1__ECSPI1_MISO 25 | ||
| 58 | MX53_PAD_KEY_COL1__FEC_RX_CLK 26 | ||
| 59 | MX53_PAD_KEY_COL1__USBPHY1_TXREADY 27 | ||
| 60 | MX53_PAD_KEY_ROW1__KPP_ROW_1 28 | ||
| 61 | MX53_PAD_KEY_ROW1__GPIO4_9 29 | ||
| 62 | MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD 30 | ||
| 63 | MX53_PAD_KEY_ROW1__UART5_RXD_MUX 31 | ||
| 64 | MX53_PAD_KEY_ROW1__ECSPI1_SS0 32 | ||
| 65 | MX53_PAD_KEY_ROW1__FEC_COL 33 | ||
| 66 | MX53_PAD_KEY_ROW1__USBPHY1_RXVALID 34 | ||
| 67 | MX53_PAD_KEY_COL2__KPP_COL_2 35 | ||
| 68 | MX53_PAD_KEY_COL2__GPIO4_10 36 | ||
| 69 | MX53_PAD_KEY_COL2__CAN1_TXCAN 37 | ||
| 70 | MX53_PAD_KEY_COL2__FEC_MDIO 38 | ||
| 71 | MX53_PAD_KEY_COL2__ECSPI1_SS1 39 | ||
| 72 | MX53_PAD_KEY_COL2__FEC_RDATA_2 40 | ||
| 73 | MX53_PAD_KEY_COL2__USBPHY1_RXACTIVE 41 | ||
| 74 | MX53_PAD_KEY_ROW2__KPP_ROW_2 42 | ||
| 75 | MX53_PAD_KEY_ROW2__GPIO4_11 43 | ||
| 76 | MX53_PAD_KEY_ROW2__CAN1_RXCAN 44 | ||
| 77 | MX53_PAD_KEY_ROW2__FEC_MDC 45 | ||
| 78 | MX53_PAD_KEY_ROW2__ECSPI1_SS2 46 | ||
| 79 | MX53_PAD_KEY_ROW2__FEC_TDATA_2 47 | ||
| 80 | MX53_PAD_KEY_ROW2__USBPHY1_RXERROR 48 | ||
| 81 | MX53_PAD_KEY_COL3__KPP_COL_3 49 | ||
| 82 | MX53_PAD_KEY_COL3__GPIO4_12 50 | ||
| 83 | MX53_PAD_KEY_COL3__USBOH3_H2_DP 51 | ||
| 84 | MX53_PAD_KEY_COL3__SPDIF_IN1 52 | ||
| 85 | MX53_PAD_KEY_COL3__I2C2_SCL 53 | ||
| 86 | MX53_PAD_KEY_COL3__ECSPI1_SS3 54 | ||
| 87 | MX53_PAD_KEY_COL3__FEC_CRS 55 | ||
| 88 | MX53_PAD_KEY_COL3__USBPHY1_SIECLOCK 56 | ||
| 89 | MX53_PAD_KEY_ROW3__KPP_ROW_3 57 | ||
| 90 | MX53_PAD_KEY_ROW3__GPIO4_13 58 | ||
| 91 | MX53_PAD_KEY_ROW3__USBOH3_H2_DM 59 | ||
| 92 | MX53_PAD_KEY_ROW3__CCM_ASRC_EXT_CLK 60 | ||
| 93 | MX53_PAD_KEY_ROW3__I2C2_SDA 61 | ||
| 94 | MX53_PAD_KEY_ROW3__OSC32K_32K_OUT 62 | ||
| 95 | MX53_PAD_KEY_ROW3__CCM_PLL4_BYP 63 | ||
| 96 | MX53_PAD_KEY_ROW3__USBPHY1_LINESTATE_0 64 | ||
| 97 | MX53_PAD_KEY_COL4__KPP_COL_4 65 | ||
| 98 | MX53_PAD_KEY_COL4__GPIO4_14 66 | ||
| 99 | MX53_PAD_KEY_COL4__CAN2_TXCAN 67 | ||
| 100 | MX53_PAD_KEY_COL4__IPU_SISG_4 68 | ||
| 101 | MX53_PAD_KEY_COL4__UART5_RTS 69 | ||
| 102 | MX53_PAD_KEY_COL4__USBOH3_USBOTG_OC 70 | ||
| 103 | MX53_PAD_KEY_COL4__USBPHY1_LINESTATE_1 71 | ||
| 104 | MX53_PAD_KEY_ROW4__KPP_ROW_4 72 | ||
| 105 | MX53_PAD_KEY_ROW4__GPIO4_15 73 | ||
| 106 | MX53_PAD_KEY_ROW4__CAN2_RXCAN 74 | ||
| 107 | MX53_PAD_KEY_ROW4__IPU_SISG_5 75 | ||
| 108 | MX53_PAD_KEY_ROW4__UART5_CTS 76 | ||
| 109 | MX53_PAD_KEY_ROW4__USBOH3_USBOTG_PWR 77 | ||
| 110 | MX53_PAD_KEY_ROW4__USBPHY1_VBUSVALID 78 | ||
| 111 | MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK 79 | ||
| 112 | MX53_PAD_DI0_DISP_CLK__GPIO4_16 80 | ||
| 113 | MX53_PAD_DI0_DISP_CLK__USBOH3_USBH2_DIR 81 | ||
| 114 | MX53_PAD_DI0_DISP_CLK__SDMA_DEBUG_CORE_STATE_0 82 | ||
| 115 | MX53_PAD_DI0_DISP_CLK__EMI_EMI_DEBUG_0 83 | ||
| 116 | MX53_PAD_DI0_DISP_CLK__USBPHY1_AVALID 84 | ||
| 117 | MX53_PAD_DI0_PIN15__IPU_DI0_PIN15 85 | ||
| 118 | MX53_PAD_DI0_PIN15__GPIO4_17 86 | ||
| 119 | MX53_PAD_DI0_PIN15__AUDMUX_AUD6_TXC 87 | ||
| 120 | MX53_PAD_DI0_PIN15__SDMA_DEBUG_CORE_STATE_1 88 | ||
| 121 | MX53_PAD_DI0_PIN15__EMI_EMI_DEBUG_1 89 | ||
| 122 | MX53_PAD_DI0_PIN15__USBPHY1_BVALID 90 | ||
| 123 | MX53_PAD_DI0_PIN2__IPU_DI0_PIN2 91 | ||
| 124 | MX53_PAD_DI0_PIN2__GPIO4_18 92 | ||
| 125 | MX53_PAD_DI0_PIN2__AUDMUX_AUD6_TXD 93 | ||
| 126 | MX53_PAD_DI0_PIN2__SDMA_DEBUG_CORE_STATE_2 94 | ||
| 127 | MX53_PAD_DI0_PIN2__EMI_EMI_DEBUG_2 95 | ||
| 128 | MX53_PAD_DI0_PIN2__USBPHY1_ENDSESSION 96 | ||
| 129 | MX53_PAD_DI0_PIN3__IPU_DI0_PIN3 97 | ||
| 130 | MX53_PAD_DI0_PIN3__GPIO4_19 98 | ||
| 131 | MX53_PAD_DI0_PIN3__AUDMUX_AUD6_TXFS 99 | ||
| 132 | MX53_PAD_DI0_PIN3__SDMA_DEBUG_CORE_STATE_3 100 | ||
| 133 | MX53_PAD_DI0_PIN3__EMI_EMI_DEBUG_3 101 | ||
| 134 | MX53_PAD_DI0_PIN3__USBPHY1_IDDIG 102 | ||
| 135 | MX53_PAD_DI0_PIN4__IPU_DI0_PIN4 103 | ||
| 136 | MX53_PAD_DI0_PIN4__GPIO4_20 104 | ||
| 137 | MX53_PAD_DI0_PIN4__AUDMUX_AUD6_RXD 105 | ||
| 138 | MX53_PAD_DI0_PIN4__ESDHC1_WP 106 | ||
| 139 | MX53_PAD_DI0_PIN4__SDMA_DEBUG_YIELD 107 | ||
| 140 | MX53_PAD_DI0_PIN4__EMI_EMI_DEBUG_4 108 | ||
| 141 | MX53_PAD_DI0_PIN4__USBPHY1_HOSTDISCONNECT 109 | ||
| 142 | MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0 110 | ||
| 143 | MX53_PAD_DISP0_DAT0__GPIO4_21 111 | ||
| 144 | MX53_PAD_DISP0_DAT0__CSPI_SCLK 112 | ||
| 145 | MX53_PAD_DISP0_DAT0__USBOH3_USBH2_DATA_0 113 | ||
| 146 | MX53_PAD_DISP0_DAT0__SDMA_DEBUG_CORE_RUN 114 | ||
| 147 | MX53_PAD_DISP0_DAT0__EMI_EMI_DEBUG_5 115 | ||
| 148 | MX53_PAD_DISP0_DAT0__USBPHY2_TXREADY 116 | ||
| 149 | MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1 117 | ||
| 150 | MX53_PAD_DISP0_DAT1__GPIO4_22 118 | ||
| 151 | MX53_PAD_DISP0_DAT1__CSPI_MOSI 119 | ||
| 152 | MX53_PAD_DISP0_DAT1__USBOH3_USBH2_DATA_1 120 | ||
| 153 | MX53_PAD_DISP0_DAT1__SDMA_DEBUG_EVENT_CHANNEL_SEL 121 | ||
| 154 | MX53_PAD_DISP0_DAT1__EMI_EMI_DEBUG_6 122 | ||
| 155 | MX53_PAD_DISP0_DAT1__USBPHY2_RXVALID 123 | ||
| 156 | MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2 124 | ||
| 157 | MX53_PAD_DISP0_DAT2__GPIO4_23 125 | ||
| 158 | MX53_PAD_DISP0_DAT2__CSPI_MISO 126 | ||
| 159 | MX53_PAD_DISP0_DAT2__USBOH3_USBH2_DATA_2 127 | ||
| 160 | MX53_PAD_DISP0_DAT2__SDMA_DEBUG_MODE 128 | ||
| 161 | MX53_PAD_DISP0_DAT2__EMI_EMI_DEBUG_7 129 | ||
| 162 | MX53_PAD_DISP0_DAT2__USBPHY2_RXACTIVE 130 | ||
| 163 | MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3 131 | ||
| 164 | MX53_PAD_DISP0_DAT3__GPIO4_24 132 | ||
| 165 | MX53_PAD_DISP0_DAT3__CSPI_SS0 133 | ||
| 166 | MX53_PAD_DISP0_DAT3__USBOH3_USBH2_DATA_3 134 | ||
| 167 | MX53_PAD_DISP0_DAT3__SDMA_DEBUG_BUS_ERROR 135 | ||
| 168 | MX53_PAD_DISP0_DAT3__EMI_EMI_DEBUG_8 136 | ||
| 169 | MX53_PAD_DISP0_DAT3__USBPHY2_RXERROR 137 | ||
| 170 | MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4 138 | ||
| 171 | MX53_PAD_DISP0_DAT4__GPIO4_25 139 | ||
| 172 | MX53_PAD_DISP0_DAT4__CSPI_SS1 140 | ||
| 173 | MX53_PAD_DISP0_DAT4__USBOH3_USBH2_DATA_4 141 | ||
| 174 | MX53_PAD_DISP0_DAT4__SDMA_DEBUG_BUS_RWB 142 | ||
| 175 | MX53_PAD_DISP0_DAT4__EMI_EMI_DEBUG_9 143 | ||
| 176 | MX53_PAD_DISP0_DAT4__USBPHY2_SIECLOCK 144 | ||
| 177 | MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5 145 | ||
| 178 | MX53_PAD_DISP0_DAT5__GPIO4_26 146 | ||
| 179 | MX53_PAD_DISP0_DAT5__CSPI_SS2 147 | ||
| 180 | MX53_PAD_DISP0_DAT5__USBOH3_USBH2_DATA_5 148 | ||
| 181 | MX53_PAD_DISP0_DAT5__SDMA_DEBUG_MATCHED_DMBUS 149 | ||
| 182 | MX53_PAD_DISP0_DAT5__EMI_EMI_DEBUG_10 150 | ||
| 183 | MX53_PAD_DISP0_DAT5__USBPHY2_LINESTATE_0 151 | ||
| 184 | MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6 152 | ||
| 185 | MX53_PAD_DISP0_DAT6__GPIO4_27 153 | ||
| 186 | MX53_PAD_DISP0_DAT6__CSPI_SS3 154 | ||
| 187 | MX53_PAD_DISP0_DAT6__USBOH3_USBH2_DATA_6 155 | ||
| 188 | MX53_PAD_DISP0_DAT6__SDMA_DEBUG_RTBUFFER_WRITE 156 | ||
| 189 | MX53_PAD_DISP0_DAT6__EMI_EMI_DEBUG_11 157 | ||
| 190 | MX53_PAD_DISP0_DAT6__USBPHY2_LINESTATE_1 158 | ||
| 191 | MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7 159 | ||
| 192 | MX53_PAD_DISP0_DAT7__GPIO4_28 160 | ||
| 193 | MX53_PAD_DISP0_DAT7__CSPI_RDY 161 | ||
| 194 | MX53_PAD_DISP0_DAT7__USBOH3_USBH2_DATA_7 162 | ||
| 195 | MX53_PAD_DISP0_DAT7__SDMA_DEBUG_EVENT_CHANNEL_0 163 | ||
| 196 | MX53_PAD_DISP0_DAT7__EMI_EMI_DEBUG_12 164 | ||
| 197 | MX53_PAD_DISP0_DAT7__USBPHY2_VBUSVALID 165 | ||
| 198 | MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8 166 | ||
| 199 | MX53_PAD_DISP0_DAT8__GPIO4_29 167 | ||
| 200 | MX53_PAD_DISP0_DAT8__PWM1_PWMO 168 | ||
| 201 | MX53_PAD_DISP0_DAT8__WDOG1_WDOG_B 169 | ||
| 202 | MX53_PAD_DISP0_DAT8__SDMA_DEBUG_EVENT_CHANNEL_1 170 | ||
| 203 | MX53_PAD_DISP0_DAT8__EMI_EMI_DEBUG_13 171 | ||
| 204 | MX53_PAD_DISP0_DAT8__USBPHY2_AVALID 172 | ||
| 205 | MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9 173 | ||
| 206 | MX53_PAD_DISP0_DAT9__GPIO4_30 174 | ||
| 207 | MX53_PAD_DISP0_DAT9__PWM2_PWMO 175 | ||
| 208 | MX53_PAD_DISP0_DAT9__WDOG2_WDOG_B 176 | ||
| 209 | MX53_PAD_DISP0_DAT9__SDMA_DEBUG_EVENT_CHANNEL_2 177 | ||
| 210 | MX53_PAD_DISP0_DAT9__EMI_EMI_DEBUG_14 178 | ||
| 211 | MX53_PAD_DISP0_DAT9__USBPHY2_VSTATUS_0 179 | ||
| 212 | MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10 180 | ||
| 213 | MX53_PAD_DISP0_DAT10__GPIO4_31 181 | ||
| 214 | MX53_PAD_DISP0_DAT10__USBOH3_USBH2_STP 182 | ||
| 215 | MX53_PAD_DISP0_DAT10__SDMA_DEBUG_EVENT_CHANNEL_3 183 | ||
| 216 | MX53_PAD_DISP0_DAT10__EMI_EMI_DEBUG_15 184 | ||
| 217 | MX53_PAD_DISP0_DAT10__USBPHY2_VSTATUS_1 185 | ||
| 218 | MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11 186 | ||
| 219 | MX53_PAD_DISP0_DAT11__GPIO5_5 187 | ||
| 220 | MX53_PAD_DISP0_DAT11__USBOH3_USBH2_NXT 188 | ||
| 221 | MX53_PAD_DISP0_DAT11__SDMA_DEBUG_EVENT_CHANNEL_4 189 | ||
| 222 | MX53_PAD_DISP0_DAT11__EMI_EMI_DEBUG_16 190 | ||
| 223 | MX53_PAD_DISP0_DAT11__USBPHY2_VSTATUS_2 191 | ||
| 224 | MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12 192 | ||
| 225 | MX53_PAD_DISP0_DAT12__GPIO5_6 193 | ||
| 226 | MX53_PAD_DISP0_DAT12__USBOH3_USBH2_CLK 194 | ||
| 227 | MX53_PAD_DISP0_DAT12__SDMA_DEBUG_EVENT_CHANNEL_5 195 | ||
| 228 | MX53_PAD_DISP0_DAT12__EMI_EMI_DEBUG_17 196 | ||
| 229 | MX53_PAD_DISP0_DAT12__USBPHY2_VSTATUS_3 197 | ||
| 230 | MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13 198 | ||
| 231 | MX53_PAD_DISP0_DAT13__GPIO5_7 199 | ||
| 232 | MX53_PAD_DISP0_DAT13__AUDMUX_AUD5_RXFS 200 | ||
| 233 | MX53_PAD_DISP0_DAT13__SDMA_DEBUG_EVT_CHN_LINES_0 201 | ||
| 234 | MX53_PAD_DISP0_DAT13__EMI_EMI_DEBUG_18 202 | ||
| 235 | MX53_PAD_DISP0_DAT13__USBPHY2_VSTATUS_4 203 | ||
| 236 | MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14 204 | ||
| 237 | MX53_PAD_DISP0_DAT14__GPIO5_8 205 | ||
| 238 | MX53_PAD_DISP0_DAT14__AUDMUX_AUD5_RXC 206 | ||
| 239 | MX53_PAD_DISP0_DAT14__SDMA_DEBUG_EVT_CHN_LINES_1 207 | ||
| 240 | MX53_PAD_DISP0_DAT14__EMI_EMI_DEBUG_19 208 | ||
| 241 | MX53_PAD_DISP0_DAT14__USBPHY2_VSTATUS_5 209 | ||
| 242 | MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15 210 | ||
| 243 | MX53_PAD_DISP0_DAT15__GPIO5_9 211 | ||
| 244 | MX53_PAD_DISP0_DAT15__ECSPI1_SS1 212 | ||
| 245 | MX53_PAD_DISP0_DAT15__ECSPI2_SS1 213 | ||
| 246 | MX53_PAD_DISP0_DAT15__SDMA_DEBUG_EVT_CHN_LINES_2 214 | ||
| 247 | MX53_PAD_DISP0_DAT15__EMI_EMI_DEBUG_20 215 | ||
| 248 | MX53_PAD_DISP0_DAT15__USBPHY2_VSTATUS_6 216 | ||
| 249 | MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16 217 | ||
| 250 | MX53_PAD_DISP0_DAT16__GPIO5_10 218 | ||
| 251 | MX53_PAD_DISP0_DAT16__ECSPI2_MOSI 219 | ||
| 252 | MX53_PAD_DISP0_DAT16__AUDMUX_AUD5_TXC 220 | ||
| 253 | MX53_PAD_DISP0_DAT16__SDMA_EXT_EVENT_0 221 | ||
| 254 | MX53_PAD_DISP0_DAT16__SDMA_DEBUG_EVT_CHN_LINES_3 222 | ||
| 255 | MX53_PAD_DISP0_DAT16__EMI_EMI_DEBUG_21 223 | ||
| 256 | MX53_PAD_DISP0_DAT16__USBPHY2_VSTATUS_7 224 | ||
| 257 | MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17 225 | ||
| 258 | MX53_PAD_DISP0_DAT17__GPIO5_11 226 | ||
| 259 | MX53_PAD_DISP0_DAT17__ECSPI2_MISO 227 | ||
| 260 | MX53_PAD_DISP0_DAT17__AUDMUX_AUD5_TXD 228 | ||
| 261 | MX53_PAD_DISP0_DAT17__SDMA_EXT_EVENT_1 229 | ||
| 262 | MX53_PAD_DISP0_DAT17__SDMA_DEBUG_EVT_CHN_LINES_4 230 | ||
| 263 | MX53_PAD_DISP0_DAT17__EMI_EMI_DEBUG_22 231 | ||
| 264 | MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18 232 | ||
| 265 | MX53_PAD_DISP0_DAT18__GPIO5_12 233 | ||
| 266 | MX53_PAD_DISP0_DAT18__ECSPI2_SS0 234 | ||
| 267 | MX53_PAD_DISP0_DAT18__AUDMUX_AUD5_TXFS 235 | ||
| 268 | MX53_PAD_DISP0_DAT18__AUDMUX_AUD4_RXFS 236 | ||
| 269 | MX53_PAD_DISP0_DAT18__SDMA_DEBUG_EVT_CHN_LINES_5 237 | ||
| 270 | MX53_PAD_DISP0_DAT18__EMI_EMI_DEBUG_23 238 | ||
| 271 | MX53_PAD_DISP0_DAT18__EMI_WEIM_CS_2 239 | ||
| 272 | MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19 240 | ||
| 273 | MX53_PAD_DISP0_DAT19__GPIO5_13 241 | ||
| 274 | MX53_PAD_DISP0_DAT19__ECSPI2_SCLK 242 | ||
| 275 | MX53_PAD_DISP0_DAT19__AUDMUX_AUD5_RXD 243 | ||
| 276 | MX53_PAD_DISP0_DAT19__AUDMUX_AUD4_RXC 244 | ||
| 277 | MX53_PAD_DISP0_DAT19__SDMA_DEBUG_EVT_CHN_LINES_6 245 | ||
| 278 | MX53_PAD_DISP0_DAT19__EMI_EMI_DEBUG_24 246 | ||
| 279 | MX53_PAD_DISP0_DAT19__EMI_WEIM_CS_3 247 | ||
| 280 | MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20 248 | ||
| 281 | MX53_PAD_DISP0_DAT20__GPIO5_14 249 | ||
| 282 | MX53_PAD_DISP0_DAT20__ECSPI1_SCLK 250 | ||
| 283 | MX53_PAD_DISP0_DAT20__AUDMUX_AUD4_TXC 251 | ||
| 284 | MX53_PAD_DISP0_DAT20__SDMA_DEBUG_EVT_CHN_LINES_7 252 | ||
| 285 | MX53_PAD_DISP0_DAT20__EMI_EMI_DEBUG_25 253 | ||
| 286 | MX53_PAD_DISP0_DAT20__SATA_PHY_TDI 254 | ||
| 287 | MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21 255 | ||
| 288 | MX53_PAD_DISP0_DAT21__GPIO5_15 256 | ||
| 289 | MX53_PAD_DISP0_DAT21__ECSPI1_MOSI 257 | ||
| 290 | MX53_PAD_DISP0_DAT21__AUDMUX_AUD4_TXD 258 | ||
| 291 | MX53_PAD_DISP0_DAT21__SDMA_DEBUG_BUS_DEVICE_0 259 | ||
| 292 | MX53_PAD_DISP0_DAT21__EMI_EMI_DEBUG_26 260 | ||
| 293 | MX53_PAD_DISP0_DAT21__SATA_PHY_TDO 261 | ||
| 294 | MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22 262 | ||
| 295 | MX53_PAD_DISP0_DAT22__GPIO5_16 263 | ||
| 296 | MX53_PAD_DISP0_DAT22__ECSPI1_MISO 264 | ||
| 297 | MX53_PAD_DISP0_DAT22__AUDMUX_AUD4_TXFS 265 | ||
| 298 | MX53_PAD_DISP0_DAT22__SDMA_DEBUG_BUS_DEVICE_1 266 | ||
| 299 | MX53_PAD_DISP0_DAT22__EMI_EMI_DEBUG_27 267 | ||
| 300 | MX53_PAD_DISP0_DAT22__SATA_PHY_TCK 268 | ||
| 301 | MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23 269 | ||
| 302 | MX53_PAD_DISP0_DAT23__GPIO5_17 270 | ||
| 303 | MX53_PAD_DISP0_DAT23__ECSPI1_SS0 271 | ||
| 304 | MX53_PAD_DISP0_DAT23__AUDMUX_AUD4_RXD 272 | ||
| 305 | MX53_PAD_DISP0_DAT23__SDMA_DEBUG_BUS_DEVICE_2 273 | ||
| 306 | MX53_PAD_DISP0_DAT23__EMI_EMI_DEBUG_28 274 | ||
| 307 | MX53_PAD_DISP0_DAT23__SATA_PHY_TMS 275 | ||
| 308 | MX53_PAD_CSI0_PIXCLK__IPU_CSI0_PIXCLK 276 | ||
| 309 | MX53_PAD_CSI0_PIXCLK__GPIO5_18 277 | ||
| 310 | MX53_PAD_CSI0_PIXCLK__SDMA_DEBUG_PC_0 278 | ||
| 311 | MX53_PAD_CSI0_PIXCLK__EMI_EMI_DEBUG_29 279 | ||
| 312 | MX53_PAD_CSI0_MCLK__IPU_CSI0_HSYNC 280 | ||
| 313 | MX53_PAD_CSI0_MCLK__GPIO5_19 281 | ||
| 314 | MX53_PAD_CSI0_MCLK__CCM_CSI0_MCLK 282 | ||
| 315 | MX53_PAD_CSI0_MCLK__SDMA_DEBUG_PC_1 283 | ||
| 316 | MX53_PAD_CSI0_MCLK__EMI_EMI_DEBUG_30 284 | ||
| 317 | MX53_PAD_CSI0_MCLK__TPIU_TRCTL 285 | ||
| 318 | MX53_PAD_CSI0_DATA_EN__IPU_CSI0_DATA_EN 286 | ||
| 319 | MX53_PAD_CSI0_DATA_EN__GPIO5_20 287 | ||
| 320 | MX53_PAD_CSI0_DATA_EN__SDMA_DEBUG_PC_2 288 | ||
| 321 | MX53_PAD_CSI0_DATA_EN__EMI_EMI_DEBUG_31 289 | ||
| 322 | MX53_PAD_CSI0_DATA_EN__TPIU_TRCLK 290 | ||
| 323 | MX53_PAD_CSI0_VSYNC__IPU_CSI0_VSYNC 291 | ||
| 324 | MX53_PAD_CSI0_VSYNC__GPIO5_21 292 | ||
| 325 | MX53_PAD_CSI0_VSYNC__SDMA_DEBUG_PC_3 293 | ||
| 326 | MX53_PAD_CSI0_VSYNC__EMI_EMI_DEBUG_32 294 | ||
| 327 | MX53_PAD_CSI0_VSYNC__TPIU_TRACE_0 295 | ||
| 328 | MX53_PAD_CSI0_DAT4__IPU_CSI0_D_4 296 | ||
| 329 | MX53_PAD_CSI0_DAT4__GPIO5_22 297 | ||
| 330 | MX53_PAD_CSI0_DAT4__KPP_COL_5 298 | ||
| 331 | MX53_PAD_CSI0_DAT4__ECSPI1_SCLK 299 | ||
| 332 | MX53_PAD_CSI0_DAT4__USBOH3_USBH3_STP 300 | ||
| 333 | MX53_PAD_CSI0_DAT4__AUDMUX_AUD3_TXC 301 | ||
| 334 | MX53_PAD_CSI0_DAT4__EMI_EMI_DEBUG_33 302 | ||
| 335 | MX53_PAD_CSI0_DAT4__TPIU_TRACE_1 303 | ||
| 336 | MX53_PAD_CSI0_DAT5__IPU_CSI0_D_5 304 | ||
| 337 | MX53_PAD_CSI0_DAT5__GPIO5_23 305 | ||
| 338 | MX53_PAD_CSI0_DAT5__KPP_ROW_5 306 | ||
| 339 | MX53_PAD_CSI0_DAT5__ECSPI1_MOSI 307 | ||
| 340 | MX53_PAD_CSI0_DAT5__USBOH3_USBH3_NXT 308 | ||
| 341 | MX53_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD 309 | ||
| 342 | MX53_PAD_CSI0_DAT5__EMI_EMI_DEBUG_34 310 | ||
| 343 | MX53_PAD_CSI0_DAT5__TPIU_TRACE_2 311 | ||
| 344 | MX53_PAD_CSI0_DAT6__IPU_CSI0_D_6 312 | ||
| 345 | MX53_PAD_CSI0_DAT6__GPIO5_24 313 | ||
| 346 | MX53_PAD_CSI0_DAT6__KPP_COL_6 314 | ||
| 347 | MX53_PAD_CSI0_DAT6__ECSPI1_MISO 315 | ||
| 348 | MX53_PAD_CSI0_DAT6__USBOH3_USBH3_CLK 316 | ||
| 349 | MX53_PAD_CSI0_DAT6__AUDMUX_AUD3_TXFS 317 | ||
| 350 | MX53_PAD_CSI0_DAT6__EMI_EMI_DEBUG_35 318 | ||
| 351 | MX53_PAD_CSI0_DAT6__TPIU_TRACE_3 319 | ||
| 352 | MX53_PAD_CSI0_DAT7__IPU_CSI0_D_7 320 | ||
| 353 | MX53_PAD_CSI0_DAT7__GPIO5_25 321 | ||
| 354 | MX53_PAD_CSI0_DAT7__KPP_ROW_6 322 | ||
| 355 | MX53_PAD_CSI0_DAT7__ECSPI1_SS0 323 | ||
| 356 | MX53_PAD_CSI0_DAT7__USBOH3_USBH3_DIR 324 | ||
| 357 | MX53_PAD_CSI0_DAT7__AUDMUX_AUD3_RXD 325 | ||
| 358 | MX53_PAD_CSI0_DAT7__EMI_EMI_DEBUG_36 326 | ||
| 359 | MX53_PAD_CSI0_DAT7__TPIU_TRACE_4 327 | ||
| 360 | MX53_PAD_CSI0_DAT8__IPU_CSI0_D_8 328 | ||
| 361 | MX53_PAD_CSI0_DAT8__GPIO5_26 329 | ||
| 362 | MX53_PAD_CSI0_DAT8__KPP_COL_7 330 | ||
| 363 | MX53_PAD_CSI0_DAT8__ECSPI2_SCLK 331 | ||
| 364 | MX53_PAD_CSI0_DAT8__USBOH3_USBH3_OC 332 | ||
| 365 | MX53_PAD_CSI0_DAT8__I2C1_SDA 333 | ||
| 366 | MX53_PAD_CSI0_DAT8__EMI_EMI_DEBUG_37 334 | ||
| 367 | MX53_PAD_CSI0_DAT8__TPIU_TRACE_5 335 | ||
| 368 | MX53_PAD_CSI0_DAT9__IPU_CSI0_D_9 336 | ||
| 369 | MX53_PAD_CSI0_DAT9__GPIO5_27 337 | ||
| 370 | MX53_PAD_CSI0_DAT9__KPP_ROW_7 338 | ||
| 371 | MX53_PAD_CSI0_DAT9__ECSPI2_MOSI 339 | ||
| 372 | MX53_PAD_CSI0_DAT9__USBOH3_USBH3_PWR 340 | ||
| 373 | MX53_PAD_CSI0_DAT9__I2C1_SCL 341 | ||
| 374 | MX53_PAD_CSI0_DAT9__EMI_EMI_DEBUG_38 342 | ||
| 375 | MX53_PAD_CSI0_DAT9__TPIU_TRACE_6 343 | ||
| 376 | MX53_PAD_CSI0_DAT10__IPU_CSI0_D_10 344 | ||
| 377 | MX53_PAD_CSI0_DAT10__GPIO5_28 345 | ||
| 378 | MX53_PAD_CSI0_DAT10__UART1_TXD_MUX 346 | ||
| 379 | MX53_PAD_CSI0_DAT10__ECSPI2_MISO 347 | ||
| 380 | MX53_PAD_CSI0_DAT10__AUDMUX_AUD3_RXC 348 | ||
| 381 | MX53_PAD_CSI0_DAT10__SDMA_DEBUG_PC_4 349 | ||
| 382 | MX53_PAD_CSI0_DAT10__EMI_EMI_DEBUG_39 350 | ||
| 383 | MX53_PAD_CSI0_DAT10__TPIU_TRACE_7 351 | ||
| 384 | MX53_PAD_CSI0_DAT11__IPU_CSI0_D_11 352 | ||
| 385 | MX53_PAD_CSI0_DAT11__GPIO5_29 353 | ||
| 386 | MX53_PAD_CSI0_DAT11__UART1_RXD_MUX 354 | ||
| 387 | MX53_PAD_CSI0_DAT11__ECSPI2_SS0 355 | ||
| 388 | MX53_PAD_CSI0_DAT11__AUDMUX_AUD3_RXFS 356 | ||
| 389 | MX53_PAD_CSI0_DAT11__SDMA_DEBUG_PC_5 357 | ||
| 390 | MX53_PAD_CSI0_DAT11__EMI_EMI_DEBUG_40 358 | ||
| 391 | MX53_PAD_CSI0_DAT11__TPIU_TRACE_8 359 | ||
| 392 | MX53_PAD_CSI0_DAT12__IPU_CSI0_D_12 360 | ||
| 393 | MX53_PAD_CSI0_DAT12__GPIO5_30 361 | ||
| 394 | MX53_PAD_CSI0_DAT12__UART4_TXD_MUX 362 | ||
| 395 | MX53_PAD_CSI0_DAT12__USBOH3_USBH3_DATA_0 363 | ||
| 396 | MX53_PAD_CSI0_DAT12__SDMA_DEBUG_PC_6 364 | ||
| 397 | MX53_PAD_CSI0_DAT12__EMI_EMI_DEBUG_41 365 | ||
| 398 | MX53_PAD_CSI0_DAT12__TPIU_TRACE_9 366 | ||
| 399 | MX53_PAD_CSI0_DAT13__IPU_CSI0_D_13 367 | ||
| 400 | MX53_PAD_CSI0_DAT13__GPIO5_31 368 | ||
| 401 | MX53_PAD_CSI0_DAT13__UART4_RXD_MUX 369 | ||
| 402 | MX53_PAD_CSI0_DAT13__USBOH3_USBH3_DATA_1 370 | ||
| 403 | MX53_PAD_CSI0_DAT13__SDMA_DEBUG_PC_7 371 | ||
| 404 | MX53_PAD_CSI0_DAT13__EMI_EMI_DEBUG_42 372 | ||
| 405 | MX53_PAD_CSI0_DAT13__TPIU_TRACE_10 373 | ||
| 406 | MX53_PAD_CSI0_DAT14__IPU_CSI0_D_14 374 | ||
| 407 | MX53_PAD_CSI0_DAT14__GPIO6_0 375 | ||
| 408 | MX53_PAD_CSI0_DAT14__UART5_TXD_MUX 376 | ||
| 409 | MX53_PAD_CSI0_DAT14__USBOH3_USBH3_DATA_2 377 | ||
| 410 | MX53_PAD_CSI0_DAT14__SDMA_DEBUG_PC_8 378 | ||
| 411 | MX53_PAD_CSI0_DAT14__EMI_EMI_DEBUG_43 379 | ||
| 412 | MX53_PAD_CSI0_DAT14__TPIU_TRACE_11 380 | ||
| 413 | MX53_PAD_CSI0_DAT15__IPU_CSI0_D_15 381 | ||
| 414 | MX53_PAD_CSI0_DAT15__GPIO6_1 382 | ||
| 415 | MX53_PAD_CSI0_DAT15__UART5_RXD_MUX 383 | ||
| 416 | MX53_PAD_CSI0_DAT15__USBOH3_USBH3_DATA_3 384 | ||
| 417 | MX53_PAD_CSI0_DAT15__SDMA_DEBUG_PC_9 385 | ||
| 418 | MX53_PAD_CSI0_DAT15__EMI_EMI_DEBUG_44 386 | ||
| 419 | MX53_PAD_CSI0_DAT15__TPIU_TRACE_12 387 | ||
| 420 | MX53_PAD_CSI0_DAT16__IPU_CSI0_D_16 388 | ||
| 421 | MX53_PAD_CSI0_DAT16__GPIO6_2 389 | ||
| 422 | MX53_PAD_CSI0_DAT16__UART4_RTS 390 | ||
| 423 | MX53_PAD_CSI0_DAT16__USBOH3_USBH3_DATA_4 391 | ||
| 424 | MX53_PAD_CSI0_DAT16__SDMA_DEBUG_PC_10 392 | ||
| 425 | MX53_PAD_CSI0_DAT16__EMI_EMI_DEBUG_45 393 | ||
| 426 | MX53_PAD_CSI0_DAT16__TPIU_TRACE_13 394 | ||
| 427 | MX53_PAD_CSI0_DAT17__IPU_CSI0_D_17 395 | ||
| 428 | MX53_PAD_CSI0_DAT17__GPIO6_3 396 | ||
| 429 | MX53_PAD_CSI0_DAT17__UART4_CTS 397 | ||
| 430 | MX53_PAD_CSI0_DAT17__USBOH3_USBH3_DATA_5 398 | ||
| 431 | MX53_PAD_CSI0_DAT17__SDMA_DEBUG_PC_11 399 | ||
| 432 | MX53_PAD_CSI0_DAT17__EMI_EMI_DEBUG_46 400 | ||
| 433 | MX53_PAD_CSI0_DAT17__TPIU_TRACE_14 401 | ||
| 434 | MX53_PAD_CSI0_DAT18__IPU_CSI0_D_18 402 | ||
| 435 | MX53_PAD_CSI0_DAT18__GPIO6_4 403 | ||
| 436 | MX53_PAD_CSI0_DAT18__UART5_RTS 404 | ||
| 437 | MX53_PAD_CSI0_DAT18__USBOH3_USBH3_DATA_6 405 | ||
| 438 | MX53_PAD_CSI0_DAT18__SDMA_DEBUG_PC_12 406 | ||
| 439 | MX53_PAD_CSI0_DAT18__EMI_EMI_DEBUG_47 407 | ||
| 440 | MX53_PAD_CSI0_DAT18__TPIU_TRACE_15 408 | ||
| 441 | MX53_PAD_CSI0_DAT19__IPU_CSI0_D_19 409 | ||
| 442 | MX53_PAD_CSI0_DAT19__GPIO6_5 410 | ||
| 443 | MX53_PAD_CSI0_DAT19__UART5_CTS 411 | ||
| 444 | MX53_PAD_CSI0_DAT19__USBOH3_USBH3_DATA_7 412 | ||
| 445 | MX53_PAD_CSI0_DAT19__SDMA_DEBUG_PC_13 413 | ||
| 446 | MX53_PAD_CSI0_DAT19__EMI_EMI_DEBUG_48 414 | ||
| 447 | MX53_PAD_CSI0_DAT19__USBPHY2_BISTOK 415 | ||
| 448 | MX53_PAD_EIM_A25__EMI_WEIM_A_25 416 | ||
| 449 | MX53_PAD_EIM_A25__GPIO5_2 417 | ||
| 450 | MX53_PAD_EIM_A25__ECSPI2_RDY 418 | ||
| 451 | MX53_PAD_EIM_A25__IPU_DI1_PIN12 419 | ||
| 452 | MX53_PAD_EIM_A25__CSPI_SS1 420 | ||
| 453 | MX53_PAD_EIM_A25__IPU_DI0_D1_CS 421 | ||
| 454 | MX53_PAD_EIM_A25__USBPHY1_BISTOK 422 | ||
| 455 | MX53_PAD_EIM_EB2__EMI_WEIM_EB_2 423 | ||
| 456 | MX53_PAD_EIM_EB2__GPIO2_30 424 | ||
| 457 | MX53_PAD_EIM_EB2__CCM_DI1_EXT_CLK 425 | ||
| 458 | MX53_PAD_EIM_EB2__IPU_SER_DISP1_CS 426 | ||
| 459 | MX53_PAD_EIM_EB2__ECSPI1_SS0 427 | ||
| 460 | MX53_PAD_EIM_EB2__I2C2_SCL 428 | ||
| 461 | MX53_PAD_EIM_D16__EMI_WEIM_D_16 429 | ||
| 462 | MX53_PAD_EIM_D16__GPIO3_16 430 | ||
| 463 | MX53_PAD_EIM_D16__IPU_DI0_PIN5 431 | ||
| 464 | MX53_PAD_EIM_D16__IPU_DISPB1_SER_CLK 432 | ||
| 465 | MX53_PAD_EIM_D16__ECSPI1_SCLK 433 | ||
| 466 | MX53_PAD_EIM_D16__I2C2_SDA 434 | ||
| 467 | MX53_PAD_EIM_D17__EMI_WEIM_D_17 435 | ||
| 468 | MX53_PAD_EIM_D17__GPIO3_17 436 | ||
| 469 | MX53_PAD_EIM_D17__IPU_DI0_PIN6 437 | ||
| 470 | MX53_PAD_EIM_D17__IPU_DISPB1_SER_DIN 438 | ||
| 471 | MX53_PAD_EIM_D17__ECSPI1_MISO 439 | ||
| 472 | MX53_PAD_EIM_D17__I2C3_SCL 440 | ||
| 473 | MX53_PAD_EIM_D18__EMI_WEIM_D_18 441 | ||
| 474 | MX53_PAD_EIM_D18__GPIO3_18 442 | ||
| 475 | MX53_PAD_EIM_D18__IPU_DI0_PIN7 443 | ||
| 476 | MX53_PAD_EIM_D18__IPU_DISPB1_SER_DIO 444 | ||
| 477 | MX53_PAD_EIM_D18__ECSPI1_MOSI 445 | ||
| 478 | MX53_PAD_EIM_D18__I2C3_SDA 446 | ||
| 479 | MX53_PAD_EIM_D18__IPU_DI1_D0_CS 447 | ||
| 480 | MX53_PAD_EIM_D19__EMI_WEIM_D_19 448 | ||
| 481 | MX53_PAD_EIM_D19__GPIO3_19 449 | ||
| 482 | MX53_PAD_EIM_D19__IPU_DI0_PIN8 450 | ||
| 483 | MX53_PAD_EIM_D19__IPU_DISPB1_SER_RS 451 | ||
| 484 | MX53_PAD_EIM_D19__ECSPI1_SS1 452 | ||
| 485 | MX53_PAD_EIM_D19__EPIT1_EPITO 453 | ||
| 486 | MX53_PAD_EIM_D19__UART1_CTS 454 | ||
| 487 | MX53_PAD_EIM_D19__USBOH3_USBH2_OC 455 | ||
| 488 | MX53_PAD_EIM_D20__EMI_WEIM_D_20 456 | ||
| 489 | MX53_PAD_EIM_D20__GPIO3_20 457 | ||
| 490 | MX53_PAD_EIM_D20__IPU_DI0_PIN16 458 | ||
| 491 | MX53_PAD_EIM_D20__IPU_SER_DISP0_CS 459 | ||
| 492 | MX53_PAD_EIM_D20__CSPI_SS0 460 | ||
| 493 | MX53_PAD_EIM_D20__EPIT2_EPITO 461 | ||
| 494 | MX53_PAD_EIM_D20__UART1_RTS 462 | ||
| 495 | MX53_PAD_EIM_D20__USBOH3_USBH2_PWR 463 | ||
| 496 | MX53_PAD_EIM_D21__EMI_WEIM_D_21 464 | ||
| 497 | MX53_PAD_EIM_D21__GPIO3_21 465 | ||
| 498 | MX53_PAD_EIM_D21__IPU_DI0_PIN17 466 | ||
| 499 | MX53_PAD_EIM_D21__IPU_DISPB0_SER_CLK 467 | ||
| 500 | MX53_PAD_EIM_D21__CSPI_SCLK 468 | ||
| 501 | MX53_PAD_EIM_D21__I2C1_SCL 469 | ||
| 502 | MX53_PAD_EIM_D21__USBOH3_USBOTG_OC 470 | ||
| 503 | MX53_PAD_EIM_D22__EMI_WEIM_D_22 471 | ||
| 504 | MX53_PAD_EIM_D22__GPIO3_22 472 | ||
| 505 | MX53_PAD_EIM_D22__IPU_DI0_PIN1 473 | ||
| 506 | MX53_PAD_EIM_D22__IPU_DISPB0_SER_DIN 474 | ||
| 507 | MX53_PAD_EIM_D22__CSPI_MISO 475 | ||
| 508 | MX53_PAD_EIM_D22__USBOH3_USBOTG_PWR 476 | ||
| 509 | MX53_PAD_EIM_D23__EMI_WEIM_D_23 477 | ||
| 510 | MX53_PAD_EIM_D23__GPIO3_23 478 | ||
| 511 | MX53_PAD_EIM_D23__UART3_CTS 479 | ||
| 512 | MX53_PAD_EIM_D23__UART1_DCD 480 | ||
| 513 | MX53_PAD_EIM_D23__IPU_DI0_D0_CS 481 | ||
| 514 | MX53_PAD_EIM_D23__IPU_DI1_PIN2 482 | ||
| 515 | MX53_PAD_EIM_D23__IPU_CSI1_DATA_EN 483 | ||
| 516 | MX53_PAD_EIM_D23__IPU_DI1_PIN14 484 | ||
| 517 | MX53_PAD_EIM_EB3__EMI_WEIM_EB_3 485 | ||
| 518 | MX53_PAD_EIM_EB3__GPIO2_31 486 | ||
| 519 | MX53_PAD_EIM_EB3__UART3_RTS 487 | ||
| 520 | MX53_PAD_EIM_EB3__UART1_RI 488 | ||
| 521 | MX53_PAD_EIM_EB3__IPU_DI1_PIN3 489 | ||
| 522 | MX53_PAD_EIM_EB3__IPU_CSI1_HSYNC 490 | ||
| 523 | MX53_PAD_EIM_EB3__IPU_DI1_PIN16 491 | ||
| 524 | MX53_PAD_EIM_D24__EMI_WEIM_D_24 492 | ||
| 525 | MX53_PAD_EIM_D24__GPIO3_24 493 | ||
| 526 | MX53_PAD_EIM_D24__UART3_TXD_MUX 494 | ||
| 527 | MX53_PAD_EIM_D24__ECSPI1_SS2 495 | ||
| 528 | MX53_PAD_EIM_D24__CSPI_SS2 496 | ||
| 529 | MX53_PAD_EIM_D24__AUDMUX_AUD5_RXFS 497 | ||
| 530 | MX53_PAD_EIM_D24__ECSPI2_SS2 498 | ||
| 531 | MX53_PAD_EIM_D24__UART1_DTR 499 | ||
| 532 | MX53_PAD_EIM_D25__EMI_WEIM_D_25 500 | ||
| 533 | MX53_PAD_EIM_D25__GPIO3_25 501 | ||
| 534 | MX53_PAD_EIM_D25__UART3_RXD_MUX 502 | ||
| 535 | MX53_PAD_EIM_D25__ECSPI1_SS3 503 | ||
| 536 | MX53_PAD_EIM_D25__CSPI_SS3 504 | ||
| 537 | MX53_PAD_EIM_D25__AUDMUX_AUD5_RXC 505 | ||
| 538 | MX53_PAD_EIM_D25__ECSPI2_SS3 506 | ||
| 539 | MX53_PAD_EIM_D25__UART1_DSR 507 | ||
| 540 | MX53_PAD_EIM_D26__EMI_WEIM_D_26 508 | ||
| 541 | MX53_PAD_EIM_D26__GPIO3_26 509 | ||
| 542 | MX53_PAD_EIM_D26__UART2_TXD_MUX 510 | ||
| 543 | MX53_PAD_EIM_D26__FIRI_RXD 511 | ||
| 544 | MX53_PAD_EIM_D26__IPU_CSI0_D_1 512 | ||
| 545 | MX53_PAD_EIM_D26__IPU_DI1_PIN11 513 | ||
| 546 | MX53_PAD_EIM_D26__IPU_SISG_2 514 | ||
| 547 | MX53_PAD_EIM_D26__IPU_DISP1_DAT_22 515 | ||
| 548 | MX53_PAD_EIM_D27__EMI_WEIM_D_27 516 | ||
| 549 | MX53_PAD_EIM_D27__GPIO3_27 517 | ||
| 550 | MX53_PAD_EIM_D27__UART2_RXD_MUX 518 | ||
| 551 | MX53_PAD_EIM_D27__FIRI_TXD 519 | ||
| 552 | MX53_PAD_EIM_D27__IPU_CSI0_D_0 520 | ||
| 553 | MX53_PAD_EIM_D27__IPU_DI1_PIN13 521 | ||
| 554 | MX53_PAD_EIM_D27__IPU_SISG_3 522 | ||
| 555 | MX53_PAD_EIM_D27__IPU_DISP1_DAT_23 523 | ||
| 556 | MX53_PAD_EIM_D28__EMI_WEIM_D_28 524 | ||
| 557 | MX53_PAD_EIM_D28__GPIO3_28 525 | ||
| 558 | MX53_PAD_EIM_D28__UART2_CTS 526 | ||
| 559 | MX53_PAD_EIM_D28__IPU_DISPB0_SER_DIO 527 | ||
| 560 | MX53_PAD_EIM_D28__CSPI_MOSI 528 | ||
| 561 | MX53_PAD_EIM_D28__I2C1_SDA 529 | ||
| 562 | MX53_PAD_EIM_D28__IPU_EXT_TRIG 530 | ||
| 563 | MX53_PAD_EIM_D28__IPU_DI0_PIN13 531 | ||
| 564 | MX53_PAD_EIM_D29__EMI_WEIM_D_29 532 | ||
| 565 | MX53_PAD_EIM_D29__GPIO3_29 533 | ||
| 566 | MX53_PAD_EIM_D29__UART2_RTS 534 | ||
| 567 | MX53_PAD_EIM_D29__IPU_DISPB0_SER_RS 535 | ||
| 568 | MX53_PAD_EIM_D29__CSPI_SS0 536 | ||
| 569 | MX53_PAD_EIM_D29__IPU_DI1_PIN15 537 | ||
| 570 | MX53_PAD_EIM_D29__IPU_CSI1_VSYNC 538 | ||
| 571 | MX53_PAD_EIM_D29__IPU_DI0_PIN14 539 | ||
| 572 | MX53_PAD_EIM_D30__EMI_WEIM_D_30 540 | ||
| 573 | MX53_PAD_EIM_D30__GPIO3_30 541 | ||
| 574 | MX53_PAD_EIM_D30__UART3_CTS 542 | ||
| 575 | MX53_PAD_EIM_D30__IPU_CSI0_D_3 543 | ||
| 576 | MX53_PAD_EIM_D30__IPU_DI0_PIN11 544 | ||
| 577 | MX53_PAD_EIM_D30__IPU_DISP1_DAT_21 545 | ||
| 578 | MX53_PAD_EIM_D30__USBOH3_USBH1_OC 546 | ||
| 579 | MX53_PAD_EIM_D30__USBOH3_USBH2_OC 547 | ||
| 580 | MX53_PAD_EIM_D31__EMI_WEIM_D_31 548 | ||
| 581 | MX53_PAD_EIM_D31__GPIO3_31 549 | ||
| 582 | MX53_PAD_EIM_D31__UART3_RTS 550 | ||
| 583 | MX53_PAD_EIM_D31__IPU_CSI0_D_2 551 | ||
| 584 | MX53_PAD_EIM_D31__IPU_DI0_PIN12 552 | ||
| 585 | MX53_PAD_EIM_D31__IPU_DISP1_DAT_20 553 | ||
| 586 | MX53_PAD_EIM_D31__USBOH3_USBH1_PWR 554 | ||
| 587 | MX53_PAD_EIM_D31__USBOH3_USBH2_PWR 555 | ||
| 588 | MX53_PAD_EIM_A24__EMI_WEIM_A_24 556 | ||
| 589 | MX53_PAD_EIM_A24__GPIO5_4 557 | ||
| 590 | MX53_PAD_EIM_A24__IPU_DISP1_DAT_19 558 | ||
| 591 | MX53_PAD_EIM_A24__IPU_CSI1_D_19 559 | ||
| 592 | MX53_PAD_EIM_A24__IPU_SISG_2 560 | ||
| 593 | MX53_PAD_EIM_A24__USBPHY2_BVALID 561 | ||
| 594 | MX53_PAD_EIM_A23__EMI_WEIM_A_23 562 | ||
| 595 | MX53_PAD_EIM_A23__GPIO6_6 563 | ||
| 596 | MX53_PAD_EIM_A23__IPU_DISP1_DAT_18 564 | ||
| 597 | MX53_PAD_EIM_A23__IPU_CSI1_D_18 565 | ||
| 598 | MX53_PAD_EIM_A23__IPU_SISG_3 566 | ||
| 599 | MX53_PAD_EIM_A23__USBPHY2_ENDSESSION 567 | ||
| 600 | MX53_PAD_EIM_A22__EMI_WEIM_A_22 568 | ||
| 601 | MX53_PAD_EIM_A22__GPIO2_16 569 | ||
| 602 | MX53_PAD_EIM_A22__IPU_DISP1_DAT_17 570 | ||
| 603 | MX53_PAD_EIM_A22__IPU_CSI1_D_17 571 | ||
| 604 | MX53_PAD_EIM_A22__SRC_BT_CFG1_7 572 | ||
| 605 | MX53_PAD_EIM_A21__EMI_WEIM_A_21 573 | ||
| 606 | MX53_PAD_EIM_A21__GPIO2_17 574 | ||
| 607 | MX53_PAD_EIM_A21__IPU_DISP1_DAT_16 575 | ||
| 608 | MX53_PAD_EIM_A21__IPU_CSI1_D_16 576 | ||
| 609 | MX53_PAD_EIM_A21__SRC_BT_CFG1_6 577 | ||
| 610 | MX53_PAD_EIM_A20__EMI_WEIM_A_20 578 | ||
| 611 | MX53_PAD_EIM_A20__GPIO2_18 579 | ||
| 612 | MX53_PAD_EIM_A20__IPU_DISP1_DAT_15 580 | ||
| 613 | MX53_PAD_EIM_A20__IPU_CSI1_D_15 581 | ||
| 614 | MX53_PAD_EIM_A20__SRC_BT_CFG1_5 582 | ||
| 615 | MX53_PAD_EIM_A19__EMI_WEIM_A_19 583 | ||
| 616 | MX53_PAD_EIM_A19__GPIO2_19 584 | ||
| 617 | MX53_PAD_EIM_A19__IPU_DISP1_DAT_14 585 | ||
| 618 | MX53_PAD_EIM_A19__IPU_CSI1_D_14 586 | ||
| 619 | MX53_PAD_EIM_A19__SRC_BT_CFG1_4 587 | ||
| 620 | MX53_PAD_EIM_A18__EMI_WEIM_A_18 588 | ||
| 621 | MX53_PAD_EIM_A18__GPIO2_20 589 | ||
| 622 | MX53_PAD_EIM_A18__IPU_DISP1_DAT_13 590 | ||
| 623 | MX53_PAD_EIM_A18__IPU_CSI1_D_13 591 | ||
| 624 | MX53_PAD_EIM_A18__SRC_BT_CFG1_3 592 | ||
| 625 | MX53_PAD_EIM_A17__EMI_WEIM_A_17 593 | ||
| 626 | MX53_PAD_EIM_A17__GPIO2_21 594 | ||
| 627 | MX53_PAD_EIM_A17__IPU_DISP1_DAT_12 595 | ||
| 628 | MX53_PAD_EIM_A17__IPU_CSI1_D_12 596 | ||
| 629 | MX53_PAD_EIM_A17__SRC_BT_CFG1_2 597 | ||
| 630 | MX53_PAD_EIM_A16__EMI_WEIM_A_16 598 | ||
| 631 | MX53_PAD_EIM_A16__GPIO2_22 599 | ||
| 632 | MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK 600 | ||
| 633 | MX53_PAD_EIM_A16__IPU_CSI1_PIXCLK 601 | ||
| 634 | MX53_PAD_EIM_A16__SRC_BT_CFG1_1 602 | ||
| 635 | MX53_PAD_EIM_CS0__EMI_WEIM_CS_0 603 | ||
| 636 | MX53_PAD_EIM_CS0__GPIO2_23 604 | ||
| 637 | MX53_PAD_EIM_CS0__ECSPI2_SCLK 605 | ||
| 638 | MX53_PAD_EIM_CS0__IPU_DI1_PIN5 606 | ||
| 639 | MX53_PAD_EIM_CS1__EMI_WEIM_CS_1 607 | ||
| 640 | MX53_PAD_EIM_CS1__GPIO2_24 608 | ||
| 641 | MX53_PAD_EIM_CS1__ECSPI2_MOSI 609 | ||
| 642 | MX53_PAD_EIM_CS1__IPU_DI1_PIN6 610 | ||
| 643 | MX53_PAD_EIM_OE__EMI_WEIM_OE 611 | ||
| 644 | MX53_PAD_EIM_OE__GPIO2_25 612 | ||
| 645 | MX53_PAD_EIM_OE__ECSPI2_MISO 613 | ||
| 646 | MX53_PAD_EIM_OE__IPU_DI1_PIN7 614 | ||
| 647 | MX53_PAD_EIM_OE__USBPHY2_IDDIG 615 | ||
| 648 | MX53_PAD_EIM_RW__EMI_WEIM_RW 616 | ||
| 649 | MX53_PAD_EIM_RW__GPIO2_26 617 | ||
| 650 | MX53_PAD_EIM_RW__ECSPI2_SS0 618 | ||
| 651 | MX53_PAD_EIM_RW__IPU_DI1_PIN8 619 | ||
| 652 | MX53_PAD_EIM_RW__USBPHY2_HOSTDISCONNECT 620 | ||
| 653 | MX53_PAD_EIM_LBA__EMI_WEIM_LBA 621 | ||
| 654 | MX53_PAD_EIM_LBA__GPIO2_27 622 | ||
| 655 | MX53_PAD_EIM_LBA__ECSPI2_SS1 623 | ||
| 656 | MX53_PAD_EIM_LBA__IPU_DI1_PIN17 624 | ||
| 657 | MX53_PAD_EIM_LBA__SRC_BT_CFG1_0 625 | ||
| 658 | MX53_PAD_EIM_EB0__EMI_WEIM_EB_0 626 | ||
| 659 | MX53_PAD_EIM_EB0__GPIO2_28 627 | ||
| 660 | MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11 628 | ||
| 661 | MX53_PAD_EIM_EB0__IPU_CSI1_D_11 629 | ||
| 662 | MX53_PAD_EIM_EB0__GPC_PMIC_RDY 630 | ||
| 663 | MX53_PAD_EIM_EB0__SRC_BT_CFG2_7 631 | ||
| 664 | MX53_PAD_EIM_EB1__EMI_WEIM_EB_1 632 | ||
| 665 | MX53_PAD_EIM_EB1__GPIO2_29 633 | ||
| 666 | MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10 634 | ||
| 667 | MX53_PAD_EIM_EB1__IPU_CSI1_D_10 635 | ||
| 668 | MX53_PAD_EIM_EB1__SRC_BT_CFG2_6 636 | ||
| 669 | MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 637 | ||
| 670 | MX53_PAD_EIM_DA0__GPIO3_0 638 | ||
| 671 | MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9 639 | ||
| 672 | MX53_PAD_EIM_DA0__IPU_CSI1_D_9 640 | ||
| 673 | MX53_PAD_EIM_DA0__SRC_BT_CFG2_5 641 | ||
| 674 | MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 642 | ||
| 675 | MX53_PAD_EIM_DA1__GPIO3_1 643 | ||
| 676 | MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8 644 | ||
| 677 | MX53_PAD_EIM_DA1__IPU_CSI1_D_8 645 | ||
| 678 | MX53_PAD_EIM_DA1__SRC_BT_CFG2_4 646 | ||
| 679 | MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 647 | ||
| 680 | MX53_PAD_EIM_DA2__GPIO3_2 648 | ||
| 681 | MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7 649 | ||
| 682 | MX53_PAD_EIM_DA2__IPU_CSI1_D_7 650 | ||
| 683 | MX53_PAD_EIM_DA2__SRC_BT_CFG2_3 651 | ||
| 684 | MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 652 | ||
| 685 | MX53_PAD_EIM_DA3__GPIO3_3 653 | ||
| 686 | MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6 654 | ||
| 687 | MX53_PAD_EIM_DA3__IPU_CSI1_D_6 655 | ||
| 688 | MX53_PAD_EIM_DA3__SRC_BT_CFG2_2 656 | ||
| 689 | MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 657 | ||
| 690 | MX53_PAD_EIM_DA4__GPIO3_4 658 | ||
| 691 | MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5 659 | ||
| 692 | MX53_PAD_EIM_DA4__IPU_CSI1_D_5 660 | ||
| 693 | MX53_PAD_EIM_DA4__SRC_BT_CFG3_7 661 | ||
| 694 | MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 662 | ||
| 695 | MX53_PAD_EIM_DA5__GPIO3_5 663 | ||
| 696 | MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 664 | ||
| 697 | MX53_PAD_EIM_DA5__IPU_CSI1_D_4 665 | ||
| 698 | MX53_PAD_EIM_DA5__SRC_BT_CFG3_6 666 | ||
| 699 | MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 667 | ||
| 700 | MX53_PAD_EIM_DA6__GPIO3_6 668 | ||
| 701 | MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 669 | ||
| 702 | MX53_PAD_EIM_DA6__IPU_CSI1_D_3 670 | ||
| 703 | MX53_PAD_EIM_DA6__SRC_BT_CFG3_5 671 | ||
| 704 | MX53_PAD_EIM_DA7__EMI_NAND_WEIM_DA_7 672 | ||
| 705 | MX53_PAD_EIM_DA7__GPIO3_7 673 | ||
| 706 | MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2 674 | ||
| 707 | MX53_PAD_EIM_DA7__IPU_CSI1_D_2 675 | ||
| 708 | MX53_PAD_EIM_DA7__SRC_BT_CFG3_4 676 | ||
| 709 | MX53_PAD_EIM_DA8__EMI_NAND_WEIM_DA_8 677 | ||
| 710 | MX53_PAD_EIM_DA8__GPIO3_8 678 | ||
| 711 | MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1 679 | ||
| 712 | MX53_PAD_EIM_DA8__IPU_CSI1_D_1 680 | ||
| 713 | MX53_PAD_EIM_DA8__SRC_BT_CFG3_3 681 | ||
| 714 | MX53_PAD_EIM_DA9__EMI_NAND_WEIM_DA_9 682 | ||
| 715 | MX53_PAD_EIM_DA9__GPIO3_9 683 | ||
| 716 | MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0 684 | ||
| 717 | MX53_PAD_EIM_DA9__IPU_CSI1_D_0 685 | ||
| 718 | MX53_PAD_EIM_DA9__SRC_BT_CFG3_2 686 | ||
| 719 | MX53_PAD_EIM_DA10__EMI_NAND_WEIM_DA_10 687 | ||
| 720 | MX53_PAD_EIM_DA10__GPIO3_10 688 | ||
| 721 | MX53_PAD_EIM_DA10__IPU_DI1_PIN15 689 | ||
| 722 | MX53_PAD_EIM_DA10__IPU_CSI1_DATA_EN 690 | ||
| 723 | MX53_PAD_EIM_DA10__SRC_BT_CFG3_1 691 | ||
| 724 | MX53_PAD_EIM_DA11__EMI_NAND_WEIM_DA_11 692 | ||
| 725 | MX53_PAD_EIM_DA11__GPIO3_11 693 | ||
| 726 | MX53_PAD_EIM_DA11__IPU_DI1_PIN2 694 | ||
| 727 | MX53_PAD_EIM_DA11__IPU_CSI1_HSYNC 695 | ||
| 728 | MX53_PAD_EIM_DA12__EMI_NAND_WEIM_DA_12 696 | ||
| 729 | MX53_PAD_EIM_DA12__GPIO3_12 697 | ||
| 730 | MX53_PAD_EIM_DA12__IPU_DI1_PIN3 698 | ||
| 731 | MX53_PAD_EIM_DA12__IPU_CSI1_VSYNC 699 | ||
| 732 | MX53_PAD_EIM_DA13__EMI_NAND_WEIM_DA_13 700 | ||
| 733 | MX53_PAD_EIM_DA13__GPIO3_13 701 | ||
| 734 | MX53_PAD_EIM_DA13__IPU_DI1_D0_CS 702 | ||
| 735 | MX53_PAD_EIM_DA13__CCM_DI1_EXT_CLK 703 | ||
| 736 | MX53_PAD_EIM_DA14__EMI_NAND_WEIM_DA_14 704 | ||
| 737 | MX53_PAD_EIM_DA14__GPIO3_14 705 | ||
| 738 | MX53_PAD_EIM_DA14__IPU_DI1_D1_CS 706 | ||
| 739 | MX53_PAD_EIM_DA14__CCM_DI0_EXT_CLK 707 | ||
| 740 | MX53_PAD_EIM_DA15__EMI_NAND_WEIM_DA_15 708 | ||
| 741 | MX53_PAD_EIM_DA15__GPIO3_15 709 | ||
| 742 | MX53_PAD_EIM_DA15__IPU_DI1_PIN1 710 | ||
| 743 | MX53_PAD_EIM_DA15__IPU_DI1_PIN4 711 | ||
| 744 | MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B 712 | ||
| 745 | MX53_PAD_NANDF_WE_B__GPIO6_12 713 | ||
| 746 | MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B 714 | ||
| 747 | MX53_PAD_NANDF_RE_B__GPIO6_13 715 | ||
| 748 | MX53_PAD_EIM_WAIT__EMI_WEIM_WAIT 716 | ||
| 749 | MX53_PAD_EIM_WAIT__GPIO5_0 717 | ||
| 750 | MX53_PAD_EIM_WAIT__EMI_WEIM_DTACK_B 718 | ||
| 751 | MX53_PAD_LVDS1_TX3_P__GPIO6_22 719 | ||
| 752 | MX53_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3 720 | ||
| 753 | MX53_PAD_LVDS1_TX2_P__GPIO6_24 721 | ||
| 754 | MX53_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2 722 | ||
| 755 | MX53_PAD_LVDS1_CLK_P__GPIO6_26 723 | ||
| 756 | MX53_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK 724 | ||
| 757 | MX53_PAD_LVDS1_TX1_P__GPIO6_28 725 | ||
| 758 | MX53_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1 726 | ||
| 759 | MX53_PAD_LVDS1_TX0_P__GPIO6_30 727 | ||
| 760 | MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0 728 | ||
| 761 | MX53_PAD_LVDS0_TX3_P__GPIO7_22 729 | ||
| 762 | MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 730 | ||
| 763 | MX53_PAD_LVDS0_CLK_P__GPIO7_24 731 | ||
| 764 | MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 732 | ||
| 765 | MX53_PAD_LVDS0_TX2_P__GPIO7_26 733 | ||
| 766 | MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 734 | ||
| 767 | MX53_PAD_LVDS0_TX1_P__GPIO7_28 735 | ||
| 768 | MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 736 | ||
| 769 | MX53_PAD_LVDS0_TX0_P__GPIO7_30 737 | ||
| 770 | MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 738 | ||
| 771 | MX53_PAD_GPIO_10__GPIO4_0 739 | ||
| 772 | MX53_PAD_GPIO_10__OSC32k_32K_OUT 740 | ||
| 773 | MX53_PAD_GPIO_11__GPIO4_1 741 | ||
| 774 | MX53_PAD_GPIO_12__GPIO4_2 742 | ||
| 775 | MX53_PAD_GPIO_13__GPIO4_3 743 | ||
| 776 | MX53_PAD_GPIO_14__GPIO4_4 744 | ||
| 777 | MX53_PAD_NANDF_CLE__EMI_NANDF_CLE 745 | ||
| 778 | MX53_PAD_NANDF_CLE__GPIO6_7 746 | ||
| 779 | MX53_PAD_NANDF_CLE__USBPHY1_VSTATUS_0 747 | ||
| 780 | MX53_PAD_NANDF_ALE__EMI_NANDF_ALE 748 | ||
| 781 | MX53_PAD_NANDF_ALE__GPIO6_8 749 | ||
| 782 | MX53_PAD_NANDF_ALE__USBPHY1_VSTATUS_1 750 | ||
| 783 | MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B 751 | ||
| 784 | MX53_PAD_NANDF_WP_B__GPIO6_9 752 | ||
| 785 | MX53_PAD_NANDF_WP_B__USBPHY1_VSTATUS_2 753 | ||
| 786 | MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0 754 | ||
| 787 | MX53_PAD_NANDF_RB0__GPIO6_10 755 | ||
| 788 | MX53_PAD_NANDF_RB0__USBPHY1_VSTATUS_3 756 | ||
| 789 | MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0 757 | ||
| 790 | MX53_PAD_NANDF_CS0__GPIO6_11 758 | ||
| 791 | MX53_PAD_NANDF_CS0__USBPHY1_VSTATUS_4 759 | ||
| 792 | MX53_PAD_NANDF_CS1__EMI_NANDF_CS_1 760 | ||
| 793 | MX53_PAD_NANDF_CS1__GPIO6_14 761 | ||
| 794 | MX53_PAD_NANDF_CS1__MLB_MLBCLK 762 | ||
| 795 | MX53_PAD_NANDF_CS1__USBPHY1_VSTATUS_5 763 | ||
| 796 | MX53_PAD_NANDF_CS2__EMI_NANDF_CS_2 764 | ||
| 797 | MX53_PAD_NANDF_CS2__GPIO6_15 765 | ||
| 798 | MX53_PAD_NANDF_CS2__IPU_SISG_0 766 | ||
| 799 | MX53_PAD_NANDF_CS2__ESAI1_TX0 767 | ||
| 800 | MX53_PAD_NANDF_CS2__EMI_WEIM_CRE 768 | ||
| 801 | MX53_PAD_NANDF_CS2__CCM_CSI0_MCLK 769 | ||
| 802 | MX53_PAD_NANDF_CS2__MLB_MLBSIG 770 | ||
| 803 | MX53_PAD_NANDF_CS2__USBPHY1_VSTATUS_6 771 | ||
| 804 | MX53_PAD_NANDF_CS3__EMI_NANDF_CS_3 772 | ||
| 805 | MX53_PAD_NANDF_CS3__GPIO6_16 773 | ||
| 806 | MX53_PAD_NANDF_CS3__IPU_SISG_1 774 | ||
| 807 | MX53_PAD_NANDF_CS3__ESAI1_TX1 775 | ||
| 808 | MX53_PAD_NANDF_CS3__EMI_WEIM_A_26 776 | ||
| 809 | MX53_PAD_NANDF_CS3__MLB_MLBDAT 777 | ||
| 810 | MX53_PAD_NANDF_CS3__USBPHY1_VSTATUS_7 778 | ||
| 811 | MX53_PAD_FEC_MDIO__FEC_MDIO 779 | ||
| 812 | MX53_PAD_FEC_MDIO__GPIO1_22 780 | ||
| 813 | MX53_PAD_FEC_MDIO__ESAI1_SCKR 781 | ||
| 814 | MX53_PAD_FEC_MDIO__FEC_COL 782 | ||
| 815 | MX53_PAD_FEC_MDIO__RTC_CE_RTC_PS2 783 | ||
| 816 | MX53_PAD_FEC_MDIO__SDMA_DEBUG_BUS_DEVICE_3 784 | ||
| 817 | MX53_PAD_FEC_MDIO__EMI_EMI_DEBUG_49 785 | ||
| 818 | MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 786 | ||
| 819 | MX53_PAD_FEC_REF_CLK__GPIO1_23 787 | ||
| 820 | MX53_PAD_FEC_REF_CLK__ESAI1_FSR 788 | ||
| 821 | MX53_PAD_FEC_REF_CLK__SDMA_DEBUG_BUS_DEVICE_4 789 | ||
| 822 | MX53_PAD_FEC_REF_CLK__EMI_EMI_DEBUG_50 790 | ||
| 823 | MX53_PAD_FEC_RX_ER__FEC_RX_ER 791 | ||
| 824 | MX53_PAD_FEC_RX_ER__GPIO1_24 792 | ||
| 825 | MX53_PAD_FEC_RX_ER__ESAI1_HCKR 793 | ||
| 826 | MX53_PAD_FEC_RX_ER__FEC_RX_CLK 794 | ||
| 827 | MX53_PAD_FEC_RX_ER__RTC_CE_RTC_PS3 795 | ||
| 828 | MX53_PAD_FEC_CRS_DV__FEC_RX_DV 796 | ||
| 829 | MX53_PAD_FEC_CRS_DV__GPIO1_25 797 | ||
| 830 | MX53_PAD_FEC_CRS_DV__ESAI1_SCKT 798 | ||
| 831 | MX53_PAD_FEC_RXD1__FEC_RDATA_1 799 | ||
| 832 | MX53_PAD_FEC_RXD1__GPIO1_26 800 | ||
| 833 | MX53_PAD_FEC_RXD1__ESAI1_FST 801 | ||
| 834 | MX53_PAD_FEC_RXD1__MLB_MLBSIG 802 | ||
| 835 | MX53_PAD_FEC_RXD1__RTC_CE_RTC_PS1 803 | ||
| 836 | MX53_PAD_FEC_RXD0__FEC_RDATA_0 804 | ||
| 837 | MX53_PAD_FEC_RXD0__GPIO1_27 805 | ||
| 838 | MX53_PAD_FEC_RXD0__ESAI1_HCKT 806 | ||
| 839 | MX53_PAD_FEC_RXD0__OSC32k_32K_OUT 807 | ||
| 840 | MX53_PAD_FEC_TX_EN__FEC_TX_EN 808 | ||
| 841 | MX53_PAD_FEC_TX_EN__GPIO1_28 809 | ||
| 842 | MX53_PAD_FEC_TX_EN__ESAI1_TX3_RX2 810 | ||
| 843 | MX53_PAD_FEC_TXD1__FEC_TDATA_1 811 | ||
| 844 | MX53_PAD_FEC_TXD1__GPIO1_29 812 | ||
| 845 | MX53_PAD_FEC_TXD1__ESAI1_TX2_RX3 813 | ||
| 846 | MX53_PAD_FEC_TXD1__MLB_MLBCLK 814 | ||
| 847 | MX53_PAD_FEC_TXD1__RTC_CE_RTC_PRSC_CLK 815 | ||
| 848 | MX53_PAD_FEC_TXD0__FEC_TDATA_0 816 | ||
| 849 | MX53_PAD_FEC_TXD0__GPIO1_30 817 | ||
| 850 | MX53_PAD_FEC_TXD0__ESAI1_TX4_RX1 818 | ||
| 851 | MX53_PAD_FEC_TXD0__USBPHY2_DATAOUT_0 819 | ||
| 852 | MX53_PAD_FEC_MDC__FEC_MDC 820 | ||
| 853 | MX53_PAD_FEC_MDC__GPIO1_31 821 | ||
| 854 | MX53_PAD_FEC_MDC__ESAI1_TX5_RX0 822 | ||
| 855 | MX53_PAD_FEC_MDC__MLB_MLBDAT 823 | ||
| 856 | MX53_PAD_FEC_MDC__RTC_CE_RTC_ALARM1_TRIG 824 | ||
| 857 | MX53_PAD_FEC_MDC__USBPHY2_DATAOUT_1 825 | ||
| 858 | MX53_PAD_PATA_DIOW__PATA_DIOW 826 | ||
| 859 | MX53_PAD_PATA_DIOW__GPIO6_17 827 | ||
| 860 | MX53_PAD_PATA_DIOW__UART1_TXD_MUX 828 | ||
| 861 | MX53_PAD_PATA_DIOW__USBPHY2_DATAOUT_2 829 | ||
| 862 | MX53_PAD_PATA_DMACK__PATA_DMACK 830 | ||
| 863 | MX53_PAD_PATA_DMACK__GPIO6_18 831 | ||
| 864 | MX53_PAD_PATA_DMACK__UART1_RXD_MUX 832 | ||
| 865 | MX53_PAD_PATA_DMACK__USBPHY2_DATAOUT_3 833 | ||
| 866 | MX53_PAD_PATA_DMARQ__PATA_DMARQ 834 | ||
| 867 | MX53_PAD_PATA_DMARQ__GPIO7_0 835 | ||
| 868 | MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 836 | ||
| 869 | MX53_PAD_PATA_DMARQ__CCM_CCM_OUT_0 837 | ||
| 870 | MX53_PAD_PATA_DMARQ__USBPHY2_DATAOUT_4 838 | ||
| 871 | MX53_PAD_PATA_BUFFER_EN__PATA_BUFFER_EN 839 | ||
| 872 | MX53_PAD_PATA_BUFFER_EN__GPIO7_1 840 | ||
| 873 | MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 841 | ||
| 874 | MX53_PAD_PATA_BUFFER_EN__CCM_CCM_OUT_1 842 | ||
| 875 | MX53_PAD_PATA_BUFFER_EN__USBPHY2_DATAOUT_5 843 | ||
| 876 | MX53_PAD_PATA_INTRQ__PATA_INTRQ 844 | ||
| 877 | MX53_PAD_PATA_INTRQ__GPIO7_2 845 | ||
| 878 | MX53_PAD_PATA_INTRQ__UART2_CTS 846 | ||
| 879 | MX53_PAD_PATA_INTRQ__CAN1_TXCAN 847 | ||
| 880 | MX53_PAD_PATA_INTRQ__CCM_CCM_OUT_2 848 | ||
| 881 | MX53_PAD_PATA_INTRQ__USBPHY2_DATAOUT_6 849 | ||
| 882 | MX53_PAD_PATA_DIOR__PATA_DIOR 850 | ||
| 883 | MX53_PAD_PATA_DIOR__GPIO7_3 851 | ||
| 884 | MX53_PAD_PATA_DIOR__UART2_RTS 852 | ||
| 885 | MX53_PAD_PATA_DIOR__CAN1_RXCAN 853 | ||
| 886 | MX53_PAD_PATA_DIOR__USBPHY2_DATAOUT_7 854 | ||
| 887 | MX53_PAD_PATA_RESET_B__PATA_PATA_RESET_B 855 | ||
| 888 | MX53_PAD_PATA_RESET_B__GPIO7_4 856 | ||
| 889 | MX53_PAD_PATA_RESET_B__ESDHC3_CMD 857 | ||
| 890 | MX53_PAD_PATA_RESET_B__UART1_CTS 858 | ||
| 891 | MX53_PAD_PATA_RESET_B__CAN2_TXCAN 859 | ||
| 892 | MX53_PAD_PATA_RESET_B__USBPHY1_DATAOUT_0 860 | ||
| 893 | MX53_PAD_PATA_IORDY__PATA_IORDY 861 | ||
| 894 | MX53_PAD_PATA_IORDY__GPIO7_5 862 | ||
| 895 | MX53_PAD_PATA_IORDY__ESDHC3_CLK 863 | ||
| 896 | MX53_PAD_PATA_IORDY__UART1_RTS 864 | ||
| 897 | MX53_PAD_PATA_IORDY__CAN2_RXCAN 865 | ||
| 898 | MX53_PAD_PATA_IORDY__USBPHY1_DATAOUT_1 866 | ||
| 899 | MX53_PAD_PATA_DA_0__PATA_DA_0 867 | ||
| 900 | MX53_PAD_PATA_DA_0__GPIO7_6 868 | ||
| 901 | MX53_PAD_PATA_DA_0__ESDHC3_RST 869 | ||
| 902 | MX53_PAD_PATA_DA_0__OWIRE_LINE 870 | ||
| 903 | MX53_PAD_PATA_DA_0__USBPHY1_DATAOUT_2 871 | ||
| 904 | MX53_PAD_PATA_DA_1__PATA_DA_1 872 | ||
| 905 | MX53_PAD_PATA_DA_1__GPIO7_7 873 | ||
| 906 | MX53_PAD_PATA_DA_1__ESDHC4_CMD 874 | ||
| 907 | MX53_PAD_PATA_DA_1__UART3_CTS 875 | ||
| 908 | MX53_PAD_PATA_DA_1__USBPHY1_DATAOUT_3 876 | ||
| 909 | MX53_PAD_PATA_DA_2__PATA_DA_2 877 | ||
| 910 | MX53_PAD_PATA_DA_2__GPIO7_8 878 | ||
| 911 | MX53_PAD_PATA_DA_2__ESDHC4_CLK 879 | ||
| 912 | MX53_PAD_PATA_DA_2__UART3_RTS 880 | ||
| 913 | MX53_PAD_PATA_DA_2__USBPHY1_DATAOUT_4 881 | ||
| 914 | MX53_PAD_PATA_CS_0__PATA_CS_0 882 | ||
| 915 | MX53_PAD_PATA_CS_0__GPIO7_9 883 | ||
| 916 | MX53_PAD_PATA_CS_0__UART3_TXD_MUX 884 | ||
| 917 | MX53_PAD_PATA_CS_0__USBPHY1_DATAOUT_5 885 | ||
| 918 | MX53_PAD_PATA_CS_1__PATA_CS_1 886 | ||
| 919 | MX53_PAD_PATA_CS_1__GPIO7_10 887 | ||
| 920 | MX53_PAD_PATA_CS_1__UART3_RXD_MUX 888 | ||
| 921 | MX53_PAD_PATA_CS_1__USBPHY1_DATAOUT_6 889 | ||
| 922 | MX53_PAD_PATA_DATA0__PATA_DATA_0 890 | ||
| 923 | MX53_PAD_PATA_DATA0__GPIO2_0 891 | ||
| 924 | MX53_PAD_PATA_DATA0__EMI_NANDF_D_0 892 | ||
| 925 | MX53_PAD_PATA_DATA0__ESDHC3_DAT4 893 | ||
| 926 | MX53_PAD_PATA_DATA0__GPU3d_GPU_DEBUG_OUT_0 894 | ||
| 927 | MX53_PAD_PATA_DATA0__IPU_DIAG_BUS_0 895 | ||
| 928 | MX53_PAD_PATA_DATA0__USBPHY1_DATAOUT_7 896 | ||
| 929 | MX53_PAD_PATA_DATA1__PATA_DATA_1 897 | ||
| 930 | MX53_PAD_PATA_DATA1__GPIO2_1 898 | ||
| 931 | MX53_PAD_PATA_DATA1__EMI_NANDF_D_1 899 | ||
| 932 | MX53_PAD_PATA_DATA1__ESDHC3_DAT5 900 | ||
| 933 | MX53_PAD_PATA_DATA1__GPU3d_GPU_DEBUG_OUT_1 901 | ||
| 934 | MX53_PAD_PATA_DATA1__IPU_DIAG_BUS_1 902 | ||
| 935 | MX53_PAD_PATA_DATA2__PATA_DATA_2 903 | ||
| 936 | MX53_PAD_PATA_DATA2__GPIO2_2 904 | ||
| 937 | MX53_PAD_PATA_DATA2__EMI_NANDF_D_2 905 | ||
| 938 | MX53_PAD_PATA_DATA2__ESDHC3_DAT6 906 | ||
| 939 | MX53_PAD_PATA_DATA2__GPU3d_GPU_DEBUG_OUT_2 907 | ||
| 940 | MX53_PAD_PATA_DATA2__IPU_DIAG_BUS_2 908 | ||
| 941 | MX53_PAD_PATA_DATA3__PATA_DATA_3 909 | ||
| 942 | MX53_PAD_PATA_DATA3__GPIO2_3 910 | ||
| 943 | MX53_PAD_PATA_DATA3__EMI_NANDF_D_3 911 | ||
| 944 | MX53_PAD_PATA_DATA3__ESDHC3_DAT7 912 | ||
| 945 | MX53_PAD_PATA_DATA3__GPU3d_GPU_DEBUG_OUT_3 913 | ||
| 946 | MX53_PAD_PATA_DATA3__IPU_DIAG_BUS_3 914 | ||
| 947 | MX53_PAD_PATA_DATA4__PATA_DATA_4 915 | ||
| 948 | MX53_PAD_PATA_DATA4__GPIO2_4 916 | ||
| 949 | MX53_PAD_PATA_DATA4__EMI_NANDF_D_4 917 | ||
| 950 | MX53_PAD_PATA_DATA4__ESDHC4_DAT4 918 | ||
| 951 | MX53_PAD_PATA_DATA4__GPU3d_GPU_DEBUG_OUT_4 919 | ||
| 952 | MX53_PAD_PATA_DATA4__IPU_DIAG_BUS_4 920 | ||
| 953 | MX53_PAD_PATA_DATA5__PATA_DATA_5 921 | ||
| 954 | MX53_PAD_PATA_DATA5__GPIO2_5 922 | ||
| 955 | MX53_PAD_PATA_DATA5__EMI_NANDF_D_5 923 | ||
| 956 | MX53_PAD_PATA_DATA5__ESDHC4_DAT5 924 | ||
| 957 | MX53_PAD_PATA_DATA5__GPU3d_GPU_DEBUG_OUT_5 925 | ||
| 958 | MX53_PAD_PATA_DATA5__IPU_DIAG_BUS_5 926 | ||
| 959 | MX53_PAD_PATA_DATA6__PATA_DATA_6 927 | ||
| 960 | MX53_PAD_PATA_DATA6__GPIO2_6 928 | ||
| 961 | MX53_PAD_PATA_DATA6__EMI_NANDF_D_6 929 | ||
| 962 | MX53_PAD_PATA_DATA6__ESDHC4_DAT6 930 | ||
| 963 | MX53_PAD_PATA_DATA6__GPU3d_GPU_DEBUG_OUT_6 931 | ||
| 964 | MX53_PAD_PATA_DATA6__IPU_DIAG_BUS_6 932 | ||
| 965 | MX53_PAD_PATA_DATA7__PATA_DATA_7 933 | ||
| 966 | MX53_PAD_PATA_DATA7__GPIO2_7 934 | ||
| 967 | MX53_PAD_PATA_DATA7__EMI_NANDF_D_7 935 | ||
| 968 | MX53_PAD_PATA_DATA7__ESDHC4_DAT7 936 | ||
| 969 | MX53_PAD_PATA_DATA7__GPU3d_GPU_DEBUG_OUT_7 937 | ||
| 970 | MX53_PAD_PATA_DATA7__IPU_DIAG_BUS_7 938 | ||
| 971 | MX53_PAD_PATA_DATA8__PATA_DATA_8 939 | ||
| 972 | MX53_PAD_PATA_DATA8__GPIO2_8 940 | ||
| 973 | MX53_PAD_PATA_DATA8__ESDHC1_DAT4 941 | ||
| 974 | MX53_PAD_PATA_DATA8__EMI_NANDF_D_8 942 | ||
| 975 | MX53_PAD_PATA_DATA8__ESDHC3_DAT0 943 | ||
| 976 | MX53_PAD_PATA_DATA8__GPU3d_GPU_DEBUG_OUT_8 944 | ||
| 977 | MX53_PAD_PATA_DATA8__IPU_DIAG_BUS_8 945 | ||
| 978 | MX53_PAD_PATA_DATA9__PATA_DATA_9 946 | ||
| 979 | MX53_PAD_PATA_DATA9__GPIO2_9 947 | ||
| 980 | MX53_PAD_PATA_DATA9__ESDHC1_DAT5 948 | ||
| 981 | MX53_PAD_PATA_DATA9__EMI_NANDF_D_9 949 | ||
| 982 | MX53_PAD_PATA_DATA9__ESDHC3_DAT1 950 | ||
| 983 | MX53_PAD_PATA_DATA9__GPU3d_GPU_DEBUG_OUT_9 951 | ||
| 984 | MX53_PAD_PATA_DATA9__IPU_DIAG_BUS_9 952 | ||
| 985 | MX53_PAD_PATA_DATA10__PATA_DATA_10 953 | ||
| 986 | MX53_PAD_PATA_DATA10__GPIO2_10 954 | ||
| 987 | MX53_PAD_PATA_DATA10__ESDHC1_DAT6 955 | ||
| 988 | MX53_PAD_PATA_DATA10__EMI_NANDF_D_10 956 | ||
| 989 | MX53_PAD_PATA_DATA10__ESDHC3_DAT2 957 | ||
| 990 | MX53_PAD_PATA_DATA10__GPU3d_GPU_DEBUG_OUT_10 958 | ||
| 991 | MX53_PAD_PATA_DATA10__IPU_DIAG_BUS_10 959 | ||
| 992 | MX53_PAD_PATA_DATA11__PATA_DATA_11 960 | ||
| 993 | MX53_PAD_PATA_DATA11__GPIO2_11 961 | ||
| 994 | MX53_PAD_PATA_DATA11__ESDHC1_DAT7 962 | ||
| 995 | MX53_PAD_PATA_DATA11__EMI_NANDF_D_11 963 | ||
| 996 | MX53_PAD_PATA_DATA11__ESDHC3_DAT3 964 | ||
| 997 | MX53_PAD_PATA_DATA11__GPU3d_GPU_DEBUG_OUT_11 965 | ||
| 998 | MX53_PAD_PATA_DATA11__IPU_DIAG_BUS_11 966 | ||
| 999 | MX53_PAD_PATA_DATA12__PATA_DATA_12 967 | ||
| 1000 | MX53_PAD_PATA_DATA12__GPIO2_12 968 | ||
| 1001 | MX53_PAD_PATA_DATA12__ESDHC2_DAT4 969 | ||
| 1002 | MX53_PAD_PATA_DATA12__EMI_NANDF_D_12 970 | ||
| 1003 | MX53_PAD_PATA_DATA12__ESDHC4_DAT0 971 | ||
| 1004 | MX53_PAD_PATA_DATA12__GPU3d_GPU_DEBUG_OUT_12 972 | ||
| 1005 | MX53_PAD_PATA_DATA12__IPU_DIAG_BUS_12 973 | ||
| 1006 | MX53_PAD_PATA_DATA13__PATA_DATA_13 974 | ||
| 1007 | MX53_PAD_PATA_DATA13__GPIO2_13 975 | ||
| 1008 | MX53_PAD_PATA_DATA13__ESDHC2_DAT5 976 | ||
| 1009 | MX53_PAD_PATA_DATA13__EMI_NANDF_D_13 977 | ||
| 1010 | MX53_PAD_PATA_DATA13__ESDHC4_DAT1 978 | ||
| 1011 | MX53_PAD_PATA_DATA13__GPU3d_GPU_DEBUG_OUT_13 979 | ||
| 1012 | MX53_PAD_PATA_DATA13__IPU_DIAG_BUS_13 980 | ||
| 1013 | MX53_PAD_PATA_DATA14__PATA_DATA_14 981 | ||
| 1014 | MX53_PAD_PATA_DATA14__GPIO2_14 982 | ||
| 1015 | MX53_PAD_PATA_DATA14__ESDHC2_DAT6 983 | ||
| 1016 | MX53_PAD_PATA_DATA14__EMI_NANDF_D_14 984 | ||
| 1017 | MX53_PAD_PATA_DATA14__ESDHC4_DAT2 985 | ||
| 1018 | MX53_PAD_PATA_DATA14__GPU3d_GPU_DEBUG_OUT_14 986 | ||
| 1019 | MX53_PAD_PATA_DATA14__IPU_DIAG_BUS_14 987 | ||
| 1020 | MX53_PAD_PATA_DATA15__PATA_DATA_15 988 | ||
| 1021 | MX53_PAD_PATA_DATA15__GPIO2_15 989 | ||
| 1022 | MX53_PAD_PATA_DATA15__ESDHC2_DAT7 990 | ||
| 1023 | MX53_PAD_PATA_DATA15__EMI_NANDF_D_15 991 | ||
| 1024 | MX53_PAD_PATA_DATA15__ESDHC4_DAT3 992 | ||
| 1025 | MX53_PAD_PATA_DATA15__GPU3d_GPU_DEBUG_OUT_15 993 | ||
| 1026 | MX53_PAD_PATA_DATA15__IPU_DIAG_BUS_15 994 | ||
| 1027 | MX53_PAD_SD1_DATA0__ESDHC1_DAT0 995 | ||
| 1028 | MX53_PAD_SD1_DATA0__GPIO1_16 996 | ||
| 1029 | MX53_PAD_SD1_DATA0__GPT_CAPIN1 997 | ||
| 1030 | MX53_PAD_SD1_DATA0__CSPI_MISO 998 | ||
| 1031 | MX53_PAD_SD1_DATA0__CCM_PLL3_BYP 999 | ||
| 1032 | MX53_PAD_SD1_DATA1__ESDHC1_DAT1 1000 | ||
| 1033 | MX53_PAD_SD1_DATA1__GPIO1_17 1001 | ||
| 1034 | MX53_PAD_SD1_DATA1__GPT_CAPIN2 1002 | ||
| 1035 | MX53_PAD_SD1_DATA1__CSPI_SS0 1003 | ||
| 1036 | MX53_PAD_SD1_DATA1__CCM_PLL4_BYP 1004 | ||
| 1037 | MX53_PAD_SD1_CMD__ESDHC1_CMD 1005 | ||
| 1038 | MX53_PAD_SD1_CMD__GPIO1_18 1006 | ||
| 1039 | MX53_PAD_SD1_CMD__GPT_CMPOUT1 1007 | ||
| 1040 | MX53_PAD_SD1_CMD__CSPI_MOSI 1008 | ||
| 1041 | MX53_PAD_SD1_CMD__CCM_PLL1_BYP 1009 | ||
| 1042 | MX53_PAD_SD1_DATA2__ESDHC1_DAT2 1010 | ||
| 1043 | MX53_PAD_SD1_DATA2__GPIO1_19 1011 | ||
| 1044 | MX53_PAD_SD1_DATA2__GPT_CMPOUT2 1012 | ||
| 1045 | MX53_PAD_SD1_DATA2__PWM2_PWMO 1013 | ||
| 1046 | MX53_PAD_SD1_DATA2__WDOG1_WDOG_B 1014 | ||
| 1047 | MX53_PAD_SD1_DATA2__CSPI_SS1 1015 | ||
| 1048 | MX53_PAD_SD1_DATA2__WDOG1_WDOG_RST_B_DEB 1016 | ||
| 1049 | MX53_PAD_SD1_DATA2__CCM_PLL2_BYP 1017 | ||
| 1050 | MX53_PAD_SD1_CLK__ESDHC1_CLK 1018 | ||
| 1051 | MX53_PAD_SD1_CLK__GPIO1_20 1019 | ||
| 1052 | MX53_PAD_SD1_CLK__OSC32k_32K_OUT 1020 | ||
| 1053 | MX53_PAD_SD1_CLK__GPT_CLKIN 1021 | ||
| 1054 | MX53_PAD_SD1_CLK__CSPI_SCLK 1022 | ||
| 1055 | MX53_PAD_SD1_CLK__SATA_PHY_DTB_0 1023 | ||
| 1056 | MX53_PAD_SD1_DATA3__ESDHC1_DAT3 1024 | ||
| 1057 | MX53_PAD_SD1_DATA3__GPIO1_21 1025 | ||
| 1058 | MX53_PAD_SD1_DATA3__GPT_CMPOUT3 1026 | ||
| 1059 | MX53_PAD_SD1_DATA3__PWM1_PWMO 1027 | ||
| 1060 | MX53_PAD_SD1_DATA3__WDOG2_WDOG_B 1028 | ||
| 1061 | MX53_PAD_SD1_DATA3__CSPI_SS2 1029 | ||
| 1062 | MX53_PAD_SD1_DATA3__WDOG2_WDOG_RST_B_DEB 1030 | ||
| 1063 | MX53_PAD_SD1_DATA3__SATA_PHY_DTB_1 1031 | ||
| 1064 | MX53_PAD_SD2_CLK__ESDHC2_CLK 1032 | ||
| 1065 | MX53_PAD_SD2_CLK__GPIO1_10 1033 | ||
| 1066 | MX53_PAD_SD2_CLK__KPP_COL_5 1034 | ||
| 1067 | MX53_PAD_SD2_CLK__AUDMUX_AUD4_RXFS 1035 | ||
| 1068 | MX53_PAD_SD2_CLK__CSPI_SCLK 1036 | ||
| 1069 | MX53_PAD_SD2_CLK__SCC_RANDOM_V 1037 | ||
| 1070 | MX53_PAD_SD2_CMD__ESDHC2_CMD 1038 | ||
| 1071 | MX53_PAD_SD2_CMD__GPIO1_11 1039 | ||
| 1072 | MX53_PAD_SD2_CMD__KPP_ROW_5 1040 | ||
| 1073 | MX53_PAD_SD2_CMD__AUDMUX_AUD4_RXC 1041 | ||
| 1074 | MX53_PAD_SD2_CMD__CSPI_MOSI 1042 | ||
| 1075 | MX53_PAD_SD2_CMD__SCC_RANDOM 1043 | ||
| 1076 | MX53_PAD_SD2_DATA3__ESDHC2_DAT3 1044 | ||
| 1077 | MX53_PAD_SD2_DATA3__GPIO1_12 1045 | ||
| 1078 | MX53_PAD_SD2_DATA3__KPP_COL_6 1046 | ||
| 1079 | MX53_PAD_SD2_DATA3__AUDMUX_AUD4_TXC 1047 | ||
| 1080 | MX53_PAD_SD2_DATA3__CSPI_SS2 1048 | ||
| 1081 | MX53_PAD_SD2_DATA3__SJC_DONE 1049 | ||
| 1082 | MX53_PAD_SD2_DATA2__ESDHC2_DAT2 1050 | ||
| 1083 | MX53_PAD_SD2_DATA2__GPIO1_13 1051 | ||
| 1084 | MX53_PAD_SD2_DATA2__KPP_ROW_6 1052 | ||
| 1085 | MX53_PAD_SD2_DATA2__AUDMUX_AUD4_TXD 1053 | ||
| 1086 | MX53_PAD_SD2_DATA2__CSPI_SS1 1054 | ||
| 1087 | MX53_PAD_SD2_DATA2__SJC_FAIL 1055 | ||
| 1088 | MX53_PAD_SD2_DATA1__ESDHC2_DAT1 1056 | ||
| 1089 | MX53_PAD_SD2_DATA1__GPIO1_14 1057 | ||
| 1090 | MX53_PAD_SD2_DATA1__KPP_COL_7 1058 | ||
| 1091 | MX53_PAD_SD2_DATA1__AUDMUX_AUD4_TXFS 1059 | ||
| 1092 | MX53_PAD_SD2_DATA1__CSPI_SS0 1060 | ||
| 1093 | MX53_PAD_SD2_DATA1__RTIC_SEC_VIO 1061 | ||
| 1094 | MX53_PAD_SD2_DATA0__ESDHC2_DAT0 1062 | ||
| 1095 | MX53_PAD_SD2_DATA0__GPIO1_15 1063 | ||
| 1096 | MX53_PAD_SD2_DATA0__KPP_ROW_7 1064 | ||
| 1097 | MX53_PAD_SD2_DATA0__AUDMUX_AUD4_RXD 1065 | ||
| 1098 | MX53_PAD_SD2_DATA0__CSPI_MISO 1066 | ||
| 1099 | MX53_PAD_SD2_DATA0__RTIC_DONE_INT 1067 | ||
| 1100 | MX53_PAD_GPIO_0__CCM_CLKO 1068 | ||
| 1101 | MX53_PAD_GPIO_0__GPIO1_0 1069 | ||
| 1102 | MX53_PAD_GPIO_0__KPP_COL_5 1070 | ||
| 1103 | MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 1071 | ||
| 1104 | MX53_PAD_GPIO_0__EPIT1_EPITO 1072 | ||
| 1105 | MX53_PAD_GPIO_0__SRTC_ALARM_DEB 1073 | ||
| 1106 | MX53_PAD_GPIO_0__USBOH3_USBH1_PWR 1074 | ||
| 1107 | MX53_PAD_GPIO_0__CSU_TD 1075 | ||
| 1108 | MX53_PAD_GPIO_1__ESAI1_SCKR 1076 | ||
| 1109 | MX53_PAD_GPIO_1__GPIO1_1 1077 | ||
| 1110 | MX53_PAD_GPIO_1__KPP_ROW_5 1078 | ||
| 1111 | MX53_PAD_GPIO_1__CCM_SSI_EXT2_CLK 1079 | ||
| 1112 | MX53_PAD_GPIO_1__PWM2_PWMO 1080 | ||
| 1113 | MX53_PAD_GPIO_1__WDOG2_WDOG_B 1081 | ||
| 1114 | MX53_PAD_GPIO_1__ESDHC1_CD 1082 | ||
| 1115 | MX53_PAD_GPIO_1__SRC_TESTER_ACK 1083 | ||
| 1116 | MX53_PAD_GPIO_9__ESAI1_FSR 1084 | ||
| 1117 | MX53_PAD_GPIO_9__GPIO1_9 1085 | ||
| 1118 | MX53_PAD_GPIO_9__KPP_COL_6 1086 | ||
| 1119 | MX53_PAD_GPIO_9__CCM_REF_EN_B 1087 | ||
| 1120 | MX53_PAD_GPIO_9__PWM1_PWMO 1088 | ||
| 1121 | MX53_PAD_GPIO_9__WDOG1_WDOG_B 1089 | ||
| 1122 | MX53_PAD_GPIO_9__ESDHC1_WP 1090 | ||
| 1123 | MX53_PAD_GPIO_9__SCC_FAIL_STATE 1091 | ||
| 1124 | MX53_PAD_GPIO_3__ESAI1_HCKR 1092 | ||
| 1125 | MX53_PAD_GPIO_3__GPIO1_3 1093 | ||
| 1126 | MX53_PAD_GPIO_3__I2C3_SCL 1094 | ||
| 1127 | MX53_PAD_GPIO_3__DPLLIP1_TOG_EN 1095 | ||
| 1128 | MX53_PAD_GPIO_3__CCM_CLKO2 1096 | ||
| 1129 | MX53_PAD_GPIO_3__OBSERVE_MUX_OBSRV_INT_OUT0 1097 | ||
| 1130 | MX53_PAD_GPIO_3__USBOH3_USBH1_OC 1098 | ||
| 1131 | MX53_PAD_GPIO_3__MLB_MLBCLK 1099 | ||
| 1132 | MX53_PAD_GPIO_6__ESAI1_SCKT 1100 | ||
| 1133 | MX53_PAD_GPIO_6__GPIO1_6 1101 | ||
| 1134 | MX53_PAD_GPIO_6__I2C3_SDA 1102 | ||
| 1135 | MX53_PAD_GPIO_6__CCM_CCM_OUT_0 1103 | ||
| 1136 | MX53_PAD_GPIO_6__CSU_CSU_INT_DEB 1104 | ||
| 1137 | MX53_PAD_GPIO_6__OBSERVE_MUX_OBSRV_INT_OUT1 1105 | ||
| 1138 | MX53_PAD_GPIO_6__ESDHC2_LCTL 1106 | ||
| 1139 | MX53_PAD_GPIO_6__MLB_MLBSIG 1107 | ||
| 1140 | MX53_PAD_GPIO_2__ESAI1_FST 1108 | ||
| 1141 | MX53_PAD_GPIO_2__GPIO1_2 1109 | ||
| 1142 | MX53_PAD_GPIO_2__KPP_ROW_6 1110 | ||
| 1143 | MX53_PAD_GPIO_2__CCM_CCM_OUT_1 1111 | ||
| 1144 | MX53_PAD_GPIO_2__CSU_CSU_ALARM_AUT_0 1112 | ||
| 1145 | MX53_PAD_GPIO_2__OBSERVE_MUX_OBSRV_INT_OUT2 1113 | ||
| 1146 | MX53_PAD_GPIO_2__ESDHC2_WP 1114 | ||
| 1147 | MX53_PAD_GPIO_2__MLB_MLBDAT 1115 | ||
| 1148 | MX53_PAD_GPIO_4__ESAI1_HCKT 1116 | ||
| 1149 | MX53_PAD_GPIO_4__GPIO1_4 1117 | ||
| 1150 | MX53_PAD_GPIO_4__KPP_COL_7 1118 | ||
| 1151 | MX53_PAD_GPIO_4__CCM_CCM_OUT_2 1119 | ||
| 1152 | MX53_PAD_GPIO_4__CSU_CSU_ALARM_AUT_1 1120 | ||
| 1153 | MX53_PAD_GPIO_4__OBSERVE_MUX_OBSRV_INT_OUT3 1121 | ||
| 1154 | MX53_PAD_GPIO_4__ESDHC2_CD 1122 | ||
| 1155 | MX53_PAD_GPIO_4__SCC_SEC_STATE 1123 | ||
| 1156 | MX53_PAD_GPIO_5__ESAI1_TX2_RX3 1124 | ||
| 1157 | MX53_PAD_GPIO_5__GPIO1_5 1125 | ||
| 1158 | MX53_PAD_GPIO_5__KPP_ROW_7 1126 | ||
| 1159 | MX53_PAD_GPIO_5__CCM_CLKO 1127 | ||
| 1160 | MX53_PAD_GPIO_5__CSU_CSU_ALARM_AUT_2 1128 | ||
| 1161 | MX53_PAD_GPIO_5__OBSERVE_MUX_OBSRV_INT_OUT4 1129 | ||
| 1162 | MX53_PAD_GPIO_5__I2C3_SCL 1130 | ||
| 1163 | MX53_PAD_GPIO_5__CCM_PLL1_BYP 1131 | ||
| 1164 | MX53_PAD_GPIO_7__ESAI1_TX4_RX1 1132 | ||
| 1165 | MX53_PAD_GPIO_7__GPIO1_7 1133 | ||
| 1166 | MX53_PAD_GPIO_7__EPIT1_EPITO 1134 | ||
| 1167 | MX53_PAD_GPIO_7__CAN1_TXCAN 1135 | ||
| 1168 | MX53_PAD_GPIO_7__UART2_TXD_MUX 1136 | ||
| 1169 | MX53_PAD_GPIO_7__FIRI_RXD 1137 | ||
| 1170 | MX53_PAD_GPIO_7__SPDIF_PLOCK 1138 | ||
| 1171 | MX53_PAD_GPIO_7__CCM_PLL2_BYP 1139 | ||
| 1172 | MX53_PAD_GPIO_8__ESAI1_TX5_RX0 1140 | ||
| 1173 | MX53_PAD_GPIO_8__GPIO1_8 1141 | ||
| 1174 | MX53_PAD_GPIO_8__EPIT2_EPITO 1142 | ||
| 1175 | MX53_PAD_GPIO_8__CAN1_RXCAN 1143 | ||
| 1176 | MX53_PAD_GPIO_8__UART2_RXD_MUX 1144 | ||
| 1177 | MX53_PAD_GPIO_8__FIRI_TXD 1145 | ||
| 1178 | MX53_PAD_GPIO_8__SPDIF_SRCLK 1146 | ||
| 1179 | MX53_PAD_GPIO_8__CCM_PLL3_BYP 1147 | ||
| 1180 | MX53_PAD_GPIO_16__ESAI1_TX3_RX2 1148 | ||
| 1181 | MX53_PAD_GPIO_16__GPIO7_11 1149 | ||
| 1182 | MX53_PAD_GPIO_16__TZIC_PWRFAIL_INT 1150 | ||
| 1183 | MX53_PAD_GPIO_16__RTC_CE_RTC_EXT_TRIG1 1151 | ||
| 1184 | MX53_PAD_GPIO_16__SPDIF_IN1 1152 | ||
| 1185 | MX53_PAD_GPIO_16__I2C3_SDA 1153 | ||
| 1186 | MX53_PAD_GPIO_16__SJC_DE_B 1154 | ||
| 1187 | MX53_PAD_GPIO_17__ESAI1_TX0 1155 | ||
| 1188 | MX53_PAD_GPIO_17__GPIO7_12 1156 | ||
| 1189 | MX53_PAD_GPIO_17__SDMA_EXT_EVENT_0 1157 | ||
| 1190 | MX53_PAD_GPIO_17__GPC_PMIC_RDY 1158 | ||
| 1191 | MX53_PAD_GPIO_17__RTC_CE_RTC_FSV_TRIG 1159 | ||
| 1192 | MX53_PAD_GPIO_17__SPDIF_OUT1 1160 | ||
| 1193 | MX53_PAD_GPIO_17__IPU_SNOOP2 1161 | ||
| 1194 | MX53_PAD_GPIO_17__SJC_JTAG_ACT 1162 | ||
| 1195 | MX53_PAD_GPIO_18__ESAI1_TX1 1163 | ||
| 1196 | MX53_PAD_GPIO_18__GPIO7_13 1164 | ||
| 1197 | MX53_PAD_GPIO_18__SDMA_EXT_EVENT_1 1165 | ||
| 1198 | MX53_PAD_GPIO_18__OWIRE_LINE 1166 | ||
| 1199 | MX53_PAD_GPIO_18__RTC_CE_RTC_ALARM2_TRIG 1167 | ||
| 1200 | MX53_PAD_GPIO_18__CCM_ASRC_EXT_CLK 1168 | ||
| 1201 | MX53_PAD_GPIO_18__ESDHC1_LCTL 1169 | ||
| 1202 | MX53_PAD_GPIO_18__SRC_SYSTEM_RST 1170 | ||
| @@ -0,0 +1,1628 @@ | |||
| 1 | * Freescale IMX6Q IOMUX Controller | ||
| 2 | |||
| 3 | Please refer to fsl,imx-pinctrl.txt in this directory for common binding part | ||
| 4 | and usage. | ||
| 5 | |||
| 6 | Required properties: | ||
| 7 | - compatible: "fsl,imx6q-iomuxc" | ||
| 8 | - fsl,pins: two integers array, represents a group of pins mux and config | ||
| 9 | setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a | ||
| 10 | pin working on a specific function, CONFIG is the pad setting value like | ||
| 11 | pull-up for this pin. Please refer to imx6q datasheet for the valid pad | ||
| 12 | config settings. | ||
| 13 | |||
| 14 | CONFIG bits definition: | ||
| 15 | PAD_CTL_HYS (1 << 16) | ||
| 16 | PAD_CTL_PUS_100K_DOWN (0 << 14) | ||
| 17 | PAD_CTL_PUS_47K_UP (1 << 14) | ||
| 18 | PAD_CTL_PUS_100K_UP (2 << 14) | ||
| 19 | PAD_CTL_PUS_22K_UP (3 << 14) | ||
| 20 | PAD_CTL_PUE (1 << 13) | ||
| 21 | PAD_CTL_PKE (1 << 12) | ||
| 22 | PAD_CTL_ODE (1 << 11) | ||
| 23 | PAD_CTL_SPEED_LOW (1 << 6) | ||
| 24 | PAD_CTL_SPEED_MED (2 << 6) | ||
| 25 | PAD_CTL_SPEED_HIGH (3 << 6) | ||
| 26 | PAD_CTL_DSE_DISABLE (0 << 3) | ||
| 27 | PAD_CTL_DSE_240ohm (1 << 3) | ||
| 28 | PAD_CTL_DSE_120ohm (2 << 3) | ||
| 29 | PAD_CTL_DSE_80ohm (3 << 3) | ||
| 30 | PAD_CTL_DSE_60ohm (4 << 3) | ||
| 31 | PAD_CTL_DSE_48ohm (5 << 3) | ||
| 32 | PAD_CTL_DSE_40ohm (6 << 3) | ||
| 33 | PAD_CTL_DSE_34ohm (7 << 3) | ||
| 34 | PAD_CTL_SRE_FAST (1 << 0) | ||
| 35 | PAD_CTL_SRE_SLOW (0 << 0) | ||
| 36 | |||
| 37 | See below for available PIN_FUNC_ID for imx6q: | ||
| 38 | MX6Q_PAD_SD2_DAT1__USDHC2_DAT1 0 | ||
| 39 | MX6Q_PAD_SD2_DAT1__ECSPI5_SS0 1 | ||
| 40 | MX6Q_PAD_SD2_DAT1__WEIM_WEIM_CS_2 2 | ||
| 41 | MX6Q_PAD_SD2_DAT1__AUDMUX_AUD4_TXFS 3 | ||
| 42 | MX6Q_PAD_SD2_DAT1__KPP_COL_7 4 | ||
| 43 | MX6Q_PAD_SD2_DAT1__GPIO_1_14 5 | ||
| 44 | MX6Q_PAD_SD2_DAT1__CCM_WAIT 6 | ||
| 45 | MX6Q_PAD_SD2_DAT1__ANATOP_TESTO_0 7 | ||
| 46 | MX6Q_PAD_SD2_DAT2__USDHC2_DAT2 8 | ||
| 47 | MX6Q_PAD_SD2_DAT2__ECSPI5_SS1 9 | ||
| 48 | MX6Q_PAD_SD2_DAT2__WEIM_WEIM_CS_3 10 | ||
| 49 | MX6Q_PAD_SD2_DAT2__AUDMUX_AUD4_TXD 11 | ||
| 50 | MX6Q_PAD_SD2_DAT2__KPP_ROW_6 12 | ||
| 51 | MX6Q_PAD_SD2_DAT2__GPIO_1_13 13 | ||
| 52 | MX6Q_PAD_SD2_DAT2__CCM_STOP 14 | ||
| 53 | MX6Q_PAD_SD2_DAT2__ANATOP_TESTO_1 15 | ||
| 54 | MX6Q_PAD_SD2_DAT0__USDHC2_DAT0 16 | ||
| 55 | MX6Q_PAD_SD2_DAT0__ECSPI5_MISO 17 | ||
| 56 | MX6Q_PAD_SD2_DAT0__AUDMUX_AUD4_RXD 18 | ||
| 57 | MX6Q_PAD_SD2_DAT0__KPP_ROW_7 19 | ||
| 58 | MX6Q_PAD_SD2_DAT0__GPIO_1_15 20 | ||
| 59 | MX6Q_PAD_SD2_DAT0__DCIC2_DCIC_OUT 21 | ||
| 60 | MX6Q_PAD_SD2_DAT0__TESTO_2 22 | ||
| 61 | MX6Q_PAD_RGMII_TXC__USBOH3_H2_DATA 23 | ||
| 62 | MX6Q_PAD_RGMII_TXC__ENET_RGMII_TXC 24 | ||
| 63 | MX6Q_PAD_RGMII_TXC__SPDIF_SPDIF_EXTCLK 25 | ||
| 64 | MX6Q_PAD_RGMII_TXC__GPIO_6_19 26 | ||
| 65 | MX6Q_PAD_RGMII_TXC__MIPI_CORE_DPHY_IN_0 27 | ||
| 66 | MX6Q_PAD_RGMII_TXC__ANATOP_24M_OUT 28 | ||
| 67 | MX6Q_PAD_RGMII_TD0__MIPI_HSI_CRL_TX_RDY 29 | ||
| 68 | MX6Q_PAD_RGMII_TD0__ENET_RGMII_TD0 30 | ||
| 69 | MX6Q_PAD_RGMII_TD0__GPIO_6_20 31 | ||
| 70 | MX6Q_PAD_RGMII_TD0__MIPI_CORE_DPHY_IN_1 32 | ||
| 71 | MX6Q_PAD_RGMII_TD1__MIPI_HSI_CRL_RX_FLG 33 | ||
| 72 | MX6Q_PAD_RGMII_TD1__ENET_RGMII_TD1 34 | ||
| 73 | MX6Q_PAD_RGMII_TD1__GPIO_6_21 35 | ||
| 74 | MX6Q_PAD_RGMII_TD1__MIPI_CORE_DPHY_IN_2 36 | ||
| 75 | MX6Q_PAD_RGMII_TD1__CCM_PLL3_BYP 37 | ||
| 76 | MX6Q_PAD_RGMII_TD2__MIPI_HSI_CRL_RX_DTA 38 | ||
| 77 | MX6Q_PAD_RGMII_TD2__ENET_RGMII_TD2 39 | ||
| 78 | MX6Q_PAD_RGMII_TD2__GPIO_6_22 40 | ||
| 79 | MX6Q_PAD_RGMII_TD2__MIPI_CORE_DPHY_IN_3 41 | ||
| 80 | MX6Q_PAD_RGMII_TD2__CCM_PLL2_BYP 42 | ||
| 81 | MX6Q_PAD_RGMII_TD3__MIPI_HSI_CRL_RX_WAK 43 | ||
| 82 | MX6Q_PAD_RGMII_TD3__ENET_RGMII_TD3 44 | ||
| 83 | MX6Q_PAD_RGMII_TD3__GPIO_6_23 45 | ||
| 84 | MX6Q_PAD_RGMII_TD3__MIPI_CORE_DPHY_IN_4 46 | ||
| 85 | MX6Q_PAD_RGMII_RX_CTL__USBOH3_H3_DATA 47 | ||
| 86 | MX6Q_PAD_RGMII_RX_CTL__RGMII_RX_CTL 48 | ||
| 87 | MX6Q_PAD_RGMII_RX_CTL__GPIO_6_24 49 | ||
| 88 | MX6Q_PAD_RGMII_RX_CTL__MIPI_DPHY_IN_5 50 | ||
| 89 | MX6Q_PAD_RGMII_RD0__MIPI_HSI_CRL_RX_RDY 51 | ||
| 90 | MX6Q_PAD_RGMII_RD0__ENET_RGMII_RD0 52 | ||
| 91 | MX6Q_PAD_RGMII_RD0__GPIO_6_25 53 | ||
| 92 | MX6Q_PAD_RGMII_RD0__MIPI_CORE_DPHY_IN_6 54 | ||
| 93 | MX6Q_PAD_RGMII_TX_CTL__USBOH3_H2_STROBE 55 | ||
| 94 | MX6Q_PAD_RGMII_TX_CTL__RGMII_TX_CTL 56 | ||
| 95 | MX6Q_PAD_RGMII_TX_CTL__GPIO_6_26 57 | ||
| 96 | MX6Q_PAD_RGMII_TX_CTL__CORE_DPHY_IN_7 58 | ||
| 97 | MX6Q_PAD_RGMII_TX_CTL__ANATOP_REF_OUT 59 | ||
| 98 | MX6Q_PAD_RGMII_RD1__MIPI_HSI_CTRL_TX_FL 60 | ||
| 99 | MX6Q_PAD_RGMII_RD1__ENET_RGMII_RD1 61 | ||
| 100 | MX6Q_PAD_RGMII_RD1__GPIO_6_27 62 | ||
| 101 | MX6Q_PAD_RGMII_RD1__CORE_DPHY_TEST_IN_8 63 | ||
| 102 | MX6Q_PAD_RGMII_RD1__SJC_FAIL 64 | ||
| 103 | MX6Q_PAD_RGMII_RD2__MIPI_HSI_CRL_TX_DTA 65 | ||
| 104 | MX6Q_PAD_RGMII_RD2__ENET_RGMII_RD2 66 | ||
| 105 | MX6Q_PAD_RGMII_RD2__GPIO_6_28 67 | ||
| 106 | MX6Q_PAD_RGMII_RD2__MIPI_CORE_DPHY_IN_9 68 | ||
| 107 | MX6Q_PAD_RGMII_RD3__MIPI_HSI_CRL_TX_WAK 69 | ||
| 108 | MX6Q_PAD_RGMII_RD3__ENET_RGMII_RD3 70 | ||
| 109 | MX6Q_PAD_RGMII_RD3__GPIO_6_29 71 | ||
| 110 | MX6Q_PAD_RGMII_RD3__MIPI_CORE_DPHY_IN10 72 | ||
| 111 | MX6Q_PAD_RGMII_RXC__USBOH3_H3_STROBE 73 | ||
| 112 | MX6Q_PAD_RGMII_RXC__ENET_RGMII_RXC 74 | ||
| 113 | MX6Q_PAD_RGMII_RXC__GPIO_6_30 75 | ||
| 114 | MX6Q_PAD_RGMII_RXC__MIPI_CORE_DPHY_IN11 76 | ||
| 115 | MX6Q_PAD_EIM_A25__WEIM_WEIM_A_25 77 | ||
| 116 | MX6Q_PAD_EIM_A25__ECSPI4_SS1 78 | ||
| 117 | MX6Q_PAD_EIM_A25__ECSPI2_RDY 79 | ||
| 118 | MX6Q_PAD_EIM_A25__IPU1_DI1_PIN12 80 | ||
| 119 | MX6Q_PAD_EIM_A25__IPU1_DI0_D1_CS 81 | ||
| 120 | MX6Q_PAD_EIM_A25__GPIO_5_2 82 | ||
| 121 | MX6Q_PAD_EIM_A25__HDMI_TX_CEC_LINE 83 | ||
| 122 | MX6Q_PAD_EIM_A25__PL301_PER1_HBURST_0 84 | ||
| 123 | MX6Q_PAD_EIM_EB2__WEIM_WEIM_EB_2 85 | ||
| 124 | MX6Q_PAD_EIM_EB2__ECSPI1_SS0 86 | ||
| 125 | MX6Q_PAD_EIM_EB2__CCM_DI1_EXT_CLK 87 | ||
| 126 | MX6Q_PAD_EIM_EB2__IPU2_CSI1_D_19 88 | ||
| 127 | MX6Q_PAD_EIM_EB2__HDMI_TX_DDC_SCL 89 | ||
| 128 | MX6Q_PAD_EIM_EB2__GPIO_2_30 90 | ||
| 129 | MX6Q_PAD_EIM_EB2__I2C2_SCL 91 | ||
| 130 | MX6Q_PAD_EIM_EB2__SRC_BT_CFG_30 92 | ||
| 131 | MX6Q_PAD_EIM_D16__WEIM_WEIM_D_16 93 | ||
| 132 | MX6Q_PAD_EIM_D16__ECSPI1_SCLK 94 | ||
| 133 | MX6Q_PAD_EIM_D16__IPU1_DI0_PIN5 95 | ||
| 134 | MX6Q_PAD_EIM_D16__IPU2_CSI1_D_18 96 | ||
| 135 | MX6Q_PAD_EIM_D16__HDMI_TX_DDC_SDA 97 | ||
| 136 | MX6Q_PAD_EIM_D16__GPIO_3_16 98 | ||
| 137 | MX6Q_PAD_EIM_D16__I2C2_SDA 99 | ||
| 138 | MX6Q_PAD_EIM_D17__WEIM_WEIM_D_17 100 | ||
| 139 | MX6Q_PAD_EIM_D17__ECSPI1_MISO 101 | ||
| 140 | MX6Q_PAD_EIM_D17__IPU1_DI0_PIN6 102 | ||
| 141 | MX6Q_PAD_EIM_D17__IPU2_CSI1_PIXCLK 103 | ||
| 142 | MX6Q_PAD_EIM_D17__DCIC1_DCIC_OUT 104 | ||
| 143 | MX6Q_PAD_EIM_D17__GPIO_3_17 105 | ||
| 144 | MX6Q_PAD_EIM_D17__I2C3_SCL 106 | ||
| 145 | MX6Q_PAD_EIM_D17__PL301_PER1_HBURST_1 107 | ||
| 146 | MX6Q_PAD_EIM_D18__WEIM_WEIM_D_18 108 | ||
| 147 | MX6Q_PAD_EIM_D18__ECSPI1_MOSI 109 | ||
| 148 | MX6Q_PAD_EIM_D18__IPU1_DI0_PIN7 110 | ||
| 149 | MX6Q_PAD_EIM_D18__IPU2_CSI1_D_17 111 | ||
| 150 | MX6Q_PAD_EIM_D18__IPU1_DI1_D0_CS 112 | ||
| 151 | MX6Q_PAD_EIM_D18__GPIO_3_18 113 | ||
| 152 | MX6Q_PAD_EIM_D18__I2C3_SDA 114 | ||
| 153 | MX6Q_PAD_EIM_D18__PL301_PER1_HBURST_2 115 | ||
| 154 | MX6Q_PAD_EIM_D19__WEIM_WEIM_D_19 116 | ||
| 155 | MX6Q_PAD_EIM_D19__ECSPI1_SS1 117 | ||
| 156 | MX6Q_PAD_EIM_D19__IPU1_DI0_PIN8 118 | ||
| 157 | MX6Q_PAD_EIM_D19__IPU2_CSI1_D_16 119 | ||
| 158 | MX6Q_PAD_EIM_D19__UART1_CTS 120 | ||
| 159 | MX6Q_PAD_EIM_D19__GPIO_3_19 121 | ||
| 160 | MX6Q_PAD_EIM_D19__EPIT1_EPITO 122 | ||
| 161 | MX6Q_PAD_EIM_D19__PL301_PER1_HRESP 123 | ||
| 162 | MX6Q_PAD_EIM_D20__WEIM_WEIM_D_20 124 | ||
| 163 | MX6Q_PAD_EIM_D20__ECSPI4_SS0 125 | ||
| 164 | MX6Q_PAD_EIM_D20__IPU1_DI0_PIN16 126 | ||
| 165 | MX6Q_PAD_EIM_D20__IPU2_CSI1_D_15 127 | ||
| 166 | MX6Q_PAD_EIM_D20__UART1_RTS 128 | ||
| 167 | MX6Q_PAD_EIM_D20__GPIO_3_20 129 | ||
| 168 | MX6Q_PAD_EIM_D20__EPIT2_EPITO 130 | ||
| 169 | MX6Q_PAD_EIM_D21__WEIM_WEIM_D_21 131 | ||
| 170 | MX6Q_PAD_EIM_D21__ECSPI4_SCLK 132 | ||
| 171 | MX6Q_PAD_EIM_D21__IPU1_DI0_PIN17 133 | ||
| 172 | MX6Q_PAD_EIM_D21__IPU2_CSI1_D_11 134 | ||
| 173 | MX6Q_PAD_EIM_D21__USBOH3_USBOTG_OC 135 | ||
| 174 | MX6Q_PAD_EIM_D21__GPIO_3_21 136 | ||
| 175 | MX6Q_PAD_EIM_D21__I2C1_SCL 137 | ||
| 176 | MX6Q_PAD_EIM_D21__SPDIF_IN1 138 | ||
| 177 | MX6Q_PAD_EIM_D22__WEIM_WEIM_D_22 139 | ||
| 178 | MX6Q_PAD_EIM_D22__ECSPI4_MISO 140 | ||
| 179 | MX6Q_PAD_EIM_D22__IPU1_DI0_PIN1 141 | ||
| 180 | MX6Q_PAD_EIM_D22__IPU2_CSI1_D_10 142 | ||
| 181 | MX6Q_PAD_EIM_D22__USBOH3_USBOTG_PWR 143 | ||
| 182 | MX6Q_PAD_EIM_D22__GPIO_3_22 144 | ||
| 183 | MX6Q_PAD_EIM_D22__SPDIF_OUT1 145 | ||
| 184 | MX6Q_PAD_EIM_D22__PL301_PER1_HWRITE 146 | ||
| 185 | MX6Q_PAD_EIM_D23__WEIM_WEIM_D_23 147 | ||
| 186 | MX6Q_PAD_EIM_D23__IPU1_DI0_D0_CS 148 | ||
| 187 | MX6Q_PAD_EIM_D23__UART3_CTS 149 | ||
| 188 | MX6Q_PAD_EIM_D23__UART1_DCD 150 | ||
| 189 | MX6Q_PAD_EIM_D23__IPU2_CSI1_DATA_EN 151 | ||
| 190 | MX6Q_PAD_EIM_D23__GPIO_3_23 152 | ||
| 191 | MX6Q_PAD_EIM_D23__IPU1_DI1_PIN2 153 | ||
| 192 | MX6Q_PAD_EIM_D23__IPU1_DI1_PIN14 154 | ||
| 193 | MX6Q_PAD_EIM_EB3__WEIM_WEIM_EB_3 155 | ||
| 194 | MX6Q_PAD_EIM_EB3__ECSPI4_RDY 156 | ||
| 195 | MX6Q_PAD_EIM_EB3__UART3_RTS 157 | ||
| 196 | MX6Q_PAD_EIM_EB3__UART1_RI 158 | ||
| 197 | MX6Q_PAD_EIM_EB3__IPU2_CSI1_HSYNC 159 | ||
| 198 | MX6Q_PAD_EIM_EB3__GPIO_2_31 160 | ||
| 199 | MX6Q_PAD_EIM_EB3__IPU1_DI1_PIN3 161 | ||
| 200 | MX6Q_PAD_EIM_EB3__SRC_BT_CFG_31 162 | ||
| 201 | MX6Q_PAD_EIM_D24__WEIM_WEIM_D_24 163 | ||
| 202 | MX6Q_PAD_EIM_D24__ECSPI4_SS2 164 | ||
| 203 | MX6Q_PAD_EIM_D24__UART3_TXD 165 | ||
| 204 | MX6Q_PAD_EIM_D24__ECSPI1_SS2 166 | ||
| 205 | MX6Q_PAD_EIM_D24__ECSPI2_SS2 167 | ||
| 206 | MX6Q_PAD_EIM_D24__GPIO_3_24 168 | ||
| 207 | MX6Q_PAD_EIM_D24__AUDMUX_AUD5_RXFS 169 | ||
| 208 | MX6Q_PAD_EIM_D24__UART1_DTR 170 | ||
| 209 | MX6Q_PAD_EIM_D25__WEIM_WEIM_D_25 171 | ||
| 210 | MX6Q_PAD_EIM_D25__ECSPI4_SS3 172 | ||
| 211 | MX6Q_PAD_EIM_D25__UART3_RXD 173 | ||
| 212 | MX6Q_PAD_EIM_D25__ECSPI1_SS3 174 | ||
| 213 | MX6Q_PAD_EIM_D25__ECSPI2_SS3 175 | ||
| 214 | MX6Q_PAD_EIM_D25__GPIO_3_25 176 | ||
| 215 | MX6Q_PAD_EIM_D25__AUDMUX_AUD5_RXC 177 | ||
| 216 | MX6Q_PAD_EIM_D25__UART1_DSR 178 | ||
| 217 | MX6Q_PAD_EIM_D26__WEIM_WEIM_D_26 179 | ||
| 218 | MX6Q_PAD_EIM_D26__IPU1_DI1_PIN11 180 | ||
| 219 | MX6Q_PAD_EIM_D26__IPU1_CSI0_D_1 181 | ||
| 220 | MX6Q_PAD_EIM_D26__IPU2_CSI1_D_14 182 | ||
| 221 | MX6Q_PAD_EIM_D26__UART2_TXD 183 | ||
| 222 | MX6Q_PAD_EIM_D26__GPIO_3_26 184 | ||
| 223 | MX6Q_PAD_EIM_D26__IPU1_SISG_2 185 | ||
| 224 | MX6Q_PAD_EIM_D26__IPU1_DISP1_DAT_22 186 | ||
| 225 | MX6Q_PAD_EIM_D27__WEIM_WEIM_D_27 187 | ||
| 226 | MX6Q_PAD_EIM_D27__IPU1_DI1_PIN13 188 | ||
| 227 | MX6Q_PAD_EIM_D27__IPU1_CSI0_D_0 189 | ||
| 228 | MX6Q_PAD_EIM_D27__IPU2_CSI1_D_13 190 | ||
| 229 | MX6Q_PAD_EIM_D27__UART2_RXD 191 | ||
| 230 | MX6Q_PAD_EIM_D27__GPIO_3_27 192 | ||
| 231 | MX6Q_PAD_EIM_D27__IPU1_SISG_3 193 | ||
| 232 | MX6Q_PAD_EIM_D27__IPU1_DISP1_DAT_23 194 | ||
| 233 | MX6Q_PAD_EIM_D28__WEIM_WEIM_D_28 195 | ||
| 234 | MX6Q_PAD_EIM_D28__I2C1_SDA 196 | ||
| 235 | MX6Q_PAD_EIM_D28__ECSPI4_MOSI 197 | ||
| 236 | MX6Q_PAD_EIM_D28__IPU2_CSI1_D_12 198 | ||
| 237 | MX6Q_PAD_EIM_D28__UART2_CTS 199 | ||
| 238 | MX6Q_PAD_EIM_D28__GPIO_3_28 200 | ||
| 239 | MX6Q_PAD_EIM_D28__IPU1_EXT_TRIG 201 | ||
| 240 | MX6Q_PAD_EIM_D28__IPU1_DI0_PIN13 202 | ||
| 241 | MX6Q_PAD_EIM_D29__WEIM_WEIM_D_29 203 | ||
| 242 | MX6Q_PAD_EIM_D29__IPU1_DI1_PIN15 204 | ||
| 243 | MX6Q_PAD_EIM_D29__ECSPI4_SS0 205 | ||
| 244 | MX6Q_PAD_EIM_D29__UART2_RTS 206 | ||
| 245 | MX6Q_PAD_EIM_D29__GPIO_3_29 207 | ||
| 246 | MX6Q_PAD_EIM_D29__IPU2_CSI1_VSYNC 208 | ||
| 247 | MX6Q_PAD_EIM_D29__IPU1_DI0_PIN14 209 | ||
| 248 | MX6Q_PAD_EIM_D30__WEIM_WEIM_D_30 210 | ||
| 249 | MX6Q_PAD_EIM_D30__IPU1_DISP1_DAT_21 211 | ||
| 250 | MX6Q_PAD_EIM_D30__IPU1_DI0_PIN11 212 | ||
| 251 | MX6Q_PAD_EIM_D30__IPU1_CSI0_D_3 213 | ||
| 252 | MX6Q_PAD_EIM_D30__UART3_CTS 214 | ||
| 253 | MX6Q_PAD_EIM_D30__GPIO_3_30 215 | ||
| 254 | MX6Q_PAD_EIM_D30__USBOH3_USBH1_OC 216 | ||
| 255 | MX6Q_PAD_EIM_D30__PL301_PER1_HPROT_0 217 | ||
| 256 | MX6Q_PAD_EIM_D31__WEIM_WEIM_D_31 218 | ||
| 257 | MX6Q_PAD_EIM_D31__IPU1_DISP1_DAT_20 219 | ||
| 258 | MX6Q_PAD_EIM_D31__IPU1_DI0_PIN12 220 | ||
| 259 | MX6Q_PAD_EIM_D31__IPU1_CSI0_D_2 221 | ||
| 260 | MX6Q_PAD_EIM_D31__UART3_RTS 222 | ||
| 261 | MX6Q_PAD_EIM_D31__GPIO_3_31 223 | ||
| 262 | MX6Q_PAD_EIM_D31__USBOH3_USBH1_PWR 224 | ||
| 263 | MX6Q_PAD_EIM_D31__PL301_PER1_HPROT_1 225 | ||
| 264 | MX6Q_PAD_EIM_A24__WEIM_WEIM_A_24 226 | ||
| 265 | MX6Q_PAD_EIM_A24__IPU1_DISP1_DAT_19 227 | ||
| 266 | MX6Q_PAD_EIM_A24__IPU2_CSI1_D_19 228 | ||
| 267 | MX6Q_PAD_EIM_A24__IPU2_SISG_2 229 | ||
| 268 | MX6Q_PAD_EIM_A24__IPU1_SISG_2 230 | ||
| 269 | MX6Q_PAD_EIM_A24__GPIO_5_4 231 | ||
| 270 | MX6Q_PAD_EIM_A24__PL301_PER1_HPROT_2 232 | ||
| 271 | MX6Q_PAD_EIM_A24__SRC_BT_CFG_24 233 | ||
| 272 | MX6Q_PAD_EIM_A23__WEIM_WEIM_A_23 234 | ||
| 273 | MX6Q_PAD_EIM_A23__IPU1_DISP1_DAT_18 235 | ||
| 274 | MX6Q_PAD_EIM_A23__IPU2_CSI1_D_18 236 | ||
| 275 | MX6Q_PAD_EIM_A23__IPU2_SISG_3 237 | ||
| 276 | MX6Q_PAD_EIM_A23__IPU1_SISG_3 238 | ||
| 277 | MX6Q_PAD_EIM_A23__GPIO_6_6 239 | ||
| 278 | MX6Q_PAD_EIM_A23__PL301_PER1_HPROT_3 240 | ||
| 279 | MX6Q_PAD_EIM_A23__SRC_BT_CFG_23 241 | ||
| 280 | MX6Q_PAD_EIM_A22__WEIM_WEIM_A_22 242 | ||
| 281 | MX6Q_PAD_EIM_A22__IPU1_DISP1_DAT_17 243 | ||
| 282 | MX6Q_PAD_EIM_A22__IPU2_CSI1_D_17 244 | ||
| 283 | MX6Q_PAD_EIM_A22__GPIO_2_16 245 | ||
| 284 | MX6Q_PAD_EIM_A22__TPSMP_HDATA_0 246 | ||
| 285 | MX6Q_PAD_EIM_A22__SRC_BT_CFG_22 247 | ||
| 286 | MX6Q_PAD_EIM_A21__WEIM_WEIM_A_21 248 | ||
| 287 | MX6Q_PAD_EIM_A21__IPU1_DISP1_DAT_16 249 | ||
| 288 | MX6Q_PAD_EIM_A21__IPU2_CSI1_D_16 250 | ||
| 289 | MX6Q_PAD_EIM_A21__RESERVED_RESERVED 251 | ||
| 290 | MX6Q_PAD_EIM_A21__MIPI_CORE_DPHY_OUT_18 252 | ||
| 291 | MX6Q_PAD_EIM_A21__GPIO_2_17 253 | ||
| 292 | MX6Q_PAD_EIM_A21__TPSMP_HDATA_1 254 | ||
| 293 | MX6Q_PAD_EIM_A21__SRC_BT_CFG_21 255 | ||
| 294 | MX6Q_PAD_EIM_A20__WEIM_WEIM_A_20 256 | ||
| 295 | MX6Q_PAD_EIM_A20__IPU1_DISP1_DAT_15 257 | ||
| 296 | MX6Q_PAD_EIM_A20__IPU2_CSI1_D_15 258 | ||
| 297 | MX6Q_PAD_EIM_A20__RESERVED_RESERVED 259 | ||
| 298 | MX6Q_PAD_EIM_A20__MIPI_CORE_DPHY_OUT_19 260 | ||
| 299 | MX6Q_PAD_EIM_A20__GPIO_2_18 261 | ||
| 300 | MX6Q_PAD_EIM_A20__TPSMP_HDATA_2 262 | ||
| 301 | MX6Q_PAD_EIM_A20__SRC_BT_CFG_20 263 | ||
| 302 | MX6Q_PAD_EIM_A19__WEIM_WEIM_A_19 264 | ||
| 303 | MX6Q_PAD_EIM_A19__IPU1_DISP1_DAT_14 265 | ||
| 304 | MX6Q_PAD_EIM_A19__IPU2_CSI1_D_14 266 | ||
| 305 | MX6Q_PAD_EIM_A19__RESERVED_RESERVED 267 | ||
| 306 | MX6Q_PAD_EIM_A19__MIPI_CORE_DPHY_OUT_20 268 | ||
| 307 | MX6Q_PAD_EIM_A19__GPIO_2_19 269 | ||
| 308 | MX6Q_PAD_EIM_A19__TPSMP_HDATA_3 270 | ||
| 309 | MX6Q_PAD_EIM_A19__SRC_BT_CFG_19 271 | ||
| 310 | MX6Q_PAD_EIM_A18__WEIM_WEIM_A_18 272 | ||
| 311 | MX6Q_PAD_EIM_A18__IPU1_DISP1_DAT_13 273 | ||
| 312 | MX6Q_PAD_EIM_A18__IPU2_CSI1_D_13 274 | ||
| 313 | MX6Q_PAD_EIM_A18__RESERVED_RESERVED 275 | ||
| 314 | MX6Q_PAD_EIM_A18__MIPI_CORE_DPHY_OUT_21 276 | ||
| 315 | MX6Q_PAD_EIM_A18__GPIO_2_20 277 | ||
| 316 | MX6Q_PAD_EIM_A18__TPSMP_HDATA_4 278 | ||
| 317 | MX6Q_PAD_EIM_A18__SRC_BT_CFG_18 279 | ||
| 318 | MX6Q_PAD_EIM_A17__WEIM_WEIM_A_17 280 | ||
| 319 | MX6Q_PAD_EIM_A17__IPU1_DISP1_DAT_12 281 | ||
| 320 | MX6Q_PAD_EIM_A17__IPU2_CSI1_D_12 282 | ||
| 321 | MX6Q_PAD_EIM_A17__RESERVED_RESERVED 283 | ||
| 322 | MX6Q_PAD_EIM_A17__MIPI_CORE_DPHY_OUT_22 284 | ||
| 323 | MX6Q_PAD_EIM_A17__GPIO_2_21 285 | ||
| 324 | MX6Q_PAD_EIM_A17__TPSMP_HDATA_5 286 | ||
| 325 | MX6Q_PAD_EIM_A17__SRC_BT_CFG_17 287 | ||
| 326 | MX6Q_PAD_EIM_A16__WEIM_WEIM_A_16 288 | ||
| 327 | MX6Q_PAD_EIM_A16__IPU1_DI1_DISP_CLK 289 | ||
| 328 | MX6Q_PAD_EIM_A16__IPU2_CSI1_PIXCLK 290 | ||
| 329 | MX6Q_PAD_EIM_A16__MIPI_CORE_DPHY_OUT_23 291 | ||
| 330 | MX6Q_PAD_EIM_A16__GPIO_2_22 292 | ||
| 331 | MX6Q_PAD_EIM_A16__TPSMP_HDATA_6 293 | ||
| 332 | MX6Q_PAD_EIM_A16__SRC_BT_CFG_16 294 | ||
| 333 | MX6Q_PAD_EIM_CS0__WEIM_WEIM_CS_0 295 | ||
| 334 | MX6Q_PAD_EIM_CS0__IPU1_DI1_PIN5 296 | ||
| 335 | MX6Q_PAD_EIM_CS0__ECSPI2_SCLK 297 | ||
| 336 | MX6Q_PAD_EIM_CS0__MIPI_CORE_DPHY_OUT_24 298 | ||
| 337 | MX6Q_PAD_EIM_CS0__GPIO_2_23 299 | ||
| 338 | MX6Q_PAD_EIM_CS0__TPSMP_HDATA_7 300 | ||
| 339 | MX6Q_PAD_EIM_CS1__WEIM_WEIM_CS_1 301 | ||
| 340 | MX6Q_PAD_EIM_CS1__IPU1_DI1_PIN6 302 | ||
| 341 | MX6Q_PAD_EIM_CS1__ECSPI2_MOSI 303 | ||
| 342 | MX6Q_PAD_EIM_CS1__MIPI_CORE_DPHY_OUT_25 304 | ||
| 343 | MX6Q_PAD_EIM_CS1__GPIO_2_24 305 | ||
| 344 | MX6Q_PAD_EIM_CS1__TPSMP_HDATA_8 306 | ||
| 345 | MX6Q_PAD_EIM_OE__WEIM_WEIM_OE 307 | ||
| 346 | MX6Q_PAD_EIM_OE__IPU1_DI1_PIN7 308 | ||
| 347 | MX6Q_PAD_EIM_OE__ECSPI2_MISO 309 | ||
| 348 | MX6Q_PAD_EIM_OE__MIPI_CORE_DPHY_OUT_26 310 | ||
| 349 | MX6Q_PAD_EIM_OE__GPIO_2_25 311 | ||
| 350 | MX6Q_PAD_EIM_OE__TPSMP_HDATA_9 312 | ||
| 351 | MX6Q_PAD_EIM_RW__WEIM_WEIM_RW 313 | ||
| 352 | MX6Q_PAD_EIM_RW__IPU1_DI1_PIN8 314 | ||
| 353 | MX6Q_PAD_EIM_RW__ECSPI2_SS0 315 | ||
| 354 | MX6Q_PAD_EIM_RW__MIPI_CORE_DPHY_OUT_27 316 | ||
| 355 | MX6Q_PAD_EIM_RW__GPIO_2_26 317 | ||
| 356 | MX6Q_PAD_EIM_RW__TPSMP_HDATA_10 318 | ||
| 357 | MX6Q_PAD_EIM_RW__SRC_BT_CFG_29 319 | ||
| 358 | MX6Q_PAD_EIM_LBA__WEIM_WEIM_LBA 320 | ||
| 359 | MX6Q_PAD_EIM_LBA__IPU1_DI1_PIN17 321 | ||
| 360 | MX6Q_PAD_EIM_LBA__ECSPI2_SS1 322 | ||
| 361 | MX6Q_PAD_EIM_LBA__GPIO_2_27 323 | ||
| 362 | MX6Q_PAD_EIM_LBA__TPSMP_HDATA_11 324 | ||
| 363 | MX6Q_PAD_EIM_LBA__SRC_BT_CFG_26 325 | ||
| 364 | MX6Q_PAD_EIM_EB0__WEIM_WEIM_EB_0 326 | ||
| 365 | MX6Q_PAD_EIM_EB0__IPU1_DISP1_DAT_11 327 | ||
| 366 | MX6Q_PAD_EIM_EB0__IPU2_CSI1_D_11 328 | ||
| 367 | MX6Q_PAD_EIM_EB0__MIPI_CORE_DPHY_OUT_0 329 | ||
| 368 | MX6Q_PAD_EIM_EB0__CCM_PMIC_RDY 330 | ||
| 369 | MX6Q_PAD_EIM_EB0__GPIO_2_28 331 | ||
| 370 | MX6Q_PAD_EIM_EB0__TPSMP_HDATA_12 332 | ||
| 371 | MX6Q_PAD_EIM_EB0__SRC_BT_CFG_27 333 | ||
| 372 | MX6Q_PAD_EIM_EB1__WEIM_WEIM_EB_1 334 | ||
| 373 | MX6Q_PAD_EIM_EB1__IPU1_DISP1_DAT_10 335 | ||
| 374 | MX6Q_PAD_EIM_EB1__IPU2_CSI1_D_10 336 | ||
| 375 | MX6Q_PAD_EIM_EB1__MIPI_CORE_DPHY__OUT_1 337 | ||
| 376 | MX6Q_PAD_EIM_EB1__GPIO_2_29 338 | ||
| 377 | MX6Q_PAD_EIM_EB1__TPSMP_HDATA_13 339 | ||
| 378 | MX6Q_PAD_EIM_EB1__SRC_BT_CFG_28 340 | ||
| 379 | MX6Q_PAD_EIM_DA0__WEIM_WEIM_DA_A_0 341 | ||
| 380 | MX6Q_PAD_EIM_DA0__IPU1_DISP1_DAT_9 342 | ||
| 381 | MX6Q_PAD_EIM_DA0__IPU2_CSI1_D_9 343 | ||
| 382 | MX6Q_PAD_EIM_DA0__MIPI_CORE_DPHY__OUT_2 344 | ||
| 383 | MX6Q_PAD_EIM_DA0__GPIO_3_0 345 | ||
| 384 | MX6Q_PAD_EIM_DA0__TPSMP_HDATA_14 346 | ||
| 385 | MX6Q_PAD_EIM_DA0__SRC_BT_CFG_0 347 | ||
| 386 | MX6Q_PAD_EIM_DA1__WEIM_WEIM_DA_A_1 348 | ||
| 387 | MX6Q_PAD_EIM_DA1__IPU1_DISP1_DAT_8 349 | ||
| 388 | MX6Q_PAD_EIM_DA1__IPU2_CSI1_D_8 350 | ||
| 389 | MX6Q_PAD_EIM_DA1__MIPI_CORE_DPHY_OUT_3 351 | ||
| 390 | MX6Q_PAD_EIM_DA1__USBPHY1_TX_LS_MODE 352 | ||
| 391 | MX6Q_PAD_EIM_DA1__GPIO_3_1 353 | ||
| 392 | MX6Q_PAD_EIM_DA1__TPSMP_HDATA_15 354 | ||
| 393 | MX6Q_PAD_EIM_DA1__SRC_BT_CFG_1 355 | ||
| 394 | MX6Q_PAD_EIM_DA2__WEIM_WEIM_DA_A_2 356 | ||
| 395 | MX6Q_PAD_EIM_DA2__IPU1_DISP1_DAT_7 357 | ||
| 396 | MX6Q_PAD_EIM_DA2__IPU2_CSI1_D_7 358 | ||
| 397 | MX6Q_PAD_EIM_DA2__MIPI_CORE_DPHY_OUT_4 359 | ||
| 398 | MX6Q_PAD_EIM_DA2__USBPHY1_TX_HS_MODE 360 | ||
| 399 | MX6Q_PAD_EIM_DA2__GPIO_3_2 361 | ||
| 400 | MX6Q_PAD_EIM_DA2__TPSMP_HDATA_16 362 | ||
| 401 | MX6Q_PAD_EIM_DA2__SRC_BT_CFG_2 363 | ||
| 402 | MX6Q_PAD_EIM_DA3__WEIM_WEIM_DA_A_3 364 | ||
| 403 | MX6Q_PAD_EIM_DA3__IPU1_DISP1_DAT_6 365 | ||
| 404 | MX6Q_PAD_EIM_DA3__IPU2_CSI1_D_6 366 | ||
| 405 | MX6Q_PAD_EIM_DA3__MIPI_CORE_DPHY_OUT_5 367 | ||
| 406 | MX6Q_PAD_EIM_DA3__USBPHY1_TX_HIZ 368 | ||
| 407 | MX6Q_PAD_EIM_DA3__GPIO_3_3 369 | ||
| 408 | MX6Q_PAD_EIM_DA3__TPSMP_HDATA_17 370 | ||
| 409 | MX6Q_PAD_EIM_DA3__SRC_BT_CFG_3 371 | ||
| 410 | MX6Q_PAD_EIM_DA4__WEIM_WEIM_DA_A_4 372 | ||
| 411 | MX6Q_PAD_EIM_DA4__IPU1_DISP1_DAT_5 373 | ||
| 412 | MX6Q_PAD_EIM_DA4__IPU2_CSI1_D_5 374 | ||
| 413 | MX6Q_PAD_EIM_DA4__MIPI_CORE_DPHY_OUT_6 375 | ||
| 414 | MX6Q_PAD_EIM_DA4__ANATOP_USBPHY1_TX_EN 376 | ||
| 415 | MX6Q_PAD_EIM_DA4__GPIO_3_4 377 | ||
| 416 | MX6Q_PAD_EIM_DA4__TPSMP_HDATA_18 378 | ||
| 417 | MX6Q_PAD_EIM_DA4__SRC_BT_CFG_4 379 | ||
| 418 | MX6Q_PAD_EIM_DA5__WEIM_WEIM_DA_A_5 380 | ||
| 419 | MX6Q_PAD_EIM_DA5__IPU1_DISP1_DAT_4 381 | ||
| 420 | MX6Q_PAD_EIM_DA5__IPU2_CSI1_D_4 382 | ||
| 421 | MX6Q_PAD_EIM_DA5__MIPI_CORE_DPHY_OUT_7 383 | ||
| 422 | MX6Q_PAD_EIM_DA5__ANATOP_USBPHY1_TX_DP 384 | ||
| 423 | MX6Q_PAD_EIM_DA5__GPIO_3_5 385 | ||
| 424 | MX6Q_PAD_EIM_DA5__TPSMP_HDATA_19 386 | ||
| 425 | MX6Q_PAD_EIM_DA5__SRC_BT_CFG_5 387 | ||
| 426 | MX6Q_PAD_EIM_DA6__WEIM_WEIM_DA_A_6 388 | ||
| 427 | MX6Q_PAD_EIM_DA6__IPU1_DISP1_DAT_3 389 | ||
| 428 | MX6Q_PAD_EIM_DA6__IPU2_CSI1_D_3 390 | ||
| 429 | MX6Q_PAD_EIM_DA6__MIPI_CORE_DPHY_OUT_8 391 | ||
| 430 | MX6Q_PAD_EIM_DA6__ANATOP_USBPHY1_TX_DN 392 | ||
| 431 | MX6Q_PAD_EIM_DA6__GPIO_3_6 393 | ||
| 432 | MX6Q_PAD_EIM_DA6__TPSMP_HDATA_20 394 | ||
| 433 | MX6Q_PAD_EIM_DA6__SRC_BT_CFG_6 395 | ||
| 434 | MX6Q_PAD_EIM_DA7__WEIM_WEIM_DA_A_7 396 | ||
| 435 | MX6Q_PAD_EIM_DA7__IPU1_DISP1_DAT_2 397 | ||
| 436 | MX6Q_PAD_EIM_DA7__IPU2_CSI1_D_2 398 | ||
| 437 | MX6Q_PAD_EIM_DA7__MIPI_CORE_DPHY_OUT_9 399 | ||
| 438 | MX6Q_PAD_EIM_DA7__GPIO_3_7 400 | ||
| 439 | MX6Q_PAD_EIM_DA7__TPSMP_HDATA_21 401 | ||
| 440 | MX6Q_PAD_EIM_DA7__SRC_BT_CFG_7 402 | ||
| 441 | MX6Q_PAD_EIM_DA8__WEIM_WEIM_DA_A_8 403 | ||
| 442 | MX6Q_PAD_EIM_DA8__IPU1_DISP1_DAT_1 404 | ||
| 443 | MX6Q_PAD_EIM_DA8__IPU2_CSI1_D_1 405 | ||
| 444 | MX6Q_PAD_EIM_DA8__MIPI_CORE_DPHY_OUT_10 406 | ||
| 445 | MX6Q_PAD_EIM_DA8__GPIO_3_8 407 | ||
| 446 | MX6Q_PAD_EIM_DA8__TPSMP_HDATA_22 408 | ||
| 447 | MX6Q_PAD_EIM_DA8__SRC_BT_CFG_8 409 | ||
| 448 | MX6Q_PAD_EIM_DA9__WEIM_WEIM_DA_A_9 410 | ||
| 449 | MX6Q_PAD_EIM_DA9__IPU1_DISP1_DAT_0 411 | ||
| 450 | MX6Q_PAD_EIM_DA9__IPU2_CSI1_D_0 412 | ||
| 451 | MX6Q_PAD_EIM_DA9__MIPI_CORE_DPHY_OUT_11 413 | ||
| 452 | MX6Q_PAD_EIM_DA9__GPIO_3_9 414 | ||
| 453 | MX6Q_PAD_EIM_DA9__TPSMP_HDATA_23 415 | ||
| 454 | MX6Q_PAD_EIM_DA9__SRC_BT_CFG_9 416 | ||
| 455 | MX6Q_PAD_EIM_DA10__WEIM_WEIM_DA_A_10 417 | ||
| 456 | MX6Q_PAD_EIM_DA10__IPU1_DI1_PIN15 418 | ||
| 457 | MX6Q_PAD_EIM_DA10__IPU2_CSI1_DATA_EN 419 | ||
| 458 | MX6Q_PAD_EIM_DA10__MIPI_CORE_DPHY_OUT12 420 | ||
| 459 | MX6Q_PAD_EIM_DA10__GPIO_3_10 421 | ||
| 460 | MX6Q_PAD_EIM_DA10__TPSMP_HDATA_24 422 | ||
| 461 | MX6Q_PAD_EIM_DA10__SRC_BT_CFG_10 423 | ||
| 462 | MX6Q_PAD_EIM_DA11__WEIM_WEIM_DA_A_11 424 | ||
| 463 | MX6Q_PAD_EIM_DA11__IPU1_DI1_PIN2 425 | ||
| 464 | MX6Q_PAD_EIM_DA11__IPU2_CSI1_HSYNC 426 | ||
| 465 | MX6Q_PAD_EIM_DA11__MIPI_CORE_DPHY_OUT13 427 | ||
| 466 | MX6Q_PAD_EIM_DA11__SDMA_DBG_EVT_CHN_6 428 | ||
| 467 | MX6Q_PAD_EIM_DA11__GPIO_3_11 429 | ||
| 468 | MX6Q_PAD_EIM_DA11__TPSMP_HDATA_25 430 | ||
| 469 | MX6Q_PAD_EIM_DA11__SRC_BT_CFG_11 431 | ||
| 470 | MX6Q_PAD_EIM_DA12__WEIM_WEIM_DA_A_12 432 | ||
| 471 | MX6Q_PAD_EIM_DA12__IPU1_DI1_PIN3 433 | ||
| 472 | MX6Q_PAD_EIM_DA12__IPU2_CSI1_VSYNC 434 | ||
| 473 | MX6Q_PAD_EIM_DA12__MIPI_CORE_DPHY_OUT14 435 | ||
| 474 | MX6Q_PAD_EIM_DA12__SDMA_DEBUG_EVT_CHN_3 436 | ||
| 475 | MX6Q_PAD_EIM_DA12__GPIO_3_12 437 | ||
| 476 | MX6Q_PAD_EIM_DA12__TPSMP_HDATA_26 438 | ||
| 477 | MX6Q_PAD_EIM_DA12__SRC_BT_CFG_12 439 | ||
| 478 | MX6Q_PAD_EIM_DA13__WEIM_WEIM_DA_A_13 440 | ||
| 479 | MX6Q_PAD_EIM_DA13__IPU1_DI1_D0_CS 441 | ||
| 480 | MX6Q_PAD_EIM_DA13__CCM_DI1_EXT_CLK 442 | ||
| 481 | MX6Q_PAD_EIM_DA13__MIPI_CORE_DPHY_OUT15 443 | ||
| 482 | MX6Q_PAD_EIM_DA13__SDMA_DEBUG_EVT_CHN_4 444 | ||
| 483 | MX6Q_PAD_EIM_DA13__GPIO_3_13 445 | ||
| 484 | MX6Q_PAD_EIM_DA13__TPSMP_HDATA_27 446 | ||
| 485 | MX6Q_PAD_EIM_DA13__SRC_BT_CFG_13 447 | ||
| 486 | MX6Q_PAD_EIM_DA14__WEIM_WEIM_DA_A_14 448 | ||
| 487 | MX6Q_PAD_EIM_DA14__IPU1_DI1_D1_CS 449 | ||
| 488 | MX6Q_PAD_EIM_DA14__CCM_DI0_EXT_CLK 450 | ||
| 489 | MX6Q_PAD_EIM_DA14__MIPI_CORE_DPHY_OUT16 451 | ||
| 490 | MX6Q_PAD_EIM_DA14__SDMA_DEBUG_EVT_CHN_5 452 | ||
| 491 | MX6Q_PAD_EIM_DA14__GPIO_3_14 453 | ||
| 492 | MX6Q_PAD_EIM_DA14__TPSMP_HDATA_28 454 | ||
| 493 | MX6Q_PAD_EIM_DA14__SRC_BT_CFG_14 455 | ||
| 494 | MX6Q_PAD_EIM_DA15__WEIM_WEIM_DA_A_15 456 | ||
| 495 | MX6Q_PAD_EIM_DA15__IPU1_DI1_PIN1 457 | ||
| 496 | MX6Q_PAD_EIM_DA15__IPU1_DI1_PIN4 458 | ||
| 497 | MX6Q_PAD_EIM_DA15__MIPI_CORE_DPHY_OUT17 459 | ||
| 498 | MX6Q_PAD_EIM_DA15__GPIO_3_15 460 | ||
| 499 | MX6Q_PAD_EIM_DA15__TPSMP_HDATA_29 461 | ||
| 500 | MX6Q_PAD_EIM_DA15__SRC_BT_CFG_15 462 | ||
| 501 | MX6Q_PAD_EIM_WAIT__WEIM_WEIM_WAIT 463 | ||
| 502 | MX6Q_PAD_EIM_WAIT__WEIM_WEIM_DTACK_B 464 | ||
| 503 | MX6Q_PAD_EIM_WAIT__GPIO_5_0 465 | ||
| 504 | MX6Q_PAD_EIM_WAIT__TPSMP_HDATA_30 466 | ||
| 505 | MX6Q_PAD_EIM_WAIT__SRC_BT_CFG_25 467 | ||
| 506 | MX6Q_PAD_EIM_BCLK__WEIM_WEIM_BCLK 468 | ||
| 507 | MX6Q_PAD_EIM_BCLK__IPU1_DI1_PIN16 469 | ||
| 508 | MX6Q_PAD_EIM_BCLK__GPIO_6_31 470 | ||
| 509 | MX6Q_PAD_EIM_BCLK__TPSMP_HDATA_31 471 | ||
| 510 | MX6Q_PAD_DI0_DISP_CLK__IPU1_DI0_DSP_CLK 472 | ||
| 511 | MX6Q_PAD_DI0_DISP_CLK__IPU2_DI0_DSP_CLK 473 | ||
| 512 | MX6Q_PAD_DI0_DISP_CLK__MIPI_CR_DPY_OT28 474 | ||
| 513 | MX6Q_PAD_DI0_DISP_CLK__SDMA_DBG_CR_STA0 475 | ||
| 514 | MX6Q_PAD_DI0_DISP_CLK__GPIO_4_16 476 | ||
| 515 | MX6Q_PAD_DI0_DISP_CLK__MMDC_DEBUG_0 477 | ||
| 516 | MX6Q_PAD_DI0_PIN15__IPU1_DI0_PIN15 478 | ||
| 517 | MX6Q_PAD_DI0_PIN15__IPU2_DI0_PIN15 479 | ||
| 518 | MX6Q_PAD_DI0_PIN15__AUDMUX_AUD6_TXC 480 | ||
| 519 | MX6Q_PAD_DI0_PIN15__MIPI_CR_DPHY_OUT_29 481 | ||
| 520 | MX6Q_PAD_DI0_PIN15__SDMA_DBG_CORE_STA_1 482 | ||
| 521 | MX6Q_PAD_DI0_PIN15__GPIO_4_17 483 | ||
| 522 | MX6Q_PAD_DI0_PIN15__MMDC_MMDC_DEBUG_1 484 | ||
| 523 | MX6Q_PAD_DI0_PIN2__IPU1_DI0_PIN2 485 | ||
| 524 | MX6Q_PAD_DI0_PIN2__IPU2_DI0_PIN2 486 | ||
| 525 | MX6Q_PAD_DI0_PIN2__AUDMUX_AUD6_TXD 487 | ||
| 526 | MX6Q_PAD_DI0_PIN2__MIPI_CR_DPHY_OUT_30 488 | ||
| 527 | MX6Q_PAD_DI0_PIN2__SDMA_DBG_CORE_STA_2 489 | ||
| 528 | MX6Q_PAD_DI0_PIN2__GPIO_4_18 490 | ||
| 529 | MX6Q_PAD_DI0_PIN2__MMDC_DEBUG_2 491 | ||
| 530 | MX6Q_PAD_DI0_PIN2__PL301_PER1_HADDR_9 492 | ||
| 531 | MX6Q_PAD_DI0_PIN3__IPU1_DI0_PIN3 493 | ||
| 532 | MX6Q_PAD_DI0_PIN3__IPU2_DI0_PIN3 494 | ||
| 533 | MX6Q_PAD_DI0_PIN3__AUDMUX_AUD6_TXFS 495 | ||
| 534 | MX6Q_PAD_DI0_PIN3__MIPI_CORE_DPHY_OUT31 496 | ||
| 535 | MX6Q_PAD_DI0_PIN3__SDMA_DBG_CORE_STA_3 497 | ||
| 536 | MX6Q_PAD_DI0_PIN3__GPIO_4_19 498 | ||
| 537 | MX6Q_PAD_DI0_PIN3__MMDC_MMDC_DEBUG_3 499 | ||
| 538 | MX6Q_PAD_DI0_PIN3__PL301_PER1_HADDR_10 500 | ||
| 539 | MX6Q_PAD_DI0_PIN4__IPU1_DI0_PIN4 501 | ||
| 540 | MX6Q_PAD_DI0_PIN4__IPU2_DI0_PIN4 502 | ||
| 541 | MX6Q_PAD_DI0_PIN4__AUDMUX_AUD6_RXD 503 | ||
| 542 | MX6Q_PAD_DI0_PIN4__USDHC1_WP 504 | ||
| 543 | MX6Q_PAD_DI0_PIN4__SDMA_DEBUG_YIELD 505 | ||
| 544 | MX6Q_PAD_DI0_PIN4__GPIO_4_20 506 | ||
| 545 | MX6Q_PAD_DI0_PIN4__MMDC_MMDC_DEBUG_4 507 | ||
| 546 | MX6Q_PAD_DI0_PIN4__PL301_PER1_HADDR_11 508 | ||
| 547 | MX6Q_PAD_DISP0_DAT0__IPU1_DISP0_DAT_0 509 | ||
| 548 | MX6Q_PAD_DISP0_DAT0__IPU2_DISP0_DAT_0 510 | ||
| 549 | MX6Q_PAD_DISP0_DAT0__ECSPI3_SCLK 511 | ||
| 550 | MX6Q_PAD_DISP0_DAT0__USDHC1_USDHC_DBG_0 512 | ||
| 551 | MX6Q_PAD_DISP0_DAT0__SDMA_DBG_CORE_RUN 513 | ||
| 552 | MX6Q_PAD_DISP0_DAT0__GPIO_4_21 514 | ||
| 553 | MX6Q_PAD_DISP0_DAT0__MMDC_MMDC_DEBUG_5 515 | ||
| 554 | MX6Q_PAD_DISP0_DAT1__IPU1_DISP0_DAT_1 516 | ||
| 555 | MX6Q_PAD_DISP0_DAT1__IPU2_DISP0_DAT_1 517 | ||
| 556 | MX6Q_PAD_DISP0_DAT1__ECSPI3_MOSI 518 | ||
| 557 | MX6Q_PAD_DISP0_DAT1__USDHC1_USDHC_DBG_1 519 | ||
| 558 | MX6Q_PAD_DISP0_DAT1__SDMA_DBG_EVT_CHNSL 520 | ||
| 559 | MX6Q_PAD_DISP0_DAT1__GPIO_4_22 521 | ||
| 560 | MX6Q_PAD_DISP0_DAT1__MMDC_DEBUG_6 522 | ||
| 561 | MX6Q_PAD_DISP0_DAT1__PL301_PER1_HADR_12 523 | ||
| 562 | MX6Q_PAD_DISP0_DAT2__IPU1_DISP0_DAT_2 524 | ||
| 563 | MX6Q_PAD_DISP0_DAT2__IPU2_DISP0_DAT_2 525 | ||
| 564 | MX6Q_PAD_DISP0_DAT2__ECSPI3_MISO 526 | ||
| 565 | MX6Q_PAD_DISP0_DAT2__USDHC1_USDHC_DBG_2 527 | ||
| 566 | MX6Q_PAD_DISP0_DAT2__SDMA_DEBUG_MODE 528 | ||
| 567 | MX6Q_PAD_DISP0_DAT2__GPIO_4_23 529 | ||
| 568 | MX6Q_PAD_DISP0_DAT2__MMDC_DEBUG_7 530 | ||
| 569 | MX6Q_PAD_DISP0_DAT2__PL301_PER1_HADR_13 531 | ||
| 570 | MX6Q_PAD_DISP0_DAT3__IPU1_DISP0_DAT_3 532 | ||
| 571 | MX6Q_PAD_DISP0_DAT3__IPU2_DISP0_DAT_3 533 | ||
| 572 | MX6Q_PAD_DISP0_DAT3__ECSPI3_SS0 534 | ||
| 573 | MX6Q_PAD_DISP0_DAT3__USDHC1_USDHC_DBG_3 535 | ||
| 574 | MX6Q_PAD_DISP0_DAT3__SDMA_DBG_BUS_ERROR 536 | ||
| 575 | MX6Q_PAD_DISP0_DAT3__GPIO_4_24 537 | ||
| 576 | MX6Q_PAD_DISP0_DAT3__MMDC_MMDC_DBG_8 538 | ||
| 577 | MX6Q_PAD_DISP0_DAT3__PL301_PER1_HADR_14 539 | ||
| 578 | MX6Q_PAD_DISP0_DAT4__IPU1_DISP0_DAT_4 540 | ||
| 579 | MX6Q_PAD_DISP0_DAT4__IPU2_DISP0_DAT_4 541 | ||
| 580 | MX6Q_PAD_DISP0_DAT4__ECSPI3_SS1 542 | ||
| 581 | MX6Q_PAD_DISP0_DAT4__USDHC1_USDHC_DBG_4 543 | ||
| 582 | MX6Q_PAD_DISP0_DAT4__SDMA_DEBUG_BUS_RWB 544 | ||
| 583 | MX6Q_PAD_DISP0_DAT4__GPIO_4_25 545 | ||
| 584 | MX6Q_PAD_DISP0_DAT4__MMDC_MMDC_DEBUG_9 546 | ||
| 585 | MX6Q_PAD_DISP0_DAT4__PL301_PER1_HADR_15 547 | ||
| 586 | MX6Q_PAD_DISP0_DAT5__IPU1_DISP0_DAT_5 548 | ||
| 587 | MX6Q_PAD_DISP0_DAT5__IPU2_DISP0_DAT_5 549 | ||
| 588 | MX6Q_PAD_DISP0_DAT5__ECSPI3_SS2 550 | ||
| 589 | MX6Q_PAD_DISP0_DAT5__AUDMUX_AUD6_RXFS 551 | ||
| 590 | MX6Q_PAD_DISP0_DAT5__SDMA_DBG_MCH_DMBUS 552 | ||
| 591 | MX6Q_PAD_DISP0_DAT5__GPIO_4_26 553 | ||
| 592 | MX6Q_PAD_DISP0_DAT5__MMDC_DEBUG_10 554 | ||
| 593 | MX6Q_PAD_DISP0_DAT5__PL301_PER1_HADR_16 555 | ||
| 594 | MX6Q_PAD_DISP0_DAT6__IPU1_DISP0_DAT_6 556 | ||
| 595 | MX6Q_PAD_DISP0_DAT6__IPU2_DISP0_DAT_6 557 | ||
| 596 | MX6Q_PAD_DISP0_DAT6__ECSPI3_SS3 558 | ||
| 597 | MX6Q_PAD_DISP0_DAT6__AUDMUX_AUD6_RXC 559 | ||
| 598 | MX6Q_PAD_DISP0_DAT6__SDMA_DBG_RTBUF_WRT 560 | ||
| 599 | MX6Q_PAD_DISP0_DAT6__GPIO_4_27 561 | ||
| 600 | MX6Q_PAD_DISP0_DAT6__MMDC_DEBUG_11 562 | ||
| 601 | MX6Q_PAD_DISP0_DAT6__PL301_PER1_HADR_17 563 | ||
| 602 | MX6Q_PAD_DISP0_DAT7__IPU1_DISP0_DAT_7 564 | ||
| 603 | MX6Q_PAD_DISP0_DAT7__IPU2_DISP0_DAT_7 565 | ||
| 604 | MX6Q_PAD_DISP0_DAT7__ECSPI3_RDY 566 | ||
| 605 | MX6Q_PAD_DISP0_DAT7__USDHC1_USDHC_DBG_5 567 | ||
| 606 | MX6Q_PAD_DISP0_DAT7__SDMA_DBG_EVT_CHN_0 568 | ||
| 607 | MX6Q_PAD_DISP0_DAT7__GPIO_4_28 569 | ||
| 608 | MX6Q_PAD_DISP0_DAT7__MMDC_DEBUG_12 570 | ||
| 609 | MX6Q_PAD_DISP0_DAT7__PL301_PER1_HADR_18 571 | ||
| 610 | MX6Q_PAD_DISP0_DAT8__IPU1_DISP0_DAT_8 572 | ||
| 611 | MX6Q_PAD_DISP0_DAT8__IPU2_DISP0_DAT_8 573 | ||
| 612 | MX6Q_PAD_DISP0_DAT8__PWM1_PWMO 574 | ||
| 613 | MX6Q_PAD_DISP0_DAT8__WDOG1_WDOG_B 575 | ||
| 614 | MX6Q_PAD_DISP0_DAT8__SDMA_DBG_EVT_CHN_1 576 | ||
| 615 | MX6Q_PAD_DISP0_DAT8__GPIO_4_29 577 | ||
| 616 | MX6Q_PAD_DISP0_DAT8__MMDC_DEBUG_13 578 | ||
| 617 | MX6Q_PAD_DISP0_DAT8__PL301_PER1_HADR_19 579 | ||
| 618 | MX6Q_PAD_DISP0_DAT9__IPU1_DISP0_DAT_9 580 | ||
| 619 | MX6Q_PAD_DISP0_DAT9__IPU2_DISP0_DAT_9 581 | ||
| 620 | MX6Q_PAD_DISP0_DAT9__PWM2_PWMO 582 | ||
| 621 | MX6Q_PAD_DISP0_DAT9__WDOG2_WDOG_B 583 | ||
| 622 | MX6Q_PAD_DISP0_DAT9__SDMA_DBG_EVT_CHN_2 584 | ||
| 623 | MX6Q_PAD_DISP0_DAT9__GPIO_4_30 585 | ||
| 624 | MX6Q_PAD_DISP0_DAT9__MMDC_DEBUG_14 586 | ||
| 625 | MX6Q_PAD_DISP0_DAT9__PL301_PER1_HADR_20 587 | ||
| 626 | MX6Q_PAD_DISP0_DAT10__IPU1_DISP0_DAT_10 588 | ||
| 627 | MX6Q_PAD_DISP0_DAT10__IPU2_DISP0_DAT_10 589 | ||
| 628 | MX6Q_PAD_DISP0_DAT10__USDHC1_DBG_6 590 | ||
| 629 | MX6Q_PAD_DISP0_DAT10__SDMA_DBG_EVT_CHN3 591 | ||
| 630 | MX6Q_PAD_DISP0_DAT10__GPIO_4_31 592 | ||
| 631 | MX6Q_PAD_DISP0_DAT10__MMDC_DEBUG_15 593 | ||
| 632 | MX6Q_PAD_DISP0_DAT10__PL301_PER1_HADR21 594 | ||
| 633 | MX6Q_PAD_DISP0_DAT11__IPU1_DISP0_DAT_11 595 | ||
| 634 | MX6Q_PAD_DISP0_DAT11__IPU2_DISP0_DAT_11 596 | ||
| 635 | MX6Q_PAD_DISP0_DAT11__USDHC1_USDHC_DBG7 597 | ||
| 636 | MX6Q_PAD_DISP0_DAT11__SDMA_DBG_EVT_CHN4 598 | ||
| 637 | MX6Q_PAD_DISP0_DAT11__GPIO_5_5 599 | ||
| 638 | MX6Q_PAD_DISP0_DAT11__MMDC_DEBUG_16 600 | ||
| 639 | MX6Q_PAD_DISP0_DAT11__PL301_PER1_HADR22 601 | ||
| 640 | MX6Q_PAD_DISP0_DAT12__IPU1_DISP0_DAT_12 602 | ||
| 641 | MX6Q_PAD_DISP0_DAT12__IPU2_DISP0_DAT_12 603 | ||
| 642 | MX6Q_PAD_DISP0_DAT12__RESERVED_RESERVED 604 | ||
| 643 | MX6Q_PAD_DISP0_DAT12__SDMA_DBG_EVT_CHN5 605 | ||
| 644 | MX6Q_PAD_DISP0_DAT12__GPIO_5_6 606 | ||
| 645 | MX6Q_PAD_DISP0_DAT12__MMDC_DEBUG_17 607 | ||
| 646 | MX6Q_PAD_DISP0_DAT12__PL301_PER1_HADR23 608 | ||
| 647 | MX6Q_PAD_DISP0_DAT13__IPU1_DISP0_DAT_13 609 | ||
| 648 | MX6Q_PAD_DISP0_DAT13__IPU2_DISP0_DAT_13 610 | ||
| 649 | MX6Q_PAD_DISP0_DAT13__AUDMUX_AUD5_RXFS 611 | ||
| 650 | MX6Q_PAD_DISP0_DAT13__SDMA_DBG_EVT_CHN0 612 | ||
| 651 | MX6Q_PAD_DISP0_DAT13__GPIO_5_7 613 | ||
| 652 | MX6Q_PAD_DISP0_DAT13__MMDC_DEBUG_18 614 | ||
| 653 | MX6Q_PAD_DISP0_DAT13__PL301_PER1_HADR24 615 | ||
| 654 | MX6Q_PAD_DISP0_DAT14__IPU1_DISP0_DAT_14 616 | ||
| 655 | MX6Q_PAD_DISP0_DAT14__IPU2_DISP0_DAT_14 617 | ||
| 656 | MX6Q_PAD_DISP0_DAT14__AUDMUX_AUD5_RXC 618 | ||
| 657 | MX6Q_PAD_DISP0_DAT14__SDMA_DBG_EVT_CHN1 619 | ||
| 658 | MX6Q_PAD_DISP0_DAT14__GPIO_5_8 620 | ||
| 659 | MX6Q_PAD_DISP0_DAT14__MMDC_DEBUG_19 621 | ||
| 660 | MX6Q_PAD_DISP0_DAT15__IPU1_DISP0_DAT_15 622 | ||
| 661 | MX6Q_PAD_DISP0_DAT15__IPU2_DISP0_DAT_15 623 | ||
| 662 | MX6Q_PAD_DISP0_DAT15__ECSPI1_SS1 624 | ||
| 663 | MX6Q_PAD_DISP0_DAT15__ECSPI2_SS1 625 | ||
| 664 | MX6Q_PAD_DISP0_DAT15__SDMA_DBG_EVT_CHN2 626 | ||
| 665 | MX6Q_PAD_DISP0_DAT15__GPIO_5_9 627 | ||
| 666 | MX6Q_PAD_DISP0_DAT15__MMDC_DEBUG_20 628 | ||
| 667 | MX6Q_PAD_DISP0_DAT15__PL301_PER1_HADR25 629 | ||
| 668 | MX6Q_PAD_DISP0_DAT16__IPU1_DISP0_DAT_16 630 | ||
| 669 | MX6Q_PAD_DISP0_DAT16__IPU2_DISP0_DAT_16 631 | ||
| 670 | MX6Q_PAD_DISP0_DAT16__ECSPI2_MOSI 632 | ||
| 671 | MX6Q_PAD_DISP0_DAT16__AUDMUX_AUD5_TXC 633 | ||
| 672 | MX6Q_PAD_DISP0_DAT16__SDMA_EXT_EVENT_0 634 | ||
| 673 | MX6Q_PAD_DISP0_DAT16__GPIO_5_10 635 | ||
| 674 | MX6Q_PAD_DISP0_DAT16__MMDC_DEBUG_21 636 | ||
| 675 | MX6Q_PAD_DISP0_DAT16__PL301_PER1_HADR26 637 | ||
| 676 | MX6Q_PAD_DISP0_DAT17__IPU1_DISP0_DAT_17 638 | ||
| 677 | MX6Q_PAD_DISP0_DAT17__IPU2_DISP0_DAT_17 639 | ||
| 678 | MX6Q_PAD_DISP0_DAT17__ECSPI2_MISO 640 | ||
| 679 | MX6Q_PAD_DISP0_DAT17__AUDMUX_AUD5_TXD 641 | ||
| 680 | MX6Q_PAD_DISP0_DAT17__SDMA_EXT_EVENT_1 642 | ||
| 681 | MX6Q_PAD_DISP0_DAT17__GPIO_5_11 643 | ||
| 682 | MX6Q_PAD_DISP0_DAT17__MMDC_DEBUG_22 644 | ||
| 683 | MX6Q_PAD_DISP0_DAT17__PL301_PER1_HADR27 645 | ||
| 684 | MX6Q_PAD_DISP0_DAT18__IPU1_DISP0_DAT_18 646 | ||
| 685 | MX6Q_PAD_DISP0_DAT18__IPU2_DISP0_DAT_18 647 | ||
| 686 | MX6Q_PAD_DISP0_DAT18__ECSPI2_SS0 648 | ||
| 687 | MX6Q_PAD_DISP0_DAT18__AUDMUX_AUD5_TXFS 649 | ||
| 688 | MX6Q_PAD_DISP0_DAT18__AUDMUX_AUD4_RXFS 650 | ||
| 689 | MX6Q_PAD_DISP0_DAT18__GPIO_5_12 651 | ||
| 690 | MX6Q_PAD_DISP0_DAT18__MMDC_DEBUG_23 652 | ||
| 691 | MX6Q_PAD_DISP0_DAT18__WEIM_WEIM_CS_2 653 | ||
| 692 | MX6Q_PAD_DISP0_DAT19__IPU1_DISP0_DAT_19 654 | ||
| 693 | MX6Q_PAD_DISP0_DAT19__IPU2_DISP0_DAT_19 655 | ||
| 694 | MX6Q_PAD_DISP0_DAT19__ECSPI2_SCLK 656 | ||
| 695 | MX6Q_PAD_DISP0_DAT19__AUDMUX_AUD5_RXD 657 | ||
| 696 | MX6Q_PAD_DISP0_DAT19__AUDMUX_AUD4_RXC 658 | ||
| 697 | MX6Q_PAD_DISP0_DAT19__GPIO_5_13 659 | ||
| 698 | MX6Q_PAD_DISP0_DAT19__MMDC_DEBUG_24 660 | ||
| 699 | MX6Q_PAD_DISP0_DAT19__WEIM_WEIM_CS_3 661 | ||
| 700 | MX6Q_PAD_DISP0_DAT20__IPU1_DISP0_DAT_20 662 | ||
| 701 | MX6Q_PAD_DISP0_DAT20__IPU2_DISP0_DAT_20 663 | ||
| 702 | MX6Q_PAD_DISP0_DAT20__ECSPI1_SCLK 664 | ||
| 703 | MX6Q_PAD_DISP0_DAT20__AUDMUX_AUD4_TXC 665 | ||
| 704 | MX6Q_PAD_DISP0_DAT20__SDMA_DBG_EVT_CHN7 666 | ||
| 705 | MX6Q_PAD_DISP0_DAT20__GPIO_5_14 667 | ||
| 706 | MX6Q_PAD_DISP0_DAT20__MMDC_DEBUG_25 668 | ||
| 707 | MX6Q_PAD_DISP0_DAT20__PL301_PER1_HADR28 669 | ||
| 708 | MX6Q_PAD_DISP0_DAT21__IPU1_DISP0_DAT_21 670 | ||
| 709 | MX6Q_PAD_DISP0_DAT21__IPU2_DISP0_DAT_21 671 | ||
| 710 | MX6Q_PAD_DISP0_DAT21__ECSPI1_MOSI 672 | ||
| 711 | MX6Q_PAD_DISP0_DAT21__AUDMUX_AUD4_TXD 673 | ||
| 712 | MX6Q_PAD_DISP0_DAT21__SDMA_DBG_BUS_DEV0 674 | ||
| 713 | MX6Q_PAD_DISP0_DAT21__GPIO_5_15 675 | ||
| 714 | MX6Q_PAD_DISP0_DAT21__MMDC_DEBUG_26 676 | ||
| 715 | MX6Q_PAD_DISP0_DAT21__PL301_PER1_HADR29 677 | ||
| 716 | MX6Q_PAD_DISP0_DAT22__IPU1_DISP0_DAT_22 678 | ||
| 717 | MX6Q_PAD_DISP0_DAT22__IPU2_DISP0_DAT_22 679 | ||
| 718 | MX6Q_PAD_DISP0_DAT22__ECSPI1_MISO 680 | ||
| 719 | MX6Q_PAD_DISP0_DAT22__AUDMUX_AUD4_TXFS 681 | ||
| 720 | MX6Q_PAD_DISP0_DAT22__SDMA_DBG_BUS_DEV1 682 | ||
| 721 | MX6Q_PAD_DISP0_DAT22__GPIO_5_16 683 | ||
| 722 | MX6Q_PAD_DISP0_DAT22__MMDC_DEBUG_27 684 | ||
| 723 | MX6Q_PAD_DISP0_DAT22__PL301_PER1_HADR30 685 | ||
| 724 | MX6Q_PAD_DISP0_DAT23__IPU1_DISP0_DAT_23 686 | ||
| 725 | MX6Q_PAD_DISP0_DAT23__IPU2_DISP0_DAT_23 687 | ||
| 726 | MX6Q_PAD_DISP0_DAT23__ECSPI1_SS0 688 | ||
| 727 | MX6Q_PAD_DISP0_DAT23__AUDMUX_AUD4_RXD 689 | ||
| 728 | MX6Q_PAD_DISP0_DAT23__SDMA_DBG_BUS_DEV2 690 | ||
| 729 | MX6Q_PAD_DISP0_DAT23__GPIO_5_17 691 | ||
| 730 | MX6Q_PAD_DISP0_DAT23__MMDC_DEBUG_28 692 | ||
| 731 | MX6Q_PAD_DISP0_DAT23__PL301_PER1_HADR31 693 | ||
| 732 | MX6Q_PAD_ENET_MDIO__RESERVED_RESERVED 694 | ||
| 733 | MX6Q_PAD_ENET_MDIO__ENET_MDIO 695 | ||
| 734 | MX6Q_PAD_ENET_MDIO__ESAI1_SCKR 696 | ||
| 735 | MX6Q_PAD_ENET_MDIO__SDMA_DEBUG_BUS_DEV3 697 | ||
| 736 | MX6Q_PAD_ENET_MDIO__ENET_1588_EVT1_OUT 698 | ||
| 737 | MX6Q_PAD_ENET_MDIO__GPIO_1_22 699 | ||
| 738 | MX6Q_PAD_ENET_MDIO__SPDIF_PLOCK 700 | ||
| 739 | MX6Q_PAD_ENET_REF_CLK__RESERVED_RSRVED 701 | ||
| 740 | MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK 702 | ||
| 741 | MX6Q_PAD_ENET_REF_CLK__ESAI1_FSR 703 | ||
| 742 | MX6Q_PAD_ENET_REF_CLK__SDMA_DBGBUS_DEV4 704 | ||
| 743 | MX6Q_PAD_ENET_REF_CLK__GPIO_1_23 705 | ||
| 744 | MX6Q_PAD_ENET_REF_CLK__SPDIF_SRCLK 706 | ||
| 745 | MX6Q_PAD_ENET_REF_CLK__USBPHY1_RX_SQH 707 | ||
| 746 | MX6Q_PAD_ENET_RX_ER__ENET_RX_ER 708 | ||
| 747 | MX6Q_PAD_ENET_RX_ER__ESAI1_HCKR 709 | ||
| 748 | MX6Q_PAD_ENET_RX_ER__SPDIF_IN1 710 | ||
| 749 | MX6Q_PAD_ENET_RX_ER__ENET_1588_EVT2_OUT 711 | ||
| 750 | MX6Q_PAD_ENET_RX_ER__GPIO_1_24 712 | ||
| 751 | MX6Q_PAD_ENET_RX_ER__PHY_TDI 713 | ||
| 752 | MX6Q_PAD_ENET_RX_ER__USBPHY1_RX_HS_RXD 714 | ||
| 753 | MX6Q_PAD_ENET_CRS_DV__RESERVED_RSRVED 715 | ||
| 754 | MX6Q_PAD_ENET_CRS_DV__ENET_RX_EN 716 | ||
| 755 | MX6Q_PAD_ENET_CRS_DV__ESAI1_SCKT 717 | ||
| 756 | MX6Q_PAD_ENET_CRS_DV__SPDIF_EXTCLK 718 | ||
| 757 | MX6Q_PAD_ENET_CRS_DV__GPIO_1_25 719 | ||
| 758 | MX6Q_PAD_ENET_CRS_DV__PHY_TDO 720 | ||
| 759 | MX6Q_PAD_ENET_CRS_DV__USBPHY1_RX_FS_RXD 721 | ||
| 760 | MX6Q_PAD_ENET_RXD1__MLB_MLBSIG 722 | ||
| 761 | MX6Q_PAD_ENET_RXD1__ENET_RDATA_1 723 | ||
| 762 | MX6Q_PAD_ENET_RXD1__ESAI1_FST 724 | ||
| 763 | MX6Q_PAD_ENET_RXD1__ENET_1588_EVT3_OUT 725 | ||
| 764 | MX6Q_PAD_ENET_RXD1__GPIO_1_26 726 | ||
| 765 | MX6Q_PAD_ENET_RXD1__PHY_TCK 727 | ||
| 766 | MX6Q_PAD_ENET_RXD1__USBPHY1_RX_DISCON 728 | ||
| 767 | MX6Q_PAD_ENET_RXD0__OSC32K_32K_OUT 729 | ||
| 768 | MX6Q_PAD_ENET_RXD0__ENET_RDATA_0 730 | ||
| 769 | MX6Q_PAD_ENET_RXD0__ESAI1_HCKT 731 | ||
| 770 | MX6Q_PAD_ENET_RXD0__SPDIF_OUT1 732 | ||
| 771 | MX6Q_PAD_ENET_RXD0__GPIO_1_27 733 | ||
| 772 | MX6Q_PAD_ENET_RXD0__PHY_TMS 734 | ||
| 773 | MX6Q_PAD_ENET_RXD0__USBPHY1_PLL_CK20DIV 735 | ||
| 774 | MX6Q_PAD_ENET_TX_EN__RESERVED_RSRVED 736 | ||
| 775 | MX6Q_PAD_ENET_TX_EN__ENET_TX_EN 737 | ||
| 776 | MX6Q_PAD_ENET_TX_EN__ESAI1_TX3_RX2 738 | ||
| 777 | MX6Q_PAD_ENET_TX_EN__GPIO_1_28 739 | ||
| 778 | MX6Q_PAD_ENET_TX_EN__SATA_PHY_TDI 740 | ||
| 779 | MX6Q_PAD_ENET_TX_EN__USBPHY2_RX_SQH 741 | ||
| 780 | MX6Q_PAD_ENET_TXD1__MLB_MLBCLK 742 | ||
| 781 | MX6Q_PAD_ENET_TXD1__ENET_TDATA_1 743 | ||
| 782 | MX6Q_PAD_ENET_TXD1__ESAI1_TX2_RX3 744 | ||
| 783 | MX6Q_PAD_ENET_TXD1__ENET_1588_EVENT0_IN 745 | ||
| 784 | MX6Q_PAD_ENET_TXD1__GPIO_1_29 746 | ||
| 785 | MX6Q_PAD_ENET_TXD1__SATA_PHY_TDO 747 | ||
| 786 | MX6Q_PAD_ENET_TXD1__USBPHY2_RX_HS_RXD 748 | ||
| 787 | MX6Q_PAD_ENET_TXD0__RESERVED_RSRVED 749 | ||
| 788 | MX6Q_PAD_ENET_TXD0__ENET_TDATA_0 750 | ||
| 789 | MX6Q_PAD_ENET_TXD0__ESAI1_TX4_RX1 751 | ||
| 790 | MX6Q_PAD_ENET_TXD0__GPIO_1_30 752 | ||
| 791 | MX6Q_PAD_ENET_TXD0__SATA_PHY_TCK 753 | ||
| 792 | MX6Q_PAD_ENET_TXD0__USBPHY2_RX_FS_RXD 754 | ||
| 793 | MX6Q_PAD_ENET_MDC__MLB_MLBDAT 755 | ||
| 794 | MX6Q_PAD_ENET_MDC__ENET_MDC 756 | ||
| 795 | MX6Q_PAD_ENET_MDC__ESAI1_TX5_RX0 757 | ||
| 796 | MX6Q_PAD_ENET_MDC__ENET_1588_EVENT1_IN 758 | ||
| 797 | MX6Q_PAD_ENET_MDC__GPIO_1_31 759 | ||
| 798 | MX6Q_PAD_ENET_MDC__SATA_PHY_TMS 760 | ||
| 799 | MX6Q_PAD_ENET_MDC__USBPHY2_RX_DISCON 761 | ||
| 800 | MX6Q_PAD_DRAM_D40__MMDC_DRAM_D_40 762 | ||
| 801 | MX6Q_PAD_DRAM_D41__MMDC_DRAM_D_41 763 | ||
| 802 | MX6Q_PAD_DRAM_D42__MMDC_DRAM_D_42 764 | ||
| 803 | MX6Q_PAD_DRAM_D43__MMDC_DRAM_D_43 765 | ||
| 804 | MX6Q_PAD_DRAM_D44__MMDC_DRAM_D_44 766 | ||
| 805 | MX6Q_PAD_DRAM_D45__MMDC_DRAM_D_45 767 | ||
| 806 | MX6Q_PAD_DRAM_D46__MMDC_DRAM_D_46 768 | ||
| 807 | MX6Q_PAD_DRAM_D47__MMDC_DRAM_D_47 769 | ||
| 808 | MX6Q_PAD_DRAM_SDQS5__MMDC_DRAM_SDQS_5 770 | ||
| 809 | MX6Q_PAD_DRAM_DQM5__MMDC_DRAM_DQM_5 771 | ||
| 810 | MX6Q_PAD_DRAM_D32__MMDC_DRAM_D_32 772 | ||
| 811 | MX6Q_PAD_DRAM_D33__MMDC_DRAM_D_33 773 | ||
| 812 | MX6Q_PAD_DRAM_D34__MMDC_DRAM_D_34 774 | ||
| 813 | MX6Q_PAD_DRAM_D35__MMDC_DRAM_D_35 775 | ||
| 814 | MX6Q_PAD_DRAM_D36__MMDC_DRAM_D_36 776 | ||
| 815 | MX6Q_PAD_DRAM_D37__MMDC_DRAM_D_37 777 | ||
| 816 | MX6Q_PAD_DRAM_D38__MMDC_DRAM_D_38 778 | ||
| 817 | MX6Q_PAD_DRAM_D39__MMDC_DRAM_D_39 779 | ||
| 818 | MX6Q_PAD_DRAM_DQM4__MMDC_DRAM_DQM_4 780 | ||
| 819 | MX6Q_PAD_DRAM_SDQS4__MMDC_DRAM_SDQS_4 781 | ||
| 820 | MX6Q_PAD_DRAM_D24__MMDC_DRAM_D_24 782 | ||
| 821 | MX6Q_PAD_DRAM_D25__MMDC_DRAM_D_25 783 | ||
| 822 | MX6Q_PAD_DRAM_D26__MMDC_DRAM_D_26 784 | ||
| 823 | MX6Q_PAD_DRAM_D27__MMDC_DRAM_D_27 785 | ||
| 824 | MX6Q_PAD_DRAM_D28__MMDC_DRAM_D_28 786 | ||
| 825 | MX6Q_PAD_DRAM_D29__MMDC_DRAM_D_29 787 | ||
| 826 | MX6Q_PAD_DRAM_SDQS3__MMDC_DRAM_SDQS_3 788 | ||
| 827 | MX6Q_PAD_DRAM_D30__MMDC_DRAM_D_30 789 | ||
| 828 | MX6Q_PAD_DRAM_D31__MMDC_DRAM_D_31 790 | ||
| 829 | MX6Q_PAD_DRAM_DQM3__MMDC_DRAM_DQM_3 791 | ||
| 830 | MX6Q_PAD_DRAM_D16__MMDC_DRAM_D_16 792 | ||
| 831 | MX6Q_PAD_DRAM_D17__MMDC_DRAM_D_17 793 | ||
| 832 | MX6Q_PAD_DRAM_D18__MMDC_DRAM_D_18 794 | ||
| 833 | MX6Q_PAD_DRAM_D19__MMDC_DRAM_D_19 795 | ||
| 834 | MX6Q_PAD_DRAM_D20__MMDC_DRAM_D_20 796 | ||
| 835 | MX6Q_PAD_DRAM_D21__MMDC_DRAM_D_21 797 | ||
| 836 | MX6Q_PAD_DRAM_D22__MMDC_DRAM_D_22 798 | ||
| 837 | MX6Q_PAD_DRAM_SDQS2__MMDC_DRAM_SDQS_2 799 | ||
| 838 | MX6Q_PAD_DRAM_D23__MMDC_DRAM_D_23 800 | ||
| 839 | MX6Q_PAD_DRAM_DQM2__MMDC_DRAM_DQM_2 801 | ||
| 840 | MX6Q_PAD_DRAM_A0__MMDC_DRAM_A_0 802 | ||
| 841 | MX6Q_PAD_DRAM_A1__MMDC_DRAM_A_1 803 | ||
| 842 | MX6Q_PAD_DRAM_A2__MMDC_DRAM_A_2 804 | ||
| 843 | MX6Q_PAD_DRAM_A3__MMDC_DRAM_A_3 805 | ||
| 844 | MX6Q_PAD_DRAM_A4__MMDC_DRAM_A_4 806 | ||
| 845 | MX6Q_PAD_DRAM_A5__MMDC_DRAM_A_5 807 | ||
| 846 | MX6Q_PAD_DRAM_A6__MMDC_DRAM_A_6 808 | ||
| 847 | MX6Q_PAD_DRAM_A7__MMDC_DRAM_A_7 809 | ||
| 848 | MX6Q_PAD_DRAM_A8__MMDC_DRAM_A_8 810 | ||
| 849 | MX6Q_PAD_DRAM_A9__MMDC_DRAM_A_9 811 | ||
| 850 | MX6Q_PAD_DRAM_A10__MMDC_DRAM_A_10 812 | ||
| 851 | MX6Q_PAD_DRAM_A11__MMDC_DRAM_A_11 813 | ||
| 852 | MX6Q_PAD_DRAM_A12__MMDC_DRAM_A_12 814 | ||
| 853 | MX6Q_PAD_DRAM_A13__MMDC_DRAM_A_13 815 | ||
| 854 | MX6Q_PAD_DRAM_A14__MMDC_DRAM_A_14 816 | ||
| 855 | MX6Q_PAD_DRAM_A15__MMDC_DRAM_A_15 817 | ||
| 856 | MX6Q_PAD_DRAM_CAS__MMDC_DRAM_CAS 818 | ||
| 857 | MX6Q_PAD_DRAM_CS0__MMDC_DRAM_CS_0 819 | ||
| 858 | MX6Q_PAD_DRAM_CS1__MMDC_DRAM_CS_1 820 | ||
| 859 | MX6Q_PAD_DRAM_RAS__MMDC_DRAM_RAS 821 | ||
| 860 | MX6Q_PAD_DRAM_RESET__MMDC_DRAM_RESET 822 | ||
| 861 | MX6Q_PAD_DRAM_SDBA0__MMDC_DRAM_SDBA_0 823 | ||
| 862 | MX6Q_PAD_DRAM_SDBA1__MMDC_DRAM_SDBA_1 824 | ||
| 863 | MX6Q_PAD_DRAM_SDCLK_0__MMDC_DRAM_SDCLK0 825 | ||
| 864 | MX6Q_PAD_DRAM_SDBA2__MMDC_DRAM_SDBA_2 826 | ||
| 865 | MX6Q_PAD_DRAM_SDCKE0__MMDC_DRAM_SDCKE_0 827 | ||
| 866 | MX6Q_PAD_DRAM_SDCLK_1__MMDC_DRAM_SDCLK1 828 | ||
| 867 | MX6Q_PAD_DRAM_SDCKE1__MMDC_DRAM_SDCKE_1 829 | ||
| 868 | MX6Q_PAD_DRAM_SDODT0__MMDC_DRAM_ODT_0 830 | ||
| 869 | MX6Q_PAD_DRAM_SDODT1__MMDC_DRAM_ODT_1 831 | ||
| 870 | MX6Q_PAD_DRAM_SDWE__MMDC_DRAM_SDWE 832 | ||
| 871 | MX6Q_PAD_DRAM_D0__MMDC_DRAM_D_0 833 | ||
| 872 | MX6Q_PAD_DRAM_D1__MMDC_DRAM_D_1 834 | ||
| 873 | MX6Q_PAD_DRAM_D2__MMDC_DRAM_D_2 835 | ||
| 874 | MX6Q_PAD_DRAM_D3__MMDC_DRAM_D_3 836 | ||
| 875 | MX6Q_PAD_DRAM_D4__MMDC_DRAM_D_4 837 | ||
| 876 | MX6Q_PAD_DRAM_D5__MMDC_DRAM_D_5 838 | ||
| 877 | MX6Q_PAD_DRAM_SDQS0__MMDC_DRAM_SDQS_0 839 | ||
| 878 | MX6Q_PAD_DRAM_D6__MMDC_DRAM_D_6 840 | ||
| 879 | MX6Q_PAD_DRAM_D7__MMDC_DRAM_D_7 841 | ||
| 880 | MX6Q_PAD_DRAM_DQM0__MMDC_DRAM_DQM_0 842 | ||
| 881 | MX6Q_PAD_DRAM_D8__MMDC_DRAM_D_8 843 | ||
| 882 | MX6Q_PAD_DRAM_D9__MMDC_DRAM_D_9 844 | ||
| 883 | MX6Q_PAD_DRAM_D10__MMDC_DRAM_D_10 845 | ||
| 884 | MX6Q_PAD_DRAM_D11__MMDC_DRAM_D_11 846 | ||
| 885 | MX6Q_PAD_DRAM_D12__MMDC_DRAM_D_12 847 | ||
| 886 | MX6Q_PAD_DRAM_D13__MMDC_DRAM_D_13 848 | ||
| 887 | MX6Q_PAD_DRAM_D14__MMDC_DRAM_D_14 849 | ||
| 888 | MX6Q_PAD_DRAM_SDQS1__MMDC_DRAM_SDQS_1 850 | ||
| 889 | MX6Q_PAD_DRAM_D15__MMDC_DRAM_D_15 851 | ||
| 890 | MX6Q_PAD_DRAM_DQM1__MMDC_DRAM_DQM_1 852 | ||
| 891 | MX6Q_PAD_DRAM_D48__MMDC_DRAM_D_48 853 | ||
| 892 | MX6Q_PAD_DRAM_D49__MMDC_DRAM_D_49 854 | ||
| 893 | MX6Q_PAD_DRAM_D50__MMDC_DRAM_D_50 855 | ||
| 894 | MX6Q_PAD_DRAM_D51__MMDC_DRAM_D_51 856 | ||
| 895 | MX6Q_PAD_DRAM_D52__MMDC_DRAM_D_52 857 | ||
| 896 | MX6Q_PAD_DRAM_D53__MMDC_DRAM_D_53 858 | ||
| 897 | MX6Q_PAD_DRAM_D54__MMDC_DRAM_D_54 859 | ||
| 898 | MX6Q_PAD_DRAM_D55__MMDC_DRAM_D_55 860 | ||
| 899 | MX6Q_PAD_DRAM_SDQS6__MMDC_DRAM_SDQS_6 861 | ||
| 900 | MX6Q_PAD_DRAM_DQM6__MMDC_DRAM_DQM_6 862 | ||
| 901 | MX6Q_PAD_DRAM_D56__MMDC_DRAM_D_56 863 | ||
| 902 | MX6Q_PAD_DRAM_SDQS7__MMDC_DRAM_SDQS_7 864 | ||
| 903 | MX6Q_PAD_DRAM_D57__MMDC_DRAM_D_57 865 | ||
| 904 | MX6Q_PAD_DRAM_D58__MMDC_DRAM_D_58 866 | ||
| 905 | MX6Q_PAD_DRAM_D59__MMDC_DRAM_D_59 867 | ||
| 906 | MX6Q_PAD_DRAM_D60__MMDC_DRAM_D_60 868 | ||
| 907 | MX6Q_PAD_DRAM_DQM7__MMDC_DRAM_DQM_7 869 | ||
| 908 | MX6Q_PAD_DRAM_D61__MMDC_DRAM_D_61 870 | ||
| 909 | MX6Q_PAD_DRAM_D62__MMDC_DRAM_D_62 871 | ||
| 910 | MX6Q_PAD_DRAM_D63__MMDC_DRAM_D_63 872 | ||
| 911 | MX6Q_PAD_KEY_COL0__ECSPI1_SCLK 873 | ||
| 912 | MX6Q_PAD_KEY_COL0__ENET_RDATA_3 874 | ||
| 913 | MX6Q_PAD_KEY_COL0__AUDMUX_AUD5_TXC 875 | ||
| 914 | MX6Q_PAD_KEY_COL0__KPP_COL_0 876 | ||
| 915 | MX6Q_PAD_KEY_COL0__UART4_TXD 877 | ||
| 916 | MX6Q_PAD_KEY_COL0__GPIO_4_6 878 | ||
| 917 | MX6Q_PAD_KEY_COL0__DCIC1_DCIC_OUT 879 | ||
| 918 | MX6Q_PAD_KEY_COL0__SRC_ANY_PU_RST 880 | ||
| 919 | MX6Q_PAD_KEY_ROW0__ECSPI1_MOSI 881 | ||
| 920 | MX6Q_PAD_KEY_ROW0__ENET_TDATA_3 882 | ||
| 921 | MX6Q_PAD_KEY_ROW0__AUDMUX_AUD5_TXD 883 | ||
| 922 | MX6Q_PAD_KEY_ROW0__KPP_ROW_0 884 | ||
| 923 | MX6Q_PAD_KEY_ROW0__UART4_RXD 885 | ||
| 924 | MX6Q_PAD_KEY_ROW0__GPIO_4_7 886 | ||
| 925 | MX6Q_PAD_KEY_ROW0__DCIC2_DCIC_OUT 887 | ||
| 926 | MX6Q_PAD_KEY_ROW0__PL301_PER1_HADR_0 888 | ||
| 927 | MX6Q_PAD_KEY_COL1__ECSPI1_MISO 889 | ||
| 928 | MX6Q_PAD_KEY_COL1__ENET_MDIO 890 | ||
| 929 | MX6Q_PAD_KEY_COL1__AUDMUX_AUD5_TXFS 891 | ||
| 930 | MX6Q_PAD_KEY_COL1__KPP_COL_1 892 | ||
| 931 | MX6Q_PAD_KEY_COL1__UART5_TXD 893 | ||
| 932 | MX6Q_PAD_KEY_COL1__GPIO_4_8 894 | ||
| 933 | MX6Q_PAD_KEY_COL1__USDHC1_VSELECT 895 | ||
| 934 | MX6Q_PAD_KEY_COL1__PL301MX_PER1_HADR_1 896 | ||
| 935 | MX6Q_PAD_KEY_ROW1__ECSPI1_SS0 897 | ||
| 936 | MX6Q_PAD_KEY_ROW1__ENET_COL 898 | ||
| 937 | MX6Q_PAD_KEY_ROW1__AUDMUX_AUD5_RXD 899 | ||
| 938 | MX6Q_PAD_KEY_ROW1__KPP_ROW_1 900 | ||
| 939 | MX6Q_PAD_KEY_ROW1__UART5_RXD 901 | ||
| 940 | MX6Q_PAD_KEY_ROW1__GPIO_4_9 902 | ||
| 941 | MX6Q_PAD_KEY_ROW1__USDHC2_VSELECT 903 | ||
| 942 | MX6Q_PAD_KEY_ROW1__PL301_PER1_HADDR_2 904 | ||
| 943 | MX6Q_PAD_KEY_COL2__ECSPI1_SS1 905 | ||
| 944 | MX6Q_PAD_KEY_COL2__ENET_RDATA_2 906 | ||
| 945 | MX6Q_PAD_KEY_COL2__CAN1_TXCAN 907 | ||
| 946 | MX6Q_PAD_KEY_COL2__KPP_COL_2 908 | ||
| 947 | MX6Q_PAD_KEY_COL2__ENET_MDC 909 | ||
| 948 | MX6Q_PAD_KEY_COL2__GPIO_4_10 910 | ||
| 949 | MX6Q_PAD_KEY_COL2__USBOH3_H1_PWRCTL_WKP 911 | ||
| 950 | MX6Q_PAD_KEY_COL2__PL301_PER1_HADDR_3 912 | ||
| 951 | MX6Q_PAD_KEY_ROW2__ECSPI1_SS2 913 | ||
| 952 | MX6Q_PAD_KEY_ROW2__ENET_TDATA_2 914 | ||
| 953 | MX6Q_PAD_KEY_ROW2__CAN1_RXCAN 915 | ||
| 954 | MX6Q_PAD_KEY_ROW2__KPP_ROW_2 916 | ||
| 955 | MX6Q_PAD_KEY_ROW2__USDHC2_VSELECT 917 | ||
| 956 | MX6Q_PAD_KEY_ROW2__GPIO_4_11 918 | ||
| 957 | MX6Q_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 919 | ||
| 958 | MX6Q_PAD_KEY_ROW2__PL301_PER1_HADR_4 920 | ||
| 959 | MX6Q_PAD_KEY_COL3__ECSPI1_SS3 921 | ||
| 960 | MX6Q_PAD_KEY_COL3__ENET_CRS 922 | ||
| 961 | MX6Q_PAD_KEY_COL3__HDMI_TX_DDC_SCL 923 | ||
| 962 | MX6Q_PAD_KEY_COL3__KPP_COL_3 924 | ||
| 963 | MX6Q_PAD_KEY_COL3__I2C2_SCL 925 | ||
| 964 | MX6Q_PAD_KEY_COL3__GPIO_4_12 926 | ||
| 965 | MX6Q_PAD_KEY_COL3__SPDIF_IN1 927 | ||
| 966 | MX6Q_PAD_KEY_COL3__PL301_PER1_HADR_5 928 | ||
| 967 | MX6Q_PAD_KEY_ROW3__OSC32K_32K_OUT 929 | ||
| 968 | MX6Q_PAD_KEY_ROW3__ASRC_ASRC_EXT_CLK 930 | ||
| 969 | MX6Q_PAD_KEY_ROW3__HDMI_TX_DDC_SDA 931 | ||
| 970 | MX6Q_PAD_KEY_ROW3__KPP_ROW_3 932 | ||
| 971 | MX6Q_PAD_KEY_ROW3__I2C2_SDA 933 | ||
| 972 | MX6Q_PAD_KEY_ROW3__GPIO_4_13 934 | ||
| 973 | MX6Q_PAD_KEY_ROW3__USDHC1_VSELECT 935 | ||
| 974 | MX6Q_PAD_KEY_ROW3__PL301_PER1_HADR_6 936 | ||
| 975 | MX6Q_PAD_KEY_COL4__CAN2_TXCAN 937 | ||
| 976 | MX6Q_PAD_KEY_COL4__IPU1_SISG_4 938 | ||
| 977 | MX6Q_PAD_KEY_COL4__USBOH3_USBOTG_OC 939 | ||
| 978 | MX6Q_PAD_KEY_COL4__KPP_COL_4 940 | ||
| 979 | MX6Q_PAD_KEY_COL4__UART5_RTS 941 | ||
| 980 | MX6Q_PAD_KEY_COL4__GPIO_4_14 942 | ||
| 981 | MX6Q_PAD_KEY_COL4__MMDC_DEBUG_49 943 | ||
| 982 | MX6Q_PAD_KEY_COL4__PL301_PER1_HADDR_7 944 | ||
| 983 | MX6Q_PAD_KEY_ROW4__CAN2_RXCAN 945 | ||
| 984 | MX6Q_PAD_KEY_ROW4__IPU1_SISG_5 946 | ||
| 985 | MX6Q_PAD_KEY_ROW4__USBOH3_USBOTG_PWR 947 | ||
| 986 | MX6Q_PAD_KEY_ROW4__KPP_ROW_4 948 | ||
| 987 | MX6Q_PAD_KEY_ROW4__UART5_CTS 949 | ||
| 988 | MX6Q_PAD_KEY_ROW4__GPIO_4_15 950 | ||
| 989 | MX6Q_PAD_KEY_ROW4__MMDC_DEBUG_50 951 | ||
| 990 | MX6Q_PAD_KEY_ROW4__PL301_PER1_HADR_8 952 | ||
| 991 | MX6Q_PAD_GPIO_0__CCM_CLKO 953 | ||
| 992 | MX6Q_PAD_GPIO_0__KPP_COL_5 954 | ||
| 993 | MX6Q_PAD_GPIO_0__ASRC_ASRC_EXT_CLK 955 | ||
| 994 | MX6Q_PAD_GPIO_0__EPIT1_EPITO 956 | ||
| 995 | MX6Q_PAD_GPIO_0__GPIO_1_0 957 | ||
| 996 | MX6Q_PAD_GPIO_0__USBOH3_USBH1_PWR 958 | ||
| 997 | MX6Q_PAD_GPIO_0__SNVS_HP_WRAP_SNVS_VIO5 959 | ||
| 998 | MX6Q_PAD_GPIO_1__ESAI1_SCKR 960 | ||
| 999 | MX6Q_PAD_GPIO_1__WDOG2_WDOG_B 961 | ||
| 1000 | MX6Q_PAD_GPIO_1__KPP_ROW_5 962 | ||
| 1001 | MX6Q_PAD_GPIO_1__PWM2_PWMO 963 | ||
| 1002 | MX6Q_PAD_GPIO_1__GPIO_1_1 964 | ||
| 1003 | MX6Q_PAD_GPIO_1__USDHC1_CD 965 | ||
| 1004 | MX6Q_PAD_GPIO_1__SRC_TESTER_ACK 966 | ||
| 1005 | MX6Q_PAD_GPIO_9__ESAI1_FSR 967 | ||
| 1006 | MX6Q_PAD_GPIO_9__WDOG1_WDOG_B 968 | ||
| 1007 | MX6Q_PAD_GPIO_9__KPP_COL_6 969 | ||
| 1008 | MX6Q_PAD_GPIO_9__CCM_REF_EN_B 970 | ||
| 1009 | MX6Q_PAD_GPIO_9__PWM1_PWMO 971 | ||
| 1010 | MX6Q_PAD_GPIO_9__GPIO_1_9 972 | ||
| 1011 | MX6Q_PAD_GPIO_9__USDHC1_WP 973 | ||
| 1012 | MX6Q_PAD_GPIO_9__SRC_EARLY_RST 974 | ||
| 1013 | MX6Q_PAD_GPIO_3__ESAI1_HCKR 975 | ||
| 1014 | MX6Q_PAD_GPIO_3__OBSERVE_MUX_INT_OUT0 976 | ||
| 1015 | MX6Q_PAD_GPIO_3__I2C3_SCL 977 | ||
| 1016 | MX6Q_PAD_GPIO_3__ANATOP_24M_OUT 978 | ||
| 1017 | MX6Q_PAD_GPIO_3__CCM_CLKO2 979 | ||
| 1018 | MX6Q_PAD_GPIO_3__GPIO_1_3 980 | ||
| 1019 | MX6Q_PAD_GPIO_3__USBOH3_USBH1_OC 981 | ||
| 1020 | MX6Q_PAD_GPIO_3__MLB_MLBCLK 982 | ||
| 1021 | MX6Q_PAD_GPIO_6__ESAI1_SCKT 983 | ||
| 1022 | MX6Q_PAD_GPIO_6__OBSERVE_MUX_INT_OUT1 984 | ||
| 1023 | MX6Q_PAD_GPIO_6__I2C3_SDA 985 | ||
| 1024 | MX6Q_PAD_GPIO_6__CCM_CCM_OUT_0 986 | ||
| 1025 | MX6Q_PAD_GPIO_6__CSU_CSU_INT_DEB 987 | ||
| 1026 | MX6Q_PAD_GPIO_6__GPIO_1_6 988 | ||
| 1027 | MX6Q_PAD_GPIO_6__USDHC2_LCTL 989 | ||
| 1028 | MX6Q_PAD_GPIO_6__MLB_MLBSIG 990 | ||
| 1029 | MX6Q_PAD_GPIO_2__ESAI1_FST 991 | ||
| 1030 | MX6Q_PAD_GPIO_2__OBSERVE_MUX_INT_OUT2 992 | ||
| 1031 | MX6Q_PAD_GPIO_2__KPP_ROW_6 993 | ||
| 1032 | MX6Q_PAD_GPIO_2__CCM_CCM_OUT_1 994 | ||
| 1033 | MX6Q_PAD_GPIO_2__CSU_CSU_ALARM_AUT_0 995 | ||
| 1034 | MX6Q_PAD_GPIO_2__GPIO_1_2 996 | ||
| 1035 | MX6Q_PAD_GPIO_2__USDHC2_WP 997 | ||
| 1036 | MX6Q_PAD_GPIO_2__MLB_MLBDAT 998 | ||
| 1037 | MX6Q_PAD_GPIO_4__ESAI1_HCKT 999 | ||
| 1038 | MX6Q_PAD_GPIO_4__OBSERVE_MUX_INT_OUT3 1000 | ||
| 1039 | MX6Q_PAD_GPIO_4__KPP_COL_7 1001 | ||
| 1040 | MX6Q_PAD_GPIO_4__CCM_CCM_OUT_2 1002 | ||
| 1041 | MX6Q_PAD_GPIO_4__CSU_CSU_ALARM_AUT_1 1003 | ||
| 1042 | MX6Q_PAD_GPIO_4__GPIO_1_4 1004 | ||
| 1043 | MX6Q_PAD_GPIO_4__USDHC2_CD 1005 | ||
| 1044 | MX6Q_PAD_GPIO_4__OCOTP_CRL_WRAR_FUSE_LA 1006 | ||
| 1045 | MX6Q_PAD_GPIO_5__ESAI1_TX2_RX3 1007 | ||
| 1046 | MX6Q_PAD_GPIO_5__OBSERVE_MUX_INT_OUT4 1008 | ||
| 1047 | MX6Q_PAD_GPIO_5__KPP_ROW_7 1009 | ||
| 1048 | MX6Q_PAD_GPIO_5__CCM_CLKO 1010 | ||
| 1049 | MX6Q_PAD_GPIO_5__CSU_CSU_ALARM_AUT_2 1011 | ||
| 1050 | MX6Q_PAD_GPIO_5__GPIO_1_5 1012 | ||
| 1051 | MX6Q_PAD_GPIO_5__I2C3_SCL 1013 | ||
| 1052 | MX6Q_PAD_GPIO_5__CHEETAH_EVENTI 1014 | ||
| 1053 | MX6Q_PAD_GPIO_7__ESAI1_TX4_RX1 1015 | ||
| 1054 | MX6Q_PAD_GPIO_7__ECSPI5_RDY 1016 | ||
| 1055 | MX6Q_PAD_GPIO_7__EPIT1_EPITO 1017 | ||
| 1056 | MX6Q_PAD_GPIO_7__CAN1_TXCAN 1018 | ||
| 1057 | MX6Q_PAD_GPIO_7__UART2_TXD 1019 | ||
| 1058 | MX6Q_PAD_GPIO_7__GPIO_1_7 1020 | ||
| 1059 | MX6Q_PAD_GPIO_7__SPDIF_PLOCK 1021 | ||
| 1060 | MX6Q_PAD_GPIO_7__USBOH3_OTGUSB_HST_MODE 1022 | ||
| 1061 | MX6Q_PAD_GPIO_8__ESAI1_TX5_RX0 1023 | ||
| 1062 | MX6Q_PAD_GPIO_8__ANATOP_ANATOP_32K_OUT 1024 | ||
| 1063 | MX6Q_PAD_GPIO_8__EPIT2_EPITO 1025 | ||
| 1064 | MX6Q_PAD_GPIO_8__CAN1_RXCAN 1026 | ||
| 1065 | MX6Q_PAD_GPIO_8__UART2_RXD 1027 | ||
| 1066 | MX6Q_PAD_GPIO_8__GPIO_1_8 1028 | ||
| 1067 | MX6Q_PAD_GPIO_8__SPDIF_SRCLK 1029 | ||
| 1068 | MX6Q_PAD_GPIO_8__USBOH3_OTG_PWRCTL_WAK 1030 | ||
| 1069 | MX6Q_PAD_GPIO_16__ESAI1_TX3_RX2 1031 | ||
| 1070 | MX6Q_PAD_GPIO_16__ENET_1588_EVENT2_IN 1032 | ||
| 1071 | MX6Q_PAD_GPIO_16__ENET_ETHERNET_REF_OUT 1033 | ||
| 1072 | MX6Q_PAD_GPIO_16__USDHC1_LCTL 1034 | ||
| 1073 | MX6Q_PAD_GPIO_16__SPDIF_IN1 1035 | ||
| 1074 | MX6Q_PAD_GPIO_16__GPIO_7_11 1036 | ||
| 1075 | MX6Q_PAD_GPIO_16__I2C3_SDA 1037 | ||
| 1076 | MX6Q_PAD_GPIO_16__SJC_DE_B 1038 | ||
| 1077 | MX6Q_PAD_GPIO_17__ESAI1_TX0 1039 | ||
| 1078 | MX6Q_PAD_GPIO_17__ENET_1588_EVENT3_IN 1040 | ||
| 1079 | MX6Q_PAD_GPIO_17__CCM_PMIC_RDY 1041 | ||
| 1080 | MX6Q_PAD_GPIO_17__SDMA_SDMA_EXT_EVENT_0 1042 | ||
| 1081 | MX6Q_PAD_GPIO_17__SPDIF_OUT1 1043 | ||
| 1082 | MX6Q_PAD_GPIO_17__GPIO_7_12 1044 | ||
| 1083 | MX6Q_PAD_GPIO_17__SJC_JTAG_ACT 1045 | ||
| 1084 | MX6Q_PAD_GPIO_18__ESAI1_TX1 1046 | ||
| 1085 | MX6Q_PAD_GPIO_18__ENET_RX_CLK 1047 | ||
| 1086 | MX6Q_PAD_GPIO_18__USDHC3_VSELECT 1048 | ||
| 1087 | MX6Q_PAD_GPIO_18__SDMA_SDMA_EXT_EVENT_1 1049 | ||
| 1088 | MX6Q_PAD_GPIO_18__ASRC_ASRC_EXT_CLK 1050 | ||
| 1089 | MX6Q_PAD_GPIO_18__GPIO_7_13 1051 | ||
| 1090 | MX6Q_PAD_GPIO_18__SNVS_HP_WRA_SNVS_VIO5 1052 | ||
| 1091 | MX6Q_PAD_GPIO_18__SRC_SYSTEM_RST 1053 | ||
| 1092 | MX6Q_PAD_GPIO_19__KPP_COL_5 1054 | ||
| 1093 | MX6Q_PAD_GPIO_19__ENET_1588_EVENT0_OUT 1055 | ||
| 1094 | MX6Q_PAD_GPIO_19__SPDIF_OUT1 1056 | ||
| 1095 | MX6Q_PAD_GPIO_19__CCM_CLKO 1057 | ||
| 1096 | MX6Q_PAD_GPIO_19__ECSPI1_RDY 1058 | ||
| 1097 | MX6Q_PAD_GPIO_19__GPIO_4_5 1059 | ||
| 1098 | MX6Q_PAD_GPIO_19__ENET_TX_ER 1060 | ||
| 1099 | MX6Q_PAD_GPIO_19__SRC_INT_BOOT 1061 | ||
| 1100 | MX6Q_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 1062 | ||
| 1101 | MX6Q_PAD_CSI0_PIXCLK__PCIE_CTRL_MUX_12 1063 | ||
| 1102 | MX6Q_PAD_CSI0_PIXCLK__SDMA_DEBUG_PC_0 1064 | ||
| 1103 | MX6Q_PAD_CSI0_PIXCLK__GPIO_5_18 1065 | ||
| 1104 | MX6Q_PAD_CSI0_PIXCLK___MMDC_DEBUG_29 1066 | ||
| 1105 | MX6Q_PAD_CSI0_PIXCLK__CHEETAH_EVENTO 1067 | ||
| 1106 | MX6Q_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 1068 | ||
| 1107 | MX6Q_PAD_CSI0_MCLK__PCIE_CTRL_MUX_13 1069 | ||
| 1108 | MX6Q_PAD_CSI0_MCLK__CCM_CLKO 1070 | ||
| 1109 | MX6Q_PAD_CSI0_MCLK__SDMA_DEBUG_PC_1 1071 | ||
| 1110 | MX6Q_PAD_CSI0_MCLK__GPIO_5_19 1072 | ||
| 1111 | MX6Q_PAD_CSI0_MCLK__MMDC_MMDC_DEBUG_30 1073 | ||
| 1112 | MX6Q_PAD_CSI0_MCLK__CHEETAH_TRCTL 1074 | ||
| 1113 | MX6Q_PAD_CSI0_DATA_EN__IPU1_CSI0_DA_EN 1075 | ||
| 1114 | MX6Q_PAD_CSI0_DATA_EN__WEIM_WEIM_D_0 1076 | ||
| 1115 | MX6Q_PAD_CSI0_DATA_EN__PCIE_CTRL_MUX_14 1077 | ||
| 1116 | MX6Q_PAD_CSI0_DATA_EN__SDMA_DEBUG_PC_2 1078 | ||
| 1117 | MX6Q_PAD_CSI0_DATA_EN__GPIO_5_20 1079 | ||
| 1118 | MX6Q_PAD_CSI0_DATA_EN__MMDC_DEBUG_31 1080 | ||
| 1119 | MX6Q_PAD_CSI0_DATA_EN__CHEETAH_TRCLK 1081 | ||
| 1120 | MX6Q_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 1082 | ||
| 1121 | MX6Q_PAD_CSI0_VSYNC__WEIM_WEIM_D_1 1083 | ||
| 1122 | MX6Q_PAD_CSI0_VSYNC__PCIE_CTRL_MUX_15 1084 | ||
| 1123 | MX6Q_PAD_CSI0_VSYNC__SDMA_DEBUG_PC_3 1085 | ||
| 1124 | MX6Q_PAD_CSI0_VSYNC__GPIO_5_21 1086 | ||
| 1125 | MX6Q_PAD_CSI0_VSYNC__MMDC_DEBUG_32 1087 | ||
| 1126 | MX6Q_PAD_CSI0_VSYNC__CHEETAH_TRACE_0 1088 | ||
| 1127 | MX6Q_PAD_CSI0_DAT4__IPU1_CSI0_D_4 1089 | ||
| 1128 | MX6Q_PAD_CSI0_DAT4__WEIM_WEIM_D_2 1090 | ||
| 1129 | MX6Q_PAD_CSI0_DAT4__ECSPI1_SCLK 1091 | ||
| 1130 | MX6Q_PAD_CSI0_DAT4__KPP_COL_5 1092 | ||
| 1131 | MX6Q_PAD_CSI0_DAT4__AUDMUX_AUD3_TXC 1093 | ||
| 1132 | MX6Q_PAD_CSI0_DAT4__GPIO_5_22 1094 | ||
| 1133 | MX6Q_PAD_CSI0_DAT4__MMDC_DEBUG_43 1095 | ||
| 1134 | MX6Q_PAD_CSI0_DAT4__CHEETAH_TRACE_1 1096 | ||
| 1135 | MX6Q_PAD_CSI0_DAT5__IPU1_CSI0_D_5 1097 | ||
| 1136 | MX6Q_PAD_CSI0_DAT5__WEIM_WEIM_D_3 1098 | ||
| 1137 | MX6Q_PAD_CSI0_DAT5__ECSPI1_MOSI 1099 | ||
| 1138 | MX6Q_PAD_CSI0_DAT5__KPP_ROW_5 1100 | ||
| 1139 | MX6Q_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD 1101 | ||
| 1140 | MX6Q_PAD_CSI0_DAT5__GPIO_5_23 1102 | ||
| 1141 | MX6Q_PAD_CSI0_DAT5__MMDC_MMDC_DEBUG_44 1103 | ||
| 1142 | MX6Q_PAD_CSI0_DAT5__CHEETAH_TRACE_2 1104 | ||
| 1143 | MX6Q_PAD_CSI0_DAT6__IPU1_CSI0_D_6 1105 | ||
| 1144 | MX6Q_PAD_CSI0_DAT6__WEIM_WEIM_D_4 1106 | ||
| 1145 | MX6Q_PAD_CSI0_DAT6__ECSPI1_MISO 1107 | ||
| 1146 | MX6Q_PAD_CSI0_DAT6__KPP_COL_6 1108 | ||
| 1147 | MX6Q_PAD_CSI0_DAT6__AUDMUX_AUD3_TXFS 1109 | ||
| 1148 | MX6Q_PAD_CSI0_DAT6__GPIO_5_24 1110 | ||
| 1149 | MX6Q_PAD_CSI0_DAT6__MMDC_MMDC_DEBUG_45 1111 | ||
| 1150 | MX6Q_PAD_CSI0_DAT6__CHEETAH_TRACE_3 1112 | ||
| 1151 | MX6Q_PAD_CSI0_DAT7__IPU1_CSI0_D_7 1113 | ||
| 1152 | MX6Q_PAD_CSI0_DAT7__WEIM_WEIM_D_5 1114 | ||
| 1153 | MX6Q_PAD_CSI0_DAT7__ECSPI1_SS0 1115 | ||
| 1154 | MX6Q_PAD_CSI0_DAT7__KPP_ROW_6 1116 | ||
| 1155 | MX6Q_PAD_CSI0_DAT7__AUDMUX_AUD3_RXD 1117 | ||
| 1156 | MX6Q_PAD_CSI0_DAT7__GPIO_5_25 1118 | ||
| 1157 | MX6Q_PAD_CSI0_DAT7__MMDC_MMDC_DEBUG_46 1119 | ||
| 1158 | MX6Q_PAD_CSI0_DAT7__CHEETAH_TRACE_4 1120 | ||
| 1159 | MX6Q_PAD_CSI0_DAT8__IPU1_CSI0_D_8 1121 | ||
| 1160 | MX6Q_PAD_CSI0_DAT8__WEIM_WEIM_D_6 1122 | ||
| 1161 | MX6Q_PAD_CSI0_DAT8__ECSPI2_SCLK 1123 | ||
| 1162 | MX6Q_PAD_CSI0_DAT8__KPP_COL_7 1124 | ||
| 1163 | MX6Q_PAD_CSI0_DAT8__I2C1_SDA 1125 | ||
| 1164 | MX6Q_PAD_CSI0_DAT8__GPIO_5_26 1126 | ||
| 1165 | MX6Q_PAD_CSI0_DAT8__MMDC_MMDC_DEBUG_47 1127 | ||
| 1166 | MX6Q_PAD_CSI0_DAT8__CHEETAH_TRACE_5 1128 | ||
| 1167 | MX6Q_PAD_CSI0_DAT9__IPU1_CSI0_D_9 1129 | ||
| 1168 | MX6Q_PAD_CSI0_DAT9__WEIM_WEIM_D_7 1130 | ||
| 1169 | MX6Q_PAD_CSI0_DAT9__ECSPI2_MOSI 1131 | ||
| 1170 | MX6Q_PAD_CSI0_DAT9__KPP_ROW_7 1132 | ||
| 1171 | MX6Q_PAD_CSI0_DAT9__I2C1_SCL 1133 | ||
| 1172 | MX6Q_PAD_CSI0_DAT9__GPIO_5_27 1134 | ||
| 1173 | MX6Q_PAD_CSI0_DAT9__MMDC_MMDC_DEBUG_48 1135 | ||
| 1174 | MX6Q_PAD_CSI0_DAT9__CHEETAH_TRACE_6 1136 | ||
| 1175 | MX6Q_PAD_CSI0_DAT10__IPU1_CSI0_D_10 1137 | ||
| 1176 | MX6Q_PAD_CSI0_DAT10__AUDMUX_AUD3_RXC 1138 | ||
| 1177 | MX6Q_PAD_CSI0_DAT10__ECSPI2_MISO 1139 | ||
| 1178 | MX6Q_PAD_CSI0_DAT10__UART1_TXD 1140 | ||
| 1179 | MX6Q_PAD_CSI0_DAT10__SDMA_DEBUG_PC_4 1141 | ||
| 1180 | MX6Q_PAD_CSI0_DAT10__GPIO_5_28 1142 | ||
| 1181 | MX6Q_PAD_CSI0_DAT10__MMDC_MMDC_DEBUG_33 1143 | ||
| 1182 | MX6Q_PAD_CSI0_DAT10__CHEETAH_TRACE_7 1144 | ||
| 1183 | MX6Q_PAD_CSI0_DAT11__IPU1_CSI0_D_11 1145 | ||
| 1184 | MX6Q_PAD_CSI0_DAT11__AUDMUX_AUD3_RXFS 1146 | ||
| 1185 | MX6Q_PAD_CSI0_DAT11__ECSPI2_SS0 1147 | ||
| 1186 | MX6Q_PAD_CSI0_DAT11__UART1_RXD 1148 | ||
| 1187 | MX6Q_PAD_CSI0_DAT11__SDMA_DEBUG_PC_5 1149 | ||
| 1188 | MX6Q_PAD_CSI0_DAT11__GPIO_5_29 1150 | ||
| 1189 | MX6Q_PAD_CSI0_DAT11__MMDC_MMDC_DEBUG_34 1151 | ||
| 1190 | MX6Q_PAD_CSI0_DAT11__CHEETAH_TRACE_8 1152 | ||
| 1191 | MX6Q_PAD_CSI0_DAT12__IPU1_CSI0_D_12 1153 | ||
| 1192 | MX6Q_PAD_CSI0_DAT12__WEIM_WEIM_D_8 1154 | ||
| 1193 | MX6Q_PAD_CSI0_DAT12__PCIE_CTRL_MUX_16 1155 | ||
| 1194 | MX6Q_PAD_CSI0_DAT12__UART4_TXD 1156 | ||
| 1195 | MX6Q_PAD_CSI0_DAT12__SDMA_DEBUG_PC_6 1157 | ||
| 1196 | MX6Q_PAD_CSI0_DAT12__GPIO_5_30 1158 | ||
| 1197 | MX6Q_PAD_CSI0_DAT12__MMDC_MMDC_DEBUG_35 1159 | ||
| 1198 | MX6Q_PAD_CSI0_DAT12__CHEETAH_TRACE_9 1160 | ||
| 1199 | MX6Q_PAD_CSI0_DAT13__IPU1_CSI0_D_13 1161 | ||
| 1200 | MX6Q_PAD_CSI0_DAT13__WEIM_WEIM_D_9 1162 | ||
| 1201 | MX6Q_PAD_CSI0_DAT13__PCIE_CTRL_MUX_17 1163 | ||
| 1202 | MX6Q_PAD_CSI0_DAT13__UART4_RXD 1164 | ||
| 1203 | MX6Q_PAD_CSI0_DAT13__SDMA_DEBUG_PC_7 1165 | ||
| 1204 | MX6Q_PAD_CSI0_DAT13__GPIO_5_31 1166 | ||
| 1205 | MX6Q_PAD_CSI0_DAT13__MMDC_MMDC_DEBUG_36 1167 | ||
| 1206 | MX6Q_PAD_CSI0_DAT13__CHEETAH_TRACE_10 1168 | ||
| 1207 | MX6Q_PAD_CSI0_DAT14__IPU1_CSI0_D_14 1169 | ||
| 1208 | MX6Q_PAD_CSI0_DAT14__WEIM_WEIM_D_10 1170 | ||
| 1209 | MX6Q_PAD_CSI0_DAT14__PCIE_CTRL_MUX_18 1171 | ||
| 1210 | MX6Q_PAD_CSI0_DAT14__UART5_TXD 1172 | ||
| 1211 | MX6Q_PAD_CSI0_DAT14__SDMA_DEBUG_PC_8 1173 | ||
| 1212 | MX6Q_PAD_CSI0_DAT14__GPIO_6_0 1174 | ||
| 1213 | MX6Q_PAD_CSI0_DAT14__MMDC_MMDC_DEBUG_37 1175 | ||
| 1214 | MX6Q_PAD_CSI0_DAT14__CHEETAH_TRACE_11 1176 | ||
| 1215 | MX6Q_PAD_CSI0_DAT15__IPU1_CSI0_D_15 1177 | ||
| 1216 | MX6Q_PAD_CSI0_DAT15__WEIM_WEIM_D_11 1178 | ||
| 1217 | MX6Q_PAD_CSI0_DAT15__PCIE_CTRL_MUX_19 1179 | ||
| 1218 | MX6Q_PAD_CSI0_DAT15__UART5_RXD 1180 | ||
| 1219 | MX6Q_PAD_CSI0_DAT15__SDMA_DEBUG_PC_9 1181 | ||
| 1220 | MX6Q_PAD_CSI0_DAT15__GPIO_6_1 1182 | ||
| 1221 | MX6Q_PAD_CSI0_DAT15__MMDC_MMDC_DEBUG_38 1183 | ||
| 1222 | MX6Q_PAD_CSI0_DAT15__CHEETAH_TRACE_12 1184 | ||
| 1223 | MX6Q_PAD_CSI0_DAT16__IPU1_CSI0_D_16 1185 | ||
| 1224 | MX6Q_PAD_CSI0_DAT16__WEIM_WEIM_D_12 1186 | ||
| 1225 | MX6Q_PAD_CSI0_DAT16__PCIE_CTRL_MUX_20 1187 | ||
| 1226 | MX6Q_PAD_CSI0_DAT16__UART4_RTS 1188 | ||
| 1227 | MX6Q_PAD_CSI0_DAT16__SDMA_DEBUG_PC_10 1189 | ||
| 1228 | MX6Q_PAD_CSI0_DAT16__GPIO_6_2 1190 | ||
| 1229 | MX6Q_PAD_CSI0_DAT16__MMDC_MMDC_DEBUG_39 1191 | ||
| 1230 | MX6Q_PAD_CSI0_DAT16__CHEETAH_TRACE_13 1192 | ||
| 1231 | MX6Q_PAD_CSI0_DAT17__IPU1_CSI0_D_17 1193 | ||
| 1232 | MX6Q_PAD_CSI0_DAT17__WEIM_WEIM_D_13 1194 | ||
| 1233 | MX6Q_PAD_CSI0_DAT17__PCIE_CTRL_MUX_21 1195 | ||
| 1234 | MX6Q_PAD_CSI0_DAT17__UART4_CTS 1196 | ||
| 1235 | MX6Q_PAD_CSI0_DAT17__SDMA_DEBUG_PC_11 1197 | ||
| 1236 | MX6Q_PAD_CSI0_DAT17__GPIO_6_3 1198 | ||
| 1237 | MX6Q_PAD_CSI0_DAT17__MMDC_MMDC_DEBUG_40 1199 | ||
| 1238 | MX6Q_PAD_CSI0_DAT17__CHEETAH_TRACE_14 1200 | ||
| 1239 | MX6Q_PAD_CSI0_DAT18__IPU1_CSI0_D_18 1201 | ||
| 1240 | MX6Q_PAD_CSI0_DAT18__WEIM_WEIM_D_14 1202 | ||
| 1241 | MX6Q_PAD_CSI0_DAT18__PCIE_CTRL_MUX_22 1203 | ||
| 1242 | MX6Q_PAD_CSI0_DAT18__UART5_RTS 1204 | ||
| 1243 | MX6Q_PAD_CSI0_DAT18__SDMA_DEBUG_PC_12 1205 | ||
| 1244 | MX6Q_PAD_CSI0_DAT18__GPIO_6_4 1206 | ||
| 1245 | MX6Q_PAD_CSI0_DAT18__MMDC_MMDC_DEBUG_41 1207 | ||
| 1246 | MX6Q_PAD_CSI0_DAT18__CHEETAH_TRACE_15 1208 | ||
| 1247 | MX6Q_PAD_CSI0_DAT19__IPU1_CSI0_D_19 1209 | ||
| 1248 | MX6Q_PAD_CSI0_DAT19__WEIM_WEIM_D_15 1210 | ||
| 1249 | MX6Q_PAD_CSI0_DAT19__PCIE_CTRL_MUX_23 1211 | ||
| 1250 | MX6Q_PAD_CSI0_DAT19__UART5_CTS 1212 | ||
| 1251 | MX6Q_PAD_CSI0_DAT19__SDMA_DEBUG_PC_13 1213 | ||
| 1252 | MX6Q_PAD_CSI0_DAT19__GPIO_6_5 1214 | ||
| 1253 | MX6Q_PAD_CSI0_DAT19__MMDC_MMDC_DEBUG_42 1215 | ||
| 1254 | MX6Q_PAD_CSI0_DAT19__ANATOP_TESTO_9 1216 | ||
| 1255 | MX6Q_PAD_JTAG_TMS__SJC_TMS 1217 | ||
| 1256 | MX6Q_PAD_JTAG_MOD__SJC_MOD 1218 | ||
| 1257 | MX6Q_PAD_JTAG_TRSTB__SJC_TRSTB 1219 | ||
| 1258 | MX6Q_PAD_JTAG_TDI__SJC_TDI 1220 | ||
| 1259 | MX6Q_PAD_JTAG_TCK__SJC_TCK 1221 | ||
| 1260 | MX6Q_PAD_JTAG_TDO__SJC_TDO 1222 | ||
| 1261 | MX6Q_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3 1223 | ||
| 1262 | MX6Q_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2 1224 | ||
| 1263 | MX6Q_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK 1225 | ||
| 1264 | MX6Q_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1 1226 | ||
| 1265 | MX6Q_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0 1227 | ||
| 1266 | MX6Q_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 1228 | ||
| 1267 | MX6Q_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 1229 | ||
| 1268 | MX6Q_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 1230 | ||
| 1269 | MX6Q_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 1231 | ||
| 1270 | MX6Q_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 1232 | ||
| 1271 | MX6Q_PAD_TAMPER__SNVS_LP_WRAP_SNVS_TD1 1233 | ||
| 1272 | MX6Q_PAD_PMIC_ON_REQ__SNVS_LPWRAP_WKALM 1234 | ||
| 1273 | MX6Q_PAD_PMIC_STBY_REQ__CCM_PMIC_STBYRQ 1235 | ||
| 1274 | MX6Q_PAD_POR_B__SRC_POR_B 1236 | ||
| 1275 | MX6Q_PAD_BOOT_MODE1__SRC_BOOT_MODE_1 1237 | ||
| 1276 | MX6Q_PAD_RESET_IN_B__SRC_RESET_B 1238 | ||
| 1277 | MX6Q_PAD_BOOT_MODE0__SRC_BOOT_MODE_0 1239 | ||
| 1278 | MX6Q_PAD_TEST_MODE__TCU_TEST_MODE 1240 | ||
| 1279 | MX6Q_PAD_SD3_DAT7__USDHC3_DAT7 1241 | ||
| 1280 | MX6Q_PAD_SD3_DAT7__UART1_TXD 1242 | ||
| 1281 | MX6Q_PAD_SD3_DAT7__PCIE_CTRL_MUX_24 1243 | ||
| 1282 | MX6Q_PAD_SD3_DAT7__USBOH3_UH3_DFD_OUT_0 1244 | ||
| 1283 | MX6Q_PAD_SD3_DAT7__USBOH3_UH2_DFD_OUT_0 1245 | ||
| 1284 | MX6Q_PAD_SD3_DAT7__GPIO_6_17 1246 | ||
| 1285 | MX6Q_PAD_SD3_DAT7__MIPI_CORE_DPHY_IN_12 1247 | ||
| 1286 | MX6Q_PAD_SD3_DAT7__USBPHY2_CLK20DIV 1248 | ||
| 1287 | MX6Q_PAD_SD3_DAT6__USDHC3_DAT6 1249 | ||
| 1288 | MX6Q_PAD_SD3_DAT6__UART1_RXD 1250 | ||
| 1289 | MX6Q_PAD_SD3_DAT6__PCIE_CTRL_MUX_25 1251 | ||
| 1290 | MX6Q_PAD_SD3_DAT6__USBOH3_UH3_DFD_OUT_1 1252 | ||
| 1291 | MX6Q_PAD_SD3_DAT6__USBOH3_UH2_DFD_OUT_1 1253 | ||
| 1292 | MX6Q_PAD_SD3_DAT6__GPIO_6_18 1254 | ||
| 1293 | MX6Q_PAD_SD3_DAT6__MIPI_CORE_DPHY_IN_13 1255 | ||
| 1294 | MX6Q_PAD_SD3_DAT6__ANATOP_TESTO_10 1256 | ||
| 1295 | MX6Q_PAD_SD3_DAT5__USDHC3_DAT5 1257 | ||
| 1296 | MX6Q_PAD_SD3_DAT5__UART2_TXD 1258 | ||
| 1297 | MX6Q_PAD_SD3_DAT5__PCIE_CTRL_MUX_26 1259 | ||
| 1298 | MX6Q_PAD_SD3_DAT5__USBOH3_UH3_DFD_OUT_2 1260 | ||
| 1299 | MX6Q_PAD_SD3_DAT5__USBOH3_UH2_DFD_OUT_2 1261 | ||
| 1300 | MX6Q_PAD_SD3_DAT5__GPIO_7_0 1262 | ||
| 1301 | MX6Q_PAD_SD3_DAT5__MIPI_CORE_DPHY_IN_14 1263 | ||
| 1302 | MX6Q_PAD_SD3_DAT5__ANATOP_TESTO_11 1264 | ||
| 1303 | MX6Q_PAD_SD3_DAT4__USDHC3_DAT4 1265 | ||
| 1304 | MX6Q_PAD_SD3_DAT4__UART2_RXD 1266 | ||
| 1305 | MX6Q_PAD_SD3_DAT4__PCIE_CTRL_MUX_27 1267 | ||
| 1306 | MX6Q_PAD_SD3_DAT4__USBOH3_UH3_DFD_OUT_3 1268 | ||
| 1307 | MX6Q_PAD_SD3_DAT4__USBOH3_UH2_DFD_OUT_3 1269 | ||
| 1308 | MX6Q_PAD_SD3_DAT4__GPIO_7_1 1270 | ||
| 1309 | MX6Q_PAD_SD3_DAT4__MIPI_CORE_DPHY_IN_15 1271 | ||
| 1310 | MX6Q_PAD_SD3_DAT4__ANATOP_TESTO_12 1272 | ||
| 1311 | MX6Q_PAD_SD3_CMD__USDHC3_CMD 1273 | ||
| 1312 | MX6Q_PAD_SD3_CMD__UART2_CTS 1274 | ||
| 1313 | MX6Q_PAD_SD3_CMD__CAN1_TXCAN 1275 | ||
| 1314 | MX6Q_PAD_SD3_CMD__USBOH3_UH3_DFD_OUT_4 1276 | ||
| 1315 | MX6Q_PAD_SD3_CMD__USBOH3_UH2_DFD_OUT_4 1277 | ||
| 1316 | MX6Q_PAD_SD3_CMD__GPIO_7_2 1278 | ||
| 1317 | MX6Q_PAD_SD3_CMD__MIPI_CORE_DPHY_IN_16 1279 | ||
| 1318 | MX6Q_PAD_SD3_CMD__ANATOP_TESTO_13 1280 | ||
| 1319 | MX6Q_PAD_SD3_CLK__USDHC3_CLK 1281 | ||
| 1320 | MX6Q_PAD_SD3_CLK__UART2_RTS 1282 | ||
| 1321 | MX6Q_PAD_SD3_CLK__CAN1_RXCAN 1283 | ||
| 1322 | MX6Q_PAD_SD3_CLK__USBOH3_UH3_DFD_OUT_5 1284 | ||
| 1323 | MX6Q_PAD_SD3_CLK__USBOH3_UH2_DFD_OUT_5 1285 | ||
| 1324 | MX6Q_PAD_SD3_CLK__GPIO_7_3 1286 | ||
| 1325 | MX6Q_PAD_SD3_CLK__MIPI_CORE_DPHY_IN_17 1287 | ||
| 1326 | MX6Q_PAD_SD3_CLK__ANATOP_TESTO_14 1288 | ||
| 1327 | MX6Q_PAD_SD3_DAT0__USDHC3_DAT0 1289 | ||
| 1328 | MX6Q_PAD_SD3_DAT0__UART1_CTS 1290 | ||
| 1329 | MX6Q_PAD_SD3_DAT0__CAN2_TXCAN 1291 | ||
| 1330 | MX6Q_PAD_SD3_DAT0__USBOH3_UH3_DFD_OUT_6 1292 | ||
| 1331 | MX6Q_PAD_SD3_DAT0__USBOH3_UH2_DFD_OUT_6 1293 | ||
| 1332 | MX6Q_PAD_SD3_DAT0__GPIO_7_4 1294 | ||
| 1333 | MX6Q_PAD_SD3_DAT0__MIPI_CORE_DPHY_IN_18 1295 | ||
| 1334 | MX6Q_PAD_SD3_DAT0__ANATOP_TESTO_15 1296 | ||
| 1335 | MX6Q_PAD_SD3_DAT1__USDHC3_DAT1 1297 | ||
| 1336 | MX6Q_PAD_SD3_DAT1__UART1_RTS 1298 | ||
| 1337 | MX6Q_PAD_SD3_DAT1__CAN2_RXCAN 1299 | ||
| 1338 | MX6Q_PAD_SD3_DAT1__USBOH3_UH3_DFD_OUT_7 1300 | ||
| 1339 | MX6Q_PAD_SD3_DAT1__USBOH3_UH2_DFD_OUT_7 1301 | ||
| 1340 | MX6Q_PAD_SD3_DAT1__GPIO_7_5 1302 | ||
| 1341 | MX6Q_PAD_SD3_DAT1__MIPI_CORE_DPHY_IN_19 1303 | ||
| 1342 | MX6Q_PAD_SD3_DAT1__ANATOP_TESTI_0 1304 | ||
| 1343 | MX6Q_PAD_SD3_DAT2__USDHC3_DAT2 1305 | ||
| 1344 | MX6Q_PAD_SD3_DAT2__PCIE_CTRL_MUX_28 1306 | ||
| 1345 | MX6Q_PAD_SD3_DAT2__USBOH3_UH3_DFD_OUT_8 1307 | ||
| 1346 | MX6Q_PAD_SD3_DAT2__USBOH3_UH2_DFD_OUT_8 1308 | ||
| 1347 | MX6Q_PAD_SD3_DAT2__GPIO_7_6 1309 | ||
| 1348 | MX6Q_PAD_SD3_DAT2__MIPI_CORE_DPHY_IN_20 1310 | ||
| 1349 | MX6Q_PAD_SD3_DAT2__ANATOP_TESTI_1 1311 | ||
| 1350 | MX6Q_PAD_SD3_DAT3__USDHC3_DAT3 1312 | ||
| 1351 | MX6Q_PAD_SD3_DAT3__UART3_CTS 1313 | ||
| 1352 | MX6Q_PAD_SD3_DAT3__PCIE_CTRL_MUX_29 1314 | ||
| 1353 | MX6Q_PAD_SD3_DAT3__USBOH3_UH3_DFD_OUT_9 1315 | ||
| 1354 | MX6Q_PAD_SD3_DAT3__USBOH3_UH2_DFD_OUT_9 1316 | ||
| 1355 | MX6Q_PAD_SD3_DAT3__GPIO_7_7 1317 | ||
| 1356 | MX6Q_PAD_SD3_DAT3__MIPI_CORE_DPHY_IN_21 1318 | ||
| 1357 | MX6Q_PAD_SD3_DAT3__ANATOP_TESTI_2 1319 | ||
| 1358 | MX6Q_PAD_SD3_RST__USDHC3_RST 1320 | ||
| 1359 | MX6Q_PAD_SD3_RST__UART3_RTS 1321 | ||
| 1360 | MX6Q_PAD_SD3_RST__PCIE_CTRL_MUX_30 1322 | ||
| 1361 | MX6Q_PAD_SD3_RST__USBOH3_UH3_DFD_OUT_10 1323 | ||
| 1362 | MX6Q_PAD_SD3_RST__USBOH3_UH2_DFD_OUT_10 1324 | ||
| 1363 | MX6Q_PAD_SD3_RST__GPIO_7_8 1325 | ||
| 1364 | MX6Q_PAD_SD3_RST__MIPI_CORE_DPHY_IN_22 1326 | ||
| 1365 | MX6Q_PAD_SD3_RST__ANATOP_ANATOP_TESTI_3 1327 | ||
| 1366 | MX6Q_PAD_NANDF_CLE__RAWNAND_CLE 1328 | ||
| 1367 | MX6Q_PAD_NANDF_CLE__IPU2_SISG_4 1329 | ||
| 1368 | MX6Q_PAD_NANDF_CLE__PCIE_CTRL_MUX_31 1330 | ||
| 1369 | MX6Q_PAD_NANDF_CLE__USBOH3_UH3_DFD_OT11 1331 | ||
| 1370 | MX6Q_PAD_NANDF_CLE__USBOH3_UH2_DFD_OT11 1332 | ||
| 1371 | MX6Q_PAD_NANDF_CLE__GPIO_6_7 1333 | ||
| 1372 | MX6Q_PAD_NANDF_CLE__MIPI_CORE_DPHY_IN23 1334 | ||
| 1373 | MX6Q_PAD_NANDF_CLE__TPSMP_HTRANS_0 1335 | ||
| 1374 | MX6Q_PAD_NANDF_ALE__RAWNAND_ALE 1336 | ||
| 1375 | MX6Q_PAD_NANDF_ALE__USDHC4_RST 1337 | ||
| 1376 | MX6Q_PAD_NANDF_ALE__PCIE_CTRL_MUX_0 1338 | ||
| 1377 | MX6Q_PAD_NANDF_ALE__USBOH3_UH3_DFD_OT12 1339 | ||
| 1378 | MX6Q_PAD_NANDF_ALE__USBOH3_UH2_DFD_OT12 1340 | ||
| 1379 | MX6Q_PAD_NANDF_ALE__GPIO_6_8 1341 | ||
| 1380 | MX6Q_PAD_NANDF_ALE__MIPI_CR_DPHY_IN_24 1342 | ||
| 1381 | MX6Q_PAD_NANDF_ALE__TPSMP_HTRANS_1 1343 | ||
| 1382 | MX6Q_PAD_NANDF_WP_B__RAWNAND_RESETN 1344 | ||
| 1383 | MX6Q_PAD_NANDF_WP_B__IPU2_SISG_5 1345 | ||
| 1384 | MX6Q_PAD_NANDF_WP_B__PCIE_CTRL__MUX_1 1346 | ||
| 1385 | MX6Q_PAD_NANDF_WP_B__USBOH3_UH3_DFDOT13 1347 | ||
| 1386 | MX6Q_PAD_NANDF_WP_B__USBOH3_UH2_DFDOT13 1348 | ||
| 1387 | MX6Q_PAD_NANDF_WP_B__GPIO_6_9 1349 | ||
| 1388 | MX6Q_PAD_NANDF_WP_B__MIPI_CR_DPHY_OUT32 1350 | ||
| 1389 | MX6Q_PAD_NANDF_WP_B__PL301_PER1_HSIZE_0 1351 | ||
| 1390 | MX6Q_PAD_NANDF_RB0__RAWNAND_READY0 1352 | ||
| 1391 | MX6Q_PAD_NANDF_RB0__IPU2_DI0_PIN1 1353 | ||
| 1392 | MX6Q_PAD_NANDF_RB0__PCIE_CTRL_MUX_2 1354 | ||
| 1393 | MX6Q_PAD_NANDF_RB0__USBOH3_UH3_DFD_OT14 1355 | ||
| 1394 | MX6Q_PAD_NANDF_RB0__USBOH3_UH2_DFD_OT14 1356 | ||
| 1395 | MX6Q_PAD_NANDF_RB0__GPIO_6_10 1357 | ||
| 1396 | MX6Q_PAD_NANDF_RB0__MIPI_CR_DPHY_OUT_33 1358 | ||
| 1397 | MX6Q_PAD_NANDF_RB0__PL301_PER1_HSIZE_1 1359 | ||
| 1398 | MX6Q_PAD_NANDF_CS0__RAWNAND_CE0N 1360 | ||
| 1399 | MX6Q_PAD_NANDF_CS0__USBOH3_UH3_DFD_OT15 1361 | ||
| 1400 | MX6Q_PAD_NANDF_CS0__USBOH3_UH2_DFD_OT15 1362 | ||
| 1401 | MX6Q_PAD_NANDF_CS0__GPIO_6_11 1363 | ||
| 1402 | MX6Q_PAD_NANDF_CS0__PL301_PER1_HSIZE_2 1364 | ||
| 1403 | MX6Q_PAD_NANDF_CS1__RAWNAND_CE1N 1365 | ||
| 1404 | MX6Q_PAD_NANDF_CS1__USDHC4_VSELECT 1366 | ||
| 1405 | MX6Q_PAD_NANDF_CS1__USDHC3_VSELECT 1367 | ||
| 1406 | MX6Q_PAD_NANDF_CS1__PCIE_CTRL_MUX_3 1368 | ||
| 1407 | MX6Q_PAD_NANDF_CS1__GPIO_6_14 1369 | ||
| 1408 | MX6Q_PAD_NANDF_CS1__PL301_PER1_HRDYOUT 1370 | ||
| 1409 | MX6Q_PAD_NANDF_CS2__RAWNAND_CE2N 1371 | ||
| 1410 | MX6Q_PAD_NANDF_CS2__IPU1_SISG_0 1372 | ||
| 1411 | MX6Q_PAD_NANDF_CS2__ESAI1_TX0 1373 | ||
| 1412 | MX6Q_PAD_NANDF_CS2__WEIM_WEIM_CRE 1374 | ||
| 1413 | MX6Q_PAD_NANDF_CS2__CCM_CLKO2 1375 | ||
| 1414 | MX6Q_PAD_NANDF_CS2__GPIO_6_15 1376 | ||
| 1415 | MX6Q_PAD_NANDF_CS2__IPU2_SISG_0 1377 | ||
| 1416 | MX6Q_PAD_NANDF_CS3__RAWNAND_CE3N 1378 | ||
| 1417 | MX6Q_PAD_NANDF_CS3__IPU1_SISG_1 1379 | ||
| 1418 | MX6Q_PAD_NANDF_CS3__ESAI1_TX1 1380 | ||
| 1419 | MX6Q_PAD_NANDF_CS3__WEIM_WEIM_A_26 1381 | ||
| 1420 | MX6Q_PAD_NANDF_CS3__PCIE_CTRL_MUX_4 1382 | ||
| 1421 | MX6Q_PAD_NANDF_CS3__GPIO_6_16 1383 | ||
| 1422 | MX6Q_PAD_NANDF_CS3__IPU2_SISG_1 1384 | ||
| 1423 | MX6Q_PAD_NANDF_CS3__TPSMP_CLK 1385 | ||
| 1424 | MX6Q_PAD_SD4_CMD__USDHC4_CMD 1386 | ||
| 1425 | MX6Q_PAD_SD4_CMD__RAWNAND_RDN 1387 | ||
| 1426 | MX6Q_PAD_SD4_CMD__UART3_TXD 1388 | ||
| 1427 | MX6Q_PAD_SD4_CMD__PCIE_CTRL_MUX_5 1389 | ||
| 1428 | MX6Q_PAD_SD4_CMD__GPIO_7_9 1390 | ||
| 1429 | MX6Q_PAD_SD4_CMD__TPSMP_HDATA_DIR 1391 | ||
| 1430 | MX6Q_PAD_SD4_CLK__USDHC4_CLK 1392 | ||
| 1431 | MX6Q_PAD_SD4_CLK__RAWNAND_WRN 1393 | ||
| 1432 | MX6Q_PAD_SD4_CLK__UART3_RXD 1394 | ||
| 1433 | MX6Q_PAD_SD4_CLK__PCIE_CTRL_MUX_6 1395 | ||
| 1434 | MX6Q_PAD_SD4_CLK__GPIO_7_10 1396 | ||
| 1435 | MX6Q_PAD_NANDF_D0__RAWNAND_D0 1397 | ||
| 1436 | MX6Q_PAD_NANDF_D0__USDHC1_DAT4 1398 | ||
| 1437 | MX6Q_PAD_NANDF_D0__GPU3D_GPU_DBG_OUT_0 1399 | ||
| 1438 | MX6Q_PAD_NANDF_D0__USBOH3_UH2_DFD_OUT16 1400 | ||
| 1439 | MX6Q_PAD_NANDF_D0__USBOH3_UH3_DFD_OUT16 1401 | ||
| 1440 | MX6Q_PAD_NANDF_D0__GPIO_2_0 1402 | ||
| 1441 | MX6Q_PAD_NANDF_D0__IPU1_IPU_DIAG_BUS_0 1403 | ||
| 1442 | MX6Q_PAD_NANDF_D0__IPU2_IPU_DIAG_BUS_0 1404 | ||
| 1443 | MX6Q_PAD_NANDF_D1__RAWNAND_D1 1405 | ||
| 1444 | MX6Q_PAD_NANDF_D1__USDHC1_DAT5 1406 | ||
| 1445 | MX6Q_PAD_NANDF_D1__GPU3D_GPU_DEBUG_OUT1 1407 | ||
| 1446 | MX6Q_PAD_NANDF_D1__USBOH3_UH2_DFD_OUT17 1408 | ||
| 1447 | MX6Q_PAD_NANDF_D1__USBOH3_UH3_DFD_OUT17 1409 | ||
| 1448 | MX6Q_PAD_NANDF_D1__GPIO_2_1 1410 | ||
| 1449 | MX6Q_PAD_NANDF_D1__IPU1_IPU_DIAG_BUS_1 1411 | ||
| 1450 | MX6Q_PAD_NANDF_D1__IPU2_IPU_DIAG_BUS_1 1412 | ||
| 1451 | MX6Q_PAD_NANDF_D2__RAWNAND_D2 1413 | ||
| 1452 | MX6Q_PAD_NANDF_D2__USDHC1_DAT6 1414 | ||
| 1453 | MX6Q_PAD_NANDF_D2__GPU3D_GPU_DBG_OUT_2 1415 | ||
| 1454 | MX6Q_PAD_NANDF_D2__USBOH3_UH2_DFD_OUT18 1416 | ||
| 1455 | MX6Q_PAD_NANDF_D2__USBOH3_UH3_DFD_OUT18 1417 | ||
| 1456 | MX6Q_PAD_NANDF_D2__GPIO_2_2 1418 | ||
| 1457 | MX6Q_PAD_NANDF_D2__IPU1_IPU_DIAG_BUS_2 1419 | ||
| 1458 | MX6Q_PAD_NANDF_D2__IPU2_IPU_DIAG_BUS_2 1420 | ||
| 1459 | MX6Q_PAD_NANDF_D3__RAWNAND_D3 1421 | ||
| 1460 | MX6Q_PAD_NANDF_D3__USDHC1_DAT7 1422 | ||
| 1461 | MX6Q_PAD_NANDF_D3__GPU3D_GPU_DBG_OUT_3 1423 | ||
| 1462 | MX6Q_PAD_NANDF_D3__USBOH3_UH2_DFD_OUT19 1424 | ||
| 1463 | MX6Q_PAD_NANDF_D3__USBOH3_UH3_DFD_OUT19 1425 | ||
| 1464 | MX6Q_PAD_NANDF_D3__GPIO_2_3 1426 | ||
| 1465 | MX6Q_PAD_NANDF_D3__IPU1_IPU_DIAG_BUS_3 1427 | ||
| 1466 | MX6Q_PAD_NANDF_D3__IPU2_IPU_DIAG_BUS_3 1428 | ||
| 1467 | MX6Q_PAD_NANDF_D4__RAWNAND_D4 1429 | ||
| 1468 | MX6Q_PAD_NANDF_D4__USDHC2_DAT4 1430 | ||
| 1469 | MX6Q_PAD_NANDF_D4__GPU3D_GPU_DBG_OUT_4 1431 | ||
| 1470 | MX6Q_PAD_NANDF_D4__USBOH3_UH2_DFD_OUT20 1432 | ||
| 1471 | MX6Q_PAD_NANDF_D4__USBOH3_UH3_DFD_OUT20 1433 | ||
| 1472 | MX6Q_PAD_NANDF_D4__GPIO_2_4 1434 | ||
| 1473 | MX6Q_PAD_NANDF_D4__IPU1_IPU_DIAG_BUS_4 1435 | ||
| 1474 | MX6Q_PAD_NANDF_D4__IPU2_IPU_DIAG_BUS_4 1436 | ||
| 1475 | MX6Q_PAD_NANDF_D5__RAWNAND_D5 1437 | ||
| 1476 | MX6Q_PAD_NANDF_D5__USDHC2_DAT5 1438 | ||
| 1477 | MX6Q_PAD_NANDF_D5__GPU3D_GPU_DBG_OUT_5 1439 | ||
| 1478 | MX6Q_PAD_NANDF_D5__USBOH3_UH2_DFD_OUT21 1440 | ||
| 1479 | MX6Q_PAD_NANDF_D5__USBOH3_UH3_DFD_OUT21 1441 | ||
| 1480 | MX6Q_PAD_NANDF_D5__GPIO_2_5 1442 | ||
| 1481 | MX6Q_PAD_NANDF_D5__IPU1_IPU_DIAG_BUS_5 1443 | ||
| 1482 | MX6Q_PAD_NANDF_D5__IPU2_IPU_DIAG_BUS_5 1444 | ||
| 1483 | MX6Q_PAD_NANDF_D6__RAWNAND_D6 1445 | ||
| 1484 | MX6Q_PAD_NANDF_D6__USDHC2_DAT6 1446 | ||
| 1485 | MX6Q_PAD_NANDF_D6__GPU3D_GPU_DBG_OUT_6 1447 | ||
| 1486 | MX6Q_PAD_NANDF_D6__USBOH3_UH2_DFD_OUT22 1448 | ||
| 1487 | MX6Q_PAD_NANDF_D6__USBOH3_UH3_DFD_OUT22 1449 | ||
| 1488 | MX6Q_PAD_NANDF_D6__GPIO_2_6 1450 | ||
| 1489 | MX6Q_PAD_NANDF_D6__IPU1_IPU_DIAG_BUS_6 1451 | ||
| 1490 | MX6Q_PAD_NANDF_D6__IPU2_IPU_DIAG_BUS_6 1452 | ||
| 1491 | MX6Q_PAD_NANDF_D7__RAWNAND_D7 1453 | ||
| 1492 | MX6Q_PAD_NANDF_D7__USDHC2_DAT7 1454 | ||
| 1493 | MX6Q_PAD_NANDF_D7__GPU3D_GPU_DBG_OUT_7 1455 | ||
| 1494 | MX6Q_PAD_NANDF_D7__USBOH3_UH2_DFD_OUT23 1456 | ||
| 1495 | MX6Q_PAD_NANDF_D7__USBOH3_UH3_DFD_OUT23 1457 | ||
| 1496 | MX6Q_PAD_NANDF_D7__GPIO_2_7 1458 | ||
| 1497 | MX6Q_PAD_NANDF_D7__IPU1_IPU_DIAG_BUS_7 1459 | ||
| 1498 | MX6Q_PAD_NANDF_D7__IPU2_IPU_DIAG_BUS_7 1460 | ||
| 1499 | MX6Q_PAD_SD4_DAT0__RAWNAND_D8 1461 | ||
| 1500 | MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 1462 | ||
| 1501 | MX6Q_PAD_SD4_DAT0__RAWNAND_DQS 1463 | ||
| 1502 | MX6Q_PAD_SD4_DAT0__USBOH3_UH2_DFD_OUT24 1464 | ||
| 1503 | MX6Q_PAD_SD4_DAT0__USBOH3_UH3_DFD_OUT24 1465 | ||
| 1504 | MX6Q_PAD_SD4_DAT0__GPIO_2_8 1466 | ||
| 1505 | MX6Q_PAD_SD4_DAT0__IPU1_IPU_DIAG_BUS_8 1467 | ||
| 1506 | MX6Q_PAD_SD4_DAT0__IPU2_IPU_DIAG_BUS_8 1468 | ||
| 1507 | MX6Q_PAD_SD4_DAT1__RAWNAND_D9 1469 | ||
| 1508 | MX6Q_PAD_SD4_DAT1__USDHC4_DAT1 1470 | ||
| 1509 | MX6Q_PAD_SD4_DAT1__PWM3_PWMO 1471 | ||
| 1510 | MX6Q_PAD_SD4_DAT1__USBOH3_UH2_DFD_OUT25 1472 | ||
| 1511 | MX6Q_PAD_SD4_DAT1__USBOH3_UH3_DFD_OUT25 1473 | ||
| 1512 | MX6Q_PAD_SD4_DAT1__GPIO_2_9 1474 | ||
| 1513 | MX6Q_PAD_SD4_DAT1__IPU1_IPU_DIAG_BUS_9 1475 | ||
| 1514 | MX6Q_PAD_SD4_DAT1__IPU2_IPU_DIAG_BUS_9 1476 | ||
| 1515 | MX6Q_PAD_SD4_DAT2__RAWNAND_D10 1477 | ||
| 1516 | MX6Q_PAD_SD4_DAT2__USDHC4_DAT2 1478 | ||
| 1517 | MX6Q_PAD_SD4_DAT2__PWM4_PWMO 1479 | ||
| 1518 | MX6Q_PAD_SD4_DAT2__USBOH3_UH2_DFD_OUT26 1480 | ||
| 1519 | MX6Q_PAD_SD4_DAT2__USBOH3_UH3_DFD_OUT26 1481 | ||
| 1520 | MX6Q_PAD_SD4_DAT2__GPIO_2_10 1482 | ||
| 1521 | MX6Q_PAD_SD4_DAT2__IPU1_IPU_DIAG_BUS_10 1483 | ||
| 1522 | MX6Q_PAD_SD4_DAT2__IPU2_IPU_DIAG_BUS_10 1484 | ||
| 1523 | MX6Q_PAD_SD4_DAT3__RAWNAND_D11 1485 | ||
| 1524 | MX6Q_PAD_SD4_DAT3__USDHC4_DAT3 1486 | ||
| 1525 | MX6Q_PAD_SD4_DAT3__USBOH3_UH2_DFD_OUT27 1487 | ||
| 1526 | MX6Q_PAD_SD4_DAT3__USBOH3_UH3_DFD_OUT27 1488 | ||
| 1527 | MX6Q_PAD_SD4_DAT3__GPIO_2_11 1489 | ||
| 1528 | MX6Q_PAD_SD4_DAT3__IPU1_IPU_DIAG_BUS_11 1490 | ||
| 1529 | MX6Q_PAD_SD4_DAT3__IPU2_IPU_DIAG_BUS_11 1491 | ||
| 1530 | MX6Q_PAD_SD4_DAT4__RAWNAND_D12 1492 | ||
| 1531 | MX6Q_PAD_SD4_DAT4__USDHC4_DAT4 1493 | ||
| 1532 | MX6Q_PAD_SD4_DAT4__UART2_RXD 1494 | ||
| 1533 | MX6Q_PAD_SD4_DAT4__USBOH3_UH2_DFD_OUT28 1495 | ||
| 1534 | MX6Q_PAD_SD4_DAT4__USBOH3_UH3_DFD_OUT28 1496 | ||
| 1535 | MX6Q_PAD_SD4_DAT4__GPIO_2_12 1497 | ||
| 1536 | MX6Q_PAD_SD4_DAT4__IPU1_IPU_DIAG_BUS_12 1498 | ||
| 1537 | MX6Q_PAD_SD4_DAT4__IPU2_IPU_DIAG_BUS_12 1499 | ||
| 1538 | MX6Q_PAD_SD4_DAT5__RAWNAND_D13 1500 | ||
| 1539 | MX6Q_PAD_SD4_DAT5__USDHC4_DAT5 1501 | ||
| 1540 | MX6Q_PAD_SD4_DAT5__UART2_RTS 1502 | ||
| 1541 | MX6Q_PAD_SD4_DAT5__USBOH3_UH2_DFD_OUT29 1503 | ||
| 1542 | MX6Q_PAD_SD4_DAT5__USBOH3_UH3_DFD_OUT29 1504 | ||
| 1543 | MX6Q_PAD_SD4_DAT5__GPIO_2_13 1505 | ||
| 1544 | MX6Q_PAD_SD4_DAT5__IPU1_IPU_DIAG_BUS_13 1506 | ||
| 1545 | MX6Q_PAD_SD4_DAT5__IPU2_IPU_DIAG_BUS_13 1507 | ||
| 1546 | MX6Q_PAD_SD4_DAT6__RAWNAND_D14 1508 | ||
| 1547 | MX6Q_PAD_SD4_DAT6__USDHC4_DAT6 1509 | ||
| 1548 | MX6Q_PAD_SD4_DAT6__UART2_CTS 1510 | ||
| 1549 | MX6Q_PAD_SD4_DAT6__USBOH3_UH2_DFD_OUT30 1511 | ||
| 1550 | MX6Q_PAD_SD4_DAT6__USBOH3_UH3_DFD_OUT30 1512 | ||
| 1551 | MX6Q_PAD_SD4_DAT6__GPIO_2_14 1513 | ||
| 1552 | MX6Q_PAD_SD4_DAT6__IPU1_IPU_DIAG_BUS_14 1514 | ||
| 1553 | MX6Q_PAD_SD4_DAT6__IPU2_IPU_DIAG_BUS_14 1515 | ||
| 1554 | MX6Q_PAD_SD4_DAT7__RAWNAND_D15 1516 | ||
| 1555 | MX6Q_PAD_SD4_DAT7__USDHC4_DAT7 1517 | ||
| 1556 | MX6Q_PAD_SD4_DAT7__UART2_TXD 1518 | ||
| 1557 | MX6Q_PAD_SD4_DAT7__USBOH3_UH2_DFD_OUT31 1519 | ||
| 1558 | MX6Q_PAD_SD4_DAT7__USBOH3_UH3_DFD_OUT31 1520 | ||
| 1559 | MX6Q_PAD_SD4_DAT7__GPIO_2_15 1521 | ||
| 1560 | MX6Q_PAD_SD4_DAT7__IPU1_IPU_DIAG_BUS_15 1522 | ||
| 1561 | MX6Q_PAD_SD4_DAT7__IPU2_IPU_DIAG_BUS_15 1523 | ||
| 1562 | MX6Q_PAD_SD1_DAT1__USDHC1_DAT1 1524 | ||
| 1563 | MX6Q_PAD_SD1_DAT1__ECSPI5_SS0 1525 | ||
| 1564 | MX6Q_PAD_SD1_DAT1__PWM3_PWMO 1526 | ||
| 1565 | MX6Q_PAD_SD1_DAT1__GPT_CAPIN2 1527 | ||
| 1566 | MX6Q_PAD_SD1_DAT1__PCIE_CTRL_MUX_7 1528 | ||
| 1567 | MX6Q_PAD_SD1_DAT1__GPIO_1_17 1529 | ||
| 1568 | MX6Q_PAD_SD1_DAT1__HDMI_TX_OPHYDTB_0 1530 | ||
| 1569 | MX6Q_PAD_SD1_DAT1__ANATOP_TESTO_8 1531 | ||
| 1570 | MX6Q_PAD_SD1_DAT0__USDHC1_DAT0 1532 | ||
| 1571 | MX6Q_PAD_SD1_DAT0__ECSPI5_MISO 1533 | ||
| 1572 | MX6Q_PAD_SD1_DAT0__CAAM_WRAP_RNG_OSCOBS 1534 | ||
| 1573 | MX6Q_PAD_SD1_DAT0__GPT_CAPIN1 1535 | ||
| 1574 | MX6Q_PAD_SD1_DAT0__PCIE_CTRL_MUX_8 1536 | ||
| 1575 | MX6Q_PAD_SD1_DAT0__GPIO_1_16 1537 | ||
| 1576 | MX6Q_PAD_SD1_DAT0__HDMI_TX_OPHYDTB_1 1538 | ||
| 1577 | MX6Q_PAD_SD1_DAT0__ANATOP_TESTO_7 1539 | ||
| 1578 | MX6Q_PAD_SD1_DAT3__USDHC1_DAT3 1540 | ||
| 1579 | MX6Q_PAD_SD1_DAT3__ECSPI5_SS2 1541 | ||
| 1580 | MX6Q_PAD_SD1_DAT3__GPT_CMPOUT3 1542 | ||
| 1581 | MX6Q_PAD_SD1_DAT3__PWM1_PWMO 1543 | ||
| 1582 | MX6Q_PAD_SD1_DAT3__WDOG2_WDOG_B 1544 | ||
| 1583 | MX6Q_PAD_SD1_DAT3__GPIO_1_21 1545 | ||
| 1584 | MX6Q_PAD_SD1_DAT3__WDOG2_WDOG_RST_B_DEB 1546 | ||
| 1585 | MX6Q_PAD_SD1_DAT3__ANATOP_TESTO_6 1547 | ||
| 1586 | MX6Q_PAD_SD1_CMD__USDHC1_CMD 1548 | ||
| 1587 | MX6Q_PAD_SD1_CMD__ECSPI5_MOSI 1549 | ||
| 1588 | MX6Q_PAD_SD1_CMD__PWM4_PWMO 1550 | ||
| 1589 | MX6Q_PAD_SD1_CMD__GPT_CMPOUT1 1551 | ||
| 1590 | MX6Q_PAD_SD1_CMD__GPIO_1_18 1552 | ||
| 1591 | MX6Q_PAD_SD1_CMD__ANATOP_TESTO_5 1553 | ||
| 1592 | MX6Q_PAD_SD1_DAT2__USDHC1_DAT2 1554 | ||
| 1593 | MX6Q_PAD_SD1_DAT2__ECSPI5_SS1 1555 | ||
| 1594 | MX6Q_PAD_SD1_DAT2__GPT_CMPOUT2 1556 | ||
| 1595 | MX6Q_PAD_SD1_DAT2__PWM2_PWMO 1557 | ||
| 1596 | MX6Q_PAD_SD1_DAT2__WDOG1_WDOG_B 1558 | ||
| 1597 | MX6Q_PAD_SD1_DAT2__GPIO_1_19 1559 | ||
| 1598 | MX6Q_PAD_SD1_DAT2__WDOG1_WDOG_RST_B_DEB 1560 | ||
| 1599 | MX6Q_PAD_SD1_DAT2__ANATOP_TESTO_4 1561 | ||
| 1600 | MX6Q_PAD_SD1_CLK__USDHC1_CLK 1562 | ||
| 1601 | MX6Q_PAD_SD1_CLK__ECSPI5_SCLK 1563 | ||
| 1602 | MX6Q_PAD_SD1_CLK__OSC32K_32K_OUT 1564 | ||
| 1603 | MX6Q_PAD_SD1_CLK__GPT_CLKIN 1565 | ||
| 1604 | MX6Q_PAD_SD1_CLK__GPIO_1_20 1566 | ||
| 1605 | MX6Q_PAD_SD1_CLK__PHY_DTB_0 1567 | ||
| 1606 | MX6Q_PAD_SD1_CLK__SATA_PHY_DTB_0 1568 | ||
| 1607 | MX6Q_PAD_SD2_CLK__USDHC2_CLK 1569 | ||
| 1608 | MX6Q_PAD_SD2_CLK__ECSPI5_SCLK 1570 | ||
| 1609 | MX6Q_PAD_SD2_CLK__KPP_COL_5 1571 | ||
| 1610 | MX6Q_PAD_SD2_CLK__AUDMUX_AUD4_RXFS 1572 | ||
| 1611 | MX6Q_PAD_SD2_CLK__PCIE_CTRL_MUX_9 1573 | ||
| 1612 | MX6Q_PAD_SD2_CLK__GPIO_1_10 1574 | ||
| 1613 | MX6Q_PAD_SD2_CLK__PHY_DTB_1 1575 | ||
| 1614 | MX6Q_PAD_SD2_CLK__SATA_PHY_DTB_1 1576 | ||
| 1615 | MX6Q_PAD_SD2_CMD__USDHC2_CMD 1577 | ||
| 1616 | MX6Q_PAD_SD2_CMD__ECSPI5_MOSI 1578 | ||
| 1617 | MX6Q_PAD_SD2_CMD__KPP_ROW_5 1579 | ||
| 1618 | MX6Q_PAD_SD2_CMD__AUDMUX_AUD4_RXC 1580 | ||
| 1619 | MX6Q_PAD_SD2_CMD__PCIE_CTRL_MUX_10 1581 | ||
| 1620 | MX6Q_PAD_SD2_CMD__GPIO_1_11 1582 | ||
| 1621 | MX6Q_PAD_SD2_DAT3__USDHC2_DAT3 1583 | ||
| 1622 | MX6Q_PAD_SD2_DAT3__ECSPI5_SS3 1584 | ||
| 1623 | MX6Q_PAD_SD2_DAT3__KPP_COL_6 1585 | ||
| 1624 | MX6Q_PAD_SD2_DAT3__AUDMUX_AUD4_TXC 1586 | ||
| 1625 | MX6Q_PAD_SD2_DAT3__PCIE_CTRL_MUX_11 1587 | ||
| 1626 | MX6Q_PAD_SD2_DAT3__GPIO_1_12 1588 | ||
| 1627 | MX6Q_PAD_SD2_DAT3__SJC_DONE 1589 | ||
| 1628 | MX6Q_PAD_SD2_DAT3__ANATOP_TESTO_3 1590 | ||
| @@ -0,0 +1,918 @@ | |||
| 1 | * Freescale MXS Pin Controller | ||
| 2 | |||
| 3 | The pins controlled by mxs pin controller are organized in banks, each bank | ||
| 4 | has 32 pins. Each pin has 4 multiplexing functions, and generally, the 4th | ||
| 5 | function is GPIO. The configuration on the pins includes drive strength, | ||
| 6 | voltage and pull-up. | ||
| 7 | |||
| 8 | Required properties: | ||
| 9 | - compatible: "fsl,imx23-pinctrl" or "fsl,imx28-pinctrl" | ||
| 10 | - reg: Should contain the register physical address and length for the | ||
| 11 | pin controller. | ||
| 12 | |||
| 13 | Please refer to pinctrl-bindings.txt in this directory for details of the | ||
| 14 | common pinctrl bindings used by client devices. | ||
| 15 | |||
| 16 | The node of mxs pin controller acts as a container for an arbitrary number of | ||
| 17 | subnodes. Each of these subnodes represents some desired configuration for | ||
| 18 | a group of pins, and only affects those parameters that are explicitly listed. | ||
| 19 | In other words, a subnode that describes a drive strength parameter implies no | ||
| 20 | information about pull-up. For this reason, even seemingly boolean values are | ||
| 21 | actually tristates in this binding: unspecified, off, or on. Unspecified is | ||
| 22 | represented as an absent property, and off/on are represented as integer | ||
| 23 | values 0 and 1. | ||
| 24 | |||
| 25 | Those subnodes under mxs pin controller node will fall into two categories. | ||
| 26 | One is to set up a group of pins for a function, both mux selection and pin | ||
| 27 | configurations, and it's called group node in the binding document. The other | ||
| 28 | one is to adjust the pin configuration for some particular pins that need a | ||
| 29 | different configuration than what is defined in group node. The binding | ||
| 30 | document calls this type of node config node. | ||
| 31 | |||
| 32 | On mxs, there is no hardware pin group. The pin group in this binding only | ||
| 33 | means a group of pins put together for particular peripheral to work in | ||
| 34 | particular function, like SSP0 functioning as mmc0-8bit. That said, the | ||
| 35 | group node should include all the pins needed for one function rather than | ||
| 36 | having these pins defined in several group nodes. It also means each of | ||
| 37 | "pinctrl-*" phandle in client device node should only have one group node | ||
| 38 | pointed in there, while the phandle can have multiple config node referenced | ||
| 39 | there to adjust configurations for some pins in the group. | ||
| 40 | |||
| 41 | Required subnode-properties: | ||
| 42 | - fsl,pinmux-ids: An integer array. Each integer in the array specify a pin | ||
| 43 | with given mux function, with bank, pin and mux packed as below. | ||
| 44 | |||
| 45 | [15..12] : bank number | ||
| 46 | [11..4] : pin number | ||
| 47 | [3..0] : mux selection | ||
| 48 | |||
| 49 | This integer with mux selection packed is used as an entity by both group | ||
| 50 | and config nodes to identify a pin. The mux selection in the integer takes | ||
| 51 | effects only on group node, and will get ignored by driver with config node, | ||
| 52 | since config node is only meant to set up pin configurations. | ||
| 53 | |||
| 54 | Valid values for these integers are listed below. | ||
| 55 | |||
| 56 | - reg: Should be the index of the group nodes for same function. This property | ||
| 57 | is required only for group nodes, and should not be present in any config | ||
| 58 | nodes. | ||
| 59 | |||
| 60 | Optional subnode-properties: | ||
| 61 | - fsl,drive-strength: Integer. | ||
| 62 | 0: 4 mA | ||
| 63 | 1: 8 mA | ||
| 64 | 2: 12 mA | ||
| 65 | 3: 16 mA | ||
| 66 | - fsl,voltage: Integer. | ||
| 67 | 0: 1.8 V | ||
| 68 | 1: 3.3 V | ||
| 69 | - fsl,pull-up: Integer. | ||
| 70 | 0: Disable the internal pull-up | ||
| 71 | 1: Enable the internal pull-up | ||
| 72 | |||
| 73 | Examples: | ||
| 74 | |||
| 75 | pinctrl@80018000 { | ||
| 76 | #address-cells = <1>; | ||
| 77 | #size-cells = <0>; | ||
| 78 | compatible = "fsl,imx28-pinctrl"; | ||
| 79 | reg = <0x80018000 2000>; | ||
| 80 | |||
| 81 | mmc0_8bit_pins_a: mmc0-8bit@0 { | ||
| 82 | reg = <0>; | ||
| 83 | fsl,pinmux-ids = < | ||
| 84 | 0x2000 0x2010 0x2020 0x2030 | ||
| 85 | 0x2040 0x2050 0x2060 0x2070 | ||
| 86 | 0x2080 0x2090 0x20a0>; | ||
| 87 | fsl,drive-strength = <1>; | ||
| 88 | fsl,voltage = <1>; | ||
| 89 | fsl,pull-up = <1>; | ||
| 90 | }; | ||
| 91 | |||
| 92 | mmc_cd_cfg: mmc-cd-cfg { | ||
| 93 | fsl,pinmux-ids = <0x2090>; | ||
| 94 | fsl,pull-up = <0>; | ||
| 95 | }; | ||
| 96 | |||
| 97 | mmc_sck_cfg: mmc-sck-cfg { | ||
| 98 | fsl,pinmux-ids = <0x20a0>; | ||
| 99 | fsl,drive-strength = <2>; | ||
| 100 | fsl,pull-up = <0>; | ||
| 101 | }; | ||
| 102 | }; | ||
| 103 | |||
| 104 | In this example, group node mmc0-8bit defines a group of pins for mxs SSP0 | ||
| 105 | to function as a 8-bit mmc device, with 8mA, 3.3V and pull-up configurations | ||
| 106 | applied on all these pins. And config nodes mmc-cd-cfg and mmc-sck-cfg are | ||
| 107 | adjusting the configuration for pins card-detection and clock from what group | ||
| 108 | node mmc0-8bit defines. Only the configuration properties to be adjusted need | ||
| 109 | to be listed in the config nodes. | ||
| 110 | |||
| 111 | Valid values for i.MX28 pinmux-id: | ||
| 112 | |||
| 113 | pinmux id | ||
| 114 | ------ -- | ||
| 115 | MX28_PAD_GPMI_D00__GPMI_D0 0x0000 | ||
| 116 | MX28_PAD_GPMI_D01__GPMI_D1 0x0010 | ||
| 117 | MX28_PAD_GPMI_D02__GPMI_D2 0x0020 | ||
| 118 | MX28_PAD_GPMI_D03__GPMI_D3 0x0030 | ||
| 119 | MX28_PAD_GPMI_D04__GPMI_D4 0x0040 | ||
| 120 | MX28_PAD_GPMI_D05__GPMI_D5 0x0050 | ||
| 121 | MX28_PAD_GPMI_D06__GPMI_D6 0x0060 | ||
| 122 | MX28_PAD_GPMI_D07__GPMI_D7 0x0070 | ||
| 123 | MX28_PAD_GPMI_CE0N__GPMI_CE0N 0x0100 | ||
| 124 | MX28_PAD_GPMI_CE1N__GPMI_CE1N 0x0110 | ||
| 125 | MX28_PAD_GPMI_CE2N__GPMI_CE2N 0x0120 | ||
| 126 | MX28_PAD_GPMI_CE3N__GPMI_CE3N 0x0130 | ||
| 127 | MX28_PAD_GPMI_RDY0__GPMI_READY0 0x0140 | ||
| 128 | MX28_PAD_GPMI_RDY1__GPMI_READY1 0x0150 | ||
| 129 | MX28_PAD_GPMI_RDY2__GPMI_READY2 0x0160 | ||
| 130 | MX28_PAD_GPMI_RDY3__GPMI_READY3 0x0170 | ||
| 131 | MX28_PAD_GPMI_RDN__GPMI_RDN 0x0180 | ||
| 132 | MX28_PAD_GPMI_WRN__GPMI_WRN 0x0190 | ||
| 133 | MX28_PAD_GPMI_ALE__GPMI_ALE 0x01a0 | ||
| 134 | MX28_PAD_GPMI_CLE__GPMI_CLE 0x01b0 | ||
| 135 | MX28_PAD_GPMI_RESETN__GPMI_RESETN 0x01c0 | ||
| 136 | MX28_PAD_LCD_D00__LCD_D0 0x1000 | ||
| 137 | MX28_PAD_LCD_D01__LCD_D1 0x1010 | ||
| 138 | MX28_PAD_LCD_D02__LCD_D2 0x1020 | ||
| 139 | MX28_PAD_LCD_D03__LCD_D3 0x1030 | ||
| 140 | MX28_PAD_LCD_D04__LCD_D4 0x1040 | ||
| 141 | MX28_PAD_LCD_D05__LCD_D5 0x1050 | ||
| 142 | MX28_PAD_LCD_D06__LCD_D6 0x1060 | ||
| 143 | MX28_PAD_LCD_D07__LCD_D7 0x1070 | ||
| 144 | MX28_PAD_LCD_D08__LCD_D8 0x1080 | ||
| 145 | MX28_PAD_LCD_D09__LCD_D9 0x1090 | ||
| 146 | MX28_PAD_LCD_D10__LCD_D10 0x10a0 | ||
| 147 | MX28_PAD_LCD_D11__LCD_D11 0x10b0 | ||
| 148 | MX28_PAD_LCD_D12__LCD_D12 0x10c0 | ||
| 149 | MX28_PAD_LCD_D13__LCD_D13 0x10d0 | ||
| 150 | MX28_PAD_LCD_D14__LCD_D14 0x10e0 | ||
| 151 | MX28_PAD_LCD_D15__LCD_D15 0x10f0 | ||
| 152 | MX28_PAD_LCD_D16__LCD_D16 0x1100 | ||
| 153 | MX28_PAD_LCD_D17__LCD_D17 0x1110 | ||
| 154 | MX28_PAD_LCD_D18__LCD_D18 0x1120 | ||
| 155 | MX28_PAD_LCD_D19__LCD_D19 0x1130 | ||
| 156 | MX28_PAD_LCD_D20__LCD_D20 0x1140 | ||
| 157 | MX28_PAD_LCD_D21__LCD_D21 0x1150 | ||
| 158 | MX28_PAD_LCD_D22__LCD_D22 0x1160 | ||
| 159 | MX28_PAD_LCD_D23__LCD_D23 0x1170 | ||
| 160 | MX28_PAD_LCD_RD_E__LCD_RD_E 0x1180 | ||
| 161 | MX28_PAD_LCD_WR_RWN__LCD_WR_RWN 0x1190 | ||
| 162 | MX28_PAD_LCD_RS__LCD_RS 0x11a0 | ||
| 163 | MX28_PAD_LCD_CS__LCD_CS 0x11b0 | ||
| 164 | MX28_PAD_LCD_VSYNC__LCD_VSYNC 0x11c0 | ||
| 165 | MX28_PAD_LCD_HSYNC__LCD_HSYNC 0x11d0 | ||
| 166 | MX28_PAD_LCD_DOTCLK__LCD_DOTCLK 0x11e0 | ||
| 167 | MX28_PAD_LCD_ENABLE__LCD_ENABLE 0x11f0 | ||
| 168 | MX28_PAD_SSP0_DATA0__SSP0_D0 0x2000 | ||
| 169 | MX28_PAD_SSP0_DATA1__SSP0_D1 0x2010 | ||
| 170 | MX28_PAD_SSP0_DATA2__SSP0_D2 0x2020 | ||
| 171 | MX28_PAD_SSP0_DATA3__SSP0_D3 0x2030 | ||
| 172 | MX28_PAD_SSP0_DATA4__SSP0_D4 0x2040 | ||
| 173 | MX28_PAD_SSP0_DATA5__SSP0_D5 0x2050 | ||
| 174 | MX28_PAD_SSP0_DATA6__SSP0_D6 0x2060 | ||
| 175 | MX28_PAD_SSP0_DATA7__SSP0_D7 0x2070 | ||
| 176 | MX28_PAD_SSP0_CMD__SSP0_CMD 0x2080 | ||
| 177 | MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT 0x2090 | ||
| 178 | MX28_PAD_SSP0_SCK__SSP0_SCK 0x20a0 | ||
| 179 | MX28_PAD_SSP1_SCK__SSP1_SCK 0x20c0 | ||
| 180 | MX28_PAD_SSP1_CMD__SSP1_CMD 0x20d0 | ||
| 181 | MX28_PAD_SSP1_DATA0__SSP1_D0 0x20e0 | ||
| 182 | MX28_PAD_SSP1_DATA3__SSP1_D3 0x20f0 | ||
| 183 | MX28_PAD_SSP2_SCK__SSP2_SCK 0x2100 | ||
| 184 | MX28_PAD_SSP2_MOSI__SSP2_CMD 0x2110 | ||
| 185 | MX28_PAD_SSP2_MISO__SSP2_D0 0x2120 | ||
| 186 | MX28_PAD_SSP2_SS0__SSP2_D3 0x2130 | ||
| 187 | MX28_PAD_SSP2_SS1__SSP2_D4 0x2140 | ||
| 188 | MX28_PAD_SSP2_SS2__SSP2_D5 0x2150 | ||
| 189 | MX28_PAD_SSP3_SCK__SSP3_SCK 0x2180 | ||
| 190 | MX28_PAD_SSP3_MOSI__SSP3_CMD 0x2190 | ||
| 191 | MX28_PAD_SSP3_MISO__SSP3_D0 0x21a0 | ||
| 192 | MX28_PAD_SSP3_SS0__SSP3_D3 0x21b0 | ||
| 193 | MX28_PAD_AUART0_RX__AUART0_RX 0x3000 | ||
| 194 | MX28_PAD_AUART0_TX__AUART0_TX 0x3010 | ||
| 195 | MX28_PAD_AUART0_CTS__AUART0_CTS 0x3020 | ||
| 196 | MX28_PAD_AUART0_RTS__AUART0_RTS 0x3030 | ||
| 197 | MX28_PAD_AUART1_RX__AUART1_RX 0x3040 | ||
| 198 | MX28_PAD_AUART1_TX__AUART1_TX 0x3050 | ||
| 199 | MX28_PAD_AUART1_CTS__AUART1_CTS 0x3060 | ||
| 200 | MX28_PAD_AUART1_RTS__AUART1_RTS 0x3070 | ||
| 201 | MX28_PAD_AUART2_RX__AUART2_RX 0x3080 | ||
| 202 | MX28_PAD_AUART2_TX__AUART2_TX 0x3090 | ||
| 203 | MX28_PAD_AUART2_CTS__AUART2_CTS 0x30a0 | ||
| 204 | MX28_PAD_AUART2_RTS__AUART2_RTS 0x30b0 | ||
| 205 | MX28_PAD_AUART3_RX__AUART3_RX 0x30c0 | ||
| 206 | MX28_PAD_AUART3_TX__AUART3_TX 0x30d0 | ||
| 207 | MX28_PAD_AUART3_CTS__AUART3_CTS 0x30e0 | ||
| 208 | MX28_PAD_AUART3_RTS__AUART3_RTS 0x30f0 | ||
| 209 | MX28_PAD_PWM0__PWM_0 0x3100 | ||
| 210 | MX28_PAD_PWM1__PWM_1 0x3110 | ||
| 211 | MX28_PAD_PWM2__PWM_2 0x3120 | ||
| 212 | MX28_PAD_SAIF0_MCLK__SAIF0_MCLK 0x3140 | ||
| 213 | MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK 0x3150 | ||
| 214 | MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK 0x3160 | ||
| 215 | MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 0x3170 | ||
| 216 | MX28_PAD_I2C0_SCL__I2C0_SCL 0x3180 | ||
| 217 | MX28_PAD_I2C0_SDA__I2C0_SDA 0x3190 | ||
| 218 | MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0 0x31a0 | ||
| 219 | MX28_PAD_SPDIF__SPDIF_TX 0x31b0 | ||
| 220 | MX28_PAD_PWM3__PWM_3 0x31c0 | ||
| 221 | MX28_PAD_PWM4__PWM_4 0x31d0 | ||
| 222 | MX28_PAD_LCD_RESET__LCD_RESET 0x31e0 | ||
| 223 | MX28_PAD_ENET0_MDC__ENET0_MDC 0x4000 | ||
| 224 | MX28_PAD_ENET0_MDIO__ENET0_MDIO 0x4010 | ||
| 225 | MX28_PAD_ENET0_RX_EN__ENET0_RX_EN 0x4020 | ||
| 226 | MX28_PAD_ENET0_RXD0__ENET0_RXD0 0x4030 | ||
| 227 | MX28_PAD_ENET0_RXD1__ENET0_RXD1 0x4040 | ||
| 228 | MX28_PAD_ENET0_TX_CLK__ENET0_TX_CLK 0x4050 | ||
| 229 | MX28_PAD_ENET0_TX_EN__ENET0_TX_EN 0x4060 | ||
| 230 | MX28_PAD_ENET0_TXD0__ENET0_TXD0 0x4070 | ||
| 231 | MX28_PAD_ENET0_TXD1__ENET0_TXD1 0x4080 | ||
| 232 | MX28_PAD_ENET0_RXD2__ENET0_RXD2 0x4090 | ||
| 233 | MX28_PAD_ENET0_RXD3__ENET0_RXD3 0x40a0 | ||
| 234 | MX28_PAD_ENET0_TXD2__ENET0_TXD2 0x40b0 | ||
| 235 | MX28_PAD_ENET0_TXD3__ENET0_TXD3 0x40c0 | ||
| 236 | MX28_PAD_ENET0_RX_CLK__ENET0_RX_CLK 0x40d0 | ||
| 237 | MX28_PAD_ENET0_COL__ENET0_COL 0x40e0 | ||
| 238 | MX28_PAD_ENET0_CRS__ENET0_CRS 0x40f0 | ||
| 239 | MX28_PAD_ENET_CLK__CLKCTRL_ENET 0x4100 | ||
| 240 | MX28_PAD_JTAG_RTCK__JTAG_RTCK 0x4140 | ||
| 241 | MX28_PAD_EMI_D00__EMI_DATA0 0x5000 | ||
| 242 | MX28_PAD_EMI_D01__EMI_DATA1 0x5010 | ||
| 243 | MX28_PAD_EMI_D02__EMI_DATA2 0x5020 | ||
| 244 | MX28_PAD_EMI_D03__EMI_DATA3 0x5030 | ||
| 245 | MX28_PAD_EMI_D04__EMI_DATA4 0x5040 | ||
| 246 | MX28_PAD_EMI_D05__EMI_DATA5 0x5050 | ||
| 247 | MX28_PAD_EMI_D06__EMI_DATA6 0x5060 | ||
| 248 | MX28_PAD_EMI_D07__EMI_DATA7 0x5070 | ||
| 249 | MX28_PAD_EMI_D08__EMI_DATA8 0x5080 | ||
| 250 | MX28_PAD_EMI_D09__EMI_DATA9 0x5090 | ||
| 251 | MX28_PAD_EMI_D10__EMI_DATA10 0x50a0 | ||
| 252 | MX28_PAD_EMI_D11__EMI_DATA11 0x50b0 | ||
| 253 | MX28_PAD_EMI_D12__EMI_DATA12 0x50c0 | ||
| 254 | MX28_PAD_EMI_D13__EMI_DATA13 0x50d0 | ||
| 255 | MX28_PAD_EMI_D14__EMI_DATA14 0x50e0 | ||
| 256 | MX28_PAD_EMI_D15__EMI_DATA15 0x50f0 | ||
| 257 | MX28_PAD_EMI_ODT0__EMI_ODT0 0x5100 | ||
| 258 | MX28_PAD_EMI_DQM0__EMI_DQM0 0x5110 | ||
| 259 | MX28_PAD_EMI_ODT1__EMI_ODT1 0x5120 | ||
| 260 | MX28_PAD_EMI_DQM1__EMI_DQM1 0x5130 | ||
| 261 | MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK 0x5140 | ||
| 262 | MX28_PAD_EMI_CLK__EMI_CLK 0x5150 | ||
| 263 | MX28_PAD_EMI_DQS0__EMI_DQS0 0x5160 | ||
| 264 | MX28_PAD_EMI_DQS1__EMI_DQS1 0x5170 | ||
| 265 | MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN 0x51a0 | ||
| 266 | MX28_PAD_EMI_A00__EMI_ADDR0 0x6000 | ||
| 267 | MX28_PAD_EMI_A01__EMI_ADDR1 0x6010 | ||
| 268 | MX28_PAD_EMI_A02__EMI_ADDR2 0x6020 | ||
| 269 | MX28_PAD_EMI_A03__EMI_ADDR3 0x6030 | ||
| 270 | MX28_PAD_EMI_A04__EMI_ADDR4 0x6040 | ||
| 271 | MX28_PAD_EMI_A05__EMI_ADDR5 0x6050 | ||
| 272 | MX28_PAD_EMI_A06__EMI_ADDR6 0x6060 | ||
| 273 | MX28_PAD_EMI_A07__EMI_ADDR7 0x6070 | ||
| 274 | MX28_PAD_EMI_A08__EMI_ADDR8 0x6080 | ||
| 275 | MX28_PAD_EMI_A09__EMI_ADDR9 0x6090 | ||
| 276 | MX28_PAD_EMI_A10__EMI_ADDR10 0x60a0 | ||
| 277 | MX28_PAD_EMI_A11__EMI_ADDR11 0x60b0 | ||
| 278 | MX28_PAD_EMI_A12__EMI_ADDR12 0x60c0 | ||
| 279 | MX28_PAD_EMI_A13__EMI_ADDR13 0x60d0 | ||
| 280 | MX28_PAD_EMI_A14__EMI_ADDR14 0x60e0 | ||
| 281 | MX28_PAD_EMI_BA0__EMI_BA0 0x6100 | ||
| 282 | MX28_PAD_EMI_BA1__EMI_BA1 0x6110 | ||
| 283 | MX28_PAD_EMI_BA2__EMI_BA2 0x6120 | ||
| 284 | MX28_PAD_EMI_CASN__EMI_CASN 0x6130 | ||
| 285 | MX28_PAD_EMI_RASN__EMI_RASN 0x6140 | ||
| 286 | MX28_PAD_EMI_WEN__EMI_WEN 0x6150 | ||
| 287 | MX28_PAD_EMI_CE0N__EMI_CE0N 0x6160 | ||
| 288 | MX28_PAD_EMI_CE1N__EMI_CE1N 0x6170 | ||
| 289 | MX28_PAD_EMI_CKE__EMI_CKE 0x6180 | ||
| 290 | MX28_PAD_GPMI_D00__SSP1_D0 0x0001 | ||
| 291 | MX28_PAD_GPMI_D01__SSP1_D1 0x0011 | ||
| 292 | MX28_PAD_GPMI_D02__SSP1_D2 0x0021 | ||
| 293 | MX28_PAD_GPMI_D03__SSP1_D3 0x0031 | ||
| 294 | MX28_PAD_GPMI_D04__SSP1_D4 0x0041 | ||
| 295 | MX28_PAD_GPMI_D05__SSP1_D5 0x0051 | ||
| 296 | MX28_PAD_GPMI_D06__SSP1_D6 0x0061 | ||
| 297 | MX28_PAD_GPMI_D07__SSP1_D7 0x0071 | ||
| 298 | MX28_PAD_GPMI_CE0N__SSP3_D0 0x0101 | ||
| 299 | MX28_PAD_GPMI_CE1N__SSP3_D3 0x0111 | ||
| 300 | MX28_PAD_GPMI_CE2N__CAN1_TX 0x0121 | ||
| 301 | MX28_PAD_GPMI_CE3N__CAN1_RX 0x0131 | ||
| 302 | MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT 0x0141 | ||
| 303 | MX28_PAD_GPMI_RDY1__SSP1_CMD 0x0151 | ||
| 304 | MX28_PAD_GPMI_RDY2__CAN0_TX 0x0161 | ||
| 305 | MX28_PAD_GPMI_RDY3__CAN0_RX 0x0171 | ||
| 306 | MX28_PAD_GPMI_RDN__SSP3_SCK 0x0181 | ||
| 307 | MX28_PAD_GPMI_WRN__SSP1_SCK 0x0191 | ||
| 308 | MX28_PAD_GPMI_ALE__SSP3_D1 0x01a1 | ||
| 309 | MX28_PAD_GPMI_CLE__SSP3_D2 0x01b1 | ||
| 310 | MX28_PAD_GPMI_RESETN__SSP3_CMD 0x01c1 | ||
| 311 | MX28_PAD_LCD_D03__ETM_DA8 0x1031 | ||
| 312 | MX28_PAD_LCD_D04__ETM_DA9 0x1041 | ||
| 313 | MX28_PAD_LCD_D08__ETM_DA3 0x1081 | ||
| 314 | MX28_PAD_LCD_D09__ETM_DA4 0x1091 | ||
| 315 | MX28_PAD_LCD_D20__ENET1_1588_EVENT2_OUT 0x1141 | ||
| 316 | MX28_PAD_LCD_D21__ENET1_1588_EVENT2_IN 0x1151 | ||
| 317 | MX28_PAD_LCD_D22__ENET1_1588_EVENT3_OUT 0x1161 | ||
| 318 | MX28_PAD_LCD_D23__ENET1_1588_EVENT3_IN 0x1171 | ||
| 319 | MX28_PAD_LCD_RD_E__LCD_VSYNC 0x1181 | ||
| 320 | MX28_PAD_LCD_WR_RWN__LCD_HSYNC 0x1191 | ||
| 321 | MX28_PAD_LCD_RS__LCD_DOTCLK 0x11a1 | ||
| 322 | MX28_PAD_LCD_CS__LCD_ENABLE 0x11b1 | ||
| 323 | MX28_PAD_LCD_VSYNC__SAIF1_SDATA0 0x11c1 | ||
| 324 | MX28_PAD_LCD_HSYNC__SAIF1_SDATA1 0x11d1 | ||
| 325 | MX28_PAD_LCD_DOTCLK__SAIF1_MCLK 0x11e1 | ||
| 326 | MX28_PAD_SSP0_DATA4__SSP2_D0 0x2041 | ||
| 327 | MX28_PAD_SSP0_DATA5__SSP2_D3 0x2051 | ||
| 328 | MX28_PAD_SSP0_DATA6__SSP2_CMD 0x2061 | ||
| 329 | MX28_PAD_SSP0_DATA7__SSP2_SCK 0x2071 | ||
| 330 | MX28_PAD_SSP1_SCK__SSP2_D1 0x20c1 | ||
| 331 | MX28_PAD_SSP1_CMD__SSP2_D2 0x20d1 | ||
| 332 | MX28_PAD_SSP1_DATA0__SSP2_D6 0x20e1 | ||
| 333 | MX28_PAD_SSP1_DATA3__SSP2_D7 0x20f1 | ||
| 334 | MX28_PAD_SSP2_SCK__AUART2_RX 0x2101 | ||
| 335 | MX28_PAD_SSP2_MOSI__AUART2_TX 0x2111 | ||
| 336 | MX28_PAD_SSP2_MISO__AUART3_RX 0x2121 | ||
| 337 | MX28_PAD_SSP2_SS0__AUART3_TX 0x2131 | ||
| 338 | MX28_PAD_SSP2_SS1__SSP2_D1 0x2141 | ||
| 339 | MX28_PAD_SSP2_SS2__SSP2_D2 0x2151 | ||
| 340 | MX28_PAD_SSP3_SCK__AUART4_TX 0x2181 | ||
| 341 | MX28_PAD_SSP3_MOSI__AUART4_RX 0x2191 | ||
| 342 | MX28_PAD_SSP3_MISO__AUART4_RTS 0x21a1 | ||
| 343 | MX28_PAD_SSP3_SS0__AUART4_CTS 0x21b1 | ||
| 344 | MX28_PAD_AUART0_RX__I2C0_SCL 0x3001 | ||
| 345 | MX28_PAD_AUART0_TX__I2C0_SDA 0x3011 | ||
| 346 | MX28_PAD_AUART0_CTS__AUART4_RX 0x3021 | ||
| 347 | MX28_PAD_AUART0_RTS__AUART4_TX 0x3031 | ||
| 348 | MX28_PAD_AUART1_RX__SSP2_CARD_DETECT 0x3041 | ||
| 349 | MX28_PAD_AUART1_TX__SSP3_CARD_DETECT 0x3051 | ||
| 350 | MX28_PAD_AUART1_CTS__USB0_OVERCURRENT 0x3061 | ||
| 351 | MX28_PAD_AUART1_RTS__USB0_ID 0x3071 | ||
| 352 | MX28_PAD_AUART2_RX__SSP3_D1 0x3081 | ||
| 353 | MX28_PAD_AUART2_TX__SSP3_D2 0x3091 | ||
| 354 | MX28_PAD_AUART2_CTS__I2C1_SCL 0x30a1 | ||
| 355 | MX28_PAD_AUART2_RTS__I2C1_SDA 0x30b1 | ||
| 356 | MX28_PAD_AUART3_RX__CAN0_TX 0x30c1 | ||
| 357 | MX28_PAD_AUART3_TX__CAN0_RX 0x30d1 | ||
| 358 | MX28_PAD_AUART3_CTS__CAN1_TX 0x30e1 | ||
| 359 | MX28_PAD_AUART3_RTS__CAN1_RX 0x30f1 | ||
| 360 | MX28_PAD_PWM0__I2C1_SCL 0x3101 | ||
| 361 | MX28_PAD_PWM1__I2C1_SDA 0x3111 | ||
| 362 | MX28_PAD_PWM2__USB0_ID 0x3121 | ||
| 363 | MX28_PAD_SAIF0_MCLK__PWM_3 0x3141 | ||
| 364 | MX28_PAD_SAIF0_LRCLK__PWM_4 0x3151 | ||
| 365 | MX28_PAD_SAIF0_BITCLK__PWM_5 0x3161 | ||
| 366 | MX28_PAD_SAIF0_SDATA0__PWM_6 0x3171 | ||
| 367 | MX28_PAD_I2C0_SCL__TIMROT_ROTARYA 0x3181 | ||
| 368 | MX28_PAD_I2C0_SDA__TIMROT_ROTARYB 0x3191 | ||
| 369 | MX28_PAD_SAIF1_SDATA0__PWM_7 0x31a1 | ||
| 370 | MX28_PAD_LCD_RESET__LCD_VSYNC 0x31e1 | ||
| 371 | MX28_PAD_ENET0_MDC__GPMI_CE4N 0x4001 | ||
| 372 | MX28_PAD_ENET0_MDIO__GPMI_CE5N 0x4011 | ||
| 373 | MX28_PAD_ENET0_RX_EN__GPMI_CE6N 0x4021 | ||
| 374 | MX28_PAD_ENET0_RXD0__GPMI_CE7N 0x4031 | ||
| 375 | MX28_PAD_ENET0_RXD1__GPMI_READY4 0x4041 | ||
| 376 | MX28_PAD_ENET0_TX_CLK__HSADC_TRIGGER 0x4051 | ||
| 377 | MX28_PAD_ENET0_TX_EN__GPMI_READY5 0x4061 | ||
| 378 | MX28_PAD_ENET0_TXD0__GPMI_READY6 0x4071 | ||
| 379 | MX28_PAD_ENET0_TXD1__GPMI_READY7 0x4081 | ||
| 380 | MX28_PAD_ENET0_RXD2__ENET1_RXD0 0x4091 | ||
| 381 | MX28_PAD_ENET0_RXD3__ENET1_RXD1 0x40a1 | ||
| 382 | MX28_PAD_ENET0_TXD2__ENET1_TXD0 0x40b1 | ||
| 383 | MX28_PAD_ENET0_TXD3__ENET1_TXD1 0x40c1 | ||
| 384 | MX28_PAD_ENET0_RX_CLK__ENET0_RX_ER 0x40d1 | ||
| 385 | MX28_PAD_ENET0_COL__ENET1_TX_EN 0x40e1 | ||
| 386 | MX28_PAD_ENET0_CRS__ENET1_RX_EN 0x40f1 | ||
| 387 | MX28_PAD_GPMI_CE2N__ENET0_RX_ER 0x0122 | ||
| 388 | MX28_PAD_GPMI_CE3N__SAIF1_MCLK 0x0132 | ||
| 389 | MX28_PAD_GPMI_RDY0__USB0_ID 0x0142 | ||
| 390 | MX28_PAD_GPMI_RDY2__ENET0_TX_ER 0x0162 | ||
| 391 | MX28_PAD_GPMI_RDY3__HSADC_TRIGGER 0x0172 | ||
| 392 | MX28_PAD_GPMI_ALE__SSP3_D4 0x01a2 | ||
| 393 | MX28_PAD_GPMI_CLE__SSP3_D5 0x01b2 | ||
| 394 | MX28_PAD_LCD_D00__ETM_DA0 0x1002 | ||
| 395 | MX28_PAD_LCD_D01__ETM_DA1 0x1012 | ||
| 396 | MX28_PAD_LCD_D02__ETM_DA2 0x1022 | ||
| 397 | MX28_PAD_LCD_D03__ETM_DA3 0x1032 | ||
| 398 | MX28_PAD_LCD_D04__ETM_DA4 0x1042 | ||
| 399 | MX28_PAD_LCD_D05__ETM_DA5 0x1052 | ||
| 400 | MX28_PAD_LCD_D06__ETM_DA6 0x1062 | ||
| 401 | MX28_PAD_LCD_D07__ETM_DA7 0x1072 | ||
| 402 | MX28_PAD_LCD_D08__ETM_DA8 0x1082 | ||
| 403 | MX28_PAD_LCD_D09__ETM_DA9 0x1092 | ||
| 404 | MX28_PAD_LCD_D10__ETM_DA10 0x10a2 | ||
| 405 | MX28_PAD_LCD_D11__ETM_DA11 0x10b2 | ||
| 406 | MX28_PAD_LCD_D12__ETM_DA12 0x10c2 | ||
| 407 | MX28_PAD_LCD_D13__ETM_DA13 0x10d2 | ||
| 408 | MX28_PAD_LCD_D14__ETM_DA14 0x10e2 | ||
| 409 | MX28_PAD_LCD_D15__ETM_DA15 0x10f2 | ||
| 410 | MX28_PAD_LCD_D16__ETM_DA7 0x1102 | ||
| 411 | MX28_PAD_LCD_D17__ETM_DA6 0x1112 | ||
| 412 | MX28_PAD_LCD_D18__ETM_DA5 0x1122 | ||
| 413 | MX28_PAD_LCD_D19__ETM_DA4 0x1132 | ||
| 414 | MX28_PAD_LCD_D20__ETM_DA3 0x1142 | ||
| 415 | MX28_PAD_LCD_D21__ETM_DA2 0x1152 | ||
| 416 | MX28_PAD_LCD_D22__ETM_DA1 0x1162 | ||
| 417 | MX28_PAD_LCD_D23__ETM_DA0 0x1172 | ||
| 418 | MX28_PAD_LCD_RD_E__ETM_TCTL 0x1182 | ||
| 419 | MX28_PAD_LCD_WR_RWN__ETM_TCLK 0x1192 | ||
| 420 | MX28_PAD_LCD_HSYNC__ETM_TCTL 0x11d2 | ||
| 421 | MX28_PAD_LCD_DOTCLK__ETM_TCLK 0x11e2 | ||
| 422 | MX28_PAD_SSP1_SCK__ENET0_1588_EVENT2_OUT 0x20c2 | ||
| 423 | MX28_PAD_SSP1_CMD__ENET0_1588_EVENT2_IN 0x20d2 | ||
| 424 | MX28_PAD_SSP1_DATA0__ENET0_1588_EVENT3_OUT 0x20e2 | ||
| 425 | MX28_PAD_SSP1_DATA3__ENET0_1588_EVENT3_IN 0x20f2 | ||
| 426 | MX28_PAD_SSP2_SCK__SAIF0_SDATA1 0x2102 | ||
| 427 | MX28_PAD_SSP2_MOSI__SAIF0_SDATA2 0x2112 | ||
| 428 | MX28_PAD_SSP2_MISO__SAIF1_SDATA1 0x2122 | ||
| 429 | MX28_PAD_SSP2_SS0__SAIF1_SDATA2 0x2132 | ||
| 430 | MX28_PAD_SSP2_SS1__USB1_OVERCURRENT 0x2142 | ||
| 431 | MX28_PAD_SSP2_SS2__USB0_OVERCURRENT 0x2152 | ||
| 432 | MX28_PAD_SSP3_SCK__ENET1_1588_EVENT0_OUT 0x2182 | ||
| 433 | MX28_PAD_SSP3_MOSI__ENET1_1588_EVENT0_IN 0x2192 | ||
| 434 | MX28_PAD_SSP3_MISO__ENET1_1588_EVENT1_OUT 0x21a2 | ||
| 435 | MX28_PAD_SSP3_SS0__ENET1_1588_EVENT1_IN 0x21b2 | ||
| 436 | MX28_PAD_AUART0_RX__DUART_CTS 0x3002 | ||
| 437 | MX28_PAD_AUART0_TX__DUART_RTS 0x3012 | ||
| 438 | MX28_PAD_AUART0_CTS__DUART_RX 0x3022 | ||
| 439 | MX28_PAD_AUART0_RTS__DUART_TX 0x3032 | ||
| 440 | MX28_PAD_AUART1_RX__PWM_0 0x3042 | ||
| 441 | MX28_PAD_AUART1_TX__PWM_1 0x3052 | ||
| 442 | MX28_PAD_AUART1_CTS__TIMROT_ROTARYA 0x3062 | ||
| 443 | MX28_PAD_AUART1_RTS__TIMROT_ROTARYB 0x3072 | ||
| 444 | MX28_PAD_AUART2_RX__SSP3_D4 0x3082 | ||
| 445 | MX28_PAD_AUART2_TX__SSP3_D5 0x3092 | ||
| 446 | MX28_PAD_AUART2_CTS__SAIF1_BITCLK 0x30a2 | ||
| 447 | MX28_PAD_AUART2_RTS__SAIF1_LRCLK 0x30b2 | ||
| 448 | MX28_PAD_AUART3_RX__ENET0_1588_EVENT0_OUT 0x30c2 | ||
| 449 | MX28_PAD_AUART3_TX__ENET0_1588_EVENT0_IN 0x30d2 | ||
| 450 | MX28_PAD_AUART3_CTS__ENET0_1588_EVENT1_OUT 0x30e2 | ||
| 451 | MX28_PAD_AUART3_RTS__ENET0_1588_EVENT1_IN 0x30f2 | ||
| 452 | MX28_PAD_PWM0__DUART_RX 0x3102 | ||
| 453 | MX28_PAD_PWM1__DUART_TX 0x3112 | ||
| 454 | MX28_PAD_PWM2__USB1_OVERCURRENT 0x3122 | ||
| 455 | MX28_PAD_SAIF0_MCLK__AUART4_CTS 0x3142 | ||
| 456 | MX28_PAD_SAIF0_LRCLK__AUART4_RTS 0x3152 | ||
| 457 | MX28_PAD_SAIF0_BITCLK__AUART4_RX 0x3162 | ||
| 458 | MX28_PAD_SAIF0_SDATA0__AUART4_TX 0x3172 | ||
| 459 | MX28_PAD_I2C0_SCL__DUART_RX 0x3182 | ||
| 460 | MX28_PAD_I2C0_SDA__DUART_TX 0x3192 | ||
| 461 | MX28_PAD_SAIF1_SDATA0__SAIF0_SDATA1 0x31a2 | ||
| 462 | MX28_PAD_SPDIF__ENET1_RX_ER 0x31b2 | ||
| 463 | MX28_PAD_ENET0_MDC__SAIF0_SDATA1 0x4002 | ||
| 464 | MX28_PAD_ENET0_MDIO__SAIF0_SDATA2 0x4012 | ||
| 465 | MX28_PAD_ENET0_RX_EN__SAIF1_SDATA1 0x4022 | ||
| 466 | MX28_PAD_ENET0_RXD0__SAIF1_SDATA2 0x4032 | ||
| 467 | MX28_PAD_ENET0_TX_CLK__ENET0_1588_EVENT2_OUT 0x4052 | ||
| 468 | MX28_PAD_ENET0_RXD2__ENET0_1588_EVENT0_OUT 0x4092 | ||
| 469 | MX28_PAD_ENET0_RXD3__ENET0_1588_EVENT0_IN 0x40a2 | ||
| 470 | MX28_PAD_ENET0_TXD2__ENET0_1588_EVENT1_OUT 0x40b2 | ||
| 471 | MX28_PAD_ENET0_TXD3__ENET0_1588_EVENT1_IN 0x40c2 | ||
| 472 | MX28_PAD_ENET0_RX_CLK__ENET0_1588_EVENT2_IN 0x40d2 | ||
| 473 | MX28_PAD_ENET0_COL__ENET0_1588_EVENT3_OUT 0x40e2 | ||
| 474 | MX28_PAD_ENET0_CRS__ENET0_1588_EVENT3_IN 0x40f2 | ||
| 475 | MX28_PAD_GPMI_D00__GPIO_0_0 0x0003 | ||
| 476 | MX28_PAD_GPMI_D01__GPIO_0_1 0x0013 | ||
| 477 | MX28_PAD_GPMI_D02__GPIO_0_2 0x0023 | ||
| 478 | MX28_PAD_GPMI_D03__GPIO_0_3 0x0033 | ||
| 479 | MX28_PAD_GPMI_D04__GPIO_0_4 0x0043 | ||
| 480 | MX28_PAD_GPMI_D05__GPIO_0_5 0x0053 | ||
| 481 | MX28_PAD_GPMI_D06__GPIO_0_6 0x0063 | ||
| 482 | MX28_PAD_GPMI_D07__GPIO_0_7 0x0073 | ||
| 483 | MX28_PAD_GPMI_CE0N__GPIO_0_16 0x0103 | ||
| 484 | MX28_PAD_GPMI_CE1N__GPIO_0_17 0x0113 | ||
| 485 | MX28_PAD_GPMI_CE2N__GPIO_0_18 0x0123 | ||
| 486 | MX28_PAD_GPMI_CE3N__GPIO_0_19 0x0133 | ||
| 487 | MX28_PAD_GPMI_RDY0__GPIO_0_20 0x0143 | ||
| 488 | MX28_PAD_GPMI_RDY1__GPIO_0_21 0x0153 | ||
| 489 | MX28_PAD_GPMI_RDY2__GPIO_0_22 0x0163 | ||
| 490 | MX28_PAD_GPMI_RDY3__GPIO_0_23 0x0173 | ||
| 491 | MX28_PAD_GPMI_RDN__GPIO_0_24 0x0183 | ||
| 492 | MX28_PAD_GPMI_WRN__GPIO_0_25 0x0193 | ||
| 493 | MX28_PAD_GPMI_ALE__GPIO_0_26 0x01a3 | ||
| 494 | MX28_PAD_GPMI_CLE__GPIO_0_27 0x01b3 | ||
| 495 | MX28_PAD_GPMI_RESETN__GPIO_0_28 0x01c3 | ||
| 496 | MX28_PAD_LCD_D00__GPIO_1_0 0x1003 | ||
| 497 | MX28_PAD_LCD_D01__GPIO_1_1 0x1013 | ||
| 498 | MX28_PAD_LCD_D02__GPIO_1_2 0x1023 | ||
| 499 | MX28_PAD_LCD_D03__GPIO_1_3 0x1033 | ||
| 500 | MX28_PAD_LCD_D04__GPIO_1_4 0x1043 | ||
| 501 | MX28_PAD_LCD_D05__GPIO_1_5 0x1053 | ||
| 502 | MX28_PAD_LCD_D06__GPIO_1_6 0x1063 | ||
| 503 | MX28_PAD_LCD_D07__GPIO_1_7 0x1073 | ||
| 504 | MX28_PAD_LCD_D08__GPIO_1_8 0x1083 | ||
| 505 | MX28_PAD_LCD_D09__GPIO_1_9 0x1093 | ||
| 506 | MX28_PAD_LCD_D10__GPIO_1_10 0x10a3 | ||
| 507 | MX28_PAD_LCD_D11__GPIO_1_11 0x10b3 | ||
| 508 | MX28_PAD_LCD_D12__GPIO_1_12 0x10c3 | ||
| 509 | MX28_PAD_LCD_D13__GPIO_1_13 0x10d3 | ||
| 510 | MX28_PAD_LCD_D14__GPIO_1_14 0x10e3 | ||
| 511 | MX28_PAD_LCD_D15__GPIO_1_15 0x10f3 | ||
| 512 | MX28_PAD_LCD_D16__GPIO_1_16 0x1103 | ||
| 513 | MX28_PAD_LCD_D17__GPIO_1_17 0x1113 | ||
| 514 | MX28_PAD_LCD_D18__GPIO_1_18 0x1123 | ||
| 515 | MX28_PAD_LCD_D19__GPIO_1_19 0x1133 | ||
| 516 | MX28_PAD_LCD_D20__GPIO_1_20 0x1143 | ||
| 517 | MX28_PAD_LCD_D21__GPIO_1_21 0x1153 | ||
| 518 | MX28_PAD_LCD_D22__GPIO_1_22 0x1163 | ||
| 519 | MX28_PAD_LCD_D23__GPIO_1_23 0x1173 | ||
| 520 | MX28_PAD_LCD_RD_E__GPIO_1_24 0x1183 | ||
| 521 | MX28_PAD_LCD_WR_RWN__GPIO_1_25 0x1193 | ||
| 522 | MX28_PAD_LCD_RS__GPIO_1_26 0x11a3 | ||
| 523 | MX28_PAD_LCD_CS__GPIO_1_27 0x11b3 | ||
| 524 | MX28_PAD_LCD_VSYNC__GPIO_1_28 0x11c3 | ||
| 525 | MX28_PAD_LCD_HSYNC__GPIO_1_29 0x11d3 | ||
| 526 | MX28_PAD_LCD_DOTCLK__GPIO_1_30 0x11e3 | ||
| 527 | MX28_PAD_LCD_ENABLE__GPIO_1_31 0x11f3 | ||
| 528 | MX28_PAD_SSP0_DATA0__GPIO_2_0 0x2003 | ||
| 529 | MX28_PAD_SSP0_DATA1__GPIO_2_1 0x2013 | ||
| 530 | MX28_PAD_SSP0_DATA2__GPIO_2_2 0x2023 | ||
| 531 | MX28_PAD_SSP0_DATA3__GPIO_2_3 0x2033 | ||
| 532 | MX28_PAD_SSP0_DATA4__GPIO_2_4 0x2043 | ||
| 533 | MX28_PAD_SSP0_DATA5__GPIO_2_5 0x2053 | ||
| 534 | MX28_PAD_SSP0_DATA6__GPIO_2_6 0x2063 | ||
| 535 | MX28_PAD_SSP0_DATA7__GPIO_2_7 0x2073 | ||
| 536 | MX28_PAD_SSP0_CMD__GPIO_2_8 0x2083 | ||
| 537 | MX28_PAD_SSP0_DETECT__GPIO_2_9 0x2093 | ||
| 538 | MX28_PAD_SSP0_SCK__GPIO_2_10 0x20a3 | ||
| 539 | MX28_PAD_SSP1_SCK__GPIO_2_12 0x20c3 | ||
| 540 | MX28_PAD_SSP1_CMD__GPIO_2_13 0x20d3 | ||
| 541 | MX28_PAD_SSP1_DATA0__GPIO_2_14 0x20e3 | ||
| 542 | MX28_PAD_SSP1_DATA3__GPIO_2_15 0x20f3 | ||
| 543 | MX28_PAD_SSP2_SCK__GPIO_2_16 0x2103 | ||
| 544 | MX28_PAD_SSP2_MOSI__GPIO_2_17 0x2113 | ||
| 545 | MX28_PAD_SSP2_MISO__GPIO_2_18 0x2123 | ||
| 546 | MX28_PAD_SSP2_SS0__GPIO_2_19 0x2133 | ||
| 547 | MX28_PAD_SSP2_SS1__GPIO_2_20 0x2143 | ||
| 548 | MX28_PAD_SSP2_SS2__GPIO_2_21 0x2153 | ||
| 549 | MX28_PAD_SSP3_SCK__GPIO_2_24 0x2183 | ||
| 550 | MX28_PAD_SSP3_MOSI__GPIO_2_25 0x2193 | ||
| 551 | MX28_PAD_SSP3_MISO__GPIO_2_26 0x21a3 | ||
| 552 | MX28_PAD_SSP3_SS0__GPIO_2_27 0x21b3 | ||
| 553 | MX28_PAD_AUART0_RX__GPIO_3_0 0x3003 | ||
| 554 | MX28_PAD_AUART0_TX__GPIO_3_1 0x3013 | ||
| 555 | MX28_PAD_AUART0_CTS__GPIO_3_2 0x3023 | ||
| 556 | MX28_PAD_AUART0_RTS__GPIO_3_3 0x3033 | ||
| 557 | MX28_PAD_AUART1_RX__GPIO_3_4 0x3043 | ||
| 558 | MX28_PAD_AUART1_TX__GPIO_3_5 0x3053 | ||
| 559 | MX28_PAD_AUART1_CTS__GPIO_3_6 0x3063 | ||
| 560 | MX28_PAD_AUART1_RTS__GPIO_3_7 0x3073 | ||
| 561 | MX28_PAD_AUART2_RX__GPIO_3_8 0x3083 | ||
| 562 | MX28_PAD_AUART2_TX__GPIO_3_9 0x3093 | ||
| 563 | MX28_PAD_AUART2_CTS__GPIO_3_10 0x30a3 | ||
| 564 | MX28_PAD_AUART2_RTS__GPIO_3_11 0x30b3 | ||
| 565 | MX28_PAD_AUART3_RX__GPIO_3_12 0x30c3 | ||
| 566 | MX28_PAD_AUART3_TX__GPIO_3_13 0x30d3 | ||
| 567 | MX28_PAD_AUART3_CTS__GPIO_3_14 0x30e3 | ||
| 568 | MX28_PAD_AUART3_RTS__GPIO_3_15 0x30f3 | ||
| 569 | MX28_PAD_PWM0__GPIO_3_16 0x3103 | ||
| 570 | MX28_PAD_PWM1__GPIO_3_17 0x3113 | ||
| 571 | MX28_PAD_PWM2__GPIO_3_18 0x3123 | ||
| 572 | MX28_PAD_SAIF0_MCLK__GPIO_3_20 0x3143 | ||
| 573 | MX28_PAD_SAIF0_LRCLK__GPIO_3_21 0x3153 | ||
| 574 | MX28_PAD_SAIF0_BITCLK__GPIO_3_22 0x3163 | ||
| 575 | MX28_PAD_SAIF0_SDATA0__GPIO_3_23 0x3173 | ||
| 576 | MX28_PAD_I2C0_SCL__GPIO_3_24 0x3183 | ||
| 577 | MX28_PAD_I2C0_SDA__GPIO_3_25 0x3193 | ||
| 578 | MX28_PAD_SAIF1_SDATA0__GPIO_3_26 0x31a3 | ||
| 579 | MX28_PAD_SPDIF__GPIO_3_27 0x31b3 | ||
| 580 | MX28_PAD_PWM3__GPIO_3_28 0x31c3 | ||
| 581 | MX28_PAD_PWM4__GPIO_3_29 0x31d3 | ||
| 582 | MX28_PAD_LCD_RESET__GPIO_3_30 0x31e3 | ||
| 583 | MX28_PAD_ENET0_MDC__GPIO_4_0 0x4003 | ||
| 584 | MX28_PAD_ENET0_MDIO__GPIO_4_1 0x4013 | ||
| 585 | MX28_PAD_ENET0_RX_EN__GPIO_4_2 0x4023 | ||
| 586 | MX28_PAD_ENET0_RXD0__GPIO_4_3 0x4033 | ||
| 587 | MX28_PAD_ENET0_RXD1__GPIO_4_4 0x4043 | ||
| 588 | MX28_PAD_ENET0_TX_CLK__GPIO_4_5 0x4053 | ||
| 589 | MX28_PAD_ENET0_TX_EN__GPIO_4_6 0x4063 | ||
| 590 | MX28_PAD_ENET0_TXD0__GPIO_4_7 0x4073 | ||
| 591 | MX28_PAD_ENET0_TXD1__GPIO_4_8 0x4083 | ||
| 592 | MX28_PAD_ENET0_RXD2__GPIO_4_9 0x4093 | ||
| 593 | MX28_PAD_ENET0_RXD3__GPIO_4_10 0x40a3 | ||
| 594 | MX28_PAD_ENET0_TXD2__GPIO_4_11 0x40b3 | ||
| 595 | MX28_PAD_ENET0_TXD3__GPIO_4_12 0x40c3 | ||
| 596 | MX28_PAD_ENET0_RX_CLK__GPIO_4_13 0x40d3 | ||
| 597 | MX28_PAD_ENET0_COL__GPIO_4_14 0x40e3 | ||
| 598 | MX28_PAD_ENET0_CRS__GPIO_4_15 0x40f3 | ||
| 599 | MX28_PAD_ENET_CLK__GPIO_4_16 0x4103 | ||
| 600 | MX28_PAD_JTAG_RTCK__GPIO_4_20 0x4143 | ||
| 601 | |||
| 602 | Valid values for i.MX23 pinmux-id: | ||
| 603 | |||
| 604 | pinmux id | ||
| 605 | ------ -- | ||
| 606 | MX23_PAD_GPMI_D00__GPMI_D00 0x0000 | ||
| 607 | MX23_PAD_GPMI_D01__GPMI_D01 0x0010 | ||
| 608 | MX23_PAD_GPMI_D02__GPMI_D02 0x0020 | ||
| 609 | MX23_PAD_GPMI_D03__GPMI_D03 0x0030 | ||
| 610 | MX23_PAD_GPMI_D04__GPMI_D04 0x0040 | ||
| 611 | MX23_PAD_GPMI_D05__GPMI_D05 0x0050 | ||
| 612 | MX23_PAD_GPMI_D06__GPMI_D06 0x0060 | ||
| 613 | MX23_PAD_GPMI_D07__GPMI_D07 0x0070 | ||
| 614 | MX23_PAD_GPMI_D08__GPMI_D08 0x0080 | ||
| 615 | MX23_PAD_GPMI_D09__GPMI_D09 0x0090 | ||
| 616 | MX23_PAD_GPMI_D10__GPMI_D10 0x00a0 | ||
| 617 | MX23_PAD_GPMI_D11__GPMI_D11 0x00b0 | ||
| 618 | MX23_PAD_GPMI_D12__GPMI_D12 0x00c0 | ||
| 619 | MX23_PAD_GPMI_D13__GPMI_D13 0x00d0 | ||
| 620 | MX23_PAD_GPMI_D14__GPMI_D14 0x00e0 | ||
| 621 | MX23_PAD_GPMI_D15__GPMI_D15 0x00f0 | ||
| 622 | MX23_PAD_GPMI_CLE__GPMI_CLE 0x0100 | ||
| 623 | MX23_PAD_GPMI_ALE__GPMI_ALE 0x0110 | ||
| 624 | MX23_PAD_GPMI_CE2N__GPMI_CE2N 0x0120 | ||
| 625 | MX23_PAD_GPMI_RDY0__GPMI_RDY0 0x0130 | ||
| 626 | MX23_PAD_GPMI_RDY1__GPMI_RDY1 0x0140 | ||
| 627 | MX23_PAD_GPMI_RDY2__GPMI_RDY2 0x0150 | ||
| 628 | MX23_PAD_GPMI_RDY3__GPMI_RDY3 0x0160 | ||
| 629 | MX23_PAD_GPMI_WPN__GPMI_WPN 0x0170 | ||
| 630 | MX23_PAD_GPMI_WRN__GPMI_WRN 0x0180 | ||
| 631 | MX23_PAD_GPMI_RDN__GPMI_RDN 0x0190 | ||
| 632 | MX23_PAD_AUART1_CTS__AUART1_CTS 0x01a0 | ||
| 633 | MX23_PAD_AUART1_RTS__AUART1_RTS 0x01b0 | ||
| 634 | MX23_PAD_AUART1_RX__AUART1_RX 0x01c0 | ||
| 635 | MX23_PAD_AUART1_TX__AUART1_TX 0x01d0 | ||
| 636 | MX23_PAD_I2C_SCL__I2C_SCL 0x01e0 | ||
| 637 | MX23_PAD_I2C_SDA__I2C_SDA 0x01f0 | ||
| 638 | MX23_PAD_LCD_D00__LCD_D00 0x1000 | ||
| 639 | MX23_PAD_LCD_D01__LCD_D01 0x1010 | ||
| 640 | MX23_PAD_LCD_D02__LCD_D02 0x1020 | ||
| 641 | MX23_PAD_LCD_D03__LCD_D03 0x1030 | ||
| 642 | MX23_PAD_LCD_D04__LCD_D04 0x1040 | ||
| 643 | MX23_PAD_LCD_D05__LCD_D05 0x1050 | ||
| 644 | MX23_PAD_LCD_D06__LCD_D06 0x1060 | ||
| 645 | MX23_PAD_LCD_D07__LCD_D07 0x1070 | ||
| 646 | MX23_PAD_LCD_D08__LCD_D08 0x1080 | ||
| 647 | MX23_PAD_LCD_D09__LCD_D09 0x1090 | ||
| 648 | MX23_PAD_LCD_D10__LCD_D10 0x10a0 | ||
| 649 | MX23_PAD_LCD_D11__LCD_D11 0x10b0 | ||
| 650 | MX23_PAD_LCD_D12__LCD_D12 0x10c0 | ||
| 651 | MX23_PAD_LCD_D13__LCD_D13 0x10d0 | ||
| 652 | MX23_PAD_LCD_D14__LCD_D14 0x10e0 | ||
| 653 | MX23_PAD_LCD_D15__LCD_D15 0x10f0 | ||
| 654 | MX23_PAD_LCD_D16__LCD_D16 0x1100 | ||
| 655 | MX23_PAD_LCD_D17__LCD_D17 0x1110 | ||
| 656 | MX23_PAD_LCD_RESET__LCD_RESET 0x1120 | ||
| 657 | MX23_PAD_LCD_RS__LCD_RS 0x1130 | ||
| 658 | MX23_PAD_LCD_WR__LCD_WR 0x1140 | ||
| 659 | MX23_PAD_LCD_CS__LCD_CS 0x1150 | ||
| 660 | MX23_PAD_LCD_DOTCK__LCD_DOTCK 0x1160 | ||
| 661 | MX23_PAD_LCD_ENABLE__LCD_ENABLE 0x1170 | ||
| 662 | MX23_PAD_LCD_HSYNC__LCD_HSYNC 0x1180 | ||
| 663 | MX23_PAD_LCD_VSYNC__LCD_VSYNC 0x1190 | ||
| 664 | MX23_PAD_PWM0__PWM0 0x11a0 | ||
| 665 | MX23_PAD_PWM1__PWM1 0x11b0 | ||
| 666 | MX23_PAD_PWM2__PWM2 0x11c0 | ||
| 667 | MX23_PAD_PWM3__PWM3 0x11d0 | ||
| 668 | MX23_PAD_PWM4__PWM4 0x11e0 | ||
| 669 | MX23_PAD_SSP1_CMD__SSP1_CMD 0x2000 | ||
| 670 | MX23_PAD_SSP1_DETECT__SSP1_DETECT 0x2010 | ||
| 671 | MX23_PAD_SSP1_DATA0__SSP1_DATA0 0x2020 | ||
| 672 | MX23_PAD_SSP1_DATA1__SSP1_DATA1 0x2030 | ||
| 673 | MX23_PAD_SSP1_DATA2__SSP1_DATA2 0x2040 | ||
| 674 | MX23_PAD_SSP1_DATA3__SSP1_DATA3 0x2050 | ||
| 675 | MX23_PAD_SSP1_SCK__SSP1_SCK 0x2060 | ||
| 676 | MX23_PAD_ROTARYA__ROTARYA 0x2070 | ||
| 677 | MX23_PAD_ROTARYB__ROTARYB 0x2080 | ||
| 678 | MX23_PAD_EMI_A00__EMI_A00 0x2090 | ||
| 679 | MX23_PAD_EMI_A01__EMI_A01 0x20a0 | ||
| 680 | MX23_PAD_EMI_A02__EMI_A02 0x20b0 | ||
| 681 | MX23_PAD_EMI_A03__EMI_A03 0x20c0 | ||
| 682 | MX23_PAD_EMI_A04__EMI_A04 0x20d0 | ||
| 683 | MX23_PAD_EMI_A05__EMI_A05 0x20e0 | ||
| 684 | MX23_PAD_EMI_A06__EMI_A06 0x20f0 | ||
| 685 | MX23_PAD_EMI_A07__EMI_A07 0x2100 | ||
| 686 | MX23_PAD_EMI_A08__EMI_A08 0x2110 | ||
| 687 | MX23_PAD_EMI_A09__EMI_A09 0x2120 | ||
| 688 | MX23_PAD_EMI_A10__EMI_A10 0x2130 | ||
| 689 | MX23_PAD_EMI_A11__EMI_A11 0x2140 | ||
| 690 | MX23_PAD_EMI_A12__EMI_A12 0x2150 | ||
| 691 | MX23_PAD_EMI_BA0__EMI_BA0 0x2160 | ||
| 692 | MX23_PAD_EMI_BA1__EMI_BA1 0x2170 | ||
| 693 | MX23_PAD_EMI_CASN__EMI_CASN 0x2180 | ||
| 694 | MX23_PAD_EMI_CE0N__EMI_CE0N 0x2190 | ||
| 695 | MX23_PAD_EMI_CE1N__EMI_CE1N 0x21a0 | ||
| 696 | MX23_PAD_GPMI_CE1N__GPMI_CE1N 0x21b0 | ||
| 697 | MX23_PAD_GPMI_CE0N__GPMI_CE0N 0x21c0 | ||
| 698 | MX23_PAD_EMI_CKE__EMI_CKE 0x21d0 | ||
| 699 | MX23_PAD_EMI_RASN__EMI_RASN 0x21e0 | ||
| 700 | MX23_PAD_EMI_WEN__EMI_WEN 0x21f0 | ||
| 701 | MX23_PAD_EMI_D00__EMI_D00 0x3000 | ||
| 702 | MX23_PAD_EMI_D01__EMI_D01 0x3010 | ||
| 703 | MX23_PAD_EMI_D02__EMI_D02 0x3020 | ||
| 704 | MX23_PAD_EMI_D03__EMI_D03 0x3030 | ||
| 705 | MX23_PAD_EMI_D04__EMI_D04 0x3040 | ||
| 706 | MX23_PAD_EMI_D05__EMI_D05 0x3050 | ||
| 707 | MX23_PAD_EMI_D06__EMI_D06 0x3060 | ||
| 708 | MX23_PAD_EMI_D07__EMI_D07 0x3070 | ||
| 709 | MX23_PAD_EMI_D08__EMI_D08 0x3080 | ||
| 710 | MX23_PAD_EMI_D09__EMI_D09 0x3090 | ||
| 711 | MX23_PAD_EMI_D10__EMI_D10 0x30a0 | ||
| 712 | MX23_PAD_EMI_D11__EMI_D11 0x30b0 | ||
| 713 | MX23_PAD_EMI_D12__EMI_D12 0x30c0 | ||
| 714 | MX23_PAD_EMI_D13__EMI_D13 0x30d0 | ||
| 715 | MX23_PAD_EMI_D14__EMI_D14 0x30e0 | ||
| 716 | MX23_PAD_EMI_D15__EMI_D15 0x30f0 | ||
| 717 | MX23_PAD_EMI_DQM0__EMI_DQM0 0x3100 | ||
| 718 | MX23_PAD_EMI_DQM1__EMI_DQM1 0x3110 | ||
| 719 | MX23_PAD_EMI_DQS0__EMI_DQS0 0x3120 | ||
| 720 | MX23_PAD_EMI_DQS1__EMI_DQS1 0x3130 | ||
| 721 | MX23_PAD_EMI_CLK__EMI_CLK 0x3140 | ||
| 722 | MX23_PAD_EMI_CLKN__EMI_CLKN 0x3150 | ||
| 723 | MX23_PAD_GPMI_D00__LCD_D8 0x0001 | ||
| 724 | MX23_PAD_GPMI_D01__LCD_D9 0x0011 | ||
| 725 | MX23_PAD_GPMI_D02__LCD_D10 0x0021 | ||
| 726 | MX23_PAD_GPMI_D03__LCD_D11 0x0031 | ||
| 727 | MX23_PAD_GPMI_D04__LCD_D12 0x0041 | ||
| 728 | MX23_PAD_GPMI_D05__LCD_D13 0x0051 | ||
| 729 | MX23_PAD_GPMI_D06__LCD_D14 0x0061 | ||
| 730 | MX23_PAD_GPMI_D07__LCD_D15 0x0071 | ||
| 731 | MX23_PAD_GPMI_D08__LCD_D18 0x0081 | ||
| 732 | MX23_PAD_GPMI_D09__LCD_D19 0x0091 | ||
| 733 | MX23_PAD_GPMI_D10__LCD_D20 0x00a1 | ||
| 734 | MX23_PAD_GPMI_D11__LCD_D21 0x00b1 | ||
| 735 | MX23_PAD_GPMI_D12__LCD_D22 0x00c1 | ||
| 736 | MX23_PAD_GPMI_D13__LCD_D23 0x00d1 | ||
| 737 | MX23_PAD_GPMI_D14__AUART2_RX 0x00e1 | ||
| 738 | MX23_PAD_GPMI_D15__AUART2_TX 0x00f1 | ||
| 739 | MX23_PAD_GPMI_CLE__LCD_D16 0x0101 | ||
| 740 | MX23_PAD_GPMI_ALE__LCD_D17 0x0111 | ||
| 741 | MX23_PAD_GPMI_CE2N__ATA_A2 0x0121 | ||
| 742 | MX23_PAD_AUART1_RTS__IR_CLK 0x01b1 | ||
| 743 | MX23_PAD_AUART1_RX__IR_RX 0x01c1 | ||
| 744 | MX23_PAD_AUART1_TX__IR_TX 0x01d1 | ||
| 745 | MX23_PAD_I2C_SCL__GPMI_RDY2 0x01e1 | ||
| 746 | MX23_PAD_I2C_SDA__GPMI_CE2N 0x01f1 | ||
| 747 | MX23_PAD_LCD_D00__ETM_DA8 0x1001 | ||
| 748 | MX23_PAD_LCD_D01__ETM_DA9 0x1011 | ||
| 749 | MX23_PAD_LCD_D02__ETM_DA10 0x1021 | ||
| 750 | MX23_PAD_LCD_D03__ETM_DA11 0x1031 | ||
| 751 | MX23_PAD_LCD_D04__ETM_DA12 0x1041 | ||
| 752 | MX23_PAD_LCD_D05__ETM_DA13 0x1051 | ||
| 753 | MX23_PAD_LCD_D06__ETM_DA14 0x1061 | ||
| 754 | MX23_PAD_LCD_D07__ETM_DA15 0x1071 | ||
| 755 | MX23_PAD_LCD_D08__ETM_DA0 0x1081 | ||
| 756 | MX23_PAD_LCD_D09__ETM_DA1 0x1091 | ||
| 757 | MX23_PAD_LCD_D10__ETM_DA2 0x10a1 | ||
| 758 | MX23_PAD_LCD_D11__ETM_DA3 0x10b1 | ||
| 759 | MX23_PAD_LCD_D12__ETM_DA4 0x10c1 | ||
| 760 | MX23_PAD_LCD_D13__ETM_DA5 0x10d1 | ||
| 761 | MX23_PAD_LCD_D14__ETM_DA6 0x10e1 | ||
| 762 | MX23_PAD_LCD_D15__ETM_DA7 0x10f1 | ||
| 763 | MX23_PAD_LCD_RESET__ETM_TCTL 0x1121 | ||
| 764 | MX23_PAD_LCD_RS__ETM_TCLK 0x1131 | ||
| 765 | MX23_PAD_LCD_DOTCK__GPMI_RDY3 0x1161 | ||
| 766 | MX23_PAD_LCD_ENABLE__I2C_SCL 0x1171 | ||
| 767 | MX23_PAD_LCD_HSYNC__I2C_SDA 0x1181 | ||
| 768 | MX23_PAD_LCD_VSYNC__LCD_BUSY 0x1191 | ||
| 769 | MX23_PAD_PWM0__ROTARYA 0x11a1 | ||
| 770 | MX23_PAD_PWM1__ROTARYB 0x11b1 | ||
| 771 | MX23_PAD_PWM2__GPMI_RDY3 0x11c1 | ||
| 772 | MX23_PAD_PWM3__ETM_TCTL 0x11d1 | ||
| 773 | MX23_PAD_PWM4__ETM_TCLK 0x11e1 | ||
| 774 | MX23_PAD_SSP1_DETECT__GPMI_CE3N 0x2011 | ||
| 775 | MX23_PAD_SSP1_DATA1__I2C_SCL 0x2031 | ||
| 776 | MX23_PAD_SSP1_DATA2__I2C_SDA 0x2041 | ||
| 777 | MX23_PAD_ROTARYA__AUART2_RTS 0x2071 | ||
| 778 | MX23_PAD_ROTARYB__AUART2_CTS 0x2081 | ||
| 779 | MX23_PAD_GPMI_D00__SSP2_DATA0 0x0002 | ||
| 780 | MX23_PAD_GPMI_D01__SSP2_DATA1 0x0012 | ||
| 781 | MX23_PAD_GPMI_D02__SSP2_DATA2 0x0022 | ||
| 782 | MX23_PAD_GPMI_D03__SSP2_DATA3 0x0032 | ||
| 783 | MX23_PAD_GPMI_D04__SSP2_DATA4 0x0042 | ||
| 784 | MX23_PAD_GPMI_D05__SSP2_DATA5 0x0052 | ||
| 785 | MX23_PAD_GPMI_D06__SSP2_DATA6 0x0062 | ||
| 786 | MX23_PAD_GPMI_D07__SSP2_DATA7 0x0072 | ||
| 787 | MX23_PAD_GPMI_D08__SSP1_DATA4 0x0082 | ||
| 788 | MX23_PAD_GPMI_D09__SSP1_DATA5 0x0092 | ||
| 789 | MX23_PAD_GPMI_D10__SSP1_DATA6 0x00a2 | ||
| 790 | MX23_PAD_GPMI_D11__SSP1_DATA7 0x00b2 | ||
| 791 | MX23_PAD_GPMI_D15__GPMI_CE3N 0x00f2 | ||
| 792 | MX23_PAD_GPMI_RDY0__SSP2_DETECT 0x0132 | ||
| 793 | MX23_PAD_GPMI_RDY1__SSP2_CMD 0x0142 | ||
| 794 | MX23_PAD_GPMI_WRN__SSP2_SCK 0x0182 | ||
| 795 | MX23_PAD_AUART1_CTS__SSP1_DATA4 0x01a2 | ||
| 796 | MX23_PAD_AUART1_RTS__SSP1_DATA5 0x01b2 | ||
| 797 | MX23_PAD_AUART1_RX__SSP1_DATA6 0x01c2 | ||
| 798 | MX23_PAD_AUART1_TX__SSP1_DATA7 0x01d2 | ||
| 799 | MX23_PAD_I2C_SCL__AUART1_TX 0x01e2 | ||
| 800 | MX23_PAD_I2C_SDA__AUART1_RX 0x01f2 | ||
| 801 | MX23_PAD_LCD_D08__SAIF2_SDATA0 0x1082 | ||
| 802 | MX23_PAD_LCD_D09__SAIF1_SDATA0 0x1092 | ||
| 803 | MX23_PAD_LCD_D10__SAIF_MCLK_BITCLK 0x10a2 | ||
| 804 | MX23_PAD_LCD_D11__SAIF_LRCLK 0x10b2 | ||
| 805 | MX23_PAD_LCD_D12__SAIF2_SDATA1 0x10c2 | ||
| 806 | MX23_PAD_LCD_D13__SAIF2_SDATA2 0x10d2 | ||
| 807 | MX23_PAD_LCD_D14__SAIF1_SDATA2 0x10e2 | ||
| 808 | MX23_PAD_LCD_D15__SAIF1_SDATA1 0x10f2 | ||
| 809 | MX23_PAD_LCD_D16__SAIF_ALT_BITCLK 0x1102 | ||
| 810 | MX23_PAD_LCD_RESET__GPMI_CE3N 0x1122 | ||
| 811 | MX23_PAD_PWM0__DUART_RX 0x11a2 | ||
| 812 | MX23_PAD_PWM1__DUART_TX 0x11b2 | ||
| 813 | MX23_PAD_PWM3__AUART1_CTS 0x11d2 | ||
| 814 | MX23_PAD_PWM4__AUART1_RTS 0x11e2 | ||
| 815 | MX23_PAD_SSP1_CMD__JTAG_TDO 0x2002 | ||
| 816 | MX23_PAD_SSP1_DETECT__USB_OTG_ID 0x2012 | ||
| 817 | MX23_PAD_SSP1_DATA0__JTAG_TDI 0x2022 | ||
| 818 | MX23_PAD_SSP1_DATA1__JTAG_TCLK 0x2032 | ||
| 819 | MX23_PAD_SSP1_DATA2__JTAG_RTCK 0x2042 | ||
| 820 | MX23_PAD_SSP1_DATA3__JTAG_TMS 0x2052 | ||
| 821 | MX23_PAD_SSP1_SCK__JTAG_TRST 0x2062 | ||
| 822 | MX23_PAD_ROTARYA__SPDIF 0x2072 | ||
| 823 | MX23_PAD_ROTARYB__GPMI_CE3N 0x2082 | ||
| 824 | MX23_PAD_GPMI_D00__GPIO_0_0 0x0003 | ||
| 825 | MX23_PAD_GPMI_D01__GPIO_0_1 0x0013 | ||
| 826 | MX23_PAD_GPMI_D02__GPIO_0_2 0x0023 | ||
| 827 | MX23_PAD_GPMI_D03__GPIO_0_3 0x0033 | ||
| 828 | MX23_PAD_GPMI_D04__GPIO_0_4 0x0043 | ||
| 829 | MX23_PAD_GPMI_D05__GPIO_0_5 0x0053 | ||
| 830 | MX23_PAD_GPMI_D06__GPIO_0_6 0x0063 | ||
| 831 | MX23_PAD_GPMI_D07__GPIO_0_7 0x0073 | ||
| 832 | MX23_PAD_GPMI_D08__GPIO_0_8 0x0083 | ||
| 833 | MX23_PAD_GPMI_D09__GPIO_0_9 0x0093 | ||
| 834 | MX23_PAD_GPMI_D10__GPIO_0_10 0x00a3 | ||
| 835 | MX23_PAD_GPMI_D11__GPIO_0_11 0x00b3 | ||
| 836 | MX23_PAD_GPMI_D12__GPIO_0_12 0x00c3 | ||
| 837 | MX23_PAD_GPMI_D13__GPIO_0_13 0x00d3 | ||
| 838 | MX23_PAD_GPMI_D14__GPIO_0_14 0x00e3 | ||
| 839 | MX23_PAD_GPMI_D15__GPIO_0_15 0x00f3 | ||
| 840 | MX23_PAD_GPMI_CLE__GPIO_0_16 0x0103 | ||
| 841 | MX23_PAD_GPMI_ALE__GPIO_0_17 0x0113 | ||
| 842 | MX23_PAD_GPMI_CE2N__GPIO_0_18 0x0123 | ||
| 843 | MX23_PAD_GPMI_RDY0__GPIO_0_19 0x0133 | ||
| 844 | MX23_PAD_GPMI_RDY1__GPIO_0_20 0x0143 | ||
| 845 | MX23_PAD_GPMI_RDY2__GPIO_0_21 0x0153 | ||
| 846 | MX23_PAD_GPMI_RDY3__GPIO_0_22 0x0163 | ||
| 847 | MX23_PAD_GPMI_WPN__GPIO_0_23 0x0173 | ||
| 848 | MX23_PAD_GPMI_WRN__GPIO_0_24 0x0183 | ||
| 849 | MX23_PAD_GPMI_RDN__GPIO_0_25 0x0193 | ||
| 850 | MX23_PAD_AUART1_CTS__GPIO_0_26 0x01a3 | ||
| 851 | MX23_PAD_AUART1_RTS__GPIO_0_27 0x01b3 | ||
| 852 | MX23_PAD_AUART1_RX__GPIO_0_28 0x01c3 | ||
| 853 | MX23_PAD_AUART1_TX__GPIO_0_29 0x01d3 | ||
| 854 | MX23_PAD_I2C_SCL__GPIO_0_30 0x01e3 | ||
| 855 | MX23_PAD_I2C_SDA__GPIO_0_31 0x01f3 | ||
| 856 | MX23_PAD_LCD_D00__GPIO_1_0 0x1003 | ||
| 857 | MX23_PAD_LCD_D01__GPIO_1_1 0x1013 | ||
| 858 | MX23_PAD_LCD_D02__GPIO_1_2 0x1023 | ||
| 859 | MX23_PAD_LCD_D03__GPIO_1_3 0x1033 | ||
| 860 | MX23_PAD_LCD_D04__GPIO_1_4 0x1043 | ||
| 861 | MX23_PAD_LCD_D05__GPIO_1_5 0x1053 | ||
| 862 | MX23_PAD_LCD_D06__GPIO_1_6 0x1063 | ||
| 863 | MX23_PAD_LCD_D07__GPIO_1_7 0x1073 | ||
| 864 | MX23_PAD_LCD_D08__GPIO_1_8 0x1083 | ||
| 865 | MX23_PAD_LCD_D09__GPIO_1_9 0x1093 | ||
| 866 | MX23_PAD_LCD_D10__GPIO_1_10 0x10a3 | ||
| 867 | MX23_PAD_LCD_D11__GPIO_1_11 0x10b3 | ||
| 868 | MX23_PAD_LCD_D12__GPIO_1_12 0x10c3 | ||
| 869 | MX23_PAD_LCD_D13__GPIO_1_13 0x10d3 | ||
| 870 | MX23_PAD_LCD_D14__GPIO_1_14 0x10e3 | ||
| 871 | MX23_PAD_LCD_D15__GPIO_1_15 0x10f3 | ||
| 872 | MX23_PAD_LCD_D16__GPIO_1_16 0x1103 | ||
| 873 | MX23_PAD_LCD_D17__GPIO_1_17 0x1113 | ||
| 874 | MX23_PAD_LCD_RESET__GPIO_1_18 0x1123 | ||
| 875 | MX23_PAD_LCD_RS__GPIO_1_19 0x1133 | ||
| 876 | MX23_PAD_LCD_WR__GPIO_1_20 0x1143 | ||
| 877 | MX23_PAD_LCD_CS__GPIO_1_21 0x1153 | ||
| 878 | MX23_PAD_LCD_DOTCK__GPIO_1_22 0x1163 | ||
| 879 | MX23_PAD_LCD_ENABLE__GPIO_1_23 0x1173 | ||
| 880 | MX23_PAD_LCD_HSYNC__GPIO_1_24 0x1183 | ||
| 881 | MX23_PAD_LCD_VSYNC__GPIO_1_25 0x1193 | ||
| 882 | MX23_PAD_PWM0__GPIO_1_26 0x11a3 | ||
| 883 | MX23_PAD_PWM1__GPIO_1_27 0x11b3 | ||
| 884 | MX23_PAD_PWM2__GPIO_1_28 0x11c3 | ||
| 885 | MX23_PAD_PWM3__GPIO_1_29 0x11d3 | ||
| 886 | MX23_PAD_PWM4__GPIO_1_30 0x11e3 | ||
| 887 | MX23_PAD_SSP1_CMD__GPIO_2_0 0x2003 | ||
| 888 | MX23_PAD_SSP1_DETECT__GPIO_2_1 0x2013 | ||
| 889 | MX23_PAD_SSP1_DATA0__GPIO_2_2 0x2023 | ||
| 890 | MX23_PAD_SSP1_DATA1__GPIO_2_3 0x2033 | ||
| 891 | MX23_PAD_SSP1_DATA2__GPIO_2_4 0x2043 | ||
| 892 | MX23_PAD_SSP1_DATA3__GPIO_2_5 0x2053 | ||
| 893 | MX23_PAD_SSP1_SCK__GPIO_2_6 0x2063 | ||
| 894 | MX23_PAD_ROTARYA__GPIO_2_7 0x2073 | ||
| 895 | MX23_PAD_ROTARYB__GPIO_2_8 0x2083 | ||
| 896 | MX23_PAD_EMI_A00__GPIO_2_9 0x2093 | ||
| 897 | MX23_PAD_EMI_A01__GPIO_2_10 0x20a3 | ||
| 898 | MX23_PAD_EMI_A02__GPIO_2_11 0x20b3 | ||
| 899 | MX23_PAD_EMI_A03__GPIO_2_12 0x20c3 | ||
| 900 | MX23_PAD_EMI_A04__GPIO_2_13 0x20d3 | ||
| 901 | MX23_PAD_EMI_A05__GPIO_2_14 0x20e3 | ||
| 902 | MX23_PAD_EMI_A06__GPIO_2_15 0x20f3 | ||
| 903 | MX23_PAD_EMI_A07__GPIO_2_16 0x2103 | ||
| 904 | MX23_PAD_EMI_A08__GPIO_2_17 0x2113 | ||
| 905 | MX23_PAD_EMI_A09__GPIO_2_18 0x2123 | ||
| 906 | MX23_PAD_EMI_A10__GPIO_2_19 0x2133 | ||
| 907 | MX23_PAD_EMI_A11__GPIO_2_20 0x2143 | ||
| 908 | MX23_PAD_EMI_A12__GPIO_2_21 0x2153 | ||
| 909 | MX23_PAD_EMI_BA0__GPIO_2_22 0x2163 | ||
| 910 | MX23_PAD_EMI_BA1__GPIO_2_23 0x2173 | ||
| 911 | MX23_PAD_EMI_CASN__GPIO_2_24 0x2183 | ||
| 912 | MX23_PAD_EMI_CE0N__GPIO_2_25 0x2193 | ||
| 913 | MX23_PAD_EMI_CE1N__GPIO_2_26 0x21a3 | ||
| 914 | MX23_PAD_GPMI_CE1N__GPIO_2_27 0x21b3 | ||
| 915 | MX23_PAD_GPMI_CE0N__GPIO_2_28 0x21c3 | ||
| 916 | MX23_PAD_EMI_CKE__GPIO_2_29 0x21d3 | ||
| 917 | MX23_PAD_EMI_RASN__GPIO_2_30 0x21e3 | ||
| 918 | MX23_PAD_EMI_WEN__GPIO_2_31 0x21f3 | ||
| @@ -0,0 +1,132 @@ | |||
| 1 | NVIDIA Tegra20 pinmux controller | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: "nvidia,tegra20-pinmux" | ||
| 5 | - reg: Should contain the register physical address and length for each of | ||
| 6 | the tri-state, mux, pull-up/down, and pad control register sets. | ||
| 7 | |||
| 8 | Please refer to pinctrl-bindings.txt in this directory for details of the | ||
| 9 | common pinctrl bindings used by client devices, including the meaning of the | ||
| 10 | phrase "pin configuration node". | ||
| 11 | |||
| 12 | Tegra's pin configuration nodes act as a container for an abitrary number of | ||
| 13 | subnodes. Each of these subnodes represents some desired configuration for a | ||
| 14 | pin, a group, or a list of pins or groups. This configuration can include the | ||
| 15 | mux function to select on those pin(s)/group(s), and various pin configuration | ||
| 16 | parameters, such as pull-up, tristate, drive strength, etc. | ||
| 17 | |||
| 18 | The name of each subnode is not important; all subnodes should be enumerated | ||
| 19 | and processed purely based on their content. | ||
| 20 | |||
| 21 | Each subnode only affects those parameters that are explicitly listed. In | ||
| 22 | other words, a subnode that lists a mux function but no pin configuration | ||
| 23 | parameters implies no information about any pin configuration parameters. | ||
| 24 | Similarly, a pin subnode that describes a pullup parameter implies no | ||
| 25 | information about e.g. the mux function or tristate parameter. For this | ||
| 26 | reason, even seemingly boolean values are actually tristates in this binding: | ||
| 27 | unspecified, off, or on. Unspecified is represented as an absent property, | ||
| 28 | and off/on are represented as integer values 0 and 1. | ||
| 29 | |||
| 30 | Required subnode-properties: | ||
| 31 | - nvidia,pins : An array of strings. Each string contains the name of a pin or | ||
| 32 | group. Valid values for these names are listed below. | ||
| 33 | |||
| 34 | Optional subnode-properties: | ||
| 35 | - nvidia,function: A string containing the name of the function to mux to the | ||
| 36 | pin or group. Valid values for function names are listed below. See the Tegra | ||
| 37 | TRM to determine which are valid for each pin or group. | ||
| 38 | - nvidia,pull: Integer, representing the pull-down/up to apply to the pin. | ||
| 39 | 0: none, 1: down, 2: up. | ||
| 40 | - nvidia,tristate: Integer. | ||
| 41 | 0: drive, 1: tristate. | ||
| 42 | - nvidia,high-speed-mode: Integer. Enable high speed mode the pins. | ||
| 43 | 0: no, 1: yes. | ||
| 44 | - nvidia,schmitt: Integer. Enables Schmitt Trigger on the input. | ||
| 45 | 0: no, 1: yes. | ||
| 46 | - nvidia,low-power-mode: Integer. Valid values 0-3. 0 is least power, 3 is | ||
| 47 | most power. Controls the drive power or current. See "Low Power Mode" | ||
| 48 | or "LPMD1" and "LPMD0" in the Tegra TRM. | ||
| 49 | - nvidia,pull-down-strength: Integer. Controls drive strength. 0 is weakest. | ||
| 50 | The range of valid values depends on the pingroup. See "CAL_DRVDN" in the | ||
| 51 | Tegra TRM. | ||
| 52 | - nvidia,pull-up-strength: Integer. Controls drive strength. 0 is weakest. | ||
| 53 | The range of valid values depends on the pingroup. See "CAL_DRVUP" in the | ||
| 54 | Tegra TRM. | ||
| 55 | - nvidia,slew-rate-rising: Integer. Controls rising signal slew rate. 0 is | ||
| 56 | fastest. The range of valid values depends on the pingroup. See | ||
| 57 | "DRVDN_SLWR" in the Tegra TRM. | ||
| 58 | - nvidia,slew-rate-falling: Integer. Controls falling signal slew rate. 0 is | ||
| 59 | fastest. The range of valid values depends on the pingroup. See | ||
| 60 | "DRVUP_SLWF" in the Tegra TRM. | ||
| 61 | |||
| 62 | Note that many of these properties are only valid for certain specific pins | ||
| 63 | or groups. See the Tegra TRM and various pinmux spreadsheets for complete | ||
| 64 | details regarding which groups support which functionality. The Linux pinctrl | ||
| 65 | driver may also be a useful reference, since it consolidates, disambiguates, | ||
| 66 | and corrects data from all those sources. | ||
| 67 | |||
| 68 | Valid values for pin and group names are: | ||
| 69 | |||
| 70 | mux groups: | ||
| 71 | |||
| 72 | These all support nvidia,function, nvidia,tristate, and many support | ||
| 73 | nvidia,pull. | ||
| 74 | |||
| 75 | ata, atb, atc, atd, ate, cdev1, cdev2, crtp, csus, dap1, dap2, dap3, dap4, | ||
| 76 | ddc, dta, dtb, dtc, dtd, dte, dtf, gma, gmb, gmc, gmd, gme, gpu, gpu7, | ||
| 77 | gpv, hdint, i2cp, irrx, irtx, kbca, kbcb, kbcc, kbcd, kbce, kbcf, lcsn, | ||
| 78 | ld0, ld1, ld2, ld3, ld4, ld5, ld6, ld7, ld8, ld9, ld10, ld11, ld12, ld13, | ||
| 79 | ld14, ld15, ld16, ld17, ldc, ldi, lhp0, lhp1, lhp2, lhs, lm0, lm1, lpp, | ||
| 80 | lpw0, lpw1, lpw2, lsc0, lsc1, lsck, lsda, lsdi, lspi, lvp0, lvp1, lvs, | ||
| 81 | owc, pmc, pta, rm, sdb, sdc, sdd, sdio1, slxa, slxc, slxd, slxk, spdi, | ||
| 82 | spdo, spia, spib, spic, spid, spie, spif, spig, spih, uaa, uab, uac, uad, | ||
| 83 | uca, ucb, uda. | ||
| 84 | |||
| 85 | tristate groups: | ||
| 86 | |||
| 87 | These only support nvidia,pull. | ||
| 88 | |||
| 89 | ck32, ddrc, pmca, pmcb, pmcc, pmcd, pmce, xm2c, xm2d, ls, lc, ld17_0, | ||
| 90 | ld19_18, ld21_20, ld23_22. | ||
| 91 | |||
| 92 | drive groups: | ||
| 93 | |||
| 94 | With some exceptions, these support nvidia,high-speed-mode, | ||
| 95 | nvidia,schmitt, nvidia,low-power-mode, nvidia,pull-down-strength, | ||
| 96 | nvidia,pull-up-strength, nvidia,slew_rate-rising, nvidia,slew_rate-falling. | ||
| 97 | |||
| 98 | drive_ao1, drive_ao2, drive_at1, drive_at2, drive_cdev1, drive_cdev2, | ||
| 99 | drive_csus, drive_dap1, drive_dap2, drive_dap3, drive_dap4, drive_dbg, | ||
| 100 | drive_lcd1, drive_lcd2, drive_sdmmc2, drive_sdmmc3, drive_spi, drive_uaa, | ||
| 101 | drive_uab, drive_uart2, drive_uart3, drive_vi1, drive_vi2, drive_xm2a, | ||
| 102 | drive_xm2c, drive_xm2d, drive_xm2clk, drive_sdio1, drive_crt, drive_ddc, | ||
| 103 | drive_gma, drive_gmb, drive_gmc, drive_gmd, drive_gme, drive_owr, | ||
| 104 | drive_uda. | ||
| 105 | |||
| 106 | Example: | ||
| 107 | |||
| 108 | pinctrl@70000000 { | ||
| 109 | compatible = "nvidia,tegra20-pinmux"; | ||
| 110 | reg = < 0x70000014 0x10 /* Tri-state registers */ | ||
| 111 | 0x70000080 0x20 /* Mux registers */ | ||
| 112 | 0x700000a0 0x14 /* Pull-up/down registers */ | ||
| 113 | 0x70000868 0xa8 >; /* Pad control registers */ | ||
| 114 | }; | ||
| 115 | |||
| 116 | Example board file extract: | ||
| 117 | |||
| 118 | pinctrl@70000000 { | ||
| 119 | sdio4_default: sdio4_default { | ||
| 120 | atb { | ||
| 121 | nvidia,pins = "atb", "gma", "gme"; | ||
| 122 | nvidia,function = "sdio4"; | ||
| 123 | nvidia,pull = <0>; | ||
| 124 | nvidia,tristate = <0>; | ||
| 125 | }; | ||
| 126 | }; | ||
| 127 | }; | ||
| 128 | |||
| 129 | sdhci@c8000600 { | ||
| 130 | pinctrl-names = "default"; | ||
| 131 | pinctrl-0 = <&sdio4_default>; | ||
| 132 | }; | ||
| @@ -0,0 +1,132 @@ | |||
| 1 | NVIDIA Tegra30 pinmux controller | ||
| 2 | |||
| 3 | The Tegra30 pinctrl binding is very similar to the Tegra20 pinctrl binding, | ||
| 4 | as described in nvidia,tegra20-pinmux.txt. In fact, this document assumes | ||
| 5 | that binding as a baseline, and only documents the differences between the | ||
| 6 | two bindings. | ||
| 7 | |||
| 8 | Required properties: | ||
| 9 | - compatible: "nvidia,tegra30-pinmux" | ||
| 10 | - reg: Should contain the register physical address and length for each of | ||
| 11 | the pad control and mux registers. | ||
| 12 | |||
| 13 | Tegra30 adds the following optional properties for pin configuration subnodes: | ||
| 14 | - nvidia,enable-input: Integer. Enable the pin's input path. 0: no, 1: yes. | ||
| 15 | - nvidia,open-drain: Integer. Enable open drain mode. 0: no, 1: yes. | ||
| 16 | - nvidia,lock: Integer. Lock the pin configuration against further changes | ||
| 17 | until reset. 0: no, 1: yes. | ||
| 18 | - nvidia,io-reset: Integer. Reset the IO path. 0: no, 1: yes. | ||
| 19 | |||
| 20 | As with Tegra20, see the Tegra TRM for complete details regarding which groups | ||
| 21 | support which functionality. | ||
| 22 | |||
| 23 | Valid values for pin and group names are: | ||
| 24 | |||
| 25 | per-pin mux groups: | ||
| 26 | |||
| 27 | These all support nvidia,function, nvidia,tristate, nvidia,pull, | ||
| 28 | nvidia,enable-input, nvidia,lock. Some support nvidia,open-drain, | ||
| 29 | nvidia,io-reset. | ||
| 30 | |||
| 31 | clk_32k_out_pa0, uart3_cts_n_pa1, dap2_fs_pa2, dap2_sclk_pa3, | ||
| 32 | dap2_din_pa4, dap2_dout_pa5, sdmmc3_clk_pa6, sdmmc3_cmd_pa7, gmi_a17_pb0, | ||
| 33 | gmi_a18_pb1, lcd_pwr0_pb2, lcd_pclk_pb3, sdmmc3_dat3_pb4, sdmmc3_dat2_pb5, | ||
| 34 | sdmmc3_dat1_pb6, sdmmc3_dat0_pb7, uart3_rts_n_pc0, lcd_pwr1_pc1, | ||
| 35 | uart2_txd_pc2, uart2_rxd_pc3, gen1_i2c_scl_pc4, gen1_i2c_sda_pc5, | ||
| 36 | lcd_pwr2_pc6, gmi_wp_n_pc7, sdmmc3_dat5_pd0, sdmmc3_dat4_pd1, lcd_dc1_pd2, | ||
| 37 | sdmmc3_dat6_pd3, sdmmc3_dat7_pd4, vi_d1_pd5, vi_vsync_pd6, vi_hsync_pd7, | ||
| 38 | lcd_d0_pe0, lcd_d1_pe1, lcd_d2_pe2, lcd_d3_pe3, lcd_d4_pe4, lcd_d5_pe5, | ||
| 39 | lcd_d6_pe6, lcd_d7_pe7, lcd_d8_pf0, lcd_d9_pf1, lcd_d10_pf2, lcd_d11_pf3, | ||
| 40 | lcd_d12_pf4, lcd_d13_pf5, lcd_d14_pf6, lcd_d15_pf7, gmi_ad0_pg0, | ||
| 41 | gmi_ad1_pg1, gmi_ad2_pg2, gmi_ad3_pg3, gmi_ad4_pg4, gmi_ad5_pg5, | ||
| 42 | gmi_ad6_pg6, gmi_ad7_pg7, gmi_ad8_ph0, gmi_ad9_ph1, gmi_ad10_ph2, | ||
| 43 | gmi_ad11_ph3, gmi_ad12_ph4, gmi_ad13_ph5, gmi_ad14_ph6, gmi_ad15_ph7, | ||
| 44 | gmi_wr_n_pi0, gmi_oe_n_pi1, gmi_dqs_pi2, gmi_cs6_n_pi3, gmi_rst_n_pi4, | ||
| 45 | gmi_iordy_pi5, gmi_cs7_n_pi6, gmi_wait_pi7, gmi_cs0_n_pj0, lcd_de_pj1, | ||
| 46 | gmi_cs1_n_pj2, lcd_hsync_pj3, lcd_vsync_pj4, uart2_cts_n_pj5, | ||
| 47 | uart2_rts_n_pj6, gmi_a16_pj7, gmi_adv_n_pk0, gmi_clk_pk1, gmi_cs4_n_pk2, | ||
| 48 | gmi_cs2_n_pk3, gmi_cs3_n_pk4, spdif_out_pk5, spdif_in_pk6, gmi_a19_pk7, | ||
| 49 | vi_d2_pl0, vi_d3_pl1, vi_d4_pl2, vi_d5_pl3, vi_d6_pl4, vi_d7_pl5, | ||
| 50 | vi_d8_pl6, vi_d9_pl7, lcd_d16_pm0, lcd_d17_pm1, lcd_d18_pm2, lcd_d19_pm3, | ||
| 51 | lcd_d20_pm4, lcd_d21_pm5, lcd_d22_pm6, lcd_d23_pm7, dap1_fs_pn0, | ||
| 52 | dap1_din_pn1, dap1_dout_pn2, dap1_sclk_pn3, lcd_cs0_n_pn4, lcd_sdout_pn5, | ||
| 53 | lcd_dc0_pn6, hdmi_int_pn7, ulpi_data7_po0, ulpi_data0_po1, ulpi_data1_po2, | ||
| 54 | ulpi_data2_po3, ulpi_data3_po4, ulpi_data4_po5, ulpi_data5_po6, | ||
| 55 | ulpi_data6_po7, dap3_fs_pp0, dap3_din_pp1, dap3_dout_pp2, dap3_sclk_pp3, | ||
| 56 | dap4_fs_pp4, dap4_din_pp5, dap4_dout_pp6, dap4_sclk_pp7, kb_col0_pq0, | ||
| 57 | kb_col1_pq1, kb_col2_pq2, kb_col3_pq3, kb_col4_pq4, kb_col5_pq5, | ||
| 58 | kb_col6_pq6, kb_col7_pq7, kb_row0_pr0, kb_row1_pr1, kb_row2_pr2, | ||
| 59 | kb_row3_pr3, kb_row4_pr4, kb_row5_pr5, kb_row6_pr6, kb_row7_pr7, | ||
| 60 | kb_row8_ps0, kb_row9_ps1, kb_row10_ps2, kb_row11_ps3, kb_row12_ps4, | ||
| 61 | kb_row13_ps5, kb_row14_ps6, kb_row15_ps7, vi_pclk_pt0, vi_mclk_pt1, | ||
| 62 | vi_d10_pt2, vi_d11_pt3, vi_d0_pt4, gen2_i2c_scl_pt5, gen2_i2c_sda_pt6, | ||
| 63 | sdmmc4_cmd_pt7, pu0, pu1, pu2, pu3, pu4, pu5, pu6, jtag_rtck_pu7, pv0, | ||
| 64 | pv1, pv2, pv3, ddc_scl_pv4, ddc_sda_pv5, crt_hsync_pv6, crt_vsync_pv7, | ||
| 65 | lcd_cs1_n_pw0, lcd_m1_pw1, spi2_cs1_n_pw2, spi2_cs2_n_pw3, clk1_out_pw4, | ||
| 66 | clk2_out_pw5, uart3_txd_pw6, uart3_rxd_pw7, spi2_mosi_px0, spi2_miso_px1, | ||
| 67 | spi2_sck_px2, spi2_cs0_n_px3, spi1_mosi_px4, spi1_sck_px5, spi1_cs0_n_px6, | ||
| 68 | spi1_miso_px7, ulpi_clk_py0, ulpi_dir_py1, ulpi_nxt_py2, ulpi_stp_py3, | ||
| 69 | sdmmc1_dat3_py4, sdmmc1_dat2_py5, sdmmc1_dat1_py6, sdmmc1_dat0_py7, | ||
| 70 | sdmmc1_clk_pz0, sdmmc1_cmd_pz1, lcd_sdin_pz2, lcd_wr_n_pz3, lcd_sck_pz4, | ||
| 71 | sys_clk_req_pz5, pwr_i2c_scl_pz6, pwr_i2c_sda_pz7, sdmmc4_dat0_paa0, | ||
| 72 | sdmmc4_dat1_paa1, sdmmc4_dat2_paa2, sdmmc4_dat3_paa3, sdmmc4_dat4_paa4, | ||
| 73 | sdmmc4_dat5_paa5, sdmmc4_dat6_paa6, sdmmc4_dat7_paa7, pbb0, | ||
| 74 | cam_i2c_scl_pbb1, cam_i2c_sda_pbb2, pbb3, pbb4, pbb5, pbb6, pbb7, | ||
| 75 | cam_mclk_pcc0, pcc1, pcc2, sdmmc4_rst_n_pcc3, sdmmc4_clk_pcc4, | ||
| 76 | clk2_req_pcc5, pex_l2_rst_n_pcc6, pex_l2_clkreq_n_pcc7, | ||
| 77 | pex_l0_prsnt_n_pdd0, pex_l0_rst_n_pdd1, pex_l0_clkreq_n_pdd2, | ||
| 78 | pex_wake_n_pdd3, pex_l1_prsnt_n_pdd4, pex_l1_rst_n_pdd5, | ||
| 79 | pex_l1_clkreq_n_pdd6, pex_l2_prsnt_n_pdd7, clk3_out_pee0, clk3_req_pee1, | ||
| 80 | clk1_req_pee2, hdmi_cec_pee3, clk_32k_in, core_pwr_req, cpu_pwr_req, owr, | ||
| 81 | pwr_int_n. | ||
| 82 | |||
| 83 | drive groups: | ||
| 84 | |||
| 85 | These all support nvidia,pull-down-strength, nvidia,pull-up-strength, | ||
| 86 | nvidia,slew_rate-rising, nvidia,slew_rate-falling. Most but not all | ||
| 87 | support nvidia,high-speed-mode, nvidia,schmitt, nvidia,low-power-mode. | ||
| 88 | |||
| 89 | ao1, ao2, at1, at2, at3, at4, at5, cdev1, cdev2, cec, crt, csus, dap1, | ||
| 90 | dap2, dap3, dap4, dbg, ddc, dev3, gma, gmb, gmc, gmd, gme, gmf, gmg, | ||
| 91 | gmh, gpv, lcd1, lcd2, owr, sdio1, sdio2, sdio3, spi, uaa, uab, uart2, | ||
| 92 | uart3, uda, vi1. | ||
| 93 | |||
| 94 | Example: | ||
| 95 | |||
| 96 | pinctrl@70000000 { | ||
| 97 | compatible = "nvidia,tegra30-pinmux"; | ||
| 98 | reg = < 0x70000868 0xd0 /* Pad control registers */ | ||
| 99 | 0x70003000 0x3e0 >; /* Mux registers */ | ||
| 100 | }; | ||
| 101 | |||
| 102 | Example board file extract: | ||
| 103 | |||
| 104 | pinctrl@70000000 { | ||
| 105 | sdmmc4_default: pinmux { | ||
| 106 | sdmmc4_clk_pcc4 { | ||
| 107 | nvidia,pins = "sdmmc4_clk_pcc4", | ||
| 108 | "sdmmc4_rst_n_pcc3"; | ||
| 109 | nvidia,function = "sdmmc4"; | ||
| 110 | nvidia,pull = <0>; | ||
| 111 | nvidia,tristate = <0>; | ||
| 112 | }; | ||
| 113 | sdmmc4_dat0_paa0 { | ||
| 114 | nvidia,pins = "sdmmc4_dat0_paa0", | ||
| 115 | "sdmmc4_dat1_paa1", | ||
| 116 | "sdmmc4_dat2_paa2", | ||
| 117 | "sdmmc4_dat3_paa3", | ||
| 118 | "sdmmc4_dat4_paa4", | ||
| 119 | "sdmmc4_dat5_paa5", | ||
| 120 | "sdmmc4_dat6_paa6", | ||
| 121 | "sdmmc4_dat7_paa7"; | ||
| 122 | nvidia,function = "sdmmc4"; | ||
| 123 | nvidia,pull = <2>; | ||
| 124 | nvidia,tristate = <0>; | ||
| 125 | }; | ||
| 126 | }; | ||
| 127 | }; | ||
| 128 | |||
| 129 | sdhci@78000400 { | ||
| 130 | pinctrl-names = "default"; | ||
| 131 | pinctrl-0 = <&sdmmc4_default>; | ||
| 132 | }; | ||
| @@ -0,0 +1,128 @@ | |||
| 1 | == Introduction == | ||
| 2 | |||
| 3 | Hardware modules that control pin multiplexing or configuration parameters | ||
| 4 | such as pull-up/down, tri-state, drive-strength etc are designated as pin | ||
| 5 | controllers. Each pin controller must be represented as a node in device tree, | ||
| 6 | just like any other hardware module. | ||
| 7 | |||
| 8 | Hardware modules whose signals are affected by pin configuration are | ||
| 9 | designated client devices. Again, each client device must be represented as a | ||
| 10 | node in device tree, just like any other hardware module. | ||
| 11 | |||
| 12 | For a client device to operate correctly, certain pin controllers must | ||
| 13 | set up certain specific pin configurations. Some client devices need a | ||
| 14 | single static pin configuration, e.g. set up during initialization. Others | ||
| 15 | need to reconfigure pins at run-time, for example to tri-state pins when the | ||
| 16 | device is inactive. Hence, each client device can define a set of named | ||
| 17 | states. The number and names of those states is defined by the client device's | ||
| 18 | own binding. | ||
| 19 | |||
| 20 | The common pinctrl bindings defined in this file provide an infrastructure | ||
| 21 | for client device device tree nodes to map those state names to the pin | ||
| 22 | configuration used by those states. | ||
| 23 | |||
| 24 | Note that pin controllers themselves may also be client devices of themselves. | ||
| 25 | For example, a pin controller may set up its own "active" state when the | ||
| 26 | driver loads. This would allow representing a board's static pin configuration | ||
| 27 | in a single place, rather than splitting it across multiple client device | ||
| 28 | nodes. The decision to do this or not somewhat rests with the author of | ||
| 29 | individual board device tree files, and any requirements imposed by the | ||
| 30 | bindings for the individual client devices in use by that board, i.e. whether | ||
| 31 | they require certain specific named states for dynamic pin configuration. | ||
| 32 | |||
| 33 | == Pinctrl client devices == | ||
| 34 | |||
| 35 | For each client device individually, every pin state is assigned an integer | ||
| 36 | ID. These numbers start at 0, and are contiguous. For each state ID, a unique | ||
| 37 | property exists to define the pin configuration. Each state may also be | ||
| 38 | assigned a name. When names are used, another property exists to map from | ||
| 39 | those names to the integer IDs. | ||
| 40 | |||
| 41 | Each client device's own binding determines the set of states the must be | ||
| 42 | defined in its device tree node, and whether to define the set of state | ||
| 43 | IDs that must be provided, or whether to define the set of state names that | ||
| 44 | must be provided. | ||
| 45 | |||
| 46 | Required properties: | ||
| 47 | pinctrl-0: List of phandles, each pointing at a pin configuration | ||
| 48 | node. These referenced pin configuration nodes must be child | ||
| 49 | nodes of the pin controller that they configure. Multiple | ||
| 50 | entries may exist in this list so that multiple pin | ||
| 51 | controllers may be configured, or so that a state may be built | ||
| 52 | from multiple nodes for a single pin controller, each | ||
| 53 | contributing part of the overall configuration. See the next | ||
| 54 | section of this document for details of the format of these | ||
| 55 | pin configuration nodes. | ||
| 56 | |||
| 57 | In some cases, it may be useful to define a state, but for it | ||
| 58 | to be empty. This may be required when a common IP block is | ||
| 59 | used in an SoC either without a pin controller, or where the | ||
| 60 | pin controller does not affect the HW module in question. If | ||
| 61 | the binding for that IP block requires certain pin states to | ||
| 62 | exist, they must still be defined, but may be left empty. | ||
| 63 | |||
| 64 | Optional properties: | ||
| 65 | pinctrl-1: List of phandles, each pointing at a pin configuration | ||
| 66 | node within a pin controller. | ||
| 67 | ... | ||
| 68 | pinctrl-n: List of phandles, each pointing at a pin configuration | ||
| 69 | node within a pin controller. | ||
| 70 | pinctrl-names: The list of names to assign states. List entry 0 defines the | ||
| 71 | name for integer state ID 0, list entry 1 for state ID 1, and | ||
| 72 | so on. | ||
| 73 | |||
| 74 | For example: | ||
| 75 | |||
| 76 | /* For a client device requiring named states */ | ||
| 77 | device { | ||
| 78 | pinctrl-names = "active", "idle"; | ||
| 79 | pinctrl-0 = <&state_0_node_a>; | ||
| 80 | pinctrl-1 = <&state_1_node_a &state_1_node_b>; | ||
| 81 | }; | ||
| 82 | |||
| 83 | /* For the same device if using state IDs */ | ||
| 84 | device { | ||
| 85 | pinctrl-0 = <&state_0_node_a>; | ||
| 86 | pinctrl-1 = <&state_1_node_a &state_1_node_b>; | ||
| 87 | }; | ||
| 88 | |||
| 89 | /* | ||
| 90 | * For an IP block whose binding supports pin configuration, | ||
| 91 | * but in use on an SoC that doesn't have any pin control hardware | ||
| 92 | */ | ||
| 93 | device { | ||
| 94 | pinctrl-names = "active", "idle"; | ||
| 95 | pinctrl-0 = <>; | ||
| 96 | pinctrl-1 = <>; | ||
| 97 | }; | ||
| 98 | |||
| 99 | == Pin controller devices == | ||
| 100 | |||
| 101 | Pin controller devices should contain the pin configuration nodes that client | ||
| 102 | devices reference. | ||
| 103 | |||
| 104 | For example: | ||
| 105 | |||
| 106 | pincontroller { | ||
| 107 | ... /* Standard DT properties for the device itself elided */ | ||
| 108 | |||
| 109 | state_0_node_a { | ||
| 110 | ... | ||
| 111 | }; | ||
| 112 | state_1_node_a { | ||
| 113 | ... | ||
| 114 | }; | ||
| 115 | state_1_node_b { | ||
| 116 | ... | ||
| 117 | }; | ||
| 118 | } | ||
| 119 | |||
| 120 | The contents of each of those pin configuration child nodes is defined | ||
| 121 | entirely by the binding for the individual pin controller device. There | ||
| 122 | exists no common standard for this content. | ||
| 123 | |||
| 124 | The pin configuration nodes need not be direct children of the pin controller | ||
| 125 | device; they may be grandchildren, for example. Whether this is legal, and | ||
| 126 | whether there is any interaction between the child and intermediate parent | ||
| 127 | nodes, is again defined entirely by the binding for the individual pin | ||
| 128 | controller device. | ||
| @@ -0,0 +1,155 @@ | |||
| 1 | ST Microelectronics, SPEAr pinmux controller | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible : "st,spear300-pinmux" | ||
| 5 | : "st,spear310-pinmux" | ||
| 6 | : "st,spear320-pinmux" | ||
| 7 | : "st,spear1310-pinmux" | ||
| 8 | : "st,spear1340-pinmux" | ||
| 9 | - reg : Address range of the pinctrl registers | ||
| 10 | - st,pinmux-mode: Mandatory for SPEAr300 and SPEAr320 and invalid for others. | ||
| 11 | - Its values for SPEAr300: | ||
| 12 | - NAND_MODE : <0> | ||
| 13 | - NOR_MODE : <1> | ||
| 14 | - PHOTO_FRAME_MODE : <2> | ||
| 15 | - LEND_IP_PHONE_MODE : <3> | ||
| 16 | - HEND_IP_PHONE_MODE : <4> | ||
| 17 | - LEND_WIFI_PHONE_MODE : <5> | ||
| 18 | - HEND_WIFI_PHONE_MODE : <6> | ||
| 19 | - ATA_PABX_WI2S_MODE : <7> | ||
| 20 | - ATA_PABX_I2S_MODE : <8> | ||
| 21 | - CAML_LCDW_MODE : <9> | ||
| 22 | - CAMU_LCD_MODE : <10> | ||
| 23 | - CAMU_WLCD_MODE : <11> | ||
| 24 | - CAML_LCD_MODE : <12> | ||
| 25 | - Its values for SPEAr320: | ||
| 26 | - AUTO_NET_SMII_MODE : <0> | ||
| 27 | - AUTO_NET_MII_MODE : <1> | ||
| 28 | - AUTO_EXP_MODE : <2> | ||
| 29 | - SMALL_PRINTERS_MODE : <3> | ||
| 30 | - EXTENDED_MODE : <4> | ||
| 31 | |||
| 32 | Please refer to pinctrl-bindings.txt in this directory for details of the common | ||
| 33 | pinctrl bindings used by client devices. | ||
| 34 | |||
| 35 | SPEAr's pinmux nodes act as a container for an abitrary number of subnodes. Each | ||
| 36 | of these subnodes represents muxing for a pin, a group, or a list of pins or | ||
| 37 | groups. | ||
| 38 | |||
| 39 | The name of each subnode is not important; all subnodes should be enumerated | ||
| 40 | and processed purely based on their content. | ||
| 41 | |||
| 42 | Required subnode-properties: | ||
| 43 | - st,pins : An array of strings. Each string contains the name of a pin or | ||
| 44 | group. | ||
| 45 | - st,function: A string containing the name of the function to mux to the pin or | ||
| 46 | group. See the SPEAr's TRM to determine which are valid for each pin or group. | ||
| 47 | |||
| 48 | Valid values for group and function names can be found from looking at the | ||
| 49 | group and function arrays in driver files: | ||
| 50 | drivers/pinctrl/spear/pinctrl-spear3*0.c | ||
| 51 | |||
| 52 | Valid values for group names are: | ||
| 53 | For All SPEAr3xx machines: | ||
| 54 | "firda_grp", "i2c0_grp", "ssp_cs_grp", "ssp0_grp", "mii0_grp", | ||
| 55 | "gpio0_pin0_grp", "gpio0_pin1_grp", "gpio0_pin2_grp", "gpio0_pin3_grp", | ||
| 56 | "gpio0_pin4_grp", "gpio0_pin5_grp", "uart0_ext_grp", "uart0_grp", | ||
| 57 | "timer_0_1_grp", timer_0_1_pins, "timer_2_3_grp" | ||
| 58 | |||
| 59 | For SPEAr300 machines: | ||
| 60 | "fsmc_2chips_grp", "fsmc_4chips_grp", "clcd_lcdmode_grp", | ||
| 61 | "clcd_pfmode_grp", "tdm_grp", "i2c_clk_grp_grp", "caml_grp", "camu_grp", | ||
| 62 | "dac_grp", "i2s_grp", "sdhci_4bit_grp", "sdhci_8bit_grp", | ||
| 63 | "gpio1_0_to_3_grp", "gpio1_4_to_7_grp" | ||
| 64 | |||
| 65 | For SPEAr310 machines: | ||
| 66 | "emi_cs_0_to_5_grp", "uart1_grp", "uart2_grp", "uart3_grp", "uart4_grp", | ||
| 67 | "uart5_grp", "fsmc_grp", "rs485_0_grp", "rs485_1_grp", "tdm_grp" | ||
| 68 | |||
| 69 | For SPEAr320 machines: | ||
| 70 | "clcd_grp", "emi_grp", "fsmc_8bit_grp", "fsmc_16bit_grp", "spp_grp", | ||
| 71 | "sdhci_led_grp", "sdhci_cd_12_grp", "sdhci_cd_51_grp", "i2s_grp", | ||
| 72 | "uart1_grp", "uart1_modem_2_to_7_grp", "uart1_modem_31_to_36_grp", | ||
| 73 | "uart1_modem_34_to_45_grp", "uart1_modem_80_to_85_grp", "uart2_grp", | ||
| 74 | "uart3_8_9_grp", "uart3_15_16_grp", "uart3_41_42_grp", | ||
| 75 | "uart3_52_53_grp", "uart3_73_74_grp", "uart3_94_95_grp", | ||
| 76 | "uart3_98_99_grp", "uart4_6_7_grp", "uart4_13_14_grp", | ||
| 77 | "uart4_39_40_grp", "uart4_71_72_grp", "uart4_92_93_grp", | ||
| 78 | "uart4_100_101_grp", "uart5_4_5_grp", "uart5_37_38_grp", | ||
| 79 | "uart5_69_70_grp", "uart5_90_91_grp", "uart6_2_3_grp", | ||
| 80 | "uart6_88_89_grp", "rs485_grp", "touchscreen_grp", "can0_grp", | ||
| 81 | "can1_grp", "pwm0_1_pin_8_9_grp", "pwm0_1_pin_14_15_grp", | ||
| 82 | "pwm0_1_pin_30_31_grp", "pwm0_1_pin_37_38_grp", "pwm0_1_pin_42_43_grp", | ||
| 83 | "pwm0_1_pin_59_60_grp", "pwm0_1_pin_88_89_grp", "pwm2_pin_7_grp", | ||
| 84 | "pwm2_pin_13_grp", "pwm2_pin_29_grp", "pwm2_pin_34_grp", | ||
| 85 | "pwm2_pin_41_grp", "pwm2_pin_58_grp", "pwm2_pin_87_grp", | ||
| 86 | "pwm3_pin_6_grp", "pwm3_pin_12_grp", "pwm3_pin_28_grp", | ||
| 87 | "pwm3_pin_40_grp", "pwm3_pin_57_grp", "pwm3_pin_86_grp", | ||
| 88 | "ssp1_17_20_grp", "ssp1_36_39_grp", "ssp1_48_51_grp", "ssp1_65_68_grp", | ||
| 89 | "ssp1_94_97_grp", "ssp2_13_16_grp", "ssp2_32_35_grp", "ssp2_44_47_grp", | ||
| 90 | "ssp2_61_64_grp", "ssp2_90_93_grp", "mii2_grp", "smii0_1_grp", | ||
| 91 | "rmii0_1_grp", "i2c1_8_9_grp", "i2c1_98_99_grp", "i2c2_0_1_grp", | ||
| 92 | "i2c2_2_3_grp", "i2c2_19_20_grp", "i2c2_75_76_grp", "i2c2_96_97_grp" | ||
| 93 | |||
| 94 | For SPEAr1310 machines: | ||
| 95 | "i2c0_grp", "ssp0_grp", "ssp0_cs0_grp", "ssp0_cs1_2_grp", "i2s0_grp", | ||
| 96 | "i2s1_grp", "clcd_grp", "clcd_high_res_grp", "arm_gpio_grp", | ||
| 97 | "smi_2_chips_grp", "smi_4_chips_grp", "gmii_grp", "rgmii_grp", | ||
| 98 | "smii_0_1_2_grp", "ras_mii_txclk_grp", "nand_8bit_grp", | ||
| 99 | "nand_16bit_grp", "nand_4_chips_grp", "keyboard_6x6_grp", | ||
| 100 | "keyboard_rowcol6_8_grp", "uart0_grp", "uart0_modem_grp", | ||
| 101 | "gpt0_tmr0_grp", "gpt0_tmr1_grp", "gpt1_tmr0_grp", "gpt1_tmr1_grp", | ||
| 102 | "sdhci_grp", "cf_grp", "xd_grp", "touch_xy_grp", | ||
| 103 | "uart1_disable_i2c_grp", "uart1_disable_sd_grp", "uart2_3_grp", | ||
| 104 | "uart4_grp", "uart5_grp", "rs485_0_1_tdm_0_1_grp", "i2c_1_2_grp", | ||
| 105 | "i2c3_dis_smi_clcd_grp", "i2c3_dis_sd_i2s0_grp", "i2c_4_5_dis_smi_grp", | ||
| 106 | "i2c4_dis_sd_grp", "i2c5_dis_sd_grp", "i2c_6_7_dis_kbd_grp", | ||
| 107 | "i2c6_dis_sd_grp", "i2c7_dis_sd_grp", "can0_dis_nor_grp", | ||
| 108 | "can0_dis_sd_grp", "can1_dis_sd_grp", "can1_dis_kbd_grp", "pcie0_grp", | ||
| 109 | "pcie1_grp", "pcie2_grp", "sata0_grp", "sata1_grp", "sata2_grp", | ||
| 110 | "ssp1_dis_kbd_grp", "ssp1_dis_sd_grp", "gpt64_grp" | ||
| 111 | |||
| 112 | For SPEAr1340 machines: | ||
| 113 | "pads_as_gpio_grp", "fsmc_8bit_grp", "fsmc_16bit_grp", "fsmc_pnor_grp", | ||
| 114 | "keyboard_row_col_grp", "keyboard_col5_grp", "spdif_in_grp", | ||
| 115 | "spdif_out_grp", "gpt_0_1_grp", "pwm0_grp", "pwm1_grp", "pwm2_grp", | ||
| 116 | "pwm3_grp", "vip_mux_grp", "vip_mux_cam0_grp", "vip_mux_cam1_grp", | ||
| 117 | "vip_mux_cam2_grp", "vip_mux_cam3_grp", "cam0_grp", "cam1_grp", | ||
| 118 | "cam2_grp", "cam3_grp", "smi_grp", "ssp0_grp", "ssp0_cs1_grp", | ||
| 119 | "ssp0_cs2_grp", "ssp0_cs3_grp", "uart0_grp", "uart0_enh_grp", | ||
| 120 | "uart1_grp", "i2s_in_grp", "i2s_out_grp", "gmii_grp", "rgmii_grp", | ||
| 121 | "rmii_grp", "sgmii_grp", "i2c0_grp", "i2c1_grp", "cec0_grp", "cec1_grp", | ||
| 122 | "sdhci_grp", "cf_grp", "xd_grp", "clcd_grp", "arm_trace_grp", | ||
| 123 | "miphy_dbg_grp", "pcie_grp", "sata_grp" | ||
| 124 | |||
| 125 | Valid values for function names are: | ||
| 126 | For All SPEAr3xx machines: | ||
| 127 | "firda", "i2c0", "ssp_cs", "ssp0", "mii0", "gpio0", "uart0_ext", | ||
| 128 | "uart0", "timer_0_1", "timer_2_3" | ||
| 129 | |||
| 130 | For SPEAr300 machines: | ||
| 131 | "fsmc", "clcd", "tdm", "i2c1", "cam", "dac", "i2s", "sdhci", "gpio1" | ||
| 132 | |||
| 133 | For SPEAr310 machines: | ||
| 134 | "emi", "uart1", "uart2", "uart3", "uart4", "uart5", "fsmc", "rs485_0", | ||
| 135 | "rs485_1", "tdm" | ||
| 136 | |||
| 137 | For SPEAr320 machines: | ||
| 138 | "clcd", "emi", "fsmc", "spp", "sdhci", "i2s", "uart1", "uart1_modem", | ||
| 139 | "uart2", "uart3", "uart4", "uart5", "uart6", "rs485", "touchscreen", | ||
| 140 | "can0", "can1", "pwm0_1", "pwm2", "pwm3", "ssp1", "ssp2", "mii2", | ||
| 141 | "mii0_1", "i2c1", "i2c2" | ||
| 142 | |||
| 143 | |||
| 144 | For SPEAr1310 machines: | ||
| 145 | "i2c0", "ssp0", "i2s0", "i2s1", "clcd", "arm_gpio", "smi", "gmii", | ||
| 146 | "rgmii", "smii_0_1_2", "ras_mii_txclk", "nand", "keyboard", "uart0", | ||
| 147 | "gpt0", "gpt1", "sdhci", "cf", "xd", "touchscreen", "uart1", "uart2_3", | ||
| 148 | "uart4", "uart5", "rs485_0_1_tdm_0_1", "i2c_1_2", "i2c3_i2s1", | ||
| 149 | "i2c_4_5", "i2c_6_7", "can0", "can1", "pci", "sata", "ssp1", "gpt64" | ||
| 150 | |||
| 151 | For SPEAr1340 machines: | ||
| 152 | "pads_as_gpio", "fsmc", "keyboard", "spdif_in", "spdif_out", "gpt_0_1", | ||
| 153 | "pwm", "vip", "cam0", "cam1", "cam2", "cam3", "smi", "ssp0", "uart0", | ||
| 154 | "uart1", "i2s", "gmac", "i2c0", "i2c1", "cec0", "cec1", "sdhci", "cf", | ||
| 155 | "xd", "clcd", "arm_trace", "miphy_dbg", "pcie", "sata" | ||
| @@ -1,5 +0,0 @@ | |||
| 1 | NVIDIA Tegra 2 pinmux controller | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible : "nvidia,tegra20-pinmux" | ||
| 5 | |||
| @@ -8,6 +8,8 @@ Optional properties: · 7 unmodified lines | |||
| 8 | - startup-delay-us: startup time in microseconds | 8 | - startup-delay-us: startup time in microseconds |
| 9 | - enable-active-high: Polarity of GPIO is Active high | 9 | - enable-active-high: Polarity of GPIO is Active high |
| 10 | If this property is missing, the default assumed is Active low. | 10 | If this property is missing, the default assumed is Active low. |
| 11 | - gpio-open-drain: GPIO is open drain type. | ||
| 12 | If this property is missing then default assumption is false. | ||
| 11 | 13 | ||
| 12 | Any property defined as part of the core regulator | 14 | Any property defined as part of the core regulator |
| 13 | binding, defined in regulator.txt, can also be used. | 15 | binding, defined in regulator.txt, can also be used. |
| @@ -25,5 +27,6 @@ Example: · 11 unmodified lines | |||
| 25 | gpio = <&gpio1 16 0>; | 27 | gpio = <&gpio1 16 0>; |
| 26 | startup-delay-us = <70000>; | 28 | startup-delay-us = <70000>; |
| 27 | enable-active-high; | 29 | enable-active-high; |
| 28 | regulator-boot-on | 30 | regulator-boot-on; |
| 31 | gpio-open-drain; | ||
| 29 | }; | 32 | }; |
| @@ -0,0 +1,44 @@ | |||
| 1 | TPS62360 Voltage regulators | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: Must be one of the following. | ||
| 5 | "ti,tps62360" | ||
| 6 | "ti,tps62361", | ||
| 7 | "ti,tps62362", | ||
| 8 | "ti,tps62363", | ||
| 9 | - reg: I2C slave address | ||
| 10 | |||
| 11 | Optional properties: | ||
| 12 | - ti,enable-vout-discharge: Enable output discharge. This is boolean value. | ||
| 13 | - ti,enable-pull-down: Enable pull down. This is boolean value. | ||
| 14 | - ti,vsel0-gpio: GPIO for controlling VSEL0 line. | ||
| 15 | If this property is missing, then assume that there is no GPIO | ||
| 16 | for vsel0 control. | ||
| 17 | - ti,vsel1-gpio: Gpio for controlling VSEL1 line. | ||
| 18 | If this property is missing, then assume that there is no GPIO | ||
| 19 | for vsel1 control. | ||
| 20 | - ti,vsel0-state-high: Inital state of vsel0 input is high. | ||
| 21 | If this property is missing, then assume the state as low (0). | ||
| 22 | - ti,vsel1-state-high: Inital state of vsel1 input is high. | ||
| 23 | If this property is missing, then assume the state as low (0). | ||
| 24 | |||
| 25 | Any property defined as part of the core regulator binding, defined in | ||
| 26 | regulator.txt, can also be used. | ||
| 27 | |||
| 28 | Example: | ||
| 29 | |||
| 30 | abc: tps62360 { | ||
| 31 | compatible = "ti,tps62361"; | ||
| 32 | reg = <0x60>; | ||
| 33 | regulator-name = "tps62361-vout"; | ||
| 34 | regulator-min-microvolt = <500000>; | ||
| 35 | regulator-max-microvolt = <1500000>; | ||
| 36 | regulator-boot-on | ||
| 37 | ti,vsel0-gpio = <&gpio1 16 0>; | ||
| 38 | ti,vsel1-gpio = <&gpio1 17 0>; | ||
| 39 | ti,vsel0-state-high; | ||
| 40 | ti,vsel1-state-high; | ||
| 41 | ti,enable-pull-down; | ||
| 42 | ti,enable-force-pwm; | ||
| 43 | ti,enable-vout-discharge; | ||
| 44 | }; | ||
| @@ -0,0 +1,97 @@ | |||
| 1 | TPS6586x family of regulators | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: "ti,tps6586x" | ||
| 5 | - reg: I2C slave address | ||
| 6 | - interrupts: the interrupt outputs of the controller | ||
| 7 | - #gpio-cells: number of cells to describe a GPIO | ||
| 8 | - gpio-controller: mark the device as a GPIO controller | ||
| 9 | - regulators: list of regulators provided by this controller, must be named | ||
| 10 | after their hardware counterparts: sm[0-2], ldo[0-9] and ldo_rtc | ||
| 11 | |||
| 12 | Each regulator is defined using the standard binding for regulators. | ||
| 13 | |||
| 14 | Example: | ||
| 15 | |||
| 16 | pmu: tps6586x@34 { | ||
| 17 | compatible = "ti,tps6586x"; | ||
| 18 | reg = <0x34>; | ||
| 19 | interrupts = <0 88 0x4>; | ||
| 20 | |||
| 21 | #gpio-cells = <2>; | ||
| 22 | gpio-controller; | ||
| 23 | |||
| 24 | regulators { | ||
| 25 | sm0_reg: sm0 { | ||
| 26 | regulator-min-microvolt = < 725000>; | ||
| 27 | regulator-max-microvolt = <1500000>; | ||
| 28 | regulator-boot-on; | ||
| 29 | regulator-always-on; | ||
| 30 | }; | ||
| 31 | |||
| 32 | sm1_reg: sm1 { | ||
| 33 | regulator-min-microvolt = < 725000>; | ||
| 34 | regulator-max-microvolt = <1500000>; | ||
| 35 | regulator-boot-on; | ||
| 36 | regulator-always-on; | ||
| 37 | }; | ||
| 38 | |||
| 39 | sm2_reg: sm2 { | ||
| 40 | regulator-min-microvolt = <3000000>; | ||
| 41 | regulator-max-microvolt = <4550000>; | ||
| 42 | regulator-boot-on; | ||
| 43 | regulator-always-on; | ||
| 44 | }; | ||
| 45 | |||
| 46 | ldo0_reg: ldo0 { | ||
| 47 | regulator-name = "PCIE CLK"; | ||
| 48 | regulator-min-microvolt = <3300000>; | ||
| 49 | regulator-max-microvolt = <3300000>; | ||
| 50 | }; | ||
| 51 | |||
| 52 | ldo1_reg: ldo1 { | ||
| 53 | regulator-min-microvolt = < 725000>; | ||
| 54 | regulator-max-microvolt = <1500000>; | ||
| 55 | }; | ||
| 56 | |||
| 57 | ldo2_reg: ldo2 { | ||
| 58 | regulator-min-microvolt = < 725000>; | ||
| 59 | regulator-max-microvolt = <1500000>; | ||
| 60 | }; | ||
| 61 | |||
| 62 | ldo3_reg: ldo3 { | ||
| 63 | regulator-min-microvolt = <1250000>; | ||
| 64 | regulator-max-microvolt = <3300000>; | ||
| 65 | }; | ||
| 66 | |||
| 67 | ldo4_reg: ldo4 { | ||
| 68 | regulator-min-microvolt = <1700000>; | ||
| 69 | regulator-max-microvolt = <2475000>; | ||
| 70 | }; | ||
| 71 | |||
| 72 | ldo5_reg: ldo5 { | ||
| 73 | regulator-min-microvolt = <1250000>; | ||
| 74 | regulator-max-microvolt = <3300000>; | ||
| 75 | }; | ||
| 76 | |||
| 77 | ldo6_reg: ldo6 { | ||
| 78 | regulator-min-microvolt = <1250000>; | ||
| 79 | regulator-max-microvolt = <3300000>; | ||
| 80 | }; | ||
| 81 | |||
| 82 | ldo7_reg: ldo7 { | ||
| 83 | regulator-min-microvolt = <1250000>; | ||
| 84 | regulator-max-microvolt = <3300000>; | ||
| 85 | }; | ||
| 86 | |||
| 87 | ldo8_reg: ldo8 { | ||
| 88 | regulator-min-microvolt = <1250000>; | ||
| 89 | regulator-max-microvolt = <3300000>; | ||
| 90 | }; | ||
| 91 | |||
| 92 | ldo9_reg: ldo9 { | ||
| 93 | regulator-min-microvolt = <1250000>; | ||
| 94 | regulator-max-microvolt = <3300000>; | ||
| 95 | }; | ||
| 96 | }; | ||
| 97 | }; | ||
| @@ -0,0 +1,15 @@ | |||
| 1 | * NXP LPC32xx SoC Real Time Clock controller | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: must be "nxp,lpc3220-rtc" | ||
| 5 | - reg: physical base address of the controller and length of memory mapped | ||
| 6 | region. | ||
| 7 | - interrupts: The RTC interrupt | ||
| 8 | |||
| 9 | Example: | ||
| 10 | |||
| 11 | rtc@40024000 { | ||
| 12 | compatible = "nxp,lpc3220-rtc"; | ||
| 13 | reg = <0x40024000 0x1000>; | ||
| 14 | interrupts = <52 0>; | ||
| 15 | }; | ||
| @@ -0,0 +1,17 @@ | |||
| 1 | * SPEAr RTC | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible : "st,spear600-rtc" | ||
| 5 | - reg : Address range of the rtc registers | ||
| 6 | - interrupt-parent: Should be the phandle for the interrupt controller | ||
| 7 | that services interrupts for this device | ||
| 8 | - interrupt: Should contain the rtc interrupt number | ||
| 9 | |||
| 10 | Example: | ||
| 11 | |||
| 12 | rtc@fc000000 { | ||
| 13 | compatible = "st,spear600-rtc"; | ||
| 14 | reg = <0xfc000000 0x1000>; | ||
| 15 | interrupt-parent = <&vic1>; | ||
| 16 | interrupts = <12>; | ||
| 17 | }; | ||
| @@ -0,0 +1,49 @@ | |||
| 1 | Freescale i.MX audio complex with SGTL5000 codec | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible : "fsl,imx-audio-sgtl5000" | ||
| 5 | - model : The user-visible name of this sound complex | ||
| 6 | - ssi-controller : The phandle of the i.MX SSI controller | ||
| 7 | - audio-codec : The phandle of the SGTL5000 audio codec | ||
| 8 | - audio-routing : A list of the connections between audio components. | ||
| 9 | Each entry is a pair of strings, the first being the connection's sink, | ||
| 10 | the second being the connection's source. Valid names could be power | ||
| 11 | supplies, SGTL5000 pins, and the jacks on the board: | ||
| 12 | |||
| 13 | Power supplies: | ||
| 14 | * Mic Bias | ||
| 15 | |||
| 16 | SGTL5000 pins: | ||
| 17 | * MIC_IN | ||
| 18 | * LINE_IN | ||
| 19 | * HP_OUT | ||
| 20 | * LINE_OUT | ||
| 21 | |||
| 22 | Board connectors: | ||
| 23 | * Mic Jack | ||
| 24 | * Line In Jack | ||
| 25 | * Headphone Jack | ||
| 26 | * Line Out Jack | ||
| 27 | * Ext Spk | ||
| 28 | |||
| 29 | - mux-int-port : The internal port of the i.MX audio muxer (AUDMUX) | ||
| 30 | - mux-ext-port : The external port of the i.MX audio muxer | ||
| 31 | |||
| 32 | Note: The AUDMUX port numbering should start at 1, which is consistent with | ||
| 33 | hardware manual. | ||
| 34 | |||
| 35 | Example: | ||
| 36 | |||
| 37 | sound { | ||
| 38 | compatible = "fsl,imx51-babbage-sgtl5000", | ||
| 39 | "fsl,imx-audio-sgtl5000"; | ||
| 40 | model = "imx51-babbage-sgtl5000"; | ||
| 41 | ssi-controller = <&ssi1>; | ||
| 42 | audio-codec = <&sgtl5000>; | ||
| 43 | audio-routing = | ||
| 44 | "MIC_IN", "Mic Jack", | ||
| 45 | "Mic Jack", "Mic Bias", | ||
| 46 | "Headphone Jack", "HP_OUT"; | ||
| 47 | mux-int-port = <1>; | ||
| 48 | mux-ext-port = <3>; | ||
| 49 | }; | ||
| @@ -0,0 +1,17 @@ | |||
| 1 | * Freescale MXS audio complex with SGTL5000 codec | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: "fsl,mxs-audio-sgtl5000" | ||
| 5 | - model: The user-visible name of this sound complex | ||
| 6 | - saif-controllers: The phandle list of the MXS SAIF controller | ||
| 7 | - audio-codec: The phandle of the SGTL5000 audio codec | ||
| 8 | |||
| 9 | Example: | ||
| 10 | |||
| 11 | sound { | ||
| 12 | compatible = "fsl,imx28-evk-sgtl5000", | ||
| 13 | "fsl,mxs-audio-sgtl5000"; | ||
| 14 | model = "imx28-evk-sgtl5000"; | ||
| 15 | saif-controllers = <&saif0 &saif1>; | ||
| 16 | audio-codec = <&sgtl5000>; | ||
| 17 | }; | ||
| @@ -0,0 +1,36 @@ | |||
| 1 | * Freescale MXS Serial Audio Interface (SAIF) | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: Should be "fsl,<chip>-saif" | ||
| 5 | - reg: Should contain registers location and length | ||
| 6 | - interrupts: Should contain ERROR and DMA interrupts | ||
| 7 | - fsl,saif-dma-channel: APBX DMA channel for the SAIF | ||
| 8 | |||
| 9 | Optional properties: | ||
| 10 | - fsl,saif-master: phandle to the master SAIF. It's only required for | ||
| 11 | the slave SAIF. | ||
| 12 | |||
| 13 | Note: Each SAIF controller should have an alias correctly numbered | ||
| 14 | in "aliases" node. | ||
| 15 | |||
| 16 | Example: | ||
| 17 | |||
| 18 | aliases { | ||
| 19 | saif0 = &saif0; | ||
| 20 | saif1 = &saif1; | ||
| 21 | }; | ||
| 22 | |||
| 23 | saif0: saif@80042000 { | ||
| 24 | compatible = "fsl,imx28-saif"; | ||
| 25 | reg = <0x80042000 2000>; | ||
| 26 | interrupts = <59 80>; | ||
| 27 | fsl,saif-dma-channel = <4>; | ||
| 28 | }; | ||
| 29 | |||
| 30 | saif1: saif@80046000 { | ||
| 31 | compatible = "fsl,imx28-saif"; | ||
| 32 | reg = <0x80046000 2000>; | ||
| 33 | interrupts = <58 81>; | ||
| 34 | fsl,saif-dma-channel = <5>; | ||
| 35 | fsl,saif-master = <&saif0>; | ||
| 36 | }; | ||
| @@ -0,0 +1,32 @@ | |||
| 1 | NVIDIA Tegra30 AHUB (Audio Hub) | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible : "nvidia,tegra30-ahub" | ||
| 5 | - reg : Should contain the register physical address and length for each of | ||
| 6 | the AHUB's APBIF registers and the AHUB's own registers. | ||
| 7 | - interrupts : Should contain AHUB interrupt | ||
| 8 | - nvidia,dma-request-selector : The Tegra DMA controller's phandle and | ||
| 9 | request selector for the first APBIF channel. | ||
| 10 | - ranges : The bus address mapping for the configlink register bus. | ||
| 11 | Can be empty since the mapping is 1:1. | ||
| 12 | - #address-cells : For the configlink bus. Should be <1>; | ||
| 13 | - #size-cells : For the configlink bus. Should be <1>. | ||
| 14 | |||
| 15 | AHUB client modules need to specify the IDs of their CIFs (Client InterFaces). | ||
| 16 | For RX CIFs, the numbers indicate the register number within AHUB routing | ||
| 17 | register space (APBIF 0..3 RX, I2S 0..5 RX, DAM 0..2 RX 0..1, SPDIF RX 0..1). | ||
| 18 | For TX CIFs, the numbers indicate the bit position within the AHUB routing | ||
| 19 | registers (APBIF 0..3 TX, I2S 0..5 TX, DAM 0..2 TX, SPDIF TX 0..1). | ||
| 20 | |||
| 21 | Example: | ||
| 22 | |||
| 23 | ahub@70080000 { | ||
| 24 | compatible = "nvidia,tegra30-ahub"; | ||
| 25 | reg = <0x70080000 0x200 0x70080200 0x100>; | ||
| 26 | interrupts = < 0 103 0x04 >; | ||
| 27 | nvidia,dma-request-selector = <&apbdma 1>; | ||
| 28 | |||
| 29 | ranges; | ||
| 30 | #address-cells = <1>; | ||
| 31 | #size-cells = <1>; | ||
| 32 | }; | ||
| @@ -0,0 +1,15 @@ | |||
| 1 | NVIDIA Tegra30 I2S controller | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible : "nvidia,tegra30-i2s" | ||
| 5 | - reg : Should contain I2S registers location and length | ||
| 6 | - nvidia,ahub-cif-ids : The list of AHUB CIF IDs for this port, rx (playback) | ||
| 7 | first, tx (capture) second. See nvidia,tegra30-ahub.txt for values. | ||
| 8 | |||
| 9 | Example: | ||
| 10 | |||
| 11 | i2s@70002800 { | ||
| 12 | compatible = "nvidia,tegra30-i2s"; | ||
| 13 | reg = <0x70080300 0x100>; | ||
| 14 | nvidia,ahub-cif-ids = <4 4>; | ||
| 15 | }; | ||
| @@ -0,0 +1,21 @@ | |||
| 1 | * Texas Instruments OMAP4+ Digital Microphone Module | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: "ti,omap4-dmic" | ||
| 5 | - reg: Register location and size as an array: | ||
| 6 | <MPU access base address, size>, | ||
| 7 | <L3 interconnect address, size>; | ||
| 8 | - interrupts: Interrupt number for DMIC | ||
| 9 | - interrupt-parent: The parent interrupt controller | ||
| 10 | - ti,hwmods: Name of the hwmod associated with OMAP dmic IP | ||
| 11 | |||
| 12 | Example: | ||
| 13 | |||
| 14 | dmic: dmic@4012e000 { | ||
| 15 | compatible = "ti,omap4-dmic"; | ||
| 16 | reg = <0x4012e000 0x7f>, /* MPU private access */ | ||
| 17 | <0x4902e000 0x7f>; /* L3 Interconnect */ | ||
| 18 | interrupts = <0 114 0x4>; | ||
| 19 | interrupt-parent = <&gic>; | ||
| 20 | ti,hwmods = "dmic"; | ||
| 21 | }; | ||
| @@ -0,0 +1,21 @@ | |||
| 1 | * Texas Instruments OMAP4+ McPDM | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: "ti,omap4-mcpdm" | ||
| 5 | - reg: Register location and size as an array: | ||
| 6 | <MPU access base address, size>, | ||
| 7 | <L3 interconnect address, size>; | ||
| 8 | - interrupts: Interrupt number for McPDM | ||
| 9 | - interrupt-parent: The parent interrupt controller | ||
| 10 | - ti,hwmods: Name of the hwmod associated to the McPDM | ||
| 11 | |||
| 12 | Example: | ||
| 13 | |||
| 14 | mcpdm: mcpdm@40132000 { | ||
| 15 | compatible = "ti,omap4-mcpdm"; | ||
| 16 | reg = <0x40132000 0x7f>, /* MPU private access */ | ||
| 17 | <0x49032000 0x7f>; /* L3 Interconnect */ | ||
| 18 | interrupts = <0 112 0x4>; | ||
| 19 | interrupt-parent = <&gic>; | ||
| 20 | ti,hwmods = "mcpdm"; | ||
| 21 | }; | ||
| @@ -0,0 +1,14 @@ | |||
| 1 | NVIDIA Tegra audio complex for TrimSlice | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible : "nvidia,tegra-audio-trimslice" | ||
| 5 | - nvidia,i2s-controller : The phandle of the Tegra I2S1 controller | ||
| 6 | - nvidia,audio-codec : The phandle of the WM8903 audio codec | ||
| 7 | |||
| 8 | Example: | ||
| 9 | |||
| 10 | sound { | ||
| 11 | compatible = "nvidia,tegra-audio-trimslice"; | ||
| 12 | nvidia,i2s-controller = <&tegra_i2s1>; | ||
| 13 | nvidia,audio-codec = <&codec>; | ||
| 14 | }; | ||
| @@ -0,0 +1,54 @@ | |||
| 1 | NVIDIA Tegra audio complex | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible : "nvidia,tegra-audio-wm8753" | ||
| 5 | - nvidia,model : The user-visible name of this sound complex. | ||
| 6 | - nvidia,audio-routing : A list of the connections between audio components. | ||
| 7 | Each entry is a pair of strings, the first being the connection's sink, | ||
| 8 | the second being the connection's source. Valid names for sources and | ||
| 9 | sinks are the WM8753's pins, and the jacks on the board: | ||
| 10 | |||
| 11 | WM8753 pins: | ||
| 12 | |||
| 13 | * LOUT1 | ||
| 14 | * LOUT2 | ||
| 15 | * ROUT1 | ||
| 16 | * ROUT2 | ||
| 17 | * MONO1 | ||
| 18 | * MONO2 | ||
| 19 | * OUT3 | ||
| 20 | * OUT4 | ||
| 21 | * LINE1 | ||
| 22 | * LINE2 | ||
| 23 | * RXP | ||
| 24 | * RXN | ||
| 25 | * ACIN | ||
| 26 | * ACOP | ||
| 27 | * MIC1N | ||
| 28 | * MIC1 | ||
| 29 | * MIC2N | ||
| 30 | * MIC2 | ||
| 31 | * Mic Bias | ||
| 32 | |||
| 33 | Board connectors: | ||
| 34 | |||
| 35 | * Headphone Jack | ||
| 36 | * Mic Jack | ||
| 37 | |||
| 38 | - nvidia,i2s-controller : The phandle of the Tegra I2S1 controller | ||
| 39 | - nvidia,audio-codec : The phandle of the WM8753 audio codec | ||
| 40 | Example: | ||
| 41 | |||
| 42 | sound { | ||
| 43 | compatible = "nvidia,tegra-audio-wm8753-whistler", | ||
| 44 | "nvidia,tegra-audio-wm8753" | ||
| 45 | nvidia,model = "tegra-wm8753-harmony"; | ||
| 46 | |||
| 47 | nvidia,audio-routing = | ||
| 48 | "Headphone Jack", "LOUT1", | ||
| 49 | "Headphone Jack", "ROUT1"; | ||
| 50 | |||
| 51 | nvidia,i2s-controller = <&i2s1>; | ||
| 52 | nvidia,audio-codec = <&wm8753>; | ||
| 53 | }; | ||
| 54 | |||
| @@ -0,0 +1,16 @@ | |||
| 1 | * NXP LPC32xx SoC ADC controller | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: must be "nxp,lpc3220-adc" | ||
| 5 | - reg: physical base address of the controller and length of memory mapped | ||
| 6 | region. | ||
| 7 | - interrupts: The ADC interrupt | ||
| 8 | |||
| 9 | Example: | ||
| 10 | |||
| 11 | adc@40048000 { | ||
| 12 | compatible = "nxp,lpc3220-adc"; | ||
| 13 | reg = <0x40048000 0x1000>; | ||
| 14 | interrupt-parent = <&mic>; | ||
| 15 | interrupts = <39 0>; | ||
| 16 | }; | ||
| @@ -0,0 +1,26 @@ | |||
| 1 | * ST SPEAr ADC device driver | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: Should be "st,spear600-adc" | ||
| 5 | - reg: Address and length of the register set for the device | ||
| 6 | - interrupt-parent: Should be the phandle for the interrupt controller | ||
| 7 | that services interrupts for this device | ||
| 8 | - interrupts: Should contain the ADC interrupt | ||
| 9 | - sampling-frequency: Default sampling frequency | ||
| 10 | |||
| 11 | Optional properties: | ||
| 12 | - vref-external: External voltage reference in milli-volts. If omitted | ||
| 13 | the internal voltage reference will be used. | ||
| 14 | - average-samples: Number of samples to generate an average value. If | ||
| 15 | omitted, single data conversion will be used. | ||
| 16 | |||
| 17 | Examples: | ||
| 18 | |||
| 19 | adc: adc@d8200000 { | ||
| 20 | compatible = "st,spear600-adc"; | ||
| 21 | reg = <0xd8200000 0x1000>; | ||
| 22 | interrupt-parent = <&vic1>; | ||
| 23 | interrupts = <6>; | ||
| 24 | sampling-frequency = <5000000>; | ||
| 25 | vref-external = <2500>; /* 2.5V VRef */ | ||
| 26 | }; | ||
| @@ -11,7 +11,7 @@ Optional properties: · 10 unmodified lines | |||
| 11 | 11 | ||
| 12 | Example: | 12 | Example: |
| 13 | 13 | ||
| 14 | uart@73fbc000 { | 14 | serial@73fbc000 { |
| 15 | compatible = "fsl,imx51-uart", "fsl,imx21-uart"; | 15 | compatible = "fsl,imx51-uart", "fsl,imx21-uart"; |
| 16 | reg = <0x73fbc000 0x4000>; | 16 | reg = <0x73fbc000 0x4000>; |
| 17 | interrupts = <31>; | 17 | interrupts = <31>; |
| @@ -0,0 +1,25 @@ | |||
| 1 | * NXP ISP1301 USB transceiver | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: must be "nxp,isp1301" | ||
| 5 | - reg: I2C address of the ISP1301 device | ||
| 6 | |||
| 7 | Optional properties of devices using ISP1301: | ||
| 8 | - transceiver: phandle of isp1301 - this helps the ISP1301 driver to find the | ||
| 9 | ISP1301 instance associated with the respective USB driver | ||
| 10 | |||
| 11 | Example: | ||
| 12 | |||
| 13 | isp1301: usb-transceiver@2c { | ||
| 14 | compatible = "nxp,isp1301"; | ||
| 15 | reg = <0x2c>; | ||
| 16 | }; | ||
| 17 | |||
| 18 | usbd@31020000 { | ||
| 19 | compatible = "nxp,lpc3220-udc"; | ||
| 20 | reg = <0x31020000 0x300>; | ||
| 21 | interrupt-parent = <&mic>; | ||
| 22 | interrupts = <0x3d 0>, <0x3e 0>, <0x3c 0>, <0x3a 0>; | ||
| 23 | transceiver = <&isp1301>; | ||
| 24 | status = "okay"; | ||
| 25 | }; | ||
| @@ -0,0 +1,28 @@ | |||
| 1 | * NXP LPC32xx SoC USB Device Controller (UDC) | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: Must be "nxp,lpc3220-udc" | ||
| 5 | - reg: Physical base address of the controller and length of memory mapped | ||
| 6 | region. | ||
| 7 | - interrupts: The USB interrupts: | ||
| 8 | * USB Device Low Priority Interrupt | ||
| 9 | * USB Device High Priority Interrupt | ||
| 10 | * USB Device DMA Interrupt | ||
| 11 | * External USB Transceiver Interrupt (OTG ATX) | ||
| 12 | - transceiver: phandle of the associated ISP1301 device - this is necessary for | ||
| 13 | the UDC controller for connecting to the USB physical layer | ||
| 14 | |||
| 15 | Example: | ||
| 16 | |||
| 17 | isp1301: usb-transceiver@2c { | ||
| 18 | compatible = "nxp,isp1301"; | ||
| 19 | reg = <0x2c>; | ||
| 20 | }; | ||
| 21 | |||
| 22 | usbd@31020000 { | ||
| 23 | compatible = "nxp,lpc3220-udc"; | ||
| 24 | reg = <0x31020000 0x300>; | ||
| 25 | interrupt-parent = <&mic>; | ||
| 26 | interrupts = <0x3d 0>, <0x3e 0>, <0x3c 0>, <0x3a 0>; | ||
| 27 | transceiver = <&isp1301>; | ||
| 28 | }; | ||
| @@ -0,0 +1,24 @@ | |||
| 1 | * OHCI controller, NXP ohci-nxp variant | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: must be "nxp,ohci-nxp" | ||
| 5 | - reg: physical base address of the controller and length of memory mapped | ||
| 6 | region. | ||
| 7 | - interrupts: The OHCI interrupt | ||
| 8 | - transceiver: phandle of the associated ISP1301 device - this is necessary for | ||
| 9 | the UDC controller for connecting to the USB physical layer | ||
| 10 | |||
| 11 | Example (LPC32xx): | ||
| 12 | |||
| 13 | isp1301: usb-transceiver@2c { | ||
| 14 | compatible = "nxp,isp1301"; | ||
| 15 | reg = <0x2c>; | ||
| 16 | }; | ||
| 17 | |||
| 18 | ohci@31020000 { | ||
| 19 | compatible = "nxp,ohci-nxp"; | ||
| 20 | reg = <0x31020000 0x300>; | ||
| 21 | interrupt-parent = <&mic>; | ||
| 22 | interrupts = <0x3b 0>; | ||
| 23 | transceiver = <&isp1301>; | ||
| 24 | }; | ||
| @@ -0,0 +1,39 @@ | |||
| 1 | ST SPEAr SoC USB controllers: | ||
| 2 | ----------------------------- | ||
| 3 | |||
| 4 | EHCI: | ||
| 5 | ----- | ||
| 6 | |||
| 7 | Required properties: | ||
| 8 | - compatible: "st,spear600-ehci" | ||
| 9 | - interrupt-parent: Should be the phandle for the interrupt controller | ||
| 10 | that services interrupts for this device | ||
| 11 | - interrupts: Should contain the EHCI interrupt | ||
| 12 | |||
| 13 | Example: | ||
| 14 | |||
| 15 | ehci@e1800000 { | ||
| 16 | compatible = "st,spear600-ehci", "usb-ehci"; | ||
| 17 | reg = <0xe1800000 0x1000>; | ||
| 18 | interrupt-parent = <&vic1>; | ||
| 19 | interrupts = <27>; | ||
| 20 | }; | ||
| 21 | |||
| 22 | |||
| 23 | OHCI: | ||
| 24 | ----- | ||
| 25 | |||
| 26 | Required properties: | ||
| 27 | - compatible: "st,spear600-ohci" | ||
| 28 | - interrupt-parent: Should be the phandle for the interrupt controller | ||
| 29 | that services interrupts for this device | ||
| 30 | - interrupts: Should contain the OHCI interrupt | ||
| 31 | |||
| 32 | Example: | ||
| 33 | |||
| 34 | ohci@e1900000 { | ||
| 35 | compatible = "st,spear600-ohci", "usb-ohci"; | ||
| 36 | reg = <0xe1800000 0x1000>; | ||
| 37 | interrupt-parent = <&vic1>; | ||
| 38 | interrupts = <26>; | ||
| 39 | }; | ||
| @@ -12,6 +12,9 @@ Required properties : · 11 unmodified lines | |||
| 12 | - nvidia,vbus-gpio : If present, specifies a gpio that needs to be | 12 | - nvidia,vbus-gpio : If present, specifies a gpio that needs to be |
| 13 | activated for the bus to be powered. | 13 | activated for the bus to be powered. |
| 14 | 14 | ||
| 15 | Required properties for phy_type == ulpi: | ||
| 16 | - nvidia,phy-reset-gpio : The GPIO used to reset the PHY. | ||
| 17 | |||
| 15 | Optional properties: | 18 | Optional properties: |
| 16 | - dr_mode : dual role mode. Indicates the working mode for | 19 | - dr_mode : dual role mode. Indicates the working mode for |
| 17 | nvidia,tegra20-ehci compatible controllers. Can be "host", "peripheral", | 20 | nvidia,tegra20-ehci compatible controllers. Can be "host", "peripheral", |
| @@ -8,11 +8,13 @@ amcc Applied Micro Circuits Corporation (APM, formally AMCC) · 7 unmodified lines | |||
| 8 | apm Applied Micro Circuits Corporation (APM) | 8 | apm Applied Micro Circuits Corporation (APM) |
| 9 | arm ARM Ltd. | 9 | arm ARM Ltd. |
| 10 | atmel Atmel Corporation | 10 | atmel Atmel Corporation |
| 11 | bosch Bosch Sensortec GmbH | ||
| 11 | cavium Cavium, Inc. | 12 | cavium Cavium, Inc. |
| 12 | chrp Common Hardware Reference Platform | 13 | chrp Common Hardware Reference Platform |
| 13 | cortina Cortina Systems, Inc. | 14 | cortina Cortina Systems, Inc. |
| 14 | dallas Maxim Integrated Products (formerly Dallas Semiconductor) | 15 | dallas Maxim Integrated Products (formerly Dallas Semiconductor) |
| 15 | denx Denx Software Engineering | 16 | denx Denx Software Engineering |
| 17 | emmicro EM Microelectronic | ||
| 16 | epson Seiko Epson Corp. | 18 | epson Seiko Epson Corp. |
| 17 | est ESTeem Wireless Modems | 19 | est ESTeem Wireless Modems |
| 18 | fsl Freescale Semiconductor | 20 | fsl Freescale Semiconductor |
| @@ -0,0 +1,13 @@ | |||
| 1 | * NXP PNX watchdog timer | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: must be "nxp,pnx4008-wdt" | ||
| 5 | - reg: physical base address of the controller and length of memory mapped | ||
| 6 | region. | ||
| 7 | |||
| 8 | Example: | ||
| 9 | |||
| 10 | watchdog@4003C000 { | ||
| 11 | compatible = "nxp,pnx4008-wdt"; | ||
| 12 | reg = <0x4003C000 0x1000>; | ||
| 13 | }; | ||
| @@ -551,12 +551,13 @@ Here is an example of a simple device-tree. In this example, an "o" · 550 unmodified lines | |||
| 551 | designates a node followed by the node unit name. Properties are | 551 | designates a node followed by the node unit name. Properties are |
| 552 | presented with their name followed by their content. "content" | 552 | presented with their name followed by their content. "content" |
| 553 | represents an ASCII string (zero terminated) value, while <content> | 553 | represents an ASCII string (zero terminated) value, while <content> |
| 554 | represents a 32-bit hexadecimal value. The various nodes in this | 554 | represents a 32-bit value, specified in decimal or hexadecimal (the |
| 555 | example will be discussed in a later chapter. At this point, it is | 555 | latter prefixed 0x). The various nodes in this example will be |
| 556 | only meant to give you a idea of what a device-tree looks like. I have | 556 | discussed in a later chapter. At this point, it is only meant to give |
| 557 | purposefully kept the "name" and "linux,phandle" properties which | 557 | you a idea of what a device-tree looks like. I have purposefully kept |
| 558 | aren't necessary in order to give you a better idea of what the tree | 558 | the "name" and "linux,phandle" properties which aren't necessary in |
| 559 | looks like in practice. | 559 | order to give you a better idea of what the tree looks like in |
| 560 | practice. | ||
| 560 | 561 | ||
| 561 | / o device-tree | 562 | / o device-tree |
| 562 | |- name = "device-tree" | 563 | |- name = "device-tree" |
| @@ -576,14 +577,14 @@ looks like in practice. · 13 unmodified lines | |||
| 576 | | |- name = "PowerPC,970" | 577 | | |- name = "PowerPC,970" |
| 577 | | |- device_type = "cpu" | 578 | | |- device_type = "cpu" |
| 578 | | |- reg = <0> | 579 | | |- reg = <0> |
| 579 | | |- clock-frequency = <5f5e1000> | 580 | | |- clock-frequency = <0x5f5e1000> |
| 580 | | |- 64-bit | 581 | | |- 64-bit |
| 581 | | |- linux,phandle = <2> | 582 | | |- linux,phandle = <2> |
| 582 | | | 583 | | |
| 583 | o memory@0 | 584 | o memory@0 |
| 584 | | |- name = "memory" | 585 | | |- name = "memory" |
| 585 | | |- device_type = "memory" | 586 | | |- device_type = "memory" |
| 586 | | |- reg = <00000000 00000000 00000000 20000000> | 587 | | |- reg = <0x00000000 0x00000000 0x00000000 0x20000000> |
| 587 | | |- linux,phandle = <3> | 588 | | |- linux,phandle = <3> |
| 588 | | | 589 | | |
| 589 | o chosen | 590 | o chosen |
| @@ -1010,8 +1011,8 @@ compatibility. · 420 unmodified lines | |||
| 1010 | #size-cells = <1>; | 1011 | #size-cells = <1>; |
| 1011 | #interrupt-cells = <2>; | 1012 | #interrupt-cells = <2>; |
| 1012 | device_type = "soc"; | 1013 | device_type = "soc"; |
| 1013 | ranges = <00000000 e0000000 00100000> | 1014 | ranges = <0x00000000 0xe0000000 0x00100000> |
| 1014 | reg = <e0000000 00003000>; | 1015 | reg = <0xe0000000 0x00003000>; |
| 1015 | bus-frequency = <0>; | 1016 | bus-frequency = <0>; |
| 1016 | } | 1017 | } |
| 1017 | 1018 | ||
| @@ -1085,16 +1086,16 @@ supported currently at the toplevel. · 67 unmodified lines | |||
| 1085 | * terminated string | 1086 | * terminated string |
| 1086 | */ | 1087 | */ |
| 1087 | 1088 | ||
| 1088 | property2 = <1234abcd>; /* define a property containing a | 1089 | property2 = <0x1234abcd>; /* define a property containing a |
| 1089 | * numerical 32-bit value (hexadecimal) | 1090 | * numerical 32-bit value (hexadecimal) |
| 1090 | */ | 1091 | */ |
| 1091 | 1092 | ||
| 1092 | property3 = <12345678 12345678 deadbeef>; | 1093 | property3 = <0x12345678 0x12345678 0xdeadbeef>; |
| 1093 | /* define a property containing 3 | 1094 | /* define a property containing 3 |
| 1094 | * numerical 32-bit values (cells) in | 1095 | * numerical 32-bit values (cells) in |
| 1095 | * hexadecimal | 1096 | * hexadecimal |
| 1096 | */ | 1097 | */ |
| 1097 | property4 = [0a 0b 0c 0d de ea ad be ef]; | 1098 | property4 = [0x0a 0x0b 0x0c 0x0d 0xde 0xea 0xad 0xbe 0xef]; |
| 1098 | /* define a property whose content is | 1099 | /* define a property whose content is |
| 1099 | * an arbitrary array of bytes | 1100 | * an arbitrary array of bytes |
| 1100 | */ | 1101 | */ |
| @@ -1350,10 +1351,10 @@ Appendix A - Sample SOC node for MPC8540 · 249 unmodified lines | |||
| 1350 | model = "TSEC"; | 1351 | model = "TSEC"; |
| 1351 | compatible = "gianfar", "simple-bus"; | 1352 | compatible = "gianfar", "simple-bus"; |
| 1352 | reg = <0x24000 0x1000>; | 1353 | reg = <0x24000 0x1000>; |
| 1353 | local-mac-address = [ 00 E0 0C 00 73 00 ]; | 1354 | local-mac-address = [ 0x00 0xE0 0x0C 0x00 0x73 0x00 ]; |
| 1354 | interrupts = <29 2 30 2 34 2>; | 1355 | interrupts = <0x29 2 0x30 2 0x34 2>; |
| 1355 | phy-handle = <&phy0>; | 1356 | phy-handle = <&phy0>; |
| 1356 | sleep = <&pmc 00000080>; | 1357 | sleep = <&pmc 0x00000080>; |
| 1357 | ranges; | 1358 | ranges; |
| 1358 | 1359 | ||
| 1359 | mdio@24520 { | 1360 | mdio@24520 { |
| @@ -1385,10 +1386,10 @@ Appendix A - Sample SOC node for MPC8540 · 25 unmodified lines | |||
| 1385 | model = "TSEC"; | 1386 | model = "TSEC"; |
| 1386 | compatible = "gianfar"; | 1387 | compatible = "gianfar"; |
| 1387 | reg = <0x25000 0x1000>; | 1388 | reg = <0x25000 0x1000>; |
| 1388 | local-mac-address = [ 00 E0 0C 00 73 01 ]; | 1389 | local-mac-address = [ 0x00 0xE0 0x0C 0x00 0x73 0x01 ]; |
| 1389 | interrupts = <13 2 14 2 18 2>; | 1390 | interrupts = <0x13 2 0x14 2 0x18 2>; |
| 1390 | phy-handle = <&phy1>; | 1391 | phy-handle = <&phy1>; |
| 1391 | sleep = <&pmc 00000040>; | 1392 | sleep = <&pmc 0x00000040>; |
| 1392 | }; | 1393 | }; |
| 1393 | 1394 | ||
| 1394 | ethernet@26000 { | 1395 | ethernet@26000 { |
| @@ -1396,17 +1397,17 @@ Appendix A - Sample SOC node for MPC8540 · 1 unmodified line | |||
| 1396 | model = "FEC"; | 1397 | model = "FEC"; |
| 1397 | compatible = "gianfar"; | 1398 | compatible = "gianfar"; |
| 1398 | reg = <0x26000 0x1000>; | 1399 | reg = <0x26000 0x1000>; |
| 1399 | local-mac-address = [ 00 E0 0C 00 73 02 ]; | 1400 | local-mac-address = [ 0x00 0xE0 0x0C 0x00 0x73 0x02 ]; |
| 1400 | interrupts = <41 2>; | 1401 | interrupts = <0x41 2>; |
| 1401 | phy-handle = <&phy3>; | 1402 | phy-handle = <&phy3>; |
| 1402 | sleep = <&pmc 00000020>; | 1403 | sleep = <&pmc 0x00000020>; |
| 1403 | }; | 1404 | }; |
| 1404 | 1405 | ||
| 1405 | serial@4500 { | 1406 | serial@4500 { |
| 1406 | #address-cells = <1>; | 1407 | #address-cells = <1>; |
| 1407 | #size-cells = <1>; | 1408 | #size-cells = <1>; |
| 1408 | compatible = "fsl,mpc8540-duart", "simple-bus"; | 1409 | compatible = "fsl,mpc8540-duart", "simple-bus"; |
| 1409 | sleep = <&pmc 00000002>; | 1410 | sleep = <&pmc 0x00000002>; |
| 1410 | ranges; | 1411 | ranges; |
| 1411 | 1412 | ||
| 1412 | serial@4500 { | 1413 | serial@4500 { |
| @@ -1414,7 +1415,7 @@ Appendix A - Sample SOC node for MPC8540 · 1 unmodified line | |||
| 1414 | compatible = "ns16550"; | 1415 | compatible = "ns16550"; |
| 1415 | reg = <0x4500 0x100>; | 1416 | reg = <0x4500 0x100>; |
| 1416 | clock-frequency = <0>; | 1417 | clock-frequency = <0>; |
| 1417 | interrupts = <42 2>; | 1418 | interrupts = <0x42 2>; |
| 1418 | }; | 1419 | }; |
| 1419 | 1420 | ||
| 1420 | serial@4600 { | 1421 | serial@4600 { |
| @@ -1422,7 +1423,7 @@ Appendix A - Sample SOC node for MPC8540 · 1 unmodified line | |||
| 1422 | compatible = "ns16550"; | 1423 | compatible = "ns16550"; |
| 1423 | reg = <0x4600 0x100>; | 1424 | reg = <0x4600 0x100>; |
| 1424 | clock-frequency = <0>; | 1425 | clock-frequency = <0>; |
| 1425 | interrupts = <42 2>; | 1426 | interrupts = <0x42 2>; |
| 1426 | }; | 1427 | }; |
| 1427 | }; | 1428 | }; |
| 1428 | 1429 | ||
| @@ -1436,11 +1437,11 @@ Appendix A - Sample SOC node for MPC8540 · 7 unmodified lines | |||
| 1436 | }; | 1437 | }; |
| 1437 | 1438 | ||
| 1438 | i2c@3000 { | 1439 | i2c@3000 { |
| 1439 | interrupts = <43 2>; | 1440 | interrupts = <0x43 2>; |
| 1440 | reg = <0x3000 0x100>; | 1441 | reg = <0x3000 0x100>; |
| 1441 | compatible = "fsl-i2c"; | 1442 | compatible = "fsl-i2c"; |
| 1442 | dfsrr; | 1443 | dfsrr; |
| 1443 | sleep = <&pmc 00000004>; | 1444 | sleep = <&pmc 0x00000004>; |
| 1444 | }; | 1445 | }; |
| 1445 | 1446 | ||
| 1446 | pmc: power@e0070 { | 1447 | pmc: power@e0070 { |
| @@ -29,13 +29,6 @@ The buffer-user · 28 unmodified lines | |||
| 29 | in memory, mapped into its own address space, so it can access the same area | 29 | in memory, mapped into its own address space, so it can access the same area |
| 30 | of memory. | 30 | of memory. |
| 31 | 31 | ||
| 32 | *IMPORTANT*: [see https://lkml.org/lkml/2011/12/20/211 for more details] | ||
| 33 | For this first version, A buffer shared using the dma_buf sharing API: | ||
| 34 | - *may* be exported to user space using "mmap" *ONLY* by exporter, outside of | ||
| 35 | this framework. | ||
| 36 | - with this new iteration of the dma-buf api cpu access from the kernel has been | ||
| 37 | enable, see below for the details. | ||
| 38 | |||
| 39 | dma-buf operations for device dma only | 32 | dma-buf operations for device dma only |
| 40 | -------------------------------------- | 33 | -------------------------------------- |
| 41 | 34 | ||
| @@ -300,6 +293,17 @@ Access to a dma_buf from the kernel context involves three steps: · 258 unmodified lines | |||
| 300 | Note that these calls need to always succeed. The exporter needs to complete | 293 | Note that these calls need to always succeed. The exporter needs to complete |
| 301 | any preparations that might fail in begin_cpu_access. | 294 | any preparations that might fail in begin_cpu_access. |
| 302 | 295 | ||
| 296 | For some cases the overhead of kmap can be too high, a vmap interface | ||
| 297 | is introduced. This interface should be used very carefully, as vmalloc | ||
| 298 | space is a limited resources on many architectures. | ||
| 299 | |||
| 300 | Interfaces: | ||
| 301 | void *dma_buf_vmap(struct dma_buf *dmabuf) | ||
| 302 | void dma_buf_vunmap(struct dma_buf *dmabuf, void *vaddr) | ||
| 303 | |||
| 304 | The vmap call can fail if there is no vmap support in the exporter, or if it | ||
| 305 | runs out of vmalloc space. Fallback to kmap should be implemented. | ||
| 306 | |||
| 303 | 3. Finish access | 307 | 3. Finish access |
| 304 | 308 | ||
| 305 | When the importer is done accessing the range specified in begin_cpu_access, | 309 | When the importer is done accessing the range specified in begin_cpu_access, |
| @@ -313,6 +317,83 @@ Access to a dma_buf from the kernel context involves three steps: · 7 unmodified lines | |||
| 313 | enum dma_data_direction dir); | 317 | enum dma_data_direction dir); |
| 314 | 318 | ||
| 315 | 319 | ||
| 320 | Direct Userspace Access/mmap Support | ||
| 321 | ------------------------------------ | ||
| 322 | |||
| 323 | Being able to mmap an export dma-buf buffer object has 2 main use-cases: | ||
| 324 | - CPU fallback processing in a pipeline and | ||
| 325 | - supporting existing mmap interfaces in importers. | ||
| 326 | |||
| 327 | 1. CPU fallback processing in a pipeline | ||
| 328 | |||
| 329 | In many processing pipelines it is sometimes required that the cpu can access | ||
| 330 | the data in a dma-buf (e.g. for thumbnail creation, snapshots, ...). To avoid | ||
| 331 | the need to handle this specially in userspace frameworks for buffer sharing | ||
| 332 | it's ideal if the dma_buf fd itself can be used to access the backing storage | ||
| 333 | from userspace using mmap. | ||
| 334 | |||
| 335 | Furthermore Android's ION framework already supports this (and is otherwise | ||
| 336 | rather similar to dma-buf from a userspace consumer side with using fds as | ||
| 337 | handles, too). So it's beneficial to support this in a similar fashion on | ||
| 338 | dma-buf to have a good transition path for existing Android userspace. | ||
| 339 | |||
| 340 | No special interfaces, userspace simply calls mmap on the dma-buf fd. | ||
| 341 | |||
| 342 | 2. Supporting existing mmap interfaces in exporters | ||
| 343 | |||
| 344 | Similar to the motivation for kernel cpu access it is again important that | ||
| 345 | the userspace code of a given importing subsystem can use the same interfaces | ||
| 346 | with a imported dma-buf buffer object as with a native buffer object. This is | ||
| 347 | especially important for drm where the userspace part of contemporary OpenGL, | ||
| 348 | X, and other drivers is huge, and reworking them to use a different way to | ||
| 349 | mmap a buffer rather invasive. | ||
| 350 | |||
| 351 | The assumption in the current dma-buf interfaces is that redirecting the | ||
| 352 | initial mmap is all that's needed. A survey of some of the existing | ||
| 353 | subsystems shows that no driver seems to do any nefarious thing like syncing | ||
| 354 | up with outstanding asynchronous processing on the device or allocating | ||
| 355 | special resources at fault time. So hopefully this is good enough, since | ||
| 356 | adding interfaces to intercept pagefaults and allow pte shootdowns would | ||
| 357 | increase the complexity quite a bit. | ||
| 358 | |||
| 359 | Interface: | ||
| 360 | int dma_buf_mmap(struct dma_buf *, struct vm_area_struct *, | ||
| 361 | unsigned long); | ||
| 362 | |||
| 363 | If the importing subsystem simply provides a special-purpose mmap call to set | ||
| 364 | up a mapping in userspace, calling do_mmap with dma_buf->file will equally | ||
| 365 | achieve that for a dma-buf object. | ||
| 366 | |||
| 367 | 3. Implementation notes for exporters | ||
| 368 | |||
| 369 | Because dma-buf buffers have invariant size over their lifetime, the dma-buf | ||
| 370 | core checks whether a vma is too large and rejects such mappings. The | ||
| 371 | exporter hence does not need to duplicate this check. | ||
| 372 | |||
| 373 | Because existing importing subsystems might presume coherent mappings for | ||
| 374 | userspace, the exporter needs to set up a coherent mapping. If that's not | ||
| 375 | possible, it needs to fake coherency by manually shooting down ptes when | ||
| 376 | leaving the cpu domain and flushing caches at fault time. Note that all the | ||
| 377 | dma_buf files share the same anon inode, hence the exporter needs to replace | ||
| 378 | the dma_buf file stored in vma->vm_file with it's own if pte shootdown is | ||
| 379 | requred. This is because the kernel uses the underlying inode's address_space | ||
| 380 | for vma tracking (and hence pte tracking at shootdown time with | ||
| 381 | unmap_mapping_range). | ||
| 382 | |||
| 383 | If the above shootdown dance turns out to be too expensive in certain | ||
| 384 | scenarios, we can extend dma-buf with a more explicit cache tracking scheme | ||
| 385 | for userspace mappings. But the current assumption is that using mmap is | ||
| 386 | always a slower path, so some inefficiencies should be acceptable. | ||
| 387 | |||
| 388 | Exporters that shoot down mappings (for any reasons) shall not do any | ||
| 389 | synchronization at fault time with outstanding device operations. | ||
| 390 | Synchronization is an orthogonal issue to sharing the backing storage of a | ||
| 391 | buffer and hence should not be handled by dma-buf itself. This is explictly | ||
| 392 | mentioned here because many people seem to want something like this, but if | ||
| 393 | different exporters handle this differently, buffer sharing can fail in | ||
| 394 | interesting ways depending upong the exporter (if userspace starts depending | ||
| 395 | upon this implicit synchronization). | ||
| 396 | |||
| 316 | Miscellaneous notes | 397 | Miscellaneous notes |
| 317 | ------------------- | 398 | ------------------- |
| 318 | 399 | ||
| @@ -336,6 +417,20 @@ Miscellaneous notes · 17 unmodified lines | |||
| 336 | the exporting driver to create a dmabuf fd must provide a way to let | 417 | the exporting driver to create a dmabuf fd must provide a way to let |
| 337 | userspace control setting of O_CLOEXEC flag passed in to dma_buf_fd(). | 418 | userspace control setting of O_CLOEXEC flag passed in to dma_buf_fd(). |
| 338 | 419 | ||
| 420 | - If an exporter needs to manually flush caches and hence needs to fake | ||
| 421 | coherency for mmap support, it needs to be able to zap all the ptes pointing | ||
| 422 | at the backing storage. Now linux mm needs a struct address_space associated | ||
| 423 | with the struct file stored in vma->vm_file to do that with the function | ||
| 424 | unmap_mapping_range. But the dma_buf framework only backs every dma_buf fd | ||
| 425 | with the anon_file struct file, i.e. all dma_bufs share the same file. | ||
| 426 | |||
| 427 | Hence exporters need to setup their own file (and address_space) association | ||
| 428 | by setting vma->vm_file and adjusting vma->vm_pgoff in the dma_buf mmap | ||
| 429 | callback. In the specific case of a gem driver the exporter could use the | ||
| 430 | shmem file already provided by gem (and set vm_pgoff = 0). Exporters can then | ||
| 431 | zap ptes by unmapping the corresponding range of the struct address_space | ||
| 432 | associated with their own file. | ||
| 433 | |||
| 339 | References: | 434 | References: |
| 340 | [1] struct dma_buf_ops in include/linux/dma-buf.h | 435 | [1] struct dma_buf_ops in include/linux/dma-buf.h |
| 341 | [2] All interfaces mentioned above defined in include/linux/dma-buf.h | 436 | [2] All interfaces mentioned above defined in include/linux/dma-buf.h |
| @@ -276,3 +276,11 @@ REGULATOR · 275 unmodified lines | |||
| 276 | devm_regulator_get() | 276 | devm_regulator_get() |
| 277 | devm_regulator_put() | 277 | devm_regulator_put() |
| 278 | devm_regulator_bulk_get() | 278 | devm_regulator_bulk_get() |
| 279 | |||
| 280 | CLOCK | ||
| 281 | devm_clk_get() | ||
| 282 | devm_clk_put() | ||
| 283 | |||
| 284 | PINCTRL | ||
| 285 | devm_pinctrl_get() | ||
| 286 | devm_pinctrl_put() | ||
| @@ -28,7 +28,8 @@ use IO::Handle; · 27 unmodified lines | |||
| 28 | "opera1", "cx231xx", "cx18", "cx23885", "pvrusb2", "mpc718", | 28 | "opera1", "cx231xx", "cx18", "cx23885", "pvrusb2", "mpc718", |
| 29 | "af9015", "ngene", "az6027", "lme2510_lg", "lme2510c_s7395", | 29 | "af9015", "ngene", "az6027", "lme2510_lg", "lme2510c_s7395", |
| 30 | "lme2510c_s7395_old", "drxk", "drxk_terratec_h5", | 30 | "lme2510c_s7395_old", "drxk", "drxk_terratec_h5", |
| 31 | "drxk_hauppauge_hvr930c", "tda10071", "it9135", "it9137"); | 31 | "drxk_hauppauge_hvr930c", "tda10071", "it9135", "it9137", |
| 32 | "drxk_pctv"); | ||
| 32 | 33 | ||
| 33 | # Check args | 34 | # Check args |
| 34 | syntax() if (scalar(@ARGV) != 1); | 35 | syntax() if (scalar(@ARGV) != 1); |
| @@ -730,6 +731,23 @@ sub tda10071 { · 695 unmodified lines | |||
| 730 | "$fwfile"; | 731 | "$fwfile"; |
| 731 | } | 732 | } |
| 732 | 733 | ||
| 734 | sub drxk_pctv { | ||
| 735 | my $sourcefile = "PCTV_460e_reference.zip"; | ||
| 736 | my $url = "ftp://ftp.pctvsystems.com/TV/driver/PCTV%2070e%2080e%20100e%20320e%20330e%20800e/"; | ||
| 737 | my $hash = "4403de903bf2593464c8d74bbc200a57"; | ||
| 738 | my $fwfile = "dvb-demod-drxk-pctv.fw"; | ||
| 739 | my $tmpdir = tempdir(DIR => "/tmp", CLEANUP => 1); | ||
| 740 | |||
| 741 | checkstandard(); | ||
| 742 | |||
| 743 | wgetfile($sourcefile, $url . $sourcefile); | ||
| 744 | verify($sourcefile, $hash); | ||
| 745 | unzip($sourcefile, $tmpdir); | ||
| 746 | extract("$tmpdir/PCTV\ 70e\ 80e\ 100e\ 320e\ 330e\ 800e/32\ bit/emOEM.sys", 0x72b80, 42692, $fwfile); | ||
| 747 | |||
| 748 | "$fwfile"; | ||
| 749 | } | ||
| 750 | |||
| 733 | # --------------------------------------------------------------- | 751 | # --------------------------------------------------------------- |
| 734 | # Utilities | 752 | # Utilities |
| 735 | 753 | ||
| @@ -8,7 +8,7 @@ from the windriver disk into this directory. · 7 unmodified lines | |||
| 8 | 8 | ||
| 9 | Then run | 9 | Then run |
| 10 | 10 | ||
| 11 | ./get_dvb_firware opera1 | 11 | ./get_dvb_firmware opera1 |
| 12 | 12 | ||
| 13 | and after that you have 2 files: | 13 | and after that you have 2 files: |
| 14 | 14 | ||
| @@ -24,4 +24,4 @@ After that the driver can load the firmware · 9 unmodified lines | |||
| 24 | in kernel config and have hotplug running). | 24 | in kernel config and have hotplug running). |
| 25 | 25 | ||
| 26 | 26 | ||
| 27 | Marco Gittler <g.marco@freenet.de> | 27 | Marco Gittler <g.marco@freenet.de> |
| @@ -2,17 +2,17 @@ · 1 unmodified line | |||
| 2 | Introduction | 2 | Introduction |
| 3 | ============ | 3 | ============ |
| 4 | 4 | ||
| 5 | This document describes how to use the dynamic debug (ddebug) feature. | 5 | This document describes how to use the dynamic debug (dyndbg) feature. |
| 6 | 6 | ||
| 7 | Dynamic debug is designed to allow you to dynamically enable/disable kernel | 7 | Dynamic debug is designed to allow you to dynamically enable/disable |
| 8 | code to obtain additional kernel information. Currently, if | 8 | kernel code to obtain additional kernel information. Currently, if |
| 9 | CONFIG_DYNAMIC_DEBUG is set, then all pr_debug()/dev_dbg() calls can be | 9 | CONFIG_DYNAMIC_DEBUG is set, then all pr_debug()/dev_dbg() calls can |
| 10 | dynamically enabled per-callsite. | 10 | be dynamically enabled per-callsite. |
| 11 | 11 | ||
| 12 | Dynamic debug has even more useful features: | 12 | Dynamic debug has even more useful features: |
| 13 | 13 | ||
| 14 | * Simple query language allows turning on and off debugging statements by | 14 | * Simple query language allows turning on and off debugging |
| 15 | matching any combination of 0 or 1 of: | 15 | statements by matching any combination of 0 or 1 of: |
| 16 | 16 | ||
| 17 | - source filename | 17 | - source filename |
| 18 | - function name | 18 | - function name |
| @@ -20,17 +20,19 @@ Dynamic debug has even more useful features: · 1 unmodified line | |||
| 20 | - module name | 20 | - module name |
| 21 | - format string | 21 | - format string |
| 22 | 22 | ||
| 23 | * Provides a debugfs control file: <debugfs>/dynamic_debug/control which can be | 23 | * Provides a debugfs control file: <debugfs>/dynamic_debug/control |
| 24 | read to display the complete list of known debug statements, to help guide you | 24 | which can be read to display the complete list of known debug |
| 25 | statements, to help guide you | ||
| 25 | 26 | ||
| 26 | Controlling dynamic debug Behaviour | 27 | Controlling dynamic debug Behaviour |
| 27 | =================================== | 28 | =================================== |
| 28 | 29 | ||
| 29 | The behaviour of pr_debug()/dev_dbg()s are controlled via writing to a | 30 | The behaviour of pr_debug()/dev_dbg()s are controlled via writing to a |
| 30 | control file in the 'debugfs' filesystem. Thus, you must first mount the debugfs | 31 | control file in the 'debugfs' filesystem. Thus, you must first mount |
| 31 | filesystem, in order to make use of this feature. Subsequently, we refer to the | 32 | the debugfs filesystem, in order to make use of this feature. |
| 32 | control file as: <debugfs>/dynamic_debug/control. For example, if you want to | 33 | Subsequently, we refer to the control file as: |
| 33 | enable printing from source file 'svcsock.c', line 1603 you simply do: | 34 | <debugfs>/dynamic_debug/control. For example, if you want to enable |
| 35 | printing from source file 'svcsock.c', line 1603 you simply do: | ||
| 34 | 36 | ||
| 35 | nullarbor:~ # echo 'file svcsock.c line 1603 +p' > | 37 | nullarbor:~ # echo 'file svcsock.c line 1603 +p' > |
| 36 | <debugfs>/dynamic_debug/control | 38 | <debugfs>/dynamic_debug/control |
| @@ -44,15 +46,15 @@ nullarbor:~ # echo 'file svcsock.c wtf 1 +p' > · 7 unmodified lines | |||
| 44 | Viewing Dynamic Debug Behaviour | 46 | Viewing Dynamic Debug Behaviour |
| 45 | =========================== | 47 | =========================== |
| 46 | 48 | ||
| 47 | You can view the currently configured behaviour of all the debug statements | 49 | You can view the currently configured behaviour of all the debug |
| 48 | via: | 50 | statements via: |
| 49 | 51 | ||
| 50 | nullarbor:~ # cat <debugfs>/dynamic_debug/control | 52 | nullarbor:~ # cat <debugfs>/dynamic_debug/control |
| 51 | # filename:lineno [module]function flags format | 53 | # filename:lineno [module]function flags format |
| 52 | /usr/src/packages/BUILD/sgi-enhancednfs-1.4/default/net/sunrpc/svc_rdma.c:323 [svcxprt_rdma]svc_rdma_cleanup - "SVCRDMA Module Removed, deregister RPC RDMA transport\012" | 54 | /usr/src/packages/BUILD/sgi-enhancednfs-1.4/default/net/sunrpc/svc_rdma.c:323 [svcxprt_rdma]svc_rdma_cleanup =_ "SVCRDMA Module Removed, deregister RPC RDMA transport\012" |
| 53 | /usr/src/packages/BUILD/sgi-enhancednfs-1.4/default/net/sunrpc/svc_rdma.c:341 [svcxprt_rdma]svc_rdma_init - "\011max_inline : %d\012" | 55 | /usr/src/packages/BUILD/sgi-enhancednfs-1.4/default/net/sunrpc/svc_rdma.c:341 [svcxprt_rdma]svc_rdma_init =_ "\011max_inline : %d\012" |
| 54 | /usr/src/packages/BUILD/sgi-enhancednfs-1.4/default/net/sunrpc/svc_rdma.c:340 [svcxprt_rdma]svc_rdma_init - "\011sq_depth : %d\012" | 56 | /usr/src/packages/BUILD/sgi-enhancednfs-1.4/default/net/sunrpc/svc_rdma.c:340 [svcxprt_rdma]svc_rdma_init =_ "\011sq_depth : %d\012" |
| 55 | /usr/src/packages/BUILD/sgi-enhancednfs-1.4/default/net/sunrpc/svc_rdma.c:338 [svcxprt_rdma]svc_rdma_init - "\011max_requests : %d\012" | 57 | /usr/src/packages/BUILD/sgi-enhancednfs-1.4/default/net/sunrpc/svc_rdma.c:338 [svcxprt_rdma]svc_rdma_init =_ "\011max_requests : %d\012" |
| 56 | ... | 58 | ... |
| 57 | 59 | ||
| 58 | 60 | ||
| @@ -65,12 +67,12 @@ nullarbor:~ # grep -i rdma <debugfs>/dynamic_debug/control | wc -l · 6 unmodified lines | |||
| 65 | nullarbor:~ # grep -i tcp <debugfs>/dynamic_debug/control | wc -l | 67 | nullarbor:~ # grep -i tcp <debugfs>/dynamic_debug/control | wc -l |
| 66 | 42 | 68 | 42 |
| 67 | 69 | ||
| 68 | Note in particular that the third column shows the enabled behaviour | 70 | The third column shows the currently enabled flags for each debug |
| 69 | flags for each debug statement callsite (see below for definitions of the | 71 | statement callsite (see below for definitions of the flags). The |
| 70 | flags). The default value, no extra behaviour enabled, is "-". So | 72 | default value, with no flags enabled, is "=_". So you can view all |
| 71 | you can view all the debug statement callsites with any non-default flags: | 73 | the debug statement callsites with any non-default flags: |
| 72 | 74 | ||
| 73 | nullarbor:~ # awk '$3 != "-"' <debugfs>/dynamic_debug/control | 75 | nullarbor:~ # awk '$3 != "=_"' <debugfs>/dynamic_debug/control |
| 74 | # filename:lineno [module]function flags format | 76 | # filename:lineno [module]function flags format |
| 75 | /usr/src/packages/BUILD/sgi-enhancednfs-1.4/default/net/sunrpc/svcsock.c:1603 [sunrpc]svc_send p "svc_process: st_sendto returned %d\012" | 77 | /usr/src/packages/BUILD/sgi-enhancednfs-1.4/default/net/sunrpc/svcsock.c:1603 [sunrpc]svc_send p "svc_process: st_sendto returned %d\012" |
| 76 | 78 | ||
| @@ -103,15 +105,14 @@ specifications, followed by a flags change specification. · 26 unmodified lines | |||
| 103 | 105 | ||
| 104 | command ::= match-spec* flags-spec | 106 | command ::= match-spec* flags-spec |
| 105 | 107 | ||
| 106 | The match-spec's are used to choose a subset of the known dprintk() | 108 | The match-spec's are used to choose a subset of the known pr_debug() |
| 107 | callsites to which to apply the flags-spec. Think of them as a query | 109 | callsites to which to apply the flags-spec. Think of them as a query |
| 108 | with implicit ANDs between each pair. Note that an empty list of | 110 | with implicit ANDs between each pair. Note that an empty list of |
| 109 | match-specs is possible, but is not very useful because it will not | 111 | match-specs will select all debug statement callsites. |
| 110 | match any debug statement callsites. | ||
| 111 | 112 | ||
| 112 | A match specification comprises a keyword, which controls the attribute | 113 | A match specification comprises a keyword, which controls the |
| 113 | of the callsite to be compared, and a value to compare against. Possible | 114 | attribute of the callsite to be compared, and a value to compare |
| 114 | keywords are: | 115 | against. Possible keywords are: |
| 115 | 116 | ||
| 116 | match-spec ::= 'func' string | | 117 | match-spec ::= 'func' string | |
| 117 | 'file' string | | 118 | 'file' string | |
| @@ -164,15 +165,15 @@ format · 46 unmodified lines | |||
| 164 | characters (") or single quote characters ('). | 165 | characters (") or single quote characters ('). |
| 165 | Examples: | 166 | Examples: |
| 166 | 167 | ||
| 167 | format svcrdma: // many of the NFS/RDMA server dprintks | 168 | format svcrdma: // many of the NFS/RDMA server pr_debugs |
| 168 | format readahead // some dprintks in the readahead cache | 169 | format readahead // some pr_debugs in the readahead cache |
| 169 | format nfsd:\040SETATTR // one way to match a format with whitespace | 170 | format nfsd:\040SETATTR // one way to match a format with whitespace |
| 170 | format "nfsd: SETATTR" // a neater way to match a format with whitespace | 171 | format "nfsd: SETATTR" // a neater way to match a format with whitespace |
| 171 | format 'nfsd: SETATTR' // yet another way to match a format with whitespace | 172 | format 'nfsd: SETATTR' // yet another way to match a format with whitespace |
| 172 | 173 | ||
| 173 | line | 174 | line |
| 174 | The given line number or range of line numbers is compared | 175 | The given line number or range of line numbers is compared |
| 175 | against the line number of each dprintk() callsite. A single | 176 | against the line number of each pr_debug() callsite. A single |
| 176 | line number matches the callsite line number exactly. A | 177 | line number matches the callsite line number exactly. A |
| 177 | range of line numbers matches any callsite between the first | 178 | range of line numbers matches any callsite between the first |
| 178 | and last line number inclusive. An empty first number means | 179 | and last line number inclusive. An empty first number means |
| @@ -188,51 +189,93 @@ The flags specification comprises a change operation followed · 9 unmodified lines | |||
| 188 | by one or more flag characters. The change operation is one | 189 | by one or more flag characters. The change operation is one |
| 189 | of the characters: | 190 | of the characters: |
| 190 | 191 | ||
| 191 | - | 192 | - remove the given flags |
| 192 | remove the given flags | 193 | + add the given flags |
| 193 | 194 | = set the flags to the given flags | |
| 194 | + | ||
| 195 | add the given flags | ||
| 196 | |||
| 197 | = | ||
| 198 | set the flags to the given flags | ||
| 199 | 195 | ||
| 200 | The flags are: | 196 | The flags are: |
| 201 | 197 | ||
| 202 | f | 198 | p enables the pr_debug() callsite. |
| 203 | Include the function name in the printed message | 199 | f Include the function name in the printed message |
| 204 | l | 200 | l Include line number in the printed message |
| 205 | Include line number in the printed message | 201 | m Include module name in the printed message |
| 206 | m | 202 | t Include thread ID in messages not generated from interrupt context |
| 207 | Include module name in the printed message | 203 | _ No flags are set. (Or'd with others on input) |
| 208 | p | 204 | |
| 209 | Causes a printk() message to be emitted to dmesg | 205 | For display, the flags are preceded by '=' |
| 210 | t | 206 | (mnemonic: what the flags are currently equal to). |
| 211 | Include thread ID in messages not generated from interrupt context | ||
| 212 | 207 | ||
| 213 | Note the regexp ^[-+=][flmpt]+$ matches a flags specification. | 208 | Note the regexp ^[-+=][flmpt_]+$ matches a flags specification. |
| 214 | Note also that there is no convenient syntax to remove all | 209 | To clear all flags at once, use "=_" or "-flmpt". |
| 215 | the flags at once, you need to use "-flmpt". | ||
| 216 | 210 | ||
| 217 | 211 | ||
| 218 | Debug messages during boot process | 212 | Debug messages during Boot Process |
| 219 | ================================== | 213 | ================================== |
| 220 | 214 | ||
| 221 | To be able to activate debug messages during the boot process, | 215 | To activate debug messages for core code and built-in modules during |
| 222 | even before userspace and debugfs exists, use the boot parameter: | 216 | the boot process, even before userspace and debugfs exists, use |
| 223 | ddebug_query="QUERY" | 217 | dyndbg="QUERY", module.dyndbg="QUERY", or ddebug_query="QUERY" |
| 218 | (ddebug_query is obsoleted by dyndbg, and deprecated). QUERY follows | ||
| 219 | the syntax described above, but must not exceed 1023 characters. Your | ||
| 220 | bootloader may impose lower limits. | ||
| 221 | |||
| 222 | These dyndbg params are processed just after the ddebug tables are | ||
| 223 | processed, as part of the arch_initcall. Thus you can enable debug | ||
| 224 | messages in all code run after this arch_initcall via this boot | ||
| 225 | parameter. | ||
| 224 | 226 | ||
| 225 | QUERY follows the syntax described above, but must not exceed 1023 | ||
| 226 | characters. The enablement of debug messages is done as an arch_initcall. | ||
| 227 | Thus you can enable debug messages in all code processed after this | ||
| 228 | arch_initcall via this boot parameter. | ||
| 229 | On an x86 system for example ACPI enablement is a subsys_initcall and | 227 | On an x86 system for example ACPI enablement is a subsys_initcall and |
| 230 | ddebug_query="file ec.c +p" | 228 | dyndbg="file ec.c +p" |
| 231 | will show early Embedded Controller transactions during ACPI setup if | 229 | will show early Embedded Controller transactions during ACPI setup if |
| 232 | your machine (typically a laptop) has an Embedded Controller. | 230 | your machine (typically a laptop) has an Embedded Controller. |
| 233 | PCI (or other devices) initialization also is a hot candidate for using | 231 | PCI (or other devices) initialization also is a hot candidate for using |
| 234 | this boot parameter for debugging purposes. | 232 | this boot parameter for debugging purposes. |
| 235 | 233 | ||
| 234 | If foo module is not built-in, foo.dyndbg will still be processed at | ||
| 235 | boot time, without effect, but will be reprocessed when module is | ||
| 236 | loaded later. dyndbg_query= and bare dyndbg= are only processed at | ||
| 237 | boot. | ||
| 238 | |||
| 239 | |||
| 240 | Debug Messages at Module Initialization Time | ||
| 241 | ============================================ | ||
| 242 | |||
| 243 | When "modprobe foo" is called, modprobe scans /proc/cmdline for | ||
| 244 | foo.params, strips "foo.", and passes them to the kernel along with | ||
| 245 | params given in modprobe args or /etc/modprob.d/*.conf files, | ||
| 246 | in the following order: | ||
| 247 | |||
| 248 | 1. # parameters given via /etc/modprobe.d/*.conf | ||
| 249 | options foo dyndbg=+pt | ||
| 250 | options foo dyndbg # defaults to +p | ||
| 251 | |||
| 252 | 2. # foo.dyndbg as given in boot args, "foo." is stripped and passed | ||
| 253 | foo.dyndbg=" func bar +p; func buz +mp" | ||
| 254 | |||
| 255 | 3. # args to modprobe | ||
| 256 | modprobe foo dyndbg==pmf # override previous settings | ||
| 257 | |||
| 258 | These dyndbg queries are applied in order, with last having final say. | ||
| 259 | This allows boot args to override or modify those from /etc/modprobe.d | ||
| 260 | (sensible, since 1 is system wide, 2 is kernel or boot specific), and | ||
| 261 | modprobe args to override both. | ||
| 262 | |||
| 263 | In the foo.dyndbg="QUERY" form, the query must exclude "module foo". | ||
| 264 | "foo" is extracted from the param-name, and applied to each query in | ||
| 265 | "QUERY", and only 1 match-spec of each type is allowed. | ||
| 266 | |||
| 267 | The dyndbg option is a "fake" module parameter, which means: | ||
| 268 | |||
| 269 | - modules do not need to define it explicitly | ||
| 270 | - every module gets it tacitly, whether they use pr_debug or not | ||
| 271 | - it doesnt appear in /sys/module/$module/parameters/ | ||
| 272 | To see it, grep the control file, or inspect /proc/cmdline. | ||
| 273 | |||
| 274 | For CONFIG_DYNAMIC_DEBUG kernels, any settings given at boot-time (or | ||
| 275 | enabled by -DDEBUG flag during compilation) can be disabled later via | ||
| 276 | the sysfs interface if the debug messages are no longer needed: | ||
| 277 | |||
| 278 | echo "module module_name -p" > <debugfs>/dynamic_debug/control | ||
| 236 | 279 | ||
| 237 | Examples | 280 | Examples |
| 238 | ======== | 281 | ======== |
| @@ -260,3 +303,18 @@ nullarbor:~ # echo -n 'func svc_process -p' > · 21 unmodified lines | |||
| 260 | // enable messages for NFS calls READ, READLINK, READDIR and READDIR+. | 303 | // enable messages for NFS calls READ, READLINK, READDIR and READDIR+. |
| 261 | nullarbor:~ # echo -n 'format "nfsd: READ" +p' > | 304 | nullarbor:~ # echo -n 'format "nfsd: READ" +p' > |
| 262 | <debugfs>/dynamic_debug/control | 305 | <debugfs>/dynamic_debug/control |
| 306 | |||
| 307 | // enable all messages | ||
| 308 | nullarbor:~ # echo -n '+p' > <debugfs>/dynamic_debug/control | ||
| 309 | |||
| 310 | // add module, function to all enabled messages | ||
| 311 | nullarbor:~ # echo -n '+mf' > <debugfs>/dynamic_debug/control | ||
| 312 | |||
| 313 | // boot-args example, with newlines and comments for readability | ||
| 314 | Kernel command line: ... | ||
| 315 | // see whats going on in dyndbg=value processing | ||
| 316 | dynamic_debug.verbose=1 | ||
| 317 | // enable pr_debugs in 2 builtins, #cmt is stripped | ||
| 318 | dyndbg="module params +p #cmt ; module sys +p" | ||
| 319 | // enable pr_debugs in 2 functions in a module loaded later | ||
| 320 | pc87360.dyndbg="func pc87360_init_device +p; func pc87360_find +p" | ||
| @@ -734,7 +734,7 @@ were done at i7core_edac driver. This chapter will cover those differences · 733 unmodified lines | |||
| 734 | associated with a physical CPU socket. | 734 | associated with a physical CPU socket. |
| 735 | 735 | ||
| 736 | Each MC have 3 physical read channels, 3 physical write channels and | 736 | Each MC have 3 physical read channels, 3 physical write channels and |
| 737 | 3 logic channels. The driver currenty sees it as just 3 channels. | 737 | 3 logic channels. The driver currently sees it as just 3 channels. |
| 738 | Each channel can have up to 3 DIMMs. | 738 | Each channel can have up to 3 DIMMs. |
| 739 | 739 | ||
| 740 | The minimum known unity is DIMMs. There are no information about csrows. | 740 | The minimum known unity is DIMMs. There are no information about csrows. |
| @@ -179,7 +179,7 @@ CONFIG_ALPHA_JENSEN or CONFIG_EISA_VLB_PRIMING are set. · 178 unmodified lines | |||
| 179 | 179 | ||
| 180 | Converting an EISA driver to the new API mostly involves *deleting* | 180 | Converting an EISA driver to the new API mostly involves *deleting* |
| 181 | code (since probing is now in the core EISA code). Unfortunately, most | 181 | code (since probing is now in the core EISA code). Unfortunately, most |
| 182 | drivers share their probing routine between ISA, MCA and EISA. Special | 182 | drivers share their probing routine between ISA, and EISA. Special |
| 183 | care must be taken when ripping out the EISA code, so other busses | 183 | care must be taken when ripping out the EISA code, so other busses |
| 184 | won't suffer from these surgical strikes... | 184 | won't suffer from these surgical strikes... |
| 185 | 185 | ||
| @@ -0,0 +1,124 @@ | |||
| 1 | |||
| 2 | Staging/Android Switch Class Porting Guide | ||
| 3 | (linux/drivers/staging/android/switch) | ||
| 4 | (c) Copyright 2012 Samsung Electronics | ||
| 5 | |||
| 6 | AUTHORS | ||
| 7 | MyungJoo Ham <myungjoo.ham@samsung.com> | ||
| 8 | |||
| 9 | /***************************************************************** | ||
| 10 | * CHAPTER 1. * | ||
| 11 | * PORTING SWITCH CLASS DEVICE DRIVERS * | ||
| 12 | *****************************************************************/ | ||
| 13 | |||
| 14 | ****** STEP 1. Basic Functionality | ||
| 15 | No extcon extended feature, but switch features only. | ||
| 16 | |||
| 17 | - struct switch_dev (fed to switch_dev_register/unregister) | ||
| 18 | @name: no change | ||
| 19 | @dev: no change | ||
| 20 | @index: drop (not used in switch device driver side anyway) | ||
| 21 | @state: no change | ||
| 22 | If you have used @state with magic numbers, keep it | ||
| 23 | at this step. | ||
| 24 | @print_name: no change but type change (switch_dev->extcon_dev) | ||
| 25 | @print_state: no change but type change (switch_dev->extcon_dev) | ||
| 26 | |||
| 27 | - switch_dev_register(sdev, dev) | ||
| 28 | => extcon_dev_register(edev, dev) | ||
| 29 | : no change but type change (sdev->edev) | ||
| 30 | - switch_dev_unregister(sdev) | ||
| 31 | => extcon_dev_unregister(edev) | ||
| 32 | : no change but type change (sdev->edev) | ||
| 33 | - switch_get_state(sdev) | ||
| 34 | => extcon_get_state(edev) | ||
| 35 | : no change but type change (sdev->edev) and (return: int->u32) | ||
| 36 | - switch_set_state(sdev, state) | ||
| 37 | => extcon_set_state(edev, state) | ||
| 38 | : no change but type change (sdev->edev) and (state: int->u32) | ||
| 39 | |||
| 40 | With this changes, the ex-switch extcon class device works as it once | ||
| 41 | worked as switch class device. However, it will now have additional | ||
| 42 | interfaces (both ABI and in-kernel API) and different ABI locations. | ||
| 43 | However, if CONFIG_ANDROID is enabled without CONFIG_ANDROID_SWITCH, | ||
| 44 | /sys/class/switch/* will be symbolically linked to /sys/class/extcon/ | ||
| 45 | so that they are still compatible with legacy userspace processes. | ||
| 46 | |||
| 47 | ****** STEP 2. Multistate (no more magic numbers in state value) | ||
| 48 | Extcon's extended features for switch device drivers with | ||
| 49 | complex features usually required magic numbers in state | ||
| 50 | value of switch_dev. With extcon, such magic numbers that | ||
| 51 | support multiple cables ( | ||
| 52 | |||
| 53 | 1. Define cable names at edev->supported_cable. | ||
| 54 | 2. (Recommended) remove print_state callback. | ||
| 55 | 3. Use extcon_get_cable_state_(edev, index) or | ||
| 56 | extcon_get_cable_state(edev, cable_name) instead of | ||
| 57 | extcon_get_state(edev) if you intend to get a state of a specific | ||
| 58 | cable. Same for set_state. This way, you can remove the usage of | ||
| 59 | magic numbers in state value. | ||
| 60 | 4. Use extcon_update_state() if you are updating specific bits of | ||
| 61 | the state value. | ||
| 62 | |||
| 63 | Example: a switch device driver w/ magic numbers for two cables. | ||
| 64 | "0x00": no cables connected. | ||
| 65 | "0x01": cable 1 connected | ||
| 66 | "0x02": cable 2 connected | ||
| 67 | "0x03": cable 1 and 2 connected | ||
| 68 | 1. edev->supported_cable = {"1", "2", NULL}; | ||
| 69 | 2. edev->print_state = NULL; | ||
| 70 | 3. extcon_get_cable_state_(edev, 0) shows cable 1's state. | ||
| 71 | extcon_get_cable_state(edev, "1") shows cable 1's state. | ||
| 72 | extcon_set_cable_state_(edev, 1) sets cable 2's state. | ||
| 73 | extcon_set_cable_state(edev, "2") sets cable 2's state | ||
| 74 | 4. extcon_update_state(edev, 0x01, 0) sets the least bit's 0. | ||
| 75 | |||
| 76 | ****** STEP 3. Notify other device drivers | ||
| 77 | |||
| 78 | You can notify others of the cable attach/detach events with | ||
| 79 | notifier chains. | ||
| 80 | |||
| 81 | At the side of other device drivers (the extcon device itself | ||
| 82 | does not need to get notified of its own events), there are two | ||
| 83 | methods to register notifier_block for cable events: | ||
| 84 | (a) for a specific cable or (b) for every cable. | ||
| 85 | |||
| 86 | (a) extcon_register_interest(obj, extcon_name, cable_name, nb) | ||
| 87 | Example: want to get news of "MAX8997_MUIC"'s "USB" cable | ||
| 88 | |||
| 89 | obj = kzalloc(sizeof(struct extcon_specific_cable_nb), | ||
| 90 | GFP_KERNEL); | ||
| 91 | nb->notifier_call = the_callback_to_handle_usb; | ||
| 92 | |||
| 93 | extcon_register_intereset(obj, "MAX8997_MUIC", "USB", nb); | ||
| 94 | |||
| 95 | (b) extcon_register_notifier(edev, nb) | ||
| 96 | Call nb for any changes in edev. | ||
| 97 | |||
| 98 | Please note that in order to properly behave with method (a), | ||
| 99 | the extcon device driver should support multistate feature (STEP 2). | ||
| 100 | |||
| 101 | ****** STEP 4. Inter-cable relation (mutually exclusive) | ||
| 102 | |||
| 103 | You can provide inter-cable mutually exclusiveness information | ||
| 104 | for an extcon device. When cables A and B are declared to be mutually | ||
| 105 | exclusive, the two cables cannot be in ATTACHED state simulteneously. | ||
| 106 | |||
| 107 | |||
| 108 | /***************************************************************** | ||
| 109 | * CHAPTER 2. * | ||
| 110 | * PORTING USERSPACE w/ SWITCH CLASS DEVICE SUPPORT * | ||
| 111 | *****************************************************************/ | ||
| 112 | |||
| 113 | ****** ABI Location | ||
| 114 | |||
| 115 | If "CONFIG_ANDROID" is enabled and "CONFIG_ANDROID_SWITCH" is | ||
| 116 | disabled, /sys/class/switch/* are created as symbolic links to | ||
| 117 | /sys/class/extcon/*. Because CONFIG_ANDROID_SWITCH creates | ||
| 118 | /sys/class/switch directory, we disable symboling linking if | ||
| 119 | CONFIG_ANDROID_SWITCH is enabled. | ||
| 120 | |||
| 121 | The two files of switch class, name and state, are provided with | ||
| 122 | extcon, too. When the multistate support (STEP 2 of CHAPTER 1.) is | ||
| 123 | not enabled or print_state callback is supplied, the output of | ||
| 124 | state ABI is same with switch class. | ||
| @@ -2,7 +2,14 @@ The following is a list of files and features that are going to be · 1 unmodified line | |||
| 2 | removed in the kernel source tree. Every entry should contain what | 2 | removed in the kernel source tree. Every entry should contain what |
| 3 | exactly is going away, why it is happening, and who is going to be doing | 3 | exactly is going away, why it is happening, and who is going to be doing |
| 4 | the work. When the feature is removed from the kernel, it should also | 4 | the work. When the feature is removed from the kernel, it should also |
| 5 | be removed from this file. | 5 | be removed from this file. The suggested deprecation period is 3 releases. |
| 6 | |||
| 7 | --------------------------- | ||
| 8 | |||
| 9 | What: ddebug_query="query" boot cmdline param | ||
| 10 | When: v3.8 | ||
| 11 | Why: obsoleted by dyndbg="query" and module.dyndbg="query" | ||
| 12 | Who: Jim Cromie <jim.cromie@gmail.com>, Jason Baron <jbaron@redhat.com> | ||
| 6 | 13 | ||
| 7 | --------------------------- | 14 | --------------------------- |
| 8 | 15 | ||
| @@ -534,6 +541,18 @@ Who: Kees Cook <keescook@chromium.org> · 525 unmodified lines | |||
| 534 | 541 | ||
| 535 | ---------------------------- | 542 | ---------------------------- |
| 536 | 543 | ||
| 544 | What: Removing the pn544 raw driver. | ||
| 545 | When: 3.6 | ||
| 546 | Why: With the introduction of the NFC HCI and SHDL kernel layers, pn544.c | ||
| 547 | is being replaced by pn544_hci.c which is accessible through the netlink | ||
| 548 | and socket NFC APIs. Moreover, pn544.c is outdated and does not seem to | ||
| 549 | work properly with the latest Android stacks. | ||
| 550 | Having 2 drivers for the same hardware is confusing and as such we | ||
| 551 | should only keep the one following the kernel NFC APIs. | ||
| 552 | Who: Samuel Ortiz <sameo@linux.intel.com> | ||
| 553 | |||
| 554 | ---------------------------- | ||
| 555 | |||
| 537 | What: setitimer accepts user NULL pointer (value) | 556 | What: setitimer accepts user NULL pointer (value) |
| 538 | When: 3.6 | 557 | When: 3.6 |
| 539 | Why: setitimer is not returning -EFAULT if user pointer is NULL. This | 558 | Why: setitimer is not returning -EFAULT if user pointer is NULL. This |
| @@ -542,6 +561,15 @@ Who: Sasikantha Babu <sasikanth.v19@gmail.com> · 2 unmodified lines | |||
| 542 | 561 | ||
| 543 | ---------------------------- | 562 | ---------------------------- |
| 544 | 563 | ||
| 564 | What: remove bogus DV presets V4L2_DV_1080I29_97, V4L2_DV_1080I30 and | ||
| 565 | V4L2_DV_1080I25 | ||
| 566 | When: 3.6 | ||
| 567 | Why: These HDTV formats do not exist and were added by a confused mind | ||
| 568 | (that was me, to be precise...) | ||
| 569 | Who: Hans Verkuil <hans.verkuil@cisco.com> | ||
| 570 | |||
| 571 | ---------------------------- | ||
| 572 | |||
| 545 | What: V4L2_CID_HCENTER, V4L2_CID_VCENTER V4L2 controls | 573 | What: V4L2_CID_HCENTER, V4L2_CID_VCENTER V4L2 controls |
| 546 | When: 3.7 | 574 | When: 3.7 |
| 547 | Why: The V4L2_CID_VCENTER, V4L2_CID_HCENTER controls have been deprecated | 575 | Why: The V4L2_CID_VCENTER, V4L2_CID_HCENTER controls have been deprecated |
| @@ -549,3 +577,38 @@ Why: The V4L2_CID_VCENTER, V4L2_CID_HCENTER controls have been deprecated · 1 unmodified line | |||
| 549 | There are newer controls (V4L2_CID_PAN*, V4L2_CID_TILT*) that provide | 577 | There are newer controls (V4L2_CID_PAN*, V4L2_CID_TILT*) that provide |
| 550 | similar functionality. | 578 | similar functionality. |
| 551 | Who: Sylwester Nawrocki <sylvester.nawrocki@gmail.com> | 579 | Who: Sylwester Nawrocki <sylvester.nawrocki@gmail.com> |
| 580 | |||
| 581 | ---------------------------- | ||
| 582 | |||
| 583 | What: cgroup option updates via remount | ||
| 584 | When: March 2013 | ||
| 585 | Why: Remount currently allows changing bound subsystems and | ||
| 586 | release_agent. Rebinding is hardly useful as it only works | ||
| 587 | when the hierarchy is empty and release_agent itself should be | ||
| 588 | replaced with conventional fsnotify. | ||
| 589 | |||
| 590 | ---------------------------- | ||
| 591 | |||
| 592 | What: KVM debugfs statistics | ||
| 593 | When: 2013 | ||
| 594 | Why: KVM tracepoints provide mostly equivalent information in a much more | ||
| 595 | flexible fashion. | ||
| 596 | |||
| 597 | ---------------------------- | ||
| 598 | |||
| 599 | What: at91-mci driver ("CONFIG_MMC_AT91") | ||
| 600 | When: 3.7 | ||
| 601 | Why: There are two mci drivers: at91-mci and atmel-mci. The PDC support | ||
| 602 | was added to atmel-mci as a first step to support more chips. | ||
| 603 | Then at91-mci was kept only for old IP versions (on at91rm9200 and | ||
| 604 | at91sam9261). The support of these IP versions has just been added | ||
| 605 | to atmel-mci, so atmel-mci can be used for all chips. | ||
| 606 | Who: Ludovic Desroches <ludovic.desroches@atmel.com> | ||
| 607 | |||
| 608 | ---------------------------- | ||
| 609 | |||
| 610 | What: net/wanrouter/ | ||
| 611 | When: June 2013 | ||
| 612 | Why: Unsupported/unmaintained/unused since 2.6 | ||
| 613 | |||
| 614 | ---------------------------- | ||
| @@ -60,8 +60,8 @@ ata *); · 59 unmodified lines | |||
| 60 | ssize_t (*getxattr) (struct dentry *, const char *, void *, size_t); | 60 | ssize_t (*getxattr) (struct dentry *, const char *, void *, size_t); |
| 61 | ssize_t (*listxattr) (struct dentry *, char *, size_t); | 61 | ssize_t (*listxattr) (struct dentry *, char *, size_t); |
| 62 | int (*removexattr) (struct dentry *, const char *); | 62 | int (*removexattr) (struct dentry *, const char *); |
| 63 | void (*truncate_range)(struct inode *, loff_t, loff_t); | ||
| 64 | int (*fiemap)(struct inode *, struct fiemap_extent_info *, u64 start, u64 len); | 63 | int (*fiemap)(struct inode *, struct fiemap_extent_info *, u64 start, u64 len); |
| 64 | void (*update_time)(struct inode *, struct timespec *, int); | ||
| 65 | 65 | ||
| 66 | locking rules: | 66 | locking rules: |
| 67 | all may block | 67 | all may block |
| @@ -87,8 +87,9 @@ setxattr: yes · 19 unmodified lines | |||
| 87 | getxattr: no | 87 | getxattr: no |
| 88 | listxattr: no | 88 | listxattr: no |
| 89 | removexattr: yes | 89 | removexattr: yes |
| 90 | truncate_range: yes | ||
| 91 | fiemap: no | 90 | fiemap: no |
| 91 | update_time: no | ||
| 92 | |||
| 92 | Additionally, ->rmdir(), ->unlink() and ->rename() have ->i_mutex on | 93 | Additionally, ->rmdir(), ->unlink() and ->rename() have ->i_mutex on |
| 93 | victim. | 94 | victim. |
| 94 | cross-directory ->rename() has (per-superblock) ->s_vfs_rename_sem. | 95 | cross-directory ->rename() has (per-superblock) ->s_vfs_rename_sem. |
| @@ -59,9 +59,9 @@ commit=nrsec (*) Ext3 can be told to sync all its data and metadata · 58 unmodified lines | |||
| 59 | Setting it to very large values will improve | 59 | Setting it to very large values will improve |
| 60 | performance. | 60 | performance. |
| 61 | 61 | ||
| 62 | barrier=<0(*)|1> This enables/disables the use of write barriers in | 62 | barrier=<0|1(*)> This enables/disables the use of write barriers in |
| 63 | barrier the jbd code. barrier=0 disables, barrier=1 enables. | 63 | barrier (*) the jbd code. barrier=0 disables, barrier=1 enables. |
| 64 | nobarrier (*) This also requires an IO stack which can support | 64 | nobarrier This also requires an IO stack which can support |
| 65 | barriers, and if jbd gets an error on a barrier | 65 | barriers, and if jbd gets an error on a barrier |
| 66 | write, it will disable again with a warning. | 66 | write, it will disable again with a warning. |
| 67 | Write barriers enforce proper on-disk ordering | 67 | Write barriers enforce proper on-disk ordering |
| @@ -61,7 +61,9 @@ go_unlock | Called on the final local unlock of a lock · 60 unmodified lines | |||
| 61 | go_dump | Called to print content of object for debugfs file, or on | 61 | go_dump | Called to print content of object for debugfs file, or on |
| 62 | | error to dump glock to the log. | 62 | | error to dump glock to the log. |
| 63 | go_type | The type of the glock, LM_TYPE_..... | 63 | go_type | The type of the glock, LM_TYPE_..... |
| 64 | go_min_hold_time | The minimum hold time | 64 | go_callback | Called if the DLM sends a callback to drop this lock |
| 65 | go_flags | GLOF_ASPACE is set, if the glock has an address space | ||
| 66 | | associated with it | ||
| 65 | 67 | ||
| 66 | The minimum hold time for each lock is the time after a remote lock | 68 | The minimum hold time for each lock is the time after a remote lock |
| 67 | grant for which we ignore remote demote requests. This is in order to | 69 | grant for which we ignore remote demote requests. This is in order to |
| @@ -89,6 +91,7 @@ go_demote_ok | Sometimes | Yes · 21 unmodified lines | |||
| 89 | go_lock | Yes | No | 91 | go_lock | Yes | No |
| 90 | go_unlock | Yes | No | 92 | go_unlock | Yes | No |
| 91 | go_dump | Sometimes | Yes | 93 | go_dump | Sometimes | Yes |
| 94 | go_callback | Sometimes (N/A) | Yes | ||
| 92 | 95 | ||
| 93 | N.B. Operations must not drop either the bit lock or the spinlock | 96 | N.B. Operations must not drop either the bit lock or the spinlock |
| 94 | if its held on entry. go_dump and do_demote_ok must never block. | 97 | if its held on entry. go_dump and do_demote_ok must never block. |
| @@ -111,4 +114,118 @@ itself (locking order as above), and the other, known as the iopen · 16 unmodified lines | |||
| 111 | glock is used in conjunction with the i_nlink field in the inode to | 114 | glock is used in conjunction with the i_nlink field in the inode to |
| 112 | determine the lifetime of the inode in question. Locking of inodes | 115 | determine the lifetime of the inode in question. Locking of inodes |
| 113 | is on a per-inode basis. Locking of rgrps is on a per rgrp basis. | 116 | is on a per-inode basis. Locking of rgrps is on a per rgrp basis. |
| 117 | In general we prefer to lock local locks prior to cluster locks. | ||
| 118 | |||
| 119 | Glock Statistics | ||
| 120 | ------------------ | ||
| 121 | |||
| 122 | The stats are divided into two sets: those relating to the | ||
| 123 | super block and those relating to an individual glock. The | ||
| 124 | super block stats are done on a per cpu basis in order to | ||
| 125 | try and reduce the overhead of gathering them. They are also | ||
| 126 | further divided by glock type. All timings are in nanoseconds. | ||
| 127 | |||
| 128 | In the case of both the super block and glock statistics, | ||
| 129 | the same information is gathered in each case. The super | ||
| 130 | block timing statistics are used to provide default values for | ||
| 131 | the glock timing statistics, so that newly created glocks | ||
| 132 | should have, as far as possible, a sensible starting point. | ||
| 133 | The per-glock counters are initialised to zero when the | ||
| 134 | glock is created. The per-glock statistics are lost when | ||
| 135 | the glock is ejected from memory. | ||
| 136 | |||
| 137 | The statistics are divided into three pairs of mean and | ||
| 138 | variance, plus two counters. The mean/variance pairs are | ||
| 139 | smoothed exponential estimates and the algorithm used is | ||
| 140 | one which will be very familiar to those used to calculation | ||
| 141 | of round trip times in network code. See "TCP/IP Illustrated, | ||
| 142 | Volume 1", W. Richard Stevens, sect 21.3, "Round-Trip Time Measurement", | ||
| 143 | p. 299 and onwards. Also, Volume 2, Sect. 25.10, p. 838 and onwards. | ||
| 144 | Unlike the TCP/IP Illustrated case, the mean and variance are | ||
| 145 | not scaled, but are in units of integer nanoseconds. | ||
| 146 | |||
| 147 | The three pairs of mean/variance measure the following | ||
| 148 | things: | ||
| 149 | |||
| 150 | 1. DLM lock time (non-blocking requests) | ||
| 151 | 2. DLM lock time (blocking requests) | ||
| 152 | 3. Inter-request time (again to the DLM) | ||
| 153 | |||
| 154 | A non-blocking request is one which will complete right | ||
| 155 | away, whatever the state of the DLM lock in question. That | ||
| 156 | currently means any requests when (a) the current state of | ||
| 157 | the lock is exclusive, i.e. a lock demotion (b) the requested | ||
| 158 | state is either null or unlocked (again, a demotion) or (c) the | ||
| 159 | "try lock" flag is set. A blocking request covers all the other | ||
| 160 | lock requests. | ||
| 161 | |||
| 162 | There are two counters. The first is there primarily to show | ||
| 163 | how many lock requests have been made, and thus how much data | ||
| 164 | has gone into the mean/variance calculations. The other counter | ||
| 165 | is counting queuing of holders at the top layer of the glock | ||
| 166 | code. Hopefully that number will be a lot larger than the number | ||
| 167 | of dlm lock requests issued. | ||
| 168 | |||
| 169 | So why gather these statistics? There are several reasons | ||
| 170 | we'd like to get a better idea of these timings: | ||
| 171 | |||
| 172 | 1. To be able to better set the glock "min hold time" | ||
| 173 | 2. To spot performance issues more easily | ||
| 174 | 3. To improve the algorithm for selecting resource groups for | ||
| 175 | allocation (to base it on lock wait time, rather than blindly | ||
| 176 | using a "try lock") | ||
| 177 | |||
| 178 | Due to the smoothing action of the updates, a step change in | ||
| 179 | some input quantity being sampled will only fully be taken | ||
| 180 | into account after 8 samples (or 4 for the variance) and this | ||
| 181 | needs to be carefully considered when interpreting the | ||
| 182 | results. | ||
| 183 | |||
| 184 | Knowing both the time it takes a lock request to complete and | ||
| 185 | the average time between lock requests for a glock means we | ||
| 186 | can compute the total percentage of the time for which the | ||
| 187 | node is able to use a glock vs. time that the rest of the | ||
| 188 | cluster has its share. That will be very useful when setting | ||
| 189 | the lock min hold time. | ||
| 190 | |||
| 191 | Great care has been taken to ensure that we | ||
| 192 | measure exactly the quantities that we want, as accurately | ||
| 193 | as possible. There are always inaccuracies in any | ||
| 194 | measuring system, but I hope this is as accurate as we | ||
| 195 | can reasonably make it. | ||
| 196 | |||
| 197 | Per sb stats can be found here: | ||
| 198 | /sys/kernel/debug/gfs2/<fsname>/sbstats | ||
| 199 | Per glock stats can be found here: | ||
| 200 | /sys/kernel/debug/gfs2/<fsname>/glstats | ||
| 201 | |||
| 202 | Assuming that debugfs is mounted on /sys/kernel/debug and also | ||
| 203 | that <fsname> is replaced with the name of the gfs2 filesystem | ||
| 204 | in question. | ||
| 205 | |||
| 206 | The abbreviations used in the output as are follows: | ||
| 207 | |||
| 208 | srtt - Smoothed round trip time for non-blocking dlm requests | ||
| 209 | srttvar - Variance estimate for srtt | ||
| 210 | srttb - Smoothed round trip time for (potentially) blocking dlm requests | ||
| 211 | srttvarb - Variance estimate for srttb | ||
| 212 | sirt - Smoothed inter-request time (for dlm requests) | ||
| 213 | sirtvar - Variance estimate for sirt | ||
| 214 | dlm - Number of dlm requests made (dcnt in glstats file) | ||
| 215 | queue - Number of glock requests queued (qcnt in glstats file) | ||
| 216 | |||
| 217 | The sbstats file contains a set of these stats for each glock type (so 8 lines | ||
| 218 | for each type) and for each cpu (one column per cpu). The glstats file contains | ||
| 219 | a set of these stats for each glock in a similar format to the glocks file, but | ||
| 220 | using the format mean/variance for each of the timing stats. | ||
| 221 | |||
| 222 | The gfs2_glock_lock_time tracepoint prints out the current values of the stats | ||
| 223 | for the glock in question, along with some addition information on each dlm | ||
| 224 | reply that is received: | ||
| 225 | |||
| 226 | status - The status of the dlm request | ||
| 227 | flags - The dlm request flags | ||
| 228 | tdiff - The time taken by this specific request | ||
| 229 | (remaining fields as per above list) | ||
| 230 | |||
| 114 | 231 | ||
| @@ -1,7 +1,7 @@ | |||
| 1 | Global File System | 1 | Global File System |
| 2 | ------------------ | 2 | ------------------ |
| 3 | 3 | ||
| 4 | http://sources.redhat.com/cluster/wiki/ | 4 | https://fedorahosted.org/cluster/wiki/HomePage |
| 5 | 5 | ||
| 6 | GFS is a cluster file system. It allows a cluster of computers to | 6 | GFS is a cluster file system. It allows a cluster of computers to |
| 7 | simultaneously use a block device that is shared between them (with FC, | 7 | simultaneously use a block device that is shared between them (with FC, |
| @@ -30,7 +30,8 @@ needed, simply: · 22 unmodified lines | |||
| 30 | 30 | ||
| 31 | If you are using Fedora, you need to install the gfs2-utils package | 31 | If you are using Fedora, you need to install the gfs2-utils package |
| 32 | and, for lock_dlm, you will also need to install the cman package | 32 | and, for lock_dlm, you will also need to install the cman package |
| 33 | and write a cluster.conf as per the documentation. | 33 | and write a cluster.conf as per the documentation. For F17 and above |
| 34 | cman has been replaced by the dlm package. | ||
| 34 | 35 | ||
| 35 | GFS2 is not on-disk compatible with previous versions of GFS, but it | 36 | GFS2 is not on-disk compatible with previous versions of GFS, but it |
| 36 | is pretty close. | 37 | is pretty close. |
| @@ -39,8 +40,6 @@ The following man pages can be found at the URL above: · 2 unmodified lines | |||
| 39 | fsck.gfs2 to repair a filesystem | 40 | fsck.gfs2 to repair a filesystem |
| 40 | gfs2_grow to expand a filesystem online | 41 | gfs2_grow to expand a filesystem online |
| 41 | gfs2_jadd to add journals to a filesystem online | 42 | gfs2_jadd to add journals to a filesystem online |
| 42 | gfs2_tool to manipulate, examine and tune a filesystem | 43 | tunegfs2 to manipulate, examine and tune a filesystem |
| 43 | gfs2_quota to examine and change quota values in a filesystem | ||
| 44 | gfs2_convert to convert a gfs filesystem to gfs2 in-place | 44 | gfs2_convert to convert a gfs filesystem to gfs2 in-place |
| 45 | mount.gfs2 to help mount(8) mount a filesystem | ||
| 46 | mkfs.gfs2 to make a filesystem | 45 | mkfs.gfs2 to make a filesystem |
| @@ -93,7 +93,7 @@ The API to the login script is as follows: · 92 unmodified lines | |||
| 93 | (allways exists) | 93 | (allways exists) |
| 94 | (More protocols can be defined in the future. | 94 | (More protocols can be defined in the future. |
| 95 | The client does not interpret this string it is | 95 | The client does not interpret this string it is |
| 96 | passed unchanged as recieved from the Server) | 96 | passed unchanged as received from the Server) |
| 97 | -o osdname of the requested target OSD | 97 | -o osdname of the requested target OSD |
| 98 | (Might be empty) | 98 | (Might be empty) |
| 99 | (A string which denotes the OSD name, there is a | 99 | (A string which denotes the OSD name, there is a |
| @@ -297,7 +297,8 @@ in the beginning of ->setattr unconditionally. · 296 unmodified lines | |||
| 297 | be used instead. It gets called whenever the inode is evicted, whether it has | 297 | be used instead. It gets called whenever the inode is evicted, whether it has |
| 298 | remaining links or not. Caller does *not* evict the pagecache or inode-associated | 298 | remaining links or not. Caller does *not* evict the pagecache or inode-associated |
| 299 | metadata buffers; getting rid of those is responsibility of method, as it had | 299 | metadata buffers; getting rid of those is responsibility of method, as it had |
| 300 | been for ->delete_inode(). | 300 | been for ->delete_inode(). Caller makes sure async writeback cannot be running |
| 301 | for the inode while (or after) ->evict_inode() is called. | ||
| 301 | 302 | ||
| 302 | ->drop_inode() returns int now; it's called on final iput() with | 303 | ->drop_inode() returns int now; it's called on final iput() with |
| 303 | inode->i_lock held and it returns true if filesystems wants the inode to be | 304 | inode->i_lock held and it returns true if filesystems wants the inode to be |
| @@ -306,14 +307,11 @@ updated appropriately. generic_delete_inode() is also alive and it consists · 2 unmodified lines | |||
| 306 | simply of return 1. Note that all actual eviction work is done by caller after | 307 | simply of return 1. Note that all actual eviction work is done by caller after |
| 307 | ->drop_inode() returns. | 308 | ->drop_inode() returns. |
| 308 | 309 | ||
| 309 | clear_inode() is gone; use end_writeback() instead. As before, it must | 310 | As before, clear_inode() must be called exactly once on each call of |
| 310 | be called exactly once on each call of ->evict_inode() (as it used to be for | 311 | ->evict_inode() (as it used to be for each call of ->delete_inode()). Unlike |
| 311 | each call of ->delete_inode()). Unlike before, if you are using inode-associated | 312 | before, if you are using inode-associated metadata buffers (i.e. |
| 312 | metadata buffers (i.e. mark_buffer_dirty_inode()), it's your responsibility to | 313 | mark_buffer_dirty_inode()), it's your responsibility to call |
| 313 | call invalidate_inode_buffers() before end_writeback(). | 314 | invalidate_inode_buffers() before clear_inode(). |
| 314 | No async writeback (and thus no calls of ->write_inode()) will happen | ||
| 315 | after end_writeback() returns, so actions that should not overlap with ->write_inode() | ||
| 316 | (e.g. freeing on-disk inode if i_nlink is 0) ought to be done after that call. | ||
| 317 | 315 | ||
| 318 | NOTE: checking i_nlink in the beginning of ->write_inode() and bailing out | 316 | NOTE: checking i_nlink in the beginning of ->write_inode() and bailing out |
| 319 | if it's zero is not *and* *never* *had* *been* enough. Final unlink() and iput() | 317 | if it's zero is not *and* *never* *had* *been* enough. Final unlink() and iput() |
| @@ -40,6 +40,7 @@ Table of Contents · 39 unmodified lines | |||
| 40 | 3.4 /proc/<pid>/coredump_filter - Core dump filtering settings | 40 | 3.4 /proc/<pid>/coredump_filter - Core dump filtering settings |
| 41 | 3.5 /proc/<pid>/mountinfo - Information about mounts | 41 | 3.5 /proc/<pid>/mountinfo - Information about mounts |
| 42 | 3.6 /proc/<pid>/comm & /proc/<pid>/task/<tid>/comm | 42 | 3.6 /proc/<pid>/comm & /proc/<pid>/task/<tid>/comm |
| 43 | 3.7 /proc/<pid>/task/<tid>/children - Information about task children | ||
| 43 | 44 | ||
| 44 | 4 Configuring procfs | 45 | 4 Configuring procfs |
| 45 | 4.1 Mount options | 46 | 4.1 Mount options |
| @@ -310,6 +311,11 @@ Table 1-4: Contents of the stat files (as of 2.6.30-rc7) · 264 unmodified lines | |||
| 310 | start_data address above which program data+bss is placed | 311 | start_data address above which program data+bss is placed |
| 311 | end_data address below which program data+bss is placed | 312 | end_data address below which program data+bss is placed |
| 312 | start_brk address above which program heap can be expanded with brk() | 313 | start_brk address above which program heap can be expanded with brk() |
| 314 | arg_start address above which program command line is placed | ||
| 315 | arg_end address below which program command line is placed | ||
| 316 | env_start address above which program environment is placed | ||
| 317 | env_end address below which program environment is placed | ||
| 318 | exit_code the thread's exit_code in the form reported by the waitpid system call | ||
| 313 | .............................................................................. | 319 | .............................................................................. |
| 314 | 320 | ||
| 315 | The /proc/PID/maps file containing the currently mapped memory regions and | 321 | The /proc/PID/maps file containing the currently mapped memory regions and |
| @@ -743,6 +749,7 @@ Committed_AS: 100056 kB · 427 unmodified lines | |||
| 743 | VmallocTotal: 112216 kB | 749 | VmallocTotal: 112216 kB |
| 744 | VmallocUsed: 428 kB | 750 | VmallocUsed: 428 kB |
| 745 | VmallocChunk: 111088 kB | 751 | VmallocChunk: 111088 kB |
| 752 | AnonHugePages: 49152 kB | ||
| 746 | 753 | ||
| 747 | MemTotal: Total usable ram (i.e. physical ram minus a few reserved | 754 | MemTotal: Total usable ram (i.e. physical ram minus a few reserved |
| 748 | bits and the kernel binary code) | 755 | bits and the kernel binary code) |
| @@ -776,6 +783,7 @@ VmallocChunk: 111088 kB · 27 unmodified lines | |||
| 776 | Dirty: Memory which is waiting to get written back to the disk | 783 | Dirty: Memory which is waiting to get written back to the disk |
| 777 | Writeback: Memory which is actively being written back to the disk | 784 | Writeback: Memory which is actively being written back to the disk |
| 778 | AnonPages: Non-file backed pages mapped into userspace page tables | 785 | AnonPages: Non-file backed pages mapped into userspace page tables |
| 786 | AnonHugePages: Non-file backed huge pages mapped into userspace page tables | ||
| 779 | Mapped: files which have been mmaped, such as libraries | 787 | Mapped: files which have been mmaped, such as libraries |
| 780 | Slab: in-kernel data structures cache | 788 | Slab: in-kernel data structures cache |
| 781 | SReclaimable: Part of Slab, that might be reclaimed, such as caches | 789 | SReclaimable: Part of Slab, that might be reclaimed, such as caches |
| @@ -996,7 +1004,6 @@ Table 1-9: Network info in /proc/net · 214 unmodified lines | |||
| 996 | snmp SNMP data | 1004 | snmp SNMP data |
| 997 | sockstat Socket statistics | 1005 | sockstat Socket statistics |
| 998 | tcp TCP sockets | 1006 | tcp TCP sockets |
| 999 | tr_rif Token ring RIF routing table | ||
| 1000 | udp UDP sockets | 1007 | udp UDP sockets |
| 1001 | unix UNIX domain sockets | 1008 | unix UNIX domain sockets |
| 1002 | wireless Wireless interface data (Wavelan etc) | 1009 | wireless Wireless interface data (Wavelan etc) |
| @@ -1577,6 +1584,23 @@ then the kernel's TASK_COMM_LEN (currently 16 chars) will result in a truncated · 574 unmodified lines | |||
| 1577 | comm value. | 1584 | comm value. |
| 1578 | 1585 | ||
| 1579 | 1586 | ||
| 1587 | 3.7 /proc/<pid>/task/<tid>/children - Information about task children | ||
| 1588 | ------------------------------------------------------------------------- | ||
| 1589 | This file provides a fast way to retrieve first level children pids | ||
| 1590 | of a task pointed by <pid>/<tid> pair. The format is a space separated | ||
| 1591 | stream of pids. | ||
| 1592 | |||
| 1593 | Note the "first level" here -- if a child has own children they will | ||
| 1594 | not be listed here, one needs to read /proc/<children-pid>/task/<tid>/children | ||
| 1595 | to obtain the descendants. | ||
| 1596 | |||
| 1597 | Since this interface is intended to be fast and cheap it doesn't | ||
| 1598 | guarantee to provide precise results and some children might be | ||
| 1599 | skipped, especially if they've exited right after we printed their | ||
| 1600 | pids, so one need to either stop or freeze processes being inspected | ||
| 1601 | if precise results are needed. | ||
| 1602 | |||
| 1603 | |||
| 1580 | ------------------------------------------------------------------------------ | 1604 | ------------------------------------------------------------------------------ |
| 1581 | Configuring procfs | 1605 | Configuring procfs |
| 1582 | ------------------------------------------------------------------------------ | 1606 | ------------------------------------------------------------------------------ |
| @@ -17,7 +17,7 @@ concepts of blocks, inodes and directories. · 16 unmodified lines | |||
| 17 | On QNX it is possible to create little endian and big endian qnx6 filesystems. | 17 | On QNX it is possible to create little endian and big endian qnx6 filesystems. |
| 18 | This feature makes it possible to create and use a different endianness fs | 18 | This feature makes it possible to create and use a different endianness fs |
| 19 | for the target (QNX is used on quite a range of embedded systems) plattform | 19 | for the target (QNX is used on quite a range of embedded systems) plattform |
| 20 | running on a different endianess. | 20 | running on a different endianness. |
| 21 | The Linux driver handles endianness transparently. (LE and BE) | 21 | The Linux driver handles endianness transparently. (LE and BE) |
| 22 | 22 | ||
| 23 | Blocks | 23 | Blocks |
| @@ -26,7 +26,7 @@ Blocks · 2 unmodified lines | |||
| 26 | The space in the device or file is split up into blocks. These are a fixed | 26 | The space in the device or file is split up into blocks. These are a fixed |
| 27 | size of 512, 1024, 2048 or 4096, which is decided when the filesystem is | 27 | size of 512, 1024, 2048 or 4096, which is decided when the filesystem is |
| 28 | created. | 28 | created. |
| 29 | Blockpointers are 32bit, so the maximum space that can be adressed is | 29 | Blockpointers are 32bit, so the maximum space that can be addressed is |
| 30 | 2^32 * 4096 bytes or 16TB | 30 | 2^32 * 4096 bytes or 16TB |
| 31 | 31 | ||
| 32 | The superblocks | 32 | The superblocks |
| @@ -47,16 +47,16 @@ inactive superblock. · 14 unmodified lines | |||
| 47 | Each superblock holds a set of root inodes for the different filesystem | 47 | Each superblock holds a set of root inodes for the different filesystem |
| 48 | parts. (Inode, Bitmap and Longfilenames) | 48 | parts. (Inode, Bitmap and Longfilenames) |
| 49 | Each of these root nodes holds information like total size of the stored | 49 | Each of these root nodes holds information like total size of the stored |
| 50 | data and the adressing levels in that specific tree. | 50 | data and the addressing levels in that specific tree. |
| 51 | If the level value is 0, up to 16 direct blocks can be adressed by each | 51 | If the level value is 0, up to 16 direct blocks can be addressed by each |
| 52 | node. | 52 | node. |
| 53 | Level 1 adds an additional indirect adressing level where each indirect | 53 | Level 1 adds an additional indirect addressing level where each indirect |
| 54 | adressing block holds up to blocksize / 4 bytes pointers to data blocks. | 54 | addressing block holds up to blocksize / 4 bytes pointers to data blocks. |
| 55 | Level 2 adds an additional indirect adressig block level (so, already up | 55 | Level 2 adds an additional indirect addressing block level (so, already up |
| 56 | to 16 * 256 * 256 = 1048576 blocks that can be adressed by such a tree)a | 56 | to 16 * 256 * 256 = 1048576 blocks that can be addressed by such a tree). |
| 57 | 57 | ||
| 58 | Unused block pointers are always set to ~0 - regardless of root node, | 58 | Unused block pointers are always set to ~0 - regardless of root node, |
| 59 | indirect adressing blocks or inodes. | 59 | indirect addressing blocks or inodes. |
| 60 | Data leaves are always on the lowest level. So no data is stored on upper | 60 | Data leaves are always on the lowest level. So no data is stored on upper |
| 61 | tree levels. | 61 | tree levels. |
| 62 | 62 | ||
| @@ -64,7 +64,7 @@ The first Superblock is located at 0x2000. (0x2000 is the bootblock size) · 1 unmodified line | |||
| 64 | The Audi MMI 3G first superblock directly starts at byte 0. | 64 | The Audi MMI 3G first superblock directly starts at byte 0. |
| 65 | Second superblock position can either be calculated from the superblock | 65 | Second superblock position can either be calculated from the superblock |
| 66 | information (total number of filesystem blocks) or by taking the highest | 66 | information (total number of filesystem blocks) or by taking the highest |
| 67 | device address, zeroing the last 3 bytes and then substracting 0x1000 from | 67 | device address, zeroing the last 3 bytes and then subtracting 0x1000 from |
| 68 | that address. | 68 | that address. |
| 69 | 69 | ||
| 70 | 0x1000 is the size reserved for each superblock - regardless of the | 70 | 0x1000 is the size reserved for each superblock - regardless of the |
| @@ -83,8 +83,8 @@ size, number of blocks used, access time, change time and modification time. · 12 unmodified lines | |||
| 83 | Object mode field is POSIX format. (which makes things easier) | 83 | Object mode field is POSIX format. (which makes things easier) |
| 84 | 84 | ||
| 85 | There are also pointers to the first 16 blocks, if the object data can be | 85 | There are also pointers to the first 16 blocks, if the object data can be |
| 86 | adressed with 16 direct blocks. | 86 | addressed with 16 direct blocks. |
| 87 | For more than 16 blocks an indirect adressing in form of another tree is | 87 | For more than 16 blocks an indirect addressing in form of another tree is |
| 88 | used. (scheme is the same as the one used for the superblock root nodes) | 88 | used. (scheme is the same as the one used for the superblock root nodes) |
| 89 | 89 | ||
| 90 | The filesize is stored 64bit. Inode counting starts with 1. (whilst long | 90 | The filesize is stored 64bit. Inode counting starts with 1. (whilst long |
| @@ -118,13 +118,13 @@ no block pointers and the directory file record pointing to the target file · 27 unmodified lines | |||
| 118 | inode. | 118 | inode. |
| 119 | 119 | ||
| 120 | Character and block special devices do not exist in QNX as those files | 120 | Character and block special devices do not exist in QNX as those files |
| 121 | are handled by the QNX kernel/drivers and created in /dev independant of the | 121 | are handled by the QNX kernel/drivers and created in /dev independent of the |
| 122 | underlaying filesystem. | 122 | underlaying filesystem. |
| 123 | 123 | ||
| 124 | Long filenames | 124 | Long filenames |
| 125 | -------------- | 125 | -------------- |
| 126 | 126 | ||
| 127 | Long filenames are stored in a seperate adressing tree. The staring point | 127 | Long filenames are stored in a separate addressing tree. The staring point |
| 128 | is the longfilename root node in the active superblock. | 128 | is the longfilename root node in the active superblock. |
| 129 | Each data block (tree leaves) holds one long filename. That filename is | 129 | Each data block (tree leaves) holds one long filename. That filename is |
| 130 | limited to 510 bytes. The first two starting bytes are used as length field | 130 | limited to 510 bytes. The first two starting bytes are used as length field |
| @@ -363,7 +363,7 @@ struct inode_operations { · 362 unmodified lines | |||
| 363 | ssize_t (*getxattr) (struct dentry *, const char *, void *, size_t); | 363 | ssize_t (*getxattr) (struct dentry *, const char *, void *, size_t); |
| 364 | ssize_t (*listxattr) (struct dentry *, char *, size_t); | 364 | ssize_t (*listxattr) (struct dentry *, char *, size_t); |
| 365 | int (*removexattr) (struct dentry *, const char *); | 365 | int (*removexattr) (struct dentry *, const char *); |
| 366 | void (*truncate_range)(struct inode *, loff_t, loff_t); | 366 | void (*update_time)(struct inode *, struct timespec *, int); |
| 367 | }; | 367 | }; |
| 368 | 368 | ||
| 369 | Again, all methods are called without any locks being held, unless | 369 | Again, all methods are called without any locks being held, unless |
| @@ -472,9 +472,9 @@ otherwise noted. · 102 unmodified lines | |||
| 472 | removexattr: called by the VFS to remove an extended attribute from | 472 | removexattr: called by the VFS to remove an extended attribute from |
| 473 | a file. This method is called by removexattr(2) system call. | 473 | a file. This method is called by removexattr(2) system call. |
| 474 | 474 | ||
| 475 | truncate_range: a method provided by the underlying filesystem to truncate a | 475 | update_time: called by the VFS to update a specific time or the i_version of |
| 476 | range of blocks , i.e. punch a hole somewhere in a file. | 476 | an inode. If this is not defined the VFS will update the inode itself |
| 477 | 477 | and call mark_inode_dirty_sync. | |
| 478 | 478 | ||
| 479 | The Address Space Object | 479 | The Address Space Object |
| 480 | ======================== | 480 | ======================== |
| @@ -760,7 +760,7 @@ struct file_operations · 279 unmodified lines | |||
| 760 | ---------------------- | 760 | ---------------------- |
| 761 | 761 | ||
| 762 | This describes how the VFS can manipulate an open file. As of kernel | 762 | This describes how the VFS can manipulate an open file. As of kernel |
| 763 | 2.6.22, the following members are defined: | 763 | 3.5, the following members are defined: |
| 764 | 764 | ||
| 765 | struct file_operations { | 765 | struct file_operations { |
| 766 | struct module *owner; | 766 | struct module *owner; |
| @@ -790,6 +790,8 @@ struct file_operations { · 23 unmodified lines | |||
| 790 | int (*flock) (struct file *, int, struct file_lock *); | 790 | int (*flock) (struct file *, int, struct file_lock *); |
| 791 | ssize_t (*splice_write)(struct pipe_inode_info *, struct file *, size_t, unsigned int); | 791 | ssize_t (*splice_write)(struct pipe_inode_info *, struct file *, size_t, unsigned int); |
| 792 | ssize_t (*splice_read)(struct file *, struct pipe_inode_info *, size_t, unsigned int); | 792 | ssize_t (*splice_read)(struct file *, struct pipe_inode_info *, size_t, unsigned int); |
| 793 | int (*setlease)(struct file *, long arg, struct file_lock **); | ||
| 794 | long (*fallocate)(struct file *, int mode, loff_t offset, loff_t len); | ||
| 793 | }; | 795 | }; |
| 794 | 796 | ||
| 795 | Again, all methods are called without any locks being held, unless | 797 | Again, all methods are called without any locks being held, unless |
| @@ -858,6 +860,11 @@ otherwise noted. · 62 unmodified lines | |||
| 858 | splice_read: called by the VFS to splice data from file to a pipe. This | 860 | splice_read: called by the VFS to splice data from file to a pipe. This |
| 859 | method is used by the splice(2) system call | 861 | method is used by the splice(2) system call |
| 860 | 862 | ||
| 863 | setlease: called by the VFS to set or release a file lock lease. | ||
| 864 | setlease has the file_lock_lock held and must not sleep. | ||
| 865 | |||
| 866 | fallocate: called by the VFS to preallocate blocks or punch a hole. | ||
| 867 | |||
| 861 | Note that the file operations are implemented by the specific | 868 | Note that the file operations are implemented by the specific |
| 862 | filesystem in which the inode resides. When opening a device node | 869 | filesystem in which the inode resides. When opening a device node |
| 863 | (character or block special) most filesystems will call special | 870 | (character or block special) most filesystems will call special |
| @@ -322,6 +322,9 @@ where 'flags' is currently defined to specify the following properties: · 321 unmodified lines | |||
| 322 | * GPIOF_OPEN_DRAIN - gpio pin is open drain type. | 322 | * GPIOF_OPEN_DRAIN - gpio pin is open drain type. |
| 323 | * GPIOF_OPEN_SOURCE - gpio pin is open source type. | 323 | * GPIOF_OPEN_SOURCE - gpio pin is open source type. |
| 324 | 324 | ||
| 325 | * GPIOF_EXPORT_DIR_FIXED - export gpio to sysfs, keep direction | ||
| 326 | * GPIOF_EXPORT_DIR_CHANGEABLE - also export, allow changing direction | ||
| 327 | |||
| 325 | since GPIOF_INIT_* are only valid when configured as output, so group valid | 328 | since GPIOF_INIT_* are only valid when configured as output, so group valid |
| 326 | combinations as: | 329 | combinations as: |
| 327 | 330 | ||
| @@ -0,0 +1,29 @@ | |||
| 1 | Kernel driver ina2xx | ||
| 2 | ==================== | ||
| 3 | |||
| 4 | Supported chips: | ||
| 5 | * Texas Instruments INA219 | ||
| 6 | Prefix: 'ina219' | ||
| 7 | Addresses: I2C 0x40 - 0x4f | ||
| 8 | Datasheet: Publicly available at the Texas Instruments website | ||
| 9 | http://www.ti.com/ | ||
| 10 | |||
| 11 | * Texas Instruments INA226 | ||
| 12 | Prefix: 'ina226' | ||
| 13 | Addresses: I2C 0x40 - 0x4f | ||
| 14 | Datasheet: Publicly available at the Texas Instruments website | ||
| 15 | http://www.ti.com/ | ||
| 16 | |||
| 17 | Author: Lothar Felten <l-felten@ti.com> | ||
| 18 | |||
| 19 | Description | ||
| 20 | ----------- | ||
| 21 | |||
| 22 | The INA219 is a high-side current shunt and power monitor with an I2C | ||
| 23 | interface. The INA219 monitors both shunt drop and supply voltage, with | ||
| 24 | programmable conversion times and filtering. | ||
| 25 | |||
| 26 | The INA226 is a current shunt and power monitor with an I2C interface. | ||
| 27 | The INA226 monitors both a shunt voltage drop and bus supply voltage. | ||
| 28 | |||
| 29 | The shunt value in micro-ohms can be set via platform data. | ||
| @@ -30,6 +30,14 @@ Supported chips: · 29 unmodified lines | |||
| 30 | Prefix: 'it8728' | 30 | Prefix: 'it8728' |
| 31 | Addresses scanned: from Super I/O config space (8 I/O ports) | 31 | Addresses scanned: from Super I/O config space (8 I/O ports) |
| 32 | Datasheet: Not publicly available | 32 | Datasheet: Not publicly available |
| 33 | * IT8782F | ||
| 34 | Prefix: 'it8782' | ||
| 35 | Addresses scanned: from Super I/O config space (8 I/O ports) | ||
| 36 | Datasheet: Not publicly available | ||
| 37 | * IT8783E/F | ||
| 38 | Prefix: 'it8783' | ||
| 39 | Addresses scanned: from Super I/O config space (8 I/O ports) | ||
| 40 | Datasheet: Not publicly available | ||
| 33 | * SiS950 [clone of IT8705F] | 41 | * SiS950 [clone of IT8705F] |
| 34 | Prefix: 'it87' | 42 | Prefix: 'it87' |
| 35 | Addresses scanned: from Super I/O config space (8 I/O ports) | 43 | Addresses scanned: from Super I/O config space (8 I/O ports) |
| @@ -63,7 +71,7 @@ Module Parameters · 27 unmodified lines | |||
| 63 | Hardware Interfaces | 71 | Hardware Interfaces |
| 64 | ------------------- | 72 | ------------------- |
| 65 | 73 | ||
| 66 | All the chips suported by this driver are LPC Super-I/O chips, accessed | 74 | All the chips supported by this driver are LPC Super-I/O chips, accessed |
| 67 | through the LPC bus (ISA-like I/O ports). The IT8712F additionally has an | 75 | through the LPC bus (ISA-like I/O ports). The IT8712F additionally has an |
| 68 | SMBus interface to the hardware monitoring functions. This driver no | 76 | SMBus interface to the hardware monitoring functions. This driver no |
| 69 | longer supports this interface though, as it is slower and less reliable | 77 | longer supports this interface though, as it is slower and less reliable |
| @@ -75,7 +83,8 @@ Description · 5 unmodified lines | |||
| 75 | ----------- | 83 | ----------- |
| 76 | 84 | ||
| 77 | This driver implements support for the IT8705F, IT8712F, IT8716F, | 85 | This driver implements support for the IT8705F, IT8712F, IT8716F, |
| 78 | IT8718F, IT8720F, IT8721F, IT8726F, IT8728F, IT8758E and SiS950 chips. | 86 | IT8718F, IT8720F, IT8721F, IT8726F, IT8728F, IT8758E, IT8781F, IT8782F, |
| 87 | IT8783E/F, and SiS950 chips. | ||
| 79 | 88 | ||
| 80 | These chips are 'Super I/O chips', supporting floppy disks, infrared ports, | 89 | These chips are 'Super I/O chips', supporting floppy disks, infrared ports, |
| 81 | joysticks and other miscellaneous stuff. For hardware monitoring, they | 90 | joysticks and other miscellaneous stuff. For hardware monitoring, they |
| @@ -99,11 +108,11 @@ The IT8716F, IT8718F, IT8720F, IT8721F/IT8758E and later IT8712F revisions · 17 unmodified lines | |||
| 99 | have support for 2 additional fans. The additional fans are supported by the | 108 | have support for 2 additional fans. The additional fans are supported by the |
| 100 | driver. | 109 | driver. |
| 101 | 110 | ||
| 102 | The IT8716F, IT8718F, IT8720F and IT8721F/IT8758E, and late IT8712F and | 111 | The IT8716F, IT8718F, IT8720F, IT8721F/IT8758E, IT8782F, IT8783E/F, and late |
| 103 | IT8705F also have optional 16-bit tachometer counters for fans 1 to 3. This | 112 | IT8712F and IT8705F also have optional 16-bit tachometer counters for fans 1 to |
| 104 | is better (no more fan clock divider mess) but not compatible with the older | 113 | 3. This is better (no more fan clock divider mess) but not compatible with the |
| 105 | chips and revisions. The 16-bit tachometer mode is enabled by the driver when | 114 | older chips and revisions. The 16-bit tachometer mode is enabled by the driver |
| 106 | one of the above chips is detected. | 115 | when one of the above chips is detected. |
| 107 | 116 | ||
| 108 | The IT8726F is just bit enhanced IT8716F with additional hardware | 117 | The IT8726F is just bit enhanced IT8716F with additional hardware |
| 109 | for AMD power sequencing. Therefore the chip will appear as IT8716F | 118 | for AMD power sequencing. Therefore the chip will appear as IT8716F |
| @@ -131,9 +140,10 @@ inputs can measure voltages between 0 and 4.08 volts, with a resolution of · 21 unmodified lines | |||
| 131 | 0.016 volt (except IT8721F/IT8758E and IT8728F: 0.012 volt.) The battery | 140 | 0.016 volt (except IT8721F/IT8758E and IT8728F: 0.012 volt.) The battery |
| 132 | voltage in8 does not have limit registers. | 141 | voltage in8 does not have limit registers. |
| 133 | 142 | ||
| 134 | On the IT8721F/IT8758E, some voltage inputs are internal and scaled inside | 143 | On the IT8721F/IT8758E, IT8782F, and IT8783E/F, some voltage inputs are |
| 135 | the chip (in7, in8 and optionally in3). The driver handles this transparently | 144 | internal and scaled inside the chip (in7 (optional for IT8782F and IT8783E/F), |
| 136 | so user-space doesn't have to care. | 145 | in8 and optionally in3). The driver handles this transparently so user-space |
| 146 | doesn't have to care. | ||
| 137 | 147 | ||
| 138 | The VID lines (IT8712F/IT8716F/IT8718F/IT8720F) encode the core voltage value: | 148 | The VID lines (IT8712F/IT8716F/IT8718F/IT8720F) encode the core voltage value: |
| 139 | the voltage level your processor should work with. This is hardcoded by | 149 | the voltage level your processor should work with. This is hardcoded by |
| @@ -22,7 +22,7 @@ reporting of all the input values but does not provide any alarms. · 21 unmodified lines | |||
| 22 | Voltage Monitoring | 22 | Voltage Monitoring |
| 23 | ------------------ | 23 | ------------------ |
| 24 | 24 | ||
| 25 | Voltages are sampled by a 12 bit ADC. Voltages in milivolts are 1.465 | 25 | Voltages are sampled by a 12 bit ADC. Voltages in millivolts are 1.465 |
| 26 | times the ADC value. | 26 | times the ADC value. |
| 27 | 27 | ||
| 28 | Temperature Monitoring | 28 | Temperature Monitoring |
| @@ -18,9 +18,9 @@ For the most up-to-date list of functionality constants, please check · 17 unmodified lines | |||
| 18 | adapters typically can not do these) | 18 | adapters typically can not do these) |
| 19 | I2C_FUNC_10BIT_ADDR Handles the 10-bit address extensions | 19 | I2C_FUNC_10BIT_ADDR Handles the 10-bit address extensions |
| 20 | I2C_FUNC_PROTOCOL_MANGLING Knows about the I2C_M_IGNORE_NAK, | 20 | I2C_FUNC_PROTOCOL_MANGLING Knows about the I2C_M_IGNORE_NAK, |
| 21 | I2C_M_REV_DIR_ADDR, I2C_M_NOSTART and | 21 | I2C_M_REV_DIR_ADDR and I2C_M_NO_RD_ACK |
| 22 | I2C_M_NO_RD_ACK flags (which modify the | 22 | flags (which modify the I2C protocol!) |
| 23 | I2C protocol!) | 23 | I2C_FUNC_NOSTART Can skip repeated start sequence |
| 24 | I2C_FUNC_SMBUS_QUICK Handles the SMBus write_quick command | 24 | I2C_FUNC_SMBUS_QUICK Handles the SMBus write_quick command |
| 25 | I2C_FUNC_SMBUS_READ_BYTE Handles the SMBus read_byte command | 25 | I2C_FUNC_SMBUS_READ_BYTE Handles the SMBus read_byte command |
| 26 | I2C_FUNC_SMBUS_WRITE_BYTE Handles the SMBus write_byte command | 26 | I2C_FUNC_SMBUS_WRITE_BYTE Handles the SMBus write_byte command |
| @@ -50,6 +50,9 @@ A few combinations of the above flags are also defined for your convenience: · 23 unmodified lines | |||
| 50 | emulated by a real I2C adapter (using | 50 | emulated by a real I2C adapter (using |
| 51 | the transparent emulation layer) | 51 | the transparent emulation layer) |
| 52 | 52 | ||
| 53 | In kernel versions prior to 3.5 I2C_FUNC_NOSTART was implemented as | ||
| 54 | part of I2C_FUNC_PROTOCOL_MANGLING. | ||
| 55 | |||
| 53 | 56 | ||
| 54 | ADAPTER IMPLEMENTATION | 57 | ADAPTER IMPLEMENTATION |
| 55 | ---------------------- | 58 | ---------------------- |
| @@ -49,7 +49,9 @@ a byte read, followed by a byte write: · 48 unmodified lines | |||
| 49 | Modified transactions | 49 | Modified transactions |
| 50 | ===================== | 50 | ===================== |
| 51 | 51 | ||
| 52 | We have found some I2C devices that needs the following modifications: | 52 | The following modifications to the I2C protocol can also be generated, |
| 53 | with the exception of I2C_M_NOSTART these are usually only needed to | ||
| 54 | work around device issues: | ||
| 53 | 55 | ||
| 54 | Flag I2C_M_NOSTART: | 56 | Flag I2C_M_NOSTART: |
| 55 | In a combined transaction, no 'S Addr Wr/Rd [A]' is generated at some | 57 | In a combined transaction, no 'S Addr Wr/Rd [A]' is generated at some |
| @@ -60,6 +62,11 @@ We have found some I2C devices that needs the following modifications: · 4 unmodified lines | |||
| 60 | we do not generate Addr, but we do generate the startbit S. This will | 62 | we do not generate Addr, but we do generate the startbit S. This will |
| 61 | probably confuse all other clients on your bus, so don't try this. | 63 | probably confuse all other clients on your bus, so don't try this. |
| 62 | 64 | ||
| 65 | This is often used to gather transmits from multiple data buffers in | ||
| 66 | system memory into something that appears as a single transfer to the | ||
| 67 | I2C device but may also be used between direction changes by some | ||
| 68 | rare devices. | ||
| 69 | |||
| 63 | Flags I2C_M_REV_DIR_ADDR | 70 | Flags I2C_M_REV_DIR_ADDR |
| 64 | This toggles the Rd/Wr flag. That is, if you want to do a write, but | 71 | This toggles the Rd/Wr flag. That is, if you want to do a write, but |
| 65 | need to emit an Rd instead of a Wr, or vice versa, you set this | 72 | need to emit an Rd instead of a Wr, or vice versa, you set this |
| @@ -1,11 +1,11 @@ | |||
| 1 | Kernel driver gpio-i2cmux | 1 | Kernel driver i2c-gpio-mux |
| 2 | 2 | ||
| 3 | Author: Peter Korsgaard <peter.korsgaard@barco.com> | 3 | Author: Peter Korsgaard <peter.korsgaard@barco.com> |
| 4 | 4 | ||
| 5 | Description | 5 | Description |
| 6 | ----------- | 6 | ----------- |
| 7 | 7 | ||
| 8 | gpio-i2cmux is an i2c mux driver providing access to I2C bus segments | 8 | i2c-gpio-mux is an i2c mux driver providing access to I2C bus segments |
| 9 | from a master I2C bus and a hardware MUX controlled through GPIO pins. | 9 | from a master I2C bus and a hardware MUX controlled through GPIO pins. |
| 10 | 10 | ||
| 11 | E.G.: | 11 | E.G.: |
| @@ -26,16 +26,16 @@ according to the settings of the GPIO pins 1..N. · 14 unmodified lines | |||
| 26 | Usage | 26 | Usage |
| 27 | ----- | 27 | ----- |
| 28 | 28 | ||
| 29 | gpio-i2cmux uses the platform bus, so you need to provide a struct | 29 | i2c-gpio-mux uses the platform bus, so you need to provide a struct |
| 30 | platform_device with the platform_data pointing to a struct | 30 | platform_device with the platform_data pointing to a struct |
| 31 | gpio_i2cmux_platform_data with the I2C adapter number of the master | 31 | gpio_i2cmux_platform_data with the I2C adapter number of the master |
| 32 | bus, the number of bus segments to create and the GPIO pins used | 32 | bus, the number of bus segments to create and the GPIO pins used |
| 33 | to control it. See include/linux/gpio-i2cmux.h for details. | 33 | to control it. See include/linux/i2c-gpio-mux.h for details. |
| 34 | 34 | ||
| 35 | E.G. something like this for a MUX providing 4 bus segments | 35 | E.G. something like this for a MUX providing 4 bus segments |
| 36 | controlled through 3 GPIO pins: | 36 | controlled through 3 GPIO pins: |
| 37 | 37 | ||
| 38 | #include <linux/gpio-i2cmux.h> | 38 | #include <linux/i2c-gpio-mux.h> |
| 39 | #include <linux/platform_device.h> | 39 | #include <linux/platform_device.h> |
| 40 | 40 | ||
| 41 | static const unsigned myboard_gpiomux_gpios[] = { | 41 | static const unsigned myboard_gpiomux_gpios[] = { |
| @@ -57,7 +57,7 @@ static struct gpio_i2cmux_platform_data myboard_i2cmux_data = { · 15 unmodified lines | |||
| 57 | }; | 57 | }; |
| 58 | 58 | ||
| 59 | static struct platform_device myboard_i2cmux = { | 59 | static struct platform_device myboard_i2cmux = { |
| 60 | .name = "gpio-i2cmux", | 60 | .name = "i2c-gpio-mux", |
| 61 | .id = 0, | 61 | .id = 0, |
| 62 | .dev = { | 62 | .dev = { |
| 63 | .platform_data = &myboard_i2cmux_data, | 63 | .platform_data = &myboard_i2cmux_data, |
| @@ -362,5 +362,5 @@ Resources · 361 unmodified lines | |||
| 362 | http://www.almesberger.net/cv/papers/ols2k-9.ps.gz | 362 | http://www.almesberger.net/cv/papers/ols2k-9.ps.gz |
| 363 | [2] newlib package (experimental), with initrd example | 363 | [2] newlib package (experimental), with initrd example |
| 364 | http://sources.redhat.com/newlib/ | 364 | http://sources.redhat.com/newlib/ |
| 365 | [3] Brouwer, Andries; "util-linux: Miscellaneous utilities for Linux" | 365 | [3] util-linux: Miscellaneous utilities for Linux |
| 366 | ftp://ftp.win.tue.nl/pub/linux-local/utils/util-linux/ | 366 | http://www.kernel.org/pub/linux/utils/util-linux/ |
| @@ -120,6 +120,7 @@ Code Seq#(hex) Include File Comments · 119 unmodified lines | |||
| 120 | 'G' 00-0F linux/gigaset_dev.h conflict! | 120 | 'G' 00-0F linux/gigaset_dev.h conflict! |
| 121 | 'H' 00-7F linux/hiddev.h conflict! | 121 | 'H' 00-7F linux/hiddev.h conflict! |
| 122 | 'H' 00-0F linux/hidraw.h conflict! | 122 | 'H' 00-0F linux/hidraw.h conflict! |
| 123 | 'H' 01 linux/mei.h conflict! | ||
| 123 | 'H' 00-0F sound/asound.h conflict! | 124 | 'H' 00-0F sound/asound.h conflict! |
| 124 | 'H' 20-40 sound/asound_fm.h conflict! | 125 | 'H' 20-40 sound/asound_fm.h conflict! |
| 125 | 'H' 80-8F sound/sfnt_info.h conflict! | 126 | 'H' 80-8F sound/sfnt_info.h conflict! |
| @@ -50,6 +50,10 @@ LDFLAGS_MODULE · 49 unmodified lines | |||
| 50 | -------------------------------------------------- | 50 | -------------------------------------------------- |
| 51 | Additional options used for $(LD) when linking modules. | 51 | Additional options used for $(LD) when linking modules. |
| 52 | 52 | ||
| 53 | LDFLAGS_vmlinux | ||
| 54 | -------------------------------------------------- | ||
| 55 | Additional options passed to final link of vmlinux. | ||
| 56 | |||
| 53 | KBUILD_VERBOSE | 57 | KBUILD_VERBOSE |
| 54 | -------------------------------------------------- | 58 | -------------------------------------------------- |
| 55 | Set the kbuild verbosity. Can be assigned same values as "V=...". | 59 | Set the kbuild verbosity. Can be assigned same values as "V=...". |
| @@ -214,3 +218,18 @@ KBUILD_BUILD_USER, KBUILD_BUILD_HOST · 158 unmodified lines | |||
| 214 | These two variables allow to override the user@host string displayed during | 218 | These two variables allow to override the user@host string displayed during |
| 215 | boot and in /proc/version. The default value is the output of the commands | 219 | boot and in /proc/version. The default value is the output of the commands |
| 216 | whoami and host, respectively. | 220 | whoami and host, respectively. |
| 221 | |||
| 222 | KBUILD_LDS | ||
| 223 | -------------------------------------------------- | ||
| 224 | The linker script with full path. Assigned by the top-level Makefile. | ||
| 225 | |||
| 226 | KBUILD_VMLINUX_INIT | ||
| 227 | -------------------------------------------------- | ||
| 228 | All object files for the init (first) part of vmlinux. | ||
| 229 | Files specified with KBUILD_VMLINUX_INIT are linked first. | ||
| 230 | |||
| 231 | KBUILD_VMLINUX_MAIN | ||
| 232 | -------------------------------------------------- | ||
| 233 | All object files for the main part of vmlinux. | ||
| 234 | KBUILD_VMLINUX_INIT and KBUILD_VMLINUX_MAIN together specify | ||
| 235 | all the object files used to link vmlinux. | ||
| @@ -53,15 +53,15 @@ KCONFIG_ALLCONFIG · 52 unmodified lines | |||
| 53 | -------------------------------------------------- | 53 | -------------------------------------------------- |
| 54 | (partially based on lkml email from/by Rob Landley, re: miniconfig) | 54 | (partially based on lkml email from/by Rob Landley, re: miniconfig) |
| 55 | -------------------------------------------------- | 55 | -------------------------------------------------- |
| 56 | The allyesconfig/allmodconfig/allnoconfig/randconfig variants can | 56 | The allyesconfig/allmodconfig/allnoconfig/randconfig variants can also |
| 57 | also use the environment variable KCONFIG_ALLCONFIG as a flag or a | 57 | use the environment variable KCONFIG_ALLCONFIG as a flag or a filename |
| 58 | filename that contains config symbols that the user requires to be | 58 | that contains config symbols that the user requires to be set to a |
| 59 | set to a specific value. If KCONFIG_ALLCONFIG is used without a | 59 | specific value. If KCONFIG_ALLCONFIG is used without a filename where |
| 60 | filename, "make *config" checks for a file named | 60 | KCONFIG_ALLCONFIG == "" or KCONFIG_ALLCONFIG == "1", "make *config" |
| 61 | "all{yes/mod/no/def/random}.config" (corresponding to the *config command | 61 | checks for a file named "all{yes/mod/no/def/random}.config" |
| 62 | that was used) for symbol values that are to be forced. If this file | 62 | (corresponding to the *config command that was used) for symbol values |
| 63 | is not found, it checks for a file named "all.config" to contain forced | 63 | that are to be forced. If this file is not found, it checks for a |
| 64 | values. | 64 | file named "all.config" to contain forced values. |
| 65 | 65 | ||
| 66 | This enables you to create "miniature" config (miniconfig) or custom | 66 | This enables you to create "miniature" config (miniconfig) or custom |
| 67 | config files containing just the config symbols that you are interested | 67 | config files containing just the config symbols that you are interested |
| @@ -70,7 +70,6 @@ parameter is applicable: · 69 unmodified lines | |||
| 70 | M68k M68k architecture is enabled. | 70 | M68k M68k architecture is enabled. |
| 71 | These options have more detailed description inside of | 71 | These options have more detailed description inside of |
| 72 | Documentation/m68k/kernel-options.txt. | 72 | Documentation/m68k/kernel-options.txt. |
| 73 | MCA MCA bus support is enabled. | ||
| 74 | MDA MDA console support is enabled. | 73 | MDA MDA console support is enabled. |
| 75 | MIPS MIPS architecture is enabled. | 74 | MIPS MIPS architecture is enabled. |
| 76 | MOUSE Appropriate mouse support is enabled. | 75 | MOUSE Appropriate mouse support is enabled. |
| @@ -110,6 +109,7 @@ parameter is applicable: · 33 unmodified lines | |||
| 110 | USB USB support is enabled. | 109 | USB USB support is enabled. |
| 111 | USBHID USB Human Interface Device support is enabled. | 110 | USBHID USB Human Interface Device support is enabled. |
| 112 | V4L Video For Linux support is enabled. | 111 | V4L Video For Linux support is enabled. |
| 112 | VMMIO Driver for memory mapped virtio devices is enabled. | ||
| 113 | VGA The VGA console has been enabled. | 113 | VGA The VGA console has been enabled. |
| 114 | VT Virtual terminal support is enabled. | 114 | VT Virtual terminal support is enabled. |
| 115 | WDT Watchdog support is enabled. | 115 | WDT Watchdog support is enabled. |
| @@ -335,6 +335,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 219 unmodified lines | |||
| 335 | requirements as needed. This option | 335 | requirements as needed. This option |
| 336 | does not override iommu=pt | 336 | does not override iommu=pt |
| 337 | 337 | ||
| 338 | amd_iommu_dump= [HW,X86-64] | ||
| 339 | Enable AMD IOMMU driver option to dump the ACPI table | ||
| 340 | for AMD IOMMU. With this option enabled, AMD IOMMU | ||
| 341 | driver will print ACPI tables for AMD IOMMU during | ||
| 342 | IOMMU initialization. | ||
| 343 | |||
| 338 | amijoy.map= [HW,JOY] Amiga joystick support | 344 | amijoy.map= [HW,JOY] Amiga joystick support |
| 339 | Map of devices attached to JOY0DAT and JOY1DAT | 345 | Map of devices attached to JOY0DAT and JOY1DAT |
| 340 | Format: <a>,<b> | 346 | Format: <a>,<b> |
| @@ -397,8 +403,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 56 unmodified lines | |||
| 397 | atkbd.softrepeat= [HW] | 403 | atkbd.softrepeat= [HW] |
| 398 | Use software keyboard repeat | 404 | Use software keyboard repeat |
| 399 | 405 | ||
| 400 | autotest [IA-64] | ||
| 401 | |||
| 402 | baycom_epp= [HW,AX25] | 406 | baycom_epp= [HW,AX25] |
| 403 | Format: <io>,<mode> | 407 | Format: <io>,<mode> |
| 404 | 408 | ||
| @@ -508,6 +512,11 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 103 unmodified lines | |||
| 508 | Also note the kernel might malfunction if you disable | 512 | Also note the kernel might malfunction if you disable |
| 509 | some critical bits. | 513 | some critical bits. |
| 510 | 514 | ||
| 515 | cma=nn[MG] [ARM,KNL] | ||
| 516 | Sets the size of kernel global memory area for contiguous | ||
| 517 | memory allocations. For more information, see | ||
| 518 | include/linux/dma-contiguous.h | ||
| 519 | |||
| 511 | cmo_free_hint= [PPC] Format: { yes | no } | 520 | cmo_free_hint= [PPC] Format: { yes | no } |
| 512 | Specify whether pages are marked as being inactive | 521 | Specify whether pages are marked as being inactive |
| 513 | when they are freed. This is used in CMO environments | 522 | when they are freed. This is used in CMO environments |
| @@ -515,6 +524,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 1 unmodified line | |||
| 515 | a hypervisor. | 524 | a hypervisor. |
| 516 | Default: yes | 525 | Default: yes |
| 517 | 526 | ||
| 527 | coherent_pool=nn[KMG] [ARM,KNL] | ||
| 528 | Sets the size of memory pool for coherent, atomic dma | ||
| 529 | allocations if Contiguous Memory Allocator (CMA) is used. | ||
| 530 | |||
| 518 | code_bytes [X86] How many bytes of object code to print | 531 | code_bytes [X86] How many bytes of object code to print |
| 519 | in an oops report. | 532 | in an oops report. |
| 520 | Range: 0 - 8192 | 533 | Range: 0 - 8192 |
| @@ -610,7 +623,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 89 unmodified lines | |||
| 610 | 623 | ||
| 611 | ddebug_query= [KNL,DYNAMIC_DEBUG] Enable debug messages at early boot | 624 | ddebug_query= [KNL,DYNAMIC_DEBUG] Enable debug messages at early boot |
| 612 | time. See Documentation/dynamic-debug-howto.txt for | 625 | time. See Documentation/dynamic-debug-howto.txt for |
| 613 | details. | 626 | details. Deprecated, see dyndbg. |
| 614 | 627 | ||
| 615 | debug [KNL] Enable kernel debugging (events log level). | 628 | debug [KNL] Enable kernel debugging (events log level). |
| 616 | 629 | ||
| @@ -730,6 +743,11 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 113 unmodified lines | |||
| 730 | 743 | ||
| 731 | dscc4.setup= [NET] | 744 | dscc4.setup= [NET] |
| 732 | 745 | ||
| 746 | dyndbg[="val"] [KNL,DYNAMIC_DEBUG] | ||
| 747 | module.dyndbg[="val"] | ||
| 748 | Enable debug messages at boot time. See | ||
| 749 | Documentation/dynamic-debug-howto.txt for details. | ||
| 750 | |||
| 733 | earlycon= [KNL] Output early console device and options. | 751 | earlycon= [KNL] Output early console device and options. |
| 734 | uart[8250],io,<addr>[,options] | 752 | uart[8250],io,<addr>[,options] |
| 735 | uart[8250],mmio,<addr>[,options] | 753 | uart[8250],mmio,<addr>[,options] |
| @@ -982,6 +1000,20 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 246 unmodified lines | |||
| 982 | i8k.restricted [HW] Allow controlling fans only if SYS_ADMIN | 1000 | i8k.restricted [HW] Allow controlling fans only if SYS_ADMIN |
| 983 | capability is set. | 1001 | capability is set. |
| 984 | 1002 | ||
| 1003 | i915.invert_brightness= | ||
| 1004 | [DRM] Invert the sense of the variable that is used to | ||
| 1005 | set the brightness of the panel backlight. Normally a | ||
| 1006 | brightness value of 0 indicates backlight switched off, | ||
| 1007 | and the maximum of the brightness value sets the backlight | ||
| 1008 | to maximum brightness. If this parameter is set to 0 | ||
| 1009 | (default) and the machine requires it, or this parameter | ||
| 1010 | is set to 1, a brightness value of 0 sets the backlight | ||
| 1011 | to maximum brightness, and the maximum of the brightness | ||
| 1012 | value switches the backlight off. | ||
| 1013 | -1 -- never invert brightness | ||
| 1014 | 0 -- machine default | ||
| 1015 | 1 -- force brightness inversion | ||
| 1016 | |||
| 985 | icn= [HW,ISDN] | 1017 | icn= [HW,ISDN] |
| 986 | Format: <io>[,<membase>[,<icn_id>[,<icn_id2>]]] | 1018 | Format: <io>[,<membase>[,<icn_id>[,<icn_id2>]]] |
| 987 | 1019 | ||
| @@ -1425,8 +1457,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 437 unmodified lines | |||
| 1425 | devices can be requested on-demand with the | 1457 | devices can be requested on-demand with the |
| 1426 | /dev/loop-control interface. | 1458 | /dev/loop-control interface. |
| 1427 | 1459 | ||
| 1428 | mcatest= [IA-64] | ||
| 1429 | |||
| 1430 | mce [X86-32] Machine Check Exception | 1460 | mce [X86-32] Machine Check Exception |
| 1431 | 1461 | ||
| 1432 | mce=option [X86-64] See Documentation/x86/x86_64/boot-options.txt | 1462 | mce=option [X86-64] See Documentation/x86/x86_64/boot-options.txt |
| @@ -2161,6 +2191,9 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 728 unmodified lines | |||
| 2161 | on: Turn realloc on | 2191 | on: Turn realloc on |
| 2162 | realloc same as realloc=on | 2192 | realloc same as realloc=on |
| 2163 | noari do not use PCIe ARI. | 2193 | noari do not use PCIe ARI. |
| 2194 | pcie_scan_all Scan all possible PCIe devices. Otherwise we | ||
| 2195 | only look for one device below a PCIe downstream | ||
| 2196 | port. | ||
| 2164 | 2197 | ||
| 2165 | pcie_aspm= [PCIE] Forcibly enable or disable PCIe Active State Power | 2198 | pcie_aspm= [PCIE] Forcibly enable or disable PCIe Active State Power |
| 2166 | Management. | 2199 | Management. |
| @@ -2330,18 +2363,100 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 163 unmodified lines | |||
| 2330 | ramdisk_size= [RAM] Sizes of RAM disks in kilobytes | 2363 | ramdisk_size= [RAM] Sizes of RAM disks in kilobytes |
| 2331 | See Documentation/blockdev/ramdisk.txt. | 2364 | See Documentation/blockdev/ramdisk.txt. |
| 2332 | 2365 | ||
| 2333 | rcupdate.blimit= [KNL,BOOT] | 2366 | rcutree.blimit= [KNL,BOOT] |
| 2334 | Set maximum number of finished RCU callbacks to process | 2367 | Set maximum number of finished RCU callbacks to process |
| 2335 | in one batch. | 2368 | in one batch. |
| 2336 | 2369 | ||
| 2337 | rcupdate.qhimark= [KNL,BOOT] | 2370 | rcutree.qhimark= [KNL,BOOT] |
| 2338 | Set threshold of queued | 2371 | Set threshold of queued |
| 2339 | RCU callbacks over which batch limiting is disabled. | 2372 | RCU callbacks over which batch limiting is disabled. |
| 2340 | 2373 | ||
| 2341 | rcupdate.qlowmark= [KNL,BOOT] | 2374 | rcutree.qlowmark= [KNL,BOOT] |
| 2342 | Set threshold of queued RCU callbacks below which | 2375 | Set threshold of queued RCU callbacks below which |
| 2343 | batch limiting is re-enabled. | 2376 | batch limiting is re-enabled. |
| 2344 | 2377 | ||
| 2378 | rcutree.rcu_cpu_stall_suppress= [KNL,BOOT] | ||
| 2379 | Suppress RCU CPU stall warning messages. | ||
| 2380 | |||
| 2381 | rcutree.rcu_cpu_stall_timeout= [KNL,BOOT] | ||
| 2382 | Set timeout for RCU CPU stall warning messages. | ||
| 2383 | |||
| 2384 | rcutorture.fqs_duration= [KNL,BOOT] | ||
| 2385 | Set duration of force_quiescent_state bursts. | ||
| 2386 | |||
| 2387 | rcutorture.fqs_holdoff= [KNL,BOOT] | ||
| 2388 | Set holdoff time within force_quiescent_state bursts. | ||
| 2389 | |||
| 2390 | rcutorture.fqs_stutter= [KNL,BOOT] | ||
| 2391 | Set wait time between force_quiescent_state bursts. | ||
| 2392 | |||
| 2393 | rcutorture.irqreader= [KNL,BOOT] | ||
| 2394 | Test RCU readers from irq handlers. | ||
| 2395 | |||
| 2396 | rcutorture.n_barrier_cbs= [KNL,BOOT] | ||
| 2397 | Set callbacks/threads for rcu_barrier() testing. | ||
| 2398 | |||
| 2399 | rcutorture.nfakewriters= [KNL,BOOT] | ||
| 2400 | Set number of concurrent RCU writers. These just | ||
| 2401 | stress RCU, they don't participate in the actual | ||
| 2402 | test, hence the "fake". | ||
| 2403 | |||
| 2404 | rcutorture.nreaders= [KNL,BOOT] | ||
| 2405 | Set number of RCU readers. | ||
| 2406 | |||
| 2407 | rcutorture.onoff_holdoff= [KNL,BOOT] | ||
| 2408 | Set time (s) after boot for CPU-hotplug testing. | ||
| 2409 | |||
| 2410 | rcutorture.onoff_interval= [KNL,BOOT] | ||
| 2411 | Set time (s) between CPU-hotplug operations, or | ||
| 2412 | zero to disable CPU-hotplug testing. | ||
| 2413 | |||
| 2414 | rcutorture.shuffle_interval= [KNL,BOOT] | ||
| 2415 | Set task-shuffle interval (s). Shuffling tasks | ||
| 2416 | allows some CPUs to go into dyntick-idle mode | ||
| 2417 | during the rcutorture test. | ||
| 2418 | |||
| 2419 | rcutorture.shutdown_secs= [KNL,BOOT] | ||
| 2420 | Set time (s) after boot system shutdown. This | ||
| 2421 | is useful for hands-off automated testing. | ||
| 2422 | |||
| 2423 | rcutorture.stall_cpu= [KNL,BOOT] | ||
| 2424 | Duration of CPU stall (s) to test RCU CPU stall | ||
| 2425 | warnings, zero to disable. | ||
| 2426 | |||
| 2427 | rcutorture.stall_cpu_holdoff= [KNL,BOOT] | ||
| 2428 | Time to wait (s) after boot before inducing stall. | ||
| 2429 | |||
| 2430 | rcutorture.stat_interval= [KNL,BOOT] | ||
| 2431 | Time (s) between statistics printk()s. | ||
| 2432 | |||
| 2433 | rcutorture.stutter= [KNL,BOOT] | ||
| 2434 | Time (s) to stutter testing, for example, specifying | ||
| 2435 | five seconds causes the test to run for five seconds, | ||
| 2436 | wait for five seconds, and so on. This tests RCU's | ||
| 2437 | ability to transition abruptly to and from idle. | ||
| 2438 | |||
| 2439 | rcutorture.test_boost= [KNL,BOOT] | ||
| 2440 | Test RCU priority boosting? 0=no, 1=maybe, 2=yes. | ||
| 2441 | "Maybe" means test if the RCU implementation | ||
| 2442 | under test support RCU priority boosting. | ||
| 2443 | |||
| 2444 | rcutorture.test_boost_duration= [KNL,BOOT] | ||
| 2445 | Duration (s) of each individual boost test. | ||
| 2446 | |||
| 2447 | rcutorture.test_boost_interval= [KNL,BOOT] | ||
| 2448 | Interval (s) between each boost test. | ||
| 2449 | |||
| 2450 | rcutorture.test_no_idle_hz= [KNL,BOOT] | ||
| 2451 | Test RCU's dyntick-idle handling. See also the | ||
| 2452 | rcutorture.shuffle_interval parameter. | ||
| 2453 | |||
| 2454 | rcutorture.torture_type= [KNL,BOOT] | ||
| 2455 | Specify the RCU implementation to test. | ||
| 2456 | |||
| 2457 | rcutorture.verbose= [KNL,BOOT] | ||
| 2458 | Enable additional printk() statements. | ||
| 2459 | |||
| 2345 | rdinit= [KNL] | 2460 | rdinit= [KNL] |
| 2346 | Format: <full_path> | 2461 | Format: <full_path> |
| 2347 | Run specified binary instead of /init from the ramdisk, | 2462 | Run specified binary instead of /init from the ramdisk, |
| @@ -2372,6 +2487,8 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 24 unmodified lines | |||
| 2372 | 2487 | ||
| 2373 | resume= [SWSUSP] | 2488 | resume= [SWSUSP] |
| 2374 | Specify the partition device for software suspend | 2489 | Specify the partition device for software suspend |
| 2490 | Format: | ||
| 2491 | {/dev/<dev> | PARTUUID=<uuid> | <int>:<int> | <hex>} | ||
| 2375 | 2492 | ||
| 2376 | resume_offset= [SWSUSP] | 2493 | resume_offset= [SWSUSP] |
| 2377 | Specify the offset from the beginning of the partition | 2494 | Specify the offset from the beginning of the partition |
| @@ -2426,6 +2543,15 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 48 unmodified lines | |||
| 2426 | 2543 | ||
| 2427 | sched_debug [KNL] Enables verbose scheduler debug messages. | 2544 | sched_debug [KNL] Enables verbose scheduler debug messages. |
| 2428 | 2545 | ||
| 2546 | skew_tick= [KNL] Offset the periodic timer tick per cpu to mitigate | ||
| 2547 | xtime_lock contention on larger systems, and/or RCU lock | ||
| 2548 | contention on all systems with CONFIG_MAXSMP set. | ||
| 2549 | Format: { "0" | "1" } | ||
| 2550 | 0 -- disable. (may be 1 via CONFIG_CMDLINE="skew_tick=1" | ||
| 2551 | 1 -- enable. | ||
| 2552 | Note: increases power consumption, thus should only be | ||
| 2553 | enabled if running jitter sensitive (HPC/RT) workloads. | ||
| 2554 | |||
| 2429 | security= [SECURITY] Choose a security module to enable at boot. | 2555 | security= [SECURITY] Choose a security module to enable at boot. |
| 2430 | If this boot parameter is not specified, only the first | 2556 | If this boot parameter is not specified, only the first |
| 2431 | security module asking for security registration will be | 2557 | security module asking for security registration will be |
| @@ -2847,6 +2973,22 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 415 unmodified lines | |||
| 2847 | video= [FB] Frame buffer configuration | 2973 | video= [FB] Frame buffer configuration |
| 2848 | See Documentation/fb/modedb.txt. | 2974 | See Documentation/fb/modedb.txt. |
| 2849 | 2975 | ||
| 2976 | virtio_mmio.device= | ||
| 2977 | [VMMIO] Memory mapped virtio (platform) device. | ||
| 2978 | |||
| 2979 | <size>@<baseaddr>:<irq>[:<id>] | ||
| 2980 | where: | ||
| 2981 | <size> := size (can use standard suffixes | ||
| 2982 | like K, M and G) | ||
| 2983 | <baseaddr> := physical base address | ||
| 2984 | <irq> := interrupt number (as passed to | ||
| 2985 | request_irq()) | ||
| 2986 | <id> := (optional) platform device id | ||
| 2987 | example: | ||
| 2988 | virtio_mmio.device=1K@0x100b0000:48:7 | ||
| 2989 | |||
| 2990 | Can be used multiple times for multiple devices. | ||
| 2991 | |||
| 2850 | vga= [BOOT,X86-32] Select a particular video mode | 2992 | vga= [BOOT,X86-32] Select a particular video mode |
| 2851 | See Documentation/x86/boot.txt and | 2993 | See Documentation/x86/boot.txt and |
| 2852 | Documentation/svga.txt. | 2994 | Documentation/svga.txt. |
| @@ -0,0 +1,152 @@ | |||
| 1 | LED Transient Trigger | ||
| 2 | ===================== | ||
| 3 | |||
| 4 | The leds timer trigger does not currently have an interface to activate | ||
| 5 | a one shot timer. The current support allows for setting two timers, one for | ||
| 6 | specifying how long a state to be on, and the second for how long the state | ||
| 7 | to be off. The delay_on value specifies the time period an LED should stay | ||
| 8 | in on state, followed by a delay_off value that specifies how long the LED | ||
| 9 | should stay in off state. The on and off cycle repeats until the trigger | ||
| 10 | gets deactivated. There is no provision for one time activation to implement | ||
| 11 | features that require an on or off state to be held just once and then stay in | ||
| 12 | the original state forever. | ||
| 13 | |||
| 14 | Without one shot timer interface, user space can still use timer trigger to | ||
| 15 | set a timer to hold a state, however when user space application crashes or | ||
| 16 | goes away without deactivating the timer, the hardware will be left in that | ||
| 17 | state permanently. | ||
| 18 | |||
| 19 | As a specific example of this use-case, let's look at vibrate feature on | ||
| 20 | phones. Vibrate function on phones is implemented using PWM pins on SoC or | ||
| 21 | PMIC. There is a need to activate one shot timer to control the vibrate | ||
| 22 | feature, to prevent user space crashes leaving the phone in vibrate mode | ||
| 23 | permanently causing the battery to drain. | ||
| 24 | |||
| 25 | Transient trigger addresses the need for one shot timer activation. The | ||
| 26 | transient trigger can be enabled and disabled just like the other leds | ||
| 27 | triggers. | ||
| 28 | |||
| 29 | When an led class device driver registers itself, it can specify all leds | ||
| 30 | triggers it supports and a default trigger. During registration, activation | ||
| 31 | routine for the default trigger gets called. During registration of an led | ||
| 32 | class device, the LED state does not change. | ||
| 33 | |||
| 34 | When the driver unregisters, deactivation routine for the currently active | ||
| 35 | trigger will be called, and LED state is changed to LED_OFF. | ||
| 36 | |||
| 37 | Driver suspend changes the LED state to LED_OFF and resume doesn't change | ||
| 38 | the state. Please note that there is no explicit interaction between the | ||
| 39 | suspend and resume actions and the currently enabled trigger. LED state | ||
| 40 | changes are suspended while the driver is in suspend state. Any timers | ||
| 41 | that are active at the time driver gets suspended, continue to run, without | ||
| 42 | being able to actually change the LED state. Once driver is resumed, triggers | ||
| 43 | start functioning again. | ||
| 44 | |||
| 45 | LED state changes are controlled using brightness which is a common led | ||
| 46 | class device property. When brightness is set to 0 from user space via | ||
| 47 | echo 0 > brightness, it will result in deactivating the current trigger. | ||
| 48 | |||
| 49 | Transient trigger uses standard register and unregister interfaces. During | ||
| 50 | trigger registration, for each led class device that specifies this trigger | ||
| 51 | as its default trigger, trigger activation routine will get called. During | ||
| 52 | registration, the LED state does not change, unless there is another trigger | ||
| 53 | active, in which case LED state changes to LED_OFF. | ||
| 54 | |||
| 55 | During trigger unregistration, LED state gets changed to LED_OFF. | ||
| 56 | |||
| 57 | Transient trigger activation routine doesn't change the LED state. It | ||
| 58 | creates its properties and does its initialization. Transient trigger | ||
| 59 | deactivation routine, will cancel any timer that is active before it cleans | ||
| 60 | up and removes the properties it created. It will restore the LED state to | ||
| 61 | non-transient state. When driver gets suspended, irrespective of the transient | ||
| 62 | state, the LED state changes to LED_OFF. | ||
| 63 | |||
| 64 | Transient trigger can be enabled and disabled from user space on led class | ||
| 65 | devices, that support this trigger as shown below: | ||
| 66 | |||
| 67 | echo transient > trigger | ||
| 68 | echo none > trigger | ||
| 69 | |||
| 70 | NOTE: Add a new property trigger state to control the state. | ||
| 71 | |||
| 72 | This trigger exports three properties, activate, state, and duration. When | ||
| 73 | transient trigger is activated these properties are set to default values. | ||
| 74 | |||
| 75 | - duration allows setting timer value in msecs. The initial value is 0. | ||
| 76 | - activate allows activating and deactivating the timer specified by | ||
| 77 | duration as needed. The initial and default value is 0. This will allow | ||
| 78 | duration to be set after trigger activation. | ||
| 79 | - state allows user to specify a transient state to be held for the specified | ||
| 80 | duration. | ||
| 81 | |||
| 82 | activate - one shot timer activate mechanism. | ||
| 83 | 1 when activated, 0 when deactivated. | ||
| 84 | default value is zero when transient trigger is enabled, | ||
| 85 | to allow duration to be set. | ||
| 86 | |||
| 87 | activate state indicates a timer with a value of specified | ||
| 88 | duration running. | ||
| 89 | deactivated state indicates that there is no active timer | ||
| 90 | running. | ||
| 91 | |||
| 92 | duration - one shot timer value. When activate is set, duration value | ||
| 93 | is used to start a timer that runs once. This value doesn't | ||
| 94 | get changed by the trigger unless user does a set via | ||
| 95 | echo new_value > duration | ||
| 96 | |||
| 97 | state - transient state to be held. It has two values 0 or 1. 0 maps | ||
| 98 | to LED_OFF and 1 maps to LED_FULL. The specified state is | ||
| 99 | held for the duration of the one shot timer and then the | ||
| 100 | state gets changed to the non-transient state which is the | ||
| 101 | inverse of transient state. | ||
| 102 | If state = LED_FULL, when the timer runs out the state will | ||
| 103 | go back to LED_OFF. | ||
| 104 | If state = LED_OFF, when the timer runs out the state will | ||
| 105 | go back to LED_FULL. | ||
| 106 | Please note that current LED state is not checked prior to | ||
| 107 | changing the state to the specified state. | ||
| 108 | Driver could map these values to inverted depending on the | ||
| 109 | default states it defines for the LED in its brightness_set() | ||
| 110 | interface which is called from the led brightness_set() | ||
| 111 | interfaces to control the LED state. | ||
| 112 | |||
| 113 | When timer expires activate goes back to deactivated state, duration is left | ||
| 114 | at the set value to be used when activate is set at a future time. This will | ||
| 115 | allow user app to set the time once and activate it to run it once for the | ||
| 116 | specified value as needed. When timer expires, state is restored to the | ||
| 117 | non-transient state which is the inverse of the transient state. | ||
| 118 | |||
| 119 | echo 1 > activate - starts timer = duration when duration is not 0. | ||
| 120 | echo 0 > activate - cancels currently running timer. | ||
| 121 | echo n > duration - stores timer value to be used upon next | ||
| 122 | activate. Currently active timer if | ||
| 123 | any, continues to run for the specified time. | ||
| 124 | echo 0 > duration - stores timer value to be used upon next | ||
| 125 | activate. Currently active timer if any, | ||
| 126 | continues to run for the specified time. | ||
| 127 | echo 1 > state - stores desired transient state LED_FULL to be | ||
| 128 | held for the specified duration. | ||
| 129 | echo 0 > state - stores desired transient state LED_OFF to be | ||
| 130 | held for the specified duration. | ||
| 131 | |||
| 132 | What is not supported: | ||
| 133 | ====================== | ||
| 134 | - Timer activation is one shot and extending and/or shortening the timer | ||
| 135 | is not supported. | ||
| 136 | |||
| 137 | Example use-case 1: | ||
| 138 | echo transient > trigger | ||
| 139 | echo n > duration | ||
| 140 | echo 1 > state | ||
| 141 | repeat the following step as needed: | ||
| 142 | echo 1 > activate - start timer = duration to run once | ||
| 143 | echo 1 > activate - start timer = duration to run once | ||
| 144 | echo none > trigger | ||
| 145 | |||
| 146 | This trigger is intended to be used for for the following example use cases: | ||
| 147 | - Control of vibrate (phones, tablets etc.) hardware by user space app. | ||
| 148 | - Use of LED by user space app as activity indicator. | ||
| 149 | - Use of LED by user space app as a kind of watchdog indicator -- as | ||
| 150 | long as the app is alive, it can keep the LED illuminated, if it dies | ||
| 151 | the LED will be extinguished automatically. | ||
| 152 | - Use by any user space app that needs a transient GPIO output. | ||
| @@ -1,313 +0,0 @@ | |||
| 1 | i386 Micro Channel Architecture Support | ||
| 2 | ======================================= | ||
| 3 | |||
| 4 | MCA support is enabled using the CONFIG_MCA define. A machine with a MCA | ||
| 5 | bus will have the kernel variable MCA_bus set, assuming the BIOS feature | ||
| 6 | bits are set properly (see arch/i386/boot/setup.S for information on | ||
| 7 | how this detection is done). | ||
| 8 | |||
| 9 | Adapter Detection | ||
| 10 | ================= | ||
| 11 | |||
| 12 | The ideal MCA adapter detection is done through the use of the | ||
| 13 | Programmable Option Select registers. Generic functions for doing | ||
| 14 | this have been added in include/linux/mca.h and arch/x86/kernel/mca_32.c. | ||
| 15 | Everything needed to detect adapters and read (and write) configuration | ||
| 16 | information is there. A number of MCA-specific drivers already use | ||
| 17 | this. The typical probe code looks like the following: | ||
| 18 | |||
| 19 | #include <linux/mca.h> | ||
| 20 | |||
| 21 | unsigned char pos2, pos3, pos4, pos5; | ||
| 22 | struct net_device* dev; | ||
| 23 | int slot; | ||
| 24 | |||
| 25 | if( MCA_bus ) { | ||
| 26 | slot = mca_find_adapter( ADAPTER_ID, 0 ); | ||
| 27 | if( slot == MCA_NOTFOUND ) { | ||
| 28 | return -ENODEV; | ||
| 29 | } | ||
| 30 | /* optional - see below */ | ||
| 31 | mca_set_adapter_name( slot, "adapter name & description" ); | ||
| 32 | mca_set_adapter_procfn( slot, dev_getinfo, dev ); | ||
| 33 | |||
| 34 | /* read the POS registers. Most devices only use 2 and 3 */ | ||
| 35 | pos2 = mca_read_stored_pos( slot, 2 ); | ||
| 36 | pos3 = mca_read_stored_pos( slot, 3 ); | ||
| 37 | pos4 = mca_read_stored_pos( slot, 4 ); | ||
| 38 | pos5 = mca_read_stored_pos( slot, 5 ); | ||
| 39 | } else { | ||
| 40 | return -ENODEV; | ||
| 41 | } | ||
| 42 | |||
| 43 | /* extract configuration from pos[2345] and set everything up */ | ||
| 44 | |||
| 45 | Loadable modules should modify this to test that the specified IRQ and | ||
| 46 | IO ports (plus whatever other stuff) match. See 3c523.c for example | ||
| 47 | code (actually, smc-mca.c has a slightly more complex example that can | ||
| 48 | handle a list of adapter ids). | ||
| 49 | |||
| 50 | Keep in mind that devices should never directly access the POS registers | ||
| 51 | (via inb(), outb(), etc). While it's generally safe, there is a small | ||
| 52 | potential for blowing up hardware when it's done at the wrong time. | ||
| 53 | Furthermore, accessing a POS register disables a device temporarily. | ||
| 54 | This is usually okay during startup, but do _you_ want to rely on it? | ||
| 55 | During initial configuration, mca_init() reads all the POS registers | ||
| 56 | into memory. mca_read_stored_pos() accesses that data. mca_read_pos() | ||
| 57 | and mca_write_pos() are also available for (safer) direct POS access, | ||
| 58 | but their use is _highly_ discouraged. mca_write_pos() is particularly | ||
| 59 | dangerous, as it is possible for adapters to be put in inconsistent | ||
| 60 | states (i.e. sharing IO address, etc) and may result in crashes, toasted | ||
| 61 | hardware, and blindness. | ||
| 62 | |||
| 63 | User level drivers (such as the AGX X server) can use /proc/mca/pos to | ||
| 64 | find adapters (see below). | ||
| 65 | |||
| 66 | Some MCA adapters can also be detected via the usual ISA-style device | ||
| 67 | probing (many SCSI adapters, for example). This sort of thing is highly | ||
| 68 | discouraged. Perfectly good information is available telling you what's | ||
| 69 | there, so there's no excuse for messing with random IO ports. However, | ||
| 70 | we MCA people still appreciate any ISA-style driver that will work with | ||
| 71 | our hardware. You take what you can get... | ||
| 72 | |||
| 73 | Level-Triggered Interrupts | ||
| 74 | ========================== | ||
| 75 | |||
| 76 | Because MCA uses level-triggered interrupts, a few problems arise with | ||
| 77 | what might best be described as the ISA mindset and its effects on | ||
| 78 | drivers. These sorts of problems are expected to become less common as | ||
| 79 | more people use shared IRQs on PCI machines. | ||
| 80 | |||
| 81 | In general, an interrupt must be acknowledged not only at the ICU (which | ||
| 82 | is done automagically by the kernel), but at the device level. In | ||
| 83 | particular, IRQ 0 must be reset after a timer interrupt (now done in | ||
| 84 | arch/x86/kernel/time.c) or the first timer interrupt hangs the system. | ||
| 85 | There were also problems with the 1.3.x floppy drivers, but that seems | ||
| 86 | to have been fixed. | ||
| 87 | |||
| 88 | IRQs are also shareable, and most MCA-specific devices should be coded | ||
| 89 | with shared IRQs in mind. | ||
| 90 | |||
| 91 | /proc/mca | ||
| 92 | ========= | ||
| 93 | |||
| 94 | /proc/mca is a directory containing various files for adapters and | ||
| 95 | other stuff. | ||
| 96 | |||
| 97 | /proc/mca/pos Straight listing of POS registers | ||
| 98 | /proc/mca/slot[1-8] Information on adapter in specific slot | ||
| 99 | /proc/mca/video Same for integrated video | ||
| 100 | /proc/mca/scsi Same for integrated SCSI | ||
| 101 | /proc/mca/machine Machine information | ||
| 102 | |||
| 103 | See Appendix A for a sample. | ||
| 104 | |||
| 105 | Device drivers can easily add their own information function for | ||
| 106 | specific slots (including integrated ones) via the | ||
| 107 | mca_set_adapter_procfn() call. Drivers that support this are ESDI, IBM | ||
| 108 | SCSI, and 3c523. If a device is also a module, make sure that the proc | ||
| 109 | function is removed in the module cleanup. This will require storing | ||
| 110 | the slot information in a private structure somewhere. See the 3c523 | ||
| 111 | driver for details. | ||
| 112 | |||
| 113 | Your typical proc function will look something like this: | ||
| 114 | |||
| 115 | static int | ||
| 116 | dev_getinfo( char* buf, int slot, void* d ) { | ||
| 117 | struct net_device* dev = (struct net_device*) d; | ||
| 118 | int len = 0; | ||
| 119 | |||
| 120 | len += sprintf( buf+len, "Device: %s\n", dev->name ); | ||
| 121 | len += sprintf( buf+len, "IRQ: %d\n", dev->irq ); | ||
| 122 | len += sprintf( buf+len, "IO Port: %#lx-%#lx\n", ... ); | ||
| 123 | ... | ||
| 124 | |||
| 125 | return len; | ||
| 126 | } | ||
| 127 | |||
| 128 | Some of the standard MCA information will already be printed, so don't | ||
| 129 | bother repeating it. Don't try putting in more than 3K of information. | ||
| 130 | |||
| 131 | Enable this function with: | ||
| 132 | mca_set_adapter_procfn( slot, dev_getinfo, dev ); | ||
| 133 | |||
| 134 | Disable it with: | ||
| 135 | mca_set_adapter_procfn( slot, NULL, NULL ); | ||
| 136 | |||
| 137 | It is also recommended that, even if you don't write a proc function, to | ||
| 138 | set the name of the adapter (i.e. "PS/2 ESDI Controller") via | ||
| 139 | mca_set_adapter_name( int slot, char* name ). | ||
| 140 | |||
| 141 | MCA Device Drivers | ||
| 142 | ================== | ||
| 143 | |||
| 144 | Currently, there are a number of MCA-specific device drivers. | ||
| 145 | |||
| 146 | 1) PS/2 SCSI | ||
| 147 | drivers/scsi/ibmmca.c | ||
| 148 | drivers/scsi/ibmmca.h | ||
| 149 | The driver for the IBM SCSI subsystem. Includes both integrated | ||
| 150 | controllers and adapter cards. May require command-line arg | ||
| 151 | "ibmmcascsi=io_port" to force detection of an adapter. If you have a | ||
| 152 | machine with a front-panel display (i.e. model 95), you can use | ||
| 153 | "ibmmcascsi=display" to enable a drive activity indicator. | ||
| 154 | |||
| 155 | 2) 3c523 | ||
| 156 | drivers/net/3c523.c | ||
| 157 | drivers/net/3c523.h | ||
| 158 | 3Com 3c523 Etherlink/MC ethernet driver. | ||
| 159 | |||
| 160 | 3) SMC Ultra/MCA and IBM Adapter/A | ||
| 161 | drivers/net/smc-mca.c | ||
| 162 | drivers/net/smc-mca.h | ||
| 163 | Driver for the MCA version of the SMC Ultra and various other | ||
| 164 | OEM'ed and work-alike cards (Elite, Adapter/A, etc). | ||
| 165 | |||
| 166 | 4) NE/2 | ||
| 167 | driver/net/ne2.c | ||
| 168 | driver/net/ne2.h | ||
| 169 | The NE/2 is the MCA version of the NE2000. This may not work | ||
| 170 | with clones that have a different adapter id than the original | ||
| 171 | NE/2. | ||
| 172 | |||
| 173 | 5) Future Domain MCS-600/700, OEM'd IBM Fast SCSI Adapter/A and | ||
| 174 | Reply Sound Blaster/SCSI (SCSI part) | ||
| 175 | Better support for these cards than the driver for ISA. | ||
| 176 | Supports multiple cards with IRQ sharing. | ||
| 177 | |||
| 178 | Also added boot time option of scsi-probe, which can do reordering of | ||
| 179 | SCSI host adapters. This will direct the kernel on the order which | ||
| 180 | SCSI adapter should be detected. Example: | ||
| 181 | scsi-probe=ibmmca,fd_mcs,adaptec1542,buslogic | ||
| 182 | |||
| 183 | The serial drivers were modified to support the extended IO port range | ||
| 184 | of the typical MCA system (also #ifdef CONFIG_MCA). | ||
| 185 | |||
| 186 | The following devices work with existing drivers: | ||
| 187 | 1) Token-ring | ||
| 188 | 2) Future Domain SCSI (MCS-600, MCS-700, not MCS-350, OEM'ed IBM SCSI) | ||
| 189 | 3) Adaptec 1640 SCSI (using the aha1542 driver) | ||
| 190 | 4) Bustek/Buslogic SCSI (various) | ||
| 191 | 5) Probably all Arcnet cards. | ||
| 192 | 6) Some, possibly all, MCA IDE controllers. | ||
| 193 | 7) 3Com 3c529 (MCA version of 3c509) (patched) | ||
| 194 | |||
| 195 | 8) Intel EtherExpressMC (patched version) | ||
| 196 | You need to have CONFIG_MCA defined to have EtherExpressMC support. | ||
| 197 | 9) Reply Sound Blaster/SCSI (SB part) (patched version) | ||
| 198 | |||
| 199 | Bugs & Other Weirdness | ||
| 200 | ====================== | ||
| 201 | |||
| 202 | NMIs tend to occur with MCA machines because of various hardware | ||
| 203 | weirdness, bus timeouts, and many other non-critical things. Some basic | ||
| 204 | code to handle them (inspired by the NetBSD MCA code) has been added to | ||
| 205 | detect the guilty device, but it's pretty incomplete. If NMIs are a | ||
| 206 | persistent problem (on some model 70 or 80s, they occur every couple | ||
| 207 | shell commands), the CONFIG_IGNORE_NMI flag will take care of that. | ||
| 208 | |||
| 209 | Various Pentium machines have had serious problems with the FPU test in | ||
| 210 | bugs.h. Basically, the machine hangs after the HLT test. This occurs, | ||
| 211 | as far as we know, on the Pentium-equipped 85s, 95s, and some PC Servers. | ||
| 212 | The PCI/MCA PC 750s are fine as far as I can tell. The ``mca-pentium'' | ||
| 213 | boot-prompt flag will disable the FPU bug check if this is a problem | ||
| 214 | with your machine. | ||
| 215 | |||
| 216 | The model 80 has a raft of problems that are just too weird and unique | ||
| 217 | to get into here. Some people have no trouble while others have nothing | ||
| 218 | but problems. I'd suspect some problems are related to the age of the | ||
| 219 | average 80 and accompanying hardware deterioration, although others | ||
| 220 | are definitely design problems with the hardware. Among the problems | ||
| 221 | include SCSI controller problems, ESDI controller problems, and serious | ||
| 222 | screw-ups in the floppy controller. Oh, and the parallel port is also | ||
| 223 | pretty flaky. There were about 5 or 6 different model 80 motherboards | ||
| 224 | produced to fix various obscure problems. As far as I know, it's pretty | ||
| 225 | much impossible to tell which bugs a particular model 80 has (other than | ||
| 226 | triggering them, that is). | ||
| 227 | |||
| 228 | Drivers are required for some MCA memory adapters. If you're suddenly | ||
| 229 | short a few megs of RAM, this might be the reason. The (I think) Enhanced | ||
| 230 | Memory Adapter commonly found on the model 70 is one. There's a very | ||
| 231 | alpha driver floating around, but it's pretty ugly (disassembled from | ||
| 232 | the DOS driver, actually). See the MCA Linux web page (URL below) | ||
| 233 | for more current memory info. | ||
| 234 | |||
| 235 | The Thinkpad 700 and 720 will work, but various components are either | ||
| 236 | non-functional, flaky, or we don't know anything about them. The | ||
| 237 | graphics controller is supposed to be some WD, but we can't get things | ||
| 238 | working properly. The PCMCIA slots don't seem to work. Ditto for APM. | ||
| 239 | The serial ports work, but detection seems to be flaky. | ||
| 240 | |||
| 241 | Credits | ||
| 242 | ======= | ||
| 243 | A whole pile of people have contributed to the MCA code. I'd include | ||
| 244 | their names here, but I don't have a list handy. Check the MCA Linux | ||
| 245 | home page (URL below) for a perpetually out-of-date list. | ||
| 246 | |||
| 247 | ===================================================================== | ||
| 248 | MCA Linux Home Page: http://www.dgmicro.com/mca/ | ||
| 249 | |||
| 250 | Christophe Beauregard | ||
| 251 | chrisb@truespectra.com | ||
| 252 | cpbeaure@calum.csclub.uwaterloo.ca | ||
| 253 | |||
| 254 | ===================================================================== | ||
| 255 | Appendix A: Sample /proc/mca | ||
| 256 | |||
| 257 | This is from my model 8595. Slot 1 contains the standard IBM SCSI | ||
| 258 | adapter, slot 3 is an Adaptec AHA-1640, slot 5 is a XGA-1 video adapter, | ||
| 259 | and slot 7 is the 3c523 Etherlink/MC. | ||
| 260 | |||
| 261 | /proc/mca/machine: | ||
| 262 | Model Id: 0xf8 | ||
| 263 | Submodel Id: 0x14 | ||
| 264 | BIOS Revision: 0x5 | ||
| 265 | |||
| 266 | /proc/mca/pos: | ||
| 267 | Slot 1: ff 8e f1 fc a0 ff ff ff IBM SCSI Adapter w/Cache | ||
| 268 | Slot 2: ff ff ff ff ff ff ff ff | ||
| 269 | Slot 3: 1f 0f 81 3b bf b6 ff ff | ||
| 270 | Slot 4: ff ff ff ff ff ff ff ff | ||
| 271 | Slot 5: db 8f 1d 5e fd c0 00 00 | ||
| 272 | Slot 6: ff ff ff ff ff ff ff ff | ||
| 273 | Slot 7: 42 60 ff 08 ff ff ff ff 3Com 3c523 Etherlink/MC | ||
| 274 | Slot 8: ff ff ff ff ff ff ff ff | ||
| 275 | Video : ff ff ff ff ff ff ff ff | ||
| 276 | SCSI : ff ff ff ff ff ff ff ff | ||
| 277 | |||
| 278 | /proc/mca/slot1: | ||
| 279 | Slot: 1 | ||
| 280 | Adapter Name: IBM SCSI Adapter w/Cache | ||
| 281 | Id: 8eff | ||
| 282 | Enabled: Yes | ||
| 283 | POS: ff 8e f1 fc a0 ff ff ff | ||
| 284 | Subsystem PUN: 7 | ||
| 285 | Detected at boot: Yes | ||
| 286 | |||
| 287 | /proc/mca/slot3: | ||
| 288 | Slot: 3 | ||
| 289 | Adapter Name: Unknown | ||
| 290 | Id: 0f1f | ||
| 291 | Enabled: Yes | ||
| 292 | POS: 1f 0f 81 3b bf b6 ff ff | ||
| 293 | |||
| 294 | /proc/mca/slot5: | ||
| 295 | Slot: 5 | ||
| 296 | Adapter Name: Unknown | ||
| 297 | Id: 8fdb | ||
| 298 | Enabled: Yes | ||
| 299 | POS: db 8f 1d 5e fd c0 00 00 | ||
| 300 | |||
| 301 | /proc/mca/slot7: | ||
| 302 | Slot: 7 | ||
| 303 | Adapter Name: 3Com 3c523 Etherlink/MC | ||
| 304 | Id: 6042 | ||
| 305 | Enabled: Yes | ||
| 306 | POS: 42 60 ff 08 ff ff ff ff | ||
| 307 | Revision: 0xe | ||
| 308 | IRQ: 9 | ||
| 309 | IO Address: 0x3300-0x3308 | ||
| 310 | Memory: 0xd8000-0xdbfff | ||
| 311 | Transceiver: External | ||
| 312 | Device: eth0 | ||
| 313 | Hardware Address: 02 60 8c 45 c4 2a | ||
| @@ -335,6 +335,9 @@ the media_entity pipe field. · 334 unmodified lines | |||
| 335 | Calls to media_entity_pipeline_start() can be nested. The pipeline pointer must | 335 | Calls to media_entity_pipeline_start() can be nested. The pipeline pointer must |
| 336 | be identical for all nested calls to the function. | 336 | be identical for all nested calls to the function. |
| 337 | 337 | ||
| 338 | media_entity_pipeline_start() may return an error. In that case, it will | ||
| 339 | clean up any the changes it did by itself. | ||
| 340 | |||
| 338 | When stopping the stream, drivers must notify the entities with | 341 | When stopping the stream, drivers must notify the entities with |
| 339 | 342 | ||
| 340 | media_entity_pipeline_stop(struct media_entity *entity); | 343 | media_entity_pipeline_stop(struct media_entity *entity); |
| @@ -351,3 +354,19 @@ If other operations need to be disallowed on streaming entities (such as · 10 unmodified lines | |||
| 351 | changing entities configuration parameters) drivers can explicitly check the | 354 | changing entities configuration parameters) drivers can explicitly check the |
| 352 | media_entity stream_count field to find out if an entity is streaming. This | 355 | media_entity stream_count field to find out if an entity is streaming. This |
| 353 | operation must be done with the media_device graph_mutex held. | 356 | operation must be done with the media_device graph_mutex held. |
| 357 | |||
| 358 | |||
| 359 | Link validation | ||
| 360 | --------------- | ||
| 361 | |||
| 362 | Link validation is performed by media_entity_pipeline_start() for any | ||
| 363 | entity which has sink pads in the pipeline. The | ||
| 364 | media_entity::link_validate() callback is used for that purpose. In | ||
| 365 | link_validate() callback, entity driver should check that the properties of | ||
| 366 | the source pad of the connected entity and its own sink pad match. It is up | ||
| 367 | to the type of the entity (and in the end, the properties of the hardware) | ||
| 368 | what matching actually means. | ||
| 369 | |||
| 370 | Subsystems should facilitate link validation by providing subsystem specific | ||
| 371 | helper functions to provide easy access for commonly needed information, and | ||
| 372 | in the end provide a way to use driver-specific callbacks. | ||
| @@ -0,0 +1,57 @@ | |||
| 1 | TI EMIF SDRAM Controller Driver: | ||
| 2 | |||
| 3 | Author | ||
| 4 | ======== | ||
| 5 | Aneesh V <aneesh@ti.com> | ||
| 6 | |||
| 7 | Location | ||
| 8 | ============ | ||
| 9 | driver/memory/emif.c | ||
| 10 | |||
| 11 | Supported SoCs: | ||
| 12 | =================== | ||
| 13 | TI OMAP44xx | ||
| 14 | TI OMAP54xx | ||
| 15 | |||
| 16 | Menuconfig option: | ||
| 17 | ========================== | ||
| 18 | Device Drivers | ||
| 19 | Memory devices | ||
| 20 | Texas Instruments EMIF driver | ||
| 21 | |||
| 22 | Description | ||
| 23 | =========== | ||
| 24 | This driver is for the EMIF module available in Texas Instruments | ||
| 25 | SoCs. EMIF is an SDRAM controller that, based on its revision, | ||
| 26 | supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols. | ||
| 27 | This driver takes care of only LPDDR2 memories presently. The | ||
| 28 | functions of the driver includes re-configuring AC timing | ||
| 29 | parameters and other settings during frequency, voltage and | ||
| 30 | temperature changes | ||
| 31 | |||
| 32 | Platform Data (see include/linux/platform_data/emif_plat.h): | ||
| 33 | ===================================================================== | ||
| 34 | DDR device details and other board dependent and SoC dependent | ||
| 35 | information can be passed through platform data (struct emif_platform_data) | ||
| 36 | - DDR device details: 'struct ddr_device_info' | ||
| 37 | - Device AC timings: 'struct lpddr2_timings' and 'struct lpddr2_min_tck' | ||
| 38 | - Custom configurations: customizable policy options through | ||
| 39 | 'struct emif_custom_configs' | ||
| 40 | - IP revision | ||
| 41 | - PHY type | ||
| 42 | |||
| 43 | Interface to the external world: | ||
| 44 | ================================ | ||
| 45 | EMIF driver registers notifiers for voltage and frequency changes | ||
| 46 | affecting EMIF and takes appropriate actions when these are invoked. | ||
| 47 | - freq_pre_notify_handling() | ||
| 48 | - freq_post_notify_handling() | ||
| 49 | - volt_notify_handling() | ||
| 50 | |||
| 51 | Debugfs | ||
| 52 | ======== | ||
| 53 | The driver creates two debugfs entries per device. | ||
| 54 | - regcache_dump : dump of register values calculated and saved for all | ||
| 55 | frequencies used so far. | ||
| 56 | - mr4 : last polled value of MR4 register in the LPDDR2 device. MR4 | ||
| 57 | indicates the current temperature level of the device. | ||
| @@ -341,7 +341,7 @@ Need more implementation yet.... · 340 unmodified lines | |||
| 341 | -------------------------------- | 341 | -------------------------------- |
| 342 | 8. Memory hotplug event notifier | 342 | 8. Memory hotplug event notifier |
| 343 | -------------------------------- | 343 | -------------------------------- |
| 344 | Memory hotplug has event notifer. There are 6 types of notification. | 344 | Memory hotplug has event notifier. There are 6 types of notification. |
| 345 | 345 | ||
| 346 | MEMORY_GOING_ONLINE | 346 | MEMORY_GOING_ONLINE |
| 347 | Generated before new memory becomes available in order to be able to | 347 | Generated before new memory becomes available in order to be able to |
| @@ -0,0 +1 @@ | |||
| 1 | mei-amt-version | ||
| @@ -0,0 +1,8 @@ | |||
| 1 | # kbuild trick to avoid linker error. Can be omitted if a module is built. | ||
| 2 | obj- := dummy.o | ||
| 3 | |||
| 4 | # List of programs to build | ||
| 5 | hostprogs-y := mei-amt-version | ||
| 6 | HOSTCFLAGS_mei-amt-version.o += -I$(objtree)/usr/include | ||
| 7 | # Tell kbuild to always build the programs | ||
| 8 | always := $(hostprogs-y) | ||
| @@ -0,0 +1,2 @@ | |||
| 1 | TODO: | ||
| 2 | - Cleanup and split the timer function | ||
| @@ -74,7 +74,7 @@ · 73 unmodified lines | |||
| 74 | #include <stdint.h> | 74 | #include <stdint.h> |
| 75 | #include <stdbool.h> | 75 | #include <stdbool.h> |
| 76 | #include <bits/wordsize.h> | 76 | #include <bits/wordsize.h> |
| 77 | #include "mei.h" | 77 | #include <linux/mei.h> |
| 78 | 78 | ||
| 79 | /***************************************************************************** | 79 | /***************************************************************************** |
| 80 | * Intel Management Engine Interface | 80 | * Intel Management Engine Interface |
File renamed without changes.
| @@ -1,7 +1,5 @@ | |||
| 1 | 00-INDEX | 1 | 00-INDEX |
| 2 | - this file | 2 | - this file |
| 3 | 3c359.txt | ||
| 4 | - information on the 3Com TokenLink Velocity XL (3c5359) driver. | ||
| 5 | 3c505.txt | 3 | 3c505.txt |
| 6 | - information on the 3Com EtherLink Plus (3c505) driver. | 4 | - information on the 3Com EtherLink Plus (3c505) driver. |
| 7 | 3c509.txt | 5 | 3c509.txt |
| @@ -142,8 +140,6 @@ netif-msg.txt · 134 unmodified lines | |||
| 142 | - Design of the network interface message level setting (NETIF_MSG_*). | 140 | - Design of the network interface message level setting (NETIF_MSG_*). |
| 143 | nfc.txt | 141 | nfc.txt |
| 144 | - The Linux Near Field Communication (NFS) subsystem. | 142 | - The Linux Near Field Communication (NFS) subsystem. |
| 145 | olympic.txt | ||
| 146 | - IBM PCI Pit/Pit-Phy/Olympic Token Ring driver info. | ||
| 147 | openvswitch.txt | 143 | openvswitch.txt |
| 148 | - Open vSwitch developer documentation. | 144 | - Open vSwitch developer documentation. |
| 149 | operstates.txt | 145 | operstates.txt |
| @@ -184,8 +180,6 @@ skfp.txt · 34 unmodified lines | |||
| 184 | - SysKonnect FDDI (SK-5xxx, Compaq Netelligent) driver info. | 180 | - SysKonnect FDDI (SK-5xxx, Compaq Netelligent) driver info. |
| 185 | smc9.txt | 181 | smc9.txt |
| 186 | - the driver for SMC's 9000 series of Ethernet cards | 182 | - the driver for SMC's 9000 series of Ethernet cards |
| 187 | smctr.txt | ||
| 188 | - SMC TokenCard TokenRing Linux driver info. | ||
| 189 | spider-net.txt | 183 | spider-net.txt |
| 190 | - README for the Spidernet Driver (as found in PS3 / Cell BE). | 184 | - README for the Spidernet Driver (as found in PS3 / Cell BE). |
| 191 | stmmac.txt | 185 | stmmac.txt |
| @@ -200,8 +194,6 @@ tcp-thin.txt · 8 unmodified lines | |||
| 200 | - kernel tuning options for low rate 'thin' TCP streams. | 194 | - kernel tuning options for low rate 'thin' TCP streams. |
| 201 | tlan.txt | 195 | tlan.txt |
| 202 | - ThunderLAN (Compaq Netelligent 10/100, Olicom OC-2xxx) driver info. | 196 | - ThunderLAN (Compaq Netelligent 10/100, Olicom OC-2xxx) driver info. |
| 203 | tms380tr.txt | ||
| 204 | - SysKonnect Token Ring ISA/PCI adapter driver info. | ||
| 205 | tproxy.txt | 197 | tproxy.txt |
| 206 | - Transparent proxy support user guide. | 198 | - Transparent proxy support user guide. |
| 207 | tuntap.txt | 199 | tuntap.txt |
| @@ -1,58 +0,0 @@ | |||
| 1 | |||
| 2 | 3COM PCI TOKEN LINK VELOCITY XL TOKEN RING CARDS README | ||
| 3 | |||
| 4 | Release 0.9.0 - Release | ||
| 5 | Jul 17th 2000 Mike Phillips | ||
| 6 | |||
| 7 | 1.2.0 - Final | ||
| 8 | Feb 17th 2002 Mike Phillips | ||
| 9 | Updated for submission to the 2.4.x kernel. | ||
| 10 | |||
| 11 | Thanks: | ||
| 12 | Terry Murphy from 3Com for tech docs and support, | ||
| 13 | Adam D. Ligas for testing the driver. | ||
| 14 | |||
| 15 | Note: | ||
| 16 | This driver will NOT work with the 3C339 Token Ring cards, you need | ||
| 17 | to use the tms380 driver instead. | ||
| 18 | |||
| 19 | Options: | ||
| 20 | |||
| 21 | The driver accepts three options: ringspeed, pkt_buf_sz and message_level. | ||
| 22 | |||
| 23 | These options can be specified differently for each card found. | ||
| 24 | |||
| 25 | ringspeed: Has one of three settings 0 (default), 4 or 16. 0 will | ||
| 26 | make the card autosense the ringspeed and join at the appropriate speed, | ||
| 27 | this will be the default option for most people. 4 or 16 allow you to | ||
| 28 | explicitly force the card to operate at a certain speed. The card will fail | ||
| 29 | if you try to insert it at the wrong speed. (Although some hubs will allow | ||
| 30 | this so be *very* careful). The main purpose for explicitly setting the ring | ||
| 31 | speed is for when the card is first on the ring. In autosense mode, if the card | ||
| 32 | cannot detect any active monitors on the ring it will open at the same speed as | ||
| 33 | its last opening. This can be hazardous if this speed does not match the speed | ||
| 34 | you want the ring to operate at. | ||
| 35 | |||
| 36 | pkt_buf_sz: This is this initial receive buffer allocation size. This will | ||
| 37 | default to 4096 if no value is entered. You may increase performance of the | ||
| 38 | driver by setting this to a value larger than the network packet size, although | ||
| 39 | the driver now re-sizes buffers based on MTU settings as well. | ||
| 40 | |||
| 41 | message_level: Controls level of messages created by the driver. Defaults to 0: | ||
| 42 | which only displays start-up and critical messages. Presently any non-zero | ||
| 43 | value will display all soft messages as well. NB This does not turn | ||
| 44 | debugging messages on, that must be done by modified the source code. | ||
| 45 | |||
| 46 | Variable MTU size: | ||
| 47 | |||
| 48 | The driver can handle a MTU size up to either 4500 or 18000 depending upon | ||
| 49 | ring speed. The driver also changes the size of the receive buffers as part | ||
| 50 | of the mtu re-sizing, so if you set mtu = 18000, you will need to be able | ||
| 51 | to allocate 16 * (sk_buff with 18000 buffer size) call it 18500 bytes per ring | ||
| 52 | position = 296,000 bytes of memory space, plus of course anything | ||
| 53 | necessary for the tx sk_buff's. Remember this is per card, so if you are | ||
| 54 | building routers, gateway's etc, you could start to use a lot of memory | ||
| 55 | real fast. | ||
| 56 | |||
| 57 | 2/17/02 Mike Phillips | ||
| 58 | |||
| @@ -25,7 +25,6 @@ models: · 24 unmodified lines | |||
| 25 | 3c509B (later revision of the ISA card; supports full-duplex) | 25 | 3c509B (later revision of the ISA card; supports full-duplex) |
| 26 | 3c589 (PCMCIA) | 26 | 3c589 (PCMCIA) |
| 27 | 3c589B (later revision of the 3c589; supports full-duplex) | 27 | 3c589B (later revision of the 3c589; supports full-duplex) |
| 28 | 3c529 (MCA) | ||
| 29 | 3c579 (EISA) | 28 | 3c579 (EISA) |
| 30 | 29 | ||
| 31 | Large portions of this documentation were heavily borrowed from the guide | 30 | Large portions of this documentation were heavily borrowed from the guide |
| @@ -1,5 +1,3 @@ | |||
| 1 | [state: 21-08-2011] | ||
| 2 | |||
| 3 | BATMAN-ADV | 1 | BATMAN-ADV |
| 4 | ---------- | 2 | ---------- |
| 5 | 3 | ||
| @@ -67,18 +65,19 @@ To deactivate an interface you have to write "none" into its · 61 unmodified lines | |||
| 67 | All mesh wide settings can be found in batman's own interface | 65 | All mesh wide settings can be found in batman's own interface |
| 68 | folder: | 66 | folder: |
| 69 | 67 | ||
| 70 | # ls /sys/class/net/bat0/mesh/ | 68 | # ls /sys/class/net/bat0/mesh/ |
| 71 | # aggregated_ogms fragmentation gw_sel_class vis_mode | 69 | # aggregated_ogms gw_bandwidth log_level |
| 72 | # ap_isolation gw_bandwidth hop_penalty | 70 | # ap_isolation gw_mode orig_interval |
| 73 | # bonding gw_mode orig_interval | 71 | # bonding gw_sel_class routing_algo |
| 72 | # bridge_loop_avoidance hop_penalty vis_mode | ||
| 73 | # fragmentation | ||
| 74 | 74 | ||
| 75 | 75 | ||
| 76 | There is a special folder for debugging information: | 76 | There is a special folder for debugging information: |
| 77 | 77 | ||
| 78 | # ls /sys/kernel/debug/batman_adv/bat0/ | 78 | # ls /sys/kernel/debug/batman_adv/bat0/ |
| 79 | # gateways socket transtable_global vis_data | 79 | # bla_claim_table log socket transtable_local |
| 80 | # originators softif_neigh transtable_local | 80 | # gateways originators transtable_global vis_data |
| 81 | |||
| 82 | 81 | ||
| 83 | Some of the files contain all sort of status information regard- | 82 | Some of the files contain all sort of status information regard- |
| 84 | ing the mesh network. For example, you can view the table of | 83 | ing the mesh network. For example, you can view the table of |
| @@ -202,12 +201,13 @@ abled during run time. Following log_levels are defined: · 117 unmodified lines | |||
| 202 | 1 - Enable messages related to routing / flooding / broadcasting | 201 | 1 - Enable messages related to routing / flooding / broadcasting |
| 203 | 2 - Enable messages related to route added / changed / deleted | 202 | 2 - Enable messages related to route added / changed / deleted |
| 204 | 4 - Enable messages related to translation table operations | 203 | 4 - Enable messages related to translation table operations |
| 205 | 7 - Enable all messages | 204 | 8 - Enable messages related to bridge loop avoidance |
| 205 | 15 - enable all messages | ||
| 206 | 206 | ||
| 207 | The debug output can be changed at runtime using the file | 207 | The debug output can be changed at runtime using the file |
| 208 | /sys/class/net/bat0/mesh/log_level. e.g. | 208 | /sys/class/net/bat0/mesh/log_level. e.g. |
| 209 | 209 | ||
| 210 | # echo 2 > /sys/class/net/bat0/mesh/log_level | 210 | # echo 6 > /sys/class/net/bat0/mesh/log_level |
| 211 | 211 | ||
| 212 | will enable debug messages for when routes change. | 212 | will enable debug messages for when routes change. |
| 213 | 213 | ||
| @@ -649,7 +649,7 @@ solution for a couple of reasons: · 648 unmodified lines | |||
| 649 | The CAN device must be configured via netlink interface. The supported | 649 | The CAN device must be configured via netlink interface. The supported |
| 650 | netlink message types are defined and briefly described in | 650 | netlink message types are defined and briefly described in |
| 651 | "include/linux/can/netlink.h". CAN link support for the program "ip" | 651 | "include/linux/can/netlink.h". CAN link support for the program "ip" |
| 652 | of the IPROUTE2 utility suite is avaiable and it can be used as shown | 652 | of the IPROUTE2 utility suite is available and it can be used as shown |
| 653 | below: | 653 | below: |
| 654 | 654 | ||
| 655 | - Setting CAN device properties: | 655 | - Setting CAN device properties: |
| @@ -11,12 +11,10 @@ i386, alpha (untested), powerpc, sparc and sparc64 archs. · 10 unmodified lines | |||
| 11 | 11 | ||
| 12 | The intent is to enable the use of different models of FORE adapters at the | 12 | The intent is to enable the use of different models of FORE adapters at the |
| 13 | same time, by hosts that have several bus interfaces (such as PCI+SBUS, | 13 | same time, by hosts that have several bus interfaces (such as PCI+SBUS, |
| 14 | PCI+MCA or PCI+EISA). | 14 | or PCI+EISA). |
| 15 | 15 | ||
| 16 | Only PCI and SBUS devices are currently supported by the driver, but support | 16 | Only PCI and SBUS devices are currently supported by the driver, but support |
| 17 | for other bus interfaces such as EISA should not be too hard to add (this may | 17 | for other bus interfaces such as EISA should not be too hard to add. |
| 18 | be more tricky for the MCA bus, though, as FORE made some MCA-specific | ||
| 19 | modifications to the adapter's AALI interface). | ||
| 20 | 18 | ||
| 21 | 19 | ||
| 22 | Firmware Copyright Notice | 20 | Firmware Copyright Notice |
| @@ -4,15 +4,22 @@ · 3 unmodified lines | |||
| 4 | 4 | ||
| 5 | Introduction | 5 | Introduction |
| 6 | ============ | 6 | ============ |
| 7 | The IEEE 802.15.4 working group focuses on standartization of bottom | ||
| 8 | two layers: Medium Accsess Control (MAC) and Physical (PHY). And there | ||
| 9 | are mainly two options available for upper layers: | ||
| 10 | - ZigBee - proprietary protocol from ZigBee Alliance | ||
| 11 | - 6LowPAN - IPv6 networking over low rate personal area networks | ||
| 7 | 12 | ||
| 8 | The Linux-ZigBee project goal is to provide complete implementation | 13 | The Linux-ZigBee project goal is to provide complete implementation |
| 9 | of IEEE 802.15.4 / ZigBee / 6LoWPAN protocols. IEEE 802.15.4 is a stack | 14 | of IEEE 802.15.4 and 6LoWPAN protocols. IEEE 802.15.4 is a stack |
| 10 | of protocols for organizing Low-Rate Wireless Personal Area Networks. | 15 | of protocols for organizing Low-Rate Wireless Personal Area Networks. |
| 11 | 16 | ||
| 12 | Currently only IEEE 802.15.4 layer is implemented. We have chosen | 17 | The stack is composed of three main parts: |
| 13 | to use plain Berkeley socket API, the generic Linux networking stack | 18 | - IEEE 802.15.4 layer; We have chosen to use plain Berkeley socket API, |
| 14 | to transfer IEEE 802.15.4 messages and a special protocol over genetlink | 19 | the generic Linux networking stack to transfer IEEE 802.15.4 messages |
| 15 | for configuration/management | 20 | and a special protocol over genetlink for configuration/management |
| 21 | - MAC - provides access to shared channel and reliable data delivery | ||
| 22 | - PHY - represents device drivers | ||
| 16 | 23 | ||
| 17 | 24 | ||
| 18 | Socket API | 25 | Socket API |
| @@ -29,15 +36,6 @@ or git tree at git://linux-zigbee.git.sourceforge.net/gitroot/linux-zigbee). · 10 unmodified lines | |||
| 29 | One can use SOCK_RAW for passing raw data towards device xmit function. YMMV. | 36 | One can use SOCK_RAW for passing raw data towards device xmit function. YMMV. |
| 30 | 37 | ||
| 31 | 38 | ||
| 32 | MLME - MAC Level Management | ||
| 33 | ============================ | ||
| 34 | |||
| 35 | Most of IEEE 802.15.4 MLME interfaces are directly mapped on netlink commands. | ||
| 36 | See the include/net/nl802154.h header. Our userspace tools package | ||
| 37 | (see above) provides CLI configuration utility for radio interfaces and simple | ||
| 38 | coordinator for IEEE 802.15.4 networks as an example users of MLME protocol. | ||
| 39 | |||
| 40 | |||
| 41 | Kernel side | 39 | Kernel side |
| 42 | ============= | 40 | ============= |
| 43 | 41 | ||
| @@ -51,6 +49,15 @@ Like with WiFi, there are several types of devices implementing IEEE 802.15.4. · 7 unmodified lines | |||
| 51 | Those types of devices require different approach to be hooked into Linux kernel. | 49 | Those types of devices require different approach to be hooked into Linux kernel. |
| 52 | 50 | ||
| 53 | 51 | ||
| 52 | MLME - MAC Level Management | ||
| 53 | ============================ | ||
| 54 | |||
| 55 | Most of IEEE 802.15.4 MLME interfaces are directly mapped on netlink commands. | ||
| 56 | See the include/net/nl802154.h header. Our userspace tools package | ||
| 57 | (see above) provides CLI configuration utility for radio interfaces and simple | ||
| 58 | coordinator for IEEE 802.15.4 networks as an example users of MLME protocol. | ||
| 59 | |||
| 60 | |||
| 54 | HardMAC | 61 | HardMAC |
| 55 | ======= | 62 | ======= |
| 56 | 63 | ||
| @@ -73,11 +80,47 @@ We provide an example of simple HardMAC driver at drivers/ieee802154/fakehard.c · 16 unmodified lines | |||
| 73 | SoftMAC | 80 | SoftMAC |
| 74 | ======= | 81 | ======= |
| 75 | 82 | ||
| 76 | We are going to provide intermediate layer implementing IEEE 802.15.4 MAC | 83 | The MAC is the middle layer in the IEEE 802.15.4 Linux stack. This moment it |
| 77 | in software. This is currently WIP. | 84 | provides interface for drivers registration and management of slave interfaces. |
| 85 | |||
| 86 | NOTE: Currently the only monitor device type is supported - it's IEEE 802.15.4 | ||
| 87 | stack interface for network sniffers (e.g. WireShark). | ||
| 88 | |||
| 89 | This layer is going to be extended soon. | ||
| 78 | 90 | ||
| 79 | See header include/net/mac802154.h and several drivers in drivers/ieee802154/. | 91 | See header include/net/mac802154.h and several drivers in drivers/ieee802154/. |
| 80 | 92 | ||
| 93 | |||
| 94 | Device drivers API | ||
| 95 | ================== | ||
| 96 | |||
| 97 | The include/net/mac802154.h defines following functions: | ||
| 98 | - struct ieee802154_dev *ieee802154_alloc_device | ||
| 99 | (size_t priv_size, struct ieee802154_ops *ops): | ||
| 100 | allocation of IEEE 802.15.4 compatible device | ||
| 101 | |||
| 102 | - void ieee802154_free_device(struct ieee802154_dev *dev): | ||
| 103 | freeing allocated device | ||
| 104 | |||
| 105 | - int ieee802154_register_device(struct ieee802154_dev *dev): | ||
| 106 | register PHY in the system | ||
| 107 | |||
| 108 | - void ieee802154_unregister_device(struct ieee802154_dev *dev): | ||
| 109 | freeing registered PHY | ||
| 110 | |||
| 111 | Moreover IEEE 802.15.4 device operations structure should be filled. | ||
| 112 | |||
| 113 | Fake drivers | ||
| 114 | ============ | ||
| 115 | |||
| 116 | In addition there are two drivers available which simulate real devices with | ||
| 117 | HardMAC (fakehard) and SoftMAC (fakelb - IEEE 802.15.4 loopback driver) | ||
| 118 | interfaces. This option provides possibility to test and debug stack without | ||
| 119 | usage of real hardware. | ||
| 120 | |||
| 121 | See sources in drivers/ieee802154 folder for more details. | ||
| 122 | |||
| 123 | |||
| 81 | 6LoWPAN Linux implementation | 124 | 6LoWPAN Linux implementation |
| 82 | ============================ | 125 | ============================ |
| 83 | 126 | ||
| @@ -190,6 +190,20 @@ tcp_cookie_size - INTEGER · 189 unmodified lines | |||
| 190 | tcp_dsack - BOOLEAN | 190 | tcp_dsack - BOOLEAN |
| 191 | Allows TCP to send "duplicate" SACKs. | 191 | Allows TCP to send "duplicate" SACKs. |
| 192 | 192 | ||
| 193 | tcp_early_retrans - INTEGER | ||
| 194 | Enable Early Retransmit (ER), per RFC 5827. ER lowers the threshold | ||
| 195 | for triggering fast retransmit when the amount of outstanding data is | ||
| 196 | small and when no previously unsent data can be transmitted (such | ||
| 197 | that limited transmit could be used). | ||
| 198 | Possible values: | ||
| 199 | 0 disables ER | ||
| 200 | 1 enables ER | ||
| 201 | 2 enables ER but delays fast recovery and fast retransmit | ||
| 202 | by a fourth of RTT. This mitigates connection falsely | ||
| 203 | recovers when network has a small degree of reordering | ||
| 204 | (less than 3 packets). | ||
| 205 | Default: 2 | ||
| 206 | |||
| 193 | tcp_ecn - INTEGER | 207 | tcp_ecn - INTEGER |
| 194 | Enable Explicit Congestion Notification (ECN) in TCP. ECN is only | 208 | Enable Explicit Congestion Notification (ECN) in TCP. ECN is only |
| 195 | used when both ends of the TCP flow support it. It is useful to | 209 | used when both ends of the TCP flow support it. It is useful to |
| @@ -1287,13 +1301,22 @@ bridge-nf-call-ip6tables - BOOLEAN · 1091 unmodified lines | |||
| 1287 | bridge-nf-filter-vlan-tagged - BOOLEAN | 1301 | bridge-nf-filter-vlan-tagged - BOOLEAN |
| 1288 | 1 : pass bridged vlan-tagged ARP/IP/IPv6 traffic to {arp,ip,ip6}tables. | 1302 | 1 : pass bridged vlan-tagged ARP/IP/IPv6 traffic to {arp,ip,ip6}tables. |
| 1289 | 0 : disable this. | 1303 | 0 : disable this. |
| 1290 | Default: 1 | 1304 | Default: 0 |
| 1291 | 1305 | ||
| 1292 | bridge-nf-filter-pppoe-tagged - BOOLEAN | 1306 | bridge-nf-filter-pppoe-tagged - BOOLEAN |
| 1293 | 1 : pass bridged pppoe-tagged IP/IPv6 traffic to {ip,ip6}tables. | 1307 | 1 : pass bridged pppoe-tagged IP/IPv6 traffic to {ip,ip6}tables. |
| 1294 | 0 : disable this. | 1308 | 0 : disable this. |
| 1295 | Default: 1 | 1309 | Default: 0 |
| 1296 | 1310 | ||
| 1311 | bridge-nf-pass-vlan-input-dev - BOOLEAN | ||
| 1312 | 1: if bridge-nf-filter-vlan-tagged is enabled, try to find a vlan | ||
| 1313 | interface on the bridge and set the netfilter input device to the vlan. | ||
| 1314 | This allows use of e.g. "iptables -i br0.1" and makes the REDIRECT | ||
| 1315 | target work with vlan-on-top-of-bridge interfaces. When no matching | ||
| 1316 | vlan interface is found, or this switch is off, the input device is | ||
| 1317 | set to the bridge interface. | ||
| 1318 | 0: disable bridge netfilter vlan interface lookup. | ||
| 1319 | Default: 0 | ||
| 1297 | 1320 | ||
| 1298 | proc/sys/net/sctp/* Variables: | 1321 | proc/sys/net/sctp/* Variables: |
| 1299 | 1322 | ||
| @@ -1484,11 +1507,8 @@ addr_scope_policy - INTEGER · 184 unmodified lines | |||
| 1484 | 1507 | ||
| 1485 | 1508 | ||
| 1486 | /proc/sys/net/core/* | 1509 | /proc/sys/net/core/* |
| 1487 | dev_weight - INTEGER | 1510 | Please see: Documentation/sysctl/net.txt for descriptions of these entries. |
| 1488 | The maximum number of packets that kernel can handle on a NAPI | ||
| 1489 | interrupt, it's a Per-CPU variable. | ||
| 1490 | 1511 | ||
| 1491 | Default: 64 | ||
| 1492 | 1512 | ||
| 1493 | /proc/sys/net/unix/* | 1513 | /proc/sys/net/unix/* |
| 1494 | max_dgram_qlen - INTEGER | 1514 | max_dgram_qlen - INTEGER |
| @@ -23,7 +23,7 @@ BA session stop & deauth/disassoc frames · 22 unmodified lines | |||
| 23 | end note | 23 | end note |
| 24 | end | 24 | end |
| 25 | 25 | ||
| 26 | mac80211->driver: config(channel, non-HT) | 26 | mac80211->driver: config(channel, channel type) |
| 27 | mac80211->driver: bss_info_changed(set BSSID, basic rate bitmap) | 27 | mac80211->driver: bss_info_changed(set BSSID, basic rate bitmap) |
| 28 | mac80211->driver: sta_state(AP, exists) | 28 | mac80211->driver: sta_state(AP, exists) |
| 29 | 29 | ||
| @@ -51,7 +51,7 @@ note over mac80211,driver: cleanup like for authenticate · 21 unmodified lines | |||
| 51 | end | 51 | end |
| 52 | 52 | ||
| 53 | alt not previously authenticated (FT) | 53 | alt not previously authenticated (FT) |
| 54 | mac80211->driver: config(channel, non-HT) | 54 | mac80211->driver: config(channel, channel type) |
| 55 | mac80211->driver: bss_info_changed(set BSSID, basic rate bitmap) | 55 | mac80211->driver: bss_info_changed(set BSSID, basic rate bitmap) |
| 56 | mac80211->driver: sta_state(AP, exists) | 56 | mac80211->driver: sta_state(AP, exists) |
| 57 | mac80211->driver: sta_state(AP, authenticated) | 57 | mac80211->driver: sta_state(AP, authenticated) |
| @@ -67,10 +67,6 @@ end · 9 unmodified lines | |||
| 67 | 67 | ||
| 68 | mac80211->driver: set up QoS parameters | 68 | mac80211->driver: set up QoS parameters |
| 69 | 69 | ||
| 70 | alt is HT channel | ||
| 71 | mac80211->driver: config(channel, HT params) | ||
| 72 | end | ||
| 73 | |||
| 74 | mac80211->driver: bss_info_changed(QoS, HT, associated with AID) | 70 | mac80211->driver: bss_info_changed(QoS, HT, associated with AID) |
| 75 | mac80211->userspace: associated | 71 | mac80211->userspace: associated |
| 76 | 72 | ||
| @@ -95,5 +91,5 @@ mac80211->driver: sta_state(AP,exists) · 18 unmodified lines | |||
| 95 | mac80211->driver: sta_state(AP,not-exists) | 91 | mac80211->driver: sta_state(AP,not-exists) |
| 96 | mac80211->driver: turn off powersave | 92 | mac80211->driver: turn off powersave |
| 97 | mac80211->driver: bss_info_changed(clear BSSID, not associated, no QoS, ...) | 93 | mac80211->driver: bss_info_changed(clear BSSID, not associated, no QoS, ...) |
| 98 | mac80211->driver: config(non-HT channel type) | 94 | mac80211->driver: config(channel type to non-HT) |
| 99 | mac80211->userspace: disconnected | 95 | mac80211->userspace: disconnected |
| @@ -1,79 +0,0 @@ | |||
| 1 | |||
| 2 | IBM PCI Pit/Pit-Phy/Olympic CHIPSET BASED TOKEN RING CARDS README | ||
| 3 | |||
| 4 | Release 0.2.0 - Release | ||
| 5 | June 8th 1999 Peter De Schrijver & Mike Phillips | ||
| 6 | Release 0.9.C - Release | ||
| 7 | April 18th 2001 Mike Phillips | ||
| 8 | |||
| 9 | Thanks: | ||
| 10 | Erik De Cock, Adrian Bridgett and Frank Fiene for their | ||
| 11 | patience and testing. | ||
| 12 | Donald Champion for the cardbus support | ||
| 13 | Kyle Lucke for the dma api changes. | ||
| 14 | Jonathon Bitner for hardware support. | ||
| 15 | Everybody on linux-tr for their continued support. | ||
| 16 | |||
| 17 | Options: | ||
| 18 | |||
| 19 | The driver accepts four options: ringspeed, pkt_buf_sz, | ||
| 20 | message_level and network_monitor. | ||
| 21 | |||
| 22 | These options can be specified differently for each card found. | ||
| 23 | |||
| 24 | ringspeed: Has one of three settings 0 (default), 4 or 16. 0 will | ||
| 25 | make the card autosense the ringspeed and join at the appropriate speed, | ||
| 26 | this will be the default option for most people. 4 or 16 allow you to | ||
| 27 | explicitly force the card to operate at a certain speed. The card will fail | ||
| 28 | if you try to insert it at the wrong speed. (Although some hubs will allow | ||
| 29 | this so be *very* careful). The main purpose for explicitly setting the ring | ||
| 30 | speed is for when the card is first on the ring. In autosense mode, if the card | ||
| 31 | cannot detect any active monitors on the ring it will not open, so you must | ||
| 32 | re-init the card at the appropriate speed. Unfortunately at present the only | ||
| 33 | way of doing this is rmmod and insmod which is a bit tough if it is compiled | ||
| 34 | in the kernel. | ||
| 35 | |||
| 36 | pkt_buf_sz: This is this initial receive buffer allocation size. This will | ||
| 37 | default to 4096 if no value is entered. You may increase performance of the | ||
| 38 | driver by setting this to a value larger than the network packet size, although | ||
| 39 | the driver now re-sizes buffers based on MTU settings as well. | ||
| 40 | |||
| 41 | message_level: Controls level of messages created by the driver. Defaults to 0: | ||
| 42 | which only displays start-up and critical messages. Presently any non-zero | ||
| 43 | value will display all soft messages as well. NB This does not turn | ||
| 44 | debugging messages on, that must be done by modified the source code. | ||
| 45 | |||
| 46 | network_monitor: Any non-zero value will provide a quasi network monitoring | ||
| 47 | mode. All unexpected MAC frames (beaconing etc.) will be received | ||
| 48 | by the driver and the source and destination addresses printed. | ||
| 49 | Also an entry will be added in /proc/net called olympic_tr%d, where tr%d | ||
| 50 | is the registered device name, i.e tr0, tr1, etc. This displays low | ||
| 51 | level information about the configuration of the ring and the adapter. | ||
| 52 | This feature has been designed for network administrators to assist in | ||
| 53 | the diagnosis of network / ring problems. (This used to OLYMPIC_NETWORK_MONITOR, | ||
| 54 | but has now changed to allow each adapter to be configured differently and | ||
| 55 | to alleviate the necessity to re-compile olympic to turn the option on). | ||
| 56 | |||
| 57 | Multi-card: | ||
| 58 | |||
| 59 | The driver will detect multiple cards and will work with shared interrupts, | ||
| 60 | each card is assigned the next token ring device, i.e. tr0 , tr1, tr2. The | ||
| 61 | driver should also happily reside in the system with other drivers. It has | ||
| 62 | been tested with ibmtr.c running, and I personally have had one Olicom PCI | ||
| 63 | card and two IBM olympic cards (all on the same interrupt), all running | ||
| 64 | together. | ||
| 65 | |||
| 66 | Variable MTU size: | ||
| 67 | |||
| 68 | The driver can handle a MTU size up to either 4500 or 18000 depending upon | ||
| 69 | ring speed. The driver also changes the size of the receive buffers as part | ||
| 70 | of the mtu re-sizing, so if you set mtu = 18000, you will need to be able | ||
| 71 | to allocate 16 * (sk_buff with 18000 buffer size) call it 18500 bytes per ring | ||
| 72 | position = 296,000 bytes of memory space, plus of course anything | ||
| 73 | necessary for the tx sk_buff's. Remember this is per card, so if you are | ||
| 74 | building routers, gateway's etc, you could start to use a lot of memory | ||
| 75 | real fast. | ||
| 76 | |||
| 77 | |||
| 78 | 6/8/99 Peter De Schrijver and Mike Phillips | ||
| 79 | |||
| @@ -1,66 +0,0 @@ | |||
| 1 | Text File for the SMC TokenCard TokenRing Linux driver (smctr.c). | ||
| 2 | By Jay Schulist <jschlst@samba.org> | ||
| 3 | |||
| 4 | The Linux SMC Token Ring driver works with the SMC TokenCard Elite (8115T) | ||
| 5 | ISA and SMC TokenCard Elite/A (8115T/A) MCA adapters. | ||
| 6 | |||
| 7 | Latest information on this driver can be obtained on the Linux-SNA WWW site. | ||
| 8 | Please point your browser to: http://www.linux-sna.org | ||
| 9 | |||
| 10 | This driver is rather simple to use. Select Y to Token Ring adapter support | ||
| 11 | in the kernel configuration. A choice for SMC Token Ring adapters will | ||
| 12 | appear. This drives supports all SMC ISA/MCA adapters. Choose this | ||
| 13 | option. I personally recommend compiling the driver as a module (M), but if you | ||
| 14 | you would like to compile it statically answer Y instead. | ||
| 15 | |||
| 16 | This driver supports multiple adapters without the need to load multiple copies | ||
| 17 | of the driver. You should be able to load up to 7 adapters without any kernel | ||
| 18 | modifications, if you are in need of more please contact the maintainer of this | ||
| 19 | driver. | ||
| 20 | |||
| 21 | Load the driver either by lilo/loadlin or as a module. When a module using the | ||
| 22 | following command will suffice for most: | ||
| 23 | |||
| 24 | # modprobe smctr | ||
| 25 | smctr.c: v1.00 12/6/99 by jschlst@samba.org | ||
| 26 | tr0: SMC TokenCard 8115T at Io 0x300, Irq 10, Rom 0xd8000, Ram 0xcc000. | ||
| 27 | |||
| 28 | Now just setup the device via ifconfig and set and routes you may have. After | ||
| 29 | this you are ready to start sending some tokens. | ||
| 30 | |||
| 31 | Errata: | ||
| 32 | 1). For anyone wondering where to pick up the SMC adapters please browse | ||
| 33 | to http://www.smc.com | ||
| 34 | |||
| 35 | 2). If you are the first/only Token Ring Client on a Token Ring LAN, please | ||
| 36 | specify the ringspeed with the ringspeed=[4/16] module option. If no | ||
| 37 | ringspeed is specified the driver will attempt to autodetect the ring | ||
| 38 | speed and/or if the adapter is the first/only station on the ring take | ||
| 39 | the appropriate actions. | ||
| 40 | |||
| 41 | NOTE: Default ring speed is 16MB UTP. | ||
| 42 | |||
| 43 | 3). PnP support for this adapter sucks. I recommend hard setting the | ||
| 44 | IO/MEM/IRQ by the jumpers on the adapter. If this is not possible | ||
| 45 | load the module with the following io=[ioaddr] mem=[mem_addr] | ||
| 46 | irq=[irq_num]. | ||
| 47 | |||
| 48 | The following IRQ, IO, and MEM settings are supported. | ||
| 49 | |||
| 50 | IO ports: | ||
| 51 | 0x200, 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x2E0, 0x300, | ||
| 52 | 0x320, 0x340, 0x360, 0x380. | ||
| 53 | |||
| 54 | IRQs: | ||
| 55 | 2, 3, 4, 5, 7, 8, 9, 10, 11, 12, 13, 14, 15 | ||
| 56 | |||
| 57 | Memory addresses: | ||
| 58 | 0xA0000, 0xA4000, 0xA8000, 0xAC000, 0xB0000, 0xB4000, | ||
| 59 | 0xB8000, 0xBC000, 0xC0000, 0xC4000, 0xC8000, 0xCC000, | ||
| 60 | 0xD0000, 0xD4000, 0xD8000, 0xDC000, 0xE0000, 0xE4000, | ||
| 61 | 0xE8000, 0xEC000, 0xF0000, 0xF4000, 0xF8000, 0xFC000 | ||
| 62 | |||
| 63 | This driver is under the GNU General Public License. Its Firmware image is | ||
| 64 | included as an initialized C-array and is licensed by SMC to the Linux | ||
| 65 | users of this driver. However no warranty about its fitness is expressed or | ||
| 66 | implied by SMC. | ||
| @@ -111,11 +111,12 @@ and detailed below as well: · 110 unmodified lines | |||
| 111 | int phy_addr; | 111 | int phy_addr; |
| 112 | int interface; | 112 | int interface; |
| 113 | struct stmmac_mdio_bus_data *mdio_bus_data; | 113 | struct stmmac_mdio_bus_data *mdio_bus_data; |
| 114 | int pbl; | 114 | struct stmmac_dma_cfg *dma_cfg; |
| 115 | int clk_csr; | 115 | int clk_csr; |
| 116 | int has_gmac; | 116 | int has_gmac; |
| 117 | int enh_desc; | 117 | int enh_desc; |
| 118 | int tx_coe; | 118 | int tx_coe; |
| 119 | int rx_coe; | ||
| 119 | int bugged_jumbo; | 120 | int bugged_jumbo; |
| 120 | int pmt; | 121 | int pmt; |
| 121 | int force_sf_dma_mode; | 122 | int force_sf_dma_mode; |
| @@ -136,10 +137,12 @@ Where: · 14 unmodified lines | |||
| 136 | o pbl: the Programmable Burst Length is maximum number of beats to | 137 | o pbl: the Programmable Burst Length is maximum number of beats to |
| 137 | be transferred in one DMA transaction. | 138 | be transferred in one DMA transaction. |
| 138 | GMAC also enables the 4xPBL by default. | 139 | GMAC also enables the 4xPBL by default. |
| 139 | o clk_csr: CSR Clock range selection. | 140 | o clk_csr: fixed CSR Clock range selection. |
| 140 | o has_gmac: uses the GMAC core. | 141 | o has_gmac: uses the GMAC core. |
| 141 | o enh_desc: if sets the MAC will use the enhanced descriptor structure. | 142 | o enh_desc: if sets the MAC will use the enhanced descriptor structure. |
| 142 | o tx_coe: core is able to perform the tx csum in HW. | 143 | o tx_coe: core is able to perform the tx csum in HW. |
| 144 | o rx_coe: the supports three check sum offloading engine types: | ||
| 145 | type_1, type_2 (full csum) and no RX coe. | ||
| 143 | o bugged_jumbo: some HWs are not able to perform the csum in HW for | 146 | o bugged_jumbo: some HWs are not able to perform the csum in HW for |
| 144 | over-sized frames due to limited buffer sizes. | 147 | over-sized frames due to limited buffer sizes. |
| 145 | Setting this flag the csum will be done in SW on | 148 | Setting this flag the csum will be done in SW on |
| @@ -160,7 +163,7 @@ Where: · 14 unmodified lines | |||
| 160 | o custom_cfg: this is a custom configuration that can be passed while | 163 | o custom_cfg: this is a custom configuration that can be passed while |
| 161 | initialising the resources. | 164 | initialising the resources. |
| 162 | 165 | ||
| 163 | The we have: | 166 | For MDIO bus The we have: |
| 164 | 167 | ||
| 165 | struct stmmac_mdio_bus_data { | 168 | struct stmmac_mdio_bus_data { |
| 166 | int bus_id; | 169 | int bus_id; |
| @@ -177,10 +180,28 @@ Where: · 10 unmodified lines | |||
| 177 | o irqs: list of IRQs, one per PHY. | 180 | o irqs: list of IRQs, one per PHY. |
| 178 | o probed_phy_irq: if irqs is NULL, use this for probed PHY. | 181 | o probed_phy_irq: if irqs is NULL, use this for probed PHY. |
| 179 | 182 | ||
| 183 | |||
| 184 | For DMA engine we have the following internal fields that should be | ||
| 185 | tuned according to the HW capabilities. | ||
| 186 | |||
| 187 | struct stmmac_dma_cfg { | ||
| 188 | int pbl; | ||
| 189 | int fixed_burst; | ||
| 190 | int burst_len_supported; | ||
| 191 | }; | ||
| 192 | |||
| 193 | Where: | ||
| 194 | o pbl: Programmable Burst Length | ||
| 195 | o fixed_burst: program the DMA to use the fixed burst mode | ||
| 196 | o burst_len: this is the value we put in the register | ||
| 197 | supported values are provided as macros in | ||
| 198 | linux/stmmac.h header file. | ||
| 199 | |||
| 200 | --- | ||
| 201 | |||
| 180 | Below an example how the structures above are using on ST platforms. | 202 | Below an example how the structures above are using on ST platforms. |
| 181 | 203 | ||
| 182 | static struct plat_stmmacenet_data stxYYY_ethernet_platform_data = { | 204 | static struct plat_stmmacenet_data stxYYY_ethernet_platform_data = { |
| 183 | .pbl = 32, | ||
| 184 | .has_gmac = 0, | 205 | .has_gmac = 0, |
| 185 | .enh_desc = 0, | 206 | .enh_desc = 0, |
| 186 | .fix_mac_speed = stxYYY_ethernet_fix_mac_speed, | 207 | .fix_mac_speed = stxYYY_ethernet_fix_mac_speed, |
| @@ -1,147 +0,0 @@ | |||
| 1 | Text file for the Linux SysKonnect Token Ring ISA/PCI Adapter Driver. | ||
| 2 | Text file by: Jay Schulist <jschlst@samba.org> | ||
| 3 | |||
| 4 | The Linux SysKonnect Token Ring driver works with the SysKonnect TR4/16(+) ISA, | ||
| 5 | SysKonnect TR4/16(+) PCI, SysKonnect TR4/16 PCI, and older revisions of the | ||
| 6 | SK NET TR4/16 ISA card. | ||
| 7 | |||
| 8 | Latest information on this driver can be obtained on the Linux-SNA WWW site. | ||
| 9 | Please point your browser to: | ||
| 10 | http://www.linux-sna.org | ||
| 11 | |||
| 12 | Many thanks to Christoph Goos for his excellent work on this driver and | ||
| 13 | SysKonnect for donating the adapters to Linux-SNA for the testing and | ||
| 14 | maintenance of this device driver. | ||
| 15 | |||
| 16 | Important information to be noted: | ||
| 17 | 1. Adapters can be slow to open (~20 secs) and close (~5 secs), please be | ||
| 18 | patient. | ||
| 19 | 2. This driver works very well when autoprobing for adapters. Why even | ||
| 20 | think about those nasty io/int/dma settings of modprobe when the driver | ||
| 21 | will do it all for you! | ||
| 22 | |||
| 23 | This driver is rather simple to use. Select Y to Token Ring adapter support | ||
| 24 | in the kernel configuration. A choice for SysKonnect Token Ring adapters will | ||
| 25 | appear. This drives supports all SysKonnect ISA and PCI adapters. Choose this | ||
| 26 | option. I personally recommend compiling the driver as a module (M), but if you | ||
| 27 | you would like to compile it statically answer Y instead. | ||
| 28 | |||
| 29 | This driver supports multiple adapters without the need to load multiple copies | ||
| 30 | of the driver. You should be able to load up to 7 adapters without any kernel | ||
| 31 | modifications, if you are in need of more please contact the maintainer of this | ||
| 32 | driver. | ||
| 33 | |||
| 34 | Load the driver either by lilo/loadlin or as a module. When a module using the | ||
| 35 | following command will suffice for most: | ||
| 36 | |||
| 37 | # modprobe sktr | ||
| 38 | |||
| 39 | This will produce output similar to the following: (Output is user specific) | ||
| 40 | |||
| 41 | sktr.c: v1.01 08/29/97 by Christoph Goos | ||
| 42 | tr0: SK NET TR 4/16 PCI found at 0x6100, using IRQ 17. | ||
| 43 | tr1: SK NET TR 4/16 PCI found at 0x6200, using IRQ 16. | ||
| 44 | tr2: SK NET TR 4/16 ISA found at 0xa20, using IRQ 10 and DMA 5. | ||
| 45 | |||
| 46 | Now just setup the device via ifconfig and set and routes you may have. After | ||
| 47 | this you are ready to start sending some tokens. | ||
| 48 | |||
| 49 | Errata: | ||
| 50 | For anyone wondering where to pick up the SysKonnect adapters please browse | ||
| 51 | to http://www.syskonnect.com | ||
| 52 | |||
| 53 | This driver is under the GNU General Public License. Its Firmware image is | ||
| 54 | included as an initialized C-array and is licensed by SysKonnect to the Linux | ||
| 55 | users of this driver. However no warranty about its fitness is expressed or | ||
| 56 | implied by SysKonnect. | ||
| 57 | |||
| 58 | Below find attached the setting for the SK NET TR 4/16 ISA adapters | ||
| 59 | ------------------------------------------------------------------- | ||
| 60 | |||
| 61 | *************************** | ||
| 62 | *** C O N T E N T S *** | ||
| 63 | *************************** | ||
| 64 | |||
| 65 | 1) Location of DIP-Switch W1 | ||
| 66 | 2) Default settings | ||
| 67 | 3) DIP-Switch W1 description | ||
| 68 | |||
| 69 | |||
| 70 | ============================================================== | ||
| 71 | CHAPTER 1 LOCATION OF DIP-SWITCH | ||
| 72 | ============================================================== | ||
| 73 | |||
| 74 | UÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ | ||
| 75 | þUÄÄÄÄÄÄ¿ UÄÄÄÄÄ¿ UÄÄÄ¿ þ | ||
| 76 | þAÄÄÄÄÄÄU W1 AÄÄÄÄÄU UÄÄÄÄ¿ þ þ þ | ||
| 77 | þUÄÄÄÄÄÄ¿ þ þ þ þ UÄÄÅ¿ | ||
| 78 | þAÄÄÄÄÄÄU UÄÄÄÄÄÄÄÄÄÄÄ¿ AÄÄÄÄU þ þ þ þþ | ||
| 79 | þUÄÄÄÄÄÄ¿ þ þ UÄÄÄ¿ AÄÄÄU AÄÄÅU | ||
| 80 | þAÄÄÄÄÄÄU þ TMS380C26 þ þ þ þ | ||
| 81 | þUÄÄÄÄÄÄ¿ þ þ AÄÄÄU AÄ¿ | ||
| 82 | þAÄÄÄÄÄÄU þ þ þ þ | ||
| 83 | þ AÄÄÄÄÄÄÄÄÄÄÄU þ þ | ||
| 84 | þ þ þ | ||
| 85 | þ AÄU | ||
| 86 | þ þ | ||
| 87 | þ þ | ||
| 88 | þ þ | ||
| 89 | þ þ | ||
| 90 | AÄÄÄÄÄÄÄÄÄÄÄÄAÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄAÄÄAÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄAÄÄÄÄÄÄÄÄÄU | ||
| 91 | AÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄU AÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄU | ||
| 92 | |||
| 93 | ============================================================== | ||
| 94 | CHAPTER 2 DEFAULT SETTINGS | ||
| 95 | ============================================================== | ||
| 96 | |||
| 97 | W1 1 2 3 4 5 6 7 8 | ||
| 98 | +------------------------------+ | ||
| 99 | | ON X | | ||
| 100 | | OFF X X X X X X X | | ||
| 101 | +------------------------------+ | ||
| 102 | |||
| 103 | W1.1 = ON Adapter drives address lines SA17..19 | ||
| 104 | W1.2 - 1.5 = OFF BootROM disabled | ||
| 105 | W1.6 - 1.8 = OFF I/O address 0A20h | ||
| 106 | |||
| 107 | ============================================================== | ||
| 108 | CHAPTER 3 DIP SWITCH W1 DESCRIPTION | ||
| 109 | ============================================================== | ||
| 110 | |||
| 111 | UÄÄÄAÄÄÄAÄÄÄAÄÄÄAÄÄÄAÄÄÄAÄÄÄAÄÄÄ¿ ON | ||
| 112 | þ 1 þ 2 þ 3 þ 4 þ 5 þ 6 þ 7 þ 8 þ | ||
| 113 | AÄÄÄAÄÄÄAÄÄÄAÄÄÄAÄÄÄAÄÄÄAÄÄÄAÄÄÄU OFF | ||
| 114 | |AD | BootROM Addr. | I/O | | ||
| 115 | +-+-+-------+-------+-----+-----+ | ||
| 116 | | | | | ||
| 117 | | | +------ 6 7 8 | ||
| 118 | | | ON ON ON 1900h | ||
| 119 | | | ON ON OFF 0900h | ||
| 120 | | | ON OFF ON 1980h | ||
| 121 | | | ON OFF OFF 0980h | ||
| 122 | | | OFF ON ON 1b20h | ||
| 123 | | | OFF ON OFF 0b20h | ||
| 124 | | | OFF OFF ON 1a20h | ||
| 125 | | | OFF OFF OFF 0a20h (+) | ||
| 126 | | | | ||
| 127 | | | | ||
| 128 | | +-------- 2 3 4 5 | ||
| 129 | | OFF x x x disabled (+) | ||
| 130 | | ON ON ON ON C0000 | ||
| 131 | | ON ON ON OFF C4000 | ||
| 132 | | ON ON OFF ON C8000 | ||
| 133 | | ON ON OFF OFF CC000 | ||
| 134 | | ON OFF ON ON D0000 | ||
| 135 | | ON OFF ON OFF D4000 | ||
| 136 | | ON OFF OFF ON D8000 | ||
| 137 | | ON OFF OFF OFF DC000 | ||
| 138 | | | ||
| 139 | | | ||
| 140 | +----- 1 | ||
| 141 | OFF adapter does NOT drive SA<17..19> | ||
| 142 | ON adapter drives SA<17..19> (+) | ||
| 143 | |||
| 144 | |||
| 145 | (+) means default setting | ||
| 146 | |||
| 147 | ******************************** | ||
| @@ -0,0 +1,180 @@ | |||
| 1 | HCI backend for NFC Core | ||
| 2 | |||
| 3 | Author: Eric Lapuyade, Samuel Ortiz | ||
| 4 | Contact: eric.lapuyade@intel.com, samuel.ortiz@intel.com | ||
| 5 | |||
| 6 | General | ||
| 7 | ------- | ||
| 8 | |||
| 9 | The HCI layer implements much of the ETSI TS 102 622 V10.2.0 specification. It | ||
| 10 | enables easy writing of HCI-based NFC drivers. The HCI layer runs as an NFC Core | ||
| 11 | backend, implementing an abstract nfc device and translating NFC Core API | ||
| 12 | to HCI commands and events. | ||
| 13 | |||
| 14 | HCI | ||
| 15 | --- | ||
| 16 | |||
| 17 | HCI registers as an nfc device with NFC Core. Requests coming from userspace are | ||
| 18 | routed through netlink sockets to NFC Core and then to HCI. From this point, | ||
| 19 | they are translated in a sequence of HCI commands sent to the HCI layer in the | ||
| 20 | host controller (the chip). The sending context blocks while waiting for the | ||
| 21 | response to arrive. | ||
| 22 | HCI events can also be received from the host controller. They will be handled | ||
| 23 | and a translation will be forwarded to NFC Core as needed. | ||
| 24 | HCI uses 2 execution contexts: | ||
| 25 | - one for executing commands : nfc_hci_msg_tx_work(). Only one command | ||
| 26 | can be executing at any given moment. | ||
| 27 | - one for dispatching received events and commands : nfc_hci_msg_rx_work(). | ||
| 28 | |||
| 29 | HCI Session initialization: | ||
| 30 | --------------------------- | ||
| 31 | |||
| 32 | The Session initialization is an HCI standard which must unfortunately | ||
| 33 | support proprietary gates. This is the reason why the driver will pass a list | ||
| 34 | of proprietary gates that must be part of the session. HCI will ensure all | ||
| 35 | those gates have pipes connected when the hci device is set up. | ||
| 36 | |||
| 37 | HCI Gates and Pipes | ||
| 38 | ------------------- | ||
| 39 | |||
| 40 | A gate defines the 'port' where some service can be found. In order to access | ||
| 41 | a service, one must create a pipe to that gate and open it. In this | ||
| 42 | implementation, pipes are totally hidden. The public API only knows gates. | ||
| 43 | This is consistent with the driver need to send commands to proprietary gates | ||
| 44 | without knowing the pipe connected to it. | ||
| 45 | |||
| 46 | Driver interface | ||
| 47 | ---------------- | ||
| 48 | |||
| 49 | A driver would normally register itself with HCI and provide the following | ||
| 50 | entry points: | ||
| 51 | |||
| 52 | struct nfc_hci_ops { | ||
| 53 | int (*open)(struct nfc_hci_dev *hdev); | ||
| 54 | void (*close)(struct nfc_hci_dev *hdev); | ||
| 55 | int (*hci_ready) (struct nfc_hci_dev *hdev); | ||
| 56 | int (*xmit)(struct nfc_hci_dev *hdev, struct sk_buff *skb); | ||
| 57 | int (*start_poll)(struct nfc_hci_dev *hdev, u32 protocols); | ||
| 58 | int (*target_from_gate)(struct nfc_hci_dev *hdev, u8 gate, | ||
| 59 | struct nfc_target *target); | ||
| 60 | int (*complete_target_discovered) (struct nfc_hci_dev *hdev, u8 gate, | ||
| 61 | struct nfc_target *target); | ||
| 62 | int (*data_exchange) (struct nfc_hci_dev *hdev, | ||
| 63 | struct nfc_target *target, | ||
| 64 | struct sk_buff *skb, struct sk_buff **res_skb); | ||
| 65 | int (*check_presence)(struct nfc_hci_dev *hdev, | ||
| 66 | struct nfc_target *target); | ||
| 67 | }; | ||
| 68 | |||
| 69 | - open() and close() shall turn the hardware on and off. | ||
| 70 | - hci_ready() is an optional entry point that is called right after the hci | ||
| 71 | session has been set up. The driver can use it to do additional initialization | ||
| 72 | that must be performed using HCI commands. | ||
| 73 | - xmit() shall simply write a frame to the chip. | ||
| 74 | - start_poll() is an optional entrypoint that shall set the hardware in polling | ||
| 75 | mode. This must be implemented only if the hardware uses proprietary gates or a | ||
| 76 | mechanism slightly different from the HCI standard. | ||
| 77 | - target_from_gate() is an optional entrypoint to return the nfc protocols | ||
| 78 | corresponding to a proprietary gate. | ||
| 79 | - complete_target_discovered() is an optional entry point to let the driver | ||
| 80 | perform additional proprietary processing necessary to auto activate the | ||
| 81 | discovered target. | ||
| 82 | - data_exchange() must be implemented by the driver if proprietary HCI commands | ||
| 83 | are required to send data to the tag. Some tag types will require custom | ||
| 84 | commands, others can be written to using the standard HCI commands. The driver | ||
| 85 | can check the tag type and either do proprietary processing, or return 1 to ask | ||
| 86 | for standard processing. | ||
| 87 | - check_presence() is an optional entry point that will be called regularly | ||
| 88 | by the core to check that an activated tag is still in the field. If this is | ||
| 89 | not implemented, the core will not be able to push tag_lost events to the user | ||
| 90 | space | ||
| 91 | |||
| 92 | On the rx path, the driver is responsible to push incoming HCP frames to HCI | ||
| 93 | using nfc_hci_recv_frame(). HCI will take care of re-aggregation and handling | ||
| 94 | This must be done from a context that can sleep. | ||
| 95 | |||
| 96 | SHDLC | ||
| 97 | ----- | ||
| 98 | |||
| 99 | Most chips use shdlc to ensure integrity and delivery ordering of the HCP | ||
| 100 | frames between the host controller (the chip) and hosts (entities connected | ||
| 101 | to the chip, like the cpu). In order to simplify writing the driver, an shdlc | ||
| 102 | layer is available for use by the driver. | ||
| 103 | When used, the driver actually registers with shdlc, and shdlc will register | ||
| 104 | with HCI. HCI sees shdlc as the driver and thus send its HCP frames | ||
| 105 | through shdlc->xmit. | ||
| 106 | SHDLC adds a new execution context (nfc_shdlc_sm_work()) to run its state | ||
| 107 | machine and handle both its rx and tx path. | ||
| 108 | |||
| 109 | Included Drivers | ||
| 110 | ---------------- | ||
| 111 | |||
| 112 | An HCI based driver for an NXP PN544, connected through I2C bus, and using | ||
| 113 | shdlc is included. | ||
| 114 | |||
| 115 | Execution Contexts | ||
| 116 | ------------------ | ||
| 117 | |||
| 118 | The execution contexts are the following: | ||
| 119 | - IRQ handler (IRQH): | ||
| 120 | fast, cannot sleep. stores incoming frames into an shdlc rx queue | ||
| 121 | |||
| 122 | - SHDLC State Machine worker (SMW) | ||
| 123 | handles shdlc rx & tx queues. Dispatches HCI cmd responses. | ||
| 124 | |||
| 125 | - HCI Tx Cmd worker (MSGTXWQ) | ||
| 126 | Serializes execution of HCI commands. Completes execution in case of response | ||
| 127 | timeout. | ||
| 128 | |||
| 129 | - HCI Rx worker (MSGRXWQ) | ||
| 130 | Dispatches incoming HCI commands or events. | ||
| 131 | |||
| 132 | - Syscall context from a userspace call (SYSCALL) | ||
| 133 | Any entrypoint in HCI called from NFC Core | ||
| 134 | |||
| 135 | Workflow executing an HCI command (using shdlc) | ||
| 136 | ----------------------------------------------- | ||
| 137 | |||
| 138 | Executing an HCI command can easily be performed synchronously using the | ||
| 139 | following API: | ||
| 140 | |||
| 141 | int nfc_hci_send_cmd (struct nfc_hci_dev *hdev, u8 gate, u8 cmd, | ||
| 142 | const u8 *param, size_t param_len, struct sk_buff **skb) | ||
| 143 | |||
| 144 | The API must be invoked from a context that can sleep. Most of the time, this | ||
| 145 | will be the syscall context. skb will return the result that was received in | ||
| 146 | the response. | ||
| 147 | |||
| 148 | Internally, execution is asynchronous. So all this API does is to enqueue the | ||
| 149 | HCI command, setup a local wait queue on stack, and wait_event() for completion. | ||
| 150 | The wait is not interruptible because it is guaranteed that the command will | ||
| 151 | complete after some short timeout anyway. | ||
| 152 | |||
| 153 | MSGTXWQ context will then be scheduled and invoke nfc_hci_msg_tx_work(). | ||
| 154 | This function will dequeue the next pending command and send its HCP fragments | ||
| 155 | to the lower layer which happens to be shdlc. It will then start a timer to be | ||
| 156 | able to complete the command with a timeout error if no response arrive. | ||
| 157 | |||
| 158 | SMW context gets scheduled and invokes nfc_shdlc_sm_work(). This function | ||
| 159 | handles shdlc framing in and out. It uses the driver xmit to send frames and | ||
| 160 | receives incoming frames in an skb queue filled from the driver IRQ handler. | ||
| 161 | SHDLC I(nformation) frames payload are HCP fragments. They are aggregated to | ||
| 162 | form complete HCI frames, which can be a response, command, or event. | ||
| 163 | |||
| 164 | HCI Responses are dispatched immediately from this context to unblock | ||
| 165 | waiting command execution. Response processing involves invoking the completion | ||
| 166 | callback that was provided by nfc_hci_msg_tx_work() when it sent the command. | ||
| 167 | The completion callback will then wake the syscall context. | ||
| 168 | |||
| 169 | Workflow receiving an HCI event or command | ||
| 170 | ------------------------------------------ | ||
| 171 | |||
| 172 | HCI commands or events are not dispatched from SMW context. Instead, they are | ||
| 173 | queued to HCI rx_queue and will be dispatched from HCI rx worker | ||
| 174 | context (MSGRXWQ). This is done this way to allow a cmd or event handler | ||
| 175 | to also execute other commands (for example, handling the | ||
| 176 | NFC_HCI_EVT_TARGET_DISCOVERED event from PN544 requires to issue an | ||
| 177 | ANY_GET_PARAMETER to the reader A gate to get information on the target | ||
| 178 | that was discovered). | ||
| 179 | |||
| 180 | Typically, such an event will be propagated to NFC Core from MSGRXWQ context. | ||
| @@ -34,6 +34,6 @@ registers interruption handlers read to find out where the machine · 33 unmodified lines | |||
| 34 | was interrupted - so if you get an interruption between the instruction | 34 | was interrupted - so if you get an interruption between the instruction |
| 35 | that clears the Q bit and the RFI that sets it again you don't know | 35 | that clears the Q bit and the RFI that sets it again you don't know |
| 36 | where exactly it happened. If you're lucky the IAOQ will point to the | 36 | where exactly it happened. If you're lucky the IAOQ will point to the |
| 37 | instrucion that cleared the Q bit, if you're not it points anywhere | 37 | instruction that cleared the Q bit, if you're not it points anywhere |
| 38 | at all. Usually Q bit problems will show themselves in unexplainable | 38 | at all. Usually Q bit problems will show themselves in unexplainable |
| 39 | system hangs or running off the end of physical memory. | 39 | system hangs or running off the end of physical memory. |
| @@ -152,11 +152,9 @@ static const struct foo_group foo_groups[] = { · 151 unmodified lines | |||
| 152 | }; | 152 | }; |
| 153 | 153 | ||
| 154 | 154 | ||
| 155 | static int foo_list_groups(struct pinctrl_dev *pctldev, unsigned selector) | 155 | static int foo_get_groups_count(struct pinctrl_dev *pctldev) |
| 156 | { | 156 | { |
| 157 | if (selector >= ARRAY_SIZE(foo_groups)) | 157 | return ARRAY_SIZE(foo_groups); |
| 158 | return -EINVAL; | ||
| 159 | return 0; | ||
| 160 | } | 158 | } |
| 161 | 159 | ||
| 162 | static const char *foo_get_group_name(struct pinctrl_dev *pctldev, | 160 | static const char *foo_get_group_name(struct pinctrl_dev *pctldev, |
| @@ -175,7 +173,7 @@ static int foo_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, · 12 unmodified lines | |||
| 175 | } | 173 | } |
| 176 | 174 | ||
| 177 | static struct pinctrl_ops foo_pctrl_ops = { | 175 | static struct pinctrl_ops foo_pctrl_ops = { |
| 178 | .list_groups = foo_list_groups, | 176 | .get_groups_count = foo_get_groups_count, |
| 179 | .get_group_name = foo_get_group_name, | 177 | .get_group_name = foo_get_group_name, |
| 180 | .get_group_pins = foo_get_group_pins, | 178 | .get_group_pins = foo_get_group_pins, |
| 181 | }; | 179 | }; |
| @@ -186,13 +184,12 @@ static struct pinctrl_desc foo_desc = { · 4 unmodified lines | |||
| 186 | .pctlops = &foo_pctrl_ops, | 184 | .pctlops = &foo_pctrl_ops, |
| 187 | }; | 185 | }; |
| 188 | 186 | ||
| 189 | The pin control subsystem will call the .list_groups() function repeatedly | 187 | The pin control subsystem will call the .get_groups_count() function to |
| 190 | beginning on 0 until it returns non-zero to determine legal selectors, then | 188 | determine total number of legal selectors, then it will call the other functions |
| 191 | it will call the other functions to retrieve the name and pins of the group. | 189 | to retrieve the name and pins of the group. Maintaining the data structure of |
| 192 | Maintaining the data structure of the groups is up to the driver, this is | 190 | the groups is up to the driver, this is just a simple example - in practice you |
| 193 | just a simple example - in practice you may need more entries in your group | 191 | may need more entries in your group structure, for example specific register |
| 194 | structure, for example specific register ranges associated with each group | 192 | ranges associated with each group and so on. |
| 195 | and so on. | ||
| 196 | 193 | ||
| 197 | 194 | ||
| 198 | Pin configuration | 195 | Pin configuration |
| @@ -606,11 +603,9 @@ static const struct foo_group foo_groups[] = { · 407 unmodified lines | |||
| 606 | }; | 603 | }; |
| 607 | 604 | ||
| 608 | 605 | ||
| 609 | static int foo_list_groups(struct pinctrl_dev *pctldev, unsigned selector) | 606 | static int foo_get_groups_count(struct pinctrl_dev *pctldev) |
| 610 | { | 607 | { |
| 611 | if (selector >= ARRAY_SIZE(foo_groups)) | 608 | return ARRAY_SIZE(foo_groups); |
| 612 | return -EINVAL; | ||
| 613 | return 0; | ||
| 614 | } | 609 | } |
| 615 | 610 | ||
| 616 | static const char *foo_get_group_name(struct pinctrl_dev *pctldev, | 611 | static const char *foo_get_group_name(struct pinctrl_dev *pctldev, |
| @@ -629,7 +624,7 @@ static int foo_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, · 12 unmodified lines | |||
| 629 | } | 624 | } |
| 630 | 625 | ||
| 631 | static struct pinctrl_ops foo_pctrl_ops = { | 626 | static struct pinctrl_ops foo_pctrl_ops = { |
| 632 | .list_groups = foo_list_groups, | 627 | .get_groups_count = foo_get_groups_count, |
| 633 | .get_group_name = foo_get_group_name, | 628 | .get_group_name = foo_get_group_name, |
| 634 | .get_group_pins = foo_get_group_pins, | 629 | .get_group_pins = foo_get_group_pins, |
| 635 | }; | 630 | }; |
| @@ -640,7 +635,7 @@ struct foo_pmx_func { · 4 unmodified lines | |||
| 640 | const unsigned num_groups; | 635 | const unsigned num_groups; |
| 641 | }; | 636 | }; |
| 642 | 637 | ||
| 643 | static const char * const spi0_groups[] = { "spi0_1_grp" }; | 638 | static const char * const spi0_groups[] = { "spi0_0_grp", "spi0_1_grp" }; |
| 644 | static const char * const i2c0_groups[] = { "i2c0_grp" }; | 639 | static const char * const i2c0_groups[] = { "i2c0_grp" }; |
| 645 | static const char * const mmc0_groups[] = { "mmc0_1_grp", "mmc0_2_grp", | 640 | static const char * const mmc0_groups[] = { "mmc0_1_grp", "mmc0_2_grp", |
| 646 | "mmc0_3_grp" }; | 641 | "mmc0_3_grp" }; |
| @@ -663,11 +658,9 @@ static const struct foo_pmx_func foo_functions[] = { · 16 unmodified lines | |||
| 663 | }, | 658 | }, |
| 664 | }; | 659 | }; |
| 665 | 660 | ||
| 666 | int foo_list_funcs(struct pinctrl_dev *pctldev, unsigned selector) | 661 | int foo_get_functions_count(struct pinctrl_dev *pctldev) |
| 667 | { | 662 | { |
| 668 | if (selector >= ARRAY_SIZE(foo_functions)) | 663 | return ARRAY_SIZE(foo_functions); |
| 669 | return -EINVAL; | ||
| 670 | return 0; | ||
| 671 | } | 664 | } |
| 672 | 665 | ||
| 673 | const char *foo_get_fname(struct pinctrl_dev *pctldev, unsigned selector) | 666 | const char *foo_get_fname(struct pinctrl_dev *pctldev, unsigned selector) |
| @@ -703,7 +696,7 @@ void foo_disable(struct pinctrl_dev *pctldev, unsigned selector, · 29 unmodified lines | |||
| 703 | } | 696 | } |
| 704 | 697 | ||
| 705 | struct pinmux_ops foo_pmxops = { | 698 | struct pinmux_ops foo_pmxops = { |
| 706 | .list_functions = foo_list_funcs, | 699 | .get_functions_count = foo_get_functions_count, |
| 707 | .get_function_name = foo_get_fname, | 700 | .get_function_name = foo_get_fname, |
| 708 | .get_function_groups = foo_get_groups, | 701 | .get_function_groups = foo_get_groups, |
| 709 | .enable = foo_enable, | 702 | .enable = foo_enable, |
| @@ -786,7 +779,7 @@ and spi on the second function mapping: · 76 unmodified lines | |||
| 786 | 779 | ||
| 787 | #include <linux/pinctrl/machine.h> | 780 | #include <linux/pinctrl/machine.h> |
| 788 | 781 | ||
| 789 | static const struct pinctrl_map __initdata mapping[] = { | 782 | static const struct pinctrl_map mapping[] __initconst = { |
| 790 | { | 783 | { |
| 791 | .dev_name = "foo-spi.0", | 784 | .dev_name = "foo-spi.0", |
| 792 | .name = PINCTRL_STATE_DEFAULT, | 785 | .name = PINCTRL_STATE_DEFAULT, |
| @@ -952,13 +945,13 @@ case), we define a mapping like this: · 159 unmodified lines | |||
| 952 | The result of grabbing this mapping from the device with something like | 945 | The result of grabbing this mapping from the device with something like |
| 953 | this (see next paragraph): | 946 | this (see next paragraph): |
| 954 | 947 | ||
| 955 | p = pinctrl_get(dev); | 948 | p = devm_pinctrl_get(dev); |
| 956 | s = pinctrl_lookup_state(p, "8bit"); | 949 | s = pinctrl_lookup_state(p, "8bit"); |
| 957 | ret = pinctrl_select_state(p, s); | 950 | ret = pinctrl_select_state(p, s); |
| 958 | 951 | ||
| 959 | or more simply: | 952 | or more simply: |
| 960 | 953 | ||
| 961 | p = pinctrl_get_select(dev, "8bit"); | 954 | p = devm_pinctrl_get_select(dev, "8bit"); |
| 962 | 955 | ||
| 963 | Will be that you activate all the three bottom records in the mapping at | 956 | Will be that you activate all the three bottom records in the mapping at |
| 964 | once. Since they share the same name, pin controller device, function and | 957 | once. Since they share the same name, pin controller device, function and |
| @@ -992,7 +985,7 @@ foo_probe() · 27 unmodified lines | |||
| 992 | /* Allocate a state holder named "foo" etc */ | 985 | /* Allocate a state holder named "foo" etc */ |
| 993 | struct foo_state *foo = ...; | 986 | struct foo_state *foo = ...; |
| 994 | 987 | ||
| 995 | foo->p = pinctrl_get(&device); | 988 | foo->p = devm_pinctrl_get(&device); |
| 996 | if (IS_ERR(foo->p)) { | 989 | if (IS_ERR(foo->p)) { |
| 997 | /* FIXME: clean up "foo" here */ | 990 | /* FIXME: clean up "foo" here */ |
| 998 | return PTR_ERR(foo->p); | 991 | return PTR_ERR(foo->p); |
| @@ -1000,24 +993,17 @@ foo_probe() · 1 unmodified line | |||
| 1000 | 993 | ||
| 1001 | foo->s = pinctrl_lookup_state(foo->p, PINCTRL_STATE_DEFAULT); | 994 | foo->s = pinctrl_lookup_state(foo->p, PINCTRL_STATE_DEFAULT); |
| 1002 | if (IS_ERR(foo->s)) { | 995 | if (IS_ERR(foo->s)) { |
| 1003 | pinctrl_put(foo->p); | ||
| 1004 | /* FIXME: clean up "foo" here */ | 996 | /* FIXME: clean up "foo" here */ |
| 1005 | return PTR_ERR(s); | 997 | return PTR_ERR(s); |
| 1006 | } | 998 | } |
| 1007 | 999 | ||
| 1008 | ret = pinctrl_select_state(foo->s); | 1000 | ret = pinctrl_select_state(foo->s); |
| 1009 | if (ret < 0) { | 1001 | if (ret < 0) { |
| 1010 | pinctrl_put(foo->p); | ||
| 1011 | /* FIXME: clean up "foo" here */ | 1002 | /* FIXME: clean up "foo" here */ |
| 1012 | return ret; | 1003 | return ret; |
| 1013 | } | 1004 | } |
| 1014 | } | 1005 | } |
| 1015 | 1006 | ||
| 1016 | foo_remove() | ||
| 1017 | { | ||
| 1018 | pinctrl_put(state->p); | ||
| 1019 | } | ||
| 1020 | |||
| 1021 | This get/lookup/select/put sequence can just as well be handled by bus drivers | 1007 | This get/lookup/select/put sequence can just as well be handled by bus drivers |
| 1022 | if you don't want each and every driver to handle it and you know the | 1008 | if you don't want each and every driver to handle it and you know the |
| 1023 | arrangement on your bus. | 1009 | arrangement on your bus. |
| @@ -1029,6 +1015,11 @@ The semantics of the pinctrl APIs are: · 5 unmodified lines | |||
| 1029 | kernel memory to hold the pinmux state. All mapping table parsing or similar | 1015 | kernel memory to hold the pinmux state. All mapping table parsing or similar |
| 1030 | slow operations take place within this API. | 1016 | slow operations take place within this API. |
| 1031 | 1017 | ||
| 1018 | - devm_pinctrl_get() is a variant of pinctrl_get() that causes pinctrl_put() | ||
| 1019 | to be called automatically on the retrieved pointer when the associated | ||
| 1020 | device is removed. It is recommended to use this function over plain | ||
| 1021 | pinctrl_get(). | ||
| 1022 | |||
| 1032 | - pinctrl_lookup_state() is called in process context to obtain a handle to a | 1023 | - pinctrl_lookup_state() is called in process context to obtain a handle to a |
| 1033 | specific state for a the client device. This operation may be slow too. | 1024 | specific state for a the client device. This operation may be slow too. |
| 1034 | 1025 | ||
| @@ -1041,14 +1032,30 @@ The semantics of the pinctrl APIs are: · 6 unmodified lines | |||
| 1041 | 1032 | ||
| 1042 | - pinctrl_put() frees all information associated with a pinctrl handle. | 1033 | - pinctrl_put() frees all information associated with a pinctrl handle. |
| 1043 | 1034 | ||
| 1035 | - devm_pinctrl_put() is a variant of pinctrl_put() that may be used to | ||
| 1036 | explicitly destroy a pinctrl object returned by devm_pinctrl_get(). | ||
| 1037 | However, use of this function will be rare, due to the automatic cleanup | ||
| 1038 | that will occur even without calling it. | ||
| 1039 | |||
| 1040 | pinctrl_get() must be paired with a plain pinctrl_put(). | ||
| 1041 | pinctrl_get() may not be paired with devm_pinctrl_put(). | ||
| 1042 | devm_pinctrl_get() can optionally be paired with devm_pinctrl_put(). | ||
| 1043 | devm_pinctrl_get() may not be paired with plain pinctrl_put(). | ||
| 1044 | |||
| 1044 | Usually the pin control core handled the get/put pair and call out to the | 1045 | Usually the pin control core handled the get/put pair and call out to the |
| 1045 | device drivers bookkeeping operations, like checking available functions and | 1046 | device drivers bookkeeping operations, like checking available functions and |
| 1046 | the associated pins, whereas the enable/disable pass on to the pin controller | 1047 | the associated pins, whereas the enable/disable pass on to the pin controller |
| 1047 | driver which takes care of activating and/or deactivating the mux setting by | 1048 | driver which takes care of activating and/or deactivating the mux setting by |
| 1048 | quickly poking some registers. | 1049 | quickly poking some registers. |
| 1049 | 1050 | ||
| 1050 | The pins are allocated for your device when you issue the pinctrl_get() call, | 1051 | The pins are allocated for your device when you issue the devm_pinctrl_get() |
| 1051 | after this you should be able to see this in the debugfs listing of all pins. | 1052 | call, after this you should be able to see this in the debugfs listing of all |
| 1053 | pins. | ||
| 1054 | |||
| 1055 | NOTE: the pinctrl system will return -EPROBE_DEFER if it cannot find the | ||
| 1056 | requested pinctrl handles, for example if the pinctrl driver has not yet | ||
| 1057 | registered. Thus make sure that the error path in your driver gracefully | ||
| 1058 | cleans up and is ready to retry the probing later in the startup process. | ||
| 1052 | 1059 | ||
| 1053 | 1060 | ||
| 1054 | System pin control hogging | 1061 | System pin control hogging |
| @@ -1094,13 +1101,13 @@ it, disables and releases it, and muxes it in on the pins defined by group B: · 39 unmodified lines | |||
| 1094 | 1101 | ||
| 1095 | #include <linux/pinctrl/consumer.h> | 1102 | #include <linux/pinctrl/consumer.h> |
| 1096 | 1103 | ||
| 1097 | foo_switch() | 1104 | struct pinctrl *p; |
| 1098 | { | 1105 | struct pinctrl_state *s1, *s2; |
| 1099 | struct pinctrl *p; | ||
| 1100 | struct pinctrl_state *s1, *s2; | ||
| 1101 | 1106 | ||
| 1107 | foo_probe() | ||
| 1108 | { | ||
| 1102 | /* Setup */ | 1109 | /* Setup */ |
| 1103 | p = pinctrl_get(&device); | 1110 | p = devm_pinctrl_get(&device); |
| 1104 | if (IS_ERR(p)) | 1111 | if (IS_ERR(p)) |
| 1105 | ... | 1112 | ... |
| 1106 | 1113 | ||
| @@ -1111,7 +1118,10 @@ foo_switch() · 4 unmodified lines | |||
| 1111 | s2 = pinctrl_lookup_state(foo->p, "pos-B"); | 1118 | s2 = pinctrl_lookup_state(foo->p, "pos-B"); |
| 1112 | if (IS_ERR(s2)) | 1119 | if (IS_ERR(s2)) |
| 1113 | ... | 1120 | ... |
| 1121 | } | ||
| 1114 | 1122 | ||
| 1123 | foo_switch() | ||
| 1124 | { | ||
| 1115 | /* Enable on position A */ | 1125 | /* Enable on position A */ |
| 1116 | ret = pinctrl_select_state(s1); | 1126 | ret = pinctrl_select_state(s1); |
| 1117 | if (ret < 0) | 1127 | if (ret < 0) |
| @@ -1125,8 +1135,6 @@ foo_switch() · 7 unmodified lines | |||
| 1125 | ... | 1135 | ... |
| 1126 | 1136 | ||
| 1127 | ... | 1137 | ... |
| 1128 | |||
| 1129 | pinctrl_put(p); | ||
| 1130 | } | 1138 | } |
| 1131 | 1139 | ||
| 1132 | The above has to be done from process context. | 1140 | The above has to be done from process context. |
| @@ -44,6 +44,16 @@ Charger Manager supports the following: · 43 unmodified lines | |||
| 44 | Normally, the platform will need to resume and suspend some devices | 44 | Normally, the platform will need to resume and suspend some devices |
| 45 | that are used by Charger Manager. | 45 | that are used by Charger Manager. |
| 46 | 46 | ||
| 47 | * Support for premature full-battery event handling | ||
| 48 | If the battery voltage drops by "fullbatt_vchkdrop_uV" after | ||
| 49 | "fullbatt_vchkdrop_ms" from the full-battery event, the framework | ||
| 50 | restarts charging. This check is also performed while suspended by | ||
| 51 | setting wakeup time accordingly and using suspend_again. | ||
| 52 | |||
| 53 | * Support for uevent-notify | ||
| 54 | With the charger-related events, the device sends | ||
| 55 | notification to users with UEVENT. | ||
| 56 | |||
| 47 | 2. Global Charger-Manager Data related with suspend_again | 57 | 2. Global Charger-Manager Data related with suspend_again |
| 48 | ======================================================== | 58 | ======================================================== |
| 49 | In order to setup Charger Manager with suspend-again feature | 59 | In order to setup Charger Manager with suspend-again feature |
| @@ -55,7 +65,7 @@ if there are multiple batteries. If there are multiple batteries, the · 5 unmodified lines | |||
| 55 | multiple instances of Charger Manager share the same charger_global_desc | 65 | multiple instances of Charger Manager share the same charger_global_desc |
| 56 | and it will manage in-suspend monitoring for all instances of Charger Manager. | 66 | and it will manage in-suspend monitoring for all instances of Charger Manager. |
| 57 | 67 | ||
| 58 | The user needs to provide all the two entries properly in order to activate | 68 | The user needs to provide all the three entries properly in order to activate |
| 59 | in-suspend monitoring: | 69 | in-suspend monitoring: |
| 60 | 70 | ||
| 61 | struct charger_global_desc { | 71 | struct charger_global_desc { |
| @@ -74,6 +84,11 @@ bool (*rtc_only_wakeup)(void); · 12 unmodified lines | |||
| 74 | same struct. If there is any other wakeup source triggered the | 84 | same struct. If there is any other wakeup source triggered the |
| 75 | wakeup, it should return false. If the "rtc" is the only wakeup | 85 | wakeup, it should return false. If the "rtc" is the only wakeup |
| 76 | reason, it should return true. | 86 | reason, it should return true. |
| 87 | |||
| 88 | bool assume_timer_stops_in_suspend; | ||
| 89 | : if true, Charger Manager assumes that | ||
| 90 | the timer (CM uses jiffies as timer) stops during suspend. Then, CM | ||
| 91 | assumes that the suspend-duration is same as the alarm length. | ||
| 77 | }; | 92 | }; |
| 78 | 93 | ||
| 79 | 3. How to setup suspend_again | 94 | 3. How to setup suspend_again |
| @@ -111,6 +126,16 @@ enum polling_modes polling_mode; · 31 unmodified lines | |||
| 111 | CM_POLL_CHARGING_ONLY: poll this battery if and only if the | 126 | CM_POLL_CHARGING_ONLY: poll this battery if and only if the |
| 112 | battery is being charged. | 127 | battery is being charged. |
| 113 | 128 | ||
| 129 | unsigned int fullbatt_vchkdrop_ms; | ||
| 130 | unsigned int fullbatt_vchkdrop_uV; | ||
| 131 | : If both have non-zero values, Charger Manager will check the | ||
| 132 | battery voltage drop fullbatt_vchkdrop_ms after the battery is fully | ||
| 133 | charged. If the voltage drop is over fullbatt_vchkdrop_uV, Charger | ||
| 134 | Manager will try to recharge the battery by disabling and enabling | ||
| 135 | chargers. Recharge with voltage drop condition only (without delay | ||
| 136 | condition) is needed to be implemented with hardware interrupts from | ||
| 137 | fuel gauges or charger devices/chips. | ||
| 138 | |||
| 114 | unsigned int fullbatt_uV; | 139 | unsigned int fullbatt_uV; |
| 115 | : If specified with a non-zero value, Charger Manager assumes | 140 | : If specified with a non-zero value, Charger Manager assumes |
| 116 | that the battery is full (capacity = 100) if the battery is not being | 141 | that the battery is full (capacity = 100) if the battery is not being |
| @@ -122,6 +147,8 @@ unsigned int polling_interval_ms; · 5 unmodified lines | |||
| 122 | this battery every polling_interval_ms or more frequently. | 147 | this battery every polling_interval_ms or more frequently. |
| 123 | 148 | ||
| 124 | enum data_source battery_present; | 149 | enum data_source battery_present; |
| 150 | : CM_BATTERY_PRESENT: assume that the battery exists. | ||
| 151 | CM_NO_BATTERY: assume that the battery does not exists. | ||
| 125 | CM_FUEL_GAUGE: get battery presence information from fuel gauge. | 152 | CM_FUEL_GAUGE: get battery presence information from fuel gauge. |
| 126 | CM_CHARGER_STAT: get battery presence from chargers. | 153 | CM_CHARGER_STAT: get battery presence from chargers. |
| 127 | 154 | ||
| @@ -151,7 +178,17 @@ bool measure_battery_temp; · 23 unmodified lines | |||
| 151 | the value of measure_battery_temp. | 178 | the value of measure_battery_temp. |
| 152 | }; | 179 | }; |
| 153 | 180 | ||
| 154 | 5. Other Considerations | 181 | 5. Notify Charger-Manager of charger events: cm_notify_event() |
| 182 | ========================================================= | ||
| 183 | If there is an charger event is required to notify | ||
| 184 | Charger Manager, a charger device driver that triggers the event can call | ||
| 185 | cm_notify_event(psy, type, msg) to notify the corresponding Charger Manager. | ||
| 186 | In the function, psy is the charger driver's power_supply pointer, which is | ||
| 187 | associated with Charger-Manager. The parameter "type" | ||
| 188 | is the same as irq's type (enum cm_event_types). The event message "msg" is | ||
| 189 | optional and is effective only if the event type is "UNDESCRIBED" or "OTHERS". | ||
| 190 | |||
| 191 | 6. Other Considerations | ||
| 155 | ======================= | 192 | ======================= |
| 156 | 193 | ||
| 157 | At the charger/battery-related events such as battery-pulled-out, | 194 | At the charger/battery-related events such as battery-pulled-out, |
| @@ -84,6 +84,8 @@ are already charged or discharging, 'n/a' can be displayed (or · 83 unmodified lines | |||
| 84 | HEALTH - represents health of the battery, values corresponds to | 84 | HEALTH - represents health of the battery, values corresponds to |
| 85 | POWER_SUPPLY_HEALTH_*, defined in battery.h. | 85 | POWER_SUPPLY_HEALTH_*, defined in battery.h. |
| 86 | 86 | ||
| 87 | VOLTAGE_OCV - open circuit voltage of the battery. | ||
| 88 | |||
| 87 | VOLTAGE_MAX_DESIGN, VOLTAGE_MIN_DESIGN - design values for maximal and | 89 | VOLTAGE_MAX_DESIGN, VOLTAGE_MIN_DESIGN - design values for maximal and |
| 88 | minimal power supply voltages. Maximal/minimal means values of voltages | 90 | minimal power supply voltages. Maximal/minimal means values of voltages |
| 89 | when battery considered "full"/"empty" at normal conditions. Yes, there is | 91 | when battery considered "full"/"empty" at normal conditions. Yes, there is |
| @@ -11,8 +11,7 @@ Registration · 10 unmodified lines | |||
| 11 | Drivers can register a regulator by calling :- | 11 | Drivers can register a regulator by calling :- |
| 12 | 12 | ||
| 13 | struct regulator_dev *regulator_register(struct regulator_desc *regulator_desc, | 13 | struct regulator_dev *regulator_register(struct regulator_desc *regulator_desc, |
| 14 | struct device *dev, struct regulator_init_data *init_data, | 14 | const struct regulator_config *config); |
| 15 | void *driver_data, struct device_node *of_node); | ||
| 16 | 15 | ||
| 17 | This will register the regulators capabilities and operations to the regulator | 16 | This will register the regulators capabilities and operations to the regulator |
| 18 | core. | 17 | core. |
| @@ -29,7 +29,7 @@ More details follow: · 28 unmodified lines | |||
| 29 | 29 | ||
| 30 | Write 'mem' to | 30 | Write 'mem' to |
| 31 | /sys/power/state | 31 | /sys/power/state |
| 32 | syfs file | 32 | sysfs file |
| 33 | | | 33 | | |
| 34 | v | 34 | v |
| 35 | Acquire pm_mutex lock | 35 | Acquire pm_mutex lock |
| @@ -0,0 +1,163 @@ | |||
| 1 | SECure COMPuting with filters | ||
| 2 | ============================= | ||
| 3 | |||
| 4 | Introduction | ||
| 5 | ------------ | ||
| 6 | |||
| 7 | A large number of system calls are exposed to every userland process | ||
| 8 | with many of them going unused for the entire lifetime of the process. | ||
| 9 | As system calls change and mature, bugs are found and eradicated. A | ||
| 10 | certain subset of userland applications benefit by having a reduced set | ||
| 11 | of available system calls. The resulting set reduces the total kernel | ||
| 12 | surface exposed to the application. System call filtering is meant for | ||
| 13 | use with those applications. | ||
| 14 | |||
| 15 | Seccomp filtering provides a means for a process to specify a filter for | ||
| 16 | incoming system calls. The filter is expressed as a Berkeley Packet | ||
| 17 | Filter (BPF) program, as with socket filters, except that the data | ||
| 18 | operated on is related to the system call being made: system call | ||
| 19 | number and the system call arguments. This allows for expressive | ||
| 20 | filtering of system calls using a filter program language with a long | ||
| 21 | history of being exposed to userland and a straightforward data set. | ||
| 22 | |||
| 23 | Additionally, BPF makes it impossible for users of seccomp to fall prey | ||
| 24 | to time-of-check-time-of-use (TOCTOU) attacks that are common in system | ||
| 25 | call interposition frameworks. BPF programs may not dereference | ||
| 26 | pointers which constrains all filters to solely evaluating the system | ||
| 27 | call arguments directly. | ||
| 28 | |||
| 29 | What it isn't | ||
| 30 | ------------- | ||
| 31 | |||
| 32 | System call filtering isn't a sandbox. It provides a clearly defined | ||
| 33 | mechanism for minimizing the exposed kernel surface. It is meant to be | ||
| 34 | a tool for sandbox developers to use. Beyond that, policy for logical | ||
| 35 | behavior and information flow should be managed with a combination of | ||
| 36 | other system hardening techniques and, potentially, an LSM of your | ||
| 37 | choosing. Expressive, dynamic filters provide further options down this | ||
| 38 | path (avoiding pathological sizes or selecting which of the multiplexed | ||
| 39 | system calls in socketcall() is allowed, for instance) which could be | ||
| 40 | construed, incorrectly, as a more complete sandboxing solution. | ||
| 41 | |||
| 42 | Usage | ||
| 43 | ----- | ||
| 44 | |||
| 45 | An additional seccomp mode is added and is enabled using the same | ||
| 46 | prctl(2) call as the strict seccomp. If the architecture has | ||
| 47 | CONFIG_HAVE_ARCH_SECCOMP_FILTER, then filters may be added as below: | ||
| 48 | |||
| 49 | PR_SET_SECCOMP: | ||
| 50 | Now takes an additional argument which specifies a new filter | ||
| 51 | using a BPF program. | ||
| 52 | The BPF program will be executed over struct seccomp_data | ||
| 53 | reflecting the system call number, arguments, and other | ||
| 54 | metadata. The BPF program must then return one of the | ||
| 55 | acceptable values to inform the kernel which action should be | ||
| 56 | taken. | ||
| 57 | |||
| 58 | Usage: | ||
| 59 | prctl(PR_SET_SECCOMP, SECCOMP_MODE_FILTER, prog); | ||
| 60 | |||
| 61 | The 'prog' argument is a pointer to a struct sock_fprog which | ||
| 62 | will contain the filter program. If the program is invalid, the | ||
| 63 | call will return -1 and set errno to EINVAL. | ||
| 64 | |||
| 65 | If fork/clone and execve are allowed by @prog, any child | ||
| 66 | processes will be constrained to the same filters and system | ||
| 67 | call ABI as the parent. | ||
| 68 | |||
| 69 | Prior to use, the task must call prctl(PR_SET_NO_NEW_PRIVS, 1) or | ||
| 70 | run with CAP_SYS_ADMIN privileges in its namespace. If these are not | ||
| 71 | true, -EACCES will be returned. This requirement ensures that filter | ||
| 72 | programs cannot be applied to child processes with greater privileges | ||
| 73 | than the task that installed them. | ||
| 74 | |||
| 75 | Additionally, if prctl(2) is allowed by the attached filter, | ||
| 76 | additional filters may be layered on which will increase evaluation | ||
| 77 | time, but allow for further decreasing the attack surface during | ||
| 78 | execution of a process. | ||
| 79 | |||
| 80 | The above call returns 0 on success and non-zero on error. | ||
| 81 | |||
| 82 | Return values | ||
| 83 | ------------- | ||
| 84 | A seccomp filter may return any of the following values. If multiple | ||
| 85 | filters exist, the return value for the evaluation of a given system | ||
| 86 | call will always use the highest precedent value. (For example, | ||
| 87 | SECCOMP_RET_KILL will always take precedence.) | ||
| 88 | |||
| 89 | In precedence order, they are: | ||
| 90 | |||
| 91 | SECCOMP_RET_KILL: | ||
| 92 | Results in the task exiting immediately without executing the | ||
| 93 | system call. The exit status of the task (status & 0x7f) will | ||
| 94 | be SIGSYS, not SIGKILL. | ||
| 95 | |||
| 96 | SECCOMP_RET_TRAP: | ||
| 97 | Results in the kernel sending a SIGSYS signal to the triggering | ||
| 98 | task without executing the system call. The kernel will | ||
| 99 | rollback the register state to just before the system call | ||
| 100 | entry such that a signal handler in the task will be able to | ||
| 101 | inspect the ucontext_t->uc_mcontext registers and emulate | ||
| 102 | system call success or failure upon return from the signal | ||
| 103 | handler. | ||
| 104 | |||
| 105 | The SECCOMP_RET_DATA portion of the return value will be passed | ||
| 106 | as si_errno. | ||
| 107 | |||
| 108 | SIGSYS triggered by seccomp will have a si_code of SYS_SECCOMP. | ||
| 109 | |||
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